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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/bitops: Delete find_first_set_bit()
Message-Id: <E1sDDxX-0007bR-Pi@xenbits.xenproject.org>
Date: Sat, 01 Jun 2024 01:55:03 +0000

commit 1408cf7a2840c0839d988f8cbf910eecac1655ef
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Mar 14 20:38:44 2024 +0000
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Sat Jun 1 02:28:14 2024 +0100

    xen/bitops: Delete find_first_set_bit()
    
    No more users.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/include/asm/bitops.h | 12 ------------
 xen/arch/ppc/include/asm/bitops.h |  9 ---------
 xen/arch/x86/include/asm/bitops.h | 12 ------------
 3 files changed, 33 deletions(-)

diff --git a/xen/arch/arm/include/asm/bitops.h b/xen/arch/arm/include/asm/bitops.h
index ab030b6cb0..6c5ec34e66 100644
--- a/xen/arch/arm/include/asm/bitops.h
+++ b/xen/arch/arm/include/asm/bitops.h
@@ -160,18 +160,6 @@ static inline int fls(unsigned int x)
 #define ffs(x) ({ unsigned int __t = (x); fls(ISOLATE_LSB(__t)); })
 #define ffsl(x) ({ unsigned long __t = (x); flsl(ISOLATE_LSB(__t)); })
 
-/**
- * find_first_set_bit - find the first set bit in @word
- * @word: the word to search
- *
- * Returns the bit-number of the first set bit (first bit being 0).
- * The input must *not* be zero.
- */
-static inline unsigned int find_first_set_bit(unsigned long word)
-{
-        return ffsl(word) - 1;
-}
-
 /**
  * hweightN - returns the hamming weight of a N-bit word
  * @x: the word to weigh
diff --git a/xen/arch/ppc/include/asm/bitops.h b/xen/arch/ppc/include/asm/bitops.h
index bea655796d..f984789e28 100644
--- a/xen/arch/ppc/include/asm/bitops.h
+++ b/xen/arch/ppc/include/asm/bitops.h
@@ -187,13 +187,4 @@ static inline int __test_and_clear_bit(int nr, volatile void *addr)
 #define hweight16(x) __builtin_popcount((uint16_t)(x))
 #define hweight8(x)  __builtin_popcount((uint8_t)(x))
 
-/**
- * find_first_set_bit - find the first set bit in @word
- * @word: the word to search
- *
- * Returns the bit-number of the first set bit (first bit being 0).
- * The input must *not* be zero.
- */
-#define find_first_set_bit(x) (ffsl(x) - 1)
-
 #endif /* _ASM_PPC_BITOPS_H */
diff --git a/xen/arch/x86/include/asm/bitops.h b/xen/arch/x86/include/asm/bitops.h
index 5a71afbc89..674c48397f 100644
--- a/xen/arch/x86/include/asm/bitops.h
+++ b/xen/arch/x86/include/asm/bitops.h
@@ -401,18 +401,6 @@ static always_inline unsigned int __scanbit(unsigned long val, unsigned int max)
     r__;                                                                    \
 })
 
-/**
- * find_first_set_bit - find the first set bit in @word
- * @word: the word to search
- * 
- * Returns the bit-number of the first set bit. The input must *not* be zero.
- */
-static inline unsigned int find_first_set_bit(unsigned long word)
-{
-    asm ( "rep; bsf %1,%0" : "=r" (word) : "rm" (word) );
-    return (unsigned int)word;
-}
-
 /**
  * ffs - find first bit set
  * @x: the word to search
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/bitops: Cleanup and new infrastructure ahead of rearrangements
Message-Id: <E1sDDxh-0007bw-Tq@xenbits.xenproject.org>
Date: Sat, 01 Jun 2024 01:55:13 +0000

commit ea59e7d780d9506793226b8cd1b402e341b195a7
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Fri Mar 8 23:45:08 2024 +0000
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Sat Jun 1 02:28:14 2024 +0100

    xen/bitops: Cleanup and new infrastructure ahead of rearrangements
    
     * Rename __attribute_pure__ to just __pure before it gains users.
     * Introduce __constructor which is going to be used in lib/, and is
       unconditionally cf_check.
     * Identify the areas of xen/bitops.h which are a mess.
     * Introduce xen/self-tests.h as helpers for compile and boot time testing.
       This provides a statement of the ABI, and a confirmation that arch-specific
       implementations behave as expected.
     * Introduce HIDE() in macros.h.  While it's only used in self-tests.h for
       now, we're going to consolidate similar constructs in due course.
    
    Sadly Clang 7 and older isn't happy with the compile time checks.  Skip them,
    and just rely on the runtime checks.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/include/xen/bitops.h     | 13 +++++++---
 xen/include/xen/compiler.h   |  3 ++-
 xen/include/xen/macros.h     |  8 +++++++
 xen/include/xen/self-tests.h | 56 ++++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 76 insertions(+), 4 deletions(-)

diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h
index e3c5a4ccf3..9b40f20381 100644
--- a/xen/include/xen/bitops.h
+++ b/xen/include/xen/bitops.h
@@ -1,5 +1,7 @@
-#ifndef _LINUX_BITOPS_H
-#define _LINUX_BITOPS_H
+#ifndef XEN_BITOPS_H
+#define XEN_BITOPS_H
+
+#include <xen/compiler.h>
 #include <xen/types.h>
 
 /*
@@ -103,8 +105,13 @@ static inline int generic_flsl(unsigned long x)
  * Include this here because some architectures need generic_ffs/fls in
  * scope
  */
+
+/* --------------------- Please tidy above here --------------------- */
+
 #include <asm/bitops.h>
 
+/* --------------------- Please tidy below here --------------------- */
+
 #ifndef find_next_bit
 /**
  * find_next_bit - find the next set bit in a memory region
@@ -294,4 +301,4 @@ static inline __u32 ror32(__u32 word, unsigned int shift)
 
 #define BIT_WORD(nr) ((nr) / BITS_PER_LONG)
 
-#endif
+#endif /* XEN_BITOPS_H */
diff --git a/xen/include/xen/compiler.h b/xen/include/xen/compiler.h
index 179ff23e62..444bf80142 100644
--- a/xen/include/xen/compiler.h
+++ b/xen/include/xen/compiler.h
@@ -86,7 +86,8 @@
 #define inline inline __init
 #endif
 
-#define __attribute_pure__  __attribute__((__pure__))
+#define __constructor       __attribute__((__constructor__)) cf_check
+#define __pure              __attribute__((__pure__))
 #define __attribute_const__ __attribute__((__const__))
 #define __transparent__     __attribute__((__transparent_union__))
 
diff --git a/xen/include/xen/macros.h b/xen/include/xen/macros.h
index e64373f018..ec89f4654f 100644
--- a/xen/include/xen/macros.h
+++ b/xen/include/xen/macros.h
@@ -59,6 +59,14 @@
 #define BUILD_BUG_ON(cond) ((void)BUILD_BUG_ON_ZERO(cond))
 #endif
 
+/* Hide a value from the optimiser. */
+#define HIDE(x)                                 \
+    ({                                          \
+        typeof(x) _x = (x);                     \
+        asm volatile ( "" : "+r" (_x) );        \
+        _x;                                     \
+    })
+
 #define ABS(x) ({                              \
     typeof(x) x_ = (x);                        \
     (x_ < 0) ? -x_ : x_;                       \
diff --git a/xen/include/xen/self-tests.h b/xen/include/xen/self-tests.h
new file mode 100644
index 0000000000..8410db7aaa
--- /dev/null
+++ b/xen/include/xen/self-tests.h
@@ -0,0 +1,56 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+/*
+ * Helpers for Xen self-tests of basic logic, including confirming that
+ * examples which should be calculated by the compiler are.
+ */
+#ifndef XEN_SELF_TESTS_H
+#define XEN_SELF_TESTS_H
+
+#include <xen/lib.h>
+
+/*
+ * Check that fn(val) can be calcuated by the compiler, and that it gives the
+ * expected answer.
+ *
+ * Clang < 8 can't fold constants through static inlines, causing this to
+ * fail.  Simply skip it for incredibly old compilers.
+ */
+#if !CONFIG_CC_IS_CLANG || CONFIG_CLANG_VERSION >= 80000
+#define COMPILE_CHECK(fn, val, res)                                     \
+    do {                                                                \
+        typeof(fn(val)) real = fn(val);                                 \
+                                                                        \
+        if ( !__builtin_constant_p(real) )                              \
+            asm ( ".error \"'" STR(fn(val)) "' not compile-time constant\"" ); \
+        else if ( real != res )                                         \
+            asm ( ".error \"Compile time check '" STR(fn(val) == res) "' failed\"" ); \
+    } while ( 0 )
+#else
+#define COMPILE_CHECK(fn, val, res)
+#endif
+
+/*
+ * Check that Xen's runtime logic for fn(val) gives the expected answer.  This
+ * requires using HIDE() to prevent the optimiser from collapsing the logic
+ * into a constant.
+ */
+#define RUNTIME_CHECK(fn, val, res)                     \
+    do {                                                \
+        typeof(fn(val)) real = fn(HIDE(val));           \
+                                                        \
+        if ( real != res )                              \
+            panic("%s: %s(%s) expected %u, got %u\n",   \
+                  __func__, #fn, #val, real, res);      \
+    } while ( 0 )
+
+/*
+ * Perform compile-time and runtime checks for fn(val) == res.
+ */
+#define CHECK(fn, val, res)                     \
+    do {                                        \
+        COMPILE_CHECK(fn, val, res);            \
+        RUNTIME_CHECK(fn, val, res);            \
+    } while ( 0 )
+
+#endif /* XEN_SELF_TESTS_H */
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/bitops: Implement generic_ffsl()/generic_flsl() in lib/
Message-Id: <E1sDDxs-0007cP-1o@xenbits.xenproject.org>
Date: Sat, 01 Jun 2024 01:55:24 +0000

commit 95ddb7e9b00c1d3ce38930e631c8892b6a137759
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Fri May 24 13:36:25 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Sat Jun 1 02:28:14 2024 +0100

    xen/bitops: Implement generic_ffsl()/generic_flsl() in lib/
    
    generic_ffs()/generic_fls*( being static inline is the cause of lots of the
    complexity between the common and arch-specific bitops.h
    
    They appear to be static inline for constant-folding reasons (ARM), but there
    are better ways to achieve the same effect.
    
    It is presumptuous that an unrolled binary search is the right algorithm to
    use on all microarchitectures.  Indeed, it's not for the eventual users, but
    that can be addressed at a later point.
    
    It is also nonsense to implement the int form as the base primitive and
    construct the long form from 2x int in 64-bit builds, when it's just one extra
    step to operate at the native register width.
    
    Therefore, implement generic_ffsl()/generic_flsl() in lib/.  They're not
    actually needed in x86/ARM/PPC by the end of the cleanup (i.e. the functions
    will be dropped by the linker), and they're only expected be needed by RISC-V
    on hardware which lacks the Zbb extension.
    
    Implement generic_fls() in terms of generic_flsl() for now, but this will be
    cleaned up in due course.
    
    Provide basic runtime testing using __constructor inside the lib/ file.  This
    is important, as it means testing runs if and only if generic_f?sl() are used
    elsewhere in Xen.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/include/asm/bitops.h |  2 +-
 xen/arch/ppc/include/asm/bitops.h |  2 +-
 xen/include/xen/bitops.h          | 89 +++------------------------------------
 xen/lib/Makefile                  |  2 +
 xen/lib/generic-ffsl.c            | 67 +++++++++++++++++++++++++++++
 xen/lib/generic-flsl.c            | 70 ++++++++++++++++++++++++++++++
 6 files changed, 146 insertions(+), 86 deletions(-)

diff --git a/xen/arch/arm/include/asm/bitops.h b/xen/arch/arm/include/asm/bitops.h
index 6c5ec34e66..685abfafb2 100644
--- a/xen/arch/arm/include/asm/bitops.h
+++ b/xen/arch/arm/include/asm/bitops.h
@@ -150,7 +150,7 @@ static inline int fls(unsigned int x)
         int ret;
 
         if (__builtin_constant_p(x))
-               return generic_fls(x);
+               return generic_flsl(x);
 
         asm("clz\t%"__OP32"0, %"__OP32"1" : "=r" (ret) : "r" (x));
         return 32 - ret;
diff --git a/xen/arch/ppc/include/asm/bitops.h b/xen/arch/ppc/include/asm/bitops.h
index f984789e28..c8b11326ad 100644
--- a/xen/arch/ppc/include/asm/bitops.h
+++ b/xen/arch/ppc/include/asm/bitops.h
@@ -172,7 +172,7 @@ static inline int __test_and_clear_bit(int nr, volatile void *addr)
 }
 
 #define flsl(x) generic_flsl(x)
-#define fls(x) generic_fls(x)
+#define fls(x) generic_flsl(x)
 #define ffs(x) ({ unsigned int t_ = (x); fls(t_ & -t_); })
 #define ffsl(x) ({ unsigned long t_ = (x); flsl(t_ & -t_); })
 
diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h
index 9b40f20381..218c346af2 100644
--- a/xen/include/xen/bitops.h
+++ b/xen/include/xen/bitops.h
@@ -15,91 +15,12 @@
     (((~0ULL) << (l)) & (~0ULL >> (BITS_PER_LLONG - 1 - (h))))
 
 /*
- * ffs: find first bit set. This is defined the same way as
- * the libc and compiler builtin ffs routines, therefore
- * differs in spirit from the above ffz (man ffs).
- */
-
-static inline int generic_ffs(unsigned int x)
-{
-    int r = 1;
-
-    if (!x)
-        return 0;
-    if (!(x & 0xffff)) {
-        x >>= 16;
-        r += 16;
-    }
-    if (!(x & 0xff)) {
-        x >>= 8;
-        r += 8;
-    }
-    if (!(x & 0xf)) {
-        x >>= 4;
-        r += 4;
-    }
-    if (!(x & 3)) {
-        x >>= 2;
-        r += 2;
-    }
-    if (!(x & 1)) {
-        x >>= 1;
-        r += 1;
-    }
-    return r;
-}
-
-/*
- * fls: find last bit set.
+ * Find First/Last Set bit (all forms).
+ *
+ * Bits are labelled from 1.  Returns 0 if given 0.
  */
-
-static inline int generic_fls(unsigned int x)
-{
-    int r = 32;
-
-    if (!x)
-        return 0;
-    if (!(x & 0xffff0000u)) {
-        x <<= 16;
-        r -= 16;
-    }
-    if (!(x & 0xff000000u)) {
-        x <<= 8;
-        r -= 8;
-    }
-    if (!(x & 0xf0000000u)) {
-        x <<= 4;
-        r -= 4;
-    }
-    if (!(x & 0xc0000000u)) {
-        x <<= 2;
-        r -= 2;
-    }
-    if (!(x & 0x80000000u)) {
-        x <<= 1;
-        r -= 1;
-    }
-    return r;
-}
-
-#if BITS_PER_LONG == 64
-
-static inline int generic_ffsl(unsigned long x)
-{
-    return !x || (u32)x ? generic_ffs(x) : generic_ffs(x >> 32) + 32;
-}
-
-static inline int generic_flsl(unsigned long x)
-{
-    u32 h = x >> 32;
-
-    return h ? generic_fls(h) + 32 : generic_fls(x);
-}
-
-#else
-# define generic_ffsl generic_ffs
-# define generic_flsl generic_fls
-#endif
+unsigned int __pure generic_ffsl(unsigned long x);
+unsigned int __pure generic_flsl(unsigned long x);
 
 /*
  * Include this here because some architectures need generic_ffs/fls in
diff --git a/xen/lib/Makefile b/xen/lib/Makefile
index e63798e1d4..a485415964 100644
--- a/xen/lib/Makefile
+++ b/xen/lib/Makefile
@@ -4,6 +4,8 @@ lib-y += bsearch.o
 lib-y += ctors.o
 lib-y += ctype.o
 lib-y += find-next-bit.o
+lib-y += generic-ffsl.o
+lib-y += generic-flsl.o
 lib-y += list-sort.o
 lib-y += memchr.o
 lib-y += memchr_inv.o
diff --git a/xen/lib/generic-ffsl.c b/xen/lib/generic-ffsl.c
new file mode 100644
index 0000000000..c9fb34ffcd
--- /dev/null
+++ b/xen/lib/generic-ffsl.c
@@ -0,0 +1,67 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <xen/bitops.h>
+#include <xen/init.h>
+#include <xen/self-tests.h>
+
+unsigned int generic_ffsl(unsigned long x)
+{
+    unsigned int r = 1;
+
+    if ( !x )
+        return 0;
+
+    BUILD_BUG_ON(BITS_PER_LONG > 64); /* Extend me when necessary. */
+
+#if BITS_PER_LONG > 32
+    if ( !(x & 0xffffffffU) )
+    {
+        x >>= 32;
+        r += 32;
+    }
+#endif
+    if ( !(x & 0xffff) )
+    {
+        x >>= 16;
+        r += 16;
+    }
+    if ( !(x & 0xff) )
+    {
+        x >>= 8;
+        r += 8;
+    }
+    if ( !(x & 0xf) )
+    {
+        x >>= 4;
+        r += 4;
+    }
+    if ( !(x & 3) )
+    {
+        x >>= 2;
+        r += 2;
+    }
+    if ( !(x & 1) )
+    {
+        x >>= 1;
+        r += 1;
+    }
+
+    return r;
+}
+
+#ifdef CONFIG_SELF_TESTS
+static void __init __constructor test_generic_ffsl(void)
+{
+    RUNTIME_CHECK(generic_ffsl, 0, 0);
+    RUNTIME_CHECK(generic_ffsl, 1, 1);
+    RUNTIME_CHECK(generic_ffsl, 3, 1);
+    RUNTIME_CHECK(generic_ffsl, 7, 1);
+    RUNTIME_CHECK(generic_ffsl, 6, 2);
+
+    RUNTIME_CHECK(generic_ffsl, 1UL << (BITS_PER_LONG - 1), BITS_PER_LONG);
+#if BITS_PER_LONG > 32
+    RUNTIME_CHECK(generic_ffsl, 1UL << 32, 33);
+    RUNTIME_CHECK(generic_ffsl, 1UL << 63, 64);
+#endif
+}
+#endif /* CONFIG_SELF_TESTS */
diff --git a/xen/lib/generic-flsl.c b/xen/lib/generic-flsl.c
new file mode 100644
index 0000000000..8f44f670fb
--- /dev/null
+++ b/xen/lib/generic-flsl.c
@@ -0,0 +1,70 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <xen/bitops.h>
+#include <xen/init.h>
+#include <xen/self-tests.h>
+
+/* Mask of type UL with the upper x bits set. */
+#define UPPER_MASK(x) (~0UL << (BITS_PER_LONG - (x)))
+
+unsigned int generic_flsl(unsigned long x)
+{
+    unsigned int r = BITS_PER_LONG;
+
+    if ( !x )
+        return 0;
+
+    BUILD_BUG_ON(BITS_PER_LONG > 64); /* Extend me when necessary. */
+
+#if BITS_PER_LONG > 32
+    if ( !(x & UPPER_MASK(32)) )
+    {
+        x <<= 32;
+        r -= 32;
+    }
+#endif
+    if ( !(x & UPPER_MASK(16)) )
+    {
+        x <<= 16;
+        r -= 16;
+    }
+    if ( !(x & UPPER_MASK(8)) )
+    {
+        x <<= 8;
+        r -= 8;
+    }
+    if ( !(x & UPPER_MASK(4)) )
+    {
+        x <<= 4;
+        r -= 4;
+    }
+    if ( !(x & UPPER_MASK(2)) )
+    {
+        x <<= 2;
+        r -= 2;
+    }
+    if ( !(x & UPPER_MASK(1)) )
+    {
+        x <<= 1;
+        r -= 1;
+    }
+
+    return r;
+}
+
+#ifdef CONFIG_SELF_TESTS
+static void __init __constructor test_generic_flsl(void)
+{
+    RUNTIME_CHECK(generic_flsl, 0, 0);
+    RUNTIME_CHECK(generic_flsl, 1, 1);
+    RUNTIME_CHECK(generic_flsl, 3, 2);
+    RUNTIME_CHECK(generic_flsl, 7, 3);
+    RUNTIME_CHECK(generic_flsl, 6, 3);
+
+    RUNTIME_CHECK(generic_flsl, 1 | (1UL << (BITS_PER_LONG - 1)), BITS_PER_LONG);
+#if BITS_PER_LONG > 32
+    RUNTIME_CHECK(generic_flsl, 1 | (1UL << 32), 33);
+    RUNTIME_CHECK(generic_flsl, 1 | (1UL << 63), 64);
+#endif
+}
+#endif /* CONFIG_SELF_TESTS */
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/bitops: Implement ffs() in common logic
Message-Id: <E1sDDy2-0007dG-5L@xenbits.xenproject.org>
Date: Sat, 01 Jun 2024 01:55:34 +0000

commit ef1dd8dff438444747997ae78b4dfa87b5fb9157
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed Jan 31 18:31:16 2024 +0000
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Sat Jun 1 02:28:14 2024 +0100

    xen/bitops: Implement ffs() in common logic
    
    Perform constant-folding unconditionally, rather than having it implemented
    inconsistency between architectures.
    
    Confirm the expected behaviour with compile time and boot time tests.
    
    For non-constant inputs, use arch_ffs() if provided but fall back to
    generic_ffsl() if not.  In particular, RISC-V doesn't have a builtin that
    works in all configurations.
    
    For x86, rename ffs() to arch_ffs() and adjust the prototype.
    
    For PPC, __builtin_ctz() is 1/3 of the size of size of the transform to
    generic_fls().  Drop the definition entirely.  ARM too benefits in the general
    case by using __builtin_ctz(), but less dramatically because it using
    optimised asm().
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/include/asm/bitops.h |  2 +-
 xen/arch/ppc/include/asm/bitops.h |  2 +-
 xen/arch/x86/include/asm/bitops.h |  3 ++-
 xen/common/Makefile               |  1 +
 xen/common/bitops.c               | 21 +++++++++++++++++++++
 xen/include/xen/bitops.h          | 17 +++++++++++++++++
 6 files changed, 43 insertions(+), 3 deletions(-)

diff --git a/xen/arch/arm/include/asm/bitops.h b/xen/arch/arm/include/asm/bitops.h
index 685abfafb2..3204d51af4 100644
--- a/xen/arch/arm/include/asm/bitops.h
+++ b/xen/arch/arm/include/asm/bitops.h
@@ -157,7 +157,7 @@ static inline int fls(unsigned int x)
 }
 
 
-#define ffs(x) ({ unsigned int __t = (x); fls(ISOLATE_LSB(__t)); })
+#define arch_ffs(x)  ((x) ? 1 + __builtin_ctz(x) : 0)
 #define ffsl(x) ({ unsigned long __t = (x); flsl(ISOLATE_LSB(__t)); })
 
 /**
diff --git a/xen/arch/ppc/include/asm/bitops.h b/xen/arch/ppc/include/asm/bitops.h
index c8b11326ad..f4946c82c6 100644
--- a/xen/arch/ppc/include/asm/bitops.h
+++ b/xen/arch/ppc/include/asm/bitops.h
@@ -173,7 +173,7 @@ static inline int __test_and_clear_bit(int nr, volatile void *addr)
 
 #define flsl(x) generic_flsl(x)
 #define fls(x) generic_flsl(x)
-#define ffs(x) ({ unsigned int t_ = (x); fls(t_ & -t_); })
+#define arch_ffs(x)  ((x) ? 1 + __builtin_ctz(x) : 0)
 #define ffsl(x) ({ unsigned long t_ = (x); flsl(t_ & -t_); })
 
 /**
diff --git a/xen/arch/x86/include/asm/bitops.h b/xen/arch/x86/include/asm/bitops.h
index 674c48397f..13e3730138 100644
--- a/xen/arch/x86/include/asm/bitops.h
+++ b/xen/arch/x86/include/asm/bitops.h
@@ -418,7 +418,7 @@ static inline int ffsl(unsigned long x)
     return (int)r+1;
 }
 
-static inline int ffs(unsigned int x)
+static always_inline unsigned int arch_ffs(unsigned int x)
 {
     int r;
 
@@ -428,6 +428,7 @@ static inline int ffs(unsigned int x)
           "1:" : "=r" (r) : "rm" (x));
     return r + 1;
 }
+#define arch_ffs arch_ffs
 
 /**
  * fls - find last bit set
diff --git a/xen/common/Makefile b/xen/common/Makefile
index d512cad524..f12a474d40 100644
--- a/xen/common/Makefile
+++ b/xen/common/Makefile
@@ -1,5 +1,6 @@
 obj-$(CONFIG_ARGO) += argo.o
 obj-y += bitmap.o
+obj-bin-$(CONFIG_SELF_TESTS) += bitops.init.o
 obj-$(CONFIG_GENERIC_BUG_FRAME) += bug.o
 obj-$(CONFIG_HYPFS_CONFIG) += config_data.o
 obj-$(CONFIG_CORE_PARKING) += core_parking.o
diff --git a/xen/common/bitops.c b/xen/common/bitops.c
new file mode 100644
index 0000000000..1d3323effc
--- /dev/null
+++ b/xen/common/bitops.c
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <xen/bitops.h>
+#include <xen/init.h>
+#include <xen/self-tests.h>
+
+static void __init test_ffs(void)
+{
+    /* unsigned int ffs(unsigned int) */
+    CHECK(ffs, 0, 0);
+    CHECK(ffs, 1, 1);
+    CHECK(ffs, 3, 1);
+    CHECK(ffs, 7, 1);
+    CHECK(ffs, 6, 2);
+    CHECK(ffs, 0x80000000U, 32);
+}
+
+static void __init __constructor test_bitops(void)
+{
+    test_ffs();
+}
diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h
index 218c346af2..5fb31e42e4 100644
--- a/xen/include/xen/bitops.h
+++ b/xen/include/xen/bitops.h
@@ -31,6 +31,23 @@ unsigned int __pure generic_flsl(unsigned long x);
 
 #include <asm/bitops.h>
 
+/*
+ * Find First/Last Set bit (all forms).
+ *
+ * Bits are labelled from 1.  Returns 0 if given 0.
+ */
+static always_inline __pure unsigned int ffs(unsigned int x)
+{
+    if ( __builtin_constant_p(x) )
+        return __builtin_ffs(x);
+
+#ifdef arch_ffs
+    return arch_ffs(x);
+#else
+    return generic_ffsl(x);
+#endif
+}
+
 /* --------------------- Please tidy below here --------------------- */
 
 #ifndef find_next_bit
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/bitops: Improve arch_ffs() in the general case
Message-Id: <E1sDDyC-0007e0-8F@xenbits.xenproject.org>
Date: Sat, 01 Jun 2024 01:55:44 +0000

commit 989e5f08d33e2642d25fd60d7b373d3d8ff39990
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Mar 14 23:31:11 2024 +0000
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Sat Jun 1 02:28:14 2024 +0100

    x86/bitops: Improve arch_ffs() in the general case
    
    The asm in arch_ffs() is safe but inefficient.
    
    CMOV would be an improvement over a conditional branch, but for 64bit CPUs
    both Intel and AMD have provided enough details about the behaviour for a zero
    input.  It is safe to pre-load the destination register with -1 and drop the
    conditional logic.
    
    However, it is common to find ffs() in a context where the optimiser knows
    that x is non-zero even if it the value isn't known precisely.  In this case,
    it's safe to drop the preload of -1 too.
    
    There are only a handful of uses of ffs() in the x86 build, and all of them
    improve as a result of this:
    
      add/remove: 0/0 grow/shrink: 0/4 up/down: 0/-92 (-92)
      Function                                     old     new   delta
      mask_write                                   121     113      -8
      xmem_pool_alloc                             1076    1056     -20
      test_bitops                                  390     358     -32
      pt_update_contig_markers                    1236    1204     -32
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/include/asm/bitops.h | 37 ++++++++++++++++++++++++++++++++-----
 1 file changed, 32 insertions(+), 5 deletions(-)

diff --git a/xen/arch/x86/include/asm/bitops.h b/xen/arch/x86/include/asm/bitops.h
index 13e3730138..a8e70d7ed7 100644
--- a/xen/arch/x86/include/asm/bitops.h
+++ b/xen/arch/x86/include/asm/bitops.h
@@ -420,12 +420,39 @@ static inline int ffsl(unsigned long x)
 
 static always_inline unsigned int arch_ffs(unsigned int x)
 {
-    int r;
+    unsigned int r;
+
+    if ( __builtin_constant_p(x > 0) && x > 0 )
+    {
+        /*
+         * A common code pattern is:
+         *
+         *     while ( bits )
+         *     {
+         *         bit = ffs(bits);
+         *         ...
+         *
+         * and the optimiser really can work with the knowledge of x being
+         * non-zero without knowing it's exact value, in which case we don't
+         * need to compensate for BSF's corner cases.  Otherwise...
+         */
+        asm ( "bsf %[val], %[res]"
+              : [res] "=r" (r)
+              : [val] "rm" (x) );
+    }
+    else
+    {
+        /*
+         * ... the AMD manual states that BSF won't modify the destination
+         * register if x=0.  The Intel manual states that the result is
+         * undefined, but the architects have said that the register is
+         * written back with it's old value (zero extended as normal).
+         */
+        asm ( "bsf %[val], %[res]"
+              : [res] "=r" (r)
+              : [val] "rm" (x), "[res]" (-1) );
+    }
 
-    asm ( "bsf %1,%0\n\t"
-          "jnz 1f\n\t"
-          "mov $-1,%0\n"
-          "1:" : "=r" (r) : "rm" (x));
     return r + 1;
 }
 #define arch_ffs arch_ffs
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/bitops: Implement ffsl() in common logic
Message-Id: <E1sDDyM-0007ep-BW@xenbits.xenproject.org>
Date: Sat, 01 Jun 2024 01:55:54 +0000

commit 5ed26fc0768d4759f0eabe118b37a6f610c5ca5c
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed Jan 31 18:31:16 2024 +0000
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Sat Jun 1 02:28:14 2024 +0100

    xen/bitops: Implement ffsl() in common logic
    
    ... just as with ffs() previously.  Express the upper bound of the testing in
    terms of BITS_PER_LONG as it varies between architectures.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/include/asm/bitops.h |  2 +-
 xen/arch/ppc/include/asm/bitops.h |  2 +-
 xen/arch/x86/include/asm/bitops.h | 35 ++++++++++++++++++-----------------
 xen/common/bitops.c               | 13 +++++++++++++
 xen/include/xen/bitops.h          | 12 ++++++++++++
 5 files changed, 45 insertions(+), 19 deletions(-)

diff --git a/xen/arch/arm/include/asm/bitops.h b/xen/arch/arm/include/asm/bitops.h
index 3204d51af4..d30ba44598 100644
--- a/xen/arch/arm/include/asm/bitops.h
+++ b/xen/arch/arm/include/asm/bitops.h
@@ -158,7 +158,7 @@ static inline int fls(unsigned int x)
 
 
 #define arch_ffs(x)  ((x) ? 1 + __builtin_ctz(x) : 0)
-#define ffsl(x) ({ unsigned long __t = (x); flsl(ISOLATE_LSB(__t)); })
+#define arch_ffsl(x) ((x) ? 1 + __builtin_ctzl(x) : 0)
 
 /**
  * hweightN - returns the hamming weight of a N-bit word
diff --git a/xen/arch/ppc/include/asm/bitops.h b/xen/arch/ppc/include/asm/bitops.h
index f4946c82c6..761361291e 100644
--- a/xen/arch/ppc/include/asm/bitops.h
+++ b/xen/arch/ppc/include/asm/bitops.h
@@ -174,7 +174,7 @@ static inline int __test_and_clear_bit(int nr, volatile void *addr)
 #define flsl(x) generic_flsl(x)
 #define fls(x) generic_flsl(x)
 #define arch_ffs(x)  ((x) ? 1 + __builtin_ctz(x) : 0)
-#define ffsl(x) ({ unsigned long t_ = (x); flsl(t_ & -t_); })
+#define arch_ffsl(x) ((x) ? 1 + __builtin_ctzl(x) : 0)
 
 /**
  * hweightN - returns the hamming weight of a N-bit word
diff --git a/xen/arch/x86/include/asm/bitops.h b/xen/arch/x86/include/asm/bitops.h
index a8e70d7ed7..90d892e1dd 100644
--- a/xen/arch/x86/include/asm/bitops.h
+++ b/xen/arch/x86/include/asm/bitops.h
@@ -401,23 +401,6 @@ static always_inline unsigned int __scanbit(unsigned long val, unsigned int max)
     r__;                                                                    \
 })
 
-/**
- * ffs - find first bit set
- * @x: the word to search
- *
- * This is defined the same way as the libc and compiler builtin ffs routines.
- */
-static inline int ffsl(unsigned long x)
-{
-    long r;
-
-    asm ( "bsf %1,%0\n\t"
-          "jnz 1f\n\t"
-          "mov $-1,%0\n"
-          "1:" : "=r" (r) : "rm" (x));
-    return (int)r+1;
-}
-
 static always_inline unsigned int arch_ffs(unsigned int x)
 {
     unsigned int r;
@@ -457,6 +440,24 @@ static always_inline unsigned int arch_ffs(unsigned int x)
 }
 #define arch_ffs arch_ffs
 
+static always_inline unsigned int arch_ffsl(unsigned long x)
+{
+    unsigned int r;
+
+    /* See arch_ffs() for safety discussions. */
+    if ( __builtin_constant_p(x > 0) && x > 0 )
+        asm ( "bsf %[val], %q[res]"
+              : [res] "=r" (r)
+              : [val] "rm" (x) );
+    else
+        asm ( "bsf %[val], %q[res]"
+              : [res] "=r" (r)
+              : [val] "rm" (x), "[res]" (-1) );
+
+    return r + 1;
+}
+#define arch_ffsl arch_ffsl
+
 /**
  * fls - find last bit set
  * @x: the word to search
diff --git a/xen/common/bitops.c b/xen/common/bitops.c
index 1d3323effc..df0e9bacbc 100644
--- a/xen/common/bitops.c
+++ b/xen/common/bitops.c
@@ -13,6 +13,19 @@ static void __init test_ffs(void)
     CHECK(ffs, 7, 1);
     CHECK(ffs, 6, 2);
     CHECK(ffs, 0x80000000U, 32);
+
+    /* unsigned int ffsl(unsigned long) */
+    CHECK(ffsl, 0, 0);
+    CHECK(ffsl, 1, 1);
+    CHECK(ffsl, 3, 1);
+    CHECK(ffsl, 7, 1);
+    CHECK(ffsl, 6, 2);
+
+    CHECK(ffsl, 1UL << (BITS_PER_LONG - 1), BITS_PER_LONG);
+#if BITS_PER_LONG > 32
+    CHECK(ffsl, 1UL << 32, 33);
+    CHECK(ffsl, 1UL << 63, 64);
+#endif
 }
 
 static void __init __constructor test_bitops(void)
diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h
index 5fb31e42e4..5aa8d7aa5a 100644
--- a/xen/include/xen/bitops.h
+++ b/xen/include/xen/bitops.h
@@ -48,6 +48,18 @@ static always_inline __pure unsigned int ffs(unsigned int x)
 #endif
 }
 
+static always_inline __pure unsigned int ffsl(unsigned long x)
+{
+    if ( __builtin_constant_p(x) )
+        return __builtin_ffsl(x);
+
+#ifdef arch_ffs
+    return arch_ffsl(x);
+#else
+    return generic_ffsl(x);
+#endif
+}
+
 /* --------------------- Please tidy below here --------------------- */
 
 #ifndef find_next_bit
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/bitops: Implement fls()/flsl() in common logic
Message-Id: <E1sDDyW-0007gI-Fl@xenbits.xenproject.org>
Date: Sat, 01 Jun 2024 01:56:04 +0000

commit 54b10ef6c810b3e0579b8efb6e5257d9f8969641
Author:     Oleksii Kurochko <oleksii.kurochko@gmail.com>
AuthorDate: Fri May 24 16:49:53 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Sat Jun 1 02:28:14 2024 +0100

    xen/bitops: Implement fls()/flsl() in common logic
    
    This is most easily done together because of how arm32 is currently
    structured, but it does just mirror the existing ffs()/ffsl() work.
    
    Introduce compile and boot time testing.
    
    Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/include/asm/arm32/bitops.h |  2 --
 xen/arch/arm/include/asm/arm64/bitops.h | 12 ---------
 xen/arch/arm/include/asm/bitops.h       | 19 ++------------
 xen/arch/ppc/include/asm/bitops.h       |  4 +--
 xen/arch/x86/include/asm/bitops.h       | 46 +++++++++++++++++++--------------
 xen/common/bitops.c                     | 25 ++++++++++++++++++
 xen/include/xen/bitops.h                | 24 +++++++++++++++++
 7 files changed, 80 insertions(+), 52 deletions(-)

diff --git a/xen/arch/arm/include/asm/arm32/bitops.h b/xen/arch/arm/include/asm/arm32/bitops.h
index d0309d47c1..0d7bb12d5c 100644
--- a/xen/arch/arm/include/asm/arm32/bitops.h
+++ b/xen/arch/arm/include/asm/arm32/bitops.h
@@ -1,8 +1,6 @@
 #ifndef _ARM_ARM32_BITOPS_H
 #define _ARM_ARM32_BITOPS_H
 
-#define flsl fls
-
 /*
  * Little endian assembly bitops.  nr = 0 -> byte 0 bit 0.
  */
diff --git a/xen/arch/arm/include/asm/arm64/bitops.h b/xen/arch/arm/include/asm/arm64/bitops.h
index 906d84e5f2..a6135838dc 100644
--- a/xen/arch/arm/include/asm/arm64/bitops.h
+++ b/xen/arch/arm/include/asm/arm64/bitops.h
@@ -1,18 +1,6 @@
 #ifndef _ARM_ARM64_BITOPS_H
 #define _ARM_ARM64_BITOPS_H
 
-static inline int flsl(unsigned long x)
-{
-        uint64_t ret;
-
-        if (__builtin_constant_p(x))
-               return generic_flsl(x);
-
-        asm("clz\t%0, %1" : "=r" (ret) : "r" (x));
-
-        return BITS_PER_LONG - ret;
-}
-
 /* Based on linux/include/asm-generic/bitops/find.h */
 
 #ifndef CONFIG_GENERIC_FIND_FIRST_BIT
diff --git a/xen/arch/arm/include/asm/bitops.h b/xen/arch/arm/include/asm/bitops.h
index d30ba44598..8f4bdc09d1 100644
--- a/xen/arch/arm/include/asm/bitops.h
+++ b/xen/arch/arm/include/asm/bitops.h
@@ -140,25 +140,10 @@ static inline int test_bit(int nr, const volatile void *addr)
         return 1UL & (p[BITOP_WORD(nr)] >> (nr & (BITOP_BITS_PER_WORD-1)));
 }
 
-/*
- * On ARMv5 and above those functions can be implemented around
- * the clz instruction for much better code efficiency.
- */
-
-static inline int fls(unsigned int x)
-{
-        int ret;
-
-        if (__builtin_constant_p(x))
-               return generic_flsl(x);
-
-        asm("clz\t%"__OP32"0, %"__OP32"1" : "=r" (ret) : "r" (x));
-        return 32 - ret;
-}
-
-
 #define arch_ffs(x)  ((x) ? 1 + __builtin_ctz(x) : 0)
 #define arch_ffsl(x) ((x) ? 1 + __builtin_ctzl(x) : 0)
+#define arch_fls(x)  ((x) ? 32 - __builtin_clz(x) : 0)
+#define arch_flsl(x) ((x) ? BITS_PER_LONG - __builtin_clzl(x) : 0)
 
 /**
  * hweightN - returns the hamming weight of a N-bit word
diff --git a/xen/arch/ppc/include/asm/bitops.h b/xen/arch/ppc/include/asm/bitops.h
index 761361291e..8119b5ace8 100644
--- a/xen/arch/ppc/include/asm/bitops.h
+++ b/xen/arch/ppc/include/asm/bitops.h
@@ -171,10 +171,10 @@ static inline int __test_and_clear_bit(int nr, volatile void *addr)
     return (old & mask) != 0;
 }
 
-#define flsl(x) generic_flsl(x)
-#define fls(x) generic_flsl(x)
 #define arch_ffs(x)  ((x) ? 1 + __builtin_ctz(x) : 0)
 #define arch_ffsl(x) ((x) ? 1 + __builtin_ctzl(x) : 0)
+#define arch_fls(x)  ((x) ? 32 - __builtin_clz(x) : 0)
+#define arch_flsl(x) ((x) ? BITS_PER_LONG - __builtin_clzl(x) : 0)
 
 /**
  * hweightN - returns the hamming weight of a N-bit word
diff --git a/xen/arch/x86/include/asm/bitops.h b/xen/arch/x86/include/asm/bitops.h
index 90d892e1dd..aa71542e7b 100644
--- a/xen/arch/x86/include/asm/bitops.h
+++ b/xen/arch/x86/include/asm/bitops.h
@@ -458,33 +458,41 @@ static always_inline unsigned int arch_ffsl(unsigned long x)
 }
 #define arch_ffsl arch_ffsl
 
-/**
- * fls - find last bit set
- * @x: the word to search
- *
- * This is defined the same way as ffs.
- */
-static inline int flsl(unsigned long x)
+static always_inline unsigned int arch_fls(unsigned int x)
 {
-    long r;
+    unsigned int r;
+
+    /* See arch_ffs() for safety discussions. */
+    if ( __builtin_constant_p(x > 0) && x > 0 )
+        asm ( "bsr %[val], %[res]"
+              : [res] "=r" (r)
+              : [val] "rm" (x) );
+    else
+        asm ( "bsr %[val], %[res]"
+              : [res] "=r" (r)
+              : [val] "rm" (x), "[res]" (-1) );
 
-    asm ( "bsr %1,%0\n\t"
-          "jnz 1f\n\t"
-          "mov $-1,%0\n"
-          "1:" : "=r" (r) : "rm" (x));
-    return (int)r+1;
+    return r + 1;
 }
+#define arch_fls arch_fls
 
-static inline int fls(unsigned int x)
+static always_inline unsigned int arch_flsl(unsigned long x)
 {
-    int r;
+    unsigned int r;
+
+    /* See arch_ffs() for safety discussions. */
+    if ( __builtin_constant_p(x > 0) && x > 0 )
+        asm ( "bsr %[val], %q[res]"
+              : [res] "=r" (r)
+              : [val] "rm" (x) );
+    else
+        asm ( "bsr %[val], %q[res]"
+              : [res] "=r" (r)
+              : [val] "rm" (x), "[res]" (-1) );
 
-    asm ( "bsr %1,%0\n\t"
-          "jnz 1f\n\t"
-          "mov $-1,%0\n"
-          "1:" : "=r" (r) : "rm" (x));
     return r + 1;
 }
+#define arch_flsl arch_flsl
 
 /**
  * hweightN - returns the hamming weight of a N-bit word
diff --git a/xen/common/bitops.c b/xen/common/bitops.c
index df0e9bacbc..0e1cc1f509 100644
--- a/xen/common/bitops.c
+++ b/xen/common/bitops.c
@@ -28,7 +28,32 @@ static void __init test_ffs(void)
 #endif
 }
 
+static void __init test_fls(void)
+{
+    /* unsigned int fls(unsigned int) */
+    CHECK(fls, 0, 0);
+    CHECK(fls, 1, 1);
+    CHECK(fls, 3, 2);
+    CHECK(fls, 7, 3);
+    CHECK(fls, 6, 3);
+    CHECK(fls, 0x80000000U, 32);
+
+    /* unsigned int flsl(unsigned long) */
+    CHECK(flsl, 0, 0);
+    CHECK(flsl, 1, 1);
+    CHECK(flsl, 3, 2);
+    CHECK(flsl, 7, 3);
+    CHECK(flsl, 6, 3);
+
+    CHECK(flsl, 1 | (1UL << (BITS_PER_LONG - 1)), BITS_PER_LONG);
+#if BITS_PER_LONG > 32
+    CHECK(flsl, 1 | (1UL << 32), 33);
+    CHECK(flsl, 1 | (1UL << 63), 64);
+#endif
+}
+
 static void __init __constructor test_bitops(void)
 {
     test_ffs();
+    test_fls();
 }
diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h
index 5aa8d7aa5a..9f8d9eff11 100644
--- a/xen/include/xen/bitops.h
+++ b/xen/include/xen/bitops.h
@@ -60,6 +60,30 @@ static always_inline __pure unsigned int ffsl(unsigned long x)
 #endif
 }
 
+static always_inline __pure unsigned int fls(unsigned int x)
+{
+    if ( __builtin_constant_p(x) )
+        return x ? 32 - __builtin_clz(x) : 0;
+
+#ifdef arch_fls
+    return arch_fls(x);
+#else
+    return generic_flsl(x);
+#endif
+}
+
+static always_inline __pure unsigned int flsl(unsigned long x)
+{
+    if ( __builtin_constant_p(x) )
+        return x ? BITS_PER_LONG - __builtin_clzl(x) : 0;
+
+#ifdef arch_fls
+    return arch_flsl(x);
+#else
+    return generic_flsl(x);
+#endif
+}
+
 /* --------------------- Please tidy below here --------------------- */
 
 #ifndef find_next_bit
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/bitops: Clean up ffs64()/fls64() definitions
Message-Id: <E1sDDyg-0007gu-J8@xenbits.xenproject.org>
Date: Sat, 01 Jun 2024 01:56:14 +0000

commit 04e70af5f240965ec0475caef813653e06782273
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Sat Mar 9 02:44:56 2024 +0000
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Sat Jun 1 02:28:14 2024 +0100

    xen/bitops: Clean up ffs64()/fls64() definitions
    
    Implement ffs64() and fls64() as plain static inlines, dropping the ifdefary
    and intermediate generic_f?s64() forms.
    
    Add tests for all interesting bit positions at 32bit boundaries.
    
    No functional change.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/common/bitops.c      | 32 ++++++++++++++++++++++++++++++++
 xen/include/xen/bitops.h | 42 ++++++++++++++++++++----------------------
 2 files changed, 52 insertions(+), 22 deletions(-)

diff --git a/xen/common/bitops.c b/xen/common/bitops.c
index 0e1cc1f509..94a8983af9 100644
--- a/xen/common/bitops.c
+++ b/xen/common/bitops.c
@@ -26,6 +26,22 @@ static void __init test_ffs(void)
     CHECK(ffsl, 1UL << 32, 33);
     CHECK(ffsl, 1UL << 63, 64);
 #endif
+
+    /*
+     * unsigned int ffs64(uint64_t)
+     *
+     * 32-bit builds of Xen have to split this into two adjacent operations,
+     * so test all interesting bit positions across the divide.
+     */
+    CHECK(ffs64, 0, 0);
+    CHECK(ffs64, 1, 1);
+    CHECK(ffs64, 3, 1);
+    CHECK(ffs64, 7, 1);
+    CHECK(ffs64, 6, 2);
+
+    CHECK(ffs64, 0x8000000080000000ULL, 32);
+    CHECK(ffs64, 0x8000000100000000ULL, 33);
+    CHECK(ffs64, 0x8000000000000000ULL, 64);
 }
 
 static void __init test_fls(void)
@@ -50,6 +66,22 @@ static void __init test_fls(void)
     CHECK(flsl, 1 | (1UL << 32), 33);
     CHECK(flsl, 1 | (1UL << 63), 64);
 #endif
+
+    /*
+     * unsigned int fls64(uint64_t)
+     *
+     * 32-bit builds of Xen have to split this into two adjacent operations,
+     * so test all interesting bit positions across the divide.
+     */
+    CHECK(fls64, 0, 0);
+    CHECK(fls64, 1, 1);
+    CHECK(fls64, 3, 2);
+    CHECK(fls64, 7, 3);
+    CHECK(fls64, 6, 3);
+
+    CHECK(fls64, 0x0000000080000001ULL, 32);
+    CHECK(fls64, 0x0000000100000001ULL, 33);
+    CHECK(fls64, 0x8000000000000001ULL, 64);
 }
 
 static void __init __constructor test_bitops(void)
diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h
index 9f8d9eff11..d216fead17 100644
--- a/xen/include/xen/bitops.h
+++ b/xen/include/xen/bitops.h
@@ -60,6 +60,14 @@ static always_inline __pure unsigned int ffsl(unsigned long x)
 #endif
 }
 
+static always_inline __pure unsigned int ffs64(uint64_t x)
+{
+    if ( BITS_PER_LONG == 64 )
+        return ffsl(x);
+    else
+        return !x || (uint32_t)x ? ffs(x) : ffs(x >> 32) + 32;
+}
+
 static always_inline __pure unsigned int fls(unsigned int x)
 {
     if ( __builtin_constant_p(x) )
@@ -84,6 +92,18 @@ static always_inline __pure unsigned int flsl(unsigned long x)
 #endif
 }
 
+static always_inline __pure unsigned int fls64(uint64_t x)
+{
+    if ( BITS_PER_LONG == 64 )
+        return flsl(x);
+    else
+    {
+        uint32_t h = x >> 32;
+
+        return h ? fls(h) + 32 : fls(x);
+    }
+}
+
 /* --------------------- Please tidy below here --------------------- */
 
 #ifndef find_next_bit
@@ -134,28 +154,6 @@ extern unsigned long find_first_zero_bit(const unsigned long *addr,
                                          unsigned long size);
 #endif
 
-#if BITS_PER_LONG == 64
-# define fls64 flsl
-# define ffs64 ffsl
-#else
-# ifndef ffs64
-static inline int generic_ffs64(__u64 x)
-{
-    return !x || (__u32)x ? ffs(x) : ffs(x >> 32) + 32;
-}
-#  define ffs64 generic_ffs64
-# endif
-# ifndef fls64
-static inline int generic_fls64(__u64 x)
-{
-    __u32 h = x >> 32;
-
-    return h ? fls(h) + 32 : fls(x);
-}
-#  define fls64 generic_fls64
-# endif
-#endif
-
 static inline int get_bitmask_order(unsigned int count)
 {
     int order;
--
generated by git-patchbot for /home/xen/git/xen.git#staging


From xen-changelog-bounces@lists.xenproject.org Sat Jun 01 01:56:26 2024
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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/bitops: Rearrange the top of xen/bitops.h
Message-Id: <E1sDDyq-0007hk-Lr@xenbits.xenproject.org>
Date: Sat, 01 Jun 2024 01:56:24 +0000

commit 5f7606c048f7cca1a4301b321af70791c1d22378
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Fri May 24 20:37:50 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Sat Jun 1 02:28:14 2024 +0100

    xen/bitops: Rearrange the top of xen/bitops.h
    
    The #include <asm/bitops.h> can move to the top of the file now now that
    generic_ffs()/generic_fls() have been untangled.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
    Release-acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/include/xen/bitops.h | 16 ++--------------
 1 file changed, 2 insertions(+), 14 deletions(-)

diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h
index d216fead17..6a5e28730a 100644
--- a/xen/include/xen/bitops.h
+++ b/xen/include/xen/bitops.h
@@ -4,6 +4,8 @@
 #include <xen/compiler.h>
 #include <xen/types.h>
 
+#include <asm/bitops.h>
+
 /*
  * Create a contiguous bitmask starting at bit position @l and ending at
  * position @h. For example GENMASK(30, 21) gives us 0x7fe00000ul.
@@ -22,20 +24,6 @@
 unsigned int __pure generic_ffsl(unsigned long x);
 unsigned int __pure generic_flsl(unsigned long x);
 
-/*
- * Include this here because some architectures need generic_ffs/fls in
- * scope
- */
-
-/* --------------------- Please tidy above here --------------------- */
-
-#include <asm/bitops.h>
-
-/*
- * Find First/Last Set bit (all forms).
- *
- * Bits are labelled from 1.  Returns 0 if given 0.
- */
 static always_inline __pure unsigned int ffs(unsigned int x)
 {
     if ( __builtin_constant_p(x) )
--
generated by git-patchbot for /home/xen/git/xen.git#staging


From xen-changelog-bounces@lists.xenproject.org Sat Jun 01 08:22:07 2024
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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] CI: Use a debug build of Xen for the Xilinx HW tests
Message-Id: <E1sDK01-00026w-FW@xenbits.xenproject.org>
Date: Sat, 01 Jun 2024 08:22:01 +0000

commit 2ff6d17bc37e6d8bc412436e8734ea868cea124d
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed May 29 14:20:39 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Fri May 31 22:03:30 2024 +0100

    CI: Use a debug build of Xen for the Xilinx HW tests
    
    ... like the other hardware tests.  This gets more value out of the testing.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Michal Orzel <michal.orzel@amd.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 automation/gitlab-ci/test.yaml | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml
index ad249fa0a5..902139e148 100644
--- a/automation/gitlab-ci/test.yaml
+++ b/automation/gitlab-ci/test.yaml
@@ -143,21 +143,21 @@ build-each-commit-gcc:
   tags:
     - x86_64
 
-xilinx-smoke-dom0less-arm64-gcc:
+xilinx-smoke-dom0less-arm64-gcc-debug:
   extends: .xilinx-arm64
   script:
     - ./automation/scripts/xilinx-smoke-dom0less-arm64.sh 2>&1 | tee ${LOGFILE}
   needs:
     - *arm64-test-needs
-    - alpine-3.18-gcc-arm64
+    - alpine-3.18-gcc-debug-arm64
 
-xilinx-smoke-dom0less-arm64-gcc-gem-passthrough:
+xilinx-smoke-dom0less-arm64-gcc-debug-gem-passthrough:
   extends: .xilinx-arm64
   script:
     - ./automation/scripts/xilinx-smoke-dom0less-arm64.sh gem-passthrough 2>&1 | tee ${LOGFILE}
   needs:
     - *arm64-test-needs
-    - alpine-3.18-gcc-arm64
+    - alpine-3.18-gcc-debug-arm64
 
 adl-smoke-x86-64-gcc-debug:
   extends: .adl-x86-64
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] CI: Improve serial handling in qemu-smoke-ppc64le.sh
Message-Id: <E1sDK0B-00028Q-JW@xenbits.xenproject.org>
Date: Sat, 01 Jun 2024 08:22:11 +0000

commit 16884ac6c88da7d964adfd5d14cae411193554d1
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed May 29 14:21:12 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Fri May 31 22:03:30 2024 +0100

    CI: Improve serial handling in qemu-smoke-ppc64le.sh
    
    Have PPC put serial to stdout like all other tests, so it shows up in the main
    job log.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 automation/scripts/qemu-smoke-ppc64le.sh | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/automation/scripts/qemu-smoke-ppc64le.sh b/automation/scripts/qemu-smoke-ppc64le.sh
index 2adbdac87e..701d81107d 100755
--- a/automation/scripts/qemu-smoke-ppc64le.sh
+++ b/automation/scripts/qemu-smoke-ppc64le.sh
@@ -2,15 +2,15 @@
 
 set -ex
 
+serial_log="$(pwd)/smoke.serial"
+
 # machine type from first arg passed directly to qemu -M
 machine=$1
 
 # Run the test
-rm -f smoke.serial
+rm -f ${serial_log}
 set +e
 
-touch smoke.serial
-
 timeout -k 1 20 \
 binaries/qemu-system-ppc64 \
     -bios binaries/skiboot.lid \
@@ -20,9 +20,10 @@ binaries/qemu-system-ppc64 \
     -vga none \
     -monitor none \
     -nographic \
-    -serial file:smoke.serial \
-    -kernel binaries/xen
+    -serial stdio \
+    -kernel binaries/xen \
+    |& tee ${serial_log} | sed 's/\r//'
 
 set -e
-(grep -q "Hello, ppc64le!" smoke.serial) || exit 1
+(grep -q "Hello, ppc64le!" ${serial_log}) || exit 1
 exit 0
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] arch/irq: Make irq_ack_none() mandatory
Message-Id: <E1sDK0L-00029Z-Ng@xenbits.xenproject.org>
Date: Sat, 01 Jun 2024 08:22:21 +0000

commit 8aeda4a241ab9bc3e891dce140218be953631718
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu May 30 19:00:45 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Fri May 31 22:03:30 2024 +0100

    arch/irq: Make irq_ack_none() mandatory
    
    Any non-stub implementation is going to have to do something here.
    
    The related hook irq_end_none() is more complicated and has arch-specific
    interactions with irq_ack_none(), so make it optional.
    
    For PPC, introduce a stub irq_ack_none().
    
    For ARM and x86, export the existing {ack,end}_none() helpers, gaining an irq_
    prefix for consisntency with everything else in no_irq_type.
    
    No functional change.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/include/asm/irq.h | 3 +++
 xen/arch/arm/irq.c             | 8 ++++----
 xen/arch/ppc/stubs.c           | 6 ++++++
 xen/arch/x86/irq.c             | 4 ++--
 xen/include/xen/irq.h          | 6 ++++++
 5 files changed, 21 insertions(+), 6 deletions(-)

diff --git a/xen/arch/arm/include/asm/irq.h b/xen/arch/arm/include/asm/irq.h
index 1bae538887..ec437add09 100644
--- a/xen/arch/arm/include/asm/irq.h
+++ b/xen/arch/arm/include/asm/irq.h
@@ -98,6 +98,9 @@ void irq_set_affinity(struct irq_desc *desc, const cpumask_t *mask);
  */
 bool irq_type_set_by_domain(const struct domain *d);
 
+void irq_end_none(struct irq_desc *irq);
+#define irq_end_none irq_end_none
+
 #endif /* _ASM_HW_IRQ_H */
 /*
  * Local variables:
diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c
index bcce80a4d6..7138f9e7c2 100644
--- a/xen/arch/arm/irq.c
+++ b/xen/arch/arm/irq.c
@@ -31,12 +31,12 @@ struct irq_guest
     unsigned int virq;
 };
 
-static void ack_none(struct irq_desc *irq)
+void irq_ack_none(struct irq_desc *irq)
 {
     printk("unexpected IRQ trap at irq %02x\n", irq->irq);
 }
 
-static void end_none(struct irq_desc *irq)
+void irq_end_none(struct irq_desc *irq)
 {
     /*
      * Still allow a CPU to end an interrupt if we receive a spurious
@@ -51,8 +51,8 @@ hw_irq_controller no_irq_type = {
     .shutdown = irq_shutdown_none,
     .enable = irq_enable_none,
     .disable = irq_disable_none,
-    .ack = ack_none,
-    .end = end_none
+    .ack = irq_ack_none,
+    .end = irq_end_none
 };
 
 static irq_desc_t irq_desc[NR_IRQS];
diff --git a/xen/arch/ppc/stubs.c b/xen/arch/ppc/stubs.c
index da193839bd..4e03428e07 100644
--- a/xen/arch/ppc/stubs.c
+++ b/xen/arch/ppc/stubs.c
@@ -134,12 +134,18 @@ void pirq_set_affinity(struct domain *d, int pirq, const cpumask_t *mask)
     BUG_ON("unimplemented");
 }
 
+void irq_ack_none(struct irq_desc *desc)
+{
+    BUG_ON("unimplemented");
+}
+
 hw_irq_controller no_irq_type = {
     .typename = "none",
     .startup = irq_startup_none,
     .shutdown = irq_shutdown_none,
     .enable = irq_enable_none,
     .disable = irq_disable_none,
+    .ack = irq_ack_none,
 };
 
 int arch_init_one_irq_desc(struct irq_desc *desc)
diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index c16205a9be..cfd7a08479 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -467,7 +467,7 @@ int __init init_irq_data(void)
     return 0;
 }
 
-static void cf_check ack_none(struct irq_desc *desc)
+void cf_check irq_ack_none(struct irq_desc *desc)
 {
     ack_bad_irq(desc->irq);
 }
@@ -478,7 +478,7 @@ hw_irq_controller no_irq_type = {
     irq_shutdown_none,
     irq_enable_none,
     irq_disable_none,
-    ack_none,
+    irq_ack_none,
 };
 
 static vmask_t *irq_get_used_vector_mask(int irq)
diff --git a/xen/include/xen/irq.h b/xen/include/xen/irq.h
index 89f7a8317a..8fa8ef2e50 100644
--- a/xen/include/xen/irq.h
+++ b/xen/include/xen/irq.h
@@ -130,6 +130,12 @@ void cf_check irq_actor_none(struct irq_desc *desc);
 #define irq_disable_none irq_actor_none
 #define irq_enable_none irq_actor_none
 
+/*
+ * irq_ack_none() must be provided by the architecture.
+ * irq_end_none() is optional, and opted into using a define.
+ */
+void cf_check irq_ack_none(struct irq_desc *irq);
+
 /*
  * Per-cpu interrupted context register state - the inner-most interrupt frame
  * on the stack.
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] arch/irq: Centralise no_irq_type
Message-Id: <E1sDK0V-0002A0-R6@xenbits.xenproject.org>
Date: Sat, 01 Jun 2024 08:22:31 +0000

commit 03147e6837ff045dbc328be876b9600f7040c771
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu May 30 18:58:18 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Fri May 31 22:03:30 2024 +0100

    arch/irq: Centralise no_irq_type
    
    Having no_irq_type defined per arch, but using common callbacks is a mess, and
    is particualrly hard to bootstrap a new architecture with.
    
    Now that the ack()/end() hooks have been exported suitably, move the
    definition of no_irq_type into common/irq.c, and make it const too for good
    measure.
    
    No functional change, but a whole lot less tangled.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/irq.c    | 10 ----------
 xen/arch/ppc/stubs.c  |  9 ---------
 xen/arch/x86/irq.c    |  9 ---------
 xen/common/irq.c      | 13 +++++++++++++
 xen/include/xen/irq.h |  2 +-
 5 files changed, 14 insertions(+), 29 deletions(-)

diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c
index 7138f9e7c2..e5fb26a3de 100644
--- a/xen/arch/arm/irq.c
+++ b/xen/arch/arm/irq.c
@@ -45,16 +45,6 @@ void irq_end_none(struct irq_desc *irq)
     gic_hw_ops->gic_host_irq_type->end(irq);
 }
 
-hw_irq_controller no_irq_type = {
-    .typename = "none",
-    .startup = irq_startup_none,
-    .shutdown = irq_shutdown_none,
-    .enable = irq_enable_none,
-    .disable = irq_disable_none,
-    .ack = irq_ack_none,
-    .end = irq_end_none
-};
-
 static irq_desc_t irq_desc[NR_IRQS];
 static DEFINE_PER_CPU(irq_desc_t[NR_LOCAL_IRQS], local_irq_desc);
 
diff --git a/xen/arch/ppc/stubs.c b/xen/arch/ppc/stubs.c
index 4e03428e07..923f0e7b20 100644
--- a/xen/arch/ppc/stubs.c
+++ b/xen/arch/ppc/stubs.c
@@ -139,15 +139,6 @@ void irq_ack_none(struct irq_desc *desc)
     BUG_ON("unimplemented");
 }
 
-hw_irq_controller no_irq_type = {
-    .typename = "none",
-    .startup = irq_startup_none,
-    .shutdown = irq_shutdown_none,
-    .enable = irq_enable_none,
-    .disable = irq_disable_none,
-    .ack = irq_ack_none,
-};
-
 int arch_init_one_irq_desc(struct irq_desc *desc)
 {
     BUG_ON("unimplemented");
diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index cfd7a08479..e36e06deaa 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -472,15 +472,6 @@ void cf_check irq_ack_none(struct irq_desc *desc)
     ack_bad_irq(desc->irq);
 }
 
-hw_irq_controller no_irq_type = {
-    "none",
-    irq_startup_none,
-    irq_shutdown_none,
-    irq_enable_none,
-    irq_disable_none,
-    irq_ack_none,
-};
-
 static vmask_t *irq_get_used_vector_mask(int irq)
 {
     vmask_t *ret = NULL;
diff --git a/xen/common/irq.c b/xen/common/irq.c
index 7225b46374..29729349a6 100644
--- a/xen/common/irq.c
+++ b/xen/common/irq.c
@@ -3,6 +3,19 @@
 
 DEFINE_PER_CPU(const struct cpu_user_regs *, irq_regs);
 
+const hw_irq_controller no_irq_type = {
+    .typename  = "none",
+    .startup   = irq_startup_none,
+    .shutdown  = irq_shutdown_none,
+    .enable    = irq_enable_none,
+    .disable   = irq_disable_none,
+    .ack       = irq_ack_none,
+
+#ifdef irq_end_none /* Hook is optional per arch */
+    .end       = irq_end_none,
+#endif
+};
+
 int init_one_irq_desc(struct irq_desc *desc)
 {
     int err;
diff --git a/xen/include/xen/irq.h b/xen/include/xen/irq.h
index 8fa8ef2e50..adf33547d2 100644
--- a/xen/include/xen/irq.h
+++ b/xen/include/xen/irq.h
@@ -122,7 +122,7 @@ extern int request_irq(unsigned int irq, unsigned int irqflags,
                void (*handler)(int irq, void *dev_id),
                const char *devname, void *dev_id);
 
-extern hw_irq_controller no_irq_type;
+extern const hw_irq_controller no_irq_type;
 void cf_check no_action(int cpl, void *dev_id);
 unsigned int cf_check irq_startup_none(struct irq_desc *desc);
 void cf_check irq_actor_none(struct irq_desc *desc);
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen: fix MISRA regressions on rule 20.9 and 20.12
Message-Id: <E1sDPxj-00006j-U4@xenbits.xenproject.org>
Date: Sat, 01 Jun 2024 14:44:03 +0000

commit c2d5e63c7380c7cb435d00211b512c53accb528e
Author:     Nicola Vetrini <nicola.vetrini@bugseng.com>
AuthorDate: Sat Jun 1 12:16:56 2024 +0200
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Sat Jun 1 15:32:13 2024 +0100

    xen: fix MISRA regressions on rule 20.9 and 20.12
    
    Commit ea59e7d780d9 ("xen/bitops: Cleanup and new infrastructure ahead of
    rearrangements") introduced new violations on previously clean rules 20.9 and
    20.12 (clean on ARM only, right now).
    
    The first is introduced because CONFIG_CC_IS_CLANG in xen/self-tests.h is not
    defined in the configuration under analysis. Using "defined()" instead avoids
    relying on the preprocessor's behaviour upon encountering an undedfined identifier
    and addresses the violation.
    
    The violation of Rule 20.12 is due to "val" being used both as an ordinary argument
    in macro RUNTIME_CHECK, and as a stringification operator.
    
    No functional change.
    
    Fixes: ea59e7d780d9 ("xen/bitops: Cleanup and new infrastructure ahead of rearrangements")
    Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
 automation/eclair_analysis/ECLAIR/deviations.ecl | 2 +-
 xen/include/xen/self-tests.h                     | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl
index cf62a874d9..447c1e6661 100644
--- a/automation/eclair_analysis/ECLAIR/deviations.ecl
+++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
@@ -473,7 +473,7 @@ deliberate."
 -doc_begin="Uses of a macro parameter for ordinary expansion and as an operand
 to the # or ## operators within the following macros are deliberate, to provide
 useful diagnostic messages to the user."
--config=MC3R1.R20.12,macros+={deliberate, "name(ASSERT||BUILD_BUG_ON||BUILD_BUG_ON_ZERO)"}
+-config=MC3R1.R20.12,macros+={deliberate, "name(ASSERT||BUILD_BUG_ON||BUILD_BUG_ON_ZERO||RUNTIME_CHECK)"}
 -doc_end
 
 -doc_begin="The helper macro GENERATE_CASE may use a macro parameter for ordinary
diff --git a/xen/include/xen/self-tests.h b/xen/include/xen/self-tests.h
index 8410db7aaa..42a4cc4d17 100644
--- a/xen/include/xen/self-tests.h
+++ b/xen/include/xen/self-tests.h
@@ -16,7 +16,7 @@
  * Clang < 8 can't fold constants through static inlines, causing this to
  * fail.  Simply skip it for incredibly old compilers.
  */
-#if !CONFIG_CC_IS_CLANG || CONFIG_CLANG_VERSION >= 80000
+#if !defined(CONFIG_CC_IS_CLANG) || CONFIG_CLANG_VERSION >= 80000
 #define COMPILE_CHECK(fn, val, res)                                     \
     do {                                                                \
         typeof(fn(val)) real = fn(val);                                 \
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/bitops: Delete find_first_set_bit()
Message-Id: <E1sDWAr-0006qw-RM@xenbits.xenproject.org>
Date: Sat, 01 Jun 2024 21:22:01 +0000

commit 1408cf7a2840c0839d988f8cbf910eecac1655ef
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Mar 14 20:38:44 2024 +0000
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Sat Jun 1 02:28:14 2024 +0100

    xen/bitops: Delete find_first_set_bit()
    
    No more users.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/include/asm/bitops.h | 12 ------------
 xen/arch/ppc/include/asm/bitops.h |  9 ---------
 xen/arch/x86/include/asm/bitops.h | 12 ------------
 3 files changed, 33 deletions(-)

diff --git a/xen/arch/arm/include/asm/bitops.h b/xen/arch/arm/include/asm/bitops.h
index ab030b6cb0..6c5ec34e66 100644
--- a/xen/arch/arm/include/asm/bitops.h
+++ b/xen/arch/arm/include/asm/bitops.h
@@ -160,18 +160,6 @@ static inline int fls(unsigned int x)
 #define ffs(x) ({ unsigned int __t = (x); fls(ISOLATE_LSB(__t)); })
 #define ffsl(x) ({ unsigned long __t = (x); flsl(ISOLATE_LSB(__t)); })
 
-/**
- * find_first_set_bit - find the first set bit in @word
- * @word: the word to search
- *
- * Returns the bit-number of the first set bit (first bit being 0).
- * The input must *not* be zero.
- */
-static inline unsigned int find_first_set_bit(unsigned long word)
-{
-        return ffsl(word) - 1;
-}
-
 /**
  * hweightN - returns the hamming weight of a N-bit word
  * @x: the word to weigh
diff --git a/xen/arch/ppc/include/asm/bitops.h b/xen/arch/ppc/include/asm/bitops.h
index bea655796d..f984789e28 100644
--- a/xen/arch/ppc/include/asm/bitops.h
+++ b/xen/arch/ppc/include/asm/bitops.h
@@ -187,13 +187,4 @@ static inline int __test_and_clear_bit(int nr, volatile void *addr)
 #define hweight16(x) __builtin_popcount((uint16_t)(x))
 #define hweight8(x)  __builtin_popcount((uint8_t)(x))
 
-/**
- * find_first_set_bit - find the first set bit in @word
- * @word: the word to search
- *
- * Returns the bit-number of the first set bit (first bit being 0).
- * The input must *not* be zero.
- */
-#define find_first_set_bit(x) (ffsl(x) - 1)
-
 #endif /* _ASM_PPC_BITOPS_H */
diff --git a/xen/arch/x86/include/asm/bitops.h b/xen/arch/x86/include/asm/bitops.h
index 5a71afbc89..674c48397f 100644
--- a/xen/arch/x86/include/asm/bitops.h
+++ b/xen/arch/x86/include/asm/bitops.h
@@ -401,18 +401,6 @@ static always_inline unsigned int __scanbit(unsigned long val, unsigned int max)
     r__;                                                                    \
 })
 
-/**
- * find_first_set_bit - find the first set bit in @word
- * @word: the word to search
- * 
- * Returns the bit-number of the first set bit. The input must *not* be zero.
- */
-static inline unsigned int find_first_set_bit(unsigned long word)
-{
-    asm ( "rep; bsf %1,%0" : "=r" (word) : "rm" (word) );
-    return (unsigned int)word;
-}
-
 /**
  * ffs - find first bit set
  * @x: the word to search
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/bitops: Cleanup and new infrastructure ahead of rearrangements
Message-Id: <E1sDWB1-0006rg-WA@xenbits.xenproject.org>
Date: Sat, 01 Jun 2024 21:22:11 +0000

commit ea59e7d780d9506793226b8cd1b402e341b195a7
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Fri Mar 8 23:45:08 2024 +0000
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Sat Jun 1 02:28:14 2024 +0100

    xen/bitops: Cleanup and new infrastructure ahead of rearrangements
    
     * Rename __attribute_pure__ to just __pure before it gains users.
     * Introduce __constructor which is going to be used in lib/, and is
       unconditionally cf_check.
     * Identify the areas of xen/bitops.h which are a mess.
     * Introduce xen/self-tests.h as helpers for compile and boot time testing.
       This provides a statement of the ABI, and a confirmation that arch-specific
       implementations behave as expected.
     * Introduce HIDE() in macros.h.  While it's only used in self-tests.h for
       now, we're going to consolidate similar constructs in due course.
    
    Sadly Clang 7 and older isn't happy with the compile time checks.  Skip them,
    and just rely on the runtime checks.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/include/xen/bitops.h     | 13 +++++++---
 xen/include/xen/compiler.h   |  3 ++-
 xen/include/xen/macros.h     |  8 +++++++
 xen/include/xen/self-tests.h | 56 ++++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 76 insertions(+), 4 deletions(-)

diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h
index e3c5a4ccf3..9b40f20381 100644
--- a/xen/include/xen/bitops.h
+++ b/xen/include/xen/bitops.h
@@ -1,5 +1,7 @@
-#ifndef _LINUX_BITOPS_H
-#define _LINUX_BITOPS_H
+#ifndef XEN_BITOPS_H
+#define XEN_BITOPS_H
+
+#include <xen/compiler.h>
 #include <xen/types.h>
 
 /*
@@ -103,8 +105,13 @@ static inline int generic_flsl(unsigned long x)
  * Include this here because some architectures need generic_ffs/fls in
  * scope
  */
+
+/* --------------------- Please tidy above here --------------------- */
+
 #include <asm/bitops.h>
 
+/* --------------------- Please tidy below here --------------------- */
+
 #ifndef find_next_bit
 /**
  * find_next_bit - find the next set bit in a memory region
@@ -294,4 +301,4 @@ static inline __u32 ror32(__u32 word, unsigned int shift)
 
 #define BIT_WORD(nr) ((nr) / BITS_PER_LONG)
 
-#endif
+#endif /* XEN_BITOPS_H */
diff --git a/xen/include/xen/compiler.h b/xen/include/xen/compiler.h
index 179ff23e62..444bf80142 100644
--- a/xen/include/xen/compiler.h
+++ b/xen/include/xen/compiler.h
@@ -86,7 +86,8 @@
 #define inline inline __init
 #endif
 
-#define __attribute_pure__  __attribute__((__pure__))
+#define __constructor       __attribute__((__constructor__)) cf_check
+#define __pure              __attribute__((__pure__))
 #define __attribute_const__ __attribute__((__const__))
 #define __transparent__     __attribute__((__transparent_union__))
 
diff --git a/xen/include/xen/macros.h b/xen/include/xen/macros.h
index e64373f018..ec89f4654f 100644
--- a/xen/include/xen/macros.h
+++ b/xen/include/xen/macros.h
@@ -59,6 +59,14 @@
 #define BUILD_BUG_ON(cond) ((void)BUILD_BUG_ON_ZERO(cond))
 #endif
 
+/* Hide a value from the optimiser. */
+#define HIDE(x)                                 \
+    ({                                          \
+        typeof(x) _x = (x);                     \
+        asm volatile ( "" : "+r" (_x) );        \
+        _x;                                     \
+    })
+
 #define ABS(x) ({                              \
     typeof(x) x_ = (x);                        \
     (x_ < 0) ? -x_ : x_;                       \
diff --git a/xen/include/xen/self-tests.h b/xen/include/xen/self-tests.h
new file mode 100644
index 0000000000..8410db7aaa
--- /dev/null
+++ b/xen/include/xen/self-tests.h
@@ -0,0 +1,56 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+/*
+ * Helpers for Xen self-tests of basic logic, including confirming that
+ * examples which should be calculated by the compiler are.
+ */
+#ifndef XEN_SELF_TESTS_H
+#define XEN_SELF_TESTS_H
+
+#include <xen/lib.h>
+
+/*
+ * Check that fn(val) can be calcuated by the compiler, and that it gives the
+ * expected answer.
+ *
+ * Clang < 8 can't fold constants through static inlines, causing this to
+ * fail.  Simply skip it for incredibly old compilers.
+ */
+#if !CONFIG_CC_IS_CLANG || CONFIG_CLANG_VERSION >= 80000
+#define COMPILE_CHECK(fn, val, res)                                     \
+    do {                                                                \
+        typeof(fn(val)) real = fn(val);                                 \
+                                                                        \
+        if ( !__builtin_constant_p(real) )                              \
+            asm ( ".error \"'" STR(fn(val)) "' not compile-time constant\"" ); \
+        else if ( real != res )                                         \
+            asm ( ".error \"Compile time check '" STR(fn(val) == res) "' failed\"" ); \
+    } while ( 0 )
+#else
+#define COMPILE_CHECK(fn, val, res)
+#endif
+
+/*
+ * Check that Xen's runtime logic for fn(val) gives the expected answer.  This
+ * requires using HIDE() to prevent the optimiser from collapsing the logic
+ * into a constant.
+ */
+#define RUNTIME_CHECK(fn, val, res)                     \
+    do {                                                \
+        typeof(fn(val)) real = fn(HIDE(val));           \
+                                                        \
+        if ( real != res )                              \
+            panic("%s: %s(%s) expected %u, got %u\n",   \
+                  __func__, #fn, #val, real, res);      \
+    } while ( 0 )
+
+/*
+ * Perform compile-time and runtime checks for fn(val) == res.
+ */
+#define CHECK(fn, val, res)                     \
+    do {                                        \
+        COMPILE_CHECK(fn, val, res);            \
+        RUNTIME_CHECK(fn, val, res);            \
+    } while ( 0 )
+
+#endif /* XEN_SELF_TESTS_H */
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/bitops: Implement generic_ffsl()/generic_flsl() in lib/
Message-Id: <E1sDWBC-0006sQ-3W@xenbits.xenproject.org>
Date: Sat, 01 Jun 2024 21:22:22 +0000

commit 95ddb7e9b00c1d3ce38930e631c8892b6a137759
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Fri May 24 13:36:25 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Sat Jun 1 02:28:14 2024 +0100

    xen/bitops: Implement generic_ffsl()/generic_flsl() in lib/
    
    generic_ffs()/generic_fls*( being static inline is the cause of lots of the
    complexity between the common and arch-specific bitops.h
    
    They appear to be static inline for constant-folding reasons (ARM), but there
    are better ways to achieve the same effect.
    
    It is presumptuous that an unrolled binary search is the right algorithm to
    use on all microarchitectures.  Indeed, it's not for the eventual users, but
    that can be addressed at a later point.
    
    It is also nonsense to implement the int form as the base primitive and
    construct the long form from 2x int in 64-bit builds, when it's just one extra
    step to operate at the native register width.
    
    Therefore, implement generic_ffsl()/generic_flsl() in lib/.  They're not
    actually needed in x86/ARM/PPC by the end of the cleanup (i.e. the functions
    will be dropped by the linker), and they're only expected be needed by RISC-V
    on hardware which lacks the Zbb extension.
    
    Implement generic_fls() in terms of generic_flsl() for now, but this will be
    cleaned up in due course.
    
    Provide basic runtime testing using __constructor inside the lib/ file.  This
    is important, as it means testing runs if and only if generic_f?sl() are used
    elsewhere in Xen.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/include/asm/bitops.h |  2 +-
 xen/arch/ppc/include/asm/bitops.h |  2 +-
 xen/include/xen/bitops.h          | 89 +++------------------------------------
 xen/lib/Makefile                  |  2 +
 xen/lib/generic-ffsl.c            | 67 +++++++++++++++++++++++++++++
 xen/lib/generic-flsl.c            | 70 ++++++++++++++++++++++++++++++
 6 files changed, 146 insertions(+), 86 deletions(-)

diff --git a/xen/arch/arm/include/asm/bitops.h b/xen/arch/arm/include/asm/bitops.h
index 6c5ec34e66..685abfafb2 100644
--- a/xen/arch/arm/include/asm/bitops.h
+++ b/xen/arch/arm/include/asm/bitops.h
@@ -150,7 +150,7 @@ static inline int fls(unsigned int x)
         int ret;
 
         if (__builtin_constant_p(x))
-               return generic_fls(x);
+               return generic_flsl(x);
 
         asm("clz\t%"__OP32"0, %"__OP32"1" : "=r" (ret) : "r" (x));
         return 32 - ret;
diff --git a/xen/arch/ppc/include/asm/bitops.h b/xen/arch/ppc/include/asm/bitops.h
index f984789e28..c8b11326ad 100644
--- a/xen/arch/ppc/include/asm/bitops.h
+++ b/xen/arch/ppc/include/asm/bitops.h
@@ -172,7 +172,7 @@ static inline int __test_and_clear_bit(int nr, volatile void *addr)
 }
 
 #define flsl(x) generic_flsl(x)
-#define fls(x) generic_fls(x)
+#define fls(x) generic_flsl(x)
 #define ffs(x) ({ unsigned int t_ = (x); fls(t_ & -t_); })
 #define ffsl(x) ({ unsigned long t_ = (x); flsl(t_ & -t_); })
 
diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h
index 9b40f20381..218c346af2 100644
--- a/xen/include/xen/bitops.h
+++ b/xen/include/xen/bitops.h
@@ -15,91 +15,12 @@
     (((~0ULL) << (l)) & (~0ULL >> (BITS_PER_LLONG - 1 - (h))))
 
 /*
- * ffs: find first bit set. This is defined the same way as
- * the libc and compiler builtin ffs routines, therefore
- * differs in spirit from the above ffz (man ffs).
- */
-
-static inline int generic_ffs(unsigned int x)
-{
-    int r = 1;
-
-    if (!x)
-        return 0;
-    if (!(x & 0xffff)) {
-        x >>= 16;
-        r += 16;
-    }
-    if (!(x & 0xff)) {
-        x >>= 8;
-        r += 8;
-    }
-    if (!(x & 0xf)) {
-        x >>= 4;
-        r += 4;
-    }
-    if (!(x & 3)) {
-        x >>= 2;
-        r += 2;
-    }
-    if (!(x & 1)) {
-        x >>= 1;
-        r += 1;
-    }
-    return r;
-}
-
-/*
- * fls: find last bit set.
+ * Find First/Last Set bit (all forms).
+ *
+ * Bits are labelled from 1.  Returns 0 if given 0.
  */
-
-static inline int generic_fls(unsigned int x)
-{
-    int r = 32;
-
-    if (!x)
-        return 0;
-    if (!(x & 0xffff0000u)) {
-        x <<= 16;
-        r -= 16;
-    }
-    if (!(x & 0xff000000u)) {
-        x <<= 8;
-        r -= 8;
-    }
-    if (!(x & 0xf0000000u)) {
-        x <<= 4;
-        r -= 4;
-    }
-    if (!(x & 0xc0000000u)) {
-        x <<= 2;
-        r -= 2;
-    }
-    if (!(x & 0x80000000u)) {
-        x <<= 1;
-        r -= 1;
-    }
-    return r;
-}
-
-#if BITS_PER_LONG == 64
-
-static inline int generic_ffsl(unsigned long x)
-{
-    return !x || (u32)x ? generic_ffs(x) : generic_ffs(x >> 32) + 32;
-}
-
-static inline int generic_flsl(unsigned long x)
-{
-    u32 h = x >> 32;
-
-    return h ? generic_fls(h) + 32 : generic_fls(x);
-}
-
-#else
-# define generic_ffsl generic_ffs
-# define generic_flsl generic_fls
-#endif
+unsigned int __pure generic_ffsl(unsigned long x);
+unsigned int __pure generic_flsl(unsigned long x);
 
 /*
  * Include this here because some architectures need generic_ffs/fls in
diff --git a/xen/lib/Makefile b/xen/lib/Makefile
index e63798e1d4..a485415964 100644
--- a/xen/lib/Makefile
+++ b/xen/lib/Makefile
@@ -4,6 +4,8 @@ lib-y += bsearch.o
 lib-y += ctors.o
 lib-y += ctype.o
 lib-y += find-next-bit.o
+lib-y += generic-ffsl.o
+lib-y += generic-flsl.o
 lib-y += list-sort.o
 lib-y += memchr.o
 lib-y += memchr_inv.o
diff --git a/xen/lib/generic-ffsl.c b/xen/lib/generic-ffsl.c
new file mode 100644
index 0000000000..c9fb34ffcd
--- /dev/null
+++ b/xen/lib/generic-ffsl.c
@@ -0,0 +1,67 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <xen/bitops.h>
+#include <xen/init.h>
+#include <xen/self-tests.h>
+
+unsigned int generic_ffsl(unsigned long x)
+{
+    unsigned int r = 1;
+
+    if ( !x )
+        return 0;
+
+    BUILD_BUG_ON(BITS_PER_LONG > 64); /* Extend me when necessary. */
+
+#if BITS_PER_LONG > 32
+    if ( !(x & 0xffffffffU) )
+    {
+        x >>= 32;
+        r += 32;
+    }
+#endif
+    if ( !(x & 0xffff) )
+    {
+        x >>= 16;
+        r += 16;
+    }
+    if ( !(x & 0xff) )
+    {
+        x >>= 8;
+        r += 8;
+    }
+    if ( !(x & 0xf) )
+    {
+        x >>= 4;
+        r += 4;
+    }
+    if ( !(x & 3) )
+    {
+        x >>= 2;
+        r += 2;
+    }
+    if ( !(x & 1) )
+    {
+        x >>= 1;
+        r += 1;
+    }
+
+    return r;
+}
+
+#ifdef CONFIG_SELF_TESTS
+static void __init __constructor test_generic_ffsl(void)
+{
+    RUNTIME_CHECK(generic_ffsl, 0, 0);
+    RUNTIME_CHECK(generic_ffsl, 1, 1);
+    RUNTIME_CHECK(generic_ffsl, 3, 1);
+    RUNTIME_CHECK(generic_ffsl, 7, 1);
+    RUNTIME_CHECK(generic_ffsl, 6, 2);
+
+    RUNTIME_CHECK(generic_ffsl, 1UL << (BITS_PER_LONG - 1), BITS_PER_LONG);
+#if BITS_PER_LONG > 32
+    RUNTIME_CHECK(generic_ffsl, 1UL << 32, 33);
+    RUNTIME_CHECK(generic_ffsl, 1UL << 63, 64);
+#endif
+}
+#endif /* CONFIG_SELF_TESTS */
diff --git a/xen/lib/generic-flsl.c b/xen/lib/generic-flsl.c
new file mode 100644
index 0000000000..8f44f670fb
--- /dev/null
+++ b/xen/lib/generic-flsl.c
@@ -0,0 +1,70 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <xen/bitops.h>
+#include <xen/init.h>
+#include <xen/self-tests.h>
+
+/* Mask of type UL with the upper x bits set. */
+#define UPPER_MASK(x) (~0UL << (BITS_PER_LONG - (x)))
+
+unsigned int generic_flsl(unsigned long x)
+{
+    unsigned int r = BITS_PER_LONG;
+
+    if ( !x )
+        return 0;
+
+    BUILD_BUG_ON(BITS_PER_LONG > 64); /* Extend me when necessary. */
+
+#if BITS_PER_LONG > 32
+    if ( !(x & UPPER_MASK(32)) )
+    {
+        x <<= 32;
+        r -= 32;
+    }
+#endif
+    if ( !(x & UPPER_MASK(16)) )
+    {
+        x <<= 16;
+        r -= 16;
+    }
+    if ( !(x & UPPER_MASK(8)) )
+    {
+        x <<= 8;
+        r -= 8;
+    }
+    if ( !(x & UPPER_MASK(4)) )
+    {
+        x <<= 4;
+        r -= 4;
+    }
+    if ( !(x & UPPER_MASK(2)) )
+    {
+        x <<= 2;
+        r -= 2;
+    }
+    if ( !(x & UPPER_MASK(1)) )
+    {
+        x <<= 1;
+        r -= 1;
+    }
+
+    return r;
+}
+
+#ifdef CONFIG_SELF_TESTS
+static void __init __constructor test_generic_flsl(void)
+{
+    RUNTIME_CHECK(generic_flsl, 0, 0);
+    RUNTIME_CHECK(generic_flsl, 1, 1);
+    RUNTIME_CHECK(generic_flsl, 3, 2);
+    RUNTIME_CHECK(generic_flsl, 7, 3);
+    RUNTIME_CHECK(generic_flsl, 6, 3);
+
+    RUNTIME_CHECK(generic_flsl, 1 | (1UL << (BITS_PER_LONG - 1)), BITS_PER_LONG);
+#if BITS_PER_LONG > 32
+    RUNTIME_CHECK(generic_flsl, 1 | (1UL << 32), 33);
+    RUNTIME_CHECK(generic_flsl, 1 | (1UL << 63), 64);
+#endif
+}
+#endif /* CONFIG_SELF_TESTS */
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/bitops: Implement ffs() in common logic
Message-Id: <E1sDWBM-0006sr-7A@xenbits.xenproject.org>
Date: Sat, 01 Jun 2024 21:22:32 +0000

commit ef1dd8dff438444747997ae78b4dfa87b5fb9157
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed Jan 31 18:31:16 2024 +0000
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Sat Jun 1 02:28:14 2024 +0100

    xen/bitops: Implement ffs() in common logic
    
    Perform constant-folding unconditionally, rather than having it implemented
    inconsistency between architectures.
    
    Confirm the expected behaviour with compile time and boot time tests.
    
    For non-constant inputs, use arch_ffs() if provided but fall back to
    generic_ffsl() if not.  In particular, RISC-V doesn't have a builtin that
    works in all configurations.
    
    For x86, rename ffs() to arch_ffs() and adjust the prototype.
    
    For PPC, __builtin_ctz() is 1/3 of the size of size of the transform to
    generic_fls().  Drop the definition entirely.  ARM too benefits in the general
    case by using __builtin_ctz(), but less dramatically because it using
    optimised asm().
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/include/asm/bitops.h |  2 +-
 xen/arch/ppc/include/asm/bitops.h |  2 +-
 xen/arch/x86/include/asm/bitops.h |  3 ++-
 xen/common/Makefile               |  1 +
 xen/common/bitops.c               | 21 +++++++++++++++++++++
 xen/include/xen/bitops.h          | 17 +++++++++++++++++
 6 files changed, 43 insertions(+), 3 deletions(-)

diff --git a/xen/arch/arm/include/asm/bitops.h b/xen/arch/arm/include/asm/bitops.h
index 685abfafb2..3204d51af4 100644
--- a/xen/arch/arm/include/asm/bitops.h
+++ b/xen/arch/arm/include/asm/bitops.h
@@ -157,7 +157,7 @@ static inline int fls(unsigned int x)
 }
 
 
-#define ffs(x) ({ unsigned int __t = (x); fls(ISOLATE_LSB(__t)); })
+#define arch_ffs(x)  ((x) ? 1 + __builtin_ctz(x) : 0)
 #define ffsl(x) ({ unsigned long __t = (x); flsl(ISOLATE_LSB(__t)); })
 
 /**
diff --git a/xen/arch/ppc/include/asm/bitops.h b/xen/arch/ppc/include/asm/bitops.h
index c8b11326ad..f4946c82c6 100644
--- a/xen/arch/ppc/include/asm/bitops.h
+++ b/xen/arch/ppc/include/asm/bitops.h
@@ -173,7 +173,7 @@ static inline int __test_and_clear_bit(int nr, volatile void *addr)
 
 #define flsl(x) generic_flsl(x)
 #define fls(x) generic_flsl(x)
-#define ffs(x) ({ unsigned int t_ = (x); fls(t_ & -t_); })
+#define arch_ffs(x)  ((x) ? 1 + __builtin_ctz(x) : 0)
 #define ffsl(x) ({ unsigned long t_ = (x); flsl(t_ & -t_); })
 
 /**
diff --git a/xen/arch/x86/include/asm/bitops.h b/xen/arch/x86/include/asm/bitops.h
index 674c48397f..13e3730138 100644
--- a/xen/arch/x86/include/asm/bitops.h
+++ b/xen/arch/x86/include/asm/bitops.h
@@ -418,7 +418,7 @@ static inline int ffsl(unsigned long x)
     return (int)r+1;
 }
 
-static inline int ffs(unsigned int x)
+static always_inline unsigned int arch_ffs(unsigned int x)
 {
     int r;
 
@@ -428,6 +428,7 @@ static inline int ffs(unsigned int x)
           "1:" : "=r" (r) : "rm" (x));
     return r + 1;
 }
+#define arch_ffs arch_ffs
 
 /**
  * fls - find last bit set
diff --git a/xen/common/Makefile b/xen/common/Makefile
index d512cad524..f12a474d40 100644
--- a/xen/common/Makefile
+++ b/xen/common/Makefile
@@ -1,5 +1,6 @@
 obj-$(CONFIG_ARGO) += argo.o
 obj-y += bitmap.o
+obj-bin-$(CONFIG_SELF_TESTS) += bitops.init.o
 obj-$(CONFIG_GENERIC_BUG_FRAME) += bug.o
 obj-$(CONFIG_HYPFS_CONFIG) += config_data.o
 obj-$(CONFIG_CORE_PARKING) += core_parking.o
diff --git a/xen/common/bitops.c b/xen/common/bitops.c
new file mode 100644
index 0000000000..1d3323effc
--- /dev/null
+++ b/xen/common/bitops.c
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <xen/bitops.h>
+#include <xen/init.h>
+#include <xen/self-tests.h>
+
+static void __init test_ffs(void)
+{
+    /* unsigned int ffs(unsigned int) */
+    CHECK(ffs, 0, 0);
+    CHECK(ffs, 1, 1);
+    CHECK(ffs, 3, 1);
+    CHECK(ffs, 7, 1);
+    CHECK(ffs, 6, 2);
+    CHECK(ffs, 0x80000000U, 32);
+}
+
+static void __init __constructor test_bitops(void)
+{
+    test_ffs();
+}
diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h
index 218c346af2..5fb31e42e4 100644
--- a/xen/include/xen/bitops.h
+++ b/xen/include/xen/bitops.h
@@ -31,6 +31,23 @@ unsigned int __pure generic_flsl(unsigned long x);
 
 #include <asm/bitops.h>
 
+/*
+ * Find First/Last Set bit (all forms).
+ *
+ * Bits are labelled from 1.  Returns 0 if given 0.
+ */
+static always_inline __pure unsigned int ffs(unsigned int x)
+{
+    if ( __builtin_constant_p(x) )
+        return __builtin_ffs(x);
+
+#ifdef arch_ffs
+    return arch_ffs(x);
+#else
+    return generic_ffsl(x);
+#endif
+}
+
 /* --------------------- Please tidy below here --------------------- */
 
 #ifndef find_next_bit
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/bitops: Improve arch_ffs() in the general case
Message-Id: <E1sDWBW-0006tI-AK@xenbits.xenproject.org>
Date: Sat, 01 Jun 2024 21:22:42 +0000

commit 989e5f08d33e2642d25fd60d7b373d3d8ff39990
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Mar 14 23:31:11 2024 +0000
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Sat Jun 1 02:28:14 2024 +0100

    x86/bitops: Improve arch_ffs() in the general case
    
    The asm in arch_ffs() is safe but inefficient.
    
    CMOV would be an improvement over a conditional branch, but for 64bit CPUs
    both Intel and AMD have provided enough details about the behaviour for a zero
    input.  It is safe to pre-load the destination register with -1 and drop the
    conditional logic.
    
    However, it is common to find ffs() in a context where the optimiser knows
    that x is non-zero even if it the value isn't known precisely.  In this case,
    it's safe to drop the preload of -1 too.
    
    There are only a handful of uses of ffs() in the x86 build, and all of them
    improve as a result of this:
    
      add/remove: 0/0 grow/shrink: 0/4 up/down: 0/-92 (-92)
      Function                                     old     new   delta
      mask_write                                   121     113      -8
      xmem_pool_alloc                             1076    1056     -20
      test_bitops                                  390     358     -32
      pt_update_contig_markers                    1236    1204     -32
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/include/asm/bitops.h | 37 ++++++++++++++++++++++++++++++++-----
 1 file changed, 32 insertions(+), 5 deletions(-)

diff --git a/xen/arch/x86/include/asm/bitops.h b/xen/arch/x86/include/asm/bitops.h
index 13e3730138..a8e70d7ed7 100644
--- a/xen/arch/x86/include/asm/bitops.h
+++ b/xen/arch/x86/include/asm/bitops.h
@@ -420,12 +420,39 @@ static inline int ffsl(unsigned long x)
 
 static always_inline unsigned int arch_ffs(unsigned int x)
 {
-    int r;
+    unsigned int r;
+
+    if ( __builtin_constant_p(x > 0) && x > 0 )
+    {
+        /*
+         * A common code pattern is:
+         *
+         *     while ( bits )
+         *     {
+         *         bit = ffs(bits);
+         *         ...
+         *
+         * and the optimiser really can work with the knowledge of x being
+         * non-zero without knowing it's exact value, in which case we don't
+         * need to compensate for BSF's corner cases.  Otherwise...
+         */
+        asm ( "bsf %[val], %[res]"
+              : [res] "=r" (r)
+              : [val] "rm" (x) );
+    }
+    else
+    {
+        /*
+         * ... the AMD manual states that BSF won't modify the destination
+         * register if x=0.  The Intel manual states that the result is
+         * undefined, but the architects have said that the register is
+         * written back with it's old value (zero extended as normal).
+         */
+        asm ( "bsf %[val], %[res]"
+              : [res] "=r" (r)
+              : [val] "rm" (x), "[res]" (-1) );
+    }
 
-    asm ( "bsf %1,%0\n\t"
-          "jnz 1f\n\t"
-          "mov $-1,%0\n"
-          "1:" : "=r" (r) : "rm" (x));
     return r + 1;
 }
 #define arch_ffs arch_ffs
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/bitops: Implement ffsl() in common logic
Message-Id: <E1sDWBg-0006ts-DW@xenbits.xenproject.org>
Date: Sat, 01 Jun 2024 21:22:52 +0000

commit 5ed26fc0768d4759f0eabe118b37a6f610c5ca5c
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed Jan 31 18:31:16 2024 +0000
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Sat Jun 1 02:28:14 2024 +0100

    xen/bitops: Implement ffsl() in common logic
    
    ... just as with ffs() previously.  Express the upper bound of the testing in
    terms of BITS_PER_LONG as it varies between architectures.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/include/asm/bitops.h |  2 +-
 xen/arch/ppc/include/asm/bitops.h |  2 +-
 xen/arch/x86/include/asm/bitops.h | 35 ++++++++++++++++++-----------------
 xen/common/bitops.c               | 13 +++++++++++++
 xen/include/xen/bitops.h          | 12 ++++++++++++
 5 files changed, 45 insertions(+), 19 deletions(-)

diff --git a/xen/arch/arm/include/asm/bitops.h b/xen/arch/arm/include/asm/bitops.h
index 3204d51af4..d30ba44598 100644
--- a/xen/arch/arm/include/asm/bitops.h
+++ b/xen/arch/arm/include/asm/bitops.h
@@ -158,7 +158,7 @@ static inline int fls(unsigned int x)
 
 
 #define arch_ffs(x)  ((x) ? 1 + __builtin_ctz(x) : 0)
-#define ffsl(x) ({ unsigned long __t = (x); flsl(ISOLATE_LSB(__t)); })
+#define arch_ffsl(x) ((x) ? 1 + __builtin_ctzl(x) : 0)
 
 /**
  * hweightN - returns the hamming weight of a N-bit word
diff --git a/xen/arch/ppc/include/asm/bitops.h b/xen/arch/ppc/include/asm/bitops.h
index f4946c82c6..761361291e 100644
--- a/xen/arch/ppc/include/asm/bitops.h
+++ b/xen/arch/ppc/include/asm/bitops.h
@@ -174,7 +174,7 @@ static inline int __test_and_clear_bit(int nr, volatile void *addr)
 #define flsl(x) generic_flsl(x)
 #define fls(x) generic_flsl(x)
 #define arch_ffs(x)  ((x) ? 1 + __builtin_ctz(x) : 0)
-#define ffsl(x) ({ unsigned long t_ = (x); flsl(t_ & -t_); })
+#define arch_ffsl(x) ((x) ? 1 + __builtin_ctzl(x) : 0)
 
 /**
  * hweightN - returns the hamming weight of a N-bit word
diff --git a/xen/arch/x86/include/asm/bitops.h b/xen/arch/x86/include/asm/bitops.h
index a8e70d7ed7..90d892e1dd 100644
--- a/xen/arch/x86/include/asm/bitops.h
+++ b/xen/arch/x86/include/asm/bitops.h
@@ -401,23 +401,6 @@ static always_inline unsigned int __scanbit(unsigned long val, unsigned int max)
     r__;                                                                    \
 })
 
-/**
- * ffs - find first bit set
- * @x: the word to search
- *
- * This is defined the same way as the libc and compiler builtin ffs routines.
- */
-static inline int ffsl(unsigned long x)
-{
-    long r;
-
-    asm ( "bsf %1,%0\n\t"
-          "jnz 1f\n\t"
-          "mov $-1,%0\n"
-          "1:" : "=r" (r) : "rm" (x));
-    return (int)r+1;
-}
-
 static always_inline unsigned int arch_ffs(unsigned int x)
 {
     unsigned int r;
@@ -457,6 +440,24 @@ static always_inline unsigned int arch_ffs(unsigned int x)
 }
 #define arch_ffs arch_ffs
 
+static always_inline unsigned int arch_ffsl(unsigned long x)
+{
+    unsigned int r;
+
+    /* See arch_ffs() for safety discussions. */
+    if ( __builtin_constant_p(x > 0) && x > 0 )
+        asm ( "bsf %[val], %q[res]"
+              : [res] "=r" (r)
+              : [val] "rm" (x) );
+    else
+        asm ( "bsf %[val], %q[res]"
+              : [res] "=r" (r)
+              : [val] "rm" (x), "[res]" (-1) );
+
+    return r + 1;
+}
+#define arch_ffsl arch_ffsl
+
 /**
  * fls - find last bit set
  * @x: the word to search
diff --git a/xen/common/bitops.c b/xen/common/bitops.c
index 1d3323effc..df0e9bacbc 100644
--- a/xen/common/bitops.c
+++ b/xen/common/bitops.c
@@ -13,6 +13,19 @@ static void __init test_ffs(void)
     CHECK(ffs, 7, 1);
     CHECK(ffs, 6, 2);
     CHECK(ffs, 0x80000000U, 32);
+
+    /* unsigned int ffsl(unsigned long) */
+    CHECK(ffsl, 0, 0);
+    CHECK(ffsl, 1, 1);
+    CHECK(ffsl, 3, 1);
+    CHECK(ffsl, 7, 1);
+    CHECK(ffsl, 6, 2);
+
+    CHECK(ffsl, 1UL << (BITS_PER_LONG - 1), BITS_PER_LONG);
+#if BITS_PER_LONG > 32
+    CHECK(ffsl, 1UL << 32, 33);
+    CHECK(ffsl, 1UL << 63, 64);
+#endif
 }
 
 static void __init __constructor test_bitops(void)
diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h
index 5fb31e42e4..5aa8d7aa5a 100644
--- a/xen/include/xen/bitops.h
+++ b/xen/include/xen/bitops.h
@@ -48,6 +48,18 @@ static always_inline __pure unsigned int ffs(unsigned int x)
 #endif
 }
 
+static always_inline __pure unsigned int ffsl(unsigned long x)
+{
+    if ( __builtin_constant_p(x) )
+        return __builtin_ffsl(x);
+
+#ifdef arch_ffs
+    return arch_ffsl(x);
+#else
+    return generic_ffsl(x);
+#endif
+}
+
 /* --------------------- Please tidy below here --------------------- */
 
 #ifndef find_next_bit
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
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Subject: [xen master] xen/bitops: Implement fls()/flsl() in common logic
Message-Id: <E1sDWBq-0006uS-HC@xenbits.xenproject.org>
Date: Sat, 01 Jun 2024 21:23:02 +0000

commit 54b10ef6c810b3e0579b8efb6e5257d9f8969641
Author:     Oleksii Kurochko <oleksii.kurochko@gmail.com>
AuthorDate: Fri May 24 16:49:53 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Sat Jun 1 02:28:14 2024 +0100

    xen/bitops: Implement fls()/flsl() in common logic
    
    This is most easily done together because of how arm32 is currently
    structured, but it does just mirror the existing ffs()/ffsl() work.
    
    Introduce compile and boot time testing.
    
    Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/include/asm/arm32/bitops.h |  2 --
 xen/arch/arm/include/asm/arm64/bitops.h | 12 ---------
 xen/arch/arm/include/asm/bitops.h       | 19 ++------------
 xen/arch/ppc/include/asm/bitops.h       |  4 +--
 xen/arch/x86/include/asm/bitops.h       | 46 +++++++++++++++++++--------------
 xen/common/bitops.c                     | 25 ++++++++++++++++++
 xen/include/xen/bitops.h                | 24 +++++++++++++++++
 7 files changed, 80 insertions(+), 52 deletions(-)

diff --git a/xen/arch/arm/include/asm/arm32/bitops.h b/xen/arch/arm/include/asm/arm32/bitops.h
index d0309d47c1..0d7bb12d5c 100644
--- a/xen/arch/arm/include/asm/arm32/bitops.h
+++ b/xen/arch/arm/include/asm/arm32/bitops.h
@@ -1,8 +1,6 @@
 #ifndef _ARM_ARM32_BITOPS_H
 #define _ARM_ARM32_BITOPS_H
 
-#define flsl fls
-
 /*
  * Little endian assembly bitops.  nr = 0 -> byte 0 bit 0.
  */
diff --git a/xen/arch/arm/include/asm/arm64/bitops.h b/xen/arch/arm/include/asm/arm64/bitops.h
index 906d84e5f2..a6135838dc 100644
--- a/xen/arch/arm/include/asm/arm64/bitops.h
+++ b/xen/arch/arm/include/asm/arm64/bitops.h
@@ -1,18 +1,6 @@
 #ifndef _ARM_ARM64_BITOPS_H
 #define _ARM_ARM64_BITOPS_H
 
-static inline int flsl(unsigned long x)
-{
-        uint64_t ret;
-
-        if (__builtin_constant_p(x))
-               return generic_flsl(x);
-
-        asm("clz\t%0, %1" : "=r" (ret) : "r" (x));
-
-        return BITS_PER_LONG - ret;
-}
-
 /* Based on linux/include/asm-generic/bitops/find.h */
 
 #ifndef CONFIG_GENERIC_FIND_FIRST_BIT
diff --git a/xen/arch/arm/include/asm/bitops.h b/xen/arch/arm/include/asm/bitops.h
index d30ba44598..8f4bdc09d1 100644
--- a/xen/arch/arm/include/asm/bitops.h
+++ b/xen/arch/arm/include/asm/bitops.h
@@ -140,25 +140,10 @@ static inline int test_bit(int nr, const volatile void *addr)
         return 1UL & (p[BITOP_WORD(nr)] >> (nr & (BITOP_BITS_PER_WORD-1)));
 }
 
-/*
- * On ARMv5 and above those functions can be implemented around
- * the clz instruction for much better code efficiency.
- */
-
-static inline int fls(unsigned int x)
-{
-        int ret;
-
-        if (__builtin_constant_p(x))
-               return generic_flsl(x);
-
-        asm("clz\t%"__OP32"0, %"__OP32"1" : "=r" (ret) : "r" (x));
-        return 32 - ret;
-}
-
-
 #define arch_ffs(x)  ((x) ? 1 + __builtin_ctz(x) : 0)
 #define arch_ffsl(x) ((x) ? 1 + __builtin_ctzl(x) : 0)
+#define arch_fls(x)  ((x) ? 32 - __builtin_clz(x) : 0)
+#define arch_flsl(x) ((x) ? BITS_PER_LONG - __builtin_clzl(x) : 0)
 
 /**
  * hweightN - returns the hamming weight of a N-bit word
diff --git a/xen/arch/ppc/include/asm/bitops.h b/xen/arch/ppc/include/asm/bitops.h
index 761361291e..8119b5ace8 100644
--- a/xen/arch/ppc/include/asm/bitops.h
+++ b/xen/arch/ppc/include/asm/bitops.h
@@ -171,10 +171,10 @@ static inline int __test_and_clear_bit(int nr, volatile void *addr)
     return (old & mask) != 0;
 }
 
-#define flsl(x) generic_flsl(x)
-#define fls(x) generic_flsl(x)
 #define arch_ffs(x)  ((x) ? 1 + __builtin_ctz(x) : 0)
 #define arch_ffsl(x) ((x) ? 1 + __builtin_ctzl(x) : 0)
+#define arch_fls(x)  ((x) ? 32 - __builtin_clz(x) : 0)
+#define arch_flsl(x) ((x) ? BITS_PER_LONG - __builtin_clzl(x) : 0)
 
 /**
  * hweightN - returns the hamming weight of a N-bit word
diff --git a/xen/arch/x86/include/asm/bitops.h b/xen/arch/x86/include/asm/bitops.h
index 90d892e1dd..aa71542e7b 100644
--- a/xen/arch/x86/include/asm/bitops.h
+++ b/xen/arch/x86/include/asm/bitops.h
@@ -458,33 +458,41 @@ static always_inline unsigned int arch_ffsl(unsigned long x)
 }
 #define arch_ffsl arch_ffsl
 
-/**
- * fls - find last bit set
- * @x: the word to search
- *
- * This is defined the same way as ffs.
- */
-static inline int flsl(unsigned long x)
+static always_inline unsigned int arch_fls(unsigned int x)
 {
-    long r;
+    unsigned int r;
+
+    /* See arch_ffs() for safety discussions. */
+    if ( __builtin_constant_p(x > 0) && x > 0 )
+        asm ( "bsr %[val], %[res]"
+              : [res] "=r" (r)
+              : [val] "rm" (x) );
+    else
+        asm ( "bsr %[val], %[res]"
+              : [res] "=r" (r)
+              : [val] "rm" (x), "[res]" (-1) );
 
-    asm ( "bsr %1,%0\n\t"
-          "jnz 1f\n\t"
-          "mov $-1,%0\n"
-          "1:" : "=r" (r) : "rm" (x));
-    return (int)r+1;
+    return r + 1;
 }
+#define arch_fls arch_fls
 
-static inline int fls(unsigned int x)
+static always_inline unsigned int arch_flsl(unsigned long x)
 {
-    int r;
+    unsigned int r;
+
+    /* See arch_ffs() for safety discussions. */
+    if ( __builtin_constant_p(x > 0) && x > 0 )
+        asm ( "bsr %[val], %q[res]"
+              : [res] "=r" (r)
+              : [val] "rm" (x) );
+    else
+        asm ( "bsr %[val], %q[res]"
+              : [res] "=r" (r)
+              : [val] "rm" (x), "[res]" (-1) );
 
-    asm ( "bsr %1,%0\n\t"
-          "jnz 1f\n\t"
-          "mov $-1,%0\n"
-          "1:" : "=r" (r) : "rm" (x));
     return r + 1;
 }
+#define arch_flsl arch_flsl
 
 /**
  * hweightN - returns the hamming weight of a N-bit word
diff --git a/xen/common/bitops.c b/xen/common/bitops.c
index df0e9bacbc..0e1cc1f509 100644
--- a/xen/common/bitops.c
+++ b/xen/common/bitops.c
@@ -28,7 +28,32 @@ static void __init test_ffs(void)
 #endif
 }
 
+static void __init test_fls(void)
+{
+    /* unsigned int fls(unsigned int) */
+    CHECK(fls, 0, 0);
+    CHECK(fls, 1, 1);
+    CHECK(fls, 3, 2);
+    CHECK(fls, 7, 3);
+    CHECK(fls, 6, 3);
+    CHECK(fls, 0x80000000U, 32);
+
+    /* unsigned int flsl(unsigned long) */
+    CHECK(flsl, 0, 0);
+    CHECK(flsl, 1, 1);
+    CHECK(flsl, 3, 2);
+    CHECK(flsl, 7, 3);
+    CHECK(flsl, 6, 3);
+
+    CHECK(flsl, 1 | (1UL << (BITS_PER_LONG - 1)), BITS_PER_LONG);
+#if BITS_PER_LONG > 32
+    CHECK(flsl, 1 | (1UL << 32), 33);
+    CHECK(flsl, 1 | (1UL << 63), 64);
+#endif
+}
+
 static void __init __constructor test_bitops(void)
 {
     test_ffs();
+    test_fls();
 }
diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h
index 5aa8d7aa5a..9f8d9eff11 100644
--- a/xen/include/xen/bitops.h
+++ b/xen/include/xen/bitops.h
@@ -60,6 +60,30 @@ static always_inline __pure unsigned int ffsl(unsigned long x)
 #endif
 }
 
+static always_inline __pure unsigned int fls(unsigned int x)
+{
+    if ( __builtin_constant_p(x) )
+        return x ? 32 - __builtin_clz(x) : 0;
+
+#ifdef arch_fls
+    return arch_fls(x);
+#else
+    return generic_flsl(x);
+#endif
+}
+
+static always_inline __pure unsigned int flsl(unsigned long x)
+{
+    if ( __builtin_constant_p(x) )
+        return x ? BITS_PER_LONG - __builtin_clzl(x) : 0;
+
+#ifdef arch_fls
+    return arch_flsl(x);
+#else
+    return generic_flsl(x);
+#endif
+}
+
 /* --------------------- Please tidy below here --------------------- */
 
 #ifndef find_next_bit
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/bitops: Clean up ffs64()/fls64() definitions
Message-Id: <E1sDWC0-0006v2-Jw@xenbits.xenproject.org>
Date: Sat, 01 Jun 2024 21:23:12 +0000

commit 04e70af5f240965ec0475caef813653e06782273
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Sat Mar 9 02:44:56 2024 +0000
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Sat Jun 1 02:28:14 2024 +0100

    xen/bitops: Clean up ffs64()/fls64() definitions
    
    Implement ffs64() and fls64() as plain static inlines, dropping the ifdefary
    and intermediate generic_f?s64() forms.
    
    Add tests for all interesting bit positions at 32bit boundaries.
    
    No functional change.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/common/bitops.c      | 32 ++++++++++++++++++++++++++++++++
 xen/include/xen/bitops.h | 42 ++++++++++++++++++++----------------------
 2 files changed, 52 insertions(+), 22 deletions(-)

diff --git a/xen/common/bitops.c b/xen/common/bitops.c
index 0e1cc1f509..94a8983af9 100644
--- a/xen/common/bitops.c
+++ b/xen/common/bitops.c
@@ -26,6 +26,22 @@ static void __init test_ffs(void)
     CHECK(ffsl, 1UL << 32, 33);
     CHECK(ffsl, 1UL << 63, 64);
 #endif
+
+    /*
+     * unsigned int ffs64(uint64_t)
+     *
+     * 32-bit builds of Xen have to split this into two adjacent operations,
+     * so test all interesting bit positions across the divide.
+     */
+    CHECK(ffs64, 0, 0);
+    CHECK(ffs64, 1, 1);
+    CHECK(ffs64, 3, 1);
+    CHECK(ffs64, 7, 1);
+    CHECK(ffs64, 6, 2);
+
+    CHECK(ffs64, 0x8000000080000000ULL, 32);
+    CHECK(ffs64, 0x8000000100000000ULL, 33);
+    CHECK(ffs64, 0x8000000000000000ULL, 64);
 }
 
 static void __init test_fls(void)
@@ -50,6 +66,22 @@ static void __init test_fls(void)
     CHECK(flsl, 1 | (1UL << 32), 33);
     CHECK(flsl, 1 | (1UL << 63), 64);
 #endif
+
+    /*
+     * unsigned int fls64(uint64_t)
+     *
+     * 32-bit builds of Xen have to split this into two adjacent operations,
+     * so test all interesting bit positions across the divide.
+     */
+    CHECK(fls64, 0, 0);
+    CHECK(fls64, 1, 1);
+    CHECK(fls64, 3, 2);
+    CHECK(fls64, 7, 3);
+    CHECK(fls64, 6, 3);
+
+    CHECK(fls64, 0x0000000080000001ULL, 32);
+    CHECK(fls64, 0x0000000100000001ULL, 33);
+    CHECK(fls64, 0x8000000000000001ULL, 64);
 }
 
 static void __init __constructor test_bitops(void)
diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h
index 9f8d9eff11..d216fead17 100644
--- a/xen/include/xen/bitops.h
+++ b/xen/include/xen/bitops.h
@@ -60,6 +60,14 @@ static always_inline __pure unsigned int ffsl(unsigned long x)
 #endif
 }
 
+static always_inline __pure unsigned int ffs64(uint64_t x)
+{
+    if ( BITS_PER_LONG == 64 )
+        return ffsl(x);
+    else
+        return !x || (uint32_t)x ? ffs(x) : ffs(x >> 32) + 32;
+}
+
 static always_inline __pure unsigned int fls(unsigned int x)
 {
     if ( __builtin_constant_p(x) )
@@ -84,6 +92,18 @@ static always_inline __pure unsigned int flsl(unsigned long x)
 #endif
 }
 
+static always_inline __pure unsigned int fls64(uint64_t x)
+{
+    if ( BITS_PER_LONG == 64 )
+        return flsl(x);
+    else
+    {
+        uint32_t h = x >> 32;
+
+        return h ? fls(h) + 32 : fls(x);
+    }
+}
+
 /* --------------------- Please tidy below here --------------------- */
 
 #ifndef find_next_bit
@@ -134,28 +154,6 @@ extern unsigned long find_first_zero_bit(const unsigned long *addr,
                                          unsigned long size);
 #endif
 
-#if BITS_PER_LONG == 64
-# define fls64 flsl
-# define ffs64 ffsl
-#else
-# ifndef ffs64
-static inline int generic_ffs64(__u64 x)
-{
-    return !x || (__u32)x ? ffs(x) : ffs(x >> 32) + 32;
-}
-#  define ffs64 generic_ffs64
-# endif
-# ifndef fls64
-static inline int generic_fls64(__u64 x)
-{
-    __u32 h = x >> 32;
-
-    return h ? fls(h) + 32 : fls(x);
-}
-#  define fls64 generic_fls64
-# endif
-#endif
-
 static inline int get_bitmask_order(unsigned int count)
 {
     int order;
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/bitops: Rearrange the top of xen/bitops.h
Message-Id: <E1sDWCA-0006vT-Mj@xenbits.xenproject.org>
Date: Sat, 01 Jun 2024 21:23:22 +0000

commit 5f7606c048f7cca1a4301b321af70791c1d22378
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Fri May 24 20:37:50 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Sat Jun 1 02:28:14 2024 +0100

    xen/bitops: Rearrange the top of xen/bitops.h
    
    The #include <asm/bitops.h> can move to the top of the file now now that
    generic_ffs()/generic_fls() have been untangled.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
    Release-acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/include/xen/bitops.h | 16 ++--------------
 1 file changed, 2 insertions(+), 14 deletions(-)

diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h
index d216fead17..6a5e28730a 100644
--- a/xen/include/xen/bitops.h
+++ b/xen/include/xen/bitops.h
@@ -4,6 +4,8 @@
 #include <xen/compiler.h>
 #include <xen/types.h>
 
+#include <asm/bitops.h>
+
 /*
  * Create a contiguous bitmask starting at bit position @l and ending at
  * position @h. For example GENMASK(30, 21) gives us 0x7fe00000ul.
@@ -22,20 +24,6 @@
 unsigned int __pure generic_ffsl(unsigned long x);
 unsigned int __pure generic_flsl(unsigned long x);
 
-/*
- * Include this here because some architectures need generic_ffs/fls in
- * scope
- */
-
-/* --------------------- Please tidy above here --------------------- */
-
-#include <asm/bitops.h>
-
-/*
- * Find First/Last Set bit (all forms).
- *
- * Bits are labelled from 1.  Returns 0 if given 0.
- */
 static always_inline __pure unsigned int ffs(unsigned int x)
 {
     if ( __builtin_constant_p(x) )
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen: fix MISRA regressions on rule 20.9 and 20.12
Message-Id: <E1sDf7N-00041y-GN@xenbits.xenproject.org>
Date: Sun, 02 Jun 2024 06:55:01 +0000

commit c2d5e63c7380c7cb435d00211b512c53accb528e
Author:     Nicola Vetrini <nicola.vetrini@bugseng.com>
AuthorDate: Sat Jun 1 12:16:56 2024 +0200
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Sat Jun 1 15:32:13 2024 +0100

    xen: fix MISRA regressions on rule 20.9 and 20.12
    
    Commit ea59e7d780d9 ("xen/bitops: Cleanup and new infrastructure ahead of
    rearrangements") introduced new violations on previously clean rules 20.9 and
    20.12 (clean on ARM only, right now).
    
    The first is introduced because CONFIG_CC_IS_CLANG in xen/self-tests.h is not
    defined in the configuration under analysis. Using "defined()" instead avoids
    relying on the preprocessor's behaviour upon encountering an undedfined identifier
    and addresses the violation.
    
    The violation of Rule 20.12 is due to "val" being used both as an ordinary argument
    in macro RUNTIME_CHECK, and as a stringification operator.
    
    No functional change.
    
    Fixes: ea59e7d780d9 ("xen/bitops: Cleanup and new infrastructure ahead of rearrangements")
    Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
 automation/eclair_analysis/ECLAIR/deviations.ecl | 2 +-
 xen/include/xen/self-tests.h                     | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl
index cf62a874d9..447c1e6661 100644
--- a/automation/eclair_analysis/ECLAIR/deviations.ecl
+++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
@@ -473,7 +473,7 @@ deliberate."
 -doc_begin="Uses of a macro parameter for ordinary expansion and as an operand
 to the # or ## operators within the following macros are deliberate, to provide
 useful diagnostic messages to the user."
--config=MC3R1.R20.12,macros+={deliberate, "name(ASSERT||BUILD_BUG_ON||BUILD_BUG_ON_ZERO)"}
+-config=MC3R1.R20.12,macros+={deliberate, "name(ASSERT||BUILD_BUG_ON||BUILD_BUG_ON_ZERO||RUNTIME_CHECK)"}
 -doc_end
 
 -doc_begin="The helper macro GENERATE_CASE may use a macro parameter for ordinary
diff --git a/xen/include/xen/self-tests.h b/xen/include/xen/self-tests.h
index 8410db7aaa..42a4cc4d17 100644
--- a/xen/include/xen/self-tests.h
+++ b/xen/include/xen/self-tests.h
@@ -16,7 +16,7 @@
  * Clang < 8 can't fold constants through static inlines, causing this to
  * fail.  Simply skip it for incredibly old compilers.
  */
-#if !CONFIG_CC_IS_CLANG || CONFIG_CLANG_VERSION >= 80000
+#if !defined(CONFIG_CC_IS_CLANG) || CONFIG_CLANG_VERSION >= 80000
 #define COMPILE_CHECK(fn, val, res)                                     \
     do {                                                                \
         typeof(fn(val)) real = fn(val);                                 \
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/irq: remove offline CPUs from old CPU mask when adjusting move_cleanup_count
Message-Id: <E1sGadH-0002Jk-D5@xenbits.xenproject.org>
Date: Mon, 10 Jun 2024 08:44:03 +0000

commit e63209d3ba2fd1b2f232babd14c9c679ffa7b09a
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Mon Jun 10 10:33:22 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Mon Jun 10 10:33:22 2024 +0200

    x86/irq: remove offline CPUs from old CPU mask when adjusting move_cleanup_count
    
    When adjusting move_cleanup_count to account for CPUs that are offline also
    adjust old_cpu_mask, otherwise further calls to fixup_irqs() could subtract
    those again and create an imbalance in move_cleanup_count.
    
    Fixes: 472e0b74c5c4 ('x86/IRQ: deal with move cleanup count state in fixup_irqs()')
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/irq.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index e36e06deaa..d101ffeaf9 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2563,6 +2563,14 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
             desc->arch.move_cleanup_count -= cpumask_weight(affinity);
             if ( !desc->arch.move_cleanup_count )
                 release_old_vec(desc);
+            else
+                /*
+                 * Adjust old_cpu_mask to account for the offline CPUs,
+                 * otherwise further calls to fixup_irqs() could subtract those
+                 * again and possibly underflow the counter.
+                 */
+                cpumask_andnot(desc->arch.old_cpu_mask, desc->arch.old_cpu_mask,
+                               affinity);
         }
 
         if ( !desc->action || cpumask_subset(desc->affinity, mask) )
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/domain: deviate violation of MISRA C Rule 20.12
Message-Id: <E1sGadR-0002KC-H3@xenbits.xenproject.org>
Date: Mon, 10 Jun 2024 08:44:13 +0000

commit 0a5b2ca32c1506bbb0e636a2dfab7502a52fe136
Author:     Nicola Vetrini <nicola.vetrini@bugseng.com>
AuthorDate: Mon Jun 10 10:34:05 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Mon Jun 10 10:34:05 2024 +0200

    x86/domain: deviate violation of MISRA C Rule 20.12
    
    MISRA C Rule 20.12 states: "A macro parameter used as an operand to
    the # or ## operators, which is itself subject to further macro replacement,
    shall only be used as an operand to these operators".
    
    In this case, builds where CONFIG_COMPAT=y the fpu_ctxt
    macro is used both as a regular macro argument and as an operand for
    stringification in the expansion of CHECK_FIELD_.
    This is deviated using a SAF-x-safe comment.
    
    No functional change.
    
    Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
---
 docs/misra/safe.json  | 8 ++++++++
 xen/arch/x86/domain.c | 1 +
 xen/arch/x86/domctl.c | 1 +
 3 files changed, 10 insertions(+)

diff --git a/docs/misra/safe.json b/docs/misra/safe.json
index 9b13bcf717..c213e0a0be 100644
--- a/docs/misra/safe.json
+++ b/docs/misra/safe.json
@@ -52,6 +52,14 @@
         },
         {
             "id": "SAF-6-safe",
+            "analyser": {
+                "eclair": "MC3R1.R20.12"
+            },
+            "name": "MC3R1.R20.12: use of a macro argument that deliberately violates the Rule",
+            "text": "A macro parameter that is itself a macro is intentionally used within the macro both as a regular parameter and for text replacement."
+        },
+        {
+            "id": "SAF-7-safe",
             "analyser": {},
             "name": "Sentinel",
             "text": "Next ID to be used"
diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index 536542841e..ccadfe0c9e 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -1084,6 +1084,7 @@ void arch_domain_creation_finished(struct domain *d)
 #ifdef CONFIG_COMPAT
 #define xen_vcpu_guest_context vcpu_guest_context
 #define fpu_ctxt fpu_ctxt.x
+/* SAF-6-safe Rule 20.12 expansion of macro fpu_ctxt with CONFIG_COMPAT */
 CHECK_FIELD_(struct, vcpu_guest_context, fpu_ctxt);
 #undef fpu_ctxt
 #undef xen_vcpu_guest_context
diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c
index 9a72d57333..335aedf46d 100644
--- a/xen/arch/x86/domctl.c
+++ b/xen/arch/x86/domctl.c
@@ -1326,6 +1326,7 @@ long arch_do_domctl(
 #ifdef CONFIG_COMPAT
 #define xen_vcpu_guest_context vcpu_guest_context
 #define fpu_ctxt fpu_ctxt.x
+/* SAF-6-safe Rule 20.12 expansion of macro fpu_ctxt with CONFIG_COMPAT */
 CHECK_FIELD_(struct, vcpu_guest_context, fpu_ctxt);
 #undef fpu_ctxt
 #undef xen_vcpu_guest_context
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/pvh: declare PVH dom0 supported with caveats
Message-Id: <E1sGdGp-0003YG-GV@xenbits.xenproject.org>
Date: Mon, 10 Jun 2024 11:33:03 +0000

commit ea1cb444c28ce3ae7915d9c94c4344f4bf6d87d3
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Mon Jun 10 13:29:25 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Mon Jun 10 13:29:25 2024 +0200

    x86/pvh: declare PVH dom0 supported with caveats
    
    PVH dom0 is functionally very similar to PVH domU except for the domain
    builder and the added set of hypercalls available to it.
    
    The main concern with declaring it "Supported" is the lack of some features
    when compared to classic PV dom0, hence switch it's status to supported with
    caveats.  List the known missing features, there might be more features missing
    or not working as expected apart from the ones listed.
    
    Note there's some (limited) PVH dom0 testing on both osstest and gitlab.
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 CHANGELOG.md                  |  1 +
 SUPPORT.md                    | 15 ++++++++++++++-
 xen/arch/x86/hvm/dom0_build.c |  1 -
 3 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index 201478aa1c..1778419cae 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -14,6 +14,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
    - HVM PIRQs are disabled by default.
    - Reduce IOMMU setup time for hardware domain.
    - Allow HVM/PVH domains to map foreign pages.
+   - Declare PVH dom0 supported with caveats.
  - xl/libxl configures vkb=[] for HVM domains with priority over vkb_device.
  - Increase the maximum number of CPUs Xen can be built for from 4095 to
    16383.
diff --git a/SUPPORT.md b/SUPPORT.md
index d5d60c62ec..711aacf346 100644
--- a/SUPPORT.md
+++ b/SUPPORT.md
@@ -161,7 +161,20 @@ Requires hardware virtualisation support (Intel VMX / AMD SVM).
 Dom0 support requires an IOMMU (Intel VT-d / AMD IOMMU).
 
     Status, domU: Supported
-    Status, dom0: Experimental
+    Status, dom0: Supported, with caveats
+
+PVH dom0 hasn't received the same test coverage as PV dom0, so it can exhibit
+unexpected behavior or issues on some hardware.
+
+At least the following features are missing on a PVH dom0:
+
+  * PCI SR-IOV and Resizable BARs.
+
+  * Native NMI forwarding (nmi=dom0 command line option).
+
+  * MCE handling.
+
+  * PCI Passthrough to any kind of domUs.
 
 ### ARM
 
diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c
index 6acbaceb94..f3eddb6846 100644
--- a/xen/arch/x86/hvm/dom0_build.c
+++ b/xen/arch/x86/hvm/dom0_build.c
@@ -1360,7 +1360,6 @@ int __init dom0_construct_pvh(struct domain *d, const module_t *image,
         print_e820_memory_map(d->arch.e820, d->arch.nr_e820);
     }
 
-    printk("WARNING: PVH is an experimental mode with limited functionality\n");
     return 0;
 }
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/irq: remove offline CPUs from old CPU mask when adjusting move_cleanup_count
Message-Id: <E1sGoAI-000540-10@xenbits.xenproject.org>
Date: Mon, 10 Jun 2024 23:11:02 +0000

commit e63209d3ba2fd1b2f232babd14c9c679ffa7b09a
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Mon Jun 10 10:33:22 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Mon Jun 10 10:33:22 2024 +0200

    x86/irq: remove offline CPUs from old CPU mask when adjusting move_cleanup_count
    
    When adjusting move_cleanup_count to account for CPUs that are offline also
    adjust old_cpu_mask, otherwise further calls to fixup_irqs() could subtract
    those again and create an imbalance in move_cleanup_count.
    
    Fixes: 472e0b74c5c4 ('x86/IRQ: deal with move cleanup count state in fixup_irqs()')
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/irq.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index e36e06deaa..d101ffeaf9 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2563,6 +2563,14 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
             desc->arch.move_cleanup_count -= cpumask_weight(affinity);
             if ( !desc->arch.move_cleanup_count )
                 release_old_vec(desc);
+            else
+                /*
+                 * Adjust old_cpu_mask to account for the offline CPUs,
+                 * otherwise further calls to fixup_irqs() could subtract those
+                 * again and possibly underflow the counter.
+                 */
+                cpumask_andnot(desc->arch.old_cpu_mask, desc->arch.old_cpu_mask,
+                               affinity);
         }
 
         if ( !desc->action || cpumask_subset(desc->affinity, mask) )
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/domain: deviate violation of MISRA C Rule 20.12
Message-Id: <E1sGoAS-00054f-5X@xenbits.xenproject.org>
Date: Mon, 10 Jun 2024 23:11:12 +0000

commit 0a5b2ca32c1506bbb0e636a2dfab7502a52fe136
Author:     Nicola Vetrini <nicola.vetrini@bugseng.com>
AuthorDate: Mon Jun 10 10:34:05 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Mon Jun 10 10:34:05 2024 +0200

    x86/domain: deviate violation of MISRA C Rule 20.12
    
    MISRA C Rule 20.12 states: "A macro parameter used as an operand to
    the # or ## operators, which is itself subject to further macro replacement,
    shall only be used as an operand to these operators".
    
    In this case, builds where CONFIG_COMPAT=y the fpu_ctxt
    macro is used both as a regular macro argument and as an operand for
    stringification in the expansion of CHECK_FIELD_.
    This is deviated using a SAF-x-safe comment.
    
    No functional change.
    
    Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
---
 docs/misra/safe.json  | 8 ++++++++
 xen/arch/x86/domain.c | 1 +
 xen/arch/x86/domctl.c | 1 +
 3 files changed, 10 insertions(+)

diff --git a/docs/misra/safe.json b/docs/misra/safe.json
index 9b13bcf717..c213e0a0be 100644
--- a/docs/misra/safe.json
+++ b/docs/misra/safe.json
@@ -52,6 +52,14 @@
         },
         {
             "id": "SAF-6-safe",
+            "analyser": {
+                "eclair": "MC3R1.R20.12"
+            },
+            "name": "MC3R1.R20.12: use of a macro argument that deliberately violates the Rule",
+            "text": "A macro parameter that is itself a macro is intentionally used within the macro both as a regular parameter and for text replacement."
+        },
+        {
+            "id": "SAF-7-safe",
             "analyser": {},
             "name": "Sentinel",
             "text": "Next ID to be used"
diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index 536542841e..ccadfe0c9e 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -1084,6 +1084,7 @@ void arch_domain_creation_finished(struct domain *d)
 #ifdef CONFIG_COMPAT
 #define xen_vcpu_guest_context vcpu_guest_context
 #define fpu_ctxt fpu_ctxt.x
+/* SAF-6-safe Rule 20.12 expansion of macro fpu_ctxt with CONFIG_COMPAT */
 CHECK_FIELD_(struct, vcpu_guest_context, fpu_ctxt);
 #undef fpu_ctxt
 #undef xen_vcpu_guest_context
diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c
index 9a72d57333..335aedf46d 100644
--- a/xen/arch/x86/domctl.c
+++ b/xen/arch/x86/domctl.c
@@ -1326,6 +1326,7 @@ long arch_do_domctl(
 #ifdef CONFIG_COMPAT
 #define xen_vcpu_guest_context vcpu_guest_context
 #define fpu_ctxt fpu_ctxt.x
+/* SAF-6-safe Rule 20.12 expansion of macro fpu_ctxt with CONFIG_COMPAT */
 CHECK_FIELD_(struct, vcpu_guest_context, fpu_ctxt);
 #undef fpu_ctxt
 #undef xen_vcpu_guest_context
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/pvh: declare PVH dom0 supported with caveats
Message-Id: <E1sGutO-0003z1-43@xenbits.xenproject.org>
Date: Tue, 11 Jun 2024 06:22:02 +0000

commit ea1cb444c28ce3ae7915d9c94c4344f4bf6d87d3
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Mon Jun 10 13:29:25 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Mon Jun 10 13:29:25 2024 +0200

    x86/pvh: declare PVH dom0 supported with caveats
    
    PVH dom0 is functionally very similar to PVH domU except for the domain
    builder and the added set of hypercalls available to it.
    
    The main concern with declaring it "Supported" is the lack of some features
    when compared to classic PV dom0, hence switch it's status to supported with
    caveats.  List the known missing features, there might be more features missing
    or not working as expected apart from the ones listed.
    
    Note there's some (limited) PVH dom0 testing on both osstest and gitlab.
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 CHANGELOG.md                  |  1 +
 SUPPORT.md                    | 15 ++++++++++++++-
 xen/arch/x86/hvm/dom0_build.c |  1 -
 3 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index 201478aa1c..1778419cae 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -14,6 +14,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
    - HVM PIRQs are disabled by default.
    - Reduce IOMMU setup time for hardware domain.
    - Allow HVM/PVH domains to map foreign pages.
+   - Declare PVH dom0 supported with caveats.
  - xl/libxl configures vkb=[] for HVM domains with priority over vkb_device.
  - Increase the maximum number of CPUs Xen can be built for from 4095 to
    16383.
diff --git a/SUPPORT.md b/SUPPORT.md
index d5d60c62ec..711aacf346 100644
--- a/SUPPORT.md
+++ b/SUPPORT.md
@@ -161,7 +161,20 @@ Requires hardware virtualisation support (Intel VMX / AMD SVM).
 Dom0 support requires an IOMMU (Intel VT-d / AMD IOMMU).
 
     Status, domU: Supported
-    Status, dom0: Experimental
+    Status, dom0: Supported, with caveats
+
+PVH dom0 hasn't received the same test coverage as PV dom0, so it can exhibit
+unexpected behavior or issues on some hardware.
+
+At least the following features are missing on a PVH dom0:
+
+  * PCI SR-IOV and Resizable BARs.
+
+  * Native NMI forwarding (nmi=dom0 command line option).
+
+  * MCE handling.
+
+  * PCI Passthrough to any kind of domUs.
 
 ### ARM
 
diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c
index 6acbaceb94..f3eddb6846 100644
--- a/xen/arch/x86/hvm/dom0_build.c
+++ b/xen/arch/x86/hvm/dom0_build.c
@@ -1360,7 +1360,6 @@ int __init dom0_construct_pvh(struct domain *d, const module_t *image,
         print_e820_memory_map(d->arch.e820, d->arch.nr_e820);
     }
 
-    printk("WARNING: PVH is an experimental mode with limited functionality\n");
     return 0;
 }
 
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] automation: add a test for HVM domU on PVH dom0
Message-Id: <E1sH11j-0003KJ-Bb@xenbits.xenproject.org>
Date: Tue, 11 Jun 2024 12:55:03 +0000

commit 43de96a70f00b631d0f4c658c232204079b2f2b2
Author:     Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
AuthorDate: Mon Jun 10 15:32:09 2024 +0200
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Tue Jun 11 12:06:46 2024 +0100

    automation: add a test for HVM domU on PVH dom0
    
    This tests if QEMU works in PVH dom0. QEMU in dom0 requires enabling TUN
    in the kernel, so do that too.
    
    Add it to both x86 runners, similar to the PVH domU test.
    
    Signed-off-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
 automation/gitlab-ci/test.yaml                      | 16 ++++++++++++++++
 automation/scripts/qubes-x86-64.sh                  | 19 ++++++++++++++++---
 automation/tests-artifacts/kernel/6.1.19.dockerfile |  1 +
 3 files changed, 33 insertions(+), 3 deletions(-)

diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml
index 902139e148..898d2adc8c 100644
--- a/automation/gitlab-ci/test.yaml
+++ b/automation/gitlab-ci/test.yaml
@@ -175,6 +175,14 @@ adl-smoke-x86-64-dom0pvh-gcc-debug:
     - *x86-64-test-needs
     - alpine-3.18-gcc-debug
 
+adl-smoke-x86-64-dom0pvh-hvm-gcc-debug:
+  extends: .adl-x86-64
+  script:
+    - ./automation/scripts/qubes-x86-64.sh dom0pvh-hvm 2>&1 | tee ${LOGFILE}
+  needs:
+    - *x86-64-test-needs
+    - alpine-3.18-gcc-debug
+
 adl-suspend-x86-64-gcc-debug:
   extends: .adl-x86-64
   script:
@@ -215,6 +223,14 @@ zen3p-smoke-x86-64-dom0pvh-gcc-debug:
     - *x86-64-test-needs
     - alpine-3.18-gcc-debug
 
+zen3p-smoke-x86-64-dom0pvh-hvm-gcc-debug:
+  extends: .zen3p-x86-64
+  script:
+    - ./automation/scripts/qubes-x86-64.sh dom0pvh-hvm 2>&1 | tee ${LOGFILE}
+  needs:
+    - *x86-64-test-needs
+    - alpine-3.18-gcc-debug
+
 zen3p-pci-hvm-x86-64-gcc-debug:
   extends: .zen3p-x86-64
   script:
diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh
index d81ed7b931..bfa60c912a 100755
--- a/automation/scripts/qubes-x86-64.sh
+++ b/automation/scripts/qubes-x86-64.sh
@@ -19,8 +19,8 @@ vif = [ "bridge=xenbr0", ]
 disk = [ ]
 '
 
-### test: smoke test & smoke test PVH
-if [ -z "${test_variant}" ] || [ "${test_variant}" = "dom0pvh" ]; then
+### test: smoke test & smoke test PVH & smoke test HVM
+if [ -z "${test_variant}" ] || [ "${test_variant}" = "dom0pvh" ] || [ "${test_variant}" = "dom0pvh-hvm" ]; then
     passed="ping test passed"
     domU_check="
 ifconfig eth0 192.168.0.2
@@ -37,10 +37,23 @@ done
 set -x
 echo \"${passed}\"
 "
-if [ "${test_variant}" = "dom0pvh" ]; then
+if [ "${test_variant}" = "dom0pvh" ] || [ "${test_variant}" = "dom0pvh-hvm" ]; then
     extra_xen_opts="dom0=pvh"
 fi
 
+if [ "${test_variant}" = "dom0pvh-hvm" ]; then
+    domU_config='
+type = "hvm"
+name = "domU"
+kernel = "/boot/vmlinuz"
+ramdisk = "/boot/initrd-domU"
+extra = "root=/dev/ram0 console=hvc0"
+memory = 512
+vif = [ "bridge=xenbr0", ]
+disk = [ ]
+'
+fi
+
 ### test: S3
 elif [ "${test_variant}" = "s3" ]; then
     passed="suspend test passed"
diff --git a/automation/tests-artifacts/kernel/6.1.19.dockerfile b/automation/tests-artifacts/kernel/6.1.19.dockerfile
index 3a4096780d..021bde26c7 100644
--- a/automation/tests-artifacts/kernel/6.1.19.dockerfile
+++ b/automation/tests-artifacts/kernel/6.1.19.dockerfile
@@ -32,6 +32,7 @@ RUN curl -fsSLO https://cdn.kernel.org/pub/linux/kernel/v6.x/linux-"$LINUX_VERSI
     make xen.config && \
     scripts/config --enable BRIDGE && \
     scripts/config --enable IGC && \
+    scripts/config --enable TUN && \
     cp .config .config.orig && \
     cat .config.orig | grep XEN | grep =m |sed 's/=m/=y/g' >> .config && \
     make -j$(nproc) bzImage && \
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] CI: Update FreeBSD to 13.3
Message-Id: <E1sH45P-0006aI-Jt@xenbits.xenproject.org>
Date: Tue, 11 Jun 2024 16:11:03 +0000

commit 5ea7f2c9d7a1334b3b2bd5f67fab4d447b60613d
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Tue Jun 11 12:59:12 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Tue Jun 11 17:00:10 2024 +0100

    CI: Update FreeBSD to 13.3
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Acked-by: Roger Pau Monné <roger.pau@citrix.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 .cirrus.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.cirrus.yml b/.cirrus.yml
index d0a9021a77..c431d8d244 100644
--- a/.cirrus.yml
+++ b/.cirrus.yml
@@ -17,7 +17,7 @@ freebsd_template: &FREEBSD_TEMPLATE
 task:
   name: 'FreeBSD 13'
   freebsd_instance:
-    image_family: freebsd-13-2
+    image_family: freebsd-13-3
   << : *FREEBSD_TEMPLATE
 
 task:
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] automation: add a test for HVM domU on PVH dom0
Message-Id: <E1sHBkX-0004Wo-CB@xenbits.xenproject.org>
Date: Wed, 12 Jun 2024 00:22:01 +0000

commit 43de96a70f00b631d0f4c658c232204079b2f2b2
Author:     Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
AuthorDate: Mon Jun 10 15:32:09 2024 +0200
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Tue Jun 11 12:06:46 2024 +0100

    automation: add a test for HVM domU on PVH dom0
    
    This tests if QEMU works in PVH dom0. QEMU in dom0 requires enabling TUN
    in the kernel, so do that too.
    
    Add it to both x86 runners, similar to the PVH domU test.
    
    Signed-off-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
 automation/gitlab-ci/test.yaml                      | 16 ++++++++++++++++
 automation/scripts/qubes-x86-64.sh                  | 19 ++++++++++++++++---
 automation/tests-artifacts/kernel/6.1.19.dockerfile |  1 +
 3 files changed, 33 insertions(+), 3 deletions(-)

diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml
index 902139e148..898d2adc8c 100644
--- a/automation/gitlab-ci/test.yaml
+++ b/automation/gitlab-ci/test.yaml
@@ -175,6 +175,14 @@ adl-smoke-x86-64-dom0pvh-gcc-debug:
     - *x86-64-test-needs
     - alpine-3.18-gcc-debug
 
+adl-smoke-x86-64-dom0pvh-hvm-gcc-debug:
+  extends: .adl-x86-64
+  script:
+    - ./automation/scripts/qubes-x86-64.sh dom0pvh-hvm 2>&1 | tee ${LOGFILE}
+  needs:
+    - *x86-64-test-needs
+    - alpine-3.18-gcc-debug
+
 adl-suspend-x86-64-gcc-debug:
   extends: .adl-x86-64
   script:
@@ -215,6 +223,14 @@ zen3p-smoke-x86-64-dom0pvh-gcc-debug:
     - *x86-64-test-needs
     - alpine-3.18-gcc-debug
 
+zen3p-smoke-x86-64-dom0pvh-hvm-gcc-debug:
+  extends: .zen3p-x86-64
+  script:
+    - ./automation/scripts/qubes-x86-64.sh dom0pvh-hvm 2>&1 | tee ${LOGFILE}
+  needs:
+    - *x86-64-test-needs
+    - alpine-3.18-gcc-debug
+
 zen3p-pci-hvm-x86-64-gcc-debug:
   extends: .zen3p-x86-64
   script:
diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh
index d81ed7b931..bfa60c912a 100755
--- a/automation/scripts/qubes-x86-64.sh
+++ b/automation/scripts/qubes-x86-64.sh
@@ -19,8 +19,8 @@ vif = [ "bridge=xenbr0", ]
 disk = [ ]
 '
 
-### test: smoke test & smoke test PVH
-if [ -z "${test_variant}" ] || [ "${test_variant}" = "dom0pvh" ]; then
+### test: smoke test & smoke test PVH & smoke test HVM
+if [ -z "${test_variant}" ] || [ "${test_variant}" = "dom0pvh" ] || [ "${test_variant}" = "dom0pvh-hvm" ]; then
     passed="ping test passed"
     domU_check="
 ifconfig eth0 192.168.0.2
@@ -37,10 +37,23 @@ done
 set -x
 echo \"${passed}\"
 "
-if [ "${test_variant}" = "dom0pvh" ]; then
+if [ "${test_variant}" = "dom0pvh" ] || [ "${test_variant}" = "dom0pvh-hvm" ]; then
     extra_xen_opts="dom0=pvh"
 fi
 
+if [ "${test_variant}" = "dom0pvh-hvm" ]; then
+    domU_config='
+type = "hvm"
+name = "domU"
+kernel = "/boot/vmlinuz"
+ramdisk = "/boot/initrd-domU"
+extra = "root=/dev/ram0 console=hvc0"
+memory = 512
+vif = [ "bridge=xenbr0", ]
+disk = [ ]
+'
+fi
+
 ### test: S3
 elif [ "${test_variant}" = "s3" ]; then
     passed="suspend test passed"
diff --git a/automation/tests-artifacts/kernel/6.1.19.dockerfile b/automation/tests-artifacts/kernel/6.1.19.dockerfile
index 3a4096780d..021bde26c7 100644
--- a/automation/tests-artifacts/kernel/6.1.19.dockerfile
+++ b/automation/tests-artifacts/kernel/6.1.19.dockerfile
@@ -32,6 +32,7 @@ RUN curl -fsSLO https://cdn.kernel.org/pub/linux/kernel/v6.x/linux-"$LINUX_VERSI
     make xen.config && \
     scripts/config --enable BRIDGE && \
     scripts/config --enable IGC && \
+    scripts/config --enable TUN && \
     cp .config .config.orig && \
     cat .config.orig | grep XEN | grep =m |sed 's/=m/=y/g' >> .config && \
     make -j$(nproc) bzImage && \
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] MAINTAINERS: add me as scheduler maintainer
Message-Id: <E1sHJl1-0004BO-UT@xenbits.xenproject.org>
Date: Wed, 12 Jun 2024 08:55:03 +0000

commit d05d97c090889c0424f4f63c90e7035da5a42948
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Wed Jun 12 10:52:22 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 12 10:52:22 2024 +0200

    MAINTAINERS: add me as scheduler maintainer
    
    I've been active in the scheduling code since many years now. Add
    me as a maintainer.
    
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Reviewed-by: George Dunlap <george.dunlap@cloud.com>
---
 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 6ba7d2765f..cc40c0be9d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -490,6 +490,7 @@ F:	xen/common/sched/rt.c
 SCHEDULING
 M:	George Dunlap <george.dunlap@citrix.com>
 M:	Dario Faggioli <dfaggioli@suse.com>
+M:	Juergen Gross <jgross@suse.com>
 S:	Supported
 F:	xen/common/sched/
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] MAINTAINERS: alter EFI section
Message-Id: <E1sHJlC-0004Bz-24@xenbits.xenproject.org>
Date: Wed, 12 Jun 2024 08:55:14 +0000

commit b0e5352c600ce42f109ddb43a4233ac2c9e0abbd
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 12 10:52:56 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 12 10:52:56 2024 +0200

    MAINTAINERS: alter EFI section
    
    To get past the recurring friction on the approach to take wrt
    workarounds needed for various firmware flaws, I'm stepping down as the
    maintainer of our code interfacing with EFI firmware. Two new
    maintainers are being introduced in my place.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Marek Marczykowski <marmarek@invisiblethingslab.com>
    Acked-by: Daniel P. Smith <dpsmith@apertussolutions.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 MAINTAINERS | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index cc40c0be9d..8e2b30a345 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -308,7 +308,9 @@ F:	automation/eclair_analysis/
 F:	automation/scripts/eclair
 
 EFI
-M:	Jan Beulich <jbeulich@suse.com>
+M:	Daniel P. Smith <dpsmith@apertussolutions.com>
+M:	Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
+R:	Jan Beulich <jbeulich@suse.com>
 S:	Supported
 F:	xen/arch/x86/efi/
 F:	xen/arch/x86/include/asm/efi*.h
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] CI: Update FreeBSD to 13.3
Message-Id: <E1sHLSU-0002HJ-4X@xenbits.xenproject.org>
Date: Wed, 12 Jun 2024 10:44:02 +0000

commit 5ea7f2c9d7a1334b3b2bd5f67fab4d447b60613d
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Tue Jun 11 12:59:12 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Tue Jun 11 17:00:10 2024 +0100

    CI: Update FreeBSD to 13.3
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Acked-by: Roger Pau Monné <roger.pau@citrix.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 .cirrus.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.cirrus.yml b/.cirrus.yml
index d0a9021a77..c431d8d244 100644
--- a/.cirrus.yml
+++ b/.cirrus.yml
@@ -17,7 +17,7 @@ freebsd_template: &FREEBSD_TEMPLATE
 task:
   name: 'FreeBSD 13'
   freebsd_instance:
-    image_family: freebsd-13-2
+    image_family: freebsd-13-3
   << : *FREEBSD_TEMPLATE
 
 task:
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/smp: do not use shorthand IPI destinations in CPU hot{,un}plug contexts
Message-Id: <E1sHN9z-0000Ke-C9@xenbits.xenproject.org>
Date: Wed, 12 Jun 2024 12:33:03 +0000

commit 171c52fba5d94e050d704770480dcb983490d0ad
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 12 14:29:31 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 12 14:29:31 2024 +0200

    x86/smp: do not use shorthand IPI destinations in CPU hot{,un}plug contexts
    
    Due to the current rwlock logic, if the CPU calling get_cpu_maps() does
    so from a cpu_hotplug_{begin,done}() region the function will still
    return success, because a CPU taking the rwlock in read mode after
    having taken it in write mode is allowed.  Such corner case makes using
    get_cpu_maps() alone not enough to prevent using the shorthand in CPU
    hotplug regions.
    
    Introduce a new helper to detect whether the current caller is between a
    cpu_hotplug_{begin,done}() region and use it in send_IPI_mask() to restrict
    shorthand usage.
    
    Fixes: 5500d265a2a8 ('x86/smp: use APIC ALLBUT destination shorthand when possible')
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/smp.c       |  2 +-
 xen/common/cpu.c         |  5 +++++
 xen/include/xen/cpu.h    | 10 ++++++++++
 xen/include/xen/rwlock.h |  2 ++
 4 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/smp.c b/xen/arch/x86/smp.c
index 7443ad2033..04c6a05723 100644
--- a/xen/arch/x86/smp.c
+++ b/xen/arch/x86/smp.c
@@ -88,7 +88,7 @@ void send_IPI_mask(const cpumask_t *mask, int vector)
      * the system have been accounted for.
      */
     if ( system_state > SYS_STATE_smp_boot &&
-         !unaccounted_cpus && !disabled_cpus &&
+         !unaccounted_cpus && !disabled_cpus && !cpu_in_hotplug_context() &&
          /* NB: get_cpu_maps lock requires enabled interrupts. */
          local_irq_is_enabled() && (cpus_locked = get_cpu_maps()) &&
          (park_offline_cpus ||
diff --git a/xen/common/cpu.c b/xen/common/cpu.c
index 8709db4d29..6e35b114c0 100644
--- a/xen/common/cpu.c
+++ b/xen/common/cpu.c
@@ -68,6 +68,11 @@ void cpu_hotplug_done(void)
     write_unlock(&cpu_add_remove_lock);
 }
 
+bool cpu_in_hotplug_context(void)
+{
+    return rw_is_write_locked_by_me(&cpu_add_remove_lock);
+}
+
 static NOTIFIER_HEAD(cpu_chain);
 
 void __init register_cpu_notifier(struct notifier_block *nb)
diff --git a/xen/include/xen/cpu.h b/xen/include/xen/cpu.h
index e1d4eb5967..6bf5786750 100644
--- a/xen/include/xen/cpu.h
+++ b/xen/include/xen/cpu.h
@@ -13,6 +13,16 @@ void put_cpu_maps(void);
 void cpu_hotplug_begin(void);
 void cpu_hotplug_done(void);
 
+/*
+ * Returns true when the caller CPU is between a cpu_hotplug_{begin,done}()
+ * region.
+ *
+ * This is required to safely identify hotplug contexts, as get_cpu_maps()
+ * would otherwise succeed because a caller holding the lock in write mode is
+ * allowed to acquire the same lock in read mode.
+ */
+bool cpu_in_hotplug_context(void);
+
 /* Receive notification of CPU hotplug events. */
 void register_cpu_notifier(struct notifier_block *nb);
 
diff --git a/xen/include/xen/rwlock.h b/xen/include/xen/rwlock.h
index a2e98cad34..4e78028218 100644
--- a/xen/include/xen/rwlock.h
+++ b/xen/include/xen/rwlock.h
@@ -316,6 +316,8 @@ static always_inline void write_lock_irq(rwlock_t *l)
 
 #define rw_is_locked(l)               _rw_is_locked(l)
 #define rw_is_write_locked(l)         _rw_is_write_locked(l)
+#define rw_is_write_locked_by_me(l) \
+    lock_evaluate_nospec(_is_write_locked_by_me(atomic_read(&(l)->cnts)))
 
 
 typedef struct percpu_rwlock percpu_rwlock_t;
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/irq: describe how the interrupt CPU movement works
Message-Id: <E1sHNA9-0000LQ-Fh@xenbits.xenproject.org>
Date: Wed, 12 Jun 2024 12:33:13 +0000

commit 0e8cde58848b85c93cea3797333874222e614f9b
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 12 14:30:06 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 12 14:30:06 2024 +0200

    x86/irq: describe how the interrupt CPU movement works
    
    The logic to move interrupts across CPUs is complex, attempt to provide a
    comment that describes the expected behavior so users of the interrupt system
    have more context about the usage of the arch_irq_desc structure fields.
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/include/asm/irq.h | 38 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)

diff --git a/xen/arch/x86/include/asm/irq.h b/xen/arch/x86/include/asm/irq.h
index 413994d213..94f634ce10 100644
--- a/xen/arch/x86/include/asm/irq.h
+++ b/xen/arch/x86/include/asm/irq.h
@@ -28,6 +28,44 @@ typedef struct {
 
 struct irq_desc;
 
+/*
+ * Xen logic for moving interrupts around CPUs allows manipulating interrupts
+ * that target remote CPUs.  The logic to move an interrupt from CPU(s) is as
+ * follows:
+ *
+ * 1. irq_set_affinity() is called with the new destination mask, such mask is
+ *    copied into pending_mask and IRQ_MOVE_PENDING is set in status to notice
+ *    an affinity change has been requested.
+ * 2. An interrupt acked with the IRQ_MOVE_PENDING will trigger the logic to
+ *    migrate it to a destination in pending_mask as long as the mask contains
+ *    any online CPUs.
+ * 3. cpu_mask and vector is copied to old_cpu_mask and old_vector.
+ * 4. New cpu_mask and vector are set, vector is setup at the new destination.
+ * 5. move_in_progress is set.
+ * 6. Interrupt source is updated to target new CPU and vector.
+ * 7. Interrupts arriving at old_cpu_mask are processed normally.
+ * 8. When the first interrupt is delivered at the new destination (cpu_mask) as
+ *    part of acking the interrupt the cleanup of the old destination(s) is
+ *    engaged.  move_in_progress is cleared and old_cpu_mask is
+ *    reduced to the online CPUs.  If the result is empty the old vector is
+ *    released.  Otherwise move_cleanup_count is set to the weight of online
+ *    CPUs in old_cpu_mask and IRQ_MOVE_CLEANUP_VECTOR is sent to them.
+ * 9. When receiving IRQ_MOVE_CLEANUP_VECTOR CPUs in old_cpu_mask clean the
+ *    vector entry and decrease the count in move_cleanup_count.  The CPU that
+ *    sets move_cleanup_count to 0 releases the vector.
+ *
+ * Note that when interrupt movement (either move_in_progress or
+ * move_cleanup_count set) is in progress it's not possible to move the
+ * interrupt to yet a different CPU.
+ *
+ * Interrupt movements done by fixup_irqs() skip setting IRQ_MOVE_PENDING and
+ * pending_mask as the movement must be performed right away, and so start
+ * directly from step 3.
+ *
+ * By keeping the vector in the old CPU(s) configured until the interrupt is
+ * acked on the new destination Xen allows draining any pending interrupts at
+ * the old destinations.
+ */
 struct arch_irq_desc {
         s16 vector;                  /* vector itself is only 8 bits, */
         s16 old_vector;              /* but we use -1 for unassigned  */
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/irq: limit interrupt movement done by fixup_irqs()
Message-Id: <E1sHNAJ-0000Ls-J0@xenbits.xenproject.org>
Date: Wed, 12 Jun 2024 12:33:23 +0000

commit c7564d7366d865cc407e3d64bca816d07edee174
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 12 14:30:40 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 12 14:30:40 2024 +0200

    x86/irq: limit interrupt movement done by fixup_irqs()
    
    The current check used in fixup_irqs() to decide whether to move around
    interrupts is based on the affinity mask, but such mask can have all bits set,
    and hence is unlikely to be a subset of the input mask.  For example if an
    interrupt has an affinity mask of all 1s, any input to fixup_irqs() that's not
    an all set CPU mask would cause that interrupt to be shuffled around
    unconditionally.
    
    What fixup_irqs() care about is evacuating interrupts from CPUs not set on the
    input CPU mask, and for that purpose it should check whether the interrupt is
    assigned to a CPU not present in the input mask.  Assume that ->arch.cpu_mask
    is a subset of the ->affinity mask, and keep the current logic that resets the
    ->affinity mask if the interrupt has to be shuffled around.
    
    Doing the affinity movement based on ->arch.cpu_mask requires removing the
    special handling to ->arch.cpu_mask done for high priority vectors, otherwise
    the adjustment done to cpu_mask makes them always skip the CPU interrupt
    movement.
    
    While there also adjust the comment as to the purpose of fixup_irqs().
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/include/asm/irq.h |  2 +-
 xen/arch/x86/irq.c             | 21 +++++++++++----------
 2 files changed, 12 insertions(+), 11 deletions(-)

diff --git a/xen/arch/x86/include/asm/irq.h b/xen/arch/x86/include/asm/irq.h
index 94f634ce10..5f445299be 100644
--- a/xen/arch/x86/include/asm/irq.h
+++ b/xen/arch/x86/include/asm/irq.h
@@ -168,7 +168,7 @@ void free_domain_pirqs(struct domain *d);
 int map_domain_emuirq_pirq(struct domain *d, int pirq, int emuirq);
 int unmap_domain_pirq_emuirq(struct domain *d, int pirq);
 
-/* Reset irq affinities to match the given CPU mask. */
+/* Evacuate interrupts assigned to CPUs not present in the input CPU mask. */
 void fixup_irqs(const cpumask_t *mask, bool verbose);
 void fixup_eoi(void);
 
diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index d101ffeaf9..263e502bc0 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2516,7 +2516,7 @@ static int __init cf_check setup_dump_irqs(void)
 }
 __initcall(setup_dump_irqs);
 
-/* Reset irq affinities to match the given CPU mask. */
+/* Evacuate interrupts assigned to CPUs not present in the input CPU mask. */
 void fixup_irqs(const cpumask_t *mask, bool verbose)
 {
     unsigned int irq;
@@ -2540,19 +2540,15 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
 
         vector = irq_to_vector(irq);
         if ( vector >= FIRST_HIPRIORITY_VECTOR &&
-             vector <= LAST_HIPRIORITY_VECTOR )
+             vector <= LAST_HIPRIORITY_VECTOR &&
+             desc->handler == &no_irq_type )
         {
-            cpumask_and(desc->arch.cpu_mask, desc->arch.cpu_mask, mask);
-
             /*
              * This can in particular happen when parking secondary threads
              * during boot and when the serial console wants to use a PCI IRQ.
              */
-            if ( desc->handler == &no_irq_type )
-            {
-                spin_unlock(&desc->lock);
-                continue;
-            }
+            spin_unlock(&desc->lock);
+            continue;
         }
 
         if ( desc->arch.move_cleanup_count )
@@ -2573,7 +2569,12 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
                                affinity);
         }
 
-        if ( !desc->action || cpumask_subset(desc->affinity, mask) )
+        /*
+         * Avoid shuffling the interrupt around as long as current target CPUs
+         * are a subset of the input mask.  What fixup_irqs() cares about is
+         * evacuating interrupts from CPUs not in the input mask.
+         */
+        if ( !desc->action || cpumask_subset(desc->arch.cpu_mask, mask) )
         {
             spin_unlock(&desc->lock);
             continue;
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/physdev: replace physdev_{,un}map_pirq() checking against DOMID_SELF
Message-Id: <E1sHNAT-0000MV-Lv@xenbits.xenproject.org>
Date: Wed, 12 Jun 2024 12:33:33 +0000

commit 401448f2d12f969956fac3ef3d29dc065430fd56
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 12 14:31:21 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 12 14:31:21 2024 +0200

    x86/physdev: replace physdev_{,un}map_pirq() checking against DOMID_SELF
    
    It's hardly ever correct to check for just DOMID_SELF, as guests have
    ways to figure out their domain IDs and hence could instead use those as
    inputs to respective hypercalls. Note, however, that for ordinary DomU-s
    the adjustment is relaxing things rather than tightening them, since
    - as a result of XSA-237 - the respective XSM checks would have rejected
    self (un)mapping attempts for other than the control domain.
    
    Since in physdev_map_pirq() handling overall is a little easier this
    way, move obtaining of the domain pointer into the caller. Doing the
    same for physdev_unmap_pirq() is just to keep both consistent in this
    regard.
    
    Fixes: 0b469cd68708 ("Interrupt remapping to PIRQs in HVM guests")
    Fixes: 9e1a3415b773 ("x86: fixes after emuirq changes")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/physdev.c | 57 +++++++++++++++++++++++++-------------------------
 1 file changed, 29 insertions(+), 28 deletions(-)

diff --git a/xen/arch/x86/physdev.c b/xen/arch/x86/physdev.c
index 7efa17cf4c..d6dd622952 100644
--- a/xen/arch/x86/physdev.c
+++ b/xen/arch/x86/physdev.c
@@ -18,9 +18,9 @@
 #include <xsm/xsm.h>
 #include <asm/p2m.h>
 
-int physdev_map_pirq(domid_t domid, int type, int *index, int *pirq_p,
+int physdev_map_pirq(struct domain *d, int type, int *index, int *pirq_p,
                      struct msi_info *msi);
-int physdev_unmap_pirq(domid_t domid, int pirq);
+int physdev_unmap_pirq(struct domain *d, int pirq);
 
 #include "x86_64/mmconfig.h"
 
@@ -88,13 +88,12 @@ static int physdev_hvm_map_pirq(
     return ret;
 }
 
-int physdev_map_pirq(domid_t domid, int type, int *index, int *pirq_p,
+int physdev_map_pirq(struct domain *d, int type, int *index, int *pirq_p,
                      struct msi_info *msi)
 {
-    struct domain *d = current->domain;
     int ret;
 
-    if ( domid == DOMID_SELF && is_hvm_domain(d) && has_pirq(d) )
+    if ( d == current->domain && is_hvm_domain(d) && has_pirq(d) )
     {
         /*
          * Only makes sense for vector-based callback, else HVM-IRQ logic
@@ -106,13 +105,9 @@ int physdev_map_pirq(domid_t domid, int type, int *index, int *pirq_p,
         return physdev_hvm_map_pirq(d, type, index, pirq_p);
     }
 
-    d = rcu_lock_domain_by_any_id(domid);
-    if ( d == NULL )
-        return -ESRCH;
-
     ret = xsm_map_domain_pirq(XSM_DM_PRIV, d);
     if ( ret )
-        goto free_domain;
+        return ret;
 
     /* Verify or get irq. */
     switch ( type )
@@ -135,24 +130,17 @@ int physdev_map_pirq(domid_t domid, int type, int *index, int *pirq_p,
         break;
     }
 
- free_domain:
-    rcu_unlock_domain(d);
     return ret;
 }
 
-int physdev_unmap_pirq(domid_t domid, int pirq)
+int physdev_unmap_pirq(struct domain *d, int pirq)
 {
-    struct domain *d;
     int ret = 0;
 
-    d = rcu_lock_domain_by_any_id(domid);
-    if ( d == NULL )
-        return -ESRCH;
-
-    if ( domid != DOMID_SELF || !is_hvm_domain(d) || !has_pirq(d) )
+    if ( d != current->domain || !is_hvm_domain(d) || !has_pirq(d) )
         ret = xsm_unmap_domain_pirq(XSM_DM_PRIV, d);
     if ( ret )
-        goto free_domain;
+        return ret;
 
     if ( is_hvm_domain(d) && has_pirq(d) )
     {
@@ -160,8 +148,8 @@ int physdev_unmap_pirq(domid_t domid, int pirq)
         if ( domain_pirq_to_emuirq(d, pirq) != IRQ_UNBOUND )
             ret = unmap_domain_pirq_emuirq(d, pirq);
         write_unlock(&d->event_lock);
-        if ( domid == DOMID_SELF || ret )
-            goto free_domain;
+        if ( d == current->domain || ret )
+            return ret;
     }
 
     pcidevs_lock();
@@ -170,8 +158,6 @@ int physdev_unmap_pirq(domid_t domid, int pirq)
     write_unlock(&d->event_lock);
     pcidevs_unlock();
 
- free_domain:
-    rcu_unlock_domain(d);
     return ret;
 }
 #endif /* COMPAT */
@@ -180,7 +166,7 @@ ret_t do_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
 {
     int irq;
     ret_t ret;
-    struct domain *currd = current->domain;
+    struct domain *d, *currd = current->domain;
 
     switch ( cmd )
     {
@@ -331,8 +317,15 @@ ret_t do_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
         msi.sbdf.devfn = map.devfn;
         msi.entry_nr = map.entry_nr;
         msi.table_base = map.table_base;
-        ret = physdev_map_pirq(map.domid, map.type, &map.index, &map.pirq,
-                               &msi);
+
+        d = rcu_lock_domain_by_any_id(map.domid);
+        ret = -ESRCH;
+        if ( !d )
+            break;
+
+        ret = physdev_map_pirq(d, map.type, &map.index, &map.pirq, &msi);
+
+        rcu_unlock_domain(d);
 
         if ( map.type == MAP_PIRQ_TYPE_MULTI_MSI )
             map.entry_nr = msi.entry_nr;
@@ -348,7 +341,15 @@ ret_t do_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
         if ( copy_from_guest(&unmap, arg, 1) != 0 )
             break;
 
-        ret = physdev_unmap_pirq(unmap.domid, unmap.pirq);
+        d = rcu_lock_domain_by_any_id(unmap.domid);
+        ret = -ESRCH;
+        if ( !d )
+            break;
+
+        ret = physdev_unmap_pirq(d, unmap.pirq);
+
+        rcu_unlock_domain(d);
+
         break;
     }
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] MAINTAINERS: add me as scheduler maintainer
Message-Id: <E1sHebu-0002uD-5m@xenbits.xenproject.org>
Date: Thu, 13 Jun 2024 07:11:02 +0000

commit d05d97c090889c0424f4f63c90e7035da5a42948
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Wed Jun 12 10:52:22 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 12 10:52:22 2024 +0200

    MAINTAINERS: add me as scheduler maintainer
    
    I've been active in the scheduling code since many years now. Add
    me as a maintainer.
    
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Reviewed-by: George Dunlap <george.dunlap@cloud.com>
---
 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 6ba7d2765f..cc40c0be9d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -490,6 +490,7 @@ F:	xen/common/sched/rt.c
 SCHEDULING
 M:	George Dunlap <george.dunlap@citrix.com>
 M:	Dario Faggioli <dfaggioli@suse.com>
+M:	Juergen Gross <jgross@suse.com>
 S:	Supported
 F:	xen/common/sched/
 
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] MAINTAINERS: alter EFI section
Message-Id: <E1sHec4-0002v5-9s@xenbits.xenproject.org>
Date: Thu, 13 Jun 2024 07:11:12 +0000

commit b0e5352c600ce42f109ddb43a4233ac2c9e0abbd
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 12 10:52:56 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 12 10:52:56 2024 +0200

    MAINTAINERS: alter EFI section
    
    To get past the recurring friction on the approach to take wrt
    workarounds needed for various firmware flaws, I'm stepping down as the
    maintainer of our code interfacing with EFI firmware. Two new
    maintainers are being introduced in my place.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Marek Marczykowski <marmarek@invisiblethingslab.com>
    Acked-by: Daniel P. Smith <dpsmith@apertussolutions.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 MAINTAINERS | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index cc40c0be9d..8e2b30a345 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -308,7 +308,9 @@ F:	automation/eclair_analysis/
 F:	automation/scripts/eclair
 
 EFI
-M:	Jan Beulich <jbeulich@suse.com>
+M:	Daniel P. Smith <dpsmith@apertussolutions.com>
+M:	Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
+R:	Jan Beulich <jbeulich@suse.com>
 S:	Supported
 F:	xen/arch/x86/efi/
 F:	xen/arch/x86/include/asm/efi*.h
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/smp: do not use shorthand IPI destinations in CPU hot{,un}plug contexts
Message-Id: <E1sHecE-0002xF-D3@xenbits.xenproject.org>
Date: Thu, 13 Jun 2024 07:11:22 +0000

commit 171c52fba5d94e050d704770480dcb983490d0ad
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 12 14:29:31 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 12 14:29:31 2024 +0200

    x86/smp: do not use shorthand IPI destinations in CPU hot{,un}plug contexts
    
    Due to the current rwlock logic, if the CPU calling get_cpu_maps() does
    so from a cpu_hotplug_{begin,done}() region the function will still
    return success, because a CPU taking the rwlock in read mode after
    having taken it in write mode is allowed.  Such corner case makes using
    get_cpu_maps() alone not enough to prevent using the shorthand in CPU
    hotplug regions.
    
    Introduce a new helper to detect whether the current caller is between a
    cpu_hotplug_{begin,done}() region and use it in send_IPI_mask() to restrict
    shorthand usage.
    
    Fixes: 5500d265a2a8 ('x86/smp: use APIC ALLBUT destination shorthand when possible')
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/smp.c       |  2 +-
 xen/common/cpu.c         |  5 +++++
 xen/include/xen/cpu.h    | 10 ++++++++++
 xen/include/xen/rwlock.h |  2 ++
 4 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/smp.c b/xen/arch/x86/smp.c
index 7443ad2033..04c6a05723 100644
--- a/xen/arch/x86/smp.c
+++ b/xen/arch/x86/smp.c
@@ -88,7 +88,7 @@ void send_IPI_mask(const cpumask_t *mask, int vector)
      * the system have been accounted for.
      */
     if ( system_state > SYS_STATE_smp_boot &&
-         !unaccounted_cpus && !disabled_cpus &&
+         !unaccounted_cpus && !disabled_cpus && !cpu_in_hotplug_context() &&
          /* NB: get_cpu_maps lock requires enabled interrupts. */
          local_irq_is_enabled() && (cpus_locked = get_cpu_maps()) &&
          (park_offline_cpus ||
diff --git a/xen/common/cpu.c b/xen/common/cpu.c
index 8709db4d29..6e35b114c0 100644
--- a/xen/common/cpu.c
+++ b/xen/common/cpu.c
@@ -68,6 +68,11 @@ void cpu_hotplug_done(void)
     write_unlock(&cpu_add_remove_lock);
 }
 
+bool cpu_in_hotplug_context(void)
+{
+    return rw_is_write_locked_by_me(&cpu_add_remove_lock);
+}
+
 static NOTIFIER_HEAD(cpu_chain);
 
 void __init register_cpu_notifier(struct notifier_block *nb)
diff --git a/xen/include/xen/cpu.h b/xen/include/xen/cpu.h
index e1d4eb5967..6bf5786750 100644
--- a/xen/include/xen/cpu.h
+++ b/xen/include/xen/cpu.h
@@ -13,6 +13,16 @@ void put_cpu_maps(void);
 void cpu_hotplug_begin(void);
 void cpu_hotplug_done(void);
 
+/*
+ * Returns true when the caller CPU is between a cpu_hotplug_{begin,done}()
+ * region.
+ *
+ * This is required to safely identify hotplug contexts, as get_cpu_maps()
+ * would otherwise succeed because a caller holding the lock in write mode is
+ * allowed to acquire the same lock in read mode.
+ */
+bool cpu_in_hotplug_context(void);
+
 /* Receive notification of CPU hotplug events. */
 void register_cpu_notifier(struct notifier_block *nb);
 
diff --git a/xen/include/xen/rwlock.h b/xen/include/xen/rwlock.h
index a2e98cad34..4e78028218 100644
--- a/xen/include/xen/rwlock.h
+++ b/xen/include/xen/rwlock.h
@@ -316,6 +316,8 @@ static always_inline void write_lock_irq(rwlock_t *l)
 
 #define rw_is_locked(l)               _rw_is_locked(l)
 #define rw_is_write_locked(l)         _rw_is_write_locked(l)
+#define rw_is_write_locked_by_me(l) \
+    lock_evaluate_nospec(_is_write_locked_by_me(atomic_read(&(l)->cnts)))
 
 
 typedef struct percpu_rwlock percpu_rwlock_t;
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/irq: describe how the interrupt CPU movement works
Message-Id: <E1sHecO-0002y8-Gy@xenbits.xenproject.org>
Date: Thu, 13 Jun 2024 07:11:32 +0000

commit 0e8cde58848b85c93cea3797333874222e614f9b
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 12 14:30:06 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 12 14:30:06 2024 +0200

    x86/irq: describe how the interrupt CPU movement works
    
    The logic to move interrupts across CPUs is complex, attempt to provide a
    comment that describes the expected behavior so users of the interrupt system
    have more context about the usage of the arch_irq_desc structure fields.
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/include/asm/irq.h | 38 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)

diff --git a/xen/arch/x86/include/asm/irq.h b/xen/arch/x86/include/asm/irq.h
index 413994d213..94f634ce10 100644
--- a/xen/arch/x86/include/asm/irq.h
+++ b/xen/arch/x86/include/asm/irq.h
@@ -28,6 +28,44 @@ typedef struct {
 
 struct irq_desc;
 
+/*
+ * Xen logic for moving interrupts around CPUs allows manipulating interrupts
+ * that target remote CPUs.  The logic to move an interrupt from CPU(s) is as
+ * follows:
+ *
+ * 1. irq_set_affinity() is called with the new destination mask, such mask is
+ *    copied into pending_mask and IRQ_MOVE_PENDING is set in status to notice
+ *    an affinity change has been requested.
+ * 2. An interrupt acked with the IRQ_MOVE_PENDING will trigger the logic to
+ *    migrate it to a destination in pending_mask as long as the mask contains
+ *    any online CPUs.
+ * 3. cpu_mask and vector is copied to old_cpu_mask and old_vector.
+ * 4. New cpu_mask and vector are set, vector is setup at the new destination.
+ * 5. move_in_progress is set.
+ * 6. Interrupt source is updated to target new CPU and vector.
+ * 7. Interrupts arriving at old_cpu_mask are processed normally.
+ * 8. When the first interrupt is delivered at the new destination (cpu_mask) as
+ *    part of acking the interrupt the cleanup of the old destination(s) is
+ *    engaged.  move_in_progress is cleared and old_cpu_mask is
+ *    reduced to the online CPUs.  If the result is empty the old vector is
+ *    released.  Otherwise move_cleanup_count is set to the weight of online
+ *    CPUs in old_cpu_mask and IRQ_MOVE_CLEANUP_VECTOR is sent to them.
+ * 9. When receiving IRQ_MOVE_CLEANUP_VECTOR CPUs in old_cpu_mask clean the
+ *    vector entry and decrease the count in move_cleanup_count.  The CPU that
+ *    sets move_cleanup_count to 0 releases the vector.
+ *
+ * Note that when interrupt movement (either move_in_progress or
+ * move_cleanup_count set) is in progress it's not possible to move the
+ * interrupt to yet a different CPU.
+ *
+ * Interrupt movements done by fixup_irqs() skip setting IRQ_MOVE_PENDING and
+ * pending_mask as the movement must be performed right away, and so start
+ * directly from step 3.
+ *
+ * By keeping the vector in the old CPU(s) configured until the interrupt is
+ * acked on the new destination Xen allows draining any pending interrupts at
+ * the old destinations.
+ */
 struct arch_irq_desc {
         s16 vector;                  /* vector itself is only 8 bits, */
         s16 old_vector;              /* but we use -1 for unassigned  */
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/irq: limit interrupt movement done by fixup_irqs()
Message-Id: <E1sHecY-0002yv-K5@xenbits.xenproject.org>
Date: Thu, 13 Jun 2024 07:11:42 +0000

commit c7564d7366d865cc407e3d64bca816d07edee174
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 12 14:30:40 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 12 14:30:40 2024 +0200

    x86/irq: limit interrupt movement done by fixup_irqs()
    
    The current check used in fixup_irqs() to decide whether to move around
    interrupts is based on the affinity mask, but such mask can have all bits set,
    and hence is unlikely to be a subset of the input mask.  For example if an
    interrupt has an affinity mask of all 1s, any input to fixup_irqs() that's not
    an all set CPU mask would cause that interrupt to be shuffled around
    unconditionally.
    
    What fixup_irqs() care about is evacuating interrupts from CPUs not set on the
    input CPU mask, and for that purpose it should check whether the interrupt is
    assigned to a CPU not present in the input mask.  Assume that ->arch.cpu_mask
    is a subset of the ->affinity mask, and keep the current logic that resets the
    ->affinity mask if the interrupt has to be shuffled around.
    
    Doing the affinity movement based on ->arch.cpu_mask requires removing the
    special handling to ->arch.cpu_mask done for high priority vectors, otherwise
    the adjustment done to cpu_mask makes them always skip the CPU interrupt
    movement.
    
    While there also adjust the comment as to the purpose of fixup_irqs().
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/include/asm/irq.h |  2 +-
 xen/arch/x86/irq.c             | 21 +++++++++++----------
 2 files changed, 12 insertions(+), 11 deletions(-)

diff --git a/xen/arch/x86/include/asm/irq.h b/xen/arch/x86/include/asm/irq.h
index 94f634ce10..5f445299be 100644
--- a/xen/arch/x86/include/asm/irq.h
+++ b/xen/arch/x86/include/asm/irq.h
@@ -168,7 +168,7 @@ void free_domain_pirqs(struct domain *d);
 int map_domain_emuirq_pirq(struct domain *d, int pirq, int emuirq);
 int unmap_domain_pirq_emuirq(struct domain *d, int pirq);
 
-/* Reset irq affinities to match the given CPU mask. */
+/* Evacuate interrupts assigned to CPUs not present in the input CPU mask. */
 void fixup_irqs(const cpumask_t *mask, bool verbose);
 void fixup_eoi(void);
 
diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index d101ffeaf9..263e502bc0 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2516,7 +2516,7 @@ static int __init cf_check setup_dump_irqs(void)
 }
 __initcall(setup_dump_irqs);
 
-/* Reset irq affinities to match the given CPU mask. */
+/* Evacuate interrupts assigned to CPUs not present in the input CPU mask. */
 void fixup_irqs(const cpumask_t *mask, bool verbose)
 {
     unsigned int irq;
@@ -2540,19 +2540,15 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
 
         vector = irq_to_vector(irq);
         if ( vector >= FIRST_HIPRIORITY_VECTOR &&
-             vector <= LAST_HIPRIORITY_VECTOR )
+             vector <= LAST_HIPRIORITY_VECTOR &&
+             desc->handler == &no_irq_type )
         {
-            cpumask_and(desc->arch.cpu_mask, desc->arch.cpu_mask, mask);
-
             /*
              * This can in particular happen when parking secondary threads
              * during boot and when the serial console wants to use a PCI IRQ.
              */
-            if ( desc->handler == &no_irq_type )
-            {
-                spin_unlock(&desc->lock);
-                continue;
-            }
+            spin_unlock(&desc->lock);
+            continue;
         }
 
         if ( desc->arch.move_cleanup_count )
@@ -2573,7 +2569,12 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
                                affinity);
         }
 
-        if ( !desc->action || cpumask_subset(desc->affinity, mask) )
+        /*
+         * Avoid shuffling the interrupt around as long as current target CPUs
+         * are a subset of the input mask.  What fixup_irqs() cares about is
+         * evacuating interrupts from CPUs not in the input mask.
+         */
+        if ( !desc->action || cpumask_subset(desc->arch.cpu_mask, mask) )
         {
             spin_unlock(&desc->lock);
             continue;
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/physdev: replace physdev_{,un}map_pirq() checking against DOMID_SELF
Message-Id: <E1sHeci-0002ze-N7@xenbits.xenproject.org>
Date: Thu, 13 Jun 2024 07:11:52 +0000

commit 401448f2d12f969956fac3ef3d29dc065430fd56
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 12 14:31:21 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 12 14:31:21 2024 +0200

    x86/physdev: replace physdev_{,un}map_pirq() checking against DOMID_SELF
    
    It's hardly ever correct to check for just DOMID_SELF, as guests have
    ways to figure out their domain IDs and hence could instead use those as
    inputs to respective hypercalls. Note, however, that for ordinary DomU-s
    the adjustment is relaxing things rather than tightening them, since
    - as a result of XSA-237 - the respective XSM checks would have rejected
    self (un)mapping attempts for other than the control domain.
    
    Since in physdev_map_pirq() handling overall is a little easier this
    way, move obtaining of the domain pointer into the caller. Doing the
    same for physdev_unmap_pirq() is just to keep both consistent in this
    regard.
    
    Fixes: 0b469cd68708 ("Interrupt remapping to PIRQs in HVM guests")
    Fixes: 9e1a3415b773 ("x86: fixes after emuirq changes")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/physdev.c | 57 +++++++++++++++++++++++++-------------------------
 1 file changed, 29 insertions(+), 28 deletions(-)

diff --git a/xen/arch/x86/physdev.c b/xen/arch/x86/physdev.c
index 7efa17cf4c..d6dd622952 100644
--- a/xen/arch/x86/physdev.c
+++ b/xen/arch/x86/physdev.c
@@ -18,9 +18,9 @@
 #include <xsm/xsm.h>
 #include <asm/p2m.h>
 
-int physdev_map_pirq(domid_t domid, int type, int *index, int *pirq_p,
+int physdev_map_pirq(struct domain *d, int type, int *index, int *pirq_p,
                      struct msi_info *msi);
-int physdev_unmap_pirq(domid_t domid, int pirq);
+int physdev_unmap_pirq(struct domain *d, int pirq);
 
 #include "x86_64/mmconfig.h"
 
@@ -88,13 +88,12 @@ static int physdev_hvm_map_pirq(
     return ret;
 }
 
-int physdev_map_pirq(domid_t domid, int type, int *index, int *pirq_p,
+int physdev_map_pirq(struct domain *d, int type, int *index, int *pirq_p,
                      struct msi_info *msi)
 {
-    struct domain *d = current->domain;
     int ret;
 
-    if ( domid == DOMID_SELF && is_hvm_domain(d) && has_pirq(d) )
+    if ( d == current->domain && is_hvm_domain(d) && has_pirq(d) )
     {
         /*
          * Only makes sense for vector-based callback, else HVM-IRQ logic
@@ -106,13 +105,9 @@ int physdev_map_pirq(domid_t domid, int type, int *index, int *pirq_p,
         return physdev_hvm_map_pirq(d, type, index, pirq_p);
     }
 
-    d = rcu_lock_domain_by_any_id(domid);
-    if ( d == NULL )
-        return -ESRCH;
-
     ret = xsm_map_domain_pirq(XSM_DM_PRIV, d);
     if ( ret )
-        goto free_domain;
+        return ret;
 
     /* Verify or get irq. */
     switch ( type )
@@ -135,24 +130,17 @@ int physdev_map_pirq(domid_t domid, int type, int *index, int *pirq_p,
         break;
     }
 
- free_domain:
-    rcu_unlock_domain(d);
     return ret;
 }
 
-int physdev_unmap_pirq(domid_t domid, int pirq)
+int physdev_unmap_pirq(struct domain *d, int pirq)
 {
-    struct domain *d;
     int ret = 0;
 
-    d = rcu_lock_domain_by_any_id(domid);
-    if ( d == NULL )
-        return -ESRCH;
-
-    if ( domid != DOMID_SELF || !is_hvm_domain(d) || !has_pirq(d) )
+    if ( d != current->domain || !is_hvm_domain(d) || !has_pirq(d) )
         ret = xsm_unmap_domain_pirq(XSM_DM_PRIV, d);
     if ( ret )
-        goto free_domain;
+        return ret;
 
     if ( is_hvm_domain(d) && has_pirq(d) )
     {
@@ -160,8 +148,8 @@ int physdev_unmap_pirq(domid_t domid, int pirq)
         if ( domain_pirq_to_emuirq(d, pirq) != IRQ_UNBOUND )
             ret = unmap_domain_pirq_emuirq(d, pirq);
         write_unlock(&d->event_lock);
-        if ( domid == DOMID_SELF || ret )
-            goto free_domain;
+        if ( d == current->domain || ret )
+            return ret;
     }
 
     pcidevs_lock();
@@ -170,8 +158,6 @@ int physdev_unmap_pirq(domid_t domid, int pirq)
     write_unlock(&d->event_lock);
     pcidevs_unlock();
 
- free_domain:
-    rcu_unlock_domain(d);
     return ret;
 }
 #endif /* COMPAT */
@@ -180,7 +166,7 @@ ret_t do_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
 {
     int irq;
     ret_t ret;
-    struct domain *currd = current->domain;
+    struct domain *d, *currd = current->domain;
 
     switch ( cmd )
     {
@@ -331,8 +317,15 @@ ret_t do_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
         msi.sbdf.devfn = map.devfn;
         msi.entry_nr = map.entry_nr;
         msi.table_base = map.table_base;
-        ret = physdev_map_pirq(map.domid, map.type, &map.index, &map.pirq,
-                               &msi);
+
+        d = rcu_lock_domain_by_any_id(map.domid);
+        ret = -ESRCH;
+        if ( !d )
+            break;
+
+        ret = physdev_map_pirq(d, map.type, &map.index, &map.pirq, &msi);
+
+        rcu_unlock_domain(d);
 
         if ( map.type == MAP_PIRQ_TYPE_MULTI_MSI )
             map.entry_nr = msi.entry_nr;
@@ -348,7 +341,15 @@ ret_t do_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
         if ( copy_from_guest(&unmap, arg, 1) != 0 )
             break;
 
-        ret = physdev_unmap_pirq(unmap.domid, unmap.pirq);
+        d = rcu_lock_domain_by_any_id(unmap.domid);
+        ret = -ESRCH;
+        if ( !d )
+            break;
+
+        ret = physdev_unmap_pirq(d, unmap.pirq);
+
+        rcu_unlock_domain(d);
+
         break;
     }
 
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: ffa: refactor ffa_handle_call()
Message-Id: <E1sHjyq-0005F5-1n@xenbits.xenproject.org>
Date: Thu, 13 Jun 2024 12:55:04 +0000

commit 66e6e47511d1894ab18d69221207069d8e93c7b6
Author:     Jens Wiklander <jens.wiklander@linaro.org>
AuthorDate: Mon Jun 10 08:53:37 2024 +0200
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 13 13:43:32 2024 +0100

    xen/arm: ffa: refactor ffa_handle_call()
    
    Refactors the large switch block in ffa_handle_call() to use common code
    for the simple case where it's either an error code or success with no
    further parameters.
    
    Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/tee/ffa.c | 30 ++++++++++--------------------
 1 file changed, 10 insertions(+), 20 deletions(-)

diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c
index 8665201e34..5209612963 100644
--- a/xen/arch/arm/tee/ffa.c
+++ b/xen/arch/arm/tee/ffa.c
@@ -273,18 +273,10 @@ static bool ffa_handle_call(struct cpu_user_regs *regs)
     case FFA_RXTX_MAP_64:
         e = ffa_handle_rxtx_map(fid, get_user_reg(regs, 1),
 				get_user_reg(regs, 2), get_user_reg(regs, 3));
-        if ( e )
-            ffa_set_regs_error(regs, e);
-        else
-            ffa_set_regs_success(regs, 0, 0);
-        return true;
+        break;
     case FFA_RXTX_UNMAP:
         e = ffa_handle_rxtx_unmap();
-        if ( e )
-            ffa_set_regs_error(regs, e);
-        else
-            ffa_set_regs_success(regs, 0, 0);
-        return true;
+        break;
     case FFA_PARTITION_INFO_GET:
         e = ffa_handle_partition_info_get(get_user_reg(regs, 1),
                                           get_user_reg(regs, 2),
@@ -299,11 +291,7 @@ static bool ffa_handle_call(struct cpu_user_regs *regs)
         return true;
     case FFA_RX_RELEASE:
         e = ffa_handle_rx_release();
-        if ( e )
-            ffa_set_regs_error(regs, e);
-        else
-            ffa_set_regs_success(regs, 0, 0);
-        return true;
+        break;
     case FFA_MSG_SEND_DIRECT_REQ_32:
     case FFA_MSG_SEND_DIRECT_REQ_64:
         handle_msg_send_direct_req(regs, fid);
@@ -316,17 +304,19 @@ static bool ffa_handle_call(struct cpu_user_regs *regs)
         e = ffa_handle_mem_reclaim(regpair_to_uint64(get_user_reg(regs, 2),
                                                      get_user_reg(regs, 1)),
                                    get_user_reg(regs, 3));
-        if ( e )
-            ffa_set_regs_error(regs, e);
-        else
-            ffa_set_regs_success(regs, 0, 0);
-        return true;
+        break;
 
     default:
         gprintk(XENLOG_ERR, "ffa: unhandled fid 0x%x\n", fid);
         ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED);
         return true;
     }
+
+    if ( e )
+        ffa_set_regs_error(regs, e);
+    else
+        ffa_set_regs_success(regs, 0, 0);
+    return true;
 }
 
 static int ffa_domain_init(struct domain *d)
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: ffa: use ACCESS_ONCE()
Message-Id: <E1sHjz0-0005Fq-5l@xenbits.xenproject.org>
Date: Thu, 13 Jun 2024 12:55:14 +0000

commit 4d2b1b5d6933e3ef26fb4905892007921205aaff
Author:     Jens Wiklander <jens.wiklander@linaro.org>
AuthorDate: Mon Jun 10 08:53:38 2024 +0200
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 13 13:43:39 2024 +0100

    xen/arm: ffa: use ACCESS_ONCE()
    
    Replace read_atomic() with ACCESS_ONCE() to match the intended use, that
    is, to prevent the compiler from (via optimization) reading shared
    memory more than once.
    
    Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/tee/ffa_shm.c | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/xen/arch/arm/tee/ffa_shm.c b/xen/arch/arm/tee/ffa_shm.c
index eed9ad2d29..75a5b66aeb 100644
--- a/xen/arch/arm/tee/ffa_shm.c
+++ b/xen/arch/arm/tee/ffa_shm.c
@@ -7,6 +7,7 @@
 #include <xen/sizes.h>
 #include <xen/types.h>
 #include <xen/mm.h>
+#include <xen/lib.h>
 #include <xen/list.h>
 #include <xen/spinlock.h>
 
@@ -171,8 +172,8 @@ static int get_shm_pages(struct domain *d, struct ffa_shm_mem *shm,
 
     for ( n = 0; n < range_count; n++ )
     {
-        page_count = read_atomic(&range[n].page_count);
-        addr = read_atomic(&range[n].address);
+        page_count = ACCESS_ONCE(range[n].page_count);
+        addr = ACCESS_ONCE(range[n].address);
         for ( m = 0; m < page_count; m++ )
         {
             if ( pg_idx >= shm->page_count )
@@ -527,13 +528,13 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs)
         goto out_unlock;
 
     mem_access = ctx->tx + trans.mem_access_offs;
-    if ( read_atomic(&mem_access->access_perm.perm) != FFA_MEM_ACC_RW )
+    if ( ACCESS_ONCE(mem_access->access_perm.perm) != FFA_MEM_ACC_RW )
     {
         ret = FFA_RET_NOT_SUPPORTED;
         goto out_unlock;
     }
 
-    region_offs = read_atomic(&mem_access->region_offs);
+    region_offs = ACCESS_ONCE(mem_access->region_offs);
     if ( sizeof(*region_descr) + region_offs > frag_len )
     {
         ret = FFA_RET_NOT_SUPPORTED;
@@ -541,8 +542,8 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs)
     }
 
     region_descr = ctx->tx + region_offs;
-    range_count = read_atomic(&region_descr->address_range_count);
-    page_count = read_atomic(&region_descr->total_page_count);
+    range_count = ACCESS_ONCE(region_descr->address_range_count);
+    page_count = ACCESS_ONCE(region_descr->total_page_count);
 
     if ( !page_count )
     {
@@ -557,7 +558,7 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs)
         goto out_unlock;
     }
     shm->sender_id = trans.sender_id;
-    shm->ep_id = read_atomic(&mem_access->access_perm.endpoint_id);
+    shm->ep_id = ACCESS_ONCE(mem_access->access_perm.endpoint_id);
 
     /*
      * Check that the Composite memory region descriptor fits.
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: ffa: simplify ffa_handle_mem_share()
Message-Id: <E1sHjzA-0005GP-8r@xenbits.xenproject.org>
Date: Thu, 13 Jun 2024 12:55:24 +0000

commit 282c33cec3dc04d052078450eb98ceb2bb2515af
Author:     Jens Wiklander <jens.wiklander@linaro.org>
AuthorDate: Mon Jun 10 08:53:39 2024 +0200
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 13 13:43:41 2024 +0100

    xen/arm: ffa: simplify ffa_handle_mem_share()
    
    Simplify ffa_handle_mem_share() by removing the start_page_idx and
    last_page_idx parameters from get_shm_pages() and check that the number
    of pages matches expectations at the end of get_shm_pages().
    
    Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/tee/ffa_shm.c | 18 ++++++------------
 1 file changed, 6 insertions(+), 12 deletions(-)

diff --git a/xen/arch/arm/tee/ffa_shm.c b/xen/arch/arm/tee/ffa_shm.c
index 75a5b66aeb..370d83ec5c 100644
--- a/xen/arch/arm/tee/ffa_shm.c
+++ b/xen/arch/arm/tee/ffa_shm.c
@@ -159,10 +159,9 @@ static int32_t ffa_mem_reclaim(uint32_t handle_lo, uint32_t handle_hi,
  */
 static int get_shm_pages(struct domain *d, struct ffa_shm_mem *shm,
                          const struct ffa_address_range *range,
-                         uint32_t range_count, unsigned int start_page_idx,
-                         unsigned int *last_page_idx)
+                         uint32_t range_count)
 {
-    unsigned int pg_idx = start_page_idx;
+    unsigned int pg_idx = 0;
     gfn_t gfn;
     unsigned int n;
     unsigned int m;
@@ -191,7 +190,9 @@ static int get_shm_pages(struct domain *d, struct ffa_shm_mem *shm,
         }
     }
 
-    *last_page_idx = pg_idx;
+    /* The ranges must add up */
+    if ( pg_idx < shm->page_count )
+            return FFA_RET_INVALID_PARAMETERS;
 
     return FFA_RET_OK;
 }
@@ -460,7 +461,6 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs)
     struct domain *d = current->domain;
     struct ffa_ctx *ctx = d->arch.tee;
     struct ffa_shm_mem *shm = NULL;
-    unsigned int last_page_idx = 0;
     register_t handle_hi = 0;
     register_t handle_lo = 0;
     int ret = FFA_RET_DENIED;
@@ -570,15 +570,9 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs)
         goto out;
     }
 
-    ret = get_shm_pages(d, shm, region_descr->address_range_array, range_count,
-                        0, &last_page_idx);
+    ret = get_shm_pages(d, shm, region_descr->address_range_array, range_count);
     if ( ret )
         goto out;
-    if ( last_page_idx != shm->page_count )
-    {
-        ret = FFA_RET_INVALID_PARAMETERS;
-        goto out;
-    }
 
     /* Note that share_shm() uses our tx buffer */
     spin_lock(&ffa_tx_buffer_lock);
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: allow dynamically assigned SGI handlers
Message-Id: <E1sHjzK-0005HG-CM@xenbits.xenproject.org>
Date: Thu, 13 Jun 2024 12:55:34 +0000

commit 67ef3db45a6e5c35f6491b109d88286780652b9a
Author:     Jens Wiklander <jens.wiklander@linaro.org>
AuthorDate: Mon Jun 10 08:53:40 2024 +0200
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 13 13:43:44 2024 +0100

    xen/arm: allow dynamically assigned SGI handlers
    
    Updates so request_irq() can be used with a dynamically assigned SGI irq
    as input. This prepares for a later patch where an FF-A schedule
    receiver interrupt handler is installed for an SGI generated by the
    secure world.
    
    >From the Arm Base System Architecture v1.0C [1]:
    "The system shall implement at least eight Non-secure SGIs, assigned to
    interrupt IDs 0-7."
    
    gic_route_irq_to_xen() don't gic_set_irq_type() for SGIs since they are
    always edge triggered.
    
    gic_interrupt() is updated to route the dynamically assigned SGIs to
    do_IRQ() instead of do_sgi(). The latter still handles the statically
    assigned SGI handlers like for instance GIC_SGI_CALL_FUNCTION.
    
    [1] https://developer.arm.com/documentation/den0094/
    
    Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
    Acked-by: Julien Grall <jgrall@amazon.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/gic.c             | 12 +++++++-----
 xen/arch/arm/include/asm/gic.h |  2 +-
 xen/arch/arm/irq.c             | 18 ++++++++++++++----
 3 files changed, 22 insertions(+), 10 deletions(-)

diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c
index b3467a76ae..3eaf670fd7 100644
--- a/xen/arch/arm/gic.c
+++ b/xen/arch/arm/gic.c
@@ -38,7 +38,7 @@ const struct gic_hw_operations *gic_hw_ops;
 static void __init __maybe_unused build_assertions(void)
 {
     /* Check our enum gic_sgi only covers SGIs */
-    BUILD_BUG_ON(GIC_SGI_MAX > NR_GIC_SGI);
+    BUILD_BUG_ON(GIC_SGI_STATIC_MAX > NR_GIC_SGI);
 }
 
 void register_gic_ops(const struct gic_hw_operations *ops)
@@ -117,7 +117,9 @@ void gic_route_irq_to_xen(struct irq_desc *desc, unsigned int priority)
 
     desc->handler = gic_hw_ops->gic_host_irq_type;
 
-    gic_set_irq_type(desc, desc->arch.type);
+    /* SGIs are always edge-triggered, so there is need to set it */
+    if ( desc->irq >= NR_GIC_SGI)
+        gic_set_irq_type(desc, desc->arch.type);
     gic_set_irq_priority(desc, priority);
 }
 
@@ -322,7 +324,7 @@ void gic_disable_cpu(void)
     gic_hw_ops->disable_interface();
 }
 
-static void do_sgi(struct cpu_user_regs *regs, enum gic_sgi sgi)
+static void do_static_sgi(struct cpu_user_regs *regs, enum gic_sgi sgi)
 {
     struct irq_desc *desc = irq_to_desc(sgi);
 
@@ -367,7 +369,7 @@ void gic_interrupt(struct cpu_user_regs *regs, int is_fiq)
         /* Reading IRQ will ACK it */
         irq = gic_hw_ops->read_irq();
 
-        if ( likely(irq >= 16 && irq < 1020) )
+        if ( likely(irq >= GIC_SGI_STATIC_MAX && irq < 1020) )
         {
             isb();
             do_IRQ(regs, irq, is_fiq);
@@ -379,7 +381,7 @@ void gic_interrupt(struct cpu_user_regs *regs, int is_fiq)
         }
         else if ( unlikely(irq < 16) )
         {
-            do_sgi(regs, irq);
+            do_static_sgi(regs, irq);
         }
         else
         {
diff --git a/xen/arch/arm/include/asm/gic.h b/xen/arch/arm/include/asm/gic.h
index 03f209529b..541f0eeb80 100644
--- a/xen/arch/arm/include/asm/gic.h
+++ b/xen/arch/arm/include/asm/gic.h
@@ -285,7 +285,7 @@ enum gic_sgi {
     GIC_SGI_EVENT_CHECK,
     GIC_SGI_DUMP_STATE,
     GIC_SGI_CALL_FUNCTION,
-    GIC_SGI_MAX,
+    GIC_SGI_STATIC_MAX,
 };
 
 /* SGI irq mode types */
diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c
index e5fb26a3de..c60502444c 100644
--- a/xen/arch/arm/irq.c
+++ b/xen/arch/arm/irq.c
@@ -142,7 +142,13 @@ void __init init_IRQ(void)
 
     spin_lock(&local_irqs_type_lock);
     for ( irq = 0; irq < NR_LOCAL_IRQS; irq++ )
-        local_irqs_type[irq] = IRQ_TYPE_INVALID;
+    {
+        /* SGIs are always edge-triggered */
+        if ( irq < NR_GIC_SGI )
+            local_irqs_type[irq] = IRQ_TYPE_EDGE_RISING;
+        else
+            local_irqs_type[irq] = IRQ_TYPE_INVALID;
+    }
     spin_unlock(&local_irqs_type_lock);
 
     BUG_ON(init_local_irq_data(smp_processor_id()) < 0);
@@ -214,9 +220,12 @@ void do_IRQ(struct cpu_user_regs *regs, unsigned int irq, int is_fiq)
 
     perfc_incr(irqs);
 
-    ASSERT(irq >= 16); /* SGIs do not come down this path */
+    /* Statically assigned SGIs do not come down this path */
+    ASSERT(irq >= GIC_SGI_STATIC_MAX);
 
-    if ( irq < 32 )
+    if ( irq < NR_GIC_SGI )
+        perfc_incr(ipis);
+    else if ( irq < NR_GIC_LOCAL_IRQS )
         perfc_incr(ppis);
     else
         perfc_incr(spis);
@@ -250,6 +259,7 @@ void do_IRQ(struct cpu_user_regs *regs, unsigned int irq, int is_fiq)
          * The irq cannot be a PPI, we only support delivery of SPIs to
          * guests.
          */
+        ASSERT(irq >= NR_GIC_SGI);
         vgic_inject_irq(info->d, NULL, info->virq, true);
         goto out_no_end;
     }
@@ -386,7 +396,7 @@ int setup_irq(unsigned int irq, unsigned int irqflags, struct irqaction *new)
     {
         gic_route_irq_to_xen(desc, GIC_PRI_IRQ);
         /* It's fine to use smp_processor_id() because:
-         * For PPI: irq_desc is banked
+         * For SGI and PPI: irq_desc is banked
          * For SPI: we don't care for now which CPU will receive the
          * interrupt
          * TODO: Handle case where SPI is setup on different CPU than
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: add and call init_tee_secondary()
Message-Id: <E1sHjzU-0005I9-FP@xenbits.xenproject.org>
Date: Thu, 13 Jun 2024 12:55:44 +0000

commit dd348eb0053e13e49fc162082771f6f1d9cca654
Author:     Jens Wiklander <jens.wiklander@linaro.org>
AuthorDate: Mon Jun 10 08:53:41 2024 +0200
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 13 13:43:49 2024 +0100

    xen/arm: add and call init_tee_secondary()
    
    Add init_tee_secondary() to the TEE mediator framework and call it from
    start_secondary() late enough that per-cpu interrupts can be configured
    on CPUs as they are initialized. This is needed in later patches.
    
    Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/include/asm/tee/tee.h | 8 ++++++++
 xen/arch/arm/smpboot.c             | 2 ++
 xen/arch/arm/tee/tee.c             | 6 ++++++
 3 files changed, 16 insertions(+)

diff --git a/xen/arch/arm/include/asm/tee/tee.h b/xen/arch/arm/include/asm/tee/tee.h
index da324467e1..6bc13da885 100644
--- a/xen/arch/arm/include/asm/tee/tee.h
+++ b/xen/arch/arm/include/asm/tee/tee.h
@@ -28,6 +28,9 @@ struct tee_mediator_ops {
      */
     bool (*probe)(void);
 
+    /* Initialize secondary CPUs */
+    void (*init_secondary)(void);
+
     /*
      * Called during domain construction if toolstack requests to enable
      * TEE support so mediator can inform TEE about new
@@ -66,6 +69,7 @@ int tee_domain_init(struct domain *d, uint16_t tee_type);
 int tee_domain_teardown(struct domain *d);
 int tee_relinquish_resources(struct domain *d);
 uint16_t tee_get_type(void);
+void init_tee_secondary(void);
 
 #define REGISTER_TEE_MEDIATOR(_name, _namestr, _type, _ops)         \
 static const struct tee_mediator_desc __tee_desc_##_name __used     \
@@ -105,6 +109,10 @@ static inline uint16_t tee_get_type(void)
     return XEN_DOMCTL_CONFIG_TEE_NONE;
 }
 
+static inline void init_tee_secondary(void)
+{
+}
+
 #endif  /* CONFIG_TEE */
 
 #endif /* __ARCH_ARM_TEE_TEE_H__ */
diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c
index 93a10d7721..04e363088d 100644
--- a/xen/arch/arm/smpboot.c
+++ b/xen/arch/arm/smpboot.c
@@ -29,6 +29,7 @@
 #include <asm/procinfo.h>
 #include <asm/psci.h>
 #include <asm/acpi.h>
+#include <asm/tee/tee.h>
 
 /* Override macros from asm/page.h to make them work with mfn_t */
 #undef virt_to_mfn
@@ -401,6 +402,7 @@ void asmlinkage start_secondary(void)
      */
     init_maintenance_interrupt();
     init_timer_interrupt();
+    init_tee_secondary();
 
     local_abort_enable();
 
diff --git a/xen/arch/arm/tee/tee.c b/xen/arch/arm/tee/tee.c
index ddd17506a9..9fd1d7495b 100644
--- a/xen/arch/arm/tee/tee.c
+++ b/xen/arch/arm/tee/tee.c
@@ -96,6 +96,12 @@ static int __init tee_init(void)
 
 __initcall(tee_init);
 
+void __init init_tee_secondary(void)
+{
+    if ( cur_mediator && cur_mediator->ops->init_secondary )
+        cur_mediator->ops->init_secondary();
+}
+
 /*
  * Local variables:
  * mode: C
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: add and call tee_free_domain_ctx()
Message-Id: <E1sHjze-0005Ip-Ic@xenbits.xenproject.org>
Date: Thu, 13 Jun 2024 12:55:54 +0000

commit 452551c723d28935cba25bf9719b1a1a99abc951
Author:     Jens Wiklander <jens.wiklander@linaro.org>
AuthorDate: Mon Jun 10 08:53:42 2024 +0200
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 13 13:43:53 2024 +0100

    xen/arm: add and call tee_free_domain_ctx()
    
    Add tee_free_domain_ctx() to the TEE mediator framework.
    tee_free_domain_ctx() is called from arch_domain_destroy() to allow late
    freeing of the d->arch.tee context. This will simplify access to
    d->arch.tee for domains retrieved with rcu_lock_domain_by_id().
    
    Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/domain.c              | 1 +
 xen/arch/arm/include/asm/tee/tee.h | 6 ++++++
 xen/arch/arm/tee/tee.c             | 6 ++++++
 3 files changed, 13 insertions(+)

diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
index 8bde2f730d..7cfcefd279 100644
--- a/xen/arch/arm/domain.c
+++ b/xen/arch/arm/domain.c
@@ -843,6 +843,7 @@ int arch_domain_teardown(struct domain *d)
 
 void arch_domain_destroy(struct domain *d)
 {
+    tee_free_domain_ctx(d);
     /* IOMMU page table is shared with P2M, always call
      * iommu_domain_destroy() before p2m_final_teardown().
      */
diff --git a/xen/arch/arm/include/asm/tee/tee.h b/xen/arch/arm/include/asm/tee/tee.h
index 6bc13da885..0169fd746b 100644
--- a/xen/arch/arm/include/asm/tee/tee.h
+++ b/xen/arch/arm/include/asm/tee/tee.h
@@ -38,6 +38,7 @@ struct tee_mediator_ops {
      */
     int (*domain_init)(struct domain *d);
     int (*domain_teardown)(struct domain *d);
+    void (*free_domain_ctx)(struct domain *d);
 
     /*
      * Called during domain destruction to relinquish resources used
@@ -70,6 +71,7 @@ int tee_domain_teardown(struct domain *d);
 int tee_relinquish_resources(struct domain *d);
 uint16_t tee_get_type(void);
 void init_tee_secondary(void);
+void tee_free_domain_ctx(struct domain *d);
 
 #define REGISTER_TEE_MEDIATOR(_name, _namestr, _type, _ops)         \
 static const struct tee_mediator_desc __tee_desc_##_name __used     \
@@ -113,6 +115,10 @@ static inline void init_tee_secondary(void)
 {
 }
 
+static inline void tee_free_domain_ctx(struct domain *d)
+{
+}
+
 #endif  /* CONFIG_TEE */
 
 #endif /* __ARCH_ARM_TEE_TEE_H__ */
diff --git a/xen/arch/arm/tee/tee.c b/xen/arch/arm/tee/tee.c
index 9fd1d7495b..b1cae16c17 100644
--- a/xen/arch/arm/tee/tee.c
+++ b/xen/arch/arm/tee/tee.c
@@ -102,6 +102,12 @@ void __init init_tee_secondary(void)
         cur_mediator->ops->init_secondary();
 }
 
+void tee_free_domain_ctx(struct domain *d)
+{
+    if ( cur_mediator && cur_mediator->ops->free_domain_ctx)
+        cur_mediator->ops->free_domain_ctx(d);
+}
+
 /*
  * Local variables:
  * mode: C
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: ffa: support notification
Message-Id: <E1sHjzo-0005KP-Li@xenbits.xenproject.org>
Date: Thu, 13 Jun 2024 12:56:04 +0000

commit b490f470f58d0b87653bfbee23c7e9342b049ab4
Author:     Jens Wiklander <jens.wiklander@linaro.org>
AuthorDate: Mon Jun 10 08:53:43 2024 +0200
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 13 13:43:56 2024 +0100

    xen/arm: ffa: support notification
    
    Add support for FF-A notifications, currently limited to an SP (Secure
    Partition) sending an asynchronous notification to a guest.
    
    Guests and Xen itself are made aware of pending notifications with an
    interrupt. The interrupt handler triggers a tasklet to retrieve the
    notifications using the FF-A ABI and deliver them to their destinations.
    
    Update ffa_partinfo_domain_init() to return error code like
    ffa_notif_domain_init().
    
    Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/tee/Makefile       |   1 +
 xen/arch/arm/tee/ffa.c          |  77 +++++++-
 xen/arch/arm/tee/ffa_notif.c    | 425 ++++++++++++++++++++++++++++++++++++++++
 xen/arch/arm/tee/ffa_partinfo.c |   9 +-
 xen/arch/arm/tee/ffa_private.h  |  56 +++++-
 xen/arch/arm/tee/tee.c          |   2 +-
 xen/include/public/arch-arm.h   |  14 ++
 7 files changed, 569 insertions(+), 15 deletions(-)

diff --git a/xen/arch/arm/tee/Makefile b/xen/arch/arm/tee/Makefile
index f0112a2f92..7c0f46f7f4 100644
--- a/xen/arch/arm/tee/Makefile
+++ b/xen/arch/arm/tee/Makefile
@@ -2,5 +2,6 @@ obj-$(CONFIG_FFA) += ffa.o
 obj-$(CONFIG_FFA) += ffa_shm.o
 obj-$(CONFIG_FFA) += ffa_partinfo.o
 obj-$(CONFIG_FFA) += ffa_rxtx.o
+obj-$(CONFIG_FFA) += ffa_notif.o
 obj-y += tee.o
 obj-$(CONFIG_OPTEE) += optee.o
diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c
index 5209612963..022089278e 100644
--- a/xen/arch/arm/tee/ffa.c
+++ b/xen/arch/arm/tee/ffa.c
@@ -39,6 +39,12 @@
  *   - at most 32 shared memory regions per guest
  * o FFA_MSG_SEND_DIRECT_REQ:
  *   - only supported from a VM to an SP
+ * o FFA_NOTIFICATION_*:
+ *   - only supports global notifications, that is, per vCPU notifications
+ *     are not supported
+ *   - doesn't support signalling the secondary scheduler of pending
+ *     notification for secure partitions
+ *   - doesn't support notifications for Xen itself
  *
  * There are some large locked sections with ffa_tx_buffer_lock and
  * ffa_rx_buffer_lock. Especially the ffa_tx_buffer_lock spinlock used
@@ -194,6 +200,8 @@ out:
 
 static void handle_features(struct cpu_user_regs *regs)
 {
+    struct domain *d = current->domain;
+    struct ffa_ctx *ctx = d->arch.tee;
     uint32_t a1 = get_user_reg(regs, 1);
     unsigned int n;
 
@@ -240,6 +248,30 @@ static void handle_features(struct cpu_user_regs *regs)
         BUILD_BUG_ON(PAGE_SIZE != FFA_PAGE_SIZE);
         ffa_set_regs_success(regs, 0, 0);
         break;
+    case FFA_FEATURE_NOTIF_PEND_INTR:
+        if ( ctx->notif.enabled )
+            ffa_set_regs_success(regs, GUEST_FFA_NOTIF_PEND_INTR_ID, 0);
+        else
+            ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED);
+        break;
+    case FFA_FEATURE_SCHEDULE_RECV_INTR:
+        if ( ctx->notif.enabled )
+            ffa_set_regs_success(regs, GUEST_FFA_SCHEDULE_RECV_INTR_ID, 0);
+        else
+            ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED);
+        break;
+
+    case FFA_NOTIFICATION_BIND:
+    case FFA_NOTIFICATION_UNBIND:
+    case FFA_NOTIFICATION_GET:
+    case FFA_NOTIFICATION_SET:
+    case FFA_NOTIFICATION_INFO_GET_32:
+    case FFA_NOTIFICATION_INFO_GET_64:
+        if ( ctx->notif.enabled )
+            ffa_set_regs_success(regs, 0, 0);
+        else
+            ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED);
+        break;
     default:
         ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED);
         break;
@@ -305,6 +337,22 @@ static bool ffa_handle_call(struct cpu_user_regs *regs)
                                                      get_user_reg(regs, 1)),
                                    get_user_reg(regs, 3));
         break;
+    case FFA_NOTIFICATION_BIND:
+        e = ffa_handle_notification_bind(regs);
+        break;
+    case FFA_NOTIFICATION_UNBIND:
+        e = ffa_handle_notification_unbind(regs);
+        break;
+    case FFA_NOTIFICATION_INFO_GET_32:
+    case FFA_NOTIFICATION_INFO_GET_64:
+        ffa_handle_notification_info_get(regs);
+        return true;
+    case FFA_NOTIFICATION_GET:
+        ffa_handle_notification_get(regs);
+        return true;
+    case FFA_NOTIFICATION_SET:
+        e = ffa_handle_notification_set(regs);
+        break;
 
     default:
         gprintk(XENLOG_ERR, "ffa: unhandled fid 0x%x\n", fid);
@@ -322,6 +370,7 @@ static bool ffa_handle_call(struct cpu_user_regs *regs)
 static int ffa_domain_init(struct domain *d)
 {
     struct ffa_ctx *ctx;
+    int ret;
 
     if ( !ffa_version )
         return -ENODEV;
@@ -345,10 +394,11 @@ static int ffa_domain_init(struct domain *d)
      * error, so no need for cleanup in this function.
      */
 
-    if ( !ffa_partinfo_domain_init(d) )
-        return -EIO;
+    ret = ffa_partinfo_domain_init(d);
+    if ( ret )
+        return ret;
 
-    return 0;
+    return ffa_notif_domain_init(d);
 }
 
 static void ffa_domain_teardown_continue(struct ffa_ctx *ctx, bool first_time)
@@ -376,13 +426,6 @@ static void ffa_domain_teardown_continue(struct ffa_ctx *ctx, bool first_time)
     }
     else
     {
-        /*
-         * domain_destroy() might have been called (via put_domain() in
-         * ffa_reclaim_shms()), so we can't touch the domain structure
-         * anymore.
-         */
-        xfree(ctx);
-
         /* Only check if there has been a change to the teardown queue */
         if ( !first_time )
         {
@@ -423,17 +466,28 @@ static int ffa_domain_teardown(struct domain *d)
         return 0;
 
     ffa_rxtx_domain_destroy(d);
+    ffa_notif_domain_destroy(d);
 
     ffa_domain_teardown_continue(ctx, true /* first_time */);
 
     return 0;
 }
 
+static void ffa_free_domain_ctx(struct domain *d)
+{
+    XFREE(d->arch.tee);
+}
+
 static int ffa_relinquish_resources(struct domain *d)
 {
     return 0;
 }
 
+static void ffa_init_secondary(void)
+{
+    ffa_notif_init_interrupt();
+}
+
 static bool ffa_probe(void)
 {
     uint32_t vers;
@@ -502,6 +556,7 @@ static bool ffa_probe(void)
     if ( !ffa_partinfo_init() )
         goto err_rxtx_destroy;
 
+    ffa_notif_init();
     INIT_LIST_HEAD(&ffa_teardown_head);
     init_timer(&ffa_teardown_timer, ffa_teardown_timer_callback, NULL, 0);
 
@@ -517,8 +572,10 @@ err_rxtx_destroy:
 static const struct tee_mediator_ops ffa_ops =
 {
     .probe = ffa_probe,
+    .init_secondary = ffa_init_secondary,
     .domain_init = ffa_domain_init,
     .domain_teardown = ffa_domain_teardown,
+    .free_domain_ctx = ffa_free_domain_ctx,
     .relinquish_resources = ffa_relinquish_resources,
     .handle_call = ffa_handle_call,
 };
diff --git a/xen/arch/arm/tee/ffa_notif.c b/xen/arch/arm/tee/ffa_notif.c
new file mode 100644
index 0000000000..541e61d2f6
--- /dev/null
+++ b/xen/arch/arm/tee/ffa_notif.c
@@ -0,0 +1,425 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2024  Linaro Limited
+ */
+
+#include <xen/const.h>
+#include <xen/cpu.h>
+#include <xen/list.h>
+#include <xen/notifier.h>
+#include <xen/spinlock.h>
+#include <xen/tasklet.h>
+#include <xen/types.h>
+
+#include <asm/smccc.h>
+#include <asm/regs.h>
+
+#include "ffa_private.h"
+
+static bool __ro_after_init notif_enabled;
+static unsigned int __ro_after_init notif_sri_irq;
+
+int ffa_handle_notification_bind(struct cpu_user_regs *regs)
+{
+    struct domain *d = current->domain;
+    uint32_t src_dst = get_user_reg(regs, 1);
+    uint32_t flags = get_user_reg(regs, 2);
+    uint32_t bitmap_lo = get_user_reg(regs, 3);
+    uint32_t bitmap_hi = get_user_reg(regs, 4);
+
+    if ( !notif_enabled )
+        return FFA_RET_NOT_SUPPORTED;
+
+    if ( (src_dst & 0xFFFFU) != ffa_get_vm_id(d) )
+        return FFA_RET_INVALID_PARAMETERS;
+
+    if ( flags )    /* Only global notifications are supported */
+        return FFA_RET_DENIED;
+
+    /*
+     * We only support notifications from SP so no need to check the sender
+     * endpoint ID, the SPMC will take care of that for us.
+     */
+    return ffa_simple_call(FFA_NOTIFICATION_BIND, src_dst, flags, bitmap_hi,
+                           bitmap_lo);
+}
+
+int ffa_handle_notification_unbind(struct cpu_user_regs *regs)
+{
+    struct domain *d = current->domain;
+    uint32_t src_dst = get_user_reg(regs, 1);
+    uint32_t bitmap_lo = get_user_reg(regs, 3);
+    uint32_t bitmap_hi = get_user_reg(regs, 4);
+
+    if ( !notif_enabled )
+        return FFA_RET_NOT_SUPPORTED;
+
+    if ( (src_dst & 0xFFFFU) != ffa_get_vm_id(d) )
+        return FFA_RET_INVALID_PARAMETERS;
+
+    /*
+     * We only support notifications from SP so no need to check the
+     * destination endpoint ID, the SPMC will take care of that for us.
+     */
+    return  ffa_simple_call(FFA_NOTIFICATION_UNBIND, src_dst, 0, bitmap_hi,
+                            bitmap_lo);
+}
+
+void ffa_handle_notification_info_get(struct cpu_user_regs *regs)
+{
+    struct domain *d = current->domain;
+    struct ffa_ctx *ctx = d->arch.tee;
+
+    if ( !notif_enabled )
+    {
+        ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED);
+        return;
+    }
+
+    if ( test_and_clear_bool(ctx->notif.secure_pending) )
+    {
+        /* A pending global notification for the guest */
+        ffa_set_regs(regs, FFA_SUCCESS_64, 0,
+                     1U << FFA_NOTIF_INFO_GET_ID_COUNT_SHIFT, ffa_get_vm_id(d),
+                     0, 0, 0, 0);
+    }
+    else
+    {
+        /* Report an error if there where no pending global notification */
+        ffa_set_regs_error(regs, FFA_RET_NO_DATA);
+    }
+}
+
+void ffa_handle_notification_get(struct cpu_user_regs *regs)
+{
+    struct domain *d = current->domain;
+    uint32_t recv = get_user_reg(regs, 1);
+    uint32_t flags = get_user_reg(regs, 2);
+    uint32_t w2 = 0;
+    uint32_t w3 = 0;
+    uint32_t w4 = 0;
+    uint32_t w5 = 0;
+    uint32_t w6 = 0;
+    uint32_t w7 = 0;
+
+    if ( !notif_enabled )
+    {
+        ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED);
+        return;
+    }
+
+    if ( (recv & 0xFFFFU) != ffa_get_vm_id(d) )
+    {
+        ffa_set_regs_error(regs, FFA_RET_INVALID_PARAMETERS);
+        return;
+    }
+
+    if ( flags & ( FFA_NOTIF_FLAG_BITMAP_SP | FFA_NOTIF_FLAG_BITMAP_SPM ) )
+    {
+        struct arm_smccc_1_2_regs arg = {
+            .a0 = FFA_NOTIFICATION_GET,
+            .a1 = recv,
+            .a2 = flags & ( FFA_NOTIF_FLAG_BITMAP_SP |
+                            FFA_NOTIF_FLAG_BITMAP_SPM ),
+        };
+        struct arm_smccc_1_2_regs resp;
+        int32_t e;
+
+        /*
+         * Clear secure pending if both FFA_NOTIF_FLAG_BITMAP_SP and
+         * FFA_NOTIF_FLAG_BITMAP_SPM are set since secure world can't have
+         * any more pending notifications.
+         */
+        if ( ( flags  & FFA_NOTIF_FLAG_BITMAP_SP ) &&
+             ( flags & FFA_NOTIF_FLAG_BITMAP_SPM ) )
+        {
+                struct ffa_ctx *ctx = d->arch.tee;
+
+                ACCESS_ONCE(ctx->notif.secure_pending) = false;
+        }
+
+        arm_smccc_1_2_smc(&arg, &resp);
+        e = ffa_get_ret_code(&resp);
+        if ( e )
+        {
+            ffa_set_regs_error(regs, e);
+            return;
+        }
+
+        if ( flags & FFA_NOTIF_FLAG_BITMAP_SP )
+        {
+            w2 = resp.a2;
+            w3 = resp.a3;
+        }
+
+        if ( flags & FFA_NOTIF_FLAG_BITMAP_SPM )
+            w6 = resp.a6;
+    }
+
+    ffa_set_regs(regs, FFA_SUCCESS_32, 0, w2, w3, w4, w5, w6, w7);
+}
+
+int ffa_handle_notification_set(struct cpu_user_regs *regs)
+{
+    struct domain *d = current->domain;
+    uint32_t src_dst = get_user_reg(regs, 1);
+    uint32_t flags = get_user_reg(regs, 2);
+    uint32_t bitmap_lo = get_user_reg(regs, 3);
+    uint32_t bitmap_hi = get_user_reg(regs, 4);
+
+    if ( !notif_enabled )
+        return FFA_RET_NOT_SUPPORTED;
+
+    if ( (src_dst >> 16) != ffa_get_vm_id(d) )
+        return FFA_RET_INVALID_PARAMETERS;
+
+    /* Let the SPMC check the destination of the notification */
+    return ffa_simple_call(FFA_NOTIFICATION_SET, src_dst, flags, bitmap_lo,
+                           bitmap_hi);
+}
+
+/*
+ * Extract a 16-bit ID (index n) from the successful return value from
+ * FFA_NOTIFICATION_INFO_GET_64 or FFA_NOTIFICATION_INFO_GET_32. IDs are
+ * returned in registers 3 to 7 with four IDs per register for 64-bit
+ * calling convention and two IDs per register for 32-bit calling
+ * convention.
+ */
+static uint16_t get_id_from_resp(struct arm_smccc_1_2_regs *resp,
+                                 unsigned int n)
+{
+    unsigned int ids_per_reg;
+    unsigned int reg_idx;
+    unsigned int reg_shift;
+
+    if ( smccc_is_conv_64(resp->a0) )
+        ids_per_reg = 4;
+    else
+        ids_per_reg = 2;
+
+    reg_idx = n / ids_per_reg + 3;
+    reg_shift = ( n % ids_per_reg ) * 16;
+
+    switch ( reg_idx )
+    {
+    case 3:
+        return resp->a3 >> reg_shift;
+    case 4:
+        return resp->a4 >> reg_shift;
+    case 5:
+        return resp->a5 >> reg_shift;
+    case 6:
+        return resp->a6 >> reg_shift;
+    case 7:
+        return resp->a7 >> reg_shift;
+    default:
+        ASSERT(0); /* "Can't happen" */
+        return 0;
+    }
+}
+
+static void notif_vm_pend_intr(uint16_t vm_id)
+{
+    struct ffa_ctx *ctx;
+    struct domain *d;
+    struct vcpu *v;
+
+    /*
+     * vm_id == 0 means a notifications pending for Xen itself, but
+     * we don't support that yet.
+     */
+    if ( !vm_id )
+        return;
+
+    /*
+     * This can fail if the domain has been destroyed after
+     * FFA_NOTIFICATION_INFO_GET_64. Ignoring this is harmless since the
+     * guest doesn't exist any more.
+     */
+    d = ffa_rcu_lock_domain_by_vm_id(vm_id);
+    if ( !d )
+        return;
+
+    /*
+     * Failing here is unlikely since the domain ID must have been reused
+     * for a new domain between the FFA_NOTIFICATION_INFO_GET_64 and
+     * ffa_rcu_lock_domain_by_vm_id() calls.
+     *
+     * Continuing on the scenario above if the domain has FF-A enabled. We
+     * can't tell here if the domain ID has been reused for a new domain so
+     * we inject an NPI. When the NPI handler in the domain calls
+     * FFA_NOTIFICATION_GET it will have accurate information, the worst
+     * case is a spurious NPI.
+     */
+    ctx = d->arch.tee;
+    if ( !ctx )
+        goto out_unlock;
+
+    /*
+     * arch.tee is freed from complete_domain_destroy() so the RCU lock
+     * guarantees that the data structure isn't freed while we're accessing
+     * it.
+     */
+    ACCESS_ONCE(ctx->notif.secure_pending) = true;
+
+    /*
+     * Since we're only delivering global notification, always
+     * deliver to the first online vCPU. It doesn't matter
+     * which we chose, as long as it's available.
+     */
+    for_each_vcpu(d, v)
+    {
+        if ( is_vcpu_online(v) )
+        {
+            vgic_inject_irq(d, v, GUEST_FFA_NOTIF_PEND_INTR_ID,
+                            true);
+            break;
+        }
+    }
+    if ( !v )
+        printk(XENLOG_ERR "ffa: can't inject NPI, all vCPUs offline\n");
+
+out_unlock:
+    rcu_unlock_domain(d);
+}
+
+static void notif_sri_action(void *unused)
+{
+    const struct arm_smccc_1_2_regs arg = {
+        .a0 = FFA_NOTIFICATION_INFO_GET_64,
+    };
+    struct arm_smccc_1_2_regs resp;
+    unsigned int id_pos;
+    unsigned int list_count;
+    uint64_t ids_count;
+    unsigned int n;
+    int32_t res;
+
+    do {
+        arm_smccc_1_2_smc(&arg, &resp);
+        res = ffa_get_ret_code(&resp);
+        if ( res )
+        {
+            if ( res != FFA_RET_NO_DATA )
+                printk(XENLOG_ERR "ffa: notification info get failed: error %d\n",
+                       res);
+            return;
+        }
+
+        ids_count = resp.a2 >> FFA_NOTIF_INFO_GET_ID_LIST_SHIFT;
+        list_count = ( resp.a2 >> FFA_NOTIF_INFO_GET_ID_COUNT_SHIFT ) &
+                     FFA_NOTIF_INFO_GET_ID_COUNT_MASK;
+
+        id_pos = 0;
+        for ( n = 0; n < list_count; n++ )
+        {
+            unsigned int count = ((ids_count >> 2 * n) & 0x3) + 1;
+            uint16_t vm_id = get_id_from_resp(&resp, id_pos);
+
+            notif_vm_pend_intr(vm_id);
+
+            id_pos += count;
+        }
+
+    } while (resp.a2 & FFA_NOTIF_INFO_GET_MORE_FLAG);
+}
+
+static DECLARE_TASKLET(notif_sri_tasklet, notif_sri_action, NULL);
+
+static void notif_irq_handler(int irq, void *data)
+{
+    tasklet_schedule(&notif_sri_tasklet);
+}
+
+static int32_t ffa_notification_bitmap_create(uint16_t vm_id,
+                                              uint32_t vcpu_count)
+{
+    return ffa_simple_call(FFA_NOTIFICATION_BITMAP_CREATE, vm_id, vcpu_count,
+                           0, 0);
+}
+
+static int32_t ffa_notification_bitmap_destroy(uint16_t vm_id)
+{
+    return ffa_simple_call(FFA_NOTIFICATION_BITMAP_DESTROY, vm_id, 0, 0, 0);
+}
+
+void ffa_notif_init_interrupt(void)
+{
+    int ret;
+
+    if ( notif_enabled && notif_sri_irq < NR_GIC_SGI )
+    {
+        /*
+         * An error here is unlikely since the primary CPU has already
+         * succeeded in installing the interrupt handler. If this fails it
+         * may lead to a problem with notifictaions.
+         *
+         * The CPUs without an notification handler installed will fail to
+         * trigger on the SGI indicating that there are notifications
+         * pending, while the SPMC in the secure world will not notice that
+         * the interrupt was lost.
+         */
+        ret = request_irq(notif_sri_irq, 0, notif_irq_handler, "FF-A notif",
+                          NULL);
+        if ( ret )
+            printk(XENLOG_ERR "ffa: request_irq irq %u failed: error %d\n",
+                   notif_sri_irq, ret);
+    }
+}
+
+void ffa_notif_init(void)
+{
+    const struct arm_smccc_1_2_regs arg = {
+        .a0 = FFA_FEATURES,
+        .a1 = FFA_FEATURE_SCHEDULE_RECV_INTR,
+    };
+    struct arm_smccc_1_2_regs resp;
+    unsigned int irq;
+    int ret;
+
+    arm_smccc_1_2_smc(&arg, &resp);
+    if ( resp.a0 != FFA_SUCCESS_32 )
+        return;
+
+    irq = resp.a2;
+    notif_sri_irq = irq;
+    if ( irq >= NR_GIC_SGI )
+        irq_set_type(irq, IRQ_TYPE_EDGE_RISING);
+    ret = request_irq(irq, 0, notif_irq_handler, "FF-A notif", NULL);
+    if ( ret )
+    {
+        printk(XENLOG_ERR "ffa: request_irq irq %u failed: error %d\n",
+               irq, ret);
+        return;
+    }
+
+    notif_enabled = true;
+}
+
+int ffa_notif_domain_init(struct domain *d)
+{
+    struct ffa_ctx *ctx = d->arch.tee;
+    int32_t res;
+
+    if ( !notif_enabled )
+        return 0;
+
+    res = ffa_notification_bitmap_create(ffa_get_vm_id(d), d->max_vcpus);
+    if ( res )
+        return -ENOMEM;
+
+    ctx->notif.enabled = true;
+
+    return 0;
+}
+
+void ffa_notif_domain_destroy(struct domain *d)
+{
+    struct ffa_ctx *ctx = d->arch.tee;
+
+    if ( ctx->notif.enabled )
+    {
+        ffa_notification_bitmap_destroy(ffa_get_vm_id(d));
+        ctx->notif.enabled = false;
+    }
+}
diff --git a/xen/arch/arm/tee/ffa_partinfo.c b/xen/arch/arm/tee/ffa_partinfo.c
index dc10595848..93a03c6bc6 100644
--- a/xen/arch/arm/tee/ffa_partinfo.c
+++ b/xen/arch/arm/tee/ffa_partinfo.c
@@ -306,7 +306,7 @@ static void vm_destroy_bitmap_init(struct ffa_ctx *ctx,
     }
 }
 
-bool ffa_partinfo_domain_init(struct domain *d)
+int ffa_partinfo_domain_init(struct domain *d)
 {
     unsigned int count = BITS_TO_LONGS(subscr_vm_destroyed_count);
     struct ffa_ctx *ctx = d->arch.tee;
@@ -315,7 +315,7 @@ bool ffa_partinfo_domain_init(struct domain *d)
 
     ctx->vm_destroy_bitmap = xzalloc_array(unsigned long, count);
     if ( !ctx->vm_destroy_bitmap )
-        return false;
+        return -ENOMEM;
 
     for ( n = 0; n < subscr_vm_created_count; n++ )
     {
@@ -330,7 +330,10 @@ bool ffa_partinfo_domain_init(struct domain *d)
     }
     vm_destroy_bitmap_init(ctx, n);
 
-    return n == subscr_vm_created_count;
+    if ( n != subscr_vm_created_count )
+        return -EIO;
+
+    return 0;
 }
 
 bool ffa_partinfo_domain_destroy(struct domain *d)
diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_private.h
index 98236cbf14..7c6b06f686 100644
--- a/xen/arch/arm/tee/ffa_private.h
+++ b/xen/arch/arm/tee/ffa_private.h
@@ -25,6 +25,7 @@
 #define FFA_RET_DENIED                  -6
 #define FFA_RET_RETRY                   -7
 #define FFA_RET_ABORTED                 -8
+#define FFA_RET_NO_DATA                 -9
 
 /* FFA_VERSION helpers */
 #define FFA_VERSION_MAJOR_SHIFT         16U
@@ -175,6 +176,21 @@
  */
 #define FFA_PARTITION_INFO_GET_COUNT_FLAG BIT(0, U)
 
+/* Flags used in calls to FFA_NOTIFICATION_GET interface  */
+#define FFA_NOTIF_FLAG_BITMAP_SP        BIT(0, U)
+#define FFA_NOTIF_FLAG_BITMAP_VM        BIT(1, U)
+#define FFA_NOTIF_FLAG_BITMAP_SPM       BIT(2, U)
+#define FFA_NOTIF_FLAG_BITMAP_HYP       BIT(3, U)
+
+#define FFA_NOTIF_INFO_GET_MORE_FLAG        BIT(0, U)
+#define FFA_NOTIF_INFO_GET_ID_LIST_SHIFT    12
+#define FFA_NOTIF_INFO_GET_ID_COUNT_SHIFT   7
+#define FFA_NOTIF_INFO_GET_ID_COUNT_MASK    0x1F
+
+/* Feature IDs used with FFA_FEATURES */
+#define FFA_FEATURE_NOTIF_PEND_INTR     0x1U
+#define FFA_FEATURE_SCHEDULE_RECV_INTR  0x2U
+
 /* Function IDs */
 #define FFA_ERROR                       0x84000060U
 #define FFA_SUCCESS_32                  0x84000061U
@@ -213,6 +229,24 @@
 #define FFA_MEM_FRAG_TX                 0x8400007BU
 #define FFA_MSG_SEND                    0x8400006EU
 #define FFA_MSG_POLL                    0x8400006AU
+#define FFA_NOTIFICATION_BITMAP_CREATE  0x8400007DU
+#define FFA_NOTIFICATION_BITMAP_DESTROY 0x8400007EU
+#define FFA_NOTIFICATION_BIND           0x8400007FU
+#define FFA_NOTIFICATION_UNBIND         0x84000080U
+#define FFA_NOTIFICATION_SET            0x84000081U
+#define FFA_NOTIFICATION_GET            0x84000082U
+#define FFA_NOTIFICATION_INFO_GET_32    0x84000083U
+#define FFA_NOTIFICATION_INFO_GET_64    0xC4000083U
+
+struct ffa_ctx_notif {
+    bool enabled;
+
+    /*
+     * True if domain is reported by FFA_NOTIFICATION_INFO_GET to have
+     * pending global notifications.
+     */
+    bool secure_pending;
+};
 
 struct ffa_ctx {
     void *rx;
@@ -228,6 +262,7 @@ struct ffa_ctx {
     struct list_head shm_list;
     /* Number of allocated shared memory object */
     unsigned int shm_count;
+    struct ffa_ctx_notif notif;
     /*
      * tx_lock is used to serialize access to tx
      * rx_lock is used to serialize access to rx
@@ -257,7 +292,7 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs);
 int ffa_handle_mem_reclaim(uint64_t handle, uint32_t flags);
 
 bool ffa_partinfo_init(void);
-bool ffa_partinfo_domain_init(struct domain *d);
+int ffa_partinfo_domain_init(struct domain *d);
 bool ffa_partinfo_domain_destroy(struct domain *d);
 int32_t ffa_handle_partition_info_get(uint32_t w1, uint32_t w2, uint32_t w3,
                                       uint32_t w4, uint32_t w5, uint32_t *count,
@@ -271,12 +306,31 @@ uint32_t ffa_handle_rxtx_map(uint32_t fid, register_t tx_addr,
 uint32_t ffa_handle_rxtx_unmap(void);
 int32_t ffa_handle_rx_release(void);
 
+void ffa_notif_init(void);
+void ffa_notif_init_interrupt(void);
+int ffa_notif_domain_init(struct domain *d);
+void ffa_notif_domain_destroy(struct domain *d);
+
+int ffa_handle_notification_bind(struct cpu_user_regs *regs);
+int ffa_handle_notification_unbind(struct cpu_user_regs *regs);
+void ffa_handle_notification_info_get(struct cpu_user_regs *regs);
+void ffa_handle_notification_get(struct cpu_user_regs *regs);
+int ffa_handle_notification_set(struct cpu_user_regs *regs);
+
 static inline uint16_t ffa_get_vm_id(const struct domain *d)
 {
     /* +1 since 0 is reserved for the hypervisor in FF-A */
     return d->domain_id + 1;
 }
 
+static inline struct domain *ffa_rcu_lock_domain_by_vm_id(uint16_t vm_id)
+{
+    ASSERT(vm_id);
+
+    /* -1 to match ffa_get_vm_id() */
+    return rcu_lock_domain_by_id(vm_id - 1);
+}
+
 static inline void ffa_set_regs(struct cpu_user_regs *regs, register_t v0,
                                 register_t v1, register_t v2, register_t v3,
                                 register_t v4, register_t v5, register_t v6,
diff --git a/xen/arch/arm/tee/tee.c b/xen/arch/arm/tee/tee.c
index b1cae16c17..3f65e45a78 100644
--- a/xen/arch/arm/tee/tee.c
+++ b/xen/arch/arm/tee/tee.c
@@ -94,7 +94,7 @@ static int __init tee_init(void)
     return 0;
 }
 
-__initcall(tee_init);
+presmp_initcall(tee_init);
 
 void __init init_tee_secondary(void)
 {
diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h
index 289af81bd6..e2412a1747 100644
--- a/xen/include/public/arch-arm.h
+++ b/xen/include/public/arch-arm.h
@@ -505,6 +505,7 @@ typedef uint64_t xen_callback_t;
 #define GUEST_MAX_VCPUS 128
 
 /* Interrupts */
+
 #define GUEST_TIMER_VIRT_PPI    27
 #define GUEST_TIMER_PHYS_S_PPI  29
 #define GUEST_TIMER_PHYS_NS_PPI 30
@@ -515,6 +516,19 @@ typedef uint64_t xen_callback_t;
 #define GUEST_VIRTIO_MMIO_SPI_FIRST   33
 #define GUEST_VIRTIO_MMIO_SPI_LAST    43
 
+/*
+ * SGI is the preferred delivery mechanism of FF-A pending notifications or
+ * schedule recveive interrupt. SGIs 8-15 are normally not used by a guest
+ * as they in a non-virtualized system typically are assigned to the secure
+ * world. Here we're free to use SGI 8-15 since they are virtual and have
+ * nothing to do with the secure world.
+ *
+ * For partitioning of SGIs see also Arm Base System Architecture v1.0C,
+ * https://developer.arm.com/documentation/den0094/
+ */
+#define GUEST_FFA_NOTIF_PEND_INTR_ID      8
+#define GUEST_FFA_SCHEDULE_RECV_INTR_ID   9
+
 /* PSCI functions */
 #define PSCI_cpu_suspend 0
 #define PSCI_cpu_off     1
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/EPT: correct special page checking in epte_get_entry_emt()
Message-Id: <E1sHlvo-0005PD-5U@xenbits.xenproject.org>
Date: Thu, 13 Jun 2024 15:00:04 +0000

commit 5540b94e8191059eb9cbbe98ac316232a42208f6
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Thu Jun 13 16:53:34 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 13 16:53:34 2024 +0200

    x86/EPT: correct special page checking in epte_get_entry_emt()
    
    mfn_valid() granularity is (currently) 256Mb. Therefore the start of a
    1Gb page passing the test doesn't necessarily mean all parts of such a
    range would also pass. Yet using the result of mfn_to_page() on an MFN
    which doesn't pass mfn_valid() checking is liable to result in a crash
    (the invocation of mfn_to_page() alone is presumably "just" UB in such a
    case).
    
    Fixes: ca24b2ffdbd9 ("x86/hvm: set 'ipat' in EPT for special pages")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/mm/p2m-ept.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c
index f83610cb8c..9f276afaea 100644
--- a/xen/arch/x86/mm/p2m-ept.c
+++ b/xen/arch/x86/mm/p2m-ept.c
@@ -519,8 +519,12 @@ int epte_get_entry_emt(struct domain *d, gfn_t gfn, mfn_t mfn,
     }
 
     for ( special_pgs = i = 0; i < (1ul << order); i++ )
-        if ( is_special_page(mfn_to_page(mfn_add(mfn, i))) )
+    {
+        mfn_t cur = mfn_add(mfn, i);
+
+        if ( mfn_valid(cur) && is_special_page(mfn_to_page(cur)) )
             special_pgs++;
+    }
 
     if ( special_pgs )
     {
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/EPT: avoid marking non-present entries for re-configuring
Message-Id: <E1sHlvy-0005R2-9m@xenbits.xenproject.org>
Date: Thu, 13 Jun 2024 15:00:14 +0000

commit 777c71d31325bc55ba1cc3f317d4155fe519ab0b
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Thu Jun 13 16:54:17 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 13 16:54:17 2024 +0200

    x86/EPT: avoid marking non-present entries for re-configuring
    
    For non-present entries EMT, like most other fields, is meaningless to
    hardware. Make the logic in ept_set_entry() setting the field (and iPAT)
    conditional upon dealing with a present entry, leaving the value at 0
    otherwise. This has two effects for epte_get_entry_emt() which we'll
    want to leverage subsequently:
    1) The call moved here now won't be issued with INVALID_MFN anymore (a
       respective BUG_ON() is being added).
    2) Neither of the other two calls could now be issued with a truncated
       form of INVALID_MFN anymore (as long as there's no bug anywhere
       marking an entry present when that was populated using INVALID_MFN).
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/mm/p2m-ept.c | 29 ++++++++++++++++++-----------
 1 file changed, 18 insertions(+), 11 deletions(-)

diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c
index 9f276afaea..a3ffb97876 100644
--- a/xen/arch/x86/mm/p2m-ept.c
+++ b/xen/arch/x86/mm/p2m-ept.c
@@ -650,6 +650,8 @@ static int cf_check resolve_misconfig(struct p2m_domain *p2m, unsigned long gfn)
             if ( e.emt != MTRR_NUM_TYPES )
                 break;
 
+            ASSERT(is_epte_present(&e));
+
             if ( level == 0 )
             {
                 for ( gfn -= i, i = 0; i < EPT_PAGETABLE_ENTRIES; ++i )
@@ -915,17 +917,6 @@ ept_set_entry(struct p2m_domain *p2m, gfn_t gfn_, mfn_t mfn,
 
     if ( mfn_valid(mfn) || p2m_allows_invalid_mfn(p2mt) )
     {
-        bool ipat;
-        int emt = epte_get_entry_emt(p2m->domain, _gfn(gfn), mfn,
-                                     i * EPT_TABLE_ORDER, &ipat,
-                                     p2mt);
-
-        if ( emt >= 0 )
-            new_entry.emt = emt;
-        else /* ept_handle_misconfig() will need to take care of this. */
-            new_entry.emt = MTRR_NUM_TYPES;
-
-        new_entry.ipat = ipat;
         new_entry.sp = !!i;
         new_entry.sa_p2mt = p2mt;
         new_entry.access = p2ma;
@@ -941,6 +932,22 @@ ept_set_entry(struct p2m_domain *p2m, gfn_t gfn_, mfn_t mfn,
             need_modify_vtd_table = 0;
 
         ept_p2m_type_to_flags(p2m, &new_entry);
+
+        if ( is_epte_present(&new_entry) )
+        {
+            bool ipat;
+            int emt = epte_get_entry_emt(p2m->domain, _gfn(gfn), mfn,
+                                         i * EPT_TABLE_ORDER, &ipat,
+                                         p2mt);
+
+            BUG_ON(mfn_eq(mfn, INVALID_MFN));
+
+            if ( emt >= 0 )
+                new_entry.emt = emt;
+            else /* ept_handle_misconfig() will need to take care of this. */
+                new_entry.emt = MTRR_NUM_TYPES;
+            new_entry.ipat = ipat;
+        }
     }
 
     if ( sve != -1 )
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/EPT: drop questionable mfn_valid() from epte_get_entry_emt()
Message-Id: <E1sHlw8-0005SC-DL@xenbits.xenproject.org>
Date: Thu, 13 Jun 2024 15:00:24 +0000

commit 4fdd8d75566fdad06667a79ec0ce6f43cc466c54
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Thu Jun 13 16:55:22 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 13 16:55:22 2024 +0200

    x86/EPT: drop questionable mfn_valid() from epte_get_entry_emt()
    
    mfn_valid() is RAM-focused; it will often return false for MMIO. Yet
    access to actual MMIO space should not generally be restricted to UC
    only; especially video frame buffer accesses are unduly affected by such
    a restriction.
    
    Since, as of 777c71d31325 ("x86/EPT: avoid marking non-present entries
    for re-configuring"), the function won't be called with INVALID_MFN or,
    worse, truncated forms thereof anymore, we call fully drop that check.
    
    Fixes: 81fd0d3ca4b2 ("x86/hvm: simplify 'mmio_direct' check in epte_get_entry_emt()")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/mm/p2m-ept.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c
index a3ffb97876..469e27ee93 100644
--- a/xen/arch/x86/mm/p2m-ept.c
+++ b/xen/arch/x86/mm/p2m-ept.c
@@ -501,12 +501,6 @@ int epte_get_entry_emt(struct domain *d, gfn_t gfn, mfn_t mfn,
         return -1;
     }
 
-    if ( !mfn_valid(mfn) )
-    {
-        *ipat = true;
-        return X86_MT_UC;
-    }
-
     /*
      * Conditional must be kept in sync with the code in
      * {iomem,ioports}_{permit,deny}_access().
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: ffa: refactor ffa_handle_call()
Message-Id: <E1sHzjG-0000Lq-4r@xenbits.xenproject.org>
Date: Fri, 14 Jun 2024 05:44:02 +0000

commit 66e6e47511d1894ab18d69221207069d8e93c7b6
Author:     Jens Wiklander <jens.wiklander@linaro.org>
AuthorDate: Mon Jun 10 08:53:37 2024 +0200
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 13 13:43:32 2024 +0100

    xen/arm: ffa: refactor ffa_handle_call()
    
    Refactors the large switch block in ffa_handle_call() to use common code
    for the simple case where it's either an error code or success with no
    further parameters.
    
    Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/tee/ffa.c | 30 ++++++++++--------------------
 1 file changed, 10 insertions(+), 20 deletions(-)

diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c
index 8665201e34..5209612963 100644
--- a/xen/arch/arm/tee/ffa.c
+++ b/xen/arch/arm/tee/ffa.c
@@ -273,18 +273,10 @@ static bool ffa_handle_call(struct cpu_user_regs *regs)
     case FFA_RXTX_MAP_64:
         e = ffa_handle_rxtx_map(fid, get_user_reg(regs, 1),
 				get_user_reg(regs, 2), get_user_reg(regs, 3));
-        if ( e )
-            ffa_set_regs_error(regs, e);
-        else
-            ffa_set_regs_success(regs, 0, 0);
-        return true;
+        break;
     case FFA_RXTX_UNMAP:
         e = ffa_handle_rxtx_unmap();
-        if ( e )
-            ffa_set_regs_error(regs, e);
-        else
-            ffa_set_regs_success(regs, 0, 0);
-        return true;
+        break;
     case FFA_PARTITION_INFO_GET:
         e = ffa_handle_partition_info_get(get_user_reg(regs, 1),
                                           get_user_reg(regs, 2),
@@ -299,11 +291,7 @@ static bool ffa_handle_call(struct cpu_user_regs *regs)
         return true;
     case FFA_RX_RELEASE:
         e = ffa_handle_rx_release();
-        if ( e )
-            ffa_set_regs_error(regs, e);
-        else
-            ffa_set_regs_success(regs, 0, 0);
-        return true;
+        break;
     case FFA_MSG_SEND_DIRECT_REQ_32:
     case FFA_MSG_SEND_DIRECT_REQ_64:
         handle_msg_send_direct_req(regs, fid);
@@ -316,17 +304,19 @@ static bool ffa_handle_call(struct cpu_user_regs *regs)
         e = ffa_handle_mem_reclaim(regpair_to_uint64(get_user_reg(regs, 2),
                                                      get_user_reg(regs, 1)),
                                    get_user_reg(regs, 3));
-        if ( e )
-            ffa_set_regs_error(regs, e);
-        else
-            ffa_set_regs_success(regs, 0, 0);
-        return true;
+        break;
 
     default:
         gprintk(XENLOG_ERR, "ffa: unhandled fid 0x%x\n", fid);
         ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED);
         return true;
     }
+
+    if ( e )
+        ffa_set_regs_error(regs, e);
+    else
+        ffa_set_regs_success(regs, 0, 0);
+    return true;
 }
 
 static int ffa_domain_init(struct domain *d)
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: ffa: use ACCESS_ONCE()
Message-Id: <E1sHzjQ-0000MR-8X@xenbits.xenproject.org>
Date: Fri, 14 Jun 2024 05:44:12 +0000

commit 4d2b1b5d6933e3ef26fb4905892007921205aaff
Author:     Jens Wiklander <jens.wiklander@linaro.org>
AuthorDate: Mon Jun 10 08:53:38 2024 +0200
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 13 13:43:39 2024 +0100

    xen/arm: ffa: use ACCESS_ONCE()
    
    Replace read_atomic() with ACCESS_ONCE() to match the intended use, that
    is, to prevent the compiler from (via optimization) reading shared
    memory more than once.
    
    Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/tee/ffa_shm.c | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/xen/arch/arm/tee/ffa_shm.c b/xen/arch/arm/tee/ffa_shm.c
index eed9ad2d29..75a5b66aeb 100644
--- a/xen/arch/arm/tee/ffa_shm.c
+++ b/xen/arch/arm/tee/ffa_shm.c
@@ -7,6 +7,7 @@
 #include <xen/sizes.h>
 #include <xen/types.h>
 #include <xen/mm.h>
+#include <xen/lib.h>
 #include <xen/list.h>
 #include <xen/spinlock.h>
 
@@ -171,8 +172,8 @@ static int get_shm_pages(struct domain *d, struct ffa_shm_mem *shm,
 
     for ( n = 0; n < range_count; n++ )
     {
-        page_count = read_atomic(&range[n].page_count);
-        addr = read_atomic(&range[n].address);
+        page_count = ACCESS_ONCE(range[n].page_count);
+        addr = ACCESS_ONCE(range[n].address);
         for ( m = 0; m < page_count; m++ )
         {
             if ( pg_idx >= shm->page_count )
@@ -527,13 +528,13 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs)
         goto out_unlock;
 
     mem_access = ctx->tx + trans.mem_access_offs;
-    if ( read_atomic(&mem_access->access_perm.perm) != FFA_MEM_ACC_RW )
+    if ( ACCESS_ONCE(mem_access->access_perm.perm) != FFA_MEM_ACC_RW )
     {
         ret = FFA_RET_NOT_SUPPORTED;
         goto out_unlock;
     }
 
-    region_offs = read_atomic(&mem_access->region_offs);
+    region_offs = ACCESS_ONCE(mem_access->region_offs);
     if ( sizeof(*region_descr) + region_offs > frag_len )
     {
         ret = FFA_RET_NOT_SUPPORTED;
@@ -541,8 +542,8 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs)
     }
 
     region_descr = ctx->tx + region_offs;
-    range_count = read_atomic(&region_descr->address_range_count);
-    page_count = read_atomic(&region_descr->total_page_count);
+    range_count = ACCESS_ONCE(region_descr->address_range_count);
+    page_count = ACCESS_ONCE(region_descr->total_page_count);
 
     if ( !page_count )
     {
@@ -557,7 +558,7 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs)
         goto out_unlock;
     }
     shm->sender_id = trans.sender_id;
-    shm->ep_id = read_atomic(&mem_access->access_perm.endpoint_id);
+    shm->ep_id = ACCESS_ONCE(mem_access->access_perm.endpoint_id);
 
     /*
      * Check that the Composite memory region descriptor fits.
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: ffa: simplify ffa_handle_mem_share()
Message-Id: <E1sHzja-0000Ms-D4@xenbits.xenproject.org>
Date: Fri, 14 Jun 2024 05:44:22 +0000

commit 282c33cec3dc04d052078450eb98ceb2bb2515af
Author:     Jens Wiklander <jens.wiklander@linaro.org>
AuthorDate: Mon Jun 10 08:53:39 2024 +0200
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 13 13:43:41 2024 +0100

    xen/arm: ffa: simplify ffa_handle_mem_share()
    
    Simplify ffa_handle_mem_share() by removing the start_page_idx and
    last_page_idx parameters from get_shm_pages() and check that the number
    of pages matches expectations at the end of get_shm_pages().
    
    Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/tee/ffa_shm.c | 18 ++++++------------
 1 file changed, 6 insertions(+), 12 deletions(-)

diff --git a/xen/arch/arm/tee/ffa_shm.c b/xen/arch/arm/tee/ffa_shm.c
index 75a5b66aeb..370d83ec5c 100644
--- a/xen/arch/arm/tee/ffa_shm.c
+++ b/xen/arch/arm/tee/ffa_shm.c
@@ -159,10 +159,9 @@ static int32_t ffa_mem_reclaim(uint32_t handle_lo, uint32_t handle_hi,
  */
 static int get_shm_pages(struct domain *d, struct ffa_shm_mem *shm,
                          const struct ffa_address_range *range,
-                         uint32_t range_count, unsigned int start_page_idx,
-                         unsigned int *last_page_idx)
+                         uint32_t range_count)
 {
-    unsigned int pg_idx = start_page_idx;
+    unsigned int pg_idx = 0;
     gfn_t gfn;
     unsigned int n;
     unsigned int m;
@@ -191,7 +190,9 @@ static int get_shm_pages(struct domain *d, struct ffa_shm_mem *shm,
         }
     }
 
-    *last_page_idx = pg_idx;
+    /* The ranges must add up */
+    if ( pg_idx < shm->page_count )
+            return FFA_RET_INVALID_PARAMETERS;
 
     return FFA_RET_OK;
 }
@@ -460,7 +461,6 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs)
     struct domain *d = current->domain;
     struct ffa_ctx *ctx = d->arch.tee;
     struct ffa_shm_mem *shm = NULL;
-    unsigned int last_page_idx = 0;
     register_t handle_hi = 0;
     register_t handle_lo = 0;
     int ret = FFA_RET_DENIED;
@@ -570,15 +570,9 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs)
         goto out;
     }
 
-    ret = get_shm_pages(d, shm, region_descr->address_range_array, range_count,
-                        0, &last_page_idx);
+    ret = get_shm_pages(d, shm, region_descr->address_range_array, range_count);
     if ( ret )
         goto out;
-    if ( last_page_idx != shm->page_count )
-    {
-        ret = FFA_RET_INVALID_PARAMETERS;
-        goto out;
-    }
 
     /* Note that share_shm() uses our tx buffer */
     spin_lock(&ffa_tx_buffer_lock);
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: allow dynamically assigned SGI handlers
Message-Id: <E1sHzjk-0000NJ-Ha@xenbits.xenproject.org>
Date: Fri, 14 Jun 2024 05:44:32 +0000

commit 67ef3db45a6e5c35f6491b109d88286780652b9a
Author:     Jens Wiklander <jens.wiklander@linaro.org>
AuthorDate: Mon Jun 10 08:53:40 2024 +0200
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 13 13:43:44 2024 +0100

    xen/arm: allow dynamically assigned SGI handlers
    
    Updates so request_irq() can be used with a dynamically assigned SGI irq
    as input. This prepares for a later patch where an FF-A schedule
    receiver interrupt handler is installed for an SGI generated by the
    secure world.
    
    >From the Arm Base System Architecture v1.0C [1]:
    "The system shall implement at least eight Non-secure SGIs, assigned to
    interrupt IDs 0-7."
    
    gic_route_irq_to_xen() don't gic_set_irq_type() for SGIs since they are
    always edge triggered.
    
    gic_interrupt() is updated to route the dynamically assigned SGIs to
    do_IRQ() instead of do_sgi(). The latter still handles the statically
    assigned SGI handlers like for instance GIC_SGI_CALL_FUNCTION.
    
    [1] https://developer.arm.com/documentation/den0094/
    
    Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
    Acked-by: Julien Grall <jgrall@amazon.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/gic.c             | 12 +++++++-----
 xen/arch/arm/include/asm/gic.h |  2 +-
 xen/arch/arm/irq.c             | 18 ++++++++++++++----
 3 files changed, 22 insertions(+), 10 deletions(-)

diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c
index b3467a76ae..3eaf670fd7 100644
--- a/xen/arch/arm/gic.c
+++ b/xen/arch/arm/gic.c
@@ -38,7 +38,7 @@ const struct gic_hw_operations *gic_hw_ops;
 static void __init __maybe_unused build_assertions(void)
 {
     /* Check our enum gic_sgi only covers SGIs */
-    BUILD_BUG_ON(GIC_SGI_MAX > NR_GIC_SGI);
+    BUILD_BUG_ON(GIC_SGI_STATIC_MAX > NR_GIC_SGI);
 }
 
 void register_gic_ops(const struct gic_hw_operations *ops)
@@ -117,7 +117,9 @@ void gic_route_irq_to_xen(struct irq_desc *desc, unsigned int priority)
 
     desc->handler = gic_hw_ops->gic_host_irq_type;
 
-    gic_set_irq_type(desc, desc->arch.type);
+    /* SGIs are always edge-triggered, so there is need to set it */
+    if ( desc->irq >= NR_GIC_SGI)
+        gic_set_irq_type(desc, desc->arch.type);
     gic_set_irq_priority(desc, priority);
 }
 
@@ -322,7 +324,7 @@ void gic_disable_cpu(void)
     gic_hw_ops->disable_interface();
 }
 
-static void do_sgi(struct cpu_user_regs *regs, enum gic_sgi sgi)
+static void do_static_sgi(struct cpu_user_regs *regs, enum gic_sgi sgi)
 {
     struct irq_desc *desc = irq_to_desc(sgi);
 
@@ -367,7 +369,7 @@ void gic_interrupt(struct cpu_user_regs *regs, int is_fiq)
         /* Reading IRQ will ACK it */
         irq = gic_hw_ops->read_irq();
 
-        if ( likely(irq >= 16 && irq < 1020) )
+        if ( likely(irq >= GIC_SGI_STATIC_MAX && irq < 1020) )
         {
             isb();
             do_IRQ(regs, irq, is_fiq);
@@ -379,7 +381,7 @@ void gic_interrupt(struct cpu_user_regs *regs, int is_fiq)
         }
         else if ( unlikely(irq < 16) )
         {
-            do_sgi(regs, irq);
+            do_static_sgi(regs, irq);
         }
         else
         {
diff --git a/xen/arch/arm/include/asm/gic.h b/xen/arch/arm/include/asm/gic.h
index 03f209529b..541f0eeb80 100644
--- a/xen/arch/arm/include/asm/gic.h
+++ b/xen/arch/arm/include/asm/gic.h
@@ -285,7 +285,7 @@ enum gic_sgi {
     GIC_SGI_EVENT_CHECK,
     GIC_SGI_DUMP_STATE,
     GIC_SGI_CALL_FUNCTION,
-    GIC_SGI_MAX,
+    GIC_SGI_STATIC_MAX,
 };
 
 /* SGI irq mode types */
diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c
index e5fb26a3de..c60502444c 100644
--- a/xen/arch/arm/irq.c
+++ b/xen/arch/arm/irq.c
@@ -142,7 +142,13 @@ void __init init_IRQ(void)
 
     spin_lock(&local_irqs_type_lock);
     for ( irq = 0; irq < NR_LOCAL_IRQS; irq++ )
-        local_irqs_type[irq] = IRQ_TYPE_INVALID;
+    {
+        /* SGIs are always edge-triggered */
+        if ( irq < NR_GIC_SGI )
+            local_irqs_type[irq] = IRQ_TYPE_EDGE_RISING;
+        else
+            local_irqs_type[irq] = IRQ_TYPE_INVALID;
+    }
     spin_unlock(&local_irqs_type_lock);
 
     BUG_ON(init_local_irq_data(smp_processor_id()) < 0);
@@ -214,9 +220,12 @@ void do_IRQ(struct cpu_user_regs *regs, unsigned int irq, int is_fiq)
 
     perfc_incr(irqs);
 
-    ASSERT(irq >= 16); /* SGIs do not come down this path */
+    /* Statically assigned SGIs do not come down this path */
+    ASSERT(irq >= GIC_SGI_STATIC_MAX);
 
-    if ( irq < 32 )
+    if ( irq < NR_GIC_SGI )
+        perfc_incr(ipis);
+    else if ( irq < NR_GIC_LOCAL_IRQS )
         perfc_incr(ppis);
     else
         perfc_incr(spis);
@@ -250,6 +259,7 @@ void do_IRQ(struct cpu_user_regs *regs, unsigned int irq, int is_fiq)
          * The irq cannot be a PPI, we only support delivery of SPIs to
          * guests.
          */
+        ASSERT(irq >= NR_GIC_SGI);
         vgic_inject_irq(info->d, NULL, info->virq, true);
         goto out_no_end;
     }
@@ -386,7 +396,7 @@ int setup_irq(unsigned int irq, unsigned int irqflags, struct irqaction *new)
     {
         gic_route_irq_to_xen(desc, GIC_PRI_IRQ);
         /* It's fine to use smp_processor_id() because:
-         * For PPI: irq_desc is banked
+         * For SGI and PPI: irq_desc is banked
          * For SPI: we don't care for now which CPU will receive the
          * interrupt
          * TODO: Handle case where SPI is setup on different CPU than
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: add and call init_tee_secondary()
Message-Id: <E1sHzju-0000Nk-Kp@xenbits.xenproject.org>
Date: Fri, 14 Jun 2024 05:44:42 +0000

commit dd348eb0053e13e49fc162082771f6f1d9cca654
Author:     Jens Wiklander <jens.wiklander@linaro.org>
AuthorDate: Mon Jun 10 08:53:41 2024 +0200
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 13 13:43:49 2024 +0100

    xen/arm: add and call init_tee_secondary()
    
    Add init_tee_secondary() to the TEE mediator framework and call it from
    start_secondary() late enough that per-cpu interrupts can be configured
    on CPUs as they are initialized. This is needed in later patches.
    
    Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/include/asm/tee/tee.h | 8 ++++++++
 xen/arch/arm/smpboot.c             | 2 ++
 xen/arch/arm/tee/tee.c             | 6 ++++++
 3 files changed, 16 insertions(+)

diff --git a/xen/arch/arm/include/asm/tee/tee.h b/xen/arch/arm/include/asm/tee/tee.h
index da324467e1..6bc13da885 100644
--- a/xen/arch/arm/include/asm/tee/tee.h
+++ b/xen/arch/arm/include/asm/tee/tee.h
@@ -28,6 +28,9 @@ struct tee_mediator_ops {
      */
     bool (*probe)(void);
 
+    /* Initialize secondary CPUs */
+    void (*init_secondary)(void);
+
     /*
      * Called during domain construction if toolstack requests to enable
      * TEE support so mediator can inform TEE about new
@@ -66,6 +69,7 @@ int tee_domain_init(struct domain *d, uint16_t tee_type);
 int tee_domain_teardown(struct domain *d);
 int tee_relinquish_resources(struct domain *d);
 uint16_t tee_get_type(void);
+void init_tee_secondary(void);
 
 #define REGISTER_TEE_MEDIATOR(_name, _namestr, _type, _ops)         \
 static const struct tee_mediator_desc __tee_desc_##_name __used     \
@@ -105,6 +109,10 @@ static inline uint16_t tee_get_type(void)
     return XEN_DOMCTL_CONFIG_TEE_NONE;
 }
 
+static inline void init_tee_secondary(void)
+{
+}
+
 #endif  /* CONFIG_TEE */
 
 #endif /* __ARCH_ARM_TEE_TEE_H__ */
diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c
index 93a10d7721..04e363088d 100644
--- a/xen/arch/arm/smpboot.c
+++ b/xen/arch/arm/smpboot.c
@@ -29,6 +29,7 @@
 #include <asm/procinfo.h>
 #include <asm/psci.h>
 #include <asm/acpi.h>
+#include <asm/tee/tee.h>
 
 /* Override macros from asm/page.h to make them work with mfn_t */
 #undef virt_to_mfn
@@ -401,6 +402,7 @@ void asmlinkage start_secondary(void)
      */
     init_maintenance_interrupt();
     init_timer_interrupt();
+    init_tee_secondary();
 
     local_abort_enable();
 
diff --git a/xen/arch/arm/tee/tee.c b/xen/arch/arm/tee/tee.c
index ddd17506a9..9fd1d7495b 100644
--- a/xen/arch/arm/tee/tee.c
+++ b/xen/arch/arm/tee/tee.c
@@ -96,6 +96,12 @@ static int __init tee_init(void)
 
 __initcall(tee_init);
 
+void __init init_tee_secondary(void)
+{
+    if ( cur_mediator && cur_mediator->ops->init_secondary )
+        cur_mediator->ops->init_secondary();
+}
+
 /*
  * Local variables:
  * mode: C
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: add and call tee_free_domain_ctx()
Message-Id: <E1sHzk4-0000OB-Nx@xenbits.xenproject.org>
Date: Fri, 14 Jun 2024 05:44:52 +0000

commit 452551c723d28935cba25bf9719b1a1a99abc951
Author:     Jens Wiklander <jens.wiklander@linaro.org>
AuthorDate: Mon Jun 10 08:53:42 2024 +0200
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 13 13:43:53 2024 +0100

    xen/arm: add and call tee_free_domain_ctx()
    
    Add tee_free_domain_ctx() to the TEE mediator framework.
    tee_free_domain_ctx() is called from arch_domain_destroy() to allow late
    freeing of the d->arch.tee context. This will simplify access to
    d->arch.tee for domains retrieved with rcu_lock_domain_by_id().
    
    Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/domain.c              | 1 +
 xen/arch/arm/include/asm/tee/tee.h | 6 ++++++
 xen/arch/arm/tee/tee.c             | 6 ++++++
 3 files changed, 13 insertions(+)

diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
index 8bde2f730d..7cfcefd279 100644
--- a/xen/arch/arm/domain.c
+++ b/xen/arch/arm/domain.c
@@ -843,6 +843,7 @@ int arch_domain_teardown(struct domain *d)
 
 void arch_domain_destroy(struct domain *d)
 {
+    tee_free_domain_ctx(d);
     /* IOMMU page table is shared with P2M, always call
      * iommu_domain_destroy() before p2m_final_teardown().
      */
diff --git a/xen/arch/arm/include/asm/tee/tee.h b/xen/arch/arm/include/asm/tee/tee.h
index 6bc13da885..0169fd746b 100644
--- a/xen/arch/arm/include/asm/tee/tee.h
+++ b/xen/arch/arm/include/asm/tee/tee.h
@@ -38,6 +38,7 @@ struct tee_mediator_ops {
      */
     int (*domain_init)(struct domain *d);
     int (*domain_teardown)(struct domain *d);
+    void (*free_domain_ctx)(struct domain *d);
 
     /*
      * Called during domain destruction to relinquish resources used
@@ -70,6 +71,7 @@ int tee_domain_teardown(struct domain *d);
 int tee_relinquish_resources(struct domain *d);
 uint16_t tee_get_type(void);
 void init_tee_secondary(void);
+void tee_free_domain_ctx(struct domain *d);
 
 #define REGISTER_TEE_MEDIATOR(_name, _namestr, _type, _ops)         \
 static const struct tee_mediator_desc __tee_desc_##_name __used     \
@@ -113,6 +115,10 @@ static inline void init_tee_secondary(void)
 {
 }
 
+static inline void tee_free_domain_ctx(struct domain *d)
+{
+}
+
 #endif  /* CONFIG_TEE */
 
 #endif /* __ARCH_ARM_TEE_TEE_H__ */
diff --git a/xen/arch/arm/tee/tee.c b/xen/arch/arm/tee/tee.c
index 9fd1d7495b..b1cae16c17 100644
--- a/xen/arch/arm/tee/tee.c
+++ b/xen/arch/arm/tee/tee.c
@@ -102,6 +102,12 @@ void __init init_tee_secondary(void)
         cur_mediator->ops->init_secondary();
 }
 
+void tee_free_domain_ctx(struct domain *d)
+{
+    if ( cur_mediator && cur_mediator->ops->free_domain_ctx)
+        cur_mediator->ops->free_domain_ctx(d);
+}
+
 /*
  * Local variables:
  * mode: C
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: ffa: support notification
Message-Id: <E1sHzkE-0000P7-RC@xenbits.xenproject.org>
Date: Fri, 14 Jun 2024 05:45:02 +0000

commit b490f470f58d0b87653bfbee23c7e9342b049ab4
Author:     Jens Wiklander <jens.wiklander@linaro.org>
AuthorDate: Mon Jun 10 08:53:43 2024 +0200
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 13 13:43:56 2024 +0100

    xen/arm: ffa: support notification
    
    Add support for FF-A notifications, currently limited to an SP (Secure
    Partition) sending an asynchronous notification to a guest.
    
    Guests and Xen itself are made aware of pending notifications with an
    interrupt. The interrupt handler triggers a tasklet to retrieve the
    notifications using the FF-A ABI and deliver them to their destinations.
    
    Update ffa_partinfo_domain_init() to return error code like
    ffa_notif_domain_init().
    
    Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/tee/Makefile       |   1 +
 xen/arch/arm/tee/ffa.c          |  77 +++++++-
 xen/arch/arm/tee/ffa_notif.c    | 425 ++++++++++++++++++++++++++++++++++++++++
 xen/arch/arm/tee/ffa_partinfo.c |   9 +-
 xen/arch/arm/tee/ffa_private.h  |  56 +++++-
 xen/arch/arm/tee/tee.c          |   2 +-
 xen/include/public/arch-arm.h   |  14 ++
 7 files changed, 569 insertions(+), 15 deletions(-)

diff --git a/xen/arch/arm/tee/Makefile b/xen/arch/arm/tee/Makefile
index f0112a2f92..7c0f46f7f4 100644
--- a/xen/arch/arm/tee/Makefile
+++ b/xen/arch/arm/tee/Makefile
@@ -2,5 +2,6 @@ obj-$(CONFIG_FFA) += ffa.o
 obj-$(CONFIG_FFA) += ffa_shm.o
 obj-$(CONFIG_FFA) += ffa_partinfo.o
 obj-$(CONFIG_FFA) += ffa_rxtx.o
+obj-$(CONFIG_FFA) += ffa_notif.o
 obj-y += tee.o
 obj-$(CONFIG_OPTEE) += optee.o
diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c
index 5209612963..022089278e 100644
--- a/xen/arch/arm/tee/ffa.c
+++ b/xen/arch/arm/tee/ffa.c
@@ -39,6 +39,12 @@
  *   - at most 32 shared memory regions per guest
  * o FFA_MSG_SEND_DIRECT_REQ:
  *   - only supported from a VM to an SP
+ * o FFA_NOTIFICATION_*:
+ *   - only supports global notifications, that is, per vCPU notifications
+ *     are not supported
+ *   - doesn't support signalling the secondary scheduler of pending
+ *     notification for secure partitions
+ *   - doesn't support notifications for Xen itself
  *
  * There are some large locked sections with ffa_tx_buffer_lock and
  * ffa_rx_buffer_lock. Especially the ffa_tx_buffer_lock spinlock used
@@ -194,6 +200,8 @@ out:
 
 static void handle_features(struct cpu_user_regs *regs)
 {
+    struct domain *d = current->domain;
+    struct ffa_ctx *ctx = d->arch.tee;
     uint32_t a1 = get_user_reg(regs, 1);
     unsigned int n;
 
@@ -240,6 +248,30 @@ static void handle_features(struct cpu_user_regs *regs)
         BUILD_BUG_ON(PAGE_SIZE != FFA_PAGE_SIZE);
         ffa_set_regs_success(regs, 0, 0);
         break;
+    case FFA_FEATURE_NOTIF_PEND_INTR:
+        if ( ctx->notif.enabled )
+            ffa_set_regs_success(regs, GUEST_FFA_NOTIF_PEND_INTR_ID, 0);
+        else
+            ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED);
+        break;
+    case FFA_FEATURE_SCHEDULE_RECV_INTR:
+        if ( ctx->notif.enabled )
+            ffa_set_regs_success(regs, GUEST_FFA_SCHEDULE_RECV_INTR_ID, 0);
+        else
+            ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED);
+        break;
+
+    case FFA_NOTIFICATION_BIND:
+    case FFA_NOTIFICATION_UNBIND:
+    case FFA_NOTIFICATION_GET:
+    case FFA_NOTIFICATION_SET:
+    case FFA_NOTIFICATION_INFO_GET_32:
+    case FFA_NOTIFICATION_INFO_GET_64:
+        if ( ctx->notif.enabled )
+            ffa_set_regs_success(regs, 0, 0);
+        else
+            ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED);
+        break;
     default:
         ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED);
         break;
@@ -305,6 +337,22 @@ static bool ffa_handle_call(struct cpu_user_regs *regs)
                                                      get_user_reg(regs, 1)),
                                    get_user_reg(regs, 3));
         break;
+    case FFA_NOTIFICATION_BIND:
+        e = ffa_handle_notification_bind(regs);
+        break;
+    case FFA_NOTIFICATION_UNBIND:
+        e = ffa_handle_notification_unbind(regs);
+        break;
+    case FFA_NOTIFICATION_INFO_GET_32:
+    case FFA_NOTIFICATION_INFO_GET_64:
+        ffa_handle_notification_info_get(regs);
+        return true;
+    case FFA_NOTIFICATION_GET:
+        ffa_handle_notification_get(regs);
+        return true;
+    case FFA_NOTIFICATION_SET:
+        e = ffa_handle_notification_set(regs);
+        break;
 
     default:
         gprintk(XENLOG_ERR, "ffa: unhandled fid 0x%x\n", fid);
@@ -322,6 +370,7 @@ static bool ffa_handle_call(struct cpu_user_regs *regs)
 static int ffa_domain_init(struct domain *d)
 {
     struct ffa_ctx *ctx;
+    int ret;
 
     if ( !ffa_version )
         return -ENODEV;
@@ -345,10 +394,11 @@ static int ffa_domain_init(struct domain *d)
      * error, so no need for cleanup in this function.
      */
 
-    if ( !ffa_partinfo_domain_init(d) )
-        return -EIO;
+    ret = ffa_partinfo_domain_init(d);
+    if ( ret )
+        return ret;
 
-    return 0;
+    return ffa_notif_domain_init(d);
 }
 
 static void ffa_domain_teardown_continue(struct ffa_ctx *ctx, bool first_time)
@@ -376,13 +426,6 @@ static void ffa_domain_teardown_continue(struct ffa_ctx *ctx, bool first_time)
     }
     else
     {
-        /*
-         * domain_destroy() might have been called (via put_domain() in
-         * ffa_reclaim_shms()), so we can't touch the domain structure
-         * anymore.
-         */
-        xfree(ctx);
-
         /* Only check if there has been a change to the teardown queue */
         if ( !first_time )
         {
@@ -423,17 +466,28 @@ static int ffa_domain_teardown(struct domain *d)
         return 0;
 
     ffa_rxtx_domain_destroy(d);
+    ffa_notif_domain_destroy(d);
 
     ffa_domain_teardown_continue(ctx, true /* first_time */);
 
     return 0;
 }
 
+static void ffa_free_domain_ctx(struct domain *d)
+{
+    XFREE(d->arch.tee);
+}
+
 static int ffa_relinquish_resources(struct domain *d)
 {
     return 0;
 }
 
+static void ffa_init_secondary(void)
+{
+    ffa_notif_init_interrupt();
+}
+
 static bool ffa_probe(void)
 {
     uint32_t vers;
@@ -502,6 +556,7 @@ static bool ffa_probe(void)
     if ( !ffa_partinfo_init() )
         goto err_rxtx_destroy;
 
+    ffa_notif_init();
     INIT_LIST_HEAD(&ffa_teardown_head);
     init_timer(&ffa_teardown_timer, ffa_teardown_timer_callback, NULL, 0);
 
@@ -517,8 +572,10 @@ err_rxtx_destroy:
 static const struct tee_mediator_ops ffa_ops =
 {
     .probe = ffa_probe,
+    .init_secondary = ffa_init_secondary,
     .domain_init = ffa_domain_init,
     .domain_teardown = ffa_domain_teardown,
+    .free_domain_ctx = ffa_free_domain_ctx,
     .relinquish_resources = ffa_relinquish_resources,
     .handle_call = ffa_handle_call,
 };
diff --git a/xen/arch/arm/tee/ffa_notif.c b/xen/arch/arm/tee/ffa_notif.c
new file mode 100644
index 0000000000..541e61d2f6
--- /dev/null
+++ b/xen/arch/arm/tee/ffa_notif.c
@@ -0,0 +1,425 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2024  Linaro Limited
+ */
+
+#include <xen/const.h>
+#include <xen/cpu.h>
+#include <xen/list.h>
+#include <xen/notifier.h>
+#include <xen/spinlock.h>
+#include <xen/tasklet.h>
+#include <xen/types.h>
+
+#include <asm/smccc.h>
+#include <asm/regs.h>
+
+#include "ffa_private.h"
+
+static bool __ro_after_init notif_enabled;
+static unsigned int __ro_after_init notif_sri_irq;
+
+int ffa_handle_notification_bind(struct cpu_user_regs *regs)
+{
+    struct domain *d = current->domain;
+    uint32_t src_dst = get_user_reg(regs, 1);
+    uint32_t flags = get_user_reg(regs, 2);
+    uint32_t bitmap_lo = get_user_reg(regs, 3);
+    uint32_t bitmap_hi = get_user_reg(regs, 4);
+
+    if ( !notif_enabled )
+        return FFA_RET_NOT_SUPPORTED;
+
+    if ( (src_dst & 0xFFFFU) != ffa_get_vm_id(d) )
+        return FFA_RET_INVALID_PARAMETERS;
+
+    if ( flags )    /* Only global notifications are supported */
+        return FFA_RET_DENIED;
+
+    /*
+     * We only support notifications from SP so no need to check the sender
+     * endpoint ID, the SPMC will take care of that for us.
+     */
+    return ffa_simple_call(FFA_NOTIFICATION_BIND, src_dst, flags, bitmap_hi,
+                           bitmap_lo);
+}
+
+int ffa_handle_notification_unbind(struct cpu_user_regs *regs)
+{
+    struct domain *d = current->domain;
+    uint32_t src_dst = get_user_reg(regs, 1);
+    uint32_t bitmap_lo = get_user_reg(regs, 3);
+    uint32_t bitmap_hi = get_user_reg(regs, 4);
+
+    if ( !notif_enabled )
+        return FFA_RET_NOT_SUPPORTED;
+
+    if ( (src_dst & 0xFFFFU) != ffa_get_vm_id(d) )
+        return FFA_RET_INVALID_PARAMETERS;
+
+    /*
+     * We only support notifications from SP so no need to check the
+     * destination endpoint ID, the SPMC will take care of that for us.
+     */
+    return  ffa_simple_call(FFA_NOTIFICATION_UNBIND, src_dst, 0, bitmap_hi,
+                            bitmap_lo);
+}
+
+void ffa_handle_notification_info_get(struct cpu_user_regs *regs)
+{
+    struct domain *d = current->domain;
+    struct ffa_ctx *ctx = d->arch.tee;
+
+    if ( !notif_enabled )
+    {
+        ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED);
+        return;
+    }
+
+    if ( test_and_clear_bool(ctx->notif.secure_pending) )
+    {
+        /* A pending global notification for the guest */
+        ffa_set_regs(regs, FFA_SUCCESS_64, 0,
+                     1U << FFA_NOTIF_INFO_GET_ID_COUNT_SHIFT, ffa_get_vm_id(d),
+                     0, 0, 0, 0);
+    }
+    else
+    {
+        /* Report an error if there where no pending global notification */
+        ffa_set_regs_error(regs, FFA_RET_NO_DATA);
+    }
+}
+
+void ffa_handle_notification_get(struct cpu_user_regs *regs)
+{
+    struct domain *d = current->domain;
+    uint32_t recv = get_user_reg(regs, 1);
+    uint32_t flags = get_user_reg(regs, 2);
+    uint32_t w2 = 0;
+    uint32_t w3 = 0;
+    uint32_t w4 = 0;
+    uint32_t w5 = 0;
+    uint32_t w6 = 0;
+    uint32_t w7 = 0;
+
+    if ( !notif_enabled )
+    {
+        ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED);
+        return;
+    }
+
+    if ( (recv & 0xFFFFU) != ffa_get_vm_id(d) )
+    {
+        ffa_set_regs_error(regs, FFA_RET_INVALID_PARAMETERS);
+        return;
+    }
+
+    if ( flags & ( FFA_NOTIF_FLAG_BITMAP_SP | FFA_NOTIF_FLAG_BITMAP_SPM ) )
+    {
+        struct arm_smccc_1_2_regs arg = {
+            .a0 = FFA_NOTIFICATION_GET,
+            .a1 = recv,
+            .a2 = flags & ( FFA_NOTIF_FLAG_BITMAP_SP |
+                            FFA_NOTIF_FLAG_BITMAP_SPM ),
+        };
+        struct arm_smccc_1_2_regs resp;
+        int32_t e;
+
+        /*
+         * Clear secure pending if both FFA_NOTIF_FLAG_BITMAP_SP and
+         * FFA_NOTIF_FLAG_BITMAP_SPM are set since secure world can't have
+         * any more pending notifications.
+         */
+        if ( ( flags  & FFA_NOTIF_FLAG_BITMAP_SP ) &&
+             ( flags & FFA_NOTIF_FLAG_BITMAP_SPM ) )
+        {
+                struct ffa_ctx *ctx = d->arch.tee;
+
+                ACCESS_ONCE(ctx->notif.secure_pending) = false;
+        }
+
+        arm_smccc_1_2_smc(&arg, &resp);
+        e = ffa_get_ret_code(&resp);
+        if ( e )
+        {
+            ffa_set_regs_error(regs, e);
+            return;
+        }
+
+        if ( flags & FFA_NOTIF_FLAG_BITMAP_SP )
+        {
+            w2 = resp.a2;
+            w3 = resp.a3;
+        }
+
+        if ( flags & FFA_NOTIF_FLAG_BITMAP_SPM )
+            w6 = resp.a6;
+    }
+
+    ffa_set_regs(regs, FFA_SUCCESS_32, 0, w2, w3, w4, w5, w6, w7);
+}
+
+int ffa_handle_notification_set(struct cpu_user_regs *regs)
+{
+    struct domain *d = current->domain;
+    uint32_t src_dst = get_user_reg(regs, 1);
+    uint32_t flags = get_user_reg(regs, 2);
+    uint32_t bitmap_lo = get_user_reg(regs, 3);
+    uint32_t bitmap_hi = get_user_reg(regs, 4);
+
+    if ( !notif_enabled )
+        return FFA_RET_NOT_SUPPORTED;
+
+    if ( (src_dst >> 16) != ffa_get_vm_id(d) )
+        return FFA_RET_INVALID_PARAMETERS;
+
+    /* Let the SPMC check the destination of the notification */
+    return ffa_simple_call(FFA_NOTIFICATION_SET, src_dst, flags, bitmap_lo,
+                           bitmap_hi);
+}
+
+/*
+ * Extract a 16-bit ID (index n) from the successful return value from
+ * FFA_NOTIFICATION_INFO_GET_64 or FFA_NOTIFICATION_INFO_GET_32. IDs are
+ * returned in registers 3 to 7 with four IDs per register for 64-bit
+ * calling convention and two IDs per register for 32-bit calling
+ * convention.
+ */
+static uint16_t get_id_from_resp(struct arm_smccc_1_2_regs *resp,
+                                 unsigned int n)
+{
+    unsigned int ids_per_reg;
+    unsigned int reg_idx;
+    unsigned int reg_shift;
+
+    if ( smccc_is_conv_64(resp->a0) )
+        ids_per_reg = 4;
+    else
+        ids_per_reg = 2;
+
+    reg_idx = n / ids_per_reg + 3;
+    reg_shift = ( n % ids_per_reg ) * 16;
+
+    switch ( reg_idx )
+    {
+    case 3:
+        return resp->a3 >> reg_shift;
+    case 4:
+        return resp->a4 >> reg_shift;
+    case 5:
+        return resp->a5 >> reg_shift;
+    case 6:
+        return resp->a6 >> reg_shift;
+    case 7:
+        return resp->a7 >> reg_shift;
+    default:
+        ASSERT(0); /* "Can't happen" */
+        return 0;
+    }
+}
+
+static void notif_vm_pend_intr(uint16_t vm_id)
+{
+    struct ffa_ctx *ctx;
+    struct domain *d;
+    struct vcpu *v;
+
+    /*
+     * vm_id == 0 means a notifications pending for Xen itself, but
+     * we don't support that yet.
+     */
+    if ( !vm_id )
+        return;
+
+    /*
+     * This can fail if the domain has been destroyed after
+     * FFA_NOTIFICATION_INFO_GET_64. Ignoring this is harmless since the
+     * guest doesn't exist any more.
+     */
+    d = ffa_rcu_lock_domain_by_vm_id(vm_id);
+    if ( !d )
+        return;
+
+    /*
+     * Failing here is unlikely since the domain ID must have been reused
+     * for a new domain between the FFA_NOTIFICATION_INFO_GET_64 and
+     * ffa_rcu_lock_domain_by_vm_id() calls.
+     *
+     * Continuing on the scenario above if the domain has FF-A enabled. We
+     * can't tell here if the domain ID has been reused for a new domain so
+     * we inject an NPI. When the NPI handler in the domain calls
+     * FFA_NOTIFICATION_GET it will have accurate information, the worst
+     * case is a spurious NPI.
+     */
+    ctx = d->arch.tee;
+    if ( !ctx )
+        goto out_unlock;
+
+    /*
+     * arch.tee is freed from complete_domain_destroy() so the RCU lock
+     * guarantees that the data structure isn't freed while we're accessing
+     * it.
+     */
+    ACCESS_ONCE(ctx->notif.secure_pending) = true;
+
+    /*
+     * Since we're only delivering global notification, always
+     * deliver to the first online vCPU. It doesn't matter
+     * which we chose, as long as it's available.
+     */
+    for_each_vcpu(d, v)
+    {
+        if ( is_vcpu_online(v) )
+        {
+            vgic_inject_irq(d, v, GUEST_FFA_NOTIF_PEND_INTR_ID,
+                            true);
+            break;
+        }
+    }
+    if ( !v )
+        printk(XENLOG_ERR "ffa: can't inject NPI, all vCPUs offline\n");
+
+out_unlock:
+    rcu_unlock_domain(d);
+}
+
+static void notif_sri_action(void *unused)
+{
+    const struct arm_smccc_1_2_regs arg = {
+        .a0 = FFA_NOTIFICATION_INFO_GET_64,
+    };
+    struct arm_smccc_1_2_regs resp;
+    unsigned int id_pos;
+    unsigned int list_count;
+    uint64_t ids_count;
+    unsigned int n;
+    int32_t res;
+
+    do {
+        arm_smccc_1_2_smc(&arg, &resp);
+        res = ffa_get_ret_code(&resp);
+        if ( res )
+        {
+            if ( res != FFA_RET_NO_DATA )
+                printk(XENLOG_ERR "ffa: notification info get failed: error %d\n",
+                       res);
+            return;
+        }
+
+        ids_count = resp.a2 >> FFA_NOTIF_INFO_GET_ID_LIST_SHIFT;
+        list_count = ( resp.a2 >> FFA_NOTIF_INFO_GET_ID_COUNT_SHIFT ) &
+                     FFA_NOTIF_INFO_GET_ID_COUNT_MASK;
+
+        id_pos = 0;
+        for ( n = 0; n < list_count; n++ )
+        {
+            unsigned int count = ((ids_count >> 2 * n) & 0x3) + 1;
+            uint16_t vm_id = get_id_from_resp(&resp, id_pos);
+
+            notif_vm_pend_intr(vm_id);
+
+            id_pos += count;
+        }
+
+    } while (resp.a2 & FFA_NOTIF_INFO_GET_MORE_FLAG);
+}
+
+static DECLARE_TASKLET(notif_sri_tasklet, notif_sri_action, NULL);
+
+static void notif_irq_handler(int irq, void *data)
+{
+    tasklet_schedule(&notif_sri_tasklet);
+}
+
+static int32_t ffa_notification_bitmap_create(uint16_t vm_id,
+                                              uint32_t vcpu_count)
+{
+    return ffa_simple_call(FFA_NOTIFICATION_BITMAP_CREATE, vm_id, vcpu_count,
+                           0, 0);
+}
+
+static int32_t ffa_notification_bitmap_destroy(uint16_t vm_id)
+{
+    return ffa_simple_call(FFA_NOTIFICATION_BITMAP_DESTROY, vm_id, 0, 0, 0);
+}
+
+void ffa_notif_init_interrupt(void)
+{
+    int ret;
+
+    if ( notif_enabled && notif_sri_irq < NR_GIC_SGI )
+    {
+        /*
+         * An error here is unlikely since the primary CPU has already
+         * succeeded in installing the interrupt handler. If this fails it
+         * may lead to a problem with notifictaions.
+         *
+         * The CPUs without an notification handler installed will fail to
+         * trigger on the SGI indicating that there are notifications
+         * pending, while the SPMC in the secure world will not notice that
+         * the interrupt was lost.
+         */
+        ret = request_irq(notif_sri_irq, 0, notif_irq_handler, "FF-A notif",
+                          NULL);
+        if ( ret )
+            printk(XENLOG_ERR "ffa: request_irq irq %u failed: error %d\n",
+                   notif_sri_irq, ret);
+    }
+}
+
+void ffa_notif_init(void)
+{
+    const struct arm_smccc_1_2_regs arg = {
+        .a0 = FFA_FEATURES,
+        .a1 = FFA_FEATURE_SCHEDULE_RECV_INTR,
+    };
+    struct arm_smccc_1_2_regs resp;
+    unsigned int irq;
+    int ret;
+
+    arm_smccc_1_2_smc(&arg, &resp);
+    if ( resp.a0 != FFA_SUCCESS_32 )
+        return;
+
+    irq = resp.a2;
+    notif_sri_irq = irq;
+    if ( irq >= NR_GIC_SGI )
+        irq_set_type(irq, IRQ_TYPE_EDGE_RISING);
+    ret = request_irq(irq, 0, notif_irq_handler, "FF-A notif", NULL);
+    if ( ret )
+    {
+        printk(XENLOG_ERR "ffa: request_irq irq %u failed: error %d\n",
+               irq, ret);
+        return;
+    }
+
+    notif_enabled = true;
+}
+
+int ffa_notif_domain_init(struct domain *d)
+{
+    struct ffa_ctx *ctx = d->arch.tee;
+    int32_t res;
+
+    if ( !notif_enabled )
+        return 0;
+
+    res = ffa_notification_bitmap_create(ffa_get_vm_id(d), d->max_vcpus);
+    if ( res )
+        return -ENOMEM;
+
+    ctx->notif.enabled = true;
+
+    return 0;
+}
+
+void ffa_notif_domain_destroy(struct domain *d)
+{
+    struct ffa_ctx *ctx = d->arch.tee;
+
+    if ( ctx->notif.enabled )
+    {
+        ffa_notification_bitmap_destroy(ffa_get_vm_id(d));
+        ctx->notif.enabled = false;
+    }
+}
diff --git a/xen/arch/arm/tee/ffa_partinfo.c b/xen/arch/arm/tee/ffa_partinfo.c
index dc10595848..93a03c6bc6 100644
--- a/xen/arch/arm/tee/ffa_partinfo.c
+++ b/xen/arch/arm/tee/ffa_partinfo.c
@@ -306,7 +306,7 @@ static void vm_destroy_bitmap_init(struct ffa_ctx *ctx,
     }
 }
 
-bool ffa_partinfo_domain_init(struct domain *d)
+int ffa_partinfo_domain_init(struct domain *d)
 {
     unsigned int count = BITS_TO_LONGS(subscr_vm_destroyed_count);
     struct ffa_ctx *ctx = d->arch.tee;
@@ -315,7 +315,7 @@ bool ffa_partinfo_domain_init(struct domain *d)
 
     ctx->vm_destroy_bitmap = xzalloc_array(unsigned long, count);
     if ( !ctx->vm_destroy_bitmap )
-        return false;
+        return -ENOMEM;
 
     for ( n = 0; n < subscr_vm_created_count; n++ )
     {
@@ -330,7 +330,10 @@ bool ffa_partinfo_domain_init(struct domain *d)
     }
     vm_destroy_bitmap_init(ctx, n);
 
-    return n == subscr_vm_created_count;
+    if ( n != subscr_vm_created_count )
+        return -EIO;
+
+    return 0;
 }
 
 bool ffa_partinfo_domain_destroy(struct domain *d)
diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_private.h
index 98236cbf14..7c6b06f686 100644
--- a/xen/arch/arm/tee/ffa_private.h
+++ b/xen/arch/arm/tee/ffa_private.h
@@ -25,6 +25,7 @@
 #define FFA_RET_DENIED                  -6
 #define FFA_RET_RETRY                   -7
 #define FFA_RET_ABORTED                 -8
+#define FFA_RET_NO_DATA                 -9
 
 /* FFA_VERSION helpers */
 #define FFA_VERSION_MAJOR_SHIFT         16U
@@ -175,6 +176,21 @@
  */
 #define FFA_PARTITION_INFO_GET_COUNT_FLAG BIT(0, U)
 
+/* Flags used in calls to FFA_NOTIFICATION_GET interface  */
+#define FFA_NOTIF_FLAG_BITMAP_SP        BIT(0, U)
+#define FFA_NOTIF_FLAG_BITMAP_VM        BIT(1, U)
+#define FFA_NOTIF_FLAG_BITMAP_SPM       BIT(2, U)
+#define FFA_NOTIF_FLAG_BITMAP_HYP       BIT(3, U)
+
+#define FFA_NOTIF_INFO_GET_MORE_FLAG        BIT(0, U)
+#define FFA_NOTIF_INFO_GET_ID_LIST_SHIFT    12
+#define FFA_NOTIF_INFO_GET_ID_COUNT_SHIFT   7
+#define FFA_NOTIF_INFO_GET_ID_COUNT_MASK    0x1F
+
+/* Feature IDs used with FFA_FEATURES */
+#define FFA_FEATURE_NOTIF_PEND_INTR     0x1U
+#define FFA_FEATURE_SCHEDULE_RECV_INTR  0x2U
+
 /* Function IDs */
 #define FFA_ERROR                       0x84000060U
 #define FFA_SUCCESS_32                  0x84000061U
@@ -213,6 +229,24 @@
 #define FFA_MEM_FRAG_TX                 0x8400007BU
 #define FFA_MSG_SEND                    0x8400006EU
 #define FFA_MSG_POLL                    0x8400006AU
+#define FFA_NOTIFICATION_BITMAP_CREATE  0x8400007DU
+#define FFA_NOTIFICATION_BITMAP_DESTROY 0x8400007EU
+#define FFA_NOTIFICATION_BIND           0x8400007FU
+#define FFA_NOTIFICATION_UNBIND         0x84000080U
+#define FFA_NOTIFICATION_SET            0x84000081U
+#define FFA_NOTIFICATION_GET            0x84000082U
+#define FFA_NOTIFICATION_INFO_GET_32    0x84000083U
+#define FFA_NOTIFICATION_INFO_GET_64    0xC4000083U
+
+struct ffa_ctx_notif {
+    bool enabled;
+
+    /*
+     * True if domain is reported by FFA_NOTIFICATION_INFO_GET to have
+     * pending global notifications.
+     */
+    bool secure_pending;
+};
 
 struct ffa_ctx {
     void *rx;
@@ -228,6 +262,7 @@ struct ffa_ctx {
     struct list_head shm_list;
     /* Number of allocated shared memory object */
     unsigned int shm_count;
+    struct ffa_ctx_notif notif;
     /*
      * tx_lock is used to serialize access to tx
      * rx_lock is used to serialize access to rx
@@ -257,7 +292,7 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs);
 int ffa_handle_mem_reclaim(uint64_t handle, uint32_t flags);
 
 bool ffa_partinfo_init(void);
-bool ffa_partinfo_domain_init(struct domain *d);
+int ffa_partinfo_domain_init(struct domain *d);
 bool ffa_partinfo_domain_destroy(struct domain *d);
 int32_t ffa_handle_partition_info_get(uint32_t w1, uint32_t w2, uint32_t w3,
                                       uint32_t w4, uint32_t w5, uint32_t *count,
@@ -271,12 +306,31 @@ uint32_t ffa_handle_rxtx_map(uint32_t fid, register_t tx_addr,
 uint32_t ffa_handle_rxtx_unmap(void);
 int32_t ffa_handle_rx_release(void);
 
+void ffa_notif_init(void);
+void ffa_notif_init_interrupt(void);
+int ffa_notif_domain_init(struct domain *d);
+void ffa_notif_domain_destroy(struct domain *d);
+
+int ffa_handle_notification_bind(struct cpu_user_regs *regs);
+int ffa_handle_notification_unbind(struct cpu_user_regs *regs);
+void ffa_handle_notification_info_get(struct cpu_user_regs *regs);
+void ffa_handle_notification_get(struct cpu_user_regs *regs);
+int ffa_handle_notification_set(struct cpu_user_regs *regs);
+
 static inline uint16_t ffa_get_vm_id(const struct domain *d)
 {
     /* +1 since 0 is reserved for the hypervisor in FF-A */
     return d->domain_id + 1;
 }
 
+static inline struct domain *ffa_rcu_lock_domain_by_vm_id(uint16_t vm_id)
+{
+    ASSERT(vm_id);
+
+    /* -1 to match ffa_get_vm_id() */
+    return rcu_lock_domain_by_id(vm_id - 1);
+}
+
 static inline void ffa_set_regs(struct cpu_user_regs *regs, register_t v0,
                                 register_t v1, register_t v2, register_t v3,
                                 register_t v4, register_t v5, register_t v6,
diff --git a/xen/arch/arm/tee/tee.c b/xen/arch/arm/tee/tee.c
index b1cae16c17..3f65e45a78 100644
--- a/xen/arch/arm/tee/tee.c
+++ b/xen/arch/arm/tee/tee.c
@@ -94,7 +94,7 @@ static int __init tee_init(void)
     return 0;
 }
 
-__initcall(tee_init);
+presmp_initcall(tee_init);
 
 void __init init_tee_secondary(void)
 {
diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h
index 289af81bd6..e2412a1747 100644
--- a/xen/include/public/arch-arm.h
+++ b/xen/include/public/arch-arm.h
@@ -505,6 +505,7 @@ typedef uint64_t xen_callback_t;
 #define GUEST_MAX_VCPUS 128
 
 /* Interrupts */
+
 #define GUEST_TIMER_VIRT_PPI    27
 #define GUEST_TIMER_PHYS_S_PPI  29
 #define GUEST_TIMER_PHYS_NS_PPI 30
@@ -515,6 +516,19 @@ typedef uint64_t xen_callback_t;
 #define GUEST_VIRTIO_MMIO_SPI_FIRST   33
 #define GUEST_VIRTIO_MMIO_SPI_LAST    43
 
+/*
+ * SGI is the preferred delivery mechanism of FF-A pending notifications or
+ * schedule recveive interrupt. SGIs 8-15 are normally not used by a guest
+ * as they in a non-virtualized system typically are assigned to the secure
+ * world. Here we're free to use SGI 8-15 since they are virtual and have
+ * nothing to do with the secure world.
+ *
+ * For partitioning of SGIs see also Arm Base System Architecture v1.0C,
+ * https://developer.arm.com/documentation/den0094/
+ */
+#define GUEST_FFA_NOTIF_PEND_INTR_ID      8
+#define GUEST_FFA_SCHEDULE_RECV_INTR_ID   9
+
 /* PSCI functions */
 #define PSCI_cpu_suspend 0
 #define PSCI_cpu_off     1
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/EPT: correct special page checking in epte_get_entry_emt()
Message-Id: <E1sHzkO-0000Pn-UL@xenbits.xenproject.org>
Date: Fri, 14 Jun 2024 05:45:12 +0000

commit 5540b94e8191059eb9cbbe98ac316232a42208f6
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Thu Jun 13 16:53:34 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 13 16:53:34 2024 +0200

    x86/EPT: correct special page checking in epte_get_entry_emt()
    
    mfn_valid() granularity is (currently) 256Mb. Therefore the start of a
    1Gb page passing the test doesn't necessarily mean all parts of such a
    range would also pass. Yet using the result of mfn_to_page() on an MFN
    which doesn't pass mfn_valid() checking is liable to result in a crash
    (the invocation of mfn_to_page() alone is presumably "just" UB in such a
    case).
    
    Fixes: ca24b2ffdbd9 ("x86/hvm: set 'ipat' in EPT for special pages")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/mm/p2m-ept.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c
index f83610cb8c..9f276afaea 100644
--- a/xen/arch/x86/mm/p2m-ept.c
+++ b/xen/arch/x86/mm/p2m-ept.c
@@ -519,8 +519,12 @@ int epte_get_entry_emt(struct domain *d, gfn_t gfn, mfn_t mfn,
     }
 
     for ( special_pgs = i = 0; i < (1ul << order); i++ )
-        if ( is_special_page(mfn_to_page(mfn_add(mfn, i))) )
+    {
+        mfn_t cur = mfn_add(mfn, i);
+
+        if ( mfn_valid(cur) && is_special_page(mfn_to_page(cur)) )
             special_pgs++;
+    }
 
     if ( special_pgs )
     {
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/EPT: avoid marking non-present entries for re-configuring
Message-Id: <E1sHzkZ-0000QG-16@xenbits.xenproject.org>
Date: Fri, 14 Jun 2024 05:45:23 +0000

commit 777c71d31325bc55ba1cc3f317d4155fe519ab0b
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Thu Jun 13 16:54:17 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 13 16:54:17 2024 +0200

    x86/EPT: avoid marking non-present entries for re-configuring
    
    For non-present entries EMT, like most other fields, is meaningless to
    hardware. Make the logic in ept_set_entry() setting the field (and iPAT)
    conditional upon dealing with a present entry, leaving the value at 0
    otherwise. This has two effects for epte_get_entry_emt() which we'll
    want to leverage subsequently:
    1) The call moved here now won't be issued with INVALID_MFN anymore (a
       respective BUG_ON() is being added).
    2) Neither of the other two calls could now be issued with a truncated
       form of INVALID_MFN anymore (as long as there's no bug anywhere
       marking an entry present when that was populated using INVALID_MFN).
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/mm/p2m-ept.c | 29 ++++++++++++++++++-----------
 1 file changed, 18 insertions(+), 11 deletions(-)

diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c
index 9f276afaea..a3ffb97876 100644
--- a/xen/arch/x86/mm/p2m-ept.c
+++ b/xen/arch/x86/mm/p2m-ept.c
@@ -650,6 +650,8 @@ static int cf_check resolve_misconfig(struct p2m_domain *p2m, unsigned long gfn)
             if ( e.emt != MTRR_NUM_TYPES )
                 break;
 
+            ASSERT(is_epte_present(&e));
+
             if ( level == 0 )
             {
                 for ( gfn -= i, i = 0; i < EPT_PAGETABLE_ENTRIES; ++i )
@@ -915,17 +917,6 @@ ept_set_entry(struct p2m_domain *p2m, gfn_t gfn_, mfn_t mfn,
 
     if ( mfn_valid(mfn) || p2m_allows_invalid_mfn(p2mt) )
     {
-        bool ipat;
-        int emt = epte_get_entry_emt(p2m->domain, _gfn(gfn), mfn,
-                                     i * EPT_TABLE_ORDER, &ipat,
-                                     p2mt);
-
-        if ( emt >= 0 )
-            new_entry.emt = emt;
-        else /* ept_handle_misconfig() will need to take care of this. */
-            new_entry.emt = MTRR_NUM_TYPES;
-
-        new_entry.ipat = ipat;
         new_entry.sp = !!i;
         new_entry.sa_p2mt = p2mt;
         new_entry.access = p2ma;
@@ -941,6 +932,22 @@ ept_set_entry(struct p2m_domain *p2m, gfn_t gfn_, mfn_t mfn,
             need_modify_vtd_table = 0;
 
         ept_p2m_type_to_flags(p2m, &new_entry);
+
+        if ( is_epte_present(&new_entry) )
+        {
+            bool ipat;
+            int emt = epte_get_entry_emt(p2m->domain, _gfn(gfn), mfn,
+                                         i * EPT_TABLE_ORDER, &ipat,
+                                         p2mt);
+
+            BUG_ON(mfn_eq(mfn, INVALID_MFN));
+
+            if ( emt >= 0 )
+                new_entry.emt = emt;
+            else /* ept_handle_misconfig() will need to take care of this. */
+                new_entry.emt = MTRR_NUM_TYPES;
+            new_entry.ipat = ipat;
+        }
     }
 
     if ( sve != -1 )
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/EPT: drop questionable mfn_valid() from epte_get_entry_emt()
Message-Id: <E1sHzkj-0000Qy-43@xenbits.xenproject.org>
Date: Fri, 14 Jun 2024 05:45:33 +0000

commit 4fdd8d75566fdad06667a79ec0ce6f43cc466c54
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Thu Jun 13 16:55:22 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 13 16:55:22 2024 +0200

    x86/EPT: drop questionable mfn_valid() from epte_get_entry_emt()
    
    mfn_valid() is RAM-focused; it will often return false for MMIO. Yet
    access to actual MMIO space should not generally be restricted to UC
    only; especially video frame buffer accesses are unduly affected by such
    a restriction.
    
    Since, as of 777c71d31325 ("x86/EPT: avoid marking non-present entries
    for re-configuring"), the function won't be called with INVALID_MFN or,
    worse, truncated forms thereof anymore, we call fully drop that check.
    
    Fixes: 81fd0d3ca4b2 ("x86/hvm: simplify 'mmio_direct' check in epte_get_entry_emt()")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/mm/p2m-ept.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c
index a3ffb97876..469e27ee93 100644
--- a/xen/arch/x86/mm/p2m-ept.c
+++ b/xen/arch/x86/mm/p2m-ept.c
@@ -501,12 +501,6 @@ int epte_get_entry_emt(struct domain *d, gfn_t gfn, mfn_t mfn,
         return -1;
     }
 
-    if ( !mfn_valid(mfn) )
-    {
-        *ipat = true;
-        return X86_MT_UC;
-    }
-
     /*
      * Conditional must be kept in sync with the code in
      * {iomem,ioports}_{permit,deny}_access().
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: Lookup bootinfo shm bank during the mapping
Message-Id: <E1sI3eC-0001P2-2s@xenbits.xenproject.org>
Date: Fri, 14 Jun 2024 09:55:04 +0000

commit e90f8d562dd1aba59fa1e6835ed944b15b6d1931
Author:     Luca Fancellu <luca.fancellu@arm.com>
AuthorDate: Fri May 24 13:40:49 2024 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 14 10:44:57 2024 +0100

    xen/arm: Lookup bootinfo shm bank during the mapping
    
    The current static shared memory code is using bootinfo banks when it
    needs to find the number of borrowers, so every time assign_shared_memory
    is called, the bank is searched in the bootinfo.shmem structure.
    
    There is nothing wrong with it, however the bank can be used also to
    retrieve the start address and size and also to pass less argument to
    assign_shared_memory. When retrieving the information from the bootinfo
    bank, it's also possible to move the checks on alignment to
    process_shm_node in the early stages.
    
    So create a new function find_shm_bank_by_id() which takes a
    'struct shared_meminfo' structure and the shared memory ID, to look for a
    bank with a matching ID, take the physical host address and size from the
    bank, pass the bank to assign_shared_memory() removing the now unnecessary
    arguments and finally remove the acquire_nr_borrower_domain() function
    since now the information can be extracted from the passed bank.
    Move the "xen,shm-id" parsing early in process_shm to bail out quickly in
    case of errors (unlikely), as said above, move the checks on alignment
    to process_shm_node.
    
    Drawback of this change is that now the bootinfo are used also when the
    bank doesn't need to be allocated, however it will be convenient later
    to use it as an argument for assign_shared_memory when dealing with
    the use case where the Host physical address is not supplied by the user.
    
    Signed-off-by: Luca Fancellu <luca.fancellu@arm.com>
    Reviewed-by: Michal Orzel <michal.orzel@amd.com>
---
 xen/arch/arm/static-shmem.c | 100 +++++++++++++++++++++++---------------------
 1 file changed, 53 insertions(+), 47 deletions(-)

diff --git a/xen/arch/arm/static-shmem.c b/xen/arch/arm/static-shmem.c
index 78881dd1d3..0a1c327e90 100644
--- a/xen/arch/arm/static-shmem.c
+++ b/xen/arch/arm/static-shmem.c
@@ -19,29 +19,21 @@ static void __init __maybe_unused build_assertions(void)
                  offsetof(struct shared_meminfo, bank)));
 }
 
-static int __init acquire_nr_borrower_domain(struct domain *d,
-                                             paddr_t pbase, paddr_t psize,
-                                             unsigned long *nr_borrowers)
+static const struct membank __init *
+find_shm_bank_by_id(const struct membanks *shmem, const char *shm_id)
 {
-    const struct membanks *shmem = bootinfo_get_shmem();
     unsigned int bank;
 
-    /* Iterate reserved memory to find requested shm bank. */
     for ( bank = 0 ; bank < shmem->nr_banks; bank++ )
     {
-        paddr_t bank_start = shmem->bank[bank].start;
-        paddr_t bank_size = shmem->bank[bank].size;
-
-        if ( (pbase == bank_start) && (psize == bank_size) )
+        if ( strcmp(shm_id, shmem->bank[bank].shmem_extra->shm_id) == 0 )
             break;
     }
 
     if ( bank == shmem->nr_banks )
-        return -ENOENT;
+        return NULL;
 
-    *nr_borrowers = shmem->bank[bank].shmem_extra->nr_shm_borrowers;
-
-    return 0;
+    return &shmem->bank[bank];
 }
 
 /*
@@ -103,14 +95,18 @@ static mfn_t __init acquire_shared_memory_bank(struct domain *d,
     return smfn;
 }
 
-static int __init assign_shared_memory(struct domain *d,
-                                       paddr_t pbase, paddr_t psize,
-                                       paddr_t gbase)
+static int __init assign_shared_memory(struct domain *d, paddr_t gbase,
+                                       const struct membank *shm_bank)
 {
     mfn_t smfn;
     int ret = 0;
     unsigned long nr_pages, nr_borrowers, i;
     struct page_info *page;
+    paddr_t pbase, psize;
+
+    pbase = shm_bank->start;
+    psize = shm_bank->size;
+    nr_borrowers = shm_bank->shmem_extra->nr_shm_borrowers;
 
     printk("%pd: allocate static shared memory BANK %#"PRIpaddr"-%#"PRIpaddr".\n",
            d, pbase, pbase + psize);
@@ -135,14 +131,6 @@ static int __init assign_shared_memory(struct domain *d,
         }
     }
 
-    /*
-     * Get the right amount of references per page, which is the number of
-     * borrower domains.
-     */
-    ret = acquire_nr_borrower_domain(d, pbase, psize, &nr_borrowers);
-    if ( ret )
-        return ret;
-
     /*
      * Instead of letting borrower domain get a page ref, we add as many
      * additional reference as the number of borrowers when the owner
@@ -199,6 +187,7 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo,
 
     dt_for_each_child_node(node, shm_node)
     {
+        const struct membank *boot_shm_bank;
         const struct dt_property *prop;
         const __be32 *cells;
         uint32_t addr_cells, size_cells;
@@ -212,6 +201,23 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo,
         if ( !dt_device_is_compatible(shm_node, "xen,domain-shared-memory-v1") )
             continue;
 
+        if ( dt_property_read_string(shm_node, "xen,shm-id", &shm_id) )
+        {
+            printk("%pd: invalid \"xen,shm-id\" property", d);
+            return -EINVAL;
+        }
+        BUG_ON((strlen(shm_id) <= 0) || (strlen(shm_id) >= MAX_SHM_ID_LENGTH));
+
+        boot_shm_bank = find_shm_bank_by_id(bootinfo_get_shmem(), shm_id);
+        if ( !boot_shm_bank )
+        {
+            printk("%pd: static shared memory bank not found: '%s'", d, shm_id);
+            return -ENOENT;
+        }
+
+        pbase = boot_shm_bank->start;
+        psize = boot_shm_bank->size;
+
         /*
          * xen,shared-mem = <pbase, gbase, size>;
          * TODO: pbase is optional.
@@ -221,20 +227,7 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo,
         prop = dt_find_property(shm_node, "xen,shared-mem", NULL);
         BUG_ON(!prop);
         cells = (const __be32 *)prop->value;
-        device_tree_get_reg(&cells, addr_cells, addr_cells, &pbase, &gbase);
-        psize = dt_read_paddr(cells, size_cells);
-        if ( !IS_ALIGNED(pbase, PAGE_SIZE) || !IS_ALIGNED(gbase, PAGE_SIZE) )
-        {
-            printk("%pd: physical address 0x%"PRIpaddr", or guest address 0x%"PRIpaddr" is not suitably aligned.\n",
-                   d, pbase, gbase);
-            return -EINVAL;
-        }
-        if ( !IS_ALIGNED(psize, PAGE_SIZE) )
-        {
-            printk("%pd: size 0x%"PRIpaddr" is not suitably aligned\n",
-                   d, psize);
-            return -EINVAL;
-        }
+        gbase = dt_read_paddr(cells + addr_cells, addr_cells);
 
         for ( i = 0; i < PFN_DOWN(psize); i++ )
             if ( !mfn_valid(mfn_add(maddr_to_mfn(pbase), i)) )
@@ -251,13 +244,6 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo,
         if ( dt_property_read_string(shm_node, "role", &role_str) == 0 )
             owner_dom_io = false;
 
-        if ( dt_property_read_string(shm_node, "xen,shm-id", &shm_id) )
-        {
-            printk("%pd: invalid \"xen,shm-id\" property", d);
-            return -EINVAL;
-        }
-        BUG_ON((strlen(shm_id) <= 0) || (strlen(shm_id) >= MAX_SHM_ID_LENGTH));
-
         /*
          * DOMID_IO is a fake domain and is not described in the Device-Tree.
          * Therefore when the owner of the shared region is DOMID_IO, we will
@@ -270,8 +256,8 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo,
              * We found the first borrower of the region, the owner was not
              * specified, so they should be assigned to dom_io.
              */
-            ret = assign_shared_memory(owner_dom_io ? dom_io : d,
-                                       pbase, psize, gbase);
+            ret = assign_shared_memory(owner_dom_io ? dom_io : d, gbase,
+                                       boot_shm_bank);
             if ( ret )
                 return ret;
         }
@@ -439,12 +425,32 @@ int __init process_shm_node(const void *fdt, int node, uint32_t address_cells,
     device_tree_get_reg(&cell, address_cells, address_cells, &paddr, &gaddr);
     size = dt_next_cell(size_cells, &cell);
 
+    if ( !IS_ALIGNED(paddr, PAGE_SIZE) )
+    {
+        printk("fdt: physical address 0x%"PRIpaddr" is not suitably aligned.\n",
+               paddr);
+        return -EINVAL;
+    }
+
+    if ( !IS_ALIGNED(gaddr, PAGE_SIZE) )
+    {
+        printk("fdt: guest address 0x%"PRIpaddr" is not suitably aligned.\n",
+               gaddr);
+        return -EINVAL;
+    }
+
     if ( !size )
     {
         printk("fdt: the size for static shared memory region can not be zero\n");
         return -EINVAL;
     }
 
+    if ( !IS_ALIGNED(size, PAGE_SIZE) )
+    {
+        printk("fdt: size 0x%"PRIpaddr" is not suitably aligned\n", size);
+        return -EINVAL;
+    }
+
     end = paddr + size;
     if ( end <= paddr )
     {
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: Wrap shared memory mapping code in one function
Message-Id: <E1sI3eM-0001PT-6P@xenbits.xenproject.org>
Date: Fri, 14 Jun 2024 09:55:14 +0000

commit 79a43c8838039c31ff6f06de827b71909eca76b8
Author:     Luca Fancellu <luca.fancellu@arm.com>
AuthorDate: Fri May 24 13:40:50 2024 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 14 10:44:57 2024 +0100

    xen/arm: Wrap shared memory mapping code in one function
    
    Wrap the code and logic that is calling assign_shared_memory
    and map_regions_p2mt into a new function 'handle_shared_mem_bank',
    it will become useful later when the code will allow the user to
    don't pass the host physical address.
    
    Signed-off-by: Luca Fancellu <luca.fancellu@arm.com>
    Reviewed-by: Michal Orzel <michal.orzel@amd.com>
---
 xen/arch/arm/static-shmem.c | 86 ++++++++++++++++++++++++++++-----------------
 1 file changed, 53 insertions(+), 33 deletions(-)

diff --git a/xen/arch/arm/static-shmem.c b/xen/arch/arm/static-shmem.c
index 0a1c327e90..c15a651306 100644
--- a/xen/arch/arm/static-shmem.c
+++ b/xen/arch/arm/static-shmem.c
@@ -180,6 +180,53 @@ append_shm_bank_to_domain(struct kernel_info *kinfo, paddr_t start,
     return 0;
 }
 
+static int __init handle_shared_mem_bank(struct domain *d, paddr_t gbase,
+                                         const char *role_str,
+                                         const struct membank *shm_bank)
+{
+    bool owner_dom_io = true;
+    paddr_t pbase, psize;
+    int ret;
+
+    pbase = shm_bank->start;
+    psize = shm_bank->size;
+
+    /*
+     * "role" property is optional and if it is defined explicitly,
+     * then the owner domain is not the default "dom_io" domain.
+     */
+    if ( role_str != NULL )
+        owner_dom_io = false;
+
+    /*
+     * DOMID_IO is a fake domain and is not described in the Device-Tree.
+     * Therefore when the owner of the shared region is DOMID_IO, we will
+     * only find the borrowers.
+     */
+    if ( (owner_dom_io && !is_shm_allocated_to_domio(pbase)) ||
+         (!owner_dom_io && strcmp(role_str, "owner") == 0) )
+    {
+        /*
+         * We found the first borrower of the region, the owner was not
+         * specified, so they should be assigned to dom_io.
+         */
+        ret = assign_shared_memory(owner_dom_io ? dom_io : d, gbase, shm_bank);
+        if ( ret )
+            return ret;
+    }
+
+    if ( owner_dom_io || (strcmp(role_str, "borrower") == 0) )
+    {
+        /* Set up P2M foreign mapping for borrower domain. */
+        ret = map_regions_p2mt(d, _gfn(PFN_UP(gbase)), PFN_DOWN(psize),
+                               _mfn(PFN_UP(pbase)), p2m_map_foreign_rw);
+        if ( ret )
+            return ret;
+    }
+
+    return 0;
+}
+
 int __init process_shm(struct domain *d, struct kernel_info *kinfo,
                        const struct dt_device_node *node)
 {
@@ -196,7 +243,6 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo,
         unsigned int i;
         const char *role_str;
         const char *shm_id;
-        bool owner_dom_io = true;
 
         if ( !dt_device_is_compatible(shm_node, "xen,domain-shared-memory-v1") )
             continue;
@@ -237,39 +283,13 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo,
                 return -EINVAL;
             }
 
-        /*
-         * "role" property is optional and if it is defined explicitly,
-         * then the owner domain is not the default "dom_io" domain.
-         */
-        if ( dt_property_read_string(shm_node, "role", &role_str) == 0 )
-            owner_dom_io = false;
+        /* "role" property is optional */
+        if ( dt_property_read_string(shm_node, "role", &role_str) != 0 )
+            role_str = NULL;
 
-        /*
-         * DOMID_IO is a fake domain and is not described in the Device-Tree.
-         * Therefore when the owner of the shared region is DOMID_IO, we will
-         * only find the borrowers.
-         */
-        if ( (owner_dom_io && !is_shm_allocated_to_domio(pbase)) ||
-             (!owner_dom_io && strcmp(role_str, "owner") == 0) )
-        {
-            /*
-             * We found the first borrower of the region, the owner was not
-             * specified, so they should be assigned to dom_io.
-             */
-            ret = assign_shared_memory(owner_dom_io ? dom_io : d, gbase,
-                                       boot_shm_bank);
-            if ( ret )
-                return ret;
-        }
-
-        if ( owner_dom_io || (strcmp(role_str, "borrower") == 0) )
-        {
-            /* Set up P2M foreign mapping for borrower domain. */
-            ret = map_regions_p2mt(d, _gfn(PFN_UP(gbase)), PFN_DOWN(psize),
-                                   _mfn(PFN_UP(pbase)), p2m_map_foreign_rw);
-            if ( ret )
-                return ret;
-        }
+        ret = handle_shared_mem_bank(d, gbase, role_str, boot_shm_bank);
+        if ( ret )
+            return ret;
 
         /*
          * Record static shared memory region info for later setting
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/p2m: put reference for level 2 superpage
Message-Id: <E1sI3eW-0001Pw-9l@xenbits.xenproject.org>
Date: Fri, 14 Jun 2024 09:55:24 +0000

commit 3e2121ce479bfcf9ad887ac77f2aa648f027ee5e
Author:     Penny Zheng <Penny.Zheng@arm.com>
AuthorDate: Tue May 28 13:56:03 2024 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 14 10:45:55 2024 +0100

    xen/p2m: put reference for level 2 superpage
    
    We are doing foreign memory mapping for static shared memory, and
    there is a great possibility that it could be super mapped.
    But today, p2m_put_l3_page could not handle superpages.
    
    This commits implements a new function p2m_put_l2_superpage to handle
    level 2 superpages, specifically for helping put extra references for
    foreign superpages.
    
    Modify relinquish_p2m_mapping as well to take into account preemption
    when we have a level-2 foreign mapping.
    
    Currently level 1 superpages are not handled because Xen is not
    preemptible and therefore some work is needed to handle such superpages,
    for which at some point Xen might end up freeing memory and therefore
    for such a big mapping it could end up in a very long operation.
    
    Signed-off-by: Penny Zheng <penny.zheng@arm.com>
    Signed-off-by: Luca Fancellu <luca.fancellu@arm.com>
    Reviewed-by: Julien Grall <jgrall@amazon.com>
---
 xen/arch/arm/mmu/p2m.c | 81 +++++++++++++++++++++++++++++++++++++-------------
 1 file changed, 61 insertions(+), 20 deletions(-)

diff --git a/xen/arch/arm/mmu/p2m.c b/xen/arch/arm/mmu/p2m.c
index 41fcca011c..1725cca649 100644
--- a/xen/arch/arm/mmu/p2m.c
+++ b/xen/arch/arm/mmu/p2m.c
@@ -753,34 +753,72 @@ static int p2m_mem_access_radix_set(struct p2m_domain *p2m, gfn_t gfn,
     return rc;
 }
 
-/*
- * Put any references on the single 4K page referenced by pte.
- * TODO: Handle superpages, for now we only take special references for leaf
- * pages (specifically foreign ones, which can't be super mapped today).
- */
-static void p2m_put_l3_page(const lpae_t pte)
+static void p2m_put_foreign_page(struct page_info *pg)
 {
-    mfn_t mfn = lpae_get_mfn(pte);
-
-    ASSERT(p2m_is_valid(pte));
-
     /*
-     * TODO: Handle other p2m types
-     *
      * It's safe to do the put_page here because page_alloc will
      * flush the TLBs if the page is reallocated before the end of
      * this loop.
      */
-    if ( p2m_is_foreign(pte.p2m.type) )
+    put_page(pg);
+}
+
+/* Put any references on the single 4K page referenced by mfn. */
+static void p2m_put_l3_page(mfn_t mfn, p2m_type_t type)
+{
+    /* TODO: Handle other p2m types */
+    if ( p2m_is_foreign(type) )
     {
         ASSERT(mfn_valid(mfn));
-        put_page(mfn_to_page(mfn));
+        p2m_put_foreign_page(mfn_to_page(mfn));
     }
     /* Detect the xenheap page and mark the stored GFN as invalid. */
-    else if ( p2m_is_ram(pte.p2m.type) && is_xen_heap_mfn(mfn) )
+    else if ( p2m_is_ram(type) && is_xen_heap_mfn(mfn) )
         page_set_xenheap_gfn(mfn_to_page(mfn), INVALID_GFN);
 }
 
+/* Put any references on the superpage referenced by mfn. */
+static void p2m_put_l2_superpage(mfn_t mfn, p2m_type_t type)
+{
+    struct page_info *pg;
+    unsigned int i;
+
+    /*
+     * TODO: Handle other p2m types, but be aware that any changes to handle
+     * different types should require an update on the relinquish code to handle
+     * preemption.
+     */
+    if ( !p2m_is_foreign(type) )
+        return;
+
+    ASSERT(mfn_valid(mfn));
+
+    pg = mfn_to_page(mfn);
+
+    for ( i = 0; i < XEN_PT_LPAE_ENTRIES; i++, pg++ )
+        p2m_put_foreign_page(pg);
+}
+
+/* Put any references on the page referenced by pte. */
+static void p2m_put_page(const lpae_t pte, unsigned int level)
+{
+    mfn_t mfn = lpae_get_mfn(pte);
+
+    ASSERT(p2m_is_valid(pte));
+
+    /*
+     * TODO: Currently we don't handle level 1 super-page, Xen is not
+     * preemptible and therefore some work is needed to handle such
+     * superpages, for which at some point Xen might end up freeing memory
+     * and therefore for such a big mapping it could end up in a very long
+     * operation.
+     */
+    if ( level == 2 )
+        return p2m_put_l2_superpage(mfn, pte.p2m.type);
+    else if ( level == 3 )
+        return p2m_put_l3_page(mfn, pte.p2m.type);
+}
+
 /* Free lpae sub-tree behind an entry */
 static void p2m_free_entry(struct p2m_domain *p2m,
                            lpae_t entry, unsigned int level)
@@ -809,9 +847,9 @@ static void p2m_free_entry(struct p2m_domain *p2m,
 #endif
 
         p2m->stats.mappings[level]--;
-        /* Nothing to do if the entry is a super-page. */
-        if ( level == 3 )
-            p2m_put_l3_page(entry);
+
+        p2m_put_page(entry, level);
+
         return;
     }
 
@@ -1558,9 +1596,12 @@ int relinquish_p2m_mapping(struct domain *d)
 
         count++;
         /*
-         * Arbitrarily preempt every 512 iterations.
+         * Arbitrarily preempt every 512 iterations or when we have a level-2
+         * foreign mapping.
          */
-        if ( !(count % 512) && hypercall_preempt_check() )
+        if ( (!(count % 512) ||
+              (p2m_is_foreign(t) && (order > XEN_PT_LEVEL_ORDER(2)))) &&
+             hypercall_preempt_check() )
         {
             rc = -ERESTART;
             break;
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: Parse xen,shared-mem when host phys address is not provided
Message-Id: <E1sI3eg-0001Qe-D0@xenbits.xenproject.org>
Date: Fri, 14 Jun 2024 09:55:34 +0000

commit 1544d355b54ff17ebddc9c79e531329510488307
Author:     Luca Fancellu <luca.fancellu@arm.com>
AuthorDate: Fri May 24 13:40:52 2024 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 14 10:46:01 2024 +0100

    xen/arm: Parse xen,shared-mem when host phys address is not provided
    
    Handle the parsing of the 'xen,shared-mem' property when the host physical
    address is not provided, this commit is introducing the logic to parse it,
    but the functionality is still not implemented and will be part of future
    commits.
    
    Rework the logic inside process_shm_node to check the shm_id before doing
    the other checks, because it ease the logic itself, add more comment on
    the logic.
    Now when the host physical address is not provided, the value
    INVALID_PADDR is chosen to signal this condition and it is stored as
    start of the bank, due to that change also early_print_info_shmem and
    init_sharedmem_pages are changed, to not handle banks with start equal
    to INVALID_PADDR.
    
    Another change is done inside meminfo_overlap_check, to skip banks that
    are starting with the start address INVALID_PADDR, that function is used
    to check banks from reserved memory, shared memory and ACPI and since
    the comment above the function states that wrapping around is not handled,
    it's unlikely for these bank to have the start address as INVALID_PADDR.
    Same change is done inside consider_modules, find_unallocated_memory and
    dt_unreserved_regions functions, in order to skip banks that starts with
    INVALID_PADDR from any computation.
    The changes above holds because of this consideration.
    
    Signed-off-by: Luca Fancellu <luca.fancellu@arm.com>
    Reviewed-by: Michal Orzel <michal.orzel@amd.com>
---
 xen/arch/arm/arm32/mmu/mm.c |  11 +++-
 xen/arch/arm/domain_build.c |   5 ++
 xen/arch/arm/setup.c        |  14 +++--
 xen/arch/arm/static-shmem.c | 125 ++++++++++++++++++++++++++++++--------------
 4 files changed, 111 insertions(+), 44 deletions(-)

diff --git a/xen/arch/arm/arm32/mmu/mm.c b/xen/arch/arm/arm32/mmu/mm.c
index be480c31ea..30a7aa1e8e 100644
--- a/xen/arch/arm/arm32/mmu/mm.c
+++ b/xen/arch/arm/arm32/mmu/mm.c
@@ -101,8 +101,15 @@ static paddr_t __init consider_modules(paddr_t s, paddr_t e,
     nr += reserved_mem->nr_banks;
     for ( ; i - nr < shmem->nr_banks; i++ )
     {
-        paddr_t r_s = shmem->bank[i - nr].start;
-        paddr_t r_e = r_s + shmem->bank[i - nr].size;
+        paddr_t r_s, r_e;
+
+        r_s = shmem->bank[i - nr].start;
+
+        /* Shared memory banks can contain INVALID_PADDR as start */
+        if ( INVALID_PADDR == r_s )
+            continue;
+
+        r_e = r_s + shmem->bank[i - nr].size;
 
         if ( s < r_e && r_s < e )
         {
diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index 968c497efc..02e7416851 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
@@ -927,6 +927,11 @@ static int __init find_unallocated_memory(const struct kernel_info *kinfo,
         for ( j = 0; j < mem_banks[i]->nr_banks; j++ )
         {
             start = mem_banks[i]->bank[j].start;
+
+            /* Shared memory banks can contain INVALID_PADDR as start */
+            if ( INVALID_PADDR == start )
+                continue;
+
             end = mem_banks[i]->bank[j].start + mem_banks[i]->bank[j].size;
             res = rangeset_remove_range(unalloc_mem, PFN_DOWN(start),
                                         PFN_DOWN(end - 1));
diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c
index c4e5c19b11..0c2fdaceaf 100644
--- a/xen/arch/arm/setup.c
+++ b/xen/arch/arm/setup.c
@@ -240,8 +240,15 @@ static void __init dt_unreserved_regions(paddr_t s, paddr_t e,
     offset = reserved_mem->nr_banks;
     for ( ; i - offset < shmem->nr_banks; i++ )
     {
-        paddr_t r_s = shmem->bank[i - offset].start;
-        paddr_t r_e = r_s + shmem->bank[i - offset].size;
+        paddr_t r_s, r_e;
+
+        r_s = shmem->bank[i - offset].start;
+
+        /* Shared memory banks can contain INVALID_PADDR as start */
+        if ( INVALID_PADDR == r_s )
+            continue;
+
+        r_e = r_s + shmem->bank[i - offset].size;
 
         if ( s < r_e && r_s < e )
         {
@@ -272,7 +279,8 @@ static bool __init meminfo_overlap_check(const struct membanks *mem,
         bank_start = mem->bank[i].start;
         bank_end = bank_start + mem->bank[i].size;
 
-        if ( region_end <= bank_start || region_start >= bank_end )
+        if ( INVALID_PADDR == bank_start || region_end <= bank_start ||
+             region_start >= bank_end )
             continue;
         else
         {
diff --git a/xen/arch/arm/static-shmem.c b/xen/arch/arm/static-shmem.c
index c15a651306..bc093b9da9 100644
--- a/xen/arch/arm/static-shmem.c
+++ b/xen/arch/arm/static-shmem.c
@@ -264,6 +264,12 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo,
         pbase = boot_shm_bank->start;
         psize = boot_shm_bank->size;
 
+        if ( INVALID_PADDR == pbase )
+        {
+            printk("%pd: host physical address must be chosen by users at the moment", d);
+            return -EINVAL;
+        }
+
         /*
          * xen,shared-mem = <pbase, gbase, size>;
          * TODO: pbase is optional.
@@ -377,7 +383,8 @@ int __init process_shm_node(const void *fdt, int node, uint32_t address_cells,
 {
     const struct fdt_property *prop, *prop_id, *prop_role;
     const __be32 *cell;
-    paddr_t paddr, gaddr, size, end;
+    paddr_t paddr = INVALID_PADDR;
+    paddr_t gaddr, size, end;
     struct membanks *mem = bootinfo_get_shmem();
     struct shmem_membank_extra *shmem_extra = bootinfo_get_shmem_extra();
     unsigned int i;
@@ -432,24 +439,37 @@ int __init process_shm_node(const void *fdt, int node, uint32_t address_cells,
     if ( !prop )
         return -ENOENT;
 
+    cell = (const __be32 *)prop->data;
     if ( len != dt_cells_to_size(address_cells + size_cells + address_cells) )
     {
-        if ( len == dt_cells_to_size(size_cells + address_cells) )
-            printk("fdt: host physical address must be chosen by users at the moment.\n");
-
-        printk("fdt: invalid `xen,shared-mem` property.\n");
-        return -EINVAL;
+        if ( len == dt_cells_to_size(address_cells + size_cells) )
+            device_tree_get_reg(&cell, address_cells, size_cells, &gaddr,
+                                &size);
+        else
+        {
+            printk("fdt: invalid `xen,shared-mem` property.\n");
+            return -EINVAL;
+        }
     }
+    else
+    {
+        device_tree_get_reg(&cell, address_cells, address_cells, &paddr,
+                            &gaddr);
+        size = dt_next_cell(size_cells, &cell);
 
-    cell = (const __be32 *)prop->data;
-    device_tree_get_reg(&cell, address_cells, address_cells, &paddr, &gaddr);
-    size = dt_next_cell(size_cells, &cell);
+        if ( !IS_ALIGNED(paddr, PAGE_SIZE) )
+        {
+            printk("fdt: physical address 0x%"PRIpaddr" is not suitably aligned.\n",
+                paddr);
+            return -EINVAL;
+        }
 
-    if ( !IS_ALIGNED(paddr, PAGE_SIZE) )
-    {
-        printk("fdt: physical address 0x%"PRIpaddr" is not suitably aligned.\n",
-               paddr);
-        return -EINVAL;
+        end = paddr + size;
+        if ( end <= paddr )
+        {
+            printk("fdt: static shared memory region %s overflow\n", shm_id);
+            return -EINVAL;
+        }
     }
 
     if ( !IS_ALIGNED(gaddr, PAGE_SIZE) )
@@ -471,39 +491,64 @@ int __init process_shm_node(const void *fdt, int node, uint32_t address_cells,
         return -EINVAL;
     }
 
-    end = paddr + size;
-    if ( end <= paddr )
-    {
-        printk("fdt: static shared memory region %s overflow\n", shm_id);
-        return -EINVAL;
-    }
-
     for ( i = 0; i < mem->nr_banks; i++ )
     {
         /*
          * Meet the following check:
-         * 1) The shm ID matches and the region exactly match
-         * 2) The shm ID doesn't match and the region doesn't overlap
-         * with an existing one
+         * - when host address is provided:
+         *   1) The shm ID matches and the region exactly match
+         *   2) The shm ID doesn't match and the region doesn't overlap
+         *      with an existing one
+         * - when host address is not provided:
+         *   1) The shm ID matches and the region size exactly match
          */
-        if ( paddr == mem->bank[i].start && size == mem->bank[i].size )
+        bool paddr_assigned = (INVALID_PADDR != paddr);
+
+        if ( strncmp(shm_id, shmem_extra[i].shm_id, MAX_SHM_ID_LENGTH) == 0 )
         {
-            if ( strncmp(shm_id, shmem_extra[i].shm_id,
-                         MAX_SHM_ID_LENGTH) == 0  )
+            /*
+             * Regions have same shm_id (cases):
+             * 1) physical host address is supplied:
+             *    - OK:   paddr is equal and size is equal (same region)
+             *    - Fail: paddr doesn't match or size doesn't match (there
+             *            cannot exists two shmem regions with same shm_id)
+             * 2) physical host address is NOT supplied:
+             *    - OK:   size is equal (same region)
+             *    - Fail: size is not equal (same shm_id must identify only one
+             *            region, there can't be two different regions with same
+             *            shm_id)
+             */
+            bool start_match = paddr_assigned ? (paddr == mem->bank[i].start) :
+                                                true;
+
+            if ( start_match && (size == mem->bank[i].size) )
                 break;
             else
             {
-                printk("fdt: xen,shm-id %s does not match for all the nodes using the same region.\n",
+                printk("fdt: different shared memory region could not share the same shm ID %s\n",
                        shm_id);
                 return -EINVAL;
             }
         }
-        else if ( strncmp(shm_id, shmem_extra[i].shm_id,
-                          MAX_SHM_ID_LENGTH) != 0 )
+
+        /*
+         * Regions have different shm_id (cases):
+         * 1) physical host address is supplied:
+         *    - OK:   paddr different, or size different (case where paddr
+         *            is equal but psize is different are wrong, but they
+         *            are handled later when checking for overlapping)
+         *    - Fail: paddr equal and size equal (the same region can't be
+         *            identified with different shm_id)
+         * 2) physical host address is NOT supplied:
+         *    - OK:   Both have different shm_id so even with same size they
+         *            can exists
+         */
+        if ( !paddr_assigned || (paddr != mem->bank[i].start) ||
+             (size != mem->bank[i].size) )
             continue;
         else
         {
-            printk("fdt: different shared memory region could not share the same shm ID %s\n",
+            printk("fdt: xen,shm-id %s does not match for all the nodes using the same region\n",
                    shm_id);
             return -EINVAL;
         }
@@ -513,7 +558,8 @@ int __init process_shm_node(const void *fdt, int node, uint32_t address_cells,
     {
         if (i < mem->max_banks)
         {
-            if ( check_reserved_regions_overlap(paddr, size) )
+            if ( (paddr != INVALID_PADDR) &&
+                 check_reserved_regions_overlap(paddr, size) )
                 return -EINVAL;
 
             /* Static shared memory shall be reserved from any other use. */
@@ -583,13 +629,13 @@ void __init early_print_info_shmem(void)
 {
     const struct membanks *shmem = bootinfo_get_shmem();
     unsigned int bank;
+    unsigned int printed = 0;
 
-    for ( bank = 0; bank < shmem->nr_banks; bank++ )
-    {
-        printk(" SHMEM[%u]: %"PRIpaddr" - %"PRIpaddr"\n", bank,
-               shmem->bank[bank].start,
-               shmem->bank[bank].start + shmem->bank[bank].size - 1);
-    }
+    for ( bank = 0; bank < shmem->nr_banks; bank++, printed++ )
+        if ( shmem->bank[bank].start != INVALID_PADDR )
+            printk(" SHMEM[%u]: %"PRIpaddr" - %"PRIpaddr"\n", printed,
+                shmem->bank[bank].start,
+                shmem->bank[bank].start + shmem->bank[bank].size - 1);
 }
 
 void __init init_sharedmem_pages(void)
@@ -598,7 +644,8 @@ void __init init_sharedmem_pages(void)
     unsigned int bank;
 
     for ( bank = 0 ; bank < shmem->nr_banks; bank++ )
-        init_staticmem_bank(&shmem->bank[bank]);
+        if ( shmem->bank[bank].start != INVALID_PADDR )
+            init_staticmem_bank(&shmem->bank[bank]);
 }
 
 int __init remove_shm_from_rangeset(const struct kernel_info *kinfo,
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: Rework heap page allocation outside allocate_bank_memory
Message-Id: <E1sI3eq-0001RI-H1@xenbits.xenproject.org>
Date: Fri, 14 Jun 2024 09:55:44 +0000

commit a21bfc912621d1afee1c693d8590164b01ff1998
Author:     Luca Fancellu <luca.fancellu@arm.com>
AuthorDate: Fri May 24 13:40:53 2024 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 14 10:46:01 2024 +0100

    xen/arm: Rework heap page allocation outside allocate_bank_memory
    
    The function allocate_bank_memory allocates pages from the heap and
    maps them to the guest using guest_physmap_add_page.
    
    As a preparation work to support static shared memory bank when the
    host physical address is not provided, Xen needs to allocate memory
    from the heap, so rework allocate_bank_memory moving out the page
    allocation in a new function called allocate_domheap_memory.
    
    The function allocate_domheap_memory takes a callback function and
    a pointer to some extra information passed to the callback and this
    function will be called for every region, until a defined size is
    reached.
    
    In order to keep allocate_bank_memory functionality, the callback
    passed to allocate_domheap_memory is a wrapper for
    guest_physmap_add_page.
    
    Let allocate_domheap_memory be externally visible, in order to use
    it in the future from the static shared memory module.
    
    Take the opportunity to change the signature of allocate_bank_memory
    and remove the 'struct domain' parameter, which can be retrieved from
    'struct kernel_info'.
    
    No functional changes is intended.
    
    Signed-off-by: Luca Fancellu <luca.fancellu@arm.com>
    Reviewed-by: Michal Orzel <michal.orzel@amd.com>
---
 xen/arch/arm/dom0less-build.c           |  4 +-
 xen/arch/arm/domain_build.c             | 79 ++++++++++++++++++++++-----------
 xen/arch/arm/include/asm/domain_build.h |  9 ++--
 3 files changed, 62 insertions(+), 30 deletions(-)

diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
index 5830a7051d..f919d3acf9 100644
--- a/xen/arch/arm/dom0less-build.c
+++ b/xen/arch/arm/dom0less-build.c
@@ -60,12 +60,12 @@ static void __init allocate_memory(struct domain *d, struct kernel_info *kinfo)
 
     mem->nr_banks = 0;
     bank_size = MIN(GUEST_RAM0_SIZE, kinfo->unassigned_mem);
-    if ( !allocate_bank_memory(d, kinfo, gaddr_to_gfn(GUEST_RAM0_BASE),
+    if ( !allocate_bank_memory(kinfo, gaddr_to_gfn(GUEST_RAM0_BASE),
                                bank_size) )
         goto fail;
 
     bank_size = MIN(GUEST_RAM1_SIZE, kinfo->unassigned_mem);
-    if ( !allocate_bank_memory(d, kinfo, gaddr_to_gfn(GUEST_RAM1_BASE),
+    if ( !allocate_bank_memory(kinfo, gaddr_to_gfn(GUEST_RAM1_BASE),
                                bank_size) )
         goto fail;
 
diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index 02e7416851..669970c86f 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
@@ -417,30 +417,15 @@ static void __init allocate_memory_11(struct domain *d,
 }
 
 #ifdef CONFIG_DOM0LESS_BOOT
-bool __init allocate_bank_memory(struct domain *d, struct kernel_info *kinfo,
-                                 gfn_t sgfn, paddr_t tot_size)
+bool __init allocate_domheap_memory(struct domain *d, paddr_t tot_size,
+                                    alloc_domheap_mem_cb cb, void *extra)
 {
-    struct membanks *mem = kernel_info_get_mem(kinfo);
-    int res;
-    struct page_info *pg;
-    struct membank *bank;
-    unsigned int max_order = ~0;
-
-    /*
-     * allocate_bank_memory can be called with a tot_size of zero for
-     * the second memory bank. It is not an error and we can safely
-     * avoid creating a zero-size memory bank.
-     */
-    if ( tot_size == 0 )
-        return true;
-
-    bank = &mem->bank[mem->nr_banks];
-    bank->start = gfn_to_gaddr(sgfn);
-    bank->size = tot_size;
+    unsigned int max_order = UINT_MAX;
 
     while ( tot_size > 0 )
     {
         unsigned int order = get_allocation_size(tot_size);
+        struct page_info *pg;
 
         order = min(max_order, order);
 
@@ -463,17 +448,61 @@ bool __init allocate_bank_memory(struct domain *d, struct kernel_info *kinfo,
             continue;
         }
 
-        res = guest_physmap_add_page(d, sgfn, page_to_mfn(pg), order);
-        if ( res )
-        {
-            dprintk(XENLOG_ERR, "Failed map pages to DOMU: %d", res);
+        if ( !cb(d, pg, order, extra) )
             return false;
-        }
 
-        sgfn = gfn_add(sgfn, 1UL << order);
         tot_size -= (1ULL << (PAGE_SHIFT + order));
     }
 
+    return true;
+}
+
+static bool __init guest_map_pages(struct domain *d, struct page_info *pg,
+                                   unsigned int order, void *extra)
+{
+    gfn_t *sgfn = (gfn_t *)extra;
+    int res;
+
+    BUG_ON(!sgfn);
+    res = guest_physmap_add_page(d, *sgfn, page_to_mfn(pg), order);
+    if ( res )
+    {
+        dprintk(XENLOG_ERR, "Failed map pages to DOMU: %d", res);
+        return false;
+    }
+
+    *sgfn = gfn_add(*sgfn, 1UL << order);
+
+    return true;
+}
+
+bool __init allocate_bank_memory(struct kernel_info *kinfo, gfn_t sgfn,
+                                 paddr_t tot_size)
+{
+    struct membanks *mem = kernel_info_get_mem(kinfo);
+    struct domain *d = kinfo->d;
+    struct membank *bank;
+
+    /*
+     * allocate_bank_memory can be called with a tot_size of zero for
+     * the second memory bank. It is not an error and we can safely
+     * avoid creating a zero-size memory bank.
+     */
+    if ( tot_size == 0 )
+        return true;
+
+    bank = &mem->bank[mem->nr_banks];
+    bank->start = gfn_to_gaddr(sgfn);
+    bank->size = tot_size;
+
+    /*
+     * Allocate pages from the heap until tot_size is zero and map them to the
+     * guest using guest_map_pages, passing the starting gfn as extra parameter
+     * for the map operation.
+     */
+    if ( !allocate_domheap_memory(d, tot_size, guest_map_pages, &sgfn) )
+        return false;
+
     mem->nr_banks++;
     kinfo->unassigned_mem -= bank->size;
 
diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/include/asm/domain_build.h
index 45936212ca..e712afbc7f 100644
--- a/xen/arch/arm/include/asm/domain_build.h
+++ b/xen/arch/arm/include/asm/domain_build.h
@@ -5,9 +5,12 @@
 #include <asm/kernel.h>
 
 typedef __be32 gic_interrupt_t[3];
-
-bool allocate_bank_memory(struct domain *d, struct kernel_info *kinfo,
-                          gfn_t sgfn, paddr_t tot_size);
+typedef bool (*alloc_domheap_mem_cb)(struct domain *d, struct page_info *pg,
+                                     unsigned int order, void *extra);
+bool allocate_domheap_memory(struct domain *d, paddr_t tot_size,
+                             alloc_domheap_mem_cb cb, void *extra);
+bool allocate_bank_memory(struct kernel_info *kinfo, gfn_t sgfn,
+                          paddr_t tot_size);
 int construct_domain(struct domain *d, struct kernel_info *kinfo);
 int domain_fdt_begin_node(void *fdt, const char *name, uint64_t unit);
 int make_chosen_node(const struct kernel_info *kinfo);
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: Implement the logic for static shared memory from Xen heap
Message-Id: <E1sI3f0-0001Rr-K6@xenbits.xenproject.org>
Date: Fri, 14 Jun 2024 09:55:54 +0000

commit 3deac416a3687d1ecc8d2e4dea2c135d1b28c05e
Author:     Luca Fancellu <luca.fancellu@arm.com>
AuthorDate: Fri May 24 13:40:54 2024 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 14 10:46:01 2024 +0100

    xen/arm: Implement the logic for static shared memory from Xen heap
    
    This commit implements the logic to have the static shared memory banks
    from the Xen heap instead of having the host physical address passed from
    the user.
    
    When the host physical address is not supplied, the physical memory is
    taken from the Xen heap using allocate_domheap_memory, the allocation
    needs to occur at the first handled DT node and the allocated banks
    need to be saved somewhere.
    
    Introduce the 'shm_heap_banks' for that reason, a struct that will hold
    the banks allocated from the heap, its field bank[].shmem_extra will be
    used to point to the bootinfo shared memory banks .shmem_extra space, so
    that there is not further allocation of memory and every bank in
    shm_heap_banks can be safely identified by the shm_id to reconstruct its
    traceability and if it was allocated or not.
    
    A search into 'shm_heap_banks' will reveal if the banks were allocated
    or not, in case the host address is not passed, and the callback given
    to allocate_domheap_memory will store the banks in the structure and
    map them to the current domain, to do that, some changes to
    acquire_shared_memory_bank are made to let it differentiate if the bank
    is from the heap and if it is, then assign_pages is called for every
    bank.
    
    When the bank is already allocated, for every bank allocated with the
    corresponding shm_id, handle_shared_mem_bank is called and the mapping
    are done.
    
    Signed-off-by: Luca Fancellu <luca.fancellu@arm.com>
    Reviewed-by: Michal Orzel <michal.orzel@amd.com>
---
 xen/arch/arm/static-shmem.c | 187 ++++++++++++++++++++++++++++++++++++--------
 1 file changed, 155 insertions(+), 32 deletions(-)

diff --git a/xen/arch/arm/static-shmem.c b/xen/arch/arm/static-shmem.c
index bc093b9da9..dbb017c7d7 100644
--- a/xen/arch/arm/static-shmem.c
+++ b/xen/arch/arm/static-shmem.c
@@ -9,6 +9,25 @@
 #include <asm/static-memory.h>
 #include <asm/static-shmem.h>
 
+typedef struct {
+    struct domain *d;
+    const char *role_str;
+    paddr_t gbase;
+    struct shmem_membank_extra *bank_extra_info;
+} alloc_heap_pages_cb_extra;
+
+static struct {
+    struct membanks_hdr common;
+    struct membank bank[NR_SHMEM_BANKS];
+} shm_heap_banks __initdata = {
+    .common.max_banks = NR_SHMEM_BANKS
+};
+
+static inline struct membanks *get_shmem_heap_banks(void)
+{
+    return container_of(&shm_heap_banks.common, struct membanks, common);
+}
+
 static void __init __maybe_unused build_assertions(void)
 {
     /*
@@ -63,7 +82,8 @@ static bool __init is_shm_allocated_to_domio(paddr_t pbase)
 }
 
 static mfn_t __init acquire_shared_memory_bank(struct domain *d,
-                                               paddr_t pbase, paddr_t psize)
+                                               paddr_t pbase, paddr_t psize,
+                                               bool bank_from_heap)
 {
     mfn_t smfn;
     unsigned long nr_pfns;
@@ -83,19 +103,31 @@ static mfn_t __init acquire_shared_memory_bank(struct domain *d,
     d->max_pages += nr_pfns;
 
     smfn = maddr_to_mfn(pbase);
-    res = acquire_domstatic_pages(d, smfn, nr_pfns, 0);
+    if ( bank_from_heap )
+        /*
+         * When host address is not provided, static shared memory is
+         * allocated from heap and shall be assigned to owner domain.
+         */
+        res = assign_pages(maddr_to_page(pbase), nr_pfns, d, 0);
+    else
+        res = acquire_domstatic_pages(d, smfn, nr_pfns, 0);
+
     if ( res )
     {
-        printk(XENLOG_ERR
-               "%pd: failed to acquire static memory: %d.\n", d, res);
-        d->max_pages -= nr_pfns;
-        return INVALID_MFN;
+        printk(XENLOG_ERR "%pd: failed to %s static memory: %d.\n", d,
+               bank_from_heap ? "assign" : "acquire", res);
+        goto fail;
     }
 
     return smfn;
+
+ fail:
+    d->max_pages -= nr_pfns;
+    return INVALID_MFN;
 }
 
 static int __init assign_shared_memory(struct domain *d, paddr_t gbase,
+                                       bool bank_from_heap,
                                        const struct membank *shm_bank)
 {
     mfn_t smfn;
@@ -108,10 +140,7 @@ static int __init assign_shared_memory(struct domain *d, paddr_t gbase,
     psize = shm_bank->size;
     nr_borrowers = shm_bank->shmem_extra->nr_shm_borrowers;
 
-    printk("%pd: allocate static shared memory BANK %#"PRIpaddr"-%#"PRIpaddr".\n",
-           d, pbase, pbase + psize);
-
-    smfn = acquire_shared_memory_bank(d, pbase, psize);
+    smfn = acquire_shared_memory_bank(d, pbase, psize, bank_from_heap);
     if ( mfn_eq(smfn, INVALID_MFN) )
         return -EINVAL;
 
@@ -182,6 +211,7 @@ append_shm_bank_to_domain(struct kernel_info *kinfo, paddr_t start,
 
 static int __init handle_shared_mem_bank(struct domain *d, paddr_t gbase,
                                          const char *role_str,
+                                         bool bank_from_heap,
                                          const struct membank *shm_bank)
 {
     bool owner_dom_io = true;
@@ -210,7 +240,8 @@ static int __init handle_shared_mem_bank(struct domain *d, paddr_t gbase,
          * We found the first borrower of the region, the owner was not
          * specified, so they should be assigned to dom_io.
          */
-        ret = assign_shared_memory(owner_dom_io ? dom_io : d, gbase, shm_bank);
+        ret = assign_shared_memory(owner_dom_io ? dom_io : d, gbase,
+                                   bank_from_heap, shm_bank);
         if ( ret )
             return ret;
     }
@@ -227,6 +258,39 @@ static int __init handle_shared_mem_bank(struct domain *d, paddr_t gbase,
     return 0;
 }
 
+static bool __init save_map_heap_pages(struct domain *d, struct page_info *pg,
+                                       unsigned int order, void *extra)
+{
+    alloc_heap_pages_cb_extra *b_extra = (alloc_heap_pages_cb_extra *)extra;
+    int idx = shm_heap_banks.common.nr_banks;
+    int ret = -ENOSPC;
+
+    BUG_ON(!b_extra);
+
+    if ( idx < shm_heap_banks.common.max_banks )
+    {
+        shm_heap_banks.bank[idx].start = page_to_maddr(pg);
+        shm_heap_banks.bank[idx].size = (1ULL << (PAGE_SHIFT + order));
+        shm_heap_banks.bank[idx].shmem_extra = b_extra->bank_extra_info;
+        shm_heap_banks.common.nr_banks++;
+
+        ret = handle_shared_mem_bank(b_extra->d, b_extra->gbase,
+                                     b_extra->role_str, true,
+                                     &shm_heap_banks.bank[idx]);
+        if ( !ret )
+        {
+            /* Increment guest physical address for next mapping */
+            b_extra->gbase += shm_heap_banks.bank[idx].size;
+            return true;
+        }
+    }
+
+    printk("Failed to allocate static shared memory from Xen heap: (%d)\n",
+           ret);
+
+    return false;
+}
+
 int __init process_shm(struct domain *d, struct kernel_info *kinfo,
                        const struct dt_device_node *node)
 {
@@ -264,38 +328,97 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo,
         pbase = boot_shm_bank->start;
         psize = boot_shm_bank->size;
 
-        if ( INVALID_PADDR == pbase )
-        {
-            printk("%pd: host physical address must be chosen by users at the moment", d);
-            return -EINVAL;
-        }
+        /* "role" property is optional */
+        if ( dt_property_read_string(shm_node, "role", &role_str) != 0 )
+            role_str = NULL;
 
         /*
-         * xen,shared-mem = <pbase, gbase, size>;
-         * TODO: pbase is optional.
+         * xen,shared-mem = <[pbase,] gbase, size>;
+         * pbase is optional.
          */
         addr_cells = dt_n_addr_cells(shm_node);
         size_cells = dt_n_size_cells(shm_node);
         prop = dt_find_property(shm_node, "xen,shared-mem", NULL);
         BUG_ON(!prop);
         cells = (const __be32 *)prop->value;
-        gbase = dt_read_paddr(cells + addr_cells, addr_cells);
 
-        for ( i = 0; i < PFN_DOWN(psize); i++ )
-            if ( !mfn_valid(mfn_add(maddr_to_mfn(pbase), i)) )
-            {
-                printk("%pd: invalid physical address 0x%"PRI_mfn"\n",
-                       d, mfn_x(mfn_add(maddr_to_mfn(pbase), i)));
-                return -EINVAL;
-            }
+        if ( pbase != INVALID_PADDR )
+        {
+            /* guest phys address is after host phys address */
+            gbase = dt_read_paddr(cells + addr_cells, addr_cells);
+
+            for ( i = 0; i < PFN_DOWN(psize); i++ )
+                if ( !mfn_valid(mfn_add(maddr_to_mfn(pbase), i)) )
+                {
+                    printk("%pd: invalid physical address 0x%"PRI_mfn"\n",
+                        d, mfn_x(mfn_add(maddr_to_mfn(pbase), i)));
+                    return -EINVAL;
+                }
+
+            /* The host physical address is supplied by the user */
+            ret = handle_shared_mem_bank(d, gbase, role_str, false,
+                                         boot_shm_bank);
+            if ( ret )
+                return ret;
+        }
+        else
+        {
+            /*
+             * The host physical address is not supplied by the user, so it
+             * means that the banks needs to be allocated from the Xen heap,
+             * look into the already allocated banks from the heap.
+             */
+            const struct membank *alloc_bank =
+                find_shm_bank_by_id(get_shmem_heap_banks(), shm_id);
 
-        /* "role" property is optional */
-        if ( dt_property_read_string(shm_node, "role", &role_str) != 0 )
-            role_str = NULL;
+            /* guest phys address is right at the beginning */
+            gbase = dt_read_paddr(cells, addr_cells);
 
-        ret = handle_shared_mem_bank(d, gbase, role_str, boot_shm_bank);
-        if ( ret )
-            return ret;
+            if ( !alloc_bank )
+            {
+                alloc_heap_pages_cb_extra cb_arg = { d, role_str, gbase,
+                    boot_shm_bank->shmem_extra };
+
+                /* shm_id identified bank is not yet allocated */
+                if ( !allocate_domheap_memory(NULL, psize, save_map_heap_pages,
+                                              &cb_arg) )
+                {
+                    printk(XENLOG_ERR
+                           "Failed to allocate (%"PRIpaddr"KB) pages as static shared memory from heap\n",
+                           psize >> 10);
+                    return -EINVAL;
+                }
+            }
+            else
+            {
+                /* shm_id identified bank is already allocated */
+                const struct membank *end_bank =
+                        &shm_heap_banks.bank[shm_heap_banks.common.nr_banks];
+                paddr_t gbase_bank = gbase;
+
+                /*
+                 * Static shared memory banks that are taken from the Xen heap
+                 * are allocated sequentially in shm_heap_banks, so starting
+                 * from the first bank found identified by shm_id, the code can
+                 * just advance by one bank at the time until it reaches the end
+                 * of the array or it finds another bank NOT identified by
+                 * shm_id
+                 */
+                for ( ; alloc_bank < end_bank; alloc_bank++ )
+                {
+                    if ( strcmp(shm_id, alloc_bank->shmem_extra->shm_id) != 0 )
+                        break;
+
+                    ret = handle_shared_mem_bank(d, gbase_bank, role_str, true,
+                                                 alloc_bank);
+                    if ( ret )
+                        return ret;
+
+                    /* Increment guest physical address for next mapping */
+                    gbase_bank += alloc_bank->size;
+                }
+            }
+        }
 
         /*
          * Record static shared memory region info for later setting
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/docs: Describe static shared memory when host address is not provided
Message-Id: <E1sI3fA-0001TF-N4@xenbits.xenproject.org>
Date: Fri, 14 Jun 2024 09:56:04 +0000

commit 8b4243a9b560c89bb259db5a27832c253d4bebc7
Author:     Penny Zheng <Penny.Zheng@arm.com>
AuthorDate: Fri May 24 13:40:55 2024 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 14 10:46:01 2024 +0100

    xen/docs: Describe static shared memory when host address is not provided
    
    This commit describe the new scenario where host address is not provided
    in "xen,shared-mem" property and a new example is added to the page to
    explain in details.
    
    Take the occasion to fix some typos in the page.
    
    Signed-off-by: Penny Zheng <penny.zheng@arm.com>
    Signed-off-by: Luca Fancellu <luca.fancellu@arm.com>
    Reviewed-by: Michal Orzel <michal.orzel@amd.com>
---
 docs/misc/arm/device-tree/booting.txt | 52 ++++++++++++++++++++++++++---------
 1 file changed, 39 insertions(+), 13 deletions(-)

diff --git a/docs/misc/arm/device-tree/booting.txt b/docs/misc/arm/device-tree/booting.txt
index f1fd069c87..aa0e614864 100644
--- a/docs/misc/arm/device-tree/booting.txt
+++ b/docs/misc/arm/device-tree/booting.txt
@@ -606,7 +606,7 @@ communication.
     An array takes a physical address, which is the base address of the
     shared memory region in host physical address space, a size, and a guest
     physical address, as the target address of the mapping.
-    e.g. xen,shared-mem = < [host physical address] [guest address] [size] >
+    e.g. xen,shared-mem = < [host physical address] [guest address] [size] >;
 
     It shall also meet the following criteria:
     1) If the SHM ID matches with an existing region, the address range of the
@@ -617,8 +617,8 @@ communication.
     The number of cells for the host address (and size) is the same as the
     guest pseudo-physical address and they are inherited from the parent node.
 
-    Host physical address is optional, when missing Xen decides the location
-    (currently unimplemented).
+    Host physical address is optional, when missing Xen decides the location.
+    e.g. xen,shared-mem = < [guest address] [size] >;
 
 - role (Optional)
 
@@ -645,7 +645,7 @@ chosen {
         role = "owner";
         xen,shm-id = "my-shared-mem-0";
         xen,shared-mem = <0x10000000 0x10000000 0x10000000>;
-    }
+    };
 
     domU1 {
         compatible = "xen,domain";
@@ -656,25 +656,36 @@ chosen {
         vpl011;
 
         /*
-         * shared memory region identified as 0x0(xen,shm-id = <0x0>)
-         * is shared between Dom0 and DomU1.
+         * shared memory region "my-shared-mem-0" is shared
+         * between Dom0 and DomU1.
          */
         domU1-shared-mem@10000000 {
             compatible = "xen,domain-shared-memory-v1";
             role = "borrower";
             xen,shm-id = "my-shared-mem-0";
             xen,shared-mem = <0x10000000 0x50000000 0x10000000>;
-        }
+        };
 
         /*
-         * shared memory region identified as 0x1(xen,shm-id = <0x1>)
-         * is shared between DomU1 and DomU2.
+         * shared memory region "my-shared-mem-1" is shared between
+         * DomU1 and DomU2.
          */
         domU1-shared-mem@50000000 {
             compatible = "xen,domain-shared-memory-v1";
             xen,shm-id = "my-shared-mem-1";
             xen,shared-mem = <0x50000000 0x60000000 0x20000000>;
-        }
+        };
+
+        /*
+         * shared memory region "my-shared-mem-2" is shared between
+         * DomU1 and DomU2.
+         */
+        domU1-shared-mem-2 {
+            compatible = "xen,domain-shared-memory-v1";
+            xen,shm-id = "my-shared-mem-2";
+            role = "owner";
+            xen,shared-mem = <0x80000000 0x20000000>;
+        };
 
         ......
 
@@ -688,14 +699,21 @@ chosen {
         cpus = <1>;
 
         /*
-         * shared memory region identified as 0x1(xen,shm-id = <0x1>)
-         * is shared between domU1 and domU2.
+         * shared memory region "my-shared-mem-1" is shared between
+         * domU1 and domU2.
          */
         domU2-shared-mem@50000000 {
             compatible = "xen,domain-shared-memory-v1";
             xen,shm-id = "my-shared-mem-1";
             xen,shared-mem = <0x50000000 0x70000000 0x20000000>;
-        }
+        };
+
+        domU2-shared-mem-2 {
+            compatible = "xen,domain-shared-memory-v1";
+            xen,shm-id = "my-shared-mem-2";
+            role = "borrower";
+            xen,shared-mem = <0x90000000 0x20000000>;
+        };
 
         ......
     };
@@ -715,3 +733,11 @@ shared between DomU1 and DomU2. It will get mapped at 0x60000000 in DomU1 guest
 physical address space, and at 0x70000000 in DomU2 guest physical address space.
 DomU1 and DomU2 are both the borrower domain, the owner domain is the default
 owner domain DOMID_IO.
+
+For the static shared memory region "my-shared-mem-2", since host physical
+address is not provided by user, Xen will automatically allocate 512MB
+from heap as static shared memory to be shared between DomU1 and DomU2.
+The automatically allocated static shared memory will get mapped at
+0x80000000 in DomU1 guest physical address space, and at 0x90000000 in DomU2
+guest physical address space. DomU1 is explicitly defined as the owner domain,
+and DomU2 is the borrower domain.
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: Lookup bootinfo shm bank during the mapping
Message-Id: <E1sIH0Y-0005xX-9S@xenbits.xenproject.org>
Date: Sat, 15 Jun 2024 00:11:02 +0000

commit e90f8d562dd1aba59fa1e6835ed944b15b6d1931
Author:     Luca Fancellu <luca.fancellu@arm.com>
AuthorDate: Fri May 24 13:40:49 2024 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 14 10:44:57 2024 +0100

    xen/arm: Lookup bootinfo shm bank during the mapping
    
    The current static shared memory code is using bootinfo banks when it
    needs to find the number of borrowers, so every time assign_shared_memory
    is called, the bank is searched in the bootinfo.shmem structure.
    
    There is nothing wrong with it, however the bank can be used also to
    retrieve the start address and size and also to pass less argument to
    assign_shared_memory. When retrieving the information from the bootinfo
    bank, it's also possible to move the checks on alignment to
    process_shm_node in the early stages.
    
    So create a new function find_shm_bank_by_id() which takes a
    'struct shared_meminfo' structure and the shared memory ID, to look for a
    bank with a matching ID, take the physical host address and size from the
    bank, pass the bank to assign_shared_memory() removing the now unnecessary
    arguments and finally remove the acquire_nr_borrower_domain() function
    since now the information can be extracted from the passed bank.
    Move the "xen,shm-id" parsing early in process_shm to bail out quickly in
    case of errors (unlikely), as said above, move the checks on alignment
    to process_shm_node.
    
    Drawback of this change is that now the bootinfo are used also when the
    bank doesn't need to be allocated, however it will be convenient later
    to use it as an argument for assign_shared_memory when dealing with
    the use case where the Host physical address is not supplied by the user.
    
    Signed-off-by: Luca Fancellu <luca.fancellu@arm.com>
    Reviewed-by: Michal Orzel <michal.orzel@amd.com>
---
 xen/arch/arm/static-shmem.c | 100 +++++++++++++++++++++++---------------------
 1 file changed, 53 insertions(+), 47 deletions(-)

diff --git a/xen/arch/arm/static-shmem.c b/xen/arch/arm/static-shmem.c
index 78881dd1d3..0a1c327e90 100644
--- a/xen/arch/arm/static-shmem.c
+++ b/xen/arch/arm/static-shmem.c
@@ -19,29 +19,21 @@ static void __init __maybe_unused build_assertions(void)
                  offsetof(struct shared_meminfo, bank)));
 }
 
-static int __init acquire_nr_borrower_domain(struct domain *d,
-                                             paddr_t pbase, paddr_t psize,
-                                             unsigned long *nr_borrowers)
+static const struct membank __init *
+find_shm_bank_by_id(const struct membanks *shmem, const char *shm_id)
 {
-    const struct membanks *shmem = bootinfo_get_shmem();
     unsigned int bank;
 
-    /* Iterate reserved memory to find requested shm bank. */
     for ( bank = 0 ; bank < shmem->nr_banks; bank++ )
     {
-        paddr_t bank_start = shmem->bank[bank].start;
-        paddr_t bank_size = shmem->bank[bank].size;
-
-        if ( (pbase == bank_start) && (psize == bank_size) )
+        if ( strcmp(shm_id, shmem->bank[bank].shmem_extra->shm_id) == 0 )
             break;
     }
 
     if ( bank == shmem->nr_banks )
-        return -ENOENT;
+        return NULL;
 
-    *nr_borrowers = shmem->bank[bank].shmem_extra->nr_shm_borrowers;
-
-    return 0;
+    return &shmem->bank[bank];
 }
 
 /*
@@ -103,14 +95,18 @@ static mfn_t __init acquire_shared_memory_bank(struct domain *d,
     return smfn;
 }
 
-static int __init assign_shared_memory(struct domain *d,
-                                       paddr_t pbase, paddr_t psize,
-                                       paddr_t gbase)
+static int __init assign_shared_memory(struct domain *d, paddr_t gbase,
+                                       const struct membank *shm_bank)
 {
     mfn_t smfn;
     int ret = 0;
     unsigned long nr_pages, nr_borrowers, i;
     struct page_info *page;
+    paddr_t pbase, psize;
+
+    pbase = shm_bank->start;
+    psize = shm_bank->size;
+    nr_borrowers = shm_bank->shmem_extra->nr_shm_borrowers;
 
     printk("%pd: allocate static shared memory BANK %#"PRIpaddr"-%#"PRIpaddr".\n",
            d, pbase, pbase + psize);
@@ -135,14 +131,6 @@ static int __init assign_shared_memory(struct domain *d,
         }
     }
 
-    /*
-     * Get the right amount of references per page, which is the number of
-     * borrower domains.
-     */
-    ret = acquire_nr_borrower_domain(d, pbase, psize, &nr_borrowers);
-    if ( ret )
-        return ret;
-
     /*
      * Instead of letting borrower domain get a page ref, we add as many
      * additional reference as the number of borrowers when the owner
@@ -199,6 +187,7 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo,
 
     dt_for_each_child_node(node, shm_node)
     {
+        const struct membank *boot_shm_bank;
         const struct dt_property *prop;
         const __be32 *cells;
         uint32_t addr_cells, size_cells;
@@ -212,6 +201,23 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo,
         if ( !dt_device_is_compatible(shm_node, "xen,domain-shared-memory-v1") )
             continue;
 
+        if ( dt_property_read_string(shm_node, "xen,shm-id", &shm_id) )
+        {
+            printk("%pd: invalid \"xen,shm-id\" property", d);
+            return -EINVAL;
+        }
+        BUG_ON((strlen(shm_id) <= 0) || (strlen(shm_id) >= MAX_SHM_ID_LENGTH));
+
+        boot_shm_bank = find_shm_bank_by_id(bootinfo_get_shmem(), shm_id);
+        if ( !boot_shm_bank )
+        {
+            printk("%pd: static shared memory bank not found: '%s'", d, shm_id);
+            return -ENOENT;
+        }
+
+        pbase = boot_shm_bank->start;
+        psize = boot_shm_bank->size;
+
         /*
          * xen,shared-mem = <pbase, gbase, size>;
          * TODO: pbase is optional.
@@ -221,20 +227,7 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo,
         prop = dt_find_property(shm_node, "xen,shared-mem", NULL);
         BUG_ON(!prop);
         cells = (const __be32 *)prop->value;
-        device_tree_get_reg(&cells, addr_cells, addr_cells, &pbase, &gbase);
-        psize = dt_read_paddr(cells, size_cells);
-        if ( !IS_ALIGNED(pbase, PAGE_SIZE) || !IS_ALIGNED(gbase, PAGE_SIZE) )
-        {
-            printk("%pd: physical address 0x%"PRIpaddr", or guest address 0x%"PRIpaddr" is not suitably aligned.\n",
-                   d, pbase, gbase);
-            return -EINVAL;
-        }
-        if ( !IS_ALIGNED(psize, PAGE_SIZE) )
-        {
-            printk("%pd: size 0x%"PRIpaddr" is not suitably aligned\n",
-                   d, psize);
-            return -EINVAL;
-        }
+        gbase = dt_read_paddr(cells + addr_cells, addr_cells);
 
         for ( i = 0; i < PFN_DOWN(psize); i++ )
             if ( !mfn_valid(mfn_add(maddr_to_mfn(pbase), i)) )
@@ -251,13 +244,6 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo,
         if ( dt_property_read_string(shm_node, "role", &role_str) == 0 )
             owner_dom_io = false;
 
-        if ( dt_property_read_string(shm_node, "xen,shm-id", &shm_id) )
-        {
-            printk("%pd: invalid \"xen,shm-id\" property", d);
-            return -EINVAL;
-        }
-        BUG_ON((strlen(shm_id) <= 0) || (strlen(shm_id) >= MAX_SHM_ID_LENGTH));
-
         /*
          * DOMID_IO is a fake domain and is not described in the Device-Tree.
          * Therefore when the owner of the shared region is DOMID_IO, we will
@@ -270,8 +256,8 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo,
              * We found the first borrower of the region, the owner was not
              * specified, so they should be assigned to dom_io.
              */
-            ret = assign_shared_memory(owner_dom_io ? dom_io : d,
-                                       pbase, psize, gbase);
+            ret = assign_shared_memory(owner_dom_io ? dom_io : d, gbase,
+                                       boot_shm_bank);
             if ( ret )
                 return ret;
         }
@@ -439,12 +425,32 @@ int __init process_shm_node(const void *fdt, int node, uint32_t address_cells,
     device_tree_get_reg(&cell, address_cells, address_cells, &paddr, &gaddr);
     size = dt_next_cell(size_cells, &cell);
 
+    if ( !IS_ALIGNED(paddr, PAGE_SIZE) )
+    {
+        printk("fdt: physical address 0x%"PRIpaddr" is not suitably aligned.\n",
+               paddr);
+        return -EINVAL;
+    }
+
+    if ( !IS_ALIGNED(gaddr, PAGE_SIZE) )
+    {
+        printk("fdt: guest address 0x%"PRIpaddr" is not suitably aligned.\n",
+               gaddr);
+        return -EINVAL;
+    }
+
     if ( !size )
     {
         printk("fdt: the size for static shared memory region can not be zero\n");
         return -EINVAL;
     }
 
+    if ( !IS_ALIGNED(size, PAGE_SIZE) )
+    {
+        printk("fdt: size 0x%"PRIpaddr" is not suitably aligned\n", size);
+        return -EINVAL;
+    }
+
     end = paddr + size;
     if ( end <= paddr )
     {
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: Wrap shared memory mapping code in one function
Message-Id: <E1sIH0i-0005yF-CZ@xenbits.xenproject.org>
Date: Sat, 15 Jun 2024 00:11:12 +0000

commit 79a43c8838039c31ff6f06de827b71909eca76b8
Author:     Luca Fancellu <luca.fancellu@arm.com>
AuthorDate: Fri May 24 13:40:50 2024 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 14 10:44:57 2024 +0100

    xen/arm: Wrap shared memory mapping code in one function
    
    Wrap the code and logic that is calling assign_shared_memory
    and map_regions_p2mt into a new function 'handle_shared_mem_bank',
    it will become useful later when the code will allow the user to
    don't pass the host physical address.
    
    Signed-off-by: Luca Fancellu <luca.fancellu@arm.com>
    Reviewed-by: Michal Orzel <michal.orzel@amd.com>
---
 xen/arch/arm/static-shmem.c | 86 ++++++++++++++++++++++++++++-----------------
 1 file changed, 53 insertions(+), 33 deletions(-)

diff --git a/xen/arch/arm/static-shmem.c b/xen/arch/arm/static-shmem.c
index 0a1c327e90..c15a651306 100644
--- a/xen/arch/arm/static-shmem.c
+++ b/xen/arch/arm/static-shmem.c
@@ -180,6 +180,53 @@ append_shm_bank_to_domain(struct kernel_info *kinfo, paddr_t start,
     return 0;
 }
 
+static int __init handle_shared_mem_bank(struct domain *d, paddr_t gbase,
+                                         const char *role_str,
+                                         const struct membank *shm_bank)
+{
+    bool owner_dom_io = true;
+    paddr_t pbase, psize;
+    int ret;
+
+    pbase = shm_bank->start;
+    psize = shm_bank->size;
+
+    /*
+     * "role" property is optional and if it is defined explicitly,
+     * then the owner domain is not the default "dom_io" domain.
+     */
+    if ( role_str != NULL )
+        owner_dom_io = false;
+
+    /*
+     * DOMID_IO is a fake domain and is not described in the Device-Tree.
+     * Therefore when the owner of the shared region is DOMID_IO, we will
+     * only find the borrowers.
+     */
+    if ( (owner_dom_io && !is_shm_allocated_to_domio(pbase)) ||
+         (!owner_dom_io && strcmp(role_str, "owner") == 0) )
+    {
+        /*
+         * We found the first borrower of the region, the owner was not
+         * specified, so they should be assigned to dom_io.
+         */
+        ret = assign_shared_memory(owner_dom_io ? dom_io : d, gbase, shm_bank);
+        if ( ret )
+            return ret;
+    }
+
+    if ( owner_dom_io || (strcmp(role_str, "borrower") == 0) )
+    {
+        /* Set up P2M foreign mapping for borrower domain. */
+        ret = map_regions_p2mt(d, _gfn(PFN_UP(gbase)), PFN_DOWN(psize),
+                               _mfn(PFN_UP(pbase)), p2m_map_foreign_rw);
+        if ( ret )
+            return ret;
+    }
+
+    return 0;
+}
+
 int __init process_shm(struct domain *d, struct kernel_info *kinfo,
                        const struct dt_device_node *node)
 {
@@ -196,7 +243,6 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo,
         unsigned int i;
         const char *role_str;
         const char *shm_id;
-        bool owner_dom_io = true;
 
         if ( !dt_device_is_compatible(shm_node, "xen,domain-shared-memory-v1") )
             continue;
@@ -237,39 +283,13 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo,
                 return -EINVAL;
             }
 
-        /*
-         * "role" property is optional and if it is defined explicitly,
-         * then the owner domain is not the default "dom_io" domain.
-         */
-        if ( dt_property_read_string(shm_node, "role", &role_str) == 0 )
-            owner_dom_io = false;
+        /* "role" property is optional */
+        if ( dt_property_read_string(shm_node, "role", &role_str) != 0 )
+            role_str = NULL;
 
-        /*
-         * DOMID_IO is a fake domain and is not described in the Device-Tree.
-         * Therefore when the owner of the shared region is DOMID_IO, we will
-         * only find the borrowers.
-         */
-        if ( (owner_dom_io && !is_shm_allocated_to_domio(pbase)) ||
-             (!owner_dom_io && strcmp(role_str, "owner") == 0) )
-        {
-            /*
-             * We found the first borrower of the region, the owner was not
-             * specified, so they should be assigned to dom_io.
-             */
-            ret = assign_shared_memory(owner_dom_io ? dom_io : d, gbase,
-                                       boot_shm_bank);
-            if ( ret )
-                return ret;
-        }
-
-        if ( owner_dom_io || (strcmp(role_str, "borrower") == 0) )
-        {
-            /* Set up P2M foreign mapping for borrower domain. */
-            ret = map_regions_p2mt(d, _gfn(PFN_UP(gbase)), PFN_DOWN(psize),
-                                   _mfn(PFN_UP(pbase)), p2m_map_foreign_rw);
-            if ( ret )
-                return ret;
-        }
+        ret = handle_shared_mem_bank(d, gbase, role_str, boot_shm_bank);
+        if ( ret )
+            return ret;
 
         /*
          * Record static shared memory region info for later setting
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/p2m: put reference for level 2 superpage
Message-Id: <E1sIH0s-00060N-Gx@xenbits.xenproject.org>
Date: Sat, 15 Jun 2024 00:11:22 +0000

commit 3e2121ce479bfcf9ad887ac77f2aa648f027ee5e
Author:     Penny Zheng <Penny.Zheng@arm.com>
AuthorDate: Tue May 28 13:56:03 2024 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 14 10:45:55 2024 +0100

    xen/p2m: put reference for level 2 superpage
    
    We are doing foreign memory mapping for static shared memory, and
    there is a great possibility that it could be super mapped.
    But today, p2m_put_l3_page could not handle superpages.
    
    This commits implements a new function p2m_put_l2_superpage to handle
    level 2 superpages, specifically for helping put extra references for
    foreign superpages.
    
    Modify relinquish_p2m_mapping as well to take into account preemption
    when we have a level-2 foreign mapping.
    
    Currently level 1 superpages are not handled because Xen is not
    preemptible and therefore some work is needed to handle such superpages,
    for which at some point Xen might end up freeing memory and therefore
    for such a big mapping it could end up in a very long operation.
    
    Signed-off-by: Penny Zheng <penny.zheng@arm.com>
    Signed-off-by: Luca Fancellu <luca.fancellu@arm.com>
    Reviewed-by: Julien Grall <jgrall@amazon.com>
---
 xen/arch/arm/mmu/p2m.c | 81 +++++++++++++++++++++++++++++++++++++-------------
 1 file changed, 61 insertions(+), 20 deletions(-)

diff --git a/xen/arch/arm/mmu/p2m.c b/xen/arch/arm/mmu/p2m.c
index 41fcca011c..1725cca649 100644
--- a/xen/arch/arm/mmu/p2m.c
+++ b/xen/arch/arm/mmu/p2m.c
@@ -753,34 +753,72 @@ static int p2m_mem_access_radix_set(struct p2m_domain *p2m, gfn_t gfn,
     return rc;
 }
 
-/*
- * Put any references on the single 4K page referenced by pte.
- * TODO: Handle superpages, for now we only take special references for leaf
- * pages (specifically foreign ones, which can't be super mapped today).
- */
-static void p2m_put_l3_page(const lpae_t pte)
+static void p2m_put_foreign_page(struct page_info *pg)
 {
-    mfn_t mfn = lpae_get_mfn(pte);
-
-    ASSERT(p2m_is_valid(pte));
-
     /*
-     * TODO: Handle other p2m types
-     *
      * It's safe to do the put_page here because page_alloc will
      * flush the TLBs if the page is reallocated before the end of
      * this loop.
      */
-    if ( p2m_is_foreign(pte.p2m.type) )
+    put_page(pg);
+}
+
+/* Put any references on the single 4K page referenced by mfn. */
+static void p2m_put_l3_page(mfn_t mfn, p2m_type_t type)
+{
+    /* TODO: Handle other p2m types */
+    if ( p2m_is_foreign(type) )
     {
         ASSERT(mfn_valid(mfn));
-        put_page(mfn_to_page(mfn));
+        p2m_put_foreign_page(mfn_to_page(mfn));
     }
     /* Detect the xenheap page and mark the stored GFN as invalid. */
-    else if ( p2m_is_ram(pte.p2m.type) && is_xen_heap_mfn(mfn) )
+    else if ( p2m_is_ram(type) && is_xen_heap_mfn(mfn) )
         page_set_xenheap_gfn(mfn_to_page(mfn), INVALID_GFN);
 }
 
+/* Put any references on the superpage referenced by mfn. */
+static void p2m_put_l2_superpage(mfn_t mfn, p2m_type_t type)
+{
+    struct page_info *pg;
+    unsigned int i;
+
+    /*
+     * TODO: Handle other p2m types, but be aware that any changes to handle
+     * different types should require an update on the relinquish code to handle
+     * preemption.
+     */
+    if ( !p2m_is_foreign(type) )
+        return;
+
+    ASSERT(mfn_valid(mfn));
+
+    pg = mfn_to_page(mfn);
+
+    for ( i = 0; i < XEN_PT_LPAE_ENTRIES; i++, pg++ )
+        p2m_put_foreign_page(pg);
+}
+
+/* Put any references on the page referenced by pte. */
+static void p2m_put_page(const lpae_t pte, unsigned int level)
+{
+    mfn_t mfn = lpae_get_mfn(pte);
+
+    ASSERT(p2m_is_valid(pte));
+
+    /*
+     * TODO: Currently we don't handle level 1 super-page, Xen is not
+     * preemptible and therefore some work is needed to handle such
+     * superpages, for which at some point Xen might end up freeing memory
+     * and therefore for such a big mapping it could end up in a very long
+     * operation.
+     */
+    if ( level == 2 )
+        return p2m_put_l2_superpage(mfn, pte.p2m.type);
+    else if ( level == 3 )
+        return p2m_put_l3_page(mfn, pte.p2m.type);
+}
+
 /* Free lpae sub-tree behind an entry */
 static void p2m_free_entry(struct p2m_domain *p2m,
                            lpae_t entry, unsigned int level)
@@ -809,9 +847,9 @@ static void p2m_free_entry(struct p2m_domain *p2m,
 #endif
 
         p2m->stats.mappings[level]--;
-        /* Nothing to do if the entry is a super-page. */
-        if ( level == 3 )
-            p2m_put_l3_page(entry);
+
+        p2m_put_page(entry, level);
+
         return;
     }
 
@@ -1558,9 +1596,12 @@ int relinquish_p2m_mapping(struct domain *d)
 
         count++;
         /*
-         * Arbitrarily preempt every 512 iterations.
+         * Arbitrarily preempt every 512 iterations or when we have a level-2
+         * foreign mapping.
          */
-        if ( !(count % 512) && hypercall_preempt_check() )
+        if ( (!(count % 512) ||
+              (p2m_is_foreign(t) && (order > XEN_PT_LEVEL_ORDER(2)))) &&
+             hypercall_preempt_check() )
         {
             rc = -ERESTART;
             break;
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: Parse xen,shared-mem when host phys address is not provided
Message-Id: <E1sIH12-00060q-KH@xenbits.xenproject.org>
Date: Sat, 15 Jun 2024 00:11:32 +0000

commit 1544d355b54ff17ebddc9c79e531329510488307
Author:     Luca Fancellu <luca.fancellu@arm.com>
AuthorDate: Fri May 24 13:40:52 2024 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 14 10:46:01 2024 +0100

    xen/arm: Parse xen,shared-mem when host phys address is not provided
    
    Handle the parsing of the 'xen,shared-mem' property when the host physical
    address is not provided, this commit is introducing the logic to parse it,
    but the functionality is still not implemented and will be part of future
    commits.
    
    Rework the logic inside process_shm_node to check the shm_id before doing
    the other checks, because it ease the logic itself, add more comment on
    the logic.
    Now when the host physical address is not provided, the value
    INVALID_PADDR is chosen to signal this condition and it is stored as
    start of the bank, due to that change also early_print_info_shmem and
    init_sharedmem_pages are changed, to not handle banks with start equal
    to INVALID_PADDR.
    
    Another change is done inside meminfo_overlap_check, to skip banks that
    are starting with the start address INVALID_PADDR, that function is used
    to check banks from reserved memory, shared memory and ACPI and since
    the comment above the function states that wrapping around is not handled,
    it's unlikely for these bank to have the start address as INVALID_PADDR.
    Same change is done inside consider_modules, find_unallocated_memory and
    dt_unreserved_regions functions, in order to skip banks that starts with
    INVALID_PADDR from any computation.
    The changes above holds because of this consideration.
    
    Signed-off-by: Luca Fancellu <luca.fancellu@arm.com>
    Reviewed-by: Michal Orzel <michal.orzel@amd.com>
---
 xen/arch/arm/arm32/mmu/mm.c |  11 +++-
 xen/arch/arm/domain_build.c |   5 ++
 xen/arch/arm/setup.c        |  14 +++--
 xen/arch/arm/static-shmem.c | 125 ++++++++++++++++++++++++++++++--------------
 4 files changed, 111 insertions(+), 44 deletions(-)

diff --git a/xen/arch/arm/arm32/mmu/mm.c b/xen/arch/arm/arm32/mmu/mm.c
index be480c31ea..30a7aa1e8e 100644
--- a/xen/arch/arm/arm32/mmu/mm.c
+++ b/xen/arch/arm/arm32/mmu/mm.c
@@ -101,8 +101,15 @@ static paddr_t __init consider_modules(paddr_t s, paddr_t e,
     nr += reserved_mem->nr_banks;
     for ( ; i - nr < shmem->nr_banks; i++ )
     {
-        paddr_t r_s = shmem->bank[i - nr].start;
-        paddr_t r_e = r_s + shmem->bank[i - nr].size;
+        paddr_t r_s, r_e;
+
+        r_s = shmem->bank[i - nr].start;
+
+        /* Shared memory banks can contain INVALID_PADDR as start */
+        if ( INVALID_PADDR == r_s )
+            continue;
+
+        r_e = r_s + shmem->bank[i - nr].size;
 
         if ( s < r_e && r_s < e )
         {
diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index 968c497efc..02e7416851 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
@@ -927,6 +927,11 @@ static int __init find_unallocated_memory(const struct kernel_info *kinfo,
         for ( j = 0; j < mem_banks[i]->nr_banks; j++ )
         {
             start = mem_banks[i]->bank[j].start;
+
+            /* Shared memory banks can contain INVALID_PADDR as start */
+            if ( INVALID_PADDR == start )
+                continue;
+
             end = mem_banks[i]->bank[j].start + mem_banks[i]->bank[j].size;
             res = rangeset_remove_range(unalloc_mem, PFN_DOWN(start),
                                         PFN_DOWN(end - 1));
diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c
index c4e5c19b11..0c2fdaceaf 100644
--- a/xen/arch/arm/setup.c
+++ b/xen/arch/arm/setup.c
@@ -240,8 +240,15 @@ static void __init dt_unreserved_regions(paddr_t s, paddr_t e,
     offset = reserved_mem->nr_banks;
     for ( ; i - offset < shmem->nr_banks; i++ )
     {
-        paddr_t r_s = shmem->bank[i - offset].start;
-        paddr_t r_e = r_s + shmem->bank[i - offset].size;
+        paddr_t r_s, r_e;
+
+        r_s = shmem->bank[i - offset].start;
+
+        /* Shared memory banks can contain INVALID_PADDR as start */
+        if ( INVALID_PADDR == r_s )
+            continue;
+
+        r_e = r_s + shmem->bank[i - offset].size;
 
         if ( s < r_e && r_s < e )
         {
@@ -272,7 +279,8 @@ static bool __init meminfo_overlap_check(const struct membanks *mem,
         bank_start = mem->bank[i].start;
         bank_end = bank_start + mem->bank[i].size;
 
-        if ( region_end <= bank_start || region_start >= bank_end )
+        if ( INVALID_PADDR == bank_start || region_end <= bank_start ||
+             region_start >= bank_end )
             continue;
         else
         {
diff --git a/xen/arch/arm/static-shmem.c b/xen/arch/arm/static-shmem.c
index c15a651306..bc093b9da9 100644
--- a/xen/arch/arm/static-shmem.c
+++ b/xen/arch/arm/static-shmem.c
@@ -264,6 +264,12 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo,
         pbase = boot_shm_bank->start;
         psize = boot_shm_bank->size;
 
+        if ( INVALID_PADDR == pbase )
+        {
+            printk("%pd: host physical address must be chosen by users at the moment", d);
+            return -EINVAL;
+        }
+
         /*
          * xen,shared-mem = <pbase, gbase, size>;
          * TODO: pbase is optional.
@@ -377,7 +383,8 @@ int __init process_shm_node(const void *fdt, int node, uint32_t address_cells,
 {
     const struct fdt_property *prop, *prop_id, *prop_role;
     const __be32 *cell;
-    paddr_t paddr, gaddr, size, end;
+    paddr_t paddr = INVALID_PADDR;
+    paddr_t gaddr, size, end;
     struct membanks *mem = bootinfo_get_shmem();
     struct shmem_membank_extra *shmem_extra = bootinfo_get_shmem_extra();
     unsigned int i;
@@ -432,24 +439,37 @@ int __init process_shm_node(const void *fdt, int node, uint32_t address_cells,
     if ( !prop )
         return -ENOENT;
 
+    cell = (const __be32 *)prop->data;
     if ( len != dt_cells_to_size(address_cells + size_cells + address_cells) )
     {
-        if ( len == dt_cells_to_size(size_cells + address_cells) )
-            printk("fdt: host physical address must be chosen by users at the moment.\n");
-
-        printk("fdt: invalid `xen,shared-mem` property.\n");
-        return -EINVAL;
+        if ( len == dt_cells_to_size(address_cells + size_cells) )
+            device_tree_get_reg(&cell, address_cells, size_cells, &gaddr,
+                                &size);
+        else
+        {
+            printk("fdt: invalid `xen,shared-mem` property.\n");
+            return -EINVAL;
+        }
     }
+    else
+    {
+        device_tree_get_reg(&cell, address_cells, address_cells, &paddr,
+                            &gaddr);
+        size = dt_next_cell(size_cells, &cell);
 
-    cell = (const __be32 *)prop->data;
-    device_tree_get_reg(&cell, address_cells, address_cells, &paddr, &gaddr);
-    size = dt_next_cell(size_cells, &cell);
+        if ( !IS_ALIGNED(paddr, PAGE_SIZE) )
+        {
+            printk("fdt: physical address 0x%"PRIpaddr" is not suitably aligned.\n",
+                paddr);
+            return -EINVAL;
+        }
 
-    if ( !IS_ALIGNED(paddr, PAGE_SIZE) )
-    {
-        printk("fdt: physical address 0x%"PRIpaddr" is not suitably aligned.\n",
-               paddr);
-        return -EINVAL;
+        end = paddr + size;
+        if ( end <= paddr )
+        {
+            printk("fdt: static shared memory region %s overflow\n", shm_id);
+            return -EINVAL;
+        }
     }
 
     if ( !IS_ALIGNED(gaddr, PAGE_SIZE) )
@@ -471,39 +491,64 @@ int __init process_shm_node(const void *fdt, int node, uint32_t address_cells,
         return -EINVAL;
     }
 
-    end = paddr + size;
-    if ( end <= paddr )
-    {
-        printk("fdt: static shared memory region %s overflow\n", shm_id);
-        return -EINVAL;
-    }
-
     for ( i = 0; i < mem->nr_banks; i++ )
     {
         /*
          * Meet the following check:
-         * 1) The shm ID matches and the region exactly match
-         * 2) The shm ID doesn't match and the region doesn't overlap
-         * with an existing one
+         * - when host address is provided:
+         *   1) The shm ID matches and the region exactly match
+         *   2) The shm ID doesn't match and the region doesn't overlap
+         *      with an existing one
+         * - when host address is not provided:
+         *   1) The shm ID matches and the region size exactly match
          */
-        if ( paddr == mem->bank[i].start && size == mem->bank[i].size )
+        bool paddr_assigned = (INVALID_PADDR != paddr);
+
+        if ( strncmp(shm_id, shmem_extra[i].shm_id, MAX_SHM_ID_LENGTH) == 0 )
         {
-            if ( strncmp(shm_id, shmem_extra[i].shm_id,
-                         MAX_SHM_ID_LENGTH) == 0  )
+            /*
+             * Regions have same shm_id (cases):
+             * 1) physical host address is supplied:
+             *    - OK:   paddr is equal and size is equal (same region)
+             *    - Fail: paddr doesn't match or size doesn't match (there
+             *            cannot exists two shmem regions with same shm_id)
+             * 2) physical host address is NOT supplied:
+             *    - OK:   size is equal (same region)
+             *    - Fail: size is not equal (same shm_id must identify only one
+             *            region, there can't be two different regions with same
+             *            shm_id)
+             */
+            bool start_match = paddr_assigned ? (paddr == mem->bank[i].start) :
+                                                true;
+
+            if ( start_match && (size == mem->bank[i].size) )
                 break;
             else
             {
-                printk("fdt: xen,shm-id %s does not match for all the nodes using the same region.\n",
+                printk("fdt: different shared memory region could not share the same shm ID %s\n",
                        shm_id);
                 return -EINVAL;
             }
         }
-        else if ( strncmp(shm_id, shmem_extra[i].shm_id,
-                          MAX_SHM_ID_LENGTH) != 0 )
+
+        /*
+         * Regions have different shm_id (cases):
+         * 1) physical host address is supplied:
+         *    - OK:   paddr different, or size different (case where paddr
+         *            is equal but psize is different are wrong, but they
+         *            are handled later when checking for overlapping)
+         *    - Fail: paddr equal and size equal (the same region can't be
+         *            identified with different shm_id)
+         * 2) physical host address is NOT supplied:
+         *    - OK:   Both have different shm_id so even with same size they
+         *            can exists
+         */
+        if ( !paddr_assigned || (paddr != mem->bank[i].start) ||
+             (size != mem->bank[i].size) )
             continue;
         else
         {
-            printk("fdt: different shared memory region could not share the same shm ID %s\n",
+            printk("fdt: xen,shm-id %s does not match for all the nodes using the same region\n",
                    shm_id);
             return -EINVAL;
         }
@@ -513,7 +558,8 @@ int __init process_shm_node(const void *fdt, int node, uint32_t address_cells,
     {
         if (i < mem->max_banks)
         {
-            if ( check_reserved_regions_overlap(paddr, size) )
+            if ( (paddr != INVALID_PADDR) &&
+                 check_reserved_regions_overlap(paddr, size) )
                 return -EINVAL;
 
             /* Static shared memory shall be reserved from any other use. */
@@ -583,13 +629,13 @@ void __init early_print_info_shmem(void)
 {
     const struct membanks *shmem = bootinfo_get_shmem();
     unsigned int bank;
+    unsigned int printed = 0;
 
-    for ( bank = 0; bank < shmem->nr_banks; bank++ )
-    {
-        printk(" SHMEM[%u]: %"PRIpaddr" - %"PRIpaddr"\n", bank,
-               shmem->bank[bank].start,
-               shmem->bank[bank].start + shmem->bank[bank].size - 1);
-    }
+    for ( bank = 0; bank < shmem->nr_banks; bank++, printed++ )
+        if ( shmem->bank[bank].start != INVALID_PADDR )
+            printk(" SHMEM[%u]: %"PRIpaddr" - %"PRIpaddr"\n", printed,
+                shmem->bank[bank].start,
+                shmem->bank[bank].start + shmem->bank[bank].size - 1);
 }
 
 void __init init_sharedmem_pages(void)
@@ -598,7 +644,8 @@ void __init init_sharedmem_pages(void)
     unsigned int bank;
 
     for ( bank = 0 ; bank < shmem->nr_banks; bank++ )
-        init_staticmem_bank(&shmem->bank[bank]);
+        if ( shmem->bank[bank].start != INVALID_PADDR )
+            init_staticmem_bank(&shmem->bank[bank]);
 }
 
 int __init remove_shm_from_rangeset(const struct kernel_info *kinfo,
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: Rework heap page allocation outside allocate_bank_memory
Message-Id: <E1sIH1C-00061J-NN@xenbits.xenproject.org>
Date: Sat, 15 Jun 2024 00:11:42 +0000

commit a21bfc912621d1afee1c693d8590164b01ff1998
Author:     Luca Fancellu <luca.fancellu@arm.com>
AuthorDate: Fri May 24 13:40:53 2024 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 14 10:46:01 2024 +0100

    xen/arm: Rework heap page allocation outside allocate_bank_memory
    
    The function allocate_bank_memory allocates pages from the heap and
    maps them to the guest using guest_physmap_add_page.
    
    As a preparation work to support static shared memory bank when the
    host physical address is not provided, Xen needs to allocate memory
    from the heap, so rework allocate_bank_memory moving out the page
    allocation in a new function called allocate_domheap_memory.
    
    The function allocate_domheap_memory takes a callback function and
    a pointer to some extra information passed to the callback and this
    function will be called for every region, until a defined size is
    reached.
    
    In order to keep allocate_bank_memory functionality, the callback
    passed to allocate_domheap_memory is a wrapper for
    guest_physmap_add_page.
    
    Let allocate_domheap_memory be externally visible, in order to use
    it in the future from the static shared memory module.
    
    Take the opportunity to change the signature of allocate_bank_memory
    and remove the 'struct domain' parameter, which can be retrieved from
    'struct kernel_info'.
    
    No functional changes is intended.
    
    Signed-off-by: Luca Fancellu <luca.fancellu@arm.com>
    Reviewed-by: Michal Orzel <michal.orzel@amd.com>
---
 xen/arch/arm/dom0less-build.c           |  4 +-
 xen/arch/arm/domain_build.c             | 79 ++++++++++++++++++++++-----------
 xen/arch/arm/include/asm/domain_build.h |  9 ++--
 3 files changed, 62 insertions(+), 30 deletions(-)

diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
index 5830a7051d..f919d3acf9 100644
--- a/xen/arch/arm/dom0less-build.c
+++ b/xen/arch/arm/dom0less-build.c
@@ -60,12 +60,12 @@ static void __init allocate_memory(struct domain *d, struct kernel_info *kinfo)
 
     mem->nr_banks = 0;
     bank_size = MIN(GUEST_RAM0_SIZE, kinfo->unassigned_mem);
-    if ( !allocate_bank_memory(d, kinfo, gaddr_to_gfn(GUEST_RAM0_BASE),
+    if ( !allocate_bank_memory(kinfo, gaddr_to_gfn(GUEST_RAM0_BASE),
                                bank_size) )
         goto fail;
 
     bank_size = MIN(GUEST_RAM1_SIZE, kinfo->unassigned_mem);
-    if ( !allocate_bank_memory(d, kinfo, gaddr_to_gfn(GUEST_RAM1_BASE),
+    if ( !allocate_bank_memory(kinfo, gaddr_to_gfn(GUEST_RAM1_BASE),
                                bank_size) )
         goto fail;
 
diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index 02e7416851..669970c86f 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
@@ -417,30 +417,15 @@ static void __init allocate_memory_11(struct domain *d,
 }
 
 #ifdef CONFIG_DOM0LESS_BOOT
-bool __init allocate_bank_memory(struct domain *d, struct kernel_info *kinfo,
-                                 gfn_t sgfn, paddr_t tot_size)
+bool __init allocate_domheap_memory(struct domain *d, paddr_t tot_size,
+                                    alloc_domheap_mem_cb cb, void *extra)
 {
-    struct membanks *mem = kernel_info_get_mem(kinfo);
-    int res;
-    struct page_info *pg;
-    struct membank *bank;
-    unsigned int max_order = ~0;
-
-    /*
-     * allocate_bank_memory can be called with a tot_size of zero for
-     * the second memory bank. It is not an error and we can safely
-     * avoid creating a zero-size memory bank.
-     */
-    if ( tot_size == 0 )
-        return true;
-
-    bank = &mem->bank[mem->nr_banks];
-    bank->start = gfn_to_gaddr(sgfn);
-    bank->size = tot_size;
+    unsigned int max_order = UINT_MAX;
 
     while ( tot_size > 0 )
     {
         unsigned int order = get_allocation_size(tot_size);
+        struct page_info *pg;
 
         order = min(max_order, order);
 
@@ -463,17 +448,61 @@ bool __init allocate_bank_memory(struct domain *d, struct kernel_info *kinfo,
             continue;
         }
 
-        res = guest_physmap_add_page(d, sgfn, page_to_mfn(pg), order);
-        if ( res )
-        {
-            dprintk(XENLOG_ERR, "Failed map pages to DOMU: %d", res);
+        if ( !cb(d, pg, order, extra) )
             return false;
-        }
 
-        sgfn = gfn_add(sgfn, 1UL << order);
         tot_size -= (1ULL << (PAGE_SHIFT + order));
     }
 
+    return true;
+}
+
+static bool __init guest_map_pages(struct domain *d, struct page_info *pg,
+                                   unsigned int order, void *extra)
+{
+    gfn_t *sgfn = (gfn_t *)extra;
+    int res;
+
+    BUG_ON(!sgfn);
+    res = guest_physmap_add_page(d, *sgfn, page_to_mfn(pg), order);
+    if ( res )
+    {
+        dprintk(XENLOG_ERR, "Failed map pages to DOMU: %d", res);
+        return false;
+    }
+
+    *sgfn = gfn_add(*sgfn, 1UL << order);
+
+    return true;
+}
+
+bool __init allocate_bank_memory(struct kernel_info *kinfo, gfn_t sgfn,
+                                 paddr_t tot_size)
+{
+    struct membanks *mem = kernel_info_get_mem(kinfo);
+    struct domain *d = kinfo->d;
+    struct membank *bank;
+
+    /*
+     * allocate_bank_memory can be called with a tot_size of zero for
+     * the second memory bank. It is not an error and we can safely
+     * avoid creating a zero-size memory bank.
+     */
+    if ( tot_size == 0 )
+        return true;
+
+    bank = &mem->bank[mem->nr_banks];
+    bank->start = gfn_to_gaddr(sgfn);
+    bank->size = tot_size;
+
+    /*
+     * Allocate pages from the heap until tot_size is zero and map them to the
+     * guest using guest_map_pages, passing the starting gfn as extra parameter
+     * for the map operation.
+     */
+    if ( !allocate_domheap_memory(d, tot_size, guest_map_pages, &sgfn) )
+        return false;
+
     mem->nr_banks++;
     kinfo->unassigned_mem -= bank->size;
 
diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/include/asm/domain_build.h
index 45936212ca..e712afbc7f 100644
--- a/xen/arch/arm/include/asm/domain_build.h
+++ b/xen/arch/arm/include/asm/domain_build.h
@@ -5,9 +5,12 @@
 #include <asm/kernel.h>
 
 typedef __be32 gic_interrupt_t[3];
-
-bool allocate_bank_memory(struct domain *d, struct kernel_info *kinfo,
-                          gfn_t sgfn, paddr_t tot_size);
+typedef bool (*alloc_domheap_mem_cb)(struct domain *d, struct page_info *pg,
+                                     unsigned int order, void *extra);
+bool allocate_domheap_memory(struct domain *d, paddr_t tot_size,
+                             alloc_domheap_mem_cb cb, void *extra);
+bool allocate_bank_memory(struct kernel_info *kinfo, gfn_t sgfn,
+                          paddr_t tot_size);
 int construct_domain(struct domain *d, struct kernel_info *kinfo);
 int domain_fdt_begin_node(void *fdt, const char *name, uint64_t unit);
 int make_chosen_node(const struct kernel_info *kinfo);
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: Implement the logic for static shared memory from Xen heap
Message-Id: <E1sIH1M-00061m-QO@xenbits.xenproject.org>
Date: Sat, 15 Jun 2024 00:11:52 +0000

commit 3deac416a3687d1ecc8d2e4dea2c135d1b28c05e
Author:     Luca Fancellu <luca.fancellu@arm.com>
AuthorDate: Fri May 24 13:40:54 2024 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 14 10:46:01 2024 +0100

    xen/arm: Implement the logic for static shared memory from Xen heap
    
    This commit implements the logic to have the static shared memory banks
    from the Xen heap instead of having the host physical address passed from
    the user.
    
    When the host physical address is not supplied, the physical memory is
    taken from the Xen heap using allocate_domheap_memory, the allocation
    needs to occur at the first handled DT node and the allocated banks
    need to be saved somewhere.
    
    Introduce the 'shm_heap_banks' for that reason, a struct that will hold
    the banks allocated from the heap, its field bank[].shmem_extra will be
    used to point to the bootinfo shared memory banks .shmem_extra space, so
    that there is not further allocation of memory and every bank in
    shm_heap_banks can be safely identified by the shm_id to reconstruct its
    traceability and if it was allocated or not.
    
    A search into 'shm_heap_banks' will reveal if the banks were allocated
    or not, in case the host address is not passed, and the callback given
    to allocate_domheap_memory will store the banks in the structure and
    map them to the current domain, to do that, some changes to
    acquire_shared_memory_bank are made to let it differentiate if the bank
    is from the heap and if it is, then assign_pages is called for every
    bank.
    
    When the bank is already allocated, for every bank allocated with the
    corresponding shm_id, handle_shared_mem_bank is called and the mapping
    are done.
    
    Signed-off-by: Luca Fancellu <luca.fancellu@arm.com>
    Reviewed-by: Michal Orzel <michal.orzel@amd.com>
---
 xen/arch/arm/static-shmem.c | 187 ++++++++++++++++++++++++++++++++++++--------
 1 file changed, 155 insertions(+), 32 deletions(-)

diff --git a/xen/arch/arm/static-shmem.c b/xen/arch/arm/static-shmem.c
index bc093b9da9..dbb017c7d7 100644
--- a/xen/arch/arm/static-shmem.c
+++ b/xen/arch/arm/static-shmem.c
@@ -9,6 +9,25 @@
 #include <asm/static-memory.h>
 #include <asm/static-shmem.h>
 
+typedef struct {
+    struct domain *d;
+    const char *role_str;
+    paddr_t gbase;
+    struct shmem_membank_extra *bank_extra_info;
+} alloc_heap_pages_cb_extra;
+
+static struct {
+    struct membanks_hdr common;
+    struct membank bank[NR_SHMEM_BANKS];
+} shm_heap_banks __initdata = {
+    .common.max_banks = NR_SHMEM_BANKS
+};
+
+static inline struct membanks *get_shmem_heap_banks(void)
+{
+    return container_of(&shm_heap_banks.common, struct membanks, common);
+}
+
 static void __init __maybe_unused build_assertions(void)
 {
     /*
@@ -63,7 +82,8 @@ static bool __init is_shm_allocated_to_domio(paddr_t pbase)
 }
 
 static mfn_t __init acquire_shared_memory_bank(struct domain *d,
-                                               paddr_t pbase, paddr_t psize)
+                                               paddr_t pbase, paddr_t psize,
+                                               bool bank_from_heap)
 {
     mfn_t smfn;
     unsigned long nr_pfns;
@@ -83,19 +103,31 @@ static mfn_t __init acquire_shared_memory_bank(struct domain *d,
     d->max_pages += nr_pfns;
 
     smfn = maddr_to_mfn(pbase);
-    res = acquire_domstatic_pages(d, smfn, nr_pfns, 0);
+    if ( bank_from_heap )
+        /*
+         * When host address is not provided, static shared memory is
+         * allocated from heap and shall be assigned to owner domain.
+         */
+        res = assign_pages(maddr_to_page(pbase), nr_pfns, d, 0);
+    else
+        res = acquire_domstatic_pages(d, smfn, nr_pfns, 0);
+
     if ( res )
     {
-        printk(XENLOG_ERR
-               "%pd: failed to acquire static memory: %d.\n", d, res);
-        d->max_pages -= nr_pfns;
-        return INVALID_MFN;
+        printk(XENLOG_ERR "%pd: failed to %s static memory: %d.\n", d,
+               bank_from_heap ? "assign" : "acquire", res);
+        goto fail;
     }
 
     return smfn;
+
+ fail:
+    d->max_pages -= nr_pfns;
+    return INVALID_MFN;
 }
 
 static int __init assign_shared_memory(struct domain *d, paddr_t gbase,
+                                       bool bank_from_heap,
                                        const struct membank *shm_bank)
 {
     mfn_t smfn;
@@ -108,10 +140,7 @@ static int __init assign_shared_memory(struct domain *d, paddr_t gbase,
     psize = shm_bank->size;
     nr_borrowers = shm_bank->shmem_extra->nr_shm_borrowers;
 
-    printk("%pd: allocate static shared memory BANK %#"PRIpaddr"-%#"PRIpaddr".\n",
-           d, pbase, pbase + psize);
-
-    smfn = acquire_shared_memory_bank(d, pbase, psize);
+    smfn = acquire_shared_memory_bank(d, pbase, psize, bank_from_heap);
     if ( mfn_eq(smfn, INVALID_MFN) )
         return -EINVAL;
 
@@ -182,6 +211,7 @@ append_shm_bank_to_domain(struct kernel_info *kinfo, paddr_t start,
 
 static int __init handle_shared_mem_bank(struct domain *d, paddr_t gbase,
                                          const char *role_str,
+                                         bool bank_from_heap,
                                          const struct membank *shm_bank)
 {
     bool owner_dom_io = true;
@@ -210,7 +240,8 @@ static int __init handle_shared_mem_bank(struct domain *d, paddr_t gbase,
          * We found the first borrower of the region, the owner was not
          * specified, so they should be assigned to dom_io.
          */
-        ret = assign_shared_memory(owner_dom_io ? dom_io : d, gbase, shm_bank);
+        ret = assign_shared_memory(owner_dom_io ? dom_io : d, gbase,
+                                   bank_from_heap, shm_bank);
         if ( ret )
             return ret;
     }
@@ -227,6 +258,39 @@ static int __init handle_shared_mem_bank(struct domain *d, paddr_t gbase,
     return 0;
 }
 
+static bool __init save_map_heap_pages(struct domain *d, struct page_info *pg,
+                                       unsigned int order, void *extra)
+{
+    alloc_heap_pages_cb_extra *b_extra = (alloc_heap_pages_cb_extra *)extra;
+    int idx = shm_heap_banks.common.nr_banks;
+    int ret = -ENOSPC;
+
+    BUG_ON(!b_extra);
+
+    if ( idx < shm_heap_banks.common.max_banks )
+    {
+        shm_heap_banks.bank[idx].start = page_to_maddr(pg);
+        shm_heap_banks.bank[idx].size = (1ULL << (PAGE_SHIFT + order));
+        shm_heap_banks.bank[idx].shmem_extra = b_extra->bank_extra_info;
+        shm_heap_banks.common.nr_banks++;
+
+        ret = handle_shared_mem_bank(b_extra->d, b_extra->gbase,
+                                     b_extra->role_str, true,
+                                     &shm_heap_banks.bank[idx]);
+        if ( !ret )
+        {
+            /* Increment guest physical address for next mapping */
+            b_extra->gbase += shm_heap_banks.bank[idx].size;
+            return true;
+        }
+    }
+
+    printk("Failed to allocate static shared memory from Xen heap: (%d)\n",
+           ret);
+
+    return false;
+}
+
 int __init process_shm(struct domain *d, struct kernel_info *kinfo,
                        const struct dt_device_node *node)
 {
@@ -264,38 +328,97 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo,
         pbase = boot_shm_bank->start;
         psize = boot_shm_bank->size;
 
-        if ( INVALID_PADDR == pbase )
-        {
-            printk("%pd: host physical address must be chosen by users at the moment", d);
-            return -EINVAL;
-        }
+        /* "role" property is optional */
+        if ( dt_property_read_string(shm_node, "role", &role_str) != 0 )
+            role_str = NULL;
 
         /*
-         * xen,shared-mem = <pbase, gbase, size>;
-         * TODO: pbase is optional.
+         * xen,shared-mem = <[pbase,] gbase, size>;
+         * pbase is optional.
          */
         addr_cells = dt_n_addr_cells(shm_node);
         size_cells = dt_n_size_cells(shm_node);
         prop = dt_find_property(shm_node, "xen,shared-mem", NULL);
         BUG_ON(!prop);
         cells = (const __be32 *)prop->value;
-        gbase = dt_read_paddr(cells + addr_cells, addr_cells);
 
-        for ( i = 0; i < PFN_DOWN(psize); i++ )
-            if ( !mfn_valid(mfn_add(maddr_to_mfn(pbase), i)) )
-            {
-                printk("%pd: invalid physical address 0x%"PRI_mfn"\n",
-                       d, mfn_x(mfn_add(maddr_to_mfn(pbase), i)));
-                return -EINVAL;
-            }
+        if ( pbase != INVALID_PADDR )
+        {
+            /* guest phys address is after host phys address */
+            gbase = dt_read_paddr(cells + addr_cells, addr_cells);
+
+            for ( i = 0; i < PFN_DOWN(psize); i++ )
+                if ( !mfn_valid(mfn_add(maddr_to_mfn(pbase), i)) )
+                {
+                    printk("%pd: invalid physical address 0x%"PRI_mfn"\n",
+                        d, mfn_x(mfn_add(maddr_to_mfn(pbase), i)));
+                    return -EINVAL;
+                }
+
+            /* The host physical address is supplied by the user */
+            ret = handle_shared_mem_bank(d, gbase, role_str, false,
+                                         boot_shm_bank);
+            if ( ret )
+                return ret;
+        }
+        else
+        {
+            /*
+             * The host physical address is not supplied by the user, so it
+             * means that the banks needs to be allocated from the Xen heap,
+             * look into the already allocated banks from the heap.
+             */
+            const struct membank *alloc_bank =
+                find_shm_bank_by_id(get_shmem_heap_banks(), shm_id);
 
-        /* "role" property is optional */
-        if ( dt_property_read_string(shm_node, "role", &role_str) != 0 )
-            role_str = NULL;
+            /* guest phys address is right at the beginning */
+            gbase = dt_read_paddr(cells, addr_cells);
 
-        ret = handle_shared_mem_bank(d, gbase, role_str, boot_shm_bank);
-        if ( ret )
-            return ret;
+            if ( !alloc_bank )
+            {
+                alloc_heap_pages_cb_extra cb_arg = { d, role_str, gbase,
+                    boot_shm_bank->shmem_extra };
+
+                /* shm_id identified bank is not yet allocated */
+                if ( !allocate_domheap_memory(NULL, psize, save_map_heap_pages,
+                                              &cb_arg) )
+                {
+                    printk(XENLOG_ERR
+                           "Failed to allocate (%"PRIpaddr"KB) pages as static shared memory from heap\n",
+                           psize >> 10);
+                    return -EINVAL;
+                }
+            }
+            else
+            {
+                /* shm_id identified bank is already allocated */
+                const struct membank *end_bank =
+                        &shm_heap_banks.bank[shm_heap_banks.common.nr_banks];
+                paddr_t gbase_bank = gbase;
+
+                /*
+                 * Static shared memory banks that are taken from the Xen heap
+                 * are allocated sequentially in shm_heap_banks, so starting
+                 * from the first bank found identified by shm_id, the code can
+                 * just advance by one bank at the time until it reaches the end
+                 * of the array or it finds another bank NOT identified by
+                 * shm_id
+                 */
+                for ( ; alloc_bank < end_bank; alloc_bank++ )
+                {
+                    if ( strcmp(shm_id, alloc_bank->shmem_extra->shm_id) != 0 )
+                        break;
+
+                    ret = handle_shared_mem_bank(d, gbase_bank, role_str, true,
+                                                 alloc_bank);
+                    if ( ret )
+                        return ret;
+
+                    /* Increment guest physical address for next mapping */
+                    gbase_bank += alloc_bank->size;
+                }
+            }
+        }
 
         /*
          * Record static shared memory region info for later setting
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/docs: Describe static shared memory when host address is not provided
Message-Id: <E1sIH1W-00063N-Tz@xenbits.xenproject.org>
Date: Sat, 15 Jun 2024 00:12:02 +0000

commit 8b4243a9b560c89bb259db5a27832c253d4bebc7
Author:     Penny Zheng <Penny.Zheng@arm.com>
AuthorDate: Fri May 24 13:40:55 2024 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 14 10:46:01 2024 +0100

    xen/docs: Describe static shared memory when host address is not provided
    
    This commit describe the new scenario where host address is not provided
    in "xen,shared-mem" property and a new example is added to the page to
    explain in details.
    
    Take the occasion to fix some typos in the page.
    
    Signed-off-by: Penny Zheng <penny.zheng@arm.com>
    Signed-off-by: Luca Fancellu <luca.fancellu@arm.com>
    Reviewed-by: Michal Orzel <michal.orzel@amd.com>
---
 docs/misc/arm/device-tree/booting.txt | 52 ++++++++++++++++++++++++++---------
 1 file changed, 39 insertions(+), 13 deletions(-)

diff --git a/docs/misc/arm/device-tree/booting.txt b/docs/misc/arm/device-tree/booting.txt
index f1fd069c87..aa0e614864 100644
--- a/docs/misc/arm/device-tree/booting.txt
+++ b/docs/misc/arm/device-tree/booting.txt
@@ -606,7 +606,7 @@ communication.
     An array takes a physical address, which is the base address of the
     shared memory region in host physical address space, a size, and a guest
     physical address, as the target address of the mapping.
-    e.g. xen,shared-mem = < [host physical address] [guest address] [size] >
+    e.g. xen,shared-mem = < [host physical address] [guest address] [size] >;
 
     It shall also meet the following criteria:
     1) If the SHM ID matches with an existing region, the address range of the
@@ -617,8 +617,8 @@ communication.
     The number of cells for the host address (and size) is the same as the
     guest pseudo-physical address and they are inherited from the parent node.
 
-    Host physical address is optional, when missing Xen decides the location
-    (currently unimplemented).
+    Host physical address is optional, when missing Xen decides the location.
+    e.g. xen,shared-mem = < [guest address] [size] >;
 
 - role (Optional)
 
@@ -645,7 +645,7 @@ chosen {
         role = "owner";
         xen,shm-id = "my-shared-mem-0";
         xen,shared-mem = <0x10000000 0x10000000 0x10000000>;
-    }
+    };
 
     domU1 {
         compatible = "xen,domain";
@@ -656,25 +656,36 @@ chosen {
         vpl011;
 
         /*
-         * shared memory region identified as 0x0(xen,shm-id = <0x0>)
-         * is shared between Dom0 and DomU1.
+         * shared memory region "my-shared-mem-0" is shared
+         * between Dom0 and DomU1.
          */
         domU1-shared-mem@10000000 {
             compatible = "xen,domain-shared-memory-v1";
             role = "borrower";
             xen,shm-id = "my-shared-mem-0";
             xen,shared-mem = <0x10000000 0x50000000 0x10000000>;
-        }
+        };
 
         /*
-         * shared memory region identified as 0x1(xen,shm-id = <0x1>)
-         * is shared between DomU1 and DomU2.
+         * shared memory region "my-shared-mem-1" is shared between
+         * DomU1 and DomU2.
          */
         domU1-shared-mem@50000000 {
             compatible = "xen,domain-shared-memory-v1";
             xen,shm-id = "my-shared-mem-1";
             xen,shared-mem = <0x50000000 0x60000000 0x20000000>;
-        }
+        };
+
+        /*
+         * shared memory region "my-shared-mem-2" is shared between
+         * DomU1 and DomU2.
+         */
+        domU1-shared-mem-2 {
+            compatible = "xen,domain-shared-memory-v1";
+            xen,shm-id = "my-shared-mem-2";
+            role = "owner";
+            xen,shared-mem = <0x80000000 0x20000000>;
+        };
 
         ......
 
@@ -688,14 +699,21 @@ chosen {
         cpus = <1>;
 
         /*
-         * shared memory region identified as 0x1(xen,shm-id = <0x1>)
-         * is shared between domU1 and domU2.
+         * shared memory region "my-shared-mem-1" is shared between
+         * domU1 and domU2.
          */
         domU2-shared-mem@50000000 {
             compatible = "xen,domain-shared-memory-v1";
             xen,shm-id = "my-shared-mem-1";
             xen,shared-mem = <0x50000000 0x70000000 0x20000000>;
-        }
+        };
+
+        domU2-shared-mem-2 {
+            compatible = "xen,domain-shared-memory-v1";
+            xen,shm-id = "my-shared-mem-2";
+            role = "borrower";
+            xen,shared-mem = <0x90000000 0x20000000>;
+        };
 
         ......
     };
@@ -715,3 +733,11 @@ shared between DomU1 and DomU2. It will get mapped at 0x60000000 in DomU1 guest
 physical address space, and at 0x70000000 in DomU2 guest physical address space.
 DomU1 and DomU2 are both the borrower domain, the owner domain is the default
 owner domain DOMID_IO.
+
+For the static shared memory region "my-shared-mem-2", since host physical
+address is not provided by user, Xen will automatically allocate 512MB
+from heap as static shared memory to be shared between DomU1 and DomU2.
+The automatically allocated static shared memory will get mapped at
+0x80000000 in DomU1 guest physical address space, and at 0x90000000 in DomU2
+guest physical address space. DomU1 is explicitly defined as the owner domain,
+and DomU2 is the borrower domain.
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] automation/eclair_analysis: address remaining violations of MISRA C Rule 20.12
Message-Id: <E1sJNXv-0004DC-LY@xenbits.xenproject.org>
Date: Tue, 18 Jun 2024 01:22:03 +0000

commit 0f0235e9e9af3ecbd642317f0d238386bd7ee42c
Author:     Nicola Vetrini <nicola.vetrini@bugseng.com>
AuthorDate: Fri Jun 7 22:13:17 2024 +0200
Commit:     Stefano Stabellini <stefano.stabellini@amd.com>
CommitDate: Mon Jun 17 18:12:36 2024 -0700

    automation/eclair_analysis: address remaining violations of MISRA C Rule 20.12
    
    The DEFINE macro in asm-offsets.c (for all architectures) still generates
    violations despite the file(s) being excluded from compliance, due to the
    fact that in its expansion it sometimes refers entities in non-excluded files.
    These corner cases are deviated by the configuration.
    
    No functional change.
    
    Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
---
 automation/eclair_analysis/ECLAIR/deviations.ecl | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl
index 447c1e6661..e2653f77eb 100644
--- a/automation/eclair_analysis/ECLAIR/deviations.ecl
+++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
@@ -483,6 +483,12 @@ leads to a violation of the Rule are deviated."
 -config=MC3R1.R20.12,macros+={deliberate, "name(GENERATE_CASE)&&loc(file(deliberate_generate_case))"}
 -doc_end
 
+-doc_begin="The macro DEFINE is defined and used in excluded files asm-offsets.c.
+This may still cause violations if entities outside these files are referred to
+in the expansion."
+-config=MC3R1.R20.12,macros+={deliberate, "name(DEFINE)&&loc(file(asm_offsets))"}
+-doc_end
+
 #
 # Series 21.
 #
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] automation/eclair_analysis: add more clean MISRA guidelines
Message-Id: <E1sJNY5-0004Dh-Pp@xenbits.xenproject.org>
Date: Tue, 18 Jun 2024 01:22:13 +0000

commit 77b1ed1d02d082c457924a695e8dde7076285271
Author:     Nicola Vetrini <nicola.vetrini@bugseng.com>
AuthorDate: Fri Jun 7 22:13:18 2024 +0200
Commit:     Stefano Stabellini <stefano.stabellini@amd.com>
CommitDate: Mon Jun 17 18:14:54 2024 -0700

    automation/eclair_analysis: add more clean MISRA guidelines
    
    Rules 20.12 and 14.4 are now clean on ARM and x86, so they are added
    to the list of clean guidelines.
    
    Some guidelines listed in the additional clean section for ARM are also
    clean on x86, so they can be removed from there.
    
    No functional change.
    
    Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
    [stefano: remove 20.9 from commit message]
    Signed-off-by: Stefano Stabellini <stefano.stabellini@amd.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
---
 automation/eclair_analysis/ECLAIR/tagging.ecl | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/automation/eclair_analysis/ECLAIR/tagging.ecl b/automation/eclair_analysis/ECLAIR/tagging.ecl
index a354ff322e..b829655ca0 100644
--- a/automation/eclair_analysis/ECLAIR/tagging.ecl
+++ b/automation/eclair_analysis/ECLAIR/tagging.ecl
@@ -60,6 +60,7 @@ MC3R1.R11.7||
 MC3R1.R11.9||
 MC3R1.R12.5||
 MC3R1.R14.1||
+MC3R1.R14.4||
 MC3R1.R16.7||
 MC3R1.R17.1||
 MC3R1.R17.3||
@@ -73,6 +74,7 @@ MC3R1.R20.4||
 MC3R1.R20.6||
 MC3R1.R20.9||
 MC3R1.R20.11||
+MC3R1.R20.12||
 MC3R1.R20.13||
 MC3R1.R20.14||
 MC3R1.R21.3||
@@ -105,7 +107,7 @@ if(string_equal(target,"x86_64"),
 )
 
 if(string_equal(target,"arm64"),
-    service_selector({"additional_clean_guidelines","MC3R1.R14.4||MC3R1.R16.6||MC3R1.R20.12||MC3R1.R2.1||MC3R1.R5.3||MC3R1.R7.2||MC3R1.R7.3||MC3R1.R8.6||MC3R1.R9.3"})
+    service_selector({"additional_clean_guidelines","MC3R1.R16.6||MC3R1.R2.1||MC3R1.R5.3||MC3R1.R7.3"})
 )
 
 -reports+={clean:added,"service(clean_guidelines_common||additional_clean_guidelines)"}
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/Intel: unlock CPUID earlier for the BSP
Message-Id: <E1sJYmh-0003Sg-As@xenbits.xenproject.org>
Date: Tue, 18 Jun 2024 13:22:03 +0000

commit fa4d026737a47cd1d66ffb797a29150b4453aa9f
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 18 15:12:44 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 18 15:12:44 2024 +0200

    x86/Intel: unlock CPUID earlier for the BSP
    
    Intel CPUs have a MSR bit to limit CPUID enumeration to leaf two. If
    this bit is set by the BIOS then CPUID evaluation does not work when
    data from any leaf greater than two is needed; early_cpu_init() in
    particular wants to collect leaf 7 data.
    
    Cure this by unlocking CPUID right before evaluating anything which
    depends on the maximum CPUID leaf being greater than two.
    
    Inspired by (and description cloned from) Linux commit 0c2f6d04619e
    ("x86/topology/intel: Unlock CPUID before evaluating anything").
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/cpu/common.c |  3 ++-
 xen/arch/x86/cpu/cpu.h    |  2 ++
 xen/arch/x86/cpu/intel.c  | 29 +++++++++++++++++------------
 3 files changed, 21 insertions(+), 13 deletions(-)

diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c
index 28d7f34c4d..ff4cd22897 100644
--- a/xen/arch/x86/cpu/common.c
+++ b/xen/arch/x86/cpu/common.c
@@ -336,7 +336,8 @@ void __init early_cpu_init(bool verbose)
 
 	c->x86_vendor = x86_cpuid_lookup_vendor(ebx, ecx, edx);
 	switch (c->x86_vendor) {
-	case X86_VENDOR_INTEL:    actual_cpu = intel_cpu_dev;    break;
+	case X86_VENDOR_INTEL:    intel_unlock_cpuid_leaves(c);
+				  actual_cpu = intel_cpu_dev;    break;
 	case X86_VENDOR_AMD:      actual_cpu = amd_cpu_dev;      break;
 	case X86_VENDOR_CENTAUR:  actual_cpu = centaur_cpu_dev;  break;
 	case X86_VENDOR_SHANGHAI: actual_cpu = shanghai_cpu_dev; break;
diff --git a/xen/arch/x86/cpu/cpu.h b/xen/arch/x86/cpu/cpu.h
index e3d06278b3..8be65e975a 100644
--- a/xen/arch/x86/cpu/cpu.h
+++ b/xen/arch/x86/cpu/cpu.h
@@ -24,3 +24,5 @@ void amd_init_lfence(struct cpuinfo_x86 *c);
 void amd_init_ssbd(const struct cpuinfo_x86 *c);
 void amd_init_spectral_chicken(void);
 void detect_zen2_null_seg_behaviour(void);
+
+void intel_unlock_cpuid_leaves(struct cpuinfo_x86 *c);
diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c
index ce7a77a867..af56e57bd8 100644
--- a/xen/arch/x86/cpu/intel.c
+++ b/xen/arch/x86/cpu/intel.c
@@ -303,10 +303,24 @@ static void __init noinline intel_init_levelling(void)
 		ctxt_switch_masking = intel_ctxt_switch_masking;
 }
 
-static void cf_check early_init_intel(struct cpuinfo_x86 *c)
+/* Unmask CPUID levels if masked. */
+void intel_unlock_cpuid_leaves(struct cpuinfo_x86 *c)
 {
-	u64 misc_enable, disable;
+	uint64_t misc_enable, disable;
+
+	rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
+
+	disable = misc_enable & MSR_IA32_MISC_ENABLE_LIMIT_CPUID;
+	if (disable) {
+		wrmsrl(MSR_IA32_MISC_ENABLE, misc_enable & ~disable);
+		bootsym(trampoline_misc_enable_off) |= disable;
+		c->cpuid_level = cpuid_eax(0);
+		printk(KERN_INFO "revised cpuid level: %u\n", c->cpuid_level);
+	}
+}
 
+static void cf_check early_init_intel(struct cpuinfo_x86 *c)
+{
 	/* Netburst reports 64 bytes clflush size, but does IO in 128 bytes */
 	if (c->x86 == 15 && c->x86_cache_alignment == 64)
 		c->x86_cache_alignment = 128;
@@ -315,16 +329,7 @@ static void cf_check early_init_intel(struct cpuinfo_x86 *c)
 	    bootsym(trampoline_misc_enable_off) & MSR_IA32_MISC_ENABLE_XD_DISABLE)
 		printk(KERN_INFO "re-enabled NX (Execute Disable) protection\n");
 
-	/* Unmask CPUID levels and NX if masked: */
-	rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
-
-	disable = misc_enable & MSR_IA32_MISC_ENABLE_LIMIT_CPUID;
-	if (disable) {
-		wrmsrl(MSR_IA32_MISC_ENABLE, misc_enable & ~disable);
-		bootsym(trampoline_misc_enable_off) |= disable;
-		printk(KERN_INFO "revised cpuid level: %d\n",
-		       cpuid_eax(0));
-	}
+	intel_unlock_cpuid_leaves(c);
 
 	/* CPUID workaround for Intel 0F33/0F34 CPU */
 	if (boot_cpu_data.x86 == 0xF && boot_cpu_data.x86_model == 3 &&
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/irq: deal with old_cpu_mask for interrupts in movement in fixup_irqs()
Message-Id: <E1sJYmr-0003T9-ES@xenbits.xenproject.org>
Date: Tue, 18 Jun 2024 13:22:13 +0000

commit 817d1cd627be668c358d038f0fadbf7d24d417d3
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Tue Jun 18 15:14:49 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 18 15:14:49 2024 +0200

    x86/irq: deal with old_cpu_mask for interrupts in movement in fixup_irqs()
    
    Given the current logic it's possible for ->arch.old_cpu_mask to get out of
    sync: if a CPU set in old_cpu_mask is offlined and then onlined
    again without old_cpu_mask having been updated the data in the mask will no
    longer be accurate, as when brought back online the CPU will no longer have
    old_vector configured to handle the old interrupt source.
    
    If there's an interrupt movement in progress, and the to be offlined CPU (which
    is the call context) is in the old_cpu_mask, clear it and update the mask, so
    it doesn't contain stale data.
    
    Note that when the system is going down fixup_irqs() will be called by
    smp_send_stop() from CPU 0 with a mask with only CPU 0 on it, effectively
    asking to move all interrupts to the current caller (CPU 0) which is the only
    CPU to remain online.  In that case we don't care to migrate interrupts that
    are in the process of being moved, as it's likely we won't be able to move all
    interrupts to CPU 0 due to vector shortage anyway.
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/irq.c | 29 ++++++++++++++++++++++++++++-
 1 file changed, 28 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index 263e502bc0..d305aed317 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2526,7 +2526,7 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
     for ( irq = 0; irq < nr_irqs; irq++ )
     {
         bool break_affinity = false, set_affinity = true;
-        unsigned int vector;
+        unsigned int vector, cpu = smp_processor_id();
         cpumask_t *affinity = this_cpu(scratch_cpumask);
 
         if ( irq == 2 )
@@ -2569,6 +2569,33 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
                                affinity);
         }
 
+        if ( desc->arch.move_in_progress &&
+             /*
+              * Only attempt to adjust the mask if the current CPU is going
+              * offline, otherwise the whole system is going down and leaving
+              * stale data in the masks is fine.
+              */
+             !cpu_online(cpu) &&
+             cpumask_test_cpu(cpu, desc->arch.old_cpu_mask) )
+        {
+            /*
+             * This CPU is going offline, remove it from ->arch.old_cpu_mask
+             * and possibly release the old vector if the old mask becomes
+             * empty.
+             *
+             * Note cleaning ->arch.old_cpu_mask is required if the CPU is
+             * brought offline and then online again, as when re-onlined the
+             * per-cpu vector table will no longer have ->arch.old_vector
+             * setup, and hence ->arch.old_cpu_mask would be stale.
+             */
+            cpumask_clear_cpu(cpu, desc->arch.old_cpu_mask);
+            if ( cpumask_empty(desc->arch.old_cpu_mask) )
+            {
+                desc->arch.move_in_progress = 0;
+                release_old_vec(desc);
+            }
+        }
+
         /*
          * Avoid shuffling the interrupt around as long as current target CPUs
          * are a subset of the input mask.  What fixup_irqs() cares about is
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/irq: handle moving interrupts in _assign_irq_vector()
Message-Id: <E1sJYn1-0003Ts-I0@xenbits.xenproject.org>
Date: Tue, 18 Jun 2024 13:22:23 +0000

commit 369558924a642bbb0cb731e9a3375958867cb17b
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Tue Jun 18 15:15:10 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 18 15:15:10 2024 +0200

    x86/irq: handle moving interrupts in _assign_irq_vector()
    
    Currently there's logic in fixup_irqs() that attempts to prevent
    _assign_irq_vector() from failing, as fixup_irqs() is required to evacuate all
    interrupts from the CPUs not present in the input mask.  The current logic in
    fixup_irqs() is incomplete, as it doesn't deal with interrupts that have
    move_cleanup_count > 0 and a non-empty ->arch.old_cpu_mask field.
    
    Instead of attempting to fixup the interrupt descriptor in fixup_irqs() so that
    _assign_irq_vector() cannot fail, introduce logic in _assign_irq_vector()
    to deal with interrupts that have either move_{in_progress,cleanup_count} set
    and no remaining online CPUs in ->arch.cpu_mask.
    
    If _assign_irq_vector() is requested to move an interrupt in the state
    described above, first attempt to see if ->arch.old_cpu_mask contains any valid
    CPUs that could be used as fallback, and if that's the case do move the
    interrupt back to the previous destination.  Note this is easier because the
    vector hasn't been released yet, so there's no need to allocate and setup a new
    vector on the destination.
    
    Due to the logic in fixup_irqs() that clears offline CPUs from
    ->arch.old_cpu_mask (and releases the old vector if the mask becomes empty) it
    shouldn't be possible to get into _assign_irq_vector() with
    ->arch.move_{in_progress,cleanup_count} set but no online CPUs in
    ->arch.old_cpu_mask.
    
    However if ->arch.move_{in_progress,cleanup_count} is set and the interrupt has
    also changed affinity, it's possible the members of ->arch.old_cpu_mask are no
    longer part of the affinity set, move the interrupt to a different CPU part of
    the provided mask and keep the current ->arch.old_{cpu_mask,vector} for the
    pending interrupt movement to be completed.
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/irq.c | 97 ++++++++++++++++++++++++++++++++++++++----------------
 1 file changed, 68 insertions(+), 29 deletions(-)

diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index d305aed317..d7f15c38af 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -544,7 +544,58 @@ static int _assign_irq_vector(struct irq_desc *desc, const cpumask_t *mask)
     }
 
     if ( desc->arch.move_in_progress || desc->arch.move_cleanup_count )
-        return -EAGAIN;
+    {
+        /*
+         * If the current destination is online refuse to shuffle.  Retry after
+         * the in-progress movement has finished.
+         */
+        if ( cpumask_intersects(desc->arch.cpu_mask, &cpu_online_map) )
+            return -EAGAIN;
+
+        /*
+         * Due to the logic in fixup_irqs() that clears offlined CPUs from
+         * ->arch.old_cpu_mask it shouldn't be possible to get here with
+         * ->arch.move_{in_progress,cleanup_count} set and no online CPUs in
+         * ->arch.old_cpu_mask.
+         */
+        ASSERT(valid_irq_vector(desc->arch.old_vector));
+        ASSERT(cpumask_intersects(desc->arch.old_cpu_mask, &cpu_online_map));
+
+        if ( cpumask_intersects(desc->arch.old_cpu_mask, mask) )
+        {
+            /*
+             * Fallback to the old destination if moving is in progress and the
+             * current destination is to be offlined.  This is only possible if
+             * the CPUs in old_cpu_mask intersect with the affinity mask passed
+             * in the 'mask' parameter.
+             */
+            desc->arch.vector = desc->arch.old_vector;
+            cpumask_and(desc->arch.cpu_mask, desc->arch.old_cpu_mask, mask);
+
+            /* Undo any possibly done cleanup. */
+            for_each_cpu(cpu, desc->arch.cpu_mask)
+                per_cpu(vector_irq, cpu)[desc->arch.vector] = irq;
+
+            /* Cancel the pending move and release the current vector. */
+            desc->arch.old_vector = IRQ_VECTOR_UNASSIGNED;
+            cpumask_clear(desc->arch.old_cpu_mask);
+            desc->arch.move_in_progress = 0;
+            desc->arch.move_cleanup_count = 0;
+            if ( desc->arch.used_vectors )
+            {
+                ASSERT(test_bit(old_vector, desc->arch.used_vectors));
+                clear_bit(old_vector, desc->arch.used_vectors);
+            }
+
+            return 0;
+        }
+
+        /*
+         * There's an interrupt movement in progress but the destination(s) in
+         * ->arch.old_cpu_mask are not suitable given the 'mask' parameter, go
+         * through the full logic to find a new vector in a suitable CPU.
+         */
+    }
 
     err = -ENOSPC;
 
@@ -600,7 +651,22 @@ next:
         current_vector = vector;
         current_offset = offset;
 
-        if ( valid_irq_vector(old_vector) )
+        if ( desc->arch.move_in_progress || desc->arch.move_cleanup_count )
+        {
+            ASSERT(!cpumask_intersects(desc->arch.cpu_mask, &cpu_online_map));
+            /*
+             * Special case when evacuating an interrupt from a CPU to be
+             * offlined and the interrupt was already in the process of being
+             * moved.  Leave ->arch.old_{vector,cpu_mask} as-is and just
+             * replace ->arch.{cpu_mask,vector} with the new destination.
+             * Cleanup will be done normally for the old fields, just release
+             * the current vector here.
+             */
+            if ( desc->arch.used_vectors &&
+                 !test_and_clear_bit(old_vector, desc->arch.used_vectors) )
+                ASSERT_UNREACHABLE();
+        }
+        else if ( valid_irq_vector(old_vector) )
         {
             cpumask_and(desc->arch.old_cpu_mask, desc->arch.cpu_mask,
                         &cpu_online_map);
@@ -2607,33 +2673,6 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
             continue;
         }
 
-        /*
-         * In order for the affinity adjustment below to be successful, we
-         * need _assign_irq_vector() to succeed. This in particular means
-         * clearing desc->arch.move_in_progress if this would otherwise
-         * prevent the function from succeeding. Since there's no way for the
-         * flag to get cleared anymore when there's no possible destination
-         * left (the only possibility then would be the IRQs enabled window
-         * after this loop), there's then also no race with us doing it here.
-         *
-         * Therefore the logic here and there need to remain in sync.
-         */
-        if ( desc->arch.move_in_progress &&
-             !cpumask_intersects(mask, desc->arch.cpu_mask) )
-        {
-            unsigned int cpu;
-
-            cpumask_and(affinity, desc->arch.old_cpu_mask, &cpu_online_map);
-
-            spin_lock(&vector_lock);
-            for_each_cpu(cpu, affinity)
-                per_cpu(vector_irq, cpu)[desc->arch.old_vector] = ~irq;
-            spin_unlock(&vector_lock);
-
-            release_old_vec(desc);
-            desc->arch.move_in_progress = 0;
-        }
-
         if ( !cpumask_intersects(mask, desc->affinity) )
         {
             break_affinity = true;
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/ubsan: Fix UB in type_descriptor declaration
Message-Id: <E1sJZNT-0005lq-Fh@xenbits.xenproject.org>
Date: Tue, 18 Jun 2024 14:00:03 +0000

commit bd59af99700f075d06a6d47a16f777c9519928e0
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Jun 17 18:40:32 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Tue Jun 18 14:55:04 2024 +0100

    xen/ubsan: Fix UB in type_descriptor declaration
    
    struct type_descriptor is arranged with a NUL terminated string following the
    kind/info fields.
    
    The only reason this doesn't trip UBSAN detection itself (on more modern
    compilers at least) is because struct type_descriptor is only referenced in
    suppressed regions.
    
    Switch the declaration to be a real flexible member.  No functional change.
    
    Fixes: 00fcf4dd8eb4 ("xen/ubsan: Import ubsan implementation from Linux 4.13")
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/common/ubsan/ubsan.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/common/ubsan/ubsan.h b/xen/common/ubsan/ubsan.h
index a3159040fe..3db42e75b1 100644
--- a/xen/common/ubsan/ubsan.h
+++ b/xen/common/ubsan/ubsan.h
@@ -10,7 +10,7 @@ enum {
 struct type_descriptor {
 	u16 type_kind;
 	u16 type_info;
-	char type_name[1];
+	char type_name[];
 };
 
 struct source_location {
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] automation/eclair_analysis: address remaining violations of MISRA C Rule 20.12
Message-Id: <E1sJfr3-00089c-JP@xenbits.xenproject.org>
Date: Tue, 18 Jun 2024 20:55:01 +0000

commit 0f0235e9e9af3ecbd642317f0d238386bd7ee42c
Author:     Nicola Vetrini <nicola.vetrini@bugseng.com>
AuthorDate: Fri Jun 7 22:13:17 2024 +0200
Commit:     Stefano Stabellini <stefano.stabellini@amd.com>
CommitDate: Mon Jun 17 18:12:36 2024 -0700

    automation/eclair_analysis: address remaining violations of MISRA C Rule 20.12
    
    The DEFINE macro in asm-offsets.c (for all architectures) still generates
    violations despite the file(s) being excluded from compliance, due to the
    fact that in its expansion it sometimes refers entities in non-excluded files.
    These corner cases are deviated by the configuration.
    
    No functional change.
    
    Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
---
 automation/eclair_analysis/ECLAIR/deviations.ecl | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl
index 447c1e6661..e2653f77eb 100644
--- a/automation/eclair_analysis/ECLAIR/deviations.ecl
+++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
@@ -483,6 +483,12 @@ leads to a violation of the Rule are deviated."
 -config=MC3R1.R20.12,macros+={deliberate, "name(GENERATE_CASE)&&loc(file(deliberate_generate_case))"}
 -doc_end
 
+-doc_begin="The macro DEFINE is defined and used in excluded files asm-offsets.c.
+This may still cause violations if entities outside these files are referred to
+in the expansion."
+-config=MC3R1.R20.12,macros+={deliberate, "name(DEFINE)&&loc(file(asm_offsets))"}
+-doc_end
+
 #
 # Series 21.
 #
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] automation/eclair_analysis: add more clean MISRA guidelines
Message-Id: <E1sJfrD-0008A3-N4@xenbits.xenproject.org>
Date: Tue, 18 Jun 2024 20:55:11 +0000

commit 77b1ed1d02d082c457924a695e8dde7076285271
Author:     Nicola Vetrini <nicola.vetrini@bugseng.com>
AuthorDate: Fri Jun 7 22:13:18 2024 +0200
Commit:     Stefano Stabellini <stefano.stabellini@amd.com>
CommitDate: Mon Jun 17 18:14:54 2024 -0700

    automation/eclair_analysis: add more clean MISRA guidelines
    
    Rules 20.12 and 14.4 are now clean on ARM and x86, so they are added
    to the list of clean guidelines.
    
    Some guidelines listed in the additional clean section for ARM are also
    clean on x86, so they can be removed from there.
    
    No functional change.
    
    Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
    [stefano: remove 20.9 from commit message]
    Signed-off-by: Stefano Stabellini <stefano.stabellini@amd.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
---
 automation/eclair_analysis/ECLAIR/tagging.ecl | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/automation/eclair_analysis/ECLAIR/tagging.ecl b/automation/eclair_analysis/ECLAIR/tagging.ecl
index a354ff322e..b829655ca0 100644
--- a/automation/eclair_analysis/ECLAIR/tagging.ecl
+++ b/automation/eclair_analysis/ECLAIR/tagging.ecl
@@ -60,6 +60,7 @@ MC3R1.R11.7||
 MC3R1.R11.9||
 MC3R1.R12.5||
 MC3R1.R14.1||
+MC3R1.R14.4||
 MC3R1.R16.7||
 MC3R1.R17.1||
 MC3R1.R17.3||
@@ -73,6 +74,7 @@ MC3R1.R20.4||
 MC3R1.R20.6||
 MC3R1.R20.9||
 MC3R1.R20.11||
+MC3R1.R20.12||
 MC3R1.R20.13||
 MC3R1.R20.14||
 MC3R1.R21.3||
@@ -105,7 +107,7 @@ if(string_equal(target,"x86_64"),
 )
 
 if(string_equal(target,"arm64"),
-    service_selector({"additional_clean_guidelines","MC3R1.R14.4||MC3R1.R16.6||MC3R1.R20.12||MC3R1.R2.1||MC3R1.R5.3||MC3R1.R7.2||MC3R1.R7.3||MC3R1.R8.6||MC3R1.R9.3"})
+    service_selector({"additional_clean_guidelines","MC3R1.R16.6||MC3R1.R2.1||MC3R1.R5.3||MC3R1.R7.3"})
 )
 
 -reports+={clean:added,"service(clean_guidelines_common||additional_clean_guidelines)"}
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm/static-shmem: Static-shmem should be direct-mapped for direct-mapped domains
Message-Id: <E1sJjQi-00052f-3I@xenbits.xenproject.org>
Date: Wed, 19 Jun 2024 00:44:04 +0000

commit cb1ddafdc57305a44e23f781decfdd31dea31189
Author:     Henry Wang <xin.wang2@amd.com>
AuthorDate: Tue Jun 18 17:27:51 2024 -0700
Commit:     Stefano Stabellini <stefano.stabellini@amd.com>
CommitDate: Tue Jun 18 17:27:51 2024 -0700

    xen/arm/static-shmem: Static-shmem should be direct-mapped for direct-mapped domains
    
    Currently, users are allowed to map static shared memory in a
    non-direct-mapped way for direct-mapped domains. This can lead to
    clashing of guest memory spaces. Also, the current extended region
    finding logic only removes the host physical addresses of the
    static shared memory areas for direct-mapped domains, which may be
    inconsistent with the guest memory map if users map the static
    shared memory in a non-direct-mapped way. This will lead to incorrect
    extended region calculation results.
    
    To make things easier, add restriction that static shared memory
    should also be direct-mapped for direct-mapped domains. Check the
    host physical address to be matched with guest physical address when
    parsing the device tree. Document this restriction in the doc.
    
    Signed-off-by: Henry Wang <xin.wang2@amd.com>
    Signed-off-by: Stefano Stabellini <stefano.stabellini@amd.com>
    Acked-by: Michal Orzel <michal.orzel@amd.com>
---
 docs/misc/arm/device-tree/booting.txt | 3 +++
 xen/arch/arm/static-shmem.c           | 6 ++++++
 2 files changed, 9 insertions(+)

diff --git a/docs/misc/arm/device-tree/booting.txt b/docs/misc/arm/device-tree/booting.txt
index aa0e614864..3a04f5c57f 100644
--- a/docs/misc/arm/device-tree/booting.txt
+++ b/docs/misc/arm/device-tree/booting.txt
@@ -607,6 +607,9 @@ communication.
     shared memory region in host physical address space, a size, and a guest
     physical address, as the target address of the mapping.
     e.g. xen,shared-mem = < [host physical address] [guest address] [size] >;
+    Note that if a domain is direct-mapped, i.e. the Dom0 and the Dom0less
+    DomUs with `direct-map` device tree property, the static shared memory
+    should also be direct-mapped (host physical address == guest address).
 
     It shall also meet the following criteria:
     1) If the SHM ID matches with an existing region, the address range of the
diff --git a/xen/arch/arm/static-shmem.c b/xen/arch/arm/static-shmem.c
index dbb017c7d7..c434b96e62 100644
--- a/xen/arch/arm/static-shmem.c
+++ b/xen/arch/arm/static-shmem.c
@@ -324,6 +324,12 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo,
             printk("%pd: static shared memory bank not found: '%s'", d, shm_id);
             return -ENOENT;
         }
+        if ( is_domain_direct_mapped(d) && (pbase != gbase) )
+        {
+            printk("%pd: physical address 0x%"PRIpaddr" and guest address 0x%"PRIpaddr" are not direct-mapped.\n",
+                   d, pbase, gbase);
+            return -EINVAL;
+        }
 
         pbase = boot_shm_bank->start;
         psize = boot_shm_bank->size;
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: Alloc XenStore page for Dom0less DomUs from hypervisor
Message-Id: <E1sJjQs-00053N-83@xenbits.xenproject.org>
Date: Wed, 19 Jun 2024 00:44:14 +0000

commit 6f9d90ea943b5e0c5d11a71090c49bbfd79e97ea
Author:     Henry Wang <xin.wang2@amd.com>
AuthorDate: Fri May 24 15:55:20 2024 -0700
Commit:     Stefano Stabellini <stefano.stabellini@amd.com>
CommitDate: Tue Jun 18 17:32:41 2024 -0700

    xen/arm: Alloc XenStore page for Dom0less DomUs from hypervisor
    
    There are use cases (for example using the PV driver) in Dom0less
    setup that require Dom0less DomUs start immediately with Dom0, but
    initialize XenStore later after Dom0's successful boot and call to
    the init-dom0less application.
    
    An error message can seen from the init-dom0less application on
    1:1 direct-mapped domains:
    ```
    Allocating magic pages
    memory.c:238:d0v0 mfn 0x39000 doesn't belong to d1
    Error on alloc magic pages
    ```
    
    The "magic page" is a terminology used in the toolstack as reserved
    pages for the VM to have access to virtual platform capabilities.
    Currently the magic pages for Dom0less DomUs are populated by the
    init-dom0less app through populate_physmap(), and populate_physmap()
    automatically assumes gfn == mfn for 1:1 direct mapped domains. This
    cannot be true for the magic pages that are allocated later from the
    init-dom0less application executed in Dom0. For domain using statically
    allocated memory but not 1:1 direct-mapped, similar error "failed to
    retrieve a reserved page" can be seen as the reserved memory list is
    empty at that time.
    
    Since for init-dom0less, the magic page region is only for XenStore.
    To solve above issue, this commit allocates the XenStore page for
    Dom0less DomUs at the domain construction time. The PFN will be
    noted and communicated to the init-dom0less application executed
    from Dom0. To keep the XenStore late init protocol, set the connection
    status to XENSTORE_RECONNECT.
    
    Currently the GUEST_MAGIC_BASE in the init-dom0less application is
    hardcoded, which will lead to failures for 1:1 direct-mapped Dom0less
    DomUs.
    
    Since the guest magic region allocation from init-dom0less is for
    XenStore, and the XenStore page is now allocated from the hypervisor,
    instead of hardcoding the guest magic pages region, use
    xc_hvm_param_get() to get the XenStore page PFN. Rename alloc_xs_page()
    to get_xs_page() to reflect the changes.
    
    With this change, some existing code is not needed anymore, including:
    (1) The definition of the XenStore page offset.
    (2) Call to xc_domain_setmaxmem() and xc_clear_domain_page() as we
        don't need to set the max mem and clear the page anymore.
    (3) Foreign mapping of the XenStore page, setting of XenStore interface
        status and HVM_PARAM_STORE_PFN from init-dom0less, as they are set
        by the hypervisor.
    
    Take the opportunity to do some coding style improvements when possible.
    
    Reported-by: Alec Kwapis <alec.kwapis@medtronic.com>
    Suggested-by: Daniel P. Smith <dpsmith@apertussolutions.com>
    Signed-off-by: Henry Wang <xin.wang2@amd.com>
    Signed-off-by: Stefano Stabellini <stefano.stabellini@amd.com>
    Reviewed-by: Michal Orzel <michal.orzel@amd.com>
    Reviewed-by: Jason Andryuk <jason.andryuk@amd.com>
    Acked-by: Anthony PERARD <anthony.perard@vates.tech>
---
 tools/helpers/init-dom0less.c | 58 +++++++++++--------------------------------
 xen/arch/arm/dom0less-build.c | 58 ++++++++++++++++++++++++++++++++++++++++++-
 2 files changed, 71 insertions(+), 45 deletions(-)

diff --git a/tools/helpers/init-dom0less.c b/tools/helpers/init-dom0less.c
index fee93459c4..325527f040 100644
--- a/tools/helpers/init-dom0less.c
+++ b/tools/helpers/init-dom0less.c
@@ -16,30 +16,18 @@
 
 #include "init-dom-json.h"
 
-#define XENSTORE_PFN_OFFSET 1
 #define STR_MAX_LENGTH 128
 
-static int alloc_xs_page(struct xc_interface_core *xch,
-                         libxl_dominfo *info,
-                         uint64_t *xenstore_pfn)
+static int get_xs_page(struct xc_interface_core *xch, libxl_dominfo *info,
+                       uint64_t *xenstore_pfn)
 {
     int rc;
-    const xen_pfn_t base = GUEST_MAGIC_BASE >> XC_PAGE_SHIFT;
-    xen_pfn_t p2m = (GUEST_MAGIC_BASE >> XC_PAGE_SHIFT) + XENSTORE_PFN_OFFSET;
 
-    rc = xc_domain_setmaxmem(xch, info->domid,
-                             info->max_memkb + (XC_PAGE_SIZE/1024));
-    if (rc < 0)
-        return rc;
-
-    rc = xc_domain_populate_physmap_exact(xch, info->domid, 1, 0, 0, &p2m);
-    if (rc < 0)
-        return rc;
-
-    *xenstore_pfn = base + XENSTORE_PFN_OFFSET;
-    rc = xc_clear_domain_page(xch, info->domid, *xenstore_pfn);
-    if (rc < 0)
-        return rc;
+    rc = xc_hvm_param_get(xch, info->domid, HVM_PARAM_STORE_PFN, xenstore_pfn);
+    if (rc < 0) {
+        fprintf(stderr,"Failed to get HVM_PARAM_STORE_PFN\n");
+        return 1;
+    }
 
     return 0;
 }
@@ -100,6 +88,7 @@ static bool do_xs_write_vm(struct xs_handle *xsh, xs_transaction_t t,
  */
 static int create_xenstore(struct xs_handle *xsh,
                            libxl_dominfo *info, libxl_uuid uuid,
+                           uint64_t xenstore_pfn,
                            evtchn_port_t xenstore_port)
 {
     domid_t domid;
@@ -145,8 +134,7 @@ static int create_xenstore(struct xs_handle *xsh,
     rc = snprintf(target_memkb_str, STR_MAX_LENGTH, "%"PRIu64, info->current_memkb);
     if (rc < 0 || rc >= STR_MAX_LENGTH)
         return rc;
-    rc = snprintf(ring_ref_str, STR_MAX_LENGTH, "%lld",
-                  (GUEST_MAGIC_BASE >> XC_PAGE_SHIFT) + XENSTORE_PFN_OFFSET);
+    rc = snprintf(ring_ref_str, STR_MAX_LENGTH, "%"PRIu64, xenstore_pfn);
     if (rc < 0 || rc >= STR_MAX_LENGTH)
         return rc;
     rc = snprintf(xenstore_port_str, STR_MAX_LENGTH, "%u", xenstore_port);
@@ -230,7 +218,6 @@ static int init_domain(struct xs_handle *xsh,
     libxl_uuid uuid;
     uint64_t xenstore_evtchn, xenstore_pfn;
     int rc;
-    struct xenstore_domain_interface *intf;
 
     printf("Init dom0less domain: %u\n", info->domid);
 
@@ -245,20 +232,11 @@ static int init_domain(struct xs_handle *xsh,
     if (!xenstore_evtchn)
         return 0;
 
-    /* Alloc xenstore page */
-    if (alloc_xs_page(xch, info, &xenstore_pfn) != 0) {
-        printf("Error on alloc magic pages\n");
-        return 1;
-    }
-
-    intf = xenforeignmemory_map(xfh, info->domid, PROT_READ | PROT_WRITE, 1,
-                                &xenstore_pfn, NULL);
-    if (!intf) {
-        printf("Error mapping xenstore page\n");
+    /* Get xenstore page */
+    if (get_xs_page(xch, info, &xenstore_pfn) != 0) {
+        fprintf(stderr,"Error on getting xenstore page\n");
         return 1;
     }
-    intf->connection = XENSTORE_RECONNECT;
-    xenforeignmemory_unmap(xfh, intf, 1);
 
     rc = xc_dom_gnttab_seed(xch, info->domid, true,
                             (xen_pfn_t)-1, xenstore_pfn, 0, 0);
@@ -272,19 +250,11 @@ static int init_domain(struct xs_handle *xsh,
     if (rc)
         err(1, "gen_stub_json_config");
 
-    /* Now everything is ready: set HVM_PARAM_STORE_PFN */
-    rc = xc_hvm_param_set(xch, info->domid, HVM_PARAM_STORE_PFN,
-                          xenstore_pfn);
-    if (rc < 0)
-        return rc;
-
-    rc = create_xenstore(xsh, info, uuid, xenstore_evtchn);
+    rc = create_xenstore(xsh, info, uuid, xenstore_pfn, xenstore_evtchn);
     if (rc)
         err(1, "writing to xenstore");
 
-    rc = xs_introduce_domain(xsh, info->domid,
-            (GUEST_MAGIC_BASE >> XC_PAGE_SHIFT) + XENSTORE_PFN_OFFSET,
-            xenstore_evtchn);
+    rc = xs_introduce_domain(xsh, info->domid, xenstore_pfn, xenstore_evtchn);
     if (!rc)
         err(1, "xs_introduce_domain");
     return 0;
diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
index f919d3acf9..ef2ba85ff4 100644
--- a/xen/arch/arm/dom0less-build.c
+++ b/xen/arch/arm/dom0less-build.c
@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 #include <xen/device_tree.h>
+#include <xen/domain_page.h>
 #include <xen/err.h>
 #include <xen/event.h>
 #include <xen/grant_table.h>
@@ -10,6 +11,8 @@
 #include <xen/sizes.h>
 #include <xen/vmap.h>
 
+#include <public/io/xs_wire.h>
+
 #include <asm/arm64/sve.h>
 #include <asm/dom0less-build.h>
 #include <asm/domain_build.h>
@@ -739,6 +742,56 @@ static int __init alloc_xenstore_evtchn(struct domain *d)
     return 0;
 }
 
+#define XENSTORE_PFN_OFFSET 1
+static int __init alloc_xenstore_page(struct domain *d)
+{
+    struct page_info *xenstore_pg;
+    struct xenstore_domain_interface *interface;
+    mfn_t mfn;
+    gfn_t gfn;
+    int rc;
+
+    if ( (UINT_MAX - d->max_pages) < 1 )
+    {
+        printk(XENLOG_ERR "%pd: Over-allocation for d->max_pages by 1 page.\n",
+               d);
+        return -EINVAL;
+    }
+    d->max_pages += 1;
+    xenstore_pg = alloc_domheap_page(d, MEMF_bits(32));
+    if ( xenstore_pg == NULL && is_64bit_domain(d) )
+        xenstore_pg = alloc_domheap_page(d, 0);
+    if ( xenstore_pg == NULL )
+        return -ENOMEM;
+
+    mfn = page_to_mfn(xenstore_pg);
+    if ( !mfn_x(mfn) )
+    {
+        free_domheap_page(xenstore_pg);
+        return -ENOMEM;
+    }
+
+    if ( !is_domain_direct_mapped(d) )
+        gfn = gaddr_to_gfn(GUEST_MAGIC_BASE +
+                           (XENSTORE_PFN_OFFSET << PAGE_SHIFT));
+    else
+        gfn = gaddr_to_gfn(mfn_to_maddr(mfn));
+
+    rc = guest_physmap_add_page(d, gfn, mfn, 0);
+    if ( rc )
+    {
+        free_domheap_page(xenstore_pg);
+        return rc;
+    }
+
+    d->arch.hvm.params[HVM_PARAM_STORE_PFN] = gfn_x(gfn);
+    interface = map_domain_page(mfn);
+    interface->connection = XENSTORE_RECONNECT;
+    unmap_domain_page(interface);
+
+    return 0;
+}
+
 static int __init construct_domU(struct domain *d,
                                  const struct dt_device_node *node)
 {
@@ -839,7 +892,10 @@ static int __init construct_domU(struct domain *d,
         rc = alloc_xenstore_evtchn(d);
         if ( rc < 0 )
             return rc;
-        d->arch.hvm.params[HVM_PARAM_STORE_PFN] = ~0ULL;
+
+        rc = alloc_xenstore_page(d);
+        if ( rc < 0 )
+            return rc;
     }
 
     return rc;
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] docs/features/dom0less: Update the late XenStore init protocol
Message-Id: <E1sJjR2-00053q-C7@xenbits.xenproject.org>
Date: Wed, 19 Jun 2024 00:44:24 +0000

commit 53c5c99e8744495395c1274595d6ca55947d1d6a
Author:     Henry Wang <xin.wang2@amd.com>
AuthorDate: Fri May 24 15:55:22 2024 -0700
Commit:     Stefano Stabellini <stefano.stabellini@amd.com>
CommitDate: Tue Jun 18 17:33:25 2024 -0700

    docs/features/dom0less: Update the late XenStore init protocol
    
    With the new allocation strategy of Dom0less DomUs XenStore page,
    update the doc of the late XenStore init protocol accordingly.
    
    Signed-off-by: Henry Wang <xin.wang2@amd.com>
    Reviewed-by: Michal Orzel <michal.orzel@amd.com>
---
 docs/features/dom0less.pandoc | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/docs/features/dom0less.pandoc b/docs/features/dom0less.pandoc
index 725afa0558..8b178edee0 100644
--- a/docs/features/dom0less.pandoc
+++ b/docs/features/dom0less.pandoc
@@ -110,9 +110,10 @@ hotplug PV drivers to dom0less guests. E.g. xl network-attach domU.
 The implementation works as follows:
 - Xen allocates the xenstore event channel for each dom0less domU that
   has the "xen,enhanced" property, and sets HVM_PARAM_STORE_EVTCHN
-- Xen does *not* allocate the xenstore page and sets HVM_PARAM_STORE_PFN
-  to ~0ULL (invalid)
-- Dom0less domU kernels check that HVM_PARAM_STORE_PFN is set to invalid
+- Xen allocates the xenstore page and sets HVM_PARAM_STORE_PFN as well
+  as the connection status to XENSTORE_RECONNECT.
+- Dom0less domU kernels check that HVM_PARAM_STORE_PFN is set to
+  ~0ULL (invalid) or the connection status is *not* XENSTORE_CONNECTED.
     - Old kernels will continue without xenstore support (Note: some old
       buggy kernels might crash because they don't check the validity of
       HVM_PARAM_STORE_PFN before using it! Disable "xen,enhanced" in
@@ -121,13 +122,14 @@ The implementation works as follows:
       channel (HVM_PARAM_STORE_EVTCHN) before continuing with the
       initialization
 - Once dom0 is booted, init-dom0less is executed:
-    - it allocates the xenstore shared page and sets HVM_PARAM_STORE_PFN
+    - it gets the xenstore shared page from HVM_PARAM_STORE_PFN
     - it calls xs_introduce_domain
 - Xenstored notices the new domain, initializes interfaces as usual, and
   sends an event channel notification to the domain using the xenstore
   event channel (HVM_PARAM_STORE_EVTCHN)
 - The Linux domU kernel receives the event channel notification, checks
-  HVM_PARAM_STORE_PFN again and continue with the initialization
+  HVM_PARAM_STORE_PFN and the connection status again and continue with
+  the initialization
 
 
 Limitations
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/Intel: unlock CPUID earlier for the BSP
Message-Id: <E1sJoHd-0005HG-Ka@xenbits.xenproject.org>
Date: Wed, 19 Jun 2024 05:55:01 +0000

commit fa4d026737a47cd1d66ffb797a29150b4453aa9f
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 18 15:12:44 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 18 15:12:44 2024 +0200

    x86/Intel: unlock CPUID earlier for the BSP
    
    Intel CPUs have a MSR bit to limit CPUID enumeration to leaf two. If
    this bit is set by the BIOS then CPUID evaluation does not work when
    data from any leaf greater than two is needed; early_cpu_init() in
    particular wants to collect leaf 7 data.
    
    Cure this by unlocking CPUID right before evaluating anything which
    depends on the maximum CPUID leaf being greater than two.
    
    Inspired by (and description cloned from) Linux commit 0c2f6d04619e
    ("x86/topology/intel: Unlock CPUID before evaluating anything").
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/cpu/common.c |  3 ++-
 xen/arch/x86/cpu/cpu.h    |  2 ++
 xen/arch/x86/cpu/intel.c  | 29 +++++++++++++++++------------
 3 files changed, 21 insertions(+), 13 deletions(-)

diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c
index 28d7f34c4d..ff4cd22897 100644
--- a/xen/arch/x86/cpu/common.c
+++ b/xen/arch/x86/cpu/common.c
@@ -336,7 +336,8 @@ void __init early_cpu_init(bool verbose)
 
 	c->x86_vendor = x86_cpuid_lookup_vendor(ebx, ecx, edx);
 	switch (c->x86_vendor) {
-	case X86_VENDOR_INTEL:    actual_cpu = intel_cpu_dev;    break;
+	case X86_VENDOR_INTEL:    intel_unlock_cpuid_leaves(c);
+				  actual_cpu = intel_cpu_dev;    break;
 	case X86_VENDOR_AMD:      actual_cpu = amd_cpu_dev;      break;
 	case X86_VENDOR_CENTAUR:  actual_cpu = centaur_cpu_dev;  break;
 	case X86_VENDOR_SHANGHAI: actual_cpu = shanghai_cpu_dev; break;
diff --git a/xen/arch/x86/cpu/cpu.h b/xen/arch/x86/cpu/cpu.h
index e3d06278b3..8be65e975a 100644
--- a/xen/arch/x86/cpu/cpu.h
+++ b/xen/arch/x86/cpu/cpu.h
@@ -24,3 +24,5 @@ void amd_init_lfence(struct cpuinfo_x86 *c);
 void amd_init_ssbd(const struct cpuinfo_x86 *c);
 void amd_init_spectral_chicken(void);
 void detect_zen2_null_seg_behaviour(void);
+
+void intel_unlock_cpuid_leaves(struct cpuinfo_x86 *c);
diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c
index ce7a77a867..af56e57bd8 100644
--- a/xen/arch/x86/cpu/intel.c
+++ b/xen/arch/x86/cpu/intel.c
@@ -303,10 +303,24 @@ static void __init noinline intel_init_levelling(void)
 		ctxt_switch_masking = intel_ctxt_switch_masking;
 }
 
-static void cf_check early_init_intel(struct cpuinfo_x86 *c)
+/* Unmask CPUID levels if masked. */
+void intel_unlock_cpuid_leaves(struct cpuinfo_x86 *c)
 {
-	u64 misc_enable, disable;
+	uint64_t misc_enable, disable;
+
+	rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
+
+	disable = misc_enable & MSR_IA32_MISC_ENABLE_LIMIT_CPUID;
+	if (disable) {
+		wrmsrl(MSR_IA32_MISC_ENABLE, misc_enable & ~disable);
+		bootsym(trampoline_misc_enable_off) |= disable;
+		c->cpuid_level = cpuid_eax(0);
+		printk(KERN_INFO "revised cpuid level: %u\n", c->cpuid_level);
+	}
+}
 
+static void cf_check early_init_intel(struct cpuinfo_x86 *c)
+{
 	/* Netburst reports 64 bytes clflush size, but does IO in 128 bytes */
 	if (c->x86 == 15 && c->x86_cache_alignment == 64)
 		c->x86_cache_alignment = 128;
@@ -315,16 +329,7 @@ static void cf_check early_init_intel(struct cpuinfo_x86 *c)
 	    bootsym(trampoline_misc_enable_off) & MSR_IA32_MISC_ENABLE_XD_DISABLE)
 		printk(KERN_INFO "re-enabled NX (Execute Disable) protection\n");
 
-	/* Unmask CPUID levels and NX if masked: */
-	rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
-
-	disable = misc_enable & MSR_IA32_MISC_ENABLE_LIMIT_CPUID;
-	if (disable) {
-		wrmsrl(MSR_IA32_MISC_ENABLE, misc_enable & ~disable);
-		bootsym(trampoline_misc_enable_off) |= disable;
-		printk(KERN_INFO "revised cpuid level: %d\n",
-		       cpuid_eax(0));
-	}
+	intel_unlock_cpuid_leaves(c);
 
 	/* CPUID workaround for Intel 0F33/0F34 CPU */
 	if (boot_cpu_data.x86 == 0xF && boot_cpu_data.x86_model == 3 &&
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/irq: deal with old_cpu_mask for interrupts in movement in fixup_irqs()
Message-Id: <E1sJoHn-0005Hn-O1@xenbits.xenproject.org>
Date: Wed, 19 Jun 2024 05:55:11 +0000

commit 817d1cd627be668c358d038f0fadbf7d24d417d3
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Tue Jun 18 15:14:49 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 18 15:14:49 2024 +0200

    x86/irq: deal with old_cpu_mask for interrupts in movement in fixup_irqs()
    
    Given the current logic it's possible for ->arch.old_cpu_mask to get out of
    sync: if a CPU set in old_cpu_mask is offlined and then onlined
    again without old_cpu_mask having been updated the data in the mask will no
    longer be accurate, as when brought back online the CPU will no longer have
    old_vector configured to handle the old interrupt source.
    
    If there's an interrupt movement in progress, and the to be offlined CPU (which
    is the call context) is in the old_cpu_mask, clear it and update the mask, so
    it doesn't contain stale data.
    
    Note that when the system is going down fixup_irqs() will be called by
    smp_send_stop() from CPU 0 with a mask with only CPU 0 on it, effectively
    asking to move all interrupts to the current caller (CPU 0) which is the only
    CPU to remain online.  In that case we don't care to migrate interrupts that
    are in the process of being moved, as it's likely we won't be able to move all
    interrupts to CPU 0 due to vector shortage anyway.
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/irq.c | 29 ++++++++++++++++++++++++++++-
 1 file changed, 28 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index 263e502bc0..d305aed317 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2526,7 +2526,7 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
     for ( irq = 0; irq < nr_irqs; irq++ )
     {
         bool break_affinity = false, set_affinity = true;
-        unsigned int vector;
+        unsigned int vector, cpu = smp_processor_id();
         cpumask_t *affinity = this_cpu(scratch_cpumask);
 
         if ( irq == 2 )
@@ -2569,6 +2569,33 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
                                affinity);
         }
 
+        if ( desc->arch.move_in_progress &&
+             /*
+              * Only attempt to adjust the mask if the current CPU is going
+              * offline, otherwise the whole system is going down and leaving
+              * stale data in the masks is fine.
+              */
+             !cpu_online(cpu) &&
+             cpumask_test_cpu(cpu, desc->arch.old_cpu_mask) )
+        {
+            /*
+             * This CPU is going offline, remove it from ->arch.old_cpu_mask
+             * and possibly release the old vector if the old mask becomes
+             * empty.
+             *
+             * Note cleaning ->arch.old_cpu_mask is required if the CPU is
+             * brought offline and then online again, as when re-onlined the
+             * per-cpu vector table will no longer have ->arch.old_vector
+             * setup, and hence ->arch.old_cpu_mask would be stale.
+             */
+            cpumask_clear_cpu(cpu, desc->arch.old_cpu_mask);
+            if ( cpumask_empty(desc->arch.old_cpu_mask) )
+            {
+                desc->arch.move_in_progress = 0;
+                release_old_vec(desc);
+            }
+        }
+
         /*
          * Avoid shuffling the interrupt around as long as current target CPUs
          * are a subset of the input mask.  What fixup_irqs() cares about is
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/irq: handle moving interrupts in _assign_irq_vector()
Message-Id: <E1sJoHx-0005IE-Rz@xenbits.xenproject.org>
Date: Wed, 19 Jun 2024 05:55:21 +0000

commit 369558924a642bbb0cb731e9a3375958867cb17b
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Tue Jun 18 15:15:10 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 18 15:15:10 2024 +0200

    x86/irq: handle moving interrupts in _assign_irq_vector()
    
    Currently there's logic in fixup_irqs() that attempts to prevent
    _assign_irq_vector() from failing, as fixup_irqs() is required to evacuate all
    interrupts from the CPUs not present in the input mask.  The current logic in
    fixup_irqs() is incomplete, as it doesn't deal with interrupts that have
    move_cleanup_count > 0 and a non-empty ->arch.old_cpu_mask field.
    
    Instead of attempting to fixup the interrupt descriptor in fixup_irqs() so that
    _assign_irq_vector() cannot fail, introduce logic in _assign_irq_vector()
    to deal with interrupts that have either move_{in_progress,cleanup_count} set
    and no remaining online CPUs in ->arch.cpu_mask.
    
    If _assign_irq_vector() is requested to move an interrupt in the state
    described above, first attempt to see if ->arch.old_cpu_mask contains any valid
    CPUs that could be used as fallback, and if that's the case do move the
    interrupt back to the previous destination.  Note this is easier because the
    vector hasn't been released yet, so there's no need to allocate and setup a new
    vector on the destination.
    
    Due to the logic in fixup_irqs() that clears offline CPUs from
    ->arch.old_cpu_mask (and releases the old vector if the mask becomes empty) it
    shouldn't be possible to get into _assign_irq_vector() with
    ->arch.move_{in_progress,cleanup_count} set but no online CPUs in
    ->arch.old_cpu_mask.
    
    However if ->arch.move_{in_progress,cleanup_count} is set and the interrupt has
    also changed affinity, it's possible the members of ->arch.old_cpu_mask are no
    longer part of the affinity set, move the interrupt to a different CPU part of
    the provided mask and keep the current ->arch.old_{cpu_mask,vector} for the
    pending interrupt movement to be completed.
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/irq.c | 97 ++++++++++++++++++++++++++++++++++++++----------------
 1 file changed, 68 insertions(+), 29 deletions(-)

diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index d305aed317..d7f15c38af 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -544,7 +544,58 @@ static int _assign_irq_vector(struct irq_desc *desc, const cpumask_t *mask)
     }
 
     if ( desc->arch.move_in_progress || desc->arch.move_cleanup_count )
-        return -EAGAIN;
+    {
+        /*
+         * If the current destination is online refuse to shuffle.  Retry after
+         * the in-progress movement has finished.
+         */
+        if ( cpumask_intersects(desc->arch.cpu_mask, &cpu_online_map) )
+            return -EAGAIN;
+
+        /*
+         * Due to the logic in fixup_irqs() that clears offlined CPUs from
+         * ->arch.old_cpu_mask it shouldn't be possible to get here with
+         * ->arch.move_{in_progress,cleanup_count} set and no online CPUs in
+         * ->arch.old_cpu_mask.
+         */
+        ASSERT(valid_irq_vector(desc->arch.old_vector));
+        ASSERT(cpumask_intersects(desc->arch.old_cpu_mask, &cpu_online_map));
+
+        if ( cpumask_intersects(desc->arch.old_cpu_mask, mask) )
+        {
+            /*
+             * Fallback to the old destination if moving is in progress and the
+             * current destination is to be offlined.  This is only possible if
+             * the CPUs in old_cpu_mask intersect with the affinity mask passed
+             * in the 'mask' parameter.
+             */
+            desc->arch.vector = desc->arch.old_vector;
+            cpumask_and(desc->arch.cpu_mask, desc->arch.old_cpu_mask, mask);
+
+            /* Undo any possibly done cleanup. */
+            for_each_cpu(cpu, desc->arch.cpu_mask)
+                per_cpu(vector_irq, cpu)[desc->arch.vector] = irq;
+
+            /* Cancel the pending move and release the current vector. */
+            desc->arch.old_vector = IRQ_VECTOR_UNASSIGNED;
+            cpumask_clear(desc->arch.old_cpu_mask);
+            desc->arch.move_in_progress = 0;
+            desc->arch.move_cleanup_count = 0;
+            if ( desc->arch.used_vectors )
+            {
+                ASSERT(test_bit(old_vector, desc->arch.used_vectors));
+                clear_bit(old_vector, desc->arch.used_vectors);
+            }
+
+            return 0;
+        }
+
+        /*
+         * There's an interrupt movement in progress but the destination(s) in
+         * ->arch.old_cpu_mask are not suitable given the 'mask' parameter, go
+         * through the full logic to find a new vector in a suitable CPU.
+         */
+    }
 
     err = -ENOSPC;
 
@@ -600,7 +651,22 @@ next:
         current_vector = vector;
         current_offset = offset;
 
-        if ( valid_irq_vector(old_vector) )
+        if ( desc->arch.move_in_progress || desc->arch.move_cleanup_count )
+        {
+            ASSERT(!cpumask_intersects(desc->arch.cpu_mask, &cpu_online_map));
+            /*
+             * Special case when evacuating an interrupt from a CPU to be
+             * offlined and the interrupt was already in the process of being
+             * moved.  Leave ->arch.old_{vector,cpu_mask} as-is and just
+             * replace ->arch.{cpu_mask,vector} with the new destination.
+             * Cleanup will be done normally for the old fields, just release
+             * the current vector here.
+             */
+            if ( desc->arch.used_vectors &&
+                 !test_and_clear_bit(old_vector, desc->arch.used_vectors) )
+                ASSERT_UNREACHABLE();
+        }
+        else if ( valid_irq_vector(old_vector) )
         {
             cpumask_and(desc->arch.old_cpu_mask, desc->arch.cpu_mask,
                         &cpu_online_map);
@@ -2607,33 +2673,6 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
             continue;
         }
 
-        /*
-         * In order for the affinity adjustment below to be successful, we
-         * need _assign_irq_vector() to succeed. This in particular means
-         * clearing desc->arch.move_in_progress if this would otherwise
-         * prevent the function from succeeding. Since there's no way for the
-         * flag to get cleared anymore when there's no possible destination
-         * left (the only possibility then would be the IRQs enabled window
-         * after this loop), there's then also no race with us doing it here.
-         *
-         * Therefore the logic here and there need to remain in sync.
-         */
-        if ( desc->arch.move_in_progress &&
-             !cpumask_intersects(mask, desc->arch.cpu_mask) )
-        {
-            unsigned int cpu;
-
-            cpumask_and(affinity, desc->arch.old_cpu_mask, &cpu_online_map);
-
-            spin_lock(&vector_lock);
-            for_each_cpu(cpu, affinity)
-                per_cpu(vector_irq, cpu)[desc->arch.old_vector] = ~irq;
-            spin_unlock(&vector_lock);
-
-            release_old_vec(desc);
-            desc->arch.move_in_progress = 0;
-        }
-
         if ( !cpumask_intersects(mask, desc->affinity) )
         {
             break_affinity = true;
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/ubsan: Fix UB in type_descriptor declaration
Message-Id: <E1sJoI7-0005Iq-Vd@xenbits.xenproject.org>
Date: Wed, 19 Jun 2024 05:55:31 +0000

commit bd59af99700f075d06a6d47a16f777c9519928e0
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Jun 17 18:40:32 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Tue Jun 18 14:55:04 2024 +0100

    xen/ubsan: Fix UB in type_descriptor declaration
    
    struct type_descriptor is arranged with a NUL terminated string following the
    kind/info fields.
    
    The only reason this doesn't trip UBSAN detection itself (on more modern
    compilers at least) is because struct type_descriptor is only referenced in
    suppressed regions.
    
    Switch the declaration to be a real flexible member.  No functional change.
    
    Fixes: 00fcf4dd8eb4 ("xen/ubsan: Import ubsan implementation from Linux 4.13")
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/common/ubsan/ubsan.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/common/ubsan/ubsan.h b/xen/common/ubsan/ubsan.h
index a3159040fe..3db42e75b1 100644
--- a/xen/common/ubsan/ubsan.h
+++ b/xen/common/ubsan/ubsan.h
@@ -10,7 +10,7 @@ enum {
 struct type_descriptor {
 	u16 type_kind;
 	u16 type_info;
-	char type_name[1];
+	char type_name[];
 };
 
 struct source_location {
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: static-shmem: fix "gbase/pbase used uninitialized" build failure
Message-Id: <E1sJtjP-00027X-Jh@xenbits.xenproject.org>
Date: Wed, 19 Jun 2024 11:44:03 +0000

commit 988f1c7e1f40f85f5654784e5f702ed54904ca9d
Author:     Michal Orzel <michal.orzel@amd.com>
AuthorDate: Wed Jun 19 08:46:52 2024 +0200
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 19 12:32:27 2024 +0100

    xen/arm: static-shmem: fix "gbase/pbase used uninitialized" build failure
    
    Building Xen with CONFIG_STATIC_SHM=y results in a build failure:
    
    arch/arm/static-shmem.c: In function 'process_shm':
    arch/arm/static-shmem.c:327:41: error: 'gbase' may be used uninitialized [-Werror=maybe-uninitialized]
      327 |         if ( is_domain_direct_mapped(d) && (pbase != gbase) )
    arch/arm/static-shmem.c:305:17: note: 'gbase' was declared here
      305 |         paddr_t gbase, pbase, psize;
    
    This is because the commit cb1ddafdc573 adds a check referencing
    gbase/pbase variables which were not yet assigned a value. Fix it.
    
    Fixes: cb1ddafdc573 ("xen/arm/static-shmem: Static-shmem should be direct-mapped for direct-mapped domains")
    Signed-off-by: Michal Orzel <michal.orzel@amd.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
---
 xen/arch/arm/static-shmem.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/xen/arch/arm/static-shmem.c b/xen/arch/arm/static-shmem.c
index c434b96e62..cd48d2896b 100644
--- a/xen/arch/arm/static-shmem.c
+++ b/xen/arch/arm/static-shmem.c
@@ -324,12 +324,6 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo,
             printk("%pd: static shared memory bank not found: '%s'", d, shm_id);
             return -ENOENT;
         }
-        if ( is_domain_direct_mapped(d) && (pbase != gbase) )
-        {
-            printk("%pd: physical address 0x%"PRIpaddr" and guest address 0x%"PRIpaddr" are not direct-mapped.\n",
-                   d, pbase, gbase);
-            return -EINVAL;
-        }
 
         pbase = boot_shm_bank->start;
         psize = boot_shm_bank->size;
@@ -353,6 +347,13 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo,
             /* guest phys address is after host phys address */
             gbase = dt_read_paddr(cells + addr_cells, addr_cells);
 
+            if ( is_domain_direct_mapped(d) && (pbase != gbase) )
+            {
+                printk("%pd: physical address 0x%"PRIpaddr" and guest address 0x%"PRIpaddr" are not direct-mapped.\n",
+                       d, pbase, gbase);
+                return -EINVAL;
+            }
+
             for ( i = 0; i < PFN_DOWN(psize); i++ )
                 if ( !mfn_valid(mfn_add(maddr_to_mfn(pbase), i)) )
                 {
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] Revert "docs/features/dom0less: Update the late XenStore init protocol"
Message-Id: <E1sJtu3-0002gZ-8j@xenbits.xenproject.org>
Date: Wed, 19 Jun 2024 11:55:03 +0000

commit 443c488a0b3676b5c001069d14890cd8d0ec2c1d
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Wed Jun 19 12:47:28 2024 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 19 12:48:44 2024 +0100

    Revert "docs/features/dom0less: Update the late XenStore init protocol"
    
    Michal reported that the gitlab CI is failing because of this series
    [1].
    
    This reverts commit 53c5c99e8744495395c1274595d6ca55947d1d6a.
    
    [1] https://gitlab.com/xen-project/xen/-/pipelines/1338067978
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
---
 docs/features/dom0less.pandoc | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/docs/features/dom0less.pandoc b/docs/features/dom0less.pandoc
index 8b178edee0..725afa0558 100644
--- a/docs/features/dom0less.pandoc
+++ b/docs/features/dom0less.pandoc
@@ -110,10 +110,9 @@ hotplug PV drivers to dom0less guests. E.g. xl network-attach domU.
 The implementation works as follows:
 - Xen allocates the xenstore event channel for each dom0less domU that
   has the "xen,enhanced" property, and sets HVM_PARAM_STORE_EVTCHN
-- Xen allocates the xenstore page and sets HVM_PARAM_STORE_PFN as well
-  as the connection status to XENSTORE_RECONNECT.
-- Dom0less domU kernels check that HVM_PARAM_STORE_PFN is set to
-  ~0ULL (invalid) or the connection status is *not* XENSTORE_CONNECTED.
+- Xen does *not* allocate the xenstore page and sets HVM_PARAM_STORE_PFN
+  to ~0ULL (invalid)
+- Dom0less domU kernels check that HVM_PARAM_STORE_PFN is set to invalid
     - Old kernels will continue without xenstore support (Note: some old
       buggy kernels might crash because they don't check the validity of
       HVM_PARAM_STORE_PFN before using it! Disable "xen,enhanced" in
@@ -122,14 +121,13 @@ The implementation works as follows:
       channel (HVM_PARAM_STORE_EVTCHN) before continuing with the
       initialization
 - Once dom0 is booted, init-dom0less is executed:
-    - it gets the xenstore shared page from HVM_PARAM_STORE_PFN
+    - it allocates the xenstore shared page and sets HVM_PARAM_STORE_PFN
     - it calls xs_introduce_domain
 - Xenstored notices the new domain, initializes interfaces as usual, and
   sends an event channel notification to the domain using the xenstore
   event channel (HVM_PARAM_STORE_EVTCHN)
 - The Linux domU kernel receives the event channel notification, checks
-  HVM_PARAM_STORE_PFN and the connection status again and continue with
-  the initialization
+  HVM_PARAM_STORE_PFN again and continue with the initialization
 
 
 Limitations
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] Revert "xen/arm: Alloc XenStore page for Dom0less DomUs from hypervisor"
Message-Id: <E1sJtuD-0002h6-Bv@xenbits.xenproject.org>
Date: Wed, 19 Jun 2024 11:55:13 +0000

commit efa6e9f15ba943d154e8d7b29384581915b2aacd
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Wed Jun 19 12:48:09 2024 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 19 12:48:47 2024 +0100

    Revert "xen/arm: Alloc XenStore page for Dom0less DomUs from hypervisor"
    
    Michal reported that the gitlab CI is failing because of this series
    [1].
    
    This reverts commit 6f9d90ea943b5e0c5d11a71090c49bbfd79e97ea.
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
---
 tools/helpers/init-dom0less.c | 58 ++++++++++++++++++++++++++++++++-----------
 xen/arch/arm/dom0less-build.c | 58 +------------------------------------------
 2 files changed, 45 insertions(+), 71 deletions(-)

diff --git a/tools/helpers/init-dom0less.c b/tools/helpers/init-dom0less.c
index 325527f040..fee93459c4 100644
--- a/tools/helpers/init-dom0less.c
+++ b/tools/helpers/init-dom0less.c
@@ -16,18 +16,30 @@
 
 #include "init-dom-json.h"
 
+#define XENSTORE_PFN_OFFSET 1
 #define STR_MAX_LENGTH 128
 
-static int get_xs_page(struct xc_interface_core *xch, libxl_dominfo *info,
-                       uint64_t *xenstore_pfn)
+static int alloc_xs_page(struct xc_interface_core *xch,
+                         libxl_dominfo *info,
+                         uint64_t *xenstore_pfn)
 {
     int rc;
+    const xen_pfn_t base = GUEST_MAGIC_BASE >> XC_PAGE_SHIFT;
+    xen_pfn_t p2m = (GUEST_MAGIC_BASE >> XC_PAGE_SHIFT) + XENSTORE_PFN_OFFSET;
 
-    rc = xc_hvm_param_get(xch, info->domid, HVM_PARAM_STORE_PFN, xenstore_pfn);
-    if (rc < 0) {
-        fprintf(stderr,"Failed to get HVM_PARAM_STORE_PFN\n");
-        return 1;
-    }
+    rc = xc_domain_setmaxmem(xch, info->domid,
+                             info->max_memkb + (XC_PAGE_SIZE/1024));
+    if (rc < 0)
+        return rc;
+
+    rc = xc_domain_populate_physmap_exact(xch, info->domid, 1, 0, 0, &p2m);
+    if (rc < 0)
+        return rc;
+
+    *xenstore_pfn = base + XENSTORE_PFN_OFFSET;
+    rc = xc_clear_domain_page(xch, info->domid, *xenstore_pfn);
+    if (rc < 0)
+        return rc;
 
     return 0;
 }
@@ -88,7 +100,6 @@ static bool do_xs_write_vm(struct xs_handle *xsh, xs_transaction_t t,
  */
 static int create_xenstore(struct xs_handle *xsh,
                            libxl_dominfo *info, libxl_uuid uuid,
-                           uint64_t xenstore_pfn,
                            evtchn_port_t xenstore_port)
 {
     domid_t domid;
@@ -134,7 +145,8 @@ static int create_xenstore(struct xs_handle *xsh,
     rc = snprintf(target_memkb_str, STR_MAX_LENGTH, "%"PRIu64, info->current_memkb);
     if (rc < 0 || rc >= STR_MAX_LENGTH)
         return rc;
-    rc = snprintf(ring_ref_str, STR_MAX_LENGTH, "%"PRIu64, xenstore_pfn);
+    rc = snprintf(ring_ref_str, STR_MAX_LENGTH, "%lld",
+                  (GUEST_MAGIC_BASE >> XC_PAGE_SHIFT) + XENSTORE_PFN_OFFSET);
     if (rc < 0 || rc >= STR_MAX_LENGTH)
         return rc;
     rc = snprintf(xenstore_port_str, STR_MAX_LENGTH, "%u", xenstore_port);
@@ -218,6 +230,7 @@ static int init_domain(struct xs_handle *xsh,
     libxl_uuid uuid;
     uint64_t xenstore_evtchn, xenstore_pfn;
     int rc;
+    struct xenstore_domain_interface *intf;
 
     printf("Init dom0less domain: %u\n", info->domid);
 
@@ -232,11 +245,20 @@ static int init_domain(struct xs_handle *xsh,
     if (!xenstore_evtchn)
         return 0;
 
-    /* Get xenstore page */
-    if (get_xs_page(xch, info, &xenstore_pfn) != 0) {
-        fprintf(stderr,"Error on getting xenstore page\n");
+    /* Alloc xenstore page */
+    if (alloc_xs_page(xch, info, &xenstore_pfn) != 0) {
+        printf("Error on alloc magic pages\n");
+        return 1;
+    }
+
+    intf = xenforeignmemory_map(xfh, info->domid, PROT_READ | PROT_WRITE, 1,
+                                &xenstore_pfn, NULL);
+    if (!intf) {
+        printf("Error mapping xenstore page\n");
         return 1;
     }
+    intf->connection = XENSTORE_RECONNECT;
+    xenforeignmemory_unmap(xfh, intf, 1);
 
     rc = xc_dom_gnttab_seed(xch, info->domid, true,
                             (xen_pfn_t)-1, xenstore_pfn, 0, 0);
@@ -250,11 +272,19 @@ static int init_domain(struct xs_handle *xsh,
     if (rc)
         err(1, "gen_stub_json_config");
 
-    rc = create_xenstore(xsh, info, uuid, xenstore_pfn, xenstore_evtchn);
+    /* Now everything is ready: set HVM_PARAM_STORE_PFN */
+    rc = xc_hvm_param_set(xch, info->domid, HVM_PARAM_STORE_PFN,
+                          xenstore_pfn);
+    if (rc < 0)
+        return rc;
+
+    rc = create_xenstore(xsh, info, uuid, xenstore_evtchn);
     if (rc)
         err(1, "writing to xenstore");
 
-    rc = xs_introduce_domain(xsh, info->domid, xenstore_pfn, xenstore_evtchn);
+    rc = xs_introduce_domain(xsh, info->domid,
+            (GUEST_MAGIC_BASE >> XC_PAGE_SHIFT) + XENSTORE_PFN_OFFSET,
+            xenstore_evtchn);
     if (!rc)
         err(1, "xs_introduce_domain");
     return 0;
diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
index ef2ba85ff4..f919d3acf9 100644
--- a/xen/arch/arm/dom0less-build.c
+++ b/xen/arch/arm/dom0less-build.c
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 #include <xen/device_tree.h>
-#include <xen/domain_page.h>
 #include <xen/err.h>
 #include <xen/event.h>
 #include <xen/grant_table.h>
@@ -11,8 +10,6 @@
 #include <xen/sizes.h>
 #include <xen/vmap.h>
 
-#include <public/io/xs_wire.h>
-
 #include <asm/arm64/sve.h>
 #include <asm/dom0less-build.h>
 #include <asm/domain_build.h>
@@ -742,56 +739,6 @@ static int __init alloc_xenstore_evtchn(struct domain *d)
     return 0;
 }
 
-#define XENSTORE_PFN_OFFSET 1
-static int __init alloc_xenstore_page(struct domain *d)
-{
-    struct page_info *xenstore_pg;
-    struct xenstore_domain_interface *interface;
-    mfn_t mfn;
-    gfn_t gfn;
-    int rc;
-
-    if ( (UINT_MAX - d->max_pages) < 1 )
-    {
-        printk(XENLOG_ERR "%pd: Over-allocation for d->max_pages by 1 page.\n",
-               d);
-        return -EINVAL;
-    }
-    d->max_pages += 1;
-    xenstore_pg = alloc_domheap_page(d, MEMF_bits(32));
-    if ( xenstore_pg == NULL && is_64bit_domain(d) )
-        xenstore_pg = alloc_domheap_page(d, 0);
-    if ( xenstore_pg == NULL )
-        return -ENOMEM;
-
-    mfn = page_to_mfn(xenstore_pg);
-    if ( !mfn_x(mfn) )
-    {
-        free_domheap_page(xenstore_pg);
-        return -ENOMEM;
-    }
-
-    if ( !is_domain_direct_mapped(d) )
-        gfn = gaddr_to_gfn(GUEST_MAGIC_BASE +
-                           (XENSTORE_PFN_OFFSET << PAGE_SHIFT));
-    else
-        gfn = gaddr_to_gfn(mfn_to_maddr(mfn));
-
-    rc = guest_physmap_add_page(d, gfn, mfn, 0);
-    if ( rc )
-    {
-        free_domheap_page(xenstore_pg);
-        return rc;
-    }
-
-    d->arch.hvm.params[HVM_PARAM_STORE_PFN] = gfn_x(gfn);
-    interface = map_domain_page(mfn);
-    interface->connection = XENSTORE_RECONNECT;
-    unmap_domain_page(interface);
-
-    return 0;
-}
-
 static int __init construct_domU(struct domain *d,
                                  const struct dt_device_node *node)
 {
@@ -892,10 +839,7 @@ static int __init construct_domU(struct domain *d,
         rc = alloc_xenstore_evtchn(d);
         if ( rc < 0 )
             return rc;
-
-        rc = alloc_xenstore_page(d);
-        if ( rc < 0 )
-            return rc;
+        d->arch.hvm.params[HVM_PARAM_STORE_PFN] = ~0ULL;
     }
 
     return rc;
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/irq: Address MISRA Rule 8.3 violation
Message-Id: <E1sJu9X-00044V-MB@xenbits.xenproject.org>
Date: Wed, 19 Jun 2024 12:11:03 +0000

commit 82f480944718d9e8340a6ac1af41ece7851115bf
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Tue Jun 18 13:48:35 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Wed Jun 19 13:00:06 2024 +0100

    xen/irq: Address MISRA Rule 8.3 violation
    
    When centralising irq_ack_none(), different architectures had different names
    for the parameter.  As it's type is struct irq_desc *, it should be named
    desc.  Make this consistent.
    
    No functional change.
    
    Fixes: 8aeda4a241ab ("arch/irq: Make irq_ack_none() mandatory")
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/irq.c    | 4 ++--
 xen/include/xen/irq.h | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c
index c60502444c..6b89f64fd1 100644
--- a/xen/arch/arm/irq.c
+++ b/xen/arch/arm/irq.c
@@ -31,9 +31,9 @@ struct irq_guest
     unsigned int virq;
 };
 
-void irq_ack_none(struct irq_desc *irq)
+void irq_ack_none(struct irq_desc *desc)
 {
-    printk("unexpected IRQ trap at irq %02x\n", irq->irq);
+    printk("unexpected IRQ trap at irq %02x\n", desc->irq);
 }
 
 void irq_end_none(struct irq_desc *irq)
diff --git a/xen/include/xen/irq.h b/xen/include/xen/irq.h
index adf33547d2..580ae37e74 100644
--- a/xen/include/xen/irq.h
+++ b/xen/include/xen/irq.h
@@ -134,7 +134,7 @@ void cf_check irq_actor_none(struct irq_desc *desc);
  * irq_ack_none() must be provided by the architecture.
  * irq_end_none() is optional, and opted into using a define.
  */
-void cf_check irq_ack_none(struct irq_desc *irq);
+void cf_check irq_ack_none(struct irq_desc *desc);
 
 /*
  * Per-cpu interrupted context register state - the inner-most interrupt frame
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arch: Centralise __read_mostly and __ro_after_init
Message-Id: <E1sJu9h-00045C-Ph@xenbits.xenproject.org>
Date: Wed, 19 Jun 2024 12:11:13 +0000

commit aba98c8d671bd290e978ec154d0baf042e093a65
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Fri Jun 14 13:05:40 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Wed Jun 19 13:00:06 2024 +0100

    xen/arch: Centralise __read_mostly and __ro_after_init
    
    These living in cache.h is inherited from Linux, but cache.h is not a terribly
    appropriately location for them to live.
    
    __read_mostly is an optimisation related to data placement in order to avoid
    having shared data in cachelines that are likely to be written to, but it
    really is just a section of the linked image separating data by usage
    patterns; it has nothing to do with cache sizes or flushing logic.
    
    Worse, __ro_after_init was only in xen/cache.h because __read_mostly was in
    arch/cache.h, and has literally nothing whatsoever to do with caches.
    
    Move the definitions into xen/sections.h, which in particular means that
    RISC-V doesn't need to repeat the problematic pattern.  Take the opportunity
    to provide a short descriptions of what these are used for.
    
    For now, leave TODO comments next to the other identical definitions.  It
    turns out that unpicking cache.h is more complicated than it appears because a
    number of files use it for transitive dependencies.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/include/asm/cache.h |  1 +
 xen/arch/ppc/include/asm/cache.h |  1 +
 xen/arch/x86/include/asm/cache.h |  1 +
 xen/include/xen/cache.h          |  1 +
 xen/include/xen/sections.h       | 21 +++++++++++++++++++++
 5 files changed, 25 insertions(+)

diff --git a/xen/arch/arm/include/asm/cache.h b/xen/arch/arm/include/asm/cache.h
index 240b6ae0ea..029b2896fb 100644
--- a/xen/arch/arm/include/asm/cache.h
+++ b/xen/arch/arm/include/asm/cache.h
@@ -6,6 +6,7 @@
 #define L1_CACHE_SHIFT  (CONFIG_ARM_L1_CACHE_SHIFT)
 #define L1_CACHE_BYTES  (1 << L1_CACHE_SHIFT)
 
+/* TODO: Phase out the use of this via cache.h */
 #define __read_mostly __section(".data.read_mostly")
 
 #endif
diff --git a/xen/arch/ppc/include/asm/cache.h b/xen/arch/ppc/include/asm/cache.h
index 0d7323d789..13c0bf3242 100644
--- a/xen/arch/ppc/include/asm/cache.h
+++ b/xen/arch/ppc/include/asm/cache.h
@@ -3,6 +3,7 @@
 #ifndef _ASM_PPC_CACHE_H
 #define _ASM_PPC_CACHE_H
 
+/* TODO: Phase out the use of this via cache.h */
 #define __read_mostly __section(".data.read_mostly")
 
 #endif /* _ASM_PPC_CACHE_H */
diff --git a/xen/arch/x86/include/asm/cache.h b/xen/arch/x86/include/asm/cache.h
index e4770efb22..956c05493e 100644
--- a/xen/arch/x86/include/asm/cache.h
+++ b/xen/arch/x86/include/asm/cache.h
@@ -9,6 +9,7 @@
 #define L1_CACHE_SHIFT	(CONFIG_X86_L1_CACHE_SHIFT)
 #define L1_CACHE_BYTES	(1 << L1_CACHE_SHIFT)
 
+/* TODO: Phase out the use of this via cache.h */
 #define __read_mostly __section(".data.read_mostly")
 
 #ifndef __ASSEMBLY__
diff --git a/xen/include/xen/cache.h b/xen/include/xen/cache.h
index f52a0aedf7..55456823c5 100644
--- a/xen/include/xen/cache.h
+++ b/xen/include/xen/cache.h
@@ -15,6 +15,7 @@
 #define __cacheline_aligned __attribute__((__aligned__(SMP_CACHE_BYTES)))
 #endif
 
+/* TODO: Phase out the use of this via cache.h */
 #define __ro_after_init __section(".data.ro_after_init")
 
 #endif /* __LINUX_CACHE_H */
diff --git a/xen/include/xen/sections.h b/xen/include/xen/sections.h
index b6cb5604c2..f2fac8d7fa 100644
--- a/xen/include/xen/sections.h
+++ b/xen/include/xen/sections.h
@@ -3,9 +3,30 @@
 #ifndef __XEN_SECTIONS_H__
 #define __XEN_SECTIONS_H__
 
+#include <xen/compiler.h>
+
 /* SAF-0-safe */
 extern char __init_begin[], __init_end[];
 
+/*
+ * Some data is expected to be written rarely (if at all).
+ *
+ * For performance reasons is it helpful to group such data in the build, to
+ * avoid the linker placing it adjacent to often-written data.
+ */
+#define __read_mostly __section(".data.read_mostly")
+
+/*
+ * Some data should be chosen during boot and be immutable thereafter.
+ *
+ * Variables annotated with __ro_after_init will become read-only after boot
+ * and suffer a runtime access fault if modified.
+ *
+ * For architectures/platforms which haven't implemented support, these
+ * variables will be treated as regular mutable data.
+ */
+#define __ro_after_init __section(".data.ro_after_init")
+
 #endif /* !__XEN_SECTIONS_H__ */
 /*
  * Local variables:
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/xstate: Fix initialisation of XSS cache
Message-Id: <E1sJu9r-00047K-TG@xenbits.xenproject.org>
Date: Wed, 19 Jun 2024 12:11:23 +0000

commit 9e6dbbe8bf400aacb99009ddffa91d2a0c312b39
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed May 22 17:23:54 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Wed Jun 19 13:00:06 2024 +0100

    x86/xstate: Fix initialisation of XSS cache
    
    The clobbering of this_cpu(xcr0) and this_cpu(xss) to architecturally invalid
    values is to force the subsequent set_xcr0() and set_msr_xss() to reload the
    hardware register.
    
    While XCR0 is reloaded in xstate_init(), MSR_XSS isn't.  This causes
    get_msr_xss() to return the invalid value, and logic of the form:
    
        old = get_msr_xss();
        set_msr_xss(new);
        ...
        set_msr_xss(old);
    
    to try and restore said invalid value.
    
    The architecturally invalid value must be purged from the cache, meaning the
    hardware register must be written at least once.  This in turn highlights that
    the invalid value must only be used in the case that the hardware register is
    available.
    
    Fixes: f7f4a523927f ("x86/xstate: reset cached register values on resume")
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/xstate.c | 18 +++++++++++-------
 1 file changed, 11 insertions(+), 7 deletions(-)

diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c
index 99cedb4f5e..7578814796 100644
--- a/xen/arch/x86/xstate.c
+++ b/xen/arch/x86/xstate.c
@@ -641,13 +641,6 @@ void xstate_init(struct cpuinfo_x86 *c)
         return;
     }
 
-    /*
-     * Zap the cached values to make set_xcr0() and set_msr_xss() really
-     * write it.
-     */
-    this_cpu(xcr0) = 0;
-    this_cpu(xss) = ~0;
-
     cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
     feature_mask = (((u64)edx << 32) | eax) & XCNTXT_MASK;
     BUG_ON(!valid_xcr0(feature_mask));
@@ -657,8 +650,19 @@ void xstate_init(struct cpuinfo_x86 *c)
      * Set CR4_OSXSAVE and run "cpuid" to get xsave_cntxt_size.
      */
     set_in_cr4(X86_CR4_OSXSAVE);
+
+    /*
+     * Zap the cached values to make set_xcr0() and set_msr_xss() really write
+     * the hardware register.
+     */
+    this_cpu(xcr0) = 0;
     if ( !set_xcr0(feature_mask) )
         BUG();
+    if ( cpu_has_xsaves )
+    {
+        this_cpu(xss) = ~0;
+        set_msr_xss(0);
+    }
 
     if ( bsp )
     {
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/xstate: Cross-check dynamic XSTATE sizes at boot
Message-Id: <E1sJuA2-00048E-08@xenbits.xenproject.org>
Date: Wed, 19 Jun 2024 12:11:34 +0000

commit d31a111940de5431c8bf465b1d38b89f1130a24b
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Fri Feb 21 17:56:57 2020 +0000
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Wed Jun 19 13:00:06 2024 +0100

    x86/xstate: Cross-check dynamic XSTATE sizes at boot
    
    Right now, xstate_ctxt_size() performs a cross-check of size with CPUID in for
    every call.  This is expensive, being used for domain create/migrate, as well
    as to service certain guest CPUID instructions.
    
    Instead, arrange to check the sizes once at boot.  See the code comments for
    details.  Right now, it just checks hardware against the algorithm
    expectations.  Later patches will cross-check Xen's XSTATE calculations too.
    
    Introduce more X86_XCR0_* and X86_XSS_* constants CPUID bits.  This is to
    maximise coverage in the sanity check, even if we don't expect to
    use/virtualise some of these features any time soon.  Leave HDC and HWP alone
    for now; we don't have CPUID bits from them stored nicely.
    
    Only perform the cross-checks when SELF_TESTS are active.  It's only
    developers or new hardware liable to trip these checks, and Xen at least
    tracks "maximum value ever seen in xcr0" for the lifetime of the VM, which we
    don't want to be tickling in the general case.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/include/asm/x86-defns.h        |  25 +++-
 xen/arch/x86/xstate.c                       | 170 ++++++++++++++++++++++++++++
 xen/include/public/arch-x86/cpufeatureset.h |   3 +
 3 files changed, 197 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/include/asm/x86-defns.h b/xen/arch/x86/include/asm/x86-defns.h
index 48d7a3b7af..d7602ab225 100644
--- a/xen/arch/x86/include/asm/x86-defns.h
+++ b/xen/arch/x86/include/asm/x86-defns.h
@@ -77,7 +77,7 @@
 #define X86_CR4_PKS        0x01000000 /* Protection Key Supervisor */
 
 /*
- * XSTATE component flags in XCR0
+ * XSTATE component flags in XCR0 | MSR_XSS
  */
 #define X86_XCR0_FP_POS           0
 #define X86_XCR0_FP               (1ULL << X86_XCR0_FP_POS)
@@ -95,11 +95,34 @@
 #define X86_XCR0_ZMM              (1ULL << X86_XCR0_ZMM_POS)
 #define X86_XCR0_HI_ZMM_POS       7
 #define X86_XCR0_HI_ZMM           (1ULL << X86_XCR0_HI_ZMM_POS)
+#define X86_XSS_PROC_TRACE        (_AC(1, ULL) <<  8)
 #define X86_XCR0_PKRU_POS         9
 #define X86_XCR0_PKRU             (1ULL << X86_XCR0_PKRU_POS)
+#define X86_XSS_PASID             (_AC(1, ULL) << 10)
+#define X86_XSS_CET_U             (_AC(1, ULL) << 11)
+#define X86_XSS_CET_S             (_AC(1, ULL) << 12)
+#define X86_XSS_HDC               (_AC(1, ULL) << 13)
+#define X86_XSS_UINTR             (_AC(1, ULL) << 14)
+#define X86_XSS_LBR               (_AC(1, ULL) << 15)
+#define X86_XSS_HWP               (_AC(1, ULL) << 16)
+#define X86_XCR0_TILE_CFG         (_AC(1, ULL) << 17)
+#define X86_XCR0_TILE_DATA        (_AC(1, ULL) << 18)
 #define X86_XCR0_LWP_POS          62
 #define X86_XCR0_LWP              (1ULL << X86_XCR0_LWP_POS)
 
+#define X86_XCR0_STATES                                                 \
+    (X86_XCR0_FP | X86_XCR0_SSE | X86_XCR0_YMM | X86_XCR0_BNDREGS |     \
+     X86_XCR0_BNDCSR | X86_XCR0_OPMASK | X86_XCR0_ZMM |                 \
+     X86_XCR0_HI_ZMM | X86_XCR0_PKRU | X86_XCR0_TILE_CFG |              \
+     X86_XCR0_TILE_DATA |                                               \
+     X86_XCR0_LWP)
+
+#define X86_XSS_STATES                                                  \
+    (X86_XSS_PROC_TRACE | X86_XSS_PASID | X86_XSS_CET_U |               \
+     X86_XSS_CET_S | X86_XSS_HDC | X86_XSS_UINTR | X86_XSS_LBR |        \
+     X86_XSS_HWP |                                                      \
+     0)
+
 /*
  * Debug status flags in DR6.
  *
diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c
index 7578814796..408d9dd108 100644
--- a/xen/arch/x86/xstate.c
+++ b/xen/arch/x86/xstate.c
@@ -604,9 +604,176 @@ static bool valid_xcr0(uint64_t xcr0)
     if ( !(xcr0 & X86_XCR0_BNDREGS) != !(xcr0 & X86_XCR0_BNDCSR) )
         return false;
 
+    /* TILECFG and TILEDATA must be the same. */
+    if ( !(xcr0 & X86_XCR0_TILE_CFG) != !(xcr0 & X86_XCR0_TILE_DATA) )
+        return false;
+
     return true;
 }
 
+struct xcheck_state {
+    uint64_t states;
+    uint32_t uncomp_size;
+    uint32_t comp_size;
+};
+
+static void __init check_new_xstate(struct xcheck_state *s, uint64_t new)
+{
+    uint32_t hw_size;
+
+    BUILD_BUG_ON(X86_XCR0_STATES & X86_XSS_STATES);
+
+    BUG_ON(new <= s->states); /* States strictly increase by index. */
+    BUG_ON(s->states & new);  /* States only accumulate. */
+    BUG_ON(!valid_xcr0(s->states | new)); /* Xen thinks it's a good value. */
+    BUG_ON(new & ~(X86_XCR0_STATES | X86_XSS_STATES)); /* Known state. */
+    BUG_ON((new & X86_XCR0_STATES) &&
+           (new & X86_XSS_STATES)); /* User or supervisor, not both. */
+
+    s->states |= new;
+    if ( new & X86_XCR0_STATES )
+    {
+        if ( !set_xcr0(s->states & X86_XCR0_STATES) )
+            BUG();
+    }
+    else
+        set_msr_xss(s->states & X86_XSS_STATES);
+
+    /*
+     * Check the uncompressed size.  First ask hardware.
+     */
+    hw_size = cpuid_count_ebx(0xd, 0);
+
+    if ( new & X86_XSS_STATES )
+    {
+        /*
+         * Supervisor states don't exist in an uncompressed image, so check
+         * that the uncompressed size doesn't change.  Otherwise...
+         */
+        if ( hw_size != s->uncomp_size )
+            panic("XSTATE 0x%016"PRIx64", new sup bits {%63pbl}, uncompressed hw size %#x != prev size %#x\n",
+                  s->states, &new, hw_size, s->uncomp_size);
+    }
+    else
+    {
+        /*
+         * ... some user XSTATEs are out-of-order and fill in prior holes.
+         * The best check we make is that the size never decreases.
+         */
+        if ( hw_size < s->uncomp_size )
+            panic("XSTATE 0x%016"PRIx64", new bits {%63pbl}, uncompressed hw size %#x < prev size %#x\n",
+                  s->states, &new, hw_size, s->uncomp_size);
+    }
+
+    s->uncomp_size = hw_size;
+
+    /*
+     * Check the compressed size, if available.
+     */
+    hw_size = cpuid_count_ebx(0xd, 1);
+
+    if ( cpu_has_xsavec )
+    {
+        /*
+         * All components strictly appear in index order, irrespective of
+         * whether they're user or supervisor.  As each component also has
+         * non-zero size, the accumulated size should strictly increase.
+         */
+        if ( hw_size <= s->comp_size )
+            panic("XSTATE 0x%016"PRIx64", new bits {%63pbl}, compressed hw size %#x <= prev size %#x\n",
+                  s->states, &new, hw_size, s->comp_size);
+
+        s->comp_size = hw_size;
+    }
+    else if ( hw_size ) /* Compressed size reported, but no XSAVEC ? */
+    {
+        static bool once;
+
+        if ( !once )
+        {
+            WARN();
+            once = true;
+        }
+    }
+}
+
+/*
+ * The {un,}compressed XSTATE sizes are reported by dynamic CPUID value, based
+ * on the current %XCR0 and MSR_XSS values.  The exact layout is also feature
+ * and vendor specific.  Cross-check Xen's understanding against real hardware
+ * on boot.
+ *
+ * Testing every combination is prohibitive, so we use a partial approach.
+ * Starting with nothing active, we add new XSTATEs and check that the CPUID
+ * dynamic values never decreases.
+ */
+static void __init noinline xstate_check_sizes(void)
+{
+    uint64_t old_xcr0 = get_xcr0();
+    uint64_t old_xss = get_msr_xss();
+    struct xcheck_state s = {};
+
+    /*
+     * User and supervisor XSTATEs, increasing by index.
+     *
+     * Chronologically, Intel and AMD had identical layouts for AVX (YMM).
+     * AMD introduced LWP in Fam15h, following immediately on from YMM.  Intel
+     * left an LWP-shaped hole when adding MPX (BND{CSR,REGS}) in Skylake.
+     * AMD removed LWP in Fam17h, putting PKRU in the same space, breaking
+     * layout compatibility with Intel and having a knock-on effect on all
+     * subsequent states.
+     */
+    check_new_xstate(&s, X86_XCR0_SSE | X86_XCR0_FP);
+
+    if ( cpu_has_avx )
+        check_new_xstate(&s, X86_XCR0_YMM);
+
+    if ( cpu_has_mpx )
+        check_new_xstate(&s, X86_XCR0_BNDCSR | X86_XCR0_BNDREGS);
+
+    if ( cpu_has_avx512f )
+        check_new_xstate(&s, X86_XCR0_HI_ZMM | X86_XCR0_ZMM | X86_XCR0_OPMASK);
+
+    /*
+     * Intel Broadwell has Processor Trace but no XSAVES.  There doesn't
+     * appear to have been a new enumeration when X86_XSS_PROC_TRACE was
+     * introduced in Skylake.
+     */
+    if ( cpu_has_xsaves && cpu_has_proc_trace )
+        check_new_xstate(&s, X86_XSS_PROC_TRACE);
+
+    if ( cpu_has_pku )
+        check_new_xstate(&s, X86_XCR0_PKRU);
+
+    if ( cpu_has_xsaves && boot_cpu_has(X86_FEATURE_ENQCMD) )
+        check_new_xstate(&s, X86_XSS_PASID);
+
+    if ( cpu_has_xsaves && (boot_cpu_has(X86_FEATURE_CET_SS) ||
+                            boot_cpu_has(X86_FEATURE_CET_IBT)) )
+    {
+        check_new_xstate(&s, X86_XSS_CET_U);
+        check_new_xstate(&s, X86_XSS_CET_S);
+    }
+
+    if ( cpu_has_xsaves && boot_cpu_has(X86_FEATURE_UINTR) )
+        check_new_xstate(&s, X86_XSS_UINTR);
+
+    if ( cpu_has_xsaves && boot_cpu_has(X86_FEATURE_ARCH_LBR) )
+        check_new_xstate(&s, X86_XSS_LBR);
+
+    if ( boot_cpu_has(X86_FEATURE_AMX_TILE) )
+        check_new_xstate(&s, X86_XCR0_TILE_DATA | X86_XCR0_TILE_CFG);
+
+    if ( boot_cpu_has(X86_FEATURE_LWP) )
+        check_new_xstate(&s, X86_XCR0_LWP);
+
+    /* Restore old state now the test is done. */
+    if ( !set_xcr0(old_xcr0) )
+        BUG();
+    if ( cpu_has_xsaves )
+        set_msr_xss(old_xss);
+}
+
 /* Collect the information of processor's extended state */
 void xstate_init(struct cpuinfo_x86 *c)
 {
@@ -683,6 +850,9 @@ void xstate_init(struct cpuinfo_x86 *c)
 
     if ( setup_xstate_features(bsp) && bsp )
         BUG();
+
+    if ( IS_ENABLED(CONFIG_SELF_TESTS) && bsp )
+        xstate_check_sizes();
 }
 
 int validate_xstate(const struct domain *d, uint64_t xcr0, uint64_t xcr0_accum,
diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h
index 6627453e39..d9eba5e9a7 100644
--- a/xen/include/public/arch-x86/cpufeatureset.h
+++ b/xen/include/public/arch-x86/cpufeatureset.h
@@ -266,6 +266,7 @@ XEN_CPUFEATURE(IBPB_RET,      8*32+30) /*A  IBPB clears RSB/RAS too. */
 XEN_CPUFEATURE(AVX512_4VNNIW, 9*32+ 2) /*A  AVX512 Neural Network Instructions */
 XEN_CPUFEATURE(AVX512_4FMAPS, 9*32+ 3) /*A  AVX512 Multiply Accumulation Single Precision */
 XEN_CPUFEATURE(FSRM,          9*32+ 4) /*A  Fast Short REP MOVS */
+XEN_CPUFEATURE(UINTR,         9*32+ 5) /*   User-mode Interrupts */
 XEN_CPUFEATURE(AVX512_VP2INTERSECT, 9*32+8) /*a  VP2INTERSECT{D,Q} insns */
 XEN_CPUFEATURE(SRBDS_CTRL,    9*32+ 9) /*   MSR_MCU_OPT_CTRL and RNGDS_MITG_DIS. */
 XEN_CPUFEATURE(MD_CLEAR,      9*32+10) /*!A| VERW clears microarchitectural buffers */
@@ -274,8 +275,10 @@ XEN_CPUFEATURE(TSX_FORCE_ABORT, 9*32+13) /* MSR_TSX_FORCE_ABORT.RTM_ABORT */
 XEN_CPUFEATURE(SERIALIZE,     9*32+14) /*A  SERIALIZE insn */
 XEN_CPUFEATURE(HYBRID,        9*32+15) /*   Heterogeneous platform */
 XEN_CPUFEATURE(TSXLDTRK,      9*32+16) /*a  TSX load tracking suspend/resume insns */
+XEN_CPUFEATURE(ARCH_LBR,      9*32+19) /*   Architectural Last Branch Record */
 XEN_CPUFEATURE(CET_IBT,       9*32+20) /*   CET - Indirect Branch Tracking */
 XEN_CPUFEATURE(AVX512_FP16,   9*32+23) /*A  AVX512 FP16 instructions */
+XEN_CPUFEATURE(AMX_TILE,      9*32+24) /*   AMX Tile architecture */
 XEN_CPUFEATURE(IBRSB,         9*32+26) /*A  IBRS and IBPB support (used by Intel) */
 XEN_CPUFEATURE(STIBP,         9*32+27) /*A  STIBP */
 XEN_CPUFEATURE(L1D_FLUSH,     9*32+28) /*S  MSR_FLUSH_CMD and L1D flush. */
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/boot: Collect the Raw CPU Policy earlier on boot
Message-Id: <E1sJuAC-00048j-3L@xenbits.xenproject.org>
Date: Wed, 19 Jun 2024 12:11:44 +0000

commit a09022a09e1a79b3f9574993993bfad803b32596
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu May 23 00:55:34 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Wed Jun 19 13:00:06 2024 +0100

    x86/boot: Collect the Raw CPU Policy earlier on boot
    
    This is a tangle, but it's a small step in the right direction.
    
    In the following change, xstate_init() is going to start using the Raw policy.
    
    calculate_raw_cpu_policy() is sufficiently separate from the other policies to
    safely move like this.
    
    No functional change.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/cpu-policy.c | 1 -
 xen/arch/x86/setup.c      | 4 +++-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c
index b96f4ee55c..5b66f002df 100644
--- a/xen/arch/x86/cpu-policy.c
+++ b/xen/arch/x86/cpu-policy.c
@@ -845,7 +845,6 @@ static void __init calculate_hvm_def_policy(void)
 
 void __init init_guest_cpu_policies(void)
 {
-    calculate_raw_cpu_policy();
     calculate_host_policy();
 
     if ( IS_ENABLED(CONFIG_PV) )
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index dd51e68dbe..eee20bb175 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1888,7 +1888,9 @@ void asmlinkage __init noreturn __start_xen(unsigned long mbi_p)
 
     tsx_init(); /* Needs microcode.  May change HLE/RTM feature bits. */
 
-    identify_cpu(&boot_cpu_data);
+    calculate_raw_cpu_policy(); /* Needs microcode.  No other dependenices. */
+
+    identify_cpu(&boot_cpu_data); /* Needs microcode and raw policy. */
 
     set_in_cr4(X86_CR4_OSFXSR | X86_CR4_OSXMMEXCPT);
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/xstate: Rework xstate_ctxt_size() as xstate_uncompressed_size()
Message-Id: <E1sJuAM-00049A-6Y@xenbits.xenproject.org>
Date: Wed, 19 Jun 2024 12:11:54 +0000

commit df09dfb94de66f7523837c050616a382aa2c7d17
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Fri Apr 30 20:17:55 2021 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Wed Jun 19 13:00:06 2024 +0100

    x86/xstate: Rework xstate_ctxt_size() as xstate_uncompressed_size()
    
    We're soon going to need a compressed helper of the same form.
    
    The size of the uncompressed image depends on the single element with the
    largest offset + size.  Sadly this isn't always the element with the largest
    index.
    
    Name the per-xstate-component cpu_policy struture, for legibility of the logic
    in xstate_uncompressed_size().  Cross-check with hardware during boot, and
    remove hw_uncompressed_size().
    
    This means that the migration paths don't need to mess with XCR0 just to
    sanity check the buffer size.  It also means we can drop the "fastpath" check
    against xfeature_mask (there to skip some XCR0 writes); this path is going to
    be dead logic the moment Xen starts using supervisor states itself.
    
    The users of hw_uncompressed_size() in xstate_init() can (and indeed need) to
    be replaced with CPUID instructions.  They run with feature_mask in XCR0, and
    prior to setup_xstate_features() on the BSP.
    
    No practical change.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/domctl.c                |  2 +-
 xen/arch/x86/hvm/hvm.c               |  2 +-
 xen/arch/x86/include/asm/xstate.h    |  2 +-
 xen/arch/x86/xstate.c                | 79 ++++++++++++++++++++++--------------
 xen/include/xen/lib/x86/cpu-policy.h |  2 +-
 5 files changed, 52 insertions(+), 35 deletions(-)

diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c
index 335aedf46d..9190e11faa 100644
--- a/xen/arch/x86/domctl.c
+++ b/xen/arch/x86/domctl.c
@@ -833,7 +833,7 @@ long arch_do_domctl(
         uint32_t offset = 0;
 
 #define PV_XSAVE_HDR_SIZE (2 * sizeof(uint64_t))
-#define PV_XSAVE_SIZE(xcr0) (PV_XSAVE_HDR_SIZE + xstate_ctxt_size(xcr0))
+#define PV_XSAVE_SIZE(xcr0) (PV_XSAVE_HDR_SIZE + xstate_uncompressed_size(xcr0))
 
         ret = -ESRCH;
         if ( (evc->vcpu >= d->max_vcpus) ||
diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 8334ab1711..7f4b627b1f 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -1206,7 +1206,7 @@ HVM_REGISTER_SAVE_RESTORE(CPU, hvm_save_cpu_ctxt, NULL, hvm_load_cpu_ctxt, 1,
 
 #define HVM_CPU_XSAVE_SIZE(xcr0) (offsetof(struct hvm_hw_cpu_xsave, \
                                            save_area) + \
-                                  xstate_ctxt_size(xcr0))
+                                  xstate_uncompressed_size(xcr0))
 
 static int cf_check hvm_save_cpu_xsave_states(
     struct vcpu *v, hvm_domain_context_t *h)
diff --git a/xen/arch/x86/include/asm/xstate.h b/xen/arch/x86/include/asm/xstate.h
index c08c267884..f5115199d4 100644
--- a/xen/arch/x86/include/asm/xstate.h
+++ b/xen/arch/x86/include/asm/xstate.h
@@ -107,7 +107,7 @@ void compress_xsave_states(struct vcpu *v, const void *src, unsigned int size);
 void xstate_free_save_area(struct vcpu *v);
 int xstate_alloc_save_area(struct vcpu *v);
 void xstate_init(struct cpuinfo_x86 *c);
-unsigned int xstate_ctxt_size(u64 xcr0);
+unsigned int xstate_uncompressed_size(uint64_t xcr0);
 
 static inline uint64_t xgetbv(unsigned int index)
 {
diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c
index 408d9dd108..c8bc40fb5c 100644
--- a/xen/arch/x86/xstate.c
+++ b/xen/arch/x86/xstate.c
@@ -8,6 +8,8 @@
 #include <xen/param.h>
 #include <xen/percpu.h>
 #include <xen/sched.h>
+
+#include <asm/cpu-policy.h>
 #include <asm/current.h>
 #include <asm/processor.h>
 #include <asm/i387.h>
@@ -183,7 +185,7 @@ void expand_xsave_states(const struct vcpu *v, void *dest, unsigned int size)
     /* Check there is state to serialise (i.e. at least an XSAVE_HDR) */
     BUG_ON(!v->arch.xcr0_accum);
     /* Check there is the correct room to decompress into. */
-    BUG_ON(size != xstate_ctxt_size(v->arch.xcr0_accum));
+    BUG_ON(size != xstate_uncompressed_size(v->arch.xcr0_accum));
 
     if ( !(xstate->xsave_hdr.xcomp_bv & XSTATE_COMPACTION_ENABLED) )
     {
@@ -245,7 +247,7 @@ void compress_xsave_states(struct vcpu *v, const void *src, unsigned int size)
     u64 xstate_bv, valid;
 
     BUG_ON(!v->arch.xcr0_accum);
-    BUG_ON(size != xstate_ctxt_size(v->arch.xcr0_accum));
+    BUG_ON(size != xstate_uncompressed_size(v->arch.xcr0_accum));
     ASSERT(!xsave_area_compressed(src));
 
     xstate_bv = ((const struct xsave_struct *)src)->xsave_hdr.xstate_bv;
@@ -553,32 +555,6 @@ void xstate_free_save_area(struct vcpu *v)
     v->arch.xsave_area = NULL;
 }
 
-static unsigned int hw_uncompressed_size(uint64_t xcr0)
-{
-    u64 act_xcr0 = get_xcr0();
-    unsigned int size;
-    bool ok = set_xcr0(xcr0);
-
-    ASSERT(ok);
-    size = cpuid_count_ebx(XSTATE_CPUID, 0);
-    ok = set_xcr0(act_xcr0);
-    ASSERT(ok);
-
-    return size;
-}
-
-/* Fastpath for common xstate size requests, avoiding reloads of xcr0. */
-unsigned int xstate_ctxt_size(u64 xcr0)
-{
-    if ( xcr0 == xfeature_mask )
-        return xsave_cntxt_size;
-
-    if ( xcr0 == 0 ) /* TODO: clean up paths passing 0 in here. */
-        return 0;
-
-    return hw_uncompressed_size(xcr0);
-}
-
 static bool valid_xcr0(uint64_t xcr0)
 {
     /* FP must be unconditionally set. */
@@ -611,6 +587,38 @@ static bool valid_xcr0(uint64_t xcr0)
     return true;
 }
 
+unsigned int xstate_uncompressed_size(uint64_t xcr0)
+{
+    unsigned int size = XSTATE_AREA_MIN_SIZE, i;
+
+    /* Non-XCR0 states don't exist in an uncompressed image. */
+    ASSERT((xcr0 & ~X86_XCR0_STATES) == 0);
+
+    if ( xcr0 == 0 )
+        return 0;
+
+    if ( xcr0 <= (X86_XCR0_SSE | X86_XCR0_FP) )
+        return size;
+
+    /*
+     * For the non-legacy states, search all activate states and find the
+     * maximum offset+size.  Some states (e.g. LWP, APX_F) are out-of-order
+     * with respect their index.
+     */
+    xcr0 &= ~(X86_XCR0_SSE | X86_XCR0_FP);
+    for_each_set_bit ( i, &xcr0, 63 )
+    {
+        const struct xstate_component *c = &raw_cpu_policy.xstate.comp[i];
+        unsigned int s = c->offset + c->size;
+
+        ASSERT(c->offset && c->size);
+
+        size = max(size, s);
+    }
+
+    return size;
+}
+
 struct xcheck_state {
     uint64_t states;
     uint32_t uncomp_size;
@@ -619,7 +627,7 @@ struct xcheck_state {
 
 static void __init check_new_xstate(struct xcheck_state *s, uint64_t new)
 {
-    uint32_t hw_size;
+    uint32_t hw_size, xen_size;
 
     BUILD_BUG_ON(X86_XCR0_STATES & X86_XSS_STATES);
 
@@ -667,6 +675,15 @@ static void __init check_new_xstate(struct xcheck_state *s, uint64_t new)
 
     s->uncomp_size = hw_size;
 
+    /*
+     * Second, check that Xen's calculation always matches hardware's.
+     */
+    xen_size = xstate_uncompressed_size(s->states & X86_XCR0_STATES);
+
+    if ( xen_size != hw_size )
+        panic("XSTATE 0x%016"PRIx64", uncompressed hw size %#x != xen size %#x\n",
+              s->states, hw_size, xen_size);
+
     /*
      * Check the compressed size, if available.
      */
@@ -838,14 +855,14 @@ void xstate_init(struct cpuinfo_x86 *c)
          * xsave_cntxt_size is the max size required by enabled features.
          * We know FP/SSE and YMM about eax, and nothing about edx at present.
          */
-        xsave_cntxt_size = hw_uncompressed_size(feature_mask);
+        xsave_cntxt_size = cpuid_count_ebx(0xd, 0);
         printk("xstate: size: %#x and states: %#"PRIx64"\n",
                xsave_cntxt_size, xfeature_mask);
     }
     else
     {
         BUG_ON(xfeature_mask != feature_mask);
-        BUG_ON(xsave_cntxt_size != hw_uncompressed_size(feature_mask));
+        BUG_ON(xsave_cntxt_size != cpuid_count_ebx(0xd, 0));
     }
 
     if ( setup_xstate_features(bsp) && bsp )
diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h
index d5e447e9dc..d26012c6da 100644
--- a/xen/include/xen/lib/x86/cpu-policy.h
+++ b/xen/include/xen/lib/x86/cpu-policy.h
@@ -248,7 +248,7 @@ struct cpu_policy
         };
 
         /* Per-component common state.  Valid for i >= 2. */
-        struct {
+        struct xstate_component {
             uint32_t size, offset;
             bool xss:1, align:1;
             uint32_t _res_d;
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/cpu-policy: Simplify recalculate_xstate()
Message-Id: <E1sJuAW-0004AT-9a@xenbits.xenproject.org>
Date: Wed, 19 Jun 2024 12:12:04 +0000

commit fdb7e77fea4cb1c98dc51dd891a47f7e94612ad4
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Fri Apr 30 20:17:55 2021 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Wed Jun 19 13:00:06 2024 +0100

    x86/cpu-policy: Simplify recalculate_xstate()
    
    Make use of xstate_uncompressed_size() helper rather than maintaining the
    running calculation while accumulating feature components.
    
    The rest of the CPUID data can come direct from the raw cpu policy.  All
    per-component data form an ABI through the behaviour of the X{SAVE,RSTOR}*
    instructions.
    
    Use for_each_set_bit() rather than opencoding a slightly awkward version of
    it.  Mask the attributes in ecx down based on the visible features.  This
    isn't actually necessary for any components or attributes defined at the time
    of writing (up to AMX), but is added out of an abundance of caution.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/cpu-policy.c         | 55 ++++++++++++++-------------------------
 xen/arch/x86/include/asm/xstate.h |  1 +
 2 files changed, 21 insertions(+), 35 deletions(-)

diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c
index 5b66f002df..304dc20cfa 100644
--- a/xen/arch/x86/cpu-policy.c
+++ b/xen/arch/x86/cpu-policy.c
@@ -193,8 +193,7 @@ static void sanitise_featureset(uint32_t *fs)
 static void recalculate_xstate(struct cpu_policy *p)
 {
     uint64_t xstates = XSTATE_FP_SSE;
-    uint32_t xstate_size = XSTATE_AREA_MIN_SIZE;
-    unsigned int i, Da1 = p->xstate.Da1;
+    unsigned int i, ecx_mask = 0, Da1 = p->xstate.Da1;
 
     /*
      * The Da1 leaf is the only piece of information preserved in the common
@@ -206,61 +205,47 @@ static void recalculate_xstate(struct cpu_policy *p)
         return;
 
     if ( p->basic.avx )
-    {
         xstates |= X86_XCR0_YMM;
-        xstate_size = max(xstate_size,
-                          xstate_offsets[X86_XCR0_YMM_POS] +
-                          xstate_sizes[X86_XCR0_YMM_POS]);
-    }
 
     if ( p->feat.mpx )
-    {
         xstates |= X86_XCR0_BNDREGS | X86_XCR0_BNDCSR;
-        xstate_size = max(xstate_size,
-                          xstate_offsets[X86_XCR0_BNDCSR_POS] +
-                          xstate_sizes[X86_XCR0_BNDCSR_POS]);
-    }
 
     if ( p->feat.avx512f )
-    {
         xstates |= X86_XCR0_OPMASK | X86_XCR0_ZMM | X86_XCR0_HI_ZMM;
-        xstate_size = max(xstate_size,
-                          xstate_offsets[X86_XCR0_HI_ZMM_POS] +
-                          xstate_sizes[X86_XCR0_HI_ZMM_POS]);
-    }
 
     if ( p->feat.pku )
-    {
         xstates |= X86_XCR0_PKRU;
-        xstate_size = max(xstate_size,
-                          xstate_offsets[X86_XCR0_PKRU_POS] +
-                          xstate_sizes[X86_XCR0_PKRU_POS]);
-    }
 
-    p->xstate.max_size  =  xstate_size;
+    /* Subleaf 0 */
+    p->xstate.max_size =
+        xstate_uncompressed_size(xstates & ~XSTATE_XSAVES_ONLY);
     p->xstate.xcr0_low  =  xstates & ~XSTATE_XSAVES_ONLY;
     p->xstate.xcr0_high = (xstates & ~XSTATE_XSAVES_ONLY) >> 32;
 
+    /* Subleaf 1 */
     p->xstate.Da1 = Da1;
+    if ( p->xstate.xsavec )
+        ecx_mask |= XSTATE_ALIGN64;
+
     if ( p->xstate.xsaves )
     {
+        ecx_mask |= XSTATE_XSS;
         p->xstate.xss_low   =  xstates & XSTATE_XSAVES_ONLY;
         p->xstate.xss_high  = (xstates & XSTATE_XSAVES_ONLY) >> 32;
     }
-    else
-        xstates &= ~XSTATE_XSAVES_ONLY;
 
-    for ( i = 2; i < min(63UL, ARRAY_SIZE(p->xstate.comp)); ++i )
+    /* Subleafs 2+ */
+    xstates &= ~XSTATE_FP_SSE;
+    BUILD_BUG_ON(ARRAY_SIZE(p->xstate.comp) < 63);
+    for_each_set_bit ( i, &xstates, 63 )
     {
-        uint64_t curr_xstate = 1UL << i;
-
-        if ( !(xstates & curr_xstate) )
-            continue;
-
-        p->xstate.comp[i].size   = xstate_sizes[i];
-        p->xstate.comp[i].offset = xstate_offsets[i];
-        p->xstate.comp[i].xss    = curr_xstate & XSTATE_XSAVES_ONLY;
-        p->xstate.comp[i].align  = curr_xstate & xstate_align;
+        /*
+         * Pass through size (eax) and offset (ebx) directly.  Visbility of
+         * attributes in ecx limited by visible features in Da1.
+         */
+        p->xstate.raw[i].a = raw_cpu_policy.xstate.raw[i].a;
+        p->xstate.raw[i].b = raw_cpu_policy.xstate.raw[i].b;
+        p->xstate.raw[i].c = raw_cpu_policy.xstate.raw[i].c & ecx_mask;
     }
 }
 
diff --git a/xen/arch/x86/include/asm/xstate.h b/xen/arch/x86/include/asm/xstate.h
index f5115199d4..bfb66dd766 100644
--- a/xen/arch/x86/include/asm/xstate.h
+++ b/xen/arch/x86/include/asm/xstate.h
@@ -40,6 +40,7 @@ extern uint32_t mxcsr_mask;
 #define XSTATE_XSAVES_ONLY         0
 #define XSTATE_COMPACTION_ENABLED  (1ULL << 63)
 
+#define XSTATE_XSS     (1U << 0)
 #define XSTATE_ALIGN64 (1U << 1)
 
 extern u64 xfeature_mask;
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/cpuid: Fix handling of XSAVE dynamic leaves
Message-Id: <E1sJuAg-0004B9-Ch@xenbits.xenproject.org>
Date: Wed, 19 Jun 2024 12:12:14 +0000

commit 71cacfb035f4a78ee10970dc38a3baa04d387451
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Fri Apr 30 20:17:55 2021 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Wed Jun 19 13:00:06 2024 +0100

    x86/cpuid: Fix handling of XSAVE dynamic leaves
    
    First, if XSAVE is available in hardware but not visible to the guest, the
    dynamic leaves shouldn't be filled in.
    
    Second, the comment concerning XSS state is wrong.  VT-x doesn't manage
    host/guest state automatically, but there is provision for "host only" bits to
    be set, so the implications are still accurate.
    
    Introduce xstate_compressed_size() to mirror the uncompressed one.  Cross
    check it at boot.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/cpuid.c              | 24 ++++++++----------------
 xen/arch/x86/include/asm/xstate.h |  1 +
 xen/arch/x86/xstate.c             | 39 +++++++++++++++++++++++++++++++++++++++
 3 files changed, 48 insertions(+), 16 deletions(-)

diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c
index 7a38e03214..a822e80c7e 100644
--- a/xen/arch/x86/cpuid.c
+++ b/xen/arch/x86/cpuid.c
@@ -330,23 +330,15 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf,
     case XSTATE_CPUID:
         switch ( subleaf )
         {
-        case 1:
-            if ( !p->xstate.xsavec && !p->xstate.xsaves )
-                break;
-
-            /*
-             * TODO: Figure out what to do for XSS state.  VT-x manages host
-             * vs guest MSR_XSS automatically, so as soon as we start
-             * supporting any XSS states, the wrong XSS will be in context.
-             */
-            BUILD_BUG_ON(XSTATE_XSAVES_ONLY != 0);
-            fallthrough;
         case 0:
-            /*
-             * Read CPUID[0xD,0/1].EBX from hardware.  They vary with enabled
-             * XSTATE, and appropriate XCR0|XSS are in context.
-             */
-            res->b = cpuid_count_ebx(leaf, subleaf);
+            if ( p->basic.xsave )
+                res->b = xstate_uncompressed_size(v->arch.xcr0);
+            break;
+
+        case 1:
+            if ( p->xstate.xsavec )
+                res->b = xstate_compressed_size(v->arch.xcr0 |
+                                                v->arch.msrs->xss.raw);
             break;
         }
         break;
diff --git a/xen/arch/x86/include/asm/xstate.h b/xen/arch/x86/include/asm/xstate.h
index bfb66dd766..da1d89d2f4 100644
--- a/xen/arch/x86/include/asm/xstate.h
+++ b/xen/arch/x86/include/asm/xstate.h
@@ -109,6 +109,7 @@ void xstate_free_save_area(struct vcpu *v);
 int xstate_alloc_save_area(struct vcpu *v);
 void xstate_init(struct cpuinfo_x86 *c);
 unsigned int xstate_uncompressed_size(uint64_t xcr0);
+unsigned int xstate_compressed_size(uint64_t xstates);
 
 static inline uint64_t xgetbv(unsigned int index)
 {
diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c
index c8bc40fb5c..da0f48da81 100644
--- a/xen/arch/x86/xstate.c
+++ b/xen/arch/x86/xstate.c
@@ -619,6 +619,36 @@ unsigned int xstate_uncompressed_size(uint64_t xcr0)
     return size;
 }
 
+unsigned int xstate_compressed_size(uint64_t xstates)
+{
+    unsigned int i, size = XSTATE_AREA_MIN_SIZE;
+
+    if ( xstates == 0 )
+        return 0;
+
+    if ( xstates <= (X86_XCR0_SSE | X86_XCR0_FP) )
+        return size;
+
+    /*
+     * For the compressed size, every non-legacy component matters.  Some
+     * componenets require aligning to 64 first.
+     */
+    xstates &= ~(X86_XCR0_SSE | X86_XCR0_FP);
+    for_each_set_bit ( i, &xstates, 63 )
+    {
+        const struct xstate_component *c = &raw_cpu_policy.xstate.comp[i];
+
+        ASSERT(c->size);
+
+        if ( c->align )
+            size = ROUNDUP(size, 64);
+
+        size += c->size;
+    }
+
+    return size;
+}
+
 struct xcheck_state {
     uint64_t states;
     uint32_t uncomp_size;
@@ -701,6 +731,15 @@ static void __init check_new_xstate(struct xcheck_state *s, uint64_t new)
                   s->states, &new, hw_size, s->comp_size);
 
         s->comp_size = hw_size;
+
+        /*
+         * Again, check that Xen's calculation always matches hardware's.
+         */
+        xen_size = xstate_compressed_size(s->states);
+
+        if ( xen_size != hw_size )
+            panic("XSTATE 0x%016"PRIx64", compressed hw size %#x != xen size %#x\n",
+                  s->states, hw_size, xen_size);
     }
     else if ( hw_size ) /* Compressed size reported, but no XSAVEC ? */
     {
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/defns: Clean up X86_{XCR0,XSS}_* constants
Message-Id: <E1sJuAq-0004Be-Fd@xenbits.xenproject.org>
Date: Wed, 19 Jun 2024 12:12:24 +0000

commit 267122a24c499d26278ab2dbdfb46ebcaaf38474
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Fri Apr 30 16:14:36 2021 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Wed Jun 19 13:00:06 2024 +0100

    x86/defns: Clean up X86_{XCR0,XSS}_* constants
    
    With the exception of one case in read_bndcfgu() which can use ilog2(),
    the *_POS defines are unused.  Drop them.
    
    X86_XCR0_X87 is the name used by both the SDM and APM, rather than
    X86_XCR0_FP.
    
    No functional change.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/i387.c                  |  2 +-
 xen/arch/x86/include/asm/x86-defns.h | 32 +++++++++++---------------------
 xen/arch/x86/include/asm/xstate.h    |  4 ++--
 xen/arch/x86/xstate.c                | 18 +++++++++---------
 4 files changed, 23 insertions(+), 33 deletions(-)

diff --git a/xen/arch/x86/i387.c b/xen/arch/x86/i387.c
index 7a4297cc92..fcdee10a6e 100644
--- a/xen/arch/x86/i387.c
+++ b/xen/arch/x86/i387.c
@@ -369,7 +369,7 @@ void vcpu_setup_fpu(struct vcpu *v, struct xsave_struct *xsave_area,
         {
             v->arch.xsave_area->xsave_hdr.xstate_bv &= ~XSTATE_FP_SSE;
             if ( fcw_default != FCW_DEFAULT )
-                v->arch.xsave_area->xsave_hdr.xstate_bv |= X86_XCR0_FP;
+                v->arch.xsave_area->xsave_hdr.xstate_bv |= X86_XCR0_X87;
         }
     }
 
diff --git a/xen/arch/x86/include/asm/x86-defns.h b/xen/arch/x86/include/asm/x86-defns.h
index d7602ab225..3bcdbaccd3 100644
--- a/xen/arch/x86/include/asm/x86-defns.h
+++ b/xen/arch/x86/include/asm/x86-defns.h
@@ -79,25 +79,16 @@
 /*
  * XSTATE component flags in XCR0 | MSR_XSS
  */
-#define X86_XCR0_FP_POS           0
-#define X86_XCR0_FP               (1ULL << X86_XCR0_FP_POS)
-#define X86_XCR0_SSE_POS          1
-#define X86_XCR0_SSE              (1ULL << X86_XCR0_SSE_POS)
-#define X86_XCR0_YMM_POS          2
-#define X86_XCR0_YMM              (1ULL << X86_XCR0_YMM_POS)
-#define X86_XCR0_BNDREGS_POS      3
-#define X86_XCR0_BNDREGS          (1ULL << X86_XCR0_BNDREGS_POS)
-#define X86_XCR0_BNDCSR_POS       4
-#define X86_XCR0_BNDCSR           (1ULL << X86_XCR0_BNDCSR_POS)
-#define X86_XCR0_OPMASK_POS       5
-#define X86_XCR0_OPMASK           (1ULL << X86_XCR0_OPMASK_POS)
-#define X86_XCR0_ZMM_POS          6
-#define X86_XCR0_ZMM              (1ULL << X86_XCR0_ZMM_POS)
-#define X86_XCR0_HI_ZMM_POS       7
-#define X86_XCR0_HI_ZMM           (1ULL << X86_XCR0_HI_ZMM_POS)
+#define X86_XCR0_X87              (_AC(1, ULL) <<  0)
+#define X86_XCR0_SSE              (_AC(1, ULL) <<  1)
+#define X86_XCR0_YMM              (_AC(1, ULL) <<  2)
+#define X86_XCR0_BNDREGS          (_AC(1, ULL) <<  3)
+#define X86_XCR0_BNDCSR           (_AC(1, ULL) <<  4)
+#define X86_XCR0_OPMASK           (_AC(1, ULL) <<  5)
+#define X86_XCR0_ZMM              (_AC(1, ULL) <<  6)
+#define X86_XCR0_HI_ZMM           (_AC(1, ULL) <<  7)
 #define X86_XSS_PROC_TRACE        (_AC(1, ULL) <<  8)
-#define X86_XCR0_PKRU_POS         9
-#define X86_XCR0_PKRU             (1ULL << X86_XCR0_PKRU_POS)
+#define X86_XCR0_PKRU             (_AC(1, ULL) <<  9)
 #define X86_XSS_PASID             (_AC(1, ULL) << 10)
 #define X86_XSS_CET_U             (_AC(1, ULL) << 11)
 #define X86_XSS_CET_S             (_AC(1, ULL) << 12)
@@ -107,11 +98,10 @@
 #define X86_XSS_HWP               (_AC(1, ULL) << 16)
 #define X86_XCR0_TILE_CFG         (_AC(1, ULL) << 17)
 #define X86_XCR0_TILE_DATA        (_AC(1, ULL) << 18)
-#define X86_XCR0_LWP_POS          62
-#define X86_XCR0_LWP              (1ULL << X86_XCR0_LWP_POS)
+#define X86_XCR0_LWP              (_AC(1, ULL) << 62)
 
 #define X86_XCR0_STATES                                                 \
-    (X86_XCR0_FP | X86_XCR0_SSE | X86_XCR0_YMM | X86_XCR0_BNDREGS |     \
+    (X86_XCR0_X87 | X86_XCR0_SSE | X86_XCR0_YMM | X86_XCR0_BNDREGS |    \
      X86_XCR0_BNDCSR | X86_XCR0_OPMASK | X86_XCR0_ZMM |                 \
      X86_XCR0_HI_ZMM | X86_XCR0_PKRU | X86_XCR0_TILE_CFG |              \
      X86_XCR0_TILE_DATA |                                               \
diff --git a/xen/arch/x86/include/asm/xstate.h b/xen/arch/x86/include/asm/xstate.h
index da1d89d2f4..f4a8e5f814 100644
--- a/xen/arch/x86/include/asm/xstate.h
+++ b/xen/arch/x86/include/asm/xstate.h
@@ -29,8 +29,8 @@ extern uint32_t mxcsr_mask;
 #define XSAVE_HDR_OFFSET          FXSAVE_SIZE
 #define XSTATE_AREA_MIN_SIZE      (FXSAVE_SIZE + XSAVE_HDR_SIZE)
 
-#define XSTATE_FP_SSE  (X86_XCR0_FP | X86_XCR0_SSE)
-#define XCNTXT_MASK    (X86_XCR0_FP | X86_XCR0_SSE | X86_XCR0_YMM | \
+#define XSTATE_FP_SSE  (X86_XCR0_X87 | X86_XCR0_SSE)
+#define XCNTXT_MASK    (X86_XCR0_X87 | X86_XCR0_SSE | X86_XCR0_YMM | \
                         X86_XCR0_OPMASK | X86_XCR0_ZMM | X86_XCR0_HI_ZMM | \
                         XSTATE_NONLAZY)
 
diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c
index da0f48da81..68cdd8fcf0 100644
--- a/xen/arch/x86/xstate.c
+++ b/xen/arch/x86/xstate.c
@@ -313,7 +313,7 @@ void xsave(struct vcpu *v, uint64_t mask)
                            "=m" (*ptr), \
                            "a" (lmask), "d" (hmask), "D" (ptr))
 
-    if ( fip_width == 8 || !(mask & X86_XCR0_FP) )
+    if ( fip_width == 8 || !(mask & X86_XCR0_X87) )
     {
         XSAVE("0x48,");
     }
@@ -366,7 +366,7 @@ void xsave(struct vcpu *v, uint64_t mask)
             fip_width = 8;
     }
 #undef XSAVE
-    if ( mask & X86_XCR0_FP )
+    if ( mask & X86_XCR0_X87 )
         ptr->fpu_sse.x[FPU_WORD_SIZE_OFFSET] = fip_width;
 }
 
@@ -558,7 +558,7 @@ void xstate_free_save_area(struct vcpu *v)
 static bool valid_xcr0(uint64_t xcr0)
 {
     /* FP must be unconditionally set. */
-    if ( !(xcr0 & X86_XCR0_FP) )
+    if ( !(xcr0 & X86_XCR0_X87) )
         return false;
 
     /* YMM depends on SSE. */
@@ -597,7 +597,7 @@ unsigned int xstate_uncompressed_size(uint64_t xcr0)
     if ( xcr0 == 0 )
         return 0;
 
-    if ( xcr0 <= (X86_XCR0_SSE | X86_XCR0_FP) )
+    if ( xcr0 <= (X86_XCR0_SSE | X86_XCR0_X87) )
         return size;
 
     /*
@@ -605,7 +605,7 @@ unsigned int xstate_uncompressed_size(uint64_t xcr0)
      * maximum offset+size.  Some states (e.g. LWP, APX_F) are out-of-order
      * with respect their index.
      */
-    xcr0 &= ~(X86_XCR0_SSE | X86_XCR0_FP);
+    xcr0 &= ~(X86_XCR0_SSE | X86_XCR0_X87);
     for_each_set_bit ( i, &xcr0, 63 )
     {
         const struct xstate_component *c = &raw_cpu_policy.xstate.comp[i];
@@ -626,14 +626,14 @@ unsigned int xstate_compressed_size(uint64_t xstates)
     if ( xstates == 0 )
         return 0;
 
-    if ( xstates <= (X86_XCR0_SSE | X86_XCR0_FP) )
+    if ( xstates <= (X86_XCR0_SSE | X86_XCR0_X87) )
         return size;
 
     /*
      * For the compressed size, every non-legacy component matters.  Some
      * componenets require aligning to 64 first.
      */
-    xstates &= ~(X86_XCR0_SSE | X86_XCR0_FP);
+    xstates &= ~(X86_XCR0_SSE | X86_XCR0_X87);
     for_each_set_bit ( i, &xstates, 63 )
     {
         const struct xstate_component *c = &raw_cpu_policy.xstate.comp[i];
@@ -779,7 +779,7 @@ static void __init noinline xstate_check_sizes(void)
      * layout compatibility with Intel and having a knock-on effect on all
      * subsequent states.
      */
-    check_new_xstate(&s, X86_XCR0_SSE | X86_XCR0_FP);
+    check_new_xstate(&s, X86_XCR0_SSE | X86_XCR0_X87);
 
     if ( cpu_has_avx )
         check_new_xstate(&s, X86_XCR0_YMM);
@@ -1026,7 +1026,7 @@ uint64_t read_bndcfgu(void)
               : "=m" (*xstate)
               : "a" (X86_XCR0_BNDCSR), "d" (0), "D" (xstate) );
 
-        bndcsr = (void *)xstate + xstate_offsets[X86_XCR0_BNDCSR_POS];
+        bndcsr = (void *)xstate + xstate_offsets[ilog2(X86_XCR0_BNDCSR)];
     }
 
     if ( cr0 & X86_CR0_TS )
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen: avoid UB in guest handle arithmetic
Message-Id: <E1sJuKB-0004ks-No@xenbits.xenproject.org>
Date: Wed, 19 Jun 2024 12:22:03 +0000

commit 43d5c5d5f70b3f5419e7ef30399d23adf6ddfa8e
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 19 14:11:07 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 19 14:11:07 2024 +0200

    xen: avoid UB in guest handle arithmetic
    
    At least XENMEM_memory_exchange can have huge values passed in the
    nr_extents and nr_exchanged fields. Adding such values to pointers can
    overflow, resulting in UB. Cast respective pointers to "unsigned long"
    while at the same time making the necessary multiplication explicit.
    Remaining arithmetic is, despite there possibly being mathematical
    overflow, okay as per the C99 spec: "A computation involving unsigned
    operands can never overflow, because a result that cannot be represented
    by the resulting unsigned integer type is reduced modulo the number that
    is one greater than the largest value that can be represented by the
    resulting type." The overflow that we need to guard against is checked
    for in array_access_ok().
    
    Note that in / down from array_access_ok() the address value is only
    ever cast to "unsigned long" anyway, which is why in the invocation from
    guest_handle_subrange_okay() the value doesn't need casting back to
    pointer type.
    
    In compat grant table code change two guest_handle_add_offset() to avoid
    passing in negative offsets.
    
    Since {,__}clear_guest_offset() need touching anyway, also deal with
    another (latent) issue there: They were losing the handle type, i.e. the
    size of the individual objects accessed. Luckily the few users we
    presently have all pass char or uint8 handles.
    
    Reported-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Tested-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/include/asm/guest_access.h |  2 +-
 xen/common/compat/grant_table.c         |  4 ++--
 xen/include/xen/guest_access.h          | 42 ++++++++++++++++++++-------------
 3 files changed, 29 insertions(+), 19 deletions(-)

diff --git a/xen/arch/x86/include/asm/guest_access.h b/xen/arch/x86/include/asm/guest_access.h
index dbf789fa58..69716c8b41 100644
--- a/xen/arch/x86/include/asm/guest_access.h
+++ b/xen/arch/x86/include/asm/guest_access.h
@@ -43,7 +43,7 @@
      array_access_ok((hnd).p, (nr), sizeof(*(hnd).p)))
 #define guest_handle_subrange_okay(hnd, first, last)    \
     (paging_mode_external(current->domain) ||           \
-     array_access_ok((hnd).p + (first),                 \
+     array_access_ok((unsigned long)(hnd).p + (first) * sizeof(*(hnd).p), \
                      (last)-(first)+1,                  \
                      sizeof(*(hnd).p)))
 
diff --git a/xen/common/compat/grant_table.c b/xen/common/compat/grant_table.c
index af98eade17..c495c375eb 100644
--- a/xen/common/compat/grant_table.c
+++ b/xen/common/compat/grant_table.c
@@ -232,7 +232,7 @@ int compat_grant_table_op(
                 cnt_uop = guest_handle_cast(xfer, void);
                 while ( n-- )
                 {
-                    guest_handle_add_offset(xfer, -1);
+                    guest_handle_subtract_offset(xfer, 1);
                     if ( __copy_field_to_guest(xfer, nat.xfer + n, status) )
                         rc = -EFAULT;
                 }
@@ -277,7 +277,7 @@ int compat_grant_table_op(
                 cnt_uop = guest_handle_cast(copy, void);
                 while ( n-- )
                 {
-                    guest_handle_add_offset(copy, -1);
+                    guest_handle_subtract_offset(copy, 1);
                     if ( __copy_field_to_guest(copy, nat.copy + n, status) )
                         rc = -EFAULT;
                 }
diff --git a/xen/include/xen/guest_access.h b/xen/include/xen/guest_access.h
index af33ae3ab6..96dbef2e02 100644
--- a/xen/include/xen/guest_access.h
+++ b/xen/include/xen/guest_access.h
@@ -15,8 +15,10 @@
 #define guest_handle_is_null(hnd)        ((hnd).p == NULL)
 
 /* Offset the given guest handle into the array it refers to. */
-#define guest_handle_add_offset(hnd, nr) ((hnd).p += (nr))
-#define guest_handle_subtract_offset(hnd, nr) ((hnd).p -= (nr))
+#define guest_handle_add_offset(hnd, nr) ((hnd).p = \
+    (typeof((hnd).p))((unsigned long)(hnd).p + (nr) * sizeof(*(hnd).p)))
+#define guest_handle_subtract_offset(hnd, nr) ((hnd).p = \
+    (typeof((hnd).p))((unsigned long)(hnd).p - (nr) * sizeof(*(hnd).p)))
 
 /*
  * Cast a guest handle (either XEN_GUEST_HANDLE or XEN_GUEST_HANDLE_PARAM)
@@ -59,20 +61,22 @@
  */
 #define copy_to_guest_offset(hnd, off, ptr, nr) ({      \
     const typeof(*(ptr)) *_s = (ptr);                   \
-    char (*_d)[sizeof(*_s)] = (void *)(hnd).p;          \
+    unsigned long d_ = (unsigned long)(hnd).p;          \
     /* Check that the handle is not for a const type */ \
     void *__maybe_unused _t = (hnd).p;                  \
     (void)((hnd).p == _s);                              \
-    raw_copy_to_guest(_d+(off), _s, sizeof(*_s)*(nr));  \
+    raw_copy_to_guest((void *)(d_ + (off) * sizeof(*_s)), \
+                      _s, (nr) * sizeof(*_s));          \
 })
 
 /*
  * Clear an array of objects in guest context via a guest handle,
  * specifying an offset into the guest array.
  */
-#define clear_guest_offset(hnd, off, nr) ({    \
-    void *_d = (hnd).p;                        \
-    raw_clear_guest(_d+(off), nr);             \
+#define clear_guest_offset(hnd, off, nr) ({             \
+    unsigned long d_ = (unsigned long)(hnd).p;          \
+    raw_clear_guest((void *)(d_ + (off) * sizeof(*(hnd).p)), \
+                    (nr) * sizeof(*(hnd).p));           \
 })
 
 /*
@@ -80,9 +84,11 @@
  * specifying an offset into the guest array.
  */
 #define copy_from_guest_offset(ptr, hnd, off, nr) ({    \
-    const typeof(*(ptr)) *_s = (hnd).p;                 \
+    unsigned long s_ = (unsigned long)(hnd).p;          \
     typeof(*(ptr)) *_d = (ptr);                         \
-    raw_copy_from_guest(_d, _s+(off), sizeof(*_d)*(nr));\
+    raw_copy_from_guest(_d,                             \
+                        (const void *)(s_ + (off) * sizeof(*_d)), \
+                        (nr) * sizeof(*_d));            \
 })
 
 /* Copy sub-field of a structure to guest context via a guest handle. */
@@ -117,22 +123,26 @@
 
 #define __copy_to_guest_offset(hnd, off, ptr, nr) ({        \
     const typeof(*(ptr)) *_s = (ptr);                       \
-    char (*_d)[sizeof(*_s)] = (void *)(hnd).p;              \
+    unsigned long d_ = (unsigned long)(hnd).p;              \
     /* Check that the handle is not for a const type */     \
     void *__maybe_unused _t = (hnd).p;                      \
     (void)((hnd).p == _s);                                  \
-    __raw_copy_to_guest(_d + (off), _s, sizeof(*_s) * (nr));\
+    __raw_copy_to_guest((void *)(d_ + (off) * sizeof(*_s)), \
+                      _s, (nr) * sizeof(*_s));              \
 })
 
-#define __clear_guest_offset(hnd, off, nr) ({    \
-    void *_d = (hnd).p;                          \
-    __raw_clear_guest(_d + (off), nr);           \
+#define __clear_guest_offset(hnd, off, nr) ({               \
+    unsigned long d_ = (unsigned long)(hnd).p;              \
+    __raw_clear_guest((void *)(d_ + (off) * sizeof(*(hnd).p)), \
+                      (nr) * sizeof(*(hnd).p));             \
 })
 
 #define __copy_from_guest_offset(ptr, hnd, off, nr) ({          \
-    const typeof(*(ptr)) *_s = (hnd).p;                         \
+    unsigned long s_ = (unsigned long)(hnd).p;                  \
     typeof(*(ptr)) *_d = (ptr);                                 \
-    __raw_copy_from_guest(_d, _s + (off), sizeof (*_d) * (nr)); \
+    __raw_copy_from_guest(_d,                                   \
+                          (const void *)(s_ + (off) * sizeof(*_d)), \
+                          (nr) * sizeof(*_d));                  \
 })
 
 #define __copy_field_to_guest(hnd, ptr, field) ({       \
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm/static-shmem: Static-shmem should be direct-mapped for direct-mapped domains
Message-Id: <E1sK0hx-0006ni-NW@xenbits.xenproject.org>
Date: Wed, 19 Jun 2024 19:11:01 +0000

commit cb1ddafdc57305a44e23f781decfdd31dea31189
Author:     Henry Wang <xin.wang2@amd.com>
AuthorDate: Tue Jun 18 17:27:51 2024 -0700
Commit:     Stefano Stabellini <stefano.stabellini@amd.com>
CommitDate: Tue Jun 18 17:27:51 2024 -0700

    xen/arm/static-shmem: Static-shmem should be direct-mapped for direct-mapped domains
    
    Currently, users are allowed to map static shared memory in a
    non-direct-mapped way for direct-mapped domains. This can lead to
    clashing of guest memory spaces. Also, the current extended region
    finding logic only removes the host physical addresses of the
    static shared memory areas for direct-mapped domains, which may be
    inconsistent with the guest memory map if users map the static
    shared memory in a non-direct-mapped way. This will lead to incorrect
    extended region calculation results.
    
    To make things easier, add restriction that static shared memory
    should also be direct-mapped for direct-mapped domains. Check the
    host physical address to be matched with guest physical address when
    parsing the device tree. Document this restriction in the doc.
    
    Signed-off-by: Henry Wang <xin.wang2@amd.com>
    Signed-off-by: Stefano Stabellini <stefano.stabellini@amd.com>
    Acked-by: Michal Orzel <michal.orzel@amd.com>
---
 docs/misc/arm/device-tree/booting.txt | 3 +++
 xen/arch/arm/static-shmem.c           | 6 ++++++
 2 files changed, 9 insertions(+)

diff --git a/docs/misc/arm/device-tree/booting.txt b/docs/misc/arm/device-tree/booting.txt
index aa0e614864..3a04f5c57f 100644
--- a/docs/misc/arm/device-tree/booting.txt
+++ b/docs/misc/arm/device-tree/booting.txt
@@ -607,6 +607,9 @@ communication.
     shared memory region in host physical address space, a size, and a guest
     physical address, as the target address of the mapping.
     e.g. xen,shared-mem = < [host physical address] [guest address] [size] >;
+    Note that if a domain is direct-mapped, i.e. the Dom0 and the Dom0less
+    DomUs with `direct-map` device tree property, the static shared memory
+    should also be direct-mapped (host physical address == guest address).
 
     It shall also meet the following criteria:
     1) If the SHM ID matches with an existing region, the address range of the
diff --git a/xen/arch/arm/static-shmem.c b/xen/arch/arm/static-shmem.c
index dbb017c7d7..c434b96e62 100644
--- a/xen/arch/arm/static-shmem.c
+++ b/xen/arch/arm/static-shmem.c
@@ -324,6 +324,12 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo,
             printk("%pd: static shared memory bank not found: '%s'", d, shm_id);
             return -ENOENT;
         }
+        if ( is_domain_direct_mapped(d) && (pbase != gbase) )
+        {
+            printk("%pd: physical address 0x%"PRIpaddr" and guest address 0x%"PRIpaddr" are not direct-mapped.\n",
+                   d, pbase, gbase);
+            return -EINVAL;
+        }
 
         pbase = boot_shm_bank->start;
         psize = boot_shm_bank->size;
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: Alloc XenStore page for Dom0less DomUs from hypervisor
Message-Id: <E1sK0i7-0006oL-Rn@xenbits.xenproject.org>
Date: Wed, 19 Jun 2024 19:11:11 +0000

commit 6f9d90ea943b5e0c5d11a71090c49bbfd79e97ea
Author:     Henry Wang <xin.wang2@amd.com>
AuthorDate: Fri May 24 15:55:20 2024 -0700
Commit:     Stefano Stabellini <stefano.stabellini@amd.com>
CommitDate: Tue Jun 18 17:32:41 2024 -0700

    xen/arm: Alloc XenStore page for Dom0less DomUs from hypervisor
    
    There are use cases (for example using the PV driver) in Dom0less
    setup that require Dom0less DomUs start immediately with Dom0, but
    initialize XenStore later after Dom0's successful boot and call to
    the init-dom0less application.
    
    An error message can seen from the init-dom0less application on
    1:1 direct-mapped domains:
    ```
    Allocating magic pages
    memory.c:238:d0v0 mfn 0x39000 doesn't belong to d1
    Error on alloc magic pages
    ```
    
    The "magic page" is a terminology used in the toolstack as reserved
    pages for the VM to have access to virtual platform capabilities.
    Currently the magic pages for Dom0less DomUs are populated by the
    init-dom0less app through populate_physmap(), and populate_physmap()
    automatically assumes gfn == mfn for 1:1 direct mapped domains. This
    cannot be true for the magic pages that are allocated later from the
    init-dom0less application executed in Dom0. For domain using statically
    allocated memory but not 1:1 direct-mapped, similar error "failed to
    retrieve a reserved page" can be seen as the reserved memory list is
    empty at that time.
    
    Since for init-dom0less, the magic page region is only for XenStore.
    To solve above issue, this commit allocates the XenStore page for
    Dom0less DomUs at the domain construction time. The PFN will be
    noted and communicated to the init-dom0less application executed
    from Dom0. To keep the XenStore late init protocol, set the connection
    status to XENSTORE_RECONNECT.
    
    Currently the GUEST_MAGIC_BASE in the init-dom0less application is
    hardcoded, which will lead to failures for 1:1 direct-mapped Dom0less
    DomUs.
    
    Since the guest magic region allocation from init-dom0less is for
    XenStore, and the XenStore page is now allocated from the hypervisor,
    instead of hardcoding the guest magic pages region, use
    xc_hvm_param_get() to get the XenStore page PFN. Rename alloc_xs_page()
    to get_xs_page() to reflect the changes.
    
    With this change, some existing code is not needed anymore, including:
    (1) The definition of the XenStore page offset.
    (2) Call to xc_domain_setmaxmem() and xc_clear_domain_page() as we
        don't need to set the max mem and clear the page anymore.
    (3) Foreign mapping of the XenStore page, setting of XenStore interface
        status and HVM_PARAM_STORE_PFN from init-dom0less, as they are set
        by the hypervisor.
    
    Take the opportunity to do some coding style improvements when possible.
    
    Reported-by: Alec Kwapis <alec.kwapis@medtronic.com>
    Suggested-by: Daniel P. Smith <dpsmith@apertussolutions.com>
    Signed-off-by: Henry Wang <xin.wang2@amd.com>
    Signed-off-by: Stefano Stabellini <stefano.stabellini@amd.com>
    Reviewed-by: Michal Orzel <michal.orzel@amd.com>
    Reviewed-by: Jason Andryuk <jason.andryuk@amd.com>
    Acked-by: Anthony PERARD <anthony.perard@vates.tech>
---
 tools/helpers/init-dom0less.c | 58 +++++++++++--------------------------------
 xen/arch/arm/dom0less-build.c | 58 ++++++++++++++++++++++++++++++++++++++++++-
 2 files changed, 71 insertions(+), 45 deletions(-)

diff --git a/tools/helpers/init-dom0less.c b/tools/helpers/init-dom0less.c
index fee93459c4..325527f040 100644
--- a/tools/helpers/init-dom0less.c
+++ b/tools/helpers/init-dom0less.c
@@ -16,30 +16,18 @@
 
 #include "init-dom-json.h"
 
-#define XENSTORE_PFN_OFFSET 1
 #define STR_MAX_LENGTH 128
 
-static int alloc_xs_page(struct xc_interface_core *xch,
-                         libxl_dominfo *info,
-                         uint64_t *xenstore_pfn)
+static int get_xs_page(struct xc_interface_core *xch, libxl_dominfo *info,
+                       uint64_t *xenstore_pfn)
 {
     int rc;
-    const xen_pfn_t base = GUEST_MAGIC_BASE >> XC_PAGE_SHIFT;
-    xen_pfn_t p2m = (GUEST_MAGIC_BASE >> XC_PAGE_SHIFT) + XENSTORE_PFN_OFFSET;
 
-    rc = xc_domain_setmaxmem(xch, info->domid,
-                             info->max_memkb + (XC_PAGE_SIZE/1024));
-    if (rc < 0)
-        return rc;
-
-    rc = xc_domain_populate_physmap_exact(xch, info->domid, 1, 0, 0, &p2m);
-    if (rc < 0)
-        return rc;
-
-    *xenstore_pfn = base + XENSTORE_PFN_OFFSET;
-    rc = xc_clear_domain_page(xch, info->domid, *xenstore_pfn);
-    if (rc < 0)
-        return rc;
+    rc = xc_hvm_param_get(xch, info->domid, HVM_PARAM_STORE_PFN, xenstore_pfn);
+    if (rc < 0) {
+        fprintf(stderr,"Failed to get HVM_PARAM_STORE_PFN\n");
+        return 1;
+    }
 
     return 0;
 }
@@ -100,6 +88,7 @@ static bool do_xs_write_vm(struct xs_handle *xsh, xs_transaction_t t,
  */
 static int create_xenstore(struct xs_handle *xsh,
                            libxl_dominfo *info, libxl_uuid uuid,
+                           uint64_t xenstore_pfn,
                            evtchn_port_t xenstore_port)
 {
     domid_t domid;
@@ -145,8 +134,7 @@ static int create_xenstore(struct xs_handle *xsh,
     rc = snprintf(target_memkb_str, STR_MAX_LENGTH, "%"PRIu64, info->current_memkb);
     if (rc < 0 || rc >= STR_MAX_LENGTH)
         return rc;
-    rc = snprintf(ring_ref_str, STR_MAX_LENGTH, "%lld",
-                  (GUEST_MAGIC_BASE >> XC_PAGE_SHIFT) + XENSTORE_PFN_OFFSET);
+    rc = snprintf(ring_ref_str, STR_MAX_LENGTH, "%"PRIu64, xenstore_pfn);
     if (rc < 0 || rc >= STR_MAX_LENGTH)
         return rc;
     rc = snprintf(xenstore_port_str, STR_MAX_LENGTH, "%u", xenstore_port);
@@ -230,7 +218,6 @@ static int init_domain(struct xs_handle *xsh,
     libxl_uuid uuid;
     uint64_t xenstore_evtchn, xenstore_pfn;
     int rc;
-    struct xenstore_domain_interface *intf;
 
     printf("Init dom0less domain: %u\n", info->domid);
 
@@ -245,20 +232,11 @@ static int init_domain(struct xs_handle *xsh,
     if (!xenstore_evtchn)
         return 0;
 
-    /* Alloc xenstore page */
-    if (alloc_xs_page(xch, info, &xenstore_pfn) != 0) {
-        printf("Error on alloc magic pages\n");
-        return 1;
-    }
-
-    intf = xenforeignmemory_map(xfh, info->domid, PROT_READ | PROT_WRITE, 1,
-                                &xenstore_pfn, NULL);
-    if (!intf) {
-        printf("Error mapping xenstore page\n");
+    /* Get xenstore page */
+    if (get_xs_page(xch, info, &xenstore_pfn) != 0) {
+        fprintf(stderr,"Error on getting xenstore page\n");
         return 1;
     }
-    intf->connection = XENSTORE_RECONNECT;
-    xenforeignmemory_unmap(xfh, intf, 1);
 
     rc = xc_dom_gnttab_seed(xch, info->domid, true,
                             (xen_pfn_t)-1, xenstore_pfn, 0, 0);
@@ -272,19 +250,11 @@ static int init_domain(struct xs_handle *xsh,
     if (rc)
         err(1, "gen_stub_json_config");
 
-    /* Now everything is ready: set HVM_PARAM_STORE_PFN */
-    rc = xc_hvm_param_set(xch, info->domid, HVM_PARAM_STORE_PFN,
-                          xenstore_pfn);
-    if (rc < 0)
-        return rc;
-
-    rc = create_xenstore(xsh, info, uuid, xenstore_evtchn);
+    rc = create_xenstore(xsh, info, uuid, xenstore_pfn, xenstore_evtchn);
     if (rc)
         err(1, "writing to xenstore");
 
-    rc = xs_introduce_domain(xsh, info->domid,
-            (GUEST_MAGIC_BASE >> XC_PAGE_SHIFT) + XENSTORE_PFN_OFFSET,
-            xenstore_evtchn);
+    rc = xs_introduce_domain(xsh, info->domid, xenstore_pfn, xenstore_evtchn);
     if (!rc)
         err(1, "xs_introduce_domain");
     return 0;
diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
index f919d3acf9..ef2ba85ff4 100644
--- a/xen/arch/arm/dom0less-build.c
+++ b/xen/arch/arm/dom0less-build.c
@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 #include <xen/device_tree.h>
+#include <xen/domain_page.h>
 #include <xen/err.h>
 #include <xen/event.h>
 #include <xen/grant_table.h>
@@ -10,6 +11,8 @@
 #include <xen/sizes.h>
 #include <xen/vmap.h>
 
+#include <public/io/xs_wire.h>
+
 #include <asm/arm64/sve.h>
 #include <asm/dom0less-build.h>
 #include <asm/domain_build.h>
@@ -739,6 +742,56 @@ static int __init alloc_xenstore_evtchn(struct domain *d)
     return 0;
 }
 
+#define XENSTORE_PFN_OFFSET 1
+static int __init alloc_xenstore_page(struct domain *d)
+{
+    struct page_info *xenstore_pg;
+    struct xenstore_domain_interface *interface;
+    mfn_t mfn;
+    gfn_t gfn;
+    int rc;
+
+    if ( (UINT_MAX - d->max_pages) < 1 )
+    {
+        printk(XENLOG_ERR "%pd: Over-allocation for d->max_pages by 1 page.\n",
+               d);
+        return -EINVAL;
+    }
+    d->max_pages += 1;
+    xenstore_pg = alloc_domheap_page(d, MEMF_bits(32));
+    if ( xenstore_pg == NULL && is_64bit_domain(d) )
+        xenstore_pg = alloc_domheap_page(d, 0);
+    if ( xenstore_pg == NULL )
+        return -ENOMEM;
+
+    mfn = page_to_mfn(xenstore_pg);
+    if ( !mfn_x(mfn) )
+    {
+        free_domheap_page(xenstore_pg);
+        return -ENOMEM;
+    }
+
+    if ( !is_domain_direct_mapped(d) )
+        gfn = gaddr_to_gfn(GUEST_MAGIC_BASE +
+                           (XENSTORE_PFN_OFFSET << PAGE_SHIFT));
+    else
+        gfn = gaddr_to_gfn(mfn_to_maddr(mfn));
+
+    rc = guest_physmap_add_page(d, gfn, mfn, 0);
+    if ( rc )
+    {
+        free_domheap_page(xenstore_pg);
+        return rc;
+    }
+
+    d->arch.hvm.params[HVM_PARAM_STORE_PFN] = gfn_x(gfn);
+    interface = map_domain_page(mfn);
+    interface->connection = XENSTORE_RECONNECT;
+    unmap_domain_page(interface);
+
+    return 0;
+}
+
 static int __init construct_domU(struct domain *d,
                                  const struct dt_device_node *node)
 {
@@ -839,7 +892,10 @@ static int __init construct_domU(struct domain *d,
         rc = alloc_xenstore_evtchn(d);
         if ( rc < 0 )
             return rc;
-        d->arch.hvm.params[HVM_PARAM_STORE_PFN] = ~0ULL;
+
+        rc = alloc_xenstore_page(d);
+        if ( rc < 0 )
+            return rc;
     }
 
     return rc;
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] docs/features/dom0less: Update the late XenStore init protocol
Message-Id: <E1sK0iH-0006qU-V4@xenbits.xenproject.org>
Date: Wed, 19 Jun 2024 19:11:21 +0000

commit 53c5c99e8744495395c1274595d6ca55947d1d6a
Author:     Henry Wang <xin.wang2@amd.com>
AuthorDate: Fri May 24 15:55:22 2024 -0700
Commit:     Stefano Stabellini <stefano.stabellini@amd.com>
CommitDate: Tue Jun 18 17:33:25 2024 -0700

    docs/features/dom0less: Update the late XenStore init protocol
    
    With the new allocation strategy of Dom0less DomUs XenStore page,
    update the doc of the late XenStore init protocol accordingly.
    
    Signed-off-by: Henry Wang <xin.wang2@amd.com>
    Reviewed-by: Michal Orzel <michal.orzel@amd.com>
---
 docs/features/dom0less.pandoc | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/docs/features/dom0less.pandoc b/docs/features/dom0less.pandoc
index 725afa0558..8b178edee0 100644
--- a/docs/features/dom0less.pandoc
+++ b/docs/features/dom0less.pandoc
@@ -110,9 +110,10 @@ hotplug PV drivers to dom0less guests. E.g. xl network-attach domU.
 The implementation works as follows:
 - Xen allocates the xenstore event channel for each dom0less domU that
   has the "xen,enhanced" property, and sets HVM_PARAM_STORE_EVTCHN
-- Xen does *not* allocate the xenstore page and sets HVM_PARAM_STORE_PFN
-  to ~0ULL (invalid)
-- Dom0less domU kernels check that HVM_PARAM_STORE_PFN is set to invalid
+- Xen allocates the xenstore page and sets HVM_PARAM_STORE_PFN as well
+  as the connection status to XENSTORE_RECONNECT.
+- Dom0less domU kernels check that HVM_PARAM_STORE_PFN is set to
+  ~0ULL (invalid) or the connection status is *not* XENSTORE_CONNECTED.
     - Old kernels will continue without xenstore support (Note: some old
       buggy kernels might crash because they don't check the validity of
       HVM_PARAM_STORE_PFN before using it! Disable "xen,enhanced" in
@@ -121,13 +122,14 @@ The implementation works as follows:
       channel (HVM_PARAM_STORE_EVTCHN) before continuing with the
       initialization
 - Once dom0 is booted, init-dom0less is executed:
-    - it allocates the xenstore shared page and sets HVM_PARAM_STORE_PFN
+    - it gets the xenstore shared page from HVM_PARAM_STORE_PFN
     - it calls xs_introduce_domain
 - Xenstored notices the new domain, initializes interfaces as usual, and
   sends an event channel notification to the domain using the xenstore
   event channel (HVM_PARAM_STORE_EVTCHN)
 - The Linux domU kernel receives the event channel notification, checks
-  HVM_PARAM_STORE_PFN again and continue with the initialization
+  HVM_PARAM_STORE_PFN and the connection status again and continue with
+  the initialization
 
 
 Limitations
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: static-shmem: fix "gbase/pbase used uninitialized" build failure
Message-Id: <E1sKBwk-0007HO-C0@xenbits.xenproject.org>
Date: Thu, 20 Jun 2024 07:11:02 +0000

commit 988f1c7e1f40f85f5654784e5f702ed54904ca9d
Author:     Michal Orzel <michal.orzel@amd.com>
AuthorDate: Wed Jun 19 08:46:52 2024 +0200
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 19 12:32:27 2024 +0100

    xen/arm: static-shmem: fix "gbase/pbase used uninitialized" build failure
    
    Building Xen with CONFIG_STATIC_SHM=y results in a build failure:
    
    arch/arm/static-shmem.c: In function 'process_shm':
    arch/arm/static-shmem.c:327:41: error: 'gbase' may be used uninitialized [-Werror=maybe-uninitialized]
      327 |         if ( is_domain_direct_mapped(d) && (pbase != gbase) )
    arch/arm/static-shmem.c:305:17: note: 'gbase' was declared here
      305 |         paddr_t gbase, pbase, psize;
    
    This is because the commit cb1ddafdc573 adds a check referencing
    gbase/pbase variables which were not yet assigned a value. Fix it.
    
    Fixes: cb1ddafdc573 ("xen/arm/static-shmem: Static-shmem should be direct-mapped for direct-mapped domains")
    Signed-off-by: Michal Orzel <michal.orzel@amd.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
---
 xen/arch/arm/static-shmem.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/xen/arch/arm/static-shmem.c b/xen/arch/arm/static-shmem.c
index c434b96e62..cd48d2896b 100644
--- a/xen/arch/arm/static-shmem.c
+++ b/xen/arch/arm/static-shmem.c
@@ -324,12 +324,6 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo,
             printk("%pd: static shared memory bank not found: '%s'", d, shm_id);
             return -ENOENT;
         }
-        if ( is_domain_direct_mapped(d) && (pbase != gbase) )
-        {
-            printk("%pd: physical address 0x%"PRIpaddr" and guest address 0x%"PRIpaddr" are not direct-mapped.\n",
-                   d, pbase, gbase);
-            return -EINVAL;
-        }
 
         pbase = boot_shm_bank->start;
         psize = boot_shm_bank->size;
@@ -353,6 +347,13 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo,
             /* guest phys address is after host phys address */
             gbase = dt_read_paddr(cells + addr_cells, addr_cells);
 
+            if ( is_domain_direct_mapped(d) && (pbase != gbase) )
+            {
+                printk("%pd: physical address 0x%"PRIpaddr" and guest address 0x%"PRIpaddr" are not direct-mapped.\n",
+                       d, pbase, gbase);
+                return -EINVAL;
+            }
+
             for ( i = 0; i < PFN_DOWN(psize); i++ )
                 if ( !mfn_valid(mfn_add(maddr_to_mfn(pbase), i)) )
                 {
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] Revert "docs/features/dom0less: Update the late XenStore init protocol"
Message-Id: <E1sKBwu-0007IA-FN@xenbits.xenproject.org>
Date: Thu, 20 Jun 2024 07:11:12 +0000

commit 443c488a0b3676b5c001069d14890cd8d0ec2c1d
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Wed Jun 19 12:47:28 2024 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 19 12:48:44 2024 +0100

    Revert "docs/features/dom0less: Update the late XenStore init protocol"
    
    Michal reported that the gitlab CI is failing because of this series
    [1].
    
    This reverts commit 53c5c99e8744495395c1274595d6ca55947d1d6a.
    
    [1] https://gitlab.com/xen-project/xen/-/pipelines/1338067978
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
---
 docs/features/dom0less.pandoc | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/docs/features/dom0less.pandoc b/docs/features/dom0less.pandoc
index 8b178edee0..725afa0558 100644
--- a/docs/features/dom0less.pandoc
+++ b/docs/features/dom0less.pandoc
@@ -110,10 +110,9 @@ hotplug PV drivers to dom0less guests. E.g. xl network-attach domU.
 The implementation works as follows:
 - Xen allocates the xenstore event channel for each dom0less domU that
   has the "xen,enhanced" property, and sets HVM_PARAM_STORE_EVTCHN
-- Xen allocates the xenstore page and sets HVM_PARAM_STORE_PFN as well
-  as the connection status to XENSTORE_RECONNECT.
-- Dom0less domU kernels check that HVM_PARAM_STORE_PFN is set to
-  ~0ULL (invalid) or the connection status is *not* XENSTORE_CONNECTED.
+- Xen does *not* allocate the xenstore page and sets HVM_PARAM_STORE_PFN
+  to ~0ULL (invalid)
+- Dom0less domU kernels check that HVM_PARAM_STORE_PFN is set to invalid
     - Old kernels will continue without xenstore support (Note: some old
       buggy kernels might crash because they don't check the validity of
       HVM_PARAM_STORE_PFN before using it! Disable "xen,enhanced" in
@@ -122,14 +121,13 @@ The implementation works as follows:
       channel (HVM_PARAM_STORE_EVTCHN) before continuing with the
       initialization
 - Once dom0 is booted, init-dom0less is executed:
-    - it gets the xenstore shared page from HVM_PARAM_STORE_PFN
+    - it allocates the xenstore shared page and sets HVM_PARAM_STORE_PFN
     - it calls xs_introduce_domain
 - Xenstored notices the new domain, initializes interfaces as usual, and
   sends an event channel notification to the domain using the xenstore
   event channel (HVM_PARAM_STORE_EVTCHN)
 - The Linux domU kernel receives the event channel notification, checks
-  HVM_PARAM_STORE_PFN and the connection status again and continue with
-  the initialization
+  HVM_PARAM_STORE_PFN again and continue with the initialization
 
 
 Limitations
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] Revert "xen/arm: Alloc XenStore page for Dom0less DomUs from hypervisor"
Message-Id: <E1sKBx4-0007KN-J3@xenbits.xenproject.org>
Date: Thu, 20 Jun 2024 07:11:22 +0000

commit efa6e9f15ba943d154e8d7b29384581915b2aacd
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Wed Jun 19 12:48:09 2024 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 19 12:48:47 2024 +0100

    Revert "xen/arm: Alloc XenStore page for Dom0less DomUs from hypervisor"
    
    Michal reported that the gitlab CI is failing because of this series
    [1].
    
    This reverts commit 6f9d90ea943b5e0c5d11a71090c49bbfd79e97ea.
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
---
 tools/helpers/init-dom0less.c | 58 ++++++++++++++++++++++++++++++++-----------
 xen/arch/arm/dom0less-build.c | 58 +------------------------------------------
 2 files changed, 45 insertions(+), 71 deletions(-)

diff --git a/tools/helpers/init-dom0less.c b/tools/helpers/init-dom0less.c
index 325527f040..fee93459c4 100644
--- a/tools/helpers/init-dom0less.c
+++ b/tools/helpers/init-dom0less.c
@@ -16,18 +16,30 @@
 
 #include "init-dom-json.h"
 
+#define XENSTORE_PFN_OFFSET 1
 #define STR_MAX_LENGTH 128
 
-static int get_xs_page(struct xc_interface_core *xch, libxl_dominfo *info,
-                       uint64_t *xenstore_pfn)
+static int alloc_xs_page(struct xc_interface_core *xch,
+                         libxl_dominfo *info,
+                         uint64_t *xenstore_pfn)
 {
     int rc;
+    const xen_pfn_t base = GUEST_MAGIC_BASE >> XC_PAGE_SHIFT;
+    xen_pfn_t p2m = (GUEST_MAGIC_BASE >> XC_PAGE_SHIFT) + XENSTORE_PFN_OFFSET;
 
-    rc = xc_hvm_param_get(xch, info->domid, HVM_PARAM_STORE_PFN, xenstore_pfn);
-    if (rc < 0) {
-        fprintf(stderr,"Failed to get HVM_PARAM_STORE_PFN\n");
-        return 1;
-    }
+    rc = xc_domain_setmaxmem(xch, info->domid,
+                             info->max_memkb + (XC_PAGE_SIZE/1024));
+    if (rc < 0)
+        return rc;
+
+    rc = xc_domain_populate_physmap_exact(xch, info->domid, 1, 0, 0, &p2m);
+    if (rc < 0)
+        return rc;
+
+    *xenstore_pfn = base + XENSTORE_PFN_OFFSET;
+    rc = xc_clear_domain_page(xch, info->domid, *xenstore_pfn);
+    if (rc < 0)
+        return rc;
 
     return 0;
 }
@@ -88,7 +100,6 @@ static bool do_xs_write_vm(struct xs_handle *xsh, xs_transaction_t t,
  */
 static int create_xenstore(struct xs_handle *xsh,
                            libxl_dominfo *info, libxl_uuid uuid,
-                           uint64_t xenstore_pfn,
                            evtchn_port_t xenstore_port)
 {
     domid_t domid;
@@ -134,7 +145,8 @@ static int create_xenstore(struct xs_handle *xsh,
     rc = snprintf(target_memkb_str, STR_MAX_LENGTH, "%"PRIu64, info->current_memkb);
     if (rc < 0 || rc >= STR_MAX_LENGTH)
         return rc;
-    rc = snprintf(ring_ref_str, STR_MAX_LENGTH, "%"PRIu64, xenstore_pfn);
+    rc = snprintf(ring_ref_str, STR_MAX_LENGTH, "%lld",
+                  (GUEST_MAGIC_BASE >> XC_PAGE_SHIFT) + XENSTORE_PFN_OFFSET);
     if (rc < 0 || rc >= STR_MAX_LENGTH)
         return rc;
     rc = snprintf(xenstore_port_str, STR_MAX_LENGTH, "%u", xenstore_port);
@@ -218,6 +230,7 @@ static int init_domain(struct xs_handle *xsh,
     libxl_uuid uuid;
     uint64_t xenstore_evtchn, xenstore_pfn;
     int rc;
+    struct xenstore_domain_interface *intf;
 
     printf("Init dom0less domain: %u\n", info->domid);
 
@@ -232,11 +245,20 @@ static int init_domain(struct xs_handle *xsh,
     if (!xenstore_evtchn)
         return 0;
 
-    /* Get xenstore page */
-    if (get_xs_page(xch, info, &xenstore_pfn) != 0) {
-        fprintf(stderr,"Error on getting xenstore page\n");
+    /* Alloc xenstore page */
+    if (alloc_xs_page(xch, info, &xenstore_pfn) != 0) {
+        printf("Error on alloc magic pages\n");
+        return 1;
+    }
+
+    intf = xenforeignmemory_map(xfh, info->domid, PROT_READ | PROT_WRITE, 1,
+                                &xenstore_pfn, NULL);
+    if (!intf) {
+        printf("Error mapping xenstore page\n");
         return 1;
     }
+    intf->connection = XENSTORE_RECONNECT;
+    xenforeignmemory_unmap(xfh, intf, 1);
 
     rc = xc_dom_gnttab_seed(xch, info->domid, true,
                             (xen_pfn_t)-1, xenstore_pfn, 0, 0);
@@ -250,11 +272,19 @@ static int init_domain(struct xs_handle *xsh,
     if (rc)
         err(1, "gen_stub_json_config");
 
-    rc = create_xenstore(xsh, info, uuid, xenstore_pfn, xenstore_evtchn);
+    /* Now everything is ready: set HVM_PARAM_STORE_PFN */
+    rc = xc_hvm_param_set(xch, info->domid, HVM_PARAM_STORE_PFN,
+                          xenstore_pfn);
+    if (rc < 0)
+        return rc;
+
+    rc = create_xenstore(xsh, info, uuid, xenstore_evtchn);
     if (rc)
         err(1, "writing to xenstore");
 
-    rc = xs_introduce_domain(xsh, info->domid, xenstore_pfn, xenstore_evtchn);
+    rc = xs_introduce_domain(xsh, info->domid,
+            (GUEST_MAGIC_BASE >> XC_PAGE_SHIFT) + XENSTORE_PFN_OFFSET,
+            xenstore_evtchn);
     if (!rc)
         err(1, "xs_introduce_domain");
     return 0;
diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
index ef2ba85ff4..f919d3acf9 100644
--- a/xen/arch/arm/dom0less-build.c
+++ b/xen/arch/arm/dom0less-build.c
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 #include <xen/device_tree.h>
-#include <xen/domain_page.h>
 #include <xen/err.h>
 #include <xen/event.h>
 #include <xen/grant_table.h>
@@ -11,8 +10,6 @@
 #include <xen/sizes.h>
 #include <xen/vmap.h>
 
-#include <public/io/xs_wire.h>
-
 #include <asm/arm64/sve.h>
 #include <asm/dom0less-build.h>
 #include <asm/domain_build.h>
@@ -742,56 +739,6 @@ static int __init alloc_xenstore_evtchn(struct domain *d)
     return 0;
 }
 
-#define XENSTORE_PFN_OFFSET 1
-static int __init alloc_xenstore_page(struct domain *d)
-{
-    struct page_info *xenstore_pg;
-    struct xenstore_domain_interface *interface;
-    mfn_t mfn;
-    gfn_t gfn;
-    int rc;
-
-    if ( (UINT_MAX - d->max_pages) < 1 )
-    {
-        printk(XENLOG_ERR "%pd: Over-allocation for d->max_pages by 1 page.\n",
-               d);
-        return -EINVAL;
-    }
-    d->max_pages += 1;
-    xenstore_pg = alloc_domheap_page(d, MEMF_bits(32));
-    if ( xenstore_pg == NULL && is_64bit_domain(d) )
-        xenstore_pg = alloc_domheap_page(d, 0);
-    if ( xenstore_pg == NULL )
-        return -ENOMEM;
-
-    mfn = page_to_mfn(xenstore_pg);
-    if ( !mfn_x(mfn) )
-    {
-        free_domheap_page(xenstore_pg);
-        return -ENOMEM;
-    }
-
-    if ( !is_domain_direct_mapped(d) )
-        gfn = gaddr_to_gfn(GUEST_MAGIC_BASE +
-                           (XENSTORE_PFN_OFFSET << PAGE_SHIFT));
-    else
-        gfn = gaddr_to_gfn(mfn_to_maddr(mfn));
-
-    rc = guest_physmap_add_page(d, gfn, mfn, 0);
-    if ( rc )
-    {
-        free_domheap_page(xenstore_pg);
-        return rc;
-    }
-
-    d->arch.hvm.params[HVM_PARAM_STORE_PFN] = gfn_x(gfn);
-    interface = map_domain_page(mfn);
-    interface->connection = XENSTORE_RECONNECT;
-    unmap_domain_page(interface);
-
-    return 0;
-}
-
 static int __init construct_domU(struct domain *d,
                                  const struct dt_device_node *node)
 {
@@ -892,10 +839,7 @@ static int __init construct_domU(struct domain *d,
         rc = alloc_xenstore_evtchn(d);
         if ( rc < 0 )
             return rc;
-
-        rc = alloc_xenstore_page(d);
-        if ( rc < 0 )
-            return rc;
+        d->arch.hvm.params[HVM_PARAM_STORE_PFN] = ~0ULL;
     }
 
     return rc;
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] hotplug: Restore block-tap phy compatibility
Message-Id: <E1sKEvb-0001Ma-8d@xenbits.xenproject.org>
Date: Thu, 20 Jun 2024 10:22:03 +0000

commit f16ac12bd4181177a7d953f88ef301287f587380
Author:     Jason Andryuk <jason.andryuk@amd.com>
AuthorDate: Thu Jun 20 12:08:42 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 20 12:08:42 2024 +0200

    hotplug: Restore block-tap phy compatibility
    
    backendtype=phy using the blktap kernel module needs to use write_dev,
    but tapback can't support that.  tapback should perform better, but make
    the script compatible with the old kernel module again.
    
    Fixes: 76a484193d ("hotplug: Update block-tap")
    Signed-off-by: Jason Andryuk <jason.andryuk@amd.com>
    Acked-by: Anthony PERARD <anthony.perard@vates.tech>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 tools/hotplug/Linux/block-tap | 21 +++++++++++++++------
 1 file changed, 15 insertions(+), 6 deletions(-)

diff --git a/tools/hotplug/Linux/block-tap b/tools/hotplug/Linux/block-tap
index 126e472786..8661ce77e3 100755
--- a/tools/hotplug/Linux/block-tap
+++ b/tools/hotplug/Linux/block-tap
@@ -20,9 +20,13 @@
 #
 # Disks should be specified using the following syntax:
 #
+# For use with tapback (vbd3) (preferred):
 # vdev=xvda,backendtype=tap,format=vhd,target=/srv/target.vhd
 #
-# format is either "aio" (for raw files), or "vhd"
+# For use with blkback and the blktap2 kernel module:
+# script=block-tap,vdev=xvda,target=<type>:<file>
+#
+# format/<type> is either "aio" (for raw files), or "vhd"
 
 dir=$(dirname "$0")
 . "$dir/block-common.sh"
@@ -205,12 +209,17 @@ add()
 
     xenstore_write "$XENBUS_PATH/pid" "$pid"
     xenstore_write "$XENBUS_PATH/minor" "$minor"
-    # dev, as a unix socket, would end up with major:minor 0:0 in
-    # physical-device if write_dev were used.  tapback would be thrown off by
-    # that incorrect minor, so just skip writing physical-device.
-    xenstore_write "$XENBUS_PATH/physical-device-path" "$dev"
 
-    success
+    if [ "$XENBUS_TYPE" = "vbd3" ] ; then
+        # $dev, as a unix socket, has major:minor 0:0.  If write_dev writes
+        # physical-device, tapback would use that incorrect minor 0.  So don't
+        # write physical-device.
+        xenstore_write "$XENBUS_PATH/physical-device-path" "$dev"
+
+        success
+    else
+        write_dev "$dev"
+    fi
 
     release_lock "block"
 }
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] tools/libs/light: Fix nic->vlan memory allocation
Message-Id: <E1sKEvl-0001NE-Bl@xenbits.xenproject.org>
Date: Thu, 20 Jun 2024 10:22:13 +0000

commit 74970165bab8924898f3ad186364bf96310e8e4e
Author:     Leigh Brown <leigh@solinno.co.uk>
AuthorDate: Thu Jun 20 12:09:02 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 20 12:09:02 2024 +0200

    tools/libs/light: Fix nic->vlan memory allocation
    
    After the following commit:
    3bc14e4fa4b9 ("tools/libs/light: Add vlan field to libxl_device_nic")
    xl list -l aborts with a double free error if a domain has at least
    one vif defined:
    
      $ sudo xl list -l
      free(): double free detected in tcache 2
      Aborted
    
    Orginally, the vlan field was called vid and was defined as an integer.
    It was appropriate to call libxl__xs_read_checked() with gc passed as
    the string data was copied to a different variable.  However, the final
    version uses a string data type and the call should have been changed
    to use NOGC instead of gc to allow that data to live past the gc
    controlled lifetime, in line with the other string fields.
    
    This patch makes the change to pass NOGC instead of gc and moves the
    new code to be next to the other string fields (fixing a couple of
    errant tabs along the way), as recommended by Jason.
    
    Fixes: 3bc14e4fa4b9 ("tools/libs/light: Add vlan field to libxl_device_nic")
    Signed-off-by: Leigh Brown <leigh@solinno.co.uk>
    Reviewed-by: Jason Andryuk <jason.andryuk@amd.com>
    Acked-by: Anthony PERARD <anthony.perard@vates.tech>
    Release-acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 tools/libs/light/libxl_nic.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/tools/libs/light/libxl_nic.c b/tools/libs/light/libxl_nic.c
index d861e3726d..300a96a8b1 100644
--- a/tools/libs/light/libxl_nic.c
+++ b/tools/libs/light/libxl_nic.c
@@ -318,11 +318,6 @@ static int libxl__nic_from_xenstore(libxl__gc *gc, const char *libxl_path,
         nic->mtu = LIBXL_DEVICE_NIC_MTU_DEFAULT;
     }
 
-    rc = libxl__xs_read_checked(gc, XBT_NULL,
-                                GCSPRINTF("%s/vlan", libxl_path),
-				(const char **)(&nic->vlan));
-    if (rc) goto out;
-
     rc = libxl__xs_read_checked(gc, XBT_NULL,
                                 GCSPRINTF("%s/mac", libxl_path), &tmp);
     if (rc) goto out;
@@ -345,6 +340,10 @@ static int libxl__nic_from_xenstore(libxl__gc *gc, const char *libxl_path,
                                 GCSPRINTF("%s/script", libxl_path),
                                 (const char **)(&nic->script));
     if (rc) goto out;
+    rc = libxl__xs_read_checked(NOGC, XBT_NULL,
+                                GCSPRINTF("%s/vlan", libxl_path),
+                                (const char **)(&nic->vlan));
+    if (rc) goto out;
     rc = libxl__xs_read_checked(NOGC, XBT_NULL,
                                 GCSPRINTF("%s/forwarddev", libxl_path),
                                 (const char **)(&nic->coloft_forwarddev));
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/irq: forward pending interrupts to new destination in fixup_irqs()
Message-Id: <E1sKEvv-0001Oc-F2@xenbits.xenproject.org>
Date: Thu, 20 Jun 2024 10:22:23 +0000

commit e2bb28d621584fce15c907002ddc7c6772644b64
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Thu Jun 20 12:09:32 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 20 12:09:32 2024 +0200

    x86/irq: forward pending interrupts to new destination in fixup_irqs()
    
    fixup_irqs() is used to evacuate interrupts from to be offlined CPUs.  Given
    the CPU is to become offline, the normal migration logic used by Xen where the
    vector in the previous target(s) is left configured until the interrupt is
    received on the new destination is not suitable.
    
    Instead attempt to do as much as possible in order to prevent loosing
    interrupts.  If fixup_irqs() is called from the CPU to be offlined (as is
    currently the case for CPU hot unplug) attempt to forward pending vectors when
    interrupts that target the current CPU are migrated to a different destination.
    
    Additionally, for interrupts that have already been moved from the current CPU
    prior to the call to fixup_irqs() but that haven't been delivered to the new
    destination (iow: interrupts with move_in_progress set and the current CPU set
    in ->arch.old_cpu_mask) also check whether the previous vector is pending and
    forward it to the new destination.
    
    This allows us to remove the window with interrupts enabled at the bottom of
    fixup_irqs().  Such window wasn't safe anyway: references to the CPU to become
    offline are removed from interrupts masks, but the per-CPU vector_irq[] array
    is not updated to reflect those changes (as the CPU is going offline anyway).
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/include/asm/apic.h |  5 +++++
 xen/arch/x86/irq.c              | 46 +++++++++++++++++++++++++++++++++++------
 2 files changed, 45 insertions(+), 6 deletions(-)

diff --git a/xen/arch/x86/include/asm/apic.h b/xen/arch/x86/include/asm/apic.h
index d1cb001fb4..7bd66dc6e1 100644
--- a/xen/arch/x86/include/asm/apic.h
+++ b/xen/arch/x86/include/asm/apic.h
@@ -132,6 +132,11 @@ static inline bool apic_isr_read(uint8_t vector)
             (vector & 0x1f)) & 1;
 }
 
+static inline bool apic_irr_read(unsigned int vector)
+{
+    return apic_read(APIC_IRR + (vector / 32 * 0x10)) & (1U << (vector % 32));
+}
+
 static inline u32 get_apic_id(void)
 {
     u32 id = apic_read(APIC_ID);
diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index d7f15c38af..9a611c79e0 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2591,7 +2591,7 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
 
     for ( irq = 0; irq < nr_irqs; irq++ )
     {
-        bool break_affinity = false, set_affinity = true;
+        bool break_affinity = false, set_affinity = true, check_irr = false;
         unsigned int vector, cpu = smp_processor_id();
         cpumask_t *affinity = this_cpu(scratch_cpumask);
 
@@ -2644,6 +2644,25 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
              !cpu_online(cpu) &&
              cpumask_test_cpu(cpu, desc->arch.old_cpu_mask) )
         {
+            /*
+             * This to be offlined CPU was the target of an interrupt that's
+             * been moved, and the new destination target hasn't yet
+             * acknowledged any interrupt from it.
+             *
+             * We know the interrupt is configured to target the new CPU at
+             * this point, so we can check IRR for any pending vectors and
+             * forward them to the new destination.
+             *
+             * Note that for the other case of an interrupt movement being in
+             * progress (move_cleanup_count being non-zero) we know the new
+             * destination has already acked at least one interrupt from this
+             * source, and hence there's no need to forward any stale
+             * interrupts.
+             */
+            if ( apic_irr_read(desc->arch.old_vector) )
+                send_IPI_mask(cpumask_of(cpumask_any(desc->arch.cpu_mask)),
+                              desc->arch.vector);
+
             /*
              * This CPU is going offline, remove it from ->arch.old_cpu_mask
              * and possibly release the old vector if the old mask becomes
@@ -2684,6 +2703,14 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
         if ( desc->handler->disable )
             desc->handler->disable(desc);
 
+        /*
+         * If the current CPU is going offline and is (one of) the target(s) of
+         * the interrupt, signal to check whether there are any pending vectors
+         * to be handled in the local APIC after the interrupt has been moved.
+         */
+        if ( !cpu_online(cpu) && cpumask_test_cpu(cpu, desc->arch.cpu_mask) )
+            check_irr = true;
+
         if ( desc->handler->set_affinity )
             desc->handler->set_affinity(desc, affinity);
         else if ( !(warned++) )
@@ -2694,6 +2721,18 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
 
         cpumask_copy(affinity, desc->affinity);
 
+        if ( check_irr && apic_irr_read(vector) )
+            /*
+             * Forward pending interrupt to the new destination, this CPU is
+             * going offline and otherwise the interrupt would be lost.
+             *
+             * Do the IRR check as late as possible before releasing the irq
+             * desc in order for any in-flight interrupts to be delivered to
+             * the lapic.
+             */
+            send_IPI_mask(cpumask_of(cpumask_any(desc->arch.cpu_mask)),
+                          desc->arch.vector);
+
         spin_unlock(&desc->lock);
 
         if ( !verbose )
@@ -2705,11 +2744,6 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
             printk("Broke affinity for IRQ%u, new: {%*pbl}\n",
                    irq, CPUMASK_PR(affinity));
     }
-
-    /* That doesn't seem sufficient.  Give it 1ms. */
-    local_irq_enable();
-    mdelay(1);
-    local_irq_disable();
 }
 
 void fixup_eoi(void)
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] livepatch: use appropriate type for buffer offset variables
Message-Id: <E1sKEw5-0001P8-JM@xenbits.xenproject.org>
Date: Thu, 20 Jun 2024 10:22:33 +0000

commit 62071a1c16c4dbe765491e58e456fd3a19b33298
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Thu Jun 20 12:10:27 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 20 12:10:27 2024 +0200

    livepatch: use appropriate type for buffer offset variables
    
    As was made noticeable by the last of the commits referenced below,
    using a fixed-size type for such purposes is not only against
    ./CODING_STYLE, but can lead to actual issues. Switch to using size_t
    instead, thus also allowing calculations to be lighter-weight in 32-bit
    builds.
    
    No functional change for 64-bit builds.
    
    Link: https://gitlab.com/xen-project/xen/-/jobs/7136417308
    Fixes: b145b4a39c13 ("livepatch: Handle arbitrary size names with the list operation")
    Fixes: 5083e0ff939d ("livepatch: Add metadata runtime retrieval mechanism")
    Fixes: 43d5c5d5f70b ("xen: avoid UB in guest handle arithmetic")
    Reported-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Ross Lagerwall <ross.lagerwall@citrix.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/common/livepatch.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/common/livepatch.c b/xen/common/livepatch.c
index 502e264bc6..d93a556bcd 100644
--- a/xen/common/livepatch.c
+++ b/xen/common/livepatch.c
@@ -1252,7 +1252,7 @@ static int livepatch_list(struct xen_sysctl_livepatch_list *list)
     list->metadata_total_size = 0;
     if ( list->nr )
     {
-        uint64_t name_offset = 0, metadata_offset = 0;
+        size_t name_offset = 0, metadata_offset = 0;
 
         list_for_each_entry( data, &payload_list, list )
         {
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/irq: Address MISRA Rule 8.3 violation
Message-Id: <E1sKYwD-0002Fq-Oq@xenbits.xenproject.org>
Date: Fri, 21 Jun 2024 07:44:01 +0000

commit 82f480944718d9e8340a6ac1af41ece7851115bf
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Tue Jun 18 13:48:35 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Wed Jun 19 13:00:06 2024 +0100

    xen/irq: Address MISRA Rule 8.3 violation
    
    When centralising irq_ack_none(), different architectures had different names
    for the parameter.  As it's type is struct irq_desc *, it should be named
    desc.  Make this consistent.
    
    No functional change.
    
    Fixes: 8aeda4a241ab ("arch/irq: Make irq_ack_none() mandatory")
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/irq.c    | 4 ++--
 xen/include/xen/irq.h | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c
index c60502444c..6b89f64fd1 100644
--- a/xen/arch/arm/irq.c
+++ b/xen/arch/arm/irq.c
@@ -31,9 +31,9 @@ struct irq_guest
     unsigned int virq;
 };
 
-void irq_ack_none(struct irq_desc *irq)
+void irq_ack_none(struct irq_desc *desc)
 {
-    printk("unexpected IRQ trap at irq %02x\n", irq->irq);
+    printk("unexpected IRQ trap at irq %02x\n", desc->irq);
 }
 
 void irq_end_none(struct irq_desc *irq)
diff --git a/xen/include/xen/irq.h b/xen/include/xen/irq.h
index adf33547d2..580ae37e74 100644
--- a/xen/include/xen/irq.h
+++ b/xen/include/xen/irq.h
@@ -134,7 +134,7 @@ void cf_check irq_actor_none(struct irq_desc *desc);
  * irq_ack_none() must be provided by the architecture.
  * irq_end_none() is optional, and opted into using a define.
  */
-void cf_check irq_ack_none(struct irq_desc *irq);
+void cf_check irq_ack_none(struct irq_desc *desc);
 
 /*
  * Per-cpu interrupted context register state - the inner-most interrupt frame
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arch: Centralise __read_mostly and __ro_after_init
Message-Id: <E1sKYwN-0002GV-Sq@xenbits.xenproject.org>
Date: Fri, 21 Jun 2024 07:44:11 +0000

commit aba98c8d671bd290e978ec154d0baf042e093a65
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Fri Jun 14 13:05:40 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Wed Jun 19 13:00:06 2024 +0100

    xen/arch: Centralise __read_mostly and __ro_after_init
    
    These living in cache.h is inherited from Linux, but cache.h is not a terribly
    appropriately location for them to live.
    
    __read_mostly is an optimisation related to data placement in order to avoid
    having shared data in cachelines that are likely to be written to, but it
    really is just a section of the linked image separating data by usage
    patterns; it has nothing to do with cache sizes or flushing logic.
    
    Worse, __ro_after_init was only in xen/cache.h because __read_mostly was in
    arch/cache.h, and has literally nothing whatsoever to do with caches.
    
    Move the definitions into xen/sections.h, which in particular means that
    RISC-V doesn't need to repeat the problematic pattern.  Take the opportunity
    to provide a short descriptions of what these are used for.
    
    For now, leave TODO comments next to the other identical definitions.  It
    turns out that unpicking cache.h is more complicated than it appears because a
    number of files use it for transitive dependencies.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/include/asm/cache.h |  1 +
 xen/arch/ppc/include/asm/cache.h |  1 +
 xen/arch/x86/include/asm/cache.h |  1 +
 xen/include/xen/cache.h          |  1 +
 xen/include/xen/sections.h       | 21 +++++++++++++++++++++
 5 files changed, 25 insertions(+)

diff --git a/xen/arch/arm/include/asm/cache.h b/xen/arch/arm/include/asm/cache.h
index 240b6ae0ea..029b2896fb 100644
--- a/xen/arch/arm/include/asm/cache.h
+++ b/xen/arch/arm/include/asm/cache.h
@@ -6,6 +6,7 @@
 #define L1_CACHE_SHIFT  (CONFIG_ARM_L1_CACHE_SHIFT)
 #define L1_CACHE_BYTES  (1 << L1_CACHE_SHIFT)
 
+/* TODO: Phase out the use of this via cache.h */
 #define __read_mostly __section(".data.read_mostly")
 
 #endif
diff --git a/xen/arch/ppc/include/asm/cache.h b/xen/arch/ppc/include/asm/cache.h
index 0d7323d789..13c0bf3242 100644
--- a/xen/arch/ppc/include/asm/cache.h
+++ b/xen/arch/ppc/include/asm/cache.h
@@ -3,6 +3,7 @@
 #ifndef _ASM_PPC_CACHE_H
 #define _ASM_PPC_CACHE_H
 
+/* TODO: Phase out the use of this via cache.h */
 #define __read_mostly __section(".data.read_mostly")
 
 #endif /* _ASM_PPC_CACHE_H */
diff --git a/xen/arch/x86/include/asm/cache.h b/xen/arch/x86/include/asm/cache.h
index e4770efb22..956c05493e 100644
--- a/xen/arch/x86/include/asm/cache.h
+++ b/xen/arch/x86/include/asm/cache.h
@@ -9,6 +9,7 @@
 #define L1_CACHE_SHIFT	(CONFIG_X86_L1_CACHE_SHIFT)
 #define L1_CACHE_BYTES	(1 << L1_CACHE_SHIFT)
 
+/* TODO: Phase out the use of this via cache.h */
 #define __read_mostly __section(".data.read_mostly")
 
 #ifndef __ASSEMBLY__
diff --git a/xen/include/xen/cache.h b/xen/include/xen/cache.h
index f52a0aedf7..55456823c5 100644
--- a/xen/include/xen/cache.h
+++ b/xen/include/xen/cache.h
@@ -15,6 +15,7 @@
 #define __cacheline_aligned __attribute__((__aligned__(SMP_CACHE_BYTES)))
 #endif
 
+/* TODO: Phase out the use of this via cache.h */
 #define __ro_after_init __section(".data.ro_after_init")
 
 #endif /* __LINUX_CACHE_H */
diff --git a/xen/include/xen/sections.h b/xen/include/xen/sections.h
index b6cb5604c2..f2fac8d7fa 100644
--- a/xen/include/xen/sections.h
+++ b/xen/include/xen/sections.h
@@ -3,9 +3,30 @@
 #ifndef __XEN_SECTIONS_H__
 #define __XEN_SECTIONS_H__
 
+#include <xen/compiler.h>
+
 /* SAF-0-safe */
 extern char __init_begin[], __init_end[];
 
+/*
+ * Some data is expected to be written rarely (if at all).
+ *
+ * For performance reasons is it helpful to group such data in the build, to
+ * avoid the linker placing it adjacent to often-written data.
+ */
+#define __read_mostly __section(".data.read_mostly")
+
+/*
+ * Some data should be chosen during boot and be immutable thereafter.
+ *
+ * Variables annotated with __ro_after_init will become read-only after boot
+ * and suffer a runtime access fault if modified.
+ *
+ * For architectures/platforms which haven't implemented support, these
+ * variables will be treated as regular mutable data.
+ */
+#define __ro_after_init __section(".data.ro_after_init")
+
 #endif /* !__XEN_SECTIONS_H__ */
 /*
  * Local variables:
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/xstate: Fix initialisation of XSS cache
Message-Id: <E1sKYwX-0002H0-Vz@xenbits.xenproject.org>
Date: Fri, 21 Jun 2024 07:44:21 +0000

commit 9e6dbbe8bf400aacb99009ddffa91d2a0c312b39
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed May 22 17:23:54 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Wed Jun 19 13:00:06 2024 +0100

    x86/xstate: Fix initialisation of XSS cache
    
    The clobbering of this_cpu(xcr0) and this_cpu(xss) to architecturally invalid
    values is to force the subsequent set_xcr0() and set_msr_xss() to reload the
    hardware register.
    
    While XCR0 is reloaded in xstate_init(), MSR_XSS isn't.  This causes
    get_msr_xss() to return the invalid value, and logic of the form:
    
        old = get_msr_xss();
        set_msr_xss(new);
        ...
        set_msr_xss(old);
    
    to try and restore said invalid value.
    
    The architecturally invalid value must be purged from the cache, meaning the
    hardware register must be written at least once.  This in turn highlights that
    the invalid value must only be used in the case that the hardware register is
    available.
    
    Fixes: f7f4a523927f ("x86/xstate: reset cached register values on resume")
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/xstate.c | 18 +++++++++++-------
 1 file changed, 11 insertions(+), 7 deletions(-)

diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c
index 99cedb4f5e..7578814796 100644
--- a/xen/arch/x86/xstate.c
+++ b/xen/arch/x86/xstate.c
@@ -641,13 +641,6 @@ void xstate_init(struct cpuinfo_x86 *c)
         return;
     }
 
-    /*
-     * Zap the cached values to make set_xcr0() and set_msr_xss() really
-     * write it.
-     */
-    this_cpu(xcr0) = 0;
-    this_cpu(xss) = ~0;
-
     cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
     feature_mask = (((u64)edx << 32) | eax) & XCNTXT_MASK;
     BUG_ON(!valid_xcr0(feature_mask));
@@ -657,8 +650,19 @@ void xstate_init(struct cpuinfo_x86 *c)
      * Set CR4_OSXSAVE and run "cpuid" to get xsave_cntxt_size.
      */
     set_in_cr4(X86_CR4_OSXSAVE);
+
+    /*
+     * Zap the cached values to make set_xcr0() and set_msr_xss() really write
+     * the hardware register.
+     */
+    this_cpu(xcr0) = 0;
     if ( !set_xcr0(feature_mask) )
         BUG();
+    if ( cpu_has_xsaves )
+    {
+        this_cpu(xss) = ~0;
+        set_msr_xss(0);
+    }
 
     if ( bsp )
     {
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/xstate: Cross-check dynamic XSTATE sizes at boot
Message-Id: <E1sKYwi-0002HR-3d@xenbits.xenproject.org>
Date: Fri, 21 Jun 2024 07:44:32 +0000

commit d31a111940de5431c8bf465b1d38b89f1130a24b
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Fri Feb 21 17:56:57 2020 +0000
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Wed Jun 19 13:00:06 2024 +0100

    x86/xstate: Cross-check dynamic XSTATE sizes at boot
    
    Right now, xstate_ctxt_size() performs a cross-check of size with CPUID in for
    every call.  This is expensive, being used for domain create/migrate, as well
    as to service certain guest CPUID instructions.
    
    Instead, arrange to check the sizes once at boot.  See the code comments for
    details.  Right now, it just checks hardware against the algorithm
    expectations.  Later patches will cross-check Xen's XSTATE calculations too.
    
    Introduce more X86_XCR0_* and X86_XSS_* constants CPUID bits.  This is to
    maximise coverage in the sanity check, even if we don't expect to
    use/virtualise some of these features any time soon.  Leave HDC and HWP alone
    for now; we don't have CPUID bits from them stored nicely.
    
    Only perform the cross-checks when SELF_TESTS are active.  It's only
    developers or new hardware liable to trip these checks, and Xen at least
    tracks "maximum value ever seen in xcr0" for the lifetime of the VM, which we
    don't want to be tickling in the general case.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/include/asm/x86-defns.h        |  25 +++-
 xen/arch/x86/xstate.c                       | 170 ++++++++++++++++++++++++++++
 xen/include/public/arch-x86/cpufeatureset.h |   3 +
 3 files changed, 197 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/include/asm/x86-defns.h b/xen/arch/x86/include/asm/x86-defns.h
index 48d7a3b7af..d7602ab225 100644
--- a/xen/arch/x86/include/asm/x86-defns.h
+++ b/xen/arch/x86/include/asm/x86-defns.h
@@ -77,7 +77,7 @@
 #define X86_CR4_PKS        0x01000000 /* Protection Key Supervisor */
 
 /*
- * XSTATE component flags in XCR0
+ * XSTATE component flags in XCR0 | MSR_XSS
  */
 #define X86_XCR0_FP_POS           0
 #define X86_XCR0_FP               (1ULL << X86_XCR0_FP_POS)
@@ -95,11 +95,34 @@
 #define X86_XCR0_ZMM              (1ULL << X86_XCR0_ZMM_POS)
 #define X86_XCR0_HI_ZMM_POS       7
 #define X86_XCR0_HI_ZMM           (1ULL << X86_XCR0_HI_ZMM_POS)
+#define X86_XSS_PROC_TRACE        (_AC(1, ULL) <<  8)
 #define X86_XCR0_PKRU_POS         9
 #define X86_XCR0_PKRU             (1ULL << X86_XCR0_PKRU_POS)
+#define X86_XSS_PASID             (_AC(1, ULL) << 10)
+#define X86_XSS_CET_U             (_AC(1, ULL) << 11)
+#define X86_XSS_CET_S             (_AC(1, ULL) << 12)
+#define X86_XSS_HDC               (_AC(1, ULL) << 13)
+#define X86_XSS_UINTR             (_AC(1, ULL) << 14)
+#define X86_XSS_LBR               (_AC(1, ULL) << 15)
+#define X86_XSS_HWP               (_AC(1, ULL) << 16)
+#define X86_XCR0_TILE_CFG         (_AC(1, ULL) << 17)
+#define X86_XCR0_TILE_DATA        (_AC(1, ULL) << 18)
 #define X86_XCR0_LWP_POS          62
 #define X86_XCR0_LWP              (1ULL << X86_XCR0_LWP_POS)
 
+#define X86_XCR0_STATES                                                 \
+    (X86_XCR0_FP | X86_XCR0_SSE | X86_XCR0_YMM | X86_XCR0_BNDREGS |     \
+     X86_XCR0_BNDCSR | X86_XCR0_OPMASK | X86_XCR0_ZMM |                 \
+     X86_XCR0_HI_ZMM | X86_XCR0_PKRU | X86_XCR0_TILE_CFG |              \
+     X86_XCR0_TILE_DATA |                                               \
+     X86_XCR0_LWP)
+
+#define X86_XSS_STATES                                                  \
+    (X86_XSS_PROC_TRACE | X86_XSS_PASID | X86_XSS_CET_U |               \
+     X86_XSS_CET_S | X86_XSS_HDC | X86_XSS_UINTR | X86_XSS_LBR |        \
+     X86_XSS_HWP |                                                      \
+     0)
+
 /*
  * Debug status flags in DR6.
  *
diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c
index 7578814796..408d9dd108 100644
--- a/xen/arch/x86/xstate.c
+++ b/xen/arch/x86/xstate.c
@@ -604,9 +604,176 @@ static bool valid_xcr0(uint64_t xcr0)
     if ( !(xcr0 & X86_XCR0_BNDREGS) != !(xcr0 & X86_XCR0_BNDCSR) )
         return false;
 
+    /* TILECFG and TILEDATA must be the same. */
+    if ( !(xcr0 & X86_XCR0_TILE_CFG) != !(xcr0 & X86_XCR0_TILE_DATA) )
+        return false;
+
     return true;
 }
 
+struct xcheck_state {
+    uint64_t states;
+    uint32_t uncomp_size;
+    uint32_t comp_size;
+};
+
+static void __init check_new_xstate(struct xcheck_state *s, uint64_t new)
+{
+    uint32_t hw_size;
+
+    BUILD_BUG_ON(X86_XCR0_STATES & X86_XSS_STATES);
+
+    BUG_ON(new <= s->states); /* States strictly increase by index. */
+    BUG_ON(s->states & new);  /* States only accumulate. */
+    BUG_ON(!valid_xcr0(s->states | new)); /* Xen thinks it's a good value. */
+    BUG_ON(new & ~(X86_XCR0_STATES | X86_XSS_STATES)); /* Known state. */
+    BUG_ON((new & X86_XCR0_STATES) &&
+           (new & X86_XSS_STATES)); /* User or supervisor, not both. */
+
+    s->states |= new;
+    if ( new & X86_XCR0_STATES )
+    {
+        if ( !set_xcr0(s->states & X86_XCR0_STATES) )
+            BUG();
+    }
+    else
+        set_msr_xss(s->states & X86_XSS_STATES);
+
+    /*
+     * Check the uncompressed size.  First ask hardware.
+     */
+    hw_size = cpuid_count_ebx(0xd, 0);
+
+    if ( new & X86_XSS_STATES )
+    {
+        /*
+         * Supervisor states don't exist in an uncompressed image, so check
+         * that the uncompressed size doesn't change.  Otherwise...
+         */
+        if ( hw_size != s->uncomp_size )
+            panic("XSTATE 0x%016"PRIx64", new sup bits {%63pbl}, uncompressed hw size %#x != prev size %#x\n",
+                  s->states, &new, hw_size, s->uncomp_size);
+    }
+    else
+    {
+        /*
+         * ... some user XSTATEs are out-of-order and fill in prior holes.
+         * The best check we make is that the size never decreases.
+         */
+        if ( hw_size < s->uncomp_size )
+            panic("XSTATE 0x%016"PRIx64", new bits {%63pbl}, uncompressed hw size %#x < prev size %#x\n",
+                  s->states, &new, hw_size, s->uncomp_size);
+    }
+
+    s->uncomp_size = hw_size;
+
+    /*
+     * Check the compressed size, if available.
+     */
+    hw_size = cpuid_count_ebx(0xd, 1);
+
+    if ( cpu_has_xsavec )
+    {
+        /*
+         * All components strictly appear in index order, irrespective of
+         * whether they're user or supervisor.  As each component also has
+         * non-zero size, the accumulated size should strictly increase.
+         */
+        if ( hw_size <= s->comp_size )
+            panic("XSTATE 0x%016"PRIx64", new bits {%63pbl}, compressed hw size %#x <= prev size %#x\n",
+                  s->states, &new, hw_size, s->comp_size);
+
+        s->comp_size = hw_size;
+    }
+    else if ( hw_size ) /* Compressed size reported, but no XSAVEC ? */
+    {
+        static bool once;
+
+        if ( !once )
+        {
+            WARN();
+            once = true;
+        }
+    }
+}
+
+/*
+ * The {un,}compressed XSTATE sizes are reported by dynamic CPUID value, based
+ * on the current %XCR0 and MSR_XSS values.  The exact layout is also feature
+ * and vendor specific.  Cross-check Xen's understanding against real hardware
+ * on boot.
+ *
+ * Testing every combination is prohibitive, so we use a partial approach.
+ * Starting with nothing active, we add new XSTATEs and check that the CPUID
+ * dynamic values never decreases.
+ */
+static void __init noinline xstate_check_sizes(void)
+{
+    uint64_t old_xcr0 = get_xcr0();
+    uint64_t old_xss = get_msr_xss();
+    struct xcheck_state s = {};
+
+    /*
+     * User and supervisor XSTATEs, increasing by index.
+     *
+     * Chronologically, Intel and AMD had identical layouts for AVX (YMM).
+     * AMD introduced LWP in Fam15h, following immediately on from YMM.  Intel
+     * left an LWP-shaped hole when adding MPX (BND{CSR,REGS}) in Skylake.
+     * AMD removed LWP in Fam17h, putting PKRU in the same space, breaking
+     * layout compatibility with Intel and having a knock-on effect on all
+     * subsequent states.
+     */
+    check_new_xstate(&s, X86_XCR0_SSE | X86_XCR0_FP);
+
+    if ( cpu_has_avx )
+        check_new_xstate(&s, X86_XCR0_YMM);
+
+    if ( cpu_has_mpx )
+        check_new_xstate(&s, X86_XCR0_BNDCSR | X86_XCR0_BNDREGS);
+
+    if ( cpu_has_avx512f )
+        check_new_xstate(&s, X86_XCR0_HI_ZMM | X86_XCR0_ZMM | X86_XCR0_OPMASK);
+
+    /*
+     * Intel Broadwell has Processor Trace but no XSAVES.  There doesn't
+     * appear to have been a new enumeration when X86_XSS_PROC_TRACE was
+     * introduced in Skylake.
+     */
+    if ( cpu_has_xsaves && cpu_has_proc_trace )
+        check_new_xstate(&s, X86_XSS_PROC_TRACE);
+
+    if ( cpu_has_pku )
+        check_new_xstate(&s, X86_XCR0_PKRU);
+
+    if ( cpu_has_xsaves && boot_cpu_has(X86_FEATURE_ENQCMD) )
+        check_new_xstate(&s, X86_XSS_PASID);
+
+    if ( cpu_has_xsaves && (boot_cpu_has(X86_FEATURE_CET_SS) ||
+                            boot_cpu_has(X86_FEATURE_CET_IBT)) )
+    {
+        check_new_xstate(&s, X86_XSS_CET_U);
+        check_new_xstate(&s, X86_XSS_CET_S);
+    }
+
+    if ( cpu_has_xsaves && boot_cpu_has(X86_FEATURE_UINTR) )
+        check_new_xstate(&s, X86_XSS_UINTR);
+
+    if ( cpu_has_xsaves && boot_cpu_has(X86_FEATURE_ARCH_LBR) )
+        check_new_xstate(&s, X86_XSS_LBR);
+
+    if ( boot_cpu_has(X86_FEATURE_AMX_TILE) )
+        check_new_xstate(&s, X86_XCR0_TILE_DATA | X86_XCR0_TILE_CFG);
+
+    if ( boot_cpu_has(X86_FEATURE_LWP) )
+        check_new_xstate(&s, X86_XCR0_LWP);
+
+    /* Restore old state now the test is done. */
+    if ( !set_xcr0(old_xcr0) )
+        BUG();
+    if ( cpu_has_xsaves )
+        set_msr_xss(old_xss);
+}
+
 /* Collect the information of processor's extended state */
 void xstate_init(struct cpuinfo_x86 *c)
 {
@@ -683,6 +850,9 @@ void xstate_init(struct cpuinfo_x86 *c)
 
     if ( setup_xstate_features(bsp) && bsp )
         BUG();
+
+    if ( IS_ENABLED(CONFIG_SELF_TESTS) && bsp )
+        xstate_check_sizes();
 }
 
 int validate_xstate(const struct domain *d, uint64_t xcr0, uint64_t xcr0_accum,
diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h
index 6627453e39..d9eba5e9a7 100644
--- a/xen/include/public/arch-x86/cpufeatureset.h
+++ b/xen/include/public/arch-x86/cpufeatureset.h
@@ -266,6 +266,7 @@ XEN_CPUFEATURE(IBPB_RET,      8*32+30) /*A  IBPB clears RSB/RAS too. */
 XEN_CPUFEATURE(AVX512_4VNNIW, 9*32+ 2) /*A  AVX512 Neural Network Instructions */
 XEN_CPUFEATURE(AVX512_4FMAPS, 9*32+ 3) /*A  AVX512 Multiply Accumulation Single Precision */
 XEN_CPUFEATURE(FSRM,          9*32+ 4) /*A  Fast Short REP MOVS */
+XEN_CPUFEATURE(UINTR,         9*32+ 5) /*   User-mode Interrupts */
 XEN_CPUFEATURE(AVX512_VP2INTERSECT, 9*32+8) /*a  VP2INTERSECT{D,Q} insns */
 XEN_CPUFEATURE(SRBDS_CTRL,    9*32+ 9) /*   MSR_MCU_OPT_CTRL and RNGDS_MITG_DIS. */
 XEN_CPUFEATURE(MD_CLEAR,      9*32+10) /*!A| VERW clears microarchitectural buffers */
@@ -274,8 +275,10 @@ XEN_CPUFEATURE(TSX_FORCE_ABORT, 9*32+13) /* MSR_TSX_FORCE_ABORT.RTM_ABORT */
 XEN_CPUFEATURE(SERIALIZE,     9*32+14) /*A  SERIALIZE insn */
 XEN_CPUFEATURE(HYBRID,        9*32+15) /*   Heterogeneous platform */
 XEN_CPUFEATURE(TSXLDTRK,      9*32+16) /*a  TSX load tracking suspend/resume insns */
+XEN_CPUFEATURE(ARCH_LBR,      9*32+19) /*   Architectural Last Branch Record */
 XEN_CPUFEATURE(CET_IBT,       9*32+20) /*   CET - Indirect Branch Tracking */
 XEN_CPUFEATURE(AVX512_FP16,   9*32+23) /*A  AVX512 FP16 instructions */
+XEN_CPUFEATURE(AMX_TILE,      9*32+24) /*   AMX Tile architecture */
 XEN_CPUFEATURE(IBRSB,         9*32+26) /*A  IBRS and IBPB support (used by Intel) */
 XEN_CPUFEATURE(STIBP,         9*32+27) /*A  STIBP */
 XEN_CPUFEATURE(L1D_FLUSH,     9*32+28) /*S  MSR_FLUSH_CMD and L1D flush. */
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/boot: Collect the Raw CPU Policy earlier on boot
Message-Id: <E1sKYws-0002Hs-6j@xenbits.xenproject.org>
Date: Fri, 21 Jun 2024 07:44:42 +0000

commit a09022a09e1a79b3f9574993993bfad803b32596
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu May 23 00:55:34 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Wed Jun 19 13:00:06 2024 +0100

    x86/boot: Collect the Raw CPU Policy earlier on boot
    
    This is a tangle, but it's a small step in the right direction.
    
    In the following change, xstate_init() is going to start using the Raw policy.
    
    calculate_raw_cpu_policy() is sufficiently separate from the other policies to
    safely move like this.
    
    No functional change.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/cpu-policy.c | 1 -
 xen/arch/x86/setup.c      | 4 +++-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c
index b96f4ee55c..5b66f002df 100644
--- a/xen/arch/x86/cpu-policy.c
+++ b/xen/arch/x86/cpu-policy.c
@@ -845,7 +845,6 @@ static void __init calculate_hvm_def_policy(void)
 
 void __init init_guest_cpu_policies(void)
 {
-    calculate_raw_cpu_policy();
     calculate_host_policy();
 
     if ( IS_ENABLED(CONFIG_PV) )
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index dd51e68dbe..eee20bb175 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1888,7 +1888,9 @@ void asmlinkage __init noreturn __start_xen(unsigned long mbi_p)
 
     tsx_init(); /* Needs microcode.  May change HLE/RTM feature bits. */
 
-    identify_cpu(&boot_cpu_data);
+    calculate_raw_cpu_policy(); /* Needs microcode.  No other dependenices. */
+
+    identify_cpu(&boot_cpu_data); /* Needs microcode and raw policy. */
 
     set_in_cr4(X86_CR4_OSFXSR | X86_CR4_OSXMMEXCPT);
 
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/xstate: Rework xstate_ctxt_size() as xstate_uncompressed_size()
Message-Id: <E1sKYx2-0002IP-AF@xenbits.xenproject.org>
Date: Fri, 21 Jun 2024 07:44:52 +0000

commit df09dfb94de66f7523837c050616a382aa2c7d17
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Fri Apr 30 20:17:55 2021 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Wed Jun 19 13:00:06 2024 +0100

    x86/xstate: Rework xstate_ctxt_size() as xstate_uncompressed_size()
    
    We're soon going to need a compressed helper of the same form.
    
    The size of the uncompressed image depends on the single element with the
    largest offset + size.  Sadly this isn't always the element with the largest
    index.
    
    Name the per-xstate-component cpu_policy struture, for legibility of the logic
    in xstate_uncompressed_size().  Cross-check with hardware during boot, and
    remove hw_uncompressed_size().
    
    This means that the migration paths don't need to mess with XCR0 just to
    sanity check the buffer size.  It also means we can drop the "fastpath" check
    against xfeature_mask (there to skip some XCR0 writes); this path is going to
    be dead logic the moment Xen starts using supervisor states itself.
    
    The users of hw_uncompressed_size() in xstate_init() can (and indeed need) to
    be replaced with CPUID instructions.  They run with feature_mask in XCR0, and
    prior to setup_xstate_features() on the BSP.
    
    No practical change.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/domctl.c                |  2 +-
 xen/arch/x86/hvm/hvm.c               |  2 +-
 xen/arch/x86/include/asm/xstate.h    |  2 +-
 xen/arch/x86/xstate.c                | 79 ++++++++++++++++++++++--------------
 xen/include/xen/lib/x86/cpu-policy.h |  2 +-
 5 files changed, 52 insertions(+), 35 deletions(-)

diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c
index 335aedf46d..9190e11faa 100644
--- a/xen/arch/x86/domctl.c
+++ b/xen/arch/x86/domctl.c
@@ -833,7 +833,7 @@ long arch_do_domctl(
         uint32_t offset = 0;
 
 #define PV_XSAVE_HDR_SIZE (2 * sizeof(uint64_t))
-#define PV_XSAVE_SIZE(xcr0) (PV_XSAVE_HDR_SIZE + xstate_ctxt_size(xcr0))
+#define PV_XSAVE_SIZE(xcr0) (PV_XSAVE_HDR_SIZE + xstate_uncompressed_size(xcr0))
 
         ret = -ESRCH;
         if ( (evc->vcpu >= d->max_vcpus) ||
diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 8334ab1711..7f4b627b1f 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -1206,7 +1206,7 @@ HVM_REGISTER_SAVE_RESTORE(CPU, hvm_save_cpu_ctxt, NULL, hvm_load_cpu_ctxt, 1,
 
 #define HVM_CPU_XSAVE_SIZE(xcr0) (offsetof(struct hvm_hw_cpu_xsave, \
                                            save_area) + \
-                                  xstate_ctxt_size(xcr0))
+                                  xstate_uncompressed_size(xcr0))
 
 static int cf_check hvm_save_cpu_xsave_states(
     struct vcpu *v, hvm_domain_context_t *h)
diff --git a/xen/arch/x86/include/asm/xstate.h b/xen/arch/x86/include/asm/xstate.h
index c08c267884..f5115199d4 100644
--- a/xen/arch/x86/include/asm/xstate.h
+++ b/xen/arch/x86/include/asm/xstate.h
@@ -107,7 +107,7 @@ void compress_xsave_states(struct vcpu *v, const void *src, unsigned int size);
 void xstate_free_save_area(struct vcpu *v);
 int xstate_alloc_save_area(struct vcpu *v);
 void xstate_init(struct cpuinfo_x86 *c);
-unsigned int xstate_ctxt_size(u64 xcr0);
+unsigned int xstate_uncompressed_size(uint64_t xcr0);
 
 static inline uint64_t xgetbv(unsigned int index)
 {
diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c
index 408d9dd108..c8bc40fb5c 100644
--- a/xen/arch/x86/xstate.c
+++ b/xen/arch/x86/xstate.c
@@ -8,6 +8,8 @@
 #include <xen/param.h>
 #include <xen/percpu.h>
 #include <xen/sched.h>
+
+#include <asm/cpu-policy.h>
 #include <asm/current.h>
 #include <asm/processor.h>
 #include <asm/i387.h>
@@ -183,7 +185,7 @@ void expand_xsave_states(const struct vcpu *v, void *dest, unsigned int size)
     /* Check there is state to serialise (i.e. at least an XSAVE_HDR) */
     BUG_ON(!v->arch.xcr0_accum);
     /* Check there is the correct room to decompress into. */
-    BUG_ON(size != xstate_ctxt_size(v->arch.xcr0_accum));
+    BUG_ON(size != xstate_uncompressed_size(v->arch.xcr0_accum));
 
     if ( !(xstate->xsave_hdr.xcomp_bv & XSTATE_COMPACTION_ENABLED) )
     {
@@ -245,7 +247,7 @@ void compress_xsave_states(struct vcpu *v, const void *src, unsigned int size)
     u64 xstate_bv, valid;
 
     BUG_ON(!v->arch.xcr0_accum);
-    BUG_ON(size != xstate_ctxt_size(v->arch.xcr0_accum));
+    BUG_ON(size != xstate_uncompressed_size(v->arch.xcr0_accum));
     ASSERT(!xsave_area_compressed(src));
 
     xstate_bv = ((const struct xsave_struct *)src)->xsave_hdr.xstate_bv;
@@ -553,32 +555,6 @@ void xstate_free_save_area(struct vcpu *v)
     v->arch.xsave_area = NULL;
 }
 
-static unsigned int hw_uncompressed_size(uint64_t xcr0)
-{
-    u64 act_xcr0 = get_xcr0();
-    unsigned int size;
-    bool ok = set_xcr0(xcr0);
-
-    ASSERT(ok);
-    size = cpuid_count_ebx(XSTATE_CPUID, 0);
-    ok = set_xcr0(act_xcr0);
-    ASSERT(ok);
-
-    return size;
-}
-
-/* Fastpath for common xstate size requests, avoiding reloads of xcr0. */
-unsigned int xstate_ctxt_size(u64 xcr0)
-{
-    if ( xcr0 == xfeature_mask )
-        return xsave_cntxt_size;
-
-    if ( xcr0 == 0 ) /* TODO: clean up paths passing 0 in here. */
-        return 0;
-
-    return hw_uncompressed_size(xcr0);
-}
-
 static bool valid_xcr0(uint64_t xcr0)
 {
     /* FP must be unconditionally set. */
@@ -611,6 +587,38 @@ static bool valid_xcr0(uint64_t xcr0)
     return true;
 }
 
+unsigned int xstate_uncompressed_size(uint64_t xcr0)
+{
+    unsigned int size = XSTATE_AREA_MIN_SIZE, i;
+
+    /* Non-XCR0 states don't exist in an uncompressed image. */
+    ASSERT((xcr0 & ~X86_XCR0_STATES) == 0);
+
+    if ( xcr0 == 0 )
+        return 0;
+
+    if ( xcr0 <= (X86_XCR0_SSE | X86_XCR0_FP) )
+        return size;
+
+    /*
+     * For the non-legacy states, search all activate states and find the
+     * maximum offset+size.  Some states (e.g. LWP, APX_F) are out-of-order
+     * with respect their index.
+     */
+    xcr0 &= ~(X86_XCR0_SSE | X86_XCR0_FP);
+    for_each_set_bit ( i, &xcr0, 63 )
+    {
+        const struct xstate_component *c = &raw_cpu_policy.xstate.comp[i];
+        unsigned int s = c->offset + c->size;
+
+        ASSERT(c->offset && c->size);
+
+        size = max(size, s);
+    }
+
+    return size;
+}
+
 struct xcheck_state {
     uint64_t states;
     uint32_t uncomp_size;
@@ -619,7 +627,7 @@ struct xcheck_state {
 
 static void __init check_new_xstate(struct xcheck_state *s, uint64_t new)
 {
-    uint32_t hw_size;
+    uint32_t hw_size, xen_size;
 
     BUILD_BUG_ON(X86_XCR0_STATES & X86_XSS_STATES);
 
@@ -667,6 +675,15 @@ static void __init check_new_xstate(struct xcheck_state *s, uint64_t new)
 
     s->uncomp_size = hw_size;
 
+    /*
+     * Second, check that Xen's calculation always matches hardware's.
+     */
+    xen_size = xstate_uncompressed_size(s->states & X86_XCR0_STATES);
+
+    if ( xen_size != hw_size )
+        panic("XSTATE 0x%016"PRIx64", uncompressed hw size %#x != xen size %#x\n",
+              s->states, hw_size, xen_size);
+
     /*
      * Check the compressed size, if available.
      */
@@ -838,14 +855,14 @@ void xstate_init(struct cpuinfo_x86 *c)
          * xsave_cntxt_size is the max size required by enabled features.
          * We know FP/SSE and YMM about eax, and nothing about edx at present.
          */
-        xsave_cntxt_size = hw_uncompressed_size(feature_mask);
+        xsave_cntxt_size = cpuid_count_ebx(0xd, 0);
         printk("xstate: size: %#x and states: %#"PRIx64"\n",
                xsave_cntxt_size, xfeature_mask);
     }
     else
     {
         BUG_ON(xfeature_mask != feature_mask);
-        BUG_ON(xsave_cntxt_size != hw_uncompressed_size(feature_mask));
+        BUG_ON(xsave_cntxt_size != cpuid_count_ebx(0xd, 0));
     }
 
     if ( setup_xstate_features(bsp) && bsp )
diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h
index d5e447e9dc..d26012c6da 100644
--- a/xen/include/xen/lib/x86/cpu-policy.h
+++ b/xen/include/xen/lib/x86/cpu-policy.h
@@ -248,7 +248,7 @@ struct cpu_policy
         };
 
         /* Per-component common state.  Valid for i >= 2. */
-        struct {
+        struct xstate_component {
             uint32_t size, offset;
             bool xss:1, align:1;
             uint32_t _res_d;
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/cpu-policy: Simplify recalculate_xstate()
Message-Id: <E1sKYxC-0002J7-DX@xenbits.xenproject.org>
Date: Fri, 21 Jun 2024 07:45:02 +0000

commit fdb7e77fea4cb1c98dc51dd891a47f7e94612ad4
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Fri Apr 30 20:17:55 2021 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Wed Jun 19 13:00:06 2024 +0100

    x86/cpu-policy: Simplify recalculate_xstate()
    
    Make use of xstate_uncompressed_size() helper rather than maintaining the
    running calculation while accumulating feature components.
    
    The rest of the CPUID data can come direct from the raw cpu policy.  All
    per-component data form an ABI through the behaviour of the X{SAVE,RSTOR}*
    instructions.
    
    Use for_each_set_bit() rather than opencoding a slightly awkward version of
    it.  Mask the attributes in ecx down based on the visible features.  This
    isn't actually necessary for any components or attributes defined at the time
    of writing (up to AMX), but is added out of an abundance of caution.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/cpu-policy.c         | 55 ++++++++++++++-------------------------
 xen/arch/x86/include/asm/xstate.h |  1 +
 2 files changed, 21 insertions(+), 35 deletions(-)

diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c
index 5b66f002df..304dc20cfa 100644
--- a/xen/arch/x86/cpu-policy.c
+++ b/xen/arch/x86/cpu-policy.c
@@ -193,8 +193,7 @@ static void sanitise_featureset(uint32_t *fs)
 static void recalculate_xstate(struct cpu_policy *p)
 {
     uint64_t xstates = XSTATE_FP_SSE;
-    uint32_t xstate_size = XSTATE_AREA_MIN_SIZE;
-    unsigned int i, Da1 = p->xstate.Da1;
+    unsigned int i, ecx_mask = 0, Da1 = p->xstate.Da1;
 
     /*
      * The Da1 leaf is the only piece of information preserved in the common
@@ -206,61 +205,47 @@ static void recalculate_xstate(struct cpu_policy *p)
         return;
 
     if ( p->basic.avx )
-    {
         xstates |= X86_XCR0_YMM;
-        xstate_size = max(xstate_size,
-                          xstate_offsets[X86_XCR0_YMM_POS] +
-                          xstate_sizes[X86_XCR0_YMM_POS]);
-    }
 
     if ( p->feat.mpx )
-    {
         xstates |= X86_XCR0_BNDREGS | X86_XCR0_BNDCSR;
-        xstate_size = max(xstate_size,
-                          xstate_offsets[X86_XCR0_BNDCSR_POS] +
-                          xstate_sizes[X86_XCR0_BNDCSR_POS]);
-    }
 
     if ( p->feat.avx512f )
-    {
         xstates |= X86_XCR0_OPMASK | X86_XCR0_ZMM | X86_XCR0_HI_ZMM;
-        xstate_size = max(xstate_size,
-                          xstate_offsets[X86_XCR0_HI_ZMM_POS] +
-                          xstate_sizes[X86_XCR0_HI_ZMM_POS]);
-    }
 
     if ( p->feat.pku )
-    {
         xstates |= X86_XCR0_PKRU;
-        xstate_size = max(xstate_size,
-                          xstate_offsets[X86_XCR0_PKRU_POS] +
-                          xstate_sizes[X86_XCR0_PKRU_POS]);
-    }
 
-    p->xstate.max_size  =  xstate_size;
+    /* Subleaf 0 */
+    p->xstate.max_size =
+        xstate_uncompressed_size(xstates & ~XSTATE_XSAVES_ONLY);
     p->xstate.xcr0_low  =  xstates & ~XSTATE_XSAVES_ONLY;
     p->xstate.xcr0_high = (xstates & ~XSTATE_XSAVES_ONLY) >> 32;
 
+    /* Subleaf 1 */
     p->xstate.Da1 = Da1;
+    if ( p->xstate.xsavec )
+        ecx_mask |= XSTATE_ALIGN64;
+
     if ( p->xstate.xsaves )
     {
+        ecx_mask |= XSTATE_XSS;
         p->xstate.xss_low   =  xstates & XSTATE_XSAVES_ONLY;
         p->xstate.xss_high  = (xstates & XSTATE_XSAVES_ONLY) >> 32;
     }
-    else
-        xstates &= ~XSTATE_XSAVES_ONLY;
 
-    for ( i = 2; i < min(63UL, ARRAY_SIZE(p->xstate.comp)); ++i )
+    /* Subleafs 2+ */
+    xstates &= ~XSTATE_FP_SSE;
+    BUILD_BUG_ON(ARRAY_SIZE(p->xstate.comp) < 63);
+    for_each_set_bit ( i, &xstates, 63 )
     {
-        uint64_t curr_xstate = 1UL << i;
-
-        if ( !(xstates & curr_xstate) )
-            continue;
-
-        p->xstate.comp[i].size   = xstate_sizes[i];
-        p->xstate.comp[i].offset = xstate_offsets[i];
-        p->xstate.comp[i].xss    = curr_xstate & XSTATE_XSAVES_ONLY;
-        p->xstate.comp[i].align  = curr_xstate & xstate_align;
+        /*
+         * Pass through size (eax) and offset (ebx) directly.  Visbility of
+         * attributes in ecx limited by visible features in Da1.
+         */
+        p->xstate.raw[i].a = raw_cpu_policy.xstate.raw[i].a;
+        p->xstate.raw[i].b = raw_cpu_policy.xstate.raw[i].b;
+        p->xstate.raw[i].c = raw_cpu_policy.xstate.raw[i].c & ecx_mask;
     }
 }
 
diff --git a/xen/arch/x86/include/asm/xstate.h b/xen/arch/x86/include/asm/xstate.h
index f5115199d4..bfb66dd766 100644
--- a/xen/arch/x86/include/asm/xstate.h
+++ b/xen/arch/x86/include/asm/xstate.h
@@ -40,6 +40,7 @@ extern uint32_t mxcsr_mask;
 #define XSTATE_XSAVES_ONLY         0
 #define XSTATE_COMPACTION_ENABLED  (1ULL << 63)
 
+#define XSTATE_XSS     (1U << 0)
 #define XSTATE_ALIGN64 (1U << 1)
 
 extern u64 xfeature_mask;
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/cpuid: Fix handling of XSAVE dynamic leaves
Message-Id: <E1sKYxM-0002JY-Gk@xenbits.xenproject.org>
Date: Fri, 21 Jun 2024 07:45:12 +0000

commit 71cacfb035f4a78ee10970dc38a3baa04d387451
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Fri Apr 30 20:17:55 2021 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Wed Jun 19 13:00:06 2024 +0100

    x86/cpuid: Fix handling of XSAVE dynamic leaves
    
    First, if XSAVE is available in hardware but not visible to the guest, the
    dynamic leaves shouldn't be filled in.
    
    Second, the comment concerning XSS state is wrong.  VT-x doesn't manage
    host/guest state automatically, but there is provision for "host only" bits to
    be set, so the implications are still accurate.
    
    Introduce xstate_compressed_size() to mirror the uncompressed one.  Cross
    check it at boot.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/cpuid.c              | 24 ++++++++----------------
 xen/arch/x86/include/asm/xstate.h |  1 +
 xen/arch/x86/xstate.c             | 39 +++++++++++++++++++++++++++++++++++++++
 3 files changed, 48 insertions(+), 16 deletions(-)

diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c
index 7a38e03214..a822e80c7e 100644
--- a/xen/arch/x86/cpuid.c
+++ b/xen/arch/x86/cpuid.c
@@ -330,23 +330,15 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf,
     case XSTATE_CPUID:
         switch ( subleaf )
         {
-        case 1:
-            if ( !p->xstate.xsavec && !p->xstate.xsaves )
-                break;
-
-            /*
-             * TODO: Figure out what to do for XSS state.  VT-x manages host
-             * vs guest MSR_XSS automatically, so as soon as we start
-             * supporting any XSS states, the wrong XSS will be in context.
-             */
-            BUILD_BUG_ON(XSTATE_XSAVES_ONLY != 0);
-            fallthrough;
         case 0:
-            /*
-             * Read CPUID[0xD,0/1].EBX from hardware.  They vary with enabled
-             * XSTATE, and appropriate XCR0|XSS are in context.
-             */
-            res->b = cpuid_count_ebx(leaf, subleaf);
+            if ( p->basic.xsave )
+                res->b = xstate_uncompressed_size(v->arch.xcr0);
+            break;
+
+        case 1:
+            if ( p->xstate.xsavec )
+                res->b = xstate_compressed_size(v->arch.xcr0 |
+                                                v->arch.msrs->xss.raw);
             break;
         }
         break;
diff --git a/xen/arch/x86/include/asm/xstate.h b/xen/arch/x86/include/asm/xstate.h
index bfb66dd766..da1d89d2f4 100644
--- a/xen/arch/x86/include/asm/xstate.h
+++ b/xen/arch/x86/include/asm/xstate.h
@@ -109,6 +109,7 @@ void xstate_free_save_area(struct vcpu *v);
 int xstate_alloc_save_area(struct vcpu *v);
 void xstate_init(struct cpuinfo_x86 *c);
 unsigned int xstate_uncompressed_size(uint64_t xcr0);
+unsigned int xstate_compressed_size(uint64_t xstates);
 
 static inline uint64_t xgetbv(unsigned int index)
 {
diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c
index c8bc40fb5c..da0f48da81 100644
--- a/xen/arch/x86/xstate.c
+++ b/xen/arch/x86/xstate.c
@@ -619,6 +619,36 @@ unsigned int xstate_uncompressed_size(uint64_t xcr0)
     return size;
 }
 
+unsigned int xstate_compressed_size(uint64_t xstates)
+{
+    unsigned int i, size = XSTATE_AREA_MIN_SIZE;
+
+    if ( xstates == 0 )
+        return 0;
+
+    if ( xstates <= (X86_XCR0_SSE | X86_XCR0_FP) )
+        return size;
+
+    /*
+     * For the compressed size, every non-legacy component matters.  Some
+     * componenets require aligning to 64 first.
+     */
+    xstates &= ~(X86_XCR0_SSE | X86_XCR0_FP);
+    for_each_set_bit ( i, &xstates, 63 )
+    {
+        const struct xstate_component *c = &raw_cpu_policy.xstate.comp[i];
+
+        ASSERT(c->size);
+
+        if ( c->align )
+            size = ROUNDUP(size, 64);
+
+        size += c->size;
+    }
+
+    return size;
+}
+
 struct xcheck_state {
     uint64_t states;
     uint32_t uncomp_size;
@@ -701,6 +731,15 @@ static void __init check_new_xstate(struct xcheck_state *s, uint64_t new)
                   s->states, &new, hw_size, s->comp_size);
 
         s->comp_size = hw_size;
+
+        /*
+         * Again, check that Xen's calculation always matches hardware's.
+         */
+        xen_size = xstate_compressed_size(s->states);
+
+        if ( xen_size != hw_size )
+            panic("XSTATE 0x%016"PRIx64", compressed hw size %#x != xen size %#x\n",
+                  s->states, hw_size, xen_size);
     }
     else if ( hw_size ) /* Compressed size reported, but no XSAVEC ? */
     {
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/defns: Clean up X86_{XCR0,XSS}_* constants
Message-Id: <E1sKYxW-0002K1-Ji@xenbits.xenproject.org>
Date: Fri, 21 Jun 2024 07:45:22 +0000

commit 267122a24c499d26278ab2dbdfb46ebcaaf38474
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Fri Apr 30 16:14:36 2021 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Wed Jun 19 13:00:06 2024 +0100

    x86/defns: Clean up X86_{XCR0,XSS}_* constants
    
    With the exception of one case in read_bndcfgu() which can use ilog2(),
    the *_POS defines are unused.  Drop them.
    
    X86_XCR0_X87 is the name used by both the SDM and APM, rather than
    X86_XCR0_FP.
    
    No functional change.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/i387.c                  |  2 +-
 xen/arch/x86/include/asm/x86-defns.h | 32 +++++++++++---------------------
 xen/arch/x86/include/asm/xstate.h    |  4 ++--
 xen/arch/x86/xstate.c                | 18 +++++++++---------
 4 files changed, 23 insertions(+), 33 deletions(-)

diff --git a/xen/arch/x86/i387.c b/xen/arch/x86/i387.c
index 7a4297cc92..fcdee10a6e 100644
--- a/xen/arch/x86/i387.c
+++ b/xen/arch/x86/i387.c
@@ -369,7 +369,7 @@ void vcpu_setup_fpu(struct vcpu *v, struct xsave_struct *xsave_area,
         {
             v->arch.xsave_area->xsave_hdr.xstate_bv &= ~XSTATE_FP_SSE;
             if ( fcw_default != FCW_DEFAULT )
-                v->arch.xsave_area->xsave_hdr.xstate_bv |= X86_XCR0_FP;
+                v->arch.xsave_area->xsave_hdr.xstate_bv |= X86_XCR0_X87;
         }
     }
 
diff --git a/xen/arch/x86/include/asm/x86-defns.h b/xen/arch/x86/include/asm/x86-defns.h
index d7602ab225..3bcdbaccd3 100644
--- a/xen/arch/x86/include/asm/x86-defns.h
+++ b/xen/arch/x86/include/asm/x86-defns.h
@@ -79,25 +79,16 @@
 /*
  * XSTATE component flags in XCR0 | MSR_XSS
  */
-#define X86_XCR0_FP_POS           0
-#define X86_XCR0_FP               (1ULL << X86_XCR0_FP_POS)
-#define X86_XCR0_SSE_POS          1
-#define X86_XCR0_SSE              (1ULL << X86_XCR0_SSE_POS)
-#define X86_XCR0_YMM_POS          2
-#define X86_XCR0_YMM              (1ULL << X86_XCR0_YMM_POS)
-#define X86_XCR0_BNDREGS_POS      3
-#define X86_XCR0_BNDREGS          (1ULL << X86_XCR0_BNDREGS_POS)
-#define X86_XCR0_BNDCSR_POS       4
-#define X86_XCR0_BNDCSR           (1ULL << X86_XCR0_BNDCSR_POS)
-#define X86_XCR0_OPMASK_POS       5
-#define X86_XCR0_OPMASK           (1ULL << X86_XCR0_OPMASK_POS)
-#define X86_XCR0_ZMM_POS          6
-#define X86_XCR0_ZMM              (1ULL << X86_XCR0_ZMM_POS)
-#define X86_XCR0_HI_ZMM_POS       7
-#define X86_XCR0_HI_ZMM           (1ULL << X86_XCR0_HI_ZMM_POS)
+#define X86_XCR0_X87              (_AC(1, ULL) <<  0)
+#define X86_XCR0_SSE              (_AC(1, ULL) <<  1)
+#define X86_XCR0_YMM              (_AC(1, ULL) <<  2)
+#define X86_XCR0_BNDREGS          (_AC(1, ULL) <<  3)
+#define X86_XCR0_BNDCSR           (_AC(1, ULL) <<  4)
+#define X86_XCR0_OPMASK           (_AC(1, ULL) <<  5)
+#define X86_XCR0_ZMM              (_AC(1, ULL) <<  6)
+#define X86_XCR0_HI_ZMM           (_AC(1, ULL) <<  7)
 #define X86_XSS_PROC_TRACE        (_AC(1, ULL) <<  8)
-#define X86_XCR0_PKRU_POS         9
-#define X86_XCR0_PKRU             (1ULL << X86_XCR0_PKRU_POS)
+#define X86_XCR0_PKRU             (_AC(1, ULL) <<  9)
 #define X86_XSS_PASID             (_AC(1, ULL) << 10)
 #define X86_XSS_CET_U             (_AC(1, ULL) << 11)
 #define X86_XSS_CET_S             (_AC(1, ULL) << 12)
@@ -107,11 +98,10 @@
 #define X86_XSS_HWP               (_AC(1, ULL) << 16)
 #define X86_XCR0_TILE_CFG         (_AC(1, ULL) << 17)
 #define X86_XCR0_TILE_DATA        (_AC(1, ULL) << 18)
-#define X86_XCR0_LWP_POS          62
-#define X86_XCR0_LWP              (1ULL << X86_XCR0_LWP_POS)
+#define X86_XCR0_LWP              (_AC(1, ULL) << 62)
 
 #define X86_XCR0_STATES                                                 \
-    (X86_XCR0_FP | X86_XCR0_SSE | X86_XCR0_YMM | X86_XCR0_BNDREGS |     \
+    (X86_XCR0_X87 | X86_XCR0_SSE | X86_XCR0_YMM | X86_XCR0_BNDREGS |    \
      X86_XCR0_BNDCSR | X86_XCR0_OPMASK | X86_XCR0_ZMM |                 \
      X86_XCR0_HI_ZMM | X86_XCR0_PKRU | X86_XCR0_TILE_CFG |              \
      X86_XCR0_TILE_DATA |                                               \
diff --git a/xen/arch/x86/include/asm/xstate.h b/xen/arch/x86/include/asm/xstate.h
index da1d89d2f4..f4a8e5f814 100644
--- a/xen/arch/x86/include/asm/xstate.h
+++ b/xen/arch/x86/include/asm/xstate.h
@@ -29,8 +29,8 @@ extern uint32_t mxcsr_mask;
 #define XSAVE_HDR_OFFSET          FXSAVE_SIZE
 #define XSTATE_AREA_MIN_SIZE      (FXSAVE_SIZE + XSAVE_HDR_SIZE)
 
-#define XSTATE_FP_SSE  (X86_XCR0_FP | X86_XCR0_SSE)
-#define XCNTXT_MASK    (X86_XCR0_FP | X86_XCR0_SSE | X86_XCR0_YMM | \
+#define XSTATE_FP_SSE  (X86_XCR0_X87 | X86_XCR0_SSE)
+#define XCNTXT_MASK    (X86_XCR0_X87 | X86_XCR0_SSE | X86_XCR0_YMM | \
                         X86_XCR0_OPMASK | X86_XCR0_ZMM | X86_XCR0_HI_ZMM | \
                         XSTATE_NONLAZY)
 
diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c
index da0f48da81..68cdd8fcf0 100644
--- a/xen/arch/x86/xstate.c
+++ b/xen/arch/x86/xstate.c
@@ -313,7 +313,7 @@ void xsave(struct vcpu *v, uint64_t mask)
                            "=m" (*ptr), \
                            "a" (lmask), "d" (hmask), "D" (ptr))
 
-    if ( fip_width == 8 || !(mask & X86_XCR0_FP) )
+    if ( fip_width == 8 || !(mask & X86_XCR0_X87) )
     {
         XSAVE("0x48,");
     }
@@ -366,7 +366,7 @@ void xsave(struct vcpu *v, uint64_t mask)
             fip_width = 8;
     }
 #undef XSAVE
-    if ( mask & X86_XCR0_FP )
+    if ( mask & X86_XCR0_X87 )
         ptr->fpu_sse.x[FPU_WORD_SIZE_OFFSET] = fip_width;
 }
 
@@ -558,7 +558,7 @@ void xstate_free_save_area(struct vcpu *v)
 static bool valid_xcr0(uint64_t xcr0)
 {
     /* FP must be unconditionally set. */
-    if ( !(xcr0 & X86_XCR0_FP) )
+    if ( !(xcr0 & X86_XCR0_X87) )
         return false;
 
     /* YMM depends on SSE. */
@@ -597,7 +597,7 @@ unsigned int xstate_uncompressed_size(uint64_t xcr0)
     if ( xcr0 == 0 )
         return 0;
 
-    if ( xcr0 <= (X86_XCR0_SSE | X86_XCR0_FP) )
+    if ( xcr0 <= (X86_XCR0_SSE | X86_XCR0_X87) )
         return size;
 
     /*
@@ -605,7 +605,7 @@ unsigned int xstate_uncompressed_size(uint64_t xcr0)
      * maximum offset+size.  Some states (e.g. LWP, APX_F) are out-of-order
      * with respect their index.
      */
-    xcr0 &= ~(X86_XCR0_SSE | X86_XCR0_FP);
+    xcr0 &= ~(X86_XCR0_SSE | X86_XCR0_X87);
     for_each_set_bit ( i, &xcr0, 63 )
     {
         const struct xstate_component *c = &raw_cpu_policy.xstate.comp[i];
@@ -626,14 +626,14 @@ unsigned int xstate_compressed_size(uint64_t xstates)
     if ( xstates == 0 )
         return 0;
 
-    if ( xstates <= (X86_XCR0_SSE | X86_XCR0_FP) )
+    if ( xstates <= (X86_XCR0_SSE | X86_XCR0_X87) )
         return size;
 
     /*
      * For the compressed size, every non-legacy component matters.  Some
      * componenets require aligning to 64 first.
      */
-    xstates &= ~(X86_XCR0_SSE | X86_XCR0_FP);
+    xstates &= ~(X86_XCR0_SSE | X86_XCR0_X87);
     for_each_set_bit ( i, &xstates, 63 )
     {
         const struct xstate_component *c = &raw_cpu_policy.xstate.comp[i];
@@ -779,7 +779,7 @@ static void __init noinline xstate_check_sizes(void)
      * layout compatibility with Intel and having a knock-on effect on all
      * subsequent states.
      */
-    check_new_xstate(&s, X86_XCR0_SSE | X86_XCR0_FP);
+    check_new_xstate(&s, X86_XCR0_SSE | X86_XCR0_X87);
 
     if ( cpu_has_avx )
         check_new_xstate(&s, X86_XCR0_YMM);
@@ -1026,7 +1026,7 @@ uint64_t read_bndcfgu(void)
               : "=m" (*xstate)
               : "a" (X86_XCR0_BNDCSR), "d" (0), "D" (xstate) );
 
-        bndcsr = (void *)xstate + xstate_offsets[X86_XCR0_BNDCSR_POS];
+        bndcsr = (void *)xstate + xstate_offsets[ilog2(X86_XCR0_BNDCSR)];
     }
 
     if ( cr0 & X86_CR0_TS )
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen: avoid UB in guest handle arithmetic
Message-Id: <E1sKYxg-0002Kk-Mk@xenbits.xenproject.org>
Date: Fri, 21 Jun 2024 07:45:32 +0000

commit 43d5c5d5f70b3f5419e7ef30399d23adf6ddfa8e
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 19 14:11:07 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 19 14:11:07 2024 +0200

    xen: avoid UB in guest handle arithmetic
    
    At least XENMEM_memory_exchange can have huge values passed in the
    nr_extents and nr_exchanged fields. Adding such values to pointers can
    overflow, resulting in UB. Cast respective pointers to "unsigned long"
    while at the same time making the necessary multiplication explicit.
    Remaining arithmetic is, despite there possibly being mathematical
    overflow, okay as per the C99 spec: "A computation involving unsigned
    operands can never overflow, because a result that cannot be represented
    by the resulting unsigned integer type is reduced modulo the number that
    is one greater than the largest value that can be represented by the
    resulting type." The overflow that we need to guard against is checked
    for in array_access_ok().
    
    Note that in / down from array_access_ok() the address value is only
    ever cast to "unsigned long" anyway, which is why in the invocation from
    guest_handle_subrange_okay() the value doesn't need casting back to
    pointer type.
    
    In compat grant table code change two guest_handle_add_offset() to avoid
    passing in negative offsets.
    
    Since {,__}clear_guest_offset() need touching anyway, also deal with
    another (latent) issue there: They were losing the handle type, i.e. the
    size of the individual objects accessed. Luckily the few users we
    presently have all pass char or uint8 handles.
    
    Reported-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Tested-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/include/asm/guest_access.h |  2 +-
 xen/common/compat/grant_table.c         |  4 ++--
 xen/include/xen/guest_access.h          | 42 ++++++++++++++++++++-------------
 3 files changed, 29 insertions(+), 19 deletions(-)

diff --git a/xen/arch/x86/include/asm/guest_access.h b/xen/arch/x86/include/asm/guest_access.h
index dbf789fa58..69716c8b41 100644
--- a/xen/arch/x86/include/asm/guest_access.h
+++ b/xen/arch/x86/include/asm/guest_access.h
@@ -43,7 +43,7 @@
      array_access_ok((hnd).p, (nr), sizeof(*(hnd).p)))
 #define guest_handle_subrange_okay(hnd, first, last)    \
     (paging_mode_external(current->domain) ||           \
-     array_access_ok((hnd).p + (first),                 \
+     array_access_ok((unsigned long)(hnd).p + (first) * sizeof(*(hnd).p), \
                      (last)-(first)+1,                  \
                      sizeof(*(hnd).p)))
 
diff --git a/xen/common/compat/grant_table.c b/xen/common/compat/grant_table.c
index af98eade17..c495c375eb 100644
--- a/xen/common/compat/grant_table.c
+++ b/xen/common/compat/grant_table.c
@@ -232,7 +232,7 @@ int compat_grant_table_op(
                 cnt_uop = guest_handle_cast(xfer, void);
                 while ( n-- )
                 {
-                    guest_handle_add_offset(xfer, -1);
+                    guest_handle_subtract_offset(xfer, 1);
                     if ( __copy_field_to_guest(xfer, nat.xfer + n, status) )
                         rc = -EFAULT;
                 }
@@ -277,7 +277,7 @@ int compat_grant_table_op(
                 cnt_uop = guest_handle_cast(copy, void);
                 while ( n-- )
                 {
-                    guest_handle_add_offset(copy, -1);
+                    guest_handle_subtract_offset(copy, 1);
                     if ( __copy_field_to_guest(copy, nat.copy + n, status) )
                         rc = -EFAULT;
                 }
diff --git a/xen/include/xen/guest_access.h b/xen/include/xen/guest_access.h
index af33ae3ab6..96dbef2e02 100644
--- a/xen/include/xen/guest_access.h
+++ b/xen/include/xen/guest_access.h
@@ -15,8 +15,10 @@
 #define guest_handle_is_null(hnd)        ((hnd).p == NULL)
 
 /* Offset the given guest handle into the array it refers to. */
-#define guest_handle_add_offset(hnd, nr) ((hnd).p += (nr))
-#define guest_handle_subtract_offset(hnd, nr) ((hnd).p -= (nr))
+#define guest_handle_add_offset(hnd, nr) ((hnd).p = \
+    (typeof((hnd).p))((unsigned long)(hnd).p + (nr) * sizeof(*(hnd).p)))
+#define guest_handle_subtract_offset(hnd, nr) ((hnd).p = \
+    (typeof((hnd).p))((unsigned long)(hnd).p - (nr) * sizeof(*(hnd).p)))
 
 /*
  * Cast a guest handle (either XEN_GUEST_HANDLE or XEN_GUEST_HANDLE_PARAM)
@@ -59,20 +61,22 @@
  */
 #define copy_to_guest_offset(hnd, off, ptr, nr) ({      \
     const typeof(*(ptr)) *_s = (ptr);                   \
-    char (*_d)[sizeof(*_s)] = (void *)(hnd).p;          \
+    unsigned long d_ = (unsigned long)(hnd).p;          \
     /* Check that the handle is not for a const type */ \
     void *__maybe_unused _t = (hnd).p;                  \
     (void)((hnd).p == _s);                              \
-    raw_copy_to_guest(_d+(off), _s, sizeof(*_s)*(nr));  \
+    raw_copy_to_guest((void *)(d_ + (off) * sizeof(*_s)), \
+                      _s, (nr) * sizeof(*_s));          \
 })
 
 /*
  * Clear an array of objects in guest context via a guest handle,
  * specifying an offset into the guest array.
  */
-#define clear_guest_offset(hnd, off, nr) ({    \
-    void *_d = (hnd).p;                        \
-    raw_clear_guest(_d+(off), nr);             \
+#define clear_guest_offset(hnd, off, nr) ({             \
+    unsigned long d_ = (unsigned long)(hnd).p;          \
+    raw_clear_guest((void *)(d_ + (off) * sizeof(*(hnd).p)), \
+                    (nr) * sizeof(*(hnd).p));           \
 })
 
 /*
@@ -80,9 +84,11 @@
  * specifying an offset into the guest array.
  */
 #define copy_from_guest_offset(ptr, hnd, off, nr) ({    \
-    const typeof(*(ptr)) *_s = (hnd).p;                 \
+    unsigned long s_ = (unsigned long)(hnd).p;          \
     typeof(*(ptr)) *_d = (ptr);                         \
-    raw_copy_from_guest(_d, _s+(off), sizeof(*_d)*(nr));\
+    raw_copy_from_guest(_d,                             \
+                        (const void *)(s_ + (off) * sizeof(*_d)), \
+                        (nr) * sizeof(*_d));            \
 })
 
 /* Copy sub-field of a structure to guest context via a guest handle. */
@@ -117,22 +123,26 @@
 
 #define __copy_to_guest_offset(hnd, off, ptr, nr) ({        \
     const typeof(*(ptr)) *_s = (ptr);                       \
-    char (*_d)[sizeof(*_s)] = (void *)(hnd).p;              \
+    unsigned long d_ = (unsigned long)(hnd).p;              \
     /* Check that the handle is not for a const type */     \
     void *__maybe_unused _t = (hnd).p;                      \
     (void)((hnd).p == _s);                                  \
-    __raw_copy_to_guest(_d + (off), _s, sizeof(*_s) * (nr));\
+    __raw_copy_to_guest((void *)(d_ + (off) * sizeof(*_s)), \
+                      _s, (nr) * sizeof(*_s));              \
 })
 
-#define __clear_guest_offset(hnd, off, nr) ({    \
-    void *_d = (hnd).p;                          \
-    __raw_clear_guest(_d + (off), nr);           \
+#define __clear_guest_offset(hnd, off, nr) ({               \
+    unsigned long d_ = (unsigned long)(hnd).p;              \
+    __raw_clear_guest((void *)(d_ + (off) * sizeof(*(hnd).p)), \
+                      (nr) * sizeof(*(hnd).p));             \
 })
 
 #define __copy_from_guest_offset(ptr, hnd, off, nr) ({          \
-    const typeof(*(ptr)) *_s = (hnd).p;                         \
+    unsigned long s_ = (unsigned long)(hnd).p;                  \
     typeof(*(ptr)) *_d = (ptr);                                 \
-    __raw_copy_from_guest(_d, _s + (off), sizeof (*_d) * (nr)); \
+    __raw_copy_from_guest(_d,                                   \
+                          (const void *)(s_ + (off) * sizeof(*_d)), \
+                          (nr) * sizeof(*_d));                  \
 })
 
 #define __copy_field_to_guest(hnd, ptr, field) ({       \
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] hotplug: Restore block-tap phy compatibility
Message-Id: <E1sKYxq-0002LK-RP@xenbits.xenproject.org>
Date: Fri, 21 Jun 2024 07:45:42 +0000

commit f16ac12bd4181177a7d953f88ef301287f587380
Author:     Jason Andryuk <jason.andryuk@amd.com>
AuthorDate: Thu Jun 20 12:08:42 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 20 12:08:42 2024 +0200

    hotplug: Restore block-tap phy compatibility
    
    backendtype=phy using the blktap kernel module needs to use write_dev,
    but tapback can't support that.  tapback should perform better, but make
    the script compatible with the old kernel module again.
    
    Fixes: 76a484193d ("hotplug: Update block-tap")
    Signed-off-by: Jason Andryuk <jason.andryuk@amd.com>
    Acked-by: Anthony PERARD <anthony.perard@vates.tech>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 tools/hotplug/Linux/block-tap | 21 +++++++++++++++------
 1 file changed, 15 insertions(+), 6 deletions(-)

diff --git a/tools/hotplug/Linux/block-tap b/tools/hotplug/Linux/block-tap
index 126e472786..8661ce77e3 100755
--- a/tools/hotplug/Linux/block-tap
+++ b/tools/hotplug/Linux/block-tap
@@ -20,9 +20,13 @@
 #
 # Disks should be specified using the following syntax:
 #
+# For use with tapback (vbd3) (preferred):
 # vdev=xvda,backendtype=tap,format=vhd,target=/srv/target.vhd
 #
-# format is either "aio" (for raw files), or "vhd"
+# For use with blkback and the blktap2 kernel module:
+# script=block-tap,vdev=xvda,target=<type>:<file>
+#
+# format/<type> is either "aio" (for raw files), or "vhd"
 
 dir=$(dirname "$0")
 . "$dir/block-common.sh"
@@ -205,12 +209,17 @@ add()
 
     xenstore_write "$XENBUS_PATH/pid" "$pid"
     xenstore_write "$XENBUS_PATH/minor" "$minor"
-    # dev, as a unix socket, would end up with major:minor 0:0 in
-    # physical-device if write_dev were used.  tapback would be thrown off by
-    # that incorrect minor, so just skip writing physical-device.
-    xenstore_write "$XENBUS_PATH/physical-device-path" "$dev"
 
-    success
+    if [ "$XENBUS_TYPE" = "vbd3" ] ; then
+        # $dev, as a unix socket, has major:minor 0:0.  If write_dev writes
+        # physical-device, tapback would use that incorrect minor 0.  So don't
+        # write physical-device.
+        xenstore_write "$XENBUS_PATH/physical-device-path" "$dev"
+
+        success
+    else
+        write_dev "$dev"
+    fi
 
     release_lock "block"
 }
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] tools/libs/light: Fix nic->vlan memory allocation
Message-Id: <E1sKYy0-0002Ln-UA@xenbits.xenproject.org>
Date: Fri, 21 Jun 2024 07:45:52 +0000

commit 74970165bab8924898f3ad186364bf96310e8e4e
Author:     Leigh Brown <leigh@solinno.co.uk>
AuthorDate: Thu Jun 20 12:09:02 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 20 12:09:02 2024 +0200

    tools/libs/light: Fix nic->vlan memory allocation
    
    After the following commit:
    3bc14e4fa4b9 ("tools/libs/light: Add vlan field to libxl_device_nic")
    xl list -l aborts with a double free error if a domain has at least
    one vif defined:
    
      $ sudo xl list -l
      free(): double free detected in tcache 2
      Aborted
    
    Orginally, the vlan field was called vid and was defined as an integer.
    It was appropriate to call libxl__xs_read_checked() with gc passed as
    the string data was copied to a different variable.  However, the final
    version uses a string data type and the call should have been changed
    to use NOGC instead of gc to allow that data to live past the gc
    controlled lifetime, in line with the other string fields.
    
    This patch makes the change to pass NOGC instead of gc and moves the
    new code to be next to the other string fields (fixing a couple of
    errant tabs along the way), as recommended by Jason.
    
    Fixes: 3bc14e4fa4b9 ("tools/libs/light: Add vlan field to libxl_device_nic")
    Signed-off-by: Leigh Brown <leigh@solinno.co.uk>
    Reviewed-by: Jason Andryuk <jason.andryuk@amd.com>
    Acked-by: Anthony PERARD <anthony.perard@vates.tech>
    Release-acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 tools/libs/light/libxl_nic.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/tools/libs/light/libxl_nic.c b/tools/libs/light/libxl_nic.c
index d861e3726d..300a96a8b1 100644
--- a/tools/libs/light/libxl_nic.c
+++ b/tools/libs/light/libxl_nic.c
@@ -318,11 +318,6 @@ static int libxl__nic_from_xenstore(libxl__gc *gc, const char *libxl_path,
         nic->mtu = LIBXL_DEVICE_NIC_MTU_DEFAULT;
     }
 
-    rc = libxl__xs_read_checked(gc, XBT_NULL,
-                                GCSPRINTF("%s/vlan", libxl_path),
-				(const char **)(&nic->vlan));
-    if (rc) goto out;
-
     rc = libxl__xs_read_checked(gc, XBT_NULL,
                                 GCSPRINTF("%s/mac", libxl_path), &tmp);
     if (rc) goto out;
@@ -345,6 +340,10 @@ static int libxl__nic_from_xenstore(libxl__gc *gc, const char *libxl_path,
                                 GCSPRINTF("%s/script", libxl_path),
                                 (const char **)(&nic->script));
     if (rc) goto out;
+    rc = libxl__xs_read_checked(NOGC, XBT_NULL,
+                                GCSPRINTF("%s/vlan", libxl_path),
+                                (const char **)(&nic->vlan));
+    if (rc) goto out;
     rc = libxl__xs_read_checked(NOGC, XBT_NULL,
                                 GCSPRINTF("%s/forwarddev", libxl_path),
                                 (const char **)(&nic->coloft_forwarddev));
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/irq: forward pending interrupts to new destination in fixup_irqs()
Message-Id: <E1sKYyB-0002N7-13@xenbits.xenproject.org>
Date: Fri, 21 Jun 2024 07:46:03 +0000

commit e2bb28d621584fce15c907002ddc7c6772644b64
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Thu Jun 20 12:09:32 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 20 12:09:32 2024 +0200

    x86/irq: forward pending interrupts to new destination in fixup_irqs()
    
    fixup_irqs() is used to evacuate interrupts from to be offlined CPUs.  Given
    the CPU is to become offline, the normal migration logic used by Xen where the
    vector in the previous target(s) is left configured until the interrupt is
    received on the new destination is not suitable.
    
    Instead attempt to do as much as possible in order to prevent loosing
    interrupts.  If fixup_irqs() is called from the CPU to be offlined (as is
    currently the case for CPU hot unplug) attempt to forward pending vectors when
    interrupts that target the current CPU are migrated to a different destination.
    
    Additionally, for interrupts that have already been moved from the current CPU
    prior to the call to fixup_irqs() but that haven't been delivered to the new
    destination (iow: interrupts with move_in_progress set and the current CPU set
    in ->arch.old_cpu_mask) also check whether the previous vector is pending and
    forward it to the new destination.
    
    This allows us to remove the window with interrupts enabled at the bottom of
    fixup_irqs().  Such window wasn't safe anyway: references to the CPU to become
    offline are removed from interrupts masks, but the per-CPU vector_irq[] array
    is not updated to reflect those changes (as the CPU is going offline anyway).
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/include/asm/apic.h |  5 +++++
 xen/arch/x86/irq.c              | 46 +++++++++++++++++++++++++++++++++++------
 2 files changed, 45 insertions(+), 6 deletions(-)

diff --git a/xen/arch/x86/include/asm/apic.h b/xen/arch/x86/include/asm/apic.h
index d1cb001fb4..7bd66dc6e1 100644
--- a/xen/arch/x86/include/asm/apic.h
+++ b/xen/arch/x86/include/asm/apic.h
@@ -132,6 +132,11 @@ static inline bool apic_isr_read(uint8_t vector)
             (vector & 0x1f)) & 1;
 }
 
+static inline bool apic_irr_read(unsigned int vector)
+{
+    return apic_read(APIC_IRR + (vector / 32 * 0x10)) & (1U << (vector % 32));
+}
+
 static inline u32 get_apic_id(void)
 {
     u32 id = apic_read(APIC_ID);
diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index d7f15c38af..9a611c79e0 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2591,7 +2591,7 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
 
     for ( irq = 0; irq < nr_irqs; irq++ )
     {
-        bool break_affinity = false, set_affinity = true;
+        bool break_affinity = false, set_affinity = true, check_irr = false;
         unsigned int vector, cpu = smp_processor_id();
         cpumask_t *affinity = this_cpu(scratch_cpumask);
 
@@ -2644,6 +2644,25 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
              !cpu_online(cpu) &&
              cpumask_test_cpu(cpu, desc->arch.old_cpu_mask) )
         {
+            /*
+             * This to be offlined CPU was the target of an interrupt that's
+             * been moved, and the new destination target hasn't yet
+             * acknowledged any interrupt from it.
+             *
+             * We know the interrupt is configured to target the new CPU at
+             * this point, so we can check IRR for any pending vectors and
+             * forward them to the new destination.
+             *
+             * Note that for the other case of an interrupt movement being in
+             * progress (move_cleanup_count being non-zero) we know the new
+             * destination has already acked at least one interrupt from this
+             * source, and hence there's no need to forward any stale
+             * interrupts.
+             */
+            if ( apic_irr_read(desc->arch.old_vector) )
+                send_IPI_mask(cpumask_of(cpumask_any(desc->arch.cpu_mask)),
+                              desc->arch.vector);
+
             /*
              * This CPU is going offline, remove it from ->arch.old_cpu_mask
              * and possibly release the old vector if the old mask becomes
@@ -2684,6 +2703,14 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
         if ( desc->handler->disable )
             desc->handler->disable(desc);
 
+        /*
+         * If the current CPU is going offline and is (one of) the target(s) of
+         * the interrupt, signal to check whether there are any pending vectors
+         * to be handled in the local APIC after the interrupt has been moved.
+         */
+        if ( !cpu_online(cpu) && cpumask_test_cpu(cpu, desc->arch.cpu_mask) )
+            check_irr = true;
+
         if ( desc->handler->set_affinity )
             desc->handler->set_affinity(desc, affinity);
         else if ( !(warned++) )
@@ -2694,6 +2721,18 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
 
         cpumask_copy(affinity, desc->affinity);
 
+        if ( check_irr && apic_irr_read(vector) )
+            /*
+             * Forward pending interrupt to the new destination, this CPU is
+             * going offline and otherwise the interrupt would be lost.
+             *
+             * Do the IRR check as late as possible before releasing the irq
+             * desc in order for any in-flight interrupts to be delivered to
+             * the lapic.
+             */
+            send_IPI_mask(cpumask_of(cpumask_any(desc->arch.cpu_mask)),
+                          desc->arch.vector);
+
         spin_unlock(&desc->lock);
 
         if ( !verbose )
@@ -2705,11 +2744,6 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
             printk("Broke affinity for IRQ%u, new: {%*pbl}\n",
                    irq, CPUMASK_PR(affinity));
     }
-
-    /* That doesn't seem sufficient.  Give it 1ms. */
-    local_irq_enable();
-    mdelay(1);
-    local_irq_disable();
 }
 
 void fixup_eoi(void)
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] livepatch: use appropriate type for buffer offset variables
Message-Id: <E1sKYyL-0002Na-44@xenbits.xenproject.org>
Date: Fri, 21 Jun 2024 07:46:13 +0000

commit 62071a1c16c4dbe765491e58e456fd3a19b33298
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Thu Jun 20 12:10:27 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 20 12:10:27 2024 +0200

    livepatch: use appropriate type for buffer offset variables
    
    As was made noticeable by the last of the commits referenced below,
    using a fixed-size type for such purposes is not only against
    ./CODING_STYLE, but can lead to actual issues. Switch to using size_t
    instead, thus also allowing calculations to be lighter-weight in 32-bit
    builds.
    
    No functional change for 64-bit builds.
    
    Link: https://gitlab.com/xen-project/xen/-/jobs/7136417308
    Fixes: b145b4a39c13 ("livepatch: Handle arbitrary size names with the list operation")
    Fixes: 5083e0ff939d ("livepatch: Add metadata runtime retrieval mechanism")
    Fixes: 43d5c5d5f70b ("xen: avoid UB in guest handle arithmetic")
    Reported-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Ross Lagerwall <ross.lagerwall@citrix.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/common/livepatch.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/common/livepatch.c b/xen/common/livepatch.c
index 502e264bc6..d93a556bcd 100644
--- a/xen/common/livepatch.c
+++ b/xen/common/livepatch.c
@@ -1252,7 +1252,7 @@ static int livepatch_list(struct xen_sysctl_livepatch_list *list)
     list->metadata_total_size = 0;
     if ( list->nr )
     {
-        uint64_t name_offset = 0, metadata_offset = 0;
+        size_t name_offset = 0, metadata_offset = 0;
 
         list_for_each_entry( data, &payload_list, list )
         {
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/ioapic: Fix signed shifts in io_apic.c
Message-Id: <E1sKeyl-0000RK-FY@xenbits.xenproject.org>
Date: Fri, 21 Jun 2024 14:11:03 +0000

commit c5746b021e573184fb92b601a0e93a295485054e
Author:     Matthew Barnes <matthew.barnes@cloud.com>
AuthorDate: Thu Jun 20 16:36:46 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Fri Jun 21 15:09:26 2024 +0100

    x86/ioapic: Fix signed shifts in io_apic.c
    
    There exists bitshifts in the IOAPIC code where signed integers are
    shifted to the left by up to 31 bits, which is undefined behaviour.
    
    This patch fixes this by changing the integers from signed to unsigned.
    
    Signed-off-by: Matthew Barnes <matthew.barnes@cloud.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/io_apic.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/io_apic.c b/xen/arch/x86/io_apic.c
index b48a642465..d73108558e 100644
--- a/xen/arch/x86/io_apic.c
+++ b/xen/arch/x86/io_apic.c
@@ -1692,7 +1692,8 @@ static void cf_check mask_and_ack_level_ioapic_irq(struct irq_desc *desc)
        !io_apic_level_ack_pending(desc->irq))
         move_masked_irq(desc);
 
-    if ( !(v & (1 << (i & 0x1f))) ) {
+    if ( !(v & (1U << (i & 0x1f))) )
+    {
         spin_lock(&ioapic_lock);
         __edge_IO_APIC_irq(desc->irq);
         __level_IO_APIC_irq(desc->irq);
@@ -1756,7 +1757,8 @@ static void cf_check end_level_ioapic_irq_new(struct irq_desc *desc, u8 vector)
          !io_apic_level_ack_pending(desc->irq) )
         move_native_irq(desc);
 
-    if (!(v & (1 << (i & 0x1f)))) {
+    if ( !(v & (1U << (i & 0x1f))) )
+    {
         spin_lock(&ioapic_lock);
         __mask_IO_APIC_irq(desc->irq);
         __edge_IO_APIC_irq(desc->irq);
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] libelf: avoid UB in elf_xen_feature_{get,set}()
Message-Id: <E1sKeyv-0000S1-JT@xenbits.xenproject.org>
Date: Fri, 21 Jun 2024 14:11:13 +0000

commit 9e7c26ad8532c3efda174dee5ab8bdbeef1e4f6d
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Thu Jun 20 17:34:56 2024 +0200
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Fri Jun 21 15:09:26 2024 +0100

    libelf: avoid UB in elf_xen_feature_{get,set}()
    
    When the left shift amount is up to 31, the shifted quantity wants to be
    of unsigned int (or wider) type.
    
    While there also adjust types: get doesn't alter the array and returns a
    boolean, while both don't really accept negative "nr". Drop a stray
    blank each as well.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/include/xen/libelf.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/xen/include/xen/libelf.h b/xen/include/xen/libelf.h
index a0675a4dc3..a99d33c251 100644
--- a/xen/include/xen/libelf.h
+++ b/xen/include/xen/libelf.h
@@ -445,13 +445,13 @@ struct elf_dom_parms {
     uint64_t virt_kend;
 };
 
-static inline void elf_xen_feature_set(int nr, uint32_t * addr)
+static inline void elf_xen_feature_set(unsigned int nr, uint32_t *addr)
 {
-    addr[nr >> 5] |= 1 << (nr & 31);
+    addr[nr >> 5] |= 1U << (nr & 31);
 }
-static inline int elf_xen_feature_get(int nr, uint32_t * addr)
+static inline bool elf_xen_feature_get(unsigned int nr, const uint32_t *addr)
 {
-    return !!(addr[nr >> 5] & (1 << (nr & 31)));
+    return addr[nr >> 5] & (1U << (nr & 31));
 }
 
 elf_errorstatus elf_xen_parse_features(const char *features,
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/ioapic: Fix signed shifts in io_apic.c
Message-Id: <E1sKtXd-00060U-Gg@xenbits.xenproject.org>
Date: Sat, 22 Jun 2024 05:44:01 +0000

commit c5746b021e573184fb92b601a0e93a295485054e
Author:     Matthew Barnes <matthew.barnes@cloud.com>
AuthorDate: Thu Jun 20 16:36:46 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Fri Jun 21 15:09:26 2024 +0100

    x86/ioapic: Fix signed shifts in io_apic.c
    
    There exists bitshifts in the IOAPIC code where signed integers are
    shifted to the left by up to 31 bits, which is undefined behaviour.
    
    This patch fixes this by changing the integers from signed to unsigned.
    
    Signed-off-by: Matthew Barnes <matthew.barnes@cloud.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/io_apic.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/io_apic.c b/xen/arch/x86/io_apic.c
index b48a642465..d73108558e 100644
--- a/xen/arch/x86/io_apic.c
+++ b/xen/arch/x86/io_apic.c
@@ -1692,7 +1692,8 @@ static void cf_check mask_and_ack_level_ioapic_irq(struct irq_desc *desc)
        !io_apic_level_ack_pending(desc->irq))
         move_masked_irq(desc);
 
-    if ( !(v & (1 << (i & 0x1f))) ) {
+    if ( !(v & (1U << (i & 0x1f))) )
+    {
         spin_lock(&ioapic_lock);
         __edge_IO_APIC_irq(desc->irq);
         __level_IO_APIC_irq(desc->irq);
@@ -1756,7 +1757,8 @@ static void cf_check end_level_ioapic_irq_new(struct irq_desc *desc, u8 vector)
          !io_apic_level_ack_pending(desc->irq) )
         move_native_irq(desc);
 
-    if (!(v & (1 << (i & 0x1f)))) {
+    if ( !(v & (1U << (i & 0x1f))) )
+    {
         spin_lock(&ioapic_lock);
         __mask_IO_APIC_irq(desc->irq);
         __edge_IO_APIC_irq(desc->irq);
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] libelf: avoid UB in elf_xen_feature_{get,set}()
Message-Id: <E1sKtXn-00061D-Kk@xenbits.xenproject.org>
Date: Sat, 22 Jun 2024 05:44:11 +0000

commit 9e7c26ad8532c3efda174dee5ab8bdbeef1e4f6d
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Thu Jun 20 17:34:56 2024 +0200
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Fri Jun 21 15:09:26 2024 +0100

    libelf: avoid UB in elf_xen_feature_{get,set}()
    
    When the left shift amount is up to 31, the shifted quantity wants to be
    of unsigned int (or wider) type.
    
    While there also adjust types: get doesn't alter the array and returns a
    boolean, while both don't really accept negative "nr". Drop a stray
    blank each as well.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/include/xen/libelf.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/xen/include/xen/libelf.h b/xen/include/xen/libelf.h
index a0675a4dc3..a99d33c251 100644
--- a/xen/include/xen/libelf.h
+++ b/xen/include/xen/libelf.h
@@ -445,13 +445,13 @@ struct elf_dom_parms {
     uint64_t virt_kend;
 };
 
-static inline void elf_xen_feature_set(int nr, uint32_t * addr)
+static inline void elf_xen_feature_set(unsigned int nr, uint32_t *addr)
 {
-    addr[nr >> 5] |= 1 << (nr & 31);
+    addr[nr >> 5] |= 1U << (nr & 31);
 }
-static inline int elf_xen_feature_get(int nr, uint32_t * addr)
+static inline bool elf_xen_feature_get(unsigned int nr, const uint32_t *addr)
 {
-    return !!(addr[nr >> 5] & (1 << (nr & 31)));
+    return addr[nr >> 5] & (1U << (nr & 31));
 }
 
 elf_errorstatus elf_xen_parse_features(const char *features,
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] tools/xl: Open xldevd.log with O_CLOEXEC
Message-Id: <E1sLlgl-0007LX-IE@xenbits.xenproject.org>
Date: Mon, 24 Jun 2024 15:33:03 +0000

commit ba52b3b624e4a1a976908552364eba924ca45430
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Tue May 7 12:05:58 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Mon Jun 24 16:22:59 2024 +0100

    tools/xl: Open xldevd.log with O_CLOEXEC
    
    `xl devd` has been observed leaking /var/log/xldevd.log into children.
    
    Note this is specifically safe; dup2() leaves O_CLOEXEC disabled on newfd, so
    after setting up stdout/stderr, it's only the logfile fd which will close on
    exec().
    
    Link: https://github.com/QubesOS/qubes-issues/issues/8292
    Reported-by: Demi Marie Obenour <demi@invisiblethingslab.com>
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
    Reviewed-by: Demi Marie Obenour <demi@invisiblethingslab.com>
    Acked-by: Anthony PERARD <anthony.perard@vates.tech>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 tools/xl/xl_utils.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/tools/xl/xl_utils.c b/tools/xl/xl_utils.c
index 17489d1829..b0d23b2cdb 100644
--- a/tools/xl/xl_utils.c
+++ b/tools/xl/xl_utils.c
@@ -27,6 +27,10 @@
 #include "xl.h"
 #include "xl_utils.h"
 
+#ifndef O_CLOEXEC
+#define O_CLOEXEC 0
+#endif
+
 void dolog(const char *file, int line, const char *func, const char *fmt, ...)
 {
     va_list ap;
@@ -270,7 +274,7 @@ int do_daemonize(const char *name, const char *pidfile)
         exit(-1);
     }
 
-    CHK_SYSCALL(logfile = open(fullname, O_WRONLY|O_CREAT|O_APPEND, 0644));
+    CHK_SYSCALL(logfile = open(fullname, O_WRONLY | O_CREAT | O_APPEND | O_CLOEXEC, 0644));
     free(fullname);
     assert(logfile >= 3);
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/shadow: Rework trace_shadow_gen() into sh_trace_va()
Message-Id: <E1sLlgv-0007MA-Ld@xenbits.xenproject.org>
Date: Mon, 24 Jun 2024 15:33:13 +0000

commit 2e9f8a734e3dd2b6abccea325dd5e854a3670dec
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed May 22 13:51:43 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Mon Jun 24 16:22:59 2024 +0100

    x86/shadow: Rework trace_shadow_gen() into sh_trace_va()
    
    The ((GUEST_PAGING_LEVELS - 2) << 8) expression in the event field is common
    to all shadow trace events, so introduce sh_trace() as a very thin wrapper
    around trace().
    
    Then, rename trace_shadow_gen() to sh_trace_va() to better describe what it is
    doing, and to be more consistent with later cleanup.
    
    No functional change.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/mm/shadow/multi.c | 24 ++++++++++++++----------
 1 file changed, 14 insertions(+), 10 deletions(-)

diff --git a/xen/arch/x86/mm/shadow/multi.c b/xen/arch/x86/mm/shadow/multi.c
index bcd02b2d00..1775952d7e 100644
--- a/xen/arch/x86/mm/shadow/multi.c
+++ b/xen/arch/x86/mm/shadow/multi.c
@@ -1974,13 +1974,17 @@ typedef u32 guest_va_t;
 typedef u32 guest_pa_t;
 #endif
 
-static inline void trace_shadow_gen(u32 event, guest_va_t va)
+/* Shadow trace event with GUEST_PAGING_LEVELS folded into the event field. */
+static void sh_trace(uint32_t event, unsigned int extra, const void *extra_data)
+{
+    trace(event | ((GUEST_PAGING_LEVELS - 2) << 8), extra, extra_data);
+}
+
+/* Shadow trace event with the guest's linear address. */
+static void sh_trace_va(uint32_t event, guest_va_t va)
 {
     if ( tb_init_done )
-    {
-        event |= (GUEST_PAGING_LEVELS-2)<<8;
-        trace(event, sizeof(va), &va);
-    }
+        sh_trace(event, sizeof(va), &va);
 }
 
 static inline void trace_shadow_fixup(guest_l1e_t gl1e,
@@ -2239,7 +2243,7 @@ static int cf_check sh_page_fault(
                 sh_reset_early_unshadow(v);
                 perfc_incr(shadow_fault_fast_gnp);
                 SHADOW_PRINTK("fast path not-present\n");
-                trace_shadow_gen(TRC_SHADOW_FAST_PROPAGATE, va);
+                sh_trace_va(TRC_SHADOW_FAST_PROPAGATE, va);
                 return 0;
             }
 #ifdef CONFIG_HVM
@@ -2250,7 +2254,7 @@ static int cf_check sh_page_fault(
             perfc_incr(shadow_fault_fast_mmio);
             SHADOW_PRINTK("fast path mmio %#"PRIpaddr"\n", gpa);
             sh_reset_early_unshadow(v);
-            trace_shadow_gen(TRC_SHADOW_FAST_MMIO, va);
+            sh_trace_va(TRC_SHADOW_FAST_MMIO, va);
             return handle_mmio_with_translation(va, gpa >> PAGE_SHIFT, access)
                    ? EXCRET_fault_fixed : 0;
 #else
@@ -2265,7 +2269,7 @@ static int cf_check sh_page_fault(
              * Retry and let the hardware give us the right fault next time. */
             perfc_incr(shadow_fault_fast_fail);
             SHADOW_PRINTK("fast path false alarm!\n");
-            trace_shadow_gen(TRC_SHADOW_FALSE_FAST_PATH, va);
+            sh_trace_va(TRC_SHADOW_FALSE_FAST_PATH, va);
             return EXCRET_fault_fixed;
         }
     }
@@ -2481,7 +2485,7 @@ static int cf_check sh_page_fault(
 #endif
         paging_unlock(d);
         put_gfn(d, gfn_x(gfn));
-        trace_shadow_gen(TRC_SHADOW_DOMF_DYING, va);
+        sh_trace_va(TRC_SHADOW_DOMF_DYING, va);
         return 0;
     }
 
@@ -2569,7 +2573,7 @@ static int cf_check sh_page_fault(
         put_gfn(d, gfn_x(gfn));
 
         perfc_incr(shadow_fault_mmio);
-        trace_shadow_gen(TRC_SHADOW_MMIO, va);
+        sh_trace_va(TRC_SHADOW_MMIO, va);
 
         return handle_mmio_with_translation(va, gpa >> PAGE_SHIFT, access)
                ? EXCRET_fault_fixed : 0;
--
generated by git-patchbot for /home/xen/git/xen.git#staging


From xen-changelog-bounces@lists.xenproject.org Mon Jun 24 15:33:24 2024
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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/shadow: Introduce sh_trace_gl1e_va()
Message-Id: <E1sLlh5-0007Mu-PJ@xenbits.xenproject.org>
Date: Mon, 24 Jun 2024 15:33:23 +0000

commit 578066d82b2b96e949ff46e6c142a33231b1ae2d
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed May 22 13:58:22 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Mon Jun 24 16:22:59 2024 +0100

    x86/shadow: Introduce sh_trace_gl1e_va()
    
    trace_shadow_fixup() and trace_not_shadow_fault() both write out identical
    trace records.  Reimplement them in terms of a common sh_trace_gl1e_va().
    
    No functional change.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/mm/shadow/multi.c | 57 ++++++++++++------------------------------
 1 file changed, 16 insertions(+), 41 deletions(-)

diff --git a/xen/arch/x86/mm/shadow/multi.c b/xen/arch/x86/mm/shadow/multi.c
index 1775952d7e..75250c6f0f 100644
--- a/xen/arch/x86/mm/shadow/multi.c
+++ b/xen/arch/x86/mm/shadow/multi.c
@@ -1987,51 +1987,26 @@ static void sh_trace_va(uint32_t event, guest_va_t va)
         sh_trace(event, sizeof(va), &va);
 }
 
-static inline void trace_shadow_fixup(guest_l1e_t gl1e,
-                                      guest_va_t va)
+/* Shadow trace event with a gl1e, linear address and flags. */
+static void sh_trace_gl1e_va(uint32_t event, guest_l1e_t gl1e, guest_va_t va)
 {
     if ( tb_init_done )
     {
         struct __packed {
-            /* for PAE, guest_l1e may be 64 while guest_va may be 32;
-               so put it first for alignment sake. */
-            guest_l1e_t gl1e;
-            guest_va_t va;
-            u32 flags;
-        } d;
-        u32 event;
-
-        event = TRC_SHADOW_FIXUP | ((GUEST_PAGING_LEVELS-2)<<8);
-
-        d.gl1e = gl1e;
-        d.va = va;
-        d.flags = this_cpu(trace_shadow_path_flags);
-
-        trace(event, sizeof(d), &d);
-    }
-}
-
-static inline void trace_not_shadow_fault(guest_l1e_t gl1e,
-                                          guest_va_t va)
-{
-    if ( tb_init_done )
-    {
-        struct __packed {
-            /* for PAE, guest_l1e may be 64 while guest_va may be 32;
-               so put it first for alignment sake. */
+            /*
+             * For GUEST_PAGING_LEVELS=3 (PAE paging), guest_l1e is 64 while
+             * guest_va is 32.  Put it first to avoid padding.
+             */
             guest_l1e_t gl1e;
             guest_va_t va;
-            u32 flags;
-        } d;
-        u32 event;
-
-        event = TRC_SHADOW_NOT_SHADOW | ((GUEST_PAGING_LEVELS-2)<<8);
-
-        d.gl1e = gl1e;
-        d.va = va;
-        d.flags = this_cpu(trace_shadow_path_flags);
-
-        trace(event, sizeof(d), &d);
+            uint32_t flags;
+        } d = {
+            .gl1e  = gl1e,
+            .va    = va,
+            .flags = this_cpu(trace_shadow_path_flags),
+        };
+
+        sh_trace(event, sizeof(d), &d);
     }
 }
 
@@ -2603,7 +2578,7 @@ static int cf_check sh_page_fault(
     d->arch.paging.log_dirty.fault_count++;
     sh_reset_early_unshadow(v);
 
-    trace_shadow_fixup(gw.l1e, va);
+    sh_trace_gl1e_va(TRC_SHADOW_FIXUP, gw.l1e, va);
  done: __maybe_unused;
     sh_audit_gw(v, &gw);
     SHADOW_PRINTK("fixed\n");
@@ -2857,7 +2832,7 @@ static int cf_check sh_page_fault(
     put_gfn(d, gfn_x(gfn));
 
 propagate:
-    trace_not_shadow_fault(gw.l1e, va);
+    sh_trace_gl1e_va(TRC_SHADOW_NOT_SHADOW, gw.l1e, va);
 
     return 0;
 }
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/shadow: Rework trace_shadow_emulate_other() as sh_trace_gfn_va()
Message-Id: <E1sLlhF-0007NP-Sy@xenbits.xenproject.org>
Date: Mon, 24 Jun 2024 15:33:33 +0000

commit 8765783434e903fa8be628de25f9941b0204502d
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed May 22 14:05:13 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Mon Jun 24 16:22:59 2024 +0100

    x86/shadow: Rework trace_shadow_emulate_other() as sh_trace_gfn_va()
    
    sh_trace_gfn_va() is very similar to sh_trace_gl1e_va(), and a rather shorter
    name than trace_shadow_emulate_other().
    
    It's only referenced in CONFIG_HVM=y builds, so give it a __maybe_unused to
    placate randconfig builds.
    
    No functional change.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/mm/shadow/multi.c | 39 +++++++++++++++++++--------------------
 1 file changed, 19 insertions(+), 20 deletions(-)

diff --git a/xen/arch/x86/mm/shadow/multi.c b/xen/arch/x86/mm/shadow/multi.c
index 75250c6f0f..a1caae9127 100644
--- a/xen/arch/x86/mm/shadow/multi.c
+++ b/xen/arch/x86/mm/shadow/multi.c
@@ -2010,29 +2010,31 @@ static void sh_trace_gl1e_va(uint32_t event, guest_l1e_t gl1e, guest_va_t va)
     }
 }
 
-static inline void trace_shadow_emulate_other(u32 event,
-                                                 guest_va_t va,
-                                                 gfn_t gfn)
+/* Shadow trace event with a gfn, linear address and flags. */
+static void __maybe_unused sh_trace_gfn_va(uint32_t event, gfn_t gfn,
+                                           guest_va_t va)
 {
     if ( tb_init_done )
     {
         struct __packed {
-            /* for PAE, guest_l1e may be 64 while guest_va may be 32;
-               so put it first for alignment sake. */
+            /*
+             * For GUEST_PAGING_LEVELS=3 (PAE paging), gfn is 64 while
+             * guest_va is 32.  Put it first to avoid padding.
+             */
 #if GUEST_PAGING_LEVELS == 2
-            u32 gfn;
+            uint32_t gfn;
 #else
-            u64 gfn;
+            uint64_t gfn;
 #endif
             guest_va_t va;
-        } d;
-
-        event |= ((GUEST_PAGING_LEVELS-2)<<8);
-
-        d.gfn=gfn_x(gfn);
-        d.va = va;
+            uint32_t flags;
+        } d = {
+            .gfn   = gfn_x(gfn),
+            .va    = va,
+            .flags = this_cpu(trace_shadow_path_flags),
+        };
 
-        trace(event, sizeof(d), &d);
+        sh_trace(event, sizeof(d), &d);
     }
 }
 
@@ -2603,8 +2605,7 @@ static int cf_check sh_page_fault(
                       mfn_x(gmfn));
         perfc_incr(shadow_fault_emulate_failed);
         shadow_remove_all_shadows(d, gmfn);
-        trace_shadow_emulate_other(TRC_SHADOW_EMULATE_UNSHADOW_USER,
-                                      va, gfn);
+        sh_trace_gfn_va(TRC_SHADOW_EMULATE_UNSHADOW_USER, gfn, va);
         goto done;
     }
 
@@ -2683,8 +2684,7 @@ static int cf_check sh_page_fault(
         }
 #endif
         shadow_remove_all_shadows(d, gmfn);
-        trace_shadow_emulate_other(TRC_SHADOW_EMULATE_UNSHADOW_EVTINJ,
-                                   va, gfn);
+        sh_trace_gfn_va(TRC_SHADOW_EMULATE_UNSHADOW_EVTINJ, gfn, va);
         return EXCRET_fault_fixed;
     }
 
@@ -2739,8 +2739,7 @@ static int cf_check sh_page_fault(
          * though, this is a hint that this page should not be shadowed. */
         shadow_remove_all_shadows(d, gmfn);
 
-        trace_shadow_emulate_other(TRC_SHADOW_EMULATE_UNSHADOW_UNHANDLED,
-                                   va, gfn);
+        sh_trace_gfn_va(TRC_SHADOW_EMULATE_UNSHADOW_UNHANDLED, gfn, va);
         goto emulate_done;
     }
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/shadow: Don't leave trace record field uninitialized
Message-Id: <E1sLlhQ-0007O3-0G@xenbits.xenproject.org>
Date: Mon, 24 Jun 2024 15:33:44 +0000

commit 6a17e1199332c24b41bacccdc91dbeaf22653588
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed May 22 12:17:30 2024 +0200
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Mon Jun 24 16:22:59 2024 +0100

    x86/shadow: Don't leave trace record field uninitialized
    
    The emulation_count field is set only conditionally right now. Convert
    all field setting to an initializer, thus guaranteeing that field to be
    set to 0 (default initialized) when GUEST_PAGING_LEVELS != 3.
    
    Rework trace_shadow_emulate() to be consistent with the other trace helpers.
    
    Coverity-ID: 1598430
    Fixes: 9a86ac1aa3d2 ("xentrace 5/7: Additional tracing for the shadow code")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Acked-by: Roger Pau Monné <roger.pau@citrix.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
    Release-acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/mm/shadow/multi.c | 29 ++++++++++++++---------------
 1 file changed, 14 insertions(+), 15 deletions(-)

diff --git a/xen/arch/x86/mm/shadow/multi.c b/xen/arch/x86/mm/shadow/multi.c
index a1caae9127..8e0046ae69 100644
--- a/xen/arch/x86/mm/shadow/multi.c
+++ b/xen/arch/x86/mm/shadow/multi.c
@@ -2064,30 +2064,29 @@ static void cf_check trace_emulate_write_val(
 #endif
 }
 
-static inline void trace_shadow_emulate(guest_l1e_t gl1e, unsigned long va)
+static inline void sh_trace_emulate(guest_l1e_t gl1e, unsigned long va)
 {
     if ( tb_init_done )
     {
         struct __packed {
-            /* for PAE, guest_l1e may be 64 while guest_va may be 32;
-               so put it first for alignment sake. */
+            /*
+             * For GUEST_PAGING_LEVELS=3 (PAE paging), guest_l1e is 64 while
+             * guest_va is 32.  Put it first to avoid padding.
+             */
             guest_l1e_t gl1e, write_val;
             guest_va_t va;
             uint32_t flags:29, emulation_count:3;
-        } d;
-        u32 event;
-
-        event = TRC_SHADOW_EMULATE | ((GUEST_PAGING_LEVELS-2)<<8);
-
-        d.gl1e = gl1e;
-        d.write_val.l1 = this_cpu(trace_emulate_write_val);
-        d.va = va;
+        } d = {
+            .gl1e            = gl1e,
+            .write_val.l1    = this_cpu(trace_emulate_write_val),
+            .va              = va,
 #if GUEST_PAGING_LEVELS == 3
-        d.emulation_count = this_cpu(trace_extra_emulation_count);
+            .emulation_count = this_cpu(trace_extra_emulation_count),
 #endif
-        d.flags = this_cpu(trace_shadow_path_flags);
+            .flags           = this_cpu(trace_shadow_path_flags),
+        };
 
-        trace(event, sizeof(d), &d);
+        sh_trace(TRC_SHADOW_EMULATE, sizeof(d), &d);
     }
 }
 #endif /* CONFIG_HVM */
@@ -2816,7 +2815,7 @@ static int cf_check sh_page_fault(
     }
 #endif /* PAE guest */
 
-    trace_shadow_emulate(gw.l1e, va);
+    sh_trace_emulate(gw.l1e, va);
  emulate_done:
     SHADOW_PRINTK("emulated\n");
     return EXCRET_fault_fixed;
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/xlat: Sort out whitespace
Message-Id: <E1sLlha-0007Oe-3E@xenbits.xenproject.org>
Date: Mon, 24 Jun 2024 15:33:54 +0000

commit 90c1520d4eff8e6480035f523041fe62c5065833
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Tue Feb 20 19:27:33 2024 +0000
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Mon Jun 24 16:22:59 2024 +0100

    xen/xlat: Sort out whitespace
    
     * Fix tabs/spaces mismatch for certain rows
     * Insert lines between header files to improve legibility
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/include/xlat.lst | 31 +++++++++++++++++++++++++++----
 1 file changed, 27 insertions(+), 4 deletions(-)

diff --git a/xen/include/xlat.lst b/xen/include/xlat.lst
index 9c41948514..e811342bb0 100644
--- a/xen/include/xlat.lst
+++ b/xen/include/xlat.lst
@@ -20,19 +20,24 @@
 # First column indicator:
 # ! - needs translation
 # ? - needs checking
+
 ?	dom0_vga_console_info		xen.h
 ?	xenctl_bitmap			xen.h
 ?	mmu_update			xen.h
 !	mmuext_op			xen.h
 !	start_info			xen.h
 ?	vcpu_time_info			xen.h
+
 ?	pmu_amd_ctxt			arch-x86/pmu.h
 ?	pmu_arch			arch-x86/pmu.h
 ?	pmu_cntr_pair			arch-x86/pmu.h
 ?	pmu_intel_ctxt			arch-x86/pmu.h
 ?	pmu_regs			arch-x86/pmu.h
+
 !	cpu_user_regs			arch-x86/xen-@arch@.h
+
 !	trap_info			arch-x86/xen.h
+
 ?	cpu_offline_action		arch-x86/xen-mca.h
 ?	mc				arch-x86/xen-mca.h
 ?	mcinfo_bank			arch-x86/xen-mca.h
@@ -50,6 +55,7 @@
 ?	mc_notifydomain			arch-x86/xen-mca.h
 !	mc_physcpuinfo			arch-x86/xen-mca.h
 ?	page_offline_action		arch-x86/xen-mca.h
+
 ?	argo_addr			argo.h
 !	argo_iov			argo.h
 ?	argo_register_ring		argo.h
@@ -59,6 +65,7 @@
 ?	argo_ring_message_header	argo.h
 ?	argo_send_addr			argo.h
 ?	argo_unregister_ring		argo.h
+
 ?	evtchn_alloc_unbound		event_channel.h
 ?	evtchn_bind_interdomain		event_channel.h
 ?	evtchn_bind_ipi			event_channel.h
@@ -74,6 +81,7 @@
 ?	evtchn_set_priority		event_channel.h
 ?	evtchn_status			event_channel.h
 ?	evtchn_unmask			event_channel.h
+
 ?	gnttab_cache_flush		grant_table.h
 !	gnttab_copy			grant_table.h
 ?	gnttab_dump_table		grant_table.h
@@ -86,9 +94,10 @@
 ?	gnttab_get_version		grant_table.h
 !	gnttab_get_status_frames	grant_table.h
 ?	grant_entry_v1			grant_table.h
-?       grant_entry_header              grant_table.h
+?	grant_entry_header		grant_table.h
 ?	grant_entry_v2			grant_table.h
 ?	gnttab_swap_grant_ref		grant_table.h
+
 !	dm_op_buf			hvm/dm_op.h
 ?	dm_op_create_ioreq_server	hvm/dm_op.h
 ?	dm_op_destroy_ioreq_server	hvm/dm_op.h
@@ -108,15 +117,20 @@
 ?	dm_op_set_pci_intx_level	hvm/dm_op.h
 ?	dm_op_set_pci_link_route	hvm/dm_op.h
 ?	dm_op_track_dirty_vram		hvm/dm_op.h
+
 !	hvm_altp2m_set_mem_access_multi	hvm/hvm_op.h
+
 ?	vcpu_hvm_context		hvm/hvm_vcpu.h
 ?	vcpu_hvm_x86_32			hvm/hvm_vcpu.h
 ?	vcpu_hvm_x86_64			hvm/hvm_vcpu.h
+
 ?	hypfs_direntry			hypfs.h
 ?	hypfs_dirlistentry		hypfs.h
+
 ?	kexec_exec			kexec.h
 !	kexec_image			kexec.h
 !	kexec_range			kexec.h
+
 !	add_to_physmap			memory.h
 !	add_to_physmap_batch		memory.h
 !	foreign_memory_map		memory.h
@@ -130,6 +144,7 @@
 !	reserved_device_memory_map	memory.h
 ?	vmemrange			memory.h
 !	vnuma_topology_info		memory.h
+
 ?	physdev_eoi			physdev.h
 ?	physdev_get_free_pirq		physdev.h
 ?	physdev_irq			physdev.h
@@ -143,6 +158,7 @@
 ?	physdev_restore_msi		physdev.h
 ?	physdev_set_iopl		physdev.h
 ?	physdev_setup_gsi		physdev.h
+
 !	pct_register			platform.h
 !	power_register			platform.h
 ?	processor_csd			platform.h
@@ -158,23 +174,30 @@
 ?	xenpf_pcpu_version		platform.h
 ?	xenpf_resource_entry		platform.h
 ?	xenpf_ucode_revision		platform.h
+
 ?	pmu_data			pmu.h
 ?	pmu_params			pmu.h
+
 !	sched_poll			sched.h
 ?	sched_pin_override		sched.h
 ?	sched_remote_shutdown		sched.h
 ?	sched_shutdown			sched.h
+
 ?	t_buf				trace.h
+
 ?	vcpu_get_physid			vcpu.h
 ?	vcpu_register_vcpu_info		vcpu.h
 !	vcpu_runstate_info		vcpu.h
 ?	vcpu_set_periodic_timer		vcpu.h
 !	vcpu_set_singleshot_timer	vcpu.h
-?	build_id                        version.h
-?	compile_info                    version.h
-?	feature_info                    version.h
+
+?	build_id			version.h
+?	compile_info			version.h
+?	feature_info			version.h
+
 ?	xenoprof_init			xenoprof.h
 ?	xenoprof_passive		xenoprof.h
+
 ?	flask_access			xsm/flask_op.h
 ?	flask_cache_stats		xsm/flask_op.h
 ?	flask_hash_stats		xsm/flask_op.h
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/xlat: Sort structs per file
Message-Id: <E1sLlhk-0007Po-6I@xenbits.xenproject.org>
Date: Mon, 24 Jun 2024 15:34:04 +0000

commit ebed411e7afa240fea803ac97a0ced73fffef8dc
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Tue Feb 20 19:34:06 2024 +0000
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Mon Jun 24 16:22:59 2024 +0100

    xen/xlat: Sort structs per file
    
    ... with a C local to avoid ambiguities over _ and - as separators.
    
    Also adjust arch-x86/xen.h which is out-of-order relative to the other
    arch-x86/ files.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/include/xlat.lst | 44 ++++++++++++++++++++++----------------------
 1 file changed, 22 insertions(+), 22 deletions(-)

diff --git a/xen/include/xlat.lst b/xen/include/xlat.lst
index e811342bb0..0630530703 100644
--- a/xen/include/xlat.lst
+++ b/xen/include/xlat.lst
@@ -22,11 +22,11 @@
 # ? - needs checking
 
 ?	dom0_vga_console_info		xen.h
-?	xenctl_bitmap			xen.h
 ?	mmu_update			xen.h
 !	mmuext_op			xen.h
 !	start_info			xen.h
 ?	vcpu_time_info			xen.h
+?	xenctl_bitmap			xen.h
 
 ?	pmu_amd_ctxt			arch-x86/pmu.h
 ?	pmu_arch			arch-x86/pmu.h
@@ -36,17 +36,8 @@
 
 !	cpu_user_regs			arch-x86/xen-@arch@.h
 
-!	trap_info			arch-x86/xen.h
-
 ?	cpu_offline_action		arch-x86/xen-mca.h
 ?	mc				arch-x86/xen-mca.h
-?	mcinfo_bank			arch-x86/xen-mca.h
-?	mcinfo_common			arch-x86/xen-mca.h
-?	mcinfo_extended			arch-x86/xen-mca.h
-?	mcinfo_global			arch-x86/xen-mca.h
-?	mcinfo_logical_cpu		arch-x86/xen-mca.h
-?	mcinfo_msr			arch-x86/xen-mca.h
-?	mcinfo_recovery			arch-x86/xen-mca.h
 !	mc_fetch			arch-x86/xen-mca.h
 ?	mc_info				arch-x86/xen-mca.h
 ?	mc_inject_v2			arch-x86/xen-mca.h
@@ -54,8 +45,17 @@
 ?	mc_msrinject			arch-x86/xen-mca.h
 ?	mc_notifydomain			arch-x86/xen-mca.h
 !	mc_physcpuinfo			arch-x86/xen-mca.h
+?	mcinfo_bank			arch-x86/xen-mca.h
+?	mcinfo_common			arch-x86/xen-mca.h
+?	mcinfo_extended			arch-x86/xen-mca.h
+?	mcinfo_global			arch-x86/xen-mca.h
+?	mcinfo_logical_cpu		arch-x86/xen-mca.h
+?	mcinfo_msr			arch-x86/xen-mca.h
+?	mcinfo_recovery			arch-x86/xen-mca.h
 ?	page_offline_action		arch-x86/xen-mca.h
 
+!	trap_info			arch-x86/xen.h
+
 ?	argo_addr			argo.h
 !	argo_iov			argo.h
 ?	argo_register_ring		argo.h
@@ -85,18 +85,18 @@
 ?	gnttab_cache_flush		grant_table.h
 !	gnttab_copy			grant_table.h
 ?	gnttab_dump_table		grant_table.h
+!	gnttab_get_status_frames	grant_table.h
+?	gnttab_get_version		grant_table.h
 ?	gnttab_map_grant_ref		grant_table.h
+?	gnttab_set_version		grant_table.h
 !	gnttab_setup_table		grant_table.h
+?	gnttab_swap_grant_ref		grant_table.h
 !	gnttab_transfer			grant_table.h
-?	gnttab_unmap_grant_ref		grant_table.h
 ?	gnttab_unmap_and_replace	grant_table.h
-?	gnttab_set_version		grant_table.h
-?	gnttab_get_version		grant_table.h
-!	gnttab_get_status_frames	grant_table.h
-?	grant_entry_v1			grant_table.h
+?	gnttab_unmap_grant_ref		grant_table.h
 ?	grant_entry_header		grant_table.h
+?	grant_entry_v1			grant_table.h
 ?	grant_entry_v2			grant_table.h
-?	gnttab_swap_grant_ref		grant_table.h
 
 !	dm_op_buf			hvm/dm_op.h
 ?	dm_op_create_ioreq_server	hvm/dm_op.h
@@ -134,11 +134,11 @@
 !	add_to_physmap			memory.h
 !	add_to_physmap_batch		memory.h
 !	foreign_memory_map		memory.h
+!	mem_access_op			memory.h
+!	mem_acquire_resource		memory.h
 !	memory_exchange			memory.h
 !	memory_map			memory.h
 !	memory_reservation		memory.h
-!	mem_access_op			memory.h
-!	mem_acquire_resource		memory.h
 !	pod_target			memory.h
 !	remove_from_physmap		memory.h
 !	reserved_device_memory_map	memory.h
@@ -154,10 +154,10 @@
 ?	physdev_pci_device		physdev.h
 ?	physdev_pci_device_add		physdev.h
 ?	physdev_pci_mmcfg_reserved	physdev.h
-?	physdev_unmap_pirq		physdev.h
 ?	physdev_restore_msi		physdev.h
 ?	physdev_set_iopl		physdev.h
 ?	physdev_setup_gsi		physdev.h
+?	physdev_unmap_pirq		physdev.h
 
 !	pct_register			platform.h
 !	power_register			platform.h
@@ -169,17 +169,17 @@
 ?	processor_px			platform.h
 !	psd_package			platform.h
 ?	xenpf_enter_acpi_sleep		platform.h
-!	xenpf_symdata			platform.h
-?	xenpf_pcpuinfo			platform.h
 ?	xenpf_pcpu_version		platform.h
+?	xenpf_pcpuinfo			platform.h
 ?	xenpf_resource_entry		platform.h
+!	xenpf_symdata			platform.h
 ?	xenpf_ucode_revision		platform.h
 
 ?	pmu_data			pmu.h
 ?	pmu_params			pmu.h
 
-!	sched_poll			sched.h
 ?	sched_pin_override		sched.h
+!	sched_poll			sched.h
 ?	sched_remote_shutdown		sched.h
 ?	sched_shutdown			sched.h
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/gnttab: Perform compat/native gnttab_query_size check
Message-Id: <E1sLlhu-0007Qf-9K@xenbits.xenproject.org>
Date: Mon, 24 Jun 2024 15:34:14 +0000

commit 8c3bb4d8ce3f9e69ee173b8787a8cbbf1a852d06
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Tue Feb 20 19:58:08 2024 +0000
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Mon Jun 24 16:22:59 2024 +0100

    xen/gnttab: Perform compat/native gnttab_query_size check
    
    This subop appears to have been missed from the compat checks.
    
    Fixes: 5ce8fafa947c ("Dynamic grant-table sizing")
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/common/compat/grant_table.c | 9 +++++++++
 xen/include/xlat.lst            | 1 +
 2 files changed, 10 insertions(+)

diff --git a/xen/common/compat/grant_table.c b/xen/common/compat/grant_table.c
index c495c375eb..dd40c48b11 100644
--- a/xen/common/compat/grant_table.c
+++ b/xen/common/compat/grant_table.c
@@ -30,6 +30,11 @@ CHECK_gnttab_unmap_grant_ref;
 CHECK_gnttab_unmap_and_replace;
 #undef xen_gnttab_unmap_and_replace
 
+#define xen_gnttab_query_size gnttab_query_size
+CHECK_gnttab_query_size;
+#undef xen_gnttab_query_size
+DEFINE_XEN_GUEST_HANDLE(gnttab_query_size_compat_t);
+
 DEFINE_XEN_GUEST_HANDLE(gnttab_setup_table_compat_t);
 DEFINE_XEN_GUEST_HANDLE(gnttab_transfer_compat_t);
 DEFINE_XEN_GUEST_HANDLE(gnttab_copy_compat_t);
@@ -106,6 +111,10 @@ int compat_grant_table_op(
     CASE(copy);
 #endif
 
+#ifndef CHECK_query_size
+    CASE(query_size);
+#endif
+
 #ifndef CHECK_gnttab_dump_table
     CASE(dump_table);
 #endif
diff --git a/xen/include/xlat.lst b/xen/include/xlat.lst
index 0630530703..2046b36c04 100644
--- a/xen/include/xlat.lst
+++ b/xen/include/xlat.lst
@@ -88,6 +88,7 @@
 !	gnttab_get_status_frames	grant_table.h
 ?	gnttab_get_version		grant_table.h
 ?	gnttab_map_grant_ref		grant_table.h
+?	gnttab_query_size		grant_table.h
 ?	gnttab_set_version		grant_table.h
 !	gnttab_setup_table		grant_table.h
 ?	gnttab_swap_grant_ref		grant_table.h
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/riscv: Drop legacy __ro_after_init definition
Message-Id: <E1sLli4-0007RO-D3@xenbits.xenproject.org>
Date: Mon, 24 Jun 2024 15:34:24 +0000

commit 908407bf2b29a38d6879fc8c57dad14473ef67f8
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Fri Jun 21 20:29:07 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Mon Jun 24 16:22:59 2024 +0100

    xen/riscv: Drop legacy __ro_after_init definition
    
    Hide the legacy __ro_after_init definition in xen/cache.h for RISC-V, to avoid
    its use creeping in.  Only mm.c needs adjusting as a consequence
    
    No functional change.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/riscv/mm.c     | 2 +-
 xen/include/xen/cache.h | 2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/xen/arch/riscv/mm.c b/xen/arch/riscv/mm.c
index 053f043a3d..3ebaf6da01 100644
--- a/xen/arch/riscv/mm.c
+++ b/xen/arch/riscv/mm.c
@@ -1,11 +1,11 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <xen/cache.h>
 #include <xen/compiler.h>
 #include <xen/init.h>
 #include <xen/kernel.h>
 #include <xen/macros.h>
 #include <xen/pfn.h>
+#include <xen/sections.h>
 
 #include <asm/early_printk.h>
 #include <asm/csr.h>
diff --git a/xen/include/xen/cache.h b/xen/include/xen/cache.h
index 55456823c5..82a3ba38e3 100644
--- a/xen/include/xen/cache.h
+++ b/xen/include/xen/cache.h
@@ -15,7 +15,9 @@
 #define __cacheline_aligned __attribute__((__aligned__(SMP_CACHE_BYTES)))
 #endif
 
+#if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_PPC64)
 /* TODO: Phase out the use of this via cache.h */
 #define __ro_after_init __section(".data.ro_after_init")
+#endif
 
 #endif /* __LINUX_CACHE_H */
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: static-shmem: request host address to be specified for 1:1 domains
Message-Id: <E1sLn2y-0000YT-1n@xenbits.xenproject.org>
Date: Mon, 24 Jun 2024 17:00:04 +0000

commit c56f1ef577831ec70645ca5874d54f2e698c6761
Author:     Michal Orzel <michal.orzel@amd.com>
AuthorDate: Fri Jun 21 11:22:05 2024 +0200
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Mon Jun 24 17:55:06 2024 +0100

    xen/arm: static-shmem: request host address to be specified for 1:1 domains
    
    As a follow up to commit cb1ddafdc573 ("xen/arm/static-shmem: Static-shmem
    should be direct-mapped for direct-mapped domains") add a check to
    request that both host and guest physical address must be supplied for
    direct mapped domains. Otherwise return an error to prevent unwanted
    behavior.
    
    Signed-off-by: Michal Orzel <michal.orzel@amd.com>
    Fixes: 988f1c7e1f40 ("xen/arm: static-shmem: fix "gbase/pbase used  uninitialized" build failure")
    Reviewed-by: Julien Grall <jgrall@amazon.com>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/static-shmem.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/xen/arch/arm/static-shmem.c b/xen/arch/arm/static-shmem.c
index cd48d2896b..aa80756c3c 100644
--- a/xen/arch/arm/static-shmem.c
+++ b/xen/arch/arm/static-shmem.c
@@ -378,6 +378,13 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo,
             const struct membank *alloc_bank =
                 find_shm_bank_by_id(get_shmem_heap_banks(), shm_id);
 
+            if ( is_domain_direct_mapped(d) )
+            {
+                printk("%pd: host and guest physical address must be supplied for direct-mapped domains\n",
+                       d);
+                return -EINVAL;
+            }
+
             /* guest phys address is right at the beginning */
             gbase = dt_read_paddr(cells, addr_cells);
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] automation/eclair: add deviation for MISRA C Rule 17.7
Message-Id: <E1sLuHz-0003JA-S2@xenbits.xenproject.org>
Date: Tue, 25 Jun 2024 00:44:03 +0000

commit 912412f97a293f5e1deece134d78c52b1b0b8856
Author:     Federico Serafini <federico.serafini@bugseng.com>
AuthorDate: Fri Jun 14 11:15:38 2024 +0200
Commit:     Stefano Stabellini <stefano.stabellini@amd.com>
CommitDate: Mon Jun 24 16:39:09 2024 -0700

    automation/eclair: add deviation for MISRA C Rule 17.7
    
    Update ECLAIR configuration to deviate some cases where not using
    the return value of a function is not dangerous.
    
    Signed-off-by: Federico Serafini <federico.serafini@bugseng.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 automation/eclair_analysis/ECLAIR/deviations.ecl | 4 ++++
 docs/misra/deviations.rst                        | 9 +++++++++
 2 files changed, 13 insertions(+)

diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl
index e2653f77eb..89345a9d08 100644
--- a/automation/eclair_analysis/ECLAIR/deviations.ecl
+++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
@@ -413,6 +413,10 @@ explicit comment indicating the fallthrough intention is present."
 -config=MC3R1.R17.1,macros+={hide , "^va_(arg|start|copy|end)$"}
 -doc_end
 
+-doc_begin="Not using the return value of a function does not endanger safety if it coincides with an actual argument."
+-config=MC3R1.R17.7,calls+={safe, "any()", "decl(name(__builtin_memcpy||__builtin_memmove||__builtin_memset||cpumask_check))"}
+-doc_end
+
 #
 # Series 18.
 #
diff --git a/docs/misra/deviations.rst b/docs/misra/deviations.rst
index 36959aa44a..679d8c885f 100644
--- a/docs/misra/deviations.rst
+++ b/docs/misra/deviations.rst
@@ -364,6 +364,15 @@ Deviations related to MISRA C:2012 Rules:
        by `stdarg.h`.
      - Tagged as `deliberate` for ECLAIR.
 
+   * - R17.7
+     - Not using the return value of a function does not endanger safety if it
+       coincides with an actual argument.
+     - Tagged as `safe` for ECLAIR. Such functions are:
+         - __builtin_memcpy()
+         - __builtin_memmove()
+         - __builtin_memset()
+         - cpumask_check()
+
    * - R20.4
      - The override of the keyword \"inline\" in xen/compiler.h is present so
        that section contents checks pass when the compiler chooses not to
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] automation/eclair: add deviations of MISRA C Rule 5.5
Message-Id: <E1sLuI9-0003Js-W1@xenbits.xenproject.org>
Date: Tue, 25 Jun 2024 00:44:13 +0000

commit 5add709cc6595af95e181091dbbf6e00aae836e3
Author:     Federico Serafini <federico.serafini@bugseng.com>
AuthorDate: Thu Jun 20 14:50:34 2024 +0200
Commit:     Stefano Stabellini <stefano.stabellini@amd.com>
CommitDate: Mon Jun 24 16:40:05 2024 -0700

    automation/eclair: add deviations of MISRA C Rule 5.5
    
    MISRA C Rule 5.5 states that "Identifiers shall be distinct from macro
    names".
    
    Update ECLAIR configuration to deviate:
    - macros expanding to their own name;
    - clashes between macros and non-callable entities;
    - clashes related to the selection of specific implementations of string
      handling functions.
    
    Signed-off-by: Federico Serafini <federico.serafini@bugseng.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 automation/eclair_analysis/ECLAIR/deviations.ecl | 16 ++++++++++++++++
 docs/misra/deviations.rst                        | 21 +++++++++++++++++++++
 2 files changed, 37 insertions(+)

diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl
index 89345a9d08..ae2eaf50f7 100644
--- a/automation/eclair_analysis/ECLAIR/deviations.ecl
+++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
@@ -90,6 +90,22 @@ conform to the directive."
 -config=MC3R1.R5.3,reports+={safe, "any_area(any_loc(any_exp(macro(^read_debugreg$))&&any_exp(macro(^write_debugreg$))))"}
 -doc_end
 
+-doc_begin="Macros expanding to their own identifier (e.g., \"#define x x\") are deliberate."
+-config=MC3R1.R5.5,reports+={deliberate, "all_area(macro(same_id_body())||!macro(!same_id_body()))"}
+-doc_end
+
+-doc_begin="There is no clash between function like macros and not callable objects."
+-config=MC3R1.R5.5,reports+={deliberate, "all_area(macro(function_like())||decl(any()))&&all_area(macro(any())||!decl(kind(function))&&!decl(__function_pointer_decls))"}
+-doc_end
+
+-doc_begin="Clashes between function names and macros are deliberate for string handling functions since some architectures may want to use their own arch-specific implementation."
+-config=MC3R1.R5.5,reports+={deliberate, "all_area(all_loc(file(^xen/arch/x86/string\\.c|xen/include/xen/string\\.h|xen/lib/.*$)))"}
+-doc_end
+
+-doc_begin="In libelf, clashes between macros and function names are deliberate and needed to prevent the use of undecorated versions of memcpy, memset and memmove."
+-config=MC3R1.R5.5,reports+={deliberate, "any_area(decl(kind(function))||any_loc(macro(name(memcpy||memset||memmove))))&&any_area(any_loc(file(^xen/common/libelf/libelf-private\\.h$)))"}
+-doc_end
+
 -doc_begin="The type \"ret_t\" is deliberately defined multiple times,
 depending on the guest."
 -config=MC3R1.R5.6,reports+={deliberate,"any_area(any_loc(text(^.*ret_t.*$)))"}
diff --git a/docs/misra/deviations.rst b/docs/misra/deviations.rst
index 679d8c885f..16fc345756 100644
--- a/docs/misra/deviations.rst
+++ b/docs/misra/deviations.rst
@@ -98,6 +98,27 @@ Deviations related to MISRA C:2012 Rules:
          - __emulate_2op and __emulate_2op_nobyte
          - read_debugreg and write_debugreg
 
+   * - R5.5
+     - Macros expanding to their own name are allowed.
+     - Tagged as `deliberate` for ECLAIR.
+
+   * - R5.5
+     - Clashes between names of function-like macros and identifiers of
+       non-callable entities are allowed.
+     - Tagged as `deliberate` for ECLAIR.
+
+   * - R5.5
+     - Clashes between function names and macros are deliberate for string
+       handling functions since some architectures may want to use their own
+       arch-specific implementation.
+     - Tagged as `deliberate` for ECLAIR.
+
+   * - R5.5
+     - In libelf, clashes between macros and function names are deliberate and
+       needed to prevent the use of undecorated versions of memcpy, memset and
+       memmove.
+     - Tagged as `deliberate` for ECLAIR.
+
    * - R5.6
      - The type ret_t is deliberately defined multiple times depending on the
        type of guest to service.
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] automation/eclair: add more guidelines to the monitored set
Message-Id: <E1sLuIK-0003Kg-2p@xenbits.xenproject.org>
Date: Tue, 25 Jun 2024 00:44:24 +0000

commit c2f4ea4dc9eba454dc2e761bfd39ccb72870d268
Author:     Federico Serafini <federico.serafini@bugseng.com>
AuthorDate: Fri Jun 21 17:32:41 2024 +0200
Commit:     Stefano Stabellini <stefano.stabellini@amd.com>
CommitDate: Mon Jun 24 16:41:12 2024 -0700

    automation/eclair: add more guidelines to the monitored set
    
    Add more accepted guidelines to the monitored set to check them at each
    commit.
    
    Signed-off-by: Federico Serafini <federico.serafini@bugseng.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 automation/eclair_analysis/ECLAIR/monitored.ecl | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/automation/eclair_analysis/ECLAIR/monitored.ecl b/automation/eclair_analysis/ECLAIR/monitored.ecl
index 4daecb0c83..9ffaebbdc3 100644
--- a/automation/eclair_analysis/ECLAIR/monitored.ecl
+++ b/automation/eclair_analysis/ECLAIR/monitored.ecl
@@ -18,10 +18,13 @@
 -enable=MC3R1.R12.5
 -enable=MC3R1.R1.3
 -enable=MC3R1.R13.6
+-enable=MC3R1.R13.1
 -enable=MC3R1.R1.4
 -enable=MC3R1.R14.1
 -enable=MC3R1.R14.4
 -enable=MC3R1.R16.2
+-enable=MC3R1.R16.3
+-enable=MC3R1.R16.4
 -enable=MC3R1.R16.6
 -enable=MC3R1.R16.7
 -enable=MC3R1.R17.1
@@ -34,6 +37,7 @@
 -enable=MC3R1.R20.13
 -enable=MC3R1.R20.14
 -enable=MC3R1.R20.4
+-enable=MC3R1.R20.7
 -enable=MC3R1.R20.9
 -enable=MC3R1.R2.1
 -enable=MC3R1.R21.10
@@ -58,6 +62,7 @@
 -enable=MC3R1.R5.2
 -enable=MC3R1.R5.3
 -enable=MC3R1.R5.4
+-enable=MC3R1.R5.5
 -enable=MC3R1.R5.6
 -enable=MC3R1.R6.1
 -enable=MC3R1.R6.2
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] common/unlzo: address violation of MISRA C Rule 7.3
Message-Id: <E1sLuIU-0003LK-6D@xenbits.xenproject.org>
Date: Tue, 25 Jun 2024 00:44:34 +0000

commit 6e07f41b27c3267e4528327ebc44dd03ac869ae3
Author:     Alessandro Zucchelli <alessandro.zucchelli@bugseng.com>
AuthorDate: Fri Jun 21 15:40:47 2024 +0200
Commit:     Stefano Stabellini <stefano.stabellini@amd.com>
CommitDate: Mon Jun 24 16:41:58 2024 -0700

    common/unlzo: address violation of MISRA C Rule 7.3
    
    This addresses violations of MISRA C:2012 Rule 7.3 which states as
    following: the lowercase character `l' shall not be used in a literal
    suffix.
    
    The file common/unlzo.c defines the non-compliant constant LZO_BLOCK_SIZE with
    having a lowercase 'l'.
    It is now defined as '256*1024L'.
    
    No functional change.
    
    Signed-off-by: Alessandro Zucchelli <alessandro.zucchelli@bugseng.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/common/unlzo.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/common/unlzo.c b/xen/common/unlzo.c
index bdcefa95b3..acb8dff600 100644
--- a/xen/common/unlzo.c
+++ b/xen/common/unlzo.c
@@ -52,7 +52,7 @@ static inline u32 get_unaligned_be32(const void *p)
 static const unsigned char lzop_magic[] = {
 	0x89, 0x4c, 0x5a, 0x4f, 0x00, 0x0d, 0x0a, 0x1a, 0x0a };
 
-#define LZO_BLOCK_SIZE        (256*1024l)
+#define LZO_BLOCK_SIZE        (256*1024L)
 #define HEADER_HAS_FILTER      0x00000800L
 #define HEADER_SIZE_MIN       (9 + 7     + 4 + 8     + 1       + 4)
 #define HEADER_SIZE_MAX       (9 + 7 + 1 + 8 + 8 + 4 + 1 + 255 + 4)
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/pagewalk: Address MISRA R8.3 violation in guest_walk_tables()
Message-Id: <E1sLuIe-0003Lq-9b@xenbits.xenproject.org>
Date: Tue, 25 Jun 2024 00:44:44 +0000

commit b14dae96c07ef27cc7f8107ddaa16989e9ab024b
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Fri Jun 21 21:57:59 2024 +0100
Commit:     Stefano Stabellini <stefano.stabellini@amd.com>
CommitDate: Mon Jun 24 16:42:51 2024 -0700

    x86/pagewalk: Address MISRA R8.3 violation in guest_walk_tables()
    
    Commit 4c5d78a10dc8 ("x86/pagewalk: Re-implement the pagetable walker")
    intentionally renamed guest_walk_tables()'s 'pfec' parameter to 'walk' because
    it's not a PageFault Error Code, despite the name of some of the constants
    passed in.  Sadly the constants-cleanup I've been meaning to do since then
    still hasn't come to pass.
    
    Update the declaration to match, to placate MISRA.
    
    Fixes: 4c5d78a10dc8 ("x86/pagewalk: Re-implement the pagetable walker")
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/include/asm/guest_pt.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/arch/x86/include/asm/guest_pt.h b/xen/arch/x86/include/asm/guest_pt.h
index bc312343cd..7b0c9b005c 100644
--- a/xen/arch/x86/include/asm/guest_pt.h
+++ b/xen/arch/x86/include/asm/guest_pt.h
@@ -422,7 +422,7 @@ static inline unsigned int guest_walk_to_page_order(const walk_t *gw)
 
 bool
 guest_walk_tables(const struct vcpu *v, struct p2m_domain *p2m,
-                  unsigned long va, walk_t *gw, uint32_t pfec,
+                  unsigned long va, walk_t *gw, uint32_t walk,
                   gfn_t top_gfn, mfn_t top_mfn, void *top_map);
 
 /* Pretty-print the contents of a guest-walk */
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [mini-os master] mman: correct m{,un}lock() definitions
Message-Id: <E1sM113-0005X0-QJ@xenbits.xenproject.org>
Date: Tue, 25 Jun 2024 07:55:01 +0000

commit 8b038c7411ae7e823eaf6d15d5efbe037a07197a
Author:     Charles Arnold <carnold@suse.com>
AuthorDate: Tue Jun 25 09:50:11 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 25 09:50:11 2024 +0200

    mman: correct m{,un}lock() definitions
    
    gcc14 no longer (silently) accepts functions with no return type
    specified.
    
    Signed-off-by: Charles Arnold <carnold@suse.com>
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
---
 include/posix/sys/mman.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/posix/sys/mman.h b/include/posix/sys/mman.h
index 4d34979..69bba45 100644
--- a/include/posix/sys/mman.h
+++ b/include/posix/sys/mman.h
@@ -16,7 +16,7 @@
 
 void *mmap(void *start, size_t length, int prot, int flags, int fd, off_t offset) asm("mmap64");
 int munmap(void *start, size_t length);
-static inline mlock(const void *addr, size_t len) { return 0; }
-static inline munlock(const void *addr, size_t len) { return 0; }
+static inline int mlock(const void *addr, size_t len) { return 0; }
+static inline int munlock(const void *addr, size_t len) { return 0; }
 
 #endif /* _POSIX_SYS_MMAN_H */
--
generated by git-patchbot for /home/xen/git/mini-os.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] MAINTAINERS: Update my email address again
Message-Id: <E1sM2iZ-0005xq-IE@xenbits.xenproject.org>
Date: Tue, 25 Jun 2024 09:44:03 +0000

commit 93db2f64f3663192d9b83d89a35d596cad73fb08
Author:     Anthony PERARD <anthony.perard@vates.tech>
AuthorDate: Tue Jun 25 11:36:15 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 25 11:36:15 2024 +0200

    MAINTAINERS: Update my email address again
    
    Signed-off-by: Anthony PERARD <anthony.perard@vates.tech>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 MAINTAINERS | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 8e2b30a345..9d66b898ec 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -208,7 +208,7 @@ Maintainers List (try to look for most precise areas first)
 
 9PFSD
 M:	Juergen Gross <jgross@suse.com>
-M:	Anthony PERARD <anthony@xenproject.org>
+M:	Anthony PERARD <anthony.perard@vates.tech>
 S:	Supported
 F:	tools/9pfsd/
 
@@ -383,7 +383,7 @@ F:	xen/arch/x86/machine_kexec.c
 F:	xen/arch/x86/x86_64/kexec_reloc.S
 
 LIBS
-M:	Anthony PERARD <anthony@xenproject.org>
+M:	Anthony PERARD <anthony.perard@vates.tech>
 R:	Juergen Gross <jgross@suse.com>
 S:	Supported
 F:	tools/include/libxenvchan.h
@@ -429,7 +429,7 @@ S:	Supported
 F:	tools/ocaml/
 
 OVMF UPSTREAM
-M:	Anthony PERARD <anthony@xenproject.org>
+M:	Anthony PERARD <anthony.perard@vates.tech>
 S:	Supported
 T:	git https://xenbits.xenproject.org/git-http/ovmf.git
 
@@ -462,7 +462,7 @@ T:	git https://xenbits.xenproject.org/git-http/qemu-xen-traditional.git
 
 QEMU UPSTREAM
 M:	Stefano Stabellini <sstabellini@kernel.org>
-M:	Anthony Perard <anthony@xenproject.org>
+M:	Anthony Perard <anthony.perard@vates.tech>
 S:	Supported
 T:	git https://xenbits.xenproject.org/git-http/qemu-xen.git
 
@@ -515,7 +515,7 @@ F:	xen/arch/arm/include/asm/tee
 F:	xen/arch/arm/tee/
 
 TOOLSTACK
-M:	Anthony PERARD <anthony@xenproject.org>
+M:	Anthony PERARD <anthony.perard@vates.tech>
 S:	Supported
 F:	autogen.sh
 F:	config/*.in
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen: re-add type checking to {,__}copy_from_guest_offset()
Message-Id: <E1sM2ij-0006Dn-LI@xenbits.xenproject.org>
Date: Tue, 25 Jun 2024 09:44:13 +0000

commit 735865f88486814dd6ae255f13a7f70cd3b01d4f
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 25 11:36:59 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 25 11:36:59 2024 +0200

    xen: re-add type checking to {,__}copy_from_guest_offset()
    
    When re-working them to avoid UB on guest address calculations, I failed
    to add explicit type checks in exchange for the implicit ones that until
    then had happened in assignments that were there anyway.
    
    Fixes: 43d5c5d5f70b ("xen: avoid UB in guest handle arithmetic")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/include/xen/guest_access.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/xen/include/xen/guest_access.h b/xen/include/xen/guest_access.h
index 96dbef2e02..a2146749e3 100644
--- a/xen/include/xen/guest_access.h
+++ b/xen/include/xen/guest_access.h
@@ -86,6 +86,7 @@
 #define copy_from_guest_offset(ptr, hnd, off, nr) ({    \
     unsigned long s_ = (unsigned long)(hnd).p;          \
     typeof(*(ptr)) *_d = (ptr);                         \
+    (void)((hnd).p == _d);                              \
     raw_copy_from_guest(_d,                             \
                         (const void *)(s_ + (off) * sizeof(*_d)), \
                         (nr) * sizeof(*_d));            \
@@ -140,6 +141,7 @@
 #define __copy_from_guest_offset(ptr, hnd, off, nr) ({          \
     unsigned long s_ = (unsigned long)(hnd).p;                  \
     typeof(*(ptr)) *_d = (ptr);                                 \
+    (void)((hnd).p == _d);                                      \
     __raw_copy_from_guest(_d,                                   \
                           (const void *)(s_ + (off) * sizeof(*_d)), \
                           (nr) * sizeof(*_d));                  \
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] gnttab: fix compat query-size handling
Message-Id: <E1sM2it-0006EO-PP@xenbits.xenproject.org>
Date: Tue, 25 Jun 2024 09:44:23 +0000

commit 11ea49a3fda5f0cbd8546ee8bdc5e9c55736c828
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 25 11:37:44 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 25 11:37:44 2024 +0200

    gnttab: fix compat query-size handling
    
    The odd DEFINE_XEN_GUEST_HANDLE(), inconsistent with all other similar
    constructs, should have caught my attention. Turns out it was needed for
    the build to succeed merely because the corresponding #ifndef had a
    typo. That typo in turn broke compat mode guests, by having query-size
    requests of theirs wire into the domain_crash() at the bottom of the
    switch().
    
    Fixes: 8c3bb4d8ce3f ("xen/gnttab: Perform compat/native gnttab_query_size check")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    Release-Acked-by: Oleksii Kurochko <Oleksii.kurochko@gmail.com>
---
 xen/common/compat/grant_table.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/xen/common/compat/grant_table.c b/xen/common/compat/grant_table.c
index dd40c48b11..5ad0debf96 100644
--- a/xen/common/compat/grant_table.c
+++ b/xen/common/compat/grant_table.c
@@ -33,7 +33,6 @@ CHECK_gnttab_unmap_and_replace;
 #define xen_gnttab_query_size gnttab_query_size
 CHECK_gnttab_query_size;
 #undef xen_gnttab_query_size
-DEFINE_XEN_GUEST_HANDLE(gnttab_query_size_compat_t);
 
 DEFINE_XEN_GUEST_HANDLE(gnttab_setup_table_compat_t);
 DEFINE_XEN_GUEST_HANDLE(gnttab_transfer_compat_t);
@@ -111,7 +110,7 @@ int compat_grant_table_op(
     CASE(copy);
 #endif
 
-#ifndef CHECK_query_size
+#ifndef CHECK_gnttab_query_size
     CASE(query_size);
 #endif
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] automation/eclair: configure Rule 13.6 and custom service B.UNEVALEFF
Message-Id: <E1sMEil-0002Ko-OQ@xenbits.xenproject.org>
Date: Tue, 25 Jun 2024 22:33:03 +0000

commit 0ac3b175e74167815995df463181663461f8d9f1
Author:     Federico Serafini <federico.serafini@bugseng.com>
AuthorDate: Mon Jun 24 11:18:32 2024 +0200
Commit:     Stefano Stabellini <stefano.stabellini@amd.com>
CommitDate: Tue Jun 25 13:41:05 2024 -0700

    automation/eclair: configure Rule 13.6 and custom service B.UNEVALEFF
    
    Rule 13.6 states that "The operand of the `sizeof' operator shall not
    contain any expression which has potential side effects".
    
    Define service B.UNEVALEFF as an extension of Rule 13.6 to
    check for unevalued side effects also for typeof and alignof operators.
    
    Update ECLAIR configuration to deviate uses of BUILD_BUG_ON and
    alternative_v?call[0-9] for both Rule 13.6 and B.UNEVALEFF.
    
    Add service B.UNEVALEFF to the accepted.ecl guidelines to check
    "violations" in the weekly analysis.
    
    Signed-off-by: Federico Serafini <federico.serafini@bugseng.com>
    Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 automation/eclair_analysis/ECLAIR/B.UNEVALEFF.ecl        | 10 ++++++++++
 automation/eclair_analysis/ECLAIR/accepted_guidelines.sh |  2 ++
 automation/eclair_analysis/ECLAIR/analysis.ecl           |  1 +
 automation/eclair_analysis/ECLAIR/deviations.ecl         | 10 ++++++++++
 docs/misra/deviations.rst                                | 10 ++++++++++
 5 files changed, 33 insertions(+)

diff --git a/automation/eclair_analysis/ECLAIR/B.UNEVALEFF.ecl b/automation/eclair_analysis/ECLAIR/B.UNEVALEFF.ecl
new file mode 100644
index 0000000000..92d8db8986
--- /dev/null
+++ b/automation/eclair_analysis/ECLAIR/B.UNEVALEFF.ecl
@@ -0,0 +1,10 @@
+-clone_service=MC3R1.R13.6,B.UNEVALEFF
+
+-config=B.UNEVALEFF,summary="The operand of the `alignof' and `typeof'  operators shall not contain any expression which has potential side effects"
+-config=B.UNEVALEFF,stmt_child_matcher=
+{"stmt(node(utrait_expr)&&operator(alignof))", expr, 0, "stmt(any())", {}},
+{"stmt(node(utrait_type)&&operator(alignof))", type, 0, "stmt(any())", {}},
+{"stmt(node(utrait_expr)&&operator(preferred_alignof))", expr, 0, "stmt(any())", {}},
+{"stmt(node(utrait_type)&&operator(preferred_alignof))", type, 0, "stmt(any())", {}},
+{"type(node(typeof_expr))", expr, 0, "stmt(any())", {}},
+{"type(node(typeof_type))", type, 0, "stmt(any())", {}}
diff --git a/automation/eclair_analysis/ECLAIR/accepted_guidelines.sh b/automation/eclair_analysis/ECLAIR/accepted_guidelines.sh
index b308bd4cda..368135122c 100755
--- a/automation/eclair_analysis/ECLAIR/accepted_guidelines.sh
+++ b/automation/eclair_analysis/ECLAIR/accepted_guidelines.sh
@@ -11,3 +11,5 @@ accepted_rst=$1
 
 grep -Eo "\`(Dir|Rule) [0-9]+\.[0-9]+" ${accepted_rst} \
      | sed -e 's/`Rule /MC3R1.R/' -e  's/`Dir /MC3R1.D/' -e 's/.*/-enable=&/' > ${script_dir}/accepted.ecl
+
+echo "-enable=B.UNEVALEFF" >> ${script_dir}/accepted.ecl
diff --git a/automation/eclair_analysis/ECLAIR/analysis.ecl b/automation/eclair_analysis/ECLAIR/analysis.ecl
index 9134e59617..df0b551812 100644
--- a/automation/eclair_analysis/ECLAIR/analysis.ecl
+++ b/automation/eclair_analysis/ECLAIR/analysis.ecl
@@ -52,6 +52,7 @@ their Standard Library equivalents."
 -eval_file=adopted.ecl
 -eval_file=out_of_scope.ecl
 
+-eval_file=B.UNEVALEFF.ecl
 -eval_file=deviations.ecl
 -eval_file=call_properties.ecl
 -eval_file=tagging.ecl
diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl
index ae2eaf50f7..8f13dabeb1 100644
--- a/automation/eclair_analysis/ECLAIR/deviations.ecl
+++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
@@ -344,6 +344,16 @@ of the short-circuit evaluation strategy of such logical operators."
 -config=MC3R1.R13.5,reports+={disapplied,"any()"}
 -doc_end
 
+-doc_begin="Macros alternative_v?call[0-9] use sizeof and typeof to check that the argument types match the corresponding parameter ones."
+-config=MC3R1.R13.6,reports+={deliberate,"any_area(any_loc(any_exp(macro(^alternative_vcall[0-9]$))&&file(^xen/arch/x86/include/asm/alternative\\.h*$)))"}
+-config=B.UNEVALEFF,reports+={deliberate,"any_area(any_loc(any_exp(macro(^alternative_v?call[0-9]$))&&file(^xen/arch/x86/include/asm/alterantive\\.h*$)))"}
+-doc_end
+
+-doc_begin="Anything, no matter how complicated, inside the BUILD_BUG_ON macro is subject to a compile-time evaluation without relevant side effects."
+-config=MC3R1.R13.6,reports+={safe,"any_area(any_loc(any_exp(macro(name(BUILD_BUG_ON)))))"}
+-config=B.UNEVALEFF,reports+={safe,"any_area(any_loc(any_exp(macro(name(BUILD_BUG_ON)))))"}
+-doc_end
+
 #
 # Series 14
 #
diff --git a/docs/misra/deviations.rst b/docs/misra/deviations.rst
index 16fc345756..c6a2affc6a 100644
--- a/docs/misra/deviations.rst
+++ b/docs/misra/deviations.rst
@@ -300,6 +300,16 @@ Deviations related to MISRA C:2012 Rules:
        the short-circuit evaluation strategy for logical operators.
      - Project-wide deviation; tagged as `disapplied` for ECLAIR.
 
+   * - R13.6
+     - On x86, macros alternative_v?call[0-9] use sizeof and typeof to check
+       that the argument types match the corresponding parameter ones.
+     - Tagged as `deliberate` for ECLAIR.
+
+   * - R13.6
+     - Anything, no matter how complicated, inside the BUILD_BUG_ON macro is
+       subject to a compile-time evaluation without relevant side effects."
+     - Tagged as `safe` for ECLAIR.
+
    * - R14.2
      - The severe restrictions imposed by this rule on the use of 'for'
        statements are not counterbalanced by the presumed facilitation of the
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] automation/eclair_analysis: deviate and|or|xor|not for MISRA C Rule 21.2
Message-Id: <E1sMEiv-0002La-Si@xenbits.xenproject.org>
Date: Tue, 25 Jun 2024 22:33:13 +0000

commit 853f707cd9e2eb9410dbfbadbd5a01ac0252ef83
Author:     Alessandro Zucchelli <alessandro.zucchelli@bugseng.com>
AuthorDate: Tue Jun 25 13:41:27 2024 -0700
Commit:     Stefano Stabellini <stefano.stabellini@amd.com>
CommitDate: Tue Jun 25 13:41:27 2024 -0700

    automation/eclair_analysis: deviate and|or|xor|not for MISRA C Rule 21.2
    
    Rule 21.2 reports identifiers reserved for the C and POSIX standard
    libraries: or, and, not and xor are reserved identifiers because they
    constitute alternate spellings for the corresponding operators (they are
    defined as macros by iso646.h); however Xen doesn't use standard library
    headers, so there is no risk of overlap.
    
    This addresses violations arising from x86_emulate/x86_emulate.c, where
    label statements named as or, and and xor appear.
    
    No functional change.
    
    Signed-off-by: Alessandro Zucchelli <alessandro.zucchelli@bugseng.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 automation/eclair_analysis/ECLAIR/deviations.ecl | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl
index 8f13dabeb1..dcff4f4013 100644
--- a/automation/eclair_analysis/ECLAIR/deviations.ecl
+++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
@@ -523,6 +523,12 @@ in the expansion."
 # Series 21.
 #
 
+-doc_begin="or, and and xor are reserved identifiers because they constitute alternate
+spellings for the corresponding operators (they are defined as macros by iso646.h).
+However, Xen doesn't use standard library headers, so there is no risk of overlap."
+-config=MC3R1.R21.2,reports+={safe, "any_area(stmt(ref(kind(label)&&^(or|and|xor|not)$)))"}
+-doc_end
+
 -doc_begin="Xen does not use the functions provided by the Standard Library, but
 implements a set of functions that share the same names as their Standard Library equivalent.
 The implementation of these functions is available in source form, so the undefined, unspecified
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] tools/xl: Open xldevd.log with O_CLOEXEC
Message-Id: <E1sML6Y-0005QN-9s@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 05:22:02 +0000

commit ba52b3b624e4a1a976908552364eba924ca45430
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Tue May 7 12:05:58 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Mon Jun 24 16:22:59 2024 +0100

    tools/xl: Open xldevd.log with O_CLOEXEC
    
    `xl devd` has been observed leaking /var/log/xldevd.log into children.
    
    Note this is specifically safe; dup2() leaves O_CLOEXEC disabled on newfd, so
    after setting up stdout/stderr, it's only the logfile fd which will close on
    exec().
    
    Link: https://github.com/QubesOS/qubes-issues/issues/8292
    Reported-by: Demi Marie Obenour <demi@invisiblethingslab.com>
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
    Reviewed-by: Demi Marie Obenour <demi@invisiblethingslab.com>
    Acked-by: Anthony PERARD <anthony.perard@vates.tech>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 tools/xl/xl_utils.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/tools/xl/xl_utils.c b/tools/xl/xl_utils.c
index 17489d1829..b0d23b2cdb 100644
--- a/tools/xl/xl_utils.c
+++ b/tools/xl/xl_utils.c
@@ -27,6 +27,10 @@
 #include "xl.h"
 #include "xl_utils.h"
 
+#ifndef O_CLOEXEC
+#define O_CLOEXEC 0
+#endif
+
 void dolog(const char *file, int line, const char *func, const char *fmt, ...)
 {
     va_list ap;
@@ -270,7 +274,7 @@ int do_daemonize(const char *name, const char *pidfile)
         exit(-1);
     }
 
-    CHK_SYSCALL(logfile = open(fullname, O_WRONLY|O_CREAT|O_APPEND, 0644));
+    CHK_SYSCALL(logfile = open(fullname, O_WRONLY | O_CREAT | O_APPEND | O_CLOEXEC, 0644));
     free(fullname);
     assert(logfile >= 3);
 
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/shadow: Rework trace_shadow_gen() into sh_trace_va()
Message-Id: <E1sML6i-0005Qu-DC@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 05:22:12 +0000

commit 2e9f8a734e3dd2b6abccea325dd5e854a3670dec
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed May 22 13:51:43 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Mon Jun 24 16:22:59 2024 +0100

    x86/shadow: Rework trace_shadow_gen() into sh_trace_va()
    
    The ((GUEST_PAGING_LEVELS - 2) << 8) expression in the event field is common
    to all shadow trace events, so introduce sh_trace() as a very thin wrapper
    around trace().
    
    Then, rename trace_shadow_gen() to sh_trace_va() to better describe what it is
    doing, and to be more consistent with later cleanup.
    
    No functional change.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/mm/shadow/multi.c | 24 ++++++++++++++----------
 1 file changed, 14 insertions(+), 10 deletions(-)

diff --git a/xen/arch/x86/mm/shadow/multi.c b/xen/arch/x86/mm/shadow/multi.c
index bcd02b2d00..1775952d7e 100644
--- a/xen/arch/x86/mm/shadow/multi.c
+++ b/xen/arch/x86/mm/shadow/multi.c
@@ -1974,13 +1974,17 @@ typedef u32 guest_va_t;
 typedef u32 guest_pa_t;
 #endif
 
-static inline void trace_shadow_gen(u32 event, guest_va_t va)
+/* Shadow trace event with GUEST_PAGING_LEVELS folded into the event field. */
+static void sh_trace(uint32_t event, unsigned int extra, const void *extra_data)
+{
+    trace(event | ((GUEST_PAGING_LEVELS - 2) << 8), extra, extra_data);
+}
+
+/* Shadow trace event with the guest's linear address. */
+static void sh_trace_va(uint32_t event, guest_va_t va)
 {
     if ( tb_init_done )
-    {
-        event |= (GUEST_PAGING_LEVELS-2)<<8;
-        trace(event, sizeof(va), &va);
-    }
+        sh_trace(event, sizeof(va), &va);
 }
 
 static inline void trace_shadow_fixup(guest_l1e_t gl1e,
@@ -2239,7 +2243,7 @@ static int cf_check sh_page_fault(
                 sh_reset_early_unshadow(v);
                 perfc_incr(shadow_fault_fast_gnp);
                 SHADOW_PRINTK("fast path not-present\n");
-                trace_shadow_gen(TRC_SHADOW_FAST_PROPAGATE, va);
+                sh_trace_va(TRC_SHADOW_FAST_PROPAGATE, va);
                 return 0;
             }
 #ifdef CONFIG_HVM
@@ -2250,7 +2254,7 @@ static int cf_check sh_page_fault(
             perfc_incr(shadow_fault_fast_mmio);
             SHADOW_PRINTK("fast path mmio %#"PRIpaddr"\n", gpa);
             sh_reset_early_unshadow(v);
-            trace_shadow_gen(TRC_SHADOW_FAST_MMIO, va);
+            sh_trace_va(TRC_SHADOW_FAST_MMIO, va);
             return handle_mmio_with_translation(va, gpa >> PAGE_SHIFT, access)
                    ? EXCRET_fault_fixed : 0;
 #else
@@ -2265,7 +2269,7 @@ static int cf_check sh_page_fault(
              * Retry and let the hardware give us the right fault next time. */
             perfc_incr(shadow_fault_fast_fail);
             SHADOW_PRINTK("fast path false alarm!\n");
-            trace_shadow_gen(TRC_SHADOW_FALSE_FAST_PATH, va);
+            sh_trace_va(TRC_SHADOW_FALSE_FAST_PATH, va);
             return EXCRET_fault_fixed;
         }
     }
@@ -2481,7 +2485,7 @@ static int cf_check sh_page_fault(
 #endif
         paging_unlock(d);
         put_gfn(d, gfn_x(gfn));
-        trace_shadow_gen(TRC_SHADOW_DOMF_DYING, va);
+        sh_trace_va(TRC_SHADOW_DOMF_DYING, va);
         return 0;
     }
 
@@ -2569,7 +2573,7 @@ static int cf_check sh_page_fault(
         put_gfn(d, gfn_x(gfn));
 
         perfc_incr(shadow_fault_mmio);
-        trace_shadow_gen(TRC_SHADOW_MMIO, va);
+        sh_trace_va(TRC_SHADOW_MMIO, va);
 
         return handle_mmio_with_translation(va, gpa >> PAGE_SHIFT, access)
                ? EXCRET_fault_fixed : 0;
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/shadow: Introduce sh_trace_gl1e_va()
Message-Id: <E1sML6s-0005RW-GQ@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 05:22:22 +0000

commit 578066d82b2b96e949ff46e6c142a33231b1ae2d
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed May 22 13:58:22 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Mon Jun 24 16:22:59 2024 +0100

    x86/shadow: Introduce sh_trace_gl1e_va()
    
    trace_shadow_fixup() and trace_not_shadow_fault() both write out identical
    trace records.  Reimplement them in terms of a common sh_trace_gl1e_va().
    
    No functional change.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/mm/shadow/multi.c | 57 ++++++++++++------------------------------
 1 file changed, 16 insertions(+), 41 deletions(-)

diff --git a/xen/arch/x86/mm/shadow/multi.c b/xen/arch/x86/mm/shadow/multi.c
index 1775952d7e..75250c6f0f 100644
--- a/xen/arch/x86/mm/shadow/multi.c
+++ b/xen/arch/x86/mm/shadow/multi.c
@@ -1987,51 +1987,26 @@ static void sh_trace_va(uint32_t event, guest_va_t va)
         sh_trace(event, sizeof(va), &va);
 }
 
-static inline void trace_shadow_fixup(guest_l1e_t gl1e,
-                                      guest_va_t va)
+/* Shadow trace event with a gl1e, linear address and flags. */
+static void sh_trace_gl1e_va(uint32_t event, guest_l1e_t gl1e, guest_va_t va)
 {
     if ( tb_init_done )
     {
         struct __packed {
-            /* for PAE, guest_l1e may be 64 while guest_va may be 32;
-               so put it first for alignment sake. */
-            guest_l1e_t gl1e;
-            guest_va_t va;
-            u32 flags;
-        } d;
-        u32 event;
-
-        event = TRC_SHADOW_FIXUP | ((GUEST_PAGING_LEVELS-2)<<8);
-
-        d.gl1e = gl1e;
-        d.va = va;
-        d.flags = this_cpu(trace_shadow_path_flags);
-
-        trace(event, sizeof(d), &d);
-    }
-}
-
-static inline void trace_not_shadow_fault(guest_l1e_t gl1e,
-                                          guest_va_t va)
-{
-    if ( tb_init_done )
-    {
-        struct __packed {
-            /* for PAE, guest_l1e may be 64 while guest_va may be 32;
-               so put it first for alignment sake. */
+            /*
+             * For GUEST_PAGING_LEVELS=3 (PAE paging), guest_l1e is 64 while
+             * guest_va is 32.  Put it first to avoid padding.
+             */
             guest_l1e_t gl1e;
             guest_va_t va;
-            u32 flags;
-        } d;
-        u32 event;
-
-        event = TRC_SHADOW_NOT_SHADOW | ((GUEST_PAGING_LEVELS-2)<<8);
-
-        d.gl1e = gl1e;
-        d.va = va;
-        d.flags = this_cpu(trace_shadow_path_flags);
-
-        trace(event, sizeof(d), &d);
+            uint32_t flags;
+        } d = {
+            .gl1e  = gl1e,
+            .va    = va,
+            .flags = this_cpu(trace_shadow_path_flags),
+        };
+
+        sh_trace(event, sizeof(d), &d);
     }
 }
 
@@ -2603,7 +2578,7 @@ static int cf_check sh_page_fault(
     d->arch.paging.log_dirty.fault_count++;
     sh_reset_early_unshadow(v);
 
-    trace_shadow_fixup(gw.l1e, va);
+    sh_trace_gl1e_va(TRC_SHADOW_FIXUP, gw.l1e, va);
  done: __maybe_unused;
     sh_audit_gw(v, &gw);
     SHADOW_PRINTK("fixed\n");
@@ -2857,7 +2832,7 @@ static int cf_check sh_page_fault(
     put_gfn(d, gfn_x(gfn));
 
 propagate:
-    trace_not_shadow_fault(gw.l1e, va);
+    sh_trace_gl1e_va(TRC_SHADOW_NOT_SHADOW, gw.l1e, va);
 
     return 0;
 }
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/shadow: Rework trace_shadow_emulate_other() as sh_trace_gfn_va()
Message-Id: <E1sML72-0005SL-Jo@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 05:22:32 +0000

commit 8765783434e903fa8be628de25f9941b0204502d
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed May 22 14:05:13 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Mon Jun 24 16:22:59 2024 +0100

    x86/shadow: Rework trace_shadow_emulate_other() as sh_trace_gfn_va()
    
    sh_trace_gfn_va() is very similar to sh_trace_gl1e_va(), and a rather shorter
    name than trace_shadow_emulate_other().
    
    It's only referenced in CONFIG_HVM=y builds, so give it a __maybe_unused to
    placate randconfig builds.
    
    No functional change.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/mm/shadow/multi.c | 39 +++++++++++++++++++--------------------
 1 file changed, 19 insertions(+), 20 deletions(-)

diff --git a/xen/arch/x86/mm/shadow/multi.c b/xen/arch/x86/mm/shadow/multi.c
index 75250c6f0f..a1caae9127 100644
--- a/xen/arch/x86/mm/shadow/multi.c
+++ b/xen/arch/x86/mm/shadow/multi.c
@@ -2010,29 +2010,31 @@ static void sh_trace_gl1e_va(uint32_t event, guest_l1e_t gl1e, guest_va_t va)
     }
 }
 
-static inline void trace_shadow_emulate_other(u32 event,
-                                                 guest_va_t va,
-                                                 gfn_t gfn)
+/* Shadow trace event with a gfn, linear address and flags. */
+static void __maybe_unused sh_trace_gfn_va(uint32_t event, gfn_t gfn,
+                                           guest_va_t va)
 {
     if ( tb_init_done )
     {
         struct __packed {
-            /* for PAE, guest_l1e may be 64 while guest_va may be 32;
-               so put it first for alignment sake. */
+            /*
+             * For GUEST_PAGING_LEVELS=3 (PAE paging), gfn is 64 while
+             * guest_va is 32.  Put it first to avoid padding.
+             */
 #if GUEST_PAGING_LEVELS == 2
-            u32 gfn;
+            uint32_t gfn;
 #else
-            u64 gfn;
+            uint64_t gfn;
 #endif
             guest_va_t va;
-        } d;
-
-        event |= ((GUEST_PAGING_LEVELS-2)<<8);
-
-        d.gfn=gfn_x(gfn);
-        d.va = va;
+            uint32_t flags;
+        } d = {
+            .gfn   = gfn_x(gfn),
+            .va    = va,
+            .flags = this_cpu(trace_shadow_path_flags),
+        };
 
-        trace(event, sizeof(d), &d);
+        sh_trace(event, sizeof(d), &d);
     }
 }
 
@@ -2603,8 +2605,7 @@ static int cf_check sh_page_fault(
                       mfn_x(gmfn));
         perfc_incr(shadow_fault_emulate_failed);
         shadow_remove_all_shadows(d, gmfn);
-        trace_shadow_emulate_other(TRC_SHADOW_EMULATE_UNSHADOW_USER,
-                                      va, gfn);
+        sh_trace_gfn_va(TRC_SHADOW_EMULATE_UNSHADOW_USER, gfn, va);
         goto done;
     }
 
@@ -2683,8 +2684,7 @@ static int cf_check sh_page_fault(
         }
 #endif
         shadow_remove_all_shadows(d, gmfn);
-        trace_shadow_emulate_other(TRC_SHADOW_EMULATE_UNSHADOW_EVTINJ,
-                                   va, gfn);
+        sh_trace_gfn_va(TRC_SHADOW_EMULATE_UNSHADOW_EVTINJ, gfn, va);
         return EXCRET_fault_fixed;
     }
 
@@ -2739,8 +2739,7 @@ static int cf_check sh_page_fault(
          * though, this is a hint that this page should not be shadowed. */
         shadow_remove_all_shadows(d, gmfn);
 
-        trace_shadow_emulate_other(TRC_SHADOW_EMULATE_UNSHADOW_UNHANDLED,
-                                   va, gfn);
+        sh_trace_gfn_va(TRC_SHADOW_EMULATE_UNSHADOW_UNHANDLED, gfn, va);
         goto emulate_done;
     }
 
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/shadow: Don't leave trace record field uninitialized
Message-Id: <E1sML7C-0005T1-NJ@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 05:22:42 +0000

commit 6a17e1199332c24b41bacccdc91dbeaf22653588
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed May 22 12:17:30 2024 +0200
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Mon Jun 24 16:22:59 2024 +0100

    x86/shadow: Don't leave trace record field uninitialized
    
    The emulation_count field is set only conditionally right now. Convert
    all field setting to an initializer, thus guaranteeing that field to be
    set to 0 (default initialized) when GUEST_PAGING_LEVELS != 3.
    
    Rework trace_shadow_emulate() to be consistent with the other trace helpers.
    
    Coverity-ID: 1598430
    Fixes: 9a86ac1aa3d2 ("xentrace 5/7: Additional tracing for the shadow code")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Acked-by: Roger Pau Monné <roger.pau@citrix.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
    Release-acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/mm/shadow/multi.c | 29 ++++++++++++++---------------
 1 file changed, 14 insertions(+), 15 deletions(-)

diff --git a/xen/arch/x86/mm/shadow/multi.c b/xen/arch/x86/mm/shadow/multi.c
index a1caae9127..8e0046ae69 100644
--- a/xen/arch/x86/mm/shadow/multi.c
+++ b/xen/arch/x86/mm/shadow/multi.c
@@ -2064,30 +2064,29 @@ static void cf_check trace_emulate_write_val(
 #endif
 }
 
-static inline void trace_shadow_emulate(guest_l1e_t gl1e, unsigned long va)
+static inline void sh_trace_emulate(guest_l1e_t gl1e, unsigned long va)
 {
     if ( tb_init_done )
     {
         struct __packed {
-            /* for PAE, guest_l1e may be 64 while guest_va may be 32;
-               so put it first for alignment sake. */
+            /*
+             * For GUEST_PAGING_LEVELS=3 (PAE paging), guest_l1e is 64 while
+             * guest_va is 32.  Put it first to avoid padding.
+             */
             guest_l1e_t gl1e, write_val;
             guest_va_t va;
             uint32_t flags:29, emulation_count:3;
-        } d;
-        u32 event;
-
-        event = TRC_SHADOW_EMULATE | ((GUEST_PAGING_LEVELS-2)<<8);
-
-        d.gl1e = gl1e;
-        d.write_val.l1 = this_cpu(trace_emulate_write_val);
-        d.va = va;
+        } d = {
+            .gl1e            = gl1e,
+            .write_val.l1    = this_cpu(trace_emulate_write_val),
+            .va              = va,
 #if GUEST_PAGING_LEVELS == 3
-        d.emulation_count = this_cpu(trace_extra_emulation_count);
+            .emulation_count = this_cpu(trace_extra_emulation_count),
 #endif
-        d.flags = this_cpu(trace_shadow_path_flags);
+            .flags           = this_cpu(trace_shadow_path_flags),
+        };
 
-        trace(event, sizeof(d), &d);
+        sh_trace(TRC_SHADOW_EMULATE, sizeof(d), &d);
     }
 }
 #endif /* CONFIG_HVM */
@@ -2816,7 +2815,7 @@ static int cf_check sh_page_fault(
     }
 #endif /* PAE guest */
 
-    trace_shadow_emulate(gw.l1e, va);
+    sh_trace_emulate(gw.l1e, va);
  emulate_done:
     SHADOW_PRINTK("emulated\n");
     return EXCRET_fault_fixed;
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/xlat: Sort out whitespace
Message-Id: <E1sML7M-0005Tc-QE@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 05:22:52 +0000

commit 90c1520d4eff8e6480035f523041fe62c5065833
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Tue Feb 20 19:27:33 2024 +0000
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Mon Jun 24 16:22:59 2024 +0100

    xen/xlat: Sort out whitespace
    
     * Fix tabs/spaces mismatch for certain rows
     * Insert lines between header files to improve legibility
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/include/xlat.lst | 31 +++++++++++++++++++++++++++----
 1 file changed, 27 insertions(+), 4 deletions(-)

diff --git a/xen/include/xlat.lst b/xen/include/xlat.lst
index 9c41948514..e811342bb0 100644
--- a/xen/include/xlat.lst
+++ b/xen/include/xlat.lst
@@ -20,19 +20,24 @@
 # First column indicator:
 # ! - needs translation
 # ? - needs checking
+
 ?	dom0_vga_console_info		xen.h
 ?	xenctl_bitmap			xen.h
 ?	mmu_update			xen.h
 !	mmuext_op			xen.h
 !	start_info			xen.h
 ?	vcpu_time_info			xen.h
+
 ?	pmu_amd_ctxt			arch-x86/pmu.h
 ?	pmu_arch			arch-x86/pmu.h
 ?	pmu_cntr_pair			arch-x86/pmu.h
 ?	pmu_intel_ctxt			arch-x86/pmu.h
 ?	pmu_regs			arch-x86/pmu.h
+
 !	cpu_user_regs			arch-x86/xen-@arch@.h
+
 !	trap_info			arch-x86/xen.h
+
 ?	cpu_offline_action		arch-x86/xen-mca.h
 ?	mc				arch-x86/xen-mca.h
 ?	mcinfo_bank			arch-x86/xen-mca.h
@@ -50,6 +55,7 @@
 ?	mc_notifydomain			arch-x86/xen-mca.h
 !	mc_physcpuinfo			arch-x86/xen-mca.h
 ?	page_offline_action		arch-x86/xen-mca.h
+
 ?	argo_addr			argo.h
 !	argo_iov			argo.h
 ?	argo_register_ring		argo.h
@@ -59,6 +65,7 @@
 ?	argo_ring_message_header	argo.h
 ?	argo_send_addr			argo.h
 ?	argo_unregister_ring		argo.h
+
 ?	evtchn_alloc_unbound		event_channel.h
 ?	evtchn_bind_interdomain		event_channel.h
 ?	evtchn_bind_ipi			event_channel.h
@@ -74,6 +81,7 @@
 ?	evtchn_set_priority		event_channel.h
 ?	evtchn_status			event_channel.h
 ?	evtchn_unmask			event_channel.h
+
 ?	gnttab_cache_flush		grant_table.h
 !	gnttab_copy			grant_table.h
 ?	gnttab_dump_table		grant_table.h
@@ -86,9 +94,10 @@
 ?	gnttab_get_version		grant_table.h
 !	gnttab_get_status_frames	grant_table.h
 ?	grant_entry_v1			grant_table.h
-?       grant_entry_header              grant_table.h
+?	grant_entry_header		grant_table.h
 ?	grant_entry_v2			grant_table.h
 ?	gnttab_swap_grant_ref		grant_table.h
+
 !	dm_op_buf			hvm/dm_op.h
 ?	dm_op_create_ioreq_server	hvm/dm_op.h
 ?	dm_op_destroy_ioreq_server	hvm/dm_op.h
@@ -108,15 +117,20 @@
 ?	dm_op_set_pci_intx_level	hvm/dm_op.h
 ?	dm_op_set_pci_link_route	hvm/dm_op.h
 ?	dm_op_track_dirty_vram		hvm/dm_op.h
+
 !	hvm_altp2m_set_mem_access_multi	hvm/hvm_op.h
+
 ?	vcpu_hvm_context		hvm/hvm_vcpu.h
 ?	vcpu_hvm_x86_32			hvm/hvm_vcpu.h
 ?	vcpu_hvm_x86_64			hvm/hvm_vcpu.h
+
 ?	hypfs_direntry			hypfs.h
 ?	hypfs_dirlistentry		hypfs.h
+
 ?	kexec_exec			kexec.h
 !	kexec_image			kexec.h
 !	kexec_range			kexec.h
+
 !	add_to_physmap			memory.h
 !	add_to_physmap_batch		memory.h
 !	foreign_memory_map		memory.h
@@ -130,6 +144,7 @@
 !	reserved_device_memory_map	memory.h
 ?	vmemrange			memory.h
 !	vnuma_topology_info		memory.h
+
 ?	physdev_eoi			physdev.h
 ?	physdev_get_free_pirq		physdev.h
 ?	physdev_irq			physdev.h
@@ -143,6 +158,7 @@
 ?	physdev_restore_msi		physdev.h
 ?	physdev_set_iopl		physdev.h
 ?	physdev_setup_gsi		physdev.h
+
 !	pct_register			platform.h
 !	power_register			platform.h
 ?	processor_csd			platform.h
@@ -158,23 +174,30 @@
 ?	xenpf_pcpu_version		platform.h
 ?	xenpf_resource_entry		platform.h
 ?	xenpf_ucode_revision		platform.h
+
 ?	pmu_data			pmu.h
 ?	pmu_params			pmu.h
+
 !	sched_poll			sched.h
 ?	sched_pin_override		sched.h
 ?	sched_remote_shutdown		sched.h
 ?	sched_shutdown			sched.h
+
 ?	t_buf				trace.h
+
 ?	vcpu_get_physid			vcpu.h
 ?	vcpu_register_vcpu_info		vcpu.h
 !	vcpu_runstate_info		vcpu.h
 ?	vcpu_set_periodic_timer		vcpu.h
 !	vcpu_set_singleshot_timer	vcpu.h
-?	build_id                        version.h
-?	compile_info                    version.h
-?	feature_info                    version.h
+
+?	build_id			version.h
+?	compile_info			version.h
+?	feature_info			version.h
+
 ?	xenoprof_init			xenoprof.h
 ?	xenoprof_passive		xenoprof.h
+
 ?	flask_access			xsm/flask_op.h
 ?	flask_cache_stats		xsm/flask_op.h
 ?	flask_hash_stats		xsm/flask_op.h
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/xlat: Sort structs per file
Message-Id: <E1sML7W-0005UO-TE@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 05:23:02 +0000

commit ebed411e7afa240fea803ac97a0ced73fffef8dc
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Tue Feb 20 19:34:06 2024 +0000
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Mon Jun 24 16:22:59 2024 +0100

    xen/xlat: Sort structs per file
    
    ... with a C local to avoid ambiguities over _ and - as separators.
    
    Also adjust arch-x86/xen.h which is out-of-order relative to the other
    arch-x86/ files.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/include/xlat.lst | 44 ++++++++++++++++++++++----------------------
 1 file changed, 22 insertions(+), 22 deletions(-)

diff --git a/xen/include/xlat.lst b/xen/include/xlat.lst
index e811342bb0..0630530703 100644
--- a/xen/include/xlat.lst
+++ b/xen/include/xlat.lst
@@ -22,11 +22,11 @@
 # ? - needs checking
 
 ?	dom0_vga_console_info		xen.h
-?	xenctl_bitmap			xen.h
 ?	mmu_update			xen.h
 !	mmuext_op			xen.h
 !	start_info			xen.h
 ?	vcpu_time_info			xen.h
+?	xenctl_bitmap			xen.h
 
 ?	pmu_amd_ctxt			arch-x86/pmu.h
 ?	pmu_arch			arch-x86/pmu.h
@@ -36,17 +36,8 @@
 
 !	cpu_user_regs			arch-x86/xen-@arch@.h
 
-!	trap_info			arch-x86/xen.h
-
 ?	cpu_offline_action		arch-x86/xen-mca.h
 ?	mc				arch-x86/xen-mca.h
-?	mcinfo_bank			arch-x86/xen-mca.h
-?	mcinfo_common			arch-x86/xen-mca.h
-?	mcinfo_extended			arch-x86/xen-mca.h
-?	mcinfo_global			arch-x86/xen-mca.h
-?	mcinfo_logical_cpu		arch-x86/xen-mca.h
-?	mcinfo_msr			arch-x86/xen-mca.h
-?	mcinfo_recovery			arch-x86/xen-mca.h
 !	mc_fetch			arch-x86/xen-mca.h
 ?	mc_info				arch-x86/xen-mca.h
 ?	mc_inject_v2			arch-x86/xen-mca.h
@@ -54,8 +45,17 @@
 ?	mc_msrinject			arch-x86/xen-mca.h
 ?	mc_notifydomain			arch-x86/xen-mca.h
 !	mc_physcpuinfo			arch-x86/xen-mca.h
+?	mcinfo_bank			arch-x86/xen-mca.h
+?	mcinfo_common			arch-x86/xen-mca.h
+?	mcinfo_extended			arch-x86/xen-mca.h
+?	mcinfo_global			arch-x86/xen-mca.h
+?	mcinfo_logical_cpu		arch-x86/xen-mca.h
+?	mcinfo_msr			arch-x86/xen-mca.h
+?	mcinfo_recovery			arch-x86/xen-mca.h
 ?	page_offline_action		arch-x86/xen-mca.h
 
+!	trap_info			arch-x86/xen.h
+
 ?	argo_addr			argo.h
 !	argo_iov			argo.h
 ?	argo_register_ring		argo.h
@@ -85,18 +85,18 @@
 ?	gnttab_cache_flush		grant_table.h
 !	gnttab_copy			grant_table.h
 ?	gnttab_dump_table		grant_table.h
+!	gnttab_get_status_frames	grant_table.h
+?	gnttab_get_version		grant_table.h
 ?	gnttab_map_grant_ref		grant_table.h
+?	gnttab_set_version		grant_table.h
 !	gnttab_setup_table		grant_table.h
+?	gnttab_swap_grant_ref		grant_table.h
 !	gnttab_transfer			grant_table.h
-?	gnttab_unmap_grant_ref		grant_table.h
 ?	gnttab_unmap_and_replace	grant_table.h
-?	gnttab_set_version		grant_table.h
-?	gnttab_get_version		grant_table.h
-!	gnttab_get_status_frames	grant_table.h
-?	grant_entry_v1			grant_table.h
+?	gnttab_unmap_grant_ref		grant_table.h
 ?	grant_entry_header		grant_table.h
+?	grant_entry_v1			grant_table.h
 ?	grant_entry_v2			grant_table.h
-?	gnttab_swap_grant_ref		grant_table.h
 
 !	dm_op_buf			hvm/dm_op.h
 ?	dm_op_create_ioreq_server	hvm/dm_op.h
@@ -134,11 +134,11 @@
 !	add_to_physmap			memory.h
 !	add_to_physmap_batch		memory.h
 !	foreign_memory_map		memory.h
+!	mem_access_op			memory.h
+!	mem_acquire_resource		memory.h
 !	memory_exchange			memory.h
 !	memory_map			memory.h
 !	memory_reservation		memory.h
-!	mem_access_op			memory.h
-!	mem_acquire_resource		memory.h
 !	pod_target			memory.h
 !	remove_from_physmap		memory.h
 !	reserved_device_memory_map	memory.h
@@ -154,10 +154,10 @@
 ?	physdev_pci_device		physdev.h
 ?	physdev_pci_device_add		physdev.h
 ?	physdev_pci_mmcfg_reserved	physdev.h
-?	physdev_unmap_pirq		physdev.h
 ?	physdev_restore_msi		physdev.h
 ?	physdev_set_iopl		physdev.h
 ?	physdev_setup_gsi		physdev.h
+?	physdev_unmap_pirq		physdev.h
 
 !	pct_register			platform.h
 !	power_register			platform.h
@@ -169,17 +169,17 @@
 ?	processor_px			platform.h
 !	psd_package			platform.h
 ?	xenpf_enter_acpi_sleep		platform.h
-!	xenpf_symdata			platform.h
-?	xenpf_pcpuinfo			platform.h
 ?	xenpf_pcpu_version		platform.h
+?	xenpf_pcpuinfo			platform.h
 ?	xenpf_resource_entry		platform.h
+!	xenpf_symdata			platform.h
 ?	xenpf_ucode_revision		platform.h
 
 ?	pmu_data			pmu.h
 ?	pmu_params			pmu.h
 
-!	sched_poll			sched.h
 ?	sched_pin_override		sched.h
+!	sched_poll			sched.h
 ?	sched_remote_shutdown		sched.h
 ?	sched_shutdown			sched.h
 
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/gnttab: Perform compat/native gnttab_query_size check
Message-Id: <E1sML7g-0005Uv-WB@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 05:23:12 +0000

commit 8c3bb4d8ce3f9e69ee173b8787a8cbbf1a852d06
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Tue Feb 20 19:58:08 2024 +0000
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Mon Jun 24 16:22:59 2024 +0100

    xen/gnttab: Perform compat/native gnttab_query_size check
    
    This subop appears to have been missed from the compat checks.
    
    Fixes: 5ce8fafa947c ("Dynamic grant-table sizing")
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/common/compat/grant_table.c | 9 +++++++++
 xen/include/xlat.lst            | 1 +
 2 files changed, 10 insertions(+)

diff --git a/xen/common/compat/grant_table.c b/xen/common/compat/grant_table.c
index c495c375eb..dd40c48b11 100644
--- a/xen/common/compat/grant_table.c
+++ b/xen/common/compat/grant_table.c
@@ -30,6 +30,11 @@ CHECK_gnttab_unmap_grant_ref;
 CHECK_gnttab_unmap_and_replace;
 #undef xen_gnttab_unmap_and_replace
 
+#define xen_gnttab_query_size gnttab_query_size
+CHECK_gnttab_query_size;
+#undef xen_gnttab_query_size
+DEFINE_XEN_GUEST_HANDLE(gnttab_query_size_compat_t);
+
 DEFINE_XEN_GUEST_HANDLE(gnttab_setup_table_compat_t);
 DEFINE_XEN_GUEST_HANDLE(gnttab_transfer_compat_t);
 DEFINE_XEN_GUEST_HANDLE(gnttab_copy_compat_t);
@@ -106,6 +111,10 @@ int compat_grant_table_op(
     CASE(copy);
 #endif
 
+#ifndef CHECK_query_size
+    CASE(query_size);
+#endif
+
 #ifndef CHECK_gnttab_dump_table
     CASE(dump_table);
 #endif
diff --git a/xen/include/xlat.lst b/xen/include/xlat.lst
index 0630530703..2046b36c04 100644
--- a/xen/include/xlat.lst
+++ b/xen/include/xlat.lst
@@ -88,6 +88,7 @@
 !	gnttab_get_status_frames	grant_table.h
 ?	gnttab_get_version		grant_table.h
 ?	gnttab_map_grant_ref		grant_table.h
+?	gnttab_query_size		grant_table.h
 ?	gnttab_set_version		grant_table.h
 !	gnttab_setup_table		grant_table.h
 ?	gnttab_swap_grant_ref		grant_table.h
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/riscv: Drop legacy __ro_after_init definition
Message-Id: <E1sML7r-0005VS-2t@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 05:23:23 +0000

commit 908407bf2b29a38d6879fc8c57dad14473ef67f8
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Fri Jun 21 20:29:07 2024 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Mon Jun 24 16:22:59 2024 +0100

    xen/riscv: Drop legacy __ro_after_init definition
    
    Hide the legacy __ro_after_init definition in xen/cache.h for RISC-V, to avoid
    its use creeping in.  Only mm.c needs adjusting as a consequence
    
    No functional change.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/riscv/mm.c     | 2 +-
 xen/include/xen/cache.h | 2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/xen/arch/riscv/mm.c b/xen/arch/riscv/mm.c
index 053f043a3d..3ebaf6da01 100644
--- a/xen/arch/riscv/mm.c
+++ b/xen/arch/riscv/mm.c
@@ -1,11 +1,11 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <xen/cache.h>
 #include <xen/compiler.h>
 #include <xen/init.h>
 #include <xen/kernel.h>
 #include <xen/macros.h>
 #include <xen/pfn.h>
+#include <xen/sections.h>
 
 #include <asm/early_printk.h>
 #include <asm/csr.h>
diff --git a/xen/include/xen/cache.h b/xen/include/xen/cache.h
index 55456823c5..82a3ba38e3 100644
--- a/xen/include/xen/cache.h
+++ b/xen/include/xen/cache.h
@@ -15,7 +15,9 @@
 #define __cacheline_aligned __attribute__((__aligned__(SMP_CACHE_BYTES)))
 #endif
 
+#if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_PPC64)
 /* TODO: Phase out the use of this via cache.h */
 #define __ro_after_init __section(".data.ro_after_init")
+#endif
 
 #endif /* __LINUX_CACHE_H */
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: static-shmem: request host address to be specified for 1:1 domains
Message-Id: <E1sML81-0005WE-5t@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 05:23:33 +0000

commit c56f1ef577831ec70645ca5874d54f2e698c6761
Author:     Michal Orzel <michal.orzel@amd.com>
AuthorDate: Fri Jun 21 11:22:05 2024 +0200
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Mon Jun 24 17:55:06 2024 +0100

    xen/arm: static-shmem: request host address to be specified for 1:1 domains
    
    As a follow up to commit cb1ddafdc573 ("xen/arm/static-shmem: Static-shmem
    should be direct-mapped for direct-mapped domains") add a check to
    request that both host and guest physical address must be supplied for
    direct mapped domains. Otherwise return an error to prevent unwanted
    behavior.
    
    Signed-off-by: Michal Orzel <michal.orzel@amd.com>
    Fixes: 988f1c7e1f40 ("xen/arm: static-shmem: fix "gbase/pbase used  uninitialized" build failure")
    Reviewed-by: Julien Grall <jgrall@amazon.com>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/static-shmem.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/xen/arch/arm/static-shmem.c b/xen/arch/arm/static-shmem.c
index cd48d2896b..aa80756c3c 100644
--- a/xen/arch/arm/static-shmem.c
+++ b/xen/arch/arm/static-shmem.c
@@ -378,6 +378,13 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo,
             const struct membank *alloc_bank =
                 find_shm_bank_by_id(get_shmem_heap_banks(), shm_id);
 
+            if ( is_domain_direct_mapped(d) )
+            {
+                printk("%pd: host and guest physical address must be supplied for direct-mapped domains\n",
+                       d);
+                return -EINVAL;
+            }
+
             /* guest phys address is right at the beginning */
             gbase = dt_read_paddr(cells, addr_cells);
 
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] automation/eclair: add deviation for MISRA C Rule 17.7
Message-Id: <E1sML8B-0005Ww-9j@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 05:23:43 +0000

commit 912412f97a293f5e1deece134d78c52b1b0b8856
Author:     Federico Serafini <federico.serafini@bugseng.com>
AuthorDate: Fri Jun 14 11:15:38 2024 +0200
Commit:     Stefano Stabellini <stefano.stabellini@amd.com>
CommitDate: Mon Jun 24 16:39:09 2024 -0700

    automation/eclair: add deviation for MISRA C Rule 17.7
    
    Update ECLAIR configuration to deviate some cases where not using
    the return value of a function is not dangerous.
    
    Signed-off-by: Federico Serafini <federico.serafini@bugseng.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 automation/eclair_analysis/ECLAIR/deviations.ecl | 4 ++++
 docs/misra/deviations.rst                        | 9 +++++++++
 2 files changed, 13 insertions(+)

diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl
index e2653f77eb..89345a9d08 100644
--- a/automation/eclair_analysis/ECLAIR/deviations.ecl
+++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
@@ -413,6 +413,10 @@ explicit comment indicating the fallthrough intention is present."
 -config=MC3R1.R17.1,macros+={hide , "^va_(arg|start|copy|end)$"}
 -doc_end
 
+-doc_begin="Not using the return value of a function does not endanger safety if it coincides with an actual argument."
+-config=MC3R1.R17.7,calls+={safe, "any()", "decl(name(__builtin_memcpy||__builtin_memmove||__builtin_memset||cpumask_check))"}
+-doc_end
+
 #
 # Series 18.
 #
diff --git a/docs/misra/deviations.rst b/docs/misra/deviations.rst
index 36959aa44a..679d8c885f 100644
--- a/docs/misra/deviations.rst
+++ b/docs/misra/deviations.rst
@@ -364,6 +364,15 @@ Deviations related to MISRA C:2012 Rules:
        by `stdarg.h`.
      - Tagged as `deliberate` for ECLAIR.
 
+   * - R17.7
+     - Not using the return value of a function does not endanger safety if it
+       coincides with an actual argument.
+     - Tagged as `safe` for ECLAIR. Such functions are:
+         - __builtin_memcpy()
+         - __builtin_memmove()
+         - __builtin_memset()
+         - cpumask_check()
+
    * - R20.4
      - The override of the keyword \"inline\" in xen/compiler.h is present so
        that section contents checks pass when the compiler chooses not to
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] automation/eclair: add deviations of MISRA C Rule 5.5
Message-Id: <E1sML8L-0005Y1-Cf@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 05:23:53 +0000

commit 5add709cc6595af95e181091dbbf6e00aae836e3
Author:     Federico Serafini <federico.serafini@bugseng.com>
AuthorDate: Thu Jun 20 14:50:34 2024 +0200
Commit:     Stefano Stabellini <stefano.stabellini@amd.com>
CommitDate: Mon Jun 24 16:40:05 2024 -0700

    automation/eclair: add deviations of MISRA C Rule 5.5
    
    MISRA C Rule 5.5 states that "Identifiers shall be distinct from macro
    names".
    
    Update ECLAIR configuration to deviate:
    - macros expanding to their own name;
    - clashes between macros and non-callable entities;
    - clashes related to the selection of specific implementations of string
      handling functions.
    
    Signed-off-by: Federico Serafini <federico.serafini@bugseng.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 automation/eclair_analysis/ECLAIR/deviations.ecl | 16 ++++++++++++++++
 docs/misra/deviations.rst                        | 21 +++++++++++++++++++++
 2 files changed, 37 insertions(+)

diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl
index 89345a9d08..ae2eaf50f7 100644
--- a/automation/eclair_analysis/ECLAIR/deviations.ecl
+++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
@@ -90,6 +90,22 @@ conform to the directive."
 -config=MC3R1.R5.3,reports+={safe, "any_area(any_loc(any_exp(macro(^read_debugreg$))&&any_exp(macro(^write_debugreg$))))"}
 -doc_end
 
+-doc_begin="Macros expanding to their own identifier (e.g., \"#define x x\") are deliberate."
+-config=MC3R1.R5.5,reports+={deliberate, "all_area(macro(same_id_body())||!macro(!same_id_body()))"}
+-doc_end
+
+-doc_begin="There is no clash between function like macros and not callable objects."
+-config=MC3R1.R5.5,reports+={deliberate, "all_area(macro(function_like())||decl(any()))&&all_area(macro(any())||!decl(kind(function))&&!decl(__function_pointer_decls))"}
+-doc_end
+
+-doc_begin="Clashes between function names and macros are deliberate for string handling functions since some architectures may want to use their own arch-specific implementation."
+-config=MC3R1.R5.5,reports+={deliberate, "all_area(all_loc(file(^xen/arch/x86/string\\.c|xen/include/xen/string\\.h|xen/lib/.*$)))"}
+-doc_end
+
+-doc_begin="In libelf, clashes between macros and function names are deliberate and needed to prevent the use of undecorated versions of memcpy, memset and memmove."
+-config=MC3R1.R5.5,reports+={deliberate, "any_area(decl(kind(function))||any_loc(macro(name(memcpy||memset||memmove))))&&any_area(any_loc(file(^xen/common/libelf/libelf-private\\.h$)))"}
+-doc_end
+
 -doc_begin="The type \"ret_t\" is deliberately defined multiple times,
 depending on the guest."
 -config=MC3R1.R5.6,reports+={deliberate,"any_area(any_loc(text(^.*ret_t.*$)))"}
diff --git a/docs/misra/deviations.rst b/docs/misra/deviations.rst
index 679d8c885f..16fc345756 100644
--- a/docs/misra/deviations.rst
+++ b/docs/misra/deviations.rst
@@ -98,6 +98,27 @@ Deviations related to MISRA C:2012 Rules:
          - __emulate_2op and __emulate_2op_nobyte
          - read_debugreg and write_debugreg
 
+   * - R5.5
+     - Macros expanding to their own name are allowed.
+     - Tagged as `deliberate` for ECLAIR.
+
+   * - R5.5
+     - Clashes between names of function-like macros and identifiers of
+       non-callable entities are allowed.
+     - Tagged as `deliberate` for ECLAIR.
+
+   * - R5.5
+     - Clashes between function names and macros are deliberate for string
+       handling functions since some architectures may want to use their own
+       arch-specific implementation.
+     - Tagged as `deliberate` for ECLAIR.
+
+   * - R5.5
+     - In libelf, clashes between macros and function names are deliberate and
+       needed to prevent the use of undecorated versions of memcpy, memset and
+       memmove.
+     - Tagged as `deliberate` for ECLAIR.
+
    * - R5.6
      - The type ret_t is deliberately defined multiple times depending on the
        type of guest to service.
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] automation/eclair: add more guidelines to the monitored set
Message-Id: <E1sML8V-0005ZI-FR@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 05:24:03 +0000

commit c2f4ea4dc9eba454dc2e761bfd39ccb72870d268
Author:     Federico Serafini <federico.serafini@bugseng.com>
AuthorDate: Fri Jun 21 17:32:41 2024 +0200
Commit:     Stefano Stabellini <stefano.stabellini@amd.com>
CommitDate: Mon Jun 24 16:41:12 2024 -0700

    automation/eclair: add more guidelines to the monitored set
    
    Add more accepted guidelines to the monitored set to check them at each
    commit.
    
    Signed-off-by: Federico Serafini <federico.serafini@bugseng.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 automation/eclair_analysis/ECLAIR/monitored.ecl | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/automation/eclair_analysis/ECLAIR/monitored.ecl b/automation/eclair_analysis/ECLAIR/monitored.ecl
index 4daecb0c83..9ffaebbdc3 100644
--- a/automation/eclair_analysis/ECLAIR/monitored.ecl
+++ b/automation/eclair_analysis/ECLAIR/monitored.ecl
@@ -18,10 +18,13 @@
 -enable=MC3R1.R12.5
 -enable=MC3R1.R1.3
 -enable=MC3R1.R13.6
+-enable=MC3R1.R13.1
 -enable=MC3R1.R1.4
 -enable=MC3R1.R14.1
 -enable=MC3R1.R14.4
 -enable=MC3R1.R16.2
+-enable=MC3R1.R16.3
+-enable=MC3R1.R16.4
 -enable=MC3R1.R16.6
 -enable=MC3R1.R16.7
 -enable=MC3R1.R17.1
@@ -34,6 +37,7 @@
 -enable=MC3R1.R20.13
 -enable=MC3R1.R20.14
 -enable=MC3R1.R20.4
+-enable=MC3R1.R20.7
 -enable=MC3R1.R20.9
 -enable=MC3R1.R2.1
 -enable=MC3R1.R21.10
@@ -58,6 +62,7 @@
 -enable=MC3R1.R5.2
 -enable=MC3R1.R5.3
 -enable=MC3R1.R5.4
+-enable=MC3R1.R5.5
 -enable=MC3R1.R5.6
 -enable=MC3R1.R6.1
 -enable=MC3R1.R6.2
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] common/unlzo: address violation of MISRA C Rule 7.3
Message-Id: <E1sML8f-0005Zq-IO@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 05:24:13 +0000

commit 6e07f41b27c3267e4528327ebc44dd03ac869ae3
Author:     Alessandro Zucchelli <alessandro.zucchelli@bugseng.com>
AuthorDate: Fri Jun 21 15:40:47 2024 +0200
Commit:     Stefano Stabellini <stefano.stabellini@amd.com>
CommitDate: Mon Jun 24 16:41:58 2024 -0700

    common/unlzo: address violation of MISRA C Rule 7.3
    
    This addresses violations of MISRA C:2012 Rule 7.3 which states as
    following: the lowercase character `l' shall not be used in a literal
    suffix.
    
    The file common/unlzo.c defines the non-compliant constant LZO_BLOCK_SIZE with
    having a lowercase 'l'.
    It is now defined as '256*1024L'.
    
    No functional change.
    
    Signed-off-by: Alessandro Zucchelli <alessandro.zucchelli@bugseng.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/common/unlzo.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/common/unlzo.c b/xen/common/unlzo.c
index bdcefa95b3..acb8dff600 100644
--- a/xen/common/unlzo.c
+++ b/xen/common/unlzo.c
@@ -52,7 +52,7 @@ static inline u32 get_unaligned_be32(const void *p)
 static const unsigned char lzop_magic[] = {
 	0x89, 0x4c, 0x5a, 0x4f, 0x00, 0x0d, 0x0a, 0x1a, 0x0a };
 
-#define LZO_BLOCK_SIZE        (256*1024l)
+#define LZO_BLOCK_SIZE        (256*1024L)
 #define HEADER_HAS_FILTER      0x00000800L
 #define HEADER_SIZE_MIN       (9 + 7     + 4 + 8     + 1       + 4)
 #define HEADER_SIZE_MAX       (9 + 7 + 1 + 8 + 8 + 4 + 1 + 255 + 4)
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/pagewalk: Address MISRA R8.3 violation in guest_walk_tables()
Message-Id: <E1sML8p-0005aY-L9@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 05:24:23 +0000

commit b14dae96c07ef27cc7f8107ddaa16989e9ab024b
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Fri Jun 21 21:57:59 2024 +0100
Commit:     Stefano Stabellini <stefano.stabellini@amd.com>
CommitDate: Mon Jun 24 16:42:51 2024 -0700

    x86/pagewalk: Address MISRA R8.3 violation in guest_walk_tables()
    
    Commit 4c5d78a10dc8 ("x86/pagewalk: Re-implement the pagetable walker")
    intentionally renamed guest_walk_tables()'s 'pfec' parameter to 'walk' because
    it's not a PageFault Error Code, despite the name of some of the constants
    passed in.  Sadly the constants-cleanup I've been meaning to do since then
    still hasn't come to pass.
    
    Update the declaration to match, to placate MISRA.
    
    Fixes: 4c5d78a10dc8 ("x86/pagewalk: Re-implement the pagetable walker")
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/include/asm/guest_pt.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/arch/x86/include/asm/guest_pt.h b/xen/arch/x86/include/asm/guest_pt.h
index bc312343cd..7b0c9b005c 100644
--- a/xen/arch/x86/include/asm/guest_pt.h
+++ b/xen/arch/x86/include/asm/guest_pt.h
@@ -422,7 +422,7 @@ static inline unsigned int guest_walk_to_page_order(const walk_t *gw)
 
 bool
 guest_walk_tables(const struct vcpu *v, struct p2m_domain *p2m,
-                  unsigned long va, walk_t *gw, uint32_t pfec,
+                  unsigned long va, walk_t *gw, uint32_t walk,
                   gfn_t top_gfn, mfn_t top_mfn, void *top_map);
 
 /* Pretty-print the contents of a guest-walk */
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] MAINTAINERS: Update my email address again
Message-Id: <E1sML8z-0005b6-Og@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 05:24:33 +0000

commit 93db2f64f3663192d9b83d89a35d596cad73fb08
Author:     Anthony PERARD <anthony.perard@vates.tech>
AuthorDate: Tue Jun 25 11:36:15 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 25 11:36:15 2024 +0200

    MAINTAINERS: Update my email address again
    
    Signed-off-by: Anthony PERARD <anthony.perard@vates.tech>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 MAINTAINERS | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 8e2b30a345..9d66b898ec 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -208,7 +208,7 @@ Maintainers List (try to look for most precise areas first)
 
 9PFSD
 M:	Juergen Gross <jgross@suse.com>
-M:	Anthony PERARD <anthony@xenproject.org>
+M:	Anthony PERARD <anthony.perard@vates.tech>
 S:	Supported
 F:	tools/9pfsd/
 
@@ -383,7 +383,7 @@ F:	xen/arch/x86/machine_kexec.c
 F:	xen/arch/x86/x86_64/kexec_reloc.S
 
 LIBS
-M:	Anthony PERARD <anthony@xenproject.org>
+M:	Anthony PERARD <anthony.perard@vates.tech>
 R:	Juergen Gross <jgross@suse.com>
 S:	Supported
 F:	tools/include/libxenvchan.h
@@ -429,7 +429,7 @@ S:	Supported
 F:	tools/ocaml/
 
 OVMF UPSTREAM
-M:	Anthony PERARD <anthony@xenproject.org>
+M:	Anthony PERARD <anthony.perard@vates.tech>
 S:	Supported
 T:	git https://xenbits.xenproject.org/git-http/ovmf.git
 
@@ -462,7 +462,7 @@ T:	git https://xenbits.xenproject.org/git-http/qemu-xen-traditional.git
 
 QEMU UPSTREAM
 M:	Stefano Stabellini <sstabellini@kernel.org>
-M:	Anthony Perard <anthony@xenproject.org>
+M:	Anthony Perard <anthony.perard@vates.tech>
 S:	Supported
 T:	git https://xenbits.xenproject.org/git-http/qemu-xen.git
 
@@ -515,7 +515,7 @@ F:	xen/arch/arm/include/asm/tee
 F:	xen/arch/arm/tee/
 
 TOOLSTACK
-M:	Anthony PERARD <anthony@xenproject.org>
+M:	Anthony PERARD <anthony.perard@vates.tech>
 S:	Supported
 F:	autogen.sh
 F:	config/*.in
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen: re-add type checking to {,__}copy_from_guest_offset()
Message-Id: <E1sML99-0005bY-RT@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 05:24:43 +0000

commit 735865f88486814dd6ae255f13a7f70cd3b01d4f
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 25 11:36:59 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 25 11:36:59 2024 +0200

    xen: re-add type checking to {,__}copy_from_guest_offset()
    
    When re-working them to avoid UB on guest address calculations, I failed
    to add explicit type checks in exchange for the implicit ones that until
    then had happened in assignments that were there anyway.
    
    Fixes: 43d5c5d5f70b ("xen: avoid UB in guest handle arithmetic")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/include/xen/guest_access.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/xen/include/xen/guest_access.h b/xen/include/xen/guest_access.h
index 96dbef2e02..a2146749e3 100644
--- a/xen/include/xen/guest_access.h
+++ b/xen/include/xen/guest_access.h
@@ -86,6 +86,7 @@
 #define copy_from_guest_offset(ptr, hnd, off, nr) ({    \
     unsigned long s_ = (unsigned long)(hnd).p;          \
     typeof(*(ptr)) *_d = (ptr);                         \
+    (void)((hnd).p == _d);                              \
     raw_copy_from_guest(_d,                             \
                         (const void *)(s_ + (off) * sizeof(*_d)), \
                         (nr) * sizeof(*_d));            \
@@ -140,6 +141,7 @@
 #define __copy_from_guest_offset(ptr, hnd, off, nr) ({          \
     unsigned long s_ = (unsigned long)(hnd).p;                  \
     typeof(*(ptr)) *_d = (ptr);                                 \
+    (void)((hnd).p == _d);                                      \
     __raw_copy_from_guest(_d,                                   \
                           (const void *)(s_ + (off) * sizeof(*_d)), \
                           (nr) * sizeof(*_d));                  \
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] gnttab: fix compat query-size handling
Message-Id: <E1sML9J-0005cY-UL@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 05:24:53 +0000

commit 11ea49a3fda5f0cbd8546ee8bdc5e9c55736c828
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 25 11:37:44 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 25 11:37:44 2024 +0200

    gnttab: fix compat query-size handling
    
    The odd DEFINE_XEN_GUEST_HANDLE(), inconsistent with all other similar
    constructs, should have caught my attention. Turns out it was needed for
    the build to succeed merely because the corresponding #ifndef had a
    typo. That typo in turn broke compat mode guests, by having query-size
    requests of theirs wire into the domain_crash() at the bottom of the
    switch().
    
    Fixes: 8c3bb4d8ce3f ("xen/gnttab: Perform compat/native gnttab_query_size check")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    Release-Acked-by: Oleksii Kurochko <Oleksii.kurochko@gmail.com>
---
 xen/common/compat/grant_table.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/xen/common/compat/grant_table.c b/xen/common/compat/grant_table.c
index dd40c48b11..5ad0debf96 100644
--- a/xen/common/compat/grant_table.c
+++ b/xen/common/compat/grant_table.c
@@ -33,7 +33,6 @@ CHECK_gnttab_unmap_and_replace;
 #define xen_gnttab_query_size gnttab_query_size
 CHECK_gnttab_query_size;
 #undef xen_gnttab_query_size
-DEFINE_XEN_GUEST_HANDLE(gnttab_query_size_compat_t);
 
 DEFINE_XEN_GUEST_HANDLE(gnttab_setup_table_compat_t);
 DEFINE_XEN_GUEST_HANDLE(gnttab_transfer_compat_t);
@@ -111,7 +110,7 @@ int compat_grant_table_op(
     CASE(copy);
 #endif
 
-#ifndef CHECK_query_size
+#ifndef CHECK_gnttab_query_size
     CASE(query_size);
 #endif
 
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] Config.mk: update MiniOS commit
Message-Id: <E1sMQIp-0005mY-Jm@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 10:55:03 +0000

commit 4712e3b3769e6c03e0aaaa8179395f0fb7b141cc
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 26 12:49:08 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 12:49:08 2024 +0200

    Config.mk: update MiniOS commit
    
    Pull in the gcc14 build fix there.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 Config.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Config.mk b/Config.mk
index a962f095ca..1a3938b6c4 100644
--- a/Config.mk
+++ b/Config.mk
@@ -224,7 +224,7 @@ QEMU_UPSTREAM_URL ?= https://xenbits.xen.org/git-http/qemu-xen.git
 QEMU_UPSTREAM_REVISION ?= master
 
 MINIOS_UPSTREAM_URL ?= https://xenbits.xen.org/git-http/mini-os.git
-MINIOS_UPSTREAM_REVISION ?= b6a5b4d72b88e5c4faed01f5a44505de022860fc
+MINIOS_UPSTREAM_REVISION ?= 8b038c7411ae7e823eaf6d15d5efbe037a07197a
 
 SEABIOS_UPSTREAM_URL ?= https://xenbits.xen.org/git-http/seabios.git
 SEABIOS_UPSTREAM_REVISION ?= rel-1.16.3
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.18] x86/ucode: Further fixes to identify "ucode already up to date"
Message-Id: <E1sMREt-0002HG-Ka@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 11:55:03 +0000

commit cd873f00bedca2f1afeaf13a78f70e719c5b1398
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed Jun 26 13:36:13 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:36:13 2024 +0200

    x86/ucode: Further fixes to identify "ucode already up to date"
    
    When the revision in hardware is newer than anything Xen has to hand,
    'microcode_cache' isn't set up.  Then, `xen-ucode` initiates the update
    because it doesn't know whether the revisions across the system are symmetric
    or not.  This involves the patch getting all the way into the
    apply_microcode() hooks before being found to be too old.
    
    This is all a giant mess and needs an overhaul, but in the short term simply
    adjust the apply_microcode() to return -EEXIST.
    
    Also, unconditionally print the preexisting microcode revision on boot.  It's
    relevant information which is otherwise unavailable if Xen doesn't find new
    microcode to use.
    
    Fixes: 648db37a155a ("x86/ucode: Distinguish "ucode already up to date"")
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: 977d98e67c2e929c62aa1f495fc4c6341c45abb5
    master date: 2024-05-16 13:59:11 +0100
---
 xen/arch/x86/cpu/microcode/amd.c   | 7 +++++--
 xen/arch/x86/cpu/microcode/core.c  | 2 ++
 xen/arch/x86/cpu/microcode/intel.c | 7 +++++--
 3 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/xen/arch/x86/cpu/microcode/amd.c b/xen/arch/x86/cpu/microcode/amd.c
index 75fc84e445..d8f7646e88 100644
--- a/xen/arch/x86/cpu/microcode/amd.c
+++ b/xen/arch/x86/cpu/microcode/amd.c
@@ -222,12 +222,15 @@ static int cf_check apply_microcode(const struct microcode_patch *patch)
     uint32_t rev, old_rev = sig->rev;
     enum microcode_match_result result = microcode_fits(patch);
 
+    if ( result == MIS_UCODE )
+        return -EINVAL;
+
     /*
      * Allow application of the same revision to pick up SMT-specific changes
      * even if the revision of the other SMT thread is already up-to-date.
      */
-    if ( result != NEW_UCODE && result != SAME_UCODE )
-        return -EINVAL;
+    if ( result == OLD_UCODE )
+        return -EEXIST;
 
     if ( check_final_patch_levels(sig) )
     {
diff --git a/xen/arch/x86/cpu/microcode/core.c b/xen/arch/x86/cpu/microcode/core.c
index d5338ad345..8a47f4471f 100644
--- a/xen/arch/x86/cpu/microcode/core.c
+++ b/xen/arch/x86/cpu/microcode/core.c
@@ -887,6 +887,8 @@ int __init early_microcode_init(unsigned long *module_map,
 
     ucode_ops.collect_cpu_info();
 
+    printk(XENLOG_INFO "BSP microcode revision: 0x%08x\n", this_cpu(cpu_sig).rev);
+
     /*
      * Some hypervisors deliberately report a microcode revision of -1 to
      * mean that they will not accept microcode updates.
diff --git a/xen/arch/x86/cpu/microcode/intel.c b/xen/arch/x86/cpu/microcode/intel.c
index 060c529a6e..a2d88e3ac0 100644
--- a/xen/arch/x86/cpu/microcode/intel.c
+++ b/xen/arch/x86/cpu/microcode/intel.c
@@ -294,10 +294,13 @@ static int cf_check apply_microcode(const struct microcode_patch *patch)
 
     result = microcode_update_match(patch);
 
-    if ( result != NEW_UCODE &&
-         !(opt_ucode_allow_same && result == SAME_UCODE) )
+    if ( result == MIS_UCODE )
         return -EINVAL;
 
+    if ( result == OLD_UCODE ||
+         (result == SAME_UCODE && !opt_ucode_allow_same) )
+        return -EEXIST;
+
     wbinvd();
 
     wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)patch->data);
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.18] x86/msi: prevent watchdog triggering when dumping MSI state
Message-Id: <E1sMRF3-0002IW-Pg@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 11:55:13 +0000

commit 1ffb29d132600e6a7965c2885505615a6fd6c647
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 26 13:36:52 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:36:52 2024 +0200

    x86/msi: prevent watchdog triggering when dumping MSI state
    
    Use the same check that's used in dump_irqs().
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: 594b22ca5be681ec1b42c34f321cc2600d582210
    master date: 2024-05-20 14:29:44 +0100
---
 xen/arch/x86/msi.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/xen/arch/x86/msi.c b/xen/arch/x86/msi.c
index a78367d7cf..3eaeffd1e0 100644
--- a/xen/arch/x86/msi.c
+++ b/xen/arch/x86/msi.c
@@ -17,6 +17,7 @@
 #include <xen/param.h>
 #include <xen/pci.h>
 #include <xen/pci_regs.h>
+#include <xen/softirq.h>
 #include <xen/iocap.h>
 #include <xen/keyhandler.h>
 #include <xen/pfn.h>
@@ -1405,6 +1406,9 @@ static void cf_check dump_msi(unsigned char key)
         unsigned long flags;
         const char *type = "???";
 
+        if ( !(irq & 0x1f) )
+            process_pending_softirqs();
+
         if ( !irq_desc_initialized(desc) )
             continue;
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.18] x86/irq: remove offline CPUs from old CPU mask when adjusting move_cleanup_count
Message-Id: <E1sMRFD-0002J6-Tc@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 11:55:23 +0000

commit 52e16bf065cb42b79d14ac74d701d1f9d8506430
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 26 13:37:20 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:37:20 2024 +0200

    x86/irq: remove offline CPUs from old CPU mask when adjusting move_cleanup_count
    
    When adjusting move_cleanup_count to account for CPUs that are offline also
    adjust old_cpu_mask, otherwise further calls to fixup_irqs() could subtract
    those again and create an imbalance in move_cleanup_count.
    
    Fixes: 472e0b74c5c4 ('x86/IRQ: deal with move cleanup count state in fixup_irqs()')
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: e63209d3ba2fd1b2f232babd14c9c679ffa7b09a
    master date: 2024-06-10 10:33:22 +0200
---
 xen/arch/x86/irq.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index e07006391a..db14df93db 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2576,6 +2576,14 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
             desc->arch.move_cleanup_count -= cpumask_weight(affinity);
             if ( !desc->arch.move_cleanup_count )
                 release_old_vec(desc);
+            else
+                /*
+                 * Adjust old_cpu_mask to account for the offline CPUs,
+                 * otherwise further calls to fixup_irqs() could subtract those
+                 * again and possibly underflow the counter.
+                 */
+                cpumask_andnot(desc->arch.old_cpu_mask, desc->arch.old_cpu_mask,
+                               affinity);
         }
 
         if ( !desc->action || cpumask_subset(desc->affinity, mask) )
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.18] CI: Update FreeBSD to 13.3
Message-Id: <E1sMRFO-0002Jt-0N@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 11:55:34 +0000

commit 80f2d2c2a515a6b9a4ea1b128267c6e1b5085002
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed Jun 26 13:37:58 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:37:58 2024 +0200

    CI: Update FreeBSD to 13.3
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Acked-by: Roger Pau Monné <roger.pau@citrix.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
    master commit: 5ea7f2c9d7a1334b3b2bd5f67fab4d447b60613d
    master date: 2024-06-11 17:00:10 +0100
---
 .cirrus.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.cirrus.yml b/.cirrus.yml
index 63f3afb104..e961877881 100644
--- a/.cirrus.yml
+++ b/.cirrus.yml
@@ -17,7 +17,7 @@ freebsd_template: &FREEBSD_TEMPLATE
 task:
   name: 'FreeBSD 13'
   freebsd_instance:
-    image_family: freebsd-13-2
+    image_family: freebsd-13-3
   << : *FREEBSD_TEMPLATE
 
 task:
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.18] x86/smp: do not use shorthand IPI destinations in CPU hot{,un}plug contexts
Message-Id: <E1sMRFY-0002Kk-55@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 11:55:44 +0000

commit 98238d49ecb149a5ac07cb8032817904c404ac2b
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 26 13:38:36 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:38:36 2024 +0200

    x86/smp: do not use shorthand IPI destinations in CPU hot{,un}plug contexts
    
    Due to the current rwlock logic, if the CPU calling get_cpu_maps() does
    so from a cpu_hotplug_{begin,done}() region the function will still
    return success, because a CPU taking the rwlock in read mode after
    having taken it in write mode is allowed.  Such corner case makes using
    get_cpu_maps() alone not enough to prevent using the shorthand in CPU
    hotplug regions.
    
    Introduce a new helper to detect whether the current caller is between a
    cpu_hotplug_{begin,done}() region and use it in send_IPI_mask() to restrict
    shorthand usage.
    
    Fixes: 5500d265a2a8 ('x86/smp: use APIC ALLBUT destination shorthand when possible')
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 171c52fba5d94e050d704770480dcb983490d0ad
    master date: 2024-06-12 14:29:31 +0200
---
 xen/arch/x86/smp.c       |  2 +-
 xen/common/cpu.c         |  5 +++++
 xen/include/xen/cpu.h    | 10 ++++++++++
 xen/include/xen/rwlock.h |  2 ++
 4 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/smp.c b/xen/arch/x86/smp.c
index 3a331cbdbc..340fcafb46 100644
--- a/xen/arch/x86/smp.c
+++ b/xen/arch/x86/smp.c
@@ -88,7 +88,7 @@ void send_IPI_mask(const cpumask_t *mask, int vector)
      * the system have been accounted for.
      */
     if ( system_state > SYS_STATE_smp_boot &&
-         !unaccounted_cpus && !disabled_cpus &&
+         !unaccounted_cpus && !disabled_cpus && !cpu_in_hotplug_context() &&
          /* NB: get_cpu_maps lock requires enabled interrupts. */
          local_irq_is_enabled() && (cpus_locked = get_cpu_maps()) &&
          (park_offline_cpus ||
diff --git a/xen/common/cpu.c b/xen/common/cpu.c
index 8709db4d29..6e35b114c0 100644
--- a/xen/common/cpu.c
+++ b/xen/common/cpu.c
@@ -68,6 +68,11 @@ void cpu_hotplug_done(void)
     write_unlock(&cpu_add_remove_lock);
 }
 
+bool cpu_in_hotplug_context(void)
+{
+    return rw_is_write_locked_by_me(&cpu_add_remove_lock);
+}
+
 static NOTIFIER_HEAD(cpu_chain);
 
 void __init register_cpu_notifier(struct notifier_block *nb)
diff --git a/xen/include/xen/cpu.h b/xen/include/xen/cpu.h
index e1d4eb5967..6bf5786750 100644
--- a/xen/include/xen/cpu.h
+++ b/xen/include/xen/cpu.h
@@ -13,6 +13,16 @@ void put_cpu_maps(void);
 void cpu_hotplug_begin(void);
 void cpu_hotplug_done(void);
 
+/*
+ * Returns true when the caller CPU is between a cpu_hotplug_{begin,done}()
+ * region.
+ *
+ * This is required to safely identify hotplug contexts, as get_cpu_maps()
+ * would otherwise succeed because a caller holding the lock in write mode is
+ * allowed to acquire the same lock in read mode.
+ */
+bool cpu_in_hotplug_context(void);
+
 /* Receive notification of CPU hotplug events. */
 void register_cpu_notifier(struct notifier_block *nb);
 
diff --git a/xen/include/xen/rwlock.h b/xen/include/xen/rwlock.h
index 9e35ee2edf..dc74d1c057 100644
--- a/xen/include/xen/rwlock.h
+++ b/xen/include/xen/rwlock.h
@@ -309,6 +309,8 @@ static always_inline void write_lock_irq(rwlock_t *l)
 
 #define rw_is_locked(l)               _rw_is_locked(l)
 #define rw_is_write_locked(l)         _rw_is_write_locked(l)
+#define rw_is_write_locked_by_me(l) \
+    lock_evaluate_nospec(_is_write_locked_by_me(atomic_read(&(l)->cnts)))
 
 
 typedef struct percpu_rwlock percpu_rwlock_t;
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.18] x86/irq: limit interrupt movement done by fixup_irqs()
Message-Id: <E1sMRFi-0002LY-8M@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 11:55:54 +0000

commit ce0a0cb0a74a909abf988f242aa228acdd2917fe
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 26 13:39:11 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:39:11 2024 +0200

    x86/irq: limit interrupt movement done by fixup_irqs()
    
    The current check used in fixup_irqs() to decide whether to move around
    interrupts is based on the affinity mask, but such mask can have all bits set,
    and hence is unlikely to be a subset of the input mask.  For example if an
    interrupt has an affinity mask of all 1s, any input to fixup_irqs() that's not
    an all set CPU mask would cause that interrupt to be shuffled around
    unconditionally.
    
    What fixup_irqs() care about is evacuating interrupts from CPUs not set on the
    input CPU mask, and for that purpose it should check whether the interrupt is
    assigned to a CPU not present in the input mask.  Assume that ->arch.cpu_mask
    is a subset of the ->affinity mask, and keep the current logic that resets the
    ->affinity mask if the interrupt has to be shuffled around.
    
    Doing the affinity movement based on ->arch.cpu_mask requires removing the
    special handling to ->arch.cpu_mask done for high priority vectors, otherwise
    the adjustment done to cpu_mask makes them always skip the CPU interrupt
    movement.
    
    While there also adjust the comment as to the purpose of fixup_irqs().
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: c7564d7366d865cc407e3d64bca816d07edee174
    master date: 2024-06-12 14:30:40 +0200
---
 xen/arch/x86/include/asm/irq.h |  2 +-
 xen/arch/x86/irq.c             | 21 +++++++++++----------
 2 files changed, 12 insertions(+), 11 deletions(-)

diff --git a/xen/arch/x86/include/asm/irq.h b/xen/arch/x86/include/asm/irq.h
index d7fb8ec7e8..71d4a8fc56 100644
--- a/xen/arch/x86/include/asm/irq.h
+++ b/xen/arch/x86/include/asm/irq.h
@@ -132,7 +132,7 @@ void free_domain_pirqs(struct domain *d);
 int map_domain_emuirq_pirq(struct domain *d, int pirq, int emuirq);
 int unmap_domain_pirq_emuirq(struct domain *d, int pirq);
 
-/* Reset irq affinities to match the given CPU mask. */
+/* Evacuate interrupts assigned to CPUs not present in the input CPU mask. */
 void fixup_irqs(const cpumask_t *mask, bool verbose);
 void fixup_eoi(void);
 
diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index db14df93db..566331bec1 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2529,7 +2529,7 @@ static int __init cf_check setup_dump_irqs(void)
 }
 __initcall(setup_dump_irqs);
 
-/* Reset irq affinities to match the given CPU mask. */
+/* Evacuate interrupts assigned to CPUs not present in the input CPU mask. */
 void fixup_irqs(const cpumask_t *mask, bool verbose)
 {
     unsigned int irq;
@@ -2553,19 +2553,15 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
 
         vector = irq_to_vector(irq);
         if ( vector >= FIRST_HIPRIORITY_VECTOR &&
-             vector <= LAST_HIPRIORITY_VECTOR )
+             vector <= LAST_HIPRIORITY_VECTOR &&
+             desc->handler == &no_irq_type )
         {
-            cpumask_and(desc->arch.cpu_mask, desc->arch.cpu_mask, mask);
-
             /*
              * This can in particular happen when parking secondary threads
              * during boot and when the serial console wants to use a PCI IRQ.
              */
-            if ( desc->handler == &no_irq_type )
-            {
-                spin_unlock(&desc->lock);
-                continue;
-            }
+            spin_unlock(&desc->lock);
+            continue;
         }
 
         if ( desc->arch.move_cleanup_count )
@@ -2586,7 +2582,12 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
                                affinity);
         }
 
-        if ( !desc->action || cpumask_subset(desc->affinity, mask) )
+        /*
+         * Avoid shuffling the interrupt around as long as current target CPUs
+         * are a subset of the input mask.  What fixup_irqs() cares about is
+         * evacuating interrupts from CPUs not in the input mask.
+         */
+        if ( !desc->action || cpumask_subset(desc->arch.cpu_mask, mask) )
         {
             spin_unlock(&desc->lock);
             continue;
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.18] x86/EPT: correct special page checking in epte_get_entry_emt()
Message-Id: <E1sMRFs-0002My-BV@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 11:56:04 +0000

commit 6e647efaf2b02ce92bcf80bec47c18cca5084f8a
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 26 13:39:44 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:39:44 2024 +0200

    x86/EPT: correct special page checking in epte_get_entry_emt()
    
    mfn_valid() granularity is (currently) 256Mb. Therefore the start of a
    1Gb page passing the test doesn't necessarily mean all parts of such a
    range would also pass. Yet using the result of mfn_to_page() on an MFN
    which doesn't pass mfn_valid() checking is liable to result in a crash
    (the invocation of mfn_to_page() alone is presumably "just" UB in such a
    case).
    
    Fixes: ca24b2ffdbd9 ("x86/hvm: set 'ipat' in EPT for special pages")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: 5540b94e8191059eb9cbbe98ac316232a42208f6
    master date: 2024-06-13 16:53:34 +0200
---
 xen/arch/x86/mm/p2m-ept.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c
index 85c4e8e54f..1aa6bbc771 100644
--- a/xen/arch/x86/mm/p2m-ept.c
+++ b/xen/arch/x86/mm/p2m-ept.c
@@ -518,8 +518,12 @@ int epte_get_entry_emt(struct domain *d, gfn_t gfn, mfn_t mfn,
     }
 
     for ( special_pgs = i = 0; i < (1ul << order); i++ )
-        if ( is_special_page(mfn_to_page(mfn_add(mfn, i))) )
+    {
+        mfn_t cur = mfn_add(mfn, i);
+
+        if ( mfn_valid(cur) && is_special_page(mfn_to_page(cur)) )
             special_pgs++;
+    }
 
     if ( special_pgs )
     {
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.18] x86/EPT: avoid marking non-present entries for re-configuring
Message-Id: <E1sMRG2-0002Nt-EO@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 11:56:14 +0000

commit d31385be5c8e8bc5efb6f8848057bd0c69e8274a
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 26 13:40:11 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:40:11 2024 +0200

    x86/EPT: avoid marking non-present entries for re-configuring
    
    For non-present entries EMT, like most other fields, is meaningless to
    hardware. Make the logic in ept_set_entry() setting the field (and iPAT)
    conditional upon dealing with a present entry, leaving the value at 0
    otherwise. This has two effects for epte_get_entry_emt() which we'll
    want to leverage subsequently:
    1) The call moved here now won't be issued with INVALID_MFN anymore (a
       respective BUG_ON() is being added).
    2) Neither of the other two calls could now be issued with a truncated
       form of INVALID_MFN anymore (as long as there's no bug anywhere
       marking an entry present when that was populated using INVALID_MFN).
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: 777c71d31325bc55ba1cc3f317d4155fe519ab0b
    master date: 2024-06-13 16:54:17 +0200
---
 xen/arch/x86/mm/p2m-ept.c | 29 ++++++++++++++++++-----------
 1 file changed, 18 insertions(+), 11 deletions(-)

diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c
index 1aa6bbc771..641d61b350 100644
--- a/xen/arch/x86/mm/p2m-ept.c
+++ b/xen/arch/x86/mm/p2m-ept.c
@@ -649,6 +649,8 @@ static int cf_check resolve_misconfig(struct p2m_domain *p2m, unsigned long gfn)
             if ( e.emt != MTRR_NUM_TYPES )
                 break;
 
+            ASSERT(is_epte_present(&e));
+
             if ( level == 0 )
             {
                 for ( gfn -= i, i = 0; i < EPT_PAGETABLE_ENTRIES; ++i )
@@ -914,17 +916,6 @@ ept_set_entry(struct p2m_domain *p2m, gfn_t gfn_, mfn_t mfn,
 
     if ( mfn_valid(mfn) || p2m_allows_invalid_mfn(p2mt) )
     {
-        bool ipat;
-        int emt = epte_get_entry_emt(p2m->domain, _gfn(gfn), mfn,
-                                     i * EPT_TABLE_ORDER, &ipat,
-                                     p2mt);
-
-        if ( emt >= 0 )
-            new_entry.emt = emt;
-        else /* ept_handle_misconfig() will need to take care of this. */
-            new_entry.emt = MTRR_NUM_TYPES;
-
-        new_entry.ipat = ipat;
         new_entry.sp = !!i;
         new_entry.sa_p2mt = p2mt;
         new_entry.access = p2ma;
@@ -940,6 +931,22 @@ ept_set_entry(struct p2m_domain *p2m, gfn_t gfn_, mfn_t mfn,
             need_modify_vtd_table = 0;
 
         ept_p2m_type_to_flags(p2m, &new_entry);
+
+        if ( is_epte_present(&new_entry) )
+        {
+            bool ipat;
+            int emt = epte_get_entry_emt(p2m->domain, _gfn(gfn), mfn,
+                                         i * EPT_TABLE_ORDER, &ipat,
+                                         p2mt);
+
+            BUG_ON(mfn_eq(mfn, INVALID_MFN));
+
+            if ( emt >= 0 )
+                new_entry.emt = emt;
+            else /* ept_handle_misconfig() will need to take care of this. */
+                new_entry.emt = MTRR_NUM_TYPES;
+            new_entry.ipat = ipat;
+        }
     }
 
     if ( sve != -1 )
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.18] x86/EPT: drop questionable mfn_valid() from epte_get_entry_emt()
Message-Id: <E1sMRGC-0002QW-HQ@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 11:56:24 +0000

commit 3b777c2ce4ea8cf67b79a5496e51201145606798
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 26 13:40:35 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:40:35 2024 +0200

    x86/EPT: drop questionable mfn_valid() from epte_get_entry_emt()
    
    mfn_valid() is RAM-focused; it will often return false for MMIO. Yet
    access to actual MMIO space should not generally be restricted to UC
    only; especially video frame buffer accesses are unduly affected by such
    a restriction.
    
    Since, as of 777c71d31325 ("x86/EPT: avoid marking non-present entries
    for re-configuring"), the function won't be called with INVALID_MFN or,
    worse, truncated forms thereof anymore, we call fully drop that check.
    
    Fixes: 81fd0d3ca4b2 ("x86/hvm: simplify 'mmio_direct' check in epte_get_entry_emt()")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: 4fdd8d75566fdad06667a79ec0ce6f43cc466c54
    master date: 2024-06-13 16:55:22 +0200
---
 xen/arch/x86/mm/p2m-ept.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c
index 641d61b350..d325424e97 100644
--- a/xen/arch/x86/mm/p2m-ept.c
+++ b/xen/arch/x86/mm/p2m-ept.c
@@ -500,12 +500,6 @@ int epte_get_entry_emt(struct domain *d, gfn_t gfn, mfn_t mfn,
         return -1;
     }
 
-    if ( !mfn_valid(mfn) )
-    {
-        *ipat = true;
-        return X86_MT_UC;
-    }
-
     /*
      * Conditional must be kept in sync with the code in
      * {iomem,ioports}_{permit,deny}_access().
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.18] x86/Intel: unlock CPUID earlier for the BSP
Message-Id: <E1sMRGM-0002S4-KN@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 11:56:34 +0000

commit c4b284912695a5802433512b913e968eda01544f
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 26 13:41:05 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:41:05 2024 +0200

    x86/Intel: unlock CPUID earlier for the BSP
    
    Intel CPUs have a MSR bit to limit CPUID enumeration to leaf two. If
    this bit is set by the BIOS then CPUID evaluation does not work when
    data from any leaf greater than two is needed; early_cpu_init() in
    particular wants to collect leaf 7 data.
    
    Cure this by unlocking CPUID right before evaluating anything which
    depends on the maximum CPUID leaf being greater than two.
    
    Inspired by (and description cloned from) Linux commit 0c2f6d04619e
    ("x86/topology/intel: Unlock CPUID before evaluating anything").
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: fa4d026737a47cd1d66ffb797a29150b4453aa9f
    master date: 2024-06-18 15:12:44 +0200
---
 xen/arch/x86/cpu/common.c |  3 ++-
 xen/arch/x86/cpu/cpu.h    |  2 ++
 xen/arch/x86/cpu/intel.c  | 29 +++++++++++++++++------------
 3 files changed, 21 insertions(+), 13 deletions(-)

diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c
index 26eed2ade1..edec0a2546 100644
--- a/xen/arch/x86/cpu/common.c
+++ b/xen/arch/x86/cpu/common.c
@@ -336,7 +336,8 @@ void __init early_cpu_init(bool verbose)
 
 	c->x86_vendor = x86_cpuid_lookup_vendor(ebx, ecx, edx);
 	switch (c->x86_vendor) {
-	case X86_VENDOR_INTEL:	  actual_cpu = intel_cpu_dev;    break;
+	case X86_VENDOR_INTEL:	  intel_unlock_cpuid_leaves(c);
+				  actual_cpu = intel_cpu_dev;    break;
 	case X86_VENDOR_AMD:	  actual_cpu = amd_cpu_dev;      break;
 	case X86_VENDOR_CENTAUR:  actual_cpu = centaur_cpu_dev;  break;
 	case X86_VENDOR_SHANGHAI: actual_cpu = shanghai_cpu_dev; break;
diff --git a/xen/arch/x86/cpu/cpu.h b/xen/arch/x86/cpu/cpu.h
index e3d06278b3..8be65e975a 100644
--- a/xen/arch/x86/cpu/cpu.h
+++ b/xen/arch/x86/cpu/cpu.h
@@ -24,3 +24,5 @@ void amd_init_lfence(struct cpuinfo_x86 *c);
 void amd_init_ssbd(const struct cpuinfo_x86 *c);
 void amd_init_spectral_chicken(void);
 void detect_zen2_null_seg_behaviour(void);
+
+void intel_unlock_cpuid_leaves(struct cpuinfo_x86 *c);
diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c
index deb7b70464..0dc7c27601 100644
--- a/xen/arch/x86/cpu/intel.c
+++ b/xen/arch/x86/cpu/intel.c
@@ -303,10 +303,24 @@ static void __init noinline intel_init_levelling(void)
 		ctxt_switch_masking = intel_ctxt_switch_masking;
 }
 
-static void cf_check early_init_intel(struct cpuinfo_x86 *c)
+/* Unmask CPUID levels if masked. */
+void intel_unlock_cpuid_leaves(struct cpuinfo_x86 *c)
 {
-	u64 misc_enable, disable;
+	uint64_t misc_enable, disable;
+
+	rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
+
+	disable = misc_enable & MSR_IA32_MISC_ENABLE_LIMIT_CPUID;
+	if (disable) {
+		wrmsrl(MSR_IA32_MISC_ENABLE, misc_enable & ~disable);
+		bootsym(trampoline_misc_enable_off) |= disable;
+		c->cpuid_level = cpuid_eax(0);
+		printk(KERN_INFO "revised cpuid level: %u\n", c->cpuid_level);
+	}
+}
 
+static void cf_check early_init_intel(struct cpuinfo_x86 *c)
+{
 	/* Netburst reports 64 bytes clflush size, but does IO in 128 bytes */
 	if (c->x86 == 15 && c->x86_cache_alignment == 64)
 		c->x86_cache_alignment = 128;
@@ -315,16 +329,7 @@ static void cf_check early_init_intel(struct cpuinfo_x86 *c)
             bootsym(trampoline_misc_enable_off) & MSR_IA32_MISC_ENABLE_XD_DISABLE)
 		printk(KERN_INFO "re-enabled NX (Execute Disable) protection\n");
 
-	/* Unmask CPUID levels and NX if masked: */
-	rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
-
-	disable = misc_enable & MSR_IA32_MISC_ENABLE_LIMIT_CPUID;
-	if (disable) {
-		wrmsrl(MSR_IA32_MISC_ENABLE, misc_enable & ~disable);
-		bootsym(trampoline_misc_enable_off) |= disable;
-		printk(KERN_INFO "revised cpuid level: %d\n",
-		       cpuid_eax(0));
-	}
+	intel_unlock_cpuid_leaves(c);
 
 	/* CPUID workaround for Intel 0F33/0F34 CPU */
 	if (boot_cpu_data.x86 == 0xF && boot_cpu_data.x86_model == 3 &&
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.18] x86/irq: deal with old_cpu_mask for interrupts in movement in fixup_irqs()
Message-Id: <E1sMRGW-0002TC-Nz@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 11:56:44 +0000

commit 39a6170c15bf369a2b26c855ea7621387ed4070b
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 26 13:41:35 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:41:35 2024 +0200

    x86/irq: deal with old_cpu_mask for interrupts in movement in fixup_irqs()
    
    Given the current logic it's possible for ->arch.old_cpu_mask to get out of
    sync: if a CPU set in old_cpu_mask is offlined and then onlined
    again without old_cpu_mask having been updated the data in the mask will no
    longer be accurate, as when brought back online the CPU will no longer have
    old_vector configured to handle the old interrupt source.
    
    If there's an interrupt movement in progress, and the to be offlined CPU (which
    is the call context) is in the old_cpu_mask, clear it and update the mask, so
    it doesn't contain stale data.
    
    Note that when the system is going down fixup_irqs() will be called by
    smp_send_stop() from CPU 0 with a mask with only CPU 0 on it, effectively
    asking to move all interrupts to the current caller (CPU 0) which is the only
    CPU to remain online.  In that case we don't care to migrate interrupts that
    are in the process of being moved, as it's likely we won't be able to move all
    interrupts to CPU 0 due to vector shortage anyway.
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 817d1cd627be668c358d038f0fadbf7d24d417d3
    master date: 2024-06-18 15:14:49 +0200
---
 xen/arch/x86/irq.c | 29 ++++++++++++++++++++++++++++-
 1 file changed, 28 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index 566331bec1..f877327975 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2539,7 +2539,7 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
     for ( irq = 0; irq < nr_irqs; irq++ )
     {
         bool break_affinity = false, set_affinity = true;
-        unsigned int vector;
+        unsigned int vector, cpu = smp_processor_id();
         cpumask_t *affinity = this_cpu(scratch_cpumask);
 
         if ( irq == 2 )
@@ -2582,6 +2582,33 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
                                affinity);
         }
 
+        if ( desc->arch.move_in_progress &&
+             /*
+              * Only attempt to adjust the mask if the current CPU is going
+              * offline, otherwise the whole system is going down and leaving
+              * stale data in the masks is fine.
+              */
+             !cpu_online(cpu) &&
+             cpumask_test_cpu(cpu, desc->arch.old_cpu_mask) )
+        {
+            /*
+             * This CPU is going offline, remove it from ->arch.old_cpu_mask
+             * and possibly release the old vector if the old mask becomes
+             * empty.
+             *
+             * Note cleaning ->arch.old_cpu_mask is required if the CPU is
+             * brought offline and then online again, as when re-onlined the
+             * per-cpu vector table will no longer have ->arch.old_vector
+             * setup, and hence ->arch.old_cpu_mask would be stale.
+             */
+            cpumask_clear_cpu(cpu, desc->arch.old_cpu_mask);
+            if ( cpumask_empty(desc->arch.old_cpu_mask) )
+            {
+                desc->arch.move_in_progress = 0;
+                release_old_vec(desc);
+            }
+        }
+
         /*
          * Avoid shuffling the interrupt around as long as current target CPUs
          * are a subset of the input mask.  What fixup_irqs() cares about is
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.18] x86/irq: handle moving interrupts in _assign_irq_vector()
Message-Id: <E1sMRGg-0002U3-R9@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 11:56:54 +0000

commit 3a8f4ec75d8ed8da6370deac95c341cbada96802
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 26 13:42:05 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:42:05 2024 +0200

    x86/irq: handle moving interrupts in _assign_irq_vector()
    
    Currently there's logic in fixup_irqs() that attempts to prevent
    _assign_irq_vector() from failing, as fixup_irqs() is required to evacuate all
    interrupts from the CPUs not present in the input mask.  The current logic in
    fixup_irqs() is incomplete, as it doesn't deal with interrupts that have
    move_cleanup_count > 0 and a non-empty ->arch.old_cpu_mask field.
    
    Instead of attempting to fixup the interrupt descriptor in fixup_irqs() so that
    _assign_irq_vector() cannot fail, introduce logic in _assign_irq_vector()
    to deal with interrupts that have either move_{in_progress,cleanup_count} set
    and no remaining online CPUs in ->arch.cpu_mask.
    
    If _assign_irq_vector() is requested to move an interrupt in the state
    described above, first attempt to see if ->arch.old_cpu_mask contains any valid
    CPUs that could be used as fallback, and if that's the case do move the
    interrupt back to the previous destination.  Note this is easier because the
    vector hasn't been released yet, so there's no need to allocate and setup a new
    vector on the destination.
    
    Due to the logic in fixup_irqs() that clears offline CPUs from
    ->arch.old_cpu_mask (and releases the old vector if the mask becomes empty) it
    shouldn't be possible to get into _assign_irq_vector() with
    ->arch.move_{in_progress,cleanup_count} set but no online CPUs in
    ->arch.old_cpu_mask.
    
    However if ->arch.move_{in_progress,cleanup_count} is set and the interrupt has
    also changed affinity, it's possible the members of ->arch.old_cpu_mask are no
    longer part of the affinity set, move the interrupt to a different CPU part of
    the provided mask and keep the current ->arch.old_{cpu_mask,vector} for the
    pending interrupt movement to be completed.
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 369558924a642bbb0cb731e9a3375958867cb17b
    master date: 2024-06-18 15:15:10 +0200
---
 xen/arch/x86/irq.c | 97 ++++++++++++++++++++++++++++++++++++++----------------
 1 file changed, 68 insertions(+), 29 deletions(-)

diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index f877327975..13ef61a5b7 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -553,7 +553,58 @@ static int _assign_irq_vector(struct irq_desc *desc, const cpumask_t *mask)
     }
 
     if ( desc->arch.move_in_progress || desc->arch.move_cleanup_count )
-        return -EAGAIN;
+    {
+        /*
+         * If the current destination is online refuse to shuffle.  Retry after
+         * the in-progress movement has finished.
+         */
+        if ( cpumask_intersects(desc->arch.cpu_mask, &cpu_online_map) )
+            return -EAGAIN;
+
+        /*
+         * Due to the logic in fixup_irqs() that clears offlined CPUs from
+         * ->arch.old_cpu_mask it shouldn't be possible to get here with
+         * ->arch.move_{in_progress,cleanup_count} set and no online CPUs in
+         * ->arch.old_cpu_mask.
+         */
+        ASSERT(valid_irq_vector(desc->arch.old_vector));
+        ASSERT(cpumask_intersects(desc->arch.old_cpu_mask, &cpu_online_map));
+
+        if ( cpumask_intersects(desc->arch.old_cpu_mask, mask) )
+        {
+            /*
+             * Fallback to the old destination if moving is in progress and the
+             * current destination is to be offlined.  This is only possible if
+             * the CPUs in old_cpu_mask intersect with the affinity mask passed
+             * in the 'mask' parameter.
+             */
+            desc->arch.vector = desc->arch.old_vector;
+            cpumask_and(desc->arch.cpu_mask, desc->arch.old_cpu_mask, mask);
+
+            /* Undo any possibly done cleanup. */
+            for_each_cpu(cpu, desc->arch.cpu_mask)
+                per_cpu(vector_irq, cpu)[desc->arch.vector] = irq;
+
+            /* Cancel the pending move and release the current vector. */
+            desc->arch.old_vector = IRQ_VECTOR_UNASSIGNED;
+            cpumask_clear(desc->arch.old_cpu_mask);
+            desc->arch.move_in_progress = 0;
+            desc->arch.move_cleanup_count = 0;
+            if ( desc->arch.used_vectors )
+            {
+                ASSERT(test_bit(old_vector, desc->arch.used_vectors));
+                clear_bit(old_vector, desc->arch.used_vectors);
+            }
+
+            return 0;
+        }
+
+        /*
+         * There's an interrupt movement in progress but the destination(s) in
+         * ->arch.old_cpu_mask are not suitable given the 'mask' parameter, go
+         * through the full logic to find a new vector in a suitable CPU.
+         */
+    }
 
     err = -ENOSPC;
 
@@ -609,7 +660,22 @@ next:
         current_vector = vector;
         current_offset = offset;
 
-        if ( valid_irq_vector(old_vector) )
+        if ( desc->arch.move_in_progress || desc->arch.move_cleanup_count )
+        {
+            ASSERT(!cpumask_intersects(desc->arch.cpu_mask, &cpu_online_map));
+            /*
+             * Special case when evacuating an interrupt from a CPU to be
+             * offlined and the interrupt was already in the process of being
+             * moved.  Leave ->arch.old_{vector,cpu_mask} as-is and just
+             * replace ->arch.{cpu_mask,vector} with the new destination.
+             * Cleanup will be done normally for the old fields, just release
+             * the current vector here.
+             */
+            if ( desc->arch.used_vectors &&
+                 !test_and_clear_bit(old_vector, desc->arch.used_vectors) )
+                ASSERT_UNREACHABLE();
+        }
+        else if ( valid_irq_vector(old_vector) )
         {
             cpumask_and(desc->arch.old_cpu_mask, desc->arch.cpu_mask,
                         &cpu_online_map);
@@ -2620,33 +2686,6 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
             continue;
         }
 
-        /*
-         * In order for the affinity adjustment below to be successful, we
-         * need _assign_irq_vector() to succeed. This in particular means
-         * clearing desc->arch.move_in_progress if this would otherwise
-         * prevent the function from succeeding. Since there's no way for the
-         * flag to get cleared anymore when there's no possible destination
-         * left (the only possibility then would be the IRQs enabled window
-         * after this loop), there's then also no race with us doing it here.
-         *
-         * Therefore the logic here and there need to remain in sync.
-         */
-        if ( desc->arch.move_in_progress &&
-             !cpumask_intersects(mask, desc->arch.cpu_mask) )
-        {
-            unsigned int cpu;
-
-            cpumask_and(affinity, desc->arch.old_cpu_mask, &cpu_online_map);
-
-            spin_lock(&vector_lock);
-            for_each_cpu(cpu, affinity)
-                per_cpu(vector_irq, cpu)[desc->arch.old_vector] = ~irq;
-            spin_unlock(&vector_lock);
-
-            release_old_vec(desc);
-            desc->arch.move_in_progress = 0;
-        }
-
         if ( !cpumask_intersects(mask, desc->affinity) )
         {
             break_affinity = true;
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.18] xen/ubsan: Fix UB in type_descriptor declaration
Message-Id: <E1sMRGq-0002Uj-U5@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 11:57:04 +0000

commit 5397ab9995f7354e7f8122a8a91c810256afa3d1
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed Jun 26 13:42:30 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:42:30 2024 +0200

    xen/ubsan: Fix UB in type_descriptor declaration
    
    struct type_descriptor is arranged with a NUL terminated string following the
    kind/info fields.
    
    The only reason this doesn't trip UBSAN detection itself (on more modern
    compilers at least) is because struct type_descriptor is only referenced in
    suppressed regions.
    
    Switch the declaration to be a real flexible member.  No functional change.
    
    Fixes: 00fcf4dd8eb4 ("xen/ubsan: Import ubsan implementation from Linux 4.13")
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: bd59af99700f075d06a6d47a16f777c9519928e0
    master date: 2024-06-18 14:55:04 +0100
---
 xen/common/ubsan/ubsan.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/common/ubsan/ubsan.h b/xen/common/ubsan/ubsan.h
index a3159040fe..3db42e75b1 100644
--- a/xen/common/ubsan/ubsan.h
+++ b/xen/common/ubsan/ubsan.h
@@ -10,7 +10,7 @@ enum {
 struct type_descriptor {
 	u16 type_kind;
 	u16 type_info;
-	char type_name[1];
+	char type_name[];
 };
 
 struct source_location {
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.18] x86/xstate: Fix initialisation of XSS cache
Message-Id: <E1sMRH1-0002Va-0d@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 11:57:15 +0000

commit 4ee1df89d9c92609e5fff3c9b261ce4b1bb88e42
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed Jun 26 13:43:19 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:43:19 2024 +0200

    x86/xstate: Fix initialisation of XSS cache
    
    The clobbering of this_cpu(xcr0) and this_cpu(xss) to architecturally invalid
    values is to force the subsequent set_xcr0() and set_msr_xss() to reload the
    hardware register.
    
    While XCR0 is reloaded in xstate_init(), MSR_XSS isn't.  This causes
    get_msr_xss() to return the invalid value, and logic of the form:
    
        old = get_msr_xss();
        set_msr_xss(new);
        ...
        set_msr_xss(old);
    
    to try and restore said invalid value.
    
    The architecturally invalid value must be purged from the cache, meaning the
    hardware register must be written at least once.  This in turn highlights that
    the invalid value must only be used in the case that the hardware register is
    available.
    
    Fixes: f7f4a523927f ("x86/xstate: reset cached register values on resume")
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 9e6dbbe8bf400aacb99009ddffa91d2a0c312b39
    master date: 2024-06-19 13:00:06 +0100
---
 xen/arch/x86/xstate.c | 18 +++++++++++-------
 1 file changed, 11 insertions(+), 7 deletions(-)

diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c
index f442610fc5..ca76f98fe2 100644
--- a/xen/arch/x86/xstate.c
+++ b/xen/arch/x86/xstate.c
@@ -641,13 +641,6 @@ void xstate_init(struct cpuinfo_x86 *c)
         return;
     }
 
-    /*
-     * Zap the cached values to make set_xcr0() and set_msr_xss() really
-     * write it.
-     */
-    this_cpu(xcr0) = 0;
-    this_cpu(xss) = ~0;
-
     cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
     feature_mask = (((u64)edx << 32) | eax) & XCNTXT_MASK;
     BUG_ON(!valid_xcr0(feature_mask));
@@ -657,8 +650,19 @@ void xstate_init(struct cpuinfo_x86 *c)
      * Set CR4_OSXSAVE and run "cpuid" to get xsave_cntxt_size.
      */
     set_in_cr4(X86_CR4_OSXSAVE);
+
+    /*
+     * Zap the cached values to make set_xcr0() and set_msr_xss() really write
+     * the hardware register.
+     */
+    this_cpu(xcr0) = 0;
     if ( !set_xcr0(feature_mask) )
         BUG();
+    if ( cpu_has_xsaves )
+    {
+        this_cpu(xss) = ~0;
+        set_msr_xss(0);
+    }
 
     if ( bsp )
     {
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.18] x86/cpuid: Fix handling of XSAVE dynamic leaves
Message-Id: <E1sMRHB-0002WJ-3c@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 11:57:25 +0000

commit 9b43092d54b5f9e9d39d9f20393671e303b19e81
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed Jun 26 13:43:44 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:43:44 2024 +0200

    x86/cpuid: Fix handling of XSAVE dynamic leaves
    
    [ This is a minimal backport of commit 71cacfb035f4 ("x86/cpuid: Fix handling
      of XSAVE dynamic leaves") to fix the bugs without depending on the large
      rework of XSTATE handling in Xen 4.19 ]
    
    First, if XSAVE is available in hardware but not visible to the guest, the
    dynamic leaves shouldn't be filled in.
    
    Second, the comment concerning XSS state is wrong.  VT-x doesn't manage
    host/guest state automatically, but there is provision for "host only" bits to
    be set, so the implications are still accurate.
    
    In Xen 4.18, no XSS states are supported, so it's safe to keep deferring to
    real hardware.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 71cacfb035f4a78ee10970dc38a3baa04d387451
    master date: 2024-06-19 13:00:06 +0100
---
 xen/arch/x86/cpuid.c | 30 +++++++++++++-----------------
 1 file changed, 13 insertions(+), 17 deletions(-)

diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c
index 455a09b2dd..f6fd6cc6b3 100644
--- a/xen/arch/x86/cpuid.c
+++ b/xen/arch/x86/cpuid.c
@@ -330,24 +330,20 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf,
     case XSTATE_CPUID:
         switch ( subleaf )
         {
-        case 1:
-            if ( p->xstate.xsavec || p->xstate.xsaves )
-            {
-                /*
-                 * TODO: Figure out what to do for XSS state.  VT-x manages
-                 * host vs guest MSR_XSS automatically, so as soon as we start
-                 * supporting any XSS states, the wrong XSS will be in
-                 * context.
-                 */
-                BUILD_BUG_ON(XSTATE_XSAVES_ONLY != 0);
-
-                /*
-                 * Read CPUID[0xD,0/1].EBX from hardware.  They vary with
-                 * enabled XSTATE, and appropraite XCR0|XSS are in context.
-                 */
+            /*
+             * Read CPUID[0xd,0/1].EBX from hardware.  They vary with enabled
+             * XSTATE, and the appropriate XCR0 is in context.
+             */
         case 0:
-                res->b = cpuid_count_ebx(leaf, subleaf);
-            }
+            if ( p->basic.xsave )
+                res->b = cpuid_count_ebx(0xd, 0);
+            break;
+
+        case 1:
+            /* This only works because Xen doesn't support XSS states yet. */
+            BUILD_BUG_ON(XSTATE_XSAVES_ONLY != 0);
+            if ( p->xstate.xsavec )
+                res->b = cpuid_count_ebx(0xd, 1);
             break;
         }
         break;
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.18] x86/irq: forward pending interrupts to new destination in fixup_irqs()
Message-Id: <E1sMRHL-0002Xd-6i@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 11:57:35 +0000

commit e95d30f9e5eed0c5d9dbf72d4cc3ae373152ab10
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 26 13:44:08 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:44:08 2024 +0200

    x86/irq: forward pending interrupts to new destination in fixup_irqs()
    
    fixup_irqs() is used to evacuate interrupts from to be offlined CPUs.  Given
    the CPU is to become offline, the normal migration logic used by Xen where the
    vector in the previous target(s) is left configured until the interrupt is
    received on the new destination is not suitable.
    
    Instead attempt to do as much as possible in order to prevent loosing
    interrupts.  If fixup_irqs() is called from the CPU to be offlined (as is
    currently the case for CPU hot unplug) attempt to forward pending vectors when
    interrupts that target the current CPU are migrated to a different destination.
    
    Additionally, for interrupts that have already been moved from the current CPU
    prior to the call to fixup_irqs() but that haven't been delivered to the new
    destination (iow: interrupts with move_in_progress set and the current CPU set
    in ->arch.old_cpu_mask) also check whether the previous vector is pending and
    forward it to the new destination.
    
    This allows us to remove the window with interrupts enabled at the bottom of
    fixup_irqs().  Such window wasn't safe anyway: references to the CPU to become
    offline are removed from interrupts masks, but the per-CPU vector_irq[] array
    is not updated to reflect those changes (as the CPU is going offline anyway).
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: e2bb28d621584fce15c907002ddc7c6772644b64
    master date: 2024-06-20 12:09:32 +0200
---
 xen/arch/x86/include/asm/apic.h |  5 +++++
 xen/arch/x86/irq.c              | 46 +++++++++++++++++++++++++++++++++++------
 2 files changed, 45 insertions(+), 6 deletions(-)

diff --git a/xen/arch/x86/include/asm/apic.h b/xen/arch/x86/include/asm/apic.h
index 7625c0ecd6..ad8d7cc054 100644
--- a/xen/arch/x86/include/asm/apic.h
+++ b/xen/arch/x86/include/asm/apic.h
@@ -145,6 +145,11 @@ static __inline bool_t apic_isr_read(u8 vector)
             (vector & 0x1f)) & 1;
 }
 
+static inline bool apic_irr_read(unsigned int vector)
+{
+    return apic_read(APIC_IRR + (vector / 32 * 0x10)) & (1U << (vector % 32));
+}
+
 static __inline u32 get_apic_id(void) /* Get the physical APIC id */
 {
     u32 id = apic_read(APIC_ID);
diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index 13ef61a5b7..290f8d26e7 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2604,7 +2604,7 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
 
     for ( irq = 0; irq < nr_irqs; irq++ )
     {
-        bool break_affinity = false, set_affinity = true;
+        bool break_affinity = false, set_affinity = true, check_irr = false;
         unsigned int vector, cpu = smp_processor_id();
         cpumask_t *affinity = this_cpu(scratch_cpumask);
 
@@ -2657,6 +2657,25 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
              !cpu_online(cpu) &&
              cpumask_test_cpu(cpu, desc->arch.old_cpu_mask) )
         {
+            /*
+             * This to be offlined CPU was the target of an interrupt that's
+             * been moved, and the new destination target hasn't yet
+             * acknowledged any interrupt from it.
+             *
+             * We know the interrupt is configured to target the new CPU at
+             * this point, so we can check IRR for any pending vectors and
+             * forward them to the new destination.
+             *
+             * Note that for the other case of an interrupt movement being in
+             * progress (move_cleanup_count being non-zero) we know the new
+             * destination has already acked at least one interrupt from this
+             * source, and hence there's no need to forward any stale
+             * interrupts.
+             */
+            if ( apic_irr_read(desc->arch.old_vector) )
+                send_IPI_mask(cpumask_of(cpumask_any(desc->arch.cpu_mask)),
+                              desc->arch.vector);
+
             /*
              * This CPU is going offline, remove it from ->arch.old_cpu_mask
              * and possibly release the old vector if the old mask becomes
@@ -2697,6 +2716,14 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
         if ( desc->handler->disable )
             desc->handler->disable(desc);
 
+        /*
+         * If the current CPU is going offline and is (one of) the target(s) of
+         * the interrupt, signal to check whether there are any pending vectors
+         * to be handled in the local APIC after the interrupt has been moved.
+         */
+        if ( !cpu_online(cpu) && cpumask_test_cpu(cpu, desc->arch.cpu_mask) )
+            check_irr = true;
+
         if ( desc->handler->set_affinity )
             desc->handler->set_affinity(desc, affinity);
         else if ( !(warned++) )
@@ -2707,6 +2734,18 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
 
         cpumask_copy(affinity, desc->affinity);
 
+        if ( check_irr && apic_irr_read(vector) )
+            /*
+             * Forward pending interrupt to the new destination, this CPU is
+             * going offline and otherwise the interrupt would be lost.
+             *
+             * Do the IRR check as late as possible before releasing the irq
+             * desc in order for any in-flight interrupts to be delivered to
+             * the lapic.
+             */
+            send_IPI_mask(cpumask_of(cpumask_any(desc->arch.cpu_mask)),
+                          desc->arch.vector);
+
         spin_unlock(&desc->lock);
 
         if ( !verbose )
@@ -2718,11 +2757,6 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
             printk("Broke affinity for IRQ%u, new: %*pb\n",
                    irq, CPUMASK_PR(affinity));
     }
-
-    /* That doesn't seem sufficient.  Give it 1ms. */
-    local_irq_enable();
-    mdelay(1);
-    local_irq_disable();
 }
 
 void fixup_eoi(void)
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.17] x86/ucode: Further fixes to identify "ucode already up to date"
Message-Id: <E1sMRf1-0004qA-DS@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 12:22:03 +0000

commit cd8aab43d2b9bbd2cd99f0027dd2d918e0a393d5
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed Jun 26 14:05:54 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:05:54 2024 +0200

    x86/ucode: Further fixes to identify "ucode already up to date"
    
    When the revision in hardware is newer than anything Xen has to hand,
    'microcode_cache' isn't set up.  Then, `xen-ucode` initiates the update
    because it doesn't know whether the revisions across the system are symmetric
    or not.  This involves the patch getting all the way into the
    apply_microcode() hooks before being found to be too old.
    
    This is all a giant mess and needs an overhaul, but in the short term simply
    adjust the apply_microcode() to return -EEXIST.
    
    Also, unconditionally print the preexisting microcode revision on boot.  It's
    relevant information which is otherwise unavailable if Xen doesn't find new
    microcode to use.
    
    Fixes: 648db37a155a ("x86/ucode: Distinguish "ucode already up to date"")
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: 977d98e67c2e929c62aa1f495fc4c6341c45abb5
    master date: 2024-05-16 13:59:11 +0100
---
 xen/arch/x86/cpu/microcode/amd.c   | 7 +++++--
 xen/arch/x86/cpu/microcode/core.c  | 2 ++
 xen/arch/x86/cpu/microcode/intel.c | 7 +++++--
 3 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/xen/arch/x86/cpu/microcode/amd.c b/xen/arch/x86/cpu/microcode/amd.c
index c6d13f3fb3..b28171f2d4 100644
--- a/xen/arch/x86/cpu/microcode/amd.c
+++ b/xen/arch/x86/cpu/microcode/amd.c
@@ -222,12 +222,15 @@ static int cf_check apply_microcode(const struct microcode_patch *patch)
     uint32_t rev, old_rev = sig->rev;
     enum microcode_match_result result = microcode_fits(patch);
 
+    if ( result == MIS_UCODE )
+        return -EINVAL;
+
     /*
      * Allow application of the same revision to pick up SMT-specific changes
      * even if the revision of the other SMT thread is already up-to-date.
      */
-    if ( result != NEW_UCODE && result != SAME_UCODE )
-        return -EINVAL;
+    if ( result == OLD_UCODE )
+        return -EEXIST;
 
     if ( check_final_patch_levels(sig) )
     {
diff --git a/xen/arch/x86/cpu/microcode/core.c b/xen/arch/x86/cpu/microcode/core.c
index 667b1baf91..3150395478 100644
--- a/xen/arch/x86/cpu/microcode/core.c
+++ b/xen/arch/x86/cpu/microcode/core.c
@@ -819,6 +819,8 @@ int __init early_microcode_init(void)
 
     alternative_vcall(ucode_ops.collect_cpu_info);
 
+    printk(XENLOG_INFO "BSP microcode revision: 0x%08x\n", this_cpu(cpu_sig).rev);
+
     if ( ucode_mod.mod_end || ucode_blob.size )
         rc = early_microcode_update_cpu();
 
diff --git a/xen/arch/x86/cpu/microcode/intel.c b/xen/arch/x86/cpu/microcode/intel.c
index cb08f63d2e..91d82f9dde 100644
--- a/xen/arch/x86/cpu/microcode/intel.c
+++ b/xen/arch/x86/cpu/microcode/intel.c
@@ -294,10 +294,13 @@ static int cf_check apply_microcode(const struct microcode_patch *patch)
 
     result = microcode_update_match(patch);
 
-    if ( result != NEW_UCODE &&
-         !(opt_ucode_allow_same && result == SAME_UCODE) )
+    if ( result == MIS_UCODE )
         return -EINVAL;
 
+    if ( result == OLD_UCODE ||
+         (result == SAME_UCODE && !opt_ucode_allow_same) )
+        return -EEXIST;
+
     wbinvd();
 
     wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)patch->data);
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.17] x86/msi: prevent watchdog triggering when dumping MSI state
Message-Id: <E1sMRfB-0004qh-Gg@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 12:22:13 +0000

commit 373e02254ce88baae37b89159149c15904fffc13
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 26 14:06:35 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:06:35 2024 +0200

    x86/msi: prevent watchdog triggering when dumping MSI state
    
    Use the same check that's used in dump_irqs().
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: 594b22ca5be681ec1b42c34f321cc2600d582210
    master date: 2024-05-20 14:29:44 +0100
---
 xen/arch/x86/msi.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/xen/arch/x86/msi.c b/xen/arch/x86/msi.c
index d0bf63df1d..3d36fc4204 100644
--- a/xen/arch/x86/msi.c
+++ b/xen/arch/x86/msi.c
@@ -17,6 +17,7 @@
 #include <xen/param.h>
 #include <xen/pci.h>
 #include <xen/pci_regs.h>
+#include <xen/softirq.h>
 #include <xen/iocap.h>
 #include <xen/keyhandler.h>
 #include <xen/pfn.h>
@@ -1428,6 +1429,9 @@ static void cf_check dump_msi(unsigned char key)
         unsigned long flags;
         const char *type = "???";
 
+        if ( !(irq & 0x1f) )
+            process_pending_softirqs();
+
         if ( !irq_desc_initialized(desc) )
             continue;
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.17] x86/irq: remove offline CPUs from old CPU mask when adjusting move_cleanup_count
Message-Id: <E1sMRfL-0004rM-Kv@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 12:22:23 +0000

commit 9fa0df93babcbb4b0fba9dbc78bbfb1318b85360
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 26 14:07:06 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:07:06 2024 +0200

    x86/irq: remove offline CPUs from old CPU mask when adjusting move_cleanup_count
    
    When adjusting move_cleanup_count to account for CPUs that are offline also
    adjust old_cpu_mask, otherwise further calls to fixup_irqs() could subtract
    those again and create an imbalance in move_cleanup_count.
    
    Fixes: 472e0b74c5c4 ('x86/IRQ: deal with move cleanup count state in fixup_irqs()')
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: e63209d3ba2fd1b2f232babd14c9c679ffa7b09a
    master date: 2024-06-10 10:33:22 +0200
---
 xen/arch/x86/irq.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index abd6f577dd..5e6edc0905 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2576,6 +2576,14 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
             desc->arch.move_cleanup_count -= cpumask_weight(affinity);
             if ( !desc->arch.move_cleanup_count )
                 release_old_vec(desc);
+            else
+                /*
+                 * Adjust old_cpu_mask to account for the offline CPUs,
+                 * otherwise further calls to fixup_irqs() could subtract those
+                 * again and possibly underflow the counter.
+                 */
+                cpumask_andnot(desc->arch.old_cpu_mask, desc->arch.old_cpu_mask,
+                               affinity);
         }
 
         if ( !desc->action || cpumask_subset(desc->affinity, mask) )
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.17] CI: Update FreeBSD to 13.3
Message-Id: <E1sMRfV-0004sE-Np@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 12:22:33 +0000

commit f15af3ee5bd60893673fe9aae202e90533d3c0dc
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed Jun 26 14:07:53 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:07:53 2024 +0200

    CI: Update FreeBSD to 13.3
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Acked-by: Roger Pau Monné <roger.pau@citrix.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
    master commit: 5ea7f2c9d7a1334b3b2bd5f67fab4d447b60613d
    master date: 2024-06-11 17:00:10 +0100
---
 .cirrus.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.cirrus.yml b/.cirrus.yml
index 63f3afb104..e961877881 100644
--- a/.cirrus.yml
+++ b/.cirrus.yml
@@ -17,7 +17,7 @@ freebsd_template: &FREEBSD_TEMPLATE
 task:
   name: 'FreeBSD 13'
   freebsd_instance:
-    image_family: freebsd-13-2
+    image_family: freebsd-13-3
   << : *FREEBSD_TEMPLATE
 
 task:
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.17] x86/smp: do not use shorthand IPI destinations in CPU hot{,un}plug contexts
Message-Id: <E1sMRff-0004sh-Qr@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 12:22:43 +0000

commit 2165a8d88862c5f4b23577dc079c5ef777d94df2
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 26 14:08:40 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:08:40 2024 +0200

    x86/smp: do not use shorthand IPI destinations in CPU hot{,un}plug contexts
    
    Due to the current rwlock logic, if the CPU calling get_cpu_maps() does
    so from a cpu_hotplug_{begin,done}() region the function will still
    return success, because a CPU taking the rwlock in read mode after
    having taken it in write mode is allowed.  Such corner case makes using
    get_cpu_maps() alone not enough to prevent using the shorthand in CPU
    hotplug regions.
    
    Introduce a new helper to detect whether the current caller is between a
    cpu_hotplug_{begin,done}() region and use it in send_IPI_mask() to restrict
    shorthand usage.
    
    Fixes: 5500d265a2a8 ('x86/smp: use APIC ALLBUT destination shorthand when possible')
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 171c52fba5d94e050d704770480dcb983490d0ad
    master date: 2024-06-12 14:29:31 +0200
---
 xen/arch/x86/smp.c       |  2 +-
 xen/common/cpu.c         |  5 +++++
 xen/include/xen/cpu.h    | 10 ++++++++++
 xen/include/xen/rwlock.h |  2 ++
 4 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/smp.c b/xen/arch/x86/smp.c
index b42603c351..1f27b20286 100644
--- a/xen/arch/x86/smp.c
+++ b/xen/arch/x86/smp.c
@@ -89,7 +89,7 @@ void send_IPI_mask(const cpumask_t *mask, int vector)
      * the system have been accounted for.
      */
     if ( system_state > SYS_STATE_smp_boot &&
-         !unaccounted_cpus && !disabled_cpus &&
+         !unaccounted_cpus && !disabled_cpus && !cpu_in_hotplug_context() &&
          /* NB: get_cpu_maps lock requires enabled interrupts. */
          local_irq_is_enabled() && (cpus_locked = get_cpu_maps()) &&
          (park_offline_cpus ||
diff --git a/xen/common/cpu.c b/xen/common/cpu.c
index 778b6820b7..9a2c088873 100644
--- a/xen/common/cpu.c
+++ b/xen/common/cpu.c
@@ -68,6 +68,11 @@ void cpu_hotplug_done(void)
     write_unlock(&cpu_add_remove_lock);
 }
 
+bool cpu_in_hotplug_context(void)
+{
+    return rw_is_write_locked_by_me(&cpu_add_remove_lock);
+}
+
 static NOTIFIER_HEAD(cpu_chain);
 
 void __init register_cpu_notifier(struct notifier_block *nb)
diff --git a/xen/include/xen/cpu.h b/xen/include/xen/cpu.h
index e8eeb217a0..8a1afb1837 100644
--- a/xen/include/xen/cpu.h
+++ b/xen/include/xen/cpu.h
@@ -13,6 +13,16 @@ void put_cpu_maps(void);
 void cpu_hotplug_begin(void);
 void cpu_hotplug_done(void);
 
+/*
+ * Returns true when the caller CPU is between a cpu_hotplug_{begin,done}()
+ * region.
+ *
+ * This is required to safely identify hotplug contexts, as get_cpu_maps()
+ * would otherwise succeed because a caller holding the lock in write mode is
+ * allowed to acquire the same lock in read mode.
+ */
+bool cpu_in_hotplug_context(void);
+
 /* Receive notification of CPU hotplug events. */
 void register_cpu_notifier(struct notifier_block *nb);
 
diff --git a/xen/include/xen/rwlock.h b/xen/include/xen/rwlock.h
index abe0804bf7..02369079f9 100644
--- a/xen/include/xen/rwlock.h
+++ b/xen/include/xen/rwlock.h
@@ -297,6 +297,8 @@ static always_inline void write_lock_irq(rwlock_t *l)
 
 #define rw_is_locked(l)               _rw_is_locked(l)
 #define rw_is_write_locked(l)         _rw_is_write_locked(l)
+#define rw_is_write_locked_by_me(l) \
+    lock_evaluate_nospec(_is_write_locked_by_me(atomic_read(&(l)->cnts)))
 
 
 typedef struct percpu_rwlock percpu_rwlock_t;
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.17] x86/irq: limit interrupt movement done by fixup_irqs()
Message-Id: <E1sMRfp-0004tG-U3@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 12:22:53 +0000

commit eeefc570559f129223ed8c0e24183cfdb1c39e5b
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 26 14:09:15 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:09:15 2024 +0200

    x86/irq: limit interrupt movement done by fixup_irqs()
    
    The current check used in fixup_irqs() to decide whether to move around
    interrupts is based on the affinity mask, but such mask can have all bits set,
    and hence is unlikely to be a subset of the input mask.  For example if an
    interrupt has an affinity mask of all 1s, any input to fixup_irqs() that's not
    an all set CPU mask would cause that interrupt to be shuffled around
    unconditionally.
    
    What fixup_irqs() care about is evacuating interrupts from CPUs not set on the
    input CPU mask, and for that purpose it should check whether the interrupt is
    assigned to a CPU not present in the input mask.  Assume that ->arch.cpu_mask
    is a subset of the ->affinity mask, and keep the current logic that resets the
    ->affinity mask if the interrupt has to be shuffled around.
    
    Doing the affinity movement based on ->arch.cpu_mask requires removing the
    special handling to ->arch.cpu_mask done for high priority vectors, otherwise
    the adjustment done to cpu_mask makes them always skip the CPU interrupt
    movement.
    
    While there also adjust the comment as to the purpose of fixup_irqs().
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: c7564d7366d865cc407e3d64bca816d07edee174
    master date: 2024-06-12 14:30:40 +0200
---
 xen/arch/x86/include/asm/irq.h |  2 +-
 xen/arch/x86/irq.c             | 21 +++++++++++----------
 2 files changed, 12 insertions(+), 11 deletions(-)

diff --git a/xen/arch/x86/include/asm/irq.h b/xen/arch/x86/include/asm/irq.h
index 26850e5077..207c9fede2 100644
--- a/xen/arch/x86/include/asm/irq.h
+++ b/xen/arch/x86/include/asm/irq.h
@@ -136,7 +136,7 @@ void free_domain_pirqs(struct domain *d);
 int map_domain_emuirq_pirq(struct domain *d, int pirq, int irq);
 int unmap_domain_pirq_emuirq(struct domain *d, int pirq);
 
-/* Reset irq affinities to match the given CPU mask. */
+/* Evacuate interrupts assigned to CPUs not present in the input CPU mask. */
 void fixup_irqs(const cpumask_t *mask, bool verbose);
 void fixup_eoi(void);
 
diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index 5e6edc0905..2eac2de0b4 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2529,7 +2529,7 @@ static int __init cf_check setup_dump_irqs(void)
 }
 __initcall(setup_dump_irqs);
 
-/* Reset irq affinities to match the given CPU mask. */
+/* Evacuate interrupts assigned to CPUs not present in the input CPU mask. */
 void fixup_irqs(const cpumask_t *mask, bool verbose)
 {
     unsigned int irq;
@@ -2553,19 +2553,15 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
 
         vector = irq_to_vector(irq);
         if ( vector >= FIRST_HIPRIORITY_VECTOR &&
-             vector <= LAST_HIPRIORITY_VECTOR )
+             vector <= LAST_HIPRIORITY_VECTOR &&
+             desc->handler == &no_irq_type )
         {
-            cpumask_and(desc->arch.cpu_mask, desc->arch.cpu_mask, mask);
-
             /*
              * This can in particular happen when parking secondary threads
              * during boot and when the serial console wants to use a PCI IRQ.
              */
-            if ( desc->handler == &no_irq_type )
-            {
-                spin_unlock(&desc->lock);
-                continue;
-            }
+            spin_unlock(&desc->lock);
+            continue;
         }
 
         if ( desc->arch.move_cleanup_count )
@@ -2586,7 +2582,12 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
                                affinity);
         }
 
-        if ( !desc->action || cpumask_subset(desc->affinity, mask) )
+        /*
+         * Avoid shuffling the interrupt around as long as current target CPUs
+         * are a subset of the input mask.  What fixup_irqs() cares about is
+         * evacuating interrupts from CPUs not in the input mask.
+         */
+        if ( !desc->action || cpumask_subset(desc->arch.cpu_mask, mask) )
         {
             spin_unlock(&desc->lock);
             continue;
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.17


From xen-changelog-bounces@lists.xenproject.org Wed Jun 26 12:23:05 2024
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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.17] x86/EPT: correct special page checking in epte_get_entry_emt()
Message-Id: <E1sMRg0-0004uo-0q@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 12:23:04 +0000

commit a86a0df4c0af15df36a6b4fa397c8cc2e876cbfa
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 26 14:09:50 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:09:50 2024 +0200

    x86/EPT: correct special page checking in epte_get_entry_emt()
    
    mfn_valid() granularity is (currently) 256Mb. Therefore the start of a
    1Gb page passing the test doesn't necessarily mean all parts of such a
    range would also pass. Yet using the result of mfn_to_page() on an MFN
    which doesn't pass mfn_valid() checking is liable to result in a crash
    (the invocation of mfn_to_page() alone is presumably "just" UB in such a
    case).
    
    Fixes: ca24b2ffdbd9 ("x86/hvm: set 'ipat' in EPT for special pages")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: 5540b94e8191059eb9cbbe98ac316232a42208f6
    master date: 2024-06-13 16:53:34 +0200
---
 xen/arch/x86/mm/p2m-ept.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c
index d61d66c20e..54fa13fa7e 100644
--- a/xen/arch/x86/mm/p2m-ept.c
+++ b/xen/arch/x86/mm/p2m-ept.c
@@ -530,8 +530,12 @@ int epte_get_entry_emt(struct domain *d, gfn_t gfn, mfn_t mfn,
     }
 
     for ( special_pgs = i = 0; i < (1ul << order); i++ )
-        if ( is_special_page(mfn_to_page(mfn_add(mfn, i))) )
+    {
+        mfn_t cur = mfn_add(mfn, i);
+
+        if ( mfn_valid(cur) && is_special_page(mfn_to_page(cur)) )
             special_pgs++;
+    }
 
     if ( special_pgs )
     {
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.17] x86/EPT: avoid marking non-present entries for re-configuring
Message-Id: <E1sMRgA-0004vQ-3r@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 12:23:14 +0000

commit 6f39608e1f2cebb55a2265d426c16f1f4132f63e
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 26 14:10:15 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:10:15 2024 +0200

    x86/EPT: avoid marking non-present entries for re-configuring
    
    For non-present entries EMT, like most other fields, is meaningless to
    hardware. Make the logic in ept_set_entry() setting the field (and iPAT)
    conditional upon dealing with a present entry, leaving the value at 0
    otherwise. This has two effects for epte_get_entry_emt() which we'll
    want to leverage subsequently:
    1) The call moved here now won't be issued with INVALID_MFN anymore (a
       respective BUG_ON() is being added).
    2) Neither of the other two calls could now be issued with a truncated
       form of INVALID_MFN anymore (as long as there's no bug anywhere
       marking an entry present when that was populated using INVALID_MFN).
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: 777c71d31325bc55ba1cc3f317d4155fe519ab0b
    master date: 2024-06-13 16:54:17 +0200
---
 xen/arch/x86/mm/p2m-ept.c | 29 ++++++++++++++++++-----------
 1 file changed, 18 insertions(+), 11 deletions(-)

diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c
index 54fa13fa7e..b7d7a5b68c 100644
--- a/xen/arch/x86/mm/p2m-ept.c
+++ b/xen/arch/x86/mm/p2m-ept.c
@@ -662,6 +662,8 @@ static int cf_check resolve_misconfig(struct p2m_domain *p2m, unsigned long gfn)
             if ( e.emt != MTRR_NUM_TYPES )
                 break;
 
+            ASSERT(is_epte_present(&e));
+
             if ( level == 0 )
             {
                 for ( gfn -= i, i = 0; i < EPT_PAGETABLE_ENTRIES; ++i )
@@ -927,17 +929,6 @@ ept_set_entry(struct p2m_domain *p2m, gfn_t gfn_, mfn_t mfn,
 
     if ( mfn_valid(mfn) || p2m_allows_invalid_mfn(p2mt) )
     {
-        bool ipat;
-        int emt = epte_get_entry_emt(p2m->domain, _gfn(gfn), mfn,
-                                     i * EPT_TABLE_ORDER, &ipat,
-                                     p2mt);
-
-        if ( emt >= 0 )
-            new_entry.emt = emt;
-        else /* ept_handle_misconfig() will need to take care of this. */
-            new_entry.emt = MTRR_NUM_TYPES;
-
-        new_entry.ipat = ipat;
         new_entry.sp = !!i;
         new_entry.sa_p2mt = p2mt;
         new_entry.access = p2ma;
@@ -953,6 +944,22 @@ ept_set_entry(struct p2m_domain *p2m, gfn_t gfn_, mfn_t mfn,
             need_modify_vtd_table = 0;
 
         ept_p2m_type_to_flags(p2m, &new_entry);
+
+        if ( is_epte_present(&new_entry) )
+        {
+            bool ipat;
+            int emt = epte_get_entry_emt(p2m->domain, _gfn(gfn), mfn,
+                                         i * EPT_TABLE_ORDER, &ipat,
+                                         p2mt);
+
+            BUG_ON(mfn_eq(mfn, INVALID_MFN));
+
+            if ( emt >= 0 )
+                new_entry.emt = emt;
+            else /* ept_handle_misconfig() will need to take care of this. */
+                new_entry.emt = MTRR_NUM_TYPES;
+            new_entry.ipat = ipat;
+        }
     }
 
     if ( sve != -1 )
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.17] x86/EPT: drop questionable mfn_valid() from epte_get_entry_emt()
Message-Id: <E1sMRgK-0004wO-6u@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 12:23:24 +0000

commit dbcc4fba01bbdacf29e632c800a2c3e6bda0cd98
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 26 14:10:40 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:10:40 2024 +0200

    x86/EPT: drop questionable mfn_valid() from epte_get_entry_emt()
    
    mfn_valid() is RAM-focused; it will often return false for MMIO. Yet
    access to actual MMIO space should not generally be restricted to UC
    only; especially video frame buffer accesses are unduly affected by such
    a restriction.
    
    Since, as of 777c71d31325 ("x86/EPT: avoid marking non-present entries
    for re-configuring"), the function won't be called with INVALID_MFN or,
    worse, truncated forms thereof anymore, we call fully drop that check.
    
    Fixes: 81fd0d3ca4b2 ("x86/hvm: simplify 'mmio_direct' check in epte_get_entry_emt()")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: 4fdd8d75566fdad06667a79ec0ce6f43cc466c54
    master date: 2024-06-13 16:55:22 +0200
---
 xen/arch/x86/mm/p2m-ept.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c
index b7d7a5b68c..57fc1d352c 100644
--- a/xen/arch/x86/mm/p2m-ept.c
+++ b/xen/arch/x86/mm/p2m-ept.c
@@ -512,12 +512,6 @@ int epte_get_entry_emt(struct domain *d, gfn_t gfn, mfn_t mfn,
         return -1;
     }
 
-    if ( !mfn_valid(mfn) )
-    {
-        *ipat = true;
-        return MTRR_TYPE_UNCACHABLE;
-    }
-
     /*
      * Conditional must be kept in sync with the code in
      * {iomem,ioports}_{permit,deny}_access().
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.17] x86/Intel: unlock CPUID earlier for the BSP
Message-Id: <E1sMRgU-0004wp-AC@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 12:23:34 +0000

commit ee1e76ed10ec64c654925d5b305c7c7a7743f717
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 26 14:11:08 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:11:08 2024 +0200

    x86/Intel: unlock CPUID earlier for the BSP
    
    Intel CPUs have a MSR bit to limit CPUID enumeration to leaf two. If
    this bit is set by the BIOS then CPUID evaluation does not work when
    data from any leaf greater than two is needed; early_cpu_init() in
    particular wants to collect leaf 7 data.
    
    Cure this by unlocking CPUID right before evaluating anything which
    depends on the maximum CPUID leaf being greater than two.
    
    Inspired by (and description cloned from) Linux commit 0c2f6d04619e
    ("x86/topology/intel: Unlock CPUID before evaluating anything").
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: fa4d026737a47cd1d66ffb797a29150b4453aa9f
    master date: 2024-06-18 15:12:44 +0200
---
 xen/arch/x86/cpu/common.c |  3 ++-
 xen/arch/x86/cpu/cpu.h    |  2 ++
 xen/arch/x86/cpu/intel.c  | 29 +++++++++++++++++------------
 3 files changed, 21 insertions(+), 13 deletions(-)

diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c
index 88855f5773..14a3a97806 100644
--- a/xen/arch/x86/cpu/common.c
+++ b/xen/arch/x86/cpu/common.c
@@ -343,7 +343,8 @@ void __init early_cpu_init(void)
 
 	c->x86_vendor = x86_cpuid_lookup_vendor(ebx, ecx, edx);
 	switch (c->x86_vendor) {
-	case X86_VENDOR_INTEL:	  actual_cpu = intel_cpu_dev;    break;
+	case X86_VENDOR_INTEL:	  intel_unlock_cpuid_leaves(c);
+				  actual_cpu = intel_cpu_dev;    break;
 	case X86_VENDOR_AMD:	  actual_cpu = amd_cpu_dev;      break;
 	case X86_VENDOR_CENTAUR:  actual_cpu = centaur_cpu_dev;  break;
 	case X86_VENDOR_SHANGHAI: actual_cpu = shanghai_cpu_dev; break;
diff --git a/xen/arch/x86/cpu/cpu.h b/xen/arch/x86/cpu/cpu.h
index 85a67771f7..bbde5e528a 100644
--- a/xen/arch/x86/cpu/cpu.h
+++ b/xen/arch/x86/cpu/cpu.h
@@ -24,3 +24,5 @@ void amd_init_lfence(struct cpuinfo_x86 *c);
 void amd_init_ssbd(const struct cpuinfo_x86 *c);
 void amd_init_spectral_chicken(void);
 void detect_zen2_null_seg_behaviour(void);
+
+void intel_unlock_cpuid_leaves(struct cpuinfo_x86 *c);
diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c
index 2d439e0bd2..490f7ff6f1 100644
--- a/xen/arch/x86/cpu/intel.c
+++ b/xen/arch/x86/cpu/intel.c
@@ -293,15 +293,11 @@ static void __init noinline intel_init_levelling(void)
 		ctxt_switch_masking = intel_ctxt_switch_masking;
 }
 
-static void cf_check early_init_intel(struct cpuinfo_x86 *c)
+/* Unmask CPUID levels (and NX) if masked. */
+void intel_unlock_cpuid_leaves(struct cpuinfo_x86 *c)
 {
-	u64 misc_enable, disable;
-
-	/* Netburst reports 64 bytes clflush size, but does IO in 128 bytes */
-	if (c->x86 == 15 && c->x86_cache_alignment == 64)
-		c->x86_cache_alignment = 128;
+	uint64_t misc_enable, disable;
 
-	/* Unmask CPUID levels and NX if masked: */
 	rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
 
 	disable = misc_enable & (MSR_IA32_MISC_ENABLE_LIMIT_CPUID |
@@ -309,17 +305,26 @@ static void cf_check early_init_intel(struct cpuinfo_x86 *c)
 	if (disable) {
 		wrmsrl(MSR_IA32_MISC_ENABLE, misc_enable & ~disable);
 		bootsym(trampoline_misc_enable_off) |= disable;
-		bootsym(trampoline_efer) |= EFER_NXE;
 	}
-
-	if (disable & MSR_IA32_MISC_ENABLE_LIMIT_CPUID)
-		printk(KERN_INFO "revised cpuid level: %d\n",
-		       cpuid_eax(0));
+	if (disable & MSR_IA32_MISC_ENABLE_LIMIT_CPUID) {
+		c->cpuid_level = cpuid_eax(0);
+		printk(KERN_INFO "revised cpuid level: %u\n", c->cpuid_level);
+	}
 	if (disable & MSR_IA32_MISC_ENABLE_XD_DISABLE) {
+		bootsym(trampoline_efer) |= EFER_NXE;
 		write_efer(read_efer() | EFER_NXE);
 		printk(KERN_INFO
 		       "re-enabled NX (Execute Disable) protection\n");
 	}
+}
+
+static void cf_check early_init_intel(struct cpuinfo_x86 *c)
+{
+	/* Netburst reports 64 bytes clflush size, but does IO in 128 bytes */
+	if (c->x86 == 15 && c->x86_cache_alignment == 64)
+		c->x86_cache_alignment = 128;
+
+	intel_unlock_cpuid_leaves(c);
 
 	/* CPUID workaround for Intel 0F33/0F34 CPU */
 	if (boot_cpu_data.x86 == 0xF && boot_cpu_data.x86_model == 3 &&
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.17] x86/irq: deal with old_cpu_mask for interrupts in movement in fixup_irqs()
Message-Id: <E1sMRge-0004xj-DA@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 12:23:44 +0000

commit a1c62c2ca689a90684fef36a108e7e71b951b7d5
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 26 14:11:33 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:11:33 2024 +0200

    x86/irq: deal with old_cpu_mask for interrupts in movement in fixup_irqs()
    
    Given the current logic it's possible for ->arch.old_cpu_mask to get out of
    sync: if a CPU set in old_cpu_mask is offlined and then onlined
    again without old_cpu_mask having been updated the data in the mask will no
    longer be accurate, as when brought back online the CPU will no longer have
    old_vector configured to handle the old interrupt source.
    
    If there's an interrupt movement in progress, and the to be offlined CPU (which
    is the call context) is in the old_cpu_mask, clear it and update the mask, so
    it doesn't contain stale data.
    
    Note that when the system is going down fixup_irqs() will be called by
    smp_send_stop() from CPU 0 with a mask with only CPU 0 on it, effectively
    asking to move all interrupts to the current caller (CPU 0) which is the only
    CPU to remain online.  In that case we don't care to migrate interrupts that
    are in the process of being moved, as it's likely we won't be able to move all
    interrupts to CPU 0 due to vector shortage anyway.
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 817d1cd627be668c358d038f0fadbf7d24d417d3
    master date: 2024-06-18 15:14:49 +0200
---
 xen/arch/x86/irq.c | 29 ++++++++++++++++++++++++++++-
 1 file changed, 28 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index 2eac2de0b4..b1387cf6c9 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2539,7 +2539,7 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
     for ( irq = 0; irq < nr_irqs; irq++ )
     {
         bool break_affinity = false, set_affinity = true;
-        unsigned int vector;
+        unsigned int vector, cpu = smp_processor_id();
         cpumask_t *affinity = this_cpu(scratch_cpumask);
 
         if ( irq == 2 )
@@ -2582,6 +2582,33 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
                                affinity);
         }
 
+        if ( desc->arch.move_in_progress &&
+             /*
+              * Only attempt to adjust the mask if the current CPU is going
+              * offline, otherwise the whole system is going down and leaving
+              * stale data in the masks is fine.
+              */
+             !cpu_online(cpu) &&
+             cpumask_test_cpu(cpu, desc->arch.old_cpu_mask) )
+        {
+            /*
+             * This CPU is going offline, remove it from ->arch.old_cpu_mask
+             * and possibly release the old vector if the old mask becomes
+             * empty.
+             *
+             * Note cleaning ->arch.old_cpu_mask is required if the CPU is
+             * brought offline and then online again, as when re-onlined the
+             * per-cpu vector table will no longer have ->arch.old_vector
+             * setup, and hence ->arch.old_cpu_mask would be stale.
+             */
+            cpumask_clear_cpu(cpu, desc->arch.old_cpu_mask);
+            if ( cpumask_empty(desc->arch.old_cpu_mask) )
+            {
+                desc->arch.move_in_progress = 0;
+                release_old_vec(desc);
+            }
+        }
+
         /*
          * Avoid shuffling the interrupt around as long as current target CPUs
          * are a subset of the input mask.  What fixup_irqs() cares about is
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.17] x86/irq: handle moving interrupts in _assign_irq_vector()
Message-Id: <E1sMRgo-0004yf-GH@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 12:23:54 +0000

commit 7d3fee8d8e78c3c2c25af995b9c5d1c22d98d54c
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 26 14:12:05 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:12:05 2024 +0200

    x86/irq: handle moving interrupts in _assign_irq_vector()
    
    Currently there's logic in fixup_irqs() that attempts to prevent
    _assign_irq_vector() from failing, as fixup_irqs() is required to evacuate all
    interrupts from the CPUs not present in the input mask.  The current logic in
    fixup_irqs() is incomplete, as it doesn't deal with interrupts that have
    move_cleanup_count > 0 and a non-empty ->arch.old_cpu_mask field.
    
    Instead of attempting to fixup the interrupt descriptor in fixup_irqs() so that
    _assign_irq_vector() cannot fail, introduce logic in _assign_irq_vector()
    to deal with interrupts that have either move_{in_progress,cleanup_count} set
    and no remaining online CPUs in ->arch.cpu_mask.
    
    If _assign_irq_vector() is requested to move an interrupt in the state
    described above, first attempt to see if ->arch.old_cpu_mask contains any valid
    CPUs that could be used as fallback, and if that's the case do move the
    interrupt back to the previous destination.  Note this is easier because the
    vector hasn't been released yet, so there's no need to allocate and setup a new
    vector on the destination.
    
    Due to the logic in fixup_irqs() that clears offline CPUs from
    ->arch.old_cpu_mask (and releases the old vector if the mask becomes empty) it
    shouldn't be possible to get into _assign_irq_vector() with
    ->arch.move_{in_progress,cleanup_count} set but no online CPUs in
    ->arch.old_cpu_mask.
    
    However if ->arch.move_{in_progress,cleanup_count} is set and the interrupt has
    also changed affinity, it's possible the members of ->arch.old_cpu_mask are no
    longer part of the affinity set, move the interrupt to a different CPU part of
    the provided mask and keep the current ->arch.old_{cpu_mask,vector} for the
    pending interrupt movement to be completed.
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 369558924a642bbb0cb731e9a3375958867cb17b
    master date: 2024-06-18 15:15:10 +0200
---
 xen/arch/x86/irq.c | 97 ++++++++++++++++++++++++++++++++++++++----------------
 1 file changed, 68 insertions(+), 29 deletions(-)

diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index b1387cf6c9..0b4d4b44a5 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -553,7 +553,58 @@ static int _assign_irq_vector(struct irq_desc *desc, const cpumask_t *mask)
     }
 
     if ( desc->arch.move_in_progress || desc->arch.move_cleanup_count )
-        return -EAGAIN;
+    {
+        /*
+         * If the current destination is online refuse to shuffle.  Retry after
+         * the in-progress movement has finished.
+         */
+        if ( cpumask_intersects(desc->arch.cpu_mask, &cpu_online_map) )
+            return -EAGAIN;
+
+        /*
+         * Due to the logic in fixup_irqs() that clears offlined CPUs from
+         * ->arch.old_cpu_mask it shouldn't be possible to get here with
+         * ->arch.move_{in_progress,cleanup_count} set and no online CPUs in
+         * ->arch.old_cpu_mask.
+         */
+        ASSERT(valid_irq_vector(desc->arch.old_vector));
+        ASSERT(cpumask_intersects(desc->arch.old_cpu_mask, &cpu_online_map));
+
+        if ( cpumask_intersects(desc->arch.old_cpu_mask, mask) )
+        {
+            /*
+             * Fallback to the old destination if moving is in progress and the
+             * current destination is to be offlined.  This is only possible if
+             * the CPUs in old_cpu_mask intersect with the affinity mask passed
+             * in the 'mask' parameter.
+             */
+            desc->arch.vector = desc->arch.old_vector;
+            cpumask_and(desc->arch.cpu_mask, desc->arch.old_cpu_mask, mask);
+
+            /* Undo any possibly done cleanup. */
+            for_each_cpu(cpu, desc->arch.cpu_mask)
+                per_cpu(vector_irq, cpu)[desc->arch.vector] = irq;
+
+            /* Cancel the pending move and release the current vector. */
+            desc->arch.old_vector = IRQ_VECTOR_UNASSIGNED;
+            cpumask_clear(desc->arch.old_cpu_mask);
+            desc->arch.move_in_progress = 0;
+            desc->arch.move_cleanup_count = 0;
+            if ( desc->arch.used_vectors )
+            {
+                ASSERT(test_bit(old_vector, desc->arch.used_vectors));
+                clear_bit(old_vector, desc->arch.used_vectors);
+            }
+
+            return 0;
+        }
+
+        /*
+         * There's an interrupt movement in progress but the destination(s) in
+         * ->arch.old_cpu_mask are not suitable given the 'mask' parameter, go
+         * through the full logic to find a new vector in a suitable CPU.
+         */
+    }
 
     err = -ENOSPC;
 
@@ -609,7 +660,22 @@ next:
         current_vector = vector;
         current_offset = offset;
 
-        if ( valid_irq_vector(old_vector) )
+        if ( desc->arch.move_in_progress || desc->arch.move_cleanup_count )
+        {
+            ASSERT(!cpumask_intersects(desc->arch.cpu_mask, &cpu_online_map));
+            /*
+             * Special case when evacuating an interrupt from a CPU to be
+             * offlined and the interrupt was already in the process of being
+             * moved.  Leave ->arch.old_{vector,cpu_mask} as-is and just
+             * replace ->arch.{cpu_mask,vector} with the new destination.
+             * Cleanup will be done normally for the old fields, just release
+             * the current vector here.
+             */
+            if ( desc->arch.used_vectors &&
+                 !test_and_clear_bit(old_vector, desc->arch.used_vectors) )
+                ASSERT_UNREACHABLE();
+        }
+        else if ( valid_irq_vector(old_vector) )
         {
             cpumask_and(desc->arch.old_cpu_mask, desc->arch.cpu_mask,
                         &cpu_online_map);
@@ -2620,33 +2686,6 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
             continue;
         }
 
-        /*
-         * In order for the affinity adjustment below to be successful, we
-         * need _assign_irq_vector() to succeed. This in particular means
-         * clearing desc->arch.move_in_progress if this would otherwise
-         * prevent the function from succeeding. Since there's no way for the
-         * flag to get cleared anymore when there's no possible destination
-         * left (the only possibility then would be the IRQs enabled window
-         * after this loop), there's then also no race with us doing it here.
-         *
-         * Therefore the logic here and there need to remain in sync.
-         */
-        if ( desc->arch.move_in_progress &&
-             !cpumask_intersects(mask, desc->arch.cpu_mask) )
-        {
-            unsigned int cpu;
-
-            cpumask_and(affinity, desc->arch.old_cpu_mask, &cpu_online_map);
-
-            spin_lock(&vector_lock);
-            for_each_cpu(cpu, affinity)
-                per_cpu(vector_irq, cpu)[desc->arch.old_vector] = ~irq;
-            spin_unlock(&vector_lock);
-
-            release_old_vec(desc);
-            desc->arch.move_in_progress = 0;
-        }
-
         if ( !cpumask_intersects(mask, desc->affinity) )
         {
             break_affinity = true;
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.17] xen/ubsan: Fix UB in type_descriptor declaration
Message-Id: <E1sMRgy-000506-J9@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 12:24:04 +0000

commit 9dfe294cb6de52c34f1419394fde1fe2b6c2a70b
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed Jun 26 14:12:38 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:12:38 2024 +0200

    xen/ubsan: Fix UB in type_descriptor declaration
    
    struct type_descriptor is arranged with a NUL terminated string following the
    kind/info fields.
    
    The only reason this doesn't trip UBSAN detection itself (on more modern
    compilers at least) is because struct type_descriptor is only referenced in
    suppressed regions.
    
    Switch the declaration to be a real flexible member.  No functional change.
    
    Fixes: 00fcf4dd8eb4 ("xen/ubsan: Import ubsan implementation from Linux 4.13")
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: bd59af99700f075d06a6d47a16f777c9519928e0
    master date: 2024-06-18 14:55:04 +0100
---
 xen/common/ubsan/ubsan.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/common/ubsan/ubsan.h b/xen/common/ubsan/ubsan.h
index a3159040fe..3db42e75b1 100644
--- a/xen/common/ubsan/ubsan.h
+++ b/xen/common/ubsan/ubsan.h
@@ -10,7 +10,7 @@ enum {
 struct type_descriptor {
 	u16 type_kind;
 	u16 type_info;
-	char type_name[1];
+	char type_name[];
 };
 
 struct source_location {
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.17] x86/xstate: Fix initialisation of XSS cache
Message-Id: <E1sMRh8-00050c-Lt@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 12:24:14 +0000

commit 80fe1fe2fe559a7e80fb2258f968beaa11656959
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed Jun 26 14:13:17 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:13:17 2024 +0200

    x86/xstate: Fix initialisation of XSS cache
    
    The clobbering of this_cpu(xcr0) and this_cpu(xss) to architecturally invalid
    values is to force the subsequent set_xcr0() and set_msr_xss() to reload the
    hardware register.
    
    While XCR0 is reloaded in xstate_init(), MSR_XSS isn't.  This causes
    get_msr_xss() to return the invalid value, and logic of the form:
    
        old = get_msr_xss();
        set_msr_xss(new);
        ...
        set_msr_xss(old);
    
    to try and restore said invalid value.
    
    The architecturally invalid value must be purged from the cache, meaning the
    hardware register must be written at least once.  This in turn highlights that
    the invalid value must only be used in the case that the hardware register is
    available.
    
    Fixes: f7f4a523927f ("x86/xstate: reset cached register values on resume")
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 9e6dbbe8bf400aacb99009ddffa91d2a0c312b39
    master date: 2024-06-19 13:00:06 +0100
---
 xen/arch/x86/xstate.c | 18 +++++++++++-------
 1 file changed, 11 insertions(+), 7 deletions(-)

diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c
index cea3d0b81f..8a636c6e80 100644
--- a/xen/arch/x86/xstate.c
+++ b/xen/arch/x86/xstate.c
@@ -642,13 +642,6 @@ void xstate_init(struct cpuinfo_x86 *c)
         return;
     }
 
-    /*
-     * Zap the cached values to make set_xcr0() and set_msr_xss() really
-     * write it.
-     */
-    this_cpu(xcr0) = 0;
-    this_cpu(xss) = ~0;
-
     cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
     feature_mask = (((u64)edx << 32) | eax) & XCNTXT_MASK;
     BUG_ON(!valid_xcr0(feature_mask));
@@ -658,8 +651,19 @@ void xstate_init(struct cpuinfo_x86 *c)
      * Set CR4_OSXSAVE and run "cpuid" to get xsave_cntxt_size.
      */
     set_in_cr4(X86_CR4_OSXSAVE);
+
+    /*
+     * Zap the cached values to make set_xcr0() and set_msr_xss() really write
+     * the hardware register.
+     */
+    this_cpu(xcr0) = 0;
     if ( !set_xcr0(feature_mask) )
         BUG();
+    if ( cpu_has_xsaves )
+    {
+        this_cpu(xss) = ~0;
+        set_msr_xss(0);
+    }
 
     if ( bsp )
     {
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.17] x86/cpuid: Fix handling of XSAVE dynamic leaves
Message-Id: <E1sMRhI-00051Z-P3@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 12:24:24 +0000

commit 02f94eab2183202180689eb85a2408d21dbe5505
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed Jun 26 14:13:37 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:13:37 2024 +0200

    x86/cpuid: Fix handling of XSAVE dynamic leaves
    
    [ This is a minimal backport of commit 71cacfb035f4 ("x86/cpuid: Fix handling
      of XSAVE dynamic leaves") to fix the bugs without depending on the large
      rework of XSTATE handling in Xen 4.19 ]
    
    First, if XSAVE is available in hardware but not visible to the guest, the
    dynamic leaves shouldn't be filled in.
    
    Second, the comment concerning XSS state is wrong.  VT-x doesn't manage
    host/guest state automatically, but there is provision for "host only" bits to
    be set, so the implications are still accurate.
    
    In Xen 4.18, no XSS states are supported, so it's safe to keep deferring to
    real hardware.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 71cacfb035f4a78ee10970dc38a3baa04d387451
    master date: 2024-06-19 13:00:06 +0100
---
 xen/arch/x86/cpuid.c | 30 +++++++++++++-----------------
 1 file changed, 13 insertions(+), 17 deletions(-)

diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c
index f311372cdf..ead6dde3f2 100644
--- a/xen/arch/x86/cpuid.c
+++ b/xen/arch/x86/cpuid.c
@@ -330,24 +330,20 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf,
     case XSTATE_CPUID:
         switch ( subleaf )
         {
-        case 1:
-            if ( p->xstate.xsavec || p->xstate.xsaves )
-            {
-                /*
-                 * TODO: Figure out what to do for XSS state.  VT-x manages
-                 * host vs guest MSR_XSS automatically, so as soon as we start
-                 * supporting any XSS states, the wrong XSS will be in
-                 * context.
-                 */
-                BUILD_BUG_ON(XSTATE_XSAVES_ONLY != 0);
-
-                /*
-                 * Read CPUID[0xD,0/1].EBX from hardware.  They vary with
-                 * enabled XSTATE, and appropraite XCR0|XSS are in context.
-                 */
+            /*
+             * Read CPUID[0xd,0/1].EBX from hardware.  They vary with enabled
+             * XSTATE, and the appropriate XCR0 is in context.
+             */
         case 0:
-                res->b = cpuid_count_ebx(leaf, subleaf);
-            }
+            if ( p->basic.xsave )
+                res->b = cpuid_count_ebx(0xd, 0);
+            break;
+
+        case 1:
+            /* This only works because Xen doesn't support XSS states yet. */
+            BUILD_BUG_ON(XSTATE_XSAVES_ONLY != 0);
+            if ( p->xstate.xsavec )
+                res->b = cpuid_count_ebx(0xd, 1);
             break;
         }
         break;
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.17] x86/irq: forward pending interrupts to new destination in fixup_irqs()
Message-Id: <E1sMRhS-00052Q-Rx@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 12:24:34 +0000

commit 87a49d2ec6fe2881e4b0947ea3e0e0f041dc6be3
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 26 14:14:01 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:14:01 2024 +0200

    x86/irq: forward pending interrupts to new destination in fixup_irqs()
    
    fixup_irqs() is used to evacuate interrupts from to be offlined CPUs.  Given
    the CPU is to become offline, the normal migration logic used by Xen where the
    vector in the previous target(s) is left configured until the interrupt is
    received on the new destination is not suitable.
    
    Instead attempt to do as much as possible in order to prevent loosing
    interrupts.  If fixup_irqs() is called from the CPU to be offlined (as is
    currently the case for CPU hot unplug) attempt to forward pending vectors when
    interrupts that target the current CPU are migrated to a different destination.
    
    Additionally, for interrupts that have already been moved from the current CPU
    prior to the call to fixup_irqs() but that haven't been delivered to the new
    destination (iow: interrupts with move_in_progress set and the current CPU set
    in ->arch.old_cpu_mask) also check whether the previous vector is pending and
    forward it to the new destination.
    
    This allows us to remove the window with interrupts enabled at the bottom of
    fixup_irqs().  Such window wasn't safe anyway: references to the CPU to become
    offline are removed from interrupts masks, but the per-CPU vector_irq[] array
    is not updated to reflect those changes (as the CPU is going offline anyway).
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: e2bb28d621584fce15c907002ddc7c6772644b64
    master date: 2024-06-20 12:09:32 +0200
---
 xen/arch/x86/include/asm/apic.h |  5 +++++
 xen/arch/x86/irq.c              | 46 +++++++++++++++++++++++++++++++++++------
 2 files changed, 45 insertions(+), 6 deletions(-)

diff --git a/xen/arch/x86/include/asm/apic.h b/xen/arch/x86/include/asm/apic.h
index 7625c0ecd6..ad8d7cc054 100644
--- a/xen/arch/x86/include/asm/apic.h
+++ b/xen/arch/x86/include/asm/apic.h
@@ -145,6 +145,11 @@ static __inline bool_t apic_isr_read(u8 vector)
             (vector & 0x1f)) & 1;
 }
 
+static inline bool apic_irr_read(unsigned int vector)
+{
+    return apic_read(APIC_IRR + (vector / 32 * 0x10)) & (1U << (vector % 32));
+}
+
 static __inline u32 get_apic_id(void) /* Get the physical APIC id */
 {
     u32 id = apic_read(APIC_ID);
diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index 0b4d4b44a5..11b2a213aa 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2604,7 +2604,7 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
 
     for ( irq = 0; irq < nr_irqs; irq++ )
     {
-        bool break_affinity = false, set_affinity = true;
+        bool break_affinity = false, set_affinity = true, check_irr = false;
         unsigned int vector, cpu = smp_processor_id();
         cpumask_t *affinity = this_cpu(scratch_cpumask);
 
@@ -2657,6 +2657,25 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
              !cpu_online(cpu) &&
              cpumask_test_cpu(cpu, desc->arch.old_cpu_mask) )
         {
+            /*
+             * This to be offlined CPU was the target of an interrupt that's
+             * been moved, and the new destination target hasn't yet
+             * acknowledged any interrupt from it.
+             *
+             * We know the interrupt is configured to target the new CPU at
+             * this point, so we can check IRR for any pending vectors and
+             * forward them to the new destination.
+             *
+             * Note that for the other case of an interrupt movement being in
+             * progress (move_cleanup_count being non-zero) we know the new
+             * destination has already acked at least one interrupt from this
+             * source, and hence there's no need to forward any stale
+             * interrupts.
+             */
+            if ( apic_irr_read(desc->arch.old_vector) )
+                send_IPI_mask(cpumask_of(cpumask_any(desc->arch.cpu_mask)),
+                              desc->arch.vector);
+
             /*
              * This CPU is going offline, remove it from ->arch.old_cpu_mask
              * and possibly release the old vector if the old mask becomes
@@ -2697,6 +2716,14 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
         if ( desc->handler->disable )
             desc->handler->disable(desc);
 
+        /*
+         * If the current CPU is going offline and is (one of) the target(s) of
+         * the interrupt, signal to check whether there are any pending vectors
+         * to be handled in the local APIC after the interrupt has been moved.
+         */
+        if ( !cpu_online(cpu) && cpumask_test_cpu(cpu, desc->arch.cpu_mask) )
+            check_irr = true;
+
         if ( desc->handler->set_affinity )
             desc->handler->set_affinity(desc, affinity);
         else if ( !(warned++) )
@@ -2707,6 +2734,18 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
 
         cpumask_copy(affinity, desc->affinity);
 
+        if ( check_irr && apic_irr_read(vector) )
+            /*
+             * Forward pending interrupt to the new destination, this CPU is
+             * going offline and otherwise the interrupt would be lost.
+             *
+             * Do the IRR check as late as possible before releasing the irq
+             * desc in order for any in-flight interrupts to be delivered to
+             * the lapic.
+             */
+            send_IPI_mask(cpumask_of(cpumask_any(desc->arch.cpu_mask)),
+                          desc->arch.vector);
+
         spin_unlock(&desc->lock);
 
         if ( !verbose )
@@ -2718,11 +2757,6 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
             printk("Broke affinity for IRQ%u, new: %*pb\n",
                    irq, CPUMASK_PR(affinity));
     }
-
-    /* That doesn't seem sufficient.  Give it 1ms. */
-    local_irq_enable();
-    mdelay(1);
-    local_irq_disable();
 }
 
 void fixup_eoi(void)
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] automation/eclair: configure Rule 13.6 and custom service B.UNEVALEFF
Message-Id: <E1sMSwM-00037X-7U@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 13:44:02 +0000

commit 0ac3b175e74167815995df463181663461f8d9f1
Author:     Federico Serafini <federico.serafini@bugseng.com>
AuthorDate: Mon Jun 24 11:18:32 2024 +0200
Commit:     Stefano Stabellini <stefano.stabellini@amd.com>
CommitDate: Tue Jun 25 13:41:05 2024 -0700

    automation/eclair: configure Rule 13.6 and custom service B.UNEVALEFF
    
    Rule 13.6 states that "The operand of the `sizeof' operator shall not
    contain any expression which has potential side effects".
    
    Define service B.UNEVALEFF as an extension of Rule 13.6 to
    check for unevalued side effects also for typeof and alignof operators.
    
    Update ECLAIR configuration to deviate uses of BUILD_BUG_ON and
    alternative_v?call[0-9] for both Rule 13.6 and B.UNEVALEFF.
    
    Add service B.UNEVALEFF to the accepted.ecl guidelines to check
    "violations" in the weekly analysis.
    
    Signed-off-by: Federico Serafini <federico.serafini@bugseng.com>
    Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 automation/eclair_analysis/ECLAIR/B.UNEVALEFF.ecl        | 10 ++++++++++
 automation/eclair_analysis/ECLAIR/accepted_guidelines.sh |  2 ++
 automation/eclair_analysis/ECLAIR/analysis.ecl           |  1 +
 automation/eclair_analysis/ECLAIR/deviations.ecl         | 10 ++++++++++
 docs/misra/deviations.rst                                | 10 ++++++++++
 5 files changed, 33 insertions(+)

diff --git a/automation/eclair_analysis/ECLAIR/B.UNEVALEFF.ecl b/automation/eclair_analysis/ECLAIR/B.UNEVALEFF.ecl
new file mode 100644
index 0000000000..92d8db8986
--- /dev/null
+++ b/automation/eclair_analysis/ECLAIR/B.UNEVALEFF.ecl
@@ -0,0 +1,10 @@
+-clone_service=MC3R1.R13.6,B.UNEVALEFF
+
+-config=B.UNEVALEFF,summary="The operand of the `alignof' and `typeof'  operators shall not contain any expression which has potential side effects"
+-config=B.UNEVALEFF,stmt_child_matcher=
+{"stmt(node(utrait_expr)&&operator(alignof))", expr, 0, "stmt(any())", {}},
+{"stmt(node(utrait_type)&&operator(alignof))", type, 0, "stmt(any())", {}},
+{"stmt(node(utrait_expr)&&operator(preferred_alignof))", expr, 0, "stmt(any())", {}},
+{"stmt(node(utrait_type)&&operator(preferred_alignof))", type, 0, "stmt(any())", {}},
+{"type(node(typeof_expr))", expr, 0, "stmt(any())", {}},
+{"type(node(typeof_type))", type, 0, "stmt(any())", {}}
diff --git a/automation/eclair_analysis/ECLAIR/accepted_guidelines.sh b/automation/eclair_analysis/ECLAIR/accepted_guidelines.sh
index b308bd4cda..368135122c 100755
--- a/automation/eclair_analysis/ECLAIR/accepted_guidelines.sh
+++ b/automation/eclair_analysis/ECLAIR/accepted_guidelines.sh
@@ -11,3 +11,5 @@ accepted_rst=$1
 
 grep -Eo "\`(Dir|Rule) [0-9]+\.[0-9]+" ${accepted_rst} \
      | sed -e 's/`Rule /MC3R1.R/' -e  's/`Dir /MC3R1.D/' -e 's/.*/-enable=&/' > ${script_dir}/accepted.ecl
+
+echo "-enable=B.UNEVALEFF" >> ${script_dir}/accepted.ecl
diff --git a/automation/eclair_analysis/ECLAIR/analysis.ecl b/automation/eclair_analysis/ECLAIR/analysis.ecl
index 9134e59617..df0b551812 100644
--- a/automation/eclair_analysis/ECLAIR/analysis.ecl
+++ b/automation/eclair_analysis/ECLAIR/analysis.ecl
@@ -52,6 +52,7 @@ their Standard Library equivalents."
 -eval_file=adopted.ecl
 -eval_file=out_of_scope.ecl
 
+-eval_file=B.UNEVALEFF.ecl
 -eval_file=deviations.ecl
 -eval_file=call_properties.ecl
 -eval_file=tagging.ecl
diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl
index ae2eaf50f7..8f13dabeb1 100644
--- a/automation/eclair_analysis/ECLAIR/deviations.ecl
+++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
@@ -344,6 +344,16 @@ of the short-circuit evaluation strategy of such logical operators."
 -config=MC3R1.R13.5,reports+={disapplied,"any()"}
 -doc_end
 
+-doc_begin="Macros alternative_v?call[0-9] use sizeof and typeof to check that the argument types match the corresponding parameter ones."
+-config=MC3R1.R13.6,reports+={deliberate,"any_area(any_loc(any_exp(macro(^alternative_vcall[0-9]$))&&file(^xen/arch/x86/include/asm/alternative\\.h*$)))"}
+-config=B.UNEVALEFF,reports+={deliberate,"any_area(any_loc(any_exp(macro(^alternative_v?call[0-9]$))&&file(^xen/arch/x86/include/asm/alterantive\\.h*$)))"}
+-doc_end
+
+-doc_begin="Anything, no matter how complicated, inside the BUILD_BUG_ON macro is subject to a compile-time evaluation without relevant side effects."
+-config=MC3R1.R13.6,reports+={safe,"any_area(any_loc(any_exp(macro(name(BUILD_BUG_ON)))))"}
+-config=B.UNEVALEFF,reports+={safe,"any_area(any_loc(any_exp(macro(name(BUILD_BUG_ON)))))"}
+-doc_end
+
 #
 # Series 14
 #
diff --git a/docs/misra/deviations.rst b/docs/misra/deviations.rst
index 16fc345756..c6a2affc6a 100644
--- a/docs/misra/deviations.rst
+++ b/docs/misra/deviations.rst
@@ -300,6 +300,16 @@ Deviations related to MISRA C:2012 Rules:
        the short-circuit evaluation strategy for logical operators.
      - Project-wide deviation; tagged as `disapplied` for ECLAIR.
 
+   * - R13.6
+     - On x86, macros alternative_v?call[0-9] use sizeof and typeof to check
+       that the argument types match the corresponding parameter ones.
+     - Tagged as `deliberate` for ECLAIR.
+
+   * - R13.6
+     - Anything, no matter how complicated, inside the BUILD_BUG_ON macro is
+       subject to a compile-time evaluation without relevant side effects."
+     - Tagged as `safe` for ECLAIR.
+
    * - R14.2
      - The severe restrictions imposed by this rule on the use of 'for'
        statements are not counterbalanced by the presumed facilitation of the
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] automation/eclair_analysis: deviate and|or|xor|not for MISRA C Rule 21.2
Message-Id: <E1sMSwW-00038K-BH@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 13:44:12 +0000

commit 853f707cd9e2eb9410dbfbadbd5a01ac0252ef83
Author:     Alessandro Zucchelli <alessandro.zucchelli@bugseng.com>
AuthorDate: Tue Jun 25 13:41:27 2024 -0700
Commit:     Stefano Stabellini <stefano.stabellini@amd.com>
CommitDate: Tue Jun 25 13:41:27 2024 -0700

    automation/eclair_analysis: deviate and|or|xor|not for MISRA C Rule 21.2
    
    Rule 21.2 reports identifiers reserved for the C and POSIX standard
    libraries: or, and, not and xor are reserved identifiers because they
    constitute alternate spellings for the corresponding operators (they are
    defined as macros by iso646.h); however Xen doesn't use standard library
    headers, so there is no risk of overlap.
    
    This addresses violations arising from x86_emulate/x86_emulate.c, where
    label statements named as or, and and xor appear.
    
    No functional change.
    
    Signed-off-by: Alessandro Zucchelli <alessandro.zucchelli@bugseng.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 automation/eclair_analysis/ECLAIR/deviations.ecl | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl
index 8f13dabeb1..dcff4f4013 100644
--- a/automation/eclair_analysis/ECLAIR/deviations.ecl
+++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
@@ -523,6 +523,12 @@ in the expansion."
 # Series 21.
 #
 
+-doc_begin="or, and and xor are reserved identifiers because they constitute alternate
+spellings for the corresponding operators (they are defined as macros by iso646.h).
+However, Xen doesn't use standard library headers, so there is no risk of overlap."
+-config=MC3R1.R21.2,reports+={safe, "any_area(stmt(ref(kind(label)&&^(or|and|xor|not)$)))"}
+-doc_end
+
 -doc_begin="Xen does not use the functions provided by the Standard Library, but
 implements a set of functions that share the same names as their Standard Library equivalent.
 The implementation of these functions is available in source form, so the undefined, unspecified
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] CHANGELOG.md: Fix indentation of "Removed" section
Message-Id: <E1sMSwi-0003Hy-Fb@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 13:44:24 +0000

commit 188e5f1a80b5d64c1f0f07d9878d2c1c0ee8310d
Author:     George Dunlap <george.dunlap@cloud.com>
AuthorDate: Mon Jun 24 09:43:04 2024 +0100
Commit:     George Dunlap <george.dunlap@cloud.com>
CommitDate: Wed Jun 26 14:19:29 2024 +0100

    CHANGELOG.md: Fix indentation of "Removed" section
    
    Signed-off-by: George Dunlap <george.dunlap@cloud.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 CHANGELOG.md | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index 1778419cae..f3c6c7954f 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -31,12 +31,12 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
  - libxl support for backendtype=tap with tapback.
 
 ### Removed
-- caml-stubdom.  It hasn't built since 2014, was pinned to Ocaml 4.02, and has
-  been superseded by the MirageOS/SOLO5 projects.
-- /usr/bin/pygrub symlink.  This was deprecated in Xen 4.2 (2012) but left for
-  compatibility reasons.  VMs configured with bootloader="/usr/bin/pygrub"
-  should be updated to just bootloader="pygrub".
-- The Xen gdbstub on x86.
+ - caml-stubdom.  It hasn't built since 2014, was pinned to Ocaml 4.02, and has
+   been superseded by the MirageOS/SOLO5 projects.
+ - /usr/bin/pygrub symlink.  This was deprecated in Xen 4.2 (2012) but left for
+   compatibility reasons.  VMs configured with bootloader="/usr/bin/pygrub"
+   should be updated to just bootloader="pygrub".
+ - The Xen gdbstub on x86.
 
 ## [4.18.0](https://xenbits.xenproject.org/gitweb/?p=xen.git;a=shortlog;h=RELEASE-4.18.0) - 2023-11-16
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] tools/xenalyze: Remove argp_program_bug_address
Message-Id: <E1sMSws-0003Ia-Iu@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 13:44:34 +0000

commit dde20e47afb51404d59be492ca924704f0fbf71d
Author:     George Dunlap <george.dunlap@cloud.com>
AuthorDate: Mon Jun 24 11:23:18 2024 +0100
Commit:     George Dunlap <george.dunlap@cloud.com>
CommitDate: Wed Jun 26 14:19:29 2024 +0100

    tools/xenalyze: Remove argp_program_bug_address
    
    xenalyze sets argp_program_bug_address to my old Citrix address.  This
    was done before xenalyze was in the xen.git tree; and it's the only
    program in the tree which does so.
    
    Now that xenalyze is part of the normal Xen distribution, it should be
    obvious where to report bugs.
    
    Signed-off-by: George Dunlap <george.dunlap@cloud.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 tools/xentrace/xenalyze.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/tools/xentrace/xenalyze.c b/tools/xentrace/xenalyze.c
index d95e52695f..adc96dd7e4 100644
--- a/tools/xentrace/xenalyze.c
+++ b/tools/xentrace/xenalyze.c
@@ -10920,9 +10920,6 @@ const struct argp parser_def = {
     .doc = "",
 };
 
-const char *argp_program_bug_address = "George Dunlap <george.dunlap@eu.citrix.com>";
-
-
 int main(int argc, char *argv[]) {
     /* Start with warn at stderr. */
     warn = stderr;
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] CHANGELOG: Add entries related to tracing
Message-Id: <E1sMUdr-0003fN-Gj@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 15:33:03 +0000

commit ecadd22a3de8ce7f1799e85af6f1e37c06c57049
Author:     George Dunlap <george.dunlap@cloud.com>
AuthorDate: Mon Jun 24 09:31:52 2024 +0100
Commit:     George Dunlap <george.dunlap@cloud.com>
CommitDate: Wed Jun 26 16:02:26 2024 +0100

    CHANGELOG: Add entries related to tracing
    
    Signed-off-by: George Dunlap <george.dunlap@cloud.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 CHANGELOG.md | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index f3c6c7954f..35c3488f4b 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -21,6 +21,8 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
  - When building with Systemd support (./configure --enable-systemd), remove
    libsystemd as a build dependency.  Systemd Notify support is retained, now
    using a standalone library implementation.
+ - xenalyze no longer requires `--svm-mode` when analyzing traces
+   generated on AMD CPUs
 
 ### Added
  - On x86:
@@ -37,6 +39,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
    compatibility reasons.  VMs configured with bootloader="/usr/bin/pygrub"
    should be updated to just bootloader="pygrub".
  - The Xen gdbstub on x86.
+ - xentrace_format has been removed; use xenalyze instead.
 
 ## [4.18.0](https://xenbits.xenproject.org/gitweb/?p=xen.git;a=shortlog;h=RELEASE-4.18.0) - 2023-11-16
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.18] x86/ucode: Further fixes to identify "ucode already up to date"
Message-Id: <E1sMZkH-0007jS-SY@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 21:00:01 +0000

commit cd873f00bedca2f1afeaf13a78f70e719c5b1398
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed Jun 26 13:36:13 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:36:13 2024 +0200

    x86/ucode: Further fixes to identify "ucode already up to date"
    
    When the revision in hardware is newer than anything Xen has to hand,
    'microcode_cache' isn't set up.  Then, `xen-ucode` initiates the update
    because it doesn't know whether the revisions across the system are symmetric
    or not.  This involves the patch getting all the way into the
    apply_microcode() hooks before being found to be too old.
    
    This is all a giant mess and needs an overhaul, but in the short term simply
    adjust the apply_microcode() to return -EEXIST.
    
    Also, unconditionally print the preexisting microcode revision on boot.  It's
    relevant information which is otherwise unavailable if Xen doesn't find new
    microcode to use.
    
    Fixes: 648db37a155a ("x86/ucode: Distinguish "ucode already up to date"")
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: 977d98e67c2e929c62aa1f495fc4c6341c45abb5
    master date: 2024-05-16 13:59:11 +0100
---
 xen/arch/x86/cpu/microcode/amd.c   | 7 +++++--
 xen/arch/x86/cpu/microcode/core.c  | 2 ++
 xen/arch/x86/cpu/microcode/intel.c | 7 +++++--
 3 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/xen/arch/x86/cpu/microcode/amd.c b/xen/arch/x86/cpu/microcode/amd.c
index 75fc84e445..d8f7646e88 100644
--- a/xen/arch/x86/cpu/microcode/amd.c
+++ b/xen/arch/x86/cpu/microcode/amd.c
@@ -222,12 +222,15 @@ static int cf_check apply_microcode(const struct microcode_patch *patch)
     uint32_t rev, old_rev = sig->rev;
     enum microcode_match_result result = microcode_fits(patch);
 
+    if ( result == MIS_UCODE )
+        return -EINVAL;
+
     /*
      * Allow application of the same revision to pick up SMT-specific changes
      * even if the revision of the other SMT thread is already up-to-date.
      */
-    if ( result != NEW_UCODE && result != SAME_UCODE )
-        return -EINVAL;
+    if ( result == OLD_UCODE )
+        return -EEXIST;
 
     if ( check_final_patch_levels(sig) )
     {
diff --git a/xen/arch/x86/cpu/microcode/core.c b/xen/arch/x86/cpu/microcode/core.c
index d5338ad345..8a47f4471f 100644
--- a/xen/arch/x86/cpu/microcode/core.c
+++ b/xen/arch/x86/cpu/microcode/core.c
@@ -887,6 +887,8 @@ int __init early_microcode_init(unsigned long *module_map,
 
     ucode_ops.collect_cpu_info();
 
+    printk(XENLOG_INFO "BSP microcode revision: 0x%08x\n", this_cpu(cpu_sig).rev);
+
     /*
      * Some hypervisors deliberately report a microcode revision of -1 to
      * mean that they will not accept microcode updates.
diff --git a/xen/arch/x86/cpu/microcode/intel.c b/xen/arch/x86/cpu/microcode/intel.c
index 060c529a6e..a2d88e3ac0 100644
--- a/xen/arch/x86/cpu/microcode/intel.c
+++ b/xen/arch/x86/cpu/microcode/intel.c
@@ -294,10 +294,13 @@ static int cf_check apply_microcode(const struct microcode_patch *patch)
 
     result = microcode_update_match(patch);
 
-    if ( result != NEW_UCODE &&
-         !(opt_ucode_allow_same && result == SAME_UCODE) )
+    if ( result == MIS_UCODE )
         return -EINVAL;
 
+    if ( result == OLD_UCODE ||
+         (result == SAME_UCODE && !opt_ucode_allow_same) )
+        return -EEXIST;
+
     wbinvd();
 
     wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)patch->data);
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.18] x86/msi: prevent watchdog triggering when dumping MSI state
Message-Id: <E1sMZkS-0007l0-08@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 21:00:12 +0000

commit 1ffb29d132600e6a7965c2885505615a6fd6c647
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 26 13:36:52 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:36:52 2024 +0200

    x86/msi: prevent watchdog triggering when dumping MSI state
    
    Use the same check that's used in dump_irqs().
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: 594b22ca5be681ec1b42c34f321cc2600d582210
    master date: 2024-05-20 14:29:44 +0100
---
 xen/arch/x86/msi.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/xen/arch/x86/msi.c b/xen/arch/x86/msi.c
index a78367d7cf..3eaeffd1e0 100644
--- a/xen/arch/x86/msi.c
+++ b/xen/arch/x86/msi.c
@@ -17,6 +17,7 @@
 #include <xen/param.h>
 #include <xen/pci.h>
 #include <xen/pci_regs.h>
+#include <xen/softirq.h>
 #include <xen/iocap.h>
 #include <xen/keyhandler.h>
 #include <xen/pfn.h>
@@ -1405,6 +1406,9 @@ static void cf_check dump_msi(unsigned char key)
         unsigned long flags;
         const char *type = "???";
 
+        if ( !(irq & 0x1f) )
+            process_pending_softirqs();
+
         if ( !irq_desc_initialized(desc) )
             continue;
 
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.18] x86/irq: remove offline CPUs from old CPU mask when adjusting move_cleanup_count
Message-Id: <E1sMZkc-0007mS-3G@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 21:00:22 +0000

commit 52e16bf065cb42b79d14ac74d701d1f9d8506430
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 26 13:37:20 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:37:20 2024 +0200

    x86/irq: remove offline CPUs from old CPU mask when adjusting move_cleanup_count
    
    When adjusting move_cleanup_count to account for CPUs that are offline also
    adjust old_cpu_mask, otherwise further calls to fixup_irqs() could subtract
    those again and create an imbalance in move_cleanup_count.
    
    Fixes: 472e0b74c5c4 ('x86/IRQ: deal with move cleanup count state in fixup_irqs()')
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: e63209d3ba2fd1b2f232babd14c9c679ffa7b09a
    master date: 2024-06-10 10:33:22 +0200
---
 xen/arch/x86/irq.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index e07006391a..db14df93db 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2576,6 +2576,14 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
             desc->arch.move_cleanup_count -= cpumask_weight(affinity);
             if ( !desc->arch.move_cleanup_count )
                 release_old_vec(desc);
+            else
+                /*
+                 * Adjust old_cpu_mask to account for the offline CPUs,
+                 * otherwise further calls to fixup_irqs() could subtract those
+                 * again and possibly underflow the counter.
+                 */
+                cpumask_andnot(desc->arch.old_cpu_mask, desc->arch.old_cpu_mask,
+                               affinity);
         }
 
         if ( !desc->action || cpumask_subset(desc->affinity, mask) )
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.18] CI: Update FreeBSD to 13.3
Message-Id: <E1sMZkm-0007np-75@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 21:00:32 +0000

commit 80f2d2c2a515a6b9a4ea1b128267c6e1b5085002
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed Jun 26 13:37:58 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:37:58 2024 +0200

    CI: Update FreeBSD to 13.3
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Acked-by: Roger Pau Monné <roger.pau@citrix.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
    master commit: 5ea7f2c9d7a1334b3b2bd5f67fab4d447b60613d
    master date: 2024-06-11 17:00:10 +0100
---
 .cirrus.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.cirrus.yml b/.cirrus.yml
index 63f3afb104..e961877881 100644
--- a/.cirrus.yml
+++ b/.cirrus.yml
@@ -17,7 +17,7 @@ freebsd_template: &FREEBSD_TEMPLATE
 task:
   name: 'FreeBSD 13'
   freebsd_instance:
-    image_family: freebsd-13-2
+    image_family: freebsd-13-3
   << : *FREEBSD_TEMPLATE
 
 task:
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.18] x86/smp: do not use shorthand IPI destinations in CPU hot{,un}plug contexts
Message-Id: <E1sMZkw-0007pF-B3@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 21:00:42 +0000

commit 98238d49ecb149a5ac07cb8032817904c404ac2b
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 26 13:38:36 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:38:36 2024 +0200

    x86/smp: do not use shorthand IPI destinations in CPU hot{,un}plug contexts
    
    Due to the current rwlock logic, if the CPU calling get_cpu_maps() does
    so from a cpu_hotplug_{begin,done}() region the function will still
    return success, because a CPU taking the rwlock in read mode after
    having taken it in write mode is allowed.  Such corner case makes using
    get_cpu_maps() alone not enough to prevent using the shorthand in CPU
    hotplug regions.
    
    Introduce a new helper to detect whether the current caller is between a
    cpu_hotplug_{begin,done}() region and use it in send_IPI_mask() to restrict
    shorthand usage.
    
    Fixes: 5500d265a2a8 ('x86/smp: use APIC ALLBUT destination shorthand when possible')
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 171c52fba5d94e050d704770480dcb983490d0ad
    master date: 2024-06-12 14:29:31 +0200
---
 xen/arch/x86/smp.c       |  2 +-
 xen/common/cpu.c         |  5 +++++
 xen/include/xen/cpu.h    | 10 ++++++++++
 xen/include/xen/rwlock.h |  2 ++
 4 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/smp.c b/xen/arch/x86/smp.c
index 3a331cbdbc..340fcafb46 100644
--- a/xen/arch/x86/smp.c
+++ b/xen/arch/x86/smp.c
@@ -88,7 +88,7 @@ void send_IPI_mask(const cpumask_t *mask, int vector)
      * the system have been accounted for.
      */
     if ( system_state > SYS_STATE_smp_boot &&
-         !unaccounted_cpus && !disabled_cpus &&
+         !unaccounted_cpus && !disabled_cpus && !cpu_in_hotplug_context() &&
          /* NB: get_cpu_maps lock requires enabled interrupts. */
          local_irq_is_enabled() && (cpus_locked = get_cpu_maps()) &&
          (park_offline_cpus ||
diff --git a/xen/common/cpu.c b/xen/common/cpu.c
index 8709db4d29..6e35b114c0 100644
--- a/xen/common/cpu.c
+++ b/xen/common/cpu.c
@@ -68,6 +68,11 @@ void cpu_hotplug_done(void)
     write_unlock(&cpu_add_remove_lock);
 }
 
+bool cpu_in_hotplug_context(void)
+{
+    return rw_is_write_locked_by_me(&cpu_add_remove_lock);
+}
+
 static NOTIFIER_HEAD(cpu_chain);
 
 void __init register_cpu_notifier(struct notifier_block *nb)
diff --git a/xen/include/xen/cpu.h b/xen/include/xen/cpu.h
index e1d4eb5967..6bf5786750 100644
--- a/xen/include/xen/cpu.h
+++ b/xen/include/xen/cpu.h
@@ -13,6 +13,16 @@ void put_cpu_maps(void);
 void cpu_hotplug_begin(void);
 void cpu_hotplug_done(void);
 
+/*
+ * Returns true when the caller CPU is between a cpu_hotplug_{begin,done}()
+ * region.
+ *
+ * This is required to safely identify hotplug contexts, as get_cpu_maps()
+ * would otherwise succeed because a caller holding the lock in write mode is
+ * allowed to acquire the same lock in read mode.
+ */
+bool cpu_in_hotplug_context(void);
+
 /* Receive notification of CPU hotplug events. */
 void register_cpu_notifier(struct notifier_block *nb);
 
diff --git a/xen/include/xen/rwlock.h b/xen/include/xen/rwlock.h
index 9e35ee2edf..dc74d1c057 100644
--- a/xen/include/xen/rwlock.h
+++ b/xen/include/xen/rwlock.h
@@ -309,6 +309,8 @@ static always_inline void write_lock_irq(rwlock_t *l)
 
 #define rw_is_locked(l)               _rw_is_locked(l)
 #define rw_is_write_locked(l)         _rw_is_write_locked(l)
+#define rw_is_write_locked_by_me(l) \
+    lock_evaluate_nospec(_is_write_locked_by_me(atomic_read(&(l)->cnts)))
 
 
 typedef struct percpu_rwlock percpu_rwlock_t;
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.18] x86/irq: limit interrupt movement done by fixup_irqs()
Message-Id: <E1sMZl6-0007qW-EF@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 21:00:52 +0000

commit ce0a0cb0a74a909abf988f242aa228acdd2917fe
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 26 13:39:11 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:39:11 2024 +0200

    x86/irq: limit interrupt movement done by fixup_irqs()
    
    The current check used in fixup_irqs() to decide whether to move around
    interrupts is based on the affinity mask, but such mask can have all bits set,
    and hence is unlikely to be a subset of the input mask.  For example if an
    interrupt has an affinity mask of all 1s, any input to fixup_irqs() that's not
    an all set CPU mask would cause that interrupt to be shuffled around
    unconditionally.
    
    What fixup_irqs() care about is evacuating interrupts from CPUs not set on the
    input CPU mask, and for that purpose it should check whether the interrupt is
    assigned to a CPU not present in the input mask.  Assume that ->arch.cpu_mask
    is a subset of the ->affinity mask, and keep the current logic that resets the
    ->affinity mask if the interrupt has to be shuffled around.
    
    Doing the affinity movement based on ->arch.cpu_mask requires removing the
    special handling to ->arch.cpu_mask done for high priority vectors, otherwise
    the adjustment done to cpu_mask makes them always skip the CPU interrupt
    movement.
    
    While there also adjust the comment as to the purpose of fixup_irqs().
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: c7564d7366d865cc407e3d64bca816d07edee174
    master date: 2024-06-12 14:30:40 +0200
---
 xen/arch/x86/include/asm/irq.h |  2 +-
 xen/arch/x86/irq.c             | 21 +++++++++++----------
 2 files changed, 12 insertions(+), 11 deletions(-)

diff --git a/xen/arch/x86/include/asm/irq.h b/xen/arch/x86/include/asm/irq.h
index d7fb8ec7e8..71d4a8fc56 100644
--- a/xen/arch/x86/include/asm/irq.h
+++ b/xen/arch/x86/include/asm/irq.h
@@ -132,7 +132,7 @@ void free_domain_pirqs(struct domain *d);
 int map_domain_emuirq_pirq(struct domain *d, int pirq, int emuirq);
 int unmap_domain_pirq_emuirq(struct domain *d, int pirq);
 
-/* Reset irq affinities to match the given CPU mask. */
+/* Evacuate interrupts assigned to CPUs not present in the input CPU mask. */
 void fixup_irqs(const cpumask_t *mask, bool verbose);
 void fixup_eoi(void);
 
diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index db14df93db..566331bec1 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2529,7 +2529,7 @@ static int __init cf_check setup_dump_irqs(void)
 }
 __initcall(setup_dump_irqs);
 
-/* Reset irq affinities to match the given CPU mask. */
+/* Evacuate interrupts assigned to CPUs not present in the input CPU mask. */
 void fixup_irqs(const cpumask_t *mask, bool verbose)
 {
     unsigned int irq;
@@ -2553,19 +2553,15 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
 
         vector = irq_to_vector(irq);
         if ( vector >= FIRST_HIPRIORITY_VECTOR &&
-             vector <= LAST_HIPRIORITY_VECTOR )
+             vector <= LAST_HIPRIORITY_VECTOR &&
+             desc->handler == &no_irq_type )
         {
-            cpumask_and(desc->arch.cpu_mask, desc->arch.cpu_mask, mask);
-
             /*
              * This can in particular happen when parking secondary threads
              * during boot and when the serial console wants to use a PCI IRQ.
              */
-            if ( desc->handler == &no_irq_type )
-            {
-                spin_unlock(&desc->lock);
-                continue;
-            }
+            spin_unlock(&desc->lock);
+            continue;
         }
 
         if ( desc->arch.move_cleanup_count )
@@ -2586,7 +2582,12 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
                                affinity);
         }
 
-        if ( !desc->action || cpumask_subset(desc->affinity, mask) )
+        /*
+         * Avoid shuffling the interrupt around as long as current target CPUs
+         * are a subset of the input mask.  What fixup_irqs() cares about is
+         * evacuating interrupts from CPUs not in the input mask.
+         */
+        if ( !desc->action || cpumask_subset(desc->arch.cpu_mask, mask) )
         {
             spin_unlock(&desc->lock);
             continue;
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.18] x86/EPT: correct special page checking in epte_get_entry_emt()
Message-Id: <E1sMZlG-0007rx-HW@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 21:01:02 +0000

commit 6e647efaf2b02ce92bcf80bec47c18cca5084f8a
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 26 13:39:44 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:39:44 2024 +0200

    x86/EPT: correct special page checking in epte_get_entry_emt()
    
    mfn_valid() granularity is (currently) 256Mb. Therefore the start of a
    1Gb page passing the test doesn't necessarily mean all parts of such a
    range would also pass. Yet using the result of mfn_to_page() on an MFN
    which doesn't pass mfn_valid() checking is liable to result in a crash
    (the invocation of mfn_to_page() alone is presumably "just" UB in such a
    case).
    
    Fixes: ca24b2ffdbd9 ("x86/hvm: set 'ipat' in EPT for special pages")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: 5540b94e8191059eb9cbbe98ac316232a42208f6
    master date: 2024-06-13 16:53:34 +0200
---
 xen/arch/x86/mm/p2m-ept.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c
index 85c4e8e54f..1aa6bbc771 100644
--- a/xen/arch/x86/mm/p2m-ept.c
+++ b/xen/arch/x86/mm/p2m-ept.c
@@ -518,8 +518,12 @@ int epte_get_entry_emt(struct domain *d, gfn_t gfn, mfn_t mfn,
     }
 
     for ( special_pgs = i = 0; i < (1ul << order); i++ )
-        if ( is_special_page(mfn_to_page(mfn_add(mfn, i))) )
+    {
+        mfn_t cur = mfn_add(mfn, i);
+
+        if ( mfn_valid(cur) && is_special_page(mfn_to_page(cur)) )
             special_pgs++;
+    }
 
     if ( special_pgs )
     {
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.18] x86/EPT: avoid marking non-present entries for re-configuring
Message-Id: <E1sMZlQ-0007sx-L4@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 21:01:12 +0000

commit d31385be5c8e8bc5efb6f8848057bd0c69e8274a
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 26 13:40:11 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:40:11 2024 +0200

    x86/EPT: avoid marking non-present entries for re-configuring
    
    For non-present entries EMT, like most other fields, is meaningless to
    hardware. Make the logic in ept_set_entry() setting the field (and iPAT)
    conditional upon dealing with a present entry, leaving the value at 0
    otherwise. This has two effects for epte_get_entry_emt() which we'll
    want to leverage subsequently:
    1) The call moved here now won't be issued with INVALID_MFN anymore (a
       respective BUG_ON() is being added).
    2) Neither of the other two calls could now be issued with a truncated
       form of INVALID_MFN anymore (as long as there's no bug anywhere
       marking an entry present when that was populated using INVALID_MFN).
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: 777c71d31325bc55ba1cc3f317d4155fe519ab0b
    master date: 2024-06-13 16:54:17 +0200
---
 xen/arch/x86/mm/p2m-ept.c | 29 ++++++++++++++++++-----------
 1 file changed, 18 insertions(+), 11 deletions(-)

diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c
index 1aa6bbc771..641d61b350 100644
--- a/xen/arch/x86/mm/p2m-ept.c
+++ b/xen/arch/x86/mm/p2m-ept.c
@@ -649,6 +649,8 @@ static int cf_check resolve_misconfig(struct p2m_domain *p2m, unsigned long gfn)
             if ( e.emt != MTRR_NUM_TYPES )
                 break;
 
+            ASSERT(is_epte_present(&e));
+
             if ( level == 0 )
             {
                 for ( gfn -= i, i = 0; i < EPT_PAGETABLE_ENTRIES; ++i )
@@ -914,17 +916,6 @@ ept_set_entry(struct p2m_domain *p2m, gfn_t gfn_, mfn_t mfn,
 
     if ( mfn_valid(mfn) || p2m_allows_invalid_mfn(p2mt) )
     {
-        bool ipat;
-        int emt = epte_get_entry_emt(p2m->domain, _gfn(gfn), mfn,
-                                     i * EPT_TABLE_ORDER, &ipat,
-                                     p2mt);
-
-        if ( emt >= 0 )
-            new_entry.emt = emt;
-        else /* ept_handle_misconfig() will need to take care of this. */
-            new_entry.emt = MTRR_NUM_TYPES;
-
-        new_entry.ipat = ipat;
         new_entry.sp = !!i;
         new_entry.sa_p2mt = p2mt;
         new_entry.access = p2ma;
@@ -940,6 +931,22 @@ ept_set_entry(struct p2m_domain *p2m, gfn_t gfn_, mfn_t mfn,
             need_modify_vtd_table = 0;
 
         ept_p2m_type_to_flags(p2m, &new_entry);
+
+        if ( is_epte_present(&new_entry) )
+        {
+            bool ipat;
+            int emt = epte_get_entry_emt(p2m->domain, _gfn(gfn), mfn,
+                                         i * EPT_TABLE_ORDER, &ipat,
+                                         p2mt);
+
+            BUG_ON(mfn_eq(mfn, INVALID_MFN));
+
+            if ( emt >= 0 )
+                new_entry.emt = emt;
+            else /* ept_handle_misconfig() will need to take care of this. */
+                new_entry.emt = MTRR_NUM_TYPES;
+            new_entry.ipat = ipat;
+        }
     }
 
     if ( sve != -1 )
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.18] x86/EPT: drop questionable mfn_valid() from epte_get_entry_emt()
Message-Id: <E1sMZla-0007vY-OE@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 21:01:22 +0000

commit 3b777c2ce4ea8cf67b79a5496e51201145606798
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 26 13:40:35 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:40:35 2024 +0200

    x86/EPT: drop questionable mfn_valid() from epte_get_entry_emt()
    
    mfn_valid() is RAM-focused; it will often return false for MMIO. Yet
    access to actual MMIO space should not generally be restricted to UC
    only; especially video frame buffer accesses are unduly affected by such
    a restriction.
    
    Since, as of 777c71d31325 ("x86/EPT: avoid marking non-present entries
    for re-configuring"), the function won't be called with INVALID_MFN or,
    worse, truncated forms thereof anymore, we call fully drop that check.
    
    Fixes: 81fd0d3ca4b2 ("x86/hvm: simplify 'mmio_direct' check in epte_get_entry_emt()")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: 4fdd8d75566fdad06667a79ec0ce6f43cc466c54
    master date: 2024-06-13 16:55:22 +0200
---
 xen/arch/x86/mm/p2m-ept.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c
index 641d61b350..d325424e97 100644
--- a/xen/arch/x86/mm/p2m-ept.c
+++ b/xen/arch/x86/mm/p2m-ept.c
@@ -500,12 +500,6 @@ int epte_get_entry_emt(struct domain *d, gfn_t gfn, mfn_t mfn,
         return -1;
     }
 
-    if ( !mfn_valid(mfn) )
-    {
-        *ipat = true;
-        return X86_MT_UC;
-    }
-
     /*
      * Conditional must be kept in sync with the code in
      * {iomem,ioports}_{permit,deny}_access().
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.18] x86/Intel: unlock CPUID earlier for the BSP
Message-Id: <E1sMZlk-0007wd-RE@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 21:01:32 +0000

commit c4b284912695a5802433512b913e968eda01544f
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 26 13:41:05 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:41:05 2024 +0200

    x86/Intel: unlock CPUID earlier for the BSP
    
    Intel CPUs have a MSR bit to limit CPUID enumeration to leaf two. If
    this bit is set by the BIOS then CPUID evaluation does not work when
    data from any leaf greater than two is needed; early_cpu_init() in
    particular wants to collect leaf 7 data.
    
    Cure this by unlocking CPUID right before evaluating anything which
    depends on the maximum CPUID leaf being greater than two.
    
    Inspired by (and description cloned from) Linux commit 0c2f6d04619e
    ("x86/topology/intel: Unlock CPUID before evaluating anything").
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: fa4d026737a47cd1d66ffb797a29150b4453aa9f
    master date: 2024-06-18 15:12:44 +0200
---
 xen/arch/x86/cpu/common.c |  3 ++-
 xen/arch/x86/cpu/cpu.h    |  2 ++
 xen/arch/x86/cpu/intel.c  | 29 +++++++++++++++++------------
 3 files changed, 21 insertions(+), 13 deletions(-)

diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c
index 26eed2ade1..edec0a2546 100644
--- a/xen/arch/x86/cpu/common.c
+++ b/xen/arch/x86/cpu/common.c
@@ -336,7 +336,8 @@ void __init early_cpu_init(bool verbose)
 
 	c->x86_vendor = x86_cpuid_lookup_vendor(ebx, ecx, edx);
 	switch (c->x86_vendor) {
-	case X86_VENDOR_INTEL:	  actual_cpu = intel_cpu_dev;    break;
+	case X86_VENDOR_INTEL:	  intel_unlock_cpuid_leaves(c);
+				  actual_cpu = intel_cpu_dev;    break;
 	case X86_VENDOR_AMD:	  actual_cpu = amd_cpu_dev;      break;
 	case X86_VENDOR_CENTAUR:  actual_cpu = centaur_cpu_dev;  break;
 	case X86_VENDOR_SHANGHAI: actual_cpu = shanghai_cpu_dev; break;
diff --git a/xen/arch/x86/cpu/cpu.h b/xen/arch/x86/cpu/cpu.h
index e3d06278b3..8be65e975a 100644
--- a/xen/arch/x86/cpu/cpu.h
+++ b/xen/arch/x86/cpu/cpu.h
@@ -24,3 +24,5 @@ void amd_init_lfence(struct cpuinfo_x86 *c);
 void amd_init_ssbd(const struct cpuinfo_x86 *c);
 void amd_init_spectral_chicken(void);
 void detect_zen2_null_seg_behaviour(void);
+
+void intel_unlock_cpuid_leaves(struct cpuinfo_x86 *c);
diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c
index deb7b70464..0dc7c27601 100644
--- a/xen/arch/x86/cpu/intel.c
+++ b/xen/arch/x86/cpu/intel.c
@@ -303,10 +303,24 @@ static void __init noinline intel_init_levelling(void)
 		ctxt_switch_masking = intel_ctxt_switch_masking;
 }
 
-static void cf_check early_init_intel(struct cpuinfo_x86 *c)
+/* Unmask CPUID levels if masked. */
+void intel_unlock_cpuid_leaves(struct cpuinfo_x86 *c)
 {
-	u64 misc_enable, disable;
+	uint64_t misc_enable, disable;
+
+	rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
+
+	disable = misc_enable & MSR_IA32_MISC_ENABLE_LIMIT_CPUID;
+	if (disable) {
+		wrmsrl(MSR_IA32_MISC_ENABLE, misc_enable & ~disable);
+		bootsym(trampoline_misc_enable_off) |= disable;
+		c->cpuid_level = cpuid_eax(0);
+		printk(KERN_INFO "revised cpuid level: %u\n", c->cpuid_level);
+	}
+}
 
+static void cf_check early_init_intel(struct cpuinfo_x86 *c)
+{
 	/* Netburst reports 64 bytes clflush size, but does IO in 128 bytes */
 	if (c->x86 == 15 && c->x86_cache_alignment == 64)
 		c->x86_cache_alignment = 128;
@@ -315,16 +329,7 @@ static void cf_check early_init_intel(struct cpuinfo_x86 *c)
             bootsym(trampoline_misc_enable_off) & MSR_IA32_MISC_ENABLE_XD_DISABLE)
 		printk(KERN_INFO "re-enabled NX (Execute Disable) protection\n");
 
-	/* Unmask CPUID levels and NX if masked: */
-	rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
-
-	disable = misc_enable & MSR_IA32_MISC_ENABLE_LIMIT_CPUID;
-	if (disable) {
-		wrmsrl(MSR_IA32_MISC_ENABLE, misc_enable & ~disable);
-		bootsym(trampoline_misc_enable_off) |= disable;
-		printk(KERN_INFO "revised cpuid level: %d\n",
-		       cpuid_eax(0));
-	}
+	intel_unlock_cpuid_leaves(c);
 
 	/* CPUID workaround for Intel 0F33/0F34 CPU */
 	if (boot_cpu_data.x86 == 0xF && boot_cpu_data.x86_model == 3 &&
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.18] x86/irq: deal with old_cpu_mask for interrupts in movement in fixup_irqs()
Message-Id: <E1sMZlu-0007xD-UT@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 21:01:42 +0000

commit 39a6170c15bf369a2b26c855ea7621387ed4070b
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 26 13:41:35 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:41:35 2024 +0200

    x86/irq: deal with old_cpu_mask for interrupts in movement in fixup_irqs()
    
    Given the current logic it's possible for ->arch.old_cpu_mask to get out of
    sync: if a CPU set in old_cpu_mask is offlined and then onlined
    again without old_cpu_mask having been updated the data in the mask will no
    longer be accurate, as when brought back online the CPU will no longer have
    old_vector configured to handle the old interrupt source.
    
    If there's an interrupt movement in progress, and the to be offlined CPU (which
    is the call context) is in the old_cpu_mask, clear it and update the mask, so
    it doesn't contain stale data.
    
    Note that when the system is going down fixup_irqs() will be called by
    smp_send_stop() from CPU 0 with a mask with only CPU 0 on it, effectively
    asking to move all interrupts to the current caller (CPU 0) which is the only
    CPU to remain online.  In that case we don't care to migrate interrupts that
    are in the process of being moved, as it's likely we won't be able to move all
    interrupts to CPU 0 due to vector shortage anyway.
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 817d1cd627be668c358d038f0fadbf7d24d417d3
    master date: 2024-06-18 15:14:49 +0200
---
 xen/arch/x86/irq.c | 29 ++++++++++++++++++++++++++++-
 1 file changed, 28 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index 566331bec1..f877327975 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2539,7 +2539,7 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
     for ( irq = 0; irq < nr_irqs; irq++ )
     {
         bool break_affinity = false, set_affinity = true;
-        unsigned int vector;
+        unsigned int vector, cpu = smp_processor_id();
         cpumask_t *affinity = this_cpu(scratch_cpumask);
 
         if ( irq == 2 )
@@ -2582,6 +2582,33 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
                                affinity);
         }
 
+        if ( desc->arch.move_in_progress &&
+             /*
+              * Only attempt to adjust the mask if the current CPU is going
+              * offline, otherwise the whole system is going down and leaving
+              * stale data in the masks is fine.
+              */
+             !cpu_online(cpu) &&
+             cpumask_test_cpu(cpu, desc->arch.old_cpu_mask) )
+        {
+            /*
+             * This CPU is going offline, remove it from ->arch.old_cpu_mask
+             * and possibly release the old vector if the old mask becomes
+             * empty.
+             *
+             * Note cleaning ->arch.old_cpu_mask is required if the CPU is
+             * brought offline and then online again, as when re-onlined the
+             * per-cpu vector table will no longer have ->arch.old_vector
+             * setup, and hence ->arch.old_cpu_mask would be stale.
+             */
+            cpumask_clear_cpu(cpu, desc->arch.old_cpu_mask);
+            if ( cpumask_empty(desc->arch.old_cpu_mask) )
+            {
+                desc->arch.move_in_progress = 0;
+                release_old_vec(desc);
+            }
+        }
+
         /*
          * Avoid shuffling the interrupt around as long as current target CPUs
          * are a subset of the input mask.  What fixup_irqs() cares about is
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.18] x86/irq: handle moving interrupts in _assign_irq_vector()
Message-Id: <E1sMZm5-0007y5-1H@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 21:01:53 +0000

commit 3a8f4ec75d8ed8da6370deac95c341cbada96802
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 26 13:42:05 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:42:05 2024 +0200

    x86/irq: handle moving interrupts in _assign_irq_vector()
    
    Currently there's logic in fixup_irqs() that attempts to prevent
    _assign_irq_vector() from failing, as fixup_irqs() is required to evacuate all
    interrupts from the CPUs not present in the input mask.  The current logic in
    fixup_irqs() is incomplete, as it doesn't deal with interrupts that have
    move_cleanup_count > 0 and a non-empty ->arch.old_cpu_mask field.
    
    Instead of attempting to fixup the interrupt descriptor in fixup_irqs() so that
    _assign_irq_vector() cannot fail, introduce logic in _assign_irq_vector()
    to deal with interrupts that have either move_{in_progress,cleanup_count} set
    and no remaining online CPUs in ->arch.cpu_mask.
    
    If _assign_irq_vector() is requested to move an interrupt in the state
    described above, first attempt to see if ->arch.old_cpu_mask contains any valid
    CPUs that could be used as fallback, and if that's the case do move the
    interrupt back to the previous destination.  Note this is easier because the
    vector hasn't been released yet, so there's no need to allocate and setup a new
    vector on the destination.
    
    Due to the logic in fixup_irqs() that clears offline CPUs from
    ->arch.old_cpu_mask (and releases the old vector if the mask becomes empty) it
    shouldn't be possible to get into _assign_irq_vector() with
    ->arch.move_{in_progress,cleanup_count} set but no online CPUs in
    ->arch.old_cpu_mask.
    
    However if ->arch.move_{in_progress,cleanup_count} is set and the interrupt has
    also changed affinity, it's possible the members of ->arch.old_cpu_mask are no
    longer part of the affinity set, move the interrupt to a different CPU part of
    the provided mask and keep the current ->arch.old_{cpu_mask,vector} for the
    pending interrupt movement to be completed.
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 369558924a642bbb0cb731e9a3375958867cb17b
    master date: 2024-06-18 15:15:10 +0200
---
 xen/arch/x86/irq.c | 97 ++++++++++++++++++++++++++++++++++++++----------------
 1 file changed, 68 insertions(+), 29 deletions(-)

diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index f877327975..13ef61a5b7 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -553,7 +553,58 @@ static int _assign_irq_vector(struct irq_desc *desc, const cpumask_t *mask)
     }
 
     if ( desc->arch.move_in_progress || desc->arch.move_cleanup_count )
-        return -EAGAIN;
+    {
+        /*
+         * If the current destination is online refuse to shuffle.  Retry after
+         * the in-progress movement has finished.
+         */
+        if ( cpumask_intersects(desc->arch.cpu_mask, &cpu_online_map) )
+            return -EAGAIN;
+
+        /*
+         * Due to the logic in fixup_irqs() that clears offlined CPUs from
+         * ->arch.old_cpu_mask it shouldn't be possible to get here with
+         * ->arch.move_{in_progress,cleanup_count} set and no online CPUs in
+         * ->arch.old_cpu_mask.
+         */
+        ASSERT(valid_irq_vector(desc->arch.old_vector));
+        ASSERT(cpumask_intersects(desc->arch.old_cpu_mask, &cpu_online_map));
+
+        if ( cpumask_intersects(desc->arch.old_cpu_mask, mask) )
+        {
+            /*
+             * Fallback to the old destination if moving is in progress and the
+             * current destination is to be offlined.  This is only possible if
+             * the CPUs in old_cpu_mask intersect with the affinity mask passed
+             * in the 'mask' parameter.
+             */
+            desc->arch.vector = desc->arch.old_vector;
+            cpumask_and(desc->arch.cpu_mask, desc->arch.old_cpu_mask, mask);
+
+            /* Undo any possibly done cleanup. */
+            for_each_cpu(cpu, desc->arch.cpu_mask)
+                per_cpu(vector_irq, cpu)[desc->arch.vector] = irq;
+
+            /* Cancel the pending move and release the current vector. */
+            desc->arch.old_vector = IRQ_VECTOR_UNASSIGNED;
+            cpumask_clear(desc->arch.old_cpu_mask);
+            desc->arch.move_in_progress = 0;
+            desc->arch.move_cleanup_count = 0;
+            if ( desc->arch.used_vectors )
+            {
+                ASSERT(test_bit(old_vector, desc->arch.used_vectors));
+                clear_bit(old_vector, desc->arch.used_vectors);
+            }
+
+            return 0;
+        }
+
+        /*
+         * There's an interrupt movement in progress but the destination(s) in
+         * ->arch.old_cpu_mask are not suitable given the 'mask' parameter, go
+         * through the full logic to find a new vector in a suitable CPU.
+         */
+    }
 
     err = -ENOSPC;
 
@@ -609,7 +660,22 @@ next:
         current_vector = vector;
         current_offset = offset;
 
-        if ( valid_irq_vector(old_vector) )
+        if ( desc->arch.move_in_progress || desc->arch.move_cleanup_count )
+        {
+            ASSERT(!cpumask_intersects(desc->arch.cpu_mask, &cpu_online_map));
+            /*
+             * Special case when evacuating an interrupt from a CPU to be
+             * offlined and the interrupt was already in the process of being
+             * moved.  Leave ->arch.old_{vector,cpu_mask} as-is and just
+             * replace ->arch.{cpu_mask,vector} with the new destination.
+             * Cleanup will be done normally for the old fields, just release
+             * the current vector here.
+             */
+            if ( desc->arch.used_vectors &&
+                 !test_and_clear_bit(old_vector, desc->arch.used_vectors) )
+                ASSERT_UNREACHABLE();
+        }
+        else if ( valid_irq_vector(old_vector) )
         {
             cpumask_and(desc->arch.old_cpu_mask, desc->arch.cpu_mask,
                         &cpu_online_map);
@@ -2620,33 +2686,6 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
             continue;
         }
 
-        /*
-         * In order for the affinity adjustment below to be successful, we
-         * need _assign_irq_vector() to succeed. This in particular means
-         * clearing desc->arch.move_in_progress if this would otherwise
-         * prevent the function from succeeding. Since there's no way for the
-         * flag to get cleared anymore when there's no possible destination
-         * left (the only possibility then would be the IRQs enabled window
-         * after this loop), there's then also no race with us doing it here.
-         *
-         * Therefore the logic here and there need to remain in sync.
-         */
-        if ( desc->arch.move_in_progress &&
-             !cpumask_intersects(mask, desc->arch.cpu_mask) )
-        {
-            unsigned int cpu;
-
-            cpumask_and(affinity, desc->arch.old_cpu_mask, &cpu_online_map);
-
-            spin_lock(&vector_lock);
-            for_each_cpu(cpu, affinity)
-                per_cpu(vector_irq, cpu)[desc->arch.old_vector] = ~irq;
-            spin_unlock(&vector_lock);
-
-            release_old_vec(desc);
-            desc->arch.move_in_progress = 0;
-        }
-
         if ( !cpumask_intersects(mask, desc->affinity) )
         {
             break_affinity = true;
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.18] xen/ubsan: Fix UB in type_descriptor declaration
Message-Id: <E1sMZmF-0007zP-43@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 21:02:03 +0000

commit 5397ab9995f7354e7f8122a8a91c810256afa3d1
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed Jun 26 13:42:30 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:42:30 2024 +0200

    xen/ubsan: Fix UB in type_descriptor declaration
    
    struct type_descriptor is arranged with a NUL terminated string following the
    kind/info fields.
    
    The only reason this doesn't trip UBSAN detection itself (on more modern
    compilers at least) is because struct type_descriptor is only referenced in
    suppressed regions.
    
    Switch the declaration to be a real flexible member.  No functional change.
    
    Fixes: 00fcf4dd8eb4 ("xen/ubsan: Import ubsan implementation from Linux 4.13")
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: bd59af99700f075d06a6d47a16f777c9519928e0
    master date: 2024-06-18 14:55:04 +0100
---
 xen/common/ubsan/ubsan.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/common/ubsan/ubsan.h b/xen/common/ubsan/ubsan.h
index a3159040fe..3db42e75b1 100644
--- a/xen/common/ubsan/ubsan.h
+++ b/xen/common/ubsan/ubsan.h
@@ -10,7 +10,7 @@ enum {
 struct type_descriptor {
 	u16 type_kind;
 	u16 type_info;
-	char type_name[1];
+	char type_name[];
 };
 
 struct source_location {
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.18] x86/xstate: Fix initialisation of XSS cache
Message-Id: <E1sMZmP-000802-6v@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 21:02:13 +0000

commit 4ee1df89d9c92609e5fff3c9b261ce4b1bb88e42
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed Jun 26 13:43:19 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:43:19 2024 +0200

    x86/xstate: Fix initialisation of XSS cache
    
    The clobbering of this_cpu(xcr0) and this_cpu(xss) to architecturally invalid
    values is to force the subsequent set_xcr0() and set_msr_xss() to reload the
    hardware register.
    
    While XCR0 is reloaded in xstate_init(), MSR_XSS isn't.  This causes
    get_msr_xss() to return the invalid value, and logic of the form:
    
        old = get_msr_xss();
        set_msr_xss(new);
        ...
        set_msr_xss(old);
    
    to try and restore said invalid value.
    
    The architecturally invalid value must be purged from the cache, meaning the
    hardware register must be written at least once.  This in turn highlights that
    the invalid value must only be used in the case that the hardware register is
    available.
    
    Fixes: f7f4a523927f ("x86/xstate: reset cached register values on resume")
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 9e6dbbe8bf400aacb99009ddffa91d2a0c312b39
    master date: 2024-06-19 13:00:06 +0100
---
 xen/arch/x86/xstate.c | 18 +++++++++++-------
 1 file changed, 11 insertions(+), 7 deletions(-)

diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c
index f442610fc5..ca76f98fe2 100644
--- a/xen/arch/x86/xstate.c
+++ b/xen/arch/x86/xstate.c
@@ -641,13 +641,6 @@ void xstate_init(struct cpuinfo_x86 *c)
         return;
     }
 
-    /*
-     * Zap the cached values to make set_xcr0() and set_msr_xss() really
-     * write it.
-     */
-    this_cpu(xcr0) = 0;
-    this_cpu(xss) = ~0;
-
     cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
     feature_mask = (((u64)edx << 32) | eax) & XCNTXT_MASK;
     BUG_ON(!valid_xcr0(feature_mask));
@@ -657,8 +650,19 @@ void xstate_init(struct cpuinfo_x86 *c)
      * Set CR4_OSXSAVE and run "cpuid" to get xsave_cntxt_size.
      */
     set_in_cr4(X86_CR4_OSXSAVE);
+
+    /*
+     * Zap the cached values to make set_xcr0() and set_msr_xss() really write
+     * the hardware register.
+     */
+    this_cpu(xcr0) = 0;
     if ( !set_xcr0(feature_mask) )
         BUG();
+    if ( cpu_has_xsaves )
+    {
+        this_cpu(xss) = ~0;
+        set_msr_xss(0);
+    }
 
     if ( bsp )
     {
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.18] x86/cpuid: Fix handling of XSAVE dynamic leaves
Message-Id: <E1sMZmZ-00080v-AB@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 21:02:23 +0000

commit 9b43092d54b5f9e9d39d9f20393671e303b19e81
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed Jun 26 13:43:44 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:43:44 2024 +0200

    x86/cpuid: Fix handling of XSAVE dynamic leaves
    
    [ This is a minimal backport of commit 71cacfb035f4 ("x86/cpuid: Fix handling
      of XSAVE dynamic leaves") to fix the bugs without depending on the large
      rework of XSTATE handling in Xen 4.19 ]
    
    First, if XSAVE is available in hardware but not visible to the guest, the
    dynamic leaves shouldn't be filled in.
    
    Second, the comment concerning XSS state is wrong.  VT-x doesn't manage
    host/guest state automatically, but there is provision for "host only" bits to
    be set, so the implications are still accurate.
    
    In Xen 4.18, no XSS states are supported, so it's safe to keep deferring to
    real hardware.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 71cacfb035f4a78ee10970dc38a3baa04d387451
    master date: 2024-06-19 13:00:06 +0100
---
 xen/arch/x86/cpuid.c | 30 +++++++++++++-----------------
 1 file changed, 13 insertions(+), 17 deletions(-)

diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c
index 455a09b2dd..f6fd6cc6b3 100644
--- a/xen/arch/x86/cpuid.c
+++ b/xen/arch/x86/cpuid.c
@@ -330,24 +330,20 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf,
     case XSTATE_CPUID:
         switch ( subleaf )
         {
-        case 1:
-            if ( p->xstate.xsavec || p->xstate.xsaves )
-            {
-                /*
-                 * TODO: Figure out what to do for XSS state.  VT-x manages
-                 * host vs guest MSR_XSS automatically, so as soon as we start
-                 * supporting any XSS states, the wrong XSS will be in
-                 * context.
-                 */
-                BUILD_BUG_ON(XSTATE_XSAVES_ONLY != 0);
-
-                /*
-                 * Read CPUID[0xD,0/1].EBX from hardware.  They vary with
-                 * enabled XSTATE, and appropraite XCR0|XSS are in context.
-                 */
+            /*
+             * Read CPUID[0xd,0/1].EBX from hardware.  They vary with enabled
+             * XSTATE, and the appropriate XCR0 is in context.
+             */
         case 0:
-                res->b = cpuid_count_ebx(leaf, subleaf);
-            }
+            if ( p->basic.xsave )
+                res->b = cpuid_count_ebx(0xd, 0);
+            break;
+
+        case 1:
+            /* This only works because Xen doesn't support XSS states yet. */
+            BUILD_BUG_ON(XSTATE_XSAVES_ONLY != 0);
+            if ( p->xstate.xsavec )
+                res->b = cpuid_count_ebx(0xd, 1);
             break;
         }
         break;
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.18] x86/irq: forward pending interrupts to new destination in fixup_irqs()
Message-Id: <E1sMZmj-00081S-DF@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 21:02:33 +0000

commit e95d30f9e5eed0c5d9dbf72d4cc3ae373152ab10
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 26 13:44:08 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 13:44:08 2024 +0200

    x86/irq: forward pending interrupts to new destination in fixup_irqs()
    
    fixup_irqs() is used to evacuate interrupts from to be offlined CPUs.  Given
    the CPU is to become offline, the normal migration logic used by Xen where the
    vector in the previous target(s) is left configured until the interrupt is
    received on the new destination is not suitable.
    
    Instead attempt to do as much as possible in order to prevent loosing
    interrupts.  If fixup_irqs() is called from the CPU to be offlined (as is
    currently the case for CPU hot unplug) attempt to forward pending vectors when
    interrupts that target the current CPU are migrated to a different destination.
    
    Additionally, for interrupts that have already been moved from the current CPU
    prior to the call to fixup_irqs() but that haven't been delivered to the new
    destination (iow: interrupts with move_in_progress set and the current CPU set
    in ->arch.old_cpu_mask) also check whether the previous vector is pending and
    forward it to the new destination.
    
    This allows us to remove the window with interrupts enabled at the bottom of
    fixup_irqs().  Such window wasn't safe anyway: references to the CPU to become
    offline are removed from interrupts masks, but the per-CPU vector_irq[] array
    is not updated to reflect those changes (as the CPU is going offline anyway).
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: e2bb28d621584fce15c907002ddc7c6772644b64
    master date: 2024-06-20 12:09:32 +0200
---
 xen/arch/x86/include/asm/apic.h |  5 +++++
 xen/arch/x86/irq.c              | 46 +++++++++++++++++++++++++++++++++++------
 2 files changed, 45 insertions(+), 6 deletions(-)

diff --git a/xen/arch/x86/include/asm/apic.h b/xen/arch/x86/include/asm/apic.h
index 7625c0ecd6..ad8d7cc054 100644
--- a/xen/arch/x86/include/asm/apic.h
+++ b/xen/arch/x86/include/asm/apic.h
@@ -145,6 +145,11 @@ static __inline bool_t apic_isr_read(u8 vector)
             (vector & 0x1f)) & 1;
 }
 
+static inline bool apic_irr_read(unsigned int vector)
+{
+    return apic_read(APIC_IRR + (vector / 32 * 0x10)) & (1U << (vector % 32));
+}
+
 static __inline u32 get_apic_id(void) /* Get the physical APIC id */
 {
     u32 id = apic_read(APIC_ID);
diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index 13ef61a5b7..290f8d26e7 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2604,7 +2604,7 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
 
     for ( irq = 0; irq < nr_irqs; irq++ )
     {
-        bool break_affinity = false, set_affinity = true;
+        bool break_affinity = false, set_affinity = true, check_irr = false;
         unsigned int vector, cpu = smp_processor_id();
         cpumask_t *affinity = this_cpu(scratch_cpumask);
 
@@ -2657,6 +2657,25 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
              !cpu_online(cpu) &&
              cpumask_test_cpu(cpu, desc->arch.old_cpu_mask) )
         {
+            /*
+             * This to be offlined CPU was the target of an interrupt that's
+             * been moved, and the new destination target hasn't yet
+             * acknowledged any interrupt from it.
+             *
+             * We know the interrupt is configured to target the new CPU at
+             * this point, so we can check IRR for any pending vectors and
+             * forward them to the new destination.
+             *
+             * Note that for the other case of an interrupt movement being in
+             * progress (move_cleanup_count being non-zero) we know the new
+             * destination has already acked at least one interrupt from this
+             * source, and hence there's no need to forward any stale
+             * interrupts.
+             */
+            if ( apic_irr_read(desc->arch.old_vector) )
+                send_IPI_mask(cpumask_of(cpumask_any(desc->arch.cpu_mask)),
+                              desc->arch.vector);
+
             /*
              * This CPU is going offline, remove it from ->arch.old_cpu_mask
              * and possibly release the old vector if the old mask becomes
@@ -2697,6 +2716,14 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
         if ( desc->handler->disable )
             desc->handler->disable(desc);
 
+        /*
+         * If the current CPU is going offline and is (one of) the target(s) of
+         * the interrupt, signal to check whether there are any pending vectors
+         * to be handled in the local APIC after the interrupt has been moved.
+         */
+        if ( !cpu_online(cpu) && cpumask_test_cpu(cpu, desc->arch.cpu_mask) )
+            check_irr = true;
+
         if ( desc->handler->set_affinity )
             desc->handler->set_affinity(desc, affinity);
         else if ( !(warned++) )
@@ -2707,6 +2734,18 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
 
         cpumask_copy(affinity, desc->affinity);
 
+        if ( check_irr && apic_irr_read(vector) )
+            /*
+             * Forward pending interrupt to the new destination, this CPU is
+             * going offline and otherwise the interrupt would be lost.
+             *
+             * Do the IRR check as late as possible before releasing the irq
+             * desc in order for any in-flight interrupts to be delivered to
+             * the lapic.
+             */
+            send_IPI_mask(cpumask_of(cpumask_any(desc->arch.cpu_mask)),
+                          desc->arch.vector);
+
         spin_unlock(&desc->lock);
 
         if ( !verbose )
@@ -2718,11 +2757,6 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
             printk("Broke affinity for IRQ%u, new: %*pb\n",
                    irq, CPUMASK_PR(affinity));
     }
-
-    /* That doesn't seem sufficient.  Give it 1ms. */
-    local_irq_enable();
-    mdelay(1);
-    local_irq_disable();
 }
 
 void fixup_eoi(void)
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.18


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.17] x86/ucode: Further fixes to identify "ucode already up to date"
Message-Id: <E1sMc8L-0001UK-UI@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 23:33:01 +0000

commit cd8aab43d2b9bbd2cd99f0027dd2d918e0a393d5
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed Jun 26 14:05:54 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:05:54 2024 +0200

    x86/ucode: Further fixes to identify "ucode already up to date"
    
    When the revision in hardware is newer than anything Xen has to hand,
    'microcode_cache' isn't set up.  Then, `xen-ucode` initiates the update
    because it doesn't know whether the revisions across the system are symmetric
    or not.  This involves the patch getting all the way into the
    apply_microcode() hooks before being found to be too old.
    
    This is all a giant mess and needs an overhaul, but in the short term simply
    adjust the apply_microcode() to return -EEXIST.
    
    Also, unconditionally print the preexisting microcode revision on boot.  It's
    relevant information which is otherwise unavailable if Xen doesn't find new
    microcode to use.
    
    Fixes: 648db37a155a ("x86/ucode: Distinguish "ucode already up to date"")
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: 977d98e67c2e929c62aa1f495fc4c6341c45abb5
    master date: 2024-05-16 13:59:11 +0100
---
 xen/arch/x86/cpu/microcode/amd.c   | 7 +++++--
 xen/arch/x86/cpu/microcode/core.c  | 2 ++
 xen/arch/x86/cpu/microcode/intel.c | 7 +++++--
 3 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/xen/arch/x86/cpu/microcode/amd.c b/xen/arch/x86/cpu/microcode/amd.c
index c6d13f3fb3..b28171f2d4 100644
--- a/xen/arch/x86/cpu/microcode/amd.c
+++ b/xen/arch/x86/cpu/microcode/amd.c
@@ -222,12 +222,15 @@ static int cf_check apply_microcode(const struct microcode_patch *patch)
     uint32_t rev, old_rev = sig->rev;
     enum microcode_match_result result = microcode_fits(patch);
 
+    if ( result == MIS_UCODE )
+        return -EINVAL;
+
     /*
      * Allow application of the same revision to pick up SMT-specific changes
      * even if the revision of the other SMT thread is already up-to-date.
      */
-    if ( result != NEW_UCODE && result != SAME_UCODE )
-        return -EINVAL;
+    if ( result == OLD_UCODE )
+        return -EEXIST;
 
     if ( check_final_patch_levels(sig) )
     {
diff --git a/xen/arch/x86/cpu/microcode/core.c b/xen/arch/x86/cpu/microcode/core.c
index 667b1baf91..3150395478 100644
--- a/xen/arch/x86/cpu/microcode/core.c
+++ b/xen/arch/x86/cpu/microcode/core.c
@@ -819,6 +819,8 @@ int __init early_microcode_init(void)
 
     alternative_vcall(ucode_ops.collect_cpu_info);
 
+    printk(XENLOG_INFO "BSP microcode revision: 0x%08x\n", this_cpu(cpu_sig).rev);
+
     if ( ucode_mod.mod_end || ucode_blob.size )
         rc = early_microcode_update_cpu();
 
diff --git a/xen/arch/x86/cpu/microcode/intel.c b/xen/arch/x86/cpu/microcode/intel.c
index cb08f63d2e..91d82f9dde 100644
--- a/xen/arch/x86/cpu/microcode/intel.c
+++ b/xen/arch/x86/cpu/microcode/intel.c
@@ -294,10 +294,13 @@ static int cf_check apply_microcode(const struct microcode_patch *patch)
 
     result = microcode_update_match(patch);
 
-    if ( result != NEW_UCODE &&
-         !(opt_ucode_allow_same && result == SAME_UCODE) )
+    if ( result == MIS_UCODE )
         return -EINVAL;
 
+    if ( result == OLD_UCODE ||
+         (result == SAME_UCODE && !opt_ucode_allow_same) )
+        return -EEXIST;
+
     wbinvd();
 
     wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)patch->data);
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.17] x86/msi: prevent watchdog triggering when dumping MSI state
Message-Id: <E1sMc8W-0001V0-1L@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 23:33:12 +0000

commit 373e02254ce88baae37b89159149c15904fffc13
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 26 14:06:35 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:06:35 2024 +0200

    x86/msi: prevent watchdog triggering when dumping MSI state
    
    Use the same check that's used in dump_irqs().
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: 594b22ca5be681ec1b42c34f321cc2600d582210
    master date: 2024-05-20 14:29:44 +0100
---
 xen/arch/x86/msi.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/xen/arch/x86/msi.c b/xen/arch/x86/msi.c
index d0bf63df1d..3d36fc4204 100644
--- a/xen/arch/x86/msi.c
+++ b/xen/arch/x86/msi.c
@@ -17,6 +17,7 @@
 #include <xen/param.h>
 #include <xen/pci.h>
 #include <xen/pci_regs.h>
+#include <xen/softirq.h>
 #include <xen/iocap.h>
 #include <xen/keyhandler.h>
 #include <xen/pfn.h>
@@ -1428,6 +1429,9 @@ static void cf_check dump_msi(unsigned char key)
         unsigned long flags;
         const char *type = "???";
 
+        if ( !(irq & 0x1f) )
+            process_pending_softirqs();
+
         if ( !irq_desc_initialized(desc) )
             continue;
 
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.17] x86/irq: remove offline CPUs from old CPU mask when adjusting move_cleanup_count
Message-Id: <E1sMc8g-0001VR-4y@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 23:33:22 +0000

commit 9fa0df93babcbb4b0fba9dbc78bbfb1318b85360
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 26 14:07:06 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:07:06 2024 +0200

    x86/irq: remove offline CPUs from old CPU mask when adjusting move_cleanup_count
    
    When adjusting move_cleanup_count to account for CPUs that are offline also
    adjust old_cpu_mask, otherwise further calls to fixup_irqs() could subtract
    those again and create an imbalance in move_cleanup_count.
    
    Fixes: 472e0b74c5c4 ('x86/IRQ: deal with move cleanup count state in fixup_irqs()')
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: e63209d3ba2fd1b2f232babd14c9c679ffa7b09a
    master date: 2024-06-10 10:33:22 +0200
---
 xen/arch/x86/irq.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index abd6f577dd..5e6edc0905 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2576,6 +2576,14 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
             desc->arch.move_cleanup_count -= cpumask_weight(affinity);
             if ( !desc->arch.move_cleanup_count )
                 release_old_vec(desc);
+            else
+                /*
+                 * Adjust old_cpu_mask to account for the offline CPUs,
+                 * otherwise further calls to fixup_irqs() could subtract those
+                 * again and possibly underflow the counter.
+                 */
+                cpumask_andnot(desc->arch.old_cpu_mask, desc->arch.old_cpu_mask,
+                               affinity);
         }
 
         if ( !desc->action || cpumask_subset(desc->affinity, mask) )
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.17] CI: Update FreeBSD to 13.3
Message-Id: <E1sMc8q-0001Vx-8z@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 23:33:32 +0000

commit f15af3ee5bd60893673fe9aae202e90533d3c0dc
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed Jun 26 14:07:53 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:07:53 2024 +0200

    CI: Update FreeBSD to 13.3
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Acked-by: Roger Pau Monné <roger.pau@citrix.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
    master commit: 5ea7f2c9d7a1334b3b2bd5f67fab4d447b60613d
    master date: 2024-06-11 17:00:10 +0100
---
 .cirrus.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.cirrus.yml b/.cirrus.yml
index 63f3afb104..e961877881 100644
--- a/.cirrus.yml
+++ b/.cirrus.yml
@@ -17,7 +17,7 @@ freebsd_template: &FREEBSD_TEMPLATE
 task:
   name: 'FreeBSD 13'
   freebsd_instance:
-    image_family: freebsd-13-2
+    image_family: freebsd-13-3
   << : *FREEBSD_TEMPLATE
 
 task:
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.17] x86/smp: do not use shorthand IPI destinations in CPU hot{,un}plug contexts
Message-Id: <E1sMc90-0001WR-Cf@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 23:33:42 +0000

commit 2165a8d88862c5f4b23577dc079c5ef777d94df2
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 26 14:08:40 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:08:40 2024 +0200

    x86/smp: do not use shorthand IPI destinations in CPU hot{,un}plug contexts
    
    Due to the current rwlock logic, if the CPU calling get_cpu_maps() does
    so from a cpu_hotplug_{begin,done}() region the function will still
    return success, because a CPU taking the rwlock in read mode after
    having taken it in write mode is allowed.  Such corner case makes using
    get_cpu_maps() alone not enough to prevent using the shorthand in CPU
    hotplug regions.
    
    Introduce a new helper to detect whether the current caller is between a
    cpu_hotplug_{begin,done}() region and use it in send_IPI_mask() to restrict
    shorthand usage.
    
    Fixes: 5500d265a2a8 ('x86/smp: use APIC ALLBUT destination shorthand when possible')
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 171c52fba5d94e050d704770480dcb983490d0ad
    master date: 2024-06-12 14:29:31 +0200
---
 xen/arch/x86/smp.c       |  2 +-
 xen/common/cpu.c         |  5 +++++
 xen/include/xen/cpu.h    | 10 ++++++++++
 xen/include/xen/rwlock.h |  2 ++
 4 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/smp.c b/xen/arch/x86/smp.c
index b42603c351..1f27b20286 100644
--- a/xen/arch/x86/smp.c
+++ b/xen/arch/x86/smp.c
@@ -89,7 +89,7 @@ void send_IPI_mask(const cpumask_t *mask, int vector)
      * the system have been accounted for.
      */
     if ( system_state > SYS_STATE_smp_boot &&
-         !unaccounted_cpus && !disabled_cpus &&
+         !unaccounted_cpus && !disabled_cpus && !cpu_in_hotplug_context() &&
          /* NB: get_cpu_maps lock requires enabled interrupts. */
          local_irq_is_enabled() && (cpus_locked = get_cpu_maps()) &&
          (park_offline_cpus ||
diff --git a/xen/common/cpu.c b/xen/common/cpu.c
index 778b6820b7..9a2c088873 100644
--- a/xen/common/cpu.c
+++ b/xen/common/cpu.c
@@ -68,6 +68,11 @@ void cpu_hotplug_done(void)
     write_unlock(&cpu_add_remove_lock);
 }
 
+bool cpu_in_hotplug_context(void)
+{
+    return rw_is_write_locked_by_me(&cpu_add_remove_lock);
+}
+
 static NOTIFIER_HEAD(cpu_chain);
 
 void __init register_cpu_notifier(struct notifier_block *nb)
diff --git a/xen/include/xen/cpu.h b/xen/include/xen/cpu.h
index e8eeb217a0..8a1afb1837 100644
--- a/xen/include/xen/cpu.h
+++ b/xen/include/xen/cpu.h
@@ -13,6 +13,16 @@ void put_cpu_maps(void);
 void cpu_hotplug_begin(void);
 void cpu_hotplug_done(void);
 
+/*
+ * Returns true when the caller CPU is between a cpu_hotplug_{begin,done}()
+ * region.
+ *
+ * This is required to safely identify hotplug contexts, as get_cpu_maps()
+ * would otherwise succeed because a caller holding the lock in write mode is
+ * allowed to acquire the same lock in read mode.
+ */
+bool cpu_in_hotplug_context(void);
+
 /* Receive notification of CPU hotplug events. */
 void register_cpu_notifier(struct notifier_block *nb);
 
diff --git a/xen/include/xen/rwlock.h b/xen/include/xen/rwlock.h
index abe0804bf7..02369079f9 100644
--- a/xen/include/xen/rwlock.h
+++ b/xen/include/xen/rwlock.h
@@ -297,6 +297,8 @@ static always_inline void write_lock_irq(rwlock_t *l)
 
 #define rw_is_locked(l)               _rw_is_locked(l)
 #define rw_is_write_locked(l)         _rw_is_write_locked(l)
+#define rw_is_write_locked_by_me(l) \
+    lock_evaluate_nospec(_is_write_locked_by_me(atomic_read(&(l)->cnts)))
 
 
 typedef struct percpu_rwlock percpu_rwlock_t;
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.17] x86/irq: limit interrupt movement done by fixup_irqs()
Message-Id: <E1sMc9A-0001Wu-Fu@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 23:33:52 +0000

commit eeefc570559f129223ed8c0e24183cfdb1c39e5b
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 26 14:09:15 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:09:15 2024 +0200

    x86/irq: limit interrupt movement done by fixup_irqs()
    
    The current check used in fixup_irqs() to decide whether to move around
    interrupts is based on the affinity mask, but such mask can have all bits set,
    and hence is unlikely to be a subset of the input mask.  For example if an
    interrupt has an affinity mask of all 1s, any input to fixup_irqs() that's not
    an all set CPU mask would cause that interrupt to be shuffled around
    unconditionally.
    
    What fixup_irqs() care about is evacuating interrupts from CPUs not set on the
    input CPU mask, and for that purpose it should check whether the interrupt is
    assigned to a CPU not present in the input mask.  Assume that ->arch.cpu_mask
    is a subset of the ->affinity mask, and keep the current logic that resets the
    ->affinity mask if the interrupt has to be shuffled around.
    
    Doing the affinity movement based on ->arch.cpu_mask requires removing the
    special handling to ->arch.cpu_mask done for high priority vectors, otherwise
    the adjustment done to cpu_mask makes them always skip the CPU interrupt
    movement.
    
    While there also adjust the comment as to the purpose of fixup_irqs().
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: c7564d7366d865cc407e3d64bca816d07edee174
    master date: 2024-06-12 14:30:40 +0200
---
 xen/arch/x86/include/asm/irq.h |  2 +-
 xen/arch/x86/irq.c             | 21 +++++++++++----------
 2 files changed, 12 insertions(+), 11 deletions(-)

diff --git a/xen/arch/x86/include/asm/irq.h b/xen/arch/x86/include/asm/irq.h
index 26850e5077..207c9fede2 100644
--- a/xen/arch/x86/include/asm/irq.h
+++ b/xen/arch/x86/include/asm/irq.h
@@ -136,7 +136,7 @@ void free_domain_pirqs(struct domain *d);
 int map_domain_emuirq_pirq(struct domain *d, int pirq, int irq);
 int unmap_domain_pirq_emuirq(struct domain *d, int pirq);
 
-/* Reset irq affinities to match the given CPU mask. */
+/* Evacuate interrupts assigned to CPUs not present in the input CPU mask. */
 void fixup_irqs(const cpumask_t *mask, bool verbose);
 void fixup_eoi(void);
 
diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index 5e6edc0905..2eac2de0b4 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2529,7 +2529,7 @@ static int __init cf_check setup_dump_irqs(void)
 }
 __initcall(setup_dump_irqs);
 
-/* Reset irq affinities to match the given CPU mask. */
+/* Evacuate interrupts assigned to CPUs not present in the input CPU mask. */
 void fixup_irqs(const cpumask_t *mask, bool verbose)
 {
     unsigned int irq;
@@ -2553,19 +2553,15 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
 
         vector = irq_to_vector(irq);
         if ( vector >= FIRST_HIPRIORITY_VECTOR &&
-             vector <= LAST_HIPRIORITY_VECTOR )
+             vector <= LAST_HIPRIORITY_VECTOR &&
+             desc->handler == &no_irq_type )
         {
-            cpumask_and(desc->arch.cpu_mask, desc->arch.cpu_mask, mask);
-
             /*
              * This can in particular happen when parking secondary threads
              * during boot and when the serial console wants to use a PCI IRQ.
              */
-            if ( desc->handler == &no_irq_type )
-            {
-                spin_unlock(&desc->lock);
-                continue;
-            }
+            spin_unlock(&desc->lock);
+            continue;
         }
 
         if ( desc->arch.move_cleanup_count )
@@ -2586,7 +2582,12 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
                                affinity);
         }
 
-        if ( !desc->action || cpumask_subset(desc->affinity, mask) )
+        /*
+         * Avoid shuffling the interrupt around as long as current target CPUs
+         * are a subset of the input mask.  What fixup_irqs() cares about is
+         * evacuating interrupts from CPUs not in the input mask.
+         */
+        if ( !desc->action || cpumask_subset(desc->arch.cpu_mask, mask) )
         {
             spin_unlock(&desc->lock);
             continue;
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.17] x86/EPT: correct special page checking in epte_get_entry_emt()
Message-Id: <E1sMc9K-0001Xz-JU@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 23:34:02 +0000

commit a86a0df4c0af15df36a6b4fa397c8cc2e876cbfa
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 26 14:09:50 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:09:50 2024 +0200

    x86/EPT: correct special page checking in epte_get_entry_emt()
    
    mfn_valid() granularity is (currently) 256Mb. Therefore the start of a
    1Gb page passing the test doesn't necessarily mean all parts of such a
    range would also pass. Yet using the result of mfn_to_page() on an MFN
    which doesn't pass mfn_valid() checking is liable to result in a crash
    (the invocation of mfn_to_page() alone is presumably "just" UB in such a
    case).
    
    Fixes: ca24b2ffdbd9 ("x86/hvm: set 'ipat' in EPT for special pages")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: 5540b94e8191059eb9cbbe98ac316232a42208f6
    master date: 2024-06-13 16:53:34 +0200
---
 xen/arch/x86/mm/p2m-ept.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c
index d61d66c20e..54fa13fa7e 100644
--- a/xen/arch/x86/mm/p2m-ept.c
+++ b/xen/arch/x86/mm/p2m-ept.c
@@ -530,8 +530,12 @@ int epte_get_entry_emt(struct domain *d, gfn_t gfn, mfn_t mfn,
     }
 
     for ( special_pgs = i = 0; i < (1ul << order); i++ )
-        if ( is_special_page(mfn_to_page(mfn_add(mfn, i))) )
+    {
+        mfn_t cur = mfn_add(mfn, i);
+
+        if ( mfn_valid(cur) && is_special_page(mfn_to_page(cur)) )
             special_pgs++;
+    }
 
     if ( special_pgs )
     {
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.17] x86/EPT: avoid marking non-present entries for re-configuring
Message-Id: <E1sMc9U-0001Z4-MV@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 23:34:12 +0000

commit 6f39608e1f2cebb55a2265d426c16f1f4132f63e
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 26 14:10:15 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:10:15 2024 +0200

    x86/EPT: avoid marking non-present entries for re-configuring
    
    For non-present entries EMT, like most other fields, is meaningless to
    hardware. Make the logic in ept_set_entry() setting the field (and iPAT)
    conditional upon dealing with a present entry, leaving the value at 0
    otherwise. This has two effects for epte_get_entry_emt() which we'll
    want to leverage subsequently:
    1) The call moved here now won't be issued with INVALID_MFN anymore (a
       respective BUG_ON() is being added).
    2) Neither of the other two calls could now be issued with a truncated
       form of INVALID_MFN anymore (as long as there's no bug anywhere
       marking an entry present when that was populated using INVALID_MFN).
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: 777c71d31325bc55ba1cc3f317d4155fe519ab0b
    master date: 2024-06-13 16:54:17 +0200
---
 xen/arch/x86/mm/p2m-ept.c | 29 ++++++++++++++++++-----------
 1 file changed, 18 insertions(+), 11 deletions(-)

diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c
index 54fa13fa7e..b7d7a5b68c 100644
--- a/xen/arch/x86/mm/p2m-ept.c
+++ b/xen/arch/x86/mm/p2m-ept.c
@@ -662,6 +662,8 @@ static int cf_check resolve_misconfig(struct p2m_domain *p2m, unsigned long gfn)
             if ( e.emt != MTRR_NUM_TYPES )
                 break;
 
+            ASSERT(is_epte_present(&e));
+
             if ( level == 0 )
             {
                 for ( gfn -= i, i = 0; i < EPT_PAGETABLE_ENTRIES; ++i )
@@ -927,17 +929,6 @@ ept_set_entry(struct p2m_domain *p2m, gfn_t gfn_, mfn_t mfn,
 
     if ( mfn_valid(mfn) || p2m_allows_invalid_mfn(p2mt) )
     {
-        bool ipat;
-        int emt = epte_get_entry_emt(p2m->domain, _gfn(gfn), mfn,
-                                     i * EPT_TABLE_ORDER, &ipat,
-                                     p2mt);
-
-        if ( emt >= 0 )
-            new_entry.emt = emt;
-        else /* ept_handle_misconfig() will need to take care of this. */
-            new_entry.emt = MTRR_NUM_TYPES;
-
-        new_entry.ipat = ipat;
         new_entry.sp = !!i;
         new_entry.sa_p2mt = p2mt;
         new_entry.access = p2ma;
@@ -953,6 +944,22 @@ ept_set_entry(struct p2m_domain *p2m, gfn_t gfn_, mfn_t mfn,
             need_modify_vtd_table = 0;
 
         ept_p2m_type_to_flags(p2m, &new_entry);
+
+        if ( is_epte_present(&new_entry) )
+        {
+            bool ipat;
+            int emt = epte_get_entry_emt(p2m->domain, _gfn(gfn), mfn,
+                                         i * EPT_TABLE_ORDER, &ipat,
+                                         p2mt);
+
+            BUG_ON(mfn_eq(mfn, INVALID_MFN));
+
+            if ( emt >= 0 )
+                new_entry.emt = emt;
+            else /* ept_handle_misconfig() will need to take care of this. */
+                new_entry.emt = MTRR_NUM_TYPES;
+            new_entry.ipat = ipat;
+        }
     }
 
     if ( sve != -1 )
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.17] x86/EPT: drop questionable mfn_valid() from epte_get_entry_emt()
Message-Id: <E1sMc9e-0001Zj-PV@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 23:34:22 +0000

commit dbcc4fba01bbdacf29e632c800a2c3e6bda0cd98
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 26 14:10:40 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:10:40 2024 +0200

    x86/EPT: drop questionable mfn_valid() from epte_get_entry_emt()
    
    mfn_valid() is RAM-focused; it will often return false for MMIO. Yet
    access to actual MMIO space should not generally be restricted to UC
    only; especially video frame buffer accesses are unduly affected by such
    a restriction.
    
    Since, as of 777c71d31325 ("x86/EPT: avoid marking non-present entries
    for re-configuring"), the function won't be called with INVALID_MFN or,
    worse, truncated forms thereof anymore, we call fully drop that check.
    
    Fixes: 81fd0d3ca4b2 ("x86/hvm: simplify 'mmio_direct' check in epte_get_entry_emt()")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: 4fdd8d75566fdad06667a79ec0ce6f43cc466c54
    master date: 2024-06-13 16:55:22 +0200
---
 xen/arch/x86/mm/p2m-ept.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c
index b7d7a5b68c..57fc1d352c 100644
--- a/xen/arch/x86/mm/p2m-ept.c
+++ b/xen/arch/x86/mm/p2m-ept.c
@@ -512,12 +512,6 @@ int epte_get_entry_emt(struct domain *d, gfn_t gfn, mfn_t mfn,
         return -1;
     }
 
-    if ( !mfn_valid(mfn) )
-    {
-        *ipat = true;
-        return MTRR_TYPE_UNCACHABLE;
-    }
-
     /*
      * Conditional must be kept in sync with the code in
      * {iomem,ioports}_{permit,deny}_access().
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.17] x86/Intel: unlock CPUID earlier for the BSP
Message-Id: <E1sMc9o-0001ak-Sa@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 23:34:32 +0000

commit ee1e76ed10ec64c654925d5b305c7c7a7743f717
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 26 14:11:08 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:11:08 2024 +0200

    x86/Intel: unlock CPUID earlier for the BSP
    
    Intel CPUs have a MSR bit to limit CPUID enumeration to leaf two. If
    this bit is set by the BIOS then CPUID evaluation does not work when
    data from any leaf greater than two is needed; early_cpu_init() in
    particular wants to collect leaf 7 data.
    
    Cure this by unlocking CPUID right before evaluating anything which
    depends on the maximum CPUID leaf being greater than two.
    
    Inspired by (and description cloned from) Linux commit 0c2f6d04619e
    ("x86/topology/intel: Unlock CPUID before evaluating anything").
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: fa4d026737a47cd1d66ffb797a29150b4453aa9f
    master date: 2024-06-18 15:12:44 +0200
---
 xen/arch/x86/cpu/common.c |  3 ++-
 xen/arch/x86/cpu/cpu.h    |  2 ++
 xen/arch/x86/cpu/intel.c  | 29 +++++++++++++++++------------
 3 files changed, 21 insertions(+), 13 deletions(-)

diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c
index 88855f5773..14a3a97806 100644
--- a/xen/arch/x86/cpu/common.c
+++ b/xen/arch/x86/cpu/common.c
@@ -343,7 +343,8 @@ void __init early_cpu_init(void)
 
 	c->x86_vendor = x86_cpuid_lookup_vendor(ebx, ecx, edx);
 	switch (c->x86_vendor) {
-	case X86_VENDOR_INTEL:	  actual_cpu = intel_cpu_dev;    break;
+	case X86_VENDOR_INTEL:	  intel_unlock_cpuid_leaves(c);
+				  actual_cpu = intel_cpu_dev;    break;
 	case X86_VENDOR_AMD:	  actual_cpu = amd_cpu_dev;      break;
 	case X86_VENDOR_CENTAUR:  actual_cpu = centaur_cpu_dev;  break;
 	case X86_VENDOR_SHANGHAI: actual_cpu = shanghai_cpu_dev; break;
diff --git a/xen/arch/x86/cpu/cpu.h b/xen/arch/x86/cpu/cpu.h
index 85a67771f7..bbde5e528a 100644
--- a/xen/arch/x86/cpu/cpu.h
+++ b/xen/arch/x86/cpu/cpu.h
@@ -24,3 +24,5 @@ void amd_init_lfence(struct cpuinfo_x86 *c);
 void amd_init_ssbd(const struct cpuinfo_x86 *c);
 void amd_init_spectral_chicken(void);
 void detect_zen2_null_seg_behaviour(void);
+
+void intel_unlock_cpuid_leaves(struct cpuinfo_x86 *c);
diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c
index 2d439e0bd2..490f7ff6f1 100644
--- a/xen/arch/x86/cpu/intel.c
+++ b/xen/arch/x86/cpu/intel.c
@@ -293,15 +293,11 @@ static void __init noinline intel_init_levelling(void)
 		ctxt_switch_masking = intel_ctxt_switch_masking;
 }
 
-static void cf_check early_init_intel(struct cpuinfo_x86 *c)
+/* Unmask CPUID levels (and NX) if masked. */
+void intel_unlock_cpuid_leaves(struct cpuinfo_x86 *c)
 {
-	u64 misc_enable, disable;
-
-	/* Netburst reports 64 bytes clflush size, but does IO in 128 bytes */
-	if (c->x86 == 15 && c->x86_cache_alignment == 64)
-		c->x86_cache_alignment = 128;
+	uint64_t misc_enable, disable;
 
-	/* Unmask CPUID levels and NX if masked: */
 	rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
 
 	disable = misc_enable & (MSR_IA32_MISC_ENABLE_LIMIT_CPUID |
@@ -309,17 +305,26 @@ static void cf_check early_init_intel(struct cpuinfo_x86 *c)
 	if (disable) {
 		wrmsrl(MSR_IA32_MISC_ENABLE, misc_enable & ~disable);
 		bootsym(trampoline_misc_enable_off) |= disable;
-		bootsym(trampoline_efer) |= EFER_NXE;
 	}
-
-	if (disable & MSR_IA32_MISC_ENABLE_LIMIT_CPUID)
-		printk(KERN_INFO "revised cpuid level: %d\n",
-		       cpuid_eax(0));
+	if (disable & MSR_IA32_MISC_ENABLE_LIMIT_CPUID) {
+		c->cpuid_level = cpuid_eax(0);
+		printk(KERN_INFO "revised cpuid level: %u\n", c->cpuid_level);
+	}
 	if (disable & MSR_IA32_MISC_ENABLE_XD_DISABLE) {
+		bootsym(trampoline_efer) |= EFER_NXE;
 		write_efer(read_efer() | EFER_NXE);
 		printk(KERN_INFO
 		       "re-enabled NX (Execute Disable) protection\n");
 	}
+}
+
+static void cf_check early_init_intel(struct cpuinfo_x86 *c)
+{
+	/* Netburst reports 64 bytes clflush size, but does IO in 128 bytes */
+	if (c->x86 == 15 && c->x86_cache_alignment == 64)
+		c->x86_cache_alignment = 128;
+
+	intel_unlock_cpuid_leaves(c);
 
 	/* CPUID workaround for Intel 0F33/0F34 CPU */
 	if (boot_cpu_data.x86 == 0xF && boot_cpu_data.x86_model == 3 &&
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.17] x86/irq: deal with old_cpu_mask for interrupts in movement in fixup_irqs()
Message-Id: <E1sMc9y-0001by-Vf@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 23:34:42 +0000

commit a1c62c2ca689a90684fef36a108e7e71b951b7d5
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 26 14:11:33 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:11:33 2024 +0200

    x86/irq: deal with old_cpu_mask for interrupts in movement in fixup_irqs()
    
    Given the current logic it's possible for ->arch.old_cpu_mask to get out of
    sync: if a CPU set in old_cpu_mask is offlined and then onlined
    again without old_cpu_mask having been updated the data in the mask will no
    longer be accurate, as when brought back online the CPU will no longer have
    old_vector configured to handle the old interrupt source.
    
    If there's an interrupt movement in progress, and the to be offlined CPU (which
    is the call context) is in the old_cpu_mask, clear it and update the mask, so
    it doesn't contain stale data.
    
    Note that when the system is going down fixup_irqs() will be called by
    smp_send_stop() from CPU 0 with a mask with only CPU 0 on it, effectively
    asking to move all interrupts to the current caller (CPU 0) which is the only
    CPU to remain online.  In that case we don't care to migrate interrupts that
    are in the process of being moved, as it's likely we won't be able to move all
    interrupts to CPU 0 due to vector shortage anyway.
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 817d1cd627be668c358d038f0fadbf7d24d417d3
    master date: 2024-06-18 15:14:49 +0200
---
 xen/arch/x86/irq.c | 29 ++++++++++++++++++++++++++++-
 1 file changed, 28 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index 2eac2de0b4..b1387cf6c9 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2539,7 +2539,7 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
     for ( irq = 0; irq < nr_irqs; irq++ )
     {
         bool break_affinity = false, set_affinity = true;
-        unsigned int vector;
+        unsigned int vector, cpu = smp_processor_id();
         cpumask_t *affinity = this_cpu(scratch_cpumask);
 
         if ( irq == 2 )
@@ -2582,6 +2582,33 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
                                affinity);
         }
 
+        if ( desc->arch.move_in_progress &&
+             /*
+              * Only attempt to adjust the mask if the current CPU is going
+              * offline, otherwise the whole system is going down and leaving
+              * stale data in the masks is fine.
+              */
+             !cpu_online(cpu) &&
+             cpumask_test_cpu(cpu, desc->arch.old_cpu_mask) )
+        {
+            /*
+             * This CPU is going offline, remove it from ->arch.old_cpu_mask
+             * and possibly release the old vector if the old mask becomes
+             * empty.
+             *
+             * Note cleaning ->arch.old_cpu_mask is required if the CPU is
+             * brought offline and then online again, as when re-onlined the
+             * per-cpu vector table will no longer have ->arch.old_vector
+             * setup, and hence ->arch.old_cpu_mask would be stale.
+             */
+            cpumask_clear_cpu(cpu, desc->arch.old_cpu_mask);
+            if ( cpumask_empty(desc->arch.old_cpu_mask) )
+            {
+                desc->arch.move_in_progress = 0;
+                release_old_vec(desc);
+            }
+        }
+
         /*
          * Avoid shuffling the interrupt around as long as current target CPUs
          * are a subset of the input mask.  What fixup_irqs() cares about is
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.17] x86/irq: handle moving interrupts in _assign_irq_vector()
Message-Id: <E1sMcA9-0001cw-2O@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 23:34:53 +0000

commit 7d3fee8d8e78c3c2c25af995b9c5d1c22d98d54c
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 26 14:12:05 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:12:05 2024 +0200

    x86/irq: handle moving interrupts in _assign_irq_vector()
    
    Currently there's logic in fixup_irqs() that attempts to prevent
    _assign_irq_vector() from failing, as fixup_irqs() is required to evacuate all
    interrupts from the CPUs not present in the input mask.  The current logic in
    fixup_irqs() is incomplete, as it doesn't deal with interrupts that have
    move_cleanup_count > 0 and a non-empty ->arch.old_cpu_mask field.
    
    Instead of attempting to fixup the interrupt descriptor in fixup_irqs() so that
    _assign_irq_vector() cannot fail, introduce logic in _assign_irq_vector()
    to deal with interrupts that have either move_{in_progress,cleanup_count} set
    and no remaining online CPUs in ->arch.cpu_mask.
    
    If _assign_irq_vector() is requested to move an interrupt in the state
    described above, first attempt to see if ->arch.old_cpu_mask contains any valid
    CPUs that could be used as fallback, and if that's the case do move the
    interrupt back to the previous destination.  Note this is easier because the
    vector hasn't been released yet, so there's no need to allocate and setup a new
    vector on the destination.
    
    Due to the logic in fixup_irqs() that clears offline CPUs from
    ->arch.old_cpu_mask (and releases the old vector if the mask becomes empty) it
    shouldn't be possible to get into _assign_irq_vector() with
    ->arch.move_{in_progress,cleanup_count} set but no online CPUs in
    ->arch.old_cpu_mask.
    
    However if ->arch.move_{in_progress,cleanup_count} is set and the interrupt has
    also changed affinity, it's possible the members of ->arch.old_cpu_mask are no
    longer part of the affinity set, move the interrupt to a different CPU part of
    the provided mask and keep the current ->arch.old_{cpu_mask,vector} for the
    pending interrupt movement to be completed.
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 369558924a642bbb0cb731e9a3375958867cb17b
    master date: 2024-06-18 15:15:10 +0200
---
 xen/arch/x86/irq.c | 97 ++++++++++++++++++++++++++++++++++++++----------------
 1 file changed, 68 insertions(+), 29 deletions(-)

diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index b1387cf6c9..0b4d4b44a5 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -553,7 +553,58 @@ static int _assign_irq_vector(struct irq_desc *desc, const cpumask_t *mask)
     }
 
     if ( desc->arch.move_in_progress || desc->arch.move_cleanup_count )
-        return -EAGAIN;
+    {
+        /*
+         * If the current destination is online refuse to shuffle.  Retry after
+         * the in-progress movement has finished.
+         */
+        if ( cpumask_intersects(desc->arch.cpu_mask, &cpu_online_map) )
+            return -EAGAIN;
+
+        /*
+         * Due to the logic in fixup_irqs() that clears offlined CPUs from
+         * ->arch.old_cpu_mask it shouldn't be possible to get here with
+         * ->arch.move_{in_progress,cleanup_count} set and no online CPUs in
+         * ->arch.old_cpu_mask.
+         */
+        ASSERT(valid_irq_vector(desc->arch.old_vector));
+        ASSERT(cpumask_intersects(desc->arch.old_cpu_mask, &cpu_online_map));
+
+        if ( cpumask_intersects(desc->arch.old_cpu_mask, mask) )
+        {
+            /*
+             * Fallback to the old destination if moving is in progress and the
+             * current destination is to be offlined.  This is only possible if
+             * the CPUs in old_cpu_mask intersect with the affinity mask passed
+             * in the 'mask' parameter.
+             */
+            desc->arch.vector = desc->arch.old_vector;
+            cpumask_and(desc->arch.cpu_mask, desc->arch.old_cpu_mask, mask);
+
+            /* Undo any possibly done cleanup. */
+            for_each_cpu(cpu, desc->arch.cpu_mask)
+                per_cpu(vector_irq, cpu)[desc->arch.vector] = irq;
+
+            /* Cancel the pending move and release the current vector. */
+            desc->arch.old_vector = IRQ_VECTOR_UNASSIGNED;
+            cpumask_clear(desc->arch.old_cpu_mask);
+            desc->arch.move_in_progress = 0;
+            desc->arch.move_cleanup_count = 0;
+            if ( desc->arch.used_vectors )
+            {
+                ASSERT(test_bit(old_vector, desc->arch.used_vectors));
+                clear_bit(old_vector, desc->arch.used_vectors);
+            }
+
+            return 0;
+        }
+
+        /*
+         * There's an interrupt movement in progress but the destination(s) in
+         * ->arch.old_cpu_mask are not suitable given the 'mask' parameter, go
+         * through the full logic to find a new vector in a suitable CPU.
+         */
+    }
 
     err = -ENOSPC;
 
@@ -609,7 +660,22 @@ next:
         current_vector = vector;
         current_offset = offset;
 
-        if ( valid_irq_vector(old_vector) )
+        if ( desc->arch.move_in_progress || desc->arch.move_cleanup_count )
+        {
+            ASSERT(!cpumask_intersects(desc->arch.cpu_mask, &cpu_online_map));
+            /*
+             * Special case when evacuating an interrupt from a CPU to be
+             * offlined and the interrupt was already in the process of being
+             * moved.  Leave ->arch.old_{vector,cpu_mask} as-is and just
+             * replace ->arch.{cpu_mask,vector} with the new destination.
+             * Cleanup will be done normally for the old fields, just release
+             * the current vector here.
+             */
+            if ( desc->arch.used_vectors &&
+                 !test_and_clear_bit(old_vector, desc->arch.used_vectors) )
+                ASSERT_UNREACHABLE();
+        }
+        else if ( valid_irq_vector(old_vector) )
         {
             cpumask_and(desc->arch.old_cpu_mask, desc->arch.cpu_mask,
                         &cpu_online_map);
@@ -2620,33 +2686,6 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
             continue;
         }
 
-        /*
-         * In order for the affinity adjustment below to be successful, we
-         * need _assign_irq_vector() to succeed. This in particular means
-         * clearing desc->arch.move_in_progress if this would otherwise
-         * prevent the function from succeeding. Since there's no way for the
-         * flag to get cleared anymore when there's no possible destination
-         * left (the only possibility then would be the IRQs enabled window
-         * after this loop), there's then also no race with us doing it here.
-         *
-         * Therefore the logic here and there need to remain in sync.
-         */
-        if ( desc->arch.move_in_progress &&
-             !cpumask_intersects(mask, desc->arch.cpu_mask) )
-        {
-            unsigned int cpu;
-
-            cpumask_and(affinity, desc->arch.old_cpu_mask, &cpu_online_map);
-
-            spin_lock(&vector_lock);
-            for_each_cpu(cpu, affinity)
-                per_cpu(vector_irq, cpu)[desc->arch.old_vector] = ~irq;
-            spin_unlock(&vector_lock);
-
-            release_old_vec(desc);
-            desc->arch.move_in_progress = 0;
-        }
-
         if ( !cpumask_intersects(mask, desc->affinity) )
         {
             break_affinity = true;
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.17] xen/ubsan: Fix UB in type_descriptor declaration
Message-Id: <E1sMcAJ-0001e6-5H@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 23:35:03 +0000

commit 9dfe294cb6de52c34f1419394fde1fe2b6c2a70b
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed Jun 26 14:12:38 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:12:38 2024 +0200

    xen/ubsan: Fix UB in type_descriptor declaration
    
    struct type_descriptor is arranged with a NUL terminated string following the
    kind/info fields.
    
    The only reason this doesn't trip UBSAN detection itself (on more modern
    compilers at least) is because struct type_descriptor is only referenced in
    suppressed regions.
    
    Switch the declaration to be a real flexible member.  No functional change.
    
    Fixes: 00fcf4dd8eb4 ("xen/ubsan: Import ubsan implementation from Linux 4.13")
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: bd59af99700f075d06a6d47a16f777c9519928e0
    master date: 2024-06-18 14:55:04 +0100
---
 xen/common/ubsan/ubsan.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/common/ubsan/ubsan.h b/xen/common/ubsan/ubsan.h
index a3159040fe..3db42e75b1 100644
--- a/xen/common/ubsan/ubsan.h
+++ b/xen/common/ubsan/ubsan.h
@@ -10,7 +10,7 @@ enum {
 struct type_descriptor {
 	u16 type_kind;
 	u16 type_info;
-	char type_name[1];
+	char type_name[];
 };
 
 struct source_location {
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.17] x86/xstate: Fix initialisation of XSS cache
Message-Id: <E1sMcAT-0001ez-8F@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 23:35:13 +0000

commit 80fe1fe2fe559a7e80fb2258f968beaa11656959
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed Jun 26 14:13:17 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:13:17 2024 +0200

    x86/xstate: Fix initialisation of XSS cache
    
    The clobbering of this_cpu(xcr0) and this_cpu(xss) to architecturally invalid
    values is to force the subsequent set_xcr0() and set_msr_xss() to reload the
    hardware register.
    
    While XCR0 is reloaded in xstate_init(), MSR_XSS isn't.  This causes
    get_msr_xss() to return the invalid value, and logic of the form:
    
        old = get_msr_xss();
        set_msr_xss(new);
        ...
        set_msr_xss(old);
    
    to try and restore said invalid value.
    
    The architecturally invalid value must be purged from the cache, meaning the
    hardware register must be written at least once.  This in turn highlights that
    the invalid value must only be used in the case that the hardware register is
    available.
    
    Fixes: f7f4a523927f ("x86/xstate: reset cached register values on resume")
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 9e6dbbe8bf400aacb99009ddffa91d2a0c312b39
    master date: 2024-06-19 13:00:06 +0100
---
 xen/arch/x86/xstate.c | 18 +++++++++++-------
 1 file changed, 11 insertions(+), 7 deletions(-)

diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c
index cea3d0b81f..8a636c6e80 100644
--- a/xen/arch/x86/xstate.c
+++ b/xen/arch/x86/xstate.c
@@ -642,13 +642,6 @@ void xstate_init(struct cpuinfo_x86 *c)
         return;
     }
 
-    /*
-     * Zap the cached values to make set_xcr0() and set_msr_xss() really
-     * write it.
-     */
-    this_cpu(xcr0) = 0;
-    this_cpu(xss) = ~0;
-
     cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
     feature_mask = (((u64)edx << 32) | eax) & XCNTXT_MASK;
     BUG_ON(!valid_xcr0(feature_mask));
@@ -658,8 +651,19 @@ void xstate_init(struct cpuinfo_x86 *c)
      * Set CR4_OSXSAVE and run "cpuid" to get xsave_cntxt_size.
      */
     set_in_cr4(X86_CR4_OSXSAVE);
+
+    /*
+     * Zap the cached values to make set_xcr0() and set_msr_xss() really write
+     * the hardware register.
+     */
+    this_cpu(xcr0) = 0;
     if ( !set_xcr0(feature_mask) )
         BUG();
+    if ( cpu_has_xsaves )
+    {
+        this_cpu(xss) = ~0;
+        set_msr_xss(0);
+    }
 
     if ( bsp )
     {
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.17] x86/cpuid: Fix handling of XSAVE dynamic leaves
Message-Id: <E1sMcAd-0001gA-B3@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 23:35:23 +0000

commit 02f94eab2183202180689eb85a2408d21dbe5505
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed Jun 26 14:13:37 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:13:37 2024 +0200

    x86/cpuid: Fix handling of XSAVE dynamic leaves
    
    [ This is a minimal backport of commit 71cacfb035f4 ("x86/cpuid: Fix handling
      of XSAVE dynamic leaves") to fix the bugs without depending on the large
      rework of XSTATE handling in Xen 4.19 ]
    
    First, if XSAVE is available in hardware but not visible to the guest, the
    dynamic leaves shouldn't be filled in.
    
    Second, the comment concerning XSS state is wrong.  VT-x doesn't manage
    host/guest state automatically, but there is provision for "host only" bits to
    be set, so the implications are still accurate.
    
    In Xen 4.18, no XSS states are supported, so it's safe to keep deferring to
    real hardware.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 71cacfb035f4a78ee10970dc38a3baa04d387451
    master date: 2024-06-19 13:00:06 +0100
---
 xen/arch/x86/cpuid.c | 30 +++++++++++++-----------------
 1 file changed, 13 insertions(+), 17 deletions(-)

diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c
index f311372cdf..ead6dde3f2 100644
--- a/xen/arch/x86/cpuid.c
+++ b/xen/arch/x86/cpuid.c
@@ -330,24 +330,20 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf,
     case XSTATE_CPUID:
         switch ( subleaf )
         {
-        case 1:
-            if ( p->xstate.xsavec || p->xstate.xsaves )
-            {
-                /*
-                 * TODO: Figure out what to do for XSS state.  VT-x manages
-                 * host vs guest MSR_XSS automatically, so as soon as we start
-                 * supporting any XSS states, the wrong XSS will be in
-                 * context.
-                 */
-                BUILD_BUG_ON(XSTATE_XSAVES_ONLY != 0);
-
-                /*
-                 * Read CPUID[0xD,0/1].EBX from hardware.  They vary with
-                 * enabled XSTATE, and appropraite XCR0|XSS are in context.
-                 */
+            /*
+             * Read CPUID[0xd,0/1].EBX from hardware.  They vary with enabled
+             * XSTATE, and the appropriate XCR0 is in context.
+             */
         case 0:
-                res->b = cpuid_count_ebx(leaf, subleaf);
-            }
+            if ( p->basic.xsave )
+                res->b = cpuid_count_ebx(0xd, 0);
+            break;
+
+        case 1:
+            /* This only works because Xen doesn't support XSS states yet. */
+            BUILD_BUG_ON(XSTATE_XSAVES_ONLY != 0);
+            if ( p->xstate.xsavec )
+                res->b = cpuid_count_ebx(0xd, 1);
             break;
         }
         break;
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.17] x86/irq: forward pending interrupts to new destination in fixup_irqs()
Message-Id: <E1sMcAn-0001hI-E8@xenbits.xenproject.org>
Date: Wed, 26 Jun 2024 23:35:33 +0000

commit 87a49d2ec6fe2881e4b0947ea3e0e0f041dc6be3
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Wed Jun 26 14:14:01 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 14:14:01 2024 +0200

    x86/irq: forward pending interrupts to new destination in fixup_irqs()
    
    fixup_irqs() is used to evacuate interrupts from to be offlined CPUs.  Given
    the CPU is to become offline, the normal migration logic used by Xen where the
    vector in the previous target(s) is left configured until the interrupt is
    received on the new destination is not suitable.
    
    Instead attempt to do as much as possible in order to prevent loosing
    interrupts.  If fixup_irqs() is called from the CPU to be offlined (as is
    currently the case for CPU hot unplug) attempt to forward pending vectors when
    interrupts that target the current CPU are migrated to a different destination.
    
    Additionally, for interrupts that have already been moved from the current CPU
    prior to the call to fixup_irqs() but that haven't been delivered to the new
    destination (iow: interrupts with move_in_progress set and the current CPU set
    in ->arch.old_cpu_mask) also check whether the previous vector is pending and
    forward it to the new destination.
    
    This allows us to remove the window with interrupts enabled at the bottom of
    fixup_irqs().  Such window wasn't safe anyway: references to the CPU to become
    offline are removed from interrupts masks, but the per-CPU vector_irq[] array
    is not updated to reflect those changes (as the CPU is going offline anyway).
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: e2bb28d621584fce15c907002ddc7c6772644b64
    master date: 2024-06-20 12:09:32 +0200
---
 xen/arch/x86/include/asm/apic.h |  5 +++++
 xen/arch/x86/irq.c              | 46 +++++++++++++++++++++++++++++++++++------
 2 files changed, 45 insertions(+), 6 deletions(-)

diff --git a/xen/arch/x86/include/asm/apic.h b/xen/arch/x86/include/asm/apic.h
index 7625c0ecd6..ad8d7cc054 100644
--- a/xen/arch/x86/include/asm/apic.h
+++ b/xen/arch/x86/include/asm/apic.h
@@ -145,6 +145,11 @@ static __inline bool_t apic_isr_read(u8 vector)
             (vector & 0x1f)) & 1;
 }
 
+static inline bool apic_irr_read(unsigned int vector)
+{
+    return apic_read(APIC_IRR + (vector / 32 * 0x10)) & (1U << (vector % 32));
+}
+
 static __inline u32 get_apic_id(void) /* Get the physical APIC id */
 {
     u32 id = apic_read(APIC_ID);
diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index 0b4d4b44a5..11b2a213aa 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2604,7 +2604,7 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
 
     for ( irq = 0; irq < nr_irqs; irq++ )
     {
-        bool break_affinity = false, set_affinity = true;
+        bool break_affinity = false, set_affinity = true, check_irr = false;
         unsigned int vector, cpu = smp_processor_id();
         cpumask_t *affinity = this_cpu(scratch_cpumask);
 
@@ -2657,6 +2657,25 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
              !cpu_online(cpu) &&
              cpumask_test_cpu(cpu, desc->arch.old_cpu_mask) )
         {
+            /*
+             * This to be offlined CPU was the target of an interrupt that's
+             * been moved, and the new destination target hasn't yet
+             * acknowledged any interrupt from it.
+             *
+             * We know the interrupt is configured to target the new CPU at
+             * this point, so we can check IRR for any pending vectors and
+             * forward them to the new destination.
+             *
+             * Note that for the other case of an interrupt movement being in
+             * progress (move_cleanup_count being non-zero) we know the new
+             * destination has already acked at least one interrupt from this
+             * source, and hence there's no need to forward any stale
+             * interrupts.
+             */
+            if ( apic_irr_read(desc->arch.old_vector) )
+                send_IPI_mask(cpumask_of(cpumask_any(desc->arch.cpu_mask)),
+                              desc->arch.vector);
+
             /*
              * This CPU is going offline, remove it from ->arch.old_cpu_mask
              * and possibly release the old vector if the old mask becomes
@@ -2697,6 +2716,14 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
         if ( desc->handler->disable )
             desc->handler->disable(desc);
 
+        /*
+         * If the current CPU is going offline and is (one of) the target(s) of
+         * the interrupt, signal to check whether there are any pending vectors
+         * to be handled in the local APIC after the interrupt has been moved.
+         */
+        if ( !cpu_online(cpu) && cpumask_test_cpu(cpu, desc->arch.cpu_mask) )
+            check_irr = true;
+
         if ( desc->handler->set_affinity )
             desc->handler->set_affinity(desc, affinity);
         else if ( !(warned++) )
@@ -2707,6 +2734,18 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
 
         cpumask_copy(affinity, desc->affinity);
 
+        if ( check_irr && apic_irr_read(vector) )
+            /*
+             * Forward pending interrupt to the new destination, this CPU is
+             * going offline and otherwise the interrupt would be lost.
+             *
+             * Do the IRR check as late as possible before releasing the irq
+             * desc in order for any in-flight interrupts to be delivered to
+             * the lapic.
+             */
+            send_IPI_mask(cpumask_of(cpumask_any(desc->arch.cpu_mask)),
+                          desc->arch.vector);
+
         spin_unlock(&desc->lock);
 
         if ( !verbose )
@@ -2718,11 +2757,6 @@ void fixup_irqs(const cpumask_t *mask, bool verbose)
             printk("Broke affinity for IRQ%u, new: %*pb\n",
                    irq, CPUMASK_PR(affinity));
     }
-
-    /* That doesn't seem sufficient.  Give it 1ms. */
-    local_irq_enable();
-    mdelay(1);
-    local_irq_disable();
 }
 
 void fixup_eoi(void)
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.17


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] Config.mk: update MiniOS commit
Message-Id: <E1sMg3F-0007Ls-TO@xenbits.xenproject.org>
Date: Thu, 27 Jun 2024 03:44:01 +0000

commit 4712e3b3769e6c03e0aaaa8179395f0fb7b141cc
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 26 12:49:08 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 26 12:49:08 2024 +0200

    Config.mk: update MiniOS commit
    
    Pull in the gcc14 build fix there.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 Config.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Config.mk b/Config.mk
index a962f095ca..1a3938b6c4 100644
--- a/Config.mk
+++ b/Config.mk
@@ -224,7 +224,7 @@ QEMU_UPSTREAM_URL ?= https://xenbits.xen.org/git-http/qemu-xen.git
 QEMU_UPSTREAM_REVISION ?= master
 
 MINIOS_UPSTREAM_URL ?= https://xenbits.xen.org/git-http/mini-os.git
-MINIOS_UPSTREAM_REVISION ?= b6a5b4d72b88e5c4faed01f5a44505de022860fc
+MINIOS_UPSTREAM_REVISION ?= 8b038c7411ae7e823eaf6d15d5efbe037a07197a
 
 SEABIOS_UPSTREAM_URL ?= https://xenbits.xen.org/git-http/seabios.git
 SEABIOS_UPSTREAM_REVISION ?= rel-1.16.3
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] automation/eclair: address violations of MISRA C Rule 20.7
Message-Id: <E1sMniS-0002Qc-0x@xenbits.xenproject.org>
Date: Thu, 27 Jun 2024 11:55:04 +0000

commit 0dca0f2b9a7e05a4f3b982e260352e405eb405f8
Author:     Nicola Vetrini <nicola.vetrini@bugseng.com>
AuthorDate: Thu Jun 27 13:45:18 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 27 13:45:18 2024 +0200

    automation/eclair: address violations of MISRA C Rule 20.7
    
    MISRA C Rule 20.7 states: "Expressions resulting from the expansion
    of macro parameters shall be enclosed in parentheses".
    
    The helper macro bitmap_switch has parameters that cannot be parenthesized
    in order to comply with the rule, as that would break its functionality.
    Moreover, the risk of misuse due developer confusion is deemed not
    substantial enough to warrant a more involved refactor, thus the macro
    is deviated for this rule.
    
    No functional change.
    
    Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 docs/misra/safe.json     | 8 ++++++++
 xen/include/xen/bitmap.h | 3 +++
 2 files changed, 11 insertions(+)

diff --git a/docs/misra/safe.json b/docs/misra/safe.json
index c213e0a0be..3f18ef401c 100644
--- a/docs/misra/safe.json
+++ b/docs/misra/safe.json
@@ -60,6 +60,14 @@
         },
         {
             "id": "SAF-7-safe",
+            "analyser": {
+                "eclair": "MC3R1.R20.7"
+            },
+            "name": "MC3R1.R20.7: deliberately non-parenthesized macro argument",
+            "text": "A macro parameter expands to an expression that is non-parenthesized, as doing so would break the functionality."
+        },
+        {
+            "id": "SAF-8-safe",
             "analyser": {},
             "name": "Sentinel",
             "text": "Next ID to be used"
diff --git a/xen/include/xen/bitmap.h b/xen/include/xen/bitmap.h
index b9f980e919..6ee39aa35a 100644
--- a/xen/include/xen/bitmap.h
+++ b/xen/include/xen/bitmap.h
@@ -103,10 +103,13 @@ extern int bitmap_allocate_region(unsigned long *bitmap, int pos, int order);
 #define bitmap_switch(nbits, zero, small, large)			  \
 	unsigned int n__ = (nbits);					  \
 	if (__builtin_constant_p(nbits) && !n__) {			  \
+		/* SAF-7-safe Rule 20.7 non-parenthesized macro argument */ \
 		zero;							  \
 	} else if (__builtin_constant_p(nbits) && n__ <= BITS_PER_LONG) { \
+		/* SAF-7-safe Rule 20.7 non-parenthesized macro argument */ \
 		small;							  \
 	} else {							  \
+		/* SAF-7-safe Rule 20.7 non-parenthesized macro argument */ \
 		large;							  \
 	}
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/self-tests: address violations of MISRA rule 20.7
Message-Id: <E1sMnic-0002RI-4D@xenbits.xenproject.org>
Date: Thu, 27 Jun 2024 11:55:14 +0000

commit 4929fea7bd7322da2ede70f2ea53c3696c83032e
Author:     Nicola Vetrini <nicola.vetrini@bugseng.com>
AuthorDate: Thu Jun 27 13:46:02 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 27 13:46:02 2024 +0200

    xen/self-tests: address violations of MISRA rule 20.7
    
    MISRA C Rule 20.7 states: "Expressions resulting from the expansion
    of macro parameters shall be enclosed in parentheses". Therefore, some
    macro definitions should gain additional parentheses to ensure that all
    current and future users will be safe with respect to expansions that
    can possibly alter the semantics of the passed-in macro parameter.
    
    No functional change.
    
    Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/include/xen/self-tests.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/xen/include/xen/self-tests.h b/xen/include/xen/self-tests.h
index 42a4cc4d17..58484fe5a8 100644
--- a/xen/include/xen/self-tests.h
+++ b/xen/include/xen/self-tests.h
@@ -19,11 +19,11 @@
 #if !defined(CONFIG_CC_IS_CLANG) || CONFIG_CLANG_VERSION >= 80000
 #define COMPILE_CHECK(fn, val, res)                                     \
     do {                                                                \
-        typeof(fn(val)) real = fn(val);                                 \
+        typeof((fn)(val)) real = (fn)(val);                             \
                                                                         \
         if ( !__builtin_constant_p(real) )                              \
             asm ( ".error \"'" STR(fn(val)) "' not compile-time constant\"" ); \
-        else if ( real != res )                                         \
+        else if ( real != (res) )                                       \
             asm ( ".error \"Compile time check '" STR(fn(val) == res) "' failed\"" ); \
     } while ( 0 )
 #else
@@ -37,9 +37,9 @@
  */
 #define RUNTIME_CHECK(fn, val, res)                     \
     do {                                                \
-        typeof(fn(val)) real = fn(HIDE(val));           \
+        typeof((fn)(val)) real = (fn)(HIDE(val));       \
                                                         \
-        if ( real != res )                              \
+        if ( real != (res) )                            \
             panic("%s: %s(%s) expected %u, got %u\n",   \
                   __func__, #fn, #val, real, res);      \
     } while ( 0 )
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/guest_access: address violations of MISRA rule 20.7
Message-Id: <E1sMnim-0002S7-7e@xenbits.xenproject.org>
Date: Thu, 27 Jun 2024 11:55:24 +0000

commit f39642c308af4e174c6e54a45a3e51db373435a2
Author:     Nicola Vetrini <nicola.vetrini@bugseng.com>
AuthorDate: Thu Jun 27 13:46:27 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 27 13:46:27 2024 +0200

    xen/guest_access: address violations of MISRA rule 20.7
    
    MISRA C Rule 20.7 states: "Expressions resulting from the expansion
    of macro parameters shall be enclosed in parentheses". Therefore, some
    macro definitions should gain additional parentheses to ensure that all
    current and future users will be safe with respect to expansions that
    can possibly alter the semantics of the passed-in macro parameter.
    
    No functional change.
    
    Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/include/xen/guest_access.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/xen/include/xen/guest_access.h b/xen/include/xen/guest_access.h
index a2146749e3..2e0971c487 100644
--- a/xen/include/xen/guest_access.h
+++ b/xen/include/xen/guest_access.h
@@ -51,9 +51,9 @@
     ((XEN_GUEST_HANDLE(type)) { &(hnd).p->fld })
 
 #define guest_handle_from_ptr(ptr, type)        \
-    ((XEN_GUEST_HANDLE_PARAM(type)) { (type *)ptr })
+    ((XEN_GUEST_HANDLE_PARAM(type)) { (type *)(ptr) })
 #define const_guest_handle_from_ptr(ptr, type)  \
-    ((XEN_GUEST_HANDLE_PARAM(const_##type)) { (const type *)ptr })
+    ((XEN_GUEST_HANDLE_PARAM(const_##type)) { (const type *)(ptr) })
 
 /*
  * Copy an array of objects to guest context via a guest handle,
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] automation/eclair_analysis: address violations of MISRA C Rule 20.7
Message-Id: <E1sMniw-0002TA-Ar@xenbits.xenproject.org>
Date: Thu, 27 Jun 2024 11:55:34 +0000

commit c7e195fac02b850696d24a462612462ade4fe97b
Author:     Nicola Vetrini <nicola.vetrini@bugseng.com>
AuthorDate: Thu Jun 27 13:46:57 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 27 13:46:57 2024 +0200

    automation/eclair_analysis: address violations of MISRA C Rule 20.7
    
    MISRA C Rule 20.7 states: "Expressions resulting from the expansion
    of macro parameters shall be enclosed in parentheses".
    
    The local helpers GRP2 and XADD in the x86 emulator use their first
    argument as the constant expression for a case label. This pattern
    is deviated project-wide, because it is very unlikely to induce
    developer confusion and result in the wrong control flow being
    carried out.
    
    No functional change.
    
    Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 automation/eclair_analysis/ECLAIR/deviations.ecl | 6 ++++--
 docs/misra/deviations.rst                        | 3 ++-
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl
index dcff4f4013..d12be858fe 100644
--- a/automation/eclair_analysis/ECLAIR/deviations.ecl
+++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
@@ -458,13 +458,15 @@ unexpected result when the structure is given as argument to a sizeof() operator
 
 -doc_begin="Code violating Rule 20.7 is safe when macro parameters are used: (1)
 as function arguments; (2) as macro arguments; (3) as array indices; (4) as lhs
-in assignments; (5) as initializers, possibly designated, in initalizer lists."
+in assignments; (5) as initializers, possibly designated, in initalizer lists;
+(6) as the constant expression in a switch clause label."
 -config=MC3R1.R20.7,expansion_context=
 {safe, "context(__call_expr_arg_contexts)"},
 {safe, "left_right(^[(,\\[]$,^[),\\]]$)"},
 {safe, "context(skip_to(__expr_non_syntactic_contexts, stmt_child(node(array_subscript_expr), subscript)))"},
 {safe, "context(skip_to(__expr_non_syntactic_contexts, stmt_child(operator(assign), lhs)))"},
-{safe, "context(skip_to(__expr_non_syntactic_contexts, stmt_child(node(init_list_expr||designated_init_expr), init)))"}
+{safe, "context(skip_to(__expr_non_syntactic_contexts, stmt_child(node(init_list_expr||designated_init_expr), init)))"},
+{safe, "context(skip_to(__expr_non_syntactic_contexts, stmt_child(node(case_stmt), lower||upper)))"}
 -doc_end
 
 -doc_begin="Violations involving the __config_enabled macros cannot be fixed without
diff --git a/docs/misra/deviations.rst b/docs/misra/deviations.rst
index c6a2affc6a..7be2322123 100644
--- a/docs/misra/deviations.rst
+++ b/docs/misra/deviations.rst
@@ -416,7 +416,8 @@ Deviations related to MISRA C:2012 Rules:
        (2) as macro arguments;
        (3) as array indices;
        (4) as lhs in assignments;
-       (5) as initializers, possibly designated, in initalizer lists.
+       (5) as initializers, possibly designated, in initalizer lists;
+       (6) as constant expressions of switch case labels.
      - Tagged as `safe` for ECLAIR.
 
    * - R20.7
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/irq: address violations of MISRA C Rule 20.7
Message-Id: <E1sMnj6-0002U2-Dx@xenbits.xenproject.org>
Date: Thu, 27 Jun 2024 11:55:44 +0000

commit 8f5581d7e1f37f38c3c92c01611e9f19b38e4881
Author:     Nicola Vetrini <nicola.vetrini@bugseng.com>
AuthorDate: Thu Jun 27 13:47:16 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 27 13:47:16 2024 +0200

    x86/irq: address violations of MISRA C Rule 20.7
    
    MISRA C Rule 20.7 states: "Expressions resulting from the expansion
    of macro parameters shall be enclosed in parentheses". Therefore, some
    macro definitions should gain additional parentheses to ensure that all
    current and future users will be safe with respect to expansions that
    can possibly alter the semantics of the passed-in macro parameter.
    
    No functional change.
    
    Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/include/xen/irq.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/include/xen/irq.h b/xen/include/xen/irq.h
index 580ae37e74..17211f3399 100644
--- a/xen/include/xen/irq.h
+++ b/xen/include/xen/irq.h
@@ -178,7 +178,7 @@ extern struct pirq *pirq_get_info(struct domain *d, int pirq);
 
 #define pirq_field(d, p, f, def) ({ \
     const struct pirq *__pi = pirq_info(d, p); \
-    __pi ? __pi->f : def; \
+    __pi ? __pi->f : (def); \
 })
 #define pirq_to_evtchn(d, pirq) pirq_field(d, pirq, evtchn, 0)
 #define pirq_masked(d, pirq) pirq_field(d, pirq, masked, 0)
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] automation/eclair_analysis: clean ECLAIR configuration scripts
Message-Id: <E1sMnjG-0002VF-HA@xenbits.xenproject.org>
Date: Thu, 27 Jun 2024 11:55:54 +0000

commit bfea273b7b1590554473b79fe7c0574ef36c642a
Author:     Nicola Vetrini <nicola.vetrini@bugseng.com>
AuthorDate: Thu Jun 27 13:47:56 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 27 13:47:56 2024 +0200

    automation/eclair_analysis: clean ECLAIR configuration scripts
    
    Remove from the ECLAIR integration scripts an unused option, which
    was already ignored, and make the help texts consistent
    with the rest of the scripts.
    
    No functional change.
    
    Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 automation/eclair_analysis/ECLAIR/analyze.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/automation/eclair_analysis/ECLAIR/analyze.sh b/automation/eclair_analysis/ECLAIR/analyze.sh
index 0ea5520c93..e96456c3c1 100755
--- a/automation/eclair_analysis/ECLAIR/analyze.sh
+++ b/automation/eclair_analysis/ECLAIR/analyze.sh
@@ -11,7 +11,7 @@ fatal() {
 }
 
 usage() {
-  fatal "Usage: ${script_name} <ARM64|X86_64> <Set0|Set1|Set2|Set3>"
+  fatal "Usage: ${script_name} <ARM64|X86_64> <accepted|monitored>"
 }
 
 if [[ $# -ne 2 ]]; then
@@ -40,7 +40,6 @@ ECLAIR_REPORT_LOG=${ECLAIR_OUTPUT_DIR}/REPORT.log
 if [[ "$1" = "X86_64" ]]; then
   export CROSS_COMPILE=
   export XEN_TARGET_ARCH=x86_64
-  EXTRA_ECLAIR_ENV_OPTIONS=-disable=MC3R1.R20.7
 elif [[ "$1" = "ARM64" ]]; then
   export CROSS_COMPILE=aarch64-linux-gnu-
   export XEN_TARGET_ARCH=arm64
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/traps: address violations of MISRA C Rule 20.7
Message-Id: <E1sMnjQ-0002Wp-K6@xenbits.xenproject.org>
Date: Thu, 27 Jun 2024 11:56:04 +0000

commit 402e473249cf62dd4c6b3b137aa845db0fe1453a
Author:     Nicola Vetrini <nicola.vetrini@bugseng.com>
AuthorDate: Thu Jun 27 13:48:08 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 27 13:48:08 2024 +0200

    x86/traps: address violations of MISRA C Rule 20.7
    
    MISRA C Rule 20.7 states: "Expressions resulting from the expansion
    of macro parameters shall be enclosed in parentheses". Therefore, some
    macro definitions should gain additional parentheses to ensure that all
    current and future users will be safe with respect to expansions that
    can possibly alter the semantics of the passed-in macro parameter.
    
    No functional change.
    
    Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Acked-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/traps.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index 9906e874d5..ee91fc56b1 100644
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -123,7 +123,7 @@ unsigned int __ro_after_init ler_msr;
 const unsigned int nmi_cpu;
 
 #define stack_words_per_line 4
-#define ESP_BEFORE_EXCEPTION(regs) ((unsigned long *)regs->rsp)
+#define ESP_BEFORE_EXCEPTION(regs) ((unsigned long *)(regs)->rsp)
 
 void show_code(const struct cpu_user_regs *regs)
 {
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] CHANGELOG.md: Fix indentation of "Removed" section
Message-Id: <E1sMojK-0000El-1b@xenbits.xenproject.org>
Date: Thu, 27 Jun 2024 13:00:02 +0000

commit 188e5f1a80b5d64c1f0f07d9878d2c1c0ee8310d
Author:     George Dunlap <george.dunlap@cloud.com>
AuthorDate: Mon Jun 24 09:43:04 2024 +0100
Commit:     George Dunlap <george.dunlap@cloud.com>
CommitDate: Wed Jun 26 14:19:29 2024 +0100

    CHANGELOG.md: Fix indentation of "Removed" section
    
    Signed-off-by: George Dunlap <george.dunlap@cloud.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 CHANGELOG.md | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index 1778419cae..f3c6c7954f 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -31,12 +31,12 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
  - libxl support for backendtype=tap with tapback.
 
 ### Removed
-- caml-stubdom.  It hasn't built since 2014, was pinned to Ocaml 4.02, and has
-  been superseded by the MirageOS/SOLO5 projects.
-- /usr/bin/pygrub symlink.  This was deprecated in Xen 4.2 (2012) but left for
-  compatibility reasons.  VMs configured with bootloader="/usr/bin/pygrub"
-  should be updated to just bootloader="pygrub".
-- The Xen gdbstub on x86.
+ - caml-stubdom.  It hasn't built since 2014, was pinned to Ocaml 4.02, and has
+   been superseded by the MirageOS/SOLO5 projects.
+ - /usr/bin/pygrub symlink.  This was deprecated in Xen 4.2 (2012) but left for
+   compatibility reasons.  VMs configured with bootloader="/usr/bin/pygrub"
+   should be updated to just bootloader="pygrub".
+ - The Xen gdbstub on x86.
 
 ## [4.18.0](https://xenbits.xenproject.org/gitweb/?p=xen.git;a=shortlog;h=RELEASE-4.18.0) - 2023-11-16
 
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] tools/xenalyze: Remove argp_program_bug_address
Message-Id: <E1sMojU-0000GZ-67@xenbits.xenproject.org>
Date: Thu, 27 Jun 2024 13:00:12 +0000

commit dde20e47afb51404d59be492ca924704f0fbf71d
Author:     George Dunlap <george.dunlap@cloud.com>
AuthorDate: Mon Jun 24 11:23:18 2024 +0100
Commit:     George Dunlap <george.dunlap@cloud.com>
CommitDate: Wed Jun 26 14:19:29 2024 +0100

    tools/xenalyze: Remove argp_program_bug_address
    
    xenalyze sets argp_program_bug_address to my old Citrix address.  This
    was done before xenalyze was in the xen.git tree; and it's the only
    program in the tree which does so.
    
    Now that xenalyze is part of the normal Xen distribution, it should be
    obvious where to report bugs.
    
    Signed-off-by: George Dunlap <george.dunlap@cloud.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 tools/xentrace/xenalyze.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/tools/xentrace/xenalyze.c b/tools/xentrace/xenalyze.c
index d95e52695f..adc96dd7e4 100644
--- a/tools/xentrace/xenalyze.c
+++ b/tools/xentrace/xenalyze.c
@@ -10920,9 +10920,6 @@ const struct argp parser_def = {
     .doc = "",
 };
 
-const char *argp_program_bug_address = "George Dunlap <george.dunlap@eu.citrix.com>";
-
-
 int main(int argc, char *argv[]) {
     /* Start with warn at stderr. */
     warn = stderr;
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] CHANGELOG: Add entries related to tracing
Message-Id: <E1sMoje-0000Hh-9B@xenbits.xenproject.org>
Date: Thu, 27 Jun 2024 13:00:22 +0000

commit ecadd22a3de8ce7f1799e85af6f1e37c06c57049
Author:     George Dunlap <george.dunlap@cloud.com>
AuthorDate: Mon Jun 24 09:31:52 2024 +0100
Commit:     George Dunlap <george.dunlap@cloud.com>
CommitDate: Wed Jun 26 16:02:26 2024 +0100

    CHANGELOG: Add entries related to tracing
    
    Signed-off-by: George Dunlap <george.dunlap@cloud.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 CHANGELOG.md | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index f3c6c7954f..35c3488f4b 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -21,6 +21,8 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
  - When building with Systemd support (./configure --enable-systemd), remove
    libsystemd as a build dependency.  Systemd Notify support is retained, now
    using a standalone library implementation.
+ - xenalyze no longer requires `--svm-mode` when analyzing traces
+   generated on AMD CPUs
 
 ### Added
  - On x86:
@@ -37,6 +39,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
    compatibility reasons.  VMs configured with bootloader="/usr/bin/pygrub"
    should be updated to just bootloader="pygrub".
  - The Xen gdbstub on x86.
+ - xentrace_format has been removed; use xenalyze instead.
 
 ## [4.18.0](https://xenbits.xenproject.org/gitweb/?p=xen.git;a=shortlog;h=RELEASE-4.18.0) - 2023-11-16
 
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] automation/eclair: add deviations agreed in MISRA meetings
Message-Id: <E1sMybv-0000ij-GB@xenbits.xenproject.org>
Date: Thu, 27 Jun 2024 23:33:03 +0000

commit 6d41f5b9e112e8934f59edfd7168a36706e0341a
Author:     Federico Serafini <federico.serafini@bugseng.com>
AuthorDate: Wed Jun 26 08:10:50 2024 +0200
Commit:     Stefano Stabellini <stefano.stabellini@amd.com>
CommitDate: Thu Jun 27 15:38:33 2024 -0700

    automation/eclair: add deviations agreed in MISRA meetings
    
    Update ECLAIR configuration to take into account the deviations
    agreed during the MISRA meetings.
    
    While doing this, remove the obsolete "Set [123]" comments.
    
    Signed-off-by: Federico Serafini <federico.serafini@bugseng.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 automation/eclair_analysis/ECLAIR/deviations.ecl | 93 +++++++++++++++++++++---
 docs/misra/deviations.rst                        | 81 +++++++++++++++++++--
 2 files changed, 158 insertions(+), 16 deletions(-)

diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl
index d12be858fe..0af1cb93d1 100644
--- a/automation/eclair_analysis/ECLAIR/deviations.ecl
+++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
@@ -1,5 +1,3 @@
-### Set 1 ###
-
 #
 # Series 2.
 #
@@ -23,6 +21,11 @@ Constant expressions and unreachable branches of if and switch statements are ex
 -config=MC3R1.R2.1,reports+={deliberate, "any_area(any_loc(any_exp(macro(name(ASSERT_UNREACHABLE||PARSE_ERR_RET||PARSE_ERR||FAIL_MSR||FAIL_CPUID)))))"}
 -doc_end
 
+-doc_begin="The asm-offset files are not linked deliberately, since they are used to generate definitions for asm modules."
+-file_tag+={asm_offsets, "^xen/arch/(arm|x86)/(arm32|arm64|x86_64)/asm-offsets\\.c$"}
+-config=MC3R1.R2.1,reports+={deliberate, "any_area(any_loc(file(asm_offsets)))"}
+-doc_end
+
 -doc_begin="Pure declarations (i.e., declarations without initialization) are
 not executable, and therefore it is safe for them to be unreachable."
 -config=MC3R1.R2.1,ignored_stmts+={"any()", "pure_decl()"}
@@ -63,6 +66,12 @@ they are not instances of commented-out code."
 -config=MC3R1.D4.3,reports+={disapplied,"!(any_area(any_loc(file(^xen/arch/arm/arm64/.*$))))"}
 -doc_end
 
+-doc_begin="The inline asm in 'arm64/lib/bitops.c' is tightly coupled with the surronding C code that acts as a wrapper, so it has been decided not to add an additional encapsulation layer."
+-file_tag+={arm64_bitops, "^xen/arch/arm/arm64/lib/bitops\\.c$"}
+-config=MC3R1.D4.3,reports+={deliberate, "all_area(any_loc(file(arm64_bitops)&&any_exp(macro(^(bit|test)op$))))"}
+-config=MC3R1.D4.3,reports+={deliberate, "any_area(any_loc(file(arm64_bitops))&&context(name(int_clear_mask16)))"}
+-doc_end
+
 -doc_begin="This header file is autogenerated or empty, therefore it poses no
 risk if included more than once."
 -file_tag+={empty_header, "^xen/arch/arm/efi/runtime\\.h$"}
@@ -213,10 +222,25 @@ Therefore the absence of prior declarations is safe."
 -config=MC3R1.R8.4,declarations+={safe, "loc(file(asm_defns))&&^current_stack_pointer$"}
 -doc_end
 
+-doc_begin="The function apei_(read|check|clear)_mce are dead code and are excluded from non-debug builds, therefore the absence of prior declarations is safe."
+-config=MC3R1.R8.4,declarations+={safe, "^apei_(read|check|clear)_mce\\(.*$"}
+-doc_end
+
 -doc_begin="asmlinkage is a marker to indicate that the function is only used to interface with asm modules."
 -config=MC3R1.R8.4,declarations+={safe,"loc(text(^(?s).*asmlinkage.*$, -1..0))"}
 -doc_end
 
+-doc_begin="Given that bsearch and sort are defined with the attribute 'gnu_inline', it's deliberate not to have a prior declaration.
+See Section \"6.33.1 Common Function Attributes\" of \"GCC_MANUAL\" for a full explanation of gnu_inline."
+-file_tag+={bsearch_sort, "^xen/include/xen/(sort|lib)\\.h$"}
+-config=MC3R1.R8.4,reports+={deliberate, "any_area(any_loc(file(bsearch_sort))&&decl(name(bsearch||sort)))"}
+-doc_end
+
+-doc_begin="first_valid_mfn is defined in this way because the current lack of NUMA support in Arm and PPC requires it."
+-file_tag+={first_valid_mfn, "^xen/common/page_alloc\\.c$"}
+-config=MC3R1.R8.4,declarations+={deliberate,"loc(file(first_valid_mfn))"}
+-doc_end
+
 -doc_begin="The following variables are compiled in multiple translation units
 belonging to different executables and therefore are safe."
 -config=MC3R1.R8.6,declarations+={safe, "name(current_stack_pointer||bsearch||sort)"}
@@ -257,8 +281,6 @@ dimension is higher than omitting the dimension."
 -config=MC3R1.R9.5,reports+={deliberate, "any()"}
 -doc_end
 
-### Set 2 ###
-
 #
 # Series 10.
 #
@@ -299,7 +321,6 @@ integers arguments on two's complement architectures
 -config=MC3R1.R10.1,reports+={safe, "any_area(any_loc(any_exp(macro(^ISOLATE_LSB$))))"}
 -doc_end
 
-### Set 3 ###
 -doc_begin="XEN only supports architectures where signed integers are
 representend using two's complement and all the XEN developers are aware of
 this."
@@ -323,6 +344,49 @@ constant expressions are required.\""
 # Series 11
 #
 
+-doc_begin="The conversion from a function pointer to unsigned long or (void *) does not lose any information, provided that the target type has enough bits to store it."
+-config=MC3R1.R11.1,casts+={safe,
+  "from(type(canonical(__function_pointer_types)))
+   &&to(type(canonical(builtin(unsigned long)||pointer(builtin(void)))))
+   &&relation(definitely_preserves_value)"
+}
+-doc_end
+
+-doc_begin="The conversion from a function pointer to a boolean has a well-known semantics that do not lead to unexpected behaviour."
+-config=MC3R1.R11.1,casts+={safe,
+  "from(type(canonical(__function_pointer_types)))
+   &&kind(pointer_to_boolean)"
+}
+-doc_end
+
+-doc_begin="The conversion from a pointer to an incomplete type to unsigned long does not lose any information, provided that the target type has enough bits to store it."
+-config=MC3R1.R11.2,casts+={safe,
+  "from(type(any()))
+   &&to(type(canonical(builtin(unsigned long))))
+   &&relation(definitely_preserves_value)"
+}
+-doc_end
+
+-doc_begin="Conversions to object pointers that have a pointee type with a smaller (i.e., less strict) alignment requirement are safe."
+-config=MC3R1.R11.3,casts+={safe,
+  "!relation(more_aligned_pointee)"
+}
+-doc_end
+
+-doc_begin="Conversions from and to integral types are safe, in the assumption that the target type has enough bits to store the value.
+See also Section \"4.7 Arrays and Pointers\" of \"GCC_MANUAL\""
+-config=MC3R1.R11.6,casts+={safe,
+    "(from(type(canonical(integral())))||to(type(canonical(integral()))))
+     &&relation(definitely_preserves_value)"}
+-doc_end
+
+-doc_begin="The conversion from a pointer to a boolean has a well-known semantics that do not lead to unexpected behaviour."
+-config=MC3R1.R11.6,casts+={safe,
+  "from(type(canonical(__pointer_types)))
+   &&kind(pointer_to_boolean)"
+}
+-doc_end
+
 -doc_begin="Violations caused by container_of are due to pointer arithmetic operations
 with the provided offset. The resulting pointer is then immediately cast back to its
 original type, which preserves the qualifier. This use is deemed safe.
@@ -364,9 +428,18 @@ activity."
 -config=MC3R1.R14.2,reports+={disapplied,"any()"}
 -doc_end
 
--doc_begin="The XEN team relies on the fact that invariant conditions of 'if'
-statements are deliberate"
--config=MC3R1.R14.3,statements={deliberate , "wrapped(any(),node(if_stmt))" }
+-doc_begin="The XEN team relies on the fact that invariant conditions of 'if' statements and conditional operators are deliberate"
+-config=MC3R1.R14.3,statements+={deliberate, "wrapped(any(),node(if_stmt||conditional_operator||binary_conditional_operator))" }
+-doc_end
+
+-doc_begin="Switches having a 'sizeof' operator as the condition are deliberate and have limited scope."
+-config=MC3R1.R14.3,statements+={deliberate, "wrapped(any(),node(switch_stmt)&&child(cond, operator(sizeof)))" }
+-doc_end
+
+-doc_begin="The use of an invariant size argument in {put,get}_unsafe_size and array_access_ok, as defined in arch/x86(_64)?/include/asm/uaccess.h is deliberate and is deemed safe."
+-file_tag+={x86_uaccess, "^xen/arch/x86(_64)?/include/asm/uaccess\\.h$"}
+-config=MC3R1.R14.3,reports+={deliberate, "any_area(any_loc(file(x86_uaccess)&&any_exp(macro(^(put|get)_unsafe_size$))))"}
+-config=MC3R1.R14.3,reports+={deliberate, "any_area(any_loc(file(x86_uaccess)&&any_exp(macro(^array_access_ok$))))"}
 -doc_end
 
 -doc_begin="A controlling expression of 'if' and iteration statements having integer, character or pointer type has a semantics that is well-known to all Xen developers."
@@ -545,8 +618,8 @@ falls under the jurisdiction of other MISRA rules."
 # General
 #
 
--doc_begin="do-while-0 is a well recognized loop idiom by the xen community."
--loop_idioms={do_stmt, "literal(0)"}
+-doc_begin="do-while-[01] is a well recognized loop idiom by the xen community."
+-loop_idioms={do_stmt, "literal(0)||literal(1)"}
 -doc_end
 -doc_begin="while-[01] is a well recognized loop idiom by the xen community."
 -loop_idioms+={while_stmt, "literal(0)||literal(1)"}
diff --git a/docs/misra/deviations.rst b/docs/misra/deviations.rst
index 7be2322123..1ecce1469a 100644
--- a/docs/misra/deviations.rst
+++ b/docs/misra/deviations.rst
@@ -63,6 +63,11 @@ Deviations related to MISRA C:2012 Rules:
        switch statement.
      - ECLAIR has been configured to ignore those statements.
 
+   * - R2.1
+     - The asm-offset files are not linked deliberately, since they are used to
+       generate definitions for asm modules.
+     - Tagged as `deliberate` for ECLAIR.
+
    * - R2.2
      - Proving compliance with respect to Rule 2.2 is generally impossible:
        see `<https://arxiv.org/abs/2212.13933>`_ for details. Moreover, peer
@@ -203,6 +208,26 @@ Deviations related to MISRA C:2012 Rules:
        it.
      - Tagged as `safe` for ECLAIR.
 
+   * - R8.4
+     - Some functions are excluded from non-debug build, therefore the absence
+       of declaration is safe.
+     - Tagged as `safe` for ECLAIR, such functions are:
+         - apei_read_mce()
+         - apei_check_mce()
+         - apei_clear_mce()
+
+   * - R8.4
+     - Given that bsearch and sort are defined with the attribute 'gnu_inline',
+       it's deliberate not to have a prior declaration.
+       See Section \"6.33.1 Common Function Attributes\" of \"GCC_MANUAL\" for
+       a full explanation of gnu_inline.
+     - Tagged as `deliberate` for ECLAIR.
+
+   * - R8.4
+     - first_valid_mfn is defined in this way because the current lack of NUMA
+       support in Arm and PPC requires it.
+     - Tagged as `deliberate` for ECLAIR.
+
    * - R8.6
      - The following variables are compiled in multiple translation units
        belonging to different executables and therefore are safe.
@@ -282,6 +307,39 @@ Deviations related to MISRA C:2012 Rules:
        If no bits are set, 0 is returned.
      - Tagged as `safe` for ECLAIR.
 
+   * - R11.1
+     - The conversion from a function pointer to unsigned long or (void \*) does
+       not lose any information, provided that the target type has enough bits
+       to store it.
+     - Tagged as `safe` for ECLAIR.
+
+   * - R11.1
+     - The conversion from a function pointer to a boolean has a well-known
+       semantics that do not lead to unexpected behaviour.
+     - Tagged as `safe` for ECLAIR.
+
+   * - R11.2
+     - The conversion from a pointer to an incomplete type to unsigned long
+       does not lose any information, provided that the target type has enough
+       bits to store it.
+     - Tagged as `safe` for ECLAIR.
+
+   * - R11.3
+     - Conversions to object pointers that have a pointee type with a smaller
+       (i.e., less strict) alignment requirement are safe.
+     - Tagged as `safe` for ECLAIR.
+
+   * - R11.6
+     - Conversions from and to integral types are safe, in the assumption that
+       the target type has enough bits to store the value.
+       See also Section \"4.7 Arrays and Pointers\" of \"GCC_MANUAL\"
+     - Tagged as `safe` for ECLAIR.
+
+   * - R11.6
+     - The conversion from a pointer to a boolean has a well-known semantics
+       that do not lead to unexpected behaviour.
+     - Tagged as `safe` for ECLAIR.
+
    * - R11.8
      - Violations caused by container_of are due to pointer arithmetic operations
        with the provided offset. The resulting pointer is then immediately cast back to its
@@ -318,8 +376,19 @@ Deviations related to MISRA C:2012 Rules:
 
    * - R14.3
      - The Xen team relies on the fact that invariant conditions of 'if'
-       statements are deliberate.
-     - Project-wide deviation; tagged as `disapplied` for ECLAIR.
+       statements and conditional operators are deliberate.
+     - Tagged as `deliberate` for ECLAIR.
+
+   * - R14.3
+     - Switches having a 'sizeof' operator as the condition are deliberate and
+       have limited scope.
+     - Tagged as `deliberate` for ECLAIR.
+
+   * - R14.3
+     - The use of an invariant size argument in {put,get}_unsafe_size and
+       array_access_ok, as defined in arch/x86(_64)?/include/asm/uaccess.h is
+       deliberate and is deemed safe.
+     - Tagged as `deliberate` for ECLAIR.
 
    * - R14.4
      - A controlling expression of 'if' and iteration statements having
@@ -486,10 +555,10 @@ Other deviations:
    * - Deviation
      - Justification
 
-   * - do-while-0 loops
-     - The do-while-0 is a well-recognized loop idiom used by the Xen community
-       and can therefore be used, even though it would cause a number of
-       violations in some instances.
+   * - do-while-0 and do-while-1 loops
+     - The do-while-0 and do-while-1 loops are well-recognized loop idioms used
+       by the Xen community and can therefore be used, even though they would
+       cause a number of violations in some instances.
 
    * - while-0 and while-1 loops
      - while-0 and while-1 are well-recognized loop idioms used by the Xen
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] automation/eclair: address violations of MISRA C Rule 20.7
Message-Id: <E1sN6Ri-0007rv-Aj@xenbits.xenproject.org>
Date: Fri, 28 Jun 2024 07:55:02 +0000

commit 0dca0f2b9a7e05a4f3b982e260352e405eb405f8
Author:     Nicola Vetrini <nicola.vetrini@bugseng.com>
AuthorDate: Thu Jun 27 13:45:18 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 27 13:45:18 2024 +0200

    automation/eclair: address violations of MISRA C Rule 20.7
    
    MISRA C Rule 20.7 states: "Expressions resulting from the expansion
    of macro parameters shall be enclosed in parentheses".
    
    The helper macro bitmap_switch has parameters that cannot be parenthesized
    in order to comply with the rule, as that would break its functionality.
    Moreover, the risk of misuse due developer confusion is deemed not
    substantial enough to warrant a more involved refactor, thus the macro
    is deviated for this rule.
    
    No functional change.
    
    Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 docs/misra/safe.json     | 8 ++++++++
 xen/include/xen/bitmap.h | 3 +++
 2 files changed, 11 insertions(+)

diff --git a/docs/misra/safe.json b/docs/misra/safe.json
index c213e0a0be..3f18ef401c 100644
--- a/docs/misra/safe.json
+++ b/docs/misra/safe.json
@@ -60,6 +60,14 @@
         },
         {
             "id": "SAF-7-safe",
+            "analyser": {
+                "eclair": "MC3R1.R20.7"
+            },
+            "name": "MC3R1.R20.7: deliberately non-parenthesized macro argument",
+            "text": "A macro parameter expands to an expression that is non-parenthesized, as doing so would break the functionality."
+        },
+        {
+            "id": "SAF-8-safe",
             "analyser": {},
             "name": "Sentinel",
             "text": "Next ID to be used"
diff --git a/xen/include/xen/bitmap.h b/xen/include/xen/bitmap.h
index b9f980e919..6ee39aa35a 100644
--- a/xen/include/xen/bitmap.h
+++ b/xen/include/xen/bitmap.h
@@ -103,10 +103,13 @@ extern int bitmap_allocate_region(unsigned long *bitmap, int pos, int order);
 #define bitmap_switch(nbits, zero, small, large)			  \
 	unsigned int n__ = (nbits);					  \
 	if (__builtin_constant_p(nbits) && !n__) {			  \
+		/* SAF-7-safe Rule 20.7 non-parenthesized macro argument */ \
 		zero;							  \
 	} else if (__builtin_constant_p(nbits) && n__ <= BITS_PER_LONG) { \
+		/* SAF-7-safe Rule 20.7 non-parenthesized macro argument */ \
 		small;							  \
 	} else {							  \
+		/* SAF-7-safe Rule 20.7 non-parenthesized macro argument */ \
 		large;							  \
 	}
 
--
generated by git-patchbot for /home/xen/git/xen.git#master


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Subject: [xen master] xen/self-tests: address violations of MISRA rule 20.7
Message-Id: <E1sN6Rs-0007t0-EK@xenbits.xenproject.org>
Date: Fri, 28 Jun 2024 07:55:12 +0000

commit 4929fea7bd7322da2ede70f2ea53c3696c83032e
Author:     Nicola Vetrini <nicola.vetrini@bugseng.com>
AuthorDate: Thu Jun 27 13:46:02 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 27 13:46:02 2024 +0200

    xen/self-tests: address violations of MISRA rule 20.7
    
    MISRA C Rule 20.7 states: "Expressions resulting from the expansion
    of macro parameters shall be enclosed in parentheses". Therefore, some
    macro definitions should gain additional parentheses to ensure that all
    current and future users will be safe with respect to expansions that
    can possibly alter the semantics of the passed-in macro parameter.
    
    No functional change.
    
    Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/include/xen/self-tests.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/xen/include/xen/self-tests.h b/xen/include/xen/self-tests.h
index 42a4cc4d17..58484fe5a8 100644
--- a/xen/include/xen/self-tests.h
+++ b/xen/include/xen/self-tests.h
@@ -19,11 +19,11 @@
 #if !defined(CONFIG_CC_IS_CLANG) || CONFIG_CLANG_VERSION >= 80000
 #define COMPILE_CHECK(fn, val, res)                                     \
     do {                                                                \
-        typeof(fn(val)) real = fn(val);                                 \
+        typeof((fn)(val)) real = (fn)(val);                             \
                                                                         \
         if ( !__builtin_constant_p(real) )                              \
             asm ( ".error \"'" STR(fn(val)) "' not compile-time constant\"" ); \
-        else if ( real != res )                                         \
+        else if ( real != (res) )                                       \
             asm ( ".error \"Compile time check '" STR(fn(val) == res) "' failed\"" ); \
     } while ( 0 )
 #else
@@ -37,9 +37,9 @@
  */
 #define RUNTIME_CHECK(fn, val, res)                     \
     do {                                                \
-        typeof(fn(val)) real = fn(HIDE(val));           \
+        typeof((fn)(val)) real = (fn)(HIDE(val));       \
                                                         \
-        if ( real != res )                              \
+        if ( real != (res) )                            \
             panic("%s: %s(%s) expected %u, got %u\n",   \
                   __func__, #fn, #val, real, res);      \
     } while ( 0 )
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/guest_access: address violations of MISRA rule 20.7
Message-Id: <E1sN6S2-0007tf-HJ@xenbits.xenproject.org>
Date: Fri, 28 Jun 2024 07:55:22 +0000

commit f39642c308af4e174c6e54a45a3e51db373435a2
Author:     Nicola Vetrini <nicola.vetrini@bugseng.com>
AuthorDate: Thu Jun 27 13:46:27 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 27 13:46:27 2024 +0200

    xen/guest_access: address violations of MISRA rule 20.7
    
    MISRA C Rule 20.7 states: "Expressions resulting from the expansion
    of macro parameters shall be enclosed in parentheses". Therefore, some
    macro definitions should gain additional parentheses to ensure that all
    current and future users will be safe with respect to expansions that
    can possibly alter the semantics of the passed-in macro parameter.
    
    No functional change.
    
    Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/include/xen/guest_access.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/xen/include/xen/guest_access.h b/xen/include/xen/guest_access.h
index a2146749e3..2e0971c487 100644
--- a/xen/include/xen/guest_access.h
+++ b/xen/include/xen/guest_access.h
@@ -51,9 +51,9 @@
     ((XEN_GUEST_HANDLE(type)) { &(hnd).p->fld })
 
 #define guest_handle_from_ptr(ptr, type)        \
-    ((XEN_GUEST_HANDLE_PARAM(type)) { (type *)ptr })
+    ((XEN_GUEST_HANDLE_PARAM(type)) { (type *)(ptr) })
 #define const_guest_handle_from_ptr(ptr, type)  \
-    ((XEN_GUEST_HANDLE_PARAM(const_##type)) { (const type *)ptr })
+    ((XEN_GUEST_HANDLE_PARAM(const_##type)) { (const type *)(ptr) })
 
 /*
  * Copy an array of objects to guest context via a guest handle,
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] automation/eclair_analysis: address violations of MISRA C Rule 20.7
Message-Id: <E1sN6SC-0007uX-Le@xenbits.xenproject.org>
Date: Fri, 28 Jun 2024 07:55:32 +0000

commit c7e195fac02b850696d24a462612462ade4fe97b
Author:     Nicola Vetrini <nicola.vetrini@bugseng.com>
AuthorDate: Thu Jun 27 13:46:57 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 27 13:46:57 2024 +0200

    automation/eclair_analysis: address violations of MISRA C Rule 20.7
    
    MISRA C Rule 20.7 states: "Expressions resulting from the expansion
    of macro parameters shall be enclosed in parentheses".
    
    The local helpers GRP2 and XADD in the x86 emulator use their first
    argument as the constant expression for a case label. This pattern
    is deviated project-wide, because it is very unlikely to induce
    developer confusion and result in the wrong control flow being
    carried out.
    
    No functional change.
    
    Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 automation/eclair_analysis/ECLAIR/deviations.ecl | 6 ++++--
 docs/misra/deviations.rst                        | 3 ++-
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl
index dcff4f4013..d12be858fe 100644
--- a/automation/eclair_analysis/ECLAIR/deviations.ecl
+++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
@@ -458,13 +458,15 @@ unexpected result when the structure is given as argument to a sizeof() operator
 
 -doc_begin="Code violating Rule 20.7 is safe when macro parameters are used: (1)
 as function arguments; (2) as macro arguments; (3) as array indices; (4) as lhs
-in assignments; (5) as initializers, possibly designated, in initalizer lists."
+in assignments; (5) as initializers, possibly designated, in initalizer lists;
+(6) as the constant expression in a switch clause label."
 -config=MC3R1.R20.7,expansion_context=
 {safe, "context(__call_expr_arg_contexts)"},
 {safe, "left_right(^[(,\\[]$,^[),\\]]$)"},
 {safe, "context(skip_to(__expr_non_syntactic_contexts, stmt_child(node(array_subscript_expr), subscript)))"},
 {safe, "context(skip_to(__expr_non_syntactic_contexts, stmt_child(operator(assign), lhs)))"},
-{safe, "context(skip_to(__expr_non_syntactic_contexts, stmt_child(node(init_list_expr||designated_init_expr), init)))"}
+{safe, "context(skip_to(__expr_non_syntactic_contexts, stmt_child(node(init_list_expr||designated_init_expr), init)))"},
+{safe, "context(skip_to(__expr_non_syntactic_contexts, stmt_child(node(case_stmt), lower||upper)))"}
 -doc_end
 
 -doc_begin="Violations involving the __config_enabled macros cannot be fixed without
diff --git a/docs/misra/deviations.rst b/docs/misra/deviations.rst
index c6a2affc6a..7be2322123 100644
--- a/docs/misra/deviations.rst
+++ b/docs/misra/deviations.rst
@@ -416,7 +416,8 @@ Deviations related to MISRA C:2012 Rules:
        (2) as macro arguments;
        (3) as array indices;
        (4) as lhs in assignments;
-       (5) as initializers, possibly designated, in initalizer lists.
+       (5) as initializers, possibly designated, in initalizer lists;
+       (6) as constant expressions of switch case labels.
      - Tagged as `safe` for ECLAIR.
 
    * - R20.7
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/irq: address violations of MISRA C Rule 20.7
Message-Id: <E1sN6SM-0007vN-Oe@xenbits.xenproject.org>
Date: Fri, 28 Jun 2024 07:55:42 +0000

commit 8f5581d7e1f37f38c3c92c01611e9f19b38e4881
Author:     Nicola Vetrini <nicola.vetrini@bugseng.com>
AuthorDate: Thu Jun 27 13:47:16 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 27 13:47:16 2024 +0200

    x86/irq: address violations of MISRA C Rule 20.7
    
    MISRA C Rule 20.7 states: "Expressions resulting from the expansion
    of macro parameters shall be enclosed in parentheses". Therefore, some
    macro definitions should gain additional parentheses to ensure that all
    current and future users will be safe with respect to expansions that
    can possibly alter the semantics of the passed-in macro parameter.
    
    No functional change.
    
    Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/include/xen/irq.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/include/xen/irq.h b/xen/include/xen/irq.h
index 580ae37e74..17211f3399 100644
--- a/xen/include/xen/irq.h
+++ b/xen/include/xen/irq.h
@@ -178,7 +178,7 @@ extern struct pirq *pirq_get_info(struct domain *d, int pirq);
 
 #define pirq_field(d, p, f, def) ({ \
     const struct pirq *__pi = pirq_info(d, p); \
-    __pi ? __pi->f : def; \
+    __pi ? __pi->f : (def); \
 })
 #define pirq_to_evtchn(d, pirq) pirq_field(d, pirq, evtchn, 0)
 #define pirq_masked(d, pirq) pirq_field(d, pirq, masked, 0)
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] automation/eclair_analysis: clean ECLAIR configuration scripts
Message-Id: <E1sN6SW-0007wq-RT@xenbits.xenproject.org>
Date: Fri, 28 Jun 2024 07:55:52 +0000

commit bfea273b7b1590554473b79fe7c0574ef36c642a
Author:     Nicola Vetrini <nicola.vetrini@bugseng.com>
AuthorDate: Thu Jun 27 13:47:56 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 27 13:47:56 2024 +0200

    automation/eclair_analysis: clean ECLAIR configuration scripts
    
    Remove from the ECLAIR integration scripts an unused option, which
    was already ignored, and make the help texts consistent
    with the rest of the scripts.
    
    No functional change.
    
    Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 automation/eclair_analysis/ECLAIR/analyze.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/automation/eclair_analysis/ECLAIR/analyze.sh b/automation/eclair_analysis/ECLAIR/analyze.sh
index 0ea5520c93..e96456c3c1 100755
--- a/automation/eclair_analysis/ECLAIR/analyze.sh
+++ b/automation/eclair_analysis/ECLAIR/analyze.sh
@@ -11,7 +11,7 @@ fatal() {
 }
 
 usage() {
-  fatal "Usage: ${script_name} <ARM64|X86_64> <Set0|Set1|Set2|Set3>"
+  fatal "Usage: ${script_name} <ARM64|X86_64> <accepted|monitored>"
 }
 
 if [[ $# -ne 2 ]]; then
@@ -40,7 +40,6 @@ ECLAIR_REPORT_LOG=${ECLAIR_OUTPUT_DIR}/REPORT.log
 if [[ "$1" = "X86_64" ]]; then
   export CROSS_COMPILE=
   export XEN_TARGET_ARCH=x86_64
-  EXTRA_ECLAIR_ENV_OPTIONS=-disable=MC3R1.R20.7
 elif [[ "$1" = "ARM64" ]]; then
   export CROSS_COMPILE=aarch64-linux-gnu-
   export XEN_TARGET_ARCH=arm64
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/traps: address violations of MISRA C Rule 20.7
Message-Id: <E1sN6Sg-0007yV-UR@xenbits.xenproject.org>
Date: Fri, 28 Jun 2024 07:56:02 +0000

commit 402e473249cf62dd4c6b3b137aa845db0fe1453a
Author:     Nicola Vetrini <nicola.vetrini@bugseng.com>
AuthorDate: Thu Jun 27 13:48:08 2024 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 27 13:48:08 2024 +0200

    x86/traps: address violations of MISRA C Rule 20.7
    
    MISRA C Rule 20.7 states: "Expressions resulting from the expansion
    of macro parameters shall be enclosed in parentheses". Therefore, some
    macro definitions should gain additional parentheses to ensure that all
    current and future users will be safe with respect to expansions that
    can possibly alter the semantics of the passed-in macro parameter.
    
    No functional change.
    
    Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Acked-by: Jan Beulich <jbeulich@suse.com>
    Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/x86/traps.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index 9906e874d5..ee91fc56b1 100644
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -123,7 +123,7 @@ unsigned int __ro_after_init ler_msr;
 const unsigned int nmi_cpu;
 
 #define stack_words_per_line 4
-#define ESP_BEFORE_EXCEPTION(regs) ((unsigned long *)regs->rsp)
+#define ESP_BEFORE_EXCEPTION(regs) ((unsigned long *)(regs)->rsp)
 
 void show_code(const struct cpu_user_regs *regs)
 {
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] MAINTAINERS: Step down as maintainer and committer
Message-Id: <E1sNCUF-0005VD-1H@xenbits.xenproject.org>
Date: Fri, 28 Jun 2024 14:22:03 +0000

commit 08f9b1dd9c9435d4cca006e43917245710b39be3
Author:     George Dunlap <george.dunlap@cloud.com>
AuthorDate: Wed Jun 26 16:07:30 2024 +0100
Commit:     George Dunlap <george.dunlap@cloud.com>
CommitDate: Fri Jun 28 14:56:44 2024 +0100

    MAINTAINERS: Step down as maintainer and committer
    
    Remain a Reviewer on the golang bindings and scheduler for now (using
    a xenproject.org alias), since there may be architectural decisions I
    can shed light on.
    
    Remove the XENTRACE section entirely, as there's no obvious candidate
    to take it over; having the respective parts fall back to the tools
    and The Rest seems the most reasonable option.
    
    Signed-off-by: George Dunlap <george.dunlap@cloud.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
    Acked-by: Juergen Gross <jgross@suse.com>
    Acked-by: Bertrand Marquis <bertrand.marquis@arm.com>
---
 MAINTAINERS | 13 ++-----------
 1 file changed, 2 insertions(+), 11 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 9d66b898ec..2b0c894527 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -325,8 +325,8 @@ F:	xen/arch/x86/debug.c
 F:	tools/debugger/gdbsx/
 
 GOLANG BINDINGS
-M:	George Dunlap <george.dunlap@citrix.com>
 M:	Nick Rosbrook <rosbrookn@gmail.com>
+R:	George Dunlap <gwd@xenproject.org>
 S:	Maintained
 F:	tools/golang
 
@@ -490,9 +490,9 @@ S:	Supported
 F:	xen/common/sched/rt.c
 
 SCHEDULING
-M:	George Dunlap <george.dunlap@citrix.com>
 M:	Dario Faggioli <dfaggioli@suse.com>
 M:	Juergen Gross <jgross@suse.com>
+R:	George Dunlap <gwd@xenproject.org>
 S:	Supported
 F:	xen/common/sched/
 
@@ -597,7 +597,6 @@ F:	tools/tests/x86_emulator/
 X86 MEMORY MANAGEMENT
 M:	Jan Beulich <jbeulich@suse.com>
 M:	Andrew Cooper <andrew.cooper3@citrix.com>
-R:	George Dunlap <george.dunlap@citrix.com>
 S:	Supported
 F:	xen/arch/x86/mm/
 
@@ -641,13 +640,6 @@ F:	tools/libs/store/
 F:	tools/xenstored/
 F:	tools/xs-clients/
 
-XENTRACE
-M:	George Dunlap <george.dunlap@citrix.com>
-S:	Supported
-F:	tools/xentrace/
-F:	xen/common/trace.c
-F:	xen/include/xen/trace.h
-
 XEN MISRA ANALYSIS TOOLS
 M:	Luca Fancellu <luca.fancellu@arm.com>
 S:	Supported
@@ -670,7 +662,6 @@ K:	\b(xsm|XSM)\b
 
 THE REST
 M:	Andrew Cooper <andrew.cooper3@citrix.com>
-M:	George Dunlap <george.dunlap@citrix.com>
 M:	Jan Beulich <jbeulich@suse.com>
 M:	Julien Grall <julien@xen.org>
 M:	Stefano Stabellini <sstabellini@kernel.org>
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] automation/eclair: add deviations agreed in MISRA meetings
Message-Id: <E1sNIs1-0007b7-Hw@xenbits.xenproject.org>
Date: Fri, 28 Jun 2024 21:11:01 +0000

commit 6d41f5b9e112e8934f59edfd7168a36706e0341a
Author:     Federico Serafini <federico.serafini@bugseng.com>
AuthorDate: Wed Jun 26 08:10:50 2024 +0200
Commit:     Stefano Stabellini <stefano.stabellini@amd.com>
CommitDate: Thu Jun 27 15:38:33 2024 -0700

    automation/eclair: add deviations agreed in MISRA meetings
    
    Update ECLAIR configuration to take into account the deviations
    agreed during the MISRA meetings.
    
    While doing this, remove the obsolete "Set [123]" comments.
    
    Signed-off-by: Federico Serafini <federico.serafini@bugseng.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 automation/eclair_analysis/ECLAIR/deviations.ecl | 93 +++++++++++++++++++++---
 docs/misra/deviations.rst                        | 81 +++++++++++++++++++--
 2 files changed, 158 insertions(+), 16 deletions(-)

diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl
index d12be858fe..0af1cb93d1 100644
--- a/automation/eclair_analysis/ECLAIR/deviations.ecl
+++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
@@ -1,5 +1,3 @@
-### Set 1 ###
-
 #
 # Series 2.
 #
@@ -23,6 +21,11 @@ Constant expressions and unreachable branches of if and switch statements are ex
 -config=MC3R1.R2.1,reports+={deliberate, "any_area(any_loc(any_exp(macro(name(ASSERT_UNREACHABLE||PARSE_ERR_RET||PARSE_ERR||FAIL_MSR||FAIL_CPUID)))))"}
 -doc_end
 
+-doc_begin="The asm-offset files are not linked deliberately, since they are used to generate definitions for asm modules."
+-file_tag+={asm_offsets, "^xen/arch/(arm|x86)/(arm32|arm64|x86_64)/asm-offsets\\.c$"}
+-config=MC3R1.R2.1,reports+={deliberate, "any_area(any_loc(file(asm_offsets)))"}
+-doc_end
+
 -doc_begin="Pure declarations (i.e., declarations without initialization) are
 not executable, and therefore it is safe for them to be unreachable."
 -config=MC3R1.R2.1,ignored_stmts+={"any()", "pure_decl()"}
@@ -63,6 +66,12 @@ they are not instances of commented-out code."
 -config=MC3R1.D4.3,reports+={disapplied,"!(any_area(any_loc(file(^xen/arch/arm/arm64/.*$))))"}
 -doc_end
 
+-doc_begin="The inline asm in 'arm64/lib/bitops.c' is tightly coupled with the surronding C code that acts as a wrapper, so it has been decided not to add an additional encapsulation layer."
+-file_tag+={arm64_bitops, "^xen/arch/arm/arm64/lib/bitops\\.c$"}
+-config=MC3R1.D4.3,reports+={deliberate, "all_area(any_loc(file(arm64_bitops)&&any_exp(macro(^(bit|test)op$))))"}
+-config=MC3R1.D4.3,reports+={deliberate, "any_area(any_loc(file(arm64_bitops))&&context(name(int_clear_mask16)))"}
+-doc_end
+
 -doc_begin="This header file is autogenerated or empty, therefore it poses no
 risk if included more than once."
 -file_tag+={empty_header, "^xen/arch/arm/efi/runtime\\.h$"}
@@ -213,10 +222,25 @@ Therefore the absence of prior declarations is safe."
 -config=MC3R1.R8.4,declarations+={safe, "loc(file(asm_defns))&&^current_stack_pointer$"}
 -doc_end
 
+-doc_begin="The function apei_(read|check|clear)_mce are dead code and are excluded from non-debug builds, therefore the absence of prior declarations is safe."
+-config=MC3R1.R8.4,declarations+={safe, "^apei_(read|check|clear)_mce\\(.*$"}
+-doc_end
+
 -doc_begin="asmlinkage is a marker to indicate that the function is only used to interface with asm modules."
 -config=MC3R1.R8.4,declarations+={safe,"loc(text(^(?s).*asmlinkage.*$, -1..0))"}
 -doc_end
 
+-doc_begin="Given that bsearch and sort are defined with the attribute 'gnu_inline', it's deliberate not to have a prior declaration.
+See Section \"6.33.1 Common Function Attributes\" of \"GCC_MANUAL\" for a full explanation of gnu_inline."
+-file_tag+={bsearch_sort, "^xen/include/xen/(sort|lib)\\.h$"}
+-config=MC3R1.R8.4,reports+={deliberate, "any_area(any_loc(file(bsearch_sort))&&decl(name(bsearch||sort)))"}
+-doc_end
+
+-doc_begin="first_valid_mfn is defined in this way because the current lack of NUMA support in Arm and PPC requires it."
+-file_tag+={first_valid_mfn, "^xen/common/page_alloc\\.c$"}
+-config=MC3R1.R8.4,declarations+={deliberate,"loc(file(first_valid_mfn))"}
+-doc_end
+
 -doc_begin="The following variables are compiled in multiple translation units
 belonging to different executables and therefore are safe."
 -config=MC3R1.R8.6,declarations+={safe, "name(current_stack_pointer||bsearch||sort)"}
@@ -257,8 +281,6 @@ dimension is higher than omitting the dimension."
 -config=MC3R1.R9.5,reports+={deliberate, "any()"}
 -doc_end
 
-### Set 2 ###
-
 #
 # Series 10.
 #
@@ -299,7 +321,6 @@ integers arguments on two's complement architectures
 -config=MC3R1.R10.1,reports+={safe, "any_area(any_loc(any_exp(macro(^ISOLATE_LSB$))))"}
 -doc_end
 
-### Set 3 ###
 -doc_begin="XEN only supports architectures where signed integers are
 representend using two's complement and all the XEN developers are aware of
 this."
@@ -323,6 +344,49 @@ constant expressions are required.\""
 # Series 11
 #
 
+-doc_begin="The conversion from a function pointer to unsigned long or (void *) does not lose any information, provided that the target type has enough bits to store it."
+-config=MC3R1.R11.1,casts+={safe,
+  "from(type(canonical(__function_pointer_types)))
+   &&to(type(canonical(builtin(unsigned long)||pointer(builtin(void)))))
+   &&relation(definitely_preserves_value)"
+}
+-doc_end
+
+-doc_begin="The conversion from a function pointer to a boolean has a well-known semantics that do not lead to unexpected behaviour."
+-config=MC3R1.R11.1,casts+={safe,
+  "from(type(canonical(__function_pointer_types)))
+   &&kind(pointer_to_boolean)"
+}
+-doc_end
+
+-doc_begin="The conversion from a pointer to an incomplete type to unsigned long does not lose any information, provided that the target type has enough bits to store it."
+-config=MC3R1.R11.2,casts+={safe,
+  "from(type(any()))
+   &&to(type(canonical(builtin(unsigned long))))
+   &&relation(definitely_preserves_value)"
+}
+-doc_end
+
+-doc_begin="Conversions to object pointers that have a pointee type with a smaller (i.e., less strict) alignment requirement are safe."
+-config=MC3R1.R11.3,casts+={safe,
+  "!relation(more_aligned_pointee)"
+}
+-doc_end
+
+-doc_begin="Conversions from and to integral types are safe, in the assumption that the target type has enough bits to store the value.
+See also Section \"4.7 Arrays and Pointers\" of \"GCC_MANUAL\""
+-config=MC3R1.R11.6,casts+={safe,
+    "(from(type(canonical(integral())))||to(type(canonical(integral()))))
+     &&relation(definitely_preserves_value)"}
+-doc_end
+
+-doc_begin="The conversion from a pointer to a boolean has a well-known semantics that do not lead to unexpected behaviour."
+-config=MC3R1.R11.6,casts+={safe,
+  "from(type(canonical(__pointer_types)))
+   &&kind(pointer_to_boolean)"
+}
+-doc_end
+
 -doc_begin="Violations caused by container_of are due to pointer arithmetic operations
 with the provided offset. The resulting pointer is then immediately cast back to its
 original type, which preserves the qualifier. This use is deemed safe.
@@ -364,9 +428,18 @@ activity."
 -config=MC3R1.R14.2,reports+={disapplied,"any()"}
 -doc_end
 
--doc_begin="The XEN team relies on the fact that invariant conditions of 'if'
-statements are deliberate"
--config=MC3R1.R14.3,statements={deliberate , "wrapped(any(),node(if_stmt))" }
+-doc_begin="The XEN team relies on the fact that invariant conditions of 'if' statements and conditional operators are deliberate"
+-config=MC3R1.R14.3,statements+={deliberate, "wrapped(any(),node(if_stmt||conditional_operator||binary_conditional_operator))" }
+-doc_end
+
+-doc_begin="Switches having a 'sizeof' operator as the condition are deliberate and have limited scope."
+-config=MC3R1.R14.3,statements+={deliberate, "wrapped(any(),node(switch_stmt)&&child(cond, operator(sizeof)))" }
+-doc_end
+
+-doc_begin="The use of an invariant size argument in {put,get}_unsafe_size and array_access_ok, as defined in arch/x86(_64)?/include/asm/uaccess.h is deliberate and is deemed safe."
+-file_tag+={x86_uaccess, "^xen/arch/x86(_64)?/include/asm/uaccess\\.h$"}
+-config=MC3R1.R14.3,reports+={deliberate, "any_area(any_loc(file(x86_uaccess)&&any_exp(macro(^(put|get)_unsafe_size$))))"}
+-config=MC3R1.R14.3,reports+={deliberate, "any_area(any_loc(file(x86_uaccess)&&any_exp(macro(^array_access_ok$))))"}
 -doc_end
 
 -doc_begin="A controlling expression of 'if' and iteration statements having integer, character or pointer type has a semantics that is well-known to all Xen developers."
@@ -545,8 +618,8 @@ falls under the jurisdiction of other MISRA rules."
 # General
 #
 
--doc_begin="do-while-0 is a well recognized loop idiom by the xen community."
--loop_idioms={do_stmt, "literal(0)"}
+-doc_begin="do-while-[01] is a well recognized loop idiom by the xen community."
+-loop_idioms={do_stmt, "literal(0)||literal(1)"}
 -doc_end
 -doc_begin="while-[01] is a well recognized loop idiom by the xen community."
 -loop_idioms+={while_stmt, "literal(0)||literal(1)"}
diff --git a/docs/misra/deviations.rst b/docs/misra/deviations.rst
index 7be2322123..1ecce1469a 100644
--- a/docs/misra/deviations.rst
+++ b/docs/misra/deviations.rst
@@ -63,6 +63,11 @@ Deviations related to MISRA C:2012 Rules:
        switch statement.
      - ECLAIR has been configured to ignore those statements.
 
+   * - R2.1
+     - The asm-offset files are not linked deliberately, since they are used to
+       generate definitions for asm modules.
+     - Tagged as `deliberate` for ECLAIR.
+
    * - R2.2
      - Proving compliance with respect to Rule 2.2 is generally impossible:
        see `<https://arxiv.org/abs/2212.13933>`_ for details. Moreover, peer
@@ -203,6 +208,26 @@ Deviations related to MISRA C:2012 Rules:
        it.
      - Tagged as `safe` for ECLAIR.
 
+   * - R8.4
+     - Some functions are excluded from non-debug build, therefore the absence
+       of declaration is safe.
+     - Tagged as `safe` for ECLAIR, such functions are:
+         - apei_read_mce()
+         - apei_check_mce()
+         - apei_clear_mce()
+
+   * - R8.4
+     - Given that bsearch and sort are defined with the attribute 'gnu_inline',
+       it's deliberate not to have a prior declaration.
+       See Section \"6.33.1 Common Function Attributes\" of \"GCC_MANUAL\" for
+       a full explanation of gnu_inline.
+     - Tagged as `deliberate` for ECLAIR.
+
+   * - R8.4
+     - first_valid_mfn is defined in this way because the current lack of NUMA
+       support in Arm and PPC requires it.
+     - Tagged as `deliberate` for ECLAIR.
+
    * - R8.6
      - The following variables are compiled in multiple translation units
        belonging to different executables and therefore are safe.
@@ -282,6 +307,39 @@ Deviations related to MISRA C:2012 Rules:
        If no bits are set, 0 is returned.
      - Tagged as `safe` for ECLAIR.
 
+   * - R11.1
+     - The conversion from a function pointer to unsigned long or (void \*) does
+       not lose any information, provided that the target type has enough bits
+       to store it.
+     - Tagged as `safe` for ECLAIR.
+
+   * - R11.1
+     - The conversion from a function pointer to a boolean has a well-known
+       semantics that do not lead to unexpected behaviour.
+     - Tagged as `safe` for ECLAIR.
+
+   * - R11.2
+     - The conversion from a pointer to an incomplete type to unsigned long
+       does not lose any information, provided that the target type has enough
+       bits to store it.
+     - Tagged as `safe` for ECLAIR.
+
+   * - R11.3
+     - Conversions to object pointers that have a pointee type with a smaller
+       (i.e., less strict) alignment requirement are safe.
+     - Tagged as `safe` for ECLAIR.
+
+   * - R11.6
+     - Conversions from and to integral types are safe, in the assumption that
+       the target type has enough bits to store the value.
+       See also Section \"4.7 Arrays and Pointers\" of \"GCC_MANUAL\"
+     - Tagged as `safe` for ECLAIR.
+
+   * - R11.6
+     - The conversion from a pointer to a boolean has a well-known semantics
+       that do not lead to unexpected behaviour.
+     - Tagged as `safe` for ECLAIR.
+
    * - R11.8
      - Violations caused by container_of are due to pointer arithmetic operations
        with the provided offset. The resulting pointer is then immediately cast back to its
@@ -318,8 +376,19 @@ Deviations related to MISRA C:2012 Rules:
 
    * - R14.3
      - The Xen team relies on the fact that invariant conditions of 'if'
-       statements are deliberate.
-     - Project-wide deviation; tagged as `disapplied` for ECLAIR.
+       statements and conditional operators are deliberate.
+     - Tagged as `deliberate` for ECLAIR.
+
+   * - R14.3
+     - Switches having a 'sizeof' operator as the condition are deliberate and
+       have limited scope.
+     - Tagged as `deliberate` for ECLAIR.
+
+   * - R14.3
+     - The use of an invariant size argument in {put,get}_unsafe_size and
+       array_access_ok, as defined in arch/x86(_64)?/include/asm/uaccess.h is
+       deliberate and is deemed safe.
+     - Tagged as `deliberate` for ECLAIR.
 
    * - R14.4
      - A controlling expression of 'if' and iteration statements having
@@ -486,10 +555,10 @@ Other deviations:
    * - Deviation
      - Justification
 
-   * - do-while-0 loops
-     - The do-while-0 is a well-recognized loop idiom used by the Xen community
-       and can therefore be used, even though it would cause a number of
-       violations in some instances.
+   * - do-while-0 and do-while-1 loops
+     - The do-while-0 and do-while-1 loops are well-recognized loop idioms used
+       by the Xen community and can therefore be used, even though they would
+       cause a number of violations in some instances.
 
    * - while-0 and while-1 loops
      - while-0 and while-1 are well-recognized loop idioms used by the Xen
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] MAINTAINERS: Step down as maintainer and committer
Message-Id: <E1sNR38-00089C-5A@xenbits.xenproject.org>
Date: Sat, 29 Jun 2024 05:55:02 +0000

commit 08f9b1dd9c9435d4cca006e43917245710b39be3
Author:     George Dunlap <george.dunlap@cloud.com>
AuthorDate: Wed Jun 26 16:07:30 2024 +0100
Commit:     George Dunlap <george.dunlap@cloud.com>
CommitDate: Fri Jun 28 14:56:44 2024 +0100

    MAINTAINERS: Step down as maintainer and committer
    
    Remain a Reviewer on the golang bindings and scheduler for now (using
    a xenproject.org alias), since there may be architectural decisions I
    can shed light on.
    
    Remove the XENTRACE section entirely, as there's no obvious candidate
    to take it over; having the respective parts fall back to the tools
    and The Rest seems the most reasonable option.
    
    Signed-off-by: George Dunlap <george.dunlap@cloud.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
    Acked-by: Juergen Gross <jgross@suse.com>
    Acked-by: Bertrand Marquis <bertrand.marquis@arm.com>
---
 MAINTAINERS | 13 ++-----------
 1 file changed, 2 insertions(+), 11 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 9d66b898ec..2b0c894527 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -325,8 +325,8 @@ F:	xen/arch/x86/debug.c
 F:	tools/debugger/gdbsx/
 
 GOLANG BINDINGS
-M:	George Dunlap <george.dunlap@citrix.com>
 M:	Nick Rosbrook <rosbrookn@gmail.com>
+R:	George Dunlap <gwd@xenproject.org>
 S:	Maintained
 F:	tools/golang
 
@@ -490,9 +490,9 @@ S:	Supported
 F:	xen/common/sched/rt.c
 
 SCHEDULING
-M:	George Dunlap <george.dunlap@citrix.com>
 M:	Dario Faggioli <dfaggioli@suse.com>
 M:	Juergen Gross <jgross@suse.com>
+R:	George Dunlap <gwd@xenproject.org>
 S:	Supported
 F:	xen/common/sched/
 
@@ -597,7 +597,6 @@ F:	tools/tests/x86_emulator/
 X86 MEMORY MANAGEMENT
 M:	Jan Beulich <jbeulich@suse.com>
 M:	Andrew Cooper <andrew.cooper3@citrix.com>
-R:	George Dunlap <george.dunlap@citrix.com>
 S:	Supported
 F:	xen/arch/x86/mm/
 
@@ -641,13 +640,6 @@ F:	tools/libs/store/
 F:	tools/xenstored/
 F:	tools/xs-clients/
 
-XENTRACE
-M:	George Dunlap <george.dunlap@citrix.com>
-S:	Supported
-F:	tools/xentrace/
-F:	xen/common/trace.c
-F:	xen/include/xen/trace.h
-
 XEN MISRA ANALYSIS TOOLS
 M:	Luca Fancellu <luca.fancellu@arm.com>
 S:	Supported
@@ -670,7 +662,6 @@ K:	\b(xsm|XSM)\b
 
 THE REST
 M:	Andrew Cooper <andrew.cooper3@citrix.com>
-M:	George Dunlap <george.dunlap@citrix.com>
 M:	Jan Beulich <jbeulich@suse.com>
 M:	Julien Grall <julien@xen.org>
 M:	Stefano Stabellini <sstabellini@kernel.org>
--
generated by git-patchbot for /home/xen/git/xen.git#master


