From xen-changelog-bounces@lists.xenproject.org Mon Dec 01 09:22:09 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 01 Dec 2025 09:22:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1175632.1500246 (Exim 4.92) (envelope-from ) id 1vQ06f-000568-Vc; Mon, 01 Dec 2025 09:22:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1175632.1500246; Mon, 01 Dec 2025 09:22:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ06f-000560-T7; Mon, 01 Dec 2025 09:22:05 +0000 Received: by outflank-mailman (input) for mailman id 1175632; Mon, 01 Dec 2025 09:22:04 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ06e-00055u-5Z for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 09:22:04 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQ06d-001LPE-0U for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 09:22:03 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQ06d-00H4iG-05 for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 09:22:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=IyPaU/2lExT66JWCn/d8RCoyjJmXxG5plMbmsrKhLhw=; b=EAHOPdQncZ5eNUEm6UgwxCS8/o t8MtW7eEJzK827qSq7w0vos9dlczMqh96445CIdIJSzr+xXK39O7cNi/r9oTBMDB7tjUqZO90zurJ 9AYiks5Fr3VXGREzcoPONC15Wu0jpf0Z5JBZPdCX32bMAtBuXn52oPNds3i1hvofVcwA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [mini-os master] x86: have .note.Xen segment contents before other .note.* ones Message-Id: Date: Mon, 01 Dec 2025 09:22:03 +0000 commit b6f79f5f44cf69044079c042b88fe9d75367642e Author: Juergen Gross AuthorDate: Mon Dec 1 10:14:47 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 1 10:14:47 2025 +0100 x86: have .note.Xen segment contents before other .note.* ones Today the linker script of Mini-OS specifies to merge all .note* sections into a single section .note: .note : { *(.note) *(.note.*) } It seems as if ld will use the attributes of the first .note* segment found during the linking process for the final .note segment. Somewhere between binutils 2.43 and 2.45 something changed resulting in .note.GNU-stack being the first .note* segment found. Unfortunately this segment has unusual attributes: it has PROGBITS instead of NOTE as type, resulting in the Xen ELF parsing to no longer look into it for finding the Xen ELF-notes. This in turn will result in failure while trying to parse the binary, which will let domain creation fail. In order to avoid this issue, enhance the linker script to merge .note.Xen before other .note.* segments, resulting in the final .note segment to still have the NOTE type. Fixes: 6d1cc81d049f ("x86: switch to use elfnote") Signed-off-by: Juergen Gross Reviewed-by: Jan Beulich --- arch/x86/minios-x86.lds.S | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/minios-x86.lds.S b/arch/x86/minios-x86.lds.S index 8c6e0a6..6367b4b 100644 --- a/arch/x86/minios-x86.lds.S +++ b/arch/x86/minios-x86.lds.S @@ -33,6 +33,7 @@ SECTIONS .note : { *(.note) + *(.note.Xen) *(.note.*) } -- generated by git-patchbot for /home/xen/git/mini-os.git#master From xen-changelog-bounces@lists.xenproject.org Mon Dec 01 10:33:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 01 Dec 2025 10:33:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1175694.1500301 (Exim 4.92) (envelope-from ) id 1vQ1DN-0007RS-5G; Mon, 01 Dec 2025 10:33:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1175694.1500301; Mon, 01 Dec 2025 10:33:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ1DN-0007RK-1a; Mon, 01 Dec 2025 10:33:05 +0000 Received: by outflank-mailman (input) for mailman id 1175694; Mon, 01 Dec 2025 10:33:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ1DL-0007RE-Lp for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 10:33:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQ1DK-001MzL-1h for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 10:33:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQ1DK-007vEk-1W for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 10:33:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=rHdZmzXtLntT00E1jiYpYTpJIg7AisKDt7+r+YW5Jjs=; b=zueKMTsoifpYv9sgyPHnt2jnVy RgELYsQApZpGspJKNXhVU+hd1JH7+x+Okb5jPMtO4yiCsq0FadyyFlTilzkIusy1agzrk54Citj9e bFORhjnp0Fs6T2aVBAjv0FRlnfG1wDsfYgnxcDUzZrJANYTp5iq9l7SF0JF/5KJAQRvE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] symbols/ppc: re-number intermediate files Message-Id: Date: Mon, 01 Dec 2025 10:33:02 +0000 commit 6bd77e96085c7aa7e7b918e1299c98d18ea18869 Author: Jan Beulich AuthorDate: Mon Dec 1 10:11:20 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 1 10:11:20 2025 +0100 symbols/ppc: re-number intermediate files In preparation to do away with symbols-dummy, re-number the assembly and object files used, for the numbers to match the next passes real output. This is to make 0 available to use for what now is handled by symbols-dummy. Signed-off-by: Jan Beulich Reviewed-by: Timothy Pearson --- xen/arch/ppc/Makefile | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/xen/arch/ppc/Makefile b/xen/arch/ppc/Makefile index cf27bcebb2..502ebdcde1 100644 --- a/xen/arch/ppc/Makefile +++ b/xen/arch/ppc/Makefile @@ -16,16 +16,16 @@ $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds $(objtree)/common/symbols-dummy.o -o $(dot-target).0 $(NM) -pa --format=sysv $(dot-target).0 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ - > $(dot-target).0.S - $(MAKE) $(build)=$(@D) $(dot-target).0.o + > $(dot-target).1.S + $(MAKE) $(build)=$(@D) $(dot-target).1.o $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \ - $(dot-target).0.o -o $(dot-target).1 + $(dot-target).1.o -o $(dot-target).1 $(NM) -pa --format=sysv $(dot-target).1 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ - > $(dot-target).1.S - $(MAKE) $(build)=$(@D) $(dot-target).1.o + > $(dot-target).2.S + $(MAKE) $(build)=$(@D) $(dot-target).2.o $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ - $(dot-target).1.o -o $@ + $(dot-target).2.o -o $@ $(NM) -pa --format=sysv $@ \ | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > $@.map -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Mon Dec 01 10:33:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 01 Dec 2025 10:33:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1175695.1500304 (Exim 4.92) (envelope-from ) id 1vQ1DV-0007T9-5j; Mon, 01 Dec 2025 10:33:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1175695.1500304; Mon, 01 Dec 2025 10:33:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ1DV-0007T0-2v; Mon, 01 Dec 2025 10:33:13 +0000 Received: by outflank-mailman (input) for mailman id 1175695; Mon, 01 Dec 2025 10:33:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ1DU-0007Ss-Lm for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 10:33:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQ1DU-001Mzh-22 for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 10:33:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQ1DU-007wQT-1v for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 10:33:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=cPQOX/6lg0aZLIAJk0DqwTqf9K5ssLvMeo0808JghIw=; b=oSAh0U+yuVuHvl8L7pmiN4NBMw mBn+PT0LTZUa8MJQ2Wne6+lXI8eU7lriyvj785IWI52OuYZePAnWqtt7zNPtDYDuYzpEqx0jbJdvb Rm6WA2Ts4HVhc+frczEtTRNtqnle3ehR+3e/3oJP7GvnHrCHbwdbn1eXeQSyREUrjW2Y=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] symbols/ppc: don't use symbols-dummy Message-Id: Date: Mon, 01 Dec 2025 10:33:12 +0000 commit 97eb85671ab08411b66fe136f2d3dcaa5618e0fa Author: Jan Beulich AuthorDate: Mon Dec 1 10:11:51 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 1 10:11:51 2025 +0100 symbols/ppc: don't use symbols-dummy In particular when linking with lld, which converts hidden symbols to local ones, the ELF symbol table can change in unhelpful ways between the first two linking passes, resulting in the .rodata contributions to change between the 2nd and 3rd pass. That, however, renders our embedded symbol table pretty much unusable; the recently introduced self-test may then also fail. (Another difference between compiling a C file and assembling the generated ones is that - with -fdata-sections in use - the .rodata contributions move between passes 1 and 2, when we'd prefer them not to.) Signed-off-by: Jan Beulich Reviewed-by: Timothy Pearson --- xen/arch/ppc/Makefile | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/xen/arch/ppc/Makefile b/xen/arch/ppc/Makefile index 502ebdcde1..e80690d3b8 100644 --- a/xen/arch/ppc/Makefile +++ b/xen/arch/ppc/Makefile @@ -12,8 +12,10 @@ $(TARGET): $(TARGET)-syms cp -f $< $@ $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds + $(objtree)/tools/symbols $(all_symbols) --empty > $(dot-target).0.S + $(MAKE) $(build)=$(@D) $(dot-target).0.o $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \ - $(objtree)/common/symbols-dummy.o -o $(dot-target).0 + $(dot-target).0.o -o $(dot-target).0 $(NM) -pa --format=sysv $(dot-target).0 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > $(dot-target).1.S -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Mon Dec 01 10:33:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 01 Dec 2025 10:33:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1175696.1500307 (Exim 4.92) (envelope-from ) id 1vQ1Df-0007VO-6r; Mon, 01 Dec 2025 10:33:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1175696.1500307; Mon, 01 Dec 2025 10:33:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ1Df-0007VG-4C; Mon, 01 Dec 2025 10:33:23 +0000 Received: by outflank-mailman (input) for mailman id 1175696; Mon, 01 Dec 2025 10:33:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ1De-0007V8-OC for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 10:33:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQ1De-001N0A-2J for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 10:33:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQ1De-007xaE-2C for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 10:33:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=h9IXxYh54dMJzpIB76kjKKBfq07L6qaSo2mFpTqcYd0=; b=SPaSOiBpiFEPhg4fbR7tMerUMv UVDh/+dvYE/bwrIxH30I1cfzwGVZPNzt0X2r3AjhAit7zJu7YRr7QhXVr+sx6EdWxqc5xy5Qr0g2+ SGjXNsubVmSBuSB+XxWUeQCXN+8TLEfXv2BzHxHkUUq4mzU+ISQBga1EMA3GbpuFPYYE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] symbols/riscv: re-number intermediate files Message-Id: Date: Mon, 01 Dec 2025 10:33:22 +0000 commit 20db519676e6953b1b839bda82a70a07f326f47d Author: Jan Beulich AuthorDate: Mon Dec 1 10:12:16 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 1 10:12:16 2025 +0100 symbols/riscv: re-number intermediate files In preparation to do away with symbols-dummy, re-number the assembly and object files used, for the numbers to match the next passes real output. This is to make 0 available to use for what now is handled by symbols-dummy. Signed-off-by: Jan Beulich Reviewed-By: Oleksii Kurochko --- xen/arch/riscv/Makefile | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index e2b8aa42c8..598d1ded9b 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -26,16 +26,16 @@ $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds $(objtree)/common/symbols-dummy.o -o $(dot-target).0 $(NM) -pa --format=sysv $(dot-target).0 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ - > $(dot-target).0.S - $(MAKE) $(build)=$(@D) $(dot-target).0.o + > $(dot-target).1.S + $(MAKE) $(build)=$(@D) $(dot-target).1.o $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \ - $(dot-target).0.o -o $(dot-target).1 + $(dot-target).1.o -o $(dot-target).1 $(NM) -pa --format=sysv $(dot-target).1 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ - > $(dot-target).1.S - $(MAKE) $(build)=$(@D) $(dot-target).1.o + > $(dot-target).2.S + $(MAKE) $(build)=$(@D) $(dot-target).2.o $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ - $(dot-target).1.o -o $@ + $(dot-target).2.o -o $@ $(NM) -pa --format=sysv $@ \ | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > $@.map -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Mon Dec 01 10:33:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 01 Dec 2025 10:33:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1175697.1500312 (Exim 4.92) (envelope-from ) id 1vQ1Dp-0007Xd-8N; Mon, 01 Dec 2025 10:33:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1175697.1500312; Mon, 01 Dec 2025 10:33:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ1Dp-0007XV-5e; Mon, 01 Dec 2025 10:33:33 +0000 Received: by outflank-mailman (input) for mailman id 1175697; Mon, 01 Dec 2025 10:33:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ1Do-0007XP-S3 for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 10:33:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQ1Do-001N2f-2f for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 10:33:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQ1Do-007ynd-2T for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 10:33:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=RX+LjXghu8tIeK5UL1Ad+xpO5aVrj2N49P5w49ZArg8=; b=mXD4wNf+NTvouQjzEizxwb4wz9 Ros0+eGiBdFoqi75yYUUGsREKY8DuHa/zWjdPdr1zwbuSoQowcnHP3DbEeFtRY49BMi2GZtewfI9x vzneEzoAJgK3wnL0jxQFfQlt+BDaJDAy6VMOOSSYWDLVu2NzPz6QKL+sLsey+47Js17o=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] symbols/riscv: don't use symbols-dummy Message-Id: Date: Mon, 01 Dec 2025 10:33:32 +0000 commit d00cb14893065b017d09d07badae51b989825503 Author: Jan Beulich AuthorDate: Mon Dec 1 10:12:27 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 1 10:12:27 2025 +0100 symbols/riscv: don't use symbols-dummy In particular when linking with lld, which converts hidden symbols to local ones, the ELF symbol table can change in unhelpful ways between the first two linking passes, resulting in the .rodata contributions to change between the 2nd and 3rd pass. That, however, renders our embedded symbol table pretty much unusable; the recently introduced self-test may then also fail. (Another difference between compiling a C file and assembling the generated ones is that - with -fdata-sections in use - the .rodata contributions move between passes 1 and 2, when we'd prefer them not to.) Signed-off-by: Jan Beulich Reviewed-By: Oleksii Kurochko --- xen/arch/riscv/Makefile | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 598d1ded9b..d667234949 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -22,8 +22,10 @@ $(TARGET): $(TARGET)-syms $(OBJCOPY) -O binary -S $< $@ $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds + $(objtree)/tools/symbols $(all_symbols) --empty > $(dot-target).0.S + $(MAKE) $(build)=$(@D) $(dot-target).0.o $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \ - $(objtree)/common/symbols-dummy.o -o $(dot-target).0 + $(dot-target).0.o -o $(dot-target).0 $(NM) -pa --format=sysv $(dot-target).0 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > $(dot-target).1.S -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Mon Dec 01 10:33:43 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 01 Dec 2025 10:33:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1175698.1500316 (Exim 4.92) (envelope-from ) id 1vQ1Dz-0007Zh-9i; Mon, 01 Dec 2025 10:33:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1175698.1500316; Mon, 01 Dec 2025 10:33:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ1Dz-0007Za-6x; Mon, 01 Dec 2025 10:33:43 +0000 Received: by outflank-mailman (input) for mailman id 1175698; Mon, 01 Dec 2025 10:33:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ1Dy-0007ZU-US for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 10:33:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQ1Dy-001N2o-2w for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 10:33:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQ1Dy-00805x-2q for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 10:33:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=eoeTH2zS9TVTnWdMbwvksIplxRvZjsxXTaBcE8poY3I=; b=LcF9M3E5hRTfI3n0ZJZcj8k1Yy VQyC5CF5oLfDaClbNSHDtGWNbazcyNAPpYJ1EL/khruyvUVhChEfIMTGL2y/rPZok4xq2PKXlNrho 4ytjSDj+wHeaF4phi34XzBfbtvYUyvcfwlT/dnjjxi6pHwRHqEZgXEjkBWIefrL0bv1Y=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/ept: Drop shadow mode check in ept_sync_domain() Message-Id: Date: Mon, 01 Dec 2025 10:33:42 +0000 commit bea8b179138b5c1f99c9ab953a64627118aaf932 Author: Teddy Astie AuthorDate: Mon Dec 1 10:12:58 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 1 10:12:58 2025 +0100 x86/ept: Drop shadow mode check in ept_sync_domain() This function can only be reached from EPT-related code which is inherently HAP. Thus it is not useful to check for shadow_paging (or lack of HAP) there. Moreover, it is an error to call this function in the non-EPT cases. Not a functional change. Signed-off-by: Teddy Astie Reviewed-by: Jan Beulich --- xen/arch/x86/mm/p2m-ept.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c index ce4ef632ae..dfdbfa0afe 100644 --- a/xen/arch/x86/mm/p2m-ept.c +++ b/xen/arch/x86/mm/p2m-ept.c @@ -1268,9 +1268,10 @@ static void ept_sync_domain_mask(struct p2m_domain *p2m, const cpumask_t *mask) void ept_sync_domain(struct p2m_domain *p2m) { struct domain *d = p2m->domain; + ASSERT(hap_enabled(d)); - /* Only if using EPT and this domain has some VCPUs to dirty. */ - if ( paging_mode_shadow(d) || !d->vcpu || !d->vcpu[0] ) + /* Only if this domain has some VCPUs to dirty. */ + if ( !d->vcpu || !d->vcpu[0] ) return; ept_sync_domain_prepare(p2m); -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Mon Dec 01 14:44:08 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 01 Dec 2025 14:44:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1175761.1500381 (Exim 4.92) (envelope-from ) id 1vQ58G-0005xT-N8; Mon, 01 Dec 2025 14:44:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1175761.1500381; Mon, 01 Dec 2025 14:44:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ58G-0005xL-K8; Mon, 01 Dec 2025 14:44:04 +0000 Received: by outflank-mailman (input) for mailman id 1175761; Mon, 01 Dec 2025 14:44:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ58E-0005wW-T3 for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 14:44:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQ58E-001S98-1J for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 14:44:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQ58E-005Oxa-1C for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 14:44:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=o9LRtFBp1bjuqbJZgibDVTzkjcEtnGwruEGJVZPnj0Q=; b=RACRUf84hkwollnA0gZBApz3Vq ojzwGiA5gsD9Nmu+yI5K6DMp83gbmrdI/VLQH8qodEFJ3dWOF0ywpnOOH0UDwMG21CjngRuF7OlKd kZ3cZlVy2tEbOwyDijNtyfjuh6dFnYal9JrRKm9EVwfjtT3nG3dIIXfSGw2ZuRSCB6Qc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] symbols/ppc: re-number intermediate files Message-Id: Date: Mon, 01 Dec 2025 14:44:02 +0000 commit 6bd77e96085c7aa7e7b918e1299c98d18ea18869 Author: Jan Beulich AuthorDate: Mon Dec 1 10:11:20 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 1 10:11:20 2025 +0100 symbols/ppc: re-number intermediate files In preparation to do away with symbols-dummy, re-number the assembly and object files used, for the numbers to match the next passes real output. This is to make 0 available to use for what now is handled by symbols-dummy. Signed-off-by: Jan Beulich Reviewed-by: Timothy Pearson --- xen/arch/ppc/Makefile | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/xen/arch/ppc/Makefile b/xen/arch/ppc/Makefile index cf27bcebb2..502ebdcde1 100644 --- a/xen/arch/ppc/Makefile +++ b/xen/arch/ppc/Makefile @@ -16,16 +16,16 @@ $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds $(objtree)/common/symbols-dummy.o -o $(dot-target).0 $(NM) -pa --format=sysv $(dot-target).0 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ - > $(dot-target).0.S - $(MAKE) $(build)=$(@D) $(dot-target).0.o + > $(dot-target).1.S + $(MAKE) $(build)=$(@D) $(dot-target).1.o $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \ - $(dot-target).0.o -o $(dot-target).1 + $(dot-target).1.o -o $(dot-target).1 $(NM) -pa --format=sysv $(dot-target).1 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ - > $(dot-target).1.S - $(MAKE) $(build)=$(@D) $(dot-target).1.o + > $(dot-target).2.S + $(MAKE) $(build)=$(@D) $(dot-target).2.o $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ - $(dot-target).1.o -o $@ + $(dot-target).2.o -o $@ $(NM) -pa --format=sysv $@ \ | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > $@.map -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Mon Dec 01 14:44:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 01 Dec 2025 14:44:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1175762.1500386 (Exim 4.92) (envelope-from ) id 1vQ58P-00063N-Oh; Mon, 01 Dec 2025 14:44:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1175762.1500386; Mon, 01 Dec 2025 14:44:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ58P-00063F-LL; Mon, 01 Dec 2025 14:44:13 +0000 Received: by outflank-mailman (input) for mailman id 1175762; Mon, 01 Dec 2025 14:44:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ58O-00062Y-Gu for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 14:44:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQ58O-001S9F-1a for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 14:44:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQ58O-005P7T-1U for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 14:44:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=VUKuWg3dYvdD+breLStA7W0uk1KCfRNhUeO5dn/f+Sc=; b=SEmhbFopTfxiimq7X4uW7V/xq9 6Wvchw/aIUF7VD3t/822WCQIecXov0y5XHVpoBVTXrZgRYO8Gqyj5TMMLDxIO8oOjKDsQVzDaRnLJ 02NQ26w1yYwrgu/x2RQ3XZzGQgo0VSq8oLiA0WhQSeYqrS64pkPwIbe7yGPSkwJ+hum0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] symbols/ppc: don't use symbols-dummy Message-Id: Date: Mon, 01 Dec 2025 14:44:12 +0000 commit 97eb85671ab08411b66fe136f2d3dcaa5618e0fa Author: Jan Beulich AuthorDate: Mon Dec 1 10:11:51 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 1 10:11:51 2025 +0100 symbols/ppc: don't use symbols-dummy In particular when linking with lld, which converts hidden symbols to local ones, the ELF symbol table can change in unhelpful ways between the first two linking passes, resulting in the .rodata contributions to change between the 2nd and 3rd pass. That, however, renders our embedded symbol table pretty much unusable; the recently introduced self-test may then also fail. (Another difference between compiling a C file and assembling the generated ones is that - with -fdata-sections in use - the .rodata contributions move between passes 1 and 2, when we'd prefer them not to.) Signed-off-by: Jan Beulich Reviewed-by: Timothy Pearson --- xen/arch/ppc/Makefile | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/xen/arch/ppc/Makefile b/xen/arch/ppc/Makefile index 502ebdcde1..e80690d3b8 100644 --- a/xen/arch/ppc/Makefile +++ b/xen/arch/ppc/Makefile @@ -12,8 +12,10 @@ $(TARGET): $(TARGET)-syms cp -f $< $@ $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds + $(objtree)/tools/symbols $(all_symbols) --empty > $(dot-target).0.S + $(MAKE) $(build)=$(@D) $(dot-target).0.o $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \ - $(objtree)/common/symbols-dummy.o -o $(dot-target).0 + $(dot-target).0.o -o $(dot-target).0 $(NM) -pa --format=sysv $(dot-target).0 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > $(dot-target).1.S -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Mon Dec 01 14:44:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 01 Dec 2025 14:44:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1175765.1500387 (Exim 4.92) (envelope-from ) id 1vQ58Z-00067i-PF; Mon, 01 Dec 2025 14:44:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1175765.1500387; Mon, 01 Dec 2025 14:44:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ58Z-00067a-Mh; Mon, 01 Dec 2025 14:44:23 +0000 Received: by outflank-mailman (input) for mailman id 1175765; Mon, 01 Dec 2025 14:44:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ58Y-00067A-K3 for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 14:44:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQ58Y-001S9a-1u for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 14:44:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQ58Y-005PHU-1k for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 14:44:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=rkQuB0/lwFLhY9xPy505MBShFWBbQywWA+VIswSUsF0=; b=ewB3lai7uPT3xeKT/iqpG/23K2 JVNF81Plbjd7a6QfJQOkE3ixlPAXYKJMrmlYcJIaiMUIxebfWNdox/CDr6GC+alv7GU8tl+8T7WuK w8qk3quGHlCOHV9th9cj04P9dGqCa4X7ixsb4+EJ7v6l4KakgaRixafNcpvoHv2QFsLo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] symbols/riscv: re-number intermediate files Message-Id: Date: Mon, 01 Dec 2025 14:44:22 +0000 commit 20db519676e6953b1b839bda82a70a07f326f47d Author: Jan Beulich AuthorDate: Mon Dec 1 10:12:16 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 1 10:12:16 2025 +0100 symbols/riscv: re-number intermediate files In preparation to do away with symbols-dummy, re-number the assembly and object files used, for the numbers to match the next passes real output. This is to make 0 available to use for what now is handled by symbols-dummy. Signed-off-by: Jan Beulich Reviewed-By: Oleksii Kurochko --- xen/arch/riscv/Makefile | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index e2b8aa42c8..598d1ded9b 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -26,16 +26,16 @@ $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds $(objtree)/common/symbols-dummy.o -o $(dot-target).0 $(NM) -pa --format=sysv $(dot-target).0 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ - > $(dot-target).0.S - $(MAKE) $(build)=$(@D) $(dot-target).0.o + > $(dot-target).1.S + $(MAKE) $(build)=$(@D) $(dot-target).1.o $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \ - $(dot-target).0.o -o $(dot-target).1 + $(dot-target).1.o -o $(dot-target).1 $(NM) -pa --format=sysv $(dot-target).1 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ - > $(dot-target).1.S - $(MAKE) $(build)=$(@D) $(dot-target).1.o + > $(dot-target).2.S + $(MAKE) $(build)=$(@D) $(dot-target).2.o $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ - $(dot-target).1.o -o $@ + $(dot-target).2.o -o $@ $(NM) -pa --format=sysv $@ \ | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > $@.map -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Mon Dec 01 14:44:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 01 Dec 2025 14:44:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1175771.1500392 (Exim 4.92) (envelope-from ) id 1vQ58j-0006HB-Qc; Mon, 01 Dec 2025 14:44:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1175771.1500392; Mon, 01 Dec 2025 14:44:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ58j-0006H3-O4; Mon, 01 Dec 2025 14:44:33 +0000 Received: by outflank-mailman (input) for mailman id 1175771; Mon, 01 Dec 2025 14:44:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ58i-0006Gu-Ml for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 14:44:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQ58i-001S9e-2B for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 14:44:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQ58i-005PRv-24 for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 14:44:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Lv05Cr4CQm1UvnNC0Q9RKiAojwDkQ35i3YLjmCaZUQg=; b=MJ0VRHl7h4opagL/I4RqBENc+R zuvNiDXoPvy0FYQmjgCKunv7+TP0pLTQMudp5IJ5wc/RSZaTTH3ZvMbf8kbYkyaZ+cIYQeND6wKjD Y04PNtb+4KEgcezlUOdH/3oHMLoAZLss4l7DX/cpAl+ercW/C/nfpVWR8wpuLKrOjwLI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] symbols/riscv: don't use symbols-dummy Message-Id: Date: Mon, 01 Dec 2025 14:44:32 +0000 commit d00cb14893065b017d09d07badae51b989825503 Author: Jan Beulich AuthorDate: Mon Dec 1 10:12:27 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 1 10:12:27 2025 +0100 symbols/riscv: don't use symbols-dummy In particular when linking with lld, which converts hidden symbols to local ones, the ELF symbol table can change in unhelpful ways between the first two linking passes, resulting in the .rodata contributions to change between the 2nd and 3rd pass. That, however, renders our embedded symbol table pretty much unusable; the recently introduced self-test may then also fail. (Another difference between compiling a C file and assembling the generated ones is that - with -fdata-sections in use - the .rodata contributions move between passes 1 and 2, when we'd prefer them not to.) Signed-off-by: Jan Beulich Reviewed-By: Oleksii Kurochko --- xen/arch/riscv/Makefile | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 598d1ded9b..d667234949 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -22,8 +22,10 @@ $(TARGET): $(TARGET)-syms $(OBJCOPY) -O binary -S $< $@ $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds + $(objtree)/tools/symbols $(all_symbols) --empty > $(dot-target).0.S + $(MAKE) $(build)=$(@D) $(dot-target).0.o $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \ - $(objtree)/common/symbols-dummy.o -o $(dot-target).0 + $(dot-target).0.o -o $(dot-target).0 $(NM) -pa --format=sysv $(dot-target).0 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > $(dot-target).1.S -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Mon Dec 01 14:44:44 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 01 Dec 2025 14:44:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1175775.1500396 (Exim 4.92) (envelope-from ) id 1vQ58u-0006L5-Rx; Mon, 01 Dec 2025 14:44:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1175775.1500396; Mon, 01 Dec 2025 14:44:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ58u-0006Kx-PS; Mon, 01 Dec 2025 14:44:44 +0000 Received: by outflank-mailman (input) for mailman id 1175775; Mon, 01 Dec 2025 14:44:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ58s-0006Kn-Q3 for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 14:44:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQ58s-001S9m-2V for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 14:44:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQ58s-005Pcq-2M for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 14:44:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=pLMTtPkwtl+iaYz5+OD90y/iD52DGfHf98jYjPRDFCY=; b=SeGTbfI2w9YUz8vOu2xaGijlqa F9OUstwLwTuE/yWjTf5HUcLGtMjBUWiX7OO19UzXB3acF97lGOw6EXoFkYlFgRcwzAgGllJJguVTR 1Nh0c4epS9bA2/s/YbHhfdCtVkscL/5kEz1ZJbG+iA8gdFnac3ZNef+5s+ymJW6/df2g=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/ept: Drop shadow mode check in ept_sync_domain() Message-Id: Date: Mon, 01 Dec 2025 14:44:42 +0000 commit bea8b179138b5c1f99c9ab953a64627118aaf932 Author: Teddy Astie AuthorDate: Mon Dec 1 10:12:58 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 1 10:12:58 2025 +0100 x86/ept: Drop shadow mode check in ept_sync_domain() This function can only be reached from EPT-related code which is inherently HAP. Thus it is not useful to check for shadow_paging (or lack of HAP) there. Moreover, it is an error to call this function in the non-EPT cases. Not a functional change. Signed-off-by: Teddy Astie Reviewed-by: Jan Beulich --- xen/arch/x86/mm/p2m-ept.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c index ce4ef632ae..dfdbfa0afe 100644 --- a/xen/arch/x86/mm/p2m-ept.c +++ b/xen/arch/x86/mm/p2m-ept.c @@ -1268,9 +1268,10 @@ static void ept_sync_domain_mask(struct p2m_domain *p2m, const cpumask_t *mask) void ept_sync_domain(struct p2m_domain *p2m) { struct domain *d = p2m->domain; + ASSERT(hap_enabled(d)); - /* Only if using EPT and this domain has some VCPUs to dirty. */ - if ( paging_mode_shadow(d) || !d->vcpu || !d->vcpu[0] ) + /* Only if this domain has some VCPUs to dirty. */ + if ( !d->vcpu || !d->vcpu[0] ) return; ept_sync_domain_prepare(p2m); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Mon Dec 01 17:44:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 01 Dec 2025 17:44:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1175935.1500519 (Exim 4.92) (envelope-from ) id 1vQ7wS-0001qk-Tp; Mon, 01 Dec 2025 17:44:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1175935.1500519; Mon, 01 Dec 2025 17:44:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ7wS-0001qc-RM; Mon, 01 Dec 2025 17:44:04 +0000 Received: by outflank-mailman (input) for mailman id 1175935; Mon, 01 Dec 2025 17:44:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ7wR-0001qW-QK for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 17:44:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQ7wR-001WVA-1T for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 17:44:03 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQ7wR-00EBkM-1H for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 17:44:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ihhomy9EJXi/0HSic4leaoh7SX/42/6AlHW/43oRyUM=; b=Jbhh+6ho+EbdZduwGoAKUqcgJp d20TiXEJ1hzSU/FEmu9xFUUdCTWRM2qLN3XrWM1Bcw7AWcqSWNgfYzzdCLbnaGOatt8M5pqy6H49g FmkZSjCBzhyorLXgo1xFKKF8pPPBpTYLyWeZ9nxhXVKdB1/zi9e+pgFOhCzAXoNXahNM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/amd: Use setup_force_cpu_cap() for BTC_NO Message-Id: Date: Mon, 01 Dec 2025 17:44:03 +0000 commit dcfcc4acabf9b84b3b9ba32f2d19241c4897c0ec Author: Andrew Cooper AuthorDate: Tue Nov 25 18:18:33 2025 +0000 Commit: Andrew Cooper CommitDate: Mon Dec 1 16:20:41 2025 +0000 x86/amd: Use setup_force_cpu_cap() for BTC_NO A XenServer feature in the process of being upstreamed is to be able to re-calculate the guest CPU Policies at runtime, e.g. after a microcode load and/or livepatch to expose new functionality. Right now, upstream Xen only rescans the Raw CPU Policy on microcode load. One complication with recalculating the guest policies is that BTC_NO is handled differently to other $FOO_NO bits, by using __set_bit() rather than setup_force_cpu_cap(). For consistency, switch it to using setup_force_cpu_cap(). This doesn't matter for upstream Xen right now, but it will ease upstreaming the feature. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/cpu/amd.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index 805a8189e6..b3e12b084c 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -1115,8 +1115,9 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) * Branch Type Confusion, but predate the allocation of the * BTC_NO bit. Fill it back in if we're not virtualised. */ - if (!cpu_has_hypervisor && !cpu_has(c, X86_FEATURE_BTC_NO)) - __set_bit(X86_FEATURE_BTC_NO, c->x86_capability); + if (c == &boot_cpu_data && !cpu_has_hypervisor && + !cpu_has(c, X86_FEATURE_BTC_NO)) + setup_force_cpu_cap(X86_FEATURE_BTC_NO); break; } -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Mon Dec 01 17:44:15 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 01 Dec 2025 17:44:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1175936.1500523 (Exim 4.92) (envelope-from ) id 1vQ7wc-0001s1-VI; Mon, 01 Dec 2025 17:44:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1175936.1500523; Mon, 01 Dec 2025 17:44:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ7wc-0001rw-Sf; Mon, 01 Dec 2025 17:44:14 +0000 Received: by outflank-mailman (input) for mailman id 1175936; Mon, 01 Dec 2025 17:44:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ7wb-0001rj-M3 for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 17:44:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQ7wb-001WVG-24 for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 17:44:13 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQ7wb-00EDCl-1w for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 17:44:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=pAjUHZXRPjYI/qsmp1E860n3W0lusfbw7kKZfuSmdOU=; b=ivPZd/4RfGRvMnBYR7PdqHClK4 N533FzUJpjpjpCAelVhfhytoXhxK42Xf4yqY3FIyvd32BSaxreF7sPrFmw4riod+xRHIxfXHkPwgv pKiU0wRmBAPeI9twx54hFyvaAQRziPLyMWuLbIcHv7s9CMO/1NKgZnLorb4IezF2GMmw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/amd: Fix race editing DE_CFG Message-Id: Date: Mon, 01 Dec 2025 17:44:13 +0000 commit d0c75dc4c028bc32fd9cf1d4358973929548de54 Author: Andrew Cooper AuthorDate: Tue Nov 25 13:48:36 2025 +0000 Commit: Andrew Cooper CommitDate: Mon Dec 1 16:20:41 2025 +0000 x86/amd: Fix race editing DE_CFG We have two different functions explaining that DE_CFG is Core-scoped and that writes are racy but happen to be safe. This is only true when there's one of them. Introduce amd_init_de_cfg() to be the singular function which writes to DE_CFG, modelled after the logic we already have for BP_CFG. While reworking amd_check_zenbleed() into a simple predicate used by amd_init_de_cfg(), fix the microcode table. The 'good_rev' was specific to an individual stepping and not valid to be matched by model, let alone a range. The only CPUs incorrectly matched that I can locate appear to be pre-production, and probably didn't get Zenbleed microcode. Rework amd_init_lfence() to be amd_init_lfence_dispatch() with only the purpose of configuring X86_FEATURE_LFENCE_DISPATCH in the case that it needs synthesising. Run it on the BSP only and use setup_force_cpu_cap() to prevent the bit disappearing on a subseuqent CPUID rescan. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/arch/x86/cpu/amd.c | 224 +++++++++++++++++++++++------------------------ xen/arch/x86/cpu/cpu.h | 3 +- xen/arch/x86/cpu/hygon.c | 6 +- 3 files changed, 115 insertions(+), 118 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index b3e12b084c..47c109f898 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -644,45 +644,6 @@ void amd_log_freq(const struct cpuinfo_x86 *c) printk("CPU%u: %u MHz\n", smp_processor_id(), low_mhz); } -void amd_init_lfence(struct cpuinfo_x86 *c) -{ - uint64_t value; - - /* - * Some hardware has LFENCE dispatch serialising always enabled, - * nothing to do on that case. - */ - if (test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability)) - return; - - /* - * Attempt to set lfence to be Dispatch Serialising. This MSR almost - * certainly isn't virtualised (and Xen at least will leak the real - * value in but silently discard writes), as well as being per-core - * rather than per-thread, so do a full safe read/write/readback cycle - * in the worst case. - */ - if (rdmsr_safe(MSR_AMD64_DE_CFG, &value)) - /* Unable to read. Assume the safer default. */ - __clear_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); - else if (value & AMD64_DE_CFG_LFENCE_SERIALISE) - /* Already dispatch serialising. */ - __set_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); - else if (wrmsr_safe(MSR_AMD64_DE_CFG, - value | AMD64_DE_CFG_LFENCE_SERIALISE) || - rdmsr_safe(MSR_AMD64_DE_CFG, &value) || - !(value & AMD64_DE_CFG_LFENCE_SERIALISE)) - /* Attempt to set failed. Assume the safer default. */ - __clear_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); - else - /* Successfully enabled! */ - __set_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); -} - /* * Refer to the AMD Speculative Store Bypass whitepaper: * https://developer.amd.com/wp-content/resources/124441_AMD64_SpeculativeStoreBypassDisable_Whitepaper_final.pdf @@ -876,76 +837,6 @@ void __init detect_zen2_null_seg_behaviour(void) } -static void amd_check_zenbleed(void) -{ - const struct cpu_signature *sig = &this_cpu(cpu_sig); - unsigned int good_rev; - uint64_t val, old_val, chickenbit = (1 << 9); - - /* - * If we're virtualised, we can't do family/model checks safely, and - * we likely wouldn't have access to DE_CFG even if we could see a - * microcode revision. - * - * A hypervisor may hide AVX as a stopgap mitigation. We're not in a - * position to care either way. An admin doesn't want to be disabling - * AVX as a mitigation on any build of Xen with this logic present. - */ - if (cpu_has_hypervisor || boot_cpu_data.x86 != 0x17) - return; - - switch (boot_cpu_data.x86_model) { - case 0x30 ... 0x3f: good_rev = 0x0830107a; break; - case 0x60 ... 0x67: good_rev = 0x0860010b; break; - case 0x68 ... 0x6f: good_rev = 0x08608105; break; - case 0x70 ... 0x7f: good_rev = 0x08701032; break; - case 0xa0 ... 0xaf: good_rev = 0x08a00008; break; - default: - /* - * With the Fam17h check above, most parts getting here are - * Zen1. They're not affected. Assume Zen2 ones making it - * here are affected regardless of microcode version. - */ - if (is_zen1_uarch()) - return; - good_rev = ~0U; - break; - } - - rdmsrl(MSR_AMD64_DE_CFG, val); - old_val = val; - - /* - * Microcode is the preferred mitigation, in terms of performance. - * However, without microcode, this chickenbit (specific to the Zen2 - * uarch) disables Floating Point Mov-Elimination to mitigate the - * issue. - */ - val &= ~chickenbit; - if (sig->rev < good_rev) - val |= chickenbit; - - if (val == old_val) - /* Nothing to change. */ - return; - - /* - * DE_CFG is a Core-scoped MSR, and this write is racy during late - * microcode load. However, both threads calculate the new value from - * state which is shared, and unrelated to the old value, so the - * result should be consistent. - */ - wrmsrl(MSR_AMD64_DE_CFG, val); - - /* - * Inform the admin that we changed something, but don't spam, - * especially during a late microcode load. - */ - if (smp_processor_id() == 0) - printk(XENLOG_INFO "Zenbleed mitigation - using %s\n", - val & chickenbit ? "chickenbit" : "microcode"); -} - static void cf_check fam17_disable_c6(void *arg) { /* Disable C6 by clearing the CCR{0,1,2}_CC6EN bits. */ @@ -972,6 +863,109 @@ static void cf_check fam17_disable_c6(void *arg) wrmsrl(MSR_AMD_CSTATE_CFG, val & mask); } +static bool zenbleed_use_chickenbit(void) +{ + unsigned int curr_rev; + uint8_t fixed_rev; + + /* Zenbleed only affects Zen2. Nothing to do on non-Fam17h systems. */ + if ( boot_cpu_data.family != 0x17 ) + return false; + + curr_rev = this_cpu(cpu_sig).rev; + switch ( curr_rev >> 8 ) + { + case 0x083010: fixed_rev = 0x7a; break; + case 0x086001: fixed_rev = 0x0b; break; + case 0x086081: fixed_rev = 0x05; break; + case 0x087010: fixed_rev = 0x32; break; + case 0x08a000: fixed_rev = 0x08; break; + default: + /* + * With the Fam17h check above, most parts getting here are Zen1. + * They're not affected. Assume Zen2 ones making it here are affected + * regardless of microcode version. + */ + return is_zen2_uarch(); + } + + return (uint8_t)curr_rev >= fixed_rev; +} + +void amd_init_de_cfg(const struct cpuinfo_x86 *c) +{ + uint64_t val, new = 0; + + /* + * The MSR doesn't exist on Fam 0xf/0x11. If virtualised, we won't have + * mutable access even if we can read it. + */ + if ( c->family == 0xf || c->family == 0x11 || cpu_has_hypervisor ) + return; + + /* + * On Zen3 (Fam 0x19) and later CPUs, LFENCE is unconditionally dispatch + * serialising, and is enumerated in CPUID. + * + * On older systems, LFENCE is unconditionally dispatch serialising (when + * the MSR doesn't exist), or can be made so by setting this bit. + */ + if ( !test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability) ) + new |= AMD64_DE_CFG_LFENCE_SERIALISE; + + /* + * If vulnerable to Zenbleed and not mitigated in microcode, use the + * bigger hammer. + */ + if ( zenbleed_use_chickenbit() ) + new |= (1 << 9); + + /* Avoid reading DE_CFG if we don't intend to change anything. */ + if ( !new ) + return; + + val = rdmsr(MSR_AMD64_DE_CFG); + + if ( (val & new) == new ) + return; + + /* + * DE_CFG is a Core-scoped MSR, and this write is racy. However, both + * threads calculate the new value from state which expected to be + * consistent across CPUs and unrelated to the old value, so the result + * should be consistent. + */ + wrmsr(MSR_AMD64_DE_CFG, val | new); +} + +void __init amd_init_lfence_dispatch(void) +{ + struct cpuinfo_x86 *c = &boot_cpu_data; + uint64_t val; + + if ( test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability) ) + /* LFENCE is forced dispatch serialising and we can't control it. */ + return; + + if ( c->family == 0xf || c->family == 0x11 ) + /* MSR doesn't exist, LFENCE is dispatch serialising. */ + goto set; + + if ( rdmsr_safe(MSR_AMD64_DE_CFG, &val) ) + /* Unable to read. Assume the safer default. */ + goto clear; + + if ( val & AMD64_DE_CFG_LFENCE_SERIALISE ) + goto set; + + clear: + setup_clear_cpu_cap(X86_FEATURE_LFENCE_DISPATCH); + return; + + set: + setup_force_cpu_cap(X86_FEATURE_LFENCE_DISPATCH); +} + static void amd_check_bp_cfg(void) { uint64_t val, new = 0; @@ -1015,6 +1009,11 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) u32 l, h; uint64_t value; + amd_init_de_cfg(c); + + if (c == &boot_cpu_data) + amd_init_lfence_dispatch(); /* Needs amd_init_de_cfg() */ + /* Disable TLB flush filter by setting HWCR.FFDIS on K8 * bit 6 of msr C001_0015 * @@ -1046,12 +1045,6 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) if (c == &boot_cpu_data && !cpu_has(c, X86_FEATURE_RSTR_FP_ERR_PTRS)) setup_force_cpu_cap(X86_BUG_FPU_PTRS); - if (c->x86 == 0x0f || c->x86 == 0x11) - /* Always dispatch serialising on this hardare. */ - __set_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability); - else /* Implicily "== 0x10 || >= 0x12" by being 64bit. */ - amd_init_lfence(c); - amd_init_ssbd(c); if (c->x86 == 0x17) @@ -1269,7 +1262,6 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) if ((smp_processor_id() == 1) && !cpu_has(c, X86_FEATURE_ITSC)) disable_c1_ramping(); - amd_check_zenbleed(); amd_check_bp_cfg(); if (fam17_c6_disabled) diff --git a/xen/arch/x86/cpu/cpu.h b/xen/arch/x86/cpu/cpu.h index cbb434f3a2..8bed3f5249 100644 --- a/xen/arch/x86/cpu/cpu.h +++ b/xen/arch/x86/cpu/cpu.h @@ -24,7 +24,8 @@ extern bool detect_extended_topology(struct cpuinfo_x86 *c); void cf_check early_init_amd(struct cpuinfo_x86 *c); void amd_log_freq(const struct cpuinfo_x86 *c); -void amd_init_lfence(struct cpuinfo_x86 *c); +void amd_init_de_cfg(const struct cpuinfo_x86 *c); +void amd_init_lfence_dispatch(void); void amd_init_ssbd(const struct cpuinfo_x86 *c); void amd_init_spectral_chicken(void); void detect_zen2_null_seg_behaviour(void); diff --git a/xen/arch/x86/cpu/hygon.c b/xen/arch/x86/cpu/hygon.c index 68eee0e85f..cab915a2fc 100644 --- a/xen/arch/x86/cpu/hygon.c +++ b/xen/arch/x86/cpu/hygon.c @@ -32,7 +32,11 @@ static void cf_check init_hygon(struct cpuinfo_x86 *c) { unsigned long long value; - amd_init_lfence(c); + amd_init_de_cfg(c); + + if (c == &boot_cpu_data) + amd_init_lfence_dispatch(); /* Needs amd_init_de_cfg() */ + amd_init_ssbd(c); /* Probe for NSCB on Zen2 CPUs when not virtualised */ -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Mon Dec 01 18:55:10 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 01 Dec 2025 18:55:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1175967.1500547 (Exim 4.92) (envelope-from ) id 1vQ93B-0002aU-8Z; Mon, 01 Dec 2025 18:55:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1175967.1500547; Mon, 01 Dec 2025 18:55:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ93B-0002aM-64; Mon, 01 Dec 2025 18:55:05 +0000 Received: by outflank-mailman (input) for mailman id 1175967; Mon, 01 Dec 2025 18:55:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ939-0002aG-JZ for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 18:55:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQ937-001Y3A-2j for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 18:55:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQ937-005K0k-2V for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 18:55:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=aW/TAvYbMU1X0Jozp24tMyr6ByD1j/6etLGVBGD3Dgo=; b=hkoJLzf9fd/3iZfxiBDXfvrCm7 QSJkgxjstLwn/c082bLuLK20Xq6bQ2ul9iZj0S/NV7yQZhGQRaS+D1UqVGF3cfeaLmaQFM6ElCiCA hVnCnis0vV6CaIqZn1nQfiapRfHa+VPC00nFvlTRsUHnujPRzsGRuYtoZvVyXZ6fHSeo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/amd: Use setup_force_cpu_cap() for BTC_NO Message-Id: Date: Mon, 01 Dec 2025 18:55:01 +0000 commit dcfcc4acabf9b84b3b9ba32f2d19241c4897c0ec Author: Andrew Cooper AuthorDate: Tue Nov 25 18:18:33 2025 +0000 Commit: Andrew Cooper CommitDate: Mon Dec 1 16:20:41 2025 +0000 x86/amd: Use setup_force_cpu_cap() for BTC_NO A XenServer feature in the process of being upstreamed is to be able to re-calculate the guest CPU Policies at runtime, e.g. after a microcode load and/or livepatch to expose new functionality. Right now, upstream Xen only rescans the Raw CPU Policy on microcode load. One complication with recalculating the guest policies is that BTC_NO is handled differently to other $FOO_NO bits, by using __set_bit() rather than setup_force_cpu_cap(). For consistency, switch it to using setup_force_cpu_cap(). This doesn't matter for upstream Xen right now, but it will ease upstreaming the feature. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/cpu/amd.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index 805a8189e6..b3e12b084c 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -1115,8 +1115,9 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) * Branch Type Confusion, but predate the allocation of the * BTC_NO bit. Fill it back in if we're not virtualised. */ - if (!cpu_has_hypervisor && !cpu_has(c, X86_FEATURE_BTC_NO)) - __set_bit(X86_FEATURE_BTC_NO, c->x86_capability); + if (c == &boot_cpu_data && !cpu_has_hypervisor && + !cpu_has(c, X86_FEATURE_BTC_NO)) + setup_force_cpu_cap(X86_FEATURE_BTC_NO); break; } -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Mon Dec 01 18:55:12 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 01 Dec 2025 18:55:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1175968.1500552 (Exim 4.92) (envelope-from ) id 1vQ93I-0002bp-9r; Mon, 01 Dec 2025 18:55:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1175968.1500552; Mon, 01 Dec 2025 18:55:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ93I-0002bh-7E; Mon, 01 Dec 2025 18:55:12 +0000 Received: by outflank-mailman (input) for mailman id 1175968; Mon, 01 Dec 2025 18:55:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQ93H-0002bb-WB for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 18:55:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQ93H-001Y3Q-37 for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 18:55:11 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQ93H-005LNT-2w for xen-changelog@lists.xenproject.org; Mon, 01 Dec 2025 18:55:11 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=l/myg8l4ZISTZCzsnPCoD77B3MjjmlON5+R/NMdiLJs=; b=HJiUWAqXrVagsDftmRMCeeO24U FquKlkYL12fgbgym1w/vpVtD1J/suWzL8o7dA+jev1Nv4oMuYXb0xlQwt7yAp7LuNvYOVmidoslE2 NlD5qtrHZUhLsY/s4PlrM4cat1ktlJs67uu2EDEiIqZraL8faqS5sKAIPJ6CDTh4PGfI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/amd: Fix race editing DE_CFG Message-Id: Date: Mon, 01 Dec 2025 18:55:11 +0000 commit d0c75dc4c028bc32fd9cf1d4358973929548de54 Author: Andrew Cooper AuthorDate: Tue Nov 25 13:48:36 2025 +0000 Commit: Andrew Cooper CommitDate: Mon Dec 1 16:20:41 2025 +0000 x86/amd: Fix race editing DE_CFG We have two different functions explaining that DE_CFG is Core-scoped and that writes are racy but happen to be safe. This is only true when there's one of them. Introduce amd_init_de_cfg() to be the singular function which writes to DE_CFG, modelled after the logic we already have for BP_CFG. While reworking amd_check_zenbleed() into a simple predicate used by amd_init_de_cfg(), fix the microcode table. The 'good_rev' was specific to an individual stepping and not valid to be matched by model, let alone a range. The only CPUs incorrectly matched that I can locate appear to be pre-production, and probably didn't get Zenbleed microcode. Rework amd_init_lfence() to be amd_init_lfence_dispatch() with only the purpose of configuring X86_FEATURE_LFENCE_DISPATCH in the case that it needs synthesising. Run it on the BSP only and use setup_force_cpu_cap() to prevent the bit disappearing on a subseuqent CPUID rescan. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/arch/x86/cpu/amd.c | 224 +++++++++++++++++++++++------------------------ xen/arch/x86/cpu/cpu.h | 3 +- xen/arch/x86/cpu/hygon.c | 6 +- 3 files changed, 115 insertions(+), 118 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index b3e12b084c..47c109f898 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -644,45 +644,6 @@ void amd_log_freq(const struct cpuinfo_x86 *c) printk("CPU%u: %u MHz\n", smp_processor_id(), low_mhz); } -void amd_init_lfence(struct cpuinfo_x86 *c) -{ - uint64_t value; - - /* - * Some hardware has LFENCE dispatch serialising always enabled, - * nothing to do on that case. - */ - if (test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability)) - return; - - /* - * Attempt to set lfence to be Dispatch Serialising. This MSR almost - * certainly isn't virtualised (and Xen at least will leak the real - * value in but silently discard writes), as well as being per-core - * rather than per-thread, so do a full safe read/write/readback cycle - * in the worst case. - */ - if (rdmsr_safe(MSR_AMD64_DE_CFG, &value)) - /* Unable to read. Assume the safer default. */ - __clear_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); - else if (value & AMD64_DE_CFG_LFENCE_SERIALISE) - /* Already dispatch serialising. */ - __set_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); - else if (wrmsr_safe(MSR_AMD64_DE_CFG, - value | AMD64_DE_CFG_LFENCE_SERIALISE) || - rdmsr_safe(MSR_AMD64_DE_CFG, &value) || - !(value & AMD64_DE_CFG_LFENCE_SERIALISE)) - /* Attempt to set failed. Assume the safer default. */ - __clear_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); - else - /* Successfully enabled! */ - __set_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); -} - /* * Refer to the AMD Speculative Store Bypass whitepaper: * https://developer.amd.com/wp-content/resources/124441_AMD64_SpeculativeStoreBypassDisable_Whitepaper_final.pdf @@ -876,76 +837,6 @@ void __init detect_zen2_null_seg_behaviour(void) } -static void amd_check_zenbleed(void) -{ - const struct cpu_signature *sig = &this_cpu(cpu_sig); - unsigned int good_rev; - uint64_t val, old_val, chickenbit = (1 << 9); - - /* - * If we're virtualised, we can't do family/model checks safely, and - * we likely wouldn't have access to DE_CFG even if we could see a - * microcode revision. - * - * A hypervisor may hide AVX as a stopgap mitigation. We're not in a - * position to care either way. An admin doesn't want to be disabling - * AVX as a mitigation on any build of Xen with this logic present. - */ - if (cpu_has_hypervisor || boot_cpu_data.x86 != 0x17) - return; - - switch (boot_cpu_data.x86_model) { - case 0x30 ... 0x3f: good_rev = 0x0830107a; break; - case 0x60 ... 0x67: good_rev = 0x0860010b; break; - case 0x68 ... 0x6f: good_rev = 0x08608105; break; - case 0x70 ... 0x7f: good_rev = 0x08701032; break; - case 0xa0 ... 0xaf: good_rev = 0x08a00008; break; - default: - /* - * With the Fam17h check above, most parts getting here are - * Zen1. They're not affected. Assume Zen2 ones making it - * here are affected regardless of microcode version. - */ - if (is_zen1_uarch()) - return; - good_rev = ~0U; - break; - } - - rdmsrl(MSR_AMD64_DE_CFG, val); - old_val = val; - - /* - * Microcode is the preferred mitigation, in terms of performance. - * However, without microcode, this chickenbit (specific to the Zen2 - * uarch) disables Floating Point Mov-Elimination to mitigate the - * issue. - */ - val &= ~chickenbit; - if (sig->rev < good_rev) - val |= chickenbit; - - if (val == old_val) - /* Nothing to change. */ - return; - - /* - * DE_CFG is a Core-scoped MSR, and this write is racy during late - * microcode load. However, both threads calculate the new value from - * state which is shared, and unrelated to the old value, so the - * result should be consistent. - */ - wrmsrl(MSR_AMD64_DE_CFG, val); - - /* - * Inform the admin that we changed something, but don't spam, - * especially during a late microcode load. - */ - if (smp_processor_id() == 0) - printk(XENLOG_INFO "Zenbleed mitigation - using %s\n", - val & chickenbit ? "chickenbit" : "microcode"); -} - static void cf_check fam17_disable_c6(void *arg) { /* Disable C6 by clearing the CCR{0,1,2}_CC6EN bits. */ @@ -972,6 +863,109 @@ static void cf_check fam17_disable_c6(void *arg) wrmsrl(MSR_AMD_CSTATE_CFG, val & mask); } +static bool zenbleed_use_chickenbit(void) +{ + unsigned int curr_rev; + uint8_t fixed_rev; + + /* Zenbleed only affects Zen2. Nothing to do on non-Fam17h systems. */ + if ( boot_cpu_data.family != 0x17 ) + return false; + + curr_rev = this_cpu(cpu_sig).rev; + switch ( curr_rev >> 8 ) + { + case 0x083010: fixed_rev = 0x7a; break; + case 0x086001: fixed_rev = 0x0b; break; + case 0x086081: fixed_rev = 0x05; break; + case 0x087010: fixed_rev = 0x32; break; + case 0x08a000: fixed_rev = 0x08; break; + default: + /* + * With the Fam17h check above, most parts getting here are Zen1. + * They're not affected. Assume Zen2 ones making it here are affected + * regardless of microcode version. + */ + return is_zen2_uarch(); + } + + return (uint8_t)curr_rev >= fixed_rev; +} + +void amd_init_de_cfg(const struct cpuinfo_x86 *c) +{ + uint64_t val, new = 0; + + /* + * The MSR doesn't exist on Fam 0xf/0x11. If virtualised, we won't have + * mutable access even if we can read it. + */ + if ( c->family == 0xf || c->family == 0x11 || cpu_has_hypervisor ) + return; + + /* + * On Zen3 (Fam 0x19) and later CPUs, LFENCE is unconditionally dispatch + * serialising, and is enumerated in CPUID. + * + * On older systems, LFENCE is unconditionally dispatch serialising (when + * the MSR doesn't exist), or can be made so by setting this bit. + */ + if ( !test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability) ) + new |= AMD64_DE_CFG_LFENCE_SERIALISE; + + /* + * If vulnerable to Zenbleed and not mitigated in microcode, use the + * bigger hammer. + */ + if ( zenbleed_use_chickenbit() ) + new |= (1 << 9); + + /* Avoid reading DE_CFG if we don't intend to change anything. */ + if ( !new ) + return; + + val = rdmsr(MSR_AMD64_DE_CFG); + + if ( (val & new) == new ) + return; + + /* + * DE_CFG is a Core-scoped MSR, and this write is racy. However, both + * threads calculate the new value from state which expected to be + * consistent across CPUs and unrelated to the old value, so the result + * should be consistent. + */ + wrmsr(MSR_AMD64_DE_CFG, val | new); +} + +void __init amd_init_lfence_dispatch(void) +{ + struct cpuinfo_x86 *c = &boot_cpu_data; + uint64_t val; + + if ( test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability) ) + /* LFENCE is forced dispatch serialising and we can't control it. */ + return; + + if ( c->family == 0xf || c->family == 0x11 ) + /* MSR doesn't exist, LFENCE is dispatch serialising. */ + goto set; + + if ( rdmsr_safe(MSR_AMD64_DE_CFG, &val) ) + /* Unable to read. Assume the safer default. */ + goto clear; + + if ( val & AMD64_DE_CFG_LFENCE_SERIALISE ) + goto set; + + clear: + setup_clear_cpu_cap(X86_FEATURE_LFENCE_DISPATCH); + return; + + set: + setup_force_cpu_cap(X86_FEATURE_LFENCE_DISPATCH); +} + static void amd_check_bp_cfg(void) { uint64_t val, new = 0; @@ -1015,6 +1009,11 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) u32 l, h; uint64_t value; + amd_init_de_cfg(c); + + if (c == &boot_cpu_data) + amd_init_lfence_dispatch(); /* Needs amd_init_de_cfg() */ + /* Disable TLB flush filter by setting HWCR.FFDIS on K8 * bit 6 of msr C001_0015 * @@ -1046,12 +1045,6 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) if (c == &boot_cpu_data && !cpu_has(c, X86_FEATURE_RSTR_FP_ERR_PTRS)) setup_force_cpu_cap(X86_BUG_FPU_PTRS); - if (c->x86 == 0x0f || c->x86 == 0x11) - /* Always dispatch serialising on this hardare. */ - __set_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability); - else /* Implicily "== 0x10 || >= 0x12" by being 64bit. */ - amd_init_lfence(c); - amd_init_ssbd(c); if (c->x86 == 0x17) @@ -1269,7 +1262,6 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) if ((smp_processor_id() == 1) && !cpu_has(c, X86_FEATURE_ITSC)) disable_c1_ramping(); - amd_check_zenbleed(); amd_check_bp_cfg(); if (fam17_c6_disabled) diff --git a/xen/arch/x86/cpu/cpu.h b/xen/arch/x86/cpu/cpu.h index cbb434f3a2..8bed3f5249 100644 --- a/xen/arch/x86/cpu/cpu.h +++ b/xen/arch/x86/cpu/cpu.h @@ -24,7 +24,8 @@ extern bool detect_extended_topology(struct cpuinfo_x86 *c); void cf_check early_init_amd(struct cpuinfo_x86 *c); void amd_log_freq(const struct cpuinfo_x86 *c); -void amd_init_lfence(struct cpuinfo_x86 *c); +void amd_init_de_cfg(const struct cpuinfo_x86 *c); +void amd_init_lfence_dispatch(void); void amd_init_ssbd(const struct cpuinfo_x86 *c); void amd_init_spectral_chicken(void); void detect_zen2_null_seg_behaviour(void); diff --git a/xen/arch/x86/cpu/hygon.c b/xen/arch/x86/cpu/hygon.c index 68eee0e85f..cab915a2fc 100644 --- a/xen/arch/x86/cpu/hygon.c +++ b/xen/arch/x86/cpu/hygon.c @@ -32,7 +32,11 @@ static void cf_check init_hygon(struct cpuinfo_x86 *c) { unsigned long long value; - amd_init_lfence(c); + amd_init_de_cfg(c); + + if (c == &boot_cpu_data) + amd_init_lfence_dispatch(); /* Needs amd_init_de_cfg() */ + amd_init_ssbd(c); /* Probe for NSCB on Zen2 CPUs when not virtualised */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Dec 02 18:33:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 02 Dec 2025 18:33:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1176312.1500806 (Exim 4.92) (envelope-from ) id 1vQVBP-0005wN-Iw; Tue, 02 Dec 2025 18:33:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1176312.1500806; Tue, 02 Dec 2025 18:33:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQVBP-0005wF-Fx; Tue, 02 Dec 2025 18:33:03 +0000 Received: by outflank-mailman (input) for mailman id 1176312; Tue, 02 Dec 2025 18:33:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQVBO-0005w9-SJ for xen-changelog@lists.xenproject.org; Tue, 02 Dec 2025 18:33:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQVBO-003Gne-20 for xen-changelog@lists.xenproject.org; Tue, 02 Dec 2025 18:33:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQVBO-007GGN-1f for xen-changelog@lists.xenproject.org; Tue, 02 Dec 2025 18:33:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Ey5Zy8QmX/9/O+AHNrhrBc/b5ELwz34mhT5XanQoOJE=; b=d0R8n2wVSYU4vqRZ8iWmPcMct6 ZQib8TF0gWzbXIwHl8+9GFXclTLkdL6gW9N11Dgc+xStwr76q6Wa45h28id85AsW26L/G610N5sve /FgUZwj5tTkEQqWd4XGKKaXLTccuQfZMln17BwiniGPSdlRdSSrORNU7XTXJHJq6eGhM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/lib: Misc SHA2 cleanup Message-Id: Date: Tue, 02 Dec 2025 18:33:02 +0000 commit 674409fc648c7b7e918d8c115095cebeddab512b Author: Andrew Cooper AuthorDate: Fri Nov 28 15:09:08 2025 +0000 Commit: Andrew Cooper CommitDate: Tue Dec 2 17:11:52 2025 +0000 xen/lib: Misc SHA2 cleanup In sha2_256_transform(), make state be an array of 8 rather than a pointer, which lets the compiler do slightly more checking. For better or worse, the canonical API in Linux is just the algorithm name. As we're intending to import more from Linux in this area, drop the digest suffix before we gain more users. Compile sha2-256.o for all architectures. It's not very much code, and it will be omitted at link time. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/cpu/microcode/amd.c | 2 +- xen/include/xen/sha2.h | 4 ++-- xen/lib/Makefile | 2 +- xen/lib/sha2-256.c | 8 ++++---- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/xen/arch/x86/cpu/microcode/amd.c b/xen/arch/x86/cpu/microcode/amd.c index e7ae1e8023..adabe6e6e8 100644 --- a/xen/arch/x86/cpu/microcode/amd.c +++ b/xen/arch/x86/cpu/microcode/amd.c @@ -139,7 +139,7 @@ static bool check_digest(const struct container_microcode *mc) return false; } - sha2_256_digest(digest, patch, mc->len); + sha2_256(digest, patch, mc->len); if ( memcmp(digest, pd->digest, sizeof(digest)) ) { diff --git a/xen/include/xen/sha2.h b/xen/include/xen/sha2.h index 09c69195a9..7a99c1259d 100644 --- a/xen/include/xen/sha2.h +++ b/xen/include/xen/sha2.h @@ -9,8 +9,8 @@ #define SHA2_256_DIGEST_SIZE 32 -void sha2_256_digest(uint8_t digest[SHA2_256_DIGEST_SIZE], - const void *msg, size_t len); +void sha2_256(uint8_t digest[SHA2_256_DIGEST_SIZE], + const void *msg, size_t len); struct sha2_256_state { uint32_t state[SHA2_256_DIGEST_SIZE / sizeof(uint32_t)]; diff --git a/xen/lib/Makefile b/xen/lib/Makefile index 5ccb1e5241..d3e4f981b0 100644 --- a/xen/lib/Makefile +++ b/xen/lib/Makefile @@ -17,7 +17,7 @@ lib-y += memset.o lib-y += muldiv64.o lib-y += parse-size.o lib-y += rbtree.o -lib-$(CONFIG_X86) += sha2-256.o +lib-y += sha2-256.o lib-y += sort.o lib-y += strcasecmp.o lib-y += strchr.o diff --git a/xen/lib/sha2-256.c b/xen/lib/sha2-256.c index d1b2c20b98..ed585ac0d4 100644 --- a/xen/lib/sha2-256.c +++ b/xen/lib/sha2-256.c @@ -68,7 +68,7 @@ static const uint32_t K[] = { 0x90befffaU, 0xa4506cebU, 0xbef9a3f7U, 0xc67178f2U, }; -static void sha2_256_transform(uint32_t *state, const void *_input) +static void sha2_256_transform(uint32_t state[8], const void *_input) { const uint32_t *input = _input; uint32_t a, b, c, d, e, f, g, h, t1, t2; @@ -197,8 +197,8 @@ void sha2_256_final(struct sha2_256_state *s, uint8_t digest[SHA2_256_DIGEST_SIZ put_unaligned_be32(s->state[i], &dst[i]); } -void sha2_256_digest(uint8_t digest[SHA2_256_DIGEST_SIZE], - const void *msg, size_t len) +void sha2_256(uint8_t digest[SHA2_256_DIGEST_SIZE], + const void *msg, size_t len) { struct sha2_256_state s; @@ -243,7 +243,7 @@ static void __init __constructor test_sha2_256(void) const struct test *t = &tests[i]; uint8_t res[SHA2_256_DIGEST_SIZE] = {}; - sha2_256_digest(res, t->msg, strlen(t->msg)); + sha2_256(res, t->msg, strlen(t->msg)); if ( memcmp(res, t->digest, sizeof(t->digest)) == 0 ) continue; -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Tue Dec 02 18:33:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 02 Dec 2025 18:33:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1176313.1500810 (Exim 4.92) (envelope-from ) id 1vQVBZ-0005yh-K6; Tue, 02 Dec 2025 18:33:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1176313.1500810; Tue, 02 Dec 2025 18:33:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQVBZ-0005yZ-HR; Tue, 02 Dec 2025 18:33:13 +0000 Received: by outflank-mailman (input) for mailman id 1176313; Tue, 02 Dec 2025 18:33:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQVBY-0005yR-RF for xen-changelog@lists.xenproject.org; Tue, 02 Dec 2025 18:33:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQVBY-003Gnj-2c for xen-changelog@lists.xenproject.org; Tue, 02 Dec 2025 18:33:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQVBY-007HXm-2P for xen-changelog@lists.xenproject.org; Tue, 02 Dec 2025 18:33:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=hToIi3uZ+1+sqgh9LiGH+Hu10ihXdPZaerdECaSpwZM=; b=kXGthowTLdMf1P6ECc6MD9Xcw4 pz/5noAY4YdfBxF7ZdCdI5ZoG7JoN6Yg91mimdKpYFP97qHGfxqZXJH+ajUOFTSkVBpuFpLXlnvRc 0DMyk3S+POiPQtNI1pZ/mUtDq/XSZZ/mj8CqzMmN51KoUH7S0bPlF88g0riA39NihOXI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/lib: Introduce SHA-1 Message-Id: Date: Tue, 02 Dec 2025 18:33:12 +0000 commit 62bd4c2a8ee809c181d47098583270dc9db9300e Author: Krystian Hebel AuthorDate: Thu Nov 27 13:21:12 2025 +0000 Commit: Andrew Cooper CommitDate: Tue Dec 2 17:11:52 2025 +0000 xen/lib: Introduce SHA-1 Future work will need to interact with the TPM, which requires calculating digests for all active hash banks. Introduce an implementation in lib/, partially derived from Trenchboot which itself is derived from Linux. Signed-off-by: Krystian Hebel Signed-off-by: Sergii Dmytruk Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/include/xen/sha1.h | 14 ++++ xen/lib/Makefile | 1 + xen/lib/sha1.c | 215 +++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 230 insertions(+) diff --git a/xen/include/xen/sha1.h b/xen/include/xen/sha1.h new file mode 100644 index 0000000000..d649da8ebd --- /dev/null +++ b/xen/include/xen/sha1.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * SHA1: https://csrc.nist.gov/pubs/fips/180-4/upd1/final + */ +#ifndef XEN_SHA1_H +#define XEN_SHA1_H + +#include + +#define SHA1_DIGEST_SIZE 20 + +void sha1(uint8_t digest[SHA1_DIGEST_SIZE], const void *msg, size_t len); + +#endif /* XEN_SHA1_H */ diff --git a/xen/lib/Makefile b/xen/lib/Makefile index d3e4f981b0..954d9216a3 100644 --- a/xen/lib/Makefile +++ b/xen/lib/Makefile @@ -17,6 +17,7 @@ lib-y += memset.o lib-y += muldiv64.o lib-y += parse-size.o lib-y += rbtree.o +lib-y += sha1.o lib-y += sha2-256.o lib-y += sort.o lib-y += strcasecmp.o diff --git a/xen/lib/sha1.c b/xen/lib/sha1.c new file mode 100644 index 0000000000..eac2bdd4df --- /dev/null +++ b/xen/lib/sha1.c @@ -0,0 +1,215 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * SHA1: https://csrc.nist.gov/pubs/fips/180-4/upd1/final + * + * Originally derived from Linux. Modified substantially to optimise for size + * and Xen's expected usecases. + */ +#include +#include +#include +#include + +struct sha1_state { + size_t count; /* Byte Count. */ + uint32_t state[SHA1_DIGEST_SIZE / sizeof(uint32_t)]; + uint8_t buf[64]; +}; + +static uint32_t blend(uint32_t w[16], unsigned int i) +{ +#define W(i) w[(i) & 15] + + return W(i) = rol32(W(i + 13) ^ W(i + 8) ^ W(i + 2) ^ W(i), 1); + +#undef W +} + +static void sha1_transform(uint32_t state[5], const void *_input) +{ + const uint32_t *input = _input; + uint32_t a, b, c, d, e, t; + uint32_t w[16]; + unsigned int i = 0; + + a = state[0]; + b = state[1]; + c = state[2]; + d = state[3]; + e = state[4]; + + /* Round 1 - iterations 0-16 take their input from 'input' */ + for ( ; i < 16; ++i ) + { + t = get_unaligned_be32(&input[i]); + w[i] = t; + e += t + rol32(a, 5) + (((c ^ d) & b) ^ d) + 0x5a827999U; + b = ror32(b, 2); + t = e; e = d; d = c; c = b; b = a; a = t; + } + + /* Round 1 tail. Input from 512-bit mixing array */ + for ( ; i < 20; ++i ) + { + t = blend(w, i); + e += t + rol32(a, 5) + (((c ^ d) & b) ^ d) + 0x5a827999U; + b = ror32(b, 2); + t = e; e = d; d = c; c = b; b = a; a = t; + } + + /* Round 2 */ + for ( ; i < 40; ++i ) + { + t = blend(w, i); + e += t + rol32(a, 5) + (b ^ c ^ d) + 0x6ed9eba1U; + b = ror32(b, 2); + t = e; e = d; d = c; c = b; b = a; a = t; + } + + /* Round 3 */ + for ( ; i < 60; ++i ) + { + t = blend(w, i); + e += t + rol32(a, 5) + ((b & c) + (d & (b ^ c))) + 0x8f1bbcdcU; + b = ror32(b, 2); + t = e; e = d; d = c; c = b; b = a; a = t; + } + + /* Round 4 */ + for ( ; i < 80; ++i ) + { + t = blend(w, i); + e += t + rol32(a, 5) + (b ^ c ^ d) + 0xca62c1d6U; + b = ror32(b, 2); + t = e; e = d; d = c; c = b; b = a; a = t; + } + + state[0] += a; + state[1] += b; + state[2] += c; + state[3] += d; + state[4] += e; +} + +static void sha1_init(struct sha1_state *s) +{ + *s = (struct sha1_state){ + .state = { + 0x67452301U, + 0xefcdab89U, + 0x98badcfeU, + 0x10325476U, + 0xc3d2e1f0U, + }, + }; +} + +static void sha1_update(struct sha1_state *s, const void *msg, size_t len) +{ + unsigned int partial = s->count & 63; + + s->count += len; + + if ( (partial + len) >= 64 ) + { + if ( partial ) + { + unsigned int rem = 64 - partial; + + /* Fill the partial block. */ + memcpy(s->buf + partial, msg, rem); + msg += rem; + len -= rem; + + sha1_transform(s->state, s->buf); + partial = 0; + } + + for ( ; len >= 64; msg += 64, len -= 64 ) + sha1_transform(s->state, msg); + } + + /* Remaining data becomes partial. */ + memcpy(s->buf + partial, msg, len); +} + +static void sha1_final(struct sha1_state *s, uint8_t digest[SHA1_DIGEST_SIZE]) +{ + uint32_t *dst = (uint32_t *)digest; + unsigned int i, partial = s->count & 63; + + /* Start padding */ + s->buf[partial++] = 0x80; + + if ( partial > 56 ) + { + /* Need one extra block - pad to 64 */ + memset(s->buf + partial, 0, 64 - partial); + sha1_transform(s->state, s->buf); + partial = 0; + } + /* Pad to 56 */ + memset(s->buf + partial, 0x0, 56 - partial); + + /* Append the bit count */ + put_unaligned_be64((uint64_t)s->count << 3, &s->buf[56]); + sha1_transform(s->state, s->buf); + + /* Store state in digest */ + for ( i = 0; i < 5; i++ ) + put_unaligned_be32(s->state[i], &dst[i]); +} + +void sha1(uint8_t digest[SHA1_DIGEST_SIZE], const void *msg, size_t len) +{ + struct sha1_state s; + + sha1_init(&s); + sha1_update(&s, msg, len); + sha1_final(&s, digest); +} + +#ifdef CONFIG_SELF_TESTS + +#include +#include + +static const struct test { + const char *msg; + uint8_t digest[SHA1_DIGEST_SIZE]; +} tests[] __initconst = { + { + .msg = "abc", + .digest = { + 0xa9, 0x99, 0x3e, 0x36, 0x47, 0x06, 0x81, 0x6a, 0xba, 0x3e, + 0x25, 0x71, 0x78, 0x50, 0xc2, 0x6c, 0x9c, 0xd0, 0xd8, 0x9d, + }, + }, + { + .msg = "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq", + .digest = { + 0x84, 0x98, 0x3e, 0x44, 0x1c, 0x3b, 0xd2, 0x6e, 0xba, 0xae, + 0x4a, 0xa1, 0xf9, 0x51, 0x29, 0xe5, 0xe5, 0x46, 0x70, 0xf1, + }, + }, +}; + +static void __init __constructor test_sha1(void) +{ + for ( unsigned int i = 0; i < ARRAY_SIZE(tests); ++i ) + { + const struct test *t = &tests[i]; + uint8_t res[SHA1_DIGEST_SIZE] = {}; + + sha1(res, t->msg, strlen(t->msg)); + + if ( memcmp(res, t->digest, sizeof(t->digest)) == 0 ) + continue; + + panic("%s() msg '%s' failed\n" + " expected %" STR(SHA1_DIGEST_SIZE) "phN\n" + " got %" STR(SHA1_DIGEST_SIZE) "phN\n", + __func__, t->msg, t->digest, res); + } +} +#endif /* CONFIG_SELF_TESTS */ -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Tue Dec 02 19:33:05 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 02 Dec 2025 19:33:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1176337.1500843 (Exim 4.92) (envelope-from ) id 1vQW7T-0005lf-9i; Tue, 02 Dec 2025 19:33:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1176337.1500843; Tue, 02 Dec 2025 19:33:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQW7T-0005lX-77; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=2gMWrRyxdJrmKn3aWiTFc7sxcjJ1pMJYpJY1gZzCo00=; b=BSQETaH1sp1SNeKbZXUtGoD0rJ ZfFGfsWoB5agikjVBIYPPi46M24W5EUWqiIeW2Wz1e8Rj8PmomFfo/YNHxXdDUpxRM3uRGjVsVltU LRylnkJz8WD12GEzFYidzylk5JdF2s7BK3lHFgL2F4X3pWimQ9y6uTxl5gV4fkhhS0lU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/lib: Misc SHA2 cleanup Message-Id: Date: Tue, 02 Dec 2025 19:33:01 +0000 commit 674409fc648c7b7e918d8c115095cebeddab512b Author: Andrew Cooper AuthorDate: Fri Nov 28 15:09:08 2025 +0000 Commit: Andrew Cooper CommitDate: Tue Dec 2 17:11:52 2025 +0000 xen/lib: Misc SHA2 cleanup In sha2_256_transform(), make state be an array of 8 rather than a pointer, which lets the compiler do slightly more checking. For better or worse, the canonical API in Linux is just the algorithm name. As we're intending to import more from Linux in this area, drop the digest suffix before we gain more users. Compile sha2-256.o for all architectures. It's not very much code, and it will be omitted at link time. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/cpu/microcode/amd.c | 2 +- xen/include/xen/sha2.h | 4 ++-- xen/lib/Makefile | 2 +- xen/lib/sha2-256.c | 8 ++++---- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/xen/arch/x86/cpu/microcode/amd.c b/xen/arch/x86/cpu/microcode/amd.c index e7ae1e8023..adabe6e6e8 100644 --- a/xen/arch/x86/cpu/microcode/amd.c +++ b/xen/arch/x86/cpu/microcode/amd.c @@ -139,7 +139,7 @@ static bool check_digest(const struct container_microcode *mc) return false; } - sha2_256_digest(digest, patch, mc->len); + sha2_256(digest, patch, mc->len); if ( memcmp(digest, pd->digest, sizeof(digest)) ) { diff --git a/xen/include/xen/sha2.h b/xen/include/xen/sha2.h index 09c69195a9..7a99c1259d 100644 --- a/xen/include/xen/sha2.h +++ b/xen/include/xen/sha2.h @@ -9,8 +9,8 @@ #define SHA2_256_DIGEST_SIZE 32 -void sha2_256_digest(uint8_t digest[SHA2_256_DIGEST_SIZE], - const void *msg, size_t len); +void sha2_256(uint8_t digest[SHA2_256_DIGEST_SIZE], + const void *msg, size_t len); struct sha2_256_state { uint32_t state[SHA2_256_DIGEST_SIZE / sizeof(uint32_t)]; diff --git a/xen/lib/Makefile b/xen/lib/Makefile index 5ccb1e5241..d3e4f981b0 100644 --- a/xen/lib/Makefile +++ b/xen/lib/Makefile @@ -17,7 +17,7 @@ lib-y += memset.o lib-y += muldiv64.o lib-y += parse-size.o lib-y += rbtree.o -lib-$(CONFIG_X86) += sha2-256.o +lib-y += sha2-256.o lib-y += sort.o lib-y += strcasecmp.o lib-y += strchr.o diff --git a/xen/lib/sha2-256.c b/xen/lib/sha2-256.c index d1b2c20b98..ed585ac0d4 100644 --- a/xen/lib/sha2-256.c +++ b/xen/lib/sha2-256.c @@ -68,7 +68,7 @@ static const uint32_t K[] = { 0x90befffaU, 0xa4506cebU, 0xbef9a3f7U, 0xc67178f2U, }; -static void sha2_256_transform(uint32_t *state, const void *_input) +static void sha2_256_transform(uint32_t state[8], const void *_input) { const uint32_t *input = _input; uint32_t a, b, c, d, e, f, g, h, t1, t2; @@ -197,8 +197,8 @@ void sha2_256_final(struct sha2_256_state *s, uint8_t digest[SHA2_256_DIGEST_SIZ put_unaligned_be32(s->state[i], &dst[i]); } -void sha2_256_digest(uint8_t digest[SHA2_256_DIGEST_SIZE], - const void *msg, size_t len) +void sha2_256(uint8_t digest[SHA2_256_DIGEST_SIZE], + const void *msg, size_t len) { struct sha2_256_state s; @@ -243,7 +243,7 @@ static void __init __constructor test_sha2_256(void) const struct test *t = &tests[i]; uint8_t res[SHA2_256_DIGEST_SIZE] = {}; - sha2_256_digest(res, t->msg, strlen(t->msg)); + sha2_256(res, t->msg, strlen(t->msg)); if ( memcmp(res, t->digest, sizeof(t->digest)) == 0 ) continue; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Dec 02 19:33:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 02 Dec 2025 19:33:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1176339.1500848 (Exim 4.92) (envelope-from ) id 1vQW7d-0005rD-BD; Tue, 02 Dec 2025 19:33:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1176339.1500848; Tue, 02 Dec 2025 19:33:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQW7d-0005r5-8a; Tue, 02 Dec 2025 19:33:13 +0000 Received: by outflank-mailman (input) for mailman id 1176339; Tue, 02 Dec 2025 19:33:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQW7c-0005qb-0f for xen-changelog@lists.xenproject.org; Tue, 02 Dec 2025 19:33:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQW7b-003HzM-3A for xen-changelog@lists.xenproject.org; Tue, 02 Dec 2025 19:33:11 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQW7b-00E3sY-33 for xen-changelog@lists.xenproject.org; Tue, 02 Dec 2025 19:33:11 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=6xETUMZ35gC46jHVBJKT1Zl7xyL4AFBz5e3JT4pl7SY=; b=Mfp5/44YrU/O25omcKwbhdBrIG I90yzcH/BlbPCTlMA5aADlmp0g+GoO4pB4qAKot6/CyKZpg0bdRNgPwmBEfvekReau379dwkCRb/x T73YAVaAXu9uabcvBE/G1Gr/YVOF91i8TMFZoOuNntF7OpPE+tyOobixQ4mu6Qxt+nqg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/lib: Introduce SHA-1 Message-Id: Date: Tue, 02 Dec 2025 19:33:11 +0000 commit 62bd4c2a8ee809c181d47098583270dc9db9300e Author: Krystian Hebel AuthorDate: Thu Nov 27 13:21:12 2025 +0000 Commit: Andrew Cooper CommitDate: Tue Dec 2 17:11:52 2025 +0000 xen/lib: Introduce SHA-1 Future work will need to interact with the TPM, which requires calculating digests for all active hash banks. Introduce an implementation in lib/, partially derived from Trenchboot which itself is derived from Linux. Signed-off-by: Krystian Hebel Signed-off-by: Sergii Dmytruk Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/include/xen/sha1.h | 14 ++++ xen/lib/Makefile | 1 + xen/lib/sha1.c | 215 +++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 230 insertions(+) diff --git a/xen/include/xen/sha1.h b/xen/include/xen/sha1.h new file mode 100644 index 0000000000..d649da8ebd --- /dev/null +++ b/xen/include/xen/sha1.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * SHA1: https://csrc.nist.gov/pubs/fips/180-4/upd1/final + */ +#ifndef XEN_SHA1_H +#define XEN_SHA1_H + +#include + +#define SHA1_DIGEST_SIZE 20 + +void sha1(uint8_t digest[SHA1_DIGEST_SIZE], const void *msg, size_t len); + +#endif /* XEN_SHA1_H */ diff --git a/xen/lib/Makefile b/xen/lib/Makefile index d3e4f981b0..954d9216a3 100644 --- a/xen/lib/Makefile +++ b/xen/lib/Makefile @@ -17,6 +17,7 @@ lib-y += memset.o lib-y += muldiv64.o lib-y += parse-size.o lib-y += rbtree.o +lib-y += sha1.o lib-y += sha2-256.o lib-y += sort.o lib-y += strcasecmp.o diff --git a/xen/lib/sha1.c b/xen/lib/sha1.c new file mode 100644 index 0000000000..eac2bdd4df --- /dev/null +++ b/xen/lib/sha1.c @@ -0,0 +1,215 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * SHA1: https://csrc.nist.gov/pubs/fips/180-4/upd1/final + * + * Originally derived from Linux. Modified substantially to optimise for size + * and Xen's expected usecases. + */ +#include +#include +#include +#include + +struct sha1_state { + size_t count; /* Byte Count. */ + uint32_t state[SHA1_DIGEST_SIZE / sizeof(uint32_t)]; + uint8_t buf[64]; +}; + +static uint32_t blend(uint32_t w[16], unsigned int i) +{ +#define W(i) w[(i) & 15] + + return W(i) = rol32(W(i + 13) ^ W(i + 8) ^ W(i + 2) ^ W(i), 1); + +#undef W +} + +static void sha1_transform(uint32_t state[5], const void *_input) +{ + const uint32_t *input = _input; + uint32_t a, b, c, d, e, t; + uint32_t w[16]; + unsigned int i = 0; + + a = state[0]; + b = state[1]; + c = state[2]; + d = state[3]; + e = state[4]; + + /* Round 1 - iterations 0-16 take their input from 'input' */ + for ( ; i < 16; ++i ) + { + t = get_unaligned_be32(&input[i]); + w[i] = t; + e += t + rol32(a, 5) + (((c ^ d) & b) ^ d) + 0x5a827999U; + b = ror32(b, 2); + t = e; e = d; d = c; c = b; b = a; a = t; + } + + /* Round 1 tail. Input from 512-bit mixing array */ + for ( ; i < 20; ++i ) + { + t = blend(w, i); + e += t + rol32(a, 5) + (((c ^ d) & b) ^ d) + 0x5a827999U; + b = ror32(b, 2); + t = e; e = d; d = c; c = b; b = a; a = t; + } + + /* Round 2 */ + for ( ; i < 40; ++i ) + { + t = blend(w, i); + e += t + rol32(a, 5) + (b ^ c ^ d) + 0x6ed9eba1U; + b = ror32(b, 2); + t = e; e = d; d = c; c = b; b = a; a = t; + } + + /* Round 3 */ + for ( ; i < 60; ++i ) + { + t = blend(w, i); + e += t + rol32(a, 5) + ((b & c) + (d & (b ^ c))) + 0x8f1bbcdcU; + b = ror32(b, 2); + t = e; e = d; d = c; c = b; b = a; a = t; + } + + /* Round 4 */ + for ( ; i < 80; ++i ) + { + t = blend(w, i); + e += t + rol32(a, 5) + (b ^ c ^ d) + 0xca62c1d6U; + b = ror32(b, 2); + t = e; e = d; d = c; c = b; b = a; a = t; + } + + state[0] += a; + state[1] += b; + state[2] += c; + state[3] += d; + state[4] += e; +} + +static void sha1_init(struct sha1_state *s) +{ + *s = (struct sha1_state){ + .state = { + 0x67452301U, + 0xefcdab89U, + 0x98badcfeU, + 0x10325476U, + 0xc3d2e1f0U, + }, + }; +} + +static void sha1_update(struct sha1_state *s, const void *msg, size_t len) +{ + unsigned int partial = s->count & 63; + + s->count += len; + + if ( (partial + len) >= 64 ) + { + if ( partial ) + { + unsigned int rem = 64 - partial; + + /* Fill the partial block. */ + memcpy(s->buf + partial, msg, rem); + msg += rem; + len -= rem; + + sha1_transform(s->state, s->buf); + partial = 0; + } + + for ( ; len >= 64; msg += 64, len -= 64 ) + sha1_transform(s->state, msg); + } + + /* Remaining data becomes partial. */ + memcpy(s->buf + partial, msg, len); +} + +static void sha1_final(struct sha1_state *s, uint8_t digest[SHA1_DIGEST_SIZE]) +{ + uint32_t *dst = (uint32_t *)digest; + unsigned int i, partial = s->count & 63; + + /* Start padding */ + s->buf[partial++] = 0x80; + + if ( partial > 56 ) + { + /* Need one extra block - pad to 64 */ + memset(s->buf + partial, 0, 64 - partial); + sha1_transform(s->state, s->buf); + partial = 0; + } + /* Pad to 56 */ + memset(s->buf + partial, 0x0, 56 - partial); + + /* Append the bit count */ + put_unaligned_be64((uint64_t)s->count << 3, &s->buf[56]); + sha1_transform(s->state, s->buf); + + /* Store state in digest */ + for ( i = 0; i < 5; i++ ) + put_unaligned_be32(s->state[i], &dst[i]); +} + +void sha1(uint8_t digest[SHA1_DIGEST_SIZE], const void *msg, size_t len) +{ + struct sha1_state s; + + sha1_init(&s); + sha1_update(&s, msg, len); + sha1_final(&s, digest); +} + +#ifdef CONFIG_SELF_TESTS + +#include +#include + +static const struct test { + const char *msg; + uint8_t digest[SHA1_DIGEST_SIZE]; +} tests[] __initconst = { + { + .msg = "abc", + .digest = { + 0xa9, 0x99, 0x3e, 0x36, 0x47, 0x06, 0x81, 0x6a, 0xba, 0x3e, + 0x25, 0x71, 0x78, 0x50, 0xc2, 0x6c, 0x9c, 0xd0, 0xd8, 0x9d, + }, + }, + { + .msg = "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq", + .digest = { + 0x84, 0x98, 0x3e, 0x44, 0x1c, 0x3b, 0xd2, 0x6e, 0xba, 0xae, + 0x4a, 0xa1, 0xf9, 0x51, 0x29, 0xe5, 0xe5, 0x46, 0x70, 0xf1, + }, + }, +}; + +static void __init __constructor test_sha1(void) +{ + for ( unsigned int i = 0; i < ARRAY_SIZE(tests); ++i ) + { + const struct test *t = &tests[i]; + uint8_t res[SHA1_DIGEST_SIZE] = {}; + + sha1(res, t->msg, strlen(t->msg)); + + if ( memcmp(res, t->digest, sizeof(t->digest)) == 0 ) + continue; + + panic("%s() msg '%s' failed\n" + " expected %" STR(SHA1_DIGEST_SIZE) "phN\n" + " got %" STR(SHA1_DIGEST_SIZE) "phN\n", + __func__, t->msg, t->digest, res); + } +} +#endif /* CONFIG_SELF_TESTS */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Dec 03 10:55:09 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 03 Dec 2025 10:55:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1176664.1501102 (Exim 4.92) (envelope-from ) id 1vQkVk-0007De-RK; Wed, 03 Dec 2025 10:55:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1176664.1501102; Wed, 03 Dec 2025 10:55:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQkVk-0007DW-OU; Wed, 03 Dec 2025 10:55:04 +0000 Received: by outflank-mailman (input) for mailman id 1176664; Wed, 03 Dec 2025 10:55:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQkVj-0007DQ-F4 for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:55:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQkVi-004nh9-1u for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:55:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQkVi-00Bw3P-1n for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:55:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=RVZ66PmOlXlPgDLpbFVxxNqygT/lE/YcMH90CKQ5Tcw=; b=5NG7iWbyFKHWeq1Q7cmGzOHH2z mVB47UuGKm5/Q2T/SqWnVeIPnqPLO13qRCAIfDFsiqOYNye6HZx0B3pFnC+ofVyRBOHplp6vMAMNE gridc2YMkL46OvMtD4etkv8qyLAjW94OyUZJ1jWIim6b7Yqy+cXL9u2vfqHo/U5wfz2A=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging-4.21] x86/msix: fix incorrect refcount decrease in msixtlb Message-Id: Date: Wed, 03 Dec 2025 10:55:02 +0000 commit 747d10b76fef2b2d4e307df396c8e66ec42fcbd7 Author: Roger Pau Monné AuthorDate: Wed Dec 3 11:40:36 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 3 11:40:36 2025 +0100 x86/msix: fix incorrect refcount decrease in msixtlb The usage of atomic_dec_and_test() in msixtbl_pt_unregister() is inverted: the function will return true when the refcount reaches 0. The current code does the opposite and calls del_msixtbl_entry() when there are still refcounts held on the object. However all callers of msixtbl_pt_unregister() are serialized on the domctl lock, and hence there cannot be parallel calls to msixtbl_pt_unregister() that could lead to double freeing of the same object. The incorrect freeing with active msixtlb entries will result in a possible guest visible malfunction, but no internal Xen state corruption. While entries are leaked once the last pIRQ is unbound, the same entry would get re-used if the device has pIRQs bound again. The guest cannot exploit this incorrect refcount check to leak arbitrary amounts of memory by repeatedly enabling and disabling (binding and unbinding) MSI-X entries. Fixes: 34097f0d3080 ('hvm: passthrough MSI-X mask bit acceleration') Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich master commit: ea87662c7781c5abeddcd62923eb405d10522ae9 master date: 2025-11-26 09:46:17 +0100 --- xen/arch/x86/hvm/vmsi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c index 32e417bc15..27b1f089e2 100644 --- a/xen/arch/x86/hvm/vmsi.c +++ b/xen/arch/x86/hvm/vmsi.c @@ -716,7 +716,7 @@ out: return; found: - if ( !atomic_dec_and_test(&entry->refcnt) ) + if ( atomic_dec_and_test(&entry->refcnt) ) del_msixtbl_entry(entry); spin_unlock_irq(&irqd->lock); -- generated by git-patchbot for /home/xen/git/xen.git#staging-4.21 From xen-changelog-bounces@lists.xenproject.org Wed Dec 03 10:55:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 03 Dec 2025 10:55:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1176666.1501106 (Exim 4.92) (envelope-from ) id 1vQkVt-0007Fn-Ts; Wed, 03 Dec 2025 10:55:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1176666.1501106; Wed, 03 Dec 2025 10:55:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQkVt-0007Ff-R7; Wed, 03 Dec 2025 10:55:13 +0000 Received: by outflank-mailman (input) for mailman id 1176666; Wed, 03 Dec 2025 10:55:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQkVs-0007FR-NW for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:55:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQkVs-004nhF-2D for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:55:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQkVs-00BxE6-26 for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:55:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=H9NTM4h8V+FRUBOxrEj4zeI2vxNyPQmEqlr3Il7nwdA=; b=18bBPgb+ScL62/DHqsXzMZqmoi y6NZ0/DrqvODxOY4qUrmaB4Hnssxa4Oj/nUJNACbElRNnVgzMpbLBTdf6Q3sKMWu67w+Lbz68WzWY gwJfGzgShdB0UKlNvlR0JrV5jR+NJ2EW9QNoqh9+BGCpyQY8X4rzaM1SCLpf6c+Uq0Es=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging-4.21] x86/vhpet: Fix sanitization of legacy IRQ route Message-Id: Date: Wed, 03 Dec 2025 10:55:12 +0000 commit ba9142efd703e7d8c0b2e6457fcdbd5da935cb08 Author: Tu Dinh AuthorDate: Wed Dec 3 11:40:56 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 3 11:40:56 2025 +0100 x86/vhpet: Fix sanitization of legacy IRQ route When setting a timer's config register, timer_sanitize_int_route will always reset the IRQ route value to what's valid corresponding to the !HPET_CFG_LEGACY case. This is applied even if the HPET is set to HPET_CFG_LEGACY. When some operating systems (e.g. Windows) try to write to a timer config, they will verify and rewrite the register if the values don't match what they expect. This causes an unnecessary write to HPET_Tn_CFG. Note, the HPET specification states that for the Tn_INT_ROUTE_CNF field: "If the value is not supported by this prarticular timer, then the value read back will not match what is written. [...] If the LegacyReplacement Route bit is set, then Timers 0 and 1 will have a different routing, and this bit field has no effect for those two timers." Therefore, Xen should not reset timer_int_route if legacy mode is enabled, regardless of what's in there. Fixes: ec40d3fe2147 ("x86/vhpet: check that the set interrupt route is valid") Signed-off-by: Tu Dinh Reviewed-by: Jan Beulich master commit: fb0e37df71a31318c61e0715ffed3e149ca8a4aa master date: 2025-11-26 12:10:21 +0100 --- xen/arch/x86/hvm/hpet.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/hvm/hpet.c b/xen/arch/x86/hvm/hpet.c index f0e5f877f4..e317ec1f5f 100644 --- a/xen/arch/x86/hvm/hpet.c +++ b/xen/arch/x86/hvm/hpet.c @@ -48,6 +48,8 @@ #define timer_is_32bit(h, n) (timer_config(h, n) & HPET_TN_32BIT) #define hpet_enabled(h) ((h)->hpet.config & HPET_CFG_ENABLE) #define timer_level(h, n) (timer_config(h, n) & HPET_TN_LEVEL) +#define timer_is_legacy(h, n) \ + (((n) <= 1) && ((h)->hpet.config & HPET_CFG_LEGACY)) #define timer_int_route(h, n) MASK_EXTR(timer_config(h, n), HPET_TN_ROUTE) @@ -55,7 +57,8 @@ MASK_EXTR(timer_config(h, n), HPET_TN_INT_ROUTE_CAP) #define timer_int_route_valid(h, n) \ - ((1u << timer_int_route(h, n)) & timer_int_route_cap(h, n)) + (timer_is_legacy(h, n) || \ + ((1u << timer_int_route(h, n)) & timer_int_route_cap(h, n))) static inline uint64_t hpet_read_maincounter(HPETState *h, uint64_t guest_time) { @@ -275,7 +278,7 @@ static void hpet_set_timer(HPETState *h, unsigned int tn, ? (uint32_t)diff : 0; destroy_periodic_time(&h->pt[tn]); - if ( (tn <= 1) && (h->hpet.config & HPET_CFG_LEGACY) ) + if ( timer_is_legacy(h, tn) ) { /* if LegacyReplacementRoute bit is set, HPET specification requires timer0 be routed to IRQ0 in NON-APIC or IRQ2 in the I/O APIC, @@ -379,6 +382,14 @@ static int cf_check hpet_write( h->hpet.config = hpet_fixup_reg(new_val, old_val, HPET_CFG_ENABLE | HPET_CFG_LEGACY); + /* + * The first 2 channels' interrupt route values only matter when + * HPET_CFG_LEGACY is disabled. However, for simplicity's sake, always + * resanitize all channels anyway. + */ + for ( i = 0; i < HPET_TIMER_NUM; i++ ) + timer_sanitize_int_route(h, i); + if ( !(old_val & HPET_CFG_ENABLE) && (new_val & HPET_CFG_ENABLE) ) { /* Enable main counter and interrupt generation. */ -- generated by git-patchbot for /home/xen/git/xen.git#staging-4.21 From xen-changelog-bounces@lists.xenproject.org Wed Dec 03 10:55:24 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 03 Dec 2025 10:55:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1176667.1501110 (Exim 4.92) (envelope-from ) id 1vQkW4-0007K7-VB; Wed, 03 Dec 2025 10:55:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1176667.1501110; Wed, 03 Dec 2025 10:55:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQkW4-0007Jz-SU; Wed, 03 Dec 2025 10:55:24 +0000 Received: by outflank-mailman (input) for mailman id 1176667; Wed, 03 Dec 2025 10:55:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQkW2-0007Jp-Tf for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:55:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQkW2-004nhR-2p for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:55:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQkW2-00BydS-2d for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:55:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=tYsQQQ9pBdGYCm1NuOhTjLZ2K3PqlpJgACXdzoLlrcA=; b=Tux9tkmOh/ipbi7l82WcknFIS0 R/hAua3BmWC3c3LR4bYOkwAtCASAQRKXzoUsmX32Ad6VfVi/pxTbs2VcRPZnSaawtpnDo4jAqTxpJ 5A85knRz3TcCAnSa0G+Zm4/TkHNEYItAJhC7Db9laCfcRoOY7hMs57Bpnvgwvq5izi54=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging-4.21] x86/amd: Stop updating the Zenbleed mitigation dynamically Message-Id: Date: Wed, 03 Dec 2025 10:55:22 +0000 commit 81e71ef34f157e78afa40c39d07282429b9e1dda Author: Andrew Cooper AuthorDate: Wed Dec 3 11:41:24 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 3 11:41:24 2025 +0100 x86/amd: Stop updating the Zenbleed mitigation dynamically This was potentially helpful when the chickenbit was the only mitigation and microcode had not been released, but that was two years ago. Zenbleed microcode has been avaialble since December 2023, and the subsequent Entrysign signature vulnerability means that firmware updates block OS-loading and more OS-loadable microcode will be produced for Zen2. i.e. the Zenbleed fix is not going to appear at runtime these days. No practical change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich master commit: 5cd1ac15756ed7d9175685a3d16fc23fc86b3db4 master date: 2025-11-27 18:22:20 +0000 --- xen/arch/x86/cpu/amd.c | 2 +- xen/arch/x86/cpu/microcode/amd.c | 2 -- xen/arch/x86/include/asm/processor.h | 2 -- 3 files changed, 1 insertion(+), 5 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index 9767f63539..789500d7ab 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -979,7 +979,7 @@ void __init detect_zen2_null_seg_behaviour(void) } -void amd_check_zenbleed(void) +static void amd_check_zenbleed(void) { const struct cpu_signature *sig = &this_cpu(cpu_sig); unsigned int good_rev; diff --git a/xen/arch/x86/cpu/microcode/amd.c b/xen/arch/x86/cpu/microcode/amd.c index 4a7573c885..e7ae1e8023 100644 --- a/xen/arch/x86/cpu/microcode/amd.c +++ b/xen/arch/x86/cpu/microcode/amd.c @@ -380,8 +380,6 @@ static int cf_check apply_microcode(const struct microcode_patch *patch, "microcode: CPU%u updated from revision %#x to %#x, date = %04x-%02x-%02x\n", cpu, old_rev, rev, patch->year, patch->month, patch->day); - amd_check_zenbleed(); - return 0; } diff --git a/xen/arch/x86/include/asm/processor.h b/xen/arch/x86/include/asm/processor.h index 1342241742..2e087c6257 100644 --- a/xen/arch/x86/include/asm/processor.h +++ b/xen/arch/x86/include/asm/processor.h @@ -435,8 +435,6 @@ enum ap_boot_method { }; extern enum ap_boot_method ap_boot_method; -void amd_check_zenbleed(void); - #endif /* !__ASSEMBLY__ */ #endif /* __ASM_X86_PROCESSOR_H */ -- generated by git-patchbot for /home/xen/git/xen.git#staging-4.21 From xen-changelog-bounces@lists.xenproject.org Wed Dec 03 10:55:35 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 03 Dec 2025 10:55:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1176668.1501114 (Exim 4.92) (envelope-from ) id 1vQkWF-0007MJ-0L; Wed, 03 Dec 2025 10:55:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1176668.1501114; Wed, 03 Dec 2025 10:55:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQkWE-0007MB-Tp; Wed, 03 Dec 2025 10:55:34 +0000 Received: by outflank-mailman (input) for mailman id 1176668; Wed, 03 Dec 2025 10:55:33 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQkWD-0007M3-2D for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:55:33 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQkWD-004nhZ-06 for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:55:33 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQkWC-00Bzj0-32 for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:55:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Y5/wBJcOgGokaARlo3mWEtUrKQ4G5avFvgHgr6gEog0=; b=1bfFz8sQwbH0AkP5MsFXdfkRrL MI8tPGEy/rilPJQ/Zzb5LRXO5LyaavRZt3WnSdABbXIJ6dqZMFb5zsqQ3gBDhIJGu0ZvMoufxBrtp cHKb1jVBPXFb2KRdzcJ6vrkvmMXEiVibXzwiB4SyJfXXguBOKiBOpSfEmpC9WzuPf4nw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging-4.21] x86/amd: Fix race editing DE_CFG Message-Id: Date: Wed, 03 Dec 2025 10:55:32 +0000 commit 16e22efbded42b56d00181409ca2b675dc7c561b Author: Andrew Cooper AuthorDate: Wed Dec 3 11:41:51 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 3 11:41:51 2025 +0100 x86/amd: Fix race editing DE_CFG We have two different functions explaining that DE_CFG is Core-scoped and that writes are racy but happen to be safe. This is only true when there's one of them. Introduce amd_init_de_cfg() to be the singular function which writes to DE_CFG, modelled after the logic we already have for BP_CFG. While reworking amd_check_zenbleed() into a simple predicate used by amd_init_de_cfg(), fix the microcode table. The 'good_rev' was specific to an individual stepping and not valid to be matched by model, let alone a range. The only CPUs incorrectly matched that I can locate appear to be pre-production, and probably didn't get Zenbleed microcode. Rework amd_init_lfence() to be amd_init_lfence_dispatch() with only the purpose of configuring X86_FEATURE_LFENCE_DISPATCH in the case that it needs synthesising. Run it on the BSP only and use setup_force_cpu_cap() to prevent the bit disappearing on a subseuqent CPUID rescan. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich master commit: d0c75dc4c028bc32fd9cf1d4358973929548de54 master date: 2025-12-01 16:20:41 +0000 --- xen/arch/x86/cpu/amd.c | 224 +++++++++++++++++++++++------------------------ xen/arch/x86/cpu/cpu.h | 3 +- xen/arch/x86/cpu/hygon.c | 6 +- 3 files changed, 115 insertions(+), 118 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index 789500d7ab..35b9dbf149 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -747,45 +747,6 @@ void amd_log_freq(const struct cpuinfo_x86 *c) printk("CPU%u: %u MHz\n", smp_processor_id(), low_mhz); } -void amd_init_lfence(struct cpuinfo_x86 *c) -{ - uint64_t value; - - /* - * Some hardware has LFENCE dispatch serialising always enabled, - * nothing to do on that case. - */ - if (test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability)) - return; - - /* - * Attempt to set lfence to be Dispatch Serialising. This MSR almost - * certainly isn't virtualised (and Xen at least will leak the real - * value in but silently discard writes), as well as being per-core - * rather than per-thread, so do a full safe read/write/readback cycle - * in the worst case. - */ - if (rdmsr_safe(MSR_AMD64_DE_CFG, &value)) - /* Unable to read. Assume the safer default. */ - __clear_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); - else if (value & AMD64_DE_CFG_LFENCE_SERIALISE) - /* Already dispatch serialising. */ - __set_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); - else if (wrmsr_safe(MSR_AMD64_DE_CFG, - value | AMD64_DE_CFG_LFENCE_SERIALISE) || - rdmsr_safe(MSR_AMD64_DE_CFG, &value) || - !(value & AMD64_DE_CFG_LFENCE_SERIALISE)) - /* Attempt to set failed. Assume the safer default. */ - __clear_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); - else - /* Successfully enabled! */ - __set_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); -} - /* * Refer to the AMD Speculative Store Bypass whitepaper: * https://developer.amd.com/wp-content/resources/124441_AMD64_SpeculativeStoreBypassDisable_Whitepaper_final.pdf @@ -979,76 +940,6 @@ void __init detect_zen2_null_seg_behaviour(void) } -static void amd_check_zenbleed(void) -{ - const struct cpu_signature *sig = &this_cpu(cpu_sig); - unsigned int good_rev; - uint64_t val, old_val, chickenbit = (1 << 9); - - /* - * If we're virtualised, we can't do family/model checks safely, and - * we likely wouldn't have access to DE_CFG even if we could see a - * microcode revision. - * - * A hypervisor may hide AVX as a stopgap mitigation. We're not in a - * position to care either way. An admin doesn't want to be disabling - * AVX as a mitigation on any build of Xen with this logic present. - */ - if (cpu_has_hypervisor || boot_cpu_data.x86 != 0x17) - return; - - switch (boot_cpu_data.x86_model) { - case 0x30 ... 0x3f: good_rev = 0x0830107a; break; - case 0x60 ... 0x67: good_rev = 0x0860010b; break; - case 0x68 ... 0x6f: good_rev = 0x08608105; break; - case 0x70 ... 0x7f: good_rev = 0x08701032; break; - case 0xa0 ... 0xaf: good_rev = 0x08a00008; break; - default: - /* - * With the Fam17h check above, most parts getting here are - * Zen1. They're not affected. Assume Zen2 ones making it - * here are affected regardless of microcode version. - */ - if (is_zen1_uarch()) - return; - good_rev = ~0U; - break; - } - - rdmsrl(MSR_AMD64_DE_CFG, val); - old_val = val; - - /* - * Microcode is the preferred mitigation, in terms of performance. - * However, without microcode, this chickenbit (specific to the Zen2 - * uarch) disables Floating Point Mov-Elimination to mitigate the - * issue. - */ - val &= ~chickenbit; - if (sig->rev < good_rev) - val |= chickenbit; - - if (val == old_val) - /* Nothing to change. */ - return; - - /* - * DE_CFG is a Core-scoped MSR, and this write is racy during late - * microcode load. However, both threads calculate the new value from - * state which is shared, and unrelated to the old value, so the - * result should be consistent. - */ - wrmsrl(MSR_AMD64_DE_CFG, val); - - /* - * Inform the admin that we changed something, but don't spam, - * especially during a late microcode load. - */ - if (smp_processor_id() == 0) - printk(XENLOG_INFO "Zenbleed mitigation - using %s\n", - val & chickenbit ? "chickenbit" : "microcode"); -} - static void cf_check fam17_disable_c6(void *arg) { /* Disable C6 by clearing the CCR{0,1,2}_CC6EN bits. */ @@ -1075,6 +966,109 @@ static void cf_check fam17_disable_c6(void *arg) wrmsrl(MSR_AMD_CSTATE_CFG, val & mask); } +static bool zenbleed_use_chickenbit(void) +{ + unsigned int curr_rev; + uint8_t fixed_rev; + + /* Zenbleed only affects Zen2. Nothing to do on non-Fam17h systems. */ + if ( boot_cpu_data.family != 0x17 ) + return false; + + curr_rev = this_cpu(cpu_sig).rev; + switch ( curr_rev >> 8 ) + { + case 0x083010: fixed_rev = 0x7a; break; + case 0x086001: fixed_rev = 0x0b; break; + case 0x086081: fixed_rev = 0x05; break; + case 0x087010: fixed_rev = 0x32; break; + case 0x08a000: fixed_rev = 0x08; break; + default: + /* + * With the Fam17h check above, most parts getting here are Zen1. + * They're not affected. Assume Zen2 ones making it here are affected + * regardless of microcode version. + */ + return is_zen2_uarch(); + } + + return (uint8_t)curr_rev >= fixed_rev; +} + +void amd_init_de_cfg(const struct cpuinfo_x86 *c) +{ + uint64_t val, new = 0; + + /* + * The MSR doesn't exist on Fam 0xf/0x11. If virtualised, we won't have + * mutable access even if we can read it. + */ + if ( c->family == 0xf || c->family == 0x11 || cpu_has_hypervisor ) + return; + + /* + * On Zen3 (Fam 0x19) and later CPUs, LFENCE is unconditionally dispatch + * serialising, and is enumerated in CPUID. + * + * On older systems, LFENCE is unconditionally dispatch serialising (when + * the MSR doesn't exist), or can be made so by setting this bit. + */ + if ( !test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability) ) + new |= AMD64_DE_CFG_LFENCE_SERIALISE; + + /* + * If vulnerable to Zenbleed and not mitigated in microcode, use the + * bigger hammer. + */ + if ( zenbleed_use_chickenbit() ) + new |= (1 << 9); + + /* Avoid reading DE_CFG if we don't intend to change anything. */ + if ( !new ) + return; + + rdmsrl(MSR_AMD64_DE_CFG, val); + + if ( (val & new) == new ) + return; + + /* + * DE_CFG is a Core-scoped MSR, and this write is racy. However, both + * threads calculate the new value from state which expected to be + * consistent across CPUs and unrelated to the old value, so the result + * should be consistent. + */ + wrmsrl(MSR_AMD64_DE_CFG, val | new); +} + +void __init amd_init_lfence_dispatch(void) +{ + struct cpuinfo_x86 *c = &boot_cpu_data; + uint64_t val; + + if ( test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability) ) + /* LFENCE is forced dispatch serialising and we can't control it. */ + return; + + if ( c->family == 0xf || c->family == 0x11 ) + /* MSR doesn't exist, LFENCE is dispatch serialising. */ + goto set; + + if ( rdmsr_safe(MSR_AMD64_DE_CFG, &val) ) + /* Unable to read. Assume the safer default. */ + goto clear; + + if ( val & AMD64_DE_CFG_LFENCE_SERIALISE ) + goto set; + + clear: + setup_clear_cpu_cap(X86_FEATURE_LFENCE_DISPATCH); + return; + + set: + setup_force_cpu_cap(X86_FEATURE_LFENCE_DISPATCH); +} + static void amd_check_bp_cfg(void) { uint64_t val, new = 0; @@ -1118,6 +1112,11 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) u32 l, h; uint64_t value; + amd_init_de_cfg(c); + + if (c == &boot_cpu_data) + amd_init_lfence_dispatch(); /* Needs amd_init_de_cfg() */ + /* Disable TLB flush filter by setting HWCR.FFDIS on K8 * bit 6 of msr C001_0015 * @@ -1156,12 +1155,6 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) if (c == &boot_cpu_data && !cpu_has(c, X86_FEATURE_RSTR_FP_ERR_PTRS)) setup_force_cpu_cap(X86_BUG_FPU_PTRS); - if (c->x86 == 0x0f || c->x86 == 0x11) - /* Always dispatch serialising on this hardare. */ - __set_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability); - else /* Implicily "== 0x10 || >= 0x12" by being 64bit. */ - amd_init_lfence(c); - amd_init_ssbd(c); if (c->x86 == 0x17) @@ -1378,7 +1371,6 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) if ((smp_processor_id() == 1) && !cpu_has(c, X86_FEATURE_ITSC)) disable_c1_ramping(); - amd_check_zenbleed(); amd_check_bp_cfg(); if (fam17_c6_disabled) diff --git a/xen/arch/x86/cpu/cpu.h b/xen/arch/x86/cpu/cpu.h index cbb434f3a2..8bed3f5249 100644 --- a/xen/arch/x86/cpu/cpu.h +++ b/xen/arch/x86/cpu/cpu.h @@ -24,7 +24,8 @@ extern bool detect_extended_topology(struct cpuinfo_x86 *c); void cf_check early_init_amd(struct cpuinfo_x86 *c); void amd_log_freq(const struct cpuinfo_x86 *c); -void amd_init_lfence(struct cpuinfo_x86 *c); +void amd_init_de_cfg(const struct cpuinfo_x86 *c); +void amd_init_lfence_dispatch(void); void amd_init_ssbd(const struct cpuinfo_x86 *c); void amd_init_spectral_chicken(void); void detect_zen2_null_seg_behaviour(void); diff --git a/xen/arch/x86/cpu/hygon.c b/xen/arch/x86/cpu/hygon.c index f7508cc8fc..c3faabbdb7 100644 --- a/xen/arch/x86/cpu/hygon.c +++ b/xen/arch/x86/cpu/hygon.c @@ -31,7 +31,11 @@ static void cf_check init_hygon(struct cpuinfo_x86 *c) { unsigned long long value; - amd_init_lfence(c); + amd_init_de_cfg(c); + + if (c == &boot_cpu_data) + amd_init_lfence_dispatch(); /* Needs amd_init_de_cfg() */ + amd_init_ssbd(c); /* Probe for NSCB on Zen2 CPUs when not virtualised */ -- generated by git-patchbot for /home/xen/git/xen.git#staging-4.21 From xen-changelog-bounces@lists.xenproject.org Wed Dec 03 10:55:44 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 03 Dec 2025 10:55:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1176669.1501118 (Exim 4.92) (envelope-from ) id 1vQkWO-0007OE-1i; Wed, 03 Dec 2025 10:55:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1176669.1501118; Wed, 03 Dec 2025 10:55:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQkWN-0007O6-V8; Wed, 03 Dec 2025 10:55:43 +0000 Received: by outflank-mailman (input) for mailman id 1176669; Wed, 03 Dec 2025 10:55:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQkWN-0007O0-Nz for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:55:43 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQkWN-004nhf-2K for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:55:43 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQkWN-00C0vy-28 for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:55:43 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=xgThlRGYJjxY32u9pLiEaB18mLAu0Q+5SrICxkc/pos=; b=teZjFY/xmY4O31QIAC33zVaTXb OAFu4gQ95eMYDp60KP17Ogmm+Ul9FrCOmmsBpvZBFtejkK85VD+OzXrD7GhwjPjeGqLSs+u2dcF53 kJ2YHIM0nFk0mVP9wtiy7bAfbLITqG61ZdiXtRICBWPxOyvNUFSEaYB0ciqZtjKOYi1U=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging-4.20] x86/msix: fix incorrect refcount decrease in msixtlb Message-Id: Date: Wed, 03 Dec 2025 10:55:43 +0000 commit 9fb2b66c60a5b0389ad99ecdd02cb966ff7a9c37 Author: Roger Pau Monné AuthorDate: Wed Dec 3 11:43:36 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 3 11:43:36 2025 +0100 x86/msix: fix incorrect refcount decrease in msixtlb The usage of atomic_dec_and_test() in msixtbl_pt_unregister() is inverted: the function will return true when the refcount reaches 0. The current code does the opposite and calls del_msixtbl_entry() when there are still refcounts held on the object. However all callers of msixtbl_pt_unregister() are serialized on the domctl lock, and hence there cannot be parallel calls to msixtbl_pt_unregister() that could lead to double freeing of the same object. The incorrect freeing with active msixtlb entries will result in a possible guest visible malfunction, but no internal Xen state corruption. While entries are leaked once the last pIRQ is unbound, the same entry would get re-used if the device has pIRQs bound again. The guest cannot exploit this incorrect refcount check to leak arbitrary amounts of memory by repeatedly enabling and disabling (binding and unbinding) MSI-X entries. Fixes: 34097f0d3080 ('hvm: passthrough MSI-X mask bit acceleration') Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich master commit: ea87662c7781c5abeddcd62923eb405d10522ae9 master date: 2025-11-26 09:46:17 +0100 --- xen/arch/x86/hvm/vmsi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c index fd83abb929..e175b5eaa2 100644 --- a/xen/arch/x86/hvm/vmsi.c +++ b/xen/arch/x86/hvm/vmsi.c @@ -758,7 +758,7 @@ out: return; found: - if ( !atomic_dec_and_test(&entry->refcnt) ) + if ( atomic_dec_and_test(&entry->refcnt) ) del_msixtbl_entry(entry); spin_unlock_irq(&irqd->lock); -- generated by git-patchbot for /home/xen/git/xen.git#staging-4.20 From xen-changelog-bounces@lists.xenproject.org Wed Dec 03 10:55:55 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 03 Dec 2025 10:55:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1176670.1501122 (Exim 4.92) (envelope-from ) id 1vQkWZ-0007QZ-2r; Wed, 03 Dec 2025 10:55:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1176670.1501122; Wed, 03 Dec 2025 10:55:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQkWZ-0007QR-0E; Wed, 03 Dec 2025 10:55:55 +0000 Received: by outflank-mailman (input) for mailman id 1176670; Wed, 03 Dec 2025 10:55:53 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQkWX-0007QH-Sl for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:55:53 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQkWX-004nhm-2l for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:55:53 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQkWX-00C2J2-2e for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:55:53 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=UQjAIkWjxHZ+2QqQdWZ0hkFxjzljpV2pX+vdp20Viqc=; b=A3CPe5dR+NOJq7ORxWD1PP9bs0 /fc38huu0guHSzXOZx8eFTCQUFTx8eb7P0+xVqbiQkOYbVqEvvdZ2Nle+SH9s1uBGvB1fckX0aYB+ A2CaEQ5ZUMDI3zNiCSNbqtOhsw3wHBTChvhR0TCebcFDsVAAShSYMo89PwblNNJMwWV0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging-4.20] x86/vhpet: Fix sanitization of legacy IRQ route Message-Id: Date: Wed, 03 Dec 2025 10:55:53 +0000 commit 601bbb00d267d7e9479e4027254ffb6416cedc29 Author: Tu Dinh AuthorDate: Wed Dec 3 11:43:57 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 3 11:43:57 2025 +0100 x86/vhpet: Fix sanitization of legacy IRQ route When setting a timer's config register, timer_sanitize_int_route will always reset the IRQ route value to what's valid corresponding to the !HPET_CFG_LEGACY case. This is applied even if the HPET is set to HPET_CFG_LEGACY. When some operating systems (e.g. Windows) try to write to a timer config, they will verify and rewrite the register if the values don't match what they expect. This causes an unnecessary write to HPET_Tn_CFG. Note, the HPET specification states that for the Tn_INT_ROUTE_CNF field: "If the value is not supported by this prarticular timer, then the value read back will not match what is written. [...] If the LegacyReplacement Route bit is set, then Timers 0 and 1 will have a different routing, and this bit field has no effect for those two timers." Therefore, Xen should not reset timer_int_route if legacy mode is enabled, regardless of what's in there. Fixes: ec40d3fe2147 ("x86/vhpet: check that the set interrupt route is valid") Signed-off-by: Tu Dinh Reviewed-by: Jan Beulich master commit: fb0e37df71a31318c61e0715ffed3e149ca8a4aa master date: 2025-11-26 12:10:21 +0100 --- xen/arch/x86/hvm/hpet.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/hvm/hpet.c b/xen/arch/x86/hvm/hpet.c index f0e5f877f4..e317ec1f5f 100644 --- a/xen/arch/x86/hvm/hpet.c +++ b/xen/arch/x86/hvm/hpet.c @@ -48,6 +48,8 @@ #define timer_is_32bit(h, n) (timer_config(h, n) & HPET_TN_32BIT) #define hpet_enabled(h) ((h)->hpet.config & HPET_CFG_ENABLE) #define timer_level(h, n) (timer_config(h, n) & HPET_TN_LEVEL) +#define timer_is_legacy(h, n) \ + (((n) <= 1) && ((h)->hpet.config & HPET_CFG_LEGACY)) #define timer_int_route(h, n) MASK_EXTR(timer_config(h, n), HPET_TN_ROUTE) @@ -55,7 +57,8 @@ MASK_EXTR(timer_config(h, n), HPET_TN_INT_ROUTE_CAP) #define timer_int_route_valid(h, n) \ - ((1u << timer_int_route(h, n)) & timer_int_route_cap(h, n)) + (timer_is_legacy(h, n) || \ + ((1u << timer_int_route(h, n)) & timer_int_route_cap(h, n))) static inline uint64_t hpet_read_maincounter(HPETState *h, uint64_t guest_time) { @@ -275,7 +278,7 @@ static void hpet_set_timer(HPETState *h, unsigned int tn, ? (uint32_t)diff : 0; destroy_periodic_time(&h->pt[tn]); - if ( (tn <= 1) && (h->hpet.config & HPET_CFG_LEGACY) ) + if ( timer_is_legacy(h, tn) ) { /* if LegacyReplacementRoute bit is set, HPET specification requires timer0 be routed to IRQ0 in NON-APIC or IRQ2 in the I/O APIC, @@ -379,6 +382,14 @@ static int cf_check hpet_write( h->hpet.config = hpet_fixup_reg(new_val, old_val, HPET_CFG_ENABLE | HPET_CFG_LEGACY); + /* + * The first 2 channels' interrupt route values only matter when + * HPET_CFG_LEGACY is disabled. However, for simplicity's sake, always + * resanitize all channels anyway. + */ + for ( i = 0; i < HPET_TIMER_NUM; i++ ) + timer_sanitize_int_route(h, i); + if ( !(old_val & HPET_CFG_ENABLE) && (new_val & HPET_CFG_ENABLE) ) { /* Enable main counter and interrupt generation. */ -- generated by git-patchbot for /home/xen/git/xen.git#staging-4.20 From xen-changelog-bounces@lists.xenproject.org Wed Dec 03 10:56:05 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 03 Dec 2025 10:56:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1176672.1501127 (Exim 4.92) (envelope-from ) id 1vQkWj-0007TK-5Z; Wed, 03 Dec 2025 10:56:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1176672.1501127; Wed, 03 Dec 2025 10:56:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQkWj-0007TC-2q; Wed, 03 Dec 2025 10:56:05 +0000 Received: by outflank-mailman (input) for mailman id 1176672; Wed, 03 Dec 2025 10:56:04 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQkWi-0007T2-0n for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:56:04 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQkWh-004niO-3D for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:56:03 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQkWh-00C3hU-2w for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:56:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=9PRojRwB+cNxsMUsqkW64bXEQLUOo0cYFCafGMAkMps=; b=cCUZa58UDK+q+YHnb/WfwNSJQy cH/y1zS6KGlN07/BEFEUwcXrrtqQAsDT84ULbD1TmkQOI3TG/COwKpcB2cSgLLIM7k62Axf9dmZVG fAJC3yzU1AvuecjjY6RbsBkotnCJbLx6/cpfiaxQcECOpACLSo/EKWNa6CfUgUEqrqMw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging-4.20] x86/amd: Stop updating the Zenbleed mitigation dynamically Message-Id: Date: Wed, 03 Dec 2025 10:56:03 +0000 commit f5b36e23ec452cec8b748e24c6e381ff8aeb6b95 Author: Andrew Cooper AuthorDate: Wed Dec 3 11:44:12 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 3 11:44:12 2025 +0100 x86/amd: Stop updating the Zenbleed mitigation dynamically This was potentially helpful when the chickenbit was the only mitigation and microcode had not been released, but that was two years ago. Zenbleed microcode has been avaialble since December 2023, and the subsequent Entrysign signature vulnerability means that firmware updates block OS-loading and more OS-loadable microcode will be produced for Zen2. i.e. the Zenbleed fix is not going to appear at runtime these days. No practical change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich master commit: 5cd1ac15756ed7d9175685a3d16fc23fc86b3db4 master date: 2025-11-27 18:22:20 +0000 --- xen/arch/x86/cpu/amd.c | 2 +- xen/arch/x86/cpu/microcode/amd.c | 2 -- xen/arch/x86/include/asm/processor.h | 2 -- 3 files changed, 1 insertion(+), 5 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index 597b0f073d..32bb5792ca 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -913,7 +913,7 @@ void __init detect_zen2_null_seg_behaviour(void) } -void amd_check_zenbleed(void) +static void amd_check_zenbleed(void) { const struct cpu_signature *sig = &this_cpu(cpu_sig); unsigned int good_rev; diff --git a/xen/arch/x86/cpu/microcode/amd.c b/xen/arch/x86/cpu/microcode/amd.c index 0b51796791..995a050e52 100644 --- a/xen/arch/x86/cpu/microcode/amd.c +++ b/xen/arch/x86/cpu/microcode/amd.c @@ -373,8 +373,6 @@ static int cf_check apply_microcode(const struct microcode_patch *patch, "microcode: CPU%u updated from revision %#x to %#x, date = %04x-%02x-%02x\n", cpu, old_rev, rev, patch->year, patch->month, patch->day); - amd_check_zenbleed(); - return 0; } diff --git a/xen/arch/x86/include/asm/processor.h b/xen/arch/x86/include/asm/processor.h index 1aec6691c9..98734f4d3f 100644 --- a/xen/arch/x86/include/asm/processor.h +++ b/xen/arch/x86/include/asm/processor.h @@ -504,8 +504,6 @@ enum ap_boot_method { }; extern enum ap_boot_method ap_boot_method; -void amd_check_zenbleed(void); - #endif /* !__ASSEMBLY__ */ #endif /* __ASM_X86_PROCESSOR_H */ -- generated by git-patchbot for /home/xen/git/xen.git#staging-4.20 From xen-changelog-bounces@lists.xenproject.org Wed Dec 03 10:56:15 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 03 Dec 2025 10:56:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1176673.1501131 (Exim 4.92) (envelope-from ) id 1vQkWt-0007VT-72; Wed, 03 Dec 2025 10:56:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1176673.1501131; Wed, 03 Dec 2025 10:56:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQkWt-0007VL-4F; Wed, 03 Dec 2025 10:56:15 +0000 Received: by outflank-mailman (input) for mailman id 1176673; Wed, 03 Dec 2025 10:56:14 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQkWs-0007VD-3o for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:56:14 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQkWs-004niV-0H for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:56:14 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQkWs-00C4tq-0A for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:56:14 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ycyZ5LpiPUY3DradKftFE+9myHrYAtjuXHCJdBknjQ0=; b=hyvDc2iq6Wf/6omBRjLWt70jmJ k0hALayFLcLHgbZlQJd2TpS5t0fx1a0baXT70oFYU2FUP1ipJ3kC/lPvUylnxUgyrcuvb/zWg+gxR UoawVj0T8eqWnTEc0zLTvvk89IC783rZhxzRQKkqkCNQdIZEI1b8LBylXmk9OVJYzGAs=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging-4.20] x86/amd: Fix race editing DE_CFG Message-Id: Date: Wed, 03 Dec 2025 10:56:14 +0000 commit bb897593b7a73926f45391f5a39cbbf1c381275e Author: Andrew Cooper AuthorDate: Wed Dec 3 11:44:35 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 3 11:44:35 2025 +0100 x86/amd: Fix race editing DE_CFG We have two different functions explaining that DE_CFG is Core-scoped and that writes are racy but happen to be safe. This is only true when there's one of them. Introduce amd_init_de_cfg() to be the singular function which writes to DE_CFG, modelled after the logic we already have for BP_CFG. While reworking amd_check_zenbleed() into a simple predicate used by amd_init_de_cfg(), fix the microcode table. The 'good_rev' was specific to an individual stepping and not valid to be matched by model, let alone a range. The only CPUs incorrectly matched that I can locate appear to be pre-production, and probably didn't get Zenbleed microcode. Rework amd_init_lfence() to be amd_init_lfence_dispatch() with only the purpose of configuring X86_FEATURE_LFENCE_DISPATCH in the case that it needs synthesising. Run it on the BSP only and use setup_force_cpu_cap() to prevent the bit disappearing on a subseuqent CPUID rescan. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich master commit: d0c75dc4c028bc32fd9cf1d4358973929548de54 master date: 2025-12-01 16:20:41 +0000 --- xen/arch/x86/cpu/amd.c | 224 +++++++++++++++++++++++------------------------ xen/arch/x86/cpu/cpu.h | 3 +- xen/arch/x86/cpu/hygon.c | 6 +- 3 files changed, 115 insertions(+), 118 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index 32bb5792ca..ce555ec8cf 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -681,45 +681,6 @@ void cf_check early_init_amd(struct cpuinfo_x86 *c) ctxt_switch_levelling(NULL); } -void amd_init_lfence(struct cpuinfo_x86 *c) -{ - uint64_t value; - - /* - * Some hardware has LFENCE dispatch serialising always enabled, - * nothing to do on that case. - */ - if (test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability)) - return; - - /* - * Attempt to set lfence to be Dispatch Serialising. This MSR almost - * certainly isn't virtualised (and Xen at least will leak the real - * value in but silently discard writes), as well as being per-core - * rather than per-thread, so do a full safe read/write/readback cycle - * in the worst case. - */ - if (rdmsr_safe(MSR_AMD64_DE_CFG, value)) - /* Unable to read. Assume the safer default. */ - __clear_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); - else if (value & AMD64_DE_CFG_LFENCE_SERIALISE) - /* Already dispatch serialising. */ - __set_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); - else if (wrmsr_safe(MSR_AMD64_DE_CFG, - value | AMD64_DE_CFG_LFENCE_SERIALISE) || - rdmsr_safe(MSR_AMD64_DE_CFG, value) || - !(value & AMD64_DE_CFG_LFENCE_SERIALISE)) - /* Attempt to set failed. Assume the safer default. */ - __clear_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); - else - /* Successfully enabled! */ - __set_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); -} - /* * Refer to the AMD Speculative Store Bypass whitepaper: * https://developer.amd.com/wp-content/resources/124441_AMD64_SpeculativeStoreBypassDisable_Whitepaper_final.pdf @@ -913,76 +874,6 @@ void __init detect_zen2_null_seg_behaviour(void) } -static void amd_check_zenbleed(void) -{ - const struct cpu_signature *sig = &this_cpu(cpu_sig); - unsigned int good_rev; - uint64_t val, old_val, chickenbit = (1 << 9); - - /* - * If we're virtualised, we can't do family/model checks safely, and - * we likely wouldn't have access to DE_CFG even if we could see a - * microcode revision. - * - * A hypervisor may hide AVX as a stopgap mitigation. We're not in a - * position to care either way. An admin doesn't want to be disabling - * AVX as a mitigation on any build of Xen with this logic present. - */ - if (cpu_has_hypervisor || boot_cpu_data.x86 != 0x17) - return; - - switch (boot_cpu_data.x86_model) { - case 0x30 ... 0x3f: good_rev = 0x0830107a; break; - case 0x60 ... 0x67: good_rev = 0x0860010b; break; - case 0x68 ... 0x6f: good_rev = 0x08608105; break; - case 0x70 ... 0x7f: good_rev = 0x08701032; break; - case 0xa0 ... 0xaf: good_rev = 0x08a00008; break; - default: - /* - * With the Fam17h check above, most parts getting here are - * Zen1. They're not affected. Assume Zen2 ones making it - * here are affected regardless of microcode version. - */ - if (is_zen1_uarch()) - return; - good_rev = ~0U; - break; - } - - rdmsrl(MSR_AMD64_DE_CFG, val); - old_val = val; - - /* - * Microcode is the preferred mitigation, in terms of performance. - * However, without microcode, this chickenbit (specific to the Zen2 - * uarch) disables Floating Point Mov-Elimination to mitigate the - * issue. - */ - val &= ~chickenbit; - if (sig->rev < good_rev) - val |= chickenbit; - - if (val == old_val) - /* Nothing to change. */ - return; - - /* - * DE_CFG is a Core-scoped MSR, and this write is racy during late - * microcode load. However, both threads calculate the new value from - * state which is shared, and unrelated to the old value, so the - * result should be consistent. - */ - wrmsrl(MSR_AMD64_DE_CFG, val); - - /* - * Inform the admin that we changed something, but don't spam, - * especially during a late microcode load. - */ - if (smp_processor_id() == 0) - printk(XENLOG_INFO "Zenbleed mitigation - using %s\n", - val & chickenbit ? "chickenbit" : "microcode"); -} - static void cf_check fam17_disable_c6(void *arg) { /* Disable C6 by clearing the CCR{0,1,2}_CC6EN bits. */ @@ -1009,6 +900,109 @@ static void cf_check fam17_disable_c6(void *arg) wrmsrl(MSR_AMD_CSTATE_CFG, val & mask); } +static bool zenbleed_use_chickenbit(void) +{ + unsigned int curr_rev; + uint8_t fixed_rev; + + /* Zenbleed only affects Zen2. Nothing to do on non-Fam17h systems. */ + if ( boot_cpu_data.x86 != 0x17 ) + return false; + + curr_rev = this_cpu(cpu_sig).rev; + switch ( curr_rev >> 8 ) + { + case 0x083010: fixed_rev = 0x7a; break; + case 0x086001: fixed_rev = 0x0b; break; + case 0x086081: fixed_rev = 0x05; break; + case 0x087010: fixed_rev = 0x32; break; + case 0x08a000: fixed_rev = 0x08; break; + default: + /* + * With the Fam17h check above, most parts getting here are Zen1. + * They're not affected. Assume Zen2 ones making it here are affected + * regardless of microcode version. + */ + return is_zen2_uarch(); + } + + return (uint8_t)curr_rev >= fixed_rev; +} + +void amd_init_de_cfg(const struct cpuinfo_x86 *c) +{ + uint64_t val, new = 0; + + /* + * The MSR doesn't exist on Fam 0xf/0x11. If virtualised, we won't have + * mutable access even if we can read it. + */ + if ( c->x86 == 0xf || c->x86 == 0x11 || cpu_has_hypervisor ) + return; + + /* + * On Zen3 (Fam 0x19) and later CPUs, LFENCE is unconditionally dispatch + * serialising, and is enumerated in CPUID. + * + * On older systems, LFENCE is unconditionally dispatch serialising (when + * the MSR doesn't exist), or can be made so by setting this bit. + */ + if ( !test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability) ) + new |= AMD64_DE_CFG_LFENCE_SERIALISE; + + /* + * If vulnerable to Zenbleed and not mitigated in microcode, use the + * bigger hammer. + */ + if ( zenbleed_use_chickenbit() ) + new |= (1 << 9); + + /* Avoid reading DE_CFG if we don't intend to change anything. */ + if ( !new ) + return; + + rdmsrl(MSR_AMD64_DE_CFG, val); + + if ( (val & new) == new ) + return; + + /* + * DE_CFG is a Core-scoped MSR, and this write is racy. However, both + * threads calculate the new value from state which expected to be + * consistent across CPUs and unrelated to the old value, so the result + * should be consistent. + */ + wrmsrl(MSR_AMD64_DE_CFG, val | new); +} + +void __init amd_init_lfence_dispatch(void) +{ + struct cpuinfo_x86 *c = &boot_cpu_data; + uint64_t val; + + if ( test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability) ) + /* LFENCE is forced dispatch serialising and we can't control it. */ + return; + + if ( c->x86 == 0xf || c->x86 == 0x11 ) + /* MSR doesn't exist, LFENCE is dispatch serialising. */ + goto set; + + if ( rdmsr_safe(MSR_AMD64_DE_CFG, val) ) + /* Unable to read. Assume the safer default. */ + goto clear; + + if ( val & AMD64_DE_CFG_LFENCE_SERIALISE ) + goto set; + + clear: + setup_clear_cpu_cap(X86_FEATURE_LFENCE_DISPATCH); + return; + + set: + setup_force_cpu_cap(X86_FEATURE_LFENCE_DISPATCH); +} + static void amd_check_bp_cfg(void) { uint64_t val, new = 0; @@ -1053,6 +1047,11 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) unsigned long long value; + amd_init_de_cfg(c); + + if (c == &boot_cpu_data) + amd_init_lfence_dispatch(); /* Needs amd_init_de_cfg() */ + /* Disable TLB flush filter by setting HWCR.FFDIS on K8 * bit 6 of msr C001_0015 * @@ -1091,12 +1090,6 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) if (c == &boot_cpu_data && !cpu_has(c, X86_FEATURE_RSTR_FP_ERR_PTRS)) setup_force_cpu_cap(X86_BUG_FPU_PTRS); - if (c->x86 == 0x0f || c->x86 == 0x11) - /* Always dispatch serialising on this hardare. */ - __set_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability); - else /* Implicily "== 0x10 || >= 0x12" by being 64bit. */ - amd_init_lfence(c); - amd_init_ssbd(c); if (c->x86 == 0x17) @@ -1313,7 +1306,6 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) if ((smp_processor_id() == 1) && !cpu_has(c, X86_FEATURE_ITSC)) disable_c1_ramping(); - amd_check_zenbleed(); amd_check_bp_cfg(); if (fam17_c6_disabled) diff --git a/xen/arch/x86/cpu/cpu.h b/xen/arch/x86/cpu/cpu.h index 8be65e975a..129be9bfa3 100644 --- a/xen/arch/x86/cpu/cpu.h +++ b/xen/arch/x86/cpu/cpu.h @@ -20,7 +20,8 @@ extern bool detect_extended_topology(struct cpuinfo_x86 *c); void cf_check early_init_amd(struct cpuinfo_x86 *c); void amd_log_freq(const struct cpuinfo_x86 *c); -void amd_init_lfence(struct cpuinfo_x86 *c); +void amd_init_de_cfg(const struct cpuinfo_x86 *c); +void amd_init_lfence_dispatch(void); void amd_init_ssbd(const struct cpuinfo_x86 *c); void amd_init_spectral_chicken(void); void detect_zen2_null_seg_behaviour(void); diff --git a/xen/arch/x86/cpu/hygon.c b/xen/arch/x86/cpu/hygon.c index f7508cc8fc..c3faabbdb7 100644 --- a/xen/arch/x86/cpu/hygon.c +++ b/xen/arch/x86/cpu/hygon.c @@ -31,7 +31,11 @@ static void cf_check init_hygon(struct cpuinfo_x86 *c) { unsigned long long value; - amd_init_lfence(c); + amd_init_de_cfg(c); + + if (c == &boot_cpu_data) + amd_init_lfence_dispatch(); /* Needs amd_init_de_cfg() */ + amd_init_ssbd(c); /* Probe for NSCB on Zen2 CPUs when not virtualised */ -- generated by git-patchbot for /home/xen/git/xen.git#staging-4.20 From xen-changelog-bounces@lists.xenproject.org Wed Dec 03 10:56:25 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 03 Dec 2025 10:56:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1176674.1501133 (Exim 4.92) (envelope-from ) id 1vQkX3-0007Xl-8O; Wed, 03 Dec 2025 10:56:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1176674.1501133; Wed, 03 Dec 2025 10:56:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQkX3-0007Xd-5i; Wed, 03 Dec 2025 10:56:25 +0000 Received: by outflank-mailman (input) for mailman id 1176674; Wed, 03 Dec 2025 10:56:24 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQkX2-0007XX-Hq for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:56:24 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQkX2-004niZ-1h for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:56:24 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQkX2-00C6GM-1c for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:56:24 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=6xzYsqtzdUDGv6XhM0/v24sr4+F6JhmuTUTqTqQVvbI=; b=Ef4ymFtT55EHiRhdyQBp1bQ2jl n0ijo0QWzhK5MpogEf4Zu+ZuMGvXZAlawMo53dF2lvX9nGtRwDO1cQi83D4sYY2ab7USr4dt5MtIF liE+LJzNPy1GwbjXcSyBqkUrqRmEeSL5kj6282R7k83GIdAwTI6IsJz2Y6UuvPEdyKtU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging-4.19] x86/msix: fix incorrect refcount decrease in msixtlb Message-Id: Date: Wed, 03 Dec 2025 10:56:24 +0000 commit 3d932ff9700d0d50458db263982661f07b22e25c Author: Roger Pau Monné AuthorDate: Wed Dec 3 11:45:12 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 3 11:45:12 2025 +0100 x86/msix: fix incorrect refcount decrease in msixtlb The usage of atomic_dec_and_test() in msixtbl_pt_unregister() is inverted: the function will return true when the refcount reaches 0. The current code does the opposite and calls del_msixtbl_entry() when there are still refcounts held on the object. However all callers of msixtbl_pt_unregister() are serialized on the domctl lock, and hence there cannot be parallel calls to msixtbl_pt_unregister() that could lead to double freeing of the same object. The incorrect freeing with active msixtlb entries will result in a possible guest visible malfunction, but no internal Xen state corruption. While entries are leaked once the last pIRQ is unbound, the same entry would get re-used if the device has pIRQs bound again. The guest cannot exploit this incorrect refcount check to leak arbitrary amounts of memory by repeatedly enabling and disabling (binding and unbinding) MSI-X entries. Fixes: 34097f0d3080 ('hvm: passthrough MSI-X mask bit acceleration') Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich master commit: ea87662c7781c5abeddcd62923eb405d10522ae9 master date: 2025-11-26 09:46:17 +0100 --- xen/arch/x86/hvm/vmsi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c index fd83abb929..e175b5eaa2 100644 --- a/xen/arch/x86/hvm/vmsi.c +++ b/xen/arch/x86/hvm/vmsi.c @@ -758,7 +758,7 @@ out: return; found: - if ( !atomic_dec_and_test(&entry->refcnt) ) + if ( atomic_dec_and_test(&entry->refcnt) ) del_msixtbl_entry(entry); spin_unlock_irq(&irqd->lock); -- generated by git-patchbot for /home/xen/git/xen.git#staging-4.19 From xen-changelog-bounces@lists.xenproject.org Wed Dec 03 10:56:35 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 03 Dec 2025 10:56:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1176675.1501138 (Exim 4.92) (envelope-from ) id 1vQkXD-0007Zz-9y; Wed, 03 Dec 2025 10:56:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1176675.1501138; Wed, 03 Dec 2025 10:56:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQkXD-0007Zr-7A; Wed, 03 Dec 2025 10:56:35 +0000 Received: by outflank-mailman (input) for mailman id 1176675; Wed, 03 Dec 2025 10:56:34 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQkXC-0007Zj-Kt for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:56:34 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQkXC-004nih-20 for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:56:34 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQkXC-00C7aZ-1t for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:56:34 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ElHhBhlLjKYyyx/WAyXowQoI5wYdMu1sIoujtmHBsWo=; b=4puQ03zM0Kjn1h1v6coVAo50n4 O/asFudn1mVWrofcBFMpWKgaFY/CVTfq9JAhabk35ODZ2GKxi89g4N/K5R0zibAPBYPpDa/zPbDpx RM6LoFs6kvRVPQtpxNczmhB9UI9G1Om9isyxqq+n8gcgWQmch0KCAitRd7wYXZYzziVA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging-4.19] x86/vhpet: Fix sanitization of legacy IRQ route Message-Id: Date: Wed, 03 Dec 2025 10:56:34 +0000 commit 2271f256275304018d7df67c334f6eb06522c3d8 Author: Tu Dinh AuthorDate: Wed Dec 3 11:45:29 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 3 11:45:29 2025 +0100 x86/vhpet: Fix sanitization of legacy IRQ route When setting a timer's config register, timer_sanitize_int_route will always reset the IRQ route value to what's valid corresponding to the !HPET_CFG_LEGACY case. This is applied even if the HPET is set to HPET_CFG_LEGACY. When some operating systems (e.g. Windows) try to write to a timer config, they will verify and rewrite the register if the values don't match what they expect. This causes an unnecessary write to HPET_Tn_CFG. Note, the HPET specification states that for the Tn_INT_ROUTE_CNF field: "If the value is not supported by this prarticular timer, then the value read back will not match what is written. [...] If the LegacyReplacement Route bit is set, then Timers 0 and 1 will have a different routing, and this bit field has no effect for those two timers." Therefore, Xen should not reset timer_int_route if legacy mode is enabled, regardless of what's in there. Fixes: ec40d3fe2147 ("x86/vhpet: check that the set interrupt route is valid") Signed-off-by: Tu Dinh Reviewed-by: Jan Beulich master commit: fb0e37df71a31318c61e0715ffed3e149ca8a4aa master date: 2025-11-26 12:10:21 +0100 --- xen/arch/x86/hvm/hpet.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/hvm/hpet.c b/xen/arch/x86/hvm/hpet.c index f0e5f877f4..e317ec1f5f 100644 --- a/xen/arch/x86/hvm/hpet.c +++ b/xen/arch/x86/hvm/hpet.c @@ -48,6 +48,8 @@ #define timer_is_32bit(h, n) (timer_config(h, n) & HPET_TN_32BIT) #define hpet_enabled(h) ((h)->hpet.config & HPET_CFG_ENABLE) #define timer_level(h, n) (timer_config(h, n) & HPET_TN_LEVEL) +#define timer_is_legacy(h, n) \ + (((n) <= 1) && ((h)->hpet.config & HPET_CFG_LEGACY)) #define timer_int_route(h, n) MASK_EXTR(timer_config(h, n), HPET_TN_ROUTE) @@ -55,7 +57,8 @@ MASK_EXTR(timer_config(h, n), HPET_TN_INT_ROUTE_CAP) #define timer_int_route_valid(h, n) \ - ((1u << timer_int_route(h, n)) & timer_int_route_cap(h, n)) + (timer_is_legacy(h, n) || \ + ((1u << timer_int_route(h, n)) & timer_int_route_cap(h, n))) static inline uint64_t hpet_read_maincounter(HPETState *h, uint64_t guest_time) { @@ -275,7 +278,7 @@ static void hpet_set_timer(HPETState *h, unsigned int tn, ? (uint32_t)diff : 0; destroy_periodic_time(&h->pt[tn]); - if ( (tn <= 1) && (h->hpet.config & HPET_CFG_LEGACY) ) + if ( timer_is_legacy(h, tn) ) { /* if LegacyReplacementRoute bit is set, HPET specification requires timer0 be routed to IRQ0 in NON-APIC or IRQ2 in the I/O APIC, @@ -379,6 +382,14 @@ static int cf_check hpet_write( h->hpet.config = hpet_fixup_reg(new_val, old_val, HPET_CFG_ENABLE | HPET_CFG_LEGACY); + /* + * The first 2 channels' interrupt route values only matter when + * HPET_CFG_LEGACY is disabled. However, for simplicity's sake, always + * resanitize all channels anyway. + */ + for ( i = 0; i < HPET_TIMER_NUM; i++ ) + timer_sanitize_int_route(h, i); + if ( !(old_val & HPET_CFG_ENABLE) && (new_val & HPET_CFG_ENABLE) ) { /* Enable main counter and interrupt generation. */ -- generated by git-patchbot for /home/xen/git/xen.git#staging-4.19 From xen-changelog-bounces@lists.xenproject.org Wed Dec 03 10:56:45 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 03 Dec 2025 10:56:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1176676.1501142 (Exim 4.92) (envelope-from ) id 1vQkXN-0007c2-B4; Wed, 03 Dec 2025 10:56:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1176676.1501142; Wed, 03 Dec 2025 10:56:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQkXN-0007bu-8Y; Wed, 03 Dec 2025 10:56:45 +0000 Received: by outflank-mailman (input) for mailman id 1176676; Wed, 03 Dec 2025 10:56:44 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQkXM-0007bm-Rs for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:56:44 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQkXM-004nit-2h for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:56:44 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQkXM-00C99Q-2W for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:56:44 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=3/8mFflG6O4u3O2BqBS+frvyh73zYSErx5l3+S3Ueww=; b=jMoBp+khD7aPbroaasgSqAqyiQ cNryDBWnrDDr4Ut+TI9QInMg+APgmXvEtvfULSj9sXuQQuDnvhgDQpNz03FbStwYIfZGPL8i2CrmS koEJIilKlJxobiNCDvzFGSkV4HFScF9UnyyTjX8fHsk9qLYTddIW8nYh8rivbrx48BgA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging-4.19] x86/amd: Stop updating the Zenbleed mitigation dynamically Message-Id: Date: Wed, 03 Dec 2025 10:56:44 +0000 commit 726ce26760decd316ce6b05eac0ed815250e2e70 Author: Andrew Cooper AuthorDate: Wed Dec 3 11:46:04 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 3 11:46:04 2025 +0100 x86/amd: Stop updating the Zenbleed mitigation dynamically This was potentially helpful when the chickenbit was the only mitigation and microcode had not been released, but that was two years ago. Zenbleed microcode has been avaialble since December 2023, and the subsequent Entrysign signature vulnerability means that firmware updates block OS-loading and more OS-loadable microcode will be produced for Zen2. i.e. the Zenbleed fix is not going to appear at runtime these days. No practical change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich master commit: 5cd1ac15756ed7d9175685a3d16fc23fc86b3db4 master date: 2025-11-27 18:22:20 +0000 --- xen/arch/x86/cpu/amd.c | 2 +- xen/arch/x86/cpu/microcode/amd.c | 2 -- xen/arch/x86/include/asm/processor.h | 2 -- 3 files changed, 1 insertion(+), 5 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index c448997be5..748c7f942c 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -913,7 +913,7 @@ void __init detect_zen2_null_seg_behaviour(void) } -void amd_check_zenbleed(void) +static void amd_check_zenbleed(void) { const struct cpu_signature *sig = &this_cpu(cpu_sig); unsigned int good_rev; diff --git a/xen/arch/x86/cpu/microcode/amd.c b/xen/arch/x86/cpu/microcode/amd.c index 3fc49dc9c6..e1b931fb51 100644 --- a/xen/arch/x86/cpu/microcode/amd.c +++ b/xen/arch/x86/cpu/microcode/amd.c @@ -376,8 +376,6 @@ static int cf_check apply_microcode(const struct microcode_patch *patch) "microcode: CPU%u updated from revision %#x to %#x, date = %04x-%02x-%02x\n", cpu, old_rev, rev, patch->year, patch->month, patch->day); - amd_check_zenbleed(); - return 0; } diff --git a/xen/arch/x86/include/asm/processor.h b/xen/arch/x86/include/asm/processor.h index c02566a915..26da7f8974 100644 --- a/xen/arch/x86/include/asm/processor.h +++ b/xen/arch/x86/include/asm/processor.h @@ -502,8 +502,6 @@ enum ap_boot_method { }; extern enum ap_boot_method ap_boot_method; -void amd_check_zenbleed(void); - #endif /* !__ASSEMBLY__ */ #endif /* __ASM_X86_PROCESSOR_H */ -- generated by git-patchbot for /home/xen/git/xen.git#staging-4.19 From xen-changelog-bounces@lists.xenproject.org Wed Dec 03 10:56:56 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 03 Dec 2025 10:56:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1176678.1501145 (Exim 4.92) (envelope-from ) id 1vQkXY-0007er-Dp; Wed, 03 Dec 2025 10:56:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1176678.1501145; Wed, 03 Dec 2025 10:56:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQkXY-0007ej-BK; Wed, 03 Dec 2025 10:56:56 +0000 Received: by outflank-mailman (input) for mailman id 1176678; Wed, 03 Dec 2025 10:56:55 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQkXX-0007eY-0e for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:56:55 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQkXW-004nix-3C for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:56:54 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQkXW-00CAdb-33 for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 10:56:54 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=5xQWgd1pWGKRT+9lM4Sf6PfItYakHG1IImMmIhggD9M=; b=rFtZUNTyaMvL1c9M2lV1xuZBZU b1Lur+UNvWuMIA0MFsglAjOYv3LSCL9QKP6CoF6cxjBf5CNN7V8Mlz4xfEqyxnwUSZZKyzHzcyKSO JZb/9PyJUcIvuYJL64fK/Ut+Vk9fRt46UBQmtoj2pxwsjEMjhA1Cb92Mwe2JzIQ82n3c=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging-4.19] x86/amd: Fix race editing DE_CFG Message-Id: Date: Wed, 03 Dec 2025 10:56:54 +0000 commit 71fd2175da7c0f8ce0edc0446915c3ff5fb31c94 Author: Andrew Cooper AuthorDate: Wed Dec 3 11:46:24 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 3 11:46:24 2025 +0100 x86/amd: Fix race editing DE_CFG We have two different functions explaining that DE_CFG is Core-scoped and that writes are racy but happen to be safe. This is only true when there's one of them. Introduce amd_init_de_cfg() to be the singular function which writes to DE_CFG, modelled after the logic we already have for BP_CFG. While reworking amd_check_zenbleed() into a simple predicate used by amd_init_de_cfg(), fix the microcode table. The 'good_rev' was specific to an individual stepping and not valid to be matched by model, let alone a range. The only CPUs incorrectly matched that I can locate appear to be pre-production, and probably didn't get Zenbleed microcode. Rework amd_init_lfence() to be amd_init_lfence_dispatch() with only the purpose of configuring X86_FEATURE_LFENCE_DISPATCH in the case that it needs synthesising. Run it on the BSP only and use setup_force_cpu_cap() to prevent the bit disappearing on a subseuqent CPUID rescan. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich master commit: d0c75dc4c028bc32fd9cf1d4358973929548de54 master date: 2025-12-01 16:20:41 +0000 --- xen/arch/x86/cpu/amd.c | 224 +++++++++++++++++++++++------------------------ xen/arch/x86/cpu/cpu.h | 3 +- xen/arch/x86/cpu/hygon.c | 6 +- 3 files changed, 115 insertions(+), 118 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index 748c7f942c..84fac6ade2 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -681,45 +681,6 @@ void cf_check early_init_amd(struct cpuinfo_x86 *c) ctxt_switch_levelling(NULL); } -void amd_init_lfence(struct cpuinfo_x86 *c) -{ - uint64_t value; - - /* - * Some hardware has LFENCE dispatch serialising always enabled, - * nothing to do on that case. - */ - if (test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability)) - return; - - /* - * Attempt to set lfence to be Dispatch Serialising. This MSR almost - * certainly isn't virtualised (and Xen at least will leak the real - * value in but silently discard writes), as well as being per-core - * rather than per-thread, so do a full safe read/write/readback cycle - * in the worst case. - */ - if (rdmsr_safe(MSR_AMD64_DE_CFG, value)) - /* Unable to read. Assume the safer default. */ - __clear_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); - else if (value & AMD64_DE_CFG_LFENCE_SERIALISE) - /* Already dispatch serialising. */ - __set_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); - else if (wrmsr_safe(MSR_AMD64_DE_CFG, - value | AMD64_DE_CFG_LFENCE_SERIALISE) || - rdmsr_safe(MSR_AMD64_DE_CFG, value) || - !(value & AMD64_DE_CFG_LFENCE_SERIALISE)) - /* Attempt to set failed. Assume the safer default. */ - __clear_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); - else - /* Successfully enabled! */ - __set_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); -} - /* * Refer to the AMD Speculative Store Bypass whitepaper: * https://developer.amd.com/wp-content/resources/124441_AMD64_SpeculativeStoreBypassDisable_Whitepaper_final.pdf @@ -913,76 +874,6 @@ void __init detect_zen2_null_seg_behaviour(void) } -static void amd_check_zenbleed(void) -{ - const struct cpu_signature *sig = &this_cpu(cpu_sig); - unsigned int good_rev; - uint64_t val, old_val, chickenbit = (1 << 9); - - /* - * If we're virtualised, we can't do family/model checks safely, and - * we likely wouldn't have access to DE_CFG even if we could see a - * microcode revision. - * - * A hypervisor may hide AVX as a stopgap mitigation. We're not in a - * position to care either way. An admin doesn't want to be disabling - * AVX as a mitigation on any build of Xen with this logic present. - */ - if (cpu_has_hypervisor || boot_cpu_data.x86 != 0x17) - return; - - switch (boot_cpu_data.x86_model) { - case 0x30 ... 0x3f: good_rev = 0x0830107a; break; - case 0x60 ... 0x67: good_rev = 0x0860010b; break; - case 0x68 ... 0x6f: good_rev = 0x08608105; break; - case 0x70 ... 0x7f: good_rev = 0x08701032; break; - case 0xa0 ... 0xaf: good_rev = 0x08a00008; break; - default: - /* - * With the Fam17h check above, most parts getting here are - * Zen1. They're not affected. Assume Zen2 ones making it - * here are affected regardless of microcode version. - */ - if (is_zen1_uarch()) - return; - good_rev = ~0U; - break; - } - - rdmsrl(MSR_AMD64_DE_CFG, val); - old_val = val; - - /* - * Microcode is the preferred mitigation, in terms of performance. - * However, without microcode, this chickenbit (specific to the Zen2 - * uarch) disables Floating Point Mov-Elimination to mitigate the - * issue. - */ - val &= ~chickenbit; - if (sig->rev < good_rev) - val |= chickenbit; - - if (val == old_val) - /* Nothing to change. */ - return; - - /* - * DE_CFG is a Core-scoped MSR, and this write is racy during late - * microcode load. However, both threads calculate the new value from - * state which is shared, and unrelated to the old value, so the - * result should be consistent. - */ - wrmsrl(MSR_AMD64_DE_CFG, val); - - /* - * Inform the admin that we changed something, but don't spam, - * especially during a late microcode load. - */ - if (smp_processor_id() == 0) - printk(XENLOG_INFO "Zenbleed mitigation - using %s\n", - val & chickenbit ? "chickenbit" : "microcode"); -} - static void cf_check fam17_disable_c6(void *arg) { /* Disable C6 by clearing the CCR{0,1,2}_CC6EN bits. */ @@ -1009,6 +900,109 @@ static void cf_check fam17_disable_c6(void *arg) wrmsrl(MSR_AMD_CSTATE_CFG, val & mask); } +static bool zenbleed_use_chickenbit(void) +{ + unsigned int curr_rev; + uint8_t fixed_rev; + + /* Zenbleed only affects Zen2. Nothing to do on non-Fam17h systems. */ + if ( boot_cpu_data.x86 != 0x17 ) + return false; + + curr_rev = this_cpu(cpu_sig).rev; + switch ( curr_rev >> 8 ) + { + case 0x083010: fixed_rev = 0x7a; break; + case 0x086001: fixed_rev = 0x0b; break; + case 0x086081: fixed_rev = 0x05; break; + case 0x087010: fixed_rev = 0x32; break; + case 0x08a000: fixed_rev = 0x08; break; + default: + /* + * With the Fam17h check above, most parts getting here are Zen1. + * They're not affected. Assume Zen2 ones making it here are affected + * regardless of microcode version. + */ + return is_zen2_uarch(); + } + + return (uint8_t)curr_rev >= fixed_rev; +} + +void amd_init_de_cfg(const struct cpuinfo_x86 *c) +{ + uint64_t val, new = 0; + + /* + * The MSR doesn't exist on Fam 0xf/0x11. If virtualised, we won't have + * mutable access even if we can read it. + */ + if ( c->x86 == 0xf || c->x86 == 0x11 || cpu_has_hypervisor ) + return; + + /* + * On Zen3 (Fam 0x19) and later CPUs, LFENCE is unconditionally dispatch + * serialising, and is enumerated in CPUID. + * + * On older systems, LFENCE is unconditionally dispatch serialising (when + * the MSR doesn't exist), or can be made so by setting this bit. + */ + if ( !test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability) ) + new |= AMD64_DE_CFG_LFENCE_SERIALISE; + + /* + * If vulnerable to Zenbleed and not mitigated in microcode, use the + * bigger hammer. + */ + if ( zenbleed_use_chickenbit() ) + new |= (1 << 9); + + /* Avoid reading DE_CFG if we don't intend to change anything. */ + if ( !new ) + return; + + rdmsrl(MSR_AMD64_DE_CFG, val); + + if ( (val & new) == new ) + return; + + /* + * DE_CFG is a Core-scoped MSR, and this write is racy. However, both + * threads calculate the new value from state which expected to be + * consistent across CPUs and unrelated to the old value, so the result + * should be consistent. + */ + wrmsrl(MSR_AMD64_DE_CFG, val | new); +} + +void __init amd_init_lfence_dispatch(void) +{ + struct cpuinfo_x86 *c = &boot_cpu_data; + uint64_t val; + + if ( test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability) ) + /* LFENCE is forced dispatch serialising and we can't control it. */ + return; + + if ( c->x86 == 0xf || c->x86 == 0x11 ) + /* MSR doesn't exist, LFENCE is dispatch serialising. */ + goto set; + + if ( rdmsr_safe(MSR_AMD64_DE_CFG, val) ) + /* Unable to read. Assume the safer default. */ + goto clear; + + if ( val & AMD64_DE_CFG_LFENCE_SERIALISE ) + goto set; + + clear: + setup_clear_cpu_cap(X86_FEATURE_LFENCE_DISPATCH); + return; + + set: + setup_force_cpu_cap(X86_FEATURE_LFENCE_DISPATCH); +} + static void amd_check_bp_cfg(void) { uint64_t val, new = 0; @@ -1053,6 +1047,11 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) unsigned long long value; + amd_init_de_cfg(c); + + if (c == &boot_cpu_data) + amd_init_lfence_dispatch(); /* Needs amd_init_de_cfg() */ + /* Disable TLB flush filter by setting HWCR.FFDIS on K8 * bit 6 of msr C001_0015 * @@ -1091,12 +1090,6 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) if (c == &boot_cpu_data && !cpu_has(c, X86_FEATURE_RSTR_FP_ERR_PTRS)) setup_force_cpu_cap(X86_BUG_FPU_PTRS); - if (c->x86 == 0x0f || c->x86 == 0x11) - /* Always dispatch serialising on this hardare. */ - __set_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability); - else /* Implicily "== 0x10 || >= 0x12" by being 64bit. */ - amd_init_lfence(c); - amd_init_ssbd(c); if (c->x86 == 0x17) @@ -1313,7 +1306,6 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) if ((smp_processor_id() == 1) && !cpu_has(c, X86_FEATURE_ITSC)) disable_c1_ramping(); - amd_check_zenbleed(); amd_check_bp_cfg(); if (fam17_c6_disabled) diff --git a/xen/arch/x86/cpu/cpu.h b/xen/arch/x86/cpu/cpu.h index 8be65e975a..129be9bfa3 100644 --- a/xen/arch/x86/cpu/cpu.h +++ b/xen/arch/x86/cpu/cpu.h @@ -20,7 +20,8 @@ extern bool detect_extended_topology(struct cpuinfo_x86 *c); void cf_check early_init_amd(struct cpuinfo_x86 *c); void amd_log_freq(const struct cpuinfo_x86 *c); -void amd_init_lfence(struct cpuinfo_x86 *c); +void amd_init_de_cfg(const struct cpuinfo_x86 *c); +void amd_init_lfence_dispatch(void); void amd_init_ssbd(const struct cpuinfo_x86 *c); void amd_init_spectral_chicken(void); void detect_zen2_null_seg_behaviour(void); diff --git a/xen/arch/x86/cpu/hygon.c b/xen/arch/x86/cpu/hygon.c index f7508cc8fc..c3faabbdb7 100644 --- a/xen/arch/x86/cpu/hygon.c +++ b/xen/arch/x86/cpu/hygon.c @@ -31,7 +31,11 @@ static void cf_check init_hygon(struct cpuinfo_x86 *c) { unsigned long long value; - amd_init_lfence(c); + amd_init_de_cfg(c); + + if (c == &boot_cpu_data) + amd_init_lfence_dispatch(); /* Needs amd_init_de_cfg() */ + amd_init_ssbd(c); /* Probe for NSCB on Zen2 CPUs when not virtualised */ -- generated by git-patchbot for /home/xen/git/xen.git#staging-4.19 From xen-changelog-bounces@lists.xenproject.org Wed Dec 03 13:00:08 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 03 Dec 2025 13:00:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1176738.1501189 (Exim 4.92) (envelope-from ) id 1vQmSj-00080w-53; Wed, 03 Dec 2025 13:00:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1176738.1501189; Wed, 03 Dec 2025 13:00:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQmSj-00080Y-2N; Wed, 03 Dec 2025 13:00:05 +0000 Received: by outflank-mailman (input) for mailman id 1176738; Wed, 03 Dec 2025 13:00:04 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQmSi-0007Zo-52 for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 13:00:04 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQmSh-004qEo-05 for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 13:00:03 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQmSg-005uOQ-2k for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 13:00:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=1jDELiXshUNdn9jgBcUujaE4TLi3ZcbYFEY+4D/qzCo=; b=LvmHp1ozOT5w3PZknNmEtg7O/F 8r18VlRnondkv0+Jnc0dgcr6Wv5hwqkueblgWdMm9hCTo8rPG+8k66Hj3eI8WAKVEsrqulsdCcHTi oTsJRH4XW4E3PaxaDdHHesLUqJ9w0FCa1uGThUcD1KNUJDCnfZvshm+bWV+XZlX0uOOc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.21] x86/msix: fix incorrect refcount decrease in msixtlb Message-Id: Date: Wed, 03 Dec 2025 13:00:02 +0000 commit 747d10b76fef2b2d4e307df396c8e66ec42fcbd7 Author: Roger Pau Monné AuthorDate: Wed Dec 3 11:40:36 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 3 11:40:36 2025 +0100 x86/msix: fix incorrect refcount decrease in msixtlb The usage of atomic_dec_and_test() in msixtbl_pt_unregister() is inverted: the function will return true when the refcount reaches 0. The current code does the opposite and calls del_msixtbl_entry() when there are still refcounts held on the object. However all callers of msixtbl_pt_unregister() are serialized on the domctl lock, and hence there cannot be parallel calls to msixtbl_pt_unregister() that could lead to double freeing of the same object. The incorrect freeing with active msixtlb entries will result in a possible guest visible malfunction, but no internal Xen state corruption. While entries are leaked once the last pIRQ is unbound, the same entry would get re-used if the device has pIRQs bound again. The guest cannot exploit this incorrect refcount check to leak arbitrary amounts of memory by repeatedly enabling and disabling (binding and unbinding) MSI-X entries. Fixes: 34097f0d3080 ('hvm: passthrough MSI-X mask bit acceleration') Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich master commit: ea87662c7781c5abeddcd62923eb405d10522ae9 master date: 2025-11-26 09:46:17 +0100 --- xen/arch/x86/hvm/vmsi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c index 32e417bc15..27b1f089e2 100644 --- a/xen/arch/x86/hvm/vmsi.c +++ b/xen/arch/x86/hvm/vmsi.c @@ -716,7 +716,7 @@ out: return; found: - if ( !atomic_dec_and_test(&entry->refcnt) ) + if ( atomic_dec_and_test(&entry->refcnt) ) del_msixtbl_entry(entry); spin_unlock_irq(&irqd->lock); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.21 From xen-changelog-bounces@lists.xenproject.org Wed Dec 03 13:00:14 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 03 Dec 2025 13:00:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1176739.1501194 (Exim 4.92) (envelope-from ) id 1vQmSs-00088d-6c; Wed, 03 Dec 2025 13:00:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1176739.1501194; Wed, 03 Dec 2025 13:00:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQmSs-00088W-3d; Wed, 03 Dec 2025 13:00:14 +0000 Received: by outflank-mailman (input) for mailman id 1176739; Wed, 03 Dec 2025 13:00:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQmSr-00088M-HI for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 13:00:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQmSr-004qEs-1d for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 13:00:13 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQmSr-005vNC-19 for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 13:00:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=/Psh7peaIGlGWOmF3/tRFTzzupMFz3uta8bGu3khT/4=; b=Zc2bzV7VpxQ/Fr7IrzlY8O3qWd q6VZUd+kUi+/ZgWXU+jUTbBDlnJnkEGm195vy4T8mODBkZ33zqedBcQzCrmy/qIpn2gIN3iI4plpM JVdJ43lNzDqKCiMHy2VsWlJ8OSFoC2TaMyQ5Cqmg+ngwLc9hoHHDY5qeOAJJ4xLVA4gQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.21] x86/vhpet: Fix sanitization of legacy IRQ route Message-Id: Date: Wed, 03 Dec 2025 13:00:13 +0000 commit ba9142efd703e7d8c0b2e6457fcdbd5da935cb08 Author: Tu Dinh AuthorDate: Wed Dec 3 11:40:56 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 3 11:40:56 2025 +0100 x86/vhpet: Fix sanitization of legacy IRQ route When setting a timer's config register, timer_sanitize_int_route will always reset the IRQ route value to what's valid corresponding to the !HPET_CFG_LEGACY case. This is applied even if the HPET is set to HPET_CFG_LEGACY. When some operating systems (e.g. Windows) try to write to a timer config, they will verify and rewrite the register if the values don't match what they expect. This causes an unnecessary write to HPET_Tn_CFG. Note, the HPET specification states that for the Tn_INT_ROUTE_CNF field: "If the value is not supported by this prarticular timer, then the value read back will not match what is written. [...] If the LegacyReplacement Route bit is set, then Timers 0 and 1 will have a different routing, and this bit field has no effect for those two timers." Therefore, Xen should not reset timer_int_route if legacy mode is enabled, regardless of what's in there. Fixes: ec40d3fe2147 ("x86/vhpet: check that the set interrupt route is valid") Signed-off-by: Tu Dinh Reviewed-by: Jan Beulich master commit: fb0e37df71a31318c61e0715ffed3e149ca8a4aa master date: 2025-11-26 12:10:21 +0100 --- xen/arch/x86/hvm/hpet.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/hvm/hpet.c b/xen/arch/x86/hvm/hpet.c index f0e5f877f4..e317ec1f5f 100644 --- a/xen/arch/x86/hvm/hpet.c +++ b/xen/arch/x86/hvm/hpet.c @@ -48,6 +48,8 @@ #define timer_is_32bit(h, n) (timer_config(h, n) & HPET_TN_32BIT) #define hpet_enabled(h) ((h)->hpet.config & HPET_CFG_ENABLE) #define timer_level(h, n) (timer_config(h, n) & HPET_TN_LEVEL) +#define timer_is_legacy(h, n) \ + (((n) <= 1) && ((h)->hpet.config & HPET_CFG_LEGACY)) #define timer_int_route(h, n) MASK_EXTR(timer_config(h, n), HPET_TN_ROUTE) @@ -55,7 +57,8 @@ MASK_EXTR(timer_config(h, n), HPET_TN_INT_ROUTE_CAP) #define timer_int_route_valid(h, n) \ - ((1u << timer_int_route(h, n)) & timer_int_route_cap(h, n)) + (timer_is_legacy(h, n) || \ + ((1u << timer_int_route(h, n)) & timer_int_route_cap(h, n))) static inline uint64_t hpet_read_maincounter(HPETState *h, uint64_t guest_time) { @@ -275,7 +278,7 @@ static void hpet_set_timer(HPETState *h, unsigned int tn, ? (uint32_t)diff : 0; destroy_periodic_time(&h->pt[tn]); - if ( (tn <= 1) && (h->hpet.config & HPET_CFG_LEGACY) ) + if ( timer_is_legacy(h, tn) ) { /* if LegacyReplacementRoute bit is set, HPET specification requires timer0 be routed to IRQ0 in NON-APIC or IRQ2 in the I/O APIC, @@ -379,6 +382,14 @@ static int cf_check hpet_write( h->hpet.config = hpet_fixup_reg(new_val, old_val, HPET_CFG_ENABLE | HPET_CFG_LEGACY); + /* + * The first 2 channels' interrupt route values only matter when + * HPET_CFG_LEGACY is disabled. However, for simplicity's sake, always + * resanitize all channels anyway. + */ + for ( i = 0; i < HPET_TIMER_NUM; i++ ) + timer_sanitize_int_route(h, i); + if ( !(old_val & HPET_CFG_ENABLE) && (new_val & HPET_CFG_ENABLE) ) { /* Enable main counter and interrupt generation. */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.21 From xen-changelog-bounces@lists.xenproject.org Wed Dec 03 13:00:25 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 03 Dec 2025 13:00:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1176740.1501197 (Exim 4.92) (envelope-from ) id 1vQmT3-0008Cv-7l; Wed, 03 Dec 2025 13:00:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1176740.1501197; Wed, 03 Dec 2025 13:00:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQmT3-0008Cn-5F; Wed, 03 Dec 2025 13:00:25 +0000 Received: by outflank-mailman (input) for mailman id 1176740; Wed, 03 Dec 2025 13:00:24 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQmT2-0008Ch-17 for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 13:00:24 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQmT2-004qF2-00 for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 13:00:24 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQmT1-005wPI-2j for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 13:00:23 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=5e9N4uYe4SzkKMd7SMRk3lGJdgR8/72kDktUAXSsF0c=; b=qrGp5hd0D/gLeX+iR/b8UxOBsY 9/8s4p+vSXSZtVz01gpncWp6eKF3Q/7p6GAVzhZHIAlyek1SEkCclwsnXXSoQGRZx4+4UixsBQdtg 1wAs/EQ2F2o1TtpIsf3pgkr3GazCkIxcqEEZeIgbrsG5LjUmEZXkTGjWCv2bfCo1ncMA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.21] x86/amd: Stop updating the Zenbleed mitigation dynamically Message-Id: Date: Wed, 03 Dec 2025 13:00:23 +0000 commit 81e71ef34f157e78afa40c39d07282429b9e1dda Author: Andrew Cooper AuthorDate: Wed Dec 3 11:41:24 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 3 11:41:24 2025 +0100 x86/amd: Stop updating the Zenbleed mitigation dynamically This was potentially helpful when the chickenbit was the only mitigation and microcode had not been released, but that was two years ago. Zenbleed microcode has been avaialble since December 2023, and the subsequent Entrysign signature vulnerability means that firmware updates block OS-loading and more OS-loadable microcode will be produced for Zen2. i.e. the Zenbleed fix is not going to appear at runtime these days. No practical change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich master commit: 5cd1ac15756ed7d9175685a3d16fc23fc86b3db4 master date: 2025-11-27 18:22:20 +0000 --- xen/arch/x86/cpu/amd.c | 2 +- xen/arch/x86/cpu/microcode/amd.c | 2 -- xen/arch/x86/include/asm/processor.h | 2 -- 3 files changed, 1 insertion(+), 5 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index 9767f63539..789500d7ab 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -979,7 +979,7 @@ void __init detect_zen2_null_seg_behaviour(void) } -void amd_check_zenbleed(void) +static void amd_check_zenbleed(void) { const struct cpu_signature *sig = &this_cpu(cpu_sig); unsigned int good_rev; diff --git a/xen/arch/x86/cpu/microcode/amd.c b/xen/arch/x86/cpu/microcode/amd.c index 4a7573c885..e7ae1e8023 100644 --- a/xen/arch/x86/cpu/microcode/amd.c +++ b/xen/arch/x86/cpu/microcode/amd.c @@ -380,8 +380,6 @@ static int cf_check apply_microcode(const struct microcode_patch *patch, "microcode: CPU%u updated from revision %#x to %#x, date = %04x-%02x-%02x\n", cpu, old_rev, rev, patch->year, patch->month, patch->day); - amd_check_zenbleed(); - return 0; } diff --git a/xen/arch/x86/include/asm/processor.h b/xen/arch/x86/include/asm/processor.h index 1342241742..2e087c6257 100644 --- a/xen/arch/x86/include/asm/processor.h +++ b/xen/arch/x86/include/asm/processor.h @@ -435,8 +435,6 @@ enum ap_boot_method { }; extern enum ap_boot_method ap_boot_method; -void amd_check_zenbleed(void); - #endif /* !__ASSEMBLY__ */ #endif /* __ASM_X86_PROCESSOR_H */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.21 From xen-changelog-bounces@lists.xenproject.org Wed Dec 03 13:00:35 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 03 Dec 2025 13:00:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1176741.1501202 (Exim 4.92) (envelope-from ) id 1vQmTD-0008F8-9e; Wed, 03 Dec 2025 13:00:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1176741.1501202; Wed, 03 Dec 2025 13:00:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQmTD-0008F0-6e; Wed, 03 Dec 2025 13:00:35 +0000 Received: by outflank-mailman (input) for mailman id 1176741; Wed, 03 Dec 2025 13:00:34 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQmTC-0008Eu-GU for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 13:00:34 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQmTC-004qF9-1N for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 13:00:34 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQmTC-005xLD-13 for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 13:00:34 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Cq2aRcbnnoHgPi4Ymqa9jW4J6VQq8KL4z3rnBAm/xn4=; b=qX0UcY2Bk98wGtqAdv846mHqtL SFS/t+GfaysA4sdXUy+YgtQXl9bov2UkU64BadAj6kSHm3Usb13f+E87L+kJr5BJ5cQEB2KXsb/2n Quw0HUS90MKiOOVV8TR1H+zg4heToll+keSf+0BOCJiP0NUICCyN4Y7BVuW1eELxCH40=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.21] x86/amd: Fix race editing DE_CFG Message-Id: Date: Wed, 03 Dec 2025 13:00:34 +0000 commit 16e22efbded42b56d00181409ca2b675dc7c561b Author: Andrew Cooper AuthorDate: Wed Dec 3 11:41:51 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 3 11:41:51 2025 +0100 x86/amd: Fix race editing DE_CFG We have two different functions explaining that DE_CFG is Core-scoped and that writes are racy but happen to be safe. This is only true when there's one of them. Introduce amd_init_de_cfg() to be the singular function which writes to DE_CFG, modelled after the logic we already have for BP_CFG. While reworking amd_check_zenbleed() into a simple predicate used by amd_init_de_cfg(), fix the microcode table. The 'good_rev' was specific to an individual stepping and not valid to be matched by model, let alone a range. The only CPUs incorrectly matched that I can locate appear to be pre-production, and probably didn't get Zenbleed microcode. Rework amd_init_lfence() to be amd_init_lfence_dispatch() with only the purpose of configuring X86_FEATURE_LFENCE_DISPATCH in the case that it needs synthesising. Run it on the BSP only and use setup_force_cpu_cap() to prevent the bit disappearing on a subseuqent CPUID rescan. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich master commit: d0c75dc4c028bc32fd9cf1d4358973929548de54 master date: 2025-12-01 16:20:41 +0000 --- xen/arch/x86/cpu/amd.c | 224 +++++++++++++++++++++++------------------------ xen/arch/x86/cpu/cpu.h | 3 +- xen/arch/x86/cpu/hygon.c | 6 +- 3 files changed, 115 insertions(+), 118 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index 789500d7ab..35b9dbf149 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -747,45 +747,6 @@ void amd_log_freq(const struct cpuinfo_x86 *c) printk("CPU%u: %u MHz\n", smp_processor_id(), low_mhz); } -void amd_init_lfence(struct cpuinfo_x86 *c) -{ - uint64_t value; - - /* - * Some hardware has LFENCE dispatch serialising always enabled, - * nothing to do on that case. - */ - if (test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability)) - return; - - /* - * Attempt to set lfence to be Dispatch Serialising. This MSR almost - * certainly isn't virtualised (and Xen at least will leak the real - * value in but silently discard writes), as well as being per-core - * rather than per-thread, so do a full safe read/write/readback cycle - * in the worst case. - */ - if (rdmsr_safe(MSR_AMD64_DE_CFG, &value)) - /* Unable to read. Assume the safer default. */ - __clear_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); - else if (value & AMD64_DE_CFG_LFENCE_SERIALISE) - /* Already dispatch serialising. */ - __set_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); - else if (wrmsr_safe(MSR_AMD64_DE_CFG, - value | AMD64_DE_CFG_LFENCE_SERIALISE) || - rdmsr_safe(MSR_AMD64_DE_CFG, &value) || - !(value & AMD64_DE_CFG_LFENCE_SERIALISE)) - /* Attempt to set failed. Assume the safer default. */ - __clear_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); - else - /* Successfully enabled! */ - __set_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); -} - /* * Refer to the AMD Speculative Store Bypass whitepaper: * https://developer.amd.com/wp-content/resources/124441_AMD64_SpeculativeStoreBypassDisable_Whitepaper_final.pdf @@ -979,76 +940,6 @@ void __init detect_zen2_null_seg_behaviour(void) } -static void amd_check_zenbleed(void) -{ - const struct cpu_signature *sig = &this_cpu(cpu_sig); - unsigned int good_rev; - uint64_t val, old_val, chickenbit = (1 << 9); - - /* - * If we're virtualised, we can't do family/model checks safely, and - * we likely wouldn't have access to DE_CFG even if we could see a - * microcode revision. - * - * A hypervisor may hide AVX as a stopgap mitigation. We're not in a - * position to care either way. An admin doesn't want to be disabling - * AVX as a mitigation on any build of Xen with this logic present. - */ - if (cpu_has_hypervisor || boot_cpu_data.x86 != 0x17) - return; - - switch (boot_cpu_data.x86_model) { - case 0x30 ... 0x3f: good_rev = 0x0830107a; break; - case 0x60 ... 0x67: good_rev = 0x0860010b; break; - case 0x68 ... 0x6f: good_rev = 0x08608105; break; - case 0x70 ... 0x7f: good_rev = 0x08701032; break; - case 0xa0 ... 0xaf: good_rev = 0x08a00008; break; - default: - /* - * With the Fam17h check above, most parts getting here are - * Zen1. They're not affected. Assume Zen2 ones making it - * here are affected regardless of microcode version. - */ - if (is_zen1_uarch()) - return; - good_rev = ~0U; - break; - } - - rdmsrl(MSR_AMD64_DE_CFG, val); - old_val = val; - - /* - * Microcode is the preferred mitigation, in terms of performance. - * However, without microcode, this chickenbit (specific to the Zen2 - * uarch) disables Floating Point Mov-Elimination to mitigate the - * issue. - */ - val &= ~chickenbit; - if (sig->rev < good_rev) - val |= chickenbit; - - if (val == old_val) - /* Nothing to change. */ - return; - - /* - * DE_CFG is a Core-scoped MSR, and this write is racy during late - * microcode load. However, both threads calculate the new value from - * state which is shared, and unrelated to the old value, so the - * result should be consistent. - */ - wrmsrl(MSR_AMD64_DE_CFG, val); - - /* - * Inform the admin that we changed something, but don't spam, - * especially during a late microcode load. - */ - if (smp_processor_id() == 0) - printk(XENLOG_INFO "Zenbleed mitigation - using %s\n", - val & chickenbit ? "chickenbit" : "microcode"); -} - static void cf_check fam17_disable_c6(void *arg) { /* Disable C6 by clearing the CCR{0,1,2}_CC6EN bits. */ @@ -1075,6 +966,109 @@ static void cf_check fam17_disable_c6(void *arg) wrmsrl(MSR_AMD_CSTATE_CFG, val & mask); } +static bool zenbleed_use_chickenbit(void) +{ + unsigned int curr_rev; + uint8_t fixed_rev; + + /* Zenbleed only affects Zen2. Nothing to do on non-Fam17h systems. */ + if ( boot_cpu_data.family != 0x17 ) + return false; + + curr_rev = this_cpu(cpu_sig).rev; + switch ( curr_rev >> 8 ) + { + case 0x083010: fixed_rev = 0x7a; break; + case 0x086001: fixed_rev = 0x0b; break; + case 0x086081: fixed_rev = 0x05; break; + case 0x087010: fixed_rev = 0x32; break; + case 0x08a000: fixed_rev = 0x08; break; + default: + /* + * With the Fam17h check above, most parts getting here are Zen1. + * They're not affected. Assume Zen2 ones making it here are affected + * regardless of microcode version. + */ + return is_zen2_uarch(); + } + + return (uint8_t)curr_rev >= fixed_rev; +} + +void amd_init_de_cfg(const struct cpuinfo_x86 *c) +{ + uint64_t val, new = 0; + + /* + * The MSR doesn't exist on Fam 0xf/0x11. If virtualised, we won't have + * mutable access even if we can read it. + */ + if ( c->family == 0xf || c->family == 0x11 || cpu_has_hypervisor ) + return; + + /* + * On Zen3 (Fam 0x19) and later CPUs, LFENCE is unconditionally dispatch + * serialising, and is enumerated in CPUID. + * + * On older systems, LFENCE is unconditionally dispatch serialising (when + * the MSR doesn't exist), or can be made so by setting this bit. + */ + if ( !test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability) ) + new |= AMD64_DE_CFG_LFENCE_SERIALISE; + + /* + * If vulnerable to Zenbleed and not mitigated in microcode, use the + * bigger hammer. + */ + if ( zenbleed_use_chickenbit() ) + new |= (1 << 9); + + /* Avoid reading DE_CFG if we don't intend to change anything. */ + if ( !new ) + return; + + rdmsrl(MSR_AMD64_DE_CFG, val); + + if ( (val & new) == new ) + return; + + /* + * DE_CFG is a Core-scoped MSR, and this write is racy. However, both + * threads calculate the new value from state which expected to be + * consistent across CPUs and unrelated to the old value, so the result + * should be consistent. + */ + wrmsrl(MSR_AMD64_DE_CFG, val | new); +} + +void __init amd_init_lfence_dispatch(void) +{ + struct cpuinfo_x86 *c = &boot_cpu_data; + uint64_t val; + + if ( test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability) ) + /* LFENCE is forced dispatch serialising and we can't control it. */ + return; + + if ( c->family == 0xf || c->family == 0x11 ) + /* MSR doesn't exist, LFENCE is dispatch serialising. */ + goto set; + + if ( rdmsr_safe(MSR_AMD64_DE_CFG, &val) ) + /* Unable to read. Assume the safer default. */ + goto clear; + + if ( val & AMD64_DE_CFG_LFENCE_SERIALISE ) + goto set; + + clear: + setup_clear_cpu_cap(X86_FEATURE_LFENCE_DISPATCH); + return; + + set: + setup_force_cpu_cap(X86_FEATURE_LFENCE_DISPATCH); +} + static void amd_check_bp_cfg(void) { uint64_t val, new = 0; @@ -1118,6 +1112,11 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) u32 l, h; uint64_t value; + amd_init_de_cfg(c); + + if (c == &boot_cpu_data) + amd_init_lfence_dispatch(); /* Needs amd_init_de_cfg() */ + /* Disable TLB flush filter by setting HWCR.FFDIS on K8 * bit 6 of msr C001_0015 * @@ -1156,12 +1155,6 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) if (c == &boot_cpu_data && !cpu_has(c, X86_FEATURE_RSTR_FP_ERR_PTRS)) setup_force_cpu_cap(X86_BUG_FPU_PTRS); - if (c->x86 == 0x0f || c->x86 == 0x11) - /* Always dispatch serialising on this hardare. */ - __set_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability); - else /* Implicily "== 0x10 || >= 0x12" by being 64bit. */ - amd_init_lfence(c); - amd_init_ssbd(c); if (c->x86 == 0x17) @@ -1378,7 +1371,6 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) if ((smp_processor_id() == 1) && !cpu_has(c, X86_FEATURE_ITSC)) disable_c1_ramping(); - amd_check_zenbleed(); amd_check_bp_cfg(); if (fam17_c6_disabled) diff --git a/xen/arch/x86/cpu/cpu.h b/xen/arch/x86/cpu/cpu.h index cbb434f3a2..8bed3f5249 100644 --- a/xen/arch/x86/cpu/cpu.h +++ b/xen/arch/x86/cpu/cpu.h @@ -24,7 +24,8 @@ extern bool detect_extended_topology(struct cpuinfo_x86 *c); void cf_check early_init_amd(struct cpuinfo_x86 *c); void amd_log_freq(const struct cpuinfo_x86 *c); -void amd_init_lfence(struct cpuinfo_x86 *c); +void amd_init_de_cfg(const struct cpuinfo_x86 *c); +void amd_init_lfence_dispatch(void); void amd_init_ssbd(const struct cpuinfo_x86 *c); void amd_init_spectral_chicken(void); void detect_zen2_null_seg_behaviour(void); diff --git a/xen/arch/x86/cpu/hygon.c b/xen/arch/x86/cpu/hygon.c index f7508cc8fc..c3faabbdb7 100644 --- a/xen/arch/x86/cpu/hygon.c +++ b/xen/arch/x86/cpu/hygon.c @@ -31,7 +31,11 @@ static void cf_check init_hygon(struct cpuinfo_x86 *c) { unsigned long long value; - amd_init_lfence(c); + amd_init_de_cfg(c); + + if (c == &boot_cpu_data) + amd_init_lfence_dispatch(); /* Needs amd_init_de_cfg() */ + amd_init_ssbd(c); /* Probe for NSCB on Zen2 CPUs when not virtualised */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.21 From xen-changelog-bounces@lists.xenproject.org Wed Dec 03 13:11:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 03 Dec 2025 13:11:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1176742.1501205 (Exim 4.92) (envelope-from ) id 1vQmdN-00011V-3P; Wed, 03 Dec 2025 13:11:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1176742.1501205; Wed, 03 Dec 2025 13:11:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQmdN-00011O-0j; Wed, 03 Dec 2025 13:11:05 +0000 Received: by outflank-mailman (input) for mailman id 1176742; Wed, 03 Dec 2025 13:11:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQmdL-00011I-KI for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 13:11:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQmdL-004qRO-1A for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 13:11:03 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQmdL-0073Ts-0l for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 13:11:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=dm8uzObTt927cvx+fa+Jw7Doe+n6xoPHNZM3dkOkpM0=; b=5VrFCVWtYghxOJtF8sE0L9Egx3 T8O/MuqcowIrIovoIwp14vvWBcT7ifnNiA0s3KCn0+Sp4lMD4N6NpsbuhAjHq2LPgwILQDC4riP16 XRJsgmNRsmEa2Bc18diAzTyiaryvziCE5KROSd1ec/mXLxnTagPRtT8eiBk0s0UKHk6c=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.20] x86/msix: fix incorrect refcount decrease in msixtlb Message-Id: Date: Wed, 03 Dec 2025 13:11:03 +0000 commit 9fb2b66c60a5b0389ad99ecdd02cb966ff7a9c37 Author: Roger Pau Monné AuthorDate: Wed Dec 3 11:43:36 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 3 11:43:36 2025 +0100 x86/msix: fix incorrect refcount decrease in msixtlb The usage of atomic_dec_and_test() in msixtbl_pt_unregister() is inverted: the function will return true when the refcount reaches 0. The current code does the opposite and calls del_msixtbl_entry() when there are still refcounts held on the object. However all callers of msixtbl_pt_unregister() are serialized on the domctl lock, and hence there cannot be parallel calls to msixtbl_pt_unregister() that could lead to double freeing of the same object. The incorrect freeing with active msixtlb entries will result in a possible guest visible malfunction, but no internal Xen state corruption. While entries are leaked once the last pIRQ is unbound, the same entry would get re-used if the device has pIRQs bound again. The guest cannot exploit this incorrect refcount check to leak arbitrary amounts of memory by repeatedly enabling and disabling (binding and unbinding) MSI-X entries. Fixes: 34097f0d3080 ('hvm: passthrough MSI-X mask bit acceleration') Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich master commit: ea87662c7781c5abeddcd62923eb405d10522ae9 master date: 2025-11-26 09:46:17 +0100 --- xen/arch/x86/hvm/vmsi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c index fd83abb929..e175b5eaa2 100644 --- a/xen/arch/x86/hvm/vmsi.c +++ b/xen/arch/x86/hvm/vmsi.c @@ -758,7 +758,7 @@ out: return; found: - if ( !atomic_dec_and_test(&entry->refcnt) ) + if ( atomic_dec_and_test(&entry->refcnt) ) del_msixtbl_entry(entry); spin_unlock_irq(&irqd->lock); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.20 From xen-changelog-bounces@lists.xenproject.org Wed Dec 03 13:11:15 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 03 Dec 2025 13:11:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1176743.1501209 (Exim 4.92) (envelope-from ) id 1vQmdX-00013s-6H; Wed, 03 Dec 2025 13:11:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1176743.1501209; Wed, 03 Dec 2025 13:11:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQmdX-00013l-3b; Wed, 03 Dec 2025 13:11:15 +0000 Received: by outflank-mailman (input) for mailman id 1176743; Wed, 03 Dec 2025 13:11:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQmdV-00013O-MU for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 13:11:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQmdV-004qRS-26 for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 13:11:13 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQmdV-0074Vo-1q for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 13:11:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ymlYdHlcujL2+nOKjEvWa2f/gx7iosJiZ+l4h8fdsFM=; b=F8umMgyjmnM5Z+LzC0TF23AZgA 5hnZ9dEYmTnTzD63jREPlOBO9+cYxd82wOlKN8yraJyQ3KPG8kHTaK/Q1qD8SB4R9c1plkivHqXmk MRv6+1mEN5k04Zjs0utAyXA9DTAeawZUkiqO3WWfSCI6n0AqvvXOmrOc5r7rZxf9lGpo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.20] x86/vhpet: Fix sanitization of legacy IRQ route Message-Id: Date: Wed, 03 Dec 2025 13:11:13 +0000 commit 601bbb00d267d7e9479e4027254ffb6416cedc29 Author: Tu Dinh AuthorDate: Wed Dec 3 11:43:57 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 3 11:43:57 2025 +0100 x86/vhpet: Fix sanitization of legacy IRQ route When setting a timer's config register, timer_sanitize_int_route will always reset the IRQ route value to what's valid corresponding to the !HPET_CFG_LEGACY case. This is applied even if the HPET is set to HPET_CFG_LEGACY. When some operating systems (e.g. Windows) try to write to a timer config, they will verify and rewrite the register if the values don't match what they expect. This causes an unnecessary write to HPET_Tn_CFG. Note, the HPET specification states that for the Tn_INT_ROUTE_CNF field: "If the value is not supported by this prarticular timer, then the value read back will not match what is written. [...] If the LegacyReplacement Route bit is set, then Timers 0 and 1 will have a different routing, and this bit field has no effect for those two timers." Therefore, Xen should not reset timer_int_route if legacy mode is enabled, regardless of what's in there. Fixes: ec40d3fe2147 ("x86/vhpet: check that the set interrupt route is valid") Signed-off-by: Tu Dinh Reviewed-by: Jan Beulich master commit: fb0e37df71a31318c61e0715ffed3e149ca8a4aa master date: 2025-11-26 12:10:21 +0100 --- xen/arch/x86/hvm/hpet.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/hvm/hpet.c b/xen/arch/x86/hvm/hpet.c index f0e5f877f4..e317ec1f5f 100644 --- a/xen/arch/x86/hvm/hpet.c +++ b/xen/arch/x86/hvm/hpet.c @@ -48,6 +48,8 @@ #define timer_is_32bit(h, n) (timer_config(h, n) & HPET_TN_32BIT) #define hpet_enabled(h) ((h)->hpet.config & HPET_CFG_ENABLE) #define timer_level(h, n) (timer_config(h, n) & HPET_TN_LEVEL) +#define timer_is_legacy(h, n) \ + (((n) <= 1) && ((h)->hpet.config & HPET_CFG_LEGACY)) #define timer_int_route(h, n) MASK_EXTR(timer_config(h, n), HPET_TN_ROUTE) @@ -55,7 +57,8 @@ MASK_EXTR(timer_config(h, n), HPET_TN_INT_ROUTE_CAP) #define timer_int_route_valid(h, n) \ - ((1u << timer_int_route(h, n)) & timer_int_route_cap(h, n)) + (timer_is_legacy(h, n) || \ + ((1u << timer_int_route(h, n)) & timer_int_route_cap(h, n))) static inline uint64_t hpet_read_maincounter(HPETState *h, uint64_t guest_time) { @@ -275,7 +278,7 @@ static void hpet_set_timer(HPETState *h, unsigned int tn, ? (uint32_t)diff : 0; destroy_periodic_time(&h->pt[tn]); - if ( (tn <= 1) && (h->hpet.config & HPET_CFG_LEGACY) ) + if ( timer_is_legacy(h, tn) ) { /* if LegacyReplacementRoute bit is set, HPET specification requires timer0 be routed to IRQ0 in NON-APIC or IRQ2 in the I/O APIC, @@ -379,6 +382,14 @@ static int cf_check hpet_write( h->hpet.config = hpet_fixup_reg(new_val, old_val, HPET_CFG_ENABLE | HPET_CFG_LEGACY); + /* + * The first 2 channels' interrupt route values only matter when + * HPET_CFG_LEGACY is disabled. However, for simplicity's sake, always + * resanitize all channels anyway. + */ + for ( i = 0; i < HPET_TIMER_NUM; i++ ) + timer_sanitize_int_route(h, i); + if ( !(old_val & HPET_CFG_ENABLE) && (new_val & HPET_CFG_ENABLE) ) { /* Enable main counter and interrupt generation. */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.20 From xen-changelog-bounces@lists.xenproject.org Wed Dec 03 13:11:25 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 03 Dec 2025 13:11:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1176745.1501213 (Exim 4.92) (envelope-from ) id 1vQmdh-00016S-7m; Wed, 03 Dec 2025 13:11:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1176745.1501213; Wed, 03 Dec 2025 13:11:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQmdh-00016L-5N; Wed, 03 Dec 2025 13:11:25 +0000 Received: by outflank-mailman (input) for mailman id 1176745; Wed, 03 Dec 2025 13:11:24 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQmdg-00016F-0X for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 13:11:24 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQmdf-004qRb-3B for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 13:11:23 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQmdf-0075pD-2t for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 13:11:23 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Zz15DWacqmYvVR+vInTNN/r0CRqyFzLqEjulF3YRDYY=; b=nCedWvLywJ4CMVgtI2+fTIKqiV jKm/zzPKb91xNsjdi4cipaVk8o+9iDVjMoHGHv437vwBpxQqRjNQryQQ5RSNn2tnbh7qnYtAS/113 2PUm0wZ3F4VVtqJqpb3NMvXQTIRUOIrM3I7O7YPsjqCzF11sGmHBNS6adQZJjb/toRiM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.20] x86/amd: Stop updating the Zenbleed mitigation dynamically Message-Id: Date: Wed, 03 Dec 2025 13:11:23 +0000 commit f5b36e23ec452cec8b748e24c6e381ff8aeb6b95 Author: Andrew Cooper AuthorDate: Wed Dec 3 11:44:12 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 3 11:44:12 2025 +0100 x86/amd: Stop updating the Zenbleed mitigation dynamically This was potentially helpful when the chickenbit was the only mitigation and microcode had not been released, but that was two years ago. Zenbleed microcode has been avaialble since December 2023, and the subsequent Entrysign signature vulnerability means that firmware updates block OS-loading and more OS-loadable microcode will be produced for Zen2. i.e. the Zenbleed fix is not going to appear at runtime these days. No practical change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich master commit: 5cd1ac15756ed7d9175685a3d16fc23fc86b3db4 master date: 2025-11-27 18:22:20 +0000 --- xen/arch/x86/cpu/amd.c | 2 +- xen/arch/x86/cpu/microcode/amd.c | 2 -- xen/arch/x86/include/asm/processor.h | 2 -- 3 files changed, 1 insertion(+), 5 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index 597b0f073d..32bb5792ca 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -913,7 +913,7 @@ void __init detect_zen2_null_seg_behaviour(void) } -void amd_check_zenbleed(void) +static void amd_check_zenbleed(void) { const struct cpu_signature *sig = &this_cpu(cpu_sig); unsigned int good_rev; diff --git a/xen/arch/x86/cpu/microcode/amd.c b/xen/arch/x86/cpu/microcode/amd.c index 0b51796791..995a050e52 100644 --- a/xen/arch/x86/cpu/microcode/amd.c +++ b/xen/arch/x86/cpu/microcode/amd.c @@ -373,8 +373,6 @@ static int cf_check apply_microcode(const struct microcode_patch *patch, "microcode: CPU%u updated from revision %#x to %#x, date = %04x-%02x-%02x\n", cpu, old_rev, rev, patch->year, patch->month, patch->day); - amd_check_zenbleed(); - return 0; } diff --git a/xen/arch/x86/include/asm/processor.h b/xen/arch/x86/include/asm/processor.h index 1aec6691c9..98734f4d3f 100644 --- a/xen/arch/x86/include/asm/processor.h +++ b/xen/arch/x86/include/asm/processor.h @@ -504,8 +504,6 @@ enum ap_boot_method { }; extern enum ap_boot_method ap_boot_method; -void amd_check_zenbleed(void); - #endif /* !__ASSEMBLY__ */ #endif /* __ASM_X86_PROCESSOR_H */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.20 From xen-changelog-bounces@lists.xenproject.org Wed Dec 03 13:11:36 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 03 Dec 2025 13:11:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1176746.1501218 (Exim 4.92) (envelope-from ) id 1vQmds-0001AO-9b; Wed, 03 Dec 2025 13:11:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1176746.1501218; Wed, 03 Dec 2025 13:11:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQmds-0001AG-6t; Wed, 03 Dec 2025 13:11:36 +0000 Received: by outflank-mailman (input) for mailman id 1176746; Wed, 03 Dec 2025 13:11:34 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQmdq-00018n-HP for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 13:11:34 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQmdq-004qRf-1e for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 13:11:34 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQmdq-0076o8-1B for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 13:11:34 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=4rx30bMaW0TW4RKclKpb8ZdbZ8GxnJJKOIlDSEcTpnI=; b=Kcn8fk59M+Xty0IfeWKvR2TD/X 1QK8vnkZK19ceMdu5yFfe/a27lVxbIOF4bohQ10YusQtbP9sI2ZwcT3okbYSinQaYitKvj/+XCeVW 0sYoiupr/+fyb9ROTSIeLVofOwxW/fCFP424KRz4Bpmr/BotqfjhBU534WB/ACGz5gk0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.20] x86/amd: Fix race editing DE_CFG Message-Id: Date: Wed, 03 Dec 2025 13:11:34 +0000 commit bb897593b7a73926f45391f5a39cbbf1c381275e Author: Andrew Cooper AuthorDate: Wed Dec 3 11:44:35 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 3 11:44:35 2025 +0100 x86/amd: Fix race editing DE_CFG We have two different functions explaining that DE_CFG is Core-scoped and that writes are racy but happen to be safe. This is only true when there's one of them. Introduce amd_init_de_cfg() to be the singular function which writes to DE_CFG, modelled after the logic we already have for BP_CFG. While reworking amd_check_zenbleed() into a simple predicate used by amd_init_de_cfg(), fix the microcode table. The 'good_rev' was specific to an individual stepping and not valid to be matched by model, let alone a range. The only CPUs incorrectly matched that I can locate appear to be pre-production, and probably didn't get Zenbleed microcode. Rework amd_init_lfence() to be amd_init_lfence_dispatch() with only the purpose of configuring X86_FEATURE_LFENCE_DISPATCH in the case that it needs synthesising. Run it on the BSP only and use setup_force_cpu_cap() to prevent the bit disappearing on a subseuqent CPUID rescan. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich master commit: d0c75dc4c028bc32fd9cf1d4358973929548de54 master date: 2025-12-01 16:20:41 +0000 --- xen/arch/x86/cpu/amd.c | 224 +++++++++++++++++++++++------------------------ xen/arch/x86/cpu/cpu.h | 3 +- xen/arch/x86/cpu/hygon.c | 6 +- 3 files changed, 115 insertions(+), 118 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index 32bb5792ca..ce555ec8cf 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -681,45 +681,6 @@ void cf_check early_init_amd(struct cpuinfo_x86 *c) ctxt_switch_levelling(NULL); } -void amd_init_lfence(struct cpuinfo_x86 *c) -{ - uint64_t value; - - /* - * Some hardware has LFENCE dispatch serialising always enabled, - * nothing to do on that case. - */ - if (test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability)) - return; - - /* - * Attempt to set lfence to be Dispatch Serialising. This MSR almost - * certainly isn't virtualised (and Xen at least will leak the real - * value in but silently discard writes), as well as being per-core - * rather than per-thread, so do a full safe read/write/readback cycle - * in the worst case. - */ - if (rdmsr_safe(MSR_AMD64_DE_CFG, value)) - /* Unable to read. Assume the safer default. */ - __clear_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); - else if (value & AMD64_DE_CFG_LFENCE_SERIALISE) - /* Already dispatch serialising. */ - __set_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); - else if (wrmsr_safe(MSR_AMD64_DE_CFG, - value | AMD64_DE_CFG_LFENCE_SERIALISE) || - rdmsr_safe(MSR_AMD64_DE_CFG, value) || - !(value & AMD64_DE_CFG_LFENCE_SERIALISE)) - /* Attempt to set failed. Assume the safer default. */ - __clear_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); - else - /* Successfully enabled! */ - __set_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); -} - /* * Refer to the AMD Speculative Store Bypass whitepaper: * https://developer.amd.com/wp-content/resources/124441_AMD64_SpeculativeStoreBypassDisable_Whitepaper_final.pdf @@ -913,76 +874,6 @@ void __init detect_zen2_null_seg_behaviour(void) } -static void amd_check_zenbleed(void) -{ - const struct cpu_signature *sig = &this_cpu(cpu_sig); - unsigned int good_rev; - uint64_t val, old_val, chickenbit = (1 << 9); - - /* - * If we're virtualised, we can't do family/model checks safely, and - * we likely wouldn't have access to DE_CFG even if we could see a - * microcode revision. - * - * A hypervisor may hide AVX as a stopgap mitigation. We're not in a - * position to care either way. An admin doesn't want to be disabling - * AVX as a mitigation on any build of Xen with this logic present. - */ - if (cpu_has_hypervisor || boot_cpu_data.x86 != 0x17) - return; - - switch (boot_cpu_data.x86_model) { - case 0x30 ... 0x3f: good_rev = 0x0830107a; break; - case 0x60 ... 0x67: good_rev = 0x0860010b; break; - case 0x68 ... 0x6f: good_rev = 0x08608105; break; - case 0x70 ... 0x7f: good_rev = 0x08701032; break; - case 0xa0 ... 0xaf: good_rev = 0x08a00008; break; - default: - /* - * With the Fam17h check above, most parts getting here are - * Zen1. They're not affected. Assume Zen2 ones making it - * here are affected regardless of microcode version. - */ - if (is_zen1_uarch()) - return; - good_rev = ~0U; - break; - } - - rdmsrl(MSR_AMD64_DE_CFG, val); - old_val = val; - - /* - * Microcode is the preferred mitigation, in terms of performance. - * However, without microcode, this chickenbit (specific to the Zen2 - * uarch) disables Floating Point Mov-Elimination to mitigate the - * issue. - */ - val &= ~chickenbit; - if (sig->rev < good_rev) - val |= chickenbit; - - if (val == old_val) - /* Nothing to change. */ - return; - - /* - * DE_CFG is a Core-scoped MSR, and this write is racy during late - * microcode load. However, both threads calculate the new value from - * state which is shared, and unrelated to the old value, so the - * result should be consistent. - */ - wrmsrl(MSR_AMD64_DE_CFG, val); - - /* - * Inform the admin that we changed something, but don't spam, - * especially during a late microcode load. - */ - if (smp_processor_id() == 0) - printk(XENLOG_INFO "Zenbleed mitigation - using %s\n", - val & chickenbit ? "chickenbit" : "microcode"); -} - static void cf_check fam17_disable_c6(void *arg) { /* Disable C6 by clearing the CCR{0,1,2}_CC6EN bits. */ @@ -1009,6 +900,109 @@ static void cf_check fam17_disable_c6(void *arg) wrmsrl(MSR_AMD_CSTATE_CFG, val & mask); } +static bool zenbleed_use_chickenbit(void) +{ + unsigned int curr_rev; + uint8_t fixed_rev; + + /* Zenbleed only affects Zen2. Nothing to do on non-Fam17h systems. */ + if ( boot_cpu_data.x86 != 0x17 ) + return false; + + curr_rev = this_cpu(cpu_sig).rev; + switch ( curr_rev >> 8 ) + { + case 0x083010: fixed_rev = 0x7a; break; + case 0x086001: fixed_rev = 0x0b; break; + case 0x086081: fixed_rev = 0x05; break; + case 0x087010: fixed_rev = 0x32; break; + case 0x08a000: fixed_rev = 0x08; break; + default: + /* + * With the Fam17h check above, most parts getting here are Zen1. + * They're not affected. Assume Zen2 ones making it here are affected + * regardless of microcode version. + */ + return is_zen2_uarch(); + } + + return (uint8_t)curr_rev >= fixed_rev; +} + +void amd_init_de_cfg(const struct cpuinfo_x86 *c) +{ + uint64_t val, new = 0; + + /* + * The MSR doesn't exist on Fam 0xf/0x11. If virtualised, we won't have + * mutable access even if we can read it. + */ + if ( c->x86 == 0xf || c->x86 == 0x11 || cpu_has_hypervisor ) + return; + + /* + * On Zen3 (Fam 0x19) and later CPUs, LFENCE is unconditionally dispatch + * serialising, and is enumerated in CPUID. + * + * On older systems, LFENCE is unconditionally dispatch serialising (when + * the MSR doesn't exist), or can be made so by setting this bit. + */ + if ( !test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability) ) + new |= AMD64_DE_CFG_LFENCE_SERIALISE; + + /* + * If vulnerable to Zenbleed and not mitigated in microcode, use the + * bigger hammer. + */ + if ( zenbleed_use_chickenbit() ) + new |= (1 << 9); + + /* Avoid reading DE_CFG if we don't intend to change anything. */ + if ( !new ) + return; + + rdmsrl(MSR_AMD64_DE_CFG, val); + + if ( (val & new) == new ) + return; + + /* + * DE_CFG is a Core-scoped MSR, and this write is racy. However, both + * threads calculate the new value from state which expected to be + * consistent across CPUs and unrelated to the old value, so the result + * should be consistent. + */ + wrmsrl(MSR_AMD64_DE_CFG, val | new); +} + +void __init amd_init_lfence_dispatch(void) +{ + struct cpuinfo_x86 *c = &boot_cpu_data; + uint64_t val; + + if ( test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability) ) + /* LFENCE is forced dispatch serialising and we can't control it. */ + return; + + if ( c->x86 == 0xf || c->x86 == 0x11 ) + /* MSR doesn't exist, LFENCE is dispatch serialising. */ + goto set; + + if ( rdmsr_safe(MSR_AMD64_DE_CFG, val) ) + /* Unable to read. Assume the safer default. */ + goto clear; + + if ( val & AMD64_DE_CFG_LFENCE_SERIALISE ) + goto set; + + clear: + setup_clear_cpu_cap(X86_FEATURE_LFENCE_DISPATCH); + return; + + set: + setup_force_cpu_cap(X86_FEATURE_LFENCE_DISPATCH); +} + static void amd_check_bp_cfg(void) { uint64_t val, new = 0; @@ -1053,6 +1047,11 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) unsigned long long value; + amd_init_de_cfg(c); + + if (c == &boot_cpu_data) + amd_init_lfence_dispatch(); /* Needs amd_init_de_cfg() */ + /* Disable TLB flush filter by setting HWCR.FFDIS on K8 * bit 6 of msr C001_0015 * @@ -1091,12 +1090,6 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) if (c == &boot_cpu_data && !cpu_has(c, X86_FEATURE_RSTR_FP_ERR_PTRS)) setup_force_cpu_cap(X86_BUG_FPU_PTRS); - if (c->x86 == 0x0f || c->x86 == 0x11) - /* Always dispatch serialising on this hardare. */ - __set_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability); - else /* Implicily "== 0x10 || >= 0x12" by being 64bit. */ - amd_init_lfence(c); - amd_init_ssbd(c); if (c->x86 == 0x17) @@ -1313,7 +1306,6 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) if ((smp_processor_id() == 1) && !cpu_has(c, X86_FEATURE_ITSC)) disable_c1_ramping(); - amd_check_zenbleed(); amd_check_bp_cfg(); if (fam17_c6_disabled) diff --git a/xen/arch/x86/cpu/cpu.h b/xen/arch/x86/cpu/cpu.h index 8be65e975a..129be9bfa3 100644 --- a/xen/arch/x86/cpu/cpu.h +++ b/xen/arch/x86/cpu/cpu.h @@ -20,7 +20,8 @@ extern bool detect_extended_topology(struct cpuinfo_x86 *c); void cf_check early_init_amd(struct cpuinfo_x86 *c); void amd_log_freq(const struct cpuinfo_x86 *c); -void amd_init_lfence(struct cpuinfo_x86 *c); +void amd_init_de_cfg(const struct cpuinfo_x86 *c); +void amd_init_lfence_dispatch(void); void amd_init_ssbd(const struct cpuinfo_x86 *c); void amd_init_spectral_chicken(void); void detect_zen2_null_seg_behaviour(void); diff --git a/xen/arch/x86/cpu/hygon.c b/xen/arch/x86/cpu/hygon.c index f7508cc8fc..c3faabbdb7 100644 --- a/xen/arch/x86/cpu/hygon.c +++ b/xen/arch/x86/cpu/hygon.c @@ -31,7 +31,11 @@ static void cf_check init_hygon(struct cpuinfo_x86 *c) { unsigned long long value; - amd_init_lfence(c); + amd_init_de_cfg(c); + + if (c == &boot_cpu_data) + amd_init_lfence_dispatch(); /* Needs amd_init_de_cfg() */ + amd_init_ssbd(c); /* Probe for NSCB on Zen2 CPUs when not virtualised */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.20 From xen-changelog-bounces@lists.xenproject.org Wed Dec 03 14:22:08 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 03 Dec 2025 14:22:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1176865.1501312 (Exim 4.92) (envelope-from ) id 1vQnk4-0006fR-Gp; Wed, 03 Dec 2025 14:22:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1176865.1501312; Wed, 03 Dec 2025 14:22:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQnk4-0006fJ-EF; Wed, 03 Dec 2025 14:22:04 +0000 Received: by outflank-mailman (input) for mailman id 1176865; Wed, 03 Dec 2025 14:22:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQnk2-0006fD-Kq for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 14:22:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQnk2-004rzs-1H for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 14:22:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQnk2-00DP1w-17 for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 14:22:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Iz/92dzmHAPTetGT9LJgLAhW4mbD8bWyGyjCe+RPx2E=; b=V4n/rUhpfV1aTRAG90qLSryPYG lcoEqJ6HkwayOC7VVvYczwSKwn+NaXhA7hnYfLpsvyK32XflcdgNbUsXvFINPXx4hc0ydKuDC6FBQ 2k/A8PeE69ggDpzp/qNkX1/kt27+KKBuD1xO3NxEzVoe/rA76/wBw/QruQrH7A+9p26s=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.19] x86/msix: fix incorrect refcount decrease in msixtlb Message-Id: Date: Wed, 03 Dec 2025 14:22:02 +0000 commit 3d932ff9700d0d50458db263982661f07b22e25c Author: Roger Pau Monné AuthorDate: Wed Dec 3 11:45:12 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 3 11:45:12 2025 +0100 x86/msix: fix incorrect refcount decrease in msixtlb The usage of atomic_dec_and_test() in msixtbl_pt_unregister() is inverted: the function will return true when the refcount reaches 0. The current code does the opposite and calls del_msixtbl_entry() when there are still refcounts held on the object. However all callers of msixtbl_pt_unregister() are serialized on the domctl lock, and hence there cannot be parallel calls to msixtbl_pt_unregister() that could lead to double freeing of the same object. The incorrect freeing with active msixtlb entries will result in a possible guest visible malfunction, but no internal Xen state corruption. While entries are leaked once the last pIRQ is unbound, the same entry would get re-used if the device has pIRQs bound again. The guest cannot exploit this incorrect refcount check to leak arbitrary amounts of memory by repeatedly enabling and disabling (binding and unbinding) MSI-X entries. Fixes: 34097f0d3080 ('hvm: passthrough MSI-X mask bit acceleration') Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich master commit: ea87662c7781c5abeddcd62923eb405d10522ae9 master date: 2025-11-26 09:46:17 +0100 --- xen/arch/x86/hvm/vmsi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c index fd83abb929..e175b5eaa2 100644 --- a/xen/arch/x86/hvm/vmsi.c +++ b/xen/arch/x86/hvm/vmsi.c @@ -758,7 +758,7 @@ out: return; found: - if ( !atomic_dec_and_test(&entry->refcnt) ) + if ( atomic_dec_and_test(&entry->refcnt) ) del_msixtbl_entry(entry); spin_unlock_irq(&irqd->lock); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.19 From xen-changelog-bounces@lists.xenproject.org Wed Dec 03 14:22:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 03 Dec 2025 14:22:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1176866.1501315 (Exim 4.92) (envelope-from ) id 1vQnkD-0006im-I6; Wed, 03 Dec 2025 14:22:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1176866.1501315; Wed, 03 Dec 2025 14:22:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQnkD-0006ie-FX; Wed, 03 Dec 2025 14:22:13 +0000 Received: by outflank-mailman (input) for mailman id 1176866; Wed, 03 Dec 2025 14:22:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQnkC-0006iO-H9 for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 14:22:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQnkC-004rzx-1b for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 14:22:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQnkC-00DPsA-1U for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 14:22:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=AgwqUtwS5kb/fr32qOv9JxSkFISKeIyxHlFO+udRg2E=; b=yigXN7RKAH87R9d51/a6wDuSGZ 9Pwva60eBsN+Bq1T10M5eljwN3NnXkEBSSwET3nadCOF6h6b6sHtmu5G8G3nUqeJZ8kR//fScm8ZG iNGNFGQeFsMW4V8cLlcRotuIrzCJkq2KtE7haJBiAKVyvj5SBxzCwsvxvVXveIa2Ie6A=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.19] x86/vhpet: Fix sanitization of legacy IRQ route Message-Id: Date: Wed, 03 Dec 2025 14:22:12 +0000 commit 2271f256275304018d7df67c334f6eb06522c3d8 Author: Tu Dinh AuthorDate: Wed Dec 3 11:45:29 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 3 11:45:29 2025 +0100 x86/vhpet: Fix sanitization of legacy IRQ route When setting a timer's config register, timer_sanitize_int_route will always reset the IRQ route value to what's valid corresponding to the !HPET_CFG_LEGACY case. This is applied even if the HPET is set to HPET_CFG_LEGACY. When some operating systems (e.g. Windows) try to write to a timer config, they will verify and rewrite the register if the values don't match what they expect. This causes an unnecessary write to HPET_Tn_CFG. Note, the HPET specification states that for the Tn_INT_ROUTE_CNF field: "If the value is not supported by this prarticular timer, then the value read back will not match what is written. [...] If the LegacyReplacement Route bit is set, then Timers 0 and 1 will have a different routing, and this bit field has no effect for those two timers." Therefore, Xen should not reset timer_int_route if legacy mode is enabled, regardless of what's in there. Fixes: ec40d3fe2147 ("x86/vhpet: check that the set interrupt route is valid") Signed-off-by: Tu Dinh Reviewed-by: Jan Beulich master commit: fb0e37df71a31318c61e0715ffed3e149ca8a4aa master date: 2025-11-26 12:10:21 +0100 --- xen/arch/x86/hvm/hpet.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/hvm/hpet.c b/xen/arch/x86/hvm/hpet.c index f0e5f877f4..e317ec1f5f 100644 --- a/xen/arch/x86/hvm/hpet.c +++ b/xen/arch/x86/hvm/hpet.c @@ -48,6 +48,8 @@ #define timer_is_32bit(h, n) (timer_config(h, n) & HPET_TN_32BIT) #define hpet_enabled(h) ((h)->hpet.config & HPET_CFG_ENABLE) #define timer_level(h, n) (timer_config(h, n) & HPET_TN_LEVEL) +#define timer_is_legacy(h, n) \ + (((n) <= 1) && ((h)->hpet.config & HPET_CFG_LEGACY)) #define timer_int_route(h, n) MASK_EXTR(timer_config(h, n), HPET_TN_ROUTE) @@ -55,7 +57,8 @@ MASK_EXTR(timer_config(h, n), HPET_TN_INT_ROUTE_CAP) #define timer_int_route_valid(h, n) \ - ((1u << timer_int_route(h, n)) & timer_int_route_cap(h, n)) + (timer_is_legacy(h, n) || \ + ((1u << timer_int_route(h, n)) & timer_int_route_cap(h, n))) static inline uint64_t hpet_read_maincounter(HPETState *h, uint64_t guest_time) { @@ -275,7 +278,7 @@ static void hpet_set_timer(HPETState *h, unsigned int tn, ? (uint32_t)diff : 0; destroy_periodic_time(&h->pt[tn]); - if ( (tn <= 1) && (h->hpet.config & HPET_CFG_LEGACY) ) + if ( timer_is_legacy(h, tn) ) { /* if LegacyReplacementRoute bit is set, HPET specification requires timer0 be routed to IRQ0 in NON-APIC or IRQ2 in the I/O APIC, @@ -379,6 +382,14 @@ static int cf_check hpet_write( h->hpet.config = hpet_fixup_reg(new_val, old_val, HPET_CFG_ENABLE | HPET_CFG_LEGACY); + /* + * The first 2 channels' interrupt route values only matter when + * HPET_CFG_LEGACY is disabled. However, for simplicity's sake, always + * resanitize all channels anyway. + */ + for ( i = 0; i < HPET_TIMER_NUM; i++ ) + timer_sanitize_int_route(h, i); + if ( !(old_val & HPET_CFG_ENABLE) && (new_val & HPET_CFG_ENABLE) ) { /* Enable main counter and interrupt generation. */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.19 From xen-changelog-bounces@lists.xenproject.org Wed Dec 03 14:22:24 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 03 Dec 2025 14:22:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1176868.1501320 (Exim 4.92) (envelope-from ) id 1vQnkO-0006oD-L7; Wed, 03 Dec 2025 14:22:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1176868.1501320; Wed, 03 Dec 2025 14:22:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQnkO-0006o5-IV; Wed, 03 Dec 2025 14:22:24 +0000 Received: by outflank-mailman (input) for mailman id 1176868; Wed, 03 Dec 2025 14:22:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQnkM-0006nw-Ki for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 14:22:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQnkM-004s06-1x for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 14:22:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQnkM-00DQwY-1n for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 14:22:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=s8Ke33vaBnRUFrKB7IxX5bw1B8Ysu+lXr1+VounA4/8=; b=23Ia18+1Z/wkt9+Jkh56qinK+A juyPOYNQQ5Vk+8GaA1Mjxh8iII3qOz/FUgDOQzw1B6hOtI+7uyX1ZiQMQlWQqMIU+kn/5yNOJG/hO P6DtjL4cCi0GhTnwg1dHW/twwM5KJ51YY9mlH58B8bQIOMV5B29ygz+EQxf0NQ/fsiWY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.19] x86/amd: Stop updating the Zenbleed mitigation dynamically Message-Id: Date: Wed, 03 Dec 2025 14:22:22 +0000 commit 726ce26760decd316ce6b05eac0ed815250e2e70 Author: Andrew Cooper AuthorDate: Wed Dec 3 11:46:04 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 3 11:46:04 2025 +0100 x86/amd: Stop updating the Zenbleed mitigation dynamically This was potentially helpful when the chickenbit was the only mitigation and microcode had not been released, but that was two years ago. Zenbleed microcode has been avaialble since December 2023, and the subsequent Entrysign signature vulnerability means that firmware updates block OS-loading and more OS-loadable microcode will be produced for Zen2. i.e. the Zenbleed fix is not going to appear at runtime these days. No practical change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich master commit: 5cd1ac15756ed7d9175685a3d16fc23fc86b3db4 master date: 2025-11-27 18:22:20 +0000 --- xen/arch/x86/cpu/amd.c | 2 +- xen/arch/x86/cpu/microcode/amd.c | 2 -- xen/arch/x86/include/asm/processor.h | 2 -- 3 files changed, 1 insertion(+), 5 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index c448997be5..748c7f942c 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -913,7 +913,7 @@ void __init detect_zen2_null_seg_behaviour(void) } -void amd_check_zenbleed(void) +static void amd_check_zenbleed(void) { const struct cpu_signature *sig = &this_cpu(cpu_sig); unsigned int good_rev; diff --git a/xen/arch/x86/cpu/microcode/amd.c b/xen/arch/x86/cpu/microcode/amd.c index 3fc49dc9c6..e1b931fb51 100644 --- a/xen/arch/x86/cpu/microcode/amd.c +++ b/xen/arch/x86/cpu/microcode/amd.c @@ -376,8 +376,6 @@ static int cf_check apply_microcode(const struct microcode_patch *patch) "microcode: CPU%u updated from revision %#x to %#x, date = %04x-%02x-%02x\n", cpu, old_rev, rev, patch->year, patch->month, patch->day); - amd_check_zenbleed(); - return 0; } diff --git a/xen/arch/x86/include/asm/processor.h b/xen/arch/x86/include/asm/processor.h index c02566a915..26da7f8974 100644 --- a/xen/arch/x86/include/asm/processor.h +++ b/xen/arch/x86/include/asm/processor.h @@ -502,8 +502,6 @@ enum ap_boot_method { }; extern enum ap_boot_method ap_boot_method; -void amd_check_zenbleed(void); - #endif /* !__ASSEMBLY__ */ #endif /* __ASM_X86_PROCESSOR_H */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.19 From xen-changelog-bounces@lists.xenproject.org Wed Dec 03 14:22:34 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 03 Dec 2025 14:22:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1176869.1501324 (Exim 4.92) (envelope-from ) id 1vQnkY-0006qU-Ma; Wed, 03 Dec 2025 14:22:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1176869.1501324; Wed, 03 Dec 2025 14:22:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQnkY-0006qM-K0; Wed, 03 Dec 2025 14:22:34 +0000 Received: by outflank-mailman (input) for mailman id 1176869; Wed, 03 Dec 2025 14:22:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vQnkW-0006q8-Nd for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 14:22:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vQnkW-004s0A-2G for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 14:22:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vQnkW-00DS63-29 for xen-changelog@lists.xenproject.org; Wed, 03 Dec 2025 14:22:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ttrKQzcEGznnN1CxT9Uo+YFOyvJrvPRLVwHjfnjFlMQ=; b=nCOyJQzPvP7YD3cF+89eAYGyQh X/WYsWp5eZjjJ1eZpgW8gQrTGXUr8xlsqDrU6Kfju68ZJVseBIbr/XJkTMzQpzcS2qyg6Ufv6zRC6 VQY4lKpghSFTY+HYYpDYsfnYk5HiIVuZzYSwLJcWdTvYW+9YZwL0WVjwEezRCq17/TWM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.19] x86/amd: Fix race editing DE_CFG Message-Id: Date: Wed, 03 Dec 2025 14:22:32 +0000 commit 71fd2175da7c0f8ce0edc0446915c3ff5fb31c94 Author: Andrew Cooper AuthorDate: Wed Dec 3 11:46:24 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 3 11:46:24 2025 +0100 x86/amd: Fix race editing DE_CFG We have two different functions explaining that DE_CFG is Core-scoped and that writes are racy but happen to be safe. This is only true when there's one of them. Introduce amd_init_de_cfg() to be the singular function which writes to DE_CFG, modelled after the logic we already have for BP_CFG. While reworking amd_check_zenbleed() into a simple predicate used by amd_init_de_cfg(), fix the microcode table. The 'good_rev' was specific to an individual stepping and not valid to be matched by model, let alone a range. The only CPUs incorrectly matched that I can locate appear to be pre-production, and probably didn't get Zenbleed microcode. Rework amd_init_lfence() to be amd_init_lfence_dispatch() with only the purpose of configuring X86_FEATURE_LFENCE_DISPATCH in the case that it needs synthesising. Run it on the BSP only and use setup_force_cpu_cap() to prevent the bit disappearing on a subseuqent CPUID rescan. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich master commit: d0c75dc4c028bc32fd9cf1d4358973929548de54 master date: 2025-12-01 16:20:41 +0000 --- xen/arch/x86/cpu/amd.c | 224 +++++++++++++++++++++++------------------------ xen/arch/x86/cpu/cpu.h | 3 +- xen/arch/x86/cpu/hygon.c | 6 +- 3 files changed, 115 insertions(+), 118 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index 748c7f942c..84fac6ade2 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -681,45 +681,6 @@ void cf_check early_init_amd(struct cpuinfo_x86 *c) ctxt_switch_levelling(NULL); } -void amd_init_lfence(struct cpuinfo_x86 *c) -{ - uint64_t value; - - /* - * Some hardware has LFENCE dispatch serialising always enabled, - * nothing to do on that case. - */ - if (test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability)) - return; - - /* - * Attempt to set lfence to be Dispatch Serialising. This MSR almost - * certainly isn't virtualised (and Xen at least will leak the real - * value in but silently discard writes), as well as being per-core - * rather than per-thread, so do a full safe read/write/readback cycle - * in the worst case. - */ - if (rdmsr_safe(MSR_AMD64_DE_CFG, value)) - /* Unable to read. Assume the safer default. */ - __clear_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); - else if (value & AMD64_DE_CFG_LFENCE_SERIALISE) - /* Already dispatch serialising. */ - __set_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); - else if (wrmsr_safe(MSR_AMD64_DE_CFG, - value | AMD64_DE_CFG_LFENCE_SERIALISE) || - rdmsr_safe(MSR_AMD64_DE_CFG, value) || - !(value & AMD64_DE_CFG_LFENCE_SERIALISE)) - /* Attempt to set failed. Assume the safer default. */ - __clear_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); - else - /* Successfully enabled! */ - __set_bit(X86_FEATURE_LFENCE_DISPATCH, - c->x86_capability); -} - /* * Refer to the AMD Speculative Store Bypass whitepaper: * https://developer.amd.com/wp-content/resources/124441_AMD64_SpeculativeStoreBypassDisable_Whitepaper_final.pdf @@ -913,76 +874,6 @@ void __init detect_zen2_null_seg_behaviour(void) } -static void amd_check_zenbleed(void) -{ - const struct cpu_signature *sig = &this_cpu(cpu_sig); - unsigned int good_rev; - uint64_t val, old_val, chickenbit = (1 << 9); - - /* - * If we're virtualised, we can't do family/model checks safely, and - * we likely wouldn't have access to DE_CFG even if we could see a - * microcode revision. - * - * A hypervisor may hide AVX as a stopgap mitigation. We're not in a - * position to care either way. An admin doesn't want to be disabling - * AVX as a mitigation on any build of Xen with this logic present. - */ - if (cpu_has_hypervisor || boot_cpu_data.x86 != 0x17) - return; - - switch (boot_cpu_data.x86_model) { - case 0x30 ... 0x3f: good_rev = 0x0830107a; break; - case 0x60 ... 0x67: good_rev = 0x0860010b; break; - case 0x68 ... 0x6f: good_rev = 0x08608105; break; - case 0x70 ... 0x7f: good_rev = 0x08701032; break; - case 0xa0 ... 0xaf: good_rev = 0x08a00008; break; - default: - /* - * With the Fam17h check above, most parts getting here are - * Zen1. They're not affected. Assume Zen2 ones making it - * here are affected regardless of microcode version. - */ - if (is_zen1_uarch()) - return; - good_rev = ~0U; - break; - } - - rdmsrl(MSR_AMD64_DE_CFG, val); - old_val = val; - - /* - * Microcode is the preferred mitigation, in terms of performance. - * However, without microcode, this chickenbit (specific to the Zen2 - * uarch) disables Floating Point Mov-Elimination to mitigate the - * issue. - */ - val &= ~chickenbit; - if (sig->rev < good_rev) - val |= chickenbit; - - if (val == old_val) - /* Nothing to change. */ - return; - - /* - * DE_CFG is a Core-scoped MSR, and this write is racy during late - * microcode load. However, both threads calculate the new value from - * state which is shared, and unrelated to the old value, so the - * result should be consistent. - */ - wrmsrl(MSR_AMD64_DE_CFG, val); - - /* - * Inform the admin that we changed something, but don't spam, - * especially during a late microcode load. - */ - if (smp_processor_id() == 0) - printk(XENLOG_INFO "Zenbleed mitigation - using %s\n", - val & chickenbit ? "chickenbit" : "microcode"); -} - static void cf_check fam17_disable_c6(void *arg) { /* Disable C6 by clearing the CCR{0,1,2}_CC6EN bits. */ @@ -1009,6 +900,109 @@ static void cf_check fam17_disable_c6(void *arg) wrmsrl(MSR_AMD_CSTATE_CFG, val & mask); } +static bool zenbleed_use_chickenbit(void) +{ + unsigned int curr_rev; + uint8_t fixed_rev; + + /* Zenbleed only affects Zen2. Nothing to do on non-Fam17h systems. */ + if ( boot_cpu_data.x86 != 0x17 ) + return false; + + curr_rev = this_cpu(cpu_sig).rev; + switch ( curr_rev >> 8 ) + { + case 0x083010: fixed_rev = 0x7a; break; + case 0x086001: fixed_rev = 0x0b; break; + case 0x086081: fixed_rev = 0x05; break; + case 0x087010: fixed_rev = 0x32; break; + case 0x08a000: fixed_rev = 0x08; break; + default: + /* + * With the Fam17h check above, most parts getting here are Zen1. + * They're not affected. Assume Zen2 ones making it here are affected + * regardless of microcode version. + */ + return is_zen2_uarch(); + } + + return (uint8_t)curr_rev >= fixed_rev; +} + +void amd_init_de_cfg(const struct cpuinfo_x86 *c) +{ + uint64_t val, new = 0; + + /* + * The MSR doesn't exist on Fam 0xf/0x11. If virtualised, we won't have + * mutable access even if we can read it. + */ + if ( c->x86 == 0xf || c->x86 == 0x11 || cpu_has_hypervisor ) + return; + + /* + * On Zen3 (Fam 0x19) and later CPUs, LFENCE is unconditionally dispatch + * serialising, and is enumerated in CPUID. + * + * On older systems, LFENCE is unconditionally dispatch serialising (when + * the MSR doesn't exist), or can be made so by setting this bit. + */ + if ( !test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability) ) + new |= AMD64_DE_CFG_LFENCE_SERIALISE; + + /* + * If vulnerable to Zenbleed and not mitigated in microcode, use the + * bigger hammer. + */ + if ( zenbleed_use_chickenbit() ) + new |= (1 << 9); + + /* Avoid reading DE_CFG if we don't intend to change anything. */ + if ( !new ) + return; + + rdmsrl(MSR_AMD64_DE_CFG, val); + + if ( (val & new) == new ) + return; + + /* + * DE_CFG is a Core-scoped MSR, and this write is racy. However, both + * threads calculate the new value from state which expected to be + * consistent across CPUs and unrelated to the old value, so the result + * should be consistent. + */ + wrmsrl(MSR_AMD64_DE_CFG, val | new); +} + +void __init amd_init_lfence_dispatch(void) +{ + struct cpuinfo_x86 *c = &boot_cpu_data; + uint64_t val; + + if ( test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability) ) + /* LFENCE is forced dispatch serialising and we can't control it. */ + return; + + if ( c->x86 == 0xf || c->x86 == 0x11 ) + /* MSR doesn't exist, LFENCE is dispatch serialising. */ + goto set; + + if ( rdmsr_safe(MSR_AMD64_DE_CFG, val) ) + /* Unable to read. Assume the safer default. */ + goto clear; + + if ( val & AMD64_DE_CFG_LFENCE_SERIALISE ) + goto set; + + clear: + setup_clear_cpu_cap(X86_FEATURE_LFENCE_DISPATCH); + return; + + set: + setup_force_cpu_cap(X86_FEATURE_LFENCE_DISPATCH); +} + static void amd_check_bp_cfg(void) { uint64_t val, new = 0; @@ -1053,6 +1047,11 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) unsigned long long value; + amd_init_de_cfg(c); + + if (c == &boot_cpu_data) + amd_init_lfence_dispatch(); /* Needs amd_init_de_cfg() */ + /* Disable TLB flush filter by setting HWCR.FFDIS on K8 * bit 6 of msr C001_0015 * @@ -1091,12 +1090,6 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) if (c == &boot_cpu_data && !cpu_has(c, X86_FEATURE_RSTR_FP_ERR_PTRS)) setup_force_cpu_cap(X86_BUG_FPU_PTRS); - if (c->x86 == 0x0f || c->x86 == 0x11) - /* Always dispatch serialising on this hardare. */ - __set_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability); - else /* Implicily "== 0x10 || >= 0x12" by being 64bit. */ - amd_init_lfence(c); - amd_init_ssbd(c); if (c->x86 == 0x17) @@ -1313,7 +1306,6 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) if ((smp_processor_id() == 1) && !cpu_has(c, X86_FEATURE_ITSC)) disable_c1_ramping(); - amd_check_zenbleed(); amd_check_bp_cfg(); if (fam17_c6_disabled) diff --git a/xen/arch/x86/cpu/cpu.h b/xen/arch/x86/cpu/cpu.h index 8be65e975a..129be9bfa3 100644 --- a/xen/arch/x86/cpu/cpu.h +++ b/xen/arch/x86/cpu/cpu.h @@ -20,7 +20,8 @@ extern bool detect_extended_topology(struct cpuinfo_x86 *c); void cf_check early_init_amd(struct cpuinfo_x86 *c); void amd_log_freq(const struct cpuinfo_x86 *c); -void amd_init_lfence(struct cpuinfo_x86 *c); +void amd_init_de_cfg(const struct cpuinfo_x86 *c); +void amd_init_lfence_dispatch(void); void amd_init_ssbd(const struct cpuinfo_x86 *c); void amd_init_spectral_chicken(void); void detect_zen2_null_seg_behaviour(void); diff --git a/xen/arch/x86/cpu/hygon.c b/xen/arch/x86/cpu/hygon.c index f7508cc8fc..c3faabbdb7 100644 --- a/xen/arch/x86/cpu/hygon.c +++ b/xen/arch/x86/cpu/hygon.c @@ -31,7 +31,11 @@ static void cf_check init_hygon(struct cpuinfo_x86 *c) { unsigned long long value; - amd_init_lfence(c); + amd_init_de_cfg(c); + + if (c == &boot_cpu_data) + amd_init_lfence_dispatch(); /* Needs amd_init_de_cfg() */ + amd_init_ssbd(c); /* Probe for NSCB on Zen2 CPUs when not virtualised */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.19 From xen-changelog-bounces@lists.xenproject.org Thu Dec 04 09:55:09 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 04 Dec 2025 09:55:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1177491.1501758 (Exim 4.92) (envelope-from ) id 1vR63F-0007xf-Ey; Thu, 04 Dec 2025 09:55:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1177491.1501758; Thu, 04 Dec 2025 09:55:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vR63F-0007xX-CX; Thu, 04 Dec 2025 09:55:05 +0000 Received: by outflank-mailman (input) for mailman id 1177491; Thu, 04 Dec 2025 09:55:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vR63D-0007xP-TH for xen-changelog@lists.xenproject.org; Thu, 04 Dec 2025 09:55:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vR63C-006TjC-2Q for xen-changelog@lists.xenproject.org; Thu, 04 Dec 2025 09:55:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vR63C-007yM3-2B for xen-changelog@lists.xenproject.org; Thu, 04 Dec 2025 09:55:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=rDG4cULp0u8eghw3Knsd8fNQctDZQfdlt2kGNyokw98=; b=p7K0YLAzyafKGNEu0322Ap8rp/ RBvz/Uy2FN3O4cDTv+ot5nwWC37XmoI7PhCVyWms+28V/i2JGyGTxUalE/hCRvqHZDJiBfqs0+2HO iK6/GHZYA8APN1nlwv/anJxA8kUEteJWb1vVzAXnDw9W6ROTwVh/cmFDLku+2Hf2QnPY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging-4.19] update Xen version to 4.19.4 Message-Id: Date: Thu, 04 Dec 2025 09:55:02 +0000 commit ac1c1fb9e890da2f030c3427672e6f737478700b Author: Jan Beulich AuthorDate: Thu Dec 4 10:51:21 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 4 10:51:21 2025 +0100 update Xen version to 4.19.4 --- xen/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/Makefile b/xen/Makefile index 4201eb4d16..1a484cd6e6 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -6,7 +6,7 @@ this-makefile := $(call lastword,$(MAKEFILE_LIST)) # All other places this is stored (eg. compile.h) should be autogenerated. export XEN_VERSION = 4 export XEN_SUBVERSION = 19 -export XEN_EXTRAVERSION ?= .4-pre$(XEN_VENDORVERSION) +export XEN_EXTRAVERSION ?= .4$(XEN_VENDORVERSION) export XEN_FULLVERSION = $(XEN_VERSION).$(XEN_SUBVERSION)$(XEN_EXTRAVERSION) -include xen-version -- generated by git-patchbot for /home/xen/git/xen.git#staging-4.19 From xen-changelog-bounces@lists.xenproject.org Thu Dec 04 11:22:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 04 Dec 2025 11:22:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1177563.1501813 (Exim 4.92) (envelope-from ) id 1vR7PP-0004Zi-FR; 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Thu, 04 Dec 2025 11:22:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=7/BXTGlyF5CAfgCi17y2RXgY3HhYTzDmQg1deLubnd8=; b=skUn2jOb8s86feNW5PiVZpGlUd J+xQr3x5+qQL7rdDw269PIpR5u08wVCnfKe98tehdWhVw4b2PhGKCvyJY5AFcp5ReduuQnGgZNrFr LOUz3fkmN6pbyk31hwWAEmKJKbqAUQJBMOSjcXR4Xli/+WAkx5/FJnos+IHcBhEXku6s=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.19] update Xen version to 4.19.4 Message-Id: Date: Thu, 04 Dec 2025 11:22:01 +0000 commit ac1c1fb9e890da2f030c3427672e6f737478700b Author: Jan Beulich AuthorDate: Thu Dec 4 10:51:21 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 4 10:51:21 2025 +0100 update Xen version to 4.19.4 --- xen/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/Makefile b/xen/Makefile index 4201eb4d16..1a484cd6e6 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -6,7 +6,7 @@ this-makefile := $(call lastword,$(MAKEFILE_LIST)) # All other places this is stored (eg. compile.h) should be autogenerated. export XEN_VERSION = 4 export XEN_SUBVERSION = 19 -export XEN_EXTRAVERSION ?= .4-pre$(XEN_VENDORVERSION) +export XEN_EXTRAVERSION ?= .4$(XEN_VENDORVERSION) export XEN_FULLVERSION = $(XEN_VERSION).$(XEN_SUBVERSION)$(XEN_EXTRAVERSION) -include xen-version -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.19 From xen-changelog-bounces@lists.xenproject.org Thu Dec 04 23:22:08 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 04 Dec 2025 23:22:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1178354.1502207 (Exim 4.92) (envelope-from ) id 1vRIeC-0003dr-Lb; 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Thu, 04 Dec 2025 23:22:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=gHlWVTdwpGK9YHcdYYGcMyp4GlbQDbUYao6HT1/i24g=; b=uOSltPCAFB5ZHKwNoVUi/xpgPz mFhz1DKQqUgTprCz7hVA0VM++mfrH8EGK3rAToc8tko2GdWgcRmeuAbp6YLMLaP43ZV5SXFuFpNSf i4BQ2kEl5ZQlb6Y3fV3TuxZ2/uvbjmb1/HiA2NCbXg4z3WXAua4DV7Npvj1EqZrHeSyU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] automation/eclair: add new analysis jobs with differing configurations Message-Id: Date: Thu, 04 Dec 2025 23:22:03 +0000 commit 2d9908a1d0d3285627f4bb97d1b83886d204639b Author: Nicola Vetrini AuthorDate: Mon Nov 3 20:34:04 2025 +0100 Commit: Stefano Stabellini CommitDate: Thu Dec 4 15:16:08 2025 -0800 automation/eclair: add new analysis jobs with differing configurations The following analysis jobs are performed: - eclair-{x86_64,ARM64}: analyze Xen using the default configuration for that architecture; runs on runners tagged `eclair-analysis'. - eclair-{x86-64,ARM64}-safety: analyze Xen using the configuration for safety, which is more restricted; runs on runners tagged `eclair-analysis-safety`. - eclair-{x86_64,ARM64}-testing: analyze Xen using the default configuration for the purposes of testing new runner updates; runs on runners tagged `eclair-analysis-testing`. Signed-off-by: Nicola Vetrini Reviewed-by: Stefano Stabellini --- automation/gitlab-ci/analyze.yaml | 42 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/automation/gitlab-ci/analyze.yaml b/automation/gitlab-ci/analyze.yaml index d507210067..d22d1dbbc3 100644 --- a/automation/gitlab-ci/analyze.yaml +++ b/automation/gitlab-ci/analyze.yaml @@ -45,6 +45,23 @@ eclair-x86_64: LOGFILE: "eclair-x86_64.log" VARIANT: "X86_64" RULESET: "monitored" + allow_failure: true + +eclair-x86_64-testing: + extends: eclair-x86_64 + tags: + - eclair-analysis-testing + rules: + - if: $ECLAIR_TESTING + when: always + - !reference [.eclair-analysis:triggered, rules] + +eclair-x86_64-safety: + extends: eclair-x86_64 + tags: + - eclair-analysis-safety + allow_failure: false + variables: EXTRA_XEN_CONFIG: | CONFIG_AMD=y CONFIG_INTEL=n @@ -75,6 +92,10 @@ eclair-x86_64: CONFIG_DEBUG_LOCKS=n CONFIG_SCRUB_DEBUG=n CONFIG_XMEM_POOL_POISON=n + rules: + - if: $ECLAIR_SAFETY + when: always + - !reference [.eclair-analysis:triggered, rules] eclair-ARM64: extends: .eclair-analysis:triggered @@ -82,6 +103,23 @@ eclair-ARM64: LOGFILE: "eclair-ARM64.log" VARIANT: "ARM64" RULESET: "monitored" + allow_failure: true + +eclair-ARM64-testing: + extends: eclair-ARM64 + tags: + - eclair-analysis-testing + rules: + - if: $ECLAIR_TESTING + when: always + - !reference [.eclair-analysis:triggered, rules] + +eclair-ARM64-safety: + extends: eclair-ARM64 + tags: + - eclair-analysis-safety + allow_failure: false + variables: EXTRA_XEN_CONFIG: | CONFIG_NR_CPUS=16 CONFIG_GICV2=n @@ -120,6 +158,10 @@ eclair-ARM64: CONFIG_DEBUG_LOCKS=n CONFIG_SCRUB_DEBUG=n CONFIG_XMEM_POOL_POISON=n + rules: + - if: $ECLAIR_SAFETY + when: always + - !reference [.eclair-analysis, rules] .eclair-analysis:on-schedule: extends: .eclair-analysis -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Thu Dec 04 23:22:15 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 04 Dec 2025 23:22:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1178355.1502212 (Exim 4.92) (envelope-from ) id 1vRIeN-0003fg-N7; Thu, 04 Dec 2025 23:22:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1178355.1502212; Thu, 04 Dec 2025 23:22:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRIeN-0003fY-KV; Thu, 04 Dec 2025 23:22:15 +0000 Received: by outflank-mailman (input) for mailman id 1178355; Thu, 04 Dec 2025 23:22:14 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRIeM-0003fQ-C1 for xen-changelog@lists.xenproject.org; Thu, 04 Dec 2025 23:22:14 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRIeM-006lMk-15 for xen-changelog@lists.xenproject.org; Thu, 04 Dec 2025 23:22:14 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRIeM-00AJZK-0j for xen-changelog@lists.xenproject.org; Thu, 04 Dec 2025 23:22:14 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=kFYCifchaOvIQhu8+rY4NBkkM1UHGm//xTKPqzDg/u0=; b=6V2JUYOeTX8Q6cKN/h/ChRSSnL 4vCpnckLP3GopxVkdPb3350fxebIET8KKNRHthQc0BgNABiQSculVQwB+wABfbdc0iknMpkoxZhWV mWaOU1nYlAlty/+XFXCNqsUKLNv3FvPNZnq1ZDH2lEYyiZmi0DZ7VriPKL9sQF2C9w8g=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] vgic-v3: Ignore writes to ISACTIVER{nE}N when eSPI is not used Message-Id: Date: Thu, 04 Dec 2025 23:22:14 +0000 commit 351d41e8aecc3f7566a0baa7b4066d06dedd7113 Author: Michal Orzel AuthorDate: Fri Nov 28 12:49:13 2025 +0100 Commit: Stefano Stabellini CommitDate: Thu Dec 4 15:16:38 2025 -0800 vgic-v3: Ignore writes to ISACTIVER{nE}N when eSPI is not used Prior to introducing GICv3 eSPI support, writes to these registers were ignored. Now the behavior is changed and we inject fault to the guests. According to documentation, eSPI registers are treated as RES0, when GICD_TYPER.ESPI is 0 (this would be the case when CONFIG_GICV3_ESPI=n or nr_espis is 0). Restore the previous behavior by checking whether eSPI is in use or not. Fixes: 93eecb2c4b88 ("xen/arm: vgic-v3: add emulation of GICv3.1 eSPI registers") Signed-off-by: Michal Orzel Reviewed-by: Julien Grall --- xen/arch/arm/vgic-v3.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c index 8b1c8eef80..77aab5c3c2 100644 --- a/xen/arch/arm/vgic-v3.c +++ b/xen/arch/arm/vgic-v3.c @@ -884,9 +884,18 @@ static int __vgic_v3_distr_common_mmio_write(const char *name, struct vcpu *v, "%pv: %s: unhandled word write %#"PRIregister" to ISACTIVER%d\n", v, name, r, reg - GICD_ISACTIVER); else + { +#ifdef CONFIG_GICV3_ESPI + if ( !v->domain->arch.vgic.nr_espis ) + goto write_ignore; + printk(XENLOG_G_ERR "%pv: %s: unhandled word write %#"PRIregister" to ISACTIVER%dE\n", v, name, r, reg - GICD_ISACTIVERnE); +#else + goto write_ignore; +#endif + } return 0; case VRANGE32(GICD_ICACTIVER, GICD_ICACTIVERN): -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Fri Dec 05 01:33:10 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 05 Dec 2025 01:33:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1178406.1502235 (Exim 4.92) (envelope-from ) id 1vRKgy-00034c-5E; Fri, 05 Dec 2025 01:33:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1178406.1502235; Fri, 05 Dec 2025 01:33:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRKgy-00034U-2p; Fri, 05 Dec 2025 01:33:04 +0000 Received: by outflank-mailman (input) for mailman id 1178406; Fri, 05 Dec 2025 01:33:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRKgw-00034O-N1 for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 01:33:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRKgw-007zUD-1Q for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 01:33:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRKgw-003cvX-1C for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 01:33:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=y86bgr1kOedFvtcNjPifdD4DzJiH1n7PnQKoRnEsL/Q=; b=guwSp5eIUGqgzUdLrPra7Jm2zG lZJl7jl3rmiyj8Vp9LOmoedI9sMh+NME2RQde6yRg1S+LDlqacaIRgpUkan9cSTf0c8gAtcpGFrDm 4p5asZPkExUAtqu1E4aFt0a5zpftH0WFvlH9/5i4cko86ycD751IaBUs/NVMKe9LmBk8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation/eclair: add new analysis jobs with differing configurations Message-Id: Date: Fri, 05 Dec 2025 01:33:02 +0000 commit 2d9908a1d0d3285627f4bb97d1b83886d204639b Author: Nicola Vetrini AuthorDate: Mon Nov 3 20:34:04 2025 +0100 Commit: Stefano Stabellini CommitDate: Thu Dec 4 15:16:08 2025 -0800 automation/eclair: add new analysis jobs with differing configurations The following analysis jobs are performed: - eclair-{x86_64,ARM64}: analyze Xen using the default configuration for that architecture; runs on runners tagged `eclair-analysis'. - eclair-{x86-64,ARM64}-safety: analyze Xen using the configuration for safety, which is more restricted; runs on runners tagged `eclair-analysis-safety`. - eclair-{x86_64,ARM64}-testing: analyze Xen using the default configuration for the purposes of testing new runner updates; runs on runners tagged `eclair-analysis-testing`. Signed-off-by: Nicola Vetrini Reviewed-by: Stefano Stabellini --- automation/gitlab-ci/analyze.yaml | 42 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/automation/gitlab-ci/analyze.yaml b/automation/gitlab-ci/analyze.yaml index d507210067..d22d1dbbc3 100644 --- a/automation/gitlab-ci/analyze.yaml +++ b/automation/gitlab-ci/analyze.yaml @@ -45,6 +45,23 @@ eclair-x86_64: LOGFILE: "eclair-x86_64.log" VARIANT: "X86_64" RULESET: "monitored" + allow_failure: true + +eclair-x86_64-testing: + extends: eclair-x86_64 + tags: + - eclair-analysis-testing + rules: + - if: $ECLAIR_TESTING + when: always + - !reference [.eclair-analysis:triggered, rules] + +eclair-x86_64-safety: + extends: eclair-x86_64 + tags: + - eclair-analysis-safety + allow_failure: false + variables: EXTRA_XEN_CONFIG: | CONFIG_AMD=y CONFIG_INTEL=n @@ -75,6 +92,10 @@ eclair-x86_64: CONFIG_DEBUG_LOCKS=n CONFIG_SCRUB_DEBUG=n CONFIG_XMEM_POOL_POISON=n + rules: + - if: $ECLAIR_SAFETY + when: always + - !reference [.eclair-analysis:triggered, rules] eclair-ARM64: extends: .eclair-analysis:triggered @@ -82,6 +103,23 @@ eclair-ARM64: LOGFILE: "eclair-ARM64.log" VARIANT: "ARM64" RULESET: "monitored" + allow_failure: true + +eclair-ARM64-testing: + extends: eclair-ARM64 + tags: + - eclair-analysis-testing + rules: + - if: $ECLAIR_TESTING + when: always + - !reference [.eclair-analysis:triggered, rules] + +eclair-ARM64-safety: + extends: eclair-ARM64 + tags: + - eclair-analysis-safety + allow_failure: false + variables: EXTRA_XEN_CONFIG: | CONFIG_NR_CPUS=16 CONFIG_GICV2=n @@ -120,6 +158,10 @@ eclair-ARM64: CONFIG_DEBUG_LOCKS=n CONFIG_SCRUB_DEBUG=n CONFIG_XMEM_POOL_POISON=n + rules: + - if: $ECLAIR_SAFETY + when: always + - !reference [.eclair-analysis, rules] .eclair-analysis:on-schedule: extends: .eclair-analysis -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Dec 05 01:33:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 05 Dec 2025 01:33:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1178407.1502240 (Exim 4.92) (envelope-from ) id 1vRKh7-00035x-6f; Fri, 05 Dec 2025 01:33:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1178407.1502240; Fri, 05 Dec 2025 01:33:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRKh7-00035p-42; Fri, 05 Dec 2025 01:33:13 +0000 Received: by outflank-mailman (input) for mailman id 1178407; Fri, 05 Dec 2025 01:33:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRKh6-00035f-K0 for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 01:33:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRKh6-007zUJ-1r for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 01:33:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRKh6-003djN-1f for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 01:33:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=gAzRlkTdCtIfaEi4cKibKhczKMo95u8LWZLnnaonkZY=; b=ul/Qa9YXPyqpKvoBBW/OLfMgMv f1ZYBd/msgX4U4EfO1nKJDXNuboWqKMqz+YB7JSDo9tXTZNOlQq/v6FTi4cUlK+6aadpd7LgCuzms IJVqVDSJt5x9Z8z6yB9N8PQVkSv1HZUpQl8dhYGXS+FMlYrXn1sQUx2u0R5HZRXYt0ig=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] vgic-v3: Ignore writes to ISACTIVER{nE}N when eSPI is not used Message-Id: Date: Fri, 05 Dec 2025 01:33:12 +0000 commit 351d41e8aecc3f7566a0baa7b4066d06dedd7113 Author: Michal Orzel AuthorDate: Fri Nov 28 12:49:13 2025 +0100 Commit: Stefano Stabellini CommitDate: Thu Dec 4 15:16:38 2025 -0800 vgic-v3: Ignore writes to ISACTIVER{nE}N when eSPI is not used Prior to introducing GICv3 eSPI support, writes to these registers were ignored. Now the behavior is changed and we inject fault to the guests. According to documentation, eSPI registers are treated as RES0, when GICD_TYPER.ESPI is 0 (this would be the case when CONFIG_GICV3_ESPI=n or nr_espis is 0). Restore the previous behavior by checking whether eSPI is in use or not. Fixes: 93eecb2c4b88 ("xen/arm: vgic-v3: add emulation of GICv3.1 eSPI registers") Signed-off-by: Michal Orzel Reviewed-by: Julien Grall --- xen/arch/arm/vgic-v3.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c index 8b1c8eef80..77aab5c3c2 100644 --- a/xen/arch/arm/vgic-v3.c +++ b/xen/arch/arm/vgic-v3.c @@ -884,9 +884,18 @@ static int __vgic_v3_distr_common_mmio_write(const char *name, struct vcpu *v, "%pv: %s: unhandled word write %#"PRIregister" to ISACTIVER%d\n", v, name, r, reg - GICD_ISACTIVER); else + { +#ifdef CONFIG_GICV3_ESPI + if ( !v->domain->arch.vgic.nr_espis ) + goto write_ignore; + printk(XENLOG_G_ERR "%pv: %s: unhandled word write %#"PRIregister" to ISACTIVER%dE\n", v, name, r, reg - GICD_ISACTIVERnE); +#else + goto write_ignore; +#endif + } return 0; case VRANGE32(GICD_ICACTIVER, GICD_ICACTIVERN): -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Dec 05 21:33:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 05 Dec 2025 21:33:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179512.1502974 (Exim 4.92) (envelope-from ) id 1vRdQF-0008MJ-07; Fri, 05 Dec 2025 21:33:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1179512.1502974; Fri, 05 Dec 2025 21:33:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRdQE-0008MB-TH; Fri, 05 Dec 2025 21:33:02 +0000 Received: by outflank-mailman (input) for mailman id 1179512; Fri, 05 Dec 2025 21:33:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRdQE-0008M5-8z for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 21:33:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRdQD-008Q5K-2n for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 21:33:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRdQD-006MOo-2T for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 21:33:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=pUSkEn+idw0QWHSTjF6hNQcOxZfgxQMTT//OOKOMISA=; b=W5LHPEonIdBmIh6P4KQ7oDBsfE MQMeod29A1ky5h3xbDHGlrwL22XiJySKt3QprA5gpjTFnndEYKqj5R+1BC9TIGVFqxo5USEd/2Fop 9npqOLQJjn7Vym3x6zE2P4ZkdzHFIKX55/b3+ux8BWk+PCO8DBxjwXLhJ1u7ZF8s9A48=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/treewide: Use __ASSEMBLER__ instead of __ASSEMBLY__ Message-Id: Date: Fri, 05 Dec 2025 21:33:01 +0000 commit a199bb283bdb2a99d795d5f9c85d7fb9a68039a9 Author: Andrew Cooper AuthorDate: Tue Dec 2 17:28:37 2025 +0000 Commit: Andrew Cooper CommitDate: Fri Dec 5 18:06:19 2025 +0000 xen/treewide: Use __ASSEMBLER__ instead of __ASSEMBLY__ __ASSEMBLER__ is how GCC and Clang spell this, removing the need to set it up manually in AFLAGS. Signed-off-by: Andrew Cooper Reviewed-by: Alejandro Vallejo Reviewed-by: Oleksii Kurochko Acked-by: Jan Beulich Acked-by: Bertrand Marquis --- xen/Makefile | 2 -- xen/arch/arm/arm32/lib/assembler.h | 2 +- xen/arch/arm/arm64/lib/assembler.h | 2 +- xen/arch/arm/include/asm/alternative.h | 4 ++-- xen/arch/arm/include/asm/arm32/mpu.h | 4 ++-- xen/arch/arm/include/asm/arm32/page.h | 4 ++-- xen/arch/arm/include/asm/arm32/processor.h | 2 +- xen/arch/arm/include/asm/arm32/sysregs.h | 6 +++--- xen/arch/arm/include/asm/arm64/efibind.h | 2 +- xen/arch/arm/include/asm/arm64/mpu.h | 4 ++-- xen/arch/arm/include/asm/arm64/page.h | 4 ++-- xen/arch/arm/include/asm/arm64/processor.h | 4 ++-- xen/arch/arm/include/asm/arm64/sysregs.h | 6 +++--- xen/arch/arm/include/asm/config.h | 4 ++-- xen/arch/arm/include/asm/cpufeature.h | 4 ++-- xen/arch/arm/include/asm/current.h | 2 +- xen/arch/arm/include/asm/fixmap.h | 4 ++-- xen/arch/arm/include/asm/gic.h | 4 ++-- xen/arch/arm/include/asm/insn.h | 4 ++-- xen/arch/arm/include/asm/lpae.h | 4 ++-- xen/arch/arm/include/asm/macros.h | 2 +- xen/arch/arm/include/asm/mpu.h | 4 ++-- xen/arch/arm/include/asm/page.h | 4 ++-- xen/arch/arm/include/asm/pl011-uart.h | 4 ++-- xen/arch/arm/include/asm/processor.h | 8 ++++---- xen/arch/arm/include/asm/regs.h | 2 +- xen/arch/arm/include/asm/smccc.h | 4 ++-- xen/arch/arm/include/asm/smp.h | 2 +- xen/arch/arm/include/asm/sysregs.h | 4 ++-- xen/arch/ppc/include/asm/current.h | 4 ++-- xen/arch/ppc/include/asm/opal-api.h | 4 ++-- xen/arch/ppc/include/asm/processor.h | 4 ++-- xen/arch/riscv/include/asm/asm.h | 6 +++--- xen/arch/riscv/include/asm/bug.h | 4 ++-- xen/arch/riscv/include/asm/config.h | 4 ++-- xen/arch/riscv/include/asm/cpufeature.h | 4 ++-- xen/arch/riscv/include/asm/csr.h | 4 ++-- xen/arch/riscv/include/asm/current.h | 4 ++-- xen/arch/riscv/include/asm/fixmap.h | 4 ++-- xen/arch/riscv/include/asm/page.h | 4 ++-- xen/arch/riscv/include/asm/processor.h | 4 ++-- xen/arch/riscv/include/asm/regs.h | 4 ++-- xen/arch/riscv/include/asm/system.h | 4 ++-- xen/arch/riscv/include/asm/traps.h | 4 ++-- xen/arch/x86/boot/video.h | 4 ++-- xen/arch/x86/include/asm/alternative-asm.h | 4 ++-- xen/arch/x86/include/asm/alternative.h | 4 ++-- xen/arch/x86/include/asm/asm_defns.h | 12 ++++++------ xen/arch/x86/include/asm/bug.h | 6 +++--- xen/arch/x86/include/asm/cache.h | 2 +- xen/arch/x86/include/asm/config.h | 6 +++--- xen/arch/x86/include/asm/cpufeature.h | 6 +++--- xen/arch/x86/include/asm/cpufeatureset.h | 6 +++--- xen/arch/x86/include/asm/desc.h | 8 ++++---- xen/arch/x86/include/asm/edd.h | 4 ++-- xen/arch/x86/include/asm/fixmap.h | 4 ++-- xen/arch/x86/include/asm/ldt.h | 4 ++-- xen/arch/x86/include/asm/machine_kexec.h | 2 +- xen/arch/x86/include/asm/nops.h | 2 +- xen/arch/x86/include/asm/page.h | 20 ++++++++++---------- xen/arch/x86/include/asm/processor.h | 6 +++--- xen/arch/x86/include/asm/smp.h | 6 +++--- xen/arch/x86/include/asm/spec_ctrl.h | 4 ++-- xen/arch/x86/include/asm/spec_ctrl_asm.h | 4 ++-- xen/arch/x86/include/asm/trampoline.h | 4 ++-- xen/arch/x86/include/asm/x86_64/page.h | 6 +++--- xen/common/efi/boot.c | 6 +++--- xen/include/efi/pe.h | 4 ++-- xen/include/public/arch-arm.h | 4 ++-- xen/include/public/arch-ppc.h | 4 ++-- xen/include/public/arch-riscv.h | 2 +- xen/include/public/arch-x86/xen-mca.h | 4 ++-- xen/include/public/arch-x86/xen-x86_32.h | 4 ++-- xen/include/public/arch-x86/xen-x86_64.h | 4 ++-- xen/include/public/arch-x86/xen.h | 8 ++++---- xen/include/public/errno.h | 6 +++--- xen/include/public/tmem.h | 2 +- xen/include/public/xen.h | 10 +++++----- xen/include/xen/acpi.h | 4 ++-- xen/include/xen/bitmap.h | 4 ++-- xen/include/xen/bug.h | 4 ++-- xen/include/xen/config.h | 2 +- xen/include/xen/const.h | 2 +- xen/include/xen/err.h | 4 ++-- xen/include/xen/errno.h | 6 +++--- xen/include/xen/init.h | 4 ++-- xen/include/xen/kimage.h | 4 ++-- xen/include/xen/lib.h | 4 ++-- xen/include/xen/libfdt/fdt.h | 2 +- xen/include/xen/linkage.h | 4 ++-- xen/include/xen/macros.h | 4 ++-- xen/include/xen/multiboot.h | 4 ++-- xen/include/xen/multiboot2.h | 4 ++-- xen/include/xen/percpu.h | 4 ++-- xen/include/xen/pmap.h | 4 ++-- xen/include/xen/softirq.h | 4 ++-- 96 files changed, 208 insertions(+), 210 deletions(-) diff --git a/xen/Makefile b/xen/Makefile index fc9244420e..e6cf287425 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -412,8 +412,6 @@ ifneq ($(CONFIG_CC_IS_CLANG),y) CFLAGS += -Wa,--strip-local-absolute endif -AFLAGS += -D__ASSEMBLY__ - $(call cc-option-add,AFLAGS,CC,-Wa$$(comma)--noexecstack) LDFLAGS-$(call ld-option,--warn-rwx-segments) += --no-warn-rwx-segments diff --git a/xen/arch/arm/arm32/lib/assembler.h b/xen/arch/arm/arm32/lib/assembler.h index 6de2638a36..75d97ab0cc 100644 --- a/xen/arch/arm/arm32/lib/assembler.h +++ b/xen/arch/arm/arm32/lib/assembler.h @@ -17,7 +17,7 @@ #ifndef __ASM_ASSEMBLER_H__ #define __ASM_ASSEMBLER_H__ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #error "Only include this from assembly code" #endif diff --git a/xen/arch/arm/arm64/lib/assembler.h b/xen/arch/arm/arm64/lib/assembler.h index 3f9c0dcf5d..0fac7d1c6e 100644 --- a/xen/arch/arm/arm64/lib/assembler.h +++ b/xen/arch/arm/arm64/lib/assembler.h @@ -1,7 +1,7 @@ #ifndef __ASM_ASSEMBLER_H__ #define __ASM_ASSEMBLER_H__ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #error "Only include this from assembly code" #endif diff --git a/xen/arch/arm/include/asm/alternative.h b/xen/arch/arm/include/asm/alternative.h index 1563f03a0f..c751e11fc5 100644 --- a/xen/arch/arm/include/asm/alternative.h +++ b/xen/arch/arm/include/asm/alternative.h @@ -6,7 +6,7 @@ #define ARM_CB_PATCH ARM_NCAPS -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -206,7 +206,7 @@ alternative_endif #define _ALTERNATIVE_CFG(insn1, insn2, cap, cfg, ...) \ alternative_insn insn1, insn2, cap, IS_ENABLED(cfg) -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ /* * Usage: asm_inline (ALTERNATIVE(oldinstr, newinstr, feature)); diff --git a/xen/arch/arm/include/asm/arm32/mpu.h b/xen/arch/arm/include/asm/arm32/mpu.h index 137022d922..2cf0f8cbac 100644 --- a/xen/arch/arm/include/asm/arm32/mpu.h +++ b/xen/arch/arm/include/asm/arm32/mpu.h @@ -3,7 +3,7 @@ #ifndef ARM_ARM32_MPU_H #define ARM_ARM32_MPU_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* * Unlike arm64, there are no reserved 0 bits beyond base and limit bitfield in @@ -43,7 +43,7 @@ typedef struct { uint8_t pad[7]; /* Pad structure to 16 Bytes */ } pr_t; -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* ARM_ARM32_MPU_H */ diff --git a/xen/arch/arm/include/asm/arm32/page.h b/xen/arch/arm/include/asm/arm32/page.h index 6d1ff0636c..d3e86cb61e 100644 --- a/xen/arch/arm/include/asm/arm32/page.h +++ b/xen/arch/arm/include/asm/arm32/page.h @@ -1,7 +1,7 @@ #ifndef __ARM_ARM32_PAGE_H__ #define __ARM_ARM32_PAGE_H__ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* Inline ASM to invalidate dcache on register R (may be an inline asm operand) */ #define __invalidate_dcache_one(R) STORE_CP32(R, DCIMVAC) @@ -87,7 +87,7 @@ static inline uint64_t gva_to_ipa_par(vaddr_t va, unsigned int flags) #define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __ARM_ARM32_PAGE_H__ */ diff --git a/xen/arch/arm/include/asm/arm32/processor.h b/xen/arch/arm/include/asm/arm32/processor.h index 4e679f3273..254bc4867c 100644 --- a/xen/arch/arm/include/asm/arm32/processor.h +++ b/xen/arch/arm/include/asm/arm32/processor.h @@ -3,7 +3,7 @@ #define ACTLR_CAXX_SMP (1<<6) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* On stack VCPU state */ struct cpu_user_regs { diff --git a/xen/arch/arm/include/asm/arm32/sysregs.h b/xen/arch/arm/include/asm/arm32/sysregs.h index ef1a870fd6..33ac0c4fdb 100644 --- a/xen/arch/arm/include/asm/arm32/sysregs.h +++ b/xen/arch/arm/include/asm/arm32/sysregs.h @@ -25,11 +25,11 @@ #define REGION_DATA_PRBAR 0x19 /* SH=11 AP=00 XN=1 */ #define REGION_DEVICE_PRBAR 0x11 /* SH=10 AP=00 XN=1 */ -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #define WRITE_SYSREG_ASM(v, name) mcr CP32(v, name) -#else /* __ASSEMBLY__ */ +#else /* __ASSEMBLER__ */ /* C wrappers */ #define READ_CP32(name...) ({ \ @@ -93,7 +93,7 @@ /* MVFR2 is not defined on ARMv7 */ #define MVFR2_MAYBE_UNDEFINED -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* __ASM_ARM_ARM32_SYSREGS_H */ /* diff --git a/xen/arch/arm/include/asm/arm64/efibind.h b/xen/arch/arm/include/asm/arm64/efibind.h index a1323d452e..7ab00e4f55 100644 --- a/xen/arch/arm/include/asm/arm64/efibind.h +++ b/xen/arch/arm/include/asm/arm64/efibind.h @@ -31,7 +31,7 @@ Revision History #define EFI_STUB_ERROR MAX_ADDRESS -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ // // Basic int types of various widths // diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h index 17f62ccaf6..4f694190a8 100644 --- a/xen/arch/arm/include/asm/arm64/mpu.h +++ b/xen/arch/arm/include/asm/arm64/mpu.h @@ -3,7 +3,7 @@ #ifndef ARM_ARM64_MPU_H #define ARM_ARM64_MPU_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #define MPU_REGION_RES0 (0xFFFFULL << 48) @@ -42,7 +42,7 @@ typedef struct { uint8_t pad[15]; /* Pad structure to 32 Bytes */ } pr_t; -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* ARM_ARM64_MPU_H */ diff --git a/xen/arch/arm/include/asm/arm64/page.h b/xen/arch/arm/include/asm/arm64/page.h index e944985ee0..f3ba30730b 100644 --- a/xen/arch/arm/include/asm/arm64/page.h +++ b/xen/arch/arm/include/asm/arm64/page.h @@ -1,7 +1,7 @@ #ifndef __ARM_ARM64_PAGE_H__ #define __ARM_ARM64_PAGE_H__ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include @@ -77,7 +77,7 @@ static inline uint64_t gva_to_ipa_par(vaddr_t va, unsigned int flags) extern void clear_page(void *to); -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __ARM_ARM64_PAGE_H__ */ diff --git a/xen/arch/arm/include/asm/arm64/processor.h b/xen/arch/arm/include/asm/arm64/processor.h index c749f80ad9..0513015bbb 100644 --- a/xen/arch/arm/include/asm/arm64/processor.h +++ b/xen/arch/arm/include/asm/arm64/processor.h @@ -1,7 +1,7 @@ #ifndef __ASM_ARM_ARM64_PROCESSOR_H #define __ASM_ARM_ARM64_PROCESSOR_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* Anonymous union includes both 32- and 64-bit names (e.g., r0/x0). */ @@ -86,7 +86,7 @@ struct cpu_user_regs #undef __DECL_REG -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __ASM_ARM_ARM64_PROCESSOR_H */ /* diff --git a/xen/arch/arm/include/asm/arm64/sysregs.h b/xen/arch/arm/include/asm/arm64/sysregs.h index 7440d495e4..7dfd20414d 100644 --- a/xen/arch/arm/include/asm/arm64/sysregs.h +++ b/xen/arch/arm/include/asm/arm64/sysregs.h @@ -467,11 +467,11 @@ #define REGION_DATA_PRBAR 0x32 /* SH=11 AP=00 XN=10 */ #define REGION_DEVICE_PRBAR 0x22 /* SH=10 AP=00 XN=10 */ -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #define WRITE_SYSREG_ASM(v, name) "msr " __stringify(name,) #v -#else /* __ASSEMBLY__ */ +#else /* __ASSEMBLER__ */ /* Access to system registers */ @@ -492,7 +492,7 @@ #define WRITE_SYSREG_LR(v, index) WRITE_SYSREG(v, ICH_LR_REG(index)) #define READ_SYSREG_LR(index) READ_SYSREG(ICH_LR_REG(index)) -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* _ASM_ARM_ARM64_SYSREGS_H */ diff --git a/xen/arch/arm/include/asm/config.h b/xen/arch/arm/include/asm/config.h index f18825bc2d..a077ec49b7 100644 --- a/xen/arch/arm/include/asm/config.h +++ b/xen/arch/arm/include/asm/config.h @@ -44,7 +44,7 @@ #define CONFIG_AEABI /* Linkage for ARM */ -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #define GLOBAL(name) \ .globl name; \ name: @@ -69,7 +69,7 @@ #define watchdog_disable() ((void)0) #define watchdog_enable() ((void)0) -#if defined(__ASSEMBLY__) && !defined(LINKER_SCRIPT) +#if defined(__ASSEMBLER__) && !defined(LINKER_SCRIPT) #include #include #endif diff --git a/xen/arch/arm/include/asm/cpufeature.h b/xen/arch/arm/include/asm/cpufeature.h index b6df188011..13353c8e1a 100644 --- a/xen/arch/arm/include/asm/cpufeature.h +++ b/xen/arch/arm/include/asm/cpufeature.h @@ -79,7 +79,7 @@ #define ARM_NCAPS 18 -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -461,7 +461,7 @@ extern struct cpuinfo_arm cpu_data[]; extern struct cpuinfo_arm domain_cpuinfo; -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* diff --git a/xen/arch/arm/include/asm/current.h b/xen/arch/arm/include/asm/current.h index 0be7ad6ef9..8254363fda 100644 --- a/xen/arch/arm/include/asm/current.h +++ b/xen/arch/arm/include/asm/current.h @@ -11,7 +11,7 @@ #define CPUINFO_WORKAROUND_2_FLAG_SHIFT 0 #define CPUINFO_WORKAROUND_2_FLAG (_AC(1, U) << CPUINFO_WORKAROUND_2_FLAG_SHIFT) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ struct vcpu; diff --git a/xen/arch/arm/include/asm/fixmap.h b/xen/arch/arm/include/asm/fixmap.h index 0cb5d54d1c..84d55e4c28 100644 --- a/xen/arch/arm/include/asm/fixmap.h +++ b/xen/arch/arm/include/asm/fixmap.h @@ -20,7 +20,7 @@ #define FIXADDR_START FIXMAP_ADDR(0) #define FIXADDR_TOP FIXMAP_ADDR(FIX_LAST + 1) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* * Direct access to xen_fixmap[] should only happen when {set, @@ -43,6 +43,6 @@ static inline unsigned int virt_to_fix(vaddr_t vaddr) return ((vaddr - FIXADDR_START) >> PAGE_SHIFT); } -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __ASM_FIXMAP_H */ diff --git a/xen/arch/arm/include/asm/gic.h b/xen/arch/arm/include/asm/gic.h index 3947c8634d..8e713aa477 100644 --- a/xen/arch/arm/include/asm/gic.h +++ b/xen/arch/arm/include/asm/gic.h @@ -158,7 +158,7 @@ #define GICH_LR_PENDING 1 #define GICH_LR_ACTIVE 2 -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -479,7 +479,7 @@ unsigned long gic_get_hwdom_madt_size(const struct domain *d); int gic_map_hwdom_extra_mappings(struct domain *d); int gic_iomem_deny_access(struct domain *d); -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* diff --git a/xen/arch/arm/include/asm/insn.h b/xen/arch/arm/include/asm/insn.h index 27271e95f9..db32babd23 100644 --- a/xen/arch/arm/include/asm/insn.h +++ b/xen/arch/arm/include/asm/insn.h @@ -1,7 +1,7 @@ #ifndef __ARCH_ARM_INSN #define __ARCH_ARM_INSN -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include @@ -13,7 +13,7 @@ # error "unknown ARM variant" #endif -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ /* On ARM32,64 instructions are always 4 bytes long. */ #define ARCH_PATCH_INSN_SIZE 4 diff --git a/xen/arch/arm/include/asm/lpae.h b/xen/arch/arm/include/asm/lpae.h index 4a1679cb33..8e062c9e37 100644 --- a/xen/arch/arm/include/asm/lpae.h +++ b/xen/arch/arm/include/asm/lpae.h @@ -1,7 +1,7 @@ #ifndef __ARM_LPAE_H__ #define __ARM_LPAE_H__ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -176,7 +176,7 @@ static inline bool lpae_is_superpage(lpae_t pte, unsigned int level) */ lpae_t mfn_to_xen_entry(mfn_t mfn, unsigned int attr); -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ /* * AArch64 supports pages with different sizes (4K, 16K, and 64K). diff --git a/xen/arch/arm/include/asm/macros.h b/xen/arch/arm/include/asm/macros.h index dc791245df..9e8793107e 100644 --- a/xen/arch/arm/include/asm/macros.h +++ b/xen/arch/arm/include/asm/macros.h @@ -1,7 +1,7 @@ #ifndef __ASM_MACROS_H #define __ASM_MACROS_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ # error "This file should only be included in assembly file" #endif diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h index 5053edaf63..72fa5b00b8 100644 --- a/xen/arch/arm/include/asm/mpu.h +++ b/xen/arch/arm/include/asm/mpu.h @@ -25,7 +25,7 @@ #define PRENR_MASK GENMASK(31, 0) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* * Set base address of MPU protection region. @@ -87,7 +87,7 @@ static inline bool region_is_valid(const pr_t *pr) return pr->prlar.reg.en; } -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __ARM_MPU_H__ */ diff --git a/xen/arch/arm/include/asm/page.h b/xen/arch/arm/include/asm/page.h index 03bdf52ce0..90100a96df 100644 --- a/xen/arch/arm/include/asm/page.h +++ b/xen/arch/arm/include/asm/page.h @@ -121,7 +121,7 @@ #define GV2M_WRITE (1u<<0) #define GV2M_EXEC (1u<<1) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -320,7 +320,7 @@ static inline int gva_to_ipa(vaddr_t va, paddr_t *paddr, unsigned int flags) /* Bits in the PAR returned by va_to_par */ #define PAR_FAULT 0x1 -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __ARM_PAGE_H__ */ diff --git a/xen/arch/arm/include/asm/pl011-uart.h b/xen/arch/arm/include/asm/pl011-uart.h index 27c9bfa444..a991b274cd 100644 --- a/xen/arch/arm/include/asm/pl011-uart.h +++ b/xen/arch/arm/include/asm/pl011-uart.h @@ -21,7 +21,7 @@ #ifndef __ASM_ARM_PL011_H #define __ASM_ARM_PL011_H -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ /* * PL011 registers are 8/16-bit wide. However, there are implementations that @@ -38,7 +38,7 @@ #define PL011_LDRH ldrh #endif -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ /* PL011 register addresses */ #define DR (0x00) diff --git a/xen/arch/arm/include/asm/processor.h b/xen/arch/arm/include/asm/processor.h index 92c8bc1a31..ed56746368 100644 --- a/xen/arch/arm/include/asm/processor.h +++ b/xen/arch/arm/include/asm/processor.h @@ -1,7 +1,7 @@ #ifndef __ASM_ARM_PROCESSOR_H #define __ASM_ARM_PROCESSOR_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #endif #include @@ -463,7 +463,7 @@ #define MM64_VMID_16_BITS_SUPPORT 0x2 #endif -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ extern register_t __cpu_logical_map[]; #define cpu_logical_map(cpu) __cpu_logical_map[cpu] @@ -570,7 +570,7 @@ extern register_t __cpu_logical_map[]; # error "unknown ARM variant" #endif -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ void noreturn panic_PAR(uint64_t par); /* Debugging functions are declared with external linkage to aid development. */ @@ -631,7 +631,7 @@ register_t get_default_cptr_flags(void); WRITE_SYSREG((v)->arch.hcr_el2, HCR_EL2); \ } while (0) -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __ASM_ARM_PROCESSOR_H */ /* * Local variables: diff --git a/xen/arch/arm/include/asm/regs.h b/xen/arch/arm/include/asm/regs.h index 0d9f239a77..490db9056d 100644 --- a/xen/arch/arm/include/asm/regs.h +++ b/xen/arch/arm/include/asm/regs.h @@ -3,7 +3,7 @@ #define PSR_MODE_MASK 0x1f -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include diff --git a/xen/arch/arm/include/asm/smccc.h b/xen/arch/arm/include/asm/smccc.h index a289c48b7f..441b3ab65d 100644 --- a/xen/arch/arm/include/asm/smccc.h +++ b/xen/arch/arm/include/asm/smccc.h @@ -54,7 +54,7 @@ #define ARM_SMCCC_FUNC_MASK _AC(0xFFFF,U) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ extern uint32_t smccc_ver; @@ -307,7 +307,7 @@ void arm_smccc_1_2_smc(const struct arm_smccc_1_2_regs *args, struct arm_smccc_1_2_regs *res); #endif /* CONFIG_ARM_64 */ -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ /* * Construct function identifier from call type (fast or standard), diff --git a/xen/arch/arm/include/asm/smp.h b/xen/arch/arm/include/asm/smp.h index f5c829e229..16ae0844e7 100644 --- a/xen/arch/arm/include/asm/smp.h +++ b/xen/arch/arm/include/asm/smp.h @@ -1,7 +1,7 @@ #ifndef __ASM_SMP_H #define __ASM_SMP_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include #include diff --git a/xen/arch/arm/include/asm/sysregs.h b/xen/arch/arm/include/asm/sysregs.h index 5c2d362be3..f6af987ef5 100644 --- a/xen/arch/arm/include/asm/sysregs.h +++ b/xen/arch/arm/include/asm/sysregs.h @@ -9,7 +9,7 @@ # error "unknown ARM variant" #endif -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include @@ -33,7 +33,7 @@ static inline register_t read_sysreg_par(void) return par_el1; } -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* __ASM_ARM_SYSREGS_H */ /* diff --git a/xen/arch/ppc/include/asm/current.h b/xen/arch/ppc/include/asm/current.h index e329a548e6..cd7af3e0c5 100644 --- a/xen/arch/ppc/include/asm/current.h +++ b/xen/arch/ppc/include/asm/current.h @@ -6,7 +6,7 @@ #include -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ struct vcpu; @@ -44,6 +44,6 @@ static inline struct cpu_info *get_cpu_info(void) #define get_per_cpu_offset() smp_processor_id() /* TODO: Fix this */ -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __ASM_PPC_CURRENT_H__ */ diff --git a/xen/arch/ppc/include/asm/opal-api.h b/xen/arch/ppc/include/asm/opal-api.h index 8790246f48..a83184a5c2 100644 --- a/xen/arch/ppc/include/asm/opal-api.h +++ b/xen/arch/ppc/include/asm/opal-api.h @@ -246,7 +246,7 @@ #define OPAL_CONFIG_IDLE_UNDO 0 #define OPAL_CONFIG_IDLE_APPLY 1 -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include @@ -1185,6 +1185,6 @@ struct opal_mpipl_fadump { struct opal_mpipl_region region[]; } __packed; -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __OPAL_API_H */ diff --git a/xen/arch/ppc/include/asm/processor.h b/xen/arch/ppc/include/asm/processor.h index 50161cc32d..242346cab9 100644 --- a/xen/arch/ppc/include/asm/processor.h +++ b/xen/arch/ppc/include/asm/processor.h @@ -134,7 +134,7 @@ /* Base address of interrupt vector table when LPCR[AIL]=3 */ #define AIL_VECTOR_BASE _AC(0xc000000000004000, UL) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include @@ -221,6 +221,6 @@ static inline void noreturn die(void) #define dump_execution_state() run_in_exception_handler(show_execution_state) -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* _ASM_PPC_PROCESSOR_H */ diff --git a/xen/arch/riscv/include/asm/asm.h b/xen/arch/riscv/include/asm/asm.h index 8b0403e2e4..e147b6f053 100644 --- a/xen/arch/riscv/include/asm/asm.h +++ b/xen/arch/riscv/include/asm/asm.h @@ -6,7 +6,7 @@ #ifndef ASM__RISCV__ASM_H #define ASM__RISCV__ASM_H -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #include #define __ASM_STR(x) x #else @@ -25,13 +25,13 @@ #define REG_S __REG_SEL(sd, sw) #if __SIZEOF_POINTER__ == 8 -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #define RISCV_PTR .dword #else #define RISCV_PTR ".dword" #endif #elif __SIZEOF_POINTER__ == 4 -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #define RISCV_PTR .word #else #define RISCV_PTR ".word" diff --git a/xen/arch/riscv/include/asm/bug.h b/xen/arch/riscv/include/asm/bug.h index c395b809c6..6ec8adc528 100644 --- a/xen/arch/riscv/include/asm/bug.h +++ b/xen/arch/riscv/include/asm/bug.h @@ -7,7 +7,7 @@ #ifndef ASM__RISCV__BUG_H #define ASM__RISCV__BUG_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #define BUG_INSTR "unimp" @@ -30,6 +30,6 @@ #define GET_INSN_LENGTH(insn) \ (((insn) & INSN_LENGTH_MASK) == INSN_LENGTH_32 ? 4 : 2) \ -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* ASM__RISCV__BUG_H */ diff --git a/xen/arch/riscv/include/asm/config.h b/xen/arch/riscv/include/asm/config.h index e150f28f53..1e08d3bf78 100644 --- a/xen/arch/riscv/include/asm/config.h +++ b/xen/arch/riscv/include/asm/config.h @@ -137,7 +137,7 @@ #define INVALID_VCPU_ID MAX_VIRT_CPUS /* Linkage for RISCV */ -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #define CODE_FILL /* empty */ #endif @@ -147,7 +147,7 @@ #define IDENT_AREA_SIZE 64 -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ extern unsigned long phys_offset; /* = load_start - XEN_VIRT_START */ #endif diff --git a/xen/arch/riscv/include/asm/cpufeature.h b/xen/arch/riscv/include/asm/cpufeature.h index 768b84b769..d42d7b294e 100644 --- a/xen/arch/riscv/include/asm/cpufeature.h +++ b/xen/arch/riscv/include/asm/cpufeature.h @@ -2,7 +2,7 @@ #ifndef ASM__RISCV__CPUFEATURE_H #define ASM__RISCV__CPUFEATURE_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include @@ -46,7 +46,7 @@ void riscv_fill_hwcap(void); bool riscv_isa_extension_available(const unsigned long *isa_bitmap, enum riscv_isa_ext_id id); -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* ASM__RISCV__CPUFEATURE_H */ diff --git a/xen/arch/riscv/include/asm/csr.h b/xen/arch/riscv/include/asm/csr.h index 775f1f170f..01876f8289 100644 --- a/xen/arch/riscv/include/asm/csr.h +++ b/xen/arch/riscv/include/asm/csr.h @@ -10,7 +10,7 @@ #include #include -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #define csr_read(csr) \ ({ \ @@ -78,6 +78,6 @@ : "memory" ); \ }) -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* ASM__RISCV__CSR_H */ diff --git a/xen/arch/riscv/include/asm/current.h b/xen/arch/riscv/include/asm/current.h index 1485bceea4..0c3ea70c2e 100644 --- a/xen/arch/riscv/include/asm/current.h +++ b/xen/arch/riscv/include/asm/current.h @@ -9,7 +9,7 @@ #include -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ register struct pcpu_info *tp asm ( "tp" ); @@ -52,6 +52,6 @@ DECLARE_PER_CPU(struct vcpu *, curr_vcpu); #define get_per_cpu_offset() __per_cpu_offset[smp_processor_id()] -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* ASM__RISCV__CURRENT_H */ diff --git a/xen/arch/riscv/include/asm/fixmap.h b/xen/arch/riscv/include/asm/fixmap.h index 5990c964aa..085d135c15 100644 --- a/xen/arch/riscv/include/asm/fixmap.h +++ b/xen/arch/riscv/include/asm/fixmap.h @@ -23,7 +23,7 @@ #define FIXADDR_START FIXMAP_ADDR(0) #define FIXADDR_TOP FIXMAP_ADDR(FIX_LAST + 1) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* * Direct access to xen_fixmap[] should only happen when {set, @@ -46,6 +46,6 @@ static inline unsigned int virt_to_fix(vaddr_t vaddr) return ((vaddr - FIXADDR_START) >> PAGE_SHIFT); } -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* ASM__RISCV__FIXMAP_H */ diff --git a/xen/arch/riscv/include/asm/page.h b/xen/arch/riscv/include/asm/page.h index ddcc4da0a3..7fde99f916 100644 --- a/xen/arch/riscv/include/asm/page.h +++ b/xen/arch/riscv/include/asm/page.h @@ -3,7 +3,7 @@ #ifndef ASM__RISCV__PAGE_H #define ASM__RISCV__PAGE_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -213,6 +213,6 @@ static inline pte_t pte_from_mfn(mfn_t mfn, pte_attr_t flags) pte_t pt_walk(vaddr_t va, unsigned int *pte_level); -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* ASM__RISCV__PAGE_H */ diff --git a/xen/arch/riscv/include/asm/processor.h b/xen/arch/riscv/include/asm/processor.h index 39696fb58d..2502045642 100644 --- a/xen/arch/riscv/include/asm/processor.h +++ b/xen/arch/riscv/include/asm/processor.h @@ -10,7 +10,7 @@ #ifndef ASM__RISCV__PROCESSOR_H #define ASM__RISCV__PROCESSOR_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* On stack VCPU state */ struct cpu_user_regs @@ -93,7 +93,7 @@ static inline void sfence_vma(void) #define dump_execution_state() run_in_exception_handler(show_execution_state) -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* ASM__RISCV__PROCESSOR_H */ diff --git a/xen/arch/riscv/include/asm/regs.h b/xen/arch/riscv/include/asm/regs.h index 218b9455bd..531958f3d7 100644 --- a/xen/arch/riscv/include/asm/regs.h +++ b/xen/arch/riscv/include/asm/regs.h @@ -2,7 +2,7 @@ #ifndef ASM__RISCV__REGS_H #define ASM__RISCV__REGS_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include @@ -15,7 +15,7 @@ static inline bool guest_mode(const struct cpu_user_regs *r) BUG_ON("unimplemented"); } -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* ASM__RISCV__REGS_H */ diff --git a/xen/arch/riscv/include/asm/system.h b/xen/arch/riscv/include/asm/system.h index 7b78d11e04..f33af64fd2 100644 --- a/xen/arch/riscv/include/asm/system.h +++ b/xen/arch/riscv/include/asm/system.h @@ -7,7 +7,7 @@ #include -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #define RISCV_FENCE(p, s) \ __asm__ __volatile__ ( "fence " #p "," #s : : : "memory" ) @@ -76,7 +76,7 @@ static inline bool local_irq_is_enabled(void) #define arch_fetch_and_add(x, v) __sync_fetch_and_add(x, v) -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* ASM__RISCV__SYSTEM_H */ diff --git a/xen/arch/riscv/include/asm/traps.h b/xen/arch/riscv/include/asm/traps.h index 72b8f6c475..21fa3c3259 100644 --- a/xen/arch/riscv/include/asm/traps.h +++ b/xen/arch/riscv/include/asm/traps.h @@ -5,12 +5,12 @@ #include -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ void do_trap(struct cpu_user_regs *cpu_regs); void handle_trap(void); void trap_init(void); -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* ASM__RISCV__TRAPS_H */ diff --git a/xen/arch/x86/boot/video.h b/xen/arch/x86/boot/video.h index 1203515f9e..7c28487917 100644 --- a/xen/arch/x86/boot/video.h +++ b/xen/arch/x86/boot/video.h @@ -28,7 +28,7 @@ /* The "recalculate timings" flag */ #define VIDEO_RECALC 0x8000 -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ struct boot_video_info { uint8_t orig_x; /* 0x00 */ uint8_t orig_y; /* 0x01 */ @@ -69,6 +69,6 @@ struct boot_video_info { }; extern struct boot_video_info boot_vid_info; -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __BOOT_VIDEO_H__ */ diff --git a/xen/arch/x86/include/asm/alternative-asm.h b/xen/arch/x86/include/asm/alternative-asm.h index 3eb0f4e8a0..d5c7f18160 100644 --- a/xen/arch/x86/include/asm/alternative-asm.h +++ b/xen/arch/x86/include/asm/alternative-asm.h @@ -3,7 +3,7 @@ #include -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ /* * Issue one struct alt_instr descriptor entry (need to put it into @@ -120,7 +120,7 @@ #undef decl_orig #undef as_true -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* _ASM_X86_ALTERNATIVE_ASM_H_ */ /* diff --git a/xen/arch/x86/include/asm/alternative.h b/xen/arch/x86/include/asm/alternative.h index 0482bbf7cb..18109e3dc5 100644 --- a/xen/arch/x86/include/asm/alternative.h +++ b/xen/arch/x86/include/asm/alternative.h @@ -8,7 +8,7 @@ #define ALT_FLAG_NOT (1 << 15) #define ALT_NOT(x) (ALT_FLAG_NOT | (x)) -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #include #else @@ -175,6 +175,6 @@ extern void alternative_instructions(void); /* Use this macro(s) if you need more than one output parameter. */ #define ASM_OUTPUT2(a...) a -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* __X86_ALTERNATIVE_H__ */ diff --git a/xen/arch/x86/include/asm/asm_defns.h b/xen/arch/x86/include/asm/asm_defns.h index 72a0082d31..9b75c9cae3 100644 --- a/xen/arch/x86/include/asm/asm_defns.h +++ b/xen/arch/x86/include/asm/asm_defns.h @@ -12,7 +12,7 @@ #include #include -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #include #include #ifndef CONFIG_INDIRECT_THUNK @@ -24,7 +24,7 @@ asm ( "\t.equ CONFIG_INDIRECT_THUNK, " __stringify(IS_ENABLED(CONFIG_INDIRECT_THUNK)) ); #endif -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* * This output constraint should be used for any inline asm which has a "call" @@ -57,14 +57,14 @@ register unsigned long current_stack_pointer asm("rsp"); #define ASSERT_INTERRUPTS_DISABLED \ ASSERT_INTERRUPT_STATUS(z, "INTERRUPTS DISABLED") -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ # define _ASM_EX(p) p-. #else # define _ASM_EX(p) #p "-." #endif /* Exception table entry */ -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ # define _ASM__EXTABLE(sfx, from, to) \ .section .ex_table##sfx, "a" ; \ .balign 4 ; \ @@ -81,7 +81,7 @@ register unsigned long current_stack_pointer asm("rsp"); #define _ASM_EXTABLE(from, to) _ASM__EXTABLE(, from, to) #define _ASM_PRE_EXTABLE(from, to) _ASM__EXTABLE(.pre, from, to) -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ .macro BUILD_BUG_ON condstr, cond:vararg .if \cond @@ -221,7 +221,7 @@ static always_inline void stac(void) } #endif -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ .macro SAVE_ALL compat=0 addq $-(UREGS_error_code-UREGS_r15), %rsp cld diff --git a/xen/arch/x86/include/asm/bug.h b/xen/arch/x86/include/asm/bug.h index e748b6c2f2..3a4f41e380 100644 --- a/xen/arch/x86/include/asm/bug.h +++ b/xen/arch/x86/include/asm/bug.h @@ -19,12 +19,12 @@ * ... */ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #define BUG_INSTR "ud2" #define BUG_ASM_CONST "c" -#else /* !__ASSEMBLY__ */ +#else /* !__ASSEMBLER__ */ /* * Construct a bugframe, suitable for using in assembly code. Should always @@ -66,6 +66,6 @@ #define ASSERT_FAILED(msg) \ BUG_FRAME BUGFRAME_assert, __LINE__, __FILE__, 1, msg -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* __X86_BUG_H__ */ diff --git a/xen/arch/x86/include/asm/cache.h b/xen/arch/x86/include/asm/cache.h index f15d10dc7f..e17a10b49e 100644 --- a/xen/arch/x86/include/asm/cache.h +++ b/xen/arch/x86/include/asm/cache.h @@ -9,7 +9,7 @@ #define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT) #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ void cache_flush(const void *addr, unsigned int size); void cache_writeback(const void *addr, unsigned int size); diff --git a/xen/arch/x86/include/asm/config.h b/xen/arch/x86/include/asm/config.h index 3553bf89dc..1563696954 100644 --- a/xen/arch/x86/include/asm/config.h +++ b/xen/arch/x86/include/asm/config.h @@ -32,7 +32,7 @@ #define OPT_CONSOLE_STR "vga" /* Linkage for x86 */ -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #define CODE_FILL 0x90 #endif @@ -195,7 +195,7 @@ #endif #define DIRECTMAP_VIRT_END (DIRECTMAP_VIRT_START + DIRECTMAP_SIZE) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #ifdef CONFIG_PV32 @@ -237,7 +237,7 @@ #define __OS "q" /* Operation Suffix */ #define __OP "r" /* Operand Prefix */ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ extern unsigned long xen_phys_start; #endif diff --git a/xen/arch/x86/include/asm/cpufeature.h b/xen/arch/x86/include/asm/cpufeature.h index 0b764b9fb9..28c4085cc7 100644 --- a/xen/arch/x86/include/asm/cpufeature.h +++ b/xen/arch/x86/include/asm/cpufeature.h @@ -10,7 +10,7 @@ #include #include -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #else #include @@ -38,7 +38,7 @@ #define VFM_FAMILY(vfm) MASK_EXTR(vfm, VFM_FAMILY_MASK) #define VFM_VENDOR(vfm) MASK_EXTR(vfm, VFM_VENDOR_MASK) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ struct cpuinfo_x86 { /* TODO: Phase out the x86 prefixed names. */ @@ -349,7 +349,7 @@ struct cpuid4_info { }; int cpuid4_cache_lookup(int index, struct cpuid4_info *this_leaf); -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* __ASM_I386_CPUFEATURE_H */ diff --git a/xen/arch/x86/include/asm/cpufeatureset.h b/xen/arch/x86/include/asm/cpufeatureset.h index a9c51bc514..e12b54ab22 100644 --- a/xen/arch/x86/include/asm/cpufeatureset.h +++ b/xen/arch/x86/include/asm/cpufeatureset.h @@ -1,7 +1,7 @@ #ifndef __XEN_X86_CPUFEATURESET_H__ #define __XEN_X86_CPUFEATURESET_H__ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include @@ -17,13 +17,13 @@ enum { #include #include -#else /* !__ASSEMBLY__ */ +#else /* !__ASSEMBLER__ */ #define XEN_CPUFEATURE(name, value) .equ X86_FEATURE_##name, value #include #include -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #undef XEN_CPUFEATURE diff --git a/xen/arch/x86/include/asm/desc.h b/xen/arch/x86/include/asm/desc.h index 85fae6b2f9..dcbdac3ff7 100644 --- a/xen/arch/x86/include/asm/desc.h +++ b/xen/arch/x86/include/asm/desc.h @@ -42,7 +42,7 @@ #define LDT_SELECTOR (LDT_ENTRY << 3) #define PER_CPU_SELECTOR (PER_CPU_GDT_ENTRY << 3) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #define GUEST_KERNEL_RPL(d) (is_pv_32bit_domain(d) ? 1 : 3) @@ -76,7 +76,7 @@ FLAT_COMPAT_KERNEL_CS)) || \ ((sel) & 4)) /* LDT seg? */ -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ /* These are bitmasks for the high 32 bits of a descriptor table entry. */ #define _SEGMENT_TYPE (15<< 8) @@ -92,7 +92,7 @@ #define _SEGMENT_DB ( 1<<22) /* 16- or 32-bit segment */ #define _SEGMENT_G ( 1<<23) /* Granularity */ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* System Descriptor types for GDT and IDT entries. */ #define SYS_DESC_tss16_avail 1 @@ -162,6 +162,6 @@ static inline void ltr(unsigned int sel) __asm__ __volatile__ ( "ltr %w0" :: "rm" (sel) : "memory" ); } -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* __ARCH_DESC_H */ diff --git a/xen/arch/x86/include/asm/edd.h b/xen/arch/x86/include/asm/edd.h index afaa23732a..ebd46171c1 100644 --- a/xen/arch/x86/include/asm/edd.h +++ b/xen/arch/x86/include/asm/edd.h @@ -23,7 +23,7 @@ #ifndef __XEN_EDD_H__ #define __XEN_EDD_H__ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ struct __packed edd_info { /* Int13, Fn48: Check Extensions Present. */ @@ -149,7 +149,7 @@ extern u8 boot_mbr_signature_nr; extern struct edd_info boot_edd_info[]; extern u8 boot_edd_info_nr; -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ /* Maximum number of EDD information structures at boot_edd_info. */ #define EDD_INFO_MAX 6 diff --git a/xen/arch/x86/include/asm/fixmap.h b/xen/arch/x86/include/asm/fixmap.h index 516ec3fa6c..5b9e1a2401 100644 --- a/xen/arch/x86/include/asm/fixmap.h +++ b/xen/arch/x86/include/asm/fixmap.h @@ -17,7 +17,7 @@ #define FIXADDR_TOP (VMAP_VIRT_END - PAGE_SIZE) #define FIXADDR_X_TOP (XEN_VIRT_END - PAGE_SIZE) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -118,6 +118,6 @@ extern void __set_fixmap_x( #define __fix_x_to_virt(x) (FIXADDR_X_TOP - ((x) << PAGE_SHIFT)) #define fix_x_to_virt(x) ((void *)__fix_x_to_virt(x)) -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif diff --git a/xen/arch/x86/include/asm/ldt.h b/xen/arch/x86/include/asm/ldt.h index 58e3e042fc..f08e023090 100644 --- a/xen/arch/x86/include/asm/ldt.h +++ b/xen/arch/x86/include/asm/ldt.h @@ -2,7 +2,7 @@ #ifndef __ARCH_LDT_H #define __ARCH_LDT_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ static inline void load_LDT(struct vcpu *v) { @@ -20,7 +20,7 @@ static inline void load_LDT(struct vcpu *v) } } -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif diff --git a/xen/arch/x86/include/asm/machine_kexec.h b/xen/arch/x86/include/asm/machine_kexec.h index d4880818c1..3e189acf24 100644 --- a/xen/arch/x86/include/asm/machine_kexec.h +++ b/xen/arch/x86/include/asm/machine_kexec.h @@ -3,7 +3,7 @@ #define KEXEC_RELOC_FLAG_COMPAT 0x1 /* 32-bit image */ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ extern void kexec_reloc(unsigned long reloc_code, unsigned long reloc_pt, unsigned long ind_maddr, unsigned long entry_maddr, diff --git a/xen/arch/x86/include/asm/nops.h b/xen/arch/x86/include/asm/nops.h index 2724a9862e..32a05c8813 100644 --- a/xen/arch/x86/include/asm/nops.h +++ b/xen/arch/x86/include/asm/nops.h @@ -47,7 +47,7 @@ #define P6_NOP8 0x0f,0x1f,0x84,0x00,0,0,0,0 #define P6_NOP9 0x66,0x0f,0x1f,0x84,0x00,0,0,0,0 -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #define _ASM_MK_NOP(x) .byte x #else #define _ASM_MK_NOP(x) ".byte " __stringify(x) "\n" diff --git a/xen/arch/x86/include/asm/page.h b/xen/arch/x86/include/asm/page.h index 65a01f2402..23e06d39ad 100644 --- a/xen/arch/x86/include/asm/page.h +++ b/xen/arch/x86/include/asm/page.h @@ -8,7 +8,7 @@ #define PAGE_ORDER_2M 9 #define PAGE_ORDER_1G 18 -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ # include # include #endif @@ -107,7 +107,7 @@ #define l4e_from_mfn(m, f) l4e_from_pfn(mfn_x(m), f) /* Construct a pte from a physical address and access flags. */ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ static inline l1_pgentry_t l1e_from_paddr(paddr_t pa, unsigned int flags) { ASSERT((pa & ~(PADDR_MASK & PAGE_MASK)) == 0); @@ -128,7 +128,7 @@ static inline l4_pgentry_t l4e_from_paddr(paddr_t pa, unsigned int flags) ASSERT((pa & ~(PADDR_MASK & PAGE_MASK)) == 0); return (l4_pgentry_t) { pa | put_pte_flags(flags) }; } -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ /* Construct a pte from its direct integer representation. */ #define l1e_from_intpte(intpte) ((l1_pgentry_t) { (intpte_t)(intpte) }) @@ -204,7 +204,7 @@ static inline l4_pgentry_t l4e_from_paddr(paddr_t pa, unsigned int flags) #define pgentry_ptr_to_slot(_p) \ (((unsigned long)(_p) & ~PAGE_MASK) / sizeof(*(_p))) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* Page-table type. */ typedef struct { u64 pfn; } pagetable_t; @@ -270,7 +270,7 @@ void scrub_page_cold(void *ptr); #define vmap_to_mfn(va) xen_map_to_mfn((unsigned long)(va)) #define vmap_to_page(va) mfn_to_page(vmap_to_mfn(va)) -#endif /* !defined(__ASSEMBLY__) */ +#endif /* !defined(__ASSEMBLER__) */ /* Where to find each level of the linear mapping */ #define __linear_l1_table ((l1_pgentry_t *)(LINEAR_PT_VIRT_START)) @@ -282,7 +282,7 @@ void scrub_page_cold(void *ptr); ((l4_pgentry_t *)(__linear_l3_table + l3_linear_offset(LINEAR_PT_VIRT_START))) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ extern root_pgentry_t idle_pg_table[ROOT_PAGETABLE_ENTRIES]; extern l2_pgentry_t *compat_idle_pg_table_l2; extern unsigned int m2p_compat_vstart; @@ -293,7 +293,7 @@ extern l2_pgentry_t l2_directmap[4*L2_PAGETABLE_ENTRIES]; extern l1_pgentry_t l1_fixmap[L1_PAGETABLE_ENTRIES]; void paging_init(void); void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t l4e); -#endif /* !defined(__ASSEMBLY__) */ +#endif /* !defined(__ASSEMBLER__) */ #define _PAGE_NONE _AC(0x000,U) #define _PAGE_PRESENT _AC(0x001,U) @@ -313,7 +313,7 @@ void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t l4e); #define _PAGE_PSE_PAT _AC(0x1000,U) #define _PAGE_AVAIL_HIGH (_AC(0x7ff, U) << 12) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* Dependency on NX being available can't be expressed. */ #define _PAGE_NX (cpu_has_nx ? _PAGE_NX_BIT : 0) #endif @@ -354,7 +354,7 @@ void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t l4e); #define MAP_SMALL_PAGES _PAGE_AVAIL0 /* don't use superpages mappings */ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* Convert between PAT/PCD/PWT embedded in PTE flags and 3-bit cacheattr. */ static inline unsigned int pte_flags_to_cacheattr(unsigned int flags) @@ -391,7 +391,7 @@ static inline void invalidate_icache(void) */ } -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* __X86_PAGE_H__ */ diff --git a/xen/arch/x86/include/asm/processor.h b/xen/arch/x86/include/asm/processor.h index 2e087c6257..cf614bd8c6 100644 --- a/xen/arch/x86/include/asm/processor.h +++ b/xen/arch/x86/include/asm/processor.h @@ -4,7 +4,7 @@ #ifndef __ASM_X86_PROCESSOR_H #define __ASM_X86_PROCESSOR_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include #include @@ -75,7 +75,7 @@ (_AC(X86_MT_UC, ULL) << 0x30) | \ (_AC(X86_MT_UC, ULL) << 0x38)) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ struct domain; struct vcpu; @@ -435,7 +435,7 @@ enum ap_boot_method { }; extern enum ap_boot_method ap_boot_method; -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* __ASM_X86_PROCESSOR_H */ diff --git a/xen/arch/x86/include/asm/smp.h b/xen/arch/x86/include/asm/smp.h index 60eb4ac254..3f16e62696 100644 --- a/xen/arch/x86/include/asm/smp.h +++ b/xen/arch/x86/include/asm/smp.h @@ -4,7 +4,7 @@ /* * We need the APIC definitions automatically as part of 'smp.h' */ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include #include @@ -14,7 +14,7 @@ #define BAD_APICID (-1U) #define INVALID_CUID (~0U) /* AMD Compute Unit ID */ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* * Private routines/data @@ -80,6 +80,6 @@ extern bool unaccounted_cpus; void *cpu_alloc_stack(unsigned int cpu); -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif diff --git a/xen/arch/x86/include/asm/spec_ctrl.h b/xen/arch/x86/include/asm/spec_ctrl.h index 3d92928f94..505e3ab863 100644 --- a/xen/arch/x86/include/asm/spec_ctrl.h +++ b/xen/arch/x86/include/asm/spec_ctrl.h @@ -45,7 +45,7 @@ */ #define SCF_DOM_MASK (SCF_verw | SCF_entry_ibpb | SCF_entry_bhb) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -201,7 +201,7 @@ static always_inline void spec_ctrl_exit_idle(struct cpu_info *info) */ } -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* !__X86_SPEC_CTRL_H__ */ /* diff --git a/xen/arch/x86/include/asm/spec_ctrl_asm.h b/xen/arch/x86/include/asm/spec_ctrl_asm.h index 729a830411..abb64ad2b7 100644 --- a/xen/arch/x86/include/asm/spec_ctrl_asm.h +++ b/xen/arch/x86/include/asm/spec_ctrl_asm.h @@ -8,7 +8,7 @@ #ifndef __X86_SPEC_CTRL_ASM_H__ #define __X86_SPEC_CTRL_ASM_H__ -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #include #include @@ -500,7 +500,7 @@ .L\@_skip_ist_exit: .endm -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* !__X86_SPEC_CTRL_ASM_H__ */ /* diff --git a/xen/arch/x86/include/asm/trampoline.h b/xen/arch/x86/include/asm/trampoline.h index dc536efe1f..deed2679d9 100644 --- a/xen/arch/x86/include/asm/trampoline.h +++ b/xen/arch/x86/include/asm/trampoline.h @@ -96,7 +96,7 @@ #define TRAMPOLINE_HEAP_END (TRAMPOLINE_SIZE - PAGE_SIZE) #define MBI_SPACE_MIN (2 * PAGE_SIZE) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -168,5 +168,5 @@ extern uint8_t kbd_shift_flags; extern uint16_t boot_edid_caps; extern uint8_t boot_edid_info[128]; -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* X86_ASM_TRAMPOLINE_H */ diff --git a/xen/arch/x86/include/asm/x86_64/page.h b/xen/arch/x86/include/asm/x86_64/page.h index 201b79f99e..c80b4b01ad 100644 --- a/xen/arch/x86/include/asm/x86_64/page.h +++ b/xen/arch/x86/include/asm/x86_64/page.h @@ -9,7 +9,7 @@ #define is_canonical_address(x) (((long)(x) >> 47) == ((long)(x) >> 63)) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ static inline unsigned long canonicalise_addr(unsigned long addr) { @@ -68,7 +68,7 @@ typedef struct { intpte_t l3; } l3_pgentry_t; typedef struct { intpte_t l4; } l4_pgentry_t; typedef l4_pgentry_t root_pgentry_t; -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ /* Given a virtual address, get an entry offset into a linear page table. */ #define l1_linear_offset(_a) (((_a) & VADDR_MASK) >> L1_PAGETABLE_SHIFT) @@ -100,7 +100,7 @@ typedef l4_pgentry_t root_pgentry_t; */ /* Extract flags into 24-bit integer, or turn 24-bit flags into a pte mask. */ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ static inline unsigned int get_pte_flags(intpte_t x) { return ((x >> 40) & ~0xfff) | (x & 0xfff); diff --git a/xen/common/efi/boot.c b/xen/common/efi/boot.c index d7f4d0cb22..8adba7bd4d 100644 --- a/xen/common/efi/boot.c +++ b/xen/common/efi/boot.c @@ -25,11 +25,11 @@ /* * Keep this arch-specific modified include in the common file, as moving * it to the arch specific include file would obscure that special care is - * taken to include it with __ASSEMBLY__ defined. + * taken to include it with __ASSEMBLER__ defined. */ -#define __ASSEMBLY__ /* avoid pulling in ACPI stuff (conflicts with EFI) */ +#define __ASSEMBLER__ /* avoid pulling in ACPI stuff (conflicts with EFI) */ #include -#undef __ASSEMBLY__ +#undef __ASSEMBLER__ #endif #define EFI_REVISION(major, minor) (((major) << 16) | (minor)) diff --git a/xen/include/efi/pe.h b/xen/include/efi/pe.h index 64e047e88b..6b3458e888 100644 --- a/xen/include/efi/pe.h +++ b/xen/include/efi/pe.h @@ -136,7 +136,7 @@ #define IMAGE_DEBUG_TYPE_CODEVIEW 2 #define IMAGE_DEBUG_TYPE_EX_DLLCHARACTERISTICS 20 -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ struct mz_hdr { uint16_t magic; /* MZ_MAGIC */ @@ -286,6 +286,6 @@ struct section_header { uint32_t flags; }; -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* EFI__PE_H */ diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h index b31324f8d4..cd563cf706 100644 --- a/xen/include/public/arch-arm.h +++ b/xen/include/public/arch-arm.h @@ -184,7 +184,7 @@ #define uint64_aligned_t uint64_t __attribute__((__aligned__(8))) #endif -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #define ___DEFINE_XEN_GUEST_HANDLE(name, type) \ typedef union { type *p; unsigned long q; } \ __guest_handle_ ## name; \ @@ -542,7 +542,7 @@ typedef uint64_t xen_callback_t; #endif -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* Stub definition of PMU structure */ typedef struct xen_pmu_arch { uint8_t dummy; } xen_pmu_arch_t; #endif diff --git a/xen/include/public/arch-ppc.h b/xen/include/public/arch-ppc.h index 264e20b89e..b5e1a940a5 100644 --- a/xen/include/public/arch-ppc.h +++ b/xen/include/public/arch-ppc.h @@ -16,7 +16,7 @@ #define uint64_aligned_t uint64_t __attribute__((__aligned__(8))) #endif -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #define ___DEFINE_XEN_GUEST_HANDLE(name, type) \ typedef union { type *p; unsigned long q; } \ __guest_handle_ ## name; \ @@ -102,6 +102,6 @@ struct xen_arch_domainconfig { typedef struct xen_pmu_arch { uint8_t dummy; } xen_pmu_arch_t; -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* __XEN_PUBLIC_ARCH_PPC_H__ */ diff --git a/xen/include/public/arch-riscv.h b/xen/include/public/arch-riscv.h index 168263b920..360d8e6871 100644 --- a/xen/include/public/arch-riscv.h +++ b/xen/include/public/arch-riscv.h @@ -12,7 +12,7 @@ #define uint64_aligned_t uint64_t __attribute__((__aligned__(8))) #endif -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #define ___DEFINE_XEN_GUEST_HANDLE(name, type) \ typedef union { type *p; unsigned long q; } \ __guest_handle_ ## name; \ diff --git a/xen/include/public/arch-x86/xen-mca.h b/xen/include/public/arch-x86/xen-mca.h index bb1b12f14f..30d18b6ad7 100644 --- a/xen/include/public/arch-x86/xen-mca.h +++ b/xen/include/public/arch-x86/xen-mca.h @@ -74,7 +74,7 @@ /* Applicable to all mc_vcpuid fields below. */ #define XEN_MC_VCPUID_INVALID 0xffff -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #define VIRQ_MCA VIRQ_ARCH_0 /* G. (DOM0) Machine Check Architecture */ @@ -433,6 +433,6 @@ struct xen_mc { typedef struct xen_mc xen_mc_t; DEFINE_XEN_GUEST_HANDLE(xen_mc_t); -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __XEN_PUBLIC_ARCH_X86_MCA_H__ */ diff --git a/xen/include/public/arch-x86/xen-x86_32.h b/xen/include/public/arch-x86/xen-x86_32.h index 25cc447288..6a5eddf0c3 100644 --- a/xen/include/public/arch-x86/xen-x86_32.h +++ b/xen/include/public/arch-x86/xen-x86_32.h @@ -90,7 +90,7 @@ #define XEN_GUEST_HANDLE_64(name) __XEN_GUEST_HANDLE_64(name) #endif -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #if defined(XEN_GENERATING_COMPAT_HEADERS) /* nothing */ @@ -171,7 +171,7 @@ struct xen_callback { }; typedef struct xen_callback xen_callback_t; -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* __XEN_PUBLIC_ARCH_X86_XEN_X86_32_H__ */ diff --git a/xen/include/public/arch-x86/xen-x86_64.h b/xen/include/public/arch-x86/xen-x86_64.h index ea6b56aa3b..75f121be0e 100644 --- a/xen/include/public/arch-x86/xen-x86_64.h +++ b/xen/include/public/arch-x86/xen-x86_64.h @@ -105,7 +105,7 @@ #define VGCF_in_syscall (1<<_VGCF_in_syscall) #define VGCF_IN_SYSCALL VGCF_in_syscall -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ struct iret_context { /* Top of stack (%rsp at point of hypercall). */ @@ -218,7 +218,7 @@ typedef struct arch_vcpu_info arch_vcpu_info_t; typedef unsigned long xen_callback_t; -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* __XEN_PUBLIC_ARCH_X86_XEN_X86_64_H__ */ diff --git a/xen/include/public/arch-x86/xen.h b/xen/include/public/arch-x86/xen.h index b99a691706..a7bf046ee0 100644 --- a/xen/include/public/arch-x86/xen.h +++ b/xen/include/public/arch-x86/xen.h @@ -53,7 +53,7 @@ __DeFiNe__ __DECL_REG_LO16(name) e ## name #include "xen-x86_64.h" #endif -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ typedef unsigned long xen_pfn_t; #define PRI_xen_pfn "lx" #define PRIu_xen_pfn "lu" @@ -97,7 +97,7 @@ typedef unsigned long xen_pfn_t; /* Maximum number of virtual CPUs in legacy multi-processor guests. */ #define XEN_LEGACY_MAX_VCPUS 32 -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ typedef unsigned long xen_ulong_t; #define PRI_xen_ulong "lx" @@ -335,7 +335,7 @@ typedef struct xen_msr_entry { } xen_msr_entry_t; DEFINE_XEN_GUEST_HANDLE(xen_msr_entry_t); -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ /* * ` enum neg_errnoval @@ -359,7 +359,7 @@ DEFINE_XEN_GUEST_HANDLE(xen_msr_entry_t); * Prefix forces emulation of some non-trapping instructions. * Currently only CPUID. */ -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #define XEN_EMULATE_PREFIX .byte 0x0f,0x0b,0x78,0x65,0x6e ; #define XEN_CPUID XEN_EMULATE_PREFIX cpuid #else diff --git a/xen/include/public/errno.h b/xen/include/public/errno.h index b9fc6762fb..6543d0f353 100644 --- a/xen/include/public/errno.h +++ b/xen/include/public/errno.h @@ -30,7 +30,7 @@ #define XEN_ERRNO_DEFAULT_INCLUDE -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #define XEN_ERRNO(name, value) XEN_##name = (value), enum xen_errno { @@ -39,7 +39,7 @@ enum xen_errno { #define XEN_ERRNO(name, value) .equ XEN_##name, value -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __XEN_PUBLIC_ERRNO_H__ */ #endif /* !XEN_ERRNO */ @@ -123,7 +123,7 @@ XEN_ERRNO(ECONNREFUSED, 111) /* Connection refused */ /* Clean up from a default include. Close the enum (for C). */ #ifdef XEN_ERRNO_DEFAULT_INCLUDE #undef XEN_ERRNO_DEFAULT_INCLUDE -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ }; #endif diff --git a/xen/include/public/tmem.h b/xen/include/public/tmem.h index da68de76fe..8c91a7bb94 100644 --- a/xen/include/public/tmem.h +++ b/xen/include/public/tmem.h @@ -58,7 +58,7 @@ struct xen_tmem_oid { typedef struct xen_tmem_oid xen_tmem_oid_t; DEFINE_XEN_GUEST_HANDLE(xen_tmem_oid_t); -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #if __XEN_INTERFACE_VERSION__ < 0x00040400 typedef xen_pfn_t tmem_cli_mfn_t; #endif diff --git a/xen/include/public/xen.h b/xen/include/public/xen.h index 82b9c05a76..7f15204c38 100644 --- a/xen/include/public/xen.h +++ b/xen/include/public/xen.h @@ -24,7 +24,7 @@ #error "Unsupported architecture" #endif -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* Guest handles for primitive C types. */ DEFINE_XEN_GUEST_HANDLE(char); __DEFINE_XEN_GUEST_HANDLE(uchar, unsigned char); @@ -437,7 +437,7 @@ DEFINE_XEN_GUEST_HANDLE(xen_ulong_t); #define MMUEXT_UNMARK_SUPER 20 /* ` } */ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ struct mmuext_op { unsigned int cmd; /* => enum mmuext_cmd */ union { @@ -614,7 +614,7 @@ DEFINE_XEN_GUEST_HANDLE(mmuext_op_t); /* Mask for valid domain id values */ #define DOMID_MASK xen_mk_uint(0x7FFF) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ typedef uint16_t domid_t; @@ -1011,7 +1011,7 @@ typedef struct { XEN_DEFINE_UUID_(a, b, c, d, e1, e2, e3, e4, e5, e6) #endif /* __STDC_VERSION__ / __GNUC__ */ -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ /* Default definitions for macros used by domctl/sysctl. */ #if defined(__XEN__) || defined(__XEN_TOOLS__) @@ -1026,7 +1026,7 @@ typedef struct { #define XEN_GUEST_HANDLE_64(name) XEN_GUEST_HANDLE(name) #endif -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ struct xenctl_bitmap { XEN_GUEST_HANDLE_64(uint8) bitmap; uint32_t nr_bits; diff --git a/xen/include/xen/acpi.h b/xen/include/xen/acpi.h index 57e710a16d..90635ba0f3 100644 --- a/xen/include/xen/acpi.h +++ b/xen/include/xen/acpi.h @@ -35,7 +35,7 @@ */ #define NUM_FIXMAP_ACPI_PAGES 64 -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -202,6 +202,6 @@ static inline void acpi_dmar_zap(void) {} static inline void acpi_dmar_reinstate(void) {} #endif -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /*_LINUX_ACPI_H*/ diff --git a/xen/include/xen/bitmap.h b/xen/include/xen/bitmap.h index b5e9cdd3db..c69398a127 100644 --- a/xen/include/xen/bitmap.h +++ b/xen/include/xen/bitmap.h @@ -1,7 +1,7 @@ #ifndef __XEN_BITMAP_H #define __XEN_BITMAP_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -290,6 +290,6 @@ int xenctl_bitmap_to_bitmap(unsigned long *bitmap, int bitmap_to_xenctl_bitmap(struct xenctl_bitmap *xenctl_bitmap, const unsigned long *bitmap, unsigned int nbits); -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __XEN_BITMAP_H */ diff --git a/xen/include/xen/bug.h b/xen/include/xen/bug.h index 0cabdba379..044c059d69 100644 --- a/xen/include/xen/bug.h +++ b/xen/include/xen/bug.h @@ -14,7 +14,7 @@ #include -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -156,7 +156,7 @@ int do_bug_frame(const struct cpu_user_regs *regs, unsigned long pc); #endif /* CONFIG_GENERIC_BUG_FRAME */ -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* __XEN_BUG_H__ */ /* diff --git a/xen/include/xen/config.h b/xen/include/xen/config.h index 1d7195066c..33e6aafa40 100644 --- a/xen/include/xen/config.h +++ b/xen/include/xen/config.h @@ -13,7 +13,7 @@ #include -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #if defined(CONFIG_ENFORCE_UNIQUE_SYMBOLS) || defined(__clang__) diff --git a/xen/include/xen/const.h b/xen/include/xen/const.h index baf28ef144..af22887402 100644 --- a/xen/include/xen/const.h +++ b/xen/include/xen/const.h @@ -12,7 +12,7 @@ * leave it unchanged in asm. */ -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #define _AC(X,Y) X #define _AT(T,X) X #else diff --git a/xen/include/xen/err.h b/xen/include/xen/err.h index a5971e290c..4465468cde 100644 --- a/xen/include/xen/err.h +++ b/xen/include/xen/err.h @@ -1,7 +1,7 @@ #ifndef XEN_ERR_H #define XEN_ERR_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -43,6 +43,6 @@ static inline int __must_check PTR_RET(const void *ptr) return IS_ERR(ptr) ? PTR_ERR(ptr) : 0; } -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* XEN_ERR_H */ diff --git a/xen/include/xen/errno.h b/xen/include/xen/errno.h index 506674701f..db9ef7f3e1 100644 --- a/xen/include/xen/errno.h +++ b/xen/include/xen/errno.h @@ -1,18 +1,18 @@ #ifndef __XEN_ERRNO_H__ #define __XEN_ERRNO_H__ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #define XEN_ERRNO(name, value) name = (value), enum { #include }; -#else /* !__ASSEMBLY__ */ +#else /* !__ASSEMBLER__ */ #define XEN_ERRNO(name, value) .equ name, value #include -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __XEN_ERRNO_H__ */ diff --git a/xen/include/xen/init.h b/xen/include/xen/init.h index abf275f0eb..0c921672c1 100644 --- a/xen/include/xen/init.h +++ b/xen/include/xen/init.h @@ -54,7 +54,7 @@ * Also note, that this data cannot be "const". */ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* * Used for initialization calls.. @@ -72,7 +72,7 @@ typedef void (*exitcall_t)(void); void do_presmp_initcalls(void); void do_initcalls(void); -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #ifdef CONFIG_LATE_HWDOM #define __hwdom_init diff --git a/xen/include/xen/kimage.h b/xen/include/xen/kimage.h index 348f07f5c8..fccba1d88d 100644 --- a/xen/include/xen/kimage.h +++ b/xen/include/xen/kimage.h @@ -7,7 +7,7 @@ #define IND_SOURCE 0x8 #define IND_ZERO 0x10 -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -53,7 +53,7 @@ unsigned long kimage_entry_ind(kimage_entry_t *entry, bool compat); int kimage_build_ind(struct kexec_image *image, mfn_t ind_mfn, bool compat); -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __XEN_KIMAGE_H__ */ diff --git a/xen/include/xen/lib.h b/xen/include/xen/lib.h index c4ac482392..559e87636c 100644 --- a/xen/include/xen/lib.h +++ b/xen/include/xen/lib.h @@ -3,7 +3,7 @@ #include -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -165,6 +165,6 @@ void cf_check dump_execstate(const struct cpu_user_regs *regs); void init_constructors(void); -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __LIB_H__ */ diff --git a/xen/include/xen/libfdt/fdt.h b/xen/include/xen/libfdt/fdt.h index f2e68807f2..57fe566306 100644 --- a/xen/include/xen/libfdt/fdt.h +++ b/xen/include/xen/libfdt/fdt.h @@ -7,7 +7,7 @@ * Copyright 2012 Kim Phillips, Freescale Semiconductor. */ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ struct fdt_header { fdt32_t magic; /* magic word FDT_MAGIC */ diff --git a/xen/include/xen/linkage.h b/xen/include/xen/linkage.h index 3d401b88c1..4446eee5a8 100644 --- a/xen/include/xen/linkage.h +++ b/xen/include/xen/linkage.h @@ -1,7 +1,7 @@ #ifndef __LINKAGE_H__ #define __LINKAGE_H__ -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #include @@ -62,6 +62,6 @@ #define ASM_INT(label, val) DATA(label, 4) .long (val); END(label) -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __LINKAGE_H__ */ diff --git a/xen/include/xen/macros.h b/xen/include/xen/macros.h index 6b4a8dc8b7..6e8ac8b452 100644 --- a/xen/include/xen/macros.h +++ b/xen/include/xen/macros.h @@ -38,7 +38,7 @@ #define __STR(...) #__VA_ARGS__ #define STR(...) __STR(__VA_ARGS__) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* Force a compilation error if condition is true */ #define BUILD_BUG_ON(cond) ({ _Static_assert(!(cond), "!(" #cond ")"); }) @@ -140,7 +140,7 @@ #define MIN(x, y) ((x) < (y) ? (x) : (y)) #define MAX(x, y) ((x) > (y) ? (x) : (y)) -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __MACROS_H__ */ diff --git a/xen/include/xen/multiboot.h b/xen/include/xen/multiboot.h index 6d7f2b7671..4acb614669 100644 --- a/xen/include/xen/multiboot.h +++ b/xen/include/xen/multiboot.h @@ -43,7 +43,7 @@ #define MBI_LOADERNAME (_AC(1,u) << 9) #define MBI_APM (_AC(1,u) << 10) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include @@ -130,6 +130,6 @@ struct memory_map { typedef struct memory_map memory_map_t; -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __MULTIBOOT_H__ */ diff --git a/xen/include/xen/multiboot2.h b/xen/include/xen/multiboot2.h index 534b26444c..7c9180929e 100644 --- a/xen/include/xen/multiboot2.h +++ b/xen/include/xen/multiboot2.h @@ -113,7 +113,7 @@ #define MULTIBOOT2_FRAMEBUFFER_TYPE_RGB 1 #define MULTIBOOT2_FRAMEBUFFER_TYPE_EGA_TEXT 2 -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include @@ -233,6 +233,6 @@ typedef struct { uint32_t mod_end; char cmdline[]; } multiboot2_tag_module_t; -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __MULTIBOOT2_H__ */ diff --git a/xen/include/xen/percpu.h b/xen/include/xen/percpu.h index e7f585c7ed..fcf2095bd5 100644 --- a/xen/include/xen/percpu.h +++ b/xen/include/xen/percpu.h @@ -29,7 +29,7 @@ #include -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -57,7 +57,7 @@ extern unsigned long __per_cpu_offset[]; void percpu_init_areas(void); -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ /* Linux compatibility. */ #define get_cpu_var(var) this_cpu(var) diff --git a/xen/include/xen/pmap.h b/xen/include/xen/pmap.h index 93e61b1087..b223fa9196 100644 --- a/xen/include/xen/pmap.h +++ b/xen/include/xen/pmap.h @@ -4,13 +4,13 @@ /* Large enough for mapping 5 levels of page tables with some headroom */ #define NUM_FIX_PMAP 8 -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include void *pmap_map(mfn_t mfn); void pmap_unmap(const void *p); -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __XEN_PMAP_H__ */ diff --git a/xen/include/xen/softirq.h b/xen/include/xen/softirq.h index 48f17e49ef..49da6974fe 100644 --- a/xen/include/xen/softirq.h +++ b/xen/include/xen/softirq.h @@ -1,7 +1,7 @@ #ifndef XEN_SOFTIRQ_H #define XEN_SOFTIRQ_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* Low-latency softirqs come first in the following list. */ enum { @@ -58,6 +58,6 @@ void cpu_raise_softirq_batch_finish(void); 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] ARM: Drop ThumbEE support Message-Id: Date: Fri, 05 Dec 2025 21:33:11 +0000 commit 5bbe1fe413f9d6a841b0bc70db024b1398391630 Author: Andrew Cooper AuthorDate: Wed Dec 3 17:00:04 2025 +0000 Commit: Andrew Cooper CommitDate: Fri Dec 5 18:06:19 2025 +0000 ARM: Drop ThumbEE support Hans reports that Xen no longer builds on Debian unstable/sid: Assembler messages: {standard input}:474: Error: unknown or missing system register name at operand 1 -- `msr TEECR32_EL1,x0' {standard input}:480: Error: unknown or missing system register name at operand 1 -- `msr TEEHBR32_EL1,x0' {standard input}:488: Error: unknown or missing system register name at operand 2 -- `mrs x0,TEECR32_EL1' {standard input}:494: Error: unknown or missing system register name at operand 2 -- `mrs x0,TEEHBR32_EL1' make[5]: *** [Rules.mk:249: arch/arm/domain.o] Error 1 This turns out to be an intentional change in binutils. ThumbEE was dropped ahead of ARM v8 (i.e. AArch64). Xen supports ARM v7+virt extensions so in principle we could #ifdef CONFIG_ARM_32 to keep it working. However, there was apparently no use of ThumbEE outside of demo code, so simply drop it. On ThumbEE capable hardware, unconditionally trap ThumbEE instructions, and drop the context switching logic for TEE{CR,HBR}32. Reported-by: Hans van Kranenburg Signed-off-by: Andrew Cooper Reviewed-by: Bertrand Marquis --- xen/arch/arm/domain.c | 12 ------------ xen/arch/arm/include/asm/domain.h | 1 - xen/arch/arm/include/asm/processor.h | 1 + xen/arch/arm/traps.c | 4 ++-- 4 files changed, 3 insertions(+), 15 deletions(-) diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index ab78444335..3e32a15cac 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -111,12 +111,6 @@ static void ctxt_switch_from(struct vcpu *p) p->arch.cntkctl = READ_SYSREG(CNTKCTL_EL1); virt_timer_save(p); - if ( is_32bit_domain(p->domain) && cpu_has_thumbee ) - { - p->arch.teecr = READ_SYSREG(TEECR32_EL1); - p->arch.teehbr = READ_SYSREG(TEEHBR32_EL1); - } - #ifdef CONFIG_ARM_32 p->arch.joscr = READ_CP32(JOSCR); p->arch.jmcr = READ_CP32(JMCR); @@ -244,12 +238,6 @@ static void ctxt_switch_to(struct vcpu *n) WRITE_SYSREG(n->arch.tpidrro_el0, TPIDRRO_EL0); WRITE_SYSREG(n->arch.tpidr_el1, TPIDR_EL1); - if ( is_32bit_domain(n->domain) && cpu_has_thumbee ) - { - WRITE_SYSREG(n->arch.teecr, TEECR32_EL1); - WRITE_SYSREG(n->arch.teehbr, TEEHBR32_EL1); - } - #ifdef CONFIG_ARM_32 WRITE_CP32(n->arch.joscr, JOSCR); WRITE_CP32(n->arch.jmcr, JMCR); diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h index af3e168374..758ad807e4 100644 --- a/xen/arch/arm/include/asm/domain.h +++ b/xen/arch/arm/include/asm/domain.h @@ -211,7 +211,6 @@ struct arch_vcpu register_t hcr_el2; register_t mdcr_el2; - uint32_t teecr, teehbr; /* ThumbEE, 32-bit guests only */ #ifdef CONFIG_ARM_32 /* * ARMv8 only supports a trivial implementation on Jazelle when in AArch32 diff --git a/xen/arch/arm/include/asm/processor.h b/xen/arch/arm/include/asm/processor.h index ed56746368..1a48c9ff3b 100644 --- a/xen/arch/arm/include/asm/processor.h +++ b/xen/arch/arm/include/asm/processor.h @@ -411,6 +411,7 @@ /* HSTR Hyp. System Trap Register */ #define HSTR_T(x) ((_AC(1,U)<<(x))) /* Trap Cp15 c */ +#define HSTR_TTEE (_AC(1,U)<<16) /* Trap ThumbEE */ /* HDCR Hyp. Debug Configuration Register */ #define HDCR_TDRA (_AC(1,U)<<11) /* Trap Debug ROM access */ diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index 2bc3e1df04..040c0f2e0d 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -158,8 +158,8 @@ void init_traps(void) WRITE_SYSREG(HDCR_TDRA|HDCR_TDOSA|HDCR_TDA|HDCR_TPM|HDCR_TPMCR, MDCR_EL2); - /* Trap CP15 c15 used for implementation defined registers */ - WRITE_SYSREG(HSTR_T(15), HSTR_EL2); + /* Trap CP15 c15 used for implementation defined registers, and ThumbEE. */ + WRITE_SYSREG(HSTR_T(15) | (cpu_has_thumbee ? HSTR_TTEE : 0), HSTR_EL2); WRITE_SYSREG(get_default_cptr_flags(), CPTR_EL2); -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Fri Dec 05 21:33:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 05 Dec 2025 21:33:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179514.1502982 (Exim 4.92) (envelope-from ) id 1vRdQZ-0008QG-4M; Fri, 05 Dec 2025 21:33:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1179514.1502982; Fri, 05 Dec 2025 21:33:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRdQZ-0008Q8-1m; Fri, 05 Dec 2025 21:33:23 +0000 Received: by outflank-mailman (input) for mailman id 1179514; Fri, 05 Dec 2025 21:33:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRdQY-0008Q2-7F for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 21:33:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRdQY-008Q5S-0c for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 21:33:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRdQY-006ODy-0T for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 21:33:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=77uN/uLYCGkpS6/AztnIY6EWYb6aLyX3ZqNSUMhqD8M=; b=fZqMJYm0YyebxfCUvDRgQIJS8t YoXTkQur9hg3de86t4E154C9+SXz/5ptb7M0lfNPvhHNO3TkyHOpaSLm039OSLhZyZbAmg/nfVPcI whuAvkuZfCorEVY4Mx9P3y8bXAjL88dhTUh5mNCViYwoKGOYlBWlfqFouab0OnJlSedw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] systemd: fall back to default system-sleep dir without systemd-devel Message-Id: Date: Fri, 05 Dec 2025 21:33:22 +0000 commit b34bde262c8cf69fa235045108a0bc0309c63eac Author: Mykola Kvach AuthorDate: Fri Dec 5 18:07:15 2025 +0200 Commit: Andrew Cooper CommitDate: Fri Dec 5 18:06:19 2025 +0000 systemd: fall back to default system-sleep dir without systemd-devel Keep the pkg-config lookup for SYSTEMD_SLEEP_DIR, but fall back to "$(prefix)/lib/systemd/system-sleep/" if the variable remains unset. This avoids reintroducing a build-time dependency on systemd-devel while still honoring the path provided by pkg-config when present. Fixes: e54a6cd6a1f3 ("systemd: Add hooks to stop/start xen-watchdog on suspend/resume") Reported-by: Marek Marczykowski-Górecki Suggested-by: Andrew Cooper Signed-off-by: Mykola Kvach Acked-by: Andrew Cooper --- m4/systemd.m4 | 2 +- tools/configure | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/m4/systemd.m4 b/m4/systemd.m4 index c47a25ef93..5fb5a7089e 100644 --- a/m4/systemd.m4 +++ b/m4/systemd.m4 @@ -81,7 +81,7 @@ AC_DEFUN([AX_CHECK_SYSTEMD_LIBS], [ ], []) AS_IF([test "x$SYSTEMD_SLEEP_DIR" = x], [ - AC_MSG_ERROR([SYSTEMD_SLEEP_DIR is unset]) + SYSTEMD_SLEEP_DIR="\$(prefix)/lib/systemd/system-sleep/" ], []) ]) diff --git a/tools/configure b/tools/configure index 479c7c9a3c..6f69b0b526 100755 --- a/tools/configure +++ b/tools/configure @@ -10360,7 +10360,7 @@ fi if test "x$SYSTEMD_SLEEP_DIR" = x then : - as_fn_error $? "SYSTEMD_SLEEP_DIR is unset" "$LINENO" 5 + SYSTEMD_SLEEP_DIR="\$(prefix)/lib/systemd/system-sleep/" fi -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Fri Dec 05 21:33:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 05 Dec 2025 21:33:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179515.1502986 (Exim 4.92) (envelope-from ) id 1vRdQj-0008SL-5g; Fri, 05 Dec 2025 21:33:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1179515.1502986; Fri, 05 Dec 2025 21:33:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRdQj-0008SB-34; Fri, 05 Dec 2025 21:33:33 +0000 Received: by outflank-mailman (input) for mailman id 1179515; Fri, 05 Dec 2025 21:33:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRdQi-0008Rz-CJ for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 21:33:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRdQi-008Q7u-18 for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 21:33:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRdQi-006P1i-0q for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 21:33:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=zMaaxcTrzSaLA45djRixx694gFUNH+HM2DPgP8vHwCM=; b=pQu9DbyBuLf//qimEkl6idPx6A tGB8h6VTpP0k6+2RG4Yu6hvWCm2e4Yb4LHDHo/o703ov9DyA9ysH5CTV2Q3r9i53yD4tl5ueYBLe2 ezq7n/Q2sqm+tYKYb1IY/xzPjrN/XZcwQG1W7ogVO7IqUaYtukWMBmuQINZ/BzlCz1os=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] public/trace: Add U suffix to TRC_PV_HYPERCALL_V2_ARG_MASK Message-Id: Date: Fri, 05 Dec 2025 21:33:32 +0000 commit 13721c45b01665e0629e2141ff2b0d18e516280d Author: Michal Orzel AuthorDate: Fri Dec 5 12:49:58 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 5 18:06:19 2025 +0000 public/trace: Add U suffix to TRC_PV_HYPERCALL_V2_ARG_MASK TRC_PV_HYPERCALL_V2_ARG_MASK represents unsigned type, so according to MISRA C R7.2. U suffix should be applied. Fix the violation. Signed-off-by: Michal Orzel Reviewed-by: Andrew Cooper --- xen/include/public/trace.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/include/public/trace.h b/xen/include/public/trace.h index 141efa0ea7..78c31a0008 100644 --- a/xen/include/public/trace.h +++ b/xen/include/public/trace.h @@ -157,7 +157,7 @@ */ #define TRC_PV_HYPERCALL_V2_ARG_32(i) (0x1 << (20 + 2*(i))) #define TRC_PV_HYPERCALL_V2_ARG_64(i) (0x2 << (20 + 2*(i))) -#define TRC_PV_HYPERCALL_V2_ARG_MASK (0xfff00000) +#define TRC_PV_HYPERCALL_V2_ARG_MASK 0xfff00000U #define TRC_SHADOW_NOT_SHADOW (TRC_SHADOW + 1) #define TRC_SHADOW_FAST_PROPAGATE (TRC_SHADOW + 2) -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Fri Dec 05 21:33:43 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 05 Dec 2025 21:33:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179516.1502989 (Exim 4.92) (envelope-from ) id 1vRdQt-0008Ul-6q; Fri, 05 Dec 2025 21:33:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1179516.1502989; Fri, 05 Dec 2025 21:33:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRdQt-0008Ud-4Q; Fri, 05 Dec 2025 21:33:43 +0000 Received: by outflank-mailman (input) for mailman id 1179516; Fri, 05 Dec 2025 21:33:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRdQs-0008UW-FM for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 21:33:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRdQs-008Q81-1R for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 21:33:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRdQs-006PyS-1K for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 21:33:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Ok3VxfWTPoLI3443VynYUvzUg/1C2AH3N0ZVvB8UDfM=; b=wfd7GQ4Lr1Hjbag8bPU6cwonvv TdeJVZUxkCWrqzvsII6+4cvykVtUo89xyjXKCxaTWseeVhSuNzNTPoZl/CGVv+zSMgTTsCnn6pbT3 itPALakWgObSkBTG3MVXH0ztCljU+o4ReqeS5/G6Yus8Aq9oUYW9g8FUx3zbFzCq9Yic=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] common/kernel: Rename hypfs "params" variable Message-Id: Date: Fri, 05 Dec 2025 21:33:42 +0000 commit 59f163cca522b99570f7c382152b83b532fec389 Author: Michal Orzel AuthorDate: Fri Dec 5 12:49:59 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 5 18:06:19 2025 +0000 common/kernel: Rename hypfs "params" variable Inside do_xen_version, there are two other places using local variables named "params". Rename hypfs dir "params" to "params_dir". This resolves MISRA C R5.3 violation. Signed-off-by: Michal Orzel Reviewed-by: Andrew Cooper --- xen/common/kernel.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/xen/common/kernel.c b/xen/common/kernel.c index e6979352e1..fb45f81399 100644 --- a/xen/common/kernel.c +++ b/xen/common/kernel.c @@ -483,13 +483,13 @@ static int __init cf_check buildinfo_init(void) } __initcall(buildinfo_init); -static HYPFS_DIR_INIT(params, "params"); +static HYPFS_DIR_INIT(params_dir, "params"); static int __init cf_check param_init(void) { struct param_hypfs *param; - hypfs_add_dir(&hypfs_root, ¶ms, true); + hypfs_add_dir(&hypfs_root, ¶ms_dir, true); for ( param = __paramhypfs_start; param < __paramhypfs_end; param++ ) { @@ -497,7 +497,7 @@ static int __init cf_check param_init(void) param->init_leaf(param); else if ( param->hypfs.e.type == XEN_HYPFS_TYPE_STRING ) param->hypfs.e.size = strlen(param->hypfs.u.content) + 1; - hypfs_add_leaf(¶ms, ¶m->hypfs, true); + hypfs_add_leaf(¶ms_dir, ¶m->hypfs, true); } return 0; -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Fri Dec 05 21:33:54 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 05 Dec 2025 21:33:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179517.1502994 (Exim 4.92) (envelope-from ) id 1vRdR4-00005X-8a; Fri, 05 Dec 2025 21:33:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1179517.1502994; Fri, 05 Dec 2025 21:33:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRdR4-00005O-5i; Fri, 05 Dec 2025 21:33:54 +0000 Received: by outflank-mailman (input) for mailman id 1179517; Fri, 05 Dec 2025 21:33:52 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRdR2-00005C-IB for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 21:33:52 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRdR2-008Q8L-1j for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 21:33:52 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRdR2-006Qu2-1c for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 21:33:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=2EKj5jW9mhckcQxzXow+QofO0Q9ikvS3Uz2pL16p35g=; b=YMBXxqMBlf9EO6aX68w5IUfTY3 Z8wzT0WqoaFG+a/8NRRVZnIxhHVQAxBLtKjqR1H0/kRFrnGPTcZfpsCVQo7K2Htpu+JeFLZrF7VUt XznrToWeZhUcVDfc66QkXsr4jWLs6IgdILy9DR0xCvS4ruwKdCGyB4baLVAOTcn3FXlg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/hypfs: Enclose HYPFS_DIR_INIT var parameter in parentheses Message-Id: Date: Fri, 05 Dec 2025 21:33:52 +0000 commit d430c0a66e102fb12baeec6a178c20da7864d5b5 Author: Michal Orzel AuthorDate: Fri Dec 5 12:50:00 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 5 18:06:19 2025 +0000 xen/hypfs: Enclose HYPFS_DIR_INIT var parameter in parentheses The var parameter is later on expanded and referenced by LIST_HEAD_INIT and shall be enclosed in parentheses. This resolves MISRA C R20.7 violation. Signed-off-by: Michal Orzel Reviewed-by: Juergen Gross --- xen/include/xen/hypfs.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/include/xen/hypfs.h b/xen/include/xen/hypfs.h index d8fcac23b4..fef667298b 100644 --- a/xen/include/xen/hypfs.h +++ b/xen/include/xen/hypfs.h @@ -95,9 +95,9 @@ struct hypfs_dyndir_id { .e.name = (nam), \ .e.size = 0, \ .e.max_size = 0, \ - .e.list = LIST_HEAD_INIT(var.e.list), \ + .e.list = LIST_HEAD_INIT((var).e.list), \ .e.funcs = (fn), \ - .dirlist = LIST_HEAD_INIT(var.dirlist), \ + .dirlist = LIST_HEAD_INIT((var).dirlist), \ } #define HYPFS_DIR_INIT(var, nam) \ -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Fri Dec 05 23:44:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 05 Dec 2025 23:44:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179615.1503048 (Exim 4.92) (envelope-from ) id 1vRfT2-0001Z4-1F; Fri, 05 Dec 2025 23:44:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1179615.1503048; Fri, 05 Dec 2025 23:44:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRfT1-0001Yx-UJ; Fri, 05 Dec 2025 23:44:03 +0000 Received: by outflank-mailman (input) for mailman id 1179615; Fri, 05 Dec 2025 23:44:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRfT0-0001Yr-81 for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 23:44:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRfT0-008Sui-0G for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 23:44:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRfT0-001KWk-07 for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 23:44:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=RxEzeaY6wPDFT0nhwA/hxcEltVoXLR3b5EANDbXN0Sg=; b=Wid4ZoYhHgDcn5SJ6wHq4ImKdz QYe3y4H093k53rVYczibSnGIMq0bRJL3kgxyCvL1B0zrpy49zNgsLvue0oJ6JhPT/iuajZj/CjOoI BOPujGA+uDFaMstpO2T10wfXqz9KE4p5o92TvrSLn1cRPBdWSkQTWOnsZmBIa9uyf+O4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/treewide: Use __ASSEMBLER__ instead of __ASSEMBLY__ Message-Id: Date: Fri, 05 Dec 2025 23:44:02 +0000 commit a199bb283bdb2a99d795d5f9c85d7fb9a68039a9 Author: Andrew Cooper AuthorDate: Tue Dec 2 17:28:37 2025 +0000 Commit: Andrew Cooper CommitDate: Fri Dec 5 18:06:19 2025 +0000 xen/treewide: Use __ASSEMBLER__ instead of __ASSEMBLY__ __ASSEMBLER__ is how GCC and Clang spell this, removing the need to set it up manually in AFLAGS. Signed-off-by: Andrew Cooper Reviewed-by: Alejandro Vallejo Reviewed-by: Oleksii Kurochko Acked-by: Jan Beulich Acked-by: Bertrand Marquis --- xen/Makefile | 2 -- xen/arch/arm/arm32/lib/assembler.h | 2 +- xen/arch/arm/arm64/lib/assembler.h | 2 +- xen/arch/arm/include/asm/alternative.h | 4 ++-- xen/arch/arm/include/asm/arm32/mpu.h | 4 ++-- xen/arch/arm/include/asm/arm32/page.h | 4 ++-- xen/arch/arm/include/asm/arm32/processor.h | 2 +- xen/arch/arm/include/asm/arm32/sysregs.h | 6 +++--- xen/arch/arm/include/asm/arm64/efibind.h | 2 +- xen/arch/arm/include/asm/arm64/mpu.h | 4 ++-- xen/arch/arm/include/asm/arm64/page.h | 4 ++-- xen/arch/arm/include/asm/arm64/processor.h | 4 ++-- xen/arch/arm/include/asm/arm64/sysregs.h | 6 +++--- xen/arch/arm/include/asm/config.h | 4 ++-- xen/arch/arm/include/asm/cpufeature.h | 4 ++-- xen/arch/arm/include/asm/current.h | 2 +- xen/arch/arm/include/asm/fixmap.h | 4 ++-- xen/arch/arm/include/asm/gic.h | 4 ++-- xen/arch/arm/include/asm/insn.h | 4 ++-- xen/arch/arm/include/asm/lpae.h | 4 ++-- xen/arch/arm/include/asm/macros.h | 2 +- xen/arch/arm/include/asm/mpu.h | 4 ++-- xen/arch/arm/include/asm/page.h | 4 ++-- xen/arch/arm/include/asm/pl011-uart.h | 4 ++-- xen/arch/arm/include/asm/processor.h | 8 ++++---- xen/arch/arm/include/asm/regs.h | 2 +- xen/arch/arm/include/asm/smccc.h | 4 ++-- xen/arch/arm/include/asm/smp.h | 2 +- xen/arch/arm/include/asm/sysregs.h | 4 ++-- xen/arch/ppc/include/asm/current.h | 4 ++-- xen/arch/ppc/include/asm/opal-api.h | 4 ++-- xen/arch/ppc/include/asm/processor.h | 4 ++-- xen/arch/riscv/include/asm/asm.h | 6 +++--- xen/arch/riscv/include/asm/bug.h | 4 ++-- xen/arch/riscv/include/asm/config.h | 4 ++-- xen/arch/riscv/include/asm/cpufeature.h | 4 ++-- xen/arch/riscv/include/asm/csr.h | 4 ++-- xen/arch/riscv/include/asm/current.h | 4 ++-- xen/arch/riscv/include/asm/fixmap.h | 4 ++-- xen/arch/riscv/include/asm/page.h | 4 ++-- xen/arch/riscv/include/asm/processor.h | 4 ++-- xen/arch/riscv/include/asm/regs.h | 4 ++-- xen/arch/riscv/include/asm/system.h | 4 ++-- xen/arch/riscv/include/asm/traps.h | 4 ++-- xen/arch/x86/boot/video.h | 4 ++-- xen/arch/x86/include/asm/alternative-asm.h | 4 ++-- xen/arch/x86/include/asm/alternative.h | 4 ++-- xen/arch/x86/include/asm/asm_defns.h | 12 ++++++------ xen/arch/x86/include/asm/bug.h | 6 +++--- xen/arch/x86/include/asm/cache.h | 2 +- xen/arch/x86/include/asm/config.h | 6 +++--- xen/arch/x86/include/asm/cpufeature.h | 6 +++--- xen/arch/x86/include/asm/cpufeatureset.h | 6 +++--- xen/arch/x86/include/asm/desc.h | 8 ++++---- xen/arch/x86/include/asm/edd.h | 4 ++-- xen/arch/x86/include/asm/fixmap.h | 4 ++-- xen/arch/x86/include/asm/ldt.h | 4 ++-- xen/arch/x86/include/asm/machine_kexec.h | 2 +- xen/arch/x86/include/asm/nops.h | 2 +- xen/arch/x86/include/asm/page.h | 20 ++++++++++---------- xen/arch/x86/include/asm/processor.h | 6 +++--- xen/arch/x86/include/asm/smp.h | 6 +++--- xen/arch/x86/include/asm/spec_ctrl.h | 4 ++-- xen/arch/x86/include/asm/spec_ctrl_asm.h | 4 ++-- xen/arch/x86/include/asm/trampoline.h | 4 ++-- xen/arch/x86/include/asm/x86_64/page.h | 6 +++--- xen/common/efi/boot.c | 6 +++--- xen/include/efi/pe.h | 4 ++-- xen/include/public/arch-arm.h | 4 ++-- xen/include/public/arch-ppc.h | 4 ++-- xen/include/public/arch-riscv.h | 2 +- xen/include/public/arch-x86/xen-mca.h | 4 ++-- xen/include/public/arch-x86/xen-x86_32.h | 4 ++-- xen/include/public/arch-x86/xen-x86_64.h | 4 ++-- xen/include/public/arch-x86/xen.h | 8 ++++---- xen/include/public/errno.h | 6 +++--- xen/include/public/tmem.h | 2 +- xen/include/public/xen.h | 10 +++++----- xen/include/xen/acpi.h | 4 ++-- xen/include/xen/bitmap.h | 4 ++-- xen/include/xen/bug.h | 4 ++-- xen/include/xen/config.h | 2 +- xen/include/xen/const.h | 2 +- xen/include/xen/err.h | 4 ++-- xen/include/xen/errno.h | 6 +++--- xen/include/xen/init.h | 4 ++-- xen/include/xen/kimage.h | 4 ++-- xen/include/xen/lib.h | 4 ++-- xen/include/xen/libfdt/fdt.h | 2 +- xen/include/xen/linkage.h | 4 ++-- xen/include/xen/macros.h | 4 ++-- xen/include/xen/multiboot.h | 4 ++-- xen/include/xen/multiboot2.h | 4 ++-- xen/include/xen/percpu.h | 4 ++-- xen/include/xen/pmap.h | 4 ++-- xen/include/xen/softirq.h | 4 ++-- 96 files changed, 208 insertions(+), 210 deletions(-) diff --git a/xen/Makefile b/xen/Makefile index fc9244420e..e6cf287425 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -412,8 +412,6 @@ ifneq ($(CONFIG_CC_IS_CLANG),y) CFLAGS += -Wa,--strip-local-absolute endif -AFLAGS += -D__ASSEMBLY__ - $(call cc-option-add,AFLAGS,CC,-Wa$$(comma)--noexecstack) LDFLAGS-$(call ld-option,--warn-rwx-segments) += --no-warn-rwx-segments diff --git a/xen/arch/arm/arm32/lib/assembler.h b/xen/arch/arm/arm32/lib/assembler.h index 6de2638a36..75d97ab0cc 100644 --- a/xen/arch/arm/arm32/lib/assembler.h +++ b/xen/arch/arm/arm32/lib/assembler.h @@ -17,7 +17,7 @@ #ifndef __ASM_ASSEMBLER_H__ #define __ASM_ASSEMBLER_H__ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #error "Only include this from assembly code" #endif diff --git a/xen/arch/arm/arm64/lib/assembler.h b/xen/arch/arm/arm64/lib/assembler.h index 3f9c0dcf5d..0fac7d1c6e 100644 --- a/xen/arch/arm/arm64/lib/assembler.h +++ b/xen/arch/arm/arm64/lib/assembler.h @@ -1,7 +1,7 @@ #ifndef __ASM_ASSEMBLER_H__ #define __ASM_ASSEMBLER_H__ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #error "Only include this from assembly code" #endif diff --git a/xen/arch/arm/include/asm/alternative.h b/xen/arch/arm/include/asm/alternative.h index 1563f03a0f..c751e11fc5 100644 --- a/xen/arch/arm/include/asm/alternative.h +++ b/xen/arch/arm/include/asm/alternative.h @@ -6,7 +6,7 @@ #define ARM_CB_PATCH ARM_NCAPS -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -206,7 +206,7 @@ alternative_endif #define _ALTERNATIVE_CFG(insn1, insn2, cap, cfg, ...) \ alternative_insn insn1, insn2, cap, IS_ENABLED(cfg) -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ /* * Usage: asm_inline (ALTERNATIVE(oldinstr, newinstr, feature)); diff --git a/xen/arch/arm/include/asm/arm32/mpu.h b/xen/arch/arm/include/asm/arm32/mpu.h index 137022d922..2cf0f8cbac 100644 --- a/xen/arch/arm/include/asm/arm32/mpu.h +++ b/xen/arch/arm/include/asm/arm32/mpu.h @@ -3,7 +3,7 @@ #ifndef ARM_ARM32_MPU_H #define ARM_ARM32_MPU_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* * Unlike arm64, there are no reserved 0 bits beyond base and limit bitfield in @@ -43,7 +43,7 @@ typedef struct { uint8_t pad[7]; /* Pad structure to 16 Bytes */ } pr_t; -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* ARM_ARM32_MPU_H */ diff --git a/xen/arch/arm/include/asm/arm32/page.h b/xen/arch/arm/include/asm/arm32/page.h index 6d1ff0636c..d3e86cb61e 100644 --- a/xen/arch/arm/include/asm/arm32/page.h +++ b/xen/arch/arm/include/asm/arm32/page.h @@ -1,7 +1,7 @@ #ifndef __ARM_ARM32_PAGE_H__ #define __ARM_ARM32_PAGE_H__ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* Inline ASM to invalidate dcache on register R (may be an inline asm operand) */ #define __invalidate_dcache_one(R) STORE_CP32(R, DCIMVAC) @@ -87,7 +87,7 @@ static inline uint64_t gva_to_ipa_par(vaddr_t va, unsigned int flags) #define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __ARM_ARM32_PAGE_H__ */ diff --git a/xen/arch/arm/include/asm/arm32/processor.h b/xen/arch/arm/include/asm/arm32/processor.h index 4e679f3273..254bc4867c 100644 --- a/xen/arch/arm/include/asm/arm32/processor.h +++ b/xen/arch/arm/include/asm/arm32/processor.h @@ -3,7 +3,7 @@ #define ACTLR_CAXX_SMP (1<<6) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* On stack VCPU state */ struct cpu_user_regs { diff --git a/xen/arch/arm/include/asm/arm32/sysregs.h b/xen/arch/arm/include/asm/arm32/sysregs.h index ef1a870fd6..33ac0c4fdb 100644 --- a/xen/arch/arm/include/asm/arm32/sysregs.h +++ b/xen/arch/arm/include/asm/arm32/sysregs.h @@ -25,11 +25,11 @@ #define REGION_DATA_PRBAR 0x19 /* SH=11 AP=00 XN=1 */ #define REGION_DEVICE_PRBAR 0x11 /* SH=10 AP=00 XN=1 */ -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #define WRITE_SYSREG_ASM(v, name) mcr CP32(v, name) -#else /* __ASSEMBLY__ */ +#else /* __ASSEMBLER__ */ /* C wrappers */ #define READ_CP32(name...) ({ \ @@ -93,7 +93,7 @@ /* MVFR2 is not defined on ARMv7 */ #define MVFR2_MAYBE_UNDEFINED -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* __ASM_ARM_ARM32_SYSREGS_H */ /* diff --git a/xen/arch/arm/include/asm/arm64/efibind.h b/xen/arch/arm/include/asm/arm64/efibind.h index a1323d452e..7ab00e4f55 100644 --- a/xen/arch/arm/include/asm/arm64/efibind.h +++ b/xen/arch/arm/include/asm/arm64/efibind.h @@ -31,7 +31,7 @@ Revision History #define EFI_STUB_ERROR MAX_ADDRESS -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ // // Basic int types of various widths // diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h index 17f62ccaf6..4f694190a8 100644 --- a/xen/arch/arm/include/asm/arm64/mpu.h +++ b/xen/arch/arm/include/asm/arm64/mpu.h @@ -3,7 +3,7 @@ #ifndef ARM_ARM64_MPU_H #define ARM_ARM64_MPU_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #define MPU_REGION_RES0 (0xFFFFULL << 48) @@ -42,7 +42,7 @@ typedef struct { uint8_t pad[15]; /* Pad structure to 32 Bytes */ } pr_t; -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* ARM_ARM64_MPU_H */ diff --git a/xen/arch/arm/include/asm/arm64/page.h b/xen/arch/arm/include/asm/arm64/page.h index e944985ee0..f3ba30730b 100644 --- a/xen/arch/arm/include/asm/arm64/page.h +++ b/xen/arch/arm/include/asm/arm64/page.h @@ -1,7 +1,7 @@ #ifndef __ARM_ARM64_PAGE_H__ #define __ARM_ARM64_PAGE_H__ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include @@ -77,7 +77,7 @@ static inline uint64_t gva_to_ipa_par(vaddr_t va, unsigned int flags) extern void clear_page(void *to); -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __ARM_ARM64_PAGE_H__ */ diff --git a/xen/arch/arm/include/asm/arm64/processor.h b/xen/arch/arm/include/asm/arm64/processor.h index c749f80ad9..0513015bbb 100644 --- a/xen/arch/arm/include/asm/arm64/processor.h +++ b/xen/arch/arm/include/asm/arm64/processor.h @@ -1,7 +1,7 @@ #ifndef __ASM_ARM_ARM64_PROCESSOR_H #define __ASM_ARM_ARM64_PROCESSOR_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* Anonymous union includes both 32- and 64-bit names (e.g., r0/x0). */ @@ -86,7 +86,7 @@ struct cpu_user_regs #undef __DECL_REG -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __ASM_ARM_ARM64_PROCESSOR_H */ /* diff --git a/xen/arch/arm/include/asm/arm64/sysregs.h b/xen/arch/arm/include/asm/arm64/sysregs.h index 7440d495e4..7dfd20414d 100644 --- a/xen/arch/arm/include/asm/arm64/sysregs.h +++ b/xen/arch/arm/include/asm/arm64/sysregs.h @@ -467,11 +467,11 @@ #define REGION_DATA_PRBAR 0x32 /* SH=11 AP=00 XN=10 */ #define REGION_DEVICE_PRBAR 0x22 /* SH=10 AP=00 XN=10 */ -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #define WRITE_SYSREG_ASM(v, name) "msr " __stringify(name,) #v -#else /* __ASSEMBLY__ */ +#else /* __ASSEMBLER__ */ /* Access to system registers */ @@ -492,7 +492,7 @@ #define WRITE_SYSREG_LR(v, index) WRITE_SYSREG(v, ICH_LR_REG(index)) #define READ_SYSREG_LR(index) READ_SYSREG(ICH_LR_REG(index)) -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* _ASM_ARM_ARM64_SYSREGS_H */ diff --git a/xen/arch/arm/include/asm/config.h b/xen/arch/arm/include/asm/config.h index f18825bc2d..a077ec49b7 100644 --- a/xen/arch/arm/include/asm/config.h +++ b/xen/arch/arm/include/asm/config.h @@ -44,7 +44,7 @@ #define CONFIG_AEABI /* Linkage for ARM */ -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #define GLOBAL(name) \ .globl name; \ name: @@ -69,7 +69,7 @@ #define watchdog_disable() ((void)0) #define watchdog_enable() ((void)0) -#if defined(__ASSEMBLY__) && !defined(LINKER_SCRIPT) +#if defined(__ASSEMBLER__) && !defined(LINKER_SCRIPT) #include #include #endif diff --git a/xen/arch/arm/include/asm/cpufeature.h b/xen/arch/arm/include/asm/cpufeature.h index b6df188011..13353c8e1a 100644 --- a/xen/arch/arm/include/asm/cpufeature.h +++ b/xen/arch/arm/include/asm/cpufeature.h @@ -79,7 +79,7 @@ #define ARM_NCAPS 18 -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -461,7 +461,7 @@ extern struct cpuinfo_arm cpu_data[]; extern struct cpuinfo_arm domain_cpuinfo; -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* diff --git a/xen/arch/arm/include/asm/current.h b/xen/arch/arm/include/asm/current.h index 0be7ad6ef9..8254363fda 100644 --- a/xen/arch/arm/include/asm/current.h +++ b/xen/arch/arm/include/asm/current.h @@ -11,7 +11,7 @@ #define CPUINFO_WORKAROUND_2_FLAG_SHIFT 0 #define CPUINFO_WORKAROUND_2_FLAG (_AC(1, U) << CPUINFO_WORKAROUND_2_FLAG_SHIFT) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ struct vcpu; diff --git a/xen/arch/arm/include/asm/fixmap.h b/xen/arch/arm/include/asm/fixmap.h index 0cb5d54d1c..84d55e4c28 100644 --- a/xen/arch/arm/include/asm/fixmap.h +++ b/xen/arch/arm/include/asm/fixmap.h @@ -20,7 +20,7 @@ #define FIXADDR_START FIXMAP_ADDR(0) #define FIXADDR_TOP FIXMAP_ADDR(FIX_LAST + 1) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* * Direct access to xen_fixmap[] should only happen when {set, @@ -43,6 +43,6 @@ static inline unsigned int virt_to_fix(vaddr_t vaddr) return ((vaddr - FIXADDR_START) >> PAGE_SHIFT); } -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __ASM_FIXMAP_H */ diff --git a/xen/arch/arm/include/asm/gic.h b/xen/arch/arm/include/asm/gic.h index 3947c8634d..8e713aa477 100644 --- a/xen/arch/arm/include/asm/gic.h +++ b/xen/arch/arm/include/asm/gic.h @@ -158,7 +158,7 @@ #define GICH_LR_PENDING 1 #define GICH_LR_ACTIVE 2 -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -479,7 +479,7 @@ unsigned long gic_get_hwdom_madt_size(const struct domain *d); int gic_map_hwdom_extra_mappings(struct domain *d); int gic_iomem_deny_access(struct domain *d); -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* diff --git a/xen/arch/arm/include/asm/insn.h b/xen/arch/arm/include/asm/insn.h index 27271e95f9..db32babd23 100644 --- a/xen/arch/arm/include/asm/insn.h +++ b/xen/arch/arm/include/asm/insn.h @@ -1,7 +1,7 @@ #ifndef __ARCH_ARM_INSN #define __ARCH_ARM_INSN -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include @@ -13,7 +13,7 @@ # error "unknown ARM variant" #endif -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ /* On ARM32,64 instructions are always 4 bytes long. */ #define ARCH_PATCH_INSN_SIZE 4 diff --git a/xen/arch/arm/include/asm/lpae.h b/xen/arch/arm/include/asm/lpae.h index 4a1679cb33..8e062c9e37 100644 --- a/xen/arch/arm/include/asm/lpae.h +++ b/xen/arch/arm/include/asm/lpae.h @@ -1,7 +1,7 @@ #ifndef __ARM_LPAE_H__ #define __ARM_LPAE_H__ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -176,7 +176,7 @@ static inline bool lpae_is_superpage(lpae_t pte, unsigned int level) */ lpae_t mfn_to_xen_entry(mfn_t mfn, unsigned int attr); -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ /* * AArch64 supports pages with different sizes (4K, 16K, and 64K). diff --git a/xen/arch/arm/include/asm/macros.h b/xen/arch/arm/include/asm/macros.h index dc791245df..9e8793107e 100644 --- a/xen/arch/arm/include/asm/macros.h +++ b/xen/arch/arm/include/asm/macros.h @@ -1,7 +1,7 @@ #ifndef __ASM_MACROS_H #define __ASM_MACROS_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ # error "This file should only be included in assembly file" #endif diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h index 5053edaf63..72fa5b00b8 100644 --- a/xen/arch/arm/include/asm/mpu.h +++ b/xen/arch/arm/include/asm/mpu.h @@ -25,7 +25,7 @@ #define PRENR_MASK GENMASK(31, 0) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* * Set base address of MPU protection region. @@ -87,7 +87,7 @@ static inline bool region_is_valid(const pr_t *pr) return pr->prlar.reg.en; } -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __ARM_MPU_H__ */ diff --git a/xen/arch/arm/include/asm/page.h b/xen/arch/arm/include/asm/page.h index 03bdf52ce0..90100a96df 100644 --- a/xen/arch/arm/include/asm/page.h +++ b/xen/arch/arm/include/asm/page.h @@ -121,7 +121,7 @@ #define GV2M_WRITE (1u<<0) #define GV2M_EXEC (1u<<1) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -320,7 +320,7 @@ static inline int gva_to_ipa(vaddr_t va, paddr_t *paddr, unsigned int flags) /* Bits in the PAR returned by va_to_par */ #define PAR_FAULT 0x1 -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __ARM_PAGE_H__ */ diff --git a/xen/arch/arm/include/asm/pl011-uart.h b/xen/arch/arm/include/asm/pl011-uart.h index 27c9bfa444..a991b274cd 100644 --- a/xen/arch/arm/include/asm/pl011-uart.h +++ b/xen/arch/arm/include/asm/pl011-uart.h @@ -21,7 +21,7 @@ #ifndef __ASM_ARM_PL011_H #define __ASM_ARM_PL011_H -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ /* * PL011 registers are 8/16-bit wide. However, there are implementations that @@ -38,7 +38,7 @@ #define PL011_LDRH ldrh #endif -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ /* PL011 register addresses */ #define DR (0x00) diff --git a/xen/arch/arm/include/asm/processor.h b/xen/arch/arm/include/asm/processor.h index 92c8bc1a31..ed56746368 100644 --- a/xen/arch/arm/include/asm/processor.h +++ b/xen/arch/arm/include/asm/processor.h @@ -1,7 +1,7 @@ #ifndef __ASM_ARM_PROCESSOR_H #define __ASM_ARM_PROCESSOR_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #endif #include @@ -463,7 +463,7 @@ #define MM64_VMID_16_BITS_SUPPORT 0x2 #endif -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ extern register_t __cpu_logical_map[]; #define cpu_logical_map(cpu) __cpu_logical_map[cpu] @@ -570,7 +570,7 @@ extern register_t __cpu_logical_map[]; # error "unknown ARM variant" #endif -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ void noreturn panic_PAR(uint64_t par); /* Debugging functions are declared with external linkage to aid development. */ @@ -631,7 +631,7 @@ register_t get_default_cptr_flags(void); WRITE_SYSREG((v)->arch.hcr_el2, HCR_EL2); \ } while (0) -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __ASM_ARM_PROCESSOR_H */ /* * Local variables: diff --git a/xen/arch/arm/include/asm/regs.h b/xen/arch/arm/include/asm/regs.h index 0d9f239a77..490db9056d 100644 --- a/xen/arch/arm/include/asm/regs.h +++ b/xen/arch/arm/include/asm/regs.h @@ -3,7 +3,7 @@ #define PSR_MODE_MASK 0x1f -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include diff --git a/xen/arch/arm/include/asm/smccc.h b/xen/arch/arm/include/asm/smccc.h index a289c48b7f..441b3ab65d 100644 --- a/xen/arch/arm/include/asm/smccc.h +++ b/xen/arch/arm/include/asm/smccc.h @@ -54,7 +54,7 @@ #define ARM_SMCCC_FUNC_MASK _AC(0xFFFF,U) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ extern uint32_t smccc_ver; @@ -307,7 +307,7 @@ void arm_smccc_1_2_smc(const struct arm_smccc_1_2_regs *args, struct arm_smccc_1_2_regs *res); #endif /* CONFIG_ARM_64 */ -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ /* * Construct function identifier from call type (fast or standard), diff --git a/xen/arch/arm/include/asm/smp.h b/xen/arch/arm/include/asm/smp.h index f5c829e229..16ae0844e7 100644 --- a/xen/arch/arm/include/asm/smp.h +++ b/xen/arch/arm/include/asm/smp.h @@ -1,7 +1,7 @@ #ifndef __ASM_SMP_H #define __ASM_SMP_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include #include diff --git a/xen/arch/arm/include/asm/sysregs.h b/xen/arch/arm/include/asm/sysregs.h index 5c2d362be3..f6af987ef5 100644 --- a/xen/arch/arm/include/asm/sysregs.h +++ b/xen/arch/arm/include/asm/sysregs.h @@ -9,7 +9,7 @@ # error "unknown ARM variant" #endif -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include @@ -33,7 +33,7 @@ static inline register_t read_sysreg_par(void) return par_el1; } -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* __ASM_ARM_SYSREGS_H */ /* diff --git a/xen/arch/ppc/include/asm/current.h b/xen/arch/ppc/include/asm/current.h index e329a548e6..cd7af3e0c5 100644 --- a/xen/arch/ppc/include/asm/current.h +++ b/xen/arch/ppc/include/asm/current.h @@ -6,7 +6,7 @@ #include -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ struct vcpu; @@ -44,6 +44,6 @@ static inline struct cpu_info *get_cpu_info(void) #define get_per_cpu_offset() smp_processor_id() /* TODO: Fix this */ -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __ASM_PPC_CURRENT_H__ */ diff --git a/xen/arch/ppc/include/asm/opal-api.h b/xen/arch/ppc/include/asm/opal-api.h index 8790246f48..a83184a5c2 100644 --- a/xen/arch/ppc/include/asm/opal-api.h +++ b/xen/arch/ppc/include/asm/opal-api.h @@ -246,7 +246,7 @@ #define OPAL_CONFIG_IDLE_UNDO 0 #define OPAL_CONFIG_IDLE_APPLY 1 -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include @@ -1185,6 +1185,6 @@ struct opal_mpipl_fadump { struct opal_mpipl_region region[]; } __packed; -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __OPAL_API_H */ diff --git a/xen/arch/ppc/include/asm/processor.h b/xen/arch/ppc/include/asm/processor.h index 50161cc32d..242346cab9 100644 --- a/xen/arch/ppc/include/asm/processor.h +++ b/xen/arch/ppc/include/asm/processor.h @@ -134,7 +134,7 @@ /* Base address of interrupt vector table when LPCR[AIL]=3 */ #define AIL_VECTOR_BASE _AC(0xc000000000004000, UL) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include @@ -221,6 +221,6 @@ static inline void noreturn die(void) #define dump_execution_state() run_in_exception_handler(show_execution_state) -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* _ASM_PPC_PROCESSOR_H */ diff --git a/xen/arch/riscv/include/asm/asm.h b/xen/arch/riscv/include/asm/asm.h index 8b0403e2e4..e147b6f053 100644 --- a/xen/arch/riscv/include/asm/asm.h +++ b/xen/arch/riscv/include/asm/asm.h @@ -6,7 +6,7 @@ #ifndef ASM__RISCV__ASM_H #define ASM__RISCV__ASM_H -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #include #define __ASM_STR(x) x #else @@ -25,13 +25,13 @@ #define REG_S __REG_SEL(sd, sw) #if __SIZEOF_POINTER__ == 8 -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #define RISCV_PTR .dword #else #define RISCV_PTR ".dword" #endif #elif __SIZEOF_POINTER__ == 4 -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #define RISCV_PTR .word #else #define RISCV_PTR ".word" diff --git a/xen/arch/riscv/include/asm/bug.h b/xen/arch/riscv/include/asm/bug.h index c395b809c6..6ec8adc528 100644 --- a/xen/arch/riscv/include/asm/bug.h +++ b/xen/arch/riscv/include/asm/bug.h @@ -7,7 +7,7 @@ #ifndef ASM__RISCV__BUG_H #define ASM__RISCV__BUG_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #define BUG_INSTR "unimp" @@ -30,6 +30,6 @@ #define GET_INSN_LENGTH(insn) \ (((insn) & INSN_LENGTH_MASK) == INSN_LENGTH_32 ? 4 : 2) \ -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* ASM__RISCV__BUG_H */ diff --git a/xen/arch/riscv/include/asm/config.h b/xen/arch/riscv/include/asm/config.h index e150f28f53..1e08d3bf78 100644 --- a/xen/arch/riscv/include/asm/config.h +++ b/xen/arch/riscv/include/asm/config.h @@ -137,7 +137,7 @@ #define INVALID_VCPU_ID MAX_VIRT_CPUS /* Linkage for RISCV */ -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #define CODE_FILL /* empty */ #endif @@ -147,7 +147,7 @@ #define IDENT_AREA_SIZE 64 -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ extern unsigned long phys_offset; /* = load_start - XEN_VIRT_START */ #endif diff --git a/xen/arch/riscv/include/asm/cpufeature.h b/xen/arch/riscv/include/asm/cpufeature.h index 768b84b769..d42d7b294e 100644 --- a/xen/arch/riscv/include/asm/cpufeature.h +++ b/xen/arch/riscv/include/asm/cpufeature.h @@ -2,7 +2,7 @@ #ifndef ASM__RISCV__CPUFEATURE_H #define ASM__RISCV__CPUFEATURE_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include @@ -46,7 +46,7 @@ void riscv_fill_hwcap(void); bool riscv_isa_extension_available(const unsigned long *isa_bitmap, enum riscv_isa_ext_id id); -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* ASM__RISCV__CPUFEATURE_H */ diff --git a/xen/arch/riscv/include/asm/csr.h b/xen/arch/riscv/include/asm/csr.h index 775f1f170f..01876f8289 100644 --- a/xen/arch/riscv/include/asm/csr.h +++ b/xen/arch/riscv/include/asm/csr.h @@ -10,7 +10,7 @@ #include #include -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #define csr_read(csr) \ ({ \ @@ -78,6 +78,6 @@ : "memory" ); \ }) -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* ASM__RISCV__CSR_H */ diff --git a/xen/arch/riscv/include/asm/current.h b/xen/arch/riscv/include/asm/current.h index 1485bceea4..0c3ea70c2e 100644 --- a/xen/arch/riscv/include/asm/current.h +++ b/xen/arch/riscv/include/asm/current.h @@ -9,7 +9,7 @@ #include -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ register struct pcpu_info *tp asm ( "tp" ); @@ -52,6 +52,6 @@ DECLARE_PER_CPU(struct vcpu *, curr_vcpu); #define get_per_cpu_offset() __per_cpu_offset[smp_processor_id()] -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* ASM__RISCV__CURRENT_H */ diff --git a/xen/arch/riscv/include/asm/fixmap.h b/xen/arch/riscv/include/asm/fixmap.h index 5990c964aa..085d135c15 100644 --- a/xen/arch/riscv/include/asm/fixmap.h +++ b/xen/arch/riscv/include/asm/fixmap.h @@ -23,7 +23,7 @@ #define FIXADDR_START FIXMAP_ADDR(0) #define FIXADDR_TOP FIXMAP_ADDR(FIX_LAST + 1) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* * Direct access to xen_fixmap[] should only happen when {set, @@ -46,6 +46,6 @@ static inline unsigned int virt_to_fix(vaddr_t vaddr) return ((vaddr - FIXADDR_START) >> PAGE_SHIFT); } -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* ASM__RISCV__FIXMAP_H */ diff --git a/xen/arch/riscv/include/asm/page.h b/xen/arch/riscv/include/asm/page.h index ddcc4da0a3..7fde99f916 100644 --- a/xen/arch/riscv/include/asm/page.h +++ b/xen/arch/riscv/include/asm/page.h @@ -3,7 +3,7 @@ #ifndef ASM__RISCV__PAGE_H #define ASM__RISCV__PAGE_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -213,6 +213,6 @@ static inline pte_t pte_from_mfn(mfn_t mfn, pte_attr_t flags) pte_t pt_walk(vaddr_t va, unsigned int *pte_level); -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* ASM__RISCV__PAGE_H */ diff --git a/xen/arch/riscv/include/asm/processor.h b/xen/arch/riscv/include/asm/processor.h index 39696fb58d..2502045642 100644 --- a/xen/arch/riscv/include/asm/processor.h +++ b/xen/arch/riscv/include/asm/processor.h @@ -10,7 +10,7 @@ #ifndef ASM__RISCV__PROCESSOR_H #define ASM__RISCV__PROCESSOR_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* On stack VCPU state */ struct cpu_user_regs @@ -93,7 +93,7 @@ static inline void sfence_vma(void) #define dump_execution_state() run_in_exception_handler(show_execution_state) -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* ASM__RISCV__PROCESSOR_H */ diff --git a/xen/arch/riscv/include/asm/regs.h b/xen/arch/riscv/include/asm/regs.h index 218b9455bd..531958f3d7 100644 --- a/xen/arch/riscv/include/asm/regs.h +++ b/xen/arch/riscv/include/asm/regs.h @@ -2,7 +2,7 @@ #ifndef ASM__RISCV__REGS_H #define ASM__RISCV__REGS_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include @@ -15,7 +15,7 @@ static inline bool guest_mode(const struct cpu_user_regs *r) BUG_ON("unimplemented"); } -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* ASM__RISCV__REGS_H */ diff --git a/xen/arch/riscv/include/asm/system.h b/xen/arch/riscv/include/asm/system.h index 7b78d11e04..f33af64fd2 100644 --- a/xen/arch/riscv/include/asm/system.h +++ b/xen/arch/riscv/include/asm/system.h @@ -7,7 +7,7 @@ #include -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #define RISCV_FENCE(p, s) \ __asm__ __volatile__ ( "fence " #p "," #s : : : "memory" ) @@ -76,7 +76,7 @@ static inline bool local_irq_is_enabled(void) #define arch_fetch_and_add(x, v) __sync_fetch_and_add(x, v) -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* ASM__RISCV__SYSTEM_H */ diff --git a/xen/arch/riscv/include/asm/traps.h b/xen/arch/riscv/include/asm/traps.h index 72b8f6c475..21fa3c3259 100644 --- a/xen/arch/riscv/include/asm/traps.h +++ b/xen/arch/riscv/include/asm/traps.h @@ -5,12 +5,12 @@ #include -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ void do_trap(struct cpu_user_regs *cpu_regs); void handle_trap(void); void trap_init(void); -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* ASM__RISCV__TRAPS_H */ diff --git a/xen/arch/x86/boot/video.h b/xen/arch/x86/boot/video.h index 1203515f9e..7c28487917 100644 --- a/xen/arch/x86/boot/video.h +++ b/xen/arch/x86/boot/video.h @@ -28,7 +28,7 @@ /* The "recalculate timings" flag */ #define VIDEO_RECALC 0x8000 -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ struct boot_video_info { uint8_t orig_x; /* 0x00 */ uint8_t orig_y; /* 0x01 */ @@ -69,6 +69,6 @@ struct boot_video_info { }; extern struct boot_video_info boot_vid_info; -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __BOOT_VIDEO_H__ */ diff --git a/xen/arch/x86/include/asm/alternative-asm.h b/xen/arch/x86/include/asm/alternative-asm.h index 3eb0f4e8a0..d5c7f18160 100644 --- a/xen/arch/x86/include/asm/alternative-asm.h +++ b/xen/arch/x86/include/asm/alternative-asm.h @@ -3,7 +3,7 @@ #include -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ /* * Issue one struct alt_instr descriptor entry (need to put it into @@ -120,7 +120,7 @@ #undef decl_orig #undef as_true -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* _ASM_X86_ALTERNATIVE_ASM_H_ */ /* diff --git a/xen/arch/x86/include/asm/alternative.h b/xen/arch/x86/include/asm/alternative.h index 0482bbf7cb..18109e3dc5 100644 --- a/xen/arch/x86/include/asm/alternative.h +++ b/xen/arch/x86/include/asm/alternative.h @@ -8,7 +8,7 @@ #define ALT_FLAG_NOT (1 << 15) #define ALT_NOT(x) (ALT_FLAG_NOT | (x)) -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #include #else @@ -175,6 +175,6 @@ extern void alternative_instructions(void); /* Use this macro(s) if you need more than one output parameter. */ #define ASM_OUTPUT2(a...) a -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* __X86_ALTERNATIVE_H__ */ diff --git a/xen/arch/x86/include/asm/asm_defns.h b/xen/arch/x86/include/asm/asm_defns.h index 72a0082d31..9b75c9cae3 100644 --- a/xen/arch/x86/include/asm/asm_defns.h +++ b/xen/arch/x86/include/asm/asm_defns.h @@ -12,7 +12,7 @@ #include #include -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #include #include #ifndef CONFIG_INDIRECT_THUNK @@ -24,7 +24,7 @@ asm ( "\t.equ CONFIG_INDIRECT_THUNK, " __stringify(IS_ENABLED(CONFIG_INDIRECT_THUNK)) ); #endif -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* * This output constraint should be used for any inline asm which has a "call" @@ -57,14 +57,14 @@ register unsigned long current_stack_pointer asm("rsp"); #define ASSERT_INTERRUPTS_DISABLED \ ASSERT_INTERRUPT_STATUS(z, "INTERRUPTS DISABLED") -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ # define _ASM_EX(p) p-. #else # define _ASM_EX(p) #p "-." #endif /* Exception table entry */ -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ # define _ASM__EXTABLE(sfx, from, to) \ .section .ex_table##sfx, "a" ; \ .balign 4 ; \ @@ -81,7 +81,7 @@ register unsigned long current_stack_pointer asm("rsp"); #define _ASM_EXTABLE(from, to) _ASM__EXTABLE(, from, to) #define _ASM_PRE_EXTABLE(from, to) _ASM__EXTABLE(.pre, from, to) -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ .macro BUILD_BUG_ON condstr, cond:vararg .if \cond @@ -221,7 +221,7 @@ static always_inline void stac(void) } #endif -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ .macro SAVE_ALL compat=0 addq $-(UREGS_error_code-UREGS_r15), %rsp cld diff --git a/xen/arch/x86/include/asm/bug.h b/xen/arch/x86/include/asm/bug.h index e748b6c2f2..3a4f41e380 100644 --- a/xen/arch/x86/include/asm/bug.h +++ b/xen/arch/x86/include/asm/bug.h @@ -19,12 +19,12 @@ * ... */ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #define BUG_INSTR "ud2" #define BUG_ASM_CONST "c" -#else /* !__ASSEMBLY__ */ +#else /* !__ASSEMBLER__ */ /* * Construct a bugframe, suitable for using in assembly code. Should always @@ -66,6 +66,6 @@ #define ASSERT_FAILED(msg) \ BUG_FRAME BUGFRAME_assert, __LINE__, __FILE__, 1, msg -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* __X86_BUG_H__ */ diff --git a/xen/arch/x86/include/asm/cache.h b/xen/arch/x86/include/asm/cache.h index f15d10dc7f..e17a10b49e 100644 --- a/xen/arch/x86/include/asm/cache.h +++ b/xen/arch/x86/include/asm/cache.h @@ -9,7 +9,7 @@ #define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT) #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ void cache_flush(const void *addr, unsigned int size); void cache_writeback(const void *addr, unsigned int size); diff --git a/xen/arch/x86/include/asm/config.h b/xen/arch/x86/include/asm/config.h index 3553bf89dc..1563696954 100644 --- a/xen/arch/x86/include/asm/config.h +++ b/xen/arch/x86/include/asm/config.h @@ -32,7 +32,7 @@ #define OPT_CONSOLE_STR "vga" /* Linkage for x86 */ -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #define CODE_FILL 0x90 #endif @@ -195,7 +195,7 @@ #endif #define DIRECTMAP_VIRT_END (DIRECTMAP_VIRT_START + DIRECTMAP_SIZE) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #ifdef CONFIG_PV32 @@ -237,7 +237,7 @@ #define __OS "q" /* Operation Suffix */ #define __OP "r" /* Operand Prefix */ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ extern unsigned long xen_phys_start; #endif diff --git a/xen/arch/x86/include/asm/cpufeature.h b/xen/arch/x86/include/asm/cpufeature.h index 0b764b9fb9..28c4085cc7 100644 --- a/xen/arch/x86/include/asm/cpufeature.h +++ b/xen/arch/x86/include/asm/cpufeature.h @@ -10,7 +10,7 @@ #include #include -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #else #include @@ -38,7 +38,7 @@ #define VFM_FAMILY(vfm) MASK_EXTR(vfm, VFM_FAMILY_MASK) #define VFM_VENDOR(vfm) MASK_EXTR(vfm, VFM_VENDOR_MASK) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ struct cpuinfo_x86 { /* TODO: Phase out the x86 prefixed names. */ @@ -349,7 +349,7 @@ struct cpuid4_info { }; int cpuid4_cache_lookup(int index, struct cpuid4_info *this_leaf); -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* __ASM_I386_CPUFEATURE_H */ diff --git a/xen/arch/x86/include/asm/cpufeatureset.h b/xen/arch/x86/include/asm/cpufeatureset.h index a9c51bc514..e12b54ab22 100644 --- a/xen/arch/x86/include/asm/cpufeatureset.h +++ b/xen/arch/x86/include/asm/cpufeatureset.h @@ -1,7 +1,7 @@ #ifndef __XEN_X86_CPUFEATURESET_H__ #define __XEN_X86_CPUFEATURESET_H__ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include @@ -17,13 +17,13 @@ enum { #include #include -#else /* !__ASSEMBLY__ */ +#else /* !__ASSEMBLER__ */ #define XEN_CPUFEATURE(name, value) .equ X86_FEATURE_##name, value #include #include -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #undef XEN_CPUFEATURE diff --git a/xen/arch/x86/include/asm/desc.h b/xen/arch/x86/include/asm/desc.h index 85fae6b2f9..dcbdac3ff7 100644 --- a/xen/arch/x86/include/asm/desc.h +++ b/xen/arch/x86/include/asm/desc.h @@ -42,7 +42,7 @@ #define LDT_SELECTOR (LDT_ENTRY << 3) #define PER_CPU_SELECTOR (PER_CPU_GDT_ENTRY << 3) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #define GUEST_KERNEL_RPL(d) (is_pv_32bit_domain(d) ? 1 : 3) @@ -76,7 +76,7 @@ FLAT_COMPAT_KERNEL_CS)) || \ ((sel) & 4)) /* LDT seg? */ -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ /* These are bitmasks for the high 32 bits of a descriptor table entry. */ #define _SEGMENT_TYPE (15<< 8) @@ -92,7 +92,7 @@ #define _SEGMENT_DB ( 1<<22) /* 16- or 32-bit segment */ #define _SEGMENT_G ( 1<<23) /* Granularity */ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* System Descriptor types for GDT and IDT entries. */ #define SYS_DESC_tss16_avail 1 @@ -162,6 +162,6 @@ static inline void ltr(unsigned int sel) __asm__ __volatile__ ( "ltr %w0" :: "rm" (sel) : "memory" ); } -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* __ARCH_DESC_H */ diff --git a/xen/arch/x86/include/asm/edd.h b/xen/arch/x86/include/asm/edd.h index afaa23732a..ebd46171c1 100644 --- a/xen/arch/x86/include/asm/edd.h +++ b/xen/arch/x86/include/asm/edd.h @@ -23,7 +23,7 @@ #ifndef __XEN_EDD_H__ #define __XEN_EDD_H__ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ struct __packed edd_info { /* Int13, Fn48: Check Extensions Present. */ @@ -149,7 +149,7 @@ extern u8 boot_mbr_signature_nr; extern struct edd_info boot_edd_info[]; extern u8 boot_edd_info_nr; -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ /* Maximum number of EDD information structures at boot_edd_info. */ #define EDD_INFO_MAX 6 diff --git a/xen/arch/x86/include/asm/fixmap.h b/xen/arch/x86/include/asm/fixmap.h index 516ec3fa6c..5b9e1a2401 100644 --- a/xen/arch/x86/include/asm/fixmap.h +++ b/xen/arch/x86/include/asm/fixmap.h @@ -17,7 +17,7 @@ #define FIXADDR_TOP (VMAP_VIRT_END - PAGE_SIZE) #define FIXADDR_X_TOP (XEN_VIRT_END - PAGE_SIZE) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -118,6 +118,6 @@ extern void __set_fixmap_x( #define __fix_x_to_virt(x) (FIXADDR_X_TOP - ((x) << PAGE_SHIFT)) #define fix_x_to_virt(x) ((void *)__fix_x_to_virt(x)) -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif diff --git a/xen/arch/x86/include/asm/ldt.h b/xen/arch/x86/include/asm/ldt.h index 58e3e042fc..f08e023090 100644 --- a/xen/arch/x86/include/asm/ldt.h +++ b/xen/arch/x86/include/asm/ldt.h @@ -2,7 +2,7 @@ #ifndef __ARCH_LDT_H #define __ARCH_LDT_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ static inline void load_LDT(struct vcpu *v) { @@ -20,7 +20,7 @@ static inline void load_LDT(struct vcpu *v) } } -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif diff --git a/xen/arch/x86/include/asm/machine_kexec.h b/xen/arch/x86/include/asm/machine_kexec.h index d4880818c1..3e189acf24 100644 --- a/xen/arch/x86/include/asm/machine_kexec.h +++ b/xen/arch/x86/include/asm/machine_kexec.h @@ -3,7 +3,7 @@ #define KEXEC_RELOC_FLAG_COMPAT 0x1 /* 32-bit image */ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ extern void kexec_reloc(unsigned long reloc_code, unsigned long reloc_pt, unsigned long ind_maddr, unsigned long entry_maddr, diff --git a/xen/arch/x86/include/asm/nops.h b/xen/arch/x86/include/asm/nops.h index 2724a9862e..32a05c8813 100644 --- a/xen/arch/x86/include/asm/nops.h +++ b/xen/arch/x86/include/asm/nops.h @@ -47,7 +47,7 @@ #define P6_NOP8 0x0f,0x1f,0x84,0x00,0,0,0,0 #define P6_NOP9 0x66,0x0f,0x1f,0x84,0x00,0,0,0,0 -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #define _ASM_MK_NOP(x) .byte x #else #define _ASM_MK_NOP(x) ".byte " __stringify(x) "\n" diff --git a/xen/arch/x86/include/asm/page.h b/xen/arch/x86/include/asm/page.h index 65a01f2402..23e06d39ad 100644 --- a/xen/arch/x86/include/asm/page.h +++ b/xen/arch/x86/include/asm/page.h @@ -8,7 +8,7 @@ #define PAGE_ORDER_2M 9 #define PAGE_ORDER_1G 18 -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ # include # include #endif @@ -107,7 +107,7 @@ #define l4e_from_mfn(m, f) l4e_from_pfn(mfn_x(m), f) /* Construct a pte from a physical address and access flags. */ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ static inline l1_pgentry_t l1e_from_paddr(paddr_t pa, unsigned int flags) { ASSERT((pa & ~(PADDR_MASK & PAGE_MASK)) == 0); @@ -128,7 +128,7 @@ static inline l4_pgentry_t l4e_from_paddr(paddr_t pa, unsigned int flags) ASSERT((pa & ~(PADDR_MASK & PAGE_MASK)) == 0); return (l4_pgentry_t) { pa | put_pte_flags(flags) }; } -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ /* Construct a pte from its direct integer representation. */ #define l1e_from_intpte(intpte) ((l1_pgentry_t) { (intpte_t)(intpte) }) @@ -204,7 +204,7 @@ static inline l4_pgentry_t l4e_from_paddr(paddr_t pa, unsigned int flags) #define pgentry_ptr_to_slot(_p) \ (((unsigned long)(_p) & ~PAGE_MASK) / sizeof(*(_p))) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* Page-table type. */ typedef struct { u64 pfn; } pagetable_t; @@ -270,7 +270,7 @@ void scrub_page_cold(void *ptr); #define vmap_to_mfn(va) xen_map_to_mfn((unsigned long)(va)) #define vmap_to_page(va) mfn_to_page(vmap_to_mfn(va)) -#endif /* !defined(__ASSEMBLY__) */ +#endif /* !defined(__ASSEMBLER__) */ /* Where to find each level of the linear mapping */ #define __linear_l1_table ((l1_pgentry_t *)(LINEAR_PT_VIRT_START)) @@ -282,7 +282,7 @@ void scrub_page_cold(void *ptr); ((l4_pgentry_t *)(__linear_l3_table + l3_linear_offset(LINEAR_PT_VIRT_START))) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ extern root_pgentry_t idle_pg_table[ROOT_PAGETABLE_ENTRIES]; extern l2_pgentry_t *compat_idle_pg_table_l2; extern unsigned int m2p_compat_vstart; @@ -293,7 +293,7 @@ extern l2_pgentry_t l2_directmap[4*L2_PAGETABLE_ENTRIES]; extern l1_pgentry_t l1_fixmap[L1_PAGETABLE_ENTRIES]; void paging_init(void); void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t l4e); -#endif /* !defined(__ASSEMBLY__) */ +#endif /* !defined(__ASSEMBLER__) */ #define _PAGE_NONE _AC(0x000,U) #define _PAGE_PRESENT _AC(0x001,U) @@ -313,7 +313,7 @@ void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t l4e); #define _PAGE_PSE_PAT _AC(0x1000,U) #define _PAGE_AVAIL_HIGH (_AC(0x7ff, U) << 12) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* Dependency on NX being available can't be expressed. */ #define _PAGE_NX (cpu_has_nx ? _PAGE_NX_BIT : 0) #endif @@ -354,7 +354,7 @@ void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t l4e); #define MAP_SMALL_PAGES _PAGE_AVAIL0 /* don't use superpages mappings */ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* Convert between PAT/PCD/PWT embedded in PTE flags and 3-bit cacheattr. */ static inline unsigned int pte_flags_to_cacheattr(unsigned int flags) @@ -391,7 +391,7 @@ static inline void invalidate_icache(void) */ } -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* __X86_PAGE_H__ */ diff --git a/xen/arch/x86/include/asm/processor.h b/xen/arch/x86/include/asm/processor.h index 2e087c6257..cf614bd8c6 100644 --- a/xen/arch/x86/include/asm/processor.h +++ b/xen/arch/x86/include/asm/processor.h @@ -4,7 +4,7 @@ #ifndef __ASM_X86_PROCESSOR_H #define __ASM_X86_PROCESSOR_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include #include @@ -75,7 +75,7 @@ (_AC(X86_MT_UC, ULL) << 0x30) | \ (_AC(X86_MT_UC, ULL) << 0x38)) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ struct domain; struct vcpu; @@ -435,7 +435,7 @@ enum ap_boot_method { }; extern enum ap_boot_method ap_boot_method; -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* __ASM_X86_PROCESSOR_H */ diff --git a/xen/arch/x86/include/asm/smp.h b/xen/arch/x86/include/asm/smp.h index 60eb4ac254..3f16e62696 100644 --- a/xen/arch/x86/include/asm/smp.h +++ b/xen/arch/x86/include/asm/smp.h @@ -4,7 +4,7 @@ /* * We need the APIC definitions automatically as part of 'smp.h' */ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include #include @@ -14,7 +14,7 @@ #define BAD_APICID (-1U) #define INVALID_CUID (~0U) /* AMD Compute Unit ID */ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* * Private routines/data @@ -80,6 +80,6 @@ extern bool unaccounted_cpus; void *cpu_alloc_stack(unsigned int cpu); -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif diff --git a/xen/arch/x86/include/asm/spec_ctrl.h b/xen/arch/x86/include/asm/spec_ctrl.h index 3d92928f94..505e3ab863 100644 --- a/xen/arch/x86/include/asm/spec_ctrl.h +++ b/xen/arch/x86/include/asm/spec_ctrl.h @@ -45,7 +45,7 @@ */ #define SCF_DOM_MASK (SCF_verw | SCF_entry_ibpb | SCF_entry_bhb) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -201,7 +201,7 @@ static always_inline void spec_ctrl_exit_idle(struct cpu_info *info) */ } -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* !__X86_SPEC_CTRL_H__ */ /* diff --git a/xen/arch/x86/include/asm/spec_ctrl_asm.h b/xen/arch/x86/include/asm/spec_ctrl_asm.h index 729a830411..abb64ad2b7 100644 --- a/xen/arch/x86/include/asm/spec_ctrl_asm.h +++ b/xen/arch/x86/include/asm/spec_ctrl_asm.h @@ -8,7 +8,7 @@ #ifndef __X86_SPEC_CTRL_ASM_H__ #define __X86_SPEC_CTRL_ASM_H__ -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #include #include @@ -500,7 +500,7 @@ .L\@_skip_ist_exit: .endm -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* !__X86_SPEC_CTRL_ASM_H__ */ /* diff --git a/xen/arch/x86/include/asm/trampoline.h b/xen/arch/x86/include/asm/trampoline.h index dc536efe1f..deed2679d9 100644 --- a/xen/arch/x86/include/asm/trampoline.h +++ b/xen/arch/x86/include/asm/trampoline.h @@ -96,7 +96,7 @@ #define TRAMPOLINE_HEAP_END (TRAMPOLINE_SIZE - PAGE_SIZE) #define MBI_SPACE_MIN (2 * PAGE_SIZE) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -168,5 +168,5 @@ extern uint8_t kbd_shift_flags; extern uint16_t boot_edid_caps; extern uint8_t boot_edid_info[128]; -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* X86_ASM_TRAMPOLINE_H */ diff --git a/xen/arch/x86/include/asm/x86_64/page.h b/xen/arch/x86/include/asm/x86_64/page.h index 201b79f99e..c80b4b01ad 100644 --- a/xen/arch/x86/include/asm/x86_64/page.h +++ b/xen/arch/x86/include/asm/x86_64/page.h @@ -9,7 +9,7 @@ #define is_canonical_address(x) (((long)(x) >> 47) == ((long)(x) >> 63)) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ static inline unsigned long canonicalise_addr(unsigned long addr) { @@ -68,7 +68,7 @@ typedef struct { intpte_t l3; } l3_pgentry_t; typedef struct { intpte_t l4; } l4_pgentry_t; typedef l4_pgentry_t root_pgentry_t; -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ /* Given a virtual address, get an entry offset into a linear page table. */ #define l1_linear_offset(_a) (((_a) & VADDR_MASK) >> L1_PAGETABLE_SHIFT) @@ -100,7 +100,7 @@ typedef l4_pgentry_t root_pgentry_t; */ /* Extract flags into 24-bit integer, or turn 24-bit flags into a pte mask. */ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ static inline unsigned int get_pte_flags(intpte_t x) { return ((x >> 40) & ~0xfff) | (x & 0xfff); diff --git a/xen/common/efi/boot.c b/xen/common/efi/boot.c index d7f4d0cb22..8adba7bd4d 100644 --- a/xen/common/efi/boot.c +++ b/xen/common/efi/boot.c @@ -25,11 +25,11 @@ /* * Keep this arch-specific modified include in the common file, as moving * it to the arch specific include file would obscure that special care is - * taken to include it with __ASSEMBLY__ defined. + * taken to include it with __ASSEMBLER__ defined. */ -#define __ASSEMBLY__ /* avoid pulling in ACPI stuff (conflicts with EFI) */ +#define __ASSEMBLER__ /* avoid pulling in ACPI stuff (conflicts with EFI) */ #include -#undef __ASSEMBLY__ +#undef __ASSEMBLER__ #endif #define EFI_REVISION(major, minor) (((major) << 16) | (minor)) diff --git a/xen/include/efi/pe.h b/xen/include/efi/pe.h index 64e047e88b..6b3458e888 100644 --- a/xen/include/efi/pe.h +++ b/xen/include/efi/pe.h @@ -136,7 +136,7 @@ #define IMAGE_DEBUG_TYPE_CODEVIEW 2 #define IMAGE_DEBUG_TYPE_EX_DLLCHARACTERISTICS 20 -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ struct mz_hdr { uint16_t magic; /* MZ_MAGIC */ @@ -286,6 +286,6 @@ struct section_header { uint32_t flags; }; -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* EFI__PE_H */ diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h index b31324f8d4..cd563cf706 100644 --- a/xen/include/public/arch-arm.h +++ b/xen/include/public/arch-arm.h @@ -184,7 +184,7 @@ #define uint64_aligned_t uint64_t __attribute__((__aligned__(8))) #endif -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #define ___DEFINE_XEN_GUEST_HANDLE(name, type) \ typedef union { type *p; unsigned long q; } \ __guest_handle_ ## name; \ @@ -542,7 +542,7 @@ typedef uint64_t xen_callback_t; #endif -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* Stub definition of PMU structure */ typedef struct xen_pmu_arch { uint8_t dummy; } xen_pmu_arch_t; #endif diff --git a/xen/include/public/arch-ppc.h b/xen/include/public/arch-ppc.h index 264e20b89e..b5e1a940a5 100644 --- a/xen/include/public/arch-ppc.h +++ b/xen/include/public/arch-ppc.h @@ -16,7 +16,7 @@ #define uint64_aligned_t uint64_t __attribute__((__aligned__(8))) #endif -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #define ___DEFINE_XEN_GUEST_HANDLE(name, type) \ typedef union { type *p; unsigned long q; } \ __guest_handle_ ## name; \ @@ -102,6 +102,6 @@ struct xen_arch_domainconfig { typedef struct xen_pmu_arch { uint8_t dummy; } xen_pmu_arch_t; -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* __XEN_PUBLIC_ARCH_PPC_H__ */ diff --git a/xen/include/public/arch-riscv.h b/xen/include/public/arch-riscv.h index 168263b920..360d8e6871 100644 --- a/xen/include/public/arch-riscv.h +++ b/xen/include/public/arch-riscv.h @@ -12,7 +12,7 @@ #define uint64_aligned_t uint64_t __attribute__((__aligned__(8))) #endif -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #define ___DEFINE_XEN_GUEST_HANDLE(name, type) \ typedef union { type *p; unsigned long q; } \ __guest_handle_ ## name; \ diff --git a/xen/include/public/arch-x86/xen-mca.h b/xen/include/public/arch-x86/xen-mca.h index bb1b12f14f..30d18b6ad7 100644 --- a/xen/include/public/arch-x86/xen-mca.h +++ b/xen/include/public/arch-x86/xen-mca.h @@ -74,7 +74,7 @@ /* Applicable to all mc_vcpuid fields below. */ #define XEN_MC_VCPUID_INVALID 0xffff -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #define VIRQ_MCA VIRQ_ARCH_0 /* G. (DOM0) Machine Check Architecture */ @@ -433,6 +433,6 @@ struct xen_mc { typedef struct xen_mc xen_mc_t; DEFINE_XEN_GUEST_HANDLE(xen_mc_t); -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __XEN_PUBLIC_ARCH_X86_MCA_H__ */ diff --git a/xen/include/public/arch-x86/xen-x86_32.h b/xen/include/public/arch-x86/xen-x86_32.h index 25cc447288..6a5eddf0c3 100644 --- a/xen/include/public/arch-x86/xen-x86_32.h +++ b/xen/include/public/arch-x86/xen-x86_32.h @@ -90,7 +90,7 @@ #define XEN_GUEST_HANDLE_64(name) __XEN_GUEST_HANDLE_64(name) #endif -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #if defined(XEN_GENERATING_COMPAT_HEADERS) /* nothing */ @@ -171,7 +171,7 @@ struct xen_callback { }; typedef struct xen_callback xen_callback_t; -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* __XEN_PUBLIC_ARCH_X86_XEN_X86_32_H__ */ diff --git a/xen/include/public/arch-x86/xen-x86_64.h b/xen/include/public/arch-x86/xen-x86_64.h index ea6b56aa3b..75f121be0e 100644 --- a/xen/include/public/arch-x86/xen-x86_64.h +++ b/xen/include/public/arch-x86/xen-x86_64.h @@ -105,7 +105,7 @@ #define VGCF_in_syscall (1<<_VGCF_in_syscall) #define VGCF_IN_SYSCALL VGCF_in_syscall -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ struct iret_context { /* Top of stack (%rsp at point of hypercall). */ @@ -218,7 +218,7 @@ typedef struct arch_vcpu_info arch_vcpu_info_t; typedef unsigned long xen_callback_t; -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* __XEN_PUBLIC_ARCH_X86_XEN_X86_64_H__ */ diff --git a/xen/include/public/arch-x86/xen.h b/xen/include/public/arch-x86/xen.h index b99a691706..a7bf046ee0 100644 --- a/xen/include/public/arch-x86/xen.h +++ b/xen/include/public/arch-x86/xen.h @@ -53,7 +53,7 @@ __DeFiNe__ __DECL_REG_LO16(name) e ## name #include "xen-x86_64.h" #endif -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ typedef unsigned long xen_pfn_t; #define PRI_xen_pfn "lx" #define PRIu_xen_pfn "lu" @@ -97,7 +97,7 @@ typedef unsigned long xen_pfn_t; /* Maximum number of virtual CPUs in legacy multi-processor guests. */ #define XEN_LEGACY_MAX_VCPUS 32 -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ typedef unsigned long xen_ulong_t; #define PRI_xen_ulong "lx" @@ -335,7 +335,7 @@ typedef struct xen_msr_entry { } xen_msr_entry_t; DEFINE_XEN_GUEST_HANDLE(xen_msr_entry_t); -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ /* * ` enum neg_errnoval @@ -359,7 +359,7 @@ DEFINE_XEN_GUEST_HANDLE(xen_msr_entry_t); * Prefix forces emulation of some non-trapping instructions. * Currently only CPUID. */ -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #define XEN_EMULATE_PREFIX .byte 0x0f,0x0b,0x78,0x65,0x6e ; #define XEN_CPUID XEN_EMULATE_PREFIX cpuid #else diff --git a/xen/include/public/errno.h b/xen/include/public/errno.h index b9fc6762fb..6543d0f353 100644 --- a/xen/include/public/errno.h +++ b/xen/include/public/errno.h @@ -30,7 +30,7 @@ #define XEN_ERRNO_DEFAULT_INCLUDE -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #define XEN_ERRNO(name, value) XEN_##name = (value), enum xen_errno { @@ -39,7 +39,7 @@ enum xen_errno { #define XEN_ERRNO(name, value) .equ XEN_##name, value -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __XEN_PUBLIC_ERRNO_H__ */ #endif /* !XEN_ERRNO */ @@ -123,7 +123,7 @@ XEN_ERRNO(ECONNREFUSED, 111) /* Connection refused */ /* Clean up from a default include. Close the enum (for C). */ #ifdef XEN_ERRNO_DEFAULT_INCLUDE #undef XEN_ERRNO_DEFAULT_INCLUDE -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ }; #endif diff --git a/xen/include/public/tmem.h b/xen/include/public/tmem.h index da68de76fe..8c91a7bb94 100644 --- a/xen/include/public/tmem.h +++ b/xen/include/public/tmem.h @@ -58,7 +58,7 @@ struct xen_tmem_oid { typedef struct xen_tmem_oid xen_tmem_oid_t; DEFINE_XEN_GUEST_HANDLE(xen_tmem_oid_t); -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #if __XEN_INTERFACE_VERSION__ < 0x00040400 typedef xen_pfn_t tmem_cli_mfn_t; #endif diff --git a/xen/include/public/xen.h b/xen/include/public/xen.h index 82b9c05a76..7f15204c38 100644 --- a/xen/include/public/xen.h +++ b/xen/include/public/xen.h @@ -24,7 +24,7 @@ #error "Unsupported architecture" #endif -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* Guest handles for primitive C types. */ DEFINE_XEN_GUEST_HANDLE(char); __DEFINE_XEN_GUEST_HANDLE(uchar, unsigned char); @@ -437,7 +437,7 @@ DEFINE_XEN_GUEST_HANDLE(xen_ulong_t); #define MMUEXT_UNMARK_SUPER 20 /* ` } */ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ struct mmuext_op { unsigned int cmd; /* => enum mmuext_cmd */ union { @@ -614,7 +614,7 @@ DEFINE_XEN_GUEST_HANDLE(mmuext_op_t); /* Mask for valid domain id values */ #define DOMID_MASK xen_mk_uint(0x7FFF) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ typedef uint16_t domid_t; @@ -1011,7 +1011,7 @@ typedef struct { XEN_DEFINE_UUID_(a, b, c, d, e1, e2, e3, e4, e5, e6) #endif /* __STDC_VERSION__ / __GNUC__ */ -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ /* Default definitions for macros used by domctl/sysctl. */ #if defined(__XEN__) || defined(__XEN_TOOLS__) @@ -1026,7 +1026,7 @@ typedef struct { #define XEN_GUEST_HANDLE_64(name) XEN_GUEST_HANDLE(name) #endif -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ struct xenctl_bitmap { XEN_GUEST_HANDLE_64(uint8) bitmap; uint32_t nr_bits; diff --git a/xen/include/xen/acpi.h b/xen/include/xen/acpi.h index 57e710a16d..90635ba0f3 100644 --- a/xen/include/xen/acpi.h +++ b/xen/include/xen/acpi.h @@ -35,7 +35,7 @@ */ #define NUM_FIXMAP_ACPI_PAGES 64 -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -202,6 +202,6 @@ static inline void acpi_dmar_zap(void) {} static inline void acpi_dmar_reinstate(void) {} #endif -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /*_LINUX_ACPI_H*/ diff --git a/xen/include/xen/bitmap.h b/xen/include/xen/bitmap.h index b5e9cdd3db..c69398a127 100644 --- a/xen/include/xen/bitmap.h +++ b/xen/include/xen/bitmap.h @@ -1,7 +1,7 @@ #ifndef __XEN_BITMAP_H #define __XEN_BITMAP_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -290,6 +290,6 @@ int xenctl_bitmap_to_bitmap(unsigned long *bitmap, int bitmap_to_xenctl_bitmap(struct xenctl_bitmap *xenctl_bitmap, const unsigned long *bitmap, unsigned int nbits); -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __XEN_BITMAP_H */ diff --git a/xen/include/xen/bug.h b/xen/include/xen/bug.h index 0cabdba379..044c059d69 100644 --- a/xen/include/xen/bug.h +++ b/xen/include/xen/bug.h @@ -14,7 +14,7 @@ #include -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -156,7 +156,7 @@ int do_bug_frame(const struct cpu_user_regs *regs, unsigned long pc); #endif /* CONFIG_GENERIC_BUG_FRAME */ -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* __XEN_BUG_H__ */ /* diff --git a/xen/include/xen/config.h b/xen/include/xen/config.h index 1d7195066c..33e6aafa40 100644 --- a/xen/include/xen/config.h +++ b/xen/include/xen/config.h @@ -13,7 +13,7 @@ #include -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #if defined(CONFIG_ENFORCE_UNIQUE_SYMBOLS) || defined(__clang__) diff --git a/xen/include/xen/const.h b/xen/include/xen/const.h index baf28ef144..af22887402 100644 --- a/xen/include/xen/const.h +++ b/xen/include/xen/const.h @@ -12,7 +12,7 @@ * leave it unchanged in asm. */ -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #define _AC(X,Y) X #define _AT(T,X) X #else diff --git a/xen/include/xen/err.h b/xen/include/xen/err.h index a5971e290c..4465468cde 100644 --- a/xen/include/xen/err.h +++ b/xen/include/xen/err.h @@ -1,7 +1,7 @@ #ifndef XEN_ERR_H #define XEN_ERR_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -43,6 +43,6 @@ static inline int __must_check PTR_RET(const void *ptr) return IS_ERR(ptr) ? PTR_ERR(ptr) : 0; } -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* XEN_ERR_H */ diff --git a/xen/include/xen/errno.h b/xen/include/xen/errno.h index 506674701f..db9ef7f3e1 100644 --- a/xen/include/xen/errno.h +++ b/xen/include/xen/errno.h @@ -1,18 +1,18 @@ #ifndef __XEN_ERRNO_H__ #define __XEN_ERRNO_H__ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #define XEN_ERRNO(name, value) name = (value), enum { #include }; -#else /* !__ASSEMBLY__ */ +#else /* !__ASSEMBLER__ */ #define XEN_ERRNO(name, value) .equ name, value #include -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __XEN_ERRNO_H__ */ diff --git a/xen/include/xen/init.h b/xen/include/xen/init.h index abf275f0eb..0c921672c1 100644 --- a/xen/include/xen/init.h +++ b/xen/include/xen/init.h @@ -54,7 +54,7 @@ * Also note, that this data cannot be "const". */ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* * Used for initialization calls.. @@ -72,7 +72,7 @@ typedef void (*exitcall_t)(void); void do_presmp_initcalls(void); void do_initcalls(void); -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #ifdef CONFIG_LATE_HWDOM #define __hwdom_init diff --git a/xen/include/xen/kimage.h b/xen/include/xen/kimage.h index 348f07f5c8..fccba1d88d 100644 --- a/xen/include/xen/kimage.h +++ b/xen/include/xen/kimage.h @@ -7,7 +7,7 @@ #define IND_SOURCE 0x8 #define IND_ZERO 0x10 -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -53,7 +53,7 @@ unsigned long kimage_entry_ind(kimage_entry_t *entry, bool compat); int kimage_build_ind(struct kexec_image *image, mfn_t ind_mfn, bool compat); -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __XEN_KIMAGE_H__ */ diff --git a/xen/include/xen/lib.h b/xen/include/xen/lib.h index c4ac482392..559e87636c 100644 --- a/xen/include/xen/lib.h +++ b/xen/include/xen/lib.h @@ -3,7 +3,7 @@ #include -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -165,6 +165,6 @@ void cf_check dump_execstate(const struct cpu_user_regs *regs); void init_constructors(void); -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __LIB_H__ */ diff --git a/xen/include/xen/libfdt/fdt.h b/xen/include/xen/libfdt/fdt.h index f2e68807f2..57fe566306 100644 --- a/xen/include/xen/libfdt/fdt.h +++ b/xen/include/xen/libfdt/fdt.h @@ -7,7 +7,7 @@ * Copyright 2012 Kim Phillips, Freescale Semiconductor. */ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ struct fdt_header { fdt32_t magic; /* magic word FDT_MAGIC */ diff --git a/xen/include/xen/linkage.h b/xen/include/xen/linkage.h index 3d401b88c1..4446eee5a8 100644 --- a/xen/include/xen/linkage.h +++ b/xen/include/xen/linkage.h @@ -1,7 +1,7 @@ #ifndef __LINKAGE_H__ #define __LINKAGE_H__ -#ifdef __ASSEMBLY__ +#ifdef __ASSEMBLER__ #include @@ -62,6 +62,6 @@ #define ASM_INT(label, val) DATA(label, 4) .long (val); END(label) -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __LINKAGE_H__ */ diff --git a/xen/include/xen/macros.h b/xen/include/xen/macros.h index 6b4a8dc8b7..6e8ac8b452 100644 --- a/xen/include/xen/macros.h +++ b/xen/include/xen/macros.h @@ -38,7 +38,7 @@ #define __STR(...) #__VA_ARGS__ #define STR(...) __STR(__VA_ARGS__) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* Force a compilation error if condition is true */ #define BUILD_BUG_ON(cond) ({ _Static_assert(!(cond), "!(" #cond ")"); }) @@ -140,7 +140,7 @@ #define MIN(x, y) ((x) < (y) ? (x) : (y)) #define MAX(x, y) ((x) > (y) ? (x) : (y)) -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __MACROS_H__ */ diff --git a/xen/include/xen/multiboot.h b/xen/include/xen/multiboot.h index 6d7f2b7671..4acb614669 100644 --- a/xen/include/xen/multiboot.h +++ b/xen/include/xen/multiboot.h @@ -43,7 +43,7 @@ #define MBI_LOADERNAME (_AC(1,u) << 9) #define MBI_APM (_AC(1,u) << 10) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include @@ -130,6 +130,6 @@ struct memory_map { typedef struct memory_map memory_map_t; -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __MULTIBOOT_H__ */ diff --git a/xen/include/xen/multiboot2.h b/xen/include/xen/multiboot2.h index 534b26444c..7c9180929e 100644 --- a/xen/include/xen/multiboot2.h +++ b/xen/include/xen/multiboot2.h @@ -113,7 +113,7 @@ #define MULTIBOOT2_FRAMEBUFFER_TYPE_RGB 1 #define MULTIBOOT2_FRAMEBUFFER_TYPE_EGA_TEXT 2 -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include @@ -233,6 +233,6 @@ typedef struct { uint32_t mod_end; char cmdline[]; } multiboot2_tag_module_t; -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __MULTIBOOT2_H__ */ diff --git a/xen/include/xen/percpu.h b/xen/include/xen/percpu.h index e7f585c7ed..fcf2095bd5 100644 --- a/xen/include/xen/percpu.h +++ b/xen/include/xen/percpu.h @@ -29,7 +29,7 @@ #include -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include #include @@ -57,7 +57,7 @@ extern unsigned long __per_cpu_offset[]; void percpu_init_areas(void); -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ /* Linux compatibility. */ #define get_cpu_var(var) this_cpu(var) diff --git a/xen/include/xen/pmap.h b/xen/include/xen/pmap.h index 93e61b1087..b223fa9196 100644 --- a/xen/include/xen/pmap.h +++ b/xen/include/xen/pmap.h @@ -4,13 +4,13 @@ /* Large enough for mapping 5 levels of page tables with some headroom */ #define NUM_FIX_PMAP 8 -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include void *pmap_map(mfn_t mfn); void pmap_unmap(const void *p); -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* __XEN_PMAP_H__ */ diff --git a/xen/include/xen/softirq.h b/xen/include/xen/softirq.h index 48f17e49ef..49da6974fe 100644 --- a/xen/include/xen/softirq.h +++ b/xen/include/xen/softirq.h @@ -1,7 +1,7 @@ #ifndef XEN_SOFTIRQ_H #define XEN_SOFTIRQ_H -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* Low-latency softirqs come first in the following list. */ enum { @@ -58,6 +58,6 @@ void cpu_raise_softirq_batch_finish(void); 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] ARM: Drop ThumbEE support Message-Id: Date: Fri, 05 Dec 2025 23:44:12 +0000 commit 5bbe1fe413f9d6a841b0bc70db024b1398391630 Author: Andrew Cooper AuthorDate: Wed Dec 3 17:00:04 2025 +0000 Commit: Andrew Cooper CommitDate: Fri Dec 5 18:06:19 2025 +0000 ARM: Drop ThumbEE support Hans reports that Xen no longer builds on Debian unstable/sid: Assembler messages: {standard input}:474: Error: unknown or missing system register name at operand 1 -- `msr TEECR32_EL1,x0' {standard input}:480: Error: unknown or missing system register name at operand 1 -- `msr TEEHBR32_EL1,x0' {standard input}:488: Error: unknown or missing system register name at operand 2 -- `mrs x0,TEECR32_EL1' {standard input}:494: Error: unknown or missing system register name at operand 2 -- `mrs x0,TEEHBR32_EL1' make[5]: *** [Rules.mk:249: arch/arm/domain.o] Error 1 This turns out to be an intentional change in binutils. ThumbEE was dropped ahead of ARM v8 (i.e. AArch64). Xen supports ARM v7+virt extensions so in principle we could #ifdef CONFIG_ARM_32 to keep it working. However, there was apparently no use of ThumbEE outside of demo code, so simply drop it. On ThumbEE capable hardware, unconditionally trap ThumbEE instructions, and drop the context switching logic for TEE{CR,HBR}32. Reported-by: Hans van Kranenburg Signed-off-by: Andrew Cooper Reviewed-by: Bertrand Marquis --- xen/arch/arm/domain.c | 12 ------------ xen/arch/arm/include/asm/domain.h | 1 - xen/arch/arm/include/asm/processor.h | 1 + xen/arch/arm/traps.c | 4 ++-- 4 files changed, 3 insertions(+), 15 deletions(-) diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index ab78444335..3e32a15cac 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -111,12 +111,6 @@ static void ctxt_switch_from(struct vcpu *p) p->arch.cntkctl = READ_SYSREG(CNTKCTL_EL1); virt_timer_save(p); - if ( is_32bit_domain(p->domain) && cpu_has_thumbee ) - { - p->arch.teecr = READ_SYSREG(TEECR32_EL1); - p->arch.teehbr = READ_SYSREG(TEEHBR32_EL1); - } - #ifdef CONFIG_ARM_32 p->arch.joscr = READ_CP32(JOSCR); p->arch.jmcr = READ_CP32(JMCR); @@ -244,12 +238,6 @@ static void ctxt_switch_to(struct vcpu *n) WRITE_SYSREG(n->arch.tpidrro_el0, TPIDRRO_EL0); WRITE_SYSREG(n->arch.tpidr_el1, TPIDR_EL1); - if ( is_32bit_domain(n->domain) && cpu_has_thumbee ) - { - WRITE_SYSREG(n->arch.teecr, TEECR32_EL1); - WRITE_SYSREG(n->arch.teehbr, TEEHBR32_EL1); - } - #ifdef CONFIG_ARM_32 WRITE_CP32(n->arch.joscr, JOSCR); WRITE_CP32(n->arch.jmcr, JMCR); diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h index af3e168374..758ad807e4 100644 --- a/xen/arch/arm/include/asm/domain.h +++ b/xen/arch/arm/include/asm/domain.h @@ -211,7 +211,6 @@ struct arch_vcpu register_t hcr_el2; register_t mdcr_el2; - uint32_t teecr, teehbr; /* ThumbEE, 32-bit guests only */ #ifdef CONFIG_ARM_32 /* * ARMv8 only supports a trivial implementation on Jazelle when in AArch32 diff --git a/xen/arch/arm/include/asm/processor.h b/xen/arch/arm/include/asm/processor.h index ed56746368..1a48c9ff3b 100644 --- a/xen/arch/arm/include/asm/processor.h +++ b/xen/arch/arm/include/asm/processor.h @@ -411,6 +411,7 @@ /* HSTR Hyp. System Trap Register */ #define HSTR_T(x) ((_AC(1,U)<<(x))) /* Trap Cp15 c */ +#define HSTR_TTEE (_AC(1,U)<<16) /* Trap ThumbEE */ /* HDCR Hyp. Debug Configuration Register */ #define HDCR_TDRA (_AC(1,U)<<11) /* Trap Debug ROM access */ diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index 2bc3e1df04..040c0f2e0d 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -158,8 +158,8 @@ void init_traps(void) WRITE_SYSREG(HDCR_TDRA|HDCR_TDOSA|HDCR_TDA|HDCR_TPM|HDCR_TPMCR, MDCR_EL2); - /* Trap CP15 c15 used for implementation defined registers */ - WRITE_SYSREG(HSTR_T(15), HSTR_EL2); + /* Trap CP15 c15 used for implementation defined registers, and ThumbEE. */ + WRITE_SYSREG(HSTR_T(15) | (cpu_has_thumbee ? HSTR_TTEE : 0), HSTR_EL2); WRITE_SYSREG(get_default_cptr_flags(), CPTR_EL2); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Dec 05 23:44:24 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 05 Dec 2025 23:44:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179617.1503056 (Exim 4.92) (envelope-from ) id 1vRfTM-0001dO-6X; Fri, 05 Dec 2025 23:44:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1179617.1503056; Fri, 05 Dec 2025 23:44:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRfTM-0001dG-3c; Fri, 05 Dec 2025 23:44:24 +0000 Received: by outflank-mailman (input) for mailman id 1179617; Fri, 05 Dec 2025 23:44:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRfTK-0001dA-Bs for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 23:44:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRfTK-008Sux-15 for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 23:44:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRfTK-001M5Z-0o for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 23:44:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=gWMolkCliPII5G2V7WZspCJp7d4S3jup4szRQrsr6Wg=; b=0MZmTJ8FGIoPfazgv6V51iJU94 B5JGQzyV16U+tu7C8J7uTBVTs6gX+c4raApgJR6mysHa7+fTswdOs967yVBbK0O8K8EkitQpHjrEr Hru7WqN6edq5zVHSBvWX2VcbOoeuXx580ArBqiQH5Vmc2SPoIKLhOietHX+aU830Mb38=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] systemd: fall back to default system-sleep dir without systemd-devel Message-Id: Date: Fri, 05 Dec 2025 23:44:22 +0000 commit b34bde262c8cf69fa235045108a0bc0309c63eac Author: Mykola Kvach AuthorDate: Fri Dec 5 18:07:15 2025 +0200 Commit: Andrew Cooper CommitDate: Fri Dec 5 18:06:19 2025 +0000 systemd: fall back to default system-sleep dir without systemd-devel Keep the pkg-config lookup for SYSTEMD_SLEEP_DIR, but fall back to "$(prefix)/lib/systemd/system-sleep/" if the variable remains unset. This avoids reintroducing a build-time dependency on systemd-devel while still honoring the path provided by pkg-config when present. Fixes: e54a6cd6a1f3 ("systemd: Add hooks to stop/start xen-watchdog on suspend/resume") Reported-by: Marek Marczykowski-Górecki Suggested-by: Andrew Cooper Signed-off-by: Mykola Kvach Acked-by: Andrew Cooper --- m4/systemd.m4 | 2 +- tools/configure | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/m4/systemd.m4 b/m4/systemd.m4 index c47a25ef93..5fb5a7089e 100644 --- a/m4/systemd.m4 +++ b/m4/systemd.m4 @@ -81,7 +81,7 @@ AC_DEFUN([AX_CHECK_SYSTEMD_LIBS], [ ], []) AS_IF([test "x$SYSTEMD_SLEEP_DIR" = x], [ - AC_MSG_ERROR([SYSTEMD_SLEEP_DIR is unset]) + SYSTEMD_SLEEP_DIR="\$(prefix)/lib/systemd/system-sleep/" ], []) ]) diff --git a/tools/configure b/tools/configure index 479c7c9a3c..6f69b0b526 100755 --- a/tools/configure +++ b/tools/configure @@ -10360,7 +10360,7 @@ fi if test "x$SYSTEMD_SLEEP_DIR" = x then : - as_fn_error $? "SYSTEMD_SLEEP_DIR is unset" "$LINENO" 5 + SYSTEMD_SLEEP_DIR="\$(prefix)/lib/systemd/system-sleep/" fi -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Dec 05 23:44:34 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 05 Dec 2025 23:44:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179618.1503060 (Exim 4.92) (envelope-from ) id 1vRfTW-0001ff-7r; Fri, 05 Dec 2025 23:44:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1179618.1503060; Fri, 05 Dec 2025 23:44:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRfTW-0001fX-4x; Fri, 05 Dec 2025 23:44:34 +0000 Received: by outflank-mailman (input) for mailman id 1179618; Fri, 05 Dec 2025 23:44:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRfTU-0001fJ-EX for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 23:44:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRfTU-008Sv4-1M for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 23:44:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRfTU-001Mvb-1G for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 23:44:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=kIncRh18MWugDsuOipn5uLP4pC7zdWebKkkCcwqPiaY=; b=O+WGeXD3keYcAPICviWLL8g3nd C8le3Yo9zZ8aeBeiXo6A06PaL8c2cIUgqhfdv0TtB9U2OeGCThAN6pdgsLQEK8TG8t4TPonYmcxYI 2vWVuo3S8wrU+qBZgCCakkUJUmJF2M9JOuPAn0nGVKrILmFm97gpDrAv1/0bk3HbIHkI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] public/trace: Add U suffix to TRC_PV_HYPERCALL_V2_ARG_MASK Message-Id: Date: Fri, 05 Dec 2025 23:44:32 +0000 commit 13721c45b01665e0629e2141ff2b0d18e516280d Author: Michal Orzel AuthorDate: Fri Dec 5 12:49:58 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 5 18:06:19 2025 +0000 public/trace: Add U suffix to TRC_PV_HYPERCALL_V2_ARG_MASK TRC_PV_HYPERCALL_V2_ARG_MASK represents unsigned type, so according to MISRA C R7.2. U suffix should be applied. Fix the violation. Signed-off-by: Michal Orzel Reviewed-by: Andrew Cooper --- xen/include/public/trace.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/include/public/trace.h b/xen/include/public/trace.h index 141efa0ea7..78c31a0008 100644 --- a/xen/include/public/trace.h +++ b/xen/include/public/trace.h @@ -157,7 +157,7 @@ */ #define TRC_PV_HYPERCALL_V2_ARG_32(i) (0x1 << (20 + 2*(i))) #define TRC_PV_HYPERCALL_V2_ARG_64(i) (0x2 << (20 + 2*(i))) -#define TRC_PV_HYPERCALL_V2_ARG_MASK (0xfff00000) +#define TRC_PV_HYPERCALL_V2_ARG_MASK 0xfff00000U #define TRC_SHADOW_NOT_SHADOW (TRC_SHADOW + 1) #define TRC_SHADOW_FAST_PROPAGATE (TRC_SHADOW + 2) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Dec 05 23:44:44 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 05 Dec 2025 23:44:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179619.1503064 (Exim 4.92) (envelope-from ) id 1vRfTg-0001hr-8p; Fri, 05 Dec 2025 23:44:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1179619.1503064; Fri, 05 Dec 2025 23:44:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRfTg-0001hl-6H; Fri, 05 Dec 2025 23:44:44 +0000 Received: by outflank-mailman (input) for mailman id 1179619; Fri, 05 Dec 2025 23:44:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRfTe-0001hZ-HF for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 23:44:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRfTe-008SvE-1c for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 23:44:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRfTe-001NmX-1X for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 23:44:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=w5EuL3LPnElkCC4FEAEVNCoSVqa56oCMsr5SNGP29xM=; b=DP+4+tFaTS5UcAaxBK/yJZ8oBA s1JMeMClqMj+rv1Dpj2r0sRQyrLeoMSWayEGKtS23F0Eq6T2sJRHT6+ai5Qaq5Bn3Ssj+tEcJIE4t /NjBRWIVUBbiG2XFb6f6E8MYA7/n8PYwnPvVUMd2Q1Nmt5eCsaW/D3IXA4lg1qE7GRZA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] common/kernel: Rename hypfs "params" variable Message-Id: Date: Fri, 05 Dec 2025 23:44:42 +0000 commit 59f163cca522b99570f7c382152b83b532fec389 Author: Michal Orzel AuthorDate: Fri Dec 5 12:49:59 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 5 18:06:19 2025 +0000 common/kernel: Rename hypfs "params" variable Inside do_xen_version, there are two other places using local variables named "params". Rename hypfs dir "params" to "params_dir". This resolves MISRA C R5.3 violation. Signed-off-by: Michal Orzel Reviewed-by: Andrew Cooper --- xen/common/kernel.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/xen/common/kernel.c b/xen/common/kernel.c index e6979352e1..fb45f81399 100644 --- a/xen/common/kernel.c +++ b/xen/common/kernel.c @@ -483,13 +483,13 @@ static int __init cf_check buildinfo_init(void) } __initcall(buildinfo_init); -static HYPFS_DIR_INIT(params, "params"); +static HYPFS_DIR_INIT(params_dir, "params"); static int __init cf_check param_init(void) { struct param_hypfs *param; - hypfs_add_dir(&hypfs_root, ¶ms, true); + hypfs_add_dir(&hypfs_root, ¶ms_dir, true); for ( param = __paramhypfs_start; param < __paramhypfs_end; param++ ) { @@ -497,7 +497,7 @@ static int __init cf_check param_init(void) param->init_leaf(param); else if ( param->hypfs.e.type == XEN_HYPFS_TYPE_STRING ) param->hypfs.e.size = strlen(param->hypfs.u.content) + 1; - hypfs_add_leaf(¶ms, ¶m->hypfs, true); + hypfs_add_leaf(¶ms_dir, ¶m->hypfs, true); } return 0; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Dec 05 23:44:54 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 05 Dec 2025 23:44:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179620.1503068 (Exim 4.92) (envelope-from ) id 1vRfTq-0001k5-Az; Fri, 05 Dec 2025 23:44:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1179620.1503068; Fri, 05 Dec 2025 23:44:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRfTq-0001jx-7a; Fri, 05 Dec 2025 23:44:54 +0000 Received: by outflank-mailman (input) for mailman id 1179620; Fri, 05 Dec 2025 23:44:52 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRfTo-0001jp-Kt for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 23:44:52 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRfTo-008Svd-1z for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 23:44:52 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRfTo-001Oe3-1r for xen-changelog@lists.xenproject.org; Fri, 05 Dec 2025 23:44:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=TRw1cQF3IkThmWD+gwl0GlY+QfUgclZmOJtIC2XVE2k=; b=dKbCATtZu7okDjUDP7X8nUQRf9 ACyHYgy+83gP+rLF5DtIJ5xn4yeGfCAFqZFrbtBC/SFnCojBNY3tKTHKUcq+HD8zj++UfHPO68q3t V0wRDTBIAsGdWp1fO3VFBeEC2QZlD8hZZTAJnEgWahXeyeqPJPWqq1CgM2GmOCpYa/8s=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/hypfs: Enclose HYPFS_DIR_INIT var parameter in parentheses Message-Id: Date: Fri, 05 Dec 2025 23:44:52 +0000 commit d430c0a66e102fb12baeec6a178c20da7864d5b5 Author: Michal Orzel AuthorDate: Fri Dec 5 12:50:00 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 5 18:06:19 2025 +0000 xen/hypfs: Enclose HYPFS_DIR_INIT var parameter in parentheses The var parameter is later on expanded and referenced by LIST_HEAD_INIT and shall be enclosed in parentheses. This resolves MISRA C R20.7 violation. Signed-off-by: Michal Orzel Reviewed-by: Juergen Gross --- xen/include/xen/hypfs.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/include/xen/hypfs.h b/xen/include/xen/hypfs.h index d8fcac23b4..fef667298b 100644 --- a/xen/include/xen/hypfs.h +++ b/xen/include/xen/hypfs.h @@ -95,9 +95,9 @@ struct hypfs_dyndir_id { .e.name = (nam), \ .e.size = 0, \ .e.max_size = 0, \ - .e.list = LIST_HEAD_INIT(var.e.list), \ + .e.list = LIST_HEAD_INIT((var).e.list), \ .e.funcs = (fn), \ - .dirlist = LIST_HEAD_INIT(var.dirlist), \ + .dirlist = LIST_HEAD_INIT((var).dirlist), \ } #define HYPFS_DIR_INIT(var, nam) \ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Dec 06 01:22:15 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 06 Dec 2025 01:22:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179650.1503086 (Exim 4.92) (envelope-from ) id 1vRh01-0005Bv-Cf; Sat, 06 Dec 2025 01:22:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1179650.1503086; Sat, 06 Dec 2025 01:22:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRh01-0005Bn-9x; Sat, 06 Dec 2025 01:22:13 +0000 Received: by outflank-mailman (input) for mailman id 1179650; Sat, 06 Dec 2025 01:22:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRh00-0005Bd-4Z for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 01:22:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRh00-009gQZ-0M for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 01:22:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRh00-00AqBq-0F for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 01:22:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=M58j7KCcomGLduDwd9rJm5kWUumYd543iy+QWBNsYgY=; b=WFcDmhpEhFq0iaSlk3TBdK7cMf P+SLJ2UJLPKZJ8BVwt/gK+0hO1VGlCOxX8Z+lp2Sxe4sLYoBn19+ev0NA1sY+1vXM8yWfZ8qrs4y/ ObquCkGePIFr7zxFUbiRtMADdmRvHIv7q9+9sEmdkPdRRAXj4RGUk0CdCS4E50JgKq/U=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/fsgsbase: Update fs/gs helpers to use wrmsrns() Message-Id: Date: Sat, 06 Dec 2025 01:22:12 +0000 commit 6b448a92a367839386994def3209c079fc98fe68 Author: Andrew Cooper AuthorDate: Thu Aug 14 15:26:56 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 5 23:00:32 2025 +0000 x86/fsgsbase: Update fs/gs helpers to use wrmsrns() ... and rdmsr() while here. Most of these accesses are in fastpaths and do not need serialising behaviour, but the write side is serialising on all Intel hardware as well as older AMD hardware. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/domain.c | 10 +++++----- xen/arch/x86/hvm/vmx/vmx.c | 4 ++-- xen/arch/x86/include/asm/fsgsbase.h | 30 +++++++++--------------------- 3 files changed, 16 insertions(+), 28 deletions(-) diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index 3a21e035f4..d89b7667d4 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -1860,9 +1860,9 @@ static void load_segments(struct vcpu *n) } else { - wrmsrl(MSR_FS_BASE, n->arch.pv.fs_base); - wrmsrl(MSR_GS_BASE, gsb); - wrmsrl(MSR_SHADOW_GS_BASE, gss); + wrmsrns(MSR_FS_BASE, n->arch.pv.fs_base); + wrmsrns(MSR_GS_BASE, gsb); + wrmsrns(MSR_SHADOW_GS_BASE, gss); } } @@ -1987,8 +1987,8 @@ static void save_segments(struct vcpu *v) } else { - rdmsrl(MSR_FS_BASE, fs_base); - rdmsrl(MSR_GS_BASE, gs_base); + fs_base = rdmsr(MSR_FS_BASE); + gs_base = rdmsr(MSR_GS_BASE); } v->arch.pv.fs_base = fs_base; diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 6b407226c4..05b59cb8e4 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -2800,8 +2800,8 @@ static uint64_t cf_check vmx_get_reg(struct vcpu *v, unsigned int reg) case MSR_SHADOW_GS_BASE: if ( v != curr ) return v->arch.hvm.vmx.shadow_gs; - rdmsrl(MSR_SHADOW_GS_BASE, val); - return val; + else + return rdmsr(MSR_SHADOW_GS_BASE); } /* Logic which maybe requires remote VMCS acquisition. */ diff --git a/xen/arch/x86/include/asm/fsgsbase.h b/xen/arch/x86/include/asm/fsgsbase.h index 5577038426..24862a6bfe 100644 --- a/xen/arch/x86/include/asm/fsgsbase.h +++ b/xen/arch/x86/include/asm/fsgsbase.h @@ -63,38 +63,26 @@ static inline void __wrgs_shadow(unsigned long base) static inline unsigned long read_fs_base(void) { - unsigned long base; - if ( read_cr4() & X86_CR4_FSGSBASE ) return __rdfsbase(); - - rdmsrl(MSR_FS_BASE, base); - - return base; + else + return rdmsr(MSR_FS_BASE); } static inline unsigned long read_gs_base(void) { - unsigned long base; - if ( read_cr4() & X86_CR4_FSGSBASE ) return __rdgsbase(); - - rdmsrl(MSR_GS_BASE, base); - - return base; + else + return rdmsr(MSR_GS_BASE); } static inline unsigned long read_gs_shadow(void) { - unsigned long base; - if ( read_cr4() & X86_CR4_FSGSBASE ) return __rdgs_shadow(); - - rdmsrl(MSR_SHADOW_GS_BASE, base); - - return base; + else + return rdmsr(MSR_SHADOW_GS_BASE); } static inline void write_fs_base(unsigned long base) @@ -102,7 +90,7 @@ static inline void write_fs_base(unsigned long base) if ( read_cr4() & X86_CR4_FSGSBASE ) __wrfsbase(base); else - wrmsrl(MSR_FS_BASE, base); + wrmsrns(MSR_FS_BASE, base); } static inline void write_gs_base(unsigned long base) @@ -110,7 +98,7 @@ static inline void write_gs_base(unsigned long base) if ( read_cr4() & X86_CR4_FSGSBASE ) __wrgsbase(base); else - wrmsrl(MSR_GS_BASE, base); + wrmsrns(MSR_GS_BASE, base); } static inline void write_gs_shadow(unsigned long base) @@ -118,7 +106,7 @@ static inline void write_gs_shadow(unsigned long base) if ( read_cr4() & X86_CR4_FSGSBASE ) __wrgs_shadow(base); else - wrmsrl(MSR_SHADOW_GS_BASE, base); + wrmsrns(MSR_SHADOW_GS_BASE, base); } #endif /* X86_FSGSBASE_H */ -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Sat Dec 06 01:22:15 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 06 Dec 2025 01:22:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179649.1503081 (Exim 4.92) (envelope-from ) id 1vRgzr-0005Ad-B7; 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Sat, 06 Dec 2025 01:22:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=TEjb/qifD4yeNUC5x/w27GN2EvkwF60CjRkl/6vnisA=; b=3N88F0iqJ5rOdgGpfSZoubqPrZ PFqShQgTt6xB4B6DULyiq+r/LhbQxdTYhz3X3tiNfWTZRQi429cz/p87XBQ1fBlbQGL4+cYxXjQ6F eMhwsh25schyGrHWNVSWtlHCGpyBfUbawQa/RFLtrgM/fBq9p2WZ1tqK43Z5wChSMjQM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/fsgsbase: Split out __{rd,wr}gs_shadow() helpers Message-Id: Date: Sat, 06 Dec 2025 01:22:01 +0000 commit 9900679fa92596660d7d571113d98a6abfd95141 Author: Andrew Cooper AuthorDate: Thu Aug 14 14:32:03 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 5 23:00:32 2025 +0000 x86/fsgsbase: Split out __{rd,wr}gs_shadow() helpers Right now they're inline in {read,write}_gs_shadow(), but we're going to need to use these elsewhere to support FRED. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/arch/x86/include/asm/fsgsbase.h | 36 +++++++++++++++++++++++------------- 1 file changed, 23 insertions(+), 13 deletions(-) diff --git a/xen/arch/x86/include/asm/fsgsbase.h b/xen/arch/x86/include/asm/fsgsbase.h index 03e6a85d31..5577038426 100644 --- a/xen/arch/x86/include/asm/fsgsbase.h +++ b/xen/arch/x86/include/asm/fsgsbase.h @@ -32,6 +32,17 @@ static inline unsigned long __rdgsbase(void) return base; } +static inline unsigned long __rdgs_shadow(void) +{ + unsigned long base; + + asm_inline volatile ( "swapgs\n\t" + "rdgsbase %0\n\t" + "swapgs" : "=r" (base) ); + + return base; +} + static inline void __wrfsbase(unsigned long base) { asm volatile ( "wrfsbase %0" :: "r" (base) ); @@ -42,6 +53,14 @@ static inline void __wrgsbase(unsigned long base) asm volatile ( "wrgsbase %0" :: "r" (base) ); } +static inline void __wrgs_shadow(unsigned long base) +{ + asm_inline volatile ( "swapgs\n\t" + "wrgsbase %0\n\t" + "swapgs" + :: "r" (base) ); +} + static inline unsigned long read_fs_base(void) { unsigned long base; @@ -71,13 +90,9 @@ static inline unsigned long read_gs_shadow(void) unsigned long base; if ( read_cr4() & X86_CR4_FSGSBASE ) - { - asm volatile ( "swapgs" ); - base = __rdgsbase(); - asm volatile ( "swapgs" ); - } - else - rdmsrl(MSR_SHADOW_GS_BASE, base); + return __rdgs_shadow(); + + rdmsrl(MSR_SHADOW_GS_BASE, base); return base; } @@ -101,12 +116,7 @@ static inline void write_gs_base(unsigned long base) static inline void write_gs_shadow(unsigned long base) { if ( read_cr4() & X86_CR4_FSGSBASE ) - { - asm volatile ( "swapgs\n\t" - "wrgsbase %0\n\t" - "swapgs" - :: "r" (base) ); - } + __wrgs_shadow(base); else wrmsrl(MSR_SHADOW_GS_BASE, base); } -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Sat Dec 06 01:22:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 06 Dec 2025 01:22:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179651.1503089 (Exim 4.92) (envelope-from ) id 1vRh0B-0005Eh-FF; Sat, 06 Dec 2025 01:22:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1179651.1503089; Sat, 06 Dec 2025 01:22:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRh0B-0005EZ-Cl; Sat, 06 Dec 2025 01:22:23 +0000 Received: by outflank-mailman (input) for mailman id 1179651; Sat, 06 Dec 2025 01:22:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRh0A-0005EP-7o for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 01:22:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRh0A-009gQh-0g for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 01:22:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRh0A-00ArWS-0X for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 01:22:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=IFFR2EQ0WX7FPnNH+vw92YbFDC0RUzDNevqXMH0nZFE=; b=oUXeXuwsIvKAvL8R5F5U/3u3M9 6FHT1+Mv9rl05I85B7sOIuTZbdYsf+ZOrPe5TQq8erSxOMKXkUEzinDnh8Bm/aeLoN1XZHXktTy1Z B30mMRDMLh7xaK++ncZ0LW9XaqxqrnK78GD6zE3puhia+iuiGnxO9TVHHsyXlkAJntVk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/fsgsbase: Improve code generation in read_registers() Message-Id: Date: Sat, 06 Dec 2025 01:22:22 +0000 commit 42a0709f374966573851236589583c86b603e704 Author: Andrew Cooper AuthorDate: Tue Aug 12 12:48:06 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 5 23:00:32 2025 +0000 x86/fsgsbase: Improve code generation in read_registers() It turns out that using the higher level helpers adjacent like this leads to terrible code generation. Due to -fno-strict-aliasing, the store into state invalidates the read_cr4() address calculation (which is really cpu_info->cr4 under the hood), meaning that it can't be hoisted. As a result we get "locate the top of stack block, get cr4, and see if FSGSBASE is set" repeated 3 times, and an unreasonable number of basic blocks. Hoist the calculation manually, which results in two basic blocks. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/traps.c | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 0c5393cb21..505cae4d26 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -118,9 +118,24 @@ static void read_registers(struct extra_state *state) state->cr3 = read_cr3(); state->cr4 = read_cr4(); - state->fsb = read_fs_base(); - state->gsb = read_gs_base(); - state->gss = read_gs_shadow(); + /* + * Help the optimiser out by opencoding read_*_base() and rearranging the + * expression. -fno-strict-aliasing causes the store into state to + * invalidate the read_cr4() address calculation (really cpu_info->cr4 + * under the hood), forcing the cr4 check to be re-evaluated every time. + */ + if ( state->cr4 & X86_CR4_FSGSBASE ) + { + state->fsb = __rdfsbase(); + state->gsb = __rdgsbase(); + state->gss = __rdgs_shadow(); + } + else + { + state->fsb = rdmsr(MSR_FS_BASE); + state->gsb = rdmsr(MSR_GS_BASE); + state->gss = rdmsr(MSR_SHADOW_GS_BASE); + } asm ( "mov %%ds, %0" : "=m" (state->ds) ); asm ( "mov %%es, %0" : "=m" (state->es) ); -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Sat Dec 06 01:22:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 06 Dec 2025 01:22:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179652.1503094 (Exim 4.92) (envelope-from ) id 1vRh0L-0005Gi-Gw; Sat, 06 Dec 2025 01:22:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1179652.1503094; Sat, 06 Dec 2025 01:22:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRh0L-0005Ga-EC; Sat, 06 Dec 2025 01:22:33 +0000 Received: by outflank-mailman (input) for mailman id 1179652; Sat, 06 Dec 2025 01:22:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRh0K-0005GU-C3 for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 01:22:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRh0K-009gQr-0z for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 01:22:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRh0K-00AsRx-0s for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 01:22:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=CYRLbWGamEBbDCoKSqkoD3ChDU7Cqn4m7Q2k7aX9X4E=; b=oN1yGbhfwq68HHhiJGNyraV5YG UiladzWLxF5MVRvo5VfCLosF3uJoMDIPfD3QUkySuIMaRCLUGWOG83/eIK26K5FfeArIrSLizDDqp CS9MFwqjbhbKV7tSn0kHLVdB/9jngEN3LVrypsZzZxfC1hVjsXae2CifT4SD/ufqRReE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/boot: Use RSTORSSP to establish SSP Message-Id: Date: Sat, 06 Dec 2025 01:22:32 +0000 commit 3037d8b7eb3e9c3c9e4a0a257115557c300795fc Author: Andrew Cooper AuthorDate: Mon May 26 18:48:26 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 5 23:00:32 2025 +0000 x86/boot: Use RSTORSSP to establish SSP Under FRED, SETSSBSY is disallowed, and we want to be setting up FRED prior to setting up shadow stacks. As we still need Supervisor Tokens in IDT mode, we need mode-specific logic to establish SSP. In FRED mode, write a Restore Token, RSTORSSP it, and discard the resulting Previous-SSP token. No change outside of FRED mode. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/arch/x86/boot/x86_64.S | 23 +++++++++++++++++++++-- xen/arch/x86/setup.c | 25 ++++++++++++++++++++++++- 2 files changed, 45 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/boot/x86_64.S b/xen/arch/x86/boot/x86_64.S index 11a7e9d3bd..9705d03f84 100644 --- a/xen/arch/x86/boot/x86_64.S +++ b/xen/arch/x86/boot/x86_64.S @@ -53,17 +53,21 @@ ENTRY(__high_start) mov %rcx, STACK_CPUINFO_FIELD(cr4)(%r15) mov %rcx, %cr4 - /* WARNING! call/ret now fatal (iff SHSTK) until SETSSBSY loads SSP */ + /* WARNING! CALL/RET now fatal (iff SHSTK) until SETSSBSY/RSTORSSP loads SSP */ #if defined(CONFIG_XEN_SHSTK) test $CET_SHSTK_EN, %al jz .L_ap_cet_done - /* Derive the supervisor token address from %rsp. */ + /* Derive the token address from %rsp. */ mov %rsp, %rdx and $~(STACK_SIZE - 1), %rdx or $(PRIMARY_SHSTK_SLOT + 1) * PAGE_SIZE - 8, %rdx + /* Establishing SSP differs between IDT or FRED mode. */ + bt $32 /* ilog2(X86_CR4_FRED) */, %rcx + jc .L_fred_shstk + /* * Write a new Supervisor Token. It doesn't matter the first time a * CPU boots, but for S3 resume or hotplug this clears the busy bit so @@ -71,6 +75,21 @@ ENTRY(__high_start) */ wrssq %rdx, (%rdx) setssbsy + jmp .L_ap_cet_done + +.L_fred_shstk: + + /* + * Write a Restore Token, value: &token + 8 + 64BIT (bit 0) at the + * base of the shstk (which isn't in use yet). + */ + lea 9(%rdx), %rdi + wrssq %rdi, (%rdx) + rstorssp (%rdx) + + /* Discard the Previous-SSP Token from the shstk. */ + mov $2, %edx + incsspd %edx #endif /* CONFIG_XEN_SHSTK */ .L_ap_cet_done: diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index 872a8c63f9..44da5efa1d 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -49,6 +49,7 @@ #include #include #include +#include #include #include #include @@ -908,7 +909,29 @@ static void __init noreturn reinit_bsp_stack(void) if ( cpu_has_xen_shstk ) { wrmsrl(MSR_S_CET, xen_msr_s_cet_value()); - asm volatile ("setssbsy" ::: "memory"); + + /* + * IDT and FRED differ by a Supervisor Token on the shadow stack. + * + * In IDT mode, we use SETSSBSY (itself using MSR_PL0_SSP, configured + * previously) to mark the Supervisor Token as Busy. In FRED mode, + * there is no token, so we need to create a temporary Restore Token + * to establish SSP. + */ + if ( opt_fred ) + { + unsigned long *token = + (void *)stack + (PRIMARY_SHSTK_SLOT + 1) * PAGE_SIZE - 8; + + wrss((unsigned long)token + 9, token); + asm volatile ( "rstorssp %0" : "+m" (*token) ); + /* + * We need to discard the resulting Previous-SSP Token, but + * reset_stack_and_jump() will do that for us. + */ + } + else + asm volatile ( "setssbsy" ::: "memory" ); } reset_stack_and_jump(init_done); -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Sat Dec 06 01:22:43 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 06 Dec 2025 01:22:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179653.1503099 (Exim 4.92) (envelope-from ) id 1vRh0V-0005JF-Ie; Sat, 06 Dec 2025 01:22:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1179653.1503099; Sat, 06 Dec 2025 01:22:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRh0V-0005J7-Fb; Sat, 06 Dec 2025 01:22:43 +0000 Received: by outflank-mailman (input) for mailman id 1179653; Sat, 06 Dec 2025 01:22:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRh0U-0005J1-EJ for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 01:22:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRh0U-009gQz-1K for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 01:22:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRh0U-00AtUY-1C for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 01:22:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=iZ4599rvqImUGQn6gqFqIMvaXU6h0SmHg4ABPh2wuxc=; b=luKMRNQIq9AtIdSMrrxtuGUKVI Mb4j8TKW4lI8O9+Yf3FbDzT4YcTsSOQIdf4PNQZbWxYCtHL9aghpseJgFGjcP87sXpb5FjM7qnVDD B4K4Z2hOObT8BOyEP60Fh31uKTKqe/ZoVK7Yl1eyR18tyrIMRW25/MiRjCt45132vmRw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/pv: Deduplicate is_canonical_address() in do_set_segment_base() Message-Id: Date: Sat, 06 Dec 2025 01:22:42 +0000 commit 524f3fa35efd7a425e1033d2fa5c927f61224d67 Author: Andrew Cooper AuthorDate: Tue Aug 12 12:48:06 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 5 23:00:32 2025 +0000 x86/pv: Deduplicate is_canonical_address() in do_set_segment_base() This is really a rearrangement to make adding FRED support easier. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/pv/misc-hypercalls.c | 32 +++++++++++++++++--------------- 1 file changed, 17 insertions(+), 15 deletions(-) diff --git a/xen/arch/x86/pv/misc-hypercalls.c b/xen/arch/x86/pv/misc-hypercalls.c index 7a37f16bf0..4c2abeb4ad 100644 --- a/xen/arch/x86/pv/misc-hypercalls.c +++ b/xen/arch/x86/pv/misc-hypercalls.c @@ -176,27 +176,29 @@ long do_set_segment_base(unsigned int which, unsigned long base) switch ( which ) { case SEGBASE_FS: - if ( is_canonical_address(base) ) - write_fs_base(base); - else + case SEGBASE_GS_USER: + case SEGBASE_GS_KERNEL: + if ( !is_canonical_address(base) ) + { ret = -EINVAL; - break; + break; + } - case SEGBASE_GS_USER: - if ( is_canonical_address(base) ) + switch ( which ) { - write_gs_shadow(base); + case SEGBASE_FS: + write_fs_base(base); + break; + + case SEGBASE_GS_USER: v->arch.pv.gs_base_user = base; - } - else - ret = -EINVAL; - break; + write_gs_shadow(base); + break; - case SEGBASE_GS_KERNEL: - if ( is_canonical_address(base) ) + case SEGBASE_GS_KERNEL: write_gs_base(base); - else - ret = -EINVAL; + break; + } break; case SEGBASE_GS_USER_SEL: -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Sat Dec 06 01:22:53 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 06 Dec 2025 01:22:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179654.1503102 (Exim 4.92) (envelope-from ) id 1vRh0f-0005LW-Je; Sat, 06 Dec 2025 01:22:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1179654.1503102; Sat, 06 Dec 2025 01:22:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRh0f-0005LO-Gy; Sat, 06 Dec 2025 01:22:53 +0000 Received: by outflank-mailman (input) for mailman id 1179654; Sat, 06 Dec 2025 01:22:52 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRh0e-0005LI-Jz for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 01:22:52 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRh0e-009gRR-1u for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 01:22:52 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRh0e-00AuX6-1Z for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 01:22:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=zIG0ii/V7IiJ6fiwugjsLXmi+8jVgCcRS8b/NugyP1Q=; b=EYdfIMH6L9saO11ABn0nGacA1J 4w6GT+msM/dZWDp051pnenDL8Z4SOFfmxF0uB02FCKA3U4L2CJ1VcnHlhVTiu4yaxTIWRzjrXIgpH NHBqtZIxXIbEA2AGAYRCfAfqZUEbyj+DHhACKiUrNu/g5itaXcwwpWfUfRtIo6uBcyuY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/traps: Make an IDT-specific #DB helper Message-Id: Date: Sat, 06 Dec 2025 01:22:52 +0000 commit d9974d7860868d8a59fc95508ec768d300fed0b1 Author: Andrew Cooper AuthorDate: Mon Aug 11 12:42:01 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 5 23:00:32 2025 +0000 x86/traps: Make an IDT-specific #DB helper FRED provides PENDING_DBG in the the stack frame, avoiding the need to read %dr6 manually. Rename do_debug() to handle_DB(), and update it to take a dbg field using positive polarity. Introduce a new handle_DB_IDT() which reads %dr6. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/arch/x86/traps.c | 28 +++++++++++++++++----------- xen/arch/x86/x86_64/entry.S | 2 +- 2 files changed, 18 insertions(+), 12 deletions(-) diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 505cae4d26..3f1eae0d40 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -1998,14 +1998,11 @@ void asmlinkage do_device_not_available(struct cpu_user_regs *regs) void nocall sysenter_eflags_saved(void); -void asmlinkage do_debug(struct cpu_user_regs *regs) +/* Handle #DB. @dbg is PENDING_DBG, a.k.a. %dr6 with positive polarity. */ +static void handle_DB(struct cpu_user_regs *regs, unsigned long dbg) { - unsigned long dr6; struct vcpu *v = current; - /* Stash dr6 as early as possible. */ - dr6 = read_debugreg(6); - /* * At the time of writing (March 2018), on the subject of %dr6: * @@ -2073,13 +2070,13 @@ void asmlinkage do_debug(struct cpu_user_regs *regs) * If however we do, safety measures need to be enacted. Use a big * hammer and clear all debug settings. */ - if ( dr6 & (DR_TRAP3 | DR_TRAP2 | DR_TRAP1 | DR_TRAP0) ) + if ( dbg & (DR_TRAP3 | DR_TRAP2 | DR_TRAP1 | DR_TRAP0) ) { unsigned int bp, dr7 = read_debugreg(7); for ( bp = 0; bp < 4; ++bp ) { - if ( (dr6 & (1u << bp)) && /* Breakpoint triggered? */ + if ( (dbg & (1u << bp)) && /* Breakpoint triggered? */ (dr7 & (3u << (bp * DR_ENABLE_SIZE))) && /* Enabled? */ ((dr7 & (3u << ((bp * DR_CONTROL_SIZE) + /* Insn? */ DR_CONTROL_SHIFT))) == DR_RW_EXECUTE) ) @@ -2100,9 +2097,9 @@ void asmlinkage do_debug(struct cpu_user_regs *regs) * so ensure the message is ratelimited. */ gprintk(XENLOG_WARNING, - "Hit #DB in Xen context: %04x:%p [%ps], stk %04x:%p, dr6 %lx\n", + "Hit #DB in Xen context: %04x:%p [%ps], stk %04x:%p, dbg %lx\n", regs->cs, _p(regs->rip), _p(regs->rip), - regs->ss, _p(regs->rsp), dr6); + regs->ss, _p(regs->rsp), dbg); return; } @@ -2114,7 +2111,7 @@ void asmlinkage do_debug(struct cpu_user_regs *regs) * by debugging actions completed behind it's back. */ v->arch.dr6 = x86_merge_dr6(v->domain->arch.cpu_policy, - v->arch.dr6, dr6 ^ X86_DR6_DEFAULT); + v->arch.dr6, dbg); if ( guest_kernel_mode(v, regs) && v->domain->debugger_attached ) { @@ -2122,7 +2119,16 @@ void asmlinkage do_debug(struct cpu_user_regs *regs) return; } - pv_inject_DB(dr6 ^ X86_DR6_DEFAULT); + pv_inject_DB(dbg); +} + +/* + * When using IDT delivery, it is our responsibility to read %dr6. Convert it + * to positive polarity. + */ +void asmlinkage handle_DB_IDT(struct cpu_user_regs *regs) +{ + handle_DB(regs, read_debugreg(6) ^ X86_DR6_DEFAULT); } void asmlinkage do_entry_CP(struct cpu_user_regs *regs) diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S index 39c7b9d17f..789687488c 100644 --- a/xen/arch/x86/x86_64/entry.S +++ b/xen/arch/x86/x86_64/entry.S @@ -1171,7 +1171,7 @@ FUNC(handle_ist_exception) .L_ ## vec ## _done: DISPATCH(X86_EXC_NMI, do_nmi) - DISPATCH(X86_EXC_DB, do_debug) + DISPATCH(X86_EXC_DB, handle_DB_IDT) DISPATCH(X86_EXC_MC, do_machine_check) #undef DISPATCH -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Sat Dec 06 01:23:03 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 06 Dec 2025 01:23:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179655.1503106 (Exim 4.92) (envelope-from ) id 1vRh0p-0005O4-LC; Sat, 06 Dec 2025 01:23:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1179655.1503106; Sat, 06 Dec 2025 01:23:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRh0p-0005Nw-IJ; Sat, 06 Dec 2025 01:23:03 +0000 Received: by outflank-mailman (input) for mailman id 1179655; Sat, 06 Dec 2025 01:23:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRh0o-0005Nq-NF for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 01:23:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRh0o-009gRn-2D for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 01:23:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRh0o-00AvUt-27 for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 01:23:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Yv8C9jbVrLSBYtCD8Cvc0M7VWKSJQvVQg+pbT93+IF8=; b=Z2WSw6BNScQaxcu3/75SvUETnC Jm9g3DvOkIDiKyST4lBbKM8Ahcu5Zaf8ppfr4yXCfbtefnJCEOHnzjHSwKupHm1mMvlmmHlEis6ag OyMlgwZ7hZOXexUldfEwRa10jvuiCTtLZfrBrQpaRLnqyMtYX5X98tFgdnnmqGjKMsVY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/traps: Make an IDT-specific #PF helper Message-Id: Date: Sat, 06 Dec 2025 01:23:02 +0000 commit 4153eb7660ad441de75ab6dca50b54eb340d0728 Author: Andrew Cooper AuthorDate: Mon Aug 11 12:42:01 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 5 23:00:32 2025 +0000 x86/traps: Make an IDT-specific #PF helper FRED provides %cr2 in the the stack frame, avoiding the need to read %cr2 manually. Rename do_page_fault() to handle_PF(), and update it to take cr2, still named addr for consistency. Introduce a new handle_PF_IDT() which reads %cr2 and conditionally re-enables interrupts. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/arch/x86/traps.c | 26 ++++++++++++++------------ xen/arch/x86/x86_64/entry.S | 2 +- 2 files changed, 15 insertions(+), 13 deletions(-) diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 3f1eae0d40..6ba7ae5202 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -1676,21 +1676,10 @@ static int fixup_page_fault(unsigned long addr, struct cpu_user_regs *regs) return 0; } -void asmlinkage do_page_fault(struct cpu_user_regs *regs) +static void handle_PF(struct cpu_user_regs *regs, unsigned long addr /* cr2 */) { - unsigned long addr; unsigned int error_code; - addr = read_cr2(); - - /* - * Don't re-enable interrupts if we were running an IRQ-off region when - * we hit the page fault, or we'll break that code. - */ - ASSERT(!local_irq_is_enabled()); - if ( regs->flags & X86_EFLAGS_IF ) - local_irq_enable(); - /* fixup_page_fault() might change regs->error_code, so cache it here. */ error_code = regs->error_code; @@ -1751,6 +1740,19 @@ void asmlinkage do_page_fault(struct cpu_user_regs *regs) pv_inject_page_fault(regs->error_code, addr); } +/* + * When using IDT delivery, it is our responsibility to read %cr2. + */ +void asmlinkage handle_PF_IDT(struct cpu_user_regs *regs) +{ + unsigned long addr = read_cr2(); + + if ( regs->flags & X86_EFLAGS_IF ) + local_irq_enable(); + + handle_PF(regs, addr); +} + /* * Early #PF handler to print CR2, error code, and stack. * diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S index 789687488c..c02245ac06 100644 --- a/xen/arch/x86/x86_64/entry.S +++ b/xen/arch/x86/x86_64/entry.S @@ -871,7 +871,7 @@ handle_exception_saved: * reading %cr2. Otherwise a page fault in the nested interrupt handler * would corrupt %cr2. */ - DISPATCH(X86_EXC_PF, do_page_fault) + DISPATCH(X86_EXC_PF, handle_PF_IDT) /* Only re-enable IRQs if they were active before taking the fault */ testb $X86_EFLAGS_IF >> 8, UREGS_eflags + 1(%rsp) -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Sat Dec 06 01:23:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 06 Dec 2025 01:23:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179656.1503110 (Exim 4.92) (envelope-from ) id 1vRh0z-0005Q8-MK; Sat, 06 Dec 2025 01:23:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1179656.1503110; Sat, 06 Dec 2025 01:23:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRh0z-0005Q1-Jg; Sat, 06 Dec 2025 01:23:13 +0000 Received: by outflank-mailman (input) for mailman id 1179656; Sat, 06 Dec 2025 01:23:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRh0y-0005Pv-QB for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 01:23:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRh0y-009gRt-2X for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 01:23:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRh0y-00AwZS-2O for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 01:23:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=MoQ3L4sOmN/zP19lAhILn/jfsDarIA3cvURf8HEmsDM=; b=uC6cWcLuQdAdcrf2wVTOGqxSdm A9mF/SCUckFqo1MCfP/6EZcDCMyW6HLHAwlQGtrINqr3nVibhcg6sZTy4J+OS+KNvv0HF4ZJpSzsn NCW8zYg4Z2TcnrQgnKNfefMx1L9WoMhFLELDFx7v+sm3gMFo5OuWGxDLUFJYaXFi+RK8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/entry: Alter how IRET faults are recognised Message-Id: Date: Sat, 06 Dec 2025 01:23:12 +0000 commit 342e2e099d2e8690b1c90618f13abacc15838684 Author: Andrew Cooper AuthorDate: Mon Aug 18 09:26:25 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 5 23:00:32 2025 +0000 x86/entry: Alter how IRET faults are recognised Right now we have two IRET instructions that can fault for guest reasons, and the pre exception table gives handle_exception as the fixup for both. Instead, we can have compat_restore_all_guest() use restore_all_guest()'s IRET which gives us just a single position to handle specially. In exception_with_ints_disabled(), remove search_pre_exception_table() and use a simpler check. Explain how the recovery works, because this isn't the first time I've had to reverse engineer it for my own understanding. The reference to iret_to_guest highlights that any checking here is specific to CONFIG_PV, so exclude it in !PV builds. Later in exception_with_ints_disabled(), it suffices to load %ecx rather than %rcx, and remove a stray semi-colon from the REP MOVSQ. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/arch/x86/x86_64/compat/entry.S | 3 +-- xen/arch/x86/x86_64/entry.S | 31 +++++++++++++++++++++++-------- 2 files changed, 24 insertions(+), 10 deletions(-) diff --git a/xen/arch/x86/x86_64/compat/entry.S b/xen/arch/x86/x86_64/compat/entry.S index d7b381ea54..39925d80a6 100644 --- a/xen/arch/x86/x86_64/compat/entry.S +++ b/xen/arch/x86/x86_64/compat/entry.S @@ -167,8 +167,7 @@ FUNC(compat_restore_all_guest) scf=STK_REL(CPUINFO_scf, CPUINFO_rip), \ sel=STK_REL(CPUINFO_verw_sel, CPUINFO_rip) -.Lft0: iretq - _ASM_PRE_EXTABLE(.Lft0, handle_exception) + jmp iret_to_guest END(compat_restore_all_guest) /* Callers can cope with both %rax and %rcx being clobbered. */ diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S index c02245ac06..01b431793b 100644 --- a/xen/arch/x86/x86_64/entry.S +++ b/xen/arch/x86/x86_64/entry.S @@ -241,8 +241,9 @@ iret_exit_to_guest: SPEC_CTRL_COND_VERW /* Req: %rsp=eframe Clob: efl */ addq $8,%rsp -.Lft0: iretq - _ASM_PRE_EXTABLE(.Lft0, handle_exception) + +LABEL(iret_to_guest, 0) + iretq END(restore_all_guest) /* @@ -920,10 +921,23 @@ handle_exception_saved: exception_with_ints_disabled: testb $3,UREGS_cs(%rsp) # interrupts disabled outside Xen? jnz FATAL_exception_with_ints_disabled - movq %rsp,%rdi - call search_pre_exception_table - testq %rax,%rax # no fixup code for faulting EIP? - jz .Ldispatch_exceptions + +#ifndef CONFIG_PV + /* No PV? No IRETs-to-guest to worry about. */ + jmp .Ldispatch_exceptions +#else + /* Check to see if the exception was on the IRET to guest context. */ + lea iret_to_guest(%rip), %rax + cmp %rax, UREGS_rip(%rsp) + jne .Ldispatch_exceptions + + /* + * Recovery is at handle_exception. It may be necessary to make space + * on the interrupted stack for ec/ev, after which the current ec/ev + * is copied to make it appear as if this exception occurred in guest + * context. + */ + lea handle_exception(%rip), %rax movq %rax,UREGS_rip(%rsp) # fixup regular stack #ifdef CONFIG_XEN_SHSTK @@ -940,13 +954,14 @@ exception_with_ints_disabled: movq %rsp,%rsi subq $8,%rsp movq %rsp,%rdi - movq $UREGS_kernel_sizeof/8,%rcx - rep; movsq # make room for ec/ev + mov $UREGS_kernel_sizeof/8, %ecx + rep movsq # make room for ec/ev 1: movq UREGS_error_code(%rsp),%rax # ec/ev movq %rax,UREGS_kernel_sizeof(%rsp) mov %r15, STACK_CPUINFO_FIELD(xen_cr3)(%r14) mov %r13b, STACK_CPUINFO_FIELD(use_pv_cr3)(%r14) jmp restore_all_xen # return to fixup code +#endif /* !CONFIG_PV */ /* No special register assumptions. */ FATAL_exception_with_ints_disabled: -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Sat Dec 06 01:23:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 06 Dec 2025 01:23:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179657.1503113 (Exim 4.92) (envelope-from ) id 1vRh19-0005So-P3; Sat, 06 Dec 2025 01:23:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1179657.1503113; Sat, 06 Dec 2025 01:23:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRh19-0005Sg-Ma; Sat, 06 Dec 2025 01:23:23 +0000 Received: by outflank-mailman (input) for mailman id 1179657; Sat, 06 Dec 2025 01:23:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRh18-0005SX-TC for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 01:23:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRh18-009gRx-2o for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 01:23:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRh18-00AxiF-2i for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 01:23:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=d3/KCSYusFuVgPb8rKsOoTQZlZw/wOBvzv2FybolmKQ=; b=RB40qQb+tEVWQECsmXcmA5Lg2J V5EniodsrmlmDRngGpXkYXbfBDC4mAeDYQNhZX3Hofg4EGCUWlR5XsOTHAExiqMTQPCutrFU1pDSg //LRnOrhN7bk9pHtlzkdHJpQqBhc+gl2AJRltTX+tdQn3U7EGbc7ry4/CRaQtIgSJZIY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/entry: Drop the pre exception table infrastructure Message-Id: Date: Sat, 06 Dec 2025 01:23:22 +0000 commit 218e06e59a926ef99f2ee6f5a096871218270673 Author: Andrew Cooper AuthorDate: Mon Aug 18 13:04:36 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 5 23:00:32 2025 +0000 x86/entry: Drop the pre exception table infrastructure It is no longer used. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/extable.c | 14 -------------- xen/arch/x86/include/asm/asm_defns.h | 11 ++++------- xen/arch/x86/include/asm/uaccess.h | 2 -- xen/arch/x86/xen.lds.S | 5 ----- 4 files changed, 4 insertions(+), 28 deletions(-) diff --git a/xen/arch/x86/extable.c b/xen/arch/x86/extable.c index cf637d0921..a9b6c6b904 100644 --- a/xen/arch/x86/extable.c +++ b/xen/arch/x86/extable.c @@ -61,7 +61,6 @@ void init_or_livepatch sort_exception_table(struct exception_table_entry *start, void __init sort_exception_tables(void) { sort_exception_table(__start___ex_table, __stop___ex_table); - sort_exception_table(__start___pre_ex_table, __stop___pre_ex_table); } static unsigned long @@ -219,16 +218,3 @@ int __init cf_check stub_selftest(void) } __initcall(stub_selftest); #endif /* CONFIG_SELF_TESTS */ - -unsigned long asmlinkage search_pre_exception_table(struct cpu_user_regs *regs) -{ - unsigned long addr = regs->rip; - unsigned long fixup = search_one_extable( - __start___pre_ex_table, __stop___pre_ex_table, addr); - if ( fixup ) - { - dprintk(XENLOG_INFO, "Pre-exception: %p -> %p\n", _p(addr), _p(fixup)); - perfc_incr(exception_fixed); - } - return fixup; -} diff --git a/xen/arch/x86/include/asm/asm_defns.h b/xen/arch/x86/include/asm/asm_defns.h index 9b75c9cae3..4a21a7b466 100644 --- a/xen/arch/x86/include/asm/asm_defns.h +++ b/xen/arch/x86/include/asm/asm_defns.h @@ -65,22 +65,19 @@ register unsigned long current_stack_pointer asm("rsp"); /* Exception table entry */ #ifdef __ASSEMBLER__ -# define _ASM__EXTABLE(sfx, from, to) \ - .section .ex_table##sfx, "a" ; \ +# define _ASM_EXTABLE(from, to) \ + .section .ex_table, "a" ; \ .balign 4 ; \ .long _ASM_EX(from), _ASM_EX(to) ; \ .previous #else -# define _ASM__EXTABLE(sfx, from, to) \ - " .section .ex_table" #sfx ",\"a\"\n" \ +# define _ASM_EXTABLE(from, to) \ + " .section .ex_table,\"a\"\n" \ " .balign 4\n" \ " .long " _ASM_EX(from) ", " _ASM_EX(to) "\n" \ " .previous\n" #endif -#define _ASM_EXTABLE(from, to) _ASM__EXTABLE(, from, to) -#define _ASM_PRE_EXTABLE(from, to) _ASM__EXTABLE(.pre, from, to) - #ifdef __ASSEMBLER__ .macro BUILD_BUG_ON condstr, cond:vararg diff --git a/xen/arch/x86/include/asm/uaccess.h b/xen/arch/x86/include/asm/uaccess.h index 719d053936..4c41a0fe04 100644 --- a/xen/arch/x86/include/asm/uaccess.h +++ b/xen/arch/x86/include/asm/uaccess.h @@ -410,8 +410,6 @@ struct exception_table_entry }; extern struct exception_table_entry __start___ex_table[]; extern struct exception_table_entry __stop___ex_table[]; -extern struct exception_table_entry __start___pre_ex_table[]; -extern struct exception_table_entry __stop___pre_ex_table[]; union stub_exception_token { struct { diff --git a/xen/arch/x86/xen.lds.S b/xen/arch/x86/xen.lds.S index 527872a6db..1ee08a3ea3 100644 --- a/xen/arch/x86/xen.lds.S +++ b/xen/arch/x86/xen.lds.S @@ -119,11 +119,6 @@ SECTIONS *(.ex_table) __stop___ex_table = .; - /* Pre-exception table */ - __start___pre_ex_table = .; - *(.ex_table.pre) - __stop___pre_ex_table = .; - . = ALIGN(PAGE_SIZE); __ro_after_init_end = .; -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Sat Dec 06 01:23:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 06 Dec 2025 01:23:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179658.1503117 (Exim 4.92) (envelope-from ) id 1vRh1J-0005Up-Qb; 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Sat, 06 Dec 2025 01:23:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=e4NsDUgopnap3TEuqGipzopYidbvtyWgXp/O53DA3TI=; b=cCHRfV7cvNy9b9QdZ82utaCKmS DP/fGb0x9+UoQXFxkaeTD06Cnrd2t69/NeBiOZpGyqi9/b+wrswGZUoIXmAGbRQJsN+K5in1Mu1RO ELoxaeT3v8BpCJSP+Q3hZ+HFNMLfCzdTd6lNwmcf9j4SsrDJCDQ6UZCHzWCVdVb90COk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/entry: Rework the comment about SYSCALL and DF Message-Id: Date: Sat, 06 Dec 2025 01:23:32 +0000 commit 0ad41c61927d8a49518121c3d6e43a184c2117b1 Author: Andrew Cooper AuthorDate: Wed Aug 27 10:51:38 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 5 23:00:32 2025 +0000 x86/entry: Rework the comment about SYSCALL and DF It's soon going to be needed in a second location. Right now it's misleading saying that nothing else would be cleared. It's missing the more important point that SYSCALLs are treated like all other interrupts and exceptions, and undergo normal flags handling there. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/x86_64/entry.S | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S index 01b431793b..ca446c6ff0 100644 --- a/xen/arch/x86/x86_64/entry.S +++ b/xen/arch/x86/x86_64/entry.S @@ -39,10 +39,9 @@ FUNC_LOCAL(switch_to_kernel) leal (,%rcx,TBF_INTERRUPT),%ecx /* - * The PV ABI hardcodes the (guest-inaccessible and virtual) - * SYSCALL_MASK MSR such that DF (and nothing else) would be cleared. - * Note that the equivalent of IF (VGCF_syscall_disables_events) is - * dealt with separately above. + * The PV ABI, given no virtual SYSCALL_MASK, hardcodes that DF is + * cleared. Other flags are handled in the same way as interrupts and + * exceptions in create_bounce_frame(). */ mov $~X86_EFLAGS_DF, %esi -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Sat Dec 06 02:44:06 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 06 Dec 2025 02:44:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179679.1503132 (Exim 4.92) (envelope-from ) id 1vRiHD-0006pv-Bx; Sat, 06 Dec 2025 02:44:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1179679.1503132; Sat, 06 Dec 2025 02:44:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRiHD-0006pn-88; Sat, 06 Dec 2025 02:44:03 +0000 Received: by outflank-mailman (input) for mailman id 1179679; Sat, 06 Dec 2025 02:44:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRiHB-0006pP-Rr for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 02:44:01 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRiHB-009iXV-2L for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 02:44:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRiHB-000nZr-29 for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 02:44:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=HkkahRYjBW+AmA7cN32G4F2XboioFg7ILcmS7QAjSC4=; b=6sfejTEBaSZRZLxiC8sl4F0XEP oF89epIB7NkpiDMckriTnm3Q9TKP3IbUBrH0LknPtRXKKkPGGjPYNYq2vathsNzym6wqyF2EDtcdh +dYIt8TrXKsJxhmSDrSk9m1eeyBv0aieGP68rUKPF0WjjX83/okDzUb3HeJXtxSQ3ZPk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/fsgsbase: Split out __{rd,wr}gs_shadow() helpers Message-Id: Date: Sat, 06 Dec 2025 02:44:01 +0000 commit 9900679fa92596660d7d571113d98a6abfd95141 Author: Andrew Cooper AuthorDate: Thu Aug 14 14:32:03 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 5 23:00:32 2025 +0000 x86/fsgsbase: Split out __{rd,wr}gs_shadow() helpers Right now they're inline in {read,write}_gs_shadow(), but we're going to need to use these elsewhere to support FRED. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/arch/x86/include/asm/fsgsbase.h | 36 +++++++++++++++++++++++------------- 1 file changed, 23 insertions(+), 13 deletions(-) diff --git a/xen/arch/x86/include/asm/fsgsbase.h b/xen/arch/x86/include/asm/fsgsbase.h index 03e6a85d31..5577038426 100644 --- a/xen/arch/x86/include/asm/fsgsbase.h +++ b/xen/arch/x86/include/asm/fsgsbase.h @@ -32,6 +32,17 @@ static inline unsigned long __rdgsbase(void) return base; } +static inline unsigned long __rdgs_shadow(void) +{ + unsigned long base; + + asm_inline volatile ( "swapgs\n\t" + "rdgsbase %0\n\t" + "swapgs" : "=r" (base) ); + + return base; +} + static inline void __wrfsbase(unsigned long base) { asm volatile ( "wrfsbase %0" :: "r" (base) ); @@ -42,6 +53,14 @@ static inline void __wrgsbase(unsigned long base) asm volatile ( "wrgsbase %0" :: "r" (base) ); } +static inline void __wrgs_shadow(unsigned long base) +{ + asm_inline volatile ( "swapgs\n\t" + "wrgsbase %0\n\t" + "swapgs" + :: "r" (base) ); +} + static inline unsigned long read_fs_base(void) { unsigned long base; @@ -71,13 +90,9 @@ static inline unsigned long read_gs_shadow(void) unsigned long base; if ( read_cr4() & X86_CR4_FSGSBASE ) - { - asm volatile ( "swapgs" ); - base = __rdgsbase(); - asm volatile ( "swapgs" ); - } - else - rdmsrl(MSR_SHADOW_GS_BASE, base); + return __rdgs_shadow(); + + rdmsrl(MSR_SHADOW_GS_BASE, base); return base; } @@ -101,12 +116,7 @@ static inline void write_gs_base(unsigned long base) static inline void write_gs_shadow(unsigned long base) { if ( read_cr4() & X86_CR4_FSGSBASE ) - { - asm volatile ( "swapgs\n\t" - "wrgsbase %0\n\t" - "swapgs" - :: "r" (base) ); - } + __wrgs_shadow(base); else wrmsrl(MSR_SHADOW_GS_BASE, base); } -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Dec 06 02:44:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 06 Dec 2025 02:44:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179680.1503135 (Exim 4.92) (envelope-from ) id 1vRiHN-0006rk-Bt; Sat, 06 Dec 2025 02:44:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1179680.1503135; Sat, 06 Dec 2025 02:44:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRiHN-0006rd-9W; Sat, 06 Dec 2025 02:44:13 +0000 Received: by outflank-mailman (input) for mailman id 1179680; Sat, 06 Dec 2025 02:44:11 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRiHL-0006rT-UA for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 02:44:11 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRiHL-009iXi-2v for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 02:44:11 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRiHL-000odb-2k for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 02:44:11 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=NqGKR1jqlWBKmDrdGe3WCwL31Bs/fXbiDmkXi5Qc2AQ=; b=5Bso7PfG5YmzpGlJ/4yOjuzi/g IjxHhPOSSzfmYDyyb3cLaem1QIl5vtf6NDu686Q6ZLvHb5OhMs4HadseoiRiS7AUPW6okZaNDznpT fDjbUgIsZ6YFp6EFwTbgQBwztaSp6UUqA3EHw6TZJBdnICp68TeSzYA0chxqOUHXni6M=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/fsgsbase: Update fs/gs helpers to use wrmsrns() Message-Id: Date: Sat, 06 Dec 2025 02:44:11 +0000 commit 6b448a92a367839386994def3209c079fc98fe68 Author: Andrew Cooper AuthorDate: Thu Aug 14 15:26:56 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 5 23:00:32 2025 +0000 x86/fsgsbase: Update fs/gs helpers to use wrmsrns() ... and rdmsr() while here. Most of these accesses are in fastpaths and do not need serialising behaviour, but the write side is serialising on all Intel hardware as well as older AMD hardware. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/domain.c | 10 +++++----- xen/arch/x86/hvm/vmx/vmx.c | 4 ++-- xen/arch/x86/include/asm/fsgsbase.h | 30 +++++++++--------------------- 3 files changed, 16 insertions(+), 28 deletions(-) diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index 3a21e035f4..d89b7667d4 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -1860,9 +1860,9 @@ static void load_segments(struct vcpu *n) } else { - wrmsrl(MSR_FS_BASE, n->arch.pv.fs_base); - wrmsrl(MSR_GS_BASE, gsb); - wrmsrl(MSR_SHADOW_GS_BASE, gss); + wrmsrns(MSR_FS_BASE, n->arch.pv.fs_base); + wrmsrns(MSR_GS_BASE, gsb); + wrmsrns(MSR_SHADOW_GS_BASE, gss); } } @@ -1987,8 +1987,8 @@ static void save_segments(struct vcpu *v) } else { - rdmsrl(MSR_FS_BASE, fs_base); - rdmsrl(MSR_GS_BASE, gs_base); + fs_base = rdmsr(MSR_FS_BASE); + gs_base = rdmsr(MSR_GS_BASE); } v->arch.pv.fs_base = fs_base; diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 6b407226c4..05b59cb8e4 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -2800,8 +2800,8 @@ static uint64_t cf_check vmx_get_reg(struct vcpu *v, unsigned int reg) case MSR_SHADOW_GS_BASE: if ( v != curr ) return v->arch.hvm.vmx.shadow_gs; - rdmsrl(MSR_SHADOW_GS_BASE, val); - return val; + else + return rdmsr(MSR_SHADOW_GS_BASE); } /* Logic which maybe requires remote VMCS acquisition. */ diff --git a/xen/arch/x86/include/asm/fsgsbase.h b/xen/arch/x86/include/asm/fsgsbase.h index 5577038426..24862a6bfe 100644 --- a/xen/arch/x86/include/asm/fsgsbase.h +++ b/xen/arch/x86/include/asm/fsgsbase.h @@ -63,38 +63,26 @@ static inline void __wrgs_shadow(unsigned long base) static inline unsigned long read_fs_base(void) { - unsigned long base; - if ( read_cr4() & X86_CR4_FSGSBASE ) return __rdfsbase(); - - rdmsrl(MSR_FS_BASE, base); - - return base; + else + return rdmsr(MSR_FS_BASE); } static inline unsigned long read_gs_base(void) { - unsigned long base; - if ( read_cr4() & X86_CR4_FSGSBASE ) return __rdgsbase(); - - rdmsrl(MSR_GS_BASE, base); - - return base; + else + return rdmsr(MSR_GS_BASE); } static inline unsigned long read_gs_shadow(void) { - unsigned long base; - if ( read_cr4() & X86_CR4_FSGSBASE ) return __rdgs_shadow(); - - rdmsrl(MSR_SHADOW_GS_BASE, base); - - return base; + else + return rdmsr(MSR_SHADOW_GS_BASE); } static inline void write_fs_base(unsigned long base) @@ -102,7 +90,7 @@ static inline void write_fs_base(unsigned long base) if ( read_cr4() & X86_CR4_FSGSBASE ) __wrfsbase(base); else - wrmsrl(MSR_FS_BASE, base); + wrmsrns(MSR_FS_BASE, base); } static inline void write_gs_base(unsigned long base) @@ -110,7 +98,7 @@ static inline void write_gs_base(unsigned long base) if ( read_cr4() & X86_CR4_FSGSBASE ) __wrgsbase(base); else - wrmsrl(MSR_GS_BASE, base); + wrmsrns(MSR_GS_BASE, base); } static inline void write_gs_shadow(unsigned long base) @@ -118,7 +106,7 @@ static inline void write_gs_shadow(unsigned long base) if ( read_cr4() & X86_CR4_FSGSBASE ) __wrgs_shadow(base); else - wrmsrl(MSR_SHADOW_GS_BASE, base); + wrmsrns(MSR_SHADOW_GS_BASE, base); } #endif /* X86_FSGSBASE_H */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Dec 06 02:44:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 06 Dec 2025 02:44:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179681.1503140 (Exim 4.92) (envelope-from ) id 1vRiHX-0006tj-DW; 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Sat, 06 Dec 2025 02:44:21 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=w/YGnOrTh/palc/ulBS2Dr5FdnMHJCvYNvRDnttmaCQ=; b=WhMdwODJ6zzMMeBpvk6zpQoUUI y9yrursTq8BlvzlLCMl1/Gw8pq2aGIweTNtvZpQgXOTvs3JDpl67GyOLv/9mGnf1BhgeJXdg76Nlc Tc9G1Lb98v5LfufRyyZ8l6Fd0983yu52/JDjWso9MkYVJLr/t6Hl/KNTJbfVR7q8VaMU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/fsgsbase: Improve code generation in read_registers() Message-Id: Date: Sat, 06 Dec 2025 02:44:21 +0000 commit 42a0709f374966573851236589583c86b603e704 Author: Andrew Cooper AuthorDate: Tue Aug 12 12:48:06 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 5 23:00:32 2025 +0000 x86/fsgsbase: Improve code generation in read_registers() It turns out that using the higher level helpers adjacent like this leads to terrible code generation. Due to -fno-strict-aliasing, the store into state invalidates the read_cr4() address calculation (which is really cpu_info->cr4 under the hood), meaning that it can't be hoisted. As a result we get "locate the top of stack block, get cr4, and see if FSGSBASE is set" repeated 3 times, and an unreasonable number of basic blocks. Hoist the calculation manually, which results in two basic blocks. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/traps.c | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 0c5393cb21..505cae4d26 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -118,9 +118,24 @@ static void read_registers(struct extra_state *state) state->cr3 = read_cr3(); state->cr4 = read_cr4(); - state->fsb = read_fs_base(); - state->gsb = read_gs_base(); - state->gss = read_gs_shadow(); + /* + * Help the optimiser out by opencoding read_*_base() and rearranging the + * expression. -fno-strict-aliasing causes the store into state to + * invalidate the read_cr4() address calculation (really cpu_info->cr4 + * under the hood), forcing the cr4 check to be re-evaluated every time. + */ + if ( state->cr4 & X86_CR4_FSGSBASE ) + { + state->fsb = __rdfsbase(); + state->gsb = __rdgsbase(); + state->gss = __rdgs_shadow(); + } + else + { + state->fsb = rdmsr(MSR_FS_BASE); + state->gsb = rdmsr(MSR_GS_BASE); + state->gss = rdmsr(MSR_SHADOW_GS_BASE); + } asm ( "mov %%ds, %0" : "=m" (state->ds) ); asm ( "mov %%es, %0" : "=m" (state->es) ); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Dec 06 02:44:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 06 Dec 2025 02:44:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179682.1503144 (Exim 4.92) (envelope-from ) id 1vRiHh-0006wC-Fm; Sat, 06 Dec 2025 02:44:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1179682.1503144; Sat, 06 Dec 2025 02:44:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRiHh-0006w4-D9; Sat, 06 Dec 2025 02:44:33 +0000 Received: by outflank-mailman (input) for mailman id 1179682; Sat, 06 Dec 2025 02:44:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRiHg-0006vy-4b for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 02:44:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRiHg-009iXx-0M for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 02:44:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRiHg-000qTI-0F for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 02:44:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=RpdcoAKW9c9f+A2VedB/1a4H92ENVXG6Mu+W+QXub74=; b=XQQRa/W4mgxsQGG5sMapRlpIGK rIRcuBzfJeMlM92MCtGI//RkZJyX5t4odxFyMWP3ssmO2c4g6d2s2XEPjI3AFDtV1OAKnzISrFxuj b8ogAUDBCiTDbBQTRtd2WdL3o17UN7uSi4WutAUf03D7qWSe/KbntotJEVE6MHCOtrVY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/boot: Use RSTORSSP to establish SSP Message-Id: Date: Sat, 06 Dec 2025 02:44:32 +0000 commit 3037d8b7eb3e9c3c9e4a0a257115557c300795fc Author: Andrew Cooper AuthorDate: Mon May 26 18:48:26 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 5 23:00:32 2025 +0000 x86/boot: Use RSTORSSP to establish SSP Under FRED, SETSSBSY is disallowed, and we want to be setting up FRED prior to setting up shadow stacks. As we still need Supervisor Tokens in IDT mode, we need mode-specific logic to establish SSP. In FRED mode, write a Restore Token, RSTORSSP it, and discard the resulting Previous-SSP token. No change outside of FRED mode. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/arch/x86/boot/x86_64.S | 23 +++++++++++++++++++++-- xen/arch/x86/setup.c | 25 ++++++++++++++++++++++++- 2 files changed, 45 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/boot/x86_64.S b/xen/arch/x86/boot/x86_64.S index 11a7e9d3bd..9705d03f84 100644 --- a/xen/arch/x86/boot/x86_64.S +++ b/xen/arch/x86/boot/x86_64.S @@ -53,17 +53,21 @@ ENTRY(__high_start) mov %rcx, STACK_CPUINFO_FIELD(cr4)(%r15) mov %rcx, %cr4 - /* WARNING! call/ret now fatal (iff SHSTK) until SETSSBSY loads SSP */ + /* WARNING! CALL/RET now fatal (iff SHSTK) until SETSSBSY/RSTORSSP loads SSP */ #if defined(CONFIG_XEN_SHSTK) test $CET_SHSTK_EN, %al jz .L_ap_cet_done - /* Derive the supervisor token address from %rsp. */ + /* Derive the token address from %rsp. */ mov %rsp, %rdx and $~(STACK_SIZE - 1), %rdx or $(PRIMARY_SHSTK_SLOT + 1) * PAGE_SIZE - 8, %rdx + /* Establishing SSP differs between IDT or FRED mode. */ + bt $32 /* ilog2(X86_CR4_FRED) */, %rcx + jc .L_fred_shstk + /* * Write a new Supervisor Token. It doesn't matter the first time a * CPU boots, but for S3 resume or hotplug this clears the busy bit so @@ -71,6 +75,21 @@ ENTRY(__high_start) */ wrssq %rdx, (%rdx) setssbsy + jmp .L_ap_cet_done + +.L_fred_shstk: + + /* + * Write a Restore Token, value: &token + 8 + 64BIT (bit 0) at the + * base of the shstk (which isn't in use yet). + */ + lea 9(%rdx), %rdi + wrssq %rdi, (%rdx) + rstorssp (%rdx) + + /* Discard the Previous-SSP Token from the shstk. */ + mov $2, %edx + incsspd %edx #endif /* CONFIG_XEN_SHSTK */ .L_ap_cet_done: diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index 872a8c63f9..44da5efa1d 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -49,6 +49,7 @@ #include #include #include +#include #include #include #include @@ -908,7 +909,29 @@ static void __init noreturn reinit_bsp_stack(void) if ( cpu_has_xen_shstk ) { wrmsrl(MSR_S_CET, xen_msr_s_cet_value()); - asm volatile ("setssbsy" ::: "memory"); + + /* + * IDT and FRED differ by a Supervisor Token on the shadow stack. + * + * In IDT mode, we use SETSSBSY (itself using MSR_PL0_SSP, configured + * previously) to mark the Supervisor Token as Busy. In FRED mode, + * there is no token, so we need to create a temporary Restore Token + * to establish SSP. + */ + if ( opt_fred ) + { + unsigned long *token = + (void *)stack + (PRIMARY_SHSTK_SLOT + 1) * PAGE_SIZE - 8; + + wrss((unsigned long)token + 9, token); + asm volatile ( "rstorssp %0" : "+m" (*token) ); + /* + * We need to discard the resulting Previous-SSP Token, but + * reset_stack_and_jump() will do that for us. + */ + } + else + asm volatile ( "setssbsy" ::: "memory" ); } reset_stack_and_jump(init_done); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Dec 06 02:44:43 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 06 Dec 2025 02:44:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179683.1503148 (Exim 4.92) (envelope-from ) id 1vRiHr-0006z8-IF; Sat, 06 Dec 2025 02:44:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1179683.1503148; Sat, 06 Dec 2025 02:44:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRiHr-0006z0-Fk; Sat, 06 Dec 2025 02:44:43 +0000 Received: by outflank-mailman (input) for mailman id 1179683; Sat, 06 Dec 2025 02:44:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRiHq-0006yt-7G for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 02:44:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRiHq-009iY5-0d for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 02:44:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRiHq-000rdf-0X for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 02:44:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=6FNQUZxNdSsgWLmAYWJjy48PStTXkh+LbZLiGIbNjXA=; b=GdjVeLa+NPcmCcWigd7JMOrdcU Sw1De6w3wi48EPrH0J5lMBtB9gx4jsQAY1hZpUw04lEX4szGU2Wpf/HUAIW4JVWZHYE8ooRvPKh6i iQRfu01HIIIk5QIcdDky6HKN9ucbXiF2UNh30uTDE84vr8IWHWwJVGcZ9UC80IFKTXvY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/pv: Deduplicate is_canonical_address() in do_set_segment_base() Message-Id: Date: Sat, 06 Dec 2025 02:44:42 +0000 commit 524f3fa35efd7a425e1033d2fa5c927f61224d67 Author: Andrew Cooper AuthorDate: Tue Aug 12 12:48:06 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 5 23:00:32 2025 +0000 x86/pv: Deduplicate is_canonical_address() in do_set_segment_base() This is really a rearrangement to make adding FRED support easier. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/pv/misc-hypercalls.c | 32 +++++++++++++++++--------------- 1 file changed, 17 insertions(+), 15 deletions(-) diff --git a/xen/arch/x86/pv/misc-hypercalls.c b/xen/arch/x86/pv/misc-hypercalls.c index 7a37f16bf0..4c2abeb4ad 100644 --- a/xen/arch/x86/pv/misc-hypercalls.c +++ b/xen/arch/x86/pv/misc-hypercalls.c @@ -176,27 +176,29 @@ long do_set_segment_base(unsigned int which, unsigned long base) switch ( which ) { case SEGBASE_FS: - if ( is_canonical_address(base) ) - write_fs_base(base); - else + case SEGBASE_GS_USER: + case SEGBASE_GS_KERNEL: + if ( !is_canonical_address(base) ) + { ret = -EINVAL; - break; + break; + } - case SEGBASE_GS_USER: - if ( is_canonical_address(base) ) + switch ( which ) { - write_gs_shadow(base); + case SEGBASE_FS: + write_fs_base(base); + break; + + case SEGBASE_GS_USER: v->arch.pv.gs_base_user = base; - } - else - ret = -EINVAL; - break; + write_gs_shadow(base); + break; - case SEGBASE_GS_KERNEL: - if ( is_canonical_address(base) ) + case SEGBASE_GS_KERNEL: write_gs_base(base); - else - ret = -EINVAL; + break; + } break; case SEGBASE_GS_USER_SEL: -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Dec 06 02:44:53 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 06 Dec 2025 02:44:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179684.1503154 (Exim 4.92) (envelope-from ) id 1vRiI1-00071N-Kv; Sat, 06 Dec 2025 02:44:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1179684.1503154; Sat, 06 Dec 2025 02:44:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRiI1-00071G-HC; Sat, 06 Dec 2025 02:44:53 +0000 Received: by outflank-mailman (input) for mailman id 1179684; Sat, 06 Dec 2025 02:44:52 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRiI0-000716-CU for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 02:44:52 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRiI0-009iY9-19 for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 02:44:52 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRiI0-000spr-0s for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 02:44:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=CCSLNummQUUW1o6LiZtjFxxYhoICMqAgxz3qpD1yVoA=; b=33LQ3eDp0hd3p89/rJv5lqQSpt VsB38XC3rahZXd5v3cL+YxwEtiaK1sxel/8JaUBp+IJLxFacaZu41aTIenv2lCUKdSV68bigQzXWB hVQDZna7ljT4lE78DlaQC/WU2+YG23JiB+zAybTloSbeFh8iCX88uyKGUOHvSNSqkp6o=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/traps: Make an IDT-specific #DB helper Message-Id: Date: Sat, 06 Dec 2025 02:44:52 +0000 commit d9974d7860868d8a59fc95508ec768d300fed0b1 Author: Andrew Cooper AuthorDate: Mon Aug 11 12:42:01 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 5 23:00:32 2025 +0000 x86/traps: Make an IDT-specific #DB helper FRED provides PENDING_DBG in the the stack frame, avoiding the need to read %dr6 manually. Rename do_debug() to handle_DB(), and update it to take a dbg field using positive polarity. Introduce a new handle_DB_IDT() which reads %dr6. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/arch/x86/traps.c | 28 +++++++++++++++++----------- xen/arch/x86/x86_64/entry.S | 2 +- 2 files changed, 18 insertions(+), 12 deletions(-) diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 505cae4d26..3f1eae0d40 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -1998,14 +1998,11 @@ void asmlinkage do_device_not_available(struct cpu_user_regs *regs) void nocall sysenter_eflags_saved(void); -void asmlinkage do_debug(struct cpu_user_regs *regs) +/* Handle #DB. @dbg is PENDING_DBG, a.k.a. %dr6 with positive polarity. */ +static void handle_DB(struct cpu_user_regs *regs, unsigned long dbg) { - unsigned long dr6; struct vcpu *v = current; - /* Stash dr6 as early as possible. */ - dr6 = read_debugreg(6); - /* * At the time of writing (March 2018), on the subject of %dr6: * @@ -2073,13 +2070,13 @@ void asmlinkage do_debug(struct cpu_user_regs *regs) * If however we do, safety measures need to be enacted. Use a big * hammer and clear all debug settings. */ - if ( dr6 & (DR_TRAP3 | DR_TRAP2 | DR_TRAP1 | DR_TRAP0) ) + if ( dbg & (DR_TRAP3 | DR_TRAP2 | DR_TRAP1 | DR_TRAP0) ) { unsigned int bp, dr7 = read_debugreg(7); for ( bp = 0; bp < 4; ++bp ) { - if ( (dr6 & (1u << bp)) && /* Breakpoint triggered? */ + if ( (dbg & (1u << bp)) && /* Breakpoint triggered? */ (dr7 & (3u << (bp * DR_ENABLE_SIZE))) && /* Enabled? */ ((dr7 & (3u << ((bp * DR_CONTROL_SIZE) + /* Insn? */ DR_CONTROL_SHIFT))) == DR_RW_EXECUTE) ) @@ -2100,9 +2097,9 @@ void asmlinkage do_debug(struct cpu_user_regs *regs) * so ensure the message is ratelimited. */ gprintk(XENLOG_WARNING, - "Hit #DB in Xen context: %04x:%p [%ps], stk %04x:%p, dr6 %lx\n", + "Hit #DB in Xen context: %04x:%p [%ps], stk %04x:%p, dbg %lx\n", regs->cs, _p(regs->rip), _p(regs->rip), - regs->ss, _p(regs->rsp), dr6); + regs->ss, _p(regs->rsp), dbg); return; } @@ -2114,7 +2111,7 @@ void asmlinkage do_debug(struct cpu_user_regs *regs) * by debugging actions completed behind it's back. */ v->arch.dr6 = x86_merge_dr6(v->domain->arch.cpu_policy, - v->arch.dr6, dr6 ^ X86_DR6_DEFAULT); + v->arch.dr6, dbg); if ( guest_kernel_mode(v, regs) && v->domain->debugger_attached ) { @@ -2122,7 +2119,16 @@ void asmlinkage do_debug(struct cpu_user_regs *regs) return; } - pv_inject_DB(dr6 ^ X86_DR6_DEFAULT); + pv_inject_DB(dbg); +} + +/* + * When using IDT delivery, it is our responsibility to read %dr6. Convert it + * to positive polarity. + */ +void asmlinkage handle_DB_IDT(struct cpu_user_regs *regs) +{ + handle_DB(regs, read_debugreg(6) ^ X86_DR6_DEFAULT); } void asmlinkage do_entry_CP(struct cpu_user_regs *regs) diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S index 39c7b9d17f..789687488c 100644 --- a/xen/arch/x86/x86_64/entry.S +++ b/xen/arch/x86/x86_64/entry.S @@ -1171,7 +1171,7 @@ FUNC(handle_ist_exception) .L_ ## vec ## _done: DISPATCH(X86_EXC_NMI, do_nmi) - DISPATCH(X86_EXC_DB, do_debug) + DISPATCH(X86_EXC_DB, handle_DB_IDT) DISPATCH(X86_EXC_MC, do_machine_check) #undef DISPATCH -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Dec 06 02:45:03 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 06 Dec 2025 02:45:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179685.1503156 (Exim 4.92) (envelope-from ) id 1vRiIB-00073u-Ln; Sat, 06 Dec 2025 02:45:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1179685.1503156; Sat, 06 Dec 2025 02:45:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRiIB-00073n-Ir; Sat, 06 Dec 2025 02:45:03 +0000 Received: by outflank-mailman (input) for mailman id 1179685; Sat, 06 Dec 2025 02:45:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRiIA-00073d-GL for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 02:45:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRiIA-009iYw-1X for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 02:45:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRiIA-000tnd-1M for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 02:45:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=cNdiEzlPN3huSKOpeO2H++ohvDYneP7FPLhneSewEsA=; b=Wf8RKUNlJjXmwyZ/XBEjG71W0/ EI3ulsOa/mW9hmuRipK6eamC4UePR9zGvb/tB9lmHq5WfgqXmW7+S5+T1el0OkhPOIRSJJhIoOqkV f4eQ7mGH6ffXOvYS4/6S2tYJpuNIh8c0q/NOAWG1+LSEg38m1ZozjOfwffTvIMwajtcQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/traps: Make an IDT-specific #PF helper Message-Id: Date: Sat, 06 Dec 2025 02:45:02 +0000 commit 4153eb7660ad441de75ab6dca50b54eb340d0728 Author: Andrew Cooper AuthorDate: Mon Aug 11 12:42:01 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 5 23:00:32 2025 +0000 x86/traps: Make an IDT-specific #PF helper FRED provides %cr2 in the the stack frame, avoiding the need to read %cr2 manually. Rename do_page_fault() to handle_PF(), and update it to take cr2, still named addr for consistency. Introduce a new handle_PF_IDT() which reads %cr2 and conditionally re-enables interrupts. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/arch/x86/traps.c | 26 ++++++++++++++------------ xen/arch/x86/x86_64/entry.S | 2 +- 2 files changed, 15 insertions(+), 13 deletions(-) diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 3f1eae0d40..6ba7ae5202 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -1676,21 +1676,10 @@ static int fixup_page_fault(unsigned long addr, struct cpu_user_regs *regs) return 0; } -void asmlinkage do_page_fault(struct cpu_user_regs *regs) +static void handle_PF(struct cpu_user_regs *regs, unsigned long addr /* cr2 */) { - unsigned long addr; unsigned int error_code; - addr = read_cr2(); - - /* - * Don't re-enable interrupts if we were running an IRQ-off region when - * we hit the page fault, or we'll break that code. - */ - ASSERT(!local_irq_is_enabled()); - if ( regs->flags & X86_EFLAGS_IF ) - local_irq_enable(); - /* fixup_page_fault() might change regs->error_code, so cache it here. */ error_code = regs->error_code; @@ -1751,6 +1740,19 @@ void asmlinkage do_page_fault(struct cpu_user_regs *regs) pv_inject_page_fault(regs->error_code, addr); } +/* + * When using IDT delivery, it is our responsibility to read %cr2. + */ +void asmlinkage handle_PF_IDT(struct cpu_user_regs *regs) +{ + unsigned long addr = read_cr2(); + + if ( regs->flags & X86_EFLAGS_IF ) + local_irq_enable(); + + handle_PF(regs, addr); +} + /* * Early #PF handler to print CR2, error code, and stack. * diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S index 789687488c..c02245ac06 100644 --- a/xen/arch/x86/x86_64/entry.S +++ b/xen/arch/x86/x86_64/entry.S @@ -871,7 +871,7 @@ handle_exception_saved: * reading %cr2. Otherwise a page fault in the nested interrupt handler * would corrupt %cr2. */ - DISPATCH(X86_EXC_PF, do_page_fault) + DISPATCH(X86_EXC_PF, handle_PF_IDT) /* Only re-enable IRQs if they were active before taking the fault */ testb $X86_EFLAGS_IF >> 8, UREGS_eflags + 1(%rsp) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Dec 06 02:45:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 06 Dec 2025 02:45:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179686.1503161 (Exim 4.92) (envelope-from ) id 1vRiIL-00077T-NA; Sat, 06 Dec 2025 02:45:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1179686.1503161; Sat, 06 Dec 2025 02:45:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRiIL-00077K-KJ; Sat, 06 Dec 2025 02:45:13 +0000 Received: by outflank-mailman (input) for mailman id 1179686; Sat, 06 Dec 2025 02:45:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRiIK-00076M-J8 for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 02:45:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRiIK-009iZ0-1p for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 02:45:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRiIK-000uza-1j for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 02:45:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=WdeumrB/+eLjOwmpZVtAxMfWth47bB2dHLgrj50ygzs=; b=5SBdIulSZjZeBBcE+ir7qsnnkq Ir+Er+Dtc0Xvi1u/IzbWl5CljAVTagpja47UcLAZQWgglpxaDT1RT5vDQhfDsKrQss1GJdWIztoC+ t/Ebbtc84pvZnGvO38B2y2BVOrW4m3+DM6BJo0Ttm0UK6eArp5B8Zi6FDHKLZHKI7ljw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/entry: Alter how IRET faults are recognised Message-Id: Date: Sat, 06 Dec 2025 02:45:12 +0000 commit 342e2e099d2e8690b1c90618f13abacc15838684 Author: Andrew Cooper AuthorDate: Mon Aug 18 09:26:25 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 5 23:00:32 2025 +0000 x86/entry: Alter how IRET faults are recognised Right now we have two IRET instructions that can fault for guest reasons, and the pre exception table gives handle_exception as the fixup for both. Instead, we can have compat_restore_all_guest() use restore_all_guest()'s IRET which gives us just a single position to handle specially. In exception_with_ints_disabled(), remove search_pre_exception_table() and use a simpler check. Explain how the recovery works, because this isn't the first time I've had to reverse engineer it for my own understanding. The reference to iret_to_guest highlights that any checking here is specific to CONFIG_PV, so exclude it in !PV builds. Later in exception_with_ints_disabled(), it suffices to load %ecx rather than %rcx, and remove a stray semi-colon from the REP MOVSQ. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/arch/x86/x86_64/compat/entry.S | 3 +-- xen/arch/x86/x86_64/entry.S | 31 +++++++++++++++++++++++-------- 2 files changed, 24 insertions(+), 10 deletions(-) diff --git a/xen/arch/x86/x86_64/compat/entry.S b/xen/arch/x86/x86_64/compat/entry.S index d7b381ea54..39925d80a6 100644 --- a/xen/arch/x86/x86_64/compat/entry.S +++ b/xen/arch/x86/x86_64/compat/entry.S @@ -167,8 +167,7 @@ FUNC(compat_restore_all_guest) scf=STK_REL(CPUINFO_scf, CPUINFO_rip), \ sel=STK_REL(CPUINFO_verw_sel, CPUINFO_rip) -.Lft0: iretq - _ASM_PRE_EXTABLE(.Lft0, handle_exception) + jmp iret_to_guest END(compat_restore_all_guest) /* Callers can cope with both %rax and %rcx being clobbered. */ diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S index c02245ac06..01b431793b 100644 --- a/xen/arch/x86/x86_64/entry.S +++ b/xen/arch/x86/x86_64/entry.S @@ -241,8 +241,9 @@ iret_exit_to_guest: SPEC_CTRL_COND_VERW /* Req: %rsp=eframe Clob: efl */ addq $8,%rsp -.Lft0: iretq - _ASM_PRE_EXTABLE(.Lft0, handle_exception) + +LABEL(iret_to_guest, 0) + iretq END(restore_all_guest) /* @@ -920,10 +921,23 @@ handle_exception_saved: exception_with_ints_disabled: testb $3,UREGS_cs(%rsp) # interrupts disabled outside Xen? jnz FATAL_exception_with_ints_disabled - movq %rsp,%rdi - call search_pre_exception_table - testq %rax,%rax # no fixup code for faulting EIP? - jz .Ldispatch_exceptions + +#ifndef CONFIG_PV + /* No PV? No IRETs-to-guest to worry about. */ + jmp .Ldispatch_exceptions +#else + /* Check to see if the exception was on the IRET to guest context. */ + lea iret_to_guest(%rip), %rax + cmp %rax, UREGS_rip(%rsp) + jne .Ldispatch_exceptions + + /* + * Recovery is at handle_exception. It may be necessary to make space + * on the interrupted stack for ec/ev, after which the current ec/ev + * is copied to make it appear as if this exception occurred in guest + * context. + */ + lea handle_exception(%rip), %rax movq %rax,UREGS_rip(%rsp) # fixup regular stack #ifdef CONFIG_XEN_SHSTK @@ -940,13 +954,14 @@ exception_with_ints_disabled: movq %rsp,%rsi subq $8,%rsp movq %rsp,%rdi - movq $UREGS_kernel_sizeof/8,%rcx - rep; movsq # make room for ec/ev + mov $UREGS_kernel_sizeof/8, %ecx + rep movsq # make room for ec/ev 1: movq UREGS_error_code(%rsp),%rax # ec/ev movq %rax,UREGS_kernel_sizeof(%rsp) mov %r15, STACK_CPUINFO_FIELD(xen_cr3)(%r14) mov %r13b, STACK_CPUINFO_FIELD(use_pv_cr3)(%r14) jmp restore_all_xen # return to fixup code +#endif /* !CONFIG_PV */ /* No special register assumptions. */ FATAL_exception_with_ints_disabled: -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Dec 06 02:45:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 06 Dec 2025 02:45:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179687.1503164 (Exim 4.92) (envelope-from ) id 1vRiIV-0007BI-OL; Sat, 06 Dec 2025 02:45:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1179687.1503164; Sat, 06 Dec 2025 02:45:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRiIV-0007BA-Le; Sat, 06 Dec 2025 02:45:23 +0000 Received: by outflank-mailman (input) for mailman id 1179687; Sat, 06 Dec 2025 02:45:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vRiIU-0007B2-MJ for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 02:45:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vRiIU-009iZE-28 for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 02:45:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vRiIU-000w2R-21 for xen-changelog@lists.xenproject.org; Sat, 06 Dec 2025 02:45:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=VqdHN5Aubh1bOCSJOHlRYHjQYG+qLyY2/I/e3yfVWLQ=; b=dXo2oQSSer86Hhspxw8/gPui5/ pFE+oiNqC4/cm1sERfNbWs1aBxt6aaT6A2VIs7F81UZu758/mjOa53VaQU/BD+M+8jgs3xrbT6np6 hwnSOxfZQE0J5cbMbHwp3U8UJzd6e1+ANhFhzcLJUuNENYuQuIcI6rnux1qEgSDAnaXQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/entry: Drop the pre exception table infrastructure Message-Id: Date: Sat, 06 Dec 2025 02:45:22 +0000 commit 218e06e59a926ef99f2ee6f5a096871218270673 Author: Andrew Cooper AuthorDate: Mon Aug 18 13:04:36 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 5 23:00:32 2025 +0000 x86/entry: Drop the pre exception table infrastructure It is no longer used. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/extable.c | 14 -------------- xen/arch/x86/include/asm/asm_defns.h | 11 ++++------- xen/arch/x86/include/asm/uaccess.h | 2 -- xen/arch/x86/xen.lds.S | 5 ----- 4 files changed, 4 insertions(+), 28 deletions(-) diff --git a/xen/arch/x86/extable.c b/xen/arch/x86/extable.c index cf637d0921..a9b6c6b904 100644 --- a/xen/arch/x86/extable.c +++ b/xen/arch/x86/extable.c @@ -61,7 +61,6 @@ void init_or_livepatch sort_exception_table(struct exception_table_entry *start, void __init sort_exception_tables(void) { sort_exception_table(__start___ex_table, __stop___ex_table); - sort_exception_table(__start___pre_ex_table, __stop___pre_ex_table); } static unsigned long @@ -219,16 +218,3 @@ int __init cf_check stub_selftest(void) } __initcall(stub_selftest); #endif /* CONFIG_SELF_TESTS */ - -unsigned long asmlinkage search_pre_exception_table(struct cpu_user_regs *regs) -{ - unsigned long addr = regs->rip; - unsigned long fixup = search_one_extable( - __start___pre_ex_table, __stop___pre_ex_table, addr); - if ( fixup ) - { - dprintk(XENLOG_INFO, "Pre-exception: %p -> %p\n", _p(addr), _p(fixup)); - perfc_incr(exception_fixed); - } - return fixup; -} diff --git a/xen/arch/x86/include/asm/asm_defns.h b/xen/arch/x86/include/asm/asm_defns.h index 9b75c9cae3..4a21a7b466 100644 --- a/xen/arch/x86/include/asm/asm_defns.h +++ b/xen/arch/x86/include/asm/asm_defns.h @@ -65,22 +65,19 @@ register unsigned long current_stack_pointer asm("rsp"); /* Exception table entry */ #ifdef __ASSEMBLER__ -# define _ASM__EXTABLE(sfx, from, to) \ - .section .ex_table##sfx, "a" ; \ +# define _ASM_EXTABLE(from, to) \ + .section .ex_table, "a" ; \ .balign 4 ; \ .long _ASM_EX(from), _ASM_EX(to) ; \ .previous #else -# define _ASM__EXTABLE(sfx, from, to) \ - " .section .ex_table" #sfx ",\"a\"\n" \ +# define _ASM_EXTABLE(from, to) \ + " .section .ex_table,\"a\"\n" \ " .balign 4\n" \ " .long " _ASM_EX(from) ", " _ASM_EX(to) "\n" \ " .previous\n" #endif -#define _ASM_EXTABLE(from, to) _ASM__EXTABLE(, from, to) -#define _ASM_PRE_EXTABLE(from, to) _ASM__EXTABLE(.pre, from, to) - #ifdef __ASSEMBLER__ .macro BUILD_BUG_ON condstr, cond:vararg diff --git a/xen/arch/x86/include/asm/uaccess.h b/xen/arch/x86/include/asm/uaccess.h index 719d053936..4c41a0fe04 100644 --- a/xen/arch/x86/include/asm/uaccess.h +++ b/xen/arch/x86/include/asm/uaccess.h @@ -410,8 +410,6 @@ struct exception_table_entry }; extern struct exception_table_entry __start___ex_table[]; extern struct exception_table_entry __stop___ex_table[]; -extern struct exception_table_entry __start___pre_ex_table[]; -extern struct exception_table_entry __stop___pre_ex_table[]; union stub_exception_token { struct { diff --git a/xen/arch/x86/xen.lds.S b/xen/arch/x86/xen.lds.S index 527872a6db..1ee08a3ea3 100644 --- a/xen/arch/x86/xen.lds.S +++ b/xen/arch/x86/xen.lds.S @@ -119,11 +119,6 @@ SECTIONS *(.ex_table) __stop___ex_table = .; - /* Pre-exception table */ - __start___pre_ex_table = .; - *(.ex_table.pre) - __stop___pre_ex_table = .; - . = ALIGN(PAGE_SIZE); __ro_after_init_end = .; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Dec 06 02:45:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 06 Dec 2025 02:45:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1179688.1503167 (Exim 4.92) (envelope-from ) id 1vRiIf-0007Dj-Pe; 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Sat, 06 Dec 2025 02:45:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=W1Wfqt6pLpJipnkvxCYyzYQlBD+909kbB12HQaWm6wk=; b=sKvvmD6yCvzlHP7jCwxFTHu3nZ TiWPgzCROKCyOSHK8KyAtxP/Rcp/WZE49rEjuHUguwKpPgbxie4cnLkiasQR8fLMiMoLciT5ofIvF rWufXjoOkTGwHRbNfyu7mou+WjM5VGEVic8on+hPNCWaBwWfX+cS6+nhaIIKXax73jSM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/entry: Rework the comment about SYSCALL and DF Message-Id: Date: Sat, 06 Dec 2025 02:45:32 +0000 commit 0ad41c61927d8a49518121c3d6e43a184c2117b1 Author: Andrew Cooper AuthorDate: Wed Aug 27 10:51:38 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 5 23:00:32 2025 +0000 x86/entry: Rework the comment about SYSCALL and DF It's soon going to be needed in a second location. Right now it's misleading saying that nothing else would be cleared. It's missing the more important point that SYSCALLs are treated like all other interrupts and exceptions, and undergo normal flags handling there. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/x86_64/entry.S | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S index 01b431793b..ca446c6ff0 100644 --- a/xen/arch/x86/x86_64/entry.S +++ b/xen/arch/x86/x86_64/entry.S @@ -39,10 +39,9 @@ FUNC_LOCAL(switch_to_kernel) leal (,%rcx,TBF_INTERRUPT),%ecx /* - * The PV ABI hardcodes the (guest-inaccessible and virtual) - * SYSCALL_MASK MSR such that DF (and nothing else) would be cleared. - * Note that the equivalent of IF (VGCF_syscall_disables_events) is - * dealt with separately above. + * The PV ABI, given no virtual SYSCALL_MASK, hardcodes that DF is + * cleared. Other flags are handled in the same way as interrupts and + * exceptions in create_bounce_frame(). */ mov $~X86_EFLAGS_DF, %esi -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Mon Dec 08 17:11:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 08 Dec 2025 17:11:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1181044.1504122 (Exim 4.92) (envelope-from ) id 1vSelK-0000Da-Ed; Mon, 08 Dec 2025 17:11:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1181044.1504122; Mon, 08 Dec 2025 17:11:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSelK-0000DS-C0; Mon, 08 Dec 2025 17:11:02 +0000 Received: by outflank-mailman (input) for mailman id 1181044; Mon, 08 Dec 2025 17:11:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSelK-0000DM-5l for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 17:11:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vSelJ-0009xk-2c for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 17:11:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vSelK-0098w6-08 for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 17:11:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=aa7ADghHqIJ59+S2wjGkn3J2aW67cT5w2cNFxgVnLDg=; b=ad7n2/AVZwJoqtxr6Co7XYWx4n nbSjTJqcSUsZC1OsOusOq4Hi37rjwOgllHN7B4+YSva/gzC+zAOudKjRkRz8z2FFZ0XIory6AIUNW UPGo04HLCKV65jyoSrRfmuMnd0CqYIxb4kO9oGmCPwj7hP8g0xdk+rhMODTf690JqMNE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] symbols/arm: re-number intermediate files Message-Id: Date: Mon, 08 Dec 2025 17:11:02 +0000 commit ba7974b5d2581fb1f5b439c49a5d5b301817591d Author: Jan Beulich AuthorDate: Mon Dec 8 15:28:43 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 8 15:28:43 2025 +0100 symbols/arm: re-number intermediate files In preparation to do away with symbols-dummy, re-number the assembly and object files used, for the numbers to match the next passes real output. This is to make 0 available to use for what now is handled by symbols-dummy. Signed-off-by: Jan Beulich Acked-by: Julien Grall --- xen/arch/arm/Makefile | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile index 7e88ddd3d7..11c6b6b06d 100644 --- a/xen/arch/arm/Makefile +++ b/xen/arch/arm/Makefile @@ -89,16 +89,16 @@ $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds $(objtree)/common/symbols-dummy.o -o $(dot-target).0 $(NM) -pa --format=sysv $(dot-target).0 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ - > $(dot-target).0.S - $(MAKE) $(build)=$(@D) $(dot-target).0.o + > $(dot-target).1.S + $(MAKE) $(build)=$(@D) $(dot-target).1.o $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \ - $(dot-target).0.o -o $(dot-target).1 + $(dot-target).1.o -o $(dot-target).1 $(NM) -pa --format=sysv $(dot-target).1 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ - > $(dot-target).1.S - $(MAKE) $(build)=$(@D) $(dot-target).1.o + > $(dot-target).2.S + $(MAKE) $(build)=$(@D) $(dot-target).2.o $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ - $(dot-target).1.o -o $@ + $(dot-target).2.o -o $@ $(NM) -pa --format=sysv $@ \ | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > $@.map -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Mon Dec 08 17:11:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 08 Dec 2025 17:11:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1181045.1504125 (Exim 4.92) (envelope-from ) id 1vSelV-0000Fd-GD; Mon, 08 Dec 2025 17:11:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1181045.1504125; Mon, 08 Dec 2025 17:11:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSelV-0000FV-DQ; Mon, 08 Dec 2025 17:11:13 +0000 Received: by outflank-mailman (input) for mailman id 1181045; Mon, 08 Dec 2025 17:11:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSelU-0000FJ-7R for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 17:11:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vSelT-0009zo-2x for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 17:11:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vSelU-0099tl-0U for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 17:11:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ZcotYsO3bZ9kTiHUgaXO5KRyuGu5E1C24nbsr/C7Zx8=; b=e2+RDaRxqs+SNNptvaAdMKqVO2 WSP4aHp7oFlvtfHvn3+mK4o9pa8oZHc1LFEeNM4VMacsbx74i+aMmuorJ+D3+1I5I9X+GUrzs7p/G 6K90rmQCJBK8gwp/e1r3ecEyoc6jcpsQPG86D8UvUZEfsA+M8UV+/hGOdHHgZ0vINCnM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] symbols/arm: don't use symbols-dummy Message-Id: Date: Mon, 08 Dec 2025 17:11:12 +0000 commit d88873d01f4ec638daf722e332e2cab9f8ab3019 Author: Jan Beulich AuthorDate: Mon Dec 8 15:29:12 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 8 15:29:12 2025 +0100 symbols/arm: don't use symbols-dummy In particular when linking with lld, which converts hidden symbols to local ones, the ELF symbol table can change in unhelpful ways between the first two linking passes, resulting in the .rodata contributions to change between the 2nd and 3rd pass. That, however, renders our embedded symbol table pretty much unusable; the recently introduced self-test may then also fail. (Another difference between compiling a C file and assembling the generated ones is that - with -fdata-sections in use - the .rodata contributions move between passes 1 and 2, when we'd prefer them not to.) Signed-off-by: Jan Beulich Acked-by: Julien Grall --- xen/arch/arm/Makefile | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile index 11c6b6b06d..7494a0f926 100644 --- a/xen/arch/arm/Makefile +++ b/xen/arch/arm/Makefile @@ -85,8 +85,10 @@ ifeq ($(CONFIG_ARM_64),y) endif $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds + $(objtree)/tools/symbols $(all_symbols) --empty > $(dot-target).0.S + $(MAKE) $(build)=$(@D) $(dot-target).0.o $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \ - $(objtree)/common/symbols-dummy.o -o $(dot-target).0 + $(dot-target).0.o -o $(dot-target).0 $(NM) -pa --format=sysv $(dot-target).0 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > $(dot-target).1.S -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Mon Dec 08 17:11:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 08 Dec 2025 17:11:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1181046.1504129 (Exim 4.92) (envelope-from ) id 1vSelf-0000IZ-HU; Mon, 08 Dec 2025 17:11:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1181046.1504129; Mon, 08 Dec 2025 17:11:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSelf-0000IS-Er; Mon, 08 Dec 2025 17:11:23 +0000 Received: by outflank-mailman (input) for mailman id 1181046; Mon, 08 Dec 2025 17:11:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSele-0000IC-EL for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 17:11:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vSele-0009zs-0P for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 17:11:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vSele-009B5i-17 for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 17:11:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=KmlQl9J0PdCHH7f/0VhEl3Un6IVwWO3EQUeqSdrYlsg=; b=z1qichCAo1IYVt7DoIMRNRYWpy rG14b3RYRQ3aD49h7wmFSvSUiAwobSWLogyhPG+xi5k96E9/SFoSfslSgeb0DUJxA8gxrgtgiR2cP v9W0iHh0nclhHmJeYgFRMJFDGd+XkDOKZyPfLfOsQ/u/S+NOPqu+CsqbykUUMHQMCGdE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] symbols: drop symbols-dummy.c Message-Id: Date: Mon, 08 Dec 2025 17:11:22 +0000 commit 9dc90fd48d56013aa1e62e0c33f1155b18035176 Author: Jan Beulich AuthorDate: Mon Dec 8 15:29:39 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 8 15:51:20 2025 +0100 symbols: drop symbols-dummy.c No architecture using it anymore, we can as well get rid of it. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- docs/misra/exclude-list.json | 4 ---- xen/common/Makefile | 2 -- xen/common/symbols-dummy.c | 24 ------------------------ 3 files changed, 30 deletions(-) diff --git a/docs/misra/exclude-list.json b/docs/misra/exclude-list.json index 2567e8467c..388397dd3b 100644 --- a/docs/misra/exclude-list.json +++ b/docs/misra/exclude-list.json @@ -169,10 +169,6 @@ "rel_path": "common/zstd/*", "comment": "Imported from Linux, ignore for now" }, - { - "rel_path": "common/symbols-dummy.c", - "comment": "The resulting code is not included in the final Xen binary, ignore for now" - }, { "rel_path": "crypto/*", "comment": "Origin is external and documented in crypto/README.source" diff --git a/xen/common/Makefile b/xen/common/Makefile index 0c7d0f5d46..8486c0b510 100644 --- a/xen/common/Makefile +++ b/xen/common/Makefile @@ -74,8 +74,6 @@ ifneq ($(CONFIG_PV_SHIM_EXCLUSIVE),y) obj-y += domctl.o endif -extra-y := symbols-dummy.o - obj-$(CONFIG_COVERAGE) += coverage/ obj-y += sched/ obj-$(CONFIG_UBSAN) += ubsan/ diff --git a/xen/common/symbols-dummy.c b/xen/common/symbols-dummy.c deleted file mode 100644 index 57817c504b..0000000000 --- a/xen/common/symbols-dummy.c +++ /dev/null @@ -1,24 +0,0 @@ -/* - * symbols-dummy.c: dummy symbol-table definitions for the inital partial - * link of the hypervisor image. - */ - -#include "symbols.h" - -#ifdef SYMBOLS_ORIGIN -const unsigned int symbols_offsets[1]; -#else -const unsigned long symbols_addresses[1]; -#endif -const unsigned int symbols_num_addrs; -const unsigned char symbols_names[1]; - -#ifdef CONFIG_FAST_SYMBOL_LOOKUP -const unsigned int symbols_num_names; -const struct symbol_offset symbols_sorted_offsets[1]; -#endif - -const uint8_t symbols_token_table[1]; -const uint16_t symbols_token_index[1]; - -const unsigned int symbols_markers[1]; -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Mon Dec 08 17:11:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 08 Dec 2025 17:11:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1181047.1504134 (Exim 4.92) (envelope-from ) id 1vSelp-0000Ka-Ix; Mon, 08 Dec 2025 17:11:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1181047.1504134; Mon, 08 Dec 2025 17:11:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSelp-0000KS-GI; Mon, 08 Dec 2025 17:11:33 +0000 Received: by outflank-mailman (input) for mailman id 1181047; Mon, 08 Dec 2025 17:11:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSelo-0000KK-J7 for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 17:11:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vSelo-0009zy-0s for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 17:11:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vSelo-009CGl-1f for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 17:11:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=YShJwy2j+k9t/flJ2GRLTxcO0JQwFL7LchuUW0G9aeI=; b=1nITbXaBrLqiB1QVNEM47kA/04 fJn2ahyAeE/oAGTcW7UfsS/JOe/ZVd5ndjqqJwHCi+SyIN3mbtXZkoUYnmXwOJ4tbzhZJh8jf1Fdr MAFYg38xj0RnkPDnLk6vkoW9yt4DyyEZdK/3M8C+vSTFv7QRdrAlK9BwR06gfQMgi0nU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/gen_hypercall: Fix if indent Message-Id: Date: Mon, 08 Dec 2025 17:11:32 +0000 commit cc7095a82d62656200cdc87689a85ad6cd53afa2 Author: Jason Andryuk AuthorDate: Mon Dec 8 15:31:19 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 8 15:51:41 2025 +0100 xen/gen_hypercall: Fix if indent On x86, the opening if of call_handlers_*() is indented 4 spaces which breaks alignment. The alignment is broken by printf(" "), but that actually aligns ARM's opening "if ( likely() )". Move the indent to the if that needs it. This results in x86 hypercall-defs.h changes like: #define call_handlers_hvm64(num, ret, a1, a2, a3, a4, a5) \ ({ \ uint64_t mask = (num) > 63 ? 0 : 1ULL << (num); \ - if ( likely(mask & ((1ULL << __HYPERVISOR_vcpu_op) | (1ULL << __HYPERVISOR_event_channel_op))) ) \ + if ( likely(mask & ((1ULL << __HYPERVISOR_vcpu_op) | (1ULL << __HYPERVISOR_event_channel_op))) ) \ { \ if ( (num) == __HYPERVISOR_vcpu_op ) \ ARM's hypercall-defs.h does not change. Signed-off-by: Jason Andryuk Reviewed-by: Jan Beulich --- xen/scripts/gen_hypercall.awk | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/scripts/gen_hypercall.awk b/xen/scripts/gen_hypercall.awk index 47a18cd75e..b544fe1c4d 100644 --- a/xen/scripts/gen_hypercall.awk +++ b/xen/scripts/gen_hypercall.awk @@ -266,7 +266,7 @@ END { printf("({ \\\n"); if (need_mask) printf(" uint64_t mask = (num) > 63 ? 0 : 1ULL << (num); \\\n"); - printf(" "); + for (pl = 1; pl <= n_prios[ca]; pl++) { if (prios[ca, p_list[pl]] > 1) { if (pl < n_prios[ca]) { @@ -292,7 +292,7 @@ END { } else { for (i = 1; i <= nc; i++) if (call[i] == ca && call_prio[i] == p_list[pl]) { - printf("if ( likely((num) == __HYPERVISOR_%s) ) \\\n", fn[call_fn[i]]); + printf(" if ( likely((num) == __HYPERVISOR_%s) ) \\\n", fn[call_fn[i]]); do_call(call_fn[i], call_p[i]); } } -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Mon Dec 08 17:11:43 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 08 Dec 2025 17:11:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1181048.1504138 (Exim 4.92) (envelope-from ) id 1vSelz-0000Ml-KS; Mon, 08 Dec 2025 17:11:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1181048.1504138; Mon, 08 Dec 2025 17:11:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSelz-0000Md-Hf; Mon, 08 Dec 2025 17:11:43 +0000 Received: by outflank-mailman (input) for mailman id 1181048; Mon, 08 Dec 2025 17:11:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSely-0000MS-Lx for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 17:11:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vSely-000A0T-19 for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 17:11:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vSely-009DQN-1z for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 17:11:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=olGuwvEB6o4VnQybV1b+FXwHQZ60MFtxYTAi+z49U14=; b=O+Dzx0SVGfHtKuVbtKqenl39Li +vkEb4thE4xDF4Y78LetzqcnVc5KdySlwwTiaIf3LDoATURRUBC3JNJS71rE9oe/442OnKboPbM7/ VVcvaes8BUW8vegE83MbMpZiM69GZAOp10lXO9IYwyYfS8SuqMAMy+RcyV9SzP5Ub9D0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] arm/ppc/riscv: drop unused domain_set_alloc_bitsize() macro Message-Id: Date: Mon, 08 Dec 2025 17:11:42 +0000 commit b1e5f6f09cef6866aed450a6b5f71d7e384a8fb8 Author: Grygorii Strashko AuthorDate: Mon Dec 8 15:52:14 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 8 15:52:14 2025 +0100 arm/ppc/riscv: drop unused domain_set_alloc_bitsize() macro The domain_set_alloc_bitsize() is x86 PV32 specific and not used by other arch or common code, so remove it. Signed-off-by: Grygorii Strashko Acked-by: Jan Beulich Reviewed-by: Luca Fancellu #arm Reviewed-by: Oleksii Kurochko Acked-by: Michal Orzel --- xen/arch/arm/include/asm/mm.h | 1 - xen/arch/ppc/include/asm/mm.h | 1 - xen/arch/riscv/include/asm/mm.h | 1 - 3 files changed, 3 deletions(-) diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h index f702f4a0d6..4c6cc64aa7 100644 --- a/xen/arch/arm/include/asm/mm.h +++ b/xen/arch/arm/include/asm/mm.h @@ -313,7 +313,6 @@ struct page_info *get_page_from_gva(struct vcpu *v, vaddr_t va, /* Arch-specific portion of memory_op hypercall. */ long arch_memory_op(int op, XEN_GUEST_HANDLE_PARAM(void) arg); -#define domain_set_alloc_bitsize(d) ((void)0) #define domain_clamp_alloc_bitsize(d, b) (b) unsigned long domain_get_maximum_gpfn(struct domain *d); diff --git a/xen/arch/ppc/include/asm/mm.h b/xen/arch/ppc/include/asm/mm.h index a33eeec43b..e478291fdf 100644 --- a/xen/arch/ppc/include/asm/mm.h +++ b/xen/arch/ppc/include/asm/mm.h @@ -96,7 +96,6 @@ static inline struct page_info *virt_to_page(const void *v) /* TODO: implement */ #define mfn_valid(mfn) ({ (void) (mfn); 0; }) -#define domain_set_alloc_bitsize(d) ((void)(d)) #define domain_clamp_alloc_bitsize(d, b) (b) #define PFN_ORDER(pfn_) ((pfn_)->v.free.order) diff --git a/xen/arch/riscv/include/asm/mm.h b/xen/arch/riscv/include/asm/mm.h index 9283616c02..11e9f26bf0 100644 --- a/xen/arch/riscv/include/asm/mm.h +++ b/xen/arch/riscv/include/asm/mm.h @@ -292,7 +292,6 @@ static inline bool arch_mfns_in_directmap(unsigned long mfn, unsigned long nr) /* TODO: implement */ #define mfn_valid(mfn) ({ (void)(mfn); 0; }) -#define domain_set_alloc_bitsize(d) ((void)(d)) #define domain_clamp_alloc_bitsize(d, b) ((void)(d), (b)) #define PFN_ORDER(pg) ((pg)->v.free.order) -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Mon Dec 08 17:11:53 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 08 Dec 2025 17:11:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1181049.1504142 (Exim 4.92) (envelope-from ) id 1vSem9-0000Qq-Lm; Mon, 08 Dec 2025 17:11:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1181049.1504142; Mon, 08 Dec 2025 17:11:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSem9-0000Qi-J7; Mon, 08 Dec 2025 17:11:53 +0000 Received: by outflank-mailman (input) for mailman id 1181049; Mon, 08 Dec 2025 17:11:52 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSem8-0000Qc-Oi for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 17:11:52 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vSem8-000A0b-1S for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 17:11:52 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vSem8-009Eb1-2H for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 17:11:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=HCrT7QVjgYfAcrxbe/oJzidlAlR0V0EQU65iMFGdENc=; b=4NllGpcGNOEExefftug9C0bXua oQ2f0Wjsz6VaHmfb3DmBCY9BNQlfy8GixfXEc2EMIV7M8NDUNAfLx1MhtswOvq+0VJRvVRSLBBkm2 LMTllKTWU/LYHm5lPtswDEJWixlcOUdC+3z6jKcLDBmxtgRA04V4h3I7lN4bwf+TCvwY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/mm: add generic domain_clamp_alloc_bitsize() macro Message-Id: Date: Mon, 08 Dec 2025 17:11:52 +0000 commit ebed501734e53e8dec1293b708accddba94b8439 Author: Grygorii Strashko AuthorDate: Mon Dec 8 15:53:09 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 8 15:53:09 2025 +0100 xen/mm: add generic domain_clamp_alloc_bitsize() macro Add generic domain_clamp_alloc_bitsize() macro and clean up arch specific defines. Signed-off-by: Grygorii Strashko Acked-by: Jan Beulich Reviewed-by: Luca Fancellu #arm Reviewed-by: Oleksii Kurochko Acked-by: Michal Orzel --- xen/arch/arm/include/asm/mm.h | 2 -- xen/arch/ppc/include/asm/mm.h | 2 -- xen/arch/riscv/include/asm/mm.h | 2 -- xen/arch/x86/include/asm/mm.h | 1 + xen/include/xen/mm.h | 4 ++++ 5 files changed, 5 insertions(+), 6 deletions(-) diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h index 4c6cc64aa7..ec2d2dc537 100644 --- a/xen/arch/arm/include/asm/mm.h +++ b/xen/arch/arm/include/asm/mm.h @@ -313,8 +313,6 @@ struct page_info *get_page_from_gva(struct vcpu *v, vaddr_t va, /* Arch-specific portion of memory_op hypercall. */ long arch_memory_op(int op, XEN_GUEST_HANDLE_PARAM(void) arg); -#define domain_clamp_alloc_bitsize(d, b) (b) - unsigned long domain_get_maximum_gpfn(struct domain *d); /* Release all __init and __initdata ranges to be reused */ diff --git a/xen/arch/ppc/include/asm/mm.h b/xen/arch/ppc/include/asm/mm.h index e478291fdf..91c405876b 100644 --- a/xen/arch/ppc/include/asm/mm.h +++ b/xen/arch/ppc/include/asm/mm.h @@ -96,8 +96,6 @@ static inline struct page_info *virt_to_page(const void *v) /* TODO: implement */ #define mfn_valid(mfn) ({ (void) (mfn); 0; }) -#define domain_clamp_alloc_bitsize(d, b) (b) - #define PFN_ORDER(pfn_) ((pfn_)->v.free.order) struct page_info diff --git a/xen/arch/riscv/include/asm/mm.h b/xen/arch/riscv/include/asm/mm.h index 11e9f26bf0..e5ea91fa4d 100644 --- a/xen/arch/riscv/include/asm/mm.h +++ b/xen/arch/riscv/include/asm/mm.h @@ -292,8 +292,6 @@ static inline bool arch_mfns_in_directmap(unsigned long mfn, unsigned long nr) /* TODO: implement */ #define mfn_valid(mfn) ({ (void)(mfn); 0; }) -#define domain_clamp_alloc_bitsize(d, b) ((void)(d), (b)) - #define PFN_ORDER(pg) ((pg)->v.free.order) extern unsigned char cpu0_boot_stack[]; diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h index 08153e6d6f..17ca6666a3 100644 --- a/xen/arch/x86/include/asm/mm.h +++ b/xen/arch/x86/include/asm/mm.h @@ -621,6 +621,7 @@ extern int memory_add(unsigned long spfn, unsigned long epfn, unsigned int pxm); void domain_set_alloc_bitsize(struct domain *d); unsigned int domain_clamp_alloc_bitsize(struct domain *d, unsigned int bits); +#define domain_clamp_alloc_bitsize(d, bits) domain_clamp_alloc_bitsize(d, bits) unsigned long domain_get_maximum_gpfn(struct domain *d); diff --git a/xen/include/xen/mm.h b/xen/include/xen/mm.h index b968f47b87..426362adb2 100644 --- a/xen/include/xen/mm.h +++ b/xen/include/xen/mm.h @@ -641,4 +641,8 @@ static inline void put_page_alloc_ref(struct page_info *page) } } +#ifndef domain_clamp_alloc_bitsize +#define domain_clamp_alloc_bitsize(d, bits) ((void)(d), (bits)) +#endif + #endif /* __XEN_MM_H__ */ -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Mon Dec 08 18:33:09 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 08 Dec 2025 18:33:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1181067.1504157 (Exim 4.92) (envelope-from ) id 1vSg2h-0001av-DZ; Mon, 08 Dec 2025 18:33:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1181067.1504157; Mon, 08 Dec 2025 18:33:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSg2h-0001al-AZ; Mon, 08 Dec 2025 18:33:03 +0000 Received: by outflank-mailman (input) for mailman id 1181067; Mon, 08 Dec 2025 18:33:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSg2f-0001af-SI for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 18:33:01 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vSg2f-000BWz-1k for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 18:33:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vSg2f-000h6R-2U for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 18:33:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=EjoUaOnMdnZMxBFbu1NHYdFBysRc4y6E7AC+Xb677y8=; b=qUnwsYZIqC1jM2qwBnGttQt2ac ViDCV7Up9KmJGjGM8B0yL5UQwKmUXv2ThIys7eR1KRdxXAWUqF87sRddbb1MU8GLlMjMGTit7EjVf 2dE1g86pk2AulAaUpCehKckyimhXnBeyIa67zUqOA493jf8eYGDgSA861uZieMpfr4ic=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] symbols/arm: re-number intermediate files Message-Id: Date: Mon, 08 Dec 2025 18:33:01 +0000 commit ba7974b5d2581fb1f5b439c49a5d5b301817591d Author: Jan Beulich AuthorDate: Mon Dec 8 15:28:43 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 8 15:28:43 2025 +0100 symbols/arm: re-number intermediate files In preparation to do away with symbols-dummy, re-number the assembly and object files used, for the numbers to match the next passes real output. This is to make 0 available to use for what now is handled by symbols-dummy. Signed-off-by: Jan Beulich Acked-by: Julien Grall --- xen/arch/arm/Makefile | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile index 7e88ddd3d7..11c6b6b06d 100644 --- a/xen/arch/arm/Makefile +++ b/xen/arch/arm/Makefile @@ -89,16 +89,16 @@ $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds $(objtree)/common/symbols-dummy.o -o $(dot-target).0 $(NM) -pa --format=sysv $(dot-target).0 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ - > $(dot-target).0.S - $(MAKE) $(build)=$(@D) $(dot-target).0.o + > $(dot-target).1.S + $(MAKE) $(build)=$(@D) $(dot-target).1.o $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \ - $(dot-target).0.o -o $(dot-target).1 + $(dot-target).1.o -o $(dot-target).1 $(NM) -pa --format=sysv $(dot-target).1 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ - > $(dot-target).1.S - $(MAKE) $(build)=$(@D) $(dot-target).1.o + > $(dot-target).2.S + $(MAKE) $(build)=$(@D) $(dot-target).2.o $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ - $(dot-target).1.o -o $@ + $(dot-target).2.o -o $@ $(NM) -pa --format=sysv $@ \ | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > $@.map -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Mon Dec 08 18:33:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 08 Dec 2025 18:33:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1181068.1504159 (Exim 4.92) (envelope-from ) id 1vSg2r-0001cl-Fp; Mon, 08 Dec 2025 18:33:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1181068.1504159; Mon, 08 Dec 2025 18:33:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSg2r-0001cd-DA; Mon, 08 Dec 2025 18:33:13 +0000 Received: by outflank-mailman (input) for mailman id 1181068; Mon, 08 Dec 2025 18:33:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSg2q-0001cU-1P for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 18:33:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vSg2p-000BX5-29 for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 18:33:11 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vSg2p-000iMs-2s for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 18:33:11 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=6XgsvMQbWacFz4QzmPBu7Q00nCdMfirlnNN6OVbLuKM=; b=NtkQjW68CyeB5i/Hi/6mpenPY/ ai7vbakoQgQz8zwtQQtEkb9Ytn2pJZpjcpSlt2PugDMZFJ7pTxjxUR3gXN7+ejy0bIEJU2hfxsjkE nNGFl1OrWjAAeF9jNC74IWqjMjIwtSPOdBzSDA1HsHKwgoAC089YPbJ2bOfmCk5zDhQI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] symbols/arm: don't use symbols-dummy Message-Id: Date: Mon, 08 Dec 2025 18:33:11 +0000 commit d88873d01f4ec638daf722e332e2cab9f8ab3019 Author: Jan Beulich AuthorDate: Mon Dec 8 15:29:12 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 8 15:29:12 2025 +0100 symbols/arm: don't use symbols-dummy In particular when linking with lld, which converts hidden symbols to local ones, the ELF symbol table can change in unhelpful ways between the first two linking passes, resulting in the .rodata contributions to change between the 2nd and 3rd pass. That, however, renders our embedded symbol table pretty much unusable; the recently introduced self-test may then also fail. (Another difference between compiling a C file and assembling the generated ones is that - with -fdata-sections in use - the .rodata contributions move between passes 1 and 2, when we'd prefer them not to.) Signed-off-by: Jan Beulich Acked-by: Julien Grall --- xen/arch/arm/Makefile | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile index 11c6b6b06d..7494a0f926 100644 --- a/xen/arch/arm/Makefile +++ b/xen/arch/arm/Makefile @@ -85,8 +85,10 @@ ifeq ($(CONFIG_ARM_64),y) endif $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds + $(objtree)/tools/symbols $(all_symbols) --empty > $(dot-target).0.S + $(MAKE) $(build)=$(@D) $(dot-target).0.o $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \ - $(objtree)/common/symbols-dummy.o -o $(dot-target).0 + $(dot-target).0.o -o $(dot-target).0 $(NM) -pa --format=sysv $(dot-target).0 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > $(dot-target).1.S -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Mon Dec 08 18:33:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 08 Dec 2025 18:33:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1181069.1504163 (Exim 4.92) (envelope-from ) id 1vSg31-0001fd-H7; Mon, 08 Dec 2025 18:33:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1181069.1504163; Mon, 08 Dec 2025 18:33:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSg31-0001fV-Ec; Mon, 08 Dec 2025 18:33:23 +0000 Received: by outflank-mailman (input) for mailman id 1181069; Mon, 08 Dec 2025 18:33:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSg30-0001fO-2J for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 18:33:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vSg2z-000BX9-2R for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 18:33:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vSg30-000jWH-02 for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 18:33:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Vqa7jITqCBvz9OeWucvHaU8PIELf4gdYNTejSMvHKI0=; b=yJYFo2JHdNqxUcNIxn4F9nPHXA afmSxkz/4OlvuyewYVkPn1m1/GoALQVBKiBIUqV+AaKjJ1uj60nroLiJpU3NAjPYlQIdz32tIjssK qeNFVzYUqjPy43L+xPAq8Z8IWK9qPmXB4pSXWxIaTSb1AEPyjyVEMrWR5qp08wMxI49Q=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] symbols: drop symbols-dummy.c Message-Id: Date: Mon, 08 Dec 2025 18:33:22 +0000 commit 9dc90fd48d56013aa1e62e0c33f1155b18035176 Author: Jan Beulich AuthorDate: Mon Dec 8 15:29:39 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 8 15:51:20 2025 +0100 symbols: drop symbols-dummy.c No architecture using it anymore, we can as well get rid of it. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- docs/misra/exclude-list.json | 4 ---- xen/common/Makefile | 2 -- xen/common/symbols-dummy.c | 24 ------------------------ 3 files changed, 30 deletions(-) diff --git a/docs/misra/exclude-list.json b/docs/misra/exclude-list.json index 2567e8467c..388397dd3b 100644 --- a/docs/misra/exclude-list.json +++ b/docs/misra/exclude-list.json @@ -169,10 +169,6 @@ "rel_path": "common/zstd/*", "comment": "Imported from Linux, ignore for now" }, - { - "rel_path": "common/symbols-dummy.c", - "comment": "The resulting code is not included in the final Xen binary, ignore for now" - }, { "rel_path": "crypto/*", "comment": "Origin is external and documented in crypto/README.source" diff --git a/xen/common/Makefile b/xen/common/Makefile index 0c7d0f5d46..8486c0b510 100644 --- a/xen/common/Makefile +++ b/xen/common/Makefile @@ -74,8 +74,6 @@ ifneq ($(CONFIG_PV_SHIM_EXCLUSIVE),y) obj-y += domctl.o endif -extra-y := symbols-dummy.o - obj-$(CONFIG_COVERAGE) += coverage/ obj-y += sched/ obj-$(CONFIG_UBSAN) += ubsan/ diff --git a/xen/common/symbols-dummy.c b/xen/common/symbols-dummy.c deleted file mode 100644 index 57817c504b..0000000000 --- a/xen/common/symbols-dummy.c +++ /dev/null @@ -1,24 +0,0 @@ -/* - * symbols-dummy.c: dummy symbol-table definitions for the inital partial - * link of the hypervisor image. - */ - -#include "symbols.h" - -#ifdef SYMBOLS_ORIGIN -const unsigned int symbols_offsets[1]; -#else -const unsigned long symbols_addresses[1]; -#endif -const unsigned int symbols_num_addrs; -const unsigned char symbols_names[1]; - -#ifdef CONFIG_FAST_SYMBOL_LOOKUP -const unsigned int symbols_num_names; -const struct symbol_offset symbols_sorted_offsets[1]; -#endif - -const uint8_t symbols_token_table[1]; -const uint16_t symbols_token_index[1]; - -const unsigned int symbols_markers[1]; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Mon Dec 08 18:33:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 08 Dec 2025 18:33:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1181070.1504168 (Exim 4.92) (envelope-from ) id 1vSg3B-0001hj-Ij; Mon, 08 Dec 2025 18:33:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1181070.1504168; Mon, 08 Dec 2025 18:33:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSg3B-0001hb-G1; Mon, 08 Dec 2025 18:33:33 +0000 Received: by outflank-mailman (input) for mailman id 1181070; Mon, 08 Dec 2025 18:33:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSg3A-0001hR-89 for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 18:33:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vSg39-000BXE-31 for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 18:33:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vSg3A-000kvv-0X for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 18:33:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=vAB4qIOUIySffNf/2jLEd3pS4QsGHth0YsMIbXUnqxg=; b=o4YtpcpiLIY6lNfxXGlQerUbPM m34I9geLsQg9pDBGAa5Ja2EPXC0KuYqVenm8gPq6yhl+1qTg4E/KWv8lMQR1ga1cycXq8MIORccHN /CsvI74fxwHfrPdXmZ2EgOKe0l++AponZ1eN9Pe6tAY0fkgZe20/WAWz41x0395A8agM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/gen_hypercall: Fix if indent Message-Id: Date: Mon, 08 Dec 2025 18:33:32 +0000 commit cc7095a82d62656200cdc87689a85ad6cd53afa2 Author: Jason Andryuk AuthorDate: Mon Dec 8 15:31:19 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 8 15:51:41 2025 +0100 xen/gen_hypercall: Fix if indent On x86, the opening if of call_handlers_*() is indented 4 spaces which breaks alignment. The alignment is broken by printf(" "), but that actually aligns ARM's opening "if ( likely() )". Move the indent to the if that needs it. This results in x86 hypercall-defs.h changes like: #define call_handlers_hvm64(num, ret, a1, a2, a3, a4, a5) \ ({ \ uint64_t mask = (num) > 63 ? 0 : 1ULL << (num); \ - if ( likely(mask & ((1ULL << __HYPERVISOR_vcpu_op) | (1ULL << __HYPERVISOR_event_channel_op))) ) \ + if ( likely(mask & ((1ULL << __HYPERVISOR_vcpu_op) | (1ULL << __HYPERVISOR_event_channel_op))) ) \ { \ if ( (num) == __HYPERVISOR_vcpu_op ) \ ARM's hypercall-defs.h does not change. Signed-off-by: Jason Andryuk Reviewed-by: Jan Beulich --- xen/scripts/gen_hypercall.awk | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/scripts/gen_hypercall.awk b/xen/scripts/gen_hypercall.awk index 47a18cd75e..b544fe1c4d 100644 --- a/xen/scripts/gen_hypercall.awk +++ b/xen/scripts/gen_hypercall.awk @@ -266,7 +266,7 @@ END { printf("({ \\\n"); if (need_mask) printf(" uint64_t mask = (num) > 63 ? 0 : 1ULL << (num); \\\n"); - printf(" "); + for (pl = 1; pl <= n_prios[ca]; pl++) { if (prios[ca, p_list[pl]] > 1) { if (pl < n_prios[ca]) { @@ -292,7 +292,7 @@ END { } else { for (i = 1; i <= nc; i++) if (call[i] == ca && call_prio[i] == p_list[pl]) { - printf("if ( likely((num) == __HYPERVISOR_%s) ) \\\n", fn[call_fn[i]]); + printf(" if ( likely((num) == __HYPERVISOR_%s) ) \\\n", fn[call_fn[i]]); do_call(call_fn[i], call_p[i]); } } -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Mon Dec 08 18:33:43 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 08 Dec 2025 18:33:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1181071.1504171 (Exim 4.92) (envelope-from ) id 1vSg3L-0001jt-Jz; Mon, 08 Dec 2025 18:33:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1181071.1504171; Mon, 08 Dec 2025 18:33:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSg3L-0001jl-HT; Mon, 08 Dec 2025 18:33:43 +0000 Received: by outflank-mailman (input) for mailman id 1181071; Mon, 08 Dec 2025 18:33:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSg3K-0001jb-CI for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 18:33:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vSg3K-000BXf-0A for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 18:33:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vSg3K-000mEy-0v for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 18:33:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=FEaMkZIxbXT0baiJQJBCMYRLFcSNmQ79grYF7L8A5xY=; b=uRyjQj74vfcrDZD0EEwX8Z/WYj CVlYeBl0I9aw+dLwFTSnVEPQ5au64ilYtmkYM5+PTDh3//O0frD1bexJV5BgZrlHDftDsXNFeAwFP DzJ4tCIJrEM5dA5xGO56INkfOfYlwCvMkHIRPSoPvPxH/3ULF/bt54qLq7Y69KgUE4YY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] arm/ppc/riscv: drop unused domain_set_alloc_bitsize() macro Message-Id: Date: Mon, 08 Dec 2025 18:33:42 +0000 commit b1e5f6f09cef6866aed450a6b5f71d7e384a8fb8 Author: Grygorii Strashko AuthorDate: Mon Dec 8 15:52:14 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 8 15:52:14 2025 +0100 arm/ppc/riscv: drop unused domain_set_alloc_bitsize() macro The domain_set_alloc_bitsize() is x86 PV32 specific and not used by other arch or common code, so remove it. Signed-off-by: Grygorii Strashko Acked-by: Jan Beulich Reviewed-by: Luca Fancellu #arm Reviewed-by: Oleksii Kurochko Acked-by: Michal Orzel --- xen/arch/arm/include/asm/mm.h | 1 - xen/arch/ppc/include/asm/mm.h | 1 - xen/arch/riscv/include/asm/mm.h | 1 - 3 files changed, 3 deletions(-) diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h index f702f4a0d6..4c6cc64aa7 100644 --- a/xen/arch/arm/include/asm/mm.h +++ b/xen/arch/arm/include/asm/mm.h @@ -313,7 +313,6 @@ struct page_info *get_page_from_gva(struct vcpu *v, vaddr_t va, /* Arch-specific portion of memory_op hypercall. */ long arch_memory_op(int op, XEN_GUEST_HANDLE_PARAM(void) arg); -#define domain_set_alloc_bitsize(d) ((void)0) #define domain_clamp_alloc_bitsize(d, b) (b) unsigned long domain_get_maximum_gpfn(struct domain *d); diff --git a/xen/arch/ppc/include/asm/mm.h b/xen/arch/ppc/include/asm/mm.h index a33eeec43b..e478291fdf 100644 --- a/xen/arch/ppc/include/asm/mm.h +++ b/xen/arch/ppc/include/asm/mm.h @@ -96,7 +96,6 @@ static inline struct page_info *virt_to_page(const void *v) /* TODO: implement */ #define mfn_valid(mfn) ({ (void) (mfn); 0; }) -#define domain_set_alloc_bitsize(d) ((void)(d)) #define domain_clamp_alloc_bitsize(d, b) (b) #define PFN_ORDER(pfn_) ((pfn_)->v.free.order) diff --git a/xen/arch/riscv/include/asm/mm.h b/xen/arch/riscv/include/asm/mm.h index 9283616c02..11e9f26bf0 100644 --- a/xen/arch/riscv/include/asm/mm.h +++ b/xen/arch/riscv/include/asm/mm.h @@ -292,7 +292,6 @@ static inline bool arch_mfns_in_directmap(unsigned long mfn, unsigned long nr) /* TODO: implement */ #define mfn_valid(mfn) ({ (void)(mfn); 0; }) -#define domain_set_alloc_bitsize(d) ((void)(d)) #define domain_clamp_alloc_bitsize(d, b) ((void)(d), (b)) #define PFN_ORDER(pg) ((pg)->v.free.order) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Mon Dec 08 18:33:53 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 08 Dec 2025 18:33:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1181072.1504176 (Exim 4.92) (envelope-from ) id 1vSg3V-0001m6-LZ; Mon, 08 Dec 2025 18:33:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1181072.1504176; Mon, 08 Dec 2025 18:33:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSg3V-0001ly-J1; Mon, 08 Dec 2025 18:33:53 +0000 Received: by outflank-mailman (input) for mailman id 1181072; Mon, 08 Dec 2025 18:33:52 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSg3U-0001lq-FC for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 18:33:52 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vSg3U-000BXj-0U for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 18:33:52 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vSg3U-000nTm-1H for xen-changelog@lists.xenproject.org; Mon, 08 Dec 2025 18:33:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=buSLvxrLnDeJ6EeX3xJaDC36VZ/XDNbMy8Jj8ZpriYM=; b=nhnvi9WGIknnFOeqjKFP+1SfwF zsjQlGNacgVKT9U0HP0hyRg/g7IS0LIt0dy/pknqub+CNWH86gg+GB3zfICi140vnzyaIvFtzgWhI 6SFpksFXLLgYz1WE+9QzW3aXssiadrHXOXsKnh57j6cPMDdqrQvtW3LUDzjDWdq85Mfw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/mm: add generic domain_clamp_alloc_bitsize() macro Message-Id: Date: Mon, 08 Dec 2025 18:33:52 +0000 commit ebed501734e53e8dec1293b708accddba94b8439 Author: Grygorii Strashko AuthorDate: Mon Dec 8 15:53:09 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 8 15:53:09 2025 +0100 xen/mm: add generic domain_clamp_alloc_bitsize() macro Add generic domain_clamp_alloc_bitsize() macro and clean up arch specific defines. Signed-off-by: Grygorii Strashko Acked-by: Jan Beulich Reviewed-by: Luca Fancellu #arm Reviewed-by: Oleksii Kurochko Acked-by: Michal Orzel --- xen/arch/arm/include/asm/mm.h | 2 -- xen/arch/ppc/include/asm/mm.h | 2 -- xen/arch/riscv/include/asm/mm.h | 2 -- xen/arch/x86/include/asm/mm.h | 1 + xen/include/xen/mm.h | 4 ++++ 5 files changed, 5 insertions(+), 6 deletions(-) diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h index 4c6cc64aa7..ec2d2dc537 100644 --- a/xen/arch/arm/include/asm/mm.h +++ b/xen/arch/arm/include/asm/mm.h @@ -313,8 +313,6 @@ struct page_info *get_page_from_gva(struct vcpu *v, vaddr_t va, /* Arch-specific portion of memory_op hypercall. */ long arch_memory_op(int op, XEN_GUEST_HANDLE_PARAM(void) arg); -#define domain_clamp_alloc_bitsize(d, b) (b) - unsigned long domain_get_maximum_gpfn(struct domain *d); /* Release all __init and __initdata ranges to be reused */ diff --git a/xen/arch/ppc/include/asm/mm.h b/xen/arch/ppc/include/asm/mm.h index e478291fdf..91c405876b 100644 --- a/xen/arch/ppc/include/asm/mm.h +++ b/xen/arch/ppc/include/asm/mm.h @@ -96,8 +96,6 @@ static inline struct page_info *virt_to_page(const void *v) /* TODO: implement */ #define mfn_valid(mfn) ({ (void) (mfn); 0; }) -#define domain_clamp_alloc_bitsize(d, b) (b) - #define PFN_ORDER(pfn_) ((pfn_)->v.free.order) struct page_info diff --git a/xen/arch/riscv/include/asm/mm.h b/xen/arch/riscv/include/asm/mm.h index 11e9f26bf0..e5ea91fa4d 100644 --- a/xen/arch/riscv/include/asm/mm.h +++ b/xen/arch/riscv/include/asm/mm.h @@ -292,8 +292,6 @@ static inline bool arch_mfns_in_directmap(unsigned long mfn, unsigned long nr) /* TODO: implement */ #define mfn_valid(mfn) ({ (void)(mfn); 0; }) -#define domain_clamp_alloc_bitsize(d, b) ((void)(d), (b)) - #define PFN_ORDER(pg) ((pg)->v.free.order) extern unsigned char cpu0_boot_stack[]; diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h index 08153e6d6f..17ca6666a3 100644 --- a/xen/arch/x86/include/asm/mm.h +++ b/xen/arch/x86/include/asm/mm.h @@ -621,6 +621,7 @@ extern int memory_add(unsigned long spfn, unsigned long epfn, unsigned int pxm); void domain_set_alloc_bitsize(struct domain *d); unsigned int domain_clamp_alloc_bitsize(struct domain *d, unsigned int bits); +#define domain_clamp_alloc_bitsize(d, bits) domain_clamp_alloc_bitsize(d, bits) unsigned long domain_get_maximum_gpfn(struct domain *d); diff --git a/xen/include/xen/mm.h b/xen/include/xen/mm.h index b968f47b87..426362adb2 100644 --- a/xen/include/xen/mm.h +++ b/xen/include/xen/mm.h @@ -641,4 +641,8 @@ static inline void put_page_alloc_ref(struct page_info *page) } } +#ifndef domain_clamp_alloc_bitsize +#define domain_clamp_alloc_bitsize(d, bits) ((void)(d), (bits)) +#endif + #endif /* __XEN_MM_H__ */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Dec 09 11:44:08 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 09 Dec 2025 11:44:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1181509.1504541 (Exim 4.92) (envelope-from ) id 1vSw8S-0007f0-Ed; Tue, 09 Dec 2025 11:44:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1181509.1504541; Tue, 09 Dec 2025 11:44:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSw8S-0007es-BM; Tue, 09 Dec 2025 11:44:04 +0000 Received: by outflank-mailman (input) for mailman id 1181509; Tue, 09 Dec 2025 11:44:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSw8Q-0007em-Mp for xen-changelog@lists.xenproject.org; Tue, 09 Dec 2025 11:44:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vSw8Q-001dyh-16 for xen-changelog@lists.xenproject.org; Tue, 09 Dec 2025 11:44:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vSw8Q-008Tqz-1f for xen-changelog@lists.xenproject.org; Tue, 09 Dec 2025 11:44:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=2NXxqee9SnCk5cMoISmyr7hbXRUwO2iPs0og8/a1i1I=; b=gd0u2o2LWIuYDCN2R8R7GCV0wK ynRcZhvBiJiqdpDnmXbVnsAUbCGFN35kCm4AXe+NXk9m8x0H+UWUNmYu4OYuWwTvATcnQWnR58yuI tJ6YyJ4IQU/qXDFeLnP1MTPQgfD1GXi0u3SNed+pqPvun1QvhO5IeiD4WXW56rZl1Nbo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/riscv: avoid redundant HGATP*_MODE_SHIFT and HGATP*_VMID_SHIFT Message-Id: Date: Tue, 09 Dec 2025 11:44:02 +0000 commit 8e34a1d727ca7273b13c63fae6e9f78a7f00a2d5 Author: Oleksii Kurochko AuthorDate: Tue Dec 9 11:26:21 2025 +0100 Commit: Jan Beulich CommitDate: Tue Dec 9 11:26:21 2025 +0100 xen/riscv: avoid redundant HGATP*_MODE_SHIFT and HGATP*_VMID_SHIFT It is sufficient to use HGATP*_MODE_MASK and HGATP*_VMID_MASK without the corresponding *_SHIFT definitions. Rename HGATP{32,64}_PPN to HGATP{32,64}_PPN_MASK to more accurately describe their purpose. The top-level HGATP_PPN and related aliases are updated accordingly. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/include/asm/riscv_encoding.h | 16 ++++------------ 1 file changed, 4 insertions(+), 12 deletions(-) diff --git a/xen/arch/riscv/include/asm/riscv_encoding.h b/xen/arch/riscv/include/asm/riscv_encoding.h index 6cc8f4eb45..fd27f74cb7 100644 --- a/xen/arch/riscv/include/asm/riscv_encoding.h +++ b/xen/arch/riscv/include/asm/riscv_encoding.h @@ -132,15 +132,11 @@ #define HGATP_MODE_SV39X4 _UL(8) #define HGATP_MODE_SV48X4 _UL(9) -#define HGATP32_MODE_SHIFT 31 -#define HGATP32_VMID_SHIFT 22 #define HGATP32_VMID_MASK _UL(0x1FC00000) -#define HGATP32_PPN _UL(0x003FFFFF) +#define HGATP32_PPN_MASK _UL(0x003FFFFF) -#define HGATP64_MODE_SHIFT 60 -#define HGATP64_VMID_SHIFT 44 #define HGATP64_VMID_MASK _ULL(0x03FFF00000000000) -#define HGATP64_PPN _ULL(0x00000FFFFFFFFFFF) +#define HGATP64_PPN_MASK _ULL(0x00000FFFFFFFFFFF) #define PMP_R _UL(0x01) #define PMP_W _UL(0x02) @@ -166,10 +162,8 @@ #define SATP_MODE_SHIFT SATP64_MODE_SHIFT #define SATP_PPN_MASK SATP64_PPN -#define HGATP_PPN HGATP64_PPN -#define HGATP_VMID_SHIFT HGATP64_VMID_SHIFT +#define HGATP_PPN_MASK HGATP64_PPN_MASK #define HGATP_VMID_MASK HGATP64_VMID_MASK -#define HGATP_MODE_SHIFT HGATP64_MODE_SHIFT #else #define MSTATUS_SD MSTATUS32_SD #define SSTATUS_SD SSTATUS32_SD @@ -177,10 +171,8 @@ #define SATP_MODE_SHIFT SATP32_MODE_SHIFT #define SATP_PPN_MASK SATP32_PPN -#define HGATP_PPN HGATP32_PPN -#define HGATP_VMID_SHIFT HGATP32_VMID_SHIFT +#define HGATP_PPN_MASK HGATP32_PPN_MASK #define HGATP_VMID_MASK HGATP32_VMID_MASK -#define HGATP_MODE_SHIFT HGATP32_MODE_SHIFT #endif #define TOPI_IID_SHIFT 16 -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Tue Dec 09 11:44:14 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 09 Dec 2025 11:44:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1181510.1504544 (Exim 4.92) (envelope-from ) id 1vSw8c-0007gt-Fp; Tue, 09 Dec 2025 11:44:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1181510.1504544; Tue, 09 Dec 2025 11:44:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSw8c-0007gl-Cg; Tue, 09 Dec 2025 11:44:14 +0000 Received: by outflank-mailman (input) for mailman id 1181510; Tue, 09 Dec 2025 11:44:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSw8a-0007gQ-PB for xen-changelog@lists.xenproject.org; Tue, 09 Dec 2025 11:44:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vSw8a-001dyl-1T for xen-changelog@lists.xenproject.org; Tue, 09 Dec 2025 11:44:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vSw8a-008V3a-2G for xen-changelog@lists.xenproject.org; Tue, 09 Dec 2025 11:44:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ENX8kEjBV/oBCNj7/Y3bRQa0KEPZekdvrK9ccQzOkCs=; b=R/e1do7E4/+3ZpY6JPENO3zsmm 9CIXwKomIyzvxkWxPpEYlVQTWUtqrsoeVtlldFkoVpFhBN/rO9FLtBelsN4bGq3Ml+gB2+kdXtajG luC0TwzG1fGsXkskUscza/KEb5oVOmBbmDrNcS6exDZdcD2jsg8cGp3DBq8is3JrLaco=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen: move vcpu_kick() declaration to common header Message-Id: Date: Tue, 09 Dec 2025 11:44:12 +0000 commit 9dfcbabb68cfffd5c1bf4e481f1433a7beb02a29 Author: Oleksii Kurochko AuthorDate: Tue Dec 9 11:26:47 2025 +0100 Commit: Jan Beulich CommitDate: Tue Dec 9 11:26:47 2025 +0100 xen: move vcpu_kick() declaration to common header The vcpu_kick() declaration is duplicated across multiple architecture-specific event.h headers (ARM, x86, PPC). Remove the redundant declarations and move vcpu_kick() into the common xen/include/xen/sched.h header. Drop the definition of vcpu_kick() from ppc/include/asm/event.h, as it is already provided in ppc/stubs.c. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich Acked-by: Michal Orzel --- xen/arch/arm/include/asm/event.h | 1 - xen/arch/ppc/include/asm/event.h | 1 - xen/arch/x86/include/asm/event.h | 1 - xen/include/xen/sched.h | 1 + 4 files changed, 1 insertion(+), 3 deletions(-) diff --git a/xen/arch/arm/include/asm/event.h b/xen/arch/arm/include/asm/event.h index 509157b2b3..e036ab7fb8 100644 --- a/xen/arch/arm/include/asm/event.h +++ b/xen/arch/arm/include/asm/event.h @@ -3,7 +3,6 @@ #include -void vcpu_kick(struct vcpu *v); void vcpu_mark_events_pending(struct vcpu *v); void vcpu_update_evtchn_irq(struct vcpu *v); void vcpu_block_unless_event_pending(struct vcpu *v); diff --git a/xen/arch/ppc/include/asm/event.h b/xen/arch/ppc/include/asm/event.h index 0f475c4b89..565eee1439 100644 --- a/xen/arch/ppc/include/asm/event.h +++ b/xen/arch/ppc/include/asm/event.h @@ -5,7 +5,6 @@ #include /* TODO: implement */ -static inline void vcpu_kick(struct vcpu *v) { BUG_ON("unimplemented"); } static inline void vcpu_mark_events_pending(struct vcpu *v) { BUG_ON("unimplemented"); } static inline void vcpu_update_evtchn_irq(struct vcpu *v) { BUG_ON("unimplemented"); } static inline void vcpu_block_unless_event_pending(struct vcpu *v) { BUG_ON("unimplemented"); } diff --git a/xen/arch/x86/include/asm/event.h b/xen/arch/x86/include/asm/event.h index 434f65007e..d13ce28167 100644 --- a/xen/arch/x86/include/asm/event.h +++ b/xen/arch/x86/include/asm/event.h @@ -11,7 +11,6 @@ #include -void vcpu_kick(struct vcpu *v); void vcpu_mark_events_pending(struct vcpu *v); static inline int vcpu_event_delivery_is_enabled(struct vcpu *v) diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h index 52090b4f70..1f77e0869b 100644 --- a/xen/include/xen/sched.h +++ b/xen/include/xen/sched.h @@ -877,6 +877,7 @@ void vcpu_wake(struct vcpu *v); long vcpu_yield(void); void vcpu_sleep_nosync(struct vcpu *v); void vcpu_sleep_sync(struct vcpu *v); +void vcpu_kick(struct vcpu *v); /* * Force synchronisation of given VCPU's state. If it is currently descheduled, -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Tue Dec 09 11:44:24 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 09 Dec 2025 11:44:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1181511.1504548 (Exim 4.92) (envelope-from ) id 1vSw8m-0007jk-Hs; Tue, 09 Dec 2025 11:44:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1181511.1504548; Tue, 09 Dec 2025 11:44:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSw8m-0007jc-FD; Tue, 09 Dec 2025 11:44:24 +0000 Received: by outflank-mailman (input) for mailman id 1181511; Tue, 09 Dec 2025 11:44:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSw8k-0007jP-TU for xen-changelog@lists.xenproject.org; Tue, 09 Dec 2025 11:44:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vSw8k-001dyp-1v for xen-changelog@lists.xenproject.org; Tue, 09 Dec 2025 11:44:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vSw8k-008WRA-2e for xen-changelog@lists.xenproject.org; Tue, 09 Dec 2025 11:44:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=7otsRELBavdBoAKS7He6biyYmfDjOYFG6Z3QeAM5Zgg=; b=yWLNITQhhV4KcKdnPFWS27yIjH /NjlAlB+D65CYCVPB7rbJ82YwWSOgdCDkuAB4yVMQ/1FYHmja/ThfqAvyRKiQKO3reIMYwNnml2bm hKDsd7OZZbX1DoOMPIHw75CGpknVfZi9Vqy0hmMDCfDVu4B7Kq4MDgHqBzSCiyoVevIo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/domain: introduce generic functions for domain struct allocation and freeing Message-Id: Date: Tue, 09 Dec 2025 11:44:22 +0000 commit 63137a87311e1081bce0c5a4364492b4fc728bfb Author: Roger Pau Monné AuthorDate: Tue Dec 9 11:27:39 2025 +0100 Commit: Jan Beulich CommitDate: Tue Dec 9 11:27:39 2025 +0100 xen/domain: introduce generic functions for domain struct allocation and freeing Move x86's free_domain_struct() to common code since it is shared between architectures. Move the x86 version of alloc_domain_struct() to common code as most of the logic is architecture-independent. To handle the remaining architectural differences, introduce arch_domain_struct_memflags() for x86-specific allocation requirements. No functional change. Suggested-by: Jan Beulich [Introduce an arch-specific function instead of using a weak function] Signed-off-by: Roger Pau Monné Signed-off-by: Oleksii Kurochko Reviewed-by: Jan Beulich Acked-by: Michal Orzel --- xen/arch/arm/domain.c | 17 ----------------- xen/arch/ppc/stubs.c | 10 ---------- xen/arch/riscv/stubs.c | 10 ---------- xen/arch/x86/domain.c | 15 ++------------- xen/arch/x86/include/asm/domain.h | 3 +++ xen/common/domain.c | 21 +++++++++++++++++++++ 6 files changed, 26 insertions(+), 50 deletions(-) diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index 3e32a15cac..47973f99d9 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -468,23 +468,6 @@ void startup_cpu_idle_loop(void) reset_stack_and_jump(idle_loop); } -struct domain *alloc_domain_struct(void) -{ - struct domain *d; - BUILD_BUG_ON(sizeof(*d) > PAGE_SIZE); - d = alloc_xenheap_pages(0, 0); - if ( d == NULL ) - return NULL; - - clear_page(d); - return d; -} - -void free_domain_struct(struct domain *d) -{ - free_xenheap_page(d); -} - void dump_pageframe_info(struct domain *d) { diff --git a/xen/arch/ppc/stubs.c b/xen/arch/ppc/stubs.c index 75ebcae5e2..9953ea1c6c 100644 --- a/xen/arch/ppc/stubs.c +++ b/xen/arch/ppc/stubs.c @@ -147,11 +147,6 @@ void startup_cpu_idle_loop(void) BUG_ON("unimplemented"); } -void free_domain_struct(struct domain *d) -{ - BUG_ON("unimplemented"); -} - void dump_pageframe_info(struct domain *d) { BUG_ON("unimplemented"); @@ -269,11 +264,6 @@ void vcpu_kick(struct vcpu *v) BUG_ON("unimplemented"); } -struct domain *alloc_domain_struct(void) -{ - BUG_ON("unimplemented"); -} - struct vcpu *alloc_vcpu_struct(const struct domain *d) { BUG_ON("unimplemented"); diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c index 340ed3cd6c..fe7d85ee1d 100644 --- a/xen/arch/riscv/stubs.c +++ b/xen/arch/riscv/stubs.c @@ -121,11 +121,6 @@ void startup_cpu_idle_loop(void) BUG_ON("unimplemented"); } -void free_domain_struct(struct domain *d) -{ - BUG_ON("unimplemented"); -} - void dump_pageframe_info(struct domain *d) { BUG_ON("unimplemented"); @@ -243,11 +238,6 @@ void vcpu_kick(struct vcpu *v) BUG_ON("unimplemented"); } -struct domain *alloc_domain_struct(void) -{ - BUG_ON("unimplemented"); -} - struct vcpu *alloc_vcpu_struct(const struct domain *d) { BUG_ON("unimplemented"); diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index d89b7667d4..bd75d044a0 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -463,10 +463,8 @@ void domain_cpu_policy_changed(struct domain *d) } } -struct domain *alloc_domain_struct(void) +unsigned int arch_domain_struct_memflags(void) { - struct domain *d; - /* * Without CONFIG_BIGMEM, we pack the PDX of the domain structure into * a 32-bit field within the page_info structure. Hence the MEMF_bits() @@ -492,16 +490,7 @@ struct domain *alloc_domain_struct(void) - 1; #endif - BUILD_BUG_ON(sizeof(*d) > PAGE_SIZE); - d = alloc_xenheap_pages(0, MEMF_bits(bits)); - if ( d != NULL ) - clear_page(d); - return d; -} - -void free_domain_struct(struct domain *d) -{ - free_xenheap_page(d); + return MEMF_bits(bits); } struct vcpu *alloc_vcpu_struct(const struct domain *d) diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/domain.h index 5df8c78253..386ec61745 100644 --- a/xen/arch/x86/include/asm/domain.h +++ b/xen/arch/x86/include/asm/domain.h @@ -12,6 +12,9 @@ #include #include +unsigned int arch_domain_struct_memflags(void); +#define arch_domain_struct_memflags arch_domain_struct_memflags + #define has_32bit_shinfo(d) ((d)->arch.has_32bit_shinfo) /* diff --git a/xen/common/domain.c b/xen/common/domain.c index 850daf1ee8..93c71bc766 100644 --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -799,6 +799,27 @@ static int sanitise_domain_config(struct xen_domctl_createdomain *config) return arch_sanitise_domain_config(config); } +struct domain *alloc_domain_struct(void) +{ +#ifndef arch_domain_struct_memflags +# define arch_domain_struct_memflags() 0 +#endif + + struct domain *d = alloc_xenheap_pages(0, arch_domain_struct_memflags()); + + BUILD_BUG_ON(sizeof(*d) > PAGE_SIZE); + + if ( d ) + clear_page(d); + + return d; +} + +void free_domain_struct(struct domain *d) +{ + free_xenheap_page(d); +} + struct domain *domain_create(domid_t domid, struct xen_domctl_createdomain *config, unsigned int flags) -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Tue Dec 09 12:55:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 09 Dec 2025 12:55:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1181634.1504652 (Exim 4.92) (envelope-from ) id 1vSxF8-0005Ni-Tx; Tue, 09 Dec 2025 12:55:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1181634.1504652; Tue, 09 Dec 2025 12:55:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSxF8-0005NY-R7; Tue, 09 Dec 2025 12:55:02 +0000 Received: by outflank-mailman (input) for mailman id 1181634; Tue, 09 Dec 2025 12:55:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSxF8-0005NS-Iq for xen-changelog@lists.xenproject.org; Tue, 09 Dec 2025 12:55:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vSxF8-001fCw-0o for xen-changelog@lists.xenproject.org; Tue, 09 Dec 2025 12:55:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vSxF8-00Goxo-1X for xen-changelog@lists.xenproject.org; Tue, 09 Dec 2025 12:55:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=U6GohbzMLQI525HkKgrwNo1PuJ2MbmhK/Ujww9lcay0=; b=JTRuBU7ByvtBJBW+j2g/UQieOZ NxJfACI1y+0AD72aqanUvjzHd/6OhWTreMEP8UghDf40tHD9vJZABUxPI2hg4tgvwq7b30KmrAhKu ofNGm/Db0C3Ou6McBL1X5ZTOQ2DkQQOqttrWY1ZyItbl3sVFgG3r6Ea5Bhf58ml5D/j4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/riscv: avoid redundant HGATP*_MODE_SHIFT and HGATP*_VMID_SHIFT Message-Id: Date: Tue, 09 Dec 2025 12:55:02 +0000 commit 8e34a1d727ca7273b13c63fae6e9f78a7f00a2d5 Author: Oleksii Kurochko AuthorDate: Tue Dec 9 11:26:21 2025 +0100 Commit: Jan Beulich CommitDate: Tue Dec 9 11:26:21 2025 +0100 xen/riscv: avoid redundant HGATP*_MODE_SHIFT and HGATP*_VMID_SHIFT It is sufficient to use HGATP*_MODE_MASK and HGATP*_VMID_MASK without the corresponding *_SHIFT definitions. Rename HGATP{32,64}_PPN to HGATP{32,64}_PPN_MASK to more accurately describe their purpose. The top-level HGATP_PPN and related aliases are updated accordingly. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/include/asm/riscv_encoding.h | 16 ++++------------ 1 file changed, 4 insertions(+), 12 deletions(-) diff --git a/xen/arch/riscv/include/asm/riscv_encoding.h b/xen/arch/riscv/include/asm/riscv_encoding.h index 6cc8f4eb45..fd27f74cb7 100644 --- a/xen/arch/riscv/include/asm/riscv_encoding.h +++ b/xen/arch/riscv/include/asm/riscv_encoding.h @@ -132,15 +132,11 @@ #define HGATP_MODE_SV39X4 _UL(8) #define HGATP_MODE_SV48X4 _UL(9) -#define HGATP32_MODE_SHIFT 31 -#define HGATP32_VMID_SHIFT 22 #define HGATP32_VMID_MASK _UL(0x1FC00000) -#define HGATP32_PPN _UL(0x003FFFFF) +#define HGATP32_PPN_MASK _UL(0x003FFFFF) -#define HGATP64_MODE_SHIFT 60 -#define HGATP64_VMID_SHIFT 44 #define HGATP64_VMID_MASK _ULL(0x03FFF00000000000) -#define HGATP64_PPN _ULL(0x00000FFFFFFFFFFF) +#define HGATP64_PPN_MASK _ULL(0x00000FFFFFFFFFFF) #define PMP_R _UL(0x01) #define PMP_W _UL(0x02) @@ -166,10 +162,8 @@ #define SATP_MODE_SHIFT SATP64_MODE_SHIFT #define SATP_PPN_MASK SATP64_PPN -#define HGATP_PPN HGATP64_PPN -#define HGATP_VMID_SHIFT HGATP64_VMID_SHIFT +#define HGATP_PPN_MASK HGATP64_PPN_MASK #define HGATP_VMID_MASK HGATP64_VMID_MASK -#define HGATP_MODE_SHIFT HGATP64_MODE_SHIFT #else #define MSTATUS_SD MSTATUS32_SD #define SSTATUS_SD SSTATUS32_SD @@ -177,10 +171,8 @@ #define SATP_MODE_SHIFT SATP32_MODE_SHIFT #define SATP_PPN_MASK SATP32_PPN -#define HGATP_PPN HGATP32_PPN -#define HGATP_VMID_SHIFT HGATP32_VMID_SHIFT +#define HGATP_PPN_MASK HGATP32_PPN_MASK #define HGATP_VMID_MASK HGATP32_VMID_MASK -#define HGATP_MODE_SHIFT HGATP32_MODE_SHIFT #endif #define TOPI_IID_SHIFT 16 -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Dec 09 12:55:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 09 Dec 2025 12:55:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1181635.1504656 (Exim 4.92) (envelope-from ) id 1vSxFJ-0005Ph-VB; Tue, 09 Dec 2025 12:55:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1181635.1504656; Tue, 09 Dec 2025 12:55:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSxFJ-0005PZ-SU; Tue, 09 Dec 2025 12:55:13 +0000 Received: by outflank-mailman (input) for mailman id 1181635; Tue, 09 Dec 2025 12:55:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSxFI-0005PN-MF for xen-changelog@lists.xenproject.org; Tue, 09 Dec 2025 12:55:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vSxFI-001fD0-1C for xen-changelog@lists.xenproject.org; Tue, 09 Dec 2025 12:55:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vSxFI-00Gq6V-1x for xen-changelog@lists.xenproject.org; Tue, 09 Dec 2025 12:55:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=8f4F94GSa6e28B+tf3OlMDWK77UDgxtHumSj9TE/IC4=; b=Ym0IyZx1aOR8to+ieFxjWobm73 kw/CPk5SSDYXCtuzWXYB731P79Fa5PMTZ4i7BwkEcGy5Gi43q2s1ycDzjVOmkWXFvnSMx+354560V fLlD5TFs1RKNM9tGB2sKb/n6KXlOUAH9cLThTuDeShtP9CJf5EceYBoAp1LX7ZrrFO98=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen: move vcpu_kick() declaration to common header Message-Id: Date: Tue, 09 Dec 2025 12:55:12 +0000 commit 9dfcbabb68cfffd5c1bf4e481f1433a7beb02a29 Author: Oleksii Kurochko AuthorDate: Tue Dec 9 11:26:47 2025 +0100 Commit: Jan Beulich CommitDate: Tue Dec 9 11:26:47 2025 +0100 xen: move vcpu_kick() declaration to common header The vcpu_kick() declaration is duplicated across multiple architecture-specific event.h headers (ARM, x86, PPC). Remove the redundant declarations and move vcpu_kick() into the common xen/include/xen/sched.h header. Drop the definition of vcpu_kick() from ppc/include/asm/event.h, as it is already provided in ppc/stubs.c. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich Acked-by: Michal Orzel --- xen/arch/arm/include/asm/event.h | 1 - xen/arch/ppc/include/asm/event.h | 1 - xen/arch/x86/include/asm/event.h | 1 - xen/include/xen/sched.h | 1 + 4 files changed, 1 insertion(+), 3 deletions(-) diff --git a/xen/arch/arm/include/asm/event.h b/xen/arch/arm/include/asm/event.h index 509157b2b3..e036ab7fb8 100644 --- a/xen/arch/arm/include/asm/event.h +++ b/xen/arch/arm/include/asm/event.h @@ -3,7 +3,6 @@ #include -void vcpu_kick(struct vcpu *v); void vcpu_mark_events_pending(struct vcpu *v); void vcpu_update_evtchn_irq(struct vcpu *v); void vcpu_block_unless_event_pending(struct vcpu *v); diff --git a/xen/arch/ppc/include/asm/event.h b/xen/arch/ppc/include/asm/event.h index 0f475c4b89..565eee1439 100644 --- a/xen/arch/ppc/include/asm/event.h +++ b/xen/arch/ppc/include/asm/event.h @@ -5,7 +5,6 @@ #include /* TODO: implement */ -static inline void vcpu_kick(struct vcpu *v) { BUG_ON("unimplemented"); } static inline void vcpu_mark_events_pending(struct vcpu *v) { BUG_ON("unimplemented"); } static inline void vcpu_update_evtchn_irq(struct vcpu *v) { BUG_ON("unimplemented"); } static inline void vcpu_block_unless_event_pending(struct vcpu *v) { BUG_ON("unimplemented"); } diff --git a/xen/arch/x86/include/asm/event.h b/xen/arch/x86/include/asm/event.h index 434f65007e..d13ce28167 100644 --- a/xen/arch/x86/include/asm/event.h +++ b/xen/arch/x86/include/asm/event.h @@ -11,7 +11,6 @@ #include -void vcpu_kick(struct vcpu *v); void vcpu_mark_events_pending(struct vcpu *v); static inline int vcpu_event_delivery_is_enabled(struct vcpu *v) diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h index 52090b4f70..1f77e0869b 100644 --- a/xen/include/xen/sched.h +++ b/xen/include/xen/sched.h @@ -877,6 +877,7 @@ void vcpu_wake(struct vcpu *v); long vcpu_yield(void); void vcpu_sleep_nosync(struct vcpu *v); void vcpu_sleep_sync(struct vcpu *v); +void vcpu_kick(struct vcpu *v); /* * Force synchronisation of given VCPU's state. If it is currently descheduled, -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Dec 09 12:55:24 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 09 Dec 2025 12:55:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1181636.1504660 (Exim 4.92) (envelope-from ) id 1vSxFU-0005Rv-0D; Tue, 09 Dec 2025 12:55:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1181636.1504660; Tue, 09 Dec 2025 12:55:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSxFT-0005Rn-Tr; Tue, 09 Dec 2025 12:55:23 +0000 Received: by outflank-mailman (input) for mailman id 1181636; Tue, 09 Dec 2025 12:55:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vSxFS-0005Rf-PP for xen-changelog@lists.xenproject.org; Tue, 09 Dec 2025 12:55:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vSxFS-001fD6-1W for xen-changelog@lists.xenproject.org; Tue, 09 Dec 2025 12:55:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vSxFS-00GrKb-2L for xen-changelog@lists.xenproject.org; Tue, 09 Dec 2025 12:55:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=I45DoTaB2n+pCM/tmL7af1w4i0seFJF7h2/Egw6TziY=; b=is+JwskAuTaBjDDqucgp3L4UFL uuxTvAVfb8zlaEIJVLRBkq9jZ+OwH7kb60/w4vXTZ4ehtt3+xS96PxyCsCAIaGCZI9NdZgGQqC8H4 ErRV5eH8Z1spt/lGkl6mKE8PLiUwZp0sxtM4ORImF12imGisKO7sK+ari6oQOBNjrW/I=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/domain: introduce generic functions for domain struct allocation and freeing Message-Id: Date: Tue, 09 Dec 2025 12:55:22 +0000 commit 63137a87311e1081bce0c5a4364492b4fc728bfb Author: Roger Pau Monné AuthorDate: Tue Dec 9 11:27:39 2025 +0100 Commit: Jan Beulich CommitDate: Tue Dec 9 11:27:39 2025 +0100 xen/domain: introduce generic functions for domain struct allocation and freeing Move x86's free_domain_struct() to common code since it is shared between architectures. Move the x86 version of alloc_domain_struct() to common code as most of the logic is architecture-independent. To handle the remaining architectural differences, introduce arch_domain_struct_memflags() for x86-specific allocation requirements. No functional change. Suggested-by: Jan Beulich [Introduce an arch-specific function instead of using a weak function] Signed-off-by: Roger Pau Monné Signed-off-by: Oleksii Kurochko Reviewed-by: Jan Beulich Acked-by: Michal Orzel --- xen/arch/arm/domain.c | 17 ----------------- xen/arch/ppc/stubs.c | 10 ---------- xen/arch/riscv/stubs.c | 10 ---------- xen/arch/x86/domain.c | 15 ++------------- xen/arch/x86/include/asm/domain.h | 3 +++ xen/common/domain.c | 21 +++++++++++++++++++++ 6 files changed, 26 insertions(+), 50 deletions(-) diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index 3e32a15cac..47973f99d9 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -468,23 +468,6 @@ void startup_cpu_idle_loop(void) reset_stack_and_jump(idle_loop); } -struct domain *alloc_domain_struct(void) -{ - struct domain *d; - BUILD_BUG_ON(sizeof(*d) > PAGE_SIZE); - d = alloc_xenheap_pages(0, 0); - if ( d == NULL ) - return NULL; - - clear_page(d); - return d; -} - -void free_domain_struct(struct domain *d) -{ - free_xenheap_page(d); -} - void dump_pageframe_info(struct domain *d) { diff --git a/xen/arch/ppc/stubs.c b/xen/arch/ppc/stubs.c index 75ebcae5e2..9953ea1c6c 100644 --- a/xen/arch/ppc/stubs.c +++ b/xen/arch/ppc/stubs.c @@ -147,11 +147,6 @@ void startup_cpu_idle_loop(void) BUG_ON("unimplemented"); } -void free_domain_struct(struct domain *d) -{ - BUG_ON("unimplemented"); -} - void dump_pageframe_info(struct domain *d) { BUG_ON("unimplemented"); @@ -269,11 +264,6 @@ void vcpu_kick(struct vcpu *v) BUG_ON("unimplemented"); } -struct domain *alloc_domain_struct(void) -{ - BUG_ON("unimplemented"); -} - struct vcpu *alloc_vcpu_struct(const struct domain *d) { BUG_ON("unimplemented"); diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c index 340ed3cd6c..fe7d85ee1d 100644 --- a/xen/arch/riscv/stubs.c +++ b/xen/arch/riscv/stubs.c @@ -121,11 +121,6 @@ void startup_cpu_idle_loop(void) BUG_ON("unimplemented"); } -void free_domain_struct(struct domain *d) -{ - BUG_ON("unimplemented"); -} - void dump_pageframe_info(struct domain *d) { BUG_ON("unimplemented"); @@ -243,11 +238,6 @@ void vcpu_kick(struct vcpu *v) BUG_ON("unimplemented"); } -struct domain *alloc_domain_struct(void) -{ - BUG_ON("unimplemented"); -} - struct vcpu *alloc_vcpu_struct(const struct domain *d) { BUG_ON("unimplemented"); diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index d89b7667d4..bd75d044a0 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -463,10 +463,8 @@ void domain_cpu_policy_changed(struct domain *d) } } -struct domain *alloc_domain_struct(void) +unsigned int arch_domain_struct_memflags(void) { - struct domain *d; - /* * Without CONFIG_BIGMEM, we pack the PDX of the domain structure into * a 32-bit field within the page_info structure. Hence the MEMF_bits() @@ -492,16 +490,7 @@ struct domain *alloc_domain_struct(void) - 1; #endif - BUILD_BUG_ON(sizeof(*d) > PAGE_SIZE); - d = alloc_xenheap_pages(0, MEMF_bits(bits)); - if ( d != NULL ) - clear_page(d); - return d; -} - -void free_domain_struct(struct domain *d) -{ - free_xenheap_page(d); + return MEMF_bits(bits); } struct vcpu *alloc_vcpu_struct(const struct domain *d) diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/domain.h index 5df8c78253..386ec61745 100644 --- a/xen/arch/x86/include/asm/domain.h +++ b/xen/arch/x86/include/asm/domain.h @@ -12,6 +12,9 @@ #include #include +unsigned int arch_domain_struct_memflags(void); +#define arch_domain_struct_memflags arch_domain_struct_memflags + #define has_32bit_shinfo(d) ((d)->arch.has_32bit_shinfo) /* diff --git a/xen/common/domain.c b/xen/common/domain.c index 850daf1ee8..93c71bc766 100644 --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -799,6 +799,27 @@ static int sanitise_domain_config(struct xen_domctl_createdomain *config) return arch_sanitise_domain_config(config); } +struct domain *alloc_domain_struct(void) +{ +#ifndef arch_domain_struct_memflags +# define arch_domain_struct_memflags() 0 +#endif + + struct domain *d = alloc_xenheap_pages(0, arch_domain_struct_memflags()); + + BUILD_BUG_ON(sizeof(*d) > PAGE_SIZE); + + if ( d ) + clear_page(d); + + return d; +} + +void free_domain_struct(struct domain *d) +{ + free_xenheap_page(d); +} + struct domain *domain_create(domid_t domid, struct xen_domctl_createdomain *config, unsigned int flags) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Dec 10 01:33:08 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 10 Dec 2025 01:33:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1182480.1505344 (Exim 4.92) (envelope-from ) id 1vT94i-0003p5-EY; Wed, 10 Dec 2025 01:33:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1182480.1505344; Wed, 10 Dec 2025 01:33:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vT94i-0003ox-Bg; Wed, 10 Dec 2025 01:33:04 +0000 Received: by outflank-mailman (input) for mailman id 1182480; Wed, 10 Dec 2025 01:33:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vT94h-0003or-0S for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 01:33:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vT94g-0030zw-1n for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 01:33:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vT94g-00Cecr-2Q for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 01:33:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=dtRJ60Jl8nnlPtXHdRgkLsoFM1PuLYA9PRe2BQR2fJs=; b=fBf45D3+S4QxyMInDXYr1RgHcG +TKJnCSsFaTSETJ65fQ+kSzAnF8ioSbD/+eJA9OTPcH+hZqKzy901l63OE0kf6Seo9sVri/sPs+yG ImJsAWLaq+DnISq3YF43f9WA1wKUr4G6FscRq+E0oLzW5JHGDcIWZ7VJ+oHllS7TaPs0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] arm: address violations of MISRA C Rule 2.1 Message-Id: Date: Wed, 10 Dec 2025 01:33:02 +0000 commit 1d668a6c6e942c95662b6fe9f2fa76f883608e17 Author: Dmytro Prokopchuk1 AuthorDate: Wed Sep 24 20:35:40 2025 +0000 Commit: Stefano Stabellini CommitDate: Tue Dec 9 16:52:32 2025 -0800 arm: address violations of MISRA C Rule 2.1 MISRA C Rule 2.1 states: "A project shall not contain unreachable code". In certain build configurations the following functions 'prepare_acpi()' and 'gicv3_its_setup_collection()' are defined as inline functions and contain the macro 'BUG()'. This resulted in violations due to these functions became non-returning. To ensure compliance with MISRA C Rule 2.1 remove inline function implementations and their 'BUG()'-based unreachable code. Provide unconditional function declarations for 'gicv3_its_setup_collection()' and 'prepare_acpi()'. Rely on the compiler's DCE to remove unused function calls in builds where these configs 'CONFIG_ACPI' or 'CONFIG_HAS_ITS' are not enabled. Signed-off-by: Dmytro Prokopchuk Reviewed-by: Jan Beulich Acked-by: Stefano Stabellini --- xen/arch/arm/include/asm/domain_build.h | 9 --------- xen/arch/arm/include/asm/gic_v3_its.h | 11 ++--------- 2 files changed, 2 insertions(+), 18 deletions(-) diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/include/asm/domain_build.h index c6fec3168c..6674dac5e2 100644 --- a/xen/arch/arm/include/asm/domain_build.h +++ b/xen/arch/arm/include/asm/domain_build.h @@ -15,16 +15,7 @@ void evtchn_allocate(struct domain *d); void set_interrupt(gic_interrupt_t interrupt, unsigned int irq, unsigned int cpumask, unsigned int level); -#ifndef CONFIG_ACPI -static inline int prepare_acpi(struct domain *d, struct kernel_info *kinfo) -{ - /* Only booting with ACPI will hit here */ - BUG(); - return -EINVAL; -} -#else int prepare_acpi(struct domain *d, struct kernel_info *kinfo); -#endif int add_ext_regions(unsigned long s_gfn, unsigned long e_gfn, void *data); diff --git a/xen/arch/arm/include/asm/gic_v3_its.h b/xen/arch/arm/include/asm/gic_v3_its.h index 0737e67aa6..fc5a84892c 100644 --- a/xen/arch/arm/include/asm/gic_v3_its.h +++ b/xen/arch/arm/include/asm/gic_v3_its.h @@ -131,6 +131,8 @@ struct host_its { unsigned int flags; }; +/* Map a collection for this host CPU to each host ITS. */ +int gicv3_its_setup_collection(unsigned int cpu); #ifdef CONFIG_HAS_ITS @@ -160,9 +162,6 @@ int gicv3_its_init(void); void gicv3_set_redist_address(paddr_t address, unsigned int redist_id); uint64_t gicv3_get_redist_address(unsigned int cpu, bool use_pta); -/* Map a collection for this host CPU to each host ITS. */ -int gicv3_its_setup_collection(unsigned int cpu); - /* Initialize and destroy the per-domain parts of the virtual ITS support. */ int vgic_v3_its_init_domain(struct domain *d); void vgic_v3_its_free_domain(struct domain *d); @@ -256,12 +255,6 @@ static inline void gicv3_set_redist_address(paddr_t address, { } -static inline int gicv3_its_setup_collection(unsigned int cpu) -{ - /* We should never get here without an ITS. */ - BUG(); -} - static inline int vgic_v3_its_init_domain(struct domain *d) { return 0; -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Wed Dec 10 02:33:08 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 10 Dec 2025 02:33:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1182527.1505387 (Exim 4.92) (envelope-from ) id 1vTA0l-0006WW-6G; Wed, 10 Dec 2025 02:33:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1182527.1505387; Wed, 10 Dec 2025 02:33:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTA0l-0006WO-3I; Wed, 10 Dec 2025 02:33:03 +0000 Received: by outflank-mailman (input) for mailman id 1182527; Wed, 10 Dec 2025 02:33:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTA0k-0006WI-66 for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 02:33:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTA0j-0032TD-2c for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 02:33:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTA0k-001bMF-03 for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 02:33:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=2L1YswPqgxAVoald6ARykL2YRO0M78ipDaxnVI/hPDc=; b=AXa8C68qv3davWc+TRNwt7BTUp oMrd8dWnVva7pfcTMPc5CCW7rzeFLky3WG4brIOVmA6YyPO3umSXCS1ooZDKPbpaUdw+XX5dyy4NC T5Cs7ArMO6h0T6JKlgPy1J1P9lAYfYtMSLuVmE92yRsmh2SFKyBCOB4D4ul+XDZn0Zaw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] arm: address violations of MISRA C Rule 2.1 Message-Id: Date: Wed, 10 Dec 2025 02:33:02 +0000 commit 1d668a6c6e942c95662b6fe9f2fa76f883608e17 Author: Dmytro Prokopchuk1 AuthorDate: Wed Sep 24 20:35:40 2025 +0000 Commit: Stefano Stabellini CommitDate: Tue Dec 9 16:52:32 2025 -0800 arm: address violations of MISRA C Rule 2.1 MISRA C Rule 2.1 states: "A project shall not contain unreachable code". In certain build configurations the following functions 'prepare_acpi()' and 'gicv3_its_setup_collection()' are defined as inline functions and contain the macro 'BUG()'. This resulted in violations due to these functions became non-returning. To ensure compliance with MISRA C Rule 2.1 remove inline function implementations and their 'BUG()'-based unreachable code. Provide unconditional function declarations for 'gicv3_its_setup_collection()' and 'prepare_acpi()'. Rely on the compiler's DCE to remove unused function calls in builds where these configs 'CONFIG_ACPI' or 'CONFIG_HAS_ITS' are not enabled. Signed-off-by: Dmytro Prokopchuk Reviewed-by: Jan Beulich Acked-by: Stefano Stabellini --- xen/arch/arm/include/asm/domain_build.h | 9 --------- xen/arch/arm/include/asm/gic_v3_its.h | 11 ++--------- 2 files changed, 2 insertions(+), 18 deletions(-) diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/include/asm/domain_build.h index c6fec3168c..6674dac5e2 100644 --- a/xen/arch/arm/include/asm/domain_build.h +++ b/xen/arch/arm/include/asm/domain_build.h @@ -15,16 +15,7 @@ void evtchn_allocate(struct domain *d); void set_interrupt(gic_interrupt_t interrupt, unsigned int irq, unsigned int cpumask, unsigned int level); -#ifndef CONFIG_ACPI -static inline int prepare_acpi(struct domain *d, struct kernel_info *kinfo) -{ - /* Only booting with ACPI will hit here */ - BUG(); - return -EINVAL; -} -#else int prepare_acpi(struct domain *d, struct kernel_info *kinfo); -#endif int add_ext_regions(unsigned long s_gfn, unsigned long e_gfn, void *data); diff --git a/xen/arch/arm/include/asm/gic_v3_its.h b/xen/arch/arm/include/asm/gic_v3_its.h index 0737e67aa6..fc5a84892c 100644 --- a/xen/arch/arm/include/asm/gic_v3_its.h +++ b/xen/arch/arm/include/asm/gic_v3_its.h @@ -131,6 +131,8 @@ struct host_its { unsigned int flags; }; +/* Map a collection for this host CPU to each host ITS. */ +int gicv3_its_setup_collection(unsigned int cpu); #ifdef CONFIG_HAS_ITS @@ -160,9 +162,6 @@ int gicv3_its_init(void); void gicv3_set_redist_address(paddr_t address, unsigned int redist_id); uint64_t gicv3_get_redist_address(unsigned int cpu, bool use_pta); -/* Map a collection for this host CPU to each host ITS. */ -int gicv3_its_setup_collection(unsigned int cpu); - /* Initialize and destroy the per-domain parts of the virtual ITS support. */ int vgic_v3_its_init_domain(struct domain *d); void vgic_v3_its_free_domain(struct domain *d); @@ -256,12 +255,6 @@ static inline void gicv3_set_redist_address(paddr_t address, { } -static inline int gicv3_its_setup_collection(unsigned int cpu) -{ - /* We should never get here without an ITS. */ - BUG(); -} - static inline int vgic_v3_its_init_domain(struct domain *d) { return 0; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Dec 10 09:11:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 10 Dec 2025 09:11:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1182697.1505535 (Exim 4.92) (envelope-from ) id 1vTGE5-00024R-3I; Wed, 10 Dec 2025 09:11:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1182697.1505535; Wed, 10 Dec 2025 09:11:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTGE5-00024J-0g; Wed, 10 Dec 2025 09:11:13 +0000 Received: by outflank-mailman (input) for mailman id 1182697; Wed, 10 Dec 2025 09:11:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTGE3-000249-VM for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 09:11:11 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTGE3-003AMo-26 for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 09:11:11 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTGE3-008rmf-2s for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 09:11:11 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=H7ulCzT1Jrg2612Jk8yEHyyDvboDxNPWkSSZPrw1nH0=; b=UGZuGSjw4x0EJtj2ZPd8i1r4wp pwRx1FIDcp7VYBQlwrWkSnu8Qv2WIqtOoHOYKwPw//6njisl/Enn7yg1xEBxuWSYYCr1hIDDSBW84 FAgxT65LtezlQl1dwQusaYWeU8LW81fvo5jWnm6FhNyiKWwo/7cISdQgMdx39pyJ3z78=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] symbol: drop private header again Message-Id: Date: Wed, 10 Dec 2025 09:11:11 +0000 commit 69b271d71e3265712629cd545a48da5e114635e0 Author: Jan Beulich AuthorDate: Wed Dec 10 08:52:34 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 10 08:52:34 2025 +0100 symbol: drop private header again With symbols-dummy.c gone, there's only on party using this header. Fold its contents back into symbols.c. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- xen/common/symbols.c | 19 ++++++++++++++++++- xen/common/symbols.h | 36 ------------------------------------ 2 files changed, 18 insertions(+), 37 deletions(-) diff --git a/xen/common/symbols.c b/xen/common/symbols.c index 2260539800..61af77979d 100644 --- a/xen/common/symbols.c +++ b/xen/common/symbols.c @@ -15,12 +15,29 @@ #include #include #include +#include #include #include #include #include -#include "symbols.h" +#ifdef SYMBOLS_ORIGIN +extern const unsigned int symbols_offsets[]; +#define symbols_address(n) (SYMBOLS_ORIGIN + symbols_offsets[n]) +#else +extern const unsigned long symbols_addresses[]; +#define symbols_address(n) symbols_addresses[n] +#endif +extern const unsigned int symbols_num_addrs; +extern const unsigned char symbols_names[]; + +extern const unsigned int symbols_num_names; +extern const struct symbol_offset symbols_sorted_offsets[]; + +extern const uint8_t symbols_token_table[]; +extern const uint16_t symbols_token_index[]; + +extern const unsigned int symbols_markers[]; /* expand a compressed symbol data into the resulting uncompressed string, given the offset to where the symbol is in the compressed stream */ diff --git a/xen/common/symbols.h b/xen/common/symbols.h deleted file mode 100644 index a993f41c21..0000000000 --- a/xen/common/symbols.h +++ /dev/null @@ -1,36 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef SYMBOLS_H -#define SYMBOLS_H - -#include -#include - -#ifdef SYMBOLS_ORIGIN -extern const unsigned int symbols_offsets[]; -#define symbols_address(n) (SYMBOLS_ORIGIN + symbols_offsets[n]) -#else -extern const unsigned long symbols_addresses[]; -#define symbols_address(n) symbols_addresses[n] -#endif -extern const unsigned int symbols_num_addrs; -extern const unsigned char symbols_names[]; - -extern const unsigned int symbols_num_names; -extern const struct symbol_offset symbols_sorted_offsets[]; - -extern const uint8_t symbols_token_table[]; -extern const uint16_t symbols_token_index[]; - -extern const unsigned int symbols_markers[]; - -#endif /* SYMBOLS_H */ - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * tab-width: 4 - * indent-tabs-mode: nil - * End: - */ -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Wed Dec 10 09:11:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 10 Dec 2025 09:11:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1182696.1505532 (Exim 4.92) (envelope-from ) id 1vTGDv-00022V-0N; Wed, 10 Dec 2025 09:11:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1182696.1505532; Wed, 10 Dec 2025 09:11:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTGDu-00022N-Tn; Wed, 10 Dec 2025 09:11:02 +0000 Received: by outflank-mailman (input) for mailman id 1182696; Wed, 10 Dec 2025 09:11:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTGDt-00022H-UC for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 09:11:01 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTGDt-003AMJ-1k for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 09:11:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTGDt-008qk9-2R for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 09:11:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=/DC0wbCJyVOAanmyBrZGpGUO3zjrs/k8I13tPiCVkoQ=; b=XG7YJ7K6UQAUNUOWHcUl1heSah 9Le/5VVZYCxnk1S0J5xqLE34xYjoOZY84icKyA74vdDo0Jp/jYFaD3iRak0k7OECsoN0MtMB144bt FbnmK9MD7u6ezMke5jBGVtfIot5JCVIG9iXfNHTB0/Wv57oiiT4kWYFoABZSoQzr2U2Q=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86: move arch_generic_hweightl() to arch-specific library Message-Id: Date: Wed, 10 Dec 2025 09:11:01 +0000 commit b85c5260ee7246a34b826881fecbfa8312d37239 Author: Jan Beulich AuthorDate: Wed Dec 10 08:51:27 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 10 08:51:27 2025 +0100 x86: move arch_generic_hweightl() to arch-specific library Introduce arch/x86/lib/, and make it the home for the somewhat misplaced x86-specific file that lived in the arch-independent lib/. Introduce ARCH_LIBS-y as a make variable, to arrange for arch-specific libraries to (generally) come ahead of generic one(s) when linking. Should any library be intended to come after the generic one(s), it can be appended to $(ALL_LIBS-y). Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- xen/Makefile | 4 +- xen/arch/x86/Makefile | 1 + xen/arch/x86/arch.mk | 2 + xen/arch/x86/lib/Makefile | 1 + xen/arch/x86/lib/generic-hweightl.c | 75 +++++++++++++++++++++++++++++++++++++ xen/lib/Makefile | 1 - xen/lib/x86-generic-hweightl.c | 75 ------------------------------------- 7 files changed, 82 insertions(+), 77 deletions(-) diff --git a/xen/Makefile b/xen/Makefile index e6cf287425..13e336ba54 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -461,6 +461,7 @@ ALL_OBJS-y += xsm/built_in.o ALL_OBJS-y += arch/$(SRCARCH)/built_in.o ALL_OBJS-$(CONFIG_CRYPTO) += crypto/built_in.o +ARCH_LIBS-y := ALL_LIBS-y := lib/lib.a all-symbols-y := @@ -620,7 +621,8 @@ $(TARGET): outputmakefile asm-generic FORCE $(Q)$(MAKE) $(build)=arch/$(SRCARCH) include $(Q)$(MAKE) $(build)=. arch/$(SRCARCH)/include/asm/asm-offsets.h $(Q)$(MAKE) $(build)=. MKRELOC=$(MKRELOC) 'ALL_OBJS=$(ALL_OBJS-y)' \ - 'ALL_LIBS=$(ALL_LIBS-y)' 'all_symbols=$(all-symbols-y)' $@ + 'ALL_LIBS=$(ARCH_LIBS-y) $(ALL_LIBS-y)' \ + 'all_symbols=$(all-symbols-y)' $@ SUBDIRS = xsm arch common crypto drivers lib test define all_sources diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index 300cc67407..61e2293a46 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -5,6 +5,7 @@ obj-y += efi/ obj-y += genapic/ obj-$(CONFIG_GUEST) += guest/ obj-$(CONFIG_HVM) += hvm/ +obj-y += lib/ obj-y += mm/ obj-$(CONFIG_XENOPROF) += oprofile/ obj-$(CONFIG_PV) += pv/ diff --git a/xen/arch/x86/arch.mk b/xen/arch/x86/arch.mk index 16368a498b..0203138a81 100644 --- a/xen/arch/x86/arch.mk +++ b/xen/arch/x86/arch.mk @@ -3,6 +3,8 @@ export XEN_IMG_OFFSET := 0x200000 +ARCH_LIBS-y += arch/x86/lib/lib.a + CFLAGS += -DXEN_IMG_OFFSET=$(XEN_IMG_OFFSET) # Prevent floating-point variables from creeping into Xen. diff --git a/xen/arch/x86/lib/Makefile b/xen/arch/x86/lib/Makefile new file mode 100644 index 0000000000..ddf7e19bdc --- /dev/null +++ b/xen/arch/x86/lib/Makefile @@ -0,0 +1 @@ +lib-y += generic-hweightl.o diff --git a/xen/arch/x86/lib/generic-hweightl.c b/xen/arch/x86/lib/generic-hweightl.c new file mode 100644 index 0000000000..1cab68952a --- /dev/null +++ b/xen/arch/x86/lib/generic-hweightl.c @@ -0,0 +1,75 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include + +/* + * An implementation of generic_hweightl() used on hardware without the POPCNT + * instruction. + * + * This function is called from within an ALTERNATIVE in arch_hweightl(). + * i.e. behind the back of the compiler. Therefore all registers are callee + * preserved. + * + * The ASM is what GCC-12 emits for generic_hweightl() in a release build of + * Xen, with spilling of %rdi/%rdx to preserve the callers registers. + * + * Note: When we can use __attribute__((no_caller_saved_registers)) + * unconditionally (GCC 7, Clang 5), we can implement this in plain C. + */ +asm ( + ".type arch_generic_hweightl, STT_FUNC\n\t" + ".globl arch_generic_hweightl\n\t" + ".hidden arch_generic_hweightl\n\t" + ".balign " STR(CONFIG_FUNCTION_ALIGNMENT) ", 0x90\n" /* CODE_FILL */ + "arch_generic_hweightl:\n\t" + + "push %rdi\n\t" + "push %rdx\n\t" + + "movabs $0x5555555555555555, %rdx\n\t" + "mov %rdi, %rax\n\t" + "shr $1, %rax\n\t" + "and %rdx, %rax\n\t" + "sub %rax, %rdi\n\t" + "movabs $0x3333333333333333, %rax\n\t" + "mov %rdi, %rdx\n\t" + "shr $2, %rdi\n\t" + "and %rax, %rdx\n\t" + "and %rax, %rdi\n\t" + "add %rdi, %rdx\n\t" + "mov %rdx, %rax\n\t" + "shr $4, %rax\n\t" + "add %rdx, %rax\n\t" + "movabs $0x0f0f0f0f0f0f0f0f, %rdx\n\t" + "and %rdx, %rax\n\t" + "movabs $0x0101010101010101, %rdx\n\t" + "imul %rdx, %rax\n\t" + "shr $" STR(BITS_PER_LONG) "- 8, %rax\n\t" + + "pop %rdx\n\t" + "pop %rdi\n\t" + +#ifdef CONFIG_RETURN_THUNK + "jmp __x86_return_thunk\n\t" +#else + "ret\n\t" +#endif + + ".size arch_generic_hweightl, . - arch_generic_hweightl\n\t" +); + +#ifdef CONFIG_SELF_TESTS +static void __init __constructor test_arch_generic_hweightl(void) +{ + RUNTIME_CHECK(arch_generic_hweightl, 0, 0); + RUNTIME_CHECK(arch_generic_hweightl, 1, 1); + RUNTIME_CHECK(arch_generic_hweightl, 3, 2); + RUNTIME_CHECK(arch_generic_hweightl, 7, 3); + RUNTIME_CHECK(arch_generic_hweightl, 0xff, 8); + + RUNTIME_CHECK(arch_generic_hweightl, 1 | (1UL << (BITS_PER_LONG - 1)), 2); + RUNTIME_CHECK(arch_generic_hweightl, -1UL, BITS_PER_LONG); +} +#endif diff --git a/xen/lib/Makefile b/xen/lib/Makefile index 954d9216a3..efca830d92 100644 --- a/xen/lib/Makefile +++ b/xen/lib/Makefile @@ -39,7 +39,6 @@ lib-y += strtol.o lib-y += strtoll.o lib-y += strtoul.o lib-y += strtoull.o -lib-$(CONFIG_X86) += x86-generic-hweightl.o lib-$(CONFIG_X86) += xxhash32.o lib-$(CONFIG_X86) += xxhash64.o diff --git a/xen/lib/x86-generic-hweightl.c b/xen/lib/x86-generic-hweightl.c deleted file mode 100644 index 1cab68952a..0000000000 --- a/xen/lib/x86-generic-hweightl.c +++ /dev/null @@ -1,75 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include -#include -#include - -/* - * An implementation of generic_hweightl() used on hardware without the POPCNT - * instruction. - * - * This function is called from within an ALTERNATIVE in arch_hweightl(). - * i.e. behind the back of the compiler. Therefore all registers are callee - * preserved. - * - * The ASM is what GCC-12 emits for generic_hweightl() in a release build of - * Xen, with spilling of %rdi/%rdx to preserve the callers registers. - * - * Note: When we can use __attribute__((no_caller_saved_registers)) - * unconditionally (GCC 7, Clang 5), we can implement this in plain C. - */ -asm ( - ".type arch_generic_hweightl, STT_FUNC\n\t" - ".globl arch_generic_hweightl\n\t" - ".hidden arch_generic_hweightl\n\t" - ".balign " STR(CONFIG_FUNCTION_ALIGNMENT) ", 0x90\n" /* CODE_FILL */ - "arch_generic_hweightl:\n\t" - - "push %rdi\n\t" - "push %rdx\n\t" - - "movabs $0x5555555555555555, %rdx\n\t" - "mov %rdi, %rax\n\t" - "shr $1, %rax\n\t" - "and %rdx, %rax\n\t" - "sub %rax, %rdi\n\t" - "movabs $0x3333333333333333, %rax\n\t" - "mov %rdi, %rdx\n\t" - "shr $2, %rdi\n\t" - "and %rax, %rdx\n\t" - "and %rax, %rdi\n\t" - "add %rdi, %rdx\n\t" - "mov %rdx, %rax\n\t" - "shr $4, %rax\n\t" - "add %rdx, %rax\n\t" - "movabs $0x0f0f0f0f0f0f0f0f, %rdx\n\t" - "and %rdx, %rax\n\t" - "movabs $0x0101010101010101, %rdx\n\t" - "imul %rdx, %rax\n\t" - "shr $" STR(BITS_PER_LONG) "- 8, %rax\n\t" - - "pop %rdx\n\t" - "pop %rdi\n\t" - -#ifdef CONFIG_RETURN_THUNK - "jmp __x86_return_thunk\n\t" -#else - "ret\n\t" -#endif - - ".size arch_generic_hweightl, . - arch_generic_hweightl\n\t" -); - -#ifdef CONFIG_SELF_TESTS -static void __init __constructor test_arch_generic_hweightl(void) -{ - RUNTIME_CHECK(arch_generic_hweightl, 0, 0); - RUNTIME_CHECK(arch_generic_hweightl, 1, 1); - RUNTIME_CHECK(arch_generic_hweightl, 3, 2); - RUNTIME_CHECK(arch_generic_hweightl, 7, 3); - RUNTIME_CHECK(arch_generic_hweightl, 0xff, 8); - - RUNTIME_CHECK(arch_generic_hweightl, 1 | (1UL << (BITS_PER_LONG - 1)), 2); - RUNTIME_CHECK(arch_generic_hweightl, -1UL, BITS_PER_LONG); -} -#endif -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Wed Dec 10 10:11:05 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 10 Dec 2025 10:11:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1182794.1505619 (Exim 4.92) (envelope-from ) id 1vTH9y-0005az-Uz; Wed, 10 Dec 2025 10:11:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1182794.1505619; Wed, 10 Dec 2025 10:11:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTH9y-0005as-SR; Wed, 10 Dec 2025 10:11:02 +0000 Received: by outflank-mailman (input) for mailman id 1182794; Wed, 10 Dec 2025 10:11:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTH9x-0005am-Ip for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 10:11:01 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTH9x-003BZY-0i for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 10:11:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTH9x-00EYTf-1V for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 10:11:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=6GS8ykU68vhOsRPg++2iqK33SmWhr6IOWED2fMzkauo=; b=cFXACPlx2yxVOk5E1MOML/H6Qj R4eVO3Xz/FI+OeFgPgb4okljeRI5+pd8MMz6YA64yjfrbKx/L9OxCoLvO1AuyKjsh8Yc8eSwORh3j 302GJHrWzqu0pQYFdkSIjDAS4mENdeAKVivVRf4WvMwYa6HTSynXGfQNt6nD2P8CSULQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: move arch_generic_hweightl() to arch-specific library Message-Id: Date: Wed, 10 Dec 2025 10:11:01 +0000 commit b85c5260ee7246a34b826881fecbfa8312d37239 Author: Jan Beulich AuthorDate: Wed Dec 10 08:51:27 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 10 08:51:27 2025 +0100 x86: move arch_generic_hweightl() to arch-specific library Introduce arch/x86/lib/, and make it the home for the somewhat misplaced x86-specific file that lived in the arch-independent lib/. Introduce ARCH_LIBS-y as a make variable, to arrange for arch-specific libraries to (generally) come ahead of generic one(s) when linking. Should any library be intended to come after the generic one(s), it can be appended to $(ALL_LIBS-y). Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- xen/Makefile | 4 +- xen/arch/x86/Makefile | 1 + xen/arch/x86/arch.mk | 2 + xen/arch/x86/lib/Makefile | 1 + xen/arch/x86/lib/generic-hweightl.c | 75 +++++++++++++++++++++++++++++++++++++ xen/lib/Makefile | 1 - xen/lib/x86-generic-hweightl.c | 75 ------------------------------------- 7 files changed, 82 insertions(+), 77 deletions(-) diff --git a/xen/Makefile b/xen/Makefile index e6cf287425..13e336ba54 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -461,6 +461,7 @@ ALL_OBJS-y += xsm/built_in.o ALL_OBJS-y += arch/$(SRCARCH)/built_in.o ALL_OBJS-$(CONFIG_CRYPTO) += crypto/built_in.o +ARCH_LIBS-y := ALL_LIBS-y := lib/lib.a all-symbols-y := @@ -620,7 +621,8 @@ $(TARGET): outputmakefile asm-generic FORCE $(Q)$(MAKE) $(build)=arch/$(SRCARCH) include $(Q)$(MAKE) $(build)=. arch/$(SRCARCH)/include/asm/asm-offsets.h $(Q)$(MAKE) $(build)=. MKRELOC=$(MKRELOC) 'ALL_OBJS=$(ALL_OBJS-y)' \ - 'ALL_LIBS=$(ALL_LIBS-y)' 'all_symbols=$(all-symbols-y)' $@ + 'ALL_LIBS=$(ARCH_LIBS-y) $(ALL_LIBS-y)' \ + 'all_symbols=$(all-symbols-y)' $@ SUBDIRS = xsm arch common crypto drivers lib test define all_sources diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index 300cc67407..61e2293a46 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -5,6 +5,7 @@ obj-y += efi/ obj-y += genapic/ obj-$(CONFIG_GUEST) += guest/ obj-$(CONFIG_HVM) += hvm/ +obj-y += lib/ obj-y += mm/ obj-$(CONFIG_XENOPROF) += oprofile/ obj-$(CONFIG_PV) += pv/ diff --git a/xen/arch/x86/arch.mk b/xen/arch/x86/arch.mk index 16368a498b..0203138a81 100644 --- a/xen/arch/x86/arch.mk +++ b/xen/arch/x86/arch.mk @@ -3,6 +3,8 @@ export XEN_IMG_OFFSET := 0x200000 +ARCH_LIBS-y += arch/x86/lib/lib.a + CFLAGS += -DXEN_IMG_OFFSET=$(XEN_IMG_OFFSET) # Prevent floating-point variables from creeping into Xen. diff --git a/xen/arch/x86/lib/Makefile b/xen/arch/x86/lib/Makefile new file mode 100644 index 0000000000..ddf7e19bdc --- /dev/null +++ b/xen/arch/x86/lib/Makefile @@ -0,0 +1 @@ +lib-y += generic-hweightl.o diff --git a/xen/arch/x86/lib/generic-hweightl.c b/xen/arch/x86/lib/generic-hweightl.c new file mode 100644 index 0000000000..1cab68952a --- /dev/null +++ b/xen/arch/x86/lib/generic-hweightl.c @@ -0,0 +1,75 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include + +/* + * An implementation of generic_hweightl() used on hardware without the POPCNT + * instruction. + * + * This function is called from within an ALTERNATIVE in arch_hweightl(). + * i.e. behind the back of the compiler. Therefore all registers are callee + * preserved. + * + * The ASM is what GCC-12 emits for generic_hweightl() in a release build of + * Xen, with spilling of %rdi/%rdx to preserve the callers registers. + * + * Note: When we can use __attribute__((no_caller_saved_registers)) + * unconditionally (GCC 7, Clang 5), we can implement this in plain C. + */ +asm ( + ".type arch_generic_hweightl, STT_FUNC\n\t" + ".globl arch_generic_hweightl\n\t" + ".hidden arch_generic_hweightl\n\t" + ".balign " STR(CONFIG_FUNCTION_ALIGNMENT) ", 0x90\n" /* CODE_FILL */ + "arch_generic_hweightl:\n\t" + + "push %rdi\n\t" + "push %rdx\n\t" + + "movabs $0x5555555555555555, %rdx\n\t" + "mov %rdi, %rax\n\t" + "shr $1, %rax\n\t" + "and %rdx, %rax\n\t" + "sub %rax, %rdi\n\t" + "movabs $0x3333333333333333, %rax\n\t" + "mov %rdi, %rdx\n\t" + "shr $2, %rdi\n\t" + "and %rax, %rdx\n\t" + "and %rax, %rdi\n\t" + "add %rdi, %rdx\n\t" + "mov %rdx, %rax\n\t" + "shr $4, %rax\n\t" + "add %rdx, %rax\n\t" + "movabs $0x0f0f0f0f0f0f0f0f, %rdx\n\t" + "and %rdx, %rax\n\t" + "movabs $0x0101010101010101, %rdx\n\t" + "imul %rdx, %rax\n\t" + "shr $" STR(BITS_PER_LONG) "- 8, %rax\n\t" + + "pop %rdx\n\t" + "pop %rdi\n\t" + +#ifdef CONFIG_RETURN_THUNK + "jmp __x86_return_thunk\n\t" +#else + "ret\n\t" +#endif + + ".size arch_generic_hweightl, . - arch_generic_hweightl\n\t" +); + +#ifdef CONFIG_SELF_TESTS +static void __init __constructor test_arch_generic_hweightl(void) +{ + RUNTIME_CHECK(arch_generic_hweightl, 0, 0); + RUNTIME_CHECK(arch_generic_hweightl, 1, 1); + RUNTIME_CHECK(arch_generic_hweightl, 3, 2); + RUNTIME_CHECK(arch_generic_hweightl, 7, 3); + RUNTIME_CHECK(arch_generic_hweightl, 0xff, 8); + + RUNTIME_CHECK(arch_generic_hweightl, 1 | (1UL << (BITS_PER_LONG - 1)), 2); + RUNTIME_CHECK(arch_generic_hweightl, -1UL, BITS_PER_LONG); +} +#endif diff --git a/xen/lib/Makefile b/xen/lib/Makefile index 954d9216a3..efca830d92 100644 --- a/xen/lib/Makefile +++ b/xen/lib/Makefile @@ -39,7 +39,6 @@ lib-y += strtol.o lib-y += strtoll.o lib-y += strtoul.o lib-y += strtoull.o -lib-$(CONFIG_X86) += x86-generic-hweightl.o lib-$(CONFIG_X86) += xxhash32.o lib-$(CONFIG_X86) += xxhash64.o diff --git a/xen/lib/x86-generic-hweightl.c b/xen/lib/x86-generic-hweightl.c deleted file mode 100644 index 1cab68952a..0000000000 --- a/xen/lib/x86-generic-hweightl.c +++ /dev/null @@ -1,75 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include -#include -#include - -/* - * An implementation of generic_hweightl() used on hardware without the POPCNT - * instruction. - * - * This function is called from within an ALTERNATIVE in arch_hweightl(). - * i.e. behind the back of the compiler. Therefore all registers are callee - * preserved. - * - * The ASM is what GCC-12 emits for generic_hweightl() in a release build of - * Xen, with spilling of %rdi/%rdx to preserve the callers registers. - * - * Note: When we can use __attribute__((no_caller_saved_registers)) - * unconditionally (GCC 7, Clang 5), we can implement this in plain C. - */ -asm ( - ".type arch_generic_hweightl, STT_FUNC\n\t" - ".globl arch_generic_hweightl\n\t" - ".hidden arch_generic_hweightl\n\t" - ".balign " STR(CONFIG_FUNCTION_ALIGNMENT) ", 0x90\n" /* CODE_FILL */ - "arch_generic_hweightl:\n\t" - - "push %rdi\n\t" - "push %rdx\n\t" - - "movabs $0x5555555555555555, %rdx\n\t" - "mov %rdi, %rax\n\t" - "shr $1, %rax\n\t" - "and %rdx, %rax\n\t" - "sub %rax, %rdi\n\t" - "movabs $0x3333333333333333, %rax\n\t" - "mov %rdi, %rdx\n\t" - "shr $2, %rdi\n\t" - "and %rax, %rdx\n\t" - "and %rax, %rdi\n\t" - "add %rdi, %rdx\n\t" - "mov %rdx, %rax\n\t" - "shr $4, %rax\n\t" - "add %rdx, %rax\n\t" - "movabs $0x0f0f0f0f0f0f0f0f, %rdx\n\t" - "and %rdx, %rax\n\t" - "movabs $0x0101010101010101, %rdx\n\t" - "imul %rdx, %rax\n\t" - "shr $" STR(BITS_PER_LONG) "- 8, %rax\n\t" - - "pop %rdx\n\t" - "pop %rdi\n\t" - -#ifdef CONFIG_RETURN_THUNK - "jmp __x86_return_thunk\n\t" -#else - "ret\n\t" -#endif - - ".size arch_generic_hweightl, . - arch_generic_hweightl\n\t" -); - -#ifdef CONFIG_SELF_TESTS -static void __init __constructor test_arch_generic_hweightl(void) -{ - RUNTIME_CHECK(arch_generic_hweightl, 0, 0); - RUNTIME_CHECK(arch_generic_hweightl, 1, 1); - RUNTIME_CHECK(arch_generic_hweightl, 3, 2); - RUNTIME_CHECK(arch_generic_hweightl, 7, 3); - RUNTIME_CHECK(arch_generic_hweightl, 0xff, 8); - - RUNTIME_CHECK(arch_generic_hweightl, 1 | (1UL << (BITS_PER_LONG - 1)), 2); - RUNTIME_CHECK(arch_generic_hweightl, -1UL, BITS_PER_LONG); -} -#endif -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Dec 10 10:11:17 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 10 Dec 2025 10:11:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1182795.1505623 (Exim 4.92) (envelope-from ) id 1vTHA9-0005cq-09; Wed, 10 Dec 2025 10:11:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1182795.1505623; Wed, 10 Dec 2025 10:11:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTHA8-0005cj-Tv; Wed, 10 Dec 2025 10:11:12 +0000 Received: by outflank-mailman (input) for mailman id 1182795; Wed, 10 Dec 2025 10:11:11 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTHA7-0005cS-Km for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 10:11:11 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTHA7-003BaX-12 for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 10:11:11 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTHA7-00EZbq-1o for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 10:11:11 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=lLeM2mKysJoc7hUoIuOU4liw2HLs/fWb4SKnQNX/sQI=; b=2et48JzxndGm73k9pIu7fKewNt 7rzj9qyM+BeADPo4FEF0kDe35rtXbNJIP1JbmDOEdB+wcW8c3QsqZd6xQauqu/40biETEw8sSJIwQ 3ehW9Jnma0Slct87ox3vNbMKsO1TYnKrdIS+9rBwX2Eiw7+93+/aAI0L5aKA7yz/ZA3M=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] symbol: drop private header again Message-Id: Date: Wed, 10 Dec 2025 10:11:11 +0000 commit 69b271d71e3265712629cd545a48da5e114635e0 Author: Jan Beulich AuthorDate: Wed Dec 10 08:52:34 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 10 08:52:34 2025 +0100 symbol: drop private header again With symbols-dummy.c gone, there's only on party using this header. Fold its contents back into symbols.c. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- xen/common/symbols.c | 19 ++++++++++++++++++- xen/common/symbols.h | 36 ------------------------------------ 2 files changed, 18 insertions(+), 37 deletions(-) diff --git a/xen/common/symbols.c b/xen/common/symbols.c index 2260539800..61af77979d 100644 --- a/xen/common/symbols.c +++ b/xen/common/symbols.c @@ -15,12 +15,29 @@ #include #include #include +#include #include #include #include #include -#include "symbols.h" +#ifdef SYMBOLS_ORIGIN +extern const unsigned int symbols_offsets[]; +#define symbols_address(n) (SYMBOLS_ORIGIN + symbols_offsets[n]) +#else +extern const unsigned long symbols_addresses[]; +#define symbols_address(n) symbols_addresses[n] +#endif +extern const unsigned int symbols_num_addrs; +extern const unsigned char symbols_names[]; + +extern const unsigned int symbols_num_names; +extern const struct symbol_offset symbols_sorted_offsets[]; + +extern const uint8_t symbols_token_table[]; +extern const uint16_t symbols_token_index[]; + +extern const unsigned int symbols_markers[]; /* expand a compressed symbol data into the resulting uncompressed string, given the offset to where the symbol is in the compressed stream */ diff --git a/xen/common/symbols.h b/xen/common/symbols.h deleted file mode 100644 index a993f41c21..0000000000 --- a/xen/common/symbols.h +++ /dev/null @@ -1,36 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef SYMBOLS_H -#define SYMBOLS_H - -#include -#include - -#ifdef SYMBOLS_ORIGIN -extern const unsigned int symbols_offsets[]; -#define symbols_address(n) (SYMBOLS_ORIGIN + symbols_offsets[n]) -#else -extern const unsigned long symbols_addresses[]; -#define symbols_address(n) symbols_addresses[n] -#endif -extern const unsigned int symbols_num_addrs; -extern const unsigned char symbols_names[]; - -extern const unsigned int symbols_num_names; -extern const struct symbol_offset symbols_sorted_offsets[]; - -extern const uint8_t symbols_token_table[]; -extern const uint16_t symbols_token_index[]; - -extern const unsigned int symbols_markers[]; - -#endif /* SYMBOLS_H */ - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * tab-width: 4 - * indent-tabs-mode: nil - * End: - */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Dec 10 15:55:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 10 Dec 2025 15:55:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1183033.1505816 (Exim 4.92) (envelope-from ) id 1vTMWt-0005SE-3W; Wed, 10 Dec 2025 15:55:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1183033.1505816; Wed, 10 Dec 2025 15:55:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTMWt-0005S6-10; Wed, 10 Dec 2025 15:55:03 +0000 Received: by outflank-mailman (input) for mailman id 1183033; Wed, 10 Dec 2025 15:55:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTMWr-0005S0-Tu for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 15:55:01 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTMWr-003HvJ-1p for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 15:55:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTMWr-00GUdd-2T for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 15:55:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=lZlYezuzj6pJFpC7vZLyt92dVwPPsazAJrcxvAwHziE=; b=Qw54DFonQKYUIAcFQlqZzi/uIo X6Z3uufPaPXzlY1NxtwNeGTyjIm9gYKZiaumWRH1b/WppxtsEoQ2ppU+M8bbewX1ZNvWP+xB3DcUm qXpO+igSxlysAEIvweE8uhET5Ep4kij8pH9Z7LkA7OckmAwcGJz4VAeg0wyct9IwT5YI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/kexec: Replace CALL+UD2 pattern with JMP Message-Id: Date: Wed, 10 Dec 2025 15:55:01 +0000 commit 8b7a72f4d3a5a5e13e42b2e89261a2f733299f9f Author: Andrew Cooper AuthorDate: Fri Dec 5 15:22:38 2025 +0000 Commit: Andrew Cooper CommitDate: Wed Dec 10 14:48:45 2025 +0000 x86/kexec: Replace CALL+UD2 pattern with JMP Linux jumps to the target image rather than calling it. Switch to using JMP, and drop the trailing UD2s. Linux does have a mode, named CONFIG_KEXEC_JUMP, where the target image can be returned from, but that involves extra metadata and setting up a stack within the target image which Xen doesn't support at the moment. No functional change. Reported-by: Jan Beulich Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/arch/x86/x86_64/kexec_reloc.S | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/xen/arch/x86/x86_64/kexec_reloc.S b/xen/arch/x86/x86_64/kexec_reloc.S index 50ba454abd..b52d31a654 100644 --- a/xen/arch/x86/x86_64/kexec_reloc.S +++ b/xen/arch/x86/x86_64/kexec_reloc.S @@ -75,10 +75,8 @@ FUNC(kexec_reloc, PAGE_SIZE) testq $KEXEC_RELOC_FLAG_COMPAT, %r8 jnz .L_call_32_bit -.L_call_64_bit: - /* Call the image entry point. This should never return. */ - callq *%rbp - ud2 + /* Jump to the image entry point */ + jmp *%rbp .L_call_32_bit: /* Setup IDT. */ @@ -170,9 +168,8 @@ FUNC_LOCAL(compatibility_mode) xorl %eax, %eax movl %eax, %cr4 - /* Call the image entry point. This should never return. */ - call *%ebp - ud2 + /* Jump to the image entry point. */ + jmp *%ebp END(compatibility_mode) /* Separate code and data into into different cache lines */ -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Wed Dec 10 15:55:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 10 Dec 2025 15:55:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1183034.1505819 (Exim 4.92) (envelope-from ) id 1vTMX3-0005U1-4n; Wed, 10 Dec 2025 15:55:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1183034.1505819; Wed, 10 Dec 2025 15:55:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTMX3-0005Tt-2L; Wed, 10 Dec 2025 15:55:13 +0000 Received: by outflank-mailman (input) for mailman id 1183034; Wed, 10 Dec 2025 15:55:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTMX1-0005Td-W2 for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 15:55:11 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTMX1-003HvY-29 for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 15:55:11 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTMX1-00GVh4-2x for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 15:55:11 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=/QCWmMg5GCgB6EG5z2sHylqkQN9qYqa+A3fKz2UFlhA=; b=N0LUuA7C624KbP072U1ed1kJ3G j3byQbl42rIuHRn/Us22BQqT3KnHTMwYPmmFaqRfOpODEGwQqU6wZlp1lAe2ljhOBGovEM6jiFDQK /lC8WfiKxWqvVi6IQYzuSFES2QI/0BFx72OzPIlVC+cXDXzqwxSqLfN2i2Io6HaQ85VQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/pv: Unhide writes to d->arch.hv_compat_vstart Message-Id: Date: Wed, 10 Dec 2025 15:55:11 +0000 commit 6633b7b8f108fe741b69b5c92c1db5b52c5f1a20 Author: Andrew Cooper AuthorDate: Tue Dec 9 15:51:27 2025 +0000 Commit: Andrew Cooper CommitDate: Wed Dec 10 14:48:45 2025 +0000 x86/pv: Unhide writes to d->arch.hv_compat_vstart The variable, when compiled in, is never 0, but because the writes into it are hidden behind the HYPERVISOR_COMPAT_VIRT_START() macro, it has a very good impression of being 0. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich Reviewed-by: Grygorii Strashko --- xen/arch/x86/domain.c | 2 +- xen/arch/x86/pv/dom0_build.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index bd75d044a0..d33a42c882 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -891,7 +891,7 @@ int arch_domain_create(struct domain *d, d->arch.emulation_flags = emflags; #ifdef CONFIG_PV32 - HYPERVISOR_COMPAT_VIRT_START(d) = + d->arch.hv_compat_vstart = is_pv_domain(d) ? __HYPERVISOR_COMPAT_VIRT_START : ~0u; #endif diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c index 21158ce181..fed03dc15d 100644 --- a/xen/arch/x86/pv/dom0_build.c +++ b/xen/arch/x86/pv/dom0_build.c @@ -521,7 +521,7 @@ static int __init dom0_construct(const struct boot_domain *bd) printk("Dom0 expects too high a hypervisor start address\n"); return -ERANGE; } - HYPERVISOR_COMPAT_VIRT_START(d) = + d->arch.hv_compat_vstart = max_t(unsigned int, m2p_compat_vstart, value); } -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Wed Dec 10 15:55:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 10 Dec 2025 15:55:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1183035.1505823 (Exim 4.92) (envelope-from ) id 1vTMXD-0005W7-6G; Wed, 10 Dec 2025 15:55:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1183035.1505823; Wed, 10 Dec 2025 15:55:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTMXD-0005Vz-3d; Wed, 10 Dec 2025 15:55:23 +0000 Received: by outflank-mailman (input) for mailman id 1183035; Wed, 10 Dec 2025 15:55:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTMXC-0005Vr-4r for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 15:55:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTMXB-003Hvu-2e for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 15:55:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTMXC-00GWlz-03 for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 15:55:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=6AE3g1sIyScUiTVLooAMQ+JxZf2UFp4W1lZGKS/mkgI=; b=fi43iKuchHdxcJH4OZKtlm36Ez n6KCVbU6tXZS3QoAmN2W/hd3To959HDlz7G1uyGfC2w2kJnlDNIetkEBDEcGmF1DiStNeH5arpEqi EXoBxRxquIp2qQiPHWfVvK/pKijQGAPwO7yu4xDrSdG0hnou2zmECU8k/N7SNi1TAc3U=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/pv: Inline domain_set_alloc_bitsize() into it's single caller Message-Id: Date: Wed, 10 Dec 2025 15:55:22 +0000 commit 156e27e4976e4586b06764b22a4c6525cbd92a68 Author: Andrew Cooper AuthorDate: Tue Dec 9 17:51:19 2025 +0000 Commit: Andrew Cooper CommitDate: Wed Dec 10 14:48:45 2025 +0000 x86/pv: Inline domain_set_alloc_bitsize() into it's single caller Prior to commit 02e78311cdc6 ("x86/domctl: Make XEN_DOMCTL_set_address_size singleshot", Xen 4.9, 2016), it was possible for domains to switch to being compat, and back again. Since then however, becoming compat is a singleton action that can't be undone. From the context it's clear to see the is_pv_32bit_domain() check is redundant, and from the singleton nature and being the only place setting physaddr_bitsize, there's no need to check it for being 0. No functional change. Co-developed-by: Grygorii Strashko Signed-off-by: Andrew Cooper Reviewed-by: Grygorii Strashko Acked-by: Jan Beulich --- xen/arch/x86/include/asm/mm.h | 1 - xen/arch/x86/pv/domain.c | 6 +++++- xen/arch/x86/x86_64/mm.c | 13 ------------- 3 files changed, 5 insertions(+), 15 deletions(-) diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h index 17ca6666a3..9438f5ea01 100644 --- a/xen/arch/x86/include/asm/mm.h +++ b/xen/arch/x86/include/asm/mm.h @@ -619,7 +619,6 @@ void __iomem *ioremap_wc(paddr_t pa, size_t len); extern int memory_add(unsigned long spfn, unsigned long epfn, unsigned int pxm); -void domain_set_alloc_bitsize(struct domain *d); unsigned int domain_clamp_alloc_bitsize(struct domain *d, unsigned int bits); #define domain_clamp_alloc_bitsize(d, bits) domain_clamp_alloc_bitsize(d, bits) diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c index 9c4785c187..11db6a6d83 100644 --- a/xen/arch/x86/pv/domain.c +++ b/xen/arch/x86/pv/domain.c @@ -254,7 +254,11 @@ int switch_compat(struct domain *d) goto undo_and_fail; } - domain_set_alloc_bitsize(d); + if ( MACH2PHYS_COMPAT_NR_ENTRIES(d) < max_page ) + d->arch.physaddr_bitsize = + /* 2^n entries can be contained in guest's p2m mapping space */ + fls(MACH2PHYS_COMPAT_NR_ENTRIES(d)) - 1 + PAGE_SHIFT; + recalculate_cpuid_policy(d); d->arch.x87_fip_width = 4; diff --git a/xen/arch/x86/x86_64/mm.c b/xen/arch/x86/x86_64/mm.c index d4e6a9c0a2..42fd4fe4e9 100644 --- a/xen/arch/x86/x86_64/mm.c +++ b/xen/arch/x86/x86_64/mm.c @@ -1119,19 +1119,6 @@ unmap: return ret; } -void domain_set_alloc_bitsize(struct domain *d) -{ - if ( !is_pv_32bit_domain(d) || - (MACH2PHYS_COMPAT_NR_ENTRIES(d) >= max_page) || - d->arch.physaddr_bitsize > 0 ) - return; - d->arch.physaddr_bitsize = - /* 2^n entries can be contained in guest's p2m mapping space */ - fls(MACH2PHYS_COMPAT_NR_ENTRIES(d)) - 1 - /* 2^n pages -> 2^(n+PAGE_SHIFT) bits */ - + PAGE_SHIFT; -} - unsigned int domain_clamp_alloc_bitsize(struct domain *d, unsigned int bits) { if ( (d == NULL) || (d->arch.physaddr_bitsize == 0) ) -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Wed Dec 10 15:55:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 10 Dec 2025 15:55:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1183036.1505828 (Exim 4.92) (envelope-from ) id 1vTMXN-0005YW-7q; Wed, 10 Dec 2025 15:55:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1183036.1505828; Wed, 10 Dec 2025 15:55:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTMXN-0005YO-4z; Wed, 10 Dec 2025 15:55:33 +0000 Received: by outflank-mailman (input) for mailman id 1183036; Wed, 10 Dec 2025 15:55:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTMXM-0005YF-8W for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 15:55:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTMXL-003Hxx-31 for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 15:55:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTMXM-00GXsV-0c for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 15:55:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=PI2InVzP2TZi4yPcDHkyDgMgHGtGb0aQvYtzQApkbec=; b=GfP5tJMe//y8XcW/u2UBmp4LJx /fByLqLHToukZh60AitUlV3XH1T7Afj8Y0UWbm/DpyFa/DI+4uW/n4KmEK+2Q2hAtyo+hRnHJXyus wv9yZoMYB7UTr6FE1caImX77eV0ugtvS4yNWyRWMLcsVRLE1N8fpzfi7WYMKzrgrYFO0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/pv: Move hv_compat_vstart into pv_domain Message-Id: Date: Wed, 10 Dec 2025 15:55:32 +0000 commit 0eff073ff8ee41ff76a6a1fb3196e8e51943f549 Author: Andrew Cooper AuthorDate: Tue Dec 9 17:01:10 2025 +0000 Commit: Andrew Cooper CommitDate: Wed Dec 10 14:48:45 2025 +0000 x86/pv: Move hv_compat_vstart into pv_domain The hv_compat_vstart variable is hidden behind CONFIG_PV32 but lives in arch_domain. Moving it into pv_domain is an obvious improvement. Its value however is less obvious, and is a mess. In !PV32 builds, it's uniformly treated as 0, but in PV32 builds it's ~0U (HVM guests), __HYPERVISOR_COMPAT_VIRT_START (PV guests), or custom (PV32 dom0). This seems to work because users are guarded behind is_pv32_{domain,vcpu}(). Simplify things by leaving it as 0 in PV32 builds for most domains, initialising it in only in switch_compat() when a domain becomes 32bit PV. dom0_construct() adjusts the value after calling switch_compat(). Suggested-by: Grygorii Strashko Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/arch/x86/domain.c | 5 ----- xen/arch/x86/include/asm/config.h | 2 +- xen/arch/x86/include/asm/domain.h | 8 ++++---- xen/arch/x86/pv/dom0_build.c | 2 +- xen/arch/x86/pv/domain.c | 2 ++ 5 files changed, 8 insertions(+), 11 deletions(-) diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index d33a42c882..5e37bfbd17 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -890,11 +890,6 @@ int arch_domain_create(struct domain *d, } d->arch.emulation_flags = emflags; -#ifdef CONFIG_PV32 - d->arch.hv_compat_vstart = - is_pv_domain(d) ? __HYPERVISOR_COMPAT_VIRT_START : ~0u; -#endif - spec_ctrl_init_domain(d); if ( (rc = paging_domain_init(d)) != 0 ) diff --git a/xen/arch/x86/include/asm/config.h b/xen/arch/x86/include/asm/config.h index 1563696954..cc80f2c623 100644 --- a/xen/arch/x86/include/asm/config.h +++ b/xen/arch/x86/include/asm/config.h @@ -201,7 +201,7 @@ /* This is not a fixed value, just a lower limit. */ #define __HYPERVISOR_COMPAT_VIRT_START 0xF5800000 -#define HYPERVISOR_COMPAT_VIRT_START(d) ((d)->arch.hv_compat_vstart) +#define HYPERVISOR_COMPAT_VIRT_START(d) ((d)->arch.pv.hv_compat_vstart) #else /* !CONFIG_PV32 */ diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/domain.h index 386ec61745..7e5cbd11a4 100644 --- a/xen/arch/x86/include/asm/domain.h +++ b/xen/arch/x86/include/asm/domain.h @@ -288,6 +288,10 @@ struct pv_domain /* Mitigate L1TF with shadow/crashing? */ bool check_l1tf; +#ifdef CONFIG_PV32 + unsigned int hv_compat_vstart; +#endif + /* map_domain_page() mapping cache. */ struct mapcache_domain mapcache; @@ -315,10 +319,6 @@ struct arch_domain { struct page_info *perdomain_l3_pg; -#ifdef CONFIG_PV32 - unsigned int hv_compat_vstart; -#endif - /* Maximum physical-address bitwidth supported by this guest. */ unsigned int physaddr_bitsize; diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c index fed03dc15d..418b453ba8 100644 --- a/xen/arch/x86/pv/dom0_build.c +++ b/xen/arch/x86/pv/dom0_build.c @@ -521,7 +521,7 @@ static int __init dom0_construct(const struct boot_domain *bd) printk("Dom0 expects too high a hypervisor start address\n"); return -ERANGE; } - d->arch.hv_compat_vstart = + d->arch.pv.hv_compat_vstart = max_t(unsigned int, m2p_compat_vstart, value); } diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c index 11db6a6d83..ca5f692051 100644 --- a/xen/arch/x86/pv/domain.c +++ b/xen/arch/x86/pv/domain.c @@ -254,6 +254,8 @@ int switch_compat(struct domain *d) goto undo_and_fail; } + d->arch.pv.hv_compat_vstart = __HYPERVISOR_COMPAT_VIRT_START; + if ( MACH2PHYS_COMPAT_NR_ENTRIES(d) < max_page ) d->arch.physaddr_bitsize = /* 2^n entries can be contained in guest's p2m mapping space */ -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Wed Dec 10 17:55:10 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 10 Dec 2025 17:55:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1183143.1505911 (Exim 4.92) (envelope-from ) id 1vTOP1-00083d-A7; Wed, 10 Dec 2025 17:55:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1183143.1505911; Wed, 10 Dec 2025 17:55:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTOP1-00083V-7X; Wed, 10 Dec 2025 17:55:03 +0000 Received: by outflank-mailman (input) for mailman id 1183143; Wed, 10 Dec 2025 17:55:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTOP0-00083P-6R for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 17:55:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTOOz-003KUD-2X for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 17:55:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTOOz-00BVgR-3D for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 17:55:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=6lbdTl8u9oc5TSfMGQgBSh+OciuO6a2ueUv4irEAWn0=; b=VpB55GIYVAAO2PeZHEgsZhp6dq ve+9agwlnwEoIzhAoQgq2cvonE+4i84f/oeJkSlDdJc+b5AYEnWbJUktAOFomVAL5Oor59p0gZnEM YpnVH1LUXva5P5aU0UQUxPPTBlf+ryV9NCU7dQwiRLikKKap8YCdJuVfzblVK7K6Nl0M=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/kexec: Replace CALL+UD2 pattern with JMP Message-Id: Date: Wed, 10 Dec 2025 17:55:01 +0000 commit 8b7a72f4d3a5a5e13e42b2e89261a2f733299f9f Author: Andrew Cooper AuthorDate: Fri Dec 5 15:22:38 2025 +0000 Commit: Andrew Cooper CommitDate: Wed Dec 10 14:48:45 2025 +0000 x86/kexec: Replace CALL+UD2 pattern with JMP Linux jumps to the target image rather than calling it. Switch to using JMP, and drop the trailing UD2s. Linux does have a mode, named CONFIG_KEXEC_JUMP, where the target image can be returned from, but that involves extra metadata and setting up a stack within the target image which Xen doesn't support at the moment. No functional change. Reported-by: Jan Beulich Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/arch/x86/x86_64/kexec_reloc.S | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/xen/arch/x86/x86_64/kexec_reloc.S b/xen/arch/x86/x86_64/kexec_reloc.S index 50ba454abd..b52d31a654 100644 --- a/xen/arch/x86/x86_64/kexec_reloc.S +++ b/xen/arch/x86/x86_64/kexec_reloc.S @@ -75,10 +75,8 @@ FUNC(kexec_reloc, PAGE_SIZE) testq $KEXEC_RELOC_FLAG_COMPAT, %r8 jnz .L_call_32_bit -.L_call_64_bit: - /* Call the image entry point. This should never return. */ - callq *%rbp - ud2 + /* Jump to the image entry point */ + jmp *%rbp .L_call_32_bit: /* Setup IDT. */ @@ -170,9 +168,8 @@ FUNC_LOCAL(compatibility_mode) xorl %eax, %eax movl %eax, %cr4 - /* Call the image entry point. This should never return. */ - call *%ebp - ud2 + /* Jump to the image entry point. */ + jmp *%ebp END(compatibility_mode) /* Separate code and data into into different cache lines */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Dec 10 17:55:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 10 Dec 2025 17:55:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1183144.1505917 (Exim 4.92) (envelope-from ) id 1vTOPB-000853-C0; Wed, 10 Dec 2025 17:55:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1183144.1505917; Wed, 10 Dec 2025 17:55:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTOPB-00084v-90; Wed, 10 Dec 2025 17:55:13 +0000 Received: by outflank-mailman (input) for mailman id 1183144; Wed, 10 Dec 2025 17:55:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTOPA-00084l-7D for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 17:55:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTOP9-003KUH-2t for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 17:55:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTOPA-00BWkt-0S for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 17:55:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=6OYGLSaU4S+v5eHSCzNZaeQ6GTiXwZbfiIB14loWq18=; b=DT/7dKyVvZPnTq8So/Mvxn770H MfDm1T8sdZ4hdeQXh28mLogkVepRHZfK35oVHjSC6knUhXE5iaa3crFIHU/8UTM07q9q19zW5ciJi IO+omjD8u9pwiDihKHHpjmNMMsTvEpf+2zryf6mz7usfuKN9bFp8XBSfSDi3+t5XRfeI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/pv: Unhide writes to d->arch.hv_compat_vstart Message-Id: Date: Wed, 10 Dec 2025 17:55:12 +0000 commit 6633b7b8f108fe741b69b5c92c1db5b52c5f1a20 Author: Andrew Cooper AuthorDate: Tue Dec 9 15:51:27 2025 +0000 Commit: Andrew Cooper CommitDate: Wed Dec 10 14:48:45 2025 +0000 x86/pv: Unhide writes to d->arch.hv_compat_vstart The variable, when compiled in, is never 0, but because the writes into it are hidden behind the HYPERVISOR_COMPAT_VIRT_START() macro, it has a very good impression of being 0. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich Reviewed-by: Grygorii Strashko --- xen/arch/x86/domain.c | 2 +- xen/arch/x86/pv/dom0_build.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index bd75d044a0..d33a42c882 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -891,7 +891,7 @@ int arch_domain_create(struct domain *d, d->arch.emulation_flags = emflags; #ifdef CONFIG_PV32 - HYPERVISOR_COMPAT_VIRT_START(d) = + d->arch.hv_compat_vstart = is_pv_domain(d) ? __HYPERVISOR_COMPAT_VIRT_START : ~0u; #endif diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c index 21158ce181..fed03dc15d 100644 --- a/xen/arch/x86/pv/dom0_build.c +++ b/xen/arch/x86/pv/dom0_build.c @@ -521,7 +521,7 @@ static int __init dom0_construct(const struct boot_domain *bd) printk("Dom0 expects too high a hypervisor start address\n"); return -ERANGE; } - HYPERVISOR_COMPAT_VIRT_START(d) = + d->arch.hv_compat_vstart = max_t(unsigned int, m2p_compat_vstart, value); } -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Dec 10 17:55:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 10 Dec 2025 17:55:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1183145.1505920 (Exim 4.92) (envelope-from ) id 1vTOPL-000881-D5; Wed, 10 Dec 2025 17:55:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1183145.1505920; Wed, 10 Dec 2025 17:55:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTOPL-00087t-AU; Wed, 10 Dec 2025 17:55:23 +0000 Received: by outflank-mailman (input) for mailman id 1183145; Wed, 10 Dec 2025 17:55:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTOPK-00087l-AS for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 17:55:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTOPK-003KUd-02 for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 17:55:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTOPK-00BXng-0l for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 17:55:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=/ouk7Yn7L4/zc7cWHSsLLAqY07+6UNFQ1S5PgRjAjm0=; b=bJwkIbTxTQPjyfrZMVSQgyBD/w EUEZ6OT8WwQmX8TzfKYuae6Rggg/5zywYV0lFYU1FiLqbpEWI2q4C53GWmW4s5h/qHZpR0Bza4JGb eeV4QyPwvVixL6JlcVji3xjth38ntKtPfARwP7Xw487ETpuiiekl5GMTSaXhvbZ9JY30=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/pv: Inline domain_set_alloc_bitsize() into it's single caller Message-Id: Date: Wed, 10 Dec 2025 17:55:22 +0000 commit 156e27e4976e4586b06764b22a4c6525cbd92a68 Author: Andrew Cooper AuthorDate: Tue Dec 9 17:51:19 2025 +0000 Commit: Andrew Cooper CommitDate: Wed Dec 10 14:48:45 2025 +0000 x86/pv: Inline domain_set_alloc_bitsize() into it's single caller Prior to commit 02e78311cdc6 ("x86/domctl: Make XEN_DOMCTL_set_address_size singleshot", Xen 4.9, 2016), it was possible for domains to switch to being compat, and back again. Since then however, becoming compat is a singleton action that can't be undone. From the context it's clear to see the is_pv_32bit_domain() check is redundant, and from the singleton nature and being the only place setting physaddr_bitsize, there's no need to check it for being 0. No functional change. Co-developed-by: Grygorii Strashko Signed-off-by: Andrew Cooper Reviewed-by: Grygorii Strashko Acked-by: Jan Beulich --- xen/arch/x86/include/asm/mm.h | 1 - xen/arch/x86/pv/domain.c | 6 +++++- xen/arch/x86/x86_64/mm.c | 13 ------------- 3 files changed, 5 insertions(+), 15 deletions(-) diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h index 17ca6666a3..9438f5ea01 100644 --- a/xen/arch/x86/include/asm/mm.h +++ b/xen/arch/x86/include/asm/mm.h @@ -619,7 +619,6 @@ void __iomem *ioremap_wc(paddr_t pa, size_t len); extern int memory_add(unsigned long spfn, unsigned long epfn, unsigned int pxm); -void domain_set_alloc_bitsize(struct domain *d); unsigned int domain_clamp_alloc_bitsize(struct domain *d, unsigned int bits); #define domain_clamp_alloc_bitsize(d, bits) domain_clamp_alloc_bitsize(d, bits) diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c index 9c4785c187..11db6a6d83 100644 --- a/xen/arch/x86/pv/domain.c +++ b/xen/arch/x86/pv/domain.c @@ -254,7 +254,11 @@ int switch_compat(struct domain *d) goto undo_and_fail; } - domain_set_alloc_bitsize(d); + if ( MACH2PHYS_COMPAT_NR_ENTRIES(d) < max_page ) + d->arch.physaddr_bitsize = + /* 2^n entries can be contained in guest's p2m mapping space */ + fls(MACH2PHYS_COMPAT_NR_ENTRIES(d)) - 1 + PAGE_SHIFT; + recalculate_cpuid_policy(d); d->arch.x87_fip_width = 4; diff --git a/xen/arch/x86/x86_64/mm.c b/xen/arch/x86/x86_64/mm.c index d4e6a9c0a2..42fd4fe4e9 100644 --- a/xen/arch/x86/x86_64/mm.c +++ b/xen/arch/x86/x86_64/mm.c @@ -1119,19 +1119,6 @@ unmap: return ret; } -void domain_set_alloc_bitsize(struct domain *d) -{ - if ( !is_pv_32bit_domain(d) || - (MACH2PHYS_COMPAT_NR_ENTRIES(d) >= max_page) || - d->arch.physaddr_bitsize > 0 ) - return; - d->arch.physaddr_bitsize = - /* 2^n entries can be contained in guest's p2m mapping space */ - fls(MACH2PHYS_COMPAT_NR_ENTRIES(d)) - 1 - /* 2^n pages -> 2^(n+PAGE_SHIFT) bits */ - + PAGE_SHIFT; -} - unsigned int domain_clamp_alloc_bitsize(struct domain *d, unsigned int bits) { if ( (d == NULL) || (d->arch.physaddr_bitsize == 0) ) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Dec 10 17:55:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 10 Dec 2025 17:55:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1183146.1505924 (Exim 4.92) (envelope-from ) id 1vTOPV-0008Ap-G1; Wed, 10 Dec 2025 17:55:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1183146.1505924; Wed, 10 Dec 2025 17:55:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTOPV-0008Ai-DK; Wed, 10 Dec 2025 17:55:33 +0000 Received: by outflank-mailman (input) for mailman id 1183146; Wed, 10 Dec 2025 17:55:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTOPU-0008Aa-Db for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 17:55:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTOPU-003KWg-0L for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 17:55:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTOPU-00BYpT-19 for xen-changelog@lists.xenproject.org; Wed, 10 Dec 2025 17:55:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=oDFvOH625NdpdrDoNzD3U6B1+vO2XAOmlSvlcM8Y6jw=; b=lKdSfAZGQkZB1Cxuxa61ymzx6H BlfGzv0pDhmkk3S4PPKG8toWhb7ANDqE49rQivMd4ag//UJfu4Ttq5WvaxZH8qizM3t04sAATGx9P KO4jq4tjDMh203EtrrtRdo4C7KXzbTRfLn+GIhsMjr13A7JzFuOxMSn1Bryeh48OQx3w=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/pv: Move hv_compat_vstart into pv_domain Message-Id: Date: Wed, 10 Dec 2025 17:55:32 +0000 commit 0eff073ff8ee41ff76a6a1fb3196e8e51943f549 Author: Andrew Cooper AuthorDate: Tue Dec 9 17:01:10 2025 +0000 Commit: Andrew Cooper CommitDate: Wed Dec 10 14:48:45 2025 +0000 x86/pv: Move hv_compat_vstart into pv_domain The hv_compat_vstart variable is hidden behind CONFIG_PV32 but lives in arch_domain. Moving it into pv_domain is an obvious improvement. Its value however is less obvious, and is a mess. In !PV32 builds, it's uniformly treated as 0, but in PV32 builds it's ~0U (HVM guests), __HYPERVISOR_COMPAT_VIRT_START (PV guests), or custom (PV32 dom0). This seems to work because users are guarded behind is_pv32_{domain,vcpu}(). Simplify things by leaving it as 0 in PV32 builds for most domains, initialising it in only in switch_compat() when a domain becomes 32bit PV. dom0_construct() adjusts the value after calling switch_compat(). Suggested-by: Grygorii Strashko Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/arch/x86/domain.c | 5 ----- xen/arch/x86/include/asm/config.h | 2 +- xen/arch/x86/include/asm/domain.h | 8 ++++---- xen/arch/x86/pv/dom0_build.c | 2 +- xen/arch/x86/pv/domain.c | 2 ++ 5 files changed, 8 insertions(+), 11 deletions(-) diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index d33a42c882..5e37bfbd17 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -890,11 +890,6 @@ int arch_domain_create(struct domain *d, } d->arch.emulation_flags = emflags; -#ifdef CONFIG_PV32 - d->arch.hv_compat_vstart = - is_pv_domain(d) ? __HYPERVISOR_COMPAT_VIRT_START : ~0u; -#endif - spec_ctrl_init_domain(d); if ( (rc = paging_domain_init(d)) != 0 ) diff --git a/xen/arch/x86/include/asm/config.h b/xen/arch/x86/include/asm/config.h index 1563696954..cc80f2c623 100644 --- a/xen/arch/x86/include/asm/config.h +++ b/xen/arch/x86/include/asm/config.h @@ -201,7 +201,7 @@ /* This is not a fixed value, just a lower limit. */ #define __HYPERVISOR_COMPAT_VIRT_START 0xF5800000 -#define HYPERVISOR_COMPAT_VIRT_START(d) ((d)->arch.hv_compat_vstart) +#define HYPERVISOR_COMPAT_VIRT_START(d) ((d)->arch.pv.hv_compat_vstart) #else /* !CONFIG_PV32 */ diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/domain.h index 386ec61745..7e5cbd11a4 100644 --- a/xen/arch/x86/include/asm/domain.h +++ b/xen/arch/x86/include/asm/domain.h @@ -288,6 +288,10 @@ struct pv_domain /* Mitigate L1TF with shadow/crashing? */ bool check_l1tf; +#ifdef CONFIG_PV32 + unsigned int hv_compat_vstart; +#endif + /* map_domain_page() mapping cache. */ struct mapcache_domain mapcache; @@ -315,10 +319,6 @@ struct arch_domain { struct page_info *perdomain_l3_pg; -#ifdef CONFIG_PV32 - unsigned int hv_compat_vstart; -#endif - /* Maximum physical-address bitwidth supported by this guest. */ unsigned int physaddr_bitsize; diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c index fed03dc15d..418b453ba8 100644 --- a/xen/arch/x86/pv/dom0_build.c +++ b/xen/arch/x86/pv/dom0_build.c @@ -521,7 +521,7 @@ static int __init dom0_construct(const struct boot_domain *bd) printk("Dom0 expects too high a hypervisor start address\n"); return -ERANGE; } - d->arch.hv_compat_vstart = + d->arch.pv.hv_compat_vstart = max_t(unsigned int, m2p_compat_vstart, value); } diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c index 11db6a6d83..ca5f692051 100644 --- a/xen/arch/x86/pv/domain.c +++ b/xen/arch/x86/pv/domain.c @@ -254,6 +254,8 @@ int switch_compat(struct domain *d) goto undo_and_fail; } + d->arch.pv.hv_compat_vstart = __HYPERVISOR_COMPAT_VIRT_START; + if ( MACH2PHYS_COMPAT_NR_ENTRIES(d) < max_page ) d->arch.physaddr_bitsize = /* 2^n entries can be contained in guest's p2m mapping space */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Dec 11 02:55:08 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 11 Dec 2025 02:55:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1183540.1506198 (Exim 4.92) (envelope-from ) id 1vTWpb-0001xD-6y; Thu, 11 Dec 2025 02:55:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1183540.1506198; Thu, 11 Dec 2025 02:55:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTWpb-0001x5-49; Thu, 11 Dec 2025 02:55:03 +0000 Received: by outflank-mailman (input) for mailman id 1183540; Thu, 11 Dec 2025 02:55:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTWpZ-0001wz-JR for xen-changelog@lists.xenproject.org; Thu, 11 Dec 2025 02:55:01 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTWpZ-004bxi-0p for xen-changelog@lists.xenproject.org; Thu, 11 Dec 2025 02:55:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTWpZ-00FJ9D-1V for xen-changelog@lists.xenproject.org; Thu, 11 Dec 2025 02:55:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=zpLQ/Hbut5cQLDIUVEVRqQD7yd7vM7Dlqf1TO34bUik=; b=oIhMnvvXdsyiAqbTqIpprgLFnE bREsBWWiIfTRKJwbjVfCyEkDkcEfk8bUnN8/283J2ZjfkZh+Gke4GyY+MtGdDW5TOL3wZmbfuDe7a PG8N8HWS2E2+kLQeKqj3elSRaWIi+/gOcYaut3/Tuxi6ShiGOBk9Xx+0zuC1XZMeutR8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] misra: consider conversion from UL or (void*) to function pointer as safe Message-Id: Date: Thu, 11 Dec 2025 02:55:01 +0000 commit f951de9a3b3e88fbe8ebbde452aa22bd06da2cb3 Author: Dmytro Prokopchuk1 AuthorDate: Mon Oct 27 18:51:47 2025 +0000 Commit: Stefano Stabellini CommitDate: Wed Dec 10 17:42:40 2025 -0800 misra: consider conversion from UL or (void*) to function pointer as safe Rule 11.1 states as following: "Conversions shall not be performed between a pointer to a function and any other type." This deviation from Rule 11.1 relies on both ABI definitions and compiler implementations supported by Xen. The System V x86_64 ABI and the AArch64 ELF ABI define consistent and compatible representations (i.e., having the same size and memory layout) for (void *), unsigned long, and function pointers, enabling safe conversions between these types without data loss or corruption. Additionally, GCC and Clang, faithfully implement the ABI specifications, ensuring that the generated machine code conforms to these guarantees. Developers must note that this behavior is not universal and depends on platform-specific ABIs and compiler implementations. Configure Eclair to avoid reporting violations for conversions from unsigned long or (void *) to a function pointer. Add a compile-time assertion into the file 'xen/common/version.c' to confirm this conversion compatibility across X86 and ARM platforms (assuming this file is common for them). References: - System V x86_64 ABI: https://gitlab.com/x86-psABIs/x86-64-ABI/-/jobs/artifacts/master/raw/x86-64-ABI/abi.pdf?job=build - AArch64 ELF ABI: https://github.com/ARM-software/abi-aa/releases - GCC: https://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html - Clang: https://clang.llvm.org/docs/CrossCompilation.html Signed-off-by: Dmytro Prokopchuk Reviewed-by: Nicola Vetrini [stefano: remove special powerpc check] Signed-off-by: Stefano Stabellini Acked-by: Stefano Stabellini --- automation/eclair_analysis/ECLAIR/deviations.ecl | 8 ++++++++ docs/misra/deviations.rst | 8 +++++++- docs/misra/rules.rst | 7 ++++++- xen/common/version.c | 19 +++++++++++++++++++ 4 files changed, 40 insertions(+), 2 deletions(-) diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl index 7f3fd35a33..219ba6993b 100644 --- a/automation/eclair_analysis/ECLAIR/deviations.ecl +++ b/automation/eclair_analysis/ECLAIR/deviations.ecl @@ -375,6 +375,14 @@ constant expressions are required.\"" } -doc_end +-doc_begin="Conversion from unsigned long or (void *) to a function pointer can restore full information, provided that the source type has enough bits to restore it." +-config=MC3A2.R11.1,casts+={safe, + "from(type(canonical(builtin(unsigned long)||pointer(builtin(void))))) + &&to(type(canonical(__function_pointer_types))) + &&relation(definitely_preserves_value)" +} +-doc_end + -doc_begin="The conversion from a function pointer to a boolean has a well-known semantics that do not lead to unexpected behaviour." -config=MC3A2.R11.1,casts+={safe, "from(type(canonical(__function_pointer_types))) diff --git a/docs/misra/deviations.rst b/docs/misra/deviations.rst index 3271317206..b3431ef24e 100644 --- a/docs/misra/deviations.rst +++ b/docs/misra/deviations.rst @@ -366,11 +366,17 @@ Deviations related to MISRA C:2012 Rules: - Tagged as `safe` for ECLAIR. * - R11.1 - - The conversion from a function pointer to unsigned long or (void \*) does + - The conversion from a function pointer to unsigned long or '(void *)' does not lose any information, provided that the target type has enough bits to store it. - Tagged as `safe` for ECLAIR. + * - R11.1 + - Conversion from unsigned long or '(void *)' to a function pointer can + restore full information, provided that the source type has enough bits + to restore it. + - Tagged as `safe` for ECLAIR. + * - R11.1 - The conversion from a function pointer to a boolean has a well-known semantics that do not lead to unexpected behaviour. diff --git a/docs/misra/rules.rst b/docs/misra/rules.rst index 4388010ec9..4e94251887 100644 --- a/docs/misra/rules.rst +++ b/docs/misra/rules.rst @@ -431,7 +431,12 @@ maintainers if you want to suggest a change. - All conversions to integer types are permitted if the destination type has enough bits to hold the entire value. Conversions to bool and void* are permitted. Conversions from 'void noreturn (*)(...)' - to 'void (*)(...)' are permitted. + to 'void (*)(...)' are permitted. Conversions from unsigned long or + '(void *)' to a function pointer are permitted. + Example:: + + unsigned long func_addr = (unsigned long)&some_function; + void (*restored_func)(void) = (void (*)(void))func_addr; * - `Rule 11.2 `_ - Required diff --git a/xen/common/version.c b/xen/common/version.c index 553b97ba9b..80e7a9b981 100644 --- a/xen/common/version.c +++ b/xen/common/version.c @@ -217,6 +217,25 @@ void __init xen_build_init(void) #endif /* CONFIG_X86 */ } #endif /* BUILD_ID */ + +/* + * This assertion checks compatibility between 'unsigned long', 'void *', + * and function pointers. This is true for most supported architectures, + * including X86 (x86_64) and ARM (arm, aarch64). + * + * For more context on architecture-specific preprocessor guards, see + * docs/misc/C-language-toolchain.rst. + * + * If porting Xen to a new architecture where this compatibility does not hold, + * exclude that architecture from these checks and provide suitable commentary + * and/or alternative checks as appropriate. + */ +static void __init __maybe_unused build_assertions(void) +{ + BUILD_BUG_ON(sizeof(unsigned long) != sizeof(void (*)(void))); + BUILD_BUG_ON(sizeof(void *) != sizeof(void (*)(void))); +} + /* * Local variables: * mode: C -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Thu Dec 11 04:11:09 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 11 Dec 2025 04:11:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1183546.1506202 (Exim 4.92) (envelope-from ) id 1vTY19-0003Mt-7v; Thu, 11 Dec 2025 04:11:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1183546.1506202; Thu, 11 Dec 2025 04:11:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTY19-0003Ml-5H; Thu, 11 Dec 2025 04:11:03 +0000 Received: by outflank-mailman (input) for mailman id 1183546; Thu, 11 Dec 2025 04:11:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTY17-0003Mf-Na for xen-changelog@lists.xenproject.org; Thu, 11 Dec 2025 04:11:01 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTY17-004dPG-1F for xen-changelog@lists.xenproject.org; Thu, 11 Dec 2025 04:11:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTY17-005uxu-20 for xen-changelog@lists.xenproject.org; Thu, 11 Dec 2025 04:11:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=WA3/qRwnjb08kQ2az2OhojEHosUWKxYwPQDGANdEFic=; b=sLhEQ+xws9pFAybn4qKt4lBy86 RlYPBXhevSWke/My1O97MNv77wpqxfhtB7Rm/nxGbagu7AMAZPzcYwA3a2jy+nUN3mluYIdjyCh0r Ru+kxlYucH9P3G+j0m4N17l2B228R4NkkzHrXmTe21Es6WXSVxmLJKx7vv46agiv+bJ4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] misra: consider conversion from UL or (void*) to function pointer as safe Message-Id: Date: Thu, 11 Dec 2025 04:11:01 +0000 commit f951de9a3b3e88fbe8ebbde452aa22bd06da2cb3 Author: Dmytro Prokopchuk1 AuthorDate: Mon Oct 27 18:51:47 2025 +0000 Commit: Stefano Stabellini CommitDate: Wed Dec 10 17:42:40 2025 -0800 misra: consider conversion from UL or (void*) to function pointer as safe Rule 11.1 states as following: "Conversions shall not be performed between a pointer to a function and any other type." This deviation from Rule 11.1 relies on both ABI definitions and compiler implementations supported by Xen. The System V x86_64 ABI and the AArch64 ELF ABI define consistent and compatible representations (i.e., having the same size and memory layout) for (void *), unsigned long, and function pointers, enabling safe conversions between these types without data loss or corruption. Additionally, GCC and Clang, faithfully implement the ABI specifications, ensuring that the generated machine code conforms to these guarantees. Developers must note that this behavior is not universal and depends on platform-specific ABIs and compiler implementations. Configure Eclair to avoid reporting violations for conversions from unsigned long or (void *) to a function pointer. Add a compile-time assertion into the file 'xen/common/version.c' to confirm this conversion compatibility across X86 and ARM platforms (assuming this file is common for them). References: - System V x86_64 ABI: https://gitlab.com/x86-psABIs/x86-64-ABI/-/jobs/artifacts/master/raw/x86-64-ABI/abi.pdf?job=build - AArch64 ELF ABI: https://github.com/ARM-software/abi-aa/releases - GCC: https://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html - Clang: https://clang.llvm.org/docs/CrossCompilation.html Signed-off-by: Dmytro Prokopchuk Reviewed-by: Nicola Vetrini [stefano: remove special powerpc check] Signed-off-by: Stefano Stabellini Acked-by: Stefano Stabellini --- automation/eclair_analysis/ECLAIR/deviations.ecl | 8 ++++++++ docs/misra/deviations.rst | 8 +++++++- docs/misra/rules.rst | 7 ++++++- xen/common/version.c | 19 +++++++++++++++++++ 4 files changed, 40 insertions(+), 2 deletions(-) diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl index 7f3fd35a33..219ba6993b 100644 --- a/automation/eclair_analysis/ECLAIR/deviations.ecl +++ b/automation/eclair_analysis/ECLAIR/deviations.ecl @@ -375,6 +375,14 @@ constant expressions are required.\"" } -doc_end +-doc_begin="Conversion from unsigned long or (void *) to a function pointer can restore full information, provided that the source type has enough bits to restore it." +-config=MC3A2.R11.1,casts+={safe, + "from(type(canonical(builtin(unsigned long)||pointer(builtin(void))))) + &&to(type(canonical(__function_pointer_types))) + &&relation(definitely_preserves_value)" +} +-doc_end + -doc_begin="The conversion from a function pointer to a boolean has a well-known semantics that do not lead to unexpected behaviour." -config=MC3A2.R11.1,casts+={safe, "from(type(canonical(__function_pointer_types))) diff --git a/docs/misra/deviations.rst b/docs/misra/deviations.rst index 3271317206..b3431ef24e 100644 --- a/docs/misra/deviations.rst +++ b/docs/misra/deviations.rst @@ -366,11 +366,17 @@ Deviations related to MISRA C:2012 Rules: - Tagged as `safe` for ECLAIR. * - R11.1 - - The conversion from a function pointer to unsigned long or (void \*) does + - The conversion from a function pointer to unsigned long or '(void *)' does not lose any information, provided that the target type has enough bits to store it. - Tagged as `safe` for ECLAIR. + * - R11.1 + - Conversion from unsigned long or '(void *)' to a function pointer can + restore full information, provided that the source type has enough bits + to restore it. + - Tagged as `safe` for ECLAIR. + * - R11.1 - The conversion from a function pointer to a boolean has a well-known semantics that do not lead to unexpected behaviour. diff --git a/docs/misra/rules.rst b/docs/misra/rules.rst index 4388010ec9..4e94251887 100644 --- a/docs/misra/rules.rst +++ b/docs/misra/rules.rst @@ -431,7 +431,12 @@ maintainers if you want to suggest a change. - All conversions to integer types are permitted if the destination type has enough bits to hold the entire value. Conversions to bool and void* are permitted. Conversions from 'void noreturn (*)(...)' - to 'void (*)(...)' are permitted. + to 'void (*)(...)' are permitted. Conversions from unsigned long or + '(void *)' to a function pointer are permitted. + Example:: + + unsigned long func_addr = (unsigned long)&some_function; + void (*restored_func)(void) = (void (*)(void))func_addr; * - `Rule 11.2 `_ - Required diff --git a/xen/common/version.c b/xen/common/version.c index 553b97ba9b..80e7a9b981 100644 --- a/xen/common/version.c +++ b/xen/common/version.c @@ -217,6 +217,25 @@ void __init xen_build_init(void) #endif /* CONFIG_X86 */ } #endif /* BUILD_ID */ + +/* + * This assertion checks compatibility between 'unsigned long', 'void *', + * and function pointers. This is true for most supported architectures, + * including X86 (x86_64) and ARM (arm, aarch64). + * + * For more context on architecture-specific preprocessor guards, see + * docs/misc/C-language-toolchain.rst. + * + * If porting Xen to a new architecture where this compatibility does not hold, + * exclude that architecture from these checks and provide suitable commentary + * and/or alternative checks as appropriate. + */ +static void __init __maybe_unused build_assertions(void) +{ + BUILD_BUG_ON(sizeof(unsigned long) != sizeof(void (*)(void))); + BUILD_BUG_ON(sizeof(void *) != sizeof(void (*)(void))); +} + /* * Local variables: * mode: C -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Dec 11 10:11:08 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 11 Dec 2025 10:11:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1183817.1506395 (Exim 4.92) (envelope-from ) id 1vTddY-0007aL-NI; Thu, 11 Dec 2025 10:11:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1183817.1506395; Thu, 11 Dec 2025 10:11:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTddY-0007aD-Ki; Thu, 11 Dec 2025 10:11:04 +0000 Received: by outflank-mailman (input) for mailman id 1183817; Thu, 11 Dec 2025 10:11:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTddX-0007a7-Bz for xen-changelog@lists.xenproject.org; Thu, 11 Dec 2025 10:11:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTddW-004lR6-37 for xen-changelog@lists.xenproject.org; Thu, 11 Dec 2025 10:11:03 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTddX-008RRR-0f for xen-changelog@lists.xenproject.org; Thu, 11 Dec 2025 10:11:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=cZv15ZA1cSHg+i+PWaQrwP6XkPsDqsPOewNhGngntB0=; b=Yu0aLqYHB9/CvPLEbD/zOlUwMS IvHV1rUNXr8VC/J/ARL8LXQ8/CcSrQMgfDyY1jYVVw2I1XzbgmPzoSKwJJVjce9UF5wiICG/VPoco ZTUYOmMC44TVi/qKFgtGoWv07PsBqdXBQm90oPLy6QfCZ2o+2fSLH8Pnp2wtVefWj4A4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen: Centralize scheduler linker definition Message-Id: Date: Thu, 11 Dec 2025 10:11:03 +0000 commit bd25f1504b32d1468ae05674f82bb1033e2249a5 Author: Jason Andryuk AuthorDate: Thu Dec 11 09:49:35 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 11 09:49:35 2025 +0100 xen: Centralize scheduler linker definition Use a define to centralize the common scheduler data in the per-arch linker scripts. This is in preparation for marking it KEEP(). While moving, switch to using POINTER_ALIGN. Signed-off-by: Jason Andryuk Reviewed-by: Jan Beulich Reviewed-by: Andrew Cooper --- xen/arch/arm/xen.lds.S | 5 +---- xen/arch/ppc/xen.lds.S | 5 +---- xen/arch/riscv/xen.lds.S | 5 +---- xen/arch/x86/xen.lds.S | 5 +---- xen/include/xen/xen.lds.h | 6 ++++++ 5 files changed, 10 insertions(+), 16 deletions(-) diff --git a/xen/arch/arm/xen.lds.S b/xen/arch/arm/xen.lds.S index db17ff1efa..2d5f1c516d 100644 --- a/xen/arch/arm/xen.lds.S +++ b/xen/arch/arm/xen.lds.S @@ -92,11 +92,8 @@ SECTIONS . = ALIGN(SMP_CACHE_BYTES); .data : { /* Data */ *(.data.page_aligned) - . = ALIGN(8); - __start_schedulers_array = .; - *(.data.schedulers) - __end_schedulers_array = .; + SCHEDULER_ARRAY HYPFS_PARAM *(.data .data.*) diff --git a/xen/arch/ppc/xen.lds.S b/xen/arch/ppc/xen.lds.S index 1de0b77fc6..d0f2ed43f1 100644 --- a/xen/arch/ppc/xen.lds.S +++ b/xen/arch/ppc/xen.lds.S @@ -83,11 +83,8 @@ SECTIONS . = ALIGN(PAGE_SIZE); DECL_SECTION(.data) { /* Data */ *(.data.page_aligned) - . = ALIGN(8); - __start_schedulers_array = .; - *(.data.schedulers) - __end_schedulers_array = .; + SCHEDULER_ARRAY HYPFS_PARAM *(.data .data.*) diff --git a/xen/arch/riscv/xen.lds.S b/xen/arch/riscv/xen.lds.S index edcadff90b..45d2e053d0 100644 --- a/xen/arch/riscv/xen.lds.S +++ b/xen/arch/riscv/xen.lds.S @@ -78,11 +78,8 @@ SECTIONS . = ALIGN(PAGE_SIZE); .data : { /* Data */ *(.data.page_aligned) - . = ALIGN(8); - __start_schedulers_array = .; - *(.data.schedulers) - __end_schedulers_array = .; + SCHEDULER_ARRAY HYPFS_PARAM *(.data .data.*) diff --git a/xen/arch/x86/xen.lds.S b/xen/arch/x86/xen.lds.S index 1ee08a3ea3..2aa41306ca 100644 --- a/xen/arch/x86/xen.lds.S +++ b/xen/arch/x86/xen.lds.S @@ -309,11 +309,8 @@ SECTIONS . = ALIGN(SMP_CACHE_BYTES); DECL_SECTION(.data.read_mostly) { *(.data.read_mostly) - . = ALIGN(8); - __start_schedulers_array = .; - *(.data.schedulers) - __end_schedulers_array = .; + SCHEDULER_ARRAY HYPFS_PARAM } PHDR(text) diff --git a/xen/include/xen/xen.lds.h b/xen/include/xen/xen.lds.h index f54fb2d152..136849ecd5 100644 --- a/xen/include/xen/xen.lds.h +++ b/xen/include/xen/xen.lds.h @@ -173,6 +173,12 @@ _edevice = .; \ } :text +#define SCHEDULER_ARRAY \ + . = ALIGN(POINTER_ALIGN); \ + __start_schedulers_array = .; \ + *(.data.schedulers) \ + __end_schedulers_array = .; + #ifdef CONFIG_HYPFS #define HYPFS_PARAM \ . = ALIGN(POINTER_ALIGN); \ -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Thu Dec 11 10:11:14 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 11 Dec 2025 10:11:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1183818.1506400 (Exim 4.92) (envelope-from ) id 1vTddi-0007cA-P1; Thu, 11 Dec 2025 10:11:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1183818.1506400; Thu, 11 Dec 2025 10:11:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTddi-0007c2-M8; Thu, 11 Dec 2025 10:11:14 +0000 Received: by outflank-mailman (input) for mailman id 1183818; Thu, 11 Dec 2025 10:11:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTddh-0007br-Dh for xen-changelog@lists.xenproject.org; Thu, 11 Dec 2025 10:11:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTddh-004lRA-0L for xen-changelog@lists.xenproject.org; Thu, 11 Dec 2025 10:11:13 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTddh-008SjT-16 for xen-changelog@lists.xenproject.org; Thu, 11 Dec 2025 10:11:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=nqu3a4/9e4psKTV7XbPjeYIYYkX4veXJM5GKNcQ14f8=; b=FBIet6cqv2HhwUWSwXNc3mBNuz z8HVi7vF5+iXShfGKFOBXLjstb/l4RJIBF4M0fHf4t1pE9MXm2CKkGi2Xh2bXJxANGd2uTHOvaiIH rqvsn1PxpxF/XjY125lx1Y3XIWVkOePcI+Ncd8YGiVJ5EQhfzSSsDsNDqt755y42fGEQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/pod: fix decrease_reservation() clearing of M2P entries Message-Id: Date: Thu, 11 Dec 2025 10:11:13 +0000 commit 8e4d495cb8f70280482edae12b48f422b5715099 Author: Roger Pau Monné AuthorDate: Thu Dec 11 09:50:10 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 11 09:50:10 2025 +0100 x86/pod: fix decrease_reservation() clearing of M2P entries Add the missing index increase in the M2P clearing loop, otherwise the loop keeps pointlessly setting the same MFN entry repeatedly. This seems to be an oversight from the change that introduced support to process high order pages in one go. Fixes: 3c352011c0d3 ("x86/PoD: shorten certain operations on higher order ranges") Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich --- xen/arch/x86/mm/p2m-pod.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/mm/p2m-pod.c b/xen/arch/x86/mm/p2m-pod.c index 05633fe2ac..22dde913cc 100644 --- a/xen/arch/x86/mm/p2m-pod.c +++ b/xen/arch/x86/mm/p2m-pod.c @@ -655,7 +655,7 @@ decrease_reservation(struct domain *d, gfn_t gfn, unsigned int order) } p2m_tlb_flush_sync(p2m); for ( j = 0; j < n; ++j ) - set_gpfn_from_mfn(mfn_x(mfn), INVALID_M2P_ENTRY); + set_gpfn_from_mfn(mfn_x(mfn) + j, INVALID_M2P_ENTRY); p2m_pod_cache_add(p2m, page, cur_order); ioreq_request_mapcache_invalidate(d); -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Thu Dec 11 10:11:24 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 11 Dec 2025 10:11:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1183819.1506404 (Exim 4.92) (envelope-from ) id 1vTdds-0007fI-RN; Thu, 11 Dec 2025 10:11:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1183819.1506404; Thu, 11 Dec 2025 10:11:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTdds-0007f8-Oj; Thu, 11 Dec 2025 10:11:24 +0000 Received: by outflank-mailman (input) for mailman id 1183819; Thu, 11 Dec 2025 10:11:23 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTddr-0007ez-H8 for xen-changelog@lists.xenproject.org; Thu, 11 Dec 2025 10:11:23 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTddr-004lRE-0h for xen-changelog@lists.xenproject.org; Thu, 11 Dec 2025 10:11:23 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTddr-008TsY-1V for xen-changelog@lists.xenproject.org; Thu, 11 Dec 2025 10:11:23 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=qOHFsgWnsZ4V7dV7UDub9fVm0broDemfRCoDjEn/Hao=; b=NtHSPDYGs7S0xW7NXUFNa5vKI+ FmVaCua4X4qj6oYmuNdybRfCHdnbIV+Z7EbuNAL8kIAIw9KnfrsCIGxJsKqBSbEIqTlGqxCsBJbmI p5nsovHCU0y7GztUpdRbcA8kwJfwYPp30ElLmPmIxwhPIIpVIN2Tc/p1KelgLotKEl8E=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/mm: update log-dirty bitmap when manipulating P2M Message-Id: Date: Thu, 11 Dec 2025 10:11:23 +0000 commit 98fccdf0ac7c1a909b54dd5beeba54a0a23f756c Author: Jan Beulich AuthorDate: Thu Dec 11 09:50:30 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 11 09:50:30 2025 +0100 x86/mm: update log-dirty bitmap when manipulating P2M Just like for PV guests MMU_MACHPHYS_UPDATE implies marking of the respective page as dirty, additions to a HVM guest's P2M should do so. For HVM the opposite is also true: Pages being removed from the P2M are no longer dirty at their prior GFN; there's no point in telling the tool stack to try and copy that page, when this will fail anyway (until perhaps a new page gets placed there). Introduce paging_mark_pfn_clean() (intentionally without a paging_mark_clean() counterpart) to handle this. Note that while there is an earlier call to set_gpfn_from_mfn() in guest_physmap_add_entry(), but there's little reason to mark the page clean there when later in the function it'll be marked dirty. This is even more so given that at this point it's only the M2P that gets updated, with the P2M still left unchanged. Signed-off-by: Jan Beulich Reviewed-by: Roger Pau Monné --- xen/arch/x86/include/asm/paging.h | 3 ++- xen/arch/x86/mm/p2m-pod.c | 3 +++ xen/arch/x86/mm/p2m.c | 8 ++++++++ xen/arch/x86/mm/paging.c | 34 +++++++++++++++++++++++----------- 4 files changed, 36 insertions(+), 12 deletions(-) diff --git a/xen/arch/x86/include/asm/paging.h b/xen/arch/x86/include/asm/paging.h index 0c06b0a7a8..72d7c077e4 100644 --- a/xen/arch/x86/include/asm/paging.h +++ b/xen/arch/x86/include/asm/paging.h @@ -153,8 +153,9 @@ void paging_log_dirty_init(struct domain *d, const struct log_dirty_ops *ops); /* mark a page as dirty */ void paging_mark_dirty(struct domain *d, mfn_t gmfn); -/* mark a page as dirty with taking guest pfn as parameter */ +/* mark a page as dirty/clean with taking guest pfn as parameter */ void paging_mark_pfn_dirty(struct domain *d, pfn_t pfn); +void paging_mark_pfn_clean(struct domain *d, pfn_t pfn); /* is this guest page dirty? * This is called from inside paging code, with the paging lock held. */ diff --git a/xen/arch/x86/mm/p2m-pod.c b/xen/arch/x86/mm/p2m-pod.c index 22dde913cc..7a0bebd2d3 100644 --- a/xen/arch/x86/mm/p2m-pod.c +++ b/xen/arch/x86/mm/p2m-pod.c @@ -655,7 +655,10 @@ decrease_reservation(struct domain *d, gfn_t gfn, unsigned int order) } p2m_tlb_flush_sync(p2m); for ( j = 0; j < n; ++j ) + { set_gpfn_from_mfn(mfn_x(mfn) + j, INVALID_M2P_ENTRY); + paging_mark_pfn_clean(d, _pfn(gfn_x(gfn) + i + j)); + } p2m_pod_cache_add(p2m, page, cur_order); ioreq_request_mapcache_invalidate(d); diff --git a/xen/arch/x86/mm/p2m.c b/xen/arch/x86/mm/p2m.c index e2a00a0efd..2433230ac7 100644 --- a/xen/arch/x86/mm/p2m.c +++ b/xen/arch/x86/mm/p2m.c @@ -562,7 +562,10 @@ p2m_remove_entry(struct p2m_domain *p2m, gfn_t gfn, mfn_t mfn, { p2m->get_entry(p2m, gfn_add(gfn, i), &t, &a, 0, NULL, NULL); if ( !p2m_is_special(t) && !p2m_is_shared(t) ) + { set_gpfn_from_mfn(mfn_x(mfn) + i, INVALID_M2P_ENTRY); + paging_mark_pfn_clean(p2m->domain, _pfn(gfn_x(gfn) + i)); + } } } @@ -753,8 +756,11 @@ p2m_add_page(struct domain *d, gfn_t gfn, mfn_t mfn, if ( !p2m_is_grant(t) ) { for ( i = 0; i < (1UL << page_order); i++ ) + { set_gpfn_from_mfn(mfn_x(mfn_add(mfn, i)), gfn_x(gfn_add(gfn, i))); + paging_mark_pfn_dirty(d, _pfn(gfn_x(gfn) + i)); + } } } else @@ -1121,6 +1127,7 @@ static int set_typed_p2m_entry(struct domain *d, unsigned long gfn_l, { ASSERT(mfn_valid(mfn_add(omfn, i))); set_gpfn_from_mfn(mfn_x(omfn) + i, INVALID_M2P_ENTRY); + paging_mark_pfn_clean(d, _pfn(gfn_x(gfn) + i)); ioreq_request_mapcache_invalidate(d); } @@ -1142,6 +1149,7 @@ static int set_typed_p2m_entry(struct domain *d, unsigned long gfn_l, { ASSERT(mfn_valid(mfn_add(omfn, i))); set_gpfn_from_mfn(mfn_x(omfn) + i, INVALID_M2P_ENTRY); + paging_mark_pfn_clean(d, _pfn(gfn_x(gfn) + i)); } ioreq_request_mapcache_invalidate(d); diff --git a/xen/arch/x86/mm/paging.c b/xen/arch/x86/mm/paging.c index 65455a6867..2396f81ad5 100644 --- a/xen/arch/x86/mm/paging.c +++ b/xen/arch/x86/mm/paging.c @@ -249,7 +249,7 @@ static int paging_log_dirty_disable(struct domain *d, bool resuming) } /* Mark a page as dirty, with taking guest pfn as parameter */ -void paging_mark_pfn_dirty(struct domain *d, pfn_t pfn) +static void set_pfn_logdirty(struct domain *d, pfn_t pfn, bool dirty) { bool changed; mfn_t mfn, *l4, *l3, *l2; @@ -260,7 +260,7 @@ void paging_mark_pfn_dirty(struct domain *d, pfn_t pfn) return; /* Shared MFNs should NEVER be marked dirty */ - BUG_ON(paging_mode_translate(d) && SHARED_M2P(pfn_x(pfn))); + BUG_ON(dirty && paging_mode_translate(d) && SHARED_M2P(pfn_x(pfn))); /* * Values with the MSB set denote MFNs that aren't really part of the @@ -281,14 +281,15 @@ void paging_mark_pfn_dirty(struct domain *d, pfn_t pfn) if ( unlikely(mfn_eq(d->arch.paging.log_dirty.top, INVALID_MFN)) ) { - d->arch.paging.log_dirty.top = paging_new_log_dirty_node(d); + if ( dirty ) + d->arch.paging.log_dirty.top = paging_new_log_dirty_node(d); if ( unlikely(mfn_eq(d->arch.paging.log_dirty.top, INVALID_MFN)) ) goto out; } l4 = paging_map_log_dirty_bitmap(d); mfn = l4[i4]; - if ( mfn_eq(mfn, INVALID_MFN) ) + if ( mfn_eq(mfn, INVALID_MFN) && dirty ) l4[i4] = mfn = paging_new_log_dirty_node(d); unmap_domain_page(l4); if ( mfn_eq(mfn, INVALID_MFN) ) @@ -296,7 +297,7 @@ void paging_mark_pfn_dirty(struct domain *d, pfn_t pfn) l3 = map_domain_page(mfn); mfn = l3[i3]; - if ( mfn_eq(mfn, INVALID_MFN) ) + if ( mfn_eq(mfn, INVALID_MFN) && dirty ) l3[i3] = mfn = paging_new_log_dirty_node(d); unmap_domain_page(l3); if ( mfn_eq(mfn, INVALID_MFN) ) @@ -304,21 +305,22 @@ void paging_mark_pfn_dirty(struct domain *d, pfn_t pfn) l2 = map_domain_page(mfn); mfn = l2[i2]; - if ( mfn_eq(mfn, INVALID_MFN) ) + if ( mfn_eq(mfn, INVALID_MFN) && dirty ) l2[i2] = mfn = paging_new_log_dirty_leaf(d); unmap_domain_page(l2); if ( mfn_eq(mfn, INVALID_MFN) ) goto out; l1 = map_domain_page(mfn); - changed = !__test_and_set_bit(i1, l1); + changed = dirty ? !__test_and_set_bit(i1, l1) + : __test_and_clear_bit(i1, l1); unmap_domain_page(l1); if ( changed ) { PAGING_DEBUG(LOGDIRTY, - "d%d: marked mfn %" PRI_mfn " (pfn %" PRI_pfn ")\n", - d->domain_id, mfn_x(mfn), pfn_x(pfn)); - d->arch.paging.log_dirty.dirty_count++; + "%pd: marked mfn %" PRI_mfn " (pfn %" PRI_pfn ") %s\n", + d, mfn_x(mfn), pfn_x(pfn), dirty ? "dirty" : "clean"); + d->arch.paging.log_dirty.dirty_count += dirty ? 1 : -1; } out: @@ -327,6 +329,16 @@ out: return; } +void paging_mark_pfn_dirty(struct domain *d, pfn_t pfn) +{ + set_pfn_logdirty(d, pfn, true); +} + +void paging_mark_pfn_clean(struct domain *d, pfn_t pfn) +{ + set_pfn_logdirty(d, pfn, false); +} + /* Mark a page as dirty */ void paging_mark_dirty(struct domain *d, mfn_t gmfn) { @@ -339,7 +351,7 @@ void paging_mark_dirty(struct domain *d, mfn_t gmfn) /* We /really/ mean PFN here, even for non-translated guests. */ pfn = _pfn(get_gpfn_from_mfn(mfn_x(gmfn))); - paging_mark_pfn_dirty(d, pfn); + set_pfn_logdirty(d, pfn, true); } #ifdef CONFIG_SHADOW_PAGING -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Thu Dec 11 11:11:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 11 Dec 2025 11:11:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1183891.1506468 (Exim 4.92) (envelope-from ) id 1vTeZb-0001ug-AJ; Thu, 11 Dec 2025 11:11:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1183891.1506468; Thu, 11 Dec 2025 11:11:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTeZb-0001uZ-7b; Thu, 11 Dec 2025 11:11:03 +0000 Received: by outflank-mailman (input) for mailman id 1183891; Thu, 11 Dec 2025 11:11:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTeZZ-0001uT-Pc for xen-changelog@lists.xenproject.org; Thu, 11 Dec 2025 11:11:01 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTeZZ-004mX3-1S for xen-changelog@lists.xenproject.org; Thu, 11 Dec 2025 11:11:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTeZZ-00EUV0-2D for xen-changelog@lists.xenproject.org; Thu, 11 Dec 2025 11:11:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=bNTzjFp8KTKncBqitwp3sURzqMgop6/fp3fmGDfcYuw=; b=uZapFu51Bm9AtIUtF4b/e7bu2I oM4fDByYgvLKjTCdo4QUyzTdXoiPwd+nhrKZDJ3nUt5Rdmv989ODLoyjuy7GZb6t0VNabocXBdvyR rjCk6J4oZn7Bk0tBNWv3ect9Ih/sOFlBR6l3WAhNtMldcNVWoEnAQ0Z9kKwFaUqvS7XA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen: Centralize scheduler linker definition Message-Id: Date: Thu, 11 Dec 2025 11:11:01 +0000 commit bd25f1504b32d1468ae05674f82bb1033e2249a5 Author: Jason Andryuk AuthorDate: Thu Dec 11 09:49:35 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 11 09:49:35 2025 +0100 xen: Centralize scheduler linker definition Use a define to centralize the common scheduler data in the per-arch linker scripts. This is in preparation for marking it KEEP(). While moving, switch to using POINTER_ALIGN. Signed-off-by: Jason Andryuk Reviewed-by: Jan Beulich Reviewed-by: Andrew Cooper --- xen/arch/arm/xen.lds.S | 5 +---- xen/arch/ppc/xen.lds.S | 5 +---- xen/arch/riscv/xen.lds.S | 5 +---- xen/arch/x86/xen.lds.S | 5 +---- xen/include/xen/xen.lds.h | 6 ++++++ 5 files changed, 10 insertions(+), 16 deletions(-) diff --git a/xen/arch/arm/xen.lds.S b/xen/arch/arm/xen.lds.S index db17ff1efa..2d5f1c516d 100644 --- a/xen/arch/arm/xen.lds.S +++ b/xen/arch/arm/xen.lds.S @@ -92,11 +92,8 @@ SECTIONS . = ALIGN(SMP_CACHE_BYTES); .data : { /* Data */ *(.data.page_aligned) - . = ALIGN(8); - __start_schedulers_array = .; - *(.data.schedulers) - __end_schedulers_array = .; + SCHEDULER_ARRAY HYPFS_PARAM *(.data .data.*) diff --git a/xen/arch/ppc/xen.lds.S b/xen/arch/ppc/xen.lds.S index 1de0b77fc6..d0f2ed43f1 100644 --- a/xen/arch/ppc/xen.lds.S +++ b/xen/arch/ppc/xen.lds.S @@ -83,11 +83,8 @@ SECTIONS . = ALIGN(PAGE_SIZE); DECL_SECTION(.data) { /* Data */ *(.data.page_aligned) - . = ALIGN(8); - __start_schedulers_array = .; - *(.data.schedulers) - __end_schedulers_array = .; + SCHEDULER_ARRAY HYPFS_PARAM *(.data .data.*) diff --git a/xen/arch/riscv/xen.lds.S b/xen/arch/riscv/xen.lds.S index edcadff90b..45d2e053d0 100644 --- a/xen/arch/riscv/xen.lds.S +++ b/xen/arch/riscv/xen.lds.S @@ -78,11 +78,8 @@ SECTIONS . = ALIGN(PAGE_SIZE); .data : { /* Data */ *(.data.page_aligned) - . = ALIGN(8); - __start_schedulers_array = .; - *(.data.schedulers) - __end_schedulers_array = .; + SCHEDULER_ARRAY HYPFS_PARAM *(.data .data.*) diff --git a/xen/arch/x86/xen.lds.S b/xen/arch/x86/xen.lds.S index 1ee08a3ea3..2aa41306ca 100644 --- a/xen/arch/x86/xen.lds.S +++ b/xen/arch/x86/xen.lds.S @@ -309,11 +309,8 @@ SECTIONS . = ALIGN(SMP_CACHE_BYTES); DECL_SECTION(.data.read_mostly) { *(.data.read_mostly) - . = ALIGN(8); - __start_schedulers_array = .; - *(.data.schedulers) - __end_schedulers_array = .; + SCHEDULER_ARRAY HYPFS_PARAM } PHDR(text) diff --git a/xen/include/xen/xen.lds.h b/xen/include/xen/xen.lds.h index f54fb2d152..136849ecd5 100644 --- a/xen/include/xen/xen.lds.h +++ b/xen/include/xen/xen.lds.h @@ -173,6 +173,12 @@ _edevice = .; \ } :text +#define SCHEDULER_ARRAY \ + . = ALIGN(POINTER_ALIGN); \ + __start_schedulers_array = .; \ + *(.data.schedulers) \ + __end_schedulers_array = .; + #ifdef CONFIG_HYPFS #define HYPFS_PARAM \ . = ALIGN(POINTER_ALIGN); \ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Dec 11 11:11:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 11 Dec 2025 11:11:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1183892.1506473 (Exim 4.92) (envelope-from ) id 1vTeZl-0001we-Bt; Thu, 11 Dec 2025 11:11:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1183892.1506473; Thu, 11 Dec 2025 11:11:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTeZl-0001wS-99; Thu, 11 Dec 2025 11:11:13 +0000 Received: by outflank-mailman (input) for mailman id 1183892; Thu, 11 Dec 2025 11:11:11 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTeZj-0001wH-Ta for xen-changelog@lists.xenproject.org; Thu, 11 Dec 2025 11:11:11 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTeZj-004mX7-1t for xen-changelog@lists.xenproject.org; Thu, 11 Dec 2025 11:11:11 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTeZj-00EVoG-2a for xen-changelog@lists.xenproject.org; Thu, 11 Dec 2025 11:11:11 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=YJ3PznqLfkfI0ab9lribKaNHhk/x3YXIEZPEXvuqGys=; b=6Qodyk3C50yfEXnQhoSV6y/hvI Z+LyPXq6rU8XaM/De6XDrwnhA2mBPCxa+fxy6Trgd7JIZL1Yc5w+cz1kVafE5syIfxU3W1B08XpBZ DULUN9ESXZBA+y0n6UgXynGBgcKNh8dx+bqNCtcGv6j2CN8xbn0OOK41vaIu/6FxuUWg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/pod: fix decrease_reservation() clearing of M2P entries Message-Id: Date: Thu, 11 Dec 2025 11:11:11 +0000 commit 8e4d495cb8f70280482edae12b48f422b5715099 Author: Roger Pau Monné AuthorDate: Thu Dec 11 09:50:10 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 11 09:50:10 2025 +0100 x86/pod: fix decrease_reservation() clearing of M2P entries Add the missing index increase in the M2P clearing loop, otherwise the loop keeps pointlessly setting the same MFN entry repeatedly. This seems to be an oversight from the change that introduced support to process high order pages in one go. Fixes: 3c352011c0d3 ("x86/PoD: shorten certain operations on higher order ranges") Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich --- xen/arch/x86/mm/p2m-pod.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/mm/p2m-pod.c b/xen/arch/x86/mm/p2m-pod.c index 05633fe2ac..22dde913cc 100644 --- a/xen/arch/x86/mm/p2m-pod.c +++ b/xen/arch/x86/mm/p2m-pod.c @@ -655,7 +655,7 @@ decrease_reservation(struct domain *d, gfn_t gfn, unsigned int order) } p2m_tlb_flush_sync(p2m); for ( j = 0; j < n; ++j ) - set_gpfn_from_mfn(mfn_x(mfn), INVALID_M2P_ENTRY); + set_gpfn_from_mfn(mfn_x(mfn) + j, INVALID_M2P_ENTRY); p2m_pod_cache_add(p2m, page, cur_order); ioreq_request_mapcache_invalidate(d); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Dec 11 11:11:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 11 Dec 2025 11:11:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1183893.1506476 (Exim 4.92) (envelope-from ) id 1vTeZv-0001z0-Dg; Thu, 11 Dec 2025 11:11:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1183893.1506476; Thu, 11 Dec 2025 11:11:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTeZv-0001ys-AT; Thu, 11 Dec 2025 11:11:23 +0000 Received: by outflank-mailman (input) for mailman id 1183893; Thu, 11 Dec 2025 11:11:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTeZu-0001yd-2u for xen-changelog@lists.xenproject.org; Thu, 11 Dec 2025 11:11:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTeZt-004mXB-2S for xen-changelog@lists.xenproject.org; Thu, 11 Dec 2025 11:11:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTeZt-00EWy4-33 for xen-changelog@lists.xenproject.org; Thu, 11 Dec 2025 11:11:21 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=FhQ5Fahm9VkMrQEEplH8U9z4EsNwwsiTgrzfovA/ctU=; b=Clkvcv+05KYLrY2X5rn43rlSHA QZb8pIX/bLdvIZ8ArjAAB10M2PGlhGftUjmZtLFZm824Mp7uYzoKS+6ywFSLVdoT2ZeRPnLloGiY3 SIspoYZCynm8ZAaqxfXkkerBJvcczBhgTq62PBSDI5T4EAJeGpv/VxZ9+O/RL6Jnwjvo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/mm: update log-dirty bitmap when manipulating P2M Message-Id: Date: Thu, 11 Dec 2025 11:11:21 +0000 commit 98fccdf0ac7c1a909b54dd5beeba54a0a23f756c Author: Jan Beulich AuthorDate: Thu Dec 11 09:50:30 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 11 09:50:30 2025 +0100 x86/mm: update log-dirty bitmap when manipulating P2M Just like for PV guests MMU_MACHPHYS_UPDATE implies marking of the respective page as dirty, additions to a HVM guest's P2M should do so. For HVM the opposite is also true: Pages being removed from the P2M are no longer dirty at their prior GFN; there's no point in telling the tool stack to try and copy that page, when this will fail anyway (until perhaps a new page gets placed there). Introduce paging_mark_pfn_clean() (intentionally without a paging_mark_clean() counterpart) to handle this. Note that while there is an earlier call to set_gpfn_from_mfn() in guest_physmap_add_entry(), but there's little reason to mark the page clean there when later in the function it'll be marked dirty. This is even more so given that at this point it's only the M2P that gets updated, with the P2M still left unchanged. Signed-off-by: Jan Beulich Reviewed-by: Roger Pau Monné --- xen/arch/x86/include/asm/paging.h | 3 ++- xen/arch/x86/mm/p2m-pod.c | 3 +++ xen/arch/x86/mm/p2m.c | 8 ++++++++ xen/arch/x86/mm/paging.c | 34 +++++++++++++++++++++++----------- 4 files changed, 36 insertions(+), 12 deletions(-) diff --git a/xen/arch/x86/include/asm/paging.h b/xen/arch/x86/include/asm/paging.h index 0c06b0a7a8..72d7c077e4 100644 --- a/xen/arch/x86/include/asm/paging.h +++ b/xen/arch/x86/include/asm/paging.h @@ -153,8 +153,9 @@ void paging_log_dirty_init(struct domain *d, const struct log_dirty_ops *ops); /* mark a page as dirty */ void paging_mark_dirty(struct domain *d, mfn_t gmfn); -/* mark a page as dirty with taking guest pfn as parameter */ +/* mark a page as dirty/clean with taking guest pfn as parameter */ void paging_mark_pfn_dirty(struct domain *d, pfn_t pfn); +void paging_mark_pfn_clean(struct domain *d, pfn_t pfn); /* is this guest page dirty? * This is called from inside paging code, with the paging lock held. */ diff --git a/xen/arch/x86/mm/p2m-pod.c b/xen/arch/x86/mm/p2m-pod.c index 22dde913cc..7a0bebd2d3 100644 --- a/xen/arch/x86/mm/p2m-pod.c +++ b/xen/arch/x86/mm/p2m-pod.c @@ -655,7 +655,10 @@ decrease_reservation(struct domain *d, gfn_t gfn, unsigned int order) } p2m_tlb_flush_sync(p2m); for ( j = 0; j < n; ++j ) + { set_gpfn_from_mfn(mfn_x(mfn) + j, INVALID_M2P_ENTRY); + paging_mark_pfn_clean(d, _pfn(gfn_x(gfn) + i + j)); + } p2m_pod_cache_add(p2m, page, cur_order); ioreq_request_mapcache_invalidate(d); diff --git a/xen/arch/x86/mm/p2m.c b/xen/arch/x86/mm/p2m.c index e2a00a0efd..2433230ac7 100644 --- a/xen/arch/x86/mm/p2m.c +++ b/xen/arch/x86/mm/p2m.c @@ -562,7 +562,10 @@ p2m_remove_entry(struct p2m_domain *p2m, gfn_t gfn, mfn_t mfn, { p2m->get_entry(p2m, gfn_add(gfn, i), &t, &a, 0, NULL, NULL); if ( !p2m_is_special(t) && !p2m_is_shared(t) ) + { set_gpfn_from_mfn(mfn_x(mfn) + i, INVALID_M2P_ENTRY); + paging_mark_pfn_clean(p2m->domain, _pfn(gfn_x(gfn) + i)); + } } } @@ -753,8 +756,11 @@ p2m_add_page(struct domain *d, gfn_t gfn, mfn_t mfn, if ( !p2m_is_grant(t) ) { for ( i = 0; i < (1UL << page_order); i++ ) + { set_gpfn_from_mfn(mfn_x(mfn_add(mfn, i)), gfn_x(gfn_add(gfn, i))); + paging_mark_pfn_dirty(d, _pfn(gfn_x(gfn) + i)); + } } } else @@ -1121,6 +1127,7 @@ static int set_typed_p2m_entry(struct domain *d, unsigned long gfn_l, { ASSERT(mfn_valid(mfn_add(omfn, i))); set_gpfn_from_mfn(mfn_x(omfn) + i, INVALID_M2P_ENTRY); + paging_mark_pfn_clean(d, _pfn(gfn_x(gfn) + i)); ioreq_request_mapcache_invalidate(d); } @@ -1142,6 +1149,7 @@ static int set_typed_p2m_entry(struct domain *d, unsigned long gfn_l, { ASSERT(mfn_valid(mfn_add(omfn, i))); set_gpfn_from_mfn(mfn_x(omfn) + i, INVALID_M2P_ENTRY); + paging_mark_pfn_clean(d, _pfn(gfn_x(gfn) + i)); } ioreq_request_mapcache_invalidate(d); diff --git a/xen/arch/x86/mm/paging.c b/xen/arch/x86/mm/paging.c index 65455a6867..2396f81ad5 100644 --- a/xen/arch/x86/mm/paging.c +++ b/xen/arch/x86/mm/paging.c @@ -249,7 +249,7 @@ static int paging_log_dirty_disable(struct domain *d, bool resuming) } /* Mark a page as dirty, with taking guest pfn as parameter */ -void paging_mark_pfn_dirty(struct domain *d, pfn_t pfn) +static void set_pfn_logdirty(struct domain *d, pfn_t pfn, bool dirty) { bool changed; mfn_t mfn, *l4, *l3, *l2; @@ -260,7 +260,7 @@ void paging_mark_pfn_dirty(struct domain *d, pfn_t pfn) return; /* Shared MFNs should NEVER be marked dirty */ - BUG_ON(paging_mode_translate(d) && SHARED_M2P(pfn_x(pfn))); + BUG_ON(dirty && paging_mode_translate(d) && SHARED_M2P(pfn_x(pfn))); /* * Values with the MSB set denote MFNs that aren't really part of the @@ -281,14 +281,15 @@ void paging_mark_pfn_dirty(struct domain *d, pfn_t pfn) if ( unlikely(mfn_eq(d->arch.paging.log_dirty.top, INVALID_MFN)) ) { - d->arch.paging.log_dirty.top = paging_new_log_dirty_node(d); + if ( dirty ) + d->arch.paging.log_dirty.top = paging_new_log_dirty_node(d); if ( unlikely(mfn_eq(d->arch.paging.log_dirty.top, INVALID_MFN)) ) goto out; } l4 = paging_map_log_dirty_bitmap(d); mfn = l4[i4]; - if ( mfn_eq(mfn, INVALID_MFN) ) + if ( mfn_eq(mfn, INVALID_MFN) && dirty ) l4[i4] = mfn = paging_new_log_dirty_node(d); unmap_domain_page(l4); if ( mfn_eq(mfn, INVALID_MFN) ) @@ -296,7 +297,7 @@ void paging_mark_pfn_dirty(struct domain *d, pfn_t pfn) l3 = map_domain_page(mfn); mfn = l3[i3]; - if ( mfn_eq(mfn, INVALID_MFN) ) + if ( mfn_eq(mfn, INVALID_MFN) && dirty ) l3[i3] = mfn = paging_new_log_dirty_node(d); unmap_domain_page(l3); if ( mfn_eq(mfn, INVALID_MFN) ) @@ -304,21 +305,22 @@ void paging_mark_pfn_dirty(struct domain *d, pfn_t pfn) l2 = map_domain_page(mfn); mfn = l2[i2]; - if ( mfn_eq(mfn, INVALID_MFN) ) + if ( mfn_eq(mfn, INVALID_MFN) && dirty ) l2[i2] = mfn = paging_new_log_dirty_leaf(d); unmap_domain_page(l2); if ( mfn_eq(mfn, INVALID_MFN) ) goto out; l1 = map_domain_page(mfn); - changed = !__test_and_set_bit(i1, l1); + changed = dirty ? !__test_and_set_bit(i1, l1) + : __test_and_clear_bit(i1, l1); unmap_domain_page(l1); if ( changed ) { PAGING_DEBUG(LOGDIRTY, - "d%d: marked mfn %" PRI_mfn " (pfn %" PRI_pfn ")\n", - d->domain_id, mfn_x(mfn), pfn_x(pfn)); - d->arch.paging.log_dirty.dirty_count++; + "%pd: marked mfn %" PRI_mfn " (pfn %" PRI_pfn ") %s\n", + d, mfn_x(mfn), pfn_x(pfn), dirty ? "dirty" : "clean"); + d->arch.paging.log_dirty.dirty_count += dirty ? 1 : -1; } out: @@ -327,6 +329,16 @@ out: return; } +void paging_mark_pfn_dirty(struct domain *d, pfn_t pfn) +{ + set_pfn_logdirty(d, pfn, true); +} + +void paging_mark_pfn_clean(struct domain *d, pfn_t pfn) +{ + set_pfn_logdirty(d, pfn, false); +} + /* Mark a page as dirty */ void paging_mark_dirty(struct domain *d, mfn_t gmfn) { @@ -339,7 +351,7 @@ void paging_mark_dirty(struct domain *d, mfn_t gmfn) /* We /really/ mean PFN here, even for non-translated guests. */ pfn = _pfn(get_gpfn_from_mfn(mfn_x(gmfn))); - paging_mark_pfn_dirty(d, pfn); + set_pfn_logdirty(d, pfn, true); } #ifdef CONFIG_SHADOW_PAGING -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Dec 11 15:22:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 11 Dec 2025 15:22:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1184250.1506740 (Exim 4.92) (envelope-from ) id 1vTiUU-00076u-Gi; Thu, 11 Dec 2025 15:22:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1184250.1506740; Thu, 11 Dec 2025 15:22:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTiUU-00076m-EB; Thu, 11 Dec 2025 15:22:02 +0000 Received: by outflank-mailman (input) for mailman id 1184250; Thu, 11 Dec 2025 15:22:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTiUT-00076g-Ie for xen-changelog@lists.xenproject.org; Thu, 11 Dec 2025 15:22:01 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTiUT-004rTM-0g for xen-changelog@lists.xenproject.org; Thu, 11 Dec 2025 15:22:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTiUT-005hiN-1S for xen-changelog@lists.xenproject.org; Thu, 11 Dec 2025 15:22:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ojrkgLXEuBjtGwMw58wauIQR4sFTI/OJEoYloTBd65I=; b=CylJSSH8AO5WJaBNrD5SNbv1UL s8dUirdRbNlRFr/M5wUSoM5he9LU1Wp3WcHpashglh0Lxs7pb2QfxtKtYF7ag7KNqTVgzVUJbp+mk IA+kxbnGMvxK/v9yW3uLbpf2HrfcVZoq5mb8aBKsNp74OeVuMEWzZppTixTsS1UIcvoY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] automation/eclair: Run *-testing jobs only in some branches Message-Id: Date: Thu, 11 Dec 2025 15:22:01 +0000 commit abac3b76d20ebecb339cb41bb8982796bf1ce276 Author: Nicola Vetrini AuthorDate: Thu Dec 11 14:34:54 2025 +0100 Commit: Andrew Cooper CommitDate: Thu Dec 11 15:19:22 2025 +0000 automation/eclair: Run *-testing jobs only in some branches These jobs should not run in regular scans, but only in xen-project/people repositories and branches to speed up pipeline execution. Signed-off-by: Nicola Vetrini Reviewed-by: Andrew Cooper --- automation/gitlab-ci/analyze.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/automation/gitlab-ci/analyze.yaml b/automation/gitlab-ci/analyze.yaml index d22d1dbbc3..20cabbe5f7 100644 --- a/automation/gitlab-ci/analyze.yaml +++ b/automation/gitlab-ci/analyze.yaml @@ -52,6 +52,8 @@ eclair-x86_64-testing: tags: - eclair-analysis-testing rules: + - if: $CI_PROJECT_PATH !~ /^xen-project\/people\/.*$/ + when: never - if: $ECLAIR_TESTING when: always - !reference [.eclair-analysis:triggered, rules] @@ -110,6 +112,8 @@ eclair-ARM64-testing: tags: - eclair-analysis-testing rules: + - if: $CI_PROJECT_PATH !~ /^xen-project\/people\/.*$/ + when: never - if: $ECLAIR_TESTING when: always - !reference [.eclair-analysis:triggered, rules] -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 03:11:12 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 03:11:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1184861.1507125 (Exim 4.92) (envelope-from ) id 1vTtYe-0000XR-8Q; Fri, 12 Dec 2025 03:11:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1184861.1507125; Fri, 12 Dec 2025 03:11:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTtYe-0000XK-4h; Fri, 12 Dec 2025 03:11:04 +0000 Received: by outflank-mailman (input) for mailman id 1184861; Fri, 12 Dec 2025 03:11:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTtYc-0000XE-BC for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:11:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTtYb-006CfT-36 for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:11:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTtYc-00Ct7X-0c for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:11:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Jm2vFYUgJd+562ycgf/kgWAQXx9JOaw15yJXLlQxNns=; b=HHch1L6K/RNaslyQsj/2LCGXCW 1vUimVWaMXH3PZKBGXzjKFsKT9h4n8AHIsuOgkOD4p48JYBaw3bJ5FxOrjjLeIOkGxbNMDb8VySsw pov2RUlZD9p1j1lfOFViZB6SPn3o1qo7/+mgfD54CqtF8nz0hRjCfFYPjfumfKfPVKvA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/svm: Make vmcb_struct private to svm/ Message-Id: Date: Fri, 12 Dec 2025 03:11:02 +0000 commit f09b87a0ea5e47d53ae796c32c99e3d7a21818bd Author: Andrew Cooper AuthorDate: Fri Aug 29 12:23:41 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 12 03:04:48 2025 +0000 x86/svm: Make vmcb_struct private to svm/ The rest of Xen has no buisness knowing this structure, and it is currently included via xen/sched.h into most code. Create a new private svm/vmcb.h. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Alejandro Vallejo Acked-by: Jan Beulich --- xen/arch/x86/hvm/svm/asid.c | 1 + xen/arch/x86/hvm/svm/emulate.c | 1 + xen/arch/x86/hvm/svm/intr.c | 1 + xen/arch/x86/hvm/svm/nestedsvm.c | 1 + xen/arch/x86/hvm/svm/svm.c | 1 + xen/arch/x86/hvm/svm/svmdebug.c | 2 + xen/arch/x86/hvm/svm/vmcb.c | 2 + xen/arch/x86/hvm/svm/vmcb.h | 617 ++++++++++++++++++++++++++++++++ xen/arch/x86/include/asm/hvm/svm/vmcb.h | 606 ------------------------------- 9 files changed, 626 insertions(+), 606 deletions(-) diff --git a/xen/arch/x86/hvm/svm/asid.c b/xen/arch/x86/hvm/svm/asid.c index 03f98b7a8b..0e115243a3 100644 --- a/xen/arch/x86/hvm/svm/asid.c +++ b/xen/arch/x86/hvm/svm/asid.c @@ -9,6 +9,7 @@ #include #include "svm.h" +#include "vmcb.h" void svm_asid_init(const struct cpuinfo_x86 *c) { diff --git a/xen/arch/x86/hvm/svm/emulate.c b/xen/arch/x86/hvm/svm/emulate.c index 93ac1d3435..d8aa455908 100644 --- a/xen/arch/x86/hvm/svm/emulate.c +++ b/xen/arch/x86/hvm/svm/emulate.c @@ -15,6 +15,7 @@ #include #include "svm.h" +#include "vmcb.h" static unsigned long svm_nextrip_insn_length(struct vcpu *v) { diff --git a/xen/arch/x86/hvm/svm/intr.c b/xen/arch/x86/hvm/svm/intr.c index 46186a1102..931973a9fa 100644 --- a/xen/arch/x86/hvm/svm/intr.c +++ b/xen/arch/x86/hvm/svm/intr.c @@ -26,6 +26,7 @@ #include #include "nestedhvm.h" +#include "vmcb.h" static void svm_inject_nmi(struct vcpu *v) { diff --git a/xen/arch/x86/hvm/svm/nestedsvm.c b/xen/arch/x86/hvm/svm/nestedsvm.c index 1813692ffb..1914667551 100644 --- a/xen/arch/x86/hvm/svm/nestedsvm.c +++ b/xen/arch/x86/hvm/svm/nestedsvm.c @@ -16,6 +16,7 @@ #include "nestedhvm.h" #include "svm.h" +#include "vmcb.h" #define NSVM_ERROR_VVMCB 1 #define NSVM_ERROR_VMENTRY 2 diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 2d7c598ffe..14b3a427e6 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -44,6 +44,7 @@ #include "nestedhvm.h" #include "svm.h" +#include "vmcb.h" void noreturn svm_asm_do_resume(void); diff --git a/xen/arch/x86/hvm/svm/svmdebug.c b/xen/arch/x86/hvm/svm/svmdebug.c index 9d3badcf5d..bdb9ea3583 100644 --- a/xen/arch/x86/hvm/svm/svmdebug.c +++ b/xen/arch/x86/hvm/svm/svmdebug.c @@ -10,6 +10,8 @@ #include #include +#include "vmcb.h" + static void svm_dump_sel(const char *name, const struct segment_register *s) { printk("%s: %04x %04x %08x %016"PRIx64"\n", diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c index c57d314a24..44fa76bf02 100644 --- a/xen/arch/x86/hvm/svm/vmcb.c +++ b/xen/arch/x86/hvm/svm/vmcb.c @@ -22,6 +22,8 @@ #include #include +#include "vmcb.h" + struct vmcb_struct *alloc_vmcb(void) { struct vmcb_struct *vmcb; diff --git a/xen/arch/x86/hvm/svm/vmcb.h b/xen/arch/x86/hvm/svm/vmcb.h new file mode 100644 index 0000000000..68012948a9 --- /dev/null +++ b/xen/arch/x86/hvm/svm/vmcb.h @@ -0,0 +1,617 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef SVM_PRIVATE_VMCB_H +#define SVM_PRIVATE_VMCB_H + +#include + +#include + +struct vcpu; + +/* general 1 intercepts */ +enum GenericIntercept1bits +{ + GENERAL1_INTERCEPT_INTR = 1 << 0, + GENERAL1_INTERCEPT_NMI = 1 << 1, + GENERAL1_INTERCEPT_SMI = 1 << 2, + GENERAL1_INTERCEPT_INIT = 1 << 3, + GENERAL1_INTERCEPT_VINTR = 1 << 4, + GENERAL1_INTERCEPT_CR0_SEL_WRITE = 1 << 5, + GENERAL1_INTERCEPT_IDTR_READ = 1 << 6, + GENERAL1_INTERCEPT_GDTR_READ = 1 << 7, + GENERAL1_INTERCEPT_LDTR_READ = 1 << 8, + GENERAL1_INTERCEPT_TR_READ = 1 << 9, + GENERAL1_INTERCEPT_IDTR_WRITE = 1 << 10, + GENERAL1_INTERCEPT_GDTR_WRITE = 1 << 11, + GENERAL1_INTERCEPT_LDTR_WRITE = 1 << 12, + GENERAL1_INTERCEPT_TR_WRITE = 1 << 13, + GENERAL1_INTERCEPT_RDTSC = 1 << 14, + GENERAL1_INTERCEPT_RDPMC = 1 << 15, + GENERAL1_INTERCEPT_PUSHF = 1 << 16, + GENERAL1_INTERCEPT_POPF = 1 << 17, + GENERAL1_INTERCEPT_CPUID = 1 << 18, + GENERAL1_INTERCEPT_RSM = 1 << 19, + GENERAL1_INTERCEPT_IRET = 1 << 20, + GENERAL1_INTERCEPT_SWINT = 1 << 21, + GENERAL1_INTERCEPT_INVD = 1 << 22, + GENERAL1_INTERCEPT_PAUSE = 1 << 23, + GENERAL1_INTERCEPT_HLT = 1 << 24, + GENERAL1_INTERCEPT_INVLPG = 1 << 25, + GENERAL1_INTERCEPT_INVLPGA = 1 << 26, + GENERAL1_INTERCEPT_IOIO_PROT = 1 << 27, + GENERAL1_INTERCEPT_MSR_PROT = 1 << 28, + GENERAL1_INTERCEPT_TASK_SWITCH = 1 << 29, + GENERAL1_INTERCEPT_FERR_FREEZE = 1 << 30, + GENERAL1_INTERCEPT_SHUTDOWN_EVT = 1u << 31 +}; + +/* general 2 intercepts */ +enum GenericIntercept2bits +{ + GENERAL2_INTERCEPT_VMRUN = 1 << 0, + GENERAL2_INTERCEPT_VMMCALL = 1 << 1, + GENERAL2_INTERCEPT_VMLOAD = 1 << 2, + GENERAL2_INTERCEPT_VMSAVE = 1 << 3, + GENERAL2_INTERCEPT_STGI = 1 << 4, + GENERAL2_INTERCEPT_CLGI = 1 << 5, + GENERAL2_INTERCEPT_SKINIT = 1 << 6, + GENERAL2_INTERCEPT_RDTSCP = 1 << 7, + GENERAL2_INTERCEPT_ICEBP = 1 << 8, + GENERAL2_INTERCEPT_WBINVD = 1 << 9, + GENERAL2_INTERCEPT_MONITOR = 1 << 10, + GENERAL2_INTERCEPT_MWAIT = 1 << 11, + GENERAL2_INTERCEPT_MWAIT_CONDITIONAL = 1 << 12, + GENERAL2_INTERCEPT_XSETBV = 1 << 13, + GENERAL2_INTERCEPT_RDPRU = 1 << 14, +}; + + +/* control register intercepts */ +enum CRInterceptBits +{ + CR_INTERCEPT_CR0_READ = 1 << 0, + CR_INTERCEPT_CR1_READ = 1 << 1, + CR_INTERCEPT_CR2_READ = 1 << 2, + CR_INTERCEPT_CR3_READ = 1 << 3, + CR_INTERCEPT_CR4_READ = 1 << 4, + CR_INTERCEPT_CR5_READ = 1 << 5, + CR_INTERCEPT_CR6_READ = 1 << 6, + CR_INTERCEPT_CR7_READ = 1 << 7, + CR_INTERCEPT_CR8_READ = 1 << 8, + CR_INTERCEPT_CR9_READ = 1 << 9, + CR_INTERCEPT_CR10_READ = 1 << 10, + CR_INTERCEPT_CR11_READ = 1 << 11, + CR_INTERCEPT_CR12_READ = 1 << 12, + CR_INTERCEPT_CR13_READ = 1 << 13, + CR_INTERCEPT_CR14_READ = 1 << 14, + CR_INTERCEPT_CR15_READ = 1 << 15, + CR_INTERCEPT_CR0_WRITE = 1 << 16, + CR_INTERCEPT_CR1_WRITE = 1 << 17, + CR_INTERCEPT_CR2_WRITE = 1 << 18, + CR_INTERCEPT_CR3_WRITE = 1 << 19, + CR_INTERCEPT_CR4_WRITE = 1 << 20, + CR_INTERCEPT_CR5_WRITE = 1 << 21, + CR_INTERCEPT_CR6_WRITE = 1 << 22, + CR_INTERCEPT_CR7_WRITE = 1 << 23, + CR_INTERCEPT_CR8_WRITE = 1 << 24, + CR_INTERCEPT_CR9_WRITE = 1 << 25, + CR_INTERCEPT_CR10_WRITE = 1 << 26, + CR_INTERCEPT_CR11_WRITE = 1 << 27, + CR_INTERCEPT_CR12_WRITE = 1 << 28, + CR_INTERCEPT_CR13_WRITE = 1 << 29, + CR_INTERCEPT_CR14_WRITE = 1 << 30, + CR_INTERCEPT_CR15_WRITE = 1u << 31, +}; + + +/* debug register intercepts */ +enum DRInterceptBits +{ + DR_INTERCEPT_DR0_READ = 1 << 0, + DR_INTERCEPT_DR1_READ = 1 << 1, + DR_INTERCEPT_DR2_READ = 1 << 2, + DR_INTERCEPT_DR3_READ = 1 << 3, + DR_INTERCEPT_DR4_READ = 1 << 4, + DR_INTERCEPT_DR5_READ = 1 << 5, + DR_INTERCEPT_DR6_READ = 1 << 6, + DR_INTERCEPT_DR7_READ = 1 << 7, + DR_INTERCEPT_DR8_READ = 1 << 8, + DR_INTERCEPT_DR9_READ = 1 << 9, + DR_INTERCEPT_DR10_READ = 1 << 10, + DR_INTERCEPT_DR11_READ = 1 << 11, + DR_INTERCEPT_DR12_READ = 1 << 12, + DR_INTERCEPT_DR13_READ = 1 << 13, + DR_INTERCEPT_DR14_READ = 1 << 14, + DR_INTERCEPT_DR15_READ = 1 << 15, + DR_INTERCEPT_DR0_WRITE = 1 << 16, + DR_INTERCEPT_DR1_WRITE = 1 << 17, + DR_INTERCEPT_DR2_WRITE = 1 << 18, + DR_INTERCEPT_DR3_WRITE = 1 << 19, + DR_INTERCEPT_DR4_WRITE = 1 << 20, + DR_INTERCEPT_DR5_WRITE = 1 << 21, + DR_INTERCEPT_DR6_WRITE = 1 << 22, + DR_INTERCEPT_DR7_WRITE = 1 << 23, + DR_INTERCEPT_DR8_WRITE = 1 << 24, + DR_INTERCEPT_DR9_WRITE = 1 << 25, + DR_INTERCEPT_DR10_WRITE = 1 << 26, + DR_INTERCEPT_DR11_WRITE = 1 << 27, + DR_INTERCEPT_DR12_WRITE = 1 << 28, + DR_INTERCEPT_DR13_WRITE = 1 << 29, + DR_INTERCEPT_DR14_WRITE = 1 << 30, + DR_INTERCEPT_DR15_WRITE = 1u << 31, +}; + +enum VMEXIT_EXITCODE +{ + /* control register read exitcodes */ + VMEXIT_CR0_READ = 0, /* 0x0 */ + VMEXIT_CR1_READ = 1, /* 0x1 */ + VMEXIT_CR2_READ = 2, /* 0x2 */ + VMEXIT_CR3_READ = 3, /* 0x3 */ + VMEXIT_CR4_READ = 4, /* 0x4 */ + VMEXIT_CR5_READ = 5, /* 0x5 */ + VMEXIT_CR6_READ = 6, /* 0x6 */ + VMEXIT_CR7_READ = 7, /* 0x7 */ + VMEXIT_CR8_READ = 8, /* 0x8 */ + VMEXIT_CR9_READ = 9, /* 0x9 */ + VMEXIT_CR10_READ = 10, /* 0xa */ + VMEXIT_CR11_READ = 11, /* 0xb */ + VMEXIT_CR12_READ = 12, /* 0xc */ + VMEXIT_CR13_READ = 13, /* 0xd */ + VMEXIT_CR14_READ = 14, /* 0xe */ + VMEXIT_CR15_READ = 15, /* 0xf */ + + /* control register write exitcodes */ + VMEXIT_CR0_WRITE = 16, /* 0x10 */ + VMEXIT_CR1_WRITE = 17, /* 0x11 */ + VMEXIT_CR2_WRITE = 18, /* 0x12 */ + VMEXIT_CR3_WRITE = 19, /* 0x13 */ + VMEXIT_CR4_WRITE = 20, /* 0x14 */ + VMEXIT_CR5_WRITE = 21, /* 0x15 */ + VMEXIT_CR6_WRITE = 22, /* 0x16 */ + VMEXIT_CR7_WRITE = 23, /* 0x17 */ + VMEXIT_CR8_WRITE = 24, /* 0x18 */ + VMEXIT_CR9_WRITE = 25, /* 0x19 */ + VMEXIT_CR10_WRITE = 26, /* 0x1a */ + VMEXIT_CR11_WRITE = 27, /* 0x1b */ + VMEXIT_CR12_WRITE = 28, /* 0x1c */ + VMEXIT_CR13_WRITE = 29, /* 0x1d */ + VMEXIT_CR14_WRITE = 30, /* 0x1e */ + VMEXIT_CR15_WRITE = 31, /* 0x1f */ + + /* debug register read exitcodes */ + VMEXIT_DR0_READ = 32, /* 0x20 */ + VMEXIT_DR1_READ = 33, /* 0x21 */ + VMEXIT_DR2_READ = 34, /* 0x22 */ + VMEXIT_DR3_READ = 35, /* 0x23 */ + VMEXIT_DR4_READ = 36, /* 0x24 */ + VMEXIT_DR5_READ = 37, /* 0x25 */ + VMEXIT_DR6_READ = 38, /* 0x26 */ + VMEXIT_DR7_READ = 39, /* 0x27 */ + VMEXIT_DR8_READ = 40, /* 0x28 */ + VMEXIT_DR9_READ = 41, /* 0x29 */ + VMEXIT_DR10_READ = 42, /* 0x2a */ + VMEXIT_DR11_READ = 43, /* 0x2b */ + VMEXIT_DR12_READ = 44, /* 0x2c */ + VMEXIT_DR13_READ = 45, /* 0x2d */ + VMEXIT_DR14_READ = 46, /* 0x2e */ + VMEXIT_DR15_READ = 47, /* 0x2f */ + + /* debug register write exitcodes */ + VMEXIT_DR0_WRITE = 48, /* 0x30 */ + VMEXIT_DR1_WRITE = 49, /* 0x31 */ + VMEXIT_DR2_WRITE = 50, /* 0x32 */ + VMEXIT_DR3_WRITE = 51, /* 0x33 */ + VMEXIT_DR4_WRITE = 52, /* 0x34 */ + VMEXIT_DR5_WRITE = 53, /* 0x35 */ + VMEXIT_DR6_WRITE = 54, /* 0x36 */ + VMEXIT_DR7_WRITE = 55, /* 0x37 */ + VMEXIT_DR8_WRITE = 56, /* 0x38 */ + VMEXIT_DR9_WRITE = 57, /* 0x39 */ + VMEXIT_DR10_WRITE = 58, /* 0x3a */ + VMEXIT_DR11_WRITE = 59, /* 0x3b */ + VMEXIT_DR12_WRITE = 60, /* 0x3c */ + VMEXIT_DR13_WRITE = 61, /* 0x3d */ + VMEXIT_DR14_WRITE = 62, /* 0x3e */ + VMEXIT_DR15_WRITE = 63, /* 0x3f */ + + /* processor exception exitcodes (VMEXIT_EXCP[0-31]) */ + VMEXIT_EXCEPTION_DE = 64, /* 0x40, divide-by-zero-error */ + VMEXIT_EXCEPTION_DB = 65, /* 0x41, debug */ + VMEXIT_EXCEPTION_NMI = 66, /* 0x42, non-maskable-interrupt */ + VMEXIT_EXCEPTION_BP = 67, /* 0x43, breakpoint */ + VMEXIT_EXCEPTION_OF = 68, /* 0x44, overflow */ + VMEXIT_EXCEPTION_BR = 69, /* 0x45, bound-range */ + VMEXIT_EXCEPTION_UD = 70, /* 0x46, invalid-opcode*/ + VMEXIT_EXCEPTION_NM = 71, /* 0x47, device-not-available */ + VMEXIT_EXCEPTION_DF = 72, /* 0x48, double-fault */ + VMEXIT_EXCEPTION_09 = 73, /* 0x49, unsupported (reserved) */ + VMEXIT_EXCEPTION_TS = 74, /* 0x4a, invalid-tss */ + VMEXIT_EXCEPTION_NP = 75, /* 0x4b, segment-not-present */ + VMEXIT_EXCEPTION_SS = 76, /* 0x4c, stack */ + VMEXIT_EXCEPTION_GP = 77, /* 0x4d, general-protection */ + VMEXIT_EXCEPTION_PF = 78, /* 0x4e, page-fault */ + VMEXIT_EXCEPTION_15 = 79, /* 0x4f, reserved */ + VMEXIT_EXCEPTION_MF = 80, /* 0x50, x87 floating-point exception-pending */ + VMEXIT_EXCEPTION_AC = 81, /* 0x51, alignment-check */ + VMEXIT_EXCEPTION_MC = 82, /* 0x52, machine-check */ + VMEXIT_EXCEPTION_XF = 83, /* 0x53, simd floating-point */ +/* VMEXIT_EXCEPTION_20 = 84, 0x54, #VE (Intel specific) */ + VMEXIT_EXCEPTION_CP = 85, /* 0x55, controlflow protection */ + + /* exceptions 20-31 (exitcodes 84-95) are reserved */ + + /* ...and the rest of the #VMEXITs */ + VMEXIT_INTR = 96, /* 0x60 */ + VMEXIT_NMI = 97, /* 0x61 */ + VMEXIT_SMI = 98, /* 0x62 */ + VMEXIT_INIT = 99, /* 0x63 */ + VMEXIT_VINTR = 100, /* 0x64 */ + VMEXIT_CR0_SEL_WRITE = 101, /* 0x65 */ + VMEXIT_IDTR_READ = 102, /* 0x66 */ + VMEXIT_GDTR_READ = 103, /* 0x67 */ + VMEXIT_LDTR_READ = 104, /* 0x68 */ + VMEXIT_TR_READ = 105, /* 0x69 */ + VMEXIT_IDTR_WRITE = 106, /* 0x6a */ + VMEXIT_GDTR_WRITE = 107, /* 0x6b */ + VMEXIT_LDTR_WRITE = 108, /* 0x6c */ + VMEXIT_TR_WRITE = 109, /* 0x6d */ + VMEXIT_RDTSC = 110, /* 0x6e */ + VMEXIT_RDPMC = 111, /* 0x6f */ + VMEXIT_PUSHF = 112, /* 0x70 */ + VMEXIT_POPF = 113, /* 0x71 */ + VMEXIT_CPUID = 114, /* 0x72 */ + VMEXIT_RSM = 115, /* 0x73 */ + VMEXIT_IRET = 116, /* 0x74 */ + VMEXIT_SWINT = 117, /* 0x75 */ + VMEXIT_INVD = 118, /* 0x76 */ + VMEXIT_PAUSE = 119, /* 0x77 */ + VMEXIT_HLT = 120, /* 0x78 */ + VMEXIT_INVLPG = 121, /* 0x79 */ + VMEXIT_INVLPGA = 122, /* 0x7a */ + VMEXIT_IOIO = 123, /* 0x7b */ + VMEXIT_MSR = 124, /* 0x7c */ + VMEXIT_TASK_SWITCH = 125, /* 0x7d */ + VMEXIT_FERR_FREEZE = 126, /* 0x7e */ + VMEXIT_SHUTDOWN = 127, /* 0x7f */ + VMEXIT_VMRUN = 128, /* 0x80 */ + VMEXIT_VMMCALL = 129, /* 0x81 */ + VMEXIT_VMLOAD = 130, /* 0x82 */ + VMEXIT_VMSAVE = 131, /* 0x83 */ + VMEXIT_STGI = 132, /* 0x84 */ + VMEXIT_CLGI = 133, /* 0x85 */ + VMEXIT_SKINIT = 134, /* 0x86 */ + VMEXIT_RDTSCP = 135, /* 0x87 */ + VMEXIT_ICEBP = 136, /* 0x88 */ + VMEXIT_WBINVD = 137, /* 0x89 */ + VMEXIT_MONITOR = 138, /* 0x8a */ + VMEXIT_MWAIT = 139, /* 0x8b */ + VMEXIT_MWAIT_CONDITIONAL= 140, /* 0x8c */ + VMEXIT_XSETBV = 141, /* 0x8d */ + VMEXIT_RDPRU = 142, /* 0x8e */ + /* Remember to also update VMEXIT_NPF_PERFC! */ + VMEXIT_NPF = 1024, /* 0x400, nested paging fault */ + /* Remember to also update SVM_PERF_EXIT_REASON_SIZE! */ + VMEXIT_INVALID = -1 +}; + +enum +{ + /* Available on all SVM-capable hardware. */ + TLB_CTRL_NO_FLUSH = 0, + TLB_CTRL_FLUSH_ALL = 1, + + /* Available with the FlushByASID feature. */ + TLB_CTRL_FLUSH_ASID = 3, + TLB_CTRL_FLUSH_ASID_NONGLOBAL = 7, +}; + +typedef union +{ + struct + { + uint8_t vector; + uint8_t type:3; + bool ev:1; + uint32_t resvd1:19; + bool v:1; + uint32_t ec; + }; + uint64_t raw; +} intinfo_t; + +typedef union { + struct { + bool intr_shadow: 1; + bool guest_intr_mask:1; + }; + uint64_t raw; +} intstat_t; + +typedef union +{ + u64 bytes; + struct + { + u64 tpr: 8; + u64 irq: 1; + u64 vgif: 1; + u64 rsvd0: 6; + u64 prio: 4; + u64 ign_tpr: 1; + u64 rsvd1: 3; + u64 intr_masking: 1; + u64 vgif_enable: 1; + u64 rsvd2: 6; + u64 vector: 8; + u64 rsvd3: 24; + } fields; +} vintr_t; + +typedef union +{ + u64 bytes; + struct + { + u64 type: 1; + u64 rsv0: 1; + u64 str: 1; + u64 rep: 1; + u64 sz8: 1; + u64 sz16: 1; + u64 sz32: 1; + u64 rsv1: 9; + u64 port: 16; + } fields; +} ioio_info_t; + +typedef union +{ + u64 bytes; + struct + { + u64 lbr_enable:1; + u64 vloadsave_enable:1; + } fields; +} virt_ext_t; + +typedef union +{ + struct { + bool intercepts:1; /* 0: cr/dr/exception/general intercepts, + * pause_filter_count, tsc_offset */ + bool iopm:1; /* 1: iopm_base_pa, msrpm_base_pa */ + bool asid:1; /* 2: asid */ + bool tpr:1; /* 3: vintr */ + bool np:1; /* 4: np, h_cr3, g_pat */ + bool cr:1; /* 5: cr0, cr3, cr4, efer */ + bool dr:1; /* 6: dr6, dr7 */ + bool dt:1; /* 7: gdtr, idtr */ + bool seg:1; /* 8: cs, ds, es, ss, cpl */ + bool cr2:1; /* 9: cr2 */ + bool lbr:1; /* 10: debugctlmsr, last{branch,int}{to,from}ip */ + bool :1; + bool cet:1; /* 12: msr_s_set, ssp, msr_isst */ + }; + uint32_t raw; +} vmcbcleanbits_t; + +#define IOPM_SIZE (12 * 1024) +#define MSRPM_SIZE (8 * 1024) + +struct vmcb_struct { + u32 _cr_intercepts; /* offset 0x00 - cleanbit 0 */ + u32 _dr_intercepts; /* offset 0x04 - cleanbit 0 */ + u32 _exception_intercepts; /* offset 0x08 - cleanbit 0 */ + u32 _general1_intercepts; /* offset 0x0C - cleanbit 0 */ + u32 _general2_intercepts; /* offset 0x10 - cleanbit 0 */ + u32 res01[10]; + u16 _pause_filter_thresh; /* offset 0x3C - cleanbit 0 */ + u16 _pause_filter_count; /* offset 0x3E - cleanbit 0 */ + u64 _iopm_base_pa; /* offset 0x40 - cleanbit 1 */ + u64 _msrpm_base_pa; /* offset 0x48 - cleanbit 1 */ + u64 _tsc_offset; /* offset 0x50 - cleanbit 0 */ + u32 _asid; /* offset 0x58 - cleanbit 2 */ + u8 tlb_control; /* offset 0x5C - TLB_CTRL_* */ + u8 res07[3]; + vintr_t _vintr; /* offset 0x60 - cleanbit 3 */ + intstat_t int_stat; /* offset 0x68 */ + u64 exitcode; /* offset 0x70 */ + union { + struct { + uint64_t exitinfo1; /* offset 0x78 */ + uint64_t exitinfo2; /* offset 0x80 */ + }; + union { + struct { + uint32_t ec; /* #NP, #SS, #GP, #PF, #AC */ + uint32_t :32; + + uint64_t cr2; /* #PF */ + } exc; + struct { + bool in:1; + bool :1; + bool str:1; + bool rep:1; + uint16_t bytes:3; + uint16_t /* asz */:3; + uint16_t seg:3; + uint16_t :3; + uint16_t port; + uint32_t :32; + + uint64_t nrip; + } io; + struct { + uint64_t gpr:4; + uint64_t :59; + bool mov_insn:1; /* MOV, as opposed to LMSW, CLTS, etc */ + } mov_cr; + struct { + uint64_t ec; + uint64_t gpa; + } npf; + struct { + uint16_t sel; + uint64_t :48; + + uint32_t ec; + uint32_t :4; + bool iret:1; + uint32_t :1; + bool jmp:1; + uint32_t :5; + bool ev:1; + uint32_t :3; + bool rf:1; + } task_switch; + } ei; + }; + intinfo_t exit_int_info; /* offset 0x88 */ + union { /* offset 0x90 - cleanbit 4 */ + struct { + bool _np :1; + bool _sev :1; + bool _sev_es :1; + bool _gmet :1; + bool _np_sss :1; + bool _vte :1; + }; + uint64_t _np_ctrl; + }; + u64 res08[2]; + intinfo_t event_inj; /* offset 0xA8 */ + u64 _h_cr3; /* offset 0xB0 - cleanbit 4 */ + virt_ext_t virt_ext; /* offset 0xB8 */ + vmcbcleanbits_t cleanbits; /* offset 0xC0 */ + u32 res09; /* offset 0xC4 */ + u64 nextrip; /* offset 0xC8 */ + u8 guest_ins_len; /* offset 0xD0 */ + u8 guest_ins[15]; /* offset 0xD1 */ + u64 res10a[100]; /* offset 0xE0 pad to save area */ + + union { + struct segment_register sreg[6]; + struct { + struct segment_register es; /* offset 0x400 - cleanbit 8 */ + struct segment_register cs; /* cleanbit 8 */ + struct segment_register ss; /* cleanbit 8 */ + struct segment_register ds; /* cleanbit 8 */ + struct segment_register fs; + struct segment_register gs; + }; + }; + struct segment_register gdtr; /* cleanbit 7 */ + struct segment_register ldtr; + struct segment_register idtr; /* cleanbit 7 */ + struct segment_register tr; + u64 res10[5]; + u8 res11[3]; + u8 _cpl; /* cleanbit 8 */ + u32 res12; + u64 _efer; /* offset 0x400 + 0xD0 - cleanbit 5 */ + u64 res13[14]; + u64 _cr4; /* offset 0x400 + 0x148 - cleanbit 5 */ + u64 _cr3; /* cleanbit 5 */ + u64 _cr0; /* cleanbit 5 */ + u64 _dr7; /* cleanbit 6 */ + u64 _dr6; /* cleanbit 6 */ + u64 rflags; + u64 rip; + u64 res14[11]; + u64 rsp; + u64 _msr_s_cet; /* offset 0x400 + 0x1E0 - cleanbit 12 */ + u64 _ssp; /* offset 0x400 + 0x1E8 | */ + u64 _msr_isst; /* offset 0x400 + 0x1F0 v */ + u64 rax; + u64 star; + u64 lstar; + u64 cstar; + u64 sfmask; + u64 kerngsbase; + u64 sysenter_cs; + u64 sysenter_esp; + u64 sysenter_eip; + u64 _cr2; /* cleanbit 9 */ + u64 res16[4]; + u64 _g_pat; /* cleanbit 4 */ + u64 _debugctlmsr; /* cleanbit 10 */ + u64 _lastbranchfromip; /* cleanbit 10 */ + u64 _lastbranchtoip; /* cleanbit 10 */ + u64 _lastintfromip; /* cleanbit 10 */ + u64 _lastinttoip; /* cleanbit 10 */ + u64 res17[9]; + u64 spec_ctrl; + u64 res18[291]; +}; + +struct vmcb_struct *alloc_vmcb(void); +void free_vmcb(struct vmcb_struct *vmcb); + +int svm_create_vmcb(struct vcpu *v); +void svm_destroy_vmcb(struct vcpu *v); + +void setup_vmcb_dump(void); + +/* + * VMCB accessor functions. + */ + +#define VMCB_ACCESSORS_(name, type, cleanbit) \ +static inline void \ +vmcb_set_ ## name(struct vmcb_struct *vmcb, \ + type value) \ +{ \ + vmcb->_ ## name = value; \ + vmcb->cleanbits.cleanbit = false; \ +} \ +static inline type \ +vmcb_get_ ## name(const struct vmcb_struct *vmcb) \ +{ \ + return vmcb->_ ## name; \ +} + +#define VMCB_ACCESSORS(name, cleanbit) \ + VMCB_ACCESSORS_(name, typeof(((struct vmcb_struct){})._ ## name), cleanbit) + +VMCB_ACCESSORS(cr_intercepts, intercepts) +VMCB_ACCESSORS(dr_intercepts, intercepts) +VMCB_ACCESSORS(exception_intercepts, intercepts) +VMCB_ACCESSORS(general1_intercepts, intercepts) +VMCB_ACCESSORS(general2_intercepts, intercepts) +VMCB_ACCESSORS(pause_filter_count, intercepts) +VMCB_ACCESSORS(pause_filter_thresh, intercepts) +VMCB_ACCESSORS(tsc_offset, intercepts) +VMCB_ACCESSORS(iopm_base_pa, iopm) +VMCB_ACCESSORS(msrpm_base_pa, iopm) +VMCB_ACCESSORS(asid, asid) +VMCB_ACCESSORS(vintr, tpr) +VMCB_ACCESSORS(np_ctrl, np) +VMCB_ACCESSORS_(np, bool, np) +VMCB_ACCESSORS_(sev, bool, np) +VMCB_ACCESSORS_(sev_es, bool, np) +VMCB_ACCESSORS_(gmet, bool, np) +VMCB_ACCESSORS_(vte, bool, np) +VMCB_ACCESSORS(h_cr3, np) +VMCB_ACCESSORS(g_pat, np) +VMCB_ACCESSORS(cr0, cr) +VMCB_ACCESSORS(cr3, cr) +VMCB_ACCESSORS(cr4, cr) +VMCB_ACCESSORS(efer, cr) +VMCB_ACCESSORS(dr6, dr) +VMCB_ACCESSORS(dr7, dr) +VMCB_ACCESSORS(cpl, seg) +VMCB_ACCESSORS(cr2, cr2) +VMCB_ACCESSORS(debugctlmsr, lbr) +VMCB_ACCESSORS(lastbranchfromip, lbr) +VMCB_ACCESSORS(lastbranchtoip, lbr) +VMCB_ACCESSORS(lastintfromip, lbr) +VMCB_ACCESSORS(lastinttoip, lbr) +VMCB_ACCESSORS(msr_s_cet, cet) +VMCB_ACCESSORS(ssp, cet) +VMCB_ACCESSORS(msr_isst, cet) + +#undef VMCB_ACCESSORS + +#endif /* SVM_PRIVATE_VMCB_H */ diff --git a/xen/arch/x86/include/asm/hvm/svm/vmcb.h b/xen/arch/x86/include/asm/hvm/svm/vmcb.h index 28f715e376..717215ff96 100644 --- a/xen/arch/x86/include/asm/hvm/svm/vmcb.h +++ b/xen/arch/x86/include/asm/hvm/svm/vmcb.h @@ -10,544 +10,6 @@ #include -/* general 1 intercepts */ -enum GenericIntercept1bits -{ - GENERAL1_INTERCEPT_INTR = 1 << 0, - GENERAL1_INTERCEPT_NMI = 1 << 1, - GENERAL1_INTERCEPT_SMI = 1 << 2, - GENERAL1_INTERCEPT_INIT = 1 << 3, - GENERAL1_INTERCEPT_VINTR = 1 << 4, - GENERAL1_INTERCEPT_CR0_SEL_WRITE = 1 << 5, - GENERAL1_INTERCEPT_IDTR_READ = 1 << 6, - GENERAL1_INTERCEPT_GDTR_READ = 1 << 7, - GENERAL1_INTERCEPT_LDTR_READ = 1 << 8, - GENERAL1_INTERCEPT_TR_READ = 1 << 9, - GENERAL1_INTERCEPT_IDTR_WRITE = 1 << 10, - GENERAL1_INTERCEPT_GDTR_WRITE = 1 << 11, - GENERAL1_INTERCEPT_LDTR_WRITE = 1 << 12, - GENERAL1_INTERCEPT_TR_WRITE = 1 << 13, - GENERAL1_INTERCEPT_RDTSC = 1 << 14, - GENERAL1_INTERCEPT_RDPMC = 1 << 15, - GENERAL1_INTERCEPT_PUSHF = 1 << 16, - GENERAL1_INTERCEPT_POPF = 1 << 17, - GENERAL1_INTERCEPT_CPUID = 1 << 18, - GENERAL1_INTERCEPT_RSM = 1 << 19, - GENERAL1_INTERCEPT_IRET = 1 << 20, - GENERAL1_INTERCEPT_SWINT = 1 << 21, - GENERAL1_INTERCEPT_INVD = 1 << 22, - GENERAL1_INTERCEPT_PAUSE = 1 << 23, - GENERAL1_INTERCEPT_HLT = 1 << 24, - GENERAL1_INTERCEPT_INVLPG = 1 << 25, - GENERAL1_INTERCEPT_INVLPGA = 1 << 26, - GENERAL1_INTERCEPT_IOIO_PROT = 1 << 27, - GENERAL1_INTERCEPT_MSR_PROT = 1 << 28, - GENERAL1_INTERCEPT_TASK_SWITCH = 1 << 29, - GENERAL1_INTERCEPT_FERR_FREEZE = 1 << 30, - GENERAL1_INTERCEPT_SHUTDOWN_EVT = 1u << 31 -}; - -/* general 2 intercepts */ -enum GenericIntercept2bits -{ - GENERAL2_INTERCEPT_VMRUN = 1 << 0, - GENERAL2_INTERCEPT_VMMCALL = 1 << 1, - GENERAL2_INTERCEPT_VMLOAD = 1 << 2, - GENERAL2_INTERCEPT_VMSAVE = 1 << 3, - GENERAL2_INTERCEPT_STGI = 1 << 4, - GENERAL2_INTERCEPT_CLGI = 1 << 5, - GENERAL2_INTERCEPT_SKINIT = 1 << 6, - GENERAL2_INTERCEPT_RDTSCP = 1 << 7, - GENERAL2_INTERCEPT_ICEBP = 1 << 8, - GENERAL2_INTERCEPT_WBINVD = 1 << 9, - GENERAL2_INTERCEPT_MONITOR = 1 << 10, - GENERAL2_INTERCEPT_MWAIT = 1 << 11, - GENERAL2_INTERCEPT_MWAIT_CONDITIONAL = 1 << 12, - GENERAL2_INTERCEPT_XSETBV = 1 << 13, - GENERAL2_INTERCEPT_RDPRU = 1 << 14, -}; - - -/* control register intercepts */ -enum CRInterceptBits -{ - CR_INTERCEPT_CR0_READ = 1 << 0, - CR_INTERCEPT_CR1_READ = 1 << 1, - CR_INTERCEPT_CR2_READ = 1 << 2, - CR_INTERCEPT_CR3_READ = 1 << 3, - CR_INTERCEPT_CR4_READ = 1 << 4, - CR_INTERCEPT_CR5_READ = 1 << 5, - CR_INTERCEPT_CR6_READ = 1 << 6, - CR_INTERCEPT_CR7_READ = 1 << 7, - CR_INTERCEPT_CR8_READ = 1 << 8, - CR_INTERCEPT_CR9_READ = 1 << 9, - CR_INTERCEPT_CR10_READ = 1 << 10, - CR_INTERCEPT_CR11_READ = 1 << 11, - CR_INTERCEPT_CR12_READ = 1 << 12, - CR_INTERCEPT_CR13_READ = 1 << 13, - CR_INTERCEPT_CR14_READ = 1 << 14, - CR_INTERCEPT_CR15_READ = 1 << 15, - CR_INTERCEPT_CR0_WRITE = 1 << 16, - CR_INTERCEPT_CR1_WRITE = 1 << 17, - CR_INTERCEPT_CR2_WRITE = 1 << 18, - CR_INTERCEPT_CR3_WRITE = 1 << 19, - CR_INTERCEPT_CR4_WRITE = 1 << 20, - CR_INTERCEPT_CR5_WRITE = 1 << 21, - CR_INTERCEPT_CR6_WRITE = 1 << 22, - CR_INTERCEPT_CR7_WRITE = 1 << 23, - CR_INTERCEPT_CR8_WRITE = 1 << 24, - CR_INTERCEPT_CR9_WRITE = 1 << 25, - CR_INTERCEPT_CR10_WRITE = 1 << 26, - CR_INTERCEPT_CR11_WRITE = 1 << 27, - CR_INTERCEPT_CR12_WRITE = 1 << 28, - CR_INTERCEPT_CR13_WRITE = 1 << 29, - CR_INTERCEPT_CR14_WRITE = 1 << 30, - CR_INTERCEPT_CR15_WRITE = 1u << 31, -}; - - -/* debug register intercepts */ -enum DRInterceptBits -{ - DR_INTERCEPT_DR0_READ = 1 << 0, - DR_INTERCEPT_DR1_READ = 1 << 1, - DR_INTERCEPT_DR2_READ = 1 << 2, - DR_INTERCEPT_DR3_READ = 1 << 3, - DR_INTERCEPT_DR4_READ = 1 << 4, - DR_INTERCEPT_DR5_READ = 1 << 5, - DR_INTERCEPT_DR6_READ = 1 << 6, - DR_INTERCEPT_DR7_READ = 1 << 7, - DR_INTERCEPT_DR8_READ = 1 << 8, - DR_INTERCEPT_DR9_READ = 1 << 9, - DR_INTERCEPT_DR10_READ = 1 << 10, - DR_INTERCEPT_DR11_READ = 1 << 11, - DR_INTERCEPT_DR12_READ = 1 << 12, - DR_INTERCEPT_DR13_READ = 1 << 13, - DR_INTERCEPT_DR14_READ = 1 << 14, - DR_INTERCEPT_DR15_READ = 1 << 15, - DR_INTERCEPT_DR0_WRITE = 1 << 16, - DR_INTERCEPT_DR1_WRITE = 1 << 17, - DR_INTERCEPT_DR2_WRITE = 1 << 18, - DR_INTERCEPT_DR3_WRITE = 1 << 19, - DR_INTERCEPT_DR4_WRITE = 1 << 20, - DR_INTERCEPT_DR5_WRITE = 1 << 21, - DR_INTERCEPT_DR6_WRITE = 1 << 22, - DR_INTERCEPT_DR7_WRITE = 1 << 23, - DR_INTERCEPT_DR8_WRITE = 1 << 24, - DR_INTERCEPT_DR9_WRITE = 1 << 25, - DR_INTERCEPT_DR10_WRITE = 1 << 26, - DR_INTERCEPT_DR11_WRITE = 1 << 27, - DR_INTERCEPT_DR12_WRITE = 1 << 28, - DR_INTERCEPT_DR13_WRITE = 1 << 29, - DR_INTERCEPT_DR14_WRITE = 1 << 30, - DR_INTERCEPT_DR15_WRITE = 1u << 31, -}; - -enum VMEXIT_EXITCODE -{ - /* control register read exitcodes */ - VMEXIT_CR0_READ = 0, /* 0x0 */ - VMEXIT_CR1_READ = 1, /* 0x1 */ - VMEXIT_CR2_READ = 2, /* 0x2 */ - VMEXIT_CR3_READ = 3, /* 0x3 */ - VMEXIT_CR4_READ = 4, /* 0x4 */ - VMEXIT_CR5_READ = 5, /* 0x5 */ - VMEXIT_CR6_READ = 6, /* 0x6 */ - VMEXIT_CR7_READ = 7, /* 0x7 */ - VMEXIT_CR8_READ = 8, /* 0x8 */ - VMEXIT_CR9_READ = 9, /* 0x9 */ - VMEXIT_CR10_READ = 10, /* 0xa */ - VMEXIT_CR11_READ = 11, /* 0xb */ - VMEXIT_CR12_READ = 12, /* 0xc */ - VMEXIT_CR13_READ = 13, /* 0xd */ - VMEXIT_CR14_READ = 14, /* 0xe */ - VMEXIT_CR15_READ = 15, /* 0xf */ - - /* control register write exitcodes */ - VMEXIT_CR0_WRITE = 16, /* 0x10 */ - VMEXIT_CR1_WRITE = 17, /* 0x11 */ - VMEXIT_CR2_WRITE = 18, /* 0x12 */ - VMEXIT_CR3_WRITE = 19, /* 0x13 */ - VMEXIT_CR4_WRITE = 20, /* 0x14 */ - VMEXIT_CR5_WRITE = 21, /* 0x15 */ - VMEXIT_CR6_WRITE = 22, /* 0x16 */ - VMEXIT_CR7_WRITE = 23, /* 0x17 */ - VMEXIT_CR8_WRITE = 24, /* 0x18 */ - VMEXIT_CR9_WRITE = 25, /* 0x19 */ - VMEXIT_CR10_WRITE = 26, /* 0x1a */ - VMEXIT_CR11_WRITE = 27, /* 0x1b */ - VMEXIT_CR12_WRITE = 28, /* 0x1c */ - VMEXIT_CR13_WRITE = 29, /* 0x1d */ - VMEXIT_CR14_WRITE = 30, /* 0x1e */ - VMEXIT_CR15_WRITE = 31, /* 0x1f */ - - /* debug register read exitcodes */ - VMEXIT_DR0_READ = 32, /* 0x20 */ - VMEXIT_DR1_READ = 33, /* 0x21 */ - VMEXIT_DR2_READ = 34, /* 0x22 */ - VMEXIT_DR3_READ = 35, /* 0x23 */ - VMEXIT_DR4_READ = 36, /* 0x24 */ - VMEXIT_DR5_READ = 37, /* 0x25 */ - VMEXIT_DR6_READ = 38, /* 0x26 */ - VMEXIT_DR7_READ = 39, /* 0x27 */ - VMEXIT_DR8_READ = 40, /* 0x28 */ - VMEXIT_DR9_READ = 41, /* 0x29 */ - VMEXIT_DR10_READ = 42, /* 0x2a */ - VMEXIT_DR11_READ = 43, /* 0x2b */ - VMEXIT_DR12_READ = 44, /* 0x2c */ - VMEXIT_DR13_READ = 45, /* 0x2d */ - VMEXIT_DR14_READ = 46, /* 0x2e */ - VMEXIT_DR15_READ = 47, /* 0x2f */ - - /* debug register write exitcodes */ - VMEXIT_DR0_WRITE = 48, /* 0x30 */ - VMEXIT_DR1_WRITE = 49, /* 0x31 */ - VMEXIT_DR2_WRITE = 50, /* 0x32 */ - VMEXIT_DR3_WRITE = 51, /* 0x33 */ - VMEXIT_DR4_WRITE = 52, /* 0x34 */ - VMEXIT_DR5_WRITE = 53, /* 0x35 */ - VMEXIT_DR6_WRITE = 54, /* 0x36 */ - VMEXIT_DR7_WRITE = 55, /* 0x37 */ - VMEXIT_DR8_WRITE = 56, /* 0x38 */ - VMEXIT_DR9_WRITE = 57, /* 0x39 */ - VMEXIT_DR10_WRITE = 58, /* 0x3a */ - VMEXIT_DR11_WRITE = 59, /* 0x3b */ - VMEXIT_DR12_WRITE = 60, /* 0x3c */ - VMEXIT_DR13_WRITE = 61, /* 0x3d */ - VMEXIT_DR14_WRITE = 62, /* 0x3e */ - VMEXIT_DR15_WRITE = 63, /* 0x3f */ - - /* processor exception exitcodes (VMEXIT_EXCP[0-31]) */ - VMEXIT_EXCEPTION_DE = 64, /* 0x40, divide-by-zero-error */ - VMEXIT_EXCEPTION_DB = 65, /* 0x41, debug */ - VMEXIT_EXCEPTION_NMI = 66, /* 0x42, non-maskable-interrupt */ - VMEXIT_EXCEPTION_BP = 67, /* 0x43, breakpoint */ - VMEXIT_EXCEPTION_OF = 68, /* 0x44, overflow */ - VMEXIT_EXCEPTION_BR = 69, /* 0x45, bound-range */ - VMEXIT_EXCEPTION_UD = 70, /* 0x46, invalid-opcode*/ - VMEXIT_EXCEPTION_NM = 71, /* 0x47, device-not-available */ - VMEXIT_EXCEPTION_DF = 72, /* 0x48, double-fault */ - VMEXIT_EXCEPTION_09 = 73, /* 0x49, unsupported (reserved) */ - VMEXIT_EXCEPTION_TS = 74, /* 0x4a, invalid-tss */ - VMEXIT_EXCEPTION_NP = 75, /* 0x4b, segment-not-present */ - VMEXIT_EXCEPTION_SS = 76, /* 0x4c, stack */ - VMEXIT_EXCEPTION_GP = 77, /* 0x4d, general-protection */ - VMEXIT_EXCEPTION_PF = 78, /* 0x4e, page-fault */ - VMEXIT_EXCEPTION_15 = 79, /* 0x4f, reserved */ - VMEXIT_EXCEPTION_MF = 80, /* 0x50, x87 floating-point exception-pending */ - VMEXIT_EXCEPTION_AC = 81, /* 0x51, alignment-check */ - VMEXIT_EXCEPTION_MC = 82, /* 0x52, machine-check */ - VMEXIT_EXCEPTION_XF = 83, /* 0x53, simd floating-point */ -/* VMEXIT_EXCEPTION_20 = 84, 0x54, #VE (Intel specific) */ - VMEXIT_EXCEPTION_CP = 85, /* 0x55, controlflow protection */ - - /* exceptions 20-31 (exitcodes 84-95) are reserved */ - - /* ...and the rest of the #VMEXITs */ - VMEXIT_INTR = 96, /* 0x60 */ - VMEXIT_NMI = 97, /* 0x61 */ - VMEXIT_SMI = 98, /* 0x62 */ - VMEXIT_INIT = 99, /* 0x63 */ - VMEXIT_VINTR = 100, /* 0x64 */ - VMEXIT_CR0_SEL_WRITE = 101, /* 0x65 */ - VMEXIT_IDTR_READ = 102, /* 0x66 */ - VMEXIT_GDTR_READ = 103, /* 0x67 */ - VMEXIT_LDTR_READ = 104, /* 0x68 */ - VMEXIT_TR_READ = 105, /* 0x69 */ - VMEXIT_IDTR_WRITE = 106, /* 0x6a */ - VMEXIT_GDTR_WRITE = 107, /* 0x6b */ - VMEXIT_LDTR_WRITE = 108, /* 0x6c */ - VMEXIT_TR_WRITE = 109, /* 0x6d */ - VMEXIT_RDTSC = 110, /* 0x6e */ - VMEXIT_RDPMC = 111, /* 0x6f */ - VMEXIT_PUSHF = 112, /* 0x70 */ - VMEXIT_POPF = 113, /* 0x71 */ - VMEXIT_CPUID = 114, /* 0x72 */ - VMEXIT_RSM = 115, /* 0x73 */ - VMEXIT_IRET = 116, /* 0x74 */ - VMEXIT_SWINT = 117, /* 0x75 */ - VMEXIT_INVD = 118, /* 0x76 */ - VMEXIT_PAUSE = 119, /* 0x77 */ - VMEXIT_HLT = 120, /* 0x78 */ - VMEXIT_INVLPG = 121, /* 0x79 */ - VMEXIT_INVLPGA = 122, /* 0x7a */ - VMEXIT_IOIO = 123, /* 0x7b */ - VMEXIT_MSR = 124, /* 0x7c */ - VMEXIT_TASK_SWITCH = 125, /* 0x7d */ - VMEXIT_FERR_FREEZE = 126, /* 0x7e */ - VMEXIT_SHUTDOWN = 127, /* 0x7f */ - VMEXIT_VMRUN = 128, /* 0x80 */ - VMEXIT_VMMCALL = 129, /* 0x81 */ - VMEXIT_VMLOAD = 130, /* 0x82 */ - VMEXIT_VMSAVE = 131, /* 0x83 */ - VMEXIT_STGI = 132, /* 0x84 */ - VMEXIT_CLGI = 133, /* 0x85 */ - VMEXIT_SKINIT = 134, /* 0x86 */ - VMEXIT_RDTSCP = 135, /* 0x87 */ - VMEXIT_ICEBP = 136, /* 0x88 */ - VMEXIT_WBINVD = 137, /* 0x89 */ - VMEXIT_MONITOR = 138, /* 0x8a */ - VMEXIT_MWAIT = 139, /* 0x8b */ - VMEXIT_MWAIT_CONDITIONAL= 140, /* 0x8c */ - VMEXIT_XSETBV = 141, /* 0x8d */ - VMEXIT_RDPRU = 142, /* 0x8e */ - /* Remember to also update VMEXIT_NPF_PERFC! */ - VMEXIT_NPF = 1024, /* 0x400, nested paging fault */ - /* Remember to also update SVM_PERF_EXIT_REASON_SIZE! */ - VMEXIT_INVALID = -1 -}; - -enum -{ - /* Available on all SVM-capable hardware. */ - TLB_CTRL_NO_FLUSH = 0, - TLB_CTRL_FLUSH_ALL = 1, - - /* Available with the FlushByASID feature. */ - TLB_CTRL_FLUSH_ASID = 3, - TLB_CTRL_FLUSH_ASID_NONGLOBAL = 7, -}; - -typedef union -{ - struct - { - uint8_t vector; - uint8_t type:3; - bool ev:1; - uint32_t resvd1:19; - bool v:1; - uint32_t ec; - }; - uint64_t raw; -} intinfo_t; - -typedef union { - struct { - bool intr_shadow: 1; - bool guest_intr_mask:1; - }; - uint64_t raw; -} intstat_t; - -typedef union -{ - u64 bytes; - struct - { - u64 tpr: 8; - u64 irq: 1; - u64 vgif: 1; - u64 rsvd0: 6; - u64 prio: 4; - u64 ign_tpr: 1; - u64 rsvd1: 3; - u64 intr_masking: 1; - u64 vgif_enable: 1; - u64 rsvd2: 6; - u64 vector: 8; - u64 rsvd3: 24; - } fields; -} vintr_t; - -typedef union -{ - u64 bytes; - struct - { - u64 type: 1; - u64 rsv0: 1; - u64 str: 1; - u64 rep: 1; - u64 sz8: 1; - u64 sz16: 1; - u64 sz32: 1; - u64 rsv1: 9; - u64 port: 16; - } fields; -} ioio_info_t; - -typedef union -{ - u64 bytes; - struct - { - u64 lbr_enable:1; - u64 vloadsave_enable:1; - } fields; -} virt_ext_t; - -typedef union -{ - struct { - bool intercepts:1; /* 0: cr/dr/exception/general intercepts, - * pause_filter_count, tsc_offset */ - bool iopm:1; /* 1: iopm_base_pa, msrpm_base_pa */ - bool asid:1; /* 2: asid */ - bool tpr:1; /* 3: vintr */ - bool np:1; /* 4: np, h_cr3, g_pat */ - bool cr:1; /* 5: cr0, cr3, cr4, efer */ - bool dr:1; /* 6: dr6, dr7 */ - bool dt:1; /* 7: gdtr, idtr */ - bool seg:1; /* 8: cs, ds, es, ss, cpl */ - bool cr2:1; /* 9: cr2 */ - bool lbr:1; /* 10: debugctlmsr, last{branch,int}{to,from}ip */ - bool :1; - bool cet:1; /* 12: msr_s_set, ssp, msr_isst */ - }; - uint32_t raw; -} vmcbcleanbits_t; - -#define IOPM_SIZE (12 * 1024) -#define MSRPM_SIZE (8 * 1024) - -struct vmcb_struct { - u32 _cr_intercepts; /* offset 0x00 - cleanbit 0 */ - u32 _dr_intercepts; /* offset 0x04 - cleanbit 0 */ - u32 _exception_intercepts; /* offset 0x08 - cleanbit 0 */ - u32 _general1_intercepts; /* offset 0x0C - cleanbit 0 */ - u32 _general2_intercepts; /* offset 0x10 - cleanbit 0 */ - u32 res01[10]; - u16 _pause_filter_thresh; /* offset 0x3C - cleanbit 0 */ - u16 _pause_filter_count; /* offset 0x3E - cleanbit 0 */ - u64 _iopm_base_pa; /* offset 0x40 - cleanbit 1 */ - u64 _msrpm_base_pa; /* offset 0x48 - cleanbit 1 */ - u64 _tsc_offset; /* offset 0x50 - cleanbit 0 */ - u32 _asid; /* offset 0x58 - cleanbit 2 */ - u8 tlb_control; /* offset 0x5C - TLB_CTRL_* */ - u8 res07[3]; - vintr_t _vintr; /* offset 0x60 - cleanbit 3 */ - intstat_t int_stat; /* offset 0x68 */ - u64 exitcode; /* offset 0x70 */ - union { - struct { - uint64_t exitinfo1; /* offset 0x78 */ - uint64_t exitinfo2; /* offset 0x80 */ - }; - union { - struct { - uint32_t ec; /* #NP, #SS, #GP, #PF, #AC */ - uint32_t :32; - - uint64_t cr2; /* #PF */ - } exc; - struct { - bool in:1; - bool :1; - bool str:1; - bool rep:1; - uint16_t bytes:3; - uint16_t /* asz */:3; - uint16_t seg:3; - uint16_t :3; - uint16_t port; - uint32_t :32; - - uint64_t nrip; - } io; - struct { - uint64_t gpr:4; - uint64_t :59; - bool mov_insn:1; /* MOV, as opposed to LMSW, CLTS, etc */ - } mov_cr; - struct { - uint64_t ec; - uint64_t gpa; - } npf; - struct { - uint16_t sel; - uint64_t :48; - - uint32_t ec; - uint32_t :4; - bool iret:1; - uint32_t :1; - bool jmp:1; - uint32_t :5; - bool ev:1; - uint32_t :3; - bool rf:1; - } task_switch; - } ei; - }; - intinfo_t exit_int_info; /* offset 0x88 */ - union { /* offset 0x90 - cleanbit 4 */ - struct { - bool _np :1; - bool _sev :1; - bool _sev_es :1; - bool _gmet :1; - bool _np_sss :1; - bool _vte :1; - }; - uint64_t _np_ctrl; - }; - u64 res08[2]; - intinfo_t event_inj; /* offset 0xA8 */ - u64 _h_cr3; /* offset 0xB0 - cleanbit 4 */ - virt_ext_t virt_ext; /* offset 0xB8 */ - vmcbcleanbits_t cleanbits; /* offset 0xC0 */ - u32 res09; /* offset 0xC4 */ - u64 nextrip; /* offset 0xC8 */ - u8 guest_ins_len; /* offset 0xD0 */ - u8 guest_ins[15]; /* offset 0xD1 */ - u64 res10a[100]; /* offset 0xE0 pad to save area */ - - union { - struct segment_register sreg[6]; - struct { - struct segment_register es; /* offset 0x400 - cleanbit 8 */ - struct segment_register cs; /* cleanbit 8 */ - struct segment_register ss; /* cleanbit 8 */ - struct segment_register ds; /* cleanbit 8 */ - struct segment_register fs; - struct segment_register gs; - }; - }; - struct segment_register gdtr; /* cleanbit 7 */ - struct segment_register ldtr; - struct segment_register idtr; /* cleanbit 7 */ - struct segment_register tr; - u64 res10[5]; - u8 res11[3]; - u8 _cpl; /* cleanbit 8 */ - u32 res12; - u64 _efer; /* offset 0x400 + 0xD0 - cleanbit 5 */ - u64 res13[14]; - u64 _cr4; /* offset 0x400 + 0x148 - cleanbit 5 */ - u64 _cr3; /* cleanbit 5 */ - u64 _cr0; /* cleanbit 5 */ - u64 _dr7; /* cleanbit 6 */ - u64 _dr6; /* cleanbit 6 */ - u64 rflags; - u64 rip; - u64 res14[11]; - u64 rsp; - u64 _msr_s_cet; /* offset 0x400 + 0x1E0 - cleanbit 12 */ - u64 _ssp; /* offset 0x400 + 0x1E8 | */ - u64 _msr_isst; /* offset 0x400 + 0x1F0 v */ - u64 rax; - u64 star; - u64 lstar; - u64 cstar; - u64 sfmask; - u64 kerngsbase; - u64 sysenter_cs; - u64 sysenter_esp; - u64 sysenter_eip; - u64 _cr2; /* cleanbit 9 */ - u64 res16[4]; - u64 _g_pat; /* cleanbit 4 */ - u64 _debugctlmsr; /* cleanbit 10 */ - u64 _lastbranchfromip; /* cleanbit 10 */ - u64 _lastbranchtoip; /* cleanbit 10 */ - u64 _lastintfromip; /* cleanbit 10 */ - u64 _lastinttoip; /* cleanbit 10 */ - u64 res17[9]; - u64 spec_ctrl; - u64 res18[291]; -}; - struct svm_domain { /* OSVW MSRs */ union { @@ -595,14 +57,6 @@ struct svm_vcpu { uint64_t guest_sysenter_eip; }; -struct vmcb_struct *alloc_vmcb(void); -void free_vmcb(struct vmcb_struct *vmcb); - -int svm_create_vmcb(struct vcpu *v); -void svm_destroy_vmcb(struct vcpu *v); - -void setup_vmcb_dump(void); - #define MSR_INTERCEPT_NONE 0 #define MSR_INTERCEPT_READ 1 #define MSR_INTERCEPT_WRITE 2 @@ -611,66 +65,6 @@ void svm_intercept_msr(struct vcpu *v, uint32_t msr, int flags); #define svm_disable_intercept_for_msr(v, msr) svm_intercept_msr((v), (msr), MSR_INTERCEPT_NONE) #define svm_enable_intercept_for_msr(v, msr) svm_intercept_msr((v), (msr), MSR_INTERCEPT_RW) -/* - * VMCB accessor functions. - */ - -#define VMCB_ACCESSORS_(name, type, cleanbit) \ -static inline void \ -vmcb_set_ ## name(struct vmcb_struct *vmcb, \ - type value) \ -{ \ - vmcb->_ ## name = value; \ - vmcb->cleanbits.cleanbit = false; \ -} \ -static inline type \ -vmcb_get_ ## name(const struct vmcb_struct *vmcb) \ -{ \ - return vmcb->_ ## name; \ -} - -#define VMCB_ACCESSORS(name, cleanbit) \ - VMCB_ACCESSORS_(name, typeof(((struct vmcb_struct){})._ ## name), cleanbit) - -VMCB_ACCESSORS(cr_intercepts, intercepts) -VMCB_ACCESSORS(dr_intercepts, intercepts) -VMCB_ACCESSORS(exception_intercepts, intercepts) -VMCB_ACCESSORS(general1_intercepts, intercepts) -VMCB_ACCESSORS(general2_intercepts, intercepts) -VMCB_ACCESSORS(pause_filter_count, intercepts) -VMCB_ACCESSORS(pause_filter_thresh, intercepts) -VMCB_ACCESSORS(tsc_offset, intercepts) -VMCB_ACCESSORS(iopm_base_pa, iopm) -VMCB_ACCESSORS(msrpm_base_pa, iopm) -VMCB_ACCESSORS(asid, asid) -VMCB_ACCESSORS(vintr, tpr) -VMCB_ACCESSORS(np_ctrl, np) -VMCB_ACCESSORS_(np, bool, np) -VMCB_ACCESSORS_(sev, bool, np) -VMCB_ACCESSORS_(sev_es, bool, np) -VMCB_ACCESSORS_(gmet, bool, np) -VMCB_ACCESSORS_(vte, bool, np) -VMCB_ACCESSORS(h_cr3, np) -VMCB_ACCESSORS(g_pat, np) -VMCB_ACCESSORS(cr0, cr) -VMCB_ACCESSORS(cr3, cr) -VMCB_ACCESSORS(cr4, cr) -VMCB_ACCESSORS(efer, cr) -VMCB_ACCESSORS(dr6, dr) -VMCB_ACCESSORS(dr7, dr) -VMCB_ACCESSORS(cpl, seg) -VMCB_ACCESSORS(cr2, cr2) -VMCB_ACCESSORS(debugctlmsr, lbr) -VMCB_ACCESSORS(lastbranchfromip, lbr) -VMCB_ACCESSORS(lastbranchtoip, lbr) -VMCB_ACCESSORS(lastintfromip, lbr) -VMCB_ACCESSORS(lastinttoip, lbr) -VMCB_ACCESSORS(msr_s_cet, cet) -VMCB_ACCESSORS(ssp, cet) -VMCB_ACCESSORS(msr_isst, cet) - -#undef VMCB_ACCESSORS - #endif /* ASM_X86_HVM_SVM_VMCS_H__ */ /* -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 03:11:14 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 03:11:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1184863.1507128 (Exim 4.92) (envelope-from ) id 1vTtYo-0000Zw-At; Fri, 12 Dec 2025 03:11:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1184863.1507128; Fri, 12 Dec 2025 03:11:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTtYo-0000Zo-8G; Fri, 12 Dec 2025 03:11:14 +0000 Received: by outflank-mailman (input) for mailman id 1184863; Fri, 12 Dec 2025 03:11:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTtYm-0000Zd-Ch for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:11:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTtYm-006CfX-0C for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:11:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTtYm-00Cu7e-10 for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:11:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=pDDQJgGQqRI0vhYNAcJ4OkJI2J1BLRhfK5hUHMIQ2N0=; b=V4XtZSh4fnAZgOeat6KVNXt0fj nz9aKcWQZhgZSG7QGPkIxF5rZkq7xv0Jq0UfV77/uqyNCx9jz4cGfsuFCjl84hDiumZsKTGEqhFFY i8n7UQbptHu13YBU6JvqctftVTb6ZOSk/g7PuKur8PK6fk5jK85P/Djx5vC4Ctgg1Y6k=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/svm: Drop svmdebug.c Message-Id: Date: Fri, 12 Dec 2025 03:11:12 +0000 commit 0a55f32a2c5d14931f4b4a0d468cc6d8213948df Author: Andrew Cooper AuthorDate: Fri Aug 29 12:38:54 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 12 03:04:48 2025 +0000 x86/svm: Drop svmdebug.c Everything here is really VMCB functionality, so merge it into vmcb.c. Move the declarations from the global svmdebug.h to the local vmcb.h. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/hvm/svm/Makefile | 1 - xen/arch/x86/hvm/svm/nestedsvm.c | 1 - xen/arch/x86/hvm/svm/svmdebug.c | 181 ---------------------------- xen/arch/x86/hvm/svm/vmcb.c | 159 ++++++++++++++++++++++++ xen/arch/x86/hvm/svm/vmcb.h | 3 + xen/arch/x86/include/asm/hvm/svm/svmdebug.h | 3 - 6 files changed, 162 insertions(+), 186 deletions(-) diff --git a/xen/arch/x86/hvm/svm/Makefile b/xen/arch/x86/hvm/svm/Makefile index 760d2954da..8a072cafd5 100644 --- a/xen/arch/x86/hvm/svm/Makefile +++ b/xen/arch/x86/hvm/svm/Makefile @@ -4,5 +4,4 @@ obj-bin-y += entry.o obj-y += intr.o obj-y += nestedsvm.o obj-y += svm.o -obj-y += svmdebug.o obj-y += vmcb.o diff --git a/xen/arch/x86/hvm/svm/nestedsvm.c b/xen/arch/x86/hvm/svm/nestedsvm.c index 1914667551..63ed6c86b7 100644 --- a/xen/arch/x86/hvm/svm/nestedsvm.c +++ b/xen/arch/x86/hvm/svm/nestedsvm.c @@ -9,7 +9,6 @@ #include #include #include -#include #include /* paging_mode_hap */ #include /* for local_event_delivery_(en|dis)able */ #include /* p2m_get_pagetable, p2m_get_nestedp2m */ diff --git a/xen/arch/x86/hvm/svm/svmdebug.c b/xen/arch/x86/hvm/svm/svmdebug.c deleted file mode 100644 index bdb9ea3583..0000000000 --- a/xen/arch/x86/hvm/svm/svmdebug.c +++ /dev/null @@ -1,181 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * svmdebug.c: debug functions - * Copyright (c) 2011, Advanced Micro Devices, Inc. - * - */ - -#include -#include -#include -#include - -#include "vmcb.h" - -static void svm_dump_sel(const char *name, const struct segment_register *s) -{ - printk("%s: %04x %04x %08x %016"PRIx64"\n", - name, s->sel, s->attr, s->limit, s->base); -} - -void svm_vmcb_dump(const char *from, const struct vmcb_struct *vmcb) -{ - struct vcpu *curr = current; - - /* - * If we are dumping the VMCB currently in context, some guest state may - * still be cached in hardware. Retrieve it. - */ - if ( vmcb == curr->arch.hvm.svm.vmcb ) - svm_sync_vmcb(curr, vmcb_in_sync); - - printk("Dumping guest's current state at %s...\n", from); - printk("Size of VMCB = %zu, paddr = %"PRIpaddr", vaddr = %p\n", - sizeof(struct vmcb_struct), virt_to_maddr(vmcb), vmcb); - - printk("cr_intercepts = %#x dr_intercepts = %#x " - "exception_intercepts = %#x\n", - vmcb_get_cr_intercepts(vmcb), vmcb_get_dr_intercepts(vmcb), - vmcb_get_exception_intercepts(vmcb)); - printk("general1_intercepts = %#x general2_intercepts = %#x\n", - vmcb_get_general1_intercepts(vmcb), vmcb_get_general2_intercepts(vmcb)); - printk("iopm_base_pa = %#"PRIx64" msrpm_base_pa = %#"PRIx64" tsc_offset = %#"PRIx64"\n", - vmcb_get_iopm_base_pa(vmcb), vmcb_get_msrpm_base_pa(vmcb), - vmcb_get_tsc_offset(vmcb)); - printk("tlb_control = %#x vintr = %#"PRIx64" int_stat = %#"PRIx64"\n", - vmcb->tlb_control, vmcb_get_vintr(vmcb).bytes, - vmcb->int_stat.raw); - printk("event_inj %016"PRIx64", valid? %d, ec? %d, type %u, vector %#x\n", - vmcb->event_inj.raw, vmcb->event_inj.v, - vmcb->event_inj.ev, vmcb->event_inj.type, - vmcb->event_inj.vector); - printk("exitcode = %#"PRIx64" exit_int_info = %#"PRIx64"\n", - vmcb->exitcode, vmcb->exit_int_info.raw); - printk("exitinfo1 = %#"PRIx64" exitinfo2 = %#"PRIx64"\n", - vmcb->exitinfo1, vmcb->exitinfo2); - printk("asid = %#x np_ctrl = %#"PRIx64":%s%s%s\n", - vmcb_get_asid(vmcb), vmcb_get_np_ctrl(vmcb), - vmcb_get_np(vmcb) ? " NP" : "", - vmcb_get_sev(vmcb) ? " SEV" : "", - vmcb_get_sev_es(vmcb) ? " SEV_ES" : ""); - printk("virtual vmload/vmsave = %d, virt_ext = %#"PRIx64"\n", - vmcb->virt_ext.fields.vloadsave_enable, vmcb->virt_ext.bytes); - printk("cpl = %d efer = %#"PRIx64" star = %#"PRIx64" lstar = %#"PRIx64"\n", - vmcb_get_cpl(vmcb), vmcb_get_efer(vmcb), vmcb->star, vmcb->lstar); - printk("CR0 = 0x%016"PRIx64" CR2 = 0x%016"PRIx64"\n", - vmcb_get_cr0(vmcb), vmcb_get_cr2(vmcb)); - printk("CR3 = 0x%016"PRIx64" CR4 = 0x%016"PRIx64"\n", - vmcb_get_cr3(vmcb), vmcb_get_cr4(vmcb)); - printk("RSP = 0x%016"PRIx64" RIP = 0x%016"PRIx64"\n", - vmcb->rsp, vmcb->rip); - printk("RAX = 0x%016"PRIx64" RFLAGS=0x%016"PRIx64"\n", - vmcb->rax, vmcb->rflags); - printk("DR6 = 0x%016"PRIx64", DR7 = 0x%016"PRIx64"\n", - vmcb_get_dr6(vmcb), vmcb_get_dr7(vmcb)); - printk("CSTAR = 0x%016"PRIx64" SFMask = 0x%016"PRIx64"\n", - vmcb->cstar, vmcb->sfmask); - printk("KernGSBase = 0x%016"PRIx64" PAT = 0x%016"PRIx64"\n", - vmcb->kerngsbase, vmcb_get_g_pat(vmcb)); - printk("SSP = 0x%016"PRIx64" S_CET = 0x%016"PRIx64" ISST = 0x%016"PRIx64"\n", - vmcb->_ssp, vmcb->_msr_s_cet, vmcb->_msr_isst); - printk("H_CR3 = 0x%016"PRIx64" CleanBits = %#x\n", - vmcb_get_h_cr3(vmcb), vmcb->cleanbits.raw); - - /* print out all the selectors */ - printk(" sel attr limit base\n"); - svm_dump_sel(" CS", &vmcb->cs); - svm_dump_sel(" DS", &vmcb->ds); - svm_dump_sel(" SS", &vmcb->ss); - svm_dump_sel(" ES", &vmcb->es); - svm_dump_sel(" FS", &vmcb->fs); - svm_dump_sel(" GS", &vmcb->gs); - svm_dump_sel("GDTR", &vmcb->gdtr); - svm_dump_sel("LDTR", &vmcb->ldtr); - svm_dump_sel("IDTR", &vmcb->idtr); - svm_dump_sel(" TR", &vmcb->tr); -} - -bool svm_vmcb_isvalid(const char *from, const struct vmcb_struct *vmcb, - const struct vcpu *v, bool verbose) -{ - bool ret = false; /* ok */ - unsigned long cr0 = vmcb_get_cr0(vmcb); - unsigned long cr3 = vmcb_get_cr3(vmcb); - unsigned long cr4 = vmcb_get_cr4(vmcb); - unsigned long valid; - uint64_t efer = vmcb_get_efer(vmcb); - -#define PRINTF(fmt, args...) do { \ - if ( !verbose ) return true; \ - ret = true; \ - printk(XENLOG_GUEST "%pv[%s]: " fmt, v, from, ## args); \ -} while (0) - - if ( !(efer & EFER_SVME) ) - PRINTF("EFER: SVME bit not set (%#"PRIx64")\n", efer); - - if ( !(cr0 & X86_CR0_CD) && (cr0 & X86_CR0_NW) ) - PRINTF("CR0: CD bit is zero and NW bit set (%#"PRIx64")\n", cr0); - - if ( cr0 >> 32 ) - PRINTF("CR0: bits [63:32] are not zero (%#"PRIx64")\n", cr0); - - if ( (cr0 & X86_CR0_PG) && - ((cr3 & 7) || - ((!(cr4 & X86_CR4_PAE) || (efer & EFER_LMA)) && (cr3 & 0xfe0)) || - ((efer & EFER_LMA) && - (cr3 >> v->domain->arch.cpuid->extd.maxphysaddr))) ) - PRINTF("CR3: MBZ bits are set (%#"PRIx64")\n", cr3); - - valid = hvm_cr4_guest_valid_bits(v->domain); - if ( cr4 & ~valid ) - PRINTF("CR4: invalid value %#lx (valid %#lx, rejected %#lx)\n", - cr4, valid, cr4 & ~valid); - - if ( vmcb_get_dr6(vmcb) >> 32 ) - PRINTF("DR6: bits [63:32] are not zero (%#"PRIx64")\n", - vmcb_get_dr6(vmcb)); - - if ( vmcb_get_dr7(vmcb) >> 32 ) - PRINTF("DR7: bits [63:32] are not zero (%#"PRIx64")\n", - vmcb_get_dr7(vmcb)); - - if ( efer & ~EFER_KNOWN_MASK ) - PRINTF("EFER: unknown bits are not zero (%#"PRIx64")\n", efer); - - if ( hvm_efer_valid(v, efer, -1) ) - PRINTF("EFER: %s (%"PRIx64")\n", hvm_efer_valid(v, efer, -1), efer); - - if ( (efer & EFER_LME) && (cr0 & X86_CR0_PG) ) - { - if ( !(cr4 & X86_CR4_PAE) ) - PRINTF("EFER_LME and CR0.PG are both set and CR4.PAE is zero\n"); - if ( !(cr0 & X86_CR0_PE) ) - PRINTF("EFER_LME and CR0.PG are both set and CR0.PE is zero\n"); - } - - if ( (efer & EFER_LME) && (cr0 & X86_CR0_PG) && (cr4 & X86_CR4_PAE) && - vmcb->cs.l && vmcb->cs.db ) - PRINTF("EFER_LME, CR0.PG, CR4.PAE, CS.L and CS.D are all non-zero\n"); - - if ( !(vmcb_get_general2_intercepts(vmcb) & GENERAL2_INTERCEPT_VMRUN) ) - PRINTF("GENERAL2_INTERCEPT: VMRUN intercept bit is clear (%#"PRIx32")\n", - vmcb_get_general2_intercepts(vmcb)); - - if ( vmcb->event_inj.resvd1 ) - PRINTF("eventinj: MBZ bits are set (%#"PRIx64")\n", - vmcb->event_inj.raw); - -#undef PRINTF - return ret; -} - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * tab-width: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c index 44fa76bf02..b1a79d5151 100644 --- a/xen/arch/x86/hvm/svm/vmcb.c +++ b/xen/arch/x86/hvm/svm/vmcb.c @@ -228,6 +228,165 @@ void svm_destroy_vmcb(struct vcpu *v) svm->vmcb = NULL; } +static void svm_dump_sel(const char *name, const struct segment_register *s) +{ + printk("%s: %04x %04x %08x %016"PRIx64"\n", + name, s->sel, s->attr, s->limit, s->base); +} + +void svm_vmcb_dump(const char *from, const struct vmcb_struct *vmcb) +{ + struct vcpu *curr = current; + + /* + * If we are dumping the VMCB currently in context, some guest state may + * still be cached in hardware. Retrieve it. + */ + if ( vmcb == curr->arch.hvm.svm.vmcb ) + svm_sync_vmcb(curr, vmcb_in_sync); + + printk("Dumping guest's current state at %s...\n", from); + printk("Size of VMCB = %zu, paddr = %"PRIpaddr", vaddr = %p\n", + sizeof(struct vmcb_struct), virt_to_maddr(vmcb), vmcb); + + printk("cr_intercepts = %#x dr_intercepts = %#x " + "exception_intercepts = %#x\n", + vmcb_get_cr_intercepts(vmcb), vmcb_get_dr_intercepts(vmcb), + vmcb_get_exception_intercepts(vmcb)); + printk("general1_intercepts = %#x general2_intercepts = %#x\n", + vmcb_get_general1_intercepts(vmcb), vmcb_get_general2_intercepts(vmcb)); + printk("iopm_base_pa = %#"PRIx64" msrpm_base_pa = %#"PRIx64" tsc_offset = %#"PRIx64"\n", + vmcb_get_iopm_base_pa(vmcb), vmcb_get_msrpm_base_pa(vmcb), + vmcb_get_tsc_offset(vmcb)); + printk("tlb_control = %#x vintr = %#"PRIx64" int_stat = %#"PRIx64"\n", + vmcb->tlb_control, vmcb_get_vintr(vmcb).bytes, + vmcb->int_stat.raw); + printk("event_inj %016"PRIx64", valid? %d, ec? %d, type %u, vector %#x\n", + vmcb->event_inj.raw, vmcb->event_inj.v, + vmcb->event_inj.ev, vmcb->event_inj.type, + vmcb->event_inj.vector); + printk("exitcode = %#"PRIx64" exit_int_info = %#"PRIx64"\n", + vmcb->exitcode, vmcb->exit_int_info.raw); + printk("exitinfo1 = %#"PRIx64" exitinfo2 = %#"PRIx64"\n", + vmcb->exitinfo1, vmcb->exitinfo2); + printk("asid = %#x np_ctrl = %#"PRIx64":%s%s%s\n", + vmcb_get_asid(vmcb), vmcb_get_np_ctrl(vmcb), + vmcb_get_np(vmcb) ? " NP" : "", + vmcb_get_sev(vmcb) ? " SEV" : "", + vmcb_get_sev_es(vmcb) ? " SEV_ES" : ""); + printk("virtual vmload/vmsave = %d, virt_ext = %#"PRIx64"\n", + vmcb->virt_ext.fields.vloadsave_enable, vmcb->virt_ext.bytes); + printk("cpl = %d efer = %#"PRIx64" star = %#"PRIx64" lstar = %#"PRIx64"\n", + vmcb_get_cpl(vmcb), vmcb_get_efer(vmcb), vmcb->star, vmcb->lstar); + printk("CR0 = 0x%016"PRIx64" CR2 = 0x%016"PRIx64"\n", + vmcb_get_cr0(vmcb), vmcb_get_cr2(vmcb)); + printk("CR3 = 0x%016"PRIx64" CR4 = 0x%016"PRIx64"\n", + vmcb_get_cr3(vmcb), vmcb_get_cr4(vmcb)); + printk("RSP = 0x%016"PRIx64" RIP = 0x%016"PRIx64"\n", + vmcb->rsp, vmcb->rip); + printk("RAX = 0x%016"PRIx64" RFLAGS=0x%016"PRIx64"\n", + vmcb->rax, vmcb->rflags); + printk("DR6 = 0x%016"PRIx64", DR7 = 0x%016"PRIx64"\n", + vmcb_get_dr6(vmcb), vmcb_get_dr7(vmcb)); + printk("CSTAR = 0x%016"PRIx64" SFMask = 0x%016"PRIx64"\n", + vmcb->cstar, vmcb->sfmask); + printk("KernGSBase = 0x%016"PRIx64" PAT = 0x%016"PRIx64"\n", + vmcb->kerngsbase, vmcb_get_g_pat(vmcb)); + printk("SSP = 0x%016"PRIx64" S_CET = 0x%016"PRIx64" ISST = 0x%016"PRIx64"\n", + vmcb->_ssp, vmcb->_msr_s_cet, vmcb->_msr_isst); + printk("H_CR3 = 0x%016"PRIx64" CleanBits = %#x\n", + vmcb_get_h_cr3(vmcb), vmcb->cleanbits.raw); + + /* print out all the selectors */ + printk(" sel attr limit base\n"); + svm_dump_sel(" CS", &vmcb->cs); + svm_dump_sel(" DS", &vmcb->ds); + svm_dump_sel(" SS", &vmcb->ss); + svm_dump_sel(" ES", &vmcb->es); + svm_dump_sel(" FS", &vmcb->fs); + svm_dump_sel(" GS", &vmcb->gs); + svm_dump_sel("GDTR", &vmcb->gdtr); + svm_dump_sel("LDTR", &vmcb->ldtr); + svm_dump_sel("IDTR", &vmcb->idtr); + svm_dump_sel(" TR", &vmcb->tr); +} + +bool svm_vmcb_isvalid( + const char *from, const struct vmcb_struct *vmcb, const struct vcpu *v, + bool verbose) +{ + bool ret = false; /* ok */ + unsigned long cr0 = vmcb_get_cr0(vmcb); + unsigned long cr3 = vmcb_get_cr3(vmcb); + unsigned long cr4 = vmcb_get_cr4(vmcb); + unsigned long valid; + uint64_t efer = vmcb_get_efer(vmcb); + +#define PRINTF(fmt, args...) do { \ + if ( !verbose ) return true; \ + ret = true; \ + printk(XENLOG_GUEST "%pv[%s]: " fmt, v, from, ## args); \ +} while (0) + + if ( !(efer & EFER_SVME) ) + PRINTF("EFER: SVME bit not set (%#"PRIx64")\n", efer); + + if ( !(cr0 & X86_CR0_CD) && (cr0 & X86_CR0_NW) ) + PRINTF("CR0: CD bit is zero and NW bit set (%#"PRIx64")\n", cr0); + + if ( cr0 >> 32 ) + PRINTF("CR0: bits [63:32] are not zero (%#"PRIx64")\n", cr0); + + if ( (cr0 & X86_CR0_PG) && + ((cr3 & 7) || + ((!(cr4 & X86_CR4_PAE) || (efer & EFER_LMA)) && (cr3 & 0xfe0)) || + ((efer & EFER_LMA) && + (cr3 >> v->domain->arch.cpuid->extd.maxphysaddr))) ) + PRINTF("CR3: MBZ bits are set (%#"PRIx64")\n", cr3); + + valid = hvm_cr4_guest_valid_bits(v->domain); + if ( cr4 & ~valid ) + PRINTF("CR4: invalid value %#lx (valid %#lx, rejected %#lx)\n", + cr4, valid, cr4 & ~valid); + + if ( vmcb_get_dr6(vmcb) >> 32 ) + PRINTF("DR6: bits [63:32] are not zero (%#"PRIx64")\n", + vmcb_get_dr6(vmcb)); + + if ( vmcb_get_dr7(vmcb) >> 32 ) + PRINTF("DR7: bits [63:32] are not zero (%#"PRIx64")\n", + vmcb_get_dr7(vmcb)); + + if ( efer & ~EFER_KNOWN_MASK ) + PRINTF("EFER: unknown bits are not zero (%#"PRIx64")\n", efer); + + if ( hvm_efer_valid(v, efer, -1) ) + PRINTF("EFER: %s (%"PRIx64")\n", hvm_efer_valid(v, efer, -1), efer); + + if ( (efer & EFER_LME) && (cr0 & X86_CR0_PG) ) + { + if ( !(cr4 & X86_CR4_PAE) ) + PRINTF("EFER_LME and CR0.PG are both set and CR4.PAE is zero\n"); + if ( !(cr0 & X86_CR0_PE) ) + PRINTF("EFER_LME and CR0.PG are both set and CR0.PE is zero\n"); + } + + if ( (efer & EFER_LME) && (cr0 & X86_CR0_PG) && (cr4 & X86_CR4_PAE) && + vmcb->cs.l && vmcb->cs.db ) + PRINTF("EFER_LME, CR0.PG, CR4.PAE, CS.L and CS.D are all non-zero\n"); + + if ( !(vmcb_get_general2_intercepts(vmcb) & GENERAL2_INTERCEPT_VMRUN) ) + PRINTF("GENERAL2_INTERCEPT: VMRUN intercept bit is clear (%#"PRIx32")\n", + vmcb_get_general2_intercepts(vmcb)); + + if ( vmcb->event_inj.resvd1 ) + PRINTF("eventinj: MBZ bits are set (%#"PRIx64")\n", + vmcb->event_inj.raw); + +#undef PRINTF + return ret; +} + static void cf_check vmcb_dump(unsigned char ch) { struct domain *d; diff --git a/xen/arch/x86/hvm/svm/vmcb.h b/xen/arch/x86/hvm/svm/vmcb.h index 68012948a9..ba554a9644 100644 --- a/xen/arch/x86/hvm/svm/vmcb.h +++ b/xen/arch/x86/hvm/svm/vmcb.h @@ -553,6 +553,9 @@ int svm_create_vmcb(struct vcpu *v); void svm_destroy_vmcb(struct vcpu *v); void setup_vmcb_dump(void); +void svm_vmcb_dump(const char *from, const struct vmcb_struct *vmcb); +bool svm_vmcb_isvalid(const char *from, const struct vmcb_struct *vmcb, + const struct vcpu *v, bool verbose); /* * VMCB accessor functions. diff --git a/xen/arch/x86/include/asm/hvm/svm/svmdebug.h b/xen/arch/x86/include/asm/hvm/svm/svmdebug.h index 2fb76ec24c..ede13bd340 100644 --- a/xen/arch/x86/include/asm/hvm/svm/svmdebug.h +++ b/xen/arch/x86/include/asm/hvm/svm/svmdebug.h @@ -12,8 +12,5 @@ #include void svm_sync_vmcb(struct vcpu *v, enum vmcb_sync_state new_state); -void svm_vmcb_dump(const char *from, const struct vmcb_struct *vmcb); -bool svm_vmcb_isvalid(const char *from, const struct vmcb_struct *vmcb, - const struct vcpu *v, bool verbose); #endif /* __ASM_X86_HVM_SVM_SVMDEBUG_H__ */ -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 03:11:24 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 03:11:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1184864.1507133 (Exim 4.92) (envelope-from ) id 1vTtYy-0000cH-Da; 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Fri, 12 Dec 2025 03:11:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=xCmF91T734+7/54Ws46CqkG4kfyVDyigP47tNNDMzA8=; b=ztrv+urafH6u+daFoExsoENgCP 0Xkut1wt9Yur41/KN9ir7d/z7W0PkhS61qrXzPy9VueIjMzuefdqdk61w+L1F1EUH+l8ouIcyma4z TJIuvubMSw5uypccEXtjHbZ0rAhv3XlYAfMYBubIvFQyGop34me5yIrK77twj2gjhhww=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/svm: Drop svmdebug.h Message-Id: Date: Fri, 12 Dec 2025 03:11:22 +0000 commit 6ccebacb531a51baa0ef6cd69d2558a25b5d4bba Author: Andrew Cooper AuthorDate: Fri Aug 29 12:46:14 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 12 03:04:48 2025 +0000 x86/svm: Drop svmdebug.h svmdebug.h now only contains the declaration for svm_sync_vmcb(), despite the logic being local to svm.c. Move the declaration into the local svm.h No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Alejandro Vallejo Acked-by: Jan Beulich --- xen/arch/x86/hvm/svm/svm.c | 1 - xen/arch/x86/hvm/svm/svm.h | 17 +++++++++++++++++ xen/arch/x86/hvm/svm/vmcb.c | 2 +- xen/arch/x86/include/asm/hvm/svm/svmdebug.h | 16 ---------------- xen/arch/x86/include/asm/hvm/svm/vmcb.h | 15 --------------- 5 files changed, 18 insertions(+), 33 deletions(-) diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 14b3a427e6..15d45cbb57 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -27,7 +27,6 @@ #include #include #include -#include #include #include #include diff --git a/xen/arch/x86/hvm/svm/svm.h b/xen/arch/x86/hvm/svm/svm.h index f5b0312d2d..cfa411ad5a 100644 --- a/xen/arch/x86/hvm/svm/svm.h +++ b/xen/arch/x86/hvm/svm/svm.h @@ -78,6 +78,23 @@ unsigned int svm_get_task_switch_insn_len(void); #define _NPT_PFEC_in_gpt 33 #define NPT_PFEC_in_gpt (1UL<<_NPT_PFEC_in_gpt) +/* + * VMRUN doesn't switch fs/gs/tr/ldtr and SHADOWGS/SYSCALL/SYSENTER state. + * Therefore, guest state is in the hardware registers when servicing a + * VMExit. + * + * Immediately after a VMExit, the vmcb is stale, and needs to be brought + * into sync by VMSAVE. If state in the vmcb is modified, a VMLOAD is + * needed before the following VMRUN. + */ +enum vmcb_sync_state { + vmcb_in_sync, + vmcb_needs_vmsave, /* VMCB out of sync (VMSAVE needed)? */ + vmcb_needs_vmload, /* VMCB dirty (VMLOAD needed)? */ +}; + +void svm_sync_vmcb(struct vcpu *v, enum vmcb_sync_state new_state); + #endif /* __X86_HVM_SVM_SVM_PRIV_H__ */ /* diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c index b1a79d5151..7bde6e98ce 100644 --- a/xen/arch/x86/hvm/svm/vmcb.c +++ b/xen/arch/x86/hvm/svm/vmcb.c @@ -16,12 +16,12 @@ #include #include -#include #include #include #include #include +#include "svm.h" #include "vmcb.h" struct vmcb_struct *alloc_vmcb(void) diff --git a/xen/arch/x86/include/asm/hvm/svm/svmdebug.h b/xen/arch/x86/include/asm/hvm/svm/svmdebug.h deleted file mode 100644 index ede13bd340..0000000000 --- a/xen/arch/x86/include/asm/hvm/svm/svmdebug.h +++ /dev/null @@ -1,16 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * svmdebug.h: SVM related debug defintions - * Copyright (c) 2011, AMD Corporation. - * - */ - -#ifndef __ASM_X86_HVM_SVM_SVMDEBUG_H__ -#define __ASM_X86_HVM_SVM_SVMDEBUG_H__ - -#include -#include - -void svm_sync_vmcb(struct vcpu *v, enum vmcb_sync_state new_state); - -#endif /* __ASM_X86_HVM_SVM_SVMDEBUG_H__ */ diff --git a/xen/arch/x86/include/asm/hvm/svm/vmcb.h b/xen/arch/x86/include/asm/hvm/svm/vmcb.h index 717215ff96..41bcc9f0d8 100644 --- a/xen/arch/x86/include/asm/hvm/svm/vmcb.h +++ b/xen/arch/x86/include/asm/hvm/svm/vmcb.h @@ -21,21 +21,6 @@ struct svm_domain { } osvw; }; -/* - * VMRUN doesn't switch fs/gs/tr/ldtr and SHADOWGS/SYSCALL/SYSENTER state. - * Therefore, guest state is in the hardware registers when servicing a - * VMExit. - * - * Immediately after a VMExit, the vmcb is stale, and needs to be brought - * into sync by VMSAVE. If state in the vmcb is modified, a VMLOAD is - * needed before the following VMRUN. - */ -enum vmcb_sync_state { - vmcb_in_sync, - vmcb_needs_vmsave, /* VMCB out of sync (VMSAVE needed)? */ - vmcb_needs_vmload /* VMCB dirty (VMLOAD needed)? */ -}; - struct svm_vcpu { struct vmcb_struct *vmcb; u64 vmcb_pa; -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 03:11:34 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 03:11:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1184865.1507135 (Exim 4.92) (envelope-from ) id 1vTtZ8-0000eA-Dr; Fri, 12 Dec 2025 03:11:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1184865.1507135; Fri, 12 Dec 2025 03:11:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTtZ8-0000e3-BF; Fri, 12 Dec 2025 03:11:34 +0000 Received: by outflank-mailman (input) for mailman id 1184865; Fri, 12 Dec 2025 03:11:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTtZ6-0000dx-In for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:11:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTtZ6-006Cfh-0r for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:11:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTtZ6-00CwEa-1g for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:11:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=kuRlYjnqO35p8Hdn2yal5mjqDSUzYq+Vj2HdIJpuzqo=; b=5kzkmYfxE8H11J9GDLRSYquwp+ 4hzemWLwtDUyuQ+Nq4GRGAdUAUOIxo4CvDPBqzZUC6yEKwaCOWwIfpQabiVAciA0GBVZJBMIx8WYY VUzKQbSlV/DXe2ygfDgGK8Gz8RrwVruW4zloPf9bqTa+S5B8acIQCxx6FtrNBea9BM58=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] tools/sd-notify.h: Include string.h too Message-Id: Date: Fri, 12 Dec 2025 03:11:32 +0000 commit 8efff5a69ab7596f6c63031d0aef292114948cd9 Author: Andrew Cooper AuthorDate: Fri Dec 5 21:33:25 2025 +0000 Commit: Andrew Cooper CommitDate: Fri Dec 12 03:04:48 2025 +0000 tools/sd-notify.h: Include string.h too Alpine Linux, when using --enable-systemd to get the init files, fails with: tools/include/xen-sd-notify.h:69:3: error: call to undeclared library function 'memcpy' with type 'void *(void *, const void *, unsigned long)'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration] 69 | memcpy(socket_addr.sun.sun_path, socket_path, path_length); | ^ This will be down to using musl rather than glibc. Include the appropriate header. Fixes: 78510f3a1522 ("tools: Import stand-alone sd_notify() implementation from systemd") Reported-by: Marek Marczykowski-Górecki Signed-off-by: Andrew Cooper Reviewed-by: Marek Marczykowski-Górecki Acked-by: Anthony PERARD --- tools/include/xen-sd-notify.h | 1 + 1 file changed, 1 insertion(+) diff --git a/tools/include/xen-sd-notify.h b/tools/include/xen-sd-notify.h index 28c9b20f15..20441d0ec9 100644 --- a/tools/include/xen-sd-notify.h +++ b/tools/include/xen-sd-notify.h @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 03:11:44 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 03:11:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1184866.1507139 (Exim 4.92) (envelope-from ) id 1vTtZI-0000g6-Fs; Fri, 12 Dec 2025 03:11:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1184866.1507139; Fri, 12 Dec 2025 03:11:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTtZI-0000fy-Ci; Fri, 12 Dec 2025 03:11:44 +0000 Received: by outflank-mailman (input) for mailman id 1184866; Fri, 12 Dec 2025 03:11:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTtZG-0000fq-M0 for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:11:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTtZG-006Cfr-1A for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:11:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTtZG-00CxTV-1z for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:11:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=c1mRMig+bmCvD0yIww+fiUWo6tICYz1XbDA5Nc1ZE88=; b=vXVumxOXYcnWcBHpdbOtq4ke3r tvwSWIESK4W9ZecalsVG7rKeNfeReMnjlOt/DE1YgOHfHE/8TnXcmHbFtDrCsbgLSkbDZhArtU3/3 G1ch4JpnsiIdcl5sigDoV4o6VoysrmkB6Du0FWbJ5PNcdnnTlZQyd2cRM0uuRVNxFicg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/libfdt: Fix comment following treewide __ASSEMBLY__ cleanup Message-Id: Date: Fri, 12 Dec 2025 03:11:42 +0000 commit cfa37c182c1aeb48fb4e0e2ff04acd19a40eb13e Author: Andrew Cooper AuthorDate: Tue Dec 9 13:22:29 2025 +0000 Commit: Andrew Cooper CommitDate: Fri Dec 12 03:04:48 2025 +0000 xen/libfdt: Fix comment following treewide __ASSEMBLY__ cleanup This one comment didn't match the #ifdef symbol, and escaped conversion. No functional change. Signed-off-by: Andrew Cooper Acked-by: Michal Orzel --- xen/include/xen/libfdt/fdt.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/include/xen/libfdt/fdt.h b/xen/include/xen/libfdt/fdt.h index 57fe566306..c6e4d7838d 100644 --- a/xen/include/xen/libfdt/fdt.h +++ b/xen/include/xen/libfdt/fdt.h @@ -45,7 +45,7 @@ struct fdt_property { char data[0]; }; -#endif /* !__ASSEMBLY */ +#endif /* !__ASSEMBLER__ */ #define FDT_MAGIC 0xd00dfeed /* 4: version, 4: total size */ #define FDT_TAGSIZE sizeof(fdt32_t) -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 03:11:54 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 03:11:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1184867.1507144 (Exim 4.92) (envelope-from ) id 1vTtZS-0000ka-IV; Fri, 12 Dec 2025 03:11:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1184867.1507144; Fri, 12 Dec 2025 03:11:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTtZS-0000kR-Fs; Fri, 12 Dec 2025 03:11:54 +0000 Received: by outflank-mailman (input) for mailman id 1184867; Fri, 12 Dec 2025 03:11:52 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTtZQ-0000kA-PF for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:11:52 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTtZQ-006CgG-1V for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:11:52 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTtZQ-00CywK-2I for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:11:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=6t6H99GDn1gmsE8GJPe/r0p57wxcVih0ERz593+z3bw=; b=prdXKy3oDTUDRwXDkJjTgc5Tah nzVohUICAmeQs0o5/J9t7gj/AjnY0jKByjMisPKm7Z6jssJOMy1govnGSTLUViZZWkWjr09U5WjWt PjXz3j9C3LK8Q6gQHg817cy4a6c7kaI3pSjPihWt9QwKHVVuKq8uhF9g8hkTqf1xYB1w=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86: Misra fixes for U/L suffixes Message-Id: Date: Fri, 12 Dec 2025 03:11:52 +0000 commit b6f399b341fc3ddf528a31f520819e572f3f6835 Author: Andrew Cooper AuthorDate: Fri Dec 5 18:28:53 2025 +0000 Commit: Andrew Cooper CommitDate: Fri Dec 12 03:04:48 2025 +0000 x86: Misra fixes for U/L suffixes With the wider testing, some more violations have been spotted. This addresses violations of Rule 7.2 (suffixes required) and Rule 7.3 (L must be uppercase). No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Nicola Vetrini --- xen/arch/x86/mm/shadow/common.c | 4 ++-- xen/arch/x86/pv/descriptor-tables.c | 2 +- xen/arch/x86/pv/emulate.c | 2 +- xen/drivers/passthrough/vtd/iommu.h | 2 +- xen/include/xen/elfstructs.h | 2 +- xen/include/xen/sizes.h | 2 +- 6 files changed, 7 insertions(+), 7 deletions(-) diff --git a/xen/arch/x86/mm/shadow/common.c b/xen/arch/x86/mm/shadow/common.c index 0176e33bc9..423764a326 100644 --- a/xen/arch/x86/mm/shadow/common.c +++ b/xen/arch/x86/mm/shadow/common.c @@ -1961,7 +1961,7 @@ int sh_remove_write_access(struct domain *d, mfn_t gmfn, /* FreeBSD 64bit: linear map 0xffff800000000000 */ switch ( level ) { - case 1: GUESS(0xffff800000000000 + case 1: GUESS(0xffff800000000000UL + ((fault_addr & VADDR_MASK) >> 9), 6); break; case 2: GUESS(0xffff804000000000UL + ((fault_addr & VADDR_MASK) >> 18), 6); break; @@ -1969,7 +1969,7 @@ int sh_remove_write_access(struct domain *d, mfn_t gmfn, + ((fault_addr & VADDR_MASK) >> 27), 6); break; } /* FreeBSD 64bit: direct map at 0xffffff0000000000 */ - GUESS(0xffffff0000000000 + gfn_to_gaddr(gfn), 6); + GUESS(0xffffff0000000000UL + gfn_to_gaddr(gfn), 6); } #undef GUESS diff --git a/xen/arch/x86/pv/descriptor-tables.c b/xen/arch/x86/pv/descriptor-tables.c index 02647a2c50..26f7d18b11 100644 --- a/xen/arch/x86/pv/descriptor-tables.c +++ b/xen/arch/x86/pv/descriptor-tables.c @@ -216,7 +216,7 @@ static bool check_descriptor(const struct domain *dom, seg_desc_t *d) * 0xf6800000. Extend these to allow access to the larger read-only * M2P table available in 32on64 mode. */ - base = (b & 0xff000000) | ((b & 0xff) << 16) | (a >> 16); + base = (b & 0xff000000U) | ((b & 0xff) << 16) | (a >> 16); limit = (b & 0xf0000) | (a & 0xffff); limit++; /* We add one because limit is inclusive. */ diff --git a/xen/arch/x86/pv/emulate.c b/xen/arch/x86/pv/emulate.c index 8c44dea123..e741e686c1 100644 --- a/xen/arch/x86/pv/emulate.c +++ b/xen/arch/x86/pv/emulate.c @@ -37,7 +37,7 @@ int pv_emul_read_descriptor(unsigned int sel, const struct vcpu *v, if ( !(desc.b & _SEGMENT_L) ) { *base = ((desc.a >> 16) + ((desc.b & 0xff) << 16) + - (desc.b & 0xff000000)); + (desc.b & 0xff000000U)); *limit = (desc.a & 0xffff) | (desc.b & 0x000f0000); if ( desc.b & _SEGMENT_G ) *limit = ((*limit + 1) << 12) - 1; diff --git a/xen/drivers/passthrough/vtd/iommu.h b/xen/drivers/passthrough/vtd/iommu.h index 29d350b23d..4f41360c53 100644 --- a/xen/drivers/passthrough/vtd/iommu.h +++ b/xen/drivers/passthrough/vtd/iommu.h @@ -266,7 +266,7 @@ struct dma_pte { #define DMA_PTE_PROT (DMA_PTE_READ | DMA_PTE_WRITE) #define DMA_PTE_SP (1 << 7) #define DMA_PTE_SNP (1 << 11) -#define DMA_PTE_CONTIG_MASK (0xfull << PADDR_BITS) +#define DMA_PTE_CONTIG_MASK (0xfULL << PADDR_BITS) #define dma_clear_pte(p) do {(p).val = 0;} while(0) #define dma_set_pte_readable(p) do {(p).val |= DMA_PTE_READ;} while(0) #define dma_set_pte_writable(p) do {(p).val |= DMA_PTE_WRITE;} while(0) diff --git a/xen/include/xen/elfstructs.h b/xen/include/xen/elfstructs.h index eb6b87a823..62225bb8a0 100644 --- a/xen/include/xen/elfstructs.h +++ b/xen/include/xen/elfstructs.h @@ -360,7 +360,7 @@ typedef struct { } Elf64_Rela; #define ELF64_R_SYM(info) ((info) >> 32) -#define ELF64_R_TYPE(info) ((info) & 0xFFFFFFFF) +#define ELF64_R_TYPE(info) ((info) & 0xFFFFFFFFU) #define ELF64_R_INFO(s,t) (((s) << 32) + (uint32_t)(t)) /* diff --git a/xen/include/xen/sizes.h b/xen/include/xen/sizes.h index f7b728ddab..d309ebf044 100644 --- a/xen/include/xen/sizes.h +++ b/xen/include/xen/sizes.h @@ -43,6 +43,6 @@ #define SZ_512M 0x20000000 #define SZ_1G 0x40000000 -#define SZ_2G 0x80000000 +#define SZ_2G 0x80000000U #endif /* __XEN_SIZES_H__ */ -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 03:12:03 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 03:12:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1184868.1507148 (Exim 4.92) (envelope-from ) id 1vTtZb-0000n0-Jh; Fri, 12 Dec 2025 03:12:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1184868.1507148; Fri, 12 Dec 2025 03:12:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTtZb-0000ms-H9; Fri, 12 Dec 2025 03:12:03 +0000 Received: by outflank-mailman (input) for mailman id 1184868; Fri, 12 Dec 2025 03:12:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTtZa-0000mm-TA for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:12:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTtZa-006CgX-1t for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:12:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTtZa-00D01m-2e for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:12:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Ybw8tYByzAUwXDOd/3gmJYauHeSQ/hH18kTWdZxv3Fg=; b=qtTlaVOVJCWFKTnXeOGNuzwUyv obYrDQcMTEL9tB/198E6TaOMvHceA1FYPdGzl0pFcLjajyA/dFO5iLxcSoc+N2xGrTM67GgMQfz2E eOO2L3gXsWD9OV650mHJPCm8Nozdg0/p+1Kfvut2mwK/Jll+h+GdPbaid3k3pAz7+egA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86: Name parameters in function declarations Message-Id: Date: Fri, 12 Dec 2025 03:12:02 +0000 commit eb518632cdbc5dc8811075ac08ec0b5341528efa Author: Andrew Cooper AuthorDate: Fri Dec 5 18:34:47 2025 +0000 Commit: Andrew Cooper CommitDate: Fri Dec 12 03:04:48 2025 +0000 x86: Name parameters in function declarations With the wider testing, some more violations have been spotted. This addresses violations of Rule 8.2 (parameters must be named). livepatch_op() has a further problem. The other declaration (the stub for !LIVEPATCH builds) has a parameter named op, but the definition has the parameter named livepatch. Rename it to op which is more concise and better in line with it's type name. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Nicola Vetrini --- xen/arch/x86/mm/shadow/common.c | 8 ++++---- xen/arch/x86/pv/emul-priv-op.c | 4 ++-- xen/common/livepatch.c | 16 ++++++++-------- xen/include/xen/livepatch.h | 2 +- 4 files changed, 15 insertions(+), 15 deletions(-) diff --git a/xen/arch/x86/mm/shadow/common.c b/xen/arch/x86/mm/shadow/common.c index 423764a326..f2aee5be46 100644 --- a/xen/arch/x86/mm/shadow/common.c +++ b/xen/arch/x86/mm/shadow/common.c @@ -69,11 +69,11 @@ const uint8_t sh_type_to_size[] = { DEFINE_PER_CPU(uint32_t,trace_shadow_path_flags); -static int cf_check sh_enable_log_dirty(struct domain *); -static int cf_check sh_disable_log_dirty(struct domain *); -static void cf_check sh_clean_dirty_bitmap(struct domain *); +static int cf_check sh_enable_log_dirty(struct domain *d); +static int cf_check sh_disable_log_dirty(struct domain *d); +static void cf_check sh_clean_dirty_bitmap(struct domain *d); -static void cf_check shadow_update_paging_modes(struct vcpu *); +static void cf_check shadow_update_paging_modes(struct vcpu *v); /* Set up the shadow-specific parts of a domain struct at start of day. * Called for every domain from arch_domain_create() */ diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index 225d4cff03..f1e8f4e014 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -40,10 +40,10 @@ struct priv_op_ctxt { }; /* I/O emulation helpers. Use non-standard calling conventions. */ -void nocall load_guest_gprs(struct cpu_user_regs *); +void nocall load_guest_gprs(struct cpu_user_regs *regs); void nocall save_guest_gprs(void); -typedef void io_emul_stub_t(struct cpu_user_regs *); +typedef void io_emul_stub_t(struct cpu_user_regs *regs); static io_emul_stub_t *io_emul_stub_setup(struct priv_op_ctxt *ctxt, u8 opcode, unsigned int port, unsigned int bytes) diff --git a/xen/common/livepatch.c b/xen/common/livepatch.c index 9285f88644..9357c1b77a 100644 --- a/xen/common/livepatch.c +++ b/xen/common/livepatch.c @@ -2196,30 +2196,30 @@ static int livepatch_action(struct xen_sysctl_livepatch_action *action) return rc; } -int livepatch_op(struct xen_sysctl_livepatch_op *livepatch) +int livepatch_op(struct xen_sysctl_livepatch_op *op) { int rc; - if ( (livepatch->flags & ~LIVEPATCH_FLAGS_MASK) && - !(livepatch->flags & LIVEPATCH_FLAG_FORCE) ) + if ( (op->flags & ~LIVEPATCH_FLAGS_MASK) && + !(op->flags & LIVEPATCH_FLAG_FORCE) ) return -EINVAL; - switch ( livepatch->cmd ) + switch ( op->cmd ) { case XEN_SYSCTL_LIVEPATCH_UPLOAD: - rc = livepatch_upload(&livepatch->u.upload); + rc = livepatch_upload(&op->u.upload); break; case XEN_SYSCTL_LIVEPATCH_GET: - rc = livepatch_get(&livepatch->u.get); + rc = livepatch_get(&op->u.get); break; case XEN_SYSCTL_LIVEPATCH_LIST: - rc = livepatch_list(&livepatch->u.list); + rc = livepatch_list(&op->u.list); break; case XEN_SYSCTL_LIVEPATCH_ACTION: - rc = livepatch_action(&livepatch->u.action); + rc = livepatch_action(&op->u.action); break; default: diff --git a/xen/include/xen/livepatch.h b/xen/include/xen/livepatch.h index d074a5bebe..3f5ad01f1b 100644 --- a/xen/include/xen/livepatch.h +++ b/xen/include/xen/livepatch.h @@ -62,7 +62,7 @@ struct livepatch_fstate { uint8_t insn_buffer[LIVEPATCH_OPAQUE_SIZE]; }; -int livepatch_op(struct xen_sysctl_livepatch_op *); +int livepatch_op(struct xen_sysctl_livepatch_op *op); void check_for_livepatch_work(void); unsigned long livepatch_symbols_lookup_by_name(const char *symname); bool is_patch(const void *addr); -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 03:12:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 03:12:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1184869.1507152 (Exim 4.92) (envelope-from ) id 1vTtZl-0000pg-L4; Fri, 12 Dec 2025 03:12:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1184869.1507152; Fri, 12 Dec 2025 03:12:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTtZl-0000pY-IW; Fri, 12 Dec 2025 03:12:13 +0000 Received: by outflank-mailman (input) for mailman id 1184869; Fri, 12 Dec 2025 03:12:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTtZl-0000pS-0a for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:12:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTtZk-006Cgg-2G for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:12:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTtZk-00D1DO-2z for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:12:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=RCWGii3J7HvLDIB/WV3V/3p1JJHbgItK5gx396vl7fE=; b=oyHOhQu8d5jbfEceJGXV/CvCJy EC0vvAyQG5dvVNujmAsUXMJhaDkgSfn8QqddGTIMURO1kS5XgLD7024yu/Zr+5Ei4iLxIfv6og46P 9txp/8seS9DFHHr4b3Rd1+IFTEOWtg+mdepzeTrGcXrxI0QB+j0a1isAvO3ruxO/7ybA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/ucode: Don't cast away const-ness in cmp_patch_id() Message-Id: Date: Fri, 12 Dec 2025 03:12:12 +0000 commit 7becd32d84e78e3069fcfab9bbe255bab8bfcc35 Author: Andrew Cooper AuthorDate: Fri Dec 5 19:26:47 2025 +0000 Commit: Andrew Cooper CommitDate: Fri Dec 12 03:04:48 2025 +0000 x86/ucode: Don't cast away const-ness in cmp_patch_id() Fixes a volation of MISRA rule 11.8. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Nicola Vetrini Reviewed-by: Stefano Stabellini --- xen/arch/x86/cpu/microcode/amd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/cpu/microcode/amd.c b/xen/arch/x86/cpu/microcode/amd.c index adabe6e6e8..2760ace921 100644 --- a/xen/arch/x86/cpu/microcode/amd.c +++ b/xen/arch/x86/cpu/microcode/amd.c @@ -106,7 +106,7 @@ static bool __ro_after_init entrysign_mitigiated_in_firmware; static int cf_check cmp_patch_id(const void *key, const void *elem) { const struct patch_digest *pd = elem; - uint32_t patch_id = *(uint32_t *)key; + uint32_t patch_id = *(const uint32_t *)key; if ( patch_id == pd->patch_id ) return 0; -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 03:12:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 03:12:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1184870.1507156 (Exim 4.92) (envelope-from ) id 1vTtZv-0000ry-MW; Fri, 12 Dec 2025 03:12:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1184870.1507156; Fri, 12 Dec 2025 03:12:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTtZv-0000rq-Jv; Fri, 12 Dec 2025 03:12:23 +0000 Received: by outflank-mailman (input) for mailman id 1184870; Fri, 12 Dec 2025 03:12:23 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTtZv-0000rk-4y for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:12:23 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTtZu-006Cgk-2h for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:12:23 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTtZv-00D2KQ-0I for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:12:23 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=XJL9scRA8ZXAHn/IIzV1Xh+U+W0S+q22xHJvbPkYn0I=; b=4W7WPXiCmoAAw6WlWm5NVh9Cil iceN/nsnRAU7izlWtKqdQni5BCzsmGNlOIbhPKvYDJ3xfNKPM2hDATGCyLeJNmk792JKloiofVrdP YDNa3wiZgPYaBE/Gq1cB2ec18QAN74ustXumdWMuFrB5DmGsnSZwFD+gKY4xDHwOWYv8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86: Fix missing breaks Message-Id: Date: Fri, 12 Dec 2025 03:12:23 +0000 commit f1b1860226a62242c0bfe1b8ce5d0d54520428d2 Author: Andrew Cooper AuthorDate: Fri Dec 5 19:36:00 2025 +0000 Commit: Andrew Cooper CommitDate: Fri Dec 12 03:04:48 2025 +0000 x86: Fix missing breaks With the wider testing, some more violations have been spotted. This addresses violations of Rule 16.3 which requires all case statements to be terminated with a break or other unconditional control flow change. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Nicola Vetrini --- xen/arch/x86/domain.c | 1 + xen/arch/x86/mm/shadow/hvm.c | 1 + xen/arch/x86/pv/emul-priv-op.c | 1 + xen/arch/x86/pv/emulate.c | 1 + xen/common/livepatch.c | 1 - xen/common/livepatch_elf.c | 1 + 6 files changed, 5 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index 5e37bfbd17..b151201809 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -1517,6 +1517,7 @@ int arch_set_info_guest( { case -EINTR: rc = -ERESTART; + fallthrough; case -ERESTART: break; case 0: diff --git a/xen/arch/x86/mm/shadow/hvm.c b/xen/arch/x86/mm/shadow/hvm.c index 114957a3e1..69334c0956 100644 --- a/xen/arch/x86/mm/shadow/hvm.c +++ b/xen/arch/x86/mm/shadow/hvm.c @@ -268,6 +268,7 @@ hvm_emulate_cmpxchg(enum x86_segment seg, default: SHADOW_PRINTK("cmpxchg size %u is not supported\n", bytes); prev = ~old; + break; } if ( prev != old ) diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index f1e8f4e014..e6d370cd81 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -407,6 +407,7 @@ static void _guest_io_write(unsigned int port, unsigned int bytes, default: ASSERT_UNREACHABLE(); + break; } } diff --git a/xen/arch/x86/pv/emulate.c b/xen/arch/x86/pv/emulate.c index e741e686c1..0022e0f55e 100644 --- a/xen/arch/x86/pv/emulate.c +++ b/xen/arch/x86/pv/emulate.c @@ -120,6 +120,7 @@ void pv_set_reg(struct vcpu *v, unsigned int reg, uint64_t val) printk(XENLOG_G_ERR "%s(%pv, 0x%08x, 0x%016"PRIx64") Bad register\n", __func__, v, reg, val); domain_crash(d); + break; } } diff --git a/xen/common/livepatch.c b/xen/common/livepatch.c index 9357c1b77a..d0da2aa281 100644 --- a/xen/common/livepatch.c +++ b/xen/common/livepatch.c @@ -1924,7 +1924,6 @@ static void noinline do_livepatch_work(void) p->name); ASSERT_UNREACHABLE(); } - default: break; } } diff --git a/xen/common/livepatch_elf.c b/xen/common/livepatch_elf.c index 25ce1bd5a0..2e82f2cb8c 100644 --- a/xen/common/livepatch_elf.c +++ b/xen/common/livepatch_elf.c @@ -347,6 +347,7 @@ int livepatch_elf_resolve_symbols(struct livepatch_elf *elf) dprintk(XENLOG_DEBUG, LIVEPATCH "%s: Symbol resolved: %s => %#"PRIxElfAddr" (%s)\n", elf->name, elf->sym[i].name, st_value, elf->sec[idx].name); + break; } if ( rc ) -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 03:12:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 03:12:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1184871.1507160 (Exim 4.92) (envelope-from ) id 1vTta5-0000u5-O6; Fri, 12 Dec 2025 03:12:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1184871.1507160; Fri, 12 Dec 2025 03:12:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTta5-0000tx-LG; Fri, 12 Dec 2025 03:12:33 +0000 Received: by outflank-mailman (input) for mailman id 1184871; Fri, 12 Dec 2025 03:12:33 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTta5-0000tq-8s for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:12:33 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTta4-006Cgo-35 for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:12:33 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTta5-00D3Zy-0h for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:12:33 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=OaotovedLZc5eLKYbS2RM51TWSKVaco/EP9hm29ZNc0=; b=ng01alI2Ew+r4+7QxllCiHWcdt /NPHdzTm2hlwgAEY87jP08fCOhhDcyCU6+LWSqGvjTmzQ1cKsncfRTIOREBXvL4mycEkTI1ALffYg vi/2EKhNAkiR3OvlzQEyseDzPIE1pTTz89UbmrHTyALWbUGUOKONdtggjeGj87qUwpyg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86: Fix missing brackets in macros Message-Id: Date: Fri, 12 Dec 2025 03:12:33 +0000 commit 0c40d08f7cb8922befd7bec1868978b9cd65dc6d Author: Andrew Cooper AuthorDate: Fri Dec 5 19:42:07 2025 +0000 Commit: Andrew Cooper CommitDate: Fri Dec 12 03:04:48 2025 +0000 x86: Fix missing brackets in macros With the wider testing, some more violations have been spotted. This addresses violations of Rule 20.7 which requires macro parameters to be bracketed. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Nicola Vetrini Reviewed-by: Stefano Stabellini --- xen/arch/x86/mm/shadow/private.h | 6 +++--- xen/drivers/passthrough/vtd/dmar.h | 8 ++++---- xen/include/xen/kexec.h | 4 ++-- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/xen/arch/x86/mm/shadow/private.h b/xen/arch/x86/mm/shadow/private.h index cef9dbef2e..1ef908a380 100644 --- a/xen/arch/x86/mm/shadow/private.h +++ b/xen/arch/x86/mm/shadow/private.h @@ -636,9 +636,9 @@ prev_pinned_shadow(struct page_info *page, } #define foreach_pinned_shadow(dom, pos, tmp) \ - for ( pos = prev_pinned_shadow(NULL, (dom)); \ - pos ? (tmp = prev_pinned_shadow(pos, (dom)), 1) : 0; \ - pos = tmp ) + for ( (pos) = prev_pinned_shadow(NULL, dom); \ + (pos) ? ((tmp) = prev_pinned_shadow(pos, dom), 1) : 0;\ + (pos) = (tmp) ) /* * Pin a shadow page: take an extra refcount, set the pin bit, diff --git a/xen/drivers/passthrough/vtd/dmar.h b/xen/drivers/passthrough/vtd/dmar.h index 0ff4f36535..47e6918b45 100644 --- a/xen/drivers/passthrough/vtd/dmar.h +++ b/xen/drivers/passthrough/vtd/dmar.h @@ -124,7 +124,7 @@ struct acpi_atsr_unit *acpi_find_matched_atsr_unit(const struct pci_dev *); do { \ s_time_t start_time = NOW(); \ while (1) { \ - sts = op(iommu->reg, offset); \ + sts = op((iommu)->reg, offset); \ if ( cond ) \ break; \ if ( NOW() > start_time + DMAR_OPERATION_TIMEOUT ) { \ @@ -147,7 +147,7 @@ do { \ \ for ( ; ; ) \ { \ - sts = op(iommu->reg, offset); \ + sts = op((iommu)->reg, offset); \ if ( cond ) \ break; \ if ( timeout && NOW() > timeout ) \ @@ -155,7 +155,7 @@ do { \ threshold |= threshold << 1; \ printk(XENLOG_WARNING VTDPREFIX \ " IOMMU#%u: %s flush taking too long\n", \ - iommu->index, what); \ + (iommu)->index, what); \ timeout = 0; \ } \ cpu_relax(); \ @@ -164,7 +164,7 @@ do { \ if ( !timeout ) \ printk(XENLOG_WARNING VTDPREFIX \ " IOMMU#%u: %s flush took %lums\n", \ - iommu->index, what, (NOW() - start) / 10000000); \ + (iommu)->index, what, (NOW() - start) / 10000000); \ } while ( false ) int vtd_hw_check(void); diff --git a/xen/include/xen/kexec.h b/xen/include/xen/kexec.h index e66eb6a8e5..5dd288d1a5 100644 --- a/xen/include/xen/kexec.h +++ b/xen/include/xen/kexec.h @@ -66,9 +66,9 @@ void vmcoreinfo_append_str(const char *fmt, ...) #define VMCOREINFO_PAGESIZE(value) \ vmcoreinfo_append_str("PAGESIZE=%ld\n", value) #define VMCOREINFO_SYMBOL(name) \ - vmcoreinfo_append_str("SYMBOL(%s)=%lx\n", #name, (unsigned long)&name) + vmcoreinfo_append_str("SYMBOL(%s)=%lx\n", #name, (unsigned long)&(name)) #define VMCOREINFO_SYMBOL_ALIAS(alias, name) \ - vmcoreinfo_append_str("SYMBOL(%s)=%lx\n", #alias, (unsigned long)&name) + vmcoreinfo_append_str("SYMBOL(%s)=%lx\n", #alias, (unsigned long)&(name)) #define VMCOREINFO_STRUCT_SIZE(name) \ vmcoreinfo_append_str("SIZE(%s)=%zu\n", #name, sizeof(struct name)) #define VMCOREINFO_OFFSET(name, field) \ -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 03:12:43 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 03:12:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1184872.1507164 (Exim 4.92) (envelope-from ) id 1vTtaF-0000wI-PI; Fri, 12 Dec 2025 03:12:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1184872.1507164; Fri, 12 Dec 2025 03:12:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTtaF-0000wA-Mh; Fri, 12 Dec 2025 03:12:43 +0000 Received: by outflank-mailman (input) for mailman id 1184872; Fri, 12 Dec 2025 03:12:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTtaF-0000w4-C5 for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:12:43 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTtaF-006Cgs-0B for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:12:43 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTtaF-00D4fx-0z for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:12:43 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=yDUmUbJ3UAcFMBxKyGeOTGOdNntS7ot9naLcesV/a5o=; b=AmLKjhJSk7MFt+Y4B+ZcZJL6mY 94nQd+qwFz0CtbN1D7ujFRnZWDYlDR/RTvPpduN/dHgrHkJMncqmXxr0TUjPrU6oiawXO9Cf6z6yn 6hxgsDkyWnI2+qLUSSKmh8I/2JN4TQFl2DNlvE71IdkcAym9OH5LTnD9jsHIruSqCX/A=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] CI/eclair: Rename the eclair-* jobs for clarity Message-Id: Date: Fri, 12 Dec 2025 03:12:43 +0000 commit 3161cfa40b3bf878d8b8c0f10075fe7d5eaed52b Author: Andrew Cooper AuthorDate: Thu Dec 11 16:08:39 2025 +0000 Commit: Andrew Cooper CommitDate: Fri Dec 12 03:04:48 2025 +0000 CI/eclair: Rename the eclair-* jobs for clarity All Eclair scanning is for safety purposes, and the *-safety jobs are AMD's configuration specifically, and other configurations will likely be different. Rename them to *-amd. Give the un-suffixed job an *-allcode suffix to make it clearer that they're looking at all code. Give the un-suffixed scheduled jobs an *-allrules suffix. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Stefano Stabellini --- automation/gitlab-ci/analyze.yaml | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/automation/gitlab-ci/analyze.yaml b/automation/gitlab-ci/analyze.yaml index 20cabbe5f7..286faffeb3 100644 --- a/automation/gitlab-ci/analyze.yaml +++ b/automation/gitlab-ci/analyze.yaml @@ -39,7 +39,7 @@ allow_failure: true - !reference [.eclair-analysis, rules] -eclair-x86_64: +eclair-x86_64-allcode: extends: .eclair-analysis:triggered variables: LOGFILE: "eclair-x86_64.log" @@ -48,7 +48,7 @@ eclair-x86_64: allow_failure: true eclair-x86_64-testing: - extends: eclair-x86_64 + extends: eclair-x86_64-allcode tags: - eclair-analysis-testing rules: @@ -58,8 +58,8 @@ eclair-x86_64-testing: when: always - !reference [.eclair-analysis:triggered, rules] -eclair-x86_64-safety: - extends: eclair-x86_64 +eclair-x86_64-amd: + extends: eclair-x86_64-allcode tags: - eclair-analysis-safety allow_failure: false @@ -99,7 +99,7 @@ eclair-x86_64-safety: when: always - !reference [.eclair-analysis:triggered, rules] -eclair-ARM64: +eclair-ARM64-allcode: extends: .eclair-analysis:triggered variables: LOGFILE: "eclair-ARM64.log" @@ -108,7 +108,7 @@ eclair-ARM64: allow_failure: true eclair-ARM64-testing: - extends: eclair-ARM64 + extends: eclair-ARM64-allcode tags: - eclair-analysis-testing rules: @@ -118,8 +118,8 @@ eclair-ARM64-testing: when: always - !reference [.eclair-analysis:triggered, rules] -eclair-ARM64-safety: - extends: eclair-ARM64 +eclair-ARM64-amd: + extends: eclair-ARM64-allcode tags: - eclair-analysis-safety allow_failure: false @@ -174,7 +174,7 @@ eclair-ARM64-safety: when: never - !reference [.eclair-analysis, rules] -eclair-x86_64:on-schedule: +eclair-x86_64-allrules:on-schedule: extends: .eclair-analysis:on-schedule variables: VARIANT: "X86_64" @@ -183,7 +183,7 @@ eclair-x86_64:on-schedule: LOGFILE: "eclair-${VARIANT}-${RULESET}.log" allow_failure: true -eclair-ARM64:on-schedule: +eclair-ARM64-allrules:on-schedule: extends: .eclair-analysis:on-schedule variables: VARIANT: "ARM64" -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 03:12:54 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 03:12:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1184873.1507167 (Exim 4.92) (envelope-from ) id 1vTtaQ-0000yy-S4; Fri, 12 Dec 2025 03:12:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1184873.1507167; Fri, 12 Dec 2025 03:12:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTtaQ-0000yq-PP; Fri, 12 Dec 2025 03:12:54 +0000 Received: by outflank-mailman (input) for mailman id 1184873; Fri, 12 Dec 2025 03:12:53 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTtaP-0000yj-Fu for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:12:53 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTtaP-006ChL-0Z for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:12:53 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTtaP-00D61V-1N for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 03:12:53 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Us31fL8/qf4q1aMJ1yvG5FSDWPCuxua78Zra4Dy1h7I=; b=F3weGE6ccXq/d7rsfGowrhPFUT qbuOkVg7XGVHhqj5msV2XwD6FISIKzopVLk544Owi5ZaBpPT6H2sWu/Xg489j4cxq01WhAPtgJhEe OAu11bp4bYFxGRsh7NreGJVGvvheR3STB3/Jj00YFGG/F4VRblg9MTAnGMoNKdNQSacY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/irq: Delete the pirq_cleanup_check() macro Message-Id: Date: Fri, 12 Dec 2025 03:12:53 +0000 commit 4aa218acd471d1ef9b9541a4f8325553afbf1d26 Author: Andrew Cooper AuthorDate: Mon Aug 25 19:22:44 2025 +0000 Commit: Andrew Cooper CommitDate: Fri Dec 12 03:04:48 2025 +0000 xen/irq: Delete the pirq_cleanup_check() macro MISRA Rule 5.5 objects to a macro aliasing a function, which is what pirq_cleanup_check() does. The macro was originally intended to ensure the condition 'if (!pirq->evtchn)' is always checked before invoking the function, avoiding errors across call sites. There are only a handful of users, so expand it inline to be plain regular C. Doing this shows one path now needing braces, and one path in 'evtchn_bind_pirq()' where the expanded form simplifies back to no delta, as it follows an unconditional clear of 'info->evtchn'. While this complies with MISRA, it shifts the responsibility to developers to check 'if (!pirq->evtchn)' at call sites. No functional changes. Signed-off-by: Andrew Cooper Signed-off-by: Dmytro Prokopchuk Reviewed-by: Stefano Stabellini --- xen/arch/x86/irq.c | 11 +++++++---- xen/common/event_channel.c | 5 ++++- xen/drivers/passthrough/x86/hvm.c | 9 ++++++--- xen/include/xen/irq.h | 3 --- 4 files changed, 17 insertions(+), 11 deletions(-) diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c index 92b8604dc8..7c3d6efd24 100644 --- a/xen/arch/x86/irq.c +++ b/xen/arch/x86/irq.c @@ -1351,7 +1351,8 @@ static void clear_domain_irq_pirq(struct domain *d, int irq, struct pirq *pirq) static void cleanup_domain_irq_pirq(struct domain *d, int irq, struct pirq *pirq) { - pirq_cleanup_check(pirq, d); + if ( !pirq->evtchn ) + pirq_cleanup_check(pirq, d); radix_tree_delete(&d->arch.irq_pirq, irq); } @@ -1409,7 +1410,7 @@ struct pirq *alloc_pirq_struct(struct domain *d) return pirq; } -void (pirq_cleanup_check)(struct pirq *pirq, struct domain *d) +void pirq_cleanup_check(struct pirq *pirq, struct domain *d) { /* * Check whether all fields have their default values, and delete @@ -2849,7 +2850,8 @@ int map_domain_emuirq_pirq(struct domain *d, int pirq, int emuirq) radix_tree_int_to_ptr(pirq)); break; default: - pirq_cleanup_check(info, d); + if ( !info->evtchn ) + pirq_cleanup_check(info, d); return err; } } @@ -2884,7 +2886,8 @@ int unmap_domain_pirq_emuirq(struct domain *d, int pirq) if ( info ) { info->arch.hvm.emuirq = IRQ_UNBOUND; - pirq_cleanup_check(info, d); + if ( !info->evtchn ) + pirq_cleanup_check(info, d); } if ( emuirq != IRQ_PT ) radix_tree_delete(&d->arch.hvm.emuirq_pirq, emuirq); diff --git a/xen/common/event_channel.c b/xen/common/event_channel.c index 67700b050a..a3d18bc464 100644 --- a/xen/common/event_channel.c +++ b/xen/common/event_channel.c @@ -741,11 +741,14 @@ int evtchn_close(struct domain *d1, int port1, bool guest) if ( !is_hvm_domain(d1) || domain_pirq_to_irq(d1, pirq->pirq) <= 0 || unmap_domain_pirq_emuirq(d1, pirq->pirq) < 0 ) + { /* * The successful path of unmap_domain_pirq_emuirq() will have * called pirq_cleanup_check() already. */ - pirq_cleanup_check(pirq, d1); + if ( !pirq->evtchn ) + pirq_cleanup_check(pirq, d1); + } } unlink_pirq_port(chn1, d1->vcpu[chn1->notify_vcpu_id]); break; diff --git a/xen/drivers/passthrough/x86/hvm.c b/xen/drivers/passthrough/x86/hvm.c index a2ca7e0e57..b73bb55055 100644 --- a/xen/drivers/passthrough/x86/hvm.c +++ b/xen/drivers/passthrough/x86/hvm.c @@ -329,7 +329,8 @@ int pt_irq_create_bind( pirq_dpci->gmsi.gvec = 0; pirq_dpci->dom = NULL; pirq_dpci->flags = 0; - pirq_cleanup_check(info, d); + if ( !info->evtchn ) + pirq_cleanup_check(info, d); write_unlock(&d->event_lock); return rc; } @@ -536,7 +537,8 @@ int pt_irq_create_bind( hvm_irq_dpci->link_cnt[link]--; } pirq_dpci->flags = 0; - pirq_cleanup_check(info, d); + if ( !info->evtchn ) + pirq_cleanup_check(info, d); write_unlock(&d->event_lock); xfree(girq); xfree(digl); @@ -693,7 +695,8 @@ int pt_irq_destroy_bind( */ pt_pirq_softirq_reset(pirq_dpci); - pirq_cleanup_check(pirq, d); + if ( !pirq->evtchn ) + pirq_cleanup_check(pirq, d); } write_unlock(&d->event_lock); diff --git a/xen/include/xen/irq.h b/xen/include/xen/irq.h index 95034c0d6b..6071b00f62 100644 --- a/xen/include/xen/irq.h +++ b/xen/include/xen/irq.h @@ -185,9 +185,6 @@ extern struct pirq *pirq_get_info(struct domain *d, int pirq); void pirq_cleanup_check(struct pirq *pirq, struct domain *d); -#define pirq_cleanup_check(pirq, d) \ - (!(pirq)->evtchn ? pirq_cleanup_check(pirq, d) : (void)0) - extern void pirq_guest_eoi(struct pirq *pirq); extern void desc_guest_eoi(struct irq_desc *desc, struct pirq *pirq); extern int pirq_guest_unmask(struct domain *d); -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 04:33:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 04:33:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1185177.1507422 (Exim 4.92) (envelope-from ) id 1vTuq1-00014Y-42; Fri, 12 Dec 2025 04:33:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1185177.1507422; Fri, 12 Dec 2025 04:33:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTuq1-00014Q-1E; Fri, 12 Dec 2025 04:33:05 +0000 Received: by outflank-mailman (input) for mailman id 1185177; Fri, 12 Dec 2025 04:33:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTupz-000137-TS for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:33:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTupz-006EKw-1k for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:33:03 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTupz-0048Ur-2U for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:33:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=zHxb9ZuT/kf1TpQE8PYX2F2ApmftMQPBB3mYyJNFoCM=; b=om0k2ZtohyHFdy6yJjlf9f+YKZ vVHQttt5JsNG+IjyvfZpePXItkXoh4bbmi46J+4d30g21zKB7sNqz3ZOtANtNIpz6ILm409G6e4+C hRIDbumLsWEmOm20COlJ13lSCy7yu2GXQktEizG1gJOaVMoug34d0LxU6x/N2Vd7FHUw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation/eclair: Run *-testing jobs only in some branches Message-Id: Date: Fri, 12 Dec 2025 04:33:03 +0000 commit abac3b76d20ebecb339cb41bb8982796bf1ce276 Author: Nicola Vetrini AuthorDate: Thu Dec 11 14:34:54 2025 +0100 Commit: Andrew Cooper CommitDate: Thu Dec 11 15:19:22 2025 +0000 automation/eclair: Run *-testing jobs only in some branches These jobs should not run in regular scans, but only in xen-project/people repositories and branches to speed up pipeline execution. Signed-off-by: Nicola Vetrini Reviewed-by: Andrew Cooper --- automation/gitlab-ci/analyze.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/automation/gitlab-ci/analyze.yaml b/automation/gitlab-ci/analyze.yaml index d22d1dbbc3..20cabbe5f7 100644 --- a/automation/gitlab-ci/analyze.yaml +++ b/automation/gitlab-ci/analyze.yaml @@ -52,6 +52,8 @@ eclair-x86_64-testing: tags: - eclair-analysis-testing rules: + - if: $CI_PROJECT_PATH !~ /^xen-project\/people\/.*$/ + when: never - if: $ECLAIR_TESTING when: always - !reference [.eclair-analysis:triggered, rules] @@ -110,6 +112,8 @@ eclair-ARM64-testing: tags: - eclair-analysis-testing rules: + - if: $CI_PROJECT_PATH !~ /^xen-project\/people\/.*$/ + when: never - if: $ECLAIR_TESTING when: always - !reference [.eclair-analysis:triggered, rules] -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 04:33:15 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 04:33:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1185178.1507427 (Exim 4.92) (envelope-from ) id 1vTuqB-00017q-6a; Fri, 12 Dec 2025 04:33:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1185178.1507427; Fri, 12 Dec 2025 04:33:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTuqB-00017i-2i; Fri, 12 Dec 2025 04:33:15 +0000 Received: by outflank-mailman (input) for mailman id 1185178; Fri, 12 Dec 2025 04:33:14 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTuq9-00017a-WB for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:33:14 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTuq9-006EL0-2B for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:33:13 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTuq9-004A2P-2w for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:33:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=i51kh2FaYcHR1WAXWdL6j+5QE6EY1P+hGhtL02LWcB4=; b=moY6rx6jB7D9JHNTtGU1X0NMv/ lDiZS+HIYuDKJaUYRPUCk2o2hUezyVKBqfncKeaCXddspzMq2OaQV0PUXOxH5NfiCoUAUt9+YMzpU HBUamnf5hyy0iqvb5zNguPJQHHRnheDVa9tInKewv3pToV3nuqODSfBts6vViUX8FlkI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/svm: Make vmcb_struct private to svm/ Message-Id: Date: Fri, 12 Dec 2025 04:33:13 +0000 commit f09b87a0ea5e47d53ae796c32c99e3d7a21818bd Author: Andrew Cooper AuthorDate: Fri Aug 29 12:23:41 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 12 03:04:48 2025 +0000 x86/svm: Make vmcb_struct private to svm/ The rest of Xen has no buisness knowing this structure, and it is currently included via xen/sched.h into most code. Create a new private svm/vmcb.h. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Alejandro Vallejo Acked-by: Jan Beulich --- xen/arch/x86/hvm/svm/asid.c | 1 + xen/arch/x86/hvm/svm/emulate.c | 1 + xen/arch/x86/hvm/svm/intr.c | 1 + xen/arch/x86/hvm/svm/nestedsvm.c | 1 + xen/arch/x86/hvm/svm/svm.c | 1 + xen/arch/x86/hvm/svm/svmdebug.c | 2 + xen/arch/x86/hvm/svm/vmcb.c | 2 + xen/arch/x86/hvm/svm/vmcb.h | 617 ++++++++++++++++++++++++++++++++ xen/arch/x86/include/asm/hvm/svm/vmcb.h | 606 ------------------------------- 9 files changed, 626 insertions(+), 606 deletions(-) diff --git a/xen/arch/x86/hvm/svm/asid.c b/xen/arch/x86/hvm/svm/asid.c index 03f98b7a8b..0e115243a3 100644 --- a/xen/arch/x86/hvm/svm/asid.c +++ b/xen/arch/x86/hvm/svm/asid.c @@ -9,6 +9,7 @@ #include #include "svm.h" +#include "vmcb.h" void svm_asid_init(const struct cpuinfo_x86 *c) { diff --git a/xen/arch/x86/hvm/svm/emulate.c b/xen/arch/x86/hvm/svm/emulate.c index 93ac1d3435..d8aa455908 100644 --- a/xen/arch/x86/hvm/svm/emulate.c +++ b/xen/arch/x86/hvm/svm/emulate.c @@ -15,6 +15,7 @@ #include #include "svm.h" +#include "vmcb.h" static unsigned long svm_nextrip_insn_length(struct vcpu *v) { diff --git a/xen/arch/x86/hvm/svm/intr.c b/xen/arch/x86/hvm/svm/intr.c index 46186a1102..931973a9fa 100644 --- a/xen/arch/x86/hvm/svm/intr.c +++ b/xen/arch/x86/hvm/svm/intr.c @@ -26,6 +26,7 @@ #include #include "nestedhvm.h" +#include "vmcb.h" static void svm_inject_nmi(struct vcpu *v) { diff --git a/xen/arch/x86/hvm/svm/nestedsvm.c b/xen/arch/x86/hvm/svm/nestedsvm.c index 1813692ffb..1914667551 100644 --- a/xen/arch/x86/hvm/svm/nestedsvm.c +++ b/xen/arch/x86/hvm/svm/nestedsvm.c @@ -16,6 +16,7 @@ #include "nestedhvm.h" #include "svm.h" +#include "vmcb.h" #define NSVM_ERROR_VVMCB 1 #define NSVM_ERROR_VMENTRY 2 diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 2d7c598ffe..14b3a427e6 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -44,6 +44,7 @@ #include "nestedhvm.h" #include "svm.h" +#include "vmcb.h" void noreturn svm_asm_do_resume(void); diff --git a/xen/arch/x86/hvm/svm/svmdebug.c b/xen/arch/x86/hvm/svm/svmdebug.c index 9d3badcf5d..bdb9ea3583 100644 --- a/xen/arch/x86/hvm/svm/svmdebug.c +++ b/xen/arch/x86/hvm/svm/svmdebug.c @@ -10,6 +10,8 @@ #include #include +#include "vmcb.h" + static void svm_dump_sel(const char *name, const struct segment_register *s) { printk("%s: %04x %04x %08x %016"PRIx64"\n", diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c index c57d314a24..44fa76bf02 100644 --- a/xen/arch/x86/hvm/svm/vmcb.c +++ b/xen/arch/x86/hvm/svm/vmcb.c @@ -22,6 +22,8 @@ #include #include +#include "vmcb.h" + struct vmcb_struct *alloc_vmcb(void) { struct vmcb_struct *vmcb; diff --git a/xen/arch/x86/hvm/svm/vmcb.h b/xen/arch/x86/hvm/svm/vmcb.h new file mode 100644 index 0000000000..68012948a9 --- /dev/null +++ b/xen/arch/x86/hvm/svm/vmcb.h @@ -0,0 +1,617 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef SVM_PRIVATE_VMCB_H +#define SVM_PRIVATE_VMCB_H + +#include + +#include + +struct vcpu; + +/* general 1 intercepts */ +enum GenericIntercept1bits +{ + GENERAL1_INTERCEPT_INTR = 1 << 0, + GENERAL1_INTERCEPT_NMI = 1 << 1, + GENERAL1_INTERCEPT_SMI = 1 << 2, + GENERAL1_INTERCEPT_INIT = 1 << 3, + GENERAL1_INTERCEPT_VINTR = 1 << 4, + GENERAL1_INTERCEPT_CR0_SEL_WRITE = 1 << 5, + GENERAL1_INTERCEPT_IDTR_READ = 1 << 6, + GENERAL1_INTERCEPT_GDTR_READ = 1 << 7, + GENERAL1_INTERCEPT_LDTR_READ = 1 << 8, + GENERAL1_INTERCEPT_TR_READ = 1 << 9, + GENERAL1_INTERCEPT_IDTR_WRITE = 1 << 10, + GENERAL1_INTERCEPT_GDTR_WRITE = 1 << 11, + GENERAL1_INTERCEPT_LDTR_WRITE = 1 << 12, + GENERAL1_INTERCEPT_TR_WRITE = 1 << 13, + GENERAL1_INTERCEPT_RDTSC = 1 << 14, + GENERAL1_INTERCEPT_RDPMC = 1 << 15, + GENERAL1_INTERCEPT_PUSHF = 1 << 16, + GENERAL1_INTERCEPT_POPF = 1 << 17, + GENERAL1_INTERCEPT_CPUID = 1 << 18, + GENERAL1_INTERCEPT_RSM = 1 << 19, + GENERAL1_INTERCEPT_IRET = 1 << 20, + GENERAL1_INTERCEPT_SWINT = 1 << 21, + GENERAL1_INTERCEPT_INVD = 1 << 22, + GENERAL1_INTERCEPT_PAUSE = 1 << 23, + GENERAL1_INTERCEPT_HLT = 1 << 24, + GENERAL1_INTERCEPT_INVLPG = 1 << 25, + GENERAL1_INTERCEPT_INVLPGA = 1 << 26, + GENERAL1_INTERCEPT_IOIO_PROT = 1 << 27, + GENERAL1_INTERCEPT_MSR_PROT = 1 << 28, + GENERAL1_INTERCEPT_TASK_SWITCH = 1 << 29, + GENERAL1_INTERCEPT_FERR_FREEZE = 1 << 30, + GENERAL1_INTERCEPT_SHUTDOWN_EVT = 1u << 31 +}; + +/* general 2 intercepts */ +enum GenericIntercept2bits +{ + GENERAL2_INTERCEPT_VMRUN = 1 << 0, + GENERAL2_INTERCEPT_VMMCALL = 1 << 1, + GENERAL2_INTERCEPT_VMLOAD = 1 << 2, + GENERAL2_INTERCEPT_VMSAVE = 1 << 3, + GENERAL2_INTERCEPT_STGI = 1 << 4, + GENERAL2_INTERCEPT_CLGI = 1 << 5, + GENERAL2_INTERCEPT_SKINIT = 1 << 6, + GENERAL2_INTERCEPT_RDTSCP = 1 << 7, + GENERAL2_INTERCEPT_ICEBP = 1 << 8, + GENERAL2_INTERCEPT_WBINVD = 1 << 9, + GENERAL2_INTERCEPT_MONITOR = 1 << 10, + GENERAL2_INTERCEPT_MWAIT = 1 << 11, + GENERAL2_INTERCEPT_MWAIT_CONDITIONAL = 1 << 12, + GENERAL2_INTERCEPT_XSETBV = 1 << 13, + GENERAL2_INTERCEPT_RDPRU = 1 << 14, +}; + + +/* control register intercepts */ +enum CRInterceptBits +{ + CR_INTERCEPT_CR0_READ = 1 << 0, + CR_INTERCEPT_CR1_READ = 1 << 1, + CR_INTERCEPT_CR2_READ = 1 << 2, + CR_INTERCEPT_CR3_READ = 1 << 3, + CR_INTERCEPT_CR4_READ = 1 << 4, + CR_INTERCEPT_CR5_READ = 1 << 5, + CR_INTERCEPT_CR6_READ = 1 << 6, + CR_INTERCEPT_CR7_READ = 1 << 7, + CR_INTERCEPT_CR8_READ = 1 << 8, + CR_INTERCEPT_CR9_READ = 1 << 9, + CR_INTERCEPT_CR10_READ = 1 << 10, + CR_INTERCEPT_CR11_READ = 1 << 11, + CR_INTERCEPT_CR12_READ = 1 << 12, + CR_INTERCEPT_CR13_READ = 1 << 13, + CR_INTERCEPT_CR14_READ = 1 << 14, + CR_INTERCEPT_CR15_READ = 1 << 15, + CR_INTERCEPT_CR0_WRITE = 1 << 16, + CR_INTERCEPT_CR1_WRITE = 1 << 17, + CR_INTERCEPT_CR2_WRITE = 1 << 18, + CR_INTERCEPT_CR3_WRITE = 1 << 19, + CR_INTERCEPT_CR4_WRITE = 1 << 20, + CR_INTERCEPT_CR5_WRITE = 1 << 21, + CR_INTERCEPT_CR6_WRITE = 1 << 22, + CR_INTERCEPT_CR7_WRITE = 1 << 23, + CR_INTERCEPT_CR8_WRITE = 1 << 24, + CR_INTERCEPT_CR9_WRITE = 1 << 25, + CR_INTERCEPT_CR10_WRITE = 1 << 26, + CR_INTERCEPT_CR11_WRITE = 1 << 27, + CR_INTERCEPT_CR12_WRITE = 1 << 28, + CR_INTERCEPT_CR13_WRITE = 1 << 29, + CR_INTERCEPT_CR14_WRITE = 1 << 30, + CR_INTERCEPT_CR15_WRITE = 1u << 31, +}; + + +/* debug register intercepts */ +enum DRInterceptBits +{ + DR_INTERCEPT_DR0_READ = 1 << 0, + DR_INTERCEPT_DR1_READ = 1 << 1, + DR_INTERCEPT_DR2_READ = 1 << 2, + DR_INTERCEPT_DR3_READ = 1 << 3, + DR_INTERCEPT_DR4_READ = 1 << 4, + DR_INTERCEPT_DR5_READ = 1 << 5, + DR_INTERCEPT_DR6_READ = 1 << 6, + DR_INTERCEPT_DR7_READ = 1 << 7, + DR_INTERCEPT_DR8_READ = 1 << 8, + DR_INTERCEPT_DR9_READ = 1 << 9, + DR_INTERCEPT_DR10_READ = 1 << 10, + DR_INTERCEPT_DR11_READ = 1 << 11, + DR_INTERCEPT_DR12_READ = 1 << 12, + DR_INTERCEPT_DR13_READ = 1 << 13, + DR_INTERCEPT_DR14_READ = 1 << 14, + DR_INTERCEPT_DR15_READ = 1 << 15, + DR_INTERCEPT_DR0_WRITE = 1 << 16, + DR_INTERCEPT_DR1_WRITE = 1 << 17, + DR_INTERCEPT_DR2_WRITE = 1 << 18, + DR_INTERCEPT_DR3_WRITE = 1 << 19, + DR_INTERCEPT_DR4_WRITE = 1 << 20, + DR_INTERCEPT_DR5_WRITE = 1 << 21, + DR_INTERCEPT_DR6_WRITE = 1 << 22, + DR_INTERCEPT_DR7_WRITE = 1 << 23, + DR_INTERCEPT_DR8_WRITE = 1 << 24, + DR_INTERCEPT_DR9_WRITE = 1 << 25, + DR_INTERCEPT_DR10_WRITE = 1 << 26, + DR_INTERCEPT_DR11_WRITE = 1 << 27, + DR_INTERCEPT_DR12_WRITE = 1 << 28, + DR_INTERCEPT_DR13_WRITE = 1 << 29, + DR_INTERCEPT_DR14_WRITE = 1 << 30, + DR_INTERCEPT_DR15_WRITE = 1u << 31, +}; + +enum VMEXIT_EXITCODE +{ + /* control register read exitcodes */ + VMEXIT_CR0_READ = 0, /* 0x0 */ + VMEXIT_CR1_READ = 1, /* 0x1 */ + VMEXIT_CR2_READ = 2, /* 0x2 */ + VMEXIT_CR3_READ = 3, /* 0x3 */ + VMEXIT_CR4_READ = 4, /* 0x4 */ + VMEXIT_CR5_READ = 5, /* 0x5 */ + VMEXIT_CR6_READ = 6, /* 0x6 */ + VMEXIT_CR7_READ = 7, /* 0x7 */ + VMEXIT_CR8_READ = 8, /* 0x8 */ + VMEXIT_CR9_READ = 9, /* 0x9 */ + VMEXIT_CR10_READ = 10, /* 0xa */ + VMEXIT_CR11_READ = 11, /* 0xb */ + VMEXIT_CR12_READ = 12, /* 0xc */ + VMEXIT_CR13_READ = 13, /* 0xd */ + VMEXIT_CR14_READ = 14, /* 0xe */ + VMEXIT_CR15_READ = 15, /* 0xf */ + + /* control register write exitcodes */ + VMEXIT_CR0_WRITE = 16, /* 0x10 */ + VMEXIT_CR1_WRITE = 17, /* 0x11 */ + VMEXIT_CR2_WRITE = 18, /* 0x12 */ + VMEXIT_CR3_WRITE = 19, /* 0x13 */ + VMEXIT_CR4_WRITE = 20, /* 0x14 */ + VMEXIT_CR5_WRITE = 21, /* 0x15 */ + VMEXIT_CR6_WRITE = 22, /* 0x16 */ + VMEXIT_CR7_WRITE = 23, /* 0x17 */ + VMEXIT_CR8_WRITE = 24, /* 0x18 */ + VMEXIT_CR9_WRITE = 25, /* 0x19 */ + VMEXIT_CR10_WRITE = 26, /* 0x1a */ + VMEXIT_CR11_WRITE = 27, /* 0x1b */ + VMEXIT_CR12_WRITE = 28, /* 0x1c */ + VMEXIT_CR13_WRITE = 29, /* 0x1d */ + VMEXIT_CR14_WRITE = 30, /* 0x1e */ + VMEXIT_CR15_WRITE = 31, /* 0x1f */ + + /* debug register read exitcodes */ + VMEXIT_DR0_READ = 32, /* 0x20 */ + VMEXIT_DR1_READ = 33, /* 0x21 */ + VMEXIT_DR2_READ = 34, /* 0x22 */ + VMEXIT_DR3_READ = 35, /* 0x23 */ + VMEXIT_DR4_READ = 36, /* 0x24 */ + VMEXIT_DR5_READ = 37, /* 0x25 */ + VMEXIT_DR6_READ = 38, /* 0x26 */ + VMEXIT_DR7_READ = 39, /* 0x27 */ + VMEXIT_DR8_READ = 40, /* 0x28 */ + VMEXIT_DR9_READ = 41, /* 0x29 */ + VMEXIT_DR10_READ = 42, /* 0x2a */ + VMEXIT_DR11_READ = 43, /* 0x2b */ + VMEXIT_DR12_READ = 44, /* 0x2c */ + VMEXIT_DR13_READ = 45, /* 0x2d */ + VMEXIT_DR14_READ = 46, /* 0x2e */ + VMEXIT_DR15_READ = 47, /* 0x2f */ + + /* debug register write exitcodes */ + VMEXIT_DR0_WRITE = 48, /* 0x30 */ + VMEXIT_DR1_WRITE = 49, /* 0x31 */ + VMEXIT_DR2_WRITE = 50, /* 0x32 */ + VMEXIT_DR3_WRITE = 51, /* 0x33 */ + VMEXIT_DR4_WRITE = 52, /* 0x34 */ + VMEXIT_DR5_WRITE = 53, /* 0x35 */ + VMEXIT_DR6_WRITE = 54, /* 0x36 */ + VMEXIT_DR7_WRITE = 55, /* 0x37 */ + VMEXIT_DR8_WRITE = 56, /* 0x38 */ + VMEXIT_DR9_WRITE = 57, /* 0x39 */ + VMEXIT_DR10_WRITE = 58, /* 0x3a */ + VMEXIT_DR11_WRITE = 59, /* 0x3b */ + VMEXIT_DR12_WRITE = 60, /* 0x3c */ + VMEXIT_DR13_WRITE = 61, /* 0x3d */ + VMEXIT_DR14_WRITE = 62, /* 0x3e */ + VMEXIT_DR15_WRITE = 63, /* 0x3f */ + + /* processor exception exitcodes (VMEXIT_EXCP[0-31]) */ + VMEXIT_EXCEPTION_DE = 64, /* 0x40, divide-by-zero-error */ + VMEXIT_EXCEPTION_DB = 65, /* 0x41, debug */ + VMEXIT_EXCEPTION_NMI = 66, /* 0x42, non-maskable-interrupt */ + VMEXIT_EXCEPTION_BP = 67, /* 0x43, breakpoint */ + VMEXIT_EXCEPTION_OF = 68, /* 0x44, overflow */ + VMEXIT_EXCEPTION_BR = 69, /* 0x45, bound-range */ + VMEXIT_EXCEPTION_UD = 70, /* 0x46, invalid-opcode*/ + VMEXIT_EXCEPTION_NM = 71, /* 0x47, device-not-available */ + VMEXIT_EXCEPTION_DF = 72, /* 0x48, double-fault */ + VMEXIT_EXCEPTION_09 = 73, /* 0x49, unsupported (reserved) */ + VMEXIT_EXCEPTION_TS = 74, /* 0x4a, invalid-tss */ + VMEXIT_EXCEPTION_NP = 75, /* 0x4b, segment-not-present */ + VMEXIT_EXCEPTION_SS = 76, /* 0x4c, stack */ + VMEXIT_EXCEPTION_GP = 77, /* 0x4d, general-protection */ + VMEXIT_EXCEPTION_PF = 78, /* 0x4e, page-fault */ + VMEXIT_EXCEPTION_15 = 79, /* 0x4f, reserved */ + VMEXIT_EXCEPTION_MF = 80, /* 0x50, x87 floating-point exception-pending */ + VMEXIT_EXCEPTION_AC = 81, /* 0x51, alignment-check */ + VMEXIT_EXCEPTION_MC = 82, /* 0x52, machine-check */ + VMEXIT_EXCEPTION_XF = 83, /* 0x53, simd floating-point */ +/* VMEXIT_EXCEPTION_20 = 84, 0x54, #VE (Intel specific) */ + VMEXIT_EXCEPTION_CP = 85, /* 0x55, controlflow protection */ + + /* exceptions 20-31 (exitcodes 84-95) are reserved */ + + /* ...and the rest of the #VMEXITs */ + VMEXIT_INTR = 96, /* 0x60 */ + VMEXIT_NMI = 97, /* 0x61 */ + VMEXIT_SMI = 98, /* 0x62 */ + VMEXIT_INIT = 99, /* 0x63 */ + VMEXIT_VINTR = 100, /* 0x64 */ + VMEXIT_CR0_SEL_WRITE = 101, /* 0x65 */ + VMEXIT_IDTR_READ = 102, /* 0x66 */ + VMEXIT_GDTR_READ = 103, /* 0x67 */ + VMEXIT_LDTR_READ = 104, /* 0x68 */ + VMEXIT_TR_READ = 105, /* 0x69 */ + VMEXIT_IDTR_WRITE = 106, /* 0x6a */ + VMEXIT_GDTR_WRITE = 107, /* 0x6b */ + VMEXIT_LDTR_WRITE = 108, /* 0x6c */ + VMEXIT_TR_WRITE = 109, /* 0x6d */ + VMEXIT_RDTSC = 110, /* 0x6e */ + VMEXIT_RDPMC = 111, /* 0x6f */ + VMEXIT_PUSHF = 112, /* 0x70 */ + VMEXIT_POPF = 113, /* 0x71 */ + VMEXIT_CPUID = 114, /* 0x72 */ + VMEXIT_RSM = 115, /* 0x73 */ + VMEXIT_IRET = 116, /* 0x74 */ + VMEXIT_SWINT = 117, /* 0x75 */ + VMEXIT_INVD = 118, /* 0x76 */ + VMEXIT_PAUSE = 119, /* 0x77 */ + VMEXIT_HLT = 120, /* 0x78 */ + VMEXIT_INVLPG = 121, /* 0x79 */ + VMEXIT_INVLPGA = 122, /* 0x7a */ + VMEXIT_IOIO = 123, /* 0x7b */ + VMEXIT_MSR = 124, /* 0x7c */ + VMEXIT_TASK_SWITCH = 125, /* 0x7d */ + VMEXIT_FERR_FREEZE = 126, /* 0x7e */ + VMEXIT_SHUTDOWN = 127, /* 0x7f */ + VMEXIT_VMRUN = 128, /* 0x80 */ + VMEXIT_VMMCALL = 129, /* 0x81 */ + VMEXIT_VMLOAD = 130, /* 0x82 */ + VMEXIT_VMSAVE = 131, /* 0x83 */ + VMEXIT_STGI = 132, /* 0x84 */ + VMEXIT_CLGI = 133, /* 0x85 */ + VMEXIT_SKINIT = 134, /* 0x86 */ + VMEXIT_RDTSCP = 135, /* 0x87 */ + VMEXIT_ICEBP = 136, /* 0x88 */ + VMEXIT_WBINVD = 137, /* 0x89 */ + VMEXIT_MONITOR = 138, /* 0x8a */ + VMEXIT_MWAIT = 139, /* 0x8b */ + VMEXIT_MWAIT_CONDITIONAL= 140, /* 0x8c */ + VMEXIT_XSETBV = 141, /* 0x8d */ + VMEXIT_RDPRU = 142, /* 0x8e */ + /* Remember to also update VMEXIT_NPF_PERFC! */ + VMEXIT_NPF = 1024, /* 0x400, nested paging fault */ + /* Remember to also update SVM_PERF_EXIT_REASON_SIZE! */ + VMEXIT_INVALID = -1 +}; + +enum +{ + /* Available on all SVM-capable hardware. */ + TLB_CTRL_NO_FLUSH = 0, + TLB_CTRL_FLUSH_ALL = 1, + + /* Available with the FlushByASID feature. */ + TLB_CTRL_FLUSH_ASID = 3, + TLB_CTRL_FLUSH_ASID_NONGLOBAL = 7, +}; + +typedef union +{ + struct + { + uint8_t vector; + uint8_t type:3; + bool ev:1; + uint32_t resvd1:19; + bool v:1; + uint32_t ec; + }; + uint64_t raw; +} intinfo_t; + +typedef union { + struct { + bool intr_shadow: 1; + bool guest_intr_mask:1; + }; + uint64_t raw; +} intstat_t; + +typedef union +{ + u64 bytes; + struct + { + u64 tpr: 8; + u64 irq: 1; + u64 vgif: 1; + u64 rsvd0: 6; + u64 prio: 4; + u64 ign_tpr: 1; + u64 rsvd1: 3; + u64 intr_masking: 1; + u64 vgif_enable: 1; + u64 rsvd2: 6; + u64 vector: 8; + u64 rsvd3: 24; + } fields; +} vintr_t; + +typedef union +{ + u64 bytes; + struct + { + u64 type: 1; + u64 rsv0: 1; + u64 str: 1; + u64 rep: 1; + u64 sz8: 1; + u64 sz16: 1; + u64 sz32: 1; + u64 rsv1: 9; + u64 port: 16; + } fields; +} ioio_info_t; + +typedef union +{ + u64 bytes; + struct + { + u64 lbr_enable:1; + u64 vloadsave_enable:1; + } fields; +} virt_ext_t; + +typedef union +{ + struct { + bool intercepts:1; /* 0: cr/dr/exception/general intercepts, + * pause_filter_count, tsc_offset */ + bool iopm:1; /* 1: iopm_base_pa, msrpm_base_pa */ + bool asid:1; /* 2: asid */ + bool tpr:1; /* 3: vintr */ + bool np:1; /* 4: np, h_cr3, g_pat */ + bool cr:1; /* 5: cr0, cr3, cr4, efer */ + bool dr:1; /* 6: dr6, dr7 */ + bool dt:1; /* 7: gdtr, idtr */ + bool seg:1; /* 8: cs, ds, es, ss, cpl */ + bool cr2:1; /* 9: cr2 */ + bool lbr:1; /* 10: debugctlmsr, last{branch,int}{to,from}ip */ + bool :1; + bool cet:1; /* 12: msr_s_set, ssp, msr_isst */ + }; + uint32_t raw; +} vmcbcleanbits_t; + +#define IOPM_SIZE (12 * 1024) +#define MSRPM_SIZE (8 * 1024) + +struct vmcb_struct { + u32 _cr_intercepts; /* offset 0x00 - cleanbit 0 */ + u32 _dr_intercepts; /* offset 0x04 - cleanbit 0 */ + u32 _exception_intercepts; /* offset 0x08 - cleanbit 0 */ + u32 _general1_intercepts; /* offset 0x0C - cleanbit 0 */ + u32 _general2_intercepts; /* offset 0x10 - cleanbit 0 */ + u32 res01[10]; + u16 _pause_filter_thresh; /* offset 0x3C - cleanbit 0 */ + u16 _pause_filter_count; /* offset 0x3E - cleanbit 0 */ + u64 _iopm_base_pa; /* offset 0x40 - cleanbit 1 */ + u64 _msrpm_base_pa; /* offset 0x48 - cleanbit 1 */ + u64 _tsc_offset; /* offset 0x50 - cleanbit 0 */ + u32 _asid; /* offset 0x58 - cleanbit 2 */ + u8 tlb_control; /* offset 0x5C - TLB_CTRL_* */ + u8 res07[3]; + vintr_t _vintr; /* offset 0x60 - cleanbit 3 */ + intstat_t int_stat; /* offset 0x68 */ + u64 exitcode; /* offset 0x70 */ + union { + struct { + uint64_t exitinfo1; /* offset 0x78 */ + uint64_t exitinfo2; /* offset 0x80 */ + }; + union { + struct { + uint32_t ec; /* #NP, #SS, #GP, #PF, #AC */ + uint32_t :32; + + uint64_t cr2; /* #PF */ + } exc; + struct { + bool in:1; + bool :1; + bool str:1; + bool rep:1; + uint16_t bytes:3; + uint16_t /* asz */:3; + uint16_t seg:3; + uint16_t :3; + uint16_t port; + uint32_t :32; + + uint64_t nrip; + } io; + struct { + uint64_t gpr:4; + uint64_t :59; + bool mov_insn:1; /* MOV, as opposed to LMSW, CLTS, etc */ + } mov_cr; + struct { + uint64_t ec; + uint64_t gpa; + } npf; + struct { + uint16_t sel; + uint64_t :48; + + uint32_t ec; + uint32_t :4; + bool iret:1; + uint32_t :1; + bool jmp:1; + uint32_t :5; + bool ev:1; + uint32_t :3; + bool rf:1; + } task_switch; + } ei; + }; + intinfo_t exit_int_info; /* offset 0x88 */ + union { /* offset 0x90 - cleanbit 4 */ + struct { + bool _np :1; + bool _sev :1; + bool _sev_es :1; + bool _gmet :1; + bool _np_sss :1; + bool _vte :1; + }; + uint64_t _np_ctrl; + }; + u64 res08[2]; + intinfo_t event_inj; /* offset 0xA8 */ + u64 _h_cr3; /* offset 0xB0 - cleanbit 4 */ + virt_ext_t virt_ext; /* offset 0xB8 */ + vmcbcleanbits_t cleanbits; /* offset 0xC0 */ + u32 res09; /* offset 0xC4 */ + u64 nextrip; /* offset 0xC8 */ + u8 guest_ins_len; /* offset 0xD0 */ + u8 guest_ins[15]; /* offset 0xD1 */ + u64 res10a[100]; /* offset 0xE0 pad to save area */ + + union { + struct segment_register sreg[6]; + struct { + struct segment_register es; /* offset 0x400 - cleanbit 8 */ + struct segment_register cs; /* cleanbit 8 */ + struct segment_register ss; /* cleanbit 8 */ + struct segment_register ds; /* cleanbit 8 */ + struct segment_register fs; + struct segment_register gs; + }; + }; + struct segment_register gdtr; /* cleanbit 7 */ + struct segment_register ldtr; + struct segment_register idtr; /* cleanbit 7 */ + struct segment_register tr; + u64 res10[5]; + u8 res11[3]; + u8 _cpl; /* cleanbit 8 */ + u32 res12; + u64 _efer; /* offset 0x400 + 0xD0 - cleanbit 5 */ + u64 res13[14]; + u64 _cr4; /* offset 0x400 + 0x148 - cleanbit 5 */ + u64 _cr3; /* cleanbit 5 */ + u64 _cr0; /* cleanbit 5 */ + u64 _dr7; /* cleanbit 6 */ + u64 _dr6; /* cleanbit 6 */ + u64 rflags; + u64 rip; + u64 res14[11]; + u64 rsp; + u64 _msr_s_cet; /* offset 0x400 + 0x1E0 - cleanbit 12 */ + u64 _ssp; /* offset 0x400 + 0x1E8 | */ + u64 _msr_isst; /* offset 0x400 + 0x1F0 v */ + u64 rax; + u64 star; + u64 lstar; + u64 cstar; + u64 sfmask; + u64 kerngsbase; + u64 sysenter_cs; + u64 sysenter_esp; + u64 sysenter_eip; + u64 _cr2; /* cleanbit 9 */ + u64 res16[4]; + u64 _g_pat; /* cleanbit 4 */ + u64 _debugctlmsr; /* cleanbit 10 */ + u64 _lastbranchfromip; /* cleanbit 10 */ + u64 _lastbranchtoip; /* cleanbit 10 */ + u64 _lastintfromip; /* cleanbit 10 */ + u64 _lastinttoip; /* cleanbit 10 */ + u64 res17[9]; + u64 spec_ctrl; + u64 res18[291]; +}; + +struct vmcb_struct *alloc_vmcb(void); +void free_vmcb(struct vmcb_struct *vmcb); + +int svm_create_vmcb(struct vcpu *v); +void svm_destroy_vmcb(struct vcpu *v); + +void setup_vmcb_dump(void); + +/* + * VMCB accessor functions. + */ + +#define VMCB_ACCESSORS_(name, type, cleanbit) \ +static inline void \ +vmcb_set_ ## name(struct vmcb_struct *vmcb, \ + type value) \ +{ \ + vmcb->_ ## name = value; \ + vmcb->cleanbits.cleanbit = false; \ +} \ +static inline type \ +vmcb_get_ ## name(const struct vmcb_struct *vmcb) \ +{ \ + return vmcb->_ ## name; \ +} + +#define VMCB_ACCESSORS(name, cleanbit) \ + VMCB_ACCESSORS_(name, typeof(((struct vmcb_struct){})._ ## name), cleanbit) + +VMCB_ACCESSORS(cr_intercepts, intercepts) +VMCB_ACCESSORS(dr_intercepts, intercepts) +VMCB_ACCESSORS(exception_intercepts, intercepts) +VMCB_ACCESSORS(general1_intercepts, intercepts) +VMCB_ACCESSORS(general2_intercepts, intercepts) +VMCB_ACCESSORS(pause_filter_count, intercepts) +VMCB_ACCESSORS(pause_filter_thresh, intercepts) +VMCB_ACCESSORS(tsc_offset, intercepts) +VMCB_ACCESSORS(iopm_base_pa, iopm) +VMCB_ACCESSORS(msrpm_base_pa, iopm) +VMCB_ACCESSORS(asid, asid) +VMCB_ACCESSORS(vintr, tpr) +VMCB_ACCESSORS(np_ctrl, np) +VMCB_ACCESSORS_(np, bool, np) +VMCB_ACCESSORS_(sev, bool, np) +VMCB_ACCESSORS_(sev_es, bool, np) +VMCB_ACCESSORS_(gmet, bool, np) +VMCB_ACCESSORS_(vte, bool, np) +VMCB_ACCESSORS(h_cr3, np) +VMCB_ACCESSORS(g_pat, np) +VMCB_ACCESSORS(cr0, cr) +VMCB_ACCESSORS(cr3, cr) +VMCB_ACCESSORS(cr4, cr) +VMCB_ACCESSORS(efer, cr) +VMCB_ACCESSORS(dr6, dr) +VMCB_ACCESSORS(dr7, dr) +VMCB_ACCESSORS(cpl, seg) +VMCB_ACCESSORS(cr2, cr2) +VMCB_ACCESSORS(debugctlmsr, lbr) +VMCB_ACCESSORS(lastbranchfromip, lbr) +VMCB_ACCESSORS(lastbranchtoip, lbr) +VMCB_ACCESSORS(lastintfromip, lbr) +VMCB_ACCESSORS(lastinttoip, lbr) +VMCB_ACCESSORS(msr_s_cet, cet) +VMCB_ACCESSORS(ssp, cet) +VMCB_ACCESSORS(msr_isst, cet) + +#undef VMCB_ACCESSORS + +#endif /* SVM_PRIVATE_VMCB_H */ diff --git a/xen/arch/x86/include/asm/hvm/svm/vmcb.h b/xen/arch/x86/include/asm/hvm/svm/vmcb.h index 28f715e376..717215ff96 100644 --- a/xen/arch/x86/include/asm/hvm/svm/vmcb.h +++ b/xen/arch/x86/include/asm/hvm/svm/vmcb.h @@ -10,544 +10,6 @@ #include -/* general 1 intercepts */ -enum GenericIntercept1bits -{ - GENERAL1_INTERCEPT_INTR = 1 << 0, - GENERAL1_INTERCEPT_NMI = 1 << 1, - GENERAL1_INTERCEPT_SMI = 1 << 2, - GENERAL1_INTERCEPT_INIT = 1 << 3, - GENERAL1_INTERCEPT_VINTR = 1 << 4, - GENERAL1_INTERCEPT_CR0_SEL_WRITE = 1 << 5, - GENERAL1_INTERCEPT_IDTR_READ = 1 << 6, - GENERAL1_INTERCEPT_GDTR_READ = 1 << 7, - GENERAL1_INTERCEPT_LDTR_READ = 1 << 8, - GENERAL1_INTERCEPT_TR_READ = 1 << 9, - GENERAL1_INTERCEPT_IDTR_WRITE = 1 << 10, - GENERAL1_INTERCEPT_GDTR_WRITE = 1 << 11, - GENERAL1_INTERCEPT_LDTR_WRITE = 1 << 12, - GENERAL1_INTERCEPT_TR_WRITE = 1 << 13, - GENERAL1_INTERCEPT_RDTSC = 1 << 14, - GENERAL1_INTERCEPT_RDPMC = 1 << 15, - GENERAL1_INTERCEPT_PUSHF = 1 << 16, - GENERAL1_INTERCEPT_POPF = 1 << 17, - GENERAL1_INTERCEPT_CPUID = 1 << 18, - GENERAL1_INTERCEPT_RSM = 1 << 19, - GENERAL1_INTERCEPT_IRET = 1 << 20, - GENERAL1_INTERCEPT_SWINT = 1 << 21, - GENERAL1_INTERCEPT_INVD = 1 << 22, - GENERAL1_INTERCEPT_PAUSE = 1 << 23, - GENERAL1_INTERCEPT_HLT = 1 << 24, - GENERAL1_INTERCEPT_INVLPG = 1 << 25, - GENERAL1_INTERCEPT_INVLPGA = 1 << 26, - GENERAL1_INTERCEPT_IOIO_PROT = 1 << 27, - GENERAL1_INTERCEPT_MSR_PROT = 1 << 28, - GENERAL1_INTERCEPT_TASK_SWITCH = 1 << 29, - GENERAL1_INTERCEPT_FERR_FREEZE = 1 << 30, - GENERAL1_INTERCEPT_SHUTDOWN_EVT = 1u << 31 -}; - -/* general 2 intercepts */ -enum GenericIntercept2bits -{ - GENERAL2_INTERCEPT_VMRUN = 1 << 0, - GENERAL2_INTERCEPT_VMMCALL = 1 << 1, - GENERAL2_INTERCEPT_VMLOAD = 1 << 2, - GENERAL2_INTERCEPT_VMSAVE = 1 << 3, - GENERAL2_INTERCEPT_STGI = 1 << 4, - GENERAL2_INTERCEPT_CLGI = 1 << 5, - GENERAL2_INTERCEPT_SKINIT = 1 << 6, - GENERAL2_INTERCEPT_RDTSCP = 1 << 7, - GENERAL2_INTERCEPT_ICEBP = 1 << 8, - GENERAL2_INTERCEPT_WBINVD = 1 << 9, - GENERAL2_INTERCEPT_MONITOR = 1 << 10, - GENERAL2_INTERCEPT_MWAIT = 1 << 11, - GENERAL2_INTERCEPT_MWAIT_CONDITIONAL = 1 << 12, - GENERAL2_INTERCEPT_XSETBV = 1 << 13, - GENERAL2_INTERCEPT_RDPRU = 1 << 14, -}; - - -/* control register intercepts */ -enum CRInterceptBits -{ - CR_INTERCEPT_CR0_READ = 1 << 0, - CR_INTERCEPT_CR1_READ = 1 << 1, - CR_INTERCEPT_CR2_READ = 1 << 2, - CR_INTERCEPT_CR3_READ = 1 << 3, - CR_INTERCEPT_CR4_READ = 1 << 4, - CR_INTERCEPT_CR5_READ = 1 << 5, - CR_INTERCEPT_CR6_READ = 1 << 6, - CR_INTERCEPT_CR7_READ = 1 << 7, - CR_INTERCEPT_CR8_READ = 1 << 8, - CR_INTERCEPT_CR9_READ = 1 << 9, - CR_INTERCEPT_CR10_READ = 1 << 10, - CR_INTERCEPT_CR11_READ = 1 << 11, - CR_INTERCEPT_CR12_READ = 1 << 12, - CR_INTERCEPT_CR13_READ = 1 << 13, - CR_INTERCEPT_CR14_READ = 1 << 14, - CR_INTERCEPT_CR15_READ = 1 << 15, - CR_INTERCEPT_CR0_WRITE = 1 << 16, - CR_INTERCEPT_CR1_WRITE = 1 << 17, - CR_INTERCEPT_CR2_WRITE = 1 << 18, - CR_INTERCEPT_CR3_WRITE = 1 << 19, - CR_INTERCEPT_CR4_WRITE = 1 << 20, - CR_INTERCEPT_CR5_WRITE = 1 << 21, - CR_INTERCEPT_CR6_WRITE = 1 << 22, - CR_INTERCEPT_CR7_WRITE = 1 << 23, - CR_INTERCEPT_CR8_WRITE = 1 << 24, - CR_INTERCEPT_CR9_WRITE = 1 << 25, - CR_INTERCEPT_CR10_WRITE = 1 << 26, - CR_INTERCEPT_CR11_WRITE = 1 << 27, - CR_INTERCEPT_CR12_WRITE = 1 << 28, - CR_INTERCEPT_CR13_WRITE = 1 << 29, - CR_INTERCEPT_CR14_WRITE = 1 << 30, - CR_INTERCEPT_CR15_WRITE = 1u << 31, -}; - - -/* debug register intercepts */ -enum DRInterceptBits -{ - DR_INTERCEPT_DR0_READ = 1 << 0, - DR_INTERCEPT_DR1_READ = 1 << 1, - DR_INTERCEPT_DR2_READ = 1 << 2, - DR_INTERCEPT_DR3_READ = 1 << 3, - DR_INTERCEPT_DR4_READ = 1 << 4, - DR_INTERCEPT_DR5_READ = 1 << 5, - DR_INTERCEPT_DR6_READ = 1 << 6, - DR_INTERCEPT_DR7_READ = 1 << 7, - DR_INTERCEPT_DR8_READ = 1 << 8, - DR_INTERCEPT_DR9_READ = 1 << 9, - DR_INTERCEPT_DR10_READ = 1 << 10, - DR_INTERCEPT_DR11_READ = 1 << 11, - DR_INTERCEPT_DR12_READ = 1 << 12, - DR_INTERCEPT_DR13_READ = 1 << 13, - DR_INTERCEPT_DR14_READ = 1 << 14, - DR_INTERCEPT_DR15_READ = 1 << 15, - DR_INTERCEPT_DR0_WRITE = 1 << 16, - DR_INTERCEPT_DR1_WRITE = 1 << 17, - DR_INTERCEPT_DR2_WRITE = 1 << 18, - DR_INTERCEPT_DR3_WRITE = 1 << 19, - DR_INTERCEPT_DR4_WRITE = 1 << 20, - DR_INTERCEPT_DR5_WRITE = 1 << 21, - DR_INTERCEPT_DR6_WRITE = 1 << 22, - DR_INTERCEPT_DR7_WRITE = 1 << 23, - DR_INTERCEPT_DR8_WRITE = 1 << 24, - DR_INTERCEPT_DR9_WRITE = 1 << 25, - DR_INTERCEPT_DR10_WRITE = 1 << 26, - DR_INTERCEPT_DR11_WRITE = 1 << 27, - DR_INTERCEPT_DR12_WRITE = 1 << 28, - DR_INTERCEPT_DR13_WRITE = 1 << 29, - DR_INTERCEPT_DR14_WRITE = 1 << 30, - DR_INTERCEPT_DR15_WRITE = 1u << 31, -}; - -enum VMEXIT_EXITCODE -{ - /* control register read exitcodes */ - VMEXIT_CR0_READ = 0, /* 0x0 */ - VMEXIT_CR1_READ = 1, /* 0x1 */ - VMEXIT_CR2_READ = 2, /* 0x2 */ - VMEXIT_CR3_READ = 3, /* 0x3 */ - VMEXIT_CR4_READ = 4, /* 0x4 */ - VMEXIT_CR5_READ = 5, /* 0x5 */ - VMEXIT_CR6_READ = 6, /* 0x6 */ - VMEXIT_CR7_READ = 7, /* 0x7 */ - VMEXIT_CR8_READ = 8, /* 0x8 */ - VMEXIT_CR9_READ = 9, /* 0x9 */ - VMEXIT_CR10_READ = 10, /* 0xa */ - VMEXIT_CR11_READ = 11, /* 0xb */ - VMEXIT_CR12_READ = 12, /* 0xc */ - VMEXIT_CR13_READ = 13, /* 0xd */ - VMEXIT_CR14_READ = 14, /* 0xe */ - VMEXIT_CR15_READ = 15, /* 0xf */ - - /* control register write exitcodes */ - VMEXIT_CR0_WRITE = 16, /* 0x10 */ - VMEXIT_CR1_WRITE = 17, /* 0x11 */ - VMEXIT_CR2_WRITE = 18, /* 0x12 */ - VMEXIT_CR3_WRITE = 19, /* 0x13 */ - VMEXIT_CR4_WRITE = 20, /* 0x14 */ - VMEXIT_CR5_WRITE = 21, /* 0x15 */ - VMEXIT_CR6_WRITE = 22, /* 0x16 */ - VMEXIT_CR7_WRITE = 23, /* 0x17 */ - VMEXIT_CR8_WRITE = 24, /* 0x18 */ - VMEXIT_CR9_WRITE = 25, /* 0x19 */ - VMEXIT_CR10_WRITE = 26, /* 0x1a */ - VMEXIT_CR11_WRITE = 27, /* 0x1b */ - VMEXIT_CR12_WRITE = 28, /* 0x1c */ - VMEXIT_CR13_WRITE = 29, /* 0x1d */ - VMEXIT_CR14_WRITE = 30, /* 0x1e */ - VMEXIT_CR15_WRITE = 31, /* 0x1f */ - - /* debug register read exitcodes */ - VMEXIT_DR0_READ = 32, /* 0x20 */ - VMEXIT_DR1_READ = 33, /* 0x21 */ - VMEXIT_DR2_READ = 34, /* 0x22 */ - VMEXIT_DR3_READ = 35, /* 0x23 */ - VMEXIT_DR4_READ = 36, /* 0x24 */ - VMEXIT_DR5_READ = 37, /* 0x25 */ - VMEXIT_DR6_READ = 38, /* 0x26 */ - VMEXIT_DR7_READ = 39, /* 0x27 */ - VMEXIT_DR8_READ = 40, /* 0x28 */ - VMEXIT_DR9_READ = 41, /* 0x29 */ - VMEXIT_DR10_READ = 42, /* 0x2a */ - VMEXIT_DR11_READ = 43, /* 0x2b */ - VMEXIT_DR12_READ = 44, /* 0x2c */ - VMEXIT_DR13_READ = 45, /* 0x2d */ - VMEXIT_DR14_READ = 46, /* 0x2e */ - VMEXIT_DR15_READ = 47, /* 0x2f */ - - /* debug register write exitcodes */ - VMEXIT_DR0_WRITE = 48, /* 0x30 */ - VMEXIT_DR1_WRITE = 49, /* 0x31 */ - VMEXIT_DR2_WRITE = 50, /* 0x32 */ - VMEXIT_DR3_WRITE = 51, /* 0x33 */ - VMEXIT_DR4_WRITE = 52, /* 0x34 */ - VMEXIT_DR5_WRITE = 53, /* 0x35 */ - VMEXIT_DR6_WRITE = 54, /* 0x36 */ - VMEXIT_DR7_WRITE = 55, /* 0x37 */ - VMEXIT_DR8_WRITE = 56, /* 0x38 */ - VMEXIT_DR9_WRITE = 57, /* 0x39 */ - VMEXIT_DR10_WRITE = 58, /* 0x3a */ - VMEXIT_DR11_WRITE = 59, /* 0x3b */ - VMEXIT_DR12_WRITE = 60, /* 0x3c */ - VMEXIT_DR13_WRITE = 61, /* 0x3d */ - VMEXIT_DR14_WRITE = 62, /* 0x3e */ - VMEXIT_DR15_WRITE = 63, /* 0x3f */ - - /* processor exception exitcodes (VMEXIT_EXCP[0-31]) */ - VMEXIT_EXCEPTION_DE = 64, /* 0x40, divide-by-zero-error */ - VMEXIT_EXCEPTION_DB = 65, /* 0x41, debug */ - VMEXIT_EXCEPTION_NMI = 66, /* 0x42, non-maskable-interrupt */ - VMEXIT_EXCEPTION_BP = 67, /* 0x43, breakpoint */ - VMEXIT_EXCEPTION_OF = 68, /* 0x44, overflow */ - VMEXIT_EXCEPTION_BR = 69, /* 0x45, bound-range */ - VMEXIT_EXCEPTION_UD = 70, /* 0x46, invalid-opcode*/ - VMEXIT_EXCEPTION_NM = 71, /* 0x47, device-not-available */ - VMEXIT_EXCEPTION_DF = 72, /* 0x48, double-fault */ - VMEXIT_EXCEPTION_09 = 73, /* 0x49, unsupported (reserved) */ - VMEXIT_EXCEPTION_TS = 74, /* 0x4a, invalid-tss */ - VMEXIT_EXCEPTION_NP = 75, /* 0x4b, segment-not-present */ - VMEXIT_EXCEPTION_SS = 76, /* 0x4c, stack */ - VMEXIT_EXCEPTION_GP = 77, /* 0x4d, general-protection */ - VMEXIT_EXCEPTION_PF = 78, /* 0x4e, page-fault */ - VMEXIT_EXCEPTION_15 = 79, /* 0x4f, reserved */ - VMEXIT_EXCEPTION_MF = 80, /* 0x50, x87 floating-point exception-pending */ - VMEXIT_EXCEPTION_AC = 81, /* 0x51, alignment-check */ - VMEXIT_EXCEPTION_MC = 82, /* 0x52, machine-check */ - VMEXIT_EXCEPTION_XF = 83, /* 0x53, simd floating-point */ -/* VMEXIT_EXCEPTION_20 = 84, 0x54, #VE (Intel specific) */ - VMEXIT_EXCEPTION_CP = 85, /* 0x55, controlflow protection */ - - /* exceptions 20-31 (exitcodes 84-95) are reserved */ - - /* ...and the rest of the #VMEXITs */ - VMEXIT_INTR = 96, /* 0x60 */ - VMEXIT_NMI = 97, /* 0x61 */ - VMEXIT_SMI = 98, /* 0x62 */ - VMEXIT_INIT = 99, /* 0x63 */ - VMEXIT_VINTR = 100, /* 0x64 */ - VMEXIT_CR0_SEL_WRITE = 101, /* 0x65 */ - VMEXIT_IDTR_READ = 102, /* 0x66 */ - VMEXIT_GDTR_READ = 103, /* 0x67 */ - VMEXIT_LDTR_READ = 104, /* 0x68 */ - VMEXIT_TR_READ = 105, /* 0x69 */ - VMEXIT_IDTR_WRITE = 106, /* 0x6a */ - VMEXIT_GDTR_WRITE = 107, /* 0x6b */ - VMEXIT_LDTR_WRITE = 108, /* 0x6c */ - VMEXIT_TR_WRITE = 109, /* 0x6d */ - VMEXIT_RDTSC = 110, /* 0x6e */ - VMEXIT_RDPMC = 111, /* 0x6f */ - VMEXIT_PUSHF = 112, /* 0x70 */ - VMEXIT_POPF = 113, /* 0x71 */ - VMEXIT_CPUID = 114, /* 0x72 */ - VMEXIT_RSM = 115, /* 0x73 */ - VMEXIT_IRET = 116, /* 0x74 */ - VMEXIT_SWINT = 117, /* 0x75 */ - VMEXIT_INVD = 118, /* 0x76 */ - VMEXIT_PAUSE = 119, /* 0x77 */ - VMEXIT_HLT = 120, /* 0x78 */ - VMEXIT_INVLPG = 121, /* 0x79 */ - VMEXIT_INVLPGA = 122, /* 0x7a */ - VMEXIT_IOIO = 123, /* 0x7b */ - VMEXIT_MSR = 124, /* 0x7c */ - VMEXIT_TASK_SWITCH = 125, /* 0x7d */ - VMEXIT_FERR_FREEZE = 126, /* 0x7e */ - VMEXIT_SHUTDOWN = 127, /* 0x7f */ - VMEXIT_VMRUN = 128, /* 0x80 */ - VMEXIT_VMMCALL = 129, /* 0x81 */ - VMEXIT_VMLOAD = 130, /* 0x82 */ - VMEXIT_VMSAVE = 131, /* 0x83 */ - VMEXIT_STGI = 132, /* 0x84 */ - VMEXIT_CLGI = 133, /* 0x85 */ - VMEXIT_SKINIT = 134, /* 0x86 */ - VMEXIT_RDTSCP = 135, /* 0x87 */ - VMEXIT_ICEBP = 136, /* 0x88 */ - VMEXIT_WBINVD = 137, /* 0x89 */ - VMEXIT_MONITOR = 138, /* 0x8a */ - VMEXIT_MWAIT = 139, /* 0x8b */ - VMEXIT_MWAIT_CONDITIONAL= 140, /* 0x8c */ - VMEXIT_XSETBV = 141, /* 0x8d */ - VMEXIT_RDPRU = 142, /* 0x8e */ - /* Remember to also update VMEXIT_NPF_PERFC! */ - VMEXIT_NPF = 1024, /* 0x400, nested paging fault */ - /* Remember to also update SVM_PERF_EXIT_REASON_SIZE! */ - VMEXIT_INVALID = -1 -}; - -enum -{ - /* Available on all SVM-capable hardware. */ - TLB_CTRL_NO_FLUSH = 0, - TLB_CTRL_FLUSH_ALL = 1, - - /* Available with the FlushByASID feature. */ - TLB_CTRL_FLUSH_ASID = 3, - TLB_CTRL_FLUSH_ASID_NONGLOBAL = 7, -}; - -typedef union -{ - struct - { - uint8_t vector; - uint8_t type:3; - bool ev:1; - uint32_t resvd1:19; - bool v:1; - uint32_t ec; - }; - uint64_t raw; -} intinfo_t; - -typedef union { - struct { - bool intr_shadow: 1; - bool guest_intr_mask:1; - }; - uint64_t raw; -} intstat_t; - -typedef union -{ - u64 bytes; - struct - { - u64 tpr: 8; - u64 irq: 1; - u64 vgif: 1; - u64 rsvd0: 6; - u64 prio: 4; - u64 ign_tpr: 1; - u64 rsvd1: 3; - u64 intr_masking: 1; - u64 vgif_enable: 1; - u64 rsvd2: 6; - u64 vector: 8; - u64 rsvd3: 24; - } fields; -} vintr_t; - -typedef union -{ - u64 bytes; - struct - { - u64 type: 1; - u64 rsv0: 1; - u64 str: 1; - u64 rep: 1; - u64 sz8: 1; - u64 sz16: 1; - u64 sz32: 1; - u64 rsv1: 9; - u64 port: 16; - } fields; -} ioio_info_t; - -typedef union -{ - u64 bytes; - struct - { - u64 lbr_enable:1; - u64 vloadsave_enable:1; - } fields; -} virt_ext_t; - -typedef union -{ - struct { - bool intercepts:1; /* 0: cr/dr/exception/general intercepts, - * pause_filter_count, tsc_offset */ - bool iopm:1; /* 1: iopm_base_pa, msrpm_base_pa */ - bool asid:1; /* 2: asid */ - bool tpr:1; /* 3: vintr */ - bool np:1; /* 4: np, h_cr3, g_pat */ - bool cr:1; /* 5: cr0, cr3, cr4, efer */ - bool dr:1; /* 6: dr6, dr7 */ - bool dt:1; /* 7: gdtr, idtr */ - bool seg:1; /* 8: cs, ds, es, ss, cpl */ - bool cr2:1; /* 9: cr2 */ - bool lbr:1; /* 10: debugctlmsr, last{branch,int}{to,from}ip */ - bool :1; - bool cet:1; /* 12: msr_s_set, ssp, msr_isst */ - }; - uint32_t raw; -} vmcbcleanbits_t; - -#define IOPM_SIZE (12 * 1024) -#define MSRPM_SIZE (8 * 1024) - -struct vmcb_struct { - u32 _cr_intercepts; /* offset 0x00 - cleanbit 0 */ - u32 _dr_intercepts; /* offset 0x04 - cleanbit 0 */ - u32 _exception_intercepts; /* offset 0x08 - cleanbit 0 */ - u32 _general1_intercepts; /* offset 0x0C - cleanbit 0 */ - u32 _general2_intercepts; /* offset 0x10 - cleanbit 0 */ - u32 res01[10]; - u16 _pause_filter_thresh; /* offset 0x3C - cleanbit 0 */ - u16 _pause_filter_count; /* offset 0x3E - cleanbit 0 */ - u64 _iopm_base_pa; /* offset 0x40 - cleanbit 1 */ - u64 _msrpm_base_pa; /* offset 0x48 - cleanbit 1 */ - u64 _tsc_offset; /* offset 0x50 - cleanbit 0 */ - u32 _asid; /* offset 0x58 - cleanbit 2 */ - u8 tlb_control; /* offset 0x5C - TLB_CTRL_* */ - u8 res07[3]; - vintr_t _vintr; /* offset 0x60 - cleanbit 3 */ - intstat_t int_stat; /* offset 0x68 */ - u64 exitcode; /* offset 0x70 */ - union { - struct { - uint64_t exitinfo1; /* offset 0x78 */ - uint64_t exitinfo2; /* offset 0x80 */ - }; - union { - struct { - uint32_t ec; /* #NP, #SS, #GP, #PF, #AC */ - uint32_t :32; - - uint64_t cr2; /* #PF */ - } exc; - struct { - bool in:1; - bool :1; - bool str:1; - bool rep:1; - uint16_t bytes:3; - uint16_t /* asz */:3; - uint16_t seg:3; - uint16_t :3; - uint16_t port; - uint32_t :32; - - uint64_t nrip; - } io; - struct { - uint64_t gpr:4; - uint64_t :59; - bool mov_insn:1; /* MOV, as opposed to LMSW, CLTS, etc */ - } mov_cr; - struct { - uint64_t ec; - uint64_t gpa; - } npf; - struct { - uint16_t sel; - uint64_t :48; - - uint32_t ec; - uint32_t :4; - bool iret:1; - uint32_t :1; - bool jmp:1; - uint32_t :5; - bool ev:1; - uint32_t :3; - bool rf:1; - } task_switch; - } ei; - }; - intinfo_t exit_int_info; /* offset 0x88 */ - union { /* offset 0x90 - cleanbit 4 */ - struct { - bool _np :1; - bool _sev :1; - bool _sev_es :1; - bool _gmet :1; - bool _np_sss :1; - bool _vte :1; - }; - uint64_t _np_ctrl; - }; - u64 res08[2]; - intinfo_t event_inj; /* offset 0xA8 */ - u64 _h_cr3; /* offset 0xB0 - cleanbit 4 */ - virt_ext_t virt_ext; /* offset 0xB8 */ - vmcbcleanbits_t cleanbits; /* offset 0xC0 */ - u32 res09; /* offset 0xC4 */ - u64 nextrip; /* offset 0xC8 */ - u8 guest_ins_len; /* offset 0xD0 */ - u8 guest_ins[15]; /* offset 0xD1 */ - u64 res10a[100]; /* offset 0xE0 pad to save area */ - - union { - struct segment_register sreg[6]; - struct { - struct segment_register es; /* offset 0x400 - cleanbit 8 */ - struct segment_register cs; /* cleanbit 8 */ - struct segment_register ss; /* cleanbit 8 */ - struct segment_register ds; /* cleanbit 8 */ - struct segment_register fs; - struct segment_register gs; - }; - }; - struct segment_register gdtr; /* cleanbit 7 */ - struct segment_register ldtr; - struct segment_register idtr; /* cleanbit 7 */ - struct segment_register tr; - u64 res10[5]; - u8 res11[3]; - u8 _cpl; /* cleanbit 8 */ - u32 res12; - u64 _efer; /* offset 0x400 + 0xD0 - cleanbit 5 */ - u64 res13[14]; - u64 _cr4; /* offset 0x400 + 0x148 - cleanbit 5 */ - u64 _cr3; /* cleanbit 5 */ - u64 _cr0; /* cleanbit 5 */ - u64 _dr7; /* cleanbit 6 */ - u64 _dr6; /* cleanbit 6 */ - u64 rflags; - u64 rip; - u64 res14[11]; - u64 rsp; - u64 _msr_s_cet; /* offset 0x400 + 0x1E0 - cleanbit 12 */ - u64 _ssp; /* offset 0x400 + 0x1E8 | */ - u64 _msr_isst; /* offset 0x400 + 0x1F0 v */ - u64 rax; - u64 star; - u64 lstar; - u64 cstar; - u64 sfmask; - u64 kerngsbase; - u64 sysenter_cs; - u64 sysenter_esp; - u64 sysenter_eip; - u64 _cr2; /* cleanbit 9 */ - u64 res16[4]; - u64 _g_pat; /* cleanbit 4 */ - u64 _debugctlmsr; /* cleanbit 10 */ - u64 _lastbranchfromip; /* cleanbit 10 */ - u64 _lastbranchtoip; /* cleanbit 10 */ - u64 _lastintfromip; /* cleanbit 10 */ - u64 _lastinttoip; /* cleanbit 10 */ - u64 res17[9]; - u64 spec_ctrl; - u64 res18[291]; -}; - struct svm_domain { /* OSVW MSRs */ union { @@ -595,14 +57,6 @@ struct svm_vcpu { uint64_t guest_sysenter_eip; }; -struct vmcb_struct *alloc_vmcb(void); -void free_vmcb(struct vmcb_struct *vmcb); - -int svm_create_vmcb(struct vcpu *v); -void svm_destroy_vmcb(struct vcpu *v); - -void setup_vmcb_dump(void); - #define MSR_INTERCEPT_NONE 0 #define MSR_INTERCEPT_READ 1 #define MSR_INTERCEPT_WRITE 2 @@ -611,66 +65,6 @@ void svm_intercept_msr(struct vcpu *v, uint32_t msr, int flags); #define svm_disable_intercept_for_msr(v, msr) svm_intercept_msr((v), (msr), MSR_INTERCEPT_NONE) #define svm_enable_intercept_for_msr(v, msr) svm_intercept_msr((v), (msr), MSR_INTERCEPT_RW) -/* - * VMCB accessor functions. - */ - -#define VMCB_ACCESSORS_(name, type, cleanbit) \ -static inline void \ -vmcb_set_ ## name(struct vmcb_struct *vmcb, \ - type value) \ -{ \ - vmcb->_ ## name = value; \ - vmcb->cleanbits.cleanbit = false; \ -} \ -static inline type \ -vmcb_get_ ## name(const struct vmcb_struct *vmcb) \ -{ \ - return vmcb->_ ## name; \ -} - -#define VMCB_ACCESSORS(name, cleanbit) \ - VMCB_ACCESSORS_(name, typeof(((struct vmcb_struct){})._ ## name), cleanbit) - -VMCB_ACCESSORS(cr_intercepts, intercepts) -VMCB_ACCESSORS(dr_intercepts, intercepts) -VMCB_ACCESSORS(exception_intercepts, intercepts) -VMCB_ACCESSORS(general1_intercepts, intercepts) -VMCB_ACCESSORS(general2_intercepts, intercepts) -VMCB_ACCESSORS(pause_filter_count, intercepts) -VMCB_ACCESSORS(pause_filter_thresh, intercepts) -VMCB_ACCESSORS(tsc_offset, intercepts) -VMCB_ACCESSORS(iopm_base_pa, iopm) -VMCB_ACCESSORS(msrpm_base_pa, iopm) -VMCB_ACCESSORS(asid, asid) -VMCB_ACCESSORS(vintr, tpr) -VMCB_ACCESSORS(np_ctrl, np) -VMCB_ACCESSORS_(np, bool, np) -VMCB_ACCESSORS_(sev, bool, np) -VMCB_ACCESSORS_(sev_es, bool, np) -VMCB_ACCESSORS_(gmet, bool, np) -VMCB_ACCESSORS_(vte, bool, np) -VMCB_ACCESSORS(h_cr3, np) -VMCB_ACCESSORS(g_pat, np) -VMCB_ACCESSORS(cr0, cr) -VMCB_ACCESSORS(cr3, cr) -VMCB_ACCESSORS(cr4, cr) -VMCB_ACCESSORS(efer, cr) -VMCB_ACCESSORS(dr6, dr) -VMCB_ACCESSORS(dr7, dr) -VMCB_ACCESSORS(cpl, seg) -VMCB_ACCESSORS(cr2, cr2) -VMCB_ACCESSORS(debugctlmsr, lbr) -VMCB_ACCESSORS(lastbranchfromip, lbr) -VMCB_ACCESSORS(lastbranchtoip, lbr) -VMCB_ACCESSORS(lastintfromip, lbr) -VMCB_ACCESSORS(lastinttoip, lbr) -VMCB_ACCESSORS(msr_s_cet, cet) -VMCB_ACCESSORS(ssp, cet) -VMCB_ACCESSORS(msr_isst, cet) - -#undef VMCB_ACCESSORS - #endif /* ASM_X86_HVM_SVM_VMCS_H__ */ /* -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 04:33:25 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 04:33:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1185179.1507430 (Exim 4.92) (envelope-from ) id 1vTuqL-0001Dr-91; Fri, 12 Dec 2025 04:33:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1185179.1507430; Fri, 12 Dec 2025 04:33:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTuqL-0001Dh-69; Fri, 12 Dec 2025 04:33:25 +0000 Received: by outflank-mailman (input) for mailman id 1185179; Fri, 12 Dec 2025 04:33:24 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTuqK-0001DX-2t for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:33:24 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTuqJ-006EL4-2U for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:33:24 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTuqK-004An8-05 for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:33:24 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=f1QDrvE/2ZwPxVXq2iTIwQpw0PFgd6ogdcEZe/0vKSE=; b=yVAW5Ms2l/bWKrTttyPnw8H3Z9 uHhM3Kzon9DEWE4nrFfwnLj7udrEOt6B2HoNb2iEvmdZY++KyO43xPFwFdDHk7c7zRP79FsZiKN6a oJTIxhEbs7gsOE14AmnEim12wzBCS+u4BOTooTdaSv8dq7wkWcl14GWgLbkHz/9YTK8g=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/svm: Drop svmdebug.c Message-Id: Date: Fri, 12 Dec 2025 04:33:24 +0000 commit 0a55f32a2c5d14931f4b4a0d468cc6d8213948df Author: Andrew Cooper AuthorDate: Fri Aug 29 12:38:54 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 12 03:04:48 2025 +0000 x86/svm: Drop svmdebug.c Everything here is really VMCB functionality, so merge it into vmcb.c. Move the declarations from the global svmdebug.h to the local vmcb.h. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/hvm/svm/Makefile | 1 - xen/arch/x86/hvm/svm/nestedsvm.c | 1 - xen/arch/x86/hvm/svm/svmdebug.c | 181 ---------------------------- xen/arch/x86/hvm/svm/vmcb.c | 159 ++++++++++++++++++++++++ xen/arch/x86/hvm/svm/vmcb.h | 3 + xen/arch/x86/include/asm/hvm/svm/svmdebug.h | 3 - 6 files changed, 162 insertions(+), 186 deletions(-) diff --git a/xen/arch/x86/hvm/svm/Makefile b/xen/arch/x86/hvm/svm/Makefile index 760d2954da..8a072cafd5 100644 --- a/xen/arch/x86/hvm/svm/Makefile +++ b/xen/arch/x86/hvm/svm/Makefile @@ -4,5 +4,4 @@ obj-bin-y += entry.o obj-y += intr.o obj-y += nestedsvm.o obj-y += svm.o -obj-y += svmdebug.o obj-y += vmcb.o diff --git a/xen/arch/x86/hvm/svm/nestedsvm.c b/xen/arch/x86/hvm/svm/nestedsvm.c index 1914667551..63ed6c86b7 100644 --- a/xen/arch/x86/hvm/svm/nestedsvm.c +++ b/xen/arch/x86/hvm/svm/nestedsvm.c @@ -9,7 +9,6 @@ #include #include #include -#include #include /* paging_mode_hap */ #include /* for local_event_delivery_(en|dis)able */ #include /* p2m_get_pagetable, p2m_get_nestedp2m */ diff --git a/xen/arch/x86/hvm/svm/svmdebug.c b/xen/arch/x86/hvm/svm/svmdebug.c deleted file mode 100644 index bdb9ea3583..0000000000 --- a/xen/arch/x86/hvm/svm/svmdebug.c +++ /dev/null @@ -1,181 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * svmdebug.c: debug functions - * Copyright (c) 2011, Advanced Micro Devices, Inc. - * - */ - -#include -#include -#include -#include - -#include "vmcb.h" - -static void svm_dump_sel(const char *name, const struct segment_register *s) -{ - printk("%s: %04x %04x %08x %016"PRIx64"\n", - name, s->sel, s->attr, s->limit, s->base); -} - -void svm_vmcb_dump(const char *from, const struct vmcb_struct *vmcb) -{ - struct vcpu *curr = current; - - /* - * If we are dumping the VMCB currently in context, some guest state may - * still be cached in hardware. Retrieve it. - */ - if ( vmcb == curr->arch.hvm.svm.vmcb ) - svm_sync_vmcb(curr, vmcb_in_sync); - - printk("Dumping guest's current state at %s...\n", from); - printk("Size of VMCB = %zu, paddr = %"PRIpaddr", vaddr = %p\n", - sizeof(struct vmcb_struct), virt_to_maddr(vmcb), vmcb); - - printk("cr_intercepts = %#x dr_intercepts = %#x " - "exception_intercepts = %#x\n", - vmcb_get_cr_intercepts(vmcb), vmcb_get_dr_intercepts(vmcb), - vmcb_get_exception_intercepts(vmcb)); - printk("general1_intercepts = %#x general2_intercepts = %#x\n", - vmcb_get_general1_intercepts(vmcb), vmcb_get_general2_intercepts(vmcb)); - printk("iopm_base_pa = %#"PRIx64" msrpm_base_pa = %#"PRIx64" tsc_offset = %#"PRIx64"\n", - vmcb_get_iopm_base_pa(vmcb), vmcb_get_msrpm_base_pa(vmcb), - vmcb_get_tsc_offset(vmcb)); - printk("tlb_control = %#x vintr = %#"PRIx64" int_stat = %#"PRIx64"\n", - vmcb->tlb_control, vmcb_get_vintr(vmcb).bytes, - vmcb->int_stat.raw); - printk("event_inj %016"PRIx64", valid? %d, ec? %d, type %u, vector %#x\n", - vmcb->event_inj.raw, vmcb->event_inj.v, - vmcb->event_inj.ev, vmcb->event_inj.type, - vmcb->event_inj.vector); - printk("exitcode = %#"PRIx64" exit_int_info = %#"PRIx64"\n", - vmcb->exitcode, vmcb->exit_int_info.raw); - printk("exitinfo1 = %#"PRIx64" exitinfo2 = %#"PRIx64"\n", - vmcb->exitinfo1, vmcb->exitinfo2); - printk("asid = %#x np_ctrl = %#"PRIx64":%s%s%s\n", - vmcb_get_asid(vmcb), vmcb_get_np_ctrl(vmcb), - vmcb_get_np(vmcb) ? " NP" : "", - vmcb_get_sev(vmcb) ? " SEV" : "", - vmcb_get_sev_es(vmcb) ? " SEV_ES" : ""); - printk("virtual vmload/vmsave = %d, virt_ext = %#"PRIx64"\n", - vmcb->virt_ext.fields.vloadsave_enable, vmcb->virt_ext.bytes); - printk("cpl = %d efer = %#"PRIx64" star = %#"PRIx64" lstar = %#"PRIx64"\n", - vmcb_get_cpl(vmcb), vmcb_get_efer(vmcb), vmcb->star, vmcb->lstar); - printk("CR0 = 0x%016"PRIx64" CR2 = 0x%016"PRIx64"\n", - vmcb_get_cr0(vmcb), vmcb_get_cr2(vmcb)); - printk("CR3 = 0x%016"PRIx64" CR4 = 0x%016"PRIx64"\n", - vmcb_get_cr3(vmcb), vmcb_get_cr4(vmcb)); - printk("RSP = 0x%016"PRIx64" RIP = 0x%016"PRIx64"\n", - vmcb->rsp, vmcb->rip); - printk("RAX = 0x%016"PRIx64" RFLAGS=0x%016"PRIx64"\n", - vmcb->rax, vmcb->rflags); - printk("DR6 = 0x%016"PRIx64", DR7 = 0x%016"PRIx64"\n", - vmcb_get_dr6(vmcb), vmcb_get_dr7(vmcb)); - printk("CSTAR = 0x%016"PRIx64" SFMask = 0x%016"PRIx64"\n", - vmcb->cstar, vmcb->sfmask); - printk("KernGSBase = 0x%016"PRIx64" PAT = 0x%016"PRIx64"\n", - vmcb->kerngsbase, vmcb_get_g_pat(vmcb)); - printk("SSP = 0x%016"PRIx64" S_CET = 0x%016"PRIx64" ISST = 0x%016"PRIx64"\n", - vmcb->_ssp, vmcb->_msr_s_cet, vmcb->_msr_isst); - printk("H_CR3 = 0x%016"PRIx64" CleanBits = %#x\n", - vmcb_get_h_cr3(vmcb), vmcb->cleanbits.raw); - - /* print out all the selectors */ - printk(" sel attr limit base\n"); - svm_dump_sel(" CS", &vmcb->cs); - svm_dump_sel(" DS", &vmcb->ds); - svm_dump_sel(" SS", &vmcb->ss); - svm_dump_sel(" ES", &vmcb->es); - svm_dump_sel(" FS", &vmcb->fs); - svm_dump_sel(" GS", &vmcb->gs); - svm_dump_sel("GDTR", &vmcb->gdtr); - svm_dump_sel("LDTR", &vmcb->ldtr); - svm_dump_sel("IDTR", &vmcb->idtr); - svm_dump_sel(" TR", &vmcb->tr); -} - -bool svm_vmcb_isvalid(const char *from, const struct vmcb_struct *vmcb, - const struct vcpu *v, bool verbose) -{ - bool ret = false; /* ok */ - unsigned long cr0 = vmcb_get_cr0(vmcb); - unsigned long cr3 = vmcb_get_cr3(vmcb); - unsigned long cr4 = vmcb_get_cr4(vmcb); - unsigned long valid; - uint64_t efer = vmcb_get_efer(vmcb); - -#define PRINTF(fmt, args...) do { \ - if ( !verbose ) return true; \ - ret = true; \ - printk(XENLOG_GUEST "%pv[%s]: " fmt, v, from, ## args); \ -} while (0) - - if ( !(efer & EFER_SVME) ) - PRINTF("EFER: SVME bit not set (%#"PRIx64")\n", efer); - - if ( !(cr0 & X86_CR0_CD) && (cr0 & X86_CR0_NW) ) - PRINTF("CR0: CD bit is zero and NW bit set (%#"PRIx64")\n", cr0); - - if ( cr0 >> 32 ) - PRINTF("CR0: bits [63:32] are not zero (%#"PRIx64")\n", cr0); - - if ( (cr0 & X86_CR0_PG) && - ((cr3 & 7) || - ((!(cr4 & X86_CR4_PAE) || (efer & EFER_LMA)) && (cr3 & 0xfe0)) || - ((efer & EFER_LMA) && - (cr3 >> v->domain->arch.cpuid->extd.maxphysaddr))) ) - PRINTF("CR3: MBZ bits are set (%#"PRIx64")\n", cr3); - - valid = hvm_cr4_guest_valid_bits(v->domain); - if ( cr4 & ~valid ) - PRINTF("CR4: invalid value %#lx (valid %#lx, rejected %#lx)\n", - cr4, valid, cr4 & ~valid); - - if ( vmcb_get_dr6(vmcb) >> 32 ) - PRINTF("DR6: bits [63:32] are not zero (%#"PRIx64")\n", - vmcb_get_dr6(vmcb)); - - if ( vmcb_get_dr7(vmcb) >> 32 ) - PRINTF("DR7: bits [63:32] are not zero (%#"PRIx64")\n", - vmcb_get_dr7(vmcb)); - - if ( efer & ~EFER_KNOWN_MASK ) - PRINTF("EFER: unknown bits are not zero (%#"PRIx64")\n", efer); - - if ( hvm_efer_valid(v, efer, -1) ) - PRINTF("EFER: %s (%"PRIx64")\n", hvm_efer_valid(v, efer, -1), efer); - - if ( (efer & EFER_LME) && (cr0 & X86_CR0_PG) ) - { - if ( !(cr4 & X86_CR4_PAE) ) - PRINTF("EFER_LME and CR0.PG are both set and CR4.PAE is zero\n"); - if ( !(cr0 & X86_CR0_PE) ) - PRINTF("EFER_LME and CR0.PG are both set and CR0.PE is zero\n"); - } - - if ( (efer & EFER_LME) && (cr0 & X86_CR0_PG) && (cr4 & X86_CR4_PAE) && - vmcb->cs.l && vmcb->cs.db ) - PRINTF("EFER_LME, CR0.PG, CR4.PAE, CS.L and CS.D are all non-zero\n"); - - if ( !(vmcb_get_general2_intercepts(vmcb) & GENERAL2_INTERCEPT_VMRUN) ) - PRINTF("GENERAL2_INTERCEPT: VMRUN intercept bit is clear (%#"PRIx32")\n", - vmcb_get_general2_intercepts(vmcb)); - - if ( vmcb->event_inj.resvd1 ) - PRINTF("eventinj: MBZ bits are set (%#"PRIx64")\n", - vmcb->event_inj.raw); - -#undef PRINTF - return ret; -} - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * tab-width: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c index 44fa76bf02..b1a79d5151 100644 --- a/xen/arch/x86/hvm/svm/vmcb.c +++ b/xen/arch/x86/hvm/svm/vmcb.c @@ -228,6 +228,165 @@ void svm_destroy_vmcb(struct vcpu *v) svm->vmcb = NULL; } +static void svm_dump_sel(const char *name, const struct segment_register *s) +{ + printk("%s: %04x %04x %08x %016"PRIx64"\n", + name, s->sel, s->attr, s->limit, s->base); +} + +void svm_vmcb_dump(const char *from, const struct vmcb_struct *vmcb) +{ + struct vcpu *curr = current; + + /* + * If we are dumping the VMCB currently in context, some guest state may + * still be cached in hardware. Retrieve it. + */ + if ( vmcb == curr->arch.hvm.svm.vmcb ) + svm_sync_vmcb(curr, vmcb_in_sync); + + printk("Dumping guest's current state at %s...\n", from); + printk("Size of VMCB = %zu, paddr = %"PRIpaddr", vaddr = %p\n", + sizeof(struct vmcb_struct), virt_to_maddr(vmcb), vmcb); + + printk("cr_intercepts = %#x dr_intercepts = %#x " + "exception_intercepts = %#x\n", + vmcb_get_cr_intercepts(vmcb), vmcb_get_dr_intercepts(vmcb), + vmcb_get_exception_intercepts(vmcb)); + printk("general1_intercepts = %#x general2_intercepts = %#x\n", + vmcb_get_general1_intercepts(vmcb), vmcb_get_general2_intercepts(vmcb)); + printk("iopm_base_pa = %#"PRIx64" msrpm_base_pa = %#"PRIx64" tsc_offset = %#"PRIx64"\n", + vmcb_get_iopm_base_pa(vmcb), vmcb_get_msrpm_base_pa(vmcb), + vmcb_get_tsc_offset(vmcb)); + printk("tlb_control = %#x vintr = %#"PRIx64" int_stat = %#"PRIx64"\n", + vmcb->tlb_control, vmcb_get_vintr(vmcb).bytes, + vmcb->int_stat.raw); + printk("event_inj %016"PRIx64", valid? %d, ec? %d, type %u, vector %#x\n", + vmcb->event_inj.raw, vmcb->event_inj.v, + vmcb->event_inj.ev, vmcb->event_inj.type, + vmcb->event_inj.vector); + printk("exitcode = %#"PRIx64" exit_int_info = %#"PRIx64"\n", + vmcb->exitcode, vmcb->exit_int_info.raw); + printk("exitinfo1 = %#"PRIx64" exitinfo2 = %#"PRIx64"\n", + vmcb->exitinfo1, vmcb->exitinfo2); + printk("asid = %#x np_ctrl = %#"PRIx64":%s%s%s\n", + vmcb_get_asid(vmcb), vmcb_get_np_ctrl(vmcb), + vmcb_get_np(vmcb) ? " NP" : "", + vmcb_get_sev(vmcb) ? " SEV" : "", + vmcb_get_sev_es(vmcb) ? " SEV_ES" : ""); + printk("virtual vmload/vmsave = %d, virt_ext = %#"PRIx64"\n", + vmcb->virt_ext.fields.vloadsave_enable, vmcb->virt_ext.bytes); + printk("cpl = %d efer = %#"PRIx64" star = %#"PRIx64" lstar = %#"PRIx64"\n", + vmcb_get_cpl(vmcb), vmcb_get_efer(vmcb), vmcb->star, vmcb->lstar); + printk("CR0 = 0x%016"PRIx64" CR2 = 0x%016"PRIx64"\n", + vmcb_get_cr0(vmcb), vmcb_get_cr2(vmcb)); + printk("CR3 = 0x%016"PRIx64" CR4 = 0x%016"PRIx64"\n", + vmcb_get_cr3(vmcb), vmcb_get_cr4(vmcb)); + printk("RSP = 0x%016"PRIx64" RIP = 0x%016"PRIx64"\n", + vmcb->rsp, vmcb->rip); + printk("RAX = 0x%016"PRIx64" RFLAGS=0x%016"PRIx64"\n", + vmcb->rax, vmcb->rflags); + printk("DR6 = 0x%016"PRIx64", DR7 = 0x%016"PRIx64"\n", + vmcb_get_dr6(vmcb), vmcb_get_dr7(vmcb)); + printk("CSTAR = 0x%016"PRIx64" SFMask = 0x%016"PRIx64"\n", + vmcb->cstar, vmcb->sfmask); + printk("KernGSBase = 0x%016"PRIx64" PAT = 0x%016"PRIx64"\n", + vmcb->kerngsbase, vmcb_get_g_pat(vmcb)); + printk("SSP = 0x%016"PRIx64" S_CET = 0x%016"PRIx64" ISST = 0x%016"PRIx64"\n", + vmcb->_ssp, vmcb->_msr_s_cet, vmcb->_msr_isst); + printk("H_CR3 = 0x%016"PRIx64" CleanBits = %#x\n", + vmcb_get_h_cr3(vmcb), vmcb->cleanbits.raw); + + /* print out all the selectors */ + printk(" sel attr limit base\n"); + svm_dump_sel(" CS", &vmcb->cs); + svm_dump_sel(" DS", &vmcb->ds); + svm_dump_sel(" SS", &vmcb->ss); + svm_dump_sel(" ES", &vmcb->es); + svm_dump_sel(" FS", &vmcb->fs); + svm_dump_sel(" GS", &vmcb->gs); + svm_dump_sel("GDTR", &vmcb->gdtr); + svm_dump_sel("LDTR", &vmcb->ldtr); + svm_dump_sel("IDTR", &vmcb->idtr); + svm_dump_sel(" TR", &vmcb->tr); +} + +bool svm_vmcb_isvalid( + const char *from, const struct vmcb_struct *vmcb, const struct vcpu *v, + bool verbose) +{ + bool ret = false; /* ok */ + unsigned long cr0 = vmcb_get_cr0(vmcb); + unsigned long cr3 = vmcb_get_cr3(vmcb); + unsigned long cr4 = vmcb_get_cr4(vmcb); + unsigned long valid; + uint64_t efer = vmcb_get_efer(vmcb); + +#define PRINTF(fmt, args...) do { \ + if ( !verbose ) return true; \ + ret = true; \ + printk(XENLOG_GUEST "%pv[%s]: " fmt, v, from, ## args); \ +} while (0) + + if ( !(efer & EFER_SVME) ) + PRINTF("EFER: SVME bit not set (%#"PRIx64")\n", efer); + + if ( !(cr0 & X86_CR0_CD) && (cr0 & X86_CR0_NW) ) + PRINTF("CR0: CD bit is zero and NW bit set (%#"PRIx64")\n", cr0); + + if ( cr0 >> 32 ) + PRINTF("CR0: bits [63:32] are not zero (%#"PRIx64")\n", cr0); + + if ( (cr0 & X86_CR0_PG) && + ((cr3 & 7) || + ((!(cr4 & X86_CR4_PAE) || (efer & EFER_LMA)) && (cr3 & 0xfe0)) || + ((efer & EFER_LMA) && + (cr3 >> v->domain->arch.cpuid->extd.maxphysaddr))) ) + PRINTF("CR3: MBZ bits are set (%#"PRIx64")\n", cr3); + + valid = hvm_cr4_guest_valid_bits(v->domain); + if ( cr4 & ~valid ) + PRINTF("CR4: invalid value %#lx (valid %#lx, rejected %#lx)\n", + cr4, valid, cr4 & ~valid); + + if ( vmcb_get_dr6(vmcb) >> 32 ) + PRINTF("DR6: bits [63:32] are not zero (%#"PRIx64")\n", + vmcb_get_dr6(vmcb)); + + if ( vmcb_get_dr7(vmcb) >> 32 ) + PRINTF("DR7: bits [63:32] are not zero (%#"PRIx64")\n", + vmcb_get_dr7(vmcb)); + + if ( efer & ~EFER_KNOWN_MASK ) + PRINTF("EFER: unknown bits are not zero (%#"PRIx64")\n", efer); + + if ( hvm_efer_valid(v, efer, -1) ) + PRINTF("EFER: %s (%"PRIx64")\n", hvm_efer_valid(v, efer, -1), efer); + + if ( (efer & EFER_LME) && (cr0 & X86_CR0_PG) ) + { + if ( !(cr4 & X86_CR4_PAE) ) + PRINTF("EFER_LME and CR0.PG are both set and CR4.PAE is zero\n"); + if ( !(cr0 & X86_CR0_PE) ) + PRINTF("EFER_LME and CR0.PG are both set and CR0.PE is zero\n"); + } + + if ( (efer & EFER_LME) && (cr0 & X86_CR0_PG) && (cr4 & X86_CR4_PAE) && + vmcb->cs.l && vmcb->cs.db ) + PRINTF("EFER_LME, CR0.PG, CR4.PAE, CS.L and CS.D are all non-zero\n"); + + if ( !(vmcb_get_general2_intercepts(vmcb) & GENERAL2_INTERCEPT_VMRUN) ) + PRINTF("GENERAL2_INTERCEPT: VMRUN intercept bit is clear (%#"PRIx32")\n", + vmcb_get_general2_intercepts(vmcb)); + + if ( vmcb->event_inj.resvd1 ) + PRINTF("eventinj: MBZ bits are set (%#"PRIx64")\n", + vmcb->event_inj.raw); + +#undef PRINTF + return ret; +} + static void cf_check vmcb_dump(unsigned char ch) { struct domain *d; diff --git a/xen/arch/x86/hvm/svm/vmcb.h b/xen/arch/x86/hvm/svm/vmcb.h index 68012948a9..ba554a9644 100644 --- a/xen/arch/x86/hvm/svm/vmcb.h +++ b/xen/arch/x86/hvm/svm/vmcb.h @@ -553,6 +553,9 @@ int svm_create_vmcb(struct vcpu *v); void svm_destroy_vmcb(struct vcpu *v); void setup_vmcb_dump(void); +void svm_vmcb_dump(const char *from, const struct vmcb_struct *vmcb); +bool svm_vmcb_isvalid(const char *from, const struct vmcb_struct *vmcb, + const struct vcpu *v, bool verbose); /* * VMCB accessor functions. diff --git a/xen/arch/x86/include/asm/hvm/svm/svmdebug.h b/xen/arch/x86/include/asm/hvm/svm/svmdebug.h index 2fb76ec24c..ede13bd340 100644 --- a/xen/arch/x86/include/asm/hvm/svm/svmdebug.h +++ b/xen/arch/x86/include/asm/hvm/svm/svmdebug.h @@ -12,8 +12,5 @@ #include void svm_sync_vmcb(struct vcpu *v, enum vmcb_sync_state new_state); -void svm_vmcb_dump(const char *from, const struct vmcb_struct *vmcb); -bool svm_vmcb_isvalid(const char *from, const struct vmcb_struct *vmcb, - const struct vcpu *v, bool verbose); #endif /* __ASM_X86_HVM_SVM_SVMDEBUG_H__ */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 04:33:35 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 04:33:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1185180.1507435 (Exim 4.92) (envelope-from ) id 1vTuqV-0001Hg-Ac; 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Fri, 12 Dec 2025 04:33:34 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=6Q8WGeamnY6vJeFZ478xQCKy9cTxhLutKyVmNArw2MQ=; b=QCWgvrRllqOm1USpRgA+D1Ug2I XDBb5qwwg1GgzP1UQsf4fio4L2rRAwk6PvSyFTjFAieZC7u2EFe/JamwasLgQUVlnzHOGB5KmOBvf 6HDTEUM7vNLltyZu+p/as40sbpi99tL3mcOhqAdNU+Hn3iazPyFQ0+LUTcef+s5s60iQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/svm: Drop svmdebug.h Message-Id: Date: Fri, 12 Dec 2025 04:33:34 +0000 commit 6ccebacb531a51baa0ef6cd69d2558a25b5d4bba Author: Andrew Cooper AuthorDate: Fri Aug 29 12:46:14 2025 +0100 Commit: Andrew Cooper CommitDate: Fri Dec 12 03:04:48 2025 +0000 x86/svm: Drop svmdebug.h svmdebug.h now only contains the declaration for svm_sync_vmcb(), despite the logic being local to svm.c. Move the declaration into the local svm.h No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Alejandro Vallejo Acked-by: Jan Beulich --- xen/arch/x86/hvm/svm/svm.c | 1 - xen/arch/x86/hvm/svm/svm.h | 17 +++++++++++++++++ xen/arch/x86/hvm/svm/vmcb.c | 2 +- xen/arch/x86/include/asm/hvm/svm/svmdebug.h | 16 ---------------- xen/arch/x86/include/asm/hvm/svm/vmcb.h | 15 --------------- 5 files changed, 18 insertions(+), 33 deletions(-) diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 14b3a427e6..15d45cbb57 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -27,7 +27,6 @@ #include #include #include -#include #include #include #include diff --git a/xen/arch/x86/hvm/svm/svm.h b/xen/arch/x86/hvm/svm/svm.h index f5b0312d2d..cfa411ad5a 100644 --- a/xen/arch/x86/hvm/svm/svm.h +++ b/xen/arch/x86/hvm/svm/svm.h @@ -78,6 +78,23 @@ unsigned int svm_get_task_switch_insn_len(void); #define _NPT_PFEC_in_gpt 33 #define NPT_PFEC_in_gpt (1UL<<_NPT_PFEC_in_gpt) +/* + * VMRUN doesn't switch fs/gs/tr/ldtr and SHADOWGS/SYSCALL/SYSENTER state. + * Therefore, guest state is in the hardware registers when servicing a + * VMExit. + * + * Immediately after a VMExit, the vmcb is stale, and needs to be brought + * into sync by VMSAVE. If state in the vmcb is modified, a VMLOAD is + * needed before the following VMRUN. + */ +enum vmcb_sync_state { + vmcb_in_sync, + vmcb_needs_vmsave, /* VMCB out of sync (VMSAVE needed)? */ + vmcb_needs_vmload, /* VMCB dirty (VMLOAD needed)? */ +}; + +void svm_sync_vmcb(struct vcpu *v, enum vmcb_sync_state new_state); + #endif /* __X86_HVM_SVM_SVM_PRIV_H__ */ /* diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c index b1a79d5151..7bde6e98ce 100644 --- a/xen/arch/x86/hvm/svm/vmcb.c +++ b/xen/arch/x86/hvm/svm/vmcb.c @@ -16,12 +16,12 @@ #include #include -#include #include #include #include #include +#include "svm.h" #include "vmcb.h" struct vmcb_struct *alloc_vmcb(void) diff --git a/xen/arch/x86/include/asm/hvm/svm/svmdebug.h b/xen/arch/x86/include/asm/hvm/svm/svmdebug.h deleted file mode 100644 index ede13bd340..0000000000 --- a/xen/arch/x86/include/asm/hvm/svm/svmdebug.h +++ /dev/null @@ -1,16 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * svmdebug.h: SVM related debug defintions - * Copyright (c) 2011, AMD Corporation. - * - */ - -#ifndef __ASM_X86_HVM_SVM_SVMDEBUG_H__ -#define __ASM_X86_HVM_SVM_SVMDEBUG_H__ - -#include -#include - -void svm_sync_vmcb(struct vcpu *v, enum vmcb_sync_state new_state); - -#endif /* __ASM_X86_HVM_SVM_SVMDEBUG_H__ */ diff --git a/xen/arch/x86/include/asm/hvm/svm/vmcb.h b/xen/arch/x86/include/asm/hvm/svm/vmcb.h index 717215ff96..41bcc9f0d8 100644 --- a/xen/arch/x86/include/asm/hvm/svm/vmcb.h +++ b/xen/arch/x86/include/asm/hvm/svm/vmcb.h @@ -21,21 +21,6 @@ struct svm_domain { } osvw; }; -/* - * VMRUN doesn't switch fs/gs/tr/ldtr and SHADOWGS/SYSCALL/SYSENTER state. - * Therefore, guest state is in the hardware registers when servicing a - * VMExit. - * - * Immediately after a VMExit, the vmcb is stale, and needs to be brought - * into sync by VMSAVE. If state in the vmcb is modified, a VMLOAD is - * needed before the following VMRUN. - */ -enum vmcb_sync_state { - vmcb_in_sync, - vmcb_needs_vmsave, /* VMCB out of sync (VMSAVE needed)? */ - vmcb_needs_vmload /* VMCB dirty (VMLOAD needed)? */ -}; - struct svm_vcpu { struct vmcb_struct *vmcb; u64 vmcb_pa; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 04:33:45 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 04:33:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1185181.1507438 (Exim 4.92) (envelope-from ) id 1vTuqf-0001Me-Bi; Fri, 12 Dec 2025 04:33:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1185181.1507438; Fri, 12 Dec 2025 04:33:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTuqf-0001MX-8z; Fri, 12 Dec 2025 04:33:45 +0000 Received: by outflank-mailman (input) for mailman id 1185181; Fri, 12 Dec 2025 04:33:44 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTuqe-0001MR-9S for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:33:44 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTuqd-006ELF-39 for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:33:44 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTuqe-004C22-0i for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:33:44 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=TqDnD5MgeKxuCeITQZVne/lBnJTUDsF9yQ3yxR+gbMo=; b=2c7ftr6xXH0jCX/wbJ+PJQTJYB S5uDkqgz5dUpIP9XqPjZw8ePJ2W412mrhYiv3I1mFp2URoXClCVuANN0YzGINI7q7wuznXN6jJV75 UtQd4io2I5+74czyYy+rlCNtZSpSPLsBHjFzTsXhdwpkEcHGBGV43sZc9zOPAyH5DUT0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools/sd-notify.h: Include string.h too Message-Id: Date: Fri, 12 Dec 2025 04:33:44 +0000 commit 8efff5a69ab7596f6c63031d0aef292114948cd9 Author: Andrew Cooper AuthorDate: Fri Dec 5 21:33:25 2025 +0000 Commit: Andrew Cooper CommitDate: Fri Dec 12 03:04:48 2025 +0000 tools/sd-notify.h: Include string.h too Alpine Linux, when using --enable-systemd to get the init files, fails with: tools/include/xen-sd-notify.h:69:3: error: call to undeclared library function 'memcpy' with type 'void *(void *, const void *, unsigned long)'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration] 69 | memcpy(socket_addr.sun.sun_path, socket_path, path_length); | ^ This will be down to using musl rather than glibc. Include the appropriate header. Fixes: 78510f3a1522 ("tools: Import stand-alone sd_notify() implementation from systemd") Reported-by: Marek Marczykowski-Górecki Signed-off-by: Andrew Cooper Reviewed-by: Marek Marczykowski-Górecki Acked-by: Anthony PERARD --- tools/include/xen-sd-notify.h | 1 + 1 file changed, 1 insertion(+) diff --git a/tools/include/xen-sd-notify.h b/tools/include/xen-sd-notify.h index 28c9b20f15..20441d0ec9 100644 --- a/tools/include/xen-sd-notify.h +++ b/tools/include/xen-sd-notify.h @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 04:33:55 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 04:33:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1185182.1507442 (Exim 4.92) (envelope-from ) id 1vTuqp-0001RO-D3; Fri, 12 Dec 2025 04:33:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1185182.1507442; Fri, 12 Dec 2025 04:33:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTuqp-0001RG-AS; Fri, 12 Dec 2025 04:33:55 +0000 Received: by outflank-mailman (input) for mailman id 1185182; Fri, 12 Dec 2025 04:33:54 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTuqo-0001Pv-Cm for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:33:54 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTuqo-006ELZ-0G for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:33:54 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTuqo-004CaA-12 for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:33:54 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=sZqc7VDd3nJomgui2fVJ32/9qNnCtC/2m73ZGZz24mg=; b=gKDoEwsinoGq38b6vvqso1sn6d j9/ZYiRJqSCM7z2CRI5VyumzzsLjDTCMPh9tdgYoKay1lIa8OmLXjtseJD9XMwn8PzOwfvZXMxw4+ ZwT3jJRm4HbxcaMShwPhH8R8ZOGk0TK1j5lK+3mN/XVKV8AZKvufvr3UmMt9CiAPjSv4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/libfdt: Fix comment following treewide __ASSEMBLY__ cleanup Message-Id: Date: Fri, 12 Dec 2025 04:33:54 +0000 commit cfa37c182c1aeb48fb4e0e2ff04acd19a40eb13e Author: Andrew Cooper AuthorDate: Tue Dec 9 13:22:29 2025 +0000 Commit: Andrew Cooper CommitDate: Fri Dec 12 03:04:48 2025 +0000 xen/libfdt: Fix comment following treewide __ASSEMBLY__ cleanup This one comment didn't match the #ifdef symbol, and escaped conversion. No functional change. Signed-off-by: Andrew Cooper Acked-by: Michal Orzel --- xen/include/xen/libfdt/fdt.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/include/xen/libfdt/fdt.h b/xen/include/xen/libfdt/fdt.h index 57fe566306..c6e4d7838d 100644 --- a/xen/include/xen/libfdt/fdt.h +++ b/xen/include/xen/libfdt/fdt.h @@ -45,7 +45,7 @@ struct fdt_property { char data[0]; }; -#endif /* !__ASSEMBLY */ +#endif /* !__ASSEMBLER__ */ #define FDT_MAGIC 0xd00dfeed /* 4: version, 4: total size */ #define FDT_TAGSIZE sizeof(fdt32_t) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 04:34:06 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 04:34:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1185183.1507446 (Exim 4.92) (envelope-from ) id 1vTur0-0001Vi-HL; Fri, 12 Dec 2025 04:34:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1185183.1507446; Fri, 12 Dec 2025 04:34:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTur0-0001Va-Er; Fri, 12 Dec 2025 04:34:06 +0000 Received: by outflank-mailman (input) for mailman id 1185183; Fri, 12 Dec 2025 04:34:04 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTuqy-0001VT-Fk for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:34:04 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTuqy-006ELq-0Y for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:34:04 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTuqy-004DGE-1O for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:34:04 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=H1YFpqq2XIOxjsixJSVtf556pDE2dsFi9TiOkQ+9Wbc=; b=bmQUVokG0SpGb7ffsVwYXUixHF FXGybTLK8SAOHD6dR4G7E5mHgzW7Fg7DS2pX2t83nrxQ2uO66yzE0Unckr62CTzNBP+Xt45Cu0c8m yED6om6V2RjoGCt4yfuYzixY/zm8lb/KsUv4S8QeK8SwCLKbS3G1RiakNALMCuckXFxA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: Misra fixes for U/L suffixes Message-Id: Date: Fri, 12 Dec 2025 04:34:04 +0000 commit b6f399b341fc3ddf528a31f520819e572f3f6835 Author: Andrew Cooper AuthorDate: Fri Dec 5 18:28:53 2025 +0000 Commit: Andrew Cooper CommitDate: Fri Dec 12 03:04:48 2025 +0000 x86: Misra fixes for U/L suffixes With the wider testing, some more violations have been spotted. This addresses violations of Rule 7.2 (suffixes required) and Rule 7.3 (L must be uppercase). No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Nicola Vetrini --- xen/arch/x86/mm/shadow/common.c | 4 ++-- xen/arch/x86/pv/descriptor-tables.c | 2 +- xen/arch/x86/pv/emulate.c | 2 +- xen/drivers/passthrough/vtd/iommu.h | 2 +- xen/include/xen/elfstructs.h | 2 +- xen/include/xen/sizes.h | 2 +- 6 files changed, 7 insertions(+), 7 deletions(-) diff --git a/xen/arch/x86/mm/shadow/common.c b/xen/arch/x86/mm/shadow/common.c index 0176e33bc9..423764a326 100644 --- a/xen/arch/x86/mm/shadow/common.c +++ b/xen/arch/x86/mm/shadow/common.c @@ -1961,7 +1961,7 @@ int sh_remove_write_access(struct domain *d, mfn_t gmfn, /* FreeBSD 64bit: linear map 0xffff800000000000 */ switch ( level ) { - case 1: GUESS(0xffff800000000000 + case 1: GUESS(0xffff800000000000UL + ((fault_addr & VADDR_MASK) >> 9), 6); break; case 2: GUESS(0xffff804000000000UL + ((fault_addr & VADDR_MASK) >> 18), 6); break; @@ -1969,7 +1969,7 @@ int sh_remove_write_access(struct domain *d, mfn_t gmfn, + ((fault_addr & VADDR_MASK) >> 27), 6); break; } /* FreeBSD 64bit: direct map at 0xffffff0000000000 */ - GUESS(0xffffff0000000000 + gfn_to_gaddr(gfn), 6); + GUESS(0xffffff0000000000UL + gfn_to_gaddr(gfn), 6); } #undef GUESS diff --git a/xen/arch/x86/pv/descriptor-tables.c b/xen/arch/x86/pv/descriptor-tables.c index 02647a2c50..26f7d18b11 100644 --- a/xen/arch/x86/pv/descriptor-tables.c +++ b/xen/arch/x86/pv/descriptor-tables.c @@ -216,7 +216,7 @@ static bool check_descriptor(const struct domain *dom, seg_desc_t *d) * 0xf6800000. Extend these to allow access to the larger read-only * M2P table available in 32on64 mode. */ - base = (b & 0xff000000) | ((b & 0xff) << 16) | (a >> 16); + base = (b & 0xff000000U) | ((b & 0xff) << 16) | (a >> 16); limit = (b & 0xf0000) | (a & 0xffff); limit++; /* We add one because limit is inclusive. */ diff --git a/xen/arch/x86/pv/emulate.c b/xen/arch/x86/pv/emulate.c index 8c44dea123..e741e686c1 100644 --- a/xen/arch/x86/pv/emulate.c +++ b/xen/arch/x86/pv/emulate.c @@ -37,7 +37,7 @@ int pv_emul_read_descriptor(unsigned int sel, const struct vcpu *v, if ( !(desc.b & _SEGMENT_L) ) { *base = ((desc.a >> 16) + ((desc.b & 0xff) << 16) + - (desc.b & 0xff000000)); + (desc.b & 0xff000000U)); *limit = (desc.a & 0xffff) | (desc.b & 0x000f0000); if ( desc.b & _SEGMENT_G ) *limit = ((*limit + 1) << 12) - 1; diff --git a/xen/drivers/passthrough/vtd/iommu.h b/xen/drivers/passthrough/vtd/iommu.h index 29d350b23d..4f41360c53 100644 --- a/xen/drivers/passthrough/vtd/iommu.h +++ b/xen/drivers/passthrough/vtd/iommu.h @@ -266,7 +266,7 @@ struct dma_pte { #define DMA_PTE_PROT (DMA_PTE_READ | DMA_PTE_WRITE) #define DMA_PTE_SP (1 << 7) #define DMA_PTE_SNP (1 << 11) -#define DMA_PTE_CONTIG_MASK (0xfull << PADDR_BITS) +#define DMA_PTE_CONTIG_MASK (0xfULL << PADDR_BITS) #define dma_clear_pte(p) do {(p).val = 0;} while(0) #define dma_set_pte_readable(p) do {(p).val |= DMA_PTE_READ;} while(0) #define dma_set_pte_writable(p) do {(p).val |= DMA_PTE_WRITE;} while(0) diff --git a/xen/include/xen/elfstructs.h b/xen/include/xen/elfstructs.h index eb6b87a823..62225bb8a0 100644 --- a/xen/include/xen/elfstructs.h +++ b/xen/include/xen/elfstructs.h @@ -360,7 +360,7 @@ typedef struct { } Elf64_Rela; #define ELF64_R_SYM(info) ((info) >> 32) -#define ELF64_R_TYPE(info) ((info) & 0xFFFFFFFF) +#define ELF64_R_TYPE(info) ((info) & 0xFFFFFFFFU) #define ELF64_R_INFO(s,t) (((s) << 32) + (uint32_t)(t)) /* diff --git a/xen/include/xen/sizes.h b/xen/include/xen/sizes.h index f7b728ddab..d309ebf044 100644 --- a/xen/include/xen/sizes.h +++ b/xen/include/xen/sizes.h @@ -43,6 +43,6 @@ #define SZ_512M 0x20000000 #define SZ_1G 0x40000000 -#define SZ_2G 0x80000000 +#define SZ_2G 0x80000000U #endif /* __XEN_SIZES_H__ */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 04:34:16 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 04:34:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1185184.1507451 (Exim 4.92) (envelope-from ) id 1vTurA-0001bH-JE; Fri, 12 Dec 2025 04:34:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1185184.1507451; Fri, 12 Dec 2025 04:34:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTurA-0001b7-GD; Fri, 12 Dec 2025 04:34:16 +0000 Received: by outflank-mailman (input) for mailman id 1185184; Fri, 12 Dec 2025 04:34:14 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTur8-0001Za-JF for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:34:14 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTur8-006ELw-0u for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:34:14 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTur8-004EHF-1h for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:34:14 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=aU2X/fRgjSgM/aFdXnYBdkjvjk3WJcSdA7X1vREabUo=; b=NWEJh78hEfoojSwqqYsXP11Ts/ XIr93QWmtnaZFMhdiyHrbxAhOcYRtWYsjgJrOiLUEAss9OJVquEpSf02cFb4/fRFPn1cyc0OHjalW W0yeDKN7D8gTxDxIM/ncunQiB/b7jt9fLROx35I6CmCvt+JnwNUiUr8HooTERA9f68Ko=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: Name parameters in function declarations Message-Id: Date: Fri, 12 Dec 2025 04:34:14 +0000 commit eb518632cdbc5dc8811075ac08ec0b5341528efa Author: Andrew Cooper AuthorDate: Fri Dec 5 18:34:47 2025 +0000 Commit: Andrew Cooper CommitDate: Fri Dec 12 03:04:48 2025 +0000 x86: Name parameters in function declarations With the wider testing, some more violations have been spotted. This addresses violations of Rule 8.2 (parameters must be named). livepatch_op() has a further problem. The other declaration (the stub for !LIVEPATCH builds) has a parameter named op, but the definition has the parameter named livepatch. Rename it to op which is more concise and better in line with it's type name. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Nicola Vetrini --- xen/arch/x86/mm/shadow/common.c | 8 ++++---- xen/arch/x86/pv/emul-priv-op.c | 4 ++-- xen/common/livepatch.c | 16 ++++++++-------- xen/include/xen/livepatch.h | 2 +- 4 files changed, 15 insertions(+), 15 deletions(-) diff --git a/xen/arch/x86/mm/shadow/common.c b/xen/arch/x86/mm/shadow/common.c index 423764a326..f2aee5be46 100644 --- a/xen/arch/x86/mm/shadow/common.c +++ b/xen/arch/x86/mm/shadow/common.c @@ -69,11 +69,11 @@ const uint8_t sh_type_to_size[] = { DEFINE_PER_CPU(uint32_t,trace_shadow_path_flags); -static int cf_check sh_enable_log_dirty(struct domain *); -static int cf_check sh_disable_log_dirty(struct domain *); -static void cf_check sh_clean_dirty_bitmap(struct domain *); +static int cf_check sh_enable_log_dirty(struct domain *d); +static int cf_check sh_disable_log_dirty(struct domain *d); +static void cf_check sh_clean_dirty_bitmap(struct domain *d); -static void cf_check shadow_update_paging_modes(struct vcpu *); +static void cf_check shadow_update_paging_modes(struct vcpu *v); /* Set up the shadow-specific parts of a domain struct at start of day. * Called for every domain from arch_domain_create() */ diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index 225d4cff03..f1e8f4e014 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -40,10 +40,10 @@ struct priv_op_ctxt { }; /* I/O emulation helpers. Use non-standard calling conventions. */ -void nocall load_guest_gprs(struct cpu_user_regs *); +void nocall load_guest_gprs(struct cpu_user_regs *regs); void nocall save_guest_gprs(void); -typedef void io_emul_stub_t(struct cpu_user_regs *); +typedef void io_emul_stub_t(struct cpu_user_regs *regs); static io_emul_stub_t *io_emul_stub_setup(struct priv_op_ctxt *ctxt, u8 opcode, unsigned int port, unsigned int bytes) diff --git a/xen/common/livepatch.c b/xen/common/livepatch.c index 9285f88644..9357c1b77a 100644 --- a/xen/common/livepatch.c +++ b/xen/common/livepatch.c @@ -2196,30 +2196,30 @@ static int livepatch_action(struct xen_sysctl_livepatch_action *action) return rc; } -int livepatch_op(struct xen_sysctl_livepatch_op *livepatch) +int livepatch_op(struct xen_sysctl_livepatch_op *op) { int rc; - if ( (livepatch->flags & ~LIVEPATCH_FLAGS_MASK) && - !(livepatch->flags & LIVEPATCH_FLAG_FORCE) ) + if ( (op->flags & ~LIVEPATCH_FLAGS_MASK) && + !(op->flags & LIVEPATCH_FLAG_FORCE) ) return -EINVAL; - switch ( livepatch->cmd ) + switch ( op->cmd ) { case XEN_SYSCTL_LIVEPATCH_UPLOAD: - rc = livepatch_upload(&livepatch->u.upload); + rc = livepatch_upload(&op->u.upload); break; case XEN_SYSCTL_LIVEPATCH_GET: - rc = livepatch_get(&livepatch->u.get); + rc = livepatch_get(&op->u.get); break; case XEN_SYSCTL_LIVEPATCH_LIST: - rc = livepatch_list(&livepatch->u.list); + rc = livepatch_list(&op->u.list); break; case XEN_SYSCTL_LIVEPATCH_ACTION: - rc = livepatch_action(&livepatch->u.action); + rc = livepatch_action(&op->u.action); break; default: diff --git a/xen/include/xen/livepatch.h b/xen/include/xen/livepatch.h index d074a5bebe..3f5ad01f1b 100644 --- a/xen/include/xen/livepatch.h +++ b/xen/include/xen/livepatch.h @@ -62,7 +62,7 @@ struct livepatch_fstate { uint8_t insn_buffer[LIVEPATCH_OPAQUE_SIZE]; }; -int livepatch_op(struct xen_sysctl_livepatch_op *); +int livepatch_op(struct xen_sysctl_livepatch_op *op); void check_for_livepatch_work(void); unsigned long livepatch_symbols_lookup_by_name(const char *symname); bool is_patch(const void *addr); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 04:34:26 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 04:34:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1185185.1507454 (Exim 4.92) (envelope-from ) id 1vTurK-0001eV-KK; Fri, 12 Dec 2025 04:34:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1185185.1507454; Fri, 12 Dec 2025 04:34:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTurK-0001eM-Hb; Fri, 12 Dec 2025 04:34:26 +0000 Received: by outflank-mailman (input) for mailman id 1185185; Fri, 12 Dec 2025 04:34:24 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTurI-0001eE-MO for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:34:24 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTurI-006EM0-1D for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:34:24 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTurI-004FOg-22 for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:34:24 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=mknVxBkLWalSGPre+X8AVQf9Vb4tGeuoNsCpTc+9t+Y=; b=2mpIBCnFHDU2RuUfObIsTIuNxh 7DchGBMdE6prBkFYB/D9PMFxXmEZJf2GypLfBxqklVqUIXV4uu5ssrjVuva0kGJpL87kjGGkqEyJt 2xBpTsBEMakHR9CTHJR1sllJ6Ai1YCcpEfHd9qaLZW31Fx9Qq6ckX8M9E95ZjRMZ41d8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/ucode: Don't cast away const-ness in cmp_patch_id() Message-Id: Date: Fri, 12 Dec 2025 04:34:24 +0000 commit 7becd32d84e78e3069fcfab9bbe255bab8bfcc35 Author: Andrew Cooper AuthorDate: Fri Dec 5 19:26:47 2025 +0000 Commit: Andrew Cooper CommitDate: Fri Dec 12 03:04:48 2025 +0000 x86/ucode: Don't cast away const-ness in cmp_patch_id() Fixes a volation of MISRA rule 11.8. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Nicola Vetrini Reviewed-by: Stefano Stabellini --- xen/arch/x86/cpu/microcode/amd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/cpu/microcode/amd.c b/xen/arch/x86/cpu/microcode/amd.c index adabe6e6e8..2760ace921 100644 --- a/xen/arch/x86/cpu/microcode/amd.c +++ b/xen/arch/x86/cpu/microcode/amd.c @@ -106,7 +106,7 @@ static bool __ro_after_init entrysign_mitigiated_in_firmware; static int cf_check cmp_patch_id(const void *key, const void *elem) { const struct patch_digest *pd = elem; - uint32_t patch_id = *(uint32_t *)key; + uint32_t patch_id = *(const uint32_t *)key; if ( patch_id == pd->patch_id ) return 0; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 04:34:36 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 04:34:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1185186.1507458 (Exim 4.92) (envelope-from ) id 1vTurU-0001gb-LL; Fri, 12 Dec 2025 04:34:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1185186.1507458; Fri, 12 Dec 2025 04:34:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTurU-0001gT-Iu; Fri, 12 Dec 2025 04:34:36 +0000 Received: by outflank-mailman (input) for mailman id 1185186; Fri, 12 Dec 2025 04:34:34 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTurS-0001gL-Q3 for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:34:34 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTurS-006EM7-1a for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:34:34 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTurS-004GXm-2P for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:34:34 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=7bN2BJroPtOaZNN73y1HebAsvTY8MMTj4cvT54NFmDs=; b=ORYvUYnUdbmLAHlZucd79EQKc5 cBl+A+Jx2dTDY4Hlst2BmETA5p4pR8FbqWyuDMZU544pHf/tPZDbF6NxreZHgih2stVZrDjw8ndaO gNlumP6SdXN1rf0K6QsK7uHL3WTImP59bKDMXJt4nYLw5bgqM+nw8z+F8J+WBauP0ldM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: Fix missing breaks Message-Id: Date: Fri, 12 Dec 2025 04:34:34 +0000 commit f1b1860226a62242c0bfe1b8ce5d0d54520428d2 Author: Andrew Cooper AuthorDate: Fri Dec 5 19:36:00 2025 +0000 Commit: Andrew Cooper CommitDate: Fri Dec 12 03:04:48 2025 +0000 x86: Fix missing breaks With the wider testing, some more violations have been spotted. This addresses violations of Rule 16.3 which requires all case statements to be terminated with a break or other unconditional control flow change. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Nicola Vetrini --- xen/arch/x86/domain.c | 1 + xen/arch/x86/mm/shadow/hvm.c | 1 + xen/arch/x86/pv/emul-priv-op.c | 1 + xen/arch/x86/pv/emulate.c | 1 + xen/common/livepatch.c | 1 - xen/common/livepatch_elf.c | 1 + 6 files changed, 5 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index 5e37bfbd17..b151201809 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -1517,6 +1517,7 @@ int arch_set_info_guest( { case -EINTR: rc = -ERESTART; + fallthrough; case -ERESTART: break; case 0: diff --git a/xen/arch/x86/mm/shadow/hvm.c b/xen/arch/x86/mm/shadow/hvm.c index 114957a3e1..69334c0956 100644 --- a/xen/arch/x86/mm/shadow/hvm.c +++ b/xen/arch/x86/mm/shadow/hvm.c @@ -268,6 +268,7 @@ hvm_emulate_cmpxchg(enum x86_segment seg, default: SHADOW_PRINTK("cmpxchg size %u is not supported\n", bytes); prev = ~old; + break; } if ( prev != old ) diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index f1e8f4e014..e6d370cd81 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -407,6 +407,7 @@ static void _guest_io_write(unsigned int port, unsigned int bytes, default: ASSERT_UNREACHABLE(); + break; } } diff --git a/xen/arch/x86/pv/emulate.c b/xen/arch/x86/pv/emulate.c index e741e686c1..0022e0f55e 100644 --- a/xen/arch/x86/pv/emulate.c +++ b/xen/arch/x86/pv/emulate.c @@ -120,6 +120,7 @@ void pv_set_reg(struct vcpu *v, unsigned int reg, uint64_t val) printk(XENLOG_G_ERR "%s(%pv, 0x%08x, 0x%016"PRIx64") Bad register\n", __func__, v, reg, val); domain_crash(d); + break; } } diff --git a/xen/common/livepatch.c b/xen/common/livepatch.c index 9357c1b77a..d0da2aa281 100644 --- a/xen/common/livepatch.c +++ b/xen/common/livepatch.c @@ -1924,7 +1924,6 @@ static void noinline do_livepatch_work(void) p->name); ASSERT_UNREACHABLE(); } - default: break; } } diff --git a/xen/common/livepatch_elf.c b/xen/common/livepatch_elf.c index 25ce1bd5a0..2e82f2cb8c 100644 --- a/xen/common/livepatch_elf.c +++ b/xen/common/livepatch_elf.c @@ -347,6 +347,7 @@ int livepatch_elf_resolve_symbols(struct livepatch_elf *elf) dprintk(XENLOG_DEBUG, LIVEPATCH "%s: Symbol resolved: %s => %#"PRIxElfAddr" (%s)\n", elf->name, elf->sym[i].name, st_value, elf->sec[idx].name); + break; } if ( rc ) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 04:34:46 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 04:34:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1185187.1507462 (Exim 4.92) (envelope-from ) id 1vTure-0001ip-Mw; Fri, 12 Dec 2025 04:34:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1185187.1507462; Fri, 12 Dec 2025 04:34:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTure-0001ih-KK; Fri, 12 Dec 2025 04:34:46 +0000 Received: by outflank-mailman (input) for mailman id 1185187; Fri, 12 Dec 2025 04:34:44 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTurc-0001iZ-TS for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:34:44 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTurc-006EMC-1v for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:34:44 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTurc-004Ha3-2j for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:34:44 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=cmEfC4nZE6NrufWe04hIW9izZd1Bvzm3ROAelnbvSW4=; b=VHaPyxwrh+jWk84fG7lpA7jhko /knRluzTHRcylxOWbBGus07PGiDcsmUozeDbUsIT3nC4JeBrnqxxvb2dmVxruZAgsHPuv1v8rtD62 pTL2XmBWVTPn4F52VpLnVVIlogyIz5PlG8DXHoa9frR6MhQA00KrmR6WzI+k4VEnZhCc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: Fix missing brackets in macros Message-Id: Date: Fri, 12 Dec 2025 04:34:44 +0000 commit 0c40d08f7cb8922befd7bec1868978b9cd65dc6d Author: Andrew Cooper AuthorDate: Fri Dec 5 19:42:07 2025 +0000 Commit: Andrew Cooper CommitDate: Fri Dec 12 03:04:48 2025 +0000 x86: Fix missing brackets in macros With the wider testing, some more violations have been spotted. This addresses violations of Rule 20.7 which requires macro parameters to be bracketed. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Nicola Vetrini Reviewed-by: Stefano Stabellini --- xen/arch/x86/mm/shadow/private.h | 6 +++--- xen/drivers/passthrough/vtd/dmar.h | 8 ++++---- xen/include/xen/kexec.h | 4 ++-- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/xen/arch/x86/mm/shadow/private.h b/xen/arch/x86/mm/shadow/private.h index cef9dbef2e..1ef908a380 100644 --- a/xen/arch/x86/mm/shadow/private.h +++ b/xen/arch/x86/mm/shadow/private.h @@ -636,9 +636,9 @@ prev_pinned_shadow(struct page_info *page, } #define foreach_pinned_shadow(dom, pos, tmp) \ - for ( pos = prev_pinned_shadow(NULL, (dom)); \ - pos ? (tmp = prev_pinned_shadow(pos, (dom)), 1) : 0; \ - pos = tmp ) + for ( (pos) = prev_pinned_shadow(NULL, dom); \ + (pos) ? ((tmp) = prev_pinned_shadow(pos, dom), 1) : 0;\ + (pos) = (tmp) ) /* * Pin a shadow page: take an extra refcount, set the pin bit, diff --git a/xen/drivers/passthrough/vtd/dmar.h b/xen/drivers/passthrough/vtd/dmar.h index 0ff4f36535..47e6918b45 100644 --- a/xen/drivers/passthrough/vtd/dmar.h +++ b/xen/drivers/passthrough/vtd/dmar.h @@ -124,7 +124,7 @@ struct acpi_atsr_unit *acpi_find_matched_atsr_unit(const struct pci_dev *); do { \ s_time_t start_time = NOW(); \ while (1) { \ - sts = op(iommu->reg, offset); \ + sts = op((iommu)->reg, offset); \ if ( cond ) \ break; \ if ( NOW() > start_time + DMAR_OPERATION_TIMEOUT ) { \ @@ -147,7 +147,7 @@ do { \ \ for ( ; ; ) \ { \ - sts = op(iommu->reg, offset); \ + sts = op((iommu)->reg, offset); \ if ( cond ) \ break; \ if ( timeout && NOW() > timeout ) \ @@ -155,7 +155,7 @@ do { \ threshold |= threshold << 1; \ printk(XENLOG_WARNING VTDPREFIX \ " IOMMU#%u: %s flush taking too long\n", \ - iommu->index, what); \ + (iommu)->index, what); \ timeout = 0; \ } \ cpu_relax(); \ @@ -164,7 +164,7 @@ do { \ if ( !timeout ) \ printk(XENLOG_WARNING VTDPREFIX \ " IOMMU#%u: %s flush took %lums\n", \ - iommu->index, what, (NOW() - start) / 10000000); \ + (iommu)->index, what, (NOW() - start) / 10000000); \ } while ( false ) int vtd_hw_check(void); diff --git a/xen/include/xen/kexec.h b/xen/include/xen/kexec.h index e66eb6a8e5..5dd288d1a5 100644 --- a/xen/include/xen/kexec.h +++ b/xen/include/xen/kexec.h @@ -66,9 +66,9 @@ void vmcoreinfo_append_str(const char *fmt, ...) #define VMCOREINFO_PAGESIZE(value) \ vmcoreinfo_append_str("PAGESIZE=%ld\n", value) #define VMCOREINFO_SYMBOL(name) \ - vmcoreinfo_append_str("SYMBOL(%s)=%lx\n", #name, (unsigned long)&name) + vmcoreinfo_append_str("SYMBOL(%s)=%lx\n", #name, (unsigned long)&(name)) #define VMCOREINFO_SYMBOL_ALIAS(alias, name) \ - vmcoreinfo_append_str("SYMBOL(%s)=%lx\n", #alias, (unsigned long)&name) + vmcoreinfo_append_str("SYMBOL(%s)=%lx\n", #alias, (unsigned long)&(name)) #define VMCOREINFO_STRUCT_SIZE(name) \ vmcoreinfo_append_str("SIZE(%s)=%zu\n", #name, sizeof(struct name)) #define VMCOREINFO_OFFSET(name, field) \ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 04:34:56 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 04:34:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1185188.1507467 (Exim 4.92) (envelope-from ) id 1vTuro-0001kt-PU; Fri, 12 Dec 2025 04:34:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1185188.1507467; Fri, 12 Dec 2025 04:34:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTuro-0001kk-Lf; Fri, 12 Dec 2025 04:34:56 +0000 Received: by outflank-mailman (input) for mailman id 1185188; Fri, 12 Dec 2025 04:34:55 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTurm-0001kc-W9 for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:34:54 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTurm-006EMb-2C for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:34:54 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTurm-004Igp-31 for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:34:54 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=JAHlQFJxFcb3PCfeI02ilcN66q2ALJDLHPslgdnyXdo=; b=eC2UxOp8fkRgd6SK60ABZhpugF Ve9Df6NJ/FXG30hya4yJlPGwi86DSk8puk+x+iVvA+3kxYfv/Gg+KHinlePPeL6j93mE2XPPGKpn9 /8WBsqRtgkNg7arrnE4uHD/xy4LYYkHKpB1VMYj2bgHEg95JnX62h93E8jlgxWLyTu4M=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] CI/eclair: Rename the eclair-* jobs for clarity Message-Id: Date: Fri, 12 Dec 2025 04:34:54 +0000 commit 3161cfa40b3bf878d8b8c0f10075fe7d5eaed52b Author: Andrew Cooper AuthorDate: Thu Dec 11 16:08:39 2025 +0000 Commit: Andrew Cooper CommitDate: Fri Dec 12 03:04:48 2025 +0000 CI/eclair: Rename the eclair-* jobs for clarity All Eclair scanning is for safety purposes, and the *-safety jobs are AMD's configuration specifically, and other configurations will likely be different. Rename them to *-amd. Give the un-suffixed job an *-allcode suffix to make it clearer that they're looking at all code. Give the un-suffixed scheduled jobs an *-allrules suffix. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Stefano Stabellini --- automation/gitlab-ci/analyze.yaml | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/automation/gitlab-ci/analyze.yaml b/automation/gitlab-ci/analyze.yaml index 20cabbe5f7..286faffeb3 100644 --- a/automation/gitlab-ci/analyze.yaml +++ b/automation/gitlab-ci/analyze.yaml @@ -39,7 +39,7 @@ allow_failure: true - !reference [.eclair-analysis, rules] -eclair-x86_64: +eclair-x86_64-allcode: extends: .eclair-analysis:triggered variables: LOGFILE: "eclair-x86_64.log" @@ -48,7 +48,7 @@ eclair-x86_64: allow_failure: true eclair-x86_64-testing: - extends: eclair-x86_64 + extends: eclair-x86_64-allcode tags: - eclair-analysis-testing rules: @@ -58,8 +58,8 @@ eclair-x86_64-testing: when: always - !reference [.eclair-analysis:triggered, rules] -eclair-x86_64-safety: - extends: eclair-x86_64 +eclair-x86_64-amd: + extends: eclair-x86_64-allcode tags: - eclair-analysis-safety allow_failure: false @@ -99,7 +99,7 @@ eclair-x86_64-safety: when: always - !reference [.eclair-analysis:triggered, rules] -eclair-ARM64: +eclair-ARM64-allcode: extends: .eclair-analysis:triggered variables: LOGFILE: "eclair-ARM64.log" @@ -108,7 +108,7 @@ eclair-ARM64: allow_failure: true eclair-ARM64-testing: - extends: eclair-ARM64 + extends: eclair-ARM64-allcode tags: - eclair-analysis-testing rules: @@ -118,8 +118,8 @@ eclair-ARM64-testing: when: always - !reference [.eclair-analysis:triggered, rules] -eclair-ARM64-safety: - extends: eclair-ARM64 +eclair-ARM64-amd: + extends: eclair-ARM64-allcode tags: - eclair-analysis-safety allow_failure: false @@ -174,7 +174,7 @@ eclair-ARM64-safety: when: never - !reference [.eclair-analysis, rules] -eclair-x86_64:on-schedule: +eclair-x86_64-allrules:on-schedule: extends: .eclair-analysis:on-schedule variables: VARIANT: "X86_64" @@ -183,7 +183,7 @@ eclair-x86_64:on-schedule: LOGFILE: "eclair-${VARIANT}-${RULESET}.log" allow_failure: true -eclair-ARM64:on-schedule: +eclair-ARM64-allrules:on-schedule: extends: .eclair-analysis:on-schedule variables: VARIANT: "ARM64" -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 04:35:05 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 04:35:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1185189.1507469 (Exim 4.92) (envelope-from ) id 1vTurx-0001nW-RY; Fri, 12 Dec 2025 04:35:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1185189.1507469; Fri, 12 Dec 2025 04:35:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTurx-0001nO-P0; Fri, 12 Dec 2025 04:35:05 +0000 Received: by outflank-mailman (input) for mailman id 1185189; Fri, 12 Dec 2025 04:35:05 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTurx-0001nI-2s for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:35:05 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTurw-006EMs-2V for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:35:05 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTurx-004JmX-06 for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 04:35:05 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=a0lPrO3GmDJyB1KZRAMlwHQyivUkynlWRHBx4jsxSsE=; b=CPEWFY8tjzDUN35xShEPDFxL+a 6pFd4H+zvo1L0EBn2qHhE+LE7x5cZsNx3LOpubkoIssWx7vqnzp5R3BJIMjZgX5ryywiCUg/KbQ9o avkGREMBL1daX0Z+qkAH5ap+PGdKLKA5sILX3s+5HRHgZK2dmO8OGaH3lF5OZU6Px+u4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/irq: Delete the pirq_cleanup_check() macro Message-Id: Date: Fri, 12 Dec 2025 04:35:05 +0000 commit 4aa218acd471d1ef9b9541a4f8325553afbf1d26 Author: Andrew Cooper AuthorDate: Mon Aug 25 19:22:44 2025 +0000 Commit: Andrew Cooper CommitDate: Fri Dec 12 03:04:48 2025 +0000 xen/irq: Delete the pirq_cleanup_check() macro MISRA Rule 5.5 objects to a macro aliasing a function, which is what pirq_cleanup_check() does. The macro was originally intended to ensure the condition 'if (!pirq->evtchn)' is always checked before invoking the function, avoiding errors across call sites. There are only a handful of users, so expand it inline to be plain regular C. Doing this shows one path now needing braces, and one path in 'evtchn_bind_pirq()' where the expanded form simplifies back to no delta, as it follows an unconditional clear of 'info->evtchn'. While this complies with MISRA, it shifts the responsibility to developers to check 'if (!pirq->evtchn)' at call sites. No functional changes. Signed-off-by: Andrew Cooper Signed-off-by: Dmytro Prokopchuk Reviewed-by: Stefano Stabellini --- xen/arch/x86/irq.c | 11 +++++++---- xen/common/event_channel.c | 5 ++++- xen/drivers/passthrough/x86/hvm.c | 9 ++++++--- xen/include/xen/irq.h | 3 --- 4 files changed, 17 insertions(+), 11 deletions(-) diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c index 92b8604dc8..7c3d6efd24 100644 --- a/xen/arch/x86/irq.c +++ b/xen/arch/x86/irq.c @@ -1351,7 +1351,8 @@ static void clear_domain_irq_pirq(struct domain *d, int irq, struct pirq *pirq) static void cleanup_domain_irq_pirq(struct domain *d, int irq, struct pirq *pirq) { - pirq_cleanup_check(pirq, d); + if ( !pirq->evtchn ) + pirq_cleanup_check(pirq, d); radix_tree_delete(&d->arch.irq_pirq, irq); } @@ -1409,7 +1410,7 @@ struct pirq *alloc_pirq_struct(struct domain *d) return pirq; } -void (pirq_cleanup_check)(struct pirq *pirq, struct domain *d) +void pirq_cleanup_check(struct pirq *pirq, struct domain *d) { /* * Check whether all fields have their default values, and delete @@ -2849,7 +2850,8 @@ int map_domain_emuirq_pirq(struct domain *d, int pirq, int emuirq) radix_tree_int_to_ptr(pirq)); break; default: - pirq_cleanup_check(info, d); + if ( !info->evtchn ) + pirq_cleanup_check(info, d); return err; } } @@ -2884,7 +2886,8 @@ int unmap_domain_pirq_emuirq(struct domain *d, int pirq) if ( info ) { info->arch.hvm.emuirq = IRQ_UNBOUND; - pirq_cleanup_check(info, d); + if ( !info->evtchn ) + pirq_cleanup_check(info, d); } if ( emuirq != IRQ_PT ) radix_tree_delete(&d->arch.hvm.emuirq_pirq, emuirq); diff --git a/xen/common/event_channel.c b/xen/common/event_channel.c index 67700b050a..a3d18bc464 100644 --- a/xen/common/event_channel.c +++ b/xen/common/event_channel.c @@ -741,11 +741,14 @@ int evtchn_close(struct domain *d1, int port1, bool guest) if ( !is_hvm_domain(d1) || domain_pirq_to_irq(d1, pirq->pirq) <= 0 || unmap_domain_pirq_emuirq(d1, pirq->pirq) < 0 ) + { /* * The successful path of unmap_domain_pirq_emuirq() will have * called pirq_cleanup_check() already. */ - pirq_cleanup_check(pirq, d1); + if ( !pirq->evtchn ) + pirq_cleanup_check(pirq, d1); + } } unlink_pirq_port(chn1, d1->vcpu[chn1->notify_vcpu_id]); break; diff --git a/xen/drivers/passthrough/x86/hvm.c b/xen/drivers/passthrough/x86/hvm.c index a2ca7e0e57..b73bb55055 100644 --- a/xen/drivers/passthrough/x86/hvm.c +++ b/xen/drivers/passthrough/x86/hvm.c @@ -329,7 +329,8 @@ int pt_irq_create_bind( pirq_dpci->gmsi.gvec = 0; pirq_dpci->dom = NULL; pirq_dpci->flags = 0; - pirq_cleanup_check(info, d); + if ( !info->evtchn ) + pirq_cleanup_check(info, d); write_unlock(&d->event_lock); return rc; } @@ -536,7 +537,8 @@ int pt_irq_create_bind( hvm_irq_dpci->link_cnt[link]--; } pirq_dpci->flags = 0; - pirq_cleanup_check(info, d); + if ( !info->evtchn ) + pirq_cleanup_check(info, d); write_unlock(&d->event_lock); xfree(girq); xfree(digl); @@ -693,7 +695,8 @@ int pt_irq_destroy_bind( */ pt_pirq_softirq_reset(pirq_dpci); - pirq_cleanup_check(pirq, d); + if ( !pirq->evtchn ) + pirq_cleanup_check(pirq, d); } write_unlock(&d->event_lock); diff --git a/xen/include/xen/irq.h b/xen/include/xen/irq.h index 95034c0d6b..6071b00f62 100644 --- a/xen/include/xen/irq.h +++ b/xen/include/xen/irq.h @@ -185,9 +185,6 @@ extern struct pirq *pirq_get_info(struct domain *d, int pirq); void pirq_cleanup_check(struct pirq *pirq, struct domain *d); -#define pirq_cleanup_check(pirq, d) \ - (!(pirq)->evtchn ? pirq_cleanup_check(pirq, d) : (void)0) - extern void pirq_guest_eoi(struct pirq *pirq); extern void desc_guest_eoi(struct irq_desc *desc, struct pirq *pirq); extern int pirq_guest_unmask(struct domain *d); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 09:00:08 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 09:00:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1185258.1507484 (Exim 4.92) (envelope-from ) id 1vTz0N-0006fC-UK; Fri, 12 Dec 2025 09:00:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1185258.1507484; Fri, 12 Dec 2025 09:00:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTz0N-0006f4-RA; Fri, 12 Dec 2025 09:00:03 +0000 Received: by outflank-mailman (input) for mailman id 1185258; Fri, 12 Dec 2025 09:00:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTz0M-0006Hx-3a for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 09:00:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vTz0L-006KK3-2L for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 09:00:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vTz0L-00GALQ-31 for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 09:00:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=1nwa8A5yfTvDlPQJhj25AvMa13jvngs5L58fHrKnn/c=; b=uHMneFq4QzDeovNHkAlxVU8D1X NBvCgy3VMNMufsR/Jz4ns1bg/WRtRAWVTiuSE8D6CzBVdHe/asho6tkXBtM3sYg0pigUkbT5ojDm/ gG3RJyrpFAYZFrmruTmzHeYkVpgyPlUpERf+USpUOjuVwXKoPYaOFgukERj7jfffv1EU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/char: implement suspend/resume calls for SCIF driver Message-Id: Date: Fri, 12 Dec 2025 09:00:01 +0000 commit e6836f213f0f9d3aeaf7c89ce1e20716795b37bd Author: Volodymyr Babchuk AuthorDate: Thu Aug 7 08:16:52 2025 +0300 Commit: Michal Orzel CommitDate: Fri Dec 12 09:48:57 2025 +0100 xen/char: implement suspend/resume calls for SCIF driver Implement suspend and resume callbacks for the SCIF UART driver, enabled when CONFIG_SYSTEM_SUSPEND is set. This allows proper handling of UART state across system suspend/resume cycles. Tested on Renesas R-Car H3 Starter Kit. Signed-off-by: Volodymyr Babchuk Signed-off-by: Oleksandr Andrushchenko Signed-off-by: Mykola Kvach Acked-by: Michal Orzel Reviewed-by: Oleksandr Tyshchenko --- xen/drivers/char/scif-uart.c | 40 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 38 insertions(+), 2 deletions(-) diff --git a/xen/drivers/char/scif-uart.c b/xen/drivers/char/scif-uart.c index 757793ca45..888821a3b8 100644 --- a/xen/drivers/char/scif-uart.c +++ b/xen/drivers/char/scif-uart.c @@ -139,9 +139,8 @@ static void scif_uart_interrupt(int irq, void *data) } } -static void __init scif_uart_init_preirq(struct serial_port *port) +static void scif_uart_disable(struct scif_uart *uart) { - struct scif_uart *uart = port->uart; const struct port_params *params = uart->params; /* @@ -155,6 +154,14 @@ static void __init scif_uart_init_preirq(struct serial_port *port) /* Reset TX/RX FIFOs */ scif_writew(uart, SCIF_SCFCR, SCFCR_RFRST | SCFCR_TFRST); +} + +static void scif_uart_init_preirq(struct serial_port *port) +{ + struct scif_uart *uart = port->uart; + const struct port_params *params = uart->params; + + scif_uart_disable(uart); /* Clear all errors and flags */ scif_readw(uart, params->status_reg); @@ -271,6 +278,31 @@ static void scif_uart_stop_tx(struct serial_port *port) scif_writew(uart, SCIF_SCSCR, scif_readw(uart, SCIF_SCSCR) & ~SCSCR_TIE); } +#ifdef CONFIG_SYSTEM_SUSPEND + +static void scif_uart_suspend(struct serial_port *port) +{ + struct scif_uart *uart = port->uart; + + scif_uart_stop_tx(port); + scif_uart_disable(uart); +} + +static void scif_uart_resume(struct serial_port *port) +{ + struct scif_uart *uart = port->uart; + const struct port_params *params = uart->params; + uint16_t ctrl; + + scif_uart_init_preirq(port); + + /* Enable TX/RX and Error Interrupts */ + ctrl = scif_readw(uart, SCIF_SCSCR); + scif_writew(uart, SCIF_SCSCR, ctrl | params->irq_flags); +} + +#endif /* CONFIG_SYSTEM_SUSPEND */ + static struct uart_driver __read_mostly scif_uart_driver = { .init_preirq = scif_uart_init_preirq, .init_postirq = scif_uart_init_postirq, @@ -281,6 +313,10 @@ static struct uart_driver __read_mostly scif_uart_driver = { .start_tx = scif_uart_start_tx, .stop_tx = scif_uart_stop_tx, .vuart_info = scif_vuart_info, +#ifdef CONFIG_SYSTEM_SUSPEND + .suspend = scif_uart_suspend, + .resume = scif_uart_resume, +#endif }; static const struct dt_device_match scif_uart_dt_match[] __initconst = -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 10:00:08 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 10:00:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1185289.1507508 (Exim 4.92) (envelope-from ) id 1vTzwQ-0006d5-E3; Fri, 12 Dec 2025 10:00:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1185289.1507508; Fri, 12 Dec 2025 10:00:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTzwQ-0006cl-BH; Fri, 12 Dec 2025 10:00:02 +0000 Received: by outflank-mailman (input) for mailman id 1185289; Fri, 12 Dec 2025 10:00:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vTzwP-0006TE-Oj for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/char: implement suspend/resume calls for SCIF driver Message-Id: Date: Fri, 12 Dec 2025 10:00:01 +0000 commit e6836f213f0f9d3aeaf7c89ce1e20716795b37bd Author: Volodymyr Babchuk AuthorDate: Thu Aug 7 08:16:52 2025 +0300 Commit: Michal Orzel CommitDate: Fri Dec 12 09:48:57 2025 +0100 xen/char: implement suspend/resume calls for SCIF driver Implement suspend and resume callbacks for the SCIF UART driver, enabled when CONFIG_SYSTEM_SUSPEND is set. This allows proper handling of UART state across system suspend/resume cycles. Tested on Renesas R-Car H3 Starter Kit. Signed-off-by: Volodymyr Babchuk Signed-off-by: Oleksandr Andrushchenko Signed-off-by: Mykola Kvach Acked-by: Michal Orzel Reviewed-by: Oleksandr Tyshchenko --- xen/drivers/char/scif-uart.c | 40 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 38 insertions(+), 2 deletions(-) diff --git a/xen/drivers/char/scif-uart.c b/xen/drivers/char/scif-uart.c index 757793ca45..888821a3b8 100644 --- a/xen/drivers/char/scif-uart.c +++ b/xen/drivers/char/scif-uart.c @@ -139,9 +139,8 @@ static void scif_uart_interrupt(int irq, void *data) } } -static void __init scif_uart_init_preirq(struct serial_port *port) +static void scif_uart_disable(struct scif_uart *uart) { - struct scif_uart *uart = port->uart; const struct port_params *params = uart->params; /* @@ -155,6 +154,14 @@ static void __init scif_uart_init_preirq(struct serial_port *port) /* Reset TX/RX FIFOs */ scif_writew(uart, SCIF_SCFCR, SCFCR_RFRST | SCFCR_TFRST); +} + +static void scif_uart_init_preirq(struct serial_port *port) +{ + struct scif_uart *uart = port->uart; + const struct port_params *params = uart->params; + + scif_uart_disable(uart); /* Clear all errors and flags */ scif_readw(uart, params->status_reg); @@ -271,6 +278,31 @@ static void scif_uart_stop_tx(struct serial_port *port) scif_writew(uart, SCIF_SCSCR, scif_readw(uart, SCIF_SCSCR) & ~SCSCR_TIE); } +#ifdef CONFIG_SYSTEM_SUSPEND + +static void scif_uart_suspend(struct serial_port *port) +{ + struct scif_uart *uart = port->uart; + + scif_uart_stop_tx(port); + scif_uart_disable(uart); +} + +static void scif_uart_resume(struct serial_port *port) +{ + struct scif_uart *uart = port->uart; + const struct port_params *params = uart->params; + uint16_t ctrl; + + scif_uart_init_preirq(port); + + /* Enable TX/RX and Error Interrupts */ + ctrl = scif_readw(uart, SCIF_SCSCR); + scif_writew(uart, SCIF_SCSCR, ctrl | params->irq_flags); +} + +#endif /* CONFIG_SYSTEM_SUSPEND */ + static struct uart_driver __read_mostly scif_uart_driver = { .init_preirq = scif_uart_init_preirq, .init_postirq = scif_uart_init_postirq, @@ -281,6 +313,10 @@ static struct uart_driver __read_mostly scif_uart_driver = { .start_tx = scif_uart_start_tx, .stop_tx = scif_uart_stop_tx, .vuart_info = scif_vuart_info, +#ifdef CONFIG_SYSTEM_SUSPEND + .suspend = scif_uart_suspend, + .resume = scif_uart_resume, +#endif }; static const struct dt_device_match scif_uart_dt_match[] __initconst = -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 22:55:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 22:55:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1185977.1507902 (Exim 4.92) (envelope-from ) id 1vUC2R-0004Kc-5x; Fri, 12 Dec 2025 22:55:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1185977.1507902; Fri, 12 Dec 2025 22:55:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vUC2R-0004KU-3Q; Fri, 12 Dec 2025 22:55:03 +0000 Received: by outflank-mailman (input) for mailman id 1185977; Fri, 12 Dec 2025 22:55:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vUC2P-0004KO-T0 for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] automation: prevent eclair-ARM64-amd from running by mistake Message-Id: Date: Fri, 12 Dec 2025 22:55:01 +0000 commit 233f6be7fc2388261310e3b2e138769d42e03554 Author: Victor Lira AuthorDate: Fri Dec 12 19:08:49 2025 +0000 Commit: Stefano Stabellini CommitDate: Fri Dec 12 14:41:46 2025 -0800 automation: prevent eclair-ARM64-amd from running by mistake It seems unintentional that this job references .eclair-analysis instead of .eclair-analysis:triggered which does not apply the rules from that template. One effect is that it runs always instead of manually in my xen-project/people repo. Signed-off-by: Victor Lira Reviewed-by: Nicola Vetrini Acked-by: Stefano Stabellini --- automation/gitlab-ci/analyze.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/automation/gitlab-ci/analyze.yaml b/automation/gitlab-ci/analyze.yaml index 286faffeb3..e9a8f9d544 100644 --- a/automation/gitlab-ci/analyze.yaml +++ b/automation/gitlab-ci/analyze.yaml @@ -165,7 +165,7 @@ eclair-ARM64-amd: rules: - if: $ECLAIR_SAFETY when: always - - !reference [.eclair-analysis, rules] + - !reference [.eclair-analysis:triggered, rules] .eclair-analysis:on-schedule: extends: .eclair-analysis -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Fri Dec 12 22:55:12 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 12 Dec 2025 22:55:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1185978.1507906 (Exim 4.92) (envelope-from ) id 1vUC2a-0004MI-7M; Fri, 12 Dec 2025 22:55:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1185978.1507906; Fri, 12 Dec 2025 22:55:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vUC2a-0004MA-4r; Fri, 12 Dec 2025 22:55:12 +0000 Received: by outflank-mailman (input) for mailman id 1185978; Fri, 12 Dec 2025 22:55:11 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vUC2Z-0004M4-TF for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 22:55:11 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vUC2Z-006aG7-1u for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 22:55:11 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vUC2Z-0049o0-2i for xen-changelog@lists.xenproject.org; Fri, 12 Dec 2025 22:55:11 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=uhPQyWMR876qKoOsrAOwp89+st5WMWIco+UqEXp2Vj8=; b=5xOUaXWfceW8FReT22OngoJ1sn jq0M1t1bUTRil3Mt4UcDJduZ57yuYDq4/E+H8m6XKDNCX4cwxkualBRARfw1KbzG5+zQomnCI8ASe ocmWck4gH8GWE0Km5ZnsTtAZvD95U5U0qzXwtgRJMo6Wsm3kXVNeDLZZ11+BxAJD286U=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] automation: edit pipeline to prevent running non-selected jobs Message-Id: Date: Fri, 12 Dec 2025 22:55:11 +0000 commit 485ab1b5db0f358625fafe2df4e41e3ef008aed8 Author: Victor Lira AuthorDate: Fri Dec 12 19:08:50 2025 +0000 Commit: Stefano Stabellini CommitDate: Fri Dec 12 14:41:51 2025 -0800 automation: edit pipeline to prevent running non-selected jobs Filtering jobs using the selected jobs regex is missing for qemu-export + yocto jobs when running regular pipelines and eclair jobs when running scheduled pipelines. First, set a default value for the selected jobs regex to remove the need to always check if the variable is empty. Then add the missing rules to filter out those jobs. Signed-off-by: Victor Lira Reviewed-by: Stefano Stabellini --- .gitlab-ci.yml | 1 + automation/gitlab-ci/analyze.yaml | 5 +++-- automation/gitlab-ci/build.yaml | 9 ++++++--- 3 files changed, 10 insertions(+), 5 deletions(-) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 7974ac4e82..64bed300a6 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -2,6 +2,7 @@ variables: XEN_REGISTRY: registry.gitlab.com/xen-project/xen SELECTED_JOBS_ONLY: description: "Regex to select only some jobs, must be enclosed with /. For example /job1|job2/" + value: "/.*/" workflow: name: "$CI_PIPELINE_SCHEDULE_DESCRIPTION" diff --git a/automation/gitlab-ci/analyze.yaml b/automation/gitlab-ci/analyze.yaml index e9a8f9d544..a472692fcb 100644 --- a/automation/gitlab-ci/analyze.yaml +++ b/automation/gitlab-ci/analyze.yaml @@ -31,8 +31,7 @@ rules: - if: $CI_PIPELINE_SOURCE == "schedule" when: never - - if: $SELECTED_JOBS_ONLY && $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY - - if: $SELECTED_JOBS_ONLY + - if: $CI_JOB_NAME !~ $SELECTED_JOBS_ONLY when: never - if: $WTOKEN && $CI_PROJECT_PATH =~ /^xen-project\/people\/.*$/ when: manual @@ -172,6 +171,8 @@ eclair-ARM64-amd: rules: - if: $CI_PIPELINE_SOURCE != "schedule" when: never + - if: $CI_JOB_NAME !~ $SELECTED_JOBS_ONLY + when: never - !reference [.eclair-analysis, rules] eclair-x86_64-allrules:on-schedule: diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index 4cb52fe597..e9e04e37d4 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -226,6 +226,9 @@ - binaries/ when: always needs: [] + rules: + - if: $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY + when: manual .yocto-test-arm64: extends: .yocto-test @@ -261,6 +264,9 @@ .test-jobs-artifact-common: stage: build needs: [] + rules: + - if: $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY + when: on_success # Arm test artifacts @@ -468,20 +474,17 @@ yocto-qemuarm64: extends: .yocto-test-arm64 variables: YOCTO_BOARD: qemuarm64 - when: manual yocto-qemuarm: extends: .yocto-test-arm64 variables: YOCTO_BOARD: qemuarm YOCTO_OUTPUT: --copy-output - when: manual yocto-qemux86-64: extends: .yocto-test-x86-64 variables: YOCTO_BOARD: qemux86-64 - when: manual # Cppcheck analysis jobs -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Sat Dec 13 01:44:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 13 Dec 2025 01:44:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1186068.1507960 (Exim 4.92) (envelope-from ) id 1vUEfz-0006RZ-K9; Sat, 13 Dec 2025 01:44:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1186068.1507960; Sat, 13 Dec 2025 01:44:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vUEfz-0006RR-HJ; Sat, 13 Dec 2025 01:44:03 +0000 Received: by outflank-mailman (input) for mailman id 1186068; Sat, 13 Dec 2025 01:44:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vUEfy-0006RK-7I for xen-changelog@lists.xenproject.org; Sat, 13 Dec 2025 01:44:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vUEfx-007kQP-2n for xen-changelog@lists.xenproject.org; Sat, 13 Dec 2025 01:44:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vUEfy-005n0g-0K for xen-changelog@lists.xenproject.org; Sat, 13 Dec 2025 01:44:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Cd29+M94f+Td8K2QR6NgLtviknqAHRqaNnepfxLs89I=; b=ATjr0jjda35wfpOIsMxWHRgmAB hRVv53Nvsi/bXKaBroXzd7GUz+jmDsd/TiaFJHZe5Xt2CII5GNMQgV5OIVF/KuFzDMsMPy2TY7+7s CrRhH6b+erefY0+Y30PXwdeoKTpkkoj0Z6+mO5u5E111ISs9nSq/qxSS6ig4DHMEqB7g=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] automation: edit pipeline to fix blocked status Message-Id: Date: Sat, 13 Dec 2025 01:44:02 +0000 commit 3490ca374a08733bbe4fb434654ca742cc67c02d Author: Victor Lira AuthorDate: Fri Dec 12 23:57:27 2025 +0000 Commit: Stefano Stabellini CommitDate: Fri Dec 12 17:39:08 2025 -0800 automation: edit pipeline to fix blocked status The original yocto config had a hidden default of allow_failure: true for the manual job while the hidden default for rules is false. This causes the stages with manual jobs to show as blocked. Set it explicitly to true to avoid the analyze and build stages being shown as blocked. Fixes: 485ab1b5db0f358625fafe2df4e41e3ef008aed8 Signed-off-by: Victor Lira Reviewed-by: Stefano Stabellini --- automation/gitlab-ci/build.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index e9e04e37d4..f7e032320a 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -229,6 +229,7 @@ rules: - if: $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY when: manual + allow_failure: true .yocto-test-arm64: extends: .yocto-test -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Sat Dec 13 01:44:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 13 Dec 2025 01:44:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1186069.1507963 (Exim 4.92) (envelope-from ) id 1vUEg9-0006Uv-LY; Sat, 13 Dec 2025 01:44:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1186069.1507963; Sat, 13 Dec 2025 01:44:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vUEg9-0006Un-Iy; Sat, 13 Dec 2025 01:44:13 +0000 Received: by outflank-mailman (input) for mailman id 1186069; Sat, 13 Dec 2025 01:44:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vUEg8-0006Uc-ED for xen-changelog@lists.xenproject.org; Sat, 13 Dec 2025 01:44:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vUEg8-007kQj-0P for xen-changelog@lists.xenproject.org; Sat, 13 Dec 2025 01:44:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vUEg8-005oeq-11 for xen-changelog@lists.xenproject.org; Sat, 13 Dec 2025 01:44:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=VoGfhDD4VMrpNYfiFZtAM7+DoHOB+dgSEPO8vAdhXt0=; b=EMlEeIN53P1O7fdvaDFdgfwrD5 XfE8YWXQ3JYhhPk6RjlwjyJL1M0dY+2XcYh+lTZgv6RpoK4Jl280bTiesG5dxTekurp+IUY8QkTf7 YztXuk2ZCn85ws7wHhnJYrQ2fZrb76N6iehVDfBuI3IV3AM7ToG3vEQXTkYPjF5ubHfE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] automation: edit pipeline to fix hardware jobs running by mistake Message-Id: Date: Sat, 13 Dec 2025 01:44:12 +0000 commit 2a9dbe94e07ff181a857445546a9857d8571fce6 Author: Victor Lira AuthorDate: Sat Dec 13 01:30:28 2025 +0000 Commit: Stefano Stabellini CommitDate: Fri Dec 12 17:39:19 2025 -0800 automation: edit pipeline to fix hardware jobs running by mistake The selected jobs regex was assumed to be possibly empty in some places and setting a default value for the regex caused the hardware jobs to bypass some rules checks. To fix this, adjust the rules to remove the check for empty and instead just match the regex. Fixes: 485ab1b5db0f358625fafe2df4e41e3ef008aed8 Signed-off-by: Victor Lira Reviewed-by: Stefano Stabellini --- automation/gitlab-ci/build.yaml | 7 ++----- automation/gitlab-ci/test.yaml | 27 +++++++++++---------------- 2 files changed, 13 insertions(+), 21 deletions(-) diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index f7e032320a..a6fc55c2d5 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -13,11 +13,8 @@ when: always needs: [] rules: - - if: $SELECTED_JOBS_ONLY && $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY - when: always - - if: $SELECTED_JOBS_ONLY - when: never - - when: on_success + - if: $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY + when: on_success .gcc-tmpl: variables: &gcc diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml index 8d8f62c8d0..338fc99a8a 100644 --- a/automation/gitlab-ci/test.yaml +++ b/automation/gitlab-ci/test.yaml @@ -2,10 +2,8 @@ stage: test image: ${XEN_REGISTRY}/${CONTAINER} rules: - - if: $SELECTED_JOBS_ONLY && $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY - - if: $SELECTED_JOBS_ONLY - when: never - - when: on_success + - if: $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY + when: on_success .arm64-test-needs: &arm64-test-needs - project: xen-project/hardware/test-artifacts @@ -113,10 +111,9 @@ - '*.dtb' when: always rules: - - if: $SELECTED_JOBS_ONLY && $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY - - if: $SELECTED_JOBS_ONLY - when: never - - if: $XILINX_JOBS == "true" && $CI_COMMIT_REF_PROTECTED == "true" + - if: $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY && $XILINX_JOBS == "true" + && $CI_COMMIT_REF_PROTECTED == "true" + when: on_success tags: - xilinx @@ -134,10 +131,9 @@ - '*.log' when: always rules: - - if: $SELECTED_JOBS_ONLY && $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY - - if: $SELECTED_JOBS_ONLY - when: never - - if: $XILINX_JOBS == "true" && $CI_COMMIT_REF_PROTECTED == "true" + - if: $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY && $XILINX_JOBS == "true" + && $CI_COMMIT_REF_PROTECTED == "true" + when: on_success tags: - xilinx @@ -157,10 +153,9 @@ - '*.log' when: always rules: - - if: $SELECTED_JOBS_ONLY && $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY - - if: $SELECTED_JOBS_ONLY - when: never - - if: $QUBES_JOBS == "true" && $CI_COMMIT_REF_PROTECTED == "true" + - if: $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY && $QUBES_JOBS == "true" + && $CI_COMMIT_REF_PROTECTED == "true" + when: on_success tags: - qubes-hw2 -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Sat Dec 13 02:55:10 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 13 Dec 2025 02:55:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1186082.1507968 (Exim 4.92) (envelope-from ) id 1vUFmg-0008Uf-Ez; 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Sat, 13 Dec 2025 02:55:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=s3NGKhnTdddn33FXBV/9jnbyrs8nU57ddHoaybJt1mg=; b=we62y98MoepZGSDcaH1nA5ReFO Y/XYGntWApAXTksIrd13AJRecMmCWkX/p9t4AiGRztKHsutO+8TRFt7Qn5OwEvzbI6+erWjEJSNpA fLb1ZERGtkazNIZUVBM9iZg++zZsFYQ9U3ABTtR8s7784Ds5XuIs3X1Vuu5J37qkCTUo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation: prevent eclair-ARM64-amd from running by mistake Message-Id: Date: Sat, 13 Dec 2025 02:55:01 +0000 commit 233f6be7fc2388261310e3b2e138769d42e03554 Author: Victor Lira AuthorDate: Fri Dec 12 19:08:49 2025 +0000 Commit: Stefano Stabellini CommitDate: Fri Dec 12 14:41:46 2025 -0800 automation: prevent eclair-ARM64-amd from running by mistake It seems unintentional that this job references .eclair-analysis instead of .eclair-analysis:triggered which does not apply the rules from that template. One effect is that it runs always instead of manually in my xen-project/people repo. Signed-off-by: Victor Lira Reviewed-by: Nicola Vetrini Acked-by: Stefano Stabellini --- automation/gitlab-ci/analyze.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/automation/gitlab-ci/analyze.yaml b/automation/gitlab-ci/analyze.yaml index 286faffeb3..e9a8f9d544 100644 --- a/automation/gitlab-ci/analyze.yaml +++ b/automation/gitlab-ci/analyze.yaml @@ -165,7 +165,7 @@ eclair-ARM64-amd: rules: - if: $ECLAIR_SAFETY when: always - - !reference [.eclair-analysis, rules] + - !reference [.eclair-analysis:triggered, rules] .eclair-analysis:on-schedule: extends: .eclair-analysis -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Dec 13 02:55:12 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 13 Dec 2025 02:55:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1186083.1507972 (Exim 4.92) (envelope-from ) id 1vUFmq-0008WH-GA; Sat, 13 Dec 2025 02:55:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1186083.1507972; Sat, 13 Dec 2025 02:55:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vUFmq-0008W9-DU; Sat, 13 Dec 2025 02:55:12 +0000 Received: by outflank-mailman (input) for mailman id 1186083; Sat, 13 Dec 2025 02:55:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vUFmp-0008Vz-Uv for xen-changelog@lists.xenproject.org; Sat, 13 Dec 2025 02:55:11 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vUFmp-007m5T-24 for xen-changelog@lists.xenproject.org; Sat, 13 Dec 2025 02:55:11 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vUFmp-00EAsB-2j for xen-changelog@lists.xenproject.org; Sat, 13 Dec 2025 02:55:11 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=5+1EFU8GyMGiKGXBHfIDEENTC1PnlO1G8qtdEzKNThU=; b=XzVqqeVKbAhTXPkjN8kW3Ryv4/ KDvZznHpxWYAx5sbzFBPabHLeAXL9TE8C2awpjwT3YDhHLM6BRVnymntQiCki94y7RujRAyGkm4py eNoJDoUy1bvwvbMVFClnpUO1s/Ncfw2Mo3yqZ71/TyJRCfmitqX23nBOCLm+j7LFVY4U=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation: edit pipeline to prevent running non-selected jobs Message-Id: Date: Sat, 13 Dec 2025 02:55:11 +0000 commit 485ab1b5db0f358625fafe2df4e41e3ef008aed8 Author: Victor Lira AuthorDate: Fri Dec 12 19:08:50 2025 +0000 Commit: Stefano Stabellini CommitDate: Fri Dec 12 14:41:51 2025 -0800 automation: edit pipeline to prevent running non-selected jobs Filtering jobs using the selected jobs regex is missing for qemu-export + yocto jobs when running regular pipelines and eclair jobs when running scheduled pipelines. First, set a default value for the selected jobs regex to remove the need to always check if the variable is empty. Then add the missing rules to filter out those jobs. Signed-off-by: Victor Lira Reviewed-by: Stefano Stabellini --- .gitlab-ci.yml | 1 + automation/gitlab-ci/analyze.yaml | 5 +++-- automation/gitlab-ci/build.yaml | 9 ++++++--- 3 files changed, 10 insertions(+), 5 deletions(-) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 7974ac4e82..64bed300a6 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -2,6 +2,7 @@ variables: XEN_REGISTRY: registry.gitlab.com/xen-project/xen SELECTED_JOBS_ONLY: description: "Regex to select only some jobs, must be enclosed with /. For example /job1|job2/" + value: "/.*/" workflow: name: "$CI_PIPELINE_SCHEDULE_DESCRIPTION" diff --git a/automation/gitlab-ci/analyze.yaml b/automation/gitlab-ci/analyze.yaml index e9a8f9d544..a472692fcb 100644 --- a/automation/gitlab-ci/analyze.yaml +++ b/automation/gitlab-ci/analyze.yaml @@ -31,8 +31,7 @@ rules: - if: $CI_PIPELINE_SOURCE == "schedule" when: never - - if: $SELECTED_JOBS_ONLY && $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY - - if: $SELECTED_JOBS_ONLY + - if: $CI_JOB_NAME !~ $SELECTED_JOBS_ONLY when: never - if: $WTOKEN && $CI_PROJECT_PATH =~ /^xen-project\/people\/.*$/ when: manual @@ -172,6 +171,8 @@ eclair-ARM64-amd: rules: - if: $CI_PIPELINE_SOURCE != "schedule" when: never + - if: $CI_JOB_NAME !~ $SELECTED_JOBS_ONLY + when: never - !reference [.eclair-analysis, rules] eclair-x86_64-allrules:on-schedule: diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index 4cb52fe597..e9e04e37d4 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -226,6 +226,9 @@ - binaries/ when: always needs: [] + rules: + - if: $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY + when: manual .yocto-test-arm64: extends: .yocto-test @@ -261,6 +264,9 @@ .test-jobs-artifact-common: stage: build needs: [] + rules: + - if: $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY + when: on_success # Arm test artifacts @@ -468,20 +474,17 @@ yocto-qemuarm64: extends: .yocto-test-arm64 variables: YOCTO_BOARD: qemuarm64 - when: manual yocto-qemuarm: extends: .yocto-test-arm64 variables: YOCTO_BOARD: qemuarm YOCTO_OUTPUT: --copy-output - when: manual yocto-qemux86-64: extends: .yocto-test-x86-64 variables: YOCTO_BOARD: qemux86-64 - when: manual # Cppcheck analysis jobs -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Dec 13 02:55:22 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 13 Dec 2025 02:55:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1186084.1507976 (Exim 4.92) (envelope-from ) id 1vUFn0-00006w-HV; Sat, 13 Dec 2025 02:55:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1186084.1507976; Sat, 13 Dec 2025 02:55:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vUFn0-00006o-Ex; Sat, 13 Dec 2025 02:55:22 +0000 Received: by outflank-mailman (input) for mailman id 1186084; Sat, 13 Dec 2025 02:55:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vUFn0-00006i-2A for xen-changelog@lists.xenproject.org; Sat, 13 Dec 2025 02:55:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vUFmz-007m5Z-2Q for xen-changelog@lists.xenproject.org; Sat, 13 Dec 2025 02:55:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vUFmz-00ECPq-3A for xen-changelog@lists.xenproject.org; Sat, 13 Dec 2025 02:55:21 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=3wSW4ICQ0xJBlwkYGAFIZG4Tnx2CoccyFhh7Mfh/xWY=; b=EQVusaUvUronLj27pm4CQLcHbz zLEVSotoWWNzrsDKkuWI9s8oXax97/cx3TUWRw5QlmdtJN1gZTIrPDpvcf5Yx/49vHVuUdEd6IRa3 ecHNQHuJJj2IafH7H2CNowmcLxdhrOrsrPa/WiU4TUshz2wO4F5QRcjDprGWWs2hi2KU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation: edit pipeline to fix blocked status Message-Id: Date: Sat, 13 Dec 2025 02:55:21 +0000 commit 3490ca374a08733bbe4fb434654ca742cc67c02d Author: Victor Lira AuthorDate: Fri Dec 12 23:57:27 2025 +0000 Commit: Stefano Stabellini CommitDate: Fri Dec 12 17:39:08 2025 -0800 automation: edit pipeline to fix blocked status The original yocto config had a hidden default of allow_failure: true for the manual job while the hidden default for rules is false. This causes the stages with manual jobs to show as blocked. Set it explicitly to true to avoid the analyze and build stages being shown as blocked. Fixes: 485ab1b5db0f358625fafe2df4e41e3ef008aed8 Signed-off-by: Victor Lira Reviewed-by: Stefano Stabellini --- automation/gitlab-ci/build.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index e9e04e37d4..f7e032320a 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -229,6 +229,7 @@ rules: - if: $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY when: manual + allow_failure: true .yocto-test-arm64: extends: .yocto-test -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Dec 13 02:55:32 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 13 Dec 2025 02:55:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1186085.1507980 (Exim 4.92) (envelope-from ) id 1vUFnA-00009k-JC; Sat, 13 Dec 2025 02:55:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1186085.1507980; Sat, 13 Dec 2025 02:55:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vUFnA-00009c-GT; Sat, 13 Dec 2025 02:55:32 +0000 Received: by outflank-mailman (input) for mailman id 1186085; Sat, 13 Dec 2025 02:55:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vUFnA-00009S-5c for xen-changelog@lists.xenproject.org; Sat, 13 Dec 2025 02:55:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vUFn9-007m7c-2l for xen-changelog@lists.xenproject.org; Sat, 13 Dec 2025 02:55:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vUFnA-00EE2F-0J for xen-changelog@lists.xenproject.org; Sat, 13 Dec 2025 02:55:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=HAoOFFstNxP3KuWK480embW7NeNj2xU4EC6lricAD+A=; b=02Xn0SOJSToizDcsTILcshZPVo TOgU18LwwqfvT7qKkTyibR8jrQcHuBk6jQnFHOto8d7F7mMSbKy9goBvXxBumLbB2IkABTB47POhq ji2xtINMGrG88X5IeI7f/j0+y9TAu4+XrtdRstJz35OLQGJwAgDk/lHwZtM4GXrlmpmM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation: edit pipeline to fix hardware jobs running by mistake Message-Id: Date: Sat, 13 Dec 2025 02:55:32 +0000 commit 2a9dbe94e07ff181a857445546a9857d8571fce6 Author: Victor Lira AuthorDate: Sat Dec 13 01:30:28 2025 +0000 Commit: Stefano Stabellini CommitDate: Fri Dec 12 17:39:19 2025 -0800 automation: edit pipeline to fix hardware jobs running by mistake The selected jobs regex was assumed to be possibly empty in some places and setting a default value for the regex caused the hardware jobs to bypass some rules checks. To fix this, adjust the rules to remove the check for empty and instead just match the regex. Fixes: 485ab1b5db0f358625fafe2df4e41e3ef008aed8 Signed-off-by: Victor Lira Reviewed-by: Stefano Stabellini --- automation/gitlab-ci/build.yaml | 7 ++----- automation/gitlab-ci/test.yaml | 27 +++++++++++---------------- 2 files changed, 13 insertions(+), 21 deletions(-) diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index f7e032320a..a6fc55c2d5 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -13,11 +13,8 @@ when: always needs: [] rules: - - if: $SELECTED_JOBS_ONLY && $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY - when: always - - if: $SELECTED_JOBS_ONLY - when: never - - when: on_success + - if: $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY + when: on_success .gcc-tmpl: variables: &gcc diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml index 8d8f62c8d0..338fc99a8a 100644 --- a/automation/gitlab-ci/test.yaml +++ b/automation/gitlab-ci/test.yaml @@ -2,10 +2,8 @@ stage: test image: ${XEN_REGISTRY}/${CONTAINER} rules: - - if: $SELECTED_JOBS_ONLY && $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY - - if: $SELECTED_JOBS_ONLY - when: never - - when: on_success + - if: $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY + when: on_success .arm64-test-needs: &arm64-test-needs - project: xen-project/hardware/test-artifacts @@ -113,10 +111,9 @@ - '*.dtb' when: always rules: - - if: $SELECTED_JOBS_ONLY && $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY - - if: $SELECTED_JOBS_ONLY - when: never - - if: $XILINX_JOBS == "true" && $CI_COMMIT_REF_PROTECTED == "true" + - if: $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY && $XILINX_JOBS == "true" + && $CI_COMMIT_REF_PROTECTED == "true" + when: on_success tags: - xilinx @@ -134,10 +131,9 @@ - '*.log' when: always rules: - - if: $SELECTED_JOBS_ONLY && $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY - - if: $SELECTED_JOBS_ONLY - when: never - - if: $XILINX_JOBS == "true" && $CI_COMMIT_REF_PROTECTED == "true" + - if: $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY && $XILINX_JOBS == "true" + && $CI_COMMIT_REF_PROTECTED == "true" + when: on_success tags: - xilinx @@ -157,10 +153,9 @@ - '*.log' when: always rules: - - if: $SELECTED_JOBS_ONLY && $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY - - if: $SELECTED_JOBS_ONLY - when: never - - if: $QUBES_JOBS == "true" && $CI_COMMIT_REF_PROTECTED == "true" + - if: $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY && $QUBES_JOBS == "true" + && $CI_COMMIT_REF_PROTECTED == "true" + when: on_success tags: - qubes-hw2 -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Mon Dec 15 10:11:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 15 Dec 2025 10:11:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1186741.1508163 (Exim 4.92) (envelope-from ) id 1vV5Xj-0000xg-94; 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Mon, 15 Dec 2025 10:11:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Vjpq22MR9cB7XvikrvuHvLojTGD1qLeNd4HMe5MCHLk=; b=vESeJrR/DWin7b/xZATxbT6XGL FD9jkC1gW3tw4NEAPDadc9fg7IRngCSifFQW3O+fuhuHLYKVDO8tQSMMLVll6XS8lQ/yE1pWlIooe WB5qN7BsmQYk0Z51PuQat+ZudURW2tokcY5Dq2jAKYOh7aqkjVz5M2g/iMwwesMOwdEA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging-4.17] update Xen version to 4.17.6 Message-Id: Date: Mon, 15 Dec 2025 10:11:02 +0000 commit 8c80ec836310fb2be22b0a2437da002b6b031480 Author: Jan Beulich AuthorDate: Mon Dec 15 10:59:22 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 15 10:59:22 2025 +0100 update Xen version to 4.17.6 --- Config.mk | 2 +- xen/Makefile | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Config.mk b/Config.mk index ad214a683d..0ca9906ffd 100644 --- a/Config.mk +++ b/Config.mk @@ -232,7 +232,7 @@ MINIOS_UPSTREAM_URL ?= git://xenbits.xen.org/mini-os.git endif OVMF_UPSTREAM_REVISION ?= 7b4a99be8a39c12d3a7fc4b8db9f0eab4ac688d5 QEMU_UPSTREAM_REVISION ?= qemu-xen-4.17.3 -MINIOS_UPSTREAM_REVISION ?= ff13dabd3099687921145a5e3e960ba8337e7488 +MINIOS_UPSTREAM_REVISION ?= xen-RELEASE-4.17.6 SEABIOS_UPSTREAM_REVISION ?= rel-1.16.0 diff --git a/xen/Makefile b/xen/Makefile index 45f204865e..05e08f5457 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -6,7 +6,7 @@ this-makefile := $(call lastword,$(MAKEFILE_LIST)) # All other places this is stored (eg. compile.h) should be autogenerated. export XEN_VERSION = 4 export XEN_SUBVERSION = 17 -export XEN_EXTRAVERSION ?= .5$(XEN_VENDORVERSION) +export XEN_EXTRAVERSION ?= .6$(XEN_VENDORVERSION) export XEN_FULLVERSION = $(XEN_VERSION).$(XEN_SUBVERSION)$(XEN_EXTRAVERSION) -include xen-version -- generated by git-patchbot for /home/xen/git/xen.git#staging-4.17 From xen-changelog-bounces@lists.xenproject.org Mon Dec 15 10:22:05 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 15 Dec 2025 10:22:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1186757.1508178 (Exim 4.92) (envelope-from ) id 1vV5iN-0002oO-Du; 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Mon, 15 Dec 2025 10:22:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=0Sv+uefXh1r1XaFCddQdqaPGnErfkXs5JcGYSBGnf4s=; b=wAvyS69qz5LaePDrYbKY5TMHvF 8RuJdt7JgQW/N0526jacQ8S3CbE8ctvjUS90T1BoyXhLlItRJl6uEyE5yYi0S+9/vpz91mr3TnDFs 4a/uFWp6hfU7sLIqWvsKC+O8PAWEgWZ+eGlcsGLzLX7RjMlGZ8TPqO05x3mhY0KzjvM4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] update Xen version to 4.17.6 Message-Id: Date: Mon, 15 Dec 2025 10:22:02 +0000 commit 8c80ec836310fb2be22b0a2437da002b6b031480 Author: Jan Beulich AuthorDate: Mon Dec 15 10:59:22 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 15 10:59:22 2025 +0100 update Xen version to 4.17.6 --- Config.mk | 2 +- xen/Makefile | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Config.mk b/Config.mk index ad214a683d..0ca9906ffd 100644 --- a/Config.mk +++ b/Config.mk @@ -232,7 +232,7 @@ MINIOS_UPSTREAM_URL ?= git://xenbits.xen.org/mini-os.git endif OVMF_UPSTREAM_REVISION ?= 7b4a99be8a39c12d3a7fc4b8db9f0eab4ac688d5 QEMU_UPSTREAM_REVISION ?= qemu-xen-4.17.3 -MINIOS_UPSTREAM_REVISION ?= ff13dabd3099687921145a5e3e960ba8337e7488 +MINIOS_UPSTREAM_REVISION ?= xen-RELEASE-4.17.6 SEABIOS_UPSTREAM_REVISION ?= rel-1.16.0 diff --git a/xen/Makefile b/xen/Makefile index 45f204865e..05e08f5457 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -6,7 +6,7 @@ this-makefile := $(call lastword,$(MAKEFILE_LIST)) # All other places this is stored (eg. compile.h) should be autogenerated. export XEN_VERSION = 4 export XEN_SUBVERSION = 17 -export XEN_EXTRAVERSION ?= .5$(XEN_VENDORVERSION) +export XEN_EXTRAVERSION ?= .6$(XEN_VENDORVERSION) export XEN_FULLVERSION = $(XEN_VERSION).$(XEN_SUBVERSION)$(XEN_EXTRAVERSION) -include xen-version -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Mon Dec 15 11:33:06 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 15 Dec 2025 11:33:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1186879.1508294 (Exim 4.92) (envelope-from ) id 1vV6p5-0000Wg-Ej; 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Mon, 15 Dec 2025 11:33:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=UnaRJAHNDiE2VWIdt2MRIJlkcx5YjNh2iRhP+9gSsSQ=; b=o3DQkjD3zK3OGV2BGRhU8T5xaZ aI+nN03xKE5M+xWtqrdr1n2HrhhBCYr6qsfKehPQNebjaPtkshWdaCUr+XSUSeYWGuO3NZlYO8g5p yUgk5JN1hbh1A5kSkoj3JZkgr9Or9eyTEKFIbsEfkywj+ejM5ZODGKnjGEyb7WFdhGD8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/svm: Move asm/hvm/svm/svm.h up one directory Message-Id: Date: Mon, 15 Dec 2025 11:33:01 +0000 commit f28c2f8f7b503a429d183b45ba655cac153b3d51 Author: Andrew Cooper AuthorDate: Fri Dec 12 16:22:31 2025 +0000 Commit: Andrew Cooper CommitDate: Mon Dec 15 11:24:26 2025 +0000 x86/svm: Move asm/hvm/svm/svm.h up one directory ... in preparation to remove the svm/ directory entirely. intr.c doesn't need to include svm.h at all. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/cpu-policy.c | 2 +- xen/arch/x86/domain.c | 2 +- xen/arch/x86/hvm/svm/asid.c | 2 +- xen/arch/x86/hvm/svm/emulate.c | 2 +- xen/arch/x86/hvm/svm/intr.c | 1 - xen/arch/x86/hvm/svm/nestedsvm.c | 2 +- xen/arch/x86/hvm/svm/svm.c | 2 +- xen/arch/x86/hvm/svm/vmcb.c | 2 +- xen/arch/x86/include/asm/hvm/svm.h | 60 ++++++++++++++++++++++++++++++++++ xen/arch/x86/include/asm/hvm/svm/svm.h | 60 ---------------------------------- xen/arch/x86/spec_ctrl.c | 2 +- 11 files changed, 68 insertions(+), 69 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 0a7ef15f72..372d11f2ff 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -9,7 +9,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index b151201809..7632d5e2d6 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -48,7 +48,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/xen/arch/x86/hvm/svm/asid.c b/xen/arch/x86/hvm/svm/asid.c index 0e115243a3..53aa5d0512 100644 --- a/xen/arch/x86/hvm/svm/asid.c +++ b/xen/arch/x86/hvm/svm/asid.c @@ -6,7 +6,7 @@ #include #include -#include +#include #include "svm.h" #include "vmcb.h" diff --git a/xen/arch/x86/hvm/svm/emulate.c b/xen/arch/x86/hvm/svm/emulate.c index d8aa455908..be3a710fa5 100644 --- a/xen/arch/x86/hvm/svm/emulate.c +++ b/xen/arch/x86/hvm/svm/emulate.c @@ -11,7 +11,7 @@ #include #include #include -#include +#include #include #include "svm.h" diff --git a/xen/arch/x86/hvm/svm/intr.c b/xen/arch/x86/hvm/svm/intr.c index 931973a9fa..702c071e89 100644 --- a/xen/arch/x86/hvm/svm/intr.c +++ b/xen/arch/x86/hvm/svm/intr.c @@ -17,7 +17,6 @@ #include #include #include -#include #include /* for nestedhvm_vcpu_in_guestmode */ #include #include diff --git a/xen/arch/x86/hvm/svm/nestedsvm.c b/xen/arch/x86/hvm/svm/nestedsvm.c index 63ed6c86b7..5718ca7f7f 100644 --- a/xen/arch/x86/hvm/svm/nestedsvm.c +++ b/xen/arch/x86/hvm/svm/nestedsvm.c @@ -6,7 +6,7 @@ */ #include -#include +#include #include #include #include /* paging_mode_hap */ diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 15d45cbb57..86a030b02c 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -26,7 +26,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c index 7bde6e98ce..463e527a7d 100644 --- a/xen/arch/x86/hvm/svm/vmcb.c +++ b/xen/arch/x86/hvm/svm/vmcb.c @@ -15,7 +15,7 @@ #include #include -#include +#include #include #include #include diff --git a/xen/arch/x86/include/asm/hvm/svm.h b/xen/arch/x86/include/asm/hvm/svm.h new file mode 100644 index 0000000000..4eeeb25da9 --- /dev/null +++ b/xen/arch/x86/include/asm/hvm/svm.h @@ -0,0 +1,60 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * svm.h: SVM Architecture related definitions + * Copyright (c) 2005, AMD Corporation. + * Copyright (c) 2004, Intel Corporation. + * + */ + +#ifndef __ASM_X86_HVM_SVM_H__ +#define __ASM_X86_HVM_SVM_H__ + +/* + * PV context switch helpers. Prefetching the VMCB area itself has been shown + * to be useful for performance. + * + * Must only be used for NUL FS/GS, as the segment attributes/limits are not + * read from the GDT/LDT. + */ +void svm_load_segs_prefetch(void); +bool svm_load_segs(unsigned int ldt_ents, unsigned long ldt_base, + unsigned long fs_base, unsigned long gs_base, + unsigned long gs_shadow); + +extern u32 svm_feature_flags; + +#define SVM_FEATURE_NPT 0 /* Nested page table support */ +#define SVM_FEATURE_LBRV 1 /* LBR virtualization support */ +#define SVM_FEATURE_SVML 2 /* SVM locking MSR support */ +#define SVM_FEATURE_NRIPS 3 /* Next RIP save on VMEXIT support */ +#define SVM_FEATURE_TSCRATEMSR 4 /* TSC ratio MSR support */ +#define SVM_FEATURE_VMCBCLEAN 5 /* VMCB clean bits support */ +#define SVM_FEATURE_FLUSHBYASID 6 /* TLB flush by ASID support */ +#define SVM_FEATURE_DECODEASSISTS 7 /* Decode assists support */ +#define SVM_FEATURE_PAUSEFILTER 10 /* Pause intercept filter support */ +#define SVM_FEATURE_PAUSETHRESH 12 /* Pause intercept filter support */ +#define SVM_FEATURE_VLOADSAVE 15 /* virtual vmload/vmsave */ +#define SVM_FEATURE_VGIF 16 /* Virtual GIF */ +#define SVM_FEATURE_SSS 19 /* NPT Supervisor Shadow Stacks */ +#define SVM_FEATURE_SPEC_CTRL 20 /* MSR_SPEC_CTRL virtualisation */ + +static inline bool cpu_has_svm_feature(unsigned int feat) +{ + return svm_feature_flags & (1u << feat); +} +#define cpu_has_svm_npt cpu_has_svm_feature(SVM_FEATURE_NPT) +#define cpu_has_svm_lbrv cpu_has_svm_feature(SVM_FEATURE_LBRV) +#define cpu_has_svm_svml cpu_has_svm_feature(SVM_FEATURE_SVML) +#define cpu_has_svm_nrips cpu_has_svm_feature(SVM_FEATURE_NRIPS) +#define cpu_has_svm_cleanbits cpu_has_svm_feature(SVM_FEATURE_VMCBCLEAN) +#define cpu_has_svm_flushbyasid cpu_has_svm_feature(SVM_FEATURE_FLUSHBYASID) +#define cpu_has_svm_decode cpu_has_svm_feature(SVM_FEATURE_DECODEASSISTS) +#define cpu_has_svm_vgif cpu_has_svm_feature(SVM_FEATURE_VGIF) +#define cpu_has_pause_filter cpu_has_svm_feature(SVM_FEATURE_PAUSEFILTER) +#define cpu_has_pause_thresh cpu_has_svm_feature(SVM_FEATURE_PAUSETHRESH) +#define cpu_has_tsc_ratio cpu_has_svm_feature(SVM_FEATURE_TSCRATEMSR) +#define cpu_has_svm_vloadsave cpu_has_svm_feature(SVM_FEATURE_VLOADSAVE) +#define cpu_has_svm_sss cpu_has_svm_feature(SVM_FEATURE_SSS) +#define cpu_has_svm_spec_ctrl cpu_has_svm_feature(SVM_FEATURE_SPEC_CTRL) + +#endif /* __ASM_X86_HVM_SVM_H__ */ diff --git a/xen/arch/x86/include/asm/hvm/svm/svm.h b/xen/arch/x86/include/asm/hvm/svm/svm.h deleted file mode 100644 index 4eeeb25da9..0000000000 --- a/xen/arch/x86/include/asm/hvm/svm/svm.h +++ /dev/null @@ -1,60 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * svm.h: SVM Architecture related definitions - * Copyright (c) 2005, AMD Corporation. - * Copyright (c) 2004, Intel Corporation. - * - */ - -#ifndef __ASM_X86_HVM_SVM_H__ -#define __ASM_X86_HVM_SVM_H__ - -/* - * PV context switch helpers. Prefetching the VMCB area itself has been shown - * to be useful for performance. - * - * Must only be used for NUL FS/GS, as the segment attributes/limits are not - * read from the GDT/LDT. - */ -void svm_load_segs_prefetch(void); -bool svm_load_segs(unsigned int ldt_ents, unsigned long ldt_base, - unsigned long fs_base, unsigned long gs_base, - unsigned long gs_shadow); - -extern u32 svm_feature_flags; - -#define SVM_FEATURE_NPT 0 /* Nested page table support */ -#define SVM_FEATURE_LBRV 1 /* LBR virtualization support */ -#define SVM_FEATURE_SVML 2 /* SVM locking MSR support */ -#define SVM_FEATURE_NRIPS 3 /* Next RIP save on VMEXIT support */ -#define SVM_FEATURE_TSCRATEMSR 4 /* TSC ratio MSR support */ -#define SVM_FEATURE_VMCBCLEAN 5 /* VMCB clean bits support */ -#define SVM_FEATURE_FLUSHBYASID 6 /* TLB flush by ASID support */ -#define SVM_FEATURE_DECODEASSISTS 7 /* Decode assists support */ -#define SVM_FEATURE_PAUSEFILTER 10 /* Pause intercept filter support */ -#define SVM_FEATURE_PAUSETHRESH 12 /* Pause intercept filter support */ -#define SVM_FEATURE_VLOADSAVE 15 /* virtual vmload/vmsave */ -#define SVM_FEATURE_VGIF 16 /* Virtual GIF */ -#define SVM_FEATURE_SSS 19 /* NPT Supervisor Shadow Stacks */ -#define SVM_FEATURE_SPEC_CTRL 20 /* MSR_SPEC_CTRL virtualisation */ - -static inline bool cpu_has_svm_feature(unsigned int feat) -{ - return svm_feature_flags & (1u << feat); -} -#define cpu_has_svm_npt cpu_has_svm_feature(SVM_FEATURE_NPT) -#define cpu_has_svm_lbrv cpu_has_svm_feature(SVM_FEATURE_LBRV) -#define cpu_has_svm_svml cpu_has_svm_feature(SVM_FEATURE_SVML) -#define cpu_has_svm_nrips cpu_has_svm_feature(SVM_FEATURE_NRIPS) -#define cpu_has_svm_cleanbits cpu_has_svm_feature(SVM_FEATURE_VMCBCLEAN) -#define cpu_has_svm_flushbyasid cpu_has_svm_feature(SVM_FEATURE_FLUSHBYASID) -#define cpu_has_svm_decode cpu_has_svm_feature(SVM_FEATURE_DECODEASSISTS) -#define cpu_has_svm_vgif cpu_has_svm_feature(SVM_FEATURE_VGIF) -#define cpu_has_pause_filter cpu_has_svm_feature(SVM_FEATURE_PAUSEFILTER) -#define cpu_has_pause_thresh cpu_has_svm_feature(SVM_FEATURE_PAUSETHRESH) -#define cpu_has_tsc_ratio cpu_has_svm_feature(SVM_FEATURE_TSCRATEMSR) -#define cpu_has_svm_vloadsave cpu_has_svm_feature(SVM_FEATURE_VLOADSAVE) -#define cpu_has_svm_sss cpu_has_svm_feature(SVM_FEATURE_SSS) -#define cpu_has_svm_spec_ctrl cpu_has_svm_feature(SVM_FEATURE_SPEC_CTRL) - -#endif /* __ASM_X86_HVM_SVM_H__ */ diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index e71f62c601..dd0413e1fc 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -11,7 +11,7 @@ #include #include -#include +#include #include #include #include -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Mon Dec 15 11:33:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 15 Dec 2025 11:33:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1186880.1508298 (Exim 4.92) (envelope-from ) id 1vV6pF-0000Yn-GD; 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Mon, 15 Dec 2025 11:33:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ZKL4NGYoRaI2DvJuBWuPxNjteTTCmInugGe5yd/tjb4=; b=TCpgMq5popzGCL6uNfibSe9S+e CnQ1P9oAOFLfL/wrmQvOYtazkB/9RAVnMUfq2aaMvgTTZ3BF9Rby3IZc770gM5/rGapPC58v7Oa0a U1KvJ6JD/El4Acs/c5jZPjD9LoKKOSM1V03IHatk6iO9PbHCkCImLB51eDLV1aPqBK3I=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/svm: Move svm_intercept_msr() into svm.h Message-Id: Date: Mon, 15 Dec 2025 11:33:12 +0000 commit f1e2c3f377d180e5454c04bd832aaef19de37974 Author: Andrew Cooper AuthorDate: Fri Dec 12 17:04:45 2025 +0000 Commit: Andrew Cooper CommitDate: Mon Dec 15 11:24:26 2025 +0000 x86/svm: Move svm_intercept_msr() into svm.h The single user of svm_intercept_msr() outside of the main svm logic is in vpmu_amd.c. Currently the declaration is picked up transitively through xen/sched.h, so include asm/hvm/svm.h explicitly. Sort the headers while doing so. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/cpu/vpmu_amd.c | 5 ++++- xen/arch/x86/include/asm/hvm/svm.h | 8 ++++++++ xen/arch/x86/include/asm/hvm/svm/vmcb.h | 8 -------- 3 files changed, 12 insertions(+), 9 deletions(-) diff --git a/xen/arch/x86/cpu/vpmu_amd.c b/xen/arch/x86/cpu/vpmu_amd.c index a6117dfebf..fa157d45dd 100644 --- a/xen/arch/x86/cpu/vpmu_amd.c +++ b/xen/arch/x86/cpu/vpmu_amd.c @@ -13,10 +13,13 @@ #include #include #include + #include -#include #include +#include #include +#include + #include #define MSR_F10H_EVNTSEL_GO_SHIFT 40 diff --git a/xen/arch/x86/include/asm/hvm/svm.h b/xen/arch/x86/include/asm/hvm/svm.h index 4eeeb25da9..a6d7e4aed3 100644 --- a/xen/arch/x86/include/asm/hvm/svm.h +++ b/xen/arch/x86/include/asm/hvm/svm.h @@ -57,4 +57,12 @@ static inline bool cpu_has_svm_feature(unsigned int feat) #define cpu_has_svm_sss cpu_has_svm_feature(SVM_FEATURE_SSS) #define cpu_has_svm_spec_ctrl cpu_has_svm_feature(SVM_FEATURE_SPEC_CTRL) +#define MSR_INTERCEPT_NONE 0 +#define MSR_INTERCEPT_READ 1 +#define MSR_INTERCEPT_WRITE 2 +#define MSR_INTERCEPT_RW (MSR_INTERCEPT_WRITE | MSR_INTERCEPT_READ) +void svm_intercept_msr(struct vcpu *v, uint32_t msr, int flags); +#define svm_disable_intercept_for_msr(v, msr) svm_intercept_msr((v), (msr), MSR_INTERCEPT_NONE) +#define svm_enable_intercept_for_msr(v, msr) svm_intercept_msr((v), (msr), MSR_INTERCEPT_RW) + #endif /* __ASM_X86_HVM_SVM_H__ */ diff --git a/xen/arch/x86/include/asm/hvm/svm/vmcb.h b/xen/arch/x86/include/asm/hvm/svm/vmcb.h index 41bcc9f0d8..d1e200df56 100644 --- a/xen/arch/x86/include/asm/hvm/svm/vmcb.h +++ b/xen/arch/x86/include/asm/hvm/svm/vmcb.h @@ -42,14 +42,6 @@ struct svm_vcpu { uint64_t guest_sysenter_eip; }; -#define MSR_INTERCEPT_NONE 0 -#define MSR_INTERCEPT_READ 1 -#define MSR_INTERCEPT_WRITE 2 -#define MSR_INTERCEPT_RW (MSR_INTERCEPT_WRITE | MSR_INTERCEPT_READ) -void svm_intercept_msr(struct vcpu *v, uint32_t msr, int flags); -#define svm_disable_intercept_for_msr(v, msr) svm_intercept_msr((v), (msr), MSR_INTERCEPT_NONE) -#define svm_enable_intercept_for_msr(v, msr) svm_intercept_msr((v), (msr), MSR_INTERCEPT_RW) - #endif /* ASM_X86_HVM_SVM_VMCS_H__ */ /* -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Mon Dec 15 11:33:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 15 Dec 2025 11:33:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1186881.1508301 (Exim 4.92) (envelope-from ) id 1vV6pP-0000au-IB; Mon, 15 Dec 2025 11:33:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1186881.1508301; Mon, 15 Dec 2025 11:33:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vV6pP-0000al-FB; Mon, 15 Dec 2025 11:33:23 +0000 Received: by outflank-mailman (input) for mailman id 1186881; Mon, 15 Dec 2025 11:33:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vV6pO-0000ad-8V for xen-changelog@lists.xenproject.org; Mon, 15 Dec 2025 11:33:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vV6pN-00B5Rq-33 for xen-changelog@lists.xenproject.org; Mon, 15 Dec 2025 11:33:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vV6pO-00A62I-0b for xen-changelog@lists.xenproject.org; Mon, 15 Dec 2025 11:33:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=RUuDgk03aZNB/l3QcedunlfEQ63y775yZl9N6XtRKK8=; b=wNh8YqDRxlmaPOfMKf9o25yj+b 7Dra2zL+GsMT9JpXE21oCtnU9BIpGuowK3kmyLj7+R18SRutTioItwWITFi7VorOJziuieP47b5lB i7N7ELjoB9bsRQ0vpHI52XQlJipS8Loux2DYyKE5QfVqF7BB5LA3e+7pWOK115KhVxJA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/svm: Introduce svm-types.h Message-Id: Date: Mon, 15 Dec 2025 11:33:22 +0000 commit a336c18037ece89bceb70696099a5aa03b23c131 Author: Andrew Cooper AuthorDate: Fri Dec 12 16:28:18 2025 +0000 Commit: Andrew Cooper CommitDate: Mon Dec 15 11:24:26 2025 +0000 x86/svm: Introduce svm-types.h In order to reduce the header tangle around xen/sched.h, we need to split types away from other declarations. Introduce a new hvm/svm-types.h to do this, including it from hvm/domain.h and hvm/vcpu.h, and dropping all other inclusions of svm/vmcb.h and svm/nestedhvm.h No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/hvm/svm/emulate.c | 1 - xen/arch/x86/hvm/svm/nestedsvm.c | 1 - xen/arch/x86/hvm/svm/svm.c | 1 - xen/arch/x86/hvm/svm/vmcb.c | 1 - xen/arch/x86/include/asm/hvm/domain.h | 2 +- xen/arch/x86/include/asm/hvm/svm-types.h | 11 +++++++++++ xen/arch/x86/include/asm/hvm/vcpu.h | 3 +-- 7 files changed, 13 insertions(+), 7 deletions(-) diff --git a/xen/arch/x86/hvm/svm/emulate.c b/xen/arch/x86/hvm/svm/emulate.c index be3a710fa5..1f5436c8ea 100644 --- a/xen/arch/x86/hvm/svm/emulate.c +++ b/xen/arch/x86/hvm/svm/emulate.c @@ -12,7 +12,6 @@ #include #include #include -#include #include "svm.h" #include "vmcb.h" diff --git a/xen/arch/x86/hvm/svm/nestedsvm.c b/xen/arch/x86/hvm/svm/nestedsvm.c index 5718ca7f7f..a63ec61346 100644 --- a/xen/arch/x86/hvm/svm/nestedsvm.c +++ b/xen/arch/x86/hvm/svm/nestedsvm.c @@ -7,7 +7,6 @@ #include #include -#include #include #include /* paging_mode_hap */ #include /* for local_event_delivery_(en|dis)able */ diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 86a030b02c..1208999454 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -27,7 +27,6 @@ #include #include #include -#include #include #include #include diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c index 463e527a7d..cbee10d046 100644 --- a/xen/arch/x86/hvm/svm/vmcb.c +++ b/xen/arch/x86/hvm/svm/vmcb.c @@ -16,7 +16,6 @@ #include #include -#include #include #include #include diff --git a/xen/arch/x86/include/asm/hvm/domain.h b/xen/arch/x86/include/asm/hvm/domain.h index 83be2bd1c2..be1a0d8c5b 100644 --- a/xen/arch/x86/include/asm/hvm/domain.h +++ b/xen/arch/x86/include/asm/hvm/domain.h @@ -15,7 +15,7 @@ #include #include -#include +#include #ifdef CONFIG_MEM_SHARING struct mem_sharing_domain diff --git a/xen/arch/x86/include/asm/hvm/svm-types.h b/xen/arch/x86/include/asm/hvm/svm-types.h new file mode 100644 index 0000000000..1c26daa981 --- /dev/null +++ b/xen/arch/x86/include/asm/hvm/svm-types.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * SVM types needed to form struct domain/vcpu. + */ +#ifndef X86_SVM_TYPES_H +#define X86_SVM_TYPES_H + +#include +#include + +#endif /* X86_SVM_TYPES_H */ diff --git a/xen/arch/x86/include/asm/hvm/vcpu.h b/xen/arch/x86/include/asm/hvm/vcpu.h index eae9ac5376..836138a4a6 100644 --- a/xen/arch/x86/include/asm/hvm/vcpu.h +++ b/xen/arch/x86/include/asm/hvm/vcpu.h @@ -12,8 +12,7 @@ #include #include #include -#include -#include +#include #include #include -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Mon Dec 15 11:33:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 15 Dec 2025 11:33:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1186882.1508306 (Exim 4.92) (envelope-from ) id 1vV6pZ-0000dg-Kr; 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Mon, 15 Dec 2025 11:33:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=UJc3GQqjmE0zff6u09mppncN07q9/0/LTae9ErVGNs0=; b=Mtu0MuvUMYy/RtD3AV2gXTHwh1 IgQuGB0LjarnoJD4wAxVmKIY1nslQ/8j19TtfHqZzttpI8sTVl67+eZ1CChjyCotDz7CogpCPmVQ7 zbrYqIuTzNj1ovOPOgRLlriIbNUu6wNwyH7qduxASqTXFrrGp4XHmQkxmscMUiq30xGI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/svm: Merge nestedsvm.h into svm-types.h Message-Id: Date: Mon, 15 Dec 2025 11:33:32 +0000 commit ada965a47a885ee74b9d9694778c166aa4859ea6 Author: Andrew Cooper AuthorDate: Fri Dec 12 18:23:29 2025 +0000 Commit: Andrew Cooper CommitDate: Mon Dec 15 11:24:26 2025 +0000 x86/svm: Merge nestedsvm.h into svm-types.h While doing so, move the ns_gif field to beside ns_hap_enabled to remove 7 padding bytes, and make some style fixes to comments/etc. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/include/asm/hvm/svm-types.h | 66 ++++++++++++++++++++++- xen/arch/x86/include/asm/hvm/svm/nestedsvm.h | 79 ---------------------------- 2 files changed, 65 insertions(+), 80 deletions(-) diff --git a/xen/arch/x86/include/asm/hvm/svm-types.h b/xen/arch/x86/include/asm/hvm/svm-types.h index 1c26daa981..637b94fa37 100644 --- a/xen/arch/x86/include/asm/hvm/svm-types.h +++ b/xen/arch/x86/include/asm/hvm/svm-types.h @@ -5,7 +5,71 @@ #ifndef X86_SVM_TYPES_H #define X86_SVM_TYPES_H +#include + #include -#include + +struct nestedsvm { + uint64_t ns_msr_hsavepa; /* MSR HSAVE_PA value */ + + /* + * l1 guest physical address of virtual vmcb used by prior VMRUN. Needed + * for VMCB Cleanbit emulation. + */ + uint64_t ns_ovvmcb_pa; + + /* Cached real intercepts of the l2 guest */ + uint32_t ns_cr_intercepts; + uint32_t ns_dr_intercepts; + uint32_t ns_exception_intercepts; + uint32_t ns_general1_intercepts; + uint32_t ns_general2_intercepts; + + /* Cached real MSR permission bitmaps of the l2 guest */ + unsigned long *ns_cached_msrpm; + /* Merged MSR permission bitmap */ + unsigned long *ns_merged_msrpm; + + /* guest physical address of virtual io permission map */ + paddr_t ns_iomap_pa, ns_oiomap_pa; + /* Shadow io permission map */ + unsigned long *ns_iomap; + + /* + * Cached guest_cr[0] of l1 guest while l2 guest runs. Needed to handle + * FPU context switching. + */ + uint64_t ns_cr0; + + /* + * Cache guest cr3/host cr3 the guest sets up for the l2 guest. + * Used by Shadow-on-Shadow and Nested-on-Nested. + * ns_vmcb_guestcr3: in l2 guest physical address space and points to + * the l2 guest page table + * ns_vmcb_hostcr3: in l1 guest physical address space and points to + * the l1 guest nested page table + */ + uint64_t ns_vmcb_guestcr3, ns_vmcb_hostcr3; + uint32_t ns_asid; + + bool ns_gif; + bool ns_hap_enabled; + + /* Only meaningful when vmexit_pending flag is set */ + struct { + uint64_t exitcode; /* native exitcode to inject into l1 guest */ + uint64_t exitinfo1; /* additional information to the exitcode */ + uint64_t exitinfo2; /* additional information to the exitcode */ + } ns_vmexit; + + union { + uint32_t bytes; + struct { + uint32_t rflagsif:1; + uint32_t vintrmask:1; + uint32_t reserved:30; + } fields; + } ns_hostflags; +}; #endif /* X86_SVM_TYPES_H */ diff --git a/xen/arch/x86/include/asm/hvm/svm/nestedsvm.h b/xen/arch/x86/include/asm/hvm/svm/nestedsvm.h deleted file mode 100644 index 205989e800..0000000000 --- a/xen/arch/x86/include/asm/hvm/svm/nestedsvm.h +++ /dev/null @@ -1,79 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * nestedsvm.h: Nested Virtualization - * Copyright (c) 2011, Advanced Micro Devices, Inc - * - */ -#ifndef __ASM_X86_HVM_SVM_NESTEDSVM_H__ -#define __ASM_X86_HVM_SVM_NESTEDSVM_H__ - -#include - -struct nestedsvm { - bool ns_gif; - uint64_t ns_msr_hsavepa; /* MSR HSAVE_PA value */ - - /* l1 guest physical address of virtual vmcb used by prior VMRUN. - * Needed for VMCB Cleanbit emulation. - */ - uint64_t ns_ovvmcb_pa; - - /* Cached real intercepts of the l2 guest */ - uint32_t ns_cr_intercepts; - uint32_t ns_dr_intercepts; - uint32_t ns_exception_intercepts; - uint32_t ns_general1_intercepts; - uint32_t ns_general2_intercepts; - - /* Cached real MSR permission bitmaps of the l2 guest */ - unsigned long *ns_cached_msrpm; - /* Merged MSR permission bitmap */ - unsigned long *ns_merged_msrpm; - - /* guest physical address of virtual io permission map */ - paddr_t ns_iomap_pa, ns_oiomap_pa; - /* Shadow io permission map */ - unsigned long *ns_iomap; - - uint64_t ns_cr0; /* Cached guest_cr[0] of l1 guest while l2 guest runs. - * Needed to handle FPU context switching */ - - /* Cache guest cr3/host cr3 the guest sets up for the l2 guest. - * Used by Shadow-on-Shadow and Nested-on-Nested. - * ns_vmcb_guestcr3: in l2 guest physical address space and points to - * the l2 guest page table - * ns_vmcb_hostcr3: in l1 guest physical address space and points to - * the l1 guest nested page table - */ - uint64_t ns_vmcb_guestcr3, ns_vmcb_hostcr3; - uint32_t ns_asid; - - bool ns_hap_enabled; - - /* Only meaningful when vmexit_pending flag is set */ - struct { - uint64_t exitcode; /* native exitcode to inject into l1 guest */ - uint64_t exitinfo1; /* additional information to the exitcode */ - uint64_t exitinfo2; /* additional information to the exitcode */ - } ns_vmexit; - union { - uint32_t bytes; - struct { - uint32_t rflagsif: 1; - uint32_t vintrmask: 1; - uint32_t reserved: 30; - } fields; - } ns_hostflags; -}; - -#endif /* ASM_X86_HVM_SVM_NESTEDSVM_H__ */ - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * tab-width: 4 - * indent-tabs-mode: nil - * End: - */ -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Mon Dec 15 11:33:43 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 15 Dec 2025 11:33:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1186883.1508310 (Exim 4.92) (envelope-from ) id 1vV6pj-0000fj-M7; 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Mon, 15 Dec 2025 11:33:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=fFJM1/QZRTj2iw/q+fwKejXf9muiccSeeCebASNkj3k=; b=mX3Z6b2g4Z2BQWiQbZgM+7ArcU hLFOpPvMrraXPr8jWGHolsKNp7kmb+BacNf2Kf8hHDtjIt+nkfjVeovxHZs5SBo8QHWEmkGbxxDTz mQ1QJaA5KxFbcaRgxXdYJYJBDayIhDk71J+4mdjdZ3ALNPTotmR3yVVdBHlb9O9UoOCY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/svm: Merge vmcb.h into svm-types.h Message-Id: Date: Mon, 15 Dec 2025 11:33:42 +0000 commit fb01f69edb3bffd2feb05b0abd034ec89910b039 Author: Andrew Cooper AuthorDate: Fri Dec 12 16:24:22 2025 +0000 Commit: Andrew Cooper CommitDate: Mon Dec 15 11:24:26 2025 +0000 x86/svm: Merge vmcb.h into svm-types.h While doing so, make some style fixes to comments/etc. This removes the include/asm/hvm/svm/ subdirectory. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/include/asm/hvm/svm-types.h | 32 ++++++++++++++++++- xen/arch/x86/include/asm/hvm/svm/vmcb.h | 55 -------------------------------- 2 files changed, 31 insertions(+), 56 deletions(-) diff --git a/xen/arch/x86/include/asm/hvm/svm-types.h b/xen/arch/x86/include/asm/hvm/svm-types.h index 637b94fa37..051b235d8f 100644 --- a/xen/arch/x86/include/asm/hvm/svm-types.h +++ b/xen/arch/x86/include/asm/hvm/svm-types.h @@ -7,7 +7,37 @@ #include -#include +struct svm_domain { + union { + uint64_t raw[2]; + struct { + uint64_t length; + uint64_t status; + }; + } osvw; +}; + +struct svm_vcpu { + struct vmcb_struct *vmcb; + unsigned long *msrpm; + uint64_t vmcb_pa; + int launch_core; + + uint8_t vmcb_sync_state; /* enum vmcb_sync_state */ + + /* VMCB has a cached instruction from #PF/#NPF Decode Assist? */ + uint8_t cached_insn_len; /* Zero if no cached instruction. */ + + /* + * Upper four bytes are undefined in the VMCB, therefore we can't use the + * fields in the VMCB. Write a 64bit value and then read a 64bit value is + * fine unless there's a VMRUN/VMEXIT in between which clears the upper + * four bytes. + */ + uint64_t guest_sysenter_cs; + uint64_t guest_sysenter_esp; + uint64_t guest_sysenter_eip; +}; struct nestedsvm { uint64_t ns_msr_hsavepa; /* MSR HSAVE_PA value */ diff --git a/xen/arch/x86/include/asm/hvm/svm/vmcb.h b/xen/arch/x86/include/asm/hvm/svm/vmcb.h deleted file mode 100644 index d1e200df56..0000000000 --- a/xen/arch/x86/include/asm/hvm/svm/vmcb.h +++ /dev/null @@ -1,55 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * vmcb.h: VMCB related definitions - * Copyright (c) 2005-2007, Advanced Micro Devices, Inc - * Copyright (c) 2004, Intel Corporation. - * - */ -#ifndef __ASM_X86_HVM_SVM_VMCB_H__ -#define __ASM_X86_HVM_SVM_VMCB_H__ - -#include - -struct svm_domain { - /* OSVW MSRs */ - union { - uint64_t raw[2]; - struct { - uint64_t length; - uint64_t status; - }; - } osvw; -}; - -struct svm_vcpu { - struct vmcb_struct *vmcb; - u64 vmcb_pa; - unsigned long *msrpm; - int launch_core; - - uint8_t vmcb_sync_state; /* enum vmcb_sync_state */ - - /* VMCB has a cached instruction from #PF/#NPF Decode Assist? */ - uint8_t cached_insn_len; /* Zero if no cached instruction. */ - - /* Upper four bytes are undefined in the VMCB, therefore we can't - * use the fields in the VMCB. Write a 64bit value and then read a 64bit - * value is fine unless there's a VMRUN/VMEXIT in between which clears - * the upper four bytes. - */ - uint64_t guest_sysenter_cs; - uint64_t guest_sysenter_esp; - uint64_t guest_sysenter_eip; -}; - -#endif /* ASM_X86_HVM_SVM_VMCS_H__ */ - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * tab-width: 4 - * indent-tabs-mode: nil - * End: - */ -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Mon Dec 15 12:33:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 15 Dec 2025 12:33:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1186956.1508364 (Exim 4.92) (envelope-from ) id 1vV7l9-00030i-R7; Mon, 15 Dec 2025 12:33:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1186956.1508364; Mon, 15 Dec 2025 12:33:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vV7l9-00030a-OD; Mon, 15 Dec 2025 12:33:03 +0000 Received: by outflank-mailman (input) for mailman id 1186956; Mon, 15 Dec 2025 12:33:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vV7l8-00030U-7F for xen-changelog@lists.xenproject.org; Mon, 15 Dec 2025 12:33:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vV7l7-00B6Xn-2t for xen-changelog@lists.xenproject.org; Mon, 15 Dec 2025 12:33:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vV7l8-00GY5C-0Q for xen-changelog@lists.xenproject.org; Mon, 15 Dec 2025 12:33:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=CsE/JFoOSx5sAPcEnc99ZkZ3+vIPhhE17CN26YT/oXo=; b=WcT/p4N5JWFUaDJUW1lhLHrjzh QIVsMlNBjZJjNov+XGFwJ0bluTr+JjcpXnjY0gIZZZ4YtpB9XxMKBDqd3pUb3qXZ2lwMzbFgc407S r84NImsJ26/eUtPV6i/fSPZNeAzM2FHe49aQ3xtOPRElJbolMlD42Iso7QU9Trj2xNRI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/svm: Move asm/hvm/svm/svm.h up one directory Message-Id: Date: Mon, 15 Dec 2025 12:33:02 +0000 commit f28c2f8f7b503a429d183b45ba655cac153b3d51 Author: Andrew Cooper AuthorDate: Fri Dec 12 16:22:31 2025 +0000 Commit: Andrew Cooper CommitDate: Mon Dec 15 11:24:26 2025 +0000 x86/svm: Move asm/hvm/svm/svm.h up one directory ... in preparation to remove the svm/ directory entirely. intr.c doesn't need to include svm.h at all. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/cpu-policy.c | 2 +- xen/arch/x86/domain.c | 2 +- xen/arch/x86/hvm/svm/asid.c | 2 +- xen/arch/x86/hvm/svm/emulate.c | 2 +- xen/arch/x86/hvm/svm/intr.c | 1 - xen/arch/x86/hvm/svm/nestedsvm.c | 2 +- xen/arch/x86/hvm/svm/svm.c | 2 +- xen/arch/x86/hvm/svm/vmcb.c | 2 +- xen/arch/x86/include/asm/hvm/svm.h | 60 ++++++++++++++++++++++++++++++++++ xen/arch/x86/include/asm/hvm/svm/svm.h | 60 ---------------------------------- xen/arch/x86/spec_ctrl.c | 2 +- 11 files changed, 68 insertions(+), 69 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 0a7ef15f72..372d11f2ff 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -9,7 +9,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index b151201809..7632d5e2d6 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -48,7 +48,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/xen/arch/x86/hvm/svm/asid.c b/xen/arch/x86/hvm/svm/asid.c index 0e115243a3..53aa5d0512 100644 --- a/xen/arch/x86/hvm/svm/asid.c +++ b/xen/arch/x86/hvm/svm/asid.c @@ -6,7 +6,7 @@ #include #include -#include +#include #include "svm.h" #include "vmcb.h" diff --git a/xen/arch/x86/hvm/svm/emulate.c b/xen/arch/x86/hvm/svm/emulate.c index d8aa455908..be3a710fa5 100644 --- a/xen/arch/x86/hvm/svm/emulate.c +++ b/xen/arch/x86/hvm/svm/emulate.c @@ -11,7 +11,7 @@ #include #include #include -#include +#include #include #include "svm.h" diff --git a/xen/arch/x86/hvm/svm/intr.c b/xen/arch/x86/hvm/svm/intr.c index 931973a9fa..702c071e89 100644 --- a/xen/arch/x86/hvm/svm/intr.c +++ b/xen/arch/x86/hvm/svm/intr.c @@ -17,7 +17,6 @@ #include #include #include -#include #include /* for nestedhvm_vcpu_in_guestmode */ #include #include diff --git a/xen/arch/x86/hvm/svm/nestedsvm.c b/xen/arch/x86/hvm/svm/nestedsvm.c index 63ed6c86b7..5718ca7f7f 100644 --- a/xen/arch/x86/hvm/svm/nestedsvm.c +++ b/xen/arch/x86/hvm/svm/nestedsvm.c @@ -6,7 +6,7 @@ */ #include -#include +#include #include #include #include /* paging_mode_hap */ diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 15d45cbb57..86a030b02c 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -26,7 +26,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c index 7bde6e98ce..463e527a7d 100644 --- a/xen/arch/x86/hvm/svm/vmcb.c +++ b/xen/arch/x86/hvm/svm/vmcb.c @@ -15,7 +15,7 @@ #include #include -#include +#include #include #include #include diff --git a/xen/arch/x86/include/asm/hvm/svm.h b/xen/arch/x86/include/asm/hvm/svm.h new file mode 100644 index 0000000000..4eeeb25da9 --- /dev/null +++ b/xen/arch/x86/include/asm/hvm/svm.h @@ -0,0 +1,60 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * svm.h: SVM Architecture related definitions + * Copyright (c) 2005, AMD Corporation. + * Copyright (c) 2004, Intel Corporation. + * + */ + +#ifndef __ASM_X86_HVM_SVM_H__ +#define __ASM_X86_HVM_SVM_H__ + +/* + * PV context switch helpers. Prefetching the VMCB area itself has been shown + * to be useful for performance. + * + * Must only be used for NUL FS/GS, as the segment attributes/limits are not + * read from the GDT/LDT. + */ +void svm_load_segs_prefetch(void); +bool svm_load_segs(unsigned int ldt_ents, unsigned long ldt_base, + unsigned long fs_base, unsigned long gs_base, + unsigned long gs_shadow); + +extern u32 svm_feature_flags; + +#define SVM_FEATURE_NPT 0 /* Nested page table support */ +#define SVM_FEATURE_LBRV 1 /* LBR virtualization support */ +#define SVM_FEATURE_SVML 2 /* SVM locking MSR support */ +#define SVM_FEATURE_NRIPS 3 /* Next RIP save on VMEXIT support */ +#define SVM_FEATURE_TSCRATEMSR 4 /* TSC ratio MSR support */ +#define SVM_FEATURE_VMCBCLEAN 5 /* VMCB clean bits support */ +#define SVM_FEATURE_FLUSHBYASID 6 /* TLB flush by ASID support */ +#define SVM_FEATURE_DECODEASSISTS 7 /* Decode assists support */ +#define SVM_FEATURE_PAUSEFILTER 10 /* Pause intercept filter support */ +#define SVM_FEATURE_PAUSETHRESH 12 /* Pause intercept filter support */ +#define SVM_FEATURE_VLOADSAVE 15 /* virtual vmload/vmsave */ +#define SVM_FEATURE_VGIF 16 /* Virtual GIF */ +#define SVM_FEATURE_SSS 19 /* NPT Supervisor Shadow Stacks */ +#define SVM_FEATURE_SPEC_CTRL 20 /* MSR_SPEC_CTRL virtualisation */ + +static inline bool cpu_has_svm_feature(unsigned int feat) +{ + return svm_feature_flags & (1u << feat); +} +#define cpu_has_svm_npt cpu_has_svm_feature(SVM_FEATURE_NPT) +#define cpu_has_svm_lbrv cpu_has_svm_feature(SVM_FEATURE_LBRV) +#define cpu_has_svm_svml cpu_has_svm_feature(SVM_FEATURE_SVML) +#define cpu_has_svm_nrips cpu_has_svm_feature(SVM_FEATURE_NRIPS) +#define cpu_has_svm_cleanbits cpu_has_svm_feature(SVM_FEATURE_VMCBCLEAN) +#define cpu_has_svm_flushbyasid cpu_has_svm_feature(SVM_FEATURE_FLUSHBYASID) +#define cpu_has_svm_decode cpu_has_svm_feature(SVM_FEATURE_DECODEASSISTS) +#define cpu_has_svm_vgif cpu_has_svm_feature(SVM_FEATURE_VGIF) +#define cpu_has_pause_filter cpu_has_svm_feature(SVM_FEATURE_PAUSEFILTER) +#define cpu_has_pause_thresh cpu_has_svm_feature(SVM_FEATURE_PAUSETHRESH) +#define cpu_has_tsc_ratio cpu_has_svm_feature(SVM_FEATURE_TSCRATEMSR) +#define cpu_has_svm_vloadsave cpu_has_svm_feature(SVM_FEATURE_VLOADSAVE) +#define cpu_has_svm_sss cpu_has_svm_feature(SVM_FEATURE_SSS) +#define cpu_has_svm_spec_ctrl cpu_has_svm_feature(SVM_FEATURE_SPEC_CTRL) + +#endif /* __ASM_X86_HVM_SVM_H__ */ diff --git a/xen/arch/x86/include/asm/hvm/svm/svm.h b/xen/arch/x86/include/asm/hvm/svm/svm.h deleted file mode 100644 index 4eeeb25da9..0000000000 --- a/xen/arch/x86/include/asm/hvm/svm/svm.h +++ /dev/null @@ -1,60 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * svm.h: SVM Architecture related definitions - * Copyright (c) 2005, AMD Corporation. - * Copyright (c) 2004, Intel Corporation. - * - */ - -#ifndef __ASM_X86_HVM_SVM_H__ -#define __ASM_X86_HVM_SVM_H__ - -/* - * PV context switch helpers. Prefetching the VMCB area itself has been shown - * to be useful for performance. - * - * Must only be used for NUL FS/GS, as the segment attributes/limits are not - * read from the GDT/LDT. - */ -void svm_load_segs_prefetch(void); -bool svm_load_segs(unsigned int ldt_ents, unsigned long ldt_base, - unsigned long fs_base, unsigned long gs_base, - unsigned long gs_shadow); - -extern u32 svm_feature_flags; - -#define SVM_FEATURE_NPT 0 /* Nested page table support */ -#define SVM_FEATURE_LBRV 1 /* LBR virtualization support */ -#define SVM_FEATURE_SVML 2 /* SVM locking MSR support */ -#define SVM_FEATURE_NRIPS 3 /* Next RIP save on VMEXIT support */ -#define SVM_FEATURE_TSCRATEMSR 4 /* TSC ratio MSR support */ -#define SVM_FEATURE_VMCBCLEAN 5 /* VMCB clean bits support */ -#define SVM_FEATURE_FLUSHBYASID 6 /* TLB flush by ASID support */ -#define SVM_FEATURE_DECODEASSISTS 7 /* Decode assists support */ -#define SVM_FEATURE_PAUSEFILTER 10 /* Pause intercept filter support */ -#define SVM_FEATURE_PAUSETHRESH 12 /* Pause intercept filter support */ -#define SVM_FEATURE_VLOADSAVE 15 /* virtual vmload/vmsave */ -#define SVM_FEATURE_VGIF 16 /* Virtual GIF */ -#define SVM_FEATURE_SSS 19 /* NPT Supervisor Shadow Stacks */ -#define SVM_FEATURE_SPEC_CTRL 20 /* MSR_SPEC_CTRL virtualisation */ - -static inline bool cpu_has_svm_feature(unsigned int feat) -{ - return svm_feature_flags & (1u << feat); -} -#define cpu_has_svm_npt cpu_has_svm_feature(SVM_FEATURE_NPT) -#define cpu_has_svm_lbrv cpu_has_svm_feature(SVM_FEATURE_LBRV) -#define cpu_has_svm_svml cpu_has_svm_feature(SVM_FEATURE_SVML) -#define cpu_has_svm_nrips cpu_has_svm_feature(SVM_FEATURE_NRIPS) -#define cpu_has_svm_cleanbits cpu_has_svm_feature(SVM_FEATURE_VMCBCLEAN) -#define cpu_has_svm_flushbyasid cpu_has_svm_feature(SVM_FEATURE_FLUSHBYASID) -#define cpu_has_svm_decode cpu_has_svm_feature(SVM_FEATURE_DECODEASSISTS) -#define cpu_has_svm_vgif cpu_has_svm_feature(SVM_FEATURE_VGIF) -#define cpu_has_pause_filter cpu_has_svm_feature(SVM_FEATURE_PAUSEFILTER) -#define cpu_has_pause_thresh cpu_has_svm_feature(SVM_FEATURE_PAUSETHRESH) -#define cpu_has_tsc_ratio cpu_has_svm_feature(SVM_FEATURE_TSCRATEMSR) -#define cpu_has_svm_vloadsave cpu_has_svm_feature(SVM_FEATURE_VLOADSAVE) -#define cpu_has_svm_sss cpu_has_svm_feature(SVM_FEATURE_SSS) -#define cpu_has_svm_spec_ctrl cpu_has_svm_feature(SVM_FEATURE_SPEC_CTRL) - -#endif /* __ASM_X86_HVM_SVM_H__ */ diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index e71f62c601..dd0413e1fc 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -11,7 +11,7 @@ #include #include -#include +#include #include #include #include -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Mon Dec 15 12:33:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 15 Dec 2025 12:33:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1186957.1508367 (Exim 4.92) (envelope-from ) id 1vV7lJ-00032d-SA; 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Mon, 15 Dec 2025 12:33:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=51xSXgk5SXRJRVbooSvCNd+NBtnsCcXDSKaydCqTWCc=; b=tNyFQe78Av5xh30lbDXk+x8ii5 lF4+73rPBdp2Ft9ZnB3bRw03JnuFRJTSl8HDXAkm8M4m0PORa6zUnYWytWPjeSwjhAIKfmA7HVLUv 2jlFkc3O8c0sUPfxetk//jrWFVQqDWEPBKN/AoNDZf3tab+CLxY57G33/1CHlUN1E+Hw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/svm: Move svm_intercept_msr() into svm.h Message-Id: Date: Mon, 15 Dec 2025 12:33:12 +0000 commit f1e2c3f377d180e5454c04bd832aaef19de37974 Author: Andrew Cooper AuthorDate: Fri Dec 12 17:04:45 2025 +0000 Commit: Andrew Cooper CommitDate: Mon Dec 15 11:24:26 2025 +0000 x86/svm: Move svm_intercept_msr() into svm.h The single user of svm_intercept_msr() outside of the main svm logic is in vpmu_amd.c. Currently the declaration is picked up transitively through xen/sched.h, so include asm/hvm/svm.h explicitly. Sort the headers while doing so. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/cpu/vpmu_amd.c | 5 ++++- xen/arch/x86/include/asm/hvm/svm.h | 8 ++++++++ xen/arch/x86/include/asm/hvm/svm/vmcb.h | 8 -------- 3 files changed, 12 insertions(+), 9 deletions(-) diff --git a/xen/arch/x86/cpu/vpmu_amd.c b/xen/arch/x86/cpu/vpmu_amd.c index a6117dfebf..fa157d45dd 100644 --- a/xen/arch/x86/cpu/vpmu_amd.c +++ b/xen/arch/x86/cpu/vpmu_amd.c @@ -13,10 +13,13 @@ #include #include #include + #include -#include #include +#include #include +#include + #include #define MSR_F10H_EVNTSEL_GO_SHIFT 40 diff --git a/xen/arch/x86/include/asm/hvm/svm.h b/xen/arch/x86/include/asm/hvm/svm.h index 4eeeb25da9..a6d7e4aed3 100644 --- a/xen/arch/x86/include/asm/hvm/svm.h +++ b/xen/arch/x86/include/asm/hvm/svm.h @@ -57,4 +57,12 @@ static inline bool cpu_has_svm_feature(unsigned int feat) #define cpu_has_svm_sss cpu_has_svm_feature(SVM_FEATURE_SSS) #define cpu_has_svm_spec_ctrl cpu_has_svm_feature(SVM_FEATURE_SPEC_CTRL) +#define MSR_INTERCEPT_NONE 0 +#define MSR_INTERCEPT_READ 1 +#define MSR_INTERCEPT_WRITE 2 +#define MSR_INTERCEPT_RW (MSR_INTERCEPT_WRITE | MSR_INTERCEPT_READ) +void svm_intercept_msr(struct vcpu *v, uint32_t msr, int flags); +#define svm_disable_intercept_for_msr(v, msr) svm_intercept_msr((v), (msr), MSR_INTERCEPT_NONE) +#define svm_enable_intercept_for_msr(v, msr) svm_intercept_msr((v), (msr), MSR_INTERCEPT_RW) + #endif /* __ASM_X86_HVM_SVM_H__ */ diff --git a/xen/arch/x86/include/asm/hvm/svm/vmcb.h b/xen/arch/x86/include/asm/hvm/svm/vmcb.h index 41bcc9f0d8..d1e200df56 100644 --- a/xen/arch/x86/include/asm/hvm/svm/vmcb.h +++ b/xen/arch/x86/include/asm/hvm/svm/vmcb.h @@ -42,14 +42,6 @@ struct svm_vcpu { uint64_t guest_sysenter_eip; }; -#define MSR_INTERCEPT_NONE 0 -#define MSR_INTERCEPT_READ 1 -#define MSR_INTERCEPT_WRITE 2 -#define MSR_INTERCEPT_RW (MSR_INTERCEPT_WRITE | MSR_INTERCEPT_READ) -void svm_intercept_msr(struct vcpu *v, uint32_t msr, int flags); -#define svm_disable_intercept_for_msr(v, msr) svm_intercept_msr((v), (msr), MSR_INTERCEPT_NONE) -#define svm_enable_intercept_for_msr(v, msr) svm_intercept_msr((v), (msr), MSR_INTERCEPT_RW) - #endif /* ASM_X86_HVM_SVM_VMCS_H__ */ /* -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Mon Dec 15 12:33:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 15 Dec 2025 12:33:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1186958.1508372 (Exim 4.92) (envelope-from ) id 1vV7lT-00034s-UB; Mon, 15 Dec 2025 12:33:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1186958.1508372; Mon, 15 Dec 2025 12:33:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vV7lT-00034l-RA; Mon, 15 Dec 2025 12:33:23 +0000 Received: by outflank-mailman (input) for mailman id 1186958; Mon, 15 Dec 2025 12:33:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vV7lS-00034f-Hp for xen-changelog@lists.xenproject.org; Mon, 15 Dec 2025 12:33:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vV7lS-00B6Xx-0h for xen-changelog@lists.xenproject.org; Mon, 15 Dec 2025 12:33:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vV7lS-00Ga8f-1J for xen-changelog@lists.xenproject.org; Mon, 15 Dec 2025 12:33:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=30VYZy9lt7hP0WG7cyxwfUGUIzgMIl6jkGO6qb7gJaY=; b=xH/Vp2fvC8SA88owSLBHjQzHFR A2l7O1d48033MCVfg4c/3RouPxqzHM0SjBC4AQU6cpFRo43i5XIiJbeTTh5VefCWdT20WL2q+KhaM aW5JqxajBO++r+MtB08PsvfxyW2+9IRZqaqmm3XSWnAAHF7F8rAbEHxxu2+ufak8G9+o=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/svm: Introduce svm-types.h Message-Id: Date: Mon, 15 Dec 2025 12:33:22 +0000 commit a336c18037ece89bceb70696099a5aa03b23c131 Author: Andrew Cooper AuthorDate: Fri Dec 12 16:28:18 2025 +0000 Commit: Andrew Cooper CommitDate: Mon Dec 15 11:24:26 2025 +0000 x86/svm: Introduce svm-types.h In order to reduce the header tangle around xen/sched.h, we need to split types away from other declarations. Introduce a new hvm/svm-types.h to do this, including it from hvm/domain.h and hvm/vcpu.h, and dropping all other inclusions of svm/vmcb.h and svm/nestedhvm.h No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/hvm/svm/emulate.c | 1 - xen/arch/x86/hvm/svm/nestedsvm.c | 1 - xen/arch/x86/hvm/svm/svm.c | 1 - xen/arch/x86/hvm/svm/vmcb.c | 1 - xen/arch/x86/include/asm/hvm/domain.h | 2 +- xen/arch/x86/include/asm/hvm/svm-types.h | 11 +++++++++++ xen/arch/x86/include/asm/hvm/vcpu.h | 3 +-- 7 files changed, 13 insertions(+), 7 deletions(-) diff --git a/xen/arch/x86/hvm/svm/emulate.c b/xen/arch/x86/hvm/svm/emulate.c index be3a710fa5..1f5436c8ea 100644 --- a/xen/arch/x86/hvm/svm/emulate.c +++ b/xen/arch/x86/hvm/svm/emulate.c @@ -12,7 +12,6 @@ #include #include #include -#include #include "svm.h" #include "vmcb.h" diff --git a/xen/arch/x86/hvm/svm/nestedsvm.c b/xen/arch/x86/hvm/svm/nestedsvm.c index 5718ca7f7f..a63ec61346 100644 --- a/xen/arch/x86/hvm/svm/nestedsvm.c +++ b/xen/arch/x86/hvm/svm/nestedsvm.c @@ -7,7 +7,6 @@ #include #include -#include #include #include /* paging_mode_hap */ #include /* for local_event_delivery_(en|dis)able */ diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 86a030b02c..1208999454 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -27,7 +27,6 @@ #include #include #include -#include #include #include #include diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c index 463e527a7d..cbee10d046 100644 --- a/xen/arch/x86/hvm/svm/vmcb.c +++ b/xen/arch/x86/hvm/svm/vmcb.c @@ -16,7 +16,6 @@ #include #include -#include #include #include #include diff --git a/xen/arch/x86/include/asm/hvm/domain.h b/xen/arch/x86/include/asm/hvm/domain.h index 83be2bd1c2..be1a0d8c5b 100644 --- a/xen/arch/x86/include/asm/hvm/domain.h +++ b/xen/arch/x86/include/asm/hvm/domain.h @@ -15,7 +15,7 @@ #include #include -#include +#include #ifdef CONFIG_MEM_SHARING struct mem_sharing_domain diff --git a/xen/arch/x86/include/asm/hvm/svm-types.h b/xen/arch/x86/include/asm/hvm/svm-types.h new file mode 100644 index 0000000000..1c26daa981 --- /dev/null +++ b/xen/arch/x86/include/asm/hvm/svm-types.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * SVM types needed to form struct domain/vcpu. + */ +#ifndef X86_SVM_TYPES_H +#define X86_SVM_TYPES_H + +#include +#include + +#endif /* X86_SVM_TYPES_H */ diff --git a/xen/arch/x86/include/asm/hvm/vcpu.h b/xen/arch/x86/include/asm/hvm/vcpu.h index eae9ac5376..836138a4a6 100644 --- a/xen/arch/x86/include/asm/hvm/vcpu.h +++ b/xen/arch/x86/include/asm/hvm/vcpu.h @@ -12,8 +12,7 @@ #include #include #include -#include -#include +#include #include #include -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Mon Dec 15 12:33:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 15 Dec 2025 12:33:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1186959.1508376 (Exim 4.92) (envelope-from ) id 1vV7ld-00037H-Vb; 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Mon, 15 Dec 2025 12:33:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Uo3B3M6VQXd2CCkGa1tuH1D9xvvKtWbYrgKPXiC6U3Y=; b=yS21E1CqwbEkPcSqKskWdGvUZb yM2tVcBfRzYfypdB5SsieJ1sQ7Mt10QQR9A09EouliFv+xZ6A2P3oDvmfiSIw1BE0o8GFtHoTXjCr PIG/u0WX8dSiDgQ15rSRToZW971LJZmsLG+10A/BlJOCbIqfIV7L2SVj6pMmyq4g8FsA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/svm: Merge nestedsvm.h into svm-types.h Message-Id: Date: Mon, 15 Dec 2025 12:33:32 +0000 commit ada965a47a885ee74b9d9694778c166aa4859ea6 Author: Andrew Cooper AuthorDate: Fri Dec 12 18:23:29 2025 +0000 Commit: Andrew Cooper CommitDate: Mon Dec 15 11:24:26 2025 +0000 x86/svm: Merge nestedsvm.h into svm-types.h While doing so, move the ns_gif field to beside ns_hap_enabled to remove 7 padding bytes, and make some style fixes to comments/etc. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/include/asm/hvm/svm-types.h | 66 ++++++++++++++++++++++- xen/arch/x86/include/asm/hvm/svm/nestedsvm.h | 79 ---------------------------- 2 files changed, 65 insertions(+), 80 deletions(-) diff --git a/xen/arch/x86/include/asm/hvm/svm-types.h b/xen/arch/x86/include/asm/hvm/svm-types.h index 1c26daa981..637b94fa37 100644 --- a/xen/arch/x86/include/asm/hvm/svm-types.h +++ b/xen/arch/x86/include/asm/hvm/svm-types.h @@ -5,7 +5,71 @@ #ifndef X86_SVM_TYPES_H #define X86_SVM_TYPES_H +#include + #include -#include + +struct nestedsvm { + uint64_t ns_msr_hsavepa; /* MSR HSAVE_PA value */ + + /* + * l1 guest physical address of virtual vmcb used by prior VMRUN. Needed + * for VMCB Cleanbit emulation. + */ + uint64_t ns_ovvmcb_pa; + + /* Cached real intercepts of the l2 guest */ + uint32_t ns_cr_intercepts; + uint32_t ns_dr_intercepts; + uint32_t ns_exception_intercepts; + uint32_t ns_general1_intercepts; + uint32_t ns_general2_intercepts; + + /* Cached real MSR permission bitmaps of the l2 guest */ + unsigned long *ns_cached_msrpm; + /* Merged MSR permission bitmap */ + unsigned long *ns_merged_msrpm; + + /* guest physical address of virtual io permission map */ + paddr_t ns_iomap_pa, ns_oiomap_pa; + /* Shadow io permission map */ + unsigned long *ns_iomap; + + /* + * Cached guest_cr[0] of l1 guest while l2 guest runs. Needed to handle + * FPU context switching. + */ + uint64_t ns_cr0; + + /* + * Cache guest cr3/host cr3 the guest sets up for the l2 guest. + * Used by Shadow-on-Shadow and Nested-on-Nested. + * ns_vmcb_guestcr3: in l2 guest physical address space and points to + * the l2 guest page table + * ns_vmcb_hostcr3: in l1 guest physical address space and points to + * the l1 guest nested page table + */ + uint64_t ns_vmcb_guestcr3, ns_vmcb_hostcr3; + uint32_t ns_asid; + + bool ns_gif; + bool ns_hap_enabled; + + /* Only meaningful when vmexit_pending flag is set */ + struct { + uint64_t exitcode; /* native exitcode to inject into l1 guest */ + uint64_t exitinfo1; /* additional information to the exitcode */ + uint64_t exitinfo2; /* additional information to the exitcode */ + } ns_vmexit; + + union { + uint32_t bytes; + struct { + uint32_t rflagsif:1; + uint32_t vintrmask:1; + uint32_t reserved:30; + } fields; + } ns_hostflags; +}; #endif /* X86_SVM_TYPES_H */ diff --git a/xen/arch/x86/include/asm/hvm/svm/nestedsvm.h b/xen/arch/x86/include/asm/hvm/svm/nestedsvm.h deleted file mode 100644 index 205989e800..0000000000 --- a/xen/arch/x86/include/asm/hvm/svm/nestedsvm.h +++ /dev/null @@ -1,79 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * nestedsvm.h: Nested Virtualization - * Copyright (c) 2011, Advanced Micro Devices, Inc - * - */ -#ifndef __ASM_X86_HVM_SVM_NESTEDSVM_H__ -#define __ASM_X86_HVM_SVM_NESTEDSVM_H__ - -#include - -struct nestedsvm { - bool ns_gif; - uint64_t ns_msr_hsavepa; /* MSR HSAVE_PA value */ - - /* l1 guest physical address of virtual vmcb used by prior VMRUN. - * Needed for VMCB Cleanbit emulation. - */ - uint64_t ns_ovvmcb_pa; - - /* Cached real intercepts of the l2 guest */ - uint32_t ns_cr_intercepts; - uint32_t ns_dr_intercepts; - uint32_t ns_exception_intercepts; - uint32_t ns_general1_intercepts; - uint32_t ns_general2_intercepts; - - /* Cached real MSR permission bitmaps of the l2 guest */ - unsigned long *ns_cached_msrpm; - /* Merged MSR permission bitmap */ - unsigned long *ns_merged_msrpm; - - /* guest physical address of virtual io permission map */ - paddr_t ns_iomap_pa, ns_oiomap_pa; - /* Shadow io permission map */ - unsigned long *ns_iomap; - - uint64_t ns_cr0; /* Cached guest_cr[0] of l1 guest while l2 guest runs. - * Needed to handle FPU context switching */ - - /* Cache guest cr3/host cr3 the guest sets up for the l2 guest. - * Used by Shadow-on-Shadow and Nested-on-Nested. - * ns_vmcb_guestcr3: in l2 guest physical address space and points to - * the l2 guest page table - * ns_vmcb_hostcr3: in l1 guest physical address space and points to - * the l1 guest nested page table - */ - uint64_t ns_vmcb_guestcr3, ns_vmcb_hostcr3; - uint32_t ns_asid; - - bool ns_hap_enabled; - - /* Only meaningful when vmexit_pending flag is set */ - struct { - uint64_t exitcode; /* native exitcode to inject into l1 guest */ - uint64_t exitinfo1; /* additional information to the exitcode */ - uint64_t exitinfo2; /* additional information to the exitcode */ - } ns_vmexit; - union { - uint32_t bytes; - struct { - uint32_t rflagsif: 1; - uint32_t vintrmask: 1; - uint32_t reserved: 30; - } fields; - } ns_hostflags; -}; - -#endif /* ASM_X86_HVM_SVM_NESTEDSVM_H__ */ - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * tab-width: 4 - * indent-tabs-mode: nil - * End: - */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Mon Dec 15 12:33:44 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 15 Dec 2025 12:33:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1186960.1508380 (Exim 4.92) (envelope-from ) id 1vV7lo-00039p-27; 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Mon, 15 Dec 2025 12:33:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=qPvuND8EqX60Zx02BJwddD0bep1C4e1Tn3SvmhNZX2w=; b=bv2/x3LF3QwMSlNvLw/2f+OIgE hRNwUoiMyzTHopVtPWqmoNYK/MiydMXQNRLwTy+jRBjQ9vRN8pnlc0Ow4jHDa6ncAJyU431yPNzUA KDDS5V3oLT6ihfFBcJ54yP3cxLm0CMkDnpEahGMfk/BHBUYU32zU2+OaVS8wnMTUvPlc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/svm: Merge vmcb.h into svm-types.h Message-Id: Date: Mon, 15 Dec 2025 12:33:42 +0000 commit fb01f69edb3bffd2feb05b0abd034ec89910b039 Author: Andrew Cooper AuthorDate: Fri Dec 12 16:24:22 2025 +0000 Commit: Andrew Cooper CommitDate: Mon Dec 15 11:24:26 2025 +0000 x86/svm: Merge vmcb.h into svm-types.h While doing so, make some style fixes to comments/etc. This removes the include/asm/hvm/svm/ subdirectory. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/include/asm/hvm/svm-types.h | 32 ++++++++++++++++++- xen/arch/x86/include/asm/hvm/svm/vmcb.h | 55 -------------------------------- 2 files changed, 31 insertions(+), 56 deletions(-) diff --git a/xen/arch/x86/include/asm/hvm/svm-types.h b/xen/arch/x86/include/asm/hvm/svm-types.h index 637b94fa37..051b235d8f 100644 --- a/xen/arch/x86/include/asm/hvm/svm-types.h +++ b/xen/arch/x86/include/asm/hvm/svm-types.h @@ -7,7 +7,37 @@ #include -#include +struct svm_domain { + union { + uint64_t raw[2]; + struct { + uint64_t length; + uint64_t status; + }; + } osvw; +}; + +struct svm_vcpu { + struct vmcb_struct *vmcb; + unsigned long *msrpm; + uint64_t vmcb_pa; + int launch_core; + + uint8_t vmcb_sync_state; /* enum vmcb_sync_state */ + + /* VMCB has a cached instruction from #PF/#NPF Decode Assist? */ + uint8_t cached_insn_len; /* Zero if no cached instruction. */ + + /* + * Upper four bytes are undefined in the VMCB, therefore we can't use the + * fields in the VMCB. Write a 64bit value and then read a 64bit value is + * fine unless there's a VMRUN/VMEXIT in between which clears the upper + * four bytes. + */ + uint64_t guest_sysenter_cs; + uint64_t guest_sysenter_esp; + uint64_t guest_sysenter_eip; +}; struct nestedsvm { uint64_t ns_msr_hsavepa; /* MSR HSAVE_PA value */ diff --git a/xen/arch/x86/include/asm/hvm/svm/vmcb.h b/xen/arch/x86/include/asm/hvm/svm/vmcb.h deleted file mode 100644 index d1e200df56..0000000000 --- a/xen/arch/x86/include/asm/hvm/svm/vmcb.h +++ /dev/null @@ -1,55 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * vmcb.h: VMCB related definitions - * Copyright (c) 2005-2007, Advanced Micro Devices, Inc - * Copyright (c) 2004, Intel Corporation. - * - */ -#ifndef __ASM_X86_HVM_SVM_VMCB_H__ -#define __ASM_X86_HVM_SVM_VMCB_H__ - -#include - -struct svm_domain { - /* OSVW MSRs */ - union { - uint64_t raw[2]; - struct { - uint64_t length; - uint64_t status; - }; - } osvw; -}; - -struct svm_vcpu { - struct vmcb_struct *vmcb; - u64 vmcb_pa; - unsigned long *msrpm; - int launch_core; - - uint8_t vmcb_sync_state; /* enum vmcb_sync_state */ - - /* VMCB has a cached instruction from #PF/#NPF Decode Assist? */ - uint8_t cached_insn_len; /* Zero if no cached instruction. */ - - /* Upper four bytes are undefined in the VMCB, therefore we can't - * use the fields in the VMCB. Write a 64bit value and then read a 64bit - * value is fine unless there's a VMRUN/VMEXIT in between which clears - * the upper four bytes. - */ - uint64_t guest_sysenter_cs; - uint64_t guest_sysenter_esp; - uint64_t guest_sysenter_eip; -}; - -#endif /* ASM_X86_HVM_SVM_VMCS_H__ */ - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * tab-width: 4 - * indent-tabs-mode: nil - * End: - */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Dec 16 09:55:08 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 16 Dec 2025 09:55:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1187801.1509123 (Exim 4.92) (envelope-from ) id 1vVRln-00030U-Hs; Tue, 16 Dec 2025 09:55:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1187801.1509123; Tue, 16 Dec 2025 09:55:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVRln-00030M-FI; Tue, 16 Dec 2025 09:55:03 +0000 Received: by outflank-mailman (input) for mailman id 1187801; Tue, 16 Dec 2025 09:55:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVRlm-00030G-63 for xen-changelog@lists.xenproject.org; Tue, 16 Dec 2025 09:55:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vVRll-00CdVs-2g for xen-changelog@lists.xenproject.org; Tue, 16 Dec 2025 09:55:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vVRlm-00GqN9-08 for xen-changelog@lists.xenproject.org; Tue, 16 Dec 2025 09:55:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=A/ZaHE9RYtLePZEV95mX/ZkL5SratpnCwFaeOOylAAw=; b=BUa97M5YZcxZnJhinrfoI3GFkR beMIk+kXCM5oBI+a5A6+GZXvQaHGHXtUKp9ejWXA1y4b1gglY4SKiZ0qHU8FuvPD4FedCQXyuYvg+ iqTLsviaGgsVh4bh9ze5iz5Hj6pfw6PqvqikhLBoTQ/gzw7rSDl7eHDFhHXIGwxtN5S0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] Arm: actually put library code in a library Message-Id: Date: Tue, 16 Dec 2025 09:55:02 +0000 commit 5d53a22c828cc5413129d1ee4508482029fa7eb1 Author: Jan Beulich AuthorDate: Tue Dec 16 09:31:53 2025 +0100 Commit: Jan Beulich CommitDate: Tue Dec 16 09:31:53 2025 +0100 Arm: actually put library code in a library Now that the build system supports it, build the $(ARCH)/lib/ directories actually into libraries, thus permitting unreferenced objects to be omitted. Signed-off-by: Jan Beulich Reviewed-by: Michal Orzel --- xen/arch/arm/arch.mk | 2 ++ xen/arch/arm/arm32/lib/Makefile | 10 +++++----- xen/arch/arm/arm64/lib/Makefile | 8 ++++---- 3 files changed, 11 insertions(+), 9 deletions(-) diff --git a/xen/arch/arm/arch.mk b/xen/arch/arm/arch.mk index 9c4bedfb3b..dea8dbd18a 100644 --- a/xen/arch/arm/arch.mk +++ b/xen/arch/arm/arch.mk @@ -1,6 +1,8 @@ ######################################## # arm-specific definitions +ARCH_LIBS-y += arch/arm/$(ARCH)/lib/lib.a + $(call cc-options-add,CFLAGS,CC,$(EMBEDDED_EXTRA_CFLAGS)) $(call cc-option-add,CFLAGS,CC,-Wnested-externs) diff --git a/xen/arch/arm/arm32/lib/Makefile b/xen/arch/arm/arm32/lib/Makefile index 18326b284e..f5ff7f92d1 100644 --- a/xen/arch/arm/arm32/lib/Makefile +++ b/xen/arch/arm/arm32/lib/Makefile @@ -1,5 +1,5 @@ -obj-y += memcpy.o memmove.o memset.o memchr.o -obj-y += findbit.o -obj-y += bitops.o -obj-y += strchr.o strrchr.o -obj-y += lib1funcs.o lshrdi3.o div64.o +lib-y += memcpy.o memmove.o memset.o memchr.o +lib-y += findbit.o +lib-y += bitops.o +lib-y += strchr.o strrchr.o +lib-y += lib1funcs.o lshrdi3.o div64.o diff --git a/xen/arch/arm/arm64/lib/Makefile b/xen/arch/arm/arm64/lib/Makefile index 66cfac435a..d6b231dc61 100644 --- a/xen/arch/arm/arm64/lib/Makefile +++ b/xen/arch/arm/arm64/lib/Makefile @@ -1,4 +1,4 @@ -obj-y += memcpy.o memcmp.o memmove.o memset.o memchr.o -obj-y += clear_page.o -obj-y += bitops.o -obj-y += strchr.o strcmp.o strlen.o strncmp.o strnlen.o strrchr.o +lib-y += memcpy.o memcmp.o memmove.o memset.o memchr.o +lib-y += clear_page.o +lib-y += bitops.o +lib-y += strchr.o strcmp.o strlen.o strncmp.o strnlen.o strrchr.o -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Tue Dec 16 09:55:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 16 Dec 2025 09:55:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1187802.1509128 (Exim 4.92) (envelope-from ) id 1vVRlx-000327-JI; Tue, 16 Dec 2025 09:55:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1187802.1509128; Tue, 16 Dec 2025 09:55:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVRlx-00031z-Gg; Tue, 16 Dec 2025 09:55:13 +0000 Received: by outflank-mailman (input) for mailman id 1187802; Tue, 16 Dec 2025 09:55:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVRlw-00031h-7y for xen-changelog@lists.xenproject.org; Tue, 16 Dec 2025 09:55:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vVRlv-00CdVy-2z for xen-changelog@lists.xenproject.org; Tue, 16 Dec 2025 09:55:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vVRlw-00GreG-0Z for xen-changelog@lists.xenproject.org; Tue, 16 Dec 2025 09:55:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=WC7KKVnyr0NNrOZz7wbNwRqw+yhggaYWoV4hFos0on4=; b=d3krS1xlSGe5VpAWEmC2bbcZnw BLeiKIcu3A2ZwUHgce/P74QmmuzHeepnvGrHq6p83QNMtr/BFnzfg3d46Wb+/S2Nv6P45S/bVpqpu ENaA/c1HFyBJaSiXUazPvZ95y19zOMVpVfNrwoq6oT/sh0WDxhWQxAca+gEcZ//K7L/I=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] bump default SeaBIOS version to 1.17.0 Message-Id: Date: Tue, 16 Dec 2025 09:55:12 +0000 commit cc1166479ba3ad5ff7509c573f5118f0f920574b Author: Jan Beulich AuthorDate: Tue Dec 16 09:32:26 2025 +0100 Commit: Jan Beulich CommitDate: Tue Dec 16 09:32:26 2025 +0100 bump default SeaBIOS version to 1.17.0 It has been around for a while. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- Config.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Config.mk b/Config.mk index dbb8bb4de7..a3e219a0b8 100644 --- a/Config.mk +++ b/Config.mk @@ -218,7 +218,7 @@ MINIOS_UPSTREAM_URL ?= https://xenbits.xen.org/git-http/mini-os.git MINIOS_UPSTREAM_REVISION ?= 6732fd42d8eb8d0af9f5eb54aca17f4c250213a8 SEABIOS_UPSTREAM_URL ?= https://xenbits.xen.org/git-http/seabios.git -SEABIOS_UPSTREAM_REVISION ?= rel-1.16.3 +SEABIOS_UPSTREAM_REVISION ?= rel-1.17.0 ETHERBOOT_NICS ?= rtl8139 8086100e -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Tue Dec 16 09:55:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 16 Dec 2025 09:55:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1187803.1509134 (Exim 4.92) (envelope-from ) id 1vVRm7-00034j-LU; Tue, 16 Dec 2025 09:55:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1187803.1509134; Tue, 16 Dec 2025 09:55:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVRm7-00034a-Hz; Tue, 16 Dec 2025 09:55:23 +0000 Received: by outflank-mailman (input) for mailman id 1187803; Tue, 16 Dec 2025 09:55:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVRm6-00034S-BE for xen-changelog@lists.xenproject.org; Tue, 16 Dec 2025 09:55:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vVRm6-00CdWK-05 for xen-changelog@lists.xenproject.org; Tue, 16 Dec 2025 09:55:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vVRm6-00Gsoy-0t for xen-changelog@lists.xenproject.org; Tue, 16 Dec 2025 09:55:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=/6ZIe1XC01jvhFRA4CunJKgo51Ne/YlX3Ovp7IxCzuk=; b=K4xBYktpqf/cmaaLBGuHdNaANH hguR6iRKfVCVMVYqtmXtzcMilGZocWcQi+lFtO8/Dqp8oLOMctLmbnEItFlG3RHZliEaVGnulbQO7 6Oi0mE8mONAaabJEbwJ/0cvL4F9w+m7H5PdEz69duhKa03ql0SN+g7Xlu2ywqrLi8I/g=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/x86: Pass TPM ACPI table to PVH dom0 Message-Id: Date: Tue, 16 Dec 2025 09:55:22 +0000 commit 46f3ed0d53db6daf38c230dff0d2910bcb61fbe2 Author: Jason Andryuk AuthorDate: Tue Dec 16 09:40:18 2025 +0100 Commit: Jan Beulich CommitDate: Tue Dec 16 09:40:18 2025 +0100 xen/x86: Pass TPM ACPI table to PVH dom0 Pass the TPM2 ACPI table so that the device can be found by a PVH dom0. Otherwise dom0 shows: tpm_tis MSFT0101:00: [Firmware Bug]: failed to get TPM2 ACPI table tpm_tis MSFT0101:00: probe with driver tpm_tis failed with error -22 TCPA is "Trusted Computing Platform Alliance table", but it is really the table for a TPM 1.2. Pass that as well. While doing this, move ACPI_SIG_WPBT to alpabetize the entries. This exposes TPM event log tables on PVH dom0, bring it in line with a PV dom0. Signed-off-by: Jason Andryuk Acked-by: Andrew Cooper --- xen/arch/x86/hvm/dom0_build.c | 2 +- xen/include/acpi/actbl3.h | 4 +++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c index 5ac2cf8394..7eccadf7aa 100644 --- a/xen/arch/x86/hvm/dom0_build.c +++ b/xen/arch/x86/hvm/dom0_build.c @@ -1013,7 +1013,7 @@ static bool __init pvh_acpi_table_allowed(const char *sig, ACPI_SIG_DSDT, ACPI_SIG_FADT, ACPI_SIG_FACS, ACPI_SIG_PSDT, ACPI_SIG_SSDT, ACPI_SIG_SBST, ACPI_SIG_MCFG, ACPI_SIG_SLIC, ACPI_SIG_MSDM, ACPI_SIG_WDAT, ACPI_SIG_FPDT, ACPI_SIG_S3PT, - ACPI_SIG_VFCT, + ACPI_SIG_TCPA, ACPI_SIG_TPM2, ACPI_SIG_VFCT, }; unsigned int i; diff --git a/xen/include/acpi/actbl3.h b/xen/include/acpi/actbl3.h index 6858d3e60f..636d3f5f5b 100644 --- a/xen/include/acpi/actbl3.h +++ b/xen/include/acpi/actbl3.h @@ -78,8 +78,10 @@ #define ACPI_SIG_CSRT "CSRT" /* Core System Resources Table */ #define ACPI_SIG_MATR "MATR" /* Memory Address Translation Table */ #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ -#define ACPI_SIG_WPBT "WPBT" /* Windows Platform Binary Table */ +#define ACPI_SIG_TCPA "TCPA" /* Trusted Computing Platform Alliance table */ +#define ACPI_SIG_TPM2 "TPM2" /* Trusted Platform Module 2.0 H/W interface table */ #define ACPI_SIG_VFCT "VFCT" /* AMD Video BIOS */ +#define ACPI_SIG_WPBT "WPBT" /* Windows Platform Binary Table */ /* * All tables must be byte-packed to match the ACPI specification, since -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Tue Dec 16 11:33:09 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 16 Dec 2025 11:33:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1187850.1509166 (Exim 4.92) (envelope-from ) id 1vVTIc-00080x-Sj; Tue, 16 Dec 2025 11:33:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1187850.1509166; Tue, 16 Dec 2025 11:33:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVTIc-00080p-QB; Tue, 16 Dec 2025 11:33:02 +0000 Received: by outflank-mailman (input) for mailman id 1187850; Tue, 16 Dec 2025 11:33:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVTIb-00080j-NW for xen-changelog@lists.xenproject.org; Tue, 16 Dec 2025 11:33:01 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vVTIb-00CfHn-1C for xen-changelog@lists.xenproject.org; Tue, 16 Dec 2025 11:33:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vVTIb-00AQKA-1y for xen-changelog@lists.xenproject.org; Tue, 16 Dec 2025 11:33:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=apbN3uebcKXWue7vXYYYBosfPfhb1e05pT3R9HShXX0=; b=x9VRnBFf4zo0mbVySSgTlBI5gU CwyOr51COJCRaLHHHJ4jzohik28N9aIshV471ECGl5l/HNnDKStszGx0ZB6uU7pebU1i3sZ/eclEh uoIrTB5HkDHIjxoUZdkgY9FK+OPumIaVCP2vo8l07c8PnYNiVDfOF6sMG5lmAN6uUGdY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] Arm: actually put library code in a library Message-Id: Date: Tue, 16 Dec 2025 11:33:01 +0000 commit 5d53a22c828cc5413129d1ee4508482029fa7eb1 Author: Jan Beulich AuthorDate: Tue Dec 16 09:31:53 2025 +0100 Commit: Jan Beulich CommitDate: Tue Dec 16 09:31:53 2025 +0100 Arm: actually put library code in a library Now that the build system supports it, build the $(ARCH)/lib/ directories actually into libraries, thus permitting unreferenced objects to be omitted. Signed-off-by: Jan Beulich Reviewed-by: Michal Orzel --- xen/arch/arm/arch.mk | 2 ++ xen/arch/arm/arm32/lib/Makefile | 10 +++++----- xen/arch/arm/arm64/lib/Makefile | 8 ++++---- 3 files changed, 11 insertions(+), 9 deletions(-) diff --git a/xen/arch/arm/arch.mk b/xen/arch/arm/arch.mk index 9c4bedfb3b..dea8dbd18a 100644 --- a/xen/arch/arm/arch.mk +++ b/xen/arch/arm/arch.mk @@ -1,6 +1,8 @@ ######################################## # arm-specific definitions +ARCH_LIBS-y += arch/arm/$(ARCH)/lib/lib.a + $(call cc-options-add,CFLAGS,CC,$(EMBEDDED_EXTRA_CFLAGS)) $(call cc-option-add,CFLAGS,CC,-Wnested-externs) diff --git a/xen/arch/arm/arm32/lib/Makefile b/xen/arch/arm/arm32/lib/Makefile index 18326b284e..f5ff7f92d1 100644 --- a/xen/arch/arm/arm32/lib/Makefile +++ b/xen/arch/arm/arm32/lib/Makefile @@ -1,5 +1,5 @@ -obj-y += memcpy.o memmove.o memset.o memchr.o -obj-y += findbit.o -obj-y += bitops.o -obj-y += strchr.o strrchr.o -obj-y += lib1funcs.o lshrdi3.o div64.o +lib-y += memcpy.o memmove.o memset.o memchr.o +lib-y += findbit.o +lib-y += bitops.o +lib-y += strchr.o strrchr.o +lib-y += lib1funcs.o lshrdi3.o div64.o diff --git a/xen/arch/arm/arm64/lib/Makefile b/xen/arch/arm/arm64/lib/Makefile index 66cfac435a..d6b231dc61 100644 --- a/xen/arch/arm/arm64/lib/Makefile +++ b/xen/arch/arm/arm64/lib/Makefile @@ -1,4 +1,4 @@ -obj-y += memcpy.o memcmp.o memmove.o memset.o memchr.o -obj-y += clear_page.o -obj-y += bitops.o -obj-y += strchr.o strcmp.o strlen.o strncmp.o strnlen.o strrchr.o +lib-y += memcpy.o memcmp.o memmove.o memset.o memchr.o +lib-y += clear_page.o +lib-y += bitops.o +lib-y += strchr.o strcmp.o strlen.o strncmp.o strnlen.o strrchr.o -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Dec 16 11:33:12 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 16 Dec 2025 11:33:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1187851.1509170 (Exim 4.92) (envelope-from ) id 1vVTIm-00082Y-U7; Tue, 16 Dec 2025 11:33:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1187851.1509170; Tue, 16 Dec 2025 11:33:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVTIm-00082Q-RY; Tue, 16 Dec 2025 11:33:12 +0000 Received: by outflank-mailman (input) for mailman id 1187851; Tue, 16 Dec 2025 11:33:11 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVTIl-000829-QB for xen-changelog@lists.xenproject.org; Tue, 16 Dec 2025 11:33:11 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vVTIl-00CfHt-1a for xen-changelog@lists.xenproject.org; Tue, 16 Dec 2025 11:33:11 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vVTIl-00ARWz-2O for xen-changelog@lists.xenproject.org; Tue, 16 Dec 2025 11:33:11 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=1ddlfw6tMAYoIc2CRivjFZWT7UW6M51CGR+b3foffWg=; b=ilwQ72v8U0YfrwP9Nzlcb4mxFx g8zZHTMaEXQxm+mRpPtPAP7rNAqKZryWRXjQHQtAzit4HdTngCmHNc9X38gIyFsMAkfhkXYrURwEQ tS7AkAYE96AoStlV/tBepkotlF8HJr2HTG6A6sW8Xrx5i7NzMfvB+CHzK+aAp7pF9qtQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] bump default SeaBIOS version to 1.17.0 Message-Id: Date: Tue, 16 Dec 2025 11:33:11 +0000 commit cc1166479ba3ad5ff7509c573f5118f0f920574b Author: Jan Beulich AuthorDate: Tue Dec 16 09:32:26 2025 +0100 Commit: Jan Beulich CommitDate: Tue Dec 16 09:32:26 2025 +0100 bump default SeaBIOS version to 1.17.0 It has been around for a while. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- Config.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Config.mk b/Config.mk index dbb8bb4de7..a3e219a0b8 100644 --- a/Config.mk +++ b/Config.mk @@ -218,7 +218,7 @@ MINIOS_UPSTREAM_URL ?= https://xenbits.xen.org/git-http/mini-os.git MINIOS_UPSTREAM_REVISION ?= 6732fd42d8eb8d0af9f5eb54aca17f4c250213a8 SEABIOS_UPSTREAM_URL ?= https://xenbits.xen.org/git-http/seabios.git -SEABIOS_UPSTREAM_REVISION ?= rel-1.16.3 +SEABIOS_UPSTREAM_REVISION ?= rel-1.17.0 ETHERBOOT_NICS ?= rtl8139 8086100e -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Dec 16 11:33:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 16 Dec 2025 11:33:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1187852.1509175 (Exim 4.92) (envelope-from ) id 1vVTIw-00084z-WC; Tue, 16 Dec 2025 11:33:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1187852.1509175; Tue, 16 Dec 2025 11:33:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVTIw-00084p-Su; Tue, 16 Dec 2025 11:33:22 +0000 Received: by outflank-mailman (input) for mailman id 1187852; Tue, 16 Dec 2025 11:33:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVTIv-00084j-WD for xen-changelog@lists.xenproject.org; Tue, 16 Dec 2025 11:33:21 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vVTIv-00CfID-2C for xen-changelog@lists.xenproject.org; Tue, 16 Dec 2025 11:33:21 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vVTIv-00AShR-2t for xen-changelog@lists.xenproject.org; Tue, 16 Dec 2025 11:33:21 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=uFqHz/JjB8xNRUhLTwPpo74Nh0q2/xLQu9sdN1gtawA=; b=klz5snuicRgmEajVHTUPExDLrZ Ya/y5vn07n/F/RP/5gpdd4b5GIcYb8Y0FnVqyGSOse2ULTitdpjbl9m5bBA4toNM3ICG5R4Fc2E5a QeUHOl1Z8hH6sQ79JthgoCjvhnr3/FJNIDHP25+IrSEJnuZeLRrbXGJO+NGZXhXhMeJ8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/x86: Pass TPM ACPI table to PVH dom0 Message-Id: Date: Tue, 16 Dec 2025 11:33:21 +0000 commit 46f3ed0d53db6daf38c230dff0d2910bcb61fbe2 Author: Jason Andryuk AuthorDate: Tue Dec 16 09:40:18 2025 +0100 Commit: Jan Beulich CommitDate: Tue Dec 16 09:40:18 2025 +0100 xen/x86: Pass TPM ACPI table to PVH dom0 Pass the TPM2 ACPI table so that the device can be found by a PVH dom0. Otherwise dom0 shows: tpm_tis MSFT0101:00: [Firmware Bug]: failed to get TPM2 ACPI table tpm_tis MSFT0101:00: probe with driver tpm_tis failed with error -22 TCPA is "Trusted Computing Platform Alliance table", but it is really the table for a TPM 1.2. Pass that as well. While doing this, move ACPI_SIG_WPBT to alpabetize the entries. This exposes TPM event log tables on PVH dom0, bring it in line with a PV dom0. Signed-off-by: Jason Andryuk Acked-by: Andrew Cooper --- xen/arch/x86/hvm/dom0_build.c | 2 +- xen/include/acpi/actbl3.h | 4 +++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c index 5ac2cf8394..7eccadf7aa 100644 --- a/xen/arch/x86/hvm/dom0_build.c +++ b/xen/arch/x86/hvm/dom0_build.c @@ -1013,7 +1013,7 @@ static bool __init pvh_acpi_table_allowed(const char *sig, ACPI_SIG_DSDT, ACPI_SIG_FADT, ACPI_SIG_FACS, ACPI_SIG_PSDT, ACPI_SIG_SSDT, ACPI_SIG_SBST, ACPI_SIG_MCFG, ACPI_SIG_SLIC, ACPI_SIG_MSDM, ACPI_SIG_WDAT, ACPI_SIG_FPDT, ACPI_SIG_S3PT, - ACPI_SIG_VFCT, + ACPI_SIG_TCPA, ACPI_SIG_TPM2, ACPI_SIG_VFCT, }; unsigned int i; diff --git a/xen/include/acpi/actbl3.h b/xen/include/acpi/actbl3.h index 6858d3e60f..636d3f5f5b 100644 --- a/xen/include/acpi/actbl3.h +++ b/xen/include/acpi/actbl3.h @@ -78,8 +78,10 @@ #define ACPI_SIG_CSRT "CSRT" /* Core System Resources Table */ #define ACPI_SIG_MATR "MATR" /* Memory Address Translation Table */ #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ -#define ACPI_SIG_WPBT "WPBT" /* Windows Platform Binary Table */ +#define ACPI_SIG_TCPA "TCPA" /* Trusted Computing Platform Alliance table */ +#define ACPI_SIG_TPM2 "TPM2" /* Trusted Platform Module 2.0 H/W interface table */ #define ACPI_SIG_VFCT "VFCT" /* AMD Video BIOS */ +#define ACPI_SIG_WPBT "WPBT" /* Windows Platform Binary Table */ /* * All tables must be byte-packed to match the ACPI specification, since -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Dec 17 09:33:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 17 Dec 2025 09:33:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1188668.1509778 (Exim 4.92) (envelope-from ) id 1vVnu3-0002n6-6b; Wed, 17 Dec 2025 09:33:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1188668.1509778; Wed, 17 Dec 2025 09:33:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVnu3-0002mx-3Y; Wed, 17 Dec 2025 09:33:03 +0000 Received: by outflank-mailman (input) for mailman id 1188668; Wed, 17 Dec 2025 09:33:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVnu2-0002mr-8Y for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 09:33:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vVnu1-00EJAQ-2W for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 09:33:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vVnu1-000iSk-35 for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 09:33:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=rIOTyldn2PmnLEHGhql8YjeA7OesYuejtrMfFnfHBSU=; b=fhDMgHrzc4kT2I4nvZJzGTwl9S /GeWPTOZLHv5FOToKfHQfx9A/9KA09rhLgNkR658+fHC9aRKp6/hgjuWOB6Et0OLmsS0Thvz8J1N0 iF22zyaWSyDTbiTiC/3Y/hreUzVIz9busdFXL+2Peg/95p7U7vCts8IifxOWb3I5O55k=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] misra: extend toolchain assumption about source character set Message-Id: Date: Wed, 17 Dec 2025 09:33:01 +0000 commit c380923a52e6bb92732bec65be9d9d0a542c694c Author: Nicola Vetrini AuthorDate: Wed Dec 17 09:02:09 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 17 09:02:09 2025 +0100 misra: extend toolchain assumption about source character set Similar to the ARM64 compiler, the same assumptions can be made about the X86_64 toolchain. No functional change. Signed-off-by: Nicola Vetrini Acked-by: Stefano Stabellini --- automation/eclair_analysis/ECLAIR/toolchain.ecl | 1 + docs/misra/C-language-toolchain.rst | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/automation/eclair_analysis/ECLAIR/toolchain.ecl b/automation/eclair_analysis/ECLAIR/toolchain.ecl index 842f8377e5..4bc88aa029 100644 --- a/automation/eclair_analysis/ECLAIR/toolchain.ecl +++ b/automation/eclair_analysis/ECLAIR/toolchain.ecl @@ -210,6 +210,7 @@ ext_sizeof_alignof_void_type" -doc_begin="See Section \"1.1 Character sets\" of "CPP_MANUAL". We assume the locale is not restricting any UTF-8 characters being part of the source character set." -config=STD.charset,behavior={c99, GCC_ARM64, "utf8"} +-config=STD.charset,behavior={c99, GCC_X86_64, "utf8"} -doc_end -doc_begin="See Section \"4.3 Identifiers\" of "GCC_MANUAL"." diff --git a/docs/misra/C-language-toolchain.rst b/docs/misra/C-language-toolchain.rst index cb81f5c098..ec0c9953be 100644 --- a/docs/misra/C-language-toolchain.rst +++ b/docs/misra/C-language-toolchain.rst @@ -400,7 +400,7 @@ The table columns are as follows: - See Section "4.15 Architecture" of GCC_MANUAL and Section "3.1.2 Data Representation" of X86_64_ABI_MANUAL. * - Character not in the basic source character set is encountered in a source file, except in an identifier, a character constant, a string literal, a header name, a comment, or a preprocessing token that is never converted to a token - - ARM64 + - ARM64, X86_64 - UTF-8 - See Section "1.1 Character sets" of CPP_MANUAL. We assume the locale is not restricting any UTF-8 characters being part of the source character set. -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Wed Dec 17 09:33:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 17 Dec 2025 09:33:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1188669.1509781 (Exim 4.92) (envelope-from ) id 1vVnuD-0002oi-7U; Wed, 17 Dec 2025 09:33:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1188669.1509781; Wed, 17 Dec 2025 09:33:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVnuD-0002oa-4s; Wed, 17 Dec 2025 09:33:13 +0000 Received: by outflank-mailman (input) for mailman id 1188669; Wed, 17 Dec 2025 09:33:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVnuC-0002oS-7J for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 09:33:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vVnuB-00EJAm-2t for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 09:33:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vVnuC-000jlS-0Q for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 09:33:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ZahGYDCypTG5wkTOUeFQdLu9qTrvTOoKNYMj4zlbe6Q=; b=ObX30vQA7jbY9ZVcPae6VougJU Mjf4dhIKrhQlS6MEZZ3EmKGMWDtMRH1Tx6yrgiAVdCBo4ithFD0cyfRiuz0FCXpQMyvZLB7IPYzTt cLRzjv+yJ3lpW3Qw8DxF3wJo0Lvv8g6FK74lFLxyaJNDv6IX6k85zET/NLvl8nzxUvgY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86: move / split usercopy.c to / into arch-specific library Message-Id: Date: Wed, 17 Dec 2025 09:33:12 +0000 commit 7370966d1cb7e53e7bb55fe0d4d16068e9b81a1f Author: Jan Beulich AuthorDate: Wed Dec 17 09:02:37 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 17 09:02:37 2025 +0100 x86: move / split usercopy.c to / into arch-specific library The file wasn't correctly named for our purposes anyway. Split it into its "guest" and "unsafe" parts, thus allowing the latter to not be linked in at all (for presently having no caller). The building of the "guest" part can then (later) become conditional upon PV=y. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper Reviewed-by: Grygorii Strashko --- xen/arch/x86/Makefile | 4 -- xen/arch/x86/lib/Makefile | 2 + xen/arch/x86/lib/copy-guest.c | 152 +++++++++++++++++++++++++++++++++++++++ xen/arch/x86/lib/copy-unsafe.c | 22 ++++++ xen/arch/x86/usercopy.c | 160 ----------------------------------------- 5 files changed, 176 insertions(+), 164 deletions(-) diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index 61e2293a46..dfb258d7ac 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -72,7 +72,6 @@ obj-y += time.o obj-y += traps-setup.o obj-y += traps.o obj-$(CONFIG_INTEL) += tsx.o -obj-y += usercopy.o obj-y += x86_emulate.o obj-$(CONFIG_TBOOT) += tboot.o obj-y += hpet.o @@ -93,9 +92,6 @@ hostprogs-y += efi/mkreloc $(obj)/efi/mkreloc: HOSTCFLAGS += -I$(srctree)/include -# Allows usercopy.c to include itself -$(obj)/usercopy.o: CFLAGS-y += -iquote . - ifneq ($(CONFIG_HVM),y) $(obj)/x86_emulate.o: CFLAGS-y += -Wno-unused-label endif diff --git a/xen/arch/x86/lib/Makefile b/xen/arch/x86/lib/Makefile index ddf7e19bdc..8fe2dfd885 100644 --- a/xen/arch/x86/lib/Makefile +++ b/xen/arch/x86/lib/Makefile @@ -1 +1,3 @@ +lib-y += copy-guest.o +lib-y += copy-unsafe.o lib-y += generic-hweightl.o diff --git a/xen/arch/x86/lib/copy-guest.c b/xen/arch/x86/lib/copy-guest.c new file mode 100644 index 0000000000..73284b3f14 --- /dev/null +++ b/xen/arch/x86/lib/copy-guest.c @@ -0,0 +1,152 @@ +/* + * User address space access functions. + * + * Copyright 1997 Andi Kleen + * Copyright 1997 Linus Torvalds + * Copyright 2002 Andi Kleen + */ + +#include + +#include + +#ifndef GUARD +# define GUARD UA_KEEP +#endif + +unsigned int copy_to_guest_ll(void __user *to, const void *from, unsigned int n) +{ + GUARD(unsigned dummy); + + stac(); + asm_inline volatile ( + GUARD( + " guest_access_mask_ptr %[to], %q[scratch1], %q[scratch2]\n" + ) + "1: rep movsb\n" + "2:\n" + _ASM_EXTABLE(1b, 2b) + : [cnt] "+c" (n), [to] "+D" (to), [from] "+S" (from) + GUARD(, [scratch1] "=&r" (dummy), [scratch2] "=&r" (dummy)) + :: "memory" ); + clac(); + + return n; +} + +unsigned int copy_from_guest_ll(void *to, const void __user *from, unsigned int n) +{ + unsigned dummy; + + stac(); + asm_inline volatile ( + GUARD( + " guest_access_mask_ptr %[from], %q[scratch1], %q[scratch2]\n" + ) + "1: rep movsb\n" + "2:\n" + ".section .fixup,\"ax\"\n" + "6: mov %[cnt], %k[from]\n" + " xchg %%eax, %[aux]\n" + " xor %%eax, %%eax\n" + " rep stosb\n" + " xchg %[aux], %%eax\n" + " mov %k[from], %[cnt]\n" + " jmp 2b\n" + ".previous\n" + _ASM_EXTABLE(1b, 6b) + : [cnt] "+c" (n), [to] "+D" (to), [from] "+S" (from), + [aux] "=&r" (dummy) + GUARD(, [scratch1] "=&r" (dummy), [scratch2] "=&r" (dummy)) + :: "memory" ); + clac(); + + return n; +} + +#if GUARD(1) + 0 + +/** + * copy_to_guest_pv: - Copy a block of data into PV guest space. + * @to: Destination address, in PV guest space. + * @from: Source address, in hypervisor space. + * @n: Number of bytes to copy. + * + * Copy data from hypervisor space to PV guest space. + * + * Returns number of bytes that could not be copied. + * On success, this will be zero. + */ +unsigned int copy_to_guest_pv(void __user *to, const void *from, unsigned int n) +{ + if ( access_ok(to, n) ) + n = __copy_to_guest_pv(to, from, n); + return n; +} + +/** + * clear_guest_pv: - Zero a block of memory in PV guest space. + * @to: Destination address, in PV guest space. + * @n: Number of bytes to zero. + * + * Zero a block of memory in PV guest space. + * + * Returns number of bytes that could not be cleared. + * On success, this will be zero. + */ +unsigned int clear_guest_pv(void __user *to, unsigned int n) +{ + if ( access_ok(to, n) ) + { + long dummy; + + stac(); + asm_inline volatile ( + " guest_access_mask_ptr %[to], %[scratch1], %[scratch2]\n" + "1: rep stosb\n" + "2:\n" + _ASM_EXTABLE(1b,2b) + : [cnt] "+c" (n), [to] "+D" (to), [scratch1] "=&r" (dummy), + [scratch2] "=&r" (dummy) + : "a" (0) ); + clac(); + } + + return n; +} + +/** + * copy_from_guest_pv: - Copy a block of data from PV guest space. + * @to: Destination address, in hypervisor space. + * @from: Source address, in PV guest space. + * @n: Number of bytes to copy. + * + * Copy data from PV guest space to hypervisor space. + * + * Returns number of bytes that could not be copied. + * On success, this will be zero. + * + * If some data could not be copied, this function will pad the copied + * data to the requested size using zero bytes. + */ +unsigned int copy_from_guest_pv(void *to, const void __user *from, + unsigned int n) +{ + if ( access_ok(from, n) ) + n = __copy_from_guest_pv(to, from, n); + else + memset(to, 0, n); + return n; +} + +#endif /* GUARD(1) */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/arch/x86/lib/copy-unsafe.c b/xen/arch/x86/lib/copy-unsafe.c new file mode 100644 index 0000000000..a51500370f --- /dev/null +++ b/xen/arch/x86/lib/copy-unsafe.c @@ -0,0 +1,22 @@ +/* + * "Unsafe" access functions. + */ + +#include + +#define GUARD UA_DROP +#define copy_to_guest_ll copy_to_unsafe_ll +#define copy_from_guest_ll copy_from_unsafe_ll +#undef __user +#define __user +#include "copy-guest.c" + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/arch/x86/usercopy.c b/xen/arch/x86/usercopy.c deleted file mode 100644 index a24b52cc66..0000000000 --- a/xen/arch/x86/usercopy.c +++ /dev/null @@ -1,160 +0,0 @@ -/* - * User address space access functions. - * - * Copyright 1997 Andi Kleen - * Copyright 1997 Linus Torvalds - * Copyright 2002 Andi Kleen - */ - -#include -#include -#include - -#ifndef GUARD -# define GUARD UA_KEEP -#endif - -unsigned int copy_to_guest_ll(void __user *to, const void *from, unsigned int n) -{ - GUARD(unsigned dummy); - - stac(); - asm_inline volatile ( - GUARD( - " guest_access_mask_ptr %[to], %q[scratch1], %q[scratch2]\n" - ) - "1: rep movsb\n" - "2:\n" - _ASM_EXTABLE(1b, 2b) - : [cnt] "+c" (n), [to] "+D" (to), [from] "+S" (from) - GUARD(, [scratch1] "=&r" (dummy), [scratch2] "=&r" (dummy)) - :: "memory" ); - clac(); - - return n; -} - -unsigned int copy_from_guest_ll(void *to, const void __user *from, unsigned int n) -{ - unsigned dummy; - - stac(); - asm_inline volatile ( - GUARD( - " guest_access_mask_ptr %[from], %q[scratch1], %q[scratch2]\n" - ) - "1: rep movsb\n" - "2:\n" - ".section .fixup,\"ax\"\n" - "6: mov %[cnt], %k[from]\n" - " xchg %%eax, %[aux]\n" - " xor %%eax, %%eax\n" - " rep stosb\n" - " xchg %[aux], %%eax\n" - " mov %k[from], %[cnt]\n" - " jmp 2b\n" - ".previous\n" - _ASM_EXTABLE(1b, 6b) - : [cnt] "+c" (n), [to] "+D" (to), [from] "+S" (from), - [aux] "=&r" (dummy) - GUARD(, [scratch1] "=&r" (dummy), [scratch2] "=&r" (dummy)) - :: "memory" ); - clac(); - - return n; -} - -#if GUARD(1) + 0 - -/** - * copy_to_guest_pv: - Copy a block of data into PV guest space. - * @to: Destination address, in PV guest space. - * @from: Source address, in hypervisor space. - * @n: Number of bytes to copy. - * - * Copy data from hypervisor space to PV guest space. - * - * Returns number of bytes that could not be copied. - * On success, this will be zero. - */ -unsigned int copy_to_guest_pv(void __user *to, const void *from, unsigned int n) -{ - if ( access_ok(to, n) ) - n = __copy_to_guest_pv(to, from, n); - return n; -} - -/** - * clear_guest_pv: - Zero a block of memory in PV guest space. - * @to: Destination address, in PV guest space. - * @n: Number of bytes to zero. - * - * Zero a block of memory in PV guest space. - * - * Returns number of bytes that could not be cleared. - * On success, this will be zero. - */ -unsigned int clear_guest_pv(void __user *to, unsigned int n) -{ - if ( access_ok(to, n) ) - { - long dummy; - - stac(); - asm_inline volatile ( - " guest_access_mask_ptr %[to], %[scratch1], %[scratch2]\n" - "1: rep stosb\n" - "2:\n" - _ASM_EXTABLE(1b,2b) - : [cnt] "+c" (n), [to] "+D" (to), [scratch1] "=&r" (dummy), - [scratch2] "=&r" (dummy) - : "a" (0) ); - clac(); - } - - return n; -} - -/** - * copy_from_guest_pv: - Copy a block of data from PV guest space. - * @to: Destination address, in hypervisor space. - * @from: Source address, in PV guest space. - * @n: Number of bytes to copy. - * - * Copy data from PV guest space to hypervisor space. - * - * Returns number of bytes that could not be copied. - * On success, this will be zero. - * - * If some data could not be copied, this function will pad the copied - * data to the requested size using zero bytes. - */ -unsigned int copy_from_guest_pv(void *to, const void __user *from, - unsigned int n) -{ - if ( access_ok(from, n) ) - n = __copy_from_guest_pv(to, from, n); - else - memset(to, 0, n); - return n; -} - -# undef GUARD -# define GUARD UA_DROP -# define copy_to_guest_ll copy_to_unsafe_ll -# define copy_from_guest_ll copy_from_unsafe_ll -# undef __user -# define __user -# include __FILE__ - -#endif /* GUARD(1) */ - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * tab-width: 4 - * indent-tabs-mode: nil - * End: - */ -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Wed Dec 17 09:33:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 17 Dec 2025 09:33:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1188670.1509786 (Exim 4.92) (envelope-from ) id 1vVnuN-0002rR-8x; Wed, 17 Dec 2025 09:33:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1188670.1509786; Wed, 17 Dec 2025 09:33:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVnuN-0002rJ-6E; Wed, 17 Dec 2025 09:33:23 +0000 Received: by outflank-mailman (input) for mailman id 1188670; Wed, 17 Dec 2025 09:33:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVnuM-0002rD-Cf for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 09:33:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vVnuM-00EJBA-0F for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 09:33:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vVnuM-000kuV-0q for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 09:33:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=UqZbqGu2NoxE79v5c6OVNjiNOPmDvwX8TNUsQKQJTzM=; b=NLsAwSlGv3jcNfVxCKqe1+ZCkk UnWVgdI+B1b7dsyCOTBwQQtGYKsTMjJCNmnklWH8QZZcXKnNSBkCdeRxnqqrIGgAloGYQD886M9oM 6Pfap2lG4Rlh6i8Hxqsb9Ae8qRcWYT9QtYe4FboYrpXsouYa7MgZCyrS5VHN4kATy4pE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86: move mem{cpy,set}.S to arch-specific library Message-Id: Date: Wed, 17 Dec 2025 09:33:22 +0000 commit 54ad9eb26a7e98d8ac80e8bbdea1c793934ee1ff Author: Jan Beulich AuthorDate: Wed Dec 17 09:03:29 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 17 09:03:29 2025 +0100 x86: move mem{cpy,set}.S to arch-specific library If not these, what else are library functions. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- xen/arch/x86/Makefile | 2 -- xen/arch/x86/lib/Makefile | 2 ++ xen/arch/x86/lib/memcpy.S | 20 ++++++++++++++++++++ xen/arch/x86/lib/memset.S | 30 ++++++++++++++++++++++++++++++ xen/arch/x86/memcpy.S | 20 -------------------- xen/arch/x86/memset.S | 30 ------------------------------ 6 files changed, 52 insertions(+), 52 deletions(-) diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index dfb258d7ac..43117c88e5 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -48,8 +48,6 @@ obj-$(CONFIG_RETURN_THUNK) += indirect-thunk.o obj-$(CONFIG_PV) += ioport_emulate.o obj-y += irq.o obj-$(CONFIG_KEXEC) += machine_kexec.o -obj-y += memcpy.o -obj-y += memset.o obj-y += mm.o x86_64/mm.o obj-$(CONFIG_VM_EVENT) += monitor.o obj-y += mpparse.o diff --git a/xen/arch/x86/lib/Makefile b/xen/arch/x86/lib/Makefile index 8fe2dfd885..a5169f5e19 100644 --- a/xen/arch/x86/lib/Makefile +++ b/xen/arch/x86/lib/Makefile @@ -1,3 +1,5 @@ lib-y += copy-guest.o lib-y += copy-unsafe.o lib-y += generic-hweightl.o +lib-y += memcpy.o +lib-y += memset.o diff --git a/xen/arch/x86/lib/memcpy.S b/xen/arch/x86/lib/memcpy.S new file mode 100644 index 0000000000..aaee012126 --- /dev/null +++ b/xen/arch/x86/lib/memcpy.S @@ -0,0 +1,20 @@ +#include + +FUNC(memcpy) + mov %rdx, %rcx + mov %rdi, %rax + /* + * We need to be careful here: memcpy() is involved in alternatives + * patching, so the code doing the actual copying (i.e. past setting + * up registers) may not be subject to patching (unless further + * precautions were taken). + */ + ALTERNATIVE "and $7, %edx; shr $3, %rcx", \ + STR(rep movsb; RET), X86_FEATURE_ERMS + rep movsq + or %edx, %ecx + jz 1f + rep movsb +1: + RET +END(memcpy) diff --git a/xen/arch/x86/lib/memset.S b/xen/arch/x86/lib/memset.S new file mode 100644 index 0000000000..81ec6f6ba2 --- /dev/null +++ b/xen/arch/x86/lib/memset.S @@ -0,0 +1,30 @@ +#include + +.macro memset + and $7, %edx + shr $3, %rcx + movzbl %sil, %esi + mov $0x0101010101010101, %rax + imul %rsi, %rax + mov %rdi, %r8 + rep stosq + or %edx, %ecx + jz 0f + rep stosb +0: + mov %r8, %rax + RET +.endm + +.macro memset_erms + mov %esi, %eax + mov %rdi, %r8 + rep stosb + mov %r8, %rax + RET +.endm + +FUNC(memset) + mov %rdx, %rcx + ALTERNATIVE memset, memset_erms, X86_FEATURE_ERMS +END(memset) diff --git a/xen/arch/x86/memcpy.S b/xen/arch/x86/memcpy.S deleted file mode 100644 index aaee012126..0000000000 --- a/xen/arch/x86/memcpy.S +++ /dev/null @@ -1,20 +0,0 @@ -#include - -FUNC(memcpy) - mov %rdx, %rcx - mov %rdi, %rax - /* - * We need to be careful here: memcpy() is involved in alternatives - * patching, so the code doing the actual copying (i.e. past setting - * up registers) may not be subject to patching (unless further - * precautions were taken). - */ - ALTERNATIVE "and $7, %edx; shr $3, %rcx", \ - STR(rep movsb; RET), X86_FEATURE_ERMS - rep movsq - or %edx, %ecx - jz 1f - rep movsb -1: - RET -END(memcpy) diff --git a/xen/arch/x86/memset.S b/xen/arch/x86/memset.S deleted file mode 100644 index 81ec6f6ba2..0000000000 --- a/xen/arch/x86/memset.S +++ /dev/null @@ -1,30 +0,0 @@ -#include - -.macro memset - and $7, %edx - shr $3, %rcx - movzbl %sil, %esi - mov $0x0101010101010101, %rax - imul %rsi, %rax - mov %rdi, %r8 - rep stosq - or %edx, %ecx - jz 0f - rep stosb -0: - mov %r8, %rax - RET -.endm - -.macro memset_erms - mov %esi, %eax - mov %rdi, %r8 - rep stosb - mov %r8, %rax - RET -.endm - -FUNC(memset) - mov %rdx, %rcx - ALTERNATIVE memset, memset_erms, X86_FEATURE_ERMS -END(memset) -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Wed Dec 17 09:33:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 17 Dec 2025 09:33:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1188672.1509792 (Exim 4.92) (envelope-from ) id 1vVnuX-0002tp-BR; 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Wed, 17 Dec 2025 09:33:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=WpBIoFbk0qUEPaPJelCahsEHToGNqug3pd93+sr1qN4=; b=g46WOxY/6bp2vG5yiVjmG2WY0c mvHfCfqvm2LtNdoCFyrh/UmMlZqvLrlCG6KB+FG77zpTyjDYize/NAgrTuROYFDFlY9M4ahSqGLsp c93qjMYPhNJ/1e/1ocX2SXpK+A+bPqCSlHBbhhnepK91EO1Ul1lrLthcz45/H8lE4PQo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86: move {clear_,copy_,scrub-}page.S to arch-specific library Message-Id: Date: Wed, 17 Dec 2025 09:33:32 +0000 commit ebddf34aab74c0427ceceab2e81b2be113d5feb2 Author: Jan Beulich AuthorDate: Wed Dec 17 09:04:01 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 17 09:04:01 2025 +0100 x86: move {clear_,copy_,scrub-}page.S to arch-specific library These are pretty similar to the standard library memset() / memcpy(). Switch to building scrub-page.S unconditionally; the linker will simply not pick it up when not needed. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- xen/arch/x86/Makefile | 3 --- xen/arch/x86/clear_page.S | 60 ----------------------------------------- xen/arch/x86/copy_page.S | 62 ------------------------------------------- xen/arch/x86/lib/Makefile | 3 +++ xen/arch/x86/lib/clear-page.S | 60 +++++++++++++++++++++++++++++++++++++++++ xen/arch/x86/lib/copy-page.S | 62 +++++++++++++++++++++++++++++++++++++++++++ xen/arch/x86/lib/scrub-page.S | 38 ++++++++++++++++++++++++++ xen/arch/x86/scrub-page.S | 38 -------------------------- 8 files changed, 163 insertions(+), 163 deletions(-) diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index 43117c88e5..1fc651146f 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -17,8 +17,6 @@ obj-y += apic.o obj-y += bhb-thunk.o obj-y += bitops.o obj-bin-y += bzimage.init.o -obj-bin-y += clear_page.o -obj-bin-y += copy_page.o obj-y += cpu-policy.o obj-y += cpuid.o obj-$(CONFIG_PV) += compat.o @@ -57,7 +55,6 @@ obj-y += pci.o obj-y += physdev.o obj-$(CONFIG_COMPAT) += x86_64/physdev.o obj-$(CONFIG_X86_PSR) += psr.o -obj-bin-$(CONFIG_DEBUG) += scrub-page.o obj-y += setup.o obj-y += shutdown.o obj-y += smp.o diff --git a/xen/arch/x86/clear_page.S b/xen/arch/x86/clear_page.S deleted file mode 100644 index 517685711d..0000000000 --- a/xen/arch/x86/clear_page.S +++ /dev/null @@ -1,60 +0,0 @@ - .file __FILE__ - -#include - -#include -#include - - .macro clear_page_sse2 - mov $PAGE_SIZE/32, %ecx - xor %eax,%eax - -0: movnti %rax, (%rdi) - movnti %rax, 8(%rdi) - movnti %rax, 16(%rdi) - movnti %rax, 24(%rdi) - add $32, %rdi - sub $1, %ecx - jnz 0b - - sfence - RET - .endm - - .macro clear_page_clzero - mov %rdi, %rax - mov $PAGE_SIZE/64, %ecx - .globl clear_page_clzero_post_count -clear_page_clzero_post_count: - -0: clzero - sub $-64, %rax - .globl clear_page_clzero_post_neg_size -clear_page_clzero_post_neg_size: - sub $1, %ecx - jnz 0b - - sfence - RET - .endm - -FUNC(clear_page_cold) - ALTERNATIVE clear_page_sse2, clear_page_clzero, X86_FEATURE_CLZERO -END(clear_page_cold) - - .macro clear_page_stosb - mov $PAGE_SIZE, %ecx - xor %eax,%eax - rep stosb - .endm - - .macro clear_page_stosq - mov $PAGE_SIZE/8, %ecx - xor %eax, %eax - rep stosq - .endm - -FUNC(clear_page_hot) - ALTERNATIVE clear_page_stosq, clear_page_stosb, X86_FEATURE_ERMS - RET -END(clear_page_hot) diff --git a/xen/arch/x86/copy_page.S b/xen/arch/x86/copy_page.S deleted file mode 100644 index 0e09f0824a..0000000000 --- a/xen/arch/x86/copy_page.S +++ /dev/null @@ -1,62 +0,0 @@ - .file __FILE__ - -#include - -#include -#include - -#define src_reg %rsi -#define dst_reg %rdi -#define WORD_SIZE 8 -#define tmp1_reg %r8 -#define tmp2_reg %r9 -#define tmp3_reg %r10 -#define tmp4_reg %r11 - -FUNC(copy_page_cold) - mov $PAGE_SIZE/(4*WORD_SIZE)-3, %ecx - - prefetchnta 2*4*WORD_SIZE(src_reg) - mov (src_reg), tmp1_reg - mov WORD_SIZE(src_reg), tmp2_reg - mov 2*WORD_SIZE(src_reg), tmp3_reg - mov 3*WORD_SIZE(src_reg), tmp4_reg - -0: prefetchnta 3*4*WORD_SIZE(src_reg) -1: add $4*WORD_SIZE, src_reg - movnti tmp1_reg, (dst_reg) - mov (src_reg), tmp1_reg - dec %ecx - movnti tmp2_reg, WORD_SIZE(dst_reg) - mov WORD_SIZE(src_reg), tmp2_reg - movnti tmp3_reg, 2*WORD_SIZE(dst_reg) - mov 2*WORD_SIZE(src_reg), tmp3_reg - movnti tmp4_reg, 3*WORD_SIZE(dst_reg) - lea 4*WORD_SIZE(dst_reg), dst_reg - mov 3*WORD_SIZE(src_reg), tmp4_reg - jg 0b - jpe 1b - - movnti tmp1_reg, (dst_reg) - movnti tmp2_reg, WORD_SIZE(dst_reg) - movnti tmp3_reg, 2*WORD_SIZE(dst_reg) - movnti tmp4_reg, 3*WORD_SIZE(dst_reg) - - sfence - RET -END(copy_page_cold) - - .macro copy_page_movsb - mov $PAGE_SIZE, %ecx - rep movsb - .endm - - .macro copy_page_movsq - mov $PAGE_SIZE/8, %ecx - rep movsq - .endm - -FUNC(copy_page_hot) - ALTERNATIVE copy_page_movsq, copy_page_movsb, X86_FEATURE_ERMS - RET -END(copy_page_hot) diff --git a/xen/arch/x86/lib/Makefile b/xen/arch/x86/lib/Makefile index a5169f5e19..b9a65c662a 100644 --- a/xen/arch/x86/lib/Makefile +++ b/xen/arch/x86/lib/Makefile @@ -1,5 +1,8 @@ +lib-y += clear-page.o lib-y += copy-guest.o +lib-y += copy-page.o lib-y += copy-unsafe.o lib-y += generic-hweightl.o lib-y += memcpy.o lib-y += memset.o +lib-y += scrub-page.o diff --git a/xen/arch/x86/lib/clear-page.S b/xen/arch/x86/lib/clear-page.S new file mode 100644 index 0000000000..517685711d --- /dev/null +++ b/xen/arch/x86/lib/clear-page.S @@ -0,0 +1,60 @@ + .file __FILE__ + +#include + +#include +#include + + .macro clear_page_sse2 + mov $PAGE_SIZE/32, %ecx + xor %eax,%eax + +0: movnti %rax, (%rdi) + movnti %rax, 8(%rdi) + movnti %rax, 16(%rdi) + movnti %rax, 24(%rdi) + add $32, %rdi + sub $1, %ecx + jnz 0b + + sfence + RET + .endm + + .macro clear_page_clzero + mov %rdi, %rax + mov $PAGE_SIZE/64, %ecx + .globl clear_page_clzero_post_count +clear_page_clzero_post_count: + +0: clzero + sub $-64, %rax + .globl clear_page_clzero_post_neg_size +clear_page_clzero_post_neg_size: + sub $1, %ecx + jnz 0b + + sfence + RET + .endm + +FUNC(clear_page_cold) + ALTERNATIVE clear_page_sse2, clear_page_clzero, X86_FEATURE_CLZERO +END(clear_page_cold) + + .macro clear_page_stosb + mov $PAGE_SIZE, %ecx + xor %eax,%eax + rep stosb + .endm + + .macro clear_page_stosq + mov $PAGE_SIZE/8, %ecx + xor %eax, %eax + rep stosq + .endm + +FUNC(clear_page_hot) + ALTERNATIVE clear_page_stosq, clear_page_stosb, X86_FEATURE_ERMS + RET +END(clear_page_hot) diff --git a/xen/arch/x86/lib/copy-page.S b/xen/arch/x86/lib/copy-page.S new file mode 100644 index 0000000000..0e09f0824a --- /dev/null +++ b/xen/arch/x86/lib/copy-page.S @@ -0,0 +1,62 @@ + .file __FILE__ + +#include + +#include +#include + +#define src_reg %rsi +#define dst_reg %rdi +#define WORD_SIZE 8 +#define tmp1_reg %r8 +#define tmp2_reg %r9 +#define tmp3_reg %r10 +#define tmp4_reg %r11 + +FUNC(copy_page_cold) + mov $PAGE_SIZE/(4*WORD_SIZE)-3, %ecx + + prefetchnta 2*4*WORD_SIZE(src_reg) + mov (src_reg), tmp1_reg + mov WORD_SIZE(src_reg), tmp2_reg + mov 2*WORD_SIZE(src_reg), tmp3_reg + mov 3*WORD_SIZE(src_reg), tmp4_reg + +0: prefetchnta 3*4*WORD_SIZE(src_reg) +1: add $4*WORD_SIZE, src_reg + movnti tmp1_reg, (dst_reg) + mov (src_reg), tmp1_reg + dec %ecx + movnti tmp2_reg, WORD_SIZE(dst_reg) + mov WORD_SIZE(src_reg), tmp2_reg + movnti tmp3_reg, 2*WORD_SIZE(dst_reg) + mov 2*WORD_SIZE(src_reg), tmp3_reg + movnti tmp4_reg, 3*WORD_SIZE(dst_reg) + lea 4*WORD_SIZE(dst_reg), dst_reg + mov 3*WORD_SIZE(src_reg), tmp4_reg + jg 0b + jpe 1b + + movnti tmp1_reg, (dst_reg) + movnti tmp2_reg, WORD_SIZE(dst_reg) + movnti tmp3_reg, 2*WORD_SIZE(dst_reg) + movnti tmp4_reg, 3*WORD_SIZE(dst_reg) + + sfence + RET +END(copy_page_cold) + + .macro copy_page_movsb + mov $PAGE_SIZE, %ecx + rep movsb + .endm + + .macro copy_page_movsq + mov $PAGE_SIZE/8, %ecx + rep movsq + .endm + +FUNC(copy_page_hot) + ALTERNATIVE copy_page_movsq, copy_page_movsb, X86_FEATURE_ERMS + RET +END(copy_page_hot) diff --git a/xen/arch/x86/lib/scrub-page.S b/xen/arch/x86/lib/scrub-page.S new file mode 100644 index 0000000000..efdcdab974 --- /dev/null +++ b/xen/arch/x86/lib/scrub-page.S @@ -0,0 +1,38 @@ + .file __FILE__ + +#include +#include +#include + +FUNC(scrub_page_cold) + mov $PAGE_SIZE/32, %ecx + mov $SCRUB_PATTERN, %rax + +0: movnti %rax, (%rdi) + movnti %rax, 8(%rdi) + movnti %rax, 16(%rdi) + movnti %rax, 24(%rdi) + add $32, %rdi + sub $1, %ecx + jnz 0b + + sfence + RET +END(scrub_page_cold) + + .macro scrub_page_stosb + mov $PAGE_SIZE, %ecx + mov $SCRUB_BYTE_PATTERN, %eax + rep stosb + .endm + + .macro scrub_page_stosq + mov $PAGE_SIZE/8, %ecx + mov $SCRUB_PATTERN, %rax + rep stosq + .endm + +FUNC(scrub_page_hot) + ALTERNATIVE scrub_page_stosq, scrub_page_stosb, X86_FEATURE_ERMS + RET +END(scrub_page_hot) diff --git a/xen/arch/x86/scrub-page.S b/xen/arch/x86/scrub-page.S deleted file mode 100644 index efdcdab974..0000000000 --- a/xen/arch/x86/scrub-page.S +++ /dev/null @@ -1,38 +0,0 @@ - .file __FILE__ - -#include -#include -#include - -FUNC(scrub_page_cold) - mov $PAGE_SIZE/32, %ecx - mov $SCRUB_PATTERN, %rax - -0: movnti %rax, (%rdi) - movnti %rax, 8(%rdi) - movnti %rax, 16(%rdi) - movnti %rax, 24(%rdi) - add $32, %rdi - sub $1, %ecx - jnz 0b - - sfence - RET -END(scrub_page_cold) - - .macro scrub_page_stosb - mov $PAGE_SIZE, %ecx - mov $SCRUB_BYTE_PATTERN, %eax - rep stosb - .endm - - .macro scrub_page_stosq - mov $PAGE_SIZE/8, %ecx - mov $SCRUB_PATTERN, %rax - rep stosq - .endm - -FUNC(scrub_page_hot) - ALTERNATIVE scrub_page_stosq, scrub_page_stosb, X86_FEATURE_ERMS - RET -END(scrub_page_hot) -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Wed Dec 17 11:33:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 17 Dec 2025 11:33:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1188737.1509814 (Exim 4.92) (envelope-from ) id 1vVpmA-0000rp-Tn; Wed, 17 Dec 2025 11:33:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1188737.1509814; Wed, 17 Dec 2025 11:33:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVpmA-0000ri-R8; Wed, 17 Dec 2025 11:33:02 +0000 Received: by outflank-mailman (input) for mailman id 1188737; Wed, 17 Dec 2025 11:33:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVpm9-0000rc-N2 for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 11:33:01 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vVpm9-00EMpR-16 for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 11:33:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vVpm9-00DuDh-1s for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 11:33:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=/Ie8F3UlTsa2Yjpw/x7B963Z/IDfNbAmx7bRywmjMVw=; b=lHH/UvmsqB8WB3WNwOattoJpjw TzZawPxebQ3J4vhsPQZ6D1DUqRS+fZkE6yaO13B74yRGn2GnW4fj03ff0VbYfslRTqPGscal4IqEE bdgG1NLUYxettXia9a7F1C+dFvGPt4wlLzdrLXEV+bMbtrVt7T8OQqXWYPb0V7z2enIw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] misra: extend toolchain assumption about source character set Message-Id: Date: Wed, 17 Dec 2025 11:33:01 +0000 commit c380923a52e6bb92732bec65be9d9d0a542c694c Author: Nicola Vetrini AuthorDate: Wed Dec 17 09:02:09 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 17 09:02:09 2025 +0100 misra: extend toolchain assumption about source character set Similar to the ARM64 compiler, the same assumptions can be made about the X86_64 toolchain. No functional change. Signed-off-by: Nicola Vetrini Acked-by: Stefano Stabellini --- automation/eclair_analysis/ECLAIR/toolchain.ecl | 1 + docs/misra/C-language-toolchain.rst | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/automation/eclair_analysis/ECLAIR/toolchain.ecl b/automation/eclair_analysis/ECLAIR/toolchain.ecl index 842f8377e5..4bc88aa029 100644 --- a/automation/eclair_analysis/ECLAIR/toolchain.ecl +++ b/automation/eclair_analysis/ECLAIR/toolchain.ecl @@ -210,6 +210,7 @@ ext_sizeof_alignof_void_type" -doc_begin="See Section \"1.1 Character sets\" of "CPP_MANUAL". We assume the locale is not restricting any UTF-8 characters being part of the source character set." -config=STD.charset,behavior={c99, GCC_ARM64, "utf8"} +-config=STD.charset,behavior={c99, GCC_X86_64, "utf8"} -doc_end -doc_begin="See Section \"4.3 Identifiers\" of "GCC_MANUAL"." diff --git a/docs/misra/C-language-toolchain.rst b/docs/misra/C-language-toolchain.rst index cb81f5c098..ec0c9953be 100644 --- a/docs/misra/C-language-toolchain.rst +++ b/docs/misra/C-language-toolchain.rst @@ -400,7 +400,7 @@ The table columns are as follows: - See Section "4.15 Architecture" of GCC_MANUAL and Section "3.1.2 Data Representation" of X86_64_ABI_MANUAL. * - Character not in the basic source character set is encountered in a source file, except in an identifier, a character constant, a string literal, a header name, a comment, or a preprocessing token that is never converted to a token - - ARM64 + - ARM64, X86_64 - UTF-8 - See Section "1.1 Character sets" of CPP_MANUAL. We assume the locale is not restricting any UTF-8 characters being part of the source character set. -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Dec 17 11:33:12 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 17 Dec 2025 11:33:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1188738.1509818 (Exim 4.92) (envelope-from ) id 1vVpmK-0000tc-VI; Wed, 17 Dec 2025 11:33:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1188738.1509818; Wed, 17 Dec 2025 11:33:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVpmK-0000tU-Sf; Wed, 17 Dec 2025 11:33:12 +0000 Received: by outflank-mailman (input) for mailman id 1188738; Wed, 17 Dec 2025 11:33:11 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVpmJ-0000tI-QD for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 11:33:11 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vVpmJ-00EMpk-1b for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 11:33:11 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vVpmJ-00DvLU-2E for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 11:33:11 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=CCvyZ+Cm2vSbVUYhpBFZJNTw7Ut0qMvdpXMkFv150LQ=; b=N1p4wJcUhVesoKvVZCcrYASlWq Gdo/hVAzK2cJ726d7AnpL319bhbjuVZ/uPwB1vGo1LjfjL4LuXDIg8rt4y95cTpj1StLujEdkQU9K d1XBOICQUjKtzy7GRpjguBXPQ0sBJJKOga5iAkwZKj5x8G1OFCast6RUR0hlICjoBNQk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: move / split usercopy.c to / into arch-specific library Message-Id: Date: Wed, 17 Dec 2025 11:33:11 +0000 commit 7370966d1cb7e53e7bb55fe0d4d16068e9b81a1f Author: Jan Beulich AuthorDate: Wed Dec 17 09:02:37 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 17 09:02:37 2025 +0100 x86: move / split usercopy.c to / into arch-specific library The file wasn't correctly named for our purposes anyway. Split it into its "guest" and "unsafe" parts, thus allowing the latter to not be linked in at all (for presently having no caller). The building of the "guest" part can then (later) become conditional upon PV=y. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper Reviewed-by: Grygorii Strashko --- xen/arch/x86/Makefile | 4 -- xen/arch/x86/lib/Makefile | 2 + xen/arch/x86/lib/copy-guest.c | 152 +++++++++++++++++++++++++++++++++++++++ xen/arch/x86/lib/copy-unsafe.c | 22 ++++++ xen/arch/x86/usercopy.c | 160 ----------------------------------------- 5 files changed, 176 insertions(+), 164 deletions(-) diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index 61e2293a46..dfb258d7ac 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -72,7 +72,6 @@ obj-y += time.o obj-y += traps-setup.o obj-y += traps.o obj-$(CONFIG_INTEL) += tsx.o -obj-y += usercopy.o obj-y += x86_emulate.o obj-$(CONFIG_TBOOT) += tboot.o obj-y += hpet.o @@ -93,9 +92,6 @@ hostprogs-y += efi/mkreloc $(obj)/efi/mkreloc: HOSTCFLAGS += -I$(srctree)/include -# Allows usercopy.c to include itself -$(obj)/usercopy.o: CFLAGS-y += -iquote . - ifneq ($(CONFIG_HVM),y) $(obj)/x86_emulate.o: CFLAGS-y += -Wno-unused-label endif diff --git a/xen/arch/x86/lib/Makefile b/xen/arch/x86/lib/Makefile index ddf7e19bdc..8fe2dfd885 100644 --- a/xen/arch/x86/lib/Makefile +++ b/xen/arch/x86/lib/Makefile @@ -1 +1,3 @@ +lib-y += copy-guest.o +lib-y += copy-unsafe.o lib-y += generic-hweightl.o diff --git a/xen/arch/x86/lib/copy-guest.c b/xen/arch/x86/lib/copy-guest.c new file mode 100644 index 0000000000..73284b3f14 --- /dev/null +++ b/xen/arch/x86/lib/copy-guest.c @@ -0,0 +1,152 @@ +/* + * User address space access functions. + * + * Copyright 1997 Andi Kleen + * Copyright 1997 Linus Torvalds + * Copyright 2002 Andi Kleen + */ + +#include + +#include + +#ifndef GUARD +# define GUARD UA_KEEP +#endif + +unsigned int copy_to_guest_ll(void __user *to, const void *from, unsigned int n) +{ + GUARD(unsigned dummy); + + stac(); + asm_inline volatile ( + GUARD( + " guest_access_mask_ptr %[to], %q[scratch1], %q[scratch2]\n" + ) + "1: rep movsb\n" + "2:\n" + _ASM_EXTABLE(1b, 2b) + : [cnt] "+c" (n), [to] "+D" (to), [from] "+S" (from) + GUARD(, [scratch1] "=&r" (dummy), [scratch2] "=&r" (dummy)) + :: "memory" ); + clac(); + + return n; +} + +unsigned int copy_from_guest_ll(void *to, const void __user *from, unsigned int n) +{ + unsigned dummy; + + stac(); + asm_inline volatile ( + GUARD( + " guest_access_mask_ptr %[from], %q[scratch1], %q[scratch2]\n" + ) + "1: rep movsb\n" + "2:\n" + ".section .fixup,\"ax\"\n" + "6: mov %[cnt], %k[from]\n" + " xchg %%eax, %[aux]\n" + " xor %%eax, %%eax\n" + " rep stosb\n" + " xchg %[aux], %%eax\n" + " mov %k[from], %[cnt]\n" + " jmp 2b\n" + ".previous\n" + _ASM_EXTABLE(1b, 6b) + : [cnt] "+c" (n), [to] "+D" (to), [from] "+S" (from), + [aux] "=&r" (dummy) + GUARD(, [scratch1] "=&r" (dummy), [scratch2] "=&r" (dummy)) + :: "memory" ); + clac(); + + return n; +} + +#if GUARD(1) + 0 + +/** + * copy_to_guest_pv: - Copy a block of data into PV guest space. + * @to: Destination address, in PV guest space. + * @from: Source address, in hypervisor space. + * @n: Number of bytes to copy. + * + * Copy data from hypervisor space to PV guest space. + * + * Returns number of bytes that could not be copied. + * On success, this will be zero. + */ +unsigned int copy_to_guest_pv(void __user *to, const void *from, unsigned int n) +{ + if ( access_ok(to, n) ) + n = __copy_to_guest_pv(to, from, n); + return n; +} + +/** + * clear_guest_pv: - Zero a block of memory in PV guest space. + * @to: Destination address, in PV guest space. + * @n: Number of bytes to zero. + * + * Zero a block of memory in PV guest space. + * + * Returns number of bytes that could not be cleared. + * On success, this will be zero. + */ +unsigned int clear_guest_pv(void __user *to, unsigned int n) +{ + if ( access_ok(to, n) ) + { + long dummy; + + stac(); + asm_inline volatile ( + " guest_access_mask_ptr %[to], %[scratch1], %[scratch2]\n" + "1: rep stosb\n" + "2:\n" + _ASM_EXTABLE(1b,2b) + : [cnt] "+c" (n), [to] "+D" (to), [scratch1] "=&r" (dummy), + [scratch2] "=&r" (dummy) + : "a" (0) ); + clac(); + } + + return n; +} + +/** + * copy_from_guest_pv: - Copy a block of data from PV guest space. + * @to: Destination address, in hypervisor space. + * @from: Source address, in PV guest space. + * @n: Number of bytes to copy. + * + * Copy data from PV guest space to hypervisor space. + * + * Returns number of bytes that could not be copied. + * On success, this will be zero. + * + * If some data could not be copied, this function will pad the copied + * data to the requested size using zero bytes. + */ +unsigned int copy_from_guest_pv(void *to, const void __user *from, + unsigned int n) +{ + if ( access_ok(from, n) ) + n = __copy_from_guest_pv(to, from, n); + else + memset(to, 0, n); + return n; +} + +#endif /* GUARD(1) */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/arch/x86/lib/copy-unsafe.c b/xen/arch/x86/lib/copy-unsafe.c new file mode 100644 index 0000000000..a51500370f --- /dev/null +++ b/xen/arch/x86/lib/copy-unsafe.c @@ -0,0 +1,22 @@ +/* + * "Unsafe" access functions. + */ + +#include + +#define GUARD UA_DROP +#define copy_to_guest_ll copy_to_unsafe_ll +#define copy_from_guest_ll copy_from_unsafe_ll +#undef __user +#define __user +#include "copy-guest.c" + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/arch/x86/usercopy.c b/xen/arch/x86/usercopy.c deleted file mode 100644 index a24b52cc66..0000000000 --- a/xen/arch/x86/usercopy.c +++ /dev/null @@ -1,160 +0,0 @@ -/* - * User address space access functions. - * - * Copyright 1997 Andi Kleen - * Copyright 1997 Linus Torvalds - * Copyright 2002 Andi Kleen - */ - -#include -#include -#include - -#ifndef GUARD -# define GUARD UA_KEEP -#endif - -unsigned int copy_to_guest_ll(void __user *to, const void *from, unsigned int n) -{ - GUARD(unsigned dummy); - - stac(); - asm_inline volatile ( - GUARD( - " guest_access_mask_ptr %[to], %q[scratch1], %q[scratch2]\n" - ) - "1: rep movsb\n" - "2:\n" - _ASM_EXTABLE(1b, 2b) - : [cnt] "+c" (n), [to] "+D" (to), [from] "+S" (from) - GUARD(, [scratch1] "=&r" (dummy), [scratch2] "=&r" (dummy)) - :: "memory" ); - clac(); - - return n; -} - -unsigned int copy_from_guest_ll(void *to, const void __user *from, unsigned int n) -{ - unsigned dummy; - - stac(); - asm_inline volatile ( - GUARD( - " guest_access_mask_ptr %[from], %q[scratch1], %q[scratch2]\n" - ) - "1: rep movsb\n" - "2:\n" - ".section .fixup,\"ax\"\n" - "6: mov %[cnt], %k[from]\n" - " xchg %%eax, %[aux]\n" - " xor %%eax, %%eax\n" - " rep stosb\n" - " xchg %[aux], %%eax\n" - " mov %k[from], %[cnt]\n" - " jmp 2b\n" - ".previous\n" - _ASM_EXTABLE(1b, 6b) - : [cnt] "+c" (n), [to] "+D" (to), [from] "+S" (from), - [aux] "=&r" (dummy) - GUARD(, [scratch1] "=&r" (dummy), [scratch2] "=&r" (dummy)) - :: "memory" ); - clac(); - - return n; -} - -#if GUARD(1) + 0 - -/** - * copy_to_guest_pv: - Copy a block of data into PV guest space. - * @to: Destination address, in PV guest space. - * @from: Source address, in hypervisor space. - * @n: Number of bytes to copy. - * - * Copy data from hypervisor space to PV guest space. - * - * Returns number of bytes that could not be copied. - * On success, this will be zero. - */ -unsigned int copy_to_guest_pv(void __user *to, const void *from, unsigned int n) -{ - if ( access_ok(to, n) ) - n = __copy_to_guest_pv(to, from, n); - return n; -} - -/** - * clear_guest_pv: - Zero a block of memory in PV guest space. - * @to: Destination address, in PV guest space. - * @n: Number of bytes to zero. - * - * Zero a block of memory in PV guest space. - * - * Returns number of bytes that could not be cleared. - * On success, this will be zero. - */ -unsigned int clear_guest_pv(void __user *to, unsigned int n) -{ - if ( access_ok(to, n) ) - { - long dummy; - - stac(); - asm_inline volatile ( - " guest_access_mask_ptr %[to], %[scratch1], %[scratch2]\n" - "1: rep stosb\n" - "2:\n" - _ASM_EXTABLE(1b,2b) - : [cnt] "+c" (n), [to] "+D" (to), [scratch1] "=&r" (dummy), - [scratch2] "=&r" (dummy) - : "a" (0) ); - clac(); - } - - return n; -} - -/** - * copy_from_guest_pv: - Copy a block of data from PV guest space. - * @to: Destination address, in hypervisor space. - * @from: Source address, in PV guest space. - * @n: Number of bytes to copy. - * - * Copy data from PV guest space to hypervisor space. - * - * Returns number of bytes that could not be copied. - * On success, this will be zero. - * - * If some data could not be copied, this function will pad the copied - * data to the requested size using zero bytes. - */ -unsigned int copy_from_guest_pv(void *to, const void __user *from, - unsigned int n) -{ - if ( access_ok(from, n) ) - n = __copy_from_guest_pv(to, from, n); - else - memset(to, 0, n); - return n; -} - -# undef GUARD -# define GUARD UA_DROP -# define copy_to_guest_ll copy_to_unsafe_ll -# define copy_from_guest_ll copy_from_unsafe_ll -# undef __user -# define __user -# include __FILE__ - -#endif /* GUARD(1) */ - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * tab-width: 4 - * indent-tabs-mode: nil - * End: - */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Dec 17 11:33:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 17 Dec 2025 11:33:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1188739.1509822 (Exim 4.92) (envelope-from ) id 1vVpmV-0000vf-0T; Wed, 17 Dec 2025 11:33:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1188739.1509822; Wed, 17 Dec 2025 11:33:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVpmU-0000vV-U4; Wed, 17 Dec 2025 11:33:22 +0000 Received: by outflank-mailman (input) for mailman id 1188739; Wed, 17 Dec 2025 11:33:21 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVpmT-0000vM-TA for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 11:33:21 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vVpmT-00EMpq-1u for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 11:33:21 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vVpmT-00DwcJ-2i for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 11:33:21 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=1EXlGweHjBWC8CkhDWIigjbvuZRJCvI+vISlE4KmKSs=; b=Xz+O09BFIQZkGNU9gjmyafcuJn +XOPOCBTZuT78x4xYTD9kfsRUXJPiPbAFooWIiaScIifVUPLrELLmnZ6tjgmw6vgbcA+7ygXjMxJV t3i4eoLmL0HnRrBqTbc/km9CZ2p0FcJCrwQTim4eD0H/wlI65KIDoiLEp9dqXMlY7UhE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: move mem{cpy,set}.S to arch-specific library Message-Id: Date: Wed, 17 Dec 2025 11:33:21 +0000 commit 54ad9eb26a7e98d8ac80e8bbdea1c793934ee1ff Author: Jan Beulich AuthorDate: Wed Dec 17 09:03:29 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 17 09:03:29 2025 +0100 x86: move mem{cpy,set}.S to arch-specific library If not these, what else are library functions. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- xen/arch/x86/Makefile | 2 -- xen/arch/x86/lib/Makefile | 2 ++ xen/arch/x86/lib/memcpy.S | 20 ++++++++++++++++++++ xen/arch/x86/lib/memset.S | 30 ++++++++++++++++++++++++++++++ xen/arch/x86/memcpy.S | 20 -------------------- xen/arch/x86/memset.S | 30 ------------------------------ 6 files changed, 52 insertions(+), 52 deletions(-) diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index dfb258d7ac..43117c88e5 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -48,8 +48,6 @@ obj-$(CONFIG_RETURN_THUNK) += indirect-thunk.o obj-$(CONFIG_PV) += ioport_emulate.o obj-y += irq.o obj-$(CONFIG_KEXEC) += machine_kexec.o -obj-y += memcpy.o -obj-y += memset.o obj-y += mm.o x86_64/mm.o obj-$(CONFIG_VM_EVENT) += monitor.o obj-y += mpparse.o diff --git a/xen/arch/x86/lib/Makefile b/xen/arch/x86/lib/Makefile index 8fe2dfd885..a5169f5e19 100644 --- a/xen/arch/x86/lib/Makefile +++ b/xen/arch/x86/lib/Makefile @@ -1,3 +1,5 @@ lib-y += copy-guest.o lib-y += copy-unsafe.o lib-y += generic-hweightl.o +lib-y += memcpy.o +lib-y += memset.o diff --git a/xen/arch/x86/lib/memcpy.S b/xen/arch/x86/lib/memcpy.S new file mode 100644 index 0000000000..aaee012126 --- /dev/null +++ b/xen/arch/x86/lib/memcpy.S @@ -0,0 +1,20 @@ +#include + +FUNC(memcpy) + mov %rdx, %rcx + mov %rdi, %rax + /* + * We need to be careful here: memcpy() is involved in alternatives + * patching, so the code doing the actual copying (i.e. past setting + * up registers) may not be subject to patching (unless further + * precautions were taken). + */ + ALTERNATIVE "and $7, %edx; shr $3, %rcx", \ + STR(rep movsb; RET), X86_FEATURE_ERMS + rep movsq + or %edx, %ecx + jz 1f + rep movsb +1: + RET +END(memcpy) diff --git a/xen/arch/x86/lib/memset.S b/xen/arch/x86/lib/memset.S new file mode 100644 index 0000000000..81ec6f6ba2 --- /dev/null +++ b/xen/arch/x86/lib/memset.S @@ -0,0 +1,30 @@ +#include + +.macro memset + and $7, %edx + shr $3, %rcx + movzbl %sil, %esi + mov $0x0101010101010101, %rax + imul %rsi, %rax + mov %rdi, %r8 + rep stosq + or %edx, %ecx + jz 0f + rep stosb +0: + mov %r8, %rax + RET +.endm + +.macro memset_erms + mov %esi, %eax + mov %rdi, %r8 + rep stosb + mov %r8, %rax + RET +.endm + +FUNC(memset) + mov %rdx, %rcx + ALTERNATIVE memset, memset_erms, X86_FEATURE_ERMS +END(memset) diff --git a/xen/arch/x86/memcpy.S b/xen/arch/x86/memcpy.S deleted file mode 100644 index aaee012126..0000000000 --- a/xen/arch/x86/memcpy.S +++ /dev/null @@ -1,20 +0,0 @@ -#include - -FUNC(memcpy) - mov %rdx, %rcx - mov %rdi, %rax - /* - * We need to be careful here: memcpy() is involved in alternatives - * patching, so the code doing the actual copying (i.e. past setting - * up registers) may not be subject to patching (unless further - * precautions were taken). - */ - ALTERNATIVE "and $7, %edx; shr $3, %rcx", \ - STR(rep movsb; RET), X86_FEATURE_ERMS - rep movsq - or %edx, %ecx - jz 1f - rep movsb -1: - RET -END(memcpy) diff --git a/xen/arch/x86/memset.S b/xen/arch/x86/memset.S deleted file mode 100644 index 81ec6f6ba2..0000000000 --- a/xen/arch/x86/memset.S +++ /dev/null @@ -1,30 +0,0 @@ -#include - -.macro memset - and $7, %edx - shr $3, %rcx - movzbl %sil, %esi - mov $0x0101010101010101, %rax - imul %rsi, %rax - mov %rdi, %r8 - rep stosq - or %edx, %ecx - jz 0f - rep stosb -0: - mov %r8, %rax - RET -.endm - -.macro memset_erms - mov %esi, %eax - mov %rdi, %r8 - rep stosb - mov %r8, %rax - RET -.endm - -FUNC(memset) - mov %rdx, %rcx - ALTERNATIVE memset, memset_erms, X86_FEATURE_ERMS -END(memset) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Dec 17 11:33:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 17 Dec 2025 11:33:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1188740.1509826 (Exim 4.92) (envelope-from ) id 1vVpmf-0000xz-1w; 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Wed, 17 Dec 2025 11:33:31 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=l/G09w4JA2EiUo78QLEFs7jIVg411cDv4lU634owQWc=; b=cdqiZm3DR4GjOIY1NM99OnVltD oPpqo6sxxQOrRdTk9Qv9QHrb+Z5mvjvxO2GwCdnTHSXfV9ujqj0pgk+qsxajF3gf+4GmXRgFdMDmZ jrX3kTeBjnjoKaMJZSQSSJtl5o84yTIxjqXhgjb1FGtYFRBcG2v6f9Bby7bEtQEfYLsM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: move {clear_,copy_,scrub-}page.S to arch-specific library Message-Id: Date: Wed, 17 Dec 2025 11:33:31 +0000 commit ebddf34aab74c0427ceceab2e81b2be113d5feb2 Author: Jan Beulich AuthorDate: Wed Dec 17 09:04:01 2025 +0100 Commit: Jan Beulich CommitDate: Wed Dec 17 09:04:01 2025 +0100 x86: move {clear_,copy_,scrub-}page.S to arch-specific library These are pretty similar to the standard library memset() / memcpy(). Switch to building scrub-page.S unconditionally; the linker will simply not pick it up when not needed. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- xen/arch/x86/Makefile | 3 --- xen/arch/x86/clear_page.S | 60 ----------------------------------------- xen/arch/x86/copy_page.S | 62 ------------------------------------------- xen/arch/x86/lib/Makefile | 3 +++ xen/arch/x86/lib/clear-page.S | 60 +++++++++++++++++++++++++++++++++++++++++ xen/arch/x86/lib/copy-page.S | 62 +++++++++++++++++++++++++++++++++++++++++++ xen/arch/x86/lib/scrub-page.S | 38 ++++++++++++++++++++++++++ xen/arch/x86/scrub-page.S | 38 -------------------------- 8 files changed, 163 insertions(+), 163 deletions(-) diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index 43117c88e5..1fc651146f 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -17,8 +17,6 @@ obj-y += apic.o obj-y += bhb-thunk.o obj-y += bitops.o obj-bin-y += bzimage.init.o -obj-bin-y += clear_page.o -obj-bin-y += copy_page.o obj-y += cpu-policy.o obj-y += cpuid.o obj-$(CONFIG_PV) += compat.o @@ -57,7 +55,6 @@ obj-y += pci.o obj-y += physdev.o obj-$(CONFIG_COMPAT) += x86_64/physdev.o obj-$(CONFIG_X86_PSR) += psr.o -obj-bin-$(CONFIG_DEBUG) += scrub-page.o obj-y += setup.o obj-y += shutdown.o obj-y += smp.o diff --git a/xen/arch/x86/clear_page.S b/xen/arch/x86/clear_page.S deleted file mode 100644 index 517685711d..0000000000 --- a/xen/arch/x86/clear_page.S +++ /dev/null @@ -1,60 +0,0 @@ - .file __FILE__ - -#include - -#include -#include - - .macro clear_page_sse2 - mov $PAGE_SIZE/32, %ecx - xor %eax,%eax - -0: movnti %rax, (%rdi) - movnti %rax, 8(%rdi) - movnti %rax, 16(%rdi) - movnti %rax, 24(%rdi) - add $32, %rdi - sub $1, %ecx - jnz 0b - - sfence - RET - .endm - - .macro clear_page_clzero - mov %rdi, %rax - mov $PAGE_SIZE/64, %ecx - .globl clear_page_clzero_post_count -clear_page_clzero_post_count: - -0: clzero - sub $-64, %rax - .globl clear_page_clzero_post_neg_size -clear_page_clzero_post_neg_size: - sub $1, %ecx - jnz 0b - - sfence - RET - .endm - -FUNC(clear_page_cold) - ALTERNATIVE clear_page_sse2, clear_page_clzero, X86_FEATURE_CLZERO -END(clear_page_cold) - - .macro clear_page_stosb - mov $PAGE_SIZE, %ecx - xor %eax,%eax - rep stosb - .endm - - .macro clear_page_stosq - mov $PAGE_SIZE/8, %ecx - xor %eax, %eax - rep stosq - .endm - -FUNC(clear_page_hot) - ALTERNATIVE clear_page_stosq, clear_page_stosb, X86_FEATURE_ERMS - RET -END(clear_page_hot) diff --git a/xen/arch/x86/copy_page.S b/xen/arch/x86/copy_page.S deleted file mode 100644 index 0e09f0824a..0000000000 --- a/xen/arch/x86/copy_page.S +++ /dev/null @@ -1,62 +0,0 @@ - .file __FILE__ - -#include - -#include -#include - -#define src_reg %rsi -#define dst_reg %rdi -#define WORD_SIZE 8 -#define tmp1_reg %r8 -#define tmp2_reg %r9 -#define tmp3_reg %r10 -#define tmp4_reg %r11 - -FUNC(copy_page_cold) - mov $PAGE_SIZE/(4*WORD_SIZE)-3, %ecx - - prefetchnta 2*4*WORD_SIZE(src_reg) - mov (src_reg), tmp1_reg - mov WORD_SIZE(src_reg), tmp2_reg - mov 2*WORD_SIZE(src_reg), tmp3_reg - mov 3*WORD_SIZE(src_reg), tmp4_reg - -0: prefetchnta 3*4*WORD_SIZE(src_reg) -1: add $4*WORD_SIZE, src_reg - movnti tmp1_reg, (dst_reg) - mov (src_reg), tmp1_reg - dec %ecx - movnti tmp2_reg, WORD_SIZE(dst_reg) - mov WORD_SIZE(src_reg), tmp2_reg - movnti tmp3_reg, 2*WORD_SIZE(dst_reg) - mov 2*WORD_SIZE(src_reg), tmp3_reg - movnti tmp4_reg, 3*WORD_SIZE(dst_reg) - lea 4*WORD_SIZE(dst_reg), dst_reg - mov 3*WORD_SIZE(src_reg), tmp4_reg - jg 0b - jpe 1b - - movnti tmp1_reg, (dst_reg) - movnti tmp2_reg, WORD_SIZE(dst_reg) - movnti tmp3_reg, 2*WORD_SIZE(dst_reg) - movnti tmp4_reg, 3*WORD_SIZE(dst_reg) - - sfence - RET -END(copy_page_cold) - - .macro copy_page_movsb - mov $PAGE_SIZE, %ecx - rep movsb - .endm - - .macro copy_page_movsq - mov $PAGE_SIZE/8, %ecx - rep movsq - .endm - -FUNC(copy_page_hot) - ALTERNATIVE copy_page_movsq, copy_page_movsb, X86_FEATURE_ERMS - RET -END(copy_page_hot) diff --git a/xen/arch/x86/lib/Makefile b/xen/arch/x86/lib/Makefile index a5169f5e19..b9a65c662a 100644 --- a/xen/arch/x86/lib/Makefile +++ b/xen/arch/x86/lib/Makefile @@ -1,5 +1,8 @@ +lib-y += clear-page.o lib-y += copy-guest.o +lib-y += copy-page.o lib-y += copy-unsafe.o lib-y += generic-hweightl.o lib-y += memcpy.o lib-y += memset.o +lib-y += scrub-page.o diff --git a/xen/arch/x86/lib/clear-page.S b/xen/arch/x86/lib/clear-page.S new file mode 100644 index 0000000000..517685711d --- /dev/null +++ b/xen/arch/x86/lib/clear-page.S @@ -0,0 +1,60 @@ + .file __FILE__ + +#include + +#include +#include + + .macro clear_page_sse2 + mov $PAGE_SIZE/32, %ecx + xor %eax,%eax + +0: movnti %rax, (%rdi) + movnti %rax, 8(%rdi) + movnti %rax, 16(%rdi) + movnti %rax, 24(%rdi) + add $32, %rdi + sub $1, %ecx + jnz 0b + + sfence + RET + .endm + + .macro clear_page_clzero + mov %rdi, %rax + mov $PAGE_SIZE/64, %ecx + .globl clear_page_clzero_post_count +clear_page_clzero_post_count: + +0: clzero + sub $-64, %rax + .globl clear_page_clzero_post_neg_size +clear_page_clzero_post_neg_size: + sub $1, %ecx + jnz 0b + + sfence + RET + .endm + +FUNC(clear_page_cold) + ALTERNATIVE clear_page_sse2, clear_page_clzero, X86_FEATURE_CLZERO +END(clear_page_cold) + + .macro clear_page_stosb + mov $PAGE_SIZE, %ecx + xor %eax,%eax + rep stosb + .endm + + .macro clear_page_stosq + mov $PAGE_SIZE/8, %ecx + xor %eax, %eax + rep stosq + .endm + +FUNC(clear_page_hot) + ALTERNATIVE clear_page_stosq, clear_page_stosb, X86_FEATURE_ERMS + RET +END(clear_page_hot) diff --git a/xen/arch/x86/lib/copy-page.S b/xen/arch/x86/lib/copy-page.S new file mode 100644 index 0000000000..0e09f0824a --- /dev/null +++ b/xen/arch/x86/lib/copy-page.S @@ -0,0 +1,62 @@ + .file __FILE__ + +#include + +#include +#include + +#define src_reg %rsi +#define dst_reg %rdi +#define WORD_SIZE 8 +#define tmp1_reg %r8 +#define tmp2_reg %r9 +#define tmp3_reg %r10 +#define tmp4_reg %r11 + +FUNC(copy_page_cold) + mov $PAGE_SIZE/(4*WORD_SIZE)-3, %ecx + + prefetchnta 2*4*WORD_SIZE(src_reg) + mov (src_reg), tmp1_reg + mov WORD_SIZE(src_reg), tmp2_reg + mov 2*WORD_SIZE(src_reg), tmp3_reg + mov 3*WORD_SIZE(src_reg), tmp4_reg + +0: prefetchnta 3*4*WORD_SIZE(src_reg) +1: add $4*WORD_SIZE, src_reg + movnti tmp1_reg, (dst_reg) + mov (src_reg), tmp1_reg + dec %ecx + movnti tmp2_reg, WORD_SIZE(dst_reg) + mov WORD_SIZE(src_reg), tmp2_reg + movnti tmp3_reg, 2*WORD_SIZE(dst_reg) + mov 2*WORD_SIZE(src_reg), tmp3_reg + movnti tmp4_reg, 3*WORD_SIZE(dst_reg) + lea 4*WORD_SIZE(dst_reg), dst_reg + mov 3*WORD_SIZE(src_reg), tmp4_reg + jg 0b + jpe 1b + + movnti tmp1_reg, (dst_reg) + movnti tmp2_reg, WORD_SIZE(dst_reg) + movnti tmp3_reg, 2*WORD_SIZE(dst_reg) + movnti tmp4_reg, 3*WORD_SIZE(dst_reg) + + sfence + RET +END(copy_page_cold) + + .macro copy_page_movsb + mov $PAGE_SIZE, %ecx + rep movsb + .endm + + .macro copy_page_movsq + mov $PAGE_SIZE/8, %ecx + rep movsq + .endm + +FUNC(copy_page_hot) + ALTERNATIVE copy_page_movsq, copy_page_movsb, X86_FEATURE_ERMS + RET +END(copy_page_hot) diff --git a/xen/arch/x86/lib/scrub-page.S b/xen/arch/x86/lib/scrub-page.S new file mode 100644 index 0000000000..efdcdab974 --- /dev/null +++ b/xen/arch/x86/lib/scrub-page.S @@ -0,0 +1,38 @@ + .file __FILE__ + +#include +#include +#include + +FUNC(scrub_page_cold) + mov $PAGE_SIZE/32, %ecx + mov $SCRUB_PATTERN, %rax + +0: movnti %rax, (%rdi) + movnti %rax, 8(%rdi) + movnti %rax, 16(%rdi) + movnti %rax, 24(%rdi) + add $32, %rdi + sub $1, %ecx + jnz 0b + + sfence + RET +END(scrub_page_cold) + + .macro scrub_page_stosb + mov $PAGE_SIZE, %ecx + mov $SCRUB_BYTE_PATTERN, %eax + rep stosb + .endm + + .macro scrub_page_stosq + mov $PAGE_SIZE/8, %ecx + mov $SCRUB_PATTERN, %rax + rep stosq + .endm + +FUNC(scrub_page_hot) + ALTERNATIVE scrub_page_stosq, scrub_page_stosb, X86_FEATURE_ERMS + RET +END(scrub_page_hot) diff --git a/xen/arch/x86/scrub-page.S b/xen/arch/x86/scrub-page.S deleted file mode 100644 index efdcdab974..0000000000 --- a/xen/arch/x86/scrub-page.S +++ /dev/null @@ -1,38 +0,0 @@ - .file __FILE__ - -#include -#include -#include - -FUNC(scrub_page_cold) - mov $PAGE_SIZE/32, %ecx - mov $SCRUB_PATTERN, %rax - -0: movnti %rax, (%rdi) - movnti %rax, 8(%rdi) - movnti %rax, 16(%rdi) - movnti %rax, 24(%rdi) - add $32, %rdi - sub $1, %ecx - jnz 0b - - sfence - RET -END(scrub_page_cold) - - .macro scrub_page_stosb - mov $PAGE_SIZE, %ecx - mov $SCRUB_BYTE_PATTERN, %eax - rep stosb - .endm - - .macro scrub_page_stosq - mov $PAGE_SIZE/8, %ecx - mov $SCRUB_PATTERN, %rax - rep stosq - .endm - -FUNC(scrub_page_hot) - ALTERNATIVE scrub_page_stosq, scrub_page_stosb, X86_FEATURE_ERMS - RET -END(scrub_page_hot) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Dec 17 17:44:12 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 17 Dec 2025 17:44:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189062.1510021 (Exim 4.92) (envelope-from ) id 1vVvZE-0004Qf-HM; Wed, 17 Dec 2025 17:44:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189062.1510021; Wed, 17 Dec 2025 17:44:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVvZE-0004QW-Dx; Wed, 17 Dec 2025 17:44:04 +0000 Received: by outflank-mailman (input) for mailman id 1189062; Wed, 17 Dec 2025 17:44:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVvZC-0004QQ-SW for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 17:44:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vVvZC-00EUV3-1l for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 17:44:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vVvZC-001i83-2Y for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 17:44:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=8vOO+GPUK4PfECn933Bk4UspJv2VnXSIo2TTWvnTups=; b=QC42OUIre5ue8CGVf2MRBsKJfd 459QLz46RAS8yIyzg7NjajHbb8H1gKGHZhD+HIFNVxNPN1kQq7BuejzzYefxywQX89XbcYn9OQ/Xl I+CamgFJvtRww9MjmZcNATHDnxszDr+IolvmAMF1zuTaR++I3se+/MQKEKldNn93wGyk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/domain: Disallow XENMEM_claim_pages on dying domains Message-Id: Date: Wed, 17 Dec 2025 17:44:02 +0000 commit 2379ca04feab7df40051d03f73487d9e0cef43ac Author: Andrew Cooper AuthorDate: Mon Dec 15 18:45:33 2025 +0000 Commit: Andrew Cooper CommitDate: Wed Dec 17 17:35:24 2025 +0000 xen/domain: Disallow XENMEM_claim_pages on dying domains XENMEM_claim_pages can be issued on a domain in the later stages of domain_kill(). In that case, the claimed memory is leaked, as there's no way to subsequently release the claim. Claims are intended for use during domain construction; to reserve sufficient RAM to construct the domain fully. There's no legitimate reason to be calling it on a dying domain. Fixes: 65c9792df600 ("mmu: Introduce XENMEM_claim_pages (subop of memory ops)") Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/common/memory.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/xen/common/memory.c b/xen/common/memory.c index 3688e6dd50..ae805ccbe4 100644 --- a/xen/common/memory.c +++ b/xen/common/memory.c @@ -1681,6 +1681,9 @@ long do_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg) rc = xsm_claim_pages(XSM_PRIV, d); + if ( !rc && d->is_dying ) + rc = -EINVAL; + if ( !rc ) rc = domain_set_outstanding_pages(d, reservation.nr_extents); -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Wed Dec 17 17:44:14 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 17 Dec 2025 17:44:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189063.1510024 (Exim 4.92) (envelope-from ) id 1vVvZO-0004SD-I2; Wed, 17 Dec 2025 17:44:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189063.1510024; Wed, 17 Dec 2025 17:44:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVvZO-0004S5-FQ; Wed, 17 Dec 2025 17:44:14 +0000 Received: by outflank-mailman (input) for mailman id 1189063; Wed, 17 Dec 2025 17:44:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVvZM-0004Rt-Vh for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 17:44:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vVvZM-00EUV7-29 for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 17:44:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vVvZM-001jKA-2v for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 17:44:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=TTnc3f3MVuJrZjA4KFLdN41ikaxXq5MTmz3RKLQnceg=; b=a6N5kx1jWxebMERIPvcZgk73RL DG90Ugz0TQTEc6IvTGdkPeDFkEhL4TDrk53fvaKKWYuzWw4H6ugFRsIYI+wlnjgJjbNNqnllMa8Sq O4eBqDLDMAci8Uch2PQ3bw7/IoqLc0dKsxdqtMYF7VwegOMH9C9fnN3n6dzNvX+s+2pI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] tools/libxc: Delete ENOSYS squashing in xc_domain_claim_pages() Message-Id: Date: Wed, 17 Dec 2025 17:44:12 +0000 commit 7672602df6c0f7a3d030f130a2372f1772d5ac4e Author: Andrew Cooper AuthorDate: Mon Dec 15 18:09:33 2025 +0000 Commit: Andrew Cooper CommitDate: Wed Dec 17 17:35:24 2025 +0000 tools/libxc: Delete ENOSYS squashing in xc_domain_claim_pages() It's not acceptable to hide this from the caller; the effect of doing so is to break an atomicity expectation. Only the caller can know what the appropriate safety action is in the case that the claim hypercall isn't available. Ignoring it might be the right thing to do, but xc_domain_claim_pages() cannot make this decision on behalf of all callers. Fixes: fc67e9dc0c1f ("xc: use XENMEM_claim_pages hypercall during guest creation.") Signed-off-by: Andrew Cooper Reviewed-by: Roger Pau Monné --- tools/libs/ctrl/xc_domain.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/tools/libs/ctrl/xc_domain.c b/tools/libs/ctrl/xc_domain.c index 2ddc3f4f42..01c0669c88 100644 --- a/tools/libs/ctrl/xc_domain.c +++ b/tools/libs/ctrl/xc_domain.c @@ -1074,7 +1074,6 @@ int xc_domain_claim_pages(xc_interface *xch, uint32_t domid, unsigned long nr_pages) { - int err; struct xen_memory_reservation reservation = { .nr_extents = nr_pages, .extent_order = 0, @@ -1082,13 +1081,7 @@ int xc_domain_claim_pages(xc_interface *xch, .domid = domid }; - set_xen_guest_handle(reservation.extent_start, HYPERCALL_BUFFER_NULL); - - err = xc_memory_op(xch, XENMEM_claim_pages, &reservation, sizeof(reservation)); - /* Ignore it if the hypervisor does not support the call. */ - if (err == -1 && errno == ENOSYS) - err = errno = 0; - return err; + return xc_memory_op(xch, XENMEM_claim_pages, &reservation, sizeof(reservation)); } int xc_domain_populate_physmap(xc_interface *xch, -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Wed Dec 17 17:44:24 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 17 Dec 2025 17:44:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189064.1510028 (Exim 4.92) (envelope-from ) id 1vVvZY-0004UJ-JL; Wed, 17 Dec 2025 17:44:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189064.1510028; Wed, 17 Dec 2025 17:44:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVvZY-0004UB-Gm; Wed, 17 Dec 2025 17:44:24 +0000 Received: by outflank-mailman (input) for mailman id 1189064; Wed, 17 Dec 2025 17:44:23 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVvZX-0004U4-2y for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 17:44:23 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vVvZW-00EUVB-2R for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 17:44:23 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vVvZX-001kQf-02 for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 17:44:23 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=YH3LXHQVrDvzAhGklTR2aJgiKs5aWPlz88CZKDyTLMg=; b=U4hs/GuDIvfruiBmxe7btqWZqX UAKyyRasBiXfJcvdBoWCd2j12hVAlcIXZQDiPQ8mpJ5QZ9B4FdKeAXk6vy7l0eKW5B+v2KGuVvVkm gLcsCLSw/woqydoIqNrTyEMYJm2x1/xdZRHEtsXhDYy3BEplJA2RODxEzfTjgKXiZpyI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] tools/tests: Sort Makefile Message-Id: Date: Wed, 17 Dec 2025 17:44:23 +0000 commit 04ebc7b527a774fddcf61bce00dad95cc953a1fb Author: Andrew Cooper AuthorDate: Mon Dec 15 17:31:31 2025 +0000 Commit: Andrew Cooper CommitDate: Wed Dec 17 17:35:24 2025 +0000 tools/tests: Sort Makefile ... and split the x86 group away from the common group. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Roger Pau Monné --- tools/tests/Makefile | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/tools/tests/Makefile b/tools/tests/Makefile index ac57373646..e566bd1699 100644 --- a/tools/tests/Makefile +++ b/tools/tests/Makefile @@ -3,17 +3,18 @@ include $(XEN_ROOT)/tools/Rules.mk SUBDIRS-y := SUBDIRS-y += domid +SUBDIRS-y += paging-mempool +SUBDIRS-y += pdx +SUBDIRS-y += rangeset SUBDIRS-y += resource +SUBDIRS-y += vpci +SUBDIRS-y += xenstore + SUBDIRS-$(CONFIG_X86) += cpu-policy SUBDIRS-$(CONFIG_X86) += tsx ifneq ($(clang),y) SUBDIRS-$(CONFIG_X86) += x86_emulator endif -SUBDIRS-y += xenstore -SUBDIRS-y += pdx -SUBDIRS-y += rangeset -SUBDIRS-y += vpci -SUBDIRS-y += paging-mempool .PHONY: all clean install distclean uninstall all clean distclean install uninstall: %: subdirs-% -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Wed Dec 17 17:44:34 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 17 Dec 2025 17:44:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189065.1510031 (Exim 4.92) (envelope-from ) id 1vVvZi-0004WP-Kl; Wed, 17 Dec 2025 17:44:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189065.1510031; Wed, 17 Dec 2025 17:44:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVvZi-0004WH-I9; Wed, 17 Dec 2025 17:44:34 +0000 Received: by outflank-mailman (input) for mailman id 1189065; Wed, 17 Dec 2025 17:44:33 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVvZh-0004W5-8o for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 17:44:33 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vVvZg-00EUVG-2u for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 17:44:33 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vVvZh-001ljM-0K for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 17:44:33 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=dPzvmANr5+N6Z1sAYlCcpVfBGq8iEsPpwlT/Vf3FACU=; b=FWHvDU9r6lXbY2MCMxKiI4iLsH EyUfpE3DtH2BUQZO7+GYkuSZDWCXE/lSLg+oJg/9VLwl9YQyND7X0ge+RMU3/g4NMtDg1IFRtQp4M ypAFYn2d/nYDlmBLxgXrdpGMCsdcqyOlGA8xYJQ224cDlM8VZ2S8dM39O75C5waymZsA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] tools/tests: Memory Claims Message-Id: Date: Wed, 17 Dec 2025 17:44:33 +0000 commit f34c965281103a1c3e44f4feec0ae864fd4c62c9 Author: Andrew Cooper AuthorDate: Mon Dec 15 17:14:36 2025 +0000 Commit: Andrew Cooper CommitDate: Wed Dec 17 17:35:24 2025 +0000 tools/tests: Memory Claims Add some basic testing of the memory claims mechainsm. Signed-off-by: Andrew Cooper Reviewed-by: Roger Pau Monné --- tools/tests/Makefile | 1 + tools/tests/mem-claim/.gitignore | 1 + tools/tests/mem-claim/Makefile | 38 +++++++ tools/tests/mem-claim/test-mem-claim.c | 193 +++++++++++++++++++++++++++++++++ 4 files changed, 233 insertions(+) diff --git a/tools/tests/Makefile b/tools/tests/Makefile index e566bd1699..6477a4386d 100644 --- a/tools/tests/Makefile +++ b/tools/tests/Makefile @@ -3,6 +3,7 @@ include $(XEN_ROOT)/tools/Rules.mk SUBDIRS-y := SUBDIRS-y += domid +SUBDIRS-y += mem-claim SUBDIRS-y += paging-mempool SUBDIRS-y += pdx SUBDIRS-y += rangeset diff --git a/tools/tests/mem-claim/.gitignore b/tools/tests/mem-claim/.gitignore new file mode 100644 index 0000000000..cfcee00b81 --- /dev/null +++ b/tools/tests/mem-claim/.gitignore @@ -0,0 +1 @@ +test-mem-claim diff --git a/tools/tests/mem-claim/Makefile b/tools/tests/mem-claim/Makefile new file mode 100644 index 0000000000..76ba3e3c8b --- /dev/null +++ b/tools/tests/mem-claim/Makefile @@ -0,0 +1,38 @@ +XEN_ROOT = $(CURDIR)/../../.. +include $(XEN_ROOT)/tools/Rules.mk + +TARGET := test-mem-claim + +.PHONY: all +all: $(TARGET) + +.PHONY: clean +clean: + $(RM) -- *.o $(TARGET) $(DEPS_RM) + +.PHONY: distclean +distclean: clean + $(RM) -- *~ + +.PHONY: install +install: all + $(INSTALL_DIR) $(DESTDIR)$(LIBEXEC)/tests + $(INSTALL_PROG) $(TARGET) $(DESTDIR)$(LIBEXEC)/tests + +.PHONY: uninstall +uninstall: + $(RM) -- $(DESTDIR)$(LIBEXEC)/tests/$(TARGET) + +CFLAGS += $(CFLAGS_xeninclude) +CFLAGS += $(CFLAGS_libxenctrl) +CFLAGS += $(APPEND_CFLAGS) + +LDFLAGS += $(LDLIBS_libxenctrl) +LDFLAGS += $(APPEND_LDFLAGS) + +%.o: Makefile + +$(TARGET): test-mem-claim.o + $(CC) -o $@ $< $(LDFLAGS) + +-include $(DEPS_INCLUDE) diff --git a/tools/tests/mem-claim/test-mem-claim.c b/tools/tests/mem-claim/test-mem-claim.c new file mode 100644 index 0000000000..ad038e45d1 --- /dev/null +++ b/tools/tests/mem-claim/test-mem-claim.c @@ -0,0 +1,193 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +static unsigned int nr_failures; +#define fail(fmt, ...) \ +({ \ + nr_failures++; \ + (void)printf(fmt, ##__VA_ARGS__); \ +}) + +#define MB_PAGES(x) (MB(x) / XC_PAGE_SIZE) + +static xc_interface *xch; +static uint32_t domid = DOMID_INVALID; + +static xc_physinfo_t physinfo; + +static struct xen_domctl_createdomain create = { + .flags = XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap, + .max_vcpus = 1, + .max_grant_frames = 1, + .grant_opts = XEN_DOMCTL_GRANT_version(1), + + .arch = { +#if defined(__x86_64__) || defined(__i386__) + .emulation_flags = XEN_X86_EMU_LAPIC, +#endif + }, +}; + +static void run_tests(void) +{ + int rc; + + /* + * Check that the system is quiescent. Outstanding claims is a global + * field. + */ + rc = xc_physinfo(xch, &physinfo); + if ( rc ) + return fail("Failed to obtain physinfo: %d - %s\n", + errno, strerror(errno)); + + printf("Free pages: %"PRIu64", Oustanding claims: %"PRIu64"\n", + physinfo.free_pages, physinfo.outstanding_pages); + + if ( physinfo.outstanding_pages ) + return fail(" Test needs running on a quiescent system\n"); + + /* + * We want any arbitrary domain. Start with HVM/HAP, falling back to + * HVM/Shadow and then to PV. The dom0 running this test case is one of + * these modes. + */ +#if defined(__x86_64__) || defined(__i386__) + if ( !(physinfo.capabilities & XEN_SYSCTL_PHYSCAP_hap) ) + create.flags &= ~XEN_DOMCTL_CDF_hap; + + if ( !(physinfo.capabilities & (XEN_SYSCTL_PHYSCAP_hap|XEN_SYSCTL_PHYSCAP_shadow)) || + !(physinfo.capabilities & XEN_SYSCTL_PHYSCAP_hvm) ) + { + create.flags &= ~XEN_DOMCTL_CDF_hvm; + create.arch.emulation_flags = 0; + } +#endif + + rc = xc_domain_create(xch, &domid, &create); + if ( rc ) + return fail(" Domain create failure: %d - %s\n", + errno, strerror(errno)); + + rc = xc_domain_setmaxmem(xch, domid, -1); + if ( rc ) + return fail(" Failed to set maxmem: %d - %s\n", + errno, strerror(errno)); + + printf(" Created d%u\n", domid); + + /* + * Creating a domain shouldn't change the claim. Check it's still 0. + */ + rc = xc_physinfo(xch, &physinfo); + if ( rc ) + return fail(" Failed to obtain physinfo: %d - %s\n", + errno, strerror(errno)); + + if ( physinfo.outstanding_pages ) + return fail(" Unexpected outstanding claim of %"PRIu64" pages\n", + physinfo.outstanding_pages); + + /* + * Set a claim for 4M. This should be the only claim in the system, and + * show up globally. + */ + rc = xc_domain_claim_pages(xch, domid, MB_PAGES(4)); + if ( rc ) + return fail(" Failed to claim 4M of RAM: %d - %s\n", + errno, strerror(errno)); + + rc = xc_physinfo(xch, &physinfo); + if ( rc ) + return fail(" Failed to obtain physinfo: %d - %s\n", + errno, strerror(errno)); + + if ( physinfo.outstanding_pages != MB_PAGES(4) ) + return fail(" Expected claim to be 4M, got %"PRIu64" pages\n", + physinfo.outstanding_pages); + + /* + * Allocate 2M of RAM to the domain. This should be deducted from global + * claim. + */ + xen_pfn_t ram[] = { 0 }; + rc = xc_domain_populate_physmap_exact( + xch, domid, ARRAY_SIZE(ram), 9 /* Order 2M */, 0, ram); + if ( rc ) + return fail(" Failed to populate physmap domain: %d - %s\n", + errno, strerror(errno)); + + rc = xc_physinfo(xch, &physinfo); + if ( rc ) + return fail(" Failed to obtain physinfo: %d - %s\n", + errno, strerror(errno)); + + if ( physinfo.outstanding_pages != MB_PAGES(2) ) + return fail(" Expected claim to be 2M, got %"PRIu64" pages\n", + physinfo.outstanding_pages); + + /* + * Destroying the domain should release the outstanding 2M claim. + */ + rc = xc_domain_destroy(xch, domid); + + /* Cancel the cleanup path, even in the case of an error. */ + domid = DOMID_INVALID; + + if ( rc ) + return fail(" Failed to destroy domain: %d - %s\n", + errno, strerror(errno)); + + rc = xc_physinfo(xch, &physinfo); + if ( rc ) + return fail(" Failed to obtain physinfo: %d - %s\n", + errno, strerror(errno)); + + if ( physinfo.outstanding_pages ) + return fail(" Expected no outstanding claim, got %"PRIu64" pages\n", + physinfo.outstanding_pages); +} + +int main(int argc, char **argv) +{ + int rc; + + printf("Memory claims tests\n"); + + xch = xc_interface_open(NULL, NULL, 0); + + if ( !xch ) + err(1, "xc_interface_open"); + + run_tests(); + + if ( domid != DOMID_INVALID ) + { + rc = xc_domain_destroy(xch, domid); + if ( rc ) + fail(" Failed to destroy domain: %d - %s\n", + errno, strerror(errno)); + } + + return !!nr_failures; +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Wed Dec 17 18:55:10 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 17 Dec 2025 18:55:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189101.1510036 (Exim 4.92) (envelope-from ) id 1vVwfv-0004NV-Dw; Wed, 17 Dec 2025 18:55:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189101.1510036; Wed, 17 Dec 2025 18:55:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVwfv-0004NN-BI; Wed, 17 Dec 2025 18:55:03 +0000 Received: by outflank-mailman (input) for mailman id 1189101; Wed, 17 Dec 2025 18:55:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVwfu-0004NH-2b for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 18:55:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vVwft-00EVpA-26 for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 18:55:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vVwft-009HAs-2u for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 18:55:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=F30eQY9MlCT5weB0hdiba2+blsxP+zavOE2/m9lEWO4=; b=o2qUIgwqFC4rh35Ma00op+TpQ5 zyg+TlFtxY3ijuI97bCOqIw9c69xBP86/UZ8iq+LVAqQ4JnV5XD6l4g2+OiGCnsnnE0V4Sw0NqtDB RLyEqcNssXWyoRMzeGLx3OOJUDRXuKY91VK9HPtYEu4916aIeuwP+MJ41oLW/vwBctjk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/domain: Disallow XENMEM_claim_pages on dying domains Message-Id: Date: Wed, 17 Dec 2025 18:55:01 +0000 commit 2379ca04feab7df40051d03f73487d9e0cef43ac Author: Andrew Cooper AuthorDate: Mon Dec 15 18:45:33 2025 +0000 Commit: Andrew Cooper CommitDate: Wed Dec 17 17:35:24 2025 +0000 xen/domain: Disallow XENMEM_claim_pages on dying domains XENMEM_claim_pages can be issued on a domain in the later stages of domain_kill(). In that case, the claimed memory is leaked, as there's no way to subsequently release the claim. Claims are intended for use during domain construction; to reserve sufficient RAM to construct the domain fully. There's no legitimate reason to be calling it on a dying domain. Fixes: 65c9792df600 ("mmu: Introduce XENMEM_claim_pages (subop of memory ops)") Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/common/memory.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/xen/common/memory.c b/xen/common/memory.c index 3688e6dd50..ae805ccbe4 100644 --- a/xen/common/memory.c +++ b/xen/common/memory.c @@ -1681,6 +1681,9 @@ long do_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg) rc = xsm_claim_pages(XSM_PRIV, d); + if ( !rc && d->is_dying ) + rc = -EINVAL; + if ( !rc ) rc = domain_set_outstanding_pages(d, reservation.nr_extents); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Dec 17 18:55:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 17 Dec 2025 18:55:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189102.1510039 (Exim 4.92) (envelope-from ) id 1vVwg5-0004Ow-FI; Wed, 17 Dec 2025 18:55:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189102.1510039; Wed, 17 Dec 2025 18:55:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVwg5-0004Oo-Cg; Wed, 17 Dec 2025 18:55:13 +0000 Received: by outflank-mailman (input) for mailman id 1189102; Wed, 17 Dec 2025 18:55:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVwg4-0004Oc-2r for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 18:55:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vVwg3-00EVpI-2T for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 18:55:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vVwg4-009INR-00 for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 18:55:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=5ZtwtJZeiricO64CdUTxCRX6pjXcTjkYTG588Q0Nup0=; b=EjbTazTHUGv2yfwkVIPZauwfsr iZ6hk4KwLdLqHN3uKM6NAm9+K/ghpCPr5IVBK7+Vyoy6XOF+H1umEzGP9xEzXsdKnjtC+/DLvuetk PDJoE1YG0JMttetj5Pz+5wyFK8xE8zXyzDQXlsUG3+vhR6Sjx5FUXUsFBq0enOFbcMq0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools/libxc: Delete ENOSYS squashing in xc_domain_claim_pages() Message-Id: Date: Wed, 17 Dec 2025 18:55:12 +0000 commit 7672602df6c0f7a3d030f130a2372f1772d5ac4e Author: Andrew Cooper AuthorDate: Mon Dec 15 18:09:33 2025 +0000 Commit: Andrew Cooper CommitDate: Wed Dec 17 17:35:24 2025 +0000 tools/libxc: Delete ENOSYS squashing in xc_domain_claim_pages() It's not acceptable to hide this from the caller; the effect of doing so is to break an atomicity expectation. Only the caller can know what the appropriate safety action is in the case that the claim hypercall isn't available. Ignoring it might be the right thing to do, but xc_domain_claim_pages() cannot make this decision on behalf of all callers. Fixes: fc67e9dc0c1f ("xc: use XENMEM_claim_pages hypercall during guest creation.") Signed-off-by: Andrew Cooper Reviewed-by: Roger Pau Monné --- tools/libs/ctrl/xc_domain.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/tools/libs/ctrl/xc_domain.c b/tools/libs/ctrl/xc_domain.c index 2ddc3f4f42..01c0669c88 100644 --- a/tools/libs/ctrl/xc_domain.c +++ b/tools/libs/ctrl/xc_domain.c @@ -1074,7 +1074,6 @@ int xc_domain_claim_pages(xc_interface *xch, uint32_t domid, unsigned long nr_pages) { - int err; struct xen_memory_reservation reservation = { .nr_extents = nr_pages, .extent_order = 0, @@ -1082,13 +1081,7 @@ int xc_domain_claim_pages(xc_interface *xch, .domid = domid }; - set_xen_guest_handle(reservation.extent_start, HYPERCALL_BUFFER_NULL); - - err = xc_memory_op(xch, XENMEM_claim_pages, &reservation, sizeof(reservation)); - /* Ignore it if the hypervisor does not support the call. */ - if (err == -1 && errno == ENOSYS) - err = errno = 0; - return err; + return xc_memory_op(xch, XENMEM_claim_pages, &reservation, sizeof(reservation)); } int xc_domain_populate_physmap(xc_interface *xch, -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Dec 17 18:55:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 17 Dec 2025 18:55:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189103.1510043 (Exim 4.92) (envelope-from ) id 1vVwgF-0004RF-Go; Wed, 17 Dec 2025 18:55:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189103.1510043; Wed, 17 Dec 2025 18:55:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVwgF-0004R6-E1; Wed, 17 Dec 2025 18:55:23 +0000 Received: by outflank-mailman (input) for mailman id 1189103; Wed, 17 Dec 2025 18:55:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVwgE-0004Qy-8T for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 18:55:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vVwgD-00EVpO-33 for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 18:55:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vVwgE-009JLC-0N for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 18:55:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=QoipNH6Uqicpt5J2t7L0ObV566s1wHXWMUG3cdqGL9U=; b=mZPZt9H+G9/DtYfcf/nwOa//mF jKH4qA5VnZtcNnKiMxAlAubfUtKHk/2liQ2BtJOeRQWrjYs8jYJo4gDvnDEdah5oyyGj/shTvewax RECatqawUnOJ4usJc5Dp3xt2t1UIAwFiNVe4HfGvrb0QaEV9+xYgSw0Tg75u1/yo2rmQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools/tests: Sort Makefile Message-Id: Date: Wed, 17 Dec 2025 18:55:22 +0000 commit 04ebc7b527a774fddcf61bce00dad95cc953a1fb Author: Andrew Cooper AuthorDate: Mon Dec 15 17:31:31 2025 +0000 Commit: Andrew Cooper CommitDate: Wed Dec 17 17:35:24 2025 +0000 tools/tests: Sort Makefile ... and split the x86 group away from the common group. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Roger Pau Monné --- tools/tests/Makefile | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/tools/tests/Makefile b/tools/tests/Makefile index ac57373646..e566bd1699 100644 --- a/tools/tests/Makefile +++ b/tools/tests/Makefile @@ -3,17 +3,18 @@ include $(XEN_ROOT)/tools/Rules.mk SUBDIRS-y := SUBDIRS-y += domid +SUBDIRS-y += paging-mempool +SUBDIRS-y += pdx +SUBDIRS-y += rangeset SUBDIRS-y += resource +SUBDIRS-y += vpci +SUBDIRS-y += xenstore + SUBDIRS-$(CONFIG_X86) += cpu-policy SUBDIRS-$(CONFIG_X86) += tsx ifneq ($(clang),y) SUBDIRS-$(CONFIG_X86) += x86_emulator endif -SUBDIRS-y += xenstore -SUBDIRS-y += pdx -SUBDIRS-y += rangeset -SUBDIRS-y += vpci -SUBDIRS-y += paging-mempool .PHONY: all clean install distclean uninstall all clean distclean install uninstall: %: subdirs-% -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Dec 17 18:55:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 17 Dec 2025 18:55:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189104.1510047 (Exim 4.92) (envelope-from ) id 1vVwgP-0004TZ-Jn; Wed, 17 Dec 2025 18:55:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189104.1510047; Wed, 17 Dec 2025 18:55:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVwgP-0004TR-H2; Wed, 17 Dec 2025 18:55:33 +0000 Received: by outflank-mailman (input) for mailman id 1189104; Wed, 17 Dec 2025 18:55:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vVwgO-0004TL-DM for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 18:55:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vVwgO-00EVrT-0J for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 18:55:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vVwgO-009KUS-0v for xen-changelog@lists.xenproject.org; Wed, 17 Dec 2025 18:55:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=4WW+LlH3KsYks5eA5Yd0Ffq+N9mFDkrOciemzaC6JE4=; b=3EJlIGVS2lSCcklVsBNVzimE+h vO28xZ7ACvs6erq37HnANC5Hh0tVRpsYMjMRkDFHSfUe8Zqk2mAAKHbACBaBuZpGt1YbqsGBDFQg4 5VQKeFPhQ+heE0hOuJUtv5CNRoN+frPxWZYRm33y3Doy5Hdaw5eucsBX6BxGZZ81P4G4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools/tests: Memory Claims Message-Id: Date: Wed, 17 Dec 2025 18:55:32 +0000 commit f34c965281103a1c3e44f4feec0ae864fd4c62c9 Author: Andrew Cooper AuthorDate: Mon Dec 15 17:14:36 2025 +0000 Commit: Andrew Cooper CommitDate: Wed Dec 17 17:35:24 2025 +0000 tools/tests: Memory Claims Add some basic testing of the memory claims mechainsm. Signed-off-by: Andrew Cooper Reviewed-by: Roger Pau Monné --- tools/tests/Makefile | 1 + tools/tests/mem-claim/.gitignore | 1 + tools/tests/mem-claim/Makefile | 38 +++++++ tools/tests/mem-claim/test-mem-claim.c | 193 +++++++++++++++++++++++++++++++++ 4 files changed, 233 insertions(+) diff --git a/tools/tests/Makefile b/tools/tests/Makefile index e566bd1699..6477a4386d 100644 --- a/tools/tests/Makefile +++ b/tools/tests/Makefile @@ -3,6 +3,7 @@ include $(XEN_ROOT)/tools/Rules.mk SUBDIRS-y := SUBDIRS-y += domid +SUBDIRS-y += mem-claim SUBDIRS-y += paging-mempool SUBDIRS-y += pdx SUBDIRS-y += rangeset diff --git a/tools/tests/mem-claim/.gitignore b/tools/tests/mem-claim/.gitignore new file mode 100644 index 0000000000..cfcee00b81 --- /dev/null +++ b/tools/tests/mem-claim/.gitignore @@ -0,0 +1 @@ +test-mem-claim diff --git a/tools/tests/mem-claim/Makefile b/tools/tests/mem-claim/Makefile new file mode 100644 index 0000000000..76ba3e3c8b --- /dev/null +++ b/tools/tests/mem-claim/Makefile @@ -0,0 +1,38 @@ +XEN_ROOT = $(CURDIR)/../../.. +include $(XEN_ROOT)/tools/Rules.mk + +TARGET := test-mem-claim + +.PHONY: all +all: $(TARGET) + +.PHONY: clean +clean: + $(RM) -- *.o $(TARGET) $(DEPS_RM) + +.PHONY: distclean +distclean: clean + $(RM) -- *~ + +.PHONY: install +install: all + $(INSTALL_DIR) $(DESTDIR)$(LIBEXEC)/tests + $(INSTALL_PROG) $(TARGET) $(DESTDIR)$(LIBEXEC)/tests + +.PHONY: uninstall +uninstall: + $(RM) -- $(DESTDIR)$(LIBEXEC)/tests/$(TARGET) + +CFLAGS += $(CFLAGS_xeninclude) +CFLAGS += $(CFLAGS_libxenctrl) +CFLAGS += $(APPEND_CFLAGS) + +LDFLAGS += $(LDLIBS_libxenctrl) +LDFLAGS += $(APPEND_LDFLAGS) + +%.o: Makefile + +$(TARGET): test-mem-claim.o + $(CC) -o $@ $< $(LDFLAGS) + +-include $(DEPS_INCLUDE) diff --git a/tools/tests/mem-claim/test-mem-claim.c b/tools/tests/mem-claim/test-mem-claim.c new file mode 100644 index 0000000000..ad038e45d1 --- /dev/null +++ b/tools/tests/mem-claim/test-mem-claim.c @@ -0,0 +1,193 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +static unsigned int nr_failures; +#define fail(fmt, ...) \ +({ \ + nr_failures++; \ + (void)printf(fmt, ##__VA_ARGS__); \ +}) + +#define MB_PAGES(x) (MB(x) / XC_PAGE_SIZE) + +static xc_interface *xch; +static uint32_t domid = DOMID_INVALID; + +static xc_physinfo_t physinfo; + +static struct xen_domctl_createdomain create = { + .flags = XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap, + .max_vcpus = 1, + .max_grant_frames = 1, + .grant_opts = XEN_DOMCTL_GRANT_version(1), + + .arch = { +#if defined(__x86_64__) || defined(__i386__) + .emulation_flags = XEN_X86_EMU_LAPIC, +#endif + }, +}; + +static void run_tests(void) +{ + int rc; + + /* + * Check that the system is quiescent. Outstanding claims is a global + * field. + */ + rc = xc_physinfo(xch, &physinfo); + if ( rc ) + return fail("Failed to obtain physinfo: %d - %s\n", + errno, strerror(errno)); + + printf("Free pages: %"PRIu64", Oustanding claims: %"PRIu64"\n", + physinfo.free_pages, physinfo.outstanding_pages); + + if ( physinfo.outstanding_pages ) + return fail(" Test needs running on a quiescent system\n"); + + /* + * We want any arbitrary domain. Start with HVM/HAP, falling back to + * HVM/Shadow and then to PV. The dom0 running this test case is one of + * these modes. + */ +#if defined(__x86_64__) || defined(__i386__) + if ( !(physinfo.capabilities & XEN_SYSCTL_PHYSCAP_hap) ) + create.flags &= ~XEN_DOMCTL_CDF_hap; + + if ( !(physinfo.capabilities & (XEN_SYSCTL_PHYSCAP_hap|XEN_SYSCTL_PHYSCAP_shadow)) || + !(physinfo.capabilities & XEN_SYSCTL_PHYSCAP_hvm) ) + { + create.flags &= ~XEN_DOMCTL_CDF_hvm; + create.arch.emulation_flags = 0; + } +#endif + + rc = xc_domain_create(xch, &domid, &create); + if ( rc ) + return fail(" Domain create failure: %d - %s\n", + errno, strerror(errno)); + + rc = xc_domain_setmaxmem(xch, domid, -1); + if ( rc ) + return fail(" Failed to set maxmem: %d - %s\n", + errno, strerror(errno)); + + printf(" Created d%u\n", domid); + + /* + * Creating a domain shouldn't change the claim. Check it's still 0. + */ + rc = xc_physinfo(xch, &physinfo); + if ( rc ) + return fail(" Failed to obtain physinfo: %d - %s\n", + errno, strerror(errno)); + + if ( physinfo.outstanding_pages ) + return fail(" Unexpected outstanding claim of %"PRIu64" pages\n", + physinfo.outstanding_pages); + + /* + * Set a claim for 4M. This should be the only claim in the system, and + * show up globally. + */ + rc = xc_domain_claim_pages(xch, domid, MB_PAGES(4)); + if ( rc ) + return fail(" Failed to claim 4M of RAM: %d - %s\n", + errno, strerror(errno)); + + rc = xc_physinfo(xch, &physinfo); + if ( rc ) + return fail(" Failed to obtain physinfo: %d - %s\n", + errno, strerror(errno)); + + if ( physinfo.outstanding_pages != MB_PAGES(4) ) + return fail(" Expected claim to be 4M, got %"PRIu64" pages\n", + physinfo.outstanding_pages); + + /* + * Allocate 2M of RAM to the domain. This should be deducted from global + * claim. + */ + xen_pfn_t ram[] = { 0 }; + rc = xc_domain_populate_physmap_exact( + xch, domid, ARRAY_SIZE(ram), 9 /* Order 2M */, 0, ram); + if ( rc ) + return fail(" Failed to populate physmap domain: %d - %s\n", + errno, strerror(errno)); + + rc = xc_physinfo(xch, &physinfo); + if ( rc ) + return fail(" Failed to obtain physinfo: %d - %s\n", + errno, strerror(errno)); + + if ( physinfo.outstanding_pages != MB_PAGES(2) ) + return fail(" Expected claim to be 2M, got %"PRIu64" pages\n", + physinfo.outstanding_pages); + + /* + * Destroying the domain should release the outstanding 2M claim. + */ + rc = xc_domain_destroy(xch, domid); + + /* Cancel the cleanup path, even in the case of an error. */ + domid = DOMID_INVALID; + + if ( rc ) + return fail(" Failed to destroy domain: %d - %s\n", + errno, strerror(errno)); + + rc = xc_physinfo(xch, &physinfo); + if ( rc ) + return fail(" Failed to obtain physinfo: %d - %s\n", + errno, strerror(errno)); + + if ( physinfo.outstanding_pages ) + return fail(" Expected no outstanding claim, got %"PRIu64" pages\n", + physinfo.outstanding_pages); +} + +int main(int argc, char **argv) +{ + int rc; + + printf("Memory claims tests\n"); + + xch = xc_interface_open(NULL, NULL, 0); + + if ( !xch ) + err(1, "xc_interface_open"); + + run_tests(); + + if ( domid != DOMID_INVALID ) + { + rc = xc_domain_destroy(xch, domid); + if ( rc ) + fail(" Failed to destroy domain: %d - %s\n", + errno, strerror(errno)); + } + + return !!nr_failures; +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 11:00:08 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 11:00:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189453.1510197 (Exim 4.92) (envelope-from ) id 1vWBjo-0001N7-IP; Thu, 18 Dec 2025 11:00:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189453.1510197; Thu, 18 Dec 2025 11:00:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWBjo-0001Mg-F3; Thu, 18 Dec 2025 11:00:04 +0000 Received: by outflank-mailman (input) for mailman id 1189453; Thu, 18 Dec 2025 11:00:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWBjn-00016Q-1F for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 11:00:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWBjm-00Fwby-2B for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 11:00:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWBjm-00Fk8e-2v for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 11:00:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=1HdgxVkCwiPzKG1wUJubCCj84qmzfNAGtIoplSK8CiI=; b=PHhIU9C8A5Cb1zIlYFgnPW8jk0 CiwCwXIl53xuLS0pvAbuFaw8uzFKzB3LiBoyTfe2uMwiuWP2jJGKA3LT8VNKHnWkRfahY8Q4qBB1/ mEGfw3IohMADXF8tJkdU+cw9PTsKPSyWxRDeQ+U+3LipNg+5jfzFX3iok8N4Gb1FadzE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] tools/fuzz: use vpath uniformly for access to hypervisor library code Message-Id: Date: Thu, 18 Dec 2025 11:00:02 +0000 commit 9cf4084f4ee51123f95a5bb1e7220e89da16350e Author: Jan Beulich AuthorDate: Thu Dec 18 09:57:42 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 09:57:42 2025 +0100 tools/fuzz: use vpath uniformly for access to hypervisor library code It's not quite clear why for libelf and the emulator we use symlink-ing, while elsewhere we use vpath. Do so for these two as well, thus also eliminating the need for custom -iquote options and custom cleaning. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- tools/fuzz/libelf/Makefile | 8 +++----- tools/fuzz/x86_instruction_emulator/Makefile | 6 ++---- 2 files changed, 5 insertions(+), 9 deletions(-) diff --git a/tools/fuzz/libelf/Makefile b/tools/fuzz/libelf/Makefile index 9211f75951..0df5c4c826 100644 --- a/tools/fuzz/libelf/Makefile +++ b/tools/fuzz/libelf/Makefile @@ -1,17 +1,15 @@ XEN_ROOT = $(CURDIR)/../../.. include $(XEN_ROOT)/tools/Rules.mk +vpath %.c $(XEN_ROOT)/xen/common/libelf + LIBELF_OBJS := libelf-tools.o libelf-loader.o libelf-dominfo.o -CFLAGS += -iquote ../../../xen/common/libelf $(LIBELF_OBJS): CFLAGS += -Wno-pointer-sign $(LIBELF_OBJS): CFLAGS += -DFUZZ_NO_LIBXC $(CFLAGS_xeninclude) libelf-fuzzer.o: CFLAGS += $(CFLAGS_xeninclude) -$(LIBELF_OBJS:.o=.c): libelf-%.c: ../../../xen/common/libelf/libelf-%.c FORCE - ln -nsf $< $@ - libelf.a: libelf-fuzzer.o $(LIBELF_OBJS) $(AR) rc $@ $^ @@ -30,7 +28,7 @@ distclean: clean .PHONY: clean clean: - rm -f *.o .*.d *.a *-libelf-fuzzer $(LIBELF_OBJS:.o=.c) + rm -f *.o .*.d *.a *-libelf-fuzzer .PHONY: install install: all diff --git a/tools/fuzz/x86_instruction_emulator/Makefile b/tools/fuzz/x86_instruction_emulator/Makefile index 459743f4d9..524644ec28 100644 --- a/tools/fuzz/x86_instruction_emulator/Makefile +++ b/tools/fuzz/x86_instruction_emulator/Makefile @@ -9,8 +9,7 @@ x86-insn-fuzz-all: endif # Add libx86 to the build -%.c: $(XEN_ROOT)/xen/lib/x86/%.c FORCE - ln -nsf $< $@ +vpath %.c $(XEN_ROOT)/xen/lib/x86 x86_emulate: FORCE mkdir -p $@ @@ -25,7 +24,6 @@ x86_emulate/%.h: x86_emulate ; ln -nsf $< $@ CFLAGS += $(CFLAGS_xeninclude) -D__XEN_TOOLS__ -iquote . -cpuid.o: CFLAGS += -iquote $(XEN_ROOT)/xen/lib/x86 GCOV_FLAGS := --coverage %-cov.o: %.c @@ -72,7 +70,7 @@ distclean: clean clean: rm -f *.a *.o $(DEPS_RM) *.gcda *.gcno *.gcov rm -f afl-harness afl-harness-cov libfuzzer-harness - rm -rf x86_emulate x86-emulate.c x86-emulate.h wrappers.c cpuid.c + rm -rf x86_emulate x86-emulate.c x86-emulate.h wrappers.c .PHONY: install install: all -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 11:00:14 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 11:00:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189455.1510201 (Exim 4.92) (envelope-from ) id 1vWBjy-0001hc-Jp; Thu, 18 Dec 2025 11:00:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189455.1510201; Thu, 18 Dec 2025 11:00:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWBjy-0001hU-GM; Thu, 18 Dec 2025 11:00:14 +0000 Received: by outflank-mailman (input) for mailman id 1189455; Thu, 18 Dec 2025 11:00:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWBjx-0001hC-5n for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 11:00:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWBjw-00Fwc5-2m for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 11:00:13 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWBjx-00Flc3-0J for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 11:00:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Fw4vN2AHxSfL0ALWE3C96uJVC1hoMn3oTaCP+2FctBs=; b=a0e3wa3c/jfYn3H0bOTSq5b5Bx pDMxQ31onfu3zhvHR7kZJwuc8q2+u4U20izGJDLCI+vKcjBY9qbLJDIzSoBxFtE6nXwJXXu7wE/WR Ge0ItSsBp6T8S0jXyhpTbmh7RJLo6LU1t3PuAKdTp6OjXk7ox6ZdTxz/PmEa1opBdFUg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/riscv: detect and initialize G-stage mode Message-Id: Date: Thu, 18 Dec 2025 11:00:13 +0000 commit 4112edae49dec8cc54f82d25533b5fd2521c1cd5 Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:11 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 09:58:32 2025 +0100 xen/riscv: detect and initialize G-stage mode Introduce gstage_mode_detect() and guest_mm_init() to probe supported G-stage paging modes at boot. The function iterates over possible HGATP modes (Sv32x4 on RV32, Sv39x4/Sv48x4/Sv57x4 on RV64) and selects the largest supported MMU translation address mode by programming CSR_HGATP and reading it back. The selected mode is stored in max_gstage_mode (marked __ro_after_init) and reported via printk. If no supported mode is found, Xen panics since Bare mode is not expected to be used. Finally, CSR_HGATP is cleared and a local_hfence_gvma_all() is issued to avoid any potential speculative pollution of the TLB, as required by the RISC-V spec. The following issue starts to occur: .//asm/flushtlb.h:37:55: error: 'struct page_info' declared inside parameter list will not be visible outside of this definition or declaration [-Werror] 37 | static inline void page_set_tlbflush_timestamp(struct page_info *page) To resolve it, forward declaration of struct page_info is added to Acked-by: Jan Beulich --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/include/asm/flushtlb.h | 7 ++ xen/arch/riscv/include/asm/p2m.h | 9 +++ xen/arch/riscv/include/asm/riscv_encoding.h | 5 ++ xen/arch/riscv/p2m.c | 102 ++++++++++++++++++++++++++++ xen/arch/riscv/setup.c | 3 + 6 files changed, 127 insertions(+) diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index d667234949..7b8d0e20e5 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -6,6 +6,7 @@ obj-y += imsic.o obj-y += intc.o obj-y += irq.o obj-y += mm.o +obj-y += p2m.o obj-y += pt.o obj-$(CONFIG_RISCV_64) += riscv64/ obj-y += sbi.o diff --git a/xen/arch/riscv/include/asm/flushtlb.h b/xen/arch/riscv/include/asm/flushtlb.h index 51c8f753c5..e70badae0c 100644 --- a/xen/arch/riscv/include/asm/flushtlb.h +++ b/xen/arch/riscv/include/asm/flushtlb.h @@ -7,6 +7,13 @@ #include +struct page_info; + +static inline void local_hfence_gvma_all(void) +{ + asm volatile ( "hfence.gvma zero, zero" ::: "memory" ); +} + /* Flush TLB of local processor for address va. */ static inline void flush_tlb_one_local(vaddr_t va) { diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h index e43c559e0c..3776b98303 100644 --- a/xen/arch/riscv/include/asm/p2m.h +++ b/xen/arch/riscv/include/asm/p2m.h @@ -8,6 +8,12 @@ #define paddr_bits PADDR_BITS +struct gstage_mode_desc { + unsigned char mode; + unsigned int paging_levels; + char name[8]; +}; + /* * List of possible type for each page in the p2m entry. * The number of available bit per page in the pte for this purpose is 2 bits. @@ -88,6 +94,9 @@ static inline bool arch_acquire_resource_check(struct domain *d) return false; } +void guest_mm_init(void); +unsigned char get_max_supported_mode(void); + #endif /* ASM__RISCV__P2M_H */ /* diff --git a/xen/arch/riscv/include/asm/riscv_encoding.h b/xen/arch/riscv/include/asm/riscv_encoding.h index fd27f74cb7..e0a5e8b58b 100644 --- a/xen/arch/riscv/include/asm/riscv_encoding.h +++ b/xen/arch/riscv/include/asm/riscv_encoding.h @@ -131,10 +131,13 @@ #define HGATP_MODE_SV32X4 _UL(1) #define HGATP_MODE_SV39X4 _UL(8) #define HGATP_MODE_SV48X4 _UL(9) +#define HGATP_MODE_SV57X4 _UL(10) +#define HGATP32_MODE_MASK _UL(0x80000000) #define HGATP32_VMID_MASK _UL(0x1FC00000) #define HGATP32_PPN_MASK _UL(0x003FFFFF) +#define HGATP64_MODE_MASK _ULL(0xF000000000000000) #define HGATP64_VMID_MASK _ULL(0x03FFF00000000000) #define HGATP64_PPN_MASK _ULL(0x00000FFFFFFFFFFF) @@ -164,6 +167,7 @@ #define HGATP_PPN_MASK HGATP64_PPN_MASK #define HGATP_VMID_MASK HGATP64_VMID_MASK +#define HGATP_MODE_MASK HGATP64_MODE_MASK #else #define MSTATUS_SD MSTATUS32_SD #define SSTATUS_SD SSTATUS32_SD @@ -173,6 +177,7 @@ #define HGATP_PPN_MASK HGATP32_PPN_MASK #define HGATP_VMID_MASK HGATP32_VMID_MASK +#define HGATP_MODE_MASK HGATP32_MODE_MASK #endif #define TOPI_IID_SHIFT 16 diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c new file mode 100644 index 0000000000..076a1c35b2 --- /dev/null +++ b/xen/arch/riscv/p2m.c @@ -0,0 +1,102 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include + +#include +#include +#include +#include + +static struct gstage_mode_desc __ro_after_init max_gstage_mode = { + .mode = HGATP_MODE_OFF, + .paging_levels = 0, + .name = "Bare", +}; + +unsigned char get_max_supported_mode(void) +{ + return max_gstage_mode.mode; +} + +static void __init gstage_mode_detect(void) +{ + static const struct gstage_mode_desc modes[] __initconst = { + /* + * Based on the RISC-V spec: + * Bare mode is always supported, regardless of SXLEN. + * When SXLEN=32, the only other valid setting for MODE is Sv32. + * When SXLEN=64, three paged virtual-memory schemes are defined: + * Sv39, Sv48, and Sv57. + */ +#ifdef CONFIG_RISCV_32 + { HGATP_MODE_SV32X4, 2, "Sv32x4" } +#else + { HGATP_MODE_SV39X4, 3, "Sv39x4" }, + { HGATP_MODE_SV48X4, 4, "Sv48x4" }, + { HGATP_MODE_SV57X4, 5, "Sv57x4" }, +#endif + }; + + for ( unsigned int mode_idx = ARRAY_SIZE(modes); mode_idx-- > 0; ) + { + unsigned long mode = modes[mode_idx].mode; + + csr_write(CSR_HGATP, MASK_INSR(mode, HGATP_MODE_MASK)); + + if ( MASK_EXTR(csr_read(CSR_HGATP), HGATP_MODE_MASK) == mode ) + { + max_gstage_mode = modes[mode_idx]; + + break; + } + } + + if ( max_gstage_mode.mode == HGATP_MODE_OFF ) + panic("Xen expects that G-stage won't be Bare mode\n"); + + printk("Max supported G-stage mode is %s\n", max_gstage_mode.name); + + csr_write(CSR_HGATP, 0); + + /* local_hfence_gvma_all() will be called at the end of guest_mm_init. */ +} + +void __init guest_mm_init(void) +{ + gstage_mode_detect(); + + /* + * As gstage_mode_detect() is changing CSR_HGATP, it is necessary to flush + * guest TLB because: + * + * From RISC-V spec: + * Speculative executions of the address-translation algorithm behave as + * non-speculative executions of the algorithm do, except that they must + * not set the dirty bit for a PTE, they must not trigger an exception, + * and they must not create address-translation cache entries if those + * entries would have been invalidated by any SFENCE.VMA instruction + * executed by the hart since the speculative execution of the algorithm + * began. + * + * Also, despite of the fact here it is mentioned that when V=0 two-stage + * address translation is inactivated: + * The current virtualization mode, denoted V, indicates whether the hart + * is currently executing in a guest. When V=1, the hart is either in + * virtual S-mode (VS-mode), or in virtual U-mode (VU-mode) atop a guest + * OS running in VS-mode. When V=0, the hart is either in M-mode, in + * HS-mode, or in U-mode atop an OS running in HS-mode. The + * virtualization mode also indicates whether two-stage address + * translation is active (V=1) or inactive (V=0). + * But on the same side, writing to hgatp register activates it: + * The hgatp register is considered active for the purposes of + * the address-translation algorithm unless the effective privilege mode + * is U and hstatus.HU=0. + * + * Thereby it leaves some room for speculation even in this stage of boot, + * so it could be that we polluted local TLB so flush all guest TLB. + */ + local_hfence_gvma_all(); +} diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index 483cdd7e17..8f46f1a1de 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -148,6 +149,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id, console_init_postirq(); + guest_mm_init(); + printk("All set up\n"); machine_halt(); -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 11:00:24 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 11:00:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189457.1510203 (Exim 4.92) (envelope-from ) id 1vWBk8-0001kc-Kx; Thu, 18 Dec 2025 11:00:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189457.1510203; Thu, 18 Dec 2025 11:00:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWBk8-0001kU-Hj; Thu, 18 Dec 2025 11:00:24 +0000 Received: by outflank-mailman (input) for mailman id 1189457; Thu, 18 Dec 2025 11:00:23 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWBk7-0001kE-8v for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 11:00:23 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWBk6-00FwcQ-36 for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 11:00:23 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWBk7-00FmoN-0h for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 11:00:23 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=TB+NF632QOxhNQhUGNQHtesA3NEehQznA3JC5iA7fpc=; b=zwknANJ8k+QX0/dwegKtD37ui+ 9zdLbM5c6i0HTK4TZMSHBeSTUc9gVSHWCicpXXaIqiqnOYBou4iOtMMYKEYm6gXOOx0V77x7XLAEe brllmekCQe4WfwxrVRck74A0nUytdbP8xxwkicVWWZpys461R0uo9WPD73JVoTTDc2jc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/riscv: introduce VMID allocation and manegement Message-Id: Date: Thu, 18 Dec 2025 11:00:23 +0000 commit bff3b9ea4696b58ec193ef279079658216c8c0e0 Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:12 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 09:58:56 2025 +0100 xen/riscv: introduce VMID allocation and manegement Current implementation is based on x86's way to allocate VMIDs: VMIDs partition the physical TLB. In the current implementation VMIDs are introduced to reduce the number of TLB flushes. Each time a guest-physical address space changes, instead of flushing the TLB, a new VMID is assigned. This reduces the number of TLB flushes to at most 1/#VMIDs. The biggest advantage is that hot parts of the hypervisor's code and data retain in the TLB. VMIDs are a hart-local resource. As preemption of VMIDs is not possible, VMIDs are assigned in a round-robin scheme. To minimize the overhead of VMID invalidation, at the time of a TLB flush, VMIDs are tagged with a 64-bit generation. Only on a generation overflow the code needs to invalidate all VMID information stored at the VCPUs with are run on the specific physical processor. When this overflow appears VMID usage is disabled to retain correctness. Only minor changes are made compared to the x86 implementation. These include using RISC-V-specific terminology, adding a check to ensure the type used for storing the VMID has enough bits to hold VMIDLEN, and introducing a new function vmidlen_detect() to clarify the VMIDLEN value, rename stuff connected to VMID enable/disable to "VMID use enable/disable". Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- docs/misc/xen-command-line.pandoc | 9 ++ xen/arch/riscv/Makefile | 1 + xen/arch/riscv/include/asm/domain.h | 6 ++ xen/arch/riscv/include/asm/vmid.h | 14 +++ xen/arch/riscv/p2m.c | 7 +- xen/arch/riscv/vmid.c | 178 ++++++++++++++++++++++++++++++++++++ 6 files changed, 213 insertions(+), 2 deletions(-) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index e92b6d55b5..805da22c44 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -2863,6 +2863,15 @@ to disable the feature. Value is in units of crystal clock cycles. Note the hardware might add a threshold to the provided value in order to make it safe, and hence using 0 is fine. +### vmid (RISC-V) +> `= ` + +> Default: `true` + +Permit Xen to use Virtual Machine Identifiers. This is an optimisation which +tags the TLB entries with an ID per vcpu. This allows for guest TLB flushes +to be performed without the overhead of a complete TLB flush. + ### vpid (Intel) > `= ` diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 7b8d0e20e5..c93c837aac 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -17,6 +17,7 @@ obj-y += smpboot.o obj-y += stubs.o obj-y += time.o obj-y += traps.o +obj-y += vmid.o obj-y += vm_event.o $(TARGET): $(TARGET)-syms diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index c3d965a559..aac1040658 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -5,6 +5,11 @@ #include #include +struct vcpu_vmid { + uint64_t generation; + uint16_t vmid; +}; + struct hvm_domain { uint64_t params[HVM_NR_PARAMS]; @@ -14,6 +19,7 @@ struct arch_vcpu_io { }; struct arch_vcpu { + struct vcpu_vmid vmid; }; struct arch_domain { diff --git a/xen/arch/riscv/include/asm/vmid.h b/xen/arch/riscv/include/asm/vmid.h new file mode 100644 index 0000000000..1c500c4aff --- /dev/null +++ b/xen/arch/riscv/include/asm/vmid.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef ASM_RISCV_VMID_H +#define ASM_RISCV_VMID_H + +struct vcpu; +struct vcpu_vmid; + +void vmid_init(void); +bool vmid_handle_vmenter(struct vcpu_vmid *vmid); +void vmid_flush_vcpu(struct vcpu *v); +void vmid_flush_hart(void); + +#endif /* ASM_RISCV_VMID_H */ diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index 076a1c35b2..4e84acaafd 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -9,6 +9,7 @@ #include #include #include +#include static struct gstage_mode_desc __ro_after_init max_gstage_mode = { .mode = HGATP_MODE_OFF, @@ -68,9 +69,11 @@ void __init guest_mm_init(void) { gstage_mode_detect(); + vmid_init(); + /* - * As gstage_mode_detect() is changing CSR_HGATP, it is necessary to flush - * guest TLB because: + * As gstage_mode_detect() and vmid_init() are changing CSR_HGATP, it is + * necessary to flush guest TLB because: * * From RISC-V spec: * Speculative executions of the address-translation algorithm behave as diff --git a/xen/arch/riscv/vmid.c b/xen/arch/riscv/vmid.c new file mode 100644 index 0000000000..8fbcd500f2 --- /dev/null +++ b/xen/arch/riscv/vmid.c @@ -0,0 +1,178 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +/* Xen command-line option to enable VMIDs */ +static bool __ro_after_init opt_vmid = true; +boolean_param("vmid", opt_vmid); + +/* + * VMIDs partition the physical TLB. In the current implementation VMIDs are + * introduced to reduce the number of TLB flushes. Each time a guest-physical + * address space changes, instead of flushing the TLB, a new VMID is + * assigned. This reduces the number of TLB flushes to at most 1/#VMIDs. + * The biggest advantage is that hot parts of the hypervisor's code and data + * retain in the TLB. + * + * Sketch of the Implementation: + * + * VMIDs are a hart-local resource. As preemption of VMIDs is not possible, + * VMIDs are assigned in a round-robin scheme. To minimize the overhead of + * VMID invalidation, at the time of a TLB flush, VMIDs are tagged with a + * 64-bit generation. Only on a generation overflow the code needs to + * invalidate all VMID information stored at the VCPUs with are run on the + * specific physical processor. When this overflow appears VMID usage is + * disabled to retain correctness. + */ + +/* Per-Hart VMID management. */ +struct vmid_data { + uint64_t generation; + uint16_t next_vmid; + uint16_t max_vmid; + bool used; +}; + +static DEFINE_PER_CPU(struct vmid_data, vmid_data); + +/* + * vmidlen_detect() is expected to be called during secondary hart bring-up, + * so it should not be marked as __init. + */ +static unsigned int vmidlen_detect(void) +{ + unsigned int vmid_bits; + unsigned char gstage_mode = get_max_supported_mode(); + + /* + * According to the RISC-V Privileged Architecture Spec: + * When MODE=Bare, guest physical addresses are equal to supervisor + * physical addresses, and there is no further memory protection + * for a guest virtual machine beyond the physical memory protection + * scheme described in Section "Physical Memory Protection". + * In this case, the remaining fields in hgatp must be set to zeros. + * Thereby it is necessary to set gstage_mode not equal to Bare. + */ + ASSERT(gstage_mode != HGATP_MODE_OFF); + csr_write(CSR_HGATP, + MASK_INSR(gstage_mode, HGATP_MODE_MASK) | HGATP_VMID_MASK); + vmid_bits = MASK_EXTR(csr_read(CSR_HGATP), HGATP_VMID_MASK); + vmid_bits = flsl(vmid_bits); + csr_write(CSR_HGATP, _AC(0, UL)); + + /* local_hfence_gvma_all() will be called at the end of pre_gstage_init. */ + + return vmid_bits; +} + +/* + * vmid_init() is expected to be called during secondary hart bring-up, + * so it should not be marked as __init. + */ +void vmid_init(void) +{ + static int8_t __ro_after_init g_vmid_used = -1; + + unsigned int vmid_len = vmidlen_detect(); + struct vmid_data *data = &this_cpu(vmid_data); + + BUILD_BUG_ON(MASK_EXTR(HGATP_VMID_MASK, HGATP_VMID_MASK) > + (BIT((sizeof(data->max_vmid) * BITS_PER_BYTE), UL) - 1)); + + data->max_vmid = BIT(vmid_len, U) - 1; + data->used = opt_vmid && (vmid_len > 1); + + if ( g_vmid_used < 0 ) + { + g_vmid_used = data->used; + printk("VMIDs use is %sabled\n", data->used ? "en" : "dis"); + } + else if ( g_vmid_used != data->used ) + printk("CPU%u: VMIDs use is %sabled\n", smp_processor_id(), + data->used ? "en" : "dis"); + + /* Zero indicates 'invalid generation', so we start the count at one. */ + data->generation = 1; + + /* Zero indicates 'VMIDs use disabled', so we start the count at one. */ + data->next_vmid = 1; +} + +void vmid_flush_vcpu(struct vcpu *v) +{ + write_atomic(&v->arch.vmid.generation, 0); +} + +void vmid_flush_hart(void) +{ + struct vmid_data *data = &this_cpu(vmid_data); + + if ( !data->used ) + return; + + if ( likely(++data->generation != 0) ) + return; + + /* + * VMID generations are 64 bit. Overflow of generations never happens. + * For safety, we simply disable ASIDs, so correctness is established; it + * only runs a bit slower. + */ + printk("VMID generation overrun. Disabling VMIDs\n"); + data->used = false; +} + +bool vmid_handle_vmenter(struct vcpu_vmid *vmid) +{ + struct vmid_data *data = &this_cpu(vmid_data); + + if ( !data->used ) + goto disabled; + + /* Test if VCPU has valid VMID. */ + if ( read_atomic(&vmid->generation) == data->generation ) + return 0; + + /* If there are no free VMIDs, need to go to a new generation. */ + if ( unlikely(data->next_vmid > data->max_vmid) ) + { + vmid_flush_hart(); + data->next_vmid = 1; + if ( !data->used ) + goto disabled; + } + + /* Now guaranteed to be a free VMID. */ + vmid->vmid = data->next_vmid++; + write_atomic(&vmid->generation, data->generation); + + /* + * When we assign VMID 1, flush all TLB entries as we are starting a new + * generation, and all old VMID allocations are now stale. + */ + return vmid->vmid == 1; + + disabled: + vmid->vmid = 0; + return 0; +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 11:00:35 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 11:00:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189459.1510207 (Exim 4.92) (envelope-from ) id 1vWBkJ-0001o0-NV; Thu, 18 Dec 2025 11:00:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189459.1510207; Thu, 18 Dec 2025 11:00:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWBkJ-0001ns-Kj; Thu, 18 Dec 2025 11:00:35 +0000 Received: by outflank-mailman (input) for mailman id 1189459; Thu, 18 Dec 2025 11:00:33 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWBkH-0001ne-UU for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 11:00:33 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWBkH-00FweV-0C for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 11:00:33 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWBkH-00Fo9A-10 for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 11:00:33 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=GbbMnT2SnTbiM1koXIcGnmTneffg8Iayoj7o5Sog4V0=; b=NQayO1YePMApoS2p/IrU+akSr3 y4soquKjxAj+QPUEQQdk/Om+za3SDLb9Jh3faiXrecJ4ExRFcUbYJ48hYDgxNVh+2+Ns8A35az5aS RRGW6l2aFDj8hSkIEbbEEvo6N7XwaGFD3MQSAAYTee1gQeWApXuyenJltXMRMSmb3yCw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/riscv: introduce things necessary for p2m initialization Message-Id: Date: Thu, 18 Dec 2025 11:00:33 +0000 commit 45434df6082e8323ca666ee4d53326b1a4eeeb09 Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:13 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 09:59:16 2025 +0100 xen/riscv: introduce things necessary for p2m initialization Introduce the following things: - Update p2m_domain structure, which describe per p2m-table state, with: - lock to protect updates to p2m. - pool with pages used to construct p2m. - back pointer to domain structure. - p2m_init() to initalize members introduced in p2m_domain structure. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/include/asm/domain.h | 5 +++++ xen/arch/riscv/include/asm/p2m.h | 33 +++++++++++++++++++++++++++++++++ xen/arch/riscv/p2m.c | 20 ++++++++++++++++++++ 3 files changed, 58 insertions(+) diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index aac1040658..e688980efa 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -5,6 +5,8 @@ #include #include +#include + struct vcpu_vmid { uint64_t generation; uint16_t vmid; @@ -24,6 +26,9 @@ struct arch_vcpu { struct arch_domain { struct hvm_domain hvm; + + /* Virtual MMU */ + struct p2m_domain p2m; }; #include diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h index 3776b98303..239f90622e 100644 --- a/xen/arch/riscv/include/asm/p2m.h +++ b/xen/arch/riscv/include/asm/p2m.h @@ -3,17 +3,48 @@ #define ASM__RISCV__P2M_H #include +#include +#include +#include #include #define paddr_bits PADDR_BITS +/* Get host p2m table */ +#define p2m_get_hostp2m(d) (&(d)->arch.p2m) + struct gstage_mode_desc { unsigned char mode; unsigned int paging_levels; char name[8]; }; +/* Per-p2m-table state */ +struct p2m_domain { + /* + * Lock that protects updates to the p2m. + */ + rwlock_t lock; + + /* Pages used to construct the p2m */ + struct page_list_head pages; + + /* Back pointer to domain */ + struct domain *domain; + + /* + * P2M updates may required TLBs to be flushed (invalidated). + * + * Flushes may be deferred by setting 'need_flush' and then flushing + * when the p2m write lock is released. + * + * If an immediate flush is required (e.g, if a super page is + * shattered), call p2m_tlb_flush_sync(). + */ + bool need_flush; +}; + /* * List of possible type for each page in the p2m entry. * The number of available bit per page in the pte for this purpose is 2 bits. @@ -97,6 +128,8 @@ static inline bool arch_acquire_resource_check(struct domain *d) void guest_mm_init(void); unsigned char get_max_supported_mode(void); +int p2m_init(struct domain *d); + #endif /* ASM__RISCV__P2M_H */ /* diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index 4e84acaafd..a6e2456f54 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -3,6 +3,10 @@ #include #include #include +#include +#include +#include +#include #include #include @@ -103,3 +107,19 @@ void __init guest_mm_init(void) */ local_hfence_gvma_all(); } + +int p2m_init(struct domain *d) +{ + struct p2m_domain *p2m = p2m_get_hostp2m(d); + + /* + * "Trivial" initialisation is now complete. Set the backpointer so the + * users of p2m could get an access to domain structure. + */ + p2m->domain = d; + + rwlock_init(&p2m->lock); + INIT_PAGE_LIST_HEAD(&p2m->pages); + + return 0; +} -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 11:00:44 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 11:00:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189460.1510211 (Exim 4.92) (envelope-from ) id 1vWBkS-0001qI-Or; Thu, 18 Dec 2025 11:00:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189460.1510211; Thu, 18 Dec 2025 11:00:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWBkS-0001qA-M5; Thu, 18 Dec 2025 11:00:44 +0000 Received: by outflank-mailman (input) for mailman id 1189460; Thu, 18 Dec 2025 11:00:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWBkR-0001q0-FF for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 11:00:43 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWBkR-00Fwed-0U for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 11:00:43 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWBkR-00Fphj-1J for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 11:00:43 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ewaA+4ec5xSNRzhGYhMnCXylb7i3jmAXelvD2dLNrVs=; b=5tfjLDMX4IkwLIYY+0ylNVsafD 9Bwygld+OGqkeald7MFQ24UNjDb1pQN0CcR1Tl5kW9e+Cy5BCPCUza3OwFk9Fm0Uk7lc26lpx43E0 m2vn+TbVW3WvkkdnKAVY56xoH9ahdUQDiq1DPYzvVFo010sZDWS/5VEK0d1CJ0wGJodI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/riscv: construct the P2M pages pool for guests Message-Id: Date: Thu, 18 Dec 2025 11:00:43 +0000 commit 3810f155218616237511b9c62172a87709f4fa13 Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:14 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 09:59:29 2025 +0100 xen/riscv: construct the P2M pages pool for guests Implement p2m_set_allocation() to construct p2m pages pool for guests based on required number of pages. This is implemented by: - Adding a `struct paging_domain` which contains a freelist, a counter variable and a spinlock to `struct arch_domain` to indicate the free p2m pages and the number of p2m total pages in the p2m pages pool. - Adding a helper `p2m_set_allocation` to set the p2m pages pool size. This helper should be called before allocating memory for a guest and is called from domain_p2m_set_allocation(), the latter is a part of common dom0less code. - Adding implementation of paging_freelist_adjust() and paging_domain_init(). Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/include/asm/Makefile | 1 - xen/arch/riscv/include/asm/domain.h | 12 +++++++ xen/arch/riscv/include/asm/paging.h | 13 ++++++++ xen/arch/riscv/p2m.c | 18 ++++++++++ xen/arch/riscv/paging.c | 65 +++++++++++++++++++++++++++++++++++++ 6 files changed, 109 insertions(+), 1 deletion(-) diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index c93c837aac..9dde693db4 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -7,6 +7,7 @@ obj-y += intc.o obj-y += irq.o obj-y += mm.o obj-y += p2m.o +obj-y += paging.o obj-y += pt.o obj-$(CONFIG_RISCV_64) += riscv64/ obj-y += sbi.o diff --git a/xen/arch/riscv/include/asm/Makefile b/xen/arch/riscv/include/asm/Makefile index bfdf186c68..3824f31c39 100644 --- a/xen/arch/riscv/include/asm/Makefile +++ b/xen/arch/riscv/include/asm/Makefile @@ -6,7 +6,6 @@ generic-y += hardirq.h generic-y += hypercall.h generic-y += iocap.h generic-y += irq-dt.h -generic-y += paging.h generic-y += percpu.h generic-y += perfc_defn.h generic-y += random.h diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index e688980efa..316e7c6c84 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -2,6 +2,8 @@ #ifndef ASM__RISCV__DOMAIN_H #define ASM__RISCV__DOMAIN_H +#include +#include #include #include @@ -24,11 +26,21 @@ struct arch_vcpu { struct vcpu_vmid vmid; }; +struct paging_domain { + spinlock_t lock; + /* Free pages from the pre-allocated pool */ + struct page_list_head freelist; + /* Number of pages from the pre-allocated pool */ + unsigned long total_pages; +}; + struct arch_domain { struct hvm_domain hvm; /* Virtual MMU */ struct p2m_domain p2m; + + struct paging_domain paging; }; #include diff --git a/xen/arch/riscv/include/asm/paging.h b/xen/arch/riscv/include/asm/paging.h new file mode 100644 index 0000000000..98d8b06d45 --- /dev/null +++ b/xen/arch/riscv/include/asm/paging.h @@ -0,0 +1,13 @@ +#ifndef ASM_RISCV_PAGING_H +#define ASM_RISCV_PAGING_H + +#include + +struct domain; + +int paging_domain_init(struct domain *d); + +int paging_freelist_adjust(struct domain *d, unsigned long pages, + bool *preempted); + +#endif /* ASM_RISCV_PAGING_H */ diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index a6e2456f54..39c84f1a3b 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include @@ -118,8 +119,25 @@ int p2m_init(struct domain *d) */ p2m->domain = d; + paging_domain_init(d); + rwlock_init(&p2m->lock); INIT_PAGE_LIST_HEAD(&p2m->pages); return 0; } + +/* + * Set the pool of pages to the required number of pages. + * Returns 0 for success, non-zero for failure. + * Call with d->arch.paging.lock held. + */ +int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted) +{ + int rc; + + if ( (rc = paging_freelist_adjust(d, pages, preempted)) ) + return rc; + + return 0; +} diff --git a/xen/arch/riscv/paging.c b/xen/arch/riscv/paging.c new file mode 100644 index 0000000000..2df8de033b --- /dev/null +++ b/xen/arch/riscv/paging.c @@ -0,0 +1,65 @@ +#include +#include +#include +#include +#include + +int paging_freelist_adjust(struct domain *d, unsigned long pages, + bool *preempted) +{ + struct page_info *pg; + + ASSERT(spin_is_locked(&d->arch.paging.lock)); + + for ( ; ; ) + { + if ( d->arch.paging.total_pages < pages ) + { + /* Need to allocate more memory from domheap */ + pg = alloc_domheap_page(d, MEMF_no_owner); + if ( pg == NULL ) + { + printk(XENLOG_ERR "Failed to allocate pages.\n"); + return -ENOMEM; + } + ACCESS_ONCE(d->arch.paging.total_pages)++; + page_list_add_tail(pg, &d->arch.paging.freelist); + } + else if ( d->arch.paging.total_pages > pages ) + { + /* Need to return memory to domheap */ + pg = page_list_remove_head(&d->arch.paging.freelist); + if ( pg ) + { + ACCESS_ONCE(d->arch.paging.total_pages)--; + free_domheap_page(pg); + } + else + { + printk(XENLOG_ERR + "Failed to free pages, freelist is empty.\n"); + return -ENOMEM; + } + } + else + break; + + /* Check to see if we need to yield and try again */ + if ( preempted && general_preempt_check() ) + { + *preempted = true; + return -ERESTART; + } + } + + return 0; +} + +/* Domain paging struct initialization. */ +int paging_domain_init(struct domain *d) +{ + spin_lock_init(&d->arch.paging.lock); + INIT_PAGE_LIST_HEAD(&d->arch.paging.freelist); + + return 0; +} -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 11:00:54 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 11:00:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189461.1510214 (Exim 4.92) (envelope-from ) id 1vWBkc-0001ti-QE; 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Thu, 18 Dec 2025 11:00:53 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=fGU++3J9rWUHnlPPS3+bMEBaTv1Km5UA/xiYD5opazU=; b=AH4sxx7QxD5fwoNdiNkyZb/mj2 R/COv/53aX0LPop9AjD1dHkCEvfvPFvi+7q9/4IJs+oLO+SGlyc8gbSbWipmYHnBFDCusZFgytSpp 6YeENVWc/NYarUsxHhBiMJxE0Ag3RVZQrz6lNb3NYvVJAA+/5UuizTw8W6fknWJxJNEg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/riscv: add root page table allocation Message-Id: Date: Thu, 18 Dec 2025 11:00:53 +0000 commit 824ec513843bcaf1ba1b4e8d43cbf77f5eda7eef Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:15 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 09:59:40 2025 +0100 xen/riscv: add root page table allocation Introduce support for allocating and initializing the root page table required for RISC-V stage-2 address translation. To implement root page table allocation the following is introduced: - p2m_get_clean_page() and p2m_alloc_root_table(), p2m_allocate_root() helpers to allocate and zero a 16 KiB root page table, as mandated by the RISC-V privileged specification for Sv32x4/Sv39x4/Sv48x4/Sv57x4 modes. - Update p2m_init() to inititialize p2m_root_order. - Add maddr_to_page() and page_to_maddr() macros for easier address manipulation. - Introduce paging_ret_to_domheap() to return some pages before allocate 16 KiB pages for root page table. - Allocate root p2m table after p2m pool is initialized. - Add construct_hgatp() to construct the hgatp register value based on p2m->root, p2m->hgatp_mode and VMID. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/include/asm/mm.h | 4 + xen/arch/riscv/include/asm/p2m.h | 17 +++++ xen/arch/riscv/include/asm/paging.h | 3 + xen/arch/riscv/include/asm/riscv_encoding.h | 2 + xen/arch/riscv/p2m.c | 99 ++++++++++++++++++++++++- xen/arch/riscv/paging.c | 110 +++++++++++++++++++++------- 6 files changed, 206 insertions(+), 29 deletions(-) diff --git a/xen/arch/riscv/include/asm/mm.h b/xen/arch/riscv/include/asm/mm.h index e5ea91fa4d..2f7927e6f4 100644 --- a/xen/arch/riscv/include/asm/mm.h +++ b/xen/arch/riscv/include/asm/mm.h @@ -167,6 +167,10 @@ extern struct page_info *frametable_virt_start; #define mfn_to_page(mfn) (frametable_virt_start + mfn_x(mfn)) #define page_to_mfn(pg) _mfn((pg) - frametable_virt_start) +/* Convert between machine addresses and page-info structures. */ +#define maddr_to_page(ma) mfn_to_page(maddr_to_mfn(ma)) +#define page_to_maddr(pg) mfn_to_maddr(page_to_mfn(pg)) + static inline void *page_to_virt(const struct page_info *pg) { return mfn_to_virt(mfn_x(page_to_mfn(pg))); diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h index 239f90622e..c9aa19ad43 100644 --- a/xen/arch/riscv/include/asm/p2m.h +++ b/xen/arch/riscv/include/asm/p2m.h @@ -2,6 +2,7 @@ #ifndef ASM__RISCV__P2M_H #define ASM__RISCV__P2M_H +#include #include #include #include @@ -9,6 +10,9 @@ #include +#define P2M_ROOT_ORDER (ilog2(GSTAGE_ROOT_PAGE_TABLE_SIZE) - PAGE_SHIFT) +#define P2M_ROOT_PAGES BIT(P2M_ROOT_ORDER, U) + #define paddr_bits PADDR_BITS /* Get host p2m table */ @@ -30,6 +34,11 @@ struct p2m_domain { /* Pages used to construct the p2m */ struct page_list_head pages; + /* The root of the p2m tree. May be concatenated */ + struct page_info *root; + + struct gstage_mode_desc mode; + /* Back pointer to domain */ struct domain *domain; @@ -43,6 +52,12 @@ struct p2m_domain { * shattered), call p2m_tlb_flush_sync(). */ bool need_flush; + + /* + * Indicate if it is required to clean the cache when writing an entry or + * when a page is needed to be fully cleared and cleaned. + */ + bool clean_dcache; }; /* @@ -130,6 +145,8 @@ unsigned char get_max_supported_mode(void); int p2m_init(struct domain *d); +unsigned long construct_hgatp(const struct p2m_domain *p2m, uint16_t vmid); + #endif /* ASM__RISCV__P2M_H */ /* diff --git a/xen/arch/riscv/include/asm/paging.h b/xen/arch/riscv/include/asm/paging.h index 98d8b06d45..01be45528f 100644 --- a/xen/arch/riscv/include/asm/paging.h +++ b/xen/arch/riscv/include/asm/paging.h @@ -10,4 +10,7 @@ int paging_domain_init(struct domain *d); int paging_freelist_adjust(struct domain *d, unsigned long pages, bool *preempted); +int paging_ret_to_domheap(struct domain *d, unsigned int nr_pages); +int paging_refill_from_domheap(struct domain *d, unsigned int nr_pages); + #endif /* ASM_RISCV_PAGING_H */ diff --git a/xen/arch/riscv/include/asm/riscv_encoding.h b/xen/arch/riscv/include/asm/riscv_encoding.h index e0a5e8b58b..1f7e612366 100644 --- a/xen/arch/riscv/include/asm/riscv_encoding.h +++ b/xen/arch/riscv/include/asm/riscv_encoding.h @@ -180,6 +180,8 @@ #define HGATP_MODE_MASK HGATP32_MODE_MASK #endif +#define GSTAGE_ROOT_PAGE_TABLE_SIZE KB(16) + #define TOPI_IID_SHIFT 16 #define TOPI_IID_MASK 0xfff #define TOPI_IPRIO_MASK 0xff diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index 39c84f1a3b..d14757331f 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -3,6 +3,7 @@ #include #include #include +#include #include #include #include @@ -109,6 +110,74 @@ void __init guest_mm_init(void) local_hfence_gvma_all(); } +static void clear_and_clean_page(struct page_info *page, bool clean_dcache) +{ + void *p = __map_domain_page(page); + + clear_page(p); + + /* + * If the IOMMU doesn't support coherent walks and the p2m tables are + * shared between the CPU and IOMMU, it is necessary to clean the + * d-cache. + */ + if ( clean_dcache ) + clean_dcache_va_range(p, PAGE_SIZE); + + unmap_domain_page(p); +} + +unsigned long construct_hgatp(const struct p2m_domain *p2m, uint16_t vmid) +{ + return MASK_INSR(mfn_x(page_to_mfn(p2m->root)), HGATP_PPN_MASK) | + MASK_INSR(p2m->mode.mode, HGATP_MODE_MASK) | + MASK_INSR(vmid, HGATP_VMID_MASK); +} + +static int p2m_alloc_root_table(struct p2m_domain *p2m) +{ + struct domain *d = p2m->domain; + struct page_info *page; + int rc; + + /* + * Return back P2M_ROOT_PAGES to assure the root table memory is also + * accounted against the P2M pool of the domain. + */ + if ( (rc = paging_ret_to_domheap(d, P2M_ROOT_PAGES)) ) + return rc; + + /* + * As mentioned in the Priviliged Architecture Spec (version 20240411) + * in Section 18.5.1, for the paged virtual-memory schemes (Sv32x4, + * Sv39x4, Sv48x4, and Sv57x4), the root page table is 16 KiB and must + * be aligned to a 16-KiB boundary. + */ + page = alloc_domheap_pages(d, P2M_ROOT_ORDER, MEMF_no_owner); + if ( !page ) + { + /* + * If allocation of root table pages fails, the pages acquired above + * must be returned to the freelist to maintain proper freelist + * balance. + */ + paging_refill_from_domheap(d, P2M_ROOT_PAGES); + + return -ENOMEM; + } + + for ( unsigned int i = 0; i < P2M_ROOT_PAGES; i++ ) + { + clear_and_clean_page(page + i, p2m->clean_dcache); + + page_list_add(page + i, &p2m->pages); + } + + p2m->root = page; + + return 0; +} + int p2m_init(struct domain *d) { struct p2m_domain *p2m = p2m_get_hostp2m(d); @@ -124,6 +193,24 @@ int p2m_init(struct domain *d) rwlock_init(&p2m->lock); INIT_PAGE_LIST_HEAD(&p2m->pages); + /* + * Currently, the infrastructure required to enable CONFIG_HAS_PASSTHROUGH + * is not ready for RISC-V support. + * + * When CONFIG_HAS_PASSTHROUGH=y, p2m->clean_dcache must be properly + * initialized. + * At the moment, it defaults to false because the p2m structure is + * zero-initialized. + */ +#ifdef CONFIG_HAS_PASSTHROUGH +# error "Add init of p2m->clean_dcache" +#endif + + /* TODO: don't hardcode used for a domain g-stage mode. */ + p2m->mode.mode = HGATP_MODE_SV39X4; + p2m->mode.paging_levels = 2; + safe_strcpy(p2m->mode.name, "Sv39x4"); + return 0; } @@ -134,10 +221,20 @@ int p2m_init(struct domain *d) */ int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted) { + struct p2m_domain *p2m = p2m_get_hostp2m(d); int rc; if ( (rc = paging_freelist_adjust(d, pages, preempted)) ) return rc; - return 0; + /* + * First, initialize p2m pool. Then allocate the root + * table so that the necessary pages can be returned from the p2m pool, + * since the root table must be allocated using alloc_domheap_pages(...) + * to meet its specific requirements. + */ + if ( !p2m->root ) + rc = p2m_alloc_root_table(p2m); + + return rc; } diff --git a/xen/arch/riscv/paging.c b/xen/arch/riscv/paging.c index 2df8de033b..d401ddc34e 100644 --- a/xen/arch/riscv/paging.c +++ b/xen/arch/riscv/paging.c @@ -4,46 +4,67 @@ #include #include +static int _paging_ret_to_domheap(struct domain *d) +{ + struct page_info *page; + + ASSERT(spin_is_locked(&d->arch.paging.lock)); + + /* Return memory to domheap. */ + page = page_list_remove_head(&d->arch.paging.freelist); + if( page ) + { + d->arch.paging.total_pages--; + free_domheap_page(page); + } + else + { + printk(XENLOG_ERR + "failed to free pages, P2M freelist is empty\n"); + return -ENOMEM; + } + + return 0; +} + +static int _paging_add_to_freelist(struct domain *d) +{ + struct page_info *page; + + ASSERT(spin_is_locked(&d->arch.paging.lock)); + + /* Need to allocate more memory from domheap */ + page = alloc_domheap_page(d, MEMF_no_owner); + if ( page == NULL ) + { + printk(XENLOG_ERR "failed to allocate pages\n"); + return -ENOMEM; + } + d->arch.paging.total_pages++; + page_list_add_tail(page, &d->arch.paging.freelist); + + return 0; +} + int paging_freelist_adjust(struct domain *d, unsigned long pages, bool *preempted) { - struct page_info *pg; - ASSERT(spin_is_locked(&d->arch.paging.lock)); for ( ; ; ) { + int rc = 0; + if ( d->arch.paging.total_pages < pages ) - { - /* Need to allocate more memory from domheap */ - pg = alloc_domheap_page(d, MEMF_no_owner); - if ( pg == NULL ) - { - printk(XENLOG_ERR "Failed to allocate pages.\n"); - return -ENOMEM; - } - ACCESS_ONCE(d->arch.paging.total_pages)++; - page_list_add_tail(pg, &d->arch.paging.freelist); - } + rc = _paging_add_to_freelist(d); else if ( d->arch.paging.total_pages > pages ) - { - /* Need to return memory to domheap */ - pg = page_list_remove_head(&d->arch.paging.freelist); - if ( pg ) - { - ACCESS_ONCE(d->arch.paging.total_pages)--; - free_domheap_page(pg); - } - else - { - printk(XENLOG_ERR - "Failed to free pages, freelist is empty.\n"); - return -ENOMEM; - } - } + rc = _paging_ret_to_domheap(d); else break; + if ( rc ) + return rc; + /* Check to see if we need to yield and try again */ if ( preempted && general_preempt_check() ) { @@ -55,6 +76,39 @@ int paging_freelist_adjust(struct domain *d, unsigned long pages, return 0; } +int paging_refill_from_domheap(struct domain *d, unsigned int nr_pages) +{ + ASSERT(spin_is_locked(&d->arch.paging.lock)); + + for ( unsigned int i = 0; i < nr_pages; i++ ) + { + int rc = _paging_add_to_freelist(d); + + if ( rc ) + return rc; + } + + return 0; +} + +int paging_ret_to_domheap(struct domain *d, unsigned int nr_pages) +{ + ASSERT(spin_is_locked(&d->arch.paging.lock)); + + if ( d->arch.paging.total_pages < nr_pages ) + return false; + + for ( unsigned int i = 0; i < nr_pages; i++ ) + { + int rc = _paging_ret_to_domheap(d); + + if ( rc ) + return rc; + } + + return 0; +} + /* Domain paging struct initialization. */ int paging_domain_init(struct domain *d) { -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 11:01:04 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 11:01:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189462.1510219 (Exim 4.92) (envelope-from ) id 1vWBkm-0001w2-Rw; Thu, 18 Dec 2025 11:01:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189462.1510219; Thu, 18 Dec 2025 11:01:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWBkm-0001vu-PG; Thu, 18 Dec 2025 11:01:04 +0000 Received: by outflank-mailman (input) for mailman id 1189462; Thu, 18 Dec 2025 11:01:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWBkl-0001vk-L6 for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/riscv: introduce pte_{set,get}_mfn() Message-Id: Date: Thu, 18 Dec 2025 11:01:03 +0000 commit 3d197aad8aa98cbd22fca3054363aae7227f496d Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:16 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 09:59:53 2025 +0100 xen/riscv: introduce pte_{set,get}_mfn() Introduce helpers pte_{set,get}_mfn() to simplify setting and getting of mfn. Also, introduce PTE_PPN_MASK and add BUILD_BUG_ON() to be sure that PTE_PPN_MASK remains the same for all MMU modes except Sv32. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/include/asm/page.h | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/xen/arch/riscv/include/asm/page.h b/xen/arch/riscv/include/asm/page.h index 7fde99f916..1fc5998a0b 100644 --- a/xen/arch/riscv/include/asm/page.h +++ b/xen/arch/riscv/include/asm/page.h @@ -112,6 +112,30 @@ typedef struct { #endif } pte_t; +#if RV_STAGE1_MODE != SATP_MODE_SV32 +#define PTE_PPN_MASK _UL(0x3FFFFFFFFFFC00) +#else +#define PTE_PPN_MASK _U(0xFFFFFC00) +#endif + +static inline void pte_set_mfn(pte_t *p, mfn_t mfn) +{ + /* + * At the moment spec provides Sv32 - Sv57. + * If one day new MMU mode will be added it will be needed + * to check that PPN mask still continue to cover bits 53:10. + */ + BUILD_BUG_ON(RV_STAGE1_MODE > SATP_MODE_SV57); + + p->pte &= ~PTE_PPN_MASK; + p->pte |= MASK_INSR(mfn_x(mfn), PTE_PPN_MASK); +} + +static inline mfn_t pte_get_mfn(pte_t p) +{ + return _mfn(MASK_EXTR(p.pte, PTE_PPN_MASK)); +} + static inline bool pte_is_valid(pte_t p) { return p.pte & PTE_VALID; -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 11:01:14 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 11:01:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189464.1510223 (Exim 4.92) (envelope-from ) id 1vWBkw-0001yz-Uc; Thu, 18 Dec 2025 11:01:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189464.1510223; Thu, 18 Dec 2025 11:01:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWBkw-0001yr-S0; Thu, 18 Dec 2025 11:01:14 +0000 Received: by outflank-mailman (input) for mailman id 1189464; Thu, 18 Dec 2025 11:01:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWBkv-0001yf-OY for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 11:01:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWBkv-00FwfR-1Q for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 11:01:13 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWBkv-00FtrW-2C for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 11:01:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=s0Zt60wusgtdKYVFmQ1QAuEB5+/T+iAoCXnf4zxPv7E=; b=5uUpZm8YSUtuuOdOQKslB8QrPu TQKMzhpJpJwGQXU76mxojWNnghPYOFVS4C0cRRQpLlcIwles4Z04d1IaKKb24n2NrR5uVDrZiESQo 9kdhfkD9R0sWxsScEkH7SudmqjYeDlNsHnNtxEzlJ+DQhj+kdij/zPQnRydjDyM6WUj4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/riscv: add new p2m types and helper macros for type classification Message-Id: Date: Thu, 18 Dec 2025 11:01:13 +0000 commit c9f88ba993da72233384689d6cf5da82ed4fb3d3 Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:17 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 10:00:07 2025 +0100 xen/riscv: add new p2m types and helper macros for type classification - Extended p2m_type_t with additional types: p2m_mmio_direct, p2m_ext_storage. - Added macros to classify memory types: P2M_RAM_TYPES. - Introduced helper predicates: p2m_is_ram(), p2m_is_any_ram(). - Introduce arch_dt_passthrough() to tell handle_passthrough_prop() from common code how to map device memory. - Introduce p2m_first_external for detection for relational operations with p2m type which is stored outside P2M's PTE bits. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/include/asm/p2m.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h index c9aa19ad43..1c89838408 100644 --- a/xen/arch/riscv/include/asm/p2m.h +++ b/xen/arch/riscv/include/asm/p2m.h @@ -70,8 +70,29 @@ struct p2m_domain { typedef enum { p2m_invalid = 0, /* Nothing mapped here */ p2m_ram_rw, /* Normal read/write domain RAM */ + p2m_mmio_direct_io, /* Read/write mapping of genuine Device MMIO area, + PTE_PBMT_IO will be used for such mappings */ + p2m_ext_storage, /* Following types'll be stored outsude PTE bits: */ + + /* Sentinel — not a real type, just a marker for comparison */ + p2m_first_external = p2m_ext_storage, } p2m_type_t; +static inline p2m_type_t arch_dt_passthrough_p2m_type(void) +{ + return p2m_mmio_direct_io; +} + +/* We use bitmaps and mask to handle groups of types */ +#define p2m_to_mask(t) BIT(t, UL) + +/* RAM types, which map to real machine frames */ +#define P2M_RAM_TYPES (p2m_to_mask(p2m_ram_rw)) + +/* Useful predicates */ +#define p2m_is_ram(t) (p2m_to_mask(t) & P2M_RAM_TYPES) +#define p2m_is_any_ram(t) (p2m_to_mask(t) & P2M_RAM_TYPES) + #include static inline int get_page_and_type(struct page_info *page, -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 11:01:25 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 11:01:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189465.1510226 (Exim 4.92) (envelope-from ) id 1vWBl6-00021P-WF; Thu, 18 Dec 2025 11:01:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189465.1510226; Thu, 18 Dec 2025 11:01:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWBl6-00021H-TZ; Thu, 18 Dec 2025 11:01:24 +0000 Received: by outflank-mailman (input) for mailman id 1189465; Thu, 18 Dec 2025 11:01:23 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWBl5-00021B-SJ for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 11:01:23 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWBl5-00FwfX-1o for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 11:01:23 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWBl5-00FvWn-2a for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 11:01:23 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=E3wjbCNfrmTlsN0hOxebtRSF1egeXu0+exoP7qqyuk4=; b=7Fq5X104h8FZw6ITRWakR1AbxH ShYu7M27W1fXcJOLN+RwgaXRQuuvAzK7BDDM7VprHzogySIdMGaXEO+qvj8ygUrsBh5kRX6RB0Hl5 bTEzrilO6RFJaS5RCvQOPqJQi4rOEnUxgPHHrCthsklstaANv9arje/MpM8XMujUUhdU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/x86: move domain_clamp_alloc_bitsize() into pv32 code Message-Id: Date: Thu, 18 Dec 2025 11:01:23 +0000 commit c37bcb35f928c81cbeea7c05f86b6779f8a2b8c4 Author: Grygorii Strashko AuthorDate: Thu Dec 18 10:00:34 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 10:04:55 2025 +0100 xen/x86: move domain_clamp_alloc_bitsize() into pv32 code The d->arch.physaddr_bitsize field is used only by PV32 code so as the domain_clamp_alloc_bitsize() function. Hence move domain_clamp_alloc_bitsize() function into PV32 code and convert it to macro. Signed-off-by: Grygorii Strashko Reviewed-by: Jan Beulich --- xen/arch/x86/include/asm/mm.h | 11 +++++++++-- xen/arch/x86/x86_64/mm.c | 7 ------- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h index 9438f5ea01..3fc678d32f 100644 --- a/xen/arch/x86/include/asm/mm.h +++ b/xen/arch/x86/include/asm/mm.h @@ -619,8 +619,15 @@ void __iomem *ioremap_wc(paddr_t pa, size_t len); extern int memory_add(unsigned long spfn, unsigned long epfn, unsigned int pxm); -unsigned int domain_clamp_alloc_bitsize(struct domain *d, unsigned int bits); -#define domain_clamp_alloc_bitsize(d, bits) domain_clamp_alloc_bitsize(d, bits) +#ifdef CONFIG_PV32 +#define domain_clamp_alloc_bitsize(d, bits) ({ \ + const struct domain *_d = (d); \ + \ + ((_d && _d->arch.physaddr_bitsize) \ + ? min_t(unsigned int, _d->arch.physaddr_bitsize, bits) \ + : (bits)); \ +}) +#endif unsigned long domain_get_maximum_gpfn(struct domain *d); diff --git a/xen/arch/x86/x86_64/mm.c b/xen/arch/x86/x86_64/mm.c index 42fd4fe4e9..8eadab7933 100644 --- a/xen/arch/x86/x86_64/mm.c +++ b/xen/arch/x86/x86_64/mm.c @@ -1119,13 +1119,6 @@ unmap: return ret; } -unsigned int domain_clamp_alloc_bitsize(struct domain *d, unsigned int bits) -{ - if ( (d == NULL) || (d->arch.physaddr_bitsize == 0) ) - return bits; - return min(d->arch.physaddr_bitsize, bits); -} - static int transfer_pages_to_heap(struct mem_hotadd_info *info) { unsigned long i; -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 11:01:36 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 11:01:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189467.1510230 (Exim 4.92) (envelope-from ) id 1vWBlI-00024U-1H; Thu, 18 Dec 2025 11:01:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189467.1510230; Thu, 18 Dec 2025 11:01:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWBlH-00024M-V1; Thu, 18 Dec 2025 11:01:35 +0000 Received: by outflank-mailman (input) for mailman id 1189467; Thu, 18 Dec 2025 11:01:34 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWBlF-00024B-Vw for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 11:01:33 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWBlF-00Fwff-2A for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 11:01:33 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWBlF-00Fwz5-2z for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 11:01:33 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=r6QrJ92KO2ntFFxWaT+g+ux9oIpDk2cB/gfvgXpUXyI=; b=FxXG9GeojF58EhkvJLL++v12I5 9orKBBTgoeFBPSm/TQDvX9oM+T96cv1/Hr5FE0RRLGJrV/23nTGTYgbhXWKeHxQXFg03/u5eDsry/ aB8/dNdaJuHquv7n4TXkPa8N2U1Axk4Y2myx89NtG38yytDsDTt65LGQkIsxm7nmdnfs=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/x86: move d->arch.physaddr_bitsize field handling into pv32 Message-Id: Date: Thu, 18 Dec 2025 11:01:33 +0000 commit 7d2e057368ae4014745931d0bf876c817c820599 Author: Grygorii Strashko AuthorDate: Thu Dec 18 10:07:08 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 10:07:08 2025 +0100 xen/x86: move d->arch.physaddr_bitsize field handling into pv32 The d->arch.physaddr_bitsize field is used only by PV32 code, so move d->arch.physaddr_bitsize field under PV32 ifdef into struct pv_domain. Signed-off-by: Grygorii Strashko Reviewed-by: Andrew Cooper --- xen/arch/x86/include/asm/domain.h | 6 +++--- xen/arch/x86/include/asm/mm.h | 4 ++-- xen/arch/x86/pv/dom0_build.c | 7 +++++-- xen/arch/x86/pv/domain.c | 2 +- 4 files changed, 11 insertions(+), 8 deletions(-) diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/domain.h index 7e5cbd11a4..16cd45cc32 100644 --- a/xen/arch/x86/include/asm/domain.h +++ b/xen/arch/x86/include/asm/domain.h @@ -290,6 +290,9 @@ struct pv_domain #ifdef CONFIG_PV32 unsigned int hv_compat_vstart; + + /* Maximum physical-address bitwidth supported by this guest. */ + unsigned int physaddr_bitsize; #endif /* map_domain_page() mapping cache. */ @@ -319,9 +322,6 @@ struct arch_domain { struct page_info *perdomain_l3_pg; - /* Maximum physical-address bitwidth supported by this guest. */ - unsigned int physaddr_bitsize; - /* I/O-port admin-specified access capabilities. */ struct rangeset *ioport_caps; uint32_t pci_cf8; diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h index 3fc678d32f..419fa17a43 100644 --- a/xen/arch/x86/include/asm/mm.h +++ b/xen/arch/x86/include/asm/mm.h @@ -623,8 +623,8 @@ extern int memory_add(unsigned long spfn, unsigned long epfn, unsigned int pxm); #define domain_clamp_alloc_bitsize(d, bits) ({ \ const struct domain *_d = (d); \ \ - ((_d && _d->arch.physaddr_bitsize) \ - ? min_t(unsigned int, _d->arch.physaddr_bitsize, bits) \ + ((_d && _d->arch.pv.physaddr_bitsize) \ + ? min_t(unsigned int, _d->arch.pv.physaddr_bitsize, bits) \ : (bits)); \ }) #endif diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c index 418b453ba8..9a11a0a16b 100644 --- a/xen/arch/x86/pv/dom0_build.c +++ b/xen/arch/x86/pv/dom0_build.c @@ -626,8 +626,10 @@ static int __init dom0_construct(const struct boot_domain *bd) initrd_mfn = paddr_to_pfn(initrd->start); mfn = initrd_mfn; count = PFN_UP(initrd_len); - if ( d->arch.physaddr_bitsize && - ((mfn + count - 1) >> (d->arch.physaddr_bitsize - PAGE_SHIFT)) ) + +#ifdef CONFIG_PV32 + if ( d->arch.pv.physaddr_bitsize && + ((mfn + count - 1) >> (d->arch.pv.physaddr_bitsize - PAGE_SHIFT)) ) { order = get_order_from_pages(count); page = alloc_domheap_pages(d, order, MEMF_no_scrub); @@ -650,6 +652,7 @@ static int __init dom0_construct(const struct boot_domain *bd) initrd->start = pfn_to_paddr(initrd_mfn); } else +#endif { while ( count-- ) if ( assign_pages(mfn_to_page(_mfn(mfn++)), 1, d, 0) ) diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c index ca5f692051..01499582d2 100644 --- a/xen/arch/x86/pv/domain.c +++ b/xen/arch/x86/pv/domain.c @@ -257,7 +257,7 @@ int switch_compat(struct domain *d) d->arch.pv.hv_compat_vstart = __HYPERVISOR_COMPAT_VIRT_START; if ( MACH2PHYS_COMPAT_NR_ENTRIES(d) < max_page ) - d->arch.physaddr_bitsize = + d->arch.pv.physaddr_bitsize = /* 2^n entries can be contained in guest's p2m mapping space */ fls(MACH2PHYS_COMPAT_NR_ENTRIES(d)) - 1 + PAGE_SHIFT; -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 12:00:12 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 12:00:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189495.1510236 (Exim 4.92) (envelope-from ) id 1vWCfs-0001dC-13; Thu, 18 Dec 2025 12:00:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189495.1510236; Thu, 18 Dec 2025 12:00:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWCfr-0001cm-UK; Thu, 18 Dec 2025 12:00:03 +0000 Received: by outflank-mailman (input) for mailman id 1189495; Thu, 18 Dec 2025 12:00:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWCfp-00019K-SZ for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 12:00:01 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWCfp-00Fxon-1P for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 12:00:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWCfp-005cck-27 for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 12:00:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=onMGNwC9hKL+xyfB0eZRGQxBiojF0+APfphZCdv4H00=; b=pOel/F3/mQ4iCloH8xB5LZaFSw QHqzI63gsAJ01bwPC1p9RTKKoZwgsRAWhUzAwGWJNuvyozH9N9VR42TIummSx2OFyivp7gBk2dXmH wE6xzap4oQ7e5nBN7J3AQlnGkBIGI4c7klpTgB5UJR6GfFKlUEmvVmwgQsnY1S5Xd63s=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools/fuzz: use vpath uniformly for access to hypervisor library code Message-Id: Date: Thu, 18 Dec 2025 12:00:01 +0000 commit 9cf4084f4ee51123f95a5bb1e7220e89da16350e Author: Jan Beulich AuthorDate: Thu Dec 18 09:57:42 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 09:57:42 2025 +0100 tools/fuzz: use vpath uniformly for access to hypervisor library code It's not quite clear why for libelf and the emulator we use symlink-ing, while elsewhere we use vpath. Do so for these two as well, thus also eliminating the need for custom -iquote options and custom cleaning. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- tools/fuzz/libelf/Makefile | 8 +++----- tools/fuzz/x86_instruction_emulator/Makefile | 6 ++---- 2 files changed, 5 insertions(+), 9 deletions(-) diff --git a/tools/fuzz/libelf/Makefile b/tools/fuzz/libelf/Makefile index 9211f75951..0df5c4c826 100644 --- a/tools/fuzz/libelf/Makefile +++ b/tools/fuzz/libelf/Makefile @@ -1,17 +1,15 @@ XEN_ROOT = $(CURDIR)/../../.. include $(XEN_ROOT)/tools/Rules.mk +vpath %.c $(XEN_ROOT)/xen/common/libelf + LIBELF_OBJS := libelf-tools.o libelf-loader.o libelf-dominfo.o -CFLAGS += -iquote ../../../xen/common/libelf $(LIBELF_OBJS): CFLAGS += -Wno-pointer-sign $(LIBELF_OBJS): CFLAGS += -DFUZZ_NO_LIBXC $(CFLAGS_xeninclude) libelf-fuzzer.o: CFLAGS += $(CFLAGS_xeninclude) -$(LIBELF_OBJS:.o=.c): libelf-%.c: ../../../xen/common/libelf/libelf-%.c FORCE - ln -nsf $< $@ - libelf.a: libelf-fuzzer.o $(LIBELF_OBJS) $(AR) rc $@ $^ @@ -30,7 +28,7 @@ distclean: clean .PHONY: clean clean: - rm -f *.o .*.d *.a *-libelf-fuzzer $(LIBELF_OBJS:.o=.c) + rm -f *.o .*.d *.a *-libelf-fuzzer .PHONY: install install: all diff --git a/tools/fuzz/x86_instruction_emulator/Makefile b/tools/fuzz/x86_instruction_emulator/Makefile index 459743f4d9..524644ec28 100644 --- a/tools/fuzz/x86_instruction_emulator/Makefile +++ b/tools/fuzz/x86_instruction_emulator/Makefile @@ -9,8 +9,7 @@ x86-insn-fuzz-all: endif # Add libx86 to the build -%.c: $(XEN_ROOT)/xen/lib/x86/%.c FORCE - ln -nsf $< $@ +vpath %.c $(XEN_ROOT)/xen/lib/x86 x86_emulate: FORCE mkdir -p $@ @@ -25,7 +24,6 @@ x86_emulate/%.h: x86_emulate ; ln -nsf $< $@ CFLAGS += $(CFLAGS_xeninclude) -D__XEN_TOOLS__ -iquote . -cpuid.o: CFLAGS += -iquote $(XEN_ROOT)/xen/lib/x86 GCOV_FLAGS := --coverage %-cov.o: %.c @@ -72,7 +70,7 @@ distclean: clean clean: rm -f *.a *.o $(DEPS_RM) *.gcda *.gcno *.gcov rm -f afl-harness afl-harness-cov libfuzzer-harness - rm -rf x86_emulate x86-emulate.c x86-emulate.h wrappers.c cpuid.c + rm -rf x86_emulate x86-emulate.c x86-emulate.h wrappers.c .PHONY: install install: all -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 12:00:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 12:00:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189496.1510238 (Exim 4.92) (envelope-from ) id 1vWCg1-0002AT-26; Thu, 18 Dec 2025 12:00:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189496.1510238; Thu, 18 Dec 2025 12:00:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWCg0-0002AN-Vp; Thu, 18 Dec 2025 12:00:12 +0000 Received: by outflank-mailman (input) for mailman id 1189496; Thu, 18 Dec 2025 12:00:11 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWCfz-0002A0-Tq for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 12:00:11 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWCfz-00Fxr3-1s for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 12:00:11 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWCfz-005dxL-2c for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 12:00:11 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=OEq/4RsvevHL444CPYYyHbhXw4PNmVbIPGrf6c/u/IA=; b=45GR0UQWRKSavgUkhzdP12tjOX I9T888+dHROrmR7bVfsck6WZ1hFoUhMsHhkUUAssygajShG1ZbKs67YLM8RYKa8ApEvgKeTawjZC+ X2db7XrZykJV1rKXwV3HvhSaU39ZgaeNXQOIDxKnBOhumNeMcRQXWr9HVRcoOFdH+keI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/riscv: detect and initialize G-stage mode Message-Id: Date: Thu, 18 Dec 2025 12:00:11 +0000 commit 4112edae49dec8cc54f82d25533b5fd2521c1cd5 Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:11 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 09:58:32 2025 +0100 xen/riscv: detect and initialize G-stage mode Introduce gstage_mode_detect() and guest_mm_init() to probe supported G-stage paging modes at boot. The function iterates over possible HGATP modes (Sv32x4 on RV32, Sv39x4/Sv48x4/Sv57x4 on RV64) and selects the largest supported MMU translation address mode by programming CSR_HGATP and reading it back. The selected mode is stored in max_gstage_mode (marked __ro_after_init) and reported via printk. If no supported mode is found, Xen panics since Bare mode is not expected to be used. Finally, CSR_HGATP is cleared and a local_hfence_gvma_all() is issued to avoid any potential speculative pollution of the TLB, as required by the RISC-V spec. The following issue starts to occur: .//asm/flushtlb.h:37:55: error: 'struct page_info' declared inside parameter list will not be visible outside of this definition or declaration [-Werror] 37 | static inline void page_set_tlbflush_timestamp(struct page_info *page) To resolve it, forward declaration of struct page_info is added to Acked-by: Jan Beulich --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/include/asm/flushtlb.h | 7 ++ xen/arch/riscv/include/asm/p2m.h | 9 +++ xen/arch/riscv/include/asm/riscv_encoding.h | 5 ++ xen/arch/riscv/p2m.c | 102 ++++++++++++++++++++++++++++ xen/arch/riscv/setup.c | 3 + 6 files changed, 127 insertions(+) diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index d667234949..7b8d0e20e5 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -6,6 +6,7 @@ obj-y += imsic.o obj-y += intc.o obj-y += irq.o obj-y += mm.o +obj-y += p2m.o obj-y += pt.o obj-$(CONFIG_RISCV_64) += riscv64/ obj-y += sbi.o diff --git a/xen/arch/riscv/include/asm/flushtlb.h b/xen/arch/riscv/include/asm/flushtlb.h index 51c8f753c5..e70badae0c 100644 --- a/xen/arch/riscv/include/asm/flushtlb.h +++ b/xen/arch/riscv/include/asm/flushtlb.h @@ -7,6 +7,13 @@ #include +struct page_info; + +static inline void local_hfence_gvma_all(void) +{ + asm volatile ( "hfence.gvma zero, zero" ::: "memory" ); +} + /* Flush TLB of local processor for address va. */ static inline void flush_tlb_one_local(vaddr_t va) { diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h index e43c559e0c..3776b98303 100644 --- a/xen/arch/riscv/include/asm/p2m.h +++ b/xen/arch/riscv/include/asm/p2m.h @@ -8,6 +8,12 @@ #define paddr_bits PADDR_BITS +struct gstage_mode_desc { + unsigned char mode; + unsigned int paging_levels; + char name[8]; +}; + /* * List of possible type for each page in the p2m entry. * The number of available bit per page in the pte for this purpose is 2 bits. @@ -88,6 +94,9 @@ static inline bool arch_acquire_resource_check(struct domain *d) return false; } +void guest_mm_init(void); +unsigned char get_max_supported_mode(void); + #endif /* ASM__RISCV__P2M_H */ /* diff --git a/xen/arch/riscv/include/asm/riscv_encoding.h b/xen/arch/riscv/include/asm/riscv_encoding.h index fd27f74cb7..e0a5e8b58b 100644 --- a/xen/arch/riscv/include/asm/riscv_encoding.h +++ b/xen/arch/riscv/include/asm/riscv_encoding.h @@ -131,10 +131,13 @@ #define HGATP_MODE_SV32X4 _UL(1) #define HGATP_MODE_SV39X4 _UL(8) #define HGATP_MODE_SV48X4 _UL(9) +#define HGATP_MODE_SV57X4 _UL(10) +#define HGATP32_MODE_MASK _UL(0x80000000) #define HGATP32_VMID_MASK _UL(0x1FC00000) #define HGATP32_PPN_MASK _UL(0x003FFFFF) +#define HGATP64_MODE_MASK _ULL(0xF000000000000000) #define HGATP64_VMID_MASK _ULL(0x03FFF00000000000) #define HGATP64_PPN_MASK _ULL(0x00000FFFFFFFFFFF) @@ -164,6 +167,7 @@ #define HGATP_PPN_MASK HGATP64_PPN_MASK #define HGATP_VMID_MASK HGATP64_VMID_MASK +#define HGATP_MODE_MASK HGATP64_MODE_MASK #else #define MSTATUS_SD MSTATUS32_SD #define SSTATUS_SD SSTATUS32_SD @@ -173,6 +177,7 @@ #define HGATP_PPN_MASK HGATP32_PPN_MASK #define HGATP_VMID_MASK HGATP32_VMID_MASK +#define HGATP_MODE_MASK HGATP32_MODE_MASK #endif #define TOPI_IID_SHIFT 16 diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c new file mode 100644 index 0000000000..076a1c35b2 --- /dev/null +++ b/xen/arch/riscv/p2m.c @@ -0,0 +1,102 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include + +#include +#include +#include +#include + +static struct gstage_mode_desc __ro_after_init max_gstage_mode = { + .mode = HGATP_MODE_OFF, + .paging_levels = 0, + .name = "Bare", +}; + +unsigned char get_max_supported_mode(void) +{ + return max_gstage_mode.mode; +} + +static void __init gstage_mode_detect(void) +{ + static const struct gstage_mode_desc modes[] __initconst = { + /* + * Based on the RISC-V spec: + * Bare mode is always supported, regardless of SXLEN. + * When SXLEN=32, the only other valid setting for MODE is Sv32. + * When SXLEN=64, three paged virtual-memory schemes are defined: + * Sv39, Sv48, and Sv57. + */ +#ifdef CONFIG_RISCV_32 + { HGATP_MODE_SV32X4, 2, "Sv32x4" } +#else + { HGATP_MODE_SV39X4, 3, "Sv39x4" }, + { HGATP_MODE_SV48X4, 4, "Sv48x4" }, + { HGATP_MODE_SV57X4, 5, "Sv57x4" }, +#endif + }; + + for ( unsigned int mode_idx = ARRAY_SIZE(modes); mode_idx-- > 0; ) + { + unsigned long mode = modes[mode_idx].mode; + + csr_write(CSR_HGATP, MASK_INSR(mode, HGATP_MODE_MASK)); + + if ( MASK_EXTR(csr_read(CSR_HGATP), HGATP_MODE_MASK) == mode ) + { + max_gstage_mode = modes[mode_idx]; + + break; + } + } + + if ( max_gstage_mode.mode == HGATP_MODE_OFF ) + panic("Xen expects that G-stage won't be Bare mode\n"); + + printk("Max supported G-stage mode is %s\n", max_gstage_mode.name); + + csr_write(CSR_HGATP, 0); + + /* local_hfence_gvma_all() will be called at the end of guest_mm_init. */ +} + +void __init guest_mm_init(void) +{ + gstage_mode_detect(); + + /* + * As gstage_mode_detect() is changing CSR_HGATP, it is necessary to flush + * guest TLB because: + * + * From RISC-V spec: + * Speculative executions of the address-translation algorithm behave as + * non-speculative executions of the algorithm do, except that they must + * not set the dirty bit for a PTE, they must not trigger an exception, + * and they must not create address-translation cache entries if those + * entries would have been invalidated by any SFENCE.VMA instruction + * executed by the hart since the speculative execution of the algorithm + * began. + * + * Also, despite of the fact here it is mentioned that when V=0 two-stage + * address translation is inactivated: + * The current virtualization mode, denoted V, indicates whether the hart + * is currently executing in a guest. When V=1, the hart is either in + * virtual S-mode (VS-mode), or in virtual U-mode (VU-mode) atop a guest + * OS running in VS-mode. When V=0, the hart is either in M-mode, in + * HS-mode, or in U-mode atop an OS running in HS-mode. The + * virtualization mode also indicates whether two-stage address + * translation is active (V=1) or inactive (V=0). + * But on the same side, writing to hgatp register activates it: + * The hgatp register is considered active for the purposes of + * the address-translation algorithm unless the effective privilege mode + * is U and hstatus.HU=0. + * + * Thereby it leaves some room for speculation even in this stage of boot, + * so it could be that we polluted local TLB so flush all guest TLB. + */ + local_hfence_gvma_all(); +} diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index 483cdd7e17..8f46f1a1de 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -148,6 +149,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id, console_init_postirq(); + guest_mm_init(); + printk("All set up\n"); machine_halt(); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 12:00:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 12:00:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189499.1510243 (Exim 4.92) (envelope-from ) id 1vWCgB-0002Cm-3f; Thu, 18 Dec 2025 12:00:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189499.1510243; Thu, 18 Dec 2025 12:00:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWCgB-0002Cf-0y; Thu, 18 Dec 2025 12:00:23 +0000 Received: by outflank-mailman (input) for mailman id 1189499; Thu, 18 Dec 2025 12:00:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWCgA-0002CV-35 for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 12:00:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWCg9-00FxrD-2T for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 12:00:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWCg9-005fGG-3B for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 12:00:21 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=1ib4M1hqNaFhTfqW7HdwlWq6jFxFIfkY5kNWwAFWAWE=; b=z/OXOeznAhOuk1+XBfSPsWPPy/ V05dECy2Ue5evaU90cINyyXSDW6DtyeNYGP3RzjzMy6kiCJ93KXrapTzkbfZovMUFGAyg3iOXvaMd u0KdEmohM7Sn+WDmJvUr/lhWN9VkEtptqJTGgQMhChr5OjoR+ujHmKXtTtgBztMAfinQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/riscv: introduce VMID allocation and manegement Message-Id: Date: Thu, 18 Dec 2025 12:00:21 +0000 commit bff3b9ea4696b58ec193ef279079658216c8c0e0 Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:12 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 09:58:56 2025 +0100 xen/riscv: introduce VMID allocation and manegement Current implementation is based on x86's way to allocate VMIDs: VMIDs partition the physical TLB. In the current implementation VMIDs are introduced to reduce the number of TLB flushes. Each time a guest-physical address space changes, instead of flushing the TLB, a new VMID is assigned. This reduces the number of TLB flushes to at most 1/#VMIDs. The biggest advantage is that hot parts of the hypervisor's code and data retain in the TLB. VMIDs are a hart-local resource. As preemption of VMIDs is not possible, VMIDs are assigned in a round-robin scheme. To minimize the overhead of VMID invalidation, at the time of a TLB flush, VMIDs are tagged with a 64-bit generation. Only on a generation overflow the code needs to invalidate all VMID information stored at the VCPUs with are run on the specific physical processor. When this overflow appears VMID usage is disabled to retain correctness. Only minor changes are made compared to the x86 implementation. These include using RISC-V-specific terminology, adding a check to ensure the type used for storing the VMID has enough bits to hold VMIDLEN, and introducing a new function vmidlen_detect() to clarify the VMIDLEN value, rename stuff connected to VMID enable/disable to "VMID use enable/disable". Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- docs/misc/xen-command-line.pandoc | 9 ++ xen/arch/riscv/Makefile | 1 + xen/arch/riscv/include/asm/domain.h | 6 ++ xen/arch/riscv/include/asm/vmid.h | 14 +++ xen/arch/riscv/p2m.c | 7 +- xen/arch/riscv/vmid.c | 178 ++++++++++++++++++++++++++++++++++++ 6 files changed, 213 insertions(+), 2 deletions(-) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index e92b6d55b5..805da22c44 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -2863,6 +2863,15 @@ to disable the feature. Value is in units of crystal clock cycles. Note the hardware might add a threshold to the provided value in order to make it safe, and hence using 0 is fine. +### vmid (RISC-V) +> `= ` + +> Default: `true` + +Permit Xen to use Virtual Machine Identifiers. This is an optimisation which +tags the TLB entries with an ID per vcpu. This allows for guest TLB flushes +to be performed without the overhead of a complete TLB flush. + ### vpid (Intel) > `= ` diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 7b8d0e20e5..c93c837aac 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -17,6 +17,7 @@ obj-y += smpboot.o obj-y += stubs.o obj-y += time.o obj-y += traps.o +obj-y += vmid.o obj-y += vm_event.o $(TARGET): $(TARGET)-syms diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index c3d965a559..aac1040658 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -5,6 +5,11 @@ #include #include +struct vcpu_vmid { + uint64_t generation; + uint16_t vmid; +}; + struct hvm_domain { uint64_t params[HVM_NR_PARAMS]; @@ -14,6 +19,7 @@ struct arch_vcpu_io { }; struct arch_vcpu { + struct vcpu_vmid vmid; }; struct arch_domain { diff --git a/xen/arch/riscv/include/asm/vmid.h b/xen/arch/riscv/include/asm/vmid.h new file mode 100644 index 0000000000..1c500c4aff --- /dev/null +++ b/xen/arch/riscv/include/asm/vmid.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef ASM_RISCV_VMID_H +#define ASM_RISCV_VMID_H + +struct vcpu; +struct vcpu_vmid; + +void vmid_init(void); +bool vmid_handle_vmenter(struct vcpu_vmid *vmid); +void vmid_flush_vcpu(struct vcpu *v); +void vmid_flush_hart(void); + +#endif /* ASM_RISCV_VMID_H */ diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index 076a1c35b2..4e84acaafd 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -9,6 +9,7 @@ #include #include #include +#include static struct gstage_mode_desc __ro_after_init max_gstage_mode = { .mode = HGATP_MODE_OFF, @@ -68,9 +69,11 @@ void __init guest_mm_init(void) { gstage_mode_detect(); + vmid_init(); + /* - * As gstage_mode_detect() is changing CSR_HGATP, it is necessary to flush - * guest TLB because: + * As gstage_mode_detect() and vmid_init() are changing CSR_HGATP, it is + * necessary to flush guest TLB because: * * From RISC-V spec: * Speculative executions of the address-translation algorithm behave as diff --git a/xen/arch/riscv/vmid.c b/xen/arch/riscv/vmid.c new file mode 100644 index 0000000000..8fbcd500f2 --- /dev/null +++ b/xen/arch/riscv/vmid.c @@ -0,0 +1,178 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +/* Xen command-line option to enable VMIDs */ +static bool __ro_after_init opt_vmid = true; +boolean_param("vmid", opt_vmid); + +/* + * VMIDs partition the physical TLB. In the current implementation VMIDs are + * introduced to reduce the number of TLB flushes. Each time a guest-physical + * address space changes, instead of flushing the TLB, a new VMID is + * assigned. This reduces the number of TLB flushes to at most 1/#VMIDs. + * The biggest advantage is that hot parts of the hypervisor's code and data + * retain in the TLB. + * + * Sketch of the Implementation: + * + * VMIDs are a hart-local resource. As preemption of VMIDs is not possible, + * VMIDs are assigned in a round-robin scheme. To minimize the overhead of + * VMID invalidation, at the time of a TLB flush, VMIDs are tagged with a + * 64-bit generation. Only on a generation overflow the code needs to + * invalidate all VMID information stored at the VCPUs with are run on the + * specific physical processor. When this overflow appears VMID usage is + * disabled to retain correctness. + */ + +/* Per-Hart VMID management. */ +struct vmid_data { + uint64_t generation; + uint16_t next_vmid; + uint16_t max_vmid; + bool used; +}; + +static DEFINE_PER_CPU(struct vmid_data, vmid_data); + +/* + * vmidlen_detect() is expected to be called during secondary hart bring-up, + * so it should not be marked as __init. + */ +static unsigned int vmidlen_detect(void) +{ + unsigned int vmid_bits; + unsigned char gstage_mode = get_max_supported_mode(); + + /* + * According to the RISC-V Privileged Architecture Spec: + * When MODE=Bare, guest physical addresses are equal to supervisor + * physical addresses, and there is no further memory protection + * for a guest virtual machine beyond the physical memory protection + * scheme described in Section "Physical Memory Protection". + * In this case, the remaining fields in hgatp must be set to zeros. + * Thereby it is necessary to set gstage_mode not equal to Bare. + */ + ASSERT(gstage_mode != HGATP_MODE_OFF); + csr_write(CSR_HGATP, + MASK_INSR(gstage_mode, HGATP_MODE_MASK) | HGATP_VMID_MASK); + vmid_bits = MASK_EXTR(csr_read(CSR_HGATP), HGATP_VMID_MASK); + vmid_bits = flsl(vmid_bits); + csr_write(CSR_HGATP, _AC(0, UL)); + + /* local_hfence_gvma_all() will be called at the end of pre_gstage_init. */ + + return vmid_bits; +} + +/* + * vmid_init() is expected to be called during secondary hart bring-up, + * so it should not be marked as __init. + */ +void vmid_init(void) +{ + static int8_t __ro_after_init g_vmid_used = -1; + + unsigned int vmid_len = vmidlen_detect(); + struct vmid_data *data = &this_cpu(vmid_data); + + BUILD_BUG_ON(MASK_EXTR(HGATP_VMID_MASK, HGATP_VMID_MASK) > + (BIT((sizeof(data->max_vmid) * BITS_PER_BYTE), UL) - 1)); + + data->max_vmid = BIT(vmid_len, U) - 1; + data->used = opt_vmid && (vmid_len > 1); + + if ( g_vmid_used < 0 ) + { + g_vmid_used = data->used; + printk("VMIDs use is %sabled\n", data->used ? "en" : "dis"); + } + else if ( g_vmid_used != data->used ) + printk("CPU%u: VMIDs use is %sabled\n", smp_processor_id(), + data->used ? "en" : "dis"); + + /* Zero indicates 'invalid generation', so we start the count at one. */ + data->generation = 1; + + /* Zero indicates 'VMIDs use disabled', so we start the count at one. */ + data->next_vmid = 1; +} + +void vmid_flush_vcpu(struct vcpu *v) +{ + write_atomic(&v->arch.vmid.generation, 0); +} + +void vmid_flush_hart(void) +{ + struct vmid_data *data = &this_cpu(vmid_data); + + if ( !data->used ) + return; + + if ( likely(++data->generation != 0) ) + return; + + /* + * VMID generations are 64 bit. Overflow of generations never happens. + * For safety, we simply disable ASIDs, so correctness is established; it + * only runs a bit slower. + */ + printk("VMID generation overrun. Disabling VMIDs\n"); + data->used = false; +} + +bool vmid_handle_vmenter(struct vcpu_vmid *vmid) +{ + struct vmid_data *data = &this_cpu(vmid_data); + + if ( !data->used ) + goto disabled; + + /* Test if VCPU has valid VMID. */ + if ( read_atomic(&vmid->generation) == data->generation ) + return 0; + + /* If there are no free VMIDs, need to go to a new generation. */ + if ( unlikely(data->next_vmid > data->max_vmid) ) + { + vmid_flush_hart(); + data->next_vmid = 1; + if ( !data->used ) + goto disabled; + } + + /* Now guaranteed to be a free VMID. */ + vmid->vmid = data->next_vmid++; + write_atomic(&vmid->generation, data->generation); + + /* + * When we assign VMID 1, flush all TLB entries as we are starting a new + * generation, and all old VMID allocations are now stale. + */ + return vmid->vmid == 1; + + disabled: + vmid->vmid = 0; + return 0; +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 12:00:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 12:00:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189500.1510246 (Exim 4.92) (envelope-from ) id 1vWCgL-0002FH-53; Thu, 18 Dec 2025 12:00:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189500.1510246; Thu, 18 Dec 2025 12:00:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWCgL-0002FB-2X; Thu, 18 Dec 2025 12:00:33 +0000 Received: by outflank-mailman (input) for mailman id 1189500; Thu, 18 Dec 2025 12:00:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWCgK-0002F0-68 for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 12:00:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWCgJ-00FxtK-2m for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 12:00:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWCgK-005ggT-0N for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 12:00:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=m5m2OYefY3WnQb3H3y5BD/hnj8wpw/Lcv4Gw4GrLNOQ=; b=tSbCBCk8bbyXwLqhJsN0U9D4mD r5n4tXElrEkPUBtnqOJmw49q2g4lk72UTPWSEygbacxFIFLh1DFswxHlBSiyDuC/t/ryI+mNhiVp7 X7yNyFE+AHdz6x+Bt+fwaaI0bFjU2IfGq0x9DJmtcEDVXkUCa+Q5PhsppEQD5pPonWoo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/riscv: introduce things necessary for p2m initialization Message-Id: Date: Thu, 18 Dec 2025 12:00:32 +0000 commit 45434df6082e8323ca666ee4d53326b1a4eeeb09 Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:13 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 09:59:16 2025 +0100 xen/riscv: introduce things necessary for p2m initialization Introduce the following things: - Update p2m_domain structure, which describe per p2m-table state, with: - lock to protect updates to p2m. - pool with pages used to construct p2m. - back pointer to domain structure. - p2m_init() to initalize members introduced in p2m_domain structure. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/include/asm/domain.h | 5 +++++ xen/arch/riscv/include/asm/p2m.h | 33 +++++++++++++++++++++++++++++++++ xen/arch/riscv/p2m.c | 20 ++++++++++++++++++++ 3 files changed, 58 insertions(+) diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index aac1040658..e688980efa 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -5,6 +5,8 @@ #include #include +#include + struct vcpu_vmid { uint64_t generation; uint16_t vmid; @@ -24,6 +26,9 @@ struct arch_vcpu { struct arch_domain { struct hvm_domain hvm; + + /* Virtual MMU */ + struct p2m_domain p2m; }; #include diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h index 3776b98303..239f90622e 100644 --- a/xen/arch/riscv/include/asm/p2m.h +++ b/xen/arch/riscv/include/asm/p2m.h @@ -3,17 +3,48 @@ #define ASM__RISCV__P2M_H #include +#include +#include +#include #include #define paddr_bits PADDR_BITS +/* Get host p2m table */ +#define p2m_get_hostp2m(d) (&(d)->arch.p2m) + struct gstage_mode_desc { unsigned char mode; unsigned int paging_levels; char name[8]; }; +/* Per-p2m-table state */ +struct p2m_domain { + /* + * Lock that protects updates to the p2m. + */ + rwlock_t lock; + + /* Pages used to construct the p2m */ + struct page_list_head pages; + + /* Back pointer to domain */ + struct domain *domain; + + /* + * P2M updates may required TLBs to be flushed (invalidated). + * + * Flushes may be deferred by setting 'need_flush' and then flushing + * when the p2m write lock is released. + * + * If an immediate flush is required (e.g, if a super page is + * shattered), call p2m_tlb_flush_sync(). + */ + bool need_flush; +}; + /* * List of possible type for each page in the p2m entry. * The number of available bit per page in the pte for this purpose is 2 bits. @@ -97,6 +128,8 @@ static inline bool arch_acquire_resource_check(struct domain *d) void guest_mm_init(void); unsigned char get_max_supported_mode(void); +int p2m_init(struct domain *d); + #endif /* ASM__RISCV__P2M_H */ /* diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index 4e84acaafd..a6e2456f54 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -3,6 +3,10 @@ #include #include #include +#include +#include +#include +#include #include #include @@ -103,3 +107,19 @@ void __init guest_mm_init(void) */ local_hfence_gvma_all(); } + +int p2m_init(struct domain *d) +{ + struct p2m_domain *p2m = p2m_get_hostp2m(d); + + /* + * "Trivial" initialisation is now complete. Set the backpointer so the + * users of p2m could get an access to domain structure. + */ + p2m->domain = d; + + rwlock_init(&p2m->lock); + INIT_PAGE_LIST_HEAD(&p2m->pages); + + return 0; +} -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 12:00:43 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 12:00:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189503.1510251 (Exim 4.92) (envelope-from ) id 1vWCgV-0002I2-85; Thu, 18 Dec 2025 12:00:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189503.1510251; Thu, 18 Dec 2025 12:00:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWCgV-0002Hu-5V; Thu, 18 Dec 2025 12:00:43 +0000 Received: by outflank-mailman (input) for mailman id 1189503; Thu, 18 Dec 2025 12:00:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWCgU-0002Hn-9H for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 12:00:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWCgT-00FxtQ-35 for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 12:00:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWCgU-005hw3-0f for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 12:00:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=e7JZA0ylKOcihLneWFalQp23/CeItwoualpz7GVKMqI=; b=BGgeb9Rldk19bOWD9a6DjxucJ+ SQD176kDcWZ/5r+XTD/mlHdaF9qjagLsZvbfWaAfezQ/4knCqSnKgIdo9ujOvd/iKyqUDtyZBa3iG LTonLDg2rAkOcIn18VvN957Yn7YgmhJ8JTmhhPq1Rl20xXWphwkREMvHVzwBs0pJkpZE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/riscv: construct the P2M pages pool for guests Message-Id: Date: Thu, 18 Dec 2025 12:00:42 +0000 commit 3810f155218616237511b9c62172a87709f4fa13 Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:14 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 09:59:29 2025 +0100 xen/riscv: construct the P2M pages pool for guests Implement p2m_set_allocation() to construct p2m pages pool for guests based on required number of pages. This is implemented by: - Adding a `struct paging_domain` which contains a freelist, a counter variable and a spinlock to `struct arch_domain` to indicate the free p2m pages and the number of p2m total pages in the p2m pages pool. - Adding a helper `p2m_set_allocation` to set the p2m pages pool size. This helper should be called before allocating memory for a guest and is called from domain_p2m_set_allocation(), the latter is a part of common dom0less code. - Adding implementation of paging_freelist_adjust() and paging_domain_init(). Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/include/asm/Makefile | 1 - xen/arch/riscv/include/asm/domain.h | 12 +++++++ xen/arch/riscv/include/asm/paging.h | 13 ++++++++ xen/arch/riscv/p2m.c | 18 ++++++++++ xen/arch/riscv/paging.c | 65 +++++++++++++++++++++++++++++++++++++ 6 files changed, 109 insertions(+), 1 deletion(-) diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index c93c837aac..9dde693db4 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -7,6 +7,7 @@ obj-y += intc.o obj-y += irq.o obj-y += mm.o obj-y += p2m.o +obj-y += paging.o obj-y += pt.o obj-$(CONFIG_RISCV_64) += riscv64/ obj-y += sbi.o diff --git a/xen/arch/riscv/include/asm/Makefile b/xen/arch/riscv/include/asm/Makefile index bfdf186c68..3824f31c39 100644 --- a/xen/arch/riscv/include/asm/Makefile +++ b/xen/arch/riscv/include/asm/Makefile @@ -6,7 +6,6 @@ generic-y += hardirq.h generic-y += hypercall.h generic-y += iocap.h generic-y += irq-dt.h -generic-y += paging.h generic-y += percpu.h generic-y += perfc_defn.h generic-y += random.h diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index e688980efa..316e7c6c84 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -2,6 +2,8 @@ #ifndef ASM__RISCV__DOMAIN_H #define ASM__RISCV__DOMAIN_H +#include +#include #include #include @@ -24,11 +26,21 @@ struct arch_vcpu { struct vcpu_vmid vmid; }; +struct paging_domain { + spinlock_t lock; + /* Free pages from the pre-allocated pool */ + struct page_list_head freelist; + /* Number of pages from the pre-allocated pool */ + unsigned long total_pages; +}; + struct arch_domain { struct hvm_domain hvm; /* Virtual MMU */ struct p2m_domain p2m; + + struct paging_domain paging; }; #include diff --git a/xen/arch/riscv/include/asm/paging.h b/xen/arch/riscv/include/asm/paging.h new file mode 100644 index 0000000000..98d8b06d45 --- /dev/null +++ b/xen/arch/riscv/include/asm/paging.h @@ -0,0 +1,13 @@ +#ifndef ASM_RISCV_PAGING_H +#define ASM_RISCV_PAGING_H + +#include + +struct domain; + +int paging_domain_init(struct domain *d); + +int paging_freelist_adjust(struct domain *d, unsigned long pages, + bool *preempted); + +#endif /* ASM_RISCV_PAGING_H */ diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index a6e2456f54..39c84f1a3b 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include @@ -118,8 +119,25 @@ int p2m_init(struct domain *d) */ p2m->domain = d; + paging_domain_init(d); + rwlock_init(&p2m->lock); INIT_PAGE_LIST_HEAD(&p2m->pages); return 0; } + +/* + * Set the pool of pages to the required number of pages. + * Returns 0 for success, non-zero for failure. + * Call with d->arch.paging.lock held. + */ +int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted) +{ + int rc; + + if ( (rc = paging_freelist_adjust(d, pages, preempted)) ) + return rc; + + return 0; +} diff --git a/xen/arch/riscv/paging.c b/xen/arch/riscv/paging.c new file mode 100644 index 0000000000..2df8de033b --- /dev/null +++ b/xen/arch/riscv/paging.c @@ -0,0 +1,65 @@ +#include +#include +#include +#include +#include + +int paging_freelist_adjust(struct domain *d, unsigned long pages, + bool *preempted) +{ + struct page_info *pg; + + ASSERT(spin_is_locked(&d->arch.paging.lock)); + + for ( ; ; ) + { + if ( d->arch.paging.total_pages < pages ) + { + /* Need to allocate more memory from domheap */ + pg = alloc_domheap_page(d, MEMF_no_owner); + if ( pg == NULL ) + { + printk(XENLOG_ERR "Failed to allocate pages.\n"); + return -ENOMEM; + } + ACCESS_ONCE(d->arch.paging.total_pages)++; + page_list_add_tail(pg, &d->arch.paging.freelist); + } + else if ( d->arch.paging.total_pages > pages ) + { + /* Need to return memory to domheap */ + pg = page_list_remove_head(&d->arch.paging.freelist); + if ( pg ) + { + ACCESS_ONCE(d->arch.paging.total_pages)--; + free_domheap_page(pg); + } + else + { + printk(XENLOG_ERR + "Failed to free pages, freelist is empty.\n"); + return -ENOMEM; + } + } + else + break; + + /* Check to see if we need to yield and try again */ + if ( preempted && general_preempt_check() ) + { + *preempted = true; + return -ERESTART; + } + } + + return 0; +} + +/* Domain paging struct initialization. */ +int paging_domain_init(struct domain *d) +{ + spin_lock_init(&d->arch.paging.lock); + INIT_PAGE_LIST_HEAD(&d->arch.paging.freelist); + + return 0; +} -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 12:00:53 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 12:00:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189506.1510255 (Exim 4.92) (envelope-from ) id 1vWCgf-0002KU-9Y; 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Thu, 18 Dec 2025 12:00:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=vi/haXlASKk8h+G7qRWbIy7nnJdKIPlOI7BAaIhBLDE=; b=6d/o5s4+pEZFroWMICpmtVTil8 Ka5KGMDJqQ4OE0aUOQZRBLBvZEejmSxelQO5+tIKaVJR1QDoWtzUT33brlNcc4Xn4oljLNOkG3w3B 6Cpy5l5RDzHC8wbRZfmx1oryy0Mp08R6e/jq3CCDhvSz9oSJ1p4/sw+3ZJa8/DoOeHTA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/riscv: add root page table allocation Message-Id: Date: Thu, 18 Dec 2025 12:00:52 +0000 commit 824ec513843bcaf1ba1b4e8d43cbf77f5eda7eef Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:15 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 09:59:40 2025 +0100 xen/riscv: add root page table allocation Introduce support for allocating and initializing the root page table required for RISC-V stage-2 address translation. To implement root page table allocation the following is introduced: - p2m_get_clean_page() and p2m_alloc_root_table(), p2m_allocate_root() helpers to allocate and zero a 16 KiB root page table, as mandated by the RISC-V privileged specification for Sv32x4/Sv39x4/Sv48x4/Sv57x4 modes. - Update p2m_init() to inititialize p2m_root_order. - Add maddr_to_page() and page_to_maddr() macros for easier address manipulation. - Introduce paging_ret_to_domheap() to return some pages before allocate 16 KiB pages for root page table. - Allocate root p2m table after p2m pool is initialized. - Add construct_hgatp() to construct the hgatp register value based on p2m->root, p2m->hgatp_mode and VMID. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/include/asm/mm.h | 4 + xen/arch/riscv/include/asm/p2m.h | 17 +++++ xen/arch/riscv/include/asm/paging.h | 3 + xen/arch/riscv/include/asm/riscv_encoding.h | 2 + xen/arch/riscv/p2m.c | 99 ++++++++++++++++++++++++- xen/arch/riscv/paging.c | 110 +++++++++++++++++++++------- 6 files changed, 206 insertions(+), 29 deletions(-) diff --git a/xen/arch/riscv/include/asm/mm.h b/xen/arch/riscv/include/asm/mm.h index e5ea91fa4d..2f7927e6f4 100644 --- a/xen/arch/riscv/include/asm/mm.h +++ b/xen/arch/riscv/include/asm/mm.h @@ -167,6 +167,10 @@ extern struct page_info *frametable_virt_start; #define mfn_to_page(mfn) (frametable_virt_start + mfn_x(mfn)) #define page_to_mfn(pg) _mfn((pg) - frametable_virt_start) +/* Convert between machine addresses and page-info structures. */ +#define maddr_to_page(ma) mfn_to_page(maddr_to_mfn(ma)) +#define page_to_maddr(pg) mfn_to_maddr(page_to_mfn(pg)) + static inline void *page_to_virt(const struct page_info *pg) { return mfn_to_virt(mfn_x(page_to_mfn(pg))); diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h index 239f90622e..c9aa19ad43 100644 --- a/xen/arch/riscv/include/asm/p2m.h +++ b/xen/arch/riscv/include/asm/p2m.h @@ -2,6 +2,7 @@ #ifndef ASM__RISCV__P2M_H #define ASM__RISCV__P2M_H +#include #include #include #include @@ -9,6 +10,9 @@ #include +#define P2M_ROOT_ORDER (ilog2(GSTAGE_ROOT_PAGE_TABLE_SIZE) - PAGE_SHIFT) +#define P2M_ROOT_PAGES BIT(P2M_ROOT_ORDER, U) + #define paddr_bits PADDR_BITS /* Get host p2m table */ @@ -30,6 +34,11 @@ struct p2m_domain { /* Pages used to construct the p2m */ struct page_list_head pages; + /* The root of the p2m tree. May be concatenated */ + struct page_info *root; + + struct gstage_mode_desc mode; + /* Back pointer to domain */ struct domain *domain; @@ -43,6 +52,12 @@ struct p2m_domain { * shattered), call p2m_tlb_flush_sync(). */ bool need_flush; + + /* + * Indicate if it is required to clean the cache when writing an entry or + * when a page is needed to be fully cleared and cleaned. + */ + bool clean_dcache; }; /* @@ -130,6 +145,8 @@ unsigned char get_max_supported_mode(void); int p2m_init(struct domain *d); +unsigned long construct_hgatp(const struct p2m_domain *p2m, uint16_t vmid); + #endif /* ASM__RISCV__P2M_H */ /* diff --git a/xen/arch/riscv/include/asm/paging.h b/xen/arch/riscv/include/asm/paging.h index 98d8b06d45..01be45528f 100644 --- a/xen/arch/riscv/include/asm/paging.h +++ b/xen/arch/riscv/include/asm/paging.h @@ -10,4 +10,7 @@ int paging_domain_init(struct domain *d); int paging_freelist_adjust(struct domain *d, unsigned long pages, bool *preempted); +int paging_ret_to_domheap(struct domain *d, unsigned int nr_pages); +int paging_refill_from_domheap(struct domain *d, unsigned int nr_pages); + #endif /* ASM_RISCV_PAGING_H */ diff --git a/xen/arch/riscv/include/asm/riscv_encoding.h b/xen/arch/riscv/include/asm/riscv_encoding.h index e0a5e8b58b..1f7e612366 100644 --- a/xen/arch/riscv/include/asm/riscv_encoding.h +++ b/xen/arch/riscv/include/asm/riscv_encoding.h @@ -180,6 +180,8 @@ #define HGATP_MODE_MASK HGATP32_MODE_MASK #endif +#define GSTAGE_ROOT_PAGE_TABLE_SIZE KB(16) + #define TOPI_IID_SHIFT 16 #define TOPI_IID_MASK 0xfff #define TOPI_IPRIO_MASK 0xff diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index 39c84f1a3b..d14757331f 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -3,6 +3,7 @@ #include #include #include +#include #include #include #include @@ -109,6 +110,74 @@ void __init guest_mm_init(void) local_hfence_gvma_all(); } +static void clear_and_clean_page(struct page_info *page, bool clean_dcache) +{ + void *p = __map_domain_page(page); + + clear_page(p); + + /* + * If the IOMMU doesn't support coherent walks and the p2m tables are + * shared between the CPU and IOMMU, it is necessary to clean the + * d-cache. + */ + if ( clean_dcache ) + clean_dcache_va_range(p, PAGE_SIZE); + + unmap_domain_page(p); +} + +unsigned long construct_hgatp(const struct p2m_domain *p2m, uint16_t vmid) +{ + return MASK_INSR(mfn_x(page_to_mfn(p2m->root)), HGATP_PPN_MASK) | + MASK_INSR(p2m->mode.mode, HGATP_MODE_MASK) | + MASK_INSR(vmid, HGATP_VMID_MASK); +} + +static int p2m_alloc_root_table(struct p2m_domain *p2m) +{ + struct domain *d = p2m->domain; + struct page_info *page; + int rc; + + /* + * Return back P2M_ROOT_PAGES to assure the root table memory is also + * accounted against the P2M pool of the domain. + */ + if ( (rc = paging_ret_to_domheap(d, P2M_ROOT_PAGES)) ) + return rc; + + /* + * As mentioned in the Priviliged Architecture Spec (version 20240411) + * in Section 18.5.1, for the paged virtual-memory schemes (Sv32x4, + * Sv39x4, Sv48x4, and Sv57x4), the root page table is 16 KiB and must + * be aligned to a 16-KiB boundary. + */ + page = alloc_domheap_pages(d, P2M_ROOT_ORDER, MEMF_no_owner); + if ( !page ) + { + /* + * If allocation of root table pages fails, the pages acquired above + * must be returned to the freelist to maintain proper freelist + * balance. + */ + paging_refill_from_domheap(d, P2M_ROOT_PAGES); + + return -ENOMEM; + } + + for ( unsigned int i = 0; i < P2M_ROOT_PAGES; i++ ) + { + clear_and_clean_page(page + i, p2m->clean_dcache); + + page_list_add(page + i, &p2m->pages); + } + + p2m->root = page; + + return 0; +} + int p2m_init(struct domain *d) { struct p2m_domain *p2m = p2m_get_hostp2m(d); @@ -124,6 +193,24 @@ int p2m_init(struct domain *d) rwlock_init(&p2m->lock); INIT_PAGE_LIST_HEAD(&p2m->pages); + /* + * Currently, the infrastructure required to enable CONFIG_HAS_PASSTHROUGH + * is not ready for RISC-V support. + * + * When CONFIG_HAS_PASSTHROUGH=y, p2m->clean_dcache must be properly + * initialized. + * At the moment, it defaults to false because the p2m structure is + * zero-initialized. + */ +#ifdef CONFIG_HAS_PASSTHROUGH +# error "Add init of p2m->clean_dcache" +#endif + + /* TODO: don't hardcode used for a domain g-stage mode. */ + p2m->mode.mode = HGATP_MODE_SV39X4; + p2m->mode.paging_levels = 2; + safe_strcpy(p2m->mode.name, "Sv39x4"); + return 0; } @@ -134,10 +221,20 @@ int p2m_init(struct domain *d) */ int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted) { + struct p2m_domain *p2m = p2m_get_hostp2m(d); int rc; if ( (rc = paging_freelist_adjust(d, pages, preempted)) ) return rc; - return 0; + /* + * First, initialize p2m pool. Then allocate the root + * table so that the necessary pages can be returned from the p2m pool, + * since the root table must be allocated using alloc_domheap_pages(...) + * to meet its specific requirements. + */ + if ( !p2m->root ) + rc = p2m_alloc_root_table(p2m); + + return rc; } diff --git a/xen/arch/riscv/paging.c b/xen/arch/riscv/paging.c index 2df8de033b..d401ddc34e 100644 --- a/xen/arch/riscv/paging.c +++ b/xen/arch/riscv/paging.c @@ -4,46 +4,67 @@ #include #include +static int _paging_ret_to_domheap(struct domain *d) +{ + struct page_info *page; + + ASSERT(spin_is_locked(&d->arch.paging.lock)); + + /* Return memory to domheap. */ + page = page_list_remove_head(&d->arch.paging.freelist); + if( page ) + { + d->arch.paging.total_pages--; + free_domheap_page(page); + } + else + { + printk(XENLOG_ERR + "failed to free pages, P2M freelist is empty\n"); + return -ENOMEM; + } + + return 0; +} + +static int _paging_add_to_freelist(struct domain *d) +{ + struct page_info *page; + + ASSERT(spin_is_locked(&d->arch.paging.lock)); + + /* Need to allocate more memory from domheap */ + page = alloc_domheap_page(d, MEMF_no_owner); + if ( page == NULL ) + { + printk(XENLOG_ERR "failed to allocate pages\n"); + return -ENOMEM; + } + d->arch.paging.total_pages++; + page_list_add_tail(page, &d->arch.paging.freelist); + + return 0; +} + int paging_freelist_adjust(struct domain *d, unsigned long pages, bool *preempted) { - struct page_info *pg; - ASSERT(spin_is_locked(&d->arch.paging.lock)); for ( ; ; ) { + int rc = 0; + if ( d->arch.paging.total_pages < pages ) - { - /* Need to allocate more memory from domheap */ - pg = alloc_domheap_page(d, MEMF_no_owner); - if ( pg == NULL ) - { - printk(XENLOG_ERR "Failed to allocate pages.\n"); - return -ENOMEM; - } - ACCESS_ONCE(d->arch.paging.total_pages)++; - page_list_add_tail(pg, &d->arch.paging.freelist); - } + rc = _paging_add_to_freelist(d); else if ( d->arch.paging.total_pages > pages ) - { - /* Need to return memory to domheap */ - pg = page_list_remove_head(&d->arch.paging.freelist); - if ( pg ) - { - ACCESS_ONCE(d->arch.paging.total_pages)--; - free_domheap_page(pg); - } - else - { - printk(XENLOG_ERR - "Failed to free pages, freelist is empty.\n"); - return -ENOMEM; - } - } + rc = _paging_ret_to_domheap(d); else break; + if ( rc ) + return rc; + /* Check to see if we need to yield and try again */ if ( preempted && general_preempt_check() ) { @@ -55,6 +76,39 @@ int paging_freelist_adjust(struct domain *d, unsigned long pages, return 0; } +int paging_refill_from_domheap(struct domain *d, unsigned int nr_pages) +{ + ASSERT(spin_is_locked(&d->arch.paging.lock)); + + for ( unsigned int i = 0; i < nr_pages; i++ ) + { + int rc = _paging_add_to_freelist(d); + + if ( rc ) + return rc; + } + + return 0; +} + +int paging_ret_to_domheap(struct domain *d, unsigned int nr_pages) +{ + ASSERT(spin_is_locked(&d->arch.paging.lock)); + + if ( d->arch.paging.total_pages < nr_pages ) + return false; + + for ( unsigned int i = 0; i < nr_pages; i++ ) + { + int rc = _paging_ret_to_domheap(d); + + if ( rc ) + return rc; + } + + return 0; +} + /* Domain paging struct initialization. */ int paging_domain_init(struct domain *d) { -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 12:01:03 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 12:01:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189507.1510259 (Exim 4.92) (envelope-from ) id 1vWCgp-0002MY-Aw; Thu, 18 Dec 2025 12:01:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189507.1510259; Thu, 18 Dec 2025 12:01:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWCgp-0002MQ-8H; Thu, 18 Dec 2025 12:01:03 +0000 Received: by outflank-mailman (input) for mailman id 1189507; Thu, 18 Dec 2025 12:01:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWCgo-0002MK-HH for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/riscv: introduce pte_{set,get}_mfn() Message-Id: Date: Thu, 18 Dec 2025 12:01:02 +0000 commit 3d197aad8aa98cbd22fca3054363aae7227f496d Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:16 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 09:59:53 2025 +0100 xen/riscv: introduce pte_{set,get}_mfn() Introduce helpers pte_{set,get}_mfn() to simplify setting and getting of mfn. Also, introduce PTE_PPN_MASK and add BUILD_BUG_ON() to be sure that PTE_PPN_MASK remains the same for all MMU modes except Sv32. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/include/asm/page.h | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/xen/arch/riscv/include/asm/page.h b/xen/arch/riscv/include/asm/page.h index 7fde99f916..1fc5998a0b 100644 --- a/xen/arch/riscv/include/asm/page.h +++ b/xen/arch/riscv/include/asm/page.h @@ -112,6 +112,30 @@ typedef struct { #endif } pte_t; +#if RV_STAGE1_MODE != SATP_MODE_SV32 +#define PTE_PPN_MASK _UL(0x3FFFFFFFFFFC00) +#else +#define PTE_PPN_MASK _U(0xFFFFFC00) +#endif + +static inline void pte_set_mfn(pte_t *p, mfn_t mfn) +{ + /* + * At the moment spec provides Sv32 - Sv57. + * If one day new MMU mode will be added it will be needed + * to check that PPN mask still continue to cover bits 53:10. + */ + BUILD_BUG_ON(RV_STAGE1_MODE > SATP_MODE_SV57); + + p->pte &= ~PTE_PPN_MASK; + p->pte |= MASK_INSR(mfn_x(mfn), PTE_PPN_MASK); +} + +static inline mfn_t pte_get_mfn(pte_t p) +{ + return _mfn(MASK_EXTR(p.pte, PTE_PPN_MASK)); +} + static inline bool pte_is_valid(pte_t p) { return p.pte & PTE_VALID; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 12:01:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 12:01:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189508.1510263 (Exim 4.92) (envelope-from ) id 1vWCgz-0002Ok-CX; Thu, 18 Dec 2025 12:01:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189508.1510263; Thu, 18 Dec 2025 12:01:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWCgz-0002Oc-9f; Thu, 18 Dec 2025 12:01:13 +0000 Received: by outflank-mailman (input) for mailman id 1189508; Thu, 18 Dec 2025 12:01:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWCgy-0002OU-MF for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 12:01:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWCgy-00FxuK-1D for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 12:01:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWCgy-005lg6-1y for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 12:01:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=44ed9Kuf+aF+88M39jTM0qtSAIM1RNp6iDZA6ZLI5VM=; b=r8j2Z5sK4FWOrglwTMURg9G30T 2+C/rAI5NuMCV5t0otGsLFgKKIHE4shT9vN0rMzEL4y7ovKb7U6rt6bYBo4iV/YCKrp7CdoUb5RQb vGWqTiM5PKzWYH+OH5fSyh+oWdA31ebH9A3TXlkb+dJrY1FU0SLxqVJ7OANIp/SShYNg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/riscv: add new p2m types and helper macros for type classification Message-Id: Date: Thu, 18 Dec 2025 12:01:12 +0000 commit c9f88ba993da72233384689d6cf5da82ed4fb3d3 Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:17 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 10:00:07 2025 +0100 xen/riscv: add new p2m types and helper macros for type classification - Extended p2m_type_t with additional types: p2m_mmio_direct, p2m_ext_storage. - Added macros to classify memory types: P2M_RAM_TYPES. - Introduced helper predicates: p2m_is_ram(), p2m_is_any_ram(). - Introduce arch_dt_passthrough() to tell handle_passthrough_prop() from common code how to map device memory. - Introduce p2m_first_external for detection for relational operations with p2m type which is stored outside P2M's PTE bits. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/include/asm/p2m.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h index c9aa19ad43..1c89838408 100644 --- a/xen/arch/riscv/include/asm/p2m.h +++ b/xen/arch/riscv/include/asm/p2m.h @@ -70,8 +70,29 @@ struct p2m_domain { typedef enum { p2m_invalid = 0, /* Nothing mapped here */ p2m_ram_rw, /* Normal read/write domain RAM */ + p2m_mmio_direct_io, /* Read/write mapping of genuine Device MMIO area, + PTE_PBMT_IO will be used for such mappings */ + p2m_ext_storage, /* Following types'll be stored outsude PTE bits: */ + + /* Sentinel — not a real type, just a marker for comparison */ + p2m_first_external = p2m_ext_storage, } p2m_type_t; +static inline p2m_type_t arch_dt_passthrough_p2m_type(void) +{ + return p2m_mmio_direct_io; +} + +/* We use bitmaps and mask to handle groups of types */ +#define p2m_to_mask(t) BIT(t, UL) + +/* RAM types, which map to real machine frames */ +#define P2M_RAM_TYPES (p2m_to_mask(p2m_ram_rw)) + +/* Useful predicates */ +#define p2m_is_ram(t) (p2m_to_mask(t) & P2M_RAM_TYPES) +#define p2m_is_any_ram(t) (p2m_to_mask(t) & P2M_RAM_TYPES) + #include static inline int get_page_and_type(struct page_info *page, -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 12:01:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 12:01:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189510.1510267 (Exim 4.92) (envelope-from ) id 1vWCh9-0002Rd-F2; Thu, 18 Dec 2025 12:01:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189510.1510267; Thu, 18 Dec 2025 12:01:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWCh9-0002RV-CR; Thu, 18 Dec 2025 12:01:23 +0000 Received: by outflank-mailman (input) for mailman id 1189510; Thu, 18 Dec 2025 12:01:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWCh8-0002RH-Pd for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 12:01:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWCh8-00FxuQ-1Y for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 12:01:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWCh8-005mrm-2N for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 12:01:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=6TB/eDn5RB1PTxQ0+dvCNd+u9v/W5wyxIm9YEQ1VP30=; b=pCou3XxC3loAlToNMWPTqqDgQm V7yqm+h2tUt7UctFE8m6dzL6IW5BJ13dqQ1EXYIAMngj1aVzVUvcPdH5rOD8LkFqcgadKSRzIe0SP IyABIACn4hEZWgxtGujV9ECMUE/sWQp71TEsdQLlVcM+z1uyJNczssd+j9uhGn0Xm5Pg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/x86: move domain_clamp_alloc_bitsize() into pv32 code Message-Id: Date: Thu, 18 Dec 2025 12:01:22 +0000 commit c37bcb35f928c81cbeea7c05f86b6779f8a2b8c4 Author: Grygorii Strashko AuthorDate: Thu Dec 18 10:00:34 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 10:04:55 2025 +0100 xen/x86: move domain_clamp_alloc_bitsize() into pv32 code The d->arch.physaddr_bitsize field is used only by PV32 code so as the domain_clamp_alloc_bitsize() function. Hence move domain_clamp_alloc_bitsize() function into PV32 code and convert it to macro. Signed-off-by: Grygorii Strashko Reviewed-by: Jan Beulich --- xen/arch/x86/include/asm/mm.h | 11 +++++++++-- xen/arch/x86/x86_64/mm.c | 7 ------- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h index 9438f5ea01..3fc678d32f 100644 --- a/xen/arch/x86/include/asm/mm.h +++ b/xen/arch/x86/include/asm/mm.h @@ -619,8 +619,15 @@ void __iomem *ioremap_wc(paddr_t pa, size_t len); extern int memory_add(unsigned long spfn, unsigned long epfn, unsigned int pxm); -unsigned int domain_clamp_alloc_bitsize(struct domain *d, unsigned int bits); -#define domain_clamp_alloc_bitsize(d, bits) domain_clamp_alloc_bitsize(d, bits) +#ifdef CONFIG_PV32 +#define domain_clamp_alloc_bitsize(d, bits) ({ \ + const struct domain *_d = (d); \ + \ + ((_d && _d->arch.physaddr_bitsize) \ + ? min_t(unsigned int, _d->arch.physaddr_bitsize, bits) \ + : (bits)); \ +}) +#endif unsigned long domain_get_maximum_gpfn(struct domain *d); diff --git a/xen/arch/x86/x86_64/mm.c b/xen/arch/x86/x86_64/mm.c index 42fd4fe4e9..8eadab7933 100644 --- a/xen/arch/x86/x86_64/mm.c +++ b/xen/arch/x86/x86_64/mm.c @@ -1119,13 +1119,6 @@ unmap: return ret; } -unsigned int domain_clamp_alloc_bitsize(struct domain *d, unsigned int bits) -{ - if ( (d == NULL) || (d->arch.physaddr_bitsize == 0) ) - return bits; - return min(d->arch.physaddr_bitsize, bits); -} - static int transfer_pages_to_heap(struct mem_hotadd_info *info) { unsigned long i; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 12:01:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 12:01:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189511.1510270 (Exim 4.92) (envelope-from ) id 1vWChJ-0002Tq-GN; Thu, 18 Dec 2025 12:01:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189511.1510270; Thu, 18 Dec 2025 12:01:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWChJ-0002Tj-Dy; Thu, 18 Dec 2025 12:01:33 +0000 Received: by outflank-mailman (input) for mailman id 1189511; Thu, 18 Dec 2025 12:01:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWChI-0002TZ-Tu for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 12:01:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWChI-00FxuY-1w for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 12:01:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWChI-005oD6-2m for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 12:01:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=YtWZzIle6PGsk1MhXlEL0Os8ru0bMh+hG62YCfTO5lA=; b=iHn2rBRSaSfv4GhKDm/6b4vteD aRsOcEsM6r2tVkHXOrM/v52vy7kxM29ChZ5n/AEkIda8Ze8lXgURNTQ3ymgjIRB+InlucQ/BAP6nn W+MfyP83cUgEW2S/Y1YeDrfzs617cW67csj0WuL/CoPcJechMVmH/x9Xtcw+QaDP9UdE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/x86: move d->arch.physaddr_bitsize field handling into pv32 Message-Id: Date: Thu, 18 Dec 2025 12:01:32 +0000 commit 7d2e057368ae4014745931d0bf876c817c820599 Author: Grygorii Strashko AuthorDate: Thu Dec 18 10:07:08 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 10:07:08 2025 +0100 xen/x86: move d->arch.physaddr_bitsize field handling into pv32 The d->arch.physaddr_bitsize field is used only by PV32 code, so move d->arch.physaddr_bitsize field under PV32 ifdef into struct pv_domain. Signed-off-by: Grygorii Strashko Reviewed-by: Andrew Cooper --- xen/arch/x86/include/asm/domain.h | 6 +++--- xen/arch/x86/include/asm/mm.h | 4 ++-- xen/arch/x86/pv/dom0_build.c | 7 +++++-- xen/arch/x86/pv/domain.c | 2 +- 4 files changed, 11 insertions(+), 8 deletions(-) diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/domain.h index 7e5cbd11a4..16cd45cc32 100644 --- a/xen/arch/x86/include/asm/domain.h +++ b/xen/arch/x86/include/asm/domain.h @@ -290,6 +290,9 @@ struct pv_domain #ifdef CONFIG_PV32 unsigned int hv_compat_vstart; + + /* Maximum physical-address bitwidth supported by this guest. */ + unsigned int physaddr_bitsize; #endif /* map_domain_page() mapping cache. */ @@ -319,9 +322,6 @@ struct arch_domain { struct page_info *perdomain_l3_pg; - /* Maximum physical-address bitwidth supported by this guest. */ - unsigned int physaddr_bitsize; - /* I/O-port admin-specified access capabilities. */ struct rangeset *ioport_caps; uint32_t pci_cf8; diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h index 3fc678d32f..419fa17a43 100644 --- a/xen/arch/x86/include/asm/mm.h +++ b/xen/arch/x86/include/asm/mm.h @@ -623,8 +623,8 @@ extern int memory_add(unsigned long spfn, unsigned long epfn, unsigned int pxm); #define domain_clamp_alloc_bitsize(d, bits) ({ \ const struct domain *_d = (d); \ \ - ((_d && _d->arch.physaddr_bitsize) \ - ? min_t(unsigned int, _d->arch.physaddr_bitsize, bits) \ + ((_d && _d->arch.pv.physaddr_bitsize) \ + ? min_t(unsigned int, _d->arch.pv.physaddr_bitsize, bits) \ : (bits)); \ }) #endif diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c index 418b453ba8..9a11a0a16b 100644 --- a/xen/arch/x86/pv/dom0_build.c +++ b/xen/arch/x86/pv/dom0_build.c @@ -626,8 +626,10 @@ static int __init dom0_construct(const struct boot_domain *bd) initrd_mfn = paddr_to_pfn(initrd->start); mfn = initrd_mfn; count = PFN_UP(initrd_len); - if ( d->arch.physaddr_bitsize && - ((mfn + count - 1) >> (d->arch.physaddr_bitsize - PAGE_SHIFT)) ) + +#ifdef CONFIG_PV32 + if ( d->arch.pv.physaddr_bitsize && + ((mfn + count - 1) >> (d->arch.pv.physaddr_bitsize - PAGE_SHIFT)) ) { order = get_order_from_pages(count); page = alloc_domheap_pages(d, order, MEMF_no_scrub); @@ -650,6 +652,7 @@ static int __init dom0_construct(const struct boot_domain *bd) initrd->start = pfn_to_paddr(initrd_mfn); } else +#endif { while ( count-- ) if ( assign_pages(mfn_to_page(_mfn(mfn++)), 1, d, 0) ) diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c index ca5f692051..01499582d2 100644 --- a/xen/arch/x86/pv/domain.c +++ b/xen/arch/x86/pv/domain.c @@ -257,7 +257,7 @@ int switch_compat(struct domain *d) d->arch.pv.hv_compat_vstart = __HYPERVISOR_COMPAT_VIRT_START; if ( MACH2PHYS_COMPAT_NR_ENTRIES(d) < max_page ) - d->arch.physaddr_bitsize = + d->arch.pv.physaddr_bitsize = /* 2^n entries can be contained in guest's p2m mapping space */ fls(MACH2PHYS_COMPAT_NR_ENTRIES(d)) - 1 + PAGE_SHIFT; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 14:44:09 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 14:44:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189744.1510435 (Exim 4.92) (envelope-from ) id 1vWFEa-00055s-HG; Thu, 18 Dec 2025 14:44:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189744.1510435; Thu, 18 Dec 2025 14:44:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWFEa-00055k-EW; Thu, 18 Dec 2025 14:44:04 +0000 Received: by outflank-mailman (input) for mailman id 1189744; Thu, 18 Dec 2025 14:44:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWFEY-00055e-Tx for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 14:44:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWFEY-00G1FE-1m for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 14:44:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWFEY-008m6o-2M for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 14:44:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=oGosOeeW1hvU9pnSqq4nXRr/rlqRdnDa69avzbGFPM4=; b=EK/gGTV7Xtik5BiKFxpL9KjOIs 1lgwRHODBs7QVgUnHIHcnzjkggCzISMzmj0e+mAO/s1otS4vbpEupsI0nz/CfTKKmRxpnfa8vt0j6 h2w36jj+MQK5f3/GIAvvqZKRxy/9OBRZuPBAoJ3RZ3SPiPc25zyfLN/07nicj/nD7Mck=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/dom0less: abstract Arm-specific p2m type name for device MMIO mappings Message-Id: Date: Thu, 18 Dec 2025 14:44:02 +0000 commit 5bcbcc2565775eb21d052fa2befdffbc63c0ea41 Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:18 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 14:23:42 2025 +0100 xen/dom0less: abstract Arm-specific p2m type name for device MMIO mappings Introduce arch_dt_passthrough_p2m_type() and use it instead of `p2m_mmio_direct_dev` to avoid leaking Arm-specific naming into common Xen code, such as dom0less passthrough property handling. This helps reduce platform-specific terminology in shared logic and improves clarity for future non-Arm ports (e.g. RISC-V or PowerPC). No functional changes — the definition is preserved via a static inline function for Arm. Suggested-by: Jan Beulich Signed-off-by: Oleksii Kurochko Reviewed-by: Michal Orzel --- xen/arch/arm/include/asm/p2m.h | 5 +++++ xen/common/device-tree/dom0less-build.c | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h index ef98bc5f4d..010ce8c9eb 100644 --- a/xen/arch/arm/include/asm/p2m.h +++ b/xen/arch/arm/include/asm/p2m.h @@ -137,6 +137,11 @@ typedef enum { p2m_max_real_type, /* Types after this won't be store in the p2m */ } p2m_type_t; +static inline p2m_type_t arch_dt_passthrough_p2m_type(void) +{ + return p2m_mmio_direct_dev; +} + /* We use bitmaps and mask to handle groups of types */ #define p2m_to_mask(_t) (1UL << (_t)) diff --git a/xen/common/device-tree/dom0less-build.c b/xen/common/device-tree/dom0less-build.c index 2600350a3c..495ef7b16a 100644 --- a/xen/common/device-tree/dom0less-build.c +++ b/xen/common/device-tree/dom0less-build.c @@ -185,7 +185,7 @@ static int __init handle_passthrough_prop(struct kernel_info *kinfo, gaddr_to_gfn(gstart), PFN_DOWN(size), maddr_to_mfn(mstart), - p2m_mmio_direct_dev); + arch_dt_passthrough_p2m_type()); if ( res < 0 ) { printk(XENLOG_ERR -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 14:44:14 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 14:44:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189745.1510439 (Exim 4.92) (envelope-from ) id 1vWFEk-00057V-IW; Thu, 18 Dec 2025 14:44:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189745.1510439; Thu, 18 Dec 2025 14:44:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWFEk-00057N-Ft; Thu, 18 Dec 2025 14:44:14 +0000 Received: by outflank-mailman (input) for mailman id 1189745; Thu, 18 Dec 2025 14:44:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWFEj-00057B-0n for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 14:44:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWFEi-00G1FI-2H for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 14:44:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWFEi-008nLv-2x for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 14:44:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Jw4xx6OicLClnuUfuZT0HONhv5BJhegfZks1LpbA7rk=; b=zpWr8+f8gOLPu56JIldA7D9o05 yBDI4MZBo9zYDckGbfBDHVVY9xb2b6gGKzXT94QTDryLZuLaAgL9DXr0KJrh7qee2G4IOif1jTjMI 5DK15J7UagTyQE0ucrHkHD9a8XbJwqZVzNz9lQVC6+9lTxJLijLMZ8dzXliiMYz1nRiA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/riscv: implement function to map memory in guest p2m Message-Id: Date: Thu, 18 Dec 2025 14:44:12 +0000 commit 96553849a32e5240e444db09b92c559480faffa0 Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:19 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 14:24:17 2025 +0100 xen/riscv: implement function to map memory in guest p2m Implement map_regions_p2mt() to map a region in the guest p2m with a specific p2m type. The memory attributes will be derived from the p2m type. This function is used in dom0less common code. To implement it, introduce: - p2m_write_(un)lock() to ensure safe concurrent updates to the P2M. As part of this change, introduce p2m_tlb_flush_sync() and p2m_force_tlb_flush_sync(). - A stub for p2m_set_range() to map a range of GFNs to MFNs. - p2m_insert_mapping(). - p2m_is_write_locked(). Drop guest_physmap_add_entry() and call map_regions_p2mt() directly from guest_physmap_add_page(), making guest_physmap_add_entry() unnecessary. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/include/asm/p2m.h | 31 +++++++++++++++------ xen/arch/riscv/p2m.c | 60 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 82 insertions(+), 9 deletions(-) diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h index 1c89838408..9acd6a64a8 100644 --- a/xen/arch/riscv/include/asm/p2m.h +++ b/xen/arch/riscv/include/asm/p2m.h @@ -128,21 +128,22 @@ static inline int guest_physmap_mark_populate_on_demand(struct domain *d, return -EOPNOTSUPP; } -static inline int guest_physmap_add_entry(struct domain *d, - gfn_t gfn, mfn_t mfn, - unsigned long page_order, - p2m_type_t t) -{ - BUG_ON("unimplemented"); - return -EINVAL; -} +/* + * Map a region in the guest's hostp2m p2m with a specific p2m type. + * The memory attributes will be derived from the p2m type. + */ +int map_regions_p2mt(struct domain *d, + gfn_t gfn, + unsigned long nr, + mfn_t mfn, + p2m_type_t p2mt); /* Untyped version for RAM only, for compatibility */ static inline int __must_check guest_physmap_add_page(struct domain *d, gfn_t gfn, mfn_t mfn, unsigned int page_order) { - return guest_physmap_add_entry(d, gfn, mfn, page_order, p2m_ram_rw); + return map_regions_p2mt(d, gfn, BIT(page_order, UL), mfn, p2m_ram_rw); } static inline mfn_t gfn_to_mfn(struct domain *d, gfn_t gfn) @@ -166,6 +167,18 @@ unsigned char get_max_supported_mode(void); int p2m_init(struct domain *d); +static inline void p2m_write_lock(struct p2m_domain *p2m) +{ + write_lock(&p2m->lock); +} + +void p2m_write_unlock(struct p2m_domain *p2m); + +static inline bool p2m_is_write_locked(struct p2m_domain *p2m) +{ + return rw_is_write_locked(&p2m->lock); +} + unsigned long construct_hgatp(const struct p2m_domain *p2m, uint16_t vmid); #endif /* ASM__RISCV__P2M_H */ diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index d14757331f..8bb197f9b3 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -110,6 +110,41 @@ void __init guest_mm_init(void) local_hfence_gvma_all(); } +/* + * Force a synchronous P2M TLB flush. + * + * Must be called with the p2m lock held. + */ +static void p2m_tlb_flush(struct p2m_domain *p2m) +{ + const struct domain *d = p2m->domain; + + ASSERT(p2m_is_write_locked(p2m)); + + p2m->need_flush = false; + + sbi_remote_hfence_gvma(d->dirty_cpumask, 0, 0); +} + +void p2m_tlb_flush_sync(struct p2m_domain *p2m) +{ + if ( p2m->need_flush ) + p2m_tlb_flush(p2m); +} + +/* Unlock the P2M and do a P2M TLB flush if necessary */ +void p2m_write_unlock(struct p2m_domain *p2m) +{ + /* + * The final flush is done with the P2M write lock taken to avoid + * someone else modifying the P2M before the TLB invalidation has + * completed. + */ + p2m_tlb_flush_sync(p2m); + + write_unlock(&p2m->lock); +} + static void clear_and_clean_page(struct page_info *page, bool clean_dcache) { void *p = __map_domain_page(page); @@ -238,3 +273,28 @@ int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted) return rc; } + +static int p2m_set_range(struct p2m_domain *p2m, + gfn_t sgfn, + unsigned long nr, + mfn_t smfn, + p2m_type_t t) +{ + return -EOPNOTSUPP; +} + +int map_regions_p2mt(struct domain *d, + gfn_t gfn, + unsigned long nr, + mfn_t mfn, + p2m_type_t p2mt) +{ + struct p2m_domain *p2m = p2m_get_hostp2m(d); + int rc; + + p2m_write_lock(p2m); + rc = p2m_set_range(p2m, gfn, nr, mfn, p2mt); + p2m_write_unlock(p2m); + + return rc; +} -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 14:44:24 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 14:44:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189746.1510443 (Exim 4.92) (envelope-from ) id 1vWFEu-00059g-KI; Thu, 18 Dec 2025 14:44:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189746.1510443; Thu, 18 Dec 2025 14:44:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWFEu-00059Y-HI; Thu, 18 Dec 2025 14:44:24 +0000 Received: by outflank-mailman (input) for mailman id 1189746; Thu, 18 Dec 2025 14:44:23 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWFEt-00059S-6G for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/riscv: implement p2m_set_range() Message-Id: Date: Thu, 18 Dec 2025 14:44:23 +0000 commit fcd6755606361c3b5a409b5cd4b2a641de2feb71 Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:20 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 14:24:32 2025 +0100 xen/riscv: implement p2m_set_range() This patch introduces p2m_set_range() and its core helper p2m_set_entry() for RISC-V, based loosely on the Arm implementation, with several RISC-V-specific modifications. The main changes are: - Simplification of Break-Before-Make (BBM) approach as according to RISC-V spec: It is permitted for multiple address-translation cache entries to co-exist for the same address. This represents the fact that in a conventional TLB hierarchy, it is possible for multiple entries to match a single address if, for example, a page is upgraded to a superpage without first clearing the original non-leaf PTE’s valid bit and executing an SFENCE.VMA with rs1=x0, or if multiple TLBs exist in parallel at a given level of the hierarchy. In this case, just as if an SFENCE.VMA is not executed between a write to the memory-management tables and subsequent implicit read of the same address: it is unpredictable whether the old non-leaf PTE or the new leaf PTE is used, but the behavior is otherwise well defined. In contrast to the Arm architecture, where BBM is mandatory and failing to use it in some cases can lead to CPU instability, RISC-V guarantees stability, and the behavior remains safe — though unpredictable in terms of which translation will be used. - Unlike Arm, the valid bit is not repurposed for other uses in this implementation. Instead, entry validity is determined based solely on P2M PTE's valid bit. The main functionality is in p2m_set_entry(), which handles mappings aligned to page table block entries (e.g., 1GB, 2MB, or 4KB with 4KB granularity). p2m_set_range() breaks a region down into block-aligned mappings and calls p2m_set_entry() accordingly. Stub implementations (to be completed later) include: - p2m_free_subtree() - p2m_next_level() - p2m_pte_from_mfn() Note: Support for shattering block entries is not implemented in this patch and will be added separately. Additionally, some straightforward helper functions are now implemented: - p2m_write_pte() - p2m_remove_pte() - p2m_get_root_pointer() Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/include/asm/p2m.h | 38 +++++ xen/arch/riscv/p2m.c | 326 ++++++++++++++++++++++++++++++++++++++- 2 files changed, 363 insertions(+), 1 deletion(-) diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h index 9acd6a64a8..fa55d8a3bc 100644 --- a/xen/arch/riscv/include/asm/p2m.h +++ b/xen/arch/riscv/include/asm/p2m.h @@ -8,10 +8,38 @@ #include #include +#include #include #define P2M_ROOT_ORDER (ilog2(GSTAGE_ROOT_PAGE_TABLE_SIZE) - PAGE_SHIFT) #define P2M_ROOT_PAGES BIT(P2M_ROOT_ORDER, U) +#define P2M_ROOT_LEVEL(p2m) ((p2m)->mode.paging_levels) + +/* + * According to the RISC-V spec: + * When hgatp.MODE specifies a translation scheme of Sv32x4, Sv39x4, Sv48x4, + * or Sv57x4, G-stage address translation is a variation on the usual + * page-based virtual address translation scheme of Sv32, Sv39, Sv48, or + * Sv57, respectively. In each case, the size of the incoming address is + * widened by 2 bits (to 34, 41, 50, or 59 bits). + * + * P2M_LEVEL_ORDER(lvl) defines the bit position in the GFN from which + * the index for this level of the P2M page table starts. The extra 2 + * bits added by the "x4" schemes only affect the root page table width. + * + * Therefore, this macro can safely reuse XEN_PT_LEVEL_ORDER() for all + * levels: the extra 2 bits do not change the indices of lower levels. + */ +#define P2M_LEVEL_ORDER(lvl) XEN_PT_LEVEL_ORDER(lvl) + +#define P2M_ROOT_EXTRA_BITS(p2m, lvl) (2 * ((lvl) == P2M_ROOT_LEVEL(p2m))) + +#define P2M_PAGETABLE_ENTRIES(p2m, lvl) \ + (BIT(PAGETABLE_ORDER + P2M_ROOT_EXTRA_BITS(p2m, lvl), UL)) + +#define P2M_TABLE_OFFSET(p2m, lvl) (P2M_PAGETABLE_ENTRIES(p2m, lvl) - 1UL) + +#define P2M_GFN_LEVEL_SHIFT(lvl) (P2M_LEVEL_ORDER(lvl) + PAGE_SHIFT) #define paddr_bits PADDR_BITS @@ -58,6 +86,16 @@ struct p2m_domain { * when a page is needed to be fully cleared and cleaned. */ bool clean_dcache; + + /* Highest guest frame that's ever been mapped in the p2m */ + gfn_t max_mapped_gfn; + + /* + * Lowest mapped gfn in the p2m. When releasing mapped gfn's in a + * preemptible manner this is updated to track where to resume + * the search. Apart from during teardown this can only decrease. + */ + gfn_t lowest_mapped_gfn; }; /* diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index 8bb197f9b3..c23926933f 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include @@ -17,6 +18,13 @@ #include #include +/* + * At the moment, only 4K, 2M, and 1G mappings are supported for G-stage + * translation. Therefore, the maximum supported page-table level is 2, + * which corresponds to 1G mappings. + */ +#define P2M_MAX_SUPPORTED_LEVEL_MAPPING _AC(2, U) + static struct gstage_mode_desc __ro_after_init max_gstage_mode = { .mode = HGATP_MODE_OFF, .paging_levels = 0, @@ -28,6 +36,77 @@ unsigned char get_max_supported_mode(void) return max_gstage_mode.mode; } +static inline unsigned int calc_offset(const struct p2m_domain *p2m, + const unsigned int lvl, + const paddr_t gpa) +{ + unsigned int off = (gpa >> P2M_GFN_LEVEL_SHIFT(lvl)) & + P2M_TABLE_OFFSET(p2m, lvl); + + /* + * For P2M_ROOT_LEVEL, `offset` ranges from 0 to 2047, since the root + * page table spans 4 consecutive 4KB pages. + * We want to return an index within one of these 4 pages. + * The specific page to use is determined by `p2m_get_root_pointer()`. + * + * Example: if `offset == 512`: + * - A single 4KB page holds 512 entries. + * - Therefore, entry 512 corresponds to index 0 of the second page. + * + * At all other levels, only one page is allocated, and `offset` is + * always in the range 0 to 511, since the VPN is 9 bits long. + */ + return off & (PAGETABLE_ENTRIES - 1); +} + +#define P2M_MAX_ROOT_LEVEL 5 + +#define P2M_BUILD_LEVEL_OFFSETS(p2m, var, addr) \ + unsigned int var[P2M_MAX_ROOT_LEVEL]; \ + BUG_ON(P2M_ROOT_LEVEL(p2m) >= P2M_MAX_ROOT_LEVEL); \ + for ( unsigned int i = 0; i <= P2M_ROOT_LEVEL(p2m); i++ ) \ + var[i] = calc_offset(p2m, i, addr); + +/* + * Map one of the four root pages of the P2M root page table. + * + * The P2M root page table is larger than normal (16KB instead of 4KB), + * so it is allocated as four consecutive 4KB pages. This function selects + * the appropriate 4KB page based on the given GFN and returns a mapping + * to it. + * + * The caller is responsible for unmapping the page after use. + * + * Returns NULL if the calculated offset into the root table is invalid. + */ +static pte_t *p2m_get_root_pointer(struct p2m_domain *p2m, gfn_t gfn) +{ + unsigned long idx; + unsigned long root_level = P2M_ROOT_LEVEL(p2m); + + idx = gfn_x(gfn) >> P2M_LEVEL_ORDER(root_level); + if ( idx >= P2M_PAGETABLE_ENTRIES(p2m, root_level) ) + return NULL; + + /* + * The P2M root page table is extended by 2 bits, making its size 16KB + * (instead of 4KB for non-root page tables). Therefore, p2m->root is + * allocated as four consecutive 4KB pages (since alloc_domheap_pages() + * only allocates 4KB pages). + * + * Initially, `idx` is derived directly from `gfn`. + * To locate the correct entry within a single 4KB page, + * we rescale the offset so it falls within one of the 4 pages. + * + * Example: if `idx == 512` + * - A 4KB page holds 512 entries. + * - Thus, entry 512 corresponds to index 0 of the second page. + */ + idx /= PAGETABLE_ENTRIES; + + return __map_domain_page(p2m->root + idx); +} + static void __init gstage_mode_detect(void) { static const struct gstage_mode_desc modes[] __initconst = { @@ -228,6 +307,9 @@ int p2m_init(struct domain *d) rwlock_init(&p2m->lock); INIT_PAGE_LIST_HEAD(&p2m->pages); + p2m->max_mapped_gfn = _gfn(0); + p2m->lowest_mapped_gfn = _gfn(ULONG_MAX); + /* * Currently, the infrastructure required to enable CONFIG_HAS_PASSTHROUGH * is not ready for RISC-V support. @@ -274,13 +356,255 @@ int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted) return rc; } +static inline void p2m_write_pte(pte_t *p, pte_t pte, bool clean_cache) +{ + write_pte(p, pte); + + /* + * TODO: if multiple adjacent PTEs are written without releasing + * the lock, this then redundant cache flushing can be a + * performance issue. + */ + if ( clean_cache ) + clean_dcache_va_range(p, sizeof(*p)); +} + +static inline void p2m_clean_pte(pte_t *p, bool clean_cache) +{ + pte_t pte = { .pte = 0 }; + + p2m_write_pte(p, pte, clean_cache); +} + +static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t) +{ + panic("%s: hasn't been implemented yet\n", __func__); + + return (pte_t) { .pte = 0 }; +} + +#define P2M_TABLE_MAP_NONE 0 +#define P2M_TABLE_MAP_NOMEM 1 +#define P2M_TABLE_SUPER_PAGE 2 +#define P2M_TABLE_NORMAL 3 + +/* + * Take the currently mapped table, find the entry corresponding to the GFN, + * and map the next-level table if available. The previous table will be + * unmapped if the next level was mapped (e.g., when P2M_TABLE_NORMAL is + * returned). + * + * `alloc_tbl` parameter indicates whether intermediate tables should + * be allocated when not present. + * + * Return values: + * P2M_TABLE_MAP_NONE: a table allocation isn't permitted. + * P2M_TABLE_MAP_NOMEM: allocating a new page failed. + * P2M_TABLE_SUPER_PAGE: next level or leaf mapped normally. + * P2M_TABLE_NORMAL: The next entry points to a superpage. + */ +static int p2m_next_level(struct p2m_domain *p2m, bool alloc_tbl, + unsigned int level, pte_t **table, + unsigned int offset) +{ + panic("%s: hasn't been implemented yet\n", __func__); + + return P2M_TABLE_MAP_NONE; +} + +/* Free pte sub-tree behind an entry */ +static void p2m_free_subtree(struct p2m_domain *p2m, + pte_t entry, unsigned int level) +{ + panic("%s: hasn't been implemented yet\n", __func__); +} + +/* Insert an entry in the p2m */ +static int p2m_set_entry(struct p2m_domain *p2m, + gfn_t gfn, + unsigned long page_order, + mfn_t mfn, + p2m_type_t t) +{ + unsigned int level; + unsigned int target = page_order / PAGETABLE_ORDER; + pte_t *entry, *table, orig_pte; + int rc; + /* + * A mapping is removed only if the MFN is explicitly set to INVALID_MFN. + * Other MFNs that are considered invalid by mfn_valid() (e.g., MMIO) + * are still allowed. + */ + bool removing_mapping = mfn_eq(mfn, INVALID_MFN); + P2M_BUILD_LEVEL_OFFSETS(p2m, offsets, gfn_to_gaddr(gfn)); + + ASSERT(p2m_is_write_locked(p2m)); + + /* + * Check if the level target is valid: we only support + * 4K - 2M - 1G mapping. + */ + ASSERT(target <= P2M_MAX_SUPPORTED_LEVEL_MAPPING); + + table = p2m_get_root_pointer(p2m, gfn); + if ( !table ) + return -EINVAL; + + for ( level = P2M_ROOT_LEVEL(p2m); level > target; level-- ) + { + /* + * Don't try to allocate intermediate page table if the mapping + * is about to be removed. + */ + rc = p2m_next_level(p2m, !removing_mapping, + level, &table, offsets[level]); + if ( (rc == P2M_TABLE_MAP_NONE) || (rc == P2M_TABLE_MAP_NOMEM) ) + { + rc = (rc == P2M_TABLE_MAP_NONE) ? -ENOENT : -ENOMEM; + /* + * We are here because p2m_next_level has failed to map + * the intermediate page table (e.g the table does not exist + * and none should be allocated). It is a valid case + * when removing a mapping as it may not exist in the + * page table. In this case, just ignore lookup failure. + */ + rc = removing_mapping ? 0 : rc; + goto out; + } + + if ( rc != P2M_TABLE_NORMAL ) + break; + } + + entry = table + offsets[level]; + + /* + * If we are here with level > target, we must be at a leaf node, + * and we need to break up the superpage. + */ + if ( level > target ) + { + panic("Shattering isn't implemented\n"); + } + + /* + * We should always be there with the correct level because all the + * intermediate tables have been installed if necessary. + */ + ASSERT(level == target); + + orig_pte = *entry; + + if ( removing_mapping ) + p2m_clean_pte(entry, p2m->clean_dcache); + else + { + pte_t pte = p2m_pte_from_mfn(mfn, t); + + p2m_write_pte(entry, pte, p2m->clean_dcache); + + p2m->max_mapped_gfn = gfn_max(p2m->max_mapped_gfn, + gfn_add(gfn, BIT(page_order, UL) - 1)); + p2m->lowest_mapped_gfn = gfn_min(p2m->lowest_mapped_gfn, gfn); + } + + p2m->need_flush = true; + + /* + * Currently, the infrastructure required to enable CONFIG_HAS_PASSTHROUGH + * is not ready for RISC-V support. + * + * When CONFIG_HAS_PASSTHROUGH=y, iommu_iotlb_flush() should be done + * here. + */ +#ifdef CONFIG_HAS_PASSTHROUGH +# error "add code to flush IOMMU TLB" +#endif + + rc = 0; + + /* + * In case of a VALID -> INVALID transition, the original PTE should + * always be freed. + * + * In case of a VALID -> VALID transition, the original PTE should be + * freed only if the MFNs are different. If the MFNs are the same + * (i.e., only permissions differ), there is no need to free the + * original PTE. + */ + if ( pte_is_valid(orig_pte) && + (!pte_is_valid(*entry) || + !mfn_eq(pte_get_mfn(*entry), pte_get_mfn(orig_pte))) ) + p2m_free_subtree(p2m, orig_pte, level); + + out: + unmap_domain_page(table); + + return rc; +} + +/* Return mapping order for given gfn, mfn and nr */ +static unsigned long p2m_mapping_order(const struct p2m_domain *p2m, gfn_t gfn, + mfn_t mfn, unsigned long nr) +{ + unsigned long mask; + /* 1gb, 2mb, 4k mappings are supported */ + unsigned int level = min(P2M_ROOT_LEVEL(p2m), P2M_MAX_SUPPORTED_LEVEL_MAPPING); + unsigned long order = 0; + + mask = !mfn_eq(mfn, INVALID_MFN) ? mfn_x(mfn) : 0; + mask |= gfn_x(gfn); + + for ( ; level != 0; level-- ) + { + if ( !(mask & (BIT(P2M_LEVEL_ORDER(level), UL) - 1)) && + (nr >= BIT(P2M_LEVEL_ORDER(level), UL)) ) + { + order = P2M_LEVEL_ORDER(level); + break; + } + } + + return order; +} + static int p2m_set_range(struct p2m_domain *p2m, gfn_t sgfn, unsigned long nr, mfn_t smfn, p2m_type_t t) { - return -EOPNOTSUPP; + int rc = 0; + unsigned long left = nr; + + /* + * Any reference taken by the P2M mappings (e.g. foreign mapping) will + * be dropped in relinquish_p2m_mapping(). As the P2M will still + * be accessible after, we need to prevent mapping to be added when the + * domain is dying. + */ + if ( unlikely(p2m->domain->is_dying) ) + return -EACCES; + + while ( left ) + { + unsigned long order = p2m_mapping_order(p2m, sgfn, smfn, left); + + rc = p2m_set_entry(p2m, sgfn, order, smfn, t); + if ( rc ) + break; + + sgfn = gfn_add(sgfn, BIT(order, UL)); + if ( !mfn_eq(smfn, INVALID_MFN) ) + smfn = mfn_add(smfn, BIT(order, UL)); + + left -= BIT(order, UL); + } + + if ( left > INT_MAX ) + rc = -EOVERFLOW; + + return !left ? rc : left; } int map_regions_p2mt(struct domain *d, -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 14:44:34 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 14:44:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189747.1510447 (Exim 4.92) (envelope-from ) id 1vWFF4-0005CL-Mi; Thu, 18 Dec 2025 14:44:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189747.1510447; Thu, 18 Dec 2025 14:44:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWFF4-0005CD-Jw; Thu, 18 Dec 2025 14:44:34 +0000 Received: by outflank-mailman (input) for mailman id 1189747; Thu, 18 Dec 2025 14:44:33 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWFF3-0005C1-Cx for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 14:44:33 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWFF3-00G1FZ-06 for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 14:44:33 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWFF3-008q03-0i for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 14:44:33 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=8Je33EZcQd2v7EViVzXltK92vXvqWgJ1UwZHJ6wNSAA=; b=bDKsTI9OWfDSqfJk5B5djjdf3+ eKmel/plO2p/oMvGirjCqX+lsRIWieyjpJyvv0qB4HMzuUCGTiA3bSP1AJXHEoe4lvdulKSJX+82N LSD1m82xzpzfyQzuLWXA7mu61lN2CkjVnTrYZraKoX0Z+opAwl7qat5ASXxc6wC5Gtkk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/riscv: Implement p2m_free_subtree() and related helpers Message-Id: Date: Thu, 18 Dec 2025 14:44:33 +0000 commit 6f7881e331ea6b25fd75d262d3ec07525103259c Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:21 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 14:24:45 2025 +0100 xen/riscv: Implement p2m_free_subtree() and related helpers This patch introduces a working implementation of p2m_free_subtree() for RISC-V based on ARM's implementation of p2m_free_entry(), enabling proper cleanup of page table entries in the P2M (physical-to-machine) mapping. Only few things are changed: - Introduce and use p2m_get_type() to get a type of p2m entry as RISC-V's PTE doesn't have enough space to store all necessary types so a type is stored outside PTE. But, at the moment, handle only types which fit into PTE's bits. Key additions include: - p2m_free_subtree(): Recursively frees page table entries at all levels. It handles both regular and superpage mappings and ensures that TLB entries are flushed before freeing intermediate tables. - p2m_put_page() and helpers: - p2m_put_4k_page(): Clears GFN from xenheap pages if applicable. - p2m_put_2m_superpage(): Releases foreign page references in a 2MB superpage. - p2m_get_type(): Extracts the stored p2m_type from the PTE bits. - p2m_free_page(): Returns a page to a domain's freelist. - Introduce p2m_is_foreign() and connected to it things. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/include/asm/flushtlb.h | 6 +- xen/arch/riscv/include/asm/p2m.h | 15 ++++ xen/arch/riscv/include/asm/paging.h | 2 + xen/arch/riscv/p2m.c | 148 +++++++++++++++++++++++++++++++++- xen/arch/riscv/paging.c | 8 ++ xen/arch/riscv/stubs.c | 5 -- 6 files changed, 176 insertions(+), 8 deletions(-) diff --git a/xen/arch/riscv/include/asm/flushtlb.h b/xen/arch/riscv/include/asm/flushtlb.h index e70badae0c..ab32311568 100644 --- a/xen/arch/riscv/include/asm/flushtlb.h +++ b/xen/arch/riscv/include/asm/flushtlb.h @@ -41,8 +41,10 @@ static inline void page_set_tlbflush_timestamp(struct page_info *page) BUG_ON("unimplemented"); } -/* Flush specified CPUs' TLBs */ -void arch_flush_tlb_mask(const cpumask_t *mask); +static inline void arch_flush_tlb_mask(const cpumask_t *mask) +{ + sbi_remote_hfence_gvma(mask, 0, 0); +} #endif /* ASM__RISCV__FLUSHTLB_H */ diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h index fa55d8a3bc..b48693a2b4 100644 --- a/xen/arch/riscv/include/asm/p2m.h +++ b/xen/arch/riscv/include/asm/p2m.h @@ -111,6 +111,8 @@ typedef enum { p2m_mmio_direct_io, /* Read/write mapping of genuine Device MMIO area, PTE_PBMT_IO will be used for such mappings */ p2m_ext_storage, /* Following types'll be stored outsude PTE bits: */ + p2m_map_foreign_rw, /* Read/write RAM pages from foreign domain */ + p2m_map_foreign_ro, /* Read-only RAM pages from foreign domain */ /* Sentinel — not a real type, just a marker for comparison */ p2m_first_external = p2m_ext_storage, @@ -121,15 +123,28 @@ static inline p2m_type_t arch_dt_passthrough_p2m_type(void) return p2m_mmio_direct_io; } +/* + * Bits 8 and 9 are reserved for use by supervisor software; + * the implementation shall ignore this field. + * We are going to use to save in these bits frequently used types to avoid + * get/set of a type from radix tree. + */ +#define P2M_TYPE_PTE_BITS_MASK PTE_RSW + /* We use bitmaps and mask to handle groups of types */ #define p2m_to_mask(t) BIT(t, UL) /* RAM types, which map to real machine frames */ #define P2M_RAM_TYPES (p2m_to_mask(p2m_ram_rw)) +/* Foreign mappings types */ +#define P2M_FOREIGN_TYPES (p2m_to_mask(p2m_map_foreign_rw) | \ + p2m_to_mask(p2m_map_foreign_ro)) + /* Useful predicates */ #define p2m_is_ram(t) (p2m_to_mask(t) & P2M_RAM_TYPES) #define p2m_is_any_ram(t) (p2m_to_mask(t) & P2M_RAM_TYPES) +#define p2m_is_foreign(t) (p2m_to_mask(t) & P2M_FOREIGN_TYPES) #include diff --git a/xen/arch/riscv/include/asm/paging.h b/xen/arch/riscv/include/asm/paging.h index 01be45528f..fe462be223 100644 --- a/xen/arch/riscv/include/asm/paging.h +++ b/xen/arch/riscv/include/asm/paging.h @@ -13,4 +13,6 @@ int paging_freelist_adjust(struct domain *d, unsigned long pages, int paging_ret_to_domheap(struct domain *d, unsigned int nr_pages); int paging_refill_from_domheap(struct domain *d, unsigned int nr_pages); +void paging_free_page(struct domain *d, struct page_info *pg); + #endif /* ASM_RISCV_PAGING_H */ diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index c23926933f..9ab7262d70 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -356,6 +356,16 @@ int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted) return rc; } +static p2m_type_t p2m_get_type(const pte_t pte) +{ + p2m_type_t type = MASK_EXTR(pte.pte, P2M_TYPE_PTE_BITS_MASK); + + if ( type == p2m_ext_storage ) + panic("unimplemented\n"); + + return type; +} + static inline void p2m_write_pte(pte_t *p, pte_t pte, bool clean_cache) { write_pte(p, pte); @@ -412,11 +422,147 @@ static int p2m_next_level(struct p2m_domain *p2m, bool alloc_tbl, return P2M_TABLE_MAP_NONE; } +static void p2m_put_foreign_page(struct page_info *pg) +{ + /* + * It’s safe to call put_page() here because arch_flush_tlb_mask() + * will be invoked if the page is reallocated, which will trigger a + * flush of the guest TLBs. + */ + put_page(pg); +} + +static void p2m_put_4k_page(mfn_t mfn, p2m_type_t type) +{ + /* TODO: Handle other p2m types */ + + if ( p2m_is_foreign(type) ) + { + ASSERT(mfn_valid(mfn)); + p2m_put_foreign_page(mfn_to_page(mfn)); + } +} + +static void p2m_put_2m_superpage(mfn_t mfn, p2m_type_t type) +{ + struct page_info *pg; + unsigned int i; + + /* TODO: Handle other p2m types */ + if ( !p2m_is_foreign(type) ) + return; + + ASSERT(mfn_valid(mfn)); + + pg = mfn_to_page(mfn); + + /* + * PAGETABLE_ENTRIES is used instead of P2M_PAGETABLE_ENTRIES(1) because + * they are expected to be identical (this is verified in calc_offset()). + * This avoids having to pass p2m_domain here and throughout the call stack + * above solely for the sake of one macro. + */ + for ( i = 0; i < PAGETABLE_ENTRIES; i++, pg++ ) + p2m_put_foreign_page(pg); +} + +static void p2m_put_page(const pte_t pte, unsigned int level, p2m_type_t p2mt) +{ + mfn_t mfn = pte_get_mfn(pte); + + ASSERT(pte_is_valid(pte)); + + /* + * TODO: Currently we don't handle level 2 super-page, Xen is not + * preemptible and therefore some work is needed to handle such + * superpages, for which at some point Xen might end up freeing memory + * and therefore for such a big mapping it could end up in a very long + * operation. + */ + switch ( level ) + { + case 1: + return p2m_put_2m_superpage(mfn, p2mt); + + case 0: + return p2m_put_4k_page(mfn, p2mt); + + default: + ASSERT_UNREACHABLE(); + break; + } +} + +static void p2m_free_page(struct p2m_domain *p2m, struct page_info *pg) +{ + page_list_del(pg, &p2m->pages); + + paging_free_page(p2m->domain, pg); +} + /* Free pte sub-tree behind an entry */ static void p2m_free_subtree(struct p2m_domain *p2m, pte_t entry, unsigned int level) { - panic("%s: hasn't been implemented yet\n", __func__); + unsigned int i; + pte_t *table; + mfn_t mfn; + struct page_info *pg; + + /* + * Check if the level is valid: only 4K - 2M - 1G mappings are supported. + * To support levels > 2, the implementation of p2m_free_subtree() would + * need to be updated, as the current recursive approach could consume + * excessive time and memory. + */ + ASSERT(level <= P2M_MAX_SUPPORTED_LEVEL_MAPPING); + + /* Nothing to do if the entry is invalid. */ + if ( !pte_is_valid(entry) ) + return; + + if ( pte_is_mapping(entry) ) + { + p2m_type_t p2mt = p2m_get_type(entry); + +#ifdef CONFIG_IOREQ_SERVER + /* + * If this gets called then either the entry was replaced by an entry + * with a different base (valid case) or the shattering of a superpage + * has failed (error case). + * So, at worst, the spurious mapcache invalidation might be sent. + */ + if ( p2m_is_ram(p2mt) && + domain_has_ioreq_server(p2m->domain) ) + ioreq_request_mapcache_invalidate(p2m->domain); +#endif + + p2m_put_page(entry, level, p2mt); + + return; + } + + table = map_domain_page(pte_get_mfn(entry)); + + for ( i = 0; i < P2M_PAGETABLE_ENTRIES(p2m, level); i++ ) + p2m_free_subtree(p2m, table[i], level - 1); + + unmap_domain_page(table); + + /* + * Make sure all the references in the TLB have been removed before + * freing the intermediate page table. + * XXX: Should we defer the free of the page table to avoid the + * flush? + */ + p2m_tlb_flush_sync(p2m); + + mfn = pte_get_mfn(entry); + ASSERT(mfn_valid(mfn)); + + pg = mfn_to_page(mfn); + + p2m_free_page(p2m, pg); } /* Insert an entry in the p2m */ diff --git a/xen/arch/riscv/paging.c b/xen/arch/riscv/paging.c index d401ddc34e..09631c9894 100644 --- a/xen/arch/riscv/paging.c +++ b/xen/arch/riscv/paging.c @@ -109,6 +109,14 @@ int paging_ret_to_domheap(struct domain *d, unsigned int nr_pages) return 0; } +void paging_free_page(struct domain *d, struct page_info *pg) +{ + spin_lock(&d->arch.paging.lock); + page_list_add_tail(pg, &d->arch.paging.freelist); + d->arch.paging.total_pages++; + spin_unlock(&d->arch.paging.lock); +} + /* Domain paging struct initialization. */ int paging_domain_init(struct domain *d) { diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c index fe7d85ee1d..164fc091b2 100644 --- a/xen/arch/riscv/stubs.c +++ b/xen/arch/riscv/stubs.c @@ -65,11 +65,6 @@ int arch_monitor_domctl_event(struct domain *d, /* smp.c */ -void arch_flush_tlb_mask(const cpumask_t *mask) -{ - BUG_ON("unimplemented"); -} - void smp_send_event_check_mask(const cpumask_t *mask) { BUG_ON("unimplemented"); -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 14:44:44 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 14:44:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189748.1510451 (Exim 4.92) (envelope-from ) id 1vWFFE-0005Eo-Nx; Thu, 18 Dec 2025 14:44:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189748.1510451; Thu, 18 Dec 2025 14:44:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWFFE-0005Eg-LK; Thu, 18 Dec 2025 14:44:44 +0000 Received: by outflank-mailman (input) for mailman id 1189748; Thu, 18 Dec 2025 14:44:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWFFD-0005EX-Eh for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 14:44:43 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWFFD-00G1Fd-0R for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 14:44:43 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWFFD-008rIO-1D for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 14:44:43 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=9NCSm+IqdPzZH1EEiT3+uTySQ+MpWbGUprIP9tX5fcg=; b=S+heEiR3+EvHb4fBNEAWNC4gNU HYK0GUqiXzlFawbhggPQwUZibbiX+BtHmwmhQZFMD4BJcJ7YB+VyANxsQjV+GRISg0IouDCQdbg5S n/Hi5sxYsCw2/nqcYrwHKnpc5yQr/qoNCrgNdWD/J540UCX3lS6Tydg80h4jlUBdlpog=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/riscv: Implement p2m_pte_from_mfn() and support PBMT configuration Message-Id: Date: Thu, 18 Dec 2025 14:44:43 +0000 commit ff14053983b005d5de92b31574fda0fe86bf1842 Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:22 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 14:25:00 2025 +0100 xen/riscv: Implement p2m_pte_from_mfn() and support PBMT configuration This patch adds the initial logic for constructing PTEs from MFNs in the RISC-V p2m subsystem. It includes: - Implementation of p2m_pte_from_mfn(): Generates a valid PTE using the given MFN, p2m_type_t, including permission encoding and PBMT attribute setup. - New helper p2m_set_permission(): Encodes access rights (r, w, x) into the PTE based on both p2m type and access permissions. - p2m_set_type(): Stores the p2m type in PTE's bits. The storage of types, which don't fit PTE bits, will be implemented separately later. - Add detection of Svade extension to properly handle a possible page-fault if A and D bits aren't set. PBMT type encoding support: - Introduces an enum pbmt_type_t to represent the PBMT field values. - Maps types like p2m_mmio_direct_dev to p2m_mmio_direct_io, others default to pbmt_pma. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/cpufeature.c | 1 + xen/arch/riscv/include/asm/cpufeature.h | 1 + xen/arch/riscv/include/asm/page.h | 8 +++ xen/arch/riscv/p2m.c | 112 ++++++++++++++++++++++++++++++-- 4 files changed, 118 insertions(+), 4 deletions(-) diff --git a/xen/arch/riscv/cpufeature.c b/xen/arch/riscv/cpufeature.c index b846a106a3..02b68aeaa4 100644 --- a/xen/arch/riscv/cpufeature.c +++ b/xen/arch/riscv/cpufeature.c @@ -138,6 +138,7 @@ const struct riscv_isa_ext_data __initconst riscv_isa_ext[] = { RISCV_ISA_EXT_DATA(zbs), RISCV_ISA_EXT_DATA(smaia), RISCV_ISA_EXT_DATA(ssaia), + RISCV_ISA_EXT_DATA(svade), RISCV_ISA_EXT_DATA(svpbmt), }; diff --git a/xen/arch/riscv/include/asm/cpufeature.h b/xen/arch/riscv/include/asm/cpufeature.h index d42d7b294e..b696160388 100644 --- a/xen/arch/riscv/include/asm/cpufeature.h +++ b/xen/arch/riscv/include/asm/cpufeature.h @@ -37,6 +37,7 @@ enum riscv_isa_ext_id { RISCV_ISA_EXT_zbs, RISCV_ISA_EXT_smaia, RISCV_ISA_EXT_ssaia, + RISCV_ISA_EXT_svade, RISCV_ISA_EXT_svpbmt, RISCV_ISA_EXT_MAX }; diff --git a/xen/arch/riscv/include/asm/page.h b/xen/arch/riscv/include/asm/page.h index 1fc5998a0b..b7cd61df8d 100644 --- a/xen/arch/riscv/include/asm/page.h +++ b/xen/arch/riscv/include/asm/page.h @@ -73,6 +73,14 @@ #define PTE_SMALL BIT(10, UL) #define PTE_POPULATE BIT(11, UL) +enum pbmt_type { + pbmt_pma, + pbmt_nc, + pbmt_io, + pbmt_rsvd, + pbmt_count, +}; + #define PTE_ACCESS_MASK (PTE_READABLE | PTE_WRITABLE | PTE_EXECUTABLE) #define PTE_PBMT_MASK (PTE_PBMT_NOCACHE | PTE_PBMT_IO) diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index 9ab7262d70..48e75b1867 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -11,6 +11,7 @@ #include #include +#include #include #include #include @@ -356,6 +357,18 @@ int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted) return rc; } +static int p2m_set_type(pte_t *pte, p2m_type_t t) +{ + int rc = 0; + + if ( t > p2m_first_external ) + panic("unimplemeted\n"); + else + pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK); + + return rc; +} + static p2m_type_t p2m_get_type(const pte_t pte) { p2m_type_t type = MASK_EXTR(pte.pte, P2M_TYPE_PTE_BITS_MASK); @@ -386,11 +399,102 @@ static inline void p2m_clean_pte(pte_t *p, bool clean_cache) p2m_write_pte(p, pte, clean_cache); } -static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t) +static void p2m_set_permission(pte_t *e, p2m_type_t t) { - panic("%s: hasn't been implemented yet\n", __func__); + e->pte &= ~PTE_ACCESS_MASK; + + e->pte |= PTE_USER; + + /* + * Two schemes to manage the A and D bits are defined: + * • The Svade extension: when a virtual page is accessed and the A bit + * is clear, or is written and the D bit is clear, a page-fault + * exception is raised. + * • When the Svade extension is not implemented, the following scheme + * applies. + * When a virtual page is accessed and the A bit is clear, the PTE is + * updated to set the A bit. When the virtual page is written and the + * D bit is clear, the PTE is updated to set the D bit. When G-stage + * address translation is in use and is not Bare, the G-stage virtual + * pages may be accessed or written by implicit accesses to VS-level + * memory management data structures, such as page tables. + * Thereby to avoid a page-fault in case of Svade is available, it is + * necessary to set A and D bits. + * + * TODO: For now, it’s fine to simply set the A/D bits, since OpenSBI + * delegates page faults to a lower privilege mode and so OpenSBI + * isn't expect to handle page-faults occured in lower modes. + * By setting the A/D bits here, page faults that would otherwise + * be generated due to unset A/D bits will not occur in Xen. + * + * Currently, Xen on RISC-V does not make use of the information + * that could be obtained from handling such page faults, which + * could otherwise be useful for several use cases such as demand + * paging, cache-flushing optimizations, memory access tracking,etc. + * + * To support the more general case and the optimizations mentioned + * above, it would be better to stop setting the A/D bits here and + * instead handle page faults that occur due to unset A/D bits. + */ + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_svade) ) + e->pte |= PTE_ACCESSED | PTE_DIRTY; + + switch ( t ) + { + case p2m_map_foreign_rw: + case p2m_mmio_direct_io: + e->pte |= PTE_READABLE | PTE_WRITABLE; + break; + + case p2m_ram_rw: + e->pte |= PTE_ACCESS_MASK; + break; + + case p2m_invalid: + e->pte &= ~PTE_VALID; + break; + + case p2m_map_foreign_ro: + e->pte |= PTE_READABLE; + break; + + default: + ASSERT_UNREACHABLE(); + break; + } +} + +static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t, bool is_table) +{ + pte_t e = (pte_t) { PTE_VALID }; + + pte_set_mfn(&e, mfn); + + ASSERT(!(mfn_to_maddr(mfn) & ~PADDR_MASK) || mfn_eq(mfn, INVALID_MFN)); + + if ( !is_table ) + { + switch ( t ) + { + case p2m_mmio_direct_io: + e.pte |= PTE_PBMT_IO; + break; + + default: + break; + } + + p2m_set_permission(&e, t); + p2m_set_type(&e, t); + } + else + /* + * According to the spec and table "Encoding of PTE R/W/X fields": + * X=W=R=0 -> Pointer to next level of page table. + */ + e.pte &= ~PTE_ACCESS_MASK; - return (pte_t) { .pte = 0 }; + return e; } #define P2M_TABLE_MAP_NONE 0 @@ -645,7 +749,7 @@ static int p2m_set_entry(struct p2m_domain *p2m, p2m_clean_pte(entry, p2m->clean_dcache); else { - pte_t pte = p2m_pte_from_mfn(mfn, t); + pte_t pte = p2m_pte_from_mfn(mfn, t, false); p2m_write_pte(entry, pte, p2m->clean_dcache); -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 14:44:54 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 14:44:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189749.1510455 (Exim 4.92) (envelope-from ) id 1vWFFO-0005Hc-PS; Thu, 18 Dec 2025 14:44:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189749.1510455; Thu, 18 Dec 2025 14:44:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWFFO-0005HU-Ml; Thu, 18 Dec 2025 14:44:54 +0000 Received: by outflank-mailman (input) for mailman id 1189749; Thu, 18 Dec 2025 14:44:53 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWFFN-0005HM-Hs for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/riscv: implement p2m_next_level() Message-Id: Date: Thu, 18 Dec 2025 14:44:53 +0000 commit af87a609c79d30950150e8a3adecee8beff3169e Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:23 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 14:25:16 2025 +0100 xen/riscv: implement p2m_next_level() Implement the p2m_next_level() function, which enables traversal and dynamic allocation of intermediate levels (if necessary) in the RISC-V p2m (physical-to-machine) page table hierarchy. To support this, the following helpers are introduced: - page_to_p2m_table(): Constructs non-leaf PTEs pointing to next-level page tables with correct attributes. - p2m_alloc_page(): Allocates page table pages, supporting both hardware and guest domains. - p2m_create_table(): Allocates and initializes a new page table page and installs it into the hierarchy. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/include/asm/paging.h | 2 + xen/arch/riscv/p2m.c | 77 ++++++++++++++++++++++++++++++++++++- xen/arch/riscv/paging.c | 12 ++++++ 3 files changed, 89 insertions(+), 2 deletions(-) diff --git a/xen/arch/riscv/include/asm/paging.h b/xen/arch/riscv/include/asm/paging.h index fe462be223..c1d225d02b 100644 --- a/xen/arch/riscv/include/asm/paging.h +++ b/xen/arch/riscv/include/asm/paging.h @@ -15,4 +15,6 @@ int paging_refill_from_domheap(struct domain *d, unsigned int nr_pages); void paging_free_page(struct domain *d, struct page_info *pg); +struct page_info *paging_alloc_page(struct domain *d); + #endif /* ASM_RISCV_PAGING_H */ diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index 48e75b1867..9e1a660316 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -357,6 +357,19 @@ int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted) return rc; } +static struct page_info *p2m_alloc_page(struct p2m_domain *p2m) +{ + struct page_info *pg = paging_alloc_page(p2m->domain); + + if ( pg ) + { + page_list_add(pg, &p2m->pages); + clear_and_clean_page(pg, p2m->clean_dcache); + } + + return pg; +} + static int p2m_set_type(pte_t *pte, p2m_type_t t) { int rc = 0; @@ -497,6 +510,33 @@ static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t, bool is_table) return e; } +/* Generate table entry with correct attributes. */ +static pte_t page_to_p2m_table(const struct page_info *page) +{ + /* + * p2m_invalid will be ignored inside p2m_pte_from_mfn() as is_table is + * set to true and p2m_type_t shouldn't be applied for PTEs which + * describe an intermediate table. + */ + return p2m_pte_from_mfn(page_to_mfn(page), p2m_invalid, true); +} + +/* Allocate a new page table page and hook it in via the given entry. */ +static int p2m_create_table(struct p2m_domain *p2m, pte_t *entry) +{ + struct page_info *page; + + ASSERT(!pte_is_valid(*entry)); + + page = p2m_alloc_page(p2m); + if ( page == NULL ) + return -ENOMEM; + + p2m_write_pte(entry, page_to_p2m_table(page), p2m->clean_dcache); + + return 0; +} + #define P2M_TABLE_MAP_NONE 0 #define P2M_TABLE_MAP_NOMEM 1 #define P2M_TABLE_SUPER_PAGE 2 @@ -521,9 +561,42 @@ static int p2m_next_level(struct p2m_domain *p2m, bool alloc_tbl, unsigned int level, pte_t **table, unsigned int offset) { - panic("%s: hasn't been implemented yet\n", __func__); + pte_t *entry; + mfn_t mfn; + + /* The function p2m_next_level() is never called at the last level */ + ASSERT(level != 0); + + entry = *table + offset; + + if ( !pte_is_valid(*entry) ) + { + int ret; + + if ( !alloc_tbl ) + return P2M_TABLE_MAP_NONE; + + ret = p2m_create_table(p2m, entry); + if ( ret ) + return P2M_TABLE_MAP_NOMEM; + } + + if ( pte_is_mapping(*entry) ) + return P2M_TABLE_SUPER_PAGE; + + mfn = mfn_from_pte(*entry); + + unmap_domain_page(*table); + + /* + * TODO: There's an inefficiency here: + * In p2m_create_table(), the page is mapped to clear it. + * Then that mapping is torn down in p2m_create_table(), + * only to be re-established here. + */ + *table = map_domain_page(mfn); - return P2M_TABLE_MAP_NONE; + return P2M_TABLE_NORMAL; } static void p2m_put_foreign_page(struct page_info *pg) diff --git a/xen/arch/riscv/paging.c b/xen/arch/riscv/paging.c index 09631c9894..76a203edbb 100644 --- a/xen/arch/riscv/paging.c +++ b/xen/arch/riscv/paging.c @@ -117,6 +117,18 @@ void paging_free_page(struct domain *d, struct page_info *pg) spin_unlock(&d->arch.paging.lock); } +struct page_info *paging_alloc_page(struct domain *d) +{ + struct page_info *pg; + + spin_lock(&d->arch.paging.lock); + pg = page_list_remove_head(&d->arch.paging.freelist); + d->arch.paging.total_pages--; + spin_unlock(&d->arch.paging.lock); + + return pg; +} + /* Domain paging struct initialization. */ int paging_domain_init(struct domain *d) { -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 14:45:04 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 14:45:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189750.1510459 (Exim 4.92) (envelope-from ) id 1vWFFY-0005Jk-RF; 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Thu, 18 Dec 2025 14:45:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=CoQ3xz9jXLbBmd4fSbWLiUN0V+oJW4lNDudUjN060gc=; b=Q+CYZljnZCF9jPe2p02BHXANLs bUvUjEtci/fPDp0Hl3MYEEckiw4CP1ng+rxnqttVwWc84+MADykNuNB9N81xkuuuaYZkuSAScxNRe yb7V8EtSOX2NH6JcGCS3T0Lq/ErleVZz1umxzlMPJr4VGoD5GVaCgIJTqpjriX8o1aMk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/riscv: Implement superpage splitting for p2m mappings Message-Id: Date: Thu, 18 Dec 2025 14:45:03 +0000 commit 72a516613f459f56ffb7e80395886c1f6707ef74 Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:24 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 14:25:37 2025 +0100 xen/riscv: Implement superpage splitting for p2m mappings Add support for down large memory mappings ("superpages") in the RISC-V p2m mapping so that smaller, more precise mappings ("finer-grained entries") can be inserted into lower levels of the page table hierarchy. To implement that the following is done: - Introduce p2m_split_superpage(): Recursively shatters a superpage into smaller page table entries down to the target level, preserving original permissions and attributes. - p2m_set_entry() updated to invoke superpage splitting when inserting entries at lower levels within a superpage-mapped region. This implementation is based on the ARM code, with modifications to the part that follows the BBM (break-before-make) approach, some parts are simplified as according to RISC-V spec: It is permitted for multiple address-translation cache entries to co-exist for the same address. This represents the fact that in a conventional TLB hierarchy, it is possible for multiple entries to match a single address if, for example, a page is upgraded to a superpage without first clearing the original non-leaf PTE’s valid bit and executing an SFENCE.VMA with rs1=x0, or if multiple TLBs exist in parallel at a given level of the hierarchy. In this case, just as if an SFENCE.VMA is not executed between a write to the memory-management tables and subsequent implicit read of the same address: it is unpredictable whether the old non-leaf PTE or the new leaf PTE is used, but the behavior is otherwise well defined. In contrast to the Arm architecture, where BBM is mandatory and failing to use it in some cases can lead to CPU instability, RISC-V guarantees stability, and the behavior remains safe — though unpredictable in terms of which translation will be used. Additionally, the page table walk logic has been adjusted, as ARM uses the opposite level numbering compared to RISC-V. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/include/asm/page.h | 5 ++ xen/arch/riscv/p2m.c | 116 +++++++++++++++++++++++++++++++++++++- 2 files changed, 119 insertions(+), 2 deletions(-) diff --git a/xen/arch/riscv/include/asm/page.h b/xen/arch/riscv/include/asm/page.h index b7cd61df8d..b465a90325 100644 --- a/xen/arch/riscv/include/asm/page.h +++ b/xen/arch/riscv/include/asm/page.h @@ -190,6 +190,11 @@ static inline bool pte_is_mapping(pte_t p) return (p.pte & PTE_VALID) && (p.pte & PTE_ACCESS_MASK); } +static inline bool pte_is_superpage(pte_t p, unsigned int level) +{ + return (level > 0) && pte_is_mapping(p); +} + static inline int clean_and_invalidate_dcache_va_range(const void *p, unsigned long size) { diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index 9e1a660316..8d572f838f 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -742,7 +742,88 @@ static void p2m_free_subtree(struct p2m_domain *p2m, p2m_free_page(p2m, pg); } -/* Insert an entry in the p2m */ +static bool p2m_split_superpage(struct p2m_domain *p2m, pte_t *entry, + unsigned int level, unsigned int target, + const unsigned int *offsets) +{ + struct page_info *page; + unsigned long i; + pte_t pte, *table; + bool rv = true; + + /* Convenience aliases */ + mfn_t mfn = pte_get_mfn(*entry); + unsigned int next_level = level - 1; + unsigned int level_order = P2M_LEVEL_ORDER(next_level); + + /* + * This should only be called with target != level and the entry is + * a superpage. + */ + ASSERT(level > target); + ASSERT(pte_is_superpage(*entry, level)); + + page = p2m_alloc_page(p2m); + if ( !page ) + { + /* + * The caller is in charge to free the sub-tree. + * As we didn't manage to allocate anything, just tell the + * caller there is nothing to free by invalidating the PTE. + */ + memset(entry, 0, sizeof(*entry)); + return false; + } + + table = __map_domain_page(page); + + for ( i = 0; i < P2M_PAGETABLE_ENTRIES(p2m, next_level); i++ ) + { + pte_t *new_entry = table + i; + + /* + * Use the content of the superpage entry and override + * the necessary fields. So the correct attributes are kept. + */ + pte = *entry; + pte_set_mfn(&pte, mfn_add(mfn, i << level_order)); + + write_pte(new_entry, pte); + } + + /* + * Shatter superpage in the page to the level we want to make the + * changes. + * This is done outside the loop to avoid checking the offset + * for every entry to know whether the entry should be shattered. + */ + if ( next_level != target ) + rv = p2m_split_superpage(p2m, table + offsets[next_level], + next_level, target, offsets); + + if ( p2m->clean_dcache ) + clean_dcache_va_range(table, PAGE_SIZE); + + /* + * TODO: an inefficiency here: the caller almost certainly wants to map + * the same page again, to update the one entry that caused the + * request to shatter the page. + */ + unmap_domain_page(table); + + /* + * Even if we failed, we should (according to the current implemetation + * of a way how sub-tree is freed if p2m_split_superpage hasn't been + * finished fully) install the newly allocated PTE + * entry. + * The caller will be in charge to free the sub-tree. + */ + p2m_write_pte(entry, page_to_p2m_table(page), p2m->clean_dcache); + + return rv; +} + +/* Insert an entry in the p2m. */ static int p2m_set_entry(struct p2m_domain *p2m, gfn_t gfn, unsigned long page_order, @@ -807,7 +888,38 @@ static int p2m_set_entry(struct p2m_domain *p2m, */ if ( level > target ) { - panic("Shattering isn't implemented\n"); + /* We need to split the original page. */ + pte_t split_pte = *entry; + + ASSERT(pte_is_superpage(*entry, level)); + + if ( !p2m_split_superpage(p2m, &split_pte, level, target, offsets) ) + { + /* Free the allocated sub-tree */ + p2m_free_subtree(p2m, split_pte, level); + + rc = -ENOMEM; + goto out; + } + + p2m_write_pte(entry, split_pte, p2m->clean_dcache); + + p2m->need_flush = true; + + /* Then move to the level we want to make real changes */ + for ( ; level > target; level-- ) + { + rc = p2m_next_level(p2m, true, level, &table, offsets[level]); + + /* + * The entry should be found and either be a table + * or a superpage if level 0 is not targeted + */ + ASSERT(rc == P2M_TABLE_NORMAL || + (rc == P2M_TABLE_SUPER_PAGE && target > 0)); + } + + entry = table + offsets[level]; } /* -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 14:45:14 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 14:45:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189751.1510463 (Exim 4.92) (envelope-from ) id 1vWFFi-0005MH-Uv; Thu, 18 Dec 2025 14:45:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189751.1510463; Thu, 18 Dec 2025 14:45:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWFFi-0005M9-Rp; Thu, 18 Dec 2025 14:45:14 +0000 Received: by outflank-mailman (input) for mailman id 1189751; Thu, 18 Dec 2025 14:45:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWFFh-0005M3-NP for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 14:45:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWFFh-00G1Ga-1K for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 14:45:13 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWFFh-008vAQ-28 for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 14:45:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=jWOPE8jSIAp0b+cs24iUHFbgP46w87rWfXWN9m2Vla8=; b=261Nlkc4UpsV5ArOGJXSOxVDk3 q4cIQFt+w6tlpVm7l1zmqbPpsoVC4K9vZGjGMP8e7lsg1NKvIhHAp6C5GX9GFaz53QtuJOX9ZBwSz DEcztQ2DNKLwcqF+2k+OaTg/quo/6p7fwf665AVvkoJ28JrG+8Zp6kaNVpQQIOGqs+bI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/riscv: implement put_page() Message-Id: Date: Thu, 18 Dec 2025 14:45:13 +0000 commit 71fc690ee7d985d92aa13610f00dd80c7bc48d6f Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:25 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 14:25:50 2025 +0100 xen/riscv: implement put_page() Implement put_page(), as it will be used by p2m_put_*-related code. Although CONFIG_STATIC_MEMORY has not yet been introduced for RISC-V, a stub for PGC_static is added to avoid cluttering the code of put_page() with #ifdefs. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/include/asm/mm.h | 7 +++++++ xen/arch/riscv/mm.c | 24 +++++++++++++++++++----- 2 files changed, 26 insertions(+), 5 deletions(-) diff --git a/xen/arch/riscv/include/asm/mm.h b/xen/arch/riscv/include/asm/mm.h index 2f7927e6f4..08f500c99d 100644 --- a/xen/arch/riscv/include/asm/mm.h +++ b/xen/arch/riscv/include/asm/mm.h @@ -264,6 +264,13 @@ static inline bool arch_mfns_in_directmap(unsigned long mfn, unsigned long nr) /* Page is Xen heap? */ #define _PGC_xen_heap PG_shift(2) #define PGC_xen_heap PG_mask(1, 2) +#ifdef CONFIG_STATIC_MEMORY +/* Page is static memory */ +#define _PGC_static PG_shift(3) +#define PGC_static PG_mask(1, 3) +#else +#define PGC_static 0 +#endif /* Page is broken? */ #define _PGC_broken PG_shift(7) #define PGC_broken PG_mask(1, 7) diff --git a/xen/arch/riscv/mm.c b/xen/arch/riscv/mm.c index 1ef015f179..2e42293986 100644 --- a/xen/arch/riscv/mm.c +++ b/xen/arch/riscv/mm.c @@ -362,11 +362,6 @@ unsigned long __init calc_phys_offset(void) return phys_offset; } -void put_page(struct page_info *page) -{ - BUG_ON("unimplemented"); -} - void arch_dump_shared_mem_info(void) { BUG_ON("unimplemented"); @@ -627,3 +622,22 @@ void flush_page_to_ram(unsigned long mfn, bool sync_icache) if ( sync_icache ) invalidate_icache(); } + +void put_page(struct page_info *page) +{ + unsigned long nx, x, y = page->count_info; + + do { + ASSERT((y & PGC_count_mask) >= 1); + x = y; + nx = x - 1; + } while ( unlikely((y = cmpxchg(&page->count_info, x, nx)) != x) ); + + if ( unlikely((nx & PGC_count_mask) == 0) ) + { + if ( unlikely(nx & PGC_static) ) + free_domstatic_page(page); + else + free_domheap_page(page); + } +} -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 14:45:26 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 14:45:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189752.1510467 (Exim 4.92) (envelope-from ) id 1vWFFt-0005ON-Vs; Thu, 18 Dec 2025 14:45:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189752.1510467; Thu, 18 Dec 2025 14:45:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWFFt-0005OE-TH; Thu, 18 Dec 2025 14:45:25 +0000 Received: by outflank-mailman (input) for mailman id 1189752; Thu, 18 Dec 2025 14:45:23 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWFFr-0005Nz-QY for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 14:45:23 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWFFr-00G1Gm-1d for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 14:45:23 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWFFr-008wLs-2T for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 14:45:23 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=TTzKjJBMTYxKnsTxTTIRfJhhMso0KEp3nOcaghGGENs=; b=45Ct5rjONSORTbw1xhH6yZKSxt RfctAHxvSX3KevDUTK0croVGPw2LowPIITrBdp5FpygazfeC178TM6icdhrdlNkT/LPmP+rSMkbRq K/VxGstVELUvLlsb7FltskShGaUwGhpgM11HGjphCFCv9kbz9+C7wvg2X4elrUOgaYVA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/riscv: implement mfn_valid() and page reference, ownership handling helpers Message-Id: Date: Thu, 18 Dec 2025 14:45:23 +0000 commit e98811b97a8a373fac0e9a2a64516360e7c37ec3 Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:26 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 14:26:03 2025 +0100 xen/riscv: implement mfn_valid() and page reference, ownership handling helpers Implement the mfn_valid() macro to verify whether a given MFN is valid by checking that it falls within the range [start_page, max_page). These bounds are initialized based on the start and end addresses of RAM. As part of this patch, start_page is introduced and initialized with the PFN of the first RAM page. Also, initialize pdx_group_valid() by calling set_pdx_range() when memory banks are being mapped. Also, after providing a non-stub implementation of the mfn_valid() macro, the following compilation errors started to occur: riscv64-linux-gnu-ld: prelink.o: in function `alloc_heap_pages': /build/xen/common/page_alloc.c:1054: undefined reference to `page_is_offlinable' riscv64-linux-gnu-ld: /build/xen/common/page_alloc.c:1035: undefined reference to `page_is_offlinable' riscv64-linux-gnu-ld: prelink.o: in function `reserve_offlined_page': /build/xen/common/page_alloc.c:1151: undefined reference to `page_is_offlinable' riscv64-linux-gnu-ld: ./.xen-syms.0: hidden symbol `page_is_offlinable' isn't defined riscv64-linux-gnu-ld: final link failed: bad value make[2]: *** [arch/riscv/Makefile:28: xen-syms] Error 1 To resolve these errors, the following functions have also been introduced, based on their Arm counterparts: - page_get_owner_and_reference() and its variant to safely acquire a reference to a page and retrieve its owner. - Implement page_is_offlinable() to return false for RISC-V. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/include/asm/mm.h | 9 +++++++-- xen/arch/riscv/mm.c | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 39 insertions(+), 2 deletions(-) diff --git a/xen/arch/riscv/include/asm/mm.h b/xen/arch/riscv/include/asm/mm.h index 08f500c99d..1a99e1cf0a 100644 --- a/xen/arch/riscv/include/asm/mm.h +++ b/xen/arch/riscv/include/asm/mm.h @@ -5,6 +5,7 @@ #include #include +#include #include #include #include @@ -300,8 +301,12 @@ static inline bool arch_mfns_in_directmap(unsigned long mfn, unsigned long nr) #define page_get_owner(p) (p)->v.inuse.domain #define page_set_owner(p, d) ((p)->v.inuse.domain = (d)) -/* TODO: implement */ -#define mfn_valid(mfn) ({ (void)(mfn); 0; }) +extern unsigned long start_page; + +#define mfn_valid(mfn) ({ \ + unsigned long tmp_mfn = mfn_x(mfn); \ + likely((tmp_mfn >= start_page)) && likely(__mfn_valid(tmp_mfn)); \ +}) #define PFN_ORDER(pg) ((pg)->v.free.order) diff --git a/xen/arch/riscv/mm.c b/xen/arch/riscv/mm.c index 2e42293986..e25f995b72 100644 --- a/xen/arch/riscv/mm.c +++ b/xen/arch/riscv/mm.c @@ -521,6 +521,8 @@ static void __init setup_directmap_mappings(unsigned long base_mfn, #error setup_{directmap,frametable}_mapping() should be implemented for RV_32 #endif +unsigned long __ro_after_init start_page; + /* * Setup memory management * @@ -570,9 +572,13 @@ void __init setup_mm(void) ram_end = max(ram_end, bank_end); setup_directmap_mappings(PFN_DOWN(bank_start), PFN_DOWN(bank_size)); + + set_pdx_range(paddr_to_pfn(bank_start), paddr_to_pfn(bank_end)); } setup_frametable_mappings(ram_start, ram_end); + + start_page = PFN_DOWN(ram_start); max_page = PFN_DOWN(ram_end); } @@ -623,6 +629,11 @@ void flush_page_to_ram(unsigned long mfn, bool sync_icache) invalidate_icache(); } +bool page_is_offlinable(mfn_t mfn) +{ + return false; +} + void put_page(struct page_info *page) { unsigned long nx, x, y = page->count_info; @@ -641,3 +652,24 @@ void put_page(struct page_info *page) free_domheap_page(page); } } + +struct domain *page_get_owner_and_reference(struct page_info *page) +{ + unsigned long x, y = page->count_info; + struct domain *owner; + + do { + x = y; + /* + * Count == 0: Page is not allocated, so we cannot take a reference. + * Count == -1: Reference count would wrap, which is invalid. + */ + if ( unlikely(((x + 1) & PGC_count_mask) <= 1) ) + return NULL; + } while ( (y = cmpxchg(&page->count_info, x, x + 1)) != x ); + + owner = page_get_owner(page); + ASSERT(owner); + + return owner; +} -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 15:44:05 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 15:44:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189857.1510561 (Exim 4.92) (envelope-from ) id 1vWGAd-0000ph-7b; Thu, 18 Dec 2025 15:44:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189857.1510561; Thu, 18 Dec 2025 15:44:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWGAd-0000pZ-53; Thu, 18 Dec 2025 15:44:03 +0000 Received: by outflank-mailman (input) for mailman id 1189857; Thu, 18 Dec 2025 15:44:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWGAc-0000pT-Is for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/dom0less: abstract Arm-specific p2m type name for device MMIO mappings Message-Id: Date: Thu, 18 Dec 2025 15:44:02 +0000 commit 5bcbcc2565775eb21d052fa2befdffbc63c0ea41 Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:18 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 14:23:42 2025 +0100 xen/dom0less: abstract Arm-specific p2m type name for device MMIO mappings Introduce arch_dt_passthrough_p2m_type() and use it instead of `p2m_mmio_direct_dev` to avoid leaking Arm-specific naming into common Xen code, such as dom0less passthrough property handling. This helps reduce platform-specific terminology in shared logic and improves clarity for future non-Arm ports (e.g. RISC-V or PowerPC). No functional changes — the definition is preserved via a static inline function for Arm. Suggested-by: Jan Beulich Signed-off-by: Oleksii Kurochko Reviewed-by: Michal Orzel --- xen/arch/arm/include/asm/p2m.h | 5 +++++ xen/common/device-tree/dom0less-build.c | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h index ef98bc5f4d..010ce8c9eb 100644 --- a/xen/arch/arm/include/asm/p2m.h +++ b/xen/arch/arm/include/asm/p2m.h @@ -137,6 +137,11 @@ typedef enum { p2m_max_real_type, /* Types after this won't be store in the p2m */ } p2m_type_t; +static inline p2m_type_t arch_dt_passthrough_p2m_type(void) +{ + return p2m_mmio_direct_dev; +} + /* We use bitmaps and mask to handle groups of types */ #define p2m_to_mask(_t) (1UL << (_t)) diff --git a/xen/common/device-tree/dom0less-build.c b/xen/common/device-tree/dom0less-build.c index 2600350a3c..495ef7b16a 100644 --- a/xen/common/device-tree/dom0less-build.c +++ b/xen/common/device-tree/dom0less-build.c @@ -185,7 +185,7 @@ static int __init handle_passthrough_prop(struct kernel_info *kinfo, gaddr_to_gfn(gstart), PFN_DOWN(size), maddr_to_mfn(mstart), - p2m_mmio_direct_dev); + arch_dt_passthrough_p2m_type()); if ( res < 0 ) { printk(XENLOG_ERR -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 15:44:14 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 15:44:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189858.1510566 (Exim 4.92) (envelope-from ) id 1vWGAn-0000ro-9W; Thu, 18 Dec 2025 15:44:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189858.1510566; Thu, 18 Dec 2025 15:44:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWGAn-0000rc-6U; Thu, 18 Dec 2025 15:44:13 +0000 Received: by outflank-mailman (input) for mailman id 1189858; Thu, 18 Dec 2025 15:44:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWGAm-0000rV-Lf for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 15:44:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWGAm-00G2Un-19 for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 15:44:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWGAm-00GVyX-1j for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 15:44:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=/vU19ooLHYaXcrTuzdos7gVEi2lY8d7wnMySzAtp9FI=; b=3FU7YIqt7qVEPRlb4/0bbwwuW0 GQH1EKj5zOC2YM3IsgGFkSLAqcHNNAyrDcHyZrgp5oRMNWcJLFFHLFEqZ2P2GXTaA1SQgv8oxcGhk 1J+LYVu0bHIujkFfeOcEfjaXZcRfHkc4cz5U/2CeUe88voHFepVGPoGDI5y54bfQ657k=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/riscv: implement function to map memory in guest p2m Message-Id: Date: Thu, 18 Dec 2025 15:44:12 +0000 commit 96553849a32e5240e444db09b92c559480faffa0 Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:19 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 14:24:17 2025 +0100 xen/riscv: implement function to map memory in guest p2m Implement map_regions_p2mt() to map a region in the guest p2m with a specific p2m type. The memory attributes will be derived from the p2m type. This function is used in dom0less common code. To implement it, introduce: - p2m_write_(un)lock() to ensure safe concurrent updates to the P2M. As part of this change, introduce p2m_tlb_flush_sync() and p2m_force_tlb_flush_sync(). - A stub for p2m_set_range() to map a range of GFNs to MFNs. - p2m_insert_mapping(). - p2m_is_write_locked(). Drop guest_physmap_add_entry() and call map_regions_p2mt() directly from guest_physmap_add_page(), making guest_physmap_add_entry() unnecessary. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/include/asm/p2m.h | 31 +++++++++++++++------ xen/arch/riscv/p2m.c | 60 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 82 insertions(+), 9 deletions(-) diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h index 1c89838408..9acd6a64a8 100644 --- a/xen/arch/riscv/include/asm/p2m.h +++ b/xen/arch/riscv/include/asm/p2m.h @@ -128,21 +128,22 @@ static inline int guest_physmap_mark_populate_on_demand(struct domain *d, return -EOPNOTSUPP; } -static inline int guest_physmap_add_entry(struct domain *d, - gfn_t gfn, mfn_t mfn, - unsigned long page_order, - p2m_type_t t) -{ - BUG_ON("unimplemented"); - return -EINVAL; -} +/* + * Map a region in the guest's hostp2m p2m with a specific p2m type. + * The memory attributes will be derived from the p2m type. + */ +int map_regions_p2mt(struct domain *d, + gfn_t gfn, + unsigned long nr, + mfn_t mfn, + p2m_type_t p2mt); /* Untyped version for RAM only, for compatibility */ static inline int __must_check guest_physmap_add_page(struct domain *d, gfn_t gfn, mfn_t mfn, unsigned int page_order) { - return guest_physmap_add_entry(d, gfn, mfn, page_order, p2m_ram_rw); + return map_regions_p2mt(d, gfn, BIT(page_order, UL), mfn, p2m_ram_rw); } static inline mfn_t gfn_to_mfn(struct domain *d, gfn_t gfn) @@ -166,6 +167,18 @@ unsigned char get_max_supported_mode(void); int p2m_init(struct domain *d); +static inline void p2m_write_lock(struct p2m_domain *p2m) +{ + write_lock(&p2m->lock); +} + +void p2m_write_unlock(struct p2m_domain *p2m); + +static inline bool p2m_is_write_locked(struct p2m_domain *p2m) +{ + return rw_is_write_locked(&p2m->lock); +} + unsigned long construct_hgatp(const struct p2m_domain *p2m, uint16_t vmid); #endif /* ASM__RISCV__P2M_H */ diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index d14757331f..8bb197f9b3 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -110,6 +110,41 @@ void __init guest_mm_init(void) local_hfence_gvma_all(); } +/* + * Force a synchronous P2M TLB flush. + * + * Must be called with the p2m lock held. + */ +static void p2m_tlb_flush(struct p2m_domain *p2m) +{ + const struct domain *d = p2m->domain; + + ASSERT(p2m_is_write_locked(p2m)); + + p2m->need_flush = false; + + sbi_remote_hfence_gvma(d->dirty_cpumask, 0, 0); +} + +void p2m_tlb_flush_sync(struct p2m_domain *p2m) +{ + if ( p2m->need_flush ) + p2m_tlb_flush(p2m); +} + +/* Unlock the P2M and do a P2M TLB flush if necessary */ +void p2m_write_unlock(struct p2m_domain *p2m) +{ + /* + * The final flush is done with the P2M write lock taken to avoid + * someone else modifying the P2M before the TLB invalidation has + * completed. + */ + p2m_tlb_flush_sync(p2m); + + write_unlock(&p2m->lock); +} + static void clear_and_clean_page(struct page_info *page, bool clean_dcache) { void *p = __map_domain_page(page); @@ -238,3 +273,28 @@ int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted) return rc; } + +static int p2m_set_range(struct p2m_domain *p2m, + gfn_t sgfn, + unsigned long nr, + mfn_t smfn, + p2m_type_t t) +{ + return -EOPNOTSUPP; +} + +int map_regions_p2mt(struct domain *d, + gfn_t gfn, + unsigned long nr, + mfn_t mfn, + p2m_type_t p2mt) +{ + struct p2m_domain *p2m = p2m_get_hostp2m(d); + int rc; + + p2m_write_lock(p2m); + rc = p2m_set_range(p2m, gfn, nr, mfn, p2mt); + p2m_write_unlock(p2m); + + return rc; +} -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 15:44:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 15:44:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189859.1510569 (Exim 4.92) (envelope-from ) id 1vWGAx-0000tr-Ao; Thu, 18 Dec 2025 15:44:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189859.1510569; Thu, 18 Dec 2025 15:44:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWGAx-0000tj-7x; Thu, 18 Dec 2025 15:44:23 +0000 Received: by outflank-mailman (input) for mailman id 1189859; Thu, 18 Dec 2025 15:44:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWGAw-0000td-Ok for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/riscv: implement p2m_set_range() Message-Id: Date: Thu, 18 Dec 2025 15:44:22 +0000 commit fcd6755606361c3b5a409b5cd4b2a641de2feb71 Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:20 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 14:24:32 2025 +0100 xen/riscv: implement p2m_set_range() This patch introduces p2m_set_range() and its core helper p2m_set_entry() for RISC-V, based loosely on the Arm implementation, with several RISC-V-specific modifications. The main changes are: - Simplification of Break-Before-Make (BBM) approach as according to RISC-V spec: It is permitted for multiple address-translation cache entries to co-exist for the same address. This represents the fact that in a conventional TLB hierarchy, it is possible for multiple entries to match a single address if, for example, a page is upgraded to a superpage without first clearing the original non-leaf PTE’s valid bit and executing an SFENCE.VMA with rs1=x0, or if multiple TLBs exist in parallel at a given level of the hierarchy. In this case, just as if an SFENCE.VMA is not executed between a write to the memory-management tables and subsequent implicit read of the same address: it is unpredictable whether the old non-leaf PTE or the new leaf PTE is used, but the behavior is otherwise well defined. In contrast to the Arm architecture, where BBM is mandatory and failing to use it in some cases can lead to CPU instability, RISC-V guarantees stability, and the behavior remains safe — though unpredictable in terms of which translation will be used. - Unlike Arm, the valid bit is not repurposed for other uses in this implementation. Instead, entry validity is determined based solely on P2M PTE's valid bit. The main functionality is in p2m_set_entry(), which handles mappings aligned to page table block entries (e.g., 1GB, 2MB, or 4KB with 4KB granularity). p2m_set_range() breaks a region down into block-aligned mappings and calls p2m_set_entry() accordingly. Stub implementations (to be completed later) include: - p2m_free_subtree() - p2m_next_level() - p2m_pte_from_mfn() Note: Support for shattering block entries is not implemented in this patch and will be added separately. Additionally, some straightforward helper functions are now implemented: - p2m_write_pte() - p2m_remove_pte() - p2m_get_root_pointer() Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/include/asm/p2m.h | 38 +++++ xen/arch/riscv/p2m.c | 326 ++++++++++++++++++++++++++++++++++++++- 2 files changed, 363 insertions(+), 1 deletion(-) diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h index 9acd6a64a8..fa55d8a3bc 100644 --- a/xen/arch/riscv/include/asm/p2m.h +++ b/xen/arch/riscv/include/asm/p2m.h @@ -8,10 +8,38 @@ #include #include +#include #include #define P2M_ROOT_ORDER (ilog2(GSTAGE_ROOT_PAGE_TABLE_SIZE) - PAGE_SHIFT) #define P2M_ROOT_PAGES BIT(P2M_ROOT_ORDER, U) +#define P2M_ROOT_LEVEL(p2m) ((p2m)->mode.paging_levels) + +/* + * According to the RISC-V spec: + * When hgatp.MODE specifies a translation scheme of Sv32x4, Sv39x4, Sv48x4, + * or Sv57x4, G-stage address translation is a variation on the usual + * page-based virtual address translation scheme of Sv32, Sv39, Sv48, or + * Sv57, respectively. In each case, the size of the incoming address is + * widened by 2 bits (to 34, 41, 50, or 59 bits). + * + * P2M_LEVEL_ORDER(lvl) defines the bit position in the GFN from which + * the index for this level of the P2M page table starts. The extra 2 + * bits added by the "x4" schemes only affect the root page table width. + * + * Therefore, this macro can safely reuse XEN_PT_LEVEL_ORDER() for all + * levels: the extra 2 bits do not change the indices of lower levels. + */ +#define P2M_LEVEL_ORDER(lvl) XEN_PT_LEVEL_ORDER(lvl) + +#define P2M_ROOT_EXTRA_BITS(p2m, lvl) (2 * ((lvl) == P2M_ROOT_LEVEL(p2m))) + +#define P2M_PAGETABLE_ENTRIES(p2m, lvl) \ + (BIT(PAGETABLE_ORDER + P2M_ROOT_EXTRA_BITS(p2m, lvl), UL)) + +#define P2M_TABLE_OFFSET(p2m, lvl) (P2M_PAGETABLE_ENTRIES(p2m, lvl) - 1UL) + +#define P2M_GFN_LEVEL_SHIFT(lvl) (P2M_LEVEL_ORDER(lvl) + PAGE_SHIFT) #define paddr_bits PADDR_BITS @@ -58,6 +86,16 @@ struct p2m_domain { * when a page is needed to be fully cleared and cleaned. */ bool clean_dcache; + + /* Highest guest frame that's ever been mapped in the p2m */ + gfn_t max_mapped_gfn; + + /* + * Lowest mapped gfn in the p2m. When releasing mapped gfn's in a + * preemptible manner this is updated to track where to resume + * the search. Apart from during teardown this can only decrease. + */ + gfn_t lowest_mapped_gfn; }; /* diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index 8bb197f9b3..c23926933f 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include @@ -17,6 +18,13 @@ #include #include +/* + * At the moment, only 4K, 2M, and 1G mappings are supported for G-stage + * translation. Therefore, the maximum supported page-table level is 2, + * which corresponds to 1G mappings. + */ +#define P2M_MAX_SUPPORTED_LEVEL_MAPPING _AC(2, U) + static struct gstage_mode_desc __ro_after_init max_gstage_mode = { .mode = HGATP_MODE_OFF, .paging_levels = 0, @@ -28,6 +36,77 @@ unsigned char get_max_supported_mode(void) return max_gstage_mode.mode; } +static inline unsigned int calc_offset(const struct p2m_domain *p2m, + const unsigned int lvl, + const paddr_t gpa) +{ + unsigned int off = (gpa >> P2M_GFN_LEVEL_SHIFT(lvl)) & + P2M_TABLE_OFFSET(p2m, lvl); + + /* + * For P2M_ROOT_LEVEL, `offset` ranges from 0 to 2047, since the root + * page table spans 4 consecutive 4KB pages. + * We want to return an index within one of these 4 pages. + * The specific page to use is determined by `p2m_get_root_pointer()`. + * + * Example: if `offset == 512`: + * - A single 4KB page holds 512 entries. + * - Therefore, entry 512 corresponds to index 0 of the second page. + * + * At all other levels, only one page is allocated, and `offset` is + * always in the range 0 to 511, since the VPN is 9 bits long. + */ + return off & (PAGETABLE_ENTRIES - 1); +} + +#define P2M_MAX_ROOT_LEVEL 5 + +#define P2M_BUILD_LEVEL_OFFSETS(p2m, var, addr) \ + unsigned int var[P2M_MAX_ROOT_LEVEL]; \ + BUG_ON(P2M_ROOT_LEVEL(p2m) >= P2M_MAX_ROOT_LEVEL); \ + for ( unsigned int i = 0; i <= P2M_ROOT_LEVEL(p2m); i++ ) \ + var[i] = calc_offset(p2m, i, addr); + +/* + * Map one of the four root pages of the P2M root page table. + * + * The P2M root page table is larger than normal (16KB instead of 4KB), + * so it is allocated as four consecutive 4KB pages. This function selects + * the appropriate 4KB page based on the given GFN and returns a mapping + * to it. + * + * The caller is responsible for unmapping the page after use. + * + * Returns NULL if the calculated offset into the root table is invalid. + */ +static pte_t *p2m_get_root_pointer(struct p2m_domain *p2m, gfn_t gfn) +{ + unsigned long idx; + unsigned long root_level = P2M_ROOT_LEVEL(p2m); + + idx = gfn_x(gfn) >> P2M_LEVEL_ORDER(root_level); + if ( idx >= P2M_PAGETABLE_ENTRIES(p2m, root_level) ) + return NULL; + + /* + * The P2M root page table is extended by 2 bits, making its size 16KB + * (instead of 4KB for non-root page tables). Therefore, p2m->root is + * allocated as four consecutive 4KB pages (since alloc_domheap_pages() + * only allocates 4KB pages). + * + * Initially, `idx` is derived directly from `gfn`. + * To locate the correct entry within a single 4KB page, + * we rescale the offset so it falls within one of the 4 pages. + * + * Example: if `idx == 512` + * - A 4KB page holds 512 entries. + * - Thus, entry 512 corresponds to index 0 of the second page. + */ + idx /= PAGETABLE_ENTRIES; + + return __map_domain_page(p2m->root + idx); +} + static void __init gstage_mode_detect(void) { static const struct gstage_mode_desc modes[] __initconst = { @@ -228,6 +307,9 @@ int p2m_init(struct domain *d) rwlock_init(&p2m->lock); INIT_PAGE_LIST_HEAD(&p2m->pages); + p2m->max_mapped_gfn = _gfn(0); + p2m->lowest_mapped_gfn = _gfn(ULONG_MAX); + /* * Currently, the infrastructure required to enable CONFIG_HAS_PASSTHROUGH * is not ready for RISC-V support. @@ -274,13 +356,255 @@ int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted) return rc; } +static inline void p2m_write_pte(pte_t *p, pte_t pte, bool clean_cache) +{ + write_pte(p, pte); + + /* + * TODO: if multiple adjacent PTEs are written without releasing + * the lock, this then redundant cache flushing can be a + * performance issue. + */ + if ( clean_cache ) + clean_dcache_va_range(p, sizeof(*p)); +} + +static inline void p2m_clean_pte(pte_t *p, bool clean_cache) +{ + pte_t pte = { .pte = 0 }; + + p2m_write_pte(p, pte, clean_cache); +} + +static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t) +{ + panic("%s: hasn't been implemented yet\n", __func__); + + return (pte_t) { .pte = 0 }; +} + +#define P2M_TABLE_MAP_NONE 0 +#define P2M_TABLE_MAP_NOMEM 1 +#define P2M_TABLE_SUPER_PAGE 2 +#define P2M_TABLE_NORMAL 3 + +/* + * Take the currently mapped table, find the entry corresponding to the GFN, + * and map the next-level table if available. The previous table will be + * unmapped if the next level was mapped (e.g., when P2M_TABLE_NORMAL is + * returned). + * + * `alloc_tbl` parameter indicates whether intermediate tables should + * be allocated when not present. + * + * Return values: + * P2M_TABLE_MAP_NONE: a table allocation isn't permitted. + * P2M_TABLE_MAP_NOMEM: allocating a new page failed. + * P2M_TABLE_SUPER_PAGE: next level or leaf mapped normally. + * P2M_TABLE_NORMAL: The next entry points to a superpage. + */ +static int p2m_next_level(struct p2m_domain *p2m, bool alloc_tbl, + unsigned int level, pte_t **table, + unsigned int offset) +{ + panic("%s: hasn't been implemented yet\n", __func__); + + return P2M_TABLE_MAP_NONE; +} + +/* Free pte sub-tree behind an entry */ +static void p2m_free_subtree(struct p2m_domain *p2m, + pte_t entry, unsigned int level) +{ + panic("%s: hasn't been implemented yet\n", __func__); +} + +/* Insert an entry in the p2m */ +static int p2m_set_entry(struct p2m_domain *p2m, + gfn_t gfn, + unsigned long page_order, + mfn_t mfn, + p2m_type_t t) +{ + unsigned int level; + unsigned int target = page_order / PAGETABLE_ORDER; + pte_t *entry, *table, orig_pte; + int rc; + /* + * A mapping is removed only if the MFN is explicitly set to INVALID_MFN. + * Other MFNs that are considered invalid by mfn_valid() (e.g., MMIO) + * are still allowed. + */ + bool removing_mapping = mfn_eq(mfn, INVALID_MFN); + P2M_BUILD_LEVEL_OFFSETS(p2m, offsets, gfn_to_gaddr(gfn)); + + ASSERT(p2m_is_write_locked(p2m)); + + /* + * Check if the level target is valid: we only support + * 4K - 2M - 1G mapping. + */ + ASSERT(target <= P2M_MAX_SUPPORTED_LEVEL_MAPPING); + + table = p2m_get_root_pointer(p2m, gfn); + if ( !table ) + return -EINVAL; + + for ( level = P2M_ROOT_LEVEL(p2m); level > target; level-- ) + { + /* + * Don't try to allocate intermediate page table if the mapping + * is about to be removed. + */ + rc = p2m_next_level(p2m, !removing_mapping, + level, &table, offsets[level]); + if ( (rc == P2M_TABLE_MAP_NONE) || (rc == P2M_TABLE_MAP_NOMEM) ) + { + rc = (rc == P2M_TABLE_MAP_NONE) ? -ENOENT : -ENOMEM; + /* + * We are here because p2m_next_level has failed to map + * the intermediate page table (e.g the table does not exist + * and none should be allocated). It is a valid case + * when removing a mapping as it may not exist in the + * page table. In this case, just ignore lookup failure. + */ + rc = removing_mapping ? 0 : rc; + goto out; + } + + if ( rc != P2M_TABLE_NORMAL ) + break; + } + + entry = table + offsets[level]; + + /* + * If we are here with level > target, we must be at a leaf node, + * and we need to break up the superpage. + */ + if ( level > target ) + { + panic("Shattering isn't implemented\n"); + } + + /* + * We should always be there with the correct level because all the + * intermediate tables have been installed if necessary. + */ + ASSERT(level == target); + + orig_pte = *entry; + + if ( removing_mapping ) + p2m_clean_pte(entry, p2m->clean_dcache); + else + { + pte_t pte = p2m_pte_from_mfn(mfn, t); + + p2m_write_pte(entry, pte, p2m->clean_dcache); + + p2m->max_mapped_gfn = gfn_max(p2m->max_mapped_gfn, + gfn_add(gfn, BIT(page_order, UL) - 1)); + p2m->lowest_mapped_gfn = gfn_min(p2m->lowest_mapped_gfn, gfn); + } + + p2m->need_flush = true; + + /* + * Currently, the infrastructure required to enable CONFIG_HAS_PASSTHROUGH + * is not ready for RISC-V support. + * + * When CONFIG_HAS_PASSTHROUGH=y, iommu_iotlb_flush() should be done + * here. + */ +#ifdef CONFIG_HAS_PASSTHROUGH +# error "add code to flush IOMMU TLB" +#endif + + rc = 0; + + /* + * In case of a VALID -> INVALID transition, the original PTE should + * always be freed. + * + * In case of a VALID -> VALID transition, the original PTE should be + * freed only if the MFNs are different. If the MFNs are the same + * (i.e., only permissions differ), there is no need to free the + * original PTE. + */ + if ( pte_is_valid(orig_pte) && + (!pte_is_valid(*entry) || + !mfn_eq(pte_get_mfn(*entry), pte_get_mfn(orig_pte))) ) + p2m_free_subtree(p2m, orig_pte, level); + + out: + unmap_domain_page(table); + + return rc; +} + +/* Return mapping order for given gfn, mfn and nr */ +static unsigned long p2m_mapping_order(const struct p2m_domain *p2m, gfn_t gfn, + mfn_t mfn, unsigned long nr) +{ + unsigned long mask; + /* 1gb, 2mb, 4k mappings are supported */ + unsigned int level = min(P2M_ROOT_LEVEL(p2m), P2M_MAX_SUPPORTED_LEVEL_MAPPING); + unsigned long order = 0; + + mask = !mfn_eq(mfn, INVALID_MFN) ? mfn_x(mfn) : 0; + mask |= gfn_x(gfn); + + for ( ; level != 0; level-- ) + { + if ( !(mask & (BIT(P2M_LEVEL_ORDER(level), UL) - 1)) && + (nr >= BIT(P2M_LEVEL_ORDER(level), UL)) ) + { + order = P2M_LEVEL_ORDER(level); + break; + } + } + + return order; +} + static int p2m_set_range(struct p2m_domain *p2m, gfn_t sgfn, unsigned long nr, mfn_t smfn, p2m_type_t t) { - return -EOPNOTSUPP; + int rc = 0; + unsigned long left = nr; + + /* + * Any reference taken by the P2M mappings (e.g. foreign mapping) will + * be dropped in relinquish_p2m_mapping(). As the P2M will still + * be accessible after, we need to prevent mapping to be added when the + * domain is dying. + */ + if ( unlikely(p2m->domain->is_dying) ) + return -EACCES; + + while ( left ) + { + unsigned long order = p2m_mapping_order(p2m, sgfn, smfn, left); + + rc = p2m_set_entry(p2m, sgfn, order, smfn, t); + if ( rc ) + break; + + sgfn = gfn_add(sgfn, BIT(order, UL)); + if ( !mfn_eq(smfn, INVALID_MFN) ) + smfn = mfn_add(smfn, BIT(order, UL)); + + left -= BIT(order, UL); + } + + if ( left > INT_MAX ) + rc = -EOVERFLOW; + + return !left ? rc : left; } int map_regions_p2mt(struct domain *d, -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 15:44:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 15:44:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189860.1510575 (Exim 4.92) (envelope-from ) id 1vWGB7-0000wO-ES; Thu, 18 Dec 2025 15:44:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189860.1510575; Thu, 18 Dec 2025 15:44:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWGB7-0000wG-Ao; Thu, 18 Dec 2025 15:44:33 +0000 Received: by outflank-mailman (input) for mailman id 1189860; Thu, 18 Dec 2025 15:44:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWGB6-0000wA-Sj for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 15:44:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWGB6-00G2V4-1l for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 15:44:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWGB6-00GYeb-2a for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 15:44:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=eu1Te4ZapODwmz0Wz/PZvP2jfxMRqw7+7MDB3vqJnso=; b=qX9yEytxw/P5IvEQGYH3qoQCI7 KfsJYxJXvAliaoXkQbRdKsM4xmzZmRoihI8SJnQIwgVXKNPZmhOiGOv3xvYVYAkGudbIp/LB5jrOk 5pT4AhNVtrh4dqTZPOJ7aIyLX3/gsPOwuYVgfZou/OQXCdiIncWB8v4yVxMG7EMTiSwE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/riscv: Implement p2m_free_subtree() and related helpers Message-Id: Date: Thu, 18 Dec 2025 15:44:32 +0000 commit 6f7881e331ea6b25fd75d262d3ec07525103259c Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:21 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 14:24:45 2025 +0100 xen/riscv: Implement p2m_free_subtree() and related helpers This patch introduces a working implementation of p2m_free_subtree() for RISC-V based on ARM's implementation of p2m_free_entry(), enabling proper cleanup of page table entries in the P2M (physical-to-machine) mapping. Only few things are changed: - Introduce and use p2m_get_type() to get a type of p2m entry as RISC-V's PTE doesn't have enough space to store all necessary types so a type is stored outside PTE. But, at the moment, handle only types which fit into PTE's bits. Key additions include: - p2m_free_subtree(): Recursively frees page table entries at all levels. It handles both regular and superpage mappings and ensures that TLB entries are flushed before freeing intermediate tables. - p2m_put_page() and helpers: - p2m_put_4k_page(): Clears GFN from xenheap pages if applicable. - p2m_put_2m_superpage(): Releases foreign page references in a 2MB superpage. - p2m_get_type(): Extracts the stored p2m_type from the PTE bits. - p2m_free_page(): Returns a page to a domain's freelist. - Introduce p2m_is_foreign() and connected to it things. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/include/asm/flushtlb.h | 6 +- xen/arch/riscv/include/asm/p2m.h | 15 ++++ xen/arch/riscv/include/asm/paging.h | 2 + xen/arch/riscv/p2m.c | 148 +++++++++++++++++++++++++++++++++- xen/arch/riscv/paging.c | 8 ++ xen/arch/riscv/stubs.c | 5 -- 6 files changed, 176 insertions(+), 8 deletions(-) diff --git a/xen/arch/riscv/include/asm/flushtlb.h b/xen/arch/riscv/include/asm/flushtlb.h index e70badae0c..ab32311568 100644 --- a/xen/arch/riscv/include/asm/flushtlb.h +++ b/xen/arch/riscv/include/asm/flushtlb.h @@ -41,8 +41,10 @@ static inline void page_set_tlbflush_timestamp(struct page_info *page) BUG_ON("unimplemented"); } -/* Flush specified CPUs' TLBs */ -void arch_flush_tlb_mask(const cpumask_t *mask); +static inline void arch_flush_tlb_mask(const cpumask_t *mask) +{ + sbi_remote_hfence_gvma(mask, 0, 0); +} #endif /* ASM__RISCV__FLUSHTLB_H */ diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h index fa55d8a3bc..b48693a2b4 100644 --- a/xen/arch/riscv/include/asm/p2m.h +++ b/xen/arch/riscv/include/asm/p2m.h @@ -111,6 +111,8 @@ typedef enum { p2m_mmio_direct_io, /* Read/write mapping of genuine Device MMIO area, PTE_PBMT_IO will be used for such mappings */ p2m_ext_storage, /* Following types'll be stored outsude PTE bits: */ + p2m_map_foreign_rw, /* Read/write RAM pages from foreign domain */ + p2m_map_foreign_ro, /* Read-only RAM pages from foreign domain */ /* Sentinel — not a real type, just a marker for comparison */ p2m_first_external = p2m_ext_storage, @@ -121,15 +123,28 @@ static inline p2m_type_t arch_dt_passthrough_p2m_type(void) return p2m_mmio_direct_io; } +/* + * Bits 8 and 9 are reserved for use by supervisor software; + * the implementation shall ignore this field. + * We are going to use to save in these bits frequently used types to avoid + * get/set of a type from radix tree. + */ +#define P2M_TYPE_PTE_BITS_MASK PTE_RSW + /* We use bitmaps and mask to handle groups of types */ #define p2m_to_mask(t) BIT(t, UL) /* RAM types, which map to real machine frames */ #define P2M_RAM_TYPES (p2m_to_mask(p2m_ram_rw)) +/* Foreign mappings types */ +#define P2M_FOREIGN_TYPES (p2m_to_mask(p2m_map_foreign_rw) | \ + p2m_to_mask(p2m_map_foreign_ro)) + /* Useful predicates */ #define p2m_is_ram(t) (p2m_to_mask(t) & P2M_RAM_TYPES) #define p2m_is_any_ram(t) (p2m_to_mask(t) & P2M_RAM_TYPES) +#define p2m_is_foreign(t) (p2m_to_mask(t) & P2M_FOREIGN_TYPES) #include diff --git a/xen/arch/riscv/include/asm/paging.h b/xen/arch/riscv/include/asm/paging.h index 01be45528f..fe462be223 100644 --- a/xen/arch/riscv/include/asm/paging.h +++ b/xen/arch/riscv/include/asm/paging.h @@ -13,4 +13,6 @@ int paging_freelist_adjust(struct domain *d, unsigned long pages, int paging_ret_to_domheap(struct domain *d, unsigned int nr_pages); int paging_refill_from_domheap(struct domain *d, unsigned int nr_pages); +void paging_free_page(struct domain *d, struct page_info *pg); + #endif /* ASM_RISCV_PAGING_H */ diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index c23926933f..9ab7262d70 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -356,6 +356,16 @@ int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted) return rc; } +static p2m_type_t p2m_get_type(const pte_t pte) +{ + p2m_type_t type = MASK_EXTR(pte.pte, P2M_TYPE_PTE_BITS_MASK); + + if ( type == p2m_ext_storage ) + panic("unimplemented\n"); + + return type; +} + static inline void p2m_write_pte(pte_t *p, pte_t pte, bool clean_cache) { write_pte(p, pte); @@ -412,11 +422,147 @@ static int p2m_next_level(struct p2m_domain *p2m, bool alloc_tbl, return P2M_TABLE_MAP_NONE; } +static void p2m_put_foreign_page(struct page_info *pg) +{ + /* + * It’s safe to call put_page() here because arch_flush_tlb_mask() + * will be invoked if the page is reallocated, which will trigger a + * flush of the guest TLBs. + */ + put_page(pg); +} + +static void p2m_put_4k_page(mfn_t mfn, p2m_type_t type) +{ + /* TODO: Handle other p2m types */ + + if ( p2m_is_foreign(type) ) + { + ASSERT(mfn_valid(mfn)); + p2m_put_foreign_page(mfn_to_page(mfn)); + } +} + +static void p2m_put_2m_superpage(mfn_t mfn, p2m_type_t type) +{ + struct page_info *pg; + unsigned int i; + + /* TODO: Handle other p2m types */ + if ( !p2m_is_foreign(type) ) + return; + + ASSERT(mfn_valid(mfn)); + + pg = mfn_to_page(mfn); + + /* + * PAGETABLE_ENTRIES is used instead of P2M_PAGETABLE_ENTRIES(1) because + * they are expected to be identical (this is verified in calc_offset()). + * This avoids having to pass p2m_domain here and throughout the call stack + * above solely for the sake of one macro. + */ + for ( i = 0; i < PAGETABLE_ENTRIES; i++, pg++ ) + p2m_put_foreign_page(pg); +} + +static void p2m_put_page(const pte_t pte, unsigned int level, p2m_type_t p2mt) +{ + mfn_t mfn = pte_get_mfn(pte); + + ASSERT(pte_is_valid(pte)); + + /* + * TODO: Currently we don't handle level 2 super-page, Xen is not + * preemptible and therefore some work is needed to handle such + * superpages, for which at some point Xen might end up freeing memory + * and therefore for such a big mapping it could end up in a very long + * operation. + */ + switch ( level ) + { + case 1: + return p2m_put_2m_superpage(mfn, p2mt); + + case 0: + return p2m_put_4k_page(mfn, p2mt); + + default: + ASSERT_UNREACHABLE(); + break; + } +} + +static void p2m_free_page(struct p2m_domain *p2m, struct page_info *pg) +{ + page_list_del(pg, &p2m->pages); + + paging_free_page(p2m->domain, pg); +} + /* Free pte sub-tree behind an entry */ static void p2m_free_subtree(struct p2m_domain *p2m, pte_t entry, unsigned int level) { - panic("%s: hasn't been implemented yet\n", __func__); + unsigned int i; + pte_t *table; + mfn_t mfn; + struct page_info *pg; + + /* + * Check if the level is valid: only 4K - 2M - 1G mappings are supported. + * To support levels > 2, the implementation of p2m_free_subtree() would + * need to be updated, as the current recursive approach could consume + * excessive time and memory. + */ + ASSERT(level <= P2M_MAX_SUPPORTED_LEVEL_MAPPING); + + /* Nothing to do if the entry is invalid. */ + if ( !pte_is_valid(entry) ) + return; + + if ( pte_is_mapping(entry) ) + { + p2m_type_t p2mt = p2m_get_type(entry); + +#ifdef CONFIG_IOREQ_SERVER + /* + * If this gets called then either the entry was replaced by an entry + * with a different base (valid case) or the shattering of a superpage + * has failed (error case). + * So, at worst, the spurious mapcache invalidation might be sent. + */ + if ( p2m_is_ram(p2mt) && + domain_has_ioreq_server(p2m->domain) ) + ioreq_request_mapcache_invalidate(p2m->domain); +#endif + + p2m_put_page(entry, level, p2mt); + + return; + } + + table = map_domain_page(pte_get_mfn(entry)); + + for ( i = 0; i < P2M_PAGETABLE_ENTRIES(p2m, level); i++ ) + p2m_free_subtree(p2m, table[i], level - 1); + + unmap_domain_page(table); + + /* + * Make sure all the references in the TLB have been removed before + * freing the intermediate page table. + * XXX: Should we defer the free of the page table to avoid the + * flush? + */ + p2m_tlb_flush_sync(p2m); + + mfn = pte_get_mfn(entry); + ASSERT(mfn_valid(mfn)); + + pg = mfn_to_page(mfn); + + p2m_free_page(p2m, pg); } /* Insert an entry in the p2m */ diff --git a/xen/arch/riscv/paging.c b/xen/arch/riscv/paging.c index d401ddc34e..09631c9894 100644 --- a/xen/arch/riscv/paging.c +++ b/xen/arch/riscv/paging.c @@ -109,6 +109,14 @@ int paging_ret_to_domheap(struct domain *d, unsigned int nr_pages) return 0; } +void paging_free_page(struct domain *d, struct page_info *pg) +{ + spin_lock(&d->arch.paging.lock); + page_list_add_tail(pg, &d->arch.paging.freelist); + d->arch.paging.total_pages++; + spin_unlock(&d->arch.paging.lock); +} + /* Domain paging struct initialization. */ int paging_domain_init(struct domain *d) { diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c index fe7d85ee1d..164fc091b2 100644 --- a/xen/arch/riscv/stubs.c +++ b/xen/arch/riscv/stubs.c @@ -65,11 +65,6 @@ int arch_monitor_domctl_event(struct domain *d, /* smp.c */ -void arch_flush_tlb_mask(const cpumask_t *mask) -{ - BUG_ON("unimplemented"); -} - void smp_send_event_check_mask(const cpumask_t *mask) { BUG_ON("unimplemented"); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 15:44:43 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 15:44:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189861.1510577 (Exim 4.92) (envelope-from ) id 1vWGBH-0000yf-F2; Thu, 18 Dec 2025 15:44:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189861.1510577; Thu, 18 Dec 2025 15:44:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWGBH-0000yX-CG; Thu, 18 Dec 2025 15:44:43 +0000 Received: by outflank-mailman (input) for mailman id 1189861; Thu, 18 Dec 2025 15:44:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWGBG-0000yP-VV for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 15:44:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWGBG-00G2VC-26 for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 15:44:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWGBG-00Ga4D-2u for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 15:44:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=x5SJw6ToljR40yUv12KIyVDZXVO+pdyDjPuOWbL4xEI=; b=4VE/3Ld2SF0R+Ljes9ZoYWhoxo BFMypdthf72c+to/06GlnR3ZuC1Ofc2yvJe2ifpK5ui4pnqS0CSgi6edlRXKEvE7fL1J20sTmAlo/ mz69BRE0SIFiQBY4dLF38H0A3hiaCe8lDle2z+H8iooR/aN9XulXRc/xvuQ6mmd6mM/8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/riscv: Implement p2m_pte_from_mfn() and support PBMT configuration Message-Id: Date: Thu, 18 Dec 2025 15:44:42 +0000 commit ff14053983b005d5de92b31574fda0fe86bf1842 Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:22 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 14:25:00 2025 +0100 xen/riscv: Implement p2m_pte_from_mfn() and support PBMT configuration This patch adds the initial logic for constructing PTEs from MFNs in the RISC-V p2m subsystem. It includes: - Implementation of p2m_pte_from_mfn(): Generates a valid PTE using the given MFN, p2m_type_t, including permission encoding and PBMT attribute setup. - New helper p2m_set_permission(): Encodes access rights (r, w, x) into the PTE based on both p2m type and access permissions. - p2m_set_type(): Stores the p2m type in PTE's bits. The storage of types, which don't fit PTE bits, will be implemented separately later. - Add detection of Svade extension to properly handle a possible page-fault if A and D bits aren't set. PBMT type encoding support: - Introduces an enum pbmt_type_t to represent the PBMT field values. - Maps types like p2m_mmio_direct_dev to p2m_mmio_direct_io, others default to pbmt_pma. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/cpufeature.c | 1 + xen/arch/riscv/include/asm/cpufeature.h | 1 + xen/arch/riscv/include/asm/page.h | 8 +++ xen/arch/riscv/p2m.c | 112 ++++++++++++++++++++++++++++++-- 4 files changed, 118 insertions(+), 4 deletions(-) diff --git a/xen/arch/riscv/cpufeature.c b/xen/arch/riscv/cpufeature.c index b846a106a3..02b68aeaa4 100644 --- a/xen/arch/riscv/cpufeature.c +++ b/xen/arch/riscv/cpufeature.c @@ -138,6 +138,7 @@ const struct riscv_isa_ext_data __initconst riscv_isa_ext[] = { RISCV_ISA_EXT_DATA(zbs), RISCV_ISA_EXT_DATA(smaia), RISCV_ISA_EXT_DATA(ssaia), + RISCV_ISA_EXT_DATA(svade), RISCV_ISA_EXT_DATA(svpbmt), }; diff --git a/xen/arch/riscv/include/asm/cpufeature.h b/xen/arch/riscv/include/asm/cpufeature.h index d42d7b294e..b696160388 100644 --- a/xen/arch/riscv/include/asm/cpufeature.h +++ b/xen/arch/riscv/include/asm/cpufeature.h @@ -37,6 +37,7 @@ enum riscv_isa_ext_id { RISCV_ISA_EXT_zbs, RISCV_ISA_EXT_smaia, RISCV_ISA_EXT_ssaia, + RISCV_ISA_EXT_svade, RISCV_ISA_EXT_svpbmt, RISCV_ISA_EXT_MAX }; diff --git a/xen/arch/riscv/include/asm/page.h b/xen/arch/riscv/include/asm/page.h index 1fc5998a0b..b7cd61df8d 100644 --- a/xen/arch/riscv/include/asm/page.h +++ b/xen/arch/riscv/include/asm/page.h @@ -73,6 +73,14 @@ #define PTE_SMALL BIT(10, UL) #define PTE_POPULATE BIT(11, UL) +enum pbmt_type { + pbmt_pma, + pbmt_nc, + pbmt_io, + pbmt_rsvd, + pbmt_count, +}; + #define PTE_ACCESS_MASK (PTE_READABLE | PTE_WRITABLE | PTE_EXECUTABLE) #define PTE_PBMT_MASK (PTE_PBMT_NOCACHE | PTE_PBMT_IO) diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index 9ab7262d70..48e75b1867 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -11,6 +11,7 @@ #include #include +#include #include #include #include @@ -356,6 +357,18 @@ int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted) return rc; } +static int p2m_set_type(pte_t *pte, p2m_type_t t) +{ + int rc = 0; + + if ( t > p2m_first_external ) + panic("unimplemeted\n"); + else + pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK); + + return rc; +} + static p2m_type_t p2m_get_type(const pte_t pte) { p2m_type_t type = MASK_EXTR(pte.pte, P2M_TYPE_PTE_BITS_MASK); @@ -386,11 +399,102 @@ static inline void p2m_clean_pte(pte_t *p, bool clean_cache) p2m_write_pte(p, pte, clean_cache); } -static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t) +static void p2m_set_permission(pte_t *e, p2m_type_t t) { - panic("%s: hasn't been implemented yet\n", __func__); + e->pte &= ~PTE_ACCESS_MASK; + + e->pte |= PTE_USER; + + /* + * Two schemes to manage the A and D bits are defined: + * • The Svade extension: when a virtual page is accessed and the A bit + * is clear, or is written and the D bit is clear, a page-fault + * exception is raised. + * • When the Svade extension is not implemented, the following scheme + * applies. + * When a virtual page is accessed and the A bit is clear, the PTE is + * updated to set the A bit. When the virtual page is written and the + * D bit is clear, the PTE is updated to set the D bit. When G-stage + * address translation is in use and is not Bare, the G-stage virtual + * pages may be accessed or written by implicit accesses to VS-level + * memory management data structures, such as page tables. + * Thereby to avoid a page-fault in case of Svade is available, it is + * necessary to set A and D bits. + * + * TODO: For now, it’s fine to simply set the A/D bits, since OpenSBI + * delegates page faults to a lower privilege mode and so OpenSBI + * isn't expect to handle page-faults occured in lower modes. + * By setting the A/D bits here, page faults that would otherwise + * be generated due to unset A/D bits will not occur in Xen. + * + * Currently, Xen on RISC-V does not make use of the information + * that could be obtained from handling such page faults, which + * could otherwise be useful for several use cases such as demand + * paging, cache-flushing optimizations, memory access tracking,etc. + * + * To support the more general case and the optimizations mentioned + * above, it would be better to stop setting the A/D bits here and + * instead handle page faults that occur due to unset A/D bits. + */ + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_svade) ) + e->pte |= PTE_ACCESSED | PTE_DIRTY; + + switch ( t ) + { + case p2m_map_foreign_rw: + case p2m_mmio_direct_io: + e->pte |= PTE_READABLE | PTE_WRITABLE; + break; + + case p2m_ram_rw: + e->pte |= PTE_ACCESS_MASK; + break; + + case p2m_invalid: + e->pte &= ~PTE_VALID; + break; + + case p2m_map_foreign_ro: + e->pte |= PTE_READABLE; + break; + + default: + ASSERT_UNREACHABLE(); + break; + } +} + +static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t, bool is_table) +{ + pte_t e = (pte_t) { PTE_VALID }; + + pte_set_mfn(&e, mfn); + + ASSERT(!(mfn_to_maddr(mfn) & ~PADDR_MASK) || mfn_eq(mfn, INVALID_MFN)); + + if ( !is_table ) + { + switch ( t ) + { + case p2m_mmio_direct_io: + e.pte |= PTE_PBMT_IO; + break; + + default: + break; + } + + p2m_set_permission(&e, t); + p2m_set_type(&e, t); + } + else + /* + * According to the spec and table "Encoding of PTE R/W/X fields": + * X=W=R=0 -> Pointer to next level of page table. + */ + e.pte &= ~PTE_ACCESS_MASK; - return (pte_t) { .pte = 0 }; + return e; } #define P2M_TABLE_MAP_NONE 0 @@ -645,7 +749,7 @@ static int p2m_set_entry(struct p2m_domain *p2m, p2m_clean_pte(entry, p2m->clean_dcache); else { - pte_t pte = p2m_pte_from_mfn(mfn, t); + pte_t pte = p2m_pte_from_mfn(mfn, t, false); p2m_write_pte(entry, pte, p2m->clean_dcache); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 15:44:53 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 15:44:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189862.1510581 (Exim 4.92) (envelope-from ) id 1vWGBR-000110-GJ; Thu, 18 Dec 2025 15:44:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189862.1510581; Thu, 18 Dec 2025 15:44:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWGBR-00010s-Df; Thu, 18 Dec 2025 15:44:53 +0000 Received: by outflank-mailman (input) for mailman id 1189862; Thu, 18 Dec 2025 15:44:53 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWGBR-00010W-30 for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/riscv: implement p2m_next_level() Message-Id: Date: Thu, 18 Dec 2025 15:44:53 +0000 commit af87a609c79d30950150e8a3adecee8beff3169e Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:23 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 14:25:16 2025 +0100 xen/riscv: implement p2m_next_level() Implement the p2m_next_level() function, which enables traversal and dynamic allocation of intermediate levels (if necessary) in the RISC-V p2m (physical-to-machine) page table hierarchy. To support this, the following helpers are introduced: - page_to_p2m_table(): Constructs non-leaf PTEs pointing to next-level page tables with correct attributes. - p2m_alloc_page(): Allocates page table pages, supporting both hardware and guest domains. - p2m_create_table(): Allocates and initializes a new page table page and installs it into the hierarchy. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/include/asm/paging.h | 2 + xen/arch/riscv/p2m.c | 77 ++++++++++++++++++++++++++++++++++++- xen/arch/riscv/paging.c | 12 ++++++ 3 files changed, 89 insertions(+), 2 deletions(-) diff --git a/xen/arch/riscv/include/asm/paging.h b/xen/arch/riscv/include/asm/paging.h index fe462be223..c1d225d02b 100644 --- a/xen/arch/riscv/include/asm/paging.h +++ b/xen/arch/riscv/include/asm/paging.h @@ -15,4 +15,6 @@ int paging_refill_from_domheap(struct domain *d, unsigned int nr_pages); void paging_free_page(struct domain *d, struct page_info *pg); +struct page_info *paging_alloc_page(struct domain *d); + #endif /* ASM_RISCV_PAGING_H */ diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index 48e75b1867..9e1a660316 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -357,6 +357,19 @@ int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted) return rc; } +static struct page_info *p2m_alloc_page(struct p2m_domain *p2m) +{ + struct page_info *pg = paging_alloc_page(p2m->domain); + + if ( pg ) + { + page_list_add(pg, &p2m->pages); + clear_and_clean_page(pg, p2m->clean_dcache); + } + + return pg; +} + static int p2m_set_type(pte_t *pte, p2m_type_t t) { int rc = 0; @@ -497,6 +510,33 @@ static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t, bool is_table) return e; } +/* Generate table entry with correct attributes. */ +static pte_t page_to_p2m_table(const struct page_info *page) +{ + /* + * p2m_invalid will be ignored inside p2m_pte_from_mfn() as is_table is + * set to true and p2m_type_t shouldn't be applied for PTEs which + * describe an intermediate table. + */ + return p2m_pte_from_mfn(page_to_mfn(page), p2m_invalid, true); +} + +/* Allocate a new page table page and hook it in via the given entry. */ +static int p2m_create_table(struct p2m_domain *p2m, pte_t *entry) +{ + struct page_info *page; + + ASSERT(!pte_is_valid(*entry)); + + page = p2m_alloc_page(p2m); + if ( page == NULL ) + return -ENOMEM; + + p2m_write_pte(entry, page_to_p2m_table(page), p2m->clean_dcache); + + return 0; +} + #define P2M_TABLE_MAP_NONE 0 #define P2M_TABLE_MAP_NOMEM 1 #define P2M_TABLE_SUPER_PAGE 2 @@ -521,9 +561,42 @@ static int p2m_next_level(struct p2m_domain *p2m, bool alloc_tbl, unsigned int level, pte_t **table, unsigned int offset) { - panic("%s: hasn't been implemented yet\n", __func__); + pte_t *entry; + mfn_t mfn; + + /* The function p2m_next_level() is never called at the last level */ + ASSERT(level != 0); + + entry = *table + offset; + + if ( !pte_is_valid(*entry) ) + { + int ret; + + if ( !alloc_tbl ) + return P2M_TABLE_MAP_NONE; + + ret = p2m_create_table(p2m, entry); + if ( ret ) + return P2M_TABLE_MAP_NOMEM; + } + + if ( pte_is_mapping(*entry) ) + return P2M_TABLE_SUPER_PAGE; + + mfn = mfn_from_pte(*entry); + + unmap_domain_page(*table); + + /* + * TODO: There's an inefficiency here: + * In p2m_create_table(), the page is mapped to clear it. + * Then that mapping is torn down in p2m_create_table(), + * only to be re-established here. + */ + *table = map_domain_page(mfn); - return P2M_TABLE_MAP_NONE; + return P2M_TABLE_NORMAL; } static void p2m_put_foreign_page(struct page_info *pg) diff --git a/xen/arch/riscv/paging.c b/xen/arch/riscv/paging.c index 09631c9894..76a203edbb 100644 --- a/xen/arch/riscv/paging.c +++ b/xen/arch/riscv/paging.c @@ -117,6 +117,18 @@ void paging_free_page(struct domain *d, struct page_info *pg) spin_unlock(&d->arch.paging.lock); } +struct page_info *paging_alloc_page(struct domain *d) +{ + struct page_info *pg; + + spin_lock(&d->arch.paging.lock); + pg = page_list_remove_head(&d->arch.paging.freelist); + d->arch.paging.total_pages--; + spin_unlock(&d->arch.paging.lock); + + return pg; +} + /* Domain paging struct initialization. */ int paging_domain_init(struct domain *d) { -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 15:45:04 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 15:45:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189863.1510585 (Exim 4.92) (envelope-from ) id 1vWGBc-000136-I8; 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Thu, 18 Dec 2025 15:45:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=7F3i7BixG5BHqiDN4CWVd/3MUoa4WEL52McIJTnhtqI=; b=YGZ8jOrOp78k5wDzt5TLIBrOZO 4j8oFGOQM9gtfM1wlpayivk/pXMOkCwPT3lBRVbKmT+NQAiuizLm2jXQ3Uax2IYhPebNjU6ezOsCA ATSs/t5wTAir4OwHTD+YRpvj96jDlDXYjJmap0i+QNdWmpkioTPIKiIXGq0oOMq3TTNQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/riscv: Implement superpage splitting for p2m mappings Message-Id: Date: Thu, 18 Dec 2025 15:45:03 +0000 commit 72a516613f459f56ffb7e80395886c1f6707ef74 Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:24 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 14:25:37 2025 +0100 xen/riscv: Implement superpage splitting for p2m mappings Add support for down large memory mappings ("superpages") in the RISC-V p2m mapping so that smaller, more precise mappings ("finer-grained entries") can be inserted into lower levels of the page table hierarchy. To implement that the following is done: - Introduce p2m_split_superpage(): Recursively shatters a superpage into smaller page table entries down to the target level, preserving original permissions and attributes. - p2m_set_entry() updated to invoke superpage splitting when inserting entries at lower levels within a superpage-mapped region. This implementation is based on the ARM code, with modifications to the part that follows the BBM (break-before-make) approach, some parts are simplified as according to RISC-V spec: It is permitted for multiple address-translation cache entries to co-exist for the same address. This represents the fact that in a conventional TLB hierarchy, it is possible for multiple entries to match a single address if, for example, a page is upgraded to a superpage without first clearing the original non-leaf PTE’s valid bit and executing an SFENCE.VMA with rs1=x0, or if multiple TLBs exist in parallel at a given level of the hierarchy. In this case, just as if an SFENCE.VMA is not executed between a write to the memory-management tables and subsequent implicit read of the same address: it is unpredictable whether the old non-leaf PTE or the new leaf PTE is used, but the behavior is otherwise well defined. In contrast to the Arm architecture, where BBM is mandatory and failing to use it in some cases can lead to CPU instability, RISC-V guarantees stability, and the behavior remains safe — though unpredictable in terms of which translation will be used. Additionally, the page table walk logic has been adjusted, as ARM uses the opposite level numbering compared to RISC-V. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/include/asm/page.h | 5 ++ xen/arch/riscv/p2m.c | 116 +++++++++++++++++++++++++++++++++++++- 2 files changed, 119 insertions(+), 2 deletions(-) diff --git a/xen/arch/riscv/include/asm/page.h b/xen/arch/riscv/include/asm/page.h index b7cd61df8d..b465a90325 100644 --- a/xen/arch/riscv/include/asm/page.h +++ b/xen/arch/riscv/include/asm/page.h @@ -190,6 +190,11 @@ static inline bool pte_is_mapping(pte_t p) return (p.pte & PTE_VALID) && (p.pte & PTE_ACCESS_MASK); } +static inline bool pte_is_superpage(pte_t p, unsigned int level) +{ + return (level > 0) && pte_is_mapping(p); +} + static inline int clean_and_invalidate_dcache_va_range(const void *p, unsigned long size) { diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index 9e1a660316..8d572f838f 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -742,7 +742,88 @@ static void p2m_free_subtree(struct p2m_domain *p2m, p2m_free_page(p2m, pg); } -/* Insert an entry in the p2m */ +static bool p2m_split_superpage(struct p2m_domain *p2m, pte_t *entry, + unsigned int level, unsigned int target, + const unsigned int *offsets) +{ + struct page_info *page; + unsigned long i; + pte_t pte, *table; + bool rv = true; + + /* Convenience aliases */ + mfn_t mfn = pte_get_mfn(*entry); + unsigned int next_level = level - 1; + unsigned int level_order = P2M_LEVEL_ORDER(next_level); + + /* + * This should only be called with target != level and the entry is + * a superpage. + */ + ASSERT(level > target); + ASSERT(pte_is_superpage(*entry, level)); + + page = p2m_alloc_page(p2m); + if ( !page ) + { + /* + * The caller is in charge to free the sub-tree. + * As we didn't manage to allocate anything, just tell the + * caller there is nothing to free by invalidating the PTE. + */ + memset(entry, 0, sizeof(*entry)); + return false; + } + + table = __map_domain_page(page); + + for ( i = 0; i < P2M_PAGETABLE_ENTRIES(p2m, next_level); i++ ) + { + pte_t *new_entry = table + i; + + /* + * Use the content of the superpage entry and override + * the necessary fields. So the correct attributes are kept. + */ + pte = *entry; + pte_set_mfn(&pte, mfn_add(mfn, i << level_order)); + + write_pte(new_entry, pte); + } + + /* + * Shatter superpage in the page to the level we want to make the + * changes. + * This is done outside the loop to avoid checking the offset + * for every entry to know whether the entry should be shattered. + */ + if ( next_level != target ) + rv = p2m_split_superpage(p2m, table + offsets[next_level], + next_level, target, offsets); + + if ( p2m->clean_dcache ) + clean_dcache_va_range(table, PAGE_SIZE); + + /* + * TODO: an inefficiency here: the caller almost certainly wants to map + * the same page again, to update the one entry that caused the + * request to shatter the page. + */ + unmap_domain_page(table); + + /* + * Even if we failed, we should (according to the current implemetation + * of a way how sub-tree is freed if p2m_split_superpage hasn't been + * finished fully) install the newly allocated PTE + * entry. + * The caller will be in charge to free the sub-tree. + */ + p2m_write_pte(entry, page_to_p2m_table(page), p2m->clean_dcache); + + return rv; +} + +/* Insert an entry in the p2m. */ static int p2m_set_entry(struct p2m_domain *p2m, gfn_t gfn, unsigned long page_order, @@ -807,7 +888,38 @@ static int p2m_set_entry(struct p2m_domain *p2m, */ if ( level > target ) { - panic("Shattering isn't implemented\n"); + /* We need to split the original page. */ + pte_t split_pte = *entry; + + ASSERT(pte_is_superpage(*entry, level)); + + if ( !p2m_split_superpage(p2m, &split_pte, level, target, offsets) ) + { + /* Free the allocated sub-tree */ + p2m_free_subtree(p2m, split_pte, level); + + rc = -ENOMEM; + goto out; + } + + p2m_write_pte(entry, split_pte, p2m->clean_dcache); + + p2m->need_flush = true; + + /* Then move to the level we want to make real changes */ + for ( ; level > target; level-- ) + { + rc = p2m_next_level(p2m, true, level, &table, offsets[level]); + + /* + * The entry should be found and either be a table + * or a superpage if level 0 is not targeted + */ + ASSERT(rc == P2M_TABLE_NORMAL || + (rc == P2M_TABLE_SUPER_PAGE && target > 0)); + } + + entry = table + offsets[level]; } /* -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 15:45:14 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 15:45:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189864.1510588 (Exim 4.92) (envelope-from ) id 1vWGBm-00015m-KR; Thu, 18 Dec 2025 15:45:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189864.1510588; Thu, 18 Dec 2025 15:45:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWGBm-00015f-Hq; Thu, 18 Dec 2025 15:45:14 +0000 Received: by outflank-mailman (input) for mailman id 1189864; Thu, 18 Dec 2025 15:45:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWGBl-00015X-Ax for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 15:45:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWGBl-00G2WK-04 for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 15:45:13 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWGBl-00GeIM-0h for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 15:45:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=6Uf+8wS3Nbr9BNoSjnixTFKhJaHoXvuW8GWPb6IyCV8=; b=rg073s0XiFQoZ11lY1L8WvnBhJ diTzPD1CZlMWD27Sv1iJfzUaLWpHqN5BznNC5kwmCI3idATNsFU6kUxiZUz03NxeBDZmp3us+twCa rVD0RzcdlXTDI8kKnrg1yfOH7qsP2Q8+P2W5QOa8pBq89ih67b1ARkZDvnD8BMGukbR4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/riscv: implement put_page() Message-Id: Date: Thu, 18 Dec 2025 15:45:13 +0000 commit 71fc690ee7d985d92aa13610f00dd80c7bc48d6f Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:25 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 14:25:50 2025 +0100 xen/riscv: implement put_page() Implement put_page(), as it will be used by p2m_put_*-related code. Although CONFIG_STATIC_MEMORY has not yet been introduced for RISC-V, a stub for PGC_static is added to avoid cluttering the code of put_page() with #ifdefs. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/include/asm/mm.h | 7 +++++++ xen/arch/riscv/mm.c | 24 +++++++++++++++++++----- 2 files changed, 26 insertions(+), 5 deletions(-) diff --git a/xen/arch/riscv/include/asm/mm.h b/xen/arch/riscv/include/asm/mm.h index 2f7927e6f4..08f500c99d 100644 --- a/xen/arch/riscv/include/asm/mm.h +++ b/xen/arch/riscv/include/asm/mm.h @@ -264,6 +264,13 @@ static inline bool arch_mfns_in_directmap(unsigned long mfn, unsigned long nr) /* Page is Xen heap? */ #define _PGC_xen_heap PG_shift(2) #define PGC_xen_heap PG_mask(1, 2) +#ifdef CONFIG_STATIC_MEMORY +/* Page is static memory */ +#define _PGC_static PG_shift(3) +#define PGC_static PG_mask(1, 3) +#else +#define PGC_static 0 +#endif /* Page is broken? */ #define _PGC_broken PG_shift(7) #define PGC_broken PG_mask(1, 7) diff --git a/xen/arch/riscv/mm.c b/xen/arch/riscv/mm.c index 1ef015f179..2e42293986 100644 --- a/xen/arch/riscv/mm.c +++ b/xen/arch/riscv/mm.c @@ -362,11 +362,6 @@ unsigned long __init calc_phys_offset(void) return phys_offset; } -void put_page(struct page_info *page) -{ - BUG_ON("unimplemented"); -} - void arch_dump_shared_mem_info(void) { BUG_ON("unimplemented"); @@ -627,3 +622,22 @@ void flush_page_to_ram(unsigned long mfn, bool sync_icache) if ( sync_icache ) invalidate_icache(); } + +void put_page(struct page_info *page) +{ + unsigned long nx, x, y = page->count_info; + + do { + ASSERT((y & PGC_count_mask) >= 1); + x = y; + nx = x - 1; + } while ( unlikely((y = cmpxchg(&page->count_info, x, nx)) != x) ); + + if ( unlikely((nx & PGC_count_mask) == 0) ) + { + if ( unlikely(nx & PGC_static) ) + free_domstatic_page(page); + else + free_domheap_page(page); + } +} -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 15:45:24 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 15:45:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189865.1510592 (Exim 4.92) (envelope-from ) id 1vWGBw-00017w-M4; Thu, 18 Dec 2025 15:45:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189865.1510592; Thu, 18 Dec 2025 15:45:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWGBw-00017o-JJ; Thu, 18 Dec 2025 15:45:24 +0000 Received: by outflank-mailman (input) for mailman id 1189865; Thu, 18 Dec 2025 15:45:23 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWGBv-00017e-FP for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 15:45:23 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWGBv-00G2WU-0W for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 15:45:23 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWGBv-00Gfjx-1G for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 15:45:23 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=hzLRzwXSEOm2OoBKACWeI6ICqCMOKWtgEhRiO4tBBgY=; b=h96MLAZsQ3QIFb1qsL5PUYgOZF jYB2JC+43YQjlsxVReUKkXgcT0CHlMMRj2x0raqzIW7VmTF3fiIgfWGqBmvcgGAqZmxEUCc61qhG9 ob9jFO+n3/34foHNVGtRQPgYsUlyICabMTGQpSeYN/OBOgDAKaiWkdswKjUfh0yG2H7s=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/riscv: implement mfn_valid() and page reference, ownership handling helpers Message-Id: Date: Thu, 18 Dec 2025 15:45:23 +0000 commit e98811b97a8a373fac0e9a2a64516360e7c37ec3 Author: Oleksii Kurochko AuthorDate: Tue Dec 16 17:55:26 2025 +0100 Commit: Jan Beulich CommitDate: Thu Dec 18 14:26:03 2025 +0100 xen/riscv: implement mfn_valid() and page reference, ownership handling helpers Implement the mfn_valid() macro to verify whether a given MFN is valid by checking that it falls within the range [start_page, max_page). These bounds are initialized based on the start and end addresses of RAM. As part of this patch, start_page is introduced and initialized with the PFN of the first RAM page. Also, initialize pdx_group_valid() by calling set_pdx_range() when memory banks are being mapped. Also, after providing a non-stub implementation of the mfn_valid() macro, the following compilation errors started to occur: riscv64-linux-gnu-ld: prelink.o: in function `alloc_heap_pages': /build/xen/common/page_alloc.c:1054: undefined reference to `page_is_offlinable' riscv64-linux-gnu-ld: /build/xen/common/page_alloc.c:1035: undefined reference to `page_is_offlinable' riscv64-linux-gnu-ld: prelink.o: in function `reserve_offlined_page': /build/xen/common/page_alloc.c:1151: undefined reference to `page_is_offlinable' riscv64-linux-gnu-ld: ./.xen-syms.0: hidden symbol `page_is_offlinable' isn't defined riscv64-linux-gnu-ld: final link failed: bad value make[2]: *** [arch/riscv/Makefile:28: xen-syms] Error 1 To resolve these errors, the following functions have also been introduced, based on their Arm counterparts: - page_get_owner_and_reference() and its variant to safely acquire a reference to a page and retrieve its owner. - Implement page_is_offlinable() to return false for RISC-V. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/include/asm/mm.h | 9 +++++++-- xen/arch/riscv/mm.c | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 39 insertions(+), 2 deletions(-) diff --git a/xen/arch/riscv/include/asm/mm.h b/xen/arch/riscv/include/asm/mm.h index 08f500c99d..1a99e1cf0a 100644 --- a/xen/arch/riscv/include/asm/mm.h +++ b/xen/arch/riscv/include/asm/mm.h @@ -5,6 +5,7 @@ #include #include +#include #include #include #include @@ -300,8 +301,12 @@ static inline bool arch_mfns_in_directmap(unsigned long mfn, unsigned long nr) #define page_get_owner(p) (p)->v.inuse.domain #define page_set_owner(p, d) ((p)->v.inuse.domain = (d)) -/* TODO: implement */ -#define mfn_valid(mfn) ({ (void)(mfn); 0; }) +extern unsigned long start_page; + +#define mfn_valid(mfn) ({ \ + unsigned long tmp_mfn = mfn_x(mfn); \ + likely((tmp_mfn >= start_page)) && likely(__mfn_valid(tmp_mfn)); \ +}) #define PFN_ORDER(pg) ((pg)->v.free.order) diff --git a/xen/arch/riscv/mm.c b/xen/arch/riscv/mm.c index 2e42293986..e25f995b72 100644 --- a/xen/arch/riscv/mm.c +++ b/xen/arch/riscv/mm.c @@ -521,6 +521,8 @@ static void __init setup_directmap_mappings(unsigned long base_mfn, #error setup_{directmap,frametable}_mapping() should be implemented for RV_32 #endif +unsigned long __ro_after_init start_page; + /* * Setup memory management * @@ -570,9 +572,13 @@ void __init setup_mm(void) ram_end = max(ram_end, bank_end); setup_directmap_mappings(PFN_DOWN(bank_start), PFN_DOWN(bank_size)); + + set_pdx_range(paddr_to_pfn(bank_start), paddr_to_pfn(bank_end)); } setup_frametable_mappings(ram_start, ram_end); + + start_page = PFN_DOWN(ram_start); max_page = PFN_DOWN(ram_end); } @@ -623,6 +629,11 @@ void flush_page_to_ram(unsigned long mfn, bool sync_icache) invalidate_icache(); } +bool page_is_offlinable(mfn_t mfn) +{ + return false; +} + void put_page(struct page_info *page) { unsigned long nx, x, y = page->count_info; @@ -641,3 +652,24 @@ void put_page(struct page_info *page) free_domheap_page(page); } } + +struct domain *page_get_owner_and_reference(struct page_info *page) +{ + unsigned long x, y = page->count_info; + struct domain *owner; + + do { + x = y; + /* + * Count == 0: Page is not allocated, so we cannot take a reference. + * Count == -1: Reference count would wrap, which is invalid. + */ + if ( unlikely(((x + 1) & PGC_count_mask) <= 1) ) + return NULL; + } while ( (y = cmpxchg(&page->count_info, x, x + 1)) != x ); + + owner = page_get_owner(page); + ASSERT(owner); + + return owner; +} -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 15:55:05 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 15:55:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189873.1510597 (Exim 4.92) (envelope-from ) id 1vWGLH-0002aK-Bh; Thu, 18 Dec 2025 15:55:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189873.1510597; Thu, 18 Dec 2025 15:55:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWGLH-0002aC-98; Thu, 18 Dec 2025 15:55:03 +0000 Received: by outflank-mailman (input) for mailman id 1189873; Thu, 18 Dec 2025 15:55:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWGLF-0002a6-Ri for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] CI: Fix container build jobs Message-Id: Date: Thu, 18 Dec 2025 15:55:01 +0000 commit 54c7c5cd982340d76484a7a7af277e083c418fd3 Author: Anthony PERARD AuthorDate: Sun Dec 7 15:52:16 2025 +0100 Commit: Anthony PERARD CommitDate: Thu Dec 18 16:44:03 2025 +0100 CI: Fix container build jobs `docker:stable` tag hasn't been updated in 5 years, and has been deprecated, according to https://hub.docker.com/_/docker, while `docker:dind` (image use for the service) is using a recent version of docker. Now, `docker info` fails with: Error response from daemon: client version 1.40 is too old. ... Switch to a newer tag, and just the "cli" version which contains only the docker client. With that, both `:dind` and `:cli` should keep using the same version of version. (`:cli` seems to be the base image used to build `:dind`.) Signed-off-by: Anthony PERARD Acked-by: Andrew Cooper --- automation/gitlab-ci/containers.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/automation/gitlab-ci/containers.yaml b/automation/gitlab-ci/containers.yaml index 25e8bdc34b..8b702a1d82 100644 --- a/automation/gitlab-ci/containers.yaml +++ b/automation/gitlab-ci/containers.yaml @@ -1,6 +1,6 @@ .container-build-tmpl: stage: containers - image: docker:stable + image: docker:cli tags: - container-builder rules: -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 15:55:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 15:55:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1189874.1510601 (Exim 4.92) (envelope-from ) id 1vWGLR-0002cD-DC; Thu, 18 Dec 2025 15:55:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1189874.1510601; Thu, 18 Dec 2025 15:55:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWGLR-0002c5-AV; Thu, 18 Dec 2025 15:55:13 +0000 Received: by outflank-mailman (input) for mailman id 1189874; Thu, 18 Dec 2025 15:55:11 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWGLP-0002bp-TQ for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 15:55:11 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWGLP-00G2in-1v for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 15:55:11 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWGLP-000IPK-2g for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 15:55:11 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=hstJabwZZ0vjmY6MD52FCdrwUsD06LEkef9sKR4bR1Q=; b=TrC2Z/lqdMExpvuqPqNYhwhenS 8ho4z+ssOIid6HjQKseK1dpvyYSmlROOIfPY9M2It+3nAbENQ5F2Sljd/cOuMTmf1jAOuu3JcGm5+ CB3AYgAu37R8VD+EHdHZKD9T7mKEW8eupfsfPnoYb46ejeXVGr6wFkeDEGRk6yCZDmpk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] libxl: Fix device_add QMP calls with QEMU 9.2 and newer Message-Id: Date: Thu, 18 Dec 2025 15:55:11 +0000 commit 85e12104f47276b588d5efd33599c987c545eeb1 Author: Anthony PERARD AuthorDate: Mon Dec 15 14:51:24 2025 +0100 Commit: Anthony PERARD CommitDate: Thu Dec 18 16:44:03 2025 +0100 libxl: Fix device_add QMP calls with QEMU 9.2 and newer QEMU used to ignore JSON types and do conversion string <-> integer automatically for the command "device_add", but that was removed in QEMU 9.2 (428d1789df91 ("docs/about: Belatedly document tightening of QMP device_add checking")). Fixes: 9718ab394d5d ("libxl_usb: Make libxl__device_usbctrl_add uses ev_qmp") Fixes: 40c7eca10a82 ("libxl_usb: Make libxl__device_usbdev_add uses ev_qmp") Signed-off-by: Anthony PERARD Tested-by: Maximilian Engelhardt Reviewed-by: Juergen Gross --- tools/libs/light/libxl_usb.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/tools/libs/light/libxl_usb.c b/tools/libs/light/libxl_usb.c index c5ae59681c..4e7c409fe6 100644 --- a/tools/libs/light/libxl_usb.c +++ b/tools/libs/light/libxl_usb.c @@ -367,10 +367,10 @@ static int libxl__device_usbctrl_add_hvm(libxl__egc *egc, libxl__ev_qmp *qmp, case 3: libxl__qmp_param_add_string(gc, &qmp_args, "driver", "nec-usb-xhci"); - libxl__qmp_param_add_string(gc, &qmp_args, "p2", - GCSPRINTF("%d", usbctrl->ports)); - libxl__qmp_param_add_string(gc, &qmp_args, "p3", - GCSPRINTF("%d", usbctrl->ports)); + libxl__qmp_param_add_integer(gc, &qmp_args, "p2", + usbctrl->ports); + libxl__qmp_param_add_integer(gc, &qmp_args, "p3", + usbctrl->ports); break; default: abort(); /* Should not be possible. */ @@ -411,10 +411,10 @@ static int libxl__device_usbdev_add_hvm(libxl__egc *egc, libxl__ev_qmp *qmp, GCSPRINTF("xenusb-%d.0", usbdev->ctrl)); libxl__qmp_param_add_string(gc, &qmp_args, "port", GCSPRINTF("%d", usbdev->port)); - libxl__qmp_param_add_string(gc, &qmp_args, "hostbus", - GCSPRINTF("%d", usbdev->u.hostdev.hostbus)); - libxl__qmp_param_add_string(gc, &qmp_args, "hostaddr", - GCSPRINTF("%d", usbdev->u.hostdev.hostaddr)); + libxl__qmp_param_add_integer(gc, &qmp_args, "hostbus", + usbdev->u.hostdev.hostbus); + libxl__qmp_param_add_integer(gc, &qmp_args, "hostaddr", + usbdev->u.hostdev.hostaddr); return libxl__ev_qmp_send(egc, qmp, "device_add", qmp_args); } -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 17:33:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 17:33:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1190061.1510736 (Exim 4.92) (envelope-from ) id 1vWHs7-00067g-Qn; Thu, 18 Dec 2025 17:33:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1190061.1510736; Thu, 18 Dec 2025 17:33:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWHs7-00067X-N7; Thu, 18 Dec 2025 17:33:03 +0000 Received: by outflank-mailman (input) for mailman id 1190061; Thu, 18 Dec 2025 17:33:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWHs6-00067R-Ab for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 17:33:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWHs5-00G51g-37 for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 17:33:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWHs6-00CYch-0f for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 17:33:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=iFY6bN4REdlK/R1uJBnyHPtjRYP77capKBPtfGh14yo=; b=KsRZjbGCcVL8R2BQlFs6mwkW/w UNvxrYxTRdlUFQ1sK/p0gs3jZFV5VKu1zZoxt2N6u9PRHUyzkZdRUEpZ0a6kDwXLUOZVSgFIvjv9I nmLKKypGZgy0dVQN70Jf3Lg5qj2Iza2iwRnfzFQJB8h3RPoDT9gibSVB4gc3R9vU7ZA8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] CI: Fix container build jobs Message-Id: Date: Thu, 18 Dec 2025 17:33:02 +0000 commit 54c7c5cd982340d76484a7a7af277e083c418fd3 Author: Anthony PERARD AuthorDate: Sun Dec 7 15:52:16 2025 +0100 Commit: Anthony PERARD CommitDate: Thu Dec 18 16:44:03 2025 +0100 CI: Fix container build jobs `docker:stable` tag hasn't been updated in 5 years, and has been deprecated, according to https://hub.docker.com/_/docker, while `docker:dind` (image use for the service) is using a recent version of docker. Now, `docker info` fails with: Error response from daemon: client version 1.40 is too old. ... Switch to a newer tag, and just the "cli" version which contains only the docker client. With that, both `:dind` and `:cli` should keep using the same version of version. (`:cli` seems to be the base image used to build `:dind`.) Signed-off-by: Anthony PERARD Acked-by: Andrew Cooper --- automation/gitlab-ci/containers.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/automation/gitlab-ci/containers.yaml b/automation/gitlab-ci/containers.yaml index 25e8bdc34b..8b702a1d82 100644 --- a/automation/gitlab-ci/containers.yaml +++ b/automation/gitlab-ci/containers.yaml @@ -1,6 +1,6 @@ .container-build-tmpl: stage: containers - image: docker:stable + image: docker:cli tags: - container-builder rules: -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Dec 18 17:33:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 18 Dec 2025 17:33:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1190062.1510739 (Exim 4.92) (envelope-from ) id 1vWHsH-00069T-R9; Thu, 18 Dec 2025 17:33:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1190062.1510739; Thu, 18 Dec 2025 17:33:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWHsH-00069L-OS; Thu, 18 Dec 2025 17:33:13 +0000 Received: by outflank-mailman (input) for mailman id 1190062; Thu, 18 Dec 2025 17:33:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vWHsG-00069D-D1 for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 17:33:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vWHsG-00G51m-0H for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 17:33:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vWHsG-00CZsk-13 for xen-changelog@lists.xenproject.org; Thu, 18 Dec 2025 17:33:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=3envojy1NvKShEpMvIMQzvFmQcXuFiYXkvpekcKyPxw=; b=fXaSDpMnI6kPQpAepjhwma2x9C N1g1rjFzaaYMb4Vwa2/RpS+6SS86AcGJJrB8eAnsk6bjdIOfzDGu3d7ZfKce1B0ooTKI68rsf8TSK o7JOaBaE1v5TsT7VMBL8XeS+WfPuyaByVVak22AgsU3vH2FPbV8vkS/GOuqyovGbjIOI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] libxl: Fix device_add QMP calls with QEMU 9.2 and newer Message-Id: Date: Thu, 18 Dec 2025 17:33:12 +0000 commit 85e12104f47276b588d5efd33599c987c545eeb1 Author: Anthony PERARD AuthorDate: Mon Dec 15 14:51:24 2025 +0100 Commit: Anthony PERARD CommitDate: Thu Dec 18 16:44:03 2025 +0100 libxl: Fix device_add QMP calls with QEMU 9.2 and newer QEMU used to ignore JSON types and do conversion string <-> integer automatically for the command "device_add", but that was removed in QEMU 9.2 (428d1789df91 ("docs/about: Belatedly document tightening of QMP device_add checking")). Fixes: 9718ab394d5d ("libxl_usb: Make libxl__device_usbctrl_add uses ev_qmp") Fixes: 40c7eca10a82 ("libxl_usb: Make libxl__device_usbdev_add uses ev_qmp") Signed-off-by: Anthony PERARD Tested-by: Maximilian Engelhardt Reviewed-by: Juergen Gross --- tools/libs/light/libxl_usb.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/tools/libs/light/libxl_usb.c b/tools/libs/light/libxl_usb.c index c5ae59681c..4e7c409fe6 100644 --- a/tools/libs/light/libxl_usb.c +++ b/tools/libs/light/libxl_usb.c @@ -367,10 +367,10 @@ static int libxl__device_usbctrl_add_hvm(libxl__egc *egc, libxl__ev_qmp *qmp, case 3: libxl__qmp_param_add_string(gc, &qmp_args, "driver", "nec-usb-xhci"); - libxl__qmp_param_add_string(gc, &qmp_args, "p2", - GCSPRINTF("%d", usbctrl->ports)); - libxl__qmp_param_add_string(gc, &qmp_args, "p3", - GCSPRINTF("%d", usbctrl->ports)); + libxl__qmp_param_add_integer(gc, &qmp_args, "p2", + usbctrl->ports); + libxl__qmp_param_add_integer(gc, &qmp_args, "p3", + usbctrl->ports); break; default: abort(); /* Should not be possible. */ @@ -411,10 +411,10 @@ static int libxl__device_usbdev_add_hvm(libxl__egc *egc, libxl__ev_qmp *qmp, GCSPRINTF("xenusb-%d.0", usbdev->ctrl)); libxl__qmp_param_add_string(gc, &qmp_args, "port", GCSPRINTF("%d", usbdev->port)); - libxl__qmp_param_add_string(gc, &qmp_args, "hostbus", - GCSPRINTF("%d", usbdev->u.hostdev.hostbus)); - libxl__qmp_param_add_string(gc, &qmp_args, "hostaddr", - GCSPRINTF("%d", usbdev->u.hostdev.hostaddr)); + libxl__qmp_param_add_integer(gc, &qmp_args, "hostbus", + usbdev->u.hostdev.hostbus); + libxl__qmp_param_add_integer(gc, &qmp_args, "hostaddr", + usbdev->u.hostdev.hostaddr); return libxl__ev_qmp_send(egc, qmp, "device_add", qmp_args); } -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Mon Dec 29 09:55:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 29 Dec 2025 09:55:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1193942.1512436 (Exim 4.92) (envelope-from ) id 1va9xw-0007MB-Nn; Mon, 29 Dec 2025 09:55:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1193942.1512436; Mon, 29 Dec 2025 09:55:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1va9xw-0007M3-L4; Mon, 29 Dec 2025 09:55:04 +0000 Received: by outflank-mailman (input) for mailman id 1193942; Mon, 29 Dec 2025 09:55:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1va9xv-0007Lx-E1 for xen-changelog@lists.xenproject.org; Mon, 29 Dec 2025 09:55:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1va9xv-00Fe70-07 for xen-changelog@lists.xenproject.org; Mon, 29 Dec 2025 09:55:03 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1va9xv-00H5Ni-0o for xen-changelog@lists.xenproject.org; Mon, 29 Dec 2025 09:55:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=7CCfAduhaSyHs7m3hf33MVlQV6zal8DqC1Dc8PoKcTc=; b=zX7iuShUaiposQn6pjrSyLNO6Y XftRNd/e2wqq/t8I9YNe1lzJy2hHTww5WO8eqYcIQ/6Zb7W2xFircg8t/SMTcfW+xRO2MTmiEK/jw zQRkHCjKz2Je1Km/5CvDmpTtq+ITyY/pFGitnved14ytcjrMU14p7hEH75FyD8N5zCCA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] vPCI: avoid bogus "overlap in extended cap list" warnings Message-Id: Date: Mon, 29 Dec 2025 09:55:03 +0000 commit ed4e690ae11a60792f722729abb9ec68e64ffea3 Author: Jan Beulich AuthorDate: Mon Dec 29 09:34:41 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 29 09:34:41 2025 +0100 vPCI: avoid bogus "overlap in extended cap list" warnings Legacy PCI devices don't have any extended config space. Reading any part thereof may very well return all ones. That then necessarily means we would think we found a "loop", when there simply is nothing. Fixes: a845b50c12f3 ("vpci/header: Emulate extended capability list for dom0") Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné --- xen/drivers/vpci/header.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c index 469f497744..aae663bbf5 100644 --- a/xen/drivers/vpci/header.c +++ b/xen/drivers/vpci/header.c @@ -839,6 +839,15 @@ static int vpci_init_ext_capability_list(const struct pci_dev *pdev) uint32_t header = pci_conf_read32(pdev->sbdf, pos); int rc; + if ( header == 0xffffffffU ) + { + if ( pos != PCI_CFG_SPACE_SIZE ) + printk(XENLOG_WARNING + "%pd %pp: broken extended cap list, offset %#x\n", + pdev->domain, &pdev->sbdf, pos); + return 0; + } + rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL, pos, 4, (void *)(uintptr_t)header); if ( rc == -EEXIST ) -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Mon Dec 29 09:55:14 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 29 Dec 2025 09:55:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1193943.1512439 (Exim 4.92) (envelope-from ) id 1va9y6-0007Nf-Ou; Mon, 29 Dec 2025 09:55:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1193943.1512439; Mon, 29 Dec 2025 09:55:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1va9y6-0007NY-MV; Mon, 29 Dec 2025 09:55:14 +0000 Received: by outflank-mailman (input) for mailman id 1193943; Mon, 29 Dec 2025 09:55:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1va9y5-0007NC-F5 for xen-changelog@lists.xenproject.org; Mon, 29 Dec 2025 09:55:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1va9y5-00Fe74-0R for xen-changelog@lists.xenproject.org; Mon, 29 Dec 2025 09:55:13 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1va9y5-00H5f9-1E for xen-changelog@lists.xenproject.org; Mon, 29 Dec 2025 09:55:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=udCCxJ0aAEVmNLtmKCqSqNm+dST/i+sY+7bCnoFEB+M=; b=lmV4HfgD4DhjghBNNaE80xDyeX bHHeYgajqp9qinvlI+b+bDl69TFL0OWW9zJFkbMH4PyESRAFcztXcJvm9V8BUp8beNVMS69WA6gVx feU1FcBZ5Nz7mO01AtaB9cT3/21EFRj6BmQEN73ZYW/M95iWpLnhsuIh7SAIoWcMPeao=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] vPCI: make vpci_add_register() an out-of-line function Message-Id: Date: Mon, 29 Dec 2025 09:55:13 +0000 commit 62cb3c7510d2757cf1521cf918d832cfbcf9e1ed Author: Jan Beulich AuthorDate: Mon Dec 29 09:35:11 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 29 09:35:11 2025 +0100 vPCI: make vpci_add_register() an out-of-line function Calling a function with 10 arguments is inefficient on many architectures: x86-64 allows for up to 6 register parameters, Arm64 for up to 8. Everything else needs passing on the stack, i.e. forcing the compiler to emit stack manipulation insns at every call site. Shrinks generated code on x86 (with gcc15) by over 250 bytes. The gains on Arm64 are a little less. Signed-off-by: Jan Beulich Reviewed-by: Stewart Hildebrand Acked-by: Roger Pau Monné --- xen/drivers/vpci/vpci.c | 8 ++++++++ xen/include/xen/vpci.h | 14 +++++--------- 2 files changed, 13 insertions(+), 9 deletions(-) diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c index 07c7071d0a..c824bf8a8a 100644 --- a/xen/drivers/vpci/vpci.c +++ b/xen/drivers/vpci/vpci.c @@ -573,6 +573,14 @@ int vpci_add_register_mask(struct vpci *vpci, vpci_read_t *read_handler, return 0; } +int vpci_add_register(struct vpci *vpci, vpci_read_t *read_handler, + vpci_write_t *write_handler, unsigned int offset, + unsigned int size, void *data) +{ + return vpci_add_register_mask(vpci, read_handler, write_handler, offset, + size, data, 0, 0, 0, 0); +} + int vpci_remove_registers(struct vpci *vpci, unsigned int start, unsigned int size) { diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h index 9ae75d946a..d6310104ea 100644 --- a/xen/include/xen/vpci.h +++ b/xen/include/xen/vpci.h @@ -60,15 +60,11 @@ int __must_check vpci_add_register_mask(struct vpci *vpci, void *data, uint32_t ro_mask, uint32_t rw1c_mask, uint32_t rsvdp_mask, uint32_t rsvdz_mask); -static inline int __must_check vpci_add_register(struct vpci *vpci, - vpci_read_t *read_handler, - vpci_write_t *write_handler, - unsigned int offset, - unsigned int size, void *data) -{ - return vpci_add_register_mask(vpci, read_handler, write_handler, offset, - size, data, 0, 0, 0, 0); -} +int __must_check vpci_add_register(struct vpci *vpci, + vpci_read_t *read_handler, + vpci_write_t *write_handler, + unsigned int offset, unsigned int size, + void *data); int vpci_remove_registers(struct vpci *vpci, unsigned int start, unsigned int size); -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Mon Dec 29 09:55:24 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 29 Dec 2025 09:55:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1193944.1512443 (Exim 4.92) (envelope-from ) id 1va9yG-0007Py-QW; Mon, 29 Dec 2025 09:55:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1193944.1512443; Mon, 29 Dec 2025 09:55:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1va9yG-0007Pr-O6; Mon, 29 Dec 2025 09:55:24 +0000 Received: by outflank-mailman (input) for mailman id 1193944; Mon, 29 Dec 2025 09:55:23 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1va9yF-0007Pj-Jq for xen-changelog@lists.xenproject.org; Mon, 29 Dec 2025 09:55:23 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1va9yF-00Fe7A-0n for xen-changelog@lists.xenproject.org; Mon, 29 Dec 2025 09:55:23 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1va9yF-00H5yL-1Z for xen-changelog@lists.xenproject.org; Mon, 29 Dec 2025 09:55:23 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=4dgIH+10x2Qa8yuNEC0Tk84mgUHdGngwAaL1+Yobq6s=; b=lBvV23vDrYWv3Uh3cTEH5dBRbJ yc7JcYKq4S60my0ygr9udX9WmKpgqTiZp3EgFTTOmcODgCHnkyqZ4H3ltn5NEUMCJTHNXeMqHKrtO QHVPIAW5I6i1I3zkxYqZ7cvidTkvfCaxAD3N7HuCZgxrmi8EBP8DCiLpcrhD0FBI63fg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/riscv: introduce vSBI extension framework Message-Id: Date: Mon, 29 Dec 2025 09:55:23 +0000 commit e717a5a4ae52f8bf4c5d1d53109f11caa076478d Author: Oleksii Kurochko AuthorDate: Mon Dec 29 09:37:14 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 29 09:37:14 2025 +0100 xen/riscv: introduce vSBI extension framework Introduce support for handling virtual SBI extensions in Xen. The changes include: - Added new vsbi/core.c and vsbi.h files to implement virtual SBI extension handling. - Modified traps.c to handle CAUSE_VIRTUAL_SUPERVISOR_ECALL by calling vsbi_handle_ecall() when the trap originates from VS-mode. - Updated xen.lds.S to include a new .vsbi.exts section for virtual SBI extension data. - Updated Makefile to include the new vsbi/ directory in the build. - Add hstatus register to struct cpu_user_regs as it is needed for a check that CAUSE_VIRTUAL_SUPERVISOR_ECALL happens from VS-mode. Also, add storing/restoring of hstatus register in handle_trap(). - Introduce vsbi_find_extension() to check if vsbi extension is supported by Xen. For now it is called only inside vsbi/core.c, but in future it is going to be called from other files. - Introduce check_vsbi_ext_ranges() to check if there EIDs ranges overlapping between extensions. The implementation allows for registration and handling of SBI extensions via a new vsbi_ext structure and ".vsbi.exts" section, enabling extensible virtual SBI support for RISC-V guests. Note: All EIDs are printed in the format #%#lx and all FIDs in #%lu, as the SBI spec uses these formats. Printing them this way makes it easier to search for them in the SBI spec. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/entry.S | 6 ++++ xen/arch/riscv/include/asm/processor.h | 1 + xen/arch/riscv/include/asm/vsbi.h | 31 ++++++++++++++++++ xen/arch/riscv/riscv64/asm-offsets.c | 1 + xen/arch/riscv/setup.c | 3 ++ xen/arch/riscv/traps.c | 8 +++++ xen/arch/riscv/vsbi/Makefile | 1 + xen/arch/riscv/vsbi/core.c | 57 ++++++++++++++++++++++++++++++++++ xen/arch/riscv/xen.lds.S | 7 +++++ 10 files changed, 116 insertions(+) diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 9dde693db4..87c1148b00 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -20,6 +20,7 @@ obj-y += time.o obj-y += traps.o obj-y += vmid.o obj-y += vm_event.o +obj-y += vsbi/ $(TARGET): $(TARGET)-syms $(OBJCOPY) -O binary -S $< $@ diff --git a/xen/arch/riscv/entry.S b/xen/arch/riscv/entry.S index 4db818ba8d..202a35fb03 100644 --- a/xen/arch/riscv/entry.S +++ b/xen/arch/riscv/entry.S @@ -48,11 +48,17 @@ save_to_stack: csrr t0, CSR_SSTATUS REG_S t0, CPU_USER_REGS_SSTATUS(sp) + csrr t0, CSR_HSTATUS + REG_S t0, CPU_USER_REGS_HSTATUS(sp) + mv a0, sp call do_trap restore_registers: /* Restore stack_cpu_regs */ + REG_L t0, CPU_USER_REGS_HSTATUS(sp) + csrw CSR_HSTATUS, t0 + REG_L t0, CPU_USER_REGS_SEPC(sp) csrw CSR_SEPC, t0 REG_L t0, CPU_USER_REGS_SSTATUS(sp) diff --git a/xen/arch/riscv/include/asm/processor.h b/xen/arch/riscv/include/asm/processor.h index 2502045642..6b89df4a2d 100644 --- a/xen/arch/riscv/include/asm/processor.h +++ b/xen/arch/riscv/include/asm/processor.h @@ -49,6 +49,7 @@ struct cpu_user_regs unsigned long t6; unsigned long sepc; unsigned long sstatus; + unsigned long hstatus; /* pointer to previous stack_cpu_regs */ unsigned long pregs; }; diff --git a/xen/arch/riscv/include/asm/vsbi.h b/xen/arch/riscv/include/asm/vsbi.h new file mode 100644 index 0000000000..fa0cad604e --- /dev/null +++ b/xen/arch/riscv/include/asm/vsbi.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef ASM_RISCV_VSBI_H +#define ASM_RISCV_VSBI_H + +struct cpu_user_regs; + +struct vsbi_ext { + const char *name; + unsigned long eid_start; + unsigned long eid_end; + int (*handler)(unsigned long eid, unsigned long fid, + struct cpu_user_regs *regs); +}; + +/* Ranges (start and end) are inclusive within an extension */ +#define VSBI_EXT(ext, start, end, handle) \ +static const struct vsbi_ext vsbi_ext_##ext __used \ +__section(".vsbi.exts") = { \ + .name = #ext, \ + .eid_start = start, \ + .eid_end = end, \ + .handler = handle, \ +}; + +void vsbi_handle_ecall(struct cpu_user_regs *regs); +const struct vsbi_ext *vsbi_find_extension(unsigned long eid); + +void check_vsbi_ext_ranges(void); + +#endif diff --git a/xen/arch/riscv/riscv64/asm-offsets.c b/xen/arch/riscv/riscv64/asm-offsets.c index 3b5daf3b36..472cced4f8 100644 --- a/xen/arch/riscv/riscv64/asm-offsets.c +++ b/xen/arch/riscv/riscv64/asm-offsets.c @@ -49,6 +49,7 @@ void asm_offsets(void) OFFSET(CPU_USER_REGS_T6, struct cpu_user_regs, t6); OFFSET(CPU_USER_REGS_SEPC, struct cpu_user_regs, sepc); OFFSET(CPU_USER_REGS_SSTATUS, struct cpu_user_regs, sstatus); + OFFSET(CPU_USER_REGS_HSTATUS, struct cpu_user_regs, hstatus); OFFSET(CPU_USER_REGS_PREGS, struct cpu_user_regs, pregs); BLANK(); DEFINE(PCPU_INFO_SIZE, sizeof(struct pcpu_info)); diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index 8f46f1a1de..9b4835960d 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -26,6 +26,7 @@ #include #include #include +#include /* Xen stack for bringing up the first CPU. */ unsigned char __initdata cpu0_boot_stack[STACK_SIZE] @@ -110,6 +111,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id, end_boot_allocator(); + check_vsbi_ext_ranges(); + /* * The memory subsystem has been initialized, we can now switch from * early_boot -> boot. diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index f061004d83..e9c9677863 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -15,6 +15,7 @@ #include #include #include +#include /* * Initialize the trap handling. @@ -114,6 +115,13 @@ void do_trap(struct cpu_user_regs *cpu_regs) switch ( cause ) { + case CAUSE_VIRTUAL_SUPERVISOR_ECALL: + /* CAUSE_VIRTUAL_SUPERVISOR_ECALL should come from VS-mode */ + BUG_ON(!(cpu_regs->hstatus & HSTATUS_SPV)); + + vsbi_handle_ecall(cpu_regs); + break; + case CAUSE_ILLEGAL_INSTRUCTION: if ( do_bug_frame(cpu_regs, pc) >= 0 ) { diff --git a/xen/arch/riscv/vsbi/Makefile b/xen/arch/riscv/vsbi/Makefile new file mode 100644 index 0000000000..820eb10ac2 --- /dev/null +++ b/xen/arch/riscv/vsbi/Makefile @@ -0,0 +1 @@ +obj-y += core.o diff --git a/xen/arch/riscv/vsbi/core.c b/xen/arch/riscv/vsbi/core.c new file mode 100644 index 0000000000..f5ded8f676 --- /dev/null +++ b/xen/arch/riscv/vsbi/core.c @@ -0,0 +1,57 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +#include +#include +#include + +extern const struct vsbi_ext _svsbi_exts[], _evsbi_exts[]; + +void __init check_vsbi_ext_ranges(void) +{ + for ( const struct vsbi_ext *a = _svsbi_exts; a != _evsbi_exts; a++ ) + for ( const struct vsbi_ext *b = a + 1; b != _evsbi_exts; b++ ) + if ( !(a->eid_end < b->eid_start || b->eid_end < a->eid_start) ) + panic("EID range overlap detected: " + "%s:[#%#lx..#%#lx] vs %s:[#%#lx..#%#lx]\n", + a->name, a->eid_start, a->eid_end, + b->name, b->eid_start, b->eid_end); +} + +const struct vsbi_ext *vsbi_find_extension(unsigned long eid) +{ + for ( const struct vsbi_ext *ext = _svsbi_exts; + ext != _evsbi_exts; + ext++ ) + if ( (eid >= ext->eid_start) && (eid <= ext->eid_end) ) + return ext; + + return NULL; +} + +void vsbi_handle_ecall(struct cpu_user_regs *regs) +{ + const unsigned long eid = regs->a7; + const unsigned long fid = regs->a6; + const struct vsbi_ext *ext = vsbi_find_extension(eid); + int ret; + + if ( ext ) + ret = ext->handler(eid, fid, regs); + else + { + gprintk(XENLOG_ERR, "Unsupported Guest SBI EID #%#lx, FID #%lu\n", + eid, regs->a1); + ret = SBI_ERR_NOT_SUPPORTED; + } + + /* + * The ecall instruction is not part of the RISC-V C extension (compressed + * instructions), so it is always 4 bytes long. Therefore, it is safe to + * use a fixed length of 4 bytes instead of reading guest memory to + * determine the instruction length. + */ + regs->sepc += 4; + regs->a0 = ret; +} diff --git a/xen/arch/riscv/xen.lds.S b/xen/arch/riscv/xen.lds.S index 45d2e053d0..331a7d63d3 100644 --- a/xen/arch/riscv/xen.lds.S +++ b/xen/arch/riscv/xen.lds.S @@ -61,6 +61,13 @@ SECTIONS __note_gnu_build_id_end = .; } :note :text #endif + + . = ALIGN(POINTER_ALIGN); + DECL_SECTION(.vsbi.exts) { + _svsbi_exts = .; + *(.vsbi.exts) + _evsbi_exts = .; + } :text _erodata = .; /* End of read-only data */ . = ALIGN(PAGE_SIZE); -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Mon Dec 29 09:55:34 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 29 Dec 2025 09:55:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1193945.1512448 (Exim 4.92) (envelope-from ) id 1va9yQ-0007S6-S8; Mon, 29 Dec 2025 09:55:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1193945.1512448; Mon, 29 Dec 2025 09:55:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1va9yQ-0007Ry-PX; Mon, 29 Dec 2025 09:55:34 +0000 Received: by outflank-mailman (input) for mailman id 1193945; Mon, 29 Dec 2025 09:55:33 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1va9yP-0007Rq-Lo for xen-changelog@lists.xenproject.org; Mon, 29 Dec 2025 09:55:33 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1va9yP-00Fe9F-19 for xen-changelog@lists.xenproject.org; Mon, 29 Dec 2025 09:55:33 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1va9yP-00H6DJ-1v for xen-changelog@lists.xenproject.org; Mon, 29 Dec 2025 09:55:33 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=16m9uFk2SKekYPpnFggq7RmyrEHjusIGAutdMm+X5+8=; b=EgOIvRevWQ9ZR14o7NAvajZzlB yBJ+SMsqzuO3MwttCq/hoWqdwSH2ru3aSrFcRL198WvQkDKjuL2xgN/Vmo28yU+BZLHbD9573bIz6 VRFEYqCyh1me2fIXWdBjF/rmGFl5RjR85id2P/TdIxvSHBGwIwgpuNlO+sKMCeqiTEXo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] xen/riscv: add RISC-V legacy SBI extension support for guests Message-Id: Date: Mon, 29 Dec 2025 09:55:33 +0000 commit b367b2e9faee99755d093e5e4a588fbe787ad294 Author: Oleksii Kurochko AuthorDate: Mon Dec 29 09:37:56 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 29 09:37:56 2025 +0100 xen/riscv: add RISC-V legacy SBI extension support for guests Add support for legacy SBI extensions (version 0.1) in Xen for guest domains. The changes include: 1. Define all legacy SBI extension IDs (0x0 to 0x8) for better clarity and completeness. 2. Implement handling of legacy SBI extensions, starting with support for SBI_EXT_0_1_CONSOLE_PUTCHAR. SBI_EXT_0_1_CONSOLE_GETCHAR is marked as not supported as legacy SBI console related stuff is expected to be used only for early debugging of guest. The implementation uses the existing virtual SBI framework to handle legacy SBI ecalls, ensuring compatibility with older SBI specifications in RISC-V guests. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/include/asm/sbi.h | 11 ++++-- xen/arch/riscv/vsbi/Makefile | 1 + xen/arch/riscv/vsbi/legacy-extension.c | 64 ++++++++++++++++++++++++++++++++++ 3 files changed, 74 insertions(+), 2 deletions(-) diff --git a/xen/arch/riscv/include/asm/sbi.h b/xen/arch/riscv/include/asm/sbi.h index ade24a572d..751bae6d66 100644 --- a/xen/arch/riscv/include/asm/sbi.h +++ b/xen/arch/riscv/include/asm/sbi.h @@ -14,8 +14,15 @@ #include -#define SBI_EXT_0_1_CONSOLE_PUTCHAR 0x1 -#define SBI_EXT_0_1_SHUTDOWN 0x8 +#define SBI_EXT_0_1_SET_TIMER 0x0 +#define SBI_EXT_0_1_CONSOLE_PUTCHAR 0x1 +#define SBI_EXT_0_1_CONSOLE_GETCHAR 0x2 +#define SBI_EXT_0_1_CLEAR_IPI 0x3 +#define SBI_EXT_0_1_SEND_IPI 0x4 +#define SBI_EXT_0_1_REMOTE_FENCE_I 0x5 +#define SBI_EXT_0_1_REMOTE_SFENCE_VMA 0x6 +#define SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID 0x7 +#define SBI_EXT_0_1_SHUTDOWN 0x8 #define SBI_EXT_BASE 0x10 #define SBI_EXT_RFENCE 0x52464E43 diff --git a/xen/arch/riscv/vsbi/Makefile b/xen/arch/riscv/vsbi/Makefile index 820eb10ac2..bc5755cb13 100644 --- a/xen/arch/riscv/vsbi/Makefile +++ b/xen/arch/riscv/vsbi/Makefile @@ -1 +1,2 @@ obj-y += core.o +obj-y += legacy-extension.o diff --git a/xen/arch/riscv/vsbi/legacy-extension.c b/xen/arch/riscv/vsbi/legacy-extension.c new file mode 100644 index 0000000000..2e8df191c2 --- /dev/null +++ b/xen/arch/riscv/vsbi/legacy-extension.c @@ -0,0 +1,64 @@ + +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include + +#include +#include + +static void vsbi_print_char(char c) +{ + struct domain *currd = current->domain; + struct domain_console *cons = currd->console; + + if ( !is_console_printable(c) ) + return; + + spin_lock(&cons->lock); + ASSERT(cons->idx < ARRAY_SIZE(cons->buf)); + if ( c != '\n' ) + cons->buf[cons->idx++] = c; + if ( (cons->idx == (ARRAY_SIZE(cons->buf) - 1)) || (c == '\n') ) + { + cons->buf[cons->idx] = '\0'; + guest_printk(currd, XENLOG_G_DEBUG "%s\n", cons->buf); + cons->idx = 0; + } + spin_unlock(&cons->lock); +} + +static int vsbi_legacy_ecall_handler(unsigned long eid, unsigned long fid, + struct cpu_user_regs *regs) +{ + int ret = 0; + + switch ( eid ) + { + case SBI_EXT_0_1_CONSOLE_PUTCHAR: + vsbi_print_char(regs->a0); + break; + + case SBI_EXT_0_1_CONSOLE_GETCHAR: + ret = SBI_ERR_NOT_SUPPORTED; + break; + + default: + /* + * TODO: domain_crash() is acceptable here while things are still under + * development. + * It shouldn't stay like this in the end though: guests should not + * be punished like this for something Xen hasn't implemented. + */ + domain_crash(current->domain, + "%s: Unsupported legacy ecall: EID: #%#lx\n", + __func__, eid); + break; + } + + return ret; +} + +VSBI_EXT(legacy, SBI_EXT_0_1_SET_TIMER, SBI_EXT_0_1_SHUTDOWN, + vsbi_legacy_ecall_handler); -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Mon Dec 29 09:55:44 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 29 Dec 2025 09:55:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1193946.1512452 (Exim 4.92) (envelope-from ) id 1va9ya-0007Um-Ts; Mon, 29 Dec 2025 09:55:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1193946.1512452; Mon, 29 Dec 2025 09:55:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1va9ya-0007Ue-Qu; Mon, 29 Dec 2025 09:55:44 +0000 Received: by outflank-mailman (input) for mailman id 1193946; Mon, 29 Dec 2025 09:55:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1va9yZ-0007UY-PR for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] MAINTAINERS: remove myself as RISCV reviewer Message-Id: Date: Mon, 29 Dec 2025 09:55:43 +0000 commit 8f8fd5b945b0d93368e68ca44d405a05f3790524 Author: Bobby Eshleman AuthorDate: Mon Dec 29 09:38:17 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 29 09:38:17 2025 +0100 MAINTAINERS: remove myself as RISCV reviewer I haven't been actively reviewing Xen RISC-V patches for several years, so remove myself from the reviewer list to better reflect the current reality. The RISC-V port has come a long way thanks to Oleksii, current contributors, and maintainers, and it has been exciting to see. Many thanks to everyone, I hope we cross paths again in the future! Signed-off-by: Bobby Eshleman Acked-by: Roger Pau Monné --- MAINTAINERS | 1 - 1 file changed, 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index c70623153b..bf00be928c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -506,7 +506,6 @@ F: tools/hotplug/Linux/block-drbd-probe RISCV R: Alistair Francis -R: Bob Eshleman R: Connor Davis R: Oleksii Kurochko S: Supported -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Tue Dec 30 17:11:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 30 Dec 2025 17:11:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1194403.1512793 (Exim 4.92) (envelope-from ) id 1vadFQ-0006G3-24; Tue, 30 Dec 2025 17:11:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1194403.1512793; Tue, 30 Dec 2025 17:11:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vadFP-0006Fv-Va; Tue, 30 Dec 2025 17:11:03 +0000 Received: by outflank-mailman (input) for mailman id 1194403; Tue, 30 Dec 2025 17:11:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vadFO-0006Fp-Jt for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 17:11:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vadFO-00HLoF-0b for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 17:11:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vadFO-00015A-1L for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 17:11:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=bkCxFQtMg0dcGCLGFeOFd7DVplBOXQL/Tionf+9930o=; b=N+GXjLfRSwGljEMMUIWpVSvAEg kwPD01iFoHuM3DhvYBfsj89bJZ3l1FEz6oTCJBLKMTNq4BtAMrn9vYIiGHJiJ6IC/xmTNdaMQCtOA p5+lTTElZ2pyDv7TAKwdXtly0B5O+JrCuPqWqDcBR85x5Ei3d92VNFd1Ry/z7pEp6QEQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/pv: Address MISRA C:2012 Rule 4.1 Message-Id: Date: Tue, 30 Dec 2025 17:11:02 +0000 commit 6069a752cd904c7f72da67edb748c46845b7ea2f Author: Andrew Cooper AuthorDate: Fri Dec 12 19:31:46 2025 +0000 Commit: Andrew Cooper CommitDate: Tue Dec 30 16:02:38 2025 +0000 x86/pv: Address MISRA C:2012 Rule 4.1 MISRA doesn't like mixing hexadecimal escape sequences with ASCII text. Use the same workaround as in commit cd5048353725 ("xen: address MISRA C:2012 Rule 4.1"). No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Nicola Vetrini Acked-by: Jan Beulich --- xen/arch/x86/pv/emul-inv-op.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/pv/emul-inv-op.c b/xen/arch/x86/pv/emul-inv-op.c index 314ebd01cb..346ac1124d 100644 --- a/xen/arch/x86/pv/emul-inv-op.c +++ b/xen/arch/x86/pv/emul-inv-op.c @@ -26,7 +26,7 @@ static int emulate_forced_invalid_op(struct cpu_user_regs *regs) pv_inject_page_fault(0, eip + sizeof(sig) - rc); return EXCRET_fault_fixed; } - if ( memcmp(sig, "\xf\xbxen", sizeof(sig)) ) + if ( memcmp(sig, "\xf\xb" "xen", sizeof(sig)) ) return 0; eip += sizeof(sig); -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Tue Dec 30 17:11:14 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 30 Dec 2025 17:11:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1194404.1512797 (Exim 4.92) (envelope-from ) id 1vadFa-0006Hd-3O; Tue, 30 Dec 2025 17:11:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1194404.1512797; Tue, 30 Dec 2025 17:11:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vadFa-0006HV-0m; Tue, 30 Dec 2025 17:11:14 +0000 Received: by outflank-mailman (input) for mailman id 1194404; Tue, 30 Dec 2025 17:11:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vadFY-0006HM-J7 for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 17:11:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vadFY-00HLoe-0t for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 17:11:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vadFY-00016Z-1h for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 17:11:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=todGvF3cTbvh9HxsrQ1JM9RpSy1Ytym5pekGKpRVDtc=; b=QanilyIWiqqnLQFFaauoubtlDp TEmAt8rKQcZfpkBDqk92GeUgNiSacf6Jf3irFfnfz0NrG7VSfhm+IIcJocAFDH9BafkEzMEOi3Txr OpahmTIGFtajwf8mGh52LOC4kTALH8XbTAQTPn/JzEZsR3EhKx2QCcdiJOHuXCAYqxgw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86/pv: Change type of do_update_descriptor()'s desc parameter Message-Id: Date: Tue, 30 Dec 2025 17:11:12 +0000 commit c9f908772580e5efa09c23f96aabd47843d26f60 Author: Andrew Cooper AuthorDate: Fri Dec 12 19:43:22 2025 +0000 Commit: Andrew Cooper CommitDate: Tue Dec 30 16:02:38 2025 +0000 x86/pv: Change type of do_update_descriptor()'s desc parameter The automatically generated hypercall dispatch logic looks like: case __HYPERVISOR_update_descriptor: \ ret = do_update_descriptor((uint64_t)(a1), (seg_desc_t)(a2)); \ break; \ but seg_desc_t is a union and Eclair considers this to be a violation of MISRA Rule 1.1. There's also a Rule 8.3 violation for the parameter name mismatch. Instead of playing games trying to change seg_desc_t to be a struct, or to alter the AWK generator to know that seg_desc_t is magic and needs braces rather than brackets, just switch the type to be a plain uint64_t. The size is fixed by the x86 architecture, so it is never going to change. This even lets us simplify compat_update_descriptor() a little. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/pv/descriptor-tables.c | 10 ++++------ xen/include/hypercall-defs.c | 2 +- 2 files changed, 5 insertions(+), 7 deletions(-) diff --git a/xen/arch/x86/pv/descriptor-tables.c b/xen/arch/x86/pv/descriptor-tables.c index 26f7d18b11..8a32b9ae5c 100644 --- a/xen/arch/x86/pv/descriptor-tables.c +++ b/xen/arch/x86/pv/descriptor-tables.c @@ -179,11 +179,8 @@ int compat_set_gdt( int compat_update_descriptor( uint32_t pa_lo, uint32_t pa_hi, uint32_t desc_lo, uint32_t desc_hi) { - seg_desc_t d; - - d.raw = ((uint64_t)desc_hi << 32) | desc_lo; - - return do_update_descriptor(pa_lo | ((uint64_t)pa_hi << 32), d); + return do_update_descriptor(pa_lo | ((uint64_t)pa_hi << 32), + desc_lo | ((uint64_t)desc_hi << 32)); } #endif /* CONFIG_PV32 */ @@ -288,9 +285,10 @@ int validate_segdesc_page(struct page_info *page) return i == 512 ? 0 : -EINVAL; } -long do_update_descriptor(uint64_t gaddr, seg_desc_t d) +long do_update_descriptor(uint64_t gaddr, uint64_t desc) { struct domain *currd = current->domain; + seg_desc_t d = { .raw = desc }; gfn_t gfn = gaddr_to_gfn(gaddr); mfn_t mfn; seg_desc_t *entry; diff --git a/xen/include/hypercall-defs.c b/xen/include/hypercall-defs.c index cef08eeec1..5782cdfd14 100644 --- a/xen/include/hypercall-defs.c +++ b/xen/include/hypercall-defs.c @@ -184,7 +184,7 @@ mca(xen_mc_t *u_xen_mc) set_trap_table(const_trap_info_t *traps) set_gdt(xen_ulong_t *frame_list, unsigned int entries) set_callbacks(unsigned long event_address, unsigned long failsafe_address, unsigned long syscall_address) -update_descriptor(uint64_t gaddr, seg_desc_t desc) +update_descriptor(uint64_t gaddr, uint64_t desc) update_va_mapping(unsigned long va, uint64_t val64, unsigned long flags) update_va_mapping_otherdomain(unsigned long va, uint64_t val64, unsigned long flags, domid_t domid) #endif -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Tue Dec 30 17:11:24 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 30 Dec 2025 17:11:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1194405.1512801 (Exim 4.92) (envelope-from ) id 1vadFk-0006K9-4d; Tue, 30 Dec 2025 17:11:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1194405.1512801; Tue, 30 Dec 2025 17:11:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vadFk-0006K1-27; Tue, 30 Dec 2025 17:11:24 +0000 Received: by outflank-mailman (input) for mailman id 1194405; Tue, 30 Dec 2025 17:11:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vadFi-0006Ji-N3 for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 17:11:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vadFi-00HLoi-1E for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 17:11:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vadFi-00017o-23 for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 17:11:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ohzV7SGhwASnKoCZrkTw9qQB/claJN7qBVJw9RkDrJs=; b=Ss1oshJvmVkkvPOtrUFws1I7+b hd+y6oAW7eN8rAbYpV7fYI+J7GTiP2o7fmvdX49p1Rnh9yX5lEXEZw121SbXOP13c5xDWbbBAqrMa 7V7hc1XKehXSzKMf7GEVgDXeY/u2ypR1puEENipWok1bwPb+H6RngAzonvKo50tDPEwA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86: Address MISRA R8.3 (declaration/definition mismatch) issues Message-Id: Date: Tue, 30 Dec 2025 17:11:22 +0000 commit 2c0d554387348320eff1242f713c93cfdb30aa3a Author: Andrew Cooper AuthorDate: Fri Dec 12 20:05:10 2025 +0000 Commit: Andrew Cooper CommitDate: Tue Dec 30 16:02:38 2025 +0000 x86: Address MISRA R8.3 (declaration/definition mismatch) issues These are mostly name mismatches, but a couple have type alias mismatches too. For shadow_put_top_level() and is_patch(), the declaration name is the better choice so change the name in the function. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/include/asm/hypercall.h | 4 ++-- xen/arch/x86/include/asm/pv/mm.h | 4 ++-- xen/arch/x86/include/asm/shadow.h | 2 +- xen/arch/x86/mm.c | 4 ++-- xen/arch/x86/mm/shadow/common.c | 8 ++++---- xen/arch/x86/mm/shadow/multi.h | 4 ++-- xen/arch/x86/mm/shadow/private.h | 10 +++++----- xen/common/kimage.c | 2 +- xen/common/livepatch.c | 14 +++++++------- xen/include/xen/livepatch.h | 2 +- 10 files changed, 27 insertions(+), 27 deletions(-) diff --git a/xen/arch/x86/include/asm/hypercall.h b/xen/arch/x86/include/asm/hypercall.h index f6e9e2313b..bf2f0e169a 100644 --- a/xen/arch/x86/include/asm/hypercall.h +++ b/xen/arch/x86/include/asm/hypercall.h @@ -22,8 +22,8 @@ void pv_hypercall(struct cpu_user_regs *regs); #endif -void pv_ring1_init_hypercall_page(void *ptr); -void pv_ring3_init_hypercall_page(void *ptr); +void pv_ring1_init_hypercall_page(void *p); +void pv_ring3_init_hypercall_page(void *p); /* * Both do_mmuext_op() and do_mmu_update(): diff --git a/xen/arch/x86/include/asm/pv/mm.h b/xen/arch/x86/include/asm/pv/mm.h index 182764542c..a574590820 100644 --- a/xen/arch/x86/include/asm/pv/mm.h +++ b/xen/arch/x86/include/asm/pv/mm.h @@ -18,7 +18,7 @@ int pv_set_gdt(struct vcpu *v, const unsigned long frames[], unsigned int entries); void pv_destroy_gdt(struct vcpu *v); -bool pv_map_ldt_shadow_page(unsigned int off); +bool pv_map_ldt_shadow_page(unsigned int offset); bool pv_destroy_ldt(struct vcpu *v); int validate_segdesc_page(struct page_info *page); @@ -40,7 +40,7 @@ static inline int pv_set_gdt(struct vcpu *v, const unsigned long frames[], { ASSERT_UNREACHABLE(); return -EINVAL; } static inline void pv_destroy_gdt(struct vcpu *v) { ASSERT_UNREACHABLE(); } -static inline bool pv_map_ldt_shadow_page(unsigned int off) { return false; } +static inline bool pv_map_ldt_shadow_page(unsigned int offset) { return false; } static inline bool pv_destroy_ldt(struct vcpu *v) { ASSERT_UNREACHABLE(); return false; } diff --git a/xen/arch/x86/include/asm/shadow.h b/xen/arch/x86/include/asm/shadow.h index 9a8d1b8353..60589c3cac 100644 --- a/xen/arch/x86/include/asm/shadow.h +++ b/xen/arch/x86/include/asm/shadow.h @@ -63,7 +63,7 @@ int shadow_enable(struct domain *d, u32 mode); /* Enable VRAM dirty bit tracking. */ int shadow_track_dirty_vram(struct domain *d, - unsigned long first_pfn, + unsigned long begin_pfn, unsigned int nr_frames, XEN_GUEST_HANDLE(void) guest_dirty_bitmap); diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index b929d15d00..0d0d529295 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -4566,7 +4566,7 @@ static int __do_update_va_mapping( } long do_update_va_mapping( - unsigned long va, u64 val64, unsigned long flags) + unsigned long va, uint64_t val64, unsigned long flags) { int rc = __do_update_va_mapping(va, val64, flags, current->domain); @@ -4578,7 +4578,7 @@ long do_update_va_mapping( } long do_update_va_mapping_otherdomain( - unsigned long va, u64 val64, unsigned long flags, domid_t domid) + unsigned long va, uint64_t val64, unsigned long flags, domid_t domid) { struct domain *pg_owner; int rc; diff --git a/xen/arch/x86/mm/shadow/common.c b/xen/arch/x86/mm/shadow/common.c index f2aee5be46..f9310d008d 100644 --- a/xen/arch/x86/mm/shadow/common.c +++ b/xen/arch/x86/mm/shadow/common.c @@ -751,7 +751,7 @@ void shadow_promote(struct domain *d, mfn_t gmfn, unsigned int type) TRACE_SHADOW_PATH_FLAG(TRCE_SFLAG_PROMOTE); } -void shadow_demote(struct domain *d, mfn_t gmfn, u32 type) +void shadow_demote(struct domain *d, mfn_t gmfn, unsigned int type) { struct page_info *page = mfn_to_page(gmfn); @@ -2615,11 +2615,11 @@ pagetable_t sh_set_toplevel_shadow(struct vcpu *v, * Helper invoked when releasing of a top-level shadow's reference was * deferred in sh_set_toplevel_shadow() above. */ -void shadow_put_top_level(struct domain *d, pagetable_t old_entry) +void shadow_put_top_level(struct domain *d, pagetable_t old) { - ASSERT(!pagetable_is_null(old_entry)); + ASSERT(!pagetable_is_null(old)); paging_lock(d); - sh_put_ref(d, pagetable_get_mfn(old_entry), 0); + sh_put_ref(d, pagetable_get_mfn(old), 0); paging_unlock(d); } diff --git a/xen/arch/x86/mm/shadow/multi.h b/xen/arch/x86/mm/shadow/multi.h index 0e93859434..fc86d7a8d9 100644 --- a/xen/arch/x86/mm/shadow/multi.h +++ b/xen/arch/x86/mm/shadow/multi.h @@ -89,11 +89,11 @@ SHADOW_INTERNAL_NAME(sh_paging_mode, GUEST_LEVELS); #if SHADOW_OPTIMIZATIONS & SHOPT_OUT_OF_SYNC extern void SHADOW_INTERNAL_NAME(sh_resync_l1, GUEST_LEVELS) - (struct vcpu *v, mfn_t gmfn, mfn_t snpmfn); + (struct vcpu *v, mfn_t gl1mfn, mfn_t snpmfn); extern int SHADOW_INTERNAL_NAME(sh_safe_not_to_sync, GUEST_LEVELS) - (struct vcpu*v, mfn_t gmfn); + (struct vcpu*v, mfn_t gl1mfn); extern int SHADOW_INTERNAL_NAME(sh_rm_write_access_from_sl1p, GUEST_LEVELS) diff --git a/xen/arch/x86/mm/shadow/private.h b/xen/arch/x86/mm/shadow/private.h index 1ef908a380..e4eca60eb3 100644 --- a/xen/arch/x86/mm/shadow/private.h +++ b/xen/arch/x86/mm/shadow/private.h @@ -371,11 +371,11 @@ bool shadow_hash_delete(struct domain *d, unsigned long n, unsigned int t, mfn_t smfn); /* shadow promotion */ -void shadow_promote(struct domain *d, mfn_t gmfn, u32 type); -void shadow_demote(struct domain *d, mfn_t gmfn, u32 type); +void shadow_promote(struct domain *d, mfn_t gmfn, unsigned int type); +void shadow_demote(struct domain *d, mfn_t gmfn, unsigned int type); /* Shadow page allocation functions */ -bool __must_check shadow_prealloc(struct domain *d, unsigned int shadow_type, +bool __must_check shadow_prealloc(struct domain *d, unsigned int type, unsigned int count); mfn_t shadow_alloc(struct domain *d, u32 shadow_type, @@ -399,11 +399,11 @@ int sh_validate_guest_entry(struct vcpu *v, mfn_t gmfn, void *entry, u32 size); * Returns non-zero if we need to flush TLBs. * level and fault_addr desribe how we found this to be a pagetable; * level==0 means we have some other reason for revoking write access. */ -extern int sh_remove_write_access(struct domain *d, mfn_t readonly_mfn, +extern int sh_remove_write_access(struct domain *d, mfn_t gmfn, unsigned int level, unsigned long fault_addr); #else -static inline int sh_remove_write_access(struct domain *d, mfn_t readonly_mfn, +static inline int sh_remove_write_access(struct domain *d, mfn_t gmfn, unsigned int level, unsigned long fault_addr) { diff --git a/xen/common/kimage.c b/xen/common/kimage.c index 9961eac187..e1aec5a18a 100644 --- a/xen/common/kimage.c +++ b/xen/common/kimage.c @@ -66,7 +66,7 @@ static int kimage_is_destination_range(struct kexec_image *image, paddr_t start, paddr_t end); static struct page_info *kimage_alloc_page(struct kexec_image *image, - paddr_t dest); + paddr_t destination); static struct page_info *kimage_alloc_zeroed_page(unsigned memflags) { diff --git a/xen/common/livepatch.c b/xen/common/livepatch.c index d0da2aa281..7446533c8c 100644 --- a/xen/common/livepatch.c +++ b/xen/common/livepatch.c @@ -107,7 +107,7 @@ static int verify_payload(const struct xen_sysctl_livepatch_upload *upload, char return 0; } -bool is_patch(const void *ptr) +bool is_patch(const void *addr) { const struct payload *data; bool r = false; @@ -115,12 +115,12 @@ bool is_patch(const void *ptr) rcu_read_lock(&rcu_payload_lock); list_for_each_entry_rcu ( data, &payload_list, list ) { - if ( (ptr >= data->rw_addr && - ptr < (data->rw_addr + data->rw_size)) || - (ptr >= data->ro_addr && - ptr < (data->ro_addr + data->ro_size)) || - (ptr >= data->text_addr && - ptr < (data->text_addr + data->text_size)) ) + if ( (addr >= data->rw_addr && + addr < (data->rw_addr + data->rw_size)) || + (addr >= data->ro_addr && + addr < (data->ro_addr + data->ro_size)) || + (addr >= data->text_addr && + addr < (data->text_addr + data->text_size)) ) { r = 1; break; diff --git a/xen/include/xen/livepatch.h b/xen/include/xen/livepatch.h index 3f5ad01f1b..45c8924f34 100644 --- a/xen/include/xen/livepatch.h +++ b/xen/include/xen/livepatch.h @@ -89,7 +89,7 @@ enum va_type { * Function to secure the allocate pages (from arch_livepatch_alloc_payload) * with the right page permissions. */ -int arch_livepatch_secure(const void *va, unsigned int pages, enum va_type types); +int arch_livepatch_secure(const void *va, unsigned int pages, enum va_type type); void arch_livepatch_init(void); -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Tue Dec 30 17:11:34 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 30 Dec 2025 17:11:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1194406.1512804 (Exim 4.92) (envelope-from ) id 1vadFu-0006MM-5y; Tue, 30 Dec 2025 17:11:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1194406.1512804; Tue, 30 Dec 2025 17:11:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vadFu-0006ME-3V; Tue, 30 Dec 2025 17:11:34 +0000 Received: by outflank-mailman (input) for mailman id 1194406; Tue, 30 Dec 2025 17:11:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vadFs-0006M1-Pb for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen staging] x86: Address MIRSA R8.4 (declaration visibility) issues Message-Id: Date: Tue, 30 Dec 2025 17:11:32 +0000 commit c36ddba28e314e9350f4024972023b52e34ec73e Author: Andrew Cooper AuthorDate: Fri Dec 12 20:14:56 2025 +0000 Commit: Andrew Cooper CommitDate: Tue Dec 30 16:02:38 2025 +0000 x86: Address MIRSA R8.4 (declaration visibility) issues set_guest_*_trapbounce() are only called from assembly so gain asmlinkage to identify them. xen_msr_s_cet_value() is called by assembly and C, so asmlinkage isn't appropriate. Make the declaration unconditional, which silences the complaint. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/pv/traps.c | 4 ++-- xen/arch/x86/setup.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/pv/traps.c b/xen/arch/x86/pv/traps.c index c3c0976c44..26a468108a 100644 --- a/xen/arch/x86/pv/traps.c +++ b/xen/arch/x86/pv/traps.c @@ -99,7 +99,7 @@ void pv_inject_event(const struct x86_event *event) * Called from asm to set up the MCE trapbounce info. * Returns false no callback is set up, else true. */ -bool set_guest_machinecheck_trapbounce(void) +bool asmlinkage set_guest_machinecheck_trapbounce(void) { struct vcpu *curr = current; struct trap_bounce *tb = &curr->arch.pv.trap_bounce; @@ -114,7 +114,7 @@ bool set_guest_machinecheck_trapbounce(void) * Called from asm to set up the NMI trapbounce info. * Returns false if no callback is set up, else true. */ -bool set_guest_nmi_trapbounce(void) +bool asmlinkage set_guest_nmi_trapbounce(void) { struct vcpu *curr = current; struct trap_bounce *tb = &curr->arch.pv.trap_bounce; diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index 44da5efa1d..27c63d1d97 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -877,6 +877,8 @@ static void noreturn init_done(void) startup_cpu_idle_loop(); } +unsigned int xen_msr_s_cet_value(void); /* To avoid ifdefary, and placate MISRA */ + #if defined(CONFIG_XEN_SHSTK) || defined(CONFIG_XEN_IBT) /* * Used by AP and S3 asm code to calcualte the appropriate MSR_S_CET setting. @@ -888,8 +890,6 @@ unsigned int xen_msr_s_cet_value(void) return ((cpu_has_xen_shstk ? CET_SHSTK_EN | CET_WRSS_EN : 0) | (cpu_has_xen_ibt ? CET_ENDBR_EN : 0)); } -#else -unsigned int xen_msr_s_cet_value(void); /* To avoid ifdefary */ #endif /* Reinitalise all state referring to the old virtual address of the stack. */ -- generated by git-patchbot for /home/xen/git/xen.git#staging From xen-changelog-bounces@lists.xenproject.org Tue Dec 30 18:22:09 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 30 Dec 2025 18:22:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1194430.1512828 (Exim 4.92) (envelope-from ) id 1vaeM7-0006o8-C4; Tue, 30 Dec 2025 18:22:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1194430.1512828; Tue, 30 Dec 2025 18:22:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vaeM7-0006o0-9T; Tue, 30 Dec 2025 18:22:03 +0000 Received: by outflank-mailman (input) for mailman id 1194430; Tue, 30 Dec 2025 18:22:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vaeM6-0006nu-Fs for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 18:22:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vaeM6-00HN49-0U for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 18:22:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vaeM6-0004wr-15 for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 18:22:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=CVf7r+xh0LklZktZ+Q3Ok7LOAI7WkxIKakuXtkioRy8=; b=NvjtwxYeUUXWLZAh/NLzLCOAkO IegVMUgnsZe2odcAaoRcF0uTYykmr6BgadLFzLHvLMZIQPVm2F27/w5qv6d2lnClvLFRAiXdnuxKl pPU7zi1Zrux3e9h0XhQclQwe3hGAhxvyYfHJg/2ObdCP+FtL3tgoEIrCbr46C3LKAKJU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] vPCI: avoid bogus "overlap in extended cap list" warnings Message-Id: Date: Tue, 30 Dec 2025 18:22:02 +0000 commit ed4e690ae11a60792f722729abb9ec68e64ffea3 Author: Jan Beulich AuthorDate: Mon Dec 29 09:34:41 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 29 09:34:41 2025 +0100 vPCI: avoid bogus "overlap in extended cap list" warnings Legacy PCI devices don't have any extended config space. Reading any part thereof may very well return all ones. That then necessarily means we would think we found a "loop", when there simply is nothing. Fixes: a845b50c12f3 ("vpci/header: Emulate extended capability list for dom0") Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné --- xen/drivers/vpci/header.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c index 469f497744..aae663bbf5 100644 --- a/xen/drivers/vpci/header.c +++ b/xen/drivers/vpci/header.c @@ -839,6 +839,15 @@ static int vpci_init_ext_capability_list(const struct pci_dev *pdev) uint32_t header = pci_conf_read32(pdev->sbdf, pos); int rc; + if ( header == 0xffffffffU ) + { + if ( pos != PCI_CFG_SPACE_SIZE ) + printk(XENLOG_WARNING + "%pd %pp: broken extended cap list, offset %#x\n", + pdev->domain, &pdev->sbdf, pos); + return 0; + } + rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL, pos, 4, (void *)(uintptr_t)header); if ( rc == -EEXIST ) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Dec 30 18:22:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 30 Dec 2025 18:22:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1194431.1512833 (Exim 4.92) (envelope-from ) id 1vaeMH-0006pd-DU; Tue, 30 Dec 2025 18:22:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1194431.1512833; Tue, 30 Dec 2025 18:22:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vaeMH-0006pV-An; Tue, 30 Dec 2025 18:22:13 +0000 Received: by outflank-mailman (input) for mailman id 1194431; Tue, 30 Dec 2025 18:22:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vaeMG-0006pN-NF for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 18:22:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vaeMG-00HN4X-0w for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 18:22:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vaeMG-0004xQ-1a for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 18:22:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=8/7i5WwTdw7vRR00YbJrVUCT3tqEbh3bLNaaxbHyS5c=; b=Z4D2X9vHA+54K/BjVKNjB05dZ2 0LgJu+X3smw4YoP6Np3qhoEiAZIW+S3so3EIvoEFN3anaA8IUceTiIKZc169lawhFOTyoD7YhvrIE hf5gA6nKpx9HP5K8KnirLB7CkYzCTF4ySyioio3fp/Intst00e2s9t41NMngmdAz+MDU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] vPCI: make vpci_add_register() an out-of-line function Message-Id: Date: Tue, 30 Dec 2025 18:22:12 +0000 commit 62cb3c7510d2757cf1521cf918d832cfbcf9e1ed Author: Jan Beulich AuthorDate: Mon Dec 29 09:35:11 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 29 09:35:11 2025 +0100 vPCI: make vpci_add_register() an out-of-line function Calling a function with 10 arguments is inefficient on many architectures: x86-64 allows for up to 6 register parameters, Arm64 for up to 8. Everything else needs passing on the stack, i.e. forcing the compiler to emit stack manipulation insns at every call site. Shrinks generated code on x86 (with gcc15) by over 250 bytes. The gains on Arm64 are a little less. Signed-off-by: Jan Beulich Reviewed-by: Stewart Hildebrand Acked-by: Roger Pau Monné --- xen/drivers/vpci/vpci.c | 8 ++++++++ xen/include/xen/vpci.h | 14 +++++--------- 2 files changed, 13 insertions(+), 9 deletions(-) diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c index 07c7071d0a..c824bf8a8a 100644 --- a/xen/drivers/vpci/vpci.c +++ b/xen/drivers/vpci/vpci.c @@ -573,6 +573,14 @@ int vpci_add_register_mask(struct vpci *vpci, vpci_read_t *read_handler, return 0; } +int vpci_add_register(struct vpci *vpci, vpci_read_t *read_handler, + vpci_write_t *write_handler, unsigned int offset, + unsigned int size, void *data) +{ + return vpci_add_register_mask(vpci, read_handler, write_handler, offset, + size, data, 0, 0, 0, 0); +} + int vpci_remove_registers(struct vpci *vpci, unsigned int start, unsigned int size) { diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h index 9ae75d946a..d6310104ea 100644 --- a/xen/include/xen/vpci.h +++ b/xen/include/xen/vpci.h @@ -60,15 +60,11 @@ int __must_check vpci_add_register_mask(struct vpci *vpci, void *data, uint32_t ro_mask, uint32_t rw1c_mask, uint32_t rsvdp_mask, uint32_t rsvdz_mask); -static inline int __must_check vpci_add_register(struct vpci *vpci, - vpci_read_t *read_handler, - vpci_write_t *write_handler, - unsigned int offset, - unsigned int size, void *data) -{ - return vpci_add_register_mask(vpci, read_handler, write_handler, offset, - size, data, 0, 0, 0, 0); -} +int __must_check vpci_add_register(struct vpci *vpci, + vpci_read_t *read_handler, + vpci_write_t *write_handler, + unsigned int offset, unsigned int size, + void *data); int vpci_remove_registers(struct vpci *vpci, unsigned int start, unsigned int size); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Dec 30 18:22:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 30 Dec 2025 18:22:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1194433.1512837 (Exim 4.92) (envelope-from ) id 1vaeMR-0006sV-GM; Tue, 30 Dec 2025 18:22:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1194433.1512837; Tue, 30 Dec 2025 18:22:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vaeMR-0006sN-Dc; Tue, 30 Dec 2025 18:22:23 +0000 Received: by outflank-mailman (input) for mailman id 1194433; Tue, 30 Dec 2025 18:22:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vaeMQ-0006sF-Or for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 18:22:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vaeMQ-00HN4b-1S for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 18:22:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vaeMQ-0004y3-24 for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 18:22:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=gVMahZy8pJY2l1Z3OI1XPQB1BxpMbv7a5loBmyq6nzE=; b=phhf38VtZmILAv9CCo6NlIJFyf bk6wHzemnKkMDAnlKFcitQRxojcDNaamRa4RgyCaycnl7yVxwaWjllNcg8j/ZYNi1CVvRyBP0/GtR 1da4Iwv5KfrQRWK1keRG1oZ4Pi2+RT9skknBq6xOABuUFMjjVoO2+rRB1O93cIfEgo3s=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/riscv: introduce vSBI extension framework Message-Id: Date: Tue, 30 Dec 2025 18:22:22 +0000 commit e717a5a4ae52f8bf4c5d1d53109f11caa076478d Author: Oleksii Kurochko AuthorDate: Mon Dec 29 09:37:14 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 29 09:37:14 2025 +0100 xen/riscv: introduce vSBI extension framework Introduce support for handling virtual SBI extensions in Xen. The changes include: - Added new vsbi/core.c and vsbi.h files to implement virtual SBI extension handling. - Modified traps.c to handle CAUSE_VIRTUAL_SUPERVISOR_ECALL by calling vsbi_handle_ecall() when the trap originates from VS-mode. - Updated xen.lds.S to include a new .vsbi.exts section for virtual SBI extension data. - Updated Makefile to include the new vsbi/ directory in the build. - Add hstatus register to struct cpu_user_regs as it is needed for a check that CAUSE_VIRTUAL_SUPERVISOR_ECALL happens from VS-mode. Also, add storing/restoring of hstatus register in handle_trap(). - Introduce vsbi_find_extension() to check if vsbi extension is supported by Xen. For now it is called only inside vsbi/core.c, but in future it is going to be called from other files. - Introduce check_vsbi_ext_ranges() to check if there EIDs ranges overlapping between extensions. The implementation allows for registration and handling of SBI extensions via a new vsbi_ext structure and ".vsbi.exts" section, enabling extensible virtual SBI support for RISC-V guests. Note: All EIDs are printed in the format #%#lx and all FIDs in #%lu, as the SBI spec uses these formats. Printing them this way makes it easier to search for them in the SBI spec. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/entry.S | 6 ++++ xen/arch/riscv/include/asm/processor.h | 1 + xen/arch/riscv/include/asm/vsbi.h | 31 ++++++++++++++++++ xen/arch/riscv/riscv64/asm-offsets.c | 1 + xen/arch/riscv/setup.c | 3 ++ xen/arch/riscv/traps.c | 8 +++++ xen/arch/riscv/vsbi/Makefile | 1 + xen/arch/riscv/vsbi/core.c | 57 ++++++++++++++++++++++++++++++++++ xen/arch/riscv/xen.lds.S | 7 +++++ 10 files changed, 116 insertions(+) diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 9dde693db4..87c1148b00 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -20,6 +20,7 @@ obj-y += time.o obj-y += traps.o obj-y += vmid.o obj-y += vm_event.o +obj-y += vsbi/ $(TARGET): $(TARGET)-syms $(OBJCOPY) -O binary -S $< $@ diff --git a/xen/arch/riscv/entry.S b/xen/arch/riscv/entry.S index 4db818ba8d..202a35fb03 100644 --- a/xen/arch/riscv/entry.S +++ b/xen/arch/riscv/entry.S @@ -48,11 +48,17 @@ save_to_stack: csrr t0, CSR_SSTATUS REG_S t0, CPU_USER_REGS_SSTATUS(sp) + csrr t0, CSR_HSTATUS + REG_S t0, CPU_USER_REGS_HSTATUS(sp) + mv a0, sp call do_trap restore_registers: /* Restore stack_cpu_regs */ + REG_L t0, CPU_USER_REGS_HSTATUS(sp) + csrw CSR_HSTATUS, t0 + REG_L t0, CPU_USER_REGS_SEPC(sp) csrw CSR_SEPC, t0 REG_L t0, CPU_USER_REGS_SSTATUS(sp) diff --git a/xen/arch/riscv/include/asm/processor.h b/xen/arch/riscv/include/asm/processor.h index 2502045642..6b89df4a2d 100644 --- a/xen/arch/riscv/include/asm/processor.h +++ b/xen/arch/riscv/include/asm/processor.h @@ -49,6 +49,7 @@ struct cpu_user_regs unsigned long t6; unsigned long sepc; unsigned long sstatus; + unsigned long hstatus; /* pointer to previous stack_cpu_regs */ unsigned long pregs; }; diff --git a/xen/arch/riscv/include/asm/vsbi.h b/xen/arch/riscv/include/asm/vsbi.h new file mode 100644 index 0000000000..fa0cad604e --- /dev/null +++ b/xen/arch/riscv/include/asm/vsbi.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef ASM_RISCV_VSBI_H +#define ASM_RISCV_VSBI_H + +struct cpu_user_regs; + +struct vsbi_ext { + const char *name; + unsigned long eid_start; + unsigned long eid_end; + int (*handler)(unsigned long eid, unsigned long fid, + struct cpu_user_regs *regs); +}; + +/* Ranges (start and end) are inclusive within an extension */ +#define VSBI_EXT(ext, start, end, handle) \ +static const struct vsbi_ext vsbi_ext_##ext __used \ +__section(".vsbi.exts") = { \ + .name = #ext, \ + .eid_start = start, \ + .eid_end = end, \ + .handler = handle, \ +}; + +void vsbi_handle_ecall(struct cpu_user_regs *regs); +const struct vsbi_ext *vsbi_find_extension(unsigned long eid); + +void check_vsbi_ext_ranges(void); + +#endif diff --git a/xen/arch/riscv/riscv64/asm-offsets.c b/xen/arch/riscv/riscv64/asm-offsets.c index 3b5daf3b36..472cced4f8 100644 --- a/xen/arch/riscv/riscv64/asm-offsets.c +++ b/xen/arch/riscv/riscv64/asm-offsets.c @@ -49,6 +49,7 @@ void asm_offsets(void) OFFSET(CPU_USER_REGS_T6, struct cpu_user_regs, t6); OFFSET(CPU_USER_REGS_SEPC, struct cpu_user_regs, sepc); OFFSET(CPU_USER_REGS_SSTATUS, struct cpu_user_regs, sstatus); + OFFSET(CPU_USER_REGS_HSTATUS, struct cpu_user_regs, hstatus); OFFSET(CPU_USER_REGS_PREGS, struct cpu_user_regs, pregs); BLANK(); DEFINE(PCPU_INFO_SIZE, sizeof(struct pcpu_info)); diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index 8f46f1a1de..9b4835960d 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -26,6 +26,7 @@ #include #include #include +#include /* Xen stack for bringing up the first CPU. */ unsigned char __initdata cpu0_boot_stack[STACK_SIZE] @@ -110,6 +111,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id, end_boot_allocator(); + check_vsbi_ext_ranges(); + /* * The memory subsystem has been initialized, we can now switch from * early_boot -> boot. diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index f061004d83..e9c9677863 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -15,6 +15,7 @@ #include #include #include +#include /* * Initialize the trap handling. @@ -114,6 +115,13 @@ void do_trap(struct cpu_user_regs *cpu_regs) switch ( cause ) { + case CAUSE_VIRTUAL_SUPERVISOR_ECALL: + /* CAUSE_VIRTUAL_SUPERVISOR_ECALL should come from VS-mode */ + BUG_ON(!(cpu_regs->hstatus & HSTATUS_SPV)); + + vsbi_handle_ecall(cpu_regs); + break; + case CAUSE_ILLEGAL_INSTRUCTION: if ( do_bug_frame(cpu_regs, pc) >= 0 ) { diff --git a/xen/arch/riscv/vsbi/Makefile b/xen/arch/riscv/vsbi/Makefile new file mode 100644 index 0000000000..820eb10ac2 --- /dev/null +++ b/xen/arch/riscv/vsbi/Makefile @@ -0,0 +1 @@ +obj-y += core.o diff --git a/xen/arch/riscv/vsbi/core.c b/xen/arch/riscv/vsbi/core.c new file mode 100644 index 0000000000..f5ded8f676 --- /dev/null +++ b/xen/arch/riscv/vsbi/core.c @@ -0,0 +1,57 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +#include +#include +#include + +extern const struct vsbi_ext _svsbi_exts[], _evsbi_exts[]; + +void __init check_vsbi_ext_ranges(void) +{ + for ( const struct vsbi_ext *a = _svsbi_exts; a != _evsbi_exts; a++ ) + for ( const struct vsbi_ext *b = a + 1; b != _evsbi_exts; b++ ) + if ( !(a->eid_end < b->eid_start || b->eid_end < a->eid_start) ) + panic("EID range overlap detected: " + "%s:[#%#lx..#%#lx] vs %s:[#%#lx..#%#lx]\n", + a->name, a->eid_start, a->eid_end, + b->name, b->eid_start, b->eid_end); +} + +const struct vsbi_ext *vsbi_find_extension(unsigned long eid) +{ + for ( const struct vsbi_ext *ext = _svsbi_exts; + ext != _evsbi_exts; + ext++ ) + if ( (eid >= ext->eid_start) && (eid <= ext->eid_end) ) + return ext; + + return NULL; +} + +void vsbi_handle_ecall(struct cpu_user_regs *regs) +{ + const unsigned long eid = regs->a7; + const unsigned long fid = regs->a6; + const struct vsbi_ext *ext = vsbi_find_extension(eid); + int ret; + + if ( ext ) + ret = ext->handler(eid, fid, regs); + else + { + gprintk(XENLOG_ERR, "Unsupported Guest SBI EID #%#lx, FID #%lu\n", + eid, regs->a1); + ret = SBI_ERR_NOT_SUPPORTED; + } + + /* + * The ecall instruction is not part of the RISC-V C extension (compressed + * instructions), so it is always 4 bytes long. Therefore, it is safe to + * use a fixed length of 4 bytes instead of reading guest memory to + * determine the instruction length. + */ + regs->sepc += 4; + regs->a0 = ret; +} diff --git a/xen/arch/riscv/xen.lds.S b/xen/arch/riscv/xen.lds.S index 45d2e053d0..331a7d63d3 100644 --- a/xen/arch/riscv/xen.lds.S +++ b/xen/arch/riscv/xen.lds.S @@ -61,6 +61,13 @@ SECTIONS __note_gnu_build_id_end = .; } :note :text #endif + + . = ALIGN(POINTER_ALIGN); + DECL_SECTION(.vsbi.exts) { + _svsbi_exts = .; + *(.vsbi.exts) + _evsbi_exts = .; + } :text _erodata = .; /* End of read-only data */ . = ALIGN(PAGE_SIZE); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Dec 30 18:22:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 30 Dec 2025 18:22:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1194434.1512840 (Exim 4.92) (envelope-from ) id 1vaeMb-0006un-Hc; Tue, 30 Dec 2025 18:22:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1194434.1512840; Tue, 30 Dec 2025 18:22:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vaeMb-0006uf-Ey; Tue, 30 Dec 2025 18:22:33 +0000 Received: by outflank-mailman (input) for mailman id 1194434; Tue, 30 Dec 2025 18:22:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vaeMa-0006uY-TP for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 18:22:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vaeMa-00HN4f-1v for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 18:22:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vaeMa-0004zg-2Y for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 18:22:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=8qYkl3rcwPFnVkvmEZ3qspXGC1sKI/ve+eabCNnqrJY=; b=cMVlBAFtx1m2XdUaZ6tjCt7JDK 1tmGxQYAoCKtj1neiTJ8LDn8rrr7ZP3QX1bxIBtCX4CGeeFqQBQ2nMCk8CCXxyZdElfhGquegpG2t Tynl3Jk1/j9pk3Cm20k6T4/cqhc9Zuo5//dlt+f0CBGRiVgY4zqOZGn8Ni9jBaUE5WWs=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/riscv: add RISC-V legacy SBI extension support for guests Message-Id: Date: Tue, 30 Dec 2025 18:22:32 +0000 commit b367b2e9faee99755d093e5e4a588fbe787ad294 Author: Oleksii Kurochko AuthorDate: Mon Dec 29 09:37:56 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 29 09:37:56 2025 +0100 xen/riscv: add RISC-V legacy SBI extension support for guests Add support for legacy SBI extensions (version 0.1) in Xen for guest domains. The changes include: 1. Define all legacy SBI extension IDs (0x0 to 0x8) for better clarity and completeness. 2. Implement handling of legacy SBI extensions, starting with support for SBI_EXT_0_1_CONSOLE_PUTCHAR. SBI_EXT_0_1_CONSOLE_GETCHAR is marked as not supported as legacy SBI console related stuff is expected to be used only for early debugging of guest. The implementation uses the existing virtual SBI framework to handle legacy SBI ecalls, ensuring compatibility with older SBI specifications in RISC-V guests. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/include/asm/sbi.h | 11 ++++-- xen/arch/riscv/vsbi/Makefile | 1 + xen/arch/riscv/vsbi/legacy-extension.c | 64 ++++++++++++++++++++++++++++++++++ 3 files changed, 74 insertions(+), 2 deletions(-) diff --git a/xen/arch/riscv/include/asm/sbi.h b/xen/arch/riscv/include/asm/sbi.h index ade24a572d..751bae6d66 100644 --- a/xen/arch/riscv/include/asm/sbi.h +++ b/xen/arch/riscv/include/asm/sbi.h @@ -14,8 +14,15 @@ #include -#define SBI_EXT_0_1_CONSOLE_PUTCHAR 0x1 -#define SBI_EXT_0_1_SHUTDOWN 0x8 +#define SBI_EXT_0_1_SET_TIMER 0x0 +#define SBI_EXT_0_1_CONSOLE_PUTCHAR 0x1 +#define SBI_EXT_0_1_CONSOLE_GETCHAR 0x2 +#define SBI_EXT_0_1_CLEAR_IPI 0x3 +#define SBI_EXT_0_1_SEND_IPI 0x4 +#define SBI_EXT_0_1_REMOTE_FENCE_I 0x5 +#define SBI_EXT_0_1_REMOTE_SFENCE_VMA 0x6 +#define SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID 0x7 +#define SBI_EXT_0_1_SHUTDOWN 0x8 #define SBI_EXT_BASE 0x10 #define SBI_EXT_RFENCE 0x52464E43 diff --git a/xen/arch/riscv/vsbi/Makefile b/xen/arch/riscv/vsbi/Makefile index 820eb10ac2..bc5755cb13 100644 --- a/xen/arch/riscv/vsbi/Makefile +++ b/xen/arch/riscv/vsbi/Makefile @@ -1 +1,2 @@ obj-y += core.o +obj-y += legacy-extension.o diff --git a/xen/arch/riscv/vsbi/legacy-extension.c b/xen/arch/riscv/vsbi/legacy-extension.c new file mode 100644 index 0000000000..2e8df191c2 --- /dev/null +++ b/xen/arch/riscv/vsbi/legacy-extension.c @@ -0,0 +1,64 @@ + +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include + +#include +#include + +static void vsbi_print_char(char c) +{ + struct domain *currd = current->domain; + struct domain_console *cons = currd->console; + + if ( !is_console_printable(c) ) + return; + + spin_lock(&cons->lock); + ASSERT(cons->idx < ARRAY_SIZE(cons->buf)); + if ( c != '\n' ) + cons->buf[cons->idx++] = c; + if ( (cons->idx == (ARRAY_SIZE(cons->buf) - 1)) || (c == '\n') ) + { + cons->buf[cons->idx] = '\0'; + guest_printk(currd, XENLOG_G_DEBUG "%s\n", cons->buf); + cons->idx = 0; + } + spin_unlock(&cons->lock); +} + +static int vsbi_legacy_ecall_handler(unsigned long eid, unsigned long fid, + struct cpu_user_regs *regs) +{ + int ret = 0; + + switch ( eid ) + { + case SBI_EXT_0_1_CONSOLE_PUTCHAR: + vsbi_print_char(regs->a0); + break; + + case SBI_EXT_0_1_CONSOLE_GETCHAR: + ret = SBI_ERR_NOT_SUPPORTED; + break; + + default: + /* + * TODO: domain_crash() is acceptable here while things are still under + * development. + * It shouldn't stay like this in the end though: guests should not + * be punished like this for something Xen hasn't implemented. + */ + domain_crash(current->domain, + "%s: Unsupported legacy ecall: EID: #%#lx\n", + __func__, eid); + break; + } + + return ret; +} + +VSBI_EXT(legacy, SBI_EXT_0_1_SET_TIMER, SBI_EXT_0_1_SHUTDOWN, + vsbi_legacy_ecall_handler); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Dec 30 18:22:44 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 30 Dec 2025 18:22:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1194435.1512844 (Exim 4.92) (envelope-from ) id 1vaeMm-0006x3-J6; Tue, 30 Dec 2025 18:22:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1194435.1512844; Tue, 30 Dec 2025 18:22:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vaeMm-0006wv-Ge; Tue, 30 Dec 2025 18:22:44 +0000 Received: by outflank-mailman (input) for mailman id 1194435; Tue, 30 Dec 2025 18:22:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vaeMl-0006wn-03 for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] MAINTAINERS: remove myself as RISCV reviewer Message-Id: Date: Tue, 30 Dec 2025 18:22:42 +0000 commit 8f8fd5b945b0d93368e68ca44d405a05f3790524 Author: Bobby Eshleman AuthorDate: Mon Dec 29 09:38:17 2025 +0100 Commit: Jan Beulich CommitDate: Mon Dec 29 09:38:17 2025 +0100 MAINTAINERS: remove myself as RISCV reviewer I haven't been actively reviewing Xen RISC-V patches for several years, so remove myself from the reviewer list to better reflect the current reality. The RISC-V port has come a long way thanks to Oleksii, current contributors, and maintainers, and it has been exciting to see. Many thanks to everyone, I hope we cross paths again in the future! Signed-off-by: Bobby Eshleman Acked-by: Roger Pau Monné --- MAINTAINERS | 1 - 1 file changed, 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index c70623153b..bf00be928c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -506,7 +506,6 @@ F: tools/hotplug/Linux/block-drbd-probe RISCV R: Alistair Francis -R: Bob Eshleman R: Connor Davis R: Oleksii Kurochko S: Supported -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Dec 30 18:22:54 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 30 Dec 2025 18:22:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1194436.1512849 (Exim 4.92) (envelope-from ) id 1vaeMw-0006z7-Ks; Tue, 30 Dec 2025 18:22:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1194436.1512849; Tue, 30 Dec 2025 18:22:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vaeMw-0006yz-IA; Tue, 30 Dec 2025 18:22:54 +0000 Received: by outflank-mailman (input) for mailman id 1194436; Tue, 30 Dec 2025 18:22:53 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vaeMv-0006yk-2l for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 18:22:53 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vaeMu-00HN4v-2T for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 18:22:53 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vaeMv-00050i-05 for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 18:22:53 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=LmYaqu8zJnLfogElhMG/lkzXvcGrRO4iSMsx//OfjAQ=; b=Cd9u4EG6eOfl9b4q27W3LNS+Zp ptfhIl7fSOeqgGmlzhLbLNJv5MutyAS+xRQUDNUkC4qhJtuGPNT+UuoJPaMBEOASJbk436XY4DqwR 9XTV9mxN+udfr8VB12/a7T3gqtIV0mhvgozPou0JBkBLJezywSNjbQjKFok9Ditew6f8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/pv: Address MISRA C:2012 Rule 4.1 Message-Id: Date: Tue, 30 Dec 2025 18:22:53 +0000 commit 6069a752cd904c7f72da67edb748c46845b7ea2f Author: Andrew Cooper AuthorDate: Fri Dec 12 19:31:46 2025 +0000 Commit: Andrew Cooper CommitDate: Tue Dec 30 16:02:38 2025 +0000 x86/pv: Address MISRA C:2012 Rule 4.1 MISRA doesn't like mixing hexadecimal escape sequences with ASCII text. Use the same workaround as in commit cd5048353725 ("xen: address MISRA C:2012 Rule 4.1"). No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Nicola Vetrini Acked-by: Jan Beulich --- xen/arch/x86/pv/emul-inv-op.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/pv/emul-inv-op.c b/xen/arch/x86/pv/emul-inv-op.c index 314ebd01cb..346ac1124d 100644 --- a/xen/arch/x86/pv/emul-inv-op.c +++ b/xen/arch/x86/pv/emul-inv-op.c @@ -26,7 +26,7 @@ static int emulate_forced_invalid_op(struct cpu_user_regs *regs) pv_inject_page_fault(0, eip + sizeof(sig) - rc); return EXCRET_fault_fixed; } - if ( memcmp(sig, "\xf\xbxen", sizeof(sig)) ) + if ( memcmp(sig, "\xf\xb" "xen", sizeof(sig)) ) return 0; eip += sizeof(sig); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Dec 30 18:23:04 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 30 Dec 2025 18:23:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1194437.1512852 (Exim 4.92) (envelope-from ) id 1vaeN6-00071T-MG; Tue, 30 Dec 2025 18:23:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1194437.1512852; Tue, 30 Dec 2025 18:23:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vaeN6-00071L-Jh; Tue, 30 Dec 2025 18:23:04 +0000 Received: by outflank-mailman (input) for mailman id 1194437; Tue, 30 Dec 2025 18:23:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vaeN5-000716-5f for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 18:23:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vaeN4-00HN5D-2j for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 18:23:03 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vaeN5-00051F-0L for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 18:23:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=HsdRVsequELUvgYaladbNV8MrSzMgpPK2WWetst7l0I=; b=lIRfi4kQixQz+t0gtfazeMJUBU vsnypoqlNYG4vzEVWDbFgvGfWxagZRLgVtpV3w3rqkhn17G0AgLSn0BeR9MHXd9F98czKPcGA17fj 8uEecM0Q2/qiFC8H5KdCQASKHABNfjF3Jj3Ahe9+lFgdkQINMLzsmLTvsiclBX8kXCdI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/pv: Change type of do_update_descriptor()'s desc parameter Message-Id: Date: Tue, 30 Dec 2025 18:23:03 +0000 commit c9f908772580e5efa09c23f96aabd47843d26f60 Author: Andrew Cooper AuthorDate: Fri Dec 12 19:43:22 2025 +0000 Commit: Andrew Cooper CommitDate: Tue Dec 30 16:02:38 2025 +0000 x86/pv: Change type of do_update_descriptor()'s desc parameter The automatically generated hypercall dispatch logic looks like: case __HYPERVISOR_update_descriptor: \ ret = do_update_descriptor((uint64_t)(a1), (seg_desc_t)(a2)); \ break; \ but seg_desc_t is a union and Eclair considers this to be a violation of MISRA Rule 1.1. There's also a Rule 8.3 violation for the parameter name mismatch. Instead of playing games trying to change seg_desc_t to be a struct, or to alter the AWK generator to know that seg_desc_t is magic and needs braces rather than brackets, just switch the type to be a plain uint64_t. The size is fixed by the x86 architecture, so it is never going to change. This even lets us simplify compat_update_descriptor() a little. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/pv/descriptor-tables.c | 10 ++++------ xen/include/hypercall-defs.c | 2 +- 2 files changed, 5 insertions(+), 7 deletions(-) diff --git a/xen/arch/x86/pv/descriptor-tables.c b/xen/arch/x86/pv/descriptor-tables.c index 26f7d18b11..8a32b9ae5c 100644 --- a/xen/arch/x86/pv/descriptor-tables.c +++ b/xen/arch/x86/pv/descriptor-tables.c @@ -179,11 +179,8 @@ int compat_set_gdt( int compat_update_descriptor( uint32_t pa_lo, uint32_t pa_hi, uint32_t desc_lo, uint32_t desc_hi) { - seg_desc_t d; - - d.raw = ((uint64_t)desc_hi << 32) | desc_lo; - - return do_update_descriptor(pa_lo | ((uint64_t)pa_hi << 32), d); + return do_update_descriptor(pa_lo | ((uint64_t)pa_hi << 32), + desc_lo | ((uint64_t)desc_hi << 32)); } #endif /* CONFIG_PV32 */ @@ -288,9 +285,10 @@ int validate_segdesc_page(struct page_info *page) return i == 512 ? 0 : -EINVAL; } -long do_update_descriptor(uint64_t gaddr, seg_desc_t d) +long do_update_descriptor(uint64_t gaddr, uint64_t desc) { struct domain *currd = current->domain; + seg_desc_t d = { .raw = desc }; gfn_t gfn = gaddr_to_gfn(gaddr); mfn_t mfn; seg_desc_t *entry; diff --git a/xen/include/hypercall-defs.c b/xen/include/hypercall-defs.c index cef08eeec1..5782cdfd14 100644 --- a/xen/include/hypercall-defs.c +++ b/xen/include/hypercall-defs.c @@ -184,7 +184,7 @@ mca(xen_mc_t *u_xen_mc) set_trap_table(const_trap_info_t *traps) set_gdt(xen_ulong_t *frame_list, unsigned int entries) set_callbacks(unsigned long event_address, unsigned long failsafe_address, unsigned long syscall_address) -update_descriptor(uint64_t gaddr, seg_desc_t desc) +update_descriptor(uint64_t gaddr, uint64_t desc) update_va_mapping(unsigned long va, uint64_t val64, unsigned long flags) update_va_mapping_otherdomain(unsigned long va, uint64_t val64, unsigned long flags, domid_t domid) #endif -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Dec 30 18:23:14 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 30 Dec 2025 18:23:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1194438.1512857 (Exim 4.92) (envelope-from ) id 1vaeNG-00073f-O1; Tue, 30 Dec 2025 18:23:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1194438.1512857; Tue, 30 Dec 2025 18:23:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vaeNG-00073X-LE; Tue, 30 Dec 2025 18:23:14 +0000 Received: by outflank-mailman (input) for mailman id 1194438; Tue, 30 Dec 2025 18:23:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vaeNF-00073O-8m for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 18:23:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vaeNE-00HN5c-35 for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 18:23:13 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1vaeNF-00051f-0f for xen-changelog@lists.xenproject.org; Tue, 30 Dec 2025 18:23:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=WNsuqW/vxVbyWt2k2hZrUlYFdW2nAJZt/nIiwqiXWYw=; b=Wb+RQrtwuAXlxe+hD4A+C8WDqG hHCtghOwM9KeSzWo6stItj+BfphGrOc61kHXSd9Ld257ZPqRrh4j3UeWjXwoSy8vYI8DTt0Of9kd4 0lDxgPttPpYJWDgEB4ElYqHNvQKtiwr/8QbbIYl9pUXHJXzzJyV6LH8Mbc8tinCezH0s=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: Address MISRA R8.3 (declaration/definition mismatch) issues Message-Id: Date: Tue, 30 Dec 2025 18:23:13 +0000 commit 2c0d554387348320eff1242f713c93cfdb30aa3a Author: Andrew Cooper AuthorDate: Fri Dec 12 20:05:10 2025 +0000 Commit: Andrew Cooper CommitDate: Tue Dec 30 16:02:38 2025 +0000 x86: Address MISRA R8.3 (declaration/definition mismatch) issues These are mostly name mismatches, but a couple have type alias mismatches too. For shadow_put_top_level() and is_patch(), the declaration name is the better choice so change the name in the function. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/include/asm/hypercall.h | 4 ++-- xen/arch/x86/include/asm/pv/mm.h | 4 ++-- xen/arch/x86/include/asm/shadow.h | 2 +- xen/arch/x86/mm.c | 4 ++-- xen/arch/x86/mm/shadow/common.c | 8 ++++---- xen/arch/x86/mm/shadow/multi.h | 4 ++-- xen/arch/x86/mm/shadow/private.h | 10 +++++----- xen/common/kimage.c | 2 +- xen/common/livepatch.c | 14 +++++++------- xen/include/xen/livepatch.h | 2 +- 10 files changed, 27 insertions(+), 27 deletions(-) diff --git a/xen/arch/x86/include/asm/hypercall.h b/xen/arch/x86/include/asm/hypercall.h index f6e9e2313b..bf2f0e169a 100644 --- a/xen/arch/x86/include/asm/hypercall.h +++ b/xen/arch/x86/include/asm/hypercall.h @@ -22,8 +22,8 @@ void pv_hypercall(struct cpu_user_regs *regs); #endif -void pv_ring1_init_hypercall_page(void *ptr); -void pv_ring3_init_hypercall_page(void *ptr); +void pv_ring1_init_hypercall_page(void *p); +void pv_ring3_init_hypercall_page(void *p); /* * Both do_mmuext_op() and do_mmu_update(): diff --git a/xen/arch/x86/include/asm/pv/mm.h b/xen/arch/x86/include/asm/pv/mm.h index 182764542c..a574590820 100644 --- a/xen/arch/x86/include/asm/pv/mm.h +++ b/xen/arch/x86/include/asm/pv/mm.h @@ -18,7 +18,7 @@ int pv_set_gdt(struct vcpu *v, const unsigned long frames[], unsigned int entries); void pv_destroy_gdt(struct vcpu *v); -bool pv_map_ldt_shadow_page(unsigned int off); +bool pv_map_ldt_shadow_page(unsigned int offset); bool pv_destroy_ldt(struct vcpu *v); int validate_segdesc_page(struct page_info *page); @@ -40,7 +40,7 @@ static inline int pv_set_gdt(struct vcpu *v, const unsigned long frames[], { ASSERT_UNREACHABLE(); return -EINVAL; } static inline void pv_destroy_gdt(struct vcpu *v) { ASSERT_UNREACHABLE(); } -static inline bool pv_map_ldt_shadow_page(unsigned int off) { return false; } +static inline bool pv_map_ldt_shadow_page(unsigned int offset) { return false; } static inline bool pv_destroy_ldt(struct vcpu *v) { ASSERT_UNREACHABLE(); return false; } diff --git a/xen/arch/x86/include/asm/shadow.h b/xen/arch/x86/include/asm/shadow.h index 9a8d1b8353..60589c3cac 100644 --- a/xen/arch/x86/include/asm/shadow.h +++ b/xen/arch/x86/include/asm/shadow.h @@ -63,7 +63,7 @@ int shadow_enable(struct domain *d, u32 mode); /* Enable VRAM dirty bit tracking. */ int shadow_track_dirty_vram(struct domain *d, - unsigned long first_pfn, + unsigned long begin_pfn, unsigned int nr_frames, XEN_GUEST_HANDLE(void) guest_dirty_bitmap); diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index b929d15d00..0d0d529295 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -4566,7 +4566,7 @@ static int __do_update_va_mapping( } long do_update_va_mapping( - unsigned long va, u64 val64, unsigned long flags) + unsigned long va, uint64_t val64, unsigned long flags) { int rc = __do_update_va_mapping(va, val64, flags, current->domain); @@ -4578,7 +4578,7 @@ long do_update_va_mapping( } long do_update_va_mapping_otherdomain( - unsigned long va, u64 val64, unsigned long flags, domid_t domid) + unsigned long va, uint64_t val64, unsigned long flags, domid_t domid) { struct domain *pg_owner; int rc; diff --git a/xen/arch/x86/mm/shadow/common.c b/xen/arch/x86/mm/shadow/common.c index f2aee5be46..f9310d008d 100644 --- a/xen/arch/x86/mm/shadow/common.c +++ b/xen/arch/x86/mm/shadow/common.c @@ -751,7 +751,7 @@ void shadow_promote(struct domain *d, mfn_t gmfn, unsigned int type) TRACE_SHADOW_PATH_FLAG(TRCE_SFLAG_PROMOTE); } -void shadow_demote(struct domain *d, mfn_t gmfn, u32 type) +void shadow_demote(struct domain *d, mfn_t gmfn, unsigned int type) { struct page_info *page = mfn_to_page(gmfn); @@ -2615,11 +2615,11 @@ pagetable_t sh_set_toplevel_shadow(struct vcpu *v, * Helper invoked when releasing of a top-level shadow's reference was * deferred in sh_set_toplevel_shadow() above. */ -void shadow_put_top_level(struct domain *d, pagetable_t old_entry) +void shadow_put_top_level(struct domain *d, pagetable_t old) { - ASSERT(!pagetable_is_null(old_entry)); + ASSERT(!pagetable_is_null(old)); paging_lock(d); - sh_put_ref(d, pagetable_get_mfn(old_entry), 0); + sh_put_ref(d, pagetable_get_mfn(old), 0); paging_unlock(d); } diff --git a/xen/arch/x86/mm/shadow/multi.h b/xen/arch/x86/mm/shadow/multi.h index 0e93859434..fc86d7a8d9 100644 --- a/xen/arch/x86/mm/shadow/multi.h +++ b/xen/arch/x86/mm/shadow/multi.h @@ -89,11 +89,11 @@ SHADOW_INTERNAL_NAME(sh_paging_mode, GUEST_LEVELS); #if SHADOW_OPTIMIZATIONS & SHOPT_OUT_OF_SYNC extern void SHADOW_INTERNAL_NAME(sh_resync_l1, GUEST_LEVELS) - (struct vcpu *v, mfn_t gmfn, mfn_t snpmfn); + (struct vcpu *v, mfn_t gl1mfn, mfn_t snpmfn); extern int SHADOW_INTERNAL_NAME(sh_safe_not_to_sync, GUEST_LEVELS) - (struct vcpu*v, mfn_t gmfn); + (struct vcpu*v, mfn_t gl1mfn); extern int SHADOW_INTERNAL_NAME(sh_rm_write_access_from_sl1p, GUEST_LEVELS) diff --git a/xen/arch/x86/mm/shadow/private.h b/xen/arch/x86/mm/shadow/private.h index 1ef908a380..e4eca60eb3 100644 --- a/xen/arch/x86/mm/shadow/private.h +++ b/xen/arch/x86/mm/shadow/private.h @@ -371,11 +371,11 @@ bool shadow_hash_delete(struct domain *d, unsigned long n, unsigned int t, mfn_t smfn); /* shadow promotion */ -void shadow_promote(struct domain *d, mfn_t gmfn, u32 type); -void shadow_demote(struct domain *d, mfn_t gmfn, u32 type); +void shadow_promote(struct domain *d, mfn_t gmfn, unsigned int type); +void shadow_demote(struct domain *d, mfn_t gmfn, unsigned int type); /* Shadow page allocation functions */ -bool __must_check shadow_prealloc(struct domain *d, unsigned int shadow_type, +bool __must_check shadow_prealloc(struct domain *d, unsigned int type, unsigned int count); mfn_t shadow_alloc(struct domain *d, u32 shadow_type, @@ -399,11 +399,11 @@ int sh_validate_guest_entry(struct vcpu *v, mfn_t gmfn, void *entry, u32 size); * Returns non-zero if we need to flush TLBs. * level and fault_addr desribe how we found this to be a pagetable; * level==0 means we have some other reason for revoking write access. */ -extern int sh_remove_write_access(struct domain *d, mfn_t readonly_mfn, +extern int sh_remove_write_access(struct domain *d, mfn_t gmfn, unsigned int level, unsigned long fault_addr); #else -static inline int sh_remove_write_access(struct domain *d, mfn_t readonly_mfn, +static inline int sh_remove_write_access(struct domain *d, mfn_t gmfn, unsigned int level, unsigned long fault_addr) { diff --git a/xen/common/kimage.c b/xen/common/kimage.c index 9961eac187..e1aec5a18a 100644 --- a/xen/common/kimage.c +++ b/xen/common/kimage.c @@ -66,7 +66,7 @@ static int kimage_is_destination_range(struct kexec_image *image, paddr_t start, paddr_t end); static struct page_info *kimage_alloc_page(struct kexec_image *image, - paddr_t dest); + paddr_t destination); static struct page_info *kimage_alloc_zeroed_page(unsigned memflags) { diff --git a/xen/common/livepatch.c b/xen/common/livepatch.c index d0da2aa281..7446533c8c 100644 --- a/xen/common/livepatch.c +++ b/xen/common/livepatch.c @@ -107,7 +107,7 @@ static int verify_payload(const struct xen_sysctl_livepatch_upload *upload, char return 0; } -bool is_patch(const void *ptr) +bool is_patch(const void *addr) { const struct payload *data; bool r = false; @@ -115,12 +115,12 @@ bool is_patch(const void *ptr) rcu_read_lock(&rcu_payload_lock); list_for_each_entry_rcu ( data, &payload_list, list ) { - if ( (ptr >= data->rw_addr && - ptr < (data->rw_addr + data->rw_size)) || - (ptr >= data->ro_addr && - ptr < (data->ro_addr + data->ro_size)) || - (ptr >= data->text_addr && - ptr < (data->text_addr + data->text_size)) ) + if ( (addr >= data->rw_addr && + addr < (data->rw_addr + data->rw_size)) || + (addr >= data->ro_addr && + addr < (data->ro_addr + data->ro_size)) || + (addr >= data->text_addr && + addr < (data->text_addr + data->text_size)) ) { r = 1; break; diff --git a/xen/include/xen/livepatch.h b/xen/include/xen/livepatch.h index 3f5ad01f1b..45c8924f34 100644 --- a/xen/include/xen/livepatch.h +++ b/xen/include/xen/livepatch.h @@ -89,7 +89,7 @@ enum va_type { * Function to secure the allocate pages (from arch_livepatch_alloc_payload) * with the right page permissions. */ -int arch_livepatch_secure(const void *va, unsigned int pages, enum va_type types); +int arch_livepatch_secure(const void *va, unsigned int pages, enum va_type type); void arch_livepatch_init(void); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Dec 30 18:23:24 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 30 Dec 2025 18:23:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1194440.1512861 (Exim 4.92) (envelope-from ) id 1vaeNQ-00076P-Qi; Tue, 30 Dec 2025 18:23:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1194440.1512861; Tue, 30 Dec 2025 18:23:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vaeNQ-00076B-O3; Tue, 30 Dec 2025 18:23:24 +0000 Received: by outflank-mailman (input) for mailman id 1194440; Tue, 30 Dec 2025 18:23:23 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vaeNP-000761-Bz for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: Address MIRSA R8.4 (declaration visibility) issues Message-Id: Date: Tue, 30 Dec 2025 18:23:23 +0000 commit c36ddba28e314e9350f4024972023b52e34ec73e Author: Andrew Cooper AuthorDate: Fri Dec 12 20:14:56 2025 +0000 Commit: Andrew Cooper CommitDate: Tue Dec 30 16:02:38 2025 +0000 x86: Address MIRSA R8.4 (declaration visibility) issues set_guest_*_trapbounce() are only called from assembly so gain asmlinkage to identify them. xen_msr_s_cet_value() is called by assembly and C, so asmlinkage isn't appropriate. Make the declaration unconditional, which silences the complaint. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/pv/traps.c | 4 ++-- xen/arch/x86/setup.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/pv/traps.c b/xen/arch/x86/pv/traps.c index c3c0976c44..26a468108a 100644 --- a/xen/arch/x86/pv/traps.c +++ b/xen/arch/x86/pv/traps.c @@ -99,7 +99,7 @@ void pv_inject_event(const struct x86_event *event) * Called from asm to set up the MCE trapbounce info. * Returns false no callback is set up, else true. */ -bool set_guest_machinecheck_trapbounce(void) +bool asmlinkage set_guest_machinecheck_trapbounce(void) { struct vcpu *curr = current; struct trap_bounce *tb = &curr->arch.pv.trap_bounce; @@ -114,7 +114,7 @@ bool set_guest_machinecheck_trapbounce(void) * Called from asm to set up the NMI trapbounce info. * Returns false if no callback is set up, else true. */ -bool set_guest_nmi_trapbounce(void) +bool asmlinkage set_guest_nmi_trapbounce(void) { struct vcpu *curr = current; struct trap_bounce *tb = &curr->arch.pv.trap_bounce; diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index 44da5efa1d..27c63d1d97 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -877,6 +877,8 @@ static void noreturn init_done(void) startup_cpu_idle_loop(); } +unsigned int xen_msr_s_cet_value(void); /* To avoid ifdefary, and placate MISRA */ + #if defined(CONFIG_XEN_SHSTK) || defined(CONFIG_XEN_IBT) /* * Used by AP and S3 asm code to calcualte the appropriate MSR_S_CET setting. @@ -888,8 +890,6 @@ unsigned int xen_msr_s_cet_value(void) return ((cpu_has_xen_shstk ? CET_SHSTK_EN | CET_WRSS_EN : 0) | (cpu_has_xen_ibt ? CET_ENDBR_EN : 0)); } -#else -unsigned int xen_msr_s_cet_value(void); /* To avoid ifdefary */ #endif /* Reinitalise all state referring to the old virtual address of the stack. */ -- generated by git-patchbot for /home/xen/git/xen.git#master