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Fri, 31 Oct 2025 19:04:47 -0700 (PDT) Message-ID: <3e42a9b5-6447-45d7-9e7b-a8749a13cfb0@gmail.com> Date: Fri, 31 Oct 2025 22:04:43 -0400 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: Limitations for Running Xen on KVM Arm64 To: "haseeb.ashraf@siemens.com" , "xen-devel@lists.xenproject.org" References: Content-Language: en-US From: Demi Marie Obenour Autocrypt: addr=demiobenour@gmail.com; keydata= xsFNBFp+A0oBEADffj6anl9/BHhUSxGTICeVl2tob7hPDdhHNgPR4C8xlYt5q49yB+l2nipd aq+4Gk6FZfqC825TKl7eRpUjMriwle4r3R0ydSIGcy4M6eb0IcxmuPYfbWpr/si88QKgyGSV Z7GeNW1UnzTdhYHuFlk8dBSmB1fzhEYEk0RcJqg4AKoq6/3/UorR+FaSuVwT7rqzGrTlscnT DlPWgRzrQ3jssesI7sZLm82E3pJSgaUoCdCOlL7MMPCJwI8JpPlBedRpe9tfVyfu3euTPLPx wcV3L/cfWPGSL4PofBtB8NUU6QwYiQ9Hzx4xOyn67zW73/G0Q2vPPRst8LBDqlxLjbtx/WLR 6h3nBc3eyuZ+q62HS1pJ5EvUT1vjyJ1ySrqtUXWQ4XlZyoEFUfpJxJoN0A9HCxmHGVckzTRl 5FMWo8TCniHynNXsBtDQbabt7aNEOaAJdE7to0AH3T/Bvwzcp0ZJtBk0EM6YeMLtotUut7h2 Bkg1b//r6bTBswMBXVJ5H44Qf0+eKeUg7whSC9qpYOzzrm7+0r9F5u3qF8ZTx55TJc2g656C 9a1P1MYVysLvkLvS4H+crmxA/i08Tc1h+x9RRvqba4lSzZ6/Tmt60DPM5Sc4R0nSm9BBff0N m0bSNRS8InXdO1Aq3362QKX2NOwcL5YaStwODNyZUqF7izjK4QARAQABzTxEZW1pIE1hcmll IE9iZW5vdXIgKGxvdmVyIG9mIGNvZGluZykgPGRlbWlvYmVub3VyQGdtYWlsLmNvbT7CwXgE EwECACIFAlp+A0oCGwMGCwkIBwMCBhUIAgkKCwQWAgMBAh4BAheAAAoJELKItV//nCLBhr8Q AK/xrb4wyi71xII2hkFBpT59ObLN+32FQT7R3lbZRjVFjc6yMUjOb1H/hJVxx+yo5gsSj5LS 9AwggioUSrcUKldfA/PKKai2mzTlUDxTcF3vKx6iMXKA6AqwAw4B57ZEJoMM6egm57TV19kz PMc879NV2nc6+elaKl+/kbVeD3qvBuEwsTe2Do3HAAdrfUG/j9erwIk6gha/Hp9yZlCnPTX+ VK+xifQqt8RtMqS5R/S8z0msJMI/ajNU03kFjOpqrYziv6OZLJ5cuKb3bZU5aoaRQRDzkFIR 6aqtFLTohTo20QywXwRa39uFaOT/0YMpNyel0kdOszFOykTEGI2u+kja35g9TkH90kkBTG+a EWttIht0Hy6YFmwjcAxisSakBuHnHuMSOiyRQLu43ej2+mDWgItLZ48Mu0C3IG1seeQDjEYP tqvyZ6bGkf2Vj+L6wLoLLIhRZxQOedqArIk/Sb2SzQYuxN44IDRt+3ZcDqsPppoKcxSyd1Ny 2tpvjYJXlfKmOYLhTWs8nwlAlSHX/c/jz/ywwf7eSvGknToo1Y0VpRtoxMaKW1nvH0OeCSVJ itfRP7YbiRVc2aNqWPCSgtqHAuVraBRbAFLKh9d2rKFB3BmynTUpc1BQLJP8+D5oNyb8Ts4x Xd3iV/uD8JLGJfYZIR7oGWFLP4uZ3tkneDfYzsFNBFp+A0oBEAC9ynZI9LU+uJkMeEJeJyQ/ 8VFkCJQPQZEsIGzOTlPnwvVna0AS86n2Z+rK7R/usYs5iJCZ55/JISWd8xD57ue0eB47bcJv VqGlObI2DEG8TwaW0O0duRhDgzMEL4t1KdRAepIESBEA/iPpI4gfUbVEIEQuqdqQyO4GAe+M kD0Hy5JH/0qgFmbaSegNTdQg5iqYjRZ3ttiswalql1/iSyv1WYeC1OAs+2BLOAT2NEggSiVO txEfgewsQtCWi8H1SoirakIfo45Hz0tk/Ad9ZWh2PvOGt97Ka85o4TLJxgJJqGEnqcFUZnJJ riwoaRIS8N2C8/nEM53jb1sH0gYddMU3QxY7dYNLIUrRKQeNkF30dK7V6JRH7pleRlf+wQcN fRAIUrNlatj9TxwivQrKnC9aIFFHEy/0mAgtrQShcMRmMgVlRoOA5B8RTulRLCmkafvwuhs6 dCxN0GNAORIVVFxjx9Vn7OqYPgwiofZ6SbEl0hgPyWBQvE85klFLZLoj7p+joDY1XNQztmfA rnJ9x+YV4igjWImINAZSlmEcYtd+xy3Li/8oeYDAqrsnrOjb+WvGhCykJk4urBog2LNtcyCj kTs7F+WeXGUo0NDhbd3Z6AyFfqeF7uJ3D5hlpX2nI9no/ugPrrTVoVZAgrrnNz0iZG2DVx46 x913pVKHl5mlYQARAQABwsFfBBgBAgAJBQJafgNKAhsMAAoJELKItV//nCLBwNIP/AiIHE8b oIqReFQyaMzxq6lE4YZCZNj65B/nkDOvodSiwfwjjVVE2V3iEzxMHbgyTCGA67+Bo/d5aQGj gn0TPtsGzelyQHipaUzEyrsceUGWYoKXYyVWKEfyh0cDfnd9diAm3VeNqchtcMpoehETH8fr RHnJdBcjf112PzQSdKC6kqU0Q196c4Vp5HDOQfNiDnTf7gZSj0BraHOByy9LEDCLhQiCmr+2 E0rW4tBtDAn2HkT9uf32ZGqJCn1O+2uVfFhGu6vPE5qkqrbSE8TG+03H8ecU2q50zgHWPdHM OBvy3EhzfAh2VmOSTcRK+tSUe/u3wdLRDPwv/DTzGI36Kgky9MsDC5gpIwNbOJP2G/q1wT1o Gkw4IXfWv2ufWiXqJ+k7HEi2N1sree7Dy9KBCqb+ca1vFhYPDJfhP75I/VnzHVssZ/rYZ9+5 1yDoUABoNdJNSGUYl+Yh9Pw9pE3Kt4EFzUlFZWbE4xKL/NPno+z4J9aWemLLszcYz/u3XnbO vUSQHSrmfOzX3cV4yfmjM5lewgSstoxGyTx2M8enslgdXhPthZlDnTnOT+C+OTsh8+m5tos8 HQjaPM01MKBiAqdPgksm1wu2DrrwUi6ChRVTUBcj6+/9IJ81H2P2gJk3Ls3AVIxIffLoY34E +MYSfkEjBz0E8CLOcAw7JIwAaeBT In-Reply-To: Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------DNO9pICEBzR5kJJ1zUXGAiTq" This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------DNO9pICEBzR5kJJ1zUXGAiTq Content-Type: multipart/mixed; boundary="------------oEB0sIBWmplRq0xQ76RVpDut"; protected-headers="v1" From: Demi Marie Obenour To: "haseeb.ashraf@siemens.com" , "xen-devel@lists.xenproject.org" Message-ID: <3e42a9b5-6447-45d7-9e7b-a8749a13cfb0@gmail.com> Subject: Re: Limitations for Running Xen on KVM Arm64 References: In-Reply-To: --------------oEB0sIBWmplRq0xQ76RVpDut Content-Type: multipart/mixed; boundary="------------sOt0VEpjc6OcZTEGXe0sQ4x5" --------------sOt0VEpjc6OcZTEGXe0sQ4x5 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On 10/30/25 02:12, haseeb.ashraf@siemens.com wrote: > Hello Xen development community, >=20 > I wanted to discuss the limitations that I have faced while running Xen= on KVM on Arm64 machines. I hope I am using the right mailing list. >=20 > The biggest limitation is the costly emulation of instruction tlbi vmal= ls12e1is in KVM. The cost is exponentially proportional to the IPA size e= xposed by KVM for VM hosting Xen. If I reduce the IPA size to 40-bits in = KVM, then this issue is not much observable but with the IPA size of 48-b= its, it is 256x more costly than the former one. Xen uses this instructio= n too frequently and this instruction is trapped and emulated by KVM, and= performance is not as good as on bare-metal hardware. With 48-bit IPA, i= t can take up to 200 minutes for domu creation with just 128M RAM. I have= identified two places in Xen which are problematic w.r.t the usage of th= is instruction and hoping to reduce the frequency of this instruction or = use a more relevant TLBI instruction instead of invalidating whole stage-= 1 and stage-2 translations. Why the exponential scaling? It should be possible for KVM to fall back to a full TLB flush, which should be O(1) in the size of the address space. It might have terrible constant factors though. --=20 Sincerely, Demi Marie Obenour (she/her/hers) --------------sOt0VEpjc6OcZTEGXe0sQ4x5 Content-Type: application/pgp-keys; name="OpenPGP_0xB288B55FFF9C22C1.asc" Content-Disposition: attachment; filename="OpenPGP_0xB288B55FFF9C22C1.asc" Content-Description: OpenPGP public key Content-Transfer-Encoding: quoted-printable -----BEGIN PGP PUBLIC KEY BLOCK----- xsFNBFp+A0oBEADffj6anl9/BHhUSxGTICeVl2tob7hPDdhHNgPR4C8xlYt5q49y B+l2nipdaq+4Gk6FZfqC825TKl7eRpUjMriwle4r3R0ydSIGcy4M6eb0IcxmuPYf bWpr/si88QKgyGSVZ7GeNW1UnzTdhYHuFlk8dBSmB1fzhEYEk0RcJqg4AKoq6/3/ UorR+FaSuVwT7rqzGrTlscnTDlPWgRzrQ3jssesI7sZLm82E3pJSgaUoCdCOlL7M MPCJwI8JpPlBedRpe9tfVyfu3euTPLPxwcV3L/cfWPGSL4PofBtB8NUU6QwYiQ9H zx4xOyn67zW73/G0Q2vPPRst8LBDqlxLjbtx/WLR6h3nBc3eyuZ+q62HS1pJ5EvU T1vjyJ1ySrqtUXWQ4XlZyoEFUfpJxJoN0A9HCxmHGVckzTRl5FMWo8TCniHynNXs BtDQbabt7aNEOaAJdE7to0AH3T/Bvwzcp0ZJtBk0EM6YeMLtotUut7h2Bkg1b//r 6bTBswMBXVJ5H44Qf0+eKeUg7whSC9qpYOzzrm7+0r9F5u3qF8ZTx55TJc2g656C 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pwl2MKEJ09nEjrghFh5qqqfAbAMp75upJzHXFIFDc/bKF+KFSIVOHzVA71LeH+b9oz lURxHJ6Pr0w3Q== MIME-Version: 1.0 Date: Sat, 01 Nov 2025 07:37:56 +0100 From: Nicola Vetrini To: Stefano Stabellini Cc: xen-devel@lists.xenproject.org, consulting@bugseng.com, Doug Goldstein Subject: Re: [XEN PATCH v3] automation/eclair: add new analysis jobs with differing configurations In-Reply-To: References: <876da816d5aacdb688599fd1d50efca2f856d080.1761897244.git.nicola.vetrini@bugseng.com> Message-ID: <5d70118c343eafbea6d9b4c2f6134595@bugseng.com> X-Sender: nicola.vetrini@bugseng.com Organization: BUGSENG s.r.l. Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit On 2025-10-31 20:55, Stefano Stabellini wrote: > On Fri, 31 Oct 2025, Nicola Vetrini wrote: >> The following analysis jobs are performed: >> - eclair-{x86_64,ARM64}: analyze Xen using the default configuration >> for >> that architecture; runs on runners tagged `eclair-analysis'. >> >> - eclair-{x86-64,ARM64}-safety: analyze Xen using the configuration >> for >> safety, which is more restricted; runs on runners tagged >> `eclair-analysis-safety`. >> >> - eclair-{x86_64,ARM64}-testing: analyze Xen using the default >> configuration for the purposes of testing new runner updates; runs >> on >> runners tagged `eclair-analysis-testing`. >> >> Signed-off-by: Nicola Vetrini >> --- >> CI pipeline: >> https://gitlab.com/xen-project/people/bugseng/xen/-/pipelines/2130873833 >> >> Note: the eclair-ARM64 and eclair-x86_64 jobs are allowed to fail >> because the >> configuration is not (yet) clean for all checked MISRA guidelines. >> >> Changes in v3: >> - Use a variable instead of testing the repository PATH to decide >> whether a job >> should be run for *-testing and *-safety analyses; >> - Allow eclair-{x86_64,ARM64} default configurations to fail, as the >> configuration >> is not yet clean for MISRA. >> Changes in v2: >> - rebased to current staging; >> - fixed regex path issue. >> --- >> automation/gitlab-ci/analyze.yaml | 42 >> ++++++++++++++++++++++++++++++- >> 1 file changed, 41 insertions(+), 1 deletion(-) >> >> diff --git a/automation/gitlab-ci/analyze.yaml >> b/automation/gitlab-ci/analyze.yaml >> index d50721006740..fae55a23dbb5 100644 >> --- a/automation/gitlab-ci/analyze.yaml >> +++ b/automation/gitlab-ci/analyze.yaml >> @@ -45,6 +45,22 @@ eclair-x86_64: >> LOGFILE: "eclair-x86_64.log" >> VARIANT: "X86_64" >> RULESET: "monitored" >> + allow_failure: true > > Wouldn't "allow_failure: true" also change the behavior for the > existing > jobs? I would think we want to continue not allowing failures for > those. > I would think that at least eclair-x86_64-safety should not allow > failures (like before this patch). > Well spotted, for some reason I thought that it would be overwritten by the rules section in the extended job. I will put an explicit allow_failure: false in *-safety job to preserve their behavior, then when (if?) the eclair-{arm64,x86_64} jobs are also clean, we can remove both settings > >> +eclair-x86_64-testing: >> + extends: eclair-x86_64 >> + tags: >> + - eclair-analysis-testing >> + rules: >> + - if: $ECLAIR_TESTING >> + when: always >> + - !reference [.eclair-analysis:triggered, rules] > > I imagine that ECLAIR_TESTING will be typically off in > gitlab.com/xen-project/hardware/xen, right? > It's not about the repo, but the runner environment. The runner(s) tagged with eclair-analysis-testing do have ECLAIR_TESTING set, while the ones tagged with eclair-analysis-safety and/or eclair-analysis have the ECLAIR_SAFETY variable defined. > >> +eclair-x86_64-safety: >> + extends: eclair-x86_64 >> + tags: >> + - eclair-analysis-safety >> + variables: >> EXTRA_XEN_CONFIG: | >> CONFIG_AMD=y >> CONFIG_INTEL=n >> @@ -75,6 +91,10 @@ eclair-x86_64: >> CONFIG_DEBUG_LOCKS=n >> CONFIG_SCRUB_DEBUG=n >> CONFIG_XMEM_POOL_POISON=n >> + rules: >> + - if: $ECLAIR_SAFETY && $CI_COMMIT_BRANCH =~ /^staging$/ >> + when: always > > On the other hand, I expect that ECLAIR_SAFETY will be on in > gitlab.com/xen-project/hardware/xen, right? > > I don't think we need the extra check on "staging" as the branch > on gitlab.com/xen-project/hardware/xen are very limited. > Ok, can edit that out > >> + - !reference [.eclair-analysis:triggered, rules] >> >> eclair-ARM64: >> extends: .eclair-analysis:triggered >> @@ -82,6 +102,22 @@ eclair-ARM64: >> LOGFILE: "eclair-ARM64.log" >> VARIANT: "ARM64" >> RULESET: "monitored" >> + allow_failure: true > > Same comment for ARM > > >> +eclair-ARM64-testing: >> + extends: eclair-ARM64 >> + tags: >> + - eclair-analysis-testing >> + rules: >> + - if: $ECLAIR_TESTING >> + when: always >> + - !reference [.eclair-analysis:triggered, rules] >> + >> +eclair-ARM64-safety: >> + extends: eclair-ARM64 >> + tags: >> + - eclair-analysis-safety >> + variables: >> EXTRA_XEN_CONFIG: | >> CONFIG_NR_CPUS=16 >> CONFIG_GICV2=n >> @@ -120,13 +156,17 @@ eclair-ARM64: >> CONFIG_DEBUG_LOCKS=n >> CONFIG_SCRUB_DEBUG=n >> CONFIG_XMEM_POOL_POISON=n >> + rules: >> + - if: $ECLAIR_SAFETY && $CI_COMMIT_BRANCH =~ /^staging$/ >> + when: always >> + - !reference [.eclair-analysis, rules] >> >> .eclair-analysis:on-schedule: >> extends: .eclair-analysis >> rules: >> - if: $CI_PIPELINE_SOURCE != "schedule" >> when: never >> - - !reference [.eclair-analysis, rules] >> + - !reference [.eclair-analysis:triggered, rules] >> >> eclair-x86_64:on-schedule: >> extends: .eclair-analysis:on-schedule >> -- >> 2.43.0 >> -- Nicola Vetrini, B.Sc. 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB8946.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 969c4652-0190-4213-bf08-08de193dc2cb X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Nov 2025 11:56:58.4662 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: A5d7Rgj9+YczjHgbVsAvsHvFlycZ3AQwchwpGnXbXZT2TqoqlDJSrTZj36yX8E/KI+jNBd/kt/FfWIfaQLJuelG3glYiw0ZcINRVoQnG/Xo= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR03MB7130 From: Grygorii Strashko Add SCI SCMI SMC multi-agent driver documentation. It includes a detailed description of the SCMI multi-agent driver. This document explains the driver's functionality, configuration, and the compilation process. The Xen SCMI multi-agent driver is designed to provide SCMI access to system resources from different domains. Signed-off-by: Grygorii Strashko Signed-off-by: Oleksii Moisieiev --- Changes in v6: - remove all HVC mentions from the multi-agent doc - update sci-agent-id parameter description in the documentation - add missing Sign-of - minor fixes across the document Changes in v5: - rework multi-agent driver to leave Host Device-tree unmodified .../arm/firmware/arm-scmi.rst | 341 ++++++++++++++++++ 1 file changed, 341 insertions(+) diff --git a/docs/hypervisor-guide/arm/firmware/arm-scmi.rst b/docs/hypervi= sor-guide/arm/firmware/arm-scmi.rst index d9698f4e4b..630965fef3 100644 --- a/docs/hypervisor-guide/arm/firmware/arm-scmi.rst +++ b/docs/hypervisor-guide/arm/firmware/arm-scmi.rst @@ -36,6 +36,8 @@ The below sections describe SCMI support options availabl= e for Xen. =20 | [1] `Arm SCMI `= _ | [2] `System Control and Management Interface (SCMI) bindings `_ +| [3] `Generic Domain Access Controllers bindings `_ + =20 Simple SCMI over SMC calls forwarding driver (EL3) ------------------------------------------------------ @@ -189,3 +191,342 @@ except explicitly enabling SCMI with "arm_sci" xl.cfg= option. -> xen,reg =3D <0x0 0x47ff0000 0x0 0x1000 0x0 0x22001000>; -> xen,force-assign-without-iommu; }; + +SCMI SMC multi-agent driver (EL3) +------------------------------------- + +The SCMI SMC multi-agent driver enables support for ARM EL3 Trusted Firmwa= re-A (TF-A) which +provides SCMI interface with multi-agent support, as shown below. + +:: + + +-----------------------------------------+ + | | + | EL3 TF-A SCMI | + +-------+--+-------+--+-------+--+-------++ + |shmem1 | |shmem0 | |shmem2 | |shmemX | + +-----+-+ +---+---+ +--+----+ +---+---+ + smc-id1 | | | | + agent1 | | | | + +-----v--------+---------+-----------+----+ + | | | | | + | | | | | + +--------------+---------+-----------+----+ + smc-id0 | smc-id2| smc-idX| + agent0 | agent2 | agentX | + | | | + +----v---+ +--v-----+ +--v-----+ + | | | | | | + | Dom0 | | Dom1 | | DomX | + | | | | | | + | | | | | | + +--------+ +--------+ +--------+ + +The EL3 SCMI multi-agent firmware is expected to provide SCMI SMC shared-m= emory transport +for every Agent in the system. The SCMI Agent transport channel defined by= pair: + +- smc-id: SMC function id used for Doorbell +- shmem: shared memory for messages transfer, **Xen page aligned**. + Shared memory is mapped with the following flags: MT_DEVICE_nGnRE and _P= AGE_DEVICE, indicating that this + memory is mapped as device memory. + +The following SCMI Agents are expected to be defined by SCMI FW to enable = SCMI multi-agent functionality +under Xen: + +- Xen management agent: trusted agents that accesses to the Base Protocol = commands to configure + agent specific permissions +- OSPM VM agents: non-trusted agent, one for each Guest domain which is a= llowed direct HW access. + At least one OSPM VM agent has to be provided by FW if HW is handled onl= y by Dom0 or Driver Domain. + +The EL3 SCMI FW is expected to implement following Base protocol messages: + +- BASE_DISCOVER_AGENT (optional if agent_id was provided) +- BASE_RESET_AGENT_CONFIGURATION (optional) +- BASE_SET_DEVICE_PERMISSIONS (optional) + +The number of supported SCMI agents and their transport specifications are= SCMI FW implementation +specific. + +Compiling with multi-agent support +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +To build with the SCMI SMC multi-agent driver support, enable Kconfig opti= on: + +:: + + CONFIG_SCMI_SMC_MA + + +Driver functionality +^^^^^^^^^^^^^^^^^^^^ + +The SCI SCMI SMC multi-agent driver implements following functionality: + +- The driver is initialized based on the ``xen,config`` node under ``chose= n`` + (only one SCMI interface is supported), which describes the Xen manageme= nt + agent SCMI interface. + +.. code-block:: dts + + scmi_shm_1: sram@47ff1000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x47ff1000 0x0 0x1000>; + }; + scmi_xen: scmi { + compatible =3D "arm,scmi-smc"; + arm,smc-id =3D <0x82000002>; <--- Xen management agent smc-id + #address-cells =3D < 1>; + #size-cells =3D < 0>; + #access-controller-cells =3D < 1>; + shmem =3D <&scmi_shm_1>; <--- Xen management agent shmem + }; + +- The driver obtains Xen specific SCMI Agent's configuration from the Host= DT, probes Agents and + builds SCMI Agents list. The Agents configuration is taken from "scmi-se= condary-agents" + property where first item is "arm,smc-id", second - "arm,scmi-shmem" pha= ndle and third is + optional "agent_id": + +.. code-block:: dts + + chosen { + ranges; <--- set default ranges so address can be translated when pa= rsing scmi_shm node + xen,config { + ranges; <--- set default ranges so address can be translated when = parsing scmi_shm node + scmi-secondary-agents =3D < + 0x82000003 &scmi_shm_0 0 + 0x82000004 &scmi_shm_2 2 + 0x82000005 &scmi_shm_3 3 + 0x82000006 &scmi_shm_4 4>; + #scmi-secondary-agents-cells =3D <3>; <--- optional, default 3 + + scmi_shm_0 : sram@47ff0000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x47ff0000 0x0 0x1000>; + }; + + scmi_shm_2: sram@47ff2000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x47ff2000 0x0 0x1000>; + }; + scmi_shm_3: sram@47ff3000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x47ff3000 0x0 0x1000>; + }; + scmi_shm_4: sram@47ff4000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x47ff4000 0x0 0x1000>; + }; + + // Xen SCMI management channel + scmi_shm_1: sram@47ff1000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x47ff1000 0x0 0x1000>; + }; + + scmi_xen: scmi { + compatible =3D "arm,scmi-smc"; + arm,smc-id =3D <0x82000002>; <--- Xen management agent smc-id + #address-cells =3D < 1>; + #size-cells =3D < 0>; + #access-controller-cells =3D < 1>; + shmem =3D <&scmi_shm_1>; <--- Xen management agent shmem + }; + }; + }; + + /{ + // Host SCMI OSPM channel - provided to the Dom0 as is if SCMI ena= bled for it + scmi_shm: sram@47ff1000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x47ff1000 0x0 0x1000>; + }; + + firmware { + scmi: scmi { + compatible =3D "arm,scmi-smc"; + arm,smc-id =3D <0x82000003>; <--- Host OSPM agent smc-id + #address-cells =3D < 1>; + #size-cells =3D < 0>; + shmem =3D <&scmi_shm>; <--- Host OSPM agent shmem + + protocol@X{ + }; + }; + }; + }; + + This approach allows defining multiple SCMI Agents by adding Xen-specifi= c properties under + the ``/chosen`` node to the Host Device Tree, leaving the main part unch= anged. The Host DT + SCMI channel will be passed to Dom0. + + The Xen management agent is described as a ``scmi_xen`` node under the `= `/chosen`` node, which + is used by Xen to control other SCMI Agents in the system. + + All secondary agents' configurations are provided in the ``scmi-secondar= y-agents`` property with + an optional ``agent_id`` field. + + The ``agent_id`` from the ``scmi-secondary-agents`` property is used to = identify the agent in the + system and can be omitted by setting ``#scmi-secondary-agents-cells =3D = <2>``, so the Secondary + Agents configuration will look like this: + +... code-block:: dts + + chosen { + xen,config { + scmi-secondary-agents =3D < + 0x82000003 &scmi_shm_0 + 0x82000004 &scmi_shm_2 + 0x82000005 &scmi_shm_3 + 0x82000006 &scmi_shm_4>; + #scmi-secondary-agents-cells =3D <2>; + }; + } + + In this case, Xen will use the ``SCMI_BASE_DISCOVER_AGENT`` call to disc= over the ``agent_id`` + for each secondary agent. Providing the ``agent_id`` in the ``scmi-secon= dary-agents`` property + allows skipping the discovery call, which is useful when the secondary a= gent's shared memory is + not accessible by Xen or when boot time is important because it allows s= kipping the agent + discovery procedure. + +.. note:: + + Note that Xen is the only one entry in the system which need to know a= bout SCMI multi-agent support. + +- The driver implements the SCI subsystem interface required for configuri= ng and enabling SCMI + functionality for Dom0/hwdom and Guest domains. To enable SCMI functiona= lity for guest domain + it has to be configured with unique supported SCMI Agent_id and use corr= esponding SCMI SMC + shared-memory transport ``[smc-id, shmem]`` defined for this SCMI Agent_= id. + +- Once Xen domain is configured it can communicate with EL3 SCMI FW: + + - zero-copy, the guest domain puts/gets SCMI message in/from shmem; + - the guest triggers SMC exception with agent "smc-id" (doorbell); + - the Xen driver catches exception, do checks and synchronously forwards= it to EL3 FW. + +- the Xen driver sends BASE_RESET_AGENT_CONFIGURATION message to Xen manag= ement agent channel on + domain destroy event. This allows to reset resources used by domain and = so implement use-case + like domain reboot. + + +Configure SCMI for Dom0 +^^^^^^^^^^^^^^^^^^^^^^^ +The **"dom0=3Dsci-agent-id=3D"** parameter in the Xen comma= nd line is used to enable +SCMI functionality for Dom0. If not provided, SCMI will be disabled for Do= m0 and all SCMI nodes +removed from Dom0 DT. + +Example: **dom0=3Dsci-agent-id=3D0** to enable SCMI with agent ID 0 for Do= m0. + +Xen utilizes Host DT SCMI node to configure Dom0 SCMI Agent so the device-= tree remains unchanged +except for the Xen specific properties under ``/chosen`` node. If Xen devi= ce-tree doesn't include +``/firmware/scmi`` node or it's disabled, the Dom0 SCMI Agent will not be = configured. + +.. note:: + + The **sci-agent-id** value should match the ``func_id`` and ``shmem`` = in the ``/firmware/scmi`` node + to set the correct Dom0 SCMI Agent. + +Configure SCMI for for guest domain with toolstack +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +* In domain's xl.cfg file add **"arm_sci"** option as below + +:: + + arm_sci =3D "type=3Dscmi_smc_multiagent,agent_id=3D2" + +* In domain's xl.cfg file enable access to the "arm,scmi-shmem" which shou= ld correspond + assigned "agent_id" for the domain, for example: + +:: + + iomem =3D [ + "47ff2,1@22001", + ] + +.. note:: It's up to the user to select guest IPA for mapping SCMI shared-= memory. + +* Add SCMI nodes to the Driver domain partial device tree as in the below = example. + The "arm,smc-id" should correspond assigned agent_id for the domain: + +.. code:: + + passthrough { + scmi_shm_0: sram@22001000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x22001000 0x0 0x1000>; + }; + + firmware { + compatible =3D "simple-bus"; + scmi: scmi { + compatible =3D "arm,scmi-smc"; + arm,smc-id =3D <0x82000004>; + shmem =3D <&scmi_shm_0>; + ... + } + } + } + +**Device specific access control** + +The XEN SCMI SMC multi-agent driver performs "access-controller" provider = function in case +EL3 SCMI FW implements SCMI "4.2.1.1 Device specific access control" and p= rovides the +BASE_SET_DEVICE_PERMISSIONS command to configure the devices that an agent= s have access to. +The Host DT SCMI node should have "#access-controller-cells=3D<1>" propert= y and DT devices should +be bound to the SCMI node using Access Controllers bindings [3]. + +For example: + +.. code-block:: dts + + &i2c1 { + access-controllers =3D <&scmi 0>; + }; + +Use domain's xl.cfg file **"dtdev"** property to assign SCMI devices from = toolstack to the guest: + +:: + + dtdev =3D [ + "/soc/i2c@e6508000", + ] + +.. note:: + + xl.cfg:"dtdev" need contain all nodes which are under SCMI management = (not only those which are + behind IOMMU) and passed-through to the guest domain. + +Configure SCMI for predefined domains (dom0less) +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +* add "xen,sci_type" and "xen,sci-agent-id" properties for required DomU (= "xen,domain") node + +:: + + xen,sci_type=3D"scmi_smc_multiagent" + xen,sci-agent-id=3D2 + +* add scmi nodes to the Driver domain partial device tree the same way as = above (toolstack case) and + enable access to the "arm,scmi-shmem" according to the dom0less document= ation. For example: + +.. code-block:: dts + + scmi_shm_0: sram@22001000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x00 0x22001000 0x00 0x1000>; + -> xen,reg =3D <0x0 0x47ff0000 0x0 0x1000 0x0 0x22001000>; + -> xen,force-assign-without-iommu; + }; + +* For SCMI device access control configure pass-through devices in the gue= st partial DT according to + the dom0less documentation and ensure that devices SCMI management has "= xen,path" property set: + +.. code-block:: dts + + i2c@e6508000 { + ... + reg =3D <0x00 0xe6508000 0x00 0x1000>; + -> xen,path =3D "/soc/i2c@e6508000" + -> xen,reg =3D <0x0 0xe6508000 0x0 0x1000 0x0 0xe6508000>; + -> xen,force-assign-without-iommu; + }; --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Sat Nov 01 11:57:15 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 01 Nov 2025 11:57:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1154895.1484569 (Exim 4.92) (envelope-from ) id 1vFAEH-00037I-TN; Sat, 01 Nov 2025 11:57:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1154895.1484569; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB8946.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 923cdd2a-73f9-4477-df8d-08de193dc275 X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Nov 2025 11:56:57.9276 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: sQTTJZ+91M+HdaKztKdUKBG/uR4gb/W0Cl/PE2s1LFnVdAEu5yt7t7xvlaZPExJTNn1Lx4GViuRnBsAucxFzr6s1M7/CM6gHdTNl1oNGF9k= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR03MB7130 This patch introduces SCI driver to support for ARM EL3 Trusted Firmware-A (TF-A) which provides SCMI interface with multi-agent support, as shown below. +-----------------------------------------+ | | | EL3 TF-A SCMI | +-------+--+-------+--+-------+--+-------++ |shmem1 | |shmem0 | |shmem2 | |shmemX | +-----+-+ +---+---+ +--+----+ +---+---+ smc-id1 | | | | agent1 | | | | +-----v--------+---------+-----------+----+ | | | | | | | | | | +--------------+---------+-----------+----+ smc-id0 | smc-id2| smc-idX| agent0 | agent2 | agentX | | | | +----v---+ +--v-----+ +--v-----+ | | | | | | | Dom0 | | Dom1 | | DomX | | | | | | | | | | | | | +--------+ +--------+ +--------+ The EL3 SCMI multi-agent firmware is expected to provide SCMI SMC shared memory transport for every Agent in the system. The SCMI Agent transport channel defined by pair: - smc-id: SMC id used for Doorbell - shmem: shared memory for messages transfer, Xen page aligned. Shared memort is mapped with the following flags: MT_DEVICE_nGnRE. The follwoing SCMI Agents are expected to be defined by SCMI FW to enable S= CMI multi-agent functionality under Xen: - Xen management agent: trusted agents that accesses to the Base Protocol commands to configure agent specific permissions - OSPM VM agents: non-trusted agent, one for each Guest domain which is allowed direct HW access. At least one OSPM VM agent has to be provided by FW if HW is handled only by Dom0 or Driver Domain. The EL3 SCMI FW is expected to implement following Base protocol messages: - BASE_DISCOVER_AGENT (optional if agent_id was provided) - BASE_RESET_AGENT_CONFIGURATION (optional) - BASE_SET_DEVICE_PERMISSIONS (optional) The SCI SCMI SMC multi-agent driver implements following functionality: - The driver is initialized based on the ``xen,config`` node under ``chosen= `` (only one SCMI interface is supported), which describes the Xen managemen= t agent SCMI interface. scmi_shm_1: sram@47ff1000 { compatible =3D "arm,scmi-shmem"; reg =3D <0x0 0x47ff1000 0x0 0x1000>; }; scmi_xen: scmi { compatible =3D "arm,scmi-smc"; arm,smc-id =3D <0x82000003>; <--- Xen management agent smc-id #address-cells =3D < 1>; #size-cells =3D < 0>; #access-controller-cells =3D < 1>; shmem =3D <&scmi_shm_1>; <--- Xen management agent shmem }; - The driver obtains Xen specific SCMI Agent's configuration from the Host = DT, probes Agents and builds SCMI Agents list. The Agents configuration is taken from "scmi-sec= ondary-agents" property where first item is "arm,smc-id", second - "arm,scmi-shmem" phan= dle and third is optional "agent_id": chosen { ranges; xen,config { ranges; scmi-secondary-agents =3D < 0x82000003 &scmi_shm_0 0 0x82000004 &scmi_shm_2 2 0x82000005 &scmi_shm_3 3 0x82000006 &scmi_shm_4 4>; #scmi-secondary-agents-cells =3D <3>; <--- optional, default 3 scmi_shm_0 : sram@47ff0000 { compatible =3D "arm,scmi-shmem"; reg =3D <0x0 0x47ff0000 0x0 0x1000>; }; scmi_shm_2: sram@47ff2000 { compatible =3D "arm,scmi-shmem"; reg =3D <0x0 0x47ff2000 0x0 0x1000>; }; scmi_shm_3: sram@47ff3000 { compatible =3D "arm,scmi-shmem"; reg =3D <0x0 0x47ff3000 0x0 0x1000>; }; scmi_shm_4: sram@47ff4000 { compatible =3D "arm,scmi-shmem"; reg =3D <0x0 0x47ff4000 0x0 0x1000>; }; // Xen SCMI management channel scmi_shm_1: sram@47ff1000 { compatible =3D "arm,scmi-shmem"; reg =3D <0x0 0x47ff1000 0x0 0x1000>; }; scmi_xen: scmi { compatible =3D "arm,scmi-smc"; arm,smc-id =3D <0x82000002>; <--- Xen management agent smc-id #address-cells =3D < 1>; #size-cells =3D < 0>; #access-controller-cells =3D < 1>; shmem =3D <&scmi_shm_1>; <--- Xen management agent shmem }; }; }; /{ // Host SCMI OSPM channel - provided to the Dom0 as is if SCMI enabled = for it scmi_shm: sram@47ff0000 { compatible =3D "arm,scmi-shmem"; reg =3D <0x0 0x47ff0000 0x0 0x1000>; }; firmware { scmi: scmi { compatible =3D "arm,scmi-smc"; arm,smc-id =3D <0x82000002>; <--- Host OSPM agent smc-id #address-cells =3D < 1>; #size-cells =3D < 0>; shmem =3D <&scmi_shm>; <--- Host OSPM agent shmem protocol@X{ }; }; }; }; This approach allows defining multiple SCMI Agents by adding Xen-specific p= roperties under the ``/chosen`` node to the Host Device Tree, leaving the main part unchang= ed. The Host DT SCMI channel will be passed to Dom0. The Xen management agent is described as a ``scmi_xen`` node under the ``/c= hosen`` node, which is used by Xen to control other SCMI Agents in the system. All secondary agents' configurations are provided in the ``scmi-secondary-a= gents`` property with an optional ``agent_id`` field. The ``agent_id`` from the ``scmi-secondary-agents`` property is used to ide= ntify the agent in the system and can be omitted by setting ``#scmi-secondary-agents-cells =3D <2>= ``, so the Secondary Agents configuration will look like this: chosen { xen,config { scmi-secondary-agents =3D < 0x82000003 &scmi_shm_0 0x82000004 &scmi_shm_2 0x82000005 &scmi_shm_3 0x82000006 &scmi_shm_4>; #scmi-secondary-agents-cells =3D <2>; }; } In this case, Xen will use the ``SCMI_BASE_DISCOVER_AGENT`` call to discove= r the ``agent_id`` for each secondary agent. Providing the ``agent_id`` in the ``scmi-secondar= y-agents`` property allows skipping the discovery call, which is useful when the secondary agen= t's shared memory is not accessible by Xen or when boot time is important because it allows skip= ping the agent discovery procedure. Note that Xen is the only one entry in the system which need to know about SCMI multi-agent support. - It implements the SCI subsystem interface required for configuring and enabling SCMI functionality for Dom0/hwdom and Guest domains. To enable SCMI functionality for domain it has to be configured with unique supported SCMI Agent_id and use corresponding SCMI SMC shared memory transport [smc-id, shmem] defined for this SCMI Agent_id. - Once Xen domain is configured it can communicate with EL3 SCMI FW: -- zero-copy, the guest domain puts SCMI message in shmem; -- the guest triggers SMC exception with smc-id (doorbell); -- the Xen driver catches exception, do checks and synchronously forwards it to EL3 FW. - the Xen driver sends BASE_RESET_AGENT_CONFIGURATION message to Xen management agent channel on domain destroy event. This allows to reset resources used by domain and so implement use-case like domain reboot. Dom0 Enable SCMI SMC: - pass dom0_scmi_agent_id=3D in Xen command line. if not provide= d SCMI will be disabled for Dom0 and all SCMI nodes removed from Dom0 DT. The driver updates Dom0 DT SCMI node "arm,smc-id" value and fix up shmem node according to assigned agent_id. Guest domains enable SCMI SMC: - xl.cfg: add configuration option as below arm_sci =3D "type=3Dscmi_smc_multiagent,agent_id=3D2" - xl.cfg: enable access to the "arm,scmi-shmem" which should correspond as= signed agent_id for the domain, for example: iomem =3D [ "47ff2,1@22001", ] - DT: add SCMI nodes to the Driver domain partial device tree as in the below example. The "arm,smc-id" should correspond assigned agent_id for th= e domain: passthrough { scmi_shm_0: sram@22001000 { compatible =3D "arm,scmi-shmem"; reg =3D <0x0 0x22001000 0x0 0x1000>; }; firmware { compatible =3D "simple-bus"; scmi: scmi { compatible =3D "arm,scmi-smc"; arm,smc-id =3D <0x82000004>; shmem =3D <&scmi_shm_0>; ... } } } SCMI "4.2.1.1 Device specific access control" The XEN SCI SCMI SMC multi-agent driver performs "access-controller" provid= er function in case EL3 SCMI FW implements SCMI "4.2.1.1 Device specific access control= " and provides the BASE_SET_DEVICE_PERMISSIONS command to configure the devices that an agents= have access to. The DT SCMI node should "#access-controller-cells=3D<1>" property and DT de= vices should be bound to the Xen SCMI. &i2c1 { access-controllers =3D <&scmi 0>; }; The Dom0 and dom0less domains DT devices will be processed automatically th= rough sci_assign_dt_device() call, but to assign SCMI devices from toolstack the = xl.cfg:"dtdev" property shall be used: dtdev =3D [ "/soc/i2c@e6508000", ] xl.cfg:dtdev will contain all nodes which are under SCMI management (not on= ly those which are behind IOMMU). [1] https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/= tree/Documentation/devicetree/bindings/firmware/arm,scmi.yaml [2] https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/= tree/Documentation/devicetree/bindings/access-controllers/access-controller= s.yaml Signed-off-by: Grygorii Strashko Signed-off-by: Oleksii Moisieiev --- Changes in v6: - updated scmi-shmem to use io.h from generic location - update scmi_agent_id parameter to be provided inside dom0=3D parameter list and have the following format "dom0=3Dsci-agent-id=3D0" This change was done as a response for Stefano comment and requires a lot of code changes, but produces much cleaner solution that's why I've added it to the code. - fix file comments and return codes - fix lenght checks in shmem_{get,put}_message to use offsetof - remove len member from scmi_channel structure as it is not used - set scmi-secondary-agents property to be mandatory since if no secondary agents were provided then there is no sence to enable scmi when no secondary agents are populated to the Domains - update documentation in booting.txt, added xen_scmi node to the example - adjust d->arch.sci_enabled value in scmi_domain_destroy - fix lock management in smc_create_channel call - avoid extra map_channel_memory command for Xen management channel because collect_agent_id call unmaps memory if DOMID_XEN is not set. So for Xen management channel we can init domain_id ad DOMID_XEN before calling collect_agent_id so memory shouldn't be unmapped. Changes in v5: - fix device-tree example format in booting.txt, added ";" after "}". - update define in scmi-proto.h - update define in scmi-shmem.h file - scmi_assign_device - do not ignore -EOPNOTSUPP return code of the do_smc_xfer - remove overwriting agent_channel->agent_id after SCMI_BASE_DISCOVER_AGENT call - add multi-agent files to the MAINTAINERS - add SCMI multi-agent description to the SUPPORT.md - handle ARM_SMCCC_INVALID_PARAMETER return code and return -EINVAL for smc call - updated collect_agents function. Set agent_id parameter as optional in scmi-secondary-agents device-tree property - introduce "#scmi-secondary-agents-cells" parameter to set if agent_id was provided - reanme xen,scmi-secondary-agents property to scmi-secondary-agents - move memcpu_toio/fromio for the generic place - update Xen to get management channel from /chosen/xen,config node - get hypervisor channnel from node instead of using hardcoded - update handling scmi and shmem nodes for the domain - Set multi-agent driver to support only Arm64 Changes in v4: - toolstack comments from Anthony PERARD - added dom0less support - added doc for "xen,scmi-secondary-agents" MAINTAINERS | 4 + SUPPORT.md | 11 + docs/man/xl.cfg.5.pod.in | 13 + docs/misc/arm/device-tree/booting.txt | 103 +++ docs/misc/xen-command-line.pandoc | 19 +- tools/libs/light/libxl_arm.c | 4 + tools/libs/light/libxl_types.idl | 4 +- tools/xl/xl_parse.c | 12 + xen/arch/arm/dom0less-build.c | 11 + xen/arch/arm/domain_build.c | 26 +- xen/arch/arm/firmware/Kconfig | 12 + xen/arch/arm/firmware/Makefile | 1 + xen/arch/arm/firmware/scmi-proto.h | 164 ++++ xen/arch/arm/firmware/scmi-shmem.c | 115 +++ xen/arch/arm/firmware/scmi-shmem.h | 45 ++ xen/arch/arm/firmware/scmi-smc-multiagent.c | 794 ++++++++++++++++++++ xen/include/public/arch-arm.h | 3 + 17 files changed, 1338 insertions(+), 3 deletions(-) create mode 100644 xen/arch/arm/firmware/scmi-proto.h create mode 100644 xen/arch/arm/firmware/scmi-shmem.c create mode 100644 xen/arch/arm/firmware/scmi-shmem.h create mode 100644 xen/arch/arm/firmware/scmi-smc-multiagent.c diff --git a/MAINTAINERS b/MAINTAINERS index ecd3f40df8..4ad1d818a6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -532,6 +532,10 @@ R: Oleksii Moisieiev S: Supported F: xen/arch/arm/firmware/sci.c F: xen/arch/arm/include/asm/firmware/sci.h +F: xen/arch/arm/firmware/scmi-smc-multiagent.c +F: xen/arch/arm/firmware/scmi-shmem.c +F: xen/arch/arm/firmware/scmi-shmem.h +F: xen/arch/arm/firmware/scmi-proto.h =20 SEABIOS UPSTREAM M: Wei Liu diff --git a/SUPPORT.md b/SUPPORT.md index 491f9ecd1b..7c8951d67b 100644 --- a/SUPPORT.md +++ b/SUPPORT.md @@ -956,6 +956,17 @@ by hwdom. Some platforms use SCMI for access to system= -level resources. =20 Status: Supported =20 +### Arm: SCMI SMC multi-agent support + +Enable support for the multi-agent configuration of the EL3 Firmware, whic= h +allows Xen to provide an SCMI interface to the Domains. +Xen manages access permissions to the HW resources and provides an SCMI in= terface +to the Domains. Each Domain is represented as a separate Agent, which can +communicate with EL3 Firmware using a dedicated shared memory region, and +notifications are passed through by Xen. + + Status, ARM64: Tech Preview + ### ARM: Guest PSCI support =20 Emulated PSCI interface exposed to guests. We support all mandatory diff --git a/docs/man/xl.cfg.5.pod.in b/docs/man/xl.cfg.5.pod.in index ad1553c5e9..4fc3e12939 100644 --- a/docs/man/xl.cfg.5.pod.in +++ b/docs/man/xl.cfg.5.pod.in @@ -3156,8 +3156,21 @@ single SCMI OSPM agent support. Should be used together with B Xen command line option. =20 +=3Ditem B + +Enables ARM SCMI SMC multi-agent support for the guest by enabling SCMI ov= er +SMC calls forwarding from domain to the EL3 firmware (like Trusted Firmwar= e-A) +with a multi SCMI OSPM agent support. The SCMI B should be +specified for the guest. + =3Dback =20 +=3Ditem B + +Specifies a non-zero ARM SCI agent id for the guest. This option is mandat= ory +if the SCMI SMC support is enabled for the guest. The agent ids of domains +existing on a single host must be unique and in the range [1..255]. + =3Dback =20 =3Dback diff --git a/docs/misc/arm/device-tree/booting.txt b/docs/misc/arm/device-t= ree/booting.txt index 977b428608..6fd7e4a16b 100644 --- a/docs/misc/arm/device-tree/booting.txt +++ b/docs/misc/arm/device-tree/booting.txt @@ -322,6 +322,20 @@ with the following properties: Should be used together with scmi-smc-passthrough Xen command line option. =20 + - "scmi_smc_multiagent" + + Enables ARM SCMI SMC multi-agent support for the guest by enabling SCM= I over + SMC calls forwarding from domain to the EL3 firmware (like ARM + Trusted Firmware-A) with a multi SCMI OSPM agent support. + The SCMI agent_id should be specified for the guest with "xen,sci-agen= t-id" + property. + +- "xen,sci-agent-id" + + Specifies ARM SCMI agent id for the guest. This option is mandatory if= the + SCMI SMC "scmi_smc_multiagent" support is enabled for the guest. The a= gent ids + of guest must be unique and in the range [0..255]. + Under the "xen,domain" compatible node, one or more sub-nodes are present for the DomU kernel and ramdisk. =20 @@ -824,3 +838,92 @@ The automatically allocated static shared memory will = get mapped at 0x80000000 in DomU1 guest physical address space, and at 0x90000000 in Dom= U2 guest physical address space. DomU1 is explicitly defined as the owner dom= ain, and DomU2 is the borrower domain. + +SCMI SMC multi-agent support +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D + +For enabling the ARM SCMI SMC multi-agent support (enabled by CONFIG_SCMI_= SMC_MA) +the Xen specific SCMI Agent's configuration shall be provided in the Host = DT +according to the SCMI compliant EL3 Firmware specification with +ARM SMC/HVC transport using property "scmi-secondary-agents" placed in "xe= n,config" +node under "chosen" node: + +- scmi-secondary-agents + + Defines a set of SCMI agents configuration supported by SCMI EL3 FW an= d + available for Xen. Each Agent defined as triple consisting of: + SMC/HVC function_id assigned for the agent transport ("arm,smc-id"), + phandle to SCMI SHM assigned for the agent transport ("arm,scmi-shmem"= ), + SCMI agent_id (optional) if not set - Xen will determine Agent ID for + each provided channel using BASE_DISCOVER_AGENT message. + +As an example: + +/{ +chosen { + xen,config { + scmi_shm_0 : sram@47ff0000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x47ff0000 0x0 0x1000>; + }; + // Xen SCMI management channel + scmi_shm_1: sram@47ff1000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x47ff1000 0x0 0x1000>; + }; + scmi_shm_2: sram@47ff2000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x47ff2000 0x0 0x1000>; + }; + scmi_shm_3: sram@47ff3000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x47ff3000 0x0 0x1000>; + }; + scmi_shm_3: sram@47ff4000 { + compatible =3D "arm,scmi-shmem"; + reg =3D <0x0 0x47ff4000 0x0 0x1000>; + }; + scmi-secondary-agents =3D < + 0x82000002 &scmi_shm_0 0 + 0x82000004 &scmi_shm_2 2 + 0x82000005 &scmi_shm_3 3 + 0x82000006 &scmi_shm_4 4>; + #scmi-secondary-agents-cells =3D <3>; + }; + + scmi_xen: scmi { + compatible =3D "arm,scmi-smc"; + arm,smc-id =3D <0x82000002>; <--- Xen management agent smc-id + #address-cells =3D < 1>; + #size-cells =3D < 0>; + #access-controller-cells =3D < 1>; + shmem =3D <&scmi_shm_1>; <--- Xen management agent shmem + }; + + }; +}; + +- #scmi-secondary-agents-cells + + Defines whether Agent_id is set in the "scmi-secondary-agents" propert= y. + Possible values are: 2, 3. + When set to 3 (the default), expect agent_id to be present in the seco= ndary + agents list. + When set to 2, agent_id will be discovered for each channel using + BASE_DISCOVER_AGENT message. + + +Example: + +/{ +chosen { + xen,config { + scmi-secondary-agents =3D < + 0x82000003 &scmi_shm_1 + 0x82000004 &scmi_shm_2 + 0x82000005 &scmi_shm_3 + 0x82000006 &scmi_shm_4>; + #scmi-secondary-agents-cells =3D <2>; + }; + }; +}; diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line= .pandoc index 34004ce282..5541c4a4ed 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -835,7 +835,7 @@ Specify the bit width of the DMA heap. cpuid-faulting=3D, msr-relaxed=3D, pf-fixup=3D ] (x86) =20 - =3D List of [ sve=3D ] (Arm64) + =3D List of [ sve=3D, sci-agent-id=3D ] (Arm) =20 Controls for how dom0 is constructed on x86 systems. =20 @@ -923,6 +923,14 @@ Enables features on dom0 on Arm systems. option is provided with a positive non zero value, but the platform do= esn't support SVE. =20 +* The `sci-agent-id` integer parameter enables ARM SCMI (System Control = and + Management Interface) functionality for Dom0 when `CONFIG_SCMI_SMC_MA`= is + compiled in. This parameter specifies the SCMI agent ID for Dom0. + A value equal to 0xFF (or omitted) disables SCMI for Dom0, which is us= eful + for thin Dom0 or dom0less use-cases. Values from 0 to 254 specify the = SCMI + agent ID. The agent IDs of domains existing on a single host must be u= nique. + Example: `dom0=3Dsci-agent-id=3D0` to enable SCMI with agent ID 0 for = Dom0. + ### dom0-cpuid =3D List of comma separated booleans =20 @@ -1107,6 +1115,15 @@ affinities to prefer but be not limited to the speci= fied node(s). =20 Pin dom0 vcpus to their respective pcpus =20 +### scmi-smc-passthrough (ARM) +> `=3D ` + +The option is available when `CONFIG_SCMI_SMC` is compiled in, and allows = to +enable SCMI SMC single agent interface for any, but only one guest domain, +which serves as Driver domain. The SCMI will be disabled for Dom0/hwdom an= d +SCMI nodes removed from Dom0/hwdom device tree. +(for example, thin Dom0 with Driver domain use-case). + ### dtuart (ARM) > `=3D path [:options]` =20 diff --git a/tools/libs/light/libxl_arm.c b/tools/libs/light/libxl_arm.c index e4407d6e3f..be0e6263ae 100644 --- a/tools/libs/light/libxl_arm.c +++ b/tools/libs/light/libxl_arm.c @@ -240,6 +240,10 @@ int libxl__arch_domain_prepare_config(libxl__gc *gc, case LIBXL_ARM_SCI_TYPE_SCMI_SMC: config->arch.arm_sci_type =3D XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC; break; + case LIBXL_ARM_SCI_TYPE_SCMI_SMC_MULTIAGENT: + config->arch.arm_sci_type =3D XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC_M= A; + config->arch.arm_sci_agent_id =3D d_config->b_info.arch_arm.arm_sc= i.agent_id; + break; default: LOG(ERROR, "Unknown ARM_SCI type %d", d_config->b_info.arch_arm.arm_sci.type); diff --git a/tools/libs/light/libxl_types.idl b/tools/libs/light/libxl_type= s.idl index 4a958f69f4..9bfbf09145 100644 --- a/tools/libs/light/libxl_types.idl +++ b/tools/libs/light/libxl_types.idl @@ -554,11 +554,13 @@ libxl_sve_type =3D Enumeration("sve_type", [ =20 libxl_arm_sci_type =3D Enumeration("arm_sci_type", [ (0, "none"), - (1, "scmi_smc") + (1, "scmi_smc"), + (2, "scmi_smc_multiagent") ], init_val =3D "LIBXL_ARM_SCI_TYPE_NONE") =20 libxl_arm_sci =3D Struct("arm_sci", [ ("type", libxl_arm_sci_type), + ("agent_id", uint8) ]) =20 libxl_rdm_reserve =3D Struct("rdm_reserve", [ diff --git a/tools/xl/xl_parse.c b/tools/xl/xl_parse.c index 1cc41f1bff..0c389d25f9 100644 --- a/tools/xl/xl_parse.c +++ b/tools/xl/xl_parse.c @@ -1306,6 +1306,18 @@ static int parse_arm_sci_config(XLU_Config *cfg, lib= xl_arm_sci *arm_sci, } } =20 + if (MATCH_OPTION("agent_id", ptr, oparg)) { + unsigned long val =3D parse_ulong(oparg); + + if (!val || val > 255) { + fprintf(stderr, "An invalid ARM_SCI agent_id specified (%l= u). Valid range [1..255]\n", + val); + ret =3D ERROR_INVAL; + goto out; + } + arm_sci->agent_id =3D val; + } + ptr =3D strtok(NULL, ","); } =20 diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c index 4181c10538..ddadc89148 100644 --- a/xen/arch/arm/dom0less-build.c +++ b/xen/arch/arm/dom0less-build.c @@ -299,6 +299,17 @@ static int __init domu_dt_sci_parse(struct dt_device_n= ode *node, d_cfg->arch.arm_sci_type =3D XEN_DOMCTL_CONFIG_ARM_SCI_NONE; else if ( !strcmp(sci_type, "scmi_smc") ) d_cfg->arch.arm_sci_type =3D XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC; + else if ( !strcmp(sci_type, "scmi_smc_multiagent") ) + { + uint32_t agent_id =3D 0; + + if ( !dt_property_read_u32(node, "xen,sci-agent-id", &agent_id) || + agent_id > UINT8_MAX ) + return -EINVAL; + + d_cfg->arch.arm_sci_type =3D XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC_MA= ; + d_cfg->arch.arm_sci_agent_id =3D agent_id; + } else { printk(XENLOG_ERR "xen,sci_type in not valid (%s) for domain %s\n"= , diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index fb8fbb1650..794ea1aa42 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -55,6 +55,10 @@ boolean_param("ext_regions", opt_ext_regions); static u64 __initdata dom0_mem; static bool __initdata dom0_mem_set; =20 +/* SCMI agent ID for dom0, parsed from dom0=3Dsci-agent-id=3D */ +#define SCMI_AGENT_ID_INVALID 0xFF +static uint8_t __initdata opt_dom0_scmi_agent_id =3D SCMI_AGENT_ID_INVALID= ; + static int __init parse_dom0_mem(const char *s) { dom0_mem_set =3D true; @@ -83,6 +87,16 @@ int __init parse_arch_dom0_param(const char *s, const ch= ar *e) #endif } =20 + if ( !parse_signed_integer("sci-agent-id", s, e, &val) ) + { + if ( (val >=3D 0) && (val <=3D UINT8_MAX) ) + opt_dom0_scmi_agent_id =3D val; + else + printk(XENLOG_INFO "'sci-agent-id=3D%lld' value out of range!\= n", val); + + return 0; + } + return -EINVAL; } =20 @@ -509,7 +523,8 @@ static int __init write_properties(struct domain *d, st= ruct kernel_info *kinfo, dt_property_name_is_equal(prop, "linux,uefi-mmap-start") = || dt_property_name_is_equal(prop, "linux,uefi-mmap-size") |= | dt_property_name_is_equal(prop, "linux,uefi-mmap-desc-siz= e") || - dt_property_name_is_equal(prop, "linux,uefi-mmap-desc-ver= ")) + dt_property_name_is_equal(prop, "linux,uefi-mmap-desc-ver= ") || + dt_property_name_is_equal(prop, "xen,config") ) continue; =20 if ( dt_property_name_is_equal(prop, "xen,dom0-bootargs") ) @@ -2067,6 +2082,15 @@ void __init create_dom0(void) dom0_cfg.arch.tee_type =3D tee_get_type(); dom0_cfg.max_vcpus =3D dom0_max_vcpus(); =20 + /* Set up SCMI agent ID if specified in dom0=3D command line */ + if ( opt_dom0_scmi_agent_id !=3D SCMI_AGENT_ID_INVALID ) + { + dom0_cfg.arch.arm_sci_type =3D XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC_= MA; + dom0_cfg.arch.arm_sci_agent_id =3D opt_dom0_scmi_agent_id; + } + else + dom0_cfg.arch.arm_sci_type =3D XEN_DOMCTL_CONFIG_ARM_SCI_NONE; + if ( iommu_enabled ) dom0_cfg.flags |=3D XEN_DOMCTL_CDF_iommu; =20 diff --git a/xen/arch/arm/firmware/Kconfig b/xen/arch/arm/firmware/Kconfig index 5c5f0880c4..972cd9b173 100644 --- a/xen/arch/arm/firmware/Kconfig +++ b/xen/arch/arm/firmware/Kconfig @@ -29,6 +29,18 @@ config SCMI_SMC driver domain. Use with EL3 firmware which supports only single SCMI OSPM agent. =20 +config SCMI_SMC_MA + bool "Enable ARM SCMI SMC multi-agent driver" + depends on ARM_64 + select ARM_SCI + help + Enables SCMI SMC/HVC multi-agent in XEN to pass SCMI requests from Doma= ins + to EL3 firmware (TF-A) which supports multi-agent feature. + This feature allows to enable SCMI per Domain using unique SCMI agent_i= d, + so Domain is identified by EL3 firmware as an SCMI Agent and can access + allowed platform resources through dedicated SMC/HVC Shared memory base= d + transport. + endchoice =20 endmenu diff --git a/xen/arch/arm/firmware/Makefile b/xen/arch/arm/firmware/Makefil= e index 71bdefc24a..37927e690e 100644 --- a/xen/arch/arm/firmware/Makefile +++ b/xen/arch/arm/firmware/Makefile @@ -1,2 +1,3 @@ obj-$(CONFIG_ARM_SCI) +=3D sci.o obj-$(CONFIG_SCMI_SMC) +=3D scmi-smc.o +obj-$(CONFIG_SCMI_SMC_MA) +=3D scmi-shmem.o scmi-smc-multiagent.o diff --git a/xen/arch/arm/firmware/scmi-proto.h b/xen/arch/arm/firmware/scm= i-proto.h new file mode 100644 index 0000000000..49f63cfc0a --- /dev/null +++ b/xen/arch/arm/firmware/scmi-proto.h @@ -0,0 +1,164 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Arm System Control and Management Interface definitions + * Version 3.0 (DEN0056C) + * + * Copyright (c) 2025 EPAM Systems + */ + +#ifndef ARM_FIRMWARE_SCMI_PROTO_H_ +#define ARM_FIRMWARE_SCMI_PROTO_H_ + +#include + +#define SCMI_SHORT_NAME_MAX_SIZE 16 + +/* SCMI status codes. See section 4.1.4 */ +#define SCMI_SUCCESS 0 +#define SCMI_NOT_SUPPORTED (-1) +#define SCMI_INVALID_PARAMETERS (-2) +#define SCMI_DENIED (-3) +#define SCMI_NOT_FOUND (-4) +#define SCMI_OUT_OF_RANGE (-5) +#define SCMI_BUSY (-6) +#define SCMI_COMMS_ERROR (-7) +#define SCMI_GENERIC_ERROR (-8) +#define SCMI_HARDWARE_ERROR (-9) +#define SCMI_PROTOCOL_ERROR (-10) + +/* Protocol IDs */ +#define SCMI_BASE_PROTOCOL 0x10 + +/* Base protocol message IDs */ +#define SCMI_BASE_PROTOCOL_VERSION 0x0 +#define SCMI_BASE_PROTOCOL_ATTIBUTES 0x1 +#define SCMI_BASE_PROTOCOL_MESSAGE_ATTRIBUTES 0x2 +#define SCMI_BASE_DISCOVER_AGENT 0x7 +#define SCMI_BASE_SET_DEVICE_PERMISSIONS 0x9 +#define SCMI_BASE_RESET_AGENT_CONFIGURATION 0xB + +typedef struct scmi_msg_header { + uint8_t id; + uint8_t type; + uint8_t protocol; + uint32_t status; +} scmi_msg_header_t; + +/* Table 2 Message header format */ +#define SCMI_HDR_ID GENMASK(7, 0) +#define SCMI_HDR_TYPE GENMASK(9, 8) +#define SCMI_HDR_PROTO GENMASK(17, 10) + +#define SCMI_FIELD_GET(_mask, _reg) = \ + ((typeof(_mask))(((_reg) & (_mask)) >> (ffs64(_mask) - 1))) +#define SCMI_FIELD_PREP(_mask, _val) = \ + (((typeof(_mask))(_val) << (ffs64(_mask) - 1)) & (_mask)) + +static inline uint32_t pack_scmi_header(scmi_msg_header_t *hdr) +{ + return SCMI_FIELD_PREP(SCMI_HDR_ID, hdr->id) | + SCMI_FIELD_PREP(SCMI_HDR_TYPE, hdr->type) | + SCMI_FIELD_PREP(SCMI_HDR_PROTO, hdr->protocol); +} + +static inline void unpack_scmi_header(uint32_t msg_hdr, scmi_msg_header_t = *hdr) +{ + hdr->id =3D SCMI_FIELD_GET(SCMI_HDR_ID, msg_hdr); + hdr->type =3D SCMI_FIELD_GET(SCMI_HDR_TYPE, msg_hdr); + hdr->protocol =3D SCMI_FIELD_GET(SCMI_HDR_PROTO, msg_hdr); +} + +static inline int scmi_to_xen_errno(int scmi_status) +{ + if ( scmi_status =3D=3D SCMI_SUCCESS ) + return 0; + + switch ( scmi_status ) + { + case SCMI_NOT_SUPPORTED: + return -EOPNOTSUPP; + case SCMI_INVALID_PARAMETERS: + return -EINVAL; + case SCMI_DENIED: + return -EACCES; + case SCMI_NOT_FOUND: + return -ENOENT; + case SCMI_OUT_OF_RANGE: + return -ERANGE; + case SCMI_BUSY: + return -EBUSY; + case SCMI_COMMS_ERROR: + return -ENOTCONN; + case SCMI_GENERIC_ERROR: + return -EIO; + case SCMI_HARDWARE_ERROR: + return -ENXIO; + case SCMI_PROTOCOL_ERROR: + return -EBADMSG; + default: + return -EINVAL; + } +} + +/* PROTOCOL_VERSION */ +#define SCMI_VERSION_MINOR GENMASK(15, 0) +#define SCMI_VERSION_MAJOR GENMASK(31, 16) + +struct scmi_msg_prot_version_p2a { + uint32_t version; +} __packed; + +/* BASE PROTOCOL_ATTRIBUTES */ +#define SCMI_BASE_ATTR_NUM_PROTO GENMASK(7, 0) +#define SCMI_BASE_ATTR_NUM_AGENT GENMASK(15, 8) + +struct scmi_msg_base_attributes_p2a { + uint32_t attributes; +} __packed; + +/* + * BASE_DISCOVER_AGENT + */ +#define SCMI_BASE_AGENT_ID_OWN 0xFFFFFFFF + +struct scmi_msg_base_discover_agent_a2p { + uint32_t agent_id; +} __packed; + +struct scmi_msg_base_discover_agent_p2a { + uint32_t agent_id; + char name[SCMI_SHORT_NAME_MAX_SIZE]; +} __packed; + +/* + * BASE_SET_DEVICE_PERMISSIONS + */ +#define SCMI_BASE_DEVICE_ACCESS_ALLOW BIT(0, UL) + +struct scmi_msg_base_set_device_permissions_a2p { + uint32_t agent_id; + uint32_t device_id; + uint32_t flags; +} __packed; + +/* + * BASE_RESET_AGENT_CONFIGURATION + */ +#define SCMI_BASE_AGENT_PERMISSIONS_RESET BIT(0, UL) + +struct scmi_msg_base_reset_agent_cfg_a2p { + uint32_t agent_id; + uint32_t flags; +} __packed; + +#endif /* ARM_FIRMWARE_SCMI_PROTO_H_ */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/arch/arm/firmware/scmi-shmem.c b/xen/arch/arm/firmware/scm= i-shmem.c new file mode 100644 index 0000000000..c681e3c476 --- /dev/null +++ b/xen/arch/arm/firmware/scmi-shmem.c @@ -0,0 +1,115 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * SMC/HVC shmem transport implementation used by + * SCI SCMI multi-agent driver. + * + * Oleksii Moisieiev + * Copyright (c) 2025 EPAM Systems + */ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include + +#include "scmi-proto.h" +#include "scmi-shmem.h" + +static inline int +shmem_channel_is_free(const volatile struct scmi_shared_mem __iomem *shmem= ) +{ + return (readl(&shmem->channel_status) & + SCMI_SHMEM_CHAN_STAT_CHANNEL_FREE) ? 0 : -EBUSY; +} + +int shmem_put_message(volatile struct scmi_shared_mem __iomem *shmem, + scmi_msg_header_t *hdr, void *data, int len) +{ + int ret; + + if ( (len + offsetof(struct scmi_shared_mem, msg_payload)) > + SCMI_SHMEM_MAPPED_SIZE ) + { + printk(XENLOG_ERR "scmi: Wrong size of smc message. Data is invali= d\n"); + return -EINVAL; + } + + ret =3D shmem_channel_is_free(shmem); + if ( ret ) + return ret; + + writel_relaxed(0x0, &shmem->channel_status); + /* Writing 0x0 right now, but "shmem"_FLAG_INTR_ENABLED can be set */ + writel_relaxed(0x0, &shmem->flags); + writel_relaxed(sizeof(shmem->msg_header) + len, &shmem->length); + writel(pack_scmi_header(hdr), &shmem->msg_header); + + if ( len > 0 && data ) + __memcpy_toio(shmem->msg_payload, data, len); + + return 0; +} + +int shmem_get_response(const volatile struct scmi_shared_mem __iomem *shme= m, + scmi_msg_header_t *hdr, void *data, int len) +{ + int recv_len; + int ret; + int pad =3D sizeof(hdr->status); + + if ( len >=3D SCMI_SHMEM_MAPPED_SIZE - + offsetof(struct scmi_shared_mem, msg_payload) ) + { + printk(XENLOG_ERR + "scmi: Wrong size of input smc message. Data may be invalid= \n"); + return -EINVAL; + } + + ret =3D shmem_channel_is_free(shmem); + if ( ret ) + return ret; + + recv_len =3D readl(&shmem->length) - sizeof(shmem->msg_header); + + if ( recv_len < 0 ) + { + printk(XENLOG_ERR + "scmi: Wrong size of smc message. Data may be invalid\n"); + return -EINVAL; + } + + unpack_scmi_header(readl(&shmem->msg_header), hdr); + + hdr->status =3D readl(&shmem->msg_payload); + recv_len =3D recv_len > pad ? recv_len - pad : 0; + + ret =3D scmi_to_xen_errno(hdr->status); + if ( ret ) + { + printk(XENLOG_DEBUG "scmi: Error received: %d\n", ret); + return ret; + } + + if ( recv_len > len ) + { + printk(XENLOG_ERR + "scmi: Not enough buffer for message %d, expecting %d\n", + recv_len, len); + return -EINVAL; + } + + if ( recv_len > 0 ) + __memcpy_fromio(data, shmem->msg_payload + pad, recv_len); + + return 0; +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/arch/arm/firmware/scmi-shmem.h b/xen/arch/arm/firmware/scm= i-shmem.h new file mode 100644 index 0000000000..7313cb6b26 --- /dev/null +++ b/xen/arch/arm/firmware/scmi-shmem.h @@ -0,0 +1,45 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Arm System Control and Management Interface definitions + * Version 3.0 (DEN0056C) + * Shared Memory based Transport + * + * Copyright (c) 2024 EPAM Systems + */ + +#ifndef ARM_FIRMWARE_SCMI_SHMEM_H_ +#define ARM_FIRMWARE_SCMI_SHMEM_H_ + +#include + +#define SCMI_SHMEM_CHAN_STAT_CHANNEL_FREE BIT(0, UL) +#define SCMI_SHMEM_CHAN_STAT_CHANNEL_ERROR BIT(1, UL) + +struct scmi_shared_mem { + uint32_t reserved; + uint32_t channel_status; + uint32_t reserved1[2]; + uint32_t flags; + uint32_t length; + uint32_t msg_header; + uint8_t msg_payload[]; +}; + +#define SCMI_SHMEM_MAPPED_SIZE PAGE_SIZE + +int shmem_put_message(volatile struct scmi_shared_mem __iomem *shmem, + scmi_msg_header_t *hdr, void *data, int len); + +int shmem_get_response(const volatile struct scmi_shared_mem __iomem *shme= m, + scmi_msg_header_t *hdr, void *data, int len); +#endif /* ARM_FIRMWARE_SCMI_SHMEM_H_ */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/arch/arm/firmware/scmi-smc-multiagent.c b/xen/arch/arm/fir= mware/scmi-smc-multiagent.c new file mode 100644 index 0000000000..8e532798a6 --- /dev/null +++ b/xen/arch/arm/firmware/scmi-smc-multiagent.c @@ -0,0 +1,794 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * SCI SCMI multi-agent driver, using SMC/HVC shmem as transport. + * + * Oleksii Moisieiev + * Copyright (c) 2025 EPAM Systems + */ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "scmi-proto.h" +#include "scmi-shmem.h" + +#define SCMI_AGENT_ID_INVALID 0xFF + +#define SCMI_SECONDARY_AGENTS "scmi-secondary-agents" + +struct scmi_channel { + uint32_t agent_id; + uint32_t func_id; + domid_t domain_id; + uint64_t paddr; + struct scmi_shared_mem __iomem *shmem; + spinlock_t lock; + struct list_head list; +}; + +struct scmi_data { + struct list_head channel_list; + spinlock_t channel_list_lock; + uint32_t func_id; + bool initialized; + uint32_t shmem_phandle; + uint32_t hyp_channel_agent_id; + struct dt_device_node *dt_dev; +}; + +static struct scmi_data scmi_data; + +static int send_smc_message(struct scmi_channel *chan_info, + scmi_msg_header_t *hdr, void *data, int len) +{ + struct arm_smccc_res resp; + int ret; + + ret =3D shmem_put_message(chan_info->shmem, hdr, data, len); + if ( ret ) + return ret; + + arm_smccc_1_1_smc(chan_info->func_id, 0, 0, 0, 0, 0, 0, 0, &resp); + + if ( resp.a0 =3D=3D ARM_SMCCC_INVALID_PARAMETER ) + return -EINVAL; + + if ( resp.a0 ) + return -EOPNOTSUPP; + + return 0; +} + +static int do_smc_xfer(struct scmi_channel *chan_info, scmi_msg_header_t *= hdr, + void *tx_data, int tx_size, void *rx_data, int rx_s= ize) +{ + int ret =3D 0; + + ASSERT(chan_info && chan_info->shmem); + + if ( !hdr ) + return -EINVAL; + + spin_lock(&chan_info->lock); + + printk(XENLOG_DEBUG + "scmi: agent_id =3D %d msg_id =3D %x type =3D %d, proto =3D %x\= n", + chan_info->agent_id, hdr->id, hdr->type, hdr->protocol); + + ret =3D send_smc_message(chan_info, hdr, tx_data, tx_size); + if ( ret ) + goto clean; + + ret =3D shmem_get_response(chan_info->shmem, hdr, rx_data, rx_size); + +clean: + printk(XENLOG_DEBUG + "scmi: get smc response agent_id =3D %d msg_id =3D %x proto =3D= %x res=3D%d\n", + chan_info->agent_id, hdr->id, hdr->protocol, ret); + + spin_unlock(&chan_info->lock); + + return ret; +} + +static struct scmi_channel *get_channel_by_id(uint32_t agent_id) +{ + struct scmi_channel *curr; + bool found =3D false; + + spin_lock(&scmi_data.channel_list_lock); + list_for_each_entry(curr, &scmi_data.channel_list, list) + { + if ( curr->agent_id =3D=3D agent_id ) + { + found =3D true; + break; + } + } + + spin_unlock(&scmi_data.channel_list_lock); + if ( found ) + return curr; + + return NULL; +} + +static struct scmi_channel *acquire_scmi_channel(struct domain *d, + uint32_t agent_id) +{ + struct scmi_channel *curr; + struct scmi_channel *ret =3D ERR_PTR(-ENOENT); + + spin_lock(&scmi_data.channel_list_lock); + list_for_each_entry(curr, &scmi_data.channel_list, list) + { + if ( curr->agent_id =3D=3D agent_id ) + { + if ( curr->domain_id !=3D DOMID_INVALID ) + { + ret =3D ERR_PTR(-EEXIST); + break; + } + + curr->domain_id =3D d->domain_id; + ret =3D curr; + break; + } + } + + spin_unlock(&scmi_data.channel_list_lock); + + return ret; +} + +static void relinquish_scmi_channel(struct scmi_channel *channel) +{ + ASSERT(channel !=3D NULL); + + spin_lock(&scmi_data.channel_list_lock); + channel->domain_id =3D DOMID_INVALID; + spin_unlock(&scmi_data.channel_list_lock); +} + +static int map_channel_memory(struct scmi_channel *channel) +{ + ASSERT(channel && channel->paddr); + channel->shmem =3D ioremap_nocache(channel->paddr, SCMI_SHMEM_MAPPED_S= IZE); + if ( !channel->shmem ) + return -ENOMEM; + + channel->shmem->channel_status =3D SCMI_SHMEM_CHAN_STAT_CHANNEL_FREE; + printk(XENLOG_DEBUG "scmi: Got shmem %lx after vmap %p\n", channel->pa= ddr, + channel->shmem); + + return 0; +} + +static void unmap_channel_memory(struct scmi_channel *channel) +{ + ASSERT(channel && channel->shmem); + iounmap(channel->shmem); + channel->shmem =3D NULL; +} + +static struct scmi_channel *smc_create_channel(uint32_t agent_id, + uint32_t func_id, uint64_t = addr) +{ + struct scmi_channel *channel, *curr; + + spin_lock(&scmi_data.channel_list_lock); + + /* Check if channel already exists while holding the lock */ + list_for_each_entry(curr, &scmi_data.channel_list, list) + { + if ( curr->agent_id =3D=3D agent_id ) + { + spin_unlock(&scmi_data.channel_list_lock); + return ERR_PTR(-EEXIST); + } + } + + channel =3D xmalloc(struct scmi_channel); + if ( !channel ) + { + spin_unlock(&scmi_data.channel_list_lock); + return ERR_PTR(-ENOMEM); + } + + spin_lock_init(&channel->lock); + channel->agent_id =3D agent_id; + channel->func_id =3D func_id; + channel->domain_id =3D DOMID_INVALID; + channel->shmem =3D NULL; + channel->paddr =3D addr; + list_add_tail(&channel->list, &scmi_data.channel_list); + + spin_unlock(&scmi_data.channel_list_lock); + return channel; +} + +static void free_channel_list(void) +{ + struct scmi_channel *curr, *_curr; + + list_for_each_entry_safe(curr, _curr, &scmi_data.channel_list, list) + { + list_del(&curr->list); + xfree(curr); + } +} + +static int __init +scmi_dt_read_hyp_channel_addr(struct dt_device_node *scmi_node, u64 *addr, + u64 *size) +{ + struct dt_device_node *shmem_node; + const __be32 *prop; + + prop =3D dt_get_property(scmi_node, "shmem", NULL); + if ( !prop ) + return -EINVAL; + + shmem_node =3D dt_find_node_by_phandle(be32_to_cpu(*prop)); + if ( IS_ERR_OR_NULL(shmem_node) ) + { + printk(XENLOG_ERR + "scmi: Device tree error, can't parse reserved memory %ld\n= ", + PTR_ERR(shmem_node)); + return PTR_ERR(shmem_node); + } + + return dt_device_get_address(shmem_node, 0, addr, size); +} + +/* + * Handle Dom0 SCMI specific DT nodes + * + * Make a decision on copying SCMI specific nodes into Dom0 device tree. + * For SCMI multi-agent case: + * - shmem nodes will not be copied and generated instead if SCMI + * is enabled for Dom0 + * - scmi node will be copied if SCMI is enabled for Dom0 + */ +static bool scmi_dt_handle_node(struct domain *d, struct dt_device_node *n= ode) +{ + static const struct dt_device_match shmem_matches[] __initconst =3D { + DT_MATCH_COMPATIBLE("arm,scmi-shmem"), + { /* sentinel */ }, + }; + static const struct dt_device_match scmi_matches[] __initconst =3D { + DT_MATCH_PATH("/firmware/scmi"), + { /* sentinel */ }, + }; + + if ( !scmi_data.initialized ) + return false; + + /* skip scmi shmem node for dom0 if scmi not enabled */ + if ( dt_match_node(shmem_matches, node) && !sci_domain_is_enabled(d) ) + { + dt_dprintk(" Skip scmi shmem node\n"); + return true; + } + + /* drop scmi if not enabled */ + if ( dt_match_node(scmi_matches, node) && !sci_domain_is_enabled(d) ) + { + dt_dprintk(" Skip scmi node\n"); + return true; + } + + return false; +} + +static int scmi_assign_device(uint32_t agent_id, uint32_t device_id, + uint32_t flags) +{ + struct scmi_msg_base_set_device_permissions_a2p tx; + struct scmi_channel *channel; + scmi_msg_header_t hdr; + + channel =3D get_channel_by_id(scmi_data.hyp_channel_agent_id); + if ( !channel ) + return -EINVAL; + + hdr.id =3D SCMI_BASE_SET_DEVICE_PERMISSIONS; + hdr.type =3D 0; + hdr.protocol =3D SCMI_BASE_PROTOCOL; + + tx.agent_id =3D agent_id; + tx.device_id =3D device_id; + tx.flags =3D flags; + + return do_smc_xfer(channel, &hdr, &tx, sizeof(tx), NULL, 0); +} + +static int scmi_dt_assign_device(struct domain *d, + struct dt_phandle_args *ac_spec) +{ + struct scmi_channel *agent_channel; + uint32_t scmi_device_id =3D ac_spec->args[0]; + int ret; + + if ( !d->arch.sci_data ) + return 0; + + /* The access-controllers is specified for DT dev, but it's not a SCMI= */ + if ( ac_spec->np !=3D scmi_data.dt_dev ) + return 0; + + agent_channel =3D d->arch.sci_data; + + spin_lock(&agent_channel->lock); + + ret =3D scmi_assign_device(agent_channel->agent_id, scmi_device_id, + SCMI_BASE_DEVICE_ACCESS_ALLOW); + if ( ret ) + { + printk(XENLOG_ERR + "scmi: could not assign dev for %pd agent:%d dev_id:%u (%d)= ", + d, agent_channel->agent_id, scmi_device_id, ret); + } + + spin_unlock(&agent_channel->lock); + return ret; +} + +static int collect_agent_id(struct scmi_channel *agent_channel) +{ + int ret; + scmi_msg_header_t hdr; + struct scmi_msg_base_discover_agent_p2a da_rx; + struct scmi_msg_base_discover_agent_a2p da_tx; + + ret =3D map_channel_memory(agent_channel); + if ( ret ) + return ret; + + hdr.id =3D SCMI_BASE_DISCOVER_AGENT; + hdr.type =3D 0; + hdr.protocol =3D SCMI_BASE_PROTOCOL; + + da_tx.agent_id =3D agent_channel->agent_id; + + ret =3D do_smc_xfer(agent_channel, &hdr, &da_tx, sizeof(da_tx), &da_rx= , + sizeof(da_rx)); + if ( agent_channel->domain_id !=3D DOMID_XEN ) + unmap_channel_memory(agent_channel); + if ( ret ) + return ret; + + printk(XENLOG_DEBUG "id=3D0x%x name=3D%s\n", da_rx.agent_id, da_rx.nam= e); + agent_channel->agent_id =3D da_rx.agent_id; + return 0; +} + +static __init int collect_agents(struct dt_device_node *scmi_node) +{ + const struct dt_device_node *config_node; + const __be32 *prop; + uint32_t len; + const __be32 *end; + uint32_t cells_per_entry =3D 3; /* Default to 3 cells if property is a= bsent. */ + + config_node =3D dt_find_node_by_path("/chosen/xen,config"); + if ( !config_node ) + { + printk(XENLOG_WARNING "scmi: /chosen/xen,config node not found, no= agents to collect.\n"); + return -ENOENT; + } + + /* Check for the optional '#scmi-secondary-agents-cells' property. */ + if ( dt_property_read_u32(config_node, "#scmi-secondary-agents-cells", + &cells_per_entry) ) + { + if ( cells_per_entry !=3D 2 && cells_per_entry !=3D 3 ) + { + printk(XENLOG_ERR "scmi: Invalid #scmi-secondary-agents-cells = value: %u\n", + cells_per_entry); + return -EINVAL; + } + } + + prop =3D dt_get_property(config_node, SCMI_SECONDARY_AGENTS, &len); + if ( !prop ) + { + printk(XENLOG_ERR "scmi: No %s property found, no agents to collec= t.\n", + SCMI_SECONDARY_AGENTS); + return -EINVAL; + } + + /* Validate that the property length is a multiple of the cell size. *= / + if ( len =3D=3D 0 || len % (cells_per_entry * sizeof(uint32_t)) !=3D 0= ) + { + printk(XENLOG_ERR "scmi: Invalid length of %s property: %u for %u = cells per entry\n", + SCMI_SECONDARY_AGENTS, len, cells_per_entry); + return -EINVAL; + } + + end =3D (const __be32 *)((const u8 *)prop + len); + + for ( ; prop < end; ) + { + uint32_t agent_id; + uint32_t smc_id; + uint32_t shmem_phandle; + struct dt_device_node *node; + u64 addr, size; + int ret; + struct scmi_channel *agent_channel; + + smc_id =3D be32_to_cpu(*prop++); + shmem_phandle =3D be32_to_cpu(*prop++); + + if ( cells_per_entry =3D=3D 3 ) + agent_id =3D be32_to_cpu(*prop++); + else + agent_id =3D SCMI_BASE_AGENT_ID_OWN; + + node =3D dt_find_node_by_phandle(shmem_phandle); + if ( !node ) + { + printk(XENLOG_ERR "scmi: Could not find shmem node for agent %= u\n", + agent_id); + return -EINVAL; + } + + ret =3D dt_device_get_address(node, 0, &addr, &size); + if ( ret ) + { + printk(XENLOG_ERR + "scmi: Could not read shmem address for agent %u: %d\n"= , + agent_id, ret); + return ret; + } + + if ( !IS_ALIGNED(size, SCMI_SHMEM_MAPPED_SIZE) ) + { + printk(XENLOG_ERR "scmi: shmem memory is not aligned\n"); + return -EINVAL; + } + + agent_channel =3D smc_create_channel(agent_id, smc_id, addr); + if ( IS_ERR(agent_channel) ) + { + printk(XENLOG_ERR "scmi: Could not create channel for agent %u= : %ld\n", + agent_id, PTR_ERR(agent_channel)); + return PTR_ERR(agent_channel); + } + + if ( cells_per_entry =3D=3D 2 ) + { + ret =3D collect_agent_id(agent_channel); + if ( ret ) + return ret; + } + + printk(XENLOG_DEBUG "scmi: Agent %u SMC %X addr %lx\n", agent_chan= nel->agent_id, + smc_id, (unsigned long)addr); + } + + return 0; +} + +static int scmi_domain_init(struct domain *d, + struct xen_domctl_createdomain *config) +{ + struct scmi_channel *channel; + int ret; + + if ( !scmi_data.initialized ) + return 0; + + /* + * SCMI support is configured via: + * - For dom0: dom0=3Dsci-agent-id=3D in Xen command line + * - For dom0less: xen,sci-agent-id in device tree + * The config->arch.arm_sci_type and config->arch.arm_sci_agent_id + * are already set by domain_build.c or dom0less-build.c + */ + + if ( config->arch.arm_sci_type =3D=3D XEN_DOMCTL_CONFIG_ARM_SCI_NONE ) + return 0; + + channel =3D acquire_scmi_channel(d, config->arch.arm_sci_agent_id); + if ( IS_ERR(channel) ) + { + printk(XENLOG_ERR + "scmi: Failed to acquire SCMI channel for agent_id %u: %ld\= n", + config->arch.arm_sci_agent_id, PTR_ERR(channel)); + return PTR_ERR(channel); + } + + printk(XENLOG_INFO + "scmi: Acquire channel id =3D 0x%x, domain_id =3D %d paddr =3D = 0x%lx\n", + channel->agent_id, channel->domain_id, channel->paddr); + + /* + * Dom0 (if present) needs to have an access to the guest memory range + * to satisfy iomem_access_permitted() check in XEN_DOMCTL_iomem_permi= ssion + * domctl. + */ + if ( hardware_domain && !is_hardware_domain(d) ) + { + ret =3D iomem_permit_access(hardware_domain, paddr_to_pfn(channel-= >paddr), + paddr_to_pfn(channel->paddr + PAGE_SIZE = - 1)); + if ( ret ) + goto error; + } + + d->arch.sci_data =3D channel; + d->arch.sci_enabled =3D true; + + return 0; + +error: + relinquish_scmi_channel(channel); + return ret; +} + +int scmi_domain_sanitise_config(struct xen_domctl_createdomain *config) +{ + if ( config->arch.arm_sci_type !=3D XEN_DOMCTL_CONFIG_ARM_SCI_NONE && + config->arch.arm_sci_type !=3D XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC= _MA ) + { + dprintk(XENLOG_INFO, "scmi: Unsupported ARM_SCI type\n"); + return -EINVAL; + } + + return 0; +} + +static int scmi_relinquish_resources(struct domain *d) +{ + int ret; + struct scmi_channel *channel, *agent_channel; + scmi_msg_header_t hdr; + struct scmi_msg_base_reset_agent_cfg_a2p tx; + + if ( !d->arch.sci_data ) + return 0; + + agent_channel =3D d->arch.sci_data; + + spin_lock(&agent_channel->lock); + tx.agent_id =3D agent_channel->agent_id; + spin_unlock(&agent_channel->lock); + + channel =3D get_channel_by_id(scmi_data.hyp_channel_agent_id); + if ( !channel ) + { + printk(XENLOG_ERR + "scmi: Unable to get Hypervisor scmi channel for domain %d\= n", + d->domain_id); + return -EINVAL; + } + + hdr.id =3D SCMI_BASE_RESET_AGENT_CONFIGURATION; + hdr.type =3D 0; + hdr.protocol =3D SCMI_BASE_PROTOCOL; + + tx.flags =3D 0; + + ret =3D do_smc_xfer(channel, &hdr, &tx, sizeof(tx), NULL, 0); + if ( ret =3D=3D -EOPNOTSUPP ) + return 0; + + return ret; +} + +static void scmi_domain_destroy(struct domain *d) +{ + struct scmi_channel *channel; + + if ( !d->arch.sci_data ) + return; + + channel =3D d->arch.sci_data; + spin_lock(&channel->lock); + + relinquish_scmi_channel(channel); + printk(XENLOG_DEBUG "scmi: Free domain %d\n", d->domain_id); + + d->arch.sci_data =3D NULL; + d->arch.sci_enabled =3D false; + + spin_unlock(&channel->lock); +} + +static bool scmi_handle_call(struct cpu_user_regs *regs) +{ + uint32_t fid =3D (uint32_t)get_user_reg(regs, 0); + struct scmi_channel *agent_channel; + struct domain *d =3D current->domain; + struct arm_smccc_res resp; + bool res =3D false; + + if ( !sci_domain_is_enabled(d) ) + return false; + + agent_channel =3D d->arch.sci_data; + spin_lock(&agent_channel->lock); + + if ( agent_channel->func_id !=3D fid ) + { + res =3D false; + goto unlock; + } + + arm_smccc_1_1_smc(fid, + get_user_reg(regs, 1), + get_user_reg(regs, 2), + get_user_reg(regs, 3), + get_user_reg(regs, 4), + get_user_reg(regs, 5), + get_user_reg(regs, 6), + get_user_reg(regs, 7), + &resp); + + set_user_reg(regs, 0, resp.a0); + set_user_reg(regs, 1, resp.a1); + set_user_reg(regs, 2, resp.a2); + set_user_reg(regs, 3, resp.a3); + res =3D true; +unlock: + spin_unlock(&agent_channel->lock); + + return res; +} + +static const struct sci_mediator_ops scmi_ops =3D { + .domain_init =3D scmi_domain_init, + .domain_destroy =3D scmi_domain_destroy, + .relinquish_resources =3D scmi_relinquish_resources, + .handle_call =3D scmi_handle_call, + .dom0_dt_handle_node =3D scmi_dt_handle_node, + .domain_sanitise_config =3D scmi_domain_sanitise_config, + .assign_dt_device =3D scmi_dt_assign_device, +}; + +static int __init scmi_check_smccc_ver(void) +{ + if ( smccc_ver < ARM_SMCCC_VERSION_1_1 ) + { + printk(XENLOG_WARNING + "scmi: No SMCCC 1.1 support, SCMI calls forwarding disabled= \n"); + return -ENOSYS; + } + + return 0; +} + +static int __init scmi_dt_hyp_channel_read(struct dt_device_node *scmi_nod= e, + struct scmi_data *scmi_data, + u64 *addr) +{ + int ret; + u64 size; + + if ( !dt_property_read_u32(scmi_node, "arm,smc-id", &scmi_data->func_i= d) ) + { + printk(XENLOG_ERR "scmi: unable to read smc-id from DT\n"); + return -ENOENT; + } + + ret =3D scmi_dt_read_hyp_channel_addr(scmi_node, addr, &size); + if ( IS_ERR_VALUE(ret) ) + return -ENOENT; + + if ( !IS_ALIGNED(size, SCMI_SHMEM_MAPPED_SIZE) ) + { + printk(XENLOG_ERR "scmi: shmem memory is not aligned\n"); + return -EINVAL; + } + + return 0; +} + +static __init int scmi_probe(struct dt_device_node *scmi_node, const void = *data) +{ + u64 addr; + int ret; + struct scmi_channel *channel; + unsigned int n_agents; + scmi_msg_header_t hdr; + struct scmi_msg_base_attributes_p2a rx; + + ASSERT(scmi_node !=3D NULL); + + INIT_LIST_HEAD(&scmi_data.channel_list); + spin_lock_init(&scmi_data.channel_list_lock); + + if ( !acpi_disabled ) + { + printk(XENLOG_WARNING "scmi: is not supported when using ACPI\n"); + return -EINVAL; + } + + ret =3D scmi_check_smccc_ver(); + if ( ret ) + return ret; + + ret =3D scmi_dt_hyp_channel_read(scmi_node, &scmi_data, &addr); + if ( ret ) + return ret; + + scmi_data.dt_dev =3D scmi_node; + + channel =3D smc_create_channel(SCMI_BASE_AGENT_ID_OWN, scmi_data.func_= id, addr); + if ( IS_ERR(channel) ) + goto out; + + /* Mark as Xen management channel before collecting agent ID */ + channel->domain_id =3D DOMID_XEN; + + /* Request agent id for Xen management channel */ + ret =3D collect_agent_id(channel); + if ( ret ) + goto error; + + /* Save the agent id for Xen management channel */ + scmi_data.hyp_channel_agent_id =3D channel->agent_id; + + hdr.id =3D SCMI_BASE_PROTOCOL_ATTIBUTES; + hdr.type =3D 0; + hdr.protocol =3D SCMI_BASE_PROTOCOL; + + ret =3D do_smc_xfer(channel, &hdr, NULL, 0, &rx, sizeof(rx)); + if ( ret ) + goto error; + + n_agents =3D SCMI_FIELD_GET(SCMI_BASE_ATTR_NUM_AGENT, rx.attributes); + printk(XENLOG_DEBUG "scmi: Got agent count %d\n", n_agents); + ret =3D collect_agents(scmi_node); + if ( ret ) + goto error; + + ret =3D sci_register(&scmi_ops); + if ( ret ) + { + printk(XENLOG_ERR "SCMI: mediator already registered (ret =3D %d)\= n", + ret); + return ret; + } + + scmi_data.initialized =3D true; + goto out; + +error: + unmap_channel_memory(channel); + free_channel_list(); +out: + return ret; +} + +static const struct dt_device_match scmi_smc_match[] __initconst =3D { + DT_MATCH_PATH("/chosen/xen,config/scmi"), + { /* sentinel */ }, +}; + +DT_DEVICE_START(scmi_smc_ma, "SCMI SMC MEDIATOR", DEVICE_FIRMWARE) + .dt_match =3D scmi_smc_match, + .init =3D scmi_probe, +DT_DEVICE_END + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h index 095b1a23e3..30e46de6d7 100644 --- a/xen/include/public/arch-arm.h +++ b/xen/include/public/arch-arm.h @@ -329,6 +329,7 @@ DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); =20 #define XEN_DOMCTL_CONFIG_ARM_SCI_NONE 0 #define XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC 1 +#define XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC_MA 2 =20 struct xen_arch_domainconfig { /* IN/OUT */ @@ -355,6 +356,8 @@ struct xen_arch_domainconfig { uint32_t clock_frequency; /* IN */ uint8_t arm_sci_type; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB8946.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: d8360ca3-fa3a-4c98-9bca-08de193dc11e X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Nov 2025 11:56:55.6269 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: GP0agEoatQKSqL/ZrA0c3iTIJsZ1vBsgbRzYxmvmLl0L42l1+ig8x5Gu0bfnqGN1GHf/A3QODhgIknMdZbQ/OBXv2DE+WZk7gB2s6bGBqGU= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR03MB7297 Inroducing patch series which includes implementation of the SCI SCMI SMC multi-agent support. This patch series follows RFC v5 [3] series which was introducing both SCMI single-agent and multi-agent support. After the discussion it was decided to split features and upstream singe-agent support first. This feature is merged for now to v4.21-rc2. I'm starting this patch series from v6 to save the discussion history and don't break changes log. Patch 0 - xen/domctl: extend XEN_DOMCTL_assign_device to handle not only iommu - add chainged handling of assigned DT devices to support access-controller functionality through SCI framework. Change was done in two parts: - update iommu_do_dt_domctl() to check for dt_device_is_protected() and not fail if DT device is not protected by IOMMU -add chained call to sci_do_domctl() to do_domctl() Patch 3 - xen/arm: scmi: introduce SCI SCMI SMC multi-agent driver - added "scmi-secondary-agents" and "#scmi-secondary-agent-cells" property to "xen,config" node in "chosen" to inform SCI SCMI multi-agent driver about available agents and their configuration. It defines to map. This option is Xen specific as Xen is the only one entry in the system which need to know about SCMI multi-agent support and configuratio= n. - each guest using SCMI should be configured with SCMI agent_id, so SCMI FW can implement Agent-specific permission policy. -- dom0: dom0_scmi_agent_id=3D in Xen command line option -- toolstack: arm_sci =3D "type=3Dscmi_smc_multiagent,agent_id=3D" -- dom0less: "xen,sci_type", "xen,sci_agent_id" properties in "xen,domain" nodes. - factored out SCMI generic definitions (re-usable) - factored out SCMI shmem code (re-usable) - the SCMI passthrough configuration for guest domains is similar to any ot= her HW passthrough cfg. Patch 4 - docs: arm: add SCI SCMI SMC multi-agent driver docs - add SCI SCMI SMC multi-agent driver documentation. Add separate SCMI DT node for Xen management agent under "xen,config" node under chosen. All Xen-specific configuration provided under "/chosen" node. This approach allows to isolate modifications to Host DT only under "/chosen" node. This approach provides the following device tree (DT) parameters (placed under xen,config node): - "scmi-secondary-agents": A Xen-specific parameter under the "/chosen" node, which describes the SCMI agent configuration for the domains. - the SCMI configuration for Xen (privileged agent) and the shared memory configuration for all agents are provided under the "/chosen" node and are used strictly by Xen for its initial configuration. - the scmi_shm and SCMI configuration for Dom0 are placed in the "/firmware/scmi" node so that they can be moved to Dom0 without any changes. This configuration allows the use of Xen-specific nodes to provide information strictly needed by Xen while using the default SCMI configuration for Dom0 and other domains. As a result, no additional bindings need to be introduced to the device tree. This simplifies the Xen SCMI multi-agent configuration and utilizes generic device tree bindings for the domains. Code can be found at: https://github.com/oleksiimoisieiev/xen/tree/scmi_ma_upstrv6 [1] RFC v2: http://patchwork.kernel.org/project/xen-devel/cover/cover.1644341635.git.ol= eksii_moisieiev@epam.com/ [2] RFC v3: https://patchwork.kernel.org/project/xen-devel/patch/20250311111618.1850927= -1-grygorii_strashko@epam.com [3] RFC v5: https://lore.kernel.org/xen-devel/cover.1753184487.git.oleksii_moisieiev@ep= am.com/ [4] SCMI single-agent: https://lore.kernel.org/xen-devel/cover.1756995595.git.oleksii_moisieiev@ep= am.com/ SCMI spec: https://developer.arm.com/documentation/den0056/e/?lang=3Den SCMI bindings: https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree= /Documentation/devicetree/bindings/firmware/arm,scmi.yaml https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree= /Documentation/devicetree/bindings/access-controllers/access-controllers.ya= ml Reference EL3 FW: RPI5: https://github.com/xen-troops/arm-trusted-firmware/commits/rpi5_dev/ Renesas v4h: https://github.com/GrygiriiS/arm-trusted-firmware/commits/rcar_gen4_v2.7_v4= x-scmi_upd/ base-commit: dbe60f244c (Update Xen to 4.21, 2025-02-21) Changes in v6: - change iommu_do_domctl and sci_do_domctl command order and call sci_do_domctl first which will produce cleaner code path. Also dropped changing return code when iommu was disabled in iommu_do_domctl. - sorted objs in Makefile alhabetically - added newline at the end of Makefile - used uint{N}_t intead of u{N} - add comment about why 32 bit IO operations were used - updated cast opertaions to avoid dropping constness which is wrong - move function definitions to generic place so the could be reused by other arch - add SPDX tag to io.c - updated scmi-shmem to use io.h from generic location - update scmi_agent_id parameter to be provided inside dom0=3D parameter list and have the following format "dom0=3Dsci-agent-id=3D0" This change was done as a response for Stefano comment and requires a lot of code changes, but produces much cleaner solution that's why I've added it to the code. - fix file comments and return codes - fix lenght checks in shmem_{get,put}_message to use offsetof - remove len member from scmi_channel structure as it is not used - set scmi-secondary-agents property to be mandatory since if no secondary agents were provided then there is no sence to enable scmi when no secondary agents are populated to the Domains - update documentation in booting.txt, added xen_scmi node to the example - adjust d->arch.sci_enabled value in scmi_domain_destroy - fix lock management in smc_create_channel call - avoid extra map_channel_memory command for Xen management channel because collect_agent_id call unmaps memory if DOMID_XEN is not set. So for Xen management channel we can init domain_id ad DOMID_XEN before calling collect_agent_id so memory shouldn't be unmapped. - remove all HVC mentions from the multi-agent doc - update sci-agent-id parameter description in the documentation - add missing Sign-of - minor fixes across the document Changes in v5: - return -EINVAL if mediator without assign_dt_device was provided - invert return code check for iommu_do_domctl in XEN_DOMCTL_assign_device domctl processing to make cleaner code - change -ENOTSUPP error code to -ENXIO in sci_do_domctl - handle -ENXIO return comde of iommu_do_domctl - leave !dt_device_is_protected check in iommu_do_dt_domctl to make code work the same way it's done in "handle_device" call while creating hwdom(dom0) and "handle_passthrough_prop" call for dom0less creation - drop return check from sci_assign_dt_device call as not needed - do not return EINVAL when addign_dt_device is not set. That is because this callback is optional and not implemented in single-agent drive= r - move memcpy_toio/fromio to the generic place - fix device-tree example format in booting.txt, added ";" after "}". - update define in scmi-proto.h - update define in scmi-shmem.h file - scmi_assign_device - do not ignore -EOPNOTSUPP return code of the do_smc_xfer - remove overwriting agent_channel->agent_id after SCMI_BASE_DISCOVER_AGENT call - add multi-agent files to the MAINTAINERS - add SCMI multi-agent description to the SUPPORT.md - handle ARM_SMCCC_INVALID_PARAMETER return code and return -EINVAL for smc call - updated collect_agents function. Set agent_id parameter as optional in scmi-secondary-agents device-tree property - introduce "#scmi-secondary-agents-cells" parameter to set if agent_id was provided - reanme xen,scmi-secondary-agents property to scmi-secondary-agents - move memcpu_toio/fromio for the generic place - update Xen to get management channel from /chosen/xen,config node - get hypervisor channnel from node instead of using hardcoded - update handling scmi and shmem nodes for the domain - Set multi-agent driver to support only Arm64 - rework multi-agent driver to leave Host Device-tree unmodified Changes in v4: - toolstack comments from Anthony PERARD - added dom0less support - added doc for "xen,scmi-secondary-agents" Grygorii Strashko (2): xen/domctl: extend XEN_DOMCTL_assign_device to handle not only iommu docs: arm: add SCI SCMI SMC multi-agent driver docs Oleksii Moisieiev (3): xen: arm: smccc: add INVALID_PARAMETER error code lib/arm: Add I/O memory copy helpers xen/arm: scmi: introduce SCI SCMI SMC multi-agent driver MAINTAINERS | 4 + SUPPORT.md | 11 + .../arm/firmware/arm-scmi.rst | 341 ++++++++ docs/man/xl.cfg.5.pod.in | 13 + docs/misc/arm/device-tree/booting.txt | 103 +++ docs/misc/xen-command-line.pandoc | 19 +- tools/libs/light/libxl_arm.c | 4 + tools/libs/light/libxl_types.idl | 4 +- tools/xl/xl_parse.c | 12 + xen/arch/arm/dom0less-build.c | 11 + xen/arch/arm/domain_build.c | 26 +- xen/arch/arm/firmware/Kconfig | 12 + xen/arch/arm/firmware/Makefile | 1 + xen/arch/arm/firmware/sci.c | 35 + xen/arch/arm/firmware/scmi-proto.h | 164 ++++ xen/arch/arm/firmware/scmi-shmem.c | 115 +++ xen/arch/arm/firmware/scmi-shmem.h | 45 + xen/arch/arm/firmware/scmi-smc-multiagent.c | 794 ++++++++++++++++++ xen/arch/arm/include/asm/firmware/sci.h | 14 + xen/arch/arm/include/asm/smccc.h | 1 + xen/common/domctl.c | 26 + xen/drivers/passthrough/device_tree.c | 6 + xen/include/public/arch-arm.h | 3 + xen/include/xen/lib/io.h | 83 ++ xen/lib/Makefile | 1 + xen/lib/arm/Makefile | 1 + xen/lib/arm/io.c | 102 +++ 27 files changed, 1948 insertions(+), 3 deletions(-) create mode 100644 xen/arch/arm/firmware/scmi-proto.h create mode 100644 xen/arch/arm/firmware/scmi-shmem.c create mode 100644 xen/arch/arm/firmware/scmi-shmem.h create mode 100644 xen/arch/arm/firmware/scmi-smc-multiagent.c create mode 100644 xen/include/xen/lib/io.h create mode 100644 xen/lib/arm/Makefile create mode 100644 xen/lib/arm/io.c --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Sat Nov 01 11:57:15 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 01 Nov 2025 11:57:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1154891.1484529 (Exim 4.92) (envelope-from ) id 1vFAEC-0002B9-G8; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB8946.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: fafdac47-cdc8-4cdd-084d-08de193dc220 X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Nov 2025 11:56:57.3554 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: MrNyCxpbZbT2jGEB6X+8psSJ7X4yox0a8+/MGA3ZUYdkcSSXNZpDXDk2HXLkaddCxRzi+6LUGaTlbYIVISvB4TiyOwP5sD9z2jaYwlChLtI= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR03MB7130 This commit introduces two helper functions, `__memcpy_fromio` and `__memcpy_toio`, to provide a robust mechanism for copying data between standard memory and memory-mapped I/O (MMIO) space for the ARM architecture. These functions are designed to handle memory transfers safely, accounting for potential address alignment issues to ensure correctness and improve performance where possible. The implementation is specific to ARM and uses relaxed I/O accessors. __memcpy_fromio: Copies a block of data from an I/O memory source to a destination in standard ("real") memory. The implementation first handles any unaligned bytes at the beginning of the source buffer individually using byte-wise reads. It then copies the bulk of the data using 32-bit reads for efficiency, and finally processes any remaining bytes at the end of the buffer. __memcpy_toio: Copies a block of data from standard memory to a destination in I/O memory space. It follows a similar strategy, handling any initial unaligned portion of the destination buffer byte-by-byte before using more efficient 32-bit writes for the main, aligned part of the transfer. Any trailing bytes are also handled individually. The double underscore (__) prefix follows the Linux kernel convention for low-level or "raw" implementation functions that: 1. Indicate internal/low-level implementation: The __ prefix signals that t= hese are the actual implementation functions, not wrapper macros or inline he= lpers. On x86, memcpy_fromio/memcpy_toio are simply #defined as memcpy (see xen/arch/x86/dmi_scan.c), but on ARM they require special handling. 2. Architecture-specific behavior: Unlike x86 where IO memory can be access= ed like regular memory, ARM requires specific IO accessor functions (readl_= relaxed, writel_relaxed, etc.) to ensure proper memory barriers and hardware sema= ntics. 3. Prevent accidental misuse: The __ prefix warns developers that these fun= ctions: - Have specific alignment and ordering requirements - Must not be confused with regular memcpy() - Are meant for IO memory regions only (marked with __iomem) 4. Consistent with Linux kernel style: This naming convention is inherited = from the Linux kernel's ARM implementation (see linux/arch/arm/include/asm/io= .h), maintaining compatibility and familiarity for developers working across = both codebases. Signed-off-by: Oleksii Moisieiev --- Changes in v6: - sorted objs in Makefile alhabetically - added newline at the end of Makefile - used uint{N}_t intead of u{N} - add comment about why 32 bit IO operations were used - updated cast opertaions to avoid dropping constness which is wrong - move function definitions to generic place so the could be reused by other arch - add SPDX tag to io.c Changes in v5: - move memcpy_toio/fromio to the generic place xen/include/xen/lib/io.h | 83 +++++++++++++++++++++++++++++++ xen/lib/Makefile | 1 + xen/lib/arm/Makefile | 1 + xen/lib/arm/io.c | 102 +++++++++++++++++++++++++++++++++++++++ 4 files changed, 187 insertions(+) create mode 100644 xen/include/xen/lib/io.h create mode 100644 xen/lib/arm/Makefile create mode 100644 xen/lib/arm/io.c diff --git a/xen/include/xen/lib/io.h b/xen/include/xen/lib/io.h new file mode 100644 index 0000000000..16758691b8 --- /dev/null +++ b/xen/include/xen/lib/io.h @@ -0,0 +1,83 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Generic I/O memory copy function prototypes. + * + * These functions provide low-level implementation for copying data betwe= en + * regular memory and I/O memory regions. Each architecture must provide i= ts + * own implementation based on the specific requirements of the architectu= re's + * memory model and I/O access patterns. + * + * Architecture-specific implementations: + * =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + * Each architecture should implement these functions in xen/lib//io= .c + * based on their hardware requirements: + * + * - ARM/ARM64: Requires special I/O accessors (readl_relaxed, writel_rela= xed) + * with proper memory barriers and alignment handling. + * See xen/lib/arm/io.c for implementation. + * + * - x86/x86_64: I/O memory is directly accessible, so typically uses: + * #define memcpy_fromio memcpy + * #define memcpy_toio memcpy + * See xen/arch/x86/dmi_scan.c for example usage. + * + * - Other architectures (RISC-V, PowerPC, MIPS, etc.): Should provide the= ir + * own implementations following the function signatures defined below. + * + * Naming Convention: + * =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + * The double underscore (__) prefix indicates these are low-level "raw" + * implementation functions, following the Linux kernel convention for + * architecture-specific primitives. This warns developers that these + * functions have specific requirements and should not be confused with + * regular memcpy(). + */ + +#ifndef _XEN_LIB_IO_H +#define _XEN_LIB_IO_H + +#include + +/* + * __memcpy_fromio - Copy data from I/O memory space to regular memory + * @to: Destination buffer in regular memory + * @from: Source address in I/O memory space (must be marked __iomem) + * @count: Number of bytes to copy + * + * This function handles copying from memory-mapped I/O regions using + * architecture-appropriate I/O accessor functions. It ensures proper: + * - Memory ordering and barriers + * - Alignment requirements + * - Hardware-specific access semantics + * + * Each architecture provides its own implementation that may: + * - Use special I/O accessor functions (ARM: readl_relaxed, readb_relaxed= ) + * - Implement alignment handling for devices requiring specific access si= zes + * - Add memory barriers to ensure ordering with other I/O operations + * - Or simply map to memcpy() if the architecture allows direct I/O acces= s + */ +extern void __memcpy_fromio(void *to, const volatile void __iomem *from, + size_t count); + +/* + * __memcpy_toio - Copy data from regular memory to I/O memory space + * @to: Destination address in I/O memory space (must be marked __iomem) + * @from: Source buffer in regular memory + * @count: Number of bytes to copy + * + * This function handles copying to memory-mapped I/O regions using + * architecture-appropriate I/O accessor functions. It ensures proper: + * - Memory ordering and barriers + * - Alignment requirements + * - Hardware-specific access semantics + * + * Each architecture provides its own implementation that may: + * - Use special I/O accessor functions (ARM: writel_relaxed, writeb_relax= ed) + * - Implement alignment handling for devices requiring specific access si= zes + * - Add memory barriers to ensure ordering with other I/O operations + * - Or simply map to memcpy() if the architecture allows direct I/O acces= s + */ +extern void __memcpy_toio(volatile void __iomem *to, const void *from, + size_t count); + +#endif /* _XEN_LIB_IO_H */ diff --git a/xen/lib/Makefile b/xen/lib/Makefile index 5ccb1e5241..6bb0491d89 100644 --- a/xen/lib/Makefile +++ b/xen/lib/Makefile @@ -1,3 +1,4 @@ +obj-$(CONFIG_ARM) +=3D arm/ obj-$(CONFIG_X86) +=3D x86/ =20 lib-y +=3D bsearch.o diff --git a/xen/lib/arm/Makefile b/xen/lib/arm/Makefile new file mode 100644 index 0000000000..8a7b6cfd59 --- /dev/null +++ b/xen/lib/arm/Makefile @@ -0,0 +1 @@ +obj-y +=3D io.o diff --git a/xen/lib/arm/io.c b/xen/lib/arm/io.c new file mode 100644 index 0000000000..fbce204775 --- /dev/null +++ b/xen/lib/arm/io.c @@ -0,0 +1,102 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#include +#include + +/* + * These functions use 32-bit (uint32_t) IO operations rather than 64-bit = for + * the following reasons: + * + * 1. ARM32/ARM64 compatibility: On ARM32, there is no atomic 64-bit IO ac= cessor + * (readq_relaxed). Only readq_relaxed_non_atomic() exists, which inter= nally + * performs two separate 32-bit reads. Using it would not provide any + * performance benefit and could introduce ordering issues. + * + * 2. Hardware compatibility: Many IO devices only support 32-bit aligned = accesses. + * 64-bit accesses might not be supported or could cause bus errors on = some + * hardware. + * + * 3. Simplicity: Using 32-bit operations keeps the code simple, maintaina= ble, + * and consistent across both ARM32 and ARM64 architectures without + * architecture-specific conditionals. + * + * The performance difference between 32-bit and 64-bit operations in this + * context is negligible compared to the IO access latency itself. + */ + +/* + * memcpy_fromio - Copy data from IO memory space to "real" memory space. + * @to: Where to copy to + * @from: Where to copy from + * @count: The size of the area. + */ +void __memcpy_fromio(void *to, const volatile void __iomem *from, + size_t count) +{ + while ( count && !IS_ALIGNED((unsigned long)from, 4) ) + { + *(uint8_t *)to =3D readb_relaxed(from); + from++; + to++; + count--; + } + + while ( count >=3D 4 ) + { + *(uint32_t *)to =3D readl_relaxed(from); + from +=3D 4; + to +=3D 4; + count -=3D 4; + } + + while ( count ) + { + *(uint8_t *)to =3D readb_relaxed(from); + from++; + to++; + count--; + } +} + +/* + * memcpy_toio - Copy data from "real" memory space to IO memory space. + * @to: Where to copy to + * @from: Where to copy from + * @count: The size of the area. + */ +void __memcpy_toio(volatile void __iomem *to, const void *from, + size_t count) +{ + while ( count && !IS_ALIGNED((unsigned long)to, 4) ) + { + writeb_relaxed(*(const uint8_t *)from, to); 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB8946.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: ec32d77b-1be7-474f-876b-08de193dc187 X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Nov 2025 11:56:56.3165 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: GwtNHkJbb24eWhfnwY1WIt9sUG+cWIhtzCzYig/7QyiEENpiImxaIKCAfWlTcAzUJfhOVXqiULLz3J6hMfCFJZ/ruHnQSYvp82a3R39B/d4= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR03MB7130 From: Grygorii Strashko Add chained handling of assigned DT devices to support access-controller functionality through SCI framework, so DT device assign request can be passed to FW for processing and enabling VM access to requested device (for example, device power management through FW interface like SCMI). The SCI access-controller DT device processing is chained after IOMMU processing and expected to be executed for any DT device regardless of its protection by IOMMU (or if IOMMU is disabled). This allows to pass not only IOMMU protected DT device through xl.cfg:"dtdev" property for processing: dtdev =3D [ "/soc/video@e6ef0000", <- IOMMU protected device "/soc/i2c@e6508000", <- not IOMMU protected device ] The change is done in two parts: 1) update iommu_do_dt_domctl() to check for dt_device_is_protected() and not fail if DT device is not protected by IOMMU 2) add chained call to sci_do_domctl() in do_domctl() Signed-off-by: Grygorii Strashko Signed-off-by: Oleksii Moisieiev --- Changes in v6: - change iommu_do_domctl and sci_do_domctl command order and call sci_do_domctl first which will produce cleaner code path. Also dropped changing return code when iommu was disabled in iommu_do_domctl. Changes in v5: - return -EINVAL if mediator without assign_dt_device was provided - invert return code check for iommu_do_domctl in XEN_DOMCTL_assign_device domctl processing to make cleaner code - change -ENOTSUPP error code to -ENXIO in sci_do_domctl - handle -ENXIO return comde of iommu_do_domctl - leave !dt_device_is_protected check in iommu_do_dt_domctl to make code work the same way it's done in "handle_device" call while creating hwdom(dom0) and "handle_passthrough_prop" call for dom0less creation - drop return check from sci_assign_dt_device call as not needed - do not return EINVAL when addign_dt_device is not set. That is because this callback is optional and not implemented in single-agent drive= r xen/arch/arm/firmware/sci.c | 35 +++++++++++++++++++++++++ xen/arch/arm/include/asm/firmware/sci.h | 14 ++++++++++ xen/common/domctl.c | 26 ++++++++++++++++++ xen/drivers/passthrough/device_tree.c | 6 +++++ 4 files changed, 81 insertions(+) diff --git a/xen/arch/arm/firmware/sci.c b/xen/arch/arm/firmware/sci.c index aa93cda7f0..31a7e5c28b 100644 --- a/xen/arch/arm/firmware/sci.c +++ b/xen/arch/arm/firmware/sci.c @@ -126,6 +126,41 @@ int sci_assign_dt_device(struct domain *d, struct dt_d= evice_node *dev) return 0; } =20 +int sci_do_domctl(struct xen_domctl *domctl, struct domain *d, + XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl) +{ + struct dt_device_node *dev; + int ret =3D 0; + + switch ( domctl->cmd ) + { + case XEN_DOMCTL_assign_device: + ret =3D -ENXIO; + if ( domctl->u.assign_device.dev !=3D XEN_DOMCTL_DEV_DT ) + break; + + if ( !cur_mediator ) + break; + + if ( !cur_mediator->assign_dt_device ) + break; + + ret =3D dt_find_node_by_gpath(domctl->u.assign_device.u.dt.path, + domctl->u.assign_device.u.dt.size, &de= v); + if ( ret ) + return ret; + + ret =3D sci_assign_dt_device(d, dev); + + break; + default: + /* do not fail here as call is chained with iommu handling */ + break; + } + + return ret; +} + static int __init sci_init(void) { struct dt_device_node *np; diff --git a/xen/arch/arm/include/asm/firmware/sci.h b/xen/arch/arm/include= /asm/firmware/sci.h index 3500216bc2..a2d314e627 100644 --- a/xen/arch/arm/include/asm/firmware/sci.h +++ b/xen/arch/arm/include/asm/firmware/sci.h @@ -146,6 +146,14 @@ int sci_dt_finalize(struct domain *d, void *fdt); * control" functionality. */ int sci_assign_dt_device(struct domain *d, struct dt_device_node *dev); + +/* + * SCI domctl handler + * + * Only XEN_DOMCTL_assign_device is handled for now. + */ +int sci_do_domctl(struct xen_domctl *domctl, struct domain *d, + XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl); #else =20 static inline bool sci_domain_is_enabled(struct domain *d) @@ -195,6 +203,12 @@ static inline int sci_assign_dt_device(struct domain *= d, return 0; } =20 +static inline int sci_do_domctl(struct xen_domctl *domctl, struct domain *= d, + XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_dom= ctl) +{ + return 0; +} + #endif /* CONFIG_ARM_SCI */ =20 #endif /* __ASM_ARM_SCI_H */ diff --git a/xen/common/domctl.c b/xen/common/domctl.c index 954d790226..b89559ef7b 100644 --- a/xen/common/domctl.c +++ b/xen/common/domctl.c @@ -29,6 +29,7 @@ #include =20 #include +#include #include #include #include @@ -827,7 +828,32 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_= domctl) case XEN_DOMCTL_test_assign_device: case XEN_DOMCTL_deassign_device: case XEN_DOMCTL_get_device_group: + int ret1; + =20 + /* + * Add chained handling of assigned DT devices to support + * access-controller functionality through SCI framework, so + * DT device assign request can be passed to FW for processing and + * enabling VM access to requested device. + * The access-controller DT device processing is chained before IO= MMU + * processing preserving return code and expected to be executed f= or + * any DT device regardless if DT device is protected by IOMMU or + * not (or IOMMU is disabled). + */ + ret1 =3D sci_do_domctl(op, d, u_domctl); + ret =3D iommu_do_domctl(op, d, u_domctl); + if ( ret < 0 ) + return ret; + + /* + * If IOMMU processing was successful, check for SCI processing re= turn + * code and if it was failed then overwrite the return code to pro= pagate + * SCI failure back to caller. + */ + if ( ret1 !=3D -ENXIO ) + ret =3D ret1; + break; =20 case XEN_DOMCTL_get_paging_mempool_size: diff --git a/xen/drivers/passthrough/device_tree.c b/xen/drivers/passthroug= h/device_tree.c index f5850a2607..29a44dc773 100644 --- a/xen/drivers/passthrough/device_tree.c +++ b/xen/drivers/passthrough/device_tree.c @@ -379,6 +379,12 @@ int iommu_do_dt_domctl(struct xen_domctl *domctl, stru= ct domain *d, break; } =20 + if ( !dt_device_is_protected(dev) ) + { + ret =3D 0; + break; + } + ret =3D iommu_assign_dt_device(d, dev); =20 if ( ret ) --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Sat Nov 01 11:57:16 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 01 Nov 2025 11:57:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1154894.1484555 (Exim 4.92) (envelope-from ) id 1vFAEE-0002jI-JL; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB8946.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: b6dab78e-54f1-4b34-6335-08de193dc1d4 X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Nov 2025 11:56:56.7960 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: V2ucjCilb8ajYH7jROvjly4qU6nGR2i2OFe9PB+It+xjHhJ+WwCZP8subZ1x9ILS8CiQDrCKWz/tlgzmWFL2nCP3InYBDl15rl5OE76yVEE= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR03MB7130 According to the "7.1 Return Codes" section of DEN0028 [1] INVALID_PARAMETER code (-3) is returned when one of the call parameters has a non-supported value. Adding this error code to the common smccc header file. [1]: https://documentation-service.arm.com/static/5f8edaeff86e16515cdbe4c6 Signed-off-by: Oleksii Moisieiev --- xen/arch/arm/include/asm/smccc.h | 1 + 1 file changed, 1 insertion(+) diff --git a/xen/arch/arm/include/asm/smccc.h b/xen/arch/arm/include/asm/sm= ccc.h index a289c48b7f..dc6af94db1 100644 --- a/xen/arch/arm/include/asm/smccc.h +++ b/xen/arch/arm/include/asm/smccc.h @@ -381,6 +381,7 @@ void arm_smccc_1_2_smc(const struct arm_smccc_1_2_regs = *args, 0x3FFF) =20 /* SMCCC error codes */ +#define ARM_SMCCC_INVALID_PARAMETER (-3) #define ARM_SMCCC_NOT_REQUIRED (-2) #define ARM_SMCCC_ERR_UNKNOWN_FUNCTION (-1) #define ARM_SMCCC_NOT_SUPPORTED (-1) --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Sat Nov 01 12:00:29 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 01 Nov 2025 12:00:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1154943.1484589 (Exim 4.92) (envelope-from ) id 1vFAHU-0006UL-7S; Sat, 01 Nov 2025 12:00:28 +0000 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Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-2-kevin.brodsky@arm.com> From: David Hildenbrand Autocrypt: addr=david@redhat.com; keydata= xsFNBFXLn5EBEAC+zYvAFJxCBY9Tr1xZgcESmxVNI/0ffzE/ZQOiHJl6mGkmA1R7/uUpiCjJ dBrn+lhhOYjjNefFQou6478faXE6o2AhmebqT4KiQoUQFV4R7y1KMEKoSyy8hQaK1umALTdL QZLQMzNE74ap+GDK0wnacPQFpcG1AE9RMq3aeErY5tujekBS32jfC/7AnH7I0v1v1TbbK3Gp XNeiN4QroO+5qaSr0ID2sz5jtBLRb15RMre27E1ImpaIv2Jw8NJgW0k/D1RyKCwaTsgRdwuK Kx/Y91XuSBdz0uOyU/S8kM1+ag0wvsGlpBVxRR/xw/E8M7TEwuCZQArqqTCmkG6HGcXFT0V9 PXFNNgV5jXMQRwU0O/ztJIQqsE5LsUomE//bLwzj9IVsaQpKDqW6TAPjcdBDPLHvriq7kGjt WhVhdl0qEYB8lkBEU7V2Yb+SYhmhpDrti9Fq1EsmhiHSkxJcGREoMK/63r9WLZYI3+4W2rAc UucZa4OT27U5ZISjNg3Ev0rxU5UH2/pT4wJCfxwocmqaRr6UYmrtZmND89X0KigoFD/XSeVv jwBRNjPAubK9/k5NoRrYqztM9W6sJqrH8+UWZ1Idd/DdmogJh0gNC0+N42Za9yBRURfIdKSb B3JfpUqcWwE7vUaYrHG1nw54pLUoPG6sAA7Mehl3nd4pZUALHwARAQABzSREYXZpZCBIaWxk ZW5icmFuZCA8ZGF2aWRAcmVkaGF0LmNvbT7CwZoEEwEIAEQCGwMCF4ACGQEFCwkIBwICIgIG FQoJCAsCBBYCAwECHgcWIQQb2cqtc1xMOkYN/MpN3hD3AP+DWgUCaJzangUJJlgIpAAKCRBN 3hD3AP+DWhAxD/9wcL0A+2rtaAmutaKTfxhTP0b4AAp1r/eLxjrbfbCCmh4pqzBhmSX/4z11 opn2KqcOsueRF1t2ENLOWzQu3Roiny2HOU7DajqB4dm1BVMaXQya5ae2ghzlJN9SIoopTWlR 0Af3hPj5E2PYvQhlcqeoehKlBo9rROJv/rjmr2x0yOM8qeTroH/ZzNlCtJ56AsE6Tvl+r7cW 3x7/Jq5WvWeudKrhFh7/yQ7eRvHCjd9bBrZTlgAfiHmX9AnCCPRPpNGNedV9Yty2Jnxhfmbv Pw37LA/jef8zlCDyUh2KCU1xVEOWqg15o1RtTyGV1nXV2O/mfuQJud5vIgzBvHhypc3p6VZJ lEf8YmT+Ol5P7SfCs5/uGdWUYQEMqOlg6w9R4Pe8d+mk8KGvfE9/zTwGg0nRgKqlQXrWRERv cuEwQbridlPAoQHrFWtwpgYMXx2TaZ3sihcIPo9uU5eBs0rf4mOERY75SK+Ekayv2ucTfjxr Kf014py2aoRJHuvy85ee/zIyLmve5hngZTTe3Wg3TInT9UTFzTPhItam6dZ1xqdTGHZYGU0O otRHcwLGt470grdiob6PfVTXoHlBvkWRadMhSuG4RORCDpq89vu5QralFNIf3EysNohoFy2A LYg2/D53xbU/aa4DDzBb5b1Rkg/udO1gZocVQWrDh6I2K3+cCs7BTQRVy5+RARAA59fefSDR 9nMGCb9LbMX+TFAoIQo/wgP5XPyzLYakO+94GrgfZjfhdaxPXMsl2+o8jhp/hlIzG56taNdt VZtPp3ih1AgbR8rHgXw1xwOpuAd5lE1qNd54ndHuADO9a9A0vPimIes78Hi1/yy+ZEEvRkHk /kDa6F3AtTc1m4rbbOk2fiKzzsE9YXweFjQvl9p+AMw6qd/iC4lUk9g0+FQXNdRs+o4o6Qvy iOQJfGQ4UcBuOy1IrkJrd8qq5jet1fcM2j4QvsW8CLDWZS1L7kZ5gT5EycMKxUWb8LuRjxzZ 3QY1aQH2kkzn6acigU3HLtgFyV1gBNV44ehjgvJpRY2cC8VhanTx0dZ9mj1YKIky5N+C0f21 zvntBqcxV0+3p8MrxRRcgEtDZNav+xAoT3G0W4SahAaUTWXpsZoOecwtxi74CyneQNPTDjNg azHmvpdBVEfj7k3p4dmJp5i0U66Onmf6mMFpArvBRSMOKU9DlAzMi4IvhiNWjKVaIE2Se9BY FdKVAJaZq85P2y20ZBd08ILnKcj7XKZkLU5FkoA0udEBvQ0f9QLNyyy3DZMCQWcwRuj1m73D sq8DEFBdZ5eEkj1dCyx+t/ga6x2rHyc8Sl86oK1tvAkwBNsfKou3v+jP/l14a7DGBvrmlYjO 59o3t6inu6H7pt7OL6u6BQj7DoMAEQEAAcLBfAQYAQgAJgIbDBYhBBvZyq1zXEw6Rg38yk3e EPcA/4NaBQJonNqrBQkmWAihAAoJEE3eEPcA/4NaKtMQALAJ8PzprBEXbXcEXwDKQu+P/vts IfUb1UNMfMV76BicGa5NCZnJNQASDP/+bFg6O3gx5NbhHHPeaWz/VxlOmYHokHodOvtL0WCC 8A5PEP8tOk6029Z+J+xUcMrJClNVFpzVvOpb1lCbhjwAV465Hy+NUSbbUiRxdzNQtLtgZzOV Zw7jxUCs4UUZLQTCuBpFgb15bBxYZ/BL9MbzxPxvfUQIPbnzQMcqtpUs21CMK2PdfCh5c4gS sDci6D5/ZIBw94UQWmGpM/O1ilGXde2ZzzGYl64glmccD8e87OnEgKnH3FbnJnT4iJchtSvx yJNi1+t0+qDti4m88+/9IuPqCKb6Stl+s2dnLtJNrjXBGJtsQG/sRpqsJz5x1/2nPJSRMsx9 5YfqbdrJSOFXDzZ8/r82HgQEtUvlSXNaXCa95ez0UkOG7+bDm2b3s0XahBQeLVCH0mw3RAQg r7xDAYKIrAwfHHmMTnBQDPJwVqxJjVNr7yBic4yfzVWGCGNE4DnOW0vcIeoyhy9vnIa3w1uZ 3iyY2Nsd7JxfKu1PRhCGwXzRw5TlfEsoRI7V9A8isUCoqE2Dzh3FvYHVeX4Us+bRL/oqareJ CIFqgYMyvHj7Q06kTKmauOe4Nf0l0qEkIuIzfoLJ3qr5UyXc2hLtWyT9Ir+lYlX9efqh7mOY qIws/H2t In-Reply-To: <20251029100909.3381140-2-kevin.brodsky@arm.com> X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: Xm6OInkJQ8OBHqRhs8b4ZRCmD1vghTnXYWm2YjDtC7Y_1761998735 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 29.10.25 11:08, Kevin Brodsky wrote: > From: Alexander Gordeev > > Since commit b9ef323ea168 ("powerpc/64s: Disable preemption in hash > lazy mmu mode") a task can not be preempted while in lazy MMU mode. > Therefore, the batch re-activation code is never called, so remove it. > > Signed-off-by: Alexander Gordeev > Signed-off-by: Kevin Brodsky > --- Reviewed-by: David Hildenbrand -- Cheers David / dhildenb From xen-devel-bounces@lists.xenproject.org Sat Nov 01 12:14:40 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 01 Nov 2025 12:14:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1154997.1484608 (Exim 4.92) (envelope-from ) id 1vFAV8-0001Aj-MO; Sat, 01 Nov 2025 12:14:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1154997.1484608; Sat, 01 Nov 2025 12:14:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFAV8-0001Ac-Jg; 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Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-3-kevin.brodsky@arm.com> From: David Hildenbrand Autocrypt: addr=david@redhat.com; keydata= xsFNBFXLn5EBEAC+zYvAFJxCBY9Tr1xZgcESmxVNI/0ffzE/ZQOiHJl6mGkmA1R7/uUpiCjJ dBrn+lhhOYjjNefFQou6478faXE6o2AhmebqT4KiQoUQFV4R7y1KMEKoSyy8hQaK1umALTdL QZLQMzNE74ap+GDK0wnacPQFpcG1AE9RMq3aeErY5tujekBS32jfC/7AnH7I0v1v1TbbK3Gp XNeiN4QroO+5qaSr0ID2sz5jtBLRb15RMre27E1ImpaIv2Jw8NJgW0k/D1RyKCwaTsgRdwuK Kx/Y91XuSBdz0uOyU/S8kM1+ag0wvsGlpBVxRR/xw/E8M7TEwuCZQArqqTCmkG6HGcXFT0V9 PXFNNgV5jXMQRwU0O/ztJIQqsE5LsUomE//bLwzj9IVsaQpKDqW6TAPjcdBDPLHvriq7kGjt WhVhdl0qEYB8lkBEU7V2Yb+SYhmhpDrti9Fq1EsmhiHSkxJcGREoMK/63r9WLZYI3+4W2rAc UucZa4OT27U5ZISjNg3Ev0rxU5UH2/pT4wJCfxwocmqaRr6UYmrtZmND89X0KigoFD/XSeVv jwBRNjPAubK9/k5NoRrYqztM9W6sJqrH8+UWZ1Idd/DdmogJh0gNC0+N42Za9yBRURfIdKSb B3JfpUqcWwE7vUaYrHG1nw54pLUoPG6sAA7Mehl3nd4pZUALHwARAQABzSREYXZpZCBIaWxk ZW5icmFuZCA8ZGF2aWRAcmVkaGF0LmNvbT7CwZoEEwEIAEQCGwMCF4ACGQEFCwkIBwICIgIG FQoJCAsCBBYCAwECHgcWIQQb2cqtc1xMOkYN/MpN3hD3AP+DWgUCaJzangUJJlgIpAAKCRBN 3hD3AP+DWhAxD/9wcL0A+2rtaAmutaKTfxhTP0b4AAp1r/eLxjrbfbCCmh4pqzBhmSX/4z11 opn2KqcOsueRF1t2ENLOWzQu3Roiny2HOU7DajqB4dm1BVMaXQya5ae2ghzlJN9SIoopTWlR 0Af3hPj5E2PYvQhlcqeoehKlBo9rROJv/rjmr2x0yOM8qeTroH/ZzNlCtJ56AsE6Tvl+r7cW 3x7/Jq5WvWeudKrhFh7/yQ7eRvHCjd9bBrZTlgAfiHmX9AnCCPRPpNGNedV9Yty2Jnxhfmbv Pw37LA/jef8zlCDyUh2KCU1xVEOWqg15o1RtTyGV1nXV2O/mfuQJud5vIgzBvHhypc3p6VZJ lEf8YmT+Ol5P7SfCs5/uGdWUYQEMqOlg6w9R4Pe8d+mk8KGvfE9/zTwGg0nRgKqlQXrWRERv cuEwQbridlPAoQHrFWtwpgYMXx2TaZ3sihcIPo9uU5eBs0rf4mOERY75SK+Ekayv2ucTfjxr Kf014py2aoRJHuvy85ee/zIyLmve5hngZTTe3Wg3TInT9UTFzTPhItam6dZ1xqdTGHZYGU0O otRHcwLGt470grdiob6PfVTXoHlBvkWRadMhSuG4RORCDpq89vu5QralFNIf3EysNohoFy2A LYg2/D53xbU/aa4DDzBb5b1Rkg/udO1gZocVQWrDh6I2K3+cCs7BTQRVy5+RARAA59fefSDR 9nMGCb9LbMX+TFAoIQo/wgP5XPyzLYakO+94GrgfZjfhdaxPXMsl2+o8jhp/hlIzG56taNdt VZtPp3ih1AgbR8rHgXw1xwOpuAd5lE1qNd54ndHuADO9a9A0vPimIes78Hi1/yy+ZEEvRkHk /kDa6F3AtTc1m4rbbOk2fiKzzsE9YXweFjQvl9p+AMw6qd/iC4lUk9g0+FQXNdRs+o4o6Qvy iOQJfGQ4UcBuOy1IrkJrd8qq5jet1fcM2j4QvsW8CLDWZS1L7kZ5gT5EycMKxUWb8LuRjxzZ 3QY1aQH2kkzn6acigU3HLtgFyV1gBNV44ehjgvJpRY2cC8VhanTx0dZ9mj1YKIky5N+C0f21 zvntBqcxV0+3p8MrxRRcgEtDZNav+xAoT3G0W4SahAaUTWXpsZoOecwtxi74CyneQNPTDjNg azHmvpdBVEfj7k3p4dmJp5i0U66Onmf6mMFpArvBRSMOKU9DlAzMi4IvhiNWjKVaIE2Se9BY FdKVAJaZq85P2y20ZBd08ILnKcj7XKZkLU5FkoA0udEBvQ0f9QLNyyy3DZMCQWcwRuj1m73D sq8DEFBdZ5eEkj1dCyx+t/ga6x2rHyc8Sl86oK1tvAkwBNsfKou3v+jP/l14a7DGBvrmlYjO 59o3t6inu6H7pt7OL6u6BQj7DoMAEQEAAcLBfAQYAQgAJgIbDBYhBBvZyq1zXEw6Rg38yk3e EPcA/4NaBQJonNqrBQkmWAihAAoJEE3eEPcA/4NaKtMQALAJ8PzprBEXbXcEXwDKQu+P/vts IfUb1UNMfMV76BicGa5NCZnJNQASDP/+bFg6O3gx5NbhHHPeaWz/VxlOmYHokHodOvtL0WCC 8A5PEP8tOk6029Z+J+xUcMrJClNVFpzVvOpb1lCbhjwAV465Hy+NUSbbUiRxdzNQtLtgZzOV Zw7jxUCs4UUZLQTCuBpFgb15bBxYZ/BL9MbzxPxvfUQIPbnzQMcqtpUs21CMK2PdfCh5c4gS sDci6D5/ZIBw94UQWmGpM/O1ilGXde2ZzzGYl64glmccD8e87OnEgKnH3FbnJnT4iJchtSvx yJNi1+t0+qDti4m88+/9IuPqCKb6Stl+s2dnLtJNrjXBGJtsQG/sRpqsJz5x1/2nPJSRMsx9 5YfqbdrJSOFXDzZ8/r82HgQEtUvlSXNaXCa95ez0UkOG7+bDm2b3s0XahBQeLVCH0mw3RAQg r7xDAYKIrAwfHHmMTnBQDPJwVqxJjVNr7yBic4yfzVWGCGNE4DnOW0vcIeoyhy9vnIa3w1uZ 3iyY2Nsd7JxfKu1PRhCGwXzRw5TlfEsoRI7V9A8isUCoqE2Dzh3FvYHVeX4Us+bRL/oqareJ CIFqgYMyvHj7Q06kTKmauOe4Nf0l0qEkIuIzfoLJ3qr5UyXc2hLtWyT9Ir+lYlX9efqh7mOY qIws/H2t In-Reply-To: <20251029100909.3381140-3-kevin.brodsky@arm.com> X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: lXk9cNcVmVsZLsGpx42alHLe7IuJ3tk1FQB6GIi99EY_1761999265 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 29.10.25 11:08, Kevin Brodsky wrote: > arch_flush_lazy_mmu_mode() is called when outstanding batched > pgtable operations must be completed immediately. There should > however be no need to leave and re-enter lazy MMU completely. The > only part of that sequence that we really need is xen_mc_flush(); > call it directly. > > Signed-off-by: Kevin Brodsky > --- > arch/x86/xen/mmu_pv.c | 6 ++---- > 1 file changed, 2 insertions(+), 4 deletions(-) > > diff --git a/arch/x86/xen/mmu_pv.c b/arch/x86/xen/mmu_pv.c > index 2a4a8deaf612..7a35c3393df4 100644 > --- a/arch/x86/xen/mmu_pv.c > +++ b/arch/x86/xen/mmu_pv.c > @@ -2139,10 +2139,8 @@ static void xen_flush_lazy_mmu(void) > { > preempt_disable(); > > - if (xen_get_lazy_mode() == XEN_LAZY_MMU) { > - arch_leave_lazy_mmu_mode(); > - arch_enter_lazy_mmu_mode(); > - } > + if (xen_get_lazy_mode() == XEN_LAZY_MMU) > + xen_mc_flush(); > > preempt_enable(); > } Looks like that was moved to XEN code in commit a4a7644c15096f57f92252dd6e1046bf269c87d8 Author: Juergen Gross Date: Wed Sep 13 13:38:27 2023 +0200 x86/xen: move paravirt lazy code And essentially the previous implementation lived in arch/x86/kernel/paravirt.c:paravirt_flush_lazy_mmu(void) in an implementation-agnostic way: void paravirt_flush_lazy_mmu(void) { preempt_disable(); if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) { arch_leave_lazy_mmu_mode(); arch_enter_lazy_mmu_mode(); } preempt_enable(); } So indeed, I assume just doing the flush here is sufficient. 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Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-4-kevin.brodsky@arm.com> From: David Hildenbrand Autocrypt: addr=david@redhat.com; keydata= xsFNBFXLn5EBEAC+zYvAFJxCBY9Tr1xZgcESmxVNI/0ffzE/ZQOiHJl6mGkmA1R7/uUpiCjJ dBrn+lhhOYjjNefFQou6478faXE6o2AhmebqT4KiQoUQFV4R7y1KMEKoSyy8hQaK1umALTdL QZLQMzNE74ap+GDK0wnacPQFpcG1AE9RMq3aeErY5tujekBS32jfC/7AnH7I0v1v1TbbK3Gp XNeiN4QroO+5qaSr0ID2sz5jtBLRb15RMre27E1ImpaIv2Jw8NJgW0k/D1RyKCwaTsgRdwuK Kx/Y91XuSBdz0uOyU/S8kM1+ag0wvsGlpBVxRR/xw/E8M7TEwuCZQArqqTCmkG6HGcXFT0V9 PXFNNgV5jXMQRwU0O/ztJIQqsE5LsUomE//bLwzj9IVsaQpKDqW6TAPjcdBDPLHvriq7kGjt WhVhdl0qEYB8lkBEU7V2Yb+SYhmhpDrti9Fq1EsmhiHSkxJcGREoMK/63r9WLZYI3+4W2rAc UucZa4OT27U5ZISjNg3Ev0rxU5UH2/pT4wJCfxwocmqaRr6UYmrtZmND89X0KigoFD/XSeVv jwBRNjPAubK9/k5NoRrYqztM9W6sJqrH8+UWZ1Idd/DdmogJh0gNC0+N42Za9yBRURfIdKSb B3JfpUqcWwE7vUaYrHG1nw54pLUoPG6sAA7Mehl3nd4pZUALHwARAQABzSREYXZpZCBIaWxk ZW5icmFuZCA8ZGF2aWRAcmVkaGF0LmNvbT7CwZoEEwEIAEQCGwMCF4ACGQEFCwkIBwICIgIG FQoJCAsCBBYCAwECHgcWIQQb2cqtc1xMOkYN/MpN3hD3AP+DWgUCaJzangUJJlgIpAAKCRBN 3hD3AP+DWhAxD/9wcL0A+2rtaAmutaKTfxhTP0b4AAp1r/eLxjrbfbCCmh4pqzBhmSX/4z11 opn2KqcOsueRF1t2ENLOWzQu3Roiny2HOU7DajqB4dm1BVMaXQya5ae2ghzlJN9SIoopTWlR 0Af3hPj5E2PYvQhlcqeoehKlBo9rROJv/rjmr2x0yOM8qeTroH/ZzNlCtJ56AsE6Tvl+r7cW 3x7/Jq5WvWeudKrhFh7/yQ7eRvHCjd9bBrZTlgAfiHmX9AnCCPRPpNGNedV9Yty2Jnxhfmbv Pw37LA/jef8zlCDyUh2KCU1xVEOWqg15o1RtTyGV1nXV2O/mfuQJud5vIgzBvHhypc3p6VZJ lEf8YmT+Ol5P7SfCs5/uGdWUYQEMqOlg6w9R4Pe8d+mk8KGvfE9/zTwGg0nRgKqlQXrWRERv cuEwQbridlPAoQHrFWtwpgYMXx2TaZ3sihcIPo9uU5eBs0rf4mOERY75SK+Ekayv2ucTfjxr Kf014py2aoRJHuvy85ee/zIyLmve5hngZTTe3Wg3TInT9UTFzTPhItam6dZ1xqdTGHZYGU0O otRHcwLGt470grdiob6PfVTXoHlBvkWRadMhSuG4RORCDpq89vu5QralFNIf3EysNohoFy2A LYg2/D53xbU/aa4DDzBb5b1Rkg/udO1gZocVQWrDh6I2K3+cCs7BTQRVy5+RARAA59fefSDR 9nMGCb9LbMX+TFAoIQo/wgP5XPyzLYakO+94GrgfZjfhdaxPXMsl2+o8jhp/hlIzG56taNdt VZtPp3ih1AgbR8rHgXw1xwOpuAd5lE1qNd54ndHuADO9a9A0vPimIes78Hi1/yy+ZEEvRkHk /kDa6F3AtTc1m4rbbOk2fiKzzsE9YXweFjQvl9p+AMw6qd/iC4lUk9g0+FQXNdRs+o4o6Qvy iOQJfGQ4UcBuOy1IrkJrd8qq5jet1fcM2j4QvsW8CLDWZS1L7kZ5gT5EycMKxUWb8LuRjxzZ 3QY1aQH2kkzn6acigU3HLtgFyV1gBNV44ehjgvJpRY2cC8VhanTx0dZ9mj1YKIky5N+C0f21 zvntBqcxV0+3p8MrxRRcgEtDZNav+xAoT3G0W4SahAaUTWXpsZoOecwtxi74CyneQNPTDjNg azHmvpdBVEfj7k3p4dmJp5i0U66Onmf6mMFpArvBRSMOKU9DlAzMi4IvhiNWjKVaIE2Se9BY FdKVAJaZq85P2y20ZBd08ILnKcj7XKZkLU5FkoA0udEBvQ0f9QLNyyy3DZMCQWcwRuj1m73D sq8DEFBdZ5eEkj1dCyx+t/ga6x2rHyc8Sl86oK1tvAkwBNsfKou3v+jP/l14a7DGBvrmlYjO 59o3t6inu6H7pt7OL6u6BQj7DoMAEQEAAcLBfAQYAQgAJgIbDBYhBBvZyq1zXEw6Rg38yk3e EPcA/4NaBQJonNqrBQkmWAihAAoJEE3eEPcA/4NaKtMQALAJ8PzprBEXbXcEXwDKQu+P/vts IfUb1UNMfMV76BicGa5NCZnJNQASDP/+bFg6O3gx5NbhHHPeaWz/VxlOmYHokHodOvtL0WCC 8A5PEP8tOk6029Z+J+xUcMrJClNVFpzVvOpb1lCbhjwAV465Hy+NUSbbUiRxdzNQtLtgZzOV Zw7jxUCs4UUZLQTCuBpFgb15bBxYZ/BL9MbzxPxvfUQIPbnzQMcqtpUs21CMK2PdfCh5c4gS sDci6D5/ZIBw94UQWmGpM/O1ilGXde2ZzzGYl64glmccD8e87OnEgKnH3FbnJnT4iJchtSvx yJNi1+t0+qDti4m88+/9IuPqCKb6Stl+s2dnLtJNrjXBGJtsQG/sRpqsJz5x1/2nPJSRMsx9 5YfqbdrJSOFXDzZ8/r82HgQEtUvlSXNaXCa95ez0UkOG7+bDm2b3s0XahBQeLVCH0mw3RAQg r7xDAYKIrAwfHHmMTnBQDPJwVqxJjVNr7yBic4yfzVWGCGNE4DnOW0vcIeoyhy9vnIa3w1uZ 3iyY2Nsd7JxfKu1PRhCGwXzRw5TlfEsoRI7V9A8isUCoqE2Dzh3FvYHVeX4Us+bRL/oqareJ CIFqgYMyvHj7Q06kTKmauOe4Nf0l0qEkIuIzfoLJ3qr5UyXc2hLtWyT9Ir+lYlX9efqh7mOY qIws/H2t In-Reply-To: <20251029100909.3381140-4-kevin.brodsky@arm.com> X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: KWjH0owXk_nhOMkd5XWl6T-R4iBKdhTWtUm6k_DFpE4_1761999284 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 29.10.25 11:09, Kevin Brodsky wrote: > Upcoming changes to the lazy_mmu API will cause > arch_flush_lazy_mmu_mode() to be called when leaving a nested > lazy_mmu section. > > Move the relevant logic from arch_leave_lazy_mmu_mode() to > arch_flush_lazy_mmu_mode() and have the former call the latter. > > Note: the additional this_cpu_ptr() on the > arch_leave_lazy_mmu_mode() path will be removed in a subsequent > patch. > > Signed-off-by: Kevin Brodsky > --- Acked-by: David Hildenbrand -- Cheers David / dhildenb From xen-devel-bounces@lists.xenproject.org Sat Nov 01 12:15:05 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 01 Nov 2025 12:15:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155007.1484629 (Exim 4.92) (envelope-from ) id 1vFAVd-0001wT-AP; Sat, 01 Nov 2025 12:15:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155007.1484629; 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Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-5-kevin.brodsky@arm.com> From: David Hildenbrand Autocrypt: addr=david@redhat.com; keydata= xsFNBFXLn5EBEAC+zYvAFJxCBY9Tr1xZgcESmxVNI/0ffzE/ZQOiHJl6mGkmA1R7/uUpiCjJ dBrn+lhhOYjjNefFQou6478faXE6o2AhmebqT4KiQoUQFV4R7y1KMEKoSyy8hQaK1umALTdL QZLQMzNE74ap+GDK0wnacPQFpcG1AE9RMq3aeErY5tujekBS32jfC/7AnH7I0v1v1TbbK3Gp XNeiN4QroO+5qaSr0ID2sz5jtBLRb15RMre27E1ImpaIv2Jw8NJgW0k/D1RyKCwaTsgRdwuK Kx/Y91XuSBdz0uOyU/S8kM1+ag0wvsGlpBVxRR/xw/E8M7TEwuCZQArqqTCmkG6HGcXFT0V9 PXFNNgV5jXMQRwU0O/ztJIQqsE5LsUomE//bLwzj9IVsaQpKDqW6TAPjcdBDPLHvriq7kGjt WhVhdl0qEYB8lkBEU7V2Yb+SYhmhpDrti9Fq1EsmhiHSkxJcGREoMK/63r9WLZYI3+4W2rAc UucZa4OT27U5ZISjNg3Ev0rxU5UH2/pT4wJCfxwocmqaRr6UYmrtZmND89X0KigoFD/XSeVv jwBRNjPAubK9/k5NoRrYqztM9W6sJqrH8+UWZ1Idd/DdmogJh0gNC0+N42Za9yBRURfIdKSb B3JfpUqcWwE7vUaYrHG1nw54pLUoPG6sAA7Mehl3nd4pZUALHwARAQABzSREYXZpZCBIaWxk ZW5icmFuZCA8ZGF2aWRAcmVkaGF0LmNvbT7CwZoEEwEIAEQCGwMCF4ACGQEFCwkIBwICIgIG FQoJCAsCBBYCAwECHgcWIQQb2cqtc1xMOkYN/MpN3hD3AP+DWgUCaJzangUJJlgIpAAKCRBN 3hD3AP+DWhAxD/9wcL0A+2rtaAmutaKTfxhTP0b4AAp1r/eLxjrbfbCCmh4pqzBhmSX/4z11 opn2KqcOsueRF1t2ENLOWzQu3Roiny2HOU7DajqB4dm1BVMaXQya5ae2ghzlJN9SIoopTWlR 0Af3hPj5E2PYvQhlcqeoehKlBo9rROJv/rjmr2x0yOM8qeTroH/ZzNlCtJ56AsE6Tvl+r7cW 3x7/Jq5WvWeudKrhFh7/yQ7eRvHCjd9bBrZTlgAfiHmX9AnCCPRPpNGNedV9Yty2Jnxhfmbv Pw37LA/jef8zlCDyUh2KCU1xVEOWqg15o1RtTyGV1nXV2O/mfuQJud5vIgzBvHhypc3p6VZJ lEf8YmT+Ol5P7SfCs5/uGdWUYQEMqOlg6w9R4Pe8d+mk8KGvfE9/zTwGg0nRgKqlQXrWRERv cuEwQbridlPAoQHrFWtwpgYMXx2TaZ3sihcIPo9uU5eBs0rf4mOERY75SK+Ekayv2ucTfjxr Kf014py2aoRJHuvy85ee/zIyLmve5hngZTTe3Wg3TInT9UTFzTPhItam6dZ1xqdTGHZYGU0O otRHcwLGt470grdiob6PfVTXoHlBvkWRadMhSuG4RORCDpq89vu5QralFNIf3EysNohoFy2A LYg2/D53xbU/aa4DDzBb5b1Rkg/udO1gZocVQWrDh6I2K3+cCs7BTQRVy5+RARAA59fefSDR 9nMGCb9LbMX+TFAoIQo/wgP5XPyzLYakO+94GrgfZjfhdaxPXMsl2+o8jhp/hlIzG56taNdt VZtPp3ih1AgbR8rHgXw1xwOpuAd5lE1qNd54ndHuADO9a9A0vPimIes78Hi1/yy+ZEEvRkHk /kDa6F3AtTc1m4rbbOk2fiKzzsE9YXweFjQvl9p+AMw6qd/iC4lUk9g0+FQXNdRs+o4o6Qvy iOQJfGQ4UcBuOy1IrkJrd8qq5jet1fcM2j4QvsW8CLDWZS1L7kZ5gT5EycMKxUWb8LuRjxzZ 3QY1aQH2kkzn6acigU3HLtgFyV1gBNV44ehjgvJpRY2cC8VhanTx0dZ9mj1YKIky5N+C0f21 zvntBqcxV0+3p8MrxRRcgEtDZNav+xAoT3G0W4SahAaUTWXpsZoOecwtxi74CyneQNPTDjNg azHmvpdBVEfj7k3p4dmJp5i0U66Onmf6mMFpArvBRSMOKU9DlAzMi4IvhiNWjKVaIE2Se9BY FdKVAJaZq85P2y20ZBd08ILnKcj7XKZkLU5FkoA0udEBvQ0f9QLNyyy3DZMCQWcwRuj1m73D sq8DEFBdZ5eEkj1dCyx+t/ga6x2rHyc8Sl86oK1tvAkwBNsfKou3v+jP/l14a7DGBvrmlYjO 59o3t6inu6H7pt7OL6u6BQj7DoMAEQEAAcLBfAQYAQgAJgIbDBYhBBvZyq1zXEw6Rg38yk3e EPcA/4NaBQJonNqrBQkmWAihAAoJEE3eEPcA/4NaKtMQALAJ8PzprBEXbXcEXwDKQu+P/vts IfUb1UNMfMV76BicGa5NCZnJNQASDP/+bFg6O3gx5NbhHHPeaWz/VxlOmYHokHodOvtL0WCC 8A5PEP8tOk6029Z+J+xUcMrJClNVFpzVvOpb1lCbhjwAV465Hy+NUSbbUiRxdzNQtLtgZzOV Zw7jxUCs4UUZLQTCuBpFgb15bBxYZ/BL9MbzxPxvfUQIPbnzQMcqtpUs21CMK2PdfCh5c4gS sDci6D5/ZIBw94UQWmGpM/O1ilGXde2ZzzGYl64glmccD8e87OnEgKnH3FbnJnT4iJchtSvx yJNi1+t0+qDti4m88+/9IuPqCKb6Stl+s2dnLtJNrjXBGJtsQG/sRpqsJz5x1/2nPJSRMsx9 5YfqbdrJSOFXDzZ8/r82HgQEtUvlSXNaXCa95ez0UkOG7+bDm2b3s0XahBQeLVCH0mw3RAQg r7xDAYKIrAwfHHmMTnBQDPJwVqxJjVNr7yBic4yfzVWGCGNE4DnOW0vcIeoyhy9vnIa3w1uZ 3iyY2Nsd7JxfKu1PRhCGwXzRw5TlfEsoRI7V9A8isUCoqE2Dzh3FvYHVeX4Us+bRL/oqareJ CIFqgYMyvHj7Q06kTKmauOe4Nf0l0qEkIuIzfoLJ3qr5UyXc2hLtWyT9Ir+lYlX9efqh7mOY qIws/H2t In-Reply-To: <20251029100909.3381140-5-kevin.brodsky@arm.com> X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: ZCKOZI_z00QHvHRwfRyfDYrkQzsDvSFJ9UALHUKYcqI_1761999299 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 29.10.25 11:09, Kevin Brodsky wrote: > Upcoming changes to the lazy_mmu API will cause > arch_flush_lazy_mmu_mode() to be called when leaving a nested > lazy_mmu section. > > Move the relevant logic from arch_leave_lazy_mmu_mode() to > arch_flush_lazy_mmu_mode() and have the former call the latter. > > Note: the additional this_cpu_ptr() on the > arch_leave_lazy_mmu_mode() path will be removed in a subsequent > patch. > > Signed-off-by: Kevin Brodsky > --- Acked-by: David Hildenbrand -- Cheers David / dhildenb From xen-devel-bounces@lists.xenproject.org Sat Nov 01 12:16:59 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 01 Nov 2025 12:16:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155029.1484639 (Exim 4.92) (envelope-from ) id 1vFAXS-00037D-MQ; Sat, 01 Nov 2025 12:16:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155029.1484639; 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Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-6-kevin.brodsky@arm.com> From: David Hildenbrand Autocrypt: addr=david@redhat.com; keydata= xsFNBFXLn5EBEAC+zYvAFJxCBY9Tr1xZgcESmxVNI/0ffzE/ZQOiHJl6mGkmA1R7/uUpiCjJ dBrn+lhhOYjjNefFQou6478faXE6o2AhmebqT4KiQoUQFV4R7y1KMEKoSyy8hQaK1umALTdL QZLQMzNE74ap+GDK0wnacPQFpcG1AE9RMq3aeErY5tujekBS32jfC/7AnH7I0v1v1TbbK3Gp XNeiN4QroO+5qaSr0ID2sz5jtBLRb15RMre27E1ImpaIv2Jw8NJgW0k/D1RyKCwaTsgRdwuK Kx/Y91XuSBdz0uOyU/S8kM1+ag0wvsGlpBVxRR/xw/E8M7TEwuCZQArqqTCmkG6HGcXFT0V9 PXFNNgV5jXMQRwU0O/ztJIQqsE5LsUomE//bLwzj9IVsaQpKDqW6TAPjcdBDPLHvriq7kGjt WhVhdl0qEYB8lkBEU7V2Yb+SYhmhpDrti9Fq1EsmhiHSkxJcGREoMK/63r9WLZYI3+4W2rAc UucZa4OT27U5ZISjNg3Ev0rxU5UH2/pT4wJCfxwocmqaRr6UYmrtZmND89X0KigoFD/XSeVv jwBRNjPAubK9/k5NoRrYqztM9W6sJqrH8+UWZ1Idd/DdmogJh0gNC0+N42Za9yBRURfIdKSb B3JfpUqcWwE7vUaYrHG1nw54pLUoPG6sAA7Mehl3nd4pZUALHwARAQABzSREYXZpZCBIaWxk ZW5icmFuZCA8ZGF2aWRAcmVkaGF0LmNvbT7CwZoEEwEIAEQCGwMCF4ACGQEFCwkIBwICIgIG FQoJCAsCBBYCAwECHgcWIQQb2cqtc1xMOkYN/MpN3hD3AP+DWgUCaJzangUJJlgIpAAKCRBN 3hD3AP+DWhAxD/9wcL0A+2rtaAmutaKTfxhTP0b4AAp1r/eLxjrbfbCCmh4pqzBhmSX/4z11 opn2KqcOsueRF1t2ENLOWzQu3Roiny2HOU7DajqB4dm1BVMaXQya5ae2ghzlJN9SIoopTWlR 0Af3hPj5E2PYvQhlcqeoehKlBo9rROJv/rjmr2x0yOM8qeTroH/ZzNlCtJ56AsE6Tvl+r7cW 3x7/Jq5WvWeudKrhFh7/yQ7eRvHCjd9bBrZTlgAfiHmX9AnCCPRPpNGNedV9Yty2Jnxhfmbv Pw37LA/jef8zlCDyUh2KCU1xVEOWqg15o1RtTyGV1nXV2O/mfuQJud5vIgzBvHhypc3p6VZJ lEf8YmT+Ol5P7SfCs5/uGdWUYQEMqOlg6w9R4Pe8d+mk8KGvfE9/zTwGg0nRgKqlQXrWRERv cuEwQbridlPAoQHrFWtwpgYMXx2TaZ3sihcIPo9uU5eBs0rf4mOERY75SK+Ekayv2ucTfjxr Kf014py2aoRJHuvy85ee/zIyLmve5hngZTTe3Wg3TInT9UTFzTPhItam6dZ1xqdTGHZYGU0O otRHcwLGt470grdiob6PfVTXoHlBvkWRadMhSuG4RORCDpq89vu5QralFNIf3EysNohoFy2A LYg2/D53xbU/aa4DDzBb5b1Rkg/udO1gZocVQWrDh6I2K3+cCs7BTQRVy5+RARAA59fefSDR 9nMGCb9LbMX+TFAoIQo/wgP5XPyzLYakO+94GrgfZjfhdaxPXMsl2+o8jhp/hlIzG56taNdt VZtPp3ih1AgbR8rHgXw1xwOpuAd5lE1qNd54ndHuADO9a9A0vPimIes78Hi1/yy+ZEEvRkHk /kDa6F3AtTc1m4rbbOk2fiKzzsE9YXweFjQvl9p+AMw6qd/iC4lUk9g0+FQXNdRs+o4o6Qvy iOQJfGQ4UcBuOy1IrkJrd8qq5jet1fcM2j4QvsW8CLDWZS1L7kZ5gT5EycMKxUWb8LuRjxzZ 3QY1aQH2kkzn6acigU3HLtgFyV1gBNV44ehjgvJpRY2cC8VhanTx0dZ9mj1YKIky5N+C0f21 zvntBqcxV0+3p8MrxRRcgEtDZNav+xAoT3G0W4SahAaUTWXpsZoOecwtxi74CyneQNPTDjNg azHmvpdBVEfj7k3p4dmJp5i0U66Onmf6mMFpArvBRSMOKU9DlAzMi4IvhiNWjKVaIE2Se9BY FdKVAJaZq85P2y20ZBd08ILnKcj7XKZkLU5FkoA0udEBvQ0f9QLNyyy3DZMCQWcwRuj1m73D sq8DEFBdZ5eEkj1dCyx+t/ga6x2rHyc8Sl86oK1tvAkwBNsfKou3v+jP/l14a7DGBvrmlYjO 59o3t6inu6H7pt7OL6u6BQj7DoMAEQEAAcLBfAQYAQgAJgIbDBYhBBvZyq1zXEw6Rg38yk3e EPcA/4NaBQJonNqrBQkmWAihAAoJEE3eEPcA/4NaKtMQALAJ8PzprBEXbXcEXwDKQu+P/vts IfUb1UNMfMV76BicGa5NCZnJNQASDP/+bFg6O3gx5NbhHHPeaWz/VxlOmYHokHodOvtL0WCC 8A5PEP8tOk6029Z+J+xUcMrJClNVFpzVvOpb1lCbhjwAV465Hy+NUSbbUiRxdzNQtLtgZzOV Zw7jxUCs4UUZLQTCuBpFgb15bBxYZ/BL9MbzxPxvfUQIPbnzQMcqtpUs21CMK2PdfCh5c4gS sDci6D5/ZIBw94UQWmGpM/O1ilGXde2ZzzGYl64glmccD8e87OnEgKnH3FbnJnT4iJchtSvx yJNi1+t0+qDti4m88+/9IuPqCKb6Stl+s2dnLtJNrjXBGJtsQG/sRpqsJz5x1/2nPJSRMsx9 5YfqbdrJSOFXDzZ8/r82HgQEtUvlSXNaXCa95ez0UkOG7+bDm2b3s0XahBQeLVCH0mw3RAQg r7xDAYKIrAwfHHmMTnBQDPJwVqxJjVNr7yBic4yfzVWGCGNE4DnOW0vcIeoyhy9vnIa3w1uZ 3iyY2Nsd7JxfKu1PRhCGwXzRw5TlfEsoRI7V9A8isUCoqE2Dzh3FvYHVeX4Us+bRL/oqareJ CIFqgYMyvHj7Q06kTKmauOe4Nf0l0qEkIuIzfoLJ3qr5UyXc2hLtWyT9Ir+lYlX9efqh7mOY qIws/H2t In-Reply-To: <20251029100909.3381140-6-kevin.brodsky@arm.com> X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: gigZsxy4vqhhYij82xXTXKrA4wnq-XypUlLSDAgHSrA_1761999413 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 29.10.25 11:09, Kevin Brodsky wrote: > Architectures currently opt in for implementing lazy_mmu helpers by > defining __HAVE_ARCH_ENTER_LAZY_MMU_MODE. > > In preparation for introducing a generic lazy_mmu layer that will > require storage in task_struct, let's switch to a cleaner approach: > instead of defining a macro, select a CONFIG option. > > This patch introduces CONFIG_ARCH_HAS_LAZY_MMU_MODE and has each > arch select it when it implements lazy_mmu helpers. > __HAVE_ARCH_ENTER_LAZY_MMU_MODE is removed and > relies on the new CONFIG instead. > > On x86, lazy_mmu helpers are only implemented if PARAVIRT_XXL is > selected. This creates some complications in arch/x86/boot/, because > a few files manually undefine PARAVIRT* options. As a result > does not define the lazy_mmu helpers, but this > breaks the build as only defines them if > !CONFIG_ARCH_HAS_LAZY_MMU_MODE. There does not seem to be a clean > way out of this - let's just undefine that new CONFIG too. > > Signed-off-by: Kevin Brodsky > --- Acked-by: David Hildenbrand -- Cheers David / dhildenb From xen-devel-bounces@lists.xenproject.org Sat Nov 01 12:18:15 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 01 Nov 2025 12:18:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155040.1484649 (Exim 4.92) (envelope-from ) id 1vFAYg-0003uS-Vd; Sat, 01 Nov 2025 12:18:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155040.1484649; Sat, 01 Nov 2025 12:18:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFAYg-0003uL-SY; Sat, 01 Nov 2025 12:18:14 +0000 Received: by outflank-mailman (input) for mailman id 1155040; Sat, 01 Nov 2025 12:18:13 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFAYf-0003uE-4u for xen-devel@lists.xenproject.org; Sat, 01 Nov 2025 12:18:13 +0000 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id d52f2c27-b71c-11f0-9d16-b5c5bf9af7f9; Sat, 01 Nov 2025 13:18:12 +0100 (CET) Received: from mail-wm1-f71.google.com (mail-wm1-f71.google.com [209.85.128.71]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-147-M0jswWLOPqqYYD8AL3JWuQ-1; Sat, 01 Nov 2025 08:18:09 -0400 Received: by mail-wm1-f71.google.com with SMTP id 5b1f17b1804b1-477124f7c00so16378365e9.1 for ; Sat, 01 Nov 2025 05:18:09 -0700 (PDT) Received: from ?IPV6:2003:d8:2f3f:4b00:ee13:8c22:5cc5:d169? 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Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-7-kevin.brodsky@arm.com> From: David Hildenbrand Autocrypt: addr=david@redhat.com; keydata= xsFNBFXLn5EBEAC+zYvAFJxCBY9Tr1xZgcESmxVNI/0ffzE/ZQOiHJl6mGkmA1R7/uUpiCjJ dBrn+lhhOYjjNefFQou6478faXE6o2AhmebqT4KiQoUQFV4R7y1KMEKoSyy8hQaK1umALTdL QZLQMzNE74ap+GDK0wnacPQFpcG1AE9RMq3aeErY5tujekBS32jfC/7AnH7I0v1v1TbbK3Gp XNeiN4QroO+5qaSr0ID2sz5jtBLRb15RMre27E1ImpaIv2Jw8NJgW0k/D1RyKCwaTsgRdwuK Kx/Y91XuSBdz0uOyU/S8kM1+ag0wvsGlpBVxRR/xw/E8M7TEwuCZQArqqTCmkG6HGcXFT0V9 PXFNNgV5jXMQRwU0O/ztJIQqsE5LsUomE//bLwzj9IVsaQpKDqW6TAPjcdBDPLHvriq7kGjt WhVhdl0qEYB8lkBEU7V2Yb+SYhmhpDrti9Fq1EsmhiHSkxJcGREoMK/63r9WLZYI3+4W2rAc UucZa4OT27U5ZISjNg3Ev0rxU5UH2/pT4wJCfxwocmqaRr6UYmrtZmND89X0KigoFD/XSeVv jwBRNjPAubK9/k5NoRrYqztM9W6sJqrH8+UWZ1Idd/DdmogJh0gNC0+N42Za9yBRURfIdKSb B3JfpUqcWwE7vUaYrHG1nw54pLUoPG6sAA7Mehl3nd4pZUALHwARAQABzSREYXZpZCBIaWxk ZW5icmFuZCA8ZGF2aWRAcmVkaGF0LmNvbT7CwZoEEwEIAEQCGwMCF4ACGQEFCwkIBwICIgIG FQoJCAsCBBYCAwECHgcWIQQb2cqtc1xMOkYN/MpN3hD3AP+DWgUCaJzangUJJlgIpAAKCRBN 3hD3AP+DWhAxD/9wcL0A+2rtaAmutaKTfxhTP0b4AAp1r/eLxjrbfbCCmh4pqzBhmSX/4z11 opn2KqcOsueRF1t2ENLOWzQu3Roiny2HOU7DajqB4dm1BVMaXQya5ae2ghzlJN9SIoopTWlR 0Af3hPj5E2PYvQhlcqeoehKlBo9rROJv/rjmr2x0yOM8qeTroH/ZzNlCtJ56AsE6Tvl+r7cW 3x7/Jq5WvWeudKrhFh7/yQ7eRvHCjd9bBrZTlgAfiHmX9AnCCPRPpNGNedV9Yty2Jnxhfmbv Pw37LA/jef8zlCDyUh2KCU1xVEOWqg15o1RtTyGV1nXV2O/mfuQJud5vIgzBvHhypc3p6VZJ lEf8YmT+Ol5P7SfCs5/uGdWUYQEMqOlg6w9R4Pe8d+mk8KGvfE9/zTwGg0nRgKqlQXrWRERv cuEwQbridlPAoQHrFWtwpgYMXx2TaZ3sihcIPo9uU5eBs0rf4mOERY75SK+Ekayv2ucTfjxr Kf014py2aoRJHuvy85ee/zIyLmve5hngZTTe3Wg3TInT9UTFzTPhItam6dZ1xqdTGHZYGU0O otRHcwLGt470grdiob6PfVTXoHlBvkWRadMhSuG4RORCDpq89vu5QralFNIf3EysNohoFy2A LYg2/D53xbU/aa4DDzBb5b1Rkg/udO1gZocVQWrDh6I2K3+cCs7BTQRVy5+RARAA59fefSDR 9nMGCb9LbMX+TFAoIQo/wgP5XPyzLYakO+94GrgfZjfhdaxPXMsl2+o8jhp/hlIzG56taNdt VZtPp3ih1AgbR8rHgXw1xwOpuAd5lE1qNd54ndHuADO9a9A0vPimIes78Hi1/yy+ZEEvRkHk /kDa6F3AtTc1m4rbbOk2fiKzzsE9YXweFjQvl9p+AMw6qd/iC4lUk9g0+FQXNdRs+o4o6Qvy iOQJfGQ4UcBuOy1IrkJrd8qq5jet1fcM2j4QvsW8CLDWZS1L7kZ5gT5EycMKxUWb8LuRjxzZ 3QY1aQH2kkzn6acigU3HLtgFyV1gBNV44ehjgvJpRY2cC8VhanTx0dZ9mj1YKIky5N+C0f21 zvntBqcxV0+3p8MrxRRcgEtDZNav+xAoT3G0W4SahAaUTWXpsZoOecwtxi74CyneQNPTDjNg azHmvpdBVEfj7k3p4dmJp5i0U66Onmf6mMFpArvBRSMOKU9DlAzMi4IvhiNWjKVaIE2Se9BY FdKVAJaZq85P2y20ZBd08ILnKcj7XKZkLU5FkoA0udEBvQ0f9QLNyyy3DZMCQWcwRuj1m73D sq8DEFBdZ5eEkj1dCyx+t/ga6x2rHyc8Sl86oK1tvAkwBNsfKou3v+jP/l14a7DGBvrmlYjO 59o3t6inu6H7pt7OL6u6BQj7DoMAEQEAAcLBfAQYAQgAJgIbDBYhBBvZyq1zXEw6Rg38yk3e EPcA/4NaBQJonNqrBQkmWAihAAoJEE3eEPcA/4NaKtMQALAJ8PzprBEXbXcEXwDKQu+P/vts IfUb1UNMfMV76BicGa5NCZnJNQASDP/+bFg6O3gx5NbhHHPeaWz/VxlOmYHokHodOvtL0WCC 8A5PEP8tOk6029Z+J+xUcMrJClNVFpzVvOpb1lCbhjwAV465Hy+NUSbbUiRxdzNQtLtgZzOV Zw7jxUCs4UUZLQTCuBpFgb15bBxYZ/BL9MbzxPxvfUQIPbnzQMcqtpUs21CMK2PdfCh5c4gS sDci6D5/ZIBw94UQWmGpM/O1ilGXde2ZzzGYl64glmccD8e87OnEgKnH3FbnJnT4iJchtSvx yJNi1+t0+qDti4m88+/9IuPqCKb6Stl+s2dnLtJNrjXBGJtsQG/sRpqsJz5x1/2nPJSRMsx9 5YfqbdrJSOFXDzZ8/r82HgQEtUvlSXNaXCa95ez0UkOG7+bDm2b3s0XahBQeLVCH0mw3RAQg r7xDAYKIrAwfHHmMTnBQDPJwVqxJjVNr7yBic4yfzVWGCGNE4DnOW0vcIeoyhy9vnIa3w1uZ 3iyY2Nsd7JxfKu1PRhCGwXzRw5TlfEsoRI7V9A8isUCoqE2Dzh3FvYHVeX4Us+bRL/oqareJ CIFqgYMyvHj7Q06kTKmauOe4Nf0l0qEkIuIzfoLJ3qr5UyXc2hLtWyT9Ir+lYlX9efqh7mOY qIws/H2t In-Reply-To: <20251029100909.3381140-7-kevin.brodsky@arm.com> X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: ItQVQHam5npRIdfPddxaQRhEJr2AeqWL8HzQgW9JrJI_1761999488 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 29.10.25 11:09, Kevin Brodsky wrote: > The implementation of the lazy MMU mode is currently entirely > arch-specific; core code directly calls arch helpers: > arch_{enter,leave}_lazy_mmu_mode(). > > We are about to introduce support for nested lazy MMU sections. > As things stand we'd have to duplicate that logic in every arch > implementing lazy_mmu - adding to a fair amount of logic > already duplicated across lazy_mmu implementations. > > This patch therefore introduces a new generic layer that calls the > existing arch_* helpers. Two pair of calls are introduced: > > * lazy_mmu_mode_enable() ... lazy_mmu_mode_disable() > This is the standard case where the mode is enabled for a given > block of code by surrounding it with enable() and disable() > calls. > > * lazy_mmu_mode_pause() ... lazy_mmu_mode_resume() > This is for situations where the mode is temporarily disabled > by first calling pause() and then resume() (e.g. to prevent any > batching from occurring in a critical section). > > The documentation in will be updated in a > subsequent patch. > > No functional change should be introduced at this stage. > The implementation of enable()/resume() and disable()/pause() is > currently identical, but nesting support will change that. > > Most of the call sites have been updated using the following > Coccinelle script: > > @@ > @@ > { > ... > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_enable(); > ... > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_disable(); > ... > } > > @@ > @@ > { > ... > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_pause(); > ... > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_resume(); > ... > } > > A couple of notes regarding x86: > > * Xen is currently the only case where explicit handling is required > for lazy MMU when context-switching. This is purely an > implementation detail and using the generic lazy_mmu_mode_* > functions would cause trouble when nesting support is introduced, > because the generic functions must be called from the current task. > For that reason we still use arch_leave() and arch_enter() there. > > * x86 calls arch_flush_lazy_mmu_mode() unconditionally in a few > places, but only defines it if PARAVIRT_XXL is selected, and we > are removing the fallback in . Add a new fallback > definition to to keep things building. > > Signed-off-by: Kevin Brodsky > --- Acked-by: David Hildenbrand -- Cheers David / dhildenb From xen-devel-bounces@lists.xenproject.org Sat Nov 01 12:23:00 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 01 Nov 2025 12:23:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155053.1484658 (Exim 4.92) (envelope-from ) id 1vFAdD-0005Wr-KI; Sat, 01 Nov 2025 12:22:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155053.1484658; Sat, 01 Nov 2025 12:22:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFAdD-0005Wk-He; Sat, 01 Nov 2025 12:22:55 +0000 Received: by outflank-mailman (input) for mailman id 1155053; Sat, 01 Nov 2025 12:22:54 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFAdC-0005We-6U for xen-devel@lists.xenproject.org; Sat, 01 Nov 2025 12:22:54 +0000 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 7bc11e98-b71d-11f0-980a-7dc792cee155; Sat, 01 Nov 2025 13:22:51 +0100 (CET) Received: from mail-wr1-f71.google.com (mail-wr1-f71.google.com [209.85.221.71]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-370-VZV7Cif1P6-RNVG7fyOP5A-1; Sat, 01 Nov 2025 08:22:47 -0400 Received: by mail-wr1-f71.google.com with SMTP id ffacd0b85a97d-42855d6875fso2317768f8f.3 for ; Sat, 01 Nov 2025 05:22:47 -0700 (PDT) Received: from ?IPV6:2003:d8:2f3f:4b00:ee13:8c22:5cc5:d169? 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Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-8-kevin.brodsky@arm.com> From: David Hildenbrand Autocrypt: addr=david@redhat.com; keydata= xsFNBFXLn5EBEAC+zYvAFJxCBY9Tr1xZgcESmxVNI/0ffzE/ZQOiHJl6mGkmA1R7/uUpiCjJ dBrn+lhhOYjjNefFQou6478faXE6o2AhmebqT4KiQoUQFV4R7y1KMEKoSyy8hQaK1umALTdL QZLQMzNE74ap+GDK0wnacPQFpcG1AE9RMq3aeErY5tujekBS32jfC/7AnH7I0v1v1TbbK3Gp XNeiN4QroO+5qaSr0ID2sz5jtBLRb15RMre27E1ImpaIv2Jw8NJgW0k/D1RyKCwaTsgRdwuK Kx/Y91XuSBdz0uOyU/S8kM1+ag0wvsGlpBVxRR/xw/E8M7TEwuCZQArqqTCmkG6HGcXFT0V9 PXFNNgV5jXMQRwU0O/ztJIQqsE5LsUomE//bLwzj9IVsaQpKDqW6TAPjcdBDPLHvriq7kGjt WhVhdl0qEYB8lkBEU7V2Yb+SYhmhpDrti9Fq1EsmhiHSkxJcGREoMK/63r9WLZYI3+4W2rAc UucZa4OT27U5ZISjNg3Ev0rxU5UH2/pT4wJCfxwocmqaRr6UYmrtZmND89X0KigoFD/XSeVv jwBRNjPAubK9/k5NoRrYqztM9W6sJqrH8+UWZ1Idd/DdmogJh0gNC0+N42Za9yBRURfIdKSb B3JfpUqcWwE7vUaYrHG1nw54pLUoPG6sAA7Mehl3nd4pZUALHwARAQABzSREYXZpZCBIaWxk ZW5icmFuZCA8ZGF2aWRAcmVkaGF0LmNvbT7CwZoEEwEIAEQCGwMCF4ACGQEFCwkIBwICIgIG FQoJCAsCBBYCAwECHgcWIQQb2cqtc1xMOkYN/MpN3hD3AP+DWgUCaJzangUJJlgIpAAKCRBN 3hD3AP+DWhAxD/9wcL0A+2rtaAmutaKTfxhTP0b4AAp1r/eLxjrbfbCCmh4pqzBhmSX/4z11 opn2KqcOsueRF1t2ENLOWzQu3Roiny2HOU7DajqB4dm1BVMaXQya5ae2ghzlJN9SIoopTWlR 0Af3hPj5E2PYvQhlcqeoehKlBo9rROJv/rjmr2x0yOM8qeTroH/ZzNlCtJ56AsE6Tvl+r7cW 3x7/Jq5WvWeudKrhFh7/yQ7eRvHCjd9bBrZTlgAfiHmX9AnCCPRPpNGNedV9Yty2Jnxhfmbv Pw37LA/jef8zlCDyUh2KCU1xVEOWqg15o1RtTyGV1nXV2O/mfuQJud5vIgzBvHhypc3p6VZJ lEf8YmT+Ol5P7SfCs5/uGdWUYQEMqOlg6w9R4Pe8d+mk8KGvfE9/zTwGg0nRgKqlQXrWRERv cuEwQbridlPAoQHrFWtwpgYMXx2TaZ3sihcIPo9uU5eBs0rf4mOERY75SK+Ekayv2ucTfjxr Kf014py2aoRJHuvy85ee/zIyLmve5hngZTTe3Wg3TInT9UTFzTPhItam6dZ1xqdTGHZYGU0O otRHcwLGt470grdiob6PfVTXoHlBvkWRadMhSuG4RORCDpq89vu5QralFNIf3EysNohoFy2A LYg2/D53xbU/aa4DDzBb5b1Rkg/udO1gZocVQWrDh6I2K3+cCs7BTQRVy5+RARAA59fefSDR 9nMGCb9LbMX+TFAoIQo/wgP5XPyzLYakO+94GrgfZjfhdaxPXMsl2+o8jhp/hlIzG56taNdt VZtPp3ih1AgbR8rHgXw1xwOpuAd5lE1qNd54ndHuADO9a9A0vPimIes78Hi1/yy+ZEEvRkHk /kDa6F3AtTc1m4rbbOk2fiKzzsE9YXweFjQvl9p+AMw6qd/iC4lUk9g0+FQXNdRs+o4o6Qvy iOQJfGQ4UcBuOy1IrkJrd8qq5jet1fcM2j4QvsW8CLDWZS1L7kZ5gT5EycMKxUWb8LuRjxzZ 3QY1aQH2kkzn6acigU3HLtgFyV1gBNV44ehjgvJpRY2cC8VhanTx0dZ9mj1YKIky5N+C0f21 zvntBqcxV0+3p8MrxRRcgEtDZNav+xAoT3G0W4SahAaUTWXpsZoOecwtxi74CyneQNPTDjNg azHmvpdBVEfj7k3p4dmJp5i0U66Onmf6mMFpArvBRSMOKU9DlAzMi4IvhiNWjKVaIE2Se9BY FdKVAJaZq85P2y20ZBd08ILnKcj7XKZkLU5FkoA0udEBvQ0f9QLNyyy3DZMCQWcwRuj1m73D sq8DEFBdZ5eEkj1dCyx+t/ga6x2rHyc8Sl86oK1tvAkwBNsfKou3v+jP/l14a7DGBvrmlYjO 59o3t6inu6H7pt7OL6u6BQj7DoMAEQEAAcLBfAQYAQgAJgIbDBYhBBvZyq1zXEw6Rg38yk3e EPcA/4NaBQJonNqrBQkmWAihAAoJEE3eEPcA/4NaKtMQALAJ8PzprBEXbXcEXwDKQu+P/vts IfUb1UNMfMV76BicGa5NCZnJNQASDP/+bFg6O3gx5NbhHHPeaWz/VxlOmYHokHodOvtL0WCC 8A5PEP8tOk6029Z+J+xUcMrJClNVFpzVvOpb1lCbhjwAV465Hy+NUSbbUiRxdzNQtLtgZzOV Zw7jxUCs4UUZLQTCuBpFgb15bBxYZ/BL9MbzxPxvfUQIPbnzQMcqtpUs21CMK2PdfCh5c4gS sDci6D5/ZIBw94UQWmGpM/O1ilGXde2ZzzGYl64glmccD8e87OnEgKnH3FbnJnT4iJchtSvx yJNi1+t0+qDti4m88+/9IuPqCKb6Stl+s2dnLtJNrjXBGJtsQG/sRpqsJz5x1/2nPJSRMsx9 5YfqbdrJSOFXDzZ8/r82HgQEtUvlSXNaXCa95ez0UkOG7+bDm2b3s0XahBQeLVCH0mw3RAQg r7xDAYKIrAwfHHmMTnBQDPJwVqxJjVNr7yBic4yfzVWGCGNE4DnOW0vcIeoyhy9vnIa3w1uZ 3iyY2Nsd7JxfKu1PRhCGwXzRw5TlfEsoRI7V9A8isUCoqE2Dzh3FvYHVeX4Us+bRL/oqareJ CIFqgYMyvHj7Q06kTKmauOe4Nf0l0qEkIuIzfoLJ3qr5UyXc2hLtWyT9Ir+lYlX9efqh7mOY qIws/H2t In-Reply-To: <20251029100909.3381140-8-kevin.brodsky@arm.com> X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: la1xJiisjadv-gB5TaWGW0VUmtGCVx7YMltVh1TK0_4_1761999766 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit > static inline void lazy_mmu_mode_pause(void) > { > + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; > + > + VM_WARN_ON(state->nesting_level == 0 || !state->active); > + > + state->active = false; > arch_leave_lazy_mmu_mode(); Just one question: Don't we want to allow for pause/resume when not enabled? Would seem valid to me, because pause/resume code should actually not worry about that, right? if (!state->nesting_level) { VM_WARN_ON(state->active); return; } VM_WARN_ON(!state->active); state->active = false; arch_leave_lazy_mmu_mode(); -- Cheers David / dhildenb From xen-devel-bounces@lists.xenproject.org Sat Nov 01 17:21:19 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 01 Nov 2025 17:21:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155084.1484668 (Exim 4.92) (envelope-from ) id 1vFFHh-0003Yx-PB; Sat, 01 Nov 2025 17:21:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155084.1484668; Sat, 01 Nov 2025 17:21:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFFHh-0003Yq-Ma; Sat, 01 Nov 2025 17:21:01 +0000 Received: by outflank-mailman (input) for mailman id 1155084; Sat, 01 Nov 2025 17:21:00 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFFHg-0003Yk-Hn for xen-devel@lists.xenproject.org; Sat, 01 Nov 2025 17:21:00 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vFFHe-00Djx9-18; Sat, 01 Nov 2025 17:20:58 +0000 Received: from [2a02:8012:3a1:0:2858:32e7:18b8:3bf] by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.96) (envelope-from ) id 1vFFHe-003gFL-0z; Sat, 01 Nov 2025 17:20:58 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:Content-Type:In-Reply-To:From: References:Cc:To:Subject:MIME-Version:Date:Message-ID; bh=ppN5spUnByiaotRnYsiz8W6Po7g08zwtVOPW0Jfjhdw=; b=PwyZPdIWhstUE0kXJZ0NnOJYAm OJgXa+FFgTB7Znv5YKPDqmuyyepIAJycqomc5Jkxrrbb3Ctb8BwogMK4SAlWvmqUNSrDt1gIzqL8Y 3xV0+qehYL7DI7HPQ5n2lQw0wL25r0gski4nxRhp8JVrO/+x+nNgCtZzkRzRG3H56QxY=; Message-ID: <29c554de-2429-4c2e-bf87-a0e32fa461e0@xen.org> Date: Sat, 1 Nov 2025 17:20:56 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: Limitations for Running Xen on KVM Arm64 Content-Language: en-GB To: Mohamed Mediouni Cc: haseeb.ashraf@siemens.com, "xen-devel@lists.xenproject.org" , "Volodymyr_Babchuk@epam.com" References: <2b00a98f-6fee-4341-92bd-25909ebb6e36@xen.org> <0C76C261-783D-4503-B929-4B48CDEC8841@unpredictable.fr> From: Julien Grall In-Reply-To: <0C76C261-783D-4503-B929-4B48CDEC8841@unpredictable.fr> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Hi, On 31/10/2025 11:54, Mohamed Mediouni wrote: >> Per the Arm Arm each CPU have their own private TLBs. So we have to flush between vCPU of the same domains to avoid translations from vCPU 1 to "leak" to the vCPU 2 (they may have confliected page-tables). > Hm… it varies on whether the VM uses CnP or not (and whether the HW supports it)… (Linux does…) Skimming through the Arm Arm, it seems that CnP is a per page-table/ASID decision. So I think it would be difficult to take advantage of this knowlege in Xen unless we start trapping access to TTBRn_EL1 which is likely going to be expensive. Obviously, if someone trusts and knows their VM then they could rely on it. But that's not something I would want to accept in upstream Xen at the moment. >> KVM has a similar logic see "last_vcpu_ran" and "__kvm_flush_cpu_context()". That said... they are using "vmalle1" whereas we are using "vmalls12e1". So maybe we can relax it. Not sure if this would make any difference for the performance though. > vmalle1 avoids the problem here (because it only invalidates stage-1 translations). I saw Haseeb provided some good numbers. I think switching to vmalle1 is a no brainer. Cheers, -- Julien Grall From xen-devel-bounces@lists.xenproject.org Sat Nov 01 18:23:59 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 01 Nov 2025 18:23:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155098.1484679 (Exim 4.92) (envelope-from ) id 1vFGGO-0002Ue-8d; Sat, 01 Nov 2025 18:23:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155098.1484679; Sat, 01 Nov 2025 18:23:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFGGO-0002UX-57; Sat, 01 Nov 2025 18:23:44 +0000 Received: by outflank-mailman (input) for mailman id 1155098; Sat, 01 Nov 2025 18:23:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFGGM-0002UR-7F for xen-devel@lists.xenproject.org; Sat, 01 Nov 2025 18:23:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vFGGL-00Dl6m-1y; Sat, 01 Nov 2025 18:23:41 +0000 Received: from [2a02:8012:3a1:0:2858:32e7:18b8:3bf] by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.96) (envelope-from ) id 1vFGGL-003mhD-1N; Sat, 01 Nov 2025 18:23:41 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:Content-Type:In-Reply-To:From: References:Cc:To:Subject:MIME-Version:Date:Message-ID; bh=TMRuXbgCggR1YF7VDFbDu3l75eX6Jr1Ik5R/Hf++jQ4=; b=G0ONpZW4Fhp+1XNTf5IFb+MzDa abeAfBPv3cQUb2MeBA0JDL40U/lyF0AsbeJD1Fnjp7wvIoCoHobTIPKIQ9fISNF80aKhs/G/qsV2R rKevz14GpcJLUXCGyd7TFtGJBfSbx8TksHRZEl1J18PhYj4wfQLYm91kSTKmOvQx2zgc=; Message-ID: <01527182-ccef-43a5-be55-a5450eb7919f@xen.org> Date: Sat, 1 Nov 2025 18:23:38 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: Limitations for Running Xen on KVM Arm64 Content-Language: en-GB To: "haseeb.ashraf@siemens.com" , Mohamed Mediouni Cc: "xen-devel@lists.xenproject.org" , "Volodymyr_Babchuk@epam.com" , "Driscoll, Dan" , "Bachtel, Andrew" , "fahad.arslan@siemens.com" , "noor.ahsan@siemens.com" , "brian.sheppard@siemens.com" , Stefano Stabellini , Bertrand Marquis , Michal Orzel References: <2b00a98f-6fee-4341-92bd-25909ebb6e36@xen.org> From: Julien Grall In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit (+ the other Arm maintainers) On 31/10/2025 13:01, haseeb.ashraf@siemens.com wrote: > Hello, Hi, Before answering to the rest, would you be able to configure your e-mail client to quote with '>' and avoid top-posting? Otherwise, it will become quite difficult to follow the conversation after a few round. > I have seen no such performance issue with nested KVM. For Xen, if this > can be relaxed from |vmalls12e1| to |vmalle1|, this would still be a > huge performance improvement. I used Ftrace to get execution time of > each of these handler functions: > handle_vmalls12e1is() min-max = 1464441 - 9495486 us To clarify, Xen is using the local TLB version. So it should be vmalls12e1. But it looks like KVM will treat it the same way and I wonder whether this could be optimized? (I don't know much about the KVM implementation though). > > So, to summarize using HCR_EL2.FB (which Xen already enables?) and then > using vmalle1 instead of vmalls12e1 should resolve the issue-2 for vCPUs > switching on pCPUs. I don't think HCR_EL2.FB would matter here. > > Coming back to issue-1, what do you think about creating a batch version > of hypercall XENMEM_remove_from_physmap (other batch versions exist such > as for XENMEM_add_to_physmap) and doing the TLB invalidation only once > per this hypercall? Before going into batching, do you have any data showing how often XENMEM_remove_from_physmap is called in your setup? Similar, I would be interested to know the number of TLBs flush within one hypercalls and whether the regions unmapped were contiguous. In your previous e-mail you wrote: > During the creation of domu, first the domu memory is mapped onto dom0 domain, images are copied into it, and it is then unmapped. During unmapping, the TLB translations are invalidated one by one for each page being unmapped in XENMEM_remove_from_physmap hypercall. Here is the code snippet where the decision to flush TLBs is being made during removal of mapping. Don't we map only the memory that is needed to copy the binaries? If not, then I would suggest to look at that first. I am asking because even with batching, we may still send a few TLBs because: * We need to avoid long-running operations, so the hypercall may restart. So we will have to flush at mininum before every restart * The current way we handle batching is we will process one item at the time. As this may free memory (either leaf or intermediate page-tables), we will need to flush the TLBs first to prevent the domain accessing the wrong memory. This could be solved by keeping track of the list of memory to free. But this is going to require some work and I am not entirely sure this is worth it at the moment. > I just realized that ripas2e1 is a range TLBI > instruction which is only supported after Armv8.4 indicated > by ID_AA64ISAR0_EL1.TLB == 2. So, on older architectures, full stage-2 > invalidation would be required. For an architecture independent > solution, creating a batch version seems to be a better way. I don't think we necessarily need a full stage-2 invalidation for processor not supporting range TLBI. We could use a series of TLBI IPAS2E1IS which I think is what TBLI range is meant to replace (so long the addresses are contiguous in the given space). On the KVM side, it would be worth looking at whether the implementation can be optimized. Is this really walking block by block? Can it skip over large hole (e.g. if we know a level 1 entry doesn't exist, then we can increment by 1GB). Cheers, -- Julien Grall From xen-devel-bounces@lists.xenproject.org Sun Nov 02 03:20:14 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 02 Nov 2025 03:20:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155126.1484689 (Exim 4.92) (envelope-from ) id 1vFOdF-0006Ew-KC; Sun, 02 Nov 2025 03:19:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155126.1484689; Sun, 02 Nov 2025 03:19:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFOdF-0006Eo-Ex; Sun, 02 Nov 2025 03:19:53 +0000 Received: by outflank-mailman (input) for mailman id 1155126; Sun, 02 Nov 2025 03:19:52 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFOdE-0006Ei-5p for xen-devel@lists.xenproject.org; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="Byp0VLSoGkXrFTwA" Content-Disposition: inline In-Reply-To: --Byp0VLSoGkXrFTwA Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Sun, 2 Nov 2025 04:19:40 +0100 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: =?utf-8?B?SsO8cmdlbiBHcm/Dnw==?= Cc: xen-devel Subject: Re: race condition when re-connecting vif after backend died On Wed, Oct 08, 2025 at 04:04:58PM +0200, Marek Marczykowski-G=C3=B3recki w= rote: > On Wed, Oct 08, 2025 at 02:32:02PM +0200, J=C3=BCrgen Gro=C3=9F wrote: > > On 08.10.25 13:22, Marek Marczykowski-G=C3=B3recki wrote: > > > Hi, > > >=20 > > > I have the following scenario: > > > 1. Start backend domain (call it netvm1) > > > 2. Start frontend domain (call it vm1), with > > > vif=3D['backend=3Dnetvm2,mac=3D00:16:3e:5e:6c:00,script=3Dvif-route-q= ubes,ip=3D10.138.17.244'] > > > 3. Pause vm1 (not strictly required, but makes reproducing much easie= r) > > > 5. Crash/shutdown/destroy netvm1 > > > 4. Start another backend domain (call it netvm2) > > > 5. In quick succession: > > > 5.1. unpause vm1 > > > 5.2. detach (or actually cleanup) vif from vm1 (connected to now = dead > > > netvm1) > > > 5.3. attach similar vif with backend=3Dnetvm2 >=20 > The way it's above, it tricky to reproduce (1/20 or even less often). > But if I move unpause after 5.3, then it's happening reliably. I hope > it's not too different scenario... >=20 > > > Sometimes it ends up with eth0 being present in vm1, but its xenstore > > > state key is still XenbusStateInitializing. And the backend state is = at > > > XenbusStateInitWait. > > > In step 5.2, normally libxl waits for the backend to transition to st= ate > > > XenbusStateClosed, and IIUC backend waits for the frontend to do the > > > same too. But when the backend is gone, libxl seems to simply removes > > > frontend xenstore entries without any coordination with the frontend > > > domain itself. > > > What I suspect happens is that xenstore events generated at 5.2 are > > > getting handled by the frontend's kernel only after 5.3. At this sta= ge, > > > frontend sees device that was is XenbusStateConnected transitioning to > > > XenbusStateInitializing (not really expected by the frontend to someb= ody > > > else change its state key) and (I guess) doesn't notice device vanish= ed > > > for a moment (xenbus_dev_changed() doesn't hit the !exists path). I > > > haven't verified it, but I guess it also doesn't notice backend path > > > change, so it's still watching the old one (gone at this point). > > >=20 > > > If my diagnosis is correct, what should be the solution here? Add > > > handling for XenbusStateUnknown in xen-netfrontc.c:netback_changed()?= If > > > so, it should probably carefully cleanup the old device while not > > > touching xenstore entries (which belong to the new instance already) = and > > > then re-initialize the device (xennet_connect()? call). > > > Or maybe it should be done in generic way in xenbus_probe.c, in > > > xenbus_dev_changed()? Not sure how exactly - maybe by checking if > > > backend path (or just backend-id?) changed? And then call both > > > device_unregister() (again, being careful to not change xenstore, > > > especially not set XenbusStateClosed) and then xenbus_probe_node()? > > >=20 > >=20 > > I think we need to know what is going on here. > >=20 > > Can you repeat the test with Xenstore tracing enabled? Just do: > >=20 > > xenstore-control logfile /tmp/xs-trace > >=20 > > before point 3. in your list above and then perform steps 3. - 5.3. and > > then send the logfile. Please make sure not to have any additional acti= ons > > causing Xenstore traffic in between, as this would make it much harder = to > > analyze the log. >=20 > I can't completely avoid other xenstore activity, but I tried to reduce > it as much as possible... >=20 > I'm attaching reproduction script, its output, and xenstore traces. Note > I split xenstore trace into two parts, hopefully making it easier to > analyze. Ok, I think I managed to fix it. There were two cases: frontend overriding state key of already re-connected device, and frontend re-creating state key of device forcefully removed by the toolstack. I'll post the patch in a moment. --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --Byp0VLSoGkXrFTwA Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmkGzcwACgkQ24/THMrX 1yw/NwgAgc3209xCXQ0HJA5C/YP33lGbiBEf2khalvMawSqjcGYKYX5kkZe+K/5j EKb3InOCu4L1n44AoREdOL3EFWHYj75mQrKIpK2Rnr0PEL69TN8hC90sL4bEFCTa EDsrDK/2qdxH9WXfrhWIOnVKxmfsA/ovlkUPn8M9w1A8m9tXgFKxAi285bPLQqxU g8qWv4eeRLxqdeuUAQuNpXYKUq/bdobGVdv11n+/N+w+Vb7lLYSLS+LXWfQ+q1cD cvjz8ygRWWyJDer+kGHI+qboxawTeYopd3QVUkzTZb9Ej0vCfQ2aI2MAAa+946RH QuptzXo+KDXSfwWtQRFBCbL0Z/RuEQ== =/5qI -----END PGP SIGNATURE----- --Byp0VLSoGkXrFTwA-- From xen-devel-bounces@lists.xenproject.org Sun Nov 02 03:21:56 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 02 Nov 2025 03:21:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155138.1484699 (Exim 4.92) (envelope-from ) id 1vFOfE-0007jq-17; Sun, 02 Nov 2025 03:21:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155138.1484699; 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charset=UTF-8 Content-Transfer-Encoding: 8bit When the backend domain crashes, coordinated device cleanup is not possible (as it involves waiting for the backend state change). In that case, toolstack forcefully removes frontend xenstore entries. xenbus_dev_changed() handles this case, and triggers device cleanup. It's possible that toolstack manages to connect new device in that place, before xenbus_dev_changed() notices the old one is missing. If that happens, new one won't be probed and will forever remain in XenbusStateInitialising. Fix this by checking backend-id and if it changes, consider it unplug+plug operation. It's important that cleanup on such unplug doesn't modify xenstore entries (especially the "state" key) as it belong to the new device to be probed - changing it would derail establishing connection to the new backend (most likely, closing the device before it was even connected). Handle this case by setting new xenbus_device->vanished flag to true, and check it before changing state entry. And even if xenbus_dev_changed() correctly detects the device was forcefully removed, the cleanup handling is still racy. Since this whole handling doesn't happend in a single xenstore transaction, it's possible that toolstack might put a new device there already. Avoid re-creating the state key (which in the case of loosing the race would actually close newly attached device). The problem does not apply to frontend domain crash, as this case involves coordinated cleanup. Problem originally reported at https://lore.kernel.org/xen-devel/aOZvivyZ9YhVWDLN@mail-itl/T/#t, including reproduction steps. Signed-off-by: Marek Marczykowski-Górecki --- I considered re-using one of existing fields instead of a new xenbus_device->vanished, but I wasn't sure if that would work better. Setting xenbus_device->nodename to NULL would prevent few other places using it (including some log messages). Setting xenbus_device->otherend might have less unintentional impact, but logically it doesn't feel correct. With this patch applied, I cannot reproduce the issue anymore - neither with the simplified reproducer script, nor with the full test suite. --- drivers/xen/xenbus/xenbus_client.c | 2 ++ drivers/xen/xenbus/xenbus_probe.c | 25 +++++++++++++++++++++++++ include/xen/xenbus.h | 1 + 3 files changed, 28 insertions(+) diff --git a/drivers/xen/xenbus/xenbus_client.c b/drivers/xen/xenbus/xenbus_client.c index e73ec225d4a61..ce2f49d9aa4ad 100644 --- a/drivers/xen/xenbus/xenbus_client.c +++ b/drivers/xen/xenbus/xenbus_client.c @@ -275,6 +275,8 @@ __xenbus_switch_state(struct xenbus_device *dev, */ int xenbus_switch_state(struct xenbus_device *dev, enum xenbus_state state) { + if (dev->vanished) + return 0; return __xenbus_switch_state(dev, state, 0); } diff --git a/drivers/xen/xenbus/xenbus_probe.c b/drivers/xen/xenbus/xenbus_probe.c index 86fe6e7790566..3c3e56b544976 100644 --- a/drivers/xen/xenbus/xenbus_probe.c +++ b/drivers/xen/xenbus/xenbus_probe.c @@ -444,6 +444,9 @@ static void xenbus_cleanup_devices(const char *path, struct bus_type *bus) info.dev = NULL; bus_for_each_dev(bus, NULL, &info, cleanup_dev); if (info.dev) { + dev_warn(&info.dev->dev, + "device forcefully removed from xenstore\n"); + info.dev->vanished = true; device_unregister(&info.dev->dev); put_device(&info.dev->dev); } @@ -659,6 +662,28 @@ void xenbus_dev_changed(const char *node, struct xen_bus_type *bus) return; dev = xenbus_device_find(root, &bus->bus); + /* Backend domain crash results in not coordinated frontend removal, + * without going through XenbusStateClosing. Check if the device + * wasn't replaced to point at another backend in the meantime. + */ + if (dev && !strncmp(node, "device/", sizeof("device/")-1)) { + int backend_id; + int err = xenbus_gather(XBT_NIL, root, + "backend-id", "%i", &backend_id, + NULL); + if (!err && backend_id != dev->otherend_id) { + /* It isn't the same device, assume the old one + * vanished and new one needs to be probed. + */ + dev_warn(&dev->dev, + "backend-id mismatch (%d != %d), reconnecting\n", + backend_id, dev->otherend_id); + dev->vanished = true; + device_unregister(&dev->dev); + put_device(&dev->dev); + dev = NULL; + } + } if (!dev) xenbus_probe_node(bus, type, root); else diff --git a/include/xen/xenbus.h b/include/xen/xenbus.h index 7dab04cf4a36c..43a5335f1d5a3 100644 --- a/include/xen/xenbus.h +++ b/include/xen/xenbus.h @@ -87,6 +87,7 @@ struct xenbus_device { struct completion down; struct work_struct work; struct semaphore reclaim_sem; + bool vanished; /* Event channel based statistics and settings. */ atomic_t event_channels; -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sun Nov 02 16:54:15 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 02 Nov 2025 16:54:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155186.1484713 (Exim 4.92) (envelope-from ) id 1vFbL4-0005ab-N2; Sun, 02 Nov 2025 16:53:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155186.1484713; Sun, 02 Nov 2025 16:53:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFbL4-0005aU-K3; Sun, 02 Nov 2025 16:53:58 +0000 Received: by outflank-mailman (input) for mailman id 1155186; Sun, 02 Nov 2025 16:39:34 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFb78-0003OD-Hs for xen-devel@lists.xenproject.org; Sun, 02 Nov 2025 16:39:34 +0000 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 8136aa0f-b80a-11f0-9d16-b5c5bf9af7f9; Sun, 02 Nov 2025 17:39:32 +0100 (CET) Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 5A2EeN6r377528 for ; Sun, 2 Nov 2025 16:39:30 GMT Received: from mail-qt1-f197.google.com (mail-qt1-f197.google.com [209.85.160.197]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4a5bg9j8ev-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Sun, 02 Nov 2025 16:39:29 +0000 (GMT) Received: by mail-qt1-f197.google.com with SMTP id d75a77b69052e-4e8984d8833so79091941cf.0 for ; Sun, 02 Nov 2025 08:39:29 -0800 (PST) Received: from umbar.lan (2001-14ba-a0c3-3a00-264b-feff-fe8b-be8a.rev.dnainternet.fi. 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Sun, 02 Nov 2025 08:39:28 -0800 (PST) Date: Sun, 2 Nov 2025 18:39:25 +0200 From: Dmitry Baryshkov To: Thomas Zimmermann Cc: simona@ffwll.ch, airlied@gmail.com, mripard@kernel.org, maarten.lankhorst@linux.intel.com, geert@linux-m68k.org, tomi.valkeinen@ideasonboard.com, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, imx@lists.linux.dev, linux-samsung-soc@vger.kernel.org, nouveau@lists.freedesktop.org, virtualization@lists.linux.dev, spice-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-tegra@vger.kernel.org, intel-xe@lists.freedesktop.org, xen-devel@lists.xenproject.org, Dmitry Baryshkov , Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten Subject: Re: [PATCH v6 13/25] drm/msm: Compute dumb-buffer sizes with drm_mode_size_dumb() Message-ID: References: <20250821081918.79786-1-tzimmermann@suse.de> <20250821081918.79786-14-tzimmermann@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250821081918.79786-14-tzimmermann@suse.de> X-Proofpoint-ORIG-GUID: cajfqfOLeswAMmPuhLRi3XM4KinP2bdI X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTAyMDE1NCBTYWx0ZWRfXwV3LjpEJeYFW BHt8rtRfblKzmlXaGzSDcXYffMIGdrbJCKIz7TPB0HD4szi8C1YgUDWYftv3+pZm4syhmSlqVYg atL6TVZvmMGUDp0Rbd+w4xcD9bU9VpcaWScSzGStbDzCgrpm5e0gKNcOTwuktjTKEUHEXfGknyC HMTuWatKGRdcuq5Qch1iX8ECk1zRofRLZL5IH9JvkJDGzX6NbafeLs7Xf44y+OpbEis5KmLWoXP Gwi1F9UcHXCRcDwIzGqzE+E7FsOk6PeVnHMc0ecVU8oAhWYxnpG8h5k0ID37RiPcyGX2lB4AhnW nTK3WG2/Tz5N0AsNOD7bQ0lYFNZ/nSmmbFX7GJ5kuw7OcH9yGD1p8YAzFaVWVGgLK0mwbfEp6r1 iTy9FSf92SCmdt80L90GGiFpKLzsrg== X-Proofpoint-GUID: cajfqfOLeswAMmPuhLRi3XM4KinP2bdI X-Authority-Analysis: v=2.4 cv=TaKbdBQh c=1 sm=1 tr=0 ts=69078941 cx=c_pps a=EVbN6Ke/fEF3bsl7X48z0g==:117 a=xqWC_Br6kY4A:10 a=kj9zAlcOel0A:10 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=KKAkSRfTAAAA:8 a=pGLkceISAAAA:8 a=COk6AnOGAAAA:8 a=tVI0ZWmoAAAA:8 a=4vBwfh3hQKJL6CJddaEA:9 a=CjuIK1q_8ugA:10 a=a_PwQJl-kcHnX1M80qC6:22 a=cvBusfyB2V15izCimMoJ:22 a=TjNXssC_j7lpFel5tvFf:22 a=-BPWgnxRz2uhmvdm1NTO:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-02_02,2025-10-29_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 impostorscore=0 bulkscore=0 adultscore=0 clxscore=1011 priorityscore=1501 spamscore=0 suspectscore=0 lowpriorityscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511020154 On Thu, Aug 21, 2025 at 10:17:20AM +0200, Thomas Zimmermann wrote: > Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch > and buffer size. Alignment is specified in bytes, but the hardware > requires the scanline pitch to be a multiple of 32 pixels. Therefore > compute the byte size of 32 pixels in the given color mode and align > the pitch accordingly. This replaces the existing code in the driver's > align_pitch() helper. > > v3: > - clarify pitch alignment in commit message (Dmitry) > > Signed-off-by: Thomas Zimmermann > Reviewed-by: Dmitry Baryshkov > Cc: Rob Clark > Cc: Abhinav Kumar > Cc: Dmitry Baryshkov > Cc: Sean Paul > Cc: Marijn Suijten > --- > drivers/gpu/drm/msm/msm_gem.c | 27 +++++++++++++++++++++++++-- > 1 file changed, 25 insertions(+), 2 deletions(-) > This broke kms_getfb@getfb-reject-nv12 and kms_getfb@getfb2-accept-nv12 IGT tests. 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On Thu, Oct 30, 2025 at 10:41=E2=80=AFAM Orzel, Michal wrote: > > > > On 30/10/2025 08:59, Mykola Kvach wrote: > > @Stefano Stabellini @Michal Orzel @Julien Grall @Bertrand Marquis ping > > > > On Thu, Aug 7, 2025 at 8:16=E2=80=AFAM Mykola Kvach wrote: > >> > >> From: Volodymyr Babchuk > >> > >> Implement suspend and resume callbacks for the SCIF UART driver, > >> enabled when CONFIG_SYSTEM_SUSPEND is set. This allows proper > >> handling of UART state across system suspend/resume cycles. > >> > >> Tested on Renesas R-Car H3 Starter Kit. > >> > >> Signed-off-by: Volodymyr Babchuk > >> Signed-off-by: Oleksandr Andrushchenko > >> Signed-off-by: Mykola Kvach > >> --- > >> In patch v5, there are no changes at all; > >> it was done just to trigger a review. > >> > >> In patch v4, enhance commit message, no functional changes > >> > >> In patch v2, I just added a CONFIG_SYSTEM_SUSPEND check around > >> the suspend/resume functions in the SCIF driver. > >> --- > >> xen/drivers/char/scif-uart.c | 40 ++++++++++++++++++++++++++++++++++-= - > >> 1 file changed, 38 insertions(+), 2 deletions(-) > >> > >> diff --git a/xen/drivers/char/scif-uart.c b/xen/drivers/char/scif-uart= .c > >> index 757793ca45..888821a3b8 100644 > >> --- a/xen/drivers/char/scif-uart.c > >> +++ b/xen/drivers/char/scif-uart.c > >> @@ -139,9 +139,8 @@ static void scif_uart_interrupt(int irq, void *dat= a) > >> } > >> } > >> > >> -static void __init scif_uart_init_preirq(struct serial_port *port) > >> +static void scif_uart_disable(struct scif_uart *uart) > >> { > >> - struct scif_uart *uart =3D port->uart; > >> const struct port_params *params =3D uart->params; > >> > >> /* > >> @@ -155,6 +154,14 @@ static void __init scif_uart_init_preirq(struct s= erial_port *port) > >> > >> /* Reset TX/RX FIFOs */ > >> scif_writew(uart, SCIF_SCFCR, SCFCR_RFRST | SCFCR_TFRST); > >> +} > >> + > >> +static void scif_uart_init_preirq(struct serial_port *port) > >> +{ > >> + struct scif_uart *uart =3D port->uart; > >> + const struct port_params *params =3D uart->params; > >> + > >> + scif_uart_disable(uart); > >> > >> /* Clear all errors and flags */ > >> scif_readw(uart, params->status_reg); > >> @@ -271,6 +278,31 @@ static void scif_uart_stop_tx(struct serial_port = *port) > >> scif_writew(uart, SCIF_SCSCR, scif_readw(uart, SCIF_SCSCR) & ~SCS= CR_TIE); > >> } > >> > >> +#ifdef CONFIG_SYSTEM_SUSPEND > >> + > >> +static void scif_uart_suspend(struct serial_port *port) > >> +{ > >> + struct scif_uart *uart =3D port->uart; > >> + > >> + scif_uart_stop_tx(port); > >> + scif_uart_disable(uart); > >> +} > >> + > >> +static void scif_uart_resume(struct serial_port *port) > >> +{ > >> + struct scif_uart *uart =3D port->uart; > >> + const struct port_params *params =3D uart->params; > >> + uint16_t ctrl; > >> + > >> + scif_uart_init_preirq(port); > This will also call scif_uart_disable() that was already invoked during s= uspend. > Why do we need to re-disable it when resuming? Thanks for the question. Yes, resume calls scif_uart_init_preirq(), which in turn calls scif_uart_disable(). This is intentional. - While Xen is suspended, EL3 firmware (e.g. TF-A) may use an early or runtime console and reconfigure the SCIF, including enabling TX. Re-disabling gives a quiescent baseline. - PSCI does not guarantee device state across SYSTEM_SUSPEND; device preconditions are outside PSCI's scope. We cannot rely on the state Xen left before suspend. - We reuse scif_uart_init_preirq() on resume to keep a single, well-tested initialization path identical to cold boot. This avoids split logic and keeps behavior consistent. - The extra disable is idempotent and cheap (FIFO/status clear), while preventing spurious data on bring-up. I can add an inline comment to make this explicit: /* On resume, EL3/firmware may have touched SCIF (early/runtime * console). Disable again to start from a clean, quiescent state * before reinit; reuse scif_uart_init_preirq() to keep the cold-boot * sequence. */ > > Other than that: > Acked-by: Michal Orzel > > ~Michal > Best regards, Mykola From xen-devel-bounces@lists.xenproject.org Mon Nov 03 08:21:28 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 03 Nov 2025 08:21:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155226.1484733 (Exim 4.92) (envelope-from ) id 1vFpoY-0004sa-An; Mon, 03 Nov 2025 08:21:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155226.1484733; Mon, 03 Nov 2025 08:21:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFpoY-0004sT-7x; Mon, 03 Nov 2025 08:21:22 +0000 Received: by outflank-mailman (input) for mailman id 1155226; Mon, 03 Nov 2025 08:21:21 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFpoX-0004sL-0H for xen-devel@lists.xenproject.org; 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pr=C Message-ID: <575902ae-c22d-47f4-a6ca-02a2125f39d6@amd.com> Date: Mon, 3 Nov 2025 09:21:01 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5] xen/char: implement suspend/resume calls for SCIF driver To: Mykola Kvach CC: , Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Bertrand Marquis , Oleksandr Andrushchenko , Mykola Kvach References: <5c1db85b-8733-47d5-b751-864cdb45aca4@amd.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit Received-SPF: None (SATLEXMB04.amd.com: michal.orzel@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000A6732:EE_|DM4PR12MB6010:EE_ X-MS-Office365-Filtering-Correlation-Id: 8a494c9c-7e1b-49d7-2af7-08de1ab1ef8e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700013|82310400026|376014|7053199007; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Nov 2025 08:21:06.2446 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8a494c9c-7e1b-49d7-2af7-08de1ab1ef8e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000A6732.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6010 On 03/11/2025 08:30, Mykola Kvach wrote: > Hi Michal, > > Thank you for the fast response and the review. > > On Thu, Oct 30, 2025 at 10:41 AM Orzel, Michal wrote: >> >> >> >> On 30/10/2025 08:59, Mykola Kvach wrote: >>> @Stefano Stabellini @Michal Orzel @Julien Grall @Bertrand Marquis ping >>> >>> On Thu, Aug 7, 2025 at 8:16 AM Mykola Kvach wrote: >>>> >>>> From: Volodymyr Babchuk >>>> >>>> Implement suspend and resume callbacks for the SCIF UART driver, >>>> enabled when CONFIG_SYSTEM_SUSPEND is set. This allows proper >>>> handling of UART state across system suspend/resume cycles. >>>> >>>> Tested on Renesas R-Car H3 Starter Kit. >>>> >>>> Signed-off-by: Volodymyr Babchuk >>>> Signed-off-by: Oleksandr Andrushchenko >>>> Signed-off-by: Mykola Kvach >>>> --- >>>> In patch v5, there are no changes at all; >>>> it was done just to trigger a review. >>>> >>>> In patch v4, enhance commit message, no functional changes >>>> >>>> In patch v2, I just added a CONFIG_SYSTEM_SUSPEND check around >>>> the suspend/resume functions in the SCIF driver. >>>> --- >>>> xen/drivers/char/scif-uart.c | 40 ++++++++++++++++++++++++++++++++++-- >>>> 1 file changed, 38 insertions(+), 2 deletions(-) >>>> >>>> diff --git a/xen/drivers/char/scif-uart.c b/xen/drivers/char/scif-uart.c >>>> index 757793ca45..888821a3b8 100644 >>>> --- a/xen/drivers/char/scif-uart.c >>>> +++ b/xen/drivers/char/scif-uart.c >>>> @@ -139,9 +139,8 @@ static void scif_uart_interrupt(int irq, void *data) >>>> } >>>> } >>>> >>>> -static void __init scif_uart_init_preirq(struct serial_port *port) >>>> +static void scif_uart_disable(struct scif_uart *uart) >>>> { >>>> - struct scif_uart *uart = port->uart; >>>> const struct port_params *params = uart->params; >>>> >>>> /* >>>> @@ -155,6 +154,14 @@ static void __init scif_uart_init_preirq(struct serial_port *port) >>>> >>>> /* Reset TX/RX FIFOs */ >>>> scif_writew(uart, SCIF_SCFCR, SCFCR_RFRST | SCFCR_TFRST); >>>> +} >>>> + >>>> +static void scif_uart_init_preirq(struct serial_port *port) >>>> +{ >>>> + struct scif_uart *uart = port->uart; >>>> + const struct port_params *params = uart->params; >>>> + >>>> + scif_uart_disable(uart); >>>> >>>> /* Clear all errors and flags */ >>>> scif_readw(uart, params->status_reg); >>>> @@ -271,6 +278,31 @@ static void scif_uart_stop_tx(struct serial_port *port) >>>> scif_writew(uart, SCIF_SCSCR, scif_readw(uart, SCIF_SCSCR) & ~SCSCR_TIE); >>>> } >>>> >>>> +#ifdef CONFIG_SYSTEM_SUSPEND >>>> + >>>> +static void scif_uart_suspend(struct serial_port *port) >>>> +{ >>>> + struct scif_uart *uart = port->uart; >>>> + >>>> + scif_uart_stop_tx(port); >>>> + scif_uart_disable(uart); >>>> +} >>>> + >>>> +static void scif_uart_resume(struct serial_port *port) >>>> +{ >>>> + struct scif_uart *uart = port->uart; >>>> + const struct port_params *params = uart->params; >>>> + uint16_t ctrl; >>>> + >>>> + scif_uart_init_preirq(port); >> This will also call scif_uart_disable() that was already invoked during suspend. >> Why do we need to re-disable it when resuming? > > Thanks for the question. > > Yes, resume calls scif_uart_init_preirq(), which in turn calls > scif_uart_disable(). This is intentional. > > - While Xen is suspended, EL3 firmware (e.g. TF-A) may use an early > or runtime console and reconfigure the SCIF, including enabling > TX. Re-disabling gives a quiescent baseline. > > - PSCI does not guarantee device state across SYSTEM_SUSPEND; device > preconditions are outside PSCI's scope. We cannot rely on the state > Xen left before suspend. > > - We reuse scif_uart_init_preirq() on resume to keep a single, > well-tested initialization path identical to cold boot. This avoids > split logic and keeps behavior consistent. > > - The extra disable is idempotent and cheap (FIFO/status clear), while > preventing spurious data on bring-up. > > I can add an inline comment to make this explicit: > > /* On resume, EL3/firmware may have touched SCIF (early/runtime > * console). Disable again to start from a clean, quiescent state > * before reinit; reuse scif_uart_init_preirq() to keep the cold-boot > * sequence. > */ No need, your explanation makes sense. Thanks. ~Michal From xen-devel-bounces@lists.xenproject.org Mon Nov 03 08:45:14 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 03 Nov 2025 08:45:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155239.1484743 (Exim 4.92) (envelope-from ) id 1vFqBR-00080n-5u; Mon, 03 Nov 2025 08:45:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155239.1484743; Mon, 03 Nov 2025 08:45:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFqBR-00080g-2u; Mon, 03 Nov 2025 08:45:01 +0000 Received: by outflank-mailman (input) for mailman id 1155239; Mon, 03 Nov 2025 08:44:59 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFqBP-00080a-Dr for xen-devel@lists.xenproject.org; Mon, 03 Nov 2025 08:44:59 +0000 Received: from mail-ej1-x62b.google.com (mail-ej1-x62b.google.com [2a00:1450:4864:20::62b]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 609abba4-b891-11f0-9d16-b5c5bf9af7f9; Mon, 03 Nov 2025 09:44:58 +0100 (CET) Received: by mail-ej1-x62b.google.com with SMTP id a640c23a62f3a-b3e7cc84b82so839129966b.0 for ; Mon, 03 Nov 2025 00:44:58 -0800 (PST) Received: from [192.168.1.6] (user-109-243-71-38.play-internet.pl. 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For 3rd patch, also: Release-Acked-by: Oleksii Kurochko Thanks. ~ Oleksii --------------GiUkDcvuOP1KHNAja53hpPKg Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: 7bit


On 10/31/25 10:34 AM, Jan Beulich wrote:
On 31.10.2025 10:31, Oleksii Kurochko wrote:

On 10/28/25 4:32 PM, Jan Beulich wrote:

Both patches also want 'x86/CPU: extend is_forced_cpu_cap()'s "reach"' in
place.

1: disable RDSEED on Fam17 model 47 stepping 0
2: disable RDSEED on most of Zen5

Both patches LGTM to be in 4.21:
   Release-Acked-by: Oleksii Kurochko<oleksii.kurochko@gmail.com>

Thanks, yet: What about the 3rd patch mentioned in the text above?
For 3rd patch, also:
 Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>

Thanks.

~ Oleksii
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pr=C Message-ID: <552fc2be-661c-4718-a650-9f2daf6c72ea@amd.com> Date: Mon, 3 Nov 2025 09:52:21 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] arm/efi: address MISRA C Rule 11.3 To: Dmytro Prokopchuk1 , "xen-devel@lists.xenproject.org" CC: Stefano Stabellini , Julien Grall , Bertrand Marquis , "Volodymyr Babchuk" References: <212a1ac4ee568f027f6cb7f9437aa42d2f0b6c41.1761599221.git.dmytro_prokopchuk1@epam.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <212a1ac4ee568f027f6cb7f9437aa42d2f0b6c41.1761599221.git.dmytro_prokopchuk1@epam.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044FA:EE_|SA0PR12MB4413:EE_ X-MS-Office365-Filtering-Correlation-Id: 0e5595ce-c096-4983-65c8-08de1ab65348 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700013|1800799024|82310400026|7053199007; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Nov 2025 08:52:31.5468 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0e5595ce-c096-4983-65c8-08de1ab65348 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044FA.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4413 On 27/10/2025 22:12, Dmytro Prokopchuk1 wrote: > MISRA C Rule 11.3 prohibits casting between pointer-to-object types that > are different types. The original code used a macro 'NextMemoryDescriptor()' > that performed a non-compliant cast from 'UINT8*' to 'EFI_MEMORY_DESCRIPTOR*'. > > Change 'efi_process_memory_map_bootinfo()' function parameter from > 'EFI_MEMORY_DESCRIPTOR *' to 'void *' for the memory map parameter. Replace > usage of 'NextMemoryDescriptor()' macro with compliant pointer arithmetic > on 'void *', followed by a single compliant cast to 'EFI_MEMORY_DESCRIPTOR *'. > > Signed-off-by: Dmytro Prokopchuk Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Mon Nov 03 09:06:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 03 Nov 2025 09:06:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155209.1484763 (Exim 4.92) (envelope-from ) id 1vFqVm-00030y-1D; Mon, 03 Nov 2025 09:06:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155209.1484763; Mon, 03 Nov 2025 09:06:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFqVl-00030r-UI; Mon, 03 Nov 2025 09:06:01 +0000 Received: by outflank-mailman (input) for mailman id 1155209; Mon, 03 Nov 2025 03:23:17 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFlA5-0001cN-Ja for xen-devel@lists.xenproject.org; Mon, 03 Nov 2025 03:23:17 +0000 Received: from ssh247.corpemail.net (ssh247.corpemail.net [210.51.61.247]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 6c8ea768-b864-11f0-9d16-b5c5bf9af7f9; Mon, 03 Nov 2025 04:23:13 +0100 (CET) Received: from Jtjnmail201615.home.langchao.com by ssh247.corpemail.net ((D)) with ASMTP (SSL) id 202511031123089213; Mon, 03 Nov 2025 11:23:08 +0800 Received: from jtjnmailAR01.home.langchao.com (10.100.2.42) by Jtjnmail201615.home.langchao.com (10.100.2.15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Mon, 3 Nov 2025 11:23:06 +0800 Received: from inspur.com (10.100.2.107) by jtjnmailAR01.home.langchao.com (10.100.2.42) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Mon, 3 Nov 2025 11:23:06 +0800 Received: from localhost.localdomain.com (unknown [10.94.13.117]) by app3 (Coremail) with SMTP id awJkCsDw3fgXIAhpPa8JAA--.11940S4; Mon, 03 Nov 2025 11:23:06 +0800 (CST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 6c8ea768-b864-11f0-9d16-b5c5bf9af7f9 From: Chu Guangqing To: , , , , , , , CC: , , , Chu Guangqing Subject: [PATCH] xen/netfront: Comment Correction: Fix Spelling Error and Description of Queue Quantity Rules Date: Mon, 3 Nov 2025 11:22:12 +0800 Message-ID: <20251103032212.2462-1-chuguangqing@inspur.com> X-Mailer: git-send-email 2.43.7 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID: awJkCsDw3fgXIAhpPa8JAA--.11940S4 X-Coremail-Antispam: 1UD129KBjvJXoW7KFWfGw4fZr1DGFy3Xr4UCFg_yoW8Xw1Dpr ZxWwsIvwn5XanFy3Wvy3WxurW5Xa18GFyDWrWfu3y3Xws8ZFyjqry3KFW5Xr18Jr4kGa1Y yF4jqF9ruwn0v3DanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUU9j14x267AKxVW8JVW5JwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26w1j6s0DM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26rxl 6s0DM28EF7xvwVC2z280aVAFwI0_GcCE3s1l84ACjcxK6I8E87Iv6xkF7I0E14v26rxl6s 0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xII jxv20xvE14v26r1j6r18McIj6I8E87Iv67AKxVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr0_Gr 1lF7xvr2IYc2Ij64vIr41lF7I21c0EjII2zVCS5cI20VAGYxC7M4IIrI8v6xkF7I0E8cxa n2IY04v7MxkF7I0En4kS14v26r1q6r43MxAIw28IcxkI7VAKI48JMxC20s026xCaFVCjc4 AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr4lx2IqxVCjr7xvwVAFwI0_JrI_JrWlx4CE 17CEb7AF67AKxVWUtVW8ZwCIc40Y0x0EwIxGrwCI42IY6xIIjxv20xvE14v26r1j6r1xMI IF0xvE2Ix0cI8IcVCY1x0267AKxVW8JVWxJwCI42IY6xAIw20EY4v20xvaj40_Jr0_JF4l IxAIcVC2z280aVAFwI0_Jr0_Gr1lIxAIcVC2z280aVCY1x0267AKxVW8JVW8JrUvcSsGvf C2KfnxnUUI43ZEXa7VUbGQ6JUUUUU== X-CM-SenderInfo: 5fkxw35dqj1xlqj6x0hvsx2hhfrp/ X-CM-DELIVERINFO: =?B?WZlWr5RRTeOiUs3aOqHZ50hzsfHKF9Ds6CbXmDm38RucXu3DYXJR7Zlh9zE0nt/Iac D+Kd7qCoyzVvXU23E45gA/UozU+vTWs0UaMZjN3SDVnrRYOZ4d5fZaq5YsE8h+Y6TFhwys rNxsp/VnNVvUSEPN9bo= Content-Type: text/plain tUid: 20251103112308691f091018264b888eb3e7c243b9f925 X-Abuse-Reports-To: service@corp-email.com Abuse-Reports-To: service@corp-email.com X-Complaints-To: service@corp-email.com X-Report-Abuse-To: service@corp-email.com The original comments contained spelling errors and incomplete logical descriptions, which could easily lead to misunderstandings of the code logic. The specific modifications are as follows: Correct the spelling error by changing "inut max" to "but not exceed the maximum limit"; Add the note "If the user has not specified a value, the default maximum limit is 8" to clarify the default value logic; Improve the coherence of the statement to make the queue quantity rules clearer. After the modification, the comments can accurately reflect the code behavior of "taking the smaller value between the number of CPUs and the default maximum limit of 8 for the number of queues", enhancing code maintainability. Signed-off-by: Chu Guangqing --- drivers/net/xen-netfront.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/net/xen-netfront.c b/drivers/net/xen-netfront.c index a11a0e949400..7c2220366623 100644 --- a/drivers/net/xen-netfront.c +++ b/drivers/net/xen-netfront.c @@ -2696,8 +2696,9 @@ static int __init netif_init(void) pr_info("Initialising Xen virtual ethernet driver\n"); - /* Allow as many queues as there are CPUs inut max. 8 if user has not - * specified a value. + /* Allow the number of queues to match the number of CPUs, but not exceed + * the maximum limit. If the user has not specified a value, the default + * maximum limit is 8. */ if (xennet_max_queues == 0) xennet_max_queues = min_t(unsigned int, MAX_QUEUES_DEFAULT, -- 2.43.7 From xen-devel-bounces@lists.xenproject.org Mon Nov 03 09:47:43 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 03 Nov 2025 09:47:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155268.1484773 (Exim 4.92) (envelope-from ) id 1vFr9u-0008TH-0x; Mon, 03 Nov 2025 09:47:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155268.1484773; Mon, 03 Nov 2025 09:47:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFr9t-0008TA-UM; Mon, 03 Nov 2025 09:47:29 +0000 Received: by outflank-mailman (input) for mailman id 1155268; Mon, 03 Nov 2025 09:47:28 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFr9s-0008T4-Kk for xen-devel@lists.xenproject.org; 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charset=utf-8 Content-Transfer-Encoding: quoted-printable Le 31/10/2025 =C3=A0 22:24, Grygorii Strashko a =C3=A9crit=C2=A0: > From: Grygorii Strashko > > The VMTRACE feature depends on Platform/Arch HW and code support and now > can be used only on x86 HVM with Intel VT-x (INTEL_VMX) enabled. > This makes VMTRACE support optional by introducing two Kconfig options: > - CONFIG_HAS_VMTRACE which allows Platform/Arch to advertise VMTRACE > support readiness > - CONFIG_VMTRACE to enable/disable the feature. > I like the idea of making it optional since it's only used in specific contexts. > Signed-off-by: Grygorii Strashko > --- > Based on top of patch "domain: adjust soft-reset arch dependency" [1] > > [1] https://patchwork.kernel.org/project/xen-devel/patch/c9c8c9c6-a155-49= 86-bf77-5766cdcd6024@suse.com/ > > xen/Kconfig.debug | 15 +++++++++++++++ > xen/arch/x86/domctl.c | 4 ++++ > xen/arch/x86/hvm/Kconfig | 1 + > xen/arch/x86/hvm/vmx/vmcs.c | 2 ++ > xen/arch/x86/hvm/vmx/vmx.c | 10 ++++++++++ > xen/arch/x86/include/asm/guest-msr.h | 2 ++ > xen/arch/x86/include/asm/hvm/hvm.h | 9 +++++++++ > xen/arch/x86/include/asm/hvm/vmx/vmcs.h | 2 ++ > xen/arch/x86/mm/mem_sharing.c | 2 ++ > xen/arch/x86/vm_event.c | 6 ++++-- > xen/common/domain.c | 10 ++++++++++ > xen/common/memory.c | 6 ++++++ > xen/common/vm_event.c | 3 ++- > xen/include/xen/domain.h | 4 ++++ > xen/include/xen/sched.h | 4 ++++ > 15 files changed, 77 insertions(+), 3 deletions(-) > > diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug > index d900d926c555..70ec4f0d14a5 100644 > --- a/xen/Kconfig.debug > +++ b/xen/Kconfig.debug > @@ -155,4 +155,19 @@ config DEBUG_INFO > =09 "make install-xen" for installing xen.efi, stripping needs to be > =09 done outside the Xen build environment). > > +config HAS_VMTRACE > + bool > + > +config VMTRACE > + bool "HW VM tracing support" > + depends on HAS_VMTRACE > + default y > + help > + Enables HW VM tracing support which allows to configure HW process= or > + features (vmtrace_op) to enable capturing information about softwa= re > + execution using dedicated hardware facilities with minimal interfe= rence > + to the software being traced. The trace date can be retrieved usin= g buffer > + shared between Xen and domain > + (see XENMEM_acquire_resource(XENMEM_resource_vmtrace_buf)). > + > endmenu > diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c > index 6153e3c07e2d..d9521808dcba 100644 > --- a/xen/arch/x86/domctl.c > +++ b/xen/arch/x86/domctl.c > @@ -154,6 +154,7 @@ void arch_get_domain_info(const struct domain *d, > static int do_vmtrace_op(struct domain *d, struct xen_domctl_vmtrace_op= *op, > XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl) > { > +#ifdef CONFIG_VMTRACE > struct vcpu *v; > int rc; > > @@ -198,6 +199,9 @@ static int do_vmtrace_op(struct domain *d, struct xen= _domctl_vmtrace_op *op, > vcpu_unpause(v); > > return rc; > +#else > + return -EOPNOTSUPP; > +#endif > } > > #define MAX_IOPORTS 0x10000 > diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig > index c1a131d1851a..c017a77fffe0 100644 > --- a/xen/arch/x86/hvm/Kconfig > +++ b/xen/arch/x86/hvm/Kconfig > @@ -29,6 +29,7 @@ config INTEL_VMX > =09bool "Intel VT-x" if EXPERT > =09default INTEL > =09select ARCH_VCPU_IOREQ_COMPLETION > +=09select HAS_VMTRACE > =09help > =09 Enables virtual machine extensions on platforms that implement the > =09 Intel Virtualization Technology (Intel VT-x). > diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c > index ab8b1c87ec0f..3728a9140223 100644 > --- a/xen/arch/x86/hvm/vmx/vmcs.c > +++ b/xen/arch/x86/hvm/vmx/vmcs.c > @@ -300,6 +300,7 @@ static int vmx_init_vmcs_config(bool bsp) > rdmsrl(MSR_IA32_VMX_MISC, _vmx_misc_cap); > > /* Check whether IPT is supported in VMX operation. */ > +#ifdef CONFIG_VMTRACE > if ( bsp ) > vmtrace_available =3D cpu_has_proc_trace && > (_vmx_misc_cap & VMX_MISC_PROC_TRACE); > @@ -310,6 +311,7 @@ static int vmx_init_vmcs_config(bool bsp) > smp_processor_id()); > return -EINVAL; > } > +#endif > > if ( caps.cpu_based_exec_control & CPU_BASED_ACTIVATE_SECONDARY_CON= TROLS ) > { > diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c > index b65981077295..f1588cd90b2d 100644 > --- a/xen/arch/x86/hvm/vmx/vmx.c > +++ b/xen/arch/x86/hvm/vmx/vmx.c > @@ -622,6 +622,7 @@ static void cf_check domain_creation_finished(struct = domain *d) > > static void vmx_init_ipt(struct vcpu *v) > { > +#ifdef CONFIG_VMTRACE > unsigned int size =3D v->domain->vmtrace_size; > > if ( !size ) > @@ -632,6 +633,7 @@ static void vmx_init_ipt(struct vcpu *v) > ASSERT(size >=3D PAGE_SIZE && (size & (size - 1)) =3D=3D 0); > > v->arch.msrs->rtit.output_limit =3D size - 1; > +#endif > } > > static int cf_check vmx_vcpu_initialise(struct vcpu *v) > @@ -724,11 +726,13 @@ static void vmx_save_guest_msrs(struct vcpu *v) > */ > v->arch.hvm.vmx.shadow_gs =3D read_gs_shadow(); > > +#ifdef CONFIG_VMTRACE > if ( v->arch.hvm.vmx.ipt_active ) > { > rdmsrl(MSR_RTIT_OUTPUT_MASK, msrs->rtit.output_mask); > rdmsrl(MSR_RTIT_STATUS, msrs->rtit.status); > } > +#endif > > if ( cp->feat.pks ) > msrs->pkrs =3D rdpkrs_and_cache(); > @@ -747,12 +751,14 @@ static void vmx_restore_guest_msrs(struct vcpu *v) > if ( cpu_has_msr_tsc_aux ) > wrmsr_tsc_aux(msrs->tsc_aux); > > +#ifdef CONFIG_VMTRACE > if ( v->arch.hvm.vmx.ipt_active ) > { > wrmsrl(MSR_RTIT_OUTPUT_BASE, page_to_maddr(v->vmtrace.pg)); > wrmsrl(MSR_RTIT_OUTPUT_MASK, msrs->rtit.output_mask); > wrmsrl(MSR_RTIT_STATUS, msrs->rtit.status); > } > +#endif > > if ( cp->feat.pks ) > wrpkrs(msrs->pkrs); > @@ -2626,6 +2632,7 @@ static bool cf_check vmx_get_pending_event( > return true; > } > > +#ifdef CONFIG_VMTRACE > /* > * We only let vmtrace agents see and modify a subset of bits in MSR_RT= IT_CTL. > * These all pertain to data-emitted into the trace buffer(s). Must no= t > @@ -2768,6 +2775,7 @@ static int cf_check vmtrace_reset(struct vcpu *v) > v->arch.msrs->rtit.status =3D 0; > return 0; > } > +#endif > > static uint64_t cf_check vmx_get_reg(struct vcpu *v, unsigned int reg) > { > @@ -2940,11 +2948,13 @@ static struct hvm_function_table __initdata_cf_cl= obber vmx_function_table =3D { > .altp2m_vcpu_emulate_ve =3D vmx_vcpu_emulate_ve, > .altp2m_vcpu_emulate_vmfunc =3D vmx_vcpu_emulate_vmfunc, > #endif > +#ifdef CONFIG_VMTRACE > .vmtrace_control =3D vmtrace_control, > .vmtrace_output_position =3D vmtrace_output_position, > .vmtrace_set_option =3D vmtrace_set_option, > .vmtrace_get_option =3D vmtrace_get_option, > .vmtrace_reset =3D vmtrace_reset, > +#endif > > .get_reg =3D vmx_get_reg, > .set_reg =3D vmx_set_reg, > diff --git a/xen/arch/x86/include/asm/guest-msr.h b/xen/arch/x86/include/= asm/guest-msr.h > index 5f0cb0a93995..702f47fe1e16 100644 > --- a/xen/arch/x86/include/asm/guest-msr.h > +++ b/xen/arch/x86/include/asm/guest-msr.h > @@ -50,6 +50,7 @@ struct vcpu_msrs > }; > } misc_features_enables; > > +#ifdef CONFIG_VMTRACE > /* > * 0x00000560 ... 57x - MSR_RTIT_* > * > @@ -81,6 +82,7 @@ struct vcpu_msrs > }; > }; > } rtit; > +#endif > > /* > * 0x000006e1 - MSR_PKRS - Protection Key Supervisor. > diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/as= m/hvm/hvm.h > index 7412256a2dab..728b9624522f 100644 > --- a/xen/arch/x86/include/asm/hvm/hvm.h > +++ b/xen/arch/x86/include/asm/hvm/hvm.h > @@ -234,12 +234,14 @@ struct hvm_function_table { > int (*altp2m_vcpu_emulate_vmfunc)(const struct cpu_user_regs *regs)= ; > #endif > > +#ifdef CONFIG_VMTRACE > /* vmtrace */ > int (*vmtrace_control)(struct vcpu *v, bool enable, bool reset); > int (*vmtrace_output_position)(struct vcpu *v, uint64_t *pos); > int (*vmtrace_set_option)(struct vcpu *v, uint64_t key, uint64_t va= lue); > int (*vmtrace_get_option)(struct vcpu *v, uint64_t key, uint64_t *v= alue); > int (*vmtrace_reset)(struct vcpu *v); > +#endif > > uint64_t (*get_reg)(struct vcpu *v, unsigned int reg); > void (*set_reg)(struct vcpu *v, unsigned int reg, uint64_t val); > @@ -738,6 +740,7 @@ static inline bool altp2m_vcpu_emulate_ve(struct vcpu= *v) > bool altp2m_vcpu_emulate_ve(struct vcpu *v); > #endif /* CONFIG_ALTP2M */ > > +#ifdef CONFIG_VMTRACE > static inline int hvm_vmtrace_control(struct vcpu *v, bool enable, bool= reset) > { > if ( hvm_funcs.vmtrace_control ) > @@ -780,6 +783,12 @@ static inline int hvm_vmtrace_reset(struct vcpu *v) > > return -EOPNOTSUPP; > } > +#else > +static inline int hvm_vmtrace_reset(struct vcpu *v) > +{ > + return 0; > +} > +#endif > > /* > * Accessors for registers which have per-guest-type or per-vendor loca= tions > diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h b/xen/arch/x86/inclu= de/asm/hvm/vmx/vmcs.h > index 8ff7c8045fc6..d28a2682e9df 100644 > --- a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h > +++ b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h > @@ -155,7 +155,9 @@ struct vmx_vcpu { > bool ept_spurious_misconfig; > > /* Processor Trace configured and enabled for the vcpu. */ > +#ifdef CONFIG_VMTRACE > bool ipt_active; > +#endif > > /* Is the guest in real mode? */ > uint8_t vmx_realmode; > diff --git a/xen/arch/x86/mm/mem_sharing.c b/xen/arch/x86/mm/mem_sharing.= c > index 4787b2796479..074f1b2562b3 100644 > --- a/xen/arch/x86/mm/mem_sharing.c > +++ b/xen/arch/x86/mm/mem_sharing.c > @@ -1888,7 +1888,9 @@ static int fork(struct domain *cd, struct domain *d= ) > domain_pause(d); > cd->max_pages =3D d->max_pages; > *cd->arch.cpu_policy =3D *d->arch.cpu_policy; > +#ifdef CONFIG_VMTRACE > cd->vmtrace_size =3D d->vmtrace_size; > +#endif > cd->parent =3D d; > } > > diff --git a/xen/arch/x86/vm_event.c b/xen/arch/x86/vm_event.c > index fc349270b9c5..f4c8696ce54e 100644 > --- a/xen/arch/x86/vm_event.c > +++ b/xen/arch/x86/vm_event.c > @@ -253,7 +253,9 @@ void vm_event_fill_regs(vm_event_request_t *req) > req->data.regs.x86.shadow_gs =3D ctxt.shadow_gs; > req->data.regs.x86.dr6 =3D ctxt.dr6; > > +#ifdef CONFIG_VMTRACE > if ( hvm_vmtrace_output_position(curr, &req->data.regs.x86.vmtrace_= pos) !=3D 1 ) > +#endif > req->data.regs.x86.vmtrace_pos =3D ~0; This if-def looks very oddly placed. > #endif > } > @@ -303,12 +305,12 @@ void vm_event_emulate_check(struct vcpu *v, vm_even= t_response_t *rsp) > #endif > } > > +#ifdef CONFIG_VMTRACE > void vm_event_reset_vmtrace(struct vcpu *v) > { > -#ifdef CONFIG_HVM > hvm_vmtrace_reset(v); > -#endif > } > +#endif > > /* > * Local variables: > diff --git a/xen/common/domain.c b/xen/common/domain.c > index 7dcd466e5a12..2be6ee03d004 100644 > --- a/xen/common/domain.c > +++ b/xen/common/domain.c > @@ -136,7 +136,9 @@ struct vcpu *idle_vcpu[NR_CPUS] __read_mostly; > > vcpu_info_t dummy_vcpu_info; > > +#ifdef CONFIG_VMTRACE > bool __read_mostly vmtrace_available; > +#endif > > bool __read_mostly vpmu_is_available; > > @@ -318,6 +320,7 @@ static void vcpu_info_reset(struct vcpu *v) > > static void vmtrace_free_buffer(struct vcpu *v) > { > +#ifdef CONFIG_VMTRACE > const struct domain *d =3D v->domain; > struct page_info *pg =3D v->vmtrace.pg; > unsigned int i; > @@ -332,10 +335,12 @@ static void vmtrace_free_buffer(struct vcpu *v) > put_page_alloc_ref(&pg[i]); > put_page_and_type(&pg[i]); > } > +#endif > } > > static int vmtrace_alloc_buffer(struct vcpu *v) > { > +#ifdef CONFIG_VMTRACE > struct domain *d =3D v->domain; > struct page_info *pg; > unsigned int i; > @@ -377,6 +382,9 @@ static int vmtrace_alloc_buffer(struct vcpu *v) > } > > return -ENODATA; > +#else > + return 0; > +#endif > } > > /* > @@ -825,7 +833,9 @@ struct domain *domain_create(domid_t domid, > ASSERT(!config->altp2m.nr); > #endif > > +#ifdef CONFIG_VMTRACE > d->vmtrace_size =3D config->vmtrace_size; > +#endif > } > > /* Sort out our idea of is_control_domain(). */ > diff --git a/xen/common/memory.c b/xen/common/memory.c > index 3688e6dd5032..66dc7f7a0a41 100644 > --- a/xen/common/memory.c > +++ b/xen/common/memory.c > @@ -1155,8 +1155,10 @@ static unsigned int resource_max_frames(const stru= ct domain *d, > case XENMEM_resource_ioreq_server: > return ioreq_server_max_frames(d); > > +#ifdef CONFIG_VMTRACE > case XENMEM_resource_vmtrace_buf: > return d->vmtrace_size >> PAGE_SHIFT; > +#endif > > default: > return 0; > @@ -1198,6 +1200,7 @@ static int acquire_ioreq_server(struct domain *d, > #endif > } > > +#ifdef CONFIG_VMTRACE > static int acquire_vmtrace_buf( > struct domain *d, unsigned int id, unsigned int frame, > unsigned int nr_frames, xen_pfn_t mfn_list[]) > @@ -1220,6 +1223,7 @@ static int acquire_vmtrace_buf( > > return nr_frames; > } > +#endif > Given that vmtrace feature is fairly isolated in VMX code, wouldn't it be better to move all vmtrace related functions (including vmx_init_ipt) in a separate vmtrace.c file and make such file gated behind CONFIG_VMTRACE ? > /* > * Returns -errno on error, or positive in the range [1, nr_frames] on > @@ -1238,8 +1242,10 @@ static int _acquire_resource( > case XENMEM_resource_ioreq_server: > return acquire_ioreq_server(d, id, frame, nr_frames, mfn_list); > > +#ifdef CONFIG_VMTRACE > case XENMEM_resource_vmtrace_buf: > return acquire_vmtrace_buf(d, id, frame, nr_frames, mfn_list); > +#endif > > default: > ASSERT_UNREACHABLE(); > diff --git a/xen/common/vm_event.c b/xen/common/vm_event.c > index b2787c010890..cf0258223f50 100644 > --- a/xen/common/vm_event.c > +++ b/xen/common/vm_event.c > @@ -441,7 +441,8 @@ static int vm_event_resume(struct domain *d, struct v= m_event_domain *ved) > if ( rsp.flags & VM_EVENT_FLAG_GET_NEXT_INTERRUPT ) > vm_event_monitor_next_interrupt(v); > > - if ( rsp.flags & VM_EVENT_FLAG_RESET_VMTRACE ) > + if ( IS_ENABLED(CONFIG_VMTRACE) && > + (rsp.flags & VM_EVENT_FLAG_RESET_VMTRACE) ) > vm_event_reset_vmtrace(v); > > if ( rsp.flags & VM_EVENT_FLAG_VCPU_PAUSED ) > diff --git a/xen/include/xen/domain.h b/xen/include/xen/domain.h > index 8aab05ae93c8..aa86a9f46022 100644 > --- a/xen/include/xen/domain.h > +++ b/xen/include/xen/domain.h > @@ -191,7 +191,11 @@ void vnuma_destroy(struct vnuma_info *vnuma); > static inline void vnuma_destroy(struct vnuma_info *vnuma) { ASSERT(!vn= uma); } > #endif > > +#ifdef CONFIG_VMTRACE > extern bool vmtrace_available; > +#else > +#define vmtrace_available false > +#endif > > extern bool vpmu_is_available; > > diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h > index 02bdc256ce37..dcd8647e0d36 100644 > --- a/xen/include/xen/sched.h > +++ b/xen/include/xen/sched.h > @@ -300,9 +300,11 @@ struct vcpu > /* vPCI per-vCPU area, used to store data for long running operatio= ns. */ > struct vpci_vcpu vpci; > > +#ifdef CONFIG_VMTRACE > struct { > struct page_info *pg; /* One contiguous allocation of d->vmtrac= e_size */ > } vmtrace; > +#endif > > struct arch_vcpu arch; > > @@ -623,7 +625,9 @@ struct domain > unsigned int nr_altp2m; /* Number of altp2m tables. */ > #endif > > +#ifdef CONFIG_VMTRACE > unsigned int vmtrace_size; /* Buffer size in bytes, or 0 to disable= . */ > +#endif > > #ifdef CONFIG_ARGO > /* Argo interdomain communication support */ -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Mon Nov 03 10:11:26 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 03 Nov 2025 10:11:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155281.1484782 (Exim 4.92) (envelope-from ) id 1vFrWx-0004Jb-Ut; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AM9PR03MB7526.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: f96cacb5-b1a4-4579-8fdf-08de1ac14f9b X-MS-Exchange-CrossTenant-originalarrivaltime: 03 Nov 2025 10:11:09.9664 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: ArE1IYK63kRnUoluVPuuuUfBxMoes/H0LSKqH3dFFqRpFddKgOJt4wqXdMHe/G4Vw7nNKbq7zj2xutX97KTXeLQ1SdnNQ4SV4m3nmULXjQ0= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS2PR03MB9224 The generic 'add_sized()' macro performs type-based pointer casts, which violate MISRA C Rule 11.3 (cast between pointer to object type and pointer to a different object type). Replace the use of 'add_sized(&t->head, 1)' with the type-specific 'add_u16_sized(&t->head, 1)' in the 'spin_unlock_common()' function. A BUILD_BUG_ON(sizeof(t->head) !=3D sizeof(uint16_t)); check is added to ensure the field size matches expectations at build time. On RISC-V, the atomic addition function for 16-bit values was missing, causing build failures when called 'add_u16_sized()'. Generate a static inline implementation of 'add_u16_sized()' for uint16_t. Signed-off-by: Dmytro Prokopchuk --- Test CI pipeline: https://gitlab.com/xen-project/people/dimaprkp4k/xen/-/pipelines/2136333330 --- xen/arch/riscv/include/asm/atomic.h | 10 ++++++++++ xen/common/spinlock.c | 3 ++- 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/xen/arch/riscv/include/asm/atomic.h b/xen/arch/riscv/include/a= sm/atomic.h index 8e0425cea0..2676061725 100644 --- a/xen/arch/riscv/include/asm/atomic.h +++ b/xen/arch/riscv/include/asm/atomic.h @@ -111,6 +111,16 @@ static always_inline void _add_sized(volatile void *p, } } =20 +#define build_add_sized(name, type) \ +static inline void name(volatile type *addr, unsigned long val) \ +{ \ + volatile type *ptr =3D addr; = \ + write_atomic(ptr, read_atomic(ptr) + val); \ +} + +build_add_sized(add_u16_sized, uint16_t) +#undef build_add_sized + #define add_sized(p, x) \ ({ \ typeof(*(p)) x_ =3D (x); \ diff --git a/xen/common/spinlock.c b/xen/common/spinlock.c index 0389293b09..d9dc9998e6 100644 --- a/xen/common/spinlock.c +++ b/xen/common/spinlock.c @@ -367,7 +367,8 @@ static void always_inline spin_unlock_common(spinlock_t= ickets_t *t, LOCK_PROFILE_REL; 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> rel_lock(debug); > arch_lock_release_barrier(); > - add_sized(&t->head, 1); > + BUILD_BUG_ON(sizeof(t->head) != sizeof(uint16_t)); > + add_u16_sized(&t->head, 1); This is an example where MISRA's opinions actively making the logic less safe. It's not possible for add_sized() to use the wrong type (as it calculates it internally), whereas it's quite possible to update the BUILD_BUG_ON() and fail to adjust the add. Specifically, you've made it more complicated to reason about, and created an opportunity to make an unsafe change where that opportunity does not exist in the code as-is. Furthermore, read and write atomic have exactly the same internal pattern as add_sized(), so how does this not just kick the can down the road? ~Andrew From xen-devel-bounces@lists.xenproject.org Mon Nov 03 13:07:34 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 03 Nov 2025 13:07:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155307.1484803 (Exim 4.92) (envelope-from ) id 1vFuHJ-00080R-EB; Mon, 03 Nov 2025 13:07:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155307.1484803; Mon, 03 Nov 2025 13:07:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFuHJ-00080K-BH; Mon, 03 Nov 2025 13:07:21 +0000 Received: by outflank-mailman (input) for mailman id 1155307; Mon, 03 Nov 2025 13:07:20 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFuHI-00080E-65 for xen-devel@lists.xenproject.org; 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Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit On 2025-11-03 12:26, Andrew Cooper wrote: > On 03/11/2025 10:11 am, Dmytro Prokopchuk1 wrote: >> diff --git a/xen/common/spinlock.c b/xen/common/spinlock.c >> index 0389293b09..d9dc9998e6 100644 >> --- a/xen/common/spinlock.c >> +++ b/xen/common/spinlock.c >> @@ -367,7 +367,8 @@ static void always_inline >> spin_unlock_common(spinlock_tickets_t *t, >> LOCK_PROFILE_REL; >> rel_lock(debug); >> arch_lock_release_barrier(); >> - add_sized(&t->head, 1); >> + BUILD_BUG_ON(sizeof(t->head) != sizeof(uint16_t)); >> + add_u16_sized(&t->head, 1); > > This is an example where MISRA's opinions actively making the logic > less > safe. > > It's not possible for add_sized() to use the wrong type (as it > calculates it internally), whereas it's quite possible to update the > BUILD_BUG_ON() and fail to adjust the add. > I agree, we should devise a way to argue that the casts are safe and write a proper deviation. If I recall correctly, {read,write}_atomic have exactly the same issues. > Specifically, you've made it more complicated to reason about, and > created an opportunity to make an unsafe change where that opportunity > does not exist in the code as-is. > > Furthermore, read and write atomic have exactly the same internal > pattern as add_sized(), so how does this not just kick the can down the > road? > > ~Andrew -- Nicola Vetrini, B.Sc. Software Engineer BUGSENG (https://bugseng.com) LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253 From xen-devel-bounces@lists.xenproject.org Mon Nov 03 13:10:17 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 03 Nov 2025 13:10:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155317.1484814 (Exim 4.92) (envelope-from ) id 1vFuK7-00013S-Ts; Mon, 03 Nov 2025 13:10:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155317.1484814; Mon, 03 Nov 2025 13:10:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFuK7-00013L-Pg; Mon, 03 Nov 2025 13:10:15 +0000 Received: by outflank-mailman (input) for mailman id 1155317; Mon, 03 Nov 2025 13:10:14 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFuK6-00013D-Eh for xen-devel@lists.xenproject.org; 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charset="Windows-1252" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: siemens.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: KL1PR0601MB4588.apcprd06.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 3993c0c8-18d2-4c15-284f-08de1ada4b38 X-MS-Exchange-CrossTenant-originalarrivaltime: 03 Nov 2025 13:09:59.9938 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 38ae3bcd-9579-4fd4-adda-b42e1495d55a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: BG7wIiK50vhWE5BZOoujh6NxgTYGEHsaYQ/pHOyyuas9g8tcqO7P/1h/J8lvPZnhUSXpj+wHgOz1Fu05OVjN0GXkwEkr2bivYdor7lJTchE= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SI6PR06MB7269 Hi,=0A= =0A= > To clarify, Xen is using the local TLB version. So it should be vmalls12e= 1.=0A= If I understood correctly, won't HCR_EL2.FB makes local TLB, a broadcast on= e?=0A= =0A= Mohamed mentioned this in earlier email:=0A= > If a core-local TLB invalidate was issued, this bit forces it to become a= broadcast, so that you don=92t have to worry about flushing TLBs when movi= ng a vCPU between different pCPUs. KVM operates with this bit set.=0A= =0A= Can you explain in what scenario exactly, can we use vmalle1?=0A= =0A= > Before going into batching, do you have any data showing how often XENMEM= _remove_from_physmap is called in your setup? Similar, I would be intereste= d to know the number of TLBs flush within one hypercalls and whether the re= gions unmapped were contiguous.=0A= The number of times XENMEM_remove_from_physmap is invoked depends upon the = size of each binary. Each hypercall invokes TLB instruction once. If I use = persistent rootfs, then this hypercall is invoked almost 7458 times (+8 app= rox) which is equal to sum of kernel and DTB image pages:=0A= domainbuilder: detail: xc_dom_alloc_segment: kernel : 0x40000000 ->= 0x41d1f200 (pfn 0x40000 + 0x1d20 pages)=0A= domainbuilder: detail: xc_dom_alloc_segment: devicetree : 0x48000000 ->= 0x4800188d (pfn 0x48000 + 0x2 pages)=0A= =0A= And if I use ramdisk image, then this hypercall is invoked almost 222815 ti= mes (+8 approx) which is equal to sum of kernel, ramdisk and DTB image 4k p= ages.=0A= domainbuilder: detail: xc_dom_alloc_segment: kernel : 0x40000000 ->= 0x41d1f200 (pfn 0x40000 + 0x1d20 pages)=0A= domainbuilder: detail: xc_dom_alloc_segment: module0 : 0x48000000 ->= 0x7c93d000 (pfn 0x48000 + 0x3493d pages)=0A= domainbuilder: detail: xc_dom_alloc_segment: devicetree : 0x7c93d000 ->= 0x7c93e8d9 (pfn 0x7c93d + 0x2 pages)=0A= =0A= You can see the address ranges in above logs, the addresses seem contiguous= in this address space and at best we can reduce the number of calls to 3, = each at the end of every image when removed from physmap.=0A= =0A= > we may still send a few TLBs because:=0A= > * We need to avoid long-running operations, so the hypercall may restart.= So we will have to flush at mininum before every restart=0A= > * The current way we handle batching is we will process one item at the t= ime. As this may free memory (either leaf or intermediate page-tables), we = will need to flush the TLBs first to prevent the domain accessing the wrong= memory. This could be solved by keeping track of the list of memory to fre= e. But this is going to require some work and I am not entirely sure this i= s worth it at the moment.=0A= I think now you have the figure that 222815 TLBs are too much and a few TLB= s would still be a lot better. TLBs less than 10 are not much noticeable.= =0A= =0A= > We could use a series of TLBI IPAS2E1IS which I think is what TLBI range = is meant to replace (so long the addresses are contiguous in the given spac= e).=0A= Isn't IPAS2E1IS a range tlbi instruction? My understanding is that this ins= truction is available on processors with range TLBI support, I could be wro= ng. I saw its KVM emulation which does full invalidation if range TLBI is n= ot supported (https://github.com/torvalds/linux/blob/master/arch/arm64/kvm/= hyp/pgtable.c#L647).=0A= =0A= > On the KVM side, it would be worth looking at whether the implementation = can be optimized. Is this really walking block by block? Can it skip over l= arge hole (e.g. if we know a level 1 entry doesn't exist, then we can incre= ment by 1GB).=0A= Yes, this should also be looked from KVM side. I think to solve this proble= m, we need this optimized on both places in Xen and in KVM because Xen is i= nvoking this instruction too many times and unless KVM can provide performa= nce close to bare-metal tlbi, this would still be a problem.=0A= =0A= Regards,=0A= Haseeb= From xen-devel-bounces@lists.xenproject.org Mon Nov 03 13:17:01 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 03 Nov 2025 13:17:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155327.1484823 (Exim 4.92) (envelope-from ) id 1vFuQa-0001gv-HM; Mon, 03 Nov 2025 13:16:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155327.1484823; Mon, 03 Nov 2025 13:16:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFuQa-0001go-ED; Mon, 03 Nov 2025 13:16:56 +0000 Received: by outflank-mailman (input) for mailman id 1155327; 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Message-ID: <5df30dbf-17a2-446f-83f9-0e4468622917@epam.com> Date: Mon, 3 Nov 2025 14:16:40 +0100 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 00/20] Add SMMUv3 Stage 1 Support for XEN guests From: Milan Djokic To: Volodymyr Babchuk , Julien Grall Cc: Julien Grall , "xen-devel@lists.xenproject.org" , Bertrand Marquis , Rahul Singh , Stefano Stabellini , Michal Orzel , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Nick Rosbrook , George Dunlap , Juergen Gross , Andrew Cooper References: <12ba4388-ee23-4e17-910f-9702271865ad@epam.com> <87v7m93bo0.fsf@epam.com> <6c80a929-8139-4461-b11c-e6ac67c3d2e4@epam.com> <875xe6ytyk.fsf@epam.com> <65727710-0a88-4fff-bb5b-9cf34106833c@epam.com> Content-Language: en-US In-Reply-To: <65727710-0a88-4fff-bb5b-9cf34106833c@epam.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: VIZP296CA0006.AUTP296.PROD.OUTLOOK.COM (2603:10a6:800:2a1::7) To AS8PR03MB8322.eurprd03.prod.outlook.com (2603:10a6:20b:509::16) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AS8PR03MB8322:EE_|AS4PR03MB8747:EE_ X-MS-Office365-Filtering-Correlation-Id: c88eb403-e7fa-4023-a046-08de1adb3b33 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|7416014|376014|1800799024|3122999009; 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But I have >> more questions. >> >> Milan Djokic writes: >> >>> Hello Julien, Volodymyr >>> >>> On 8/27/25 01:28, Volodymyr Babchuk wrote: >>>> Hi Milan, >>>> Milan Djokic writes: >>>> >>>>> Hello Julien, >>>>> >>>>> On 8/13/25 14:11, Julien Grall wrote: >>>>>> On 13/08/2025 11:04, Milan Djokic wrote: >>>>>>> Hello Julien, >>>>>> Hi Milan, >>>>>> >>>>>>> >>>>>>> We have prepared a design document and it will be part of the updated >>>>>>> patch series (added in docs/design). I'll also extend cover letter with >>>>>>> details on implementation structure to make review easier. >>>>>> I would suggest to just iterate on the design document for now. >>>>>> >>>>>>> Following is the design document content which will be provided in >>>>>>> updated patch series: >>>>>>> >>>>>>> Design Proposal: Add SMMUv3 Stage-1 Support for XEN Guests >>>>>>> ========================================================== >>>>>>> >>>>>>> Author: Milan Djokic >>>>>>> Date:   2025-08-07 >>>>>>> Status: Draft >>>>>>> >>>>>>> Introduction >>>>>>> ------------ >>>>>>> >>>>>>> The SMMUv3 supports two stages of translation. Each stage of translation >>>>>>> can be independently enabled. An incoming address is logically >>>>>>> translated from VA to IPA in stage 1, then the IPA is input to stage 2 >>>>>>> which translates the IPA to the output PA. Stage 1 translation support >>>>>>> is required to provide isolation between different devices within the OS. >>>>>>> >>>>>>> Xen already supports Stage 2 translation but there is no support for >>>>>>> Stage 1 translation. This design proposal outlines the introduction of >>>>>>> Stage-1 SMMUv3 support in Xen for ARM guests. >>>>>>> >>>>>>> Motivation >>>>>>> ---------- >>>>>>> >>>>>>> ARM systems utilizing SMMUv3 require Stage-1 address translation to >>>>>>> ensure correct and secure DMA behavior inside guests. >>>>>> Can you clarify what you mean by "correct"? DMA would still work >>>>>> without >>>>>> stage-1. >>>>> >>>>> Correct in terms of working with guest managed I/O space. I'll >>>>> rephrase this statement, it seems ambiguous. >>>>> >>>>>>> >>>>>>> This feature enables: >>>>>>> - Stage-1 translation in guest domain >>>>>>> - Safe device passthrough under secure memory translation >>>>>>> >>>>>>> Design Overview >>>>>>> --------------- >>>>>>> >>>>>>> These changes provide emulated SMMUv3 support: >>>>>>> >>>>>>> - SMMUv3 Stage-1 Translation: stage-1 and nested translation support in >>>>>>>   SMMUv3 driver >>>>>>> - vIOMMU Abstraction: virtual IOMMU framework for guest Stage-1 handling >>>>>> So what are you planning to expose to a guest? Is it one vIOMMU per >>>>>> pIOMMU? Or a single one? >>>>> >>>>> Single vIOMMU model is used in this design. >>>>> >>>>>> Have you considered the pros/cons for both? >>>>>>> - Register/Command Emulation: SMMUv3 register emulation and command >>>>>>>   queue handling >>>>>> >>>>> >>>>> That's a point for consideration. >>>>> single vIOMMU prevails in terms of less complex implementation and a >>>>> simple guest iommmu model - single vIOMMU node, one interrupt path, >>>>> event queue, single set of trap handlers for emulation, etc. >>>>> Cons for a single vIOMMU model could be less accurate hw >>>>> representation and a potential bottleneck with one emulated queue and >>>>> interrupt path. >>>>> On the other hand, vIOMMU per pIOMMU provides more accurate hw >>>>> modeling and offers better scalability in case of many IOMMUs in the >>>>> system, but this comes with more complex emulation logic and device >>>>> tree, also handling multiple vIOMMUs on guest side. >>>>> IMO, single vIOMMU model seems like a better option mostly because >>>>> it's less complex, easier to maintain and debug. Of course, this >>>>> decision can and should be discussed. >>>>> >>>> Well, I am not sure that this is possible, because of StreamID >>>> allocation. The biggest offender is of course PCI, as each Root PCI >>>> bridge will require own SMMU instance with own StreamID space. But even >>>> without PCI you'll need some mechanism to map vStremID to >>>> , because there will be overlaps in SID space. >>>> Actually, PCI/vPCI with vSMMU is its own can of worms... >>>> >>>>>> For each pSMMU, we have a single command queue that will receive command >>>>>> from all the guests. How do you plan to prevent a guest hogging the >>>>>> command queue? >>>>>> In addition to that, AFAIU, the size of the virtual command queue is >>>>>> fixed by the guest rather than Xen. If a guest is filling up the queue >>>>>> with commands before notifying Xen, how do you plan to ensure we don't >>>>>> spend too much time in Xen (which is not preemptible)? >>>>>> >>>>> >>>>> We'll have to do a detailed analysis on these scenarios, they are not >>>>> covered by the design (as well as some others which is clear after >>>>> your comments). I'll come back with an updated design. >>>> I think that can be handled akin to hypercall continuation, which is >>>> used in similar places, like P2M code >>>> [...] >>>> >>> >>> I have updated vIOMMU design document with additional security topics >>> covered and performance impact results. Also added some additional >>> explanations for vIOMMU components following your comments. >>> Updated document content: >>> >>> =============================================== >>> Design Proposal: Add SMMUv3 Stage-1 Support for XEN Guests >>> =============================================== >>> >>> :Author: Milan Djokic >>> :Date: 2025-08-07 >>> :Status: Draft >>> >>> Introduction >>> ======== >>> >>> The SMMUv3 supports two stages of translation. Each stage of >>> translation can be >>> independently enabled. An incoming address is logically translated >>> from VA to >>> IPA in stage 1, then the IPA is input to stage 2 which translates the IPA to >>> the output PA. Stage 1 translation support is required to provide >>> isolation between different >>> devices within OS. XEN already supports Stage 2 translation but there is no >>> support for Stage 1 translation. >>> This design proposal outlines the introduction of Stage-1 SMMUv3 >>> support in Xen for ARM guests. >>> >>> Motivation >>> ========== >>> >>> ARM systems utilizing SMMUv3 require stage-1 address translation to >>> ensure secure DMA and guest managed I/O memory mappings. >> >> It is unclear for my what you mean by "guest manged IO memory mappings", >> could you please provide an example? >> > > Basically enabling stage-1 translation means that the guest is > responsible for managing IOVA to IPA mappings through its own IOMMU > driver. Guest manages its own stage-1 page tables and TLB. > For example, when a guest driver wants to perform DMA mapping (e.g. with > dma_map_single()), it will request mapping of its buffer physical > address to IOVA through guest IOMMU driver. Guest IOMMU driver will > further issue mapping commands emulated by Xen which translate it into > stage-2 mappings. > >>> This feature enables: >>> >>> - Stage-1 translation in guest domain >>> - Safe device passthrough under secure memory translation >>> >> >> As I see it, ARM specs use "secure" mostly when referring to Secure mode >> (S-EL1, S-EL2, EL3) and associated secure counterparts of architectural >> devices, like secure GIC, secure Timer, etc. So I'd probably don't use >> this word here to reduce confusion >> > > Sure, secure in terms of isolation is the topic here. I'll rephrase this > >>> Design Overview >>> =============== >>> >>> These changes provide emulated SMMUv3 support: >>> >>> - **SMMUv3 Stage-1 Translation**: stage-1 and nested translation >>> support in SMMUv3 driver. >> >> "Nested translation" as in "nested virtualization"? Or is this something else? >> > > No, this refers to 2-stage translation IOVA->IPA->PA as a nested > translation. Although with this feature, nested virtualization is also > enabled since guest can emulate its own IOMMU e.g. when kvm is run in guest. > > >>> - **vIOMMU Abstraction**: Virtual IOMMU framework for guest stage-1 >>> handling. >> >> I think, this is the big topic. You see, apart from SMMU, there is >> at least Renesas IP-MMU, which uses completely different API. And >> probably there are other IO-MMU implementations possible. Right now >> vIOMMU framework handles only SMMU, which is okay, but probably we >> should design it in a such way, that other IO-MMUs will be supported as >> well. Maybe even IO-MMUs for other architectures (RISC V maybe?). >> > > I think that it is already designed in such manner. We have a generic > vIOMMU framework and a backend implementation for target IOMMU as > separate components. And the backend implements supported > commands/mechanisms which are specific for target IOMMU type. At this > point, only SMMUv3 is supported, but it is possible to implement other > IOMMU types support under the same generic framework. AFAIK, RISC-V > IOMMU stage-2 is still in early development stage, but I do believe that > it will be also compatible with vIOMMU framework. > >>> - **Register/Command Emulation**: SMMUv3 register emulation and >>> command queue handling. >> >> Continuing previous paragraph: what about other IO-MMUs? For example, if >> platform provides only Renesas IO-MMU, will vIOMMU framework still >> emulate SMMUv3 registers and queue handling? >> > > Yes, this is not supported in current implementation. To support other > IOMMU than SMMUv3, stage-1 emulation backend needs to be implemented for > target IOMMU and probably Xen driver for target IOMMU has to be updated > to handle stage-1 configuration. I will elaborate this part in the > design, to make clear that we have a generic vIOMMU framework, but only > SMMUv3 backend exists atm. > >>> - **Device Tree Extensions**: Adds `iommus` and virtual SMMUv3 nodes >>> to device trees for dom0 and dom0less scenarios. >>> - **Runtime Configuration**: Introduces a `viommu` boot parameter for >>> dynamic enablement. >>> >>> vIOMMU is exposed to guest as a single device with predefined >>> capabilities and commands supported. Single vIOMMU model abstracts the >>> details of an actual IOMMU hardware, simplifying usage from the guest >>> point of view. Guest OS handles only a single IOMMU, even if multiple >>> IOMMU units are available on the host system. >> >> In the previous email I asked how are you planning to handle potential >> SID overlaps, especially in PCI use case. I want to return to this >> topic. I am not saying that this is impossible, but I'd like to see this >> covered in the design document. >> > > Sorry, I've missed this part in the previous mail. This is a valid point, > SID overlapping would be an issue for a single vIOMMU model. To prevent > it, design will have to be extended with SID namespace virtualization, > introducing a remapping layer which will make sure that guest virtual > SIDs are unique and maintain proper mappings of vSIDs to pSIDs. > For PCI case, we need to have an extended remapping logic where > iommu-map property will be also patched in the guest device tree since > we need a range of unique vSIDs for every RC assigned to guest. > Alternative approach would be to switch to vIOMMU per pIOMMU model. > Since both approaches require major updates, I'll have to do a detailed > analysis and come back with an updated design which would address this > issue. > > >>> >>> Security Considerations >>> ======================= >>> >>> **viommu security benefits:** >>> >>> - Stage-1 translation ensures guest devices cannot perform unauthorized DMA. >>> - Emulated IOMMU removes guest dependency on IOMMU hardware while >>> maintaining domains isolation. >> >> I am not sure that I got this paragraph. >> > > First one refers to guest controlled DMA access. Only IOVA->IPA mappings > created by guest are usable by the device when stage-1 is enabled. On > the other hand, with stage-2 only enabled, device could access to > complete IOVA->PA mapping created by Xen for guest. Since the guest has > no control over device IOVA accesses, a malicious guest kernel could > potentially access memory regions it shouldn't be allowed to, e.g. if > stage-2 mappings are stale. With stage-1 enabled, guest device driver > has to explicitly map IOVAs and this request is propagated through > emulated IOMMU, making sure that IOVA mappings are valid all the time. > > Second claim means that with emulated IOMMU, guests don’t need direct > access to physical IOMMU hardware. The hypervisor emulates IOMMU > behavior for the guest, while still ensuring that memory access by > devices remains properly isolated between guests, just like it would > with real IOMMU hardware. > >>> >>> >>> 1. Observation: >>> --------------- >>> Support for Stage-1 translation in SMMUv3 introduces new data >>> structures (`s1_cfg` alongside `s2_cfg`) and logic to write both >>> Stage-1 and Stage-2 entries in the Stream Table Entry (STE), including >>> an `abort` field to handle partial configuration states. >>> >>> **Risk:** >>> Without proper handling, a partially applied Stage-1 configuration >>> might leave guest DMA mappings in an inconsistent state, potentially >>> enabling unauthorized access or causing cross-domain interference. >>> >>> **Mitigation:** *(Handled by design)* >>> This feature introduces logic that writes both `s1_cfg` and `s2_cfg` >>> to STE and manages the `abort` field-only considering Stage-1 >>> configuration if fully attached. This ensures incomplete or invalid >>> guest configurations are safely ignored by the hypervisor. >>> >>> 2. Observation: >>> --------------- >>> Guests can now invalidate Stage-1 caches; invalidation needs >>> forwarding to SMMUv3 hardware to maintain coherence. >>> >>> **Risk:** >>> Failing to propagate cache invalidation could allow stale mappings, >>> enabling access to old mappings and possibly data leakage or >>> misrouting. >>> >>> **Mitigation:** *(Handled by design)* >>> This feature ensures that guest-initiated invalidations are correctly >>> forwarded to the hardware, preserving IOMMU coherency. >>> >>> 3. Observation: >>> --------------- >>> This design introduces substantial new functionality, including the >>> `vIOMMU` framework, virtual SMMUv3 devices (`vsmmuv3`), command >>> queues, event queues, domain management, and Device Tree modifications >>> (e.g., `iommus` nodes and `libxl` integration). >>> >>> **Risk:** >>> Large feature expansions increase the attack surface—potential for >>> race conditions, unchecked command inputs, or Device Tree-based >>> misconfigurations. >>> >>> **Mitigation:** >>> >>> - Sanity checks and error-handling improvements have been introduced >>> in this feature. >>> - Further audits have to be performed for this feature and its >>> dependencies in this area. Currently, feature is marked as *Tech >>> Preview* and is self-contained, reducing the risk to unrelated >>> components. >>> >>> 4. Observation: >>> --------------- >>> The code includes transformations to handle nested translation versus >>> standard modes and uses guest-configured command queues (e.g., >>> `CMD_CFGI_STE`) and event notifications. >>> >>> **Risk:** >>> Malicious or malformed queue commands from guests could bypass >>> validation, manipulate SMMUv3 state, or cause Dom0 instability. >> >> Only Dom0? >> > > This is a mistake, the whole system could be affected. I'll fix this. > >>> >>> **Mitigation:** *(Handled by design)* >>> Built-in validation of command queue entries and sanitization >>> mechanisms ensure only permitted configurations are applied. This is >>> supported via additions in `vsmmuv3` and `cmdqueue` handling code. >>> >>> 5. Observation: >>> --------------- >>> Device Tree modifications enable device assignment and >>> configuration—guest DT fragments (e.g., `iommus`) are added via >>> `libxl`. >>> >>> **Risk:** >>> Erroneous or malicious Device Tree injection could result in device >>> misbinding or guest access to unauthorized hardware. >>> >>> **Mitigation:** >>> >>> - `libxl` perform checks of guest configuration and parse only >>> predefined dt fragments and nodes, reducing risc. >>> - The system integrator must ensure correct resource mapping in the >>> guest Device Tree (DT) fragments. >>> >>> 6. Observation: >>> --------------- >>> Introducing optional per-guest enabled features (`viommu` argument in >>> xl guest config) means some guests may opt-out. >>> >>> **Risk:** >>> Differences between guests with and without `viommu` may cause >>> unexpected behavior or privilege drift. >>> >>> **Mitigation:** >>> Verify that downgrade paths are safe and well-isolated; ensure missing >>> support doesn't cause security issues. Additional audits on emulation >>> paths and domains interference need to be performed in a multi-guest >>> environment. >>> >>> 7. Observation: >>> --------------- >>> Guests have the ability to issue Stage-1 IOMMU commands like cache >>> invalidation, stream table entries configuration, etc. An adversarial >>> guest may issue a high volume of commands in rapid succession. >>> >>> **Risk** >>> Excessive commands requests can cause high hypervisor CPU consumption >>> and disrupt scheduling, leading to degraded system responsiveness and >>> potential denial-of-service scenarios. >>> >>> **Mitigation** >>> >>> - Xen credit scheduler limits guest vCPU execution time, securing >>> basic guest rate-limiting. >> >> I don't thing that this feature available only in credit schedulers, >> AFAIK, all schedulers except null scheduler will limit vCPU execution time. >> > > I was not aware of that. I'll rephrase this part. > >>> - Batch multiple commands of same type to reduce overhead on the >>> virtual SMMUv3 hardware emulation. >>> - Implement vIOMMU commands execution restart and continuation support >> >> So, something like "hypercall continuation"? >> > > Yes > >>> >>> 8. Observation: >>> --------------- >>> Some guest commands issued towards vIOMMU are propagated to pIOMMU >>> command queue (e.g. TLB invalidate). For each pIOMMU, only one command >>> queue is >>> available for all domains. >>> >>> **Risk** >>> Excessive commands requests from abusive guest can cause flooding of >>> physical IOMMU command queue, leading to degraded pIOMMU responsivness >>> on commands issued from other guests. >>> >>> **Mitigation** >>> >>> - Xen credit scheduler limits guest vCPU execution time, securing >>> basic guest rate-limiting. >>> - Batch commands which should be propagated towards pIOMMU cmd queue >>> and enable support for batch execution pause/continuation >>> - If possible, implement domain penalization by adding a per-domain >>> cost counter for vIOMMU/pIOMMU usage. >>> >>> 9. Observation: >>> --------------- >>> vIOMMU feature includes event queue used for forwarding IOMMU events >>> to guest (e.g. translation faults, invalid stream IDs, permission >>> errors). A malicious guest can misconfigure its SMMU state or >>> intentionally trigger faults with high frequency. >>> >>> **Risk** >>> Occurance of IOMMU events with high frequency can cause Xen to flood >>> the event queue and disrupt scheduling with high hypervisor CPU load >>> for events handling. >>> >>> **Mitigation** >>> >>> - Implement fail-safe state by disabling events forwarding when faults >>> are occured with high frequency and not processed by guest. >>> - Batch multiple events of same type to reduce overhead on the virtual >>> SMMUv3 hardware emulation. >>> - Consider disabling event queue for untrusted guests >>> >>> Performance Impact >>> ================== >>> >>> With iommu stage-1 and nested translation inclusion, performance >>> overhead is introduced comparing to existing, stage-2 only usage in >>> Xen. >>> Once mappings are established, translations should not introduce >>> significant overhead. >>> Emulated paths may introduce moderate overhead, primarily affecting >>> device initialization and event handling. >>> Performance impact highly depends on target CPU capabilities. Testing >>> is performed on cortex-a53 based platform. >> >> Which platform exactly? While QEMU emulates SMMU to some extent, we are >> observing somewhat different SMMU behavior on real HW platforms (mostly >> due to cache coherence problems). Also, according to MMU-600 errata, it >> can have lower than expected performance in some use-cases. >> > > Performance measurement are done on QEMU emulated Renesas platform. I'll > add some details for this. > >>> Performance is mostly impacted by emulated vIOMMU operations, results >>> shown in the following table. >>> >>> +-------------------------------+---------------------------------+ >>> | vIOMMU Operation | Execution time in guest | >>> +===============================+=================================+ >>> | Reg read | median: 30μs, worst-case: 250μs | >>> +-------------------------------+---------------------------------+ >>> | Reg write | median: 35μs, worst-case: 280μs | >>> +-------------------------------+---------------------------------+ >>> | Invalidate TLB | median: 90μs, worst-case: 1ms+ | >>> +-------------------------------+---------------------------------+ >>> | Invalidate STE | median: 450μs worst_case: 7ms+ | >>> +-------------------------------+---------------------------------+ >>> >>> With vIOMMU exposed to guest, guest OS has to initialize IOMMU device >>> and configure stage-1 mappings for devices attached to it. >>> Following table shows initialization stages which impact stage-1 >>> enabled guest boot time and compares it with stage-1 disabled guest. >>> >>> "NOTE: Device probe execution time varies significantly depending on >>> device complexity. virtio-gpu was selected as a test case due to its >>> extensive use of dynamic DMA allocations and IOMMU mappings, making it >>> a suitable candidate for benchmarking stage-1 vIOMMU behavior." >>> >>> +---------------------+-----------------------+------------------------+ >>> | Stage | Stage-1 Enabled Guest | Stage-1 Disabled Guest | >>> +=====================+=======================+========================+ >>> | IOMMU Init | ~25ms | / | >>> +---------------------+-----------------------+------------------------+ >>> | Dev Attach / Mapping| ~220ms | ~200ms | >>> +---------------------+-----------------------+------------------------+ >>> >>> For devices configured with dynamic DMA mappings, DMA >>> allocate/map/unmap operations performance is also impacted on stage-1 >>> enabled guests. >>> Dynamic DMA mapping operation issues emulated IOMMU functions like >>> mmio write/read and TLB invalidations. >>> As a reference, following table shows performance results for runtime >>> dma operations for virtio-gpu device. >>> >>> +---------------+-------------------------+----------------------------+ >>> | DMA Op | Stage-1 Enabled Guest | Stage-1 Disabled Guest | >>> +===============+=========================+============================+ >>> | dma_alloc | median: 27μs, worst: 7ms| median: 2.5μs, worst: 360μs| >>> +---------------+-------------------------+----------------------------+ >>> | dma_free | median: 1ms, worst: 14ms| median: 2.2μs, worst: 85μs | >>> +---------------+-------------------------+----------------------------+ >>> | dma_map | median: 25μs, worst: 7ms| median: 1.5μs, worst: 336μs| >>> +---------------+-------------------------+----------------------------+ >>> | dma_unmap | median: 1ms, worst: 13ms| median: 1.3μs, worst: 65μs | >>> +---------------+-------------------------+----------------------------+ >>> >>> Testing >>> ============ >>> >>> - QEMU-based ARM system tests for Stage-1 translation and nested >>> virtualization. >>> - Actual hardware validation on platforms such as Renesas to ensure >>> compatibility with real SMMUv3 implementations. >>> - Unit/Functional tests validating correct translations (not implemented). >>> >>> Migration and Compatibility >>> =========================== >>> >>> This optional feature defaults to disabled (`viommu=""`) for backward >>> compatibility. >>> >> > > BR, > Milan > Hello Volodymyr, Julien Sorry for the delayed follow-up on this topic. We have changed vIOMMU design from 1-N to N-N mapping between vIOMMU and pIOMMU. Considering single vIOMMU model limitation pointed out by Volodymyr (SID overlaps), vIOMMU-per-pIOMMU model turned out to be the only proper solution. Following is the updated design document. I have added additional details to the design and performance impact sections, and also indicated future improvements. Security considerations section is unchanged apart from some minor details according to review comments. Let me know what do you think about updated design. Once approved, I will send the updated vIOMMU patch series. ========================================================== Design Proposal: Add SMMUv3 Stage-1 Support for XEN Guests ========================================================== :Author: Milan Djokic :Date: 2025-11-03 :Status: Draft Introduction ============ The SMMUv3 supports two stages of translation. Each stage of translation can be independently enabled. An incoming address is logically translated from VA to IPA in stage 1, then the IPA is input to stage 2 which translates the IPA to the output PA. Stage 1 translation support is required to provide isolation between different devices within OS. XEN already supports Stage 2 translation but there is no support for Stage 1 translation. This design proposal outlines the introduction of Stage-1 SMMUv3 support in Xen for ARM guests. Motivation ========== ARM systems utilizing SMMUv3 require stage-1 address translation to ensure secure DMA and guest managed I/O memory mappings. With stage-1 enabed, guest manages IOVA to IPA mappings through its own IOMMU driver. This feature enables: - Stage-1 translation in guest domain - Safe device passthrough with per-device address translation table Design Overview =============== These changes provide emulated SMMUv3 support: - **SMMUv3 Stage-1 Translation**: stage-1 and nested translation support in SMMUv3 driver. - **vIOMMU Abstraction**: Virtual IOMMU framework for guest stage-1 handling. - **Register/Command Emulation**: SMMUv3 register emulation and command queue handling. - **Device Tree Extensions**: Adds `iommus` and virtual SMMUv3 nodes to device trees for dom0 and dom0less scenarios. - **Runtime Configuration**: Introduces a `viommu` boot parameter for dynamic enablement. Separate vIOMMU device is exposed to guest for every physical IOMMU in the system. vIOMMU feature is designed in a way to provide a generic vIOMMU framework and a backend implementation for target IOMMU as separate components. Backend implementation contains specific IOMMU structure and commands handling (only SMMUv3 currently supported). This structure allows potential reuse of stage-1 feature for other IOMMU types. Security Considerations ======================= **viommu security benefits:** - Stage-1 translation ensures guest devices cannot perform unauthorized DMA (device I/O address mapping managed by guest). - Emulated IOMMU removes guest direct dependency on IOMMU hardware, while maintaining domains isolation. 1. Observation: --------------- Support for Stage-1 translation in SMMUv3 introduces new data structures (`s1_cfg` alongside `s2_cfg`) and logic to write both Stage-1 and Stage-2 entries in the Stream Table Entry (STE), including an `abort` field to handle partial configuration states. **Risk:** Without proper handling, a partially applied Stage-1 configuration might leave guest DMA mappings in an inconsistent state, potentially enabling unauthorized access or causing cross-domain interference. **Mitigation:** *(Handled by design)* This feature introduces logic that writes both `s1_cfg` and `s2_cfg` to STE and manages the `abort` field-only considering Stage-1 configuration if fully attached. This ensures incomplete or invalid guest configurations are safely ignored by the hypervisor. 2. Observation: --------------- Guests can now invalidate Stage-1 caches; invalidation needs forwarding to SMMUv3 hardware to maintain coherence. **Risk:** Failing to propagate cache invalidation could allow stale mappings, enabling access to old mappings and possibly data leakage or misrouting. **Mitigation:** *(Handled by design)* This feature ensures that guest-initiated invalidations are correctly forwarded to the hardware, preserving IOMMU coherency. 3. Observation: --------------- This design introduces substantial new functionality, including the `vIOMMU` framework, virtual SMMUv3 devices (`vsmmuv3`), command queues, event queues, domain management, and Device Tree modifications (e.g., `iommus` nodes and `libxl` integration). **Risk:** Large feature expansions increase the attack surface potential for race conditions, unchecked command inputs, or Device Tree-based misconfigurations. **Mitigation:** - Sanity checks and error-handling improvements have been introduced in this feature. - Further audits have to be performed for this feature and its dependencies in this area. 4. Observation: --------------- The code includes transformations to handle nested translation versus standard modes and uses guest-configured command queues (e.g., `CMD_CFGI_STE`) and event notifications. **Risk:** Malicious or malformed queue commands from guests could bypass validation, manipulate SMMUv3 state, or cause system instability. **Mitigation:** *(Handled by design)* Built-in validation of command queue entries and sanitization mechanisms ensure only permitted configurations are applied. This is supported via additions in `vsmmuv3` and `cmdqueue` handling code. 5. Observation: --------------- Device Tree modifications enable device assignment and configuration through guest DT fragments (e.g., `iommus`) are added via `libxl`. **Risk:** Erroneous or malicious Device Tree injection could result in device misbinding or guest access to unauthorized hardware. **Mitigation:** - `libxl` perform checks of guest configuration and parse only predefined dt fragments and nodes, reducing risk. - The system integrator must ensure correct resource mapping in the guest Device Tree (DT) fragments. 6. Observation: --------------- Introducing optional per-guest enabled features (`viommu` argument in xl guest config) means some guests may opt-out. **Risk:** Differences between guests with and without `viommu` may cause unexpected behavior or privilege drift. **Mitigation:** Verify that downgrade paths are safe and well-isolated; ensure missing support doesn't cause security issues. Additional audits on emulation paths and domains interference need to be performed in a multi-guest environment. 7. Observation: --------------- Guests have the ability to issue Stage-1 IOMMU commands like cache invalidation, stream table entries configuration, etc. An adversarial guest may issue a high volume of commands in rapid succession. **Risk:** Excessive commands requests can cause high hypervisor CPU consumption and disrupt scheduling, leading to degraded system responsiveness and potential denial-of-service scenarios. **Mitigation:** - Xen scheduler limits guest vCPU execution time, securing basic guest rate-limiting. - Batch multiple commands of same type to reduce overhead on the virtual SMMUv3 hardware emulation. - Implement vIOMMU commands execution restart and continuation support 8. Observation: --------------- Some guest commands issued towards vIOMMU are propagated to pIOMMU command queue (e.g. TLB invalidate). **Risk:** Excessive commands requests from abusive guest can cause flooding of physical IOMMU command queue, leading to degraded pIOMMU responsivness on commands issued from other guests. **Mitigation:** - Xen credit scheduler limits guest vCPU execution time, securing basic guest rate-limiting. - Batch commands which should be propagated towards pIOMMU cmd queue and enable support for batch execution pause/continuation - If possible, implement domain penalization by adding a per-domain cost counter for vIOMMU/pIOMMU usage. 9. Observation: --------------- vIOMMU feature includes event queue used for forwarding IOMMU events to guest (e.g. translation faults, invalid stream IDs, permission errors). A malicious guest can misconfigure its SMMU state or intentionally trigger faults with high frequency. **Risk:** Occurance of IOMMU events with high frequency can cause Xen to flood the event queue and disrupt scheduling with high hypervisor CPU load for events handling. **Mitigation:** - Implement fail-safe state by disabling events forwarding when faults are occured with high frequency and not processed by guest. - Batch multiple events of same type to reduce overhead on the virtual SMMUv3 hardware emulation. - Consider disabling event queue for untrusted guests Performance Impact ================== With iommu stage-1 and nested translation inclusion, performance overhead is introduced comparing to existing, stage-2 only usage in Xen. Once mappings are established, translations should not introduce significant overhead. Emulated paths may introduce moderate overhead, primarily affecting device initialization and event handling. Performance impact highly depends on target CPU capabilities. Testing is performed on QEMU virt and Renesas R-Car (QEMU emulated) platforms. Performance is mostly impacted by emulated vIOMMU operations, results shown in the following table. +-------------------------------+---------------------------------+ | vIOMMU Operation | Execution time in guest | +===============================+=================================+ | Reg read | median: 30μs, worst-case: 250μs | +-------------------------------+---------------------------------+ | Reg write | median: 35μs, worst-case: 280μs | +-------------------------------+---------------------------------+ | Invalidate TLB | median: 90μs, worst-case: 1ms+ | +-------------------------------+---------------------------------+ | Invalidate STE | median: 450μs worst_case: 7ms+ | +-------------------------------+---------------------------------+ With vIOMMU exposed to guest, guest OS has to initialize IOMMU device and configure stage-1 mappings for devices attached to it. Following table shows initialization stages which impact stage-1 enabled guest boot time and compares it with stage-1 disabled guest. "NOTE: Device probe execution time varies significantly depending on device complexity. virtio-gpu was selected as a test case due to its extensive use of dynamic DMA allocations and IOMMU mappings, making it a suitable candidate for benchmarking stage-1 vIOMMU behavior." +---------------------+-----------------------+------------------------+ | Stage | Stage-1 Enabled Guest | Stage-1 Disabled Guest | +=====================+=======================+========================+ | IOMMU Init | ~25ms | / | +---------------------+-----------------------+------------------------+ | Dev Attach / Mapping| ~220ms | ~200ms | +---------------------+-----------------------+------------------------+ For devices configured with dynamic DMA mappings, DMA allocate/map/unmap operations performance is also impacted on stage-1 enabled guests. Dynamic DMA mapping operation trigger emulated IOMMU functions like mmio write/read and TLB invalidations. As a reference, following table shows performance results for runtime dma operations for virtio-gpu device. +---------------+-------------------------+----------------------------+ | DMA Op | Stage-1 Enabled Guest | Stage-1 Disabled Guest | +===============+=========================+============================+ | dma_alloc | median: 27μs, worst: 7ms| median: 2.5μs, worst: 360μs| +---------------+-------------------------+----------------------------+ | dma_free | median: 1ms, worst: 14ms| median: 2.2μs, worst: 85μs | +---------------+-------------------------+----------------------------+ | dma_map | median: 25μs, worst: 7ms| median: 1.5μs, worst: 336μs| +---------------+-------------------------+----------------------------+ | dma_unmap | median: 1ms, worst: 13ms| median: 1.3μs, worst: 65μs | +---------------+-------------------------+----------------------------+ Testing ======= - QEMU-based ARM system tests for Stage-1 translation. - Actual hardware validation to ensure compatibility with real SMMUv3 implementations. - Unit/Functional tests validating correct translations (not implemented). Migration and Compatibility =========================== This optional feature defaults to disabled (`viommu=""`) for backward compatibility. Future improvements =================== - Implement the proposed mitigations to address security risks that are not covered by the current design (events batching, commands execution continuation) - Support for other IOMMU HW (Renesas, RISC-V, etc.) - Due to static definition of SPIs and MMIO regions for emulated devices, current implementation statically defines SPIs and MMIO regions for up to 16 vIOMMUs per guest. Future improvements would include configurable number of IOMMUs or automatic runtime resolution for target platform. References ========== - Original feature implemented by Rahul Singh: https://patchwork.kernel.org/project/xen-devel/cover/cover.1669888522.git.rahul.singh@arm.com/ - SMMUv3 architecture documentation - Existing vIOMMU code patterns BR, Milan From xen-devel-bounces@lists.xenproject.org Mon Nov 03 13:19:46 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 03 Nov 2025 13:19:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155339.1484833 (Exim 4.92) (envelope-from ) id 1vFuTJ-0002Ii-2G; Mon, 03 Nov 2025 13:19:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155339.1484833; Mon, 03 Nov 2025 13:19:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFuTI-0002Ib-Uh; Mon, 03 Nov 2025 13:19:44 +0000 Received: by outflank-mailman (input) for mailman id 1155339; Mon, 03 Nov 2025 13:19:44 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFuTI-0002IU-KM for xen-devel@lists.xenproject.org; Mon, 03 Nov 2025 13:19:44 +0000 Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [2a00:1450:4864:20::432]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id c00c5b95-b8b7-11f0-980a-7dc792cee155; Mon, 03 Nov 2025 14:19:39 +0100 (CET) Received: by mail-wr1-x432.google.com with SMTP id ffacd0b85a97d-429c7e0282dso1770309f8f.2 for ; Mon, 03 Nov 2025 05:19:39 -0800 (PST) Received: from ?IPV6:2003:e5:870e:1500:7795:3e8a:56c1:ae53? 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Mon, 03 Nov 2025 05:19:38 -0800 (PST) Message-ID: <209fa1c0-f6f2-4594-a2ae-7733ff651761@suse.com> Date: Mon, 3 Nov 2025 14:19:36 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/netfront: Comment Correction: Fix Spelling Error and Description of Queue Quantity Rules To: Chu Guangqing , sstabellini@kernel.org, oleksandr_tyshchenko@epam.com, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com Cc: xen-devel@lists.xenproject.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org References: <20251103032212.2462-1-chuguangqing@inspur.com> Content-Language: en-US From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: <20251103032212.2462-1-chuguangqing@inspur.com> Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------krGRhE0Upii4b9WMJ7Y2jJMT" This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------krGRhE0Upii4b9WMJ7Y2jJMT Content-Type: multipart/mixed; boundary="------------naDhrqYeiAtCem5LDmy8CsV5"; protected-headers="v1" From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= To: Chu Guangqing , sstabellini@kernel.org, oleksandr_tyshchenko@epam.com, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com Cc: xen-devel@lists.xenproject.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Message-ID: <209fa1c0-f6f2-4594-a2ae-7733ff651761@suse.com> Subject: Re: [PATCH] xen/netfront: Comment Correction: Fix Spelling Error and Description of Queue Quantity Rules References: <20251103032212.2462-1-chuguangqing@inspur.com> In-Reply-To: <20251103032212.2462-1-chuguangqing@inspur.com> --------------naDhrqYeiAtCem5LDmy8CsV5 Content-Type: multipart/mixed; boundary="------------511r0QUbJCNKJQeyEXdlbmGB" --------------511r0QUbJCNKJQeyEXdlbmGB Content-Type: text/plain; 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Mon, 03 Nov 2025 05:25:56 -0800 (PST) Message-ID: <1d4245fb-c48f-4e0a-8c69-c18f23b0fd5a@suse.com> Date: Mon, 3 Nov 2025 14:25:55 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/usb: Constify struct hc_driver To: Christophe JAILLET , Greg Kroah-Hartman Cc: linux-kernel@vger.kernel.org, kernel-janitors@vger.kernel.org, xen-devel@lists.xenproject.org, linux-usb@vger.kernel.org References: <63241c9e857646d895ce615b998d41ee4829f9e3.1761475831.git.christophe.jaillet@wanadoo.fr> Content-Language: en-US From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: <63241c9e857646d895ce615b998d41ee4829f9e3.1761475831.git.christophe.jaillet@wanadoo.fr> Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------TEFMu9nrGOax3HN0PtapF02y" This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------TEFMu9nrGOax3HN0PtapF02y Content-Type: multipart/mixed; boundary="------------U1zNNy0zDczPsawwTlYAN2iq"; protected-headers="v1" From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= To: Christophe JAILLET , Greg Kroah-Hartman Cc: linux-kernel@vger.kernel.org, kernel-janitors@vger.kernel.org, xen-devel@lists.xenproject.org, linux-usb@vger.kernel.org Message-ID: <1d4245fb-c48f-4e0a-8c69-c18f23b0fd5a@suse.com> Subject: Re: [PATCH] xen/usb: Constify struct hc_driver References: <63241c9e857646d895ce615b998d41ee4829f9e3.1761475831.git.christophe.jaillet@wanadoo.fr> In-Reply-To: <63241c9e857646d895ce615b998d41ee4829f9e3.1761475831.git.christophe.jaillet@wanadoo.fr> --------------U1zNNy0zDczPsawwTlYAN2iq Content-Type: multipart/mixed; boundary="------------igYf0v5aAHmtcgkvWfha5CqD" --------------igYf0v5aAHmtcgkvWfha5CqD Content-Type: text/plain; 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For this seres about RDSEED, we've got: 1) Cyan Skillfish, the PlayStation 5 CPU but also in one crypto-mining rig.  Here, RDSEED is deterministically broken and not getting a fix. The chances of Xen running on these systems is almost 0.  We should turn off RDSEED and be done with it; it's not interesting in the slightest to be able to turn back on. 2) Zen5.  Here, RDSEED gives a higher-than-expected rate of 0's for only the 32bit and 16bit forms; the 64bit form is unaffected. There is microcode to fix it, on server at least.  Firmware fixes for client are rather further away.  64bit OSes are likely fine (using the 64bit instruction form).  Some Linux devs think that Linux would be safe even using the 32bit form, if it really only has a 10% zeroes rate. There is certainly a risk that software uses the 32b/16b forms, and not mix it properly with other entropy, but the common case these days (64b) works just fine.  This means that blanket-disabling does more harm than good. This case does really want to be off by default (given no microcode), but able to be opted in to.  At least one major class of OSes (Linux) are safe despite the issue. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon Nov 03 14:30:35 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 03 Nov 2025 14:30:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155374.1484867 (Exim 4.92) (envelope-from ) id 1vFvZl-0004N2-CP; Mon, 03 Nov 2025 14:30:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155374.1484867; Mon, 03 Nov 2025 14:30:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFvZl-0004Mv-9a; Mon, 03 Nov 2025 14:30:29 +0000 Received: by outflank-mailman (input) for mailman id 1155374; Mon, 03 Nov 2025 14:30:27 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFvZj-0004Mp-Iq for xen-devel@lists.xenproject.org; Mon, 03 Nov 2025 14:30:27 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vFvZi-00Gre8-2Q; Mon, 03 Nov 2025 14:30:26 +0000 Received: from [2a02:8012:3a1:0:a8bf:4414:df65:fa8f] by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.96) (envelope-from ) id 1vFvZi-008Wgs-1z; Mon, 03 Nov 2025 14:30:26 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:Content-Type:In-Reply-To:From: References:Cc:To:Subject:MIME-Version:Date:Message-ID; bh=2xDEXqAfxYEZ3r2Oz31XyZoib6qwT5KJ34OC6A0UAsU=; b=WIdSbKgUeEr1HjFUcsEefKKyPN yVVEqXJvW+7Ime5U2RQbgLgko2ZIpmNNkhZ3caF/+FsQiORnDA441N08AXJyjCuizAcbUhfOq5FVC hrV/u+bzMMIh0cN1/QtC87e5tKY8UmtAXH6aPy0n9waoXH+xiQWicmAoM6hD6BYepotI=; Message-ID: <0fd2b8e4-bdea-4d01-a2dd-8d2e4b37090d@xen.org> Date: Mon, 3 Nov 2025 14:30:24 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: Limitations for Running Xen on KVM Arm64 To: "haseeb.ashraf@siemens.com" , Mohamed Mediouni Cc: "xen-devel@lists.xenproject.org" , "Volodymyr_Babchuk@epam.com" , "Driscoll, Dan" , "Bachtel, Andrew" , "fahad.arslan@siemens.com" , "noor.ahsan@siemens.com" , "brian.sheppard@siemens.com" , Stefano Stabellini , Bertrand Marquis , Michal Orzel References: <2b00a98f-6fee-4341-92bd-25909ebb6e36@xen.org> <01527182-ccef-43a5-be55-a5450eb7919f@xen.org> Content-Language: en-US From: Julien Grall In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 03/11/2025 13:09, haseeb.ashraf@siemens.com wrote: > Hi, Hi, > >> To clarify, Xen is using the local TLB version. So it should be vmalls12e1. > If I understood correctly, won't HCR_EL2.FB makes local TLB, a broadcast one? HCR_EL2.FB only applies to EL1. So it depends who is setting it in the this situation. If it is Xen, then it would only apply to its VM. If it is KVM, then it would also apply to the nested Xen. > Can you explain in what scenario exactly, can we use vmalle1? We can use vmalle1 in Xen for the situation we discussed. I was only pointing out that the implementation in KVM seems suboptimal. > >> Before going into batching, do you have any data showing how often XENMEM_remove_from_physmap is called in your setup? Similar, I would be interested to know the number of TLBs flush within one hypercalls and whether the regions unmapped were contiguous. > The number of times XENMEM_remove_from_physmap is invoked depends upon the size of each binary. Each hypercall invokes TLB instruction once. If I use persistent rootfs, then this hypercall is invoked almost 7458 times (+8 approx) which is equal to sum of kernel and DTB image pages: > domainbuilder: detail: xc_dom_alloc_segment: kernel : 0x40000000 -> 0x41d1f200 (pfn 0x40000 + 0x1d20 pages) > domainbuilder: detail: xc_dom_alloc_segment: devicetree : 0x48000000 -> 0x4800188d (pfn 0x48000 + 0x2 pages) > > And if I use ramdisk image, then this hypercall is invoked almost 222815 times (+8 approx) which is equal to sum of kernel, ramdisk and DTB image 4k pages. > domainbuilder: detail: xc_dom_alloc_segment: kernel : 0x40000000 -> 0x41d1f200 (pfn 0x40000 + 0x1d20 pages) > domainbuilder: detail: xc_dom_alloc_segment: module0 : 0x48000000 -> 0x7c93d000 (pfn 0x48000 + 0x3493d pages) > domainbuilder: detail: xc_dom_alloc_segment: devicetree : 0x7c93d000 -> 0x7c93e8d9 (pfn 0x7c93d + 0x2 pages) > > You can see the address ranges in above logs, the addresses seem contiguous in this address space and at best we can reduce the number of calls to 3, each at the end of every image when removed from physmap. Thanks for the log. I haven't looked at the toolstack code. Does this mean only one ioctl call will be issue per blob will be used? > >> we may still send a few TLBs because: >> * We need to avoid long-running operations, so the hypercall may restart. So we will have to flush at mininum before every restart >> * The current way we handle batching is we will process one item at the time. As this may free memory (either leaf or intermediate page-tables), we will need to flush the TLBs first to prevent the domain accessing the wrong memory. This could be solved by keeping track of the list of memory to free. But this is going to require some work and I am not entirely sure this is worth it at the moment. > I think now you have the figure that 222815 TLBs are too much and a few TLBs would still be a lot better. TLBs less than 10 are not much noticeable. I agree this is too much but this is going to require quite a bit of work (as I said we would need to keep track of pages to be freed before the TLB flush). At least to me, it feels like switching to TLBI range (or a series os IPAS2E1IS) is an easier win. But if you feel like doing the larger rework, I would be happy to have a look to check whether it would be an acceptable change for upstream. > >> We could use a series of TLBI IPAS2E1IS which I think is what TLBI range is meant to replace (so long the addresses are contiguous in the given space). > Isn't IPAS2E1IS a range tlbi instruction? My understanding is that this instruction is available on processors with range TLBI support, I could be wrong. I saw its KVM emulation which does full invalidation if range TLBI is not supported (https://github.com/torvalds/linux/blob/master/arch/arm64/kvm/hyp/pgtable.c#L647). IPAS2E1IS only allows you to invalidate one address at the time and is available on all processors. The R version is only available when the processor support TLBI range and allow you to invalidate multiple contiguous address. Cheers, -- Julien Grall From xen-devel-bounces@lists.xenproject.org Mon Nov 03 14:31:02 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 03 Nov 2025 14:31:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155382.1484876 (Exim 4.92) (envelope-from ) id 1vFvaI-0004od-KE; Mon, 03 Nov 2025 14:31:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155382.1484876; Mon, 03 Nov 2025 14:31:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFvaI-0004oW-HB; Mon, 03 Nov 2025 14:31:02 +0000 Received: by outflank-mailman (input) for mailman id 1155382; Mon, 03 Nov 2025 14:31:01 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFvaH-0004d2-3H for xen-devel@lists.xenproject.org; Mon, 03 Nov 2025 14:31:01 +0000 Received: from mail132-29.atl131.mandrillapp.com (mail132-29.atl131.mandrillapp.com [198.2.132.29]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id b4f882f8-b8c1-11f0-980a-7dc792cee155; Mon, 03 Nov 2025 15:30:56 +0100 (CET) Received: from pmta09.mandrill.prod.atl01.rsglab.com (localhost [127.0.0.1]) by mail132-29.atl131.mandrillapp.com (Mailchimp) with ESMTP id 4d0Ysp2t1pz7lmQ8N for ; Mon, 3 Nov 2025 14:30:54 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id f7909f804308400482c3b0eb5c5bfc8f; Mon, 03 Nov 2025 14:30:54 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: b4f882f8-b8c1-11f0-980a-7dc792cee155 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1762180254; x=1762450254; bh=L7zIdZfhJrcK0CvzFBqxXipuXKZ6lGMx0oTZecMnioI=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=wdXnUlS2qcql4DimBJl3zQShA5bS66quqgqGDmmxHGBISRLTCh7FymjkVGqug91kq jelqYZ9Zq+q9EBpMLzkV2uEjwG2/FCC+v2OpjvWYlta45MEaBjWo0ZmiO9jPULydCA VicHi1IaYIiuv1WNzWf9dPHHo+QmFY8ZAh3j6KFZtDjTTPCsIacbzfAVW6toQNBjVu nAXK3xC+rLEl3rPKsRyS7tEa1PWraQBjNruUSbjJP6nUmGlcCyrwSi1zFKv/gVIx/Y 8/AQA2ZTPIRk+K81llA0Lq3AAq8kAFZvqLHzqhm+oli05FwSH85hio2pSaUxUXUefx 9l/+bGAGhBW6Q== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1762180254; x=1762440754; i=teddy.astie@vates.tech; bh=L7zIdZfhJrcK0CvzFBqxXipuXKZ6lGMx0oTZecMnioI=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=SrPZeHnrt4xKQf2A8qeRGAA6OZLZ4qvwyjNeBG+jloJDOszrML4ZbkCrO1nDOykLB yzeDyaQy9tCMaG08paWhduom9G8dN6FLuXUL1PAy4QQfDqNg4zkc3jzCAmoLzKpAre Bfa18SPB7rQLJ0GJcv6BNGbaSm8HV3nu5yA3l21Lj+AOapdSLULFCC3XsNeFdWTz3C u7Cf4e6R7eWdXq48YwTXZcs1GD/x+osWsCITXc38DEgevysvZo19/icTLCtvl2MnhQ z5HctcF/GGqfRwjct8y6uR2NFcXZHABFsXItqMH6BCtqiOP/LPrbGnskJ/2XHpzUrg BJFpqCThMei+A== From: "Teddy Astie" Subject: =?utf-8?Q?Re:=20[RFC=20PATCH=20for-4.22=20v2=202/3]=20x86/platform:=20Expose=20DTS=20sensors=20MSR?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1762180253397 Message-Id: To: "Jan Beulich" Cc: "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , xen-devel@lists.xenproject.org References: <1001287258cf9652c749c66c6565478085a8657c.1761752801.git.teddy.astie@vates.tech> <22e53531-73e4-40e9-a45e-2c5f59852ce4@suse.com> In-Reply-To: <22e53531-73e4-40e9-a45e-2c5f59852ce4@suse.com> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.f7909f804308400482c3b0eb5c5bfc8f?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20251103:md Date: Mon, 03 Nov 2025 14:30:54 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Le 30/10/2025 =C3=A0 14:54, Jan Beulich a =C3=A9crit=C2=A0: > On 29.10.2025 16:59, Teddy Astie wrote: >> --- a/xen/arch/x86/include/asm/msr-index.h >> +++ b/xen/arch/x86/include/asm/msr-index.h >> @@ -115,6 +115,9 @@ >> #define MCU_OPT_CTRL_GDS_MIT_DIS (_AC(1, ULL) << 4) >> #define MCU_OPT_CTRL_GDS_MIT_LOCK (_AC(1, ULL) << 5) >> >> +#define MSR_DTS_TEMPERATURE_TARGET 0x000001a2 >> +#define MSR_DTS_PACKAGE_THERM_STATUS 0x000001b1 > > Where are the DTS infixes coming from? The SDM doesn't have such. We try = to > stay as close as reasonable to the SDM / PM names, with the exception tha= t > typically we omit IA32 infixes. > I got confused with the naming of MSRs (and their lack of IA32 prefix) in the upper list of MSR. I guess it should be MSR_PACKAGE_THERM_STATUS and MSR_TEMPERATURE_TARGET. > I'd also like to note that unlike the two THERM_STATUS, MSR_TEMPERATURE_T= ARGET > (as per the absence if an IA32 infix in the SDM) isn't an architectural M= SR, > and hence I'm not entirely convinced we can "blindly" expose it. (Interes= tingly > in Linux code there is an IA32 infix.) > We only perform rdmsr_safe on this MSR, so I don't think there is much problem with it as I don't expect Intel to reuse this MSR number for something else (at worst, it is going to not be implemented and would gracefully fail). Some parts of this MSR slightly change, but the one (tjmax) that is interesting in here is consistent across the architectures. >> @@ -86,6 +87,11 @@ static bool msr_read_allowed(unsigned int msr) >> >> case MSR_MCU_OPT_CTRL: >> return cpu_has_srbds_ctrl; >> + >> + case MSR_IA32_THERM_STATUS: >> + case MSR_DTS_TEMPERATURE_TARGET: >> + case MSR_DTS_PACKAGE_THERM_STATUS: >> + return raw_cpu_policy.basic.pm.dts; > > This, aiui (and according to related comments I got from Andrew on remote= ly > similar changes I was doing) wants to use host_policy. Hence why that oth= er > prereq change is needed that I talked about (and that iirc I reproduced o= n > the other sub-thread). > yes > Jan -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Mon Nov 03 14:34:25 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 03 Nov 2025 14:34:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155394.1484887 (Exim 4.92) (envelope-from ) id 1vFvdY-0005Ri-1E; Mon, 03 Nov 2025 14:34:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155394.1484887; Mon, 03 Nov 2025 14:34:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFvdX-0005Rb-Uk; Mon, 03 Nov 2025 14:34:23 +0000 Received: by outflank-mailman (input) for mailman id 1155394; Mon, 03 Nov 2025 14:34:23 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFvdX-0005RV-1K for xen-devel@lists.xenproject.org; Mon, 03 Nov 2025 14:34:23 +0000 Received: from mail180-3.suw31.mandrillapp.com (mail180-3.suw31.mandrillapp.com [198.2.180.3]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 2fb211a9-b8c2-11f0-9d16-b5c5bf9af7f9; Mon, 03 Nov 2025 15:34:21 +0100 (CET) Received: from pmta11.mandrill.prod.suw01.rsglab.com (localhost [127.0.0.1]) by mail180-3.suw31.mandrillapp.com (Mailchimp) with ESMTP id 4d0Yxm3JrxzDRHx6V for ; Mon, 3 Nov 2025 14:34:20 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id 2dddcedda25845c19a088b0e55533f9c; Mon, 03 Nov 2025 14:34:20 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 2fb211a9-b8c2-11f0-9d16-b5c5bf9af7f9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1762180460; x=1762450460; bh=cmJyhQrOy7ylbHCxHCwskA5DUv5Thn1gMw+4kX72MLQ=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=gntrV8VtG2dwuLlZAGsEfI6s2oseeb/oozheiNpr9pH/g3ivCgxj7c3WqXeQpEq6T eQbvZH00nNZNMNgRuMJ/FvagBm54qO6OLY7+Vf7WhtUWkMzgACK4J0GLpC5TrKyokF uqrToJtv0jR42sYlXCt3+VZQd2LoM/WFHkFOOHoSwKnt0qmMhSWybLHtWiSqm0npm4 myydRtgdI+u5A+LPjIK4qqT+OhH4E98Cbba/zH0pLtSfolxaNOhta6qx14SlBYeXb0 vd7Yv4z0h9CvNkha51gqL35bBroOyb1GmtokLe0VgKVxLWV694YkgwFePaqhpRP3hr RlG5jN7moBUIQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1762180460; x=1762440960; i=teddy.astie@vates.tech; bh=cmJyhQrOy7ylbHCxHCwskA5DUv5Thn1gMw+4kX72MLQ=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=NidbyOx94QQEU9uaCdnbXjihf/V+dQXVwzoVWiWs51USDQXj3oyOsZ1QPkeyzmMZ+ W72EddJ/3rA+GYOaTcbADzgHcMfqp2VsU+U1tYkGfkG0e5x92KL4G5AGJa4a3tWkB0 bS2xN1cSmOlku/nZNsW4k1oKQsjbPpdSLHLp+HPFIYbtX7mXm82HROnYPaq359qC9A h+ooz/cUWGRpAXs9+uykTTl+faO8yvIZqnKMRNKfI8QtdOwv8bwTfOEjB9wR3XMIp3 pHcGsyWfqO5VcDZpPhh051D6vZaWS2bstzI/yiQqc2Lz0mF9YhxUkYa7Ba1SW2Sx6H e1z79B9ANP3YQ== From: "Teddy Astie" Subject: =?utf-8?Q?Re:=20[RFC=20PATCH=20for-4.22=20v2=203/3]=20xenpm:=20Add=20get-intel-temp=20subcommand?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1762180459922 Message-Id: <63a05970-f3b9-4c9c-851e-fea8352d2a43@vates.tech> To: "Jan Beulich" Cc: "Anthony PERARD" , xen-devel@lists.xenproject.org References: <6ed4d320ca4a69ca8b05b0af45d32ff4b330a779.1761752801.git.teddy.astie@vates.tech> <453a06cc-f1ba-4ac0-af61-43c24640fd2e@suse.com> In-Reply-To: <453a06cc-f1ba-4ac0-af61-43c24640fd2e@suse.com> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.2dddcedda25845c19a088b0e55533f9c?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20251103:md Date: Mon, 03 Nov 2025 14:34:20 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Le 30/10/2025 =C3=A0 15:05, Jan Beulich a =C3=A9crit=C2=A0: > On 29.10.2025 16:59, Teddy Astie wrote: >> @@ -1354,6 +1356,95 @@ void enable_turbo_mode(int argc, char *argv[]) >> errno, strerror(errno)); >> } >> >> +#define MSR_DTS_THERM_STATUS 0x0000019c >> +#define MSR_DTS_TEMPERATURE_TARGET 0x000001a2 >> +#define MSR_DTS_PACKAGE_THERM_STATUS 0x000001b1 > > DTS infix question again. Actually, can't we use the hypervisor's msr-ind= ex.h here? > We already use it from the emulator test harness. > I wasn't sure whether tools could use msr-index.h or not. If we can, we also likely want to make some of the existing tools to rely on it instead of having them defining it in their files. >> +static int fetch_dts_temp(xc_interface *xch, uint32_t cpu, bool package= , int *temp) >> +{ >> + xc_resource_entry_t entries[2] =3D { >> + (xc_resource_entry_t){ >> + .idx =3D package ? MSR_DTS_PACKAGE_THERM_STATUS : MSR_DTS_T= HERM_STATUS >> + }, >> + (xc_resource_entry_t){ .idx =3D MSR_DTS_TEMPERATURE_TARGET }, >> + }; >> + struct xc_resource_op ops =3D { >> + .cpu =3D cpu, >> + .entries =3D entries, >> + .nr_entries =3D 2, >> + }; >> + int tjmax; > > Plain int? (Same for the last function parameter.) > >> + int ret =3D xc_resource_op(xch, 1, &ops); >> + >> + if ( ret <=3D 0 ) >> + /* This CPU isn't online or can't query this MSR */ >> + return ret ?: -EOPNOTSUPP; >> + >> + if ( ret =3D=3D 2 ) >> + tjmax =3D (entries[1].val >> 16) & 0xff; >> + else >> + { >> + /* >> + * The CPU doesn't support MSR_IA32_TEMPERATURE_TARGET, we assu= me it's 100 which >> + * is correct aside a few selected Atom CPUs. Check coretemp so= urce code for more >> + * information. >> + */ >> + fprintf(stderr, "[CPU%d] MSR_IA32_TEMPERATURE_TARGET is not sup= ported, assume " >> + "tjmax=3D100=C2=B0C, readings may be incorrect\n", cpu)= ; > > As per remarks elsewhere, I don't see why there is an IA32 infix here. > >> + tjmax =3D 100; >> + } >> + >> + *temp =3D tjmax - ((entries[0].val >> 16) & 0xff); >> + return 0; >> +} >> + >> + >> +void get_intel_temp(int argc, char *argv[]) >> +{ >> + int temp, cpu =3D -1, socket; > > Plain int question again, for temp and socket. > socket should be unsigned. But temp (as being CPU temperature) can actually be negative (even though it is going to be quite specific). The use of int here is consistent with what Linux coretemp uses to store temperatures. >> + bool has_data =3D false; >> + >> + if (argc > 0) > > This and ... > >> + parse_cpuid(argv[0], &cpu); >> + >> + if (cpu !=3D -1) > > ... this if() don't fit the (hypervisor) style used elsewhere. > ok > Jan > -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Mon Nov 03 16:04:43 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 03 Nov 2025 16:04:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155404.1484898 (Exim 4.92) (envelope-from ) id 1vFx2k-00088k-9R; Mon, 03 Nov 2025 16:04:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155404.1484898; Mon, 03 Nov 2025 16:04:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFx2k-00088d-4L; Mon, 03 Nov 2025 16:04:30 +0000 Received: by outflank-mailman (input) for mailman id 1155404; Mon, 03 Nov 2025 16:04:29 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFx2j-00088X-1X for xen-devel@lists.xenproject.org; Mon, 03 Nov 2025 16:04:29 +0000 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c21c6348-b8ce-11f0-9d16-b5c5bf9af7f9; Mon, 03 Nov 2025 17:04:26 +0100 (CET) Received: from mail-wm1-f69.google.com (mail-wm1-f69.google.com [209.85.128.69]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-595-r3oPNyyuMOKPTp55RJ_C3Q-1; Mon, 03 Nov 2025 11:04:03 -0500 Received: by mail-wm1-f69.google.com with SMTP id 5b1f17b1804b1-477171bbf51so24501495e9.3 for ; Mon, 03 Nov 2025 08:04:00 -0800 (PST) Received: from ?IPV6:2003:d8:2f3f:4b00:ee13:8c22:5cc5:d169? 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Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-9-kevin.brodsky@arm.com> From: David Hildenbrand Autocrypt: addr=david@redhat.com; keydata= xsFNBFXLn5EBEAC+zYvAFJxCBY9Tr1xZgcESmxVNI/0ffzE/ZQOiHJl6mGkmA1R7/uUpiCjJ dBrn+lhhOYjjNefFQou6478faXE6o2AhmebqT4KiQoUQFV4R7y1KMEKoSyy8hQaK1umALTdL QZLQMzNE74ap+GDK0wnacPQFpcG1AE9RMq3aeErY5tujekBS32jfC/7AnH7I0v1v1TbbK3Gp XNeiN4QroO+5qaSr0ID2sz5jtBLRb15RMre27E1ImpaIv2Jw8NJgW0k/D1RyKCwaTsgRdwuK Kx/Y91XuSBdz0uOyU/S8kM1+ag0wvsGlpBVxRR/xw/E8M7TEwuCZQArqqTCmkG6HGcXFT0V9 PXFNNgV5jXMQRwU0O/ztJIQqsE5LsUomE//bLwzj9IVsaQpKDqW6TAPjcdBDPLHvriq7kGjt WhVhdl0qEYB8lkBEU7V2Yb+SYhmhpDrti9Fq1EsmhiHSkxJcGREoMK/63r9WLZYI3+4W2rAc UucZa4OT27U5ZISjNg3Ev0rxU5UH2/pT4wJCfxwocmqaRr6UYmrtZmND89X0KigoFD/XSeVv jwBRNjPAubK9/k5NoRrYqztM9W6sJqrH8+UWZ1Idd/DdmogJh0gNC0+N42Za9yBRURfIdKSb B3JfpUqcWwE7vUaYrHG1nw54pLUoPG6sAA7Mehl3nd4pZUALHwARAQABzSREYXZpZCBIaWxk ZW5icmFuZCA8ZGF2aWRAcmVkaGF0LmNvbT7CwZoEEwEIAEQCGwMCF4ACGQEFCwkIBwICIgIG FQoJCAsCBBYCAwECHgcWIQQb2cqtc1xMOkYN/MpN3hD3AP+DWgUCaJzangUJJlgIpAAKCRBN 3hD3AP+DWhAxD/9wcL0A+2rtaAmutaKTfxhTP0b4AAp1r/eLxjrbfbCCmh4pqzBhmSX/4z11 opn2KqcOsueRF1t2ENLOWzQu3Roiny2HOU7DajqB4dm1BVMaXQya5ae2ghzlJN9SIoopTWlR 0Af3hPj5E2PYvQhlcqeoehKlBo9rROJv/rjmr2x0yOM8qeTroH/ZzNlCtJ56AsE6Tvl+r7cW 3x7/Jq5WvWeudKrhFh7/yQ7eRvHCjd9bBrZTlgAfiHmX9AnCCPRPpNGNedV9Yty2Jnxhfmbv Pw37LA/jef8zlCDyUh2KCU1xVEOWqg15o1RtTyGV1nXV2O/mfuQJud5vIgzBvHhypc3p6VZJ lEf8YmT+Ol5P7SfCs5/uGdWUYQEMqOlg6w9R4Pe8d+mk8KGvfE9/zTwGg0nRgKqlQXrWRERv cuEwQbridlPAoQHrFWtwpgYMXx2TaZ3sihcIPo9uU5eBs0rf4mOERY75SK+Ekayv2ucTfjxr Kf014py2aoRJHuvy85ee/zIyLmve5hngZTTe3Wg3TInT9UTFzTPhItam6dZ1xqdTGHZYGU0O otRHcwLGt470grdiob6PfVTXoHlBvkWRadMhSuG4RORCDpq89vu5QralFNIf3EysNohoFy2A LYg2/D53xbU/aa4DDzBb5b1Rkg/udO1gZocVQWrDh6I2K3+cCs7BTQRVy5+RARAA59fefSDR 9nMGCb9LbMX+TFAoIQo/wgP5XPyzLYakO+94GrgfZjfhdaxPXMsl2+o8jhp/hlIzG56taNdt VZtPp3ih1AgbR8rHgXw1xwOpuAd5lE1qNd54ndHuADO9a9A0vPimIes78Hi1/yy+ZEEvRkHk /kDa6F3AtTc1m4rbbOk2fiKzzsE9YXweFjQvl9p+AMw6qd/iC4lUk9g0+FQXNdRs+o4o6Qvy iOQJfGQ4UcBuOy1IrkJrd8qq5jet1fcM2j4QvsW8CLDWZS1L7kZ5gT5EycMKxUWb8LuRjxzZ 3QY1aQH2kkzn6acigU3HLtgFyV1gBNV44ehjgvJpRY2cC8VhanTx0dZ9mj1YKIky5N+C0f21 zvntBqcxV0+3p8MrxRRcgEtDZNav+xAoT3G0W4SahAaUTWXpsZoOecwtxi74CyneQNPTDjNg azHmvpdBVEfj7k3p4dmJp5i0U66Onmf6mMFpArvBRSMOKU9DlAzMi4IvhiNWjKVaIE2Se9BY FdKVAJaZq85P2y20ZBd08ILnKcj7XKZkLU5FkoA0udEBvQ0f9QLNyyy3DZMCQWcwRuj1m73D sq8DEFBdZ5eEkj1dCyx+t/ga6x2rHyc8Sl86oK1tvAkwBNsfKou3v+jP/l14a7DGBvrmlYjO 59o3t6inu6H7pt7OL6u6BQj7DoMAEQEAAcLBfAQYAQgAJgIbDBYhBBvZyq1zXEw6Rg38yk3e EPcA/4NaBQJonNqrBQkmWAihAAoJEE3eEPcA/4NaKtMQALAJ8PzprBEXbXcEXwDKQu+P/vts IfUb1UNMfMV76BicGa5NCZnJNQASDP/+bFg6O3gx5NbhHHPeaWz/VxlOmYHokHodOvtL0WCC 8A5PEP8tOk6029Z+J+xUcMrJClNVFpzVvOpb1lCbhjwAV465Hy+NUSbbUiRxdzNQtLtgZzOV Zw7jxUCs4UUZLQTCuBpFgb15bBxYZ/BL9MbzxPxvfUQIPbnzQMcqtpUs21CMK2PdfCh5c4gS sDci6D5/ZIBw94UQWmGpM/O1ilGXde2ZzzGYl64glmccD8e87OnEgKnH3FbnJnT4iJchtSvx yJNi1+t0+qDti4m88+/9IuPqCKb6Stl+s2dnLtJNrjXBGJtsQG/sRpqsJz5x1/2nPJSRMsx9 5YfqbdrJSOFXDzZ8/r82HgQEtUvlSXNaXCa95ez0UkOG7+bDm2b3s0XahBQeLVCH0mw3RAQg r7xDAYKIrAwfHHmMTnBQDPJwVqxJjVNr7yBic4yfzVWGCGNE4DnOW0vcIeoyhy9vnIa3w1uZ 3iyY2Nsd7JxfKu1PRhCGwXzRw5TlfEsoRI7V9A8isUCoqE2Dzh3FvYHVeX4Us+bRL/oqareJ CIFqgYMyvHj7Q06kTKmauOe4Nf0l0qEkIuIzfoLJ3qr5UyXc2hLtWyT9Ir+lYlX9efqh7mOY qIws/H2t In-Reply-To: <20251029100909.3381140-9-kevin.brodsky@arm.com> X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: oLJBq5WEohlje9fvKVf9kuj7n6Fzc9Ai0cPhk_jH5NU_1762185830 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 29.10.25 11:09, Kevin Brodsky wrote: > The generic lazy_mmu layer now tracks whether a task is in lazy MMU > mode. As a result we no longer need a TIF flag for that purpose - > let's use the new in_lazy_mmu_mode() helper instead. > > Signed-off-by: Kevin Brodsky > --- > arch/arm64/include/asm/pgtable.h | 16 +++------------- > arch/arm64/include/asm/thread_info.h | 3 +-- > 2 files changed, 4 insertions(+), 15 deletions(-) > > diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h > index 535435248923..61ca88f94551 100644 > --- a/arch/arm64/include/asm/pgtable.h > +++ b/arch/arm64/include/asm/pgtable.h > @@ -62,30 +62,21 @@ static inline void emit_pte_barriers(void) > > static inline void queue_pte_barriers(void) > { > - unsigned long flags; > - > if (in_interrupt()) { > emit_pte_barriers(); > return; > } > > - flags = read_thread_flags(); > - > - if (flags & BIT(TIF_LAZY_MMU)) { > - /* Avoid the atomic op if already set. */ > - if (!(flags & BIT(TIF_LAZY_MMU_PENDING))) > - set_thread_flag(TIF_LAZY_MMU_PENDING); > - } else { > + if (in_lazy_mmu_mode()) > + test_and_set_thread_flag(TIF_LAZY_MMU_PENDING); You likely don't want a test_and_set here, which would do a test_and_set_bit() -- an atomic rmw. You only want to avoid the atomic write if already set. So keep the current /* Avoid the atomic op if already set. */ if (!(flags & BIT(TIF_LAZY_MMU_PENDING))) set_thread_flag(TIF_LAZY_MMU_PENDING); -- Cheers David From xen-devel-bounces@lists.xenproject.org Mon Nov 03 16:05:56 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 03 Nov 2025 16:05:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155414.1484906 (Exim 4.92) (envelope-from ) id 1vFx47-0000Fi-Ld; Mon, 03 Nov 2025 16:05:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155414.1484906; Mon, 03 Nov 2025 16:05:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFx47-0000Fb-It; Mon, 03 Nov 2025 16:05:55 +0000 Received: by outflank-mailman (input) for mailman id 1155414; Mon, 03 Nov 2025 16:05:54 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFx46-00005O-Cy for xen-devel@lists.xenproject.org; Mon, 03 Nov 2025 16:05:54 +0000 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id f83877fc-b8ce-11f0-980a-7dc792cee155; Mon, 03 Nov 2025 17:05:52 +0100 (CET) Received: from mail-wr1-f71.google.com (mail-wr1-f71.google.com [209.85.221.71]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-208-YUgkdxsgM6anXXIKvGO7Rw-1; Mon, 03 Nov 2025 11:05:50 -0500 Received: by mail-wr1-f71.google.com with SMTP id ffacd0b85a97d-429be5aeea2so1881280f8f.2 for ; Mon, 03 Nov 2025 08:05:49 -0800 (PST) Received: from ?IPV6:2003:d8:2f3f:4b00:ee13:8c22:5cc5:d169? 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Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-10-kevin.brodsky@arm.com> From: David Hildenbrand Autocrypt: addr=david@redhat.com; keydata= xsFNBFXLn5EBEAC+zYvAFJxCBY9Tr1xZgcESmxVNI/0ffzE/ZQOiHJl6mGkmA1R7/uUpiCjJ dBrn+lhhOYjjNefFQou6478faXE6o2AhmebqT4KiQoUQFV4R7y1KMEKoSyy8hQaK1umALTdL QZLQMzNE74ap+GDK0wnacPQFpcG1AE9RMq3aeErY5tujekBS32jfC/7AnH7I0v1v1TbbK3Gp XNeiN4QroO+5qaSr0ID2sz5jtBLRb15RMre27E1ImpaIv2Jw8NJgW0k/D1RyKCwaTsgRdwuK Kx/Y91XuSBdz0uOyU/S8kM1+ag0wvsGlpBVxRR/xw/E8M7TEwuCZQArqqTCmkG6HGcXFT0V9 PXFNNgV5jXMQRwU0O/ztJIQqsE5LsUomE//bLwzj9IVsaQpKDqW6TAPjcdBDPLHvriq7kGjt WhVhdl0qEYB8lkBEU7V2Yb+SYhmhpDrti9Fq1EsmhiHSkxJcGREoMK/63r9WLZYI3+4W2rAc UucZa4OT27U5ZISjNg3Ev0rxU5UH2/pT4wJCfxwocmqaRr6UYmrtZmND89X0KigoFD/XSeVv jwBRNjPAubK9/k5NoRrYqztM9W6sJqrH8+UWZ1Idd/DdmogJh0gNC0+N42Za9yBRURfIdKSb B3JfpUqcWwE7vUaYrHG1nw54pLUoPG6sAA7Mehl3nd4pZUALHwARAQABzSREYXZpZCBIaWxk ZW5icmFuZCA8ZGF2aWRAcmVkaGF0LmNvbT7CwZoEEwEIAEQCGwMCF4ACGQEFCwkIBwICIgIG FQoJCAsCBBYCAwECHgcWIQQb2cqtc1xMOkYN/MpN3hD3AP+DWgUCaJzangUJJlgIpAAKCRBN 3hD3AP+DWhAxD/9wcL0A+2rtaAmutaKTfxhTP0b4AAp1r/eLxjrbfbCCmh4pqzBhmSX/4z11 opn2KqcOsueRF1t2ENLOWzQu3Roiny2HOU7DajqB4dm1BVMaXQya5ae2ghzlJN9SIoopTWlR 0Af3hPj5E2PYvQhlcqeoehKlBo9rROJv/rjmr2x0yOM8qeTroH/ZzNlCtJ56AsE6Tvl+r7cW 3x7/Jq5WvWeudKrhFh7/yQ7eRvHCjd9bBrZTlgAfiHmX9AnCCPRPpNGNedV9Yty2Jnxhfmbv Pw37LA/jef8zlCDyUh2KCU1xVEOWqg15o1RtTyGV1nXV2O/mfuQJud5vIgzBvHhypc3p6VZJ lEf8YmT+Ol5P7SfCs5/uGdWUYQEMqOlg6w9R4Pe8d+mk8KGvfE9/zTwGg0nRgKqlQXrWRERv cuEwQbridlPAoQHrFWtwpgYMXx2TaZ3sihcIPo9uU5eBs0rf4mOERY75SK+Ekayv2ucTfjxr Kf014py2aoRJHuvy85ee/zIyLmve5hngZTTe3Wg3TInT9UTFzTPhItam6dZ1xqdTGHZYGU0O otRHcwLGt470grdiob6PfVTXoHlBvkWRadMhSuG4RORCDpq89vu5QralFNIf3EysNohoFy2A LYg2/D53xbU/aa4DDzBb5b1Rkg/udO1gZocVQWrDh6I2K3+cCs7BTQRVy5+RARAA59fefSDR 9nMGCb9LbMX+TFAoIQo/wgP5XPyzLYakO+94GrgfZjfhdaxPXMsl2+o8jhp/hlIzG56taNdt VZtPp3ih1AgbR8rHgXw1xwOpuAd5lE1qNd54ndHuADO9a9A0vPimIes78Hi1/yy+ZEEvRkHk /kDa6F3AtTc1m4rbbOk2fiKzzsE9YXweFjQvl9p+AMw6qd/iC4lUk9g0+FQXNdRs+o4o6Qvy iOQJfGQ4UcBuOy1IrkJrd8qq5jet1fcM2j4QvsW8CLDWZS1L7kZ5gT5EycMKxUWb8LuRjxzZ 3QY1aQH2kkzn6acigU3HLtgFyV1gBNV44ehjgvJpRY2cC8VhanTx0dZ9mj1YKIky5N+C0f21 zvntBqcxV0+3p8MrxRRcgEtDZNav+xAoT3G0W4SahAaUTWXpsZoOecwtxi74CyneQNPTDjNg azHmvpdBVEfj7k3p4dmJp5i0U66Onmf6mMFpArvBRSMOKU9DlAzMi4IvhiNWjKVaIE2Se9BY FdKVAJaZq85P2y20ZBd08ILnKcj7XKZkLU5FkoA0udEBvQ0f9QLNyyy3DZMCQWcwRuj1m73D sq8DEFBdZ5eEkj1dCyx+t/ga6x2rHyc8Sl86oK1tvAkwBNsfKou3v+jP/l14a7DGBvrmlYjO 59o3t6inu6H7pt7OL6u6BQj7DoMAEQEAAcLBfAQYAQgAJgIbDBYhBBvZyq1zXEw6Rg38yk3e EPcA/4NaBQJonNqrBQkmWAihAAoJEE3eEPcA/4NaKtMQALAJ8PzprBEXbXcEXwDKQu+P/vts IfUb1UNMfMV76BicGa5NCZnJNQASDP/+bFg6O3gx5NbhHHPeaWz/VxlOmYHokHodOvtL0WCC 8A5PEP8tOk6029Z+J+xUcMrJClNVFpzVvOpb1lCbhjwAV465Hy+NUSbbUiRxdzNQtLtgZzOV Zw7jxUCs4UUZLQTCuBpFgb15bBxYZ/BL9MbzxPxvfUQIPbnzQMcqtpUs21CMK2PdfCh5c4gS sDci6D5/ZIBw94UQWmGpM/O1ilGXde2ZzzGYl64glmccD8e87OnEgKnH3FbnJnT4iJchtSvx yJNi1+t0+qDti4m88+/9IuPqCKb6Stl+s2dnLtJNrjXBGJtsQG/sRpqsJz5x1/2nPJSRMsx9 5YfqbdrJSOFXDzZ8/r82HgQEtUvlSXNaXCa95ez0UkOG7+bDm2b3s0XahBQeLVCH0mw3RAQg r7xDAYKIrAwfHHmMTnBQDPJwVqxJjVNr7yBic4yfzVWGCGNE4DnOW0vcIeoyhy9vnIa3w1uZ 3iyY2Nsd7JxfKu1PRhCGwXzRw5TlfEsoRI7V9A8isUCoqE2Dzh3FvYHVeX4Us+bRL/oqareJ CIFqgYMyvHj7Q06kTKmauOe4Nf0l0qEkIuIzfoLJ3qr5UyXc2hLtWyT9Ir+lYlX9efqh7mOY qIws/H2t In-Reply-To: <20251029100909.3381140-10-kevin.brodsky@arm.com> X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: -2MwV6MVNpHE9pPizFv46-kj2KYETBLHKI8TDpjFDVY_1762185949 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 29.10.25 11:09, Kevin Brodsky wrote: > A per-CPU batch struct is activated when entering lazy MMU mode; its > lifetime is the same as the lazy MMU section (it is deactivated when > leaving the mode). Preemption is disabled in that interval to ensure > that the per-CPU reference remains valid. > > The generic lazy_mmu layer now tracks whether a task is in lazy MMU > mode. We can therefore use the generic helper in_lazy_mmu_mode() > to tell whether a batch struct is active instead of tracking it > explicitly. > > Signed-off-by: Kevin Brodsky > --- I suspect you were not able to test this on real HW. Some help from the ppc folks would be appreciated. LGTM, but the interaction with pause/resume adds a bit of complication on top. Acked-by: David Hildenbrand -- Cheers David From xen-devel-bounces@lists.xenproject.org Mon Nov 03 16:14:20 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 03 Nov 2025 16:14:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155425.1484916 (Exim 4.92) (envelope-from ) id 1vFxCD-000283-Gc; Mon, 03 Nov 2025 16:14:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155425.1484916; Mon, 03 Nov 2025 16:14:17 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFxCD-00027w-Dk; Mon, 03 Nov 2025 16:14:17 +0000 Received: by outflank-mailman (input) for mailman id 1155425; Mon, 03 Nov 2025 16:11:25 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFx9R-00024e-6J for xen-devel@lists.xenproject.org; Mon, 03 Nov 2025 16:11:25 +0000 Received: from sea.source.kernel.org (sea.source.kernel.org [2600:3c0a:e001:78e:0:1991:8:25]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id babde6dd-b8cf-11f0-980a-7dc792cee155; Mon, 03 Nov 2025 17:11:19 +0100 (CET) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id CF01A43237; Mon, 3 Nov 2025 16:11:16 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8A46CC4CEE7; Mon, 3 Nov 2025 16:11:08 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: babde6dd-b8cf-11f0-980a-7dc792cee155 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1762186276; bh=V1CU9ZdjaPBn/WuqIoDgCoBVzQIejoJ47+/3Iu7JZPI=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=npyBUuqjUIKg4InV+qpRD6OtpMB4/GHdS8B1NFF+Q9yYKiP+sb3TgKsbqJH8Sa1rZ IjmKf10sHhPZ9tJBExNMfKK9yT/VFR2YIZ9V/xn9DQdnHw+celZDegZhXdLQrF/SN5 lUex3DQHMkchog6zMIgVbKEfsJTbKokiYZLXNK0+peJ+RcXLboT6AnCcS4v+iq0vdd UNq+DePKElJQaoqkKpkF65sYRbAzqC1oOL9GKK49eQoY+wljWRBdmHyv0D0R45C04e nEuXWJ5n/3CnJfkZVAWRCYTclKE+cKq52lFKq1tbquYMBGM5LejdtS3JnqVMyuKIJJ wBZRvG6pryrXw== Message-ID: <15381b5c-726f-4eda-8ffd-c95c0acd7635@kernel.org> Date: Mon, 3 Nov 2025 17:11:06 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 10/12] sparc/mm: replace batch->active with in_lazy_mmu_mode() To: Kevin Brodsky , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-11-kevin.brodsky@arm.com> From: "David Hildenbrand (Red Hat)" Content-Language: en-US In-Reply-To: <20251029100909.3381140-11-kevin.brodsky@arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 29.10.25 11:09, Kevin Brodsky wrote: > A per-CPU batch struct is activated when entering lazy MMU mode; its > lifetime is the same as the lazy MMU section (it is deactivated when > leaving the mode). Preemption is disabled in that interval to ensure > that the per-CPU reference remains valid. > > The generic lazy_mmu layer now tracks whether a task is in lazy MMU > mode. We can therefore use the generic helper in_lazy_mmu_mode() > to tell whether a batch struct is active instead of tracking it > explicitly. > > Signed-off-by: Kevin Brodsky > --- > arch/sparc/include/asm/tlbflush_64.h | 1 - > arch/sparc/mm/tlb.c | 9 +-------- > 2 files changed, 1 insertion(+), 9 deletions(-) > > diff --git a/arch/sparc/include/asm/tlbflush_64.h b/arch/sparc/include/asm/tlbflush_64.h > index 4e1036728e2f..6133306ba59a 100644 > --- a/arch/sparc/include/asm/tlbflush_64.h > +++ b/arch/sparc/include/asm/tlbflush_64.h > @@ -12,7 +12,6 @@ struct tlb_batch { > unsigned int hugepage_shift; > struct mm_struct *mm; > unsigned long tlb_nr; > - unsigned long active; > unsigned long vaddrs[TLB_BATCH_NR]; > }; > > diff --git a/arch/sparc/mm/tlb.c b/arch/sparc/mm/tlb.c > index 7b5dfcdb1243..879e22c86e5c 100644 > --- a/arch/sparc/mm/tlb.c > +++ b/arch/sparc/mm/tlb.c > @@ -52,11 +52,7 @@ void flush_tlb_pending(void) > > void arch_enter_lazy_mmu_mode(void) > { > - struct tlb_batch *tb; > - > preempt_disable(); > - tb = this_cpu_ptr(&tlb_batch); > - tb->active = 1; > } > > void arch_flush_lazy_mmu_mode(void) > @@ -69,10 +65,7 @@ void arch_flush_lazy_mmu_mode(void) > > void arch_leave_lazy_mmu_mode(void) > { > - struct tlb_batch *tb = this_cpu_ptr(&tlb_batch); > - > arch_flush_lazy_mmu_mode(); > - tb->active = 0; > preempt_enable(); > } > > @@ -93,7 +86,7 @@ static void tlb_batch_add_one(struct mm_struct *mm, unsigned long vaddr, > nr = 0; > } > > - if (!tb->active) { > + if (!in_lazy_mmu_mode()) { > flush_tsb_user_page(mm, vaddr, hugepage_shift); > global_flush_tlb_page(mm, vaddr); > goto out; (messing up my transition to the email address as Thunderbird defaults to my old one still on mails received through RH servers) Did we get this tested with some help from sparc64 folks? Acked-by: David Hildenbrand (Red Hat) -- Cheers David From xen-devel-bounces@lists.xenproject.org Mon Nov 03 16:15:35 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 03 Nov 2025 16:15:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155436.1484927 (Exim 4.92) (envelope-from ) id 1vFxDR-0002d0-QM; Mon, 03 Nov 2025 16:15:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155436.1484927; Mon, 03 Nov 2025 16:15:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFxDR-0002ct-Mm; Mon, 03 Nov 2025 16:15:33 +0000 Received: by outflank-mailman (input) for mailman id 1155436; Mon, 03 Nov 2025 16:15:32 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFxDQ-0002cU-HE for xen-devel@lists.xenproject.org; Mon, 03 Nov 2025 16:15:32 +0000 Received: from sea.source.kernel.org (sea.source.kernel.org [2600:3c0a:e001:78e:0:1991:8:25]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 50d2a9e7-b8d0-11f0-980a-7dc792cee155; Mon, 03 Nov 2025 17:15:30 +0100 (CET) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 3D68643BB2; Mon, 3 Nov 2025 16:15:29 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 22BE5C4CEE7; Mon, 3 Nov 2025 16:15:19 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 50d2a9e7-b8d0-11f0-980a-7dc792cee155 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1762186529; bh=S0YKJr0SoBmysmz8IMr3QugNjlhYpJzfR41WjPWBUB4=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=pMmG9L/wSj8xOcK/DzcO7x+pUKpbN+kaGWRhPKGT/hFa2p/Ay8Nl1Mzz1ZWUyScDa vucJ0XbF6T0spIoI3AD/0qxqWiVKMh+Mmks24qxQFDpKZf3Zexx64cDs61lCh6Efy6 od0TqupiK1VEnDg7glIHKRlBc357kZIMtV/jM6SD3qxje1H7u2r4taFzH3oyOWmxWM hHnL2j3jQ8KEJexQD4wpbJBjPfYdQst+gwFFqah20VMhXD96dyPMbnm/scOYZnijeO WcP/Ww9iS8dXs6EdOUxwooqxO/I0VbjvAaMNzv31ZZN/WtGdcK9zJR5blHKdrg4t/9 0WafEdG9rsGng== Message-ID: Date: Mon, 3 Nov 2025 17:15:18 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 11/12] x86/xen: use lazy_mmu_state when context-switching To: Kevin Brodsky , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-12-kevin.brodsky@arm.com> From: "David Hildenbrand (Red Hat)" Content-Language: en-US In-Reply-To: <20251029100909.3381140-12-kevin.brodsky@arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 29.10.25 11:09, Kevin Brodsky wrote: > We currently set a TIF flag when scheduling out a task that is in > lazy MMU mode, in order to restore it when the task is scheduled > again. > > The generic lazy_mmu layer now tracks whether a task is in lazy MMU > mode in task_struct::lazy_mmu_state. We can therefore check that > state when switching to the new task, instead of using a separate > TIF flag. > > Signed-off-by: Kevin Brodsky > --- > arch/x86/include/asm/thread_info.h | 4 +--- > arch/x86/xen/enlighten_pv.c | 3 +-- > 2 files changed, 2 insertions(+), 5 deletions(-) > > diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h > index e71e0e8362ed..0067684afb5b 100644 > --- a/arch/x86/include/asm/thread_info.h > +++ b/arch/x86/include/asm/thread_info.h > @@ -100,8 +100,7 @@ struct thread_info { > #define TIF_FORCED_TF 24 /* true if TF in eflags artificially */ > #define TIF_SINGLESTEP 25 /* reenable singlestep on user return*/ > #define TIF_BLOCKSTEP 26 /* set when we want DEBUGCTLMSR_BTF */ > -#define TIF_LAZY_MMU_UPDATES 27 /* task is updating the mmu lazily */ > -#define TIF_ADDR32 28 /* 32-bit address space on 64 bits */ > +#define TIF_ADDR32 27 /* 32-bit address space on 64 bits */ > > #define _TIF_SSBD BIT(TIF_SSBD) > #define _TIF_SPEC_IB BIT(TIF_SPEC_IB) > @@ -114,7 +113,6 @@ struct thread_info { > #define _TIF_FORCED_TF BIT(TIF_FORCED_TF) > #define _TIF_BLOCKSTEP BIT(TIF_BLOCKSTEP) > #define _TIF_SINGLESTEP BIT(TIF_SINGLESTEP) > -#define _TIF_LAZY_MMU_UPDATES BIT(TIF_LAZY_MMU_UPDATES) > #define _TIF_ADDR32 BIT(TIF_ADDR32) > > /* flags to check in __switch_to() */ > diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c > index 4806cc28d7ca..f40f5999352e 100644 > --- a/arch/x86/xen/enlighten_pv.c > +++ b/arch/x86/xen/enlighten_pv.c > @@ -426,7 +426,6 @@ static void xen_start_context_switch(struct task_struct *prev) > > if (this_cpu_read(xen_lazy_mode) == XEN_LAZY_MMU) { > arch_leave_lazy_mmu_mode(); > - set_ti_thread_flag(task_thread_info(prev), TIF_LAZY_MMU_UPDATES); > } > enter_lazy(XEN_LAZY_CPU); > } > @@ -437,7 +436,7 @@ static void xen_end_context_switch(struct task_struct *next) > > xen_mc_flush(); > leave_lazy(XEN_LAZY_CPU); > - if (test_and_clear_ti_thread_flag(task_thread_info(next), TIF_LAZY_MMU_UPDATES)) > + if (next->lazy_mmu_state.active) This is nasty. If in_lazy_mmu_mode() is not sufficient, we will want to have a separate helper that makes it clear what the difference between both variants is. -- Cheers David From xen-devel-bounces@lists.xenproject.org Mon Nov 03 16:48:35 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 03 Nov 2025 16:48:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155460.1484948 (Exim 4.92) (envelope-from ) id 1vFxjL-0007pb-Fn; Mon, 03 Nov 2025 16:48:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155460.1484948; Mon, 03 Nov 2025 16:48:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFxjL-0007pU-DK; Mon, 03 Nov 2025 16:48:31 +0000 Received: by outflank-mailman (input) for mailman id 1155460; Mon, 03 Nov 2025 16:48:30 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFxjK-0007ix-72 for xen-devel@lists.xenproject.org; Mon, 03 Nov 2025 16:48:30 +0000 Received: from mail-ed1-x52b.google.com (mail-ed1-x52b.google.com [2a00:1450:4864:20::52b]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id ec45124b-b8d4-11f0-980a-7dc792cee155; Mon, 03 Nov 2025 17:48:28 +0100 (CET) Received: by mail-ed1-x52b.google.com with SMTP id 4fb4d7f45d1cf-640aa1445c3so2784753a12.1 for ; Mon, 03 Nov 2025 08:48:28 -0800 (PST) Received: from [192.168.1.6] (user-109-243-71-38.play-internet.pl. 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You can check that out from xen.git: git://xenbits.xen.org/xen.git 4.21.0-rc3 For your convenience there is also a tarball and the signature at: https://downloads.xenproject.org/release/xen/4.21.0-rc3/xen-4.21.0-rc3.tar.gz And the signature is at: https://downloads.xenproject.org/release/xen/4.21.0-rc3/xen-4.21.0-rc3.tar.gz.sig Have a nice week! ~ Oleksii --------------tkvSb5RnYcYjlIEZ6XZlO2Rk Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: 7bit 
Hello everyone,

Xen 4.21 rc3 is tagged. You can check that out from xen.git:
  git://xenbits.xen.org/xen.git 4.21.0-rc3

For your convenience there is also a tarball and the signature at:
  https://downloads.xenproject.org/release/xen/4.21.0-rc3/xen-4.21.0-rc3.tar.gz

And the signature is at:
  https://downloads.xenproject.org/release/xen/4.21.0-rc3/xen-4.21.0-rc3.tar.gz.sig

Have a nice week!

~ Oleksii


--------------tkvSb5RnYcYjlIEZ6XZlO2Rk-- From xen-devel-bounces@lists.xenproject.org Mon Nov 03 18:06:57 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 03 Nov 2025 18:06:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155494.1484959 (Exim 4.92) (envelope-from ) id 1vFyx1-000175-2r; Mon, 03 Nov 2025 18:06:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155494.1484959; Mon, 03 Nov 2025 18:06:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFyx0-00016y-W9; Mon, 03 Nov 2025 18:06:42 +0000 Received: by outflank-mailman (input) for mailman id 1155494; Mon, 03 Nov 2025 18:06:41 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFywz-00016s-Tu for xen-devel@lists.xenproject.org; Mon, 03 Nov 2025 18:06:41 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id d5e152b2-b8df-11f0-980a-7dc792cee155; Mon, 03 Nov 2025 19:06:36 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 183932A6B; Mon, 3 Nov 2025 10:06:27 -0800 (PST) Received: from [10.1.30.16] (unknown [10.1.30.16]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 67BAA3F694; Mon, 3 Nov 2025 10:06:27 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: d5e152b2-b8df-11f0-980a-7dc792cee155 Message-ID: Date: Mon, 3 Nov 2025 18:06:24 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 02/12] x86/xen: simplify flush_lazy_mmu() To: David Hildenbrand , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-3-kevin.brodsky@arm.com> <5a3ccb7e-9d36-4ac8-9634-c8dec3d6a47c@redhat.com> Content-Language: en-GB From: Kevin Brodsky In-Reply-To: <5a3ccb7e-9d36-4ac8-9634-c8dec3d6a47c@redhat.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 01/11/2025 12:14, David Hildenbrand wrote: > On 29.10.25 11:08, Kevin Brodsky wrote: >> arch_flush_lazy_mmu_mode() is called when outstanding batched >> pgtable operations must be completed immediately. There should >> however be no need to leave and re-enter lazy MMU completely. The >> only part of that sequence that we really need is xen_mc_flush(); >> call it directly. >> >> Signed-off-by: Kevin Brodsky >> --- >>   arch/x86/xen/mmu_pv.c | 6 ++---- >>   1 file changed, 2 insertions(+), 4 deletions(-) >> >> diff --git a/arch/x86/xen/mmu_pv.c b/arch/x86/xen/mmu_pv.c >> index 2a4a8deaf612..7a35c3393df4 100644 >> --- a/arch/x86/xen/mmu_pv.c >> +++ b/arch/x86/xen/mmu_pv.c >> @@ -2139,10 +2139,8 @@ static void xen_flush_lazy_mmu(void) >>   { >>       preempt_disable(); >>   -    if (xen_get_lazy_mode() == XEN_LAZY_MMU) { >> -        arch_leave_lazy_mmu_mode(); >> -        arch_enter_lazy_mmu_mode(); >> -    } >> +    if (xen_get_lazy_mode() == XEN_LAZY_MMU) >> +        xen_mc_flush(); >>         preempt_enable(); >>   } > > Looks like that was moved to XEN code in > > commit a4a7644c15096f57f92252dd6e1046bf269c87d8 > Author: Juergen Gross > Date:   Wed Sep 13 13:38:27 2023 +0200 > >     x86/xen: move paravirt lazy code > > > And essentially the previous implementation lived in > arch/x86/kernel/paravirt.c:paravirt_flush_lazy_mmu(void) in an > implementation-agnostic way: > > void paravirt_flush_lazy_mmu(void) > { >        preempt_disable(); > >        if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) { >                arch_leave_lazy_mmu_mode(); >                arch_enter_lazy_mmu_mode(); >        } > >        preempt_enable(); > } Indeed, I saw that too. Calling the generic leave/enter functions made some sense at that point, but now that the implementation is Xen-specific we can directly call xen_mc_flush(). > > So indeed, I assume just doing the flush here is sufficient. > > Reviewed-by: David Hildenbrand   Thanks for the review! - Kevin From xen-devel-bounces@lists.xenproject.org Mon Nov 03 18:09:05 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 03 Nov 2025 18:09:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155505.1484969 (Exim 4.92) (envelope-from ) id 1vFyzH-0001dt-FO; Mon, 03 Nov 2025 18:09:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155505.1484969; Mon, 03 Nov 2025 18:09:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFyzH-0001dm-C9; Mon, 03 Nov 2025 18:09:03 +0000 Received: by outflank-mailman (input) for mailman id 1155505; Mon, 03 Nov 2025 18:09:02 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFyzF-0001de-V1 for xen-devel@lists.xenproject.org; Mon, 03 Nov 2025 18:09:01 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 2a154c50-b8e0-11f0-9d16-b5c5bf9af7f9; Mon, 03 Nov 2025 19:08:57 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4DBAF2A6B; Mon, 3 Nov 2025 10:08:48 -0800 (PST) Received: from [10.1.30.16] (unknown [10.1.30.16]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 463A43F694; Mon, 3 Nov 2025 10:08:48 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 2a154c50-b8e0-11f0-9d16-b5c5bf9af7f9 Message-ID: <1965fe85-3734-45e9-af89-651c65845e8a@arm.com> Date: Mon, 3 Nov 2025 18:08:45 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 07/12] mm: enable lazy_mmu sections to nest To: David Hildenbrand , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-8-kevin.brodsky@arm.com> Content-Language: en-GB From: Kevin Brodsky In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 01/11/2025 12:22, David Hildenbrand wrote: > >>   static inline void lazy_mmu_mode_pause(void) >>   { >> +    struct lazy_mmu_state *state = ¤t->lazy_mmu_state; >> + >> +    VM_WARN_ON(state->nesting_level == 0 || !state->active); >> + >> +    state->active = false; >>       arch_leave_lazy_mmu_mode(); > > Just one question: > > Don't we want to allow for pause/resume when not enabled? Would seem > valid to me, because pause/resume code should actually not worry about > that, right? This does sound sensible, thanks for the suggestion. The initial goal was to allow functions that know they're called with lazy MMU enabled to be able to pause it temporarily if they need batching disabled. But we could generalise this to: if you know batching would break things, then you can preemptively add a pause/resume pair, and it won't do anything unless you're called with lazy MMU enabled. I also like this as this removes an invalid usage situation - now as long as you have balanced enable/disable and pause/resume calls, you're good. Will make that change in v5. - Kevin > > if (!state->nesting_level) { >     VM_WARN_ON(state->active); >     return; > } > VM_WARN_ON(!state->active); > state->active = false; > arch_leave_lazy_mmu_mode(); > From xen-devel-bounces@lists.xenproject.org Mon Nov 03 18:26:01 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 03 Nov 2025 18:26:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155515.1484978 (Exim 4.92) (envelope-from ) id 1vFzFa-0004S4-PF; Mon, 03 Nov 2025 18:25:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155515.1484978; Mon, 03 Nov 2025 18:25:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFzFa-0004Rx-Mi; Mon, 03 Nov 2025 18:25:54 +0000 Received: by outflank-mailman (input) for mailman id 1155515; Mon, 03 Nov 2025 18:25:53 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFzFZ-0004Rr-HE for xen-devel@lists.xenproject.org; Mon, 03 Nov 2025 18:25:53 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 8732420b-b8e2-11f0-9d16-b5c5bf9af7f9; Mon, 03 Nov 2025 19:25:52 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7EF862A6B; Mon, 3 Nov 2025 10:25:43 -0800 (PST) Received: from [10.1.30.16] (unknown [10.1.30.16]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E06143F694; Mon, 3 Nov 2025 10:25:43 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 8732420b-b8e2-11f0-9d16-b5c5bf9af7f9 Message-ID: <334d6272-a1c2-4075-a956-3f41908371a6@arm.com> Date: Mon, 3 Nov 2025 18:25:41 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 08/12] arm64: mm: replace TIF_LAZY_MMU with in_lazy_mmu_mode() To: David Hildenbrand , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-9-kevin.brodsky@arm.com> Content-Language: en-GB From: Kevin Brodsky In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 03/11/2025 16:03, David Hildenbrand wrote: > On 29.10.25 11:09, Kevin Brodsky wrote: >> The generic lazy_mmu layer now tracks whether a task is in lazy MMU >> mode. As a result we no longer need a TIF flag for that purpose - >> let's use the new in_lazy_mmu_mode() helper instead. >> >> Signed-off-by: Kevin Brodsky >> --- >>   arch/arm64/include/asm/pgtable.h     | 16 +++------------- >>   arch/arm64/include/asm/thread_info.h |  3 +-- >>   2 files changed, 4 insertions(+), 15 deletions(-) >> >> diff --git a/arch/arm64/include/asm/pgtable.h >> b/arch/arm64/include/asm/pgtable.h >> index 535435248923..61ca88f94551 100644 >> --- a/arch/arm64/include/asm/pgtable.h >> +++ b/arch/arm64/include/asm/pgtable.h >> @@ -62,30 +62,21 @@ static inline void emit_pte_barriers(void) >>     static inline void queue_pte_barriers(void) >>   { >> -    unsigned long flags; >> - >>       if (in_interrupt()) { >>           emit_pte_barriers(); >>           return; >>       } >>   -    flags = read_thread_flags(); >> - >> -    if (flags & BIT(TIF_LAZY_MMU)) { >> -        /* Avoid the atomic op if already set. */ >> -        if (!(flags & BIT(TIF_LAZY_MMU_PENDING))) >> -            set_thread_flag(TIF_LAZY_MMU_PENDING); >> -    } else { >> +    if (in_lazy_mmu_mode()) >> +        test_and_set_thread_flag(TIF_LAZY_MMU_PENDING); > > You likely don't want a test_and_set here, which would do a > test_and_set_bit() -- an atomic rmw. Ah yes good point, the new version would do an atomic RMW in all cases. Simpler code but also slower :/ > > You only want to avoid the atomic write if already set. > > So keep the current > >     /* Avoid the atomic op if already set. */ >     if (!(flags & BIT(TIF_LAZY_MMU_PENDING))) >         set_thread_flag(TIF_LAZY_MMU_PENDING);  Pretty much, since we're now only considering one flag we can simplify it to: if (!test_thread_flag(TIF_LAZY_MMU_PENDING))     set_thread_flag(TIF_LAZY_MMU_PENDING); - Kevin From xen-devel-bounces@lists.xenproject.org Mon Nov 03 18:29:15 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 03 Nov 2025 18:29:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155525.1484989 (Exim 4.92) (envelope-from ) id 1vFzIo-00054l-7T; Mon, 03 Nov 2025 18:29:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155525.1484989; Mon, 03 Nov 2025 18:29:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFzIo-00054e-3i; Mon, 03 Nov 2025 18:29:14 +0000 Received: by outflank-mailman (input) for mailman id 1155525; Mon, 03 Nov 2025 18:29:13 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vFzIn-00054Y-F9 for xen-devel@lists.xenproject.org; Mon, 03 Nov 2025 18:29:13 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id fdf544c5-b8e2-11f0-980a-7dc792cee155; Mon, 03 Nov 2025 19:29:11 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DD0752A6B; Mon, 3 Nov 2025 10:29:02 -0800 (PST) Received: from [10.1.30.16] (unknown [10.1.30.16]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 191F33F694; Mon, 3 Nov 2025 10:29:02 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: fdf544c5-b8e2-11f0-980a-7dc792cee155 Message-ID: <285faae4-dab6-4819-847a-889bdf87d5d7@arm.com> Date: Mon, 3 Nov 2025 18:29:00 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 11/12] x86/xen: use lazy_mmu_state when context-switching To: "David Hildenbrand (Red Hat)" , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-12-kevin.brodsky@arm.com> Content-Language: en-GB From: Kevin Brodsky In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 03/11/2025 16:15, David Hildenbrand (Red Hat) wrote: > On 29.10.25 11:09, Kevin Brodsky wrote: >> [...] >> >> @@ -437,7 +436,7 @@ static void xen_end_context_switch(struct >> task_struct *next) >>         xen_mc_flush(); >>       leave_lazy(XEN_LAZY_CPU); >> -    if (test_and_clear_ti_thread_flag(task_thread_info(next), >> TIF_LAZY_MMU_UPDATES)) >> +    if (next->lazy_mmu_state.active) > > This is nasty. If in_lazy_mmu_mode() is not sufficient, we will want > to have a separate helper that makes it clear what the difference > between both variants is. in_lazy_mmu_mode() operates on current, but here we're operating on a different task. The difference is more fundamental than just passing a task_struct * or not: in_lazy_mmu_mode() is about whether we're currently in lazy MMU mode, i.e. not paused and not in interrupt context. A task that isn't scheduled is never in lazy MMU mode - lazy_mmu_state.active is just the saved state to be restored when scheduled again. My point here is that we could have a helper for this use-case, but it should not be used in other situations (at least not on current). Maybe __task_lazy_mmu_active(task)? I do wonder if accessing lazy_mmu_state directly isn't expressing the intention well enough though (checking the saved state). - Kevin From xen-devel-bounces@lists.xenproject.org Mon Nov 03 19:24:00 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 03 Nov 2025 19:24:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155536.1484998 (Exim 4.92) (envelope-from ) id 1vG09a-0003wM-0O; Mon, 03 Nov 2025 19:23:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155536.1484998; Mon, 03 Nov 2025 19:23:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vG09Z-0003wF-TN; Mon, 03 Nov 2025 19:23:45 +0000 Received: by outflank-mailman (input) for mailman id 1155536; Mon, 03 Nov 2025 19:23:44 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vG09Y-0003w8-Ow for xen-devel@lists.xenproject.org; Mon, 03 Nov 2025 19:23:44 +0000 Received: from sea.source.kernel.org (sea.source.kernel.org [172.234.252.31]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 9b8467d4-b8ea-11f0-9d16-b5c5bf9af7f9; Mon, 03 Nov 2025 20:23:43 +0100 (CET) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 31D2D40763; Mon, 3 Nov 2025 19:23:41 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9BEBEC4CEE7; Mon, 3 Nov 2025 19:23:32 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 9b8467d4-b8ea-11f0-9d16-b5c5bf9af7f9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1762197821; bh=YF+Dh7k5RXyD8ZknLWrr6zckBVz5y8Jk5LVnJjqJxoY=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=c9UT0S1aE+oyoVDfFS4tVvZUGvWl9HiC7/F+Cp66KCVA7C4GhH0PqNtoBTarCw3iW r2P630kamF4JSjUnf0EzY4gdgF4lREKNM2+yjmeoTw3nLHhjxYDny/gqAjP3iNUL7a JzIyQ1aRH3QyNtDz4IpxtL5MX/fDHZSJh77cPeKd7LS92GluG1GXIy1BpAiLFwvlox cRJrDCtLOcgMqEzgJxz44Oa9sLKyl40ixdJjaMo6LOW9qbHf4ryeTRFym1qVmpu9UH uIilWOADkYHyRHPzn2EvdQ0ZptspxmBomG3l6lNVoh9BMoIycP2QxAs9MQX9p7Fs9q 9DzIobQXg5JOg== Message-ID: Date: Mon, 3 Nov 2025 20:23:30 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 11/12] x86/xen: use lazy_mmu_state when context-switching To: Kevin Brodsky , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-12-kevin.brodsky@arm.com> <285faae4-dab6-4819-847a-889bdf87d5d7@arm.com> From: "David Hildenbrand (Red Hat)" Content-Language: en-US In-Reply-To: <285faae4-dab6-4819-847a-889bdf87d5d7@arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 03.11.25 19:29, Kevin Brodsky wrote: > On 03/11/2025 16:15, David Hildenbrand (Red Hat) wrote: >> On 29.10.25 11:09, Kevin Brodsky wrote: >>> [...] >>> >>> @@ -437,7 +436,7 @@ static void xen_end_context_switch(struct >>> task_struct *next) >>>         xen_mc_flush(); >>>       leave_lazy(XEN_LAZY_CPU); >>> -    if (test_and_clear_ti_thread_flag(task_thread_info(next), >>> TIF_LAZY_MMU_UPDATES)) >>> +    if (next->lazy_mmu_state.active) >> >> This is nasty. If in_lazy_mmu_mode() is not sufficient, we will want >> to have a separate helper that makes it clear what the difference >> between both variants is. > > in_lazy_mmu_mode() operates on current, but here we're operating on a > different task. The difference is more fundamental than just passing a > task_struct * or not: in_lazy_mmu_mode() is about whether we're > currently in lazy MMU mode, i.e. not paused and not in interrupt > context. A task that isn't scheduled is never in lazy MMU mode - > lazy_mmu_state.active is just the saved state to be restored when > scheduled again. > > My point here is that we could have a helper for this use-case, but it > should not be used in other situations (at least not on current). Maybe > __task_lazy_mmu_active(task)? I do wonder if accessing lazy_mmu_state > directly isn't expressing the intention well enough though (checking the > saved state). Likely there should be a /** * task_lazy_mmu_active - test whether the lazy-mmu mode is active for a * task * @task: ... * * The lazy-mmu mode is active if a task has lazy-mmu mode enabled and * currently not paused. */ static inline bool task_lazy_mmu_active(struct task_struct *task) { return task->lazy_mmu_state.active; } /** * in_lazy_mmu_mode() - test whether current is in lazy-mmu mode * * Test whether the current task is in lazy-mmu mode: whether the * interrupts are enabled and the lazy-mmu mode is active for the * current task. */ static inline bool in_lazy_mmu_mode(void) { + if (in_interrupt()) + return false; + return task_lazy_mmu_active(current); } Something like that. Maybe we can find better terminology. -- Cheers David From xen-devel-bounces@lists.xenproject.org Mon Nov 03 19:34:18 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 03 Nov 2025 19:34:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155546.1485008 (Exim 4.92) (envelope-from ) id 1vG0Jh-0005ee-U1; Mon, 03 Nov 2025 19:34:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155546.1485008; Mon, 03 Nov 2025 19:34:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vG0Jh-0005eX-QV; Mon, 03 Nov 2025 19:34:13 +0000 Received: by outflank-mailman (input) for mailman id 1155546; Mon, 03 Nov 2025 19:34:12 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vG0Jg-0005eN-FL for xen-devel@lists.xenproject.org; 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a=rsa-sha256; c=relaxed/simple; d=bugseng.com; s=mail; t=1762198449; bh=n2KvhSyyYZELIeQypXP1VynbbTN5spCKqN1M2riE0io=; h=From:To:Cc:Subject:Date:From; b=rz0OjJelpMKOAsGj0vnJGT9NqJETMuQdGcPHQDaZtcbiaeD78jtlmYBJJJBlbTpgh tj035XuI709824zp0uhpFEOtP1UUvtjNtRjSbRQkK529m/5+tmj3yVrpsCKmXgNGkZ VtKeEhY+SOk/3+EcKfGOdzLwlHGr/+ufZnblcbtGoheG7+XJ51xxilfpfnCsJVkdhx MdJzDdarAw115gL8RSGbdBu1b/RGYfzjk7rBMU48LbnnnTyE6lVDFPZA17tRwD9I6w dzSWfWvRhM3Ra9CPCMfQnCQNWPMlIqlKw7e/2ANIBVSE9FSbL/WEMlFxuEWZJt8r1H RefSCp+rKDeJA== From: Nicola Vetrini To: xen-devel@lists.xenproject.org Cc: sstabellini@kernel.org, consulting@bugseng.com, Nicola Vetrini , Doug Goldstein Subject: [XEN PATCH v4] automation/eclair: add new analysis jobs with differing configurations Date: Mon, 3 Nov 2025 20:34:04 +0100 Message-ID: <6244858973ae88195405630b4a6847085ffce638.1762198392.git.nicola.vetrini@bugseng.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The following analysis jobs are performed: - eclair-{x86_64,ARM64}: analyze Xen using the default configuration for that architecture; runs on runners tagged `eclair-analysis'. - eclair-{x86-64,ARM64}-safety: analyze Xen using the configuration for safety, which is more restricted; runs on runners tagged `eclair-analysis-safety`. - eclair-{x86_64,ARM64}-testing: analyze Xen using the default configuration for the purposes of testing new runner updates; runs on runners tagged `eclair-analysis-testing`. Signed-off-by: Nicola Vetrini --- CI pipeline: https://gitlab.com/xen-project/people/bugseng/xen/-/pipelines/2136967775 Note: the eclair-ARM64 and eclair-x86_64 jobs are allowed to fail because the configuration is not (yet) clean for all checked MISRA guidelines. Changes in v4: - Do not allow *-safety jobs to fail, as they should be clean - Drop check on CI_COMMIT_BRANCH for *-safety analyses Changes in v3: - Use a variable instead of testing the repository PATH to decide whether a job should be run for *-testing and *-safety analyses; - Allow eclair-{x86_64,ARM64} default configurations to fail, as the configuration is not yet clean for MISRA. Changes in v2: - rebased to current staging; - fixed regex path issue. --- automation/gitlab-ci/analyze.yaml | 42 +++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/automation/gitlab-ci/analyze.yaml b/automation/gitlab-ci/analyze.yaml index d50721006740..d22d1dbbc3de 100644 --- a/automation/gitlab-ci/analyze.yaml +++ b/automation/gitlab-ci/analyze.yaml @@ -45,6 +45,23 @@ eclair-x86_64: LOGFILE: "eclair-x86_64.log" VARIANT: "X86_64" RULESET: "monitored" + allow_failure: true + +eclair-x86_64-testing: + extends: eclair-x86_64 + tags: + - eclair-analysis-testing + rules: + - if: $ECLAIR_TESTING + when: always + - !reference [.eclair-analysis:triggered, rules] + +eclair-x86_64-safety: + extends: eclair-x86_64 + tags: + - eclair-analysis-safety + allow_failure: false + variables: EXTRA_XEN_CONFIG: | CONFIG_AMD=y CONFIG_INTEL=n @@ -75,6 +92,10 @@ eclair-x86_64: CONFIG_DEBUG_LOCKS=n CONFIG_SCRUB_DEBUG=n CONFIG_XMEM_POOL_POISON=n + rules: + - if: $ECLAIR_SAFETY + when: always + - !reference [.eclair-analysis:triggered, rules] eclair-ARM64: extends: .eclair-analysis:triggered @@ -82,6 +103,23 @@ eclair-ARM64: LOGFILE: "eclair-ARM64.log" VARIANT: "ARM64" RULESET: "monitored" + allow_failure: true + +eclair-ARM64-testing: + extends: eclair-ARM64 + tags: + - eclair-analysis-testing + rules: + - if: $ECLAIR_TESTING + when: always + - !reference [.eclair-analysis:triggered, rules] + +eclair-ARM64-safety: + extends: eclair-ARM64 + tags: + - eclair-analysis-safety + allow_failure: false + variables: EXTRA_XEN_CONFIG: | CONFIG_NR_CPUS=16 CONFIG_GICV2=n @@ -120,6 +158,10 @@ eclair-ARM64: CONFIG_DEBUG_LOCKS=n CONFIG_SCRUB_DEBUG=n CONFIG_XMEM_POOL_POISON=n + rules: + - if: $ECLAIR_SAFETY + when: always + - !reference [.eclair-analysis, rules] .eclair-analysis:on-schedule: extends: .eclair-analysis -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Mon Nov 03 22:53:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 03 Nov 2025 22:53:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155561.1485019 (Exim 4.92) (envelope-from ) id 1vG3Q0-0003cf-Cs; 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Mon, 3 Nov 2025 22:52:48 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4F33AC4CEE7; Mon, 3 Nov 2025 22:52:47 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: d224cb5e-b907-11f0-9d16-b5c5bf9af7f9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1762210368; bh=1zFMlAkxdP/FaogxlZKIBJSzDh5MzEvApxvRlOZ46TY=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=JGY7m6fdEbdsD7XJSyOhGWAzK01Lsg8ekRY5mlPd6iE96iRSeyNY42jK0cjUlQiaW r1r2mqMCYvFcGCplDNav2Io8dfBPRmBcyj+6Pra++WhsfW9TV1ijldkSyL43S3YaU5 9iS3GGEGtUAU9RlaDnRCR9nYvOJUGsvKuVGpGsNc0+2+SOquw8opzCntJNdwHeiVLC 59W0W3EMRw5pN2Iwp8eN35LNaW3EA1Om+KjIiAG3YZNqLXbacMCXuAcm6jS9xqjUQO fXuPDZc+fTw/ln77SmKz6TP70Nt81vLEjz+uEj3fjUZ0RdZ9zaSTkY9Ta2z0R0Uj/p eVUz0tUMUJ9dQ== Date: Mon, 3 Nov 2025 14:52:46 -0800 (PST) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Nicola Vetrini cc: xen-devel@lists.xenproject.org, sstabellini@kernel.org, consulting@bugseng.com, Doug Goldstein Subject: Re: [XEN PATCH v4] automation/eclair: add new analysis jobs with differing configurations In-Reply-To: <6244858973ae88195405630b4a6847085ffce638.1762198392.git.nicola.vetrini@bugseng.com> Message-ID: References: <6244858973ae88195405630b4a6847085ffce638.1762198392.git.nicola.vetrini@bugseng.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Mon, 3 Nov 2025, Nicola Vetrini wrote: > The following analysis jobs are performed: > - eclair-{x86_64,ARM64}: analyze Xen using the default configuration for > that architecture; runs on runners tagged `eclair-analysis'. > > - eclair-{x86-64,ARM64}-safety: analyze Xen using the configuration for > safety, which is more restricted; runs on runners tagged > `eclair-analysis-safety`. > > - eclair-{x86_64,ARM64}-testing: analyze Xen using the default > configuration for the purposes of testing new runner updates; runs on > runners tagged `eclair-analysis-testing`. > > Signed-off-by: Nicola Vetrini Reviewed-by: Stefano Stabellini I'll commit it as soon as the tree reopens. > --- > CI pipeline: https://gitlab.com/xen-project/people/bugseng/xen/-/pipelines/2136967775 > > Note: the eclair-ARM64 and eclair-x86_64 jobs are allowed to fail because the > configuration is not (yet) clean for all checked MISRA guidelines. > > Changes in v4: > - Do not allow *-safety jobs to fail, as they should be clean > - Drop check on CI_COMMIT_BRANCH for *-safety analyses > Changes in v3: > - Use a variable instead of testing the repository PATH to decide whether a job > should be run for *-testing and *-safety analyses; > - Allow eclair-{x86_64,ARM64} default configurations to fail, as the configuration > is not yet clean for MISRA. > Changes in v2: > - rebased to current staging; > - fixed regex path issue. > --- > automation/gitlab-ci/analyze.yaml | 42 +++++++++++++++++++++++++++++++ > 1 file changed, 42 insertions(+) > > diff --git a/automation/gitlab-ci/analyze.yaml b/automation/gitlab-ci/analyze.yaml > index d50721006740..d22d1dbbc3de 100644 > --- a/automation/gitlab-ci/analyze.yaml > +++ b/automation/gitlab-ci/analyze.yaml > @@ -45,6 +45,23 @@ eclair-x86_64: > LOGFILE: "eclair-x86_64.log" > VARIANT: "X86_64" > RULESET: "monitored" > + allow_failure: true > + > +eclair-x86_64-testing: > + extends: eclair-x86_64 > + tags: > + - eclair-analysis-testing > + rules: > + - if: $ECLAIR_TESTING > + when: always > + - !reference [.eclair-analysis:triggered, rules] > + > +eclair-x86_64-safety: > + extends: eclair-x86_64 > + tags: > + - eclair-analysis-safety > + allow_failure: false > + variables: > EXTRA_XEN_CONFIG: | > CONFIG_AMD=y > CONFIG_INTEL=n > @@ -75,6 +92,10 @@ eclair-x86_64: > CONFIG_DEBUG_LOCKS=n > CONFIG_SCRUB_DEBUG=n > CONFIG_XMEM_POOL_POISON=n > + rules: > + - if: $ECLAIR_SAFETY > + when: always > + - !reference [.eclair-analysis:triggered, rules] > > eclair-ARM64: > extends: .eclair-analysis:triggered > @@ -82,6 +103,23 @@ eclair-ARM64: > LOGFILE: "eclair-ARM64.log" > VARIANT: "ARM64" > RULESET: "monitored" > + allow_failure: true > + > +eclair-ARM64-testing: > + extends: eclair-ARM64 > + tags: > + - eclair-analysis-testing > + rules: > + - if: $ECLAIR_TESTING > + when: always > + - !reference [.eclair-analysis:triggered, rules] > + > +eclair-ARM64-safety: > + extends: eclair-ARM64 > + tags: > + - eclair-analysis-safety > + allow_failure: false > + variables: > EXTRA_XEN_CONFIG: | > CONFIG_NR_CPUS=16 > CONFIG_GICV2=n > @@ -120,6 +158,10 @@ eclair-ARM64: > CONFIG_DEBUG_LOCKS=n > CONFIG_SCRUB_DEBUG=n > CONFIG_XMEM_POOL_POISON=n > + rules: > + - if: $ECLAIR_SAFETY > + when: always > + - !reference [.eclair-analysis, rules] > > .eclair-analysis:on-schedule: > extends: .eclair-analysis > -- > 2.43.0 > From xen-devel-bounces@lists.xenproject.org Tue Nov 04 07:51:37 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Nov 2025 07:51:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155571.1485029 (Exim 4.92) (envelope-from ) id 1vGBoy-000096-9A; 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boundary="_000_KL1PR0601MB4588FE9914010324E0CFE328E6C4AKL1PR0601MB4588_" MIME-Version: 1.0 X-OriginatorOrg: siemens.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: KL1PR0601MB4588.apcprd06.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 4d6da19e-dc39-4ad8-538c-08de1b76e177 X-MS-Exchange-CrossTenant-originalarrivaltime: 04 Nov 2025 07:50:53.5836 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 38ae3bcd-9579-4fd4-adda-b42e1495d55a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: yHn2z9mFiPGIoyy5tFjtCNZCAw9iCQOPOcn6cZU0+7SWTmuK9yRGBPv0slpcJnUfIkFsWYNfikHHZhbcNkJWKA0CO9dVmBjJI532yeNX5oY= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SEZPR06MB6060 --_000_KL1PR0601MB4588FE9914010324E0CFE328E6C4AKL1PR0601MB4588_ Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Hi, > Does this mean only one ioctl call will be issue per blob will be used? Yes, one ioctl is issued to add all pages to physmap IOCTL_PRIVCMD_MMAPBATC= H_V2 then all pages are removed from physmap as a result of munmap(). > At least to me, it feels like switching to TLBI range (or a series os IPA= S2E1IS) is an easier win. But if you feel like doing the larger rework, I w= ould be happy to have a look to check whether it would be an acceptable cha= nge for upstream. Thank you. Yes, I agree. I just wanted a solution that also works for older= CPUs. A series of IPAS2E1IS can work for older CPUs but there will be a lo= t of invocations (222815 * 4K, using the same example). Although, each invo= cation would be much less costly as compared to VMALLS12E1IS, so still seem= s like a viable solution. I shall evaluate this and let you know. > IPAS2E1IS only allows you to invalidate one address at the time and is av= ailable on all processors. The R version is only available when the process= or support TLBI range and allow you to invalidate multiple contiguous addre= ss. Thanks, got it. Regards, Haseeb --_000_KL1PR0601MB4588FE9914010324E0CFE328E6C4AKL1PR0601MB4588_ Content-Type: text/html; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable
Hi,

> Does this mean only one ioctl call will be issue per blob will be u= sed?
Yes, one ioctl is issued to add all pages to physmap IOCTL_PRIVCMD_MMAPBATC= H_V2 then all pages are removed from physmap as a result of munmap().

> At least to me, it feels like switching to TLBI range (or a series os = IPAS2E1IS) is an easier win. But if you feel like doing the larger rework, = I would be happy to have a look to check whether it would be an acceptable = change for upstream.
Thank you. Yes, I agree. I just wanted a solution that also works for older= CPUs. A series of IPAS2E1IS can work for older CPUs but there will be a lo= t of invocations (222815 * 4K, using the same example). Although, each invo= cation would be much less costly as compared to VMALLS12E1IS, so still seems like a viable solution. I shal= l evaluate this and let you know.

> IPAS2E1IS only allows you to invalidate one address at the time and is= available on all processors. The R version is only available when the proc= essor support TLBI range and allow you to invalidate multiple contiguous ad= dress.
Thanks, got it.

Regards,
Haseeb

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bh=rlwXJ/+nft5CPvYCLciFDs2CX9rZFvBKrO8pzoGX55U=; b=uWDw9gp2kx8VI7/xmWlQIsixZpa3svS7q3uUBobb4TAA6OYn0aOso7gC1ttcvYAdJQpDRpb6bXfGS4YLtTNuxJgfZVw35zB2bm/F8hS36PftiTrhl5VIXTCiSArp4ZPhl+C+fbV0Ri836mY76StWupG39e4f184AVD5+W5rATHQ= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb08.amd.com; pr=C Message-ID: <079ac98e-b44c-48d3-b3fc-6bd92461827c@amd.com> Date: Tue, 4 Nov 2025 10:53:37 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/3] arm: Implement setup_mm for MPU systems To: Harry Ramsey , CC: , Harry Ramsey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk References: <20251024153719.408806-1-harry.ramsey@arm.com> <20251024153719.408806-2-harry.ramsey@arm.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20251024153719.408806-2-harry.ramsey@arm.com> Content-Type: text/plain; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Nov 2025 09:53:39.7953 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 41ba9ada-a6e5-4526-ebc7-08de1b880819 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF00036F3F.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY3PR12MB9655 On 24/10/2025 17:37, Harry Ramsey wrote: > From: Harry Ramsey > > Implement `setup_mm` for MPU systems. This variant does not require > setting up a direct map. > > To reduce code duplication the common initalisation code for both MPU > and MMU Arm64 configurations is refactored into `setup_mm`. Platform-specific > setup steps are now handled by a new helper function `setup_mm_helper`. > > Signed-off-by: Harry Ramsey > --- > xen/arch/arm/arm64/mmu/mm.c | 26 +------------------- > xen/arch/arm/include/asm/mm.h | 2 ++ > xen/arch/arm/mm.c | 45 +++++++++++++++++++++++++++++++++++ > xen/arch/arm/mpu/mm.c | 30 +++++++++++++++++++++-- > 4 files changed, 76 insertions(+), 27 deletions(-) > > diff --git a/xen/arch/arm/arm64/mmu/mm.c b/xen/arch/arm/arm64/mmu/mm.c > index 3e64be6ae6..70b53be032 100644 > --- a/xen/arch/arm/arm64/mmu/mm.c > +++ b/xen/arch/arm/arm64/mmu/mm.c > @@ -4,8 +4,6 @@ > #include > #include > #include > -#include > -#include > > #include > > @@ -240,33 +238,18 @@ static void __init setup_directmap_mappings(unsigned long base_mfn, > panic("Unable to setup the directmap mappings.\n"); > } > > -void __init setup_mm(void) > +void __init setup_mm_helper(void) > { > const struct membanks *banks = bootinfo_get_mem(); > paddr_t ram_start = INVALID_PADDR; > paddr_t ram_end = 0; > - paddr_t ram_size = 0; > unsigned int i; > > - init_pdx(); > - > - /* > - * We need some memory to allocate the page-tables used for the directmap > - * mappings. But some regions may contain memory already allocated > - * for other uses (e.g. modules, reserved-memory...). > - * > - * For simplicity, add all the free regions in the boot allocator. > - */ > - populate_boot_allocator(); > - > - total_pages = 0; > - > for ( i = 0; i < banks->nr_banks; i++ ) > { > const struct membank *bank = &banks->bank[i]; > paddr_t bank_end = bank->start + bank->size; > > - ram_size = ram_size + bank->size; > ram_start = min(ram_start, bank->start); > ram_end = max(ram_end, bank_end); > > @@ -274,16 +257,9 @@ void __init setup_mm(void) > PFN_DOWN(bank->size)); > } > > - total_pages += ram_size >> PAGE_SHIFT; > - > directmap_virt_end = XENHEAP_VIRT_START + ram_end - ram_start; > directmap_mfn_start = maddr_to_mfn(ram_start); > directmap_mfn_end = maddr_to_mfn(ram_end); > - > - setup_frametable_mappings(ram_start, ram_end); > - > - init_staticmem_pages(); > - init_sharedmem_pages(); > } > > /* > diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h > index 7a93dad2ed..1f5b41e602 100644 > --- a/xen/arch/arm/include/asm/mm.h > +++ b/xen/arch/arm/include/asm/mm.h > @@ -202,6 +202,8 @@ extern void remove_early_mappings(void); > extern int prepare_secondary_mm(int cpu); > /* Map a frame table to cover physical addresses ps through pe */ > extern void setup_frametable_mappings(paddr_t ps, paddr_t pe); > +/* Helper function to setup memory management */ > +extern void setup_mm_helper(void); No extern for prototypes, please. > /* map a physical range in virtual memory */ > void __iomem *ioremap_attr(paddr_t start, size_t len, unsigned int attributes); > > diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c > index 3b05b46ee0..f26c28aaf5 100644 > --- a/xen/arch/arm/mm.c > +++ b/xen/arch/arm/mm.c > @@ -12,8 +12,12 @@ > #include > #include > #include > +#include > +#include > #include > > +#include > + > #include > > #include > @@ -24,6 +28,47 @@ > > unsigned long frametable_base_pdx __read_mostly; > > +#if !defined(CONFIG_ARM_32) || defined(CONFIG_MPU) NIT: Why negation instead of CONFIG_ARM_64? > +void __init setup_mm(void) > +{ > + const struct membanks *banks = bootinfo_get_mem(); > + paddr_t ram_start = INVALID_PADDR; > + paddr_t ram_end = 0; > + paddr_t ram_size = 0; > + unsigned int i; > + > + init_pdx(); > + > + /* > + * We need some memory to allocate the page-tables used for the directmap Isn't this comment here now a bit misleading in MPU case? > + * mappings. But some regions may contain memory already allocated > + * for other uses (e.g. modules, reserved-memory...). > + * > + * For simplicity, add all the free regions in the boot allocator. > + */ > + populate_boot_allocator(); NIT: I would suggest to move this right before setup_mm_helper() with a comment tweaked. > + > + for ( i = 0; i < banks->nr_banks; i++ ) > + { > + const struct membank *bank = &banks->bank[i]; > + paddr_t bank_end = bank->start + bank->size; > + > + ram_size = ram_size + bank->size; > + ram_start = min(ram_start, bank->start); > + ram_end = max(ram_end, bank_end); > + } > + > + total_pages = ram_size >> PAGE_SHIFT; > + > + setup_mm_helper(); > + > + setup_frametable_mappings(ram_start, ram_end); > + > + init_staticmem_pages(); > + init_sharedmem_pages(); > +} > +#endif > + > bool flags_has_rwx(unsigned int flags) > { > /* > diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c > index 3f155b7db2..a058db19ef 100644 > --- a/xen/arch/arm/mpu/mm.c > +++ b/xen/arch/arm/mpu/mm.c > @@ -8,9 +8,11 @@ > #include > #include > #include > +#include Alphabetic sorting, please. > #include > #include > #include > +#include > #include > > struct page_info *frame_table; > @@ -378,9 +380,33 @@ int map_pages_to_xen(unsigned long virt, mfn_t mfn, unsigned long nr_mfns, > return xen_mpumap_update(virt, mfn_to_maddr(mfn_add(mfn, nr_mfns)), flags); > } > > -void __init setup_mm(void) > +/* > + * Heap must be statically configured in Device Tree through "xen,static-heap" > + * on MPU systems, use setup_mm_helper() for that. > + */ > +void __init setup_mm_helper(void) > { > - BUG_ON("unimplemented"); > + const struct membanks *reserved_mem = bootinfo_get_reserved_mem(); > + unsigned int bank = 0; > + > + for ( ; bank < reserved_mem->nr_banks; bank++ ) > + { > + if ( reserved_mem->bank[bank].type == MEMBANK_STATIC_HEAP ) > + { > + paddr_t bank_start = round_pgup(reserved_mem->bank[bank].start); > + paddr_t bank_size = round_pgdown(reserved_mem->bank[bank].size); > + paddr_t bank_end = bank_start + bank_size; > + > + /* Map static heap with one MPU protection region */ > + if ( xen_mpumap_update(bank_start, bank_end, PAGE_HYPERVISOR) ) > + panic("Failed to map static heap\n"); > + > + break; > + } > + } > + > + if ( bank == reserved_mem->nr_banks ) > + panic("No static heap memory bank found\n"); > } > > int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int nf) Apart from that, the changes LGTM. ~Michal From xen-devel-bounces@lists.xenproject.org Tue Nov 04 10:21:29 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Nov 2025 10:21:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155600.1485048 (Exim 4.92) (envelope-from ) id 1vGEAF-0002yR-0y; Tue, 04 Nov 2025 10:21:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155600.1485048; Tue, 04 Nov 2025 10:21:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGEAE-0002yK-UT; Tue, 04 Nov 2025 10:21:22 +0000 Received: by outflank-mailman (input) for mailman id 1155600; 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pr=C Message-ID: <0e681f9f-a563-4ace-8f58-e80a050608ba@amd.com> Date: Tue, 4 Nov 2025 11:21:10 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/3] arm: Implement reference counting for overlapping regions To: Harry Ramsey , CC: , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk References: <20251024153719.408806-1-harry.ramsey@arm.com> <20251024153719.408806-3-harry.ramsey@arm.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20251024153719.408806-3-harry.ramsey@arm.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF0000150B:EE_|LV8PR12MB9135:EE_ X-MS-Office365-Filtering-Correlation-Id: 04565515-6be6-4e3a-0f4d-08de1b8be152 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|376014|36860700013|7053199007; X-Microsoft-Antispam-Message-Info: =?utf-8?B?YWhYY2EwNmJqeFhrR0FGb3lyWlJzSzczcXNiRFRlNFp5MkVVZkZsc1lsOHVI?= =?utf-8?B?S3Joc1NkQjBFY2FXWkRabU1SNVVhbGhvOElOVjMzdWErQ3Z6VWlrK1VlV1o0?= =?utf-8?B?ZXdrbnBwQTdwYVZBWFRvRWlHd1ZENmRja0JGYTVWeERFamFENUxoRUVtRWtW?= =?utf-8?B?amlaTHUwR055cUpnb2dZT0cvS3pWam1sNlpsQjNCTHJHMnczTVZ0OWpxTjR3?= =?utf-8?B?VWE4dlVTQ0UxNDFNbUlEcE5qUENqZVNBd3FJdTBhcnFQSkpGTStmS3pXMXBZ?= =?utf-8?B?T0RpMVdURGVYNElyd1dseXN1VGM4SHlyYXovWWZwTlB2cDA4MkpQTUhYS2tW?= =?utf-8?B?a2xhb1hVYkc2WE5RdzMwMXE3RW8wK1lVMUE0Tmo2Z05zTjJTNzhMV2hlVFNn?= =?utf-8?B?TGxvUUQxeWVaSUdabzdaVk1RQjNBMjhhdEkvYWJsRGs5czZqQ0RNT1FsNkg3?= =?utf-8?B?ZE9LQmV5SDFSYnZGN2ZKYXd1NmhQUDBHM1VWbXdKMGdkSkZiZXBwb2dzdTVO?= =?utf-8?B?czJyVDBWSU9kK3V0RjRWR2QxQW1DTE92cHRTNFpDb2ZONlVmSHlzNERhemlD?= =?utf-8?B?UVRGQkgreVlSeWF6YisvK1c1SHBNU2IzbnRFaHFwbkVBbjk4bzZXcFA3SER2?= =?utf-8?B?Rllzc3hxbTVVdlRldUp1bnNFSVlYYXY2ejBSd0w0M2t3N3JWWW5DTTExY3hY?= =?utf-8?B?d1FwRWlBT2Q3ZlozWTNReFRjQXlZVWd1VnlyN0F1V2dPV3V4aFU3S1J1VEMy?= =?utf-8?B?amdTTHhTM0tyaFVEODI2WStqR2NBRlVpNlFZOWQvMnorM05oeXR0RllTVjFn?= =?utf-8?B?OEFVMnFiVExBTmloRXhXMlh5UFZKeFNzTk1KOHdGSW5jVTlOZmdOejJEZmww?= =?utf-8?B?TjZMaUlleHUxU1p2U0hOUEdmQ1lrVWFWRDNsNjI5NlY4MDFHNjFVOG5RUFpZ?= =?utf-8?B?bktveCtXcDFmeGE1bFFGVlVaSWM3K0VQQit4WDZMa2N6VkxDQUJUS3NLc0pR?= =?utf-8?B?V3h3VnV5QjBLb1FZMTBadVIrbFFhak5KbG1EeUIxaHhlaUQ0ZTE4RG9Hb0hQ?= =?utf-8?B?d0RQMGtrWml5c3MwN1Z0ZzUraTRLS0d4RlN0NksrWHlTd2o4bmI2RkE2WWh4?= =?utf-8?B?SUM1MVh3S2N3SGJScVB1R1JhdjJGVEpVQTBuWElBV3pqZUV0M0Rpd2FVWkVa?= =?utf-8?B?OVozRENCRDZXWTdVdWR0cDIzR1ZKUnRRa2J3QWpWVS8wVU8rSFRmeTVHaHJV?= =?utf-8?B?bEdhSzdVOHd5VlB4alJqQmJLcGFXQy9zMStyaCthMncrcExISlZjbXdlSzVj?= =?utf-8?B?Vm12cVRPVUE3cEptZjhaK2xMd1BBRzYrK2gyNGZ0NDN0R0ZucS8zeER3cHJE?= =?utf-8?B?YnhIUW9tMDJXd1NoVkJBUjhLN2htWEs0WmhRd2J2ZWRTUG1VUE5mNjZNT3Q5?= =?utf-8?B?UHhSbWxWU2tvcFpTVHVZTWQzMEoxNEc2TmtZQlJ0eXFNcDNQZHRnTm1CMW51?= =?utf-8?B?YldTbUYvdWtabGxPSjh6Y3pzK2FpRW43OW1QQzR4aGo0VDBJbExFMXhnVU0v?= =?utf-8?B?M2VzN1kxcWMrQzNFam1wdWFlZFNFK3ZEUzEwY1lnZE8wbWZkNnNJL0RnL1lS?= =?utf-8?B?aCtwb0s0dllmMWwzRVVtUWNVNGQ2Vmx1SmZtYm5WSDZqblNuT2NrOEtZVHhI?= =?utf-8?B?aDQ3bWdsSHh2WWNiakxMTkdWRHpqS3dDZE1xQkFXU3VLamZaUE5PZXkvRTVJ?= =?utf-8?B?YWZjcXFNaUIzWHloWUZOcVkxN1hUQ1hVZWtKdWZpRlB3NWhZN0dYZ0xqYVJr?= =?utf-8?B?ZDR5b1FEZnJPb1pRdFowc0VPd2pTZFJsWG9GRW15bFBDM3g0S0hXTjQ5R2p6?= =?utf-8?B?R3ZTRG1BQ1dKNXNoZ1JqazVtUzBoUHNXcHN0QUlrSmZLK1VyMlVTTTlkMXZw?= =?utf-8?B?RE5nUUdFWnJMYm84TkVkYmJyTFZiTjA5OTMzYlBKY2pPeDIzM1kzUGhaeW5Y?= =?utf-8?B?OFZxZWVlRm5iWnRxanQyanpqM1doSUk0WkdyZEwyMWZ6UjJ3STFkMmZDNlpX?= =?utf-8?B?K2ptTkthTkFqb25hTjJCcno3QTJ3dXJMNWVtWGpoc0gxZW5lZU9mVDVWQnMv?= =?utf-8?Q?y/1M=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(376014)(36860700013)(7053199007);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Nov 2025 10:21:12.7203 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 04565515-6be6-4e3a-0f4d-08de1b8be152 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF0000150B.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV8PR12MB9135 On 24/10/2025 17:37, Harry Ramsey wrote: > Implement reference counting to enable overlapping MPU regions. > References are incremented and decremented in xen_mpumap_update_entry. AFAICT, looking at the code, you would return -EINVAL early on overlap (i.e. mpumap_contains_region() returning MPUMAP_REGION_OVERLAP). If so, can you clearly explain what this change intend to do and why we need refcounting? > > A region will be destoryed if the reference count is 0 upon calling s/destoryed/destroyed/ > destroy_xen_mappings and if the full region range is specified. > > Additionally XEN_MPUMAP_ENTRY_SHIFT and XEN_MPUMAP_ENTRY_SHIFT_ZERO are > no longer hardcoded and defined inside asm-offsets.c. > > Signed-off-by: Harry Ramsey > --- > xen/arch/arm/arm32/asm-offsets.c | 2 + > xen/arch/arm/arm64/asm-offsets.c | 2 + > xen/arch/arm/include/asm/arm32/mpu.h | 2 + > xen/arch/arm/include/asm/arm64/mpu.h | 2 + > xen/arch/arm/include/asm/mpu/regions.inc | 11 +++- > xen/arch/arm/mpu/mm.c | 73 +++++++++++++++++++----- > 6 files changed, 77 insertions(+), 15 deletions(-) > > diff --git a/xen/arch/arm/arm32/asm-offsets.c b/xen/arch/arm/arm32/asm-offsets.c > index c203ce269d..951f8d03f3 100644 > --- a/xen/arch/arm/arm32/asm-offsets.c > +++ b/xen/arch/arm/arm32/asm-offsets.c > @@ -79,6 +79,8 @@ void __dummy__(void) > #ifdef CONFIG_MPU > DEFINE(XEN_MPUMAP_MASK_sizeof, sizeof(xen_mpumap_mask)); > DEFINE(XEN_MPUMAP_sizeof, sizeof(xen_mpumap)); > + DEFINE(XEN_MPUMAP_ENTRY_SHIFT, ilog2(sizeof(pr_t))); > + DEFINE(XEN_MPUMAP_ENTRY_ZERO_OFFSET, sizeof(prbar_t) + sizeof(prlar_t)); > BLANK(); > #endif > } > diff --git a/xen/arch/arm/arm64/asm-offsets.c b/xen/arch/arm/arm64/asm-offsets.c > index 320289b281..38a3894a3b 100644 > --- a/xen/arch/arm/arm64/asm-offsets.c > +++ b/xen/arch/arm/arm64/asm-offsets.c > @@ -73,6 +73,8 @@ void __dummy__(void) > #ifdef CONFIG_MPU > DEFINE(XEN_MPUMAP_MASK_sizeof, sizeof(xen_mpumap_mask)); > DEFINE(XEN_MPUMAP_sizeof, sizeof(xen_mpumap)); > + DEFINE(XEN_MPUMAP_ENTRY_SHIFT, ilog2(sizeof(pr_t))); > + DEFINE(XEN_MPUMAP_ENTRY_ZERO_OFFSET, sizeof(prbar_t) + sizeof(prlar_t)); > BLANK(); > #endif > } > diff --git a/xen/arch/arm/include/asm/arm32/mpu.h b/xen/arch/arm/include/asm/arm32/mpu.h > index 0a6930b3a0..137022d922 100644 > --- a/xen/arch/arm/include/asm/arm32/mpu.h > +++ b/xen/arch/arm/include/asm/arm32/mpu.h > @@ -39,6 +39,8 @@ typedef union { > typedef struct { > prbar_t prbar; > prlar_t prlar; > + uint8_t refcount; > + uint8_t pad[7]; /* Pad structure to 16 Bytes */ > } pr_t; > > #endif /* __ASSEMBLY__ */ > diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h > index f0ce344e78..17f62ccaf6 100644 > --- a/xen/arch/arm/include/asm/arm64/mpu.h > +++ b/xen/arch/arm/include/asm/arm64/mpu.h > @@ -38,6 +38,8 @@ typedef union { > typedef struct { > prbar_t prbar; > prlar_t prlar; > + uint8_t refcount; > + uint8_t pad[15]; /* Pad structure to 32 Bytes */ > } pr_t; > > #endif /* __ASSEMBLY__ */ > diff --git a/xen/arch/arm/include/asm/mpu/regions.inc b/xen/arch/arm/include/asm/mpu/regions.inc > index 23fead3b21..0cdbb17bc3 100644 > --- a/xen/arch/arm/include/asm/mpu/regions.inc > +++ b/xen/arch/arm/include/asm/mpu/regions.inc > @@ -14,14 +14,12 @@ > #define PRLAR_ELx_EN 0x1 > > #ifdef CONFIG_ARM_64 > -#define XEN_MPUMAP_ENTRY_SHIFT 0x4 /* 16 byte structure */ > > .macro store_pair reg1, reg2, dst > stp \reg1, \reg2, [\dst] > .endm > > #else > -#define XEN_MPUMAP_ENTRY_SHIFT 0x3 /* 8 byte structure */ > > .macro store_pair reg1, reg2, dst > strd \reg1, \reg2, [\dst] > @@ -97,6 +95,15 @@ > > 3: > > + /* Clear the rest of the xen_mpumap entry. */ > +#ifdef CONFIG_ARM_64 > + stp xzr, xzr, [\base, #XEN_MPUMAP_ENTRY_ZERO_OFFSET] > +#else > + mov \prbar, #0 > + mov \prlar, #0 > + strd \prbar, \prlar, [\base, #XEN_MPUMAP_ENTRY_ZERO_OFFSET] > +#endif > + > add \sel, \sel, #1 > > 1: > diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c > index a058db19ef..c5128244b7 100644 > --- a/xen/arch/arm/mpu/mm.c > +++ b/xen/arch/arm/mpu/mm.c > @@ -106,6 +106,7 @@ pr_t pr_of_addr(paddr_t base, paddr_t limit, unsigned int flags) > region = (pr_t) { > .prbar = prbar, > .prlar = prlar, > + .refcount = 0, > }; > > /* Set base address and limit address. */ > @@ -170,6 +171,37 @@ int mpumap_contains_region(pr_t *table, uint8_t nr_regions, paddr_t base, > return MPUMAP_REGION_NOTFOUND; > } > > +static bool is_mm_attr_match(pr_t *region, unsigned int attributes) > +{ > + bool ret = true; > + > + if ( region->prbar.reg.ro != PAGE_RO_MASK(attributes) ) > + { > + printk(XENLOG_WARNING > + "Mismatched Access Permission attributes (%#x0 instead of %#x0)\n", Why %#x0 and not %#x? > + region->prbar.reg.ro, PAGE_RO_MASK(attributes)); > + ret = false; > + } > + > + if ( region->prbar.reg.xn != PAGE_XN_MASK(attributes) ) > + { > + printk(XENLOG_WARNING > + "Mismatched Execute Never attributes (%#x instead of %#x)\n", > + region->prbar.reg.xn, PAGE_XN_MASK(attributes)); > + ret = false; > + } > + > + if ( region->prlar.reg.ai != PAGE_AI_MASK(attributes) ) > + { > + printk(XENLOG_WARNING > + "Mismatched Memory Attribute Index (%#x instead of %#x)\n", > + region->prlar.reg.ai, PAGE_AI_MASK(attributes)); > + ret = false; > + } What about shareability? > + > + return ret; > +} > + > /* Map a frame table to cover physical addresses ps through pe */ > void __init setup_frametable_mappings(paddr_t ps, paddr_t pe) > { > @@ -287,19 +319,19 @@ static int xen_mpumap_update_entry(paddr_t base, paddr_t limit, > /* Currently we don't support modifying an existing entry. */ > if ( flags_has_page_present && (rc >= MPUMAP_REGION_FOUND) ) > { > - printk("Modifying an existing entry is not supported\n"); > - return -EINVAL; > - } > + if ( !is_mm_attr_match(&xen_mpumap[idx], flags) ) Do I understand correctly that this change (not mentioned in commit msg) is here so that when we call xen_mpumap_update_entry() with existing matching or inclusive region we will increment refcount only if the attributes match? > + { > + printk("Modifying an existing entry is not supported\n"); > + return -EINVAL; > + } > > - /* > - * Currently, we only support removing/modifying a *WHOLE* MPU memory > - * region. Part-region removal/modification is not supported as in the worst > - * case it will leave two/three fragments behind. > - */ Hmm, I think that we still don't support removing/modifying regions partially. Why is this comment removed? > - if ( rc == MPUMAP_REGION_INCLUSIVE ) > - { > - printk("Part-region removal/modification is not supported\n"); > - return -EINVAL; > + /* Check for overflow of refcount before incrementing. */ > + if ( xen_mpumap[idx].refcount == 0xFF ) > + { > + printk("Cannot allocate region as it would cause reference overflow\n"); > + return -ENOENT; > + } > + xen_mpumap[idx].refcount += 1; > } > > /* We are inserting a mapping => Create new region. */ > @@ -323,7 +355,22 @@ static int xen_mpumap_update_entry(paddr_t base, paddr_t limit, > return -EINVAL; > } > > - disable_mpu_region_from_index(idx); > + if ( xen_mpumap[idx].refcount == 0 ) > + { > + if (MPUMAP_REGION_FOUND == rc) Missing spaces around (). > + { No need for brackets for single instruction > + disable_mpu_region_from_index(idx); > + } > + else > + { > + printk("Cannot remove a partial region\n"); > + return -EINVAL; > + } > + } > + else > + { Same here. ~Michal From xen-devel-bounces@lists.xenproject.org Tue Nov 04 10:37:34 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Nov 2025 10:37:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155610.1485058 (Exim 4.92) (envelope-from ) id 1vGEPn-0004kW-9k; Tue, 04 Nov 2025 10:37:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155610.1485058; Tue, 04 Nov 2025 10:37:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGEPn-0004kP-7B; Tue, 04 Nov 2025 10:37:27 +0000 Received: by outflank-mailman (input) for mailman id 1155610; Tue, 04 Nov 2025 10:37:25 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGEPl-0004kJ-Dr for xen-devel@lists.xenproject.org; Tue, 04 Nov 2025 10:37:25 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vGEPk-000lwo-2c; Tue, 04 Nov 2025 10:37:25 +0000 Received: from [2a02:8012:3a1:0:2858:32e7:18b8:3bf] by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.96) (envelope-from ) id 1vGEPj-00B2l5-2x; Tue, 04 Nov 2025 10:37:24 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:Content-Type:In-Reply-To:From: References:Cc:To:Subject:MIME-Version:Date:Message-ID; bh=wF4bm3u3B5XQx2oUqwESeGw2xVLjLIKK4I3FCZZyx8k=; b=VUggCZG3Fzld5AitMHnwV03/Jz FXRgdTmwlnuobDLIC8iUqSMKzALQtfOvctKGQyYeNQb2YpPvBKXDgF0A7SICLoEl5qS3Vw/naOfFe K/kSWnjM3HaCpI6EdZUBB0o83Fdrsrs5nmJZaWC2H8zZQL8s8JKuLobuF/5SdjF4zEgg=; Message-ID: <3e1525eb-7772-4e11-88d0-376f64591802@xen.org> Date: Tue, 4 Nov 2025 10:37:22 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] arm/xen: zero init memory region before returning to the heap Content-Language: en-GB To: Dmytro Prokopchuk1 , "xen-devel@lists.xenproject.org" Cc: Stefano Stabellini , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk References: From: Julien Grall In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi Dmytro, On 31/10/2025 16:02, Dmytro Prokopchuk1 wrote: > The current implementation of 'free_init_memory()' fills the freed '__init' > and '__initdata' memory regions with a faulting instruction before unmapping > and returning them to the heap. However, after unmapping, any access to this > region will result in a page fault, making the instruction fill redundant. > > Replace the instruction fill with a call to 'memset()', zeroing the entire > region before it is unmapped and returned to the allocator. > > Additionally, this change resolves a violation of MISRA C:2012 Rule 11.3 > (cast between pointer to object type and pointer to a different object type), > caused by performing a cast from a 'char *' to a 'uint32_t *' pointer to > write instructions directly into memory, which is not compliant with MISRA > guidelines. > > No functional changes. > > Signed-off-by: Dmytro Prokopchuk Acked-by: Julien Grall Cheers, -- Julien Grall From xen-devel-bounces@lists.xenproject.org Tue Nov 04 10:38:03 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Nov 2025 10:38:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155618.1485068 (Exim 4.92) (envelope-from ) id 1vGEQN-0005Bx-HK; Tue, 04 Nov 2025 10:38:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155618.1485068; Tue, 04 Nov 2025 10:38:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGEQN-0005Bq-Em; Tue, 04 Nov 2025 10:38:03 +0000 Received: by outflank-mailman (input) for mailman id 1155618; Tue, 04 Nov 2025 10:38:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGEQM-0005Bk-Qd for xen-devel@lists.xenproject.org; Tue, 04 Nov 2025 10:38:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vGEQM-000lxc-1u for xen-devel@lists.xenproject.org; Tue, 04 Nov 2025 10:38:02 +0000 Received: from mail-vk1-f181.google.com ([209.85.221.181]) by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.96) (envelope-from ) id 1vGEQM-00B2pW-2O for xen-devel@lists.xenproject.org; Tue, 04 Nov 2025 10:38:02 +0000 Received: by mail-vk1-f181.google.com with SMTP id 71dfb90a1353d-5563c36f5dfso461769e0c.2 for ; Tue, 04 Nov 2025 02:38:02 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Content-Type:To:Subject:Message-ID:Date: From:MIME-Version; bh=1g+Nw35gbIdjqKEd7PHczZmtrvfY29TwPYh6jr27U7s=; b=A5GVf7n hav/2DURguuXb6sAoTnreLqfOdSj87gZp+22kQaVUl6EpGRudE1DoXOI4inrBHoImKlETMP7juWyp YPs+VjYawQxpPxgwLWTQiXV8+M2Mg9gwV9Pyq7xRUfYPdhosdwDZo+x5TrR3A5YZCTNqyKBR5cz0X Fk2Md7AGdM=; X-Gm-Message-State: AOJu0Yw8wI1WpEL+YGxqIV026VhHgedIK7xZUhy6HLsz6WqxLL8BAsQi agqz1od6MQKJ+MRcj/1VbuGj8e1MS45/7Sy3t/bJtRVeeJBqfP/VqHiK1yqocSTS1+O66slx0lR j5CGq04oJmP+hIDLrW0MDjW8VRVGjBUo= X-Google-Smtp-Source: AGHT+IFQA7gN4QmB1Jl6w7tbmBHj+9PB6sf9LwMAUSbb7l4zqkrxVdUdAGzA3F2IcdWZWsK6BZHF4ruv9okA/jC3HqY= X-Received: by 2002:a05:6122:4895:b0:559:59c9:5f89 with SMTP id 71dfb90a1353d-55959c9645emr2707332e0c.0.1762252682294; Tue, 04 Nov 2025 02:38:02 -0800 (PST) MIME-Version: 1.0 From: Cody Zuschlag Date: Tue, 4 Nov 2025 11:37:51 +0100 X-Gmail-Original-Message-ID: X-Gm-Features: AWmQ_bkiXtg1WlLSLGBtQs63R8G-PPExZ-jYLiGE-MGc3AhtVq387d4eiDYlawY Message-ID: Subject: [ANNOUNCE] Call for agenda items for November 6, 2025 Community Call @ 15:00 UTC To: xen-devel@lists.xenproject.org Content-Type: multipart/alternative; boundary="00000000000021fb4c0642c26dfc" --00000000000021fb4c0642c26dfc Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi everyone, We=E2=80=99re getting ready for November's Xen Project Community Call on Th= ursday, 6 November 2025 at 15:00 UTC (3 pm UK time, *please account for your local daylight savings time*). We=E2=80=99d love for you to join. Feel free to participate or just observe= . This call is a great opportunity to see what the community is working on, align our various efforts, and share updates. Everyone is welcome! *Preparation:* - Add any proposed agenda items or missing action items: https://cryptpad.fr/pad/#/2/pad/edit/UgvUtRc5Gi68FxOSuye5gWH0/ - If any action items have been resolved or are no longer relevant, feel free to remove them from the doc. I attempted to clean up the doc, so fe= el free to make any adjustments. *Call Details:* - Date: Thursday, 6 November 2025 - Time: 15:00 UTC (agenda begins at 15:05 UTC) - Find your local timezone here - Link to Join the Call: https://meet.jit.si/XenProjectCommunityCall We plan to open the meeting room at 15:00 UTC, but to allow time for switching between meetings and handling any technical issues, we=E2=80=99ll officially start discussing the agenda at 15:05 UTC. Want to be CC=E2=80=99d on future calls? Add or remove yourself from our Sign-up Sheet . See you Thursday! Cody Zuschlag Xen Project - Community Manager --00000000000021fb4c0642c26dfc Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Hi everyone,

We=E2=80=99re getting ready for N= ovember's Xen Project Community Call on Thursday, 6 November 2025 at 15= :00 UTC (3 pm UK time, please account for your local daylight savings ti= me).=C2=A0

We=E2=80=99d love for you to join. = Feel free to participate or just observe. This call is a great opportunity = to see what the community is working on, align our various efforts, and sha= re updates. Everyone is welcome!

Preparation:
  • Add any proposed agenda items or missing action item= s:=C2=A0https://cryptpad.fr/pad/#/2/pad/edit/UgvUtRc5Gi68FxOSuye5gWH0/<= /li>
  • If any action items have been resolved o= r are no longer relevant, feel free to remove them from the doc. I attempte= d to clean up the doc, so feel free to make any adjustments.

<= b>Call Details:
We plan to open the meeting room a= t 15:00 UTC, but to allow time for switching between meetings and handling = any technical issues, we=E2=80=99ll officially start discussing the agenda = at 15:05 UTC.

Want to be CC=E2=80=99d on future calls?

Add or= remove yourself from our=C2=A0Sign-up Sheet.

See you Thursday!

Cody Zuschlag
Xen Project - Community Manager
--00000000000021fb4c0642c26dfc-- From xen-devel-bounces@lists.xenproject.org Tue Nov 04 10:44:05 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Nov 2025 10:44:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155632.1485079 (Exim 4.92) (envelope-from ) id 1vGEW9-0006o9-72; Tue, 04 Nov 2025 10:44:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155632.1485079; Tue, 04 Nov 2025 10:44:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGEW9-0006o2-3w; Tue, 04 Nov 2025 10:44:01 +0000 Received: by outflank-mailman (input) for mailman id 1155632; Tue, 04 Nov 2025 10:44:00 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGEW8-0006nv-HJ for xen-devel@lists.xenproject.org; Tue, 04 Nov 2025 10:44:00 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vGEW7-000m6j-1t; Tue, 04 Nov 2025 10:43:59 +0000 Received: from [2a02:8012:3a1:0:2858:32e7:18b8:3bf] by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.96) (envelope-from ) id 1vGEW7-00B3xT-26; Tue, 04 Nov 2025 10:43:59 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:Content-Type:In-Reply-To:From: References:Cc:To:Subject:MIME-Version:Date:Message-ID; bh=uB+noEWh6KER25ZRVImPaPFIjegXd7HNUf93SyjDFiI=; b=N0O15MI0iSb8q5wW9VZXWmp8OV y+KXiI5VLdRprb4YMxOXBRM/uWvsrcFbHdgkUouoQzj0oFrg90AgvUimleQCapBjp41r6ieX3Wzhg uO24lspP1DemMQxg/yZAWWPFpybZo16V7NGj/PVi6FVB4nyiYVe/edhEzJeCv+gNQFJI=; Message-ID: <88bff8bf-195b-432d-97af-317398796d40@xen.org> Date: Tue, 4 Nov 2025 10:43:58 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: Support of building Xen with Clang/LLVM on Arm? Content-Language: en-GB To: Andrew Cooper , Saman Dehghan , xen-devel@lists.xenproject.org Cc: Wentao Zhang References: <20251023233408.16245-1-samaan.dehghan@gmail.com> From: Julien Grall In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi, On 24/10/2025 00:45, Andrew Cooper wrote: > On 24/10/2025 12:34 am, Saman Dehghan wrote: >> Hi xen-devel, >> >> When preparing and testing another of my patch for LLVM coverage [1], I >> encountered a few problems with Clang/LLVM build on ARM 64 platforms. >> >> The first two are clang errors. >> >> I observe the following errors when building the Xen master branch >> for ARM 64 with Clang 19 and 20. If I comment out >> "CFLAGS-$(CONFIG_ARM_64) += -mgeneral-regs-only" in "xen/arch/arm/arch.mk" >> the error is gone but the build fails during linking (see the third). >> >> Error message: >> >> arch/arm/arm64/vfp.c:9:18: error: instruction requires: fp-armv8 >> 9 | asm volatile("stp q0, q1, [%1, #16 * 0]\n\t" >> | ^ >> :1:2: note: instantiated into assembly here >> 1 | stp q0, q1, [x8, #16 * 0] >> | ^ >> arch/arm/arm64/vfp.c:9:46: error: instruction requires: fp-armv8 >> 9 | asm volatile("stp q0, q1, [%1, #16 * 0]\n\t" >> | ^ >> :2:2: note: instantiated into assembly here >> 2 | stp q2, q3, [x8, #16 * 2] >> | ^ >> arch/arm/arm64/vfp.c:10:46: error: instruction requires: fp-armv8 >> 10 | "stp q2, q3, [%1, #16 * 2]\n\t" >> | ^ >> :3:2: note: instantiated into assembly here >> 3 | stp q4, q5, [x8, #16 * 4] >> | ^ >> arch/arm/arm64/vfp.c:11:46: error: instruction requires: fp-armv8 >> 11 | "stp q4, q5, [%1, #16 * 4]\n\t" >> | ^ >> :4:2: note: instantiated into assembly here >> 4 | stp q6, q7, [x8, #16 * 6] >> | ^ >> arch/arm/arm64/vfp.c:12:46: error: instruction requires: fp-armv8 >> 12 | "stp q6, q7, [%1, #16 * 6]\n\t" >> | ^ >> :5:2: note: instantiated into assembly here >> 5 | stp q8, q9, [x8, #16 * 8] >> | ^ >> arch/arm/arm64/vfp.c:13:46: error: instruction requires: fp-armv8 >> 13 | "stp q8, q9, [%1, #16 * 8]\n\t" >> | ^ >> :6:2: note: instantiated into assembly here >> 6 | stp q10, q11, [x8, #16 * 10] >> | ^ >> >> Reprroduction steps: >> >> $ git clone https://xenbits.xen.org/git-http/xen >> $ cd xen >> $ git checkout eff32008be0d2718d32d60245650ff6f88fb3d13 >> $ make -C xen menuconfig clang=y >> $ make xen clang=y >> >> Tested with the following setup: >> >> - Clang version: Ubuntu clang version 19.1.1 (1ubuntu1~24.04.2) >> - Host: Ubuntu 24.04.3 LTS / aarch64 >> >> Second, for Clang 18 or below there are another set of errors despite >> commenting out the "-mgeneral-regs-only" flag: >> >> arch/arm/arm64/mmu/head.S:288:13: error: expected writable system register or pstate >> msr TTBR0_EL2, x4 >> ^ >> arch/arm/arm64/mmu/head.S:509:13: error: expected writable system register or pstate >> msr TTBR0_EL2, x0 >> ^ >> >> Tested with: >> >> - Clang version: Ubuntu clang version 18.1.3 (1ubuntu1) >> - Host: Ubuntu 24.04.3 LTS / aarch64 >> >> This works with GCC. It also works with Clang on x86 builds. >> >> Third, if I specify "LD=ld.lld" with Clang 19 and 20 after commenting out >> the "-mgeneral-regs-only" flag. I got this linking error: >> >> ld.lld: error: common/device-tree/static-evtchn.init.o:(.rodata.str): offset is outside the section >> >> As I read from the project README, under "C compiler and linker - For ARM", >> only GCC is listed. So my general question is whether Xen supports building >> with Clang/LLVM on ARM platforms. >> >> Let me know if you need more details or a patch attempt. > > Clang/LLVM is only supported for x86. > > Personally I think the other architectures would benefit from using both > compilers, but it's up to the relevant maintainers. Happy to review any patches for clang support on Arm. Cheers, -- Julien Grall From xen-devel-bounces@lists.xenproject.org Tue Nov 04 10:46:17 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Nov 2025 10:46:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155649.1485089 (Exim 4.92) (envelope-from ) id 1vGEYJ-0007Rk-NJ; Tue, 04 Nov 2025 10:46:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155649.1485089; Tue, 04 Nov 2025 10:46:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGEYJ-0007Rd-KL; Tue, 04 Nov 2025 10:46:15 +0000 Received: by outflank-mailman (input) for mailman id 1155649; Tue, 04 Nov 2025 10:46:14 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGEYI-0007RI-5V for xen-devel@lists.xenproject.org; Tue, 04 Nov 2025 10:46:14 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vGEYH-000m9x-0d; Tue, 04 Nov 2025 10:46:13 +0000 Received: from [2a02:8012:3a1:0:2858:32e7:18b8:3bf] by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.96) (envelope-from ) id 1vGEYH-00B4Rx-0o; Tue, 04 Nov 2025 10:46:13 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:Content-Type:In-Reply-To:From: References:Cc:To:Subject:MIME-Version:Date:Message-ID; bh=m4d65BzOjjw23PnfyKNRcSMNDlBgZqZ/9Q0lDxpIUBc=; b=NYmx0NUPhV4F0PUGmnikHLlY2H m21WiVrGHxt7ilTfoWLtUUxONt+NbBvj5/OHxGtdJu8uzI0ALN/VVSu642Valx5QmOTnNneWWZzwI 58Y+X42/HIlVP9Pb9C4/WgB1OmJk/+gv3s3OwkRE2obTdkgghUIFS5xzhPKQzkYUtJyc=; Message-ID: Date: Tue, 4 Nov 2025 10:46:10 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] domain: adjust soft-reset arch dependency Content-Language: en-GB To: Jan Beulich , "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Penny Zheng , Christopher Clark , "Daniel P. Smith" , Bertrand Marquis , Volodymyr Babchuk , Timothy Pearson , Oleksii Kurochko References: From: Julien Grall In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi Jan, On 30/10/2025 12:10, Jan Beulich wrote: > Arm's arch_domain_soft_reset() returning -ENOSYS is quite unhelpful: This > way a domain will be crashed if a tool stack mistakenly invokes > XEN_DOMCTL_soft_reset on it. Instead the tool stack should be told of its > mistake. > > Introduce HAS_SOFT_RESET, implied only by x86. "imply" rather than > "select" such that HAS_SOFT_RESET can later gain a dependency on > MGMT_HYPERCALLS. That way HAS_SOFT_RESET will go off when > MGMT_HYPERCALLS is off. > > Check the new setting early in domctl handling, and compile out the thus > dead (when HAS_SOFT_RESET=n) domain_soft_reset() as well as its dedicated > helpers. > > Signed-off-by: Jan Beulich Acked-by: Julien GralL Cheers, -- Julien Grall From xen-devel-bounces@lists.xenproject.org Tue Nov 04 10:52:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Nov 2025 10:52:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155659.1485098 (Exim 4.92) (envelope-from ) id 1vGEeA-0000bf-AN; Tue, 04 Nov 2025 10:52:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155659.1485098; Tue, 04 Nov 2025 10:52:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGEeA-0000bY-7h; Tue, 04 Nov 2025 10:52:18 +0000 Received: by outflank-mailman (input) for mailman id 1155659; Tue, 04 Nov 2025 10:52:17 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGEe9-0000bR-75 for xen-devel@lists.xenproject.org; Tue, 04 Nov 2025 10:52:17 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vGEe8-000mIJ-25; Tue, 04 Nov 2025 10:52:16 +0000 Received: from [2a02:8012:3a1:0:2858:32e7:18b8:3bf] by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.96) (envelope-from ) id 1vGEe8-00B5Bg-2F; Tue, 04 Nov 2025 10:52:16 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:Content-Type:In-Reply-To:From: References:Cc:To:Subject:MIME-Version:Date:Message-ID; bh=kRLxWnq2X4p7eL66NrsFmwXTdVqToBKJkJP3mZbk/4w=; b=jJd1QMzzsf/rMOKbIxVcMFif1w inAghFL697UADc40Cnv0Z3EaefI/n4+iTuSSMx1Btmc0vNbVbPDXQTkYDiMXm/d8YOUJcUd/S1i45 R1elIUuzfRPHUO9iz04pmAzH/8wxed5Lg+e3A8DEEw56uS16OIRd0ZxJCGbLFqaNzRqk=; Message-ID: <58ab2145-62a9-4bc7-8889-b7a684c77259@xen.org> Date: Tue, 4 Nov 2025 10:52:15 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 1/5] arm/time: Use static irqaction Content-Language: en-GB To: Mykyta Poturai , "xen-devel@lists.xenproject.org" Cc: Stefano Stabellini , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk References: From: Julien Grall In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi Mykyta, On 10/10/2025 10:21, Mykyta Poturai wrote: > When stopping a core deinit_timer_interrupt is called in non-alloc > context, which causes xfree in release_irq to fail an assert. > > To fix this, switch to a statically allocated irqaction that does not > need to be freed in release_irq. > > Signed-off-by: Mykyta Poturai Assuming Mykola's comment will be addressed: Reviewed-by: Julien Grall Cheers, -- Julien Grall From xen-devel-bounces@lists.xenproject.org Tue Nov 04 10:55:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Nov 2025 10:55:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155669.1485110 (Exim 4.92) (envelope-from ) id 1vGEgj-0001B9-OT; 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Tue, 04 Nov 2025 10:54:54 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:Content-Type:In-Reply-To:From: References:Cc:To:Subject:MIME-Version:Date:Message-ID; bh=UO44pjj3/P2uckSRmi9p5Kc8hoydRQyaw2DRGZPeEvA=; b=SqRo9BunCSrxb196zb0TWBapZt VNScfvPBRRXePu3DAtG2aFMhaAPKSRP/vBuv01Ki+2gemhf3bcmv1tVPECFMuqXiPJrQoeefKn7ej DfItmnGpenBfa8QcJjGzHCbZpzA4XvqYHTb9CZIOAjvOiKuYym6P7SPmOSAKIL5QAkCE=; Message-ID: <7d95cd09-c997-4d84-91d2-3f1e53a42639@xen.org> Date: Tue, 4 Nov 2025 10:54:53 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 2/5] arm/gic: Use static irqaction Content-Language: en-GB To: Mykyta Poturai , "xen-devel@lists.xenproject.org" Cc: Stefano Stabellini , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk References: <7ebd435d510c88e2840ee991f8fd75f25ad66f75.1760083684.git.mykyta_poturai@epam.com> From: Julien Grall In-Reply-To: <7ebd435d510c88e2840ee991f8fd75f25ad66f75.1760083684.git.mykyta_poturai@epam.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi Mykyta, On 10/10/2025 10:21, Mykyta Poturai wrote: > When stopping a core cpu_gic_callback is called in non-alloc > context, which causes xfree in release_irq to fail an assert. > > To fix this, switch to a statically allocated irqaction that does not > need to be freed in release_irq. > > Signed-off-by: Mykyta Poturai Assuming Mykola's comment is address: Reviewed-by: Julien Grall Cheers, -- Julien Grall From xen-devel-bounces@lists.xenproject.org Tue Nov 04 11:19:17 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Nov 2025 11:19:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155680.1485119 (Exim 4.92) (envelope-from ) id 1vGF4A-0004NU-HU; Tue, 04 Nov 2025 11:19:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155680.1485119; Tue, 04 Nov 2025 11:19:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGF4A-0004NN-Do; Tue, 04 Nov 2025 11:19:10 +0000 Received: by outflank-mailman (input) for mailman id 1155680; Tue, 04 Nov 2025 11:19:09 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGF49-0004NH-Sa for xen-devel@lists.xenproject.org; Tue, 04 Nov 2025 11:19:09 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vGF48-000mnq-2p; Tue, 04 Nov 2025 11:19:09 +0000 Received: from [2a02:8012:3a1:0:2858:32e7:18b8:3bf] by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.96) (envelope-from ) id 1vGF48-00B8d1-2i; Tue, 04 Nov 2025 11:19:08 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:Content-Type:In-Reply-To:From: References:Cc:To:Subject:MIME-Version:Date:Message-ID; bh=jqbD74s3/qNZLgvgB77u3cd0QSM7CyeZ6Lct70A8kxg=; b=RB7o644sUUZxMpHN07gtiRiukP PaLBuiVSlEAIYwG+/R/Tn/90RHuseGbGIkdp2cpeytj0Diw9W4WcJGfLU+GvXvGmmEIyAKCWIeO6K Xzh4+/VTod0vW57LKTOMAPHi0nPmW1dy/8EY1MGIa4UF0Jp2VfFdfT98Rk8Zf3HA8+/M=; Message-ID: <752d8a52-653b-481b-aa66-2f875aff3d87@xen.org> Date: Tue, 4 Nov 2025 11:19:06 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 0/5] Implement CPU hotplug on Arm Content-Language: en-GB To: Mykola Kvach , Mykyta Poturai Cc: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , "Daniel P. Smith" , Anthony PERARD , Juergen Gross , Andrew Cooper , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <2728d969-06fa-4f35-95a1-a79dd441242f@epam.com> From: Julien Grall In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Hi, On 20/10/2025 19:00, Mykola Kvach wrote: > Thank you for your answers > > On Mon, Oct 20, 2025 at 5:15 PM Mykyta Poturai wrote: >> >> On 15.10.25 20:30, Mykola Kvach wrote: >>> Hi Mykyta, >>> >>> Thanks for the series. >>> >>> It seems there might be issues here -- please take a look and let me >>> know if my concerns are valid: >>> >>> 1. FF-A notification IRQ: after a CPU down->up cycle the IRQ >>> configuration may be lost. >> >> OPTEE and FFA are marked as unsupported. > > Understood, thanks. Would it be worth documenting this? This must be documented. OP-TEE, FFA and ITS will eventually be supported. So we need to know the gap. I think it would also be worth to have a Kconfig indicating whether CPU hotplug (and soon suspend/resume) can be used with the documentation. So CPU hotplug will gracefully fail rather than putting the system in a undefined state. >> >>> 2. GICv3 LPIs: a CPU may fail to come back up unless its LPI pending >>> table exists (is allocated) on bring-up. See >>> gicv3_lpi_allocate_pendtable() and its call chain. >> >> ITS is marked as unsupported. I have a plan to deal with this, but it is >> out of scope of this series. > > Thanks for the clarification. Should we document this somewhere? > >> >>> 3. IRQ migration on CPU down: if an IRQ targets a CPU being offlined, >>> its affinity should be moved to an online CPU before completing the >>> offlining. >> >> All guest tied IRQ migration is handled by the scheduler. Regarding the >> irqs used by Xen, I didn't find any with affinity to other CPUs than CPU >> 0, which can't be disabled. I think theoretically it is possible for >> them to have different affinity, but it seems unlikely considering that >> x86 hotplug code also doesn't seem to do any Xen irq migration AFAIU. > > What about arm_smmu_init_domain_context and its related call chains? > As far as I can see, some of these paths touch XEN_DOMCTL_* hypercalls, > and my understanding is they can be issued on any CPU. You are right. The SMMU can be configured from any pCPU. When request_irq() is called, it will route the IRQ to the current pCPU. Those IRQs are not guest interrupts, so from my understanding, they would not be migrated. > Should we add a > check that no enabled (e)SPIs owned by Xen are pinned to the offlining > CPU? This would be good. But I also think we should aim to migrate those interrupts. >> >>> 4. Race between the new hypercalls and disable/enable_nonboot_cpus(): >>> disable_nonboot_cpus is called, enable_nonboot_cpus() reads >>> frozen_cpus, and before it calls cpu_up() a hypercall onlines the CPU. >>> cpu_up() then fails as "already online", but the CPU_RESUME_FAILED >>> path may still run for an already-online CPU, risking use-after-free >>> of per-CPU state (e.g. via free_percpu_area()) and other issues >>> related to CPU_RESUME_FAILED notification. >>> >> >> There don't seem to be any calls to disable/enable_nonboot_cpus() on >> Arm. Yet. There is a patch series to use the functions as part of suspend/resume. In fact this series is a pre-requisite for the suspend/resume series. > If we take x86 as an example, then they are called with all domains >> already paused, and I don't see how paused domains can issue hypercalls. The Arm version will also freeze all the domains before calling disable_nonboot_cpus(). So there should be no race on Arm as well. Cheers, -- Julien Grall From xen-devel-bounces@lists.xenproject.org Tue Nov 04 11:27:42 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Nov 2025 11:27:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155690.1485128 (Exim 4.92) (envelope-from ) id 1vGFCM-0005yv-8W; Tue, 04 Nov 2025 11:27:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155690.1485128; Tue, 04 Nov 2025 11:27:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGFCM-0005yo-53; Tue, 04 Nov 2025 11:27:38 +0000 Received: by outflank-mailman (input) for mailman id 1155690; Tue, 04 Nov 2025 11:27:37 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGFCL-0005yi-KW for xen-devel@lists.xenproject.org; Tue, 04 Nov 2025 11:27:37 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vGFCK-000my3-2b; Tue, 04 Nov 2025 11:27:37 +0000 Received: from [2a02:8012:3a1:0:2858:32e7:18b8:3bf] by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.96) (envelope-from ) id 1vGFCK-00B9gR-2e; Tue, 04 Nov 2025 11:27:36 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:Content-Type:In-Reply-To:From: References:Cc:To:Subject:MIME-Version:Date:Message-ID; bh=wb0BLB75HCUP59tThBssTD0jcy87um7ce8sT+eTJ+Hs=; b=T3KwFfEJImf5d3oN/EuNo4CvWN R47IZz+1FU+wGckIkWDfadacqpJhhCYvczCeI21A2MZyLCshkqC/9e7kDNFyChAVfzDxOFmON9LUI 7KBzMvZLu//ss2LxQ1yqcGD9UNGs8vYrU7toC74bztbzvVTQjJr3a9NjqngNymvDzj7s=; Message-ID: Date: Tue, 4 Nov 2025 11:27:35 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 3/5] arm/sysctl: Implement cpu hotplug ops Content-Language: en-GB To: Mykyta Poturai , "xen-devel@lists.xenproject.org" Cc: Stefano Stabellini , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , "Daniel P. Smith" References: From: Julien Grall In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi, On 10/10/2025 10:21, Mykyta Poturai wrote: > Implement XEN_SYSCTL_CPU_HOTPLUG_{ONLINE,OFFLINE} calls to allow for > enabling/disabling CPU cores in runtime. > > Signed-off-by: Mykyta Poturai > > v2->v3: > * no changes > > v1->v2: > * remove SMT ops > * remove cpu == 0 checks > * add XSM hooks > * only implement for 64bit Arm Can you add some details in the commit message explaining why the feature is only enabled for 32-bit Arm? > --- > xen/arch/arm/sysctl.c | 45 +++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 45 insertions(+) > > diff --git a/xen/arch/arm/sysctl.c b/xen/arch/arm/sysctl.c > index 32cab4feff..fecd649db1 100644 > --- a/xen/arch/arm/sysctl.c > +++ b/xen/arch/arm/sysctl.c > @@ -12,6 +12,8 @@ > #include > #include > #include > +#include > +#include > #include > #include > > @@ -23,6 +25,42 @@ void arch_do_physinfo(struct xen_sysctl_physinfo *pi) > XEN_SYSCTL_PHYSCAP_ARM_SVE_MASK); > } > > +#ifdef CONFIG_ARM_64 > +static long cpu_up_helper(void *data) > +{ > + unsigned long cpu = (unsigned long) data; > + return cpu_up(cpu); > +} > + > +static long cpu_down_helper(void *data) > +{ > + unsigned long cpu = (unsigned long) data; > + return cpu_down(cpu); > +} > + > +static long cpu_hotplug_sysctl(struct xen_sysctl_cpu_hotplug *hotplug) > +{ > + int ret; > + > + switch (hotplug->op) { > + case XEN_SYSCTL_CPU_HOTPLUG_ONLINE: > + ret = xsm_resource_plug_core(XSM_HOOK); > + if ( ret ) > + return ret; > + return continue_hypercall_on_cpu(0, cpu_up_helper, _p(hotplug->cpu)); > + > + case XEN_SYSCTL_CPU_HOTPLUG_OFFLINE: > + ret = xsm_resource_unplug_core(XSM_HOOK); > + if ( ret ) > + return ret; > + return continue_hypercall_on_cpu(0, cpu_down_helper, _p(hotplug->cpu)); > + > + default: > + return -EOPNOTSUPP; > + } > +} > +#endif The logic seems to be very similar to the x86 code. There are some slight differences in cpu_up_helper() and cpu_down_helper() but: * For cpu_up_helper(), we could create an arch specific helper for the second if check. * For cpu_down_helper(), it would be ok to call cpu_down() a second time on Arm. Can you look at consolidating the code? Cheers, -- Julien Grall From xen-devel-bounces@lists.xenproject.org Tue Nov 04 11:29:01 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Nov 2025 11:29:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155700.1485139 (Exim 4.92) (envelope-from ) id 1vGFDg-0006Vu-Hf; Tue, 04 Nov 2025 11:29:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155700.1485139; Tue, 04 Nov 2025 11:29:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGFDg-0006Vn-F1; Tue, 04 Nov 2025 11:29:00 +0000 Received: by outflank-mailman (input) for mailman id 1155700; Tue, 04 Nov 2025 11:28:59 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGFDf-0006Vh-PM for xen-devel@lists.xenproject.org; Tue, 04 Nov 2025 11:28:59 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 71490ee1-b971-11f0-980a-7dc792cee155; Tue, 04 Nov 2025 12:28:53 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D54651C2B; Tue, 4 Nov 2025 03:28:44 -0800 (PST) Received: from [10.1.38.100] (e126510-lin.cambridge.arm.com [10.1.38.100]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 15B213F63F; Tue, 4 Nov 2025 03:28:44 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 71490ee1-b971-11f0-980a-7dc792cee155 Message-ID: <216d54f1-334f-4600-9ecb-f7788b1abd7d@arm.com> Date: Tue, 4 Nov 2025 11:28:42 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 11/12] x86/xen: use lazy_mmu_state when context-switching To: "David Hildenbrand (Red Hat)" , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-12-kevin.brodsky@arm.com> <285faae4-dab6-4819-847a-889bdf87d5d7@arm.com> Content-Language: en-GB From: Kevin Brodsky In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 03/11/2025 19:23, David Hildenbrand (Red Hat) wrote: > On 03.11.25 19:29, Kevin Brodsky wrote: >> On 03/11/2025 16:15, David Hildenbrand (Red Hat) wrote: >>> On 29.10.25 11:09, Kevin Brodsky wrote: >>>> [...] >>>> >>>> @@ -437,7 +436,7 @@ static void xen_end_context_switch(struct >>>> task_struct *next) >>>>          xen_mc_flush(); >>>>        leave_lazy(XEN_LAZY_CPU); >>>> -    if (test_and_clear_ti_thread_flag(task_thread_info(next), >>>> TIF_LAZY_MMU_UPDATES)) >>>> +    if (next->lazy_mmu_state.active) >>> >>> This is nasty. If in_lazy_mmu_mode() is not sufficient, we will want >>> to have a separate helper that makes it clear what the difference >>> between both variants is. >> >> in_lazy_mmu_mode() operates on current, but here we're operating on a >> different task. The difference is more fundamental than just passing a >> task_struct * or not: in_lazy_mmu_mode() is about whether we're >> currently in lazy MMU mode, i.e. not paused and not in interrupt >> context. A task that isn't scheduled is never in lazy MMU mode - >> lazy_mmu_state.active is just the saved state to be restored when >> scheduled again. >> >> My point here is that we could have a helper for this use-case, but it >> should not be used in other situations (at least not on current). Maybe >> __task_lazy_mmu_active(task)? I do wonder if accessing lazy_mmu_state >> directly isn't expressing the intention well enough though (checking the >> saved state). > > > Likely there should be a > > /** >  * task_lazy_mmu_active - test whether the lazy-mmu mode is active for a >  *              task >  * @task: ... >  * >  * The lazy-mmu mode is active if a task has lazy-mmu mode enabled and >  * currently not paused. >  */ > static inline bool task_lazy_mmu_active(struct task_struct *task) > { >     return task->lazy_mmu_state.active; > } > > /** >  * in_lazy_mmu_mode() - test whether current is in lazy-mmu mode >  * >  * Test whether the current task is in lazy-mmu mode: whether the >  * interrupts are enabled and the lazy-mmu mode is active for the >  * current task. >  */ >  static inline bool in_lazy_mmu_mode(void) >  { > +    if (in_interrupt()) > +        return false; > + >      return task_lazy_mmu_active(current); >  } > > > Something like that. Maybe we can find better terminology. That's probably the clearest yes, will make the change. I can't think of more self-documenting names, spelling out the difference in the comments is likely the best we can do. - Kevin From xen-devel-bounces@lists.xenproject.org Tue Nov 04 11:33:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Nov 2025 11:33:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155710.1485148 (Exim 4.92) (envelope-from ) id 1vGFHq-00080H-1m; Tue, 04 Nov 2025 11:33:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155710.1485148; Tue, 04 Nov 2025 11:33:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGFHp-00080A-V1; Tue, 04 Nov 2025 11:33:17 +0000 Received: by outflank-mailman (input) for mailman id 1155710; Tue, 04 Nov 2025 11:33:16 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGFHo-000802-7q for xen-devel@lists.xenproject.org; Tue, 04 Nov 2025 11:33:16 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 0ce81fd0-b972-11f0-9d16-b5c5bf9af7f9; Tue, 04 Nov 2025 12:33:14 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D06201C2B; Tue, 4 Nov 2025 03:33:05 -0800 (PST) Received: from [10.1.38.100] (e126510-lin.cambridge.arm.com [10.1.38.100]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C979F3F63F; Tue, 4 Nov 2025 03:33:06 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 0ce81fd0-b972-11f0-9d16-b5c5bf9af7f9 Message-ID: Date: Tue, 4 Nov 2025 11:33:03 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 09/12] powerpc/mm: replace batch->active with in_lazy_mmu_mode() To: David Hildenbrand , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-10-kevin.brodsky@arm.com> <05e2062c-1689-44e7-9cc6-697646ca075d@redhat.com> Content-Language: en-GB From: Kevin Brodsky In-Reply-To: <05e2062c-1689-44e7-9cc6-697646ca075d@redhat.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 03/11/2025 16:05, David Hildenbrand wrote: > On 29.10.25 11:09, Kevin Brodsky wrote: >> A per-CPU batch struct is activated when entering lazy MMU mode; its >> lifetime is the same as the lazy MMU section (it is deactivated when >> leaving the mode). Preemption is disabled in that interval to ensure >> that the per-CPU reference remains valid. >> >> The generic lazy_mmu layer now tracks whether a task is in lazy MMU >> mode. We can therefore use the generic helper in_lazy_mmu_mode() >> to tell whether a batch struct is active instead of tracking it >> explicitly. >> >> Signed-off-by: Kevin Brodsky >> --- > > I suspect you were not able to test this on real HW. Some help from > the ppc folks would be appreciated. Indeed, it would be nice to get some testing on ppc HW that actually uses lazy MMU (!radix_enabled()). > > LGTM, but the interaction with pause/resume adds a bit of complication > on top. Does it? This series doesn't change when arch_enter() and arch_leave() are called, batch->active and in_lazy_mmu_mode() should coincide.  - Kevin From xen-devel-bounces@lists.xenproject.org Tue Nov 04 11:35:39 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Nov 2025 11:35:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155722.1485158 (Exim 4.92) (envelope-from ) id 1vGFK6-0000Ab-FP; Tue, 04 Nov 2025 11:35:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155722.1485158; Tue, 04 Nov 2025 11:35:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGFK6-0000AU-Cg; Tue, 04 Nov 2025 11:35:38 +0000 Received: by outflank-mailman (input) for mailman id 1155722; Tue, 04 Nov 2025 11:35:37 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGFK5-0000AO-4u for xen-devel@lists.xenproject.org; Tue, 04 Nov 2025 11:35:37 +0000 Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [2a00:1450:4864:20::435]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 616bddae-b972-11f0-9d16-b5c5bf9af7f9; Tue, 04 Nov 2025 12:35:36 +0100 (CET) Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-3f99ac9acc4so4770053f8f.3 for ; Tue, 04 Nov 2025 03:35:36 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 616bddae-b972-11f0-9d16-b5c5bf9af7f9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1762256135; x=1762860935; darn=lists.xenproject.org; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=FEmvEJ569yU5RcglEclTpCH8Bhz3hNTAvll9P58zPAs=; b=aBQtR0/W3HfgtJ1jTuZ7OrPLH2OlcHojFIAM+9iNaWj5CG0JTS6xC7GwXFa1xbAUD4 P8/Z4xroqs5J44KsFerlxuKgXXw1LmUeRtLn/pIlX4YHrHlTbz1QvKJfWkzWCDZL5OD+ SoCGtWqs+R4gNOdTvNuoP85MrJW9FKpMm8eN+TNaseHGLZgjGr6p64nx+mIA4qa7Wuo9 NdXemH6R41A3KsP3VV+KdhVLuCuAvJWsvRuDG7sP6bp3kJtvfah00YkRVg+CcODebGsO m1y8zP926NDEdlspdcYsXrEZO1gLiRaFDQEGQKHPTUixgQ0eDXlnn5qHWQ5us832WT9O JMbg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1762256135; x=1762860935; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FEmvEJ569yU5RcglEclTpCH8Bhz3hNTAvll9P58zPAs=; b=Kxxb6XrE5p0RZYKW6N09H0sxE3rYnFci2spT4tcMDCsCvZmImdoNMUNSxgAbrK9poZ Ht06kvaE+8W7KuC7IWrVJ4PWVovw+2j9ggFKDgw7Tv+ZPq2ZOkNDZhdpFOLJBmCnO6G6 5Y82xnGE+Vy1QWCIj5MBNJBdb0zK6Jeff3HxpLruz0LOKLZAq/tqqRCTeSEbwS0e+Pov HLEAX4/cOODo0HLQfnGOngw0EhVRv/2H3dO89xWMC8Xqu0Y639lTSxDzpU0MnZFr78Uv SERKj75dvTARv24SAPhaUkyjXDYgWU97PcZSJvkPy+zdhSYkf5NCJr7Bjs/NbBBYh9Ps 2UAg== X-Forwarded-Encrypted: i=1; AJvYcCXfizLyOMWJ4EmvUc/+SJF1nNEXRbZCyJ1o/kOOt1nyRg3KVjug4c5j8kSWY1+aK+6auuJCAy22Q5U=@lists.xenproject.org X-Gm-Message-State: AOJu0Yw1Y+ouyq9W4pp3u5Lhv5y3EVYKNSrVDZEHIIvK5yhoZQGNu8zX TRP6kpI0Z6VpmZSDvQEBctOdHOOXr/v4hASTduUPJrLw24XC5vMJekPQ5KC8MPaRALT6EfyfHit xvCL8g5AufCuKUBKYL/+zCorCMLcdbVs= X-Gm-Gg: ASbGncuOVtBzvuLEam8s7oLPxWlzbiQ0bT6V0GZmRwTLV+TdL8wManyZYE0zy8XemR5 zyKWWPu8jEHONz6xRIBN82nUXoY1nliHJgLEMe9ulyNbMgmfl0cddP5RRkHtJ6jms+KeTtkTxhV MMjn856o/UYiTyhxkq5BSuhUb/jBGL6k1zDWFGd/oLzTFPMff//PzwGiYFAETMG/lv/+Xlmyyq5 erJuCLqxhWiEdNL9kv6qfiHwuaknwoICTKoxLPBkhdxNOu+tr66F9xtdHpzZZ0iXy9UJKib5OVt OR7K6qAloikW7EtonR8kLMg= X-Google-Smtp-Source: AGHT+IGaLY+JLIYC+PCz6Po1zk8eBb5OGygI2hYtgllNgiV9B/bGVoEyNwBPY0xfwIC/o0NtnoKZzZH3qj4GP3m24jY= X-Received: by 2002:a05:6000:2387:b0:3e8:9e32:38f8 with SMTP id ffacd0b85a97d-429bd683416mr15476430f8f.14.1762256135401; Tue, 04 Nov 2025 03:35:35 -0800 (PST) MIME-Version: 1.0 References: <20251023233408.16245-1-samaan.dehghan@gmail.com> <88bff8bf-195b-432d-97af-317398796d40@xen.org> In-Reply-To: <88bff8bf-195b-432d-97af-317398796d40@xen.org> From: Julien Grall Date: Tue, 4 Nov 2025 11:35:23 +0000 X-Gm-Features: AWmQ_blyA9YZ4uueKshDcanABVUP5rhPkS6sjLaXVt30rbRZeGmP9GrQ8Rc_Eao Message-ID: Subject: Re: Support of building Xen with Clang/LLVM on Arm? To: Andrew Cooper , Saman Dehghan , xen-devel@lists.xenproject.org, Volodymyr Babchuk Cc: Wentao Zhang Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Le mar. 4 nov. 2025 =C3=A0 10:44, Julien Grall a =C3=A9cri= t : > Happy to review any patches for clang support on Arm. I was told privately that there is a series on the ML to add support for Clang (see [1]). It looks like there series had some reviews but needs a new version. Adding Volodymyr as the original author. [1] https://lore.kernel.org/all/20241129014850.2852844-1-volodymyr_babchuk@= epam.com/ > > Cheers, > > -- > Julien Grall > From xen-devel-bounces@lists.xenproject.org Tue Nov 04 12:16:05 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Nov 2025 12:16:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155749.1485168 (Exim 4.92) (envelope-from ) id 1vGFx2-0005dT-Ku; Tue, 04 Nov 2025 12:15:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155749.1485168; Tue, 04 Nov 2025 12:15:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGFx2-0005dM-IA; Tue, 04 Nov 2025 12:15:52 +0000 Received: by outflank-mailman (input) for mailman id 1155749; Tue, 04 Nov 2025 12:15:51 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGFx1-0005dG-JL for xen-devel@lists.xenproject.org; Tue, 04 Nov 2025 12:15:51 +0000 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [2a00:1450:4864:20::32a]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id ffe24194-b977-11f0-9d16-b5c5bf9af7f9; Tue, 04 Nov 2025 13:15:49 +0100 (CET) Received: by mail-wm1-x32a.google.com with SMTP id 5b1f17b1804b1-47118259fd8so40432875e9.3 for ; Tue, 04 Nov 2025 04:15:49 -0800 (PST) Received: from ?IPV6:2003:e5:870e:1500:7795:3e8a:56c1:ae53? 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Tue, 04 Nov 2025 04:15:48 -0800 (PST) Message-ID: <5a3660c9-1b18-4d87-a1f7-efa8d68239d8@suse.com> Date: Tue, 4 Nov 2025 13:15:47 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH] xen: privcmd: fix ioeventfd/ioreq crashing PV domain To: Val Packett , Stefano Stabellini , Oleksandr Tyshchenko Cc: xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org References: <20251015195713.6500-1-val@invisiblethingslab.com> Content-Language: en-US From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: <20251015195713.6500-1-val@invisiblethingslab.com> Content-Type: multipart/signed; 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Tue, 4 Nov 2025 06:22:06 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: a56bc9c1-b989-11f0-9d16-b5c5bf9af7f9 Message-ID: Date: Tue, 4 Nov 2025 14:22:05 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Harry Ramsey Subject: Re: [PATCH 2/3] arm: Implement reference counting for overlapping regions To: "Orzel, Michal" , xen-devel@lists.xenproject.org Cc: luca.fancellu@arm.com, Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk References: <20251024153719.408806-1-harry.ramsey@arm.com> <20251024153719.408806-3-harry.ramsey@arm.com> <0e681f9f-a563-4ace-8f58-e80a050608ba@amd.com> Content-Language: en-GB In-Reply-To: <0e681f9f-a563-4ace-8f58-e80a050608ba@amd.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hello, On 04/11/2025 10:21, Orzel, Michal wrote: > On 24/10/2025 17:37, Harry Ramsey wrote: >> Implement reference counting to enable overlapping MPU regions. >> References are incremented and decremented in xen_mpumap_update_entry. > AFAICT, looking at the code, you would return -EINVAL early on overlap (i.e. > mpumap_contains_region() returning MPUMAP_REGION_OVERLAP). If so, can you > clearly explain what this change intend to do and why we need refcounting? Perhaps overlap is a bit misleading/confusing in this context and instead I should have said inclusive regions. Reference counting is used in this context to prevent us from attempting to remove a portion of the region whilst it is still in use by other regions. >> A region will be destoryed if the reference count is 0 upon calling > s/destoryed/destroyed/ > >> destroy_xen_mappings and if the full region range is specified. >> >> Additionally XEN_MPUMAP_ENTRY_SHIFT and XEN_MPUMAP_ENTRY_SHIFT_ZERO are >> no longer hardcoded and defined inside asm-offsets.c. >> >> Signed-off-by: Harry Ramsey >> --- >> xen/arch/arm/arm32/asm-offsets.c | 2 + >> xen/arch/arm/arm64/asm-offsets.c | 2 + >> xen/arch/arm/include/asm/arm32/mpu.h | 2 + >> xen/arch/arm/include/asm/arm64/mpu.h | 2 + >> xen/arch/arm/include/asm/mpu/regions.inc | 11 +++- >> xen/arch/arm/mpu/mm.c | 73 +++++++++++++++++++----- >> 6 files changed, 77 insertions(+), 15 deletions(-) >> >> diff --git a/xen/arch/arm/arm32/asm-offsets.c b/xen/arch/arm/arm32/asm-offsets.c >> index c203ce269d..951f8d03f3 100644 >> --- a/xen/arch/arm/arm32/asm-offsets.c >> +++ b/xen/arch/arm/arm32/asm-offsets.c >> @@ -79,6 +79,8 @@ void __dummy__(void) >> #ifdef CONFIG_MPU >> DEFINE(XEN_MPUMAP_MASK_sizeof, sizeof(xen_mpumap_mask)); >> DEFINE(XEN_MPUMAP_sizeof, sizeof(xen_mpumap)); >> + DEFINE(XEN_MPUMAP_ENTRY_SHIFT, ilog2(sizeof(pr_t))); >> + DEFINE(XEN_MPUMAP_ENTRY_ZERO_OFFSET, sizeof(prbar_t) + sizeof(prlar_t)); >> BLANK(); >> #endif >> } >> diff --git a/xen/arch/arm/arm64/asm-offsets.c b/xen/arch/arm/arm64/asm-offsets.c >> index 320289b281..38a3894a3b 100644 >> --- a/xen/arch/arm/arm64/asm-offsets.c >> +++ b/xen/arch/arm/arm64/asm-offsets.c >> @@ -73,6 +73,8 @@ void __dummy__(void) >> #ifdef CONFIG_MPU >> DEFINE(XEN_MPUMAP_MASK_sizeof, sizeof(xen_mpumap_mask)); >> DEFINE(XEN_MPUMAP_sizeof, sizeof(xen_mpumap)); >> + DEFINE(XEN_MPUMAP_ENTRY_SHIFT, ilog2(sizeof(pr_t))); >> + DEFINE(XEN_MPUMAP_ENTRY_ZERO_OFFSET, sizeof(prbar_t) + sizeof(prlar_t)); >> BLANK(); >> #endif >> } >> diff --git a/xen/arch/arm/include/asm/arm32/mpu.h b/xen/arch/arm/include/asm/arm32/mpu.h >> index 0a6930b3a0..137022d922 100644 >> --- a/xen/arch/arm/include/asm/arm32/mpu.h >> +++ b/xen/arch/arm/include/asm/arm32/mpu.h >> @@ -39,6 +39,8 @@ typedef union { >> typedef struct { >> prbar_t prbar; >> prlar_t prlar; >> + uint8_t refcount; >> + uint8_t pad[7]; /* Pad structure to 16 Bytes */ >> } pr_t; >> >> #endif /* __ASSEMBLY__ */ >> diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h >> index f0ce344e78..17f62ccaf6 100644 >> --- a/xen/arch/arm/include/asm/arm64/mpu.h >> +++ b/xen/arch/arm/include/asm/arm64/mpu.h >> @@ -38,6 +38,8 @@ typedef union { >> typedef struct { >> prbar_t prbar; >> prlar_t prlar; >> + uint8_t refcount; >> + uint8_t pad[15]; /* Pad structure to 32 Bytes */ >> } pr_t; >> >> #endif /* __ASSEMBLY__ */ >> diff --git a/xen/arch/arm/include/asm/mpu/regions.inc b/xen/arch/arm/include/asm/mpu/regions.inc >> index 23fead3b21..0cdbb17bc3 100644 >> --- a/xen/arch/arm/include/asm/mpu/regions.inc >> +++ b/xen/arch/arm/include/asm/mpu/regions.inc >> @@ -14,14 +14,12 @@ >> #define PRLAR_ELx_EN 0x1 >> >> #ifdef CONFIG_ARM_64 >> -#define XEN_MPUMAP_ENTRY_SHIFT 0x4 /* 16 byte structure */ >> >> .macro store_pair reg1, reg2, dst >> stp \reg1, \reg2, [\dst] >> .endm >> >> #else >> -#define XEN_MPUMAP_ENTRY_SHIFT 0x3 /* 8 byte structure */ >> >> .macro store_pair reg1, reg2, dst >> strd \reg1, \reg2, [\dst] >> @@ -97,6 +95,15 @@ >> >> 3: >> >> + /* Clear the rest of the xen_mpumap entry. */ >> +#ifdef CONFIG_ARM_64 >> + stp xzr, xzr, [\base, #XEN_MPUMAP_ENTRY_ZERO_OFFSET] >> +#else >> + mov \prbar, #0 >> + mov \prlar, #0 >> + strd \prbar, \prlar, [\base, #XEN_MPUMAP_ENTRY_ZERO_OFFSET] >> +#endif >> + >> add \sel, \sel, #1 >> >> 1: >> diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c >> index a058db19ef..c5128244b7 100644 >> --- a/xen/arch/arm/mpu/mm.c >> +++ b/xen/arch/arm/mpu/mm.c >> @@ -106,6 +106,7 @@ pr_t pr_of_addr(paddr_t base, paddr_t limit, unsigned int flags) >> region = (pr_t) { >> .prbar = prbar, >> .prlar = prlar, >> + .refcount = 0, >> }; >> >> /* Set base address and limit address. */ >> @@ -170,6 +171,37 @@ int mpumap_contains_region(pr_t *table, uint8_t nr_regions, paddr_t base, >> return MPUMAP_REGION_NOTFOUND; >> } >> >> +static bool is_mm_attr_match(pr_t *region, unsigned int attributes) >> +{ >> + bool ret = true; >> + >> + if ( region->prbar.reg.ro != PAGE_RO_MASK(attributes) ) >> + { >> + printk(XENLOG_WARNING >> + "Mismatched Access Permission attributes (%#x0 instead of %#x0)\n", > Why %#x0 and not %#x? I will remove this as I do not think it is necessary to understand the permission attributes. >> + region->prbar.reg.ro, PAGE_RO_MASK(attributes)); >> + ret = false; >> + } >> + >> + if ( region->prbar.reg.xn != PAGE_XN_MASK(attributes) ) >> + { >> + printk(XENLOG_WARNING >> + "Mismatched Execute Never attributes (%#x instead of %#x)\n", >> + region->prbar.reg.xn, PAGE_XN_MASK(attributes)); >> + ret = false; >> + } >> + >> + if ( region->prlar.reg.ai != PAGE_AI_MASK(attributes) ) >> + { >> + printk(XENLOG_WARNING >> + "Mismatched Memory Attribute Index (%#x instead of %#x)\n", >> + region->prlar.reg.ai, PAGE_AI_MASK(attributes)); >> + ret = false; >> + } > What about shareability? Unless I am mistaken, inside `page.h` we define 8 unique regions which have their own sharability/permissions, so if `prlar.reg.ai` does not match, the sharability/permissions are incorrect. Thus we should not require a seperate check. >> + >> + return ret; >> +} >> + >> /* Map a frame table to cover physical addresses ps through pe */ >> void __init setup_frametable_mappings(paddr_t ps, paddr_t pe) >> { >> @@ -287,19 +319,19 @@ static int xen_mpumap_update_entry(paddr_t base, paddr_t limit, >> /* Currently we don't support modifying an existing entry. */ >> if ( flags_has_page_present && (rc >= MPUMAP_REGION_FOUND) ) >> { >> - printk("Modifying an existing entry is not supported\n"); >> - return -EINVAL; >> - } >> + if ( !is_mm_attr_match(&xen_mpumap[idx], flags) ) > Do I understand correctly that this change (not mentioned in commit msg) is here > so that when we call xen_mpumap_update_entry() with existing matching or > inclusive region we will increment refcount only if the attributes match? That would be correct, I will update the commit message to provide additional context especially with regards to what we mean by allocating inclusive regions. >> + { >> + printk("Modifying an existing entry is not supported\n"); >> + return -EINVAL; >> + } >> >> - /* >> - * Currently, we only support removing/modifying a *WHOLE* MPU memory >> - * region. Part-region removal/modification is not supported as in the worst >> - * case it will leave two/three fragments behind. >> - */ > Hmm, I think that we still don't support removing/modifying regions partially. > Why is this comment removed? Sorry, this is a mistake and I will update the comment to reflect to better reflect our implementation with reference counting. >> - if ( rc == MPUMAP_REGION_INCLUSIVE ) >> - { >> - printk("Part-region removal/modification is not supported\n"); >> - return -EINVAL; >> + /* Check for overflow of refcount before incrementing. */ >> + if ( xen_mpumap[idx].refcount == 0xFF ) >> + { >> + printk("Cannot allocate region as it would cause reference overflow\n"); >> + return -ENOENT; >> + } >> + xen_mpumap[idx].refcount += 1; >> } >> >> /* We are inserting a mapping => Create new region. */ >> @@ -323,7 +355,22 @@ static int xen_mpumap_update_entry(paddr_t base, paddr_t limit, >> return -EINVAL; >> } >> >> - disable_mpu_region_from_index(idx); >> + if ( xen_mpumap[idx].refcount == 0 ) >> + { >> + if (MPUMAP_REGION_FOUND == rc) > Missing spaces around (). > >> + { > No need for brackets for single instruction > >> + disable_mpu_region_from_index(idx); >> + } >> + else >> + { >> + printk("Cannot remove a partial region\n"); >> + return -EINVAL; >> + } >> + } >> + else >> + { > Same here. > > ~Michal Thanks for the feedback, I will address the rest of these changes in v2. Thanks, Harry Ramsey. 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Signed-off-by: Tu Dinh --- tools/libacpi/build.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/libacpi/build.c b/tools/libacpi/build.c index 2f29863db1..95188e217e 100644 --- a/tools/libacpi/build.c +++ b/tools/libacpi/build.c @@ -473,7 +473,7 @@ static int construct_secondary_tables(struct acpi_ctxt *ctxt, tpm2->platform_class = TPM2_ACPI_CLASS_CLIENT; tpm2->control_area_address = TPM_CRB_CTRL_REQ; tpm2->start_method = TPM2_START_METHOD_CRB; - tpm2->log_area_minimum_length = TPM_LOG_AREA_MINIMUM_SIZE; + tpm2->log_area_minimum_length = TPM_LOG_SIZE; tpm2->log_area_start_address = TPM_LOG_AREA_ADDRESS; set_checksum(tpm2, -- 2.43.0 -- Ngoc Tu Dinh | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Tue Nov 04 16:57:01 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Nov 2025 16:57:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155837.1485215 (Exim 4.92) (envelope-from ) id 1vGKL1-0006fK-KD; Tue, 04 Nov 2025 16:56:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155837.1485215; Tue, 04 Nov 2025 16:56:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGKL1-0006fD-Gq; Tue, 04 Nov 2025 16:56:55 +0000 Received: by outflank-mailman (input) for mailman id 1155837; Tue, 04 Nov 2025 16:56:54 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGKL0-0006f7-6Y for xen-devel@lists.xenproject.org; Tue, 04 Nov 2025 16:56:54 +0000 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [2a00:1450:4864:20::334]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 403e6aae-b99f-11f0-980a-7dc792cee155; Tue, 04 Nov 2025 17:56:48 +0100 (CET) Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-4775a52e045so1715265e9.3 for ; Tue, 04 Nov 2025 08:56:48 -0800 (PST) Received: from localhost.localdomain (host-78-149-11-196.as13285.net. [78.149.11.196]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-429dc1f5be4sm5372270f8f.31.2025.11.04.08.56.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Nov 2025 08:56:46 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 403e6aae-b99f-11f0-980a-7dc792cee155 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1762275407; x=1762880207; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=PHL3jDnrijy5yRgmLMMloMQopIIQXeenL/hLlkisGwk=; b=pnP5Zp3fCgxlVVnNcCLMtUXzO2UYEAY21PJtqBSMyyvVpPfPnFVOgvu2lABXOpKQpI eBS2DyRPUluoOEDllA2TwSaBMyLQOcGt4R67DzBE/HBJimyZGYlFsg54bUohbXqAUekF twdDbmYWk3+dBEvsLybVqsc/XK0j/nb0kuFK8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1762275407; x=1762880207; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=PHL3jDnrijy5yRgmLMMloMQopIIQXeenL/hLlkisGwk=; b=IvPI7FiArg98+hGaHcc2GVZlMaATSSbeDXBprDc3ogEqGeXhDPyOF+JyniH97jENFB IFuS6id8HHbt74mRsNnWPmwHvQt5tSBO4eKCUlZ2uqZp0BKSkcBAtNrZoIYCApLcrZ90 FpkhcG2ihOdyoCfn5S/pmezSI+ye69H5BqMIo318rYe0k4ZVJLMQWdVZvfuW4UQmmJfl IFZYnwK7u0SNaoIS2dbk1L23ncc7OjqGgDSKTESrtcpo7hwUnMH1p5/xOewfMUkwP+tK eAntEvcNzKUxKq+4NsjfVPCGIERNRGhquvUBxp2FIHDmj574E94meU3Ei7WyLSaGicfC NiQw== X-Gm-Message-State: AOJu0Yz9Yinx1c5TjUnLaXve01eC97YmC0P53KtLTMG24tRn3bOtALrF +ch/4hCeNd4PBR4y3btwVT5ch7ofMaVFW+1bgHW8NoW7WcVu2Rd+fFdKuAOednpwkgfSULYyO0D TuIcQDq4= X-Gm-Gg: ASbGncu/fz0QGkX2r+FRhXfVVOahZRezB+toiTdxQgLwOHQaMVvMKlxRioj4WAZGfNy Bp0FNkIjHt82laLgJZCZuqeTT+BSsUG3hxlzwuB9bCFL9evirATpHW1lgW5qxg7we0Tre7qSS5k vNPkQrVvOsYULkYXhxhz+HF0Wz8tkDE9fre7wyRcMBuBLJuhQ03eblNMXtidUXVxKeXdDZDxswt EmFyZ1kwS/01hfi/Fsi16bKevH9Yp7sCSlqMxuBU3tJVPGZkk47pWOvth0LXVXTkQiG+54dA4QR 9kow19WOlA4nPMH2s6YtvIbGUp8wx8M4VvCLxciHH3MAm+NcdSeBaOGMez4CB2NLxki2/HsZxfr OuZiB5sLV+IAblK0xq+vm3Oh6YbKZ5bRjohxaysVrfCFNDEHI2IBTvsu75ZuLSjhD79IfeKt4O7 ch1EDZZ8Kw6ApEcgVrybdUELZofOBqV8riqw0zFDipcGRPls0mtm8= X-Google-Smtp-Source: AGHT+IHocYewmJrm0tCGAGe5t63rHYN1yb9F9ouw3ks4g052K2chrbt580WbN7ehYhqXVuAX9e2oyQ== X-Received: by 2002:a05:600c:a00b:b0:46c:adf8:c845 with SMTP id 5b1f17b1804b1-4775cdc705amr107535e9.16.1762275406921; Tue, 04 Nov 2025 08:56:46 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= , Christian Lindig , Rob Hoes , Pau Ruiz Safont , Andrii Sultanov , Oleksii Kurochko Subject: [PATCH] ocaml/xsd_glue: Fix dynamic linking configuration Date: Tue, 4 Nov 2025 16:56:44 +0000 Message-Id: <20251104165644.4011663-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The latest oxenstored from Xapi-project fails to start up: launch-xenstore[1201]: Starting /usr/sbin/oxenstored... launch-xenstore[1222]: Fatal error: exception Dynlink.Error (Dynlink.Cannot_open_dll "Dynlink.Error (Dynlink.Cannot_open_dll \"Failure(\\\"/usr/libexec/xen//ocaml/xsd_glue/xenctrl_plugin/domain_getinfo_v1.cmxs: undefined symbol: xc_domain_getinfo_single\\\")\")") This is because domain_getinfo_v1.cmxs isn't dynamically linked correctly. Fill in the correct variable, and remove the xen prefix from xenctrl. Reported-by: Edwin Török Suggested-by: Edwin Török Fixes: a6576011a4d2 ("ocaml/libs: Implement a dynamically-loaded plugin for Xenctrl.domain_getinfo") Signed-off-by: Andrew Cooper --- CC: Christian Lindig CC: Rob Hoes CC: Pau Ruiz Safont CC: Andrii Sultanov CC: Oleksii Kurochko For 4.21. Without this, we can't proceed with deprecate oxenstored. This wants backporting to 4.20 too. Previously this was hidden by oxenstored unexpectedly statically linking libxenctrl via the ocaml-evtchn bindings, and became exposed when the bindings were moved to use libxenevtchn. --- tools/ocaml/libs/xsd_glue/domain_getinfo_plugin_v1/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/ocaml/libs/xsd_glue/domain_getinfo_plugin_v1/Makefile b/tools/ocaml/libs/xsd_glue/domain_getinfo_plugin_v1/Makefile index 4be1feacfe24..6356159020c1 100644 --- a/tools/ocaml/libs/xsd_glue/domain_getinfo_plugin_v1/Makefile +++ b/tools/ocaml/libs/xsd_glue/domain_getinfo_plugin_v1/Makefile @@ -11,7 +11,7 @@ OBJS = domain_getinfo_v1 INTF = $(foreach obj, $(OBJS),$(obj).cmi) LIBS = domain_getinfo_v1.cmxa domain_getinfo_v1.cmxs -LIBS_xsd_glue = $(call xenlibs-ldflags-ldlibs,xenctrl) +LIBS_domain_getinfo_v1 = $(call xenlibs-ldflags-ldlibs,ctrl) all: $(INTF) $(LIBS) $(PROGRAMS) base-commit: 9632ce6fe5b288244d2550cd2e619a55c5168bf8 -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Tue Nov 04 16:58:36 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Nov 2025 16:58:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155847.1485225 (Exim 4.92) (envelope-from ) id 1vGKMc-0007Aa-VO; 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Without this, we can't proceed with deprecate oxenstored. > > This wants backporting to 4.20 too. > > Previously this was hidden by oxenstored unexpectedly statically linking > libxenctrl via the ocaml-evtchn bindings, and became exposed when the bindings > were moved to use libxenevtchn. > --- > tools/ocaml/libs/xsd_glue/domain_getinfo_plugin_v1/Makefile | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/tools/ocaml/libs/xsd_glue/domain_getinfo_plugin_v1/Makefile b/tools/ocaml/libs/xsd_glue/domain_getinfo_plugin_v1/Makefile > index 4be1feacfe24..6356159020c1 100644 > --- a/tools/ocaml/libs/xsd_glue/domain_getinfo_plugin_v1/Makefile > +++ b/tools/ocaml/libs/xsd_glue/domain_getinfo_plugin_v1/Makefile > @@ -11,7 +11,7 @@ OBJS = domain_getinfo_v1 > INTF = $(foreach obj, $(OBJS),$(obj).cmi) > LIBS = domain_getinfo_v1.cmxa domain_getinfo_v1.cmxs > > -LIBS_xsd_glue = $(call xenlibs-ldflags-ldlibs,xenctrl) > +LIBS_domain_getinfo_v1 = $(call xenlibs-ldflags-ldlibs,ctrl) > > all: $(INTF) $(LIBS) $(PROGRAMS) > > > base-commit: 9632ce6fe5b288244d2550cd2e619a55c5168bf8 From xen-devel-bounces@lists.xenproject.org Tue Nov 04 17:08:12 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Nov 2025 17:08:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155857.1485235 (Exim 4.92) (envelope-from ) id 1vGKVr-0000VY-QQ; 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> tpm2->control_area_address = TPM_CRB_CTRL_REQ; > tpm2->start_method = TPM2_START_METHOD_CRB; > - tpm2->log_area_minimum_length = TPM_LOG_AREA_MINIMUM_SIZE; > + tpm2->log_area_minimum_length = TPM_LOG_SIZE; These happen to be the same number, but in making this change TPM_LOG_AREA_MINIMUM_SIZE becomes unused. I suggest we delete the constant while at it.  I don't think anything good can come from having two of them. Also, as it's no functional change, this is content for 4.22 I presume? ~Andrew From xen-devel-bounces@lists.xenproject.org Tue Nov 04 23:05:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Nov 2025 23:05:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155898.1485245 (Exim 4.92) (envelope-from ) id 1vGQ5U-0007LR-8Z; Tue, 04 Nov 2025 23:05:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155898.1485245; Tue, 04 Nov 2025 23:05:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGQ5U-0007LJ-3O; Tue, 04 Nov 2025 23:05:16 +0000 Received: by outflank-mailman (input) for mailman id 1155898; Tue, 04 Nov 2025 23:05:14 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGQ5S-0007LD-HC for xen-devel@lists.xenproject.org; Tue, 04 Nov 2025 23:05:14 +0000 Received: from mail-yw1-x112b.google.com (mail-yw1-x112b.google.com [2607:f8b0:4864:20::112b]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id b73fe6c2-b9d2-11f0-9d16-b5c5bf9af7f9; Wed, 05 Nov 2025 00:05:13 +0100 (CET) Received: by mail-yw1-x112b.google.com with SMTP id 00721157ae682-7866c61a9bbso30336277b3.1 for ; Tue, 04 Nov 2025 15:05:12 -0800 (PST) Received: from [10.138.34.110] (h96-60-249-169.cncrtn.broadband.dynamic.tds.net. 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Tue, 04 Nov 2025 15:05:10 -0800 (PST) Message-ID: <5c651be7-eac5-4c9e-a209-6db3a06c3d2e@gmail.com> Date: Tue, 4 Nov 2025 18:05:04 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH] xen: privcmd: fix ioeventfd/ioreq crashing PV domain To: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= , Val Packett , Stefano Stabellini , Oleksandr Tyshchenko , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= Cc: xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, Qubes Developer Mailing List References: <20251015195713.6500-1-val@invisiblethingslab.com> <5a3660c9-1b18-4d87-a1f7-efa8d68239d8@suse.com> Content-Language: en-US From: Demi Marie Obenour Autocrypt: addr=demiobenour@gmail.com; keydata= xsFNBFp+A0oBEADffj6anl9/BHhUSxGTICeVl2tob7hPDdhHNgPR4C8xlYt5q49yB+l2nipd aq+4Gk6FZfqC825TKl7eRpUjMriwle4r3R0ydSIGcy4M6eb0IcxmuPYfbWpr/si88QKgyGSV Z7GeNW1UnzTdhYHuFlk8dBSmB1fzhEYEk0RcJqg4AKoq6/3/UorR+FaSuVwT7rqzGrTlscnT DlPWgRzrQ3jssesI7sZLm82E3pJSgaUoCdCOlL7MMPCJwI8JpPlBedRpe9tfVyfu3euTPLPx wcV3L/cfWPGSL4PofBtB8NUU6QwYiQ9Hzx4xOyn67zW73/G0Q2vPPRst8LBDqlxLjbtx/WLR 6h3nBc3eyuZ+q62HS1pJ5EvUT1vjyJ1ySrqtUXWQ4XlZyoEFUfpJxJoN0A9HCxmHGVckzTRl 5FMWo8TCniHynNXsBtDQbabt7aNEOaAJdE7to0AH3T/Bvwzcp0ZJtBk0EM6YeMLtotUut7h2 Bkg1b//r6bTBswMBXVJ5H44Qf0+eKeUg7whSC9qpYOzzrm7+0r9F5u3qF8ZTx55TJc2g656C 9a1P1MYVysLvkLvS4H+crmxA/i08Tc1h+x9RRvqba4lSzZ6/Tmt60DPM5Sc4R0nSm9BBff0N m0bSNRS8InXdO1Aq3362QKX2NOwcL5YaStwODNyZUqF7izjK4QARAQABzTxEZW1pIE1hcmll IE9iZW5vdXIgKGxvdmVyIG9mIGNvZGluZykgPGRlbWlvYmVub3VyQGdtYWlsLmNvbT7CwXgE EwECACIFAlp+A0oCGwMGCwkIBwMCBhUIAgkKCwQWAgMBAh4BAheAAAoJELKItV//nCLBhr8Q AK/xrb4wyi71xII2hkFBpT59ObLN+32FQT7R3lbZRjVFjc6yMUjOb1H/hJVxx+yo5gsSj5LS 9AwggioUSrcUKldfA/PKKai2mzTlUDxTcF3vKx6iMXKA6AqwAw4B57ZEJoMM6egm57TV19kz PMc879NV2nc6+elaKl+/kbVeD3qvBuEwsTe2Do3HAAdrfUG/j9erwIk6gha/Hp9yZlCnPTX+ VK+xifQqt8RtMqS5R/S8z0msJMI/ajNU03kFjOpqrYziv6OZLJ5cuKb3bZU5aoaRQRDzkFIR 6aqtFLTohTo20QywXwRa39uFaOT/0YMpNyel0kdOszFOykTEGI2u+kja35g9TkH90kkBTG+a EWttIht0Hy6YFmwjcAxisSakBuHnHuMSOiyRQLu43ej2+mDWgItLZ48Mu0C3IG1seeQDjEYP tqvyZ6bGkf2Vj+L6wLoLLIhRZxQOedqArIk/Sb2SzQYuxN44IDRt+3ZcDqsPppoKcxSyd1Ny 2tpvjYJXlfKmOYLhTWs8nwlAlSHX/c/jz/ywwf7eSvGknToo1Y0VpRtoxMaKW1nvH0OeCSVJ itfRP7YbiRVc2aNqWPCSgtqHAuVraBRbAFLKh9d2rKFB3BmynTUpc1BQLJP8+D5oNyb8Ts4x Xd3iV/uD8JLGJfYZIR7oGWFLP4uZ3tkneDfYzsFNBFp+A0oBEAC9ynZI9LU+uJkMeEJeJyQ/ 8VFkCJQPQZEsIGzOTlPnwvVna0AS86n2Z+rK7R/usYs5iJCZ55/JISWd8xD57ue0eB47bcJv VqGlObI2DEG8TwaW0O0duRhDgzMEL4t1KdRAepIESBEA/iPpI4gfUbVEIEQuqdqQyO4GAe+M kD0Hy5JH/0qgFmbaSegNTdQg5iqYjRZ3ttiswalql1/iSyv1WYeC1OAs+2BLOAT2NEggSiVO txEfgewsQtCWi8H1SoirakIfo45Hz0tk/Ad9ZWh2PvOGt97Ka85o4TLJxgJJqGEnqcFUZnJJ riwoaRIS8N2C8/nEM53jb1sH0gYddMU3QxY7dYNLIUrRKQeNkF30dK7V6JRH7pleRlf+wQcN fRAIUrNlatj9TxwivQrKnC9aIFFHEy/0mAgtrQShcMRmMgVlRoOA5B8RTulRLCmkafvwuhs6 dCxN0GNAORIVVFxjx9Vn7OqYPgwiofZ6SbEl0hgPyWBQvE85klFLZLoj7p+joDY1XNQztmfA rnJ9x+YV4igjWImINAZSlmEcYtd+xy3Li/8oeYDAqrsnrOjb+WvGhCykJk4urBog2LNtcyCj kTs7F+WeXGUo0NDhbd3Z6AyFfqeF7uJ3D5hlpX2nI9no/ugPrrTVoVZAgrrnNz0iZG2DVx46 x913pVKHl5mlYQARAQABwsFfBBgBAgAJBQJafgNKAhsMAAoJELKItV//nCLBwNIP/AiIHE8b oIqReFQyaMzxq6lE4YZCZNj65B/nkDOvodSiwfwjjVVE2V3iEzxMHbgyTCGA67+Bo/d5aQGj gn0TPtsGzelyQHipaUzEyrsceUGWYoKXYyVWKEfyh0cDfnd9diAm3VeNqchtcMpoehETH8fr RHnJdBcjf112PzQSdKC6kqU0Q196c4Vp5HDOQfNiDnTf7gZSj0BraHOByy9LEDCLhQiCmr+2 E0rW4tBtDAn2HkT9uf32ZGqJCn1O+2uVfFhGu6vPE5qkqrbSE8TG+03H8ecU2q50zgHWPdHM OBvy3EhzfAh2VmOSTcRK+tSUe/u3wdLRDPwv/DTzGI36Kgky9MsDC5gpIwNbOJP2G/q1wT1o Gkw4IXfWv2ufWiXqJ+k7HEi2N1sree7Dy9KBCqb+ca1vFhYPDJfhP75I/VnzHVssZ/rYZ9+5 1yDoUABoNdJNSGUYl+Yh9Pw9pE3Kt4EFzUlFZWbE4xKL/NPno+z4J9aWemLLszcYz/u3XnbO vUSQHSrmfOzX3cV4yfmjM5lewgSstoxGyTx2M8enslgdXhPthZlDnTnOT+C+OTsh8+m5tos8 HQjaPM01MKBiAqdPgksm1wu2DrrwUi6ChRVTUBcj6+/9IJ81H2P2gJk3Ls3AVIxIffLoY34E +MYSfkEjBz0E8CLOcAw7JIwAaeBT In-Reply-To: <5a3660c9-1b18-4d87-a1f7-efa8d68239d8@suse.com> Content-Type: multipart/signed; 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keydata= xsBNBE5j9EwBCACbYHjxDrxFAY3n1x9KBFvjzkG1qFSTVBnH4vpD/5Na4sZq4uDDMUCjivrm MzbWYaivYj96BygdOiw7PWxYrhuW0b2WYOeGudZyApgFz42g458s78EciuhgfuWBlxr8dOEN /9ueVFHcvtZmDbHhMVPcQ0O7gwh0JmwkOsf7P7WAfYXsQlhO/EBRrNXR0Je+GEpYADhRktxX h1d3Iz+oKYuwHioLX8ovoAT4+peOuecWUSpUWebpDbTR5i7NRP3PIblB4KzWJa2kh/f3mx4v SRGnHn+BfX42xSe0X7Ktl4Xf+KNq9Wkcjk2CZP57hV2v4pO0ZUOXD7IhlZtnfNj67WjdABEB AAHNPU1hcmVrIE1hcmN6eWtvd3NraS1Hw7NyZWNraSA8bWFybWFyZWtAaW52aXNpYmxldGhp bmdzbGFiLmNvbT7CwHoEEwEIACQCGwMFCwkIBwMFFQoJCAsFFgIDAQACHgECF4AFAll+l7cC GQEACgkQ24/THMrX1yw6kAgAiKiUhzAPXZj5ndqiQDl8u8PUK34SupLzYNMJOCBw5Wh+CPHe XYlQUwfULWxmzjiWCzzWDx2X/ONsYdRGKDKMqG5srOSWe1IYXv00MEutGsK+m/hmC5mqi/97 DVNZ1VtKj5WW79IsI0/7ueHsQYNNrXyOfZvKsRE8VIUJ0tNfLFDFlNpq9jONuF+GviMWxrA5 FoVaGmjh63xC0fOQYqhP2v8dbYS4B6bO5NZKI2cTHb9Li2iY0e7wIoNgvqgtR3Iv2U2Ry0yL D3mNQhwyxcWChexlymjfqLEZwKqaIOo57HOpt7OA+bMg6MvkdUTjNWf2GE6fqCcALjcToJ3L NDc1KM7ATQROY/RMAQgAtRWgUZ5mOy+c/qzmiVnxqDkiOJjmnIh3Pn+OqCtjcrTyPI9eVc06 uH30Jkco0soLiG/UgwVw4XwBlm95j9n6TSUms4mPBh1YiR1hBjsjYwn8zp/Ue9xWk1N6E14H aj55GxmS2H3YIlOXfQLr0X3RHsmKixTOKyisrYlJu71FmettDFV7CgMXy1Bc1LbAE08asvAS ShHFdRiRRtkuVHvY/Ebq9L54kOxtlI6ahrflMcT0YCMON5oe4GgQRh3p2uy+d/LS2bgRcQST IebErj8x0lM271f97GvxV/ypHo7XVIDI5FX1u31Agzx3HQr035GHt4HV4/GVCz+V4xt4BonB tQARAQABwsBfBBgBAgAJBQJOY/RMAhsMAAoJENuP0xzK19cs5MgH/jWLXil2Ud4TdtWnBxc+ 2/QZZk2JCssc1PgWNzvH5wH7U+8lGSlUK8ZMOqrrF8C5rX0+xEn7deSrsZChIOnUFo8rhCZK y/mBV+FhkMj24FZZ0n8w3eF4KF2t68Pt+AvMjxQHwxAMdf3QftgQhD0qYkt/28eedUQ+jwz6 kipc4qUQmqTEViQRPa3WAnKgNDQUDUwNruzthfGvHUjllf7zbPI8gkbARM0KlTkLikc9u+Ni VMbJTiGPB7YHyw2MIPq1n+mhSPAyXE6CVBnYkonQ7P3SLZssxC3PIarV+DTU68umQB3pfrfF 7hMcAY5csWrK9/x/Zz4RUfgN6Q3HLrSp9UQ= --------------NjOMfyOsKaD4eGFjlTFcA0cE Content-Type: multipart/mixed; boundary="------------FIWwo2ISlVmpMwZYZF2bDdOu" --------------FIWwo2ISlVmpMwZYZF2bDdOu Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On 11/4/25 07:15, J=C3=BCrgen Gro=C3=9F wrote: > On 15.10.25 21:57, Val Packett wrote: >> Starting a virtio backend in a PV domain would panic the kernel in >> alloc_ioreq, trying to dereference vma->vm_private_data as a pages >> pointer when in reality it stayed as PRIV_VMA_LOCKED. >> >> Fix by allocating a pages array in mmap_resource in the PV case, >> filling it with page info converted from the pfn array. This allows >> ioreq to function successfully with a backend provided by a PV dom0. >> >> Signed-off-by: Val Packett >> --- >> I've been porting the xen-vhost-frontend[1] to Qubes, which runs on am= d64 >> and we (still) use PV for dom0. The x86 part didn't give me much troub= le, >> but the first thing I found was this crash due to using a PV domain to= host >> the backend. alloc_ioreq was dereferencing the '1' constant and panick= ing >> the dom0 kernel. >> >> I figured out that I can make a pages array in the expected format fro= m the >> pfn array where the actual memory mapping happens for the PV case, and= with >> the fix, the ioreq part works: the vhost frontend replies to the probi= ng >> sequence and the guest recognizes which virtio device is being provide= d. >> >> I still have another thing to debug: the MMIO accesses from the inner = driver >> (e.g. virtio_rng) don't get through to the vhost provider (ioeventfd d= oes >> not get notified), and manually kicking the eventfd from the frontend >> seems to crash... Xen itself?? (no Linux panic on console, just a free= ze and >> quick reboot - will try to set up a serial console now) >=20 > IMHO for making the MMIO accesses work you'd need to implement ioreq-se= rver > support for PV-domains in the hypervisor. This will be a major endeavor= , so > before taking your Linux kernel patch I'd like to see this covered. Would fixing this be a good use of time, or would it be better to focus on switching to PVH dom0? I don't know if it makes sense to spend effort on PV dom0 when dom0 isn't going to be PV indefinitely. Edera might well be interested in the PV case, as they run in cloud VMs without nested virtualization. That's not relevant to Qubes OS, though. >> But I figured I'd post this as an RFC already, since the other bug may= be >> unrelated and the ioreq area itself does work now. I'd like to hear so= me >> feedback on this from people who actually know Xen :) >=20 > My main problem with your patch is that it is adding a memory allocatio= n > for a very rare use case impacting all current users of that functional= ity. >=20 > You could avoid that by using a different ioctl which could be selected= by > specifying a new flag when calling xenforeignmemory_open() (have a look= > into the Xen sources under tools/libs/foreignmemory/core.c). Should there at least be a check to prevent the kernel from crashing? I'd expect an unsupported use of the API to return an error, not cause the kernel to oops. --=20 Sincerely, Demi Marie Obenour (she/her/hers) --------------FIWwo2ISlVmpMwZYZF2bDdOu Content-Type: application/pgp-keys; name="OpenPGP_0xB288B55FFF9C22C1.asc" Content-Disposition: attachment; filename="OpenPGP_0xB288B55FFF9C22C1.asc" Content-Description: OpenPGP public key Content-Transfer-Encoding: quoted-printable -----BEGIN PGP PUBLIC KEY BLOCK----- xsFNBFp+A0oBEADffj6anl9/BHhUSxGTICeVl2tob7hPDdhHNgPR4C8xlYt5q49y B+l2nipdaq+4Gk6FZfqC825TKl7eRpUjMriwle4r3R0ydSIGcy4M6eb0IcxmuPYf bWpr/si88QKgyGSVZ7GeNW1UnzTdhYHuFlk8dBSmB1fzhEYEk0RcJqg4AKoq6/3/ UorR+FaSuVwT7rqzGrTlscnTDlPWgRzrQ3jssesI7sZLm82E3pJSgaUoCdCOlL7M MPCJwI8JpPlBedRpe9tfVyfu3euTPLPxwcV3L/cfWPGSL4PofBtB8NUU6QwYiQ9H zx4xOyn67zW73/G0Q2vPPRst8LBDqlxLjbtx/WLR6h3nBc3eyuZ+q62HS1pJ5EvU T1vjyJ1ySrqtUXWQ4XlZyoEFUfpJxJoN0A9HCxmHGVckzTRl5FMWo8TCniHynNXs BtDQbabt7aNEOaAJdE7to0AH3T/Bvwzcp0ZJtBk0EM6YeMLtotUut7h2Bkg1b//r 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Tue, 04 Nov 2025 15:06:35 -0800 (PST) Message-ID: <5dca4413-6a00-4f5e-91b4-22ce71761ac0@gmail.com> Date: Tue, 4 Nov 2025 18:06:31 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH] xen: privcmd: fix ioeventfd/ioreq crashing PV domain To: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= , Val Packett , Stefano Stabellini , Oleksandr Tyshchenko Cc: xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org References: <20251015195713.6500-1-val@invisiblethingslab.com> <5a3660c9-1b18-4d87-a1f7-efa8d68239d8@suse.com> Content-Language: en-US From: Demi Marie Obenour Autocrypt: addr=demiobenour@gmail.com; keydata= xsFNBFp+A0oBEADffj6anl9/BHhUSxGTICeVl2tob7hPDdhHNgPR4C8xlYt5q49yB+l2nipd aq+4Gk6FZfqC825TKl7eRpUjMriwle4r3R0ydSIGcy4M6eb0IcxmuPYfbWpr/si88QKgyGSV Z7GeNW1UnzTdhYHuFlk8dBSmB1fzhEYEk0RcJqg4AKoq6/3/UorR+FaSuVwT7rqzGrTlscnT DlPWgRzrQ3jssesI7sZLm82E3pJSgaUoCdCOlL7MMPCJwI8JpPlBedRpe9tfVyfu3euTPLPx wcV3L/cfWPGSL4PofBtB8NUU6QwYiQ9Hzx4xOyn67zW73/G0Q2vPPRst8LBDqlxLjbtx/WLR 6h3nBc3eyuZ+q62HS1pJ5EvUT1vjyJ1ySrqtUXWQ4XlZyoEFUfpJxJoN0A9HCxmHGVckzTRl 5FMWo8TCniHynNXsBtDQbabt7aNEOaAJdE7to0AH3T/Bvwzcp0ZJtBk0EM6YeMLtotUut7h2 Bkg1b//r6bTBswMBXVJ5H44Qf0+eKeUg7whSC9qpYOzzrm7+0r9F5u3qF8ZTx55TJc2g656C 9a1P1MYVysLvkLvS4H+crmxA/i08Tc1h+x9RRvqba4lSzZ6/Tmt60DPM5Sc4R0nSm9BBff0N m0bSNRS8InXdO1Aq3362QKX2NOwcL5YaStwODNyZUqF7izjK4QARAQABzTxEZW1pIE1hcmll IE9iZW5vdXIgKGxvdmVyIG9mIGNvZGluZykgPGRlbWlvYmVub3VyQGdtYWlsLmNvbT7CwXgE EwECACIFAlp+A0oCGwMGCwkIBwMCBhUIAgkKCwQWAgMBAh4BAheAAAoJELKItV//nCLBhr8Q AK/xrb4wyi71xII2hkFBpT59ObLN+32FQT7R3lbZRjVFjc6yMUjOb1H/hJVxx+yo5gsSj5LS 9AwggioUSrcUKldfA/PKKai2mzTlUDxTcF3vKx6iMXKA6AqwAw4B57ZEJoMM6egm57TV19kz PMc879NV2nc6+elaKl+/kbVeD3qvBuEwsTe2Do3HAAdrfUG/j9erwIk6gha/Hp9yZlCnPTX+ VK+xifQqt8RtMqS5R/S8z0msJMI/ajNU03kFjOpqrYziv6OZLJ5cuKb3bZU5aoaRQRDzkFIR 6aqtFLTohTo20QywXwRa39uFaOT/0YMpNyel0kdOszFOykTEGI2u+kja35g9TkH90kkBTG+a EWttIht0Hy6YFmwjcAxisSakBuHnHuMSOiyRQLu43ej2+mDWgItLZ48Mu0C3IG1seeQDjEYP tqvyZ6bGkf2Vj+L6wLoLLIhRZxQOedqArIk/Sb2SzQYuxN44IDRt+3ZcDqsPppoKcxSyd1Ny 2tpvjYJXlfKmOYLhTWs8nwlAlSHX/c/jz/ywwf7eSvGknToo1Y0VpRtoxMaKW1nvH0OeCSVJ itfRP7YbiRVc2aNqWPCSgtqHAuVraBRbAFLKh9d2rKFB3BmynTUpc1BQLJP8+D5oNyb8Ts4x Xd3iV/uD8JLGJfYZIR7oGWFLP4uZ3tkneDfYzsFNBFp+A0oBEAC9ynZI9LU+uJkMeEJeJyQ/ 8VFkCJQPQZEsIGzOTlPnwvVna0AS86n2Z+rK7R/usYs5iJCZ55/JISWd8xD57ue0eB47bcJv VqGlObI2DEG8TwaW0O0duRhDgzMEL4t1KdRAepIESBEA/iPpI4gfUbVEIEQuqdqQyO4GAe+M kD0Hy5JH/0qgFmbaSegNTdQg5iqYjRZ3ttiswalql1/iSyv1WYeC1OAs+2BLOAT2NEggSiVO txEfgewsQtCWi8H1SoirakIfo45Hz0tk/Ad9ZWh2PvOGt97Ka85o4TLJxgJJqGEnqcFUZnJJ riwoaRIS8N2C8/nEM53jb1sH0gYddMU3QxY7dYNLIUrRKQeNkF30dK7V6JRH7pleRlf+wQcN fRAIUrNlatj9TxwivQrKnC9aIFFHEy/0mAgtrQShcMRmMgVlRoOA5B8RTulRLCmkafvwuhs6 dCxN0GNAORIVVFxjx9Vn7OqYPgwiofZ6SbEl0hgPyWBQvE85klFLZLoj7p+joDY1XNQztmfA rnJ9x+YV4igjWImINAZSlmEcYtd+xy3Li/8oeYDAqrsnrOjb+WvGhCykJk4urBog2LNtcyCj kTs7F+WeXGUo0NDhbd3Z6AyFfqeF7uJ3D5hlpX2nI9no/ugPrrTVoVZAgrrnNz0iZG2DVx46 x913pVKHl5mlYQARAQABwsFfBBgBAgAJBQJafgNKAhsMAAoJELKItV//nCLBwNIP/AiIHE8b oIqReFQyaMzxq6lE4YZCZNj65B/nkDOvodSiwfwjjVVE2V3iEzxMHbgyTCGA67+Bo/d5aQGj gn0TPtsGzelyQHipaUzEyrsceUGWYoKXYyVWKEfyh0cDfnd9diAm3VeNqchtcMpoehETH8fr RHnJdBcjf112PzQSdKC6kqU0Q196c4Vp5HDOQfNiDnTf7gZSj0BraHOByy9LEDCLhQiCmr+2 E0rW4tBtDAn2HkT9uf32ZGqJCn1O+2uVfFhGu6vPE5qkqrbSE8TG+03H8ecU2q50zgHWPdHM OBvy3EhzfAh2VmOSTcRK+tSUe/u3wdLRDPwv/DTzGI36Kgky9MsDC5gpIwNbOJP2G/q1wT1o Gkw4IXfWv2ufWiXqJ+k7HEi2N1sree7Dy9KBCqb+ca1vFhYPDJfhP75I/VnzHVssZ/rYZ9+5 1yDoUABoNdJNSGUYl+Yh9Pw9pE3Kt4EFzUlFZWbE4xKL/NPno+z4J9aWemLLszcYz/u3XnbO vUSQHSrmfOzX3cV4yfmjM5lewgSstoxGyTx2M8enslgdXhPthZlDnTnOT+C+OTsh8+m5tos8 HQjaPM01MKBiAqdPgksm1wu2DrrwUi6ChRVTUBcj6+/9IJ81H2P2gJk3Ls3AVIxIffLoY34E +MYSfkEjBz0E8CLOcAw7JIwAaeBT In-Reply-To: <5a3660c9-1b18-4d87-a1f7-efa8d68239d8@suse.com> Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------lwUXbtkUVVHrDSsJZW06KH8b" This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------lwUXbtkUVVHrDSsJZW06KH8b Content-Type: multipart/mixed; boundary="------------kLben7oAu0YpTqsSudaMS4DM"; protected-headers="v1" From: Demi Marie Obenour To: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= , Val Packett , Stefano Stabellini , Oleksandr Tyshchenko Cc: xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org Message-ID: <5dca4413-6a00-4f5e-91b4-22ce71761ac0@gmail.com> Subject: Re: [RFC PATCH] xen: privcmd: fix ioeventfd/ioreq crashing PV domain References: <20251015195713.6500-1-val@invisiblethingslab.com> <5a3660c9-1b18-4d87-a1f7-efa8d68239d8@suse.com> In-Reply-To: <5a3660c9-1b18-4d87-a1f7-efa8d68239d8@suse.com> Autocrypt-Gossip: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== --------------kLben7oAu0YpTqsSudaMS4DM Content-Type: multipart/mixed; boundary="------------YAYmXdpvd49cKJMVdNlq2F5o" --------------YAYmXdpvd49cKJMVdNlq2F5o Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On 11/4/25 07:15, J=C3=BCrgen Gro=C3=9F wrote: > On 15.10.25 21:57, Val Packett wrote: >> Starting a virtio backend in a PV domain would panic the kernel in >> alloc_ioreq, trying to dereference vma->vm_private_data as a pages >> pointer when in reality it stayed as PRIV_VMA_LOCKED. >> >> Fix by allocating a pages array in mmap_resource in the PV case, >> filling it with page info converted from the pfn array. This allows >> ioreq to function successfully with a backend provided by a PV dom0. >> >> Signed-off-by: Val Packett >> --- >> I've been porting the xen-vhost-frontend[1] to Qubes, which runs on am= d64 >> and we (still) use PV for dom0. The x86 part didn't give me much troub= le, >> but the first thing I found was this crash due to using a PV domain to= host >> the backend. alloc_ioreq was dereferencing the '1' constant and panick= ing >> the dom0 kernel. >> >> I figured out that I can make a pages array in the expected format fro= m the >> pfn array where the actual memory mapping happens for the PV case, and= with >> the fix, the ioreq part works: the vhost frontend replies to the probi= ng >> sequence and the guest recognizes which virtio device is being provide= d. >> >> I still have another thing to debug: the MMIO accesses from the inner = driver >> (e.g. virtio_rng) don't get through to the vhost provider (ioeventfd d= oes >> not get notified), and manually kicking the eventfd from the frontend >> seems to crash... Xen itself?? (no Linux panic on console, just a free= ze and >> quick reboot - will try to set up a serial console now) >=20 > IMHO for making the MMIO accesses work you'd need to implement ioreq-se= rver > support for PV-domains in the hypervisor. This will be a major endeavor= , so > before taking your Linux kernel patch I'd like to see this covered. Could Xen return an error instead of crashing? --=20 Sincerely, Demi Marie Obenour (she/her/hers) --------------YAYmXdpvd49cKJMVdNlq2F5o Content-Type: application/pgp-keys; name="OpenPGP_0xB288B55FFF9C22C1.asc" Content-Disposition: attachment; filename="OpenPGP_0xB288B55FFF9C22C1.asc" Content-Description: OpenPGP public key Content-Transfer-Encoding: quoted-printable -----BEGIN PGP PUBLIC KEY BLOCK----- xsFNBFp+A0oBEADffj6anl9/BHhUSxGTICeVl2tob7hPDdhHNgPR4C8xlYt5q49y B+l2nipdaq+4Gk6FZfqC825TKl7eRpUjMriwle4r3R0ydSIGcy4M6eb0IcxmuPYf bWpr/si88QKgyGSVZ7GeNW1UnzTdhYHuFlk8dBSmB1fzhEYEk0RcJqg4AKoq6/3/ UorR+FaSuVwT7rqzGrTlscnTDlPWgRzrQ3jssesI7sZLm82E3pJSgaUoCdCOlL7M MPCJwI8JpPlBedRpe9tfVyfu3euTPLPxwcV3L/cfWPGSL4PofBtB8NUU6QwYiQ9H zx4xOyn67zW73/G0Q2vPPRst8LBDqlxLjbtx/WLR6h3nBc3eyuZ+q62HS1pJ5EvU T1vjyJ1ySrqtUXWQ4XlZyoEFUfpJxJoN0A9HCxmHGVckzTRl5FMWo8TCniHynNXs BtDQbabt7aNEOaAJdE7to0AH3T/Bvwzcp0ZJtBk0EM6YeMLtotUut7h2Bkg1b//r 6bTBswMBXVJ5H44Qf0+eKeUg7whSC9qpYOzzrm7+0r9F5u3qF8ZTx55TJc2g656C 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Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=HNHuCkFjRJ6dat61nJfyqz2dAWkldfxMvfnpTbZOFkxxMmFhRyqyV7ORpMBT+MPup q6x5uNm//A9ODbyNP/l2p4Fx2fLpwXhlYpZg9Wzrt85yCDjSddV0YsVSDljQgOk/+m dg486NkfgziJkMR1YpDmW2JYb2e5yINKfeoM+w+sRfNpf03+BiScoKygJKWM/lZijz mP1vbqseFTlN2YxyldEg9/3Joc5t+kMLtEmaPUpQ/tjT85dDNFzSov+/c7JjE35+0d dLeNSyWIHZLBcyDOJzxUsuWGV6iBlKEyQ48eNbiuJpLxXtwt6RORaSF+U8FLuDvzwb i48+65fKXzQNw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1762300962; x=1762561462; i=ngoc-tu.dinh@vates.tech; bh=GOeejd4Z1hffN8ONQg2k3fMMI9NhYPCGOfRt4h2Y+g4=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=GqE9+k9ur8Qsk4bUehkQgDpDgGkgpA3EATAQym2TL1gdcIsxei+knjyxGlqaKo3Qn ik15bsIJ27DeOLWW8sYA1QtE3glQtr0AnF11wtRO9VKh8mLU4C1J2tDkF5A7MgYOwi RhCwSfIfm0cEs6QAEd1/aHsQls7KPuTHBcDAa77ZsNGVmaKiL8fGJ54FlFMUTJ7eR4 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Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On 04/11/2025 18:11, Andrew Cooper wrote: > On 04/11/2025 4:12 pm, Tu Dinh wrote: >> The LAML field should follow the TCG PFP specification: >> >> The TCG ACPI specification uses the field name "Log Area Minimum >> Length", but the field value is the actual log area length reserved by >> Platform Firmware, not a lower bound. >> >> Signed-off-by: Tu Dinh >> --- >> tools/libacpi/build.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/tools/libacpi/build.c b/tools/libacpi/build.c >> index 2f29863db1..95188e217e 100644 >> --- a/tools/libacpi/build.c >> +++ b/tools/libacpi/build.c >> @@ -473,7 +473,7 @@ static int construct_secondary_tables(struct acpi_ct= xt *ctxt, >> tpm2->platform_class =3D TPM2_ACPI_CLASS_CLIENT; >> tpm2->control_area_address =3D TPM_CRB_CTRL_REQ; >> tpm2->start_method =3D TPM2_START_METHOD_CRB; >> - tpm2->log_area_minimum_length =3D TPM_LOG_AREA_MINIMUM_SIZE= ; >> + tpm2->log_area_minimum_length =3D TPM_LOG_SIZE; > > These happen to be the same number, but in making this change > TPM_LOG_AREA_MINIMUM_SIZE becomes unused. > > I suggest we delete the constant while at it.=C2=A0 I don't think anythin= g > good can come from having two of them. Agreed. > > Also, as it's no functional change, this is content for 4.22 I presume? Yes, it's for 4.22. > > ~Andrew > -- Ngoc Tu Dinh | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Wed Nov 05 00:03:31 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 05 Nov 2025 00:03:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155933.1485275 (Exim 4.92) (envelope-from ) id 1vGQzr-0007q2-BB; Wed, 05 Nov 2025 00:03:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155933.1485275; Wed, 05 Nov 2025 00:03:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGQzr-0007pv-8a; Wed, 05 Nov 2025 00:03:31 +0000 Received: by outflank-mailman (input) for mailman id 1155933; Wed, 05 Nov 2025 00:03:30 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGQzq-0007eR-Pm for xen-devel@lists.xenproject.org; Wed, 05 Nov 2025 00:03:30 +0000 Received: from mail180-3.suw31.mandrillapp.com (mail180-3.suw31.mandrillapp.com [198.2.180.3]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id dbb7c141-b9da-11f0-9d16-b5c5bf9af7f9; Wed, 05 Nov 2025 01:03:29 +0100 (CET) Received: from pmta11.mandrill.prod.suw01.rsglab.com (localhost [127.0.0.1]) by mail180-3.suw31.mandrillapp.com (Mailchimp) with ESMTP id 4d1QX00VxjzDRHxHs for ; Wed, 5 Nov 2025 00:03:28 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id a786ec3e0a7a48769e94054a7ee72a06; Wed, 05 Nov 2025 00:03:27 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: dbb7c141-b9da-11f0-9d16-b5c5bf9af7f9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1762301008; x=1762571008; bh=8W92A1Mr2lIJPILYhyF4rcihIHzKMgtpeeOD07WrWMw=; h=From:Subject:To:Cc:Message-Id:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=ELGbczGPUO//Tvhze/KPoq67L6G9H/4RotAJFDVGpzMREftb1s1bIR/ouFZAok0oJ 1U5/iW0i9v5AjX4m1wgQUox0Rpb2PIJlN4+nWYITWbSIBVb/s6eDGMegAm/tffSKNO ROaO32irkmNvrXAsDME8vaTFxee3x2wGm1uWV9vSbfLG4Se+XkJ/IuvrWR46nGkyUY wJ+szLmxkYJZTCNTqdQy1/R0q8lGAarCNE7Rq/bI8fS6YsWl/Qb2uPMWuCns4ask8X BL3pAefn3l77ukn38t8qCpqYEvBFSnvYxDdtE0AR3ZBTS7wh2SU91Kub+2Htb35ZRM mbb+hxvh73ypQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1762301008; x=1762561508; i=ngoc-tu.dinh@vates.tech; bh=8W92A1Mr2lIJPILYhyF4rcihIHzKMgtpeeOD07WrWMw=; h=From:Subject:To:Cc:Message-Id:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=i9avZkUTsdwFg0cZyegKTWjpvsT5X6H/n8sQp20vrkbq6ssk5uOO7dPwSMOzPfuQr PIbghdEOGf4DIfUdPkFikRpSu+rHbREqS9U0WMTV3nZQB+eXEoij4SPHhnVGrMJetI vOb1P77UG/xaGMet/P5trN43k59CkPf1UgGdJNnkvp1Jb0pVyElGHNdwN3hBtMPQaL iXeDgu5/14jMyrX8cXCHjZSxbg/v7RnhDfyLfQCIuR+dNXyf0LUJ5mOthw4VUmB7ak YxQbghyn+FoNIeLrrYi4gG1vihkBSu8AlXuLRfYoEcJ5YPq9cmiMn1yxTDOCsoUgsA 0dhF3RUWOPj2A== From: "Tu Dinh" Subject: =?utf-8?Q?[PATCH=20for-4.22=20v2]=20acpi:=20Set=20TPM2=20LAML=20to=20actual=20log=20area=20size?= X-Mailer: git-send-email 2.51.0.windows.2 X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1762301007171 To: xen-devel@lists.xenproject.org Cc: "Tu Dinh" , "Jan Beulich" , "Anthony PERARD" , "Daniel Smith" , "Andrew Cooper" Message-Id: <20251105000310.690-1-ngoc-tu.dinh@vates.tech> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.a786ec3e0a7a48769e94054a7ee72a06?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20251105:md Date: Wed, 05 Nov 2025 00:03:27 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit The LAML field should follow the TCG PFP specification: The TCG ACPI specification uses the field name "Log Area Minimum Length", but the field value is the actual log area length reserved by Platform Firmware, not a lower bound. Remove the now-unused TPM_LOG_AREA_MINIMUM_SIZE. No functional change. Signed-off-by: Tu Dinh --- v2: Remove the now-unused TPM_LOG_AREA_MINIMUM_SIZE. --- tools/libacpi/acpi2_0.h | 1 - tools/libacpi/build.c | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/tools/libacpi/acpi2_0.h b/tools/libacpi/acpi2_0.h index 6dfa939a8c..51623e2a8a 100644 --- a/tools/libacpi/acpi2_0.h +++ b/tools/libacpi/acpi2_0.h @@ -140,7 +140,6 @@ struct acpi_20_tpm2 { #define TPM_LOG_AREA_ADDRESS 0xFED50000 -#define TPM_LOG_AREA_MINIMUM_SIZE (64 << 10) #define TPM_LOG_SIZE (64 << 10) /* diff --git a/tools/libacpi/build.c b/tools/libacpi/build.c index 2f29863db1..95188e217e 100644 --- a/tools/libacpi/build.c +++ b/tools/libacpi/build.c @@ -473,7 +473,7 @@ static int construct_secondary_tables(struct acpi_ctxt *ctxt, tpm2->platform_class = TPM2_ACPI_CLASS_CLIENT; tpm2->control_area_address = TPM_CRB_CTRL_REQ; tpm2->start_method = TPM2_START_METHOD_CRB; - tpm2->log_area_minimum_length = TPM_LOG_AREA_MINIMUM_SIZE; + tpm2->log_area_minimum_length = TPM_LOG_SIZE; tpm2->log_area_start_address = TPM_LOG_AREA_ADDRESS; set_checksum(tpm2, -- 2.43.0 -- Ngoc Tu Dinh | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Wed Nov 05 00:06:53 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 05 Nov 2025 00:06:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155947.1485285 (Exim 4.92) (envelope-from ) id 1vGR2y-00005U-Pt; Wed, 05 Nov 2025 00:06:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155947.1485285; Wed, 05 Nov 2025 00:06:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGR2y-00005N-MV; Wed, 05 Nov 2025 00:06:44 +0000 Received: by outflank-mailman (input) for mailman id 1155947; Wed, 05 Nov 2025 00:06:43 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGR2x-00005G-Nh for xen-devel@lists.xenproject.org; Wed, 05 Nov 2025 00:06:43 +0000 Received: from sea.source.kernel.org (sea.source.kernel.org [172.234.252.31]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 4d796278-b9db-11f0-9d16-b5c5bf9af7f9; Wed, 05 Nov 2025 01:06:40 +0100 (CET) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 1453641A64; Wed, 5 Nov 2025 00:06:39 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4BAF5C4CEF8; Wed, 5 Nov 2025 00:06:38 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 4d796278-b9db-11f0-9d16-b5c5bf9af7f9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1762301198; bh=048oJY/X5+pJPynN2mvViGRPVrdBmdl4FiN7oOb7hoI=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=YbtboFI+88NS039bx597KP/xhPqb8dWC+zTY66xc8rl+faZVzdkfpQJmr4GiaTprH dzE1KsSuCa5AiH3dhAeQ9Pwni6qaCEQ9aLYnVq9D4C0H35t4/TRkZSqmK3EBq6UFxO ei7KqVc1O7G5NKzF4mL3n/FWg/T64AnArg7yRfA2t1Ob3bYenU9rqIAfSY+exBTXQg M8FLMaFegy3mTigHgLQsRN5CmKSAiIyip/Ce5iJuML1v9D2bcMp0Veq075Ugc+dP39 BsUdL8mtSQnBD29daD3i0dJ3KmjUGybl37XtiPBPeECneKUas14cGmZ49Jxv16tqqO oLA6v9wtwvr5w== Date: Tue, 4 Nov 2025 16:06:37 -0800 (PST) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Oleksii Kurochko cc: xen-devel@lists.xenproject.org, Community Manager , committers@xenproject.org Subject: Re: [PATCH v2] CHANGELOG.md: Update for 4.21 release cycle In-Reply-To: <1930832802df980a6fe610233265bc238fcfaca4.1758901622.git.oleksii.kurochko@gmail.com> Message-ID: References: <1930832802df980a6fe610233265bc238fcfaca4.1758901622.git.oleksii.kurochko@gmail.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Fri, 26 Sep 2025, Oleksii Kurochko wrote: > Signed-off-by: Oleksii Kurochko ARM side: Reviewed-by: Stefano Stabellini > --- > Chnages in v2: > - Drop the following items: > - Allow to unflatten DTs. > - Basic kexec support to Mini-OS for running in PVH mode. > --- > CHANGELOG.md | 11 ++++++++++- > 1 file changed, 10 insertions(+), 1 deletion(-) > > diff --git a/CHANGELOG.md b/CHANGELOG.md > index ca1b43b940..0afd2eeb4b 100644 > --- a/CHANGELOG.md > +++ b/CHANGELOG.md > @@ -14,6 +14,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) > - Debian Trixie added to CI. Debian Bullseye retired from CI for RISC-V due > to the baseline change. > - Linux based device model stubdomains are now fully supported. > + - Remove libxenctrl usage from xenstored. > > - On x86: > - Restrict the cache flushing done as a result of guest physical memory map > @@ -38,9 +39,17 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) > and 28 (Temperature Probe). > > - On Arm: > - - Ability to enable stack protector > + - Ability to enable stack protector. > - GICv3.1 eSPI (Extended Shared Peripheral Interrupts) support for Xen > and guest domains. > + - SMMU handling for PCIe passthrough. > + - R-Car Gen4 PCI host controller support. > + - SCI SCMI SMC single-agent support. > + - Initial support for MPU, R82, and R52: reaches the early boot stages. > + > + - On RISC-V: > + - Basic UART support and external interrupts (APLIC/IMSIC only) handling > + for hypervisor mode. > > ### Removed > - On x86: > -- > 2.51.0 > > From xen-devel-bounces@lists.xenproject.org Wed Nov 05 01:11:03 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 05 Nov 2025 01:11:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155962.1485294 (Exim 4.92) (envelope-from ) id 1vGS2w-0007t2-BC; Wed, 05 Nov 2025 01:10:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155962.1485294; Wed, 05 Nov 2025 01:10:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGS2w-0007sv-82; Wed, 05 Nov 2025 01:10:46 +0000 Received: by outflank-mailman (input) for mailman id 1155962; Wed, 05 Nov 2025 01:10:44 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGS2u-0007sp-Lc for xen-devel@lists.xenproject.org; Wed, 05 Nov 2025 01:10:44 +0000 Received: from sea.source.kernel.org (sea.source.kernel.org [2600:3c0a:e001:78e:0:1991:8:25]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 3f95c9a4-b9e4-11f0-9d16-b5c5bf9af7f9; Wed, 05 Nov 2025 02:10:43 +0100 (CET) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 1D5914488A; Wed, 5 Nov 2025 01:10:41 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id EACECC116B1; Wed, 5 Nov 2025 01:10:40 +0000 (UTC) Received: from [10.30.226.235] (localhost [IPv6:::1]) by aws-us-west-2-korg-oddjob-rhel9-1.codeaurora.org (Postfix) with ESMTP id EAE14380AA54; Wed, 5 Nov 2025 01:10:15 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 3f95c9a4-b9e4-11f0-9d16-b5c5bf9af7f9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1762305041; bh=Azv52bsIeKWa7QSW1vxmRSp2Zri86Y2h560msvWaCxY=; h=Subject:From:Date:References:In-Reply-To:To:Cc:From; b=V+vFABp5elm84Ss97Uw9f0l2rd7J1m5ys2OvlQ2FI62hO3sWjbXhw+xsmyE0DkDYq v70qxtIHD4GdSy/IQJ20zPZ2ISx2E6afClcfzrY6axaZGfRMz+inyMudse+ruZO0ei zvz4zH08UjhDXJhbfXpym77/PGd0dbTZB1h6SVVQthgZhZ7yZshY/J+k3FI4FC3UcP wfg5xDe3NJLFJ1cjk7PLdBYTPgrKUO/ZNyRd5zoDBGg1FqcdgASiDNz9GfA9POkq4R mdzFl97BUZORZXX9uCbZb8hr/Pe72T+XrWqvev8nNO0WPpH+M2yeLIsfl5HWech4VE rbZDIvWqx8Ovw== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: Re: [PATCH] xen/netfront: Comment Correction: Fix Spelling Error and Description of Queue Quantity Rules From: patchwork-bot+netdevbpf@kernel.org Message-Id: <176230501449.3047110.1916177253371882159.git-patchwork-notify@kernel.org> Date: Wed, 05 Nov 2025 01:10:14 +0000 References: <20251103032212.2462-1-chuguangqing@inspur.com> In-Reply-To: <20251103032212.2462-1-chuguangqing@inspur.com> To: Chu Guangqing Cc: jgross@suse.com, sstabellini@kernel.org, oleksandr_tyshchenko@epam.com, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, xen-devel@lists.xenproject.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Hello: This patch was applied to netdev/net-next.git (main) by Jakub Kicinski : On Mon, 3 Nov 2025 11:22:12 +0800 you wrote: > The original comments contained spelling errors and incomplete logical > descriptions, which could easily lead to misunderstandings of the code > logic. The specific modifications are as follows: > > Correct the spelling error by changing "inut max" to "but not exceed the > maximum limit"; > > [...] Here is the summary with links: - xen/netfront: Comment Correction: Fix Spelling Error and Description of Queue Quantity Rules https://git.kernel.org/netdev/net-next/c/52665fcc2241 You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html From xen-devel-bounces@lists.xenproject.org Wed Nov 05 01:17:09 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 05 Nov 2025 01:17:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1155973.1485305 (Exim 4.92) (envelope-from ) id 1vGS93-00004t-1v; Wed, 05 Nov 2025 01:17:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1155973.1485305; Wed, 05 Nov 2025 01:17:05 +0000 Received: from localhost ([127.0.0.1] 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Tue, 4 Nov 2025 22:16:44 -0300 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH] xen: privcmd: fix ioeventfd/ioreq crashing PV domain To: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= , Stefano Stabellini , Oleksandr Tyshchenko Cc: xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org References: <20251015195713.6500-1-val@invisiblethingslab.com> <5a3660c9-1b18-4d87-a1f7-efa8d68239d8@suse.com> Content-Language: en-US From: Val Packett Autocrypt: addr=val@invisiblethingslab.com; keydata= xm8EaFTEiRMFK4EEACIDAwQ+qzawvLuE95iu+QkRqp8P9z6XvFopWtYOaEnYf/nE8KWCnsCD jz82tdbKBpmVOdR6ViLD9tzHvaZ1NqZ9mbrszMXq09VfefoCfZp8jnA2yCT8Y4ykmv6902Ne NnlkVwrNKFZhbCBQYWNrZXR0IDx2YWxAaW52aXNpYmxldGhpbmdzbGFiLmNvbT7CswQTEwkA OxYhBAFMrro+oMGIFPc7Uc87uZxqzalRBQJoVMSJAhsDBQsJCAcCAiICBhUKCQgLAgQWAgMB Ah4HAheAAAoJEM87uZxqzalRlIIBf0cujzfSLhvib9iY8LBh8Tirgypm+hJHoY563xhP0YRS pmqZ6goIuSGpEKcW5mV3egF/TLLAOjsfroWae4giImTVOJvLOsUycxAP4O5b1Qiy+cCGsHKA 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ioeventfd/ioreq crashing PV domain To: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= , Stefano Stabellini , Oleksandr Tyshchenko Cc: xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org References: <20251015195713.6500-1-val@invisiblethingslab.com> <5a3660c9-1b18-4d87-a1f7-efa8d68239d8@suse.com> Content-Language: en-US From: Val Packett Autocrypt: addr=val@invisiblethingslab.com; keydata= xm8EaFTEiRMFK4EEACIDAwQ+qzawvLuE95iu+QkRqp8P9z6XvFopWtYOaEnYf/nE8KWCnsCD jz82tdbKBpmVOdR6ViLD9tzHvaZ1NqZ9mbrszMXq09VfefoCfZp8jnA2yCT8Y4ykmv6902Ne NnlkVwrNKFZhbCBQYWNrZXR0IDx2YWxAaW52aXNpYmxldGhpbmdzbGFiLmNvbT7CswQTEwkA OxYhBAFMrro+oMGIFPc7Uc87uZxqzalRBQJoVMSJAhsDBQsJCAcCAiICBhUKCQgLAgQWAgMB Ah4HAheAAAoJEM87uZxqzalRlIIBf0cujzfSLhvib9iY8LBh8Tirgypm+hJHoY563xhP0YRS pmqZ6goIuSGpEKcW5mV3egF/TLLAOjsfroWae4giImTVOJvLOsUycxAP4O5b1Qiy+cCGsHKA nCRzrvqnPkyf4OeRznMEaFTEiRIFK4EEACIDAwSffe3tlMmmg3eKVp7SJ+CNZLN0M5qzHSCV dBBkIVvEJo+8SDg4jrx/832rxpvMCz2+x7+OHaeBHKafhOWUccYBLKqV/3nBftxCkbzXDbfY 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2002:a17:903:3c4b:b0:293:33b:a9b0 with SMTP id d9443c01a7336-2962ae10998mr22075795ad.32.1762311317247; Tue, 04 Nov 2025 18:55:17 -0800 (PST) From: Ritesh Harjani (IBM) To: Kevin Brodsky , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Kevin Brodsky , Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org, Venkat Rao Bagalkote Subject: Re: [PATCH v4 01/12] powerpc/64s: Do not re-activate batched TLB flush In-Reply-To: <20251029100909.3381140-2-kevin.brodsky@arm.com> Date: Wed, 05 Nov 2025 08:16:58 +0530 Message-ID: <87qzud42n1.ritesh.list@gmail.com> References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-2-kevin.brodsky@arm.com> MIME-Version: 1.0 Content-Type: text/plain Kevin Brodsky writes: > From: Alexander Gordeev > > Since commit b9ef323ea168 ("powerpc/64s: Disable preemption in hash > lazy mmu mode") a task can not be preempted while in lazy MMU mode. > Therefore, the batch re-activation code is never called, so remove it. > > Signed-off-by: Alexander Gordeev > Signed-off-by: Kevin Brodsky > --- > arch/powerpc/include/asm/thread_info.h | 2 -- > arch/powerpc/kernel/process.c | 25 ------------------------- > 2 files changed, 27 deletions(-) > Since the commit referenced in above disables the preemption in arch_enter_lazy_mmu(), so the expectation is that we will never be context switched while in lazy_mmu, hence the code changes in switch_to() around __flush_tlb_pending() should ideally never be called. With this analysis - the patch looks good to me. I will give this entire patch series a try on Power HW with Hash mmu too (which uses lazy mmu and let you know the results of that)! For this patch please feel free to add: Reviewed-by: Ritesh Harjani (IBM) CC: Venkat who also runs CI on linux Power HW for upstream testing :) -ritesh > diff --git a/arch/powerpc/include/asm/thread_info.h b/arch/powerpc/include/asm/thread_info.h > index b0f200aba2b3..97f35f9b1a96 100644 > --- a/arch/powerpc/include/asm/thread_info.h > +++ b/arch/powerpc/include/asm/thread_info.h > @@ -154,12 +154,10 @@ void arch_setup_new_exec(void); > /* Don't move TLF_NAPPING without adjusting the code in entry_32.S */ > #define TLF_NAPPING 0 /* idle thread enabled NAP mode */ > #define TLF_SLEEPING 1 /* suspend code enabled SLEEP mode */ > -#define TLF_LAZY_MMU 3 /* tlb_batch is active */ > #define TLF_RUNLATCH 4 /* Is the runlatch enabled? */ > > #define _TLF_NAPPING (1 << TLF_NAPPING) > #define _TLF_SLEEPING (1 << TLF_SLEEPING) > -#define _TLF_LAZY_MMU (1 << TLF_LAZY_MMU) > #define _TLF_RUNLATCH (1 << TLF_RUNLATCH) > > #ifndef __ASSEMBLER__ > diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c > index eb23966ac0a9..9237dcbeee4a 100644 > --- a/arch/powerpc/kernel/process.c > +++ b/arch/powerpc/kernel/process.c > @@ -1281,9 +1281,6 @@ struct task_struct *__switch_to(struct task_struct *prev, > { > struct thread_struct *new_thread, *old_thread; > struct task_struct *last; > -#ifdef CONFIG_PPC_64S_HASH_MMU > - struct ppc64_tlb_batch *batch; > -#endif > > new_thread = &new->thread; > old_thread = ¤t->thread; > @@ -1291,14 +1288,6 @@ struct task_struct *__switch_to(struct task_struct *prev, > WARN_ON(!irqs_disabled()); > > #ifdef CONFIG_PPC_64S_HASH_MMU > - batch = this_cpu_ptr(&ppc64_tlb_batch); > - if (batch->active) { > - current_thread_info()->local_flags |= _TLF_LAZY_MMU; > - if (batch->index) > - __flush_tlb_pending(batch); > - batch->active = 0; > - } > - > /* > * On POWER9 the copy-paste buffer can only paste into > * foreign real addresses, so unprivileged processes can not > @@ -1369,20 +1358,6 @@ struct task_struct *__switch_to(struct task_struct *prev, > */ > > #ifdef CONFIG_PPC_BOOK3S_64 > -#ifdef CONFIG_PPC_64S_HASH_MMU > - /* > - * This applies to a process that was context switched while inside > - * arch_enter_lazy_mmu_mode(), to re-activate the batch that was > - * deactivated above, before _switch(). This will never be the case > - * for new tasks. > - */ > - if (current_thread_info()->local_flags & _TLF_LAZY_MMU) { > - current_thread_info()->local_flags &= ~_TLF_LAZY_MMU; > - batch = this_cpu_ptr(&ppc64_tlb_batch); > - batch->active = 1; > - } > -#endif > - > /* > * Math facilities are masked out of the child MSR in copy_thread. > * A new task does not need to restore_math because it will > -- > 2.47.0 From xen-devel-bounces@lists.xenproject.org Wed Nov 05 03:42:10 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 05 Nov 2025 03:42:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156001.1485324 (Exim 4.92) (envelope-from ) id 1vGUPL-0001Ze-Ai; Wed, 05 Nov 2025 03:42:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1156001.1485324; Wed, 05 Nov 2025 03:42:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGUPL-0001ZX-8C; Wed, 05 Nov 2025 03:42:03 +0000 Received: by outflank-mailman (input) for mailman id 1156001; Wed, 05 Nov 2025 03:42:02 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGUPJ-0001ZB-Vd for xen-devel@lists.xenproject.org; Wed, 05 Nov 2025 03:42:01 +0000 Received: from mail-pl1-x62a.google.com (mail-pl1-x62a.google.com [2607:f8b0:4864:20::62a]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 610ea4a3-b9f9-11f0-980a-7dc792cee155; Wed, 05 Nov 2025 04:41:59 +0100 (CET) Received: by mail-pl1-x62a.google.com with SMTP id d9443c01a7336-2952048eb88so68096585ad.0 for ; Tue, 04 Nov 2025 19:41:58 -0800 (PST) Received: from dw-tp ([171.76.85.117]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-29601a61418sm43663725ad.96.2025.11.04.19.41.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Nov 2025 19:41:56 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 610ea4a3-b9f9-11f0-980a-7dc792cee155 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1762314117; x=1762918917; darn=lists.xenproject.org; h=mime-version:references:message-id:date:in-reply-to:subject:cc:to :from:from:to:cc:subject:date:message-id:reply-to; bh=9PpcYW9rXkka09Jy11m9xJQRt/n8jdZMdqOTeKYVeZk=; b=ZFUrLFSIvJXzdpTEHmdcXuSeFp+EA45KB6SNtQliqQ7hnSo6E1DpazS2s8bUNasEII 0os5G0YfHX33X1C+bPhQxXjBf2e01b2pYiTRiYBc6NcCYC8JbqkdFG6LVr64OBjH4mox Gmmq5NtuwHhMNx1sq8wE726zm1wE0pGRY3xevgThDU93ScsWQY7HQOQPl2Q/EuT7rlw9 a+VKRLpeLqN0k8in09MqZBydNpIe/pLMysyXXnwjAB8iEY/ERdPuD3HP5sG84TrA3xxX k+jAMkvWavOcJgarrpveYZM8goNpy11SsRrGs7lIOclyQ/Q2s+1XyQVdpCMZhL2nmZ4r hadw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1762314117; x=1762918917; h=mime-version:references:message-id:date:in-reply-to:subject:cc:to :from:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=9PpcYW9rXkka09Jy11m9xJQRt/n8jdZMdqOTeKYVeZk=; b=fPotHw5TNgAG1DvjKHeeNFw3mdbPW4KCVnVsLGzh8VKTanMkFlkiqWHLflZQOLxD8a h4vqwXWWu8Q+/NNicI/DRI2KYvpI4qW4ELZXYzFswyOzF+rQBotKeObOGRZYR5ltmVhH MjVU7QUakU6JyVVRbmarY0PPS9ryo/Dhc665IxRPlBfG+4/4lF3M7gnnwzUvBuYgEKJa ml+M1Fo9MdwRJnJ7Kg86oak817hk/o83M+Eol7+CpiOJ9niX1+zbInT00VmT7hx1gZJi pIsgiACPXHefFpEwDJGer61DEKuuvmIT9OTjZbSeHv/6zNk2y+TsN5uGw13i+DAfbzQT TfNw== X-Forwarded-Encrypted: i=1; AJvYcCXW1g0w5srL7OqAoMzE+O/4UHpLldWWIgIgAqWewsUs19ZBmtjStcmWwenEb2rUk/8J7LFUilQSzJU=@lists.xenproject.org X-Gm-Message-State: AOJu0YzfnPvpoL2ECEETEuUdmSCLavDO8QBTqVU7fiw9j0ftugVr6BGv oh31smGwkGW0vGfQaEObenzrOdm29lt1uhFtKDK8a0PZtEXuOAhpzIFo X-Gm-Gg: ASbGncvvnOSK5Xxfk6uNQIoMIByNuMwkEesVODQpuQdrvuBqandhnj9IRFSuKC40COX Gcg030dPpG1Tuc9csgTp+YmusiOO94nQQr+j4zcEWFa9jJjuYfsmkl8OdjvFjybQT5gle4cD2tl pNPfwmKQHpoU1hMu7SmRqDePyyNUnm5bmDPqiHnBKg0+a+nT9ccS8a5DAL+A/6yENyesvJtPVmo 9BC7ihSnbgyCQtaddy+V620fRdsn7TRAE70i6FDd3oXKRGXJ3mZfCrU/onX7wc9V/8uPKqa1sl2 gFVsLIFuldOKDd4e3uyQJNRUsNAFFpCwWfRDGFFDXaFGfAwEBXYjchPFETFbgezXuM+O8TBaA2B zHqOeRhb6BzcLMp2blonNbt4OJI1so24La/WiA5qoJoDU7LJYqA5IxS0Oq5E3bYZ390A/qQ== X-Google-Smtp-Source: AGHT+IHU+u4c4m70sp/Km2qphWV2GETQaiqBJlBLQ9oH8KuDbSRxjLHzXNgoB+GOOUcEEs7QOw2HMQ== X-Received: by 2002:a17:903:944:b0:295:7f1d:b02d with SMTP id d9443c01a7336-2962ad3340fmr26429125ad.22.1762314116721; Tue, 04 Nov 2025 19:41:56 -0800 (PST) From: Ritesh Harjani (IBM) To: Kevin Brodsky , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Kevin Brodsky , Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org Subject: Re: [PATCH v4 03/12] powerpc/mm: implement arch_flush_lazy_mmu_mode() In-Reply-To: <20251029100909.3381140-4-kevin.brodsky@arm.com> Date: Wed, 05 Nov 2025 08:45:06 +0530 Message-ID: <87pl9x41c5.ritesh.list@gmail.com> References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-4-kevin.brodsky@arm.com> MIME-Version: 1.0 Content-Type: text/plain Kevin Brodsky writes: > Upcoming changes to the lazy_mmu API will cause > arch_flush_lazy_mmu_mode() to be called when leaving a nested > lazy_mmu section. > > Move the relevant logic from arch_leave_lazy_mmu_mode() to > arch_flush_lazy_mmu_mode() and have the former call the latter. > > Note: the additional this_cpu_ptr() on the > arch_leave_lazy_mmu_mode() path will be removed in a subsequent > patch. > > Signed-off-by: Kevin Brodsky > --- > .../powerpc/include/asm/book3s/64/tlbflush-hash.h | 15 +++++++++++---- > 1 file changed, 11 insertions(+), 4 deletions(-) > > diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h b/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h > index 146287d9580f..7704dbe8e88d 100644 > --- a/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h > +++ b/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h > @@ -41,6 +41,16 @@ static inline void arch_enter_lazy_mmu_mode(void) > batch->active = 1; > } > > +static inline void arch_flush_lazy_mmu_mode(void) > +{ > + struct ppc64_tlb_batch *batch; > + > + batch = this_cpu_ptr(&ppc64_tlb_batch); > + > + if (batch->index) > + __flush_tlb_pending(batch); > +} > + This looks a bit scary since arch_flush_lazy_mmu_mode() is getting called from several of the places in later patches(). Although I think arch_flush_lazy_mmu_mode() will only always be called in nested lazy mmu case right? Do you think we can add a VM_BUG_ON(radix_enabled()); in above to make sure the above never gets called in radix_enabled() case. I am still going over the patch series, but while reviewing this I wanted to take your opinion. Ohh wait.. There is no way of knowing the return value from arch_enter_lazy_mmu_mode().. I think you might need a similar check to return from arch_flush_lazy_mmu_mode() too, if radix_enabled() is true. -ritesh > static inline void arch_leave_lazy_mmu_mode(void) > { > struct ppc64_tlb_batch *batch; > @@ -49,14 +59,11 @@ static inline void arch_leave_lazy_mmu_mode(void) > return; > batch = this_cpu_ptr(&ppc64_tlb_batch); > > - if (batch->index) > - __flush_tlb_pending(batch); > + arch_flush_lazy_mmu_mode(); > batch->active = 0; > preempt_enable(); > } > > -#define arch_flush_lazy_mmu_mode() do {} while (0) > - > extern void hash__tlbiel_all(unsigned int action); > > extern void flush_hash_page(unsigned long vpn, real_pte_t pte, int psize, > -- > 2.47.0 From xen-devel-bounces@lists.xenproject.org Wed Nov 05 04:49:03 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 05 Nov 2025 04:49:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156015.1485335 (Exim 4.92) (envelope-from ) id 1vGVRx-0000vB-1k; Wed, 05 Nov 2025 04:48:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1156015.1485335; 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Tue, 04 Nov 2025 20:48:42 -0800 (PST) From: Ritesh Harjani (IBM) To: Kevin Brodsky , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Kevin Brodsky , Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org Subject: Re: [PATCH v4 05/12] mm: introduce CONFIG_ARCH_HAS_LAZY_MMU_MODE In-Reply-To: <20251029100909.3381140-6-kevin.brodsky@arm.com> Date: Wed, 05 Nov 2025 10:10:33 +0530 Message-ID: <87o6ph3xdq.ritesh.list@gmail.com> References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-6-kevin.brodsky@arm.com> MIME-Version: 1.0 Content-Type: text/plain Kevin Brodsky writes: > Architectures currently opt in for implementing lazy_mmu helpers by > defining __HAVE_ARCH_ENTER_LAZY_MMU_MODE. > > In preparation for introducing a generic lazy_mmu layer that will > require storage in task_struct, let's switch to a cleaner approach: > instead of defining a macro, select a CONFIG option. > > This patch introduces CONFIG_ARCH_HAS_LAZY_MMU_MODE and has each > arch select it when it implements lazy_mmu helpers. > __HAVE_ARCH_ENTER_LAZY_MMU_MODE is removed and > relies on the new CONFIG instead. > > On x86, lazy_mmu helpers are only implemented if PARAVIRT_XXL is > selected. This creates some complications in arch/x86/boot/, because > a few files manually undefine PARAVIRT* options. As a result > does not define the lazy_mmu helpers, but this > breaks the build as only defines them if > !CONFIG_ARCH_HAS_LAZY_MMU_MODE. There does not seem to be a clean > way out of this - let's just undefine that new CONFIG too. > > Signed-off-by: Kevin Brodsky > --- > arch/arm64/Kconfig | 1 + > arch/arm64/include/asm/pgtable.h | 1 - > arch/powerpc/include/asm/book3s/64/tlbflush-hash.h | 2 -- > arch/powerpc/platforms/Kconfig.cputype | 1 + > arch/sparc/Kconfig | 1 + > arch/sparc/include/asm/tlbflush_64.h | 2 -- > arch/x86/Kconfig | 1 + > arch/x86/boot/compressed/misc.h | 1 + > arch/x86/boot/startup/sme.c | 1 + > arch/x86/include/asm/paravirt.h | 1 - > include/linux/pgtable.h | 2 +- > mm/Kconfig | 3 +++ > 12 files changed, 10 insertions(+), 7 deletions(-) Maybe we can add this to ... ? Documentation/features/vm/lazy_mmu/arch-support.txt # # Feature name: lazy_mmu mode # Kconfig: ARCH_HAS_LAZY_MMU_MODE # description: arch supports arch_{enter|flush|leave}_lazy_mmu_mode() # ----------------------- | arch |status| ----------------------- | arm64: | ok | | powerpc: | ok | | sparc: | ok | | x86: | ok | ----------------------- As for this patch, the changes are mostly straight forward around the configs part. This looks good to me. Please feel free to add: Reviewed-by: Ritesh Harjani (IBM) -ritesh From xen-devel-bounces@lists.xenproject.org Wed Nov 05 08:56:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 05 Nov 2025 08:56:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156031.1485344 (Exim 4.92) (envelope-from ) id 1vGZJC-0005q3-TE; Wed, 05 Nov 2025 08:56:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1156031.1485344; Wed, 05 Nov 2025 08:56:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGZJC-0005pw-Qe; Wed, 05 Nov 2025 08:56:02 +0000 Received: by outflank-mailman (input) for mailman id 1156031; Wed, 05 Nov 2025 08:56:02 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGZJB-0005pq-T5 for xen-devel@lists.xenproject.org; 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I didn't see > >>> that before, since I wasn't in cc on v1... > >>> > >>> Anyway, are you aware of some specific objcopy issue. Or in other words: > >>> would xen.efi.elf _currently_ be broken (as in - unusable for > >>> debugging/disassembly)? > >> > >> I can't tell. I've seen fair parts of the code in the course of addressing > >> various issues, and I would be very surprised if all of that was working > >> correctly. > >> > >>> If not, then I take that relevant part of your > >>> objection is mostly about inconsistent naming (xen.gz -> xen-syms, vs > >>> xen.efi -> xen.efi.elf). Would xen-syms.efi.elf be better? > >> > >> Plus the one asking to strip only debug info, but not the symbol table. > >> (And no, none of the suggested names look really nice to me.) > >> > >> Plus the one indicating that the change better wouldn't be made in the > >> first place. As said, to deal with size issues we already have machinery > >> in place. Not very nice machinery, but it's apparently functioning. > > > > I'm of the opinion that defaults matter. Just having ability to build a > > binary that works on more systems is not sufficient, if you'd need to > > spend a day (or more...) on debugging obscure error message to figure > > out which hidden option to use to get there. And while one could argue > > that CONFIG_DEBUG=y builds are only for people familiar with details to > > deal with such issues, IMO just CONFIG_DEBUG_INFO=y shouldn't need > > arcane knowledge to get it working... And since that's a common option > > to enable in distribution packages, person hitting the issue might not > > even be the one doing the build (and thus controlling the build > > options). > > > > As for the details how to get there, I'm more flexible. Based on earlier > > comments, it seems that (not stripped) xen.efi isn't very useful for > > debugging directly, an ELF version of it is. So IMO it makes sense to > > have the debug binary already converted. But if you say you have use for > > xen.efi with all debug info too, I'm okay with keeping it too, maybe as > > xen-syms.efi. It's a bit of more space (to have both efi and elf version > > with debug info), but since it doesn't apply to the installed version, > > only the one kept in the build directory, not a big issue IMO. > > Hmm, yes, having xen-syms.efi (unstripped) plus xen.efi (with debug info > stripped but symbol table retained, including file symbols) might indeed > be a reasonable approach. (And then no xen-syms.efi at all when we pass > --strip-debug to the linker anyway. For this to result in somewhat > manageable Makefile logic, we may need to first split the linking rule > into multiple steps, as iirc has been the plan for quite some time.) It's my understanding that there's consensus now between Marek and Jan about how to progress this forward, and it will require some changes to the original patch posted by Frediano. This has been marked as a blocker for 4.21, and hence needs to be progressed quickly or else it will miss the release. Thanks, Roger. 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Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org Subject: Re: [PATCH v4 07/12] mm: enable lazy_mmu sections to nest In-Reply-To: <20251029100909.3381140-8-kevin.brodsky@arm.com> Date: Wed, 05 Nov 2025 14:19:03 +0530 Message-ID: <87ms5050g0.ritesh.list@gmail.com> References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-8-kevin.brodsky@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Kevin Brodsky writes: > Despite recent efforts to prevent lazy_mmu sections from nesting, it > remains difficult to ensure that it never occurs - and in fact it > does occur on arm64 in certain situations (CONFIG_DEBUG_PAGEALLOC). > Commit 1ef3095b1405 ("arm64/mm: Permit lazy_mmu_mode to be nested") > made nesting tolerable on arm64, but without truly supporting it: > the inner call to leave() disables the batching optimisation before > the outer section ends. > > This patch actually enables lazy_mmu sections to nest by tracking > the nesting level in task_struct, in a similar fashion to e.g. > pagefault_{enable,disable}(). This is fully handled by the generic > lazy_mmu helpers that were recently introduced. > > lazy_mmu sections were not initially intended to nest, so we need to > clarify the semantics w.r.t. the arch_*_lazy_mmu_mode() callbacks. > This patch takes the following approach: > > * The outermost calls to lazy_mmu_mode_{enable,disable}() trigger > calls to arch_{enter,leave}_lazy_mmu_mode() - this is unchanged. > > * Nested calls to lazy_mmu_mode_{enable,disable}() are not forwarded > to the arch via arch_{enter,leave} - lazy MMU remains enabled so > the assumption is that these callbacks are not relevant. However, > existing code may rely on a call to disable() to flush any batched > state, regardless of nesting. arch_flush_lazy_mmu_mode() is > therefore called in that situation. > > A separate interface was recently introduced to temporarily pause > the lazy MMU mode: lazy_mmu_mode_{pause,resume}(). pause() fully > exits the mode *regardless of the nesting level*, and resume() > restores the mode at the same nesting level. > > Whether the mode is actually enabled or not at any point is tracked > by a separate "active" field in task_struct; this makes it possible > to check invariants in the generic API, and to expose a new > in_lazy_mmu_mode() helper to replace the various ways arch's > currently track whether the mode is enabled (this will be done in > later patches). > > In summary (nesting/active represent the values *after* the call): > > lazy_mmu_mode_enable() -> arch_enter() nesting=3D1 active=3D1 > lazy_mmu_mode_enable() -> =C3=B8 nesting=3D2 active=3D1 > lazy_mmu_mode_pause() -> arch_leave() nesting=3D2 active=3D0 > lazy_mmu_mode_resume() -> arch_enter() nesting=3D2 active=3D1 > lazy_mmu_mode_disable() -> arch_flush() nesting=3D1 active=3D1 > lazy_mmu_mode_disable() -> arch_leave() nesting=3D0 active=3D0 > > Note: in_lazy_mmu_mode() is added to to allow arch > headers included by to use it. > > Signed-off-by: Kevin Brodsky > --- > arch/arm64/include/asm/pgtable.h | 12 ------ > include/linux/mm_types_task.h | 5 +++ > include/linux/pgtable.h | 67 ++++++++++++++++++++++++++++++-- > include/linux/sched.h | 16 ++++++++ > 4 files changed, 84 insertions(+), 16 deletions(-) > > diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pg= table.h > index 54f8d6bb6f22..535435248923 100644 > --- a/arch/arm64/include/asm/pgtable.h > +++ b/arch/arm64/include/asm/pgtable.h > @@ -82,18 +82,6 @@ static inline void queue_pte_barriers(void) >=20=20 > static inline void arch_enter_lazy_mmu_mode(void) > { > - /* > - * lazy_mmu_mode is not supposed to permit nesting. But in practice this > - * does happen with CONFIG_DEBUG_PAGEALLOC, where a page allocation > - * inside a lazy_mmu_mode section (such as zap_pte_range()) will change > - * permissions on the linear map with apply_to_page_range(), which > - * re-enters lazy_mmu_mode. So we tolerate nesting in our > - * implementation. The first call to arch_leave_lazy_mmu_mode() will > - * flush and clear the flag such that the remainder of the work in the > - * outer nest behaves as if outside of lazy mmu mode. This is safe and > - * keeps tracking simple. > - */ > - > if (in_interrupt()) > return; >=20=20 > diff --git a/include/linux/mm_types_task.h b/include/linux/mm_types_task.h > index a82aa80c0ba4..632d404f8191 100644 > --- a/include/linux/mm_types_task.h > +++ b/include/linux/mm_types_task.h > @@ -88,4 +88,9 @@ struct tlbflush_unmap_batch { > #endif > }; >=20=20 > +struct lazy_mmu_state { > + u8 nesting_level; > + bool active; > +}; > + > #endif /* _LINUX_MM_TYPES_TASK_H */ > diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h > index b5fdf32c437f..e6064e00b22d 100644 > --- a/include/linux/pgtable.h > +++ b/include/linux/pgtable.h > @@ -228,27 +228,86 @@ static inline int pmd_dirty(pmd_t pmd) > * of the lazy mode. So the implementation must assume preemption may be= enabled > * and cpu migration is possible; it must take steps to be robust agains= t this. > * (In practice, for user PTE updates, the appropriate page table lock(s= ) are > - * held, but for kernel PTE updates, no lock is held). Nesting is not pe= rmitted > - * and the mode cannot be used in interrupt context. > + * held, but for kernel PTE updates, no lock is held). The mode cannot b= e used > + * in interrupt context. > + * > + * The lazy MMU mode is enabled for a given block of code using: > + * > + * lazy_mmu_mode_enable(); > + * > + * lazy_mmu_mode_disable(); > + * > + * Nesting is permitted: may itself use an enable()/disable() pai= r. > + * A nested call to enable() has no functional effect; however disable()= causes > + * any batched architectural state to be flushed regardless of nesting. = After a > + * call to disable(), the caller can therefore rely on all previous page= table > + * modifications to have taken effect, but the lazy MMU mode may still be > + * enabled. > + * > + * In certain cases, it may be desirable to temporarily pause the lazy M= MU mode. > + * This can be done using: > + * > + * lazy_mmu_mode_pause(); > + * > + * lazy_mmu_mode_resume(); > + * > + * This sequence must only be used if the lazy MMU mode is already enabl= ed. > + * pause() ensures that the mode is exited regardless of the nesting lev= el; > + * resume() re-enters the mode at the same nesting level. must no= t modify > + * the lazy MMU state (i.e. it must not call any of the lazy_mmu_mode_* > + * helpers). > + * > + * in_lazy_mmu_mode() can be used to check whether the lazy MMU mode is > + * currently enabled. > */ > #ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE > static inline void lazy_mmu_mode_enable(void) > { > - arch_enter_lazy_mmu_mode(); > + struct lazy_mmu_state *state =3D ¤t->lazy_mmu_state; > + > + VM_WARN_ON_ONCE(state->nesting_level =3D=3D U8_MAX); > + /* enable() must not be called while paused */ > + VM_WARN_ON(state->nesting_level > 0 && !state->active); > + > + if (state->nesting_level++ =3D=3D 0) { > + state->active =3D true; > + arch_enter_lazy_mmu_mode(); > + } > } Some architectures disables preemption in their arch_enter_lazy_mmu_mode(). So shouldn't the state->active =3D true should happen after arch_enter_lazy_mmu_mode() has disabled preemption()? i.e. static inline void lazy_mmu_mode_enable(void) { - arch_enter_lazy_mmu_mode(); + struct lazy_mmu_state *state =3D ¤t->lazy_mmu_state; + + VM_WARN_ON_ONCE(state->nesting_level =3D=3D U8_MAX); + /* enable() must not be called while paused */ + VM_WARN_ON(state->nesting_level > 0 && !state->active); + + if (state->nesting_level++ =3D=3D 0) { + arch_enter_lazy_mmu_mode(); + state->active =3D true; + } } ... I think it make more sense to enable the state after the arch_** call right. >=20=20 > static inline void lazy_mmu_mode_disable(void) > { > - arch_leave_lazy_mmu_mode(); > + struct lazy_mmu_state *state =3D ¤t->lazy_mmu_state; > + > + VM_WARN_ON_ONCE(state->nesting_level =3D=3D 0); > + VM_WARN_ON(!state->active); > + > + if (--state->nesting_level =3D=3D 0) { > + state->active =3D false; > + arch_leave_lazy_mmu_mode(); > + } else { > + /* Exiting a nested section */ > + arch_flush_lazy_mmu_mode(); > + } > } This looks ok though. >=20=20 > static inline void lazy_mmu_mode_pause(void) > { > + struct lazy_mmu_state *state =3D ¤t->lazy_mmu_state; > + > + VM_WARN_ON(state->nesting_level =3D=3D 0 || !state->active); > + > + state->active =3D false; > arch_leave_lazy_mmu_mode(); > } >=20=20 > static inline void lazy_mmu_mode_resume(void) > { > + struct lazy_mmu_state *state =3D ¤t->lazy_mmu_state; > + > + VM_WARN_ON(state->nesting_level =3D=3D 0 || state->active); > + > + state->active =3D true; > arch_enter_lazy_mmu_mode(); > } Ditto. -ritesh > #else > diff --git a/include/linux/sched.h b/include/linux/sched.h > index cbb7340c5866..11566d973f42 100644 > --- a/include/linux/sched.h > +++ b/include/linux/sched.h > @@ -1441,6 +1441,10 @@ struct task_struct { >=20=20 > struct page_frag task_frag; >=20=20 > +#ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE > + struct lazy_mmu_state lazy_mmu_state; > +#endif > + > #ifdef CONFIG_TASK_DELAY_ACCT > struct task_delay_info *delays; > #endif > @@ -1724,6 +1728,18 @@ static inline char task_state_to_char(struct task_= struct *tsk) > return task_index_to_char(task_state_index(tsk)); > } >=20=20 > +#ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE > +static inline bool in_lazy_mmu_mode(void) > +{ > + return current->lazy_mmu_state.active; > +} > +#else > +static inline bool in_lazy_mmu_mode(void) > +{ > + return false; > +} > +#endif > + > extern struct pid *cad_pid; >=20=20 > /* > --=20 > 2.47.0 From xen-devel-bounces@lists.xenproject.org Wed Nov 05 09:21:56 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 05 Nov 2025 09:21:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156057.1485365 (Exim 4.92) (envelope-from ) id 1vGZiA-00023e-8J; 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Wed, 05 Nov 2025 01:49:26 -0800 (PST) From: Ritesh Harjani (IBM) To: Kevin Brodsky , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Kevin Brodsky , Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org Subject: Re: [PATCH v4 09/12] powerpc/mm: replace batch->active with in_lazy_mmu_mode() In-Reply-To: <20251029100909.3381140-10-kevin.brodsky@arm.com> Date: Wed, 05 Nov 2025 15:10:20 +0530 Message-ID: <87ldkk4y2j.ritesh.list@gmail.com> References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-10-kevin.brodsky@arm.com> MIME-Version: 1.0 Content-Type: text/plain Kevin Brodsky writes: > A per-CPU batch struct is activated when entering lazy MMU mode; its > lifetime is the same as the lazy MMU section (it is deactivated when > leaving the mode). Preemption is disabled in that interval to ensure > that the per-CPU reference remains valid. > > The generic lazy_mmu layer now tracks whether a task is in lazy MMU > mode. We can therefore use the generic helper in_lazy_mmu_mode() > to tell whether a batch struct is active instead of tracking it > explicitly. > > Signed-off-by: Kevin Brodsky > --- > arch/powerpc/include/asm/book3s/64/tlbflush-hash.h | 9 --------- > arch/powerpc/mm/book3s64/hash_tlb.c | 2 +- > 2 files changed, 1 insertion(+), 10 deletions(-) > This looks good to me. Reviewed-by: Ritesh Harjani (IBM) From xen-devel-bounces@lists.xenproject.org Wed Nov 05 09:58:49 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 05 Nov 2025 09:58:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156085.1485385 (Exim 4.92) (envelope-from ) id 1vGaHm-0006wR-63; Wed, 05 Nov 2025 09:58:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1156085.1485385; Wed, 05 Nov 2025 09:58:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGaHm-0006wK-3A; Wed, 05 Nov 2025 09:58:38 +0000 Received: by outflank-mailman (input) for mailman id 1156085; Wed, 05 Nov 2025 09:58:37 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGaHl-0006wE-IX for xen-devel@lists.xenproject.org; Wed, 05 Nov 2025 09:58:37 +0000 Received: from mail-pl1-x630.google.com (mail-pl1-x630.google.com [2607:f8b0:4864:20::630]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id fe5b8a40-ba2d-11f0-9d16-b5c5bf9af7f9; Wed, 05 Nov 2025 10:58:36 +0100 (CET) Received: by mail-pl1-x630.google.com with SMTP id d9443c01a7336-2947d345949so58170875ad.3 for ; Wed, 05 Nov 2025 01:58:36 -0800 (PST) Received: from dw-tp ([171.76.85.117]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-29601972ad1sm55039695ad.19.2025.11.05.01.58.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Nov 2025 01:58:33 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: fe5b8a40-ba2d-11f0-9d16-b5c5bf9af7f9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1762336714; x=1762941514; darn=lists.xenproject.org; h=mime-version:references:message-id:date:in-reply-to:subject:cc:to :from:from:to:cc:subject:date:message-id:reply-to; bh=PiM5gwx7v9fuKjSNGU0XIbMsJHzNcD3t6sxDOvTigVo=; b=lBzuQpApAGx7metxHb33KfHkArgkuW282qzwaLO01tQXmhw+PtIbiTvecqhXBfzYND z4K6LwFew7NYfX7aBUPKBW7Nu0yp2Mgg+exhFVqFxe7JtKA+c6rbYhM3cEQKzxK9Rme1 JaWINeCKqcxobGtO1ZUp2hMCMWyWPjnku2Lm6dOdvW1f6TWFWbPn2M1BLEAApgrWRNeb qDWpvCmCXbKUAFQ8YkPO9FbqhULFPtdfyBs4XvLGTc6oZFzg9n4VeO3ibqLC5RqdMAPf hqyGy56gn3cG5atJWtMFSm2cEbNFO4H5DX9dp0OOt9NF/XncH4dEajjSIHE8pUrYzhtq 556g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1762336714; x=1762941514; h=mime-version:references:message-id:date:in-reply-to:subject:cc:to :from:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=PiM5gwx7v9fuKjSNGU0XIbMsJHzNcD3t6sxDOvTigVo=; b=EmXhddQ+69awcponKA4TdRKd99CsxWhrGg+Qxrh0jZmlihxJU5lfyJOQpW38ELB7LS 6XenC6HK7vlgUaU349/JuOGdE83tCEYN8NB6cLpxUHpQJ1+vD4Dufq/1aJCRXIRTWdDq hcyJVskFD9IFNICHUfIysBB/VrZoHseuTlasmq2t7dHy72B+2SgASjDqwwaovuQcjgh9 mQosmjLWRGcqf7H26c4wTe3LeFVaPCCcsX4go2ROUJ8mRwZZc5MNQHCDYZmRaesWHZUI gSNDe4cO9D+2+40KgWi8I8RkFHCeMfAjp5Lr00MG7yC37J128OX+a/4pTyaOngZU4FdP 6YoA== X-Forwarded-Encrypted: i=1; AJvYcCXAxDTvgCXGaCgmhUfersBFQaGrDYEpSE24scySnTvW0UadrsUwShOWog00PDQ2aI2B0+byU3QY4zw=@lists.xenproject.org X-Gm-Message-State: AOJu0YxcqrUmQtshuyWiKB1ci76E7OjG5h7OfcjUlGPckKNG+b53z12k YRlLzfE+5+ClVNHUgzgBo6CehDOWNdnGmOoRtwI5GYptzhIBXPsLg6tw X-Gm-Gg: ASbGncvgNkclmowDueIp+u3fPcFHsikyNMq8YFW2W4vJGzi4gfuz1+NI4iwRcapTcnh mEfcGsKHIXmbmrSIbnlsVVHpABhP9CgGTTXVIH25q03OjQrmSiFjT//TKP5XVmFwkUgTbuvuo7W KKAcPgbjY2ljoXDuldDjri/ErgekO+d+tvHfBgvy03ifAcb+2rfSQUGQd5E9rRxxUEExZBMnLxe xJBKe5l38GIOMTOV9QMJLI70tLydoL6lg+r2K95gUs+S2NcoIbUoSfe1SVV0SQrHvFm6hqUVqtx lkcg8fCh0d/6MTvUP35Fzps5avpza0iA7UgbQbpFSGbcXE1AuVEs9sZ4D2JWyF5id8N4djhyJOe AqvqXKWE3KtXqxT+bUAcH17D9CStqUpXCKWhxoLE8cY5JNrPr7borKtGJYRkF+DBZELLg/Q== X-Google-Smtp-Source: AGHT+IHbi+0zqKpbA9V2mHcqMUNAu2olVZcwJU6s62eDD+69tSv+JW/d6KHzoaPAbvo+C4JRz5nOFw== X-Received: by 2002:a17:903:19ce:b0:246:7a43:3f66 with SMTP id d9443c01a7336-2962adb2b0fmr33595265ad.7.1762336714441; Wed, 05 Nov 2025 01:58:34 -0800 (PST) From: Ritesh Harjani (IBM) To: Kevin Brodsky , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Kevin Brodsky , Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org Subject: Re: [PATCH v4 03/12] powerpc/mm: implement arch_flush_lazy_mmu_mode() In-Reply-To: <87pl9x41c5.ritesh.list@gmail.com> Date: Wed, 05 Nov 2025 15:19:35 +0530 Message-ID: <87jz044xn4.ritesh.list@gmail.com> References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-4-kevin.brodsky@arm.com> <87pl9x41c5.ritesh.list@gmail.com> MIME-Version: 1.0 Content-Type: text/plain Ritesh Harjani (IBM) writes: > Kevin Brodsky writes: > >> Upcoming changes to the lazy_mmu API will cause >> arch_flush_lazy_mmu_mode() to be called when leaving a nested >> lazy_mmu section. >> >> Move the relevant logic from arch_leave_lazy_mmu_mode() to >> arch_flush_lazy_mmu_mode() and have the former call the latter. >> >> Note: the additional this_cpu_ptr() on the >> arch_leave_lazy_mmu_mode() path will be removed in a subsequent >> patch. >> >> Signed-off-by: Kevin Brodsky >> --- >> .../powerpc/include/asm/book3s/64/tlbflush-hash.h | 15 +++++++++++---- >> 1 file changed, 11 insertions(+), 4 deletions(-) >> >> diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h b/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h >> index 146287d9580f..7704dbe8e88d 100644 >> --- a/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h >> +++ b/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h >> @@ -41,6 +41,16 @@ static inline void arch_enter_lazy_mmu_mode(void) >> batch->active = 1; >> } >> >> +static inline void arch_flush_lazy_mmu_mode(void) >> +{ >> + struct ppc64_tlb_batch *batch; >> + >> + batch = this_cpu_ptr(&ppc64_tlb_batch); >> + >> + if (batch->index) >> + __flush_tlb_pending(batch); >> +} >> + > > This looks a bit scary since arch_flush_lazy_mmu_mode() is getting > called from several of the places in later patches(). > > Although I think arch_flush_lazy_mmu_mode() will only always be called > in nested lazy mmu case right? > > Do you think we can add a VM_BUG_ON(radix_enabled()); in above to make > sure the above never gets called in radix_enabled() case. > > I am still going over the patch series, but while reviewing this I > wanted to take your opinion. > > Ohh wait.. There is no way of knowing the return value from > arch_enter_lazy_mmu_mode().. I think you might need a similar check to > return from arch_flush_lazy_mmu_mode() too, if radix_enabled() is true. > Now that I have gone through this series, it seems plaussible that since lazy mmu mode supports nesting, arch_flush_lazy_mmu_mode() can get called while the lazy mmu is active due to nesting.. That means we should add the radix_enabled() check as I was talking in above i.e. @@ -38,6 +38,9 @@ static inline void arch_flush_lazy_mmu_mode(void) { struct ppc64_tlb_batch *batch; + if (radix_enabled()) + return; + batch = this_cpu_ptr(&ppc64_tlb_batch); if (batch->index) Correct? Although otherwise also I don't think it should be a problem because batch->index is only valid during hash, but I still think we can add above check so that we don't have to call this_cpu_ptr() to check for batch->index whenever flush is being called. -ritesh From xen-devel-bounces@lists.xenproject.org Wed Nov 05 10:43:44 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 05 Nov 2025 10:43:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156098.1485395 (Exim 4.92) (envelope-from ) id 1vGazL-0005Qn-BZ; Wed, 05 Nov 2025 10:43:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1156098.1485395; Wed, 05 Nov 2025 10:43:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGazL-0005Qg-8F; Wed, 05 Nov 2025 10:43:39 +0000 Received: by outflank-mailman (input) for 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Grygorii Strashko a écrit : >> From: Grygorii Strashko >> >> The VMTRACE feature depends on Platform/Arch HW and code support and now >> can be used only on x86 HVM with Intel VT-x (INTEL_VMX) enabled. >> This makes VMTRACE support optional by introducing two Kconfig options: >> - CONFIG_HAS_VMTRACE which allows Platform/Arch to advertise VMTRACE >> support readiness >> - CONFIG_VMTRACE to enable/disable the feature. >> > > I like the idea of making it optional since it's only used in specific > contexts. > >> Signed-off-by: Grygorii Strashko >> --- >> Based on top of patch "domain: adjust soft-reset arch dependency" [1] >> >> [1] https://patchwork.kernel.org/project/xen-devel/patch/c9c8c9c6-a155-4986-bf77-5766cdcd6024@suse.com/ >> >> xen/Kconfig.debug | 15 +++++++++++++++ >> xen/arch/x86/domctl.c | 4 ++++ >> xen/arch/x86/hvm/Kconfig | 1 + >> xen/arch/x86/hvm/vmx/vmcs.c | 2 ++ >> xen/arch/x86/hvm/vmx/vmx.c | 10 ++++++++++ >> xen/arch/x86/include/asm/guest-msr.h | 2 ++ >> xen/arch/x86/include/asm/hvm/hvm.h | 9 +++++++++ >> xen/arch/x86/include/asm/hvm/vmx/vmcs.h | 2 ++ >> xen/arch/x86/mm/mem_sharing.c | 2 ++ >> xen/arch/x86/vm_event.c | 6 ++++-- >> xen/common/domain.c | 10 ++++++++++ >> xen/common/memory.c | 6 ++++++ >> xen/common/vm_event.c | 3 ++- >> xen/include/xen/domain.h | 4 ++++ >> xen/include/xen/sched.h | 4 ++++ >> 15 files changed, 77 insertions(+), 3 deletions(-) >> >> diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug >> index d900d926c555..70ec4f0d14a5 100644 >> --- a/xen/Kconfig.debug >> +++ b/xen/Kconfig.debug >> @@ -155,4 +155,19 @@ config DEBUG_INFO >> "make install-xen" for installing xen.efi, stripping needs to be >> done outside the Xen build environment). >> >> +config HAS_VMTRACE >> + bool >> + >> +config VMTRACE >> + bool "HW VM tracing support" >> + depends on HAS_VMTRACE >> + default y >> + help >> + Enables HW VM tracing support which allows to configure HW processor >> + features (vmtrace_op) to enable capturing information about software >> + execution using dedicated hardware facilities with minimal interference >> + to the software being traced. The trace date can be retrieved using buffer >> + shared between Xen and domain >> + (see XENMEM_acquire_resource(XENMEM_resource_vmtrace_buf)). >> + >> endmenu [...] >> >> diff --git a/xen/arch/x86/vm_event.c b/xen/arch/x86/vm_event.c >> index fc349270b9c5..f4c8696ce54e 100644 >> --- a/xen/arch/x86/vm_event.c >> +++ b/xen/arch/x86/vm_event.c >> @@ -253,7 +253,9 @@ void vm_event_fill_regs(vm_event_request_t *req) >> req->data.regs.x86.shadow_gs = ctxt.shadow_gs; >> req->data.regs.x86.dr6 = ctxt.dr6; >> >> +#ifdef CONFIG_VMTRACE >> if ( hvm_vmtrace_output_position(curr, &req->data.regs.x86.vmtrace_pos) != 1 ) >> +#endif >> req->data.regs.x86.vmtrace_pos = ~0; > > This if-def looks very oddly placed. I assume you are asking for hvm_vmtrace_output_position() stub, Right? > >> #endif >> } >> @@ -303,12 +305,12 @@ void vm_event_emulate_check(struct vcpu *v, vm_event_response_t *rsp) >> #endif >> } >> >> +#ifdef CONFIG_VMTRACE >> void vm_event_reset_vmtrace(struct vcpu *v) >> { >> -#ifdef CONFIG_HVM >> hvm_vmtrace_reset(v); >> -#endif >> } >> +#endif >> >> /* >> * Local variables: >> diff --git a/xen/common/domain.c b/xen/common/domain.c >> index 7dcd466e5a12..2be6ee03d004 100644 >> --- a/xen/common/domain.c >> +++ b/xen/common/domain.c >> @@ -136,7 +136,9 @@ struct vcpu *idle_vcpu[NR_CPUS] __read_mostly; >> >> vcpu_info_t dummy_vcpu_info; >> >> +#ifdef CONFIG_VMTRACE >> bool __read_mostly vmtrace_available; >> +#endif >> >> bool __read_mostly vpmu_is_available; >> >> @@ -318,6 +320,7 @@ static void vcpu_info_reset(struct vcpu *v) >> >> static void vmtrace_free_buffer(struct vcpu *v) >> { >> +#ifdef CONFIG_VMTRACE >> const struct domain *d = v->domain; >> struct page_info *pg = v->vmtrace.pg; >> unsigned int i; >> @@ -332,10 +335,12 @@ static void vmtrace_free_buffer(struct vcpu *v) >> put_page_alloc_ref(&pg[i]); >> put_page_and_type(&pg[i]); >> } >> +#endif >> } >> >> static int vmtrace_alloc_buffer(struct vcpu *v) >> { >> +#ifdef CONFIG_VMTRACE >> struct domain *d = v->domain; >> struct page_info *pg; >> unsigned int i; >> @@ -377,6 +382,9 @@ static int vmtrace_alloc_buffer(struct vcpu *v) >> } >> >> return -ENODATA; >> +#else >> + return 0; >> +#endif >> } >> >> /* >> @@ -825,7 +833,9 @@ struct domain *domain_create(domid_t domid, >> ASSERT(!config->altp2m.nr); >> #endif >> >> +#ifdef CONFIG_VMTRACE >> d->vmtrace_size = config->vmtrace_size; >> +#endif >> } >> >> /* Sort out our idea of is_control_domain(). */ >> diff --git a/xen/common/memory.c b/xen/common/memory.c >> index 3688e6dd5032..66dc7f7a0a41 100644 >> --- a/xen/common/memory.c >> +++ b/xen/common/memory.c >> @@ -1155,8 +1155,10 @@ static unsigned int resource_max_frames(const struct domain *d, >> case XENMEM_resource_ioreq_server: >> return ioreq_server_max_frames(d); >> >> +#ifdef CONFIG_VMTRACE >> case XENMEM_resource_vmtrace_buf: >> return d->vmtrace_size >> PAGE_SHIFT; >> +#endif >> >> default: >> return 0; >> @@ -1198,6 +1200,7 @@ static int acquire_ioreq_server(struct domain *d, >> #endif >> } >> >> +#ifdef CONFIG_VMTRACE >> static int acquire_vmtrace_buf( >> struct domain *d, unsigned int id, unsigned int frame, >> unsigned int nr_frames, xen_pfn_t mfn_list[]) >> @@ -1220,6 +1223,7 @@ static int acquire_vmtrace_buf( >> >> return nr_frames; >> } >> +#endif >> > > Given that vmtrace feature is fairly isolated in VMX code, wouldn't it > be better to move all vmtrace related functions (including vmx_init_ipt) > in a separate vmtrace.c file and make such file gated behind > CONFIG_VMTRACE ? > Are you thinking about: xen/common/ |- vmtrace.c xen/arch/x86/hvm/vmx/ |- vmtrace.c ? or smth else? [...] -- Best regards, -grygorii From xen-devel-bounces@lists.xenproject.org Wed Nov 05 11:30:21 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 05 Nov 2025 11:30:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156112.1485404 (Exim 4.92) (envelope-from ) id 1vGbiJ-0003Vy-IM; Wed, 05 Nov 2025 11:30:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1156112.1485404; Wed, 05 Nov 2025 11:30:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGbiJ-0003Vr-Fj; Wed, 05 Nov 2025 11:30:07 +0000 Received: by outflank-mailman (input) for mailman id 1156112; Wed, 05 Nov 2025 11:30:06 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGbiI-0003FY-35 for xen-devel@lists.xenproject.org; Wed, 05 Nov 2025 11:30:06 +0000 Received: from mail-ej1-x634.google.com (mail-ej1-x634.google.com [2a00:1450:4864:20::634]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c5dff474-ba3a-11f0-9d16-b5c5bf9af7f9; Wed, 05 Nov 2025 12:30:04 +0100 (CET) Received: by mail-ej1-x634.google.com with SMTP id a640c23a62f3a-b7277324204so25026566b.0 for ; Wed, 05 Nov 2025 03:30:04 -0800 (PST) Received: from [192.168.1.6] (user-109-243-71-38.play-internet.pl. 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Without this, we can't proceed with deprecate oxenstored. Release-Acked-By: Oleksii Kurochko Thanks. ~ Oleksii > > This wants backporting to 4.20 too. > > Previously this was hidden by oxenstored unexpectedly statically linking > libxenctrl via the ocaml-evtchn bindings, and became exposed when the bindings > were moved to use libxenevtchn. > --- > tools/ocaml/libs/xsd_glue/domain_getinfo_plugin_v1/Makefile | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/tools/ocaml/libs/xsd_glue/domain_getinfo_plugin_v1/Makefile b/tools/ocaml/libs/xsd_glue/domain_getinfo_plugin_v1/Makefile > index 4be1feacfe24..6356159020c1 100644 > --- a/tools/ocaml/libs/xsd_glue/domain_getinfo_plugin_v1/Makefile > +++ b/tools/ocaml/libs/xsd_glue/domain_getinfo_plugin_v1/Makefile > @@ -11,7 +11,7 @@ OBJS = domain_getinfo_v1 > INTF = $(foreach obj, $(OBJS),$(obj).cmi) > LIBS = domain_getinfo_v1.cmxa domain_getinfo_v1.cmxs > > -LIBS_xsd_glue = $(call xenlibs-ldflags-ldlibs,xenctrl) > +LIBS_domain_getinfo_v1 = $(call xenlibs-ldflags-ldlibs,ctrl) > > all: $(INTF) $(LIBS) $(PROGRAMS) > > > base-commit: 9632ce6fe5b288244d2550cd2e619a55c5168bf8 --------------vymPjakhxxNLm3P05sF51UWp Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: 8bit


On 11/4/25 5:56 PM, Andrew Cooper wrote:
The latest oxenstored from Xapi-project fails to start up:

  launch-xenstore[1201]: Starting /usr/sbin/oxenstored...
  launch-xenstore[1222]: Fatal error: exception
    Dynlink.Error (Dynlink.Cannot_open_dll "Dynlink.Error (Dynlink.Cannot_open_dll
    \"Failure(\\\"/usr/libexec/xen//ocaml/xsd_glue/xenctrl_plugin/domain_getinfo_v1.cmxs:
    undefined symbol: xc_domain_getinfo_single\\\")\")")

This is because domain_getinfo_v1.cmxs isn't dynamically linked correctly.
Fill in the correct variable, and remove the xen prefix from xenctrl.

Reported-by: Edwin Török <edwin.torok@citrix.com>
Suggested-by: Edwin Török <edwin.torok@citrix.com>
Fixes: a6576011a4d2 ("ocaml/libs: Implement a dynamically-loaded plugin for Xenctrl.domain_getinfo")
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Christian Lindig <christian.lindig@citrix.com>
CC: Rob Hoes <Rob.Hoes@citrix.com>
CC: Pau Ruiz Safont <pau.safont@vates.tech>
CC: Andrii Sultanov <andriy.sultanov@vates.tech>
CC: Oleksii Kurochko <oleksii.kurochko@gmail.com>

For 4.21.  Without this, we can't proceed with deprecate oxenstored.
Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>

Thanks.

~ Oleksii

This wants backporting to 4.20 too.

Previously this was hidden by oxenstored unexpectedly statically linking
libxenctrl via the ocaml-evtchn bindings, and became exposed when the bindings
were moved to use libxenevtchn.
---
 tools/ocaml/libs/xsd_glue/domain_getinfo_plugin_v1/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/ocaml/libs/xsd_glue/domain_getinfo_plugin_v1/Makefile b/tools/ocaml/libs/xsd_glue/domain_getinfo_plugin_v1/Makefile
index 4be1feacfe24..6356159020c1 100644
--- a/tools/ocaml/libs/xsd_glue/domain_getinfo_plugin_v1/Makefile
+++ b/tools/ocaml/libs/xsd_glue/domain_getinfo_plugin_v1/Makefile
@@ -11,7 +11,7 @@ OBJS = domain_getinfo_v1
 INTF = $(foreach obj, $(OBJS),$(obj).cmi)
 LIBS = domain_getinfo_v1.cmxa domain_getinfo_v1.cmxs
 
-LIBS_xsd_glue = $(call xenlibs-ldflags-ldlibs,xenctrl)
+LIBS_domain_getinfo_v1 = $(call xenlibs-ldflags-ldlibs,ctrl)
 
 all: $(INTF) $(LIBS) $(PROGRAMS)
 

base-commit: 9632ce6fe5b288244d2550cd2e619a55c5168bf8
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Smith" , Bertrand Marquis , Volodymyr Babchuk , Timothy Pearson References: Content-Language: en-US From: Oleksii Kurochko In-Reply-To: This is a multi-part message in MIME format. --------------tc1rLMnO1ZU67CxLD9ETtSQQ Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 10/30/25 1:10 PM, Jan Beulich wrote: > Arm's arch_domain_soft_reset() returning -ENOSYS is quite unhelpful: This > way a domain will be crashed if a tool stack mistakenly invokes > XEN_DOMCTL_soft_reset on it. Instead the tool stack should be told of its > mistake. > > Introduce HAS_SOFT_RESET, implied only by x86. "imply" rather than > "select" such that HAS_SOFT_RESET can later gain a dependency on > MGMT_HYPERCALLS. That way HAS_SOFT_RESET will go off when > MGMT_HYPERCALLS is off. > > Check the new setting early in domctl handling, and compile out the thus > dead (when HAS_SOFT_RESET=n) domain_soft_reset() as well as its dedicated > helpers. > > Signed-off-by: Jan Beulich LGTM: Reviewed-by: Oleksii Kurochko Thanks. ~ Oleksii > > --- a/xen/arch/arm/domain.c > +++ b/xen/arch/arm/domain.c > @@ -875,11 +875,6 @@ void arch_domain_unpause(struct domain * > { > } > > -int arch_domain_soft_reset(struct domain *d) > -{ > - return -ENOSYS; > -} > - > void arch_domain_creation_finished(struct domain *d) > { > p2m_domain_creation_finished(d); > --- a/xen/arch/ppc/stubs.c > +++ b/xen/arch/ppc/stubs.c > @@ -214,11 +214,6 @@ void arch_domain_unpause(struct domain * > BUG_ON("unimplemented"); > } > > -int arch_domain_soft_reset(struct domain *d) > -{ > - BUG_ON("unimplemented"); > -} > - > void arch_domain_creation_finished(struct domain *d) > { > BUG_ON("unimplemented"); > --- a/xen/arch/riscv/stubs.c > +++ b/xen/arch/riscv/stubs.c > @@ -188,11 +188,6 @@ void arch_domain_unpause(struct domain * > BUG_ON("unimplemented"); > } > > -int arch_domain_soft_reset(struct domain *d) > -{ > - BUG_ON("unimplemented"); > -} > - > void arch_domain_creation_finished(struct domain *d) > { > BUG_ON("unimplemented"); > --- a/xen/arch/x86/Kconfig > +++ b/xen/arch/x86/Kconfig > @@ -29,6 +29,7 @@ config X86 > select HAS_PCI_MSI > select HAS_PIRQ > select HAS_SCHED_GRANULARITY > + imply HAS_SOFT_RESET > select HAS_UBSAN > select HAS_VMAP > select HAS_VPCI if HVM > --- a/xen/arch/x86/domain.c > +++ b/xen/arch/x86/domain.c > @@ -1030,6 +1030,7 @@ void arch_domain_unpause(struct domain * > viridian_time_domain_thaw(d); > } > > +#ifdef CONFIG_HAS_SOFT_RESET > int arch_domain_soft_reset(struct domain *d) > { > struct page_info *page = virt_to_page(d->shared_info), *new_page; > @@ -1131,6 +1132,7 @@ int arch_domain_soft_reset(struct domain > > return ret; > } > +#endif /* CONFIG_HAS_SOFT_RESET */ > > void arch_domain_creation_finished(struct domain *d) > { > --- a/xen/common/Kconfig > +++ b/xen/common/Kconfig > @@ -155,6 +155,9 @@ config HAS_PMAP > config HAS_SCHED_GRANULARITY > bool > > +config HAS_SOFT_RESET > + bool > + > config HAS_STACK_PROTECTOR > bool > > --- a/xen/common/argo.c > +++ b/xen/common/argo.c > @@ -2351,6 +2351,7 @@ argo_destroy(struct domain *d) > write_unlock(&L1_global_argo_rwlock); > } > > +#ifdef CONFIG_HAS_SOFT_RESET > void > argo_soft_reset(struct domain *d) > { > @@ -2374,3 +2375,4 @@ argo_soft_reset(struct domain *d) > > write_unlock(&L1_global_argo_rwlock); > } > +#endif /* CONFIG_HAS_SOFT_RESET */ > --- a/xen/common/domain.c > +++ b/xen/common/domain.c > @@ -1687,6 +1687,7 @@ void domain_unpause_except_self(struct d > domain_unpause(d); > } > > +#ifdef CONFIG_HAS_SOFT_RESET > int domain_soft_reset(struct domain *d, bool resuming) > { > struct vcpu *v; > @@ -1724,6 +1725,7 @@ int domain_soft_reset(struct domain *d, > > return rc; > } > +#endif /* CONFIG_HAS_SOFT_RESET */ > > int vcpu_reset(struct vcpu *v) > { > --- a/xen/common/domctl.c > +++ b/xen/common/domctl.c > @@ -466,6 +466,12 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xe > > case XEN_DOMCTL_soft_reset: > case XEN_DOMCTL_soft_reset_cont: > + if ( !IS_ENABLED(CONFIG_HAS_SOFT_RESET) ) > + { > + ret = -EOPNOTSUPP; > + break; > + } > + > if ( d == current->domain ) /* no domain_pause() */ > { > ret = -EINVAL; > --- a/xen/common/grant_table.c > +++ b/xen/common/grant_table.c > @@ -3962,6 +3962,7 @@ int gnttab_release_mappings(struct domai > return 0; > } > > +#ifdef CONFIG_HAS_SOFT_RESET > void grant_table_warn_active_grants(struct domain *d) > { > struct grant_table *gt = d->grant_table; > @@ -4006,6 +4007,7 @@ void grant_table_warn_active_grants(stru > > #undef WARN_GRANT_MAX > } > +#endif /* CONFIG_HAS_SOFT_RESET */ > > void > grant_table_destroy( --------------tc1rLMnO1ZU67CxLD9ETtSQQ Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: 7bit


On 10/30/25 1:10 PM, Jan Beulich wrote:
Arm's arch_domain_soft_reset() returning -ENOSYS is quite unhelpful: This
way a domain will be crashed if a tool stack mistakenly invokes
XEN_DOMCTL_soft_reset on it. Instead the tool stack should be told of its
mistake.

Introduce HAS_SOFT_RESET, implied only by x86. "imply" rather than
"select" such that HAS_SOFT_RESET can later gain a dependency on
MGMT_HYPERCALLS. That way HAS_SOFT_RESET will go off when
MGMT_HYPERCALLS is off.

Check the new setting early in domctl handling, and compile out the thus
dead (when HAS_SOFT_RESET=n) domain_soft_reset() as well as its dedicated
helpers.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
LGTM:

Reviewed-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>

Thanks.

~ Oleksii

--- a/xen/arch/arm/domain.c
+++ b/xen/arch/arm/domain.c
@@ -875,11 +875,6 @@ void arch_domain_unpause(struct domain *
 {
 }
 
-int arch_domain_soft_reset(struct domain *d)
-{
-    return -ENOSYS;
-}
-
 void arch_domain_creation_finished(struct domain *d)
 {
     p2m_domain_creation_finished(d);
--- a/xen/arch/ppc/stubs.c
+++ b/xen/arch/ppc/stubs.c
@@ -214,11 +214,6 @@ void arch_domain_unpause(struct domain *
     BUG_ON("unimplemented");
 }
 
-int arch_domain_soft_reset(struct domain *d)
-{
-    BUG_ON("unimplemented");
-}
-
 void arch_domain_creation_finished(struct domain *d)
 {
     BUG_ON("unimplemented");
--- a/xen/arch/riscv/stubs.c
+++ b/xen/arch/riscv/stubs.c
@@ -188,11 +188,6 @@ void arch_domain_unpause(struct domain *
     BUG_ON("unimplemented");
 }
 
-int arch_domain_soft_reset(struct domain *d)
-{
-    BUG_ON("unimplemented");
-}
-
 void arch_domain_creation_finished(struct domain *d)
 {
     BUG_ON("unimplemented");
--- a/xen/arch/x86/Kconfig
+++ b/xen/arch/x86/Kconfig
@@ -29,6 +29,7 @@ config X86
 	select HAS_PCI_MSI
 	select HAS_PIRQ
 	select HAS_SCHED_GRANULARITY
+	imply HAS_SOFT_RESET
 	select HAS_UBSAN
 	select HAS_VMAP
 	select HAS_VPCI if HVM
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -1030,6 +1030,7 @@ void arch_domain_unpause(struct domain *
         viridian_time_domain_thaw(d);
 }
 
+#ifdef CONFIG_HAS_SOFT_RESET
 int arch_domain_soft_reset(struct domain *d)
 {
     struct page_info *page = virt_to_page(d->shared_info), *new_page;
@@ -1131,6 +1132,7 @@ int arch_domain_soft_reset(struct domain
 
     return ret;
 }
+#endif /* CONFIG_HAS_SOFT_RESET */
 
 void arch_domain_creation_finished(struct domain *d)
 {
--- a/xen/common/Kconfig
+++ b/xen/common/Kconfig
@@ -155,6 +155,9 @@ config HAS_PMAP
 config HAS_SCHED_GRANULARITY
 	bool
 
+config HAS_SOFT_RESET
+	bool
+
 config HAS_STACK_PROTECTOR
 	bool
 
--- a/xen/common/argo.c
+++ b/xen/common/argo.c
@@ -2351,6 +2351,7 @@ argo_destroy(struct domain *d)
     write_unlock(&L1_global_argo_rwlock);
 }
 
+#ifdef CONFIG_HAS_SOFT_RESET
 void
 argo_soft_reset(struct domain *d)
 {
@@ -2374,3 +2375,4 @@ argo_soft_reset(struct domain *d)
 
     write_unlock(&L1_global_argo_rwlock);
 }
+#endif /* CONFIG_HAS_SOFT_RESET */
--- a/xen/common/domain.c
+++ b/xen/common/domain.c
@@ -1687,6 +1687,7 @@ void domain_unpause_except_self(struct d
         domain_unpause(d);
 }
 
+#ifdef CONFIG_HAS_SOFT_RESET
 int domain_soft_reset(struct domain *d, bool resuming)
 {
     struct vcpu *v;
@@ -1724,6 +1725,7 @@ int domain_soft_reset(struct domain *d,
 
     return rc;
 }
+#endif /* CONFIG_HAS_SOFT_RESET */
 
 int vcpu_reset(struct vcpu *v)
 {
--- a/xen/common/domctl.c
+++ b/xen/common/domctl.c
@@ -466,6 +466,12 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xe
 
     case XEN_DOMCTL_soft_reset:
     case XEN_DOMCTL_soft_reset_cont:
+        if ( !IS_ENABLED(CONFIG_HAS_SOFT_RESET) )
+        {
+            ret = -EOPNOTSUPP;
+            break;
+        }
+
         if ( d == current->domain ) /* no domain_pause() */
         {
             ret = -EINVAL;
--- a/xen/common/grant_table.c
+++ b/xen/common/grant_table.c
@@ -3962,6 +3962,7 @@ int gnttab_release_mappings(struct domai
     return 0;
 }
 
+#ifdef CONFIG_HAS_SOFT_RESET
 void grant_table_warn_active_grants(struct domain *d)
 {
     struct grant_table *gt = d->grant_table;
@@ -4006,6 +4007,7 @@ void grant_table_warn_active_grants(stru
 
 #undef WARN_GRANT_MAX
 }
+#endif /* CONFIG_HAS_SOFT_RESET */
 
 void
 grant_table_destroy(
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([39.36.37.202]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-429dc1f5af7sm11129623f8f.28.2025.11.05.04.47.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Nov 2025 04:47:43 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: a08167ad-ba45-11f0-980a-7dc792cee155 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1762346865; x=1762951665; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=NsyLKN81KL51kT2ye8MhBZOT8kMWEdsVKHKTDOIf0nM=; b=kxdt9rIWY1BE+i1qyn0hyX1bNbMcZy+B+aM4aTdLSc9U/Lltb/CHuIVcRMkXPYFRFq CwxQ5cNECsly0lqqpMUPBj/Gry7GW7B5Y9nCpxAQV8J2I34ySNUi6E+gBTGYzqfD+5IS Buh2ZVmwbe67wIUGUEUbRVsSuf3O0O9HXQCjNeh0+hyUs+oUApTYED5MTdW10GiK/LJz HVQc8OKpaoqacyhRMSHBMwu3pqrRuzdRPm+cLTPucuAlxtvT/Dd/LEM/cvtX1grbX+z8 W4hjMTvULRsHyO9w2+salVBqCWGgKWP1UP2YOtAj/fat//BGIEyzmItWoSpyRa6jTQhm d15Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1762346865; x=1762951665; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=NsyLKN81KL51kT2ye8MhBZOT8kMWEdsVKHKTDOIf0nM=; b=uLz/vG0bafZsn/pGBMYss+u9ixQDuvr9tkfVui3KHtmc5B8WIrKbgd7y49oZMFanxV cYc0z9lCHhcQ0aYIM0ulVTMW9X8Ujn9Me6D3SzADiFwvD0uYkr4Ly72OJhQAHKxgRwot L65SiSCzYiSHwhbLwy7NOZW8dl+dYMq/WX8xvC6kfRjnGqHFEcFzRPztwOt1j5w6hm+F JpEWOgq76zLMgg6NHhVfK0WNKw1R4Dcoslz8qWM+6Kh45u25Nciukjs3l5xt3znRB71I ycBGKAZykcuQIVAnOh4B9GOaTQpdRRYeLgqJKZIPPcRIOdt66H4VE3LJHuN/RozBM+YE t4zQ== X-Gm-Message-State: AOJu0YyewgZ2Z1/exFfFwMZ80VHY9WxFWXP0cedkFpi0PfUDGhJ1T0JM /DQjcr22oAgVN+Q49/RDQ2efoWrQLDwQ2OP3ODs5LSiojV7q3Lr6pAd84pjOepfZHGs= X-Gm-Gg: ASbGncvUBlENldb646iSiEeuF8s/yrA1+MrqBVvTMIzxy6igLp6posllPLHZBmndyUJ DzMPZ4F1P3Ta+VJAkkqUv6T2zu8uAMbkoLHw4OTD+PLQ3RtQfsFC2Z5hvtaNH37S7MT2pOnvI1X 7t9CRMP2KGT5u1R5eKzX6ZpHrI9V4FTAWwDKMsmNZUlSiXsctyb9vEHozVfMyLAhzoaNL07h0Am X9z9h1P/dVHA0YZF5Qmdez5/hx0MI3CcxtI9w4vQMV0QbQdAZ6BUTv+lD+dBT+MgEQxE0jNNvYg VZneA7Z6tmP+qYN/YpvG+EMN/LOIWf1JO/l4Kmth3WhVbOwFC6b8LJzmlLPyDNFpBOloqhrCp/s dNZBNQYKHwyzFMPGtQe8l4XEvTqhr6z8Y6y7kdkwOr+1xf4Zme5Akpe9FjP75WA8dcGY5ot6QA+ wFXypdbbDN81VQXzZVsgbwQ/VC1wibPchuzpdbThw= X-Google-Smtp-Source: AGHT+IEE+sf/WD48p2Y44yAV1BGuwi9eignN7+Q6qPJ5YtvNNXiLknU+KhYbJrWk1eKklk6hh6x8pg== X-Received: by 2002:a05:6000:1acc:b0:427:8c85:a4b0 with SMTP id ffacd0b85a97d-429e3311adfmr2978392f8f.56.1762346864516; Wed, 05 Nov 2025 04:47:44 -0800 (PST) From: Haseeb Ashraf To: xen-devel@lists.xenproject.org Cc: Haseeb Ashraf , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Dan Driscoll , Noor Ahsan Khawaja , Fahad Arslan , Andrew Bachtel , Mohamed Mediouni Subject: [XEN PATCH] xen/arm/p2m: perform IPA-based TLBI for arm64 when IPA is known Date: Wed, 5 Nov 2025 17:47:27 +0500 Message-ID: <20251105124727.142272-1-haseebashraf091@gmail.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Haseeb Ashraf This commit addresses a major issue for running Xen on KVM arm64 i.e. costly emulation of VMALLS12E1IS which becomes worse when this TLBI is invoked too many times. There are mainly two places where this is problematic: (a) When vCPUs switch on a pCPU or pCPUs (b) When domu mapped pages onto dom0, are to be unmapped, then each page being removed by XENMEM_remove_from_physmap has its TLBs invalidated by VMALLS12E1IS. The first one is addressed by relaxing VMALLS12E1IS -> VMALLE1IS. Each CPU have their own private TLBs, so flush between vCPU of the same domains is required to avoid translations from vCPUx to "leak" to the vCPUy. This can be achieved by using VMALLE1. If FEAT_nTLBPA is present then VMALLE1 can also be avoided. The second one is addressed by using IPA-based TLBI (IPAS2E1) in combination with VMALLE1 whenever the IPA range is known instead of using VMALLS12E1. Again, VMALLE1 can be avoided FEAT_nTLBPA is present. Suggested-by: Mohamed Mediouni Suggested-by: Julien Grall Signed-off-by: Haseeb Ashraf --- xen/arch/arm/include/asm/arm64/flushtlb.h | 34 ++++++++ xen/arch/arm/include/asm/arm64/sysregs.h | 1 + xen/arch/arm/include/asm/cpufeature.h | 3 +- xen/arch/arm/include/asm/mmu/p2m.h | 4 + xen/arch/arm/include/asm/processor.h | 2 + xen/arch/arm/mmu/p2m.c | 96 ++++++++++++++++++++++- 6 files changed, 136 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/include/asm/arm64/flushtlb.h b/xen/arch/arm/include/asm/arm64/flushtlb.h index 3b99c11b50..6703aab8a7 100644 --- a/xen/arch/arm/include/asm/arm64/flushtlb.h +++ b/xen/arch/arm/include/asm/arm64/flushtlb.h @@ -45,6 +45,27 @@ static inline void name(void) \ : : : "memory"); \ } +/* + * FLush TLB by IPA. This will likely be used in a loop, so the caller + * is responsible to use the appropriate memory barriers before/after + * the sequence. + * + * See above about the ARM64_WORKAROUND_REPEAT_TLBI sequence. + */ +#define TLB_HELPER_IPA(name, tlbop) \ +static inline void name(paddr_t ipa) \ +{ \ + asm volatile( \ + "tlbi " # tlbop ", %0;" \ + ALTERNATIVE( \ + "nop; nop;", \ + "dsb ish;" \ + "tlbi " # tlbop ", %0;", \ + ARM64_WORKAROUND_REPEAT_TLBI, \ + CONFIG_ARM64_WORKAROUND_REPEAT_TLBI) \ + : : "r" (ipa >> PAGE_SHIFT) : "memory"); \ +} + /* * FLush TLB by VA. This will likely be used in a loop, so the caller * is responsible to use the appropriate memory barriers before/after @@ -72,6 +93,18 @@ TLB_HELPER(flush_guest_tlb_local, vmalls12e1, nsh) /* Flush innershareable TLBs, current VMID only */ TLB_HELPER(flush_guest_tlb, vmalls12e1is, ish) +/* Flush local TLBs, current VMID, stage-1 only */ +TLB_HELPER(flush_guest_tlb_s1_local, vmalle1, nsh) + +/* Flush innershareable TLBs, current VMID, stage-1 only */ +TLB_HELPER(flush_guest_tlb_s1, vmalle1is, ish) + +/* Flush local TLBs, current VMID, stage-2 for ipa address */ +TLB_HELPER_IPA(flush_guest_tlb_one_s2_local, ipas2e1) + +/* Flush innershareable TLBs, current VMID, stage-2 for ipa address */ +TLB_HELPER_IPA(flush_guest_tlb_one_s2, ipas2e1is) + /* Flush local TLBs, all VMIDs, non-hypervisor mode */ TLB_HELPER(flush_all_guests_tlb_local, alle1, nsh) @@ -88,6 +121,7 @@ TLB_HELPER_VA(__flush_xen_tlb_one_local, vae2) TLB_HELPER_VA(__flush_xen_tlb_one, vae2is) #undef TLB_HELPER +#undef TLB_HELPER_IPA #undef TLB_HELPER_VA #endif /* __ASM_ARM_ARM64_FLUSHTLB_H__ */ diff --git a/xen/arch/arm/include/asm/arm64/sysregs.h b/xen/arch/arm/include/asm/arm64/sysregs.h index 7440d495e4..30a7c3b9fd 100644 --- a/xen/arch/arm/include/asm/arm64/sysregs.h +++ b/xen/arch/arm/include/asm/arm64/sysregs.h @@ -286,6 +286,7 @@ /* id_aa64mmfr1 */ #define ID_AA64MMFR1_ECBHB_SHIFT 60 +#define ID_AA64MMFR1_NTLBPA_SHIFT 48 #define ID_AA64MMFR1_AFP_SHIFT 44 #define ID_AA64MMFR1_ETS_SHIFT 36 #define ID_AA64MMFR1_TWED_SHIFT 32 diff --git a/xen/arch/arm/include/asm/cpufeature.h b/xen/arch/arm/include/asm/cpufeature.h index b6df188011..21df7603fc 100644 --- a/xen/arch/arm/include/asm/cpufeature.h +++ b/xen/arch/arm/include/asm/cpufeature.h @@ -269,7 +269,8 @@ struct cpuinfo_arm { unsigned long ets:4; unsigned long __res1:4; unsigned long afp:4; - unsigned long __res2:12; + unsigned long ntlbpa:4; + unsigned long __res2:8; unsigned long ecbhb:4; /* MMFR2 */ diff --git a/xen/arch/arm/include/asm/mmu/p2m.h b/xen/arch/arm/include/asm/mmu/p2m.h index 58496c0b09..fc2e08bbe8 100644 --- a/xen/arch/arm/include/asm/mmu/p2m.h +++ b/xen/arch/arm/include/asm/mmu/p2m.h @@ -10,6 +10,10 @@ extern unsigned int p2m_root_level; struct p2m_domain; void p2m_force_tlb_flush_sync(struct p2m_domain *p2m); +#ifdef CONFIG_ARM_64 +void p2m_force_tlb_flush_range_sync(struct p2m_domain *p2m, uint64_t start_ipa, + uint64_t page_count); +#endif void p2m_tlb_flush_sync(struct p2m_domain *p2m); void p2m_clear_root_pages(struct p2m_domain *p2m); diff --git a/xen/arch/arm/include/asm/processor.h b/xen/arch/arm/include/asm/processor.h index 92c8bc1a31..07f6a2ef6a 100644 --- a/xen/arch/arm/include/asm/processor.h +++ b/xen/arch/arm/include/asm/processor.h @@ -461,6 +461,8 @@ #ifdef CONFIG_ARM_64 #define MM64_VMID_8_BITS_SUPPORT 0x0 #define MM64_VMID_16_BITS_SUPPORT 0x2 +#define MM64_NTLBPA_SUPPORT_NI 0x0 +#define MM64_NTLBPA_SUPPORT_IMP 0x1 #endif #ifndef __ASSEMBLY__ diff --git a/xen/arch/arm/mmu/p2m.c b/xen/arch/arm/mmu/p2m.c index 51abf3504f..28268fb67f 100644 --- a/xen/arch/arm/mmu/p2m.c +++ b/xen/arch/arm/mmu/p2m.c @@ -235,7 +235,12 @@ void p2m_restore_state(struct vcpu *n) * when running multiple vCPU of the same domain on a single pCPU. */ if ( *last_vcpu_ran != INVALID_VCPU_ID && *last_vcpu_ran != n->vcpu_id ) +#ifdef CONFIG_ARM_64 + if ( system_cpuinfo.mm64.ntlbpa != MM64_NTLBPA_SUPPORT_IMP ) + flush_guest_tlb_s1_local(); +#else flush_guest_tlb_local(); +#endif *last_vcpu_ran = n->vcpu_id; } @@ -293,6 +298,75 @@ void p2m_force_tlb_flush_sync(struct p2m_domain *p2m) p2m->need_flush = false; } +#ifdef CONFIG_ARM_64 +/* + * Force a synchronous P2M TLB flush on a range of addresses. + * + * Must be called with the p2m lock held. + */ +void p2m_force_tlb_flush_range_sync(struct p2m_domain *p2m, uint64_t start_ipa, + uint64_t page_count) +{ + unsigned long flags = 0; + uint64_t ovttbr; + uint64_t ipa = start_ipa; + uint64_t i; + + ASSERT(p2m_is_write_locked(p2m)); + + /* + * ARM only provides an instruction to flush TLBs for the current + * VMID. So switch to the VTTBR of a given P2M if different. + */ + ovttbr = READ_SYSREG64(VTTBR_EL2); + if ( ovttbr != p2m->vttbr ) + { + uint64_t vttbr; + + local_irq_save(flags); + + /* + * ARM64_WORKAROUND_AT_SPECULATE: We need to stop AT to allocate + * TLBs entries because the context is partially modified. We + * only need the VMID for flushing the TLBs, so we can generate + * a new VTTBR with the VMID to flush and the empty root table. + */ + if ( !cpus_have_const_cap(ARM64_WORKAROUND_AT_SPECULATE) ) + vttbr = p2m->vttbr; + else + vttbr = generate_vttbr(p2m->vmid, empty_root_mfn); + + WRITE_SYSREG64(vttbr, VTTBR_EL2); + + /* Ensure VTTBR_EL2 is synchronized before flushing the TLBs */ + isb(); + } + + /* Ensure prior page-tables updates have completed */ + dsb(ishst); + + /* Invalidate stage-2 TLB entries by IPA range */ + for ( i = 0; i < page_count; i++ ) { + flush_guest_tlb_one_s2(ipa); + ipa += 1UL << PAGE_SHIFT; + } + + if ( system_cpuinfo.mm64.ntlbpa != MM64_NTLBPA_SUPPORT_IMP ) + flush_guest_tlb_s1_local(); + + /* Ensure the TLB invalidation has completed */ + dsb(ishst); + + if ( ovttbr != READ_SYSREG64(VTTBR_EL2) ) + { + WRITE_SYSREG64(ovttbr, VTTBR_EL2); + /* Ensure VTTBR_EL2 is back in place before continuing. */ + isb(); + local_irq_restore(flags); + } +} +#endif + void p2m_tlb_flush_sync(struct p2m_domain *p2m) { if ( p2m->need_flush ) @@ -1034,7 +1108,12 @@ static int __p2m_set_entry(struct p2m_domain *p2m, * For more details see (D4.7.1 in ARM DDI 0487A.j). */ p2m_remove_pte(entry, p2m->clean_pte); +#ifdef CONFIG_ARM_64 + p2m_force_tlb_flush_range_sync(p2m, gfn_x(sgfn) << PAGE_SHIFT, + 1UL << page_order); +#else p2m_force_tlb_flush_sync(p2m); +#endif p2m_write_pte(entry, split_pte, p2m->clean_pte); @@ -1090,8 +1169,13 @@ static int __p2m_set_entry(struct p2m_domain *p2m, p2m_remove_pte(entry, p2m->clean_pte); if ( removing_mapping ) +#ifdef CONFIG_ARM_64 + p2m_force_tlb_flush_range_sync(p2m, gfn_x(sgfn) << PAGE_SHIFT, + 1UL << page_order); +#else /* Flush can be deferred if the entry is removed */ p2m->need_flush |= !!lpae_is_valid(orig_pte); +#endif else { lpae_t pte = mfn_to_p2m_entry(smfn, t, a); @@ -1102,17 +1186,23 @@ static int __p2m_set_entry(struct p2m_domain *p2m, /* * It is necessary to flush the TLB before writing the new entry * to keep coherency when the previous entry was valid. - * - * Although, it could be defered when only the permissions are - * changed (e.g in case of memaccess). */ if ( lpae_is_valid(orig_pte) ) { +#ifdef CONFIG_ARM_64 + p2m_force_tlb_flush_range_sync(p2m, gfn_x(sgfn) << PAGE_SHIFT, + 1UL << page_order); +#else + /* + * Although, flush could be defered when only the permissions are + * changed (e.g in case of memaccess). + */ if ( likely(!p2m->mem_access_enabled) || P2M_CLEAR_PERM(pte) != P2M_CLEAR_PERM(orig_pte) ) p2m_force_tlb_flush_sync(p2m); else p2m->need_flush = true; +#endif } else if ( !p2m_is_valid(orig_pte) ) /* new mapping */ p2m->stats.mappings[level]++; -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Wed Nov 05 12:57:22 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 05 Nov 2025 12:57:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156178.1485447 (Exim 4.92) (envelope-from ) id 1vGd4j-0006ya-Qv; Wed, 05 Nov 2025 12:57:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1156178.1485447; Wed, 05 Nov 2025 12:57:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGd4j-0006yS-N1; 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boundary="=separator"; charset="utf-8" Content-Transfer-Encoding: binary MIME-Version: 1.0 X-Mailer: MIME-tools 5.510 (Entity 5.510) To: xen-announce@lists.xen.org, xen-devel@lists.xen.org, xen-users@lists.xen.org, oss-security@lists.openwall.com From: Xen.org security team CC: Xen.org security team Subject: Xen Security Advisory 471 v3 (CVE-2024-36350,CVE-2024-36357) - x86: Transitive Scheduler Attacks Message-Id: Date: Wed, 05 Nov 2025 12:57:05 +0000 --=separator Content-Type: text/plain; charset="utf-8" Content-Disposition: inline Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNED MESSAGE----- Hash: SHA256 Xen Security Advisory CVE-2024-36350,CVE-2024-36357 / XSA-471 version 3 x86: Transitive Scheduler Attacks UPDATES IN VERSION 3 ==================== Correct one of the CVEs in the NOTE section at the bottom. It had the wrong year, but correct number and title. ISSUE DESCRIPTION ================= Researchers from Microsoft and ETH Zurich have discovered several new speculative sidechannel attacks which bypass current protections. They are detailed in a paper titled "Enter, Exit, Page Fault, Leak: Testing Isolation Boundaries for Microarchitectural Leaks". Two issues, which AMD have named Transitive Scheduler Attacks, utilise timing information from instruction execution. These are: * CVE-2024-36350: TSA-SQ (TSA in the Store Queues) * CVE-2024-36357: TSA-L1 (TSA in the L1 data cache) For more information, see: https://www.amd.com/content/dam/amd/en/documents/resources/bulletin/technical-guidance-for-mitigating-transient-scheduler-attacks.pdf https://www.amd.com/en/resources/product-security/bulletin/amd-sb-7029.html https://aka.ms/enter-exit-leak The paper also details other speculative attacks. See below. IMPACT ====== An attacker might be able to infer data belonging to other contexts, including data belonging to other guests. VULNERABLE SYSTEMS ================== Systems running all versions of Xen are affected. Only AMD Fam19h CPUs (Zen3/4 microarchitectures) are believed to be vulnerable. Other AMD CPUs, and CPUs from other manufacturers are not known to be affected. MITIGATION ========== There are no mitigations. RESOLUTION ========== AMD are producing microcode to address TSA, which adds scrubbing side effects to the VERW instruction. This was included in the firmware fixes for the Entrysign signature vulnerability from ~December 2024, but are also available in an OS-loadable form on older firmware. Consult your dom0 OS vendor and/or hardware vendor for updated microcode. In addition to the microcode, changes are required to Xen to make use of VERW scrubbing at suitable points. Applying the appropriate set of attached patches resolves this issue. Note that patches for released versions are generally prepared to apply to the stable branches, and may not apply cleanly to the most recent release tarball. Downstreams are encouraged to update to the tip of the stable branch before applying these patches. xsa471/xsa471-??.patch xen-unstable xsa471/xsa471-4.20-??.patch Xen 4.20.x xsa471/xsa471-4.19-??.patch Xen 4.19.x xsa471/xsa471-4.18-??.patch Xen 4.18.x xsa471/xsa471-4.17-??.patch Xen 4.17.x $ sha256sum xsa471*/* 4cc8b54d3cae4864053c4d608061675564cc322c6cd362e33ac59ac4c9371358 xsa471/xsa471-01.patch 9bdfd0ad8d34114e69bb0e264ffdcb176e54211753cc1eed247e73cd3fe752e9 xsa471/xsa471-02.patch 62706c1593cb64bfd053f5ee2e8fa26f5414835c6ef5f694c52a61e18017aa1d xsa471/xsa471-03.patch e06162c55de0b3ca79302ea47c8169079b0f2cd65a48d3e0509677452c9887da xsa471/xsa471-4.17-01.patch 742c59d776c73993c44e72ceada2b83b61fa77a988f5c2c593b6594b4f4078de xsa471/xsa471-4.17-02.patch a8ed5e90e405273115d6a06199de3190319ba12aac33bea17495db42b6a9becc xsa471/xsa471-4.17-03.patch 855c9528d93109a1a673dd8f4feb87a688457908c9dd821d0e1a3326efb19257 xsa471/xsa471-4.17-04.patch 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X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: KL1PR0601MB4588.apcprd06.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 98b46ed0-855b-4ee6-bfc2-08de1c70c0ec X-MS-Exchange-CrossTenant-originalarrivaltime: 05 Nov 2025 13:39:33.1694 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 38ae3bcd-9579-4fd4-adda-b42e1495d55a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: X+RukgQNa7y4dkP9nZni9LWWFDMICC0WlGBdbMOKX7zCxvbkmH1XOl0kpIYzgI2UepDAR0UPmdSspkcziUShyJ5Wq0ARM21Y5xn/ScIzcvU= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SEZPR06MB5919 --_000_KL1PR0601MB458825063113CD4CB2F9440FE6C5AKL1PR0601MB4588_ Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Hi, I have sent out a patch using IPAS2E1IS. The R version RIPAS2E1IS would onl= y be helpful if we have to invalidate more than one page at a time and this= is not possible unless a batch version of hypercall is implemented because= otherwise there is only one page removed per hypercall. Although IPAS2E1IS= can be used and the number of invocations is still same as VMALLS12E1IS, b= ut the execution time is much smaller. With Ftrace I got: handle_ipas2e1is: min-max: 17.580 - 68.260 us. Thanks again for your great suggestions. Please review my patch, you should= 've received an email. Regards, Haseeb --_000_KL1PR0601MB458825063113CD4CB2F9440FE6C5AKL1PR0601MB4588_ Content-Type: text/html; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable
Hi,

I have sent o= ut a patch using IPAS2E1IS. The R vers= ion RIPAS2E1IS would only be helpful if we have to invalidate more than one= page at a time and this is not possible unless a batch version of hypercal= l is implemented because otherwise there is only one page removed per hypercall. Although IPAS2E1IS can be us= ed and the number of invocations is still same as VMALLS12E1IS, but the exe= cution time is much smaller. With Ftrace I got:
handle_ipas2e1is: min-max: 17.580 - 68.260 us.

Thanks again for your great suggestions. Please review my patch, you should= 've received an email. 

Regards,
Haseeb
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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?2JoFFLWpiPa7v4ndsP2ztYDZWiO9SOuNX0wjb/H+wXo8u8jxM2nTyi2NaXQu?= =?us-ascii?Q?N42pc4MdtP1IUx+7X3YhDNE9FDxpcbYbqKH6BY3t/U6gXPzhKLZfIERTfcfE?= =?us-ascii?Q?BQvKD4bBYd+Vp3pgVfjgwDiIHdrTOyXHGkyxVIZBJxKTx2s78881nM526QcW?= =?us-ascii?Q?pk48jxEVtCT2MtkuaTsyplhxP7zyQ2nyQIe2MmgvfU+2W5HYZ8mrYSVXg7OA?= =?us-ascii?Q?7TCXfqIpTqapCXSyJCWDZIZPrQvNrbittKWN9jYLU6YfIR/LHNrlzfF0QaLe?= =?us-ascii?Q?wk/UNgJum/tNp9w6qzbeYlmTDuoy/hOihJJ9Kt56KUWnfRflfD7LFACozVoF?= =?us-ascii?Q?CYLAzytyDamQn4g3jglMlzNZMqzqIfciptAapo+Zytn5KUoXDDleFfW31mGK?= =?us-ascii?Q?Ozu/1G4F+bT6kQ4duk1CbG6y1wudAYEZCPOuCrptYeeX+n6K8SpbksQ383uL?= =?us-ascii?Q?69BkHaO+7woiy93JLM44ETLeVS5MBg25gUhx/baISqTo0QPZkMS/mEMaSc/x?= =?us-ascii?Q?1B7rtwABFQn0rgtrLtTRPjDTm9T1wF5uDm79tkE1rBPVGmCVHIUgaa9EaeDx?= =?us-ascii?Q?GnpQNC/5+zFFz2Fg4Ji9FpekaL+1qPe76Y+R3+B8fU3x3XUtnSn1Xw/sF81G?= =?us-ascii?Q?Dtp17u81RCzhqqklvlns+5Obi5sIXdlisBvyCj1vsyrLo1mALLZktHQ/2iOA?= =?us-ascii?Q?YO0zOmJRo3AkT8A5Cdce55Ta52lodNCEtFxl9Bjc1+cn8n2MZtR6JkUJiutK?= =?us-ascii?Q?pHoiYFTgMCi91AlvbNTXkzwiKMNnLo7e/KIdFPfREnjHhMOP9WPgA4z8yXZC?= =?us-ascii?Q?v5UT5Rx6VBOxxMEeZVkLaT+zjksnYSY3hmTzEYVhfxqmKLSVuwDLqKYX8uni?= =?us-ascii?Q?oo6G9vRgNKy3gQZQfOEv2bouqyZps9RQsTVpYJMbC50xGPMXfK1FQrQil8F3?= =?us-ascii?Q?MpZxHjxhPHjYf02qO/9EImjN4gLOLT1gnwZFYMeYBvUz3k/kKXibvYDQf0BJ?= =?us-ascii?Q?tAxyIRWglqEp9UYteQ9zTjWnkedWcp7GrYVZTfkZf9a2RI1GhatTbbnCchZS?= =?us-ascii?Q?upO/52ehqpg9UqTs0UkvvtirDtQWkZhF6A8GqcCl6Pq0+DGmkuYfnrLbGqLT?= =?us-ascii?Q?pAhGfDzn8TFm2whTG1DIb0LVoZfkybThQGWmAUCe3JA0pBZ0JXK6KKgXlJfP?= =?us-ascii?Q?raFHzp4d1hlKzHbBy2ZRdvfMs13xejIzeIEEU8G1/zmIMex9R8loZaT4nS0D?= =?us-ascii?Q?chTC9uLwFyjECdYhpa07ZBejGtNOnrbOp1jebXazOqUJxAQGMaUWduCvz7YG?= =?us-ascii?Q?X2EwNzpXp2VBzpPbomjEldNWg97VWwrL9xP5Al0om1CQZGFt9Qhe0cWXH8Cl?= =?us-ascii?Q?yayTb6P2Mea6RABkXPf1vm1h1yyd2tn3s7VQOqoGFIp7CENDzMlssqoE4C0A?= =?us-ascii?Q?TMRKxmnK3kHTiPmLi4cAPXclS0kNEkwJYlT11FAiuzMrLraZV537s1T1RCav?= =?us-ascii?Q?jkuI7A7HNCDCGmQniVEtYHdqxgXEGe/cg4BkxuvueqA4j8pTpOMzINP05AO7?= =?us-ascii?Q?TIII+aTR4kTYBCq9pMz2CcLz/9ChuFqeM3eNv+BGpoeGYD2ZvAUaVLXuh2W+?= =?us-ascii?Q?aQ=3D=3D?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0a406fc2-4703-4d65-2645-08de1c815480 X-MS-Exchange-CrossTenant-AuthSource: IA3PR03MB8408.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Nov 2025 15:38:12.7653 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: PrwV/v4ZrMnmf8FtY0AFOXz2flyfXfFbIJZIj7SIGFr62/TNZt3tgLnqEdAsCdNUNshbvynW+RCNtceAqckK1pXSvIy8VCojyRZDh+ptzpU= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR03MB7274 From: Frediano Ziglio For xen.gz file we strip all symbols and have an additional xen-syms file version with all symbols. Make xen.efi more coherent stripping all symbols too. xen-syms.efi can be used for debugging. Signed-off-by: Frediano Ziglio --- Changes since v1: - avoid leaving target if some command fails. Changes since v2: - do not convert type but retain PE format; = use xen-syms.efi for new file name, more consistent with ELF. --- docs/misc/efi.pandoc | 8 +------- xen/Kconfig.debug | 9 ++------- xen/Makefile | 19 ------------------- xen/arch/x86/Makefile | 9 ++++++--- 4 files changed, 9 insertions(+), 36 deletions(-) diff --git a/docs/misc/efi.pandoc b/docs/misc/efi.pandoc index 11c1ac3346..c66b18a66b 100644 --- a/docs/misc/efi.pandoc +++ b/docs/misc/efi.pandoc @@ -20,13 +20,7 @@ Xen to load the configuration file even if multiboot modules are found. Once built, `make install-xen` will place the resulting binary directly into the EFI boot partition, provided `EFI_VENDOR` is set in the environment (and `EFI_MOUNTPOINT` is overridden as needed, should the default of `/boot/efi` not -match your system). When built with debug info, the binary can be quite large. -Setting `INSTALL_EFI_STRIP=1` in the environment will cause it to be stripped -of debug info in the process of installing. `INSTALL_EFI_STRIP` can also be set -to any combination of options suitable to pass to `strip`, in case the default -ones don't do. The xen.efi binary will also be installed in `/usr/lib64/efi/`, -unless `EFI_DIR` is set in the environment to override this default. This -binary will not be stripped in the process. +match your system). The binary itself will require a configuration file (names with the `.efi` extension of the binary's name replaced by `.cfg`, and - until an existing diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug index d900d926c5..58ee10ee3e 100644 --- a/xen/Kconfig.debug +++ b/xen/Kconfig.debug @@ -147,12 +147,7 @@ config DEBUG_INFO Say Y here if you want to build Xen with debug information. This information is needed e.g. for doing crash dump analysis of the hypervisor via the "crash" tool. - Saying Y will increase the size of the xen-syms and xen.efi - binaries. In case the space on the EFI boot partition is rather - limited, you may want to install a stripped variant of xen.efi in - the EFI boot partition (look for "INSTALL_EFI_STRIP" in - docs/misc/efi.pandoc for more information - when not using - "make install-xen" for installing xen.efi, stripping needs to be - done outside the Xen build environment). + Saying Y will increase the size of the xen-syms and xen.efi.elf + binaries. endmenu diff --git a/xen/Makefile b/xen/Makefile index ddcee8835c..605a26c181 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -493,22 +493,6 @@ endif .PHONY: _build _build: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX) -# Strip -# -# INSTALL_EFI_STRIP, if defined, will cause xen.efi to be stripped before it -# is installed. If INSTALL_EFI_STRIP is '1', then the default option(s) below -# will be used. Otherwise, INSTALL_EFI_STRIP value will be used as the -# option(s) to the strip command. -ifdef INSTALL_EFI_STRIP - -ifeq ($(INSTALL_EFI_STRIP),1) -efi-strip-opt := --strip-debug --keep-file-symbols -else -efi-strip-opt := $(INSTALL_EFI_STRIP) -endif - -endif - .PHONY: _install _install: D=$(DESTDIR) _install: T=$(notdir $(TARGET)) @@ -535,9 +519,6 @@ _install: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX) ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T)-$(XEN_VERSION).efi; \ ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T).efi; \ if [ -n '$(EFI_MOUNTPOINT)' -a -n '$(EFI_VENDOR)' ]; then \ - $(if $(efi-strip-opt), \ - $(STRIP) $(efi-strip-opt) -p -o $(TARGET).efi.stripped $(TARGET).efi && \ - $(INSTALL_DATA) $(TARGET).efi.stripped $(D)$(EFI_MOUNTPOINT)/efi/$(EFI_VENDOR)/$(T)-$(XEN_FULLVERSION).efi ||) \ $(INSTALL_DATA) $(TARGET).efi $(D)$(EFI_MOUNTPOINT)/efi/$(EFI_VENDOR)/$(T)-$(XEN_FULLVERSION).efi; \ elif [ "$(D)" = "$(patsubst $(shell cd $(XEN_ROOT) && pwd)/%,%,$(D))" ]; then \ echo 'EFI installation only partially done (EFI_VENDOR not set)' >&2; \ diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index 407571c510..c118ab7b7d 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -228,14 +228,17 @@ endif $(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o $(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds $< \ $(dot-target).1r.o $(dot-target).1s.o $(orphan-handling-y) \ - $(note_file_option) -o $@ - $(NM) -pa --format=sysv $@ \ + $(note_file_option) -o $@.tmp + $(NM) -pa --format=sysv $@.tmp \ | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > $@.map ifeq ($(CONFIG_DEBUG_INFO),y) - $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) -O elf64-x86-64 $@ $@.elf + $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))cp -f \ + $@.tmp $(TARGET)-syms.efi + $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(STRIP) $@.tmp endif rm -f $(dot-target).[0-9]* $(@D)/..$(@F).[0-9]* + mv -f $@.tmp $@ ifeq ($(CONFIG_XEN_IBT),y) $(SHELL) $(srctree)/tools/check-endbr.sh $@ endif -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Wed Nov 05 16:13:29 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 05 Nov 2025 16:13:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156282.1485496 (Exim 4.92) (envelope-from ) id 1vGg8P-0002VV-SQ; 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a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc :content-type:date:from:in-reply-to:message-id:mime-version :references:subject:to; s=pp1; bh=hoOO0E96ahCdATo2vQq4UFuH8BQoyW GvRJ67v+d6zmY=; b=SGkprtBRmnhHNGgfbF3sg7Go+c8inCeDqeC9AZjQfWNjqP UlImdvXnB2eMzCk0pwDJKkF+IyFhEL/jEE8u1kZi8IReERwiQ1FVxGw+w2LhH+sy 2G0xn4JOOstfTzc1c06KaQNGCHeOXa9vK9rwN0ha3pMsSVpC2jcrtdLnZUA5XPvR m+dXvo/F5oe8kUj+LdeKJtJbBvr0BqSaBvx8WxcuOGrxYtiM/WL6KzUAgfQRUPkh RrK27EIk9Nv7KGFJk1CZtMDciaSlLsrEXmshoHrTVS3KKkC1OsBwg3P57glcc1m8 Yx7AzbSh81g2JkUW5G52BRvU1+355886S8zrCK3Q== Date: Wed, 5 Nov 2025 17:12:21 +0100 From: Alexander Gordeev To: Ritesh Harjani Cc: Kevin Brodsky , linux-mm@kvack.org, linux-kernel@vger.kernel.org, Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org Subject: Re: [PATCH v4 07/12] mm: enable lazy_mmu sections to nest Message-ID: <50d1b63a-88d7-4484-82c0-3bde96e3207d-agordeev@linux.ibm.com> References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-8-kevin.brodsky@arm.com> <87ms5050g0.ritesh.list@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <87ms5050g0.ritesh.list@gmail.com> X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 0NFs_GrYa4zcH0BLNom4mOsajrCSPUxj X-Authority-Analysis: v=2.4 cv=MKhtWcZl c=1 sm=1 tr=0 ts=690b776c cx=c_pps a=3Bg1Hr4SwmMryq2xdFQyZA==:117 a=3Bg1Hr4SwmMryq2xdFQyZA==:17 a=kj9zAlcOel0A:10 a=6UeiqGixMTsA:10 a=VkNPw1HP01LnGYTKEx00:22 a=CPQ9TFRCZcvXz5jfQC4A:9 a=CjuIK1q_8ugA:10 a=DXsff8QfwkrTrK3sU8N1:22 a=Z5ABNNGmrOfJ6cZ5bIyy:22 a=bWyr8ysk75zN3GCy5bjg:22 X-Proofpoint-ORIG-GUID: NNqKmXG2tTtHuvXhjQOh-riRMNlVPLAT X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTAxMDAwMSBTYWx0ZWRfX2KnrArcnBxcH TeGoejtsfYJDuRV3FbvjuDEBFMmDeOQEbaaSQExJ7765sDaLesq0lIorOycsEibo64TNmmHRSNz 6XIuQLSaO5SrKkE/QNnJd3smjWHr0HSQ+uA+bMkugv+Df6gPVeHmGXHRAMUP3/n0rbDuuZ3m9UR Vw/WmiOn8NrnsxKTvVsuwmGs5I8kM0QBGFJCMl0xuCoTJbnjBxb2U37aEnIf2iT73qQhw1Rsaku Qftv0wlHgsh4K3kTYYn5/INUGE4LK5ev6oQVqwHTw5VhjuNirNmgcqWMIXq1s/3gqUc/RmuAgWN rH1ZA/5Add3j27sIoKtigY6uE1hzOktXQSO9iyvuDIkbiOtgLSq15NhyhwbIusKnV/r5/eZHbpi xbMKu5ZjKQ3ntqUuRquH+Yb1K/SdzA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-05_06,2025-11-03_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=0 bulkscore=0 impostorscore=0 clxscore=1015 lowpriorityscore=0 malwarescore=0 adultscore=0 phishscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510240000 definitions=main-2511010001 On Wed, Nov 05, 2025 at 02:19:03PM +0530, Ritesh Harjani wrote: > > + * in_lazy_mmu_mode() can be used to check whether the lazy MMU mode is > > + * currently enabled. > > */ > > #ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE > > static inline void lazy_mmu_mode_enable(void) > > { > > - arch_enter_lazy_mmu_mode(); > > + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; > > + > > + VM_WARN_ON_ONCE(state->nesting_level == U8_MAX); > > + /* enable() must not be called while paused */ > > + VM_WARN_ON(state->nesting_level > 0 && !state->active); > > + > > + if (state->nesting_level++ == 0) { > > + state->active = true; > > + arch_enter_lazy_mmu_mode(); > > + } > > } > > Some architectures disables preemption in their > arch_enter_lazy_mmu_mode(). So shouldn't the state->active = true should > happen after arch_enter_lazy_mmu_mode() has disabled preemption()? i.e. Do you have some scenario in mind that could cause an issue? IOW, what could go wrong if the process is scheduled to another CPU before preempt_disable() is called? > static inline void lazy_mmu_mode_enable(void) > { > - arch_enter_lazy_mmu_mode(); > + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; > + > + VM_WARN_ON_ONCE(state->nesting_level == U8_MAX); > + /* enable() must not be called while paused */ > + VM_WARN_ON(state->nesting_level > 0 && !state->active); > + > + if (state->nesting_level++ == 0) { > + arch_enter_lazy_mmu_mode(); > + state->active = true; > + } > } > > ... I think it make more sense to enable the state after the arch_** > call right. But then in_lazy_mmu_mode() would return false if called from arch_enter_lazy_mmu_mode(). Not big problem, but still.. > > static inline void lazy_mmu_mode_disable(void) > > { > > - arch_leave_lazy_mmu_mode(); > > + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; > > + > > + VM_WARN_ON_ONCE(state->nesting_level == 0); > > + VM_WARN_ON(!state->active); > > + > > + if (--state->nesting_level == 0) { > > + state->active = false; > > + arch_leave_lazy_mmu_mode(); > > + } else { > > + /* Exiting a nested section */ > > + arch_flush_lazy_mmu_mode(); > > + } > > } > > This looks ok though. > > > > > static inline void lazy_mmu_mode_pause(void) > > { > > + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; > > + > > + VM_WARN_ON(state->nesting_level == 0 || !state->active); > > + > > + state->active = false; > > arch_leave_lazy_mmu_mode(); > > } > > > > static inline void lazy_mmu_mode_resume(void) > > { > > + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; > > + > > + VM_WARN_ON(state->nesting_level == 0 || state->active); > > + > > + state->active = true; > > arch_enter_lazy_mmu_mode(); > > } > > Ditto. > > -ritesh From xen-devel-bounces@lists.xenproject.org Wed Nov 05 17:44:39 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 05 Nov 2025 17:44:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156306.1485506 (Exim 4.92) (envelope-from ) id 1vGhYU-0005eJ-Bj; Wed, 05 Nov 2025 17:44:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1156306.1485506; Wed, 05 Nov 2025 17:44:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGhYU-0005eC-8n; Wed, 05 Nov 2025 17:44:22 +0000 Received: by outflank-mailman (input) for mailman id 1156306; Wed, 05 Nov 2025 17:44:21 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGhYT-0005e6-IP for xen-devel@lists.xenproject.org; Wed, 05 Nov 2025 17:44:21 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vGhYS-002Tqx-2W; Wed, 05 Nov 2025 17:44:20 +0000 Received: from [15.248.2.25] (helo=[10.24.67.185]) by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.96) (envelope-from ) id 1vGhYS-00EcvA-2R; Wed, 05 Nov 2025 17:44:20 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:Content-Type:In-Reply-To:From: References:Cc:To:Subject:MIME-Version:Date:Message-ID; bh=9bANQMMiY9n3ayB50Cdxawp9PhXoZHdIk4X0ToNi7IY=; b=dAk1s4lJupj6wluCbsC2QpPgxe xG1ISeJ/+pF7gk/FUeiHDPwO+dSeY+SsVXgYR4agknch6te56F41Af53b2vBoHtOKCiN7g0++TQsA zGFkzy8lfT47Y5CIQfd2HEHuLNjvXVf0eFFo0fEmkDzEKJalSNOD2fkZjG934SSLQ4Rg=; Message-ID: <1a4490d7-5fb5-44a0-bd77-c8e0548a2553@xen.org> Date: Wed, 5 Nov 2025 17:44:18 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: Limitations for Running Xen on KVM Arm64 To: "haseeb.ashraf@siemens.com" , Mohamed Mediouni Cc: "xen-devel@lists.xenproject.org" , "Volodymyr_Babchuk@epam.com" , "Driscoll, Dan" , "Bachtel, Andrew" , "fahad.arslan@siemens.com" , "noor.ahsan@siemens.com" , "brian.sheppard@siemens.com" , Stefano Stabellini , Bertrand Marquis , Michal Orzel References: <2b00a98f-6fee-4341-92bd-25909ebb6e36@xen.org> <01527182-ccef-43a5-be55-a5450eb7919f@xen.org> <0fd2b8e4-bdea-4d01-a2dd-8d2e4b37090d@xen.org> Content-Language: en-US From: Julien Grall In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 05/11/2025 13:39, haseeb.ashraf@siemens.com wrote: > Hi, Hi Haseeb, > I have sent out a patch using IPAS2E1IS. The R version RIPAS2E1IS would only be helpful if we have to invalidate more than one page at a time and this is not possible unless a batch version of hypercall is implemented because otherwise there is only one page removed per hypercall. I have only briefly look at your patch. You have the following loop: /* Invalidate stage-2 TLB entries by IPA range */ for ( i = 0; i < page_count; i++ ) { flush_guest_tlb_one_s2(ipa); ipa += 1UL << PAGE_SHIFT; } With RIPAS2E1IS, you would be able to replace this loop with a single instruction. This may not have any value in your setup because you are unmaping 4KB at the time. But there are other hypercalls (such as XENMEM_decrease_reservation) where you can remove larger mapping. So I think there are some values to use the range version. Although, I would be fine if this is not handled in your current patch. > Thanks again for your great suggestions. Please review my patch, you should've received an email. I will add it in my list of reviews. Cheers, -- Julien Grall From xen-devel-bounces@lists.xenproject.org Wed Nov 05 20:32:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 05 Nov 2025 20:32:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156380.1485531 (Exim 4.92) (envelope-from ) id 1vGkAh-0000yc-HN; Wed, 05 Nov 2025 20:31:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1156380.1485531; Wed, 05 Nov 2025 20:31:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGkAh-0000yV-EZ; Wed, 05 Nov 2025 20:31:59 +0000 Received: by outflank-mailman (input) for mailman id 1156380; Wed, 05 Nov 2025 20:31:58 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGkAf-0000yP-QH for xen-devel@lists.xenproject.org; Wed, 05 Nov 2025 20:31:57 +0000 Received: from mail-yx1-xb130.google.com (mail-yx1-xb130.google.com [2607:f8b0:4864:20::b130]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 73b6e430-ba86-11f0-9d16-b5c5bf9af7f9; Wed, 05 Nov 2025 21:31:48 +0100 (CET) Received: by mail-yx1-xb130.google.com with SMTP id 956f58d0204a3-63f95dc176fso292526d50.1 for ; Wed, 05 Nov 2025 12:31:48 -0800 (PST) Received: from [10.138.34.110] (h96-60-249-169.cncrtn.broadband.dynamic.tds.net. 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Wed, 05 Nov 2025 12:31:46 -0800 (PST) Message-ID: Date: Wed, 5 Nov 2025 15:31:21 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3] xen: Strip xen.efi by default To: Frediano Ziglio , xen-devel@lists.xenproject.org Cc: Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Frediano Ziglio References: <20251105153808.20278-1-frediano.ziglio@citrix.com> Content-Language: en-US From: Demi Marie Obenour Autocrypt: addr=demiobenour@gmail.com; keydata= xsFNBFp+A0oBEADffj6anl9/BHhUSxGTICeVl2tob7hPDdhHNgPR4C8xlYt5q49yB+l2nipd aq+4Gk6FZfqC825TKl7eRpUjMriwle4r3R0ydSIGcy4M6eb0IcxmuPYfbWpr/si88QKgyGSV Z7GeNW1UnzTdhYHuFlk8dBSmB1fzhEYEk0RcJqg4AKoq6/3/UorR+FaSuVwT7rqzGrTlscnT DlPWgRzrQ3jssesI7sZLm82E3pJSgaUoCdCOlL7MMPCJwI8JpPlBedRpe9tfVyfu3euTPLPx wcV3L/cfWPGSL4PofBtB8NUU6QwYiQ9Hzx4xOyn67zW73/G0Q2vPPRst8LBDqlxLjbtx/WLR 6h3nBc3eyuZ+q62HS1pJ5EvUT1vjyJ1ySrqtUXWQ4XlZyoEFUfpJxJoN0A9HCxmHGVckzTRl 5FMWo8TCniHynNXsBtDQbabt7aNEOaAJdE7to0AH3T/Bvwzcp0ZJtBk0EM6YeMLtotUut7h2 Bkg1b//r6bTBswMBXVJ5H44Qf0+eKeUg7whSC9qpYOzzrm7+0r9F5u3qF8ZTx55TJc2g656C 9a1P1MYVysLvkLvS4H+crmxA/i08Tc1h+x9RRvqba4lSzZ6/Tmt60DPM5Sc4R0nSm9BBff0N m0bSNRS8InXdO1Aq3362QKX2NOwcL5YaStwODNyZUqF7izjK4QARAQABzTxEZW1pIE1hcmll IE9iZW5vdXIgKGxvdmVyIG9mIGNvZGluZykgPGRlbWlvYmVub3VyQGdtYWlsLmNvbT7CwXgE EwECACIFAlp+A0oCGwMGCwkIBwMCBhUIAgkKCwQWAgMBAh4BAheAAAoJELKItV//nCLBhr8Q AK/xrb4wyi71xII2hkFBpT59ObLN+32FQT7R3lbZRjVFjc6yMUjOb1H/hJVxx+yo5gsSj5LS 9AwggioUSrcUKldfA/PKKai2mzTlUDxTcF3vKx6iMXKA6AqwAw4B57ZEJoMM6egm57TV19kz PMc879NV2nc6+elaKl+/kbVeD3qvBuEwsTe2Do3HAAdrfUG/j9erwIk6gha/Hp9yZlCnPTX+ VK+xifQqt8RtMqS5R/S8z0msJMI/ajNU03kFjOpqrYziv6OZLJ5cuKb3bZU5aoaRQRDzkFIR 6aqtFLTohTo20QywXwRa39uFaOT/0YMpNyel0kdOszFOykTEGI2u+kja35g9TkH90kkBTG+a EWttIht0Hy6YFmwjcAxisSakBuHnHuMSOiyRQLu43ej2+mDWgItLZ48Mu0C3IG1seeQDjEYP tqvyZ6bGkf2Vj+L6wLoLLIhRZxQOedqArIk/Sb2SzQYuxN44IDRt+3ZcDqsPppoKcxSyd1Ny 2tpvjYJXlfKmOYLhTWs8nwlAlSHX/c/jz/ywwf7eSvGknToo1Y0VpRtoxMaKW1nvH0OeCSVJ itfRP7YbiRVc2aNqWPCSgtqHAuVraBRbAFLKh9d2rKFB3BmynTUpc1BQLJP8+D5oNyb8Ts4x Xd3iV/uD8JLGJfYZIR7oGWFLP4uZ3tkneDfYzsFNBFp+A0oBEAC9ynZI9LU+uJkMeEJeJyQ/ 8VFkCJQPQZEsIGzOTlPnwvVna0AS86n2Z+rK7R/usYs5iJCZ55/JISWd8xD57ue0eB47bcJv VqGlObI2DEG8TwaW0O0duRhDgzMEL4t1KdRAepIESBEA/iPpI4gfUbVEIEQuqdqQyO4GAe+M kD0Hy5JH/0qgFmbaSegNTdQg5iqYjRZ3ttiswalql1/iSyv1WYeC1OAs+2BLOAT2NEggSiVO txEfgewsQtCWi8H1SoirakIfo45Hz0tk/Ad9ZWh2PvOGt97Ka85o4TLJxgJJqGEnqcFUZnJJ riwoaRIS8N2C8/nEM53jb1sH0gYddMU3QxY7dYNLIUrRKQeNkF30dK7V6JRH7pleRlf+wQcN fRAIUrNlatj9TxwivQrKnC9aIFFHEy/0mAgtrQShcMRmMgVlRoOA5B8RTulRLCmkafvwuhs6 dCxN0GNAORIVVFxjx9Vn7OqYPgwiofZ6SbEl0hgPyWBQvE85klFLZLoj7p+joDY1XNQztmfA rnJ9x+YV4igjWImINAZSlmEcYtd+xy3Li/8oeYDAqrsnrOjb+WvGhCykJk4urBog2LNtcyCj kTs7F+WeXGUo0NDhbd3Z6AyFfqeF7uJ3D5hlpX2nI9no/ugPrrTVoVZAgrrnNz0iZG2DVx46 x913pVKHl5mlYQARAQABwsFfBBgBAgAJBQJafgNKAhsMAAoJELKItV//nCLBwNIP/AiIHE8b oIqReFQyaMzxq6lE4YZCZNj65B/nkDOvodSiwfwjjVVE2V3iEzxMHbgyTCGA67+Bo/d5aQGj gn0TPtsGzelyQHipaUzEyrsceUGWYoKXYyVWKEfyh0cDfnd9diAm3VeNqchtcMpoehETH8fr RHnJdBcjf112PzQSdKC6kqU0Q196c4Vp5HDOQfNiDnTf7gZSj0BraHOByy9LEDCLhQiCmr+2 E0rW4tBtDAn2HkT9uf32ZGqJCn1O+2uVfFhGu6vPE5qkqrbSE8TG+03H8ecU2q50zgHWPdHM OBvy3EhzfAh2VmOSTcRK+tSUe/u3wdLRDPwv/DTzGI36Kgky9MsDC5gpIwNbOJP2G/q1wT1o Gkw4IXfWv2ufWiXqJ+k7HEi2N1sree7Dy9KBCqb+ca1vFhYPDJfhP75I/VnzHVssZ/rYZ9+5 1yDoUABoNdJNSGUYl+Yh9Pw9pE3Kt4EFzUlFZWbE4xKL/NPno+z4J9aWemLLszcYz/u3XnbO vUSQHSrmfOzX3cV4yfmjM5lewgSstoxGyTx2M8enslgdXhPthZlDnTnOT+C+OTsh8+m5tos8 HQjaPM01MKBiAqdPgksm1wu2DrrwUi6ChRVTUBcj6+/9IJ81H2P2gJk3Ls3AVIxIffLoY34E +MYSfkEjBz0E8CLOcAw7JIwAaeBT In-Reply-To: <20251105153808.20278-1-frediano.ziglio@citrix.com> Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------wR3uNGtKIpM00cl4EqK70PkG" This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------wR3uNGtKIpM00cl4EqK70PkG Content-Type: multipart/mixed; boundary="------------Laf3qgGfcASVhjDuzhGmlgxS"; protected-headers="v1" From: Demi Marie Obenour To: Frediano Ziglio , xen-devel@lists.xenproject.org Cc: Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Frediano Ziglio Message-ID: Subject: Re: [PATCH v3] xen: Strip xen.efi by default References: <20251105153808.20278-1-frediano.ziglio@citrix.com> In-Reply-To: <20251105153808.20278-1-frediano.ziglio@citrix.com> --------------Laf3qgGfcASVhjDuzhGmlgxS Content-Type: multipart/mixed; boundary="------------vcM0SfoOk10EZuEbrGl6yv6X" --------------vcM0SfoOk10EZuEbrGl6yv6X Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On 11/5/25 10:38, Frediano Ziglio wrote: > From: Frediano Ziglio >=20 > For xen.gz file we strip all symbols and have an additional > xen-syms file version with all symbols. > Make xen.efi more coherent stripping all symbols too. > xen-syms.efi can be used for debugging. >=20 > Signed-off-by: Frediano Ziglio > --- > Changes since v1: > - avoid leaving target if some command fails. >=20 > Changes since v2: > - do not convert type but retain PE format; > =3D use xen-syms.efi for new file name, more consistent with ELF. > --- > docs/misc/efi.pandoc | 8 +------- > xen/Kconfig.debug | 9 ++------- > xen/Makefile | 19 ------------------- > xen/arch/x86/Makefile | 9 ++++++--- > 4 files changed, 9 insertions(+), 36 deletions(-) >=20 > diff --git a/docs/misc/efi.pandoc b/docs/misc/efi.pandoc > index 11c1ac3346..c66b18a66b 100644 > --- a/docs/misc/efi.pandoc > +++ b/docs/misc/efi.pandoc > @@ -20,13 +20,7 @@ Xen to load the configuration file even if multiboot= modules are found. > Once built, `make install-xen` will place the resulting binary directl= y into > the EFI boot partition, provided `EFI_VENDOR` is set in the environmen= t (and > `EFI_MOUNTPOINT` is overridden as needed, should the default of `/boot= /efi` not > -match your system). When built with debug info, the binary can be quit= e large. > -Setting `INSTALL_EFI_STRIP=3D1` in the environment will cause it to be= stripped > -of debug info in the process of installing. `INSTALL_EFI_STRIP` can al= so be set > -to any combination of options suitable to pass to `strip`, in case the= default > -ones don't do. The xen.efi binary will also be installed in `/usr/lib6= 4/efi/`, > -unless `EFI_DIR` is set in the environment to override this default. T= his > -binary will not be stripped in the process. > +match your system). > =20 > The binary itself will require a configuration file (names with the `.= efi` > extension of the binary's name replaced by `.cfg`, and - until an exis= ting > diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug > index d900d926c5..58ee10ee3e 100644 > --- a/xen/Kconfig.debug > +++ b/xen/Kconfig.debug > @@ -147,12 +147,7 @@ config DEBUG_INFO > Say Y here if you want to build Xen with debug information. This > information is needed e.g. for doing crash dump analysis of the > hypervisor via the "crash" tool. > - Saying Y will increase the size of the xen-syms and xen.efi > - binaries. In case the space on the EFI boot partition is rather > - limited, you may want to install a stripped variant of xen.efi in > - the EFI boot partition (look for "INSTALL_EFI_STRIP" in > - docs/misc/efi.pandoc for more information - when not using > - "make install-xen" for installing xen.efi, stripping needs to be > - done outside the Xen build environment). > + Saying Y will increase the size of the xen-syms and xen.efi.elf > + binaries. > =20 > endmenu > diff --git a/xen/Makefile b/xen/Makefile > index ddcee8835c..605a26c181 100644 > --- a/xen/Makefile > +++ b/xen/Makefile > @@ -493,22 +493,6 @@ endif > .PHONY: _build > _build: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX) > =20 > -# Strip > -# > -# INSTALL_EFI_STRIP, if defined, will cause xen.efi to be stripped bef= ore it > -# is installed. If INSTALL_EFI_STRIP is '1', then the default option(s= ) below > -# will be used. Otherwise, INSTALL_EFI_STRIP value will be used as the= > -# option(s) to the strip command. > -ifdef INSTALL_EFI_STRIP > - > -ifeq ($(INSTALL_EFI_STRIP),1) > -efi-strip-opt :=3D --strip-debug --keep-file-symbols > -else > -efi-strip-opt :=3D $(INSTALL_EFI_STRIP) > -endif > - > -endif > - > .PHONY: _install > _install: D=3D$(DESTDIR) > _install: T=3D$(notdir $(TARGET)) > @@ -535,9 +519,6 @@ _install: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX) > ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T)-$(XEN_VERSION= ).efi; \ > ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T).efi; \ > if [ -n '$(EFI_MOUNTPOINT)' -a -n '$(EFI_VENDOR)' ]; then \ > - $(if $(efi-strip-opt), \ > - $(STRIP) $(efi-strip-opt) -p -o $(TARGET).efi.stripped $(TARGE= T).efi && \ > - $(INSTALL_DATA) $(TARGET).efi.stripped $(D)$(EFI_MOUNTPOINT)/e= fi/$(EFI_VENDOR)/$(T)-$(XEN_FULLVERSION).efi ||) \ > $(INSTALL_DATA) $(TARGET).efi $(D)$(EFI_MOUNTPOINT)/efi/$(EFI_VENDO= R)/$(T)-$(XEN_FULLVERSION).efi; \ > elif [ "$(D)" =3D "$(patsubst $(shell cd $(XEN_ROOT) && pwd)/%,%,$(D= ))" ]; then \ > echo 'EFI installation only partially done (EFI_VENDOR not set)' >&= 2; \ > diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile > index 407571c510..c118ab7b7d 100644 > --- a/xen/arch/x86/Makefile > +++ b/xen/arch/x86/Makefile > @@ -228,14 +228,17 @@ endif > $(MAKE) $(build)=3D$(@D) .$(@F).1r.o .$(@F).1s.o > $(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds $< \ > $(dot-target).1r.o $(dot-target).1s.o $(orphan-handling-y) \ > - $(note_file_option) -o $@ > - $(NM) -pa --format=3Dsysv $@ \ > + $(note_file_option) -o $@.tmp > + $(NM) -pa --format=3Dsysv $@.tmp \ > | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > > $@.map > ifeq ($(CONFIG_DEBUG_INFO),y) > - $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) -O e= lf64-x86-64 $@ $@.elf > + $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))cp -f \ > + $@.tmp $(TARGET)-syms.efi > + $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(STRIP) $@.tmp= > endif > rm -f $(dot-target).[0-9]* $(@D)/..$(@F).[0-9]* > + mv -f $@.tmp $@ > ifeq ($(CONFIG_XEN_IBT),y) > $(SHELL) $(srctree)/tools/check-endbr.sh $@ > endif Does this also strip the string table from xen.efi? I'm concerned that signing xen.efi for secure boot won't work if there is a string table. In particular, it appears that EDK2 will miscalculate the file hash if the string table is before the signature. Moving the string table after the signature invalidates the pointer to it. The only exception is if the string table is itself in a section, but I don't know if that is the case. --=20 Sincerely, Demi Marie Obenour (she/her/hers) --------------vcM0SfoOk10EZuEbrGl6yv6X Content-Type: application/pgp-keys; name="OpenPGP_0xB288B55FFF9C22C1.asc" Content-Disposition: attachment; filename="OpenPGP_0xB288B55FFF9C22C1.asc" Content-Description: OpenPGP public key Content-Transfer-Encoding: quoted-printable -----BEGIN PGP PUBLIC KEY BLOCK----- xsFNBFp+A0oBEADffj6anl9/BHhUSxGTICeVl2tob7hPDdhHNgPR4C8xlYt5q49y B+l2nipdaq+4Gk6FZfqC825TKl7eRpUjMriwle4r3R0ydSIGcy4M6eb0IcxmuPYf bWpr/si88QKgyGSVZ7GeNW1UnzTdhYHuFlk8dBSmB1fzhEYEk0RcJqg4AKoq6/3/ UorR+FaSuVwT7rqzGrTlscnTDlPWgRzrQ3jssesI7sZLm82E3pJSgaUoCdCOlL7M MPCJwI8JpPlBedRpe9tfVyfu3euTPLPxwcV3L/cfWPGSL4PofBtB8NUU6QwYiQ9H zx4xOyn67zW73/G0Q2vPPRst8LBDqlxLjbtx/WLR6h3nBc3eyuZ+q62HS1pJ5EvU T1vjyJ1ySrqtUXWQ4XlZyoEFUfpJxJoN0A9HCxmHGVckzTRl5FMWo8TCniHynNXs BtDQbabt7aNEOaAJdE7to0AH3T/Bvwzcp0ZJtBk0EM6YeMLtotUut7h2Bkg1b//r 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Wed, 05 Nov 2025 12:42:18 -0800 (PST) Message-ID: Date: Wed, 5 Nov 2025 15:42:14 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH] xen: privcmd: fix ioeventfd/ioreq crashing PV domain To: Val Packett , =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= , Stefano Stabellini , Oleksandr Tyshchenko Cc: xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org References: <20251015195713.6500-1-val@invisiblethingslab.com> <5a3660c9-1b18-4d87-a1f7-efa8d68239d8@suse.com> <7f73fdfa-2875-4349-9ef6-134e678ac691@invisiblethingslab.com> Content-Language: en-US From: Demi Marie Obenour Autocrypt: addr=demiobenour@gmail.com; keydata= xsFNBFp+A0oBEADffj6anl9/BHhUSxGTICeVl2tob7hPDdhHNgPR4C8xlYt5q49yB+l2nipd aq+4Gk6FZfqC825TKl7eRpUjMriwle4r3R0ydSIGcy4M6eb0IcxmuPYfbWpr/si88QKgyGSV Z7GeNW1UnzTdhYHuFlk8dBSmB1fzhEYEk0RcJqg4AKoq6/3/UorR+FaSuVwT7rqzGrTlscnT DlPWgRzrQ3jssesI7sZLm82E3pJSgaUoCdCOlL7MMPCJwI8JpPlBedRpe9tfVyfu3euTPLPx wcV3L/cfWPGSL4PofBtB8NUU6QwYiQ9Hzx4xOyn67zW73/G0Q2vPPRst8LBDqlxLjbtx/WLR 6h3nBc3eyuZ+q62HS1pJ5EvUT1vjyJ1ySrqtUXWQ4XlZyoEFUfpJxJoN0A9HCxmHGVckzTRl 5FMWo8TCniHynNXsBtDQbabt7aNEOaAJdE7to0AH3T/Bvwzcp0ZJtBk0EM6YeMLtotUut7h2 Bkg1b//r6bTBswMBXVJ5H44Qf0+eKeUg7whSC9qpYOzzrm7+0r9F5u3qF8ZTx55TJc2g656C 9a1P1MYVysLvkLvS4H+crmxA/i08Tc1h+x9RRvqba4lSzZ6/Tmt60DPM5Sc4R0nSm9BBff0N m0bSNRS8InXdO1Aq3362QKX2NOwcL5YaStwODNyZUqF7izjK4QARAQABzTxEZW1pIE1hcmll IE9iZW5vdXIgKGxvdmVyIG9mIGNvZGluZykgPGRlbWlvYmVub3VyQGdtYWlsLmNvbT7CwXgE EwECACIFAlp+A0oCGwMGCwkIBwMCBhUIAgkKCwQWAgMBAh4BAheAAAoJELKItV//nCLBhr8Q AK/xrb4wyi71xII2hkFBpT59ObLN+32FQT7R3lbZRjVFjc6yMUjOb1H/hJVxx+yo5gsSj5LS 9AwggioUSrcUKldfA/PKKai2mzTlUDxTcF3vKx6iMXKA6AqwAw4B57ZEJoMM6egm57TV19kz PMc879NV2nc6+elaKl+/kbVeD3qvBuEwsTe2Do3HAAdrfUG/j9erwIk6gha/Hp9yZlCnPTX+ VK+xifQqt8RtMqS5R/S8z0msJMI/ajNU03kFjOpqrYziv6OZLJ5cuKb3bZU5aoaRQRDzkFIR 6aqtFLTohTo20QywXwRa39uFaOT/0YMpNyel0kdOszFOykTEGI2u+kja35g9TkH90kkBTG+a EWttIht0Hy6YFmwjcAxisSakBuHnHuMSOiyRQLu43ej2+mDWgItLZ48Mu0C3IG1seeQDjEYP tqvyZ6bGkf2Vj+L6wLoLLIhRZxQOedqArIk/Sb2SzQYuxN44IDRt+3ZcDqsPppoKcxSyd1Ny 2tpvjYJXlfKmOYLhTWs8nwlAlSHX/c/jz/ywwf7eSvGknToo1Y0VpRtoxMaKW1nvH0OeCSVJ itfRP7YbiRVc2aNqWPCSgtqHAuVraBRbAFLKh9d2rKFB3BmynTUpc1BQLJP8+D5oNyb8Ts4x Xd3iV/uD8JLGJfYZIR7oGWFLP4uZ3tkneDfYzsFNBFp+A0oBEAC9ynZI9LU+uJkMeEJeJyQ/ 8VFkCJQPQZEsIGzOTlPnwvVna0AS86n2Z+rK7R/usYs5iJCZ55/JISWd8xD57ue0eB47bcJv VqGlObI2DEG8TwaW0O0duRhDgzMEL4t1KdRAepIESBEA/iPpI4gfUbVEIEQuqdqQyO4GAe+M kD0Hy5JH/0qgFmbaSegNTdQg5iqYjRZ3ttiswalql1/iSyv1WYeC1OAs+2BLOAT2NEggSiVO txEfgewsQtCWi8H1SoirakIfo45Hz0tk/Ad9ZWh2PvOGt97Ka85o4TLJxgJJqGEnqcFUZnJJ riwoaRIS8N2C8/nEM53jb1sH0gYddMU3QxY7dYNLIUrRKQeNkF30dK7V6JRH7pleRlf+wQcN fRAIUrNlatj9TxwivQrKnC9aIFFHEy/0mAgtrQShcMRmMgVlRoOA5B8RTulRLCmkafvwuhs6 dCxN0GNAORIVVFxjx9Vn7OqYPgwiofZ6SbEl0hgPyWBQvE85klFLZLoj7p+joDY1XNQztmfA rnJ9x+YV4igjWImINAZSlmEcYtd+xy3Li/8oeYDAqrsnrOjb+WvGhCykJk4urBog2LNtcyCj kTs7F+WeXGUo0NDhbd3Z6AyFfqeF7uJ3D5hlpX2nI9no/ugPrrTVoVZAgrrnNz0iZG2DVx46 x913pVKHl5mlYQARAQABwsFfBBgBAgAJBQJafgNKAhsMAAoJELKItV//nCLBwNIP/AiIHE8b oIqReFQyaMzxq6lE4YZCZNj65B/nkDOvodSiwfwjjVVE2V3iEzxMHbgyTCGA67+Bo/d5aQGj gn0TPtsGzelyQHipaUzEyrsceUGWYoKXYyVWKEfyh0cDfnd9diAm3VeNqchtcMpoehETH8fr RHnJdBcjf112PzQSdKC6kqU0Q196c4Vp5HDOQfNiDnTf7gZSj0BraHOByy9LEDCLhQiCmr+2 E0rW4tBtDAn2HkT9uf32ZGqJCn1O+2uVfFhGu6vPE5qkqrbSE8TG+03H8ecU2q50zgHWPdHM OBvy3EhzfAh2VmOSTcRK+tSUe/u3wdLRDPwv/DTzGI36Kgky9MsDC5gpIwNbOJP2G/q1wT1o Gkw4IXfWv2ufWiXqJ+k7HEi2N1sree7Dy9KBCqb+ca1vFhYPDJfhP75I/VnzHVssZ/rYZ9+5 1yDoUABoNdJNSGUYl+Yh9Pw9pE3Kt4EFzUlFZWbE4xKL/NPno+z4J9aWemLLszcYz/u3XnbO vUSQHSrmfOzX3cV4yfmjM5lewgSstoxGyTx2M8enslgdXhPthZlDnTnOT+C+OTsh8+m5tos8 HQjaPM01MKBiAqdPgksm1wu2DrrwUi6ChRVTUBcj6+/9IJ81H2P2gJk3Ls3AVIxIffLoY34E +MYSfkEjBz0E8CLOcAw7JIwAaeBT In-Reply-To: <7f73fdfa-2875-4349-9ef6-134e678ac691@invisiblethingslab.com> Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------G30oE370V0qo6Xm1bdPT5v58" This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------G30oE370V0qo6Xm1bdPT5v58 Content-Type: multipart/mixed; boundary="------------UVOZ4jXaoupmEQPrgEDndzIr"; protected-headers="v1" From: Demi Marie Obenour To: Val Packett , =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= , Stefano Stabellini , Oleksandr Tyshchenko Cc: xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org Message-ID: Subject: Re: [RFC PATCH] xen: privcmd: fix ioeventfd/ioreq crashing PV domain References: <20251015195713.6500-1-val@invisiblethingslab.com> <5a3660c9-1b18-4d87-a1f7-efa8d68239d8@suse.com> <7f73fdfa-2875-4349-9ef6-134e678ac691@invisiblethingslab.com> In-Reply-To: <7f73fdfa-2875-4349-9ef6-134e678ac691@invisiblethingslab.com> Autocrypt-Gossip: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== --------------UVOZ4jXaoupmEQPrgEDndzIr Content-Type: multipart/mixed; boundary="------------20sSEzjyop50utZCh8dFGMN0" --------------20sSEzjyop50utZCh8dFGMN0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On 11/4/25 20:16, Val Packett wrote: >=20 > On 11/4/25 9:15 AM, J=C3=BCrgen Gro=C3=9F wrote: >> On 15.10.25 21:57, Val Packett wrote: >>> Starting a virtio backend in a PV domain would panic the kernel in >>> alloc_ioreq, trying to dereference vma->vm_private_data as a pages >>> pointer when in reality it stayed as PRIV_VMA_LOCKED. >>> >>> Fix by allocating a pages array in mmap_resource in the PV case, >>> filling it with page info converted from the pfn array. This allows >>> ioreq to function successfully with a backend provided by a PV dom0. >>> >>> Signed-off-by: Val Packett >>> --- >>> I've been porting the xen-vhost-frontend[1] to Qubes, which runs on=20 >>> amd64 >>> and we (still) use PV for dom0. The x86 part didn't give me much=20 >>> trouble, >>> but the first thing I found was this crash due to using a PV domain=20 >>> to host >>> the backend. alloc_ioreq was dereferencing the '1' constant and=20 >>> panicking >>> the dom0 kernel. >>> >>> I figured out that I can make a pages array in the expected format=20 >>> from the >>> pfn array where the actual memory mapping happens for the PV case,=20 >>> and with >>> the fix, the ioreq part works: the vhost frontend replies to the prob= ing >>> sequence and the guest recognizes which virtio device is being provid= ed. >>> >>> I still have another thing to debug: the MMIO accesses from the inner= =20 >>> driver >>> (e.g. virtio_rng) don't get through to the vhost provider (ioeventfd = >>> does >>> not get notified), and manually kicking the eventfd from the frontend= >>> seems to crash... Xen itself?? (no Linux panic on console, just a=20 >>> freeze and >>> quick reboot - will try to set up a serial console now) >> >> IMHO for making the MMIO accesses work you'd need to implement=20 >> ioreq-server >> support for PV-domains in the hypervisor. This will be a major=20 >> endeavor, so >> before taking your Linux kernel patch I'd like to see this covered. >=20 > Sorry, I wasn't clear enough.. it's *not* that MMIO accesses don't work= =2E >=20 > I debugged this a bit more, and it turns out: >=20 > 1. the reason why "ioeventfd does not get notified" is because accessin= g=20 > the virtio page (allocated with this privcmd interface) from the kernel= =20 > was failing. The exchange between the guest driver and the userspace=20 > ioreq server has been working perfectly, but the *kernel* access (which= =20 > is what needs this `struct page` allocation with the current code) was = > returning nonsense and the check for the virtqueue readiness flag was=20 > failing. >=20 > I have noticed and fixed (locally) a bug in this patch: reusing the=20 > `pfns` allocation for `errs` in=C2=A0`xen_remap_domain_mfn_array`=C2=A0= meant that=20 > the actual pfn value was overwritten with a zero ("success" error code)= ,=20 > and that's the `pfn` I was using. >=20 > Still, the memory visible in the dom0 kernel at that pfn is not the sam= e=20 > allocation that's mapped into the process. Instead, it's some random=20 > other memory. I've added a hexdump for it in the ioeventfd notifier and= =20 > it was returning random stuff from other userspace programs such as "//= =20 > SPDX-License-Identifier" from a text editor (haha). Actually, *once* it= =20 > did just work and I've managed to attach a virtio-rng driver and have i= t=20 > fully work. >=20 > Clearly I'm just struggling with the way memory mappings work under PV.= =20 > Do I need to specifically create a second mapping for the kernel using = > the same `xen_remap_domain_mfn_array` call? >=20 > 2. the reason why "manually kicking the eventfd from the frontend seems= =20 > to crash... Xen itself" was actually because that triggered the guest=20 > interrupt and I was using the ISA interrupts that required the virtual = > (IO)APIC to exist, and it doesn't in PVH domains. For now I switched my= =20 > test setup to HVM to get around that, but I'd need to.. figure out a=20 > virq/pirq type setup to route XEN_DMOP_set_isa_irq_level calls over=20 > event channels for PV(H) guests. Still, this should return an error rather than crashing the hypervisor. --=20 Sincerely, Demi Marie Obenour (she/her/hers) --------------20sSEzjyop50utZCh8dFGMN0 Content-Type: application/pgp-keys; name="OpenPGP_0xB288B55FFF9C22C1.asc" Content-Disposition: attachment; filename="OpenPGP_0xB288B55FFF9C22C1.asc" Content-Description: OpenPGP public key Content-Transfer-Encoding: quoted-printable -----BEGIN PGP PUBLIC KEY BLOCK----- xsFNBFp+A0oBEADffj6anl9/BHhUSxGTICeVl2tob7hPDdhHNgPR4C8xlYt5q49y B+l2nipdaq+4Gk6FZfqC825TKl7eRpUjMriwle4r3R0ydSIGcy4M6eb0IcxmuPYf bWpr/si88QKgyGSVZ7GeNW1UnzTdhYHuFlk8dBSmB1fzhEYEk0RcJqg4AKoq6/3/ UorR+FaSuVwT7rqzGrTlscnTDlPWgRzrQ3jssesI7sZLm82E3pJSgaUoCdCOlL7M MPCJwI8JpPlBedRpe9tfVyfu3euTPLPxwcV3L/cfWPGSL4PofBtB8NUU6QwYiQ9H zx4xOyn67zW73/G0Q2vPPRst8LBDqlxLjbtx/WLR6h3nBc3eyuZ+q62HS1pJ5EvU T1vjyJ1ySrqtUXWQ4XlZyoEFUfpJxJoN0A9HCxmHGVckzTRl5FMWo8TCniHynNXs BtDQbabt7aNEOaAJdE7to0AH3T/Bvwzcp0ZJtBk0EM6YeMLtotUut7h2Bkg1b//r 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Date: Thu, 6 Nov 2025 02:00:09 +0000 X-Gm-Features: AWmQ_bl20FBaVdGQ73vw3BLi0C6GeqXWY0j5un7i-UTcmGdpBPlBWpvB_UriT3U Message-ID: Subject: Re: [PATCH v3] xen: Strip xen.efi by default To: Demi Marie Obenour Cc: Frediano Ziglio , xen-devel@lists.xenproject.org, Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , =?UTF-8?Q?Marek_Marczykowski=2DG=C3=B3recki?= Content-Type: text/plain; charset="UTF-8" On Wed, 5 Nov 2025 at 20:31, Demi Marie Obenour wrote: > > On 11/5/25 10:38, Frediano Ziglio wrote: > > From: Frediano Ziglio > > > > For xen.gz file we strip all symbols and have an additional > > xen-syms file version with all symbols. > > Make xen.efi more coherent stripping all symbols too. > > xen-syms.efi can be used for debugging. > > > > Signed-off-by: Frediano Ziglio > > --- > > Changes since v1: > > - avoid leaving target if some command fails. > > > > Changes since v2: > > - do not convert type but retain PE format; > > = use xen-syms.efi for new file name, more consistent with ELF. > > --- > > docs/misc/efi.pandoc | 8 +------- > > xen/Kconfig.debug | 9 ++------- > > xen/Makefile | 19 ------------------- > > xen/arch/x86/Makefile | 9 ++++++--- > > 4 files changed, 9 insertions(+), 36 deletions(-) > > > > diff --git a/docs/misc/efi.pandoc b/docs/misc/efi.pandoc > > index 11c1ac3346..c66b18a66b 100644 > > --- a/docs/misc/efi.pandoc > > +++ b/docs/misc/efi.pandoc > > @@ -20,13 +20,7 @@ Xen to load the configuration file even if multiboot modules are found. > > Once built, `make install-xen` will place the resulting binary directly into > > the EFI boot partition, provided `EFI_VENDOR` is set in the environment (and > > `EFI_MOUNTPOINT` is overridden as needed, should the default of `/boot/efi` not > > -match your system). When built with debug info, the binary can be quite large. > > -Setting `INSTALL_EFI_STRIP=1` in the environment will cause it to be stripped > > -of debug info in the process of installing. `INSTALL_EFI_STRIP` can also be set > > -to any combination of options suitable to pass to `strip`, in case the default > > -ones don't do. The xen.efi binary will also be installed in `/usr/lib64/efi/`, > > -unless `EFI_DIR` is set in the environment to override this default. This > > -binary will not be stripped in the process. > > +match your system). > > > > The binary itself will require a configuration file (names with the `.efi` > > extension of the binary's name replaced by `.cfg`, and - until an existing > > diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug > > index d900d926c5..58ee10ee3e 100644 > > --- a/xen/Kconfig.debug > > +++ b/xen/Kconfig.debug > > @@ -147,12 +147,7 @@ config DEBUG_INFO > > Say Y here if you want to build Xen with debug information. This > > information is needed e.g. for doing crash dump analysis of the > > hypervisor via the "crash" tool. > > - Saying Y will increase the size of the xen-syms and xen.efi > > - binaries. In case the space on the EFI boot partition is rather > > - limited, you may want to install a stripped variant of xen.efi in > > - the EFI boot partition (look for "INSTALL_EFI_STRIP" in > > - docs/misc/efi.pandoc for more information - when not using > > - "make install-xen" for installing xen.efi, stripping needs to be > > - done outside the Xen build environment). > > + Saying Y will increase the size of the xen-syms and xen.efi.elf > > + binaries. > > > > endmenu > > diff --git a/xen/Makefile b/xen/Makefile > > index ddcee8835c..605a26c181 100644 > > --- a/xen/Makefile > > +++ b/xen/Makefile > > @@ -493,22 +493,6 @@ endif > > .PHONY: _build > > _build: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX) > > > > -# Strip > > -# > > -# INSTALL_EFI_STRIP, if defined, will cause xen.efi to be stripped before it > > -# is installed. If INSTALL_EFI_STRIP is '1', then the default option(s) below > > -# will be used. Otherwise, INSTALL_EFI_STRIP value will be used as the > > -# option(s) to the strip command. > > -ifdef INSTALL_EFI_STRIP > > - > > -ifeq ($(INSTALL_EFI_STRIP),1) > > -efi-strip-opt := --strip-debug --keep-file-symbols > > -else > > -efi-strip-opt := $(INSTALL_EFI_STRIP) > > -endif > > - > > -endif > > - > > .PHONY: _install > > _install: D=$(DESTDIR) > > _install: T=$(notdir $(TARGET)) > > @@ -535,9 +519,6 @@ _install: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX) > > ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T)-$(XEN_VERSION).efi; \ > > ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T).efi; \ > > if [ -n '$(EFI_MOUNTPOINT)' -a -n '$(EFI_VENDOR)' ]; then \ > > - $(if $(efi-strip-opt), \ > > - $(STRIP) $(efi-strip-opt) -p -o $(TARGET).efi.stripped $(TARGET).efi && \ > > - $(INSTALL_DATA) $(TARGET).efi.stripped $(D)$(EFI_MOUNTPOINT)/efi/$(EFI_VENDOR)/$(T)-$(XEN_FULLVERSION).efi ||) \ > > $(INSTALL_DATA) $(TARGET).efi $(D)$(EFI_MOUNTPOINT)/efi/$(EFI_VENDOR)/$(T)-$(XEN_FULLVERSION).efi; \ > > elif [ "$(D)" = "$(patsubst $(shell cd $(XEN_ROOT) && pwd)/%,%,$(D))" ]; then \ > > echo 'EFI installation only partially done (EFI_VENDOR not set)' >&2; \ > > diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile > > index 407571c510..c118ab7b7d 100644 > > --- a/xen/arch/x86/Makefile > > +++ b/xen/arch/x86/Makefile > > @@ -228,14 +228,17 @@ endif > > $(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o > > $(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds $< \ > > $(dot-target).1r.o $(dot-target).1s.o $(orphan-handling-y) \ > > - $(note_file_option) -o $@ > > - $(NM) -pa --format=sysv $@ \ > > + $(note_file_option) -o $@.tmp > > + $(NM) -pa --format=sysv $@.tmp \ > > | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > > > $@.map > > ifeq ($(CONFIG_DEBUG_INFO),y) > > - $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) -O elf64-x86-64 $@ $@.elf > > + $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))cp -f \ > > + $@.tmp $(TARGET)-syms.efi > > + $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(STRIP) $@.tmp > > endif > > rm -f $(dot-target).[0-9]* $(@D)/..$(@F).[0-9]* > > + mv -f $@.tmp $@ > > ifeq ($(CONFIG_XEN_IBT),y) > > $(SHELL) $(srctree)/tools/check-endbr.sh $@ > > endif > > Does this also strip the string table from xen.efi? I'm concerned that > signing xen.efi for secure boot won't work if there is a string table. > In particular, it appears that EDK2 will miscalculate the file hash if > the string table is before the signature. Moving the string table after > the signature invalidates the pointer to it. The only exception is if > the string table is itself in a section, but I don't know if that is the > case. I don't know if the string table is stripped but I can surely confirm that signing xen.efi is working with secure boot. Frediano From xen-devel-bounces@lists.xenproject.org Thu Nov 06 03:53:20 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 03:53:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156465.1485563 (Exim 4.92) (envelope-from ) id 1vGr3Z-0001a7-Hd; Thu, 06 Nov 2025 03:53:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1156465.1485563; Thu, 06 Nov 2025 03:53:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGr3Z-0001a0-D2; Thu, 06 Nov 2025 03:53:05 +0000 Received: by outflank-mailman (input) for mailman id 1156465; Thu, 06 Nov 2025 03:53:04 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGr3Y-0001Zu-Gf for xen-devel@lists.xenproject.org; Thu, 06 Nov 2025 03:53:04 +0000 Received: from mail-yw1-x1131.google.com (mail-yw1-x1131.google.com [2607:f8b0:4864:20::1131]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 15dfa6b5-bac4-11f0-9d16-b5c5bf9af7f9; Thu, 06 Nov 2025 04:53:00 +0100 (CET) Received: by mail-yw1-x1131.google.com with SMTP id 00721157ae682-7866aca9e25so4397087b3.3 for ; Wed, 05 Nov 2025 19:52:59 -0800 (PST) Received: from [10.138.34.110] (h96-60-249-169.cncrtn.broadband.dynamic.tds.net. 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Wed, 05 Nov 2025 19:52:58 -0800 (PST) Message-ID: Date: Wed, 5 Nov 2025 22:52:53 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3] xen: Strip xen.efi by default To: Frediano Ziglio Cc: Frediano Ziglio , xen-devel@lists.xenproject.org, Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= References: <20251105153808.20278-1-frediano.ziglio@citrix.com> Content-Language: en-US From: Demi Marie Obenour Autocrypt: addr=demiobenour@gmail.com; keydata= xsFNBFp+A0oBEADffj6anl9/BHhUSxGTICeVl2tob7hPDdhHNgPR4C8xlYt5q49yB+l2nipd aq+4Gk6FZfqC825TKl7eRpUjMriwle4r3R0ydSIGcy4M6eb0IcxmuPYfbWpr/si88QKgyGSV Z7GeNW1UnzTdhYHuFlk8dBSmB1fzhEYEk0RcJqg4AKoq6/3/UorR+FaSuVwT7rqzGrTlscnT DlPWgRzrQ3jssesI7sZLm82E3pJSgaUoCdCOlL7MMPCJwI8JpPlBedRpe9tfVyfu3euTPLPx wcV3L/cfWPGSL4PofBtB8NUU6QwYiQ9Hzx4xOyn67zW73/G0Q2vPPRst8LBDqlxLjbtx/WLR 6h3nBc3eyuZ+q62HS1pJ5EvUT1vjyJ1ySrqtUXWQ4XlZyoEFUfpJxJoN0A9HCxmHGVckzTRl 5FMWo8TCniHynNXsBtDQbabt7aNEOaAJdE7to0AH3T/Bvwzcp0ZJtBk0EM6YeMLtotUut7h2 Bkg1b//r6bTBswMBXVJ5H44Qf0+eKeUg7whSC9qpYOzzrm7+0r9F5u3qF8ZTx55TJc2g656C 9a1P1MYVysLvkLvS4H+crmxA/i08Tc1h+x9RRvqba4lSzZ6/Tmt60DPM5Sc4R0nSm9BBff0N m0bSNRS8InXdO1Aq3362QKX2NOwcL5YaStwODNyZUqF7izjK4QARAQABzTxEZW1pIE1hcmll IE9iZW5vdXIgKGxvdmVyIG9mIGNvZGluZykgPGRlbWlvYmVub3VyQGdtYWlsLmNvbT7CwXgE EwECACIFAlp+A0oCGwMGCwkIBwMCBhUIAgkKCwQWAgMBAh4BAheAAAoJELKItV//nCLBhr8Q AK/xrb4wyi71xII2hkFBpT59ObLN+32FQT7R3lbZRjVFjc6yMUjOb1H/hJVxx+yo5gsSj5LS 9AwggioUSrcUKldfA/PKKai2mzTlUDxTcF3vKx6iMXKA6AqwAw4B57ZEJoMM6egm57TV19kz PMc879NV2nc6+elaKl+/kbVeD3qvBuEwsTe2Do3HAAdrfUG/j9erwIk6gha/Hp9yZlCnPTX+ VK+xifQqt8RtMqS5R/S8z0msJMI/ajNU03kFjOpqrYziv6OZLJ5cuKb3bZU5aoaRQRDzkFIR 6aqtFLTohTo20QywXwRa39uFaOT/0YMpNyel0kdOszFOykTEGI2u+kja35g9TkH90kkBTG+a EWttIht0Hy6YFmwjcAxisSakBuHnHuMSOiyRQLu43ej2+mDWgItLZ48Mu0C3IG1seeQDjEYP tqvyZ6bGkf2Vj+L6wLoLLIhRZxQOedqArIk/Sb2SzQYuxN44IDRt+3ZcDqsPppoKcxSyd1Ny 2tpvjYJXlfKmOYLhTWs8nwlAlSHX/c/jz/ywwf7eSvGknToo1Y0VpRtoxMaKW1nvH0OeCSVJ itfRP7YbiRVc2aNqWPCSgtqHAuVraBRbAFLKh9d2rKFB3BmynTUpc1BQLJP8+D5oNyb8Ts4x Xd3iV/uD8JLGJfYZIR7oGWFLP4uZ3tkneDfYzsFNBFp+A0oBEAC9ynZI9LU+uJkMeEJeJyQ/ 8VFkCJQPQZEsIGzOTlPnwvVna0AS86n2Z+rK7R/usYs5iJCZ55/JISWd8xD57ue0eB47bcJv VqGlObI2DEG8TwaW0O0duRhDgzMEL4t1KdRAepIESBEA/iPpI4gfUbVEIEQuqdqQyO4GAe+M kD0Hy5JH/0qgFmbaSegNTdQg5iqYjRZ3ttiswalql1/iSyv1WYeC1OAs+2BLOAT2NEggSiVO txEfgewsQtCWi8H1SoirakIfo45Hz0tk/Ad9ZWh2PvOGt97Ka85o4TLJxgJJqGEnqcFUZnJJ riwoaRIS8N2C8/nEM53jb1sH0gYddMU3QxY7dYNLIUrRKQeNkF30dK7V6JRH7pleRlf+wQcN fRAIUrNlatj9TxwivQrKnC9aIFFHEy/0mAgtrQShcMRmMgVlRoOA5B8RTulRLCmkafvwuhs6 dCxN0GNAORIVVFxjx9Vn7OqYPgwiofZ6SbEl0hgPyWBQvE85klFLZLoj7p+joDY1XNQztmfA rnJ9x+YV4igjWImINAZSlmEcYtd+xy3Li/8oeYDAqrsnrOjb+WvGhCykJk4urBog2LNtcyCj kTs7F+WeXGUo0NDhbd3Z6AyFfqeF7uJ3D5hlpX2nI9no/ugPrrTVoVZAgrrnNz0iZG2DVx46 x913pVKHl5mlYQARAQABwsFfBBgBAgAJBQJafgNKAhsMAAoJELKItV//nCLBwNIP/AiIHE8b oIqReFQyaMzxq6lE4YZCZNj65B/nkDOvodSiwfwjjVVE2V3iEzxMHbgyTCGA67+Bo/d5aQGj gn0TPtsGzelyQHipaUzEyrsceUGWYoKXYyVWKEfyh0cDfnd9diAm3VeNqchtcMpoehETH8fr RHnJdBcjf112PzQSdKC6kqU0Q196c4Vp5HDOQfNiDnTf7gZSj0BraHOByy9LEDCLhQiCmr+2 E0rW4tBtDAn2HkT9uf32ZGqJCn1O+2uVfFhGu6vPE5qkqrbSE8TG+03H8ecU2q50zgHWPdHM OBvy3EhzfAh2VmOSTcRK+tSUe/u3wdLRDPwv/DTzGI36Kgky9MsDC5gpIwNbOJP2G/q1wT1o Gkw4IXfWv2ufWiXqJ+k7HEi2N1sree7Dy9KBCqb+ca1vFhYPDJfhP75I/VnzHVssZ/rYZ9+5 1yDoUABoNdJNSGUYl+Yh9Pw9pE3Kt4EFzUlFZWbE4xKL/NPno+z4J9aWemLLszcYz/u3XnbO vUSQHSrmfOzX3cV4yfmjM5lewgSstoxGyTx2M8enslgdXhPthZlDnTnOT+C+OTsh8+m5tos8 HQjaPM01MKBiAqdPgksm1wu2DrrwUi6ChRVTUBcj6+/9IJ81H2P2gJk3Ls3AVIxIffLoY34E +MYSfkEjBz0E8CLOcAw7JIwAaeBT In-Reply-To: Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------qPsqJNqieQCjtx4cay7y0hHE" This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------qPsqJNqieQCjtx4cay7y0hHE Content-Type: multipart/mixed; boundary="------------ngzAjT7nKab9hPVA2HBdk0Hi"; protected-headers="v1" From: Demi Marie Obenour To: Frediano Ziglio Cc: Frediano Ziglio , xen-devel@lists.xenproject.org, Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= Message-ID: Subject: Re: [PATCH v3] xen: Strip xen.efi by default References: <20251105153808.20278-1-frediano.ziglio@citrix.com> In-Reply-To: Autocrypt-Gossip: addr=marmarek@invisiblethingslab.com; keydata= xsBNBE5j9EwBCACbYHjxDrxFAY3n1x9KBFvjzkG1qFSTVBnH4vpD/5Na4sZq4uDDMUCjivrm MzbWYaivYj96BygdOiw7PWxYrhuW0b2WYOeGudZyApgFz42g458s78EciuhgfuWBlxr8dOEN /9ueVFHcvtZmDbHhMVPcQ0O7gwh0JmwkOsf7P7WAfYXsQlhO/EBRrNXR0Je+GEpYADhRktxX h1d3Iz+oKYuwHioLX8ovoAT4+peOuecWUSpUWebpDbTR5i7NRP3PIblB4KzWJa2kh/f3mx4v SRGnHn+BfX42xSe0X7Ktl4Xf+KNq9Wkcjk2CZP57hV2v4pO0ZUOXD7IhlZtnfNj67WjdABEB AAHNPU1hcmVrIE1hcmN6eWtvd3NraS1Hw7NyZWNraSA8bWFybWFyZWtAaW52aXNpYmxldGhp bmdzbGFiLmNvbT7CwHoEEwEIACQCGwMFCwkIBwMFFQoJCAsFFgIDAQACHgECF4AFAll+l7cC GQEACgkQ24/THMrX1yw6kAgAiKiUhzAPXZj5ndqiQDl8u8PUK34SupLzYNMJOCBw5Wh+CPHe XYlQUwfULWxmzjiWCzzWDx2X/ONsYdRGKDKMqG5srOSWe1IYXv00MEutGsK+m/hmC5mqi/97 DVNZ1VtKj5WW79IsI0/7ueHsQYNNrXyOfZvKsRE8VIUJ0tNfLFDFlNpq9jONuF+GviMWxrA5 FoVaGmjh63xC0fOQYqhP2v8dbYS4B6bO5NZKI2cTHb9Li2iY0e7wIoNgvqgtR3Iv2U2Ry0yL D3mNQhwyxcWChexlymjfqLEZwKqaIOo57HOpt7OA+bMg6MvkdUTjNWf2GE6fqCcALjcToJ3L NDc1KM7ATQROY/RMAQgAtRWgUZ5mOy+c/qzmiVnxqDkiOJjmnIh3Pn+OqCtjcrTyPI9eVc06 uH30Jkco0soLiG/UgwVw4XwBlm95j9n6TSUms4mPBh1YiR1hBjsjYwn8zp/Ue9xWk1N6E14H aj55GxmS2H3YIlOXfQLr0X3RHsmKixTOKyisrYlJu71FmettDFV7CgMXy1Bc1LbAE08asvAS ShHFdRiRRtkuVHvY/Ebq9L54kOxtlI6ahrflMcT0YCMON5oe4GgQRh3p2uy+d/LS2bgRcQST IebErj8x0lM271f97GvxV/ypHo7XVIDI5FX1u31Agzx3HQr035GHt4HV4/GVCz+V4xt4BonB tQARAQABwsBfBBgBAgAJBQJOY/RMAhsMAAoJENuP0xzK19cs5MgH/jWLXil2Ud4TdtWnBxc+ 2/QZZk2JCssc1PgWNzvH5wH7U+8lGSlUK8ZMOqrrF8C5rX0+xEn7deSrsZChIOnUFo8rhCZK y/mBV+FhkMj24FZZ0n8w3eF4KF2t68Pt+AvMjxQHwxAMdf3QftgQhD0qYkt/28eedUQ+jwz6 kipc4qUQmqTEViQRPa3WAnKgNDQUDUwNruzthfGvHUjllf7zbPI8gkbARM0KlTkLikc9u+Ni VMbJTiGPB7YHyw2MIPq1n+mhSPAyXE6CVBnYkonQ7P3SLZssxC3PIarV+DTU68umQB3pfrfF 7hMcAY5csWrK9/x/Zz4RUfgN6Q3HLrSp9UQ= --------------ngzAjT7nKab9hPVA2HBdk0Hi Content-Type: multipart/mixed; boundary="------------oeH8nn2cjImXFcgr9yBH0QBB" --------------oeH8nn2cjImXFcgr9yBH0QBB Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On 11/5/25 21:00, Frediano Ziglio wrote: > On Wed, 5 Nov 2025 at 20:31, Demi Marie Obenour = wrote: >> >> On 11/5/25 10:38, Frediano Ziglio wrote: >>> From: Frediano Ziglio >>> >>> For xen.gz file we strip all symbols and have an additional >>> xen-syms file version with all symbols. >>> Make xen.efi more coherent stripping all symbols too. >>> xen-syms.efi can be used for debugging. >>> >>> Signed-off-by: Frediano Ziglio >>> --- >>> Changes since v1: >>> - avoid leaving target if some command fails. >>> >>> Changes since v2: >>> - do not convert type but retain PE format; >>> =3D use xen-syms.efi for new file name, more consistent with ELF. >>> --- >>> docs/misc/efi.pandoc | 8 +------- >>> xen/Kconfig.debug | 9 ++------- >>> xen/Makefile | 19 ------------------- >>> xen/arch/x86/Makefile | 9 ++++++--- >>> 4 files changed, 9 insertions(+), 36 deletions(-) >>> >>> diff --git a/docs/misc/efi.pandoc b/docs/misc/efi.pandoc >>> index 11c1ac3346..c66b18a66b 100644 >>> --- a/docs/misc/efi.pandoc >>> +++ b/docs/misc/efi.pandoc >>> @@ -20,13 +20,7 @@ Xen to load the configuration file even if multibo= ot modules are found. >>> Once built, `make install-xen` will place the resulting binary direc= tly into >>> the EFI boot partition, provided `EFI_VENDOR` is set in the environm= ent (and >>> `EFI_MOUNTPOINT` is overridden as needed, should the default of `/bo= ot/efi` not >>> -match your system). When built with debug info, the binary can be qu= ite large. >>> -Setting `INSTALL_EFI_STRIP=3D1` in the environment will cause it to = be stripped >>> -of debug info in the process of installing. `INSTALL_EFI_STRIP` can = also be set >>> -to any combination of options suitable to pass to `strip`, in case t= he default >>> -ones don't do. The xen.efi binary will also be installed in `/usr/li= b64/efi/`, >>> -unless `EFI_DIR` is set in the environment to override this default.= This >>> -binary will not be stripped in the process. >>> +match your system). >>> >>> The binary itself will require a configuration file (names with the = `.efi` >>> extension of the binary's name replaced by `.cfg`, and - until an ex= isting >>> diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug >>> index d900d926c5..58ee10ee3e 100644 >>> --- a/xen/Kconfig.debug >>> +++ b/xen/Kconfig.debug >>> @@ -147,12 +147,7 @@ config DEBUG_INFO >>> Say Y here if you want to build Xen with debug information. T= his >>> information is needed e.g. for doing crash dump analysis of t= he >>> hypervisor via the "crash" tool. >>> - Saying Y will increase the size of the xen-syms and xen.efi >>> - binaries. In case the space on the EFI boot partition is rath= er >>> - limited, you may want to install a stripped variant of xen.ef= i in >>> - the EFI boot partition (look for "INSTALL_EFI_STRIP" in >>> - docs/misc/efi.pandoc for more information - when not using >>> - "make install-xen" for installing xen.efi, stripping needs to= be >>> - done outside the Xen build environment). >>> + Saying Y will increase the size of the xen-syms and xen.efi.e= lf >>> + binaries. >>> >>> endmenu >>> diff --git a/xen/Makefile b/xen/Makefile >>> index ddcee8835c..605a26c181 100644 >>> --- a/xen/Makefile >>> +++ b/xen/Makefile >>> @@ -493,22 +493,6 @@ endif >>> .PHONY: _build >>> _build: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX) >>> >>> -# Strip >>> -# >>> -# INSTALL_EFI_STRIP, if defined, will cause xen.efi to be stripped b= efore it >>> -# is installed. If INSTALL_EFI_STRIP is '1', then the default option= (s) below >>> -# will be used. Otherwise, INSTALL_EFI_STRIP value will be used as t= he >>> -# option(s) to the strip command. >>> -ifdef INSTALL_EFI_STRIP >>> - >>> -ifeq ($(INSTALL_EFI_STRIP),1) >>> -efi-strip-opt :=3D --strip-debug --keep-file-symbols >>> -else >>> -efi-strip-opt :=3D $(INSTALL_EFI_STRIP) >>> -endif >>> - >>> -endif >>> - >>> .PHONY: _install >>> _install: D=3D$(DESTDIR) >>> _install: T=3D$(notdir $(TARGET)) >>> @@ -535,9 +519,6 @@ _install: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX) >>> ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T)-= $(XEN_VERSION).efi; \ >>> ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T).= efi; \ >>> if [ -n '$(EFI_MOUNTPOINT)' -a -n '$(EFI_VENDOR)' ]; th= en \ >>> - $(if $(efi-strip-opt), \ >>> - $(STRIP) $(efi-strip-opt) -p -o $(TARGET).= efi.stripped $(TARGET).efi && \ >>> - $(INSTALL_DATA) $(TARGET).efi.stripped $(D= )$(EFI_MOUNTPOINT)/efi/$(EFI_VENDOR)/$(T)-$(XEN_FULLVERSION).efi ||) \ >>> $(INSTALL_DATA) $(TARGET).efi $(D)$(EFI_MOUNTPO= INT)/efi/$(EFI_VENDOR)/$(T)-$(XEN_FULLVERSION).efi; \ >>> elif [ "$(D)" =3D "$(patsubst $(shell cd $(XEN_ROOT) &&= pwd)/%,%,$(D))" ]; then \ >>> echo 'EFI installation only partially done (EFI= _VENDOR not set)' >&2; \ >>> diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile >>> index 407571c510..c118ab7b7d 100644 >>> --- a/xen/arch/x86/Makefile >>> +++ b/xen/arch/x86/Makefile >>> @@ -228,14 +228,17 @@ endif >>> $(MAKE) $(build)=3D$(@D) .$(@F).1r.o .$(@F).1s.o >>> $(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds $< \ >>> $(dot-target).1r.o $(dot-target).1s.o $(orphan-handling-y= ) \ >>> - $(note_file_option) -o $@ >>> - $(NM) -pa --format=3Dsysv $@ \ >>> + $(note_file_option) -o $@.tmp >>> + $(NM) -pa --format=3Dsysv $@.tmp \ >>> | $(objtree)/tools/symbols --all-symbols --xensyms --sy= sv --sort \ >>> > $@.map >>> ifeq ($(CONFIG_DEBUG_INFO),y) >>> - $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY= ) -O elf64-x86-64 $@ $@.elf >>> + $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))cp -f \ >>> + $@.tmp $(TARGET)-syms.efi >>> + $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(STRIP) = $@.tmp >>> endif >>> rm -f $(dot-target).[0-9]* $(@D)/..$(@F).[0-9]* >>> + mv -f $@.tmp $@ >>> ifeq ($(CONFIG_XEN_IBT),y) >>> $(SHELL) $(srctree)/tools/check-endbr.sh $@ >>> endif >> >> Does this also strip the string table from xen.efi? I'm concerned tha= t >> signing xen.efi for secure boot won't work if there is a string table.= >> In particular, it appears that EDK2 will miscalculate the file hash if= >> the string table is before the signature. Moving the string table aft= er >> the signature invalidates the pointer to it. The only exception is if= >> the string table is itself in a section, but I don't know if that is t= he >> case. >=20 > I don't know if the string table is stripped but I can surely confirm > that signing xen.efi is working with secure boot. >=20 > Frediano Does objdump on the signed file return correct section names? --=20 Sincerely, Demi Marie Obenour (she/her/hers) --------------oeH8nn2cjImXFcgr9yBH0QBB Content-Type: application/pgp-keys; name="OpenPGP_0xB288B55FFF9C22C1.asc" Content-Disposition: attachment; filename="OpenPGP_0xB288B55FFF9C22C1.asc" Content-Description: OpenPGP public key Content-Transfer-Encoding: quoted-printable -----BEGIN PGP PUBLIC KEY BLOCK----- xsFNBFp+A0oBEADffj6anl9/BHhUSxGTICeVl2tob7hPDdhHNgPR4C8xlYt5q49y B+l2nipdaq+4Gk6FZfqC825TKl7eRpUjMriwle4r3R0ydSIGcy4M6eb0IcxmuPYf bWpr/si88QKgyGSVZ7GeNW1UnzTdhYHuFlk8dBSmB1fzhEYEk0RcJqg4AKoq6/3/ UorR+FaSuVwT7rqzGrTlscnTDlPWgRzrQ3jssesI7sZLm82E3pJSgaUoCdCOlL7M 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--------------oeH8nn2cjImXFcgr9yBH0QBB-- --------------ngzAjT7nKab9hPVA2HBdk0Hi-- --------------qPsqJNqieQCjtx4cay7y0hHE Content-Type: application/pgp-signature; name="OpenPGP_signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="OpenPGP_signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAEBCgAdFiEEopQtqVJW1aeuo9/sszaHOrMp8lMFAmkMG5YACgkQszaHOrMp 8lPuQg/+OktjD69Tyq2MEjXXcKBBmLsM8s49hL1N/8xw2d9SWmBTxwet0+eNhvQF Pq9DHELZRn4gVwtqZfgDgSElQn7P1djxnsvLLVxL+S9VCqt3cYw+ILsdhUwp8Wgj oMUwtbjcVWss8QwrvYwSgiuaNWeNeg+EDcwqVu5v2A0F9/X9iAAUT5nEPGv3Fcvg Mq0dF6UT8w8x1TKqYHxPcB2ubDTtesnsZS9TPFOyLdIEKGTK9d+QoLloWX1H01tX r7cPpe0HneVDZl4StfMXyKgl0SgqPzUNs4biaV3xfysQcb6eeBnfjBppOJpJu5cT CKSHPXqWJjVnlFvpH2OqIzjyrms95YQVbhwX0K4UNsZA7Mzihc4YR/d6XnEBkLro /XpZ6nPspH6zs92zUkueMHRf7U8ZIEi0qF/8Lhy9i+pay1cN91daM0PVO1Tfpmg6 vL6qzyOU87QFkrYvyiDupT+G4cUmYVnwRv2lH5dk4OXPrehhe88VtICTo1pv+xTK FCxnmx3/GOxf2eXFcxwzC1AgP0J7JLPJpSjBA/WxL1QBOoUappDdLTXH4aW3CY0H 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Smith" , Bertrand Marquis , Volodymyr Babchuk , Timothy Pearson , "xen-devel@lists.xenproject.org" References: <3baba476-9d64-4619-b391-4afcc5fd7dba@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <3baba476-9d64-4619-b391-4afcc5fd7dba@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 05.11.2025 12:33, Oleksii Kurochko wrote: > > On 10/30/25 1:10 PM, Jan Beulich wrote: >> Arm's arch_domain_soft_reset() returning -ENOSYS is quite unhelpful: This >> way a domain will be crashed if a tool stack mistakenly invokes >> XEN_DOMCTL_soft_reset on it. Instead the tool stack should be told of its >> mistake. >> >> Introduce HAS_SOFT_RESET, implied only by x86. "imply" rather than >> "select" such that HAS_SOFT_RESET can later gain a dependency on >> MGMT_HYPERCALLS. That way HAS_SOFT_RESET will go off when >> MGMT_HYPERCALLS is off. >> >> Check the new setting early in domctl handling, and compile out the thus >> dead (when HAS_SOFT_RESET=n) domain_soft_reset() as well as its dedicated >> helpers. >> >> Signed-off-by: Jan Beulich > > LGTM: > > Reviewed-by: Oleksii Kurochko Thanks, but one remark: Here as well as in your release-acks, can you please get used to inserting a blank ahead of the opening angle bracket? Roger had asked (me, not you) about its absence too, the other day. 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Smith" , Bertrand Marquis , Volodymyr Babchuk , Timothy Pearson , Oleksii Kurochko , Dmytro Prokopchuk1 , milan_djokic@epam.com, Sergiy Kibrik , "xen-devel@lists.xenproject.org" References: <40609db8-ea7d-4866-b7b2-d9647c64d512@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <40609db8-ea7d-4866-b7b2-d9647c64d512@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 31.10.2025 14:08, Grygorii Strashko wrote: > Hi Jan, > > On 30.10.25 14:10, Jan Beulich wrote: >> Arm's arch_domain_soft_reset() returning -ENOSYS is quite unhelpful: This >> way a domain will be crashed if a tool stack mistakenly invokes >> XEN_DOMCTL_soft_reset on it. Instead the tool stack should be told of its >> mistake. >> >> Introduce HAS_SOFT_RESET, implied only by x86. "imply" rather than >> "select" such that HAS_SOFT_RESET can later gain a dependency on >> MGMT_HYPERCALLS. That way HAS_SOFT_RESET will go off when >> MGMT_HYPERCALLS is off. >> >> Check the new setting early in domctl handling, and compile out the thus >> dead (when HAS_SOFT_RESET=n) domain_soft_reset() as well as its dedicated >> helpers. >> >> Signed-off-by: Jan Beulich >> > > Thank you for your patch. > > Reviewed-by: Grygorii Strashko Thanks. > But one question - soft_reset is applicable for domain, so wouldn't it > be better to note that in Kconfig option name: > > HAS_DOMAIN_SOFT_RESET I thought that "soft reset" is (going to remain) pretty unambiguous without the "domain". If (in particular) other REST maintainers think differently, I'm open to change the name. Generally my aim is to prefer reasonably short names for variables and alike, as long as no ambiguity arises. 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Thu, 06 Nov 2025 00:14:26 -0800 (PST) Message-ID: <2bfd6ba0-e793-4f19-a7c2-19ff5aee0fe0@suse.com> Date: Thu, 6 Nov 2025 09:14:29 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH for-4.22 v2 2/3] x86/platform: Expose DTS sensors MSR To: Teddy Astie Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org References: <1001287258cf9652c749c66c6565478085a8657c.1761752801.git.teddy.astie@vates.tech> <22e53531-73e4-40e9-a45e-2c5f59852ce4@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 03.11.2025 15:30, Teddy Astie wrote: > Le 30/10/2025 à 14:54, Jan Beulich a écrit : >> On 29.10.2025 16:59, Teddy Astie wrote: >> I'd also like to note that unlike the two THERM_STATUS, MSR_TEMPERATURE_TARGET >> (as per the absence if an IA32 infix in the SDM) isn't an architectural MSR, >> and hence I'm not entirely convinced we can "blindly" expose it. (Interestingly >> in Linux code there is an IA32 infix.) > > We only perform rdmsr_safe on this MSR, so I don't think there is much > problem with it as I don't expect Intel to reuse this MSR number for > something else (at worst, it is going to not be implemented and would > gracefully fail). > > Some parts of this MSR slightly change, but the one (tjmax) that is > interesting in here is consistent across the architectures. Perhaps it's indeed okay here, but the aspect needs calling out / justifying in the description. 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Thu, 06 Nov 2025 00:17:42 -0800 (PST) Message-ID: Date: Thu, 6 Nov 2025 09:17:45 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH for-4.22] x86/hvm: Introduce force_x2apic flag To: Teddy Astie Cc: Anthony PERARD , Juergen Gross , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Oleksii Kurochko , xen-devel@lists.xenproject.org References: <5f62bd09-5e3f-4db7-901e-eb8c8a3763f5@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <5f62bd09-5e3f-4db7-901e-eb8c8a3763f5@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 31.10.2025 15:33, Teddy Astie wrote: > Le 30/10/2025 à 08:56, Jan Beulich a écrit : >> On 29.10.2025 19:26, Teddy Astie wrote: >>> --- a/xen/arch/x86/hvm/vlapic.c >>> +++ b/xen/arch/x86/hvm/vlapic.c >>> @@ -1116,6 +1116,20 @@ int guest_wrmsr_apic_base(struct vcpu *v, uint64_t val) >>> if ( !has_vlapic(v->domain) ) >>> return X86EMUL_EXCEPTION; >>> >>> + if ( has_force_x2apic(v->domain) ) >>> + { >>> + /* >>> + * We implement the same semantics as MSR_IA32_XAPIC_DISABLE_STATUS: >>> + * LEGACY_XAPIC_DISABLED which rejects any attempt at clearing >>> + * IA32_APIC_BASE.EXTD, thus forcing the LAPIC in x2APIC mode. >>> + */ >> >> The MSR aspect should be implemented by using the MSR. Beyond that imo our treatment >> shouldn't be different from that when firmware pre-enables x2APIC: While not >> advisable, aiui OSes could still switch back to xAPIC mode. At which point the guest >> config level control may also want calling "pre-enable", not "force". >> > > One advantage of forcing x2APIC enabled is that it simplifies the > support for LAPIC IDs over 255. > > While that could be a alternative to just pre-enable x2apic (in cases we > don't want the OS to use xAPIC because it is there), things still gets > tricky for supporting more vCPUs. We would need to clarify the behavior > of enabling xAPIC on a vCPU that has LAPIC_ID > 254, Intel and AMD > specification don't define anything aside for Intel : >> If a BIOS transfers control to OS in xAPIC mode, then the BIOS must ensure that only logical processors with >> CPUID.0BH.EDX value less than 255 are enabled. Well, this falls into the much wider topic of making more than 128 vCPU-s available for HVM / PVH, doesn't it? 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Thu, 06 Nov 2025 00:39:46 -0800 (PST) Message-ID: <37ac4dce-e61c-46a7-9e55-410fbda843e8@suse.com> Date: Thu, 6 Nov 2025 09:39:49 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 for-4.21 0/2] x86/AMD: deal with RDSEED issues To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Oleksii Kurochko References: <272093dc-c97c-434a-9977-ad1c26e7e229@suse.com> <68e28e41-e835-4985-80a3-6a99b3d7dc3e@suse.com> <8c7881d9-5959-41b5-865d-d61199ac7a44@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 31.10.2025 14:15, Roger Pau Monné wrote: > On Fri, Oct 31, 2025 at 01:34:55PM +0100, Jan Beulich wrote: >> On 31.10.2025 13:14, Roger Pau Monné wrote: >>> On Fri, Oct 31, 2025 at 12:47:51PM +0100, Jan Beulich wrote: >>>> On 31.10.2025 11:54, Roger Pau Monné wrote: >>>>> On Fri, Oct 31, 2025 at 11:29:44AM +0100, Jan Beulich wrote: >>>>>> On 31.10.2025 11:22, Roger Pau Monné wrote: >>>>>>> On Tue, Oct 28, 2025 at 04:32:17PM +0100, Jan Beulich wrote: >>>>>>>> Both patches also want 'x86/CPU: extend is_forced_cpu_cap()'s "reach"' in >>>>>>>> place. >>>>>>>> >>>>>>>> 1: disable RDSEED on Fam17 model 47 stepping 0 >>>>>>>> 2: disable RDSEED on most of Zen5 >>>>>>> >>>>>>> For both patches: don't we need to set the feature in the max policy >>>>>>> to allow for incoming migrations of guests that have already seen the >>>>>>> feature? >>>>>> >>>>>> No, such guests should not run on affected hosts (unless overrides are in place), >>>>>> or else they'd face sudden malfunction of RDSEED. If an override was in place on >>>>>> the source host, an override will also need to be put in place on the destination >>>>>> one. >>>>> >>>>> But they may be malfunctioning before already, if started on a >>>>> vulnerable hosts without this fix and having seen RDSEED? >>>> >>>> Yes. But there could also be ones coming from good hosts. Imo ... >>>> >>>>> IMO after this fix is applied you should do pool leveling, at which >>>>> point RDSEED shouldn't be advertised anymore. Having the feature in >>>>> the max policy allows to evacuate running guests while updating the >>>>> pool. Otherwise those existing guests would be stuck to run on >>>>> non-updated hosts. >>>> >>>> ... we need to err on the side of caution. >>> >>> While I understand your concerns, this would cause failures in the >>> upgrade and migration model used by both XCP-ng and XenServer at >>> least, as it could prevent eviction of running VMs to updated hosts. >>> >>> At a minimum we would need an option to allow the feature to be set on >>> the max policy. >> >> That's where the 3rd patch comes into play. "cpuid=rdseed" is the respective >> override. Just that it doesn't work correctly without that further patch. > > Won't using "cpuid=rdseed" in the Xen command line result in RDSEED > getting exposed in the default policy also, which we want to avoid? > > Or am I getting confused on where "cpuid=rdseed" should be used? No, there's no way here to get max but not default. >>> Overall I think safety of migration (in this specific >>> regard) should be enforced by the toolstack (or orchestration layer), >>> rather than the hypervisor itself. The hypervisor can reject >>> incompatible policies, but should leave the rest of the decisions to >>> higher layers as it doesn't have enough knowledge. >> >> But without rendering guests vulnerable behind the admin's back. > > I think that's part of the logic that should be implemented by the > orchestration layer, simply because it has all the data to make an > informed decision. IMO it won't be behind the admin's back, or else > it's a bug in the higher layer toolstack. I fear I simply don't see aspects like this to be exposed to a toolstack. We didn't for RDRAND. > Not putting rdseed in the max policy completely blocks the upgrade > path, even when a toolstack is possibly making the right informed > decisions. > > I guess I need to see that 3rd patch. https://lists.xen.org/archives/html/xen-devel/2025-08/msg00113.html Jan From xen-devel-bounces@lists.xenproject.org Thu Nov 06 08:49:52 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 08:49:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156583.1485621 (Exim 4.92) (envelope-from ) id 1vGvgh-0004pI-NH; Thu, 06 Nov 2025 08:49:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1156583.1485621; Thu, 06 Nov 2025 08:49:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGvgh-0004pB-KP; Thu, 06 Nov 2025 08:49:47 +0000 Received: by outflank-mailman (input) for mailman id 1156583; Thu, 06 Nov 2025 08:49:45 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGvgf-0004p5-OT for xen-devel@lists.xenproject.org; Thu, 06 Nov 2025 08:49:45 +0000 Received: from mail-ej1-x62e.google.com (mail-ej1-x62e.google.com [2a00:1450:4864:20::62e]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 89bfd3cd-baed-11f0-980a-7dc792cee155; Thu, 06 Nov 2025 09:49:43 +0100 (CET) Received: by mail-ej1-x62e.google.com with SMTP id a640c23a62f3a-b70fb7b531cso121761366b.2 for ; Thu, 06 Nov 2025 00:49:43 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 06 Nov 2025 00:49:42 -0800 (PST) Message-ID: Date: Thu, 6 Nov 2025 09:49:45 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 for-4.21 0/2] x86/AMD: deal with RDSEED issues To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Oleksii Kurochko , "xen-devel@lists.xenproject.org" References: <272093dc-c97c-434a-9977-ad1c26e7e229@suse.com> <211906a8-7804-42c6-805c-572b4f673322@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <211906a8-7804-42c6-805c-572b4f673322@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 03.11.2025 15:10, Andrew Cooper wrote: > On 28/10/2025 3:32 pm, Jan Beulich wrote: >> Both patches also want 'x86/CPU: extend is_forced_cpu_cap()'s "reach"' in >> place. >> >> 1: disable RDSEED on Fam17 model 47 stepping 0 >> 2: disable RDSEED on most of Zen5 > > We have two existing cases for RDRAND issues in Xen: > > 1) IvyBridge SRBDS speculative vulnerability.  Here, the RNG is good, > but use of the RDRAND instruction can allow another entity on the system > to observe the random number.  RDRAND is off by default, but can be > opted in to. > > 2) AMD Fam15/16h Laptop.  Here, the RNG is fine, except after S3 on one > single OEM.  Use of RDRAND can be activated on the command line, but > there's no ability for individual VMs to opt in.  Being a laptop, > migration isn't a major concern. > > > For this seres about RDSEED, we've got: > > 1) Cyan Skillfish, the PlayStation 5 CPU but also in one crypto-mining > rig.  Here, RDSEED is deterministically broken and not getting a fix. > > The chances of Xen running on these systems is almost 0.  We should turn > off RDSEED and be done with it; it's not interesting in the slightest to > be able to turn back on. I disagree to some degree, but the code to allow re-enabling can certainly be moved to the other patch. I don't view it as wrong to have it in the 1st patch, though. > 2) Zen5.  Here, RDSEED gives a higher-than-expected rate of 0's for only > the 32bit and 16bit forms; the 64bit form is unaffected. > > There is microcode to fix it, on server at least.  Firmware fixes for > client are rather further away.  64bit OSes are likely fine (using the > 64bit instruction form).  Some Linux devs think that Linux would be safe > even using the 32bit form, if it really only has a 10% zeroes rate. 10% is a lot. IOW I find this dubious. > There is certainly a risk that software uses the 32b/16b forms, and not > mix it properly with other entropy, but the common case these days (64b) > works just fine.  This means that blanket-disabling does more harm than > good. That's guesswork. I don't see why 64-bit OSes should be expected to prefer the 64-bit form over the 32-bit one. In fact, if one only needs 32 bits of entropy, why would one even try to get 64? That's wasting a potentially precious resource. Furthermore mind me mentioning (again) that 32-bit OSes (including 32-bit environments that may be active during boot) have no way of using the 64- bit form? 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Thu, 06 Nov 2025 00:54:58 -0800 (PST) Message-ID: Date: Thu, 6 Nov 2025 09:55:01 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 for-4.21 0/2] x86/AMD: deal with RDSEED issues To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Oleksii Kurochko References: <272093dc-c97c-434a-9977-ad1c26e7e229@suse.com> <68e28e41-e835-4985-80a3-6a99b3d7dc3e@suse.com> <8c7881d9-5959-41b5-865d-d61199ac7a44@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 31.10.2025 14:15, Roger Pau Monné wrote: > Not putting rdseed in the max policy completely blocks the upgrade > path, even when a toolstack is possibly making the right informed > decisions. Why would that be? To evacuate guests, one would force-enable RDSEED on an affected host. After updating of the original host (incl fixed ucode), migrating back will be fine. The admin will thus be fully aware of where guests run unsafely, while no un-safety is going to be introduced behind the back of the admin and/or any guest. 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Thu, 06 Nov 2025 01:34:24 -0800 (PST) Message-ID: Date: Thu, 6 Nov 2025 10:34:27 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] kconfig: remove references to docs/misc/kconfig{,-language}.txt files To: Dmytro Prokopchuk1 Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , "xen-devel@lists.xenproject.org" References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 31.10.2025 14:24, Dmytro Prokopchuk1 wrote: > These files 'docs/misc/kconfig{,-language}.txt' were deleted, but > references are still present in Xen. Remove them to clean-up. > > Fixes: 044503f61c95 ("docs: Delete kconfig docs to fix licensing violation") > Fixes: f80fe2b34f08 ("xen: Update Kconfig to Linux v5.4") > Signed-off-by: Dmytro Prokopchuk Acked-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Thu Nov 06 09:36:29 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 09:36:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156622.1485652 (Exim 4.92) (envelope-from ) id 1vGwPs-0003ro-Ix; Thu, 06 Nov 2025 09:36:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1156622.1485652; Thu, 06 Nov 2025 09:36:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGwPs-0003rh-Fv; Thu, 06 Nov 2025 09:36:28 +0000 Received: by outflank-mailman (input) for mailman id 1156622; Thu, 06 Nov 2025 09:36:26 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGwPq-0003ra-R7 for xen-devel@lists.xenproject.org; Thu, 06 Nov 2025 09:36:26 +0000 Received: from mail-ed1-x52e.google.com (mail-ed1-x52e.google.com [2a00:1450:4864:20::52e]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 10619ef7-baf4-11f0-9d17-b5c5bf9af7f9; Thu, 06 Nov 2025 10:36:26 +0100 (CET) Received: by mail-ed1-x52e.google.com with SMTP id 4fb4d7f45d1cf-640b06fa959so1273498a12.3 for ; Thu, 06 Nov 2025 01:36:25 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 06 Nov 2025 01:36:25 -0800 (PST) Message-ID: Date: Thu, 6 Nov 2025 10:36:28 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] misra: address Rule 11.3 in spin_unlock_common() To: Andrew Cooper , Dmytro Prokopchuk1 Cc: Alistair Francis , Bob Eshleman , Connor Davis , Oleksii Kurochko , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , "xen-devel@lists.xenproject.org" References: <812bf5574cb44727c561e0ebc3a54848823ed490.1762163173.git.dmytro_prokopchuk1@epam.com> <7fb6ca46-3806-4aa5-a642-28384d6b944c@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <7fb6ca46-3806-4aa5-a642-28384d6b944c@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 03.11.2025 12:26, Andrew Cooper wrote: > On 03/11/2025 10:11 am, Dmytro Prokopchuk1 wrote: >> diff --git a/xen/common/spinlock.c b/xen/common/spinlock.c >> index 0389293b09..d9dc9998e6 100644 >> --- a/xen/common/spinlock.c >> +++ b/xen/common/spinlock.c >> @@ -367,7 +367,8 @@ static void always_inline spin_unlock_common(spinlock_tickets_t *t, >> LOCK_PROFILE_REL; >> rel_lock(debug); >> arch_lock_release_barrier(); >> - add_sized(&t->head, 1); >> + BUILD_BUG_ON(sizeof(t->head) != sizeof(uint16_t)); >> + add_u16_sized(&t->head, 1); > > This is an example where MISRA's opinions actively making the logic less > safe. > > It's not possible for add_sized() to use the wrong type (as it > calculates it internally), whereas it's quite possible to update the > BUILD_BUG_ON() and fail to adjust the add. > > Specifically, you've made it more complicated to reason about, and > created an opportunity to make an unsafe change where that opportunity > does not exist in the code as-is. > > Furthermore, read and write atomic have exactly the same internal > pattern as add_sized(), so how does this not just kick the can down the > road? +1 (fwiw) Jan From xen-devel-bounces@lists.xenproject.org Thu Nov 06 09:58:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 09:58:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156637.1485662 (Exim 4.92) (envelope-from ) id 1vGwkh-0006oC-73; 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Thu, 06 Nov 2025 01:57:53 -0800 (PST) Message-ID: <45031a9f-1072-4a41-9b46-35bf6437880b@suse.com> Date: Thu, 6 Nov 2025 10:57:56 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH] xen/x86: guest_access: optimize raw_x_guest() for PV and HVM combinations To: Grygorii Strashko Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Alejandro Vallejo , Jason Andryuk , "xen-devel@lists.xenproject.org" References: <20251031212058.1338332-1-grygorii_strashko@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251031212058.1338332-1-grygorii_strashko@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 31.10.2025 22:20, Grygorii Strashko wrote: > --- a/xen/arch/x86/include/asm/guest_access.h > +++ b/xen/arch/x86/include/asm/guest_access.h > @@ -13,6 +13,7 @@ > #include > > /* Raw access functions: no type checking. */ > +#if defined(CONFIG_PV) && defined(CONFIG_HVM) > #define raw_copy_to_guest(dst, src, len) \ > (is_hvm_vcpu(current) ? \ > copy_to_user_hvm((dst), (src), (len)) : \ > @@ -34,6 +35,43 @@ > copy_from_user_hvm((dst), (src), (len)) : \ > __copy_from_guest_pv(dst, src, len)) > > +#elif defined(CONFIG_HVM) > +#define raw_copy_to_guest(dst, src, len) \ > + copy_to_user_hvm((dst), (src), (len)) > +#define raw_copy_from_guest(dst, src, len) \ > + copy_from_user_hvm((dst), (src), (len)) > +#define raw_clear_guest(dst, len) \ > + clear_user_hvm((dst), (len)) > +#define __raw_copy_to_guest(dst, src, len) \ > + copy_to_user_hvm((dst), (src), (len)) > +#define __raw_copy_from_guest(dst, src, len) \ > + copy_from_user_hvm((dst), (src), (len)) > + > +#elif defined(CONFIG_PV) > +#define raw_copy_to_guest(dst, src, len) \ > + copy_to_guest_pv(dst, src, len) > +#define raw_copy_from_guest(dst, src, len) \ > + copy_from_guest_pv(dst, src, len) > +#define raw_clear_guest(dst, len) \ > + clear_guest_pv(dst, len) > +#define __raw_copy_to_guest(dst, src, len) \ > + __copy_to_guest_pv(dst, src, len) > +#define __raw_copy_from_guest(dst, src, len) \ > + __copy_from_guest_pv(dst, src, len) > + > +#else > +#define raw_copy_to_guest(dst, src, len) \ > + ((void)(dst), (void)(src), (void)(len), 1) > +#define raw_copy_from_guest(dst, src, len) \ > + ((void)(dst), (void)(src), (void)(len), 1) > +#define raw_clear_guest(dst, len) \ > + ((void)(dst), (void)(len), 1) > +#define __raw_copy_to_guest(dst, src, len) \ > + ((void)(dst), (void)(src), (void)(len), 1) > +#define __raw_copy_from_guest(dst, src, len) \ > + ((void)(dst), (void)(src), (void)(len), 1) > +#endif I have to admit that I don't really like the repetition. Style-wise you want to be consistent with the adding of blank lines around the preprocessor directives: Imo here there want to be ones on both sides of each of the directives. For the last block, I'd further prefer if "len" was returned. That's properly representing that nothing was copied. And if these were all using a single inline stub function, ... > --- a/xen/common/domain.c > +++ b/xen/common/domain.c > @@ -1985,8 +1985,9 @@ bool update_runstate_area(struct vcpu *v) > #endif > guest_handle--; > runstate.state_entry_time |= XEN_RUNSTATE_UPDATE; > - __raw_copy_to_guest(guest_handle, > - (void *)(&runstate.state_entry_time + 1) - 1, 1); > + (void)__raw_copy_to_guest(guest_handle, > + (void *)(&runstate.state_entry_time + 1) - 1, > + 1); > smp_wmb(); > } > > @@ -2008,8 +2009,9 @@ bool update_runstate_area(struct vcpu *v) > { > runstate.state_entry_time &= ~XEN_RUNSTATE_UPDATE; > smp_wmb(); > - __raw_copy_to_guest(guest_handle, > - (void *)(&runstate.state_entry_time + 1) - 1, 1); > + (void)__raw_copy_to_guest(guest_handle, > + (void *)(&runstate.state_entry_time + 1) - 1, > + 1); > } > > update_guest_memory_policy(v, &policy); ... these changes would become unnecessary (I dislike such unnecessary - as per the C spec - casts, even if I understand that for Misra we may need to gain quite a few of them). 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Thu, 06 Nov 2025 01:58:42 -0800 (PST) Message-ID: <34c195a5-0e3c-4a19-bc92-374f2fbded34@suse.com> Date: Thu, 6 Nov 2025 10:58:46 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH] xen/x86: guest_access: optimize raw_x_guest() for PV and HVM combinations To: Grygorii Strashko Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Alejandro Vallejo , Jason Andryuk , "xen-devel@lists.xenproject.org" References: <20251031212058.1338332-1-grygorii_strashko@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251031212058.1338332-1-grygorii_strashko@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 31.10.2025 22:20, Grygorii Strashko wrote: > @@ -34,6 +35,43 @@ > copy_from_user_hvm((dst), (src), (len)) : \ > __copy_from_guest_pv(dst, src, len)) > > +#elif defined(CONFIG_HVM) > +#define raw_copy_to_guest(dst, src, len) \ > + copy_to_user_hvm((dst), (src), (len)) Oh, and: Please omit unnecessary parentheses - they only hamper readability. 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Thu, 06 Nov 2025 01:58:50 -0800 (PST) MIME-Version: 1.0 References: <20251105153808.20278-1-frediano.ziglio@citrix.com> In-Reply-To: From: Frediano Ziglio Date: Thu, 6 Nov 2025 09:58:39 +0000 X-Gm-Features: AWmQ_bka-zoJlgF7DlMyS7XzSfIs5hPxCYIwFZPWOAuxO_0Kf9qxjCF0N0UZMHI Message-ID: Subject: Re: [PATCH v3] xen: Strip xen.efi by default To: Demi Marie Obenour Cc: Frediano Ziglio , xen-devel@lists.xenproject.org, Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , =?UTF-8?Q?Marek_Marczykowski=2DG=C3=B3recki?= Content-Type: text/plain; charset="UTF-8" On Thu, 6 Nov 2025 at 03:52, Demi Marie Obenour wrote: > > On 11/5/25 21:00, Frediano Ziglio wrote: > > On Wed, 5 Nov 2025 at 20:31, Demi Marie Obenour wrote: > >> > >> On 11/5/25 10:38, Frediano Ziglio wrote: > >>> From: Frediano Ziglio > >>> > >>> For xen.gz file we strip all symbols and have an additional > >>> xen-syms file version with all symbols. > >>> Make xen.efi more coherent stripping all symbols too. > >>> xen-syms.efi can be used for debugging. > >>> > >>> Signed-off-by: Frediano Ziglio > >>> --- > >>> Changes since v1: > >>> - avoid leaving target if some command fails. > >>> > >>> Changes since v2: > >>> - do not convert type but retain PE format; > >>> = use xen-syms.efi for new file name, more consistent with ELF. > >>> --- > >>> docs/misc/efi.pandoc | 8 +------- > >>> xen/Kconfig.debug | 9 ++------- > >>> xen/Makefile | 19 ------------------- > >>> xen/arch/x86/Makefile | 9 ++++++--- > >>> 4 files changed, 9 insertions(+), 36 deletions(-) > >>> > >>> diff --git a/docs/misc/efi.pandoc b/docs/misc/efi.pandoc > >>> index 11c1ac3346..c66b18a66b 100644 > >>> --- a/docs/misc/efi.pandoc > >>> +++ b/docs/misc/efi.pandoc > >>> @@ -20,13 +20,7 @@ Xen to load the configuration file even if multiboot modules are found. > >>> Once built, `make install-xen` will place the resulting binary directly into > >>> the EFI boot partition, provided `EFI_VENDOR` is set in the environment (and > >>> `EFI_MOUNTPOINT` is overridden as needed, should the default of `/boot/efi` not > >>> -match your system). When built with debug info, the binary can be quite large. > >>> -Setting `INSTALL_EFI_STRIP=1` in the environment will cause it to be stripped > >>> -of debug info in the process of installing. `INSTALL_EFI_STRIP` can also be set > >>> -to any combination of options suitable to pass to `strip`, in case the default > >>> -ones don't do. The xen.efi binary will also be installed in `/usr/lib64/efi/`, > >>> -unless `EFI_DIR` is set in the environment to override this default. This > >>> -binary will not be stripped in the process. > >>> +match your system). > >>> > >>> The binary itself will require a configuration file (names with the `.efi` > >>> extension of the binary's name replaced by `.cfg`, and - until an existing > >>> diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug > >>> index d900d926c5..58ee10ee3e 100644 > >>> --- a/xen/Kconfig.debug > >>> +++ b/xen/Kconfig.debug > >>> @@ -147,12 +147,7 @@ config DEBUG_INFO > >>> Say Y here if you want to build Xen with debug information. This > >>> information is needed e.g. for doing crash dump analysis of the > >>> hypervisor via the "crash" tool. > >>> - Saying Y will increase the size of the xen-syms and xen.efi > >>> - binaries. In case the space on the EFI boot partition is rather > >>> - limited, you may want to install a stripped variant of xen.efi in > >>> - the EFI boot partition (look for "INSTALL_EFI_STRIP" in > >>> - docs/misc/efi.pandoc for more information - when not using > >>> - "make install-xen" for installing xen.efi, stripping needs to be > >>> - done outside the Xen build environment). > >>> + Saying Y will increase the size of the xen-syms and xen.efi.elf > >>> + binaries. > >>> > >>> endmenu > >>> diff --git a/xen/Makefile b/xen/Makefile > >>> index ddcee8835c..605a26c181 100644 > >>> --- a/xen/Makefile > >>> +++ b/xen/Makefile > >>> @@ -493,22 +493,6 @@ endif > >>> .PHONY: _build > >>> _build: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX) > >>> > >>> -# Strip > >>> -# > >>> -# INSTALL_EFI_STRIP, if defined, will cause xen.efi to be stripped before it > >>> -# is installed. If INSTALL_EFI_STRIP is '1', then the default option(s) below > >>> -# will be used. Otherwise, INSTALL_EFI_STRIP value will be used as the > >>> -# option(s) to the strip command. > >>> -ifdef INSTALL_EFI_STRIP > >>> - > >>> -ifeq ($(INSTALL_EFI_STRIP),1) > >>> -efi-strip-opt := --strip-debug --keep-file-symbols > >>> -else > >>> -efi-strip-opt := $(INSTALL_EFI_STRIP) > >>> -endif > >>> - > >>> -endif > >>> - > >>> .PHONY: _install > >>> _install: D=$(DESTDIR) > >>> _install: T=$(notdir $(TARGET)) > >>> @@ -535,9 +519,6 @@ _install: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX) > >>> ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T)-$(XEN_VERSION).efi; \ > >>> ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T).efi; \ > >>> if [ -n '$(EFI_MOUNTPOINT)' -a -n '$(EFI_VENDOR)' ]; then \ > >>> - $(if $(efi-strip-opt), \ > >>> - $(STRIP) $(efi-strip-opt) -p -o $(TARGET).efi.stripped $(TARGET).efi && \ > >>> - $(INSTALL_DATA) $(TARGET).efi.stripped $(D)$(EFI_MOUNTPOINT)/efi/$(EFI_VENDOR)/$(T)-$(XEN_FULLVERSION).efi ||) \ > >>> $(INSTALL_DATA) $(TARGET).efi $(D)$(EFI_MOUNTPOINT)/efi/$(EFI_VENDOR)/$(T)-$(XEN_FULLVERSION).efi; \ > >>> elif [ "$(D)" = "$(patsubst $(shell cd $(XEN_ROOT) && pwd)/%,%,$(D))" ]; then \ > >>> echo 'EFI installation only partially done (EFI_VENDOR not set)' >&2; \ > >>> diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile > >>> index 407571c510..c118ab7b7d 100644 > >>> --- a/xen/arch/x86/Makefile > >>> +++ b/xen/arch/x86/Makefile > >>> @@ -228,14 +228,17 @@ endif > >>> $(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o > >>> $(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds $< \ > >>> $(dot-target).1r.o $(dot-target).1s.o $(orphan-handling-y) \ > >>> - $(note_file_option) -o $@ > >>> - $(NM) -pa --format=sysv $@ \ > >>> + $(note_file_option) -o $@.tmp > >>> + $(NM) -pa --format=sysv $@.tmp \ > >>> | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > >>> > $@.map > >>> ifeq ($(CONFIG_DEBUG_INFO),y) > >>> - $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) -O elf64-x86-64 $@ $@.elf > >>> + $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))cp -f \ > >>> + $@.tmp $(TARGET)-syms.efi > >>> + $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(STRIP) $@.tmp > >>> endif > >>> rm -f $(dot-target).[0-9]* $(@D)/..$(@F).[0-9]* > >>> + mv -f $@.tmp $@ > >>> ifeq ($(CONFIG_XEN_IBT),y) > >>> $(SHELL) $(srctree)/tools/check-endbr.sh $@ > >>> endif > >> > >> Does this also strip the string table from xen.efi? I'm concerned that > >> signing xen.efi for secure boot won't work if there is a string table. > >> In particular, it appears that EDK2 will miscalculate the file hash if > >> the string table is before the signature. Moving the string table after > >> the signature invalidates the pointer to it. The only exception is if > >> the string table is itself in a section, but I don't know if that is the > >> case. > > > > I don't know if the string table is stripped but I can surely confirm > > that signing xen.efi is working with secure boot. > > > > Frediano > > Does objdump on the signed file return correct section names? >From objdump -x Sections: Idx Name Size VMA LMA File off Algn 0 .text 0016c9ae ffff82d040200000 ffff82d040200000 00000320 2**4 CONTENTS, ALLOC, LOAD, READONLY, CODE 1 .rodata 0006b9e8 ffff82d040400000 ffff82d040400000 0016cce0 2**2 CONTENTS, ALLOC, LOAD, DATA 2 .buildid 00000035 ffff82d04046c000 ffff82d04046c000 001d86e0 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .init.text 0004d123 ffff82d040600000 ffff82d040600000 001d8720 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 4 .init.data 0006c9b0 ffff82d040800000 ffff82d040800000 00225860 2**2 CONTENTS, ALLOC, LOAD, DATA 5 .data.read_mostly 00028da8 ffff82d040a00000 ffff82d040a00000 00292220 2**4 CONTENTS, ALLOC, LOAD, DATA 6 .data 0000feec ffff82d040a29000 ffff82d040a29000 002bafe0 2**4 CONTENTS, ALLOC, LOAD, DATA 7 .bss 00223108 ffff82d040a39000 ffff82d040a39000 00000000 2**4 ALLOC 8 .reloc 000016b8 ffff82d040c5d000 ffff82d040c5d000 002caee0 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 9 .sbat 000000a6 ffff82d040c5f000 ffff82d040c5f000 002cc5a0 2**2 CONTENTS, READONLY Which looks correct. >From hexdump -C I can see close to the end ... 002cc580 30 ae 38 ae 60 ae 00 00 00 80 a3 00 10 00 00 00 |0.8.`...........| 002cc590 a0 ae c0 ae e0 ae 00 00 00 00 00 00 00 00 00 00 |................| 002cc5a0 73 62 61 74 2c 31 2c 53 42 41 54 20 56 65 72 73 |sbat,1,SBAT Vers| 002cc5b0 69 6f 6e 2c 73 62 61 74 2c 31 2c 68 74 74 70 73 |ion,sbat,1,https| 002cc5c0 3a 2f 2f 67 69 74 68 75 62 2e 63 6f 6d 2f 72 68 |://github.com/rh| 002cc5d0 62 6f 6f 74 2f 73 68 69 6d 2f 62 6c 6f 62 2f 6d |boot/shim/blob/m| 002cc5e0 61 69 6e 2f 53 42 41 54 2e 6d 64 0a 78 65 6e 2e |ain/SBAT.md.xen.| 002cc5f0 78 73 2c 31 2c 43 6c 6f 75 64 20 53 6f 66 74 77 |xs,1,Cloud Softw| 002cc600 61 72 65 20 47 72 6f 75 70 2c 78 65 6e 2c 34 2e |are Group,xen,4.| 002cc610 32 30 2e 31 2d 37 2e 32 32 2e 67 33 65 30 36 37 |20.1-7.22.g3e067| 002cc620 32 36 62 2e 78 73 39 2c 6d 61 69 6c 74 6f 3a 73 |26b.xs9,mailto:s| 002cc630 65 63 75 72 69 74 79 40 78 65 6e 73 65 72 76 65 |ecurity@xenserve| 002cc640 72 2e 63 6f 6d 0a 00 00 00 00 00 00 00 00 00 00 |r.com...........| 002cc650 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................| 002cc660 2c 00 00 00 2e 69 6e 69 74 2e 74 65 78 74 00 2e |,....init.text..| 002cc670 69 6e 69 74 2e 64 61 74 61 00 2e 64 61 74 61 2e |init.data..data.| 002cc680 72 65 61 64 5f 6d 6f 73 74 6c 79 00 00 00 00 00 |read_mostly.....| 002cc690 9e 05 00 00 00 02 02 00 30 82 05 92 06 09 2a 86 |........0.....*.| 002cc6a0 48 86 f7 0d 01 07 02 a0 82 05 83 30 82 05 7f 02 |H..........0....| 002cc6b0 01 01 31 0f 30 0d 06 09 60 86 48 01 65 03 04 02 |..1.0...`.H.e...| 002cc6c0 01 05 00 30 5c 06 0a 2b 06 01 04 01 82 37 02 01 |...0\..+.....7..| 002cc6d0 04 a0 4e 30 4c 30 17 06 0a 2b 06 01 04 01 82 37 |..N0L0...+.....7| 002cc6e0 02 01 0f 30 09 03 01 00 a0 04 a2 02 80 00 30 31 |...0..........01| 002cc6f0 30 0d 06 09 60 86 48 01 65 03 04 02 01 05 00 04 |0...`.H.e.......| 002cc700 20 e2 47 64 f8 e8 7b 62 eb 17 e0 13 0a 0d 93 02 | .Gd..{b........| 002cc710 7a d8 3b f0 20 a8 ee 3d 49 98 3f de c1 47 de 15 |z.;. ..=I.?..G..| 002cc720 43 a0 82 03 2c 30 82 03 28 30 82 02 10 a0 03 02 |C...,0..(0......| 002cc730 01 02 02 11 00 8f fc 11 bf 41 54 40 74 89 2c 53 |.........AT@t.,S| 002cc740 a5 78 c1 e8 32 30 0d 06 09 2a 86 48 86 f7 0d 01 |.x..20...*.H....| 002cc750 01 0b 05 00 30 1c 31 1a 30 18 06 03 55 04 03 13 |....0.1.0...U...| 002cc760 11 58 65 6e 53 65 72 76 65 72 20 58 65 6e 20 64 |.XenServer Xen d| 002cc770 65 76 30 1e 17 0d 32 35 30 33 32 30 31 36 35 35 |ev0...2503201655| 002cc780 30 37 5a 17 0d 33 37 30 31 31 39 30 33 31 34 30 |07Z..37011903140| 002cc790 37 5a 30 1c 31 1a 30 18 06 03 55 04 03 13 11 58 |7Z0.1.0...U....X| 002cc7a0 65 6e 53 65 72 76 65 72 20 58 65 6e 20 64 65 76 |enServer Xen dev| ... So, this confirms that the string table is there to support larger section names and the signature is there and it's working. -- Frediano From xen-devel-bounces@lists.xenproject.org Thu Nov 06 10:09:42 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 10:09:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156675.1485692 (Exim 4.92) (envelope-from ) id 1vGwvv-0001KF-Qo; Thu, 06 Nov 2025 10:09:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1156675.1485692; Thu, 06 Nov 2025 10:09:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGwvv-0001K8-N8; Thu, 06 Nov 2025 10:09:35 +0000 Received: by outflank-mailman (input) for mailman id 1156675; Thu, 06 Nov 2025 10:09:34 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGwvu-0001K2-QN for xen-devel@lists.xenproject.org; Thu, 06 Nov 2025 10:09:34 +0000 Received: from mail-ej1-x629.google.com (mail-ej1-x629.google.com [2a00:1450:4864:20::629]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id b08a1bf0-baf8-11f0-980a-7dc792cee155; Thu, 06 Nov 2025 11:09:32 +0100 (CET) Received: by mail-ej1-x629.google.com with SMTP id a640c23a62f3a-b3d196b7eeeso106671766b.0 for ; Thu, 06 Nov 2025 02:09:32 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 06 Nov 2025 02:09:31 -0800 (PST) Message-ID: <9598b2e2-7df8-40c5-82cb-c097121af763@suse.com> Date: Thu, 6 Nov 2025 11:09:35 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 1/5] xen/domctl: extend XEN_DOMCTL_assign_device to handle not only iommu To: Oleksii Moisieiev Cc: Andrew Cooper , Anthony PERARD , Bertrand Marquis , Juergen Gross , Julien Grall , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Volodymyr Babchuk , Grygorii Strashko , "xen-devel@lists.xenproject.org" References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 01.11.2025 12:56, Oleksii Moisieiev wrote: > --- a/xen/common/domctl.c > +++ b/xen/common/domctl.c > @@ -29,6 +29,7 @@ > #include > > #include > +#include > #include > #include > #include Does this build at all on non-Arm? > @@ -827,7 +828,32 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl) > case XEN_DOMCTL_test_assign_device: > case XEN_DOMCTL_deassign_device: > case XEN_DOMCTL_get_device_group: > + int ret1; > + > + /* > + * Add chained handling of assigned DT devices to support > + * access-controller functionality through SCI framework, so > + * DT device assign request can be passed to FW for processing and > + * enabling VM access to requested device. > + * The access-controller DT device processing is chained before IOMMU > + * processing preserving return code and expected to be executed for > + * any DT device regardless if DT device is protected by IOMMU or > + * not (or IOMMU is disabled). > + */ > + ret1 = sci_do_domctl(op, d, u_domctl); Why would this not be the initializer of the new variable? (I also don't think that we've decided to permit variable declarations at other than the top of scopes or within e.g. a for() loop control construct.) > ret = iommu_do_domctl(op, d, u_domctl); > + if ( ret < 0 ) > + return ret; Why would you invoke both in all cases? If sci_do_domctl() handled the request, there isn't any point in also invoking iommu_do_domctl(), is there? Or else is there maybe some crucial aspect missing from the description (or not explicit enough there for a non-SCI person like me)? Also this doesn't look to fit the description saying "The SCI access-controller DT device processing is chained after IOMMU processing ..." > --- a/xen/drivers/passthrough/device_tree.c > +++ b/xen/drivers/passthrough/device_tree.c > @@ -379,6 +379,12 @@ int iommu_do_dt_domctl(struct xen_domctl *domctl, struct domain *d, > break; > } > > + if ( !dt_device_is_protected(dev) ) > + { > + ret = 0; > + break; > + } > + > ret = iommu_assign_dt_device(d, dev); > > if ( ret ) How are DT and PCI different in this regard? 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Thu, 06 Nov 2025 02:24:57 -0800 (PST) Message-ID: Date: Thu, 6 Nov 2025 11:25:00 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 3/5] lib/arm: Add I/O memory copy helpers To: Oleksii Moisieiev Cc: Andrew Cooper , Anthony PERARD , Bertrand Marquis , Juergen Gross , Julien Grall , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Volodymyr Babchuk , "xen-devel@lists.xenproject.org" References: <33372689f3097b0dde1d47b81a1bb8176b35d20c.1761998077.git.oleksii_moisieiev@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <33372689f3097b0dde1d47b81a1bb8176b35d20c.1761998077.git.oleksii_moisieiev@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 01.11.2025 12:56, Oleksii Moisieiev wrote: > --- /dev/null > +++ b/xen/include/xen/lib/io.h > @@ -0,0 +1,83 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * Generic I/O memory copy function prototypes. > + * > + * These functions provide low-level implementation for copying data between > + * regular memory and I/O memory regions. Each architecture must provide its > + * own implementation based on the specific requirements of the architecture's > + * memory model and I/O access patterns. > + * > + * Architecture-specific implementations: > + * ===================================== > + * Each architecture should implement these functions in xen/lib//io.c > + * based on their hardware requirements: > + * > + * - ARM/ARM64: Requires special I/O accessors (readl_relaxed, writel_relaxed) > + * with proper memory barriers and alignment handling. > + * See xen/lib/arm/io.c for implementation. > + * > + * - x86/x86_64: I/O memory is directly accessible, so typically uses: > + * #define memcpy_fromio memcpy > + * #define memcpy_toio memcpy > + * See xen/arch/x86/dmi_scan.c for example usage. I'm not quite sure this is true, especially when now we prefer to use REP MOVSB there. You don't provide the x86 implementation anyway, so it's not clear whether it's a good idea so say anything here about (unclear) future code. (What may be appropriate in dmi_scan.c, where it's really RAM that is being accessed, may not be appropriate for actual MMIO.) > + * - Other architectures (RISC-V, PowerPC, MIPS, etc.): Should provide their > + * own implementations following the function signatures defined below. > + * > + * Naming Convention: > + * ================== > + * The double underscore (__) prefix indicates these are low-level "raw" > + * implementation functions, following the Linux kernel convention for > + * architecture-specific primitives. This warns developers that these > + * functions have specific requirements and should not be confused with > + * regular memcpy(). I disagree here. We really should stop violating name spacing rules set forth by the spec and/or Misra. > + */ > + > +#ifndef _XEN_LIB_IO_H > +#define _XEN_LIB_IO_H > + > +#include > + > +/* > + * __memcpy_fromio - Copy data from I/O memory space to regular memory > + * @to: Destination buffer in regular memory > + * @from: Source address in I/O memory space (must be marked __iomem) > + * @count: Number of bytes to copy > + * > + * This function handles copying from memory-mapped I/O regions using > + * architecture-appropriate I/O accessor functions. It ensures proper: > + * - Memory ordering and barriers > + * - Alignment requirements > + * - Hardware-specific access semantics > + * > + * Each architecture provides its own implementation that may: > + * - Use special I/O accessor functions (ARM: readl_relaxed, readb_relaxed) > + * - Implement alignment handling for devices requiring specific access sizes > + * - Add memory barriers to ensure ordering with other I/O operations > + * - Or simply map to memcpy() if the architecture allows direct I/O access > + */ > +extern void __memcpy_fromio(void *to, const volatile void __iomem *from, > + size_t count); > + > +/* > + * __memcpy_toio - Copy data from regular memory to I/O memory space > + * @to: Destination address in I/O memory space (must be marked __iomem) > + * @from: Source buffer in regular memory > + * @count: Number of bytes to copy > + * > + * This function handles copying to memory-mapped I/O regions using > + * architecture-appropriate I/O accessor functions. It ensures proper: > + * - Memory ordering and barriers > + * - Alignment requirements > + * - Hardware-specific access semantics > + * > + * Each architecture provides its own implementation that may: > + * - Use special I/O accessor functions (ARM: writel_relaxed, writeb_relaxed) > + * - Implement alignment handling for devices requiring specific access sizes > + * - Add memory barriers to ensure ordering with other I/O operations > + * - Or simply map to memcpy() if the architecture allows direct I/O access > + */ > +extern void __memcpy_toio(volatile void __iomem *to, const void *from, > + size_t count); > + > +#endif /* _XEN_LIB_IO_H */ There are no provisions here for an arch using macro aliasing, as you suggest in the comment further up for x86. > --- /dev/null > +++ b/xen/lib/arm/io.c > @@ -0,0 +1,102 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +#include > +#include > + > +/* > + * These functions use 32-bit (uint32_t) IO operations rather than 64-bit for > + * the following reasons: > + * > + * 1. ARM32/ARM64 compatibility: On ARM32, there is no atomic 64-bit IO accessor > + * (readq_relaxed). Only readq_relaxed_non_atomic() exists, which internally > + * performs two separate 32-bit reads. Using it would not provide any > + * performance benefit and could introduce ordering issues. > + * > + * 2. Hardware compatibility: Many IO devices only support 32-bit aligned accesses. > + * 64-bit accesses might not be supported or could cause bus errors on some > + * hardware. > + * > + * 3. Simplicity: Using 32-bit operations keeps the code simple, maintainable, > + * and consistent across both ARM32 and ARM64 architectures without > + * architecture-specific conditionals. > + * > + * The performance difference between 32-bit and 64-bit operations in this > + * context is negligible compared to the IO access latency itself. > + */ > + > +/* > + * memcpy_fromio - Copy data from IO memory space to "real" memory space. > + * @to: Where to copy to > + * @from: Where to copy from > + * @count: The size of the area. > + */ > +void __memcpy_fromio(void *to, const volatile void __iomem *from, > + size_t count) > +{ > + while ( count && !IS_ALIGNED((unsigned long)from, 4) ) > + { > + *(uint8_t *)to = readb_relaxed(from); > + from++; > + to++; > + count--; > + } > + > + while ( count >= 4 ) > + { > + *(uint32_t *)to = readl_relaxed(from); Is this going to be fine on Arm32, when "to" doesn't point at a 4-byte-aligned location? > + from += 4; > + to += 4; > + count -= 4; > + } > + > + while ( count ) > + { > + *(uint8_t *)to = readb_relaxed(from); > + from++; > + to++; > + count--; > + } > +} > + > +/* > + * memcpy_toio - Copy data from "real" memory space to IO memory space. > + * @to: Where to copy to > + * @from: Where to copy from > + * @count: The size of the area. > + */ > +void __memcpy_toio(volatile void __iomem *to, const void *from, > + size_t count) > +{ > + while ( count && !IS_ALIGNED((unsigned long)to, 4) ) > + { > + writeb_relaxed(*(const uint8_t *)from, to); > + from++; > + to++; > + count--; > + } > + > + while ( count >= 4 ) > + { > + writel_relaxed(*(const uint32_t *)from, to); > + from += 4; > + to += 4; > + count -= 4; > + } > + > + while ( count ) > + { > + writeb_relaxed(*(const uint8_t *)from, to); > + from++; > + to++; > + count--; > + } > +} Is use of {read,write}l_relaxed() appropriate here anyway, when those functions do endian-ness conversions (which memcpy()-like functions clearly shouldn't do)? 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Thu, 06 Nov 2025 02:27:59 -0800 (PST) Message-ID: <98e2f19f-5fce-4ad1-b821-f5abb1f815f6@suse.com> Date: Thu, 6 Nov 2025 11:28:02 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3] xen: Strip xen.efi by default To: Frediano Ziglio Cc: xen-devel@lists.xenproject.org, Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , Demi Marie Obenour References: <20251105153808.20278-1-frediano.ziglio@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.11.2025 10:58, Frediano Ziglio wrote: > On Thu, 6 Nov 2025 at 03:52, Demi Marie Obenour wrote: >> Does objdump on the signed file return correct section names? > > From objdump -x > > Sections: > Idx Name Size VMA LMA File off Algn > 0 .text 0016c9ae ffff82d040200000 ffff82d040200000 00000320 2**4 > CONTENTS, ALLOC, LOAD, READONLY, CODE > 1 .rodata 0006b9e8 ffff82d040400000 ffff82d040400000 0016cce0 2**2 > CONTENTS, ALLOC, LOAD, DATA > 2 .buildid 00000035 ffff82d04046c000 ffff82d04046c000 001d86e0 2**2 > CONTENTS, ALLOC, LOAD, READONLY, DATA > 3 .init.text 0004d123 ffff82d040600000 ffff82d040600000 001d8720 2**2 > CONTENTS, ALLOC, LOAD, READONLY, CODE > 4 .init.data 0006c9b0 ffff82d040800000 ffff82d040800000 00225860 2**2 > CONTENTS, ALLOC, LOAD, DATA > 5 .data.read_mostly 00028da8 ffff82d040a00000 ffff82d040a00000 > 00292220 2**4 > CONTENTS, ALLOC, LOAD, DATA > 6 .data 0000feec ffff82d040a29000 ffff82d040a29000 002bafe0 2**4 > CONTENTS, ALLOC, LOAD, DATA > 7 .bss 00223108 ffff82d040a39000 ffff82d040a39000 00000000 2**4 > ALLOC > 8 .reloc 000016b8 ffff82d040c5d000 ffff82d040c5d000 002caee0 2**2 > CONTENTS, ALLOC, LOAD, READONLY, DATA > 9 .sbat 000000a6 ffff82d040c5f000 ffff82d040c5f000 002cc5a0 2**2 > CONTENTS, READONLY > > Which looks correct. > > From hexdump -C I can see close to the end > > ... > 002cc580 30 ae 38 ae 60 ae 00 00 00 80 a3 00 10 00 00 00 |0.8.`...........| > 002cc590 a0 ae c0 ae e0 ae 00 00 00 00 00 00 00 00 00 00 |................| > 002cc5a0 73 62 61 74 2c 31 2c 53 42 41 54 20 56 65 72 73 |sbat,1,SBAT Vers| > 002cc5b0 69 6f 6e 2c 73 62 61 74 2c 31 2c 68 74 74 70 73 |ion,sbat,1,https| > 002cc5c0 3a 2f 2f 67 69 74 68 75 62 2e 63 6f 6d 2f 72 68 |://github.com/rh| > 002cc5d0 62 6f 6f 74 2f 73 68 69 6d 2f 62 6c 6f 62 2f 6d |boot/shim/blob/m| > 002cc5e0 61 69 6e 2f 53 42 41 54 2e 6d 64 0a 78 65 6e 2e |ain/SBAT.md.xen.| > 002cc5f0 78 73 2c 31 2c 43 6c 6f 75 64 20 53 6f 66 74 77 |xs,1,Cloud Softw| > 002cc600 61 72 65 20 47 72 6f 75 70 2c 78 65 6e 2c 34 2e |are Group,xen,4.| > 002cc610 32 30 2e 31 2d 37 2e 32 32 2e 67 33 65 30 36 37 |20.1-7.22.g3e067| > 002cc620 32 36 62 2e 78 73 39 2c 6d 61 69 6c 74 6f 3a 73 |26b.xs9,mailto:s| > 002cc630 65 63 75 72 69 74 79 40 78 65 6e 73 65 72 76 65 |ecurity@xenserve| > 002cc640 72 2e 63 6f 6d 0a 00 00 00 00 00 00 00 00 00 00 |r.com...........| > 002cc650 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................| > 002cc660 2c 00 00 00 2e 69 6e 69 74 2e 74 65 78 74 00 2e |,....init.text..| > 002cc670 69 6e 69 74 2e 64 61 74 61 00 2e 64 61 74 61 2e |init.data..data.| > 002cc680 72 65 61 64 5f 6d 6f 73 74 6c 79 00 00 00 00 00 |read_mostly.....| > 002cc690 9e 05 00 00 00 02 02 00 30 82 05 92 06 09 2a 86 |........0.....*.| > 002cc6a0 48 86 f7 0d 01 07 02 a0 82 05 83 30 82 05 7f 02 |H..........0....| > 002cc6b0 01 01 31 0f 30 0d 06 09 60 86 48 01 65 03 04 02 |..1.0...`.H.e...| > 002cc6c0 01 05 00 30 5c 06 0a 2b 06 01 04 01 82 37 02 01 |...0\..+.....7..| > 002cc6d0 04 a0 4e 30 4c 30 17 06 0a 2b 06 01 04 01 82 37 |..N0L0...+.....7| > 002cc6e0 02 01 0f 30 09 03 01 00 a0 04 a2 02 80 00 30 31 |...0..........01| > 002cc6f0 30 0d 06 09 60 86 48 01 65 03 04 02 01 05 00 04 |0...`.H.e.......| > 002cc700 20 e2 47 64 f8 e8 7b 62 eb 17 e0 13 0a 0d 93 02 | .Gd..{b........| > 002cc710 7a d8 3b f0 20 a8 ee 3d 49 98 3f de c1 47 de 15 |z.;. ..=I.?..G..| > 002cc720 43 a0 82 03 2c 30 82 03 28 30 82 02 10 a0 03 02 |C...,0..(0......| > 002cc730 01 02 02 11 00 8f fc 11 bf 41 54 40 74 89 2c 53 |.........AT@t.,S| > 002cc740 a5 78 c1 e8 32 30 0d 06 09 2a 86 48 86 f7 0d 01 |.x..20...*.H....| > 002cc750 01 0b 05 00 30 1c 31 1a 30 18 06 03 55 04 03 13 |....0.1.0...U...| > 002cc760 11 58 65 6e 53 65 72 76 65 72 20 58 65 6e 20 64 |.XenServer Xen d| > 002cc770 65 76 30 1e 17 0d 32 35 30 33 32 30 31 36 35 35 |ev0...2503201655| > 002cc780 30 37 5a 17 0d 33 37 30 31 31 39 30 33 31 34 30 |07Z..37011903140| > 002cc790 37 5a 30 1c 31 1a 30 18 06 03 55 04 03 13 11 58 |7Z0.1.0...U....X| > 002cc7a0 65 6e 53 65 72 76 65 72 20 58 65 6e 20 64 65 76 |enServer Xen dev| > ... > > So, this confirms that the string table is there to support larger > section names and the signature is there and it's working. But is it going to work on all EFI implementations, or merely the one you tried? Of course it would help if Demi could give more concrete pointers to (possible) implementations where there might be (known? suspected?) issues. Jan From xen-devel-bounces@lists.xenproject.org Thu Nov 06 10:30:11 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 10:30:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156716.1485721 (Exim 4.92) (envelope-from ) id 1vGxFn-0006Jk-Vk; Thu, 06 Nov 2025 10:30:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1156716.1485721; Thu, 06 Nov 2025 10:30:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGxFn-0006Jd-T9; Thu, 06 Nov 2025 10:30:07 +0000 Received: by outflank-mailman (input) for mailman id 1156716; Thu, 06 Nov 2025 10:30:07 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGxFn-0006JX-5U for xen-devel@lists.xenproject.org; Thu, 06 Nov 2025 10:30:07 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 8ce6d35a-bafb-11f0-980a-7dc792cee155; Thu, 06 Nov 2025 11:30:01 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B85731596; Thu, 6 Nov 2025 02:29:52 -0800 (PST) Received: from [10.1.34.75] (unknown [10.1.34.75]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CB9A53F66E; Thu, 6 Nov 2025 02:29:53 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 8ce6d35a-bafb-11f0-980a-7dc792cee155 Message-ID: Date: Thu, 6 Nov 2025 10:29:50 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 01/12] powerpc/64s: Do not re-activate batched TLB flush To: "Ritesh Harjani (IBM)" , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org, Venkat Rao Bagalkote References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-2-kevin.brodsky@arm.com> <87qzud42n1.ritesh.list@gmail.com> Content-Language: en-GB From: Kevin Brodsky In-Reply-To: <87qzud42n1.ritesh.list@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 05/11/2025 02:46, Ritesh Harjani (IBM) wrote: > Kevin Brodsky writes: > >> From: Alexander Gordeev >> >> Since commit b9ef323ea168 ("powerpc/64s: Disable preemption in hash >> lazy mmu mode") a task can not be preempted while in lazy MMU mode. >> Therefore, the batch re-activation code is never called, so remove it. >> >> Signed-off-by: Alexander Gordeev >> Signed-off-by: Kevin Brodsky >> --- >> arch/powerpc/include/asm/thread_info.h | 2 -- >> arch/powerpc/kernel/process.c | 25 ------------------------- >> 2 files changed, 27 deletions(-) >> > Since the commit referenced in above disables the preemption in > arch_enter_lazy_mmu(), so the expectation is that we will never be > context switched while in lazy_mmu, hence the code changes in > switch_to() around __flush_tlb_pending() should ideally never be called. Correct, that's the idea. > With this analysis - the patch looks good to me. I will give this entire > patch series a try on Power HW with Hash mmu too (which uses lazy mmu and > let you know the results of that)! That'd be very appreciated, thanks a lot! > For this patch please feel free to add: > Reviewed-by: Ritesh Harjani (IBM) > > > CC: Venkat who also runs CI on linux Power HW for upstream testing :) Ack, will Cc you both in the next version. - Kevin From xen-devel-bounces@lists.xenproject.org Thu Nov 06 10:32:00 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 10:32:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156728.1485731 (Exim 4.92) (envelope-from ) id 1vGxHb-0006qI-9a; Thu, 06 Nov 2025 10:31:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1156728.1485731; Thu, 06 Nov 2025 10:31:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGxHb-0006qB-6f; Thu, 06 Nov 2025 10:31:59 +0000 Received: by outflank-mailman (input) for mailman id 1156728; Thu, 06 Nov 2025 10:31:58 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGxHa-0006q5-6O for xen-devel@lists.xenproject.org; Thu, 06 Nov 2025 10:31:58 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id d13f7233-bafb-11f0-9d17-b5c5bf9af7f9; Thu, 06 Nov 2025 11:31:56 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 87B131596; Thu, 6 Nov 2025 02:31:47 -0800 (PST) Received: from [10.1.34.75] (unknown [10.1.34.75]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 32C3E3F66E; Thu, 6 Nov 2025 02:31:49 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: d13f7233-bafb-11f0-9d17-b5c5bf9af7f9 Message-ID: <0276c749-9418-47ea-85f1-0b0ab93b0225@arm.com> Date: Thu, 6 Nov 2025 10:31:46 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 03/12] powerpc/mm: implement arch_flush_lazy_mmu_mode() To: "Ritesh Harjani (IBM)" , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-4-kevin.brodsky@arm.com> <87pl9x41c5.ritesh.list@gmail.com> <87jz044xn4.ritesh.list@gmail.com> Content-Language: en-GB From: Kevin Brodsky In-Reply-To: <87jz044xn4.ritesh.list@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 05/11/2025 09:49, Ritesh Harjani (IBM) wrote: > Ritesh Harjani (IBM) writes: > >> Kevin Brodsky writes: >> >>> Upcoming changes to the lazy_mmu API will cause >>> arch_flush_lazy_mmu_mode() to be called when leaving a nested >>> lazy_mmu section. >>> >>> Move the relevant logic from arch_leave_lazy_mmu_mode() to >>> arch_flush_lazy_mmu_mode() and have the former call the latter. >>> >>> Note: the additional this_cpu_ptr() on the >>> arch_leave_lazy_mmu_mode() path will be removed in a subsequent >>> patch. >>> >>> Signed-off-by: Kevin Brodsky >>> --- >>> .../powerpc/include/asm/book3s/64/tlbflush-hash.h | 15 +++++++++++---- >>> 1 file changed, 11 insertions(+), 4 deletions(-) >>> >>> diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h b/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h >>> index 146287d9580f..7704dbe8e88d 100644 >>> --- a/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h >>> +++ b/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h >>> @@ -41,6 +41,16 @@ static inline void arch_enter_lazy_mmu_mode(void) >>> batch->active = 1; >>> } >>> >>> +static inline void arch_flush_lazy_mmu_mode(void) >>> +{ >>> + struct ppc64_tlb_batch *batch; >>> + >>> + batch = this_cpu_ptr(&ppc64_tlb_batch); >>> + >>> + if (batch->index) >>> + __flush_tlb_pending(batch); >>> +} >>> + >> This looks a bit scary since arch_flush_lazy_mmu_mode() is getting >> called from several of the places in later patches(). >> >> Although I think arch_flush_lazy_mmu_mode() will only always be called >> in nested lazy mmu case right? >> >> Do you think we can add a VM_BUG_ON(radix_enabled()); in above to make >> sure the above never gets called in radix_enabled() case. >> >> I am still going over the patch series, but while reviewing this I >> wanted to take your opinion. >> >> Ohh wait.. There is no way of knowing the return value from >> arch_enter_lazy_mmu_mode().. I think you might need a similar check to >> return from arch_flush_lazy_mmu_mode() too, if radix_enabled() is true. >> > Now that I have gone through this series, it seems plaussible that since > lazy mmu mode supports nesting, arch_flush_lazy_mmu_mode() can get > called while the lazy mmu is active due to nesting.. > > That means we should add the radix_enabled() check as I was talking in > above i.e. > > @@ -38,6 +38,9 @@ static inline void arch_flush_lazy_mmu_mode(void) > { > struct ppc64_tlb_batch *batch; > > + if (radix_enabled()) > + return; > + > batch = this_cpu_ptr(&ppc64_tlb_batch); > > if (batch->index) > > Correct? Although otherwise also I don't think it should be a problem > because batch->index is only valid during hash, but I still think we can > add above check so that we don't have to call this_cpu_ptr() to check > for batch->index whenever flush is being called. You're right! I missed this because v3 had an extra patch (13) that turned all the lazy_mmu_mode_* into no-ops if radix_enabled(). The optimisation didn't seem to be worth the noise so I dropped it, but it does mean that arch_flush() will now be called in the nested case regardless of radix_enabled(). Will fix in v5, thanks! - Kevin From xen-devel-bounces@lists.xenproject.org Thu Nov 06 10:32:25 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 10:32:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156737.1485741 (Exim 4.92) (envelope-from ) id 1vGxI1-0007JK-GZ; Thu, 06 Nov 2025 10:32:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1156737.1485741; Thu, 06 Nov 2025 10:32:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGxI1-0007JD-Dy; Thu, 06 Nov 2025 10:32:25 +0000 Received: by outflank-mailman (input) for mailman id 1156737; Thu, 06 Nov 2025 10:32:24 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGxI0-0007J7-N1 for xen-devel@lists.xenproject.org; Thu, 06 Nov 2025 10:32:24 +0000 Received: from mail-ej1-x62f.google.com (mail-ej1-x62f.google.com [2a00:1450:4864:20::62f]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id e13e2558-bafb-11f0-980a-7dc792cee155; Thu, 06 Nov 2025 11:32:22 +0100 (CET) Received: by mail-ej1-x62f.google.com with SMTP id a640c23a62f3a-afcb7ae6ed0so130143666b.3 for ; Thu, 06 Nov 2025 02:32:22 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 06 Nov 2025 02:32:22 -0800 (PST) Message-ID: <97611b79-228c-40a6-9fb2-4571b2447258@suse.com> Date: Thu, 6 Nov 2025 11:32:24 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3] xen: Strip xen.efi by default To: Frediano Ziglio Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org, Frediano Ziglio References: <20251105153808.20278-1-frediano.ziglio@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251105153808.20278-1-frediano.ziglio@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 05.11.2025 16:38, Frediano Ziglio wrote: > From: Frediano Ziglio > > For xen.gz file we strip all symbols and have an additional > xen-syms file version with all symbols. > Make xen.efi more coherent stripping all symbols too. > xen-syms.efi can be used for debugging. > > Signed-off-by: Frediano Ziglio > --- > Changes since v1: > - avoid leaving target if some command fails. > > Changes since v2: > - do not convert type but retain PE format; > = use xen-syms.efi for new file name, more consistent with ELF. > --- > docs/misc/efi.pandoc | 8 +------- > xen/Kconfig.debug | 9 ++------- > xen/Makefile | 19 ------------------- > xen/arch/x86/Makefile | 9 ++++++--- > 4 files changed, 9 insertions(+), 36 deletions(-) > > diff --git a/docs/misc/efi.pandoc b/docs/misc/efi.pandoc > index 11c1ac3346..c66b18a66b 100644 > --- a/docs/misc/efi.pandoc > +++ b/docs/misc/efi.pandoc > @@ -20,13 +20,7 @@ Xen to load the configuration file even if multiboot modules are found. > Once built, `make install-xen` will place the resulting binary directly into > the EFI boot partition, provided `EFI_VENDOR` is set in the environment (and > `EFI_MOUNTPOINT` is overridden as needed, should the default of `/boot/efi` not > -match your system). When built with debug info, the binary can be quite large. > -Setting `INSTALL_EFI_STRIP=1` in the environment will cause it to be stripped > -of debug info in the process of installing. `INSTALL_EFI_STRIP` can also be set > -to any combination of options suitable to pass to `strip`, in case the default > -ones don't do. The xen.efi binary will also be installed in `/usr/lib64/efi/`, > -unless `EFI_DIR` is set in the environment to override this default. This > -binary will not be stripped in the process. > +match your system). > > The binary itself will require a configuration file (names with the `.efi` > extension of the binary's name replaced by `.cfg`, and - until an existing > diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug > index d900d926c5..58ee10ee3e 100644 > --- a/xen/Kconfig.debug > +++ b/xen/Kconfig.debug > @@ -147,12 +147,7 @@ config DEBUG_INFO > Say Y here if you want to build Xen with debug information. This > information is needed e.g. for doing crash dump analysis of the > hypervisor via the "crash" tool. > - Saying Y will increase the size of the xen-syms and xen.efi > - binaries. In case the space on the EFI boot partition is rather > - limited, you may want to install a stripped variant of xen.efi in > - the EFI boot partition (look for "INSTALL_EFI_STRIP" in > - docs/misc/efi.pandoc for more information - when not using > - "make install-xen" for installing xen.efi, stripping needs to be > - done outside the Xen build environment). > + Saying Y will increase the size of the xen-syms and xen.efi.elf > + binaries. Why xen.efi.elf and not xen-syms.efi? > --- a/xen/arch/x86/Makefile > +++ b/xen/arch/x86/Makefile > @@ -228,14 +228,17 @@ endif > $(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o > $(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds $< \ > $(dot-target).1r.o $(dot-target).1s.o $(orphan-handling-y) \ > - $(note_file_option) -o $@ > - $(NM) -pa --format=sysv $@ \ > + $(note_file_option) -o $@.tmp > + $(NM) -pa --format=sysv $@.tmp \ > | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > > $@.map > ifeq ($(CONFIG_DEBUG_INFO),y) > - $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) -O elf64-x86-64 $@ $@.elf > + $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))cp -f \ > + $@.tmp $(TARGET)-syms.efi > + $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(STRIP) $@.tmp > endif > rm -f $(dot-target).[0-9]* $(@D)/..$(@F).[0-9]* > + mv -f $@.tmp $@ > ifeq ($(CONFIG_XEN_IBT),y) > $(SHELL) $(srctree)/tools/check-endbr.sh $@ > endif I see $@.tmp here, but no sign of xen-syms. Did you submit a stake patch? Am I missing something? I also think the mv should sit ahead of the cleaning-up rm. Jan Jan From xen-devel-bounces@lists.xenproject.org Thu Nov 06 10:33:38 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 10:33:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156750.1485751 (Exim 4.92) (envelope-from ) id 1vGxJA-0007rK-Q4; Thu, 06 Nov 2025 10:33:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1156750.1485751; Thu, 06 Nov 2025 10:33:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGxJA-0007rD-Mf; Thu, 06 Nov 2025 10:33:36 +0000 Received: by outflank-mailman (input) for mailman id 1156750; Thu, 06 Nov 2025 10:33:35 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGxJ9-0007r5-Mt for xen-devel@lists.xenproject.org; Thu, 06 Nov 2025 10:33:35 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 0bf40853-bafc-11f0-9d17-b5c5bf9af7f9; Thu, 06 Nov 2025 11:33:34 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 260141596; Thu, 6 Nov 2025 02:33:26 -0800 (PST) Received: from [10.1.34.75] (unknown [10.1.34.75]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9451F3F66E; Thu, 6 Nov 2025 02:33:26 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 0bf40853-bafc-11f0-9d17-b5c5bf9af7f9 Message-ID: <1ac5be9f-fc05-463f-9512-74922acf8980@arm.com> Date: Thu, 6 Nov 2025 10:33:24 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 05/12] mm: introduce CONFIG_ARCH_HAS_LAZY_MMU_MODE To: "Ritesh Harjani (IBM)" , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-6-kevin.brodsky@arm.com> <87o6ph3xdq.ritesh.list@gmail.com> Content-Language: en-GB From: Kevin Brodsky In-Reply-To: <87o6ph3xdq.ritesh.list@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 05/11/2025 04:40, Ritesh Harjani (IBM) wrote: > Kevin Brodsky writes: > >> Architectures currently opt in for implementing lazy_mmu helpers by >> defining __HAVE_ARCH_ENTER_LAZY_MMU_MODE. >> >> In preparation for introducing a generic lazy_mmu layer that will >> require storage in task_struct, let's switch to a cleaner approach: >> instead of defining a macro, select a CONFIG option. >> >> This patch introduces CONFIG_ARCH_HAS_LAZY_MMU_MODE and has each >> arch select it when it implements lazy_mmu helpers. >> __HAVE_ARCH_ENTER_LAZY_MMU_MODE is removed and >> relies on the new CONFIG instead. >> >> On x86, lazy_mmu helpers are only implemented if PARAVIRT_XXL is >> selected. This creates some complications in arch/x86/boot/, because >> a few files manually undefine PARAVIRT* options. As a result >> does not define the lazy_mmu helpers, but this >> breaks the build as only defines them if >> !CONFIG_ARCH_HAS_LAZY_MMU_MODE. There does not seem to be a clean >> way out of this - let's just undefine that new CONFIG too. >> >> Signed-off-by: Kevin Brodsky >> --- >> arch/arm64/Kconfig | 1 + >> arch/arm64/include/asm/pgtable.h | 1 - >> arch/powerpc/include/asm/book3s/64/tlbflush-hash.h | 2 -- >> arch/powerpc/platforms/Kconfig.cputype | 1 + >> arch/sparc/Kconfig | 1 + >> arch/sparc/include/asm/tlbflush_64.h | 2 -- >> arch/x86/Kconfig | 1 + >> arch/x86/boot/compressed/misc.h | 1 + >> arch/x86/boot/startup/sme.c | 1 + >> arch/x86/include/asm/paravirt.h | 1 - >> include/linux/pgtable.h | 2 +- >> mm/Kconfig | 3 +++ >> 12 files changed, 10 insertions(+), 7 deletions(-) > Maybe we can add this to ... ? > > Documentation/features/vm/lazy_mmu/arch-support.txt > > # > # Feature name: lazy_mmu mode > # Kconfig: ARCH_HAS_LAZY_MMU_MODE > # description: arch supports arch_{enter|flush|leave}_lazy_mmu_mode() > # > ----------------------- > | arch |status| > ----------------------- > | arm64: | ok | > | powerpc: | ok | > | sparc: | ok | > | x86: | ok | > ----------------------- That's an interesting idea but I'm not sure it really makes sense for lazy MMU? AFAIU these arch-support.txt files are meant to help identify which generic features an arch has support for. Lazy MMU isn't really a feature though, in the sense that what it does is entirely defined by the arch. This patch does introduce a generic layer, but ultimately it remains a collection of arch hooks. > As for this patch, the changes are mostly straight forward around the > configs part. This looks good to me. Please feel free to add: > > Reviewed-by: Ritesh Harjani (IBM) Thanks for the review! - Kevin From xen-devel-bounces@lists.xenproject.org Thu Nov 06 10:38:47 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 10:38:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156763.1485763 (Exim 4.92) (envelope-from ) id 1vGxO7-00005r-Bo; Thu, 06 Nov 2025 10:38:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1156763.1485763; Thu, 06 Nov 2025 10:38:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGxO7-00005j-7e; Thu, 06 Nov 2025 10:38:43 +0000 Received: by outflank-mailman (input) for mailman id 1156763; Thu, 06 Nov 2025 10:38:42 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGxO5-00005d-Vg for xen-devel@lists.xenproject.org; Thu, 06 Nov 2025 10:38:41 +0000 Received: from mail-ed1-x534.google.com (mail-ed1-x534.google.com [2a00:1450:4864:20::534]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c1f8b9cf-bafc-11f0-9d17-b5c5bf9af7f9; Thu, 06 Nov 2025 11:38:40 +0100 (CET) Received: by mail-ed1-x534.google.com with SMTP id 4fb4d7f45d1cf-640a3317b89so1153220a12.0 for ; Thu, 06 Nov 2025 02:38:39 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 06 Nov 2025 02:38:39 -0800 (PST) Message-ID: Date: Thu, 6 Nov 2025 11:38:42 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 3/5] lib/arm: Add I/O memory copy helpers To: Oleksii Moisieiev Cc: Andrew Cooper , Anthony PERARD , Bertrand Marquis , Juergen Gross , Julien Grall , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Volodymyr Babchuk , "xen-devel@lists.xenproject.org" References: <33372689f3097b0dde1d47b81a1bb8176b35d20c.1761998077.git.oleksii_moisieiev@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <33372689f3097b0dde1d47b81a1bb8176b35d20c.1761998077.git.oleksii_moisieiev@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 01.11.2025 12:56, Oleksii Moisieiev wrote: > --- /dev/null > +++ b/xen/lib/arm/Makefile > @@ -0,0 +1 @@ > +obj-y += io.o Yet one more thing: For a library, I think every function wants to live in its own source file, such that under no conditions any unused code would be linked in. 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Thu, 06 Nov 2025 02:41:04 -0800 (PST) Message-ID: Date: Thu, 6 Nov 2025 05:40:59 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3] xen: Strip xen.efi by default To: Jan Beulich , Frediano Ziglio Cc: xen-devel@lists.xenproject.org, Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= References: <20251105153808.20278-1-frediano.ziglio@citrix.com> <98e2f19f-5fce-4ad1-b821-f5abb1f815f6@suse.com> Content-Language: en-US From: Demi Marie Obenour Autocrypt: addr=demiobenour@gmail.com; keydata= xsFNBFp+A0oBEADffj6anl9/BHhUSxGTICeVl2tob7hPDdhHNgPR4C8xlYt5q49yB+l2nipd aq+4Gk6FZfqC825TKl7eRpUjMriwle4r3R0ydSIGcy4M6eb0IcxmuPYfbWpr/si88QKgyGSV Z7GeNW1UnzTdhYHuFlk8dBSmB1fzhEYEk0RcJqg4AKoq6/3/UorR+FaSuVwT7rqzGrTlscnT DlPWgRzrQ3jssesI7sZLm82E3pJSgaUoCdCOlL7MMPCJwI8JpPlBedRpe9tfVyfu3euTPLPx wcV3L/cfWPGSL4PofBtB8NUU6QwYiQ9Hzx4xOyn67zW73/G0Q2vPPRst8LBDqlxLjbtx/WLR 6h3nBc3eyuZ+q62HS1pJ5EvUT1vjyJ1ySrqtUXWQ4XlZyoEFUfpJxJoN0A9HCxmHGVckzTRl 5FMWo8TCniHynNXsBtDQbabt7aNEOaAJdE7to0AH3T/Bvwzcp0ZJtBk0EM6YeMLtotUut7h2 Bkg1b//r6bTBswMBXVJ5H44Qf0+eKeUg7whSC9qpYOzzrm7+0r9F5u3qF8ZTx55TJc2g656C 9a1P1MYVysLvkLvS4H+crmxA/i08Tc1h+x9RRvqba4lSzZ6/Tmt60DPM5Sc4R0nSm9BBff0N m0bSNRS8InXdO1Aq3362QKX2NOwcL5YaStwODNyZUqF7izjK4QARAQABzTxEZW1pIE1hcmll IE9iZW5vdXIgKGxvdmVyIG9mIGNvZGluZykgPGRlbWlvYmVub3VyQGdtYWlsLmNvbT7CwXgE EwECACIFAlp+A0oCGwMGCwkIBwMCBhUIAgkKCwQWAgMBAh4BAheAAAoJELKItV//nCLBhr8Q AK/xrb4wyi71xII2hkFBpT59ObLN+32FQT7R3lbZRjVFjc6yMUjOb1H/hJVxx+yo5gsSj5LS 9AwggioUSrcUKldfA/PKKai2mzTlUDxTcF3vKx6iMXKA6AqwAw4B57ZEJoMM6egm57TV19kz PMc879NV2nc6+elaKl+/kbVeD3qvBuEwsTe2Do3HAAdrfUG/j9erwIk6gha/Hp9yZlCnPTX+ VK+xifQqt8RtMqS5R/S8z0msJMI/ajNU03kFjOpqrYziv6OZLJ5cuKb3bZU5aoaRQRDzkFIR 6aqtFLTohTo20QywXwRa39uFaOT/0YMpNyel0kdOszFOykTEGI2u+kja35g9TkH90kkBTG+a EWttIht0Hy6YFmwjcAxisSakBuHnHuMSOiyRQLu43ej2+mDWgItLZ48Mu0C3IG1seeQDjEYP tqvyZ6bGkf2Vj+L6wLoLLIhRZxQOedqArIk/Sb2SzQYuxN44IDRt+3ZcDqsPppoKcxSyd1Ny 2tpvjYJXlfKmOYLhTWs8nwlAlSHX/c/jz/ywwf7eSvGknToo1Y0VpRtoxMaKW1nvH0OeCSVJ itfRP7YbiRVc2aNqWPCSgtqHAuVraBRbAFLKh9d2rKFB3BmynTUpc1BQLJP8+D5oNyb8Ts4x Xd3iV/uD8JLGJfYZIR7oGWFLP4uZ3tkneDfYzsFNBFp+A0oBEAC9ynZI9LU+uJkMeEJeJyQ/ 8VFkCJQPQZEsIGzOTlPnwvVna0AS86n2Z+rK7R/usYs5iJCZ55/JISWd8xD57ue0eB47bcJv VqGlObI2DEG8TwaW0O0duRhDgzMEL4t1KdRAepIESBEA/iPpI4gfUbVEIEQuqdqQyO4GAe+M kD0Hy5JH/0qgFmbaSegNTdQg5iqYjRZ3ttiswalql1/iSyv1WYeC1OAs+2BLOAT2NEggSiVO txEfgewsQtCWi8H1SoirakIfo45Hz0tk/Ad9ZWh2PvOGt97Ka85o4TLJxgJJqGEnqcFUZnJJ riwoaRIS8N2C8/nEM53jb1sH0gYddMU3QxY7dYNLIUrRKQeNkF30dK7V6JRH7pleRlf+wQcN fRAIUrNlatj9TxwivQrKnC9aIFFHEy/0mAgtrQShcMRmMgVlRoOA5B8RTulRLCmkafvwuhs6 dCxN0GNAORIVVFxjx9Vn7OqYPgwiofZ6SbEl0hgPyWBQvE85klFLZLoj7p+joDY1XNQztmfA rnJ9x+YV4igjWImINAZSlmEcYtd+xy3Li/8oeYDAqrsnrOjb+WvGhCykJk4urBog2LNtcyCj kTs7F+WeXGUo0NDhbd3Z6AyFfqeF7uJ3D5hlpX2nI9no/ugPrrTVoVZAgrrnNz0iZG2DVx46 x913pVKHl5mlYQARAQABwsFfBBgBAgAJBQJafgNKAhsMAAoJELKItV//nCLBwNIP/AiIHE8b oIqReFQyaMzxq6lE4YZCZNj65B/nkDOvodSiwfwjjVVE2V3iEzxMHbgyTCGA67+Bo/d5aQGj gn0TPtsGzelyQHipaUzEyrsceUGWYoKXYyVWKEfyh0cDfnd9diAm3VeNqchtcMpoehETH8fr RHnJdBcjf112PzQSdKC6kqU0Q196c4Vp5HDOQfNiDnTf7gZSj0BraHOByy9LEDCLhQiCmr+2 E0rW4tBtDAn2HkT9uf32ZGqJCn1O+2uVfFhGu6vPE5qkqrbSE8TG+03H8ecU2q50zgHWPdHM OBvy3EhzfAh2VmOSTcRK+tSUe/u3wdLRDPwv/DTzGI36Kgky9MsDC5gpIwNbOJP2G/q1wT1o Gkw4IXfWv2ufWiXqJ+k7HEi2N1sree7Dy9KBCqb+ca1vFhYPDJfhP75I/VnzHVssZ/rYZ9+5 1yDoUABoNdJNSGUYl+Yh9Pw9pE3Kt4EFzUlFZWbE4xKL/NPno+z4J9aWemLLszcYz/u3XnbO vUSQHSrmfOzX3cV4yfmjM5lewgSstoxGyTx2M8enslgdXhPthZlDnTnOT+C+OTsh8+m5tos8 HQjaPM01MKBiAqdPgksm1wu2DrrwUi6ChRVTUBcj6+/9IJ81H2P2gJk3Ls3AVIxIffLoY34E +MYSfkEjBz0E8CLOcAw7JIwAaeBT In-Reply-To: <98e2f19f-5fce-4ad1-b821-f5abb1f815f6@suse.com> Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------593kG1U3oOX9eLmTLCNIK5Gu" This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------593kG1U3oOX9eLmTLCNIK5Gu Content-Type: multipart/mixed; boundary="------------xwuChLOhtgBM5Jv29d20D0lK"; protected-headers="v1" From: Demi Marie Obenour To: Jan Beulich , Frediano Ziglio Cc: xen-devel@lists.xenproject.org, Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= Message-ID: Subject: Re: [PATCH v3] xen: Strip xen.efi by default References: <20251105153808.20278-1-frediano.ziglio@citrix.com> <98e2f19f-5fce-4ad1-b821-f5abb1f815f6@suse.com> In-Reply-To: <98e2f19f-5fce-4ad1-b821-f5abb1f815f6@suse.com> Autocrypt-Gossip: addr=marmarek@invisiblethingslab.com; keydata= xsBNBE5j9EwBCACbYHjxDrxFAY3n1x9KBFvjzkG1qFSTVBnH4vpD/5Na4sZq4uDDMUCjivrm MzbWYaivYj96BygdOiw7PWxYrhuW0b2WYOeGudZyApgFz42g458s78EciuhgfuWBlxr8dOEN /9ueVFHcvtZmDbHhMVPcQ0O7gwh0JmwkOsf7P7WAfYXsQlhO/EBRrNXR0Je+GEpYADhRktxX h1d3Iz+oKYuwHioLX8ovoAT4+peOuecWUSpUWebpDbTR5i7NRP3PIblB4KzWJa2kh/f3mx4v SRGnHn+BfX42xSe0X7Ktl4Xf+KNq9Wkcjk2CZP57hV2v4pO0ZUOXD7IhlZtnfNj67WjdABEB AAHNPU1hcmVrIE1hcmN6eWtvd3NraS1Hw7NyZWNraSA8bWFybWFyZWtAaW52aXNpYmxldGhp bmdzbGFiLmNvbT7CwHoEEwEIACQCGwMFCwkIBwMFFQoJCAsFFgIDAQACHgECF4AFAll+l7cC GQEACgkQ24/THMrX1yw6kAgAiKiUhzAPXZj5ndqiQDl8u8PUK34SupLzYNMJOCBw5Wh+CPHe XYlQUwfULWxmzjiWCzzWDx2X/ONsYdRGKDKMqG5srOSWe1IYXv00MEutGsK+m/hmC5mqi/97 DVNZ1VtKj5WW79IsI0/7ueHsQYNNrXyOfZvKsRE8VIUJ0tNfLFDFlNpq9jONuF+GviMWxrA5 FoVaGmjh63xC0fOQYqhP2v8dbYS4B6bO5NZKI2cTHb9Li2iY0e7wIoNgvqgtR3Iv2U2Ry0yL D3mNQhwyxcWChexlymjfqLEZwKqaIOo57HOpt7OA+bMg6MvkdUTjNWf2GE6fqCcALjcToJ3L NDc1KM7ATQROY/RMAQgAtRWgUZ5mOy+c/qzmiVnxqDkiOJjmnIh3Pn+OqCtjcrTyPI9eVc06 uH30Jkco0soLiG/UgwVw4XwBlm95j9n6TSUms4mPBh1YiR1hBjsjYwn8zp/Ue9xWk1N6E14H aj55GxmS2H3YIlOXfQLr0X3RHsmKixTOKyisrYlJu71FmettDFV7CgMXy1Bc1LbAE08asvAS ShHFdRiRRtkuVHvY/Ebq9L54kOxtlI6ahrflMcT0YCMON5oe4GgQRh3p2uy+d/LS2bgRcQST IebErj8x0lM271f97GvxV/ypHo7XVIDI5FX1u31Agzx3HQr035GHt4HV4/GVCz+V4xt4BonB tQARAQABwsBfBBgBAgAJBQJOY/RMAhsMAAoJENuP0xzK19cs5MgH/jWLXil2Ud4TdtWnBxc+ 2/QZZk2JCssc1PgWNzvH5wH7U+8lGSlUK8ZMOqrrF8C5rX0+xEn7deSrsZChIOnUFo8rhCZK y/mBV+FhkMj24FZZ0n8w3eF4KF2t68Pt+AvMjxQHwxAMdf3QftgQhD0qYkt/28eedUQ+jwz6 kipc4qUQmqTEViQRPa3WAnKgNDQUDUwNruzthfGvHUjllf7zbPI8gkbARM0KlTkLikc9u+Ni VMbJTiGPB7YHyw2MIPq1n+mhSPAyXE6CVBnYkonQ7P3SLZssxC3PIarV+DTU68umQB3pfrfF 7hMcAY5csWrK9/x/Zz4RUfgN6Q3HLrSp9UQ= --------------xwuChLOhtgBM5Jv29d20D0lK Content-Type: multipart/mixed; boundary="------------K7SAaHIwDKVZ384xYkDCeOV8" --------------K7SAaHIwDKVZ384xYkDCeOV8 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On 11/6/25 05:28, Jan Beulich wrote: > On 06.11.2025 10:58, Frediano Ziglio wrote: >> On Thu, 6 Nov 2025 at 03:52, Demi Marie Obenour wrote: >>> Does objdump on the signed file return correct section names? >> >> From objdump -x >> >> Sections: >> Idx Name Size VMA LMA File o= ff Algn >> 0 .text 0016c9ae ffff82d040200000 ffff82d040200000 000003= 20 2**4 >> CONTENTS, ALLOC, LOAD, READONLY, CODE >> 1 .rodata 0006b9e8 ffff82d040400000 ffff82d040400000 0016cc= e0 2**2 >> CONTENTS, ALLOC, LOAD, DATA >> 2 .buildid 00000035 ffff82d04046c000 ffff82d04046c000 001d86= e0 2**2 >> CONTENTS, ALLOC, LOAD, READONLY, DATA >> 3 .init.text 0004d123 ffff82d040600000 ffff82d040600000 001d87= 20 2**2 >> CONTENTS, ALLOC, LOAD, READONLY, CODE >> 4 .init.data 0006c9b0 ffff82d040800000 ffff82d040800000 002258= 60 2**2 >> CONTENTS, ALLOC, LOAD, DATA >> 5 .data.read_mostly 00028da8 ffff82d040a00000 ffff82d040a00000 >> 00292220 2**4 >> CONTENTS, ALLOC, LOAD, DATA >> 6 .data 0000feec ffff82d040a29000 ffff82d040a29000 002baf= e0 2**4 >> CONTENTS, ALLOC, LOAD, DATA >> 7 .bss 00223108 ffff82d040a39000 ffff82d040a39000 000000= 00 2**4 >> ALLOC >> 8 .reloc 000016b8 ffff82d040c5d000 ffff82d040c5d000 002cae= e0 2**2 >> CONTENTS, ALLOC, LOAD, READONLY, DATA >> 9 .sbat 000000a6 ffff82d040c5f000 ffff82d040c5f000 002cc5= a0 2**2 >> CONTENTS, READONLY >> >> Which looks correct. >> >> From hexdump -C I can see close to the end >> >> ... >> 002cc580 30 ae 38 ae 60 ae 00 00 00 80 a3 00 10 00 00 00 |0.8.`....= =2E......| >> 002cc590 a0 ae c0 ae e0 ae 00 00 00 00 00 00 00 00 00 00 |.........= =2E......| >> 002cc5a0 73 62 61 74 2c 31 2c 53 42 41 54 20 56 65 72 73 |sbat,1,SB= AT Vers| >> 002cc5b0 69 6f 6e 2c 73 62 61 74 2c 31 2c 68 74 74 70 73 |ion,sbat,= 1,https| >> 002cc5c0 3a 2f 2f 67 69 74 68 75 62 2e 63 6f 6d 2f 72 68 |://github= =2Ecom/rh| >> 002cc5d0 62 6f 6f 74 2f 73 68 69 6d 2f 62 6c 6f 62 2f 6d |boot/shim= /blob/m| >> 002cc5e0 61 69 6e 2f 53 42 41 54 2e 6d 64 0a 78 65 6e 2e |ain/SBAT.= md.xen.| >> 002cc5f0 78 73 2c 31 2c 43 6c 6f 75 64 20 53 6f 66 74 77 |xs,1,Clou= d Softw| >> 002cc600 61 72 65 20 47 72 6f 75 70 2c 78 65 6e 2c 34 2e |are Group= ,xen,4.| >> 002cc610 32 30 2e 31 2d 37 2e 32 32 2e 67 33 65 30 36 37 |20.1-7.22= =2Eg3e067| >> 002cc620 32 36 62 2e 78 73 39 2c 6d 61 69 6c 74 6f 3a 73 |26b.xs9,m= ailto:s| >> 002cc630 65 63 75 72 69 74 79 40 78 65 6e 73 65 72 76 65 |ecurity@x= enserve| >> 002cc640 72 2e 63 6f 6d 0a 00 00 00 00 00 00 00 00 00 00 |r.com....= =2E......| >> 002cc650 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |.........= =2E......| >> 002cc660 2c 00 00 00 2e 69 6e 69 74 2e 74 65 78 74 00 2e |,....init= =2Etext..| >> 002cc670 69 6e 69 74 2e 64 61 74 61 00 2e 64 61 74 61 2e |init.data= =2E.data.| >> 002cc680 72 65 61 64 5f 6d 6f 73 74 6c 79 00 00 00 00 00 |read_most= ly.....| >> 002cc690 9e 05 00 00 00 02 02 00 30 82 05 92 06 09 2a 86 |........0= =2E....*.| >> 002cc6a0 48 86 f7 0d 01 07 02 a0 82 05 83 30 82 05 7f 02 |H........= =2E.0....| >> 002cc6b0 01 01 31 0f 30 0d 06 09 60 86 48 01 65 03 04 02 |..1.0...`= =2EH.e...| >> 002cc6c0 01 05 00 30 5c 06 0a 2b 06 01 04 01 82 37 02 01 |...0\..+.= =2E...7..| >> 002cc6d0 04 a0 4e 30 4c 30 17 06 0a 2b 06 01 04 01 82 37 |..N0L0...= +.....7| >> 002cc6e0 02 01 0f 30 09 03 01 00 a0 04 a2 02 80 00 30 31 |...0.....= =2E....01| >> 002cc6f0 30 0d 06 09 60 86 48 01 65 03 04 02 01 05 00 04 |0...`.H.e= =2E......| >> 002cc700 20 e2 47 64 f8 e8 7b 62 eb 17 e0 13 0a 0d 93 02 | .Gd..{b.= =2E......| >> 002cc710 7a d8 3b f0 20 a8 ee 3d 49 98 3f de c1 47 de 15 |z.;. ..=3D= I.?..G..| >> 002cc720 43 a0 82 03 2c 30 82 03 28 30 82 02 10 a0 03 02 |C...,0..(= 0......| >> 002cc730 01 02 02 11 00 8f fc 11 bf 41 54 40 74 89 2c 53 |.........= AT@t.,S| >> 002cc740 a5 78 c1 e8 32 30 0d 06 09 2a 86 48 86 f7 0d 01 |.x..20...= *.H....| >> 002cc750 01 0b 05 00 30 1c 31 1a 30 18 06 03 55 04 03 13 |....0.1.0= =2E..U...| >> 002cc760 11 58 65 6e 53 65 72 76 65 72 20 58 65 6e 20 64 |.XenServe= r Xen d| >> 002cc770 65 76 30 1e 17 0d 32 35 30 33 32 30 31 36 35 35 |ev0...250= 3201655| >> 002cc780 30 37 5a 17 0d 33 37 30 31 31 39 30 33 31 34 30 |07Z..3701= 1903140| >> 002cc790 37 5a 30 1c 31 1a 30 18 06 03 55 04 03 13 11 58 |7Z0.1.0..= =2EU....X| >> 002cc7a0 65 6e 53 65 72 76 65 72 20 58 65 6e 20 64 65 76 |enServer = Xen dev| >> ... >> >> So, this confirms that the string table is there to support larger >> section names and the signature is there and it's working. >=20 > But is it going to work on all EFI implementations, or merely the one y= ou tried? > Of course it would help if Demi could give more concrete pointers to (p= ossible) > implementations where there might be (known? suspected?) issues. >=20 > Jan I misread the PE hashing code in EDK2. I assumed it mishandled the case = where there is data *between* the sections and the signature, but it actually m= ishandles the case where there is data *after* the signature. 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Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 10:52:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156790.1485782 (Exim 4.92) (envelope-from ) id 1vGxau-0003bS-OV; Thu, 06 Nov 2025 10:51:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1156790.1485782; Thu, 06 Nov 2025 10:51:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGxau-0003bL-Lk; Thu, 06 Nov 2025 10:51:56 +0000 Received: by outflank-mailman (input) for mailman id 1156790; Thu, 06 Nov 2025 10:51:56 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGxau-0003bF-50 for xen-devel@lists.xenproject.org; Thu, 06 Nov 2025 10:51:56 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 9b259ac1-bafe-11f0-980a-7dc792cee155; Thu, 06 Nov 2025 11:51:53 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 20A081596; Thu, 6 Nov 2025 02:51:45 -0800 (PST) Received: from [10.1.34.75] (unknown [10.1.34.75]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6866A3F63F; Thu, 6 Nov 2025 02:51:46 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 9b259ac1-bafe-11f0-980a-7dc792cee155 Message-ID: <48a4ecb5-3412-4d3f-9e43-535f8bee505f@arm.com> Date: Thu, 6 Nov 2025 10:51:43 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 07/12] mm: enable lazy_mmu sections to nest To: Alexander Gordeev , Ritesh Harjani Cc: linux-mm@kvack.org, linux-kernel@vger.kernel.org, Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-8-kevin.brodsky@arm.com> <87ms5050g0.ritesh.list@gmail.com> <50d1b63a-88d7-4484-82c0-3bde96e3207d-agordeev@linux.ibm.com> Content-Language: en-GB From: Kevin Brodsky In-Reply-To: <50d1b63a-88d7-4484-82c0-3bde96e3207d-agordeev@linux.ibm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 05/11/2025 16:12, Alexander Gordeev wrote: > On Wed, Nov 05, 2025 at 02:19:03PM +0530, Ritesh Harjani wrote: >>> + * in_lazy_mmu_mode() can be used to check whether the lazy MMU mode is >>> + * currently enabled. >>> */ >>> #ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE >>> static inline void lazy_mmu_mode_enable(void) >>> { >>> - arch_enter_lazy_mmu_mode(); >>> + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; >>> + >>> + VM_WARN_ON_ONCE(state->nesting_level == U8_MAX); >>> + /* enable() must not be called while paused */ >>> + VM_WARN_ON(state->nesting_level > 0 && !state->active); >>> + >>> + if (state->nesting_level++ == 0) { >>> + state->active = true; >>> + arch_enter_lazy_mmu_mode(); >>> + } >>> } >> Some architectures disables preemption in their >> arch_enter_lazy_mmu_mode(). So shouldn't the state->active = true should >> happen after arch_enter_lazy_mmu_mode() has disabled preemption()? i.e. > Do you have some scenario in mind that could cause an issue? > IOW, what could go wrong if the process is scheduled to another > CPU before preempt_disable() is called? I'm not sure I understand the issue either. >> static inline void lazy_mmu_mode_enable(void) >> { >> - arch_enter_lazy_mmu_mode(); >> + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; >> + >> + VM_WARN_ON_ONCE(state->nesting_level == U8_MAX); >> + /* enable() must not be called while paused */ >> + VM_WARN_ON(state->nesting_level > 0 && !state->active); >> + >> + if (state->nesting_level++ == 0) { >> + arch_enter_lazy_mmu_mode(); >> + state->active = true; >> + } >> } >> >> ... I think it make more sense to enable the state after the arch_** >> call right. > But then in_lazy_mmu_mode() would return false if called from > arch_enter_lazy_mmu_mode(). Not big problem, but still.. The ordering of nesting_level/active was the way you expected in v3, but the conclusion of the discussion with David H [1] is that it doesn't really matter so I simplified the ordering in v4 - the arch hooks shouldn't call in_lazy_mmu_mode() or inspect lazy_mmu_state. arch_enter()/arch_leave() shouldn't need it anyway since they're called once per outer section (not in nested sections). arch_flush() could potentially do something different when nested, but that seems unlikely. - Kevin [1] https://lore.kernel.org/all/af4414b6-617c-4dc8-bddc-3ea00d1f6f3b@redhat.com/ From xen-devel-bounces@lists.xenproject.org Thu Nov 06 11:36:20 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 11:36:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156811.1485792 (Exim 4.92) (envelope-from ) id 1vGyHe-0000fT-4U; Thu, 06 Nov 2025 11:36:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1156811.1485792; Thu, 06 Nov 2025 11:36:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGyHe-0000fM-0u; Thu, 06 Nov 2025 11:36:06 +0000 Received: by outflank-mailman (input) for mailman id 1156811; Thu, 06 Nov 2025 11:36:04 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGyHc-0000ei-IT for xen-devel@lists.xenproject.org; Thu, 06 Nov 2025 11:36:04 +0000 Received: from mail-ej1-x62d.google.com (mail-ej1-x62d.google.com [2a00:1450:4864:20::62d]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c2600a71-bb04-11f0-9d17-b5c5bf9af7f9; Thu, 06 Nov 2025 12:35:56 +0100 (CET) Received: by mail-ej1-x62d.google.com with SMTP id a640c23a62f3a-b719ca8cb8dso179155466b.0 for ; Thu, 06 Nov 2025 03:35:56 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 06 Nov 2025 03:35:55 -0800 (PST) Message-ID: Date: Thu, 6 Nov 2025 12:35:58 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH v7] x86: make Viridian support optional To: Grygorii Strashko Cc: Sergiy Kibrik , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Paul Durrant , Alejandro Vallejo , Jason Andryuk , "xen-devel@lists.xenproject.org" References: <20251031161716.1222956-1-grygorii_strashko@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251031161716.1222956-1-grygorii_strashko@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 31.10.2025 17:17, Grygorii Strashko wrote: > --- a/xen/arch/x86/hvm/Makefile > +++ b/xen/arch/x86/hvm/Makefile > @@ -1,6 +1,6 @@ > obj-$(CONFIG_AMD_SVM) += svm/ > obj-$(CONFIG_INTEL_VMX) += vmx/ > -obj-y += viridian/ > +obj-$(CONFIG_VIRIDIAN) += viridian/ With this, what is the point of the additions to viridian_load_{domain,vcpu}_ctxt()? You're adding dead code there, aren't you? > --- a/xen/arch/x86/hvm/hvm.c > +++ b/xen/arch/x86/hvm/hvm.c > @@ -4231,8 +4231,9 @@ static int hvm_set_param(struct domain *d, uint32_t index, uint64_t value) > rc = -EINVAL; > break; > case HVM_PARAM_VIRIDIAN: > - if ( (value & ~HVMPV_feature_mask) || > - !(value & HVMPV_base_freq) ) > + if ( !IS_ENABLED(CONFIG_VIRIDIAN) && value ) > + rc = -ENODEV; > + else if ( (value & ~HVMPV_feature_mask) || !(value & HVMPV_base_freq) ) > rc = -EINVAL; I find the check for value to be (non-)zero a little dubious here: If any caller passed in 0, it would get back -EINVAL anyway. Imo -ENODEV would be more suitable in that case as well. Things would be different if 0 was a valid value to pass in. Jan From xen-devel-bounces@lists.xenproject.org Thu Nov 06 12:00:57 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 12:00:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156830.1485802 (Exim 4.92) (envelope-from ) id 1vGyfc-0004Vg-4m; Thu, 06 Nov 2025 12:00:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1156830.1485802; Thu, 06 Nov 2025 12:00:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGyfc-0004VZ-19; Thu, 06 Nov 2025 12:00:52 +0000 Received: by outflank-mailman (input) for mailman id 1156830; Thu, 06 Nov 2025 12:00:50 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGyfa-0004VK-P4 for xen-devel@lists.xenproject.org; Thu, 06 Nov 2025 12:00:50 +0000 Received: from mail-ej1-x629.google.com (mail-ej1-x629.google.com [2a00:1450:4864:20::629]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 38611bcb-bb08-11f0-9d17-b5c5bf9af7f9; Thu, 06 Nov 2025 13:00:43 +0100 (CET) Received: by mail-ej1-x629.google.com with SMTP id a640c23a62f3a-afcb7ae6ed0so144311466b.3 for ; Thu, 06 Nov 2025 04:00:42 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 06 Nov 2025 04:00:42 -0800 (PST) Message-ID: Date: Thu, 6 Nov 2025 13:00:41 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH] xen: make VMTRACE support optional To: Grygorii Strashko Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Tamas K Lengyel , Alexandru Isaila , Petre Pircalabu , Penny Zheng , "xen-devel@lists.xenproject.org" References: <20251031212005.1338212-1-grygorii_strashko@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251031212005.1338212-1-grygorii_strashko@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 31.10.2025 22:20, Grygorii Strashko wrote: > --- a/xen/Kconfig.debug > +++ b/xen/Kconfig.debug > @@ -155,4 +155,19 @@ config DEBUG_INFO > "make install-xen" for installing xen.efi, stripping needs to be > done outside the Xen build environment). > > +config HAS_VMTRACE > + bool > + > +config VMTRACE > + bool "HW VM tracing support" > + depends on HAS_VMTRACE > + default y > + help > + Enables HW VM tracing support which allows to configure HW processor > + features (vmtrace_op) to enable capturing information about software > + execution using dedicated hardware facilities with minimal interference > + to the software being traced. The trace date can be retrieved using buffer Nit: s/date/data/ > + shared between Xen and domain > + (see XENMEM_acquire_resource(XENMEM_resource_vmtrace_buf)). > + I was actually meaning to ask that "VMX only" should somehow be mentioned here, but then I noticed this is an arch-independent location. I'm not quite sure we want it like this (just yet). > @@ -2940,11 +2948,13 @@ static struct hvm_function_table __initdata_cf_clobber vmx_function_table = { > .altp2m_vcpu_emulate_ve = vmx_vcpu_emulate_ve, > .altp2m_vcpu_emulate_vmfunc = vmx_vcpu_emulate_vmfunc, > #endif > +#ifdef CONFIG_VMTRACE > .vmtrace_control = vmtrace_control, > .vmtrace_output_position = vmtrace_output_position, > .vmtrace_set_option = vmtrace_set_option, > .vmtrace_get_option = vmtrace_get_option, > .vmtrace_reset = vmtrace_reset, > +#endif > > .get_reg = vmx_get_reg, > .set_reg = vmx_set_reg, Blank line ahead of the new #ifdef? > @@ -738,6 +740,7 @@ static inline bool altp2m_vcpu_emulate_ve(struct vcpu *v) > bool altp2m_vcpu_emulate_ve(struct vcpu *v); > #endif /* CONFIG_ALTP2M */ > > +#ifdef CONFIG_VMTRACE > static inline int hvm_vmtrace_control(struct vcpu *v, bool enable, bool reset) > { > if ( hvm_funcs.vmtrace_control ) > @@ -780,6 +783,12 @@ static inline int hvm_vmtrace_reset(struct vcpu *v) > > return -EOPNOTSUPP; > } > +#else > +static inline int hvm_vmtrace_reset(struct vcpu *v) > +{ > + return 0; > +} > +#endif #ifdef inside the function body please, to reduce redundancy and to reduce the risk of overlooking multiple places which need editing (when e.g. function parameters change). > --- a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h > +++ b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h > @@ -155,7 +155,9 @@ struct vmx_vcpu { > bool ept_spurious_misconfig; > > /* Processor Trace configured and enabled for the vcpu. */ > +#ifdef CONFIG_VMTRACE > bool ipt_active; > +#endif Imo such an #ifdef would better enclose the comment as well. > --- a/xen/arch/x86/vm_event.c > +++ b/xen/arch/x86/vm_event.c > @@ -253,7 +253,9 @@ void vm_event_fill_regs(vm_event_request_t *req) > req->data.regs.x86.shadow_gs = ctxt.shadow_gs; > req->data.regs.x86.dr6 = ctxt.dr6; > > +#ifdef CONFIG_VMTRACE > if ( hvm_vmtrace_output_position(curr, &req->data.regs.x86.vmtrace_pos) != 1 ) > +#endif > req->data.regs.x86.vmtrace_pos = ~0; > #endif > } Use IS_ENABLED() together with a function declaration (but no definition) in the VMTRACE=n case? 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Thu, 06 Nov 2025 04:10:00 -0800 (PST) Message-ID: <58064c07-4182-48d8-9479-7b9f8e9a06cd@suse.com> Date: Thu, 6 Nov 2025 13:09:59 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH for-4.22 v2] acpi: Set TPM2 LAML to actual log area size To: Tu Dinh Cc: Anthony PERARD , Daniel Smith , Andrew Cooper , xen-devel@lists.xenproject.org References: <20251105000310.690-1-ngoc-tu.dinh@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251105000310.690-1-ngoc-tu.dinh@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 05.11.2025 01:03, Tu Dinh wrote: > The LAML field should follow the TCG PFP specification: > > The TCG ACPI specification uses the field name "Log Area Minimum > Length", but the field value is the actual log area length reserved by > Platform Firmware, not a lower bound. And this is said where? Even the field description (ACPI 6.5) reads "Identifies the minimum length (in bytes) of the system’s preboot CC event log area." (I agree it makes little sense that way, but the change still needs proper explanation.) Jan From xen-devel-bounces@lists.xenproject.org Thu Nov 06 12:13:40 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 12:13:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156853.1485823 (Exim 4.92) (envelope-from ) id 1vGyry-0006iF-FC; Thu, 06 Nov 2025 12:13:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1156853.1485823; Thu, 06 Nov 2025 12:13:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGyry-0006i8-AY; Thu, 06 Nov 2025 12:13:38 +0000 Received: by outflank-mailman (input) for mailman id 1156853; Thu, 06 Nov 2025 12:13:37 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGyrx-0006i2-Ja for xen-devel@lists.xenproject.org; Thu, 06 Nov 2025 12:13:37 +0000 Received: from mail180-3.suw31.mandrillapp.com (mail180-3.suw31.mandrillapp.com [198.2.180.3]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 01e7be5f-bb0a-11f0-980a-7dc792cee155; Thu, 06 Nov 2025 13:13:31 +0100 (CET) Received: from pmta11.mandrill.prod.suw01.rsglab.com (localhost [127.0.0.1]) by mail180-3.suw31.mandrillapp.com (Mailchimp) with ESMTP id 4d2Lgs4KjyzDRJBZK for ; Thu, 6 Nov 2025 12:13:29 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id d6ce765204354a948c0d9e2caf16a0be; Thu, 06 Nov 2025 12:13:29 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 01e7be5f-bb0a-11f0-980a-7dc792cee155 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1762431209; x=1762701209; bh=q/F5YpCmmdV33F13faW5XH1C9OtX3cyGzeYv1jtr4PU=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=GW94OZl/q+w0u9HQdftcbmkcYgvZsFLmAVOsF1dYLWURo1T023qdXz/M1MkTEuHwC wX4ho3vXv3kDOvcY89SYvf6YSlLkEpJahMcvVKJ+tROIhcr7noNEhxM+5pvKDxD5kf viXxGOiri9lRZsLwqsI7paoN1TLHH7adYyUNyvdJvw+mgYWypFSRkixQ5jc0J/8iYT 0yCWJxE0jUO8T7o+JpcBPsq+tAmxNfnJMrjnNUL7VpmKKfGMTU8i8MjWHDkRY6EPfy MO11pqJa0biGVKuxSlbi6m/bDFUXLLHzRiyRSJxiAYZlNsRNCJYx8wWMZ+hcFyHbXb J/fk5CrPaKGcQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1762431209; x=1762691709; i=ngoc-tu.dinh@vates.tech; bh=q/F5YpCmmdV33F13faW5XH1C9OtX3cyGzeYv1jtr4PU=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=Hwji8ifV4NUi6ncVRB9dsZBHBRSIWs3LwLlSjAzDz7UrMdxSZa1/ZC9no7bjzbI8+ jE7w6OR+OLNnlAh8BqZE4kKhXW8lBsLmGz4ABFwsQcLt5aea/vpPSpmYvMYLvAJKh1 r0LsRewzucM7epGl0QWzseoyrt7s/TONceWRq9Uk8R8UGVCiywf/04owBSOf1Q5dLE fn2JRN47vjqHbdQr9R6tERad+4N6k1qdrxqjTwtxd97mbsXaurDyM0CDlgDQitunp/ Zg+axJSMZ3d9h3UDMQ8InGSoJt59eBkelIR+od7PyIERtDVHTndydE5NLcFhwAYZvC A6khBYGjzubdQ== From: "Tu Dinh" Subject: =?utf-8?Q?Re:=20[PATCH=20for-4.22=20v2]=20acpi:=20Set=20TPM2=20LAML=20to=20actual=20log=20area=20size?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1762431208538 Message-Id: To: "Jan Beulich" Cc: "Anthony PERARD" , "Daniel Smith" , "Andrew Cooper" , xen-devel@lists.xenproject.org References: <20251105000310.690-1-ngoc-tu.dinh@vates.tech> <58064c07-4182-48d8-9479-7b9f8e9a06cd@suse.com> In-Reply-To: <58064c07-4182-48d8-9479-7b9f8e9a06cd@suse.com> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.d6ce765204354a948c0d9e2caf16a0be?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20251106:md Date: Thu, 06 Nov 2025 12:13:29 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On 06/11/2025 13:10, Jan Beulich wrote: > On 05.11.2025 01:03, Tu Dinh wrote: >> The LAML field should follow the TCG PFP specification: >> >> The TCG ACPI specification uses the field name "Log Area Minimum >> Length", but the field value is the actual log area length reserved by >> Platform Firmware, not a lower bound. > > And this is said where? Even the field description (ACPI 6.5) reads "Iden= tifies > the minimum length (in bytes) of the system=E2=80=99s preboot CC event lo= g area." (I > agree it makes little sense that way, but the change still needs proper > explanation.) > > Jan The above is an exact quote from the "TCG PC Client Platform Firmware Profile Specification Version 1.06 Revision 52". -- Ngoc Tu Dinh | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Thu Nov 06 12:15:22 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 12:15:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156867.1485832 (Exim 4.92) (envelope-from ) id 1vGytY-0007G4-O7; Thu, 06 Nov 2025 12:15:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1156867.1485832; Thu, 06 Nov 2025 12:15:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGytY-0007Fx-Kh; Thu, 06 Nov 2025 12:15:16 +0000 Received: by outflank-mailman (input) for mailman id 1156867; Thu, 06 Nov 2025 12:15:15 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGytX-0007Fp-Li for xen-devel@lists.xenproject.org; Thu, 06 Nov 2025 12:15:15 +0000 Received: from mail-ej1-x629.google.com (mail-ej1-x629.google.com [2a00:1450:4864:20::629]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 3f3e5b1e-bb0a-11f0-9d17-b5c5bf9af7f9; Thu, 06 Nov 2025 13:15:13 +0100 (CET) Received: by mail-ej1-x629.google.com with SMTP id a640c23a62f3a-b713c7096f9so65444766b.3 for ; Thu, 06 Nov 2025 04:15:13 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 06 Nov 2025 04:15:12 -0800 (PST) Message-ID: <39458e03-31c1-4aa6-8b66-f6d72ec8bdd9@suse.com> Date: Thu, 6 Nov 2025 13:15:12 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 5/8] xen/pci: introduce has_vpci_bridge To: Mykyta Poturai Cc: Stefano Stabellini , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stewart Hildebrand , "xen-devel@lists.xenproject.org" References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 24.09.2025 09:59, Mykyta Poturai wrote: > From: Stefano Stabellini > > has_vpci_bridge is a macro to check if the domain is a domU or is dom0 > with vPCI (pci-scan=yes) enabled. Hmm. Why would DomU-s, now and forever, not have (virtual) bridges? Wasn't them gaining (virtual) bridges actually the longer-term plan? > --- a/xen/drivers/vpci/header.c > +++ b/xen/drivers/vpci/header.c > @@ -230,7 +230,7 @@ bool vpci_process_pending(struct vcpu *v) > > read_unlock(&v->domain->pci_lock); > > - if ( !is_hardware_domain(v->domain) ) > + if ( has_vpci_bridge(v->domain) ) > domain_crash(v->domain); > > return false; > @@ -492,7 +492,7 @@ static int modify_bars(const struct pci_dev *pdev, uint16_t cmd, bool rom_only) > } > } > > - if ( !is_hardware_domain(d) ) > + if ( has_vpci_bridge(d) ) > break; > > d = dom_xen; > @@ -522,7 +522,7 @@ static void cf_check cmd_write( > { > struct vpci_header *header = data; > > - if ( !is_hardware_domain(pdev->domain) ) > + if ( has_vpci_bridge(pdev->domain) ) > { > const struct vpci *vpci = pdev->vpci; > > @@ -564,7 +564,7 @@ static void cf_check bar_write( > struct vpci_bar *bar = data; > bool hi = false; > > - ASSERT(is_hardware_domain(pdev->domain)); > + ASSERT(!has_vpci_bridge(pdev->domain)); > > if ( bar->type == VPCI_BAR_MEM64_HI ) > { > @@ -747,7 +747,7 @@ static int vpci_init_capability_list(struct pci_dev *pdev) > { > int rc; > bool mask_cap_list = false; > - bool is_hwdom = is_hardware_domain(pdev->domain); > + bool is_hwdom = !has_vpci_bridge(pdev->domain); > > if ( pci_conf_read16(pdev->sbdf, PCI_STATUS) & PCI_STATUS_CAP_LIST ) > { > @@ -829,7 +829,7 @@ static int vpci_init_ext_capability_list(const struct pci_dev *pdev) > { > unsigned int pos = PCI_CFG_SPACE_SIZE; > > - if ( !is_hardware_domain(pdev->domain) ) > + if ( has_vpci_bridge(pdev->domain) ) > /* Extended capabilities read as zero, write ignore for DomU */ > return vpci_add_register(pdev->vpci, vpci_read_val, NULL, > pos, 4, (void *)0); > @@ -866,7 +866,7 @@ int vpci_init_header(struct pci_dev *pdev) > struct vpci_header *header = &pdev->vpci->header; > struct vpci_bar *bars = header->bars; > int rc; > - bool is_hwdom = is_hardware_domain(pdev->domain); > + bool is_hwdom = !has_vpci_bridge(pdev->domain); > > ASSERT(rw_is_write_locked(&pdev->domain->pci_lock)); For none of the changes (also further ones) it is clear (to me) why the substitution is (logically) correct. For this last instance the variable name also ends up wrong after the replacement. > --- a/xen/include/xen/vpci.h > +++ b/xen/include/xen/vpci.h > @@ -339,6 +339,15 @@ static inline int __must_check vpci_reset_device(struct pci_dev *pdev) > return vpci_assign_device(pdev); > } > > +#ifdef CONFIG_ARM > +#include > + > +#define has_vpci_bridge(d) (!is_hardware_domain(d) || \ > + (is_hardware_domain(d) && pci_scan_enabled)) Nit: Off-by-1 indentation. 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Thu, 06 Nov 2025 04:19:06 -0800 (PST) Message-ID: Date: Thu, 6 Nov 2025 13:19:05 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH for-4.22 v2] acpi: Set TPM2 LAML to actual log area size To: Tu Dinh Cc: Anthony PERARD , Daniel Smith , Andrew Cooper , xen-devel@lists.xenproject.org References: <20251105000310.690-1-ngoc-tu.dinh@vates.tech> <58064c07-4182-48d8-9479-7b9f8e9a06cd@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 06.11.2025 13:13, Tu Dinh wrote: > On 06/11/2025 13:10, Jan Beulich wrote: >> On 05.11.2025 01:03, Tu Dinh wrote: >>> The LAML field should follow the TCG PFP specification: >>> >>> The TCG ACPI specification uses the field name "Log Area Minimum >>> Length", but the field value is the actual log area length reserved by >>> Platform Firmware, not a lower bound. >> >> And this is said where? Even the field description (ACPI 6.5) reads "Identifies >> the minimum length (in bytes) of the system’s preboot CC event log area." (I >> agree it makes little sense that way, but the change still needs proper >> explanation.) > > The above is an exact quote from the "TCG PC Client Platform Firmware > Profile Specification Version 1.06 Revision 52". Interesting. It didn't become clear to me that this actually is a quotation. Perhaps: The LAML field should follow the TCG PC Client Platform Firmware Profile Specification Version. Version 1.06 Revision 52 says: 'The TCG ACPI specification uses the field name "Log Area Minimum Length", but the field value is the actual log area length reserved by Platform Firmware, not a lower bound.' Remove the now-unused TPM_LOG_AREA_MINIMUM_SIZE. ? Then Acked-by: Jan Beulich and I could make the adjustment while committing (after 4.21 was branched off, of course). Jan From xen-devel-bounces@lists.xenproject.org Thu Nov 06 12:24:06 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 12:24:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156894.1485851 (Exim 4.92) (envelope-from ) id 1vGz21-00017N-Q7; Thu, 06 Nov 2025 12:24:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1156894.1485851; Thu, 06 Nov 2025 12:24:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGz21-00017G-Na; Thu, 06 Nov 2025 12:24:01 +0000 Received: by outflank-mailman (input) for mailman id 1156894; Thu, 06 Nov 2025 12:24:00 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGz1z-000178-Vm for xen-devel@lists.xenproject.org; Thu, 06 Nov 2025 12:24:00 +0000 Received: from mail180-3.suw31.mandrillapp.com (mail180-3.suw31.mandrillapp.com [198.2.180.3]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 77f9cc95-bb0b-11f0-9d17-b5c5bf9af7f9; Thu, 06 Nov 2025 13:23:58 +0100 (CET) Received: from pmta11.mandrill.prod.suw01.rsglab.com (localhost [127.0.0.1]) by mail180-3.suw31.mandrillapp.com (Mailchimp) with ESMTP id 4d2Lvx2fx8zDRKpfF for ; Thu, 6 Nov 2025 12:23:57 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id 4f161b4070094513b3309dbc08e2e9d4; Thu, 06 Nov 2025 12:23:57 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 77f9cc95-bb0b-11f0-9d17-b5c5bf9af7f9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1762431837; x=1762701837; bh=FFGej1DKmUsMC9NLzWpWnuGjFkfWH0XoPT3cylMdI98=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=FnOC3FaDoQr4BOFe9aJ27K0JPZ1UWXKuCsmNbcRR0cjXnPsnaMa27C1DbbuTG2hy9 cqxytq08Z4c5vv5krwWoG799l98SXaQQCknjl+Lvs/pTaMHE22hJfWSvGvCtmuXpXi ogBjlql3qQktXEmufVml8dIsk/layd5BvaYkEBF/JZZutK0fBDyq3XIWrb3CSTJGuC 3P5wMUJeQPumtgSkZa277IyZYJL3AJsSeMfsd11bfMlbUVXS3GSNlA4PjiapDq36jh prgX00R/ByC54qEv7gh3oQt+n4w2UjKzw17EAzaUrlXmOBWYOoGNbs1QkTkwX61k8j Tb9BmBxuWL5CQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1762431837; x=1762692337; i=ngoc-tu.dinh@vates.tech; bh=FFGej1DKmUsMC9NLzWpWnuGjFkfWH0XoPT3cylMdI98=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=urNgwlxYzj0mLGWNWzfSiE1q4UtxZImC8aCxizMDPzkvbqJ4jU8V7dxw+l2oh0cMy YkOK6Vby02XMOHSa0fMgI6nLKM70+WIBTwdXSFZx2HTCRwa/vgdy07B93gxv5fc8k2 4RDIPOW+fQTrBmXOTSLaX7KjJ/laWOj3E3i/6omyJZaxWj7XH3EF61qvfamhsCnQUk j82QiXWKsQ9FokUBsphjjyYvRtTDQH3/aqwP91hIZY3Os8kvOblpoWQyr3rpiuGl1e e5bdXawD1nRXQjUyehjCrzEtbeYTajCHqoMcHwfxiOzAYsDLsZ2NHRDmPAWv4hVfah 1gZGXOl5cbiNA== From: "Tu Dinh" Subject: =?utf-8?Q?Re:=20[PATCH=20for-4.22=20v2]=20acpi:=20Set=20TPM2=20LAML=20to=20actual=20log=20area=20size?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1762431836262 Message-Id: To: "Jan Beulich" Cc: "Anthony PERARD" , "Daniel Smith" , "Andrew Cooper" , xen-devel@lists.xenproject.org References: <20251105000310.690-1-ngoc-tu.dinh@vates.tech> <58064c07-4182-48d8-9479-7b9f8e9a06cd@suse.com> In-Reply-To: X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.4f161b4070094513b3309dbc08e2e9d4?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20251106:md Date: Thu, 06 Nov 2025 12:23:57 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On 06/11/2025 13:19, Jan Beulich wrote: > On 06.11.2025 13:13, Tu Dinh wrote: >> On 06/11/2025 13:10, Jan Beulich wrote: >>> On 05.11.2025 01:03, Tu Dinh wrote: >>>> The LAML field should follow the TCG PFP specification: >>>> >>>> The TCG ACPI specification uses the field name "Log Area Minimum >>>> Length", but the field value is the actual log area length reserved by >>>> Platform Firmware, not a lower bound. >>> >>> And this is said where? Even the field description (ACPI 6.5) reads "Id= entifies >>> the minimum length (in bytes) of the system=E2=80=99s preboot CC event = log area." (I >>> agree it makes little sense that way, but the change still needs proper >>> explanation.) >> >> The above is an exact quote from the "TCG PC Client Platform Firmware >> Profile Specification Version 1.06 Revision 52". > > Interesting. It didn't become clear to me that this actually is a quotati= on. > Perhaps: > > The LAML field should follow the TCG PC Client Platform Firmware Profile > Specification Version. Version 1.06 Revision 52 says: > > 'The TCG ACPI specification uses the field name "Log Area Minimum > Length", but the field value is the actual log area length reserved by > Platform Firmware, not a lower bound.' > > Remove the now-unused TPM_LOG_AREA_MINIMUM_SIZE. > > ? Then > Acked-by: Jan Beulich > and I could make the adjustment while committing (after 4.21 was branched= off, > of course). > > Jan That's clearer, thanks. -- Ngoc Tu Dinh | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Thu Nov 06 13:03:37 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 13:03:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156908.1485862 (Exim 4.92) (envelope-from ) id 1vGze6-0006Y2-KT; Thu, 06 Nov 2025 13:03:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1156908.1485862; Thu, 06 Nov 2025 13:03:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGze6-0006Xu-H0; Thu, 06 Nov 2025 13:03:22 +0000 Received: by outflank-mailman (input) for mailman id 1156908; Thu, 06 Nov 2025 13:03:21 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vGze5-0006Xn-31 for xen-devel@lists.xenproject.org; Thu, 06 Nov 2025 13:03:21 +0000 Received: from mail-ed1-x52e.google.com (mail-ed1-x52e.google.com [2a00:1450:4864:20::52e]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id f69f6ac3-bb10-11f0-980a-7dc792cee155; Thu, 06 Nov 2025 14:03:18 +0100 (CET) Received: by mail-ed1-x52e.google.com with SMTP id 4fb4d7f45d1cf-640b06fa959so1597331a12.3 for ; Thu, 06 Nov 2025 05:03:18 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 06 Nov 2025 05:03:17 -0800 (PST) Message-ID: <88013b48-d548-4eeb-b45b-64a3a0287cd3@suse.com> Date: Thu, 6 Nov 2025 14:03:16 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 6/8] xen/pci: initialize BARs To: Mykyta Poturai Cc: Stewart Hildebrand , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , "xen-devel@lists.xenproject.org" References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 24.09.2025 09:59, Mykyta Poturai wrote: > From: Stewart Hildebrand > > A PCI device must have valid BARs in order to assign it to a domain. On > ARM, firmware is unlikely to have initialized the BARs, so we must do > this in Xen. During setup_hwdom_pci_devices(), check if each BAR is > valid. If the BAR happens to already be valid, remove the BAR range from > a rangeset of valid PCI ranges so as to avoid overlap when reserving a > new BAR. If not valid, reserve a new BAR address from the rangeset and > write it to the device. > > Avaliable ranges are read from DT during init and stored in distinct > rangesets. The "distinct" lacks context here, imo. Maybe add "non-prefetchable and prefetchable" earlier in the sentence? > --- a/xen/arch/arm/pci/pci-host-common.c > +++ b/xen/arch/arm/pci/pci-host-common.c > @@ -21,6 +21,7 @@ > #include > #include > #include > +#include > > #include > > @@ -232,6 +233,21 @@ static int pci_bus_find_domain_nr(struct dt_device_node *dev) > return domain; > } > > +static int add_bar_range(const struct dt_device_node *dev, uint32_t flags, > + uint64_t addr, uint64_t len, void *data) Simply by its purpose, this function looks like it ought to be __init. And indeed, while its only caller - pci_host_common_probe() - isn't, all callers of that function are. Hence another prereq patch is wanted to add the missing __init there. > @@ -286,6 +302,14 @@ pci_host_common_probe(struct dt_device_node *dev, > pci_add_host_bridge(bridge); > pci_add_segment(bridge->segment); > > + bridge->bar_ranges = rangeset_new(NULL, "BAR ranges", > + RANGESETF_prettyprint_hex); > + bridge->bar_ranges_prefetch = rangeset_new(NULL, > + "BAR ranges (prefetchable)", > + RANGESETF_prettyprint_hex); > + if ( bridge->bar_ranges && bridge->bar_ranges_prefetch ) > + dt_for_each_range(bridge->dt_node, add_bar_range, bridge); > + > return bridge; This is odd: Why would you silently ignore the -ENOMEM condition here? You can't blindly use the NULL pointer(s) ... > @@ -476,6 +500,60 @@ bool pci_check_bar(const struct pci_dev *pdev, mfn_t start, mfn_t end) > > return bar_data.is_valid; > } > + > +uint64_t pci_get_new_bar_addr(const struct pci_dev *pdev, uint64_t size, > + bool is_64bit, bool prefetch) (__init as well here) > +{ > + struct pci_host_bridge *bridge; > + struct rangeset *range; > + uint64_t addr; > + > + bridge = pci_find_host_bridge(pdev->seg, pdev->bus); > + if ( !bridge ) > + return 0; > + > + range = prefetch ? bridge->bar_ranges_prefetch : bridge->bar_ranges; ... here, for example. > + if ( size < PAGE_SIZE ) > + size = PAGE_SIZE; > + > + if ( is_64bit && !rangeset_find_aligned_range(range, size, GB(4), &addr) ) > + { > + if ( rangeset_remove_range(range, addr, addr + size - 1) ) > + { > + printk("%s:%d:%s error\n", __FILE__, __LINE__, __func__); > + } > + return addr; No need for the inner figure braces, but more importantly: printk()-style error handling is, well, insufficient? I'm pretty sure I indicated before that you can't assume the return value of rangeset_find_aligned_range() isn't stale the moment you look at (or use) it, unless you make further (written down) assumptions. For example, rangeset_find_aligned_range() becoming __init would already be a partial indication that it's not fit for general use. __FILE__ / __LINE__ based diagnostics also aren't all this useful (and get in the way elsewhere, e.g. for livepatching). > + } > + if ( !rangeset_find_aligned_range(range, size, 0, &addr) ) > + { > + if ( !is_64bit && addr >= GB(4) ) > + return 0; What guarantees that no lower range is available? It's not said anywhere that the function would search addresses in increasing order. > +int pci_reserve_bar_range(const struct pci_dev *pdev, uint64_t addr, > + uint64_t size, bool prefetch) __init again (I won't further repeat this) > --- a/xen/common/rangeset.c > +++ b/xen/common/rangeset.c > @@ -357,6 +357,41 @@ int rangeset_claim_range(struct rangeset *r, unsigned long size, > return 0; > } > > +int rangeset_find_aligned_range(struct rangeset *r, unsigned long size, > + unsigned long min, unsigned long *s) What is "min" when there ought to be some alignment specified instead? (Reading the function body I understand that "size" also specifies the alignment, but that's not clear at all when looking at e.g. just the function declaration.) How does the use of unsigned long here fit with the use of uint64_t in the callers? > +{ > + struct range *x; > + > + /* Power of 2 check */ > + if ( (size & (size - 1)) != 0 ) > + { > + *s = 0; > + return -EINVAL; > + } > + > + read_lock(&r->lock); > + > + for ( x = first_range(r); x; x = next_range(r, x) ) > + { > + /* Assumes size is a power of 2 */ > + unsigned long start_aligned = (x->s + size - 1) & ~(size - 1); The comment says what somehow you should actually assure: It _needs_ to be a power of 2 for this to work, yet size being 0 passes the check at the top of the function. Also please don't open-code ROUNDUP(). > --- a/xen/drivers/passthrough/pci.c > +++ b/xen/drivers/passthrough/pci.c > @@ -1172,6 +1172,80 @@ int __init scan_pci_devices(void) > return ret; > } > > +static void __init cf_check reserve_bar_range(struct pci_dev *pdev, uint8_t reg, > + uint64_t addr, uint64_t size, > + bool is_64bit, bool prefetch) > +{ > + if ( pci_check_bar(pdev, maddr_to_mfn(addr), > + maddr_to_mfn(addr + size - 1)) ) > + pci_reserve_bar_range(pdev, addr, size, prefetch); > +} > + > +static void __init cf_check get_new_bar_addr(struct pci_dev *pdev, uint8_t reg, > + uint64_t addr, uint64_t size, > + bool is_64bit, bool prefetch) > +{ > + if ( !pci_check_bar(pdev, maddr_to_mfn(addr), > + maddr_to_mfn(addr + size - 1)) ) > + { With how pci_check_bar() works on x86 right now, ... > + uint16_t cmd = pci_conf_read16(pdev->sbdf, PCI_COMMAND); > + > + addr = pci_get_new_bar_addr(pdev, size, is_64bit, prefetch); > + > + pci_conf_write16(pdev->sbdf, PCI_COMMAND, > + cmd & ~(PCI_COMMAND_MEMORY | PCI_COMMAND_IO)); > + > + pci_conf_write32(pdev->sbdf, reg, > + (addr & GENMASK(31, 0)) | > + (is_64bit ? PCI_BASE_ADDRESS_MEM_TYPE_64 : 0)); > + > + if ( is_64bit ) > + pci_conf_write32(pdev->sbdf, reg + 4, addr >> 32); > + > + pci_conf_write16(pdev->sbdf, PCI_COMMAND, cmd); ... all of this is unreachable code there. Misra doesn't like such. Furthermore x86'es variant emits diagnostics, and aiui we'd now see them more frequently (possibly: than wanted). > +static int __init cf_check bars_iterate(struct pci_seg *pseg, void *arg) > +{ > + struct pci_dev *pdev; > + unsigned int i, ret, num_bars = PCI_HEADER_NORMAL_NR_BARS; > + uint64_t addr, size; > + void (*cb)(struct pci_dev *, uint8_t, uint64_t, uint64_t, bool, bool) = arg; There is still no connection at all between this function pointer type variable and the two functions tobe called? Why is "cb" not directly the function parameter? (For Misra's sake it may also be necessary to name the six parameters; I'm not entirely sure, though. There was some back and forth at the time.) Also, why is the first parameter not pointer-to-const? > + list_for_each_entry ( pdev, &pseg->alldevs_list, alldevs_list ) > + { > + if ( (pci_conf_read8(pdev->sbdf, PCI_HEADER_TYPE) & 0x7f) == > + PCI_HEADER_TYPE_NORMAL ) > + { > + for ( i = 0; i < num_bars; i += ret ) > + { > + uint8_t reg = PCI_BASE_ADDRESS_0 + i * 4; > + bool prefetch; > + > + if ( (pci_conf_read32(pdev->sbdf, reg) & PCI_BASE_ADDRESS_SPACE) > + == PCI_BASE_ADDRESS_SPACE_IO ) Nit (style): Operator placement. > + { > + ret = 1; > + continue; > + } > + > + ret = pci_size_mem_bar(pdev->sbdf, reg, &addr, &size, > + (i == num_bars - 1) ? PCI_BAR_LAST : 0); Nit (style): Indentation. > + if ( !size ) > + continue; > + prefetch = !!(pci_conf_read32(pdev->sbdf, reg) & > + PCI_BASE_ADDRESS_MEM_PREFETCH); No need for !!. > @@ -1263,6 +1337,11 @@ void __hwdom_init setup_hwdom_pci_devices( > struct setup_hwdom ctxt = { .d = d, .handler = handler }; > > pcidevs_lock(); > + if ( hwdom_uses_vpci() ) > + { > + pci_segments_iterate(bars_iterate, reserve_bar_range); > + pci_segments_iterate(bars_iterate, get_new_bar_addr); > + } > pci_segments_iterate(_setup_hwdom_pci_devices, &ctxt); > pcidevs_unlock(); Does this really need splitting into 3 steps? Can't _setup_hwdom_pci_devices() take care of the uninitialized BARs? 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Thu, 06 Nov 2025 05:18:55 -0800 (PST) Message-ID: <9ec406ef-af62-4245-9202-3d70e9550e9d@suse.com> Date: Thu, 6 Nov 2025 14:18:54 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 7/8] xen/pci: assign discovered devices to hwdom To: Mykyta Poturai Cc: Luca Fancellu , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stewart Hildebrand , "xen-devel@lists.xenproject.org" References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 24.09.2025 09:59, Mykyta Poturai wrote: > @@ -133,6 +134,12 @@ void arch_iommu_domain_destroy(struct domain *d) > { > } > > +static int iommu_add_hwdom_pci_device(u8 devfn, struct pci_dev *pdev) > +{ > + const struct domain_iommu *hd = dom_iommu(hardware_domain); > + return iommu_call(hd->platform_ops, add_device, devfn, pci_to_dev(pdev)); Nit (style): Blank line please between declaration(s) and statement(s). And blank line please also ahead of the main return statement of a function. > @@ -142,6 +149,8 @@ void __hwdom_init arch_iommu_hwdom_init(struct domain *d) > if ( iommu_hwdom_reserved == 1 ) > printk(XENLOG_WARNING "map-reserved dom0-iommu option is not supported on ARM\n"); > iommu_hwdom_reserved = 0; > + > + setup_hwdom_pci_devices(d, iommu_add_hwdom_pci_device); With this function being __hwdom_init, why is iommu_add_hwdom_pci_device() not also given that attribute? As to cf_check I don't know what the Arm policy is: My suggestion would be to put that attribute wherever it is (potentially) needed. > --- a/xen/drivers/passthrough/pci.c > +++ b/xen/drivers/passthrough/pci.c > @@ -20,6 +20,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -1040,6 +1041,12 @@ enum pdev_type pdev_type(u16 seg, u8 bus, u8 devfn) > return pos ? DEV_TYPE_PCIe_ENDPOINT : DEV_TYPE_PCI; > } > > +static bool pdev_is_endpoint(struct pci_dev *pdev) __hwdom_init? And parameter pointer-to-const? > +{ > + enum pdev_type type = pdev_type(pdev->seg, pdev->bus, pdev->devfn); > + return type == DEV_TYPE_PCIe_ENDPOINT || type == DEV_TYPE_PCI; > +} > + > /* > * find the upstream PCIe-to-PCI/PCIX bridge or PCI legacy bridge > * return 0: the device is integrated PCI device or PCIe > @@ -1255,7 +1262,7 @@ static void __hwdom_init setup_one_hwdom_device(const struct setup_hwdom *ctxt, > struct pci_dev *pdev) > { > u8 devfn = pdev->devfn; > - int err; > + int err, i, rc; i clearly wants to be of an unsigned type. And rc, afaics, can have its scope limited to the loop body. > @@ -1276,6 +1283,34 @@ static void __hwdom_init setup_one_hwdom_device(const struct setup_hwdom *ctxt, > if ( err ) > printk(XENLOG_ERR "setup of vPCI for d%d failed: %d\n", > ctxt->d->domain_id, err); > + > + if ( !hwdom_uses_vpci() ) > + return; > + > + for ( i = 0; i < PCI_HEADER_NORMAL_NR_BARS; i += rc ) > + { > + uint64_t addr, size; > + uint8_t reg = PCI_BASE_ADDRESS_0 + i * 4; > + > + if ( (pci_conf_read32(pdev->sbdf, reg) & PCI_BASE_ADDRESS_SPACE) > + == PCI_BASE_ADDRESS_SPACE_IO ) Nit (style): Operator placement again. > + { > + rc = 1; > + continue; > + } > + > + rc = pci_size_mem_bar(pdev->sbdf, reg, &addr, &size, > + (i == PCI_HEADER_NORMAL_NR_BARS - 1) > + ? PCI_BAR_LAST : 0); Nit (style): Indentation again. > + > + if ( !size ) > + continue; > + > + err = iomem_permit_access(hardware_domain, paddr_to_pfn(addr), > + paddr_to_pfn(PAGE_ALIGN(addr + size - 1))); And again. > + if ( err ) > + break; > + } > } This change supports my comment on the earlier patch, regarding the option of doing here some of what needs doing, rather than by another round of iterating all devices. > @@ -1294,6 +1329,9 @@ static int __hwdom_init cf_check _setup_hwdom_pci_devices( > if ( !pdev ) > continue; > > + if ( hwdom_uses_vpci() && !pdev_is_endpoint(pdev) ) > + continue; > + > if ( !pdev->domain ) > { > pdev->domain = ctxt->d; This is (logically) wrong: On x86 PVH Dom0 uses vPCI but wants all devices to be handed to it. _This_ may be a place where has_vpci_bridge() might make sense to use (simply by its name, that is). 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Hgrr. And we end up back to v3 regarding this part. Check in viridian_load_{domain,vcpu}_ctxt() may/may not work depending on toolstack behavior which is not strictly defined (loading HVM_PARAM_VIRIDIAN before/after viridian_load_{domain,vcpu}_ctxt()). So what's the conclusion here - drop this check? > >> --- a/xen/arch/x86/hvm/hvm.c >> +++ b/xen/arch/x86/hvm/hvm.c >> @@ -4231,8 +4231,9 @@ static int hvm_set_param(struct domain *d, uint32_t index, uint64_t value) >> rc = -EINVAL; >> break; >> case HVM_PARAM_VIRIDIAN: >> - if ( (value & ~HVMPV_feature_mask) || >> - !(value & HVMPV_base_freq) ) >> + if ( !IS_ENABLED(CONFIG_VIRIDIAN) && value ) >> + rc = -ENODEV; >> + else if ( (value & ~HVMPV_feature_mask) || !(value & HVMPV_base_freq) ) >> rc = -EINVAL; > > I find the check for value to be (non-)zero a little dubious here: If any caller > passed in 0, it would get back -EINVAL anyway. Imo -ENODEV would be more suitable > in that case as well. Things would be different if 0 was a valid value to pass in. The idea was to distinguish between "Feature enabled, Invalid parameter" and "Feature disabled". -- Best regards, -grygorii From xen-devel-bounces@lists.xenproject.org Thu Nov 06 13:43:56 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 13:43:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156949.1485892 (Exim 4.92) (envelope-from ) id 1vH0HM-0004TJ-1e; Thu, 06 Nov 2025 13:43:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1156949.1485892; Thu, 06 Nov 2025 13:43:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vH0HL-0004TC-Um; Thu, 06 Nov 2025 13:43:55 +0000 Received: by outflank-mailman (input) for mailman id 1156949; Thu, 06 Nov 2025 13:43:55 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vH0HL-0004R8-3I for xen-devel@lists.xenproject.org; Thu, 06 Nov 2025 13:43:55 +0000 Received: from mail-ed1-x534.google.com (mail-ed1-x534.google.com [2a00:1450:4864:20::534]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id a1fe539a-bb16-11f0-980a-7dc792cee155; Thu, 06 Nov 2025 14:43:53 +0100 (CET) Received: by mail-ed1-x534.google.com with SMTP id 4fb4d7f45d1cf-63bea08a326so882720a12.3 for ; Thu, 06 Nov 2025 05:43:53 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 06 Nov 2025 05:43:52 -0800 (PST) Message-ID: <8b204b21-80fb-408d-972e-8f183eb45dfc@suse.com> Date: Thu, 6 Nov 2025 14:43:51 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [for 4.22 v5 01/18] xen/riscv: detect and initialize G-stage mode To: Oleksii Kurochko Cc: Alistair Francis , Bob Eshleman , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <2b21348b3300c741b276a47d5942e71d306846eb.1760974017.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <2b21348b3300c741b276a47d5942e71d306846eb.1760974017.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 20.10.2025 17:57, Oleksii Kurochko wrote: > Changes in V5: > - Add static and __initconst for local variable modes[] in > gstage_mode_detect(). > - Change type for gstage_mode from 'unsigned long' to 'unsigned char'. > - Update the comment inisde defintion if modes[] variable in > gstage_mode_detect(): > - Add information about Bare mode. > - Drop "a paged virtual-memory scheme described in Section 10.3" as it isn't > relevant here. > - Drop printing of function name when chosen G-stage mode message is printed. > - Drop the call of gstage_mode_detect() from start_xen(). It will be added into > p2m_init() when the latter will be introduced. Well, thanks, but ... > - Introduce pre_gstage_init(). ... the same comment that I gave before now applies here: This doesn't look to belong directly in start_xen(). In x86'es terms I'd say this is a tiny part of paging_init(). > --- a/xen/arch/riscv/Makefile > +++ b/xen/arch/riscv/Makefile > @@ -7,6 +7,7 @@ obj-y += intc.o > obj-y += irq.o > obj-y += mm.o > obj-y += pt.o > +obj-y += p2m.o Nit: Please keep things sorted (numbers sort before letters). > --- a/xen/arch/riscv/include/asm/p2m.h > +++ b/xen/arch/riscv/include/asm/p2m.h > @@ -6,6 +6,8 @@ > > #include > > +extern unsigned char gstage_mode; Better move down some, at the very least ... > #define paddr_bits PADDR_BITS ... past more fundamental #define-s? > --- a/xen/arch/riscv/include/asm/riscv_encoding.h > +++ b/xen/arch/riscv/include/asm/riscv_encoding.h > @@ -131,13 +131,16 @@ > #define HGATP_MODE_SV32X4 _UL(1) > #define HGATP_MODE_SV39X4 _UL(8) > #define HGATP_MODE_SV48X4 _UL(9) > +#define HGATP_MODE_SV57X4 _UL(10) > > #define HGATP32_MODE_SHIFT 31 > +#define HGATP32_MODE_MASK _UL(0x80000000) Please can we avoid redundant (and then not even connected) #define-s? I don't see why you would need HGATP32_MODE_SHIFT when you have HGATP32_MODE_MASK. Similarly ... > #define HGATP32_VMID_SHIFT 22 > #define HGATP32_VMID_MASK _UL(0x1FC00000) ... here, while ... > #define HGATP32_PPN _UL(0x003FFFFF) ... here the constant isn't even suffixed with _MASK. > --- /dev/null > +++ b/xen/arch/riscv/p2m.c > @@ -0,0 +1,96 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > + > +#include > +#include > +#include > +#include > + > +#include > +#include > +#include > + > +unsigned char __ro_after_init gstage_mode; > + > +static void __init gstage_mode_detect(void) > +{ > + static const struct { > + unsigned char mode; > + unsigned int paging_levels; > + const char name[8]; > + } modes[] __initconst = { > + /* > + * Based on the RISC-V spec: > + * Bare mode is always supported, regardless of SXLEN. > + * When SXLEN=32, the only other valid setting for MODE is Sv32. > + * When SXLEN=64, three paged virtual-memory schemes are defined: > + * Sv39, Sv48, and Sv57. > + */ > +#ifdef CONFIG_RISCV_32 > + { HGATP_MODE_SV32X4, 2, "Sv32x4" } > +#else > + { HGATP_MODE_SV39X4, 3, "Sv39x4" }, > + { HGATP_MODE_SV48X4, 4, "Sv48x4" }, > + { HGATP_MODE_SV57X4, 5, "Sv57x4" }, > +#endif > + }; > + > + unsigned int mode_idx; > + > + gstage_mode = HGATP_MODE_OFF; Why is this not the variable's initializer? > + for ( mode_idx = 0; mode_idx < ARRAY_SIZE(modes); mode_idx++ ) > + { > + unsigned long mode = modes[mode_idx].mode; > + > + csr_write(CSR_HGATP, MASK_INSR(mode, HGATP_MODE_MASK)); > + > + if ( MASK_EXTR(csr_read(CSR_HGATP), HGATP_MODE_MASK) == mode ) > + { > + gstage_mode = mode; > + break; > + } > + } I take it that using the first available mode is only transient. To support bigger guests, you may need to pick 48x4 or even 57x4 no matter that 39x4 is available. I wonder whether you wouldn't be better off recording all supported modes right away. Jan From xen-devel-bounces@lists.xenproject.org Thu Nov 06 13:47:18 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 13:47:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156965.1485901 (Exim 4.92) (envelope-from ) id 1vH0Ka-0005CM-Ib; Thu, 06 Nov 2025 13:47:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1156965.1485901; Thu, 06 Nov 2025 13:47:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vH0Ka-0005CF-FX; Thu, 06 Nov 2025 13:47:16 +0000 Received: by outflank-mailman (input) for mailman id 1156965; Thu, 06 Nov 2025 13:47:15 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vH0KZ-0005C9-2T for xen-devel@lists.xenproject.org; Thu, 06 Nov 2025 13:47:15 +0000 Received: from mail-ed1-x52f.google.com (mail-ed1-x52f.google.com [2a00:1450:4864:20::52f]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 19b413f8-bb17-11f0-9d17-b5c5bf9af7f9; Thu, 06 Nov 2025 14:47:14 +0100 (CET) Received: by mail-ed1-x52f.google.com with SMTP id 4fb4d7f45d1cf-640c48b3b90so1077572a12.0 for ; Thu, 06 Nov 2025 05:47:14 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 06 Nov 2025 05:47:13 -0800 (PST) Message-ID: <210edee7-8525-47a9-8191-ea7d94db5fce@suse.com> Date: Thu, 6 Nov 2025 14:47:11 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH v7] x86: make Viridian support optional To: Grygorii Strashko Cc: Sergiy Kibrik , Andrew Cooper , Paul Durrant , Alejandro Vallejo , "xen-devel@lists.xenproject.org" , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk References: <20251031161716.1222956-1-grygorii_strashko@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.11.2025 14:42, Grygorii Strashko wrote: > On 06.11.25 13:35, Jan Beulich wrote: >> On 31.10.2025 17:17, Grygorii Strashko wrote: >>> --- a/xen/arch/x86/hvm/Makefile >>> +++ b/xen/arch/x86/hvm/Makefile >>> @@ -1,6 +1,6 @@ >>> obj-$(CONFIG_AMD_SVM) += svm/ >>> obj-$(CONFIG_INTEL_VMX) += vmx/ >>> -obj-y += viridian/ >>> +obj-$(CONFIG_VIRIDIAN) += viridian/ >> >> With this, what is the point of the additions to viridian_load_{domain,vcpu}_ctxt()? >> You're adding dead code there, aren't you? > > Hgrr. And we end up back to v3 regarding this part. > Check in viridian_load_{domain,vcpu}_ctxt() may/may not work depending on toolstack > behavior which is not strictly defined (loading HVM_PARAM_VIRIDIAN before/after > viridian_load_{domain,vcpu}_ctxt()). > > So what's the conclusion here - drop this check? Well, Misra wants us to not have any dead code. Hence why would we add new instances of such? >>> --- a/xen/arch/x86/hvm/hvm.c >>> +++ b/xen/arch/x86/hvm/hvm.c >>> @@ -4231,8 +4231,9 @@ static int hvm_set_param(struct domain *d, uint32_t index, uint64_t value) >>> rc = -EINVAL; >>> break; >>> case HVM_PARAM_VIRIDIAN: >>> - if ( (value & ~HVMPV_feature_mask) || >>> - !(value & HVMPV_base_freq) ) >>> + if ( !IS_ENABLED(CONFIG_VIRIDIAN) && value ) >>> + rc = -ENODEV; >>> + else if ( (value & ~HVMPV_feature_mask) || !(value & HVMPV_base_freq) ) >>> rc = -EINVAL; >> >> I find the check for value to be (non-)zero a little dubious here: If any caller >> passed in 0, it would get back -EINVAL anyway. Imo -ENODEV would be more suitable >> in that case as well. Things would be different if 0 was a valid value to pass in. > > The idea was to distinguish between "Feature enabled, Invalid parameter" and "Feature disabled". But you don't, or else the addition would need to live after the -EINVAL checks. I also question the utility of knowing "parameter was invalid" when the feature isn't available anyway. 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The trace date can be retrieved using buffer > > Nit: s/date/data/ > >> + shared between Xen and domain >> + (see XENMEM_acquire_resource(XENMEM_resource_vmtrace_buf)). >> + > > I was actually meaning to ask that "VMX only" should somehow be mentioned here, > but then I noticed this is an arch-independent location. Right, Arch code advertise VMTRACE support with HAS_VMTRACE. In this particular case: config INTEL_VMX ... select HAS_VMTRACE > I'm not quite sure we want it like this (just yet). ? > >> @@ -2940,11 +2948,13 @@ static struct hvm_function_table __initdata_cf_clobber vmx_function_table = { >> .altp2m_vcpu_emulate_ve = vmx_vcpu_emulate_ve, >> .altp2m_vcpu_emulate_vmfunc = vmx_vcpu_emulate_vmfunc, >> #endif >> +#ifdef CONFIG_VMTRACE >> .vmtrace_control = vmtrace_control, >> .vmtrace_output_position = vmtrace_output_position, >> .vmtrace_set_option = vmtrace_set_option, >> .vmtrace_get_option = vmtrace_get_option, >> .vmtrace_reset = vmtrace_reset, >> +#endif >> >> .get_reg = vmx_get_reg, >> .set_reg = vmx_set_reg, > > Blank line ahead of the new #ifdef? > >> @@ -738,6 +740,7 @@ static inline bool altp2m_vcpu_emulate_ve(struct vcpu *v) >> bool altp2m_vcpu_emulate_ve(struct vcpu *v); >> #endif /* CONFIG_ALTP2M */ >> >> +#ifdef CONFIG_VMTRACE >> static inline int hvm_vmtrace_control(struct vcpu *v, bool enable, bool reset) >> { >> if ( hvm_funcs.vmtrace_control ) >> @@ -780,6 +783,12 @@ static inline int hvm_vmtrace_reset(struct vcpu *v) >> >> return -EOPNOTSUPP; >> } >> +#else >> +static inline int hvm_vmtrace_reset(struct vcpu *v) >> +{ >> + return 0; >> +} >> +#endif > > #ifdef inside the function body please, to reduce redundancy and to reduce the > risk of overlooking multiple places which need editing (when e.g. function > parameters change). All hvm_vmtrace_x() functions are inline - do you mean like below for all of them? static inline int hvm_vmtrace_get_option( struct vcpu *v, uint64_t key, uint64_t *value) { +#ifdef CONFIG_VMTRACE if ( hvm_funcs.vmtrace_get_option ) return alternative_call(hvm_funcs.vmtrace_get_option, v, key, value); +#endif return -EOPNOTSUPP; } > >> --- a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h >> +++ b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h >> @@ -155,7 +155,9 @@ struct vmx_vcpu { >> bool ept_spurious_misconfig; >> >> /* Processor Trace configured and enabled for the vcpu. */ >> +#ifdef CONFIG_VMTRACE >> bool ipt_active; >> +#endif > > Imo such an #ifdef would better enclose the comment as well. > >> --- a/xen/arch/x86/vm_event.c >> +++ b/xen/arch/x86/vm_event.c >> @@ -253,7 +253,9 @@ void vm_event_fill_regs(vm_event_request_t *req) >> req->data.regs.x86.shadow_gs = ctxt.shadow_gs; >> req->data.regs.x86.dr6 = ctxt.dr6; >> >> +#ifdef CONFIG_VMTRACE >> if ( hvm_vmtrace_output_position(curr, &req->data.regs.x86.vmtrace_pos) != 1 ) >> +#endif >> req->data.regs.x86.vmtrace_pos = ~0; >> #endif >> } > > Use IS_ENABLED() together with a function declaration (but no definition) in the > VMTRACE=n case? -- Best regards, -grygorii From xen-devel-bounces@lists.xenproject.org Thu Nov 06 14:05:59 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 14:05:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1156989.1485921 (Exim 4.92) (envelope-from ) id 1vH0cV-0008Vc-84; Thu, 06 Nov 2025 14:05:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1156989.1485921; Thu, 06 Nov 2025 14:05:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vH0cV-0008VV-5T; Thu, 06 Nov 2025 14:05:47 +0000 Received: by outflank-mailman (input) for mailman id 1156989; Thu, 06 Nov 2025 14:05:46 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vH0cU-0008VO-Mo for xen-devel@lists.xenproject.org; Thu, 06 Nov 2025 14:05:46 +0000 Received: from mail-ej1-x632.google.com (mail-ej1-x632.google.com [2a00:1450:4864:20::632]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id af7c6531-bb19-11f0-980a-7dc792cee155; Thu, 06 Nov 2025 15:05:44 +0100 (CET) Received: by mail-ej1-x632.google.com with SMTP id a640c23a62f3a-b728a43e410so172754566b.1 for ; Thu, 06 Nov 2025 06:05:44 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 06 Nov 2025 06:05:43 -0800 (PST) Message-ID: <7e9671b3-6972-45b8-9cba-4447fa802fe2@suse.com> Date: Thu, 6 Nov 2025 15:05:42 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [for 4.22 v5 02/18] xen/riscv: introduce VMID allocation and manegement To: Oleksii Kurochko Cc: Alistair Francis , Bob Eshleman , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 20.10.2025 17:57, Oleksii Kurochko wrote: > --- /dev/null > +++ b/xen/arch/riscv/vmid.c > @@ -0,0 +1,193 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > + > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include > +#include > +#include > +#include > + > +/* Xen command-line option to enable VMIDs */ > +static bool __ro_after_init opt_vmid = true; > +boolean_param("vmid", opt_vmid); Command line options, btw, want documenting in docs/misc/xen-command-line.pandoc. > +/* > + * VMIDs partition the physical TLB. In the current implementation VMIDs are > + * introduced to reduce the number of TLB flushes. Each time a guest-physical > + * address space changes, instead of flushing the TLB, a new VMID is > + * assigned. This reduces the number of TLB flushes to at most 1/#VMIDs. > + * The biggest advantage is that hot parts of the hypervisor's code and data > + * retain in the TLB. > + * > + * Sketch of the Implementation: > + * > + * VMIDs are a hart-local resource. As preemption of VMIDs is not possible, > + * VMIDs are assigned in a round-robin scheme. To minimize the overhead of > + * VMID invalidation, at the time of a TLB flush, VMIDs are tagged with a > + * 64-bit generation. Only on a generation overflow the code needs to > + * invalidate all VMID information stored at the VCPUs with are run on the > + * specific physical processor. When this overflow appears VMID usage is > + * disabled to retain correctness. > + */ > + > +/* Per-Hart VMID management. */ > +struct vmid_data { > + uint64_t generation; > + uint16_t next_vmid; > + uint16_t max_vmid; > + bool used; > +}; > + > +static DEFINE_PER_CPU(struct vmid_data, vmid_data); > + > +static unsigned int vmidlen_detect(void) > +{ > + unsigned int vmid_bits; > + > + /* > + * According to the RISC-V Privileged Architecture Spec: > + * When MODE=Bare, guest physical addresses are equal to supervisor > + * physical addresses, and there is no further memory protection > + * for a guest virtual machine beyond the physical memory protection > + * scheme described in Section "Physical Memory Protection". > + * In this case, the remaining fields in hgatp must be set to zeros. > + * Thereby it is necessary to set gstage_mode not equal to Bare. > + */ > + ASSERT(gstage_mode != HGATP_MODE_OFF); > + csr_write(CSR_HGATP, > + MASK_INSR(gstage_mode, HGATP_MODE_MASK) | HGATP_VMID_MASK); > + vmid_bits = MASK_EXTR(csr_read(CSR_HGATP), HGATP_VMID_MASK); > + vmid_bits = flsl(vmid_bits); > + csr_write(CSR_HGATP, _AC(0, UL)); > + > + /* > + * From RISC-V spec: > + * Speculative executions of the address-translation algorithm behave as > + * non-speculative executions of the algorithm do, except that they must > + * not set the dirty bit for a PTE, they must not trigger an exception, > + * and they must not create address-translation cache entries if those > + * entries would have been invalidated by any SFENCE.VMA instruction > + * executed by the hart since the speculative execution of the algorithm > + * began. > + * > + * Also, despite of the fact here it is mentioned that when V=0 two-stage > + * address translation is inactivated: > + * The current virtualization mode, denoted V, indicates whether the hart > + * is currently executing in a guest. When V=1, the hart is either in > + * virtual S-mode (VS-mode), or in virtual U-mode (VU-mode) atop a guest > + * OS running in VS-mode. When V=0, the hart is either in M-mode, in > + * HS-mode, or in U-mode atop an OS running in HS-mode. The > + * virtualization mode also indicates whether two-stage address > + * translation is active (V=1) or inactive (V=0). > + * But on the same side, writing to hgatp register activates it: > + * The hgatp register is considered active for the purposes of > + * the address-translation algorithm unless the effective privilege mode > + * is U and hstatus.HU=0. > + * > + * Thereby it leaves some room for speculation even in this stage of boot, > + * so it could be that we polluted local TLB so flush all guest TLB. > + */ > + local_hfence_gvma_all(); That's a lot of redundancy with gstage_mode_detect(). The function call here actually renders the one there redundant, afaict. Did you consider putting a single instance at the end of it in pre_gstage_init()? Otherwise at least don't repeat the comment here, but merely point at the other one? > + return vmid_bits; > +} > + > +void vmid_init(void) This (and its helper) isn't __init because you intend to also call it during bringup of secondary processors? > +{ > + static int8_t g_vmid_used = -1; Now that you're getting closer to the x86 original - __ro_after_init? > + unsigned int vmid_len = vmidlen_detect(); > + struct vmid_data *data = &this_cpu(vmid_data); > + > + BUILD_BUG_ON((HGATP_VMID_MASK >> HGATP_VMID_SHIFT) > > + (BIT((sizeof(data->max_vmid) * BITS_PER_BYTE), UL) - 1)); > + > + data->max_vmid = BIT(vmid_len, U) - 1; > + data->used = opt_vmid && (vmid_len > 1); > + > + if ( g_vmid_used < 0 ) > + { > + g_vmid_used = data->used; > + printk("VMIDs use is %sabled\n", data->used ? "en" : "dis"); > + } > + else if ( g_vmid_used != data->used ) > + printk("CPU%u: VMIDs use is %sabled\n", smp_processor_id(), > + data->used ? "en" : "dis"); > + > + /* Zero indicates 'invalid generation', so we start the count at one. */ > + data->generation = 1; > + > + /* Zero indicates 'VMIDs use disabled', so we start the count at one. */ > + data->next_vmid = 1; > +} > + > +void vmid_flush_vcpu(struct vcpu *v) > +{ > + write_atomic(&v->arch.vmid.generation, 0); > +} > + > +void vmid_flush_hart(void) > +{ > + struct vmid_data *data = &this_cpu(vmid_data); > + > + if ( !data->used ) > + return; > + > + if ( likely(++data->generation != 0) ) > + return; > + > + /* > + * VMID generations are 64 bit. Overflow of generations never happens. > + * For safety, we simply disable ASIDs, so correctness is established; it > + * only runs a bit slower. > + */ > + printk("%s: VMID generation overrun. Disabling VMIDs.\n", __func__); Is logging of the function name of any value here? Also, despite the x86 original havinbg it like this - generally no full stops please if log messages. "VMID generation overrun; disabling VMIDs\n" would do. > +bool vmid_handle_vmenter(struct vcpu_vmid *vmid) > +{ > + struct vmid_data *data = &this_cpu(vmid_data); > + > + /* Test if VCPU has valid VMID. */ x86 has a ->disabled check up from here; why do you not check ->used? > + if ( read_atomic(&vmid->generation) == data->generation ) > + return 0; > + > + /* If there are no free VMIDs, need to go to a new generation. */ > + if ( unlikely(data->next_vmid > data->max_vmid) ) > + { > + vmid_flush_hart(); > + data->next_vmid = 1; > + if ( !data->used ) > + goto disabled; > + } > + > + /* Now guaranteed to be a free VMID. */ > + vmid->vmid = data->next_vmid++; > + write_atomic(&vmid->generation, data->generation); > + > + /* > + * When we assign VMID 1, flush all TLB entries as we are starting a new > + * generation, and all old VMID allocations are now stale. > + */ > + return (vmid->vmid == 1); Minor: Parentheses aren't really needed here. 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Thu, 06 Nov 2025 06:09:32 -0800 (PST) Message-ID: <63525e6f-4e17-4155-87b2-47b9ac9ea474@suse.com> Date: Thu, 6 Nov 2025 15:09:31 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH] xen: make VMTRACE support optional To: Grygorii Strashko Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Tamas K Lengyel , Alexandru Isaila , Petre Pircalabu , Penny Zheng , "xen-devel@lists.xenproject.org" References: <20251031212005.1338212-1-grygorii_strashko@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.11.2025 14:50, Grygorii Strashko wrote: > On 06.11.25 14:00, Jan Beulich wrote: >> On 31.10.2025 22:20, Grygorii Strashko wrote: >>> --- a/xen/Kconfig.debug >>> +++ b/xen/Kconfig.debug >>> @@ -155,4 +155,19 @@ config DEBUG_INFO >>> "make install-xen" for installing xen.efi, stripping needs to be >>> done outside the Xen build environment). >>> >>> +config HAS_VMTRACE >>> + bool >>> + >>> +config VMTRACE >>> + bool "HW VM tracing support" >>> + depends on HAS_VMTRACE >>> + default y >>> + help >>> + Enables HW VM tracing support which allows to configure HW processor >>> + features (vmtrace_op) to enable capturing information about software >>> + execution using dedicated hardware facilities with minimal interference >>> + to the software being traced. The trace date can be retrieved using buffer >> >> Nit: s/date/data/ >> >>> + shared between Xen and domain >>> + (see XENMEM_acquire_resource(XENMEM_resource_vmtrace_buf)). >>> + >> >> I was actually meaning to ask that "VMX only" should somehow be mentioned here, >> but then I noticed this is an arch-independent location. > > Right, Arch code advertise VMTRACE support with HAS_VMTRACE. > In this particular case: > config INTEL_VMX > ... > select HAS_VMTRACE > > >> I'm not quite sure we want it like this (just yet). > > ? To rephrase the question: Are we expecting anything other than VMX to support VMTRACE any time soon? >>> @@ -738,6 +740,7 @@ static inline bool altp2m_vcpu_emulate_ve(struct vcpu *v) >>> bool altp2m_vcpu_emulate_ve(struct vcpu *v); >>> #endif /* CONFIG_ALTP2M */ >>> >>> +#ifdef CONFIG_VMTRACE >>> static inline int hvm_vmtrace_control(struct vcpu *v, bool enable, bool reset) >>> { >>> if ( hvm_funcs.vmtrace_control ) >>> @@ -780,6 +783,12 @@ static inline int hvm_vmtrace_reset(struct vcpu *v) >>> >>> return -EOPNOTSUPP; >>> } >>> +#else >>> +static inline int hvm_vmtrace_reset(struct vcpu *v) >>> +{ >>> + return 0; >>> +} >>> +#endif >> >> #ifdef inside the function body please, to reduce redundancy and to reduce the >> risk of overlooking multiple places which need editing (when e.g. function >> parameters change). > > All hvm_vmtrace_x() functions are inline - do you mean like below for all of them? > > static inline int hvm_vmtrace_get_option( > struct vcpu *v, uint64_t key, uint64_t *value) > { > +#ifdef CONFIG_VMTRACE > if ( hvm_funcs.vmtrace_get_option ) > return alternative_call(hvm_funcs.vmtrace_get_option, v, key, value); > +#endif > > return -EOPNOTSUPP; > } No, the request was for just the single function that you add a 2nd instance of. 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Thu, 06 Nov 2025 06:26:00 -0800 (PST) Message-ID: <8e3b791c-22ca-43e2-a3bf-f440032ab1ed@suse.com> Date: Thu, 6 Nov 2025 15:25:59 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [for 4.22 v5 05/18] xen/riscv: add root page table allocation To: Oleksii Kurochko Cc: Alistair Francis , Bob Eshleman , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <81d36dc5277d4756442f3ad5d64f37148787394a.1760974017.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <81d36dc5277d4756442f3ad5d64f37148787394a.1760974017.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 20.10.2025 17:57, Oleksii Kurochko wrote: > --- a/xen/arch/riscv/p2m.c > +++ b/xen/arch/riscv/p2m.c > @@ -3,6 +3,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -103,6 +104,70 @@ void __init pre_gstage_init(void) > vmid_init(); > } > > +static void clear_and_clean_page(struct page_info *page, bool clean_dcache) > +{ > + clear_domain_page(page_to_mfn(page)); > + > + /* > + * If the IOMMU doesn't support coherent walks and the p2m tables are > + * shared between the CPU and IOMMU, it is necessary to clean the > + * d-cache. > + */ > + if ( clean_dcache ) > + clean_dcache_va_range(page, PAGE_SIZE); This cleans part of frame_table[], but not the memory page in question. > --- a/xen/arch/riscv/paging.c > +++ b/xen/arch/riscv/paging.c > @@ -4,46 +4,67 @@ > #include > #include > > +static int paging_ret_page_to_domheap(struct domain *d) > +{ > + struct page_info *page; > + > + ASSERT(spin_is_locked(&d->arch.paging.lock)); > + > + /* Return memory to domheap. */ > + page = page_list_remove_head(&d->arch.paging.freelist); > + if( page ) > + { > + d->arch.paging.total_pages--; > + free_domheap_page(page); > + } > + else > + { > + printk(XENLOG_ERR > + "Failed to free P2M pages, P2M freelist is empty.\n"); Nit: See earlier remark regarding full stops in log messages. The double "P2M" also looks unnecessary to me. > +static int paging_add_page_to_freelist(struct domain *d) > +{ > + struct page_info *page; > + > + ASSERT(spin_is_locked(&d->arch.paging.lock)); > + > + /* Need to allocate more memory from domheap */ > + page = alloc_domheap_page(d, MEMF_no_owner); > + if ( page == NULL ) > + { > + printk(XENLOG_ERR "Failed to allocate pages.\n"); Again. (Also log messages typically wouldn't start with a capital letter, unless of course it's e.g. an acronym.) > @@ -55,6 +76,39 @@ int paging_freelist_adjust(struct domain *d, unsigned long pages, > return 0; > } > > +int paging_refill_from_domheap(struct domain *d, unsigned int nr_pages) > +{ > + ASSERT(spin_is_locked(&d->arch.paging.lock)); > + > + for ( unsigned int i = 0; i < nr_pages; i++ ) > + { > + int rc = paging_add_page_to_freelist(d); The anomaly is more pronounced here, with the other function name in context: paging_refill_from_domheap() doesn't suggest there's a page (or several) being handed to it. paging_add_page_to_freelist() suggests one of its parameter would want to be struct page_info *. Within the naming model you chose, maybe paging_refill_from_domheap_one() or paging_refill_one_from_domheap()? Or simply _paging_refill_from_domheap()? > + if ( rc ) > + return rc; > + } > + > + return 0; > +} > + > +int paging_ret_to_domheap(struct domain *d, unsigned int nr_pages) > +{ > + ASSERT(spin_is_locked(&d->arch.paging.lock)); > + > + if ( d->arch.paging.total_pages < nr_pages ) > + return false; > + > + for ( unsigned int i = 0; i < nr_pages; i++ ) > + { > + int rc = paging_ret_page_to_domheap(d); Somewhat similarly here. Maybe simply insert "one" in the name? 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Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org Subject: Re: [PATCH v4 07/12] mm: enable lazy_mmu sections to nest Message-ID: References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-8-kevin.brodsky@arm.com> <87ms5050g0.ritesh.list@gmail.com> <50d1b63a-88d7-4484-82c0-3bde96e3207d-agordeev@linux.ibm.com> <48a4ecb5-3412-4d3f-9e43-535f8bee505f@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <48a4ecb5-3412-4d3f-9e43-535f8bee505f@arm.com> X-TM-AS-GCONF: 00 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTAxMDAyMSBTYWx0ZWRfX/YZyxmYrnrJ9 xCd4ujIZq7y0lim+YrboYNwl5TsRqk1oOoSjjpPrN2bdS3Yj8+BGw0eDwtF58nU1AxMxpNChFIt kjix63Qwyja0jEYGMpU1W2106lg0/CJxII5rA6IH8ca9YKwDy28POrrS/UliHt5WUxWiY4RvYvK KvjB7Q8W206gTc1ADhSmWj/G5k8ScNY8TzY3EvQXr/BVbxmytuyeX5wifFN5ALnc+chrAMwW/6j QnaXo4exfOcjHuuvP3Y/8qCuhkp//Cj/oqysiN8ehC/uU7vBozF7kWjRZh1pps/+U+PuMO1myX5 CRiCQpqgahhrliHsenckRMbSmwXbtqSltJhRXk0UqsG5hBu7Va14xA+ZT8E/Z1xVt8mLCpJRj/v zoQNd/ElbUWMuQJeG/kbcYXCoAfCRQ== X-Proofpoint-GUID: TFOhjUGUwcHF-txd3JWs84wNA_RrcFJO X-Authority-Analysis: v=2.4 cv=OdCVzxTY c=1 sm=1 tr=0 ts=690cbfcd cx=c_pps a=3Bg1Hr4SwmMryq2xdFQyZA==:117 a=3Bg1Hr4SwmMryq2xdFQyZA==:17 a=kj9zAlcOel0A:10 a=6UeiqGixMTsA:10 a=VkNPw1HP01LnGYTKEx00:22 a=VwQbUJbxAAAA:8 a=20KFwNOVAAAA:8 a=ENMs_uJo8d3F8rUHHo4A:9 a=CjuIK1q_8ugA:10 a=DXsff8QfwkrTrK3sU8N1:22 a=Z5ABNNGmrOfJ6cZ5bIyy:22 a=bWyr8ysk75zN3GCy5bjg:22 X-Proofpoint-ORIG-GUID: 0GlCJX74XkrUHHpzFp_J9wLdkqJNwiej X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-06_03,2025-11-06_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 spamscore=0 suspectscore=0 impostorscore=0 lowpriorityscore=0 priorityscore=1501 clxscore=1015 phishscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510240000 definitions=main-2511010021 On Thu, Nov 06, 2025 at 10:51:43AM +0000, Kevin Brodsky wrote: > On 05/11/2025 16:12, Alexander Gordeev wrote: > > On Wed, Nov 05, 2025 at 02:19:03PM +0530, Ritesh Harjani wrote: > >>> + * in_lazy_mmu_mode() can be used to check whether the lazy MMU mode is > >>> + * currently enabled. > >>> */ > >>> #ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE > >>> static inline void lazy_mmu_mode_enable(void) > >>> { > >>> - arch_enter_lazy_mmu_mode(); > >>> + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; > >>> + > >>> + VM_WARN_ON_ONCE(state->nesting_level == U8_MAX); > >>> + /* enable() must not be called while paused */ > >>> + VM_WARN_ON(state->nesting_level > 0 && !state->active); > >>> + > >>> + if (state->nesting_level++ == 0) { > >>> + state->active = true; > >>> + arch_enter_lazy_mmu_mode(); > >>> + } > >>> } > >> Some architectures disables preemption in their > >> arch_enter_lazy_mmu_mode(). So shouldn't the state->active = true should > >> happen after arch_enter_lazy_mmu_mode() has disabled preemption()? i.e. > > Do you have some scenario in mind that could cause an issue? > > IOW, what could go wrong if the process is scheduled to another > > CPU before preempt_disable() is called? > > I'm not sure I understand the issue either. > > >> static inline void lazy_mmu_mode_enable(void) > >> { > >> - arch_enter_lazy_mmu_mode(); > >> + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; > >> + > >> + VM_WARN_ON_ONCE(state->nesting_level == U8_MAX); > >> + /* enable() must not be called while paused */ > >> + VM_WARN_ON(state->nesting_level > 0 && !state->active); > >> + > >> + if (state->nesting_level++ == 0) { > >> + arch_enter_lazy_mmu_mode(); > >> + state->active = true; > >> + } > >> } > >> > >> ... I think it make more sense to enable the state after the arch_** > >> call right. > > But then in_lazy_mmu_mode() would return false if called from > > arch_enter_lazy_mmu_mode(). Not big problem, but still.. > > The ordering of nesting_level/active was the way you expected in v3, but > the conclusion of the discussion with David H [1] is that it doesn't > really matter so I simplified the ordering in v4 - the arch hooks > shouldn't call in_lazy_mmu_mode() or inspect lazy_mmu_state. > arch_enter()/arch_leave() shouldn't need it anyway since they're called > once per outer section (not in nested sections). arch_flush() could > potentially do something different when nested, but that seems unlikely. > > - Kevin > > [1] > https://lore.kernel.org/all/af4414b6-617c-4dc8-bddc-3ea00d1f6f3b@redhat.com/ I might be misunderstand this conversation, but it looked to me as a discussion about lazy_mmu_state::nesting_level value, not lazy_mmu_state::active. I do use in_lazy_mmu_mode() (lazy_mmu_state::active) check from the arch- callbacks. Here is the example (and likely the only case so far) where it hits: static int kasan_populate_vmalloc_pte(pte_t *ptep, unsigned long addr, void *_data) { lazy_mmu_mode_pause(); ... if (likely(pte_none(ptep_get(ptep)))) { /* Here set_pte() checks whether we are in lazy_mmu mode */ set_pte_at(&init_mm, addr, ptep, pte); <--- calls set_pte() data->pages[index] = NULL; } ... lazy_mmu_mode_resume(); ... } So without in_lazy_mmu_mode() check above the arch-specific set_pte() implementation enters a wrong branch, which ends up in: [ 394.503134] Call Trace: [ 394.503137] [<00007fffe01333f4>] dump_stack_lvl+0xbc/0xf0 [ 394.503143] [<00007fffe010298c>] vpanic+0x1cc/0x418 [ 394.503149] [<00007fffe0102c7a>] panic+0xa2/0xa8 [ 394.503154] [<00007fffe01e7a8a>] check_panic_on_warn+0x8a/0xb0 [ 394.503160] [<00007fffe082d122>] end_report+0x72/0x110 [ 394.503166] [<00007fffe082d3e6>] kasan_report+0xc6/0x100 [ 394.503171] [<00007fffe01b9556>] ipte_batch_ptep_get+0x146/0x150 [ 394.503176] [<00007fffe0830096>] kasan_populate_vmalloc_pte+0xe6/0x1e0 [ 394.503183] [<00007fffe0718050>] apply_to_pte_range+0x1a0/0x570 [ 394.503189] [<00007fffe07260fa>] __apply_to_page_range+0x3ca/0x8f0 [ 394.503195] [<00007fffe0726648>] apply_to_page_range+0x28/0x40 [ 394.503201] [<00007fffe082fe34>] __kasan_populate_vmalloc+0x324/0x340 [ 394.503207] [<00007fffe076954e>] alloc_vmap_area+0x31e/0xbf0 [ 394.503213] [<00007fffe0770106>] __get_vm_area_node+0x1a6/0x2d0 [ 394.503218] [<00007fffe07716fa>] __vmalloc_node_range_noprof+0xba/0x260 [ 394.503224] [<00007fffe0771970>] __vmalloc_node_noprof+0xd0/0x110 [ 394.503229] [<00007fffe0771a22>] vmalloc_noprof+0x32/0x40 [ 394.503234] [<00007fff604eaa42>] full_fit_alloc_test+0xb2/0x3e0 [test_vmalloc] [ 394.503241] [<00007fff604eb478>] test_func+0x488/0x760 [test_vmalloc] [ 394.503247] [<00007fffe025ad68>] kthread+0x368/0x630 [ 394.503253] [<00007fffe01391e0>] __ret_from_fork+0xd0/0x490 [ 394.503259] [<00007fffe24e468a>] ret_from_fork+0xa/0x30 I could have cached lazy_mmu_state::active as arch-specific data and check it, but then what is the point to have it generalized? Thanks! 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Oh, wait - maybe that's going to be the subject of patch 3. >> >> yes. it is patch 3 - It is not small. >> And I really wanted this patch to contain as less modifications as possible on >> top of code moving. > > I wonder what other x86 maintainers think here. > >>> While >>> often splitting steps helps, I'm not sure that's very useful here. You're >>> touching again immediately what you just have moved, all to reach a single >>> goal. >>> >>>> @@ -1421,6 +1422,64 @@ static void cf_check vmx_set_segment_register( >>>> vmx_vmcs_exit(v); >>>> } >>>> >>>> +/* Exit UC mode only if all VCPUs agree on MTRR/PAT and are not in no_fill. */ >>>> +static bool domain_exit_uc_mode(struct vcpu *v) >>>> +{ >>>> + struct domain *d = v->domain; >>>> + struct vcpu *vs; >>>> + >>>> + for_each_vcpu(d, vs) >>>> + { >>>> + if ( (vs == v) || !vs->is_initialised ) >>>> + continue; >>>> + if ( (vs->arch.hvm.cache_mode == NO_FILL_CACHE_MODE) || >>>> + mtrr_pat_not_equal(vs, v) ) >>>> + return false; >>>> + } >>>> + >>>> + return true; >>>> +} >>>> + >>>> +static void hvm_set_uc_mode(struct vcpu *v, bool is_in_uc_mode) >>>> +{ >>>> + v->domain->arch.hvm.is_in_uc_mode = is_in_uc_mode; >>>> + shadow_blow_tables_per_domain(v->domain); >>>> +} >>> >>> Similarly I wonder whether this function wouldn't better change to taking >>> struct domain * right away. "v" itself is only ever used to get hold of >>> its domain. At the call sites this will then make obvious that this is a >>> domain-wide operation. >> >> Agree. but.. >> In this patch I wanted to minimize changes and do modifications step by step. >> >> I can add additional patch such as "rework struct domain access in cache disable mode code". >> Will it work? I'm planning to resend with: - incorporating struct domain * as parameter in hvm_set_uc_mode() >> >>> >>>> +static void hvm_shadow_handle_cd(struct vcpu *v, unsigned long value) >>>> +{ >>>> + if ( value & X86_CR0_CD ) >>>> + { >>>> + /* Entering no fill cache mode. */ >>>> + spin_lock(&v->domain->arch.hvm.uc_lock); >>>> + v->arch.hvm.cache_mode = NO_FILL_CACHE_MODE; >>>> + >>>> + if ( !v->domain->arch.hvm.is_in_uc_mode ) >>>> + { >>>> + domain_pause_nosync(v->domain); >>>> + >>>> + /* Flush physical caches. */ >>>> + flush_all(FLUSH_CACHE_EVICT); >>>> + hvm_set_uc_mode(v, true); >>>> + >>>> + domain_unpause(v->domain); >>>> + } >>>> + spin_unlock(&v->domain->arch.hvm.uc_lock); >>>> + } >>>> + else if ( !(value & X86_CR0_CD) && >>>> + (v->arch.hvm.cache_mode == NO_FILL_CACHE_MODE) ) >>>> + { >>>> + /* Exit from no fill cache mode. */ >>>> + spin_lock(&v->domain->arch.hvm.uc_lock); >>>> + v->arch.hvm.cache_mode = NORMAL_CACHE_MODE; >>>> + >>>> + if ( domain_exit_uc_mode(v) ) >>>> + hvm_set_uc_mode(v, false); >>>> + >>>> + spin_unlock(&v->domain->arch.hvm.uc_lock); >>>> + } >>>> +} >>> >>> This function, in turn, could do with a local struct domain *d. - incorporating struct domain * as parameter local var >>> >>>> static int cf_check vmx_set_guest_pat(struct vcpu *v, u64 gpat) >>>> { >>>> if ( !paging_mode_hap(v->domain) || >>> >>> Why did you put the code above this function? It's solely a helper of >>> vmx_handle_cd(), so would imo best be placed immediately ahead of that one. >> >> Right. Hence vmx_x_guest_pat() are also used by vmx_handle_cd() I decided to put before them. > > The main purpose of vmx_set_guest_pat() is, however, its use as a hook function. > It's merely an optimization that the function is called directly by VMX code. - moving code before vmx_handle_cd(). > >>> Bottom line: The change could go in as is, but imo it would be nice if it >>> was tidied some while moving. >> >> I'd be very much appreciated if this could happen. > > "this" being what out of the two or more possible options? (I take it you mean > "could go in as is", but that's guesswork.) I'm not goint to squah rest of the series. -- Best regards, -grygorii From xen-devel-bounces@lists.xenproject.org Thu Nov 06 15:58:05 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 15:58:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157071.1485988 (Exim 4.92) (envelope-from ) id 1vH2N5-0007GW-6m; Thu, 06 Nov 2025 15:57:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157071.1485988; Thu, 06 Nov 2025 15:57:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vH2N5-0007GP-49; Thu, 06 Nov 2025 15:57:59 +0000 Received: by outflank-mailman (input) for mailman id 1157071; Thu, 06 Nov 2025 15:57:58 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vH2N4-0007GJ-5A for xen-devel@lists.xenproject.org; Thu, 06 Nov 2025 15:57:58 +0000 Received: from mail136-17.atl41.mandrillapp.com (mail136-17.atl41.mandrillapp.com [198.2.136.17]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 5ba3e496-bb29-11f0-9d17-b5c5bf9af7f9; Thu, 06 Nov 2025 16:57:56 +0100 (CET) Received: from pmta11.mandrill.prod.atl01.rsglab.com (localhost [127.0.0.1]) by mail136-17.atl41.mandrillapp.com (Mailchimp) with ESMTP id 4d2Rfp1kC0zPm0Wcy for ; Thu, 6 Nov 2025 15:57:54 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id 35b18899a5f3438fb6e7c458c2edc1ae; Thu, 06 Nov 2025 15:57:54 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5ba3e496-bb29-11f0-9d17-b5c5bf9af7f9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1762444674; x=1762714674; bh=BYXZ9x9p2TsalxisIObnU5c4RxIs82a+71hF6ySnFmY=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=JilvSfYEvr6dXrwHWxYLiB83LfWRyOthtMjHDgyI+iFsjLP2/7TfLRkJ1OmlsCwei oMV1L4Fb1vcl6+e4nrXr9jsw6bH/7pityY7ZZgdMq9r3UZLbvyUUP1WQG4gOWYTuch 85bm8La/b7ge2ZAMEJTzXkYkw3akhDr4Umk0Yp3uliyBJxDBEwcqGcVQHu+lGillPt IHsk4V+0RkmGnWEq8VR+WvFHlgKeeooWQGCdi2EszVZNL6ABqg7ryy90JO/CPjefMe Xe2O+GE2VO+Y10aww406fwL9oQpvnhR4odfdChpOWlt4Qf6n8YN44YY1qgEzDLkEGc gRq1MjvCQxqRA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1762444674; x=1762705174; i=teddy.astie@vates.tech; bh=BYXZ9x9p2TsalxisIObnU5c4RxIs82a+71hF6ySnFmY=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=a456u8IauwgXxWeCaP8ponMjlZ9N5/NmV0vOKTfGM7V5SSR7wOVwdL+lZt729PEjR XE56Tw3LfOJ57tWX7/UtU7IX+lMZmGzP0dqsRacFUJ6LUTtgFs295MjO3GpGjQq7kq M5KuEJSMJ5jWmCNr300Lqbe2ilHdw1aimxWaXS+oun9tKvPO8pin3oMSIlFDxdCmG7 Fsjst/qwLXxQpAgQdUgEgvP3NKlt9ey7AvLGUNz8feNdDj5Kl2q0AqwNz6/xnmOgat FboYwbDtYTr8NMqoeWkijMu7iz9epOKApy0cU5QpIku2X7nM69lcVMha8TbvnVleXY MiqkEwhZrCLpA== From: "Teddy Astie" Subject: =?utf-8?Q?Re:=20[XEN][PATCH]=20xen/x86:=20guest=5Faccess:=20optimize=20raw=5Fx=5Fguest()=20for=20PV=20and=20HVM=20combinations?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1762444672391 Message-Id: <434d9ce4-e5e1-453d-84b7-e21e66d0c5a3@vates.tech> To: "Grygorii Strashko" , xen-devel@lists.xenproject.org Cc: "Jan Beulich" , "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Anthony PERARD" , "Michal Orzel" , "Julien Grall" , "Stefano Stabellini" , "Alejandro Vallejo" , "Jason Andryuk" References: <20251031212058.1338332-1-grygorii_strashko@epam.com> In-Reply-To: <20251031212058.1338332-1-grygorii_strashko@epam.com> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.35b18899a5f3438fb6e7c458c2edc1ae?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20251106:md Date: Thu, 06 Nov 2025 15:57:54 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Le 31/10/2025 =C3=A0 22:25, Grygorii Strashko a =C3=A9crit=C2=A0: > From: Grygorii Strashko > > Xen uses below pattern for raw_x_guest() functions: > > define raw_copy_to_guest(dst, src, len) \ > (is_hvm_vcpu(current) ? \ > copy_to_user_hvm((dst), (src), (len)) : \ > copy_to_guest_pv(dst, src, len)) > > How this pattern is working depends on CONFIG_PV/CONFIG_HVM as: > - PV=3Dy and HVM=3Dy > Proper guest access function is selected depending on domain type. > - PV=3Dy and HVM=3Dn > Only PV domains are possible. is_hvm_domain/vcpu() will constify to "f= alse" > and compiler will optimize code and skip HVM specific part. > - PV=3Dn and HVM=3Dy > Only HVM domains are possible. is_hvm_domain/vcpu() will not be consti= fied. > No PV specific code will be optimized by compiler. > - PV=3Dn and HVM=3Dn > No guests should possible. The code will still follow PV path. > > Rework raw_x_guest() code to use required functions explicitly for each > combination of CONFIG_PV/CONFIG_HVM with main intention to optimize code = for > (PV=3Dn and HVM=3Dy) case. > > For the case (PV=3Dn and HVM=3Dn) empty stubs are created which return (1= ) > indicating failure. Hence, no guests should possible in this case - > which means no access to guest memory should ever happen. > The two calls of __raw_copy_to_guest() in common/domain.c->update_runstat= e_area() > are fixed for this case by explicitly cast the return value to void > (MISRA C Rule 17.7). > > Finally build arch/x86/usercopy.c only for PV=3Dy. > > The measured (bloat-o-meter) improvement for (PV=3Dn and HVM=3Dy) case is= : > add/remove: 0/10 grow/shrink: 2/90 up/down: 163/-30932 (-30769) > Total: Before=3D1937113, After=3D1906344, chg -1.59% > > Signed-off-by: Grygorii Strashko > --- > xen/arch/x86/Makefile | 2 +- > xen/arch/x86/include/asm/guest_access.h | 38 +++++++++++++++++++++++++ > xen/common/domain.c | 10 ++++--- > 3 files changed, 45 insertions(+), 5 deletions(-) > > diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile > index 407571c510e1..27f131ffeb61 100644 > --- a/xen/arch/x86/Makefile > +++ b/xen/arch/x86/Makefile > @@ -71,7 +71,7 @@ obj-y +=3D time.o > obj-y +=3D traps-setup.o > obj-y +=3D traps.o > obj-$(CONFIG_INTEL) +=3D tsx.o > -obj-y +=3D usercopy.o > +obj-$(CONFIG_PV) +=3D usercopy.o > obj-y +=3D x86_emulate.o > obj-$(CONFIG_TBOOT) +=3D tboot.o > obj-y +=3D hpet.o > diff --git a/xen/arch/x86/include/asm/guest_access.h b/xen/arch/x86/inclu= de/asm/guest_access.h > index 69716c8b41bb..36aeb89524ab 100644 > --- a/xen/arch/x86/include/asm/guest_access.h > +++ b/xen/arch/x86/include/asm/guest_access.h > @@ -13,6 +13,7 @@ > #include > > /* Raw access functions: no type checking. */ > +#if defined(CONFIG_PV) && defined(CONFIG_HVM) > #define raw_copy_to_guest(dst, src, len) \ > (is_hvm_vcpu(current) ? \ > copy_to_user_hvm((dst), (src), (len)) : \ > @@ -34,6 +35,43 @@ > copy_from_user_hvm((dst), (src), (len)) : \ > __copy_from_guest_pv(dst, src, len)) > > +#elif defined(CONFIG_HVM) > +#define raw_copy_to_guest(dst, src, len) \ > + copy_to_user_hvm((dst), (src), (len)) > +#define raw_copy_from_guest(dst, src, len) \ > + copy_from_user_hvm((dst), (src), (len)) > +#define raw_clear_guest(dst, len) \ > + clear_user_hvm((dst), (len)) > +#define __raw_copy_to_guest(dst, src, len) \ > + copy_to_user_hvm((dst), (src), (len)) > +#define __raw_copy_from_guest(dst, src, len) \ > + copy_from_user_hvm((dst), (src), (len)) > + > +#elif defined(CONFIG_PV) > +#define raw_copy_to_guest(dst, src, len) \ > + copy_to_guest_pv(dst, src, len) > +#define raw_copy_from_guest(dst, src, len) \ > + copy_from_guest_pv(dst, src, len) > +#define raw_clear_guest(dst, len) \ > + clear_guest_pv(dst, len) > +#define __raw_copy_to_guest(dst, src, len) \ > + __copy_to_guest_pv(dst, src, len) > +#define __raw_copy_from_guest(dst, src, len) \ > + __copy_from_guest_pv(dst, src, len) > + > +#else > +#define raw_copy_to_guest(dst, src, len) \ > + ((void)(dst), (void)(src), (void)(len), 1) > +#define raw_copy_from_guest(dst, src, len) \ > + ((void)(dst), (void)(src), (void)(len), 1) > +#define raw_clear_guest(dst, len) \ > + ((void)(dst), (void)(len), 1) > +#define __raw_copy_to_guest(dst, src, len) \ > + ((void)(dst), (void)(src), (void)(len), 1) > +#define __raw_copy_from_guest(dst, src, len) \ > + ((void)(dst), (void)(src), (void)(len), 1) > +#endif > + > /* > * Pre-validate a guest handle. > * Allows use of faster __copy_* functions. > diff --git a/xen/common/domain.c b/xen/common/domain.c > index 4f91316ad93e..c603edcc7d46 100644 > --- a/xen/common/domain.c > +++ b/xen/common/domain.c > @@ -1985,8 +1985,9 @@ bool update_runstate_area(struct vcpu *v) > #endif > guest_handle--; > runstate.state_entry_time |=3D XEN_RUNSTATE_UPDATE; > - __raw_copy_to_guest(guest_handle, > - (void *)(&runstate.state_entry_time + 1) - 1= , 1); > + (void)__raw_copy_to_guest(guest_handle, > + (void *)(&runstate.state_entry_time + = 1) - 1, > + 1); > smp_wmb(); > } > > @@ -2008,8 +2009,9 @@ bool update_runstate_area(struct vcpu *v) > { > runstate.state_entry_time &=3D ~XEN_RUNSTATE_UPDATE; > smp_wmb(); > - __raw_copy_to_guest(guest_handle, > - (void *)(&runstate.state_entry_time + 1) - 1= , 1); > + (void)__raw_copy_to_guest(guest_handle, > + (void *)(&runstate.state_entry_time + = 1) - 1, > + 1); > } > > update_guest_memory_policy(v, &policy); Alternatively, we can make all the raw_* functions `static inline` and have something like this which should have the same effect with much less redundancy. static inline unsigned int raw_copy_to_user_hvm(void *to, const void *from, unsigned int len) { if ( IS_ENABLED(CONFIG_HVM) && (!IS_ENABLED(CONFIG_PV) || is_hvm_vcpu(current) ) copy_to_user_hvm(to, from, len); else if ( IS_ENABLED(CONFIG_PV) ) copy_to_guest_pv(to, from, len); } Teddy -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Thu Nov 06 15:59:37 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 15:59:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157081.1485997 (Exim 4.92) (envelope-from ) id 1vH2Oe-0007q5-ME; Thu, 06 Nov 2025 15:59:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157081.1485997; Thu, 06 Nov 2025 15:59:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vH2Oe-0007py-Jj; Thu, 06 Nov 2025 15:59:36 +0000 Received: by outflank-mailman (input) for mailman id 1157081; Thu, 06 Nov 2025 15:58:43 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vH2Nm-0007GJ-TT for xen-devel@lists.xenproject.org; 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The same applies to schedule_work() that is using system_wq and queue_work(), that makes use again of WORK_CPU_UNBOUND. This lack of consistency cannot be addressed without refactoring the API. This continues the effort to refactor workqueue APIs, which began with the introduction of new workqueues and a new alloc_workqueue flag in: commit 128ea9f6ccfb ("workqueue: Add system_percpu_wq and system_dfl_wq") commit 930c2ea566af ("workqueue: Add new WQ_PERCPU flag") Switch to using system_percpu_wq because system_wq is going away as part of a workqueue restructuring. Suggested-by: Tejun Heo Signed-off-by: Marco Crivellari --- drivers/xen/events/events_base.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/xen/events/events_base.c b/drivers/xen/events/events_base.c index 9478fae014e5..663df17776fd 100644 --- a/drivers/xen/events/events_base.c +++ b/drivers/xen/events/events_base.c @@ -581,7 +581,7 @@ static void lateeoi_list_add(struct irq_info *info) eoi_list); if (!elem || info->eoi_time < elem->eoi_time) { list_add(&info->eoi_list, &eoi->eoi_list); - mod_delayed_work_on(info->eoi_cpu, system_wq, + mod_delayed_work_on(info->eoi_cpu, system_percpu_wq, &eoi->delayed, delay); } else { list_for_each_entry_reverse(elem, &eoi->eoi_list, eoi_list) { @@ -666,7 +666,7 @@ static void xen_irq_lateeoi_worker(struct work_struct *work) break; if (now < info->eoi_time) { - mod_delayed_work_on(info->eoi_cpu, system_wq, + mod_delayed_work_on(info->eoi_cpu, system_percpu_wq, &eoi->delayed, info->eoi_time - now); break; @@ -782,7 +782,7 @@ static void xen_free_irq(struct irq_info *info) WARN_ON(info->refcnt > 0); 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charset=UTF-8 Content-Transfer-Encoding: 8bit Currently if a user enqueue a work item using schedule_delayed_work() the used wq is "system_wq" (per-cpu wq) while queue_delayed_work() use WORK_CPU_UNBOUND (used when a cpu is not specified). The same applies to schedule_work() that is using system_wq and queue_work(), that makes use again of WORK_CPU_UNBOUND. This lack of consistentcy cannot be addressed without refactoring the API. alloc_workqueue() treats all queues as per-CPU by default, while unbound workqueues must opt-in via WQ_UNBOUND. This default is suboptimal: most workloads benefit from unbound queues, allowing the scheduler to place worker threads where they’re needed and reducing noise when CPUs are isolated. This continues the effort to refactor workqueue APIs, which began with the introduction of new workqueues and a new alloc_workqueue flag in: commit 128ea9f6ccfb ("workqueue: Add system_percpu_wq and system_dfl_wq") commit 930c2ea566af ("workqueue: Add new WQ_PERCPU flag") This change adds a new WQ_PERCPU flag to explicitly request alloc_workqueue() to be per-cpu when WQ_UNBOUND has not been specified. With the introduction of the WQ_PERCPU flag (equivalent to !WQ_UNBOUND), any alloc_workqueue() caller that doesn’t explicitly specify WQ_UNBOUND must now use WQ_PERCPU. Once migration is complete, WQ_UNBOUND can be removed and unbound will become the implicit default. Suggested-by: Tejun Heo Signed-off-by: Marco Crivellari --- drivers/xen/privcmd.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/xen/privcmd.c b/drivers/xen/privcmd.c index f52a457b302d..402be080ad2c 100644 --- a/drivers/xen/privcmd.c +++ b/drivers/xen/privcmd.c @@ -1091,7 +1091,8 @@ static long privcmd_ioctl_irqfd(struct file *file, void __user *udata) static int privcmd_irqfd_init(void) { - irqfd_cleanup_wq = alloc_workqueue("privcmd-irqfd-cleanup", 0, 0); + irqfd_cleanup_wq = alloc_workqueue("privcmd-irqfd-cleanup", WQ_PERCPU, + 0); if (!irqfd_cleanup_wq) return -ENOMEM; -- 2.51.1 From xen-devel-bounces@lists.xenproject.org Thu Nov 06 15:59:37 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 15:59:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157085.1486009 (Exim 4.92) (envelope-from ) id 1vH2Of-0007wx-8s; Thu, 06 Nov 2025 15:59:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157085.1486009; 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Thu, 06 Nov 2025 07:58:40 -0800 (PST) From: Marco Crivellari To: linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org Cc: Tejun Heo , Lai Jiangshan , Frederic Weisbecker , Sebastian Andrzej Siewior , Marco Crivellari , Michal Hocko , Juergen Gross , Stefano Stabellini , Oleksandr Tyshchenko Subject: [PATCH 0/2] replace system_wq with system_percpu_wq, add WQ_PERCPU to alloc_workqueue Date: Thu, 6 Nov 2025 16:58:29 +0100 Message-ID: <20251106155831.306248-1-marco.crivellari@suse.com> X-Mailer: git-send-email 2.51.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Hi, === Current situation: problems === Let's consider a nohz_full system with isolated CPUs: wq_unbound_cpumask is set to the housekeeping CPUs, for !WQ_UNBOUND the local CPU is selected. This leads to different scenarios if a work item is scheduled on an isolated CPU where "delay" value is 0 or greater then 0: schedule_delayed_work(, 0); This will be handled by __queue_work() that will queue the work item on the current local (isolated) CPU, while: schedule_delayed_work(, 1); Will move the timer on an housekeeping CPU, and schedule the work there. Currently if a user enqueue a work item using schedule_delayed_work() the used wq is "system_wq" (per-cpu wq) while queue_delayed_work() use WORK_CPU_UNBOUND (used when a cpu is not specified). The same applies to schedule_work() that is using system_wq and queue_work(), that makes use again of WORK_CPU_UNBOUND. This lack of consistency cannot be addressed without refactoring the API. === Recent changes to the WQ API === The following, address the recent changes in the Workqueue API: - commit 128ea9f6ccfb ("workqueue: Add system_percpu_wq and system_dfl_wq") - commit 930c2ea566af ("workqueue: Add new WQ_PERCPU flag") The old workqueues will be removed in a future release cycle. === Introduced Changes by this series === 1) [P 1] Replace uses of system_wq system_wq is a per-CPU workqueue, but his name is not clear. Because of that, system_wq has been replaced with system_percpu_wq. 2) [P 2] WQ_PERCPU added to alloc_workqueue() This change adds a new WQ_PERCPU flag to explicitly request alloc_workqueue() to be per-cpu when WQ_UNBOUND has not been specified. Thanks! Marco Crivellari (2): xen/events: replace use of system_wq with system_percpu_wq xen: privcmd: WQ_PERCPU added to alloc_workqueue users drivers/xen/events/events_base.c | 6 +++--- drivers/xen/privcmd.c | 3 ++- 2 files changed, 5 insertions(+), 4 deletions(-) -- 2.51.1 From xen-devel-bounces@lists.xenproject.org Thu Nov 06 16:32:46 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 16:32:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157126.1486028 (Exim 4.92) (envelope-from ) id 1vH2ud-0006FI-Oc; Thu, 06 Nov 2025 16:32:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157126.1486028; Thu, 06 Nov 2025 16:32:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vH2ud-0006FB-LK; Thu, 06 Nov 2025 16:32:39 +0000 Received: by outflank-mailman (input) for mailman id 1157126; Thu, 06 Nov 2025 16:32:39 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vH2ud-0006F5-4V for xen-devel@lists.xenproject.org; Thu, 06 Nov 2025 16:32:39 +0000 Received: from mail-yx1-xb130.google.com (mail-yx1-xb130.google.com [2607:f8b0:4864:20::b130]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 3431fcea-bb2e-11f0-9d17-b5c5bf9af7f9; Thu, 06 Nov 2025 17:32:37 +0100 (CET) Received: by mail-yx1-xb130.google.com with SMTP id 956f58d0204a3-63f9beb27b9so1195459d50.1 for ; Thu, 06 Nov 2025 08:32:37 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 3431fcea-bb2e-11f0-9d17-b5c5bf9af7f9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1762446756; x=1763051556; darn=lists.xenproject.org; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=HoVdgOaqpJHfULXrAsHu8NUf8f/kGjWiUOAS8fLn9b8=; b=B9GTAuF3DP9dY3akmDQ24St9N3UlGF60txdjxFn9gdpu+P4qDhBczy8beM88f+AiLr rl79qAL/xQVPOUKcdQHJFEG41axciKvvW0jxHJu42G44jiheRb+9IRlAwu0gpxpcIoyV NPdHBN0hU/tG8ygiEskDM/BTp/GnpNUQea6M4MOyfnM1Pk8hRNbXVGK1uzlFO9l2WgOj tWXyXarmHLHYKvtc/WduV4WXikSCKhPU3zbdIE7Kb+IPxykt361JAgAJ0xEys1Z2nN9C UI2ZmV80Bc9Rhp31ML3FmJO6aOSUoH8RZ/boNPQ7tffK19dvFVjptHeiMRXgWqOc/PS7 bdlQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1762446756; x=1763051556; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=HoVdgOaqpJHfULXrAsHu8NUf8f/kGjWiUOAS8fLn9b8=; b=c+1iaHvb1EySAazAy87oPEdT0n7E5XJ+OpK/blck6oVo/ht9vzABi50DH4nqSLSi+r 19GeHqLdcPpbSY95ir9BBj9lOwWyHSmgkrm2bj84FxejHeLRCieCFQ3emXfYltQv6t+I vVdOgHVmzQi+kNXCoUyRUrkmf2CbMjyi3cHd+RwvxSAD5pFKMbz97tHRjQiToF+9WC7a obEN7hH6MMlMpBPPGrQPxUWq/yhnxiBV8lFWpUSBllNQR+0M8DGkvmJl55z+jng2zK6X T+WKwPdFWHmvB7tdVz4ga35Kw0JlfY2LWUUWmFwQdRo3ZkaaWgGoRAZxu6YPqfolFfph TFBw== X-Gm-Message-State: AOJu0Yyb2xYKkdWuvcQLW7LSA5IipIIgbVngmRDoWx1UmYjJqkvOQhvs GSRtwUB42R1CdPm5jDPYgeZTGuffqBzg55tzSEae4uQsRWkGX/GiYIrpMAzO7ZV4mEUF8jtYb0y 5Gu0NPp0UN3nj14epn22EDi4FTydfB+M= X-Gm-Gg: ASbGnctOsZNLnjxDpqCdYPLfrCSr7M2vHWwE7yTJZnAuWNjUU6kqCZPWCtUKn6P4n3+ 9+WT7uyeQUXs2mA78yuec7GfyL/erJQNPW8KsZILunQtRGe/aX2T5lhbUMWKHVBTd/+17gVOB8V RzMBa+U6U5mQHaX55Lpltlm3Y8QYft9BfI6sVft0yWyUMxikyIvSeal1YHOEI7OdFaxxKiwA0oz e/oHGkjtCKoFYhR289lkzkHX4JZkHuyQnsUuUJatHOxNi0tJQZN9NNDkWpB X-Google-Smtp-Source: AGHT+IFxlP/1Z3VenWkOzjn1uLUZ0V3wSFGQmq3PyzCEB0U9Wxo4NZYQ0Vf9zxXV3zTBOtaE6aEK+J+r9NFWcAbOlvE= X-Received: by 2002:a05:690e:1a98:b0:63f:4b71:18d9 with SMTP id 956f58d0204a3-63fd35b5abfmr4526688d50.69.1762446755597; Thu, 06 Nov 2025 08:32:35 -0800 (PST) MIME-Version: 1.0 References: <20251105153808.20278-1-frediano.ziglio@citrix.com> <98e2f19f-5fce-4ad1-b821-f5abb1f815f6@suse.com> In-Reply-To: <98e2f19f-5fce-4ad1-b821-f5abb1f815f6@suse.com> From: Frediano Ziglio Date: Thu, 6 Nov 2025 16:32:24 +0000 X-Gm-Features: AWmQ_blH8amtrbbrg3a4IDMoF2izySOvVGnY5u5qjrvC8kQvPkLxSBqN9Ub54Zo Message-ID: Subject: Re: [PATCH v3] xen: Strip xen.efi by default To: Jan Beulich Cc: xen-devel@lists.xenproject.org, Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , =?UTF-8?Q?Marek_Marczykowski=2DG=C3=B3recki?= , Demi Marie Obenour Content-Type: text/plain; charset="UTF-8" On Thu, 6 Nov 2025 at 10:27, Jan Beulich wrote: > > On 06.11.2025 10:58, Frediano Ziglio wrote: > > On Thu, 6 Nov 2025 at 03:52, Demi Marie Obenour wrote: > >> Does objdump on the signed file return correct section names? > > > > From objdump -x > > > > Sections: > > Idx Name Size VMA LMA File off Algn > > 0 .text 0016c9ae ffff82d040200000 ffff82d040200000 00000320 2**4 > > CONTENTS, ALLOC, LOAD, READONLY, CODE > > 1 .rodata 0006b9e8 ffff82d040400000 ffff82d040400000 0016cce0 2**2 > > CONTENTS, ALLOC, LOAD, DATA > > 2 .buildid 00000035 ffff82d04046c000 ffff82d04046c000 001d86e0 2**2 > > CONTENTS, ALLOC, LOAD, READONLY, DATA > > 3 .init.text 0004d123 ffff82d040600000 ffff82d040600000 001d8720 2**2 > > CONTENTS, ALLOC, LOAD, READONLY, CODE > > 4 .init.data 0006c9b0 ffff82d040800000 ffff82d040800000 00225860 2**2 > > CONTENTS, ALLOC, LOAD, DATA > > 5 .data.read_mostly 00028da8 ffff82d040a00000 ffff82d040a00000 > > 00292220 2**4 > > CONTENTS, ALLOC, LOAD, DATA > > 6 .data 0000feec ffff82d040a29000 ffff82d040a29000 002bafe0 2**4 > > CONTENTS, ALLOC, LOAD, DATA > > 7 .bss 00223108 ffff82d040a39000 ffff82d040a39000 00000000 2**4 > > ALLOC > > 8 .reloc 000016b8 ffff82d040c5d000 ffff82d040c5d000 002caee0 2**2 > > CONTENTS, ALLOC, LOAD, READONLY, DATA > > 9 .sbat 000000a6 ffff82d040c5f000 ffff82d040c5f000 002cc5a0 2**2 > > CONTENTS, READONLY > > > > Which looks correct. > > > > From hexdump -C I can see close to the end > > > > ... > > 002cc580 30 ae 38 ae 60 ae 00 00 00 80 a3 00 10 00 00 00 |0.8.`...........| > > 002cc590 a0 ae c0 ae e0 ae 00 00 00 00 00 00 00 00 00 00 |................| > > 002cc5a0 73 62 61 74 2c 31 2c 53 42 41 54 20 56 65 72 73 |sbat,1,SBAT Vers| > > 002cc5b0 69 6f 6e 2c 73 62 61 74 2c 31 2c 68 74 74 70 73 |ion,sbat,1,https| > > 002cc5c0 3a 2f 2f 67 69 74 68 75 62 2e 63 6f 6d 2f 72 68 |://github.com/rh| > > 002cc5d0 62 6f 6f 74 2f 73 68 69 6d 2f 62 6c 6f 62 2f 6d |boot/shim/blob/m| > > 002cc5e0 61 69 6e 2f 53 42 41 54 2e 6d 64 0a 78 65 6e 2e |ain/SBAT.md.xen.| > > 002cc5f0 78 73 2c 31 2c 43 6c 6f 75 64 20 53 6f 66 74 77 |xs,1,Cloud Softw| > > 002cc600 61 72 65 20 47 72 6f 75 70 2c 78 65 6e 2c 34 2e |are Group,xen,4.| > > 002cc610 32 30 2e 31 2d 37 2e 32 32 2e 67 33 65 30 36 37 |20.1-7.22.g3e067| > > 002cc620 32 36 62 2e 78 73 39 2c 6d 61 69 6c 74 6f 3a 73 |26b.xs9,mailto:s| > > 002cc630 65 63 75 72 69 74 79 40 78 65 6e 73 65 72 76 65 |ecurity@xenserve| > > 002cc640 72 2e 63 6f 6d 0a 00 00 00 00 00 00 00 00 00 00 |r.com...........| > > 002cc650 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................| > > 002cc660 2c 00 00 00 2e 69 6e 69 74 2e 74 65 78 74 00 2e |,....init.text..| > > 002cc670 69 6e 69 74 2e 64 61 74 61 00 2e 64 61 74 61 2e |init.data..data.| > > 002cc680 72 65 61 64 5f 6d 6f 73 74 6c 79 00 00 00 00 00 |read_mostly.....| > > 002cc690 9e 05 00 00 00 02 02 00 30 82 05 92 06 09 2a 86 |........0.....*.| > > 002cc6a0 48 86 f7 0d 01 07 02 a0 82 05 83 30 82 05 7f 02 |H..........0....| > > 002cc6b0 01 01 31 0f 30 0d 06 09 60 86 48 01 65 03 04 02 |..1.0...`.H.e...| > > 002cc6c0 01 05 00 30 5c 06 0a 2b 06 01 04 01 82 37 02 01 |...0\..+.....7..| > > 002cc6d0 04 a0 4e 30 4c 30 17 06 0a 2b 06 01 04 01 82 37 |..N0L0...+.....7| > > 002cc6e0 02 01 0f 30 09 03 01 00 a0 04 a2 02 80 00 30 31 |...0..........01| > > 002cc6f0 30 0d 06 09 60 86 48 01 65 03 04 02 01 05 00 04 |0...`.H.e.......| > > 002cc700 20 e2 47 64 f8 e8 7b 62 eb 17 e0 13 0a 0d 93 02 | .Gd..{b........| > > 002cc710 7a d8 3b f0 20 a8 ee 3d 49 98 3f de c1 47 de 15 |z.;. ..=I.?..G..| > > 002cc720 43 a0 82 03 2c 30 82 03 28 30 82 02 10 a0 03 02 |C...,0..(0......| > > 002cc730 01 02 02 11 00 8f fc 11 bf 41 54 40 74 89 2c 53 |.........AT@t.,S| > > 002cc740 a5 78 c1 e8 32 30 0d 06 09 2a 86 48 86 f7 0d 01 |.x..20...*.H....| > > 002cc750 01 0b 05 00 30 1c 31 1a 30 18 06 03 55 04 03 13 |....0.1.0...U...| > > 002cc760 11 58 65 6e 53 65 72 76 65 72 20 58 65 6e 20 64 |.XenServer Xen d| > > 002cc770 65 76 30 1e 17 0d 32 35 30 33 32 30 31 36 35 35 |ev0...2503201655| > > 002cc780 30 37 5a 17 0d 33 37 30 31 31 39 30 33 31 34 30 |07Z..37011903140| > > 002cc790 37 5a 30 1c 31 1a 30 18 06 03 55 04 03 13 11 58 |7Z0.1.0...U....X| > > 002cc7a0 65 6e 53 65 72 76 65 72 20 58 65 6e 20 64 65 76 |enServer Xen dev| > > ... > > > > So, this confirms that the string table is there to support larger > > section names and the signature is there and it's working. > > But is it going to work on all EFI implementations, or merely the one you tried? Can you be more specific ? The file was tested using dozens of different hardware and under Qemu. Only x64 if it's what you mean. > Of course it would help if Demi could give more concrete pointers to (possible) > implementations where there might be (known? suspected?) issues. > > Jan Frediano From xen-devel-bounces@lists.xenproject.org Thu Nov 06 16:33:49 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 16:33:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157136.1486038 (Exim 4.92) (envelope-from ) id 1vH2vl-0006kU-1B; Thu, 06 Nov 2025 16:33:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157136.1486038; Thu, 06 Nov 2025 16:33:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vH2vk-0006kN-UK; Thu, 06 Nov 2025 16:33:48 +0000 Received: by outflank-mailman (input) for mailman id 1157136; Thu, 06 Nov 2025 16:33:48 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vH2vk-0006F5-5n for xen-devel@lists.xenproject.org; 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The code will still follow PV path. >> >> Rework raw_x_guest() code to use required functions explicitly for each >> combination of CONFIG_PV/CONFIG_HVM with main intention to optimize code for >> (PV=n and HVM=y) case. >> >> For the case (PV=n and HVM=n) empty stubs are created which return (1) >> indicating failure. Hence, no guests should possible in this case - >> which means no access to guest memory should ever happen. >> The two calls of __raw_copy_to_guest() in common/domain.c->update_runstate_area() >> are fixed for this case by explicitly cast the return value to void >> (MISRA C Rule 17.7). >> >> Finally build arch/x86/usercopy.c only for PV=y. >> >> The measured (bloat-o-meter) improvement for (PV=n and HVM=y) case is: >> add/remove: 0/10 grow/shrink: 2/90 up/down: 163/-30932 (-30769) >> Total: Before=1937113, After=1906344, chg -1.59% >> >> Signed-off-by: Grygorii Strashko >> --- >> xen/arch/x86/Makefile | 2 +- >> xen/arch/x86/include/asm/guest_access.h | 38 +++++++++++++++++++++++++ >> xen/common/domain.c | 10 ++++--- >> 3 files changed, 45 insertions(+), 5 deletions(-) >> >> diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile >> index 407571c510e1..27f131ffeb61 100644 >> --- a/xen/arch/x86/Makefile >> +++ b/xen/arch/x86/Makefile >> @@ -71,7 +71,7 @@ obj-y += time.o >> obj-y += traps-setup.o >> obj-y += traps.o >> obj-$(CONFIG_INTEL) += tsx.o >> -obj-y += usercopy.o >> +obj-$(CONFIG_PV) += usercopy.o >> obj-y += x86_emulate.o >> obj-$(CONFIG_TBOOT) += tboot.o >> obj-y += hpet.o >> diff --git a/xen/arch/x86/include/asm/guest_access.h b/xen/arch/x86/include/asm/guest_access.h >> index 69716c8b41bb..36aeb89524ab 100644 >> --- a/xen/arch/x86/include/asm/guest_access.h >> +++ b/xen/arch/x86/include/asm/guest_access.h >> @@ -13,6 +13,7 @@ >> #include >> >> /* Raw access functions: no type checking. */ >> +#if defined(CONFIG_PV) && defined(CONFIG_HVM) >> #define raw_copy_to_guest(dst, src, len) \ >> (is_hvm_vcpu(current) ? \ >> copy_to_user_hvm((dst), (src), (len)) : \ >> @@ -34,6 +35,43 @@ >> copy_from_user_hvm((dst), (src), (len)) : \ >> __copy_from_guest_pv(dst, src, len)) >> >> +#elif defined(CONFIG_HVM) >> +#define raw_copy_to_guest(dst, src, len) \ >> + copy_to_user_hvm((dst), (src), (len)) >> +#define raw_copy_from_guest(dst, src, len) \ >> + copy_from_user_hvm((dst), (src), (len)) >> +#define raw_clear_guest(dst, len) \ >> + clear_user_hvm((dst), (len)) >> +#define __raw_copy_to_guest(dst, src, len) \ >> + copy_to_user_hvm((dst), (src), (len)) >> +#define __raw_copy_from_guest(dst, src, len) \ >> + copy_from_user_hvm((dst), (src), (len)) >> + >> +#elif defined(CONFIG_PV) >> +#define raw_copy_to_guest(dst, src, len) \ >> + copy_to_guest_pv(dst, src, len) >> +#define raw_copy_from_guest(dst, src, len) \ >> + copy_from_guest_pv(dst, src, len) >> +#define raw_clear_guest(dst, len) \ >> + clear_guest_pv(dst, len) >> +#define __raw_copy_to_guest(dst, src, len) \ >> + __copy_to_guest_pv(dst, src, len) >> +#define __raw_copy_from_guest(dst, src, len) \ >> + __copy_from_guest_pv(dst, src, len) >> + >> +#else >> +#define raw_copy_to_guest(dst, src, len) \ >> + ((void)(dst), (void)(src), (void)(len), 1) >> +#define raw_copy_from_guest(dst, src, len) \ >> + ((void)(dst), (void)(src), (void)(len), 1) >> +#define raw_clear_guest(dst, len) \ >> + ((void)(dst), (void)(len), 1) >> +#define __raw_copy_to_guest(dst, src, len) \ >> + ((void)(dst), (void)(src), (void)(len), 1) >> +#define __raw_copy_from_guest(dst, src, len) \ >> + ((void)(dst), (void)(src), (void)(len), 1) >> +#endif >> + >> /* >> * Pre-validate a guest handle. >> * Allows use of faster __copy_* functions. >> diff --git a/xen/common/domain.c b/xen/common/domain.c >> index 4f91316ad93e..c603edcc7d46 100644 >> --- a/xen/common/domain.c >> +++ b/xen/common/domain.c >> @@ -1985,8 +1985,9 @@ bool update_runstate_area(struct vcpu *v) >> #endif >> guest_handle--; >> runstate.state_entry_time |= XEN_RUNSTATE_UPDATE; >> - __raw_copy_to_guest(guest_handle, >> - (void *)(&runstate.state_entry_time + 1) - 1, 1); >> + (void)__raw_copy_to_guest(guest_handle, >> + (void *)(&runstate.state_entry_time + 1) - 1, >> + 1); >> smp_wmb(); >> } >> >> @@ -2008,8 +2009,9 @@ bool update_runstate_area(struct vcpu *v) >> { >> runstate.state_entry_time &= ~XEN_RUNSTATE_UPDATE; >> smp_wmb(); >> - __raw_copy_to_guest(guest_handle, >> - (void *)(&runstate.state_entry_time + 1) - 1, 1); >> + (void)__raw_copy_to_guest(guest_handle, >> + (void *)(&runstate.state_entry_time + 1) - 1, >> + 1); >> } >> >> update_guest_memory_policy(v, &policy); > > Alternatively, we can make all the raw_* functions `static inline` and > have something like this which should have the same effect with much > less redundancy. > > static inline > unsigned int raw_copy_to_user_hvm(void *to, const void *from, > unsigned int len) > { > if ( IS_ENABLED(CONFIG_HVM) && > (!IS_ENABLED(CONFIG_PV) || is_hvm_vcpu(current) ) > copy_to_user_hvm(to, from, len); > else if ( IS_ENABLED(CONFIG_PV) ) > copy_to_guest_pv(to, from, len); else return len; > } Can try. Jan, would it be acceptable? -- Best regards, -grygorii From xen-devel-bounces@lists.xenproject.org Thu Nov 06 16:37:42 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 16:37:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157154.1486047 (Exim 4.92) (envelope-from ) id 1vH2zN-0007aP-JD; Thu, 06 Nov 2025 16:37:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157154.1486047; Thu, 06 Nov 2025 16:37:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vH2zN-0007aI-GA; Thu, 06 Nov 2025 16:37:33 +0000 Received: by outflank-mailman (input) for mailman id 1157154; Thu, 06 Nov 2025 16:37:32 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vH2zM-0007aC-M9 for xen-devel@lists.xenproject.org; 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Thu, 06 Nov 2025 08:37:30 -0800 (PST) MIME-Version: 1.0 References: <20251105153808.20278-1-frediano.ziglio@citrix.com> <97611b79-228c-40a6-9fb2-4571b2447258@suse.com> In-Reply-To: <97611b79-228c-40a6-9fb2-4571b2447258@suse.com> From: Frediano Ziglio Date: Thu, 6 Nov 2025 16:37:17 +0000 X-Gm-Features: AWmQ_bkAtm91WHYPFi-ux2dVX_c4vTVxq9lqzhyi3qbSvPjl-BQWCUSrANUDw7Q Message-ID: Subject: Re: [PATCH v3] xen: Strip xen.efi by default To: Jan Beulich Cc: Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org Content-Type: text/plain; charset="UTF-8" On Thu, 6 Nov 2025 at 10:32, Jan Beulich wrote: > > On 05.11.2025 16:38, Frediano Ziglio wrote: > > From: Frediano Ziglio > > > > For xen.gz file we strip all symbols and have an additional > > xen-syms file version with all symbols. > > Make xen.efi more coherent stripping all symbols too. > > xen-syms.efi can be used for debugging. > > > > Signed-off-by: Frediano Ziglio > > --- > > Changes since v1: > > - avoid leaving target if some command fails. > > > > Changes since v2: > > - do not convert type but retain PE format; > > = use xen-syms.efi for new file name, more consistent with ELF. > > --- > > docs/misc/efi.pandoc | 8 +------- > > xen/Kconfig.debug | 9 ++------- > > xen/Makefile | 19 ------------------- > > xen/arch/x86/Makefile | 9 ++++++--- > > 4 files changed, 9 insertions(+), 36 deletions(-) > > > > diff --git a/docs/misc/efi.pandoc b/docs/misc/efi.pandoc > > index 11c1ac3346..c66b18a66b 100644 > > --- a/docs/misc/efi.pandoc > > +++ b/docs/misc/efi.pandoc > > @@ -20,13 +20,7 @@ Xen to load the configuration file even if multiboot modules are found. > > Once built, `make install-xen` will place the resulting binary directly into > > the EFI boot partition, provided `EFI_VENDOR` is set in the environment (and > > `EFI_MOUNTPOINT` is overridden as needed, should the default of `/boot/efi` not > > -match your system). When built with debug info, the binary can be quite large. > > -Setting `INSTALL_EFI_STRIP=1` in the environment will cause it to be stripped > > -of debug info in the process of installing. `INSTALL_EFI_STRIP` can also be set > > -to any combination of options suitable to pass to `strip`, in case the default > > -ones don't do. The xen.efi binary will also be installed in `/usr/lib64/efi/`, > > -unless `EFI_DIR` is set in the environment to override this default. This > > -binary will not be stripped in the process. > > +match your system). > > > > The binary itself will require a configuration file (names with the `.efi` > > extension of the binary's name replaced by `.cfg`, and - until an existing > > diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug > > index d900d926c5..58ee10ee3e 100644 > > --- a/xen/Kconfig.debug > > +++ b/xen/Kconfig.debug > > @@ -147,12 +147,7 @@ config DEBUG_INFO > > Say Y here if you want to build Xen with debug information. This > > information is needed e.g. for doing crash dump analysis of the > > hypervisor via the "crash" tool. > > - Saying Y will increase the size of the xen-syms and xen.efi > > - binaries. In case the space on the EFI boot partition is rather > > - limited, you may want to install a stripped variant of xen.efi in > > - the EFI boot partition (look for "INSTALL_EFI_STRIP" in > > - docs/misc/efi.pandoc for more information - when not using > > - "make install-xen" for installing xen.efi, stripping needs to be > > - done outside the Xen build environment). > > + Saying Y will increase the size of the xen-syms and xen.efi.elf > > + binaries. > > Why xen.efi.elf and not xen-syms.efi? > I forgot to update this part. Now that I see the comment, was the suggestion about having an additional xen-syms.efi file or having xen-syms.efi instead of xen.efi.elf ? > > --- a/xen/arch/x86/Makefile > > +++ b/xen/arch/x86/Makefile > > @@ -228,14 +228,17 @@ endif > > $(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o > > $(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds $< \ > > $(dot-target).1r.o $(dot-target).1s.o $(orphan-handling-y) \ > > - $(note_file_option) -o $@ > > - $(NM) -pa --format=sysv $@ \ > > + $(note_file_option) -o $@.tmp > > + $(NM) -pa --format=sysv $@.tmp \ > > | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > > > $@.map > > ifeq ($(CONFIG_DEBUG_INFO),y) > > - $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) -O elf64-x86-64 $@ $@.elf > > + $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))cp -f \ > > + $@.tmp $(TARGET)-syms.efi > > + $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(STRIP) $@.tmp > > endif > > rm -f $(dot-target).[0-9]* $(@D)/..$(@F).[0-9]* > > + mv -f $@.tmp $@ > > ifeq ($(CONFIG_XEN_IBT),y) > > $(SHELL) $(srctree)/tools/check-endbr.sh $@ > > endif > > I see $@.tmp here, but no sign of xen-syms. Did you submit a stake patch? Am > I missing something? > I don't know what a "stake patch" is. xen-syms.efi (that is $(TARGET)-syms.efi in the Makefile) is not a target of this rule so if the rule fails it will be generated again. > I also think the mv should sit ahead of the cleaning-up rm. > Are you sure? Usually you want it as the last command so any failure won't create the target. For instance here if check-endbr.sh is failing the target is still created and next make command will succeed. > Jan > > Jan Frediano From xen-devel-bounces@lists.xenproject.org Thu Nov 06 16:56:28 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 16:56:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157165.1486057 (Exim 4.92) (envelope-from ) id 1vH3Ha-00021e-2h; Thu, 06 Nov 2025 16:56:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157165.1486057; Thu, 06 Nov 2025 16:56:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vH3Ha-00021X-05; Thu, 06 Nov 2025 16:56:22 +0000 Received: by outflank-mailman (input) for mailman id 1157165; Thu, 06 Nov 2025 16:56:20 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vH3HY-00021P-GN for xen-devel@lists.xenproject.org; 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pr=C Message-ID: <0217b1ff-2c33-43ae-adbc-d665c881473d@amd.com> Date: Thu, 6 Nov 2025 11:55:57 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH] xen/x86: guest_access: optimize raw_x_guest() for PV and HVM combinations To: Grygorii Strashko , Teddy Astie , , Jan Beulich CC: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , "Julien Grall" , Stefano Stabellini , Alejandro Vallejo References: <20251031212058.1338332-1-grygorii_strashko@epam.com> <434d9ce4-e5e1-453d-84b7-e21e66d0c5a3@vates.tech> Content-Language: en-US From: Jason Andryuk In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: None (SATLEXMB04.amd.com: jason.andryuk@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000FCC4:EE_|LV9PR12MB9758:EE_ X-MS-Office365-Filtering-Correlation-Id: 893113d0-baf4-41e8-8a90-08de1d555b62 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700013|376014|82310400026|7053199007; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Nov 2025 16:55:57.4867 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 893113d0-baf4-41e8-8a90-08de1d555b62 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000FCC4.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV9PR12MB9758 On 2025-11-06 11:33, Grygorii Strashko wrote: > Hi Teddy, Jan, > > On 06.11.25 17:57, Teddy Astie wrote: >> Le 31/10/2025 à 22:25, Grygorii Strashko a écrit : >>> From: Grygorii Strashko >>> >>> Xen uses below pattern for raw_x_guest() functions: >>> >>> define raw_copy_to_guest(dst, src, len)        \ >>>       (is_hvm_vcpu(current) ?                     \ >>>        copy_to_user_hvm((dst), (src), (len)) :    \ >>>        copy_to_guest_pv(dst, src, len)) >>> >>> How this pattern is working depends on CONFIG_PV/CONFIG_HVM as: >>> - PV=y and HVM=y >>>     Proper guest access function is selected depending on domain type. >>> - PV=y and HVM=n >>>     Only PV domains are possible. is_hvm_domain/vcpu() will constify >>> to "false" >>>     and compiler will optimize code and skip HVM specific part. >>> - PV=n and HVM=y >>>     Only HVM domains are possible. is_hvm_domain/vcpu() will not be >>> constified. >>>     No PV specific code will be optimized by compiler. >>> - PV=n and HVM=n >>>     No guests should possible. The code will still follow PV path. >>> >>> Rework raw_x_guest() code to use required functions explicitly for each >>> combination of CONFIG_PV/CONFIG_HVM with main intention to optimize >>> code for >>> (PV=n and HVM=y) case. >>> >>> For the case (PV=n and HVM=n) empty stubs are created which return (1) >>> indicating failure. Hence, no guests should possible in this case - >>> which means no access to guest memory  should ever happen. >>> The two calls of __raw_copy_to_guest() in common/domain.c- >>> >update_runstate_area() >>> are fixed for this case by explicitly cast the return value to void >>> (MISRA C Rule 17.7). >>> >>> Finally build arch/x86/usercopy.c only for PV=y. >>> >>> The measured (bloat-o-meter) improvement for (PV=n and HVM=y) case is: >>>     add/remove: 0/10 grow/shrink: 2/90 up/down: 163/-30932 (-30769) >>>     Total: Before=1937113, After=1906344, chg -1.59% >>> >>> Signed-off-by: Grygorii Strashko >>> --- >>>    xen/arch/x86/Makefile                   |  2 +- >>>    xen/arch/x86/include/asm/guest_access.h | 38 +++++++++++++++++++++ >>> ++++ >>>    xen/common/domain.c                     | 10 ++++--- >>>    3 files changed, 45 insertions(+), 5 deletions(-) >>> >> >> Alternatively, we can make all the raw_* functions `static inline` and >> have something like this which should have the same effect with much >> less redundancy. >> >> static inline >> unsigned int raw_copy_to_user_hvm(void *to, const void *from, >>                                     unsigned int len) >> { >>       if ( IS_ENABLED(CONFIG_HVM) && >>            (!IS_ENABLED(CONFIG_PV) || is_hvm_vcpu(current) ) >>          copy_to_user_hvm(to, from, len); >>       else if ( IS_ENABLED(CONFIG_PV) ) >>          copy_to_guest_pv(to, from, len); >     else >         return len; >> } > > Can try. Yes, I was thinking something like Teddy suggested: #define raw_copy_to_guest(dst, src, len) \ (is_hvm_vcpu(current) ? copy_to_user_hvm(dst, src, len) : is_pv_vcpu(current) ? copy_to_guest_pv(dst, src, len) : fail_copy(dst, src, len)) But that made the think the is_{hvm,pv}_{vcpu,domain}() could be optimized for when only 1 of HVM or PV is enabled. Regards, Jason xen: Optimize is_hvm/pv_domain() for single domain type is_hvm_domain() and is_pv_domain() hardcode the false conditions for HVM=n and PV=n, but they still leave the XEN_DOMCTL_CDF_hvm flag checking. When only one of PV or HVM is set, the result can be hard coded since the other is impossible. Notably, this removes the evaluate_nospec() lfences. Signed-off-by: Jason Andryuk --- Untested. HVM=y PV=n bloat-o-meter: add/remove: 3/6 grow/shrink: 19/212 up/down: 3060/-60349 (-57289) Full bloat-o-meter below. --- xen/include/xen/sched.h | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h index f680fb4fa1..12f10d9cc8 100644 --- a/xen/include/xen/sched.h +++ b/xen/include/xen/sched.h @@ -1176,8 +1176,13 @@ static always_inline bool is_hypercall_target(const struct domain *d) static always_inline bool is_pv_domain(const struct domain *d) { - return IS_ENABLED(CONFIG_PV) && - evaluate_nospec(!(d->options & XEN_DOMCTL_CDF_hvm)); + if ( !IS_ENABLED(CONFIG_PV) ) + return false; + + if ( IS_ENABLED(CONFIG_HVM) ) + return evaluate_nospec(!(d->options & XEN_DOMCTL_CDF_hvm)); + + return true; } static always_inline bool is_pv_vcpu(const struct vcpu *v) @@ -1218,8 +1223,13 @@ static always_inline bool is_pv_64bit_vcpu(const struct vcpu *v) static always_inline bool is_hvm_domain(const struct domain *d) { - return IS_ENABLED(CONFIG_HVM) && - evaluate_nospec(d->options & XEN_DOMCTL_CDF_hvm); + if ( !IS_ENABLED(CONFIG_HVM) ) + return false; + + if ( IS_ENABLED(CONFIG_PV) ) + return evaluate_nospec(d->options & XEN_DOMCTL_CDF_hvm); + + return true; } static always_inline bool is_hvm_vcpu(const struct vcpu *v) -- 2.51.1 HVM=y PV=n bloat-o-meter: add/remove: 3/6 grow/shrink: 19/212 up/down: 3060/-60349 (-57289) Function old new delta __alt_instructions_end 2 896 +894 __stop___pre_ex_table 40 664 +624 increase_reservation - 418 +418 do_memory_op 11026 11404 +378 decrease_reservation - 360 +360 x86_emulate 217169 217338 +169 x86_msr_copy_to_buffer 117 177 +60 __start_bug_frames_0 - 40 +40 pt_irq_destroy_bind 1490 1515 +25 map_pages_to_xen 4284 4300 +16 domain_cpu_policy_changed 95 108 +13 sched_init_vcpu 1621 1630 +9 is_memory_hole 105 113 +8 hvm_save 549 557 +8 pv_soft_rdtsc 62 69 +7 elf_load_image 84 91 +7 console_send 262 268 +6 wmemchr 58 63 +5 map_grant_ref 5410 5415 +5 __start_xen 8273 8277 +4 p2m_pod_init 138 141 +3 pending_requeue 635 636 +1 set_time_scale 93 91 -2 do_debug 391 389 -2 handle_iomem_range 171 168 -3 fill_vmsr_data 424 421 -3 p2m_pod_offline_or_broken_hit 1720 1716 -4 allocate_pirq 480 476 -4 subpage_mmio_find_page 68 63 -5 x86_cpu_policy_fill_native 999 991 -8 recalculate_cpuid_policy 868 860 -8 irq_load_pci 211 201 -10 local_time_calibration 440 429 -11 ioreq_server_add_vcpu_all 199 188 -11 hvm_get_mem_pinned_cacheattr 233 222 -11 symbols_offsets 16856 16844 -12 send_guest_pirq 386 374 -12 pt_restore_timer 171 158 -13 p2m_pod_zero_check_superpage 1251 1238 -13 inject_vmce 208 195 -13 amd_vpmu_save 278 265 -13 time_resume 324 310 -14 vmcb_dump 300 285 -15 pirq_cleanup_check 97 82 -15 init_hypercall_page 61 46 -15 init_domain_irq_mapping 191 176 -15 cpu_schedule_callback 549 534 -15 __hvm_copy 695 680 -15 fixup_eoi 175 159 -16 evtchn_destroy_final 171 155 -16 context_switch 703 687 -16 __stop_bug_frames_1 3672 3656 -16 p2m_init_one 203 186 -17 p2m_init 133 116 -17 p2m_final_teardown 60 43 -17 iommu_domain_init 251 234 -17 hvmemul_write_cache 938 921 -17 hvm_do_IRQ_dpci 256 239 -17 domain_update_node_aff 387 370 -17 domain_set_time_offset 41 24 -17 cleanup_domain_irq_mapping 61 44 -17 arch_evtchn_bind_pirq 142 125 -17 arch_domain_destroy 130 113 -17 alloc_vcpu_struct 58 41 -17 hvm_get_guest_time_fixed 139 120 -19 hvm_assert_evtchn_irq 183 164 -19 __context_switch 539 520 -19 setup_io_bitmap 123 103 -20 vm_event_toggle_singlestep 65 44 -21 show_registers 626 605 -21 show_execution_state 508 487 -21 p2m_pod_get_mem_target 728 707 -21 ioreq_server_get_frame 333 312 -21 get_free_pirqs 188 167 -21 arch_vcpu_destroy 93 72 -21 amd_vpmu_destroy 90 69 -21 shadow_domain_init 63 41 -22 p2m_mem_access_sanity_check 71 49 -22 hvm_domain_use_pirq 50 28 -22 dump_irq_info 495 473 -22 tsc_get_info 230 207 -23 hvm_set_callback_via 280 257 -23 vcpu_mark_events_pending 50 26 -24 dump_softtsc 511 487 -24 dump_pageframe_info 527 503 -24 arch_pci_clean_pirqs 347 323 -24 vmce_enable_mca_cap 125 100 -25 msixtbl_init 100 75 -25 guest_flush_tlb_flags 46 21 -25 domain_get_irq_dpci 54 29 -25 arch_domain_creation_finished 48 23 -25 unmmap_broken_page 287 261 -26 p2m_pod_active 391 365 -26 gtsc_to_gtime 49 23 -26 domain_relinquish_resources 721 695 -26 do_vm_assist 141 113 -28 vmce_restore_vcpu 160 131 -29 unmap_domain_pirq_emuirq 255 226 -29 construct_dom 206 177 -29 arch_domain_soft_reset 892 863 -29 get_free_pirq 240 210 -30 vm_event_fill_regs 1280 1248 -32 paging_gva_to_gfn 297 265 -32 evtchn_reset 818 786 -32 map_domain_emuirq_pirq 558 524 -34 physdev_unmap_pirq 686 651 -35 cpu_policy_updated 35 - -35 do_IRQ 1496 1459 -37 alloc_pirq_struct 96 59 -37 iommu_unmap 657 619 -38 iommu_map 682 644 -38 evtchn_close 1685 1647 -38 xenctl_bitmap_to_bitmap 274 235 -39 amd_vpmu_load 521 482 -39 iommu_free_pgtables 358 318 -40 dom0_setup_permissions 3762 3722 -40 evtchn_destroy 479 438 -41 arch_do_multicall_call 52 10 -42 symbols_names 50060 50016 -44 p2m_teardown 945 901 -44 _put_page_type 667 623 -44 hvmemul_read_cache 581 536 -45 vcpu_block 156 109 -47 safe_copy_string_from_guest 169 122 -47 map_range 508 461 -47 getdomaininfo 695 648 -47 physdev_map_pirq 921 873 -48 gnttab_release_mappings 1447 1399 -48 guest_rdmsr 1972 1923 -49 x86_msr_copy_from_buffer 280 230 -50 relinquish_memory 1212 1161 -51 p2m_set_mem_access 838 787 -51 p2m_pod_demand_populate 2238 2187 -51 hvmemul_rep_outs 680 629 -51 compat_set_cx_pminfo 539 488 -51 tsc_set_info 480 428 -52 monitor_domctl 600 547 -53 default_initialise_vcpu 208 154 -54 collect_time_info 336 282 -54 xenmem_add_to_physmap 706 651 -55 hvm_set_mem_pinned_cacheattr 772 717 -55 hap_track_dirty_vram 1331 1276 -55 arch_domain_create 998 943 -55 ucode_update_hcall 202 146 -56 copy_leaf_to_buffer 160 104 -56 relinquish_p2m_mapping 988 930 -58 gtime_to_gtsc 81 23 -58 arch_hwdom_irqs 132 74 -58 x86_cpuid_copy_from_buffer 760 701 -59 set_px_pminfo 851 792 -59 set_cx_pminfo 1675 1616 -59 do_dm_op 191 132 -59 hap_set_allocation 510 450 -60 domain_get_maximum_gpfn 79 19 -60 _handle_iomem_range 234 173 -61 compat_dm_op 261 199 -62 paging_free_log_dirty_bitmap 1653 1589 -64 memcpy_to_guest_ring 409 344 -65 efi_compat_get_info 993 928 -65 smt_up_down_helper 437 370 -67 arch_set_info_guest 402 335 -67 guest_wrmsr 2354 2286 -68 read_console_ring 395 325 -70 vcpu_show_execution_state 737 665 -72 hvm_save_one 798 726 -72 efi_get_info 1028 948 -80 arch_initialise_vcpu 197 110 -87 amd_vpmu_do_wrmsr 905 816 -89 iommu_do_pci_domctl 2051 1961 -90 compat_argo_op 405 313 -92 _get_page_type 1439 1347 -92 do_get_pm_info 998 902 -96 p2m_pod_empty_cache 1123 1020 -103 vpmu_do_interrupt 965 851 -114 p2m_pod_set_cache_target 816 701 -115 gwstrlen 284 168 -116 do_paging_domctl_cont 879 758 -121 mem_access_memop 986 859 -127 copy_msr_to_buffer 138 - -138 get_reserved_device_memory 404 259 -145 do_pm_op 2731 2577 -154 p2m_set_mem_access_multi 1023 861 -162 do_xenpmu_op 1690 1524 -166 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2002:a17:902:ce07:b0:295:50f5:c0e3 with SMTP id d9443c01a7336-297c00b9141mr3517035ad.14.1762448328641; Thu, 06 Nov 2025 08:58:48 -0800 (PST) From: Ritesh Harjani (IBM) To: Alexander Gordeev Cc: Kevin Brodsky , linux-mm@kvack.org, linux-kernel@vger.kernel.org, Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org Subject: Re: [PATCH v4 07/12] mm: enable lazy_mmu sections to nest In-Reply-To: <50d1b63a-88d7-4484-82c0-3bde96e3207d-agordeev@linux.ibm.com> Date: Thu, 06 Nov 2025 22:02:39 +0530 Message-ID: <87ikfn3yvs.ritesh.list@gmail.com> References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-8-kevin.brodsky@arm.com> <87ms5050g0.ritesh.list@gmail.com> <50d1b63a-88d7-4484-82c0-3bde96e3207d-agordeev@linux.ibm.com> MIME-Version: 1.0 Content-Type: text/plain Alexander Gordeev writes: > On Wed, Nov 05, 2025 at 02:19:03PM +0530, Ritesh Harjani wrote: >> > + * in_lazy_mmu_mode() can be used to check whether the lazy MMU mode is >> > + * currently enabled. >> > */ >> > #ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE >> > static inline void lazy_mmu_mode_enable(void) >> > { >> > - arch_enter_lazy_mmu_mode(); >> > + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; >> > + >> > + VM_WARN_ON_ONCE(state->nesting_level == U8_MAX); >> > + /* enable() must not be called while paused */ >> > + VM_WARN_ON(state->nesting_level > 0 && !state->active); >> > + >> > + if (state->nesting_level++ == 0) { >> > + state->active = true; >> > + arch_enter_lazy_mmu_mode(); >> > + } >> > } >> >> Some architectures disables preemption in their >> arch_enter_lazy_mmu_mode(). So shouldn't the state->active = true should >> happen after arch_enter_lazy_mmu_mode() has disabled preemption()? i.e. > > Do you have some scenario in mind that could cause an issue? > No not really. But that's a deviation from what previous arch hooks were expecting. Although thinking this through - I don't have any usecase where this can be a problem. But let me re-visit some of the code paths on ppc64 lazy mmu... Looking at the arch specific usecase I see we always do get_cpu_var() for accessing the per-cpu batch array which disables preemption before accessing the per-cpu structure.. This per-cpu structure is where we batch pte updates... For e.g... arch_enter_lazy_mmu_mode() hpte_need_flush() get_cpu_var() // this takes care of preempt_disable() adds vpns to per-cpu batch[i] put_cpu_var() // arch_leave_lazy_mmu_mode() > IOW, what could go wrong if the process is scheduled to another > CPU before preempt_disable() is called? So from above - I don't think your sequence to update state->active = true before calling arch_enter hook should be a problem. Based on above this looks mostly ok to me. -ritesh From xen-devel-bounces@lists.xenproject.org Thu Nov 06 17:09:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 17:09:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157191.1486077 (Exim 4.92) (envelope-from ) id 1vH3Tv-0004Su-Fe; Thu, 06 Nov 2025 17:09:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157191.1486077; Thu, 06 Nov 2025 17:09:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vH3Tv-0004Sn-D8; Thu, 06 Nov 2025 17:09:07 +0000 Received: by outflank-mailman (input) for mailman id 1157191; Thu, 06 Nov 2025 17:09:06 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vH3Tu-0004Sf-Ay for xen-devel@lists.xenproject.org; Thu, 06 Nov 2025 17:09:06 +0000 Received: from mail-pf1-x430.google.com (mail-pf1-x430.google.com [2607:f8b0:4864:20::430]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 4ba9ebd5-bb33-11f0-9d17-b5c5bf9af7f9; Thu, 06 Nov 2025 18:09:04 +0100 (CET) Received: by mail-pf1-x430.google.com with SMTP id d2e1a72fcca58-781ea2cee3fso1204432b3a.0 for ; Thu, 06 Nov 2025 09:09:04 -0800 (PST) Received: from dw-tp ([171.76.85.117]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7b0c9c0874bsm68007b3a.16.2025.11.06.09.08.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 06 Nov 2025 09:09:02 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 4ba9ebd5-bb33-11f0-9d17-b5c5bf9af7f9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1762448943; x=1763053743; darn=lists.xenproject.org; h=mime-version:references:message-id:date:in-reply-to:subject:cc:to :from:from:to:cc:subject:date:message-id:reply-to; bh=nxXbjl0HhdoITaZBDxLqmLJTjrhCiLD5WEPTG0leRLU=; b=bUNzifyOvRdYMcjnBh9LufTxEv4BHpFwksrnN/PxPYBUVJHiX/tLDRMvK6n8QBSEBh K5fTacBTat/bAheBjUq0cNc1mDuYzjVQQL2lm9Yk0Yq1LcGk9Mxv702ZPoVLq6rysATC x4BBZqcfBEiQuPA6+pK/uDipBpCgj9rjyyz7X+A+YrTU/1Ed1Xshj6OKYGxAv4YevLIF sfICZbhnnjlUReLUnQAHSO777tWtx0zL91qIy5BWVvE2DBcodvuitkXshEL5KYlBZTvg 6UE6dGKu9vYea55iXApPKwqlHmNDIgQz4p5iZE98BXHs1pOrdoZAMitn/6AGbvf5AhMl HvQg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1762448943; x=1763053743; h=mime-version:references:message-id:date:in-reply-to:subject:cc:to :from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=nxXbjl0HhdoITaZBDxLqmLJTjrhCiLD5WEPTG0leRLU=; b=TKXJSJN17XOUCil7iWiQvI95g4s9I2hAymarriT14QNjupPkbsFKDTG77KFxAdPDpy TChXWp/jhG3yMhfbKJ6KYjQjvWfXT/+EXrVJVRlhVKSzMVM9CO4YTI44qmL6vcyJvYxJ ZcMufV0dzPwuylG1c64GIQQ4CQi6WhKJ4EcWqvT6tMRU7P5l0XU7gpLYV4vmrTFaw2mY 3yI3q68HtfbAqx8NXUY5WjG5MOMee4zAUR99GgstQgP5ci5so3VzZjmmVXNhxDRs6t6m OeBPGZR5yKXbJcwFarBoZbm4EMmakJqmDgHYj0IF7trLGy7JhjuRACyc58Wq7tfYNx6D JORg== X-Forwarded-Encrypted: i=1; AJvYcCWEMEDwYx4gWbzCbLSXLLy1cz+lxsz7iBMp+tLLsMQMtS+VBoio///nX+DuqLeDWMzh5PPYUeNwUyE=@lists.xenproject.org X-Gm-Message-State: AOJu0YzGaGodaSNIx+/8eFRmDYHY5SRtRoTEXiIO5losz0k+qD0Ve6dP 0oG9pZMbYvYx4oAwtr8ofmyAU70FNFFQEnqeDtX3GFtnqZuKFVTx41ME X-Gm-Gg: ASbGncvuikSv2vStsEpz12BhLXk9piRntKFbjbJawwGN+qjkjdSaLjVQ8bcjw+Fv2Qt 69RJVqmyQ29fAgEW1s6OzprCF7oOEL6q4fOOeP/Q9fjrluqxaMTidiAFz7wPQjRINUsIQmPeYSb 0EeDGNgv/R42Z4zlOhAbiZuqQxTG01EMJ8tVtK61HG0dNHzOISeytP2Mr6QZoZnEwK/tMrNDkhW H+C7iNeX4LOKPmF9x5RUPWt1O7TsJY6EJiojRKgihjjYFKfUHp3BMCtnvRt3wLSbMBKMo6qUtue +ADaitqwyYUxSYcr6+J1RDhvN8Ke2EWgWe0pAqgc3zxDJ4cvfv6IVSI0Z8bR3XN9pplRtPPjr5m sebU84Sg3R0pEi+F56mE4XiWjFplit2711LvSeIEPaIkleiH3EowKdg/EEO7KCTvveGdLfQ== X-Google-Smtp-Source: AGHT+IGcGbtG/gxArci+CopvKuv0vsWkSHD0Cj0H8EsVfNgzuLLOXCCQpVWCS8AAZU2IHguSNAAo3Q== X-Received: by 2002:aa7:88c2:0:b0:7a9:f465:f25 with SMTP id d2e1a72fcca58-7b0bdb856abmr331762b3a.27.1762448942695; Thu, 06 Nov 2025 09:09:02 -0800 (PST) From: Ritesh Harjani (IBM) To: Alexander Gordeev Cc: Kevin Brodsky , linux-mm@kvack.org, linux-kernel@vger.kernel.org, Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org Subject: Re: [PATCH v4 07/12] mm: enable lazy_mmu sections to nest In-Reply-To: <87ikfn3yvs.ritesh.list@gmail.com> Date: Thu, 06 Nov 2025 22:31:27 +0530 Message-ID: <87h5v73xjs.ritesh.list@gmail.com> References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-8-kevin.brodsky@arm.com> <87ms5050g0.ritesh.list@gmail.com> <50d1b63a-88d7-4484-82c0-3bde96e3207d-agordeev@linux.ibm.com> <87ikfn3yvs.ritesh.list@gmail.com> MIME-Version: 1.0 Content-Type: text/plain Ritesh Harjani (IBM) writes: > For e.g... > > arch_enter_lazy_mmu_mode() > hpte_need_flush() > get_cpu_var() // this takes care of preempt_disable() > adds vpns to per-cpu batch[i] > put_cpu_var() // > arch_leave_lazy_mmu_mode() > Sorry, here is the more accurate call sequence for previous email. caller()... arch_enter_lazy_mmu_mode() ptep_xxx_() pte_update() hpte_need_flush() get_cpu_var() // this takes care of preempt_disable() adds vpns to per-cpu batch[i] put_cpu_var() // arch_leave_lazy_mmu_mode() -ritesh From xen-devel-bounces@lists.xenproject.org Thu Nov 06 17:28:02 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 17:28:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157203.1486087 (Exim 4.92) (envelope-from ) id 1vH3m8-0007Lf-Ru; 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a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1762450070; x=1762710570; i=teddy.astie@vates.tech; bh=9daqLaAcXd7L3W3YEvEXe+f6WgQKerpTeM25B4WAubM=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=WZbnf0Tq89BsmlIwZl9tsNDodN/u7DZUqSJeCK4zuyDlwGnsd2jwhycnb9Jy8lfiC 4G8VnrY87TcGVDj+r5sxupslFUTYK7Mrq41NXYaflQGOqAaBCWNnFabKGpK0kQJT7U 7WdgwrCf+L/F+uPYcE0zPDlcGJPjVTIHHy28vKHNL7JE9qAVLe9hbYIZh8G/3RL1BO ZCRxXbBUP0PFBgF5huomWMBDNqo3vPgZWuj37gBPB2MqaFVHfQJUU5ePcdKhKXp438 CogIdcX4AsRmCO8jD3/C2pz++aR2x24Demykyt1TgqA7D7uJ65tm2BtjrkpSemFfsf 7QyOOlKwRWGhA== From: "Teddy Astie" Subject: =?utf-8?Q?Re:=20[XEN][PATCH]=20xen/x86:=20guest=5Faccess:=20optimize=20raw=5Fx=5Fguest()=20for=20PV=20and=20HVM=20combinations?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1762450068806 Message-Id: To: "Jason Andryuk" , "Grygorii Strashko" , xen-devel@lists.xenproject.org, "Jan Beulich" Cc: "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Anthony PERARD" , "Michal Orzel" , "Julien Grall" , "Stefano Stabellini" , "Alejandro Vallejo" References: <20251031212058.1338332-1-grygorii_strashko@epam.com> <434d9ce4-e5e1-453d-84b7-e21e66d0c5a3@vates.tech> <0217b1ff-2c33-43ae-adbc-d665c881473d@amd.com> In-Reply-To: <0217b1ff-2c33-43ae-adbc-d665c881473d@amd.com> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.90cbc83fec594b17bba6f1470717002b?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20251106:md Date: Thu, 06 Nov 2025 17:27:50 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Le 06/11/2025 =C3=A0 18:00, Jason Andryuk a =C3=A9crit=C2=A0: > On 2025-11-06 11:33, Grygorii Strashko wrote: >> Hi Teddy, Jan, >> >> On 06.11.25 17:57, Teddy Astie wrote: >>> Le 31/10/2025 =C3=A0 22:25, Grygorii Strashko a =C3=A9crit=C2=A0: >> Can try. > > Yes, I was thinking something like Teddy suggested: > > #define raw_copy_to_guest(dst, src, len)=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 \ > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 (is_hvm_vcpu(current) ? copy_= to_user_hvm(dst, src, len) : > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 is_pv_vcpu(current) ? c= opy_to_guest_pv(dst, src, len) : > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 fail_copy(dst, src, len= )) > > But that made the think the is_{hvm,pv}_{vcpu,domain}() could be > optimized for when only 1 of HVM or PV is enabled. > > Regards, > Jason > > xen: Optimize is_hvm/pv_domain() for single domain type > > is_hvm_domain() and is_pv_domain() hardcode the false conditions for > HVM=3Dn and PV=3Dn, but they still leave the XEN_DOMCTL_CDF_hvm flag > checking.=C2=A0 When only one of PV or HVM is set, the result can be hard > coded since the other is impossible.=C2=A0 Notably, this removes the > evaluate_nospec() lfences. > > Signed-off-by: Jason Andryuk > --- > Untested. > > HVM=3Dy PV=3Dn bloat-o-meter: > > add/remove: 3/6 grow/shrink: 19/212 up/down: 3060/-60349 (-57289) > > Full bloat-o-meter below. > --- > =C2=A0xen/include/xen/sched.h | 18 ++++++++++++++---- > =C2=A01 file changed, 14 insertions(+), 4 deletions(-) > > diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h > index f680fb4fa1..12f10d9cc8 100644 > --- a/xen/include/xen/sched.h > +++ b/xen/include/xen/sched.h > @@ -1176,8 +1176,13 @@ static always_inline bool > is_hypercall_target(const struct domain *d) > > =C2=A0static always_inline bool is_pv_domain(const struct domain *d) > =C2=A0{ > -=C2=A0=C2=A0=C2=A0 return IS_ENABLED(CONFIG_PV) && > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 evaluate_nospec(!(d->options = & XEN_DOMCTL_CDF_hvm)); > +=C2=A0=C2=A0=C2=A0 if ( !IS_ENABLED(CONFIG_PV) ) > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return false; > + > +=C2=A0=C2=A0=C2=A0 if ( IS_ENABLED(CONFIG_HVM) ) > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return evaluate_nospec(!(d->o= ptions & XEN_DOMCTL_CDF_hvm)); > + > +=C2=A0=C2=A0=C2=A0 return true; > =C2=A0} > > =C2=A0static always_inline bool is_pv_vcpu(const struct vcpu *v) > @@ -1218,8 +1223,13 @@ static always_inline bool is_pv_64bit_vcpu(const > struct vcpu *v) > > =C2=A0static always_inline bool is_hvm_domain(const struct domain *d) > =C2=A0{ > -=C2=A0=C2=A0=C2=A0 return IS_ENABLED(CONFIG_HVM) && > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 evaluate_nospec(d->options & = XEN_DOMCTL_CDF_hvm); > +=C2=A0=C2=A0=C2=A0 if ( !IS_ENABLED(CONFIG_HVM) ) > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return false; > + > +=C2=A0=C2=A0=C2=A0 if ( IS_ENABLED(CONFIG_PV) ) > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return evaluate_nospec(d->opt= ions & XEN_DOMCTL_CDF_hvm); > + > +=C2=A0=C2=A0=C2=A0 return true; > =C2=A0} > > =C2=A0static always_inline bool is_hvm_vcpu(const struct vcpu *v) While I like the idea, it may slightly impact some logic as special domains (dom_xen and dom_io) are now considered HVM domains (when !PV && HVM) instead of "neither PV nor HVM". We want at least to make sure we're not silently breaking something elsewhere. Teddy -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Thu Nov 06 17:40:25 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 17:40:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157215.1486097 (Exim 4.92) (envelope-from ) id 1vH3xz-0001n2-Rf; Thu, 06 Nov 2025 17:40:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157215.1486097; Thu, 06 Nov 2025 17:40:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vH3xz-0001mv-Oj; Thu, 06 Nov 2025 17:40:11 +0000 Received: by outflank-mailman (input) for mailman id 1157215; Thu, 06 Nov 2025 17:40:10 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by 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fE7is13DFAg3HkXDbsTGlM3MFc0o6AtA9Fk5RTD2/XQskPorn91I5iU8wRODE2RKvkyuuikHiCjc86M6gausFb15uinfbxS7UvnYgbNFanI= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM7PR03MB6467 On 06.11.25 19:27, Teddy Astie wrote: > Le 06/11/2025 à 18:00, Jason Andryuk a écrit : >> On 2025-11-06 11:33, Grygorii Strashko wrote: >>> Hi Teddy, Jan, >>> >>> On 06.11.25 17:57, Teddy Astie wrote: >>>> Le 31/10/2025 à 22:25, Grygorii Strashko a écrit : >>> Can try. >> >> Yes, I was thinking something like Teddy suggested: >> >> #define raw_copy_to_guest(dst, src, len)        \ >>         (is_hvm_vcpu(current) ? copy_to_user_hvm(dst, src, len) : >>          is_pv_vcpu(current) ? copy_to_guest_pv(dst, src, len) : >>          fail_copy(dst, src, len)) >> >> But that made the think the is_{hvm,pv}_{vcpu,domain}() could be >> optimized for when only 1 of HVM or PV is enabled. >> >> Regards, >> Jason >> >> xen: Optimize is_hvm/pv_domain() for single domain type >> >> is_hvm_domain() and is_pv_domain() hardcode the false conditions for >> HVM=n and PV=n, but they still leave the XEN_DOMCTL_CDF_hvm flag >> checking.  When only one of PV or HVM is set, the result can be hard >> coded since the other is impossible.  Notably, this removes the >> evaluate_nospec() lfences. >> >> Signed-off-by: Jason Andryuk >> --- >> Untested. >> >> HVM=y PV=n bloat-o-meter: >> >> add/remove: 3/6 grow/shrink: 19/212 up/down: 3060/-60349 (-57289) >> >> Full bloat-o-meter below. >> --- >>  xen/include/xen/sched.h | 18 ++++++++++++++---- >>  1 file changed, 14 insertions(+), 4 deletions(-) >> >> diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h >> index f680fb4fa1..12f10d9cc8 100644 >> --- a/xen/include/xen/sched.h >> +++ b/xen/include/xen/sched.h >> @@ -1176,8 +1176,13 @@ static always_inline bool >> is_hypercall_target(const struct domain *d) >> >>  static always_inline bool is_pv_domain(const struct domain *d) >>  { >> -    return IS_ENABLED(CONFIG_PV) && >> -        evaluate_nospec(!(d->options & XEN_DOMCTL_CDF_hvm)); >> +    if ( !IS_ENABLED(CONFIG_PV) ) >> +        return false; >> + >> +    if ( IS_ENABLED(CONFIG_HVM) ) >> +        return evaluate_nospec(!(d->options & XEN_DOMCTL_CDF_hvm)); >> + >> +    return true; >>  } >> >>  static always_inline bool is_pv_vcpu(const struct vcpu *v) >> @@ -1218,8 +1223,13 @@ static always_inline bool is_pv_64bit_vcpu(const >> struct vcpu *v) >> >>  static always_inline bool is_hvm_domain(const struct domain *d) >>  { >> -    return IS_ENABLED(CONFIG_HVM) && >> -        evaluate_nospec(d->options & XEN_DOMCTL_CDF_hvm); >> +    if ( !IS_ENABLED(CONFIG_HVM) ) >> +        return false; >> + >> +    if ( IS_ENABLED(CONFIG_PV) ) >> +        return evaluate_nospec(d->options & XEN_DOMCTL_CDF_hvm); >> + >> +    return true; >>  } >> >>  static always_inline bool is_hvm_vcpu(const struct vcpu *v) > > While I like the idea, it may slightly impact some logic as special > domains (dom_xen and dom_io) are now considered HVM domains (when !PV && > HVM) instead of "neither PV nor HVM". > We want at least to make sure we're not silently breaking something > elsewhere. first of all idle domain - I've tried to constify is_hvm_domain() and even made it work, but diff is very fragile. Diff below - just FYI. -- Best regards, -grygorii Author: Grygorii Strashko Date: Fri Oct 17 17:21:29 2025 +0300 HACK: hvm only Signed-off-by: Grygorii Strashko diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index d65c2bd3661f..2ea3d81670de 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -567,17 +567,17 @@ int arch_vcpu_create(struct vcpu *v) spin_lock_init(&v->arch.vpmu.vpmu_lock); - if ( is_hvm_domain(d) ) - rc = hvm_vcpu_initialise(v); - else if ( !is_idle_domain(d) ) - rc = pv_vcpu_initialise(v); - else + if ( is_idle_domain(d) ) { /* Idle domain */ v->arch.cr3 = __pa(idle_pg_table); rc = 0; v->arch.msrs = ZERO_BLOCK_PTR; /* Catch stray misuses */ } + else if ( is_hvm_domain(d) ) + rc = hvm_vcpu_initialise(v); + else + rc = pv_vcpu_initialise(v); if ( rc ) goto fail; @@ -2123,7 +2123,7 @@ void context_switch(struct vcpu *prev, struct vcpu *next) vpmu_switch_from(prev); np2m_schedule(NP2M_SCHEDLE_OUT); - if ( is_hvm_domain(prevd) && !list_empty(&prev->arch.hvm.tm_list) ) + if ( !is_idle_domain(prevd) && is_hvm_domain(prevd) && !list_empty(&prev->arch.hvm.tm_list) ) pt_save_timer(prev); local_irq_disable(); diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig index 79c5bcbb3a24..533ad71d1018 100644 --- a/xen/arch/x86/hvm/Kconfig +++ b/xen/arch/x86/hvm/Kconfig @@ -126,4 +126,8 @@ config VHPET If unsure, say Y. +config HVM_ONLY + bool "Only HVM/PVH" + default y + endif diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c index 839d3ff91b5a..e3c9b4ffba52 100644 --- a/xen/arch/x86/hvm/svm/vmcb.c +++ b/xen/arch/x86/hvm/svm/vmcb.c @@ -236,7 +236,7 @@ static void cf_check vmcb_dump(unsigned char ch) for_each_domain ( d ) { - if ( !is_hvm_domain(d) ) + if ( is_idle_domain(d) || !is_hvm_domain(d) ) continue; printk("\n>>> Domain %d <<<\n", d->domain_id); for_each_vcpu ( d, v ) diff --git a/xen/arch/x86/mm/p2m-basic.c b/xen/arch/x86/mm/p2m-basic.c index e126fda26760..c53269b3c06d 100644 --- a/xen/arch/x86/mm/p2m-basic.c +++ b/xen/arch/x86/mm/p2m-basic.c @@ -34,7 +34,7 @@ static int p2m_initialise(struct domain *d, struct p2m_domain *p2m) p2m->default_access = p2m_access_rwx; p2m->p2m_class = p2m_host; - if ( !is_hvm_domain(d) ) + if ( is_idle_domain(d) || !is_hvm_domain(d) ) return 0; p2m_pod_init(p2m); @@ -113,7 +113,7 @@ int p2m_init(struct domain *d) int rc; rc = p2m_init_hostp2m(d); - if ( rc || !is_hvm_domain(d) ) + if ( rc || is_idle_domain(d) || !is_hvm_domain(d) ) return rc; /* diff --git a/xen/arch/x86/mm/p2m-pod.c b/xen/arch/x86/mm/p2m-pod.c index 05633fe2ac88..4e62d98861fe 100644 --- a/xen/arch/x86/mm/p2m-pod.c +++ b/xen/arch/x86/mm/p2m-pod.c @@ -1425,7 +1425,7 @@ bool p2m_pod_active(const struct domain *d) struct p2m_domain *p2m; bool res; - if ( !is_hvm_domain(d) ) + if ( is_idle_domain(d) || !is_hvm_domain(d) ) return false; p2m = p2m_get_hostp2m(d); diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index ccf8563e5a64..e1862c5085f5 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -2158,7 +2158,7 @@ static int __hwdom_init cf_check io_bitmap_cb( void __hwdom_init setup_io_bitmap(struct domain *d) { - if ( !is_hvm_domain(d) ) + if ( is_idle_domain(d) || !is_hvm_domain(d) ) return; bitmap_fill(d->arch.hvm.io_bitmap, 0x10000); diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h index 3764b58c9ccf..b1fb67b35d0f 100644 --- a/xen/include/xen/sched.h +++ b/xen/include/xen/sched.h @@ -1214,8 +1214,8 @@ static always_inline bool is_pv_64bit_vcpu(const struct vcpu *v) static always_inline bool is_hvm_domain(const struct domain *d) { - return IS_ENABLED(CONFIG_HVM) && - evaluate_nospec(d->options & XEN_DOMCTL_CDF_hvm); + return IS_ENABLED(CONFIG_HVM_ONLY) || (IS_ENABLED(CONFIG_HVM) && + evaluate_nospec(d->options & XEN_DOMCTL_CDF_hvm)); } static always_inline bool is_hvm_vcpu(const struct vcpu *v) From xen-devel-bounces@lists.xenproject.org Thu Nov 06 22:26:51 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Nov 2025 22:26:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157271.1486107 (Exim 4.92) (envelope-from ) id 1vH8RB-0008TC-F7; Thu, 06 Nov 2025 22:26:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157271.1486107; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AS2PR03MB8907.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 44ccbb43-9c0d-4908-4c49-08de1d838959 X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2025 22:26:31.4838 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 2WANFG6ehfmLDjC++Hmu2/DLhz/bCjLwQLt2XLnjYzRmwU1Ou9OOeVpjtmdZNJSSqd8TPuso5PbkK1ZTO9UH4M5qkQ2XCVuqYQKgKihJEY8= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR03MB6741 From: Grygorii Strashko Xen uses below pattern for raw_x_guest() functions: define raw_copy_to_guest(dst, src, len) \ (is_hvm_vcpu(current) ? \ copy_to_user_hvm((dst), (src), (len)) : \ copy_to_guest_pv(dst, src, len)) This pattern works depending on CONFIG_PV/CONFIG_HVM as: - PV=3Dy and HVM=3Dy Proper guest access function is selected depending on domain type. - PV=3Dy and HVM=3Dn Only PV domains are possible. is_hvm_domain/vcpu() will constify to "fals= e" and compiler will optimize code and skip HVM specific part. - PV=3Dn and HVM=3Dy Only HVM domains are possible. is_hvm_domain/vcpu() will not be constifie= d. No PV specific code will be optimized by compiler. - PV=3Dn and HVM=3Dn No guests should possible. The code will still follow PV path. Rework raw_x_guest() code to use static inline functions which account for above PV/HVM possible configurations with main intention to optimize code for (PV=3Dn and HVM=3Dy) case. For the case (PV=3Dn and HVM=3Dn) return "len" value indicating a failure (= no guests should be possible in this case, which means no access to guest memory should ever happen). Finally build arch/x86/usercopy.c only for PV=3Dy. The measured (bloat-o-meter) improvement for (PV=3Dn and HVM=3Dy) case is: add/remove: 2/9 grow/shrink: 2/90 up/down: 1678/-32560 (-30882) Total: Before=3D1937092, After=3D1906210, chg -1.59% Signed-off-by: Grygorii Strashko [teddy.astie@vates.tech: Suggested to use static inline functions vs macro = combinations] Suggested-by: Teddy Astie --- changes in v2: - use static inline functions instead of macro combinations v1: https://patchwork.kernel.org/project/xen-devel/patch/20251031212058.133= 8332-1-grygorii_strashko@epam.com/ xen/arch/x86/Makefile | 2 +- xen/arch/x86/include/asm/guest_access.h | 78 ++++++++++++++++++------- 2 files changed, 59 insertions(+), 21 deletions(-) diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index 407571c510e1..27f131ffeb61 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -71,7 +71,7 @@ obj-y +=3D time.o obj-y +=3D traps-setup.o obj-y +=3D traps.o obj-$(CONFIG_INTEL) +=3D tsx.o -obj-y +=3D usercopy.o +obj-$(CONFIG_PV) +=3D usercopy.o obj-y +=3D x86_emulate.o obj-$(CONFIG_TBOOT) +=3D tboot.o obj-y +=3D hpet.o diff --git a/xen/arch/x86/include/asm/guest_access.h b/xen/arch/x86/include= /asm/guest_access.h index 69716c8b41bb..576eac9722e6 100644 --- a/xen/arch/x86/include/asm/guest_access.h +++ b/xen/arch/x86/include/asm/guest_access.h @@ -13,26 +13,64 @@ #include =20 /* Raw access functions: no type checking. */ -#define raw_copy_to_guest(dst, src, len) \ - (is_hvm_vcpu(current) ? \ - copy_to_user_hvm((dst), (src), (len)) : \ - copy_to_guest_pv(dst, src, len)) -#define raw_copy_from_guest(dst, src, len) \ - (is_hvm_vcpu(current) ? \ - copy_from_user_hvm((dst), (src), (len)) : \ - copy_from_guest_pv(dst, src, len)) -#define raw_clear_guest(dst, len) \ - (is_hvm_vcpu(current) ? \ - clear_user_hvm((dst), (len)) : \ - clear_guest_pv(dst, len)) -#define __raw_copy_to_guest(dst, src, len) \ - (is_hvm_vcpu(current) ? \ - copy_to_user_hvm((dst), (src), (len)) : \ - __copy_to_guest_pv(dst, src, len)) -#define __raw_copy_from_guest(dst, src, len) \ - (is_hvm_vcpu(current) ? \ - copy_from_user_hvm((dst), (src), (len)) : \ - __copy_from_guest_pv(dst, src, len)) +static inline unsigned int raw_copy_to_guest(void *to, const void *src, + unsigned int len) +{ + if ( IS_ENABLED(CONFIG_HVM) && + (!IS_ENABLED(CONFIG_PV) || is_hvm_vcpu(current)) ) + return copy_to_user_hvm(to, src, len); + else if ( IS_ENABLED(CONFIG_PV) ) + return copy_to_guest_pv(to, src, len); + else + return len; +} + +static inline unsigned int raw_copy_from_guest(void *dst, const void *src, + unsigned int len) +{ + if ( IS_ENABLED(CONFIG_HVM) && + (!IS_ENABLED(CONFIG_PV) || is_hvm_vcpu(current)) ) + return copy_from_user_hvm(dst, src, len); + else if ( IS_ENABLED(CONFIG_PV) ) + return copy_from_guest_pv(dst, src, len); + else + return len; +} + +static inline unsigned int raw_clear_guest(void *dst, unsigned int len) +{ + if ( IS_ENABLED(CONFIG_HVM) && + (!IS_ENABLED(CONFIG_PV) || is_hvm_vcpu(current)) ) + return clear_user_hvm(dst, len); + else if ( IS_ENABLED(CONFIG_PV) ) + return clear_guest_pv(dst, len); + else + return len; +} + +static inline unsigned int __raw_copy_to_guest(void *dst, const void *src, + unsigned int len) +{ + if ( IS_ENABLED(CONFIG_HVM) && + (!IS_ENABLED(CONFIG_PV) || is_hvm_vcpu(current)) ) + return copy_to_user_hvm(dst, src, len); + else if ( IS_ENABLED(CONFIG_PV) ) + return __copy_to_guest_pv(dst, src, len); + else + return len; +} + +static inline unsigned int __raw_copy_from_guest(void *dst, const void *sr= c, + unsigned int len) +{ + if ( IS_ENABLED(CONFIG_HVM) && + (!IS_ENABLED(CONFIG_PV) || is_hvm_vcpu(current)) ) + return copy_from_user_hvm(dst, src, len); + else if ( IS_ENABLED(CONFIG_PV) ) + return __copy_from_guest_pv(dst, src, len); + else + return len; +} =20 /* * Pre-validate a guest handle. --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Fri Nov 07 01:06:46 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 07 Nov 2025 01:06:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157299.1486117 (Exim 4.92) (envelope-from ) id 1vHAvt-0001Qu-Ja; Fri, 07 Nov 2025 01:06:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157299.1486117; Fri, 07 Nov 2025 01:06:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHAvt-0001Qn-Gv; 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pr=C Message-ID: <64198f3a-7216-4f80-9e75-8a0c371f7e0b@amd.com> Date: Thu, 6 Nov 2025 20:06:13 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] xen/x86: guest_access: optimize raw_x_guest() for PV and HVM combinations To: Grygorii Strashko , "xen-devel@lists.xenproject.org" , "Jan Beulich" , Teddy Astie CC: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20251106222630.2777457-1-grygorii_strashko@epam.com> Content-Language: en-US From: Jason Andryuk In-Reply-To: <20251106222630.2777457-1-grygorii_strashko@epam.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0001A0F9:EE_|PH7PR12MB5925:EE_ X-MS-Office365-Filtering-Correlation-Id: d8efba98-c95c-4abf-49ab-08de1d99d9ab X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|82310400026|36860700013|7053199007; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Nov 2025 01:06:15.1815 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d8efba98-c95c-4abf-49ab-08de1d99d9ab X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A0F9.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB5925 On 2025-11-06 17:26, Grygorii Strashko wrote: > From: Grygorii Strashko > > Xen uses below pattern for raw_x_guest() functions: > > define raw_copy_to_guest(dst, src, len) \ > (is_hvm_vcpu(current) ? \ > copy_to_user_hvm((dst), (src), (len)) : \ > copy_to_guest_pv(dst, src, len)) > > This pattern works depending on CONFIG_PV/CONFIG_HVM as: > - PV=y and HVM=y > Proper guest access function is selected depending on domain type. > - PV=y and HVM=n > Only PV domains are possible. is_hvm_domain/vcpu() will constify to "false" > and compiler will optimize code and skip HVM specific part. > - PV=n and HVM=y > Only HVM domains are possible. is_hvm_domain/vcpu() will not be constified. > No PV specific code will be optimized by compiler. > - PV=n and HVM=n > No guests should possible. The code will still follow PV path. > > Rework raw_x_guest() code to use static inline functions which account for > above PV/HVM possible configurations with main intention to optimize code > for (PV=n and HVM=y) case. > > For the case (PV=n and HVM=n) return "len" value indicating a failure (no > guests should be possible in this case, which means no access to guest > memory should ever happen). > > Finally build arch/x86/usercopy.c only for PV=y. > > The measured (bloat-o-meter) improvement for (PV=n and HVM=y) case is: > add/remove: 2/9 grow/shrink: 2/90 up/down: 1678/-32560 (-30882) > Total: Before=1937092, After=1906210, chg -1.59% > > Signed-off-by: Grygorii Strashko > [teddy.astie@vates.tech: Suggested to use static inline functions vs macro combinations] > Suggested-by: Teddy Astie I think Teddy's goes before your SoB. > --- > diff --git a/xen/arch/x86/include/asm/guest_access.h b/xen/arch/x86/include/asm/guest_access.h > index 69716c8b41bb..576eac9722e6 100644 > --- a/xen/arch/x86/include/asm/guest_access.h > +++ b/xen/arch/x86/include/asm/guest_access.h > @@ -13,26 +13,64 @@ > #include > > /* Raw access functions: no type checking. */ > -#define raw_copy_to_guest(dst, src, len) \ > - (is_hvm_vcpu(current) ? \ > - copy_to_user_hvm((dst), (src), (len)) : \ > - copy_to_guest_pv(dst, src, len)) > -#define raw_copy_from_guest(dst, src, len) \ > - (is_hvm_vcpu(current) ? \ > - copy_from_user_hvm((dst), (src), (len)) : \ > - copy_from_guest_pv(dst, src, len)) > -#define raw_clear_guest(dst, len) \ > - (is_hvm_vcpu(current) ? \ > - clear_user_hvm((dst), (len)) : \ > - clear_guest_pv(dst, len)) > -#define __raw_copy_to_guest(dst, src, len) \ > - (is_hvm_vcpu(current) ? \ > - copy_to_user_hvm((dst), (src), (len)) : \ > - __copy_to_guest_pv(dst, src, len)) > -#define __raw_copy_from_guest(dst, src, len) \ > - (is_hvm_vcpu(current) ? \ > - copy_from_user_hvm((dst), (src), (len)) : \ > - __copy_from_guest_pv(dst, src, len)) > +static inline unsigned int raw_copy_to_guest(void *to, const void *src, Maybe s/to/dst/ to keep this consistent with the rest? > + unsigned int len) > +{ > + if ( IS_ENABLED(CONFIG_HVM) && > + (!IS_ENABLED(CONFIG_PV) || is_hvm_vcpu(current)) ) Since this is repeated, maybe put into a helper like use_hvm_access(current)? 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pr=C Message-ID: <2e298f37-78b2-4870-89a0-07dc4501372c@amd.com> Date: Thu, 6 Nov 2025 20:29:37 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH] xen/x86: guest_access: optimize raw_x_guest() for PV and HVM combinations To: Grygorii Strashko , Teddy Astie , , Jan Beulich CC: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , "Julien Grall" , Stefano Stabellini , Alejandro Vallejo References: <20251031212058.1338332-1-grygorii_strashko@epam.com> <434d9ce4-e5e1-453d-84b7-e21e66d0c5a3@vates.tech> <0217b1ff-2c33-43ae-adbc-d665c881473d@amd.com> <01ad9a85-ff61-445c-97d4-076f9a81b649@epam.com> Content-Language: en-US From: Jason Andryuk In-Reply-To: <01ad9a85-ff61-445c-97d4-076f9a81b649@epam.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001F1:EE_|DM4PR12MB7574:EE_ X-MS-Office365-Filtering-Correlation-Id: ea17690a-751f-47e6-0cee-08de1d9d2213 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|82310400026|36860700013; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Nov 2025 01:29:45.0596 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ea17690a-751f-47e6-0cee-08de1d9d2213 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001F1.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB7574 On 2025-11-06 12:40, Grygorii Strashko wrote: > > > On 06.11.25 19:27, Teddy Astie wrote: >> Le 06/11/2025 à 18:00, Jason Andryuk a écrit : >>> On 2025-11-06 11:33, Grygorii Strashko wrote: >>>> Hi Teddy, Jan, >>>> >>>> On 06.11.25 17:57, Teddy Astie wrote: >>>>> Le 31/10/2025 à 22:25, Grygorii Strashko a écrit : >>>> Can try. >>> >>> Yes, I was thinking something like Teddy suggested: >>> >>> #define raw_copy_to_guest(dst, src, len)        \ >>>           (is_hvm_vcpu(current) ? copy_to_user_hvm(dst, src, len) : >>>            is_pv_vcpu(current) ? copy_to_guest_pv(dst, src, len) : >>>            fail_copy(dst, src, len)) >>> >>> But that made the think the is_{hvm,pv}_{vcpu,domain}() could be >>> optimized for when only 1 of HVM or PV is enabled. >>> >>> Regards, >>> Jason >>> >>> xen: Optimize is_hvm/pv_domain() for single domain type >>> >>> is_hvm_domain() and is_pv_domain() hardcode the false conditions for >>> HVM=n and PV=n, but they still leave the XEN_DOMCTL_CDF_hvm flag >>> checking.  When only one of PV or HVM is set, the result can be hard >>> coded since the other is impossible.  Notably, this removes the >>> evaluate_nospec() lfences. >>> >>> Signed-off-by: Jason Andryuk >>> --- >>> Untested. >>> >>> HVM=y PV=n bloat-o-meter: >>> >>> add/remove: 3/6 grow/shrink: 19/212 up/down: 3060/-60349 (-57289) >>> >>> Full bloat-o-meter below. >>> --- >>>    xen/include/xen/sched.h | 18 ++++++++++++++---- >>>    1 file changed, 14 insertions(+), 4 deletions(-) >>> >>> diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h >>> index f680fb4fa1..12f10d9cc8 100644 >>> --- a/xen/include/xen/sched.h >>> +++ b/xen/include/xen/sched.h >>> @@ -1176,8 +1176,13 @@ static always_inline bool >>> is_hypercall_target(const struct domain *d) >>> >>>    static always_inline bool is_pv_domain(const struct domain *d) >>>    { >>> -    return IS_ENABLED(CONFIG_PV) && >>> -        evaluate_nospec(!(d->options & XEN_DOMCTL_CDF_hvm)); >>> +    if ( !IS_ENABLED(CONFIG_PV) ) >>> +        return false; >>> + >>> +    if ( IS_ENABLED(CONFIG_HVM) ) >>> +        return evaluate_nospec(!(d->options & XEN_DOMCTL_CDF_hvm)); >>> + >>> +    return true; >>>    } >>> >>>    static always_inline bool is_pv_vcpu(const struct vcpu *v) >>> @@ -1218,8 +1223,13 @@ static always_inline bool is_pv_64bit_vcpu(const >>> struct vcpu *v) >>> >>>    static always_inline bool is_hvm_domain(const struct domain *d) >>>    { >>> -    return IS_ENABLED(CONFIG_HVM) && >>> -        evaluate_nospec(d->options & XEN_DOMCTL_CDF_hvm); >>> +    if ( !IS_ENABLED(CONFIG_HVM) ) >>> +        return false; >>> + >>> +    if ( IS_ENABLED(CONFIG_PV) ) >>> +        return evaluate_nospec(d->options & XEN_DOMCTL_CDF_hvm); >>> + >>> +    return true; >>>    } >>> >>>    static always_inline bool is_hvm_vcpu(const struct vcpu *v) >> >> While I like the idea, it may slightly impact some logic as special >> domains (dom_xen and dom_io) are now considered HVM domains (when !PV && >> HVM) instead of "neither PV nor HVM". >> We want at least to make sure we're not silently breaking something >> elsewhere. > > first of all idle domain - I've tried to constify is_hvm_domain() and > even made it work, > but diff is very fragile. Interesting. Yeah, I did not consider system domains. It seems fragile today if sometimes !is_hvm_domain implies idle_domain. :/ > Diff below - just FYI. > > -- > Best regards, > -grygorii > > Author: Grygorii Strashko > Date:   Fri Oct 17 17:21:29 2025 +0300 > >     HACK: hvm only >     Signed-off-by: Grygorii Strashko > > diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c > index d65c2bd3661f..2ea3d81670de 100644 > --- a/xen/arch/x86/domain.c > +++ b/xen/arch/x86/domain.c > @@ -567,17 +567,17 @@ int arch_vcpu_create(struct vcpu *v) > >      spin_lock_init(&v->arch.vpmu.vpmu_lock); > > -    if ( is_hvm_domain(d) ) > -        rc = hvm_vcpu_initialise(v); > -    else if ( !is_idle_domain(d) ) > -        rc = pv_vcpu_initialise(v); > -    else > +    if ( is_idle_domain(d) ) >      { >          /* Idle domain */ >          v->arch.cr3 = __pa(idle_pg_table); >          rc = 0; >          v->arch.msrs = ZERO_BLOCK_PTR; /* Catch stray misuses */ >      } > +    else if ( is_hvm_domain(d) ) > +        rc = hvm_vcpu_initialise(v); > +    else > +        rc = pv_vcpu_initialise(v); This looks like an improvement as it makes the idle domain case explicit. > >      if ( rc ) >          goto fail; > @@ -2123,7 +2123,7 @@ void context_switch(struct vcpu *prev, struct vcpu > *next) >      vpmu_switch_from(prev); >      np2m_schedule(NP2M_SCHEDLE_OUT); > > -    if ( is_hvm_domain(prevd) && !list_empty(&prev->arch.hvm.tm_list) ) > +    if ( !is_idle_domain(prevd) && is_hvm_domain(prevd) && ! > list_empty(&prev->arch.hvm.tm_list) ) The idle domain's tm_list could be initialized. It should remain empty and be equivalent without modifying this line. Though maybe your way is better. >          pt_save_timer(prev); > >      local_irq_disable(); > diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c > index 839d3ff91b5a..e3c9b4ffba52 100644 > --- a/xen/arch/x86/hvm/svm/vmcb.c > +++ b/xen/arch/x86/hvm/svm/vmcb.c > @@ -236,7 +236,7 @@ static void cf_check vmcb_dump(unsigned char ch) > >      for_each_domain ( d ) >      { > -        if ( !is_hvm_domain(d) ) > +        if ( is_idle_domain(d) || !is_hvm_domain(d) ) I don't think this should be needed as idle domain, and system domains in general, are not added to domlist. So for_each_domain() will only iterate over user domains. domain_create() has an early exit for system domains: .... /* DOMID_{XEN,IO,IDLE,etc} are sufficiently constructed. */ if ( is_system_domain(d) ) return d; arch_domain_create() paging_domain_init() p2m_init() domlist_insert() >              continue; >          printk("\n>>> Domain %d <<<\n", d->domain_id); >          for_each_vcpu ( d, v ) > diff --git a/xen/arch/x86/mm/p2m-basic.c b/xen/arch/x86/mm/p2m-basic.c > index e126fda26760..c53269b3c06d 100644 > --- a/xen/arch/x86/mm/p2m-basic.c > +++ b/xen/arch/x86/mm/p2m-basic.c > @@ -34,7 +34,7 @@ static int p2m_initialise(struct domain *d, struct > p2m_domain *p2m) >      p2m->default_access = p2m_access_rwx; >      p2m->p2m_class = p2m_host; > > -    if ( !is_hvm_domain(d) ) > +    if ( is_idle_domain(d) || !is_hvm_domain(d) ) >          return 0; > >      p2m_pod_init(p2m); > @@ -113,7 +113,7 @@ int p2m_init(struct domain *d) >      int rc; > >      rc = p2m_init_hostp2m(d); > -    if ( rc || !is_hvm_domain(d) ) > +    if ( rc || is_idle_domain(d) || !is_hvm_domain(d) ) Given the snippet above, I think p2m functions can't be reached for system domains. >          return rc; > >      /* > diff --git a/xen/arch/x86/mm/p2m-pod.c b/xen/arch/x86/mm/p2m-pod.c > index 05633fe2ac88..4e62d98861fe 100644 > --- a/xen/arch/x86/mm/p2m-pod.c > +++ b/xen/arch/x86/mm/p2m-pod.c > @@ -1425,7 +1425,7 @@ bool p2m_pod_active(const struct domain *d) >      struct p2m_domain *p2m; >      bool res; > > -    if ( !is_hvm_domain(d) ) > +    if ( is_idle_domain(d) || !is_hvm_domain(d) ) accessed via: do_domctl() vm_event_domctl() p2m_pod_active() The passed in d needs to be from domlist, so again a system domain cannot reach here. >          return false; > >      p2m = p2m_get_hostp2m(d); > diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c > index ccf8563e5a64..e1862c5085f5 100644 > --- a/xen/arch/x86/setup.c > +++ b/xen/arch/x86/setup.c > @@ -2158,7 +2158,7 @@ static int __hwdom_init cf_check io_bitmap_cb( > >  void __hwdom_init setup_io_bitmap(struct domain *d) >  { > -    if ( !is_hvm_domain(d) ) > +    if ( is_idle_domain(d) || !is_hvm_domain(d) ) This looks like it is called for dom0 or late_hwdom, so only real domains. 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Thu, 06 Nov 2025 22:52:23 -0800 (PST) Message-ID: <0dd91607-6df5-4be8-a92a-c3046542748c@suse.com> Date: Fri, 7 Nov 2025 07:52:22 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] xen/x86: guest_access: optimize raw_x_guest() for PV and HVM combinations To: Grygorii Strashko Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , "xen-devel@lists.xenproject.org" , Jason Andryuk , Teddy Astie References: <20251106222630.2777457-1-grygorii_strashko@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251106222630.2777457-1-grygorii_strashko@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.11.2025 23:26, Grygorii Strashko wrote: > From: Grygorii Strashko > > Xen uses below pattern for raw_x_guest() functions: > > define raw_copy_to_guest(dst, src, len) \ > (is_hvm_vcpu(current) ? \ > copy_to_user_hvm((dst), (src), (len)) : \ > copy_to_guest_pv(dst, src, len)) > > This pattern works depending on CONFIG_PV/CONFIG_HVM as: > - PV=y and HVM=y > Proper guest access function is selected depending on domain type. > - PV=y and HVM=n > Only PV domains are possible. is_hvm_domain/vcpu() will constify to "false" > and compiler will optimize code and skip HVM specific part. > - PV=n and HVM=y > Only HVM domains are possible. is_hvm_domain/vcpu() will not be constified. > No PV specific code will be optimized by compiler. > - PV=n and HVM=n > No guests should possible. The code will still follow PV path. > > Rework raw_x_guest() code to use static inline functions which account for > above PV/HVM possible configurations with main intention to optimize code > for (PV=n and HVM=y) case. > > For the case (PV=n and HVM=n) return "len" value indicating a failure (no > guests should be possible in this case, which means no access to guest > memory should ever happen). > > Finally build arch/x86/usercopy.c only for PV=y. > > The measured (bloat-o-meter) improvement for (PV=n and HVM=y) case is: > add/remove: 2/9 grow/shrink: 2/90 up/down: 1678/-32560 (-30882) > Total: Before=1937092, After=1906210, chg -1.59% > > Signed-off-by: Grygorii Strashko > [teddy.astie@vates.tech: Suggested to use static inline functions vs macro combinations] > Suggested-by: Teddy Astie Just one formal request for now: Please send patches To: the list, with individuals on Cc: as necessary. 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Thu, 06 Nov 2025 23:04:29 -0800 (PST) Message-ID: <1fa1ca4d-62ce-49ee-8a8a-8d0d9e8abf2e@suse.com> Date: Fri, 7 Nov 2025 08:04:28 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3] xen: Strip xen.efi by default To: Frediano Ziglio Cc: xen-devel@lists.xenproject.org, Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , Demi Marie Obenour References: <20251105153808.20278-1-frediano.ziglio@citrix.com> <98e2f19f-5fce-4ad1-b821-f5abb1f815f6@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.11.2025 17:32, Frediano Ziglio wrote: > On Thu, 6 Nov 2025 at 10:27, Jan Beulich wrote: >> >> On 06.11.2025 10:58, Frediano Ziglio wrote: >>> On Thu, 6 Nov 2025 at 03:52, Demi Marie Obenour wrote: >>>> Does objdump on the signed file return correct section names? >>> >>> From objdump -x >>> >>> Sections: >>> Idx Name Size VMA LMA File off Algn >>> 0 .text 0016c9ae ffff82d040200000 ffff82d040200000 00000320 2**4 >>> CONTENTS, ALLOC, LOAD, READONLY, CODE >>> 1 .rodata 0006b9e8 ffff82d040400000 ffff82d040400000 0016cce0 2**2 >>> CONTENTS, ALLOC, LOAD, DATA >>> 2 .buildid 00000035 ffff82d04046c000 ffff82d04046c000 001d86e0 2**2 >>> CONTENTS, ALLOC, LOAD, READONLY, DATA >>> 3 .init.text 0004d123 ffff82d040600000 ffff82d040600000 001d8720 2**2 >>> CONTENTS, ALLOC, LOAD, READONLY, CODE >>> 4 .init.data 0006c9b0 ffff82d040800000 ffff82d040800000 00225860 2**2 >>> CONTENTS, ALLOC, LOAD, DATA >>> 5 .data.read_mostly 00028da8 ffff82d040a00000 ffff82d040a00000 >>> 00292220 2**4 >>> CONTENTS, ALLOC, LOAD, DATA >>> 6 .data 0000feec ffff82d040a29000 ffff82d040a29000 002bafe0 2**4 >>> CONTENTS, ALLOC, LOAD, DATA >>> 7 .bss 00223108 ffff82d040a39000 ffff82d040a39000 00000000 2**4 >>> ALLOC >>> 8 .reloc 000016b8 ffff82d040c5d000 ffff82d040c5d000 002caee0 2**2 >>> CONTENTS, ALLOC, LOAD, READONLY, DATA >>> 9 .sbat 000000a6 ffff82d040c5f000 ffff82d040c5f000 002cc5a0 2**2 >>> CONTENTS, READONLY >>> >>> Which looks correct. >>> >>> From hexdump -C I can see close to the end >>> >>> ... >>> 002cc580 30 ae 38 ae 60 ae 00 00 00 80 a3 00 10 00 00 00 |0.8.`...........| >>> 002cc590 a0 ae c0 ae e0 ae 00 00 00 00 00 00 00 00 00 00 |................| >>> 002cc5a0 73 62 61 74 2c 31 2c 53 42 41 54 20 56 65 72 73 |sbat,1,SBAT Vers| >>> 002cc5b0 69 6f 6e 2c 73 62 61 74 2c 31 2c 68 74 74 70 73 |ion,sbat,1,https| >>> 002cc5c0 3a 2f 2f 67 69 74 68 75 62 2e 63 6f 6d 2f 72 68 |://github.com/rh| >>> 002cc5d0 62 6f 6f 74 2f 73 68 69 6d 2f 62 6c 6f 62 2f 6d |boot/shim/blob/m| >>> 002cc5e0 61 69 6e 2f 53 42 41 54 2e 6d 64 0a 78 65 6e 2e |ain/SBAT.md.xen.| >>> 002cc5f0 78 73 2c 31 2c 43 6c 6f 75 64 20 53 6f 66 74 77 |xs,1,Cloud Softw| >>> 002cc600 61 72 65 20 47 72 6f 75 70 2c 78 65 6e 2c 34 2e |are Group,xen,4.| >>> 002cc610 32 30 2e 31 2d 37 2e 32 32 2e 67 33 65 30 36 37 |20.1-7.22.g3e067| >>> 002cc620 32 36 62 2e 78 73 39 2c 6d 61 69 6c 74 6f 3a 73 |26b.xs9,mailto:s| >>> 002cc630 65 63 75 72 69 74 79 40 78 65 6e 73 65 72 76 65 |ecurity@xenserve| >>> 002cc640 72 2e 63 6f 6d 0a 00 00 00 00 00 00 00 00 00 00 |r.com...........| >>> 002cc650 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................| >>> 002cc660 2c 00 00 00 2e 69 6e 69 74 2e 74 65 78 74 00 2e |,....init.text..| >>> 002cc670 69 6e 69 74 2e 64 61 74 61 00 2e 64 61 74 61 2e |init.data..data.| >>> 002cc680 72 65 61 64 5f 6d 6f 73 74 6c 79 00 00 00 00 00 |read_mostly.....| >>> 002cc690 9e 05 00 00 00 02 02 00 30 82 05 92 06 09 2a 86 |........0.....*.| >>> 002cc6a0 48 86 f7 0d 01 07 02 a0 82 05 83 30 82 05 7f 02 |H..........0....| >>> 002cc6b0 01 01 31 0f 30 0d 06 09 60 86 48 01 65 03 04 02 |..1.0...`.H.e...| >>> 002cc6c0 01 05 00 30 5c 06 0a 2b 06 01 04 01 82 37 02 01 |...0\..+.....7..| >>> 002cc6d0 04 a0 4e 30 4c 30 17 06 0a 2b 06 01 04 01 82 37 |..N0L0...+.....7| >>> 002cc6e0 02 01 0f 30 09 03 01 00 a0 04 a2 02 80 00 30 31 |...0..........01| >>> 002cc6f0 30 0d 06 09 60 86 48 01 65 03 04 02 01 05 00 04 |0...`.H.e.......| >>> 002cc700 20 e2 47 64 f8 e8 7b 62 eb 17 e0 13 0a 0d 93 02 | .Gd..{b........| >>> 002cc710 7a d8 3b f0 20 a8 ee 3d 49 98 3f de c1 47 de 15 |z.;. ..=I.?..G..| >>> 002cc720 43 a0 82 03 2c 30 82 03 28 30 82 02 10 a0 03 02 |C...,0..(0......| >>> 002cc730 01 02 02 11 00 8f fc 11 bf 41 54 40 74 89 2c 53 |.........AT@t.,S| >>> 002cc740 a5 78 c1 e8 32 30 0d 06 09 2a 86 48 86 f7 0d 01 |.x..20...*.H....| >>> 002cc750 01 0b 05 00 30 1c 31 1a 30 18 06 03 55 04 03 13 |....0.1.0...U...| >>> 002cc760 11 58 65 6e 53 65 72 76 65 72 20 58 65 6e 20 64 |.XenServer Xen d| >>> 002cc770 65 76 30 1e 17 0d 32 35 30 33 32 30 31 36 35 35 |ev0...2503201655| >>> 002cc780 30 37 5a 17 0d 33 37 30 31 31 39 30 33 31 34 30 |07Z..37011903140| >>> 002cc790 37 5a 30 1c 31 1a 30 18 06 03 55 04 03 13 11 58 |7Z0.1.0...U....X| >>> 002cc7a0 65 6e 53 65 72 76 65 72 20 58 65 6e 20 64 65 76 |enServer Xen dev| >>> ... >>> >>> So, this confirms that the string table is there to support larger >>> section names and the signature is there and it's working. >> >> But is it going to work on all EFI implementations, or merely the one you tried? > > Can you be more specific ? > The file was tested using dozens of different hardware and under Qemu. > Only x64 if it's what you mean. No, I was referring to the fact that there are distinct EFI implementations, which may differ in their loader behavior. But see also Demi's clarification on her original remark. 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Thu, 06 Nov 2025 23:08:42 -0800 (PST) Message-ID: Date: Fri, 7 Nov 2025 08:08:40 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3] xen: Strip xen.efi by default To: Frediano Ziglio Cc: Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20251105153808.20278-1-frediano.ziglio@citrix.com> <97611b79-228c-40a6-9fb2-4571b2447258@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06.11.2025 17:37, Frediano Ziglio wrote: > On Thu, 6 Nov 2025 at 10:32, Jan Beulich wrote: >> On 05.11.2025 16:38, Frediano Ziglio wrote: >>> --- a/xen/Kconfig.debug >>> +++ b/xen/Kconfig.debug >>> @@ -147,12 +147,7 @@ config DEBUG_INFO >>> Say Y here if you want to build Xen with debug information. This >>> information is needed e.g. for doing crash dump analysis of the >>> hypervisor via the "crash" tool. >>> - Saying Y will increase the size of the xen-syms and xen.efi >>> - binaries. In case the space on the EFI boot partition is rather >>> - limited, you may want to install a stripped variant of xen.efi in >>> - the EFI boot partition (look for "INSTALL_EFI_STRIP" in >>> - docs/misc/efi.pandoc for more information - when not using >>> - "make install-xen" for installing xen.efi, stripping needs to be >>> - done outside the Xen build environment). >>> + Saying Y will increase the size of the xen-syms and xen.efi.elf >>> + binaries. >> >> Why xen.efi.elf and not xen-syms.efi? >> > > I forgot to update this part. > Now that I see the comment, was the suggestion about having an > additional xen-syms.efi file or having xen-syms.efi instead of > xen.efi.elf ? The former. We want to have the binary available that the linker produced directly. Anything else are extra's for what people think they may need. >>> --- a/xen/arch/x86/Makefile >>> +++ b/xen/arch/x86/Makefile >>> @@ -228,14 +228,17 @@ endif >>> $(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o >>> $(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds $< \ >>> $(dot-target).1r.o $(dot-target).1s.o $(orphan-handling-y) \ >>> - $(note_file_option) -o $@ >>> - $(NM) -pa --format=sysv $@ \ >>> + $(note_file_option) -o $@.tmp >>> + $(NM) -pa --format=sysv $@.tmp \ >>> | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ >>> > $@.map >>> ifeq ($(CONFIG_DEBUG_INFO),y) >>> - $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) -O elf64-x86-64 $@ $@.elf >>> + $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))cp -f \ >>> + $@.tmp $(TARGET)-syms.efi >>> + $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(STRIP) $@.tmp >>> endif >>> rm -f $(dot-target).[0-9]* $(@D)/..$(@F).[0-9]* >>> + mv -f $@.tmp $@ >>> ifeq ($(CONFIG_XEN_IBT),y) >>> $(SHELL) $(srctree)/tools/check-endbr.sh $@ >>> endif >> >> I see $@.tmp here, but no sign of xen-syms. Did you submit a stake patch? Am >> I missing something? >> > > I don't know what a "stake patch" is. Sorry, typo - "stale" was meant. > xen-syms.efi (that is $(TARGET)-syms.efi in the Makefile) is not a > target of this rule so if the rule fails it will be generated again. How does this matter in this context? The description talks of a xen-syms.efi being generated, yet I'm simply unable to spot where that would be happening. >> I also think the mv should sit ahead of the cleaning-up rm. > > Are you sure? > Usually you want it as the last command so any failure won't create > the target. For instance here if check-endbr.sh is failing the target > is still created and next make command will succeed. Except that the rm is tidying up rather than creating anything. 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On 17/12/2024 19:06, Carlo Nonato wrote: > Last Level Cache (LLC) coloring allows to partition the cache in smaller > chunks called cache colors. > > Since not all architectures can actually implement it, add a HAS_LLC_COLORING > Kconfig option. > LLC_COLORS_ORDER Kconfig option has a range maximum of 10 (2^10 = 1024) > because that's the number of colors that fit in a 4 KiB page when integers > are 4 bytes long. > > LLC colors are a property of the domain, so struct domain has to be extended. > > Based on original work from: Luca Miccio > > Signed-off-by: Carlo Nonato > Signed-off-by: Marco Solieri > Acked-by: Michal Orzel > --- > v13: > - added note to cmdline docs for llc-nr-ways and llc-size shorthand precedence > v12: > - fixed build errors > - added opt_llc_coloring to improve readibility > - reverted llc_coloring_enabled type to bool > v11: > - __COLORING_H__ -> __XEN_LLC_COLORING_H__ in llc-coloring.h > - added SPDX tag to cache-coloring.rst > - llc-coloring=off now takes precedence over other cmdline options > - removed useless #includes > v10: > - fixed commit message to use LLC_COLORS_ORDER > - added documentation to index.rst > - moved check on CONFIG_NUMA in arch/arm/Kconfig (next patch) > - fixed copyright line > - fixed array type for colors parameter in print_colors() > - added check on (way_size & ~PAGE_MASK) > v9: > - dropped _MAX_ from CONFIG_MAX_LLC_COLORS_ORDER > v8: > - minor documentation fixes > - "llc-coloring=on" is inferred from "llc-nr-ways" and "llc-size" usage > - turned CONFIG_NR_LLC_COLORS to CONFIG_MAX_LLC_COLORS_ORDER, base-2 exponent > - moved Kconfig options to common/Kconfig > - don't crash if computed max_nr_colors is too large > v7: > - SUPPORT.md changes added to this patch > - extended documentation to better address applicability of cache coloring > - "llc-nr-ways" and "llc-size" params introduced in favor of "llc-way-size" > - moved dump_llc_coloring_info() call in 'm' keyhandler (pagealloc_info()) > v6: > - moved almost all code in common > - moved documentation in this patch > - reintroduced range for CONFIG_NR_LLC_COLORS > - reintroduced some stub functions to reduce the number of checks on > llc_coloring_enabled > - moved domain_llc_coloring_free() in same patch where allocation happens > - turned "d->llc_colors" to pointer-to-const > - llc_coloring_init() now returns void and panics if errors are found > v5: > - used - instead of _ for filenames > - removed domain_create_llc_colored() > - removed stub functions > - coloring domain fields are now #ifdef protected > v4: > - Kconfig options moved to xen/arch > - removed range for CONFIG_NR_LLC_COLORS > - added "llc_coloring_enabled" global to later implement the boot-time > switch > - added domain_create_llc_colored() to be able to pass colors > - added is_domain_llc_colored() macro > --- > SUPPORT.md | 7 ++ > docs/index.rst | 1 + > docs/misc/cache-coloring.rst | 118 ++++++++++++++++++++++++++++ > docs/misc/xen-command-line.pandoc | 39 ++++++++++ > xen/common/Kconfig | 21 +++++ > xen/common/Makefile | 1 + > xen/common/keyhandler.c | 3 + > xen/common/llc-coloring.c | 124 ++++++++++++++++++++++++++++++ > xen/common/page_alloc.c | 3 + > xen/include/xen/llc-coloring.h | 36 +++++++++ > xen/include/xen/sched.h | 5 ++ > 11 files changed, 358 insertions(+) > create mode 100644 docs/misc/cache-coloring.rst > create mode 100644 xen/common/llc-coloring.c > create mode 100644 xen/include/xen/llc-coloring.h > > diff --git a/SUPPORT.md b/SUPPORT.md > index 82239d0294..998faf5635 100644 > --- a/SUPPORT.md > +++ b/SUPPORT.md > @@ -401,6 +401,13 @@ by maintaining multiple physical to machine (p2m) memory mappings. > Status, x86 HVM: Tech Preview > Status, ARM: Tech Preview > > +### Cache coloring > + > +Allows to reserve Last Level Cache (LLC) partitions for Dom0, DomUs and Xen > +itself. > + > + Status, Arm64: Experimental > + > ## Resource Management > > ### CPU Pools > diff --git a/docs/index.rst b/docs/index.rst > index 1d44796d72..1bb8d02ea3 100644 > --- a/docs/index.rst > +++ b/docs/index.rst > @@ -66,6 +66,7 @@ Documents in need of some rearranging. > misc/xen-makefiles/makefiles > misra/index > fusa/index > + misc/cache-coloring > > > Miscellanea > diff --git a/docs/misc/cache-coloring.rst b/docs/misc/cache-coloring.rst > new file mode 100644 > index 0000000000..371f21a0e7 > --- /dev/null > +++ b/docs/misc/cache-coloring.rst > @@ -0,0 +1,118 @@ > +.. SPDX-License-Identifier: CC-BY-4.0 > + > +Xen cache coloring user guide > +============================= > + > +The cache coloring support in Xen allows to reserve Last Level Cache (LLC) > +partitions for Dom0, DomUs and Xen itself. Currently only ARM64 is supported. > +Cache coloring realizes per-set cache partitioning in software and is applicable > +to shared LLCs as implemented in Cortex-A53, Cortex-A72 and similar CPUs. > + > +To compile LLC coloring support set ``CONFIG_LLC_COLORING=y``. > + > +If needed, change the maximum number of colors with > +``CONFIG_LLC_COLORS_ORDER=``. > + > +Runtime configuration is done via `Command line parameters`_. > + > +Background > +********** > + > +Cache hierarchy of a modern multi-core CPU typically has first levels dedicated > +to each core (hence using multiple cache units), while the last level is shared > +among all of them. Such configuration implies that memory operations on one > +core (e.g. running a DomU) are able to generate interference on another core > +(e.g. hosting another DomU). Cache coloring realizes per-set cache-partitioning > +in software and mitigates this, guaranteeing more predictable performances for > +memory accesses. > +Software-based cache coloring is particularly useful in those situations where > +no hardware mechanisms (e.g., DSU-based way partitioning) are available to > +partition caches. This is the case for e.g., Cortex-A53, A57 and A72 CPUs that > +feature a L2 LLC cache shared among all cores. > + > +The key concept underlying cache coloring is a fragmentation of the memory > +space into a set of sub-spaces called colors that are mapped to disjoint cache > +partitions. Technically, the whole memory space is first divided into a number > +of subsequent regions. Then each region is in turn divided into a number of > +subsequent sub-colors. The generic i-th color is then obtained by all the > +i-th sub-colors in each region. > + > +:: > + > + Region j Region j+1 > + ..................... ............ > + . . . > + . . > + _ _ _______________ _ _____________________ _ _ > + | | | | | | | > + | c_0 | c_1 | | c_n | c_0 | c_1 | > + _ _ _|_____|_____|_ _ _|_____|_____|_____|_ _ _ > + : : > + : :... ... . > + : color 0 > + :........................... ... . > + : > + . . ..................................: > + > +How colors are actually defined depends on the function that maps memory to > +cache lines. In case of physically-indexed, physically-tagged caches with linear > +mapping, the set index is found by extracting some contiguous bits from the > +physical address. This allows colors to be defined as shown in figure: they > +appear in memory as subsequent blocks of equal size and repeats themselves after > +``n`` different colors, where ``n`` is the total number of colors. > + > +If some kind of bit shuffling appears in the mapping function, then colors > +assume a different layout in memory. Those kind of caches aren't supported by > +the current implementation. > + > +**Note**: Finding the exact cache mapping function can be a really difficult > +task since it's not always documented in the CPU manual. As said Cortex-A53, A57 > +and A72 are known to work with the current implementation. > + > +How to compute the number of colors > +################################### > + > +Given the linear mapping from physical memory to cache lines for granted, the > +number of available colors for a specific platform is computed using three > +parameters: > + > +- the size of the LLC. > +- the number of the LLC ways. > +- the page size used by Xen. > + > +The first two parameters can be found in the processor manual, while the third > +one is the minimum mapping granularity. Dividing the cache size by the number of > +its ways we obtain the size of a way. Dividing this number by the page size, > +the number of total cache colors is found. So for example an Arm Cortex-A53 > +with a 16-ways associative 1 MiB LLC can isolate up to 16 colors when pages are > +4 KiB in size. > + > +Effective colors assignment > +########################### > + > +When assigning colors, if one wants to avoid cache interference between two > +domains, different colors needs to be used for their memory. > + > +Command line parameters > +*********************** > + > +Specific documentation is available at `docs/misc/xen-command-line.pandoc`. > + > ++----------------------+-------------------------------+ > +| **Parameter** | **Description** | > ++----------------------+-------------------------------+ > +| ``llc-coloring`` | Enable coloring at runtime | > ++----------------------+-------------------------------+ > +| ``llc-size`` | Set the LLC size | > ++----------------------+-------------------------------+ > +| ``llc-nr-ways`` | Set the LLC number of ways | > ++----------------------+-------------------------------+ > + > +Auto-probing of LLC specs > +######################### > + > +LLC size and number of ways are probed automatically by default. > + > +LLC specs can be manually set via the above command line parameters. This > +bypasses any auto-probing and it's used to overcome failing situations, such as > +flawed probing logic, or for debugging/testing purposes. > diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc > index 293dbc1a95..ca105ec559 100644 > --- a/docs/misc/xen-command-line.pandoc > +++ b/docs/misc/xen-command-line.pandoc > @@ -1708,6 +1708,45 @@ This option is intended for debugging purposes only. Enable MSR_DEBUGCTL.LBR > in hypervisor context to be able to dump the Last Interrupt/Exception To/From > record with other registers. > > +### llc-coloring (arm64) > +> `= ` > + > +> Default: `false` > + > +Flag to enable or disable LLC coloring support at runtime. This option is > +available only when `CONFIG_LLC_COLORING` is enabled. See the general > +cache coloring documentation for more info. > + > +### llc-nr-ways (arm64) > +> `= ` > + > +> Default: `Obtained from hardware` > + > +Specify the number of ways of the Last Level Cache. This option is available > +only when `CONFIG_LLC_COLORING` is enabled. LLC size and number of ways are used > +to find the number of supported cache colors. By default the value is > +automatically computed by probing the hardware, but in case of specific needs, > +it can be manually set. Those include failing probing and debugging/testing > +purposes so that it's possible to emulate platforms with different number of > +supported colors. If set, also "llc-size" must be set, otherwise the default > +will be used. Note that using both options implies "llc-coloring=on" unless an > +earlier "llc-coloring=off" is there. > + > +### llc-size (arm64) > +> `= ` > + > +> Default: `Obtained from hardware` > + > +Specify the size of the Last Level Cache. This option is available only when > +`CONFIG_LLC_COLORING` is enabled. LLC size and number of ways are used to find > +the number of supported cache colors. By default the value is automatically > +computed by probing the hardware, but in case of specific needs, it can be > +manually set. Those include failing probing and debugging/testing purposes so > +that it's possible to emulate platforms with different number of supported > +colors. If set, also "llc-nr-ways" must be set, otherwise the default will be > +used. Note that using both options implies "llc-coloring=on" unless an > +earlier "llc-coloring=off" is there. > + > ### lock-depth-size > > `= ` > > diff --git a/xen/common/Kconfig b/xen/common/Kconfig > index 90268d9249..b4ec6893be 100644 > --- a/xen/common/Kconfig > +++ b/xen/common/Kconfig > @@ -71,6 +71,9 @@ config HAS_IOPORTS > config HAS_KEXEC > bool > > +config HAS_LLC_COLORING > + bool > + > config HAS_PIRQ > bool > > @@ -516,4 +519,22 @@ config TRACEBUFFER > to be collected at run time for debugging or performance analysis. > Memory and execution overhead when not active is minimal. > > +config LLC_COLORING > + bool "Last Level Cache (LLC) coloring" if EXPERT > + depends on HAS_LLC_COLORING > + > +config LLC_COLORS_ORDER > + int "Maximum number of LLC colors (base-2 exponent)" > + range 1 10 > + default 7 > + depends on LLC_COLORING > + help > + Controls the build-time size of various arrays associated with LLC > + coloring. The value is a base-2 exponent. Refer to cache coloring > + documentation for how to compute the number of colors supported by the > + platform. This is only an upper bound. The runtime value is autocomputed > + or manually set via cmdline parameters. > + The default value corresponds to an 8 MiB 16-ways LLC, which should be > + more than what's needed in the general case. > + > endmenu > diff --git a/xen/common/Makefile b/xen/common/Makefile > index b279b09bfb..cba3b32733 100644 > --- a/xen/common/Makefile > +++ b/xen/common/Makefile > @@ -25,6 +25,7 @@ obj-y += keyhandler.o > obj-$(CONFIG_KEXEC) += kexec.o > obj-$(CONFIG_KEXEC) += kimage.o > obj-$(CONFIG_LIVEPATCH) += livepatch.o livepatch_elf.o > +obj-$(CONFIG_LLC_COLORING) += llc-coloring.o > obj-$(CONFIG_MEM_ACCESS) += mem_access.o > obj-y += memory.o > obj-y += multicall.o > diff --git a/xen/common/keyhandler.c b/xen/common/keyhandler.c > index 6da291b34e..6ea54838d4 100644 > --- a/xen/common/keyhandler.c > +++ b/xen/common/keyhandler.c > @@ -5,6 +5,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -304,6 +305,8 @@ static void cf_check dump_domains(unsigned char key) > > arch_dump_domain_info(d); > > + domain_dump_llc_colors(d); > + > rangeset_domain_printk(d); > > dump_pageframe_info(d); > diff --git a/xen/common/llc-coloring.c b/xen/common/llc-coloring.c > new file mode 100644 > index 0000000000..335a907296 > --- /dev/null > +++ b/xen/common/llc-coloring.c > @@ -0,0 +1,124 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * Last Level Cache (LLC) coloring common code > + * > + * Copyright (C) 2024, Advanced Micro Devices, Inc. > + * Copyright (C) 2024, Minerva Systems SRL > + */ > +#include > +#include > +#include > + > +#define NR_LLC_COLORS (1U << CONFIG_LLC_COLORS_ORDER) > + > +/* > + * -1: not specified (disabled unless llc-size and llc-nr-ways present) > + * 0: explicitly disabled through cmdline > + * 1: explicitly enabled through cmdline > + */ > +static int8_t __initdata opt_llc_coloring = -1; > +boolean_param("llc-coloring", opt_llc_coloring); > + > +static bool __ro_after_init llc_coloring_enabled; > + > +static unsigned int __initdata llc_size; > +size_param("llc-size", llc_size); > +static unsigned int __initdata llc_nr_ways; > +integer_param("llc-nr-ways", llc_nr_ways); > +/* Number of colors available in the LLC */ > +static unsigned int __ro_after_init max_nr_colors; > + > +static void print_colors(const unsigned int colors[], unsigned int num_colors) > +{ > + unsigned int i; > + > + printk("{ "); > + for ( i = 0; i < num_colors; i++ ) > + { > + unsigned int start = colors[i], end = start; > + > + printk("%u", start); > + > + for ( ; i < num_colors - 1 && end + 1 == colors[i + 1]; i++, end++ ) > + ; > + > + if ( start != end ) > + printk("-%u", end); > + > + if ( i < num_colors - 1 ) > + printk(", "); > + } > + printk(" }\n"); > +} > + > +void __init llc_coloring_init(void) > +{ > + unsigned int way_size; > + > + llc_coloring_enabled = (opt_llc_coloring >= 1); > + if ( (opt_llc_coloring != 0) && llc_size && llc_nr_ways ) > + { > + llc_coloring_enabled = true; > + way_size = llc_size / llc_nr_ways; > + } > + else if ( !llc_coloring_enabled ) > + return; > + else > + { > + way_size = get_llc_way_size(); > + if ( !way_size ) > + panic("LLC probing failed and 'llc-size' or 'llc-nr-ways' missing\n"); As far as I can see, this error means that we did not detect a suitable LLC/unified cache. Maybe it would be better to make that explicit in the panic message. Best regards, Mykola > + } > + > + if ( way_size & ~PAGE_MASK ) > + panic("LLC way size must be a multiple of PAGE_SIZE\n"); > + > + /* > + * The maximum number of colors must be a power of 2 in order to correctly > + * map them to bits of an address. > + */ > + max_nr_colors = way_size >> PAGE_SHIFT; > + > + if ( max_nr_colors & (max_nr_colors - 1) ) > + panic("Number of LLC colors (%u) isn't a power of 2\n", max_nr_colors); > + > + if ( max_nr_colors > NR_LLC_COLORS ) > + { > + printk(XENLOG_WARNING > + "Number of LLC colors (%u) too big. Using configured max %u\n", > + max_nr_colors, NR_LLC_COLORS); > + max_nr_colors = NR_LLC_COLORS; > + } > + else if ( max_nr_colors < 2 ) > + panic("Number of LLC colors %u < 2\n", max_nr_colors); > + > + arch_llc_coloring_init(); > +} > + > +void dump_llc_coloring_info(void) > +{ > + if ( !llc_coloring_enabled ) > + return; > + > + printk("LLC coloring info:\n"); > + printk(" Number of LLC colors supported: %u\n", max_nr_colors); > +} > + > +void domain_dump_llc_colors(const struct domain *d) > +{ > + if ( !llc_coloring_enabled ) > + return; > + > + printk("%u LLC colors: ", d->num_llc_colors); > + print_colors(d->llc_colors, d->num_llc_colors); > +} > + > +/* > + * Local variables: > + * mode: C > + * c-file-style: "BSD" > + * c-basic-offset: 4 > + * tab-width: 4 > + * indent-tabs-mode: nil > + * End: > + */ > diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c > index 1f424333db..da505a79f6 100644 > --- a/xen/common/page_alloc.c > +++ b/xen/common/page_alloc.c > @@ -126,6 +126,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -2647,6 +2648,8 @@ static void cf_check pagealloc_info(unsigned char key) > } > > printk(" Dom heap: %lukB free\n", total << (PAGE_SHIFT-10)); > + > + dump_llc_coloring_info(); > } > > static __init int cf_check pagealloc_keyhandler_init(void) > diff --git a/xen/include/xen/llc-coloring.h b/xen/include/xen/llc-coloring.h > new file mode 100644 > index 0000000000..0acd8d0ad6 > --- /dev/null > +++ b/xen/include/xen/llc-coloring.h > @@ -0,0 +1,36 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * Last Level Cache (LLC) coloring common header > + * > + * Copyright (C) 2024, Advanced Micro Devices, Inc. > + * Copyright (C) 2024, Minerva Systems SRL > + */ > +#ifndef __XEN_LLC_COLORING_H__ > +#define __XEN_LLC_COLORING_H__ > + > +struct domain; > + > +#ifdef CONFIG_LLC_COLORING > +void llc_coloring_init(void); > +void dump_llc_coloring_info(void); > +void domain_dump_llc_colors(const struct domain *d); > +#else > +static inline void llc_coloring_init(void) {} > +static inline void dump_llc_coloring_info(void) {} > +static inline void domain_dump_llc_colors(const struct domain *d) {} > +#endif > + > +unsigned int get_llc_way_size(void); > +void arch_llc_coloring_init(void); > + > +#endif /* __XEN_LLC_COLORING_H__ */ > + > +/* > + * Local variables: > + * mode: C > + * c-file-style: "BSD" > + * c-basic-offset: 4 > + * tab-width: 4 > + * indent-tabs-mode: nil > + * End: > + */ > diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h > index 711668e028..037c83fda2 100644 > --- a/xen/include/xen/sched.h > +++ b/xen/include/xen/sched.h > @@ -640,6 +640,11 @@ struct domain > > /* Holding CDF_* constant. Internal flags for domain creation. */ > unsigned int cdf; > + > +#ifdef CONFIG_LLC_COLORING > + unsigned int num_llc_colors; > + const unsigned int *llc_colors; > +#endif > }; > > static inline struct page_list_head *page_to_list( From xen-devel-bounces@lists.xenproject.org Fri Nov 07 08:29:08 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 07 Nov 2025 08:29:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157388.1486198 (Exim 4.92) (envelope-from ) id 1vHHqB-0004Kk-22; Fri, 07 Nov 2025 08:29:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157388.1486198; Fri, 07 Nov 2025 08:29:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHHqA-0004Kd-Va; Fri, 07 Nov 2025 08:29:02 +0000 Received: by outflank-mailman (input) for mailman id 1157388; Fri, 07 Nov 2025 08:29:01 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHHq9-0003eW-Bm for xen-devel@lists.xenproject.org; Fri, 07 Nov 2025 08:29:01 +0000 Received: from mail-ed1-x52b.google.com (mail-ed1-x52b.google.com [2a00:1450:4864:20::52b]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id cf85e724-bbb3-11f0-9d17-b5c5bf9af7f9; Fri, 07 Nov 2025 09:29:00 +0100 (CET) Received: by mail-ed1-x52b.google.com with SMTP id 4fb4d7f45d1cf-640ca678745so854202a12.2 for ; Fri, 07 Nov 2025 00:29:00 -0800 (PST) Received: from [192.168.50.2] (pool185-5-253-110.as6723.net. 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On 17/12/2024 19:06, Carlo Nonato wrote: > LLC coloring needs to know the last level cache layout in order to make the > best use of it. This can be probed by inspecting the CLIDR_EL1 register, > so the Last Level is defined as the last level visible by this register. > Note that this excludes system caches in some platforms. > > Static memory allocation and cache coloring are incompatible because static > memory can't be guaranteed to use only colors assigned to the domain. > Panic during DomUs creation when both are enabled. > > Based on original work from: Luca Miccio > > Signed-off-by: Carlo Nonato > Signed-off-by: Marco Solieri > Reviewed-by: Michal Orzel > Acked-by: Jan Beulich > --- > v13: > - no changes > v12: > - fixed build errors > v11: > - removed useless #define from processor.h > v10: > - moved CONFIG_NUMA check in arch/arm/Kconfig > v9: > - no changes > v8: > - no changes > v7: > - only minor changes > v6: > - get_llc_way_size() now checks for at least separate I/D caches > v5: > - used - instead of _ for filenames > - moved static-mem check in this patch > - moved dom0 colors parsing in next patch > - moved color allocation and configuration in next patch > - moved check_colors() in next patch > - colors are now printed in short form > v4: > - added "llc-coloring" cmdline option for the boot-time switch > - dom0 colors are now checked during domain init as for any other domain > - fixed processor.h masks bit width > - check for overflow in parse_color_config() > - check_colors() now checks also that colors are sorted and unique > --- > docs/misc/cache-coloring.rst | 14 +++++ > xen/arch/arm/Kconfig | 1 + > xen/arch/arm/Makefile | 1 + > xen/arch/arm/dom0less-build.c | 6 +++ > xen/arch/arm/include/asm/processor.h | 15 ++++++ > xen/arch/arm/llc-coloring.c | 79 ++++++++++++++++++++++++++++ > xen/arch/arm/setup.c | 3 ++ > xen/common/llc-coloring.c | 4 +- > xen/include/xen/llc-coloring.h | 6 +++ > 9 files changed, 128 insertions(+), 1 deletion(-) > create mode 100644 xen/arch/arm/llc-coloring.c > > diff --git a/docs/misc/cache-coloring.rst b/docs/misc/cache-coloring.rst > index 371f21a0e7..12972dbb2c 100644 > --- a/docs/misc/cache-coloring.rst > +++ b/docs/misc/cache-coloring.rst > @@ -113,6 +113,20 @@ Auto-probing of LLC specs > > LLC size and number of ways are probed automatically by default. > > +In the Arm implementation, this is done by inspecting the CLIDR_EL1 register. > +This means that other system caches that aren't visible there are ignored. > + > LLC specs can be manually set via the above command line parameters. This > bypasses any auto-probing and it's used to overcome failing situations, such as > flawed probing logic, or for debugging/testing purposes. > + > +Known issues and limitations > +**************************** > + > +"xen,static-mem" isn't supported when coloring is enabled > +######################################################### > + > +In the domain configuration, "xen,static-mem" allows memory to be statically > +allocated to the domain. This isn't possible when LLC coloring is enabled, > +because that memory can't be guaranteed to use only colors assigned to the > +domain. > diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig > index 604aba4996..c5e7b74733 100644 > --- a/xen/arch/arm/Kconfig > +++ b/xen/arch/arm/Kconfig > @@ -8,6 +8,7 @@ config ARM_64 > depends on !ARM_32 > select 64BIT > select HAS_FAST_MULTIPLY > + select HAS_LLC_COLORING if !NUMA > > config ARM > def_bool y > diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile > index e4ad1ce851..ccbfc61f88 100644 > --- a/xen/arch/arm/Makefile > +++ b/xen/arch/arm/Makefile > @@ -35,6 +35,7 @@ obj-$(CONFIG_IOREQ_SERVER) += ioreq.o > obj-y += irq.o > obj-y += kernel.init.o > obj-$(CONFIG_LIVEPATCH) += livepatch.o > +obj-$(CONFIG_LLC_COLORING) += llc-coloring.o > obj-$(CONFIG_MEM_ACCESS) += mem_access.o > obj-y += mm.o > obj-y += monitor.o > diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c > index f328a044e9..d93a85434e 100644 > --- a/xen/arch/arm/dom0less-build.c > +++ b/xen/arch/arm/dom0less-build.c > @@ -5,6 +5,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -890,7 +891,12 @@ void __init create_domUs(void) > panic("No more domain IDs available\n"); > > if ( dt_find_property(node, "xen,static-mem", NULL) ) > + { > + if ( llc_coloring_enabled ) > + panic("LLC coloring and static memory are incompatible\n"); > + > flags |= CDF_staticmem; > + } > > if ( dt_property_read_bool(node, "direct-map") ) > { > diff --git a/xen/arch/arm/include/asm/processor.h b/xen/arch/arm/include/asm/processor.h > index 8e02410465..60b587db69 100644 > --- a/xen/arch/arm/include/asm/processor.h > +++ b/xen/arch/arm/include/asm/processor.h > @@ -18,6 +18,21 @@ > #define CTR_IDC_SHIFT 28 > #define CTR_DIC_SHIFT 29 > > +/* CCSIDR Current Cache Size ID Register */ > +#define CCSIDR_LINESIZE_MASK _AC(0x7, UL) > +#define CCSIDR_NUMSETS_SHIFT 13 > +#define CCSIDR_NUMSETS_MASK _AC(0x3fff, UL) > +#define CCSIDR_NUMSETS_SHIFT_FEAT_CCIDX 32 > +#define CCSIDR_NUMSETS_MASK_FEAT_CCIDX _AC(0xffffff, UL) > + > +/* CSSELR Cache Size Selection Register */ > +#define CSSELR_LEVEL_SHIFT 1 > + > +/* CLIDR Cache Level ID Register */ > +#define CLIDR_CTYPEn_SHIFT(n) (3 * ((n) - 1)) > +#define CLIDR_CTYPEn_MASK _AC(0x7, UL) > +#define CLIDR_CTYPEn_LEVELS 7 > + > #define ICACHE_POLICY_VPIPT 0 > #define ICACHE_POLICY_AIVIVT 1 > #define ICACHE_POLICY_VIPT 2 > diff --git a/xen/arch/arm/llc-coloring.c b/xen/arch/arm/llc-coloring.c > new file mode 100644 > index 0000000000..1c7b92bc45 > --- /dev/null > +++ b/xen/arch/arm/llc-coloring.c > @@ -0,0 +1,79 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * Last Level Cache (LLC) coloring support for ARM > + * > + * Copyright (C) 2024, Advanced Micro Devices, Inc. > + * Copyright (C) 2024, Minerva Systems SRL > + */ > +#include > +#include > + > +#include > +#include > +#include > + > +/* Return the LLC way size by probing the hardware */ > +unsigned int __init get_llc_way_size(void) > +{ > + register_t ccsidr_el1; > + register_t clidr_el1 = READ_SYSREG(CLIDR_EL1); > + register_t csselr_el1 = READ_SYSREG(CSSELR_EL1); > + register_t id_aa64mmfr2_el1 = READ_SYSREG(ID_AA64MMFR2_EL1); > + uint32_t ccsidr_numsets_shift = CCSIDR_NUMSETS_SHIFT; > + uint32_t ccsidr_numsets_mask = CCSIDR_NUMSETS_MASK; > + unsigned int n, line_size, num_sets; > + > + for ( n = CLIDR_CTYPEn_LEVELS; n != 0; n-- ) According to the Arm ARM (DDI 0487J.a, D19.2.27): If software reads the Cache Type fields from Ctype1 upwards, once it has seen a value of 000, no caches that can be managed using the architected cache maintenance instructions that operate by set/way exist at further-out levels of the hierarchy. So, for example, if Ctype3 is the first Cache Type field with a value of 000, the values of Ctype4 to Ctype7 must be ignored. Shouldn’t we read the Cache Type fields from the first index upwards and stop at the first 0b000, instead of iterating in reverse? Best regards, Mykola > + { > + uint8_t ctype_n = (clidr_el1 >> CLIDR_CTYPEn_SHIFT(n)) & > + CLIDR_CTYPEn_MASK; > + > + /* Unified cache (see Arm ARM DDI 0487J.a D19.2.27) */ > + if ( ctype_n == 0b100 ) > + break; > + } > + > + if ( n == 0 ) > + return 0; > + > + WRITE_SYSREG((n - 1) << CSSELR_LEVEL_SHIFT, CSSELR_EL1); > + isb(); > + > + ccsidr_el1 = READ_SYSREG(CCSIDR_EL1); > + > + /* Arm ARM: (Log2(Number of bytes in cache line)) - 4 */ > + line_size = 1U << ((ccsidr_el1 & CCSIDR_LINESIZE_MASK) + 4); > + > + /* If FEAT_CCIDX is enabled, CCSIDR_EL1 has a different bit layout */ > + if ( (id_aa64mmfr2_el1 >> ID_AA64MMFR2_CCIDX_SHIFT) & 0x7 ) > + { > + ccsidr_numsets_shift = CCSIDR_NUMSETS_SHIFT_FEAT_CCIDX; > + ccsidr_numsets_mask = CCSIDR_NUMSETS_MASK_FEAT_CCIDX; > + } > + > + /* Arm ARM: (Number of sets in cache) - 1 */ > + num_sets = ((ccsidr_el1 >> ccsidr_numsets_shift) & ccsidr_numsets_mask) + 1; > + > + printk(XENLOG_INFO "LLC found: L%u (line size: %u bytes, sets num: %u)\n", > + n, line_size, num_sets); > + > + /* Restore value in CSSELR_EL1 */ > + WRITE_SYSREG(csselr_el1, CSSELR_EL1); > + isb(); > + > + return line_size * num_sets; > +} > + > +void __init arch_llc_coloring_init(void) > +{ > +} > + > +/* > + * Local variables: > + * mode: C > + * c-file-style: "BSD" > + * c-basic-offset: 4 > + * tab-width: 4 > + * indent-tabs-mode: nil > + * End: > + */ > diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c > index 545702d8a3..5f1993ffed 100644 > --- a/xen/arch/arm/setup.c > +++ b/xen/arch/arm/setup.c > @@ -12,6 +12,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -334,6 +335,8 @@ void asmlinkage __init start_xen(unsigned long fdt_paddr) > printk("Command line: %s\n", cmdline); > cmdline_parse(cmdline); > > + llc_coloring_init(); > + > setup_mm(); > > vm_init(); > diff --git a/xen/common/llc-coloring.c b/xen/common/llc-coloring.c > index 335a907296..b034c0169c 100644 > --- a/xen/common/llc-coloring.c > +++ b/xen/common/llc-coloring.c > @@ -8,6 +8,8 @@ > #include > #include > #include > +#include > +#include > > #define NR_LLC_COLORS (1U << CONFIG_LLC_COLORS_ORDER) > > @@ -19,7 +21,7 @@ > static int8_t __initdata opt_llc_coloring = -1; > boolean_param("llc-coloring", opt_llc_coloring); > > -static bool __ro_after_init llc_coloring_enabled; > +bool __ro_after_init llc_coloring_enabled; > > static unsigned int __initdata llc_size; > size_param("llc-size", llc_size); > diff --git a/xen/include/xen/llc-coloring.h b/xen/include/xen/llc-coloring.h > index 0acd8d0ad6..a3ebb17186 100644 > --- a/xen/include/xen/llc-coloring.h > +++ b/xen/include/xen/llc-coloring.h > @@ -8,13 +8,19 @@ > #ifndef __XEN_LLC_COLORING_H__ > #define __XEN_LLC_COLORING_H__ > > +#include > + > struct domain; > > #ifdef CONFIG_LLC_COLORING > +extern bool llc_coloring_enabled; > + > void llc_coloring_init(void); > void dump_llc_coloring_info(void); > void domain_dump_llc_colors(const struct domain *d); > #else > +#define llc_coloring_enabled false > + > static inline void llc_coloring_init(void) {} > static inline void dump_llc_coloring_info(void) {} > static inline void domain_dump_llc_colors(const struct domain *d) {} From xen-devel-bounces@lists.xenproject.org Fri Nov 07 08:29:08 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 07 Nov 2025 08:29:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157385.1486169 (Exim 4.92) (envelope-from ) id 1vHHq7-0003eo-7t; Fri, 07 Nov 2025 08:28:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157385.1486169; Fri, 07 Nov 2025 08:28:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHHq7-0003eh-3w; Fri, 07 Nov 2025 08:28:59 +0000 Received: by outflank-mailman (input) for mailman id 1157385; Fri, 07 Nov 2025 08:28:57 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHHq5-0003eW-Ip for xen-devel@lists.xenproject.org; Fri, 07 Nov 2025 08:28:57 +0000 Received: from mail-ej1-x633.google.com (mail-ej1-x633.google.com [2a00:1450:4864:20::633]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id ccb1927c-bbb3-11f0-9d17-b5c5bf9af7f9; Fri, 07 Nov 2025 09:28:55 +0100 (CET) Received: by mail-ej1-x633.google.com with SMTP id a640c23a62f3a-b72cbc24637so63920666b.0 for ; Fri, 07 Nov 2025 00:28:55 -0800 (PST) Received: from [192.168.50.2] (pool185-5-253-110.as6723.net. [185.5.253.110]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b72bdbcaeaasm186291766b.1.2025.11.07.00.28.52 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 07 Nov 2025 00:28:53 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: ccb1927c-bbb3-11f0-9d17-b5c5bf9af7f9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1762504135; x=1763108935; darn=lists.xenproject.org; h=content-transfer-encoding:in-reply-to:content-language:references :cc:to:subject:from:user-agent:mime-version:date:message-id:from:to :cc:subject:date:message-id:reply-to; bh=YEUW8XrmLDdFp+BWOltCb0wOwjstWnLhv+pmruOk46I=; b=FpCLy004ffywHcK7ybjZMjjNa8F6etx/qYd5IG5VKVIdSp2cAbL9GHuliiuGno97y+ Gv6GiRZbmk+bsjSoY1q+tQbpC+T4YGXGKe6XE4iC0l9q+a0FrCgZOg3qOoPbKznaBEiz IRXtLgXsB7PRhrQpHhGcI+Zq+UA0hQJx8E5tyZ2XxV//eo6zVU7ARIc2LpGXmySvDVFU 1+G2wXgNIVMNAkJKg5HI+sCc17K/8djHvXF9crQr0/lhY9r96D0iIxEgGmWpAOfIRcsL WUNoNn4GxAAsHpixhGHP32U+1hj+gCLts6IWXzXQv3RlLCXHUguNAtWGcBE/9Ra0zExf GKog== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1762504135; x=1763108935; h=content-transfer-encoding:in-reply-to:content-language:references :cc:to:subject:from:user-agent:mime-version:date:message-id:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=YEUW8XrmLDdFp+BWOltCb0wOwjstWnLhv+pmruOk46I=; b=K+xZfqIoTWrzPElbQPpf79hM7HfIszzP/DWDcXC94vFj4NU60LPsEX6gT6nWwHNccb wGqUvvoClWrMJ4Z8H75vGELnLuCzLvuyFqJFpO3R+xR3wGsUbJLOSyuiwJvgvt5RVimw LWYA1wIloTztUTqqr9Wqbb4Q1iz+v9pDzSeDVVQRsCUJp6Ai8eb7jhvzinOtv5osZFPl JhVaiSIOIzadNZgo62D+YxBrSUZhE9l4UZgMehRuhqgi0XZobnTnfFQQdMiauqMuZeCp QIijK8hSYzw/aQgbi2nXZHI2S/f1FmBGtrElGH93PAKifEiLpay6nT/j7Abq+kJWogdy GTJg== X-Forwarded-Encrypted: i=1; AJvYcCX9Cv81ji9YV0a2CZ3b7pcl4DyCk9ETFBLOo2BQZZ9FtWDAiYLnr9R8/zdHRTp1PdPant4cibPs4JE=@lists.xenproject.org X-Gm-Message-State: AOJu0YzFpjYXo6ulhGXcMB99rKjH3uhSPXegeoaqGq/b7QK0I7bqP5sl vMrVokqsZ93tz+G93+Wwiuvsa7IaP6UZsuCnf9kKbZXnACEd/aSiae/v X-Gm-Gg: ASbGncvtkI/ww2AVwgCqX95iRypllPnPDrBISo6z1aWXI1CxhB/8I2sy3d/SqUpbBN7 guMePgDlf8s5nfYgL3kTcpLOBcWksoUZ3xU80DbUvqY99hdHGqXxJRnLMskGR+ZTO1B569M1TNC jV6PCAaKzkqa7YXneoYsy+veU8oDMef9EXIHy4VG7hcIe21KyFr9icDxIchp3taJInrdC/XqKbX WjWDZRMBGZX4/JN6XkGYiTV4UOjR7yi00p7sVCXEvZP5PGbzXp4dOL1bGZIu1aVpaakBDIy72R/ LIQKBc+cK0bFa3esn2KadifwClxwBIXZajMlalyCF48MdAAs9qegbY57Y4KUbiIBCCkjjbfrOWb KcR7RxXZYjT6RdpNaObZAVw//ohZqdguPaukR/0UJvCk0Ihxph9BqeNbupDo74D4wL9KHy7A54n RtjW+cNR+HsI4S3ZY1XSzyxIKWWsmXOsFO8Jc= X-Google-Smtp-Source: AGHT+IGuEKKvUOH/3FDG1PPCofOzzeHdsMEsIJwK7d8mHgsi+nVoMOOQBNHxEPfqbANPxDwmwrxLZw== X-Received: by 2002:a17:907:9627:b0:b72:56ad:c9c0 with SMTP id a640c23a62f3a-b72c078d329mr242774966b.17.1762504134733; Fri, 07 Nov 2025 00:28:54 -0800 (PST) Message-ID: Date: Fri, 7 Nov 2025 10:26:38 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Mykola Kvach Subject: Re: [PATCH v13 04/12] xen/arm: add Dom0 cache coloring support To: Carlo Nonato , xen-devel@lists.xenproject.org Cc: andrea.bastoni@minervasys.tech, marco.solieri@minervasys.tech, Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Bertrand Marquis , Volodymyr Babchuk References: <20241217170637.233097-1-carlo.nonato@minervasys.tech> <20241217170637.233097-5-carlo.nonato@minervasys.tech> Content-Language: en-US In-Reply-To: <20241217170637.233097-5-carlo.nonato@minervasys.tech> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi Carlo, Thank you for the patch. On 17/12/2024 19:06, Carlo Nonato wrote: > Add a command line parameter to allow the user to set the coloring > configuration for Dom0. > A common configuration syntax for cache colors is introduced and > documented. > Take the opportunity to also add: > - default configuration notion. > - function to check well-formed configurations. > > Direct mapping Dom0 isn't possible when coloring is enabled, so > CDF_directmap flag is removed when creating it. > > Based on original work from: Luca Miccio > > Signed-off-by: Carlo Nonato > Signed-off-by: Marco Solieri > Reviewed-by: Jan Beulich > Reviewed-by: Michal Orzel > --- > v13: > - no changes > v12: > - no changes > v11: > - minor changes > v10: > - fixed array type for colors parameter in check_colors() > v9: > - moved domain_llc_coloring_free() in next patch cause it's never used for dom0 > v8: > - added bound check on dom0_num_colors > - default colors array set just once > v7: > - parse_color_config() doesn't accept leading/trailing commas anymore > - removed alloc_colors() helper > v6: > - moved domain_llc_coloring_free() in this patch > - removed domain_alloc_colors() in favor of a more explicit allocation > - parse_color_config() now accepts the size of the array to be filled > - allocate_memory() moved in another patch > v5: > - Carlo Nonato as the new author > - moved dom0 colors parsing (parse_colors()) in this patch > - added dom0_set_llc_colors() to set dom0 colors after creation > - moved color allocation and checking in this patch > - error handling when allocating color arrays > - FIXME: copy pasted allocate_memory() cause it got moved > v4: > - dom0 colors are dynamically allocated as for any other domain > (colors are duplicated in dom0_colors and in the new array, but logic > is simpler) > --- > docs/misc/cache-coloring.rst | 29 ++++++++ > docs/misc/xen-command-line.pandoc | 9 +++ > xen/arch/arm/domain_build.c | 9 ++- > xen/common/llc-coloring.c | 120 +++++++++++++++++++++++++++++- > xen/include/xen/llc-coloring.h | 1 + > 5 files changed, 166 insertions(+), 2 deletions(-) > > diff --git a/docs/misc/cache-coloring.rst b/docs/misc/cache-coloring.rst > index 12972dbb2c..7b47d0ed92 100644 > --- a/docs/misc/cache-coloring.rst > +++ b/docs/misc/cache-coloring.rst > @@ -107,6 +107,35 @@ Specific documentation is available at `docs/misc/xen-command-line.pandoc`. > +----------------------+-------------------------------+ > | ``llc-nr-ways`` | Set the LLC number of ways | > +----------------------+-------------------------------+ > +| ``dom0-llc-colors`` | Dom0 color configuration | > ++----------------------+-------------------------------+ > + > +Colors selection format > +*********************** > + > +Regardless of the memory pool that has to be colored (Xen, Dom0/DomUs), > +the color selection can be expressed using the same syntax. In particular a > +comma-separated list of colors or ranges of colors is used. > +Ranges are hyphen-separated intervals (such as `0-4`) and are inclusive on both > +sides. > + > +Note that: > + > +- no spaces are allowed between values. > +- no overlapping ranges or duplicated colors are allowed. > +- values must be written in ascending order. Should this requirement also be stated for the color list configuration parameters for Dom0, Xen, and DomUs? > + > +Examples: > + > ++-------------------+-----------------------------+ > +| **Configuration** | **Actual selection** | > ++-------------------+-----------------------------+ > +| 1-2,5-8 | [1, 2, 5, 6, 7, 8] | > ++-------------------+-----------------------------+ > +| 4-8,10,11,12 | [4, 5, 6, 7, 8, 10, 11, 12] | > ++-------------------+-----------------------------+ > +| 0 | [0] | > ++-------------------+-----------------------------+ > > Auto-probing of LLC specs > ######################### > diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc > index ca105ec559..be70d6af61 100644 > --- a/docs/misc/xen-command-line.pandoc > +++ b/docs/misc/xen-command-line.pandoc > @@ -963,6 +963,15 @@ Controls for the dom0 IOMMU setup. > > Specify a list of IO ports to be excluded from dom0 access. > > +### dom0-llc-colors (arm64) > +> `= List of [ | - ]` > + > +> Default: `All available LLC colors` > + > +Specify dom0 LLC color configuration. This option is available only when > +`CONFIG_LLC_COLORING` is enabled. If the parameter is not set, all available > +colors are used. > + > ### dom0_max_vcpus > > Either: > diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c > index 17cc76b6f2..b072a16249 100644 > --- a/xen/arch/arm/domain_build.c > +++ b/xen/arch/arm/domain_build.c > @@ -2356,6 +2356,7 @@ void __init create_dom0(void) > .max_maptrack_frames = -1, > .grant_opts = XEN_DOMCTL_GRANT_version(opt_gnttab_max_version), > }; > + unsigned int flags = CDF_privileged; > int rc; > > /* The vGIC for DOM0 is exactly emulating the hardware GIC */ > @@ -2383,10 +2384,16 @@ void __init create_dom0(void) > panic("SVE vector length error\n"); > } > > - dom0 = domain_create(0, &dom0_cfg, CDF_privileged | CDF_directmap); > + if ( !llc_coloring_enabled ) > + flags |= CDF_directmap; > + > + dom0 = domain_create(0, &dom0_cfg, flags); > if ( IS_ERR(dom0) ) > panic("Error creating domain 0 (rc = %ld)\n", PTR_ERR(dom0)); > > + if ( llc_coloring_enabled && (rc = dom0_set_llc_colors(dom0)) ) > + panic("Error initializing LLC coloring for domain 0 (rc = %d)\n", rc); > + > if ( alloc_dom0_vcpu0(dom0) == NULL ) > panic("Error creating domain 0 vcpu0\n"); > > diff --git a/xen/common/llc-coloring.c b/xen/common/llc-coloring.c > index b034c0169c..5984ae82e7 100644 > --- a/xen/common/llc-coloring.c > +++ b/xen/common/llc-coloring.c > @@ -29,6 +29,66 @@ static unsigned int __initdata llc_nr_ways; > integer_param("llc-nr-ways", llc_nr_ways); > /* Number of colors available in the LLC */ > static unsigned int __ro_after_init max_nr_colors; > +/* Default coloring configuration */ > +static unsigned int __ro_after_init default_colors[NR_LLC_COLORS]; > + > +static unsigned int __initdata dom0_colors[NR_LLC_COLORS]; > +static unsigned int __initdata dom0_num_colors; > + > +/* > + * Parse the coloring configuration given in the buf string, following the > + * syntax below. > + * > + * COLOR_CONFIGURATION ::= COLOR | RANGE,...,COLOR | RANGE > + * RANGE ::= COLOR-COLOR Configurations like ",COLOR | RANGE,...", interpreted as: "0,COLOR | RANGE,..." and "-10,COLOR | RANGE,...", interpreted as: "0-10,COLOR | RANGE,..." also seem to be accepted. If this is intentional, it might be worth documenting these shorthand forms here. > + * > + * Example: "0,2-6,15-16" represents the set of colors: 0,2,3,4,5,6,15,16. > + */ > +static int __init parse_color_config(const char *buf, unsigned int colors[], > + unsigned int max_num_colors, > + unsigned int *num_colors) > +{ > + const char *s = buf; > + > + *num_colors = 0; > + > + while ( *s != '\0' ) > + { > + unsigned int color, start, end; > + > + start = simple_strtoul(s, &s, 0); Since simple_strtoul(..., 0) accepts decimal, octal (0 prefix), and hexadecimal (0x prefix), should we document that these formats are also allowed for color values? > + > + if ( *s == '-' ) /* Range */ > + { > + s++; > + end = simple_strtoul(s, &s, 0); > + } > + else /* Single value */ > + end = start; > + > + if ( start > end || (end - start) > (UINT_MAX - *num_colors) || > + (*num_colors + (end - start)) >= max_num_colors ) > + return -EINVAL; > + > + /* Colors are range checked in check_colors() */ > + for ( color = start; color <= end; color++ ) A range like (UINT_MAX-1)-UINT_MAX would cause this loop to never terminate due to color wrapping around, effectively locking the system during init. > + colors[(*num_colors)++] = color; > + > + if ( *s == ',' ) > + s++; > + else if ( *s != '\0' ) > + break; > + } > + > + return *s ? -EINVAL : 0; In case of a parse error (e.g. [1,w,3-5]), we end up with a partial configuration like [1,0] and num_colors already updated. Should we reject the whole configuration here and reset num_colors (or only update it on success), instead of proceeding with a partially parsed set of colors? Best regards, Mykola > +} > + > +static int __init parse_dom0_colors(const char *s) > +{ > + return parse_color_config(s, dom0_colors, ARRAY_SIZE(dom0_colors), > + &dom0_num_colors); > +} > +custom_param("dom0-llc-colors", parse_dom0_colors); > > static void print_colors(const unsigned int colors[], unsigned int num_colors) > { > @@ -53,9 +113,27 @@ static void print_colors(const unsigned int colors[], unsigned int num_colors) > printk(" }\n"); > } > > +static bool __init check_colors(const unsigned int colors[], > + unsigned int num_colors) > +{ > + unsigned int i; > + > + for ( i = 0; i < num_colors; i++ ) > + { > + if ( colors[i] >= max_nr_colors ) > + { > + printk(XENLOG_ERR "LLC color %u >= %u (max allowed)\n", colors[i], > + max_nr_colors); > + return false; > + } > + } > + > + return true; > +} > + > void __init llc_coloring_init(void) > { > - unsigned int way_size; > + unsigned int way_size, i; > > llc_coloring_enabled = (opt_llc_coloring >= 1); > if ( (opt_llc_coloring != 0) && llc_size && llc_nr_ways ) > @@ -94,6 +172,9 @@ void __init llc_coloring_init(void) > else if ( max_nr_colors < 2 ) > panic("Number of LLC colors %u < 2\n", max_nr_colors); > > + for ( i = 0; i < max_nr_colors; i++ ) > + default_colors[i] = i; > + > arch_llc_coloring_init(); > } > > @@ -115,6 +196,43 @@ void domain_dump_llc_colors(const struct domain *d) > print_colors(d->llc_colors, d->num_llc_colors); > } > > +static void __init domain_set_default_colors(struct domain *d) > +{ > + printk(XENLOG_WARNING > + "LLC color config not found for %pd, using all colors\n", d); > + > + d->llc_colors = default_colors; > + d->num_llc_colors = max_nr_colors; > +} > + > +int __init dom0_set_llc_colors(struct domain *d) > +{ > + typeof(*dom0_colors) *colors; > + > + if ( !dom0_num_colors ) > + { > + domain_set_default_colors(d); > + return 0; > + } > + > + if ( (dom0_num_colors > max_nr_colors) || > + !check_colors(dom0_colors, dom0_num_colors) ) > + { > + printk(XENLOG_ERR "%pd: bad LLC color config\n", d); > + return -EINVAL; > + } > + > + colors = xmalloc_array(typeof(*dom0_colors), dom0_num_colors); > + if ( !colors ) > + return -ENOMEM; > + > + memcpy(colors, dom0_colors, sizeof(*colors) * dom0_num_colors); > + d->llc_colors = colors; > + d->num_llc_colors = dom0_num_colors; > + > + return 0; > +} > + > /* > * Local variables: > * mode: C > diff --git a/xen/include/xen/llc-coloring.h b/xen/include/xen/llc-coloring.h > index a3ebb17186..d29ebeb4c5 100644 > --- a/xen/include/xen/llc-coloring.h > +++ b/xen/include/xen/llc-coloring.h > @@ -28,6 +28,7 @@ static inline void domain_dump_llc_colors(const struct domain *d) {} > > unsigned int get_llc_way_size(void); > void arch_llc_coloring_init(void); > +int dom0_set_llc_colors(struct domain *d); > > #endif /* __XEN_LLC_COLORING_H__ */ > From xen-devel-bounces@lists.xenproject.org Fri Nov 07 08:29:08 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 07 Nov 2025 08:29:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157386.1486175 (Exim 4.92) (envelope-from ) id 1vHHq7-0003hy-IB; Fri, 07 Nov 2025 08:28:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157386.1486175; Fri, 07 Nov 2025 08:28:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHHq7-0003hA-BK; Fri, 07 Nov 2025 08:28:59 +0000 Received: by outflank-mailman (input) for mailman id 1157386; Fri, 07 Nov 2025 08:28:58 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHHq6-0003eW-5o for xen-devel@lists.xenproject.org; Fri, 07 Nov 2025 08:28:58 +0000 Received: from mail-ej1-x630.google.com (mail-ej1-x630.google.com [2a00:1450:4864:20::630]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id cd983019-bbb3-11f0-9d17-b5c5bf9af7f9; Fri, 07 Nov 2025 09:28:57 +0100 (CET) Received: by mail-ej1-x630.google.com with SMTP id a640c23a62f3a-b7272012d30so74360166b.2 for ; Fri, 07 Nov 2025 00:28:57 -0800 (PST) Received: from [192.168.50.2] (pool185-5-253-110.as6723.net. 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On 17/12/2024 19:06, Carlo Nonato wrote: > Add the "llc-colors" Device Tree property to express DomUs and Dom0less > color configurations. > > Based on original work from: Luca Miccio > > Signed-off-by: Carlo Nonato > Signed-off-by: Marco Solieri > Reviewed-by: Jan Beulich # non-Arm > Reviewed-by: Michal Orzel > --- > v13: > - no changes > v12: > - no changes > v11: > - made clear that llc-colors device-tree property is Arm64-only in booting.txt > v10: > - no changes > v9: > - use best-effort allocation in domain_set_llc_colors_from_str() > v8: > - fixed memory leak on error path of domain_set_llc_colors_from_str() > - realloc colors array after parsing from string to reduce memory usage > v7: > - removed alloc_colors() helper usage from domain_set_llc_colors_from_str() > v6: > - rewrote domain_set_llc_colors_from_str() to be more explicit > v5: > - static-mem check has been moved in a previous patch > - added domain_set_llc_colors_from_str() to set colors after domain creation > --- > docs/misc/arm/device-tree/booting.txt | 5 +++ > docs/misc/cache-coloring.rst | 48 +++++++++++++++++++++++++++ > xen/arch/arm/dom0less-build.c | 10 ++++++ > xen/common/llc-coloring.c | 40 ++++++++++++++++++++++ > xen/include/xen/llc-coloring.h | 1 + > xen/include/xen/xmalloc.h | 12 +++++++ > 6 files changed, 116 insertions(+) > > diff --git a/docs/misc/arm/device-tree/booting.txt b/docs/misc/arm/device-tree/booting.txt > index 3a04f5c57f..9c881baccc 100644 > --- a/docs/misc/arm/device-tree/booting.txt > +++ b/docs/misc/arm/device-tree/booting.txt > @@ -162,6 +162,11 @@ with the following properties: > > An integer specifying the number of vcpus to allocate to the guest. > > +- llc-colors > + A string specifying the LLC color configuration for the guest. > + Refer to docs/misc/cache_coloring.rst for syntax. This option is applicable > + only to Arm64 guests. > + > - vpl011 > > An empty property to enable/disable a virtual pl011 for the guest to > diff --git a/docs/misc/cache-coloring.rst b/docs/misc/cache-coloring.rst > index 7b47d0ed92..e097e74032 100644 > --- a/docs/misc/cache-coloring.rst > +++ b/docs/misc/cache-coloring.rst > @@ -14,6 +14,7 @@ If needed, change the maximum number of colors with > ``CONFIG_LLC_COLORS_ORDER=``. > > Runtime configuration is done via `Command line parameters`_. > +For DomUs follow `DomUs configuration`_. > > Background > ********** > @@ -149,6 +150,53 @@ LLC specs can be manually set via the above command line parameters. This > bypasses any auto-probing and it's used to overcome failing situations, such as > flawed probing logic, or for debugging/testing purposes. > > +DomUs configuration > +******************* > + > +DomUs colors can be set either in the ``xl`` configuration file (documentation > +at `docs/man/xl.cfg.pod.5.in`) or via Device Tree (documentation at > +`docs/misc/arm/device-tree/booting.txt`) using the ``llc-colors`` option. > +For example: > + > +:: > + > + xen,xen-bootargs = "console=dtuart dtuart=serial0 dom0_mem=1G dom0_max_vcpus=1 sched=null llc-coloring=on dom0-llc-colors=2-6"; > + xen,dom0-bootargs "console=hvc0 earlycon=xen earlyprintk=xen root=/dev/ram0" > + > + dom0 { > + compatible = "xen,linux-zimage" "xen,multiboot-module"; > + reg = <0x0 0x1000000 0x0 15858176>; > + }; > + > + dom0-ramdisk { > + compatible = "xen,linux-initrd" "xen,multiboot-module"; > + reg = <0x0 0x2000000 0x0 20638062>; > + }; > + > + domU0 { > + #address-cells = <0x1>; > + #size-cells = <0x1>; > + compatible = "xen,domain"; > + memory = <0x0 0x40000>; > + llc-colors = "4-8,10,11,12"; > + cpus = <0x1>; > + vpl011 = <0x1>; > + > + module@2000000 { > + compatible = "multiboot,kernel", "multiboot,module"; > + reg = <0x2000000 0xffffff>; > + bootargs = "console=ttyAMA0"; > + }; > + > + module@30000000 { > + compatible = "multiboot,ramdisk", "multiboot,module"; > + reg = <0x3000000 0xffffff>; > + }; > + }; > + > +**Note:** If no color configuration is provided for a domain, the default one, > +which corresponds to all available colors is used instead. > + > Known issues and limitations > **************************** > > diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c > index 67b1503647..49d1f14d65 100644 > --- a/xen/arch/arm/dom0less-build.c > +++ b/xen/arch/arm/dom0less-build.c > @@ -817,6 +817,7 @@ void __init create_domUs(void) > bool iommu = false; > const struct dt_device_node *cpupool_node, > *chosen = dt_find_node_by_path("/chosen"); > + const char *llc_colors_str = NULL; > > BUG_ON(chosen == NULL); > dt_for_each_child_node(chosen, node) > @@ -965,6 +966,10 @@ void __init create_domUs(void) > #endif > } > > + dt_property_read_string(node, "llc-colors", &llc_colors_str); > + if ( !llc_coloring_enabled && llc_colors_str ) > + panic("'llc-colors' found, but LLC coloring is disabled\n"); > + > /* > * The variable max_init_domid is initialized with zero, so here it's > * very important to use the pre-increment operator to call > @@ -975,6 +980,11 @@ void __init create_domUs(void) > panic("Error creating domain %s (rc = %ld)\n", > dt_node_name(node), PTR_ERR(d)); > > + if ( llc_coloring_enabled && > + (rc = domain_set_llc_colors_from_str(d, llc_colors_str)) ) > + panic("Error initializing LLC coloring for domain %s (rc = %d)\n", > + dt_node_name(node), rc); > + > d->is_console = true; > dt_device_set_used_by(node, d->domain_id); > > diff --git a/xen/common/llc-coloring.c b/xen/common/llc-coloring.c > index 3dd1aaa4df..5a0e3bac59 100644 > --- a/xen/common/llc-coloring.c > +++ b/xen/common/llc-coloring.c > @@ -282,6 +282,46 @@ void domain_llc_coloring_free(struct domain *d) > xfree(__va(__pa(d->llc_colors))); > } > > +int __init domain_set_llc_colors_from_str(struct domain *d, const char *str) > +{ > + int err; > + unsigned int *colors, num_colors; > + > + if ( !str ) > + { > + domain_set_default_colors(d); > + return 0; > + } > + > + colors = xmalloc_array(unsigned int, max_nr_colors); > + if ( !colors ) > + return -ENOMEM; > + > + err = parse_color_config(str, colors, max_nr_colors, &num_colors); > + if ( err ) > + { > + printk(XENLOG_ERR "Error parsing LLC color configuration"); Missing \n at the end of this printk. > + xfree(colors); > + return err; > + } > + > + if ( !check_colors(colors, num_colors) ) > + { > + printk(XENLOG_ERR "%pd: bad LLC color config\n", d); > + xfree(colors); > + return -EINVAL; > + } > + > + /* Adjust the size cause it was initially set to max_nr_colors */ > + d->llc_colors = xrealloc_array(colors, num_colors); > + if ( !d->llc_colors ) > + d->llc_colors = colors; > + > + d->num_llc_colors = num_colors; > + > + return 0; > +} > + > /* > * Local variables: > * mode: C > diff --git a/xen/include/xen/llc-coloring.h b/xen/include/xen/llc-coloring.h > index 26353c808a..5d1355b3c9 100644 > --- a/xen/include/xen/llc-coloring.h > +++ b/xen/include/xen/llc-coloring.h > @@ -34,6 +34,7 @@ void arch_llc_coloring_init(void); > int dom0_set_llc_colors(struct domain *d); > int domain_set_llc_colors(struct domain *d, > const struct xen_domctl_set_llc_colors *config); > +int domain_set_llc_colors_from_str(struct domain *d, const char *str); > > #endif /* __XEN_LLC_COLORING_H__ */ > > diff --git a/xen/include/xen/xmalloc.h b/xen/include/xen/xmalloc.h > index b903fa2e26..f0412fb4e0 100644 > --- a/xen/include/xen/xmalloc.h > +++ b/xen/include/xen/xmalloc.h > @@ -37,6 +37,9 @@ > ((_type *)_xmalloc_array(sizeof(_type), __alignof__(_type), _num)) > #define xzalloc_array(_type, _num) \ > ((_type *)_xzalloc_array(sizeof(_type), __alignof__(_type), _num)) > +#define xrealloc_array(_ptr, _num) \ > + ((typeof(_ptr))_xrealloc_array(_ptr, sizeof(typeof(*(_ptr))), \ > + __alignof__(typeof(*(_ptr))), _num)) > > /* Allocate space for a structure with a flexible array of typed objects. */ > #define xzalloc_flex_struct(type, field, nr) \ > @@ -98,6 +101,15 @@ static inline void *_xzalloc_array( > return _xzalloc(size * num, align); > } > > +static inline void *_xrealloc_array( > + void *ptr, unsigned long size, unsigned long align, unsigned long num) > +{ > + /* Check for overflow. */ > + if ( size && num > UINT_MAX / size ) > + return NULL; > + return _xrealloc(ptr, size * num, align); > +} > + > /* > * Pooled allocator interface. > */ Best regards, Mykola From xen-devel-bounces@lists.xenproject.org Fri Nov 07 10:16:55 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 07 Nov 2025 10:16:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157449.1486215 (Exim 4.92) (envelope-from ) id 1vHJWE-0001eq-PF; Fri, 07 Nov 2025 10:16:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157449.1486215; Fri, 07 Nov 2025 10:16:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHJWE-0001ej-M6; Fri, 07 Nov 2025 10:16:34 +0000 Received: by outflank-mailman (input) for mailman id 1157449; Fri, 07 Nov 2025 10:16:33 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHJWD-0001ed-MQ for xen-devel@lists.xenproject.org; Fri, 07 Nov 2025 10:16:33 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id d4715197-bbc2-11f0-9d17-b5c5bf9af7f9; Fri, 07 Nov 2025 11:16:31 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B30531515; Fri, 7 Nov 2025 02:16:22 -0800 (PST) Received: from [10.57.40.58] (unknown [10.57.40.58]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C9F5E3F66E; Fri, 7 Nov 2025 02:16:17 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: d4715197-bbc2-11f0-9d17-b5c5bf9af7f9 Message-ID: <9f749c3e-4f93-40c1-b5c6-74d2ead92d00@arm.com> Date: Fri, 7 Nov 2025 10:16:12 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 07/12] mm: enable lazy_mmu sections to nest To: Alexander Gordeev Cc: Ritesh Harjani , linux-mm@kvack.org, linux-kernel@vger.kernel.org, Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-8-kevin.brodsky@arm.com> <87ms5050g0.ritesh.list@gmail.com> <50d1b63a-88d7-4484-82c0-3bde96e3207d-agordeev@linux.ibm.com> <48a4ecb5-3412-4d3f-9e43-535f8bee505f@arm.com> Content-Language: en-GB From: Kevin Brodsky In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 06/11/2025 15:33, Alexander Gordeev wrote: >> [...] >>>> static inline void lazy_mmu_mode_enable(void) >>>> { >>>> - arch_enter_lazy_mmu_mode(); >>>> + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; >>>> + >>>> + VM_WARN_ON_ONCE(state->nesting_level == U8_MAX); >>>> + /* enable() must not be called while paused */ >>>> + VM_WARN_ON(state->nesting_level > 0 && !state->active); >>>> + >>>> + if (state->nesting_level++ == 0) { >>>> + arch_enter_lazy_mmu_mode(); >>>> + state->active = true; >>>> + } >>>> } >>>> >>>> ... I think it make more sense to enable the state after the arch_** >>>> call right. >>> But then in_lazy_mmu_mode() would return false if called from >>> arch_enter_lazy_mmu_mode(). Not big problem, but still.. >> The ordering of nesting_level/active was the way you expected in v3, but >> the conclusion of the discussion with David H [1] is that it doesn't >> really matter so I simplified the ordering in v4 - the arch hooks >> shouldn't call in_lazy_mmu_mode() or inspect lazy_mmu_state. >> arch_enter()/arch_leave() shouldn't need it anyway since they're called >> once per outer section (not in nested sections). arch_flush() could >> potentially do something different when nested, but that seems unlikely. >> >> - Kevin >> >> [1] >> https://lore.kernel.org/all/af4414b6-617c-4dc8-bddc-3ea00d1f6f3b@redhat.com/ > I might be misunderstand this conversation, but it looked to me as a discussion > about lazy_mmu_state::nesting_level value, not lazy_mmu_state::active. > > I do use in_lazy_mmu_mode() (lazy_mmu_state::active) check from the arch- > callbacks. Here is the example (and likely the only case so far) where it hits: Sorry I didn't mean arch callbacks in general, I meant the ones called from lazy_mmu_mode_*, that is arch_*_lazy_mmu_mode. Patch 8 also makes use of in_lazy_mmu_mode() in set_pte() et al. on arm64. - Kevin > static int kasan_populate_vmalloc_pte(pte_t *ptep, unsigned long addr, > void *_data) > { > lazy_mmu_mode_pause(); > ... > if (likely(pte_none(ptep_get(ptep)))) { > > /* Here set_pte() checks whether we are in lazy_mmu mode */ > set_pte_at(&init_mm, addr, ptep, pte); <--- calls set_pte() > data->pages[index] = NULL; > } > ... > lazy_mmu_mode_resume(); > ... > } > > So without in_lazy_mmu_mode() check above the arch-specific set_pte() > implementation enters a wrong branch, which ends up in: > > [ 394.503134] Call Trace: > [ 394.503137] [<00007fffe01333f4>] dump_stack_lvl+0xbc/0xf0 FWIW  > [ 394.503143] [<00007fffe010298c>] vpanic+0x1cc/0x418 > [ 394.503149] [<00007fffe0102c7a>] panic+0xa2/0xa8 > [ 394.503154] [<00007fffe01e7a8a>] check_panic_on_warn+0x8a/0xb0 > [ 394.503160] [<00007fffe082d122>] end_report+0x72/0x110 > [ 394.503166] [<00007fffe082d3e6>] kasan_report+0xc6/0x100 > [ 394.503171] [<00007fffe01b9556>] ipte_batch_ptep_get+0x146/0x150 > [ 394.503176] [<00007fffe0830096>] kasan_populate_vmalloc_pte+0xe6/0x1e0 > [ 394.503183] [<00007fffe0718050>] apply_to_pte_range+0x1a0/0x570 > [ 394.503189] [<00007fffe07260fa>] __apply_to_page_range+0x3ca/0x8f0 > [ 394.503195] [<00007fffe0726648>] apply_to_page_range+0x28/0x40 > [ 394.503201] [<00007fffe082fe34>] __kasan_populate_vmalloc+0x324/0x340 > [ 394.503207] [<00007fffe076954e>] alloc_vmap_area+0x31e/0xbf0 > [ 394.503213] [<00007fffe0770106>] __get_vm_area_node+0x1a6/0x2d0 > [ 394.503218] [<00007fffe07716fa>] __vmalloc_node_range_noprof+0xba/0x260 > [ 394.503224] [<00007fffe0771970>] __vmalloc_node_noprof+0xd0/0x110 > [ 394.503229] [<00007fffe0771a22>] vmalloc_noprof+0x32/0x40 > [ 394.503234] [<00007fff604eaa42>] full_fit_alloc_test+0xb2/0x3e0 [test_vmalloc] > [ 394.503241] [<00007fff604eb478>] test_func+0x488/0x760 [test_vmalloc] > [ 394.503247] [<00007fffe025ad68>] kthread+0x368/0x630 > [ 394.503253] [<00007fffe01391e0>] __ret_from_fork+0xd0/0x490 > [ 394.503259] [<00007fffe24e468a>] ret_from_fork+0xa/0x30 > > I could have cached lazy_mmu_state::active as arch-specific data > and check it, but then what is the point to have it generalized? > > Thanks! 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The code will still follow PV path. >> >> Rework raw_x_guest() code to use static inline functions which account for >> above PV/HVM possible configurations with main intention to optimize code >> for (PV=n and HVM=y) case. >> >> For the case (PV=n and HVM=n) return "len" value indicating a failure (no >> guests should be possible in this case, which means no access to guest >> memory should ever happen). >> >> Finally build arch/x86/usercopy.c only for PV=y. >> >> The measured (bloat-o-meter) improvement for (PV=n and HVM=y) case is: >> add/remove: 2/9 grow/shrink: 2/90 up/down: 1678/-32560 (-30882) >> Total: Before=1937092, After=1906210, chg -1.59% >> >> Signed-off-by: Grygorii Strashko >> [teddy.astie@vates.tech: Suggested to use static inline functions vs macro combinations] >> Suggested-by: Teddy Astie > > Just one formal request for now: Please send patches To: the list, with individuals > on Cc: as necessary. Sure, sorry. -- Best regards, -grygorii From xen-devel-bounces@lists.xenproject.org Fri Nov 07 10:27:38 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 07 Nov 2025 10:27:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157473.1486235 (Exim 4.92) (envelope-from ) id 1vHJgr-0003nf-TB; Fri, 07 Nov 2025 10:27:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157473.1486235; Fri, 07 Nov 2025 10:27:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHJgr-0003nY-Q7; Fri, 07 Nov 2025 10:27:33 +0000 Received: by outflank-mailman (input) for mailman id 1157473; Fri, 07 Nov 2025 10:27:32 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 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b=UdDRXmkaDaDvz/g+YTeKwY5/YkpApdTsAVwZj1rXQj4Yf7BKdHL/jwY2yIKfyfTN1S9AURujdTHeYpplPJhoDdq1eVFVIbVyjd9I1x4yMf9Oe14LX9myHVBn4ehdZZxyZByLs9Tg0skSM9qmuPC2Ekz+Ej/YuZyO3xWmpc3vxKx7iqMxsc4e/WIgS4nR/Oo79TWceLRYLbUxICCCbjVZzquxYXMmdZ/WWRdFEjztJVNyEOuTcldc+X8ww2UBQ4QgfImcp4g7EhWu1A1ZDj4lc298dFxHDecFmzP9ub22ucdDxJ9gYn8U0Y7/wDsslfEr7v5mpbmpFoeoSjNUI5mklA== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=epam.com; Message-ID: <9baf3150-c787-4fb8-a67d-70fade104b54@epam.com> Date: Fri, 7 Nov 2025 12:27:26 +0200 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH] xen/x86: guest_access: optimize raw_x_guest() for PV and HVM combinations To: Jason Andryuk , Teddy Astie , xen-devel@lists.xenproject.org, Jan Beulich Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Alejandro Vallejo References: <20251031212058.1338332-1-grygorii_strashko@epam.com> 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HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: chs/SZyPIoVzWU3APFq6GMiz9anNpBLWGlK5/HDzofrb/sk6T3YlTOLjO8e0rPT8qf1UaKSptlbDb+cU72Qm+jg70/S4ABOh3S9fjkSx68g= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAWPR03MB9977 Hi Jason, On 07.11.25 03:29, Jason Andryuk wrote: > On 2025-11-06 12:40, Grygorii Strashko wrote: >> >> >> On 06.11.25 19:27, Teddy Astie wrote: >>> Le 06/11/2025 à 18:00, Jason Andryuk a écrit : >>>> On 2025-11-06 11:33, Grygorii Strashko wrote: >>>>> Hi Teddy, Jan, >>>>> >>>>> On 06.11.25 17:57, Teddy Astie wrote: >>>>>> Le 31/10/2025 à 22:25, Grygorii Strashko a écrit : >>>>> Can try. >>>> >>>> Yes, I was thinking something like Teddy suggested: >>>> >>>> #define raw_copy_to_guest(dst, src, len)        \ >>>>           (is_hvm_vcpu(current) ? copy_to_user_hvm(dst, src, len) : >>>>            is_pv_vcpu(current) ? copy_to_guest_pv(dst, src, len) : >>>>            fail_copy(dst, src, len)) >>>> >>>> But that made the think the is_{hvm,pv}_{vcpu,domain}() could be >>>> optimized for when only 1 of HVM or PV is enabled. >>>> >>>> Regards, >>>> Jason >>>> >>>> xen: Optimize is_hvm/pv_domain() for single domain type >>>> >>>> is_hvm_domain() and is_pv_domain() hardcode the false conditions for >>>> HVM=n and PV=n, but they still leave the XEN_DOMCTL_CDF_hvm flag >>>> checking.  When only one of PV or HVM is set, the result can be hard >>>> coded since the other is impossible.  Notably, this removes the >>>> evaluate_nospec() lfences. >>>> >>>> Signed-off-by: Jason Andryuk >>>> --- >>>> Untested. >>>> >>>> HVM=y PV=n bloat-o-meter: >>>> >>>> add/remove: 3/6 grow/shrink: 19/212 up/down: 3060/-60349 (-57289) >>>> >>>> Full bloat-o-meter below. >>>> --- >>>>    xen/include/xen/sched.h | 18 ++++++++++++++---- >>>>    1 file changed, 14 insertions(+), 4 deletions(-) >>>> >>>> diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h >>>> index f680fb4fa1..12f10d9cc8 100644 >>>> --- a/xen/include/xen/sched.h >>>> +++ b/xen/include/xen/sched.h >>>> @@ -1176,8 +1176,13 @@ static always_inline bool >>>> is_hypercall_target(const struct domain *d) >>>> >>>>    static always_inline bool is_pv_domain(const struct domain *d) >>>>    { >>>> -    return IS_ENABLED(CONFIG_PV) && >>>> -        evaluate_nospec(!(d->options & XEN_DOMCTL_CDF_hvm)); >>>> +    if ( !IS_ENABLED(CONFIG_PV) ) >>>> +        return false; >>>> + >>>> +    if ( IS_ENABLED(CONFIG_HVM) ) >>>> +        return evaluate_nospec(!(d->options & XEN_DOMCTL_CDF_hvm)); >>>> + >>>> +    return true; >>>>    } >>>> >>>>    static always_inline bool is_pv_vcpu(const struct vcpu *v) >>>> @@ -1218,8 +1223,13 @@ static always_inline bool is_pv_64bit_vcpu(const >>>> struct vcpu *v) >>>> >>>>    static always_inline bool is_hvm_domain(const struct domain *d) >>>>    { >>>> -    return IS_ENABLED(CONFIG_HVM) && >>>> -        evaluate_nospec(d->options & XEN_DOMCTL_CDF_hvm); >>>> +    if ( !IS_ENABLED(CONFIG_HVM) ) >>>> +        return false; >>>> + >>>> +    if ( IS_ENABLED(CONFIG_PV) ) >>>> +        return evaluate_nospec(d->options & XEN_DOMCTL_CDF_hvm); >>>> + >>>> +    return true; >>>>    } >>>> >>>>    static always_inline bool is_hvm_vcpu(const struct vcpu *v) >>> >>> While I like the idea, it may slightly impact some logic as special >>> domains (dom_xen and dom_io) are now considered HVM domains (when !PV && >>> HVM) instead of "neither PV nor HVM". >>> We want at least to make sure we're not silently breaking something >>> elsewhere. >> >> first of all idle domain - I've tried to constify is_hvm_domain() and even made it work, >> but diff is very fragile. > > Interesting.  Yeah, I did not consider system domains.  It seems fragile today if sometimes !is_hvm_domain implies idle_domain.  :/ > >> Diff below - just FYI. >> >> -- >> Best regards, >> -grygorii >> >> Author: Grygorii Strashko >> Date:   Fri Oct 17 17:21:29 2025 +0300 >> >>      HACK: hvm only >>      Signed-off-by: Grygorii Strashko >> >> diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c >> index d65c2bd3661f..2ea3d81670de 100644 >> --- a/xen/arch/x86/domain.c >> +++ b/xen/arch/x86/domain.c >> @@ -567,17 +567,17 @@ int arch_vcpu_create(struct vcpu *v) >> >>       spin_lock_init(&v->arch.vpmu.vpmu_lock); >> >> -    if ( is_hvm_domain(d) ) >> -        rc = hvm_vcpu_initialise(v); >> -    else if ( !is_idle_domain(d) ) >> -        rc = pv_vcpu_initialise(v); >> -    else >> +    if ( is_idle_domain(d) ) >>       { >>           /* Idle domain */ >>           v->arch.cr3 = __pa(idle_pg_table); >>           rc = 0; >>           v->arch.msrs = ZERO_BLOCK_PTR; /* Catch stray misuses */ >>       } >> +    else if ( is_hvm_domain(d) ) >> +        rc = hvm_vcpu_initialise(v); >> +    else >> +        rc = pv_vcpu_initialise(v); > > This looks like an improvement as it makes the idle domain case explicit. > >> >>       if ( rc ) >>           goto fail; >> @@ -2123,7 +2123,7 @@ void context_switch(struct vcpu *prev, struct vcpu *next) >>       vpmu_switch_from(prev); >>       np2m_schedule(NP2M_SCHEDLE_OUT); >> >> -    if ( is_hvm_domain(prevd) && !list_empty(&prev->arch.hvm.tm_list) ) >> +    if ( !is_idle_domain(prevd) && is_hvm_domain(prevd) && ! list_empty(&prev->arch.hvm.tm_list) ) > > The idle domain's tm_list could be initialized.  It should remain empty and be equivalent without modifying this line.  Though maybe your way is better. > >>           pt_save_timer(prev); >> >>       local_irq_disable(); > > >> diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c >> index 839d3ff91b5a..e3c9b4ffba52 100644 >> --- a/xen/arch/x86/hvm/svm/vmcb.c >> +++ b/xen/arch/x86/hvm/svm/vmcb.c >> @@ -236,7 +236,7 @@ static void cf_check vmcb_dump(unsigned char ch) >> >>       for_each_domain ( d ) >>       { >> -        if ( !is_hvm_domain(d) ) >> +        if ( is_idle_domain(d) || !is_hvm_domain(d) ) > > I don't think this should be needed as idle domain, and system domains in general, are not added to domlist.  So for_each_domain() will only iterate over user domains. > > domain_create() has an early exit for system domains: > .... >     /* DOMID_{XEN,IO,IDLE,etc} are sufficiently constructed. */ >     if ( is_system_domain(d) ) >         return d; > >     arch_domain_create() >         paging_domain_init() >             p2m_init() > >     domlist_insert() > >>               continue; >>           printk("\n>>> Domain %d <<<\n", d->domain_id); >>           for_each_vcpu ( d, v ) >> diff --git a/xen/arch/x86/mm/p2m-basic.c b/xen/arch/x86/mm/p2m-basic.c >> index e126fda26760..c53269b3c06d 100644 >> --- a/xen/arch/x86/mm/p2m-basic.c >> +++ b/xen/arch/x86/mm/p2m-basic.c >> @@ -34,7 +34,7 @@ static int p2m_initialise(struct domain *d, struct p2m_domain *p2m) >>       p2m->default_access = p2m_access_rwx; >>       p2m->p2m_class = p2m_host; >> >> -    if ( !is_hvm_domain(d) ) >> +    if ( is_idle_domain(d) || !is_hvm_domain(d) ) >>           return 0; >> >>       p2m_pod_init(p2m); >> @@ -113,7 +113,7 @@ int p2m_init(struct domain *d) >>       int rc; >> >>       rc = p2m_init_hostp2m(d); >> -    if ( rc || !is_hvm_domain(d) ) >> +    if ( rc || is_idle_domain(d) || !is_hvm_domain(d) ) > > Given the snippet above, I think p2m functions can't be reached for system domains. > >>           return rc; >> >>       /* >> diff --git a/xen/arch/x86/mm/p2m-pod.c b/xen/arch/x86/mm/p2m-pod.c >> index 05633fe2ac88..4e62d98861fe 100644 >> --- a/xen/arch/x86/mm/p2m-pod.c >> +++ b/xen/arch/x86/mm/p2m-pod.c >> @@ -1425,7 +1425,7 @@ bool p2m_pod_active(const struct domain *d) >>       struct p2m_domain *p2m; >>       bool res; >> >> -    if ( !is_hvm_domain(d) ) >> +    if ( is_idle_domain(d) || !is_hvm_domain(d) ) > > accessed via: >     do_domctl() >     vm_event_domctl() >             p2m_pod_active() > > The passed in d needs to be from domlist, so again a system domain cannot reach here. > >>           return false; >> >>       p2m = p2m_get_hostp2m(d); >> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c >> index ccf8563e5a64..e1862c5085f5 100644 >> --- a/xen/arch/x86/setup.c >> +++ b/xen/arch/x86/setup.c >> @@ -2158,7 +2158,7 @@ static int __hwdom_init cf_check io_bitmap_cb( >> >>   void __hwdom_init setup_io_bitmap(struct domain *d) >>   { >> -    if ( !is_hvm_domain(d) ) >> +    if ( is_idle_domain(d) || !is_hvm_domain(d) ) > > This looks like it is called for dom0 or late_hwdom, so only real domains. Thank you for your comments. Unfortunately, I probably will not continue this HVM_ONLY exercise in the nearest future :(, so if anyone interested and want to pick up - feel free. -- Best regards, -grygorii From xen-devel-bounces@lists.xenproject.org Fri Nov 07 11:13:43 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 07 Nov 2025 11:13:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157498.1486257 (Exim 4.92) (envelope-from ) id 1vHKPQ-0001po-Au; Fri, 07 Nov 2025 11:13:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157498.1486257; Fri, 07 Nov 2025 11:13:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHKPQ-0001ph-7y; Fri, 07 Nov 2025 11:13:36 +0000 Received: by outflank-mailman (input) for mailman id 1157498; Fri, 07 Nov 2025 11:13:34 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHKPO-0001pb-Bp for xen-devel@lists.xenproject.org; Fri, 07 Nov 2025 11:13:34 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id cbfcfb4c-bbca-11f0-9d17-b5c5bf9af7f9; Fri, 07 Nov 2025 12:13:33 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 802C51477; Fri, 7 Nov 2025 03:13:24 -0800 (PST) Received: from [10.1.36.52] (unknown [10.1.36.52]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 21B713F63F; Fri, 7 Nov 2025 03:13:28 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: cbfcfb4c-bbca-11f0-9d17-b5c5bf9af7f9 Message-ID: <84dab8b1-ea28-4dcc-9721-9aaa6fcd12ba@arm.com> Date: Fri, 7 Nov 2025 11:13:15 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 07/12] mm: enable lazy_mmu sections to nest To: "Ritesh Harjani (IBM)" , Alexander Gordeev Cc: linux-mm@kvack.org, linux-kernel@vger.kernel.org, Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-8-kevin.brodsky@arm.com> <87ms5050g0.ritesh.list@gmail.com> <50d1b63a-88d7-4484-82c0-3bde96e3207d-agordeev@linux.ibm.com> <87ikfn3yvs.ritesh.list@gmail.com> Content-Language: en-GB From: Kevin Brodsky In-Reply-To: <87ikfn3yvs.ritesh.list@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 06/11/2025 16:32, Ritesh Harjani (IBM) wrote: > Alexander Gordeev writes: > >> On Wed, Nov 05, 2025 at 02:19:03PM +0530, Ritesh Harjani wrote: >>>> + * in_lazy_mmu_mode() can be used to check whether the lazy MMU mode is >>>> + * currently enabled. >>>> */ >>>> #ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE >>>> static inline void lazy_mmu_mode_enable(void) >>>> { >>>> - arch_enter_lazy_mmu_mode(); >>>> + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; >>>> + >>>> + VM_WARN_ON_ONCE(state->nesting_level == U8_MAX); >>>> + /* enable() must not be called while paused */ >>>> + VM_WARN_ON(state->nesting_level > 0 && !state->active); >>>> + >>>> + if (state->nesting_level++ == 0) { >>>> + state->active = true; >>>> + arch_enter_lazy_mmu_mode(); >>>> + } >>>> } >>> Some architectures disables preemption in their >>> arch_enter_lazy_mmu_mode(). So shouldn't the state->active = true should >>> happen after arch_enter_lazy_mmu_mode() has disabled preemption()? i.e. >> Do you have some scenario in mind that could cause an issue? >> > No not really. But that's a deviation from what previous arch hooks were > expecting. Although thinking this through - I don't have any usecase > where this can be a problem. Which arch hook expectations are you referring to? > But let me re-visit some of the code paths on ppc64 lazy mmu... > > Looking at the arch specific usecase I see we always do get_cpu_var() > for accessing the per-cpu batch array which disables preemption before > accessing the per-cpu structure.. This per-cpu structure is where we > batch pte updates... arch_enter() disables preemption so accesses to per-CPU variables anywhere in the section shouldn't be an issue either way. The bigger picture (regarding patch 9) is that what in_lazy_mmu_state() returns is based on the current task's state (not a per-CPU variable), and always false while in interrupt. As a result whether preemption is disabled or not should make no difference, only program order matters. - Kevin > For e.g... > > arch_enter_lazy_mmu_mode() > hpte_need_flush() > get_cpu_var() // this takes care of preempt_disable() > adds vpns to per-cpu batch[i] > put_cpu_var() // > arch_leave_lazy_mmu_mode() > >> IOW, what could go wrong if the process is scheduled to another >> CPU before preempt_disable() is called? > So from above - I don't think your sequence to update > state->active = true > before calling arch_enter hook should be a problem. > Based on above this looks mostly ok to me. > > -ritesh From xen-devel-bounces@lists.xenproject.org Fri Nov 07 12:25:25 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 07 Nov 2025 12:25:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157523.1486268 (Exim 4.92) (envelope-from ) id 1vHLWi-0001iA-GE; Fri, 07 Nov 2025 12:25:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157523.1486268; Fri, 07 Nov 2025 12:25:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHLWi-0001i3-Cb; Fri, 07 Nov 2025 12:25:12 +0000 Received: by outflank-mailman (input) for mailman id 1157523; Fri, 07 Nov 2025 12:25:11 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHLWh-0001hw-78 for xen-devel@lists.xenproject.org; Fri, 07 Nov 2025 12:25:11 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id ccbf810f-bbd4-11f0-9d17-b5c5bf9af7f9; Fri, 07 Nov 2025 13:25:09 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B6E851515; Fri, 7 Nov 2025 04:25:00 -0800 (PST) Received: from [10.57.86.134] (unknown [10.57.86.134]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id AF63F3F66E; Fri, 7 Nov 2025 04:25:03 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: ccbf810f-bbd4-11f0-9d17-b5c5bf9af7f9 Message-ID: Date: Fri, 7 Nov 2025 12:25:02 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 01/12] powerpc/64s: Do not re-activate batched TLB flush Content-Language: en-GB To: Kevin Brodsky , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-2-kevin.brodsky@arm.com> From: Ryan Roberts In-Reply-To: <20251029100909.3381140-2-kevin.brodsky@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 29/10/2025 10:08, Kevin Brodsky wrote: > From: Alexander Gordeev > > Since commit b9ef323ea168 ("powerpc/64s: Disable preemption in hash > lazy mmu mode") a task can not be preempted while in lazy MMU mode. > Therefore, the batch re-activation code is never called, so remove it. > > Signed-off-by: Alexander Gordeev > Signed-off-by: Kevin Brodsky Reviewed-by: Ryan Roberts > --- > arch/powerpc/include/asm/thread_info.h | 2 -- > arch/powerpc/kernel/process.c | 25 ------------------------- > 2 files changed, 27 deletions(-) > > diff --git a/arch/powerpc/include/asm/thread_info.h b/arch/powerpc/include/asm/thread_info.h > index b0f200aba2b3..97f35f9b1a96 100644 > --- a/arch/powerpc/include/asm/thread_info.h > +++ b/arch/powerpc/include/asm/thread_info.h > @@ -154,12 +154,10 @@ void arch_setup_new_exec(void); > /* Don't move TLF_NAPPING without adjusting the code in entry_32.S */ > #define TLF_NAPPING 0 /* idle thread enabled NAP mode */ > #define TLF_SLEEPING 1 /* suspend code enabled SLEEP mode */ > -#define TLF_LAZY_MMU 3 /* tlb_batch is active */ > #define TLF_RUNLATCH 4 /* Is the runlatch enabled? */ > > #define _TLF_NAPPING (1 << TLF_NAPPING) > #define _TLF_SLEEPING (1 << TLF_SLEEPING) > -#define _TLF_LAZY_MMU (1 << TLF_LAZY_MMU) > #define _TLF_RUNLATCH (1 << TLF_RUNLATCH) > > #ifndef __ASSEMBLER__ > diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c > index eb23966ac0a9..9237dcbeee4a 100644 > --- a/arch/powerpc/kernel/process.c > +++ b/arch/powerpc/kernel/process.c > @@ -1281,9 +1281,6 @@ struct task_struct *__switch_to(struct task_struct *prev, > { > struct thread_struct *new_thread, *old_thread; > struct task_struct *last; > -#ifdef CONFIG_PPC_64S_HASH_MMU > - struct ppc64_tlb_batch *batch; > -#endif > > new_thread = &new->thread; > old_thread = ¤t->thread; > @@ -1291,14 +1288,6 @@ struct task_struct *__switch_to(struct task_struct *prev, > WARN_ON(!irqs_disabled()); > > #ifdef CONFIG_PPC_64S_HASH_MMU > - batch = this_cpu_ptr(&ppc64_tlb_batch); > - if (batch->active) { > - current_thread_info()->local_flags |= _TLF_LAZY_MMU; > - if (batch->index) > - __flush_tlb_pending(batch); > - batch->active = 0; > - } > - > /* > * On POWER9 the copy-paste buffer can only paste into > * foreign real addresses, so unprivileged processes can not > @@ -1369,20 +1358,6 @@ struct task_struct *__switch_to(struct task_struct *prev, > */ > > #ifdef CONFIG_PPC_BOOK3S_64 > -#ifdef CONFIG_PPC_64S_HASH_MMU > - /* > - * This applies to a process that was context switched while inside > - * arch_enter_lazy_mmu_mode(), to re-activate the batch that was > - * deactivated above, before _switch(). This will never be the case > - * for new tasks. > - */ > - if (current_thread_info()->local_flags & _TLF_LAZY_MMU) { > - current_thread_info()->local_flags &= ~_TLF_LAZY_MMU; > - batch = this_cpu_ptr(&ppc64_tlb_batch); > - batch->active = 1; > - } > -#endif > - > /* > * Math facilities are masked out of the child MSR in copy_thread. > * A new task does not need to restore_math because it will From xen-devel-bounces@lists.xenproject.org Fri Nov 07 12:28:56 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 07 Nov 2025 12:28:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157534.1486279 (Exim 4.92) (envelope-from ) id 1vHLaJ-0002JW-W3; Fri, 07 Nov 2025 12:28:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157534.1486279; Fri, 07 Nov 2025 12:28:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHLaJ-0002JP-Rx; Fri, 07 Nov 2025 12:28:55 +0000 Received: by outflank-mailman (input) for mailman id 1157534; Fri, 07 Nov 2025 12:28:54 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHLaI-0002Hl-Kz for xen-devel@lists.xenproject.org; Fri, 07 Nov 2025 12:28:54 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 52602544-bbd5-11f0-9d17-b5c5bf9af7f9; Fri, 07 Nov 2025 13:28:53 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id F191B1516; Fri, 7 Nov 2025 04:28:44 -0800 (PST) Received: from [10.57.86.134] (unknown [10.57.86.134]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0EEB03F66E; Fri, 7 Nov 2025 04:28:47 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 52602544-bbd5-11f0-9d17-b5c5bf9af7f9 Message-ID: <2205a5de-de14-4718-a7b8-e49accb06f03@arm.com> Date: Fri, 7 Nov 2025 12:28:46 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 01/12] powerpc/64s: Do not re-activate batched TLB flush Content-Language: en-GB From: Ryan Roberts To: Kevin Brodsky , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-2-kevin.brodsky@arm.com> In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 07/11/2025 12:25, Ryan Roberts wrote: > On 29/10/2025 10:08, Kevin Brodsky wrote: >> From: Alexander Gordeev >> >> Since commit b9ef323ea168 ("powerpc/64s: Disable preemption in hash >> lazy mmu mode") a task can not be preempted while in lazy MMU mode. >> Therefore, the batch re-activation code is never called, so remove it. >> >> Signed-off-by: Alexander Gordeev >> Signed-off-by: Kevin Brodsky > > Reviewed-by: Ryan Roberts I should also add, that as far as I can tell, this was dead code because the powerpc implementation disables preemption in a lazy mmu region. It would probably be preferable to understand why the preemption disabling approach was added in the first place. Perhaps it would be better to remove that and keep this code. But given you are not changing any current behaviour and this is removing dead code, that's probably something for the ppc folks to look into another day. Thanks, Ryan > >> --- >> arch/powerpc/include/asm/thread_info.h | 2 -- >> arch/powerpc/kernel/process.c | 25 ------------------------- >> 2 files changed, 27 deletions(-) >> >> diff --git a/arch/powerpc/include/asm/thread_info.h b/arch/powerpc/include/asm/thread_info.h >> index b0f200aba2b3..97f35f9b1a96 100644 >> --- a/arch/powerpc/include/asm/thread_info.h >> +++ b/arch/powerpc/include/asm/thread_info.h >> @@ -154,12 +154,10 @@ void arch_setup_new_exec(void); >> /* Don't move TLF_NAPPING without adjusting the code in entry_32.S */ >> #define TLF_NAPPING 0 /* idle thread enabled NAP mode */ >> #define TLF_SLEEPING 1 /* suspend code enabled SLEEP mode */ >> -#define TLF_LAZY_MMU 3 /* tlb_batch is active */ >> #define TLF_RUNLATCH 4 /* Is the runlatch enabled? */ >> >> #define _TLF_NAPPING (1 << TLF_NAPPING) >> #define _TLF_SLEEPING (1 << TLF_SLEEPING) >> -#define _TLF_LAZY_MMU (1 << TLF_LAZY_MMU) >> #define _TLF_RUNLATCH (1 << TLF_RUNLATCH) >> >> #ifndef __ASSEMBLER__ >> diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c >> index eb23966ac0a9..9237dcbeee4a 100644 >> --- a/arch/powerpc/kernel/process.c >> +++ b/arch/powerpc/kernel/process.c >> @@ -1281,9 +1281,6 @@ struct task_struct *__switch_to(struct task_struct *prev, >> { >> struct thread_struct *new_thread, *old_thread; >> struct task_struct *last; >> -#ifdef CONFIG_PPC_64S_HASH_MMU >> - struct ppc64_tlb_batch *batch; >> -#endif >> >> new_thread = &new->thread; >> old_thread = ¤t->thread; >> @@ -1291,14 +1288,6 @@ struct task_struct *__switch_to(struct task_struct *prev, >> WARN_ON(!irqs_disabled()); >> >> #ifdef CONFIG_PPC_64S_HASH_MMU >> - batch = this_cpu_ptr(&ppc64_tlb_batch); >> - if (batch->active) { >> - current_thread_info()->local_flags |= _TLF_LAZY_MMU; >> - if (batch->index) >> - __flush_tlb_pending(batch); >> - batch->active = 0; >> - } >> - >> /* >> * On POWER9 the copy-paste buffer can only paste into >> * foreign real addresses, so unprivileged processes can not >> @@ -1369,20 +1358,6 @@ struct task_struct *__switch_to(struct task_struct *prev, >> */ >> >> #ifdef CONFIG_PPC_BOOK3S_64 >> -#ifdef CONFIG_PPC_64S_HASH_MMU >> - /* >> - * This applies to a process that was context switched while inside >> - * arch_enter_lazy_mmu_mode(), to re-activate the batch that was >> - * deactivated above, before _switch(). This will never be the case >> - * for new tasks. >> - */ >> - if (current_thread_info()->local_flags & _TLF_LAZY_MMU) { >> - current_thread_info()->local_flags &= ~_TLF_LAZY_MMU; >> - batch = this_cpu_ptr(&ppc64_tlb_batch); >> - batch->active = 1; >> - } >> -#endif >> - >> /* >> * Math facilities are masked out of the child MSR in copy_thread. >> * A new task does not need to restore_math because it will > From xen-devel-bounces@lists.xenproject.org Fri Nov 07 12:31:57 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 07 Nov 2025 12:31:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157546.1486288 (Exim 4.92) (envelope-from ) id 1vHLdA-0003n0-Bm; Fri, 07 Nov 2025 12:31:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157546.1486288; Fri, 07 Nov 2025 12:31:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHLdA-0003mt-8M; Fri, 07 Nov 2025 12:31:52 +0000 Received: by outflank-mailman (input) for mailman id 1157546; Fri, 07 Nov 2025 12:31:50 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHLd8-0003mn-RU for xen-devel@lists.xenproject.org; Fri, 07 Nov 2025 12:31:50 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id bb6a4c68-bbd5-11f0-9d17-b5c5bf9af7f9; Fri, 07 Nov 2025 13:31:49 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2C3C81516; Fri, 7 Nov 2025 04:31:41 -0800 (PST) Received: from [10.57.86.134] (unknown [10.57.86.134]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 412D63F66E; Fri, 7 Nov 2025 04:31:44 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: bb6a4c68-bbd5-11f0-9d17-b5c5bf9af7f9 Message-ID: Date: Fri, 7 Nov 2025 12:31:42 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 02/12] x86/xen: simplify flush_lazy_mmu() Content-Language: en-GB To: Kevin Brodsky , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-3-kevin.brodsky@arm.com> From: Ryan Roberts In-Reply-To: <20251029100909.3381140-3-kevin.brodsky@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 29/10/2025 10:08, Kevin Brodsky wrote: > arch_flush_lazy_mmu_mode() is called when outstanding batched > pgtable operations must be completed immediately. There should > however be no need to leave and re-enter lazy MMU completely. The > only part of that sequence that we really need is xen_mc_flush(); > call it directly. > > Signed-off-by: Kevin Brodsky This looks functionally equivalent to me, so: Reviewed-by: Ryan Roberts But I don't think this tidy up is strictly necessary for your series to work? (perhaps I'll change my mind on that as I go through it). > --- > arch/x86/xen/mmu_pv.c | 6 ++---- > 1 file changed, 2 insertions(+), 4 deletions(-) > > diff --git a/arch/x86/xen/mmu_pv.c b/arch/x86/xen/mmu_pv.c > index 2a4a8deaf612..7a35c3393df4 100644 > --- a/arch/x86/xen/mmu_pv.c > +++ b/arch/x86/xen/mmu_pv.c > @@ -2139,10 +2139,8 @@ static void xen_flush_lazy_mmu(void) > { > preempt_disable(); > > - if (xen_get_lazy_mode() == XEN_LAZY_MMU) { > - arch_leave_lazy_mmu_mode(); > - arch_enter_lazy_mmu_mode(); > - } > + if (xen_get_lazy_mode() == XEN_LAZY_MMU) > + xen_mc_flush(); > > preempt_enable(); > } From xen-devel-bounces@lists.xenproject.org Fri Nov 07 13:47:55 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 07 Nov 2025 13:47:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157572.1486298 (Exim 4.92) (envelope-from ) id 1vHMoS-0003jf-KE; Fri, 07 Nov 2025 13:47:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157572.1486298; Fri, 07 Nov 2025 13:47:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHMoS-0003jY-GM; Fri, 07 Nov 2025 13:47:36 +0000 Received: by outflank-mailman (input) for mailman id 1157572; Fri, 07 Nov 2025 13:47:34 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHMoQ-0003jP-Ot for xen-devel@lists.xenproject.org; Fri, 07 Nov 2025 13:47:34 +0000 Received: from mail-wm1-x32f.google.com (mail-wm1-x32f.google.com [2a00:1450:4864:20::32f]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 4f418647-bbe0-11f0-980a-7dc792cee155; Fri, 07 Nov 2025 14:47:32 +0100 (CET) Received: by mail-wm1-x32f.google.com with SMTP id 5b1f17b1804b1-470ffbf2150so3647235e9.1 for ; Fri, 07 Nov 2025 05:47:32 -0800 (PST) Received: from localhost.localdomain (host-78-149-11-196.as13285.net. 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Fri, 07 Nov 2025 05:47:31 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH] x86/ucode: Add extra rows to the entrysign model table Date: Fri, 7 Nov 2025 13:47:29 +0000 Message-Id: <20251107134729.20735-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Link: https://git.kernel.org/tip/d23550efc6800841b4d1639784afaebdea946ae0 Fixes: ff8228ab4658 ("x86/ucode: Relax digest check when Entrysign is fixed in firmware") Signed-off-by: Andrew Cooper -- CC: Jan Beulich CC: Roger Pau Monné --- xen/arch/x86/cpu/microcode/amd.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/xen/arch/x86/cpu/microcode/amd.c b/xen/arch/x86/cpu/microcode/amd.c index d72b9556f65f..550b8c1e57ec 100644 --- a/xen/arch/x86/cpu/microcode/amd.c +++ b/xen/arch/x86/cpu/microcode/amd.c @@ -655,10 +655,12 @@ void __init amd_check_entrysign(void) case 0x0aa001: fixed_rev = 0x17; break; case 0x0aa002: fixed_rev = 0x19; break; case 0x0b0021: fixed_rev = 0x47; break; + case 0x0b0081: fixed_rev = 0x12; break; case 0x0b1010: fixed_rev = 0x47; break; case 0x0b2040: fixed_rev = 0x32; break; case 0x0b4040: fixed_rev = 0x32; break; case 0x0b6000: fixed_rev = 0x32; break; + case 0x0b6080: fixed_rev = 0x32; break; case 0x0b7000: fixed_rev = 0x32; break; default: printk(XENLOG_WARNING -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri Nov 07 13:56:41 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 07 Nov 2025 13:56:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157586.1486309 (Exim 4.92) (envelope-from ) id 1vHMxB-0005Nz-FU; Fri, 07 Nov 2025 13:56:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157586.1486309; Fri, 07 Nov 2025 13:56:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHMxB-0005Ns-Aj; Fri, 07 Nov 2025 13:56:37 +0000 Received: by outflank-mailman (input) for mailman id 1157586; Fri, 07 Nov 2025 13:56:36 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHMxA-0005Nm-5f for xen-devel@lists.xenproject.org; Fri, 07 Nov 2025 13:56:36 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 8df494d8-bbe1-11f0-980a-7dc792cee155; Fri, 07 Nov 2025 14:56:27 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id F05461515; Fri, 7 Nov 2025 05:56:18 -0800 (PST) Received: from [10.57.86.134] (unknown [10.57.86.134]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 235F03F66E; Fri, 7 Nov 2025 05:56:22 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 8df494d8-bbe1-11f0-980a-7dc792cee155 Message-ID: <6a9c846f-22b6-4d5f-81dc-6cdcd4905952@arm.com> Date: Fri, 7 Nov 2025 13:56:20 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 05/12] mm: introduce CONFIG_ARCH_HAS_LAZY_MMU_MODE Content-Language: en-GB To: Kevin Brodsky , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-6-kevin.brodsky@arm.com> From: Ryan Roberts In-Reply-To: <20251029100909.3381140-6-kevin.brodsky@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 29/10/2025 10:09, Kevin Brodsky wrote: > Architectures currently opt in for implementing lazy_mmu helpers by > defining __HAVE_ARCH_ENTER_LAZY_MMU_MODE. > > In preparation for introducing a generic lazy_mmu layer that will > require storage in task_struct, let's switch to a cleaner approach: > instead of defining a macro, select a CONFIG option. > > This patch introduces CONFIG_ARCH_HAS_LAZY_MMU_MODE and has each > arch select it when it implements lazy_mmu helpers. > __HAVE_ARCH_ENTER_LAZY_MMU_MODE is removed and > relies on the new CONFIG instead. > > On x86, lazy_mmu helpers are only implemented if PARAVIRT_XXL is > selected. This creates some complications in arch/x86/boot/, because > a few files manually undefine PARAVIRT* options. As a result > does not define the lazy_mmu helpers, but this > breaks the build as only defines them if > !CONFIG_ARCH_HAS_LAZY_MMU_MODE. There does not seem to be a clean > way out of this - let's just undefine that new CONFIG too. > > Signed-off-by: Kevin Brodsky > --- > arch/arm64/Kconfig | 1 + > arch/arm64/include/asm/pgtable.h | 1 - > arch/powerpc/include/asm/book3s/64/tlbflush-hash.h | 2 -- > arch/powerpc/platforms/Kconfig.cputype | 1 + > arch/sparc/Kconfig | 1 + > arch/sparc/include/asm/tlbflush_64.h | 2 -- > arch/x86/Kconfig | 1 + > arch/x86/boot/compressed/misc.h | 1 + > arch/x86/boot/startup/sme.c | 1 + > arch/x86/include/asm/paravirt.h | 1 - > include/linux/pgtable.h | 2 +- > mm/Kconfig | 3 +++ > 12 files changed, 10 insertions(+), 7 deletions(-) > > diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig > index 6663ffd23f25..e6bf5c7311b5 100644 > --- a/arch/arm64/Kconfig > +++ b/arch/arm64/Kconfig > @@ -122,6 +122,7 @@ config ARM64 > select ARCH_WANTS_NO_INSTR > select ARCH_WANTS_THP_SWAP if ARM64_4K_PAGES > select ARCH_HAS_UBSAN > + select ARCH_HAS_LAZY_MMU_MODE nit: This list is mostly in alphabetical order. Further up the list there are a lot of ARCH_HAS_* entries. Perhaps move it to the correct position in that lot? Then ARCH_HAS_UBSAN stays out of order on its own. Otherwise, all looks reasonable to me: Reviewed-by: Ryan Roberts > select ARM_AMBA > select ARM_ARCH_TIMER > select ARM_GIC > diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h > index 0944e296dd4a..54f8d6bb6f22 100644 > --- a/arch/arm64/include/asm/pgtable.h > +++ b/arch/arm64/include/asm/pgtable.h > @@ -80,7 +80,6 @@ static inline void queue_pte_barriers(void) > } > } > > -#define __HAVE_ARCH_ENTER_LAZY_MMU_MODE > static inline void arch_enter_lazy_mmu_mode(void) > { > /* > diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h b/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h > index 7704dbe8e88d..623a8a8b2d0e 100644 > --- a/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h > +++ b/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h > @@ -24,8 +24,6 @@ DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch); > > extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch); > > -#define __HAVE_ARCH_ENTER_LAZY_MMU_MODE > - > static inline void arch_enter_lazy_mmu_mode(void) > { > struct ppc64_tlb_batch *batch; > diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype > index 7b527d18aa5e..2942d57cf59c 100644 > --- a/arch/powerpc/platforms/Kconfig.cputype > +++ b/arch/powerpc/platforms/Kconfig.cputype > @@ -93,6 +93,7 @@ config PPC_BOOK3S_64 > select IRQ_WORK > select PPC_64S_HASH_MMU if !PPC_RADIX_MMU > select KASAN_VMALLOC if KASAN > + select ARCH_HAS_LAZY_MMU_MODE > > config PPC_BOOK3E_64 > bool "Embedded processors" > diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig > index a630d373e645..2bad14744ca4 100644 > --- a/arch/sparc/Kconfig > +++ b/arch/sparc/Kconfig > @@ -112,6 +112,7 @@ config SPARC64 > select NEED_PER_CPU_PAGE_FIRST_CHUNK > select ARCH_SUPPORTS_SCHED_SMT if SMP > select ARCH_SUPPORTS_SCHED_MC if SMP > + select ARCH_HAS_LAZY_MMU_MODE > > config ARCH_PROC_KCORE_TEXT > def_bool y > diff --git a/arch/sparc/include/asm/tlbflush_64.h b/arch/sparc/include/asm/tlbflush_64.h > index 925bb5d7a4e1..4e1036728e2f 100644 > --- a/arch/sparc/include/asm/tlbflush_64.h > +++ b/arch/sparc/include/asm/tlbflush_64.h > @@ -39,8 +39,6 @@ static inline void flush_tlb_range(struct vm_area_struct *vma, > > void flush_tlb_kernel_range(unsigned long start, unsigned long end); > > -#define __HAVE_ARCH_ENTER_LAZY_MMU_MODE > - > void flush_tlb_pending(void); > void arch_enter_lazy_mmu_mode(void); > void arch_flush_lazy_mmu_mode(void); > diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig > index fa3b616af03a..ef4332d720ab 100644 > --- a/arch/x86/Kconfig > +++ b/arch/x86/Kconfig > @@ -804,6 +804,7 @@ config PARAVIRT > config PARAVIRT_XXL > bool > depends on X86_64 > + select ARCH_HAS_LAZY_MMU_MODE > > config PARAVIRT_DEBUG > bool "paravirt-ops debugging" > diff --git a/arch/x86/boot/compressed/misc.h b/arch/x86/boot/compressed/misc.h > index db1048621ea2..cdd7f692d9ee 100644 > --- a/arch/x86/boot/compressed/misc.h > +++ b/arch/x86/boot/compressed/misc.h > @@ -11,6 +11,7 @@ > #undef CONFIG_PARAVIRT > #undef CONFIG_PARAVIRT_XXL > #undef CONFIG_PARAVIRT_SPINLOCKS > +#undef CONFIG_ARCH_HAS_LAZY_MMU_MODE > #undef CONFIG_KASAN > #undef CONFIG_KASAN_GENERIC > > diff --git a/arch/x86/boot/startup/sme.c b/arch/x86/boot/startup/sme.c > index e7ea65f3f1d6..b76a7c95dfe1 100644 > --- a/arch/x86/boot/startup/sme.c > +++ b/arch/x86/boot/startup/sme.c > @@ -24,6 +24,7 @@ > #undef CONFIG_PARAVIRT > #undef CONFIG_PARAVIRT_XXL > #undef CONFIG_PARAVIRT_SPINLOCKS > +#undef CONFIG_ARCH_HAS_LAZY_MMU_MODE > > /* > * This code runs before CPU feature bits are set. By default, the > diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h > index b5e59a7ba0d0..13f9cd31c8f8 100644 > --- a/arch/x86/include/asm/paravirt.h > +++ b/arch/x86/include/asm/paravirt.h > @@ -526,7 +526,6 @@ static inline void arch_end_context_switch(struct task_struct *next) > PVOP_VCALL1(cpu.end_context_switch, next); > } > > -#define __HAVE_ARCH_ENTER_LAZY_MMU_MODE > static inline void arch_enter_lazy_mmu_mode(void) > { > PVOP_VCALL0(mmu.lazy_mode.enter); > diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h > index 32e8457ad535..9894366e768b 100644 > --- a/include/linux/pgtable.h > +++ b/include/linux/pgtable.h > @@ -231,7 +231,7 @@ static inline int pmd_dirty(pmd_t pmd) > * held, but for kernel PTE updates, no lock is held). Nesting is not permitted > * and the mode cannot be used in interrupt context. > */ > -#ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE > +#ifndef CONFIG_ARCH_HAS_LAZY_MMU_MODE > static inline void arch_enter_lazy_mmu_mode(void) {} > static inline void arch_leave_lazy_mmu_mode(void) {} > static inline void arch_flush_lazy_mmu_mode(void) {} > diff --git a/mm/Kconfig b/mm/Kconfig > index 0e26f4fc8717..5480c9a1bfb2 100644 > --- a/mm/Kconfig > +++ b/mm/Kconfig > @@ -1372,6 +1372,9 @@ config PT_RECLAIM > config FIND_NORMAL_PAGE > def_bool n > > +config ARCH_HAS_LAZY_MMU_MODE > + bool > + > source "mm/damon/Kconfig" > > endmenu From xen-devel-bounces@lists.xenproject.org Fri Nov 07 14:26:27 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 07 Nov 2025 14:26:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157608.1486318 (Exim 4.92) (envelope-from ) id 1vHNPw-0000w5-Qu; Fri, 07 Nov 2025 14:26:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157608.1486318; Fri, 07 Nov 2025 14:26:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHNPw-0000vy-NL; Fri, 07 Nov 2025 14:26:20 +0000 Received: by outflank-mailman (input) for mailman id 1157608; Fri, 07 Nov 2025 14:26:20 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHNPv-0000vs-Rn for xen-devel@lists.xenproject.org; Fri, 07 Nov 2025 14:26:19 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id b8fa2580-bbe5-11f0-9d17-b5c5bf9af7f9; Fri, 07 Nov 2025 15:26:17 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1FFD91515; Fri, 7 Nov 2025 06:26:09 -0800 (PST) Received: from [10.57.86.134] (unknown [10.57.86.134]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DCACE3F66E; Fri, 7 Nov 2025 06:26:11 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: b8fa2580-bbe5-11f0-9d17-b5c5bf9af7f9 Message-ID: <71418b31-aedb-4600-9558-842515dd6c44@arm.com> Date: Fri, 7 Nov 2025 14:26:10 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 06/12] mm: introduce generic lazy_mmu helpers Content-Language: en-GB To: Kevin Brodsky , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-7-kevin.brodsky@arm.com> From: Ryan Roberts In-Reply-To: <20251029100909.3381140-7-kevin.brodsky@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 29/10/2025 10:09, Kevin Brodsky wrote: > The implementation of the lazy MMU mode is currently entirely > arch-specific; core code directly calls arch helpers: > arch_{enter,leave}_lazy_mmu_mode(). > > We are about to introduce support for nested lazy MMU sections. > As things stand we'd have to duplicate that logic in every arch > implementing lazy_mmu - adding to a fair amount of logic > already duplicated across lazy_mmu implementations. > > This patch therefore introduces a new generic layer that calls the > existing arch_* helpers. Two pair of calls are introduced: > > * lazy_mmu_mode_enable() ... lazy_mmu_mode_disable() > This is the standard case where the mode is enabled for a given > block of code by surrounding it with enable() and disable() > calls. > > * lazy_mmu_mode_pause() ... lazy_mmu_mode_resume() > This is for situations where the mode is temporarily disabled > by first calling pause() and then resume() (e.g. to prevent any > batching from occurring in a critical section). > > The documentation in will be updated in a > subsequent patch. > > No functional change should be introduced at this stage. > The implementation of enable()/resume() and disable()/pause() is > currently identical, but nesting support will change that. > > Most of the call sites have been updated using the following > Coccinelle script: > > @@ > @@ > { > ... > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_enable(); > ... > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_disable(); > ... > } > > @@ > @@ > { > ... > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_pause(); > ... > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_resume(); > ... > } > > A couple of notes regarding x86: > > * Xen is currently the only case where explicit handling is required > for lazy MMU when context-switching. This is purely an > implementation detail and using the generic lazy_mmu_mode_* > functions would cause trouble when nesting support is introduced, > because the generic functions must be called from the current task. > For that reason we still use arch_leave() and arch_enter() there. > > * x86 calls arch_flush_lazy_mmu_mode() unconditionally in a few > places, but only defines it if PARAVIRT_XXL is selected, and we > are removing the fallback in . Add a new fallback > definition to to keep things building. > > Signed-off-by: Kevin Brodsky > --- > arch/arm64/mm/mmu.c | 4 ++-- > arch/arm64/mm/pageattr.c | 4 ++-- > arch/powerpc/mm/book3s64/hash_tlb.c | 8 +++---- > arch/powerpc/mm/book3s64/subpage_prot.c | 4 ++-- > arch/x86/include/asm/pgtable.h | 3 ++- > fs/proc/task_mmu.c | 4 ++-- > include/linux/pgtable.h | 29 +++++++++++++++++++++---- > mm/kasan/shadow.c | 8 +++---- > mm/madvise.c | 18 +++++++-------- > mm/memory.c | 16 +++++++------- > mm/migrate_device.c | 4 ++-- > mm/mprotect.c | 4 ++-- > mm/mremap.c | 4 ++-- > mm/userfaultfd.c | 4 ++-- > mm/vmalloc.c | 12 +++++----- > mm/vmscan.c | 12 +++++----- > 16 files changed, 80 insertions(+), 58 deletions(-) > > diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c > index b8d37eb037fc..d9c8e94f140f 100644 > --- a/arch/arm64/mm/mmu.c > +++ b/arch/arm64/mm/mmu.c > @@ -731,7 +731,7 @@ int split_kernel_leaf_mapping(unsigned long start, unsigned long end) > return -EINVAL; > > mutex_lock(&pgtable_split_lock); > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_enable(); > > /* > * The split_kernel_leaf_mapping_locked() may sleep, it is not a This is a bit unfortunate, IMHO. The rest of this comment explains that although you're not supposed to sleep inside lazy mmu mode, it's fine for arm64's implementation. But we are no longer calling arm64's implementation; we are calling a generic function, which does who knows what. I think it all still works, but we are no longer containing our assumptions in arm64 code. We are relying on implementation details of generic code. > @@ -753,7 +753,7 @@ int split_kernel_leaf_mapping(unsigned long start, unsigned long end) > ret = split_kernel_leaf_mapping_locked(end); > } > > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_disable(); > mutex_unlock(&pgtable_split_lock); > return ret; > } > diff --git a/arch/arm64/mm/pageattr.c b/arch/arm64/mm/pageattr.c > index 5135f2d66958..e4059f13c4ed 100644 > --- a/arch/arm64/mm/pageattr.c > +++ b/arch/arm64/mm/pageattr.c > @@ -110,7 +110,7 @@ static int update_range_prot(unsigned long start, unsigned long size, > if (WARN_ON_ONCE(ret)) > return ret; > > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_enable(); > > /* > * The caller must ensure that the range we are operating on does not > @@ -119,7 +119,7 @@ static int update_range_prot(unsigned long start, unsigned long size, > */ > ret = walk_kernel_page_table_range_lockless(start, start + size, > &pageattr_ops, NULL, &data); > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_disable(); > > return ret; > } > diff --git a/arch/powerpc/mm/book3s64/hash_tlb.c b/arch/powerpc/mm/book3s64/hash_tlb.c > index 21fcad97ae80..787f7a0e27f0 100644 > --- a/arch/powerpc/mm/book3s64/hash_tlb.c > +++ b/arch/powerpc/mm/book3s64/hash_tlb.c > @@ -205,7 +205,7 @@ void __flush_hash_table_range(unsigned long start, unsigned long end) > * way to do things but is fine for our needs here. > */ > local_irq_save(flags); > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_enable(); > for (; start < end; start += PAGE_SIZE) { > pte_t *ptep = find_init_mm_pte(start, &hugepage_shift); > unsigned long pte; > @@ -217,7 +217,7 @@ void __flush_hash_table_range(unsigned long start, unsigned long end) > continue; > hpte_need_flush(&init_mm, start, ptep, pte, hugepage_shift); > } > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_disable(); > local_irq_restore(flags); > } > > @@ -237,7 +237,7 @@ void flush_hash_table_pmd_range(struct mm_struct *mm, pmd_t *pmd, unsigned long > * way to do things but is fine for our needs here. > */ > local_irq_save(flags); > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_enable(); > start_pte = pte_offset_map(pmd, addr); > if (!start_pte) > goto out; > @@ -249,6 +249,6 @@ void flush_hash_table_pmd_range(struct mm_struct *mm, pmd_t *pmd, unsigned long > } > pte_unmap(start_pte); > out: > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_disable(); > local_irq_restore(flags); > } > diff --git a/arch/powerpc/mm/book3s64/subpage_prot.c b/arch/powerpc/mm/book3s64/subpage_prot.c > index ec98e526167e..07c47673bba2 100644 > --- a/arch/powerpc/mm/book3s64/subpage_prot.c > +++ b/arch/powerpc/mm/book3s64/subpage_prot.c > @@ -73,13 +73,13 @@ static void hpte_flush_range(struct mm_struct *mm, unsigned long addr, > pte = pte_offset_map_lock(mm, pmd, addr, &ptl); > if (!pte) > return; > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_enable(); > for (; npages > 0; --npages) { > pte_update(mm, addr, pte, 0, 0, 0); > addr += PAGE_SIZE; > ++pte; > } > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_disable(); > pte_unmap_unlock(pte - 1, ptl); > } > > diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h > index e33df3da6980..14fd672bc9b2 100644 > --- a/arch/x86/include/asm/pgtable.h > +++ b/arch/x86/include/asm/pgtable.h > @@ -117,7 +117,8 @@ extern pmdval_t early_pmd_flags; > #define pte_val(x) native_pte_val(x) > #define __pte(x) native_make_pte(x) > > -#define arch_end_context_switch(prev) do {} while(0) > +#define arch_end_context_switch(prev) do {} while (0) > +#define arch_flush_lazy_mmu_mode() do {} while (0) Andrew converted over the default version of this (which you have removed with this commit) to be static inline instead of the do/while guff. Perhaps you should try to preserve that improvement here? See Commit d02ac836e4d6 ("include/linux/pgtable.h: convert arch_enter_lazy_mmu_mode() and friends to static inlines") > #endif /* CONFIG_PARAVIRT_XXL */ > > static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set) > diff --git a/fs/proc/task_mmu.c b/fs/proc/task_mmu.c > index fc35a0543f01..d16ba1d32169 100644 > --- a/fs/proc/task_mmu.c > +++ b/fs/proc/task_mmu.c > @@ -2703,7 +2703,7 @@ static int pagemap_scan_pmd_entry(pmd_t *pmd, unsigned long start, > return 0; > } > > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_enable(); > > if ((p->arg.flags & PM_SCAN_WP_MATCHING) && !p->vec_out) { > /* Fast path for performing exclusive WP */ > @@ -2773,7 +2773,7 @@ static int pagemap_scan_pmd_entry(pmd_t *pmd, unsigned long start, > if (flush_end) > flush_tlb_range(vma, start, addr); > > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_disable(); > pte_unmap_unlock(start_pte, ptl); > > cond_resched(); > diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h > index 9894366e768b..b5fdf32c437f 100644 > --- a/include/linux/pgtable.h > +++ b/include/linux/pgtable.h > @@ -231,10 +231,31 @@ static inline int pmd_dirty(pmd_t pmd) > * held, but for kernel PTE updates, no lock is held). Nesting is not permitted > * and the mode cannot be used in interrupt context. > */ > -#ifndef CONFIG_ARCH_HAS_LAZY_MMU_MODE > -static inline void arch_enter_lazy_mmu_mode(void) {} > -static inline void arch_leave_lazy_mmu_mode(void) {} > -static inline void arch_flush_lazy_mmu_mode(void) {} > +#ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE > +static inline void lazy_mmu_mode_enable(void) > +{ > + arch_enter_lazy_mmu_mode(); > +} > + > +static inline void lazy_mmu_mode_disable(void) > +{ > + arch_leave_lazy_mmu_mode(); > +} > + > +static inline void lazy_mmu_mode_pause(void) > +{ > + arch_leave_lazy_mmu_mode(); > +} > + > +static inline void lazy_mmu_mode_resume(void) > +{ > + arch_enter_lazy_mmu_mode(); > +} It would be good to add documentation blocks for each of these. > +#else > +static inline void lazy_mmu_mode_enable(void) {} > +static inline void lazy_mmu_mode_disable(void) {} > +static inline void lazy_mmu_mode_pause(void) {} > +static inline void lazy_mmu_mode_resume(void) {} > #endif > > #ifndef pte_batch_hint > diff --git a/mm/kasan/shadow.c b/mm/kasan/shadow.c > index 5d2a876035d6..c49b029d3593 100644 > --- a/mm/kasan/shadow.c > +++ b/mm/kasan/shadow.c > @@ -305,7 +305,7 @@ static int kasan_populate_vmalloc_pte(pte_t *ptep, unsigned long addr, > pte_t pte; > int index; > > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_pause(); I wonder if there really are use cases that *require* pause/resume? I think these kasan cases could be correctly implemented using a new nest level instead? Are there cases where the effects really need to be immediate or do the effects just need to be visible when you get to where the resume is? If the latter, that could just be turned into a nested disable (e.g. a flush). In this case, there is only 1 PTE write so no benefit, but I wonder if other cases may have more PTE writes that could then still be batched. It would be nice to simplify the API by removing pause/resume if we can? Thanks, Ryan > > index = PFN_DOWN(addr - data->start); > page = data->pages[index]; > @@ -319,7 +319,7 @@ static int kasan_populate_vmalloc_pte(pte_t *ptep, unsigned long addr, > } > spin_unlock(&init_mm.page_table_lock); > > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_resume(); > > return 0; > } > @@ -482,7 +482,7 @@ static int kasan_depopulate_vmalloc_pte(pte_t *ptep, unsigned long addr, > pte_t pte; > int none; > > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_pause(); > > spin_lock(&init_mm.page_table_lock); > pte = ptep_get(ptep); > @@ -494,7 +494,7 @@ static int kasan_depopulate_vmalloc_pte(pte_t *ptep, unsigned long addr, > if (likely(!none)) > __free_page(pfn_to_page(pte_pfn(pte))); > > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_resume(); > > return 0; > } > diff --git a/mm/madvise.c b/mm/madvise.c > index fb1c86e630b6..536026772160 100644 > --- a/mm/madvise.c > +++ b/mm/madvise.c > @@ -455,7 +455,7 @@ static int madvise_cold_or_pageout_pte_range(pmd_t *pmd, > if (!start_pte) > return 0; > flush_tlb_batched_pending(mm); > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_enable(); > for (; addr < end; pte += nr, addr += nr * PAGE_SIZE) { > nr = 1; > ptent = ptep_get(pte); > @@ -463,7 +463,7 @@ static int madvise_cold_or_pageout_pte_range(pmd_t *pmd, > if (++batch_count == SWAP_CLUSTER_MAX) { > batch_count = 0; > if (need_resched()) { > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_disable(); > pte_unmap_unlock(start_pte, ptl); > cond_resched(); > goto restart; > @@ -499,7 +499,7 @@ static int madvise_cold_or_pageout_pte_range(pmd_t *pmd, > if (!folio_trylock(folio)) > continue; > folio_get(folio); > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_disable(); > pte_unmap_unlock(start_pte, ptl); > start_pte = NULL; > err = split_folio(folio); > @@ -510,7 +510,7 @@ static int madvise_cold_or_pageout_pte_range(pmd_t *pmd, > if (!start_pte) > break; > flush_tlb_batched_pending(mm); > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_enable(); > if (!err) > nr = 0; > continue; > @@ -558,7 +558,7 @@ static int madvise_cold_or_pageout_pte_range(pmd_t *pmd, > } > > if (start_pte) { > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_disable(); > pte_unmap_unlock(start_pte, ptl); > } > if (pageout) > @@ -677,7 +677,7 @@ static int madvise_free_pte_range(pmd_t *pmd, unsigned long addr, > if (!start_pte) > return 0; > flush_tlb_batched_pending(mm); > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_enable(); > for (; addr != end; pte += nr, addr += PAGE_SIZE * nr) { > nr = 1; > ptent = ptep_get(pte); > @@ -727,7 +727,7 @@ static int madvise_free_pte_range(pmd_t *pmd, unsigned long addr, > if (!folio_trylock(folio)) > continue; > folio_get(folio); > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_disable(); > pte_unmap_unlock(start_pte, ptl); > start_pte = NULL; > err = split_folio(folio); > @@ -738,7 +738,7 @@ static int madvise_free_pte_range(pmd_t *pmd, unsigned long addr, > if (!start_pte) > break; > flush_tlb_batched_pending(mm); > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_enable(); > if (!err) > nr = 0; > continue; > @@ -778,7 +778,7 @@ static int madvise_free_pte_range(pmd_t *pmd, unsigned long addr, > if (nr_swap) > add_mm_counter(mm, MM_SWAPENTS, nr_swap); > if (start_pte) { > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_disable(); > pte_unmap_unlock(start_pte, ptl); > } > cond_resched(); > diff --git a/mm/memory.c b/mm/memory.c > index 74b45e258323..2d662dee5ae7 100644 > --- a/mm/memory.c > +++ b/mm/memory.c > @@ -1254,7 +1254,7 @@ copy_pte_range(struct vm_area_struct *dst_vma, struct vm_area_struct *src_vma, > spin_lock_nested(src_ptl, SINGLE_DEPTH_NESTING); > orig_src_pte = src_pte; > orig_dst_pte = dst_pte; > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_enable(); > > do { > nr = 1; > @@ -1323,7 +1323,7 @@ copy_pte_range(struct vm_area_struct *dst_vma, struct vm_area_struct *src_vma, > } while (dst_pte += nr, src_pte += nr, addr += PAGE_SIZE * nr, > addr != end); > > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_disable(); > pte_unmap_unlock(orig_src_pte, src_ptl); > add_mm_rss_vec(dst_mm, rss); > pte_unmap_unlock(orig_dst_pte, dst_ptl); > @@ -1842,7 +1842,7 @@ static unsigned long zap_pte_range(struct mmu_gather *tlb, > return addr; > > flush_tlb_batched_pending(mm); > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_enable(); > do { > bool any_skipped = false; > > @@ -1874,7 +1874,7 @@ static unsigned long zap_pte_range(struct mmu_gather *tlb, > direct_reclaim = try_get_and_clear_pmd(mm, pmd, &pmdval); > > add_mm_rss_vec(mm, rss); > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_disable(); > > /* Do the actual TLB flush before dropping ptl */ > if (force_flush) { > @@ -2817,7 +2817,7 @@ static int remap_pte_range(struct mm_struct *mm, pmd_t *pmd, > mapped_pte = pte = pte_alloc_map_lock(mm, pmd, addr, &ptl); > if (!pte) > return -ENOMEM; > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_enable(); > do { > BUG_ON(!pte_none(ptep_get(pte))); > if (!pfn_modify_allowed(pfn, prot)) { > @@ -2827,7 +2827,7 @@ static int remap_pte_range(struct mm_struct *mm, pmd_t *pmd, > set_pte_at(mm, addr, pte, pte_mkspecial(pfn_pte(pfn, prot))); > pfn++; > } while (pte++, addr += PAGE_SIZE, addr != end); > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_disable(); > pte_unmap_unlock(mapped_pte, ptl); > return err; > } > @@ -3134,7 +3134,7 @@ static int apply_to_pte_range(struct mm_struct *mm, pmd_t *pmd, > return -EINVAL; > } > > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_enable(); > > if (fn) { > do { > @@ -3147,7 +3147,7 @@ static int apply_to_pte_range(struct mm_struct *mm, pmd_t *pmd, > } > *mask |= PGTBL_PTE_MODIFIED; > > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_disable(); > > if (mm != &init_mm) > pte_unmap_unlock(mapped_pte, ptl); > diff --git a/mm/migrate_device.c b/mm/migrate_device.c > index abd9f6850db6..dcdc46b96cc7 100644 > --- a/mm/migrate_device.c > +++ b/mm/migrate_device.c > @@ -110,7 +110,7 @@ static int migrate_vma_collect_pmd(pmd_t *pmdp, > ptep = pte_offset_map_lock(mm, pmdp, addr, &ptl); > if (!ptep) > goto again; > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_enable(); > > for (; addr < end; addr += PAGE_SIZE, ptep++) { > struct dev_pagemap *pgmap; > @@ -287,7 +287,7 @@ static int migrate_vma_collect_pmd(pmd_t *pmdp, > if (unmapped) > flush_tlb_range(walk->vma, start, end); > > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_disable(); > pte_unmap_unlock(ptep - 1, ptl); > > return 0; > diff --git a/mm/mprotect.c b/mm/mprotect.c > index 113b48985834..bcb183a6fd2f 100644 > --- a/mm/mprotect.c > +++ b/mm/mprotect.c > @@ -293,7 +293,7 @@ static long change_pte_range(struct mmu_gather *tlb, > target_node = numa_node_id(); > > flush_tlb_batched_pending(vma->vm_mm); > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_enable(); > do { > nr_ptes = 1; > oldpte = ptep_get(pte); > @@ -439,7 +439,7 @@ static long change_pte_range(struct mmu_gather *tlb, > } > } > } while (pte += nr_ptes, addr += nr_ptes * PAGE_SIZE, addr != end); > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_disable(); > pte_unmap_unlock(pte - 1, ptl); > > return pages; > diff --git a/mm/mremap.c b/mm/mremap.c > index bd7314898ec5..a2e2cd8f279a 100644 > --- a/mm/mremap.c > +++ b/mm/mremap.c > @@ -256,7 +256,7 @@ static int move_ptes(struct pagetable_move_control *pmc, > if (new_ptl != old_ptl) > spin_lock_nested(new_ptl, SINGLE_DEPTH_NESTING); > flush_tlb_batched_pending(vma->vm_mm); > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_enable(); > > for (; old_addr < old_end; old_ptep += nr_ptes, old_addr += nr_ptes * PAGE_SIZE, > new_ptep += nr_ptes, new_addr += nr_ptes * PAGE_SIZE) { > @@ -301,7 +301,7 @@ static int move_ptes(struct pagetable_move_control *pmc, > } > } > > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_disable(); > if (force_flush) > flush_tlb_range(vma, old_end - len, old_end); > if (new_ptl != old_ptl) > diff --git a/mm/userfaultfd.c b/mm/userfaultfd.c > index af61b95c89e4..e01f7813e15c 100644 > --- a/mm/userfaultfd.c > +++ b/mm/userfaultfd.c > @@ -1100,7 +1100,7 @@ static long move_present_ptes(struct mm_struct *mm, > /* It's safe to drop the reference now as the page-table is holding one. */ > folio_put(*first_src_folio); > *first_src_folio = NULL; > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_enable(); > > while (true) { > orig_src_pte = ptep_get_and_clear(mm, src_addr, src_pte); > @@ -1138,7 +1138,7 @@ static long move_present_ptes(struct mm_struct *mm, > break; > } > > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_disable(); > if (src_addr > src_start) > flush_tlb_range(src_vma, src_start, src_addr); > > diff --git a/mm/vmalloc.c b/mm/vmalloc.c > index 798b2ed21e46..b9940590a40d 100644 > --- a/mm/vmalloc.c > +++ b/mm/vmalloc.c > @@ -105,7 +105,7 @@ static int vmap_pte_range(pmd_t *pmd, unsigned long addr, unsigned long end, > if (!pte) > return -ENOMEM; > > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_enable(); > > do { > if (unlikely(!pte_none(ptep_get(pte)))) { > @@ -131,7 +131,7 @@ static int vmap_pte_range(pmd_t *pmd, unsigned long addr, unsigned long end, > pfn++; > } while (pte += PFN_DOWN(size), addr += size, addr != end); > > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_disable(); > *mask |= PGTBL_PTE_MODIFIED; > return 0; > } > @@ -359,7 +359,7 @@ static void vunmap_pte_range(pmd_t *pmd, unsigned long addr, unsigned long end, > unsigned long size = PAGE_SIZE; > > pte = pte_offset_kernel(pmd, addr); > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_enable(); > > do { > #ifdef CONFIG_HUGETLB_PAGE > @@ -378,7 +378,7 @@ static void vunmap_pte_range(pmd_t *pmd, unsigned long addr, unsigned long end, > WARN_ON(!pte_none(ptent) && !pte_present(ptent)); > } while (pte += (size >> PAGE_SHIFT), addr += size, addr != end); > > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_disable(); > *mask |= PGTBL_PTE_MODIFIED; > } > > @@ -526,7 +526,7 @@ static int vmap_pages_pte_range(pmd_t *pmd, unsigned long addr, > if (!pte) > return -ENOMEM; > > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_enable(); > > do { > struct page *page = pages[*nr]; > @@ -548,7 +548,7 @@ static int vmap_pages_pte_range(pmd_t *pmd, unsigned long addr, > (*nr)++; > } while (pte++, addr += PAGE_SIZE, addr != end); > > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_disable(); > *mask |= PGTBL_PTE_MODIFIED; > > return err; > diff --git a/mm/vmscan.c b/mm/vmscan.c > index b2fc8b626d3d..7d2d87069530 100644 > --- a/mm/vmscan.c > +++ b/mm/vmscan.c > @@ -3551,7 +3551,7 @@ static bool walk_pte_range(pmd_t *pmd, unsigned long start, unsigned long end, > return false; > } > > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_enable(); > restart: > for (i = pte_index(start), addr = start; addr != end; i++, addr += PAGE_SIZE) { > unsigned long pfn; > @@ -3592,7 +3592,7 @@ static bool walk_pte_range(pmd_t *pmd, unsigned long start, unsigned long end, > if (i < PTRS_PER_PTE && get_next_vma(PMD_MASK, PAGE_SIZE, args, &start, &end)) > goto restart; > > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_disable(); > pte_unmap_unlock(pte, ptl); > > return suitable_to_scan(total, young); > @@ -3633,7 +3633,7 @@ static void walk_pmd_range_locked(pud_t *pud, unsigned long addr, struct vm_area > if (!spin_trylock(ptl)) > goto done; > > - arch_enter_lazy_mmu_mode(); > + lazy_mmu_mode_enable(); > > do { > unsigned long pfn; > @@ -3680,7 +3680,7 @@ static void walk_pmd_range_locked(pud_t *pud, unsigned long addr, struct vm_area > > walk_update_folio(walk, last, gen, dirty); > > - arch_leave_lazy_mmu_mode(); > + lazy_mmu_mode_disable(); > spin_unlock(ptl); > done: > *first = -1; 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Fri, 07 Nov 2025 06:30:40 -0800 (PST) Message-ID: <52dcf4d1-69b7-437d-a01a-eec33f4535dd@suse.com> Date: Fri, 7 Nov 2025 15:30:39 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/ucode: Add extra rows to the entrysign model table To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Xen-devel , Oleksii Kurochko References: <20251107134729.20735-1-andrew.cooper3@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251107134729.20735-1-andrew.cooper3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 07.11.2025 14:47, Andrew Cooper wrote: > Link: https://git.kernel.org/tip/d23550efc6800841b4d1639784afaebdea946ae0 > Fixes: ff8228ab4658 ("x86/ucode: Relax digest check when Entrysign is fixed in firmware") > Signed-off-by: Andrew Cooper Acked-by: Jan Beulich Pretty likely wants to go into 4.21? Cc-ing Oleksii, for him to judge. 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Cc-ing Oleksii, for him to judge. Yes, and backporting, but I've got more ucode bugfixes I'm working on. One in particular was always broken, but exasperated by one of my recent changes, but I'm not sure if the result is going to be comfortable for 4.21 at this juncture. ~Andrew From xen-devel-bounces@lists.xenproject.org Fri Nov 07 15:00:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 07 Nov 2025 15:00:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157649.1486347 (Exim 4.92) (envelope-from ) id 1vHNwe-0006x8-Sm; Fri, 07 Nov 2025 15:00:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157649.1486347; Fri, 07 Nov 2025 15:00:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHNwe-0006x1-QD; Fri, 07 Nov 2025 15:00:08 +0000 Received: by outflank-mailman (input) for mailman id 1157649; Fri, 07 Nov 2025 15:00:07 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHNwd-0006wv-MT for xen-devel@lists.xenproject.org; Fri, 07 Nov 2025 15:00:07 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 6ee8d330-bbea-11f0-980a-7dc792cee155; Fri, 07 Nov 2025 16:00:01 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 35D311515; Fri, 7 Nov 2025 06:59:52 -0800 (PST) Received: from [10.57.86.134] (unknown [10.57.86.134]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 611CD3F694; Fri, 7 Nov 2025 06:59:55 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 6ee8d330-bbea-11f0-980a-7dc792cee155 Message-ID: <999feffa-5d1d-42e3-bd3a-d949f2a9de9d@arm.com> Date: Fri, 7 Nov 2025 14:59:53 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 07/12] mm: enable lazy_mmu sections to nest Content-Language: en-GB To: Kevin Brodsky , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-8-kevin.brodsky@arm.com> From: Ryan Roberts In-Reply-To: <20251029100909.3381140-8-kevin.brodsky@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 29/10/2025 10:09, Kevin Brodsky wrote: > Despite recent efforts to prevent lazy_mmu sections from nesting, it > remains difficult to ensure that it never occurs - and in fact it > does occur on arm64 in certain situations (CONFIG_DEBUG_PAGEALLOC). > Commit 1ef3095b1405 ("arm64/mm: Permit lazy_mmu_mode to be nested") > made nesting tolerable on arm64, but without truly supporting it: > the inner call to leave() disables the batching optimisation before > the outer section ends. > > This patch actually enables lazy_mmu sections to nest by tracking > the nesting level in task_struct, in a similar fashion to e.g. > pagefault_{enable,disable}(). This is fully handled by the generic > lazy_mmu helpers that were recently introduced. > > lazy_mmu sections were not initially intended to nest, so we need to > clarify the semantics w.r.t. the arch_*_lazy_mmu_mode() callbacks. > This patch takes the following approach: > > * The outermost calls to lazy_mmu_mode_{enable,disable}() trigger > calls to arch_{enter,leave}_lazy_mmu_mode() - this is unchanged. > > * Nested calls to lazy_mmu_mode_{enable,disable}() are not forwarded > to the arch via arch_{enter,leave} - lazy MMU remains enabled so > the assumption is that these callbacks are not relevant. However, > existing code may rely on a call to disable() to flush any batched > state, regardless of nesting. arch_flush_lazy_mmu_mode() is > therefore called in that situation. > > A separate interface was recently introduced to temporarily pause > the lazy MMU mode: lazy_mmu_mode_{pause,resume}(). pause() fully > exits the mode *regardless of the nesting level*, and resume() > restores the mode at the same nesting level. > > Whether the mode is actually enabled or not at any point is tracked > by a separate "active" field in task_struct; this makes it possible > to check invariants in the generic API, and to expose a new > in_lazy_mmu_mode() helper to replace the various ways arch's > currently track whether the mode is enabled (this will be done in > later patches). > > In summary (nesting/active represent the values *after* the call): > > lazy_mmu_mode_enable() -> arch_enter() nesting=1 active=1 > lazy_mmu_mode_enable() -> ø nesting=2 active=1 > lazy_mmu_mode_pause() -> arch_leave() nesting=2 active=0 > lazy_mmu_mode_resume() -> arch_enter() nesting=2 active=1 > lazy_mmu_mode_disable() -> arch_flush() nesting=1 active=1 > lazy_mmu_mode_disable() -> arch_leave() nesting=0 active=0 > > Note: in_lazy_mmu_mode() is added to to allow arch > headers included by to use it. > > Signed-off-by: Kevin Brodsky > --- > arch/arm64/include/asm/pgtable.h | 12 ------ > include/linux/mm_types_task.h | 5 +++ > include/linux/pgtable.h | 67 ++++++++++++++++++++++++++++++-- > include/linux/sched.h | 16 ++++++++ > 4 files changed, 84 insertions(+), 16 deletions(-) > > diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h > index 54f8d6bb6f22..535435248923 100644 > --- a/arch/arm64/include/asm/pgtable.h > +++ b/arch/arm64/include/asm/pgtable.h > @@ -82,18 +82,6 @@ static inline void queue_pte_barriers(void) > > static inline void arch_enter_lazy_mmu_mode(void) > { > - /* > - * lazy_mmu_mode is not supposed to permit nesting. But in practice this > - * does happen with CONFIG_DEBUG_PAGEALLOC, where a page allocation > - * inside a lazy_mmu_mode section (such as zap_pte_range()) will change > - * permissions on the linear map with apply_to_page_range(), which > - * re-enters lazy_mmu_mode. So we tolerate nesting in our > - * implementation. The first call to arch_leave_lazy_mmu_mode() will > - * flush and clear the flag such that the remainder of the work in the > - * outer nest behaves as if outside of lazy mmu mode. This is safe and > - * keeps tracking simple. > - */ > - > if (in_interrupt()) > return; > > diff --git a/include/linux/mm_types_task.h b/include/linux/mm_types_task.h > index a82aa80c0ba4..632d404f8191 100644 > --- a/include/linux/mm_types_task.h > +++ b/include/linux/mm_types_task.h > @@ -88,4 +88,9 @@ struct tlbflush_unmap_batch { > #endif > }; > > +struct lazy_mmu_state { > + u8 nesting_level; > + bool active; > +}; > + > #endif /* _LINUX_MM_TYPES_TASK_H */ > diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h > index b5fdf32c437f..e6064e00b22d 100644 > --- a/include/linux/pgtable.h > +++ b/include/linux/pgtable.h > @@ -228,27 +228,86 @@ static inline int pmd_dirty(pmd_t pmd) > * of the lazy mode. So the implementation must assume preemption may be enabled > * and cpu migration is possible; it must take steps to be robust against this. > * (In practice, for user PTE updates, the appropriate page table lock(s) are > - * held, but for kernel PTE updates, no lock is held). Nesting is not permitted > - * and the mode cannot be used in interrupt context. > + * held, but for kernel PTE updates, no lock is held). The mode cannot be used > + * in interrupt context. "The mode cannot be used in interrupt context"; except it is for arm64. KFENCE and/or DEBUG_PAGEALLOC will request the arch to change linear map permissions, which will enter lazy mmu (now using the new generic API). This can happen in softirq context. > + * > + * The lazy MMU mode is enabled for a given block of code using: > + * > + * lazy_mmu_mode_enable(); > + * > + * lazy_mmu_mode_disable(); > + * > + * Nesting is permitted: may itself use an enable()/disable() pair. > + * A nested call to enable() has no functional effect; however disable() causes > + * any batched architectural state to be flushed regardless of nesting. After a > + * call to disable(), the caller can therefore rely on all previous page table > + * modifications to have taken effect, but the lazy MMU mode may still be > + * enabled. > + * > + * In certain cases, it may be desirable to temporarily pause the lazy MMU mode. > + * This can be done using: > + * > + * lazy_mmu_mode_pause(); > + * > + * lazy_mmu_mode_resume(); > + * > + * This sequence must only be used if the lazy MMU mode is already enabled. > + * pause() ensures that the mode is exited regardless of the nesting level; > + * resume() re-enters the mode at the same nesting level. must not modify > + * the lazy MMU state (i.e. it must not call any of the lazy_mmu_mode_* > + * helpers). > + * > + * in_lazy_mmu_mode() can be used to check whether the lazy MMU mode is > + * currently enabled. > */ Nice documentation! > #ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE > static inline void lazy_mmu_mode_enable(void) > { > - arch_enter_lazy_mmu_mode(); > + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; > + > + VM_WARN_ON_ONCE(state->nesting_level == U8_MAX); > + /* enable() must not be called while paused */ > + VM_WARN_ON(state->nesting_level > 0 && !state->active); > + > + if (state->nesting_level++ == 0) { Hmm... for the arm64 case of calling this in an interrupt, Is it safe? If a task is calling this function and gets interrupted here, nesting_level==1 but active==false. The interrupt then calls this function and increments from 1 to 2 but arch_enter_lazy_mmu_mode() hasn't been called. More dangerously (I think), when the interrupt handler calls lazy_mmu_mode_disable(), it will end up calling arch_flush_lazy_mmu_mode() which could be an issue because as far as the arch is concerned, it's not in lazy mode. The current arm64 implementation works because setting and clearing the thread flags is atomic. Perhaps you need to disable preemption around the if block? > + state->active = true; > + arch_enter_lazy_mmu_mode(); > + } > } > > static inline void lazy_mmu_mode_disable(void) > { > - arch_leave_lazy_mmu_mode(); > + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; > + > + VM_WARN_ON_ONCE(state->nesting_level == 0); > + VM_WARN_ON(!state->active); > + > + if (--state->nesting_level == 0) { > + state->active = false; > + arch_leave_lazy_mmu_mode(); > + } else { > + /* Exiting a nested section */ > + arch_flush_lazy_mmu_mode(); > + } > } > > static inline void lazy_mmu_mode_pause(void) > { > + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; > + > + VM_WARN_ON(state->nesting_level == 0 || !state->active); nit: do you need the first condition? I think when nesting_level==0, we expect to be !active? > + > + state->active = false; > arch_leave_lazy_mmu_mode(); > } > > static inline void lazy_mmu_mode_resume(void) > { > + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; > + > + VM_WARN_ON(state->nesting_level == 0 || state->active); Similar argument? > + > + state->active = true; > arch_enter_lazy_mmu_mode(); > } > #else > diff --git a/include/linux/sched.h b/include/linux/sched.h > index cbb7340c5866..11566d973f42 100644 > --- a/include/linux/sched.h > +++ b/include/linux/sched.h > @@ -1441,6 +1441,10 @@ struct task_struct { > > struct page_frag task_frag; > > +#ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE > + struct lazy_mmu_state lazy_mmu_state; > +#endif > + > #ifdef CONFIG_TASK_DELAY_ACCT > struct task_delay_info *delays; > #endif > @@ -1724,6 +1728,18 @@ static inline char task_state_to_char(struct task_struct *tsk) > return task_index_to_char(task_state_index(tsk)); > } > > +#ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE > +static inline bool in_lazy_mmu_mode(void) > +{ > + return current->lazy_mmu_state.active; > +} > +#else > +static inline bool in_lazy_mmu_mode(void) > +{ > + return false; Just pointing out that this isn't really a correct implementation: lazy_mmu_mode_enable() ASSERT(in_lazy_mmu_mode()) << triggers for arches without lazy mmu lazy_mmu_mode_disable() Although it probably doesn't matter in practice? Thanks, Ryan > +} > +#endif > + > extern struct pid *cad_pid; > > /* From xen-devel-bounces@lists.xenproject.org Fri Nov 07 15:05:05 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 07 Nov 2025 15:05:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157663.1486358 (Exim 4.92) (envelope-from ) id 1vHO1Q-0007Ws-FD; Fri, 07 Nov 2025 15:05:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157663.1486358; Fri, 07 Nov 2025 15:05:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHO1Q-0007Wl-Bu; Fri, 07 Nov 2025 15:05:04 +0000 Received: by outflank-mailman (input) for mailman id 1157663; Fri, 07 Nov 2025 15:05:03 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHO1P-0007Wa-89 for xen-devel@lists.xenproject.org; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AS2PR03MB8907.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: d2a6db04-9824-47b1-be94-08de1e0f0547 X-MS-Exchange-CrossTenant-originalarrivaltime: 07 Nov 2025 15:04:59.4622 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: zWdTWHlBxL/wiKu6m4mu1kMJMD6l1iaqH+qMxCVE3JShI4p2zu9Ka2Kxf15Gc7ZAvXE89XJ4CIctwbOyudDE2nMRi40PI66XiWDEXpIVw1I= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR03MB7605 From: Grygorii Strashko The cache disable mode code (hvm_shadow_handle_cd()) is relevant only for I= ntel VT-x (VMX), hence: - move hvm_shadow_handle_cd()/ hvm_set_uc_mode()/domain_exit_uc_mode() in V= MX code - account for SHADOW_PAGING when use hvm_shadow_handle_cd() - move cache disable mode data into VMX specific structures Based on discussion [1]. [1] https://patchwork.kernel.org/project/xen-devel/patch/20251023151903.560= 947-1-grygorii_strashko@epam.com/ v1: https://patchwork.kernel.org/project/xen-devel/cover/20251029235448.602= 380-1-grygorii_strashko@epam.com/ Grygorii Strashko (3): x86/hvm: move hvm_shadow_handle_cd() to vmx code x86/hvm: vmx: account for SHADOW_PAGING when use hvm_shadow_handle_cd() x86/hvm: vmx: refactor cache disable mode data xen/arch/x86/hvm/hvm.c | 59 -------------------- xen/arch/x86/hvm/vmx/vmx.c | 73 +++++++++++++++++++++++-- xen/arch/x86/include/asm/hvm/domain.h | 6 -- xen/arch/x86/include/asm/hvm/hvm.h | 3 + xen/arch/x86/include/asm/hvm/support.h | 2 - xen/arch/x86/include/asm/hvm/vcpu.h | 3 - xen/arch/x86/include/asm/hvm/vmx/vmcs.h | 13 +++++ xen/arch/x86/include/asm/mtrr.h | 3 - xen/arch/x86/mm/shadow/multi.c | 2 +- 9 files changed, 85 insertions(+), 79 deletions(-) --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Fri Nov 07 15:05:05 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 07 Nov 2025 15:05:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157664.1486364 (Exim 4.92) (envelope-from ) id 1vHO1Q-0007ab-O0; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AS2PR03MB8907.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 4b4f7f08-54c4-45f1-538f-08de1e0f05cd X-MS-Exchange-CrossTenant-originalarrivaltime: 07 Nov 2025 15:05:00.3744 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Uuk/r+JUyJNIqjj9opMYhATCbp1glxnJIPrvF5h7nMdZ7sr6BvxhzBIuuwhmatMpxx6SalBcVpV5SNZVELJTJB2f+V91Pgmo5QPby0IgLo0= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR03MB7605 From: Grygorii Strashko Functions: hvm_shadow_handle_cd() hvm_set_uc_mode() domain_exit_uc_mode() are used only by Intel VMX code, so move them to VMX code. While here: - minor format change in domain_exit_uc_mode() - s/(0/1)/(false/true) for bool types - use "struct domain *" as parameter in hvm_set_uc_mode() - use "struct domain *d" as local var in hvm_shadow_handle_cd() No functional changes. Signed-off-by: Grygorii Strashko --- changes in v2: - use "struct domain *" as parameter in hvm_set_uc_mode() - use "struct domain *d" as local var in hvm_shadow_handle_cd() - move code before vmx_handle_cd() xen/arch/x86/hvm/hvm.c | 58 ------------------------ xen/arch/x86/hvm/vmx/vmx.c | 61 ++++++++++++++++++++++++++ xen/arch/x86/include/asm/hvm/support.h | 2 - 3 files changed, 61 insertions(+), 60 deletions(-) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index da3cde1ff0e6..9caca93e5f56 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -2168,30 +2168,6 @@ int hvm_set_efer(uint64_t value) return X86EMUL_OKAY; } =20 -/* Exit UC mode only if all VCPUs agree on MTRR/PAT and are not in no_fill= . */ -static bool domain_exit_uc_mode(struct vcpu *v) -{ - struct domain *d =3D v->domain; - struct vcpu *vs; - - for_each_vcpu ( d, vs ) - { - if ( (vs =3D=3D v) || !vs->is_initialised ) - continue; - if ( (vs->arch.hvm.cache_mode =3D=3D NO_FILL_CACHE_MODE) || - mtrr_pat_not_equal(vs, v) ) - return 0; - } - - return 1; -} - -static void hvm_set_uc_mode(struct vcpu *v, bool is_in_uc_mode) -{ - v->domain->arch.hvm.is_in_uc_mode =3D is_in_uc_mode; - shadow_blow_tables_per_domain(v->domain); -} - int hvm_mov_to_cr(unsigned int cr, unsigned int gpr) { struct vcpu *curr =3D current; @@ -2273,40 +2249,6 @@ int hvm_mov_from_cr(unsigned int cr, unsigned int gp= r) return X86EMUL_UNHANDLEABLE; } =20 -void hvm_shadow_handle_cd(struct vcpu *v, unsigned long value) -{ - if ( value & X86_CR0_CD ) - { - /* Entering no fill cache mode. */ - spin_lock(&v->domain->arch.hvm.uc_lock); - v->arch.hvm.cache_mode =3D NO_FILL_CACHE_MODE; - - if ( !v->domain->arch.hvm.is_in_uc_mode ) - { - domain_pause_nosync(v->domain); - - /* Flush physical caches. */ - flush_all(FLUSH_CACHE_EVICT); - hvm_set_uc_mode(v, 1); - - domain_unpause(v->domain); - } - spin_unlock(&v->domain->arch.hvm.uc_lock); - } - else if ( !(value & X86_CR0_CD) && - (v->arch.hvm.cache_mode =3D=3D NO_FILL_CACHE_MODE) ) - { - /* Exit from no fill cache mode. */ - spin_lock(&v->domain->arch.hvm.uc_lock); - v->arch.hvm.cache_mode =3D NORMAL_CACHE_MODE; - - if ( domain_exit_uc_mode(v) ) - hvm_set_uc_mode(v, 0); - - spin_unlock(&v->domain->arch.hvm.uc_lock); - } -} - static void hvm_update_cr(struct vcpu *v, unsigned int cr, unsigned long v= alue) { v->arch.hvm.guest_cr[cr] =3D value; diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 6f2cc635e582..d7efd0a73add 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -44,6 +44,7 @@ #include #include #include +#include #include #include #include @@ -1451,6 +1452,66 @@ static int cf_check vmx_get_guest_pat(struct vcpu *v= , u64 *gpat) return 1; } =20 +/* Exit UC mode only if all VCPUs agree on MTRR/PAT and are not in no_fill= . */ +static bool domain_exit_uc_mode(struct vcpu *v) +{ + struct domain *d =3D v->domain; + struct vcpu *vs; + + for_each_vcpu(d, vs) + { + if ( (vs =3D=3D v) || !vs->is_initialised ) + continue; + if ( (vs->arch.hvm.cache_mode =3D=3D NO_FILL_CACHE_MODE) || + mtrr_pat_not_equal(vs, v) ) + return false; + } + + return true; +} + +static void hvm_set_uc_mode(struct domain *d, bool is_in_uc_mode) +{ + d->arch.hvm.is_in_uc_mode =3D is_in_uc_mode; + shadow_blow_tables_per_domain(d); +} + +static void hvm_shadow_handle_cd(struct vcpu *v, unsigned long value) +{ + struct domain *d =3D v->domain; + + if ( value & X86_CR0_CD ) + { + /* Entering no fill cache mode. */ + spin_lock(&d->arch.hvm.uc_lock); + v->arch.hvm.cache_mode =3D NO_FILL_CACHE_MODE; + + if ( !d->arch.hvm.is_in_uc_mode ) + { + domain_pause_nosync(d); + + /* Flush physical caches. */ + flush_all(FLUSH_CACHE_EVICT); + hvm_set_uc_mode(d, true); + + domain_unpause(d); + } + spin_unlock(&d->arch.hvm.uc_lock); + } + else if ( !(value & X86_CR0_CD) && + (v->arch.hvm.cache_mode =3D=3D NO_FILL_CACHE_MODE) ) + { + /* Exit from no fill cache mode. */ + spin_lock(&d->arch.hvm.uc_lock); + v->arch.hvm.cache_mode =3D NORMAL_CACHE_MODE; + + if ( domain_exit_uc_mode(v) ) + hvm_set_uc_mode(d, false); + + spin_unlock(&d->arch.hvm.uc_lock); + } +} + static void cf_check vmx_handle_cd(struct vcpu *v, unsigned long value) { if ( !paging_mode_hap(v->domain) ) diff --git a/xen/arch/x86/include/asm/hvm/support.h b/xen/arch/x86/include/= asm/hvm/support.h index 2a7ba36af06f..9e9fa6295567 100644 --- a/xen/arch/x86/include/asm/hvm/support.h +++ b/xen/arch/x86/include/asm/hvm/support.h @@ -119,8 +119,6 @@ void hvm_rdtsc_intercept(struct cpu_user_regs *regs); =20 int __must_check hvm_handle_xsetbv(u32 index, u64 new_bv); =20 -void hvm_shadow_handle_cd(struct vcpu *v, unsigned long value); - /* * These functions all return X86EMUL return codes. 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AS2PR03MB8907.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6910e75e-7cf2-43b0-f84a-08de1e0f060f X-MS-Exchange-CrossTenant-originalarrivaltime: 07 Nov 2025 15:05:00.7626 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: GGN+D6o6oXz8Pt4VTrjdqJTPvQEVS/Bo8KS9iRWvL8uX86aYVuLfe8FrOJ4U0Oy4z4Gh3+tH6r0lhpDzB5iMxplmaIRTzTZbBJvAhxpvahM= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR03MB7605 From: Grygorii Strashko The hvm_shadow_handle_cd() can be used only with SHADOW_PAGING=3Dy, so guar= d hvm_shadow_handle_cd() call with paging_mode_shadow() which accounts for SHADOW_PAGING state. bloat-o-meter add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-290 (-290) Suggested-by: Jan Beulich Signed-off-by: Grygorii Strashko Reviewed-by: Jan Beulich --- changes in v2: - s/!paging_mode_hap()/paging_mode_shadow() xen/arch/x86/hvm/vmx/vmx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index d7efd0a73add..67861bc8bccf 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -1514,7 +1514,7 @@ static void hvm_shadow_handle_cd(struct vcpu *v, unsi= gned long value) =20 static void cf_check vmx_handle_cd(struct vcpu *v, unsigned long value) { - if ( !paging_mode_hap(v->domain) ) + if ( paging_mode_shadow(v->domain) ) { /* * For shadow, 'load IA32_PAT' VM-entry control is 0, so it cannot --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Fri Nov 07 15:05:08 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 07 Nov 2025 15:05:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157666.1486388 (Exim 4.92) (envelope-from ) id 1vHO1U-0008EZ-BN; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AS2PR03MB8907.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 65eba2bf-3ba1-41c5-3649-08de1e0f065c X-MS-Exchange-CrossTenant-originalarrivaltime: 07 Nov 2025 15:05:01.2991 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 5zOJILz+Uft6dk4Om4hBSUEUhOSF+9trmQnRLkJ0LLPxwccfH+qztW24ENbSnkuDnLdgw1foDeMWy2jJ3/3kEuWQS3oOO2pDNt3oSloIkzo= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR03MB7605 From: Grygorii Strashko The Cache Disable mode data is used only by VMX code, so move it from common HVM structures into VMX specific structures: - move "uc_lock", "is_in_uc_mode" fields from struct hvm_domain to struct vmx_domain; - move "cache_mode" field from struct hvm_vcpu to struct vmx_vcpu. Hence, the "in_uc_mode" field is used directly in mm/shadow/multi.c _sh_propagate(), introduce the hvm_is_in_uc_mode() macro to avoid direct access to this field and account for INTEL_VMX configuration. While here: - rename "is_in_uc_mode" to "in_uc_mode" - s/NORMAL_CACHE_MODE/CACHE_MODE_NORMAL - s/NO_FILL_CACHE_MODE/CACHE_MODE_NO_FILL Suggested-by: Andrew Cooper Signed-off-by: Grygorii Strashko --- changes in v2: - s/is_in_uc_mode/in_uc_mode - s/*_CACHE_MODE/CACHE_MODE_* and move them after "cache_mode" - reorder uc_lock,in_uc_mode in struct vmx_domain - move spin_lock_init() xen/arch/x86/hvm/hvm.c | 1 - xen/arch/x86/hvm/vmx/vmx.c | 28 +++++++++++++------------ xen/arch/x86/include/asm/hvm/domain.h | 6 ------ xen/arch/x86/include/asm/hvm/hvm.h | 3 +++ xen/arch/x86/include/asm/hvm/vcpu.h | 3 --- xen/arch/x86/include/asm/hvm/vmx/vmcs.h | 13 ++++++++++++ xen/arch/x86/include/asm/mtrr.h | 3 --- xen/arch/x86/mm/shadow/multi.c | 2 +- 8 files changed, 32 insertions(+), 27 deletions(-) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 9caca93e5f56..c09fb2ba6873 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -608,7 +608,6 @@ int hvm_domain_initialise(struct domain *d, } =20 spin_lock_init(&d->arch.hvm.irq_lock); - spin_lock_init(&d->arch.hvm.uc_lock); spin_lock_init(&d->arch.hvm.write_map.lock); rwlock_init(&d->arch.hvm.mmcfg_lock); INIT_LIST_HEAD(&d->arch.hvm.write_map.list); diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 67861bc8bccf..12748298c10c 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -590,6 +590,8 @@ static int cf_check vmx_domain_initialise(struct domain= *d) */ d->arch.hvm.vmx.exec_sp =3D is_hardware_domain(d) || opt_ept_exec_sp; =20 + spin_lock_init(&d->arch.hvm.vmx.uc_lock); + if ( (rc =3D vmx_alloc_vlapic_mapping(d)) !=3D 0 ) return rc; =20 @@ -1431,7 +1433,7 @@ static void cf_check vmx_set_segment_register( static int cf_check vmx_set_guest_pat(struct vcpu *v, u64 gpat) { if ( !paging_mode_hap(v->domain) || - unlikely(v->arch.hvm.cache_mode =3D=3D NO_FILL_CACHE_MODE) ) + unlikely(v->arch.hvm.vmx.cache_mode =3D=3D CACHE_MODE_NO_FILL) ) return 0; =20 vmx_vmcs_enter(v); @@ -1443,7 +1445,7 @@ static int cf_check vmx_set_guest_pat(struct vcpu *v,= u64 gpat) static int cf_check vmx_get_guest_pat(struct vcpu *v, u64 *gpat) { if ( !paging_mode_hap(v->domain) || - unlikely(v->arch.hvm.cache_mode =3D=3D NO_FILL_CACHE_MODE) ) + unlikely(v->arch.hvm.vmx.cache_mode =3D=3D CACHE_MODE_NO_FILL) ) return 0; =20 vmx_vmcs_enter(v); @@ -1462,7 +1464,7 @@ static bool domain_exit_uc_mode(struct vcpu *v) { if ( (vs =3D=3D v) || !vs->is_initialised ) continue; - if ( (vs->arch.hvm.cache_mode =3D=3D NO_FILL_CACHE_MODE) || + if ( (vs->arch.hvm.vmx.cache_mode =3D=3D CACHE_MODE_NO_FILL) || mtrr_pat_not_equal(vs, v) ) return false; } @@ -1472,7 +1474,7 @@ static bool domain_exit_uc_mode(struct vcpu *v) =20 static void hvm_set_uc_mode(struct domain *d, bool is_in_uc_mode) { - d->arch.hvm.is_in_uc_mode =3D is_in_uc_mode; + d->arch.hvm.vmx.in_uc_mode =3D is_in_uc_mode; shadow_blow_tables_per_domain(d); } =20 @@ -1483,10 +1485,10 @@ static void hvm_shadow_handle_cd(struct vcpu *v, un= signed long value) if ( value & X86_CR0_CD ) { /* Entering no fill cache mode. */ - spin_lock(&d->arch.hvm.uc_lock); - v->arch.hvm.cache_mode =3D NO_FILL_CACHE_MODE; + spin_lock(&d->arch.hvm.vmx.uc_lock); + v->arch.hvm.vmx.cache_mode =3D CACHE_MODE_NO_FILL; =20 - if ( !d->arch.hvm.is_in_uc_mode ) + if ( !d->arch.hvm.vmx.in_uc_mode ) { domain_pause_nosync(d); =20 @@ -1499,16 +1501,16 @@ static void hvm_shadow_handle_cd(struct vcpu *v, un= signed long value) spin_unlock(&d->arch.hvm.uc_lock); } else if ( !(value & X86_CR0_CD) && - (v->arch.hvm.cache_mode =3D=3D NO_FILL_CACHE_MODE) ) + (v->arch.hvm.vmx.cache_mode =3D=3D CACHE_MODE_NO_FILL) ) { /* Exit from no fill cache mode. */ - spin_lock(&d->arch.hvm.uc_lock); - v->arch.hvm.cache_mode =3D NORMAL_CACHE_MODE; + spin_lock(&d->arch.hvm.vmx.uc_lock); + v->arch.hvm.vmx.cache_mode =3D CACHE_MODE_NORMAL; =20 if ( domain_exit_uc_mode(v) ) hvm_set_uc_mode(d, false); =20 - spin_unlock(&d->arch.hvm.uc_lock); + spin_unlock(&d->arch.hvm.vmx.uc_lock); } } =20 @@ -1549,11 +1551,11 @@ static void cf_check vmx_handle_cd(struct vcpu *v, = unsigned long value) =20 wbinvd(); /* flush possibly polluted cache */ hvm_asid_flush_vcpu(v); /* invalidate memory type cached in TL= B */ - v->arch.hvm.cache_mode =3D NO_FILL_CACHE_MODE; + v->arch.hvm.vmx.cache_mode =3D CACHE_MODE_NO_FILL; } else { - v->arch.hvm.cache_mode =3D NORMAL_CACHE_MODE; + v->arch.hvm.vmx.cache_mode =3D CACHE_MODE_NORMAL; vmx_set_guest_pat(v, *pat); if ( !is_iommu_enabled(v->domain) || iommu_snoop ) vmx_clear_msr_intercept(v, MSR_IA32_CR_PAT, VMX_MSR_RW); diff --git a/xen/arch/x86/include/asm/hvm/domain.h b/xen/arch/x86/include/a= sm/hvm/domain.h index 95d9336a28f0..83be2bd1c29c 100644 --- a/xen/arch/x86/include/asm/hvm/domain.h +++ b/xen/arch/x86/include/asm/hvm/domain.h @@ -97,12 +97,6 @@ struct hvm_domain { /* VRAM dirty support. Protect with the domain paging lock. */ struct sh_dirty_vram *dirty_vram; =20 - /* If one of vcpus of this domain is in no_fill_mode or - * mtrr/pat between vcpus is not the same, set is_in_uc_mode - */ - spinlock_t uc_lock; - bool is_in_uc_mode; - bool is_s3_suspended; =20 /* Compatibility setting for a bug in x2APIC LDR */ diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/= hvm/hvm.h index 20b373cea6fb..728b9624522f 100644 --- a/xen/arch/x86/include/asm/hvm/hvm.h +++ b/xen/arch/x86/include/asm/hvm/hvm.h @@ -394,6 +394,9 @@ static inline bool using_svm(void) return IS_ENABLED(CONFIG_AMD_SVM) && cpu_has_svm; } =20 +#define hvm_is_in_uc_mode(d) \ + (using_vmx() && (d)->arch.hvm.vmx.in_uc_mode) + #ifdef CONFIG_HVM =20 #define hvm_get_guest_tsc(v) hvm_get_guest_tsc_fixed(v, 0) diff --git a/xen/arch/x86/include/asm/hvm/vcpu.h b/xen/arch/x86/include/asm= /hvm/vcpu.h index 9ed9eaff3bc5..eae9ac53767b 100644 --- a/xen/arch/x86/include/asm/hvm/vcpu.h +++ b/xen/arch/x86/include/asm/hvm/vcpu.h @@ -168,9 +168,6 @@ struct hvm_vcpu { =20 u8 evtchn_upcall_vector; =20 - /* Which cache mode is this VCPU in (CR0:CD/NW)? */ - u8 cache_mode; - struct hvm_vcpu_io hvm_io; =20 /* Pending hw/sw interrupt (.vector =3D -1 means nothing pending). */ diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h b/xen/arch/x86/include= /asm/hvm/vmx/vmcs.h index 53aa9e3556d3..d28a2682e9df 100644 --- a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h @@ -46,6 +46,7 @@ struct ept_data { =20 #define _VMX_DOMAIN_PML_ENABLED 0 #define VMX_DOMAIN_PML_ENABLED (1ul << _VMX_DOMAIN_PML_ENABLED) + struct vmx_domain { mfn_t apic_access_mfn; /* VMX_DOMAIN_* */ @@ -56,6 +57,13 @@ struct vmx_domain { * around CVE-2018-12207 as appropriate. */ bool exec_sp; + /* + * If one of vcpus of this domain is in no_fill_mode or + * mtrr/pat between vcpus is not the same, set in_uc_mode. + * Protected by uc_lock. + */ + bool in_uc_mode; + spinlock_t uc_lock; }; =20 /* @@ -158,6 +166,11 @@ struct vmx_vcpu { =20 uint8_t lbr_flags; =20 + /* Which cache mode is this VCPU in (CR0:CD/NW)? */ + uint8_t cache_mode; +#define CACHE_MODE_NORMAL 0 +#define CACHE_MODE_NO_FILL 2 + /* Bitmask of segments that we can't safely use in virtual 8086 mode *= / uint16_t vm86_segment_mask; /* Shadow CS, SS, DS, ES, FS, GS, TR while in virtual 8086 mode */ diff --git a/xen/arch/x86/include/asm/mtrr.h b/xen/arch/x86/include/asm/mtr= r.h index 25d442659df2..3a5b4f5b6eec 100644 --- a/xen/arch/x86/include/asm/mtrr.h +++ b/xen/arch/x86/include/asm/mtrr.h @@ -7,9 +7,6 @@ #define MEMORY_NUM_TYPES MTRR_NUM_TYPES #define NO_HARDCODE_MEM_TYPE MTRR_NUM_TYPES =20 -#define NORMAL_CACHE_MODE 0 -#define NO_FILL_CACHE_MODE 2 - #define INVALID_MEM_TYPE X86_NUM_MT =20 /* In the Intel processor's MTRR interface, the MTRR type is always held i= n diff --git a/xen/arch/x86/mm/shadow/multi.c b/xen/arch/x86/mm/shadow/multi.= c index 7be9c180ec43..03be61e225c0 100644 --- a/xen/arch/x86/mm/shadow/multi.c +++ b/xen/arch/x86/mm/shadow/multi.c @@ -559,7 +559,7 @@ _sh_propagate(struct vcpu *v, if ( !mmio_mfn && (type =3D hvm_get_mem_pinned_cacheattr(d, target_gfn, 0)) >= =3D 0 ) sflags |=3D pat_type_2_pte_flags(type); - else if ( d->arch.hvm.is_in_uc_mode ) + else if ( hvm_is_in_uc_mode(d) ) sflags |=3D pat_type_2_pte_flags(X86_MT_UC); else if ( iomem_access_permitted(d, mfn_x(target_mfn), mfn_x(target= _mfn)) ) --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Fri Nov 07 15:13:36 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 07 Nov 2025 15:13:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157634.1486398 (Exim 4.92) (envelope-from ) id 1vHO9c-0002Th-BL; Fri, 07 Nov 2025 15:13:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157634.1486398; Fri, 07 Nov 2025 15:13:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHO9c-0002Ta-8f; Fri, 07 Nov 2025 15:13:32 +0000 Received: by outflank-mailman (input) for mailman id 1157634; Fri, 07 Nov 2025 14:34:08 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHNXU-00034l-Ly for xen-devel@lists.xenproject.org; Fri, 07 Nov 2025 14:34:08 +0000 Received: from mail-wr1-x429.google.com (mail-wr1-x429.google.com [2a00:1450:4864:20::429]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id d0b891b9-bbe6-11f0-980a-7dc792cee155; Fri, 07 Nov 2025 15:34:06 +0100 (CET) Received: by mail-wr1-x429.google.com with SMTP id ffacd0b85a97d-429c82bf86bso428001f8f.1 for ; Fri, 07 Nov 2025 06:34:06 -0800 (PST) Received: from ?IPV6:2003:d8:2f30:b00:cea9:dee:d607:41d? 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Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-7-kevin.brodsky@arm.com> <71418b31-aedb-4600-9558-842515dd6c44@arm.com> From: "David Hildenbrand (Red Hat)" Content-Language: en-US In-Reply-To: <71418b31-aedb-4600-9558-842515dd6c44@arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit >> #ifndef pte_batch_hint >> diff --git a/mm/kasan/shadow.c b/mm/kasan/shadow.c >> index 5d2a876035d6..c49b029d3593 100644 >> --- a/mm/kasan/shadow.c >> +++ b/mm/kasan/shadow.c >> @@ -305,7 +305,7 @@ static int kasan_populate_vmalloc_pte(pte_t *ptep, unsigned long addr, >> pte_t pte; >> int index; >> >> - arch_leave_lazy_mmu_mode(); >> + lazy_mmu_mode_pause(); > > I wonder if there really are use cases that *require* pause/resume? I think > these kasan cases could be correctly implemented using a new nest level instead? > Are there cases where the effects really need to be immediate or do the effects > just need to be visible when you get to where the resume is? > > If the latter, that could just be turned into a nested disable (e.g. a flush). > In this case, there is only 1 PTE write so no benefit, but I wonder if other > cases may have more PTE writes that could then still be batched. It would be > nice to simplify the API by removing pause/resume if we can? It has clear semantics, clearer than some nest-disable IMHO. Maybe you can elaborate how you would change ("simplify") the API in that regard? What would the API look like? From xen-devel-bounces@lists.xenproject.org Fri Nov 07 15:23:08 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 07 Nov 2025 15:23:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157727.1486407 (Exim 4.92) (envelope-from ) id 1vHOIp-0004Fk-5S; Fri, 07 Nov 2025 15:23:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157727.1486407; Fri, 07 Nov 2025 15:23:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHOIp-0004Fd-2l; Fri, 07 Nov 2025 15:23:03 +0000 Received: by outflank-mailman (input) for mailman id 1157727; Fri, 07 Nov 2025 15:23:02 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHOIo-0004FX-BO for xen-devel@lists.xenproject.org; Fri, 07 Nov 2025 15:23:02 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id a5b3da9d-bbed-11f0-9d17-b5c5bf9af7f9; Fri, 07 Nov 2025 16:23:01 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9C58F1515; Fri, 7 Nov 2025 07:22:52 -0800 (PST) Received: from [10.57.86.134] (unknown [10.57.86.134]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C0C093F694; Fri, 7 Nov 2025 07:22:55 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: a5b3da9d-bbed-11f0-9d17-b5c5bf9af7f9 Message-ID: <645178fd-df4e-42fe-b55e-97d9506499be@arm.com> Date: Fri, 7 Nov 2025 15:22:54 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 06/12] mm: introduce generic lazy_mmu helpers Content-Language: en-GB To: "David Hildenbrand (Red Hat)" , Kevin Brodsky , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-7-kevin.brodsky@arm.com> <71418b31-aedb-4600-9558-842515dd6c44@arm.com> From: Ryan Roberts In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 07/11/2025 14:34, David Hildenbrand (Red Hat) wrote: >>>   #ifndef pte_batch_hint >>> diff --git a/mm/kasan/shadow.c b/mm/kasan/shadow.c >>> index 5d2a876035d6..c49b029d3593 100644 >>> --- a/mm/kasan/shadow.c >>> +++ b/mm/kasan/shadow.c >>> @@ -305,7 +305,7 @@ static int kasan_populate_vmalloc_pte(pte_t *ptep, >>> unsigned long addr, >>>       pte_t pte; >>>       int index; >>>   -    arch_leave_lazy_mmu_mode(); >>> +    lazy_mmu_mode_pause(); >> >> I wonder if there really are use cases that *require* pause/resume? I think >> these kasan cases could be correctly implemented using a new nest level instead? >> Are there cases where the effects really need to be immediate or do the effects >> just need to be visible when you get to where the resume is? >> >> If the latter, that could just be turned into a nested disable (e.g. a flush). >> In this case, there is only 1 PTE write so no benefit, but I wonder if other >> cases may have more PTE writes that could then still be batched. It would be >> nice to simplify the API by removing pause/resume if we can? > > It has clear semantics, clearer than some nest-disable IMHO. > > Maybe you can elaborate how you would change ("simplify") the API in that > regard? What would the API look like? By simplify, I just meant can we remove lazy_mmu_mode_pause() and lazy_mmu_mode_resume() ? We currently have: apply_to_page_range lazy_mmu_mode_enable() kasan_populate_vmalloc_pte() lazy_mmu_mode_pause() lazy_mmu_mode_resume() lazy_mmu_mode_disable() Where is setting ptes. But if doesn't need the effects to be visible until lazy_mmu_mode_resume(), then you could replace the block with: apply_to_page_range lazy_mmu_mode_enable() kasan_populate_vmalloc_pte() lazy_mmu_mode_enable() lazy_mmu_mode_disable() lazy_mmu_mode_disable() However, looking at this more closely, I'm not really clear on why we need *any* special attention to lazy mmu inside of kasan_populate_vmalloc_pte() and kasan_depopulate_vmalloc_pte(). I *think* that the original concern was that we were doing ptep_get(ptep) inside of a lazy_mmu block? So we need to flush so that the getter returns the most recent value? But given we have never written to that particular ptep while in the lazy mmu block, there is surely no hazard in the first place? apply_to_existing_page_range() will only call kasan_depopulate_vmalloc_pte() once per pte, right? So given we read the ptep before writing it, there should be no hazard? If so we can remove pause/resume. Thanks, Ryan From xen-devel-bounces@lists.xenproject.org Fri Nov 07 15:29:10 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 07 Nov 2025 15:29:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157739.1486418 (Exim 4.92) (envelope-from ) id 1vHOOd-0004vS-Q0; Fri, 07 Nov 2025 15:29:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157739.1486418; Fri, 07 Nov 2025 15:29:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHOOd-0004vL-Mb; Fri, 07 Nov 2025 15:29:03 +0000 Received: by outflank-mailman (input) for mailman id 1157739; Fri, 07 Nov 2025 15:29:02 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHOOc-0004vF-5V for xen-devel@lists.xenproject.org; Fri, 07 Nov 2025 15:29:02 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 7b69bb1b-bbee-11f0-980a-7dc792cee155; Fri, 07 Nov 2025 16:28:59 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 55F981515; Fri, 7 Nov 2025 07:28:51 -0800 (PST) Received: from [10.57.86.134] (unknown [10.57.86.134]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7C13D3F694; Fri, 7 Nov 2025 07:28:54 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 7b69bb1b-bbee-11f0-980a-7dc792cee155 Message-ID: <06026ad7-fb85-4a78-ba70-7fa1f5bca0cd@arm.com> Date: Fri, 7 Nov 2025 15:28:53 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 08/12] arm64: mm: replace TIF_LAZY_MMU with in_lazy_mmu_mode() Content-Language: en-GB To: Kevin Brodsky , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-9-kevin.brodsky@arm.com> From: Ryan Roberts In-Reply-To: <20251029100909.3381140-9-kevin.brodsky@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 29/10/2025 10:09, Kevin Brodsky wrote: > The generic lazy_mmu layer now tracks whether a task is in lazy MMU > mode. As a result we no longer need a TIF flag for that purpose - > let's use the new in_lazy_mmu_mode() helper instead. > > Signed-off-by: Kevin Brodsky > --- > arch/arm64/include/asm/pgtable.h | 16 +++------------- > arch/arm64/include/asm/thread_info.h | 3 +-- > 2 files changed, 4 insertions(+), 15 deletions(-) > > diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h > index 535435248923..61ca88f94551 100644 > --- a/arch/arm64/include/asm/pgtable.h > +++ b/arch/arm64/include/asm/pgtable.h > @@ -62,30 +62,21 @@ static inline void emit_pte_barriers(void) > > static inline void queue_pte_barriers(void) > { > - unsigned long flags; > - > if (in_interrupt()) { > emit_pte_barriers(); > return; > } > > - flags = read_thread_flags(); > - > - if (flags & BIT(TIF_LAZY_MMU)) { > - /* Avoid the atomic op if already set. */ > - if (!(flags & BIT(TIF_LAZY_MMU_PENDING))) > - set_thread_flag(TIF_LAZY_MMU_PENDING); > - } else { > + if (in_lazy_mmu_mode()) > + test_and_set_thread_flag(TIF_LAZY_MMU_PENDING); This removes the optimization to only do the atomic set operation if the bit is not already set. I think that should remain. > + else > emit_pte_barriers(); > - } > } > > static inline void arch_enter_lazy_mmu_mode(void) > { > if (in_interrupt()) > return; Why are you keeping this test? Surely it can go? > - > - set_thread_flag(TIF_LAZY_MMU); > } > > static inline void arch_flush_lazy_mmu_mode(void) > @@ -103,7 +94,6 @@ static inline void arch_leave_lazy_mmu_mode(void) > return; > > arch_flush_lazy_mmu_mode(); > - clear_thread_flag(TIF_LAZY_MMU); > } > > #ifdef CONFIG_TRANSPARENT_HUGEPAGE > diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h > index f241b8601ebd..4ff8da0767d9 100644 > --- a/arch/arm64/include/asm/thread_info.h > +++ b/arch/arm64/include/asm/thread_info.h > @@ -84,8 +84,7 @@ void arch_setup_new_exec(void); > #define TIF_SME_VL_INHERIT 28 /* Inherit SME vl_onexec across exec */ > #define TIF_KERNEL_FPSTATE 29 /* Task is in a kernel mode FPSIMD section */ > #define TIF_TSC_SIGSEGV 30 /* SIGSEGV on counter-timer access */ > -#define TIF_LAZY_MMU 31 /* Task in lazy mmu mode */ > -#define TIF_LAZY_MMU_PENDING 32 /* Ops pending for lazy mmu mode exit */ > +#define TIF_LAZY_MMU_PENDING 31 /* Ops pending for lazy mmu mode exit */ > > #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) > #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) From xen-devel-bounces@lists.xenproject.org Fri Nov 07 15:42:52 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 07 Nov 2025 15:42:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157754.1486427 (Exim 4.92) (envelope-from ) id 1vHObs-0007oA-TT; Fri, 07 Nov 2025 15:42:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157754.1486427; Fri, 07 Nov 2025 15:42:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHObs-0007o3-QO; Fri, 07 Nov 2025 15:42:44 +0000 Received: by outflank-mailman (input) for mailman id 1157754; Fri, 07 Nov 2025 15:42:43 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHObr-0007nx-2k for xen-devel@lists.xenproject.org; Fri, 07 Nov 2025 15:42:43 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 64b97bf3-bbf0-11f0-980a-7dc792cee155; Fri, 07 Nov 2025 16:42:40 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4B6271515; Fri, 7 Nov 2025 07:42:32 -0800 (PST) Received: from [10.57.86.134] (unknown [10.57.86.134]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6F2A33F694; Fri, 7 Nov 2025 07:42:35 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 64b97bf3-bbf0-11f0-980a-7dc792cee155 Message-ID: <8a38db66-4d1a-4296-a2dc-e0276c6cdde8@arm.com> Date: Fri, 7 Nov 2025 15:42:34 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 12/12] mm: bail out of lazy_mmu_mode_* in interrupt context Content-Language: en-GB To: Kevin Brodsky , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-13-kevin.brodsky@arm.com> From: Ryan Roberts In-Reply-To: <20251029100909.3381140-13-kevin.brodsky@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 29/10/2025 10:09, Kevin Brodsky wrote: > The lazy MMU mode cannot be used in interrupt context. This is > documented in , but isn't consistently handled > across architectures. > > arm64 ensures that calls to lazy_mmu_mode_* have no effect in > interrupt context, because such calls do occur in certain > configurations - see commit b81c688426a9 ("arm64/mm: Disable barrier > batching in interrupt contexts"). Other architectures do not check > this situation, most likely because it hasn't occurred so far. > > Both arm64 and x86/Xen also ensure that any lazy MMU optimisation is > disabled while in interrupt mode (see queue_pte_barriers() and > xen_get_lazy_mode() respectively). > > Let's handle this in the new generic lazy_mmu layer, in the same > fashion as arm64: bail out of lazy_mmu_mode_* if in_interrupt(), and > have in_lazy_mmu_mode() return false to disable any optimisation. > Also remove the arm64 handling that is now redundant; x86/Xen has > its own internal tracking so it is left unchanged. > > Signed-off-by: Kevin Brodsky > --- > arch/arm64/include/asm/pgtable.h | 17 +---------------- > include/linux/pgtable.h | 16 ++++++++++++++-- > include/linux/sched.h | 3 +++ > 3 files changed, 18 insertions(+), 18 deletions(-) > > diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h > index 61ca88f94551..96987a49e83b 100644 > --- a/arch/arm64/include/asm/pgtable.h > +++ b/arch/arm64/include/asm/pgtable.h > @@ -62,37 +62,22 @@ static inline void emit_pte_barriers(void) > > static inline void queue_pte_barriers(void) > { > - if (in_interrupt()) { > - emit_pte_barriers(); > - return; > - } > - > if (in_lazy_mmu_mode()) > test_and_set_thread_flag(TIF_LAZY_MMU_PENDING); > else > emit_pte_barriers(); > } > > -static inline void arch_enter_lazy_mmu_mode(void) > -{ > - if (in_interrupt()) > - return; > -} > +static inline void arch_enter_lazy_mmu_mode(void) {} > > static inline void arch_flush_lazy_mmu_mode(void) > { > - if (in_interrupt()) > - return; > - > if (test_and_clear_thread_flag(TIF_LAZY_MMU_PENDING)) > emit_pte_barriers(); > } > > static inline void arch_leave_lazy_mmu_mode(void) > { > - if (in_interrupt()) > - return; > - > arch_flush_lazy_mmu_mode(); > } Ahh ok, by the time you get to the final state, I think a most of my comments/concerns are solved. Certainly this now looks safe for the interrupt case, whereas I think the intermediate state when you initially introduce nesting is broken. So perhaps you want to look at how to rework it to prevent that. Thanks, Ryan > > diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h > index e6064e00b22d..e6069ce4ec83 100644 > --- a/include/linux/pgtable.h > +++ b/include/linux/pgtable.h > @@ -228,8 +228,8 @@ static inline int pmd_dirty(pmd_t pmd) > * of the lazy mode. So the implementation must assume preemption may be enabled > * and cpu migration is possible; it must take steps to be robust against this. > * (In practice, for user PTE updates, the appropriate page table lock(s) are > - * held, but for kernel PTE updates, no lock is held). The mode cannot be used > - * in interrupt context. > + * held, but for kernel PTE updates, no lock is held). The mode is disabled > + * in interrupt context and calls to the lazy_mmu API have no effect. > * > * The lazy MMU mode is enabled for a given block of code using: > * > @@ -265,6 +265,9 @@ static inline void lazy_mmu_mode_enable(void) > { > struct lazy_mmu_state *state = ¤t->lazy_mmu_state; > > + if (in_interrupt()) > + return; > + > VM_WARN_ON_ONCE(state->nesting_level == U8_MAX); > /* enable() must not be called while paused */ > VM_WARN_ON(state->nesting_level > 0 && !state->active); > @@ -279,6 +282,9 @@ static inline void lazy_mmu_mode_disable(void) > { > struct lazy_mmu_state *state = ¤t->lazy_mmu_state; > > + if (in_interrupt()) > + return; > + > VM_WARN_ON_ONCE(state->nesting_level == 0); > VM_WARN_ON(!state->active); > > @@ -295,6 +301,9 @@ static inline void lazy_mmu_mode_pause(void) > { > struct lazy_mmu_state *state = ¤t->lazy_mmu_state; > > + if (in_interrupt()) > + return; > + > VM_WARN_ON(state->nesting_level == 0 || !state->active); > > state->active = false; > @@ -305,6 +314,9 @@ static inline void lazy_mmu_mode_resume(void) > { > struct lazy_mmu_state *state = ¤t->lazy_mmu_state; > > + if (in_interrupt()) > + return; > + > VM_WARN_ON(state->nesting_level == 0 || state->active); > > state->active = true; > diff --git a/include/linux/sched.h b/include/linux/sched.h > index 11566d973f42..bb873016ffcf 100644 > --- a/include/linux/sched.h > +++ b/include/linux/sched.h > @@ -1731,6 +1731,9 @@ static inline char task_state_to_char(struct task_struct *tsk) > #ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE > static inline bool in_lazy_mmu_mode(void) > { > + if (in_interrupt()) > + return false; > + > return current->lazy_mmu_state.active; > } > #else From xen-devel-bounces@lists.xenproject.org Fri Nov 07 15:46:02 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 07 Nov 2025 15:46:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157764.1486437 (Exim 4.92) (envelope-from ) id 1vHOf3-0008Lv-Aj; Fri, 07 Nov 2025 15:46:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157764.1486437; Fri, 07 Nov 2025 15:46:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHOf3-0008Lo-8B; Fri, 07 Nov 2025 15:46:01 +0000 Received: by outflank-mailman (input) for mailman id 1157764; Fri, 07 Nov 2025 15:46:00 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHOf1-0008Lg-Qc for xen-devel@lists.xenproject.org; Fri, 07 Nov 2025 15:46:00 +0000 Received: from mail-ej1-x62c.google.com (mail-ej1-x62c.google.com [2a00:1450:4864:20::62c]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id dacdaec4-bbf0-11f0-9d17-b5c5bf9af7f9; Fri, 07 Nov 2025 16:45:58 +0100 (CET) Received: by mail-ej1-x62c.google.com with SMTP id a640c23a62f3a-b64cdbb949cso169359566b.1 for ; Fri, 07 Nov 2025 07:45:58 -0800 (PST) Received: from ?IPV6:2003:e5:870e:1500:7795:3e8a:56c1:ae53? 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Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org Message-ID: Subject: Re: [PATCH v4 02/12] x86/xen: simplify flush_lazy_mmu() References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-3-kevin.brodsky@arm.com> In-Reply-To: <20251029100909.3381140-3-kevin.brodsky@arm.com> --------------knysrRNvahQGLFPAzdME9JNX Content-Type: multipart/mixed; boundary="------------0xpsCIW0ItmLiouLur0gOGNm" --------------0xpsCIW0ItmLiouLur0gOGNm Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: base64 T24gMjkuMTAuMjUgMTE6MDgsIEtldmluIEJyb2Rza3kgd3JvdGU6DQo+IGFyY2hfZmx1c2hf bGF6eV9tbXVfbW9kZSgpIGlzIGNhbGxlZCB3aGVuIG91dHN0YW5kaW5nIGJhdGNoZWQNCj4g cGd0YWJsZSBvcGVyYXRpb25zIG11c3QgYmUgY29tcGxldGVkIGltbWVkaWF0ZWx5LiBUaGVy ZSBzaG91bGQNCj4gaG93ZXZlciBiZSBubyBuZWVkIHRvIGxlYXZlIGFuZCByZS1lbnRlciBs YXp5IE1NVSBjb21wbGV0ZWx5LiBUaGUNCj4gb25seSBwYXJ0IG9mIHRoYXQgc2VxdWVuY2Ug dGhhdCB3ZSByZWFsbHkgbmVlZCBpcyB4ZW5fbWNfZmx1c2goKTsNCj4gY2FsbCBpdCBkaXJl Y3RseS4NCj4gDQo+IFNpZ25lZC1vZmYtYnk6IEtldmluIEJyb2Rza3kgPGtldmluLmJyb2Rz a3lAYXJtLmNvbT4NCg0KUmV2aWV3ZWQtYnk6IEp1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNl LmNvbT4NCg0KDQpKdWVyZ2VuDQo= --------------0xpsCIW0ItmLiouLur0gOGNm Content-Type: application/pgp-keys; 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Message-ID: Date: Fri, 7 Nov 2025 17:47:40 +0200 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH] xen: make VMTRACE support optional To: Jan Beulich , Teddy Astie Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Tamas K Lengyel , Alexandru Isaila , Petre Pircalabu , Penny Zheng , "xen-devel@lists.xenproject.org" References: <20251031212005.1338212-1-grygorii_strashko@epam.com> <63525e6f-4e17-4155-87b2-47b9ac9ea474@suse.com> Content-Language: en-US From: Grygorii Strashko In-Reply-To: <63525e6f-4e17-4155-87b2-47b9ac9ea474@suse.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: FR4P281CA0341.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:ea::16) To AS2PR03MB8907.eurprd03.prod.outlook.com (2603:10a6:20b:5e4::22) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AS2PR03MB8907:EE_|DB9PR03MB11025:EE_ X-MS-Office365-Filtering-Correlation-Id: 7ffd12e0-2544-4d7e-ec16-08de1e14fcb2 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|7416014|376014|1800799024; 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The trace date can be retrieved using buffer >>> >>> Nit: s/date/data/ >>> >>>> + shared between Xen and domain >>>> + (see XENMEM_acquire_resource(XENMEM_resource_vmtrace_buf)). >>>> + >>> >>> I was actually meaning to ask that "VMX only" should somehow be mentioned here, >>> but then I noticed this is an arch-independent location. >> >> Right, Arch code advertise VMTRACE support with HAS_VMTRACE. >> In this particular case: >> config INTEL_VMX >> ... >> select HAS_VMTRACE >> >> >>> I'm not quite sure we want it like this (just yet). >> >> ? > > To rephrase the question: Are we expecting anything other than VMX to support > VMTRACE any time soon? > That's I do not know. I assume your point is similar to what Teddy noted [1]. I think vmtrace code can be consolidate, but question is on what level(s): only: xen/arch/x86/hvm/vmx/ |- vmtrace.c or: xen/arch/x86/hvm |- vmtrace.c <- vmtrace_alloc/free_buffer(), acquire_vmtrace_buf(), do_vmtrace_op() xen/arch/x86/hvm/vmx/ |- vmtrace.c it will require more work comparing to the current change. [1] https://patchwork.kernel.org/comment/26637627/ -- Best regards, -grygorii From xen-devel-bounces@lists.xenproject.org Fri Nov 07 18:18:02 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 07 Nov 2025 18:18:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157831.1486457 (Exim 4.92) (envelope-from ) id 1vHR1t-00025Z-HW; Fri, 07 Nov 2025 18:17:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157831.1486457; Fri, 07 Nov 2025 18:17:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHR1t-00025S-Er; Fri, 07 Nov 2025 18:17:45 +0000 Received: by outflank-mailman (input) for mailman id 1157831; Fri, 07 Nov 2025 18:17:44 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHR1s-000253-GC for xen-devel@lists.xenproject.org; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DB3PR0302MB8919.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: a6596213-e362-42d0-8926-08de1e29f05f X-MS-Exchange-CrossTenant-originalarrivaltime: 07 Nov 2025 18:17:40.8175 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: /1lVy2eyj30e1W0zzk8laHENZBoouWIZZwliyf8PEhQ4UsdtwAGyG967r/FkwdkOoD5egsaAptCIol5NBk6zj4x8Ic265aXzJkM0lstaoDk= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR03MB10293 From: Grygorii Strashko Xen uses below pattern for raw_x_guest() functions: define raw_copy_to_guest(dst, src, len) \ (is_hvm_vcpu(current) ? \ copy_to_user_hvm((dst), (src), (len)) : \ copy_to_guest_pv(dst, src, len)) This pattern works depending on CONFIG_PV/CONFIG_HVM as: - PV=3Dy and HVM=3Dy Proper guest access function is selected depending on domain type. - PV=3Dy and HVM=3Dn Only PV domains are possible. is_hvm_domain/vcpu() will constify to "fals= e" and compiler will optimize code and skip HVM specific part. - PV=3Dn and HVM=3Dy Only HVM domains are possible. is_hvm_domain/vcpu() will not be constifie= d. No PV specific code will be optimized by compiler. - PV=3Dn and HVM=3Dn No guests should possible. The code will still follow PV path. Rework raw_x_guest() code to use static inline functions which account for above PV/HVM possible configurations with main intention to optimize code for (PV=3Dn and HVM=3Dy) case. For the case (PV=3Dn and HVM=3Dn) return "len" value indicating a failure (= no guests should be possible in this case, which means no access to guest memory should ever happen). Finally build arch/x86/usercopy.c only for PV=3Dy. The measured (bloat-o-meter) improvement for (PV=3Dn and HVM=3Dy) case is: add/remove: 2/9 grow/shrink: 2/90 up/down: 1678/-32560 (-30882) Total: Before=3D1937092, After=3D1906210, chg -1.59% [teddy.astie@vates.tech: Suggested to use static inline functions vs macro combinations] Suggested-by: Teddy Astie Signed-off-by: Grygorii Strashko --- changes in v3: - add raw_use_hvm_access() wrapper changes in v2: - use static inline functions instead of macro combinations xen/arch/x86/Makefile | 2 +- xen/arch/x86/include/asm/guest_access.h | 78 ++++++++++++++++++------- 2 files changed, 59 insertions(+), 21 deletions(-) diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index 407571c510e1..27f131ffeb61 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -71,7 +71,7 @@ obj-y +=3D time.o obj-y +=3D traps-setup.o obj-y +=3D traps.o obj-$(CONFIG_INTEL) +=3D tsx.o -obj-y +=3D usercopy.o +obj-$(CONFIG_PV) +=3D usercopy.o obj-y +=3D x86_emulate.o obj-$(CONFIG_TBOOT) +=3D tboot.o obj-y +=3D hpet.o diff --git a/xen/arch/x86/include/asm/guest_access.h b/xen/arch/x86/include= /asm/guest_access.h index 69716c8b41bb..eb1fb0aef76d 100644 --- a/xen/arch/x86/include/asm/guest_access.h +++ b/xen/arch/x86/include/asm/guest_access.h @@ -13,26 +13,64 @@ #include =20 /* Raw access functions: no type checking. */ -#define raw_copy_to_guest(dst, src, len) \ - (is_hvm_vcpu(current) ? \ - copy_to_user_hvm((dst), (src), (len)) : \ - copy_to_guest_pv(dst, src, len)) -#define raw_copy_from_guest(dst, src, len) \ - (is_hvm_vcpu(current) ? \ - copy_from_user_hvm((dst), (src), (len)) : \ - copy_from_guest_pv(dst, src, len)) -#define raw_clear_guest(dst, len) \ - (is_hvm_vcpu(current) ? \ - clear_user_hvm((dst), (len)) : \ - clear_guest_pv(dst, len)) -#define __raw_copy_to_guest(dst, src, len) \ - (is_hvm_vcpu(current) ? \ - copy_to_user_hvm((dst), (src), (len)) : \ - __copy_to_guest_pv(dst, src, len)) -#define __raw_copy_from_guest(dst, src, len) \ - (is_hvm_vcpu(current) ? \ - copy_from_user_hvm((dst), (src), (len)) : \ - __copy_from_guest_pv(dst, src, len)) +static inline bool raw_use_hvm_access(const struct vcpu *v) +{ + return IS_ENABLED(CONFIG_HVM) && (!IS_ENABLED(CONFIG_PV) || is_hvm_vcp= u(v)); +} + +static inline unsigned int raw_copy_to_guest(void *dst, const void *src, + unsigned int len) +{ + if ( raw_use_hvm_access(current) ) + return copy_to_user_hvm(dst, src, len); + else if ( IS_ENABLED(CONFIG_PV) ) + return copy_to_guest_pv(dst, src, len); + else + return len; +} + +static inline unsigned int raw_copy_from_guest(void *dst, const void *src, + unsigned int len) +{ + if ( raw_use_hvm_access(current) ) + return copy_from_user_hvm(dst, src, len); + else if ( IS_ENABLED(CONFIG_PV) ) + return copy_from_guest_pv(dst, src, len); + else + return len; +} + +static inline unsigned int raw_clear_guest(void *dst, unsigned int len) +{ + if ( raw_use_hvm_access(current) ) + return clear_user_hvm(dst, len); + else if ( IS_ENABLED(CONFIG_PV) ) + return clear_guest_pv(dst, len); + else + return len; +} + +static inline unsigned int __raw_copy_to_guest(void *dst, const void *src, + unsigned int len) +{ + if ( raw_use_hvm_access(current) ) + return copy_to_user_hvm(dst, src, len); + else if ( IS_ENABLED(CONFIG_PV) ) + return __copy_to_guest_pv(dst, src, len); + else + return len; +} + +static inline unsigned int __raw_copy_from_guest(void *dst, const void *sr= c, + unsigned int len) +{ + if ( raw_use_hvm_access(current) ) + return copy_from_user_hvm(dst, src, len); + else if ( IS_ENABLED(CONFIG_PV) ) + return __copy_from_guest_pv(dst, src, len); + else + return len; +} =20 /* * Pre-validate a guest handle. --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Fri Nov 07 18:44:24 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 07 Nov 2025 18:44:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157842.1486467 (Exim 4.92) (envelope-from ) id 1vHRRa-0005qT-IQ; Fri, 07 Nov 2025 18:44:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157842.1486467; Fri, 07 Nov 2025 18:44:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHRRa-0005qM-FX; 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pr=C Message-ID: <01f450cf-c095-4d09-a9cc-de833e98aee9@amd.com> Date: Fri, 7 Nov 2025 13:44:04 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH v3] xen/x86: guest_access: optimize raw_x_guest() for PV and HVM combinations To: Grygorii Strashko , "xen-devel@lists.xenproject.org" CC: Jan Beulich , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie References: <20251107181739.3034098-1-grygorii_strashko@epam.com> Content-Language: en-US From: Jason Andryuk In-Reply-To: <20251107181739.3034098-1-grygorii_strashko@epam.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS2PEPF00003443:EE_|PH7PR12MB6489:EE_ X-MS-Office365-Filtering-Correlation-Id: aa79217b-42be-46a0-5648-08de1e2da3ce X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700013|1800799024|82310400026|7053199007; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Nov 2025 18:44:10.2958 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: aa79217b-42be-46a0-5648-08de1e2da3ce X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS2PEPF00003443.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6489 On 2025-11-07 13:17, Grygorii Strashko wrote: > From: Grygorii Strashko > > Xen uses below pattern for raw_x_guest() functions: > > define raw_copy_to_guest(dst, src, len) \ > (is_hvm_vcpu(current) ? \ > copy_to_user_hvm((dst), (src), (len)) : \ > copy_to_guest_pv(dst, src, len)) > > This pattern works depending on CONFIG_PV/CONFIG_HVM as: > - PV=y and HVM=y > Proper guest access function is selected depending on domain type. > - PV=y and HVM=n > Only PV domains are possible. is_hvm_domain/vcpu() will constify to "false" > and compiler will optimize code and skip HVM specific part. > - PV=n and HVM=y > Only HVM domains are possible. is_hvm_domain/vcpu() will not be constified. > No PV specific code will be optimized by compiler. > - PV=n and HVM=n > No guests should possible. The code will still follow PV path. > > Rework raw_x_guest() code to use static inline functions which account for > above PV/HVM possible configurations with main intention to optimize code > for (PV=n and HVM=y) case. > > For the case (PV=n and HVM=n) return "len" value indicating a failure (no > guests should be possible in this case, which means no access to guest > memory should ever happen). > > Finally build arch/x86/usercopy.c only for PV=y. > > The measured (bloat-o-meter) improvement for (PV=n and HVM=y) case is: > add/remove: 2/9 grow/shrink: 2/90 up/down: 1678/-32560 (-30882) > Total: Before=1937092, After=1906210, chg -1.59% > > [teddy.astie@vates.tech: Suggested to use static inline functions vs > macro combinations] > Suggested-by: Teddy Astie > Signed-off-by: Grygorii Strashko Reviewed-by: Jason Andryuk Thanks, Jason From xen-devel-bounces@lists.xenproject.org Fri Nov 07 19:24:14 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 07 Nov 2025 19:24:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157862.1486478 (Exim 4.92) (envelope-from ) id 1vHS3y-0002YW-Hf; Fri, 07 Nov 2025 19:23:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157862.1486478; Fri, 07 Nov 2025 19:23:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHS3y-0002YP-Es; Fri, 07 Nov 2025 19:23:58 +0000 Received: by outflank-mailman (input) for mailman id 1157862; Fri, 07 Nov 2025 19:23:56 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHS3w-0002YJ-Nr for xen-devel@lists.xenproject.org; Fri, 07 Nov 2025 19:23:56 +0000 Received: from smarthost01a.sbp.mail.zen.net.uk (smarthost01a.sbp.mail.zen.net.uk [212.23.1.1]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 4bca03c5-bc0f-11f0-9d17-b5c5bf9af7f9; Fri, 07 Nov 2025 20:23:53 +0100 (CET) Received: from [217.155.64.189] (helo=mail0.xen.dingwall.me.uk) by smarthost01a.sbp.mail.zen.net.uk with esmtpsa (TLS1.0) tls TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA (Exim 4.95) (envelope-from ) id 1vHS3t-00DAvl-2j for xen-devel@lists.xenproject.org; Fri, 07 Nov 2025 19:23:52 +0000 Received: from localhost (localhost [IPv6:::1]) by mail0.xen.dingwall.me.uk (Postfix) with ESMTP id 6D86CDA9D97 for ; Fri, 7 Nov 2025 19:23:52 +0000 (GMT) Received: from mail0.xen.dingwall.me.uk ([IPv6:::1]) by localhost (mail0.xen.dingwall.me.uk [IPv6:::1]) (amavis, port 10024) with ESMTP id G9XRg2WmnLTn for ; Fri, 7 Nov 2025 19:23:52 +0000 (GMT) Received: from ghoul.dingwall.me.uk (ghoul.dingwall.me.uk [IPv6:2a02:8010:698e:302::c0a8:1c8]) by dingwall.me.uk (Postfix) with ESMTP id 35E72DA9D92 for ; Fri, 7 Nov 2025 19:23:52 +0000 (GMT) Received: by ghoul.dingwall.me.uk (Postfix, from userid 1000) id 17BBA7F4; Fri, 7 Nov 2025 19:23:51 +0000 (GMT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 4bca03c5-bc0f-11f0-9d17-b5c5bf9af7f9 X-Virus-Scanned: Debian amavis at dingwall.me.uk Date: Fri, 7 Nov 2025 19:23:51 +0000 From: James Dingwall To: xen-devel@lists.xenproject.org Subject: [PATCH] fix xl.cfg docs to correct viridian defaults list Message-ID: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="UBzguPwngLXLn4Ib" Content-Disposition: inline X-Originating-smarthost01a-IP: [217.155.64.189] Feedback-ID: 217.155.64.189 --UBzguPwngLXLn4Ib Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hi, I was trying to work out why this would cause my Windows 10 guest to hang when it should have been equivalent to ['defaults'] or 1. viridian = ['base', 'freq', 'apic_assist', 'crash_ctl', 'no_vp_limit', 'cpu_hotplug', 'time_ref_count', 'stimer'] Checking the libxl sources show that in fact the defaults are: if (libxl_defbool_val(info->u.hvm.viridian)) { /* Enable defaults */ libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_BASE); libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_FREQ); libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_TIME_REF_COUNT); libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_APIC_ASSIST); libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_CRASH_CTL); libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_NO_VP_LIMIT); libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_CPU_HOTPLUG); } LIBXL_VIRIDIAN_ENLIGHTENMENT_STIMER was removed as a default enlightement in e83077a3d11072708a5c38fa09fa9d011914e2a1 but the docs were not kept aligned. Thanks, James --UBzguPwngLXLn4Ib Content-Type: text/x-diff; charset=us-ascii Content-Disposition: attachment; filename="af3b374637bae4b30091f731f2bfeea4460478da.diff" commit af3b374637bae4b30091f731f2bfeea4460478da Author: James Dingwall Date: Fri Nov 7 19:09:56 2025 +0000 doc/man: align list of viridian default enlightenments with libxl The stimer enlightment was removed from the defaults list in e83077a3d11072708a5c38fa09fa9d011914e2a1 but the corresponding docs change was not made. Removing from docs as enabling the enlightenment will hang Windows 10 guests. Signed-off-by: James Dingwall diff --git a/docs/man/xl.cfg.5.pod.in b/docs/man/xl.cfg.5.pod.in index ad1553c5e9..27c455210b 100644 --- a/docs/man/xl.cfg.5.pod.in +++ b/docs/man/xl.cfg.5.pod.in @@ -2503,7 +2503,7 @@ guests effectively allowing vCPU hotplug. This is a special value that enables the default set of groups, which is currently the B, B, B, B, -B, B, B and B groups. +B, B and B groups. =item B --UBzguPwngLXLn4Ib-- From xen-devel-bounces@lists.xenproject.org Fri Nov 07 22:51:04 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 07 Nov 2025 22:51:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157905.1486488 (Exim 4.92) (envelope-from ) id 1vHVIA-0000cn-E2; Fri, 07 Nov 2025 22:50:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157905.1486488; Fri, 07 Nov 2025 22:50:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHVIA-0000cg-A7; Fri, 07 Nov 2025 22:50:50 +0000 Received: by outflank-mailman (input) for mailman id 1157905; Fri, 07 Nov 2025 22:50:49 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHVI9-0000ca-M0 for xen-devel@lists.xenproject.org; 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> libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_FREQ); > libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_TIME_REF_COUNT); > libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_APIC_ASSIST); > libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_CRASH_CTL); > libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_NO_VP_LIMIT); > libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_CPU_HOTPLUG); > } > > LIBXL_VIRIDIAN_ENLIGHTENMENT_STIMER was removed as a default enlightement in > e83077a3d11072708a5c38fa09fa9d011914e2a1 but the docs were not kept aligned. Hmm, indeed. For the patch, Reviewed-by: Andrew Cooper It should have a fixes tag, but I can fix that on commit. CC'ing Oleksii.  This is a docs fix should be considered for 4.21 at this juncture. ~Andrew From xen-devel-bounces@lists.xenproject.org Sat Nov 08 02:33:58 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 08 Nov 2025 02:33:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1157947.1486498 (Exim 4.92) (envelope-from ) id 1vHYlq-0000Ky-8Q; Sat, 08 Nov 2025 02:33:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1157947.1486498; Sat, 08 Nov 2025 02:33:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHYlq-0000Kq-3Z; Sat, 08 Nov 2025 02:33:42 +0000 Received: by outflank-mailman (input) for mailman id 1157947; Sat, 08 Nov 2025 02:33:41 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vHYlp-0000Kk-Hx for xen-devel@lists.xenproject.org; Sat, 08 Nov 2025 02:33:41 +0000 Received: from mail-pg1-x532.google.com (mail-pg1-x532.google.com [2607:f8b0:4864:20::532]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 55812537-bc4b-11f0-9d18-b5c5bf9af7f9; Sat, 08 Nov 2025 03:33:40 +0100 (CET) Received: by mail-pg1-x532.google.com with SMTP id 41be03b00d2f7-b98983bae8eso819301a12.0 for ; Fri, 07 Nov 2025 18:33:40 -0800 (PST) Received: from dw-tp ([171.76.85.117]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-ba8f8d7eedcsm6587378a12.2.2025.11.07.18.33.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Nov 2025 18:33:37 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 55812537-bc4b-11f0-9d18-b5c5bf9af7f9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1762569218; x=1763174018; darn=lists.xenproject.org; h=mime-version:references:message-id:date:in-reply-to:subject:cc:to :from:from:to:cc:subject:date:message-id:reply-to; bh=8bKq5Kbap+TGIzkU08hwTVasn8Atv2TAiFfbpOuCLu4=; b=inXNbaN0kxEE6pD1gvDIUGSLCAiR2dnSYvguT1eh9Xb9TtaToFkRc0AiG3xxwzAXU6 1faSKcMBwmSPooVCvSUcI8vuE7tpn6cRCrMEWrSQ9j+3v03jQyKGZ+xV/0KE/BbFvv68 S3DL434WUVov0jrQiCapDIjfi/cGYqVR7ZYBoz0E2ERgjHNOxfZkW/E6kJk7V+jqfcha +vHICJxOz9pWnNeHPwUy2QBz2JE5fzlXnjfdSIaIjvNdMvYZMlSz9KCPEhHrijpPe0pl UBnn5X69c4vnlDp/Vz7UBY809POkGxCc5lWBo9sRmfmpi0w2rqvLmo5ruAokzucINhY3 AIQw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1762569218; x=1763174018; h=mime-version:references:message-id:date:in-reply-to:subject:cc:to :from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=8bKq5Kbap+TGIzkU08hwTVasn8Atv2TAiFfbpOuCLu4=; b=gNq+Zo3fxJax1mqHCNZdyXqpzxsfSSfiABbjc7IKr45GLlsC87GlJQjYgVgux3XsBZ eEQQEdlpfECk9dSBX/2ju0Lq4GhCyaLfeKaF4VuoSBUJHz/U2EIxEAcp39euCR4NxynP 5NiZhkAYiSPjXaiQP8g0i8ze9CMsDXpBI/EMcH1XFW/NXVA9++kKWgqkxMYLOfbTa3lA VQLGhC4PIHbXKKz4kEKzUB+VNlEr6Kpga7fxi30j1E2sISOBaZiDG3wNg7pvcuy86Uis JdO6NIc0ORxfexNcaP9s+x8ywec/O0vLGC3Pe5ni0XwCnb8mfiMSjuEp3XmsSH/9Acbe jgRQ== X-Forwarded-Encrypted: i=1; AJvYcCXVC155MfcuLlNZ/pbdkBdUtSTminB/AfNrYirjcFx5HludaK+wGVdnPN9x06Vmxzlik4/DlpqIUN8=@lists.xenproject.org X-Gm-Message-State: AOJu0YwKsgyxPW8maCVUXR36YEFa7XI1RrqzD8k0GfcCpKjUFE9i4jfd L3fsEMt/JgIRPW9zeOxCdNX+XYktH2j70PJFQWkb9tji+HfRZHByFRvU X-Gm-Gg: ASbGncta1G/e38V/PZ+53haESZ5h0XYEOTr8Ut5ilMZDeNA/RmVsadVgLcb6aiqDMTw +hioUJMECIT9VViH6GC+KBODN7dMsZ0Ael5jRc/q6DCDh9nrn0VJpWFXc7ULpoGsgrZALn4lnC2 MP8J4RBGpyQ2e1V8k5Oxjw0mdOwqHV2AdMzNyzntsphVv6CZ8M+Yz4ZY1RXHWkZApU3N7rZ3TWC 6r88Iugt26RVKMpnh9R6EoMVC0TS04r5y8rK3snITZIQiGEP5uWg6i2sigLE/G9MxFdAgwLAbMY zKsAJb5Sor+4Rc9qKGAqAKmomAkz2tYANnSLYB4coU5cm1cyzxAz38o8alcTVme347hiiGYukVs rKMUSssDiFqdacFqcEoPB3KQz29GIG7cmqKHuOzFwO90BAkrwx/Dv7CSjWiFdzL/o3b8WRhcTjL drJoPa X-Google-Smtp-Source: AGHT+IH/Pe7wf3Ci181tpT0LHXQVq+Kf1iV5vunI2sKT5fx4KiiLBfIeJu3hgL/jAYkDOG6ZWRYxGw== X-Received: by 2002:a05:6a20:12c5:b0:33f:9581:5d2f with SMTP id adf61e73a8af0-3539f99e63emr1740681637.3.1762569218334; Fri, 07 Nov 2025 18:33:38 -0800 (PST) From: Ritesh Harjani (IBM) To: Kevin Brodsky , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org, Venkat Rao Bagalkote Subject: Re: [PATCH v4 01/12] powerpc/64s: Do not re-activate batched TLB flush In-Reply-To: Date: Sat, 08 Nov 2025 06:05:17 +0530 Message-ID: <87cy5t4b0a.ritesh.list@gmail.com> References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-2-kevin.brodsky@arm.com> <87qzud42n1.ritesh.list@gmail.com> MIME-Version: 1.0 Content-Type: text/plain Kevin Brodsky writes: > On 05/11/2025 02:46, Ritesh Harjani (IBM) wrote: >> Kevin Brodsky writes: >> >>> From: Alexander Gordeev >>> >>> Since commit b9ef323ea168 ("powerpc/64s: Disable preemption in hash >>> lazy mmu mode") a task can not be preempted while in lazy MMU mode. >>> Therefore, the batch re-activation code is never called, so remove it. >>> >>> Signed-off-by: Alexander Gordeev >>> Signed-off-by: Kevin Brodsky >>> --- >>> arch/powerpc/include/asm/thread_info.h | 2 -- >>> arch/powerpc/kernel/process.c | 25 ------------------------- >>> 2 files changed, 27 deletions(-) >>> >> Since the commit referenced in above disables the preemption in >> arch_enter_lazy_mmu(), so the expectation is that we will never be >> context switched while in lazy_mmu, hence the code changes in >> switch_to() around __flush_tlb_pending() should ideally never be called. > > Correct, that's the idea. > >> With this analysis - the patch looks good to me. I will give this entire >> patch series a try on Power HW with Hash mmu too (which uses lazy mmu and >> let you know the results of that)! > > That'd be very appreciated, thanks a lot! > I did give this patch series a run on Power10 with Hash MMU. I ran the following stress-ng tests and didn't observe any issues (kernel warnings) so far. stress-ng --all 0 -t 60s --perf -v --verify \ --tlb-shootdown 0 \ --fault 0 \ --userfaultfd 0 \ --fork 0 \ --exec 0 \ --memfd 0 \ --numa 0 \ --pkey 0 \ --remap 0 \ --vm 0 \ --rmap 0 \ -x swap,pagemove (Note not all options shown here will work with --verify) Let me know what else I can run for validation? Do you know of any specific tests for validation of lazy mmu feature? >> For this patch please feel free to add: >> Reviewed-by: Ritesh Harjani (IBM) >> >> >> CC: Venkat who also runs CI on linux Power HW for upstream testing :) > > Ack, will Cc you both in the next version. Sure. Thanks! -ritesh From xen-devel-bounces@lists.xenproject.org Mon Nov 10 06:36:43 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 06:36:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158117.1486508 (Exim 4.92) (envelope-from ) id 1vILVk-0002Wl-Kb; Mon, 10 Nov 2025 06:36:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158117.1486508; Mon, 10 Nov 2025 06:36:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vILVk-0002Wd-F8; Mon, 10 Nov 2025 06:36:20 +0000 Received: by outflank-mailman (input) for mailman id 1158117; Mon, 10 Nov 2025 06:36:18 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vILVi-0002WV-SN for xen-devel@lists.xenproject.org; Mon, 10 Nov 2025 06:36:18 +0000 Received: from mail-wr1-x42d.google.com (mail-wr1-x42d.google.com [2a00:1450:4864:20::42d]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 868b7980-bdff-11f0-980a-7dc792cee155; Mon, 10 Nov 2025 07:36:02 +0100 (CET) Received: by mail-wr1-x42d.google.com with SMTP id ffacd0b85a97d-42b2a0c18caso1623083f8f.1 for ; Sun, 09 Nov 2025 22:36:02 -0800 (PST) Received: from ?IPV6:2003:ca:b70c:6a8d:3447:d20d:2d49:c08? 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Sun, 09 Nov 2025 22:36:01 -0800 (PST) Message-ID: <0613cfb9-0f6e-4c55-a250-ba2a5aa0e182@suse.com> Date: Mon, 10 Nov 2025 07:36:00 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH] xen: make VMTRACE support optional To: Grygorii Strashko Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Tamas K Lengyel , Alexandru Isaila , Petre Pircalabu , Penny Zheng , "xen-devel@lists.xenproject.org" , Teddy Astie References: <20251031212005.1338212-1-grygorii_strashko@epam.com> <63525e6f-4e17-4155-87b2-47b9ac9ea474@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 07.11.2025 16:47, Grygorii Strashko wrote: > Hi > > On 06.11.25 16:09, Jan Beulich wrote: >> On 06.11.2025 14:50, Grygorii Strashko wrote: >>> On 06.11.25 14:00, Jan Beulich wrote: >>>> On 31.10.2025 22:20, Grygorii Strashko wrote: >>>>> --- a/xen/Kconfig.debug >>>>> +++ b/xen/Kconfig.debug >>>>> @@ -155,4 +155,19 @@ config DEBUG_INFO >>>>>          "make install-xen" for installing xen.efi, stripping needs to be >>>>>          done outside the Xen build environment). >>>>>    +config HAS_VMTRACE >>>>> +    bool >>>>> + >>>>> +config VMTRACE >>>>> +    bool "HW VM tracing support" >>>>> +    depends on HAS_VMTRACE >>>>> +    default y >>>>> +    help >>>>> +      Enables HW VM tracing support which allows to configure HW processor >>>>> +      features (vmtrace_op) to enable capturing information about software >>>>> +      execution using dedicated hardware facilities with minimal interference >>>>> +      to the software being traced. The trace date can be retrieved using buffer >>>> >>>> Nit: s/date/data/ >>>> >>>>> +      shared between Xen and domain >>>>> +      (see XENMEM_acquire_resource(XENMEM_resource_vmtrace_buf)). >>>>> + >>>> >>>> I was actually meaning to ask that "VMX only" should somehow be mentioned here, >>>> but then I noticed this is an arch-independent location. >>> >>> Right, Arch code advertise VMTRACE support with HAS_VMTRACE. >>> In this particular case: >>> config INTEL_VMX >>> ... >>>     select HAS_VMTRACE >>> >>> >>>> I'm not quite sure we want it like this (just yet). >>> >>> ? >> >> To rephrase the question: Are we expecting anything other than VMX to support >> VMTRACE any time soon? >> > > That's I do not know. > > I assume your point is similar to what Teddy noted [1]. > > I think vmtrace code can be consolidate, but question is on what level(s): > > only: >  xen/arch/x86/hvm/vmx/ >  |- vmtrace.c > > or: >  xen/arch/x86/hvm >  |- vmtrace.c >     <- vmtrace_alloc/free_buffer(), acquire_vmtrace_buf(), do_vmtrace_op() >  xen/arch/x86/hvm/vmx/ >  |- vmtrace.c > > it will require more work comparing to the current change. Well, I don't think code movement is strictly necessary here. But as I'm unconvinced of Kconfig.debug (in whatever subdir) being an appropriate place to add this, for the time being merely putting the new Kconfig option directly next to INTEL_VMX (and then without any new HAS_*) wants at least considering, imo. If and when some other use appears, HAS_* can be introduced and the whole thing moved. As otoh abstracting things in an arch-independent way also has its merits, it is - as said - not quite clear to me which way we'd prefer to have it. Jan > [1] https://patchwork.kernel.org/comment/26637627/ > From xen-devel-bounces@lists.xenproject.org Mon Nov 10 07:12:04 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 07:12:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158130.1486518 (Exim 4.92) (envelope-from ) id 1vIM4E-0007ee-5Q; Mon, 10 Nov 2025 07:11:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158130.1486518; Mon, 10 Nov 2025 07:11:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIM4E-0007eX-1H; Mon, 10 Nov 2025 07:11:58 +0000 Received: by outflank-mailman (input) for mailman id 1158130; Mon, 10 Nov 2025 07:11:57 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIM4D-0007eR-L0 for xen-devel@lists.xenproject.org; Mon, 10 Nov 2025 07:11:57 +0000 Received: from mail-wr1-x436.google.com (mail-wr1-x436.google.com [2a00:1450:4864:20::436]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 89dbc640-be04-11f0-980a-7dc792cee155; Mon, 10 Nov 2025 08:11:55 +0100 (CET) Received: by mail-wr1-x436.google.com with SMTP id ffacd0b85a97d-42b312a089fso704465f8f.2 for ; Sun, 09 Nov 2025 23:11:55 -0800 (PST) Received: from ?IPV6:2003:ca:b70c:6a8d:3447:d20d:2d49:c08? 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Sun, 09 Nov 2025 23:11:54 -0800 (PST) Message-ID: <47f86a44-007f-4b90-9656-b2440238b2ba@suse.com> Date: Mon, 10 Nov 2025 08:11:52 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH v3] xen/x86: guest_access: optimize raw_x_guest() for PV and HVM combinations To: Grygorii Strashko Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , Teddy Astie , "xen-devel@lists.xenproject.org" References: <20251107181739.3034098-1-grygorii_strashko@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251107181739.3034098-1-grygorii_strashko@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 07.11.2025 19:17, Grygorii Strashko wrote: > --- a/xen/arch/x86/Makefile > +++ b/xen/arch/x86/Makefile > @@ -71,7 +71,7 @@ obj-y += time.o > obj-y += traps-setup.o > obj-y += traps.o > obj-$(CONFIG_INTEL) += tsx.o > -obj-y += usercopy.o > +obj-$(CONFIG_PV) += usercopy.o Imo, if this was indeed doable (see below) the file would rather want moving to pv/. > --- a/xen/arch/x86/include/asm/guest_access.h > +++ b/xen/arch/x86/include/asm/guest_access.h > @@ -13,26 +13,64 @@ > #include > > /* Raw access functions: no type checking. */ > -#define raw_copy_to_guest(dst, src, len) \ > - (is_hvm_vcpu(current) ? \ > - copy_to_user_hvm((dst), (src), (len)) : \ > - copy_to_guest_pv(dst, src, len)) > -#define raw_copy_from_guest(dst, src, len) \ > - (is_hvm_vcpu(current) ? \ > - copy_from_user_hvm((dst), (src), (len)) : \ > - copy_from_guest_pv(dst, src, len)) > -#define raw_clear_guest(dst, len) \ > - (is_hvm_vcpu(current) ? \ > - clear_user_hvm((dst), (len)) : \ > - clear_guest_pv(dst, len)) > -#define __raw_copy_to_guest(dst, src, len) \ > - (is_hvm_vcpu(current) ? \ > - copy_to_user_hvm((dst), (src), (len)) : \ > - __copy_to_guest_pv(dst, src, len)) > -#define __raw_copy_from_guest(dst, src, len) \ > - (is_hvm_vcpu(current) ? \ > - copy_from_user_hvm((dst), (src), (len)) : \ > - __copy_from_guest_pv(dst, src, len)) > +static inline bool raw_use_hvm_access(const struct vcpu *v) > +{ > + return IS_ENABLED(CONFIG_HVM) && (!IS_ENABLED(CONFIG_PV) || is_hvm_vcpu(v)); > +} Without a full audit (likely tedious and error prone) this still is a behavioral change for some (likely unintended) use against a system domain (likely the idle one): With HVM=y PV=n we'd suddenly use the HVM accessor there. IOW imo the "system domains are implicitly PV" aspect wants retaining, even if only "just in case". It's okay not to invoke the PV accessor (but return "len" instead), but it's not okay to invoke the HVM one. > +static inline unsigned int raw_copy_to_guest(void *dst, const void *src, > + unsigned int len) > +{ > + if ( raw_use_hvm_access(current) ) > + return copy_to_user_hvm(dst, src, len); > + else if ( IS_ENABLED(CONFIG_PV) ) > + return copy_to_guest_pv(dst, src, len); > + else > + return len; > +} > + > +static inline unsigned int raw_copy_from_guest(void *dst, const void *src, > + unsigned int len) > +{ > + if ( raw_use_hvm_access(current) ) > + return copy_from_user_hvm(dst, src, len); > + else if ( IS_ENABLED(CONFIG_PV) ) > + return copy_from_guest_pv(dst, src, len); > + else > + return len; > +} > + > +static inline unsigned int raw_clear_guest(void *dst, unsigned int len) > +{ > + if ( raw_use_hvm_access(current) ) > + return clear_user_hvm(dst, len); > + else if ( IS_ENABLED(CONFIG_PV) ) > + return clear_guest_pv(dst, len); > + else > + return len; > +} > + > +static inline unsigned int __raw_copy_to_guest(void *dst, const void *src, > + unsigned int len) > +{ > + if ( raw_use_hvm_access(current) ) > + return copy_to_user_hvm(dst, src, len); > + else if ( IS_ENABLED(CONFIG_PV) ) > + return __copy_to_guest_pv(dst, src, len); > + else > + return len; > +} > + > +static inline unsigned int __raw_copy_from_guest(void *dst, const void *src, > + unsigned int len) > +{ > + if ( raw_use_hvm_access(current) ) > + return copy_from_user_hvm(dst, src, len); > + else if ( IS_ENABLED(CONFIG_PV) ) > + return __copy_from_guest_pv(dst, src, len); > + else > + return len; > +} I have to admit that I'm not quite happy about the redundancy here (leaving aside the imo Misra-conflicting uses of "else"). It looks as if some macro- ization could still help. Not sure what others think, though. Jan From xen-devel-bounces@lists.xenproject.org Mon Nov 10 08:13:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 08:13:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158142.1486527 (Exim 4.92) (envelope-from ) id 1vIN1R-00071p-Cw; Mon, 10 Nov 2025 08:13:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158142.1486527; Mon, 10 Nov 2025 08:13:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIN1R-00071i-9X; Mon, 10 Nov 2025 08:13:09 +0000 Received: by outflank-mailman (input) for mailman id 1158142; Mon, 10 Nov 2025 08:13:08 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIN1Q-00071c-2N for xen-devel@lists.xenproject.org; Mon, 10 Nov 2025 08:13:08 +0000 Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 14e8ff0f-be0d-11f0-9d18-b5c5bf9af7f9; Mon, 10 Nov 2025 09:13:05 +0100 (CET) Received: from pps.filterd (m0360083.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 5A9Mrb3H023648; Mon, 10 Nov 2025 08:11:59 GMT Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 4a9wc6y6xk-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 10 Nov 2025 08:11:58 +0000 (GMT) Received: from m0360083.ppops.net (m0360083.ppops.net [127.0.0.1]) by pps.reinject (8.18.1.12/8.18.0.8) with ESMTP id 5AA86mfJ029272; Mon, 10 Nov 2025 08:11:58 GMT Received: from ppma23.wdc07v.mail.ibm.com (5d.69.3da9.ip4.static.sl-reverse.com [169.61.105.93]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 4a9wc6y6xf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 10 Nov 2025 08:11:58 +0000 (GMT) Received: from pps.filterd (ppma23.wdc07v.mail.ibm.com [127.0.0.1]) by ppma23.wdc07v.mail.ibm.com (8.18.1.2/8.18.1.2) with ESMTP id 5AA51uvx014762; Mon, 10 Nov 2025 08:11:56 GMT Received: from smtprelay03.fra02v.mail.ibm.com ([9.218.2.224]) by ppma23.wdc07v.mail.ibm.com (PPS) with ESMTPS id 4aahpjvgyb-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 10 Nov 2025 08:11:56 +0000 Received: from smtpav02.fra02v.mail.ibm.com (smtpav02.fra02v.mail.ibm.com [10.20.54.101]) by smtprelay03.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 5AA8BsbP47645168 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 10 Nov 2025 08:11:54 GMT Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 951A120043; Mon, 10 Nov 2025 08:11:54 +0000 (GMT) Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7574A20040; Mon, 10 Nov 2025 08:11:52 +0000 (GMT) Received: from li-008a6a4c-3549-11b2-a85c-c5cc2836eea2.ibm.com (unknown [9.87.129.150]) by smtpav02.fra02v.mail.ibm.com (Postfix) with ESMTPS; Mon, 10 Nov 2025 08:11:52 +0000 (GMT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 14e8ff0f-be0d-11f0-9d18-b5c5bf9af7f9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc :content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=pp1; bh=WrPV25 ztsYqDlknSOqBjqi2t4Xb9rXv0xi6T3uNdmFI=; b=Yv6+1trT97d7+DoSIjC5W6 OLc4ylQKCKMAex0x0xYUBtCqgGuOUmceIjAitPSSQP4ha308n1vNjyCUQ6cvZ2r4 ei0eh+6E9Z0WEUSMVNe1jsCNm1I0JTMS3qMI8JK4k2CVJe8jcjFAe6GAYoZoYIPF f2cH/cIWwfriYd6HDlkD0TTd91dXSMehLyFJYeYA+XopFefAuy+V38DHQN1UNf/W 3T+xvOmCCkXhX+7+7DFZbaLjxNtRDGKQpKgGoSwe7T8r3LPSCJLEPD7oCZTkMUFj LW2FbGx5/pNgTdyi+piCoZDGmqPtaOa5o+7Wu4AdD2ze9GkYr3qc6pGcoRQ53Zvg == Date: Mon, 10 Nov 2025 09:11:50 +0100 From: Alexander Gordeev To: Ryan Roberts Cc: "David Hildenbrand (Red Hat)" , Kevin Brodsky , linux-mm@kvack.org, linux-kernel@vger.kernel.org, Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org Subject: Re: [PATCH v4 06/12] mm: introduce generic lazy_mmu helpers Message-ID: <413b2c49-f124-4cda-8fea-a6cc165f6326-agordeev@linux.ibm.com> References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-7-kevin.brodsky@arm.com> <71418b31-aedb-4600-9558-842515dd6c44@arm.com> <645178fd-df4e-42fe-b55e-97d9506499be@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <645178fd-df4e-42fe-b55e-97d9506499be@arm.com> X-TM-AS-GCONF: 00 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTA4MDAxOCBTYWx0ZWRfX0qxBt6PLz+e1 5ZkKhsJ1OtkLmCa4F9dckZhmGNoe5OQimO5vrOJyhCGGn+Oo9dBlfBgtY6sJsMOGytiqooOVqqZ 5VlqH6qDTNOxg7GqSCIIkxN9587HG/yU0g8PN3RC/Kn+8SDIn+tbvRphHit2rtoXvmhJTS9c/na zuc/vHReC35SkVZuc771TOtpWXwRcO+j9mxabq08ugqh/MQzZP8E1qqkKzT/vrw3I0gce+auuVH 8WG34NSJDjSCXhv0z/g1L2qiclooBzH5Y6sWhPQC3GQgXW7SVzsG1L6s2HqrTxBfWDx3OGWlJ4d 4V2wmLiIQn3wqkNWKtMaFFAnqiHVcDdPhaMGEjvefyMBpcxvcGE7lueGMCRslhcd2O9xOyzBoik qwn8HhTZbHMdNrVo7h0rei5NGYuy+g== X-Authority-Analysis: v=2.4 cv=GcEaXAXL c=1 sm=1 tr=0 ts=69119e4e cx=c_pps a=3Bg1Hr4SwmMryq2xdFQyZA==:117 a=3Bg1Hr4SwmMryq2xdFQyZA==:17 a=8nJEP1OIZ-IA:10 a=6UeiqGixMTsA:10 a=VkNPw1HP01LnGYTKEx00:22 a=VwQbUJbxAAAA:8 a=VnNF1IyMAAAA:8 a=7CQSdrXTAAAA:8 a=AOQWXcEz_zGDWlu_gTMA:9 a=3ZKOabzyN94A:10 a=wPNLvfGTeEIA:10 a=a-qgeE7W1pNrGK8U0ZQC:22 a=DXsff8QfwkrTrK3sU8N1:22 a=Z5ABNNGmrOfJ6cZ5bIyy:22 a=bWyr8ysk75zN3GCy5bjg:22 X-Proofpoint-GUID: fP4xPRY0VPWa2LszakKlWyXVqqNy18Qg X-Proofpoint-ORIG-GUID: hjtY_m4sJxhd70lXi6KoIa-Y8h7Rk4-J X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-10_03,2025-11-06_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 malwarescore=0 bulkscore=0 adultscore=0 impostorscore=0 lowpriorityscore=0 clxscore=1015 spamscore=0 priorityscore=1501 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510240000 definitions=main-2511080018 On Fri, Nov 07, 2025 at 03:22:54PM +0000, Ryan Roberts wrote: Hi Ryan, > On 07/11/2025 14:34, David Hildenbrand (Red Hat) wrote: > >>>   #ifndef pte_batch_hint > >>> diff --git a/mm/kasan/shadow.c b/mm/kasan/shadow.c > >>> index 5d2a876035d6..c49b029d3593 100644 > >>> --- a/mm/kasan/shadow.c > >>> +++ b/mm/kasan/shadow.c > >>> @@ -305,7 +305,7 @@ static int kasan_populate_vmalloc_pte(pte_t *ptep, > >>> unsigned long addr, > >>>       pte_t pte; > >>>       int index; > >>>   -    arch_leave_lazy_mmu_mode(); > >>> +    lazy_mmu_mode_pause(); > >> > >> I wonder if there really are use cases that *require* pause/resume? I think > >> these kasan cases could be correctly implemented using a new nest level instead? > >> Are there cases where the effects really need to be immediate or do the effects > >> just need to be visible when you get to where the resume is? > >> > >> If the latter, that could just be turned into a nested disable (e.g. a flush). > >> In this case, there is only 1 PTE write so no benefit, but I wonder if other > >> cases may have more PTE writes that could then still be batched. It would be > >> nice to simplify the API by removing pause/resume if we can? > > > > It has clear semantics, clearer than some nest-disable IMHO. > > > > Maybe you can elaborate how you would change ("simplify") the API in that > > regard? What would the API look like? > > By simplify, I just meant can we remove lazy_mmu_mode_pause() and > lazy_mmu_mode_resume() ? > > > We currently have: > > apply_to_page_range > lazy_mmu_mode_enable() > kasan_populate_vmalloc_pte() > lazy_mmu_mode_pause() > > lazy_mmu_mode_resume() > lazy_mmu_mode_disable() > > Where is setting ptes. But if doesn't need the effects to be > visible until lazy_mmu_mode_resume(), then you could replace the block with: > > apply_to_page_range > lazy_mmu_mode_enable() > kasan_populate_vmalloc_pte() > lazy_mmu_mode_enable() > > lazy_mmu_mode_disable() > lazy_mmu_mode_disable() > > However, looking at this more closely, I'm not really clear on why we need *any* > special attention to lazy mmu inside of kasan_populate_vmalloc_pte() and > kasan_depopulate_vmalloc_pte(). > > I *think* that the original concern was that we were doing ptep_get(ptep) inside > of a lazy_mmu block? So we need to flush so that the getter returns the most > recent value? But given we have never written to that particular ptep while in > the lazy mmu block, there is surely no hazard in the first place? There is, please see: https://lore.kernel.org/linux-mm/cover.1755528662.git.agordeev@linux.ibm.com/ > apply_to_existing_page_range() will only call kasan_depopulate_vmalloc_pte() > once per pte, right? So given we read the ptep before writing it, there should > be no hazard? If so we can remove pause/resume. Unfortunately, we rather not, please see: https://lore.kernel.org/linux-mm/d407a381-099b-4ec6-a20e-aeff4f3d750f@arm.com/ The problem is kasan code invokes apply_to_page_range(), which enters lazy_mmu mode unconditionally. I would claim that is rather an obstacle for the kasan code, not a benefit. But it needs to be tackled. Should apply_to_page_range() had an option not to enter the lazy_mmu mode (e.g. an extra "bool skip_lazy" parameter) - the pause/resume could have been avoided. > Thanks, > Ryan Thanks! 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Mon, 10 Nov 2025 00:44:36 -0800 (PST) Content-Type: multipart/alternative; boundary="------------Wvu8FsypiDWNyspQYkevPvrX" Message-ID: Date: Mon, 10 Nov 2025 09:44:34 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH for-4.21] fix xl.cfg docs to correct viridian defaults list To: Andrew Cooper , James Dingwall , xen-devel@lists.xenproject.org References: <8c9f0988-0eb3-40f0-bd22-13b23af03ed8@citrix.com> Content-Language: en-US From: Oleksii Kurochko In-Reply-To: <8c9f0988-0eb3-40f0-bd22-13b23af03ed8@citrix.com> This is a multi-part message in MIME format. --------------Wvu8FsypiDWNyspQYkevPvrX Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 11/7/25 11:50 PM, Andrew Cooper wrote: > On 07/11/2025 7:23 pm, James Dingwall wrote: >> Hi, >> >> I was trying to work out why this would cause my Windows 10 guest to hang >> when it should have been equivalent to ['defaults'] or 1. >> >> viridian = ['base', 'freq', 'apic_assist', 'crash_ctl', 'no_vp_limit', 'cpu_hotplug', 'time_ref_count', 'stimer'] >> >> Checking the libxl sources show that in fact the defaults are: >> >> if (libxl_defbool_val(info->u.hvm.viridian)) { >> /* Enable defaults */ >> libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_BASE); >> libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_FREQ); >> libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_TIME_REF_COUNT); >> libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_APIC_ASSIST); >> libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_CRASH_CTL); >> libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_NO_VP_LIMIT); >> libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_CPU_HOTPLUG); >> } >> >> LIBXL_VIRIDIAN_ENLIGHTENMENT_STIMER was removed as a default enlightement in >> e83077a3d11072708a5c38fa09fa9d011914e2a1 but the docs were not kept aligned. > Hmm, indeed. > > For the patch, Reviewed-by: Andrew Cooper > > It should have a fixes tag, but I can fix that on commit. > > CC'ing Oleksii.  This is a docs fix should be considered for 4.21 at > this juncture. Agree, it could be in 4.21: Release-Acked-By: Oleksii Kurochko Thanks for notifying me. ~ Oleksii --------------Wvu8FsypiDWNyspQYkevPvrX Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: 8bit


On 11/7/25 11:50 PM, Andrew Cooper wrote:
On 07/11/2025 7:23 pm, James Dingwall wrote:

Hi,

I was trying to work out why this would cause my Windows 10 guest to hang
when it should have been equivalent to ['defaults'] or 1.

viridian = ['base', 'freq', 'apic_assist', 'crash_ctl', 'no_vp_limit', 'cpu_hotplug', 'time_ref_count', 'stimer']

Checking the libxl sources show that in fact the defaults are:

    if (libxl_defbool_val(info->u.hvm.viridian)) {
        /* Enable defaults */
        libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_BASE);
        libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_FREQ);
        libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_TIME_REF_COUNT);
        libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_APIC_ASSIST);
        libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_CRASH_CTL);
        libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_NO_VP_LIMIT);
        libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_CPU_HOTPLUG);
    }

LIBXL_VIRIDIAN_ENLIGHTENMENT_STIMER was removed as a default enlightement in
e83077a3d11072708a5c38fa09fa9d011914e2a1 but the docs were not kept aligned.

Hmm, indeed.

For the patch, Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>

It should have a fixes tag, but I can fix that on commit.

CC'ing Oleksii.  This is a docs fix should be considered for 4.21 at
this juncture.
Agree, it could be in 4.21:

Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>

Thanks for notifying me.

~ Oleksii
--------------Wvu8FsypiDWNyspQYkevPvrX-- From xen-devel-bounces@lists.xenproject.org Mon Nov 10 09:20:08 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 09:20:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158169.1486548 (Exim 4.92) (envelope-from ) id 1vIO42-0006sK-Cz; Mon, 10 Nov 2025 09:19:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158169.1486548; Mon, 10 Nov 2025 09:19:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIO42-0006sC-A0; Mon, 10 Nov 2025 09:19:54 +0000 Received: by outflank-mailman (input) for mailman id 1158169; Mon, 10 Nov 2025 09:19:52 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIO40-0006s6-TB for xen-devel@lists.xenproject.org; Mon, 10 Nov 2025 09:19:52 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 68511ab8-be16-11f0-9d18-b5c5bf9af7f9; Mon, 10 Nov 2025 10:19:50 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 91A6F2B; Mon, 10 Nov 2025 01:19:41 -0800 (PST) Received: from [10.57.85.123] (unknown [10.57.85.123]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CED693F63F; Mon, 10 Nov 2025 01:19:42 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 68511ab8-be16-11f0-9d18-b5c5bf9af7f9 Message-ID: Date: Mon, 10 Nov 2025 09:19:40 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 06/12] mm: introduce generic lazy_mmu helpers Content-Language: en-GB To: Alexander Gordeev Cc: "David Hildenbrand (Red Hat)" , Kevin Brodsky , linux-mm@kvack.org, linux-kernel@vger.kernel.org, Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-7-kevin.brodsky@arm.com> <71418b31-aedb-4600-9558-842515dd6c44@arm.com> <645178fd-df4e-42fe-b55e-97d9506499be@arm.com> <413b2c49-f124-4cda-8fea-a6cc165f6326-agordeev@linux.ibm.com> From: Ryan Roberts In-Reply-To: <413b2c49-f124-4cda-8fea-a6cc165f6326-agordeev@linux.ibm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 10/11/2025 08:11, Alexander Gordeev wrote: > On Fri, Nov 07, 2025 at 03:22:54PM +0000, Ryan Roberts wrote: > > Hi Ryan, > >> On 07/11/2025 14:34, David Hildenbrand (Red Hat) wrote: >>>>>   #ifndef pte_batch_hint >>>>> diff --git a/mm/kasan/shadow.c b/mm/kasan/shadow.c >>>>> index 5d2a876035d6..c49b029d3593 100644 >>>>> --- a/mm/kasan/shadow.c >>>>> +++ b/mm/kasan/shadow.c >>>>> @@ -305,7 +305,7 @@ static int kasan_populate_vmalloc_pte(pte_t *ptep, >>>>> unsigned long addr, >>>>>       pte_t pte; >>>>>       int index; >>>>>   -    arch_leave_lazy_mmu_mode(); >>>>> +    lazy_mmu_mode_pause(); >>>> >>>> I wonder if there really are use cases that *require* pause/resume? I think >>>> these kasan cases could be correctly implemented using a new nest level instead? >>>> Are there cases where the effects really need to be immediate or do the effects >>>> just need to be visible when you get to where the resume is? >>>> >>>> If the latter, that could just be turned into a nested disable (e.g. a flush). >>>> In this case, there is only 1 PTE write so no benefit, but I wonder if other >>>> cases may have more PTE writes that could then still be batched. It would be >>>> nice to simplify the API by removing pause/resume if we can? >>> >>> It has clear semantics, clearer than some nest-disable IMHO. >>> >>> Maybe you can elaborate how you would change ("simplify") the API in that >>> regard? What would the API look like? >> >> By simplify, I just meant can we remove lazy_mmu_mode_pause() and >> lazy_mmu_mode_resume() ? >> >> >> We currently have: >> >> apply_to_page_range >> lazy_mmu_mode_enable() >> kasan_populate_vmalloc_pte() >> lazy_mmu_mode_pause() >> >> lazy_mmu_mode_resume() >> lazy_mmu_mode_disable() >> >> Where is setting ptes. But if doesn't need the effects to be >> visible until lazy_mmu_mode_resume(), then you could replace the block with: >> >> apply_to_page_range >> lazy_mmu_mode_enable() >> kasan_populate_vmalloc_pte() >> lazy_mmu_mode_enable() >> >> lazy_mmu_mode_disable() >> lazy_mmu_mode_disable() >> >> However, looking at this more closely, I'm not really clear on why we need *any* >> special attention to lazy mmu inside of kasan_populate_vmalloc_pte() and >> kasan_depopulate_vmalloc_pte(). >> >> I *think* that the original concern was that we were doing ptep_get(ptep) inside >> of a lazy_mmu block? So we need to flush so that the getter returns the most >> recent value? But given we have never written to that particular ptep while in >> the lazy mmu block, there is surely no hazard in the first place? > > There is, please see: > https://lore.kernel.org/linux-mm/cover.1755528662.git.agordeev@linux.ibm.com/ I've stared at this for a while, but I'm afraid I still don't see the problem. This all looks safe to me. Could you explain exactly what this issue is? If I've understood correctly, kasan_populate_vmalloc() is called during virtual range allocation by vmalloc. This is not in a nested lazy mmu block (but it wouldn't matter if it was once we have Kevin's nested changes to ensure flush when exiting the nested scope). kasan_populate_vmalloc() calls apply_to_page_range(), which will walk the set of ptes, calling kasan_populate_vmalloc_pte() for each one. kasan_populate_vmalloc_pte() does a ptep_get() then, if none, calls set_pte_at(). That's not a hazard since you're calling get before the set and you only visit each pte once for the apply_to_page_range() lazy mmu block. > >> apply_to_existing_page_range() will only call kasan_depopulate_vmalloc_pte() >> once per pte, right? So given we read the ptep before writing it, there should >> be no hazard? If so we can remove pause/resume. > > Unfortunately, we rather not, please see: > https://lore.kernel.org/linux-mm/d407a381-099b-4ec6-a20e-aeff4f3d750f@arm.com/ Sorry but I don't see anything relavent to my point in this mail. Perhaps there is some s390-specific detail that I'm failing to understand? Thanks, Ryan > > The problem is kasan code invokes apply_to_page_range(), which enters lazy_mmu > mode unconditionally. I would claim that is rather an obstacle for the kasan > code, not a benefit. But it needs to be tackled. > > Should apply_to_page_range() had an option not to enter the lazy_mmu mode > (e.g. an extra "bool skip_lazy" parameter) - the pause/resume could have > been avoided. > >> Thanks, >> Ryan > > Thanks! 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Cc-ing Oleksii, for him to judge. > Yes, and backporting, but I've got more ucode bugfixes I'm working on. > > One in particular was always broken, but exasperated by one of my recent > changes, but I'm not sure if the result is going to be comfortable for > 4.21 at this juncture. I think it’s not a good idea to skip the SHA check, so it makes sense to accept this patch: Release-Acked-By: Oleksii Kurochko Thanks. ~ Oleksii --------------0jexM5uCR0K2xI3Y27Hg3Gzq Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: 8bit


On 11/7/25 3:34 PM, Andrew Cooper wrote:
On 07/11/2025 2:30 pm, Jan Beulich wrote:

On 07.11.2025 14:47, Andrew Cooper wrote:

Link: https://git.kernel.org/tip/d23550efc6800841b4d1639784afaebdea946ae0
Fixes: ff8228ab4658 ("x86/ucode: Relax digest check when Entrysign is fixed in firmware")
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>

Acked-by: Jan Beulich <jbeulich@suse.com>

Pretty likely wants to go into 4.21? Cc-ing Oleksii, for him to judge.

Yes, and backporting, but I've got more ucode bugfixes I'm working on.

One in particular was always broken, but exasperated by one of my recent
changes, but I'm not sure if the result is going to be comfortable for
4.21 at this juncture.
I think it’s not a good idea to skip the SHA check, so it makes sense to
accept this patch:
 Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>

Thanks.

~ Oleksii
--------------0jexM5uCR0K2xI3Y27Hg3Gzq-- From xen-devel-bounces@lists.xenproject.org Mon Nov 10 10:37:49 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 10:37:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158194.1486568 (Exim 4.92) (envelope-from ) id 1vIPH3-0006EY-31; Mon, 10 Nov 2025 10:37:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158194.1486568; Mon, 10 Nov 2025 10:37:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIPH2-0006EQ-Tg; Mon, 10 Nov 2025 10:37:24 +0000 Received: by outflank-mailman (input) for mailman id 1158194; Mon, 10 Nov 2025 10:37:23 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIPH1-0006E1-TK for xen-devel@lists.xenproject.org; Mon, 10 Nov 2025 10:37:23 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 3cb6b0b3-be21-11f0-9d18-b5c5bf9af7f9; Mon, 10 Nov 2025 11:37:21 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CEEFE497; Mon, 10 Nov 2025 02:37:12 -0800 (PST) Received: from [10.57.39.147] (unknown [10.57.39.147]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0E4913F66E; Mon, 10 Nov 2025 02:37:12 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 3cb6b0b3-be21-11f0-9d18-b5c5bf9af7f9 Message-ID: Date: Mon, 10 Nov 2025 11:36:52 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 02/12] x86/xen: simplify flush_lazy_mmu() To: Ryan Roberts , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-3-kevin.brodsky@arm.com> Content-Language: en-GB From: Kevin Brodsky In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 07/11/2025 12:31, Ryan Roberts wrote: > On 29/10/2025 10:08, Kevin Brodsky wrote: >> arch_flush_lazy_mmu_mode() is called when outstanding batched >> pgtable operations must be completed immediately. There should >> however be no need to leave and re-enter lazy MMU completely. The >> only part of that sequence that we really need is xen_mc_flush(); >> call it directly. >> >> Signed-off-by: Kevin Brodsky > This looks functionally equivalent to me, so: > > Reviewed-by: Ryan Roberts > > But I don't think this tidy up is strictly necessary for your series to work? > (perhaps I'll change my mind on that as I go through it). I initially thought it might be, but in the end I think you're right - it should still work fine without this patch. Still, I'd rather avoid unnecessary calls to arch_enter() and arch_leave() as it makes it harder to reason about what is called where. Namely, keeping them here means that a nested call to lazy_mmu_mode_disable() would cause arch_leave() then arch_enter() to be called - rather unexpected. The only calls to arch_enter() and arch_leave() that are left after this series are the ones in and the Xen context-switching logic (the one case where calling arch hooks directly is justified, see discussion on v3 [1]). - Kevin [1] https://lore.kernel.org/all/390e41ae-4b66-40c1-935f-7a1794ba0b71@arm.com/ From xen-devel-bounces@lists.xenproject.org Mon Nov 10 10:37:55 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 10:37:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158202.1486578 (Exim 4.92) (envelope-from ) id 1vIPHX-0006fs-Bb; Mon, 10 Nov 2025 10:37:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158202.1486578; Mon, 10 Nov 2025 10:37:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIPHX-0006fl-8k; Mon, 10 Nov 2025 10:37:55 +0000 Received: by outflank-mailman (input) for mailman id 1158202; Mon, 10 Nov 2025 10:37:54 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIPHW-0006ac-AP for xen-devel@lists.xenproject.org; Mon, 10 Nov 2025 10:37:54 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 4f185c22-be21-11f0-980a-7dc792cee155; Mon, 10 Nov 2025 11:37:52 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B4A3CFEC; Mon, 10 Nov 2025 02:37:43 -0800 (PST) Received: from [10.57.39.147] (unknown [10.57.39.147]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0EB953F66E; Mon, 10 Nov 2025 02:37:43 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 4f185c22-be21-11f0-980a-7dc792cee155 Message-ID: <0d00dd6e-9e39-4ac6-8ea4-9407e75947eb@arm.com> Date: Mon, 10 Nov 2025 11:37:41 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 05/12] mm: introduce CONFIG_ARCH_HAS_LAZY_MMU_MODE To: Ryan Roberts , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-6-kevin.brodsky@arm.com> <6a9c846f-22b6-4d5f-81dc-6cdcd4905952@arm.com> Content-Language: en-GB From: Kevin Brodsky In-Reply-To: <6a9c846f-22b6-4d5f-81dc-6cdcd4905952@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 07/11/2025 13:56, Ryan Roberts wrote: >> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig >> index 6663ffd23f25..e6bf5c7311b5 100644 >> --- a/arch/arm64/Kconfig >> +++ b/arch/arm64/Kconfig >> @@ -122,6 +122,7 @@ config ARM64 >> select ARCH_WANTS_NO_INSTR >> select ARCH_WANTS_THP_SWAP if ARM64_4K_PAGES >> select ARCH_HAS_UBSAN >> + select ARCH_HAS_LAZY_MMU_MODE > nit: This list is mostly in alphabetical order. Further up the list there are a > lot of ARCH_HAS_* entries. Perhaps move it to the correct position in that lot? > Then ARCH_HAS_UBSAN stays out of order on its own. That's fair, it does look like it's mostly in order apart from ARCH_HAS_UBSAN. Will move it further up. - Kevin From xen-devel-bounces@lists.xenproject.org Mon Nov 10 10:45:17 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 10:45:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158221.1486588 (Exim 4.92) (envelope-from ) id 1vIPOc-0008Ta-1L; Mon, 10 Nov 2025 10:45:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158221.1486588; Mon, 10 Nov 2025 10:45:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIPOb-0008TT-Ug; Mon, 10 Nov 2025 10:45:13 +0000 Received: by outflank-mailman (input) for mailman id 1158221; Mon, 10 Nov 2025 10:45:12 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIPOa-0008TK-UQ for xen-devel@lists.xenproject.org; Mon, 10 Nov 2025 10:45:12 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 5512a26f-be22-11f0-9d18-b5c5bf9af7f9; Mon, 10 Nov 2025 11:45:11 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3DC26497; Mon, 10 Nov 2025 02:45:03 -0800 (PST) Received: from [10.57.39.147] (unknown [10.57.39.147]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 78B2F3F66E; Mon, 10 Nov 2025 02:45:03 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5512a26f-be22-11f0-9d18-b5c5bf9af7f9 Message-ID: Date: Mon, 10 Nov 2025 11:45:00 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 06/12] mm: introduce generic lazy_mmu helpers To: Ryan Roberts , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-7-kevin.brodsky@arm.com> <71418b31-aedb-4600-9558-842515dd6c44@arm.com> Content-Language: en-GB From: Kevin Brodsky In-Reply-To: <71418b31-aedb-4600-9558-842515dd6c44@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 07/11/2025 14:26, Ryan Roberts wrote: > On 29/10/2025 10:09, Kevin Brodsky wrote: >> [...] >> >> diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c >> index b8d37eb037fc..d9c8e94f140f 100644 >> --- a/arch/arm64/mm/mmu.c >> +++ b/arch/arm64/mm/mmu.c >> @@ -731,7 +731,7 @@ int split_kernel_leaf_mapping(unsigned long start, unsigned long end) >> return -EINVAL; >> >> mutex_lock(&pgtable_split_lock); >> - arch_enter_lazy_mmu_mode(); >> + lazy_mmu_mode_enable(); >> >> /* >> * The split_kernel_leaf_mapping_locked() may sleep, it is not a > This is a bit unfortunate, IMHO. The rest of this comment explains that although > you're not supposed to sleep inside lazy mmu mode, it's fine for arm64's > implementation. But we are no longer calling arm64's implementation; we are > calling a generic function, which does who knows what. > > I think it all still works, but we are no longer containing our assumptions in > arm64 code. We are relying on implementation details of generic code. I see your point. The change itself is still correct (and required considering patch 8), but maybe the documentation of the generic interface should be clarified to guarantee that the generic layer can itself cope with sleeping - without any guarantee regarding the behaviour of arch_*_lazy_mmu_mode. >> [...] >> >> diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h >> index e33df3da6980..14fd672bc9b2 100644 >> --- a/arch/x86/include/asm/pgtable.h >> +++ b/arch/x86/include/asm/pgtable.h >> @@ -117,7 +117,8 @@ extern pmdval_t early_pmd_flags; >> #define pte_val(x) native_pte_val(x) >> #define __pte(x) native_make_pte(x) >> >> -#define arch_end_context_switch(prev) do {} while(0) >> +#define arch_end_context_switch(prev) do {} while (0) >> +#define arch_flush_lazy_mmu_mode() do {} while (0) > Andrew converted over the default version of this (which you have removed with > this commit) to be static inline instead of the do/while guff. Perhaps you > should try to preserve that improvement here? > > See Commit d02ac836e4d6 ("include/linux/pgtable.h: convert > arch_enter_lazy_mmu_mode() and friends to static inlines") Good point, I suppose I could also convert arch_end_context_switch() while at it. >> #endif /* CONFIG_PARAVIRT_XXL */ >> >> static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set) >> diff --git a/fs/proc/task_mmu.c b/fs/proc/task_mmu.c >> index fc35a0543f01..d16ba1d32169 100644 >> --- a/fs/proc/task_mmu.c >> +++ b/fs/proc/task_mmu.c >> @@ -2703,7 +2703,7 @@ static int pagemap_scan_pmd_entry(pmd_t *pmd, unsigned long start, >> return 0; >> } >> >> - arch_enter_lazy_mmu_mode(); >> + lazy_mmu_mode_enable(); >> >> if ((p->arg.flags & PM_SCAN_WP_MATCHING) && !p->vec_out) { >> /* Fast path for performing exclusive WP */ >> @@ -2773,7 +2773,7 @@ static int pagemap_scan_pmd_entry(pmd_t *pmd, unsigned long start, >> if (flush_end) >> flush_tlb_range(vma, start, addr); >> >> - arch_leave_lazy_mmu_mode(); >> + lazy_mmu_mode_disable(); >> pte_unmap_unlock(start_pte, ptl); >> >> cond_resched(); >> diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h >> index 9894366e768b..b5fdf32c437f 100644 >> --- a/include/linux/pgtable.h >> +++ b/include/linux/pgtable.h >> @@ -231,10 +231,31 @@ static inline int pmd_dirty(pmd_t pmd) >> * held, but for kernel PTE updates, no lock is held). Nesting is not permitted >> * and the mode cannot be used in interrupt context. >> */ >> -#ifndef CONFIG_ARCH_HAS_LAZY_MMU_MODE >> -static inline void arch_enter_lazy_mmu_mode(void) {} >> -static inline void arch_leave_lazy_mmu_mode(void) {} >> -static inline void arch_flush_lazy_mmu_mode(void) {} >> +#ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE >> +static inline void lazy_mmu_mode_enable(void) >> +{ >> + arch_enter_lazy_mmu_mode(); >> +} >> + >> +static inline void lazy_mmu_mode_disable(void) >> +{ >> + arch_leave_lazy_mmu_mode(); >> +} >> + >> +static inline void lazy_mmu_mode_pause(void) >> +{ >> + arch_leave_lazy_mmu_mode(); >> +} >> + >> +static inline void lazy_mmu_mode_resume(void) >> +{ >> + arch_enter_lazy_mmu_mode(); >> +} > It would be good to add documentation blocks for each of these. I considered it, but then realised that these functions are much better explained together (see comment added above in patch 7). Maybe a short description for each that refers to the big comment above? That wouldn't work well for the generated kernel-doc though... - Kevin  From xen-devel-bounces@lists.xenproject.org Mon Nov 10 10:48:09 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 10:48:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158232.1486597 (Exim 4.92) (envelope-from ) id 1vIPRP-0000dn-Da; Mon, 10 Nov 2025 10:48:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158232.1486597; Mon, 10 Nov 2025 10:48:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIPRP-0000dg-B7; Mon, 10 Nov 2025 10:48:07 +0000 Received: by outflank-mailman (input) for mailman id 1158232; Mon, 10 Nov 2025 10:48:05 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIPRN-0000dX-Gp for xen-devel@lists.xenproject.org; Mon, 10 Nov 2025 10:48:05 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id bb042450-be22-11f0-980a-7dc792cee155; Mon, 10 Nov 2025 11:48:03 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3CA95497; Mon, 10 Nov 2025 02:47:54 -0800 (PST) Received: from [10.57.39.147] (unknown [10.57.39.147]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 183443F66E; Mon, 10 Nov 2025 02:47:53 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: bb042450-be22-11f0-980a-7dc792cee155 Message-ID: Date: Mon, 10 Nov 2025 11:47:51 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 07/12] mm: enable lazy_mmu sections to nest To: Ryan Roberts , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-8-kevin.brodsky@arm.com> <999feffa-5d1d-42e3-bd3a-d949f2a9de9d@arm.com> Content-Language: en-GB From: Kevin Brodsky In-Reply-To: <999feffa-5d1d-42e3-bd3a-d949f2a9de9d@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 07/11/2025 14:59, Ryan Roberts wrote: > On 29/10/2025 10:09, Kevin Brodsky wrote: >> [...] >> >> diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h >> index b5fdf32c437f..e6064e00b22d 100644 >> --- a/include/linux/pgtable.h >> +++ b/include/linux/pgtable.h >> @@ -228,27 +228,86 @@ static inline int pmd_dirty(pmd_t pmd) >> * of the lazy mode. So the implementation must assume preemption may be enabled >> * and cpu migration is possible; it must take steps to be robust against this. >> * (In practice, for user PTE updates, the appropriate page table lock(s) are >> - * held, but for kernel PTE updates, no lock is held). Nesting is not permitted >> - * and the mode cannot be used in interrupt context. >> + * held, but for kernel PTE updates, no lock is held). The mode cannot be used >> + * in interrupt context. > "The mode cannot be used in interrupt context"; except it is for arm64. KFENCE > and/or DEBUG_PAGEALLOC will request the arch to change linear map permissions, > which will enter lazy mmu (now using the new generic API). This can happen in > softirq context. Are you happy with the wording update in patch 12? >> + * >> + * The lazy MMU mode is enabled for a given block of code using: >> + * >> + * lazy_mmu_mode_enable(); >> + * >> + * lazy_mmu_mode_disable(); >> + * >> + * Nesting is permitted: may itself use an enable()/disable() pair. >> + * A nested call to enable() has no functional effect; however disable() causes >> + * any batched architectural state to be flushed regardless of nesting. After a >> + * call to disable(), the caller can therefore rely on all previous page table >> + * modifications to have taken effect, but the lazy MMU mode may still be >> + * enabled. >> + * >> + * In certain cases, it may be desirable to temporarily pause the lazy MMU mode. >> + * This can be done using: >> + * >> + * lazy_mmu_mode_pause(); >> + * >> + * lazy_mmu_mode_resume(); >> + * >> + * This sequence must only be used if the lazy MMU mode is already enabled. >> + * pause() ensures that the mode is exited regardless of the nesting level; >> + * resume() re-enters the mode at the same nesting level. must not modify >> + * the lazy MMU state (i.e. it must not call any of the lazy_mmu_mode_* >> + * helpers). >> + * >> + * in_lazy_mmu_mode() can be used to check whether the lazy MMU mode is >> + * currently enabled. >> */ > Nice documentation! Thanks! >> #ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE >> static inline void lazy_mmu_mode_enable(void) >> { >> - arch_enter_lazy_mmu_mode(); >> + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; >> + >> + VM_WARN_ON_ONCE(state->nesting_level == U8_MAX); >> + /* enable() must not be called while paused */ >> + VM_WARN_ON(state->nesting_level > 0 && !state->active); >> + >> + if (state->nesting_level++ == 0) { > Hmm... for the arm64 case of calling this in an interrupt, Is it safe? > > If a task is calling this function and gets interrupted here, nesting_level==1 > but active==false. The interrupt then calls this function and increments from 1 > to 2 but arch_enter_lazy_mmu_mode() hasn't been called. > > More dangerously (I think), when the interrupt handler calls > lazy_mmu_mode_disable(), it will end up calling arch_flush_lazy_mmu_mode() which > could be an issue because as far as the arch is concerned, it's not in lazy mode. > > The current arm64 implementation works because setting and clearing the thread > flags is atomic. > > Perhaps you need to disable preemption around the if block? As you found out this is addressed in patch 12, but indeed I hadn't realised that this patch leaves the generic API in an unsafe situation w.r.t. interrupts. We at least need to have in_interrupt() checks in the generic layer by the time we get to this patch. >> + state->active = true; >> + arch_enter_lazy_mmu_mode(); >> + } >> } >> >> static inline void lazy_mmu_mode_disable(void) >> { >> - arch_leave_lazy_mmu_mode(); >> + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; >> + >> + VM_WARN_ON_ONCE(state->nesting_level == 0); >> + VM_WARN_ON(!state->active); >> + >> + if (--state->nesting_level == 0) { >> + state->active = false; >> + arch_leave_lazy_mmu_mode(); >> + } else { >> + /* Exiting a nested section */ >> + arch_flush_lazy_mmu_mode(); >> + } >> } >> >> static inline void lazy_mmu_mode_pause(void) >> { >> + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; >> + >> + VM_WARN_ON(state->nesting_level == 0 || !state->active); > nit: do you need the first condition? I think when nesting_level==0, we expect > to be !active? I suppose this should never happen indeed - I was just being extra defensive. Either way David suggested allowing pause()/resume() to be called outside of any section so the next version will bail out on nesting_level == 0. >> + >> + state->active = false; >> arch_leave_lazy_mmu_mode(); >> } >> >> static inline void lazy_mmu_mode_resume(void) >> { >> + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; >> + >> + VM_WARN_ON(state->nesting_level == 0 || state->active); > Similar argument? > >> + >> + state->active = true; >> arch_enter_lazy_mmu_mode(); >> } >> #else >> diff --git a/include/linux/sched.h b/include/linux/sched.h >> index cbb7340c5866..11566d973f42 100644 >> --- a/include/linux/sched.h >> +++ b/include/linux/sched.h >> @@ -1441,6 +1441,10 @@ struct task_struct { >> >> struct page_frag task_frag; >> >> +#ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE >> + struct lazy_mmu_state lazy_mmu_state; >> +#endif >> + >> #ifdef CONFIG_TASK_DELAY_ACCT >> struct task_delay_info *delays; >> #endif >> @@ -1724,6 +1728,18 @@ static inline char task_state_to_char(struct task_struct *tsk) >> return task_index_to_char(task_state_index(tsk)); >> } >> >> +#ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE >> +static inline bool in_lazy_mmu_mode(void) >> +{ >> + return current->lazy_mmu_state.active; >> +} >> +#else >> +static inline bool in_lazy_mmu_mode(void) >> +{ >> + return false; > Just pointing out that this isn't really a correct implementation: > > lazy_mmu_mode_enable() > ASSERT(in_lazy_mmu_mode()) << triggers for arches without lazy mmu > lazy_mmu_mode_disable() > > Although it probably doesn't matter in practice? I'd say that the expectation is invalid - lazy MMU mode can only be enabled if the architecture supports it. In fact as you pointed out above the API may be called in interrupt context but it will have no effect, so this sequence would always fail in interrupt context. Worth nothing that in_lazy_mmu_mode() is only ever called from arch code where lazy MMU is implemented. I added the fallback as a matter of principle, but it isn't actually required. - Kevin From xen-devel-bounces@lists.xenproject.org Mon Nov 10 10:48:39 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 10:48:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158243.1486608 (Exim 4.92) (envelope-from ) id 1vIPRv-00017r-MD; Mon, 10 Nov 2025 10:48:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158243.1486608; Mon, 10 Nov 2025 10:48:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIPRv-00017k-Ij; Mon, 10 Nov 2025 10:48:39 +0000 Received: by outflank-mailman (input) for mailman id 1158243; Mon, 10 Nov 2025 10:48:37 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIPRt-0000dX-RC for xen-devel@lists.xenproject.org; Mon, 10 Nov 2025 10:48:37 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id cee7aad2-be22-11f0-980a-7dc792cee155; Mon, 10 Nov 2025 11:48:36 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9BB20497; Mon, 10 Nov 2025 02:48:27 -0800 (PST) Received: from [10.57.39.147] (unknown [10.57.39.147]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A51E03F66E; Mon, 10 Nov 2025 02:48:27 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: cee7aad2-be22-11f0-980a-7dc792cee155 Message-ID: Date: Mon, 10 Nov 2025 11:48:24 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 12/12] mm: bail out of lazy_mmu_mode_* in interrupt context To: Ryan Roberts , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-13-kevin.brodsky@arm.com> <8a38db66-4d1a-4296-a2dc-e0276c6cdde8@arm.com> Content-Language: en-GB From: Kevin Brodsky In-Reply-To: <8a38db66-4d1a-4296-a2dc-e0276c6cdde8@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 07/11/2025 15:42, Ryan Roberts wrote: > On 29/10/2025 10:09, Kevin Brodsky wrote: >> The lazy MMU mode cannot be used in interrupt context. This is >> documented in , but isn't consistently handled >> across architectures. >> >> arm64 ensures that calls to lazy_mmu_mode_* have no effect in >> interrupt context, because such calls do occur in certain >> configurations - see commit b81c688426a9 ("arm64/mm: Disable barrier >> batching in interrupt contexts"). Other architectures do not check >> this situation, most likely because it hasn't occurred so far. >> >> Both arm64 and x86/Xen also ensure that any lazy MMU optimisation is >> disabled while in interrupt mode (see queue_pte_barriers() and >> xen_get_lazy_mode() respectively). >> >> Let's handle this in the new generic lazy_mmu layer, in the same >> fashion as arm64: bail out of lazy_mmu_mode_* if in_interrupt(), and >> have in_lazy_mmu_mode() return false to disable any optimisation. >> Also remove the arm64 handling that is now redundant; x86/Xen has >> its own internal tracking so it is left unchanged. >> >> Signed-off-by: Kevin Brodsky >> --- >> arch/arm64/include/asm/pgtable.h | 17 +---------------- >> include/linux/pgtable.h | 16 ++++++++++++++-- >> include/linux/sched.h | 3 +++ >> 3 files changed, 18 insertions(+), 18 deletions(-) >> >> diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h >> index 61ca88f94551..96987a49e83b 100644 >> --- a/arch/arm64/include/asm/pgtable.h >> +++ b/arch/arm64/include/asm/pgtable.h >> @@ -62,37 +62,22 @@ static inline void emit_pte_barriers(void) >> >> static inline void queue_pte_barriers(void) >> { >> - if (in_interrupt()) { >> - emit_pte_barriers(); >> - return; >> - } >> - >> if (in_lazy_mmu_mode()) >> test_and_set_thread_flag(TIF_LAZY_MMU_PENDING); >> else >> emit_pte_barriers(); >> } >> >> -static inline void arch_enter_lazy_mmu_mode(void) >> -{ >> - if (in_interrupt()) >> - return; >> -} >> +static inline void arch_enter_lazy_mmu_mode(void) {} >> >> static inline void arch_flush_lazy_mmu_mode(void) >> { >> - if (in_interrupt()) >> - return; >> - >> if (test_and_clear_thread_flag(TIF_LAZY_MMU_PENDING)) >> emit_pte_barriers(); >> } >> >> static inline void arch_leave_lazy_mmu_mode(void) >> { >> - if (in_interrupt()) >> - return; >> - >> arch_flush_lazy_mmu_mode(); >> } > Ahh ok, by the time you get to the final state, I think a most of my > comments/concerns are solved. Certainly this now looks safe for the interrupt > case, whereas I think the intermediate state when you initially introduce > nesting is broken. So perhaps you want to look at how to rework it to prevent that. Agreed, as discussed on patch 7. I might split this patch - first add the in_interrupt() checks before patch 7, and then remove the now-redundant checks on arm64. - Kevin From xen-devel-bounces@lists.xenproject.org Mon Nov 10 10:59:39 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 10:59:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158257.1486619 (Exim 4.92) (envelope-from ) id 1vIPcU-0002yj-L0; Mon, 10 Nov 2025 10:59:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158257.1486619; Mon, 10 Nov 2025 10:59:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIPcU-0002yc-Fz; Mon, 10 Nov 2025 10:59:34 +0000 Received: by outflank-mailman (input) for mailman id 1158257; Mon, 10 Nov 2025 10:59:32 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIPcS-0002yW-JW for xen-devel@lists.xenproject.org; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AM9PR03MB7526.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0006bf11-de25-451b-6c60-08de20483897 X-MS-Exchange-CrossTenant-originalarrivaltime: 10 Nov 2025 10:59:29.1925 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: WtmDtjKpPezHOsQQ73fki7DhaWPCOUdrSRA8gh3jcyNhVi01+QUdZeMhMb5HeXS+NEXCyDL5uct+TM+a3XdZVXuqu6xV+N4KYyI3HBfaxgY= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAXPR03MB8276 The function 'check_partial_fdt()' performs an explicit check for the FDT magic number (FDT_MAGIC) before calling 'fdt_check_header(). This check is redundant, because 'fdt_check_header()' includes checking the magic number. Remove the redundant check to simplify the code and rely on the library function to perform header validation. Signed-off-by: Dmytro Prokopchuk --- xen/common/device-tree/dom0less-build.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/xen/common/device-tree/dom0less-build.c b/xen/common/device-tr= ee/dom0less-build.c index 9fd004c42a..2600350a3c 100644 --- a/xen/common/device-tree/dom0less-build.c +++ b/xen/common/device-tree/dom0less-build.c @@ -359,12 +359,6 @@ static int __init check_partial_fdt(void *pfdt, size_t= size) { int res; =20 - if ( fdt_magic(pfdt) !=3D FDT_MAGIC ) - { - dprintk(XENLOG_ERR, "Partial FDT is not a valid Flat Device Tree")= ; - return -EINVAL; - } - res =3D fdt_check_header(pfdt); if ( res ) { --=20 2.43.0 From xen-devel-bounces@lists.xenproject.org Mon Nov 10 11:02:03 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 11:02:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158271.1486627 (Exim 4.92) (envelope-from ) id 1vIPes-0004gQ-4k; Mon, 10 Nov 2025 11:02:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158271.1486627; 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On 07.11.25 17:04, Grygorii Strashko wrote: > From: Grygorii Strashko > > The cache disable mode code (hvm_shadow_handle_cd()) is relevant only for Intel VT-x (VMX), > hence: > - move hvm_shadow_handle_cd()/ hvm_set_uc_mode()/domain_exit_uc_mode() in VMX code > - account for SHADOW_PAGING when use hvm_shadow_handle_cd() > - move cache disable mode data into VMX specific structures > > Based on discussion [1]. > > [1] https://patchwork.kernel.org/project/xen-devel/patch/20251023151903.560947-1-grygorii_strashko@epam.com/ > > v1: https://patchwork.kernel.org/project/xen-devel/cover/20251029235448.602380-1-grygorii_strashko@epam.com/ > > Grygorii Strashko (3): > x86/hvm: move hvm_shadow_handle_cd() to vmx code > x86/hvm: vmx: account for SHADOW_PAGING when use > hvm_shadow_handle_cd() > x86/hvm: vmx: refactor cache disable mode data > > xen/arch/x86/hvm/hvm.c | 59 -------------------- > xen/arch/x86/hvm/vmx/vmx.c | 73 +++++++++++++++++++++++-- > xen/arch/x86/include/asm/hvm/domain.h | 6 -- > xen/arch/x86/include/asm/hvm/hvm.h | 3 + > xen/arch/x86/include/asm/hvm/support.h | 2 - > xen/arch/x86/include/asm/hvm/vcpu.h | 3 - > xen/arch/x86/include/asm/hvm/vmx/vmcs.h | 13 +++++ > xen/arch/x86/include/asm/mtrr.h | 3 - > xen/arch/x86/mm/shadow/multi.c | 2 +- > 9 files changed, 85 insertions(+), 79 deletions(-) > -- Best regards, -grygorii From xen-devel-bounces@lists.xenproject.org Mon Nov 10 11:39:42 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 11:39:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158284.1486637 (Exim 4.92) (envelope-from ) id 1vIQF5-0000XD-OC; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Nov 2025 11:39:18.0505 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7861419e-3234-4e97-e1d8-08de204dc875 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF00004683.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB9495 On 10/11/2025 11:59, Dmytro Prokopchuk1 wrote: > The function 'check_partial_fdt()' performs an explicit check for the FDT > magic number (FDT_MAGIC) before calling 'fdt_check_header(). This check is > redundant, because 'fdt_check_header()' includes checking the magic number. > > Remove the redundant check to simplify the code and rely on the library > function to perform header validation. > > Signed-off-by: Dmytro Prokopchuk Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Mon Nov 10 12:30:52 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 12:30:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158299.1486647 (Exim 4.92) (envelope-from ) id 1vIR2j-0007oR-Fy; Mon, 10 Nov 2025 12:30:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158299.1486647; Mon, 10 Nov 2025 12:30:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIR2j-0007oK-DG; Mon, 10 Nov 2025 12:30:45 +0000 Received: by outflank-mailman (input) for mailman id 1158299; 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From: Frediano Ziglio To: xen-devel@lists.xenproject.org Cc: Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Frediano Ziglio , Demi Marie Obenour , =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= Subject: [PATCH v4] xen: Strip xen.efi by default Date: Mon, 10 Nov 2025 12:30:34 +0000 Message-ID: <20251110123034.77692-1-frediano.ziglio@citrix.com> X-Mailer: git-send-email 2.51.1 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: LO4P123CA0502.GBRP123.PROD.OUTLOOK.COM (2603:10a6:600:1ab::21) To IA3PR03MB8408.namprd03.prod.outlook.com (2603:10b6:208:546::19) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: IA3PR03MB8408:EE_|CH0PR03MB5986:EE_ X-MS-Office365-Filtering-Correlation-Id: 3c2e5e6b-7cc3-47ab-2928-08de2054f4f8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|366016|376014|7416014; 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Make xen.efi more coherent stripping all symbols too. xen-syms.efi can be used for debugging. Signed-off-by: Frediano Ziglio --- Changes since v1: - avoid leaving target if some command fails. Changes since v2: - do not convert type but retain PE format; - use xen-syms.efi for new file name, more consistent with ELF. Changes since v3: - update documentation; - do not remove xen.efi.elf; - check endbr instruction before generating final target. --- docs/misc/efi.pandoc | 8 +------- xen/Kconfig.debug | 9 ++------- xen/Makefile | 19 ------------------- xen/arch/x86/Makefile | 16 +++++++++++----- 4 files changed, 14 insertions(+), 38 deletions(-) diff --git a/docs/misc/efi.pandoc b/docs/misc/efi.pandoc index 11c1ac3346..c66b18a66b 100644 --- a/docs/misc/efi.pandoc +++ b/docs/misc/efi.pandoc @@ -20,13 +20,7 @@ Xen to load the configuration file even if multiboot modules are found. Once built, `make install-xen` will place the resulting binary directly into the EFI boot partition, provided `EFI_VENDOR` is set in the environment (and `EFI_MOUNTPOINT` is overridden as needed, should the default of `/boot/efi` not -match your system). When built with debug info, the binary can be quite large. -Setting `INSTALL_EFI_STRIP=1` in the environment will cause it to be stripped -of debug info in the process of installing. `INSTALL_EFI_STRIP` can also be set -to any combination of options suitable to pass to `strip`, in case the default -ones don't do. The xen.efi binary will also be installed in `/usr/lib64/efi/`, -unless `EFI_DIR` is set in the environment to override this default. This -binary will not be stripped in the process. +match your system). The binary itself will require a configuration file (names with the `.efi` extension of the binary's name replaced by `.cfg`, and - until an existing diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug index d900d926c5..1a8e0c6ec3 100644 --- a/xen/Kconfig.debug +++ b/xen/Kconfig.debug @@ -147,12 +147,7 @@ config DEBUG_INFO Say Y here if you want to build Xen with debug information. This information is needed e.g. for doing crash dump analysis of the hypervisor via the "crash" tool. - Saying Y will increase the size of the xen-syms and xen.efi - binaries. In case the space on the EFI boot partition is rather - limited, you may want to install a stripped variant of xen.efi in - the EFI boot partition (look for "INSTALL_EFI_STRIP" in - docs/misc/efi.pandoc for more information - when not using - "make install-xen" for installing xen.efi, stripping needs to be - done outside the Xen build environment). + Saying Y will increase the size of the xen-syms, xen-syms.efi and + xen.efi.elf binaries. endmenu diff --git a/xen/Makefile b/xen/Makefile index ddcee8835c..605a26c181 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -493,22 +493,6 @@ endif .PHONY: _build _build: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX) -# Strip -# -# INSTALL_EFI_STRIP, if defined, will cause xen.efi to be stripped before it -# is installed. If INSTALL_EFI_STRIP is '1', then the default option(s) below -# will be used. Otherwise, INSTALL_EFI_STRIP value will be used as the -# option(s) to the strip command. -ifdef INSTALL_EFI_STRIP - -ifeq ($(INSTALL_EFI_STRIP),1) -efi-strip-opt := --strip-debug --keep-file-symbols -else -efi-strip-opt := $(INSTALL_EFI_STRIP) -endif - -endif - .PHONY: _install _install: D=$(DESTDIR) _install: T=$(notdir $(TARGET)) @@ -535,9 +519,6 @@ _install: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX) ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T)-$(XEN_VERSION).efi; \ ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T).efi; \ if [ -n '$(EFI_MOUNTPOINT)' -a -n '$(EFI_VENDOR)' ]; then \ - $(if $(efi-strip-opt), \ - $(STRIP) $(efi-strip-opt) -p -o $(TARGET).efi.stripped $(TARGET).efi && \ - $(INSTALL_DATA) $(TARGET).efi.stripped $(D)$(EFI_MOUNTPOINT)/efi/$(EFI_VENDOR)/$(T)-$(XEN_FULLVERSION).efi ||) \ $(INSTALL_DATA) $(TARGET).efi $(D)$(EFI_MOUNTPOINT)/efi/$(EFI_VENDOR)/$(T)-$(XEN_FULLVERSION).efi; \ elif [ "$(D)" = "$(patsubst $(shell cd $(XEN_ROOT) && pwd)/%,%,$(D))" ]; then \ echo 'EFI installation only partially done (EFI_VENDOR not set)' >&2; \ diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index 407571c510..31ea1da5bc 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -228,17 +228,23 @@ endif $(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o $(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds $< \ $(dot-target).1r.o $(dot-target).1s.o $(orphan-handling-y) \ - $(note_file_option) -o $@ - $(NM) -pa --format=sysv $@ \ + $(note_file_option) -o $@.tmp + $(NM) -pa --format=sysv $@.tmp \ | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > $@.map ifeq ($(CONFIG_DEBUG_INFO),y) - $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) -O elf64-x86-64 $@ $@.elf + $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) \ + -O elf64-x86-64 $@.tmp $@.elf + $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))mv -f \ + $@.tmp $(TARGET)-syms.efi + $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(STRIP) \ + $(TARGET)-syms.efi -o $@.tmp endif - rm -f $(dot-target).[0-9]* $(@D)/..$(@F).[0-9]* ifeq ($(CONFIG_XEN_IBT),y) - $(SHELL) $(srctree)/tools/check-endbr.sh $@ + $(SHELL) $(srctree)/tools/check-endbr.sh $@.tmp endif + mv -f $@.tmp $@ + rm -f $(dot-target).[0-9]* $(@D)/..$(@F).[0-9]* else $(TARGET).efi: FORCE rm -f $@ -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Mon Nov 10 12:34:24 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 12:34:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158311.1486657 (Exim 4.92) (envelope-from ) id 1vIR6F-0008OW-UE; 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Mon, 10 Nov 2025 04:34:07 -0800 (PST) MIME-Version: 1.0 References: <20251105153808.20278-1-frediano.ziglio@citrix.com> <97611b79-228c-40a6-9fb2-4571b2447258@suse.com> In-Reply-To: From: Frediano Ziglio Date: Mon, 10 Nov 2025 12:33:55 +0000 X-Gm-Features: AWmQ_bnn4Y9t4Y5Q3zMjC-AGE1mpF9S2-VxCecq0gdoRAEsrscdbz8xSvyjp89c Message-ID: Subject: Re: [PATCH v3] xen: Strip xen.efi by default To: Jan Beulich Cc: Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org Content-Type: text/plain; charset="UTF-8" On Fri, 7 Nov 2025 at 07:08, Jan Beulich wrote: > > On 06.11.2025 17:37, Frediano Ziglio wrote: > > On Thu, 6 Nov 2025 at 10:32, Jan Beulich wrote: > >> On 05.11.2025 16:38, Frediano Ziglio wrote: > >>> --- a/xen/Kconfig.debug > >>> +++ b/xen/Kconfig.debug > >>> @@ -147,12 +147,7 @@ config DEBUG_INFO > >>> Say Y here if you want to build Xen with debug information. This > >>> information is needed e.g. for doing crash dump analysis of the > >>> hypervisor via the "crash" tool. > >>> - Saying Y will increase the size of the xen-syms and xen.efi > >>> - binaries. In case the space on the EFI boot partition is rather > >>> - limited, you may want to install a stripped variant of xen.efi in > >>> - the EFI boot partition (look for "INSTALL_EFI_STRIP" in > >>> - docs/misc/efi.pandoc for more information - when not using > >>> - "make install-xen" for installing xen.efi, stripping needs to be > >>> - done outside the Xen build environment). > >>> + Saying Y will increase the size of the xen-syms and xen.efi.elf > >>> + binaries. > >> > >> Why xen.efi.elf and not xen-syms.efi? > >> > > > > I forgot to update this part. > > Now that I see the comment, was the suggestion about having an > > additional xen-syms.efi file or having xen-syms.efi instead of > > xen.efi.elf ? > > The former. We want to have the binary available that the linker produced > directly. Anything else are extra's for what people think they may need. > Done in v4. > >>> --- a/xen/arch/x86/Makefile > >>> +++ b/xen/arch/x86/Makefile > >>> @@ -228,14 +228,17 @@ endif > >>> $(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o > >>> $(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds $< \ > >>> $(dot-target).1r.o $(dot-target).1s.o $(orphan-handling-y) \ > >>> - $(note_file_option) -o $@ > >>> - $(NM) -pa --format=sysv $@ \ > >>> + $(note_file_option) -o $@.tmp > >>> + $(NM) -pa --format=sysv $@.tmp \ > >>> | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > >>> > $@.map > >>> ifeq ($(CONFIG_DEBUG_INFO),y) > >>> - $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) -O elf64-x86-64 $@ $@.elf > >>> + $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))cp -f \ > >>> + $@.tmp $(TARGET)-syms.efi > >>> + $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(STRIP) $@.tmp > >>> endif > >>> rm -f $(dot-target).[0-9]* $(@D)/..$(@F).[0-9]* > >>> + mv -f $@.tmp $@ > >>> ifeq ($(CONFIG_XEN_IBT),y) > >>> $(SHELL) $(srctree)/tools/check-endbr.sh $@ > >>> endif > >> > >> I see $@.tmp here, but no sign of xen-syms. Did you submit a stake patch? Am > >> I missing something? > >> > > > > I don't know what a "stake patch" is. > > Sorry, typo - "stale" was meant. > > > xen-syms.efi (that is $(TARGET)-syms.efi in the Makefile) is not a > > target of this rule so if the rule fails it will be generated again. > > How does this matter in this context? The description talks of a xen-syms.efi > being generated, yet I'm simply unable to spot where that would be happening. > It was "generated" with a "cp" command, now I use "mv" + "strip -o" (in v4) to make it more clear. > >> I also think the mv should sit ahead of the cleaning-up rm. > > > > Are you sure? > > Usually you want it as the last command so any failure won't create > > the target. For instance here if check-endbr.sh is failing the target > > is still created and next make command will succeed. > > Except that the rm is tidying up rather than creating anything. > Updated this moving endbr check before the "mv" and the cleanup after. > Jan Frediano From xen-devel-bounces@lists.xenproject.org Mon Nov 10 12:37:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 12:37:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158322.1486668 (Exim 4.92) (envelope-from ) id 1vIR9F-0000XI-BT; Mon, 10 Nov 2025 12:37:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158322.1486668; Mon, 10 Nov 2025 12:37:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIR9F-0000XB-8f; Mon, 10 Nov 2025 12:37:29 +0000 Received: by outflank-mailman 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10 Nov 2025 04:37:26 -0800 (PST) MIME-Version: 1.0 References: <20251105153808.20278-1-frediano.ziglio@citrix.com> <98e2f19f-5fce-4ad1-b821-f5abb1f815f6@suse.com> <1fa1ca4d-62ce-49ee-8a8a-8d0d9e8abf2e@suse.com> In-Reply-To: <1fa1ca4d-62ce-49ee-8a8a-8d0d9e8abf2e@suse.com> From: Frediano Ziglio Date: Mon, 10 Nov 2025 12:37:14 +0000 X-Gm-Features: AWmQ_blkxVAXKVTlgNA7yJwVR9gISJiYP0I0CYBWVMETb0VbbeEKn0zNFqkemIo Message-ID: Subject: Re: [PATCH v3] xen: Strip xen.efi by default To: Jan Beulich Cc: xen-devel@lists.xenproject.org, Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , =?UTF-8?Q?Marek_Marczykowski=2DG=C3=B3recki?= , Demi Marie Obenour Content-Type: text/plain; charset="UTF-8" On Fri, 7 Nov 2025 at 07:04, Jan Beulich wrote: > > On 06.11.2025 17:32, Frediano Ziglio wrote: > > On Thu, 6 Nov 2025 at 10:27, Jan Beulich wrote: > >> > >> On 06.11.2025 10:58, Frediano Ziglio wrote: > >>> On Thu, 6 Nov 2025 at 03:52, Demi Marie Obenour wrote: > >>>> Does objdump on the signed file return correct section names? > >>> > >>> From objdump -x > >>> > >>> Sections: > >>> Idx Name Size VMA LMA File off Algn > >>> 0 .text 0016c9ae ffff82d040200000 ffff82d040200000 00000320 2**4 > >>> CONTENTS, ALLOC, LOAD, READONLY, CODE > >>> 1 .rodata 0006b9e8 ffff82d040400000 ffff82d040400000 0016cce0 2**2 > >>> CONTENTS, ALLOC, LOAD, DATA > >>> 2 .buildid 00000035 ffff82d04046c000 ffff82d04046c000 001d86e0 2**2 > >>> CONTENTS, ALLOC, LOAD, READONLY, DATA > >>> 3 .init.text 0004d123 ffff82d040600000 ffff82d040600000 001d8720 2**2 > >>> CONTENTS, ALLOC, LOAD, READONLY, CODE > >>> 4 .init.data 0006c9b0 ffff82d040800000 ffff82d040800000 00225860 2**2 > >>> CONTENTS, ALLOC, LOAD, DATA > >>> 5 .data.read_mostly 00028da8 ffff82d040a00000 ffff82d040a00000 > >>> 00292220 2**4 > >>> CONTENTS, ALLOC, LOAD, DATA > >>> 6 .data 0000feec ffff82d040a29000 ffff82d040a29000 002bafe0 2**4 > >>> CONTENTS, ALLOC, LOAD, DATA > >>> 7 .bss 00223108 ffff82d040a39000 ffff82d040a39000 00000000 2**4 > >>> ALLOC > >>> 8 .reloc 000016b8 ffff82d040c5d000 ffff82d040c5d000 002caee0 2**2 > >>> CONTENTS, ALLOC, LOAD, READONLY, DATA > >>> 9 .sbat 000000a6 ffff82d040c5f000 ffff82d040c5f000 002cc5a0 2**2 > >>> CONTENTS, READONLY > >>> > >>> Which looks correct. > >>> > >>> From hexdump -C I can see close to the end > >>> > >>> ... > >>> 002cc580 30 ae 38 ae 60 ae 00 00 00 80 a3 00 10 00 00 00 |0.8.`...........| > >>> 002cc590 a0 ae c0 ae e0 ae 00 00 00 00 00 00 00 00 00 00 |................| > >>> 002cc5a0 73 62 61 74 2c 31 2c 53 42 41 54 20 56 65 72 73 |sbat,1,SBAT Vers| > >>> 002cc5b0 69 6f 6e 2c 73 62 61 74 2c 31 2c 68 74 74 70 73 |ion,sbat,1,https| > >>> 002cc5c0 3a 2f 2f 67 69 74 68 75 62 2e 63 6f 6d 2f 72 68 |://github.com/rh| > >>> 002cc5d0 62 6f 6f 74 2f 73 68 69 6d 2f 62 6c 6f 62 2f 6d |boot/shim/blob/m| > >>> 002cc5e0 61 69 6e 2f 53 42 41 54 2e 6d 64 0a 78 65 6e 2e |ain/SBAT.md.xen.| > >>> 002cc5f0 78 73 2c 31 2c 43 6c 6f 75 64 20 53 6f 66 74 77 |xs,1,Cloud Softw| > >>> 002cc600 61 72 65 20 47 72 6f 75 70 2c 78 65 6e 2c 34 2e |are Group,xen,4.| > >>> 002cc610 32 30 2e 31 2d 37 2e 32 32 2e 67 33 65 30 36 37 |20.1-7.22.g3e067| > >>> 002cc620 32 36 62 2e 78 73 39 2c 6d 61 69 6c 74 6f 3a 73 |26b.xs9,mailto:s| > >>> 002cc630 65 63 75 72 69 74 79 40 78 65 6e 73 65 72 76 65 |ecurity@xenserve| > >>> 002cc640 72 2e 63 6f 6d 0a 00 00 00 00 00 00 00 00 00 00 |r.com...........| > >>> 002cc650 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................| > >>> 002cc660 2c 00 00 00 2e 69 6e 69 74 2e 74 65 78 74 00 2e |,....init.text..| > >>> 002cc670 69 6e 69 74 2e 64 61 74 61 00 2e 64 61 74 61 2e |init.data..data.| > >>> 002cc680 72 65 61 64 5f 6d 6f 73 74 6c 79 00 00 00 00 00 |read_mostly.....| > >>> 002cc690 9e 05 00 00 00 02 02 00 30 82 05 92 06 09 2a 86 |........0.....*.| > >>> 002cc6a0 48 86 f7 0d 01 07 02 a0 82 05 83 30 82 05 7f 02 |H..........0....| > >>> 002cc6b0 01 01 31 0f 30 0d 06 09 60 86 48 01 65 03 04 02 |..1.0...`.H.e...| > >>> 002cc6c0 01 05 00 30 5c 06 0a 2b 06 01 04 01 82 37 02 01 |...0\..+.....7..| > >>> 002cc6d0 04 a0 4e 30 4c 30 17 06 0a 2b 06 01 04 01 82 37 |..N0L0...+.....7| > >>> 002cc6e0 02 01 0f 30 09 03 01 00 a0 04 a2 02 80 00 30 31 |...0..........01| > >>> 002cc6f0 30 0d 06 09 60 86 48 01 65 03 04 02 01 05 00 04 |0...`.H.e.......| > >>> 002cc700 20 e2 47 64 f8 e8 7b 62 eb 17 e0 13 0a 0d 93 02 | .Gd..{b........| > >>> 002cc710 7a d8 3b f0 20 a8 ee 3d 49 98 3f de c1 47 de 15 |z.;. ..=I.?..G..| > >>> 002cc720 43 a0 82 03 2c 30 82 03 28 30 82 02 10 a0 03 02 |C...,0..(0......| > >>> 002cc730 01 02 02 11 00 8f fc 11 bf 41 54 40 74 89 2c 53 |.........AT@t.,S| > >>> 002cc740 a5 78 c1 e8 32 30 0d 06 09 2a 86 48 86 f7 0d 01 |.x..20...*.H....| > >>> 002cc750 01 0b 05 00 30 1c 31 1a 30 18 06 03 55 04 03 13 |....0.1.0...U...| > >>> 002cc760 11 58 65 6e 53 65 72 76 65 72 20 58 65 6e 20 64 |.XenServer Xen d| > >>> 002cc770 65 76 30 1e 17 0d 32 35 30 33 32 30 31 36 35 35 |ev0...2503201655| > >>> 002cc780 30 37 5a 17 0d 33 37 30 31 31 39 30 33 31 34 30 |07Z..37011903140| > >>> 002cc790 37 5a 30 1c 31 1a 30 18 06 03 55 04 03 13 11 58 |7Z0.1.0...U....X| > >>> 002cc7a0 65 6e 53 65 72 76 65 72 20 58 65 6e 20 64 65 76 |enServer Xen dev| > >>> ... > >>> > >>> So, this confirms that the string table is there to support larger > >>> section names and the signature is there and it's working. > >> > >> But is it going to work on all EFI implementations, or merely the one you tried? > > > > Can you be more specific ? > > The file was tested using dozens of different hardware and under Qemu. > > Only x64 if it's what you mean. > > No, I was referring to the fact that there are distinct EFI implementations, > which may differ in their loader behavior. But see also Demi's clarification > on her original remark. > > Jan Demi posted an update on that remark that it was a mistake. The signature should be applied as the last step resulting in it to be at the end of the file. This as any following update to the file (beside updating the checksum or the signature itself) would invalidate the signature and correctly the firmware would refuse to load the file if secure boot is enabled. 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Mon, 10 Nov 2025 04:40:43 -0800 (PST) Message-ID: Date: Mon, 10 Nov 2025 13:40:44 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4] xen: Strip xen.efi by default To: Frediano Ziglio , xen-devel@lists.xenproject.org Cc: Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Frediano Ziglio , Demi Marie Obenour , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= References: <20251110123034.77692-1-frediano.ziglio@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251110123034.77692-1-frediano.ziglio@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 10.11.2025 13:30, Frediano Ziglio wrote: > --- a/xen/arch/x86/Makefile > +++ b/xen/arch/x86/Makefile > @@ -228,17 +228,23 @@ endif > $(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o > $(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds $< \ > $(dot-target).1r.o $(dot-target).1s.o $(orphan-handling-y) \ > - $(note_file_option) -o $@ > - $(NM) -pa --format=sysv $@ \ > + $(note_file_option) -o $@.tmp > + $(NM) -pa --format=sysv $@.tmp \ Why is this needed in this shape? Can't you use $(TARGET)-syms.efi here right away, ... > | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > > $@.map > ifeq ($(CONFIG_DEBUG_INFO),y) > - $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) -O elf64-x86-64 $@ $@.elf > + $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) \ > + -O elf64-x86-64 $@.tmp $@.elf > + $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))mv -f \ > + $@.tmp $(TARGET)-syms.efi ... avoiding the need for this mv and ... > + $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(STRIP) \ > + $(TARGET)-syms.efi -o $@.tmp ... double use of $@.tmp? > endif > - rm -f $(dot-target).[0-9]* $(@D)/..$(@F).[0-9]* > ifeq ($(CONFIG_XEN_IBT),y) > - $(SHELL) $(srctree)/tools/check-endbr.sh $@ > + $(SHELL) $(srctree)/tools/check-endbr.sh $@.tmp > endif > + mv -f $@.tmp $@ > + rm -f $(dot-target).[0-9]* $(@D)/..$(@F).[0-9]* At least part of the rearrangement here also looks unrelated, and isn't mentioned at all in the description. Jan From xen-devel-bounces@lists.xenproject.org Mon Nov 10 12:59:15 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 12:59:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158349.1486687 (Exim 4.92) (envelope-from ) id 1vIRUE-0003uq-5s; Mon, 10 Nov 2025 12:59:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158349.1486687; Mon, 10 Nov 2025 12:59:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIRUE-0003uj-3D; Mon, 10 Nov 2025 12:59:10 +0000 Received: by outflank-mailman (input) for mailman id 1158349; Mon, 10 Nov 2025 12:59:09 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIRUD-0003ud-3W for xen-devel@lists.xenproject.org; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?wuLjdQUPtxAdyxMEewqCpYbEJPvcSuSe47lwmFfqiUd3TdHpRouHAOHMzf7L?= =?us-ascii?Q?mdyb+d+qeQ4relQwQe3ptVeMsYKemjvHmn5NBOL4GNZXRBXzaCHEbRkVqiZ6?= =?us-ascii?Q?0VDdYxKbmvB/XQ/Nw1FkGf/pnLDcKPFMUVaf8ucanROUBq/ddN6Q7g349pys?= =?us-ascii?Q?njEZsSrxlFlnFtRY0N/nXCgg8QOPaAWP0VTGYEsUb8vxQG1UyQVFeekmLqqF?= =?us-ascii?Q?X2/11w7XtiFGjUXPe7pXuPjLEZDldKc/B+zdF3YkqM3zIa2GlfIflCWHOK98?= =?us-ascii?Q?vyfgCt5qn5hO+KGuIOq2RqWDuH0S3t3J/l0uIsU5MeBv4o1wv71wuRmk4UGf?= =?us-ascii?Q?LcCq0NvM4M8l/k48PqxWGAadO002MqPhozCzIqCsaVgxsRPQQbE3bDWCDGkt?= =?us-ascii?Q?dZiJKbIDuO7dhN/elLJPVn0Rkm909G27r5i0vrTqhCzOSkuGzjX9mGrYhAGb?= =?us-ascii?Q?PVp0NQfVHAXxNMyRfeCNyLjBUqYfKNHirFlU679r675xnzALQT1+5FCiZezW?= =?us-ascii?Q?GmkF9j2RWGiKVXCAOrBzevnTdM07lTEGc+vVPaHpEQf42S+tLU+0lHOpwv/z?= =?us-ascii?Q?5jxAvEzKRnzfDBg3MoQvPQlpKgMsCt0nXqiLWKfTRZudrp0+hvkfWLHDqKLJ?= =?us-ascii?Q?idWeW/3C1QLyuxu4nNxZAekCS13mboDr3aYltY0Glb6WmpM2ch+1TQa0YLCV?= =?us-ascii?Q?jIPFbi/Aonl53HEeZntgv2r4mx+fH4xDpI/NVvsOe0TbjNPLG+gURmcFLTYc?= =?us-ascii?Q?YGRV5RwlmXOZJz/lF109Q69TMnDvY/LfFlkGoDDqzvA5xWlebKIJ+IW4e/kJ?= =?us-ascii?Q?32bEbJFMlo13A4cOkKkhPJdNFiWqjHMH9vPmgULiUqzF5jRrmXXZpa2DbCgU?= =?us-ascii?Q?+TkArlOUOFhYGyVuGUIMZLRKo+vCtPWCjWBqrWr8/7G+b1YUYGERY9CRtWej?= =?us-ascii?Q?4pj4AMcQdXAq5iTTLgkBPrDsA7SI2w9NcciRBpV05if3O3khmzbzPoBk9IwG?= =?us-ascii?Q?8cN9JSOJ05dkMABLNNm4mdtn/gqJm6y5cf/CsCMOHwNVY9eSrNon5EJilAC7?= =?us-ascii?Q?zFbKBy+jSsGkiqpICmKtuYorcuJP1ToTwDLjdVZD4T6xoAooqEHeAPvBPl2T?= =?us-ascii?Q?5+4Xgu1LYTutQgqnJ3tLe61myQ1YXlMCNImUKp2VayymIgf190oP/v2fDzZD?= =?us-ascii?Q?kM+rEr4Gct1kwMExjpgM5ZF2OBg3m2JVbU/MmJxtsa6FrVCQSOrC4RHI6ZPn?= =?us-ascii?Q?9hkGPwOPvoRcIluUz/kfcZHtinerM9WYzKP89vwAjPjBrmCSB14+A1eqQ3Lu?= =?us-ascii?Q?PCoh7j5Ha2Zxn/Ak7azE6fWSMWX/S6QKmrLNGKwY0rIyrwJe26RPOobmsIRT?= =?us-ascii?Q?qG4V+kS4XJ7fsY/B/cX9UcH4D1vVOe+1P/Z7kZZh8WbIRHknItMcoHYTXDAQ?= =?us-ascii?Q?KUrrh4oaz3unMyz3NULOU5HnA8KpzLcgrqkUxDtG4WgDIHNgf/aE/05wnNj6?= =?us-ascii?Q?9qyK9cH/lzGddUumeGALWhGw3Y+Kaf6qeNnwTOY3/cVncY3z8m/nrGJPbblw?= =?us-ascii?Q?fp7y0dRIUNIg2hT0SOfDUZg5peiLTDXZDz6gFg9TU3esfo1RuvPENwDJtwoo?= =?us-ascii?Q?Nw=3D=3D?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: d0cbb7d3-02a0-4b96-543b-08de2058ece7 X-MS-Exchange-CrossTenant-AuthSource: IA3PR03MB8408.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Nov 2025 12:59:03.8305 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Q/Glwe8dfwpUWIr38kh4+cpsXljNdsi83jkhUtjZr9tc6o+j0EEQXReBb6g/GGh6pSipsztlA+DaTFWBdGp72lEAogYIlfn7AEwyjkwVsqg= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR03MB7150 From: Frediano Ziglio For xen.gz file we strip all symbols and have an additional xen-syms.efi file version with all symbols. Make xen.efi more coherent stripping all symbols too. xen-syms.efi can be used for debugging. Signed-off-by: Frediano Ziglio --- Changes since v1: - avoid leaving target if some command fails. Changes since v2: - do not convert type but retain PE format; - use xen-syms.efi for new file name, more consistent with ELF. Changes since v3: - update documentation; - do not remove xen.efi.elf; - check endbr instruction before generating final target. Changes since v4: - simplify condition check; - avoid reuse of $@.tmp file. --- docs/misc/efi.pandoc | 8 +------- xen/Kconfig.debug | 9 ++------- xen/Makefile | 19 ------------------- xen/arch/x86/Makefile | 16 ++++++++++------ 4 files changed, 13 insertions(+), 39 deletions(-) diff --git a/docs/misc/efi.pandoc b/docs/misc/efi.pandoc index 11c1ac3346..c66b18a66b 100644 --- a/docs/misc/efi.pandoc +++ b/docs/misc/efi.pandoc @@ -20,13 +20,7 @@ Xen to load the configuration file even if multiboot modules are found. Once built, `make install-xen` will place the resulting binary directly into the EFI boot partition, provided `EFI_VENDOR` is set in the environment (and `EFI_MOUNTPOINT` is overridden as needed, should the default of `/boot/efi` not -match your system). When built with debug info, the binary can be quite large. -Setting `INSTALL_EFI_STRIP=1` in the environment will cause it to be stripped -of debug info in the process of installing. `INSTALL_EFI_STRIP` can also be set -to any combination of options suitable to pass to `strip`, in case the default -ones don't do. The xen.efi binary will also be installed in `/usr/lib64/efi/`, -unless `EFI_DIR` is set in the environment to override this default. This -binary will not be stripped in the process. +match your system). The binary itself will require a configuration file (names with the `.efi` extension of the binary's name replaced by `.cfg`, and - until an existing diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug index d900d926c5..1a8e0c6ec3 100644 --- a/xen/Kconfig.debug +++ b/xen/Kconfig.debug @@ -147,12 +147,7 @@ config DEBUG_INFO Say Y here if you want to build Xen with debug information. This information is needed e.g. for doing crash dump analysis of the hypervisor via the "crash" tool. - Saying Y will increase the size of the xen-syms and xen.efi - binaries. In case the space on the EFI boot partition is rather - limited, you may want to install a stripped variant of xen.efi in - the EFI boot partition (look for "INSTALL_EFI_STRIP" in - docs/misc/efi.pandoc for more information - when not using - "make install-xen" for installing xen.efi, stripping needs to be - done outside the Xen build environment). + Saying Y will increase the size of the xen-syms, xen-syms.efi and + xen.efi.elf binaries. endmenu diff --git a/xen/Makefile b/xen/Makefile index ddcee8835c..605a26c181 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -493,22 +493,6 @@ endif .PHONY: _build _build: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX) -# Strip -# -# INSTALL_EFI_STRIP, if defined, will cause xen.efi to be stripped before it -# is installed. If INSTALL_EFI_STRIP is '1', then the default option(s) below -# will be used. Otherwise, INSTALL_EFI_STRIP value will be used as the -# option(s) to the strip command. -ifdef INSTALL_EFI_STRIP - -ifeq ($(INSTALL_EFI_STRIP),1) -efi-strip-opt := --strip-debug --keep-file-symbols -else -efi-strip-opt := $(INSTALL_EFI_STRIP) -endif - -endif - .PHONY: _install _install: D=$(DESTDIR) _install: T=$(notdir $(TARGET)) @@ -535,9 +519,6 @@ _install: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX) ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T)-$(XEN_VERSION).efi; \ ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T).efi; \ if [ -n '$(EFI_MOUNTPOINT)' -a -n '$(EFI_VENDOR)' ]; then \ - $(if $(efi-strip-opt), \ - $(STRIP) $(efi-strip-opt) -p -o $(TARGET).efi.stripped $(TARGET).efi && \ - $(INSTALL_DATA) $(TARGET).efi.stripped $(D)$(EFI_MOUNTPOINT)/efi/$(EFI_VENDOR)/$(T)-$(XEN_FULLVERSION).efi ||) \ $(INSTALL_DATA) $(TARGET).efi $(D)$(EFI_MOUNTPOINT)/efi/$(EFI_VENDOR)/$(T)-$(XEN_FULLVERSION).efi; \ elif [ "$(D)" = "$(patsubst $(shell cd $(XEN_ROOT) && pwd)/%,%,$(D))" ]; then \ echo 'EFI installation only partially done (EFI_VENDOR not set)' >&2; \ diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index 407571c510..51d8084693 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -228,17 +228,21 @@ endif $(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o $(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds $< \ $(dot-target).1r.o $(dot-target).1s.o $(orphan-handling-y) \ - $(note_file_option) -o $@ - $(NM) -pa --format=sysv $@ \ + $(note_file_option) -o $(TARGET)-syms.efi + $(NM) -pa --format=sysv $(TARGET)-syms.efi \ | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > $@.map -ifeq ($(CONFIG_DEBUG_INFO),y) - $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) -O elf64-x86-64 $@ $@.elf +ifeq ($(CONFIG_DEBUG_INFO)_$(filter --strip-debug,$(EFI_LDFLAGS)),y_) + $(OBJCOPY) -O elf64-x86-64 $(TARGET)-syms.efi $@.elf + $(STRIP) $(TARGET)-syms.efi -o $@.tmp +else + mv -f $(TARGET)-syms.efi -o $@.tmp endif - rm -f $(dot-target).[0-9]* $(@D)/..$(@F).[0-9]* ifeq ($(CONFIG_XEN_IBT),y) - $(SHELL) $(srctree)/tools/check-endbr.sh $@ + $(SHELL) $(srctree)/tools/check-endbr.sh $@.tmp endif + mv -f $@.tmp $@ + rm -f $(dot-target).[0-9]* $(@D)/..$(@F).[0-9]* else $(TARGET).efi: FORCE rm -f $@ -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Mon Nov 10 13:18:42 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 13:18:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158361.1486697 (Exim 4.92) (envelope-from ) id 1vIRn1-0006fN-E5; Mon, 10 Nov 2025 13:18:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158361.1486697; Mon, 10 Nov 2025 13:18:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIRn1-0006fG-BN; Mon, 10 Nov 2025 13:18:35 +0000 Received: by outflank-mailman (input) for mailman id 1158361; Mon, 10 Nov 2025 13:18:34 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIRn0-0006fA-1H for xen-devel@lists.xenproject.org; Mon, 10 Nov 2025 13:18:34 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id c08857db-be37-11f0-9d18-b5c5bf9af7f9; Mon, 10 Nov 2025 14:18:32 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E7B25497; Mon, 10 Nov 2025 05:18:22 -0800 (PST) Received: from [10.57.39.147] (unknown [10.57.39.147]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D493F3F63F; Mon, 10 Nov 2025 05:18:22 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: c08857db-be37-11f0-9d18-b5c5bf9af7f9 Message-ID: Date: Mon, 10 Nov 2025 14:18:20 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 01/12] powerpc/64s: Do not re-activate batched TLB flush To: "Ritesh Harjani (IBM)" , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org, Venkat Rao Bagalkote References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-2-kevin.brodsky@arm.com> <87qzud42n1.ritesh.list@gmail.com> <87cy5t4b0a.ritesh.list@gmail.com> Content-Language: en-GB From: Kevin Brodsky In-Reply-To: <87cy5t4b0a.ritesh.list@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 08/11/2025 00:35, Ritesh Harjani (IBM) wrote: > Kevin Brodsky writes: > >> [...] >> >>> With this analysis - the patch looks good to me. I will give this entire >>> patch series a try on Power HW with Hash mmu too (which uses lazy mmu and >>> let you know the results of that)! >> That'd be very appreciated, thanks a lot! >> > I did give this patch series a run on Power10 with Hash MMU. I ran the > following stress-ng tests and didn't observe any issues (kernel warnings) so far. > > stress-ng --all 0 -t 60s --perf -v --verify \ > --tlb-shootdown 0 \ > --fault 0 \ > --userfaultfd 0 \ > --fork 0 \ > --exec 0 \ > --memfd 0 \ > --numa 0 \ > --pkey 0 \ > --remap 0 \ > --vm 0 \ > --rmap 0 \ > -x swap,pagemove > (Note not all options shown here will work with --verify) That's great, many thanks! > Let me know what else I can run for validation? > Do you know of any specific tests for validation of lazy mmu feature? I don't think there is - lazy MMU is not supposed to have any observable effect, all we can do is exercise the paths that use it and check that nothing explodes. That said it wouldn't hurt to run the mm kselftests:     make -C tools/testing/selftests/ TARGETS=mm Thanks! - Kevin From xen-devel-bounces@lists.xenproject.org Mon Nov 10 13:40:16 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 13:40:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158373.1486708 (Exim 4.92) (envelope-from ) id 1vIS7s-0001tF-3p; Mon, 10 Nov 2025 13:40:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158373.1486708; Mon, 10 Nov 2025 13:40:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIS7s-0001t8-0H; Mon, 10 Nov 2025 13:40:08 +0000 Received: by outflank-mailman (input) for mailman id 1158373; Mon, 10 Nov 2025 13:40:07 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIS7r-0001t2-39 for xen-devel@lists.xenproject.org; Mon, 10 Nov 2025 13:40:07 +0000 Received: from mail-ej1-x633.google.com (mail-ej1-x633.google.com [2a00:1450:4864:20::633]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c42230e3-be3a-11f0-9d18-b5c5bf9af7f9; Mon, 10 Nov 2025 14:40:05 +0100 (CET) Received: by mail-ej1-x633.google.com with SMTP id a640c23a62f3a-b3e7cc84b82so560975666b.0 for ; Mon, 10 Nov 2025 05:40:05 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 10 Nov 2025 05:40:05 -0800 (PST) Message-ID: <55f0f1f2-3892-44fa-94d6-15e0e8513ef1@suse.com> Date: Mon, 10 Nov 2025 14:40:05 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5] xen: Strip xen.efi by default To: Frediano Ziglio Cc: Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Frediano Ziglio , Demi Marie Obenour , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , xen-devel@lists.xenproject.org References: <20251110125859.78124-1-frediano.ziglio@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251110125859.78124-1-frediano.ziglio@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 10.11.2025 13:58, Frediano Ziglio wrote: > --- a/xen/arch/x86/Makefile > +++ b/xen/arch/x86/Makefile > @@ -228,17 +228,21 @@ endif > $(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o > $(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds $< \ > $(dot-target).1r.o $(dot-target).1s.o $(orphan-handling-y) \ > - $(note_file_option) -o $@ > - $(NM) -pa --format=sysv $@ \ > + $(note_file_option) -o $(TARGET)-syms.efi > + $(NM) -pa --format=sysv $(TARGET)-syms.efi \ > | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > > $@.map This part if fine with me now. > -ifeq ($(CONFIG_DEBUG_INFO),y) > - $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) -O elf64-x86-64 $@ $@.elf > +ifeq ($(CONFIG_DEBUG_INFO)_$(filter --strip-debug,$(EFI_LDFLAGS)),y_) This extra change looks correct to me, yet I wonder if doing it this way isn't fragile. If EFI_LDFLAGS wasn't set globally, but only for xen.efi, aiui this wouldn't work anymore. > + $(OBJCOPY) -O elf64-x86-64 $(TARGET)-syms.efi $@.elf > + $(STRIP) $(TARGET)-syms.efi -o $@.tmp > +else > + mv -f $(TARGET)-syms.efi -o $@.tmp This, while I think I understand why you do it, looks somewhat odd. Plus the reason you do it is, like ... > endif > - rm -f $(dot-target).[0-9]* $(@D)/..$(@F).[0-9]* > ifeq ($(CONFIG_XEN_IBT),y) > - $(SHELL) $(srctree)/tools/check-endbr.sh $@ > + $(SHELL) $(srctree)/tools/check-endbr.sh $@.tmp > endif > + mv -f $@.tmp $@ > + rm -f $(dot-target).[0-9]* $(@D)/..$(@F).[0-9]* > else > $(TARGET).efi: FORCE > rm -f $@ ... (still) most of this, unrelated (and, as before, not mentioned at all in the description). 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Mon, 10 Nov 2025 06:03:42 -0800 (PST) Message-ID: Date: Mon, 10 Nov 2025 15:03:43 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4] xen: Support LLVM raw profile versions 5, 6, 7, 8, 9, and 10 To: Saman Dehghan Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Wentao Zhang , Matthew L Weber , Oleksii Kurochko , Andrew Cooper , xen-devel@lists.xenproject.org References: <06646f747f21c3f388cf6e9d59a20238a4a91170.1761263588.git.samaan.dehghan@gmail.com> <6f708273afb6de9c5f26f2c71c34c98e957904a0.1761599320.git.samaan.dehghan@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 27.10.2025 23:36, Andrew Cooper wrote: > On 27/10/2025 9:30 pm, Saman Dehghan wrote: >> This change enables compatibility for measuring code coverage >> with Clang versions 11 through 20 by supporting their respective raw >> profile formats. >> >> 1- Added support for LLVM raw profile versions 5, 6, 7, 8, 9, and 10. >> 2- Initialized llvm_profile_header for all versions based on llvm source >> code in compiler-rt/include/profile/InstrProfData.inc for each version. >> 3- We tested this patch for all Clang versions from 11 through 20 >> on x86 platform. >> 4- Fixed linking warnings related to LLVM profile sections in x86. >> >> >> Signed-off-by: Saman Dehghan >> Release-Acked-By: Oleksii Kurochko >> Tested-by: Wentao Zhang >> Acked-by: Andrew Cooper >> --- >> Changes from v3 to v4: >> 1- Use LLVM_PROFILE_VERSION in preprocessor conditionals >> instead of __clang_major__. >> 2- Use DIV_ROUND_UP helper. >> 3- Remove unnecessary zero initialization inside struct. >> 4- Remove fallback macro definitions in linker script. >> Changes from v2 to v3: >> 1- Additionally support raw profile version 5, 6, 7 in clang 11, 12, 13. >> 2- Fix coverage related linking warnings in x86. >> 3- Revert unnecessary type changes, casting, etc. >> --- > > Excellent.  Thankyou.  This all looks in order.  I've committed it. I thought I would backport this, but I would need a variant that wouldn't regress profile version 4 on the older branches. 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Mon, 10 Nov 2025 06:53:17 -0800 (PST) Message-ID: <1595e62d-1ee5-41fa-aec8-e848813d50b5@suse.com> Date: Mon, 10 Nov 2025 15:53:18 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [for 4.22 v5 10/18] xen/riscv: implement p2m_set_range() To: Oleksii Kurochko Cc: Alistair Francis , Bob Eshleman , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 20.10.2025 17:57, Oleksii Kurochko wrote: > --- a/xen/arch/riscv/include/asm/p2m.h > +++ b/xen/arch/riscv/include/asm/p2m.h > @@ -8,12 +8,45 @@ > #include > #include > > +#include > #include > > extern unsigned char gstage_mode; > +extern unsigned int gstage_root_level; > > #define P2M_ROOT_ORDER (ilog2(GSTAGE_ROOT_PAGE_TABLE_SIZE) - PAGE_SHIFT) > #define P2M_ROOT_PAGES BIT(P2M_ROOT_ORDER, U) > +#define P2M_ROOT_LEVEL gstage_root_level > + > +/* > + * According to the RISC-V spec: > + * When hgatp.MODE specifies a translation scheme of Sv32x4, Sv39x4, Sv48x4, > + * or Sv57x4, G-stage address translation is a variation on the usual > + * page-based virtual address translation scheme of Sv32, Sv39, Sv48, or > + * Sv57, respectively. In each case, the size of the incoming address is > + * widened by 2 bits (to 34, 41, 50, or 59 bits). > + * > + * P2M_LEVEL_ORDER(lvl) defines the bit position in the GFN from which > + * the index for this level of the P2M page table starts. The extra 2 > + * bits added by the "x4" schemes only affect the root page table width. > + * > + * Therefore, this macro can safely reuse XEN_PT_LEVEL_ORDER() for all > + * levels: the extra 2 bits do not change the indices of lower levels. > + * > + * The extra 2 bits are only relevant if one tried to address beyond the > + * root level (i.e., P2M_LEVEL_ORDER(P2M_ROOT_LEVEL + 1)), which is > + * invalid. > + */ > +#define P2M_LEVEL_ORDER(lvl) XEN_PT_LEVEL_ORDER(lvl) Is the last paragraph of the comment really needed? It talks about something absurd / impossible only. > +#define P2M_ROOT_EXTRA_BITS(lvl) (2 * ((lvl) == P2M_ROOT_LEVEL)) > + > +#define P2M_PAGETABLE_ENTRIES(lvl) \ > + (BIT(PAGETABLE_ORDER + P2M_ROOT_EXTRA_BITS(lvl), UL)) > + > +#define GFN_MASK(lvl) (P2M_PAGETABLE_ENTRIES(lvl) - 1UL) If I'm not mistaken, this is a mask with the low 10 or 12 bits set. That's not really something you can apply to a GFN, unlike the name suggests. > +#define P2M_LEVEL_SHIFT(lvl) (P2M_LEVEL_ORDER(lvl) + PAGE_SHIFT) Whereas here the macro name doesn't make clear what is shifted: An address or a GFN. (It's the former, aiui.) > --- a/xen/arch/riscv/p2m.c > +++ b/xen/arch/riscv/p2m.c > @@ -9,6 +9,7 @@ > #include > #include > #include > +#include > > #include > #include > @@ -17,6 +18,43 @@ > #include > > unsigned char __ro_after_init gstage_mode; > +unsigned int __ro_after_init gstage_root_level; Like for mode, I'm unconvinced of this being a global (and not per-P2M / per-domain). > +/* > + * The P2M root page table is extended by 2 bits, making its size 16KB > + * (instead of 4KB for non-root page tables). Therefore, P2M root page > + * is allocated as four consecutive 4KB pages (since alloc_domheap_pages() > + * only allocates 4KB pages). > + */ > +#define ENTRIES_PER_ROOT_PAGE \ > + (P2M_PAGETABLE_ENTRIES(P2M_ROOT_LEVEL) / P2M_ROOT_ORDER) > + > +static inline unsigned int calc_offset(unsigned int lvl, vaddr_t va) Where would a vaddr_t come from here? Your input are guest-physical addresses, if I'm not mistaken. > +{ > + unsigned int offset = (va >> P2M_LEVEL_SHIFT(lvl)) & GFN_MASK(lvl); > + > + /* > + * For P2M_ROOT_LEVEL, `offset` ranges from 0 to 2047, since the root > + * page table spans 4 consecutive 4KB pages. > + * We want to return an index within one of these 4 pages. > + * The specific page to use is determined by `p2m_get_root_pointer()`. > + * > + * Example: if `offset == 512`: > + * - A single 4KB page holds 512 entries. > + * - Therefore, entry 512 corresponds to index 0 of the second page. > + * > + * At all other levels, only one page is allocated, and `offset` is > + * always in the range 0 to 511, since the VPN is 9 bits long. > + */ > + return offset % ENTRIES_PER_ROOT_PAGE; Seeing something "root" used here (when this is for all levels) is pretty odd, despite all the commentary. Given all the commentary, why not simply return offset & ((1U << PAGETABLE_ORDER) - 1); ? > +} > + > +#define P2M_MAX_ROOT_LEVEL 4 > + > +#define P2M_DECLARE_OFFSETS(var, addr) \ > + unsigned int var[P2M_MAX_ROOT_LEVEL] = {-1};\ > + for ( unsigned int i = 0; i <= gstage_root_level; i++ ) \ > + var[i] = calc_offset(i, addr); This surely is more than just "declare", and it's dealing with all levels no matter whether you actually will use all offsets. > @@ -259,13 +308,293 @@ int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted) > return rc; > } > > +/* > + * Map one of the four root pages of the P2M root page table. > + * > + * The P2M root page table is larger than normal (16KB instead of 4KB), > + * so it is allocated as four consecutive 4KB pages. This function selects > + * the appropriate 4KB page based on the given GFN and returns a mapping > + * to it. > + * > + * The caller is responsible for unmapping the page after use. > + * > + * Returns NULL if the calculated offset into the root table is invalid. > + */ > +static pte_t *p2m_get_root_pointer(struct p2m_domain *p2m, gfn_t gfn) > +{ > + unsigned long root_table_indx; > + > + root_table_indx = gfn_x(gfn) >> P2M_LEVEL_ORDER(P2M_ROOT_LEVEL); With the variable name shortened (to e.g. idx) this could be its initializer without ending up with too long a line. The root_table_ prefix isn't really adding much value in the context of this function. > + if ( root_table_indx >= P2M_ROOT_PAGES ) > + return NULL; > + > + /* > + * The P2M root page table is extended by 2 bits, making its size 16KB > + * (instead of 4KB for non-root page tables). Therefore, p2m->root is > + * allocated as four consecutive 4KB pages (since alloc_domheap_pages() > + * only allocates 4KB pages). > + * > + * Initially, `root_table_indx` is derived directly from `va`. There's no 'va' here. > +static inline void p2m_clean_pte(pte_t *p, bool clean_pte) "clean_pte" as a parameter name of a function of this name is, well, odd. > +/* Insert an entry in the p2m */ > +static int p2m_set_entry(struct p2m_domain *p2m, > + gfn_t gfn, > + unsigned long page_order, > + mfn_t mfn, > + p2m_type_t t) > +{ > + unsigned int level; > + unsigned int target = page_order / PAGETABLE_ORDER; > + pte_t *entry, *table, orig_pte; > + int rc; > + /* > + * A mapping is removed only if the MFN is explicitly set to INVALID_MFN. > + * Other MFNs that are considered invalid by mfn_valid() (e.g., MMIO) > + * are still allowed. > + */ > + bool removing_mapping = mfn_eq(mfn, INVALID_MFN); > + P2M_DECLARE_OFFSETS(offsets, gfn_to_gaddr(gfn)); > + > + ASSERT(p2m_is_write_locked(p2m)); > + > + /* > + * Check if the level target is valid: we only support > + * 4K - 2M - 1G mapping. > + */ > + ASSERT(target <= 2); > + > + table = p2m_get_root_pointer(p2m, gfn); > + if ( !table ) > + return -EINVAL; > + > + for ( level = P2M_ROOT_LEVEL; level > target; level-- ) > + { > + /* > + * Don't try to allocate intermediate page table if the mapping > + * is about to be removed. > + */ > + rc = p2m_next_level(p2m, !removing_mapping, > + level, &table, offsets[level]); > + if ( (rc == P2M_TABLE_MAP_NONE) || (rc == P2M_TABLE_MAP_NOMEM) ) > + { > + rc = (rc == P2M_TABLE_MAP_NONE) ? -ENOENT : -ENOMEM; > + /* > + * We are here because p2m_next_level has failed to map > + * the intermediate page table (e.g the table does not exist > + * and none should be allocated). It is a valid case > + * when removing a mapping as it may not exist in the > + * page table. In this case, just ignore lookup failure. > + */ > + rc = removing_mapping ? 0 : rc; > + goto out; > + } > + > + if ( rc != P2M_TABLE_NORMAL ) > + break; > + } > + > + entry = table + offsets[level]; > + > + /* > + * If we are here with level > target, we must be at a leaf node, > + * and we need to break up the superpage. > + */ > + if ( level > target ) > + { > + panic("Shattering isn't implemented\n"); > + } > + > + /* > + * We should always be there with the correct level because all the > + * intermediate tables have been installed if necessary. > + */ > + ASSERT(level == target); > + > + orig_pte = *entry; > + > + if ( removing_mapping ) > + p2m_clean_pte(entry, p2m->clean_dcache); > + else > + { > + pte_t pte = p2m_pte_from_mfn(mfn, t); > + > + p2m_write_pte(entry, pte, p2m->clean_dcache); > + > + p2m->max_mapped_gfn = gfn_max(p2m->max_mapped_gfn, > + gfn_add(gfn, BIT(page_order, UL) - 1)); > + p2m->lowest_mapped_gfn = gfn_min(p2m->lowest_mapped_gfn, gfn); > + } > + > + p2m->need_flush = true; > + > + /* > + * Currently, the infrastructure required to enable CONFIG_HAS_PASSTHROUGH > + * is not ready for RISC-V support. > + * > + * When CONFIG_HAS_PASSTHROUGH=y, iommu_iotlb_flush() should be done > + * here. > + */ > +#ifdef CONFIG_HAS_PASSTHROUGH > +# error "add code to flush IOMMU TLB" > +#endif > + > + rc = 0; > + > + /* > + * In case of a VALID -> INVALID transition, the original PTE should > + * always be freed. > + * > + * In case of a VALID -> VALID transition, the original PTE should be > + * freed only if the MFNs are different. If the MFNs are the same > + * (i.e., only permissions differ), there is no need to free the > + * original PTE. > + */ > + if ( pte_is_valid(orig_pte) && > + (!pte_is_valid(*entry) || > + !mfn_eq(pte_get_mfn(*entry), pte_get_mfn(orig_pte))) ) Besides my continued impression of this condition being more complex than it ought to be expected, indentation is off by one on the last of the three lines. (Since, otoh, I can't suggest any simpler expression (for now), this isn't a request to further change it.) > +/* Return mapping order for given gfn, mfn and nr */ > +static unsigned long p2m_mapping_order(gfn_t gfn, mfn_t mfn, unsigned long nr) > +{ > + unsigned long mask; > + /* 1gb, 2mb, 4k mappings are supported */ > + unsigned int level = min(P2M_ROOT_LEVEL, _AC(2, U)); Further up you has such a literal 2 already - please make a constant, so all instances can easily be associated with one another. > + unsigned long order = 0; > + > + mask = !mfn_eq(mfn, INVALID_MFN) ? mfn_x(mfn) : 0; > + mask |= gfn_x(gfn); > + > + for ( ; level != 0; level-- ) > + { > + if ( !(mask & (BIT(P2M_LEVEL_ORDER(level), UL) - 1)) && > + (nr >= BIT(P2M_LEVEL_ORDER(level), UL)) ) > + { > + order = P2M_LEVEL_ORDER(level); > + break; I'm pretty sure I did complain about the too deep indentation here already. > + } > + } > + > + return order; > +} > + > static int p2m_set_range(struct p2m_domain *p2m, > gfn_t sgfn, > unsigned long nr, > mfn_t smfn, > p2m_type_t t) > { > - return -EOPNOTSUPP; > + int rc = 0; > + unsigned long left = nr; > + > + /* > + * Any reference taken by the P2M mappings (e.g. foreign mapping) will > + * be dropped in relinquish_p2m_mapping(). As the P2M will still > + * be accessible after, we need to prevent mapping to be added when the > + * domain is dying. > + */ > + if ( unlikely(p2m->domain->is_dying) ) > + return -EACCES; > + > + while ( left ) > + { > + unsigned long order = p2m_mapping_order(sgfn, smfn, left); > + > + rc = p2m_set_entry(p2m, sgfn, order, smfn, t); > + if ( rc ) > + break; > + > + sgfn = gfn_add(sgfn, BIT(order, UL)); > + if ( !mfn_eq(smfn, INVALID_MFN) ) > + smfn = mfn_add(smfn, BIT(order, UL)); Off-by-1 indentation again. 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Mon, 10 Nov 2025 06:53:17 -0800 (PST) Message-ID: Date: Mon, 10 Nov 2025 15:53:18 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [for 4.22 v5 10/18] xen/riscv: implement p2m_set_range() To: Oleksii Kurochko Cc: Alistair Francis , Bob Eshleman , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 20.10.2025 17:57, Oleksii Kurochko wrote: > --- a/xen/arch/riscv/include/asm/p2m.h > +++ b/xen/arch/riscv/include/asm/p2m.h > @@ -8,12 +8,45 @@ > #include > #include > > +#include > #include > > extern unsigned char gstage_mode; > +extern unsigned int gstage_root_level; > > #define P2M_ROOT_ORDER (ilog2(GSTAGE_ROOT_PAGE_TABLE_SIZE) - PAGE_SHIFT) > #define P2M_ROOT_PAGES BIT(P2M_ROOT_ORDER, U) > +#define P2M_ROOT_LEVEL gstage_root_level > + > +/* > + * According to the RISC-V spec: > + * When hgatp.MODE specifies a translation scheme of Sv32x4, Sv39x4, Sv48x4, > + * or Sv57x4, G-stage address translation is a variation on the usual > + * page-based virtual address translation scheme of Sv32, Sv39, Sv48, or > + * Sv57, respectively. In each case, the size of the incoming address is > + * widened by 2 bits (to 34, 41, 50, or 59 bits). > + * > + * P2M_LEVEL_ORDER(lvl) defines the bit position in the GFN from which > + * the index for this level of the P2M page table starts. The extra 2 > + * bits added by the "x4" schemes only affect the root page table width. > + * > + * Therefore, this macro can safely reuse XEN_PT_LEVEL_ORDER() for all > + * levels: the extra 2 bits do not change the indices of lower levels. > + * > + * The extra 2 bits are only relevant if one tried to address beyond the > + * root level (i.e., P2M_LEVEL_ORDER(P2M_ROOT_LEVEL + 1)), which is > + * invalid. > + */ > +#define P2M_LEVEL_ORDER(lvl) XEN_PT_LEVEL_ORDER(lvl) Is the last paragraph of the comment really needed? It talks about something absurd / impossible only. > +#define P2M_ROOT_EXTRA_BITS(lvl) (2 * ((lvl) == P2M_ROOT_LEVEL)) > + > +#define P2M_PAGETABLE_ENTRIES(lvl) \ > + (BIT(PAGETABLE_ORDER + P2M_ROOT_EXTRA_BITS(lvl), UL)) > + > +#define GFN_MASK(lvl) (P2M_PAGETABLE_ENTRIES(lvl) - 1UL) If I'm not mistaken, this is a mask with the low 10 or 12 bits set. That's not really something you can apply to a GFN, unlike the name suggests. > +#define P2M_LEVEL_SHIFT(lvl) (P2M_LEVEL_ORDER(lvl) + PAGE_SHIFT) Whereas here the macro name doesn't make clear what is shifted: An address or a GFN. (It's the former, aiui.) > --- a/xen/arch/riscv/p2m.c > +++ b/xen/arch/riscv/p2m.c > @@ -9,6 +9,7 @@ > #include > #include > #include > +#include > > #include > #include > @@ -17,6 +18,43 @@ > #include > > unsigned char __ro_after_init gstage_mode; > +unsigned int __ro_after_init gstage_root_level; Like for mode, I'm unconvinced of this being a global (and not per-P2M / per-domain). > +/* > + * The P2M root page table is extended by 2 bits, making its size 16KB > + * (instead of 4KB for non-root page tables). Therefore, P2M root page > + * is allocated as four consecutive 4KB pages (since alloc_domheap_pages() > + * only allocates 4KB pages). > + */ > +#define ENTRIES_PER_ROOT_PAGE \ > + (P2M_PAGETABLE_ENTRIES(P2M_ROOT_LEVEL) / P2M_ROOT_ORDER) > + > +static inline unsigned int calc_offset(unsigned int lvl, vaddr_t va) Where would a vaddr_t come from here? Your input are guest-physical addresses, if I'm not mistaken. > +{ > + unsigned int offset = (va >> P2M_LEVEL_SHIFT(lvl)) & GFN_MASK(lvl); > + > + /* > + * For P2M_ROOT_LEVEL, `offset` ranges from 0 to 2047, since the root > + * page table spans 4 consecutive 4KB pages. > + * We want to return an index within one of these 4 pages. > + * The specific page to use is determined by `p2m_get_root_pointer()`. > + * > + * Example: if `offset == 512`: > + * - A single 4KB page holds 512 entries. > + * - Therefore, entry 512 corresponds to index 0 of the second page. > + * > + * At all other levels, only one page is allocated, and `offset` is > + * always in the range 0 to 511, since the VPN is 9 bits long. > + */ > + return offset % ENTRIES_PER_ROOT_PAGE; Seeing something "root" used here (when this is for all levels) is pretty odd, despite all the commentary. Given all the commentary, why not simply return offset & ((1U << PAGETABLE_ORDER) - 1); ? > +} > + > +#define P2M_MAX_ROOT_LEVEL 4 > + > +#define P2M_DECLARE_OFFSETS(var, addr) \ > + unsigned int var[P2M_MAX_ROOT_LEVEL] = {-1};\ > + for ( unsigned int i = 0; i <= gstage_root_level; i++ ) \ > + var[i] = calc_offset(i, addr); This surely is more than just "declare", and it's dealing with all levels no matter whether you actually will use all offsets. > @@ -259,13 +308,293 @@ int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted) > return rc; > } > > +/* > + * Map one of the four root pages of the P2M root page table. > + * > + * The P2M root page table is larger than normal (16KB instead of 4KB), > + * so it is allocated as four consecutive 4KB pages. This function selects > + * the appropriate 4KB page based on the given GFN and returns a mapping > + * to it. > + * > + * The caller is responsible for unmapping the page after use. > + * > + * Returns NULL if the calculated offset into the root table is invalid. > + */ > +static pte_t *p2m_get_root_pointer(struct p2m_domain *p2m, gfn_t gfn) > +{ > + unsigned long root_table_indx; > + > + root_table_indx = gfn_x(gfn) >> P2M_LEVEL_ORDER(P2M_ROOT_LEVEL); With the variable name shortened (to e.g. idx) this could be its initializer without ending up with too long a line. The root_table_ prefix isn't really adding much value in the context of this function. > + if ( root_table_indx >= P2M_ROOT_PAGES ) > + return NULL; > + > + /* > + * The P2M root page table is extended by 2 bits, making its size 16KB > + * (instead of 4KB for non-root page tables). Therefore, p2m->root is > + * allocated as four consecutive 4KB pages (since alloc_domheap_pages() > + * only allocates 4KB pages). > + * > + * Initially, `root_table_indx` is derived directly from `va`. There's no 'va' here. > +static inline void p2m_clean_pte(pte_t *p, bool clean_pte) "clean_pte" as a parameter name of a function of this name is, well, odd. > +/* Insert an entry in the p2m */ > +static int p2m_set_entry(struct p2m_domain *p2m, > + gfn_t gfn, > + unsigned long page_order, > + mfn_t mfn, > + p2m_type_t t) > +{ > + unsigned int level; > + unsigned int target = page_order / PAGETABLE_ORDER; > + pte_t *entry, *table, orig_pte; > + int rc; > + /* > + * A mapping is removed only if the MFN is explicitly set to INVALID_MFN. > + * Other MFNs that are considered invalid by mfn_valid() (e.g., MMIO) > + * are still allowed. > + */ > + bool removing_mapping = mfn_eq(mfn, INVALID_MFN); > + P2M_DECLARE_OFFSETS(offsets, gfn_to_gaddr(gfn)); > + > + ASSERT(p2m_is_write_locked(p2m)); > + > + /* > + * Check if the level target is valid: we only support > + * 4K - 2M - 1G mapping. > + */ > + ASSERT(target <= 2); > + > + table = p2m_get_root_pointer(p2m, gfn); > + if ( !table ) > + return -EINVAL; > + > + for ( level = P2M_ROOT_LEVEL; level > target; level-- ) > + { > + /* > + * Don't try to allocate intermediate page table if the mapping > + * is about to be removed. > + */ > + rc = p2m_next_level(p2m, !removing_mapping, > + level, &table, offsets[level]); > + if ( (rc == P2M_TABLE_MAP_NONE) || (rc == P2M_TABLE_MAP_NOMEM) ) > + { > + rc = (rc == P2M_TABLE_MAP_NONE) ? -ENOENT : -ENOMEM; > + /* > + * We are here because p2m_next_level has failed to map > + * the intermediate page table (e.g the table does not exist > + * and none should be allocated). It is a valid case > + * when removing a mapping as it may not exist in the > + * page table. In this case, just ignore lookup failure. > + */ > + rc = removing_mapping ? 0 : rc; > + goto out; > + } > + > + if ( rc != P2M_TABLE_NORMAL ) > + break; > + } > + > + entry = table + offsets[level]; > + > + /* > + * If we are here with level > target, we must be at a leaf node, > + * and we need to break up the superpage. > + */ > + if ( level > target ) > + { > + panic("Shattering isn't implemented\n"); > + } > + > + /* > + * We should always be there with the correct level because all the > + * intermediate tables have been installed if necessary. > + */ > + ASSERT(level == target); > + > + orig_pte = *entry; > + > + if ( removing_mapping ) > + p2m_clean_pte(entry, p2m->clean_dcache); > + else > + { > + pte_t pte = p2m_pte_from_mfn(mfn, t); > + > + p2m_write_pte(entry, pte, p2m->clean_dcache); > + > + p2m->max_mapped_gfn = gfn_max(p2m->max_mapped_gfn, > + gfn_add(gfn, BIT(page_order, UL) - 1)); > + p2m->lowest_mapped_gfn = gfn_min(p2m->lowest_mapped_gfn, gfn); > + } > + > + p2m->need_flush = true; > + > + /* > + * Currently, the infrastructure required to enable CONFIG_HAS_PASSTHROUGH > + * is not ready for RISC-V support. > + * > + * When CONFIG_HAS_PASSTHROUGH=y, iommu_iotlb_flush() should be done > + * here. > + */ > +#ifdef CONFIG_HAS_PASSTHROUGH > +# error "add code to flush IOMMU TLB" > +#endif > + > + rc = 0; > + > + /* > + * In case of a VALID -> INVALID transition, the original PTE should > + * always be freed. > + * > + * In case of a VALID -> VALID transition, the original PTE should be > + * freed only if the MFNs are different. If the MFNs are the same > + * (i.e., only permissions differ), there is no need to free the > + * original PTE. > + */ > + if ( pte_is_valid(orig_pte) && > + (!pte_is_valid(*entry) || > + !mfn_eq(pte_get_mfn(*entry), pte_get_mfn(orig_pte))) ) Besides my continued impression of this condition being more complex than it ought to be expected, indentation is off by one on the last of the three lines. (Since, otoh, I can't suggest any simpler expression (for now), this isn't a request to further change it.) > +/* Return mapping order for given gfn, mfn and nr */ > +static unsigned long p2m_mapping_order(gfn_t gfn, mfn_t mfn, unsigned long nr) > +{ > + unsigned long mask; > + /* 1gb, 2mb, 4k mappings are supported */ > + unsigned int level = min(P2M_ROOT_LEVEL, _AC(2, U)); Further up you has such a literal 2 already - please make a constant, so all instances can easily be associated with one another. > + unsigned long order = 0; > + > + mask = !mfn_eq(mfn, INVALID_MFN) ? mfn_x(mfn) : 0; > + mask |= gfn_x(gfn); > + > + for ( ; level != 0; level-- ) > + { > + if ( !(mask & (BIT(P2M_LEVEL_ORDER(level), UL) - 1)) && > + (nr >= BIT(P2M_LEVEL_ORDER(level), UL)) ) > + { > + order = P2M_LEVEL_ORDER(level); > + break; I'm pretty sure I did complain about the too deep indentation here already. > + } > + } > + > + return order; > +} > + > static int p2m_set_range(struct p2m_domain *p2m, > gfn_t sgfn, > unsigned long nr, > mfn_t smfn, > p2m_type_t t) > { > - return -EOPNOTSUPP; > + int rc = 0; > + unsigned long left = nr; > + > + /* > + * Any reference taken by the P2M mappings (e.g. foreign mapping) will > + * be dropped in relinquish_p2m_mapping(). As the P2M will still > + * be accessible after, we need to prevent mapping to be added when the > + * domain is dying. > + */ > + if ( unlikely(p2m->domain->is_dying) ) > + return -EACCES; > + > + while ( left ) > + { > + unsigned long order = p2m_mapping_order(sgfn, smfn, left); > + > + rc = p2m_set_entry(p2m, sgfn, order, smfn, t); > + if ( rc ) > + break; > + > + sgfn = gfn_add(sgfn, BIT(order, UL)); > + if ( !mfn_eq(smfn, INVALID_MFN) ) > + smfn = mfn_add(smfn, BIT(order, UL)); Off-by-1 indentation again. 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Please point out backports you find missing from the respective staging branch, but which you consider relevant. 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Mon, 10 Nov 2025 07:29:38 -0800 (PST) Message-ID: Date: Mon, 10 Nov 2025 16:29:39 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [for 4.22 v5 11/18] xen/riscv: Implement p2m_free_subtree() and related helpers To: Oleksii Kurochko Cc: Alistair Francis , Bob Eshleman , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <24928a25f63f81ee72b78830306881b2c4c5a1e4.1760974017.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <24928a25f63f81ee72b78830306881b2c4c5a1e4.1760974017.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 20.10.2025 17:57, Oleksii Kurochko wrote: > --- a/xen/arch/riscv/include/asm/p2m.h > +++ b/xen/arch/riscv/include/asm/p2m.h > @@ -110,6 +110,8 @@ typedef enum { > p2m_mmio_direct_io, /* Read/write mapping of genuine Device MMIO area, > PTE_PBMT_IO will be used for such mappings */ > p2m_ext_storage, /* Following types'll be stored outsude PTE bits: */ > + p2m_map_foreign_rw, /* Read/write RAM pages from foreign domain */ > + p2m_map_foreign_ro, /* Read-only RAM pages from foreign domain */ > > /* Sentinel — not a real type, just a marker for comparison */ > p2m_first_external = p2m_ext_storage, > @@ -120,15 +122,28 @@ static inline p2m_type_t arch_dt_passthrough_p2m_type(void) > return p2m_mmio_direct_io; > } > > +/* > + * Bits 8 and 9 are reserved for use by supervisor software; > + * the implementation shall ignore this field. > + * We are going to use to save in these bits frequently used types to avoid > + * get/set of a type from radix tree. > + */ > +#define P2M_TYPE_PTE_BITS_MASK 0x300 Better use PTE_RSW in place of the raw number? > --- a/xen/arch/riscv/p2m.c > +++ b/xen/arch/riscv/p2m.c > @@ -17,6 +17,8 @@ > #include > #include > > +#define P2M_SUPPORTED_LEVEL_MAPPING 2 I fear without a comment it's left unclear what this is / represents. > @@ -403,11 +415,147 @@ static int p2m_next_level(struct p2m_domain *p2m, bool alloc_tbl, > return P2M_TABLE_MAP_NONE; > } > > +static void p2m_put_foreign_page(struct page_info *pg) > +{ > + /* > + * It’s safe to call put_page() here because arch_flush_tlb_mask() > + * will be invoked if the page is reallocated, which will trigger a > + * flush of the guest TLBs. > + */ > + put_page(pg); > +} > + > +/* Put any references on the single 4K page referenced by mfn. */ To me this and ... > +static void p2m_put_4k_page(mfn_t mfn, p2m_type_t type) > +{ > + /* TODO: Handle other p2m types */ > + > + if ( p2m_is_foreign(type) ) > + { > + ASSERT(mfn_valid(mfn)); > + p2m_put_foreign_page(mfn_to_page(mfn)); > + } > +} > + > +/* Put any references on the superpage referenced by mfn. */ ... to a lesser degree this comment are potentially misleading. Down here at least there is something plural-ish (the 4k pages that the 2M one consists of), but especially for the single page case above "any" could easily mean "anything that's still outstanding, anywhere". I'm also not quite sure "on" is really what you mean (I'm not a native speaker, so my gut feeling may be wrong here). > +static void p2m_put_2m_superpage(mfn_t mfn, p2m_type_t type) > +{ > + struct page_info *pg; > + unsigned int i; > + > + /* > + * TODO: Handle other p2m types, but be aware that any changes to handle > + * different types should require an update on the relinquish code to > + * handle preemption. > + */ I guess if I was to address this TODO, I wouldn't know what the latter part of the sentence is warning me of. > + if ( !p2m_is_foreign(type) ) > + return; Are super-page foreign mappings actually intended to be permitted, conceptually? > /* Free pte sub-tree behind an entry */ > static void p2m_free_subtree(struct p2m_domain *p2m, > pte_t entry, unsigned int level) > { > - panic("%s: hasn't been implemented yet\n", __func__); > + unsigned int i; > + pte_t *table; > + mfn_t mfn; > + struct page_info *pg; > + > + /* > + * Check if the level is valid: only 4K - 2M - 1G mappings are supported. > + * To support levels > 2, the implementation of p2m_free_subtree() would > + * need to be updated, as the current recursive approach could consume > + * excessive time and memory. > + */ > + ASSERT(level <= P2M_SUPPORTED_LEVEL_MAPPING); > + > + /* Nothing to do if the entry is invalid. */ > + if ( !pte_is_valid(entry) ) > + return; > + > + if ( (level == 0) || pte_is_superpage(entry, level) ) Considering what pte_is_superpage() expands to, simply pte_is_mapping()? > + { > + p2m_type_t p2mt = p2m_get_type(entry); > + > +#ifdef CONFIG_IOREQ_SERVER > + /* > + * If this gets called then either the entry was replaced by an entry > + * with a different base (valid case) or the shattering of a superpage > + * has failed (error case). > + * So, at worst, the spurious mapcache invalidation might be sent. > + */ > + if ( p2m_is_ram(p2mt) && > + domain_has_ioreq_server(p2m->domain) ) > + ioreq_request_mapcache_invalidate(p2m->domain); > +#endif > + > + p2m_put_page(entry, level, p2mt); > + > + return; > + } > + > + table = map_domain_page(pte_get_mfn(entry)); > + for ( i = 0; i < P2M_PAGETABLE_ENTRIES(level); i++ ) > + p2m_free_subtree(p2m, table[i], level - 1); > + > + unmap_domain_page(table); Please can the use of blank lines in such cases be symmetric: Either have them ahead of and after the loop, or have them nowhere? > @@ -435,7 +583,7 @@ static int p2m_set_entry(struct p2m_domain *p2m, > * Check if the level target is valid: we only support > * 4K - 2M - 1G mapping. > */ > - ASSERT(target <= 2); > + ASSERT(target <= P2M_SUPPORTED_LEVEL_MAPPING); Ah, this is where that constant comes into play. It wants moving to the earlier patch, and with this being the purpose I guess it also wants to include MAX in its name. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?N1T5uSydZEEY1cY9moU0dicN9kJNox4m01YFhNhcvZIGUSukdjyIgIYun5VJ?= =?us-ascii?Q?6pGUfXko6fejw+uvq3vQOWfnsfvspNFpH//lu385Pg3kLcz4jRmha83zyJjd?= =?us-ascii?Q?hSKWOqEN/yHyREBtE8i1cblVKNVyKkvvNuf+6NwQVx+yG7Oa8D0T+Bd5M7+7?= =?us-ascii?Q?LXPAlK/GwSaPr2EO4A7DO5DuIfyB+lPLXsPBJThuuHKjc5BnXs0kANH9cw2e?= =?us-ascii?Q?I/6j9JS/mFkBdKLjv5bVuaSrpc1gUmZ3dFqP08G9xPGHW29bcUyaqRPYd/5S?= =?us-ascii?Q?FLWT3/zlkQeonr8Ro5suIzj/VCPxAfOVZgLVffSXBPz2i4RgZofxLh9i5qQy?= =?us-ascii?Q?+BiFznBOoaPiqkD/rrEH4m3zy+fYSvUainG+9QUvVBuZLwIk+lFPz3RMRvjX?= =?us-ascii?Q?V4gv99JS9EGk8CaohpVbE3Wgr1GjDMascVSBHpj7jOsH/buTaZ/g5HmPWLBh?= =?us-ascii?Q?yQS81dQMkOl41V+gkFH8W5cxTO74Uj3sXMgHLYtaLcNiKTT4+5koXWG/MxIl?= =?us-ascii?Q?i/3BX3JgwtoJ4biLaf/Mu8OKqwayzXBo00aAScCROmZfETNmmpQtia1vT1oa?= =?us-ascii?Q?SEVfve6U2MZew1qUX1smGI9sowNanOsrygLsqWD5TqR+cPZqfMPXUXe8ytWq?= =?us-ascii?Q?oQcplKdjTH0PKItNcRX7n0iDU75RgxnpqkFJ+zajtaR1jrYahjypzgSswKrq?= =?us-ascii?Q?6ParXNDlBzjrYYG8+xVjvq+hu4e6cejgsjNUfPUnr4WxMPrXMyK4bvmy+cFA?= =?us-ascii?Q?0Cf2zkR9pd/Cxh/fxRKgPVwM+V919m0CbC3EYByvQ1TYAaBt4cckWmjnhR5F?= =?us-ascii?Q?b7ZS7V23StkKmsFdd35KZanvRYOQnYxwzQBHb8WUc2d3HcOh6SSnTKEfHTC2?= =?us-ascii?Q?gzhzbWIgvsICuCdqKvmxjsLhPkzK5tr7aTT46lwmhtsMpo/l3dRNo4+3RWxU?= =?us-ascii?Q?/W5UTNwRfw989TsQb2pg5b12CSpX2CB35uO2Bvoy7sWwODYFnzM8XAsplDua?= =?us-ascii?Q?LSotB5KBIfe7OJXG5Iuj8/n0dRvmadf4mOthagDKc8+qj7tb1dyZ2VGSdAjM?= =?us-ascii?Q?XtkbUPmVMsuuZwh3BoDs5X/+HXDGe8MF/WhkH9breXCjigdVBCPxMZEBAZpQ?= =?us-ascii?Q?eq6MOQRuui0+9S1uzPBxbSO46hhoTDC6Q5WicQFl3b6D+5vQhwyBJwO5Y/P/?= =?us-ascii?Q?nzpA7ny/BT1HVTnenWARVdbPH9P3BvbuN5eG1XAfx8H4wdWe6Tw8i/sUvpGQ?= =?us-ascii?Q?VsDeBhR6LEm5pbgoi8Q6AW/1zXvD+bixCAFasAfhX9O00TZP4ygOn2MoXMR/?= =?us-ascii?Q?DB/bkrWaRLWXdmGZPFa3Y4K4s8LTHmW83BOu6mLtBJfdHXfc2Szu/wwjO2sb?= =?us-ascii?Q?bc0Mu+NBzPd0UN+0ropwdXvVefFgl0v8Qja9nxNQALnyIYjVljUQAPhjoJkr?= =?us-ascii?Q?8jiqqMJZceLOK9uOVEu40MHdwqo/Zxav2BEs2yynQ6ZXKTWGCvw/JTdNFMBQ?= =?us-ascii?Q?4jXFLIX57pJuWbiouqE5K/mMaIzRhcd/dgBeIlx0bUeMFYXjg4X9IUUTq21x?= =?us-ascii?Q?7y5L5X514JQYd4WYISDOql2mowvvxZxpAu3SZ3kOvEvNBrnChLVupiU3DwRL?= =?us-ascii?Q?uA=3D=3D?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: a44041dc-c924-4d46-151d-08de206ed6ba X-MS-Exchange-CrossTenant-AuthSource: IA3PR03MB8408.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Nov 2025 15:35:55.4782 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: WWntoSvWjQJqm45t7j7B5rmUP3G3dMbv1hJB6nzDkAoU5jwd8ykp+C/lKAXoF9ftXEhrCZqFq9dO3QOzDTAzxJr6ao7yu64fV1VBxtMnlLI= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR03MB7217 From: Frediano Ziglio For xen.gz file we strip all symbols and have an additional xen-syms.efi file version with all symbols. Make xen.efi more coherent stripping all symbols too. xen-syms.efi can be used for debugging. Signed-off-by: Frediano Ziglio --- Changes since v1: - avoid leaving target if some command fails. Changes since v2: - do not convert type but retain PE format; - use xen-syms.efi for new file name, more consistent with ELF. Changes since v3: - update documentation; - do not remove xen.efi.elf; - check endbr instruction before generating final target. Changes since v4: - simplify condition check; - avoid reuse of $@.tmp file. --- docs/misc/efi.pandoc | 8 +------- xen/Kconfig.debug | 9 ++------- xen/Makefile | 19 ------------------- xen/arch/x86/Makefile | 16 ++++++++++------ 4 files changed, 13 insertions(+), 39 deletions(-) diff --git a/docs/misc/efi.pandoc b/docs/misc/efi.pandoc index 11c1ac3346..c66b18a66b 100644 --- a/docs/misc/efi.pandoc +++ b/docs/misc/efi.pandoc @@ -20,13 +20,7 @@ Xen to load the configuration file even if multiboot modules are found. Once built, `make install-xen` will place the resulting binary directly into the EFI boot partition, provided `EFI_VENDOR` is set in the environment (and `EFI_MOUNTPOINT` is overridden as needed, should the default of `/boot/efi` not -match your system). When built with debug info, the binary can be quite large. -Setting `INSTALL_EFI_STRIP=1` in the environment will cause it to be stripped -of debug info in the process of installing. `INSTALL_EFI_STRIP` can also be set -to any combination of options suitable to pass to `strip`, in case the default -ones don't do. The xen.efi binary will also be installed in `/usr/lib64/efi/`, -unless `EFI_DIR` is set in the environment to override this default. This -binary will not be stripped in the process. +match your system). The binary itself will require a configuration file (names with the `.efi` extension of the binary's name replaced by `.cfg`, and - until an existing diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug index d900d926c5..1a8e0c6ec3 100644 --- a/xen/Kconfig.debug +++ b/xen/Kconfig.debug @@ -147,12 +147,7 @@ config DEBUG_INFO Say Y here if you want to build Xen with debug information. This information is needed e.g. for doing crash dump analysis of the hypervisor via the "crash" tool. - Saying Y will increase the size of the xen-syms and xen.efi - binaries. In case the space on the EFI boot partition is rather - limited, you may want to install a stripped variant of xen.efi in - the EFI boot partition (look for "INSTALL_EFI_STRIP" in - docs/misc/efi.pandoc for more information - when not using - "make install-xen" for installing xen.efi, stripping needs to be - done outside the Xen build environment). + Saying Y will increase the size of the xen-syms, xen-syms.efi and + xen.efi.elf binaries. endmenu diff --git a/xen/Makefile b/xen/Makefile index ddcee8835c..605a26c181 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -493,22 +493,6 @@ endif .PHONY: _build _build: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX) -# Strip -# -# INSTALL_EFI_STRIP, if defined, will cause xen.efi to be stripped before it -# is installed. If INSTALL_EFI_STRIP is '1', then the default option(s) below -# will be used. Otherwise, INSTALL_EFI_STRIP value will be used as the -# option(s) to the strip command. -ifdef INSTALL_EFI_STRIP - -ifeq ($(INSTALL_EFI_STRIP),1) -efi-strip-opt := --strip-debug --keep-file-symbols -else -efi-strip-opt := $(INSTALL_EFI_STRIP) -endif - -endif - .PHONY: _install _install: D=$(DESTDIR) _install: T=$(notdir $(TARGET)) @@ -535,9 +519,6 @@ _install: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX) ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T)-$(XEN_VERSION).efi; \ ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T).efi; \ if [ -n '$(EFI_MOUNTPOINT)' -a -n '$(EFI_VENDOR)' ]; then \ - $(if $(efi-strip-opt), \ - $(STRIP) $(efi-strip-opt) -p -o $(TARGET).efi.stripped $(TARGET).efi && \ - $(INSTALL_DATA) $(TARGET).efi.stripped $(D)$(EFI_MOUNTPOINT)/efi/$(EFI_VENDOR)/$(T)-$(XEN_FULLVERSION).efi ||) \ $(INSTALL_DATA) $(TARGET).efi $(D)$(EFI_MOUNTPOINT)/efi/$(EFI_VENDOR)/$(T)-$(XEN_FULLVERSION).efi; \ elif [ "$(D)" = "$(patsubst $(shell cd $(XEN_ROOT) && pwd)/%,%,$(D))" ]; then \ echo 'EFI installation only partially done (EFI_VENDOR not set)' >&2; \ diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index 407571c510..51d8084693 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -228,17 +228,21 @@ endif $(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o $(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds $< \ $(dot-target).1r.o $(dot-target).1s.o $(orphan-handling-y) \ - $(note_file_option) -o $@ - $(NM) -pa --format=sysv $@ \ + $(note_file_option) -o $(TARGET)-syms.efi + $(NM) -pa --format=sysv $(TARGET)-syms.efi \ | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > $@.map -ifeq ($(CONFIG_DEBUG_INFO),y) - $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) -O elf64-x86-64 $@ $@.elf +ifeq ($(CONFIG_DEBUG_INFO)_$(filter --strip-debug,$(EFI_LDFLAGS)),y_) + $(OBJCOPY) -O elf64-x86-64 $(TARGET)-syms.efi $@.elf + $(STRIP) $(TARGET)-syms.efi -o $@.tmp +else + mv -f $(TARGET)-syms.efi -o $@.tmp endif - rm -f $(dot-target).[0-9]* $(@D)/..$(@F).[0-9]* ifeq ($(CONFIG_XEN_IBT),y) - $(SHELL) $(srctree)/tools/check-endbr.sh $@ + $(SHELL) $(srctree)/tools/check-endbr.sh $@.tmp endif + mv -f $@.tmp $@ + rm -f $(dot-target).[0-9]* $(@D)/..$(@F).[0-9]* else $(TARGET).efi: FORCE rm -f $@ -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Mon Nov 10 15:36:53 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 15:36:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158476.1486826 (Exim 4.92) (envelope-from ) id 1vITwr-0002Bj-4k; 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Mon, 10 Nov 2025 07:36:48 -0800 (PST) MIME-Version: 1.0 References: <20251110125859.78124-1-frediano.ziglio@citrix.com> <55f0f1f2-3892-44fa-94d6-15e0e8513ef1@suse.com> In-Reply-To: <55f0f1f2-3892-44fa-94d6-15e0e8513ef1@suse.com> From: Frediano Ziglio Date: Mon, 10 Nov 2025 15:36:34 +0000 X-Gm-Features: AWmQ_bnZ7yUJlqdHBV99NVXmj8haUWjOKE1DEyza--C3eQq4G9FxeUrSOjeviW8 Message-ID: Subject: Re: [PATCH v5] xen: Strip xen.efi by default To: Jan Beulich Cc: Frediano Ziglio , Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Demi Marie Obenour , =?UTF-8?Q?Marek_Marczykowski=2DG=C3=B3recki?= , xen-devel@lists.xenproject.org Content-Type: text/plain; charset="UTF-8" On Mon, 10 Nov 2025 at 13:40, Jan Beulich wrote: > > On 10.11.2025 13:58, Frediano Ziglio wrote: > > --- a/xen/arch/x86/Makefile > > +++ b/xen/arch/x86/Makefile > > @@ -228,17 +228,21 @@ endif > > $(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o > > $(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds $< \ > > $(dot-target).1r.o $(dot-target).1s.o $(orphan-handling-y) \ > > - $(note_file_option) -o $@ > > - $(NM) -pa --format=sysv $@ \ > > + $(note_file_option) -o $(TARGET)-syms.efi > > + $(NM) -pa --format=sysv $(TARGET)-syms.efi \ > > | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > > > $@.map > > This part if fine with me now. > > > -ifeq ($(CONFIG_DEBUG_INFO),y) > > - $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) -O elf64-x86-64 $@ $@.elf > > +ifeq ($(CONFIG_DEBUG_INFO)_$(filter --strip-debug,$(EFI_LDFLAGS)),y_) > > This extra change looks correct to me, yet I wonder if doing it this way isn't > fragile. If EFI_LDFLAGS wasn't set globally, but only for xen.efi, aiui this > wouldn't work anymore. > Maybe, but it's not a regression of this patch, the same test was present before, just using another syntax > > + $(OBJCOPY) -O elf64-x86-64 $(TARGET)-syms.efi $@.elf > > + $(STRIP) $(TARGET)-syms.efi -o $@.tmp > > +else > > + mv -f $(TARGET)-syms.efi -o $@.tmp > > This, while I think I understand why you do it, looks somewhat odd. Plus the > reason you do it is, like ... > Can you explain why "it looks somewhat odd" ? > > endif > > - rm -f $(dot-target).[0-9]* $(@D)/..$(@F).[0-9]* > > ifeq ($(CONFIG_XEN_IBT),y) > > - $(SHELL) $(srctree)/tools/check-endbr.sh $@ > > + $(SHELL) $(srctree)/tools/check-endbr.sh $@.tmp > > endif > > + mv -f $@.tmp $@ > > + rm -f $(dot-target).[0-9]* $(@D)/..$(@F).[0-9]* > > else > > $(TARGET).efi: FORCE > > rm -f $@ > > ... (still) most of this, unrelated (and, as before, not mentioned at all in > the description). > I will remove it for now. > Jan Frediano From xen-devel-bounces@lists.xenproject.org Mon Nov 10 15:37:16 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 15:37:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158486.1486836 (Exim 4.92) (envelope-from ) id 1vITxE-0002gb-Bw; Mon, 10 Nov 2025 15:37:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158486.1486836; Mon, 10 Nov 2025 15:37:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vITxE-0002gU-8U; Mon, 10 Nov 2025 15:37:16 +0000 Received: by outflank-mailman (input) for mailman id 1158486; Mon, 10 Nov 2025 15:37:15 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vITxC-0001gP-Ug for xen-devel@lists.xenproject.org; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?QGjAn5icXD7fPz2xNZmRScQQ74GpKFSwaLDtxcmyvlFk3ZXWPIDCze54zh4b?= =?us-ascii?Q?Emk7j9FWIbd+xrbqyhM+zhZ/kD67GOnmdGIpDiE5JKx/OOmri02NSV0YqlYE?= =?us-ascii?Q?V6wKJ96VS9DPluVapErHC9mvT9CFhufVBHydyLlekxElBrgcNWKKGDZzV3D8?= =?us-ascii?Q?7LV14+jfFYhc4iV9X6qTvRA2QeT7OeCpp9U5xE/a9AzzIfy8wLuwfFULm4WZ?= =?us-ascii?Q?nc2/5P2HZDY4V+LvCCzawYuyYhrGDPz3f3Be27IdLf1wrcsXg8hDdaMOkPtE?= =?us-ascii?Q?5VPhAv7zxjMyuTvDz46tsAKgSEOLMJyHNoIgnNK+SlAlkUvFg50ZDidpoPTy?= =?us-ascii?Q?SH+4c3Ikf+5e0JBYANNQRKQgW4KNJEn9jkUqnXH9TxRPVBBBkhaulH/5uq5N?= =?us-ascii?Q?hIVr6vfWn9R6DfgIdEIlx3aluAzzdUTbStSVLWjdwX1YCfbEaQGYEsCEY8LG?= =?us-ascii?Q?Qdixs/h/1aSxxCc3RkF7ELI+so/oyGaNfk3rzxrmMKB2dOvNnnfUK7mIe2r9?= =?us-ascii?Q?WomwWk47yDG2i8887uAMxBFk0q+cXCCrHlv4OTUolZ3HjNQZK/4lbchjzeer?= =?us-ascii?Q?Uv1h52hKLAt9r/tNQ/DD3ttNDnHw4PsxvB9F+prVFZaC3NSdSIRinl+kyhfs?= =?us-ascii?Q?ZjlqufPmUCofa1exH9Qc9/qVaQvb9roBgadFPuXZZwb5sl/GARjRpv/brneT?= =?us-ascii?Q?c+2o78upnViJG42cDa5pt0wu1KrCdblJ+BpDPHNhm3icgWIYvBl4F0LcPw5D?= =?us-ascii?Q?L4BjVWN21spO6LNW4QkKurxHGu0NlqajwJHRGSr+mwkVauTsJl0HZGC74U31?= =?us-ascii?Q?W2eGN5ikEUmWklNLV8q8OIjD9glrtYOaROJAeNd4im8vTprqbZA2Ap0aDA3l?= =?us-ascii?Q?6G2YKM6rE7sLpCEYQNZs2q+4qPpN7W0MsU4JX5tMNwKVAaw0YiHD++ud452P?= =?us-ascii?Q?fsfd4fT0Y3Z8CeHn+ElaWk7k9pTgfaM3z1wWBAYqKcDX9bVAMvwcibMvcNG0?= =?us-ascii?Q?OyYCsKtBJGUzkluAZaHmW6TVbYAHrlPEl2N4pkxJqvMRcDoTp4FjptSwvVew?= =?us-ascii?Q?K+Yg+M39jXmhI74cpU8AuSWe1tYrnLmtBYhyqsRgGBaKRges3yyxV6NqISMR?= =?us-ascii?Q?dFEWn1zypaSsD0bKH0UZV0eS99Lgjy7jEcIETdrkEET0BwLj+hZWNMlwa1bz?= =?us-ascii?Q?cd+zfsvw06XXWyLJMdLbPW4Z8cnbOk5e/MsdjgEL7LEhBNKJZehRoIpFyjRK?= =?us-ascii?Q?0+g+naeiEfMMHfoPTn6oMmLqke6audrKjIEE+nFMHaG9rEkbJ25pc+92upEX?= =?us-ascii?Q?5gWzhxXWIovduVtrM5An0/YMI+Ylu9fqpl953HGwW9s0E7Mv9x3YY1RJNCkD?= =?us-ascii?Q?e3jFhj9y+3pBMQdVlhy1xT0y2OvceDIn364+ZH5PpK9JlBCgPn3KNHWpSuAG?= =?us-ascii?Q?ySkBmT2l1Z/OYNmo68c43ysdj00Jj3E2BTsHkfDyc+mGphd1TgIax+eJ9w+9?= =?us-ascii?Q?7zNFTUkjfp9xyFNsrhZIlz4OnayJ2Rq0aNxz2VXptTd8rfA6kR9liW73YveG?= =?us-ascii?Q?Q/fqkFTfBAVr7jIku+esuTb4N+9ea1uhe0k1YCww/qf1ij8X5IkerpzgNF1A?= =?us-ascii?Q?Lw=3D=3D?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1cbaab37-ebcd-49cd-4aea-08de206f03d3 X-MS-Exchange-CrossTenant-AuthSource: IA3PR03MB8408.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Nov 2025 15:37:11.1965 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: zT1FeLIIEYDwoRofcF7p3++ZFT7tGO3n8hbUyEuO/xwOXpsMnvwB3HWm+LDS4hLMbAUnx6x+qTHwgwkUxYM2alhURRVypA+/23DesU8poQM= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR03MB7217 From: Frediano Ziglio For xen.gz file we strip all symbols and have an additional xen-syms.efi file version with all symbols. Make xen.efi more coherent stripping all symbols too. xen-syms.efi can be used for debugging. Signed-off-by: Frediano Ziglio --- Changes since v1: - avoid leaving target if some command fails. Changes since v2: - do not convert type but retain PE format; - use xen-syms.efi for new file name, more consistent with ELF. Changes since v3: - update documentation; - do not remove xen.efi.elf; - check endbr instruction before generating final target. Changes since v4: - simplify condition check; - avoid reuse of $@.tmp file. Changes since v5: - avoid creation of temporary file. --- docs/misc/efi.pandoc | 8 +------- xen/Kconfig.debug | 9 ++------- xen/Makefile | 19 ------------------- xen/arch/x86/Makefile | 11 +++++++---- 4 files changed, 10 insertions(+), 37 deletions(-) diff --git a/docs/misc/efi.pandoc b/docs/misc/efi.pandoc index 11c1ac3346..c66b18a66b 100644 --- a/docs/misc/efi.pandoc +++ b/docs/misc/efi.pandoc @@ -20,13 +20,7 @@ Xen to load the configuration file even if multiboot modules are found. Once built, `make install-xen` will place the resulting binary directly into the EFI boot partition, provided `EFI_VENDOR` is set in the environment (and `EFI_MOUNTPOINT` is overridden as needed, should the default of `/boot/efi` not -match your system). When built with debug info, the binary can be quite large. -Setting `INSTALL_EFI_STRIP=1` in the environment will cause it to be stripped -of debug info in the process of installing. `INSTALL_EFI_STRIP` can also be set -to any combination of options suitable to pass to `strip`, in case the default -ones don't do. The xen.efi binary will also be installed in `/usr/lib64/efi/`, -unless `EFI_DIR` is set in the environment to override this default. This -binary will not be stripped in the process. +match your system). The binary itself will require a configuration file (names with the `.efi` extension of the binary's name replaced by `.cfg`, and - until an existing diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug index d900d926c5..1a8e0c6ec3 100644 --- a/xen/Kconfig.debug +++ b/xen/Kconfig.debug @@ -147,12 +147,7 @@ config DEBUG_INFO Say Y here if you want to build Xen with debug information. This information is needed e.g. for doing crash dump analysis of the hypervisor via the "crash" tool. - Saying Y will increase the size of the xen-syms and xen.efi - binaries. In case the space on the EFI boot partition is rather - limited, you may want to install a stripped variant of xen.efi in - the EFI boot partition (look for "INSTALL_EFI_STRIP" in - docs/misc/efi.pandoc for more information - when not using - "make install-xen" for installing xen.efi, stripping needs to be - done outside the Xen build environment). + Saying Y will increase the size of the xen-syms, xen-syms.efi and + xen.efi.elf binaries. endmenu diff --git a/xen/Makefile b/xen/Makefile index ddcee8835c..605a26c181 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -493,22 +493,6 @@ endif .PHONY: _build _build: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX) -# Strip -# -# INSTALL_EFI_STRIP, if defined, will cause xen.efi to be stripped before it -# is installed. If INSTALL_EFI_STRIP is '1', then the default option(s) below -# will be used. Otherwise, INSTALL_EFI_STRIP value will be used as the -# option(s) to the strip command. -ifdef INSTALL_EFI_STRIP - -ifeq ($(INSTALL_EFI_STRIP),1) -efi-strip-opt := --strip-debug --keep-file-symbols -else -efi-strip-opt := $(INSTALL_EFI_STRIP) -endif - -endif - .PHONY: _install _install: D=$(DESTDIR) _install: T=$(notdir $(TARGET)) @@ -535,9 +519,6 @@ _install: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX) ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T)-$(XEN_VERSION).efi; \ ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T).efi; \ if [ -n '$(EFI_MOUNTPOINT)' -a -n '$(EFI_VENDOR)' ]; then \ - $(if $(efi-strip-opt), \ - $(STRIP) $(efi-strip-opt) -p -o $(TARGET).efi.stripped $(TARGET).efi && \ - $(INSTALL_DATA) $(TARGET).efi.stripped $(D)$(EFI_MOUNTPOINT)/efi/$(EFI_VENDOR)/$(T)-$(XEN_FULLVERSION).efi ||) \ $(INSTALL_DATA) $(TARGET).efi $(D)$(EFI_MOUNTPOINT)/efi/$(EFI_VENDOR)/$(T)-$(XEN_FULLVERSION).efi; \ elif [ "$(D)" = "$(patsubst $(shell cd $(XEN_ROOT) && pwd)/%,%,$(D))" ]; then \ echo 'EFI installation only partially done (EFI_VENDOR not set)' >&2; \ diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index 407571c510..270800694c 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -228,12 +228,15 @@ endif $(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o $(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds $< \ $(dot-target).1r.o $(dot-target).1s.o $(orphan-handling-y) \ - $(note_file_option) -o $@ - $(NM) -pa --format=sysv $@ \ + $(note_file_option) -o $(TARGET)-syms.efi + $(NM) -pa --format=sysv $(TARGET)-syms.efi \ | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > $@.map -ifeq ($(CONFIG_DEBUG_INFO),y) - $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) -O elf64-x86-64 $@ $@.elf +ifeq ($(CONFIG_DEBUG_INFO)_$(filter --strip-debug,$(EFI_LDFLAGS)),y_) + $(OBJCOPY) -O elf64-x86-64 $(TARGET)-syms.efi $@.elf + $(STRIP) $(TARGET)-syms.efi -o $@ +else + mv -f $(TARGET)-syms.efi -o $@ endif rm -f $(dot-target).[0-9]* $(@D)/..$(@F).[0-9]* ifeq ($(CONFIG_XEN_IBT),y) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Mon Nov 10 15:38:39 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 15:38:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158496.1486846 (Exim 4.92) (envelope-from ) id 1vITyY-0003Hh-LG; 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Mon, 10 Nov 2025 07:38:34 -0800 (PST) MIME-Version: 1.0 References: <20251110153551.84813-1-frediano.ziglio@citrix.com> In-Reply-To: <20251110153551.84813-1-frediano.ziglio@citrix.com> From: Frediano Ziglio Date: Mon, 10 Nov 2025 15:38:23 +0000 X-Gm-Features: AWmQ_bm_W_U9a2rhWaDUsw6H9UCR14UoBfP3Kg6Y5CmGxZpNhxa5ZMCNO7eMHYs Message-ID: Subject: Re: [PATCH v5] xen: Strip xen.efi by default To: Frediano Ziglio Cc: xen-devel@lists.xenproject.org, Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Demi Marie Obenour , =?UTF-8?Q?Marek_Marczykowski=2DG=C3=B3recki?= Content-Type: text/plain; charset="UTF-8" Sorry, I sent version again by mistake Frediano On Mon, 10 Nov 2025 at 15:35, Frediano Ziglio wrote: > > From: Frediano Ziglio > > For xen.gz file we strip all symbols and have an additional > xen-syms.efi file version with all symbols. > Make xen.efi more coherent stripping all symbols too. > xen-syms.efi can be used for debugging. > > Signed-off-by: Frediano Ziglio > --- > Changes since v1: > - avoid leaving target if some command fails. > > Changes since v2: > - do not convert type but retain PE format; > - use xen-syms.efi for new file name, more consistent with ELF. > > Changes since v3: > - update documentation; > - do not remove xen.efi.elf; > - check endbr instruction before generating final target. > > Changes since v4: > - simplify condition check; > - avoid reuse of $@.tmp file. > --- > docs/misc/efi.pandoc | 8 +------- > xen/Kconfig.debug | 9 ++------- > xen/Makefile | 19 ------------------- > xen/arch/x86/Makefile | 16 ++++++++++------ > 4 files changed, 13 insertions(+), 39 deletions(-) > > diff --git a/docs/misc/efi.pandoc b/docs/misc/efi.pandoc > index 11c1ac3346..c66b18a66b 100644 > --- a/docs/misc/efi.pandoc > +++ b/docs/misc/efi.pandoc > @@ -20,13 +20,7 @@ Xen to load the configuration file even if multiboot modules are found. > Once built, `make install-xen` will place the resulting binary directly into > the EFI boot partition, provided `EFI_VENDOR` is set in the environment (and > `EFI_MOUNTPOINT` is overridden as needed, should the default of `/boot/efi` not > -match your system). When built with debug info, the binary can be quite large. > -Setting `INSTALL_EFI_STRIP=1` in the environment will cause it to be stripped > -of debug info in the process of installing. `INSTALL_EFI_STRIP` can also be set > -to any combination of options suitable to pass to `strip`, in case the default > -ones don't do. The xen.efi binary will also be installed in `/usr/lib64/efi/`, > -unless `EFI_DIR` is set in the environment to override this default. This > -binary will not be stripped in the process. > +match your system). > > The binary itself will require a configuration file (names with the `.efi` > extension of the binary's name replaced by `.cfg`, and - until an existing > diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug > index d900d926c5..1a8e0c6ec3 100644 > --- a/xen/Kconfig.debug > +++ b/xen/Kconfig.debug > @@ -147,12 +147,7 @@ config DEBUG_INFO > Say Y here if you want to build Xen with debug information. This > information is needed e.g. for doing crash dump analysis of the > hypervisor via the "crash" tool. > - Saying Y will increase the size of the xen-syms and xen.efi > - binaries. In case the space on the EFI boot partition is rather > - limited, you may want to install a stripped variant of xen.efi in > - the EFI boot partition (look for "INSTALL_EFI_STRIP" in > - docs/misc/efi.pandoc for more information - when not using > - "make install-xen" for installing xen.efi, stripping needs to be > - done outside the Xen build environment). > + Saying Y will increase the size of the xen-syms, xen-syms.efi and > + xen.efi.elf binaries. > > endmenu > diff --git a/xen/Makefile b/xen/Makefile > index ddcee8835c..605a26c181 100644 > --- a/xen/Makefile > +++ b/xen/Makefile > @@ -493,22 +493,6 @@ endif > .PHONY: _build > _build: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX) > > -# Strip > -# > -# INSTALL_EFI_STRIP, if defined, will cause xen.efi to be stripped before it > -# is installed. If INSTALL_EFI_STRIP is '1', then the default option(s) below > -# will be used. Otherwise, INSTALL_EFI_STRIP value will be used as the > -# option(s) to the strip command. > -ifdef INSTALL_EFI_STRIP > - > -ifeq ($(INSTALL_EFI_STRIP),1) > -efi-strip-opt := --strip-debug --keep-file-symbols > -else > -efi-strip-opt := $(INSTALL_EFI_STRIP) > -endif > - > -endif > - > .PHONY: _install > _install: D=$(DESTDIR) > _install: T=$(notdir $(TARGET)) > @@ -535,9 +519,6 @@ _install: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX) > ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T)-$(XEN_VERSION).efi; \ > ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T).efi; \ > if [ -n '$(EFI_MOUNTPOINT)' -a -n '$(EFI_VENDOR)' ]; then \ > - $(if $(efi-strip-opt), \ > - $(STRIP) $(efi-strip-opt) -p -o $(TARGET).efi.stripped $(TARGET).efi && \ > - $(INSTALL_DATA) $(TARGET).efi.stripped $(D)$(EFI_MOUNTPOINT)/efi/$(EFI_VENDOR)/$(T)-$(XEN_FULLVERSION).efi ||) \ > $(INSTALL_DATA) $(TARGET).efi $(D)$(EFI_MOUNTPOINT)/efi/$(EFI_VENDOR)/$(T)-$(XEN_FULLVERSION).efi; \ > elif [ "$(D)" = "$(patsubst $(shell cd $(XEN_ROOT) && pwd)/%,%,$(D))" ]; then \ > echo 'EFI installation only partially done (EFI_VENDOR not set)' >&2; \ > diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile > index 407571c510..51d8084693 100644 > --- a/xen/arch/x86/Makefile > +++ b/xen/arch/x86/Makefile > @@ -228,17 +228,21 @@ endif > $(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o > $(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds $< \ > $(dot-target).1r.o $(dot-target).1s.o $(orphan-handling-y) \ > - $(note_file_option) -o $@ > - $(NM) -pa --format=sysv $@ \ > + $(note_file_option) -o $(TARGET)-syms.efi > + $(NM) -pa --format=sysv $(TARGET)-syms.efi \ > | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > > $@.map > -ifeq ($(CONFIG_DEBUG_INFO),y) > - $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) -O elf64-x86-64 $@ $@.elf > +ifeq ($(CONFIG_DEBUG_INFO)_$(filter --strip-debug,$(EFI_LDFLAGS)),y_) > + $(OBJCOPY) -O elf64-x86-64 $(TARGET)-syms.efi $@.elf > + $(STRIP) $(TARGET)-syms.efi -o $@.tmp > +else > + mv -f $(TARGET)-syms.efi -o $@.tmp > endif > - rm -f $(dot-target).[0-9]* $(@D)/..$(@F).[0-9]* > ifeq ($(CONFIG_XEN_IBT),y) > - $(SHELL) $(srctree)/tools/check-endbr.sh $@ > + $(SHELL) $(srctree)/tools/check-endbr.sh $@.tmp > endif > + mv -f $@.tmp $@ > + rm -f $(dot-target).[0-9]* $(@D)/..$(@F).[0-9]* > else > $(TARGET).efi: FORCE > rm -f $@ > -- > 2.43.0 > From xen-devel-bounces@lists.xenproject.org Mon Nov 10 15:49:27 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 15:49:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158518.1486856 (Exim 4.92) (envelope-from ) id 1vIU8v-0005Cn-Mb; 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it slipped my attention. Please > point out backports you find missing from the respective staging branch, but which > you consider relevant. Looking at the XS patchqueue, the only obvious one is: b7838d12bd1a - tools/libxc: fix xc_physdev_map_pirq_msi() with PCI segments != 0 We did also backport migration superpages (50baf2d9f7bb) but I suspect that's too much of a new feature for your liking. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon Nov 10 15:53:43 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 15:53:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158530.1486865 (Exim 4.92) (envelope-from ) id 1vIUD6-0006u2-7E; Mon, 10 Nov 2025 15:53:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158530.1486865; Mon, 10 Nov 2025 15:53:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIUD6-0006tv-4P; Mon, 10 Nov 2025 15:53:40 +0000 Received: by outflank-mailman (input) for mailman id 1158530; Mon, 10 Nov 2025 15:53:39 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIUD4-0006tm-WE for xen-devel@lists.xenproject.org; Mon, 10 Nov 2025 15:53:39 +0000 Received: from mail-ej1-x635.google.com (mail-ej1-x635.google.com [2a00:1450:4864:20::635]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 6b15f0dd-be4d-11f0-980a-7dc792cee155; Mon, 10 Nov 2025 16:53:36 +0100 (CET) Received: by mail-ej1-x635.google.com with SMTP id a640c23a62f3a-b64cdbb949cso548678266b.1 for ; Mon, 10 Nov 2025 07:53:36 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 10 Nov 2025 07:53:36 -0800 (PST) Message-ID: <2c3fffbf-68cb-4850-95f2-71ae1af1a6bb@suse.com> Date: Mon, 10 Nov 2025 16:53:37 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5] xen: Strip xen.efi by default To: Frediano Ziglio Cc: Frediano Ziglio , Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Demi Marie Obenour , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , xen-devel@lists.xenproject.org References: <20251110125859.78124-1-frediano.ziglio@citrix.com> <55f0f1f2-3892-44fa-94d6-15e0e8513ef1@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 10.11.2025 16:36, Frediano Ziglio wrote: > On Mon, 10 Nov 2025 at 13:40, Jan Beulich wrote: >> On 10.11.2025 13:58, Frediano Ziglio wrote: >>> --- a/xen/arch/x86/Makefile >>> +++ b/xen/arch/x86/Makefile >>> @@ -228,17 +228,21 @@ endif >>> $(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o >>> $(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds $< \ >>> $(dot-target).1r.o $(dot-target).1s.o $(orphan-handling-y) \ >>> - $(note_file_option) -o $@ >>> - $(NM) -pa --format=sysv $@ \ >>> + $(note_file_option) -o $(TARGET)-syms.efi >>> + $(NM) -pa --format=sysv $(TARGET)-syms.efi \ >>> | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ >>> > $@.map >> >> This part if fine with me now. >> >>> -ifeq ($(CONFIG_DEBUG_INFO),y) >>> - $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) -O elf64-x86-64 $@ $@.elf >>> +ifeq ($(CONFIG_DEBUG_INFO)_$(filter --strip-debug,$(EFI_LDFLAGS)),y_) >> >> This extra change looks correct to me, yet I wonder if doing it this way isn't >> fragile. If EFI_LDFLAGS wasn't set globally, but only for xen.efi, aiui this >> wouldn't work anymore. > > Maybe, but it's not a regression of this patch, the same test was > present before, just using another syntax How is it not a (latent) regression? It is my understanding that the ifeq() is processed when the Makefile is parsed, whereas the original $(if ...) was processed as the rule is executed. >>> + $(OBJCOPY) -O elf64-x86-64 $(TARGET)-syms.efi $@.elf >>> + $(STRIP) $(TARGET)-syms.efi -o $@.tmp >>> +else >>> + mv -f $(TARGET)-syms.efi -o $@.tmp >> >> This, while I think I understand why you do it, looks somewhat odd. Plus the >> reason you do it is, like ... > > Can you explain why "it looks somewhat odd" ? You're moving a properly named file to a temporary one. (Just to later move it again.) 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Mon, 10 Nov 2025 08:01:41 -0800 (PST) Message-ID: <4ac8284c-e7f1-4d6a-9241-d6c30155551b@suse.com> Date: Mon, 10 Nov 2025 17:01:42 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5] xen: Strip xen.efi by default To: Frediano Ziglio Cc: Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Frediano Ziglio , Demi Marie Obenour , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , xen-devel@lists.xenproject.org References: <20251110153551.84813-1-frediano.ziglio@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251110153551.84813-1-frediano.ziglio@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 10.11.2025 16:35, Frediano Ziglio wrote: > From: Frediano Ziglio > > For xen.gz file we strip all symbols and have an additional > xen-syms.efi file version with all symbols. > Make xen.efi more coherent stripping all symbols too. > xen-syms.efi can be used for debugging. > > Signed-off-by: Frediano Ziglio > --- > Changes since v1: > - avoid leaving target if some command fails. > > Changes since v2: > - do not convert type but retain PE format; > - use xen-syms.efi for new file name, more consistent with ELF. > > Changes since v3: > - update documentation; > - do not remove xen.efi.elf; > - check endbr instruction before generating final target. > > Changes since v4: > - simplify condition check; > - avoid reuse of $@.tmp file. > --- > docs/misc/efi.pandoc | 8 +------- > xen/Kconfig.debug | 9 ++------- > xen/Makefile | 19 ------------------- > xen/arch/x86/Makefile | 16 ++++++++++------ > 4 files changed, 13 insertions(+), 39 deletions(-) > > diff --git a/docs/misc/efi.pandoc b/docs/misc/efi.pandoc > index 11c1ac3346..c66b18a66b 100644 > --- a/docs/misc/efi.pandoc > +++ b/docs/misc/efi.pandoc > @@ -20,13 +20,7 @@ Xen to load the configuration file even if multiboot modules are found. > Once built, `make install-xen` will place the resulting binary directly into > the EFI boot partition, provided `EFI_VENDOR` is set in the environment (and > `EFI_MOUNTPOINT` is overridden as needed, should the default of `/boot/efi` not > -match your system). When built with debug info, the binary can be quite large. > -Setting `INSTALL_EFI_STRIP=1` in the environment will cause it to be stripped > -of debug info in the process of installing. `INSTALL_EFI_STRIP` can also be set > -to any combination of options suitable to pass to `strip`, in case the default > -ones don't do. The xen.efi binary will also be installed in `/usr/lib64/efi/`, > -unless `EFI_DIR` is set in the environment to override this default. This > -binary will not be stripped in the process. > +match your system). This behavioral change likely also calls for a ChangeLog entry, btw. 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Mon, 10 Nov 2025 08:22:21 -0800 (PST) Message-ID: Date: Mon, 10 Nov 2025 17:22:22 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [for 4.22 v5 12/18] xen/riscv: Implement p2m_pte_from_mfn() and support PBMT configuration To: Oleksii Kurochko Cc: Alistair Francis , Bob Eshleman , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 20.10.2025 17:57, Oleksii Kurochko wrote: > This patch adds the initial logic for constructing PTEs from MFNs in the RISC-V > p2m subsystem. It includes: > - Implementation of p2m_pte_from_mfn(): Generates a valid PTE using the > given MFN, p2m_type_t, including permission encoding and PBMT attribute > setup. > - New helper p2m_set_permission(): Encodes access rights (r, w, x) into the > PTE based on both p2m type and access permissions. > - p2m_set_type(): Stores the p2m type in PTE's bits. The storage of types, > which don't fit PTE bits, will be implemented separately later. > - Add detection of Svade extension to properly handle a possible page-fault > if A and D bits aren't set. > > PBMT type encoding support: > - Introduces an enum pbmt_type_t to represent the PBMT field values. > - Maps types like p2m_mmio_direct_dev to p2m_mmio_direct_io, others default > to pbmt_pma. > > Signed-off-by: Oleksii Kurochko > --- > Changes in V5: > - Moved setting of p2m_mmio_direct_io inside (!is_table) case in p2m_pte_from_mfn(). > - Extend comment about the place of setting A/D bits with explanation > why it is done in this way for now. > --- > Changes in V4: > - p2m_set_permission() updates: > - Update permissions for p2m_ram_rw case, make it also executable. > - Add pernissions setting for p2m_map_foreign_* types. > - Drop setting peromissions for p2m_ext_storage. > - Only turn off PTE_VALID bit for p2m_invalid, don't touch other bits. > - p2m_pte_from_mfn() updates: > - Update ASSERT(), add a check that mfn isn't INVALID_MFN (1) > explicitly to avoid the case when PADDR_MASK isn't narrow enough to > catch the case (1). > - Drop unnessary check around call of p2m_set_type() as this check > is already included inside p2m_set_type(). > - Introduce new p2m type p2m_first_external to detect that passed type > is stored in external storage. > - Add handling of PTE's A and D bits in pm2_set_permission. Also, set > PTE_USER bit. For this cpufeatures.{h and c} were updated to be able > to detect availability of Svade extension. > - Drop grant table related code as it isn't going to be used at the moment. > --- > Changes in V3: > - s/p2m_entry_from_mfn/p2m_pte_from_mfn. > - s/pbmt_type_t/pbmt_type. > - s/pbmt_max/pbmt_count. > - s/p2m_type_radix_set/p2m_set_type. > - Rework p2m_set_type() to handle only types which are fited into PTEs bits. > Other types will be covered separately. > Update arguments of p2m_set_type(): there is no any reason for p2m anymore. > - p2m_set_permissions() updates: > - Update the code in p2m_set_permission() for cases p2m_raw_rw and > p2m_mmio_direct_io to set proper type permissions. > - Add cases for p2m_grant_map_rw and p2m_grant_map_ro. > - Use ASSERT_UNEACHABLE() instead of BUG() in switch cases of > p2m_set_permissions. > - Add blank lines non-fall-through case blocks in switch cases. > - Set MFN before permissions are set in p2m_pte_from_mfn(). > - Update prototype of p2m_entry_from_mfn(). > --- > Changes in V2: > - New patch. It was a part of a big patch "xen/riscv: implement p2m mapping > functionality" which was splitted to smaller. > --- > xen/arch/riscv/cpufeature.c | 1 + > xen/arch/riscv/include/asm/cpufeature.h | 1 + > xen/arch/riscv/include/asm/page.h | 8 ++ > xen/arch/riscv/p2m.c | 112 +++++++++++++++++++++++- > 4 files changed, 118 insertions(+), 4 deletions(-) > > diff --git a/xen/arch/riscv/cpufeature.c b/xen/arch/riscv/cpufeature.c > index b846a106a3..02b68aeaa4 100644 > --- a/xen/arch/riscv/cpufeature.c > +++ b/xen/arch/riscv/cpufeature.c > @@ -138,6 +138,7 @@ const struct riscv_isa_ext_data __initconst riscv_isa_ext[] = { > RISCV_ISA_EXT_DATA(zbs), > RISCV_ISA_EXT_DATA(smaia), > RISCV_ISA_EXT_DATA(ssaia), > + RISCV_ISA_EXT_DATA(svade), > RISCV_ISA_EXT_DATA(svpbmt), > }; > > diff --git a/xen/arch/riscv/include/asm/cpufeature.h b/xen/arch/riscv/include/asm/cpufeature.h > index 768b84b769..5f756c76db 100644 > --- a/xen/arch/riscv/include/asm/cpufeature.h > +++ b/xen/arch/riscv/include/asm/cpufeature.h > @@ -37,6 +37,7 @@ enum riscv_isa_ext_id { > RISCV_ISA_EXT_zbs, > RISCV_ISA_EXT_smaia, > RISCV_ISA_EXT_ssaia, > + RISCV_ISA_EXT_svade, > RISCV_ISA_EXT_svpbmt, > RISCV_ISA_EXT_MAX > }; > diff --git a/xen/arch/riscv/include/asm/page.h b/xen/arch/riscv/include/asm/page.h > index 78e53981ac..4b6baeaaf2 100644 > --- a/xen/arch/riscv/include/asm/page.h > +++ b/xen/arch/riscv/include/asm/page.h > @@ -73,6 +73,14 @@ > #define PTE_SMALL BIT(10, UL) > #define PTE_POPULATE BIT(11, UL) > > +enum pbmt_type { > + pbmt_pma, > + pbmt_nc, > + pbmt_io, > + pbmt_rsvd, > + pbmt_count, > +}; > + > #define PTE_ACCESS_MASK (PTE_READABLE | PTE_WRITABLE | PTE_EXECUTABLE) > > #define PTE_PBMT_MASK (PTE_PBMT_NOCACHE | PTE_PBMT_IO) > diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c > index 71b211410b..f4658e2560 100644 > --- a/xen/arch/riscv/p2m.c > +++ b/xen/arch/riscv/p2m.c > @@ -11,6 +11,7 @@ > #include > #include > > +#include > #include > #include > #include > @@ -349,6 +350,18 @@ static pte_t *p2m_get_root_pointer(struct p2m_domain *p2m, gfn_t gfn) > return __map_domain_page(p2m->root + root_table_indx); > } > > +static int p2m_set_type(pte_t *pte, p2m_type_t t) > +{ > + int rc = 0; > + > + if ( t > p2m_first_external ) > + panic("unimplemeted\n"); > + else > + pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK); > + > + return rc; > +} > + > static p2m_type_t p2m_get_type(const pte_t pte) > { > p2m_type_t type = MASK_EXTR(pte.pte, P2M_TYPE_PTE_BITS_MASK); > @@ -379,11 +392,102 @@ static inline void p2m_clean_pte(pte_t *p, bool clean_pte) > p2m_write_pte(p, pte, clean_pte); > } > > -static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t) > +static void p2m_set_permission(pte_t *e, p2m_type_t t) > { > - panic("%s: hasn't been implemented yet\n", __func__); > + e->pte &= ~PTE_ACCESS_MASK; > + > + e->pte |= PTE_USER; > + > + /* > + * Two schemes to manage the A and D bits are defined: > + * • The Svade extension: when a virtual page is accessed and the A bit > + * is clear, or is written and the D bit is clear, a page-fault > + * exception is raised. > + * • When the Svade extension is not implemented, the following scheme > + * applies. > + * When a virtual page is accessed and the A bit is clear, the PTE is > + * updated to set the A bit. When the virtual page is written and the > + * D bit is clear, the PTE is updated to set the D bit. When G-stage > + * address translation is in use and is not Bare, the G-stage virtual > + * pages may be accessed or written by implicit accesses to VS-level > + * memory management data structures, such as page tables. Can you point me at the part of the spec where this behavior is described? If things indeed work like this, ... > + * Thereby to avoid a page-fault in case of Svade is available, it is > + * necesssary to set A and D bits. ... I'd then agree with the "necessary" here. (Nit: note the extra 's' in your spelling.) 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Mon, 10 Nov 2025 08:25:13 -0800 (PST) Message-ID: <28920d5e-6672-41b5-8927-e24aedc7f694@suse.com> Date: Mon, 10 Nov 2025 17:25:15 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [for 4.22 v5 13/18] xen/riscv: implement p2m_next_level() To: Oleksii Kurochko Cc: Alistair Francis , Bob Eshleman , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 20.10.2025 17:57, Oleksii Kurochko wrote: > Implement the p2m_next_level() function, which enables traversal and dynamic > allocation of intermediate levels (if necessary) in the RISC-V > p2m (physical-to-machine) page table hierarchy. > > To support this, the following helpers are introduced: > - page_to_p2m_table(): Constructs non-leaf PTEs pointing to next-level page > tables with correct attributes. > - p2m_alloc_page(): Allocates page table pages, supporting both hardware and > guest domains. > - p2m_create_table(): Allocates and initializes a new page table page and > installs it into the hierarchy. > > Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich Just one further nit: > @@ -490,6 +503,33 @@ static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t, bool is_table) > return e; > } > > +/* Generate table entry with correct attributes. */ > +static pte_t page_to_p2m_table(const struct page_info *page) > +{ > + /* > + * p2m_invalid will be ignored inside p2m_pte_from_mfn() as is_table is > + * set to true and p2m_type_t shouldn't be applied for PTEs which > + * describe an intermidiate table. intermediate Jan From xen-devel-bounces@lists.xenproject.org Mon Nov 10 16:30:09 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 16:30:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158582.1486914 (Exim 4.92) (envelope-from ) id 1vIUmL-0005mL-Mo; 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b=cpR9gho3ItfdiZ8jHk8+nDjm8zXZ7eScI1mXisSTmGODaCYlaeab8w4Bh4D6zjRasnHAf3q86MwCgn63Yd3ZFXBIgvR8Lc3ipO6MVb+AeYAxnb+atIwWTeU0b8tv8yXWJEFGVhdLYFNDK/mmgDWKQO1aAF0g4W9MA9gzAqsa5dc= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com; Message-ID: <60d1d66e-83cd-47b5-9b94-0325f411ca72@citrix.com> Date: Mon, 10 Nov 2025 16:29:48 +0000 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] CHANGELOG.md: Update for 4.21 release cycle To: Oleksii Kurochko , xen-devel@lists.xenproject.org, Juergen Gross Cc: Community Manager , committers@xenproject.org References: <1930832802df980a6fe610233265bc238fcfaca4.1758901622.git.oleksii.kurochko@gmail.com> Content-Language: en-GB From: Andrew Cooper In-Reply-To: <1930832802df980a6fe610233265bc238fcfaca4.1758901622.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: LO2P265CA0282.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:a1::30) To DM4PR03MB7015.namprd03.prod.outlook.com (2603:10b6:8:42::8) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR03MB7015:EE_|SJ0PR03MB6390:EE_ X-MS-Office365-Filtering-Correlation-Id: 153a2f37-9b01-4771-f8b0-08de20765f9a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|366016|1800799024|7053199007; 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Debian Bullseye retired from CI for RISC-V due > to the baseline change. > - Linux based device model stubdomains are now fully supported. > + - Remove libxenctrl usage from xenstored. This is about libxenmange.  I think it wants to say: - Introduce libxenmanage as a stable library, replacing xenstored's dependency on unstable libraries.  Otherwise, LGTM. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon Nov 10 16:43:55 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 16:43:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158595.1486924 (Exim 4.92) (envelope-from ) id 1vIUzd-00084E-Nm; Mon, 10 Nov 2025 16:43:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158595.1486924; Mon, 10 Nov 2025 16:43:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIUzd-000847-KR; Mon, 10 Nov 2025 16:43:49 +0000 Received: by outflank-mailman (input) for mailman id 1158595; Mon, 10 Nov 2025 16:43:48 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIUzc-000841-Mk for xen-devel@lists.xenproject.org; Mon, 10 Nov 2025 16:43:48 +0000 Received: from mail-ej1-x62b.google.com (mail-ej1-x62b.google.com [2a00:1450:4864:20::62b]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 6d6a3fc3-be54-11f0-9d18-b5c5bf9af7f9; Mon, 10 Nov 2025 17:43:47 +0100 (CET) Received: by mail-ej1-x62b.google.com with SMTP id a640c23a62f3a-b72b495aa81so365533866b.2 for ; Mon, 10 Nov 2025 08:43:47 -0800 (PST) Received: from [192.168.1.6] (user-109-243-71-38.play-internet.pl. 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Debian Bullseye retired from CI for RISC-V due >> to the baseline change. >> - Linux based device model stubdomains are now fully supported. >> + - Remove libxenctrl usage from xenstored. > This is about libxenmange.  I think it wants to say: > > - Introduce libxenmanage as a stable library, replacing xenstored's > dependency on unstable libraries. > > Otherwise, LGTM. It is much better, I’ll be glad if this update can be done during the commit. Thanks! ~ Oleksii --------------D0bQwLXqUnPjcg6bY6Yul0lb Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: 8bit


On 11/10/25 5:29 PM, Andrew Cooper wrote:
On 26/09/2025 4:47 pm, Oleksii Kurochko wrote:

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
Chnages in v2:
- Drop the following items:
  - Allow to unflatten DTs.
  - Basic kexec support to Mini-OS for running in PVH mode.
---
 CHANGELOG.md | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index ca1b43b940..0afd2eeb4b 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -14,6 +14,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
  - Debian Trixie added to CI.  Debian Bullseye retired from CI for RISC-V due
    to the baseline change.
  - Linux based device model stubdomains are now fully supported.
+ - Remove libxenctrl usage from xenstored.

This is about libxenmange.  I think it wants to say:

- Introduce libxenmanage as a stable library, replacing xenstored's
dependency on unstable libraries. 


Otherwise, LGTM.
It is much better, I’ll be glad if this update can be done during the commit.

Thanks!
~ Oleksii

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That will have to wait for 4.22. --- CHANGELOG.md | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index fc4f6d7c8a09..080305ef456f 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -53,6 +53,11 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) - Support of qemu-traditional has been removed. + - The in-tree oxenstored is deprecated and will be removed in a future + version of Xen. It is moving into the Xapi project + https://github.com/xapi-project/oxenstored so it can be maintained in line + with the other Ocaml projects in the Xen ecosystem. + ## [4.20.0](https://xenbits.xenproject.org/gitweb/?p=xen.git;a=shortlog;h=RELEASE-4.20.0) - 2025-03-05 ### Changed base-commit: 343e01fd1d31dc6867473599c2c49039386bdf79 -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Mon Nov 10 16:46:51 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 16:46:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158621.1486943 (Exim 4.92) (envelope-from ) id 1vIV2Y-0000lY-Er; Mon, 10 Nov 2025 16:46:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158621.1486943; Mon, 10 Nov 2025 16:46:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIV2Y-0000lR-C6; Mon, 10 Nov 2025 16:46:50 +0000 Received: by outflank-mailman (input) for mailman id 1158621; Mon, 10 Nov 2025 16:46:49 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIV2X-0000lL-L1 for xen-devel@lists.xenproject.org; Mon, 10 Nov 2025 16:46:49 +0000 Received: from mail-ej1-x635.google.com (mail-ej1-x635.google.com [2a00:1450:4864:20::635]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id d84f21b6-be54-11f0-980a-7dc792cee155; Mon, 10 Nov 2025 17:46:46 +0100 (CET) Received: by mail-ej1-x635.google.com with SMTP id a640c23a62f3a-b725ead5800so428154166b.1 for ; Mon, 10 Nov 2025 08:46:46 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 10 Nov 2025 08:46:45 -0800 (PST) Message-ID: Date: Mon, 10 Nov 2025 17:46:47 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [for 4.22 v5 17/18] xen/riscv: add support of page lookup by GFN To: Oleksii Kurochko Cc: Alistair Francis , Bob Eshleman , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <3eea04894401202666ea0bb7ee1240a23ba54d8a.1760974017.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <3eea04894401202666ea0bb7ee1240a23ba54d8a.1760974017.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 20.10.2025 17:58, Oleksii Kurochko wrote: > --- a/xen/arch/riscv/p2m.c > +++ b/xen/arch/riscv/p2m.c > @@ -1049,3 +1049,178 @@ int map_regions_p2mt(struct domain *d, > > return rc; > } > + > +/* > + * p2m_get_entry() should always return the correct order value, even if an > + * entry is not present (i.e. the GFN is outside the range): > + * [p2m->lowest_mapped_gfn, p2m->max_mapped_gfn]). (1) There's one closing parenthesis too many here (likely the one before the colon). > + * This ensures that callers of p2m_get_entry() can determine what range of > + * address space would be altered by a corresponding p2m_set_entry(). > + * Also, it would help to avoid cost page walks for GFNs outside range (1). DYM "costly"? > + * Therefore, this function returns true for GFNs outside range (1), and in > + * that case the corresponding level is returned via the level_out argument. > + * Otherwise, it returns false and p2m_get_entry() performs a page walk to > + * find the proper entry. > + */ > +static bool check_outside_boundary(gfn_t gfn, gfn_t boundary, bool is_lower, > + unsigned int *level_out) > +{ > + unsigned int level; > + > + if ( is_lower ? gfn_x(gfn) < gfn_x(boundary) > + : gfn_x(gfn) > gfn_x(boundary) ) > + { > + unsigned long mask = 0; > + > + for ( level = P2M_ROOT_LEVEL; level; level-- ) > + { > + unsigned long masked_gfn; > + > + mask |= PFN_DOWN(P2M_LEVEL_MASK(level)); > + masked_gfn = gfn_x(gfn) & mask; > + > + if ( is_lower ? masked_gfn < gfn_x(boundary) > + : masked_gfn > gfn_x(boundary) ) > + { > + *level_out = level; For this to be correct in the is_lower case, don't you need to fill the bottom bits of masked_gfn with all 1s, rather than with all 0s? Otherwise the tail of the range may be above boundary. > +struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn, > + p2m_type_t *t) > +{ > + struct page_info *page; > + p2m_type_t p2mt = p2m_invalid; > + mfn_t mfn; > + > + p2m_read_lock(p2m); > + mfn = p2m_get_entry(p2m, gfn, t, NULL); > + > + if ( !mfn_valid(mfn) ) > + { > + p2m_read_unlock(p2m); > + return NULL; > + } > + > + if ( t ) > + p2mt = *t; Doesn't it need to be the other way around? The way you have it, when a caller passes NULL for t, p2m_get_entry() won't give you a type, and you'll do all further work with p2m_invalid. Also, might this better move ahead of the earlier if()? Callers might be able to do still something based on the type, when they get back NULL as function return value. (Practically this might only become of interest once you add something like PoD, paging, or sharing.) Jan From xen-devel-bounces@lists.xenproject.org Mon Nov 10 16:48:35 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 16:48:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158631.1486954 (Exim 4.92) (envelope-from ) id 1vIV4E-0001Hp-QD; Mon, 10 Nov 2025 16:48:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158631.1486954; Mon, 10 Nov 2025 16:48:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIV4E-0001Hi-MH; Mon, 10 Nov 2025 16:48:34 +0000 Received: by outflank-mailman (input) for mailman id 1158631; Mon, 10 Nov 2025 16:48:34 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIV4D-0001Hc-V4 for xen-devel@lists.xenproject.org; Mon, 10 Nov 2025 16:48:33 +0000 Received: from mail-ej1-x635.google.com (mail-ej1-x635.google.com [2a00:1450:4864:20::635]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 17ae2014-be55-11f0-9d18-b5c5bf9af7f9; Mon, 10 Nov 2025 17:48:32 +0100 (CET) Received: by mail-ej1-x635.google.com with SMTP id a640c23a62f3a-b731b176b5eso37073366b.1 for ; Mon, 10 Nov 2025 08:48:32 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 10 Nov 2025 08:48:32 -0800 (PST) Message-ID: <06fcbcc3-0c21-4d33-b02a-059f70823235@suse.com> Date: Mon, 10 Nov 2025 17:48:33 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] CHANGELOG: Note about oxenstored being deprecated To: Andrew Cooper Cc: Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Christian Lindig , David Scott , =?UTF-8?B?RWR3aW4gVMO2csO2aw==?= , Rob Hoes , Pau Ruiz Safont , Andrii Sultanov , Oleksii Kurochko , Xen-devel References: <20251110164427.54299-1-andrew.cooper3@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251110164427.54299-1-andrew.cooper3@citrix.com> Content-Type: text/plain; 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Debian Bullseye retired from CI for RISC-V due >>> to the baseline change. >>> - Linux based device model stubdomains are now fully supported. >>> + - Remove libxenctrl usage from xenstored. >> This is about libxenmange.  I think it wants to say: >> >> - Introduce libxenmanage as a stable library, replacing xenstored's >> dependency on unstable libraries.  >> Otherwise, LGTM. > It is much better, I’ll be glad if this update can be done during the commit. Will do. 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That will > have to wait for 4.22. It would be nice to introduce "--with-system-oxenstored=", but, at the moment, I can agree that it is enough to announce that oxenstored is deprecated and will be removed in a future version of Xen: Release-Acked-By: Oleksii Kurochko Thanks. ~ Oleksii > --- > CHANGELOG.md | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/CHANGELOG.md b/CHANGELOG.md > index fc4f6d7c8a09..080305ef456f 100644 > --- a/CHANGELOG.md > +++ b/CHANGELOG.md > @@ -53,6 +53,11 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) > > - Support of qemu-traditional has been removed. > > + - The in-tree oxenstored is deprecated and will be removed in a future > + version of Xen. It is moving into the Xapi project > +https://github.com/xapi-project/oxenstored so it can be maintained in line > + with the other Ocaml projects in the Xen ecosystem. > + > ## [4.20.0](https://xenbits.xenproject.org/gitweb/?p=xen.git;a=shortlog;h=RELEASE-4.20.0) - 2025-03-05 > > ### Changed > > base-commit: 343e01fd1d31dc6867473599c2c49039386bdf79 --------------oe5d8GbDWJ2guFaWTtG6z0U0 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: 8bit


On 11/10/25 5:44 PM, Andrew Cooper wrote:
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Anthony PERARD <anthony.perard@vates.tech>
CC: Michal Orzel <michal.orzel@amd.com>
CC: Jan Beulich <jbeulich@suse.com>
CC: Julien Grall <julien@xen.org>
CC: Roger Pau Monné <roger.pau@citrix.com>
CC: Stefano Stabellini <sstabellini@kernel.org>
CC: Christian Lindig <christian.lindig@citrix.com>
CC: David Scott <dave@recoil.org>
CC: Edwin Török <edwin.torok@cloud.com>
CC: Rob Hoes <Rob.Hoes@citrix.com>
CC: Pau Ruiz Safont <pau.safont@vates.tech>
CC: Andrii Sultanov <andriy.sultanov@vates.tech>
CC: Oleksii Kurochko <oleksii.kurochko@gmail.com>

I'd like to add a --with-system-oxenstored= but I don't have time.  That will
have to wait for 4.22.
It would be nice to introduce "--with-system-oxenstored=", but, at the moment,
I can agree that it is enough to announce that oxenstored is deprecated and
will be removed in a future version of Xen:
 Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>

Thanks.

~ Oleksii
---
 CHANGELOG.md | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index fc4f6d7c8a09..080305ef456f 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -53,6 +53,11 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
 
  - Support of qemu-traditional has been removed.
 
+ - The in-tree oxenstored is deprecated and will be removed in a future
+   version of Xen.  It is moving into the Xapi project
+   https://github.com/xapi-project/oxenstored so it can be maintained in line
+   with the other Ocaml projects in the Xen ecosystem.
+
 ## [4.20.0](https://xenbits.xenproject.org/gitweb/?p=xen.git;a=shortlog;h=RELEASE-4.20.0) - 2025-03-05
 
 ### Changed

base-commit: 343e01fd1d31dc6867473599c2c49039386bdf79
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To: Julien Grall Cc: Andrew Cooper , xen-devel@lists.xenproject.org, Volodymyr Babchuk , Wentao Zhang Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Tue, Nov 4, 2025 at 5:35=E2=80=AFAM Julien Grall wrote: > > Le mar. 4 nov. 2025 =C3=A0 10:44, Julien Grall a =C3=A9c= rit : > > Happy to review any patches for clang support on Arm. > > I was told privately that there is a series on the ML to add support > for Clang (see [1]). It looks like there series > had some reviews but needs a new version. Adding Volodymyr as the > original author. > > [1] https://lore.kernel.org/all/20241129014850.2852844-1-volodymyr_babchu= k@epam.com/ > Thanks for the pointer. We have tested this patch from our side and it already solved our problems (specifically patch 1, 4 and 5). Shall we resubmit this patch again or follow up on the original thread? Also regarding the comment [1] shall we explore alternative fixes? [1] https://lore.kernel.org/all/1d1684b2-ed0e-47cb-ab78-72cd2f51aafc@suse.c= om/ Thanks, Saman > > > > Cheers, > > > > -- > > Julien Grall > > From xen-devel-bounces@lists.xenproject.org Mon Nov 10 21:26:34 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 21:26:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158721.1487150 (Exim 4.92) (envelope-from ) id 1vIZPB-0003N5-9O; Mon, 10 Nov 2025 21:26:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158721.1487150; Mon, 10 Nov 2025 21:26:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIZPB-0003My-6I; Mon, 10 Nov 2025 21:26:29 +0000 Received: by outflank-mailman (input) for mailman id 1158721; Mon, 10 Nov 2025 21:26:28 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIZPA-0003Ms-M6 for xen-devel@lists.xenproject.org; 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Mon, 10 Nov 2025 13:26:18 -0800 (PST) MIME-Version: 1.0 References: <06646f747f21c3f388cf6e9d59a20238a4a91170.1761263588.git.samaan.dehghan@gmail.com> <6f708273afb6de9c5f26f2c71c34c98e957904a0.1761599320.git.samaan.dehghan@gmail.com> In-Reply-To: From: Saman Dehghan Date: Mon, 10 Nov 2025 15:26:08 -0600 X-Gm-Features: AWmQ_blOkyT29G0mOoKssCVTl3j7y9IRCwrMJYfSj_mnCFBBSndXZ0PYGBNd1YY Message-ID: Subject: Re: [PATCH v4] xen: Support LLVM raw profile versions 5, 6, 7, 8, 9, and 10 To: Jan Beulich Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Wentao Zhang , Matthew L Weber , Oleksii Kurochko , Andrew Cooper , xen-devel@lists.xenproject.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, Nov 10, 2025 at 8:03=E2=80=AFAM Jan Beulich wro= te: > > On 27.10.2025 23:36, Andrew Cooper wrote: > > On 27/10/2025 9:30 pm, Saman Dehghan wrote: > >> This change enables compatibility for measuring code coverage > >> with Clang versions 11 through 20 by supporting their respective raw > >> profile formats. > >> > >> 1- Added support for LLVM raw profile versions 5, 6, 7, 8, 9, and 10. > >> 2- Initialized llvm_profile_header for all versions based on llvm sour= ce > >> code in compiler-rt/include/profile/InstrProfData.inc for each vers= ion. > >> 3- We tested this patch for all Clang versions from 11 through 20 > >> on x86 platform. > >> 4- Fixed linking warnings related to LLVM profile sections in x86. > >> > >> > >> Signed-off-by: Saman Dehghan > >> Release-Acked-By: Oleksii Kurochko > >> Tested-by: Wentao Zhang > >> Acked-by: Andrew Cooper > >> --- > >> Changes from v3 to v4: > >> 1- Use LLVM_PROFILE_VERSION in preprocessor conditionals > >> instead of __clang_major__. > >> 2- Use DIV_ROUND_UP helper. > >> 3- Remove unnecessary zero initialization inside struct. > >> 4- Remove fallback macro definitions in linker script. > >> Changes from v2 to v3: > >> 1- Additionally support raw profile version 5, 6, 7 in clang 11, 12,= 13. > >> 2- Fix coverage related linking warnings in x86. > >> 3- Revert unnecessary type changes, casting, etc. > >> --- > > > > Excellent. Thankyou. This all looks in order. I've committed it. > > I thought I would backport this, but I would need a variant that wouldn't > regress profile version 4 on the older branches Thanks Jan for offering to backport this. Which target branches do you have in your mind? > regress profile version 4 on the older branches Do you mean some of these branches are still using clang < 11 so that we need to adapt our patch accordingly? Let me know how we can help. Thanks Saman > > Jan From xen-devel-bounces@lists.xenproject.org Mon Nov 10 23:02:47 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 10 Nov 2025 23:02:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158736.1487167 (Exim 4.92) (envelope-from ) id 1vIau6-0006vc-W5; Mon, 10 Nov 2025 23:02:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158736.1487167; Mon, 10 Nov 2025 23:02:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIau6-0006vV-TQ; Mon, 10 Nov 2025 23:02:30 +0000 Received: by outflank-mailman (input) for mailman id 1158736; Mon, 10 Nov 2025 23:02:29 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIau5-0006vP-HU for xen-devel@lists.xenproject.org; Mon, 10 Nov 2025 23:02:29 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1vIau4-000Gln-31; Mon, 10 Nov 2025 23:02:28 +0000 Received: from [2a02:8012:3a1:0:7c23:6ba:10ba:c44c] by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.96) (envelope-from ) id 1vIau4-001hT3-1s; Mon, 10 Nov 2025 23:02:28 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:Content-Type:In-Reply-To:From: References:Cc:To:Subject:MIME-Version:Date:Message-ID; bh=0xwmyzEEGDSQClUJUJsvvMbHRf2FWr64X4lXqjn9IQg=; b=JkajC3ezAx++GkOQcfgjWEjWzW p4FE87yqw+z+Ni0/R5dkQz8zL75k6WzoCntRl1Ul3i0Z+GXLNC3GTDNxqmO0dyJvwZO7lWk+jF089 IRGuO9BRSAiyjfjzFvzFz4e321xtfyP5/kK8y+PWQJdJfDTwUj6+dl4AUo9JOKtPDrHo=; Message-ID: <241eaaf3-069c-4dc8-8161-45a9563dbc77@xen.org> Date: Mon, 10 Nov 2025 23:02:26 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v13 01/12] xen/common: add cache coloring common code Content-Language: en-GB To: Mykola Kvach , Carlo Nonato , xen-devel@lists.xenproject.org Cc: andrea.bastoni@minervasys.tech, marco.solieri@minervasys.tech, Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini References: <20241217170637.233097-1-carlo.nonato@minervasys.tech> <20241217170637.233097-2-carlo.nonato@minervasys.tech> <0b5f19ea-6e33-4658-a165-f0af1cffbd03@gmail.com> From: Julien Grall In-Reply-To: <0b5f19ea-6e33-4658-a165-f0af1cffbd03@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Hi Mykola, On 07/11/2025 08:27, Mykola Kvach wrote: >> +void __init llc_coloring_init(void) >> +{ >> +    unsigned int way_size; >> + >> +    llc_coloring_enabled = (opt_llc_coloring >= 1); >> +    if ( (opt_llc_coloring != 0) && llc_size && llc_nr_ways ) >> +    { >> +        llc_coloring_enabled = true; >> +        way_size = llc_size / llc_nr_ways; >> +    } >> +    else if ( !llc_coloring_enabled ) >> +        return; >> +    else >> +    { >> +        way_size = get_llc_way_size(); >> +        if ( !way_size ) >> +            panic("LLC probing failed and 'llc-size' or 'llc-nr-ways' >> missing\n"); > > As far as I can see, this error means that we did not detect a suitable > LLC/unified cache. > Maybe it would be better to make that explicit in the panic message. I am rather confused why there are reviews on the series that was merged nearly a year ago. If you have comments that needs to be addressed, then it would be best to either send a new series or start a new thread (if there are bugs which needs discussion). Cheers, -- Julien Grall From xen-devel-bounces@lists.xenproject.org Tue Nov 11 05:41:01 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 05:41:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158750.1487178 (Exim 4.92) (envelope-from ) id 1vIh7V-0001Ta-Gg; Tue, 11 Nov 2025 05:40:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158750.1487178; Tue, 11 Nov 2025 05:40:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIh7V-0001TT-Dx; Tue, 11 Nov 2025 05:40:45 +0000 Received: by outflank-mailman (input) for mailman id 1158750; Tue, 11 Nov 2025 05:40:44 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIh7U-0001TN-3s for xen-devel@lists.xenproject.org; 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RCVD_COUNT_TWO(0.00)[2]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; SPAMHAUS_XBL(0.00)[2a07:de40:b281:104:10:150:64:97:from]; MID_RHS_MATCH_FROM(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; TAGGED_RCPT(0.00)[]; HAS_ATTACHMENT(0.00)[]; DKIM_TRACE(0.00)[suse.com:+]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:helo,imap1.dmz-prg2.suse.org:rdns] X-Rspamd-Action: no action X-Spam-Flag: NO X-Spam-Score: -4.91 X-Spam-Level: This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------ZQG8HmEisg0kZZe18hzBrThb Content-Type: multipart/mixed; boundary="------------VNcoahBNNhpFyyVINew9Fv0Y"; protected-headers="v1" From: Juergen Gross To: Andrew Cooper , Xen-devel Cc: Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Christian Lindig , David Scott , =?UTF-8?B?RWR3aW4gVMO2csO2aw==?= , Rob Hoes , Pau Ruiz Safont , Andrii Sultanov , Oleksii Kurochko Message-ID: <1edf3212-14a1-4525-91b2-967fd4d736e9@suse.com> Subject: Re: [PATCH] CHANGELOG: Note about oxenstored being deprecated References: <20251110164427.54299-1-andrew.cooper3@citrix.com> In-Reply-To: <20251110164427.54299-1-andrew.cooper3@citrix.com> Autocrypt-Gossip: addr=jbeulich@suse.com; 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name="OpenPGP_signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="OpenPGP_signature.asc" -----BEGIN PGP SIGNATURE----- wsB5BAABCAAjFiEEhRJncuj2BJSl0Jf3sN6d1ii/Ey8FAmkSzFIFAwAAAAAACgkQsN6d1ii/Ey+c Hwf/Rq5nn7JNNDjbuzp1UbL6A51+3H2f7+qBreDFHuPgBemJnX+/ROtQdCRJcyiKXv88Z9whmyq3 NyGuYStQSkEqu0IZXrDfKSnq18FX2dfe6YHf6fwhCzQpUTjid+vYpeeJC/InrrwEuA/r0foQ+uyl 1pv2IWVmTDEwAtoNudZCDIDvVfN3AykOTzrssKUXY7iWhU877qicBG6cNd3XrFB2ZNV8biu+CcbO b8emu8OtHhTmrsvXgE29gfNaIWZZiBJJEoJrRsXC/cYyqMjg5Vl3l6I/Tbz9UH5MGFBF2IUiEKdL jRLXd3lWvGRNNkZfdeAlcZ5UBqwdT5ZxDbPYFa2pxw== =oftM -----END PGP SIGNATURE----- --------------ZQG8HmEisg0kZZe18hzBrThb-- From xen-devel-bounces@lists.xenproject.org Tue Nov 11 07:08:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 07:08:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158767.1487188 (Exim 4.92) (envelope-from ) id 1vIiU8-0002jU-FO; Tue, 11 Nov 2025 07:08:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158767.1487188; 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Mon, 10 Nov 2025 23:57:09 -0800 (PST) Message-ID: Date: Tue, 11 Nov 2025 08:57:10 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4] xen: Support LLVM raw profile versions 5, 6, 7, 8, 9, and 10 To: Saman Dehghan Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Wentao Zhang , Matthew L Weber , Oleksii Kurochko , Andrew Cooper , xen-devel@lists.xenproject.org References: <06646f747f21c3f388cf6e9d59a20238a4a91170.1761263588.git.samaan.dehghan@gmail.com> <6f708273afb6de9c5f26f2c71c34c98e957904a0.1761599320.git.samaan.dehghan@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 10.11.2025 22:26, Saman Dehghan wrote: > On Mon, Nov 10, 2025 at 8:03 AM Jan Beulich wrote: >> >> On 27.10.2025 23:36, Andrew Cooper wrote: >>> On 27/10/2025 9:30 pm, Saman Dehghan wrote: >>>> This change enables compatibility for measuring code coverage >>>> with Clang versions 11 through 20 by supporting their respective raw >>>> profile formats. >>>> >>>> 1- Added support for LLVM raw profile versions 5, 6, 7, 8, 9, and 10. >>>> 2- Initialized llvm_profile_header for all versions based on llvm source >>>> code in compiler-rt/include/profile/InstrProfData.inc for each version. >>>> 3- We tested this patch for all Clang versions from 11 through 20 >>>> on x86 platform. >>>> 4- Fixed linking warnings related to LLVM profile sections in x86. >>>> >>>> >>>> Signed-off-by: Saman Dehghan >>>> Release-Acked-By: Oleksii Kurochko >>>> Tested-by: Wentao Zhang >>>> Acked-by: Andrew Cooper >>>> --- >>>> Changes from v3 to v4: >>>> 1- Use LLVM_PROFILE_VERSION in preprocessor conditionals >>>> instead of __clang_major__. >>>> 2- Use DIV_ROUND_UP helper. >>>> 3- Remove unnecessary zero initialization inside struct. >>>> 4- Remove fallback macro definitions in linker script. >>>> Changes from v2 to v3: >>>> 1- Additionally support raw profile version 5, 6, 7 in clang 11, 12, 13. >>>> 2- Fix coverage related linking warnings in x86. >>>> 3- Revert unnecessary type changes, casting, etc. >>>> --- >>> >>> Excellent. Thankyou. This all looks in order. I've committed it. >> >> I thought I would backport this, but I would need a variant that wouldn't >> regress profile version 4 on the older branches > > Thanks Jan for offering to backport this. Which target branches do you > have in your mind? The two ones in general maintenance, 4.20 and 4.19. I expect a single patch will do, i.e. will apply to both equally. >> regress profile version 4 on the older branches > > Do you mean some of these branches are still using clang < 11 so that > we need to adapt our patch accordingly? Let me know how we can help. Well, the introduction of 11 as the baseline requirement did happen in the 4.21 dev cycle. Prior to that, 3.5 was the baseline. As we only had support for profile version 4 (Clang 3.9 onwards as it looks), only that version would need covering. Of course, if other versions could be easily supported, that might be fine as well. Yet this isn't a requirement at all. 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Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org Subject: Re: [PATCH v4 06/12] mm: introduce generic lazy_mmu helpers Message-ID: <92eca53f-eb5d-4bd0-ad6c-56c65fdcea86-agordeev@linux.ibm.com> References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-7-kevin.brodsky@arm.com> <71418b31-aedb-4600-9558-842515dd6c44@arm.com> <645178fd-df4e-42fe-b55e-97d9506499be@arm.com> <413b2c49-f124-4cda-8fea-a6cc165f6326-agordeev@linux.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 6zTX9ZOrNUJdIPkZTpOF6inwbKLmfWMW X-Proofpoint-ORIG-GUID: LChZoM8zrhHNbPBL-El76cxb9g1AeKQe X-Authority-Analysis: v=2.4 cv=VMPQXtPX c=1 sm=1 tr=0 ts=6912ed78 cx=c_pps a=3Bg1Hr4SwmMryq2xdFQyZA==:117 a=3Bg1Hr4SwmMryq2xdFQyZA==:17 a=8nJEP1OIZ-IA:10 a=6UeiqGixMTsA:10 a=VkNPw1HP01LnGYTKEx00:22 a=VwQbUJbxAAAA:8 a=VnNF1IyMAAAA:8 a=7CQSdrXTAAAA:8 a=RmnHjvQuIkE0_jnVAnoA:9 a=3ZKOabzyN94A:10 a=wPNLvfGTeEIA:10 a=a-qgeE7W1pNrGK8U0ZQC:22 a=DXsff8QfwkrTrK3sU8N1:22 a=Z5ABNNGmrOfJ6cZ5bIyy:22 a=bWyr8ysk75zN3GCy5bjg:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTA4MDAyMiBTYWx0ZWRfXyGhka9ktVQcp NtumBxw6X433jOZ6hxU7cflzh+FFuYKWWKnULzVPcUOjZXQmkTAqOCdXlHIsHv1lpUX47VickOd +ymisGDp/K22Lqycx3j2XXMo0XpqaRXvqkKxvBKvJKxPXuUfuzt3AXkbSqNOdA4ImI9C+Xq1kxt TEOnl7KKGrGzBnDhvUHkdpLWQe2Lh5ecd2l9m9sQhLcN/N7oBhjXJoRqt609HdHHCQ8kIUpq28s Sh00eZmpM+PD2+npNB09KeaWuLe3d4wgMIavWSzMSuvE62y1vEOzjS8GZEWtbBR0nfeizZ8kPEd goqFEPPBTD0yzYfjqEub6US2xXlbVyhasXpHCLWJWgCsNJJetNjX1OgXN6mLcI9N0yKOs9EGAVS 77b7qIhDEPM4ZI6Q7fzDt9a5okKZvQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-11_01,2025-11-11_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 priorityscore=1501 lowpriorityscore=0 bulkscore=0 clxscore=1015 phishscore=0 spamscore=0 malwarescore=0 adultscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510240000 definitions=main-2511080022 On Mon, Nov 10, 2025 at 09:19:40AM +0000, Ryan Roberts wrote: > On 10/11/2025 08:11, Alexander Gordeev wrote: > > On Fri, Nov 07, 2025 at 03:22:54PM +0000, Ryan Roberts wrote: > > > > Hi Ryan, > > > >> On 07/11/2025 14:34, David Hildenbrand (Red Hat) wrote: > >>>>>   #ifndef pte_batch_hint > >>>>> diff --git a/mm/kasan/shadow.c b/mm/kasan/shadow.c > >>>>> index 5d2a876035d6..c49b029d3593 100644 > >>>>> --- a/mm/kasan/shadow.c > >>>>> +++ b/mm/kasan/shadow.c > >>>>> @@ -305,7 +305,7 @@ static int kasan_populate_vmalloc_pte(pte_t *ptep, > >>>>> unsigned long addr, > >>>>>       pte_t pte; > >>>>>       int index; > >>>>>   -    arch_leave_lazy_mmu_mode(); > >>>>> +    lazy_mmu_mode_pause(); > >>>> > >>>> I wonder if there really are use cases that *require* pause/resume? I think > >>>> these kasan cases could be correctly implemented using a new nest level instead? > >>>> Are there cases where the effects really need to be immediate or do the effects > >>>> just need to be visible when you get to where the resume is? > >>>> > >>>> If the latter, that could just be turned into a nested disable (e.g. a flush). > >>>> In this case, there is only 1 PTE write so no benefit, but I wonder if other > >>>> cases may have more PTE writes that could then still be batched. It would be > >>>> nice to simplify the API by removing pause/resume if we can? > >>> > >>> It has clear semantics, clearer than some nest-disable IMHO. > >>> > >>> Maybe you can elaborate how you would change ("simplify") the API in that > >>> regard? What would the API look like? > >> > >> By simplify, I just meant can we remove lazy_mmu_mode_pause() and > >> lazy_mmu_mode_resume() ? > >> > >> > >> We currently have: > >> > >> apply_to_page_range > >> lazy_mmu_mode_enable() > >> kasan_populate_vmalloc_pte() > >> lazy_mmu_mode_pause() > >> > >> lazy_mmu_mode_resume() > >> lazy_mmu_mode_disable() > >> > >> Where is setting ptes. But if doesn't need the effects to be > >> visible until lazy_mmu_mode_resume(), then you could replace the block with: > >> > >> apply_to_page_range > >> lazy_mmu_mode_enable() > >> kasan_populate_vmalloc_pte() > >> lazy_mmu_mode_enable() > >> > >> lazy_mmu_mode_disable() > >> lazy_mmu_mode_disable() > >> > >> However, looking at this more closely, I'm not really clear on why we need *any* > >> special attention to lazy mmu inside of kasan_populate_vmalloc_pte() and > >> kasan_depopulate_vmalloc_pte(). > >> > >> I *think* that the original concern was that we were doing ptep_get(ptep) inside > >> of a lazy_mmu block? So we need to flush so that the getter returns the most > >> recent value? But given we have never written to that particular ptep while in > >> the lazy mmu block, there is surely no hazard in the first place? > > > > There is, please see: > > https://lore.kernel.org/linux-mm/cover.1755528662.git.agordeev@linux.ibm.com/ > > I've stared at this for a while, but I'm afraid I still don't see the problem. > This all looks safe to me. Could you explain exactly what this issue is? > > If I've understood correctly, kasan_populate_vmalloc() is called during virtual > range allocation by vmalloc. This is not in a nested lazy mmu block (but it > wouldn't matter if it was once we have Kevin's nested changes to ensure flush > when exiting the nested scope). kasan_populate_vmalloc() calls > apply_to_page_range(), which will walk the set of ptes, calling > kasan_populate_vmalloc_pte() for each one. kasan_populate_vmalloc_pte() does a > ptep_get() then, if none, calls set_pte_at(). > > That's not a hazard since you're calling get before the set and you only visit > each pte once for the apply_to_page_range() lazy mmu block. I have to admit I do not remember every detail and would have to recreate the issue - which is specific to s390 lazy_mmu implementation I think. Both kasan_populate_vmalloc_pte() and kasan_depopulate_vmalloc_pte() do: apply_to_page_range() { arch_enter_lazy_mmu_mode(); kasan_de|populate_vmalloc_pte() { arch_leave_lazy_mmu_mode(); <--- remove? spin_lock(&init_mm.page_table_lock); spin_unlock(&init_mm.page_table_lock); <--- PTE store should be done arch_enter_lazy_mmu_mode(); <--- remove? } arch_leave_lazy_mmu_mode(); } Upon return from spin_unlock() both kasan callbacks expect the PTE contains an updated value to be stored to pgtable. That is true unless we remove arch_leave|enter_lazy_mmu_mode() brackets. If we do the value is continued to be cached and only stored when the outer arch_leave_lazy_mmu_mode() is called. That results in a race between concurrent PTE updaters. > >> apply_to_existing_page_range() will only call kasan_depopulate_vmalloc_pte() > >> once per pte, right? So given we read the ptep before writing it, there should > >> be no hazard? If so we can remove pause/resume. > > > > Unfortunately, we rather not, please see: > > https://lore.kernel.org/linux-mm/d407a381-099b-4ec6-a20e-aeff4f3d750f@arm.com/ > > Sorry but I don't see anything relavent to my point in this mail. Perhaps there > is some s390-specific detail that I'm failing to understand? Sorry, with this message I meant the branch where it was discussed, I will try to C&P some excerpts and summarize it here. * lazy_mmu_mode_enable() This helper is parameter-free, assuming the MMU unit does not need any configuration other than turning it on/off. That is currently true, but (as I noted in my other mail) I am going to introduce a friend enable function that accepts parameters, creates an arch-specific state and uses it while the lazy mmu mode is active: static inline void arch_enter_lazy_mmu_mode_pte(struct mm_struct *mm, unsigned long addr, unsigned long end, pte_t *ptep) { ... } * lazy_mmu_mode_resume() -> arch_enter_lazy_mmu_mode() Conversely, this needs to be -> arch_resume_lazy_mmu_mode(). And it can not be arch_enter_lazy_mmu_mode(), since a lazy_mmu_mode_resume() caller does not know the parameters passed to the original lazy_mmu_mode_enable(...)- friend. > > Thanks, > Ryan Thanks! > > > > The problem is kasan code invokes apply_to_page_range(), which enters lazy_mmu > > mode unconditionally. I would claim that is rather an obstacle for the kasan > > code, not a benefit. But it needs to be tackled. > > > Should apply_to_page_range() had an option not to enter the lazy_mmu mode > > (e.g. an extra "bool skip_lazy" parameter) - the pause/resume could have > > been avoided. > > > >> Thanks, > >> Ryan > > > > Thanks! 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Smith" , "xen-devel@lists.xenproject.org" , Tamas K Lengyel References: <20251013101540.3502842-1-Penny.Zheng@amd.com> <20251013101540.3502842-10-Penny.Zheng@amd.com> <1a9ac91c-2295-4749-8807-668fcecf8f8e@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 11.11.2025 08:08, Penny, Zheng wrote: > [Public] > > Hi, > > Sorry for the late response. Just got back from long annual leaves > >> -----Original Message----- >>> --- a/xen/arch/x86/include/asm/mem_access.h >>> +++ b/xen/arch/x86/include/asm/mem_access.h >>> @@ -14,6 +14,7 @@ >>> #ifndef __ASM_X86_MEM_ACCESS_H__ >>> #define __ASM_X86_MEM_ACCESS_H__ >>> >>> +#ifdef CONFIG_VM_EVENT >>> /* >>> * Setup vm_event request based on the access (gla is -1ull if not available). >>> * Handles the rw2rx conversion. Boolean return value indicates if event type >>> @@ -25,6 +26,14 @@ >>> bool p2m_mem_access_check(paddr_t gpa, unsigned long gla, >>> struct npfec npfec, >>> struct vm_event_st **req_ptr); >>> +#else >>> +static inline bool p2m_mem_access_check(paddr_t gpa, unsigned long gla, >>> + struct npfec npfec, >>> + struct vm_event_st **req_ptr) >>> +{ >>> + return false; >> >> Leaving *req_ptr untouched feels dangerous; the fact that the sole caller has >> what it uses set to NULL up front is secondary. >> > > If we *req_ptr = NULL; compiler will not DCE the following code block when VM_EVENT=n: > ``` > if ( req_ptr ) > { > if ( monitor_traps(curr, sync, req_ptr) < 0 ) > rc = 0; > > xfree(req_ptr); > } > return rc; > ``` > Or am I misunderstanding what you suggest? First: It would have helped if you had also said where that code fragment actually was taken from. Seeing it's in hvm_hap_nested_page_fault(), I'm having trouble following why the compiler wouldn't be able to see that the local variable "req_ptr" there would never change value, i.e. remain NULL throughout its lifetime. If indeed there's a compiler shortcoming, that either wants working around or properly writing down. Jan From xen-devel-bounces@lists.xenproject.org Tue Nov 11 09:15:29 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 09:15:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158884.1487264 (Exim 4.92) (envelope-from ) id 1vIkT4-0003qQ-3a; Tue, 11 Nov 2025 09:15:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158884.1487264; Tue, 11 Nov 2025 09:15:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIkT4-0003qJ-00; Tue, 11 Nov 2025 09:15:14 +0000 Received: by outflank-mailman (input) for mailman id 1158884; Tue, 11 Nov 2025 09:15:12 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIkT2-0003qD-Nd for xen-devel@lists.xenproject.org; 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charset="iso-8859-1" Content-ID: <592564521841E641B3FAB89B3A2C4FDB@namprd03.prod.outlook.com> Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM6PR03MB3482.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9377688d-f08b-48ef-fce9-08de2102ce45 X-MS-Exchange-CrossTenant-originalarrivaltime: 11 Nov 2025 09:15:06.6990 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: /5j0csFDTWFOxCbXb0qFzgCkrbgOT5OObC8nizx3Gulfpc00e0av5xc2zu63OLw2RCp2TExZ75kting7OaWxpudeLWVmSv+Oq36tXGW922k= X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV8PR03MB7398 > On 10 Nov 2025, at 16:44, Andrew Cooper wrote= : >=20 >=20 > + - The in-tree oxenstored is deprecated and will be removed in a future > + version of Xen. It is moving into the Xapi project > + https://github.com/xapi-project/oxenstored so it can be maintained in= line > + with the other Ocaml projects in the Xen ecosystem. > + Acked-by: Christian Lindig From xen-devel-bounces@lists.xenproject.org Tue Nov 11 09:47:11 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 09:47:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158895.1487274 (Exim 4.92) (envelope-from ) id 1vIkxs-0007rb-FF; Tue, 11 Nov 2025 09:47:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158895.1487274; Tue, 11 Nov 2025 09:47:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIkxs-0007rU-Bz; Tue, 11 Nov 2025 09:47:04 +0000 Received: by outflank-mailman (input) for mailman id 1158895; Tue, 11 Nov 2025 09:47:02 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIkxq-0007rO-Me for xen-devel@lists.xenproject.org; Tue, 11 Nov 2025 09:47:02 +0000 Received: from BN1PR04CU002.outbound.protection.outlook.com (mail-eastus2azlp170100001.outbound.protection.outlook.com [2a01:111:f403:c110::1]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 56ba1575-bee3-11f0-9d18-b5c5bf9af7f9; Tue, 11 Nov 2025 10:46:48 +0100 (CET) Received: from DM4PR12MB8451.namprd12.prod.outlook.com (2603:10b6:8:182::7) by DS0PR12MB7725.namprd12.prod.outlook.com (2603:10b6:8:136::6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9320.15; Tue, 11 Nov 2025 09:46:43 +0000 Received: from DM4PR12MB8451.namprd12.prod.outlook.com ([fe80::b04e:2da5:7189:4c4d]) by DM4PR12MB8451.namprd12.prod.outlook.com ([fe80::b04e:2da5:7189:4c4d%3]) with mapi id 15.20.9298.015; Tue, 11 Nov 2025 09:46:41 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 56ba1575-bee3-11f0-9d18-b5c5bf9af7f9 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=e3EpDjn8pcqBXWk//0YKLeXllXih948U4MJNTlVUO2LyeKP3K8iNbM1CCzLAkrt2lU6lMnNV4SIEuZIqSWKips3oD86kVL1fsgpSyxZn87MspwthyVZ4NcIHd803KdOz5elz1D1AdVJjh0BMK4TPXwwEyLrohj78Ru1fOYFXdtRmFj5H34+pbVLBBKWDLtqpGWtA84PSdP7lethKKYj4kkG5kW6SqdGAcNk22lfvAh4CAbR9M07C+s9Z320Mp8U1NZ/zdosKXO4ykgWTjPokvfn1tq3HxrFFTdZjgyej4+rJpiua7r1ja1SzRqDyzqJ7WjRE0zas74htOF299Jqh3g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=SRmkybsfnEO975H3bsyuVrhD4+SDTVTgo5Iq+4pho+I=; b=p7Rd++8kMEcNL8zZHRz+Wu8W0s/QBeKEgddn28L5f5i71VVuoU6YwrkTknvmTIM1SbOBmJpawGtnKUVb5YA8j08UnVOVhU+TbEEi8E/YCu/9TpUHZ+JBMfASK/zUJxBkDSLw4MmKjAH3x3byMIGIuzQEixtWiv7AlGiUqKfT+l5/ZEDvyxQvuQxk/QT3TKBSqFR9PJSoo/+nTFVRARHVhlI7QGduBVyd+PQOGTdLEX148v+o8Q3ftfv7TiT0pC9wNFUJn9E5Ae9mhD0gBwOwKJ3cC9VoIzC0fgdfglSIy0YtCRr0q+tpPi14L3/liY82wUGA7sHt0Mfuq1ILUlMj6g== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=amd.com; dmarc=pass action=none header.from=amd.com; dkim=pass header.d=amd.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=SRmkybsfnEO975H3bsyuVrhD4+SDTVTgo5Iq+4pho+I=; b=WCfuFDXgT3eP2jPjeAjMs3sdcmMy851rilkCAKfJXU01yocTCADKhWTGvWB9CqAsABE3j5Vq4l61MxgHy+0Sm+qjbRMiOtLLPa40ekIw1WhSVGrYLdwm9VOokm24beN0YMRB6NMZwcTwgG2u7uhOz2fwdYqnxfV5trwJNuS0B9U= From: "Penny, Zheng" To: Jan Beulich CC: "Huang, Ray" , "oleksii.kurochko@gmail.com" , Andrew Cooper , =?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= , Anthony PERARD , "Orzel, Michal" , Julien Grall , Stefano Stabellini , Alexandru Isaila , Petre Pircalabu , "Daniel P. Smith" , "xen-devel@lists.xenproject.org" , Tamas K Lengyel Subject: RE: [PATCH v3 09/28] xen/vm_event: consolidate CONFIG_VM_EVENT Thread-Topic: [PATCH v3 09/28] xen/vm_event: consolidate CONFIG_VM_EVENT Thread-Index: AQHcPCqA+mY6s9fCEkmLa9SlVlA0PrTZYSAAgBPVwiCAABbwAIAAFwrQ Date: Tue, 11 Nov 2025 09:46:41 +0000 Message-ID: References: <20251013101540.3502842-1-Penny.Zheng@amd.com> <20251013101540.3502842-10-Penny.Zheng@amd.com> <1a9ac91c-2295-4749-8807-668fcecf8f8e@suse.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: MSIP_Label_f265efc6-e181-49d6-80f4-fae95cf838a0_Enabled=True;MSIP_Label_f265efc6-e181-49d6-80f4-fae95cf838a0_SiteId=3dd8961f-e488-4e60-8e11-a82d994e183d;MSIP_Label_f265efc6-e181-49d6-80f4-fae95cf838a0_SetDate=2025-11-11T09:46:02.0000000Z;MSIP_Label_f265efc6-e181-49d6-80f4-fae95cf838a0_Name=Open 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(envelope-from ) id 1vIlIW-0002QZ-53; Tue, 11 Nov 2025 10:08:24 +0000 Received: by outflank-mailman (input) for mailman id 1158911; Tue, 11 Nov 2025 10:08:22 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIlIU-0002QT-GE for xen-devel@lists.xenproject.org; Tue, 11 Nov 2025 10:08:22 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 596957b1-bee6-11f0-9d18-b5c5bf9af7f9; Tue, 11 Nov 2025 11:08:20 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id ACCFF2F; Tue, 11 Nov 2025 02:08:11 -0800 (PST) Received: from [10.57.88.30] (unknown [10.57.88.30]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D9E443F63F; Tue, 11 Nov 2025 02:08:13 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 596957b1-bee6-11f0-9d18-b5c5bf9af7f9 Message-ID: Date: Tue, 11 Nov 2025 10:08:12 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 02/12] x86/xen: simplify flush_lazy_mmu() Content-Language: en-GB To: Kevin Brodsky , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-3-kevin.brodsky@arm.com> From: Ryan Roberts In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 10/11/2025 10:36, Kevin Brodsky wrote: > On 07/11/2025 12:31, Ryan Roberts wrote: >> On 29/10/2025 10:08, Kevin Brodsky wrote: >>> arch_flush_lazy_mmu_mode() is called when outstanding batched >>> pgtable operations must be completed immediately. There should >>> however be no need to leave and re-enter lazy MMU completely. The >>> only part of that sequence that we really need is xen_mc_flush(); >>> call it directly. >>> >>> Signed-off-by: Kevin Brodsky >> This looks functionally equivalent to me, so: >> >> Reviewed-by: Ryan Roberts >> >> But I don't think this tidy up is strictly necessary for your series to work? >> (perhaps I'll change my mind on that as I go through it). > > I initially thought it might be, but in the end I think you're right - > it should still work fine without this patch. > > Still, I'd rather avoid unnecessary calls to arch_enter() and > arch_leave() as it makes it harder to reason about what is called where. > Namely, keeping them here means that a nested call to > lazy_mmu_mode_disable() would cause arch_leave() then arch_enter() to be > called - rather unexpected. > > The only calls to arch_enter() and arch_leave() that are left after this > series are the ones in and the Xen context-switching > logic (the one case where calling arch hooks directly is justified, see > discussion on v3 [1]). OK yeah, sounds reasonable. > > - Kevin > > [1] > https://lore.kernel.org/all/390e41ae-4b66-40c1-935f-7a1794ba0b71@arm.com/ From xen-devel-bounces@lists.xenproject.org Tue Nov 11 10:16:28 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 10:16:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158925.1487309 (Exim 4.92) (envelope-from ) id 1vIlQD-0004M6-FX; Tue, 11 Nov 2025 10:16:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158925.1487309; Tue, 11 Nov 2025 10:16:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIlQD-0004Kj-9v; Tue, 11 Nov 2025 10:16:21 +0000 Received: by outflank-mailman (input) for mailman id 1158925; Tue, 11 Nov 2025 10:16:19 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIlQB-000451-P6 for xen-devel@lists.xenproject.org; Tue, 11 Nov 2025 10:16:19 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 7424ee41-bee7-11f0-980a-7dc792cee155; Tue, 11 Nov 2025 11:16:14 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4A9EA2F; Tue, 11 Nov 2025 02:16:06 -0800 (PST) Received: from e134099.cambridge.arm.com (e134099.arm.com [10.1.198.34]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0C0673F63F; Tue, 11 Nov 2025 02:16:12 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 7424ee41-bee7-11f0-980a-7dc792cee155 From: Harry Ramsey To: xen-devel@lists.xenproject.org Cc: Luca.Fancellu@arm.com, Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: [PATCH v2 0/3] Third MPU Series Date: Tue, 11 Nov 2025 10:15:58 +0000 Message-ID: <20251111101601.4171120-1-harry.ramsey@arm.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Implement `setup_mm` for MPU systems. This variant does not require setting up a direct map. To reduce code duplication the common initalisation code for both MPU and MMU Arm64 configurations is refactored into `setup_mm`. Platform-specific setup steps are now handled by a new helper function `setup_mm_helper`. Signed-off-by: Harry Ramsey --- Changes in v2: - Improve clarity with regards to MPU setup in setup_mm and the creation of inclusive regions - Fix code format issues --- Harry Ramsey (3): arm/mpu: Implement setup_mm for MPU systems arm/mpu: Implement reference counting for inclusive regions arm/mpu: Implement ioremap_attr for MPU xen/arch/arm/arm32/asm-offsets.c | 2 + xen/arch/arm/arm64/asm-offsets.c | 2 + xen/arch/arm/arm64/mmu/mm.c | 26 +----- xen/arch/arm/include/asm/arm32/mpu.h | 2 + xen/arch/arm/include/asm/arm64/mpu.h | 2 + xen/arch/arm/include/asm/mm.h | 2 + xen/arch/arm/include/asm/mpu/regions.inc | 11 ++- xen/arch/arm/mm.c | 48 ++++++++++ xen/arch/arm/mpu/mm.c | 114 +++++++++++++++++++---- 9 files changed, 164 insertions(+), 45 deletions(-) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue Nov 11 10:16:28 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 10:16:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158924.1487303 (Exim 4.92) (envelope-from ) id 1vIlQD-0004Iy-5r; Tue, 11 Nov 2025 10:16:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158924.1487303; Tue, 11 Nov 2025 10:16:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIlQD-0004Ir-2n; Tue, 11 Nov 2025 10:16:21 +0000 Received: by outflank-mailman (input) for mailman id 1158924; Tue, 11 Nov 2025 10:16:19 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIlQB-000451-1f for xen-devel@lists.xenproject.org; Tue, 11 Nov 2025 10:16:19 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 74e5a882-bee7-11f0-980a-7dc792cee155; Tue, 11 Nov 2025 11:16:15 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7453B169E; Tue, 11 Nov 2025 02:16:07 -0800 (PST) Received: from e134099.cambridge.arm.com (e134099.arm.com [10.1.198.34]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3A84D3F63F; Tue, 11 Nov 2025 02:16:14 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 74e5a882-bee7-11f0-980a-7dc792cee155 From: Harry Ramsey To: xen-devel@lists.xenproject.org Cc: Luca.Fancellu@arm.com, Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: [PATCH v2 1/3] arm/mpu: Implement setup_mm for MPU systems Date: Tue, 11 Nov 2025 10:15:59 +0000 Message-ID: <20251111101601.4171120-2-harry.ramsey@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251111101601.4171120-1-harry.ramsey@arm.com> References: <20251111101601.4171120-1-harry.ramsey@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Implement `setup_mm` for MPU systems. This variant does not require setting up a direct map. To reduce code duplication the common initalisation code for both MPU and MMU Arm64 configurations is refactored into `setup_mm`. Platform-specific setup steps are now handled by a new helper function `setup_mm_helper`. Signed-off-by: Harry Ramsey --- Changes in v2: - Improve clarity with regards to MPU setup in setup_mm --- xen/arch/arm/arm64/mmu/mm.c | 26 +------------------ xen/arch/arm/include/asm/mm.h | 2 ++ xen/arch/arm/mm.c | 48 +++++++++++++++++++++++++++++++++++ xen/arch/arm/mpu/mm.c | 30 ++++++++++++++++++++-- 4 files changed, 79 insertions(+), 27 deletions(-) diff --git a/xen/arch/arm/arm64/mmu/mm.c b/xen/arch/arm/arm64/mmu/mm.c index 3e64be6ae6..70b53be032 100644 --- a/xen/arch/arm/arm64/mmu/mm.c +++ b/xen/arch/arm/arm64/mmu/mm.c @@ -4,8 +4,6 @@ #include #include #include -#include -#include #include @@ -240,33 +238,18 @@ static void __init setup_directmap_mappings(unsigned long base_mfn, panic("Unable to setup the directmap mappings.\n"); } -void __init setup_mm(void) +void __init setup_mm_helper(void) { const struct membanks *banks = bootinfo_get_mem(); paddr_t ram_start = INVALID_PADDR; paddr_t ram_end = 0; - paddr_t ram_size = 0; unsigned int i; - init_pdx(); - - /* - * We need some memory to allocate the page-tables used for the directmap - * mappings. But some regions may contain memory already allocated - * for other uses (e.g. modules, reserved-memory...). - * - * For simplicity, add all the free regions in the boot allocator. - */ - populate_boot_allocator(); - - total_pages = 0; - for ( i = 0; i < banks->nr_banks; i++ ) { const struct membank *bank = &banks->bank[i]; paddr_t bank_end = bank->start + bank->size; - ram_size = ram_size + bank->size; ram_start = min(ram_start, bank->start); ram_end = max(ram_end, bank_end); @@ -274,16 +257,9 @@ void __init setup_mm(void) PFN_DOWN(bank->size)); } - total_pages += ram_size >> PAGE_SHIFT; - directmap_virt_end = XENHEAP_VIRT_START + ram_end - ram_start; directmap_mfn_start = maddr_to_mfn(ram_start); directmap_mfn_end = maddr_to_mfn(ram_end); - - setup_frametable_mappings(ram_start, ram_end); - - init_staticmem_pages(); - init_sharedmem_pages(); } /* diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h index 7a93dad2ed..f702f4a0d6 100644 --- a/xen/arch/arm/include/asm/mm.h +++ b/xen/arch/arm/include/asm/mm.h @@ -202,6 +202,8 @@ extern void remove_early_mappings(void); extern int prepare_secondary_mm(int cpu); /* Map a frame table to cover physical addresses ps through pe */ extern void setup_frametable_mappings(paddr_t ps, paddr_t pe); +/* Helper function to setup memory management */ +void setup_mm_helper(void); /* map a physical range in virtual memory */ void __iomem *ioremap_attr(paddr_t start, size_t len, unsigned int attributes); diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c index 3b05b46ee0..c1208de26c 100644 --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -12,8 +12,12 @@ #include #include #include +#include +#include #include +#include + #include #include @@ -24,6 +28,50 @@ unsigned long frametable_base_pdx __read_mostly; +#if defined(CONFIG_ARM_64) || defined(CONFIG_MPU) +void __init setup_mm(void) +{ + const struct membanks *banks = bootinfo_get_mem(); + paddr_t ram_start = INVALID_PADDR; + paddr_t ram_end = 0; + paddr_t ram_size = 0; + unsigned int i; + + init_pdx(); + + for ( i = 0; i < banks->nr_banks; i++ ) + { + const struct membank *bank = &banks->bank[i]; + paddr_t bank_end = bank->start + bank->size; + + ram_size = ram_size + bank->size; + ram_start = min(ram_start, bank->start); + ram_end = max(ram_end, bank_end); + } + + total_pages = ram_size >> PAGE_SHIFT; + + /* + * On MMU systems we need some memory to allocate the page-tables used for + * the directmap mappings. But some regions may contain memory already + * allocated for other uses (e.g. modules, reserved-memory...). + * + * On MPU systems we need to pre-reserve regions that were allocated for + * other uses (e.g. modules, reserved-memory...). + * + * For simplicity, add all the free regions in the boot allocator. + */ + populate_boot_allocator(); + + setup_mm_helper(); + + setup_frametable_mappings(ram_start, ram_end); + + init_staticmem_pages(); + init_sharedmem_pages(); +} +#endif + bool flags_has_rwx(unsigned int flags) { /* diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c index 3f155b7db2..b80edcf1ca 100644 --- a/xen/arch/arm/mpu/mm.c +++ b/xen/arch/arm/mpu/mm.c @@ -5,12 +5,14 @@ #include #include #include +#include #include #include #include #include #include #include +#include #include struct page_info *frame_table; @@ -378,9 +380,33 @@ int map_pages_to_xen(unsigned long virt, mfn_t mfn, unsigned long nr_mfns, return xen_mpumap_update(virt, mfn_to_maddr(mfn_add(mfn, nr_mfns)), flags); } -void __init setup_mm(void) +/* + * Heap must be statically configured in Device Tree through "xen,static-heap" + * on MPU systems, use setup_mm_helper() for that. + */ +void __init setup_mm_helper(void) { - BUG_ON("unimplemented"); + const struct membanks *reserved_mem = bootinfo_get_reserved_mem(); + unsigned int bank = 0; + + for ( ; bank < reserved_mem->nr_banks; bank++ ) + { + if ( reserved_mem->bank[bank].type == MEMBANK_STATIC_HEAP ) + { + paddr_t bank_start = round_pgup(reserved_mem->bank[bank].start); + paddr_t bank_size = round_pgdown(reserved_mem->bank[bank].size); + paddr_t bank_end = bank_start + bank_size; + + /* Map static heap with one MPU protection region */ + if ( xen_mpumap_update(bank_start, bank_end, PAGE_HYPERVISOR) ) + panic("Failed to map static heap\n"); + + break; + } + } + + if ( bank == reserved_mem->nr_banks ) + panic("No static heap memory bank found\n"); } int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int nf) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue Nov 11 10:16:28 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 10:16:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158926.1487316 (Exim 4.92) (envelope-from ) id 1vIlQD-0004Sd-QU; Tue, 11 Nov 2025 10:16:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158926.1487316; Tue, 11 Nov 2025 10:16:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIlQD-0004QD-Jg; Tue, 11 Nov 2025 10:16:21 +0000 Received: by outflank-mailman (input) for mailman id 1158926; Tue, 11 Nov 2025 10:16:20 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIlQB-000451-Vw for xen-devel@lists.xenproject.org; Tue, 11 Nov 2025 10:16:19 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 76454cc3-bee7-11f0-980a-7dc792cee155; Tue, 11 Nov 2025 11:16:18 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D582F1756; Tue, 11 Nov 2025 02:16:09 -0800 (PST) Received: from e134099.cambridge.arm.com (e134099.arm.com [10.1.198.34]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 984DA3F63F; Tue, 11 Nov 2025 02:16:16 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 76454cc3-bee7-11f0-980a-7dc792cee155 From: Harry Ramsey To: xen-devel@lists.xenproject.org Cc: Luca.Fancellu@arm.com, Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: [PATCH v2 3/3] arm/mpu: Implement ioremap_attr for MPU Date: Tue, 11 Nov 2025 10:16:01 +0000 Message-ID: <20251111101601.4171120-4-harry.ramsey@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251111101601.4171120-1-harry.ramsey@arm.com> References: <20251111101601.4171120-1-harry.ramsey@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Implement the function `ioremap_attr` for MPU systems. Signed-off-by: Harry Ramsey --- xen/arch/arm/mpu/mm.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c index cd84f9e3c6..d9f415a447 100644 --- a/xen/arch/arm/mpu/mm.c +++ b/xen/arch/arm/mpu/mm.c @@ -475,8 +475,13 @@ void free_init_memory(void) void __iomem *ioremap_attr(paddr_t start, size_t len, unsigned int flags) { - BUG_ON("unimplemented"); - return NULL; + paddr_t start_pg = round_pgdown(start); + paddr_t end_pg = round_pgup(start_pg + len); + if ( xen_mpumap_update(start_pg, end_pg, flags) ) + return NULL; + + /* Mapped or already mapped */ + return maddr_to_virt(start_pg); } /* -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue Nov 11 10:16:28 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 10:16:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158923.1487294 (Exim 4.92) (envelope-from ) id 1vIlQB-00045S-Vu; Tue, 11 Nov 2025 10:16:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158923.1487294; Tue, 11 Nov 2025 10:16:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIlQB-00045K-SG; Tue, 11 Nov 2025 10:16:19 +0000 Received: by outflank-mailman (input) for mailman id 1158923; Tue, 11 Nov 2025 10:16:18 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIlQA-000452-NQ for xen-devel@lists.xenproject.org; Tue, 11 Nov 2025 10:16:18 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 7593c4b0-bee7-11f0-9d18-b5c5bf9af7f9; Tue, 11 Nov 2025 11:16:17 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A41B81713; Tue, 11 Nov 2025 02:16:08 -0800 (PST) Received: from e134099.cambridge.arm.com (e134099.arm.com [10.1.198.34]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 69A293F63F; Tue, 11 Nov 2025 02:16:15 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 7593c4b0-bee7-11f0-9d18-b5c5bf9af7f9 From: Harry Ramsey To: xen-devel@lists.xenproject.org Cc: Luca.Fancellu@arm.com, Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: [PATCH v2 2/3] arm/mpu: Implement reference counting for inclusive regions Date: Tue, 11 Nov 2025 10:16:00 +0000 Message-ID: <20251111101601.4171120-3-harry.ramsey@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251111101601.4171120-1-harry.ramsey@arm.com> References: <20251111101601.4171120-1-harry.ramsey@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Implement reference counting to enable inclusive MPU regions. An inclusive region is defined as a region encapsulated inside a previously allocated region sharing the same permissions. References are incremented and decremented in xen_mpumap_update_entry. A region will be destroyed if the reference count is 0 upon calling destroy_xen_mappings and if the full region range is specified. Additionally XEN_MPUMAP_ENTRY_SHIFT and XEN_MPUMAP_ENTRY_SHIFT_ZERO are no longer hardcoded and defined inside asm-offsets.c. Signed-off-by: Harry Ramsey --- Changes in v2: - Improve clarity with regards to MPU inclusive regions - Fix code format issues --- xen/arch/arm/arm32/asm-offsets.c | 2 + xen/arch/arm/arm64/asm-offsets.c | 2 + xen/arch/arm/include/asm/arm32/mpu.h | 2 + xen/arch/arm/include/asm/arm64/mpu.h | 2 + xen/arch/arm/include/asm/mpu/regions.inc | 11 +++- xen/arch/arm/mpu/mm.c | 75 +++++++++++++++++++----- 6 files changed, 78 insertions(+), 16 deletions(-) diff --git a/xen/arch/arm/arm32/asm-offsets.c b/xen/arch/arm/arm32/asm-offsets.c index c203ce269d..951f8d03f3 100644 --- a/xen/arch/arm/arm32/asm-offsets.c +++ b/xen/arch/arm/arm32/asm-offsets.c @@ -79,6 +79,8 @@ void __dummy__(void) #ifdef CONFIG_MPU DEFINE(XEN_MPUMAP_MASK_sizeof, sizeof(xen_mpumap_mask)); DEFINE(XEN_MPUMAP_sizeof, sizeof(xen_mpumap)); + DEFINE(XEN_MPUMAP_ENTRY_SHIFT, ilog2(sizeof(pr_t))); + DEFINE(XEN_MPUMAP_ENTRY_ZERO_OFFSET, sizeof(prbar_t) + sizeof(prlar_t)); BLANK(); #endif } diff --git a/xen/arch/arm/arm64/asm-offsets.c b/xen/arch/arm/arm64/asm-offsets.c index 320289b281..38a3894a3b 100644 --- a/xen/arch/arm/arm64/asm-offsets.c +++ b/xen/arch/arm/arm64/asm-offsets.c @@ -73,6 +73,8 @@ void __dummy__(void) #ifdef CONFIG_MPU DEFINE(XEN_MPUMAP_MASK_sizeof, sizeof(xen_mpumap_mask)); DEFINE(XEN_MPUMAP_sizeof, sizeof(xen_mpumap)); + DEFINE(XEN_MPUMAP_ENTRY_SHIFT, ilog2(sizeof(pr_t))); + DEFINE(XEN_MPUMAP_ENTRY_ZERO_OFFSET, sizeof(prbar_t) + sizeof(prlar_t)); BLANK(); #endif } diff --git a/xen/arch/arm/include/asm/arm32/mpu.h b/xen/arch/arm/include/asm/arm32/mpu.h index 0a6930b3a0..137022d922 100644 --- a/xen/arch/arm/include/asm/arm32/mpu.h +++ b/xen/arch/arm/include/asm/arm32/mpu.h @@ -39,6 +39,8 @@ typedef union { typedef struct { prbar_t prbar; prlar_t prlar; + uint8_t refcount; + uint8_t pad[7]; /* Pad structure to 16 Bytes */ } pr_t; #endif /* __ASSEMBLY__ */ diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h index f0ce344e78..17f62ccaf6 100644 --- a/xen/arch/arm/include/asm/arm64/mpu.h +++ b/xen/arch/arm/include/asm/arm64/mpu.h @@ -38,6 +38,8 @@ typedef union { typedef struct { prbar_t prbar; prlar_t prlar; + uint8_t refcount; + uint8_t pad[15]; /* Pad structure to 32 Bytes */ } pr_t; #endif /* __ASSEMBLY__ */ diff --git a/xen/arch/arm/include/asm/mpu/regions.inc b/xen/arch/arm/include/asm/mpu/regions.inc index 23fead3b21..0cdbb17bc3 100644 --- a/xen/arch/arm/include/asm/mpu/regions.inc +++ b/xen/arch/arm/include/asm/mpu/regions.inc @@ -14,14 +14,12 @@ #define PRLAR_ELx_EN 0x1 #ifdef CONFIG_ARM_64 -#define XEN_MPUMAP_ENTRY_SHIFT 0x4 /* 16 byte structure */ .macro store_pair reg1, reg2, dst stp \reg1, \reg2, [\dst] .endm #else -#define XEN_MPUMAP_ENTRY_SHIFT 0x3 /* 8 byte structure */ .macro store_pair reg1, reg2, dst strd \reg1, \reg2, [\dst] @@ -97,6 +95,15 @@ 3: + /* Clear the rest of the xen_mpumap entry. */ +#ifdef CONFIG_ARM_64 + stp xzr, xzr, [\base, #XEN_MPUMAP_ENTRY_ZERO_OFFSET] +#else + mov \prbar, #0 + mov \prlar, #0 + strd \prbar, \prlar, [\base, #XEN_MPUMAP_ENTRY_ZERO_OFFSET] +#endif + add \sel, \sel, #1 1: diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c index b80edcf1ca..cd84f9e3c6 100644 --- a/xen/arch/arm/mpu/mm.c +++ b/xen/arch/arm/mpu/mm.c @@ -106,6 +106,7 @@ pr_t pr_of_addr(paddr_t base, paddr_t limit, unsigned int flags) region = (pr_t) { .prbar = prbar, .prlar = prlar, + .refcount = 0, }; /* Set base address and limit address. */ @@ -170,6 +171,37 @@ int mpumap_contains_region(pr_t *table, uint8_t nr_regions, paddr_t base, return MPUMAP_REGION_NOTFOUND; } +static bool is_mm_attr_match(pr_t *region, unsigned int attributes) +{ + bool ret = true; + + if ( region->prbar.reg.ro != PAGE_RO_MASK(attributes) ) + { + printk(XENLOG_WARNING + "Mismatched Access Permission attributes (%#x instead of %#x)\n", + region->prbar.reg.ro, PAGE_RO_MASK(attributes)); + ret = false; + } + + if ( region->prbar.reg.xn != PAGE_XN_MASK(attributes) ) + { + printk(XENLOG_WARNING + "Mismatched Execute Never attributes (%#x instead of %#x)\n", + region->prbar.reg.xn, PAGE_XN_MASK(attributes)); + ret = false; + } + + if ( region->prlar.reg.ai != PAGE_AI_MASK(attributes) ) + { + printk(XENLOG_WARNING + "Mismatched Memory Attribute Index (%#x instead of %#x)\n", + region->prlar.reg.ai, PAGE_AI_MASK(attributes)); + ret = false; + } + + return ret; +} + /* Map a frame table to cover physical addresses ps through pe */ void __init setup_frametable_mappings(paddr_t ps, paddr_t pe) { @@ -284,22 +316,26 @@ static int xen_mpumap_update_entry(paddr_t base, paddr_t limit, flags_has_page_present = flags & _PAGE_PRESENT; - /* Currently we don't support modifying an existing entry. */ + /* + * Currently, we only support removing/modifying a *WHOLE* MPU memory + * region. Part-region removal/modification is not supported as in the worst + * case it will leave two/three fragments behind. + */ if ( flags_has_page_present && (rc >= MPUMAP_REGION_FOUND) ) { - printk("Modifying an existing entry is not supported\n"); - return -EINVAL; - } + if ( !is_mm_attr_match(&xen_mpumap[idx], flags) ) + { + printk("Modifying an existing entry is not supported\n"); + return -EINVAL; + } - /* - * Currently, we only support removing/modifying a *WHOLE* MPU memory - * region. Part-region removal/modification is not supported as in the worst - * case it will leave two/three fragments behind. - */ - if ( rc == MPUMAP_REGION_INCLUSIVE ) - { - printk("Part-region removal/modification is not supported\n"); - return -EINVAL; + /* Check for overflow of refcount before incrementing. */ + if ( xen_mpumap[idx].refcount == 0xFF ) + { + printk("Cannot allocate region as it would cause reference overflow\n"); + return -ENOENT; + } + xen_mpumap[idx].refcount += 1; } /* We are inserting a mapping => Create new region. */ @@ -323,7 +359,18 @@ static int xen_mpumap_update_entry(paddr_t base, paddr_t limit, return -EINVAL; } - disable_mpu_region_from_index(idx); + if ( xen_mpumap[idx].refcount == 0 ) + { + if ( MPUMAP_REGION_FOUND == rc ) + disable_mpu_region_from_index(idx); + else + { + printk("Cannot remove a partial region\n"); + return -EINVAL; + } + } + else + xen_mpumap[idx].refcount -= 1; } return 0; -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue Nov 11 10:24:32 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 10:24:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158974.1487333 (Exim 4.92) (envelope-from ) id 1vIlY1-0007JR-Ng; Tue, 11 Nov 2025 10:24:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158974.1487333; Tue, 11 Nov 2025 10:24:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIlY1-0007JK-Ko; Tue, 11 Nov 2025 10:24:25 +0000 Received: by outflank-mailman (input) for mailman id 1158974; Tue, 11 Nov 2025 10:24:24 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIlY0-0007JE-1O for xen-devel@lists.xenproject.org; Tue, 11 Nov 2025 10:24:24 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 96f4741b-bee8-11f0-9d18-b5c5bf9af7f9; Tue, 11 Nov 2025 11:24:22 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EEC872F; Tue, 11 Nov 2025 02:24:13 -0800 (PST) Received: from [10.57.88.30] (unknown [10.57.88.30]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 11C6E3F63F; Tue, 11 Nov 2025 02:24:15 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 96f4741b-bee8-11f0-9d18-b5c5bf9af7f9 Message-ID: <824bf705-e9d6-4eeb-9532-9059fa56427f@arm.com> Date: Tue, 11 Nov 2025 10:24:14 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 07/12] mm: enable lazy_mmu sections to nest Content-Language: en-GB To: Kevin Brodsky , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-8-kevin.brodsky@arm.com> <999feffa-5d1d-42e3-bd3a-d949f2a9de9d@arm.com> From: Ryan Roberts In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 10/11/2025 10:47, Kevin Brodsky wrote: > On 07/11/2025 14:59, Ryan Roberts wrote: >> On 29/10/2025 10:09, Kevin Brodsky wrote: >>> [...] >>> >>> diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h >>> index b5fdf32c437f..e6064e00b22d 100644 >>> --- a/include/linux/pgtable.h >>> +++ b/include/linux/pgtable.h >>> @@ -228,27 +228,86 @@ static inline int pmd_dirty(pmd_t pmd) >>> * of the lazy mode. So the implementation must assume preemption may be enabled >>> * and cpu migration is possible; it must take steps to be robust against this. >>> * (In practice, for user PTE updates, the appropriate page table lock(s) are >>> - * held, but for kernel PTE updates, no lock is held). Nesting is not permitted >>> - * and the mode cannot be used in interrupt context. >>> + * held, but for kernel PTE updates, no lock is held). The mode cannot be used >>> + * in interrupt context. >> "The mode cannot be used in interrupt context"; except it is for arm64. KFENCE >> and/or DEBUG_PAGEALLOC will request the arch to change linear map permissions, >> which will enter lazy mmu (now using the new generic API). This can happen in >> softirq context. > > Are you happy with the wording update in patch 12? Yes! > >>> + * >>> + * The lazy MMU mode is enabled for a given block of code using: >>> + * >>> + * lazy_mmu_mode_enable(); >>> + * >>> + * lazy_mmu_mode_disable(); >>> + * >>> + * Nesting is permitted: may itself use an enable()/disable() pair. >>> + * A nested call to enable() has no functional effect; however disable() causes >>> + * any batched architectural state to be flushed regardless of nesting. After a >>> + * call to disable(), the caller can therefore rely on all previous page table >>> + * modifications to have taken effect, but the lazy MMU mode may still be >>> + * enabled. >>> + * >>> + * In certain cases, it may be desirable to temporarily pause the lazy MMU mode. >>> + * This can be done using: >>> + * >>> + * lazy_mmu_mode_pause(); >>> + * >>> + * lazy_mmu_mode_resume(); >>> + * >>> + * This sequence must only be used if the lazy MMU mode is already enabled. >>> + * pause() ensures that the mode is exited regardless of the nesting level; >>> + * resume() re-enters the mode at the same nesting level. must not modify >>> + * the lazy MMU state (i.e. it must not call any of the lazy_mmu_mode_* >>> + * helpers). >>> + * >>> + * in_lazy_mmu_mode() can be used to check whether the lazy MMU mode is >>> + * currently enabled. >>> */ >> Nice documentation! > > Thanks! > >>> #ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE >>> static inline void lazy_mmu_mode_enable(void) >>> { >>> - arch_enter_lazy_mmu_mode(); >>> + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; >>> + >>> + VM_WARN_ON_ONCE(state->nesting_level == U8_MAX); >>> + /* enable() must not be called while paused */ >>> + VM_WARN_ON(state->nesting_level > 0 && !state->active); >>> + >>> + if (state->nesting_level++ == 0) { >> Hmm... for the arm64 case of calling this in an interrupt, Is it safe? >> >> If a task is calling this function and gets interrupted here, nesting_level==1 >> but active==false. The interrupt then calls this function and increments from 1 >> to 2 but arch_enter_lazy_mmu_mode() hasn't been called. >> >> More dangerously (I think), when the interrupt handler calls >> lazy_mmu_mode_disable(), it will end up calling arch_flush_lazy_mmu_mode() which >> could be an issue because as far as the arch is concerned, it's not in lazy mode. >> >> The current arm64 implementation works because setting and clearing the thread >> flags is atomic. >> >> Perhaps you need to disable preemption around the if block? > > As you found out this is addressed in patch 12, but indeed I hadn't > realised that this patch leaves the generic API in an unsafe situation > w.r.t. interrupts. We at least need to have in_interrupt() checks in the > generic layer by the time we get to this patch. Yeah that should solve it. > >>> + state->active = true; >>> + arch_enter_lazy_mmu_mode(); >>> + } >>> } >>> >>> static inline void lazy_mmu_mode_disable(void) >>> { >>> - arch_leave_lazy_mmu_mode(); >>> + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; >>> + >>> + VM_WARN_ON_ONCE(state->nesting_level == 0); >>> + VM_WARN_ON(!state->active); >>> + >>> + if (--state->nesting_level == 0) { >>> + state->active = false; >>> + arch_leave_lazy_mmu_mode(); >>> + } else { >>> + /* Exiting a nested section */ >>> + arch_flush_lazy_mmu_mode(); >>> + } >>> } >>> >>> static inline void lazy_mmu_mode_pause(void) >>> { >>> + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; >>> + >>> + VM_WARN_ON(state->nesting_level == 0 || !state->active); >> nit: do you need the first condition? I think when nesting_level==0, we expect >> to be !active? > > I suppose this should never happen indeed - I was just being extra > defensive. > > Either way David suggested allowing pause()/resume() to be called > outside of any section so the next version will bail out on > nesting_level == 0. Ignoring my current opinion that we don't need pause/resume at all for now; Are you suggesting that pause/resume will be completely independent of enable/disable? I think that would be best. So enable/disable increment and decrement the nesting_level counter regardless of whether we are paused. nesting_level 0 => 1 enables if not paused. nesting_level 1 => 0 disables if not paused. pause disables nesting_level >= 1, resume enables if nesting_level >= 1. Perhaps we also need nested pause/resume? Then you just end up with 2 counters; enable_count and pause_count. Sorry if this has already been discussed. > >>> + >>> + state->active = false; >>> arch_leave_lazy_mmu_mode(); >>> } >>> >>> static inline void lazy_mmu_mode_resume(void) >>> { >>> + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; >>> + >>> + VM_WARN_ON(state->nesting_level == 0 || state->active); >> Similar argument? >> >>> + >>> + state->active = true; >>> arch_enter_lazy_mmu_mode(); >>> } >>> #else >>> diff --git a/include/linux/sched.h b/include/linux/sched.h >>> index cbb7340c5866..11566d973f42 100644 >>> --- a/include/linux/sched.h >>> +++ b/include/linux/sched.h >>> @@ -1441,6 +1441,10 @@ struct task_struct { >>> >>> struct page_frag task_frag; >>> >>> +#ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE >>> + struct lazy_mmu_state lazy_mmu_state; >>> +#endif >>> + >>> #ifdef CONFIG_TASK_DELAY_ACCT >>> struct task_delay_info *delays; >>> #endif >>> @@ -1724,6 +1728,18 @@ static inline char task_state_to_char(struct task_struct *tsk) >>> return task_index_to_char(task_state_index(tsk)); >>> } >>> >>> +#ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE >>> +static inline bool in_lazy_mmu_mode(void) >>> +{ >>> + return current->lazy_mmu_state.active; >>> +} >>> +#else >>> +static inline bool in_lazy_mmu_mode(void) >>> +{ >>> + return false; >> Just pointing out that this isn't really a correct implementation: >> >> lazy_mmu_mode_enable() >> ASSERT(in_lazy_mmu_mode()) << triggers for arches without lazy mmu >> lazy_mmu_mode_disable() >> >> Although it probably doesn't matter in practice? > > I'd say that the expectation is invalid - lazy MMU mode can only be > enabled if the architecture supports it. In fact as you pointed out > above the API may be called in interrupt context but it will have no > effect, so this sequence would always fail in interrupt context. Yep, but previously there was no way to query the current state so it didn't matter. Now you have a query API so it might matter if/when people come along and use it in unexpected ways. > > Worth nothing that in_lazy_mmu_mode() is only ever called from arch code > where lazy MMU is implemented. I added the fallback as a matter of > principle, but it isn't actually required. Yes, I agree that's the intent. I'm just wondering if it's possible to enforce that only arch code uses this. Perhaps add some docs to explain that it's only intended for arches that implement lazy_mmu, and don't define it for arches that don't, which would catch any generic users? Thanks, Ryan > > - Kevin From xen-devel-bounces@lists.xenproject.org Tue Nov 11 11:23:06 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 11:23:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1158987.1487344 (Exim 4.92) (envelope-from ) id 1vImSP-00064C-Pk; Tue, 11 Nov 2025 11:22:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1158987.1487344; Tue, 11 Nov 2025 11:22:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vImSP-000645-ML; Tue, 11 Nov 2025 11:22:41 +0000 Received: by outflank-mailman (input) for mailman id 1158987; Tue, 11 Nov 2025 11:22:40 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vImSO-00063y-NO for xen-devel@lists.xen.org; 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> vmcs = alloc(); > *(uint32_t*)vmcs = correct_vmcs_revision_id; > vmptrld(vmcs); > *vmcs = invalide_vmcs_revision_id; > vmwrite(MSR_BITMAP, NULL); > ``` > > The `vmptrld` will set the provided vmcs as the link pointer as seen in > `xen/arch/x86/hvm/vmx/vvmx.c:1834` > ``` > if ( cpu_has_vmx_vmcs_shadowing ) > nvmx_set_vmcs_pointer(v, nvcpu->nv_vvmcx); > ``` > > If the guest now calls `VMWRITE` it will access that vmcs directly, > execpt if writing/reading the `IO_BITMAP` or the `MSR_BITMAP` > > `xen/arch/x86/hvm/vmx/vvmx.c:107` > ``` > /* > * For the following 6 encodings, we need to handle them in VMM. > * Let them vmexit as usual. > */ > set_bit(IO_BITMAP_A, vw); > set_bit(VMCS_HIGH(IO_BITMAP_A), vw); > set_bit(IO_BITMAP_B, vw); > set_bit(VMCS_HIGH(IO_BITMAP_B), vw); > set_bit(MSR_BITMAP, vw); > set_bit(VMCS_HIGH(MSR_BITMAP), vw); > ``` > > If we now execute `vmwrite(MSR_BITMAP, 0)` in the guest it will execute this stack: > ``` > nvmx_handle_vmwrite > set_vvmcs_safe > set_vvmcs_real_safe > virtual_vmcs_vmwrite_safe > virtual_vmcs_enter > __vmptrld > ``` > The vmcs pointer being loaded in the last step being the one supplied by the guest > that has been overwritten. > Since we have overwritten the `vmcs_revision_id` the hardware will reject the vmptrld, which > will call `BUG()`. Hello, thanks for reporting this. The manual very clearly says "Don't Do This", but Xen should not crash as a result. I think the bug is letting the shadow VMCS remain in guest memory.  It's also ridiculous that we intercept writes into control state then emulate what hardware would have done anyway. One interesting thing about VMCSes is that VMXON/VMPTRLD may make them non-coherent with the rest of memory.  This is implementation dependent, but works in our favour. Architecturally, the only time revision_id is sampled is during VMPTRLD.  There are no equivalents to VMX Error 11 for other instructions, and no mechanism I can see for reporting this specific failure during VMEntry or non-root operations. But, with nested virt in the mix, while a vCPU is is in (v)non-root mode, we can de-schedule entirely, run another VM, and come back to this vCPU.  We need to be able to guarantee that such errors can't occur, or to be able to forward the errors properly into the guest.  There seems to be no option for the latter. > > --- > A secondary similar bug happens when calling `VMXOFF` while a shadow vmcs is active. > This will not clear the shadow vmcs, and crash the guest if it ever writes to the vmcs again. > Effectively locking the page of being modified until a new vmcs is set active. > This should be fixed by applying this patch: > > diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c > index 2432af58e0..3895dd158a 100644 > --- a/xen/arch/x86/hvm/vmx/vvmx.c > +++ b/xen/arch/x86/hvm/vmx/vvmx.c > @@ -1589,6 +1589,8 @@ static int nvmx_handle_vmxoff(struct cpu_user_regs *regs) > struct vcpu *v=current; > struct nestedvmx *nvmx = &vcpu_2_nvmx(v); > > + if ( cpu_has_vmx_vmcs_shadowing ) > + nvmx_clear_vmcs_pointer(v, nvcpu->nv_vvmcx); > nvmx_purge_vvmcs(v); > nvmx->vmxon_region_pa = INVALID_PADDR; > > As far as I have read it is not specifically stated in the Intel SDM that a VMXOFF clears the active vmcs, however it > does also not state anything otherwise and I thinks it's saner to clear it than to crash the guest because of an > vmcs error, when it has vmx disabled. This is different.  The manual very clearly says the VMCSes may become corrupt if they're not VMCLEAR'd before VMXOFF. In fact, there's a long standing bug/misfeature in Intel CPUs that upon VMXOFF, non-coherent VMCSes remain non-coherent until the next VMXON, at which point new VMPTRLD's can cause older VMCSes to be cleared (the CPU can only hold a certain number of VMCSes in internal registers) and written back to main memory. In the case of e.g. kexec, the new kernel has no ability to figure out that this is going on. Xen will need to clear all guest VMCSes for safety, but if we were feeling helpful, we probably ought to poison such VMCSes with 0xc2 or so. I've opened https://gitlab.com/xen-project/xen/-/issues/218 but it might be a little while until we get to this. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue Nov 11 12:16:24 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 12:16:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159010.1487386 (Exim 4.92) (envelope-from ) id 1vInII-0004KJ-3C; Tue, 11 Nov 2025 12:16:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159010.1487386; Tue, 11 Nov 2025 12:16:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vInII-0004KC-0O; Tue, 11 Nov 2025 12:16:18 +0000 Received: by outflank-mailman (input) for mailman id 1159010; Tue, 11 Nov 2025 12:16:16 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vInIG-0004K6-9P for xen-devel@lists.xenproject.org; Tue, 11 Nov 2025 12:16:16 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 35040d1f-bef8-11f0-980a-7dc792cee155; Tue, 11 Nov 2025 13:16:10 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B4FDA2F; Tue, 11 Nov 2025 04:16:01 -0800 (PST) Received: from [10.1.31.216] (XHFQ2J9959.cambridge.arm.com [10.1.31.216]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 976253F63F; Tue, 11 Nov 2025 04:16:04 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 35040d1f-bef8-11f0-980a-7dc792cee155 Message-ID: Date: Tue, 11 Nov 2025 12:16:03 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 06/12] mm: introduce generic lazy_mmu helpers Content-Language: en-GB To: Alexander Gordeev Cc: "David Hildenbrand (Red Hat)" , Kevin Brodsky , linux-mm@kvack.org, linux-kernel@vger.kernel.org, Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-7-kevin.brodsky@arm.com> <71418b31-aedb-4600-9558-842515dd6c44@arm.com> <645178fd-df4e-42fe-b55e-97d9506499be@arm.com> <413b2c49-f124-4cda-8fea-a6cc165f6326-agordeev@linux.ibm.com> <92eca53f-eb5d-4bd0-ad6c-56c65fdcea86-agordeev@linux.ibm.com> From: Ryan Roberts In-Reply-To: <92eca53f-eb5d-4bd0-ad6c-56c65fdcea86-agordeev@linux.ibm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 11/11/2025 08:01, Alexander Gordeev wrote: > On Mon, Nov 10, 2025 at 09:19:40AM +0000, Ryan Roberts wrote: >> On 10/11/2025 08:11, Alexander Gordeev wrote: >>> On Fri, Nov 07, 2025 at 03:22:54PM +0000, Ryan Roberts wrote: >>> >>> Hi Ryan, >>> >>>> On 07/11/2025 14:34, David Hildenbrand (Red Hat) wrote: >>>>>>>   #ifndef pte_batch_hint >>>>>>> diff --git a/mm/kasan/shadow.c b/mm/kasan/shadow.c >>>>>>> index 5d2a876035d6..c49b029d3593 100644 >>>>>>> --- a/mm/kasan/shadow.c >>>>>>> +++ b/mm/kasan/shadow.c >>>>>>> @@ -305,7 +305,7 @@ static int kasan_populate_vmalloc_pte(pte_t *ptep, >>>>>>> unsigned long addr, >>>>>>>       pte_t pte; >>>>>>>       int index; >>>>>>>   -    arch_leave_lazy_mmu_mode(); >>>>>>> +    lazy_mmu_mode_pause(); >>>>>> >>>>>> I wonder if there really are use cases that *require* pause/resume? I think >>>>>> these kasan cases could be correctly implemented using a new nest level instead? >>>>>> Are there cases where the effects really need to be immediate or do the effects >>>>>> just need to be visible when you get to where the resume is? >>>>>> >>>>>> If the latter, that could just be turned into a nested disable (e.g. a flush). >>>>>> In this case, there is only 1 PTE write so no benefit, but I wonder if other >>>>>> cases may have more PTE writes that could then still be batched. It would be >>>>>> nice to simplify the API by removing pause/resume if we can? >>>>> >>>>> It has clear semantics, clearer than some nest-disable IMHO. >>>>> >>>>> Maybe you can elaborate how you would change ("simplify") the API in that >>>>> regard? What would the API look like? >>>> >>>> By simplify, I just meant can we remove lazy_mmu_mode_pause() and >>>> lazy_mmu_mode_resume() ? >>>> >>>> >>>> We currently have: >>>> >>>> apply_to_page_range >>>> lazy_mmu_mode_enable() >>>> kasan_populate_vmalloc_pte() >>>> lazy_mmu_mode_pause() >>>> >>>> lazy_mmu_mode_resume() >>>> lazy_mmu_mode_disable() >>>> >>>> Where is setting ptes. But if doesn't need the effects to be >>>> visible until lazy_mmu_mode_resume(), then you could replace the block with: >>>> >>>> apply_to_page_range >>>> lazy_mmu_mode_enable() >>>> kasan_populate_vmalloc_pte() >>>> lazy_mmu_mode_enable() >>>> >>>> lazy_mmu_mode_disable() >>>> lazy_mmu_mode_disable() >>>> >>>> However, looking at this more closely, I'm not really clear on why we need *any* >>>> special attention to lazy mmu inside of kasan_populate_vmalloc_pte() and >>>> kasan_depopulate_vmalloc_pte(). >>>> >>>> I *think* that the original concern was that we were doing ptep_get(ptep) inside >>>> of a lazy_mmu block? So we need to flush so that the getter returns the most >>>> recent value? But given we have never written to that particular ptep while in >>>> the lazy mmu block, there is surely no hazard in the first place? >>> >>> There is, please see: >>> https://lore.kernel.org/linux-mm/cover.1755528662.git.agordeev@linux.ibm.com/ >> >> I've stared at this for a while, but I'm afraid I still don't see the problem. >> This all looks safe to me. Could you explain exactly what this issue is? >> >> If I've understood correctly, kasan_populate_vmalloc() is called during virtual >> range allocation by vmalloc. This is not in a nested lazy mmu block (but it >> wouldn't matter if it was once we have Kevin's nested changes to ensure flush >> when exiting the nested scope). kasan_populate_vmalloc() calls >> apply_to_page_range(), which will walk the set of ptes, calling >> kasan_populate_vmalloc_pte() for each one. kasan_populate_vmalloc_pte() does a >> ptep_get() then, if none, calls set_pte_at(). >> >> That's not a hazard since you're calling get before the set and you only visit >> each pte once for the apply_to_page_range() lazy mmu block. > > I have to admit I do not remember every detail and would have to recreate > the issue - which is specific to s390 lazy_mmu implementation I think. > Both kasan_populate_vmalloc_pte() and kasan_depopulate_vmalloc_pte() do: > > apply_to_page_range() > { > arch_enter_lazy_mmu_mode(); > > kasan_de|populate_vmalloc_pte() > { > arch_leave_lazy_mmu_mode(); <--- remove? > > spin_lock(&init_mm.page_table_lock); > > spin_unlock(&init_mm.page_table_lock); <--- PTE store should be done > > arch_enter_lazy_mmu_mode(); <--- remove? > } > > arch_leave_lazy_mmu_mode(); > } > > Upon return from spin_unlock() both kasan callbacks expect the PTE contains > an updated value to be stored to pgtable. That is true unless we remove > arch_leave|enter_lazy_mmu_mode() brackets. If we do the value is continued > to be cached and only stored when the outer arch_leave_lazy_mmu_mode() is > called. That results in a race between concurrent PTE updaters. OK, I've been staring at the code and KASAN docs and believe I understand the problem now. Thanks for your patience! The core of the problem is that the shadow memory which is being allocated here is 1/8th the size of the virtual range it covers, and so a single page of shadow memory can be shared by multiple vmalloc areas. The implication here is that multiple concurrent vmalloc() calls can allocate adjacent areas and both will race to allocate the same shadow page. That's why we have the spin lock and the check for pte_none(); the winner is the one that sees pte_none() == true and will perform the mapping. And so yes, this does indeed create a read hazzard; there are 2 racing threads, both reading and writing the pte. One alternative solution would be to grab the spin lock around the whole apply_to_page_range(), but for the populate call, that would imply holding the lock during __memset(). And for depopulate, it would imply holding it during __free_page(). Neither of these are desirable. So I agree pause/resume are required here. Sorry for the noise! Thanks, Ryan > >>>> apply_to_existing_page_range() will only call kasan_depopulate_vmalloc_pte() >>>> once per pte, right? So given we read the ptep before writing it, there should >>>> be no hazard? If so we can remove pause/resume. >>> >>> Unfortunately, we rather not, please see: >>> https://lore.kernel.org/linux-mm/d407a381-099b-4ec6-a20e-aeff4f3d750f@arm.com/ >> >> Sorry but I don't see anything relavent to my point in this mail. Perhaps there >> is some s390-specific detail that I'm failing to understand? > > Sorry, with this message I meant the branch where it was discussed, > I will try to C&P some excerpts and summarize it here. > > * lazy_mmu_mode_enable() > > This helper is parameter-free, assuming the MMU unit does not need any > configuration other than turning it on/off. That is currently true, but > (as I noted in my other mail) I am going to introduce a friend enable > function that accepts parameters, creates an arch-specific state and > uses it while the lazy mmu mode is active: > > static inline void arch_enter_lazy_mmu_mode_pte(struct mm_struct *mm, > unsigned long addr, > unsigned long end, > pte_t *ptep) > { > ... > } > > * lazy_mmu_mode_resume() -> arch_enter_lazy_mmu_mode() > > Conversely, this needs to be -> arch_resume_lazy_mmu_mode(). And it can not > be arch_enter_lazy_mmu_mode(), since a lazy_mmu_mode_resume() caller does > not know the parameters passed to the original lazy_mmu_mode_enable(...)- > friend. > >> >> Thanks, >> Ryan > > Thanks! > >>> >>> The problem is kasan code invokes apply_to_page_range(), which enters lazy_mmu >>> mode unconditionally. I would claim that is rather an obstacle for the kasan >>> code, not a benefit. But it needs to be tackled. >>>> Should apply_to_page_range() had an option not to enter the lazy_mmu mode >>> (e.g. an extra "bool skip_lazy" parameter) - the pause/resume could have >>> been avoided. >>> >>>> Thanks, >>>> Ryan >>> >>> Thanks! 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Nov 2025 12:31:24.6327 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bad8da4d-b0d8-4b84-e265-08de211e3a79 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015CC.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5753 Hi, On Wed Oct 29, 2025 at 7:26 PM CET, Teddy Astie wrote: > Introduce a new flag to force the x2APIC enabled and preventing a > guest from switching back LAPIC to xAPIC mode. I don't think you can really do this on AMD without advertising it somehow. And there's no architectural way to do so. > > The semantics of this mode are based IA32_XAPIC_DISABLE_STATUS > architectural MSR of Intel specification. Yes, I can see this being usable and a good idea on Intel hardware. > > Signed-off-by: Teddy Astie > --- > This feature can be useful for various reasons, starting with SEV as > it is complicated (especially with SEV-ES) to handle MMIO, and legacy > xAPIC is one thing that needs MMIO intercepts (and Linux uses it during > boot unless x2APIC is initially enabled, even if it switches to > x2apic afterward). It could also be interesting to reduce the attack > surface of the hypervisor (by only exposing x2apic to the guest). On AMD (again, AFAIK) you do have to implement xAPIC support to provide a t= rue AMD-like system. Anything else would be a Xen-specific extension. The intended way to go around trap-and-emulate for xAPIC access is to bite = the bullet and implement accelerated AVIC. That has explicit provisions to enab= le SEV operation and would have the neat benefit of elliding certain VMEXITs (= i.e: EOI). It'd also simplify MSI delivery on non-oversubscribed CPUs. I assume you already looked at it and concluded it was more work than you c= ould afford, but thought I'd bring it up anyway. > > As it can allow to have MMIO-less guest (using PVH), perhaps it can > be enough for avoiding the problematic cases of virtualized INVLPGB > (when we have it). > > In my testing, Linux, FreeBSD and PV-shim works fine with it; OVMF > freezes for some reason, NetBSD doesn't support it (no x2apic support > as Xen guest). HVM BIOS gets stuck at SeaBIOS as it expects booting > with xAPIC. > > On Intel platforms, it would be better to expose the > IA32_XAPIC_DISABLE_STATUS architectural MSR to advertise this to > guest, but it's non-trivial as it needs to be properly exposed > through IA32_ARCH_CAPABILITIES which is currently passed-through. ARCH_CAPS is part of the CPU policy. You can have toolstack set the bit and have Xen take the hint. Then it'd also be sent on the migrate stream. Granted, that wouldn't help you on AMD hardware, but it'd be perfectly spec-compliant on Intel. A different take might be to have a Xen-specific b= it in the hypervisor leaves, mirroring the arch_caps bit. I think SeaBIOS, OVMF and NetBSD failing to boot gives you a hint that, whi= le this might be a good idea for some cases, you do need xAPIC for a general purpose VM. IMO, at least. > > docs/man/xl.cfg.5.pod.in | 7 +++++++ > tools/libs/light/libxl_types.idl | 1 + > tools/libs/light/libxl_x86.c | 4 ++++ > tools/xl/xl_parse.c | 1 + > xen/arch/x86/domain.c | 2 +- > xen/arch/x86/hvm/hvm.c | 2 ++ > xen/arch/x86/hvm/vlapic.c | 23 ++++++++++++++++++++++- > xen/arch/x86/include/asm/domain.h | 2 ++ > xen/arch/x86/include/asm/hvm/domain.h | 3 +++ > xen/include/public/arch-x86/xen.h | 12 +++++++++++- > 10 files changed, 54 insertions(+), 3 deletions(-) > > diff --git a/docs/man/xl.cfg.5.pod.in b/docs/man/xl.cfg.5.pod.in > index ad1553c5e9..01b41d93c0 100644 > --- a/docs/man/xl.cfg.5.pod.in > +++ b/docs/man/xl.cfg.5.pod.in > @@ -3198,6 +3198,13 @@ option. > =20 > If using this option is necessary to fix an issue, please report a bug. > =20 > +=3Ditem B nit: I'd say "x2apic_only" to show not only that it starts in x2apic mode, = but also that it must stay that way. But tomato-tomahto. > + > +Force the LAPIC in x2APIC mode and prevent the guest from disabling > +it or switching to xAPIC mode. The "or switching to xAPIC mode" part is redundant. The means to transition= to xAPIC mode is through disabling it. > + > +This option is disabled by default. > + > =3Dback > =20 > =3Dhead1 SEE ALSO > diff --git a/tools/libs/light/libxl_types.idl b/tools/libs/light/libxl_ty= pes.idl > index d64a573ff3..b95278007e 100644 > --- a/tools/libs/light/libxl_types.idl > +++ b/tools/libs/light/libxl_types.idl > @@ -738,6 +738,7 @@ libxl_domain_build_info =3D Struct("domain_build_info= ",[ > ("arm_sci", libxl_arm_sci), > ])), > ("arch_x86", Struct(None, [("msr_relaxed", libxl_defbool), > + ("force_x2apic", libxl_defbool) > ])), > # Alternate p2m is not bound to any architecture or guest type, as i= t is > # supported by x86 HVM and ARM support is planned. > diff --git a/tools/libs/light/libxl_x86.c b/tools/libs/light/libxl_x86.c > index 60d4e8661c..2e0205d2a2 100644 > --- a/tools/libs/light/libxl_x86.c > +++ b/tools/libs/light/libxl_x86.c > @@ -26,6 +26,9 @@ int libxl__arch_domain_prepare_config(libxl__gc *gc, > if (libxl_defbool_val(d_config->b_info.arch_x86.msr_relaxed)) > config->arch.misc_flags |=3D XEN_X86_MSR_RELAXED; > =20 > + if (libxl_defbool_val(d_config->b_info.arch_x86.force_x2apic)) > + config->arch.misc_flags |=3D XEN_X86_FORCE_X2APIC; > + > if (libxl_defbool_val(d_config->b_info.trap_unmapped_accesses)) { > LOG(ERROR, "trap_unmapped_accesses is not supported on x86\n= "); > return ERROR_FAIL; > @@ -818,6 +821,7 @@ int libxl__arch_domain_build_info_setdefault(libxl__g= c *gc, > { > libxl_defbool_setdefault(&b_info->acpi, true); > libxl_defbool_setdefault(&b_info->arch_x86.msr_relaxed, false); > + libxl_defbool_setdefault(&b_info->arch_x86.force_x2apic, false); > libxl_defbool_setdefault(&b_info->trap_unmapped_accesses, false); > =20 > if (b_info->type =3D=3D LIBXL_DOMAIN_TYPE_HVM) { > diff --git a/tools/xl/xl_parse.c b/tools/xl/xl_parse.c > index af86d3186d..d84ab7c823 100644 > --- a/tools/xl/xl_parse.c > +++ b/tools/xl/xl_parse.c > @@ -3041,6 +3041,7 @@ skip_usbdev: > "If it fixes an issue you are having please report t= o " > "xen-devel@lists.xenproject.org.\n"); > =20 > + xlu_cfg_get_defbool(config, "force_x2apic", &b_info->arch_x86.force_= x2apic, 0); > xlu_cfg_get_defbool(config, "vpmu", &b_info->vpmu, 0); > =20 > xlu_cfg_destroy(config); > diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c > index 19fd86ce88..02f650a614 100644 > --- a/xen/arch/x86/domain.c > +++ b/xen/arch/x86/domain.c > @@ -704,7 +704,7 @@ int arch_sanitise_domain_config(struct xen_domctl_cre= atedomain *config) > return -EINVAL; > } > =20 > - if ( config->arch.misc_flags & ~XEN_X86_MSR_RELAXED ) > + if ( config->arch.misc_flags & ~(XEN_X86_MSR_RELAXED | XEN_X86_FORCE= _X2APIC) ) As I said, I'd reuse the bit in ARCH_CAPS in the CPU policy. That also mean= s it can be properly migrated and you wouldn't need an extra boolean in the doma= in. > { > dprintk(XENLOG_INFO, "Invalid arch misc flags %#x\n", > config->arch.misc_flags); > diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c > index 0c60faa39d..73cbac0f22 100644 > --- a/xen/arch/x86/hvm/hvm.c > +++ b/xen/arch/x86/hvm/hvm.c > @@ -616,6 +616,8 @@ int hvm_domain_initialise(struct domain *d, > INIT_LIST_HEAD(&d->arch.hvm.mmcfg_regions); > INIT_LIST_HEAD(&d->arch.hvm.msix_tables); > =20 > + d->arch.hvm.force_x2apic =3D config->arch.misc_flags & XEN_X86_FORCE= _X2APIC; > + > rc =3D create_perdomain_mapping(d, PERDOMAIN_VIRT_START, 0, NULL, NU= LL); > if ( rc ) > goto fail; > diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c > index 993e972cd7..ae8df70d2e 100644 > --- a/xen/arch/x86/hvm/vlapic.c > +++ b/xen/arch/x86/hvm/vlapic.c > @@ -1116,6 +1116,20 @@ int guest_wrmsr_apic_base(struct vcpu *v, uint64_t= val) > if ( !has_vlapic(v->domain) ) > return X86EMUL_EXCEPTION; > =20 > + if ( has_force_x2apic(v->domain) ) > + { > + /* > + * We implement the same semantics as MSR_IA32_XAPIC_DISABLE_STAT= US: > + * LEGACY_XAPIC_DISABLED which rejects any attempt at clearing > + * IA32_APIC_BASE.EXTD, thus forcing the LAPIC in x2APIC mode. > + */ > + if ( !(val & APIC_BASE_EXTD) ) > + { > + gprintk(XENLOG_WARNING, "tried to disable x2APIC while force= d on\n"); This is intended behaviour, not a warning. I'd remove the printk. > + return X86EMUL_EXCEPTION; > + } > + } > + > /* Attempting to set reserved bits? */ > if ( val & ~(APIC_BASE_ADDR_MASK | APIC_BASE_ENABLE | APIC_BASE_BSP = | > (cp->basic.x2apic ? APIC_BASE_EXTD : 0)) ) > @@ -1474,7 +1488,14 @@ void vlapic_reset(struct vlapic *vlapic) > if ( v->vcpu_id =3D=3D 0 ) > vlapic->hw.apic_base_msr |=3D APIC_BASE_BSP; > =20 > - vlapic_set_reg(vlapic, APIC_ID, (v->vcpu_id * 2) << 24); > + if ( has_force_x2apic(v->domain) ) > + { > + vlapic->hw.apic_base_msr |=3D APIC_BASE_EXTD; > + set_x2apic_id(vlapic); > + } > + else > + vlapic_set_reg(vlapic, APIC_ID, (v->vcpu_id * 2) << 24); > + > vlapic_do_init(vlapic); > } > =20 > diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm= /domain.h > index 5df8c78253..771992d156 100644 > --- a/xen/arch/x86/include/asm/domain.h > +++ b/xen/arch/x86/include/asm/domain.h > @@ -509,6 +509,8 @@ struct arch_domain > #define has_pirq(d) (!!((d)->arch.emulation_flags & X86_EMU_USE_P= IRQ)) > #define has_vpci(d) (!!((d)->arch.emulation_flags & X86_EMU_VPCI)= ) > =20 > +#define has_force_x2apic(d) ((d)->arch.hvm.force_x2apic) This would be a check on the CPU policy instead with my proposed change. > + > #define gdt_ldt_pt_idx(v) \ > ((v)->vcpu_id >> (PAGETABLE_ORDER - GDT_LDT_VCPU_SHIFT)) > #define pv_gdt_ptes(v) \ > diff --git a/xen/arch/x86/include/asm/hvm/domain.h b/xen/arch/x86/include= /asm/hvm/domain.h > index 333501d5f2..b56fa08b73 100644 > --- a/xen/arch/x86/include/asm/hvm/domain.h > +++ b/xen/arch/x86/include/asm/hvm/domain.h > @@ -108,6 +108,9 @@ struct hvm_domain { > /* Compatibility setting for a bug in x2APIC LDR */ > bool bug_x2apic_ldr_vcpu_id; > =20 > + /* LAPIC is forced in x2APIC mode */ > + bool force_x2apic; > + > /* hypervisor intercepted msix table */ > struct list_head msixtbl_list; > =20 > diff --git a/xen/include/public/arch-x86/xen.h b/xen/include/public/arch-= x86/xen.h > index b99a691706..75aa31d9ed 100644 > --- a/xen/include/public/arch-x86/xen.h > +++ b/xen/include/public/arch-x86/xen.h > @@ -309,11 +309,21 @@ struct xen_arch_domainconfig { > * doesn't allow the guest to read or write to the underlying MSR. > */ > #define XEN_X86_MSR_RELAXED (1u << 0) > + > +/* > + * This option forces the LAPIC to be in X2APIC mode (IA32_APIC_BASE.EXT= D =3D 1) > + * using the same semantics as IA32_XAPIC_DISABLE_STATUS:LEGACY_XAPIC_DI= SABLED > + * > + * Attempts by the guest to clear IA32_APIC_BASE.EXTD (e.g disable X2API= C) will > + * inject #GP in the guest. > + */ > +#define XEN_X86_FORCE_X2APIC (1U << 1) > + > uint32_t misc_flags; > }; > =20 > /* Max XEN_X86_* constant. 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Nov 2025 12:36:16.6058 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4ca7e65d-8e2d-48c3-bf57-08de211ee87d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B071.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4203 On Thu Oct 30, 2025 at 8:46 AM CET, Jan Beulich wrote: > On 30.10.2025 00:08, Grygorii Strashko wrote: >> On 29.10.25 20:26, Teddy Astie wrote: >>> --- a/xen/arch/x86/include/asm/domain.h >>> +++ b/xen/arch/x86/include/asm/domain.h >>> @@ -509,6 +509,8 @@ struct arch_domain >>> #define has_pirq(d) (!!((d)->arch.emulation_flags & X86_EMU_US= E_PIRQ)) >>> #define has_vpci(d) (!!((d)->arch.emulation_flags & X86_EMU_VP= CI)) >>> =20 >>> +#define has_force_x2apic(d) ((d)->arch.hvm.force_x2apic) >>=20 >> Would it be possible for you to consider having Kconfig option to make >> such configuration global, static? > > Especially considering the post-commit-message remarks I don't think this= can be > other than a per-guest setting. > > Jan It'd certainly be of use to us to compile out the entirety of xAPIC emulati= on in favour of x2APIC. Granted, it imposes restrictions on what guests are able to run and how, bu= t that might be acceptable in the interest of a leaner hypervisor. It is fairly annoying there's no architectural means to signal it. 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OSes don't tend to switch out of x2APIC mode, especially if it was set by firmware. IA32_XAPIC_DISABLE_STATUS is garbage.  It was an emergency "fix" the fact that the entire L2 cache datastream was architecturally visible in the xAPIC MMIO window, included decrypted SGX contents.  Furthermore, upon this being discussed, and it being pointed out that the proper place to put the lock bit would be in MSR_APIC_BASE itself, Intel declined citing "too much effort to qualify".  So we're left with this instead. We do virtualise one Intel control on AMD for the benefit of L1, but AMD have finally grown CPUID Faulting into an architectural feature so we can see about retiring the old bodge. But, the Local APIC is far more complicated, and which mode you want depends more on which hardware acceleration is available to you, and there's a huge amount of work needing to do to get our x2APIC support into better shape. Either way, start simple by starting the guest in x2APIC mode.  It will probably be sufficient for your needs. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue Nov 11 15:57:12 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 15:57:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159070.1487462 (Exim 4.92) (envelope-from ) id 1vIqjq-00064A-1p; Tue, 11 Nov 2025 15:56:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159070.1487462; Tue, 11 Nov 2025 15:56:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIqjp-000643-VV; Tue, 11 Nov 2025 15:56:57 +0000 Received: by outflank-mailman (input) for mailman id 1159070; Tue, 11 Nov 2025 15:56:57 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIqjp-00063t-1q for xen-devel@lists.xenproject.org; Tue, 11 Nov 2025 15:56:57 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 0aedf674-bf17-11f0-9d18-b5c5bf9af7f9; Tue, 11 Nov 2025 16:56:54 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5ECCC2F; Tue, 11 Nov 2025 07:56:45 -0800 (PST) Received: from [10.57.38.153] (unknown [10.57.38.153]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 489953F63F; Tue, 11 Nov 2025 07:56:47 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 0aedf674-bf17-11f0-9d18-b5c5bf9af7f9 Message-ID: <58fd1a6e-f2c4-421c-9b95-dea4b244a515@arm.com> Date: Tue, 11 Nov 2025 16:56:44 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 07/12] mm: enable lazy_mmu sections to nest To: Ryan Roberts , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-8-kevin.brodsky@arm.com> <999feffa-5d1d-42e3-bd3a-d949f2a9de9d@arm.com> <824bf705-e9d6-4eeb-9532-9059fa56427f@arm.com> From: Kevin Brodsky Content-Language: en-GB In-Reply-To: <824bf705-e9d6-4eeb-9532-9059fa56427f@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 11/11/2025 10:24, Ryan Roberts wrote: > [...] > >>>> + state->active = true; >>>> + arch_enter_lazy_mmu_mode(); >>>> + } >>>> } >>>> >>>> static inline void lazy_mmu_mode_disable(void) >>>> { >>>> - arch_leave_lazy_mmu_mode(); >>>> + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; >>>> + >>>> + VM_WARN_ON_ONCE(state->nesting_level == 0); >>>> + VM_WARN_ON(!state->active); >>>> + >>>> + if (--state->nesting_level == 0) { >>>> + state->active = false; >>>> + arch_leave_lazy_mmu_mode(); >>>> + } else { >>>> + /* Exiting a nested section */ >>>> + arch_flush_lazy_mmu_mode(); >>>> + } >>>> } >>>> >>>> static inline void lazy_mmu_mode_pause(void) >>>> { >>>> + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; >>>> + >>>> + VM_WARN_ON(state->nesting_level == 0 || !state->active); >>> nit: do you need the first condition? I think when nesting_level==0, we expect >>> to be !active? >> I suppose this should never happen indeed - I was just being extra >> defensive. >> >> Either way David suggested allowing pause()/resume() to be called >> outside of any section so the next version will bail out on >> nesting_level == 0. > Ignoring my current opinion that we don't need pause/resume at all for now; Are > you suggesting that pause/resume will be completely independent of > enable/disable? I think that would be best. So enable/disable increment and > decrement the nesting_level counter regardless of whether we are paused. > nesting_level 0 => 1 enables if not paused. nesting_level 1 => 0 disables if not > paused. pause disables nesting_level >= 1, resume enables if nesting_level >= 1. This is something else. Currently the rules are: [A] // pausing forbidden enable()     pause()     // pausing/enabling forbidden     resume() disable() David suggested allowing: [B] pause() // pausing/enabling forbidden resume() Your suggestion is also allowing: [C] pause()     // pausing forbidden     enable()     disable() resume() > Perhaps we also need nested pause/resume? Then you just end up with 2 counters; > enable_count and pause_count. Sorry if this has already been discussed. And finally: [D] pause()     pause()         enable()         disable()     resume() resume() I don't really mind either way, but I don't see an immediate use for [C] and [D] - the idea is that the paused section is short and controlled, not made up of arbitrary calls. A potential downside of allowing [C] and [D] is that it makes it harder to detect unintended nesting (fewer VM_WARN assertions). Happy to implement it if this proves useful though. OTOH the idea behind [B] is that it allows the caller of pause()/resume() not to care about whether lazy MMU is actually enabled or not - i.e. the kasan helpers would keep working even if apply_to_page_range() didn't use lazy MMU any more. >>>> + >>>> + state->active = false; >>>> arch_leave_lazy_mmu_mode(); >>>> } >>>> >>>> static inline void lazy_mmu_mode_resume(void) >>>> { >>>> + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; >>>> + >>>> + VM_WARN_ON(state->nesting_level == 0 || state->active); >>> Similar argument? >>> >>>> + >>>> + state->active = true; >>>> arch_enter_lazy_mmu_mode(); >>>> } >>>> #else >>>> diff --git a/include/linux/sched.h b/include/linux/sched.h >>>> index cbb7340c5866..11566d973f42 100644 >>>> --- a/include/linux/sched.h >>>> +++ b/include/linux/sched.h >>>> @@ -1441,6 +1441,10 @@ struct task_struct { >>>> >>>> struct page_frag task_frag; >>>> >>>> +#ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE >>>> + struct lazy_mmu_state lazy_mmu_state; >>>> +#endif >>>> + >>>> #ifdef CONFIG_TASK_DELAY_ACCT >>>> struct task_delay_info *delays; >>>> #endif >>>> @@ -1724,6 +1728,18 @@ static inline char task_state_to_char(struct task_struct *tsk) >>>> return task_index_to_char(task_state_index(tsk)); >>>> } >>>> >>>> +#ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE >>>> +static inline bool in_lazy_mmu_mode(void) >>>> +{ >>>> + return current->lazy_mmu_state.active; >>>> +} >>>> +#else >>>> +static inline bool in_lazy_mmu_mode(void) >>>> +{ >>>> + return false; >>> Just pointing out that this isn't really a correct implementation: >>> >>> lazy_mmu_mode_enable() >>> ASSERT(in_lazy_mmu_mode()) << triggers for arches without lazy mmu >>> lazy_mmu_mode_disable() >>> >>> Although it probably doesn't matter in practice? >> I'd say that the expectation is invalid - lazy MMU mode can only be >> enabled if the architecture supports it. In fact as you pointed out >> above the API may be called in interrupt context but it will have no >> effect, so this sequence would always fail in interrupt context. > Yep, but previously there was no way to query the current state so it didn't > matter. Now you have a query API so it might matter if/when people come along > and use it in unexpected ways. I suppose the best we can do is document it alongside those helpers (David has already suggested some documentation, see patch 11). >> Worth nothing that in_lazy_mmu_mode() is only ever called from arch code >> where lazy MMU is implemented. I added the fallback as a matter of >> principle, but it isn't actually required. > Yes, I agree that's the intent. I'm just wondering if it's possible to enforce > that only arch code uses this. Perhaps add some docs to explain that it's only > intended for arches that implement lazy_mmu, and don't define it for arches that > don't, which would catch any generic users? Yep sounds like the best option - a lot less risk of misuse if it can't be called from generic code :) The build would still succeed on arch's that implement it, but the kernel CI should catch such calls sooner or later. - Kevin From xen-devel-bounces@lists.xenproject.org Tue Nov 11 16:20:14 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 16:20:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159088.1487484 (Exim 4.92) (envelope-from ) id 1vIr6G-000280-1j; Tue, 11 Nov 2025 16:20:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159088.1487484; Tue, 11 Nov 2025 16:20:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIr6F-00027t-VJ; Tue, 11 Nov 2025 16:20:07 +0000 Received: by outflank-mailman (input) for mailman id 1159088; Tue, 11 Nov 2025 16:20:06 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIr6E-00027n-H7 for xen-devel@lists.xenproject.org; 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Tue, 11 Nov 2025 16:20:02 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 480d5dff-bf1a-11f0-9d18-b5c5bf9af7f9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1762878003; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=TXYSHdawEHsmAGrSuze4VfCWTtsO74yLxzbTMsz6XcM=; b=AU65P3BxWF54Au3Kya+Xi2n94jCp9F7Gs4l+DqAztevlIYHQY1NDYHnJTWVGLjk1b7Mz7Y XBJQ6Uozr/81bv56iYzTToFyP8C8VlzZzxeILcwa8i6L89jPOAWUEk7Jwrgsizdy9F/VXW tbhkMfWEeW+PjCrGuigAJM7X4eMxLMc= Authentication-Results: smtp-out1.suse.de; dkim=pass header.d=suse.com header.s=susede1 header.b=BZAFoQz+ DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1762878002; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=TXYSHdawEHsmAGrSuze4VfCWTtsO74yLxzbTMsz6XcM=; b=BZAFoQz+MzPpyyg+eNf7+YW91Z9S02jRb422qIbTaiD91QaM4kJHdk9+lipcl5sAVsIHuK w0yQX+yRkv6VrGWdatiDah/oHuvwYMFy39aZ/wXHnq5YWovy6AjE5I9DUEYkzaUS1dJ0ML 2PCZyw/YrLl6RACMdN5OmVw+xY3GGmw= From: Juergen Gross To: xen-devel@lists.xenproject.org Cc: Juergen Gross , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Christian Lindig , David Scott Subject: [PATCH 0/5] configure: reduce number of files created Date: Tue, 11 Nov 2025 17:19:54 +0100 Message-ID: <20251111161959.13667-1-jgross@suse.com> X-Mailer: git-send-email 2.51.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Level: X-Spam-Flag: NO X-Rspamd-Queue-Id: 6C55521CE5 X-Rspamd-Action: no action X-Rspamd-Server: rspamd1.dmz-prg2.suse.org X-Spamd-Result: default: False [-3.01 / 50.00]; BAYES_HAM(-3.00)[99.99%]; NEURAL_HAM_LONG(-1.00)[-1.000]; MID_CONTAINS_FROM(1.00)[]; R_MISSING_CHARSET(0.50)[]; R_DKIM_ALLOW(-0.20)[suse.com:s=susede1]; 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This reduces the need to run configure when e.g. changing a man page containing a path defined by the configure run. Juergen Gross (5): config: remove stale definition from Config.mk build: add new make pattern for making file from file.src docs: rename *.in files to *.src config: remove unused paths from config/Paths.mk.in tools: rename most *.in files to *.src .gitignore | 1 + Config.mk | 20 ++++++++++++------ config/Paths.mk.in | 5 ----- config/Tools-paths.mk.in | 10 +++++++++ docs/Makefile | 8 ++++++- docs/configure | 7 +------ docs/configure.ac | 9 +------- ...pod.in => xl-disk-configuration.5.pod.src} | 0 ....in => xl-network-configuration.5.pod.src} | 0 docs/man/{xl.1.pod.in => xl.1.pod.src} | 0 .../man/{xl.cfg.5.pod.in => xl.cfg.5.pod.src} | 0 .../{xl.conf.5.pod.in => xl.conf.5.pod.src} | 0 tools/configure | 21 ++----------------- tools/configure.ac | 19 +---------------- tools/hotplug/FreeBSD/Makefile | 8 ++++++- .../rc.d/{xencommons.in => xencommons.src} | 0 ...xendriverdomain.in => xendriverdomain.src} | 0 tools/hotplug/Linux/Makefile | 11 +++++++++- ...xencommons.in => sysconfig.xencommons.src} | 0 ...xendomains.in => sysconfig.xendomains.src} | 0 .../{xen-watchdog.in => xen-watchdog.src} | 0 .../init.d/{xencommons.in => xencommons.src} | 0 .../init.d/{xendomains.in => xendomains.src} | 0 ...xendriverdomain.in => xendriverdomain.src} | 0 ...launch-xenstore.in => launch-xenstore.src} | 0 .../Linux/{vif-setup.in => vif-setup.src} | 0 ...common.sh.in => xen-hotplug-common.sh.src} | 0 .../Linux/{xendomains.in => xendomains.src} | 0 tools/hotplug/NetBSD/Makefile | 8 ++++++- .../rc.d/{xencommons.in => xencommons.src} | 0 ...xendriverdomain.in => xendriverdomain.src} | 0 tools/hotplug/common/Makefile | 5 ++++- .../{hotplugpath.sh.in => hotplugpath.sh.src} | 0 tools/ocaml/libs/xs/Makefile | 7 +++++++ .../libs/xs/{paths.ml.in => paths.ml.src} | 0 tools/ocaml/xenstored/Makefile | 7 ++++++- ...oxenstored.conf.in => oxenstored.conf.src} | 0 .../xenstored/{paths.ml.in => paths.ml.src} | 0 38 files changed, 78 insertions(+), 68 deletions(-) create mode 100644 config/Tools-paths.mk.in rename docs/man/{xl-disk-configuration.5.pod.in => xl-disk-configuration.5.pod.src} (100%) rename docs/man/{xl-network-configuration.5.pod.in => xl-network-configuration.5.pod.src} (100%) rename docs/man/{xl.1.pod.in => xl.1.pod.src} (100%) rename docs/man/{xl.cfg.5.pod.in => xl.cfg.5.pod.src} (100%) rename docs/man/{xl.conf.5.pod.in => xl.conf.5.pod.src} (100%) rename tools/hotplug/FreeBSD/rc.d/{xencommons.in => xencommons.src} (100%) rename tools/hotplug/FreeBSD/rc.d/{xendriverdomain.in => xendriverdomain.src} (100%) rename tools/hotplug/Linux/init.d/{sysconfig.xencommons.in => sysconfig.xencommons.src} (100%) rename tools/hotplug/Linux/init.d/{sysconfig.xendomains.in => sysconfig.xendomains.src} (100%) rename tools/hotplug/Linux/init.d/{xen-watchdog.in => xen-watchdog.src} (100%) rename tools/hotplug/Linux/init.d/{xencommons.in => xencommons.src} (100%) rename tools/hotplug/Linux/init.d/{xendomains.in => xendomains.src} (100%) rename tools/hotplug/Linux/init.d/{xendriverdomain.in => xendriverdomain.src} (100%) rename tools/hotplug/Linux/{launch-xenstore.in => launch-xenstore.src} (100%) rename tools/hotplug/Linux/{vif-setup.in => vif-setup.src} (100%) rename tools/hotplug/Linux/{xen-hotplug-common.sh.in => xen-hotplug-common.sh.src} (100%) rename tools/hotplug/Linux/{xendomains.in => xendomains.src} (100%) rename tools/hotplug/NetBSD/rc.d/{xencommons.in => xencommons.src} (100%) rename tools/hotplug/NetBSD/rc.d/{xendriverdomain.in => xendriverdomain.src} (100%) rename tools/hotplug/common/{hotplugpath.sh.in => hotplugpath.sh.src} (100%) rename tools/ocaml/libs/xs/{paths.ml.in => paths.ml.src} (100%) rename tools/ocaml/xenstored/{oxenstored.conf.in => oxenstored.conf.src} (100%) rename tools/ocaml/xenstored/{paths.ml.in => paths.ml.src} (100%) -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Tue Nov 11 16:20:14 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 16:20:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159089.1487494 (Exim 4.92) (envelope-from ) id 1vIr6I-0002Ld-7v; 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Signed-off-by: Juergen Gross --- Config.mk | 6 ------ 1 file changed, 6 deletions(-) diff --git a/Config.mk b/Config.mk index 7edbab8efe..e1556dfbfa 100644 --- a/Config.mk +++ b/Config.mk @@ -149,12 +149,6 @@ else date = $(shell LC_ALL=C date $(1)) endif -define buildmakevars2shellvars - export PREFIX="$(prefix)"; \ - export XEN_SCRIPT_DIR="$(XEN_SCRIPT_DIR)"; \ - export XEN_ROOT="$(XEN_ROOT)" -endef - # # Compare $(1) and $(2) and replace $(2) with $(1) if they differ # -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Tue Nov 11 16:20:18 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 16:20:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159090.1487504 (Exim 4.92) (envelope-from ) id 1vIr6Q-0002fL-Fq; Tue, 11 Nov 2025 16:20:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159090.1487504; Tue, 11 Nov 2025 16:20:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIr6Q-0002fE-CF; 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dkim=pass header.d=suse.com header.s=susede1 header.b=tOGIctiu DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1762878013; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6/icCTTtv5rJ6FYoAuIqJyhSavJniLkM4kKGv1wpb8o=; b=tOGIctiuADyOGbDT4ZOWRU9iDqJFmnl3cOXk3NsGSXTujVd6V9nTFzpNm/R1qaXxqANtSz tWIm7VFr8wPXL/RbyM0GH515oGnr/pv+gDtXiTHV5V+ntMjeJD0l1cwMbklyjQ7Uc3xgQW kyePb/BXc8kyOapdYScJY3GCOLrv7vk= From: Juergen Gross To: xen-devel@lists.xenproject.org Cc: Juergen Gross , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH 2/5] build: add new make pattern for making file from file.src Date: Tue, 11 Nov 2025 17:19:56 +0100 Message-ID: <20251111161959.13667-3-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251111161959.13667-1-jgross@suse.com> References: <20251111161959.13667-1-jgross@suse.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Rspamd-Queue-Id: EA1CF21CE5 X-Rspamd-Server: rspamd2.dmz-prg2.suse.org X-Spamd-Result: default: False [-3.01 / 50.00]; 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Define the recipe as a macro in order to avoid replicating it for cases where it needs to handle subdirectories (creating / from /.src). This can be used instead of the current approach to perform the similar step for file.in during ./configure by renaming the source file to file.src. This will avoid having to run ./configure just because of modifying a file depending on a variable set by configure. Prepare to have multiple files as source for the replacement patterns. Signed-off-by: Juergen Gross --- Config.mk | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/Config.mk b/Config.mk index e1556dfbfa..0ea1640371 100644 --- a/Config.mk +++ b/Config.mk @@ -159,6 +159,20 @@ define move-if-changed if ! cmp -s $(1) $(2); then mv -f $(1) $(2); else rm -f $(1); fi endef +PATH_FILES := Paths +INC_FILES := $(foreach f, $(PATH_FILES), $(XEN_ROOT)/config/$(f).mk) + +include $(INC_FILES) + +BUILD_MAKE_VARS := $(foreach f, $(PATH_FILES), $(shell awk '$$2 == ":=" { print $$1; }' $(XEN_ROOT)/config/$(f).mk.in)) + +define apply-build-vars + sed $(foreach v, $(BUILD_MAKE_VARS), -e 's#@$(v)@#$($(v))#g') <$< >$@ +endef + +%:: %.src + $(apply-build-vars) + CFLAGS += -fno-strict-aliasing CFLAGS += -std=gnu99 -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Tue Nov 11 16:20:22 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 16:20:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159093.1487514 (Exim 4.92) (envelope-from ) id 1vIr6U-0002yE-MW; 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bh=a+soXsd5RJ+tn6vw+rsKME/DKU3Va+AYoo0xgD3bolg=; b=iQu0Lniq9q9KFB5LLSufnptCv2dv0wVj/G7cbRshOi3prYanYMOKX3UuPDFPr1paEVE3HM oF+WE+Kze2uLABmbG2dgIpfm63yK9dDYIwOdrjFbOiXQjmpaqYgiVdh8Phdn/niSPj56BT jshC8s6j5hIqx/McrkbobT/d13V7prY= Authentication-Results: smtp-out1.suse.de; none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1762878019; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=a+soXsd5RJ+tn6vw+rsKME/DKU3Va+AYoo0xgD3bolg=; b=iQu0Lniq9q9KFB5LLSufnptCv2dv0wVj/G7cbRshOi3prYanYMOKX3UuPDFPr1paEVE3HM oF+WE+Kze2uLABmbG2dgIpfm63yK9dDYIwOdrjFbOiXQjmpaqYgiVdh8Phdn/niSPj56BT jshC8s6j5hIqx/McrkbobT/d13V7prY= From: Juergen Gross To: xen-devel@lists.xenproject.org Cc: Juergen Gross , Anthony PERARD Subject: [PATCH 3/5] docs: rename *.in files to *.src Date: Tue, 11 Nov 2025 17:19:57 +0100 Message-ID: <20251111161959.13667-4-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251111161959.13667-1-jgross@suse.com> References: <20251111161959.13667-1-jgross@suse.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spamd-Result: default: False [-2.80 / 50.00]; BAYES_HAM(-3.00)[100.00%]; NEURAL_HAM_LONG(-1.00)[-1.000]; MID_CONTAINS_FROM(1.00)[]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-0.999]; MIME_GOOD(-0.10)[text/plain]; TO_MATCH_ENVRCPT_ALL(0.00)[]; FROM_HAS_DN(0.00)[]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; TO_DN_SOME(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.com:mid,suse.com:email,pod.in:url,imap1.dmz-prg2.suse.org:helo]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; FUZZY_RATELIMITED(0.00)[rspamd.com]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; RCPT_COUNT_THREE(0.00)[3]; RCVD_TLS_ALL(0.00)[] X-Spam-Flag: NO X-Spam-Score: -2.80 X-Spam-Level: Rename the *.in files under docs to *.src, resulting to replace the @...@ markers only at build time. This allows to change the affected document files without having to run "configure" for making the change effective. While at it add the generated files to the distclean make target. Signed-off-by: Juergen Gross --- docs/Makefile | 8 +++++++- docs/configure | 7 +------ docs/configure.ac | 9 +-------- ...guration.5.pod.in => xl-disk-configuration.5.pod.src} | 0 ...ation.5.pod.in => xl-network-configuration.5.pod.src} | 0 docs/man/{xl.1.pod.in => xl.1.pod.src} | 0 docs/man/{xl.cfg.5.pod.in => xl.cfg.5.pod.src} | 0 docs/man/{xl.conf.5.pod.in => xl.conf.5.pod.src} | 0 8 files changed, 9 insertions(+), 15 deletions(-) rename docs/man/{xl-disk-configuration.5.pod.in => xl-disk-configuration.5.pod.src} (100%) rename docs/man/{xl-network-configuration.5.pod.in => xl-network-configuration.5.pod.src} (100%) rename docs/man/{xl.1.pod.in => xl.1.pod.src} (100%) rename docs/man/{xl.cfg.5.pod.in => xl.cfg.5.pod.src} (100%) rename docs/man/{xl.conf.5.pod.in => xl.conf.5.pod.src} (100%) diff --git a/docs/Makefile b/docs/Makefile index 37776d303c..5d7fbcb032 100644 --- a/docs/Makefile +++ b/docs/Makefile @@ -8,8 +8,10 @@ DATE := $(call date,"+%Y-%m-%d") DOC_ARCHES := arm ppc riscv x86_32 x86_64 MAN_SECTIONS := 1 5 7 8 +GEN-MAN := $(sort $(patsubst %.src,%,$(wildcard man/*.pod.src))) + # Documentation sources to build -MAN-SRC-y := $(sort $(basename $(wildcard man/*.pod man/*.pandoc))) +MAN-SRC-y := $(sort $(basename $(wildcard man/*.pod man/*.pandoc) $(GEN-MAN))) RST-SRC-y := $(sort $(filter-out %index.rst,$(shell find * -type f -name '*.rst' -print))) @@ -77,11 +79,15 @@ clean: clean-man-pages distclean: clean rm -rf $(XEN_ROOT)/config/Docs.mk config.log config.status config.cache \ autom4te.cache + rm -f $(GEN-MAN) # Top level install targets .PHONY: man-pages install-man-pages clean-man-pages uninstall-man-pages +man/%: man/%.src + $(apply-build-vars) + # Metarules for generating manpages. Run with $(1) substitued for section define GENERATE_MANPAGE_RULES diff --git a/docs/configure b/docs/configure index 98dda3cd0f..8871914dcb 100755 --- a/docs/configure +++ b/docs/configure @@ -1794,7 +1794,7 @@ ac_compiler_gnu=$ac_cv_c_compiler_gnu -ac_config_files="$ac_config_files ../config/Docs.mk man/xl.cfg.5.pod man/xl.1.pod man/xl-disk-configuration.5.pod man/xl-network-configuration.5.pod man/xl.conf.5.pod" +ac_config_files="$ac_config_files ../config/Docs.mk" @@ -3063,11 +3063,6 @@ for ac_config_target in $ac_config_targets do case $ac_config_target in "../config/Docs.mk") CONFIG_FILES="$CONFIG_FILES ../config/Docs.mk" ;; - "man/xl.cfg.5.pod") CONFIG_FILES="$CONFIG_FILES man/xl.cfg.5.pod" ;; - "man/xl.1.pod") CONFIG_FILES="$CONFIG_FILES man/xl.1.pod" ;; - "man/xl-disk-configuration.5.pod") CONFIG_FILES="$CONFIG_FILES man/xl-disk-configuration.5.pod" ;; - "man/xl-network-configuration.5.pod") CONFIG_FILES="$CONFIG_FILES man/xl-network-configuration.5.pod" ;; - "man/xl.conf.5.pod") CONFIG_FILES="$CONFIG_FILES man/xl.conf.5.pod" ;; *) as_fn_error $? "invalid argument: \`$ac_config_target'" "$LINENO" 5;; esac diff --git a/docs/configure.ac b/docs/configure.ac index c2e5edd3b3..43dc516056 100644 --- a/docs/configure.ac +++ b/docs/configure.ac @@ -5,14 +5,7 @@ AC_PREREQ([2.67]) AC_INIT([Xen Hypervisor Documentation], m4_esyscmd([../version.sh ../xen/Makefile]), [xen-devel@lists.xen.org], [xen], [https://www.xen.org/]) AC_CONFIG_SRCDIR([misc/xen-command-line.pandoc]) -AC_CONFIG_FILES([ -../config/Docs.mk -man/xl.cfg.5.pod -man/xl.1.pod -man/xl-disk-configuration.5.pod -man/xl-network-configuration.5.pod -man/xl.conf.5.pod -]) +AC_CONFIG_FILES([../config/Docs.mk]) AC_CONFIG_AUX_DIR([../]) # M4 Macro includes diff --git a/docs/man/xl-disk-configuration.5.pod.in b/docs/man/xl-disk-configuration.5.pod.src similarity index 100% rename from docs/man/xl-disk-configuration.5.pod.in rename to docs/man/xl-disk-configuration.5.pod.src diff --git a/docs/man/xl-network-configuration.5.pod.in b/docs/man/xl-network-configuration.5.pod.src similarity index 100% rename from docs/man/xl-network-configuration.5.pod.in rename to docs/man/xl-network-configuration.5.pod.src diff --git a/docs/man/xl.1.pod.in b/docs/man/xl.1.pod.src similarity index 100% rename from docs/man/xl.1.pod.in rename to docs/man/xl.1.pod.src diff --git a/docs/man/xl.cfg.5.pod.in b/docs/man/xl.cfg.5.pod.src similarity index 100% rename from docs/man/xl.cfg.5.pod.in rename to docs/man/xl.cfg.5.pod.src diff --git a/docs/man/xl.conf.5.pod.in b/docs/man/xl.conf.5.pod.src similarity index 100% rename from docs/man/xl.conf.5.pod.in rename to docs/man/xl.conf.5.pod.src -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Tue Nov 11 16:20:27 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 16:20:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159097.1487524 (Exim 4.92) (envelope-from ) id 1vIr6Z-0003Lc-4r; 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bh=Cfv/xgHZLZE2wANukYWztkqRSmV6C5Zi4y/LQSiOMQM=; b=Y2keFVwknK7R+SgY5Tll5//kL6L1r8wxCK2oP6BdCXxS7+yIu6qBXoRJ84z83aCftZGw86 wS0MhKEWQNjE7/AGH1D9mwV/hV7tOASpLHonJ0whcsta5Qc1g5b54avZzej2VjvG/WdgCE FY3q6kOKI4YcB/aGuh2yBiDgo/GnS7U= Authentication-Results: smtp-out1.suse.de; none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1762878025; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Cfv/xgHZLZE2wANukYWztkqRSmV6C5Zi4y/LQSiOMQM=; b=Y2keFVwknK7R+SgY5Tll5//kL6L1r8wxCK2oP6BdCXxS7+yIu6qBXoRJ84z83aCftZGw86 wS0MhKEWQNjE7/AGH1D9mwV/hV7tOASpLHonJ0whcsta5Qc1g5b54avZzej2VjvG/WdgCE FY3q6kOKI4YcB/aGuh2yBiDgo/GnS7U= From: Juergen Gross To: xen-devel@lists.xenproject.org Cc: Juergen Gross , Anthony PERARD Subject: [PATCH 4/5] config: remove unused paths from config/Paths.mk.in Date: Tue, 11 Nov 2025 17:19:58 +0100 Message-ID: <20251111161959.13667-5-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251111161959.13667-1-jgross@suse.com> References: <20251111161959.13667-1-jgross@suse.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Level: X-Spamd-Result: default: False [-2.80 / 50.00]; BAYES_HAM(-3.00)[99.99%]; NEURAL_HAM_LONG(-1.00)[-1.000]; MID_CONTAINS_FROM(1.00)[]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-0.999]; MIME_GOOD(-0.10)[text/plain]; TO_MATCH_ENVRCPT_ALL(0.00)[]; FROM_HAS_DN(0.00)[]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; TO_DN_SOME(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.com:email,suse.com:mid,imap1.dmz-prg2.suse.org:helo]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; FUZZY_RATELIMITED(0.00)[rspamd.com]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; RCPT_COUNT_THREE(0.00)[3]; RCVD_TLS_ALL(0.00)[] X-Spam-Flag: NO X-Spam-Score: -2.80 Some paths in config/Paths.mk.in are used nowhere, so remove them. Signed-off-by: Juergen Gross --- config/Paths.mk.in | 5 ----- 1 file changed, 5 deletions(-) diff --git a/config/Paths.mk.in b/config/Paths.mk.in index bc42748b7a..668545be2f 100644 --- a/config/Paths.mk.in +++ b/config/Paths.mk.in @@ -20,10 +20,7 @@ libexecdir := @libexecdir@ datarootdir := @datarootdir@ mandir := @mandir@ docdir := @docdir@ -dvidir := @dvidir@ htmldir := @htmldir@ -pdfdir := @pdfdir@ -psdir := @psdir@ includedir := @includedir@ localstatedir := @localstatedir@ sysconfdir := @sysconfdir@ @@ -34,8 +31,6 @@ LIBEXEC_LIB := @LIBEXEC_LIB@ LIBEXEC_INC := @LIBEXEC_INC@ SHAREDIR := @SHAREDIR@ -MAN1DIR := $(mandir)/man1 -MAN8DIR := $(mandir)/man8 XEN_RUN_DIR := @XEN_RUN_DIR@ XEN_LOG_DIR := @XEN_LOG_DIR@ -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Tue Nov 11 16:20:36 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 16:20:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159114.1487534 (Exim 4.92) (envelope-from ) id 1vIr6i-000442-Fw; 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Tue, 11 Nov 2025 16:20:31 +0000 (UTC) Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id CB38914A49; Tue, 11 Nov 2025 16:20:30 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id WPYBME5iE2lwDQAAD6G6ig (envelope-from ); Tue, 11 Nov 2025 16:20:30 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 581ec7d4-bf1a-11f0-9d18-b5c5bf9af7f9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1762878031; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=R8kSGCqMJe/YFQNzWivvH+Qqy7p73QZsAmfOgR9P6UU=; b=hJLpvTPUhjeuG1xQvcwENY8hbZXdYxJNftj+YwaMbUD5/3KX69vvWtPiNK5biR8Rg0/GLa x5twkbSTlxXXt46JrZQ4XaIrPBzNfBwridnMn/5sWNEBGKJSy9X3MuZ+MW/D6VLPbLcfBN 21MKc+7NnHuZS2Zd4Rk9JllmvQFxNx4= Authentication-Results: smtp-out1.suse.de; none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1762878031; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=R8kSGCqMJe/YFQNzWivvH+Qqy7p73QZsAmfOgR9P6UU=; b=hJLpvTPUhjeuG1xQvcwENY8hbZXdYxJNftj+YwaMbUD5/3KX69vvWtPiNK5biR8Rg0/GLa x5twkbSTlxXXt46JrZQ4XaIrPBzNfBwridnMn/5sWNEBGKJSy9X3MuZ+MW/D6VLPbLcfBN 21MKc+7NnHuZS2Zd4Rk9JllmvQFxNx4= From: Juergen Gross To: xen-devel@lists.xenproject.org Cc: Juergen Gross , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Christian Lindig , David Scott Subject: [PATCH 5/5] tools: rename most *.in files to *.src Date: Tue, 11 Nov 2025 17:19:59 +0100 Message-ID: <20251111161959.13667-6-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251111161959.13667-1-jgross@suse.com> References: <20251111161959.13667-1-jgross@suse.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spamd-Result: default: False [-2.80 / 50.00]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-0.999]; MIME_GOOD(-0.10)[text/plain]; ARC_NA(0.00)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; MIME_TRACE(0.00)[0:+]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; FUZZY_RATELIMITED(0.00)[rspamd.com]; RCVD_TLS_ALL(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; RCPT_COUNT_SEVEN(0.00)[11]; RCVD_COUNT_TWO(0.00)[2]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:helo] X-Spam-Flag: NO X-Spam-Score: -2.80 X-Spam-Level: Rename the *.in files under tools read by configure to *.src, resulting to replace the @...@ markers only at build time. As some of the markers are local to tools/configure, introduce config/Tools-paths.mk.in and add the related make variables to it. Add Tools-paths to the PATH_FILES make variable in order to include the definitions for replacing themin the *.src files. Add the generated files to the distclean target. Signed-off-by: Juergen Gross --- .gitignore | 1 + Config.mk | 2 +- config/Tools-paths.mk.in | 10 +++++++++ tools/configure | 21 ++----------------- tools/configure.ac | 19 +---------------- tools/hotplug/FreeBSD/Makefile | 8 ++++++- .../rc.d/{xencommons.in => xencommons.src} | 0 ...xendriverdomain.in => xendriverdomain.src} | 0 tools/hotplug/Linux/Makefile | 11 +++++++++- ...xencommons.in => sysconfig.xencommons.src} | 0 ...xendomains.in => sysconfig.xendomains.src} | 0 .../{xen-watchdog.in => xen-watchdog.src} | 0 .../init.d/{xencommons.in => xencommons.src} | 0 .../init.d/{xendomains.in => xendomains.src} | 0 ...xendriverdomain.in => xendriverdomain.src} | 0 ...launch-xenstore.in => launch-xenstore.src} | 0 .../Linux/{vif-setup.in => vif-setup.src} | 0 ...common.sh.in => xen-hotplug-common.sh.src} | 0 .../Linux/{xendomains.in => xendomains.src} | 0 tools/hotplug/NetBSD/Makefile | 8 ++++++- .../rc.d/{xencommons.in => xencommons.src} | 0 ...xendriverdomain.in => xendriverdomain.src} | 0 tools/hotplug/common/Makefile | 5 ++++- .../{hotplugpath.sh.in => hotplugpath.sh.src} | 0 tools/ocaml/libs/xs/Makefile | 7 +++++++ .../libs/xs/{paths.ml.in => paths.ml.src} | 0 tools/ocaml/xenstored/Makefile | 7 ++++++- ...oxenstored.conf.in => oxenstored.conf.src} | 0 .../xenstored/{paths.ml.in => paths.ml.src} | 0 29 files changed, 56 insertions(+), 43 deletions(-) create mode 100644 config/Tools-paths.mk.in rename tools/hotplug/FreeBSD/rc.d/{xencommons.in => xencommons.src} (100%) rename tools/hotplug/FreeBSD/rc.d/{xendriverdomain.in => xendriverdomain.src} (100%) rename tools/hotplug/Linux/init.d/{sysconfig.xencommons.in => sysconfig.xencommons.src} (100%) rename tools/hotplug/Linux/init.d/{sysconfig.xendomains.in => sysconfig.xendomains.src} (100%) rename tools/hotplug/Linux/init.d/{xen-watchdog.in => xen-watchdog.src} (100%) rename tools/hotplug/Linux/init.d/{xencommons.in => xencommons.src} (100%) rename tools/hotplug/Linux/init.d/{xendomains.in => xendomains.src} (100%) rename tools/hotplug/Linux/init.d/{xendriverdomain.in => xendriverdomain.src} (100%) rename tools/hotplug/Linux/{launch-xenstore.in => launch-xenstore.src} (100%) rename tools/hotplug/Linux/{vif-setup.in => vif-setup.src} (100%) rename tools/hotplug/Linux/{xen-hotplug-common.sh.in => xen-hotplug-common.sh.src} (100%) rename tools/hotplug/Linux/{xendomains.in => xendomains.src} (100%) rename tools/hotplug/NetBSD/rc.d/{xencommons.in => xencommons.src} (100%) rename tools/hotplug/NetBSD/rc.d/{xendriverdomain.in => xendriverdomain.src} (100%) rename tools/hotplug/common/{hotplugpath.sh.in => hotplugpath.sh.src} (100%) rename tools/ocaml/libs/xs/{paths.ml.in => paths.ml.src} (100%) rename tools/ocaml/xenstored/{oxenstored.conf.in => oxenstored.conf.src} (100%) rename tools/ocaml/xenstored/{paths.ml.in => paths.ml.src} (100%) diff --git a/.gitignore b/.gitignore index d83427aba8..57d54f676f 100644 --- a/.gitignore +++ b/.gitignore @@ -47,6 +47,7 @@ config.status config.cache config/Toplevel.mk config/Paths.mk +config/Tools-paths.mk dist/* extras/ diff --git a/Config.mk b/Config.mk index 0ea1640371..713fb5eb89 100644 --- a/Config.mk +++ b/Config.mk @@ -159,7 +159,7 @@ define move-if-changed if ! cmp -s $(1) $(2); then mv -f $(1) $(2); else rm -f $(1); fi endef -PATH_FILES := Paths +PATH_FILES := Paths Tools-paths INC_FILES := $(foreach f, $(PATH_FILES), $(XEN_ROOT)/config/$(f).mk) include $(INC_FILES) diff --git a/config/Tools-paths.mk.in b/config/Tools-paths.mk.in new file mode 100644 index 0000000000..ac6298e761 --- /dev/null +++ b/config/Tools-paths.mk.in @@ -0,0 +1,10 @@ +-include $(XEN_ROOT)/config/Paths.mk + +XENSTORED := @XENSTORED@ +XENSTORED_KVA := @XENSTORED_KVA@ +XENSTORED_PORT := @XENSTORED_PORT@ +XEN_RUN_STORED := @XEN_RUN_STORED@ + +LINUX_BACKEND_MODULES := @LINUX_BACKEND_MODULES@ + +qemu_xen_path := @qemu_xen_path@ diff --git a/tools/configure b/tools/configure index 3111f5688c..479c7c9a3c 100755 --- a/tools/configure +++ b/tools/configure @@ -2742,7 +2742,7 @@ ac_compiler_gnu=$ac_cv_c_compiler_gnu -ac_config_files="$ac_config_files ../config/Tools.mk hotplug/common/hotplugpath.sh hotplug/FreeBSD/rc.d/xencommons hotplug/FreeBSD/rc.d/xendriverdomain hotplug/Linux/init.d/sysconfig.xencommons hotplug/Linux/init.d/sysconfig.xendomains hotplug/Linux/init.d/xen-watchdog hotplug/Linux/init.d/xencommons hotplug/Linux/init.d/xendomains hotplug/Linux/init.d/xendriverdomain hotplug/Linux/launch-xenstore hotplug/Linux/vif-setup hotplug/Linux/xen-hotplug-common.sh hotplug/Linux/xendomains hotplug/NetBSD/rc.d/xencommons hotplug/NetBSD/rc.d/xendriverdomain ocaml/libs/xs/paths.ml ocaml/xenstored/paths.ml ocaml/xenstored/oxenstored.conf" +ac_config_files="$ac_config_files ../config/Tools.mk ../config/Tools-paths.mk" ac_config_headers="$ac_config_headers config.h" @@ -11268,24 +11268,7 @@ for ac_config_target in $ac_config_targets do case $ac_config_target in "../config/Tools.mk") CONFIG_FILES="$CONFIG_FILES ../config/Tools.mk" ;; - "hotplug/common/hotplugpath.sh") CONFIG_FILES="$CONFIG_FILES hotplug/common/hotplugpath.sh" ;; - "hotplug/FreeBSD/rc.d/xencommons") CONFIG_FILES="$CONFIG_FILES hotplug/FreeBSD/rc.d/xencommons" ;; - "hotplug/FreeBSD/rc.d/xendriverdomain") CONFIG_FILES="$CONFIG_FILES hotplug/FreeBSD/rc.d/xendriverdomain" ;; - "hotplug/Linux/init.d/sysconfig.xencommons") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/init.d/sysconfig.xencommons" ;; - "hotplug/Linux/init.d/sysconfig.xendomains") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/init.d/sysconfig.xendomains" ;; - "hotplug/Linux/init.d/xen-watchdog") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/init.d/xen-watchdog" ;; - "hotplug/Linux/init.d/xencommons") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/init.d/xencommons" ;; - "hotplug/Linux/init.d/xendomains") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/init.d/xendomains" ;; - "hotplug/Linux/init.d/xendriverdomain") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/init.d/xendriverdomain" ;; - "hotplug/Linux/launch-xenstore") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/launch-xenstore" ;; - "hotplug/Linux/vif-setup") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/vif-setup" ;; - "hotplug/Linux/xen-hotplug-common.sh") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/xen-hotplug-common.sh" ;; - "hotplug/Linux/xendomains") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/xendomains" ;; - "hotplug/NetBSD/rc.d/xencommons") CONFIG_FILES="$CONFIG_FILES hotplug/NetBSD/rc.d/xencommons" ;; - "hotplug/NetBSD/rc.d/xendriverdomain") CONFIG_FILES="$CONFIG_FILES hotplug/NetBSD/rc.d/xendriverdomain" ;; - "ocaml/libs/xs/paths.ml") CONFIG_FILES="$CONFIG_FILES ocaml/libs/xs/paths.ml" ;; - "ocaml/xenstored/paths.ml") CONFIG_FILES="$CONFIG_FILES ocaml/xenstored/paths.ml" ;; - "ocaml/xenstored/oxenstored.conf") CONFIG_FILES="$CONFIG_FILES ocaml/xenstored/oxenstored.conf" ;; + "../config/Tools-paths.mk") CONFIG_FILES="$CONFIG_FILES ../config/Tools-paths.mk" ;; "config.h") CONFIG_HEADERS="$CONFIG_HEADERS config.h" ;; "hotplug/Linux/systemd/proc-xen.mount") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/systemd/proc-xen.mount" ;; "hotplug/Linux/systemd/xen-init-dom0.service") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/systemd/xen-init-dom0.service" ;; diff --git a/tools/configure.ac b/tools/configure.ac index 285b4ea128..ecd45e782e 100644 --- a/tools/configure.ac +++ b/tools/configure.ac @@ -7,24 +7,7 @@ AC_INIT([Xen Hypervisor Tools], m4_esyscmd([../version.sh ../xen/Makefile]), AC_CONFIG_SRCDIR([libs/light/libxl.c]) AC_CONFIG_FILES([ ../config/Tools.mk -hotplug/common/hotplugpath.sh -hotplug/FreeBSD/rc.d/xencommons -hotplug/FreeBSD/rc.d/xendriverdomain -hotplug/Linux/init.d/sysconfig.xencommons -hotplug/Linux/init.d/sysconfig.xendomains -hotplug/Linux/init.d/xen-watchdog -hotplug/Linux/init.d/xencommons -hotplug/Linux/init.d/xendomains -hotplug/Linux/init.d/xendriverdomain -hotplug/Linux/launch-xenstore -hotplug/Linux/vif-setup -hotplug/Linux/xen-hotplug-common.sh -hotplug/Linux/xendomains -hotplug/NetBSD/rc.d/xencommons -hotplug/NetBSD/rc.d/xendriverdomain -ocaml/libs/xs/paths.ml -ocaml/xenstored/paths.ml -ocaml/xenstored/oxenstored.conf +../config/Tools-paths.mk ]) AC_CONFIG_HEADERS([config.h]) AC_CONFIG_AUX_DIR([../]) diff --git a/tools/hotplug/FreeBSD/Makefile b/tools/hotplug/FreeBSD/Makefile index a6552c9884..0ad4372687 100644 --- a/tools/hotplug/FreeBSD/Makefile +++ b/tools/hotplug/FreeBSD/Makefile @@ -8,6 +8,11 @@ XEN_SCRIPT_DATA := XEN_RCD_PROG := rc.d/xencommons rc.d/xendriverdomain +GEN_FILES := rc.d/xencommons rc.d/xendriverdomain + +rc.d/%:: rc.d/%.src + $(apply-build-vars) + .PHONY: all all: @@ -35,7 +40,7 @@ uninstall-scripts: rm -f $(addprefix $(DESTDIR)$(XEN_SCRIPT_DIR)/, $(XEN_SCRIPT_DATA)) .PHONY: install-rcd -install-rcd: +install-rcd: $(GEN_FILES) $(INSTALL_DIR) $(DESTDIR)$(INITD_DIR) set -e; for i in $(XEN_RCD_PROG); \ do \ @@ -51,3 +56,4 @@ clean: .PHONY: distclean distclean: clean + rm -rf $(GEN_FILES) diff --git a/tools/hotplug/FreeBSD/rc.d/xencommons.in b/tools/hotplug/FreeBSD/rc.d/xencommons.src similarity index 100% rename from tools/hotplug/FreeBSD/rc.d/xencommons.in rename to tools/hotplug/FreeBSD/rc.d/xencommons.src diff --git a/tools/hotplug/FreeBSD/rc.d/xendriverdomain.in b/tools/hotplug/FreeBSD/rc.d/xendriverdomain.src similarity index 100% rename from tools/hotplug/FreeBSD/rc.d/xendriverdomain.in rename to tools/hotplug/FreeBSD/rc.d/xendriverdomain.src diff --git a/tools/hotplug/Linux/Makefile b/tools/hotplug/Linux/Makefile index 9a7b3a3515..59f7bab96b 100644 --- a/tools/hotplug/Linux/Makefile +++ b/tools/hotplug/Linux/Makefile @@ -26,6 +26,14 @@ XEN_SCRIPT_DATA := xen-script-common.sh locking.sh logging.sh XEN_SCRIPT_DATA += xen-hotplug-common.sh xen-network-common.sh vif-common.sh XEN_SCRIPT_DATA += block-common.sh +GEN_FILES := launch-xenstore vif-setup xendomains xen-hotplug-common.sh +GEN_FILES += init.d/sysconfig.xendomains init.d/xen-watchdog +GEN_FILES += init.d/xencommons init.d/xendomains +GEN_FILES += init.d/xendriverdomain init.d/sysconfig.xencommons + +init.d/%:: init.d/%.src + $(apply-build-vars) + .PHONY: all all: subdirs-all @@ -37,7 +45,7 @@ uninstall: uninstall-initd uninstall-scripts subdirs-uninstall # See docs/misc/distro_mapping.txt for INITD_DIR location .PHONY: install-initd -install-initd: +install-initd: $(GEN_FILES) $(INSTALL_DIR) $(DESTDIR)$(INITD_DIR) $(INSTALL_DIR) $(DESTDIR)$(SYSCONFIG_DIR) $(INSTALL_DIR) $(DESTDIR)$(LIBEXEC_BIN) @@ -81,3 +89,4 @@ clean: subdirs-clean .PHONY: distclean distclean: clean + rm -rf $(GEN_FILES) diff --git a/tools/hotplug/Linux/init.d/sysconfig.xencommons.in b/tools/hotplug/Linux/init.d/sysconfig.xencommons.src similarity index 100% rename from tools/hotplug/Linux/init.d/sysconfig.xencommons.in rename to tools/hotplug/Linux/init.d/sysconfig.xencommons.src diff --git a/tools/hotplug/Linux/init.d/sysconfig.xendomains.in b/tools/hotplug/Linux/init.d/sysconfig.xendomains.src similarity index 100% rename from tools/hotplug/Linux/init.d/sysconfig.xendomains.in rename to tools/hotplug/Linux/init.d/sysconfig.xendomains.src diff --git a/tools/hotplug/Linux/init.d/xen-watchdog.in b/tools/hotplug/Linux/init.d/xen-watchdog.src similarity index 100% rename from tools/hotplug/Linux/init.d/xen-watchdog.in rename to tools/hotplug/Linux/init.d/xen-watchdog.src diff --git a/tools/hotplug/Linux/init.d/xencommons.in b/tools/hotplug/Linux/init.d/xencommons.src similarity index 100% rename from tools/hotplug/Linux/init.d/xencommons.in rename to tools/hotplug/Linux/init.d/xencommons.src diff --git a/tools/hotplug/Linux/init.d/xendomains.in b/tools/hotplug/Linux/init.d/xendomains.src similarity index 100% rename from tools/hotplug/Linux/init.d/xendomains.in rename to tools/hotplug/Linux/init.d/xendomains.src diff --git a/tools/hotplug/Linux/init.d/xendriverdomain.in b/tools/hotplug/Linux/init.d/xendriverdomain.src similarity index 100% rename from tools/hotplug/Linux/init.d/xendriverdomain.in rename to tools/hotplug/Linux/init.d/xendriverdomain.src diff --git a/tools/hotplug/Linux/launch-xenstore.in b/tools/hotplug/Linux/launch-xenstore.src similarity index 100% rename from tools/hotplug/Linux/launch-xenstore.in rename to tools/hotplug/Linux/launch-xenstore.src diff --git a/tools/hotplug/Linux/vif-setup.in b/tools/hotplug/Linux/vif-setup.src similarity index 100% rename from tools/hotplug/Linux/vif-setup.in rename to tools/hotplug/Linux/vif-setup.src diff --git a/tools/hotplug/Linux/xen-hotplug-common.sh.in b/tools/hotplug/Linux/xen-hotplug-common.sh.src similarity index 100% rename from tools/hotplug/Linux/xen-hotplug-common.sh.in rename to tools/hotplug/Linux/xen-hotplug-common.sh.src diff --git a/tools/hotplug/Linux/xendomains.in b/tools/hotplug/Linux/xendomains.src similarity index 100% rename from tools/hotplug/Linux/xendomains.in rename to tools/hotplug/Linux/xendomains.src diff --git a/tools/hotplug/NetBSD/Makefile b/tools/hotplug/NetBSD/Makefile index 1cd3db2ccb..7953fd4360 100644 --- a/tools/hotplug/NetBSD/Makefile +++ b/tools/hotplug/NetBSD/Makefile @@ -12,6 +12,11 @@ XEN_SCRIPTS += qemu-ifup XEN_SCRIPT_DATA := XEN_RCD_PROG := rc.d/xencommons rc.d/xendomains rc.d/xen-watchdog rc.d/xendriverdomain +GEN_FILES := rc.d/xencommons rc.d/xendriverdomain + +rc.d/%:: rc.d/%.src + $(apply-build-vars) + .PHONY: all all: @@ -39,7 +44,7 @@ uninstall-scripts: rm -f $(addprefix $(DESTDIR)$(XEN_SCRIPT_DIR)/, $(XEN_SCRIPT_DATA)) .PHONY: install-rcd -install-rcd: +install-rcd: $(GEN_FILES) $(INSTALL_DIR) $(DESTDIR)$(INITD_DIR) set -e; for i in $(XEN_RCD_PROG); \ do \ @@ -57,3 +62,4 @@ clean: .PHONY: distclean distclean: clean + rm -rf $(GEN_FILES) diff --git a/tools/hotplug/NetBSD/rc.d/xencommons.in b/tools/hotplug/NetBSD/rc.d/xencommons.src similarity index 100% rename from tools/hotplug/NetBSD/rc.d/xencommons.in rename to tools/hotplug/NetBSD/rc.d/xencommons.src diff --git a/tools/hotplug/NetBSD/rc.d/xendriverdomain.in b/tools/hotplug/NetBSD/rc.d/xendriverdomain.src similarity index 100% rename from tools/hotplug/NetBSD/rc.d/xendriverdomain.in rename to tools/hotplug/NetBSD/rc.d/xendriverdomain.src diff --git a/tools/hotplug/common/Makefile b/tools/hotplug/common/Makefile index 62afe1019e..e9cbd35881 100644 --- a/tools/hotplug/common/Makefile +++ b/tools/hotplug/common/Makefile @@ -7,6 +7,8 @@ include $(XEN_ROOT)/tools/Rules.mk XEN_SCRIPTS := XEN_SCRIPT_DATA := hotplugpath.sh +GEN_FILES := hotplugpath.sh + .PHONY: all all: @@ -17,7 +19,7 @@ install: install-scripts uninstall: uninstall-scripts .PHONY: install-scripts -install-scripts: all +install-scripts: all $(GEN_FILES) $(INSTALL_DIR) $(DESTDIR)$(XEN_SCRIPT_DIR) set -e; for i in $(XEN_SCRIPTS); \ do \ @@ -38,3 +40,4 @@ clean: .PHONY: distclean distclean: clean + rm -rf $(GEN_FILES) diff --git a/tools/hotplug/common/hotplugpath.sh.in b/tools/hotplug/common/hotplugpath.sh.src similarity index 100% rename from tools/hotplug/common/hotplugpath.sh.in rename to tools/hotplug/common/hotplugpath.sh.src diff --git a/tools/ocaml/libs/xs/Makefile b/tools/ocaml/libs/xs/Makefile index e160e6a711..a9b534c929 100644 --- a/tools/ocaml/libs/xs/Makefile +++ b/tools/ocaml/libs/xs/Makefile @@ -8,6 +8,8 @@ OCAMLOPTFLAGS += -for-pack Xenstore .NOTPARALLEL: # Ocaml is such a PITA! +GEN_FILES := paths.ml + PREINTF = xsraw.cmi xst.cmi PREOBJS = queueop xsraw xst PRELIBS = $(foreach obj, $(PREOBJS),$(obj).cmo) $(foreach obj,$(PREOJBS),$(obj).cmx) @@ -17,6 +19,8 @@ LIBS = xenstore.cma xenstore.cmxa all: $(PREINTF) $(PRELIBS) $(INTF) $(LIBS) $(PROGRAMS) +$(OBJS): $(GEN_FILES) + bins: $(PROGRAMS) libs: $(LIBS) @@ -43,4 +47,7 @@ install: $(LIBS) META uninstall: $(OCAMLFIND) remove -destdir $(OCAMLDESTDIR) xenstore +.PHONY: distclean + rm -rf $(GEN_FILES) + include $(OCAML_TOPLEVEL)/Makefile.rules diff --git a/tools/ocaml/libs/xs/paths.ml.in b/tools/ocaml/libs/xs/paths.ml.src similarity index 100% rename from tools/ocaml/libs/xs/paths.ml.in rename to tools/ocaml/libs/xs/paths.ml.src diff --git a/tools/ocaml/xenstored/Makefile b/tools/ocaml/xenstored/Makefile index c333394a34..138537ee7a 100644 --- a/tools/ocaml/xenstored/Makefile +++ b/tools/ocaml/xenstored/Makefile @@ -72,6 +72,8 @@ XENSTOREDLIBS = \ -ccopt -L -ccopt $(OCAML_TOPLEVEL)/libs/xsd_glue $(OCAML_TOPLEVEL)/libs/xsd_glue/plugin_interface_v1.cmxa \ -ccopt -L -ccopt $(XEN_ROOT)/tools/libs/ctrl +GEN_FILES := paths.ml oxenstored.conf + PROGRAMS = oxenstored oxenstored_LIBS = $(XENSTOREDLIBS) @@ -83,7 +85,7 @@ oxenstored_OBJS = $(oxenstored_MLSORTED:.ml=) OCAML_PROGRAM = oxenstored -all: $(INTF) $(LIBS) $(PROGRAMS) +all: $(GEN_FILES) $(INTF) $(LIBS) $(PROGRAMS) bins: $(PROGRAMS) @@ -99,4 +101,7 @@ uninstall: rm -f $(DESTDIR)$(XEN_CONFIG_DIR)/oxenstored.conf rm -f $(DESTDIR)$(sbindir)/oxenstored +distclean: + rm -rf $(GEN_FILES) + include $(OCAML_TOPLEVEL)/Makefile.rules diff --git a/tools/ocaml/xenstored/oxenstored.conf.in b/tools/ocaml/xenstored/oxenstored.conf.src similarity index 100% rename from tools/ocaml/xenstored/oxenstored.conf.in rename to tools/ocaml/xenstored/oxenstored.conf.src diff --git a/tools/ocaml/xenstored/paths.ml.in b/tools/ocaml/xenstored/paths.ml.src similarity index 100% rename from tools/ocaml/xenstored/paths.ml.in rename to tools/ocaml/xenstored/paths.ml.src -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Tue Nov 11 17:03:42 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 17:03:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159168.1487543 (Exim 4.92) (envelope-from ) id 1vIrmA-0002Bb-Jg; Tue, 11 Nov 2025 17:03:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159168.1487543; Tue, 11 Nov 2025 17:03:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIrmA-0002BU-Fd; Tue, 11 Nov 2025 17:03:26 +0000 Received: by outflank-mailman (input) for mailman id 1159168; Tue, 11 Nov 2025 17:03:25 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIrm9-0002BO-AB for xen-devel@lists.xenproject.org; Tue, 11 Nov 2025 17:03:25 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 53d33c9e-bf20-11f0-9d18-b5c5bf9af7f9; Tue, 11 Nov 2025 18:03:22 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 32480497; Tue, 11 Nov 2025 09:03:13 -0800 (PST) Received: from [10.1.31.216] (XHFQ2J9959.cambridge.arm.com [10.1.31.216]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 106E43F5A1; Tue, 11 Nov 2025 09:03:15 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 53d33c9e-bf20-11f0-9d18-b5c5bf9af7f9 Message-ID: <8f70692c-25a9-4bd0-94ab-43ab435e4b1b@arm.com> Date: Tue, 11 Nov 2025 17:03:14 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 07/12] mm: enable lazy_mmu sections to nest Content-Language: en-GB To: Kevin Brodsky , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-8-kevin.brodsky@arm.com> <999feffa-5d1d-42e3-bd3a-d949f2a9de9d@arm.com> <824bf705-e9d6-4eeb-9532-9059fa56427f@arm.com> <58fd1a6e-f2c4-421c-9b95-dea4b244a515@arm.com> From: Ryan Roberts In-Reply-To: <58fd1a6e-f2c4-421c-9b95-dea4b244a515@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 11/11/2025 15:56, Kevin Brodsky wrote: > On 11/11/2025 10:24, Ryan Roberts wrote: >> [...] >> >>>>> + state->active = true; >>>>> + arch_enter_lazy_mmu_mode(); >>>>> + } >>>>> } >>>>> >>>>> static inline void lazy_mmu_mode_disable(void) >>>>> { >>>>> - arch_leave_lazy_mmu_mode(); >>>>> + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; >>>>> + >>>>> + VM_WARN_ON_ONCE(state->nesting_level == 0); >>>>> + VM_WARN_ON(!state->active); >>>>> + >>>>> + if (--state->nesting_level == 0) { >>>>> + state->active = false; >>>>> + arch_leave_lazy_mmu_mode(); >>>>> + } else { >>>>> + /* Exiting a nested section */ >>>>> + arch_flush_lazy_mmu_mode(); >>>>> + } >>>>> } >>>>> >>>>> static inline void lazy_mmu_mode_pause(void) >>>>> { >>>>> + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; >>>>> + >>>>> + VM_WARN_ON(state->nesting_level == 0 || !state->active); >>>> nit: do you need the first condition? I think when nesting_level==0, we expect >>>> to be !active? >>> I suppose this should never happen indeed - I was just being extra >>> defensive. >>> >>> Either way David suggested allowing pause()/resume() to be called >>> outside of any section so the next version will bail out on >>> nesting_level == 0. >> Ignoring my current opinion that we don't need pause/resume at all for now; Are >> you suggesting that pause/resume will be completely independent of >> enable/disable? I think that would be best. So enable/disable increment and >> decrement the nesting_level counter regardless of whether we are paused. >> nesting_level 0 => 1 enables if not paused. nesting_level 1 => 0 disables if not >> paused. pause disables nesting_level >= 1, resume enables if nesting_level >= 1. > > This is something else. Currently the rules are: > > [A] > > // pausing forbidden > enable() >     pause() >     // pausing/enabling forbidden >     resume() > disable() > > David suggested allowing: > > [B] > > pause() > // pausing/enabling forbidden > resume() > > Your suggestion is also allowing: > > [C] > > pause() >     // pausing forbidden >     enable() >     disable() > resume() I think the current kasan kasan_depopulate_vmalloc_pte() path will require [C] if CONFIG_DEBUG_PAGEALLOC is enabled on arm64. It calls __free_page() while paused. I guess CONFIG_DEBUG_PAGEALLOC will cause __free_page() -> debug_pagealloc_unmap_pages() ->->-> update_range_prot() -> lazy_mmu_enable(). Arguably you could move the resume() to before the __free_page(). But it just illustrates that it's all a bit brittle at the moment... > >> Perhaps we also need nested pause/resume? Then you just end up with 2 counters; >> enable_count and pause_count. Sorry if this has already been discussed. > > And finally: > > [D] > > pause() >     pause() >         enable() >         disable() >     resume() > resume() > > I don't really mind either way, but I don't see an immediate use for [C] > and [D] - the idea is that the paused section is short and controlled, > not made up of arbitrary calls. If my thinking above is correct, then I've already demonstrated that this is not the case. So I'd be inclined to go with [D] on the basis that it is the most robust. Keeping 2 nesting counts (enable and pause) feels pretty elegant to me and gives the fewest opportunities for surprises. Thanks, Ryan > A potential downside of allowing [C] and > [D] is that it makes it harder to detect unintended nesting (fewer > VM_WARN assertions). Happy to implement it if this proves useful though. > > OTOH the idea behind [B] is that it allows the caller of > pause()/resume() not to care about whether lazy MMU is actually enabled > or not - i.e. the kasan helpers would keep working even if > apply_to_page_range() didn't use lazy MMU any more. > >>>>> + >>>>> + state->active = false; >>>>> arch_leave_lazy_mmu_mode(); >>>>> } >>>>> >>>>> static inline void lazy_mmu_mode_resume(void) >>>>> { >>>>> + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; >>>>> + >>>>> + VM_WARN_ON(state->nesting_level == 0 || state->active); >>>> Similar argument? >>>> >>>>> + >>>>> + state->active = true; >>>>> arch_enter_lazy_mmu_mode(); >>>>> } >>>>> #else >>>>> diff --git a/include/linux/sched.h b/include/linux/sched.h >>>>> index cbb7340c5866..11566d973f42 100644 >>>>> --- a/include/linux/sched.h >>>>> +++ b/include/linux/sched.h >>>>> @@ -1441,6 +1441,10 @@ struct task_struct { >>>>> >>>>> struct page_frag task_frag; >>>>> >>>>> +#ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE >>>>> + struct lazy_mmu_state lazy_mmu_state; >>>>> +#endif >>>>> + >>>>> #ifdef CONFIG_TASK_DELAY_ACCT >>>>> struct task_delay_info *delays; >>>>> #endif >>>>> @@ -1724,6 +1728,18 @@ static inline char task_state_to_char(struct task_struct *tsk) >>>>> return task_index_to_char(task_state_index(tsk)); >>>>> } >>>>> >>>>> +#ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE >>>>> +static inline bool in_lazy_mmu_mode(void) >>>>> +{ >>>>> + return current->lazy_mmu_state.active; >>>>> +} >>>>> +#else >>>>> +static inline bool in_lazy_mmu_mode(void) >>>>> +{ >>>>> + return false; >>>> Just pointing out that this isn't really a correct implementation: >>>> >>>> lazy_mmu_mode_enable() >>>> ASSERT(in_lazy_mmu_mode()) << triggers for arches without lazy mmu >>>> lazy_mmu_mode_disable() >>>> >>>> Although it probably doesn't matter in practice? >>> I'd say that the expectation is invalid - lazy MMU mode can only be >>> enabled if the architecture supports it. In fact as you pointed out >>> above the API may be called in interrupt context but it will have no >>> effect, so this sequence would always fail in interrupt context. >> Yep, but previously there was no way to query the current state so it didn't >> matter. Now you have a query API so it might matter if/when people come along >> and use it in unexpected ways. > > I suppose the best we can do is document it alongside those helpers > (David has already suggested some documentation, see patch 11). > >>> Worth nothing that in_lazy_mmu_mode() is only ever called from arch code >>> where lazy MMU is implemented. I added the fallback as a matter of >>> principle, but it isn't actually required. >> Yes, I agree that's the intent. I'm just wondering if it's possible to enforce >> that only arch code uses this. Perhaps add some docs to explain that it's only >> intended for arches that implement lazy_mmu, and don't define it for arches that >> don't, which would catch any generic users? > > Yep sounds like the best option - a lot less risk of misuse if it can't > be called from generic code :) The build would still succeed on arch's > that implement it, but the kernel CI should catch such calls sooner or > later. > > - Kevin From xen-devel-bounces@lists.xenproject.org Tue Nov 11 17:52:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 17:52:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159187.1487570 (Exim 4.92) (envelope-from ) id 1vIsXP-000050-Dm; Tue, 11 Nov 2025 17:52:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159187.1487570; Tue, 11 Nov 2025 17:52:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIsXP-00004s-Ab; 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Message-ID: Date: Tue, 11 Nov 2025 19:52:03 +0200 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH v3] xen/x86: guest_access: optimize raw_x_guest() for PV and HVM combinations To: Jan Beulich Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , Teddy Astie , "xen-devel@lists.xenproject.org" , Stefano Stabellini , "Lira, Victor M" References: <20251107181739.3034098-1-grygorii_strashko@epam.com> <47f86a44-007f-4b90-9656-b2440238b2ba@suse.com> Content-Language: en-US From: Grygorii Strashko In-Reply-To: <47f86a44-007f-4b90-9656-b2440238b2ba@suse.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: FR2P281CA0181.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:9f::17) To DB3PR0302MB8919.eurprd03.prod.outlook.com (2603:10a6:10:435::21) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DB3PR0302MB8919:EE_|PAXPR03MB8249:EE_ X-MS-Office365-Filtering-Correlation-Id: 59309015-fd79-446c-8fcf-08de214b06a5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|366016|376014; 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I've tried it :( But at that time it has failed for me because of macro magic which uses "# include __FILE__". Now I see that additional Makefile line: # Allows usercopy.c to include itself $(obj)/usercopy.o: CFLAGS-y += -iquote . need to be moved also. > >> --- a/xen/arch/x86/include/asm/guest_access.h >> +++ b/xen/arch/x86/include/asm/guest_access.h >> @@ -13,26 +13,64 @@ >> #include >> >> /* Raw access functions: no type checking. */ >> -#define raw_copy_to_guest(dst, src, len) \ >> - (is_hvm_vcpu(current) ? \ >> - copy_to_user_hvm((dst), (src), (len)) : \ >> - copy_to_guest_pv(dst, src, len)) >> -#define raw_copy_from_guest(dst, src, len) \ >> - (is_hvm_vcpu(current) ? \ >> - copy_from_user_hvm((dst), (src), (len)) : \ >> - copy_from_guest_pv(dst, src, len)) >> -#define raw_clear_guest(dst, len) \ >> - (is_hvm_vcpu(current) ? \ >> - clear_user_hvm((dst), (len)) : \ >> - clear_guest_pv(dst, len)) >> -#define __raw_copy_to_guest(dst, src, len) \ >> - (is_hvm_vcpu(current) ? \ >> - copy_to_user_hvm((dst), (src), (len)) : \ >> - __copy_to_guest_pv(dst, src, len)) >> -#define __raw_copy_from_guest(dst, src, len) \ >> - (is_hvm_vcpu(current) ? \ >> - copy_from_user_hvm((dst), (src), (len)) : \ >> - __copy_from_guest_pv(dst, src, len)) >> +static inline bool raw_use_hvm_access(const struct vcpu *v) >> +{ >> + return IS_ENABLED(CONFIG_HVM) && (!IS_ENABLED(CONFIG_PV) || is_hvm_vcpu(v)); >> +} > > Without a full audit (likely tedious and error prone) this still is a > behavioral change for some (likely unintended) use against a system domain > (likely the idle one): With HVM=y PV=n we'd suddenly use the HVM accessor > there. IOW imo the "system domains are implicitly PV" aspect wants > retaining, even if only "just in case". It's okay not to invoke the PV > accessor (but return "len" instead), but it's not okay to invoke the HVM > one. > This patch is subset of "constify is_hvm_domain() for PV=n case" attempts. It was made under assumption that: "System domains do not have Guests running, so can't initiate hypecalls and can not be users of copy_to/from_user() routines. There are no Guest and no user memory". [IDLE, COW, IO, XEN] If above assumption is correct - this patch was assumed safe. if not - it all make no sense, probably. >> +static inline unsigned int raw_copy_to_guest(void *dst, const void *src, >> + unsigned int len) >> +{ >> + if ( raw_use_hvm_access(current) ) >> + return copy_to_user_hvm(dst, src, len); >> + else if ( IS_ENABLED(CONFIG_PV) ) >> + return copy_to_guest_pv(dst, src, len); >> + else >> + return len; >> +} >> + >> +static inline unsigned int raw_copy_from_guest(void *dst, const void *src, >> + unsigned int len) >> +{ >> + if ( raw_use_hvm_access(current) ) >> + return copy_from_user_hvm(dst, src, len); >> + else if ( IS_ENABLED(CONFIG_PV) ) >> + return copy_from_guest_pv(dst, src, len); >> + else >> + return len; >> +} >> + >> +static inline unsigned int raw_clear_guest(void *dst, unsigned int len) >> +{ >> + if ( raw_use_hvm_access(current) ) >> + return clear_user_hvm(dst, len); >> + else if ( IS_ENABLED(CONFIG_PV) ) >> + return clear_guest_pv(dst, len); >> + else >> + return len; >> +} >> + >> +static inline unsigned int __raw_copy_to_guest(void *dst, const void *src, >> + unsigned int len) >> +{ >> + if ( raw_use_hvm_access(current) ) >> + return copy_to_user_hvm(dst, src, len); >> + else if ( IS_ENABLED(CONFIG_PV) ) >> + return __copy_to_guest_pv(dst, src, len); >> + else >> + return len; >> +} >> + >> +static inline unsigned int __raw_copy_from_guest(void *dst, const void *src, >> + unsigned int len) >> +{ >> + if ( raw_use_hvm_access(current) ) >> + return copy_from_user_hvm(dst, src, len); >> + else if ( IS_ENABLED(CONFIG_PV) ) >> + return __copy_from_guest_pv(dst, src, len); >> + else >> + return len; >> +} > > I have to admit that I'm not quite happy about the redundancy here (leaving > aside the imo Misra-conflicting uses of "else"). It looks as if some macro- > ization could still help. Not sure what others think, though. Just an observation note: From my recent experience I see that macro-magic makes Coverage report (gcov) to provide not exactly correct results in terms of code lines coverage at least :( For example, for usercopy.o: 7 functions reported, but lines coverage is accounted only till '# undef GUARD". -- Best regards, -grygorii From xen-devel-bounces@lists.xenproject.org Tue Nov 11 17:54:22 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 17:54:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159198.1487579 (Exim 4.92) (envelope-from ) id 1vIsZR-0000cG-Nh; Tue, 11 Nov 2025 17:54:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159198.1487579; Tue, 11 Nov 2025 17:54:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIsZR-0000c9-L0; Tue, 11 Nov 2025 17:54:21 +0000 Received: by outflank-mailman (input) for mailman id 1159198; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DB3PR0302MB8919.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 5b2d6f69-9d40-4c60-345b-08de214b54d7 X-MS-Exchange-CrossTenant-originalarrivaltime: 11 Nov 2025 17:54:16.2776 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: kmFArKMHdPcCIijJDrs3POEUmQeC6mJRbUYHbgJv9XMTc7Fn8qThmiPi+nk8PsqVmXOoakpwes0hIFhRq0GhaqMXlzoUvsu8pqmBnEh/Xf8= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAXPR03MB8249 From: Grygorii Strashko Hi This series introduces possibility to disable 32-bit (COMPAT) interface sup= port in the following cases: - Only PVH domains are used - Guests (OS) are started by using direct Direct Kernel Boot - Guests (OS) are 64-bit and Guest early boot code, which is running = not in 64-bit mode, does not access Xen interfaces (hypercalls, shared_info, ..) If above criterias are met the COMPAT HVM interface become unreachable and = can be disabled. Coverage reports analyze and adding guard (debug) exceptions in hvm_hyperca= ll/hvm_do_multicall_call and hvm_latch_shinfo_size() confirm that COMPAT HVM interface is unused for= safety use-case. Grygorii Strashko (5): x86: hvm: dm: factor out compat code under ifdefs x86: hvm: compat: introduce vcpu_is_hcall_compat() helper x86: hvm: factor out compat code under ifdefs x86: pvh: allow to disable 32-bit interface support x86: constify has_32bit_shinfo() if !CONFIG_COMPAT xen/arch/x86/hvm/Kconfig | 19 +++++++++++++++- xen/arch/x86/hvm/dm.c | 2 ++ xen/arch/x86/hvm/hvm.c | 22 +++++++++++++----- xen/arch/x86/hvm/hypercall.c | 37 +++++++++++++++++++++++-------- xen/arch/x86/hypercall.c | 6 +---- xen/arch/x86/include/asm/domain.h | 3 ++- xen/common/kernel.c | 2 +- xen/include/xen/sched.h | 9 ++++++++ 8 files changed, 78 insertions(+), 22 deletions(-) --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Nov 11 17:54:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 17:54:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159199.1487590 (Exim 4.92) (envelope-from ) id 1vIsZS-0000qD-Ub; Tue, 11 Nov 2025 17:54:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159199.1487590; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DB3PR0302MB8919.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 909ad333-eb81-4603-cbe2-08de214b5536 X-MS-Exchange-CrossTenant-originalarrivaltime: 11 Nov 2025 17:54:16.8562 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: fvB0NPyCHEr5A/92U4eU8GoGgmfmBRnLMoZUxRQpTY6nfOu/IMxLXkZfdSfnDcG5x+qPaeHvrpSj+A2XHCflXgU9hDakW+P9ACdPEuwFonM= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAXPR03MB8249 From: Grygorii Strashko Factor out COMPAT HVM DM code under ifdefs in preparation for making HVM COMPAT code optional. changes in v2: - do not move code, use ifdefs Signed-off-by: Grygorii Strashko --- xen/arch/x86/hvm/dm.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/xen/arch/x86/hvm/dm.c b/xen/arch/x86/hvm/dm.c index 3b53471af0d9..f6dd1634428a 100644 --- a/xen/arch/x86/hvm/dm.c +++ b/xen/arch/x86/hvm/dm.c @@ -623,6 +623,7 @@ int dm_op(const struct dmop_args *op_args) return rc; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DB3PR0302MB8919.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: a8417112-8fad-4da8-15e0-08de214b5575 X-MS-Exchange-CrossTenant-originalarrivaltime: 11 Nov 2025 17:54:17.2643 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: MPux3sg9r4VhicU51LWh+A3tbypdqcbY8VhD5t+pk/WdP6OD5jBp22qdwslOgN0XshqV0oTGlZY0psZrLIE+X7wf6Y4Hu8HzYcWA/cAkcuk= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAXPR03MB8249 From: Grygorii Strashko Introduce vcpu_is_hcall_compat() helper and use it instead of direct access to struct vcpu->hcall_compat field in preparation for making HVM COMPAT code optional. Signed-off-by: Grygorii Strashko --- xen/arch/x86/hvm/hvm.c | 9 +++++---- xen/arch/x86/hvm/hypercall.c | 6 +++--- xen/arch/x86/hypercall.c | 6 +----- xen/common/kernel.c | 2 +- xen/include/xen/sched.h | 9 +++++++++ 5 files changed, 19 insertions(+), 13 deletions(-) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 0c60faa39d7b..2e47a71714fd 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -3500,7 +3500,7 @@ unsigned int copy_to_user_hvm(void *to, const void *f= rom, unsigned int len) { int rc; =20 - if ( current->hcall_compat && is_compat_arg_xlat_range(to, len) ) + if ( vcpu_is_hcall_compat(current) && is_compat_arg_xlat_range(to, len= ) ) { memcpy(to, from, len); return 0; @@ -3514,7 +3514,7 @@ unsigned int clear_user_hvm(void *to, unsigned int le= n) { int rc; =20 - if ( current->hcall_compat && is_compat_arg_xlat_range(to, len) ) + if ( vcpu_is_hcall_compat(current) && is_compat_arg_xlat_range(to, len= ) ) { memset(to, 0x00, len); return 0; @@ -3529,7 +3529,7 @@ unsigned int copy_from_user_hvm(void *to, const void = *from, unsigned int len) { int rc; =20 - if ( current->hcall_compat && is_compat_arg_xlat_range(from, len) ) + if ( vcpu_is_hcall_compat(current) && is_compat_arg_xlat_range(from, l= en) ) { memcpy(to, from, len); return 0; @@ -5214,7 +5214,8 @@ long do_hvm_op(unsigned long op, XEN_GUEST_HANDLE_PAR= AM(void) arg) break; =20 case HVMOP_altp2m: - rc =3D current->hcall_compat ? compat_altp2m_op(arg) : do_altp2m_o= p(arg); + rc =3D vcpu_is_hcall_compat(current) ? compat_altp2m_op(arg) + : do_altp2m_op(arg); break; =20 default: diff --git a/xen/arch/x86/hvm/hypercall.c b/xen/arch/x86/hvm/hypercall.c index b254b3e2f7d6..549e25445e67 100644 --- a/xen/arch/x86/hvm/hypercall.c +++ b/xen/arch/x86/hvm/hypercall.c @@ -29,7 +29,7 @@ long hvm_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PA= RAM(void) arg) return -ENOSYS; } =20 - if ( !current->hcall_compat ) + if ( !vcpu_is_hcall_compat(current) ) rc =3D do_memory_op(cmd, arg); else rc =3D compat_memory_op(cmd, arg); @@ -57,7 +57,7 @@ long hvm_grant_table_op( return -ENOSYS; } =20 - if ( !current->hcall_compat ) + if ( !vcpu_is_hcall_compat(current) ) return do_grant_table_op(cmd, uop, count); else return compat_grant_table_op(cmd, uop, count); @@ -96,7 +96,7 @@ long hvm_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void)= arg) return -ENOSYS; } =20 - if ( !curr->hcall_compat ) + if ( !vcpu_is_hcall_compat(curr) ) return do_physdev_op(cmd, arg); else return compat_physdev_op(cmd, arg); diff --git a/xen/arch/x86/hypercall.c b/xen/arch/x86/hypercall.c index dc0a90ca0915..3a1a363d8648 100644 --- a/xen/arch/x86/hypercall.c +++ b/xen/arch/x86/hypercall.c @@ -53,11 +53,7 @@ unsigned long hypercall_create_continuation( =20 regs->rax =3D op; =20 -#ifdef CONFIG_COMPAT - if ( !curr->hcall_compat ) -#else - if ( true ) -#endif + if ( !vcpu_is_hcall_compat(curr) ) { for ( i =3D 0; *p !=3D '\0'; i++ ) { diff --git a/xen/common/kernel.c b/xen/common/kernel.c index e6979352e100..99be0fbb9d90 100644 --- a/xen/common/kernel.c +++ b/xen/common/kernel.c @@ -615,7 +615,7 @@ long do_xen_version(int cmd, XEN_GUEST_HANDLE_PARAM(voi= d) arg) const struct vcpu *curr =3D current; =20 #ifdef CONFIG_COMPAT - if ( curr->hcall_compat ) + if ( vcpu_is_hcall_compat(curr) ) { compat_platform_parameters_t params =3D { .virt_start =3D is_pv_vcpu(curr) diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h index 02bdc256ce37..e3ce427f0bd9 100644 --- a/xen/include/xen/sched.h +++ b/xen/include/xen/sched.h @@ -311,6 +311,15 @@ struct vcpu #endif }; =20 +static inline bool vcpu_is_hcall_compat(const struct vcpu *v) +{ +#ifdef CONFIG_COMPAT + return v->hcall_compat; +#else + return false; +#endif /* CONFIG_COMPAT */ +} + struct sched_unit { struct domain *domain; struct vcpu *vcpu_list; --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Nov 11 17:54:24 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 17:54:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159201.1487610 (Exim 4.92) (envelope-from ) id 1vIsZU-0001JW-L6; Tue, 11 Nov 2025 17:54:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159201.1487610; Tue, 11 Nov 2025 17:54:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIsZU-0001Id-Hi; Tue, 11 Nov 2025 17:54:24 +0000 Received: by outflank-mailman (input) for mailman id 1159201; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DB3PR0302MB8919.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 5cac667c-5354-418e-fe51-08de214b56d5 X-MS-Exchange-CrossTenant-originalarrivaltime: 11 Nov 2025 17:54:18.4610 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Qa60MR0lUrs3Mm/ESIb2Ub1G4/hfGHKSih4mn4O4aRivV1gdbmWEN+d+5ro2tCpiaqzzjuyAgBeLWOUUhS55B28tWFyytURkxi+W188CPng= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR03MB6323 From: Grygorii Strashko Constify has_32bit_shinfo() if !CONFIG_COMPAT. Signed-off-by: Grygorii Strashko --- xen/arch/x86/include/asm/domain.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/d= omain.h index 5df8c7825333..6883b7226aa7 100644 --- a/xen/arch/x86/include/asm/domain.h +++ b/xen/arch/x86/include/asm/domain.h @@ -12,7 +12,8 @@ #include #include =20 -#define has_32bit_shinfo(d) ((d)->arch.has_32bit_shinfo) +#define has_32bit_shinfo(d) = \ + (IS_ENABLED(CONFIG_COMPAT) && (d)->arch.has_32bit_shinfo) =20 /* * Set to true if either the global vector-type callback or per-vCPU --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Nov 11 17:54:25 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 17:54:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159202.1487619 (Exim 4.92) (envelope-from ) id 1vIsZV-0001Z3-Tt; Tue, 11 Nov 2025 17:54:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159202.1487619; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DB3PR0302MB8919.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: fd30497c-ccaa-4067-dac9-08de214b55c0 X-MS-Exchange-CrossTenant-originalarrivaltime: 11 Nov 2025 17:54:17.7563 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 2KEVDnbwkNVNmxjcbH3xxB4XCAxaaMSDzV9OysOzUaDondxPaL2A7Y9fwrnUvK6RaKsC14FGt7LX0sdk9MD7mKC4GPPkwuSlt8AClVfs2Bw= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR03MB6323 From: Grygorii Strashko Factor out COMPAT HVM code under ifdefs in preparation for making HVM COMPAT code optional. Signed-off-by: Grygorii Strashko --- xen/arch/x86/hvm/hvm.c | 13 ++++++++++++- xen/arch/x86/hvm/hypercall.c | 37 +++++++++++++++++++++++++++--------- 2 files changed, 40 insertions(+), 10 deletions(-) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 2e47a71714fd..56c0059401d0 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -69,7 +69,9 @@ #include #include =20 +#ifdef CONFIG_COMPAT #include +#endif =20 bool __read_mostly hvm_enabled; =20 @@ -1255,6 +1257,7 @@ static int cf_check hvm_save_cpu_xsave_states( return 0; } =20 +#ifdef CONFIG_COMPAT /* * Structure layout conformity checks, documenting correctness of the cast= in * the invocation of validate_xstate() below. @@ -1267,6 +1270,7 @@ CHECK_FIELD_(struct, xsave_hdr, xcomp_bv); CHECK_FIELD_(struct, xsave_hdr, reserved); #undef compat_xsave_hdr #undef xen_xsave_hdr +#endif /* CONFIG_COMPAT */ =20 static int cf_check hvm_load_cpu_xsave_states( struct domain *d, hvm_domain_context_t *h) @@ -3991,7 +3995,7 @@ static void hvm_latch_shinfo_size(struct domain *d) */ if ( current->domain =3D=3D d ) { - d->arch.has_32bit_shinfo =3D + d->arch.has_32bit_shinfo =3D IS_ENABLED(CONFIG_COMPAT) && hvm_guest_x86_mode(current) !=3D X86_MODE_64BIT; =20 /* @@ -4965,6 +4969,7 @@ static int do_altp2m_op( #endif /* CONFIG_ALTP2M */ } =20 +#ifdef CONFIG_COMPAT DEFINE_XEN_GUEST_HANDLE(compat_hvm_altp2m_op_t); =20 /* @@ -5064,6 +5069,12 @@ static int compat_altp2m_op( =20 return rc; } +#else +static int compat_altp2m_op(XEN_GUEST_HANDLE_PARAM(void) arg) +{ + return -EOPNOTSUPP; +} +#endif /* CONFIG_COMPAT */ =20 static int hvmop_get_mem_type( XEN_GUEST_HANDLE_PARAM(xen_hvm_get_mem_type_t) arg) diff --git a/xen/arch/x86/hvm/hypercall.c b/xen/arch/x86/hvm/hypercall.c index 549e25445e67..f8b2c90b7c41 100644 --- a/xen/arch/x86/hvm/hypercall.c +++ b/xen/arch/x86/hvm/hypercall.c @@ -29,10 +29,12 @@ long hvm_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_= PARAM(void) arg) return -ENOSYS; } =20 - if ( !vcpu_is_hcall_compat(current) ) - rc =3D do_memory_op(cmd, arg); - else +#ifdef CONFIG_COMPAT + if ( vcpu_is_hcall_compat(current) ) rc =3D compat_memory_op(cmd, arg); + else +#endif + rc =3D do_memory_op(cmd, arg); =20 return rc; } @@ -57,10 +59,12 @@ long hvm_grant_table_op( return -ENOSYS; } =20 - if ( !vcpu_is_hcall_compat(current) ) - return do_grant_table_op(cmd, uop, count); - else +#ifdef CONFIG_COMPAT + if ( vcpu_is_hcall_compat(current) ) return compat_grant_table_op(cmd, uop, count); + else +#endif + return do_grant_table_op(cmd, uop, count); } #endif =20 @@ -96,10 +100,12 @@ long hvm_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(vo= id) arg) return -ENOSYS; } =20 - if ( !vcpu_is_hcall_compat(curr) ) - return do_physdev_op(cmd, arg); - else +#ifdef CONFIG_COMPAT + if ( vcpu_is_hcall_compat(curr) ) return compat_physdev_op(cmd, arg); + else +#endif + return do_physdev_op(cmd, arg); } =20 int hvm_hypercall(struct cpu_user_regs *regs) @@ -171,6 +177,7 @@ int hvm_hypercall(struct cpu_user_regs *regs) HVM_DBG_LOG(DBG_LEVEL_HCALL, "hcall%lu(%x, %x, %x, %x, %x)", eax, regs->ebx, regs->ecx, regs->edx, regs->esi, regs->edi)= ; =20 +#ifdef CONFIG_COMPAT curr->hcall_compat =3D true; call_handlers_hvm32(eax, regs->eax, regs->ebx, regs->ecx, regs->ed= x, regs->esi, regs->edi); @@ -178,6 +185,9 @@ int hvm_hypercall(struct cpu_user_regs *regs) =20 if ( !curr->hcall_preempted && regs->eax !=3D -ENOSYS ) clobber_regs(regs, eax, hvm, 32); +#else + regs->eax =3D -EOPNOTSUPP; +#endif } =20 hvmemul_cache_restore(curr, token); @@ -208,10 +218,19 @@ enum mc_disposition hvm_do_multicall_call(struct mc_s= tate *state) } else { +#ifdef CONFIG_COMPAT struct compat_multicall_entry *call =3D &state->compat_call; =20 call_handlers_hvm32(call->op, call->result, call->args[0], call->a= rgs[1], call->args[2], call->args[3], call->args[4]); +#else + /* + * code should never reach here in case !CONFIG_COMPAT as any + * 32-bit hypercall should bail out earlier from hvm_hypercall() + * with -EOPNOTSUPP + */ + unreachable(); +#endif } =20 return !hvm_get_cpl(curr) ? mc_continue : mc_preempt; --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Nov 11 17:54:26 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 17:54:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159203.1487625 (Exim 4.92) (envelope-from ) id 1vIsZW-0001cG-AI; Tue, 11 Nov 2025 17:54:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159203.1487625; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DB3PR0302MB8919.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: f5c5ecda-33c8-44ef-b6ac-08de214b569a X-MS-Exchange-CrossTenant-originalarrivaltime: 11 Nov 2025 17:54:18.0751 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Um0gOsVvvd6DYlXT7iIs+/HLO4Ry7QLb03U1IRxCEkwOcZI9zL7RH+FQnkmvTyzvNHABNyCwXj3MOYnAGXlVkpTAYlh2tyk5zTPy1gQwfic= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR03MB6323 From: Grygorii Strashko For x86 Xen safety certification only PVH Gusts are selected to be allowed which are started by using direct Direct Kernel Boot only. There is also an assumption that x86 Guest's (OS) early boot code (which is running not in 64-bit mode) does not access Xen interfaces (hypercalls, shared_info, ..). In this case the Xen HVM 32-bit COMPAT interface become unused and leaves gaps in terms of coverage. Hence now all prerequisite changes are in place, introduce a CONFIG_HVM_COMPAT option through which HVM(PVH) 32-bit interface support on 64-bit Xen can be disabled. By default, CONFIG_HVM_COMPAT is ("y") enabled and accessible only in EXPERT mode. Signed-off-by: Grygorii Strashko --- xen/arch/x86/hvm/Kconfig | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig index f10a2b374448..33152f2a6bbe 100644 --- a/xen/arch/x86/hvm/Kconfig +++ b/xen/arch/x86/hvm/Kconfig @@ -2,7 +2,6 @@ menuconfig HVM bool "HVM support" depends on !PV_SHIM_EXCLUSIVE default !PV_SHIM - select COMPAT select IOREQ_SERVER select MEM_ACCESS_ALWAYS_ON help @@ -70,4 +69,22 @@ config MEM_PAGING config MEM_SHARING bool "Xen memory sharing support (UNSUPPORTED)" if UNSUPPORTED =20 +config HVM_COMPAT + bool "HVM 32-bit interface support on 64-bit Xen" if EXPERT + select COMPAT + default y + help + The HVM 32-bit interface must be enabled for HVM domains to be able = to + make hypercalls in 32bit mode. Non-PVH domains unconditionally need = this + option so that hvmloader may issue hypercalls in 32bit mode. + + The HVM 32-bit interface can be disabled if: + - Only PVH domains are used + - Guests (OS) are started by using direct Direct Kernel Boot + - Guests (OS) are 64-bit and Guest early boot code, which is running= not + in 64-bit mode, does not access Xen interfaces + (hypercalls, shared_info, ..) + + If unsure, say Y. + endif --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Nov 11 18:22:04 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 18:22:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159275.1487640 (Exim 4.92) (envelope-from ) id 1vIt00-0007cl-Dr; Tue, 11 Nov 2025 18:21:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159275.1487640; Tue, 11 Nov 2025 18:21:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIt00-0007ce-AG; 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Message-ID: <7e3422fd-893c-41df-b783-71e02335aaef@epam.com> Date: Tue, 11 Nov 2025 20:21:34 +0200 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH] xen: make VMTRACE support optional To: Jan Beulich Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Tamas K Lengyel , Alexandru Isaila , Petre Pircalabu , Penny Zheng , "xen-devel@lists.xenproject.org" , Teddy Astie References: <20251031212005.1338212-1-grygorii_strashko@epam.com> <63525e6f-4e17-4155-87b2-47b9ac9ea474@suse.com> <0613cfb9-0f6e-4c55-a250-ba2a5aa0e182@suse.com> Content-Language: en-US From: Grygorii Strashko In-Reply-To: <0613cfb9-0f6e-4c55-a250-ba2a5aa0e182@suse.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: WA2P291CA0037.POLP291.PROD.OUTLOOK.COM (2603:10a6:1d0:1f::17) To DB3PR0302MB8919.eurprd03.prod.outlook.com (2603:10a6:10:435::21) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DB3PR0302MB8919:EE_|PA4PR03MB7453:EE_ X-MS-Office365-Filtering-Correlation-Id: a2b36b9b-a8bd-4937-8f61-08de214f27c8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|366016|1800799024; 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The trace date can be retrieved using buffer >>>>> >>>>> Nit: s/date/data/ >>>>> >>>>>> +      shared between Xen and domain >>>>>> +      (see XENMEM_acquire_resource(XENMEM_resource_vmtrace_buf)). >>>>>> + >>>>> >>>>> I was actually meaning to ask that "VMX only" should somehow be mentioned here, >>>>> but then I noticed this is an arch-independent location. >>>> >>>> Right, Arch code advertise VMTRACE support with HAS_VMTRACE. >>>> In this particular case: >>>> config INTEL_VMX >>>> ... >>>>     select HAS_VMTRACE >>>> >>>> >>>>> I'm not quite sure we want it like this (just yet). >>>> >>>> ? >>> >>> To rephrase the question: Are we expecting anything other than VMX to support >>> VMTRACE any time soon? >>> >> >> That's I do not know. >> >> I assume your point is similar to what Teddy noted [1]. >> >> I think vmtrace code can be consolidate, but question is on what level(s): >> >> only: >>  xen/arch/x86/hvm/vmx/ >>  |- vmtrace.c >> >> or: >>  xen/arch/x86/hvm >>  |- vmtrace.c >>     <- vmtrace_alloc/free_buffer(), acquire_vmtrace_buf(), do_vmtrace_op() >>  xen/arch/x86/hvm/vmx/ >>  |- vmtrace.c >> >> it will require more work comparing to the current change. > > Well, I don't think code movement is strictly necessary here. But as I'm unconvinced > of Kconfig.debug (in whatever subdir) being an appropriate place to add this, for > the time being merely putting the new Kconfig option directly next to INTEL_VMX (and > then without any new HAS_*) wants at least considering, imo. If and when some other > use appears, HAS_* can be introduced and the whole thing moved. For me it will be fine. > > As otoh abstracting things in an arch-independent way also has its merits, it is - > as said - not quite clear to me which way we'd prefer to have it. > > Jan > >> [1] https://patchwork.kernel.org/comment/26637627/ >> > -- Best regards, -grygorii From xen-devel-bounces@lists.xenproject.org Tue Nov 11 18:25:31 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 18:25:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159286.1487651 (Exim 4.92) (envelope-from ) id 1vIt3Z-0008FU-U5; Tue, 11 Nov 2025 18:25:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159286.1487651; Tue, 11 Nov 2025 18:25:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIt3Z-0008FN-PS; Tue, 11 Nov 2025 18:25:29 +0000 Received: by outflank-mailman (input) for mailman id 1159286; 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And we end up back to v3 regarding this part. >> Check in viridian_load_{domain,vcpu}_ctxt() may/may not work depending on toolstack >> behavior which is not strictly defined (loading HVM_PARAM_VIRIDIAN before/after >> viridian_load_{domain,vcpu}_ctxt()). >> >> So what's the conclusion here - drop this check? > > Well, Misra wants us to not have any dead code. Hence why would we add new > instances of such? > >>>> --- a/xen/arch/x86/hvm/hvm.c >>>> +++ b/xen/arch/x86/hvm/hvm.c >>>> @@ -4231,8 +4231,9 @@ static int hvm_set_param(struct domain *d, uint32_t index, uint64_t value) >>>> rc = -EINVAL; >>>> break; >>>> case HVM_PARAM_VIRIDIAN: >>>> - if ( (value & ~HVMPV_feature_mask) || >>>> - !(value & HVMPV_base_freq) ) >>>> + if ( !IS_ENABLED(CONFIG_VIRIDIAN) && value ) >>>> + rc = -ENODEV; >>>> + else if ( (value & ~HVMPV_feature_mask) || !(value & HVMPV_base_freq) ) >>>> rc = -EINVAL; >>> >>> I find the check for value to be (non-)zero a little dubious here: If any caller >>> passed in 0, it would get back -EINVAL anyway. Imo -ENODEV would be more suitable >>> in that case as well. Things would be different if 0 was a valid value to pass in. >> >> The idea was to distinguish between "Feature enabled, Invalid parameter" and "Feature disabled". > " > But you don't, or else the addition would need to live after the -EINVAL checks. > I also question the utility of knowing "parameter was invalid" when the feature > isn't available anyway. My understanding here - I need to drop non-zero "value" check. will be: case HVM_PARAM_VIRIDIAN: if ( !IS_ENABLED(CONFIG_VIRIDIAN) ) rc = -ENODEV; else if ( (value & ~HVMPV_feature_mask) || !(value & HVMPV_base_freq) ) rc = -EINVAL; break; -- Best regards, -grygorii From xen-devel-bounces@lists.xenproject.org Tue Nov 11 20:08:54 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 20:08:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159303.1487660 (Exim 4.92) (envelope-from ) id 1vIufU-0004Gi-0F; Tue, 11 Nov 2025 20:08:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159303.1487660; Tue, 11 Nov 2025 20:08:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIufT-0004Gb-Te; Tue, 11 Nov 2025 20:08:43 +0000 Received: by outflank-mailman (input) for mailman id 1159303; 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Tue, 11 Nov 2025 20:08:26 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 378ee571-bf3a-11f0-9d18-b5c5bf9af7f9 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=fcsQlWhCR44PPbZxswoiXzDPIQOrz0hbzx38fhIEZLMIcKMeOqjRCdIBlZ9fwsmznqPVMkUPY+D+8CCPESrapniBTIvTf0S88j+Ax4CYmD7NKabYlLe3+QtmaenRYyHs6LiKexmvzynNde1Ux/zudtNXCK323qM04s8ugIRppNz8cT1i5o3IGbAsXg7vIha8Td5xjWYvDYIivWxQn+ytsRk2/eJpxpxl+2A3w2NA8DjCXfIyC12OaAvmYKdYe8ueCYkXCbpgm72JU2fhyzexoEpyJuRqh2Lp8f5ccXrC3nHUEp2EwiafKMzMUKQnMHeWR6s+innENhR8CIdpyOgmbg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DB3PR0302MB8919.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 326c23ee-e286-44ef-ec87-08de215e12ec X-MS-Exchange-CrossTenant-originalarrivaltime: 11 Nov 2025 20:08:26.0972 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: EtbRX+k0wJogls3x4WBB1G7UYfKrTxawonxKtui4NEZQ4krM70YrbU529PdtWhznM4luVjxq4nseyw5IpF4c8EVIVCSD5xMPxTQRIOp2RUg= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR03MB7758 From: Grygorii Strashko Functions: hvm_shadow_handle_cd() hvm_set_uc_mode() domain_exit_uc_mode() are used only by Intel VMX code, so move them to VMX code. While here: - minor format change in domain_exit_uc_mode() - s/(0/1)/(false/true) for bool types - use "struct domain *" as parameter in hvm_set_uc_mode() - use "struct domain *d" as local var in hvm_shadow_handle_cd() No functional changes. Signed-off-by: Grygorii Strashko --- changes in v2: - use "struct domain *" as parameter in hvm_set_uc_mode() - use "struct domain *d" as local var in hvm_shadow_handle_cd() - move code before vmx_handle_cd() xen/arch/x86/hvm/hvm.c | 58 ------------------------ xen/arch/x86/hvm/vmx/vmx.c | 61 ++++++++++++++++++++++++++ xen/arch/x86/include/asm/hvm/support.h | 2 - 3 files changed, 61 insertions(+), 60 deletions(-) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index da3cde1ff0e6..9caca93e5f56 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -2168,30 +2168,6 @@ int hvm_set_efer(uint64_t value) return X86EMUL_OKAY; } =20 -/* Exit UC mode only if all VCPUs agree on MTRR/PAT and are not in no_fill= . */ -static bool domain_exit_uc_mode(struct vcpu *v) -{ - struct domain *d =3D v->domain; - struct vcpu *vs; - - for_each_vcpu ( d, vs ) - { - if ( (vs =3D=3D v) || !vs->is_initialised ) - continue; - if ( (vs->arch.hvm.cache_mode =3D=3D NO_FILL_CACHE_MODE) || - mtrr_pat_not_equal(vs, v) ) - return 0; - } - - return 1; -} - -static void hvm_set_uc_mode(struct vcpu *v, bool is_in_uc_mode) -{ - v->domain->arch.hvm.is_in_uc_mode =3D is_in_uc_mode; - shadow_blow_tables_per_domain(v->domain); -} - int hvm_mov_to_cr(unsigned int cr, unsigned int gpr) { struct vcpu *curr =3D current; @@ -2273,40 +2249,6 @@ int hvm_mov_from_cr(unsigned int cr, unsigned int gp= r) return X86EMUL_UNHANDLEABLE; } =20 -void hvm_shadow_handle_cd(struct vcpu *v, unsigned long value) -{ - if ( value & X86_CR0_CD ) - { - /* Entering no fill cache mode. */ - spin_lock(&v->domain->arch.hvm.uc_lock); - v->arch.hvm.cache_mode =3D NO_FILL_CACHE_MODE; - - if ( !v->domain->arch.hvm.is_in_uc_mode ) - { - domain_pause_nosync(v->domain); - - /* Flush physical caches. */ - flush_all(FLUSH_CACHE_EVICT); - hvm_set_uc_mode(v, 1); - - domain_unpause(v->domain); - } - spin_unlock(&v->domain->arch.hvm.uc_lock); - } - else if ( !(value & X86_CR0_CD) && - (v->arch.hvm.cache_mode =3D=3D NO_FILL_CACHE_MODE) ) - { - /* Exit from no fill cache mode. */ - spin_lock(&v->domain->arch.hvm.uc_lock); - v->arch.hvm.cache_mode =3D NORMAL_CACHE_MODE; - - if ( domain_exit_uc_mode(v) ) - hvm_set_uc_mode(v, 0); - - spin_unlock(&v->domain->arch.hvm.uc_lock); - } -} - static void hvm_update_cr(struct vcpu *v, unsigned int cr, unsigned long v= alue) { v->arch.hvm.guest_cr[cr] =3D value; diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 6f2cc635e582..d7efd0a73add 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -44,6 +44,7 @@ #include #include #include +#include #include #include #include @@ -1451,6 +1452,66 @@ static int cf_check vmx_get_guest_pat(struct vcpu *v= , u64 *gpat) return 1; } =20 +/* Exit UC mode only if all VCPUs agree on MTRR/PAT and are not in no_fill= . */ +static bool domain_exit_uc_mode(struct vcpu *v) +{ + struct domain *d =3D v->domain; + struct vcpu *vs; + + for_each_vcpu(d, vs) + { + if ( (vs =3D=3D v) || !vs->is_initialised ) + continue; + if ( (vs->arch.hvm.cache_mode =3D=3D NO_FILL_CACHE_MODE) || + mtrr_pat_not_equal(vs, v) ) + return false; + } + + return true; +} + +static void hvm_set_uc_mode(struct domain *d, bool is_in_uc_mode) +{ + d->arch.hvm.is_in_uc_mode =3D is_in_uc_mode; + shadow_blow_tables_per_domain(d); +} + +static void hvm_shadow_handle_cd(struct vcpu *v, unsigned long value) +{ + struct domain *d =3D v->domain; + + if ( value & X86_CR0_CD ) + { + /* Entering no fill cache mode. */ + spin_lock(&d->arch.hvm.uc_lock); + v->arch.hvm.cache_mode =3D NO_FILL_CACHE_MODE; + + if ( !d->arch.hvm.is_in_uc_mode ) + { + domain_pause_nosync(d); + + /* Flush physical caches. */ + flush_all(FLUSH_CACHE_EVICT); + hvm_set_uc_mode(d, true); + + domain_unpause(d); + } + spin_unlock(&d->arch.hvm.uc_lock); + } + else if ( !(value & X86_CR0_CD) && + (v->arch.hvm.cache_mode =3D=3D NO_FILL_CACHE_MODE) ) + { + /* Exit from no fill cache mode. */ + spin_lock(&d->arch.hvm.uc_lock); + v->arch.hvm.cache_mode =3D NORMAL_CACHE_MODE; + + if ( domain_exit_uc_mode(v) ) + hvm_set_uc_mode(d, false); + + spin_unlock(&d->arch.hvm.uc_lock); + } +} + static void cf_check vmx_handle_cd(struct vcpu *v, unsigned long value) { if ( !paging_mode_hap(v->domain) ) diff --git a/xen/arch/x86/include/asm/hvm/support.h b/xen/arch/x86/include/= asm/hvm/support.h index 2a7ba36af06f..9e9fa6295567 100644 --- a/xen/arch/x86/include/asm/hvm/support.h +++ b/xen/arch/x86/include/asm/hvm/support.h @@ -119,8 +119,6 @@ void hvm_rdtsc_intercept(struct cpu_user_regs *regs); =20 int __must_check hvm_handle_xsetbv(u32 index, u64 new_bv); =20 -void hvm_shadow_handle_cd(struct vcpu *v, unsigned long value); - /* * These functions all return X86EMUL return codes. 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DB3PR0302MB8919.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 2d998cad-9a8d-47bf-4eda-08de215e12a4 X-MS-Exchange-CrossTenant-originalarrivaltime: 11 Nov 2025 20:08:25.6492 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: vIpXLHFiGTm/TtI/4fe8VP7HGZjLZALSL6bTDTFJrBhm+cLoAOUcJkYfPJ3ufwD4c8aaa5roxRfC2A8BxyAwzRPHL6+ck7zWo3lRltHDies= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR03MB7758 From: Grygorii Strashko The cache disable mode code (hvm_shadow_handle_cd()) is relevant only for I= ntel VT-x (VMX), hence: - move hvm_shadow_handle_cd()/ hvm_set_uc_mode()/domain_exit_uc_mode() in V= MX code - account for SHADOW_PAGING when use hvm_shadow_handle_cd() - move cache disable mode data into VMX specific structures Based on discussion [1]. [1] https://patchwork.kernel.org/project/xen-devel/patch/20251023151903.560= 947-1-grygorii_strashko@epam.com/ v1: https://patchwork.kernel.org/project/xen-devel/cover/20251029235448.602= 380-1-grygorii_strashko@epam.com/ Grygorii Strashko (3): x86/hvm: move hvm_shadow_handle_cd() to vmx code x86/hvm: vmx: account for SHADOW_PAGING when use hvm_shadow_handle_cd() x86/hvm: vmx: refactor cache disable mode data xen/arch/x86/hvm/hvm.c | 59 -------------------- xen/arch/x86/hvm/vmx/vmx.c | 73 +++++++++++++++++++++++-- xen/arch/x86/include/asm/hvm/domain.h | 6 -- xen/arch/x86/include/asm/hvm/hvm.h | 3 + xen/arch/x86/include/asm/hvm/support.h | 2 - xen/arch/x86/include/asm/hvm/vcpu.h | 3 - xen/arch/x86/include/asm/hvm/vmx/vmcs.h | 13 +++++ xen/arch/x86/include/asm/mtrr.h | 3 - xen/arch/x86/mm/shadow/multi.c | 2 +- 9 files changed, 85 insertions(+), 79 deletions(-) --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Nov 11 20:08:54 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 20:08:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159305.1487680 (Exim 4.92) (envelope-from ) id 1vIufV-0004i6-GU; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DB3PR0302MB8919.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 7e9e3bd6-9374-4b35-921b-08de215e1339 X-MS-Exchange-CrossTenant-originalarrivaltime: 11 Nov 2025 20:08:26.5729 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: CIPFWV0bXXtKZjdPTA40fQZp/IzIIKn9zcgyLywzhWef8HX5ynWVdDnpiGBVJ2KZAA1YOkhE5NgJktUsPtIyN30UMAdnPTwqC48+2SjGWmM= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR03MB7758 From: Grygorii Strashko The hvm_shadow_handle_cd() can be used only with SHADOW_PAGING=3Dy, so guar= d hvm_shadow_handle_cd() call with paging_mode_shadow() which accounts for SHADOW_PAGING state. bloat-o-meter add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-290 (-290) Suggested-by: Jan Beulich Signed-off-by: Grygorii Strashko Reviewed-by: Jan Beulich --- changes in v2: - s/!paging_mode_hap()/paging_mode_shadow() xen/arch/x86/hvm/vmx/vmx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index d7efd0a73add..67861bc8bccf 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -1514,7 +1514,7 @@ static void hvm_shadow_handle_cd(struct vcpu *v, unsi= gned long value) =20 static void cf_check vmx_handle_cd(struct vcpu *v, unsigned long value) { - if ( !paging_mode_hap(v->domain) ) + if ( paging_mode_shadow(v->domain) ) { /* * For shadow, 'load IA32_PAT' VM-entry control is 0, so it cannot --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Nov 11 20:08:55 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 20:08:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159306.1487690 (Exim 4.92) (envelope-from ) id 1vIufW-0004wC-Pg; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DB3PR0302MB8919.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: b47fb9ef-ef0b-48ad-b339-08de215e1375 X-MS-Exchange-CrossTenant-originalarrivaltime: 11 Nov 2025 20:08:27.0007 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 95jexWdLC4EiJ7V6J/bumHsONLdsuTO2KgBvdF4oPp7IbnPmfKzEFBciYKp366GXudUOxZAiAm2TWdg7IuRk2/bka7jq5/wATrY1WNyiSwU= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR03MB7758 From: Grygorii Strashko The Cache Disable mode data is used only by VMX code, so move it from common HVM structures into VMX specific structures: - move "uc_lock", "is_in_uc_mode" fields from struct hvm_domain to struct vmx_domain; - move "cache_mode" field from struct hvm_vcpu to struct vmx_vcpu. Hence, the "in_uc_mode" field is used directly in mm/shadow/multi.c _sh_propagate(), introduce the hvm_is_in_uc_mode() macro to avoid direct access to this field and account for INTEL_VMX configuration. While here: - rename "is_in_uc_mode" to "in_uc_mode" - s/NORMAL_CACHE_MODE/CACHE_MODE_NORMAL - s/NO_FILL_CACHE_MODE/CACHE_MODE_NO_FILL Suggested-by: Andrew Cooper Signed-off-by: Grygorii Strashko --- changes in v2: - s/is_in_uc_mode/in_uc_mode - s/*_CACHE_MODE/CACHE_MODE_* and move them after "cache_mode" - reorder uc_lock,in_uc_mode in struct vmx_domain - move spin_lock_init() xen/arch/x86/hvm/hvm.c | 1 - xen/arch/x86/hvm/vmx/vmx.c | 30 +++++++++++++------------ xen/arch/x86/include/asm/hvm/domain.h | 6 ----- xen/arch/x86/include/asm/hvm/hvm.h | 3 +++ xen/arch/x86/include/asm/hvm/vcpu.h | 3 --- xen/arch/x86/include/asm/hvm/vmx/vmcs.h | 13 +++++++++++ xen/arch/x86/include/asm/mtrr.h | 3 --- xen/arch/x86/mm/shadow/multi.c | 2 +- 8 files changed, 33 insertions(+), 28 deletions(-) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 9caca93e5f56..c09fb2ba6873 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -608,7 +608,6 @@ int hvm_domain_initialise(struct domain *d, } =20 spin_lock_init(&d->arch.hvm.irq_lock); - spin_lock_init(&d->arch.hvm.uc_lock); spin_lock_init(&d->arch.hvm.write_map.lock); rwlock_init(&d->arch.hvm.mmcfg_lock); INIT_LIST_HEAD(&d->arch.hvm.write_map.list); diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 67861bc8bccf..0d9a4a17c433 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -590,6 +590,8 @@ static int cf_check vmx_domain_initialise(struct domain= *d) */ d->arch.hvm.vmx.exec_sp =3D is_hardware_domain(d) || opt_ept_exec_sp; =20 + spin_lock_init(&d->arch.hvm.vmx.uc_lock); + if ( (rc =3D vmx_alloc_vlapic_mapping(d)) !=3D 0 ) return rc; =20 @@ -1431,7 +1433,7 @@ static void cf_check vmx_set_segment_register( static int cf_check vmx_set_guest_pat(struct vcpu *v, u64 gpat) { if ( !paging_mode_hap(v->domain) || - unlikely(v->arch.hvm.cache_mode =3D=3D NO_FILL_CACHE_MODE) ) + unlikely(v->arch.hvm.vmx.cache_mode =3D=3D CACHE_MODE_NO_FILL) ) return 0; =20 vmx_vmcs_enter(v); @@ -1443,7 +1445,7 @@ static int cf_check vmx_set_guest_pat(struct vcpu *v,= u64 gpat) static int cf_check vmx_get_guest_pat(struct vcpu *v, u64 *gpat) { if ( !paging_mode_hap(v->domain) || - unlikely(v->arch.hvm.cache_mode =3D=3D NO_FILL_CACHE_MODE) ) + unlikely(v->arch.hvm.vmx.cache_mode =3D=3D CACHE_MODE_NO_FILL) ) return 0; =20 vmx_vmcs_enter(v); @@ -1462,7 +1464,7 @@ static bool domain_exit_uc_mode(struct vcpu *v) { if ( (vs =3D=3D v) || !vs->is_initialised ) continue; - if ( (vs->arch.hvm.cache_mode =3D=3D NO_FILL_CACHE_MODE) || + if ( (vs->arch.hvm.vmx.cache_mode =3D=3D CACHE_MODE_NO_FILL) || mtrr_pat_not_equal(vs, v) ) return false; } @@ -1472,7 +1474,7 @@ static bool domain_exit_uc_mode(struct vcpu *v) =20 static void hvm_set_uc_mode(struct domain *d, bool is_in_uc_mode) { - d->arch.hvm.is_in_uc_mode =3D is_in_uc_mode; + d->arch.hvm.vmx.in_uc_mode =3D is_in_uc_mode; shadow_blow_tables_per_domain(d); } =20 @@ -1483,10 +1485,10 @@ static void hvm_shadow_handle_cd(struct vcpu *v, un= signed long value) if ( value & X86_CR0_CD ) { /* Entering no fill cache mode. */ - spin_lock(&d->arch.hvm.uc_lock); - v->arch.hvm.cache_mode =3D NO_FILL_CACHE_MODE; + spin_lock(&d->arch.hvm.vmx.uc_lock); + v->arch.hvm.vmx.cache_mode =3D CACHE_MODE_NO_FILL; =20 - if ( !d->arch.hvm.is_in_uc_mode ) + if ( !d->arch.hvm.vmx.in_uc_mode ) { domain_pause_nosync(d); =20 @@ -1496,19 +1498,19 @@ static void hvm_shadow_handle_cd(struct vcpu *v, un= signed long value) =20 domain_unpause(d); } - spin_unlock(&d->arch.hvm.uc_lock); + spin_unlock(&d->arch.hvm.vmx.uc_lock); } else if ( !(value & X86_CR0_CD) && - (v->arch.hvm.cache_mode =3D=3D NO_FILL_CACHE_MODE) ) + (v->arch.hvm.vmx.cache_mode =3D=3D CACHE_MODE_NO_FILL) ) { /* Exit from no fill cache mode. */ - spin_lock(&d->arch.hvm.uc_lock); - v->arch.hvm.cache_mode =3D NORMAL_CACHE_MODE; + spin_lock(&d->arch.hvm.vmx.uc_lock); + v->arch.hvm.vmx.cache_mode =3D CACHE_MODE_NORMAL; =20 if ( domain_exit_uc_mode(v) ) hvm_set_uc_mode(d, false); =20 - spin_unlock(&d->arch.hvm.uc_lock); + spin_unlock(&d->arch.hvm.vmx.uc_lock); } } =20 @@ -1549,11 +1551,11 @@ static void cf_check vmx_handle_cd(struct vcpu *v, = unsigned long value) =20 wbinvd(); /* flush possibly polluted cache */ hvm_asid_flush_vcpu(v); /* invalidate memory type cached in TL= B */ - v->arch.hvm.cache_mode =3D NO_FILL_CACHE_MODE; + v->arch.hvm.vmx.cache_mode =3D CACHE_MODE_NO_FILL; } else { - v->arch.hvm.cache_mode =3D NORMAL_CACHE_MODE; + v->arch.hvm.vmx.cache_mode =3D CACHE_MODE_NORMAL; vmx_set_guest_pat(v, *pat); if ( !is_iommu_enabled(v->domain) || iommu_snoop ) vmx_clear_msr_intercept(v, MSR_IA32_CR_PAT, VMX_MSR_RW); diff --git a/xen/arch/x86/include/asm/hvm/domain.h b/xen/arch/x86/include/a= sm/hvm/domain.h index 95d9336a28f0..83be2bd1c29c 100644 --- a/xen/arch/x86/include/asm/hvm/domain.h +++ b/xen/arch/x86/include/asm/hvm/domain.h @@ -97,12 +97,6 @@ struct hvm_domain { /* VRAM dirty support. Protect with the domain paging lock. */ struct sh_dirty_vram *dirty_vram; =20 - /* If one of vcpus of this domain is in no_fill_mode or - * mtrr/pat between vcpus is not the same, set is_in_uc_mode - */ - spinlock_t uc_lock; - bool is_in_uc_mode; - bool is_s3_suspended; =20 /* Compatibility setting for a bug in x2APIC LDR */ diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/= hvm/hvm.h index 20b373cea6fb..728b9624522f 100644 --- a/xen/arch/x86/include/asm/hvm/hvm.h +++ b/xen/arch/x86/include/asm/hvm/hvm.h @@ -394,6 +394,9 @@ static inline bool using_svm(void) return IS_ENABLED(CONFIG_AMD_SVM) && cpu_has_svm; } =20 +#define hvm_is_in_uc_mode(d) \ + (using_vmx() && (d)->arch.hvm.vmx.in_uc_mode) + #ifdef CONFIG_HVM =20 #define hvm_get_guest_tsc(v) hvm_get_guest_tsc_fixed(v, 0) diff --git a/xen/arch/x86/include/asm/hvm/vcpu.h b/xen/arch/x86/include/asm= /hvm/vcpu.h index 9ed9eaff3bc5..eae9ac53767b 100644 --- a/xen/arch/x86/include/asm/hvm/vcpu.h +++ b/xen/arch/x86/include/asm/hvm/vcpu.h @@ -168,9 +168,6 @@ struct hvm_vcpu { =20 u8 evtchn_upcall_vector; =20 - /* Which cache mode is this VCPU in (CR0:CD/NW)? */ - u8 cache_mode; - struct hvm_vcpu_io hvm_io; =20 /* Pending hw/sw interrupt (.vector =3D -1 means nothing pending). */ diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h b/xen/arch/x86/include= /asm/hvm/vmx/vmcs.h index 53aa9e3556d3..d28a2682e9df 100644 --- a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h @@ -46,6 +46,7 @@ struct ept_data { =20 #define _VMX_DOMAIN_PML_ENABLED 0 #define VMX_DOMAIN_PML_ENABLED (1ul << _VMX_DOMAIN_PML_ENABLED) + struct vmx_domain { mfn_t apic_access_mfn; /* VMX_DOMAIN_* */ @@ -56,6 +57,13 @@ struct vmx_domain { * around CVE-2018-12207 as appropriate. */ bool exec_sp; + /* + * If one of vcpus of this domain is in no_fill_mode or + * mtrr/pat between vcpus is not the same, set in_uc_mode. + * Protected by uc_lock. + */ + bool in_uc_mode; + spinlock_t uc_lock; }; =20 /* @@ -158,6 +166,11 @@ struct vmx_vcpu { =20 uint8_t lbr_flags; =20 + /* Which cache mode is this VCPU in (CR0:CD/NW)? */ + uint8_t cache_mode; +#define CACHE_MODE_NORMAL 0 +#define CACHE_MODE_NO_FILL 2 + /* Bitmask of segments that we can't safely use in virtual 8086 mode *= / uint16_t vm86_segment_mask; /* Shadow CS, SS, DS, ES, FS, GS, TR while in virtual 8086 mode */ diff --git a/xen/arch/x86/include/asm/mtrr.h b/xen/arch/x86/include/asm/mtr= r.h index 25d442659df2..3a5b4f5b6eec 100644 --- a/xen/arch/x86/include/asm/mtrr.h +++ b/xen/arch/x86/include/asm/mtrr.h @@ -7,9 +7,6 @@ #define MEMORY_NUM_TYPES MTRR_NUM_TYPES #define NO_HARDCODE_MEM_TYPE MTRR_NUM_TYPES =20 -#define NORMAL_CACHE_MODE 0 -#define NO_FILL_CACHE_MODE 2 - #define INVALID_MEM_TYPE X86_NUM_MT =20 /* In the Intel processor's MTRR interface, the MTRR type is always held i= n diff --git a/xen/arch/x86/mm/shadow/multi.c b/xen/arch/x86/mm/shadow/multi.= c index 7be9c180ec43..03be61e225c0 100644 --- a/xen/arch/x86/mm/shadow/multi.c +++ b/xen/arch/x86/mm/shadow/multi.c @@ -559,7 +559,7 @@ _sh_propagate(struct vcpu *v, if ( !mmio_mfn && (type =3D hvm_get_mem_pinned_cacheattr(d, target_gfn, 0)) >= =3D 0 ) sflags |=3D pat_type_2_pte_flags(type); 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DB3PR0302MB8919.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 04a338fb-0a39-4438-1275-08de215e4a9b X-MS-Exchange-CrossTenant-originalarrivaltime: 11 Nov 2025 20:09:59.5267 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: odmjKHajuqlvjwLr4qssNvObhcSx+YklTdKm180I/xPf9PfdYtGANRCCYCE5lIyDyfkNA5vMFIJBa3j+ZaCODZxaASCkpGcYbXqf1gVmV7A= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR03MB7758 From: Grygorii Strashko The cache disable mode code (hvm_shadow_handle_cd()) is relevant only for I= ntel VT-x (VMX), hence: - move hvm_shadow_handle_cd()/ hvm_set_uc_mode()/domain_exit_uc_mode() in V= MX code - account for SHADOW_PAGING when use hvm_shadow_handle_cd() - move cache disable mode data into VMX specific structures Based on discussion [1]. [1] https://patchwork.kernel.org/project/xen-devel/patch/20251023151903.560= 947-1-grygorii_strashko@epam.com/ v1: https://patchwork.kernel.org/project/xen-devel/cover/20251029235448.602= 380-1-grygorii_strashko@epam.com/ Grygorii Strashko (3): x86/hvm: move hvm_shadow_handle_cd() to vmx code x86/hvm: vmx: account for SHADOW_PAGING when use hvm_shadow_handle_cd() x86/hvm: vmx: refactor cache disable mode data xen/arch/x86/hvm/hvm.c | 59 -------------------- xen/arch/x86/hvm/vmx/vmx.c | 73 +++++++++++++++++++++++-- xen/arch/x86/include/asm/hvm/domain.h | 6 -- xen/arch/x86/include/asm/hvm/hvm.h | 3 + xen/arch/x86/include/asm/hvm/support.h | 2 - xen/arch/x86/include/asm/hvm/vcpu.h | 3 - xen/arch/x86/include/asm/hvm/vmx/vmcs.h | 13 +++++ xen/arch/x86/include/asm/mtrr.h | 3 - xen/arch/x86/mm/shadow/multi.c | 2 +- 9 files changed, 85 insertions(+), 79 deletions(-) --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Nov 11 20:10:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 20:10:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159343.1487710 (Exim 4.92) (envelope-from ) id 1vIugp-0007TO-GN; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DB3PR0302MB8919.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: f14df5e5-b372-4f34-8d9b-08de215e4bc4 X-MS-Exchange-CrossTenant-originalarrivaltime: 11 Nov 2025 20:10:00.2924 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: pLpOg/lUrMhLeMu15ZzPZOvIbY3IRzTPHMu9ng/mbXw3jNsPgekHynekggG0xK/qe+36nbKiYzoQj2PXnqDINPrzlefjWQLqmjw2o5Lp3IU= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR03MB7758 From: Grygorii Strashko Functions: hvm_shadow_handle_cd() hvm_set_uc_mode() domain_exit_uc_mode() are used only by Intel VMX code, so move them to VMX code. While here: - minor format change in domain_exit_uc_mode() - s/(0/1)/(false/true) for bool types - use "struct domain *" as parameter in hvm_set_uc_mode() - use "struct domain *d" as local var in hvm_shadow_handle_cd() No functional changes. Signed-off-by: Grygorii Strashko --- changes in v2: - use "struct domain *" as parameter in hvm_set_uc_mode() - use "struct domain *d" as local var in hvm_shadow_handle_cd() - move code before vmx_handle_cd() xen/arch/x86/hvm/hvm.c | 58 ------------------------ xen/arch/x86/hvm/vmx/vmx.c | 61 ++++++++++++++++++++++++++ xen/arch/x86/include/asm/hvm/support.h | 2 - 3 files changed, 61 insertions(+), 60 deletions(-) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index da3cde1ff0e6..9caca93e5f56 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -2168,30 +2168,6 @@ int hvm_set_efer(uint64_t value) return X86EMUL_OKAY; } =20 -/* Exit UC mode only if all VCPUs agree on MTRR/PAT and are not in no_fill= . */ -static bool domain_exit_uc_mode(struct vcpu *v) -{ - struct domain *d =3D v->domain; - struct vcpu *vs; - - for_each_vcpu ( d, vs ) - { - if ( (vs =3D=3D v) || !vs->is_initialised ) - continue; - if ( (vs->arch.hvm.cache_mode =3D=3D NO_FILL_CACHE_MODE) || - mtrr_pat_not_equal(vs, v) ) - return 0; - } - - return 1; -} - -static void hvm_set_uc_mode(struct vcpu *v, bool is_in_uc_mode) -{ - v->domain->arch.hvm.is_in_uc_mode =3D is_in_uc_mode; - shadow_blow_tables_per_domain(v->domain); -} - int hvm_mov_to_cr(unsigned int cr, unsigned int gpr) { struct vcpu *curr =3D current; @@ -2273,40 +2249,6 @@ int hvm_mov_from_cr(unsigned int cr, unsigned int gp= r) return X86EMUL_UNHANDLEABLE; } =20 -void hvm_shadow_handle_cd(struct vcpu *v, unsigned long value) -{ - if ( value & X86_CR0_CD ) - { - /* Entering no fill cache mode. */ - spin_lock(&v->domain->arch.hvm.uc_lock); - v->arch.hvm.cache_mode =3D NO_FILL_CACHE_MODE; - - if ( !v->domain->arch.hvm.is_in_uc_mode ) - { - domain_pause_nosync(v->domain); - - /* Flush physical caches. */ - flush_all(FLUSH_CACHE_EVICT); - hvm_set_uc_mode(v, 1); - - domain_unpause(v->domain); - } - spin_unlock(&v->domain->arch.hvm.uc_lock); - } - else if ( !(value & X86_CR0_CD) && - (v->arch.hvm.cache_mode =3D=3D NO_FILL_CACHE_MODE) ) - { - /* Exit from no fill cache mode. */ - spin_lock(&v->domain->arch.hvm.uc_lock); - v->arch.hvm.cache_mode =3D NORMAL_CACHE_MODE; - - if ( domain_exit_uc_mode(v) ) - hvm_set_uc_mode(v, 0); - - spin_unlock(&v->domain->arch.hvm.uc_lock); - } -} - static void hvm_update_cr(struct vcpu *v, unsigned int cr, unsigned long v= alue) { v->arch.hvm.guest_cr[cr] =3D value; diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 6f2cc635e582..d7efd0a73add 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -44,6 +44,7 @@ #include #include #include +#include #include #include #include @@ -1451,6 +1452,66 @@ static int cf_check vmx_get_guest_pat(struct vcpu *v= , u64 *gpat) return 1; } =20 +/* Exit UC mode only if all VCPUs agree on MTRR/PAT and are not in no_fill= . */ +static bool domain_exit_uc_mode(struct vcpu *v) +{ + struct domain *d =3D v->domain; + struct vcpu *vs; + + for_each_vcpu(d, vs) + { + if ( (vs =3D=3D v) || !vs->is_initialised ) + continue; + if ( (vs->arch.hvm.cache_mode =3D=3D NO_FILL_CACHE_MODE) || + mtrr_pat_not_equal(vs, v) ) + return false; + } + + return true; +} + +static void hvm_set_uc_mode(struct domain *d, bool is_in_uc_mode) +{ + d->arch.hvm.is_in_uc_mode =3D is_in_uc_mode; + shadow_blow_tables_per_domain(d); +} + +static void hvm_shadow_handle_cd(struct vcpu *v, unsigned long value) +{ + struct domain *d =3D v->domain; + + if ( value & X86_CR0_CD ) + { + /* Entering no fill cache mode. */ + spin_lock(&d->arch.hvm.uc_lock); + v->arch.hvm.cache_mode =3D NO_FILL_CACHE_MODE; + + if ( !d->arch.hvm.is_in_uc_mode ) + { + domain_pause_nosync(d); + + /* Flush physical caches. */ + flush_all(FLUSH_CACHE_EVICT); + hvm_set_uc_mode(d, true); + + domain_unpause(d); + } + spin_unlock(&d->arch.hvm.uc_lock); + } + else if ( !(value & X86_CR0_CD) && + (v->arch.hvm.cache_mode =3D=3D NO_FILL_CACHE_MODE) ) + { + /* Exit from no fill cache mode. */ + spin_lock(&d->arch.hvm.uc_lock); + v->arch.hvm.cache_mode =3D NORMAL_CACHE_MODE; + + if ( domain_exit_uc_mode(v) ) + hvm_set_uc_mode(d, false); + + spin_unlock(&d->arch.hvm.uc_lock); + } +} + static void cf_check vmx_handle_cd(struct vcpu *v, unsigned long value) { if ( !paging_mode_hap(v->domain) ) diff --git a/xen/arch/x86/include/asm/hvm/support.h b/xen/arch/x86/include/= asm/hvm/support.h index 2a7ba36af06f..9e9fa6295567 100644 --- a/xen/arch/x86/include/asm/hvm/support.h +++ b/xen/arch/x86/include/asm/hvm/support.h @@ -119,8 +119,6 @@ void hvm_rdtsc_intercept(struct cpu_user_regs *regs); =20 int __must_check hvm_handle_xsetbv(u32 index, u64 new_bv); =20 -void hvm_shadow_handle_cd(struct vcpu *v, unsigned long value); - /* * These functions all return X86EMUL return codes. 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DB3PR0302MB8919.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9804fbff-d443-483a-80e7-08de215e4c26 X-MS-Exchange-CrossTenant-originalarrivaltime: 11 Nov 2025 20:10:01.0607 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 6vBRJE6kz8KVVvSkVutDpRvuN5DoJDC74RkaWFG36ocPOe4ccPuT/d68bbCG/LZbBEXe/pdw9V7CJHiqCiHGskydUz5HXUvkTOXhIWA1NaU= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR03MB7758 From: Grygorii Strashko The hvm_shadow_handle_cd() can be used only with SHADOW_PAGING=3Dy, so guar= d hvm_shadow_handle_cd() call with paging_mode_shadow() which accounts for SHADOW_PAGING state. bloat-o-meter add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-290 (-290) Suggested-by: Jan Beulich Signed-off-by: Grygorii Strashko Reviewed-by: Jan Beulich --- changes in v2: - s/!paging_mode_hap()/paging_mode_shadow() xen/arch/x86/hvm/vmx/vmx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index d7efd0a73add..67861bc8bccf 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -1514,7 +1514,7 @@ static void hvm_shadow_handle_cd(struct vcpu *v, unsi= gned long value) =20 static void cf_check vmx_handle_cd(struct vcpu *v, unsigned long value) { - if ( !paging_mode_hap(v->domain) ) + if ( paging_mode_shadow(v->domain) ) { /* * For shadow, 'load IA32_PAT' VM-entry control is 0, so it cannot --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Nov 11 20:10:08 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 20:10:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159345.1487721 (Exim 4.92) (envelope-from ) id 1vIugq-0007ex-9L; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DB3PR0302MB8919.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: e7d1592c-4371-460a-8e6a-08de215e4c5e X-MS-Exchange-CrossTenant-originalarrivaltime: 11 Nov 2025 20:10:01.6485 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: ILHPTK8Dbt8OMMIfS9/ttQDw1/PsoHOzILxRo0x18BgMv1PqKxQBWA58w50yF1k5Ifqhkh1qB0J5EmF8B+RYPozlXV2NR3OSc3IWtIX537k= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR03MB7758 From: Grygorii Strashko The Cache Disable mode data is used only by VMX code, so move it from common HVM structures into VMX specific structures: - move "uc_lock", "is_in_uc_mode" fields from struct hvm_domain to struct vmx_domain; - move "cache_mode" field from struct hvm_vcpu to struct vmx_vcpu. Hence, the "in_uc_mode" field is used directly in mm/shadow/multi.c _sh_propagate(), introduce the hvm_is_in_uc_mode() macro to avoid direct access to this field and account for INTEL_VMX configuration. While here: - rename "is_in_uc_mode" to "in_uc_mode" - s/NORMAL_CACHE_MODE/CACHE_MODE_NORMAL - s/NO_FILL_CACHE_MODE/CACHE_MODE_NO_FILL Suggested-by: Andrew Cooper Signed-off-by: Grygorii Strashko --- changes in v2: - s/is_in_uc_mode/in_uc_mode - s/*_CACHE_MODE/CACHE_MODE_* and move them after "cache_mode" - reorder uc_lock,in_uc_mode in struct vmx_domain - move spin_lock_init() xen/arch/x86/hvm/hvm.c | 1 - xen/arch/x86/hvm/vmx/vmx.c | 30 +++++++++++++------------ xen/arch/x86/include/asm/hvm/domain.h | 6 ----- xen/arch/x86/include/asm/hvm/hvm.h | 3 +++ xen/arch/x86/include/asm/hvm/vcpu.h | 3 --- xen/arch/x86/include/asm/hvm/vmx/vmcs.h | 13 +++++++++++ xen/arch/x86/include/asm/mtrr.h | 3 --- xen/arch/x86/mm/shadow/multi.c | 2 +- 8 files changed, 33 insertions(+), 28 deletions(-) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 9caca93e5f56..c09fb2ba6873 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -608,7 +608,6 @@ int hvm_domain_initialise(struct domain *d, } =20 spin_lock_init(&d->arch.hvm.irq_lock); - spin_lock_init(&d->arch.hvm.uc_lock); spin_lock_init(&d->arch.hvm.write_map.lock); rwlock_init(&d->arch.hvm.mmcfg_lock); INIT_LIST_HEAD(&d->arch.hvm.write_map.list); diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 67861bc8bccf..0d9a4a17c433 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -590,6 +590,8 @@ static int cf_check vmx_domain_initialise(struct domain= *d) */ d->arch.hvm.vmx.exec_sp =3D is_hardware_domain(d) || opt_ept_exec_sp; =20 + spin_lock_init(&d->arch.hvm.vmx.uc_lock); + if ( (rc =3D vmx_alloc_vlapic_mapping(d)) !=3D 0 ) return rc; =20 @@ -1431,7 +1433,7 @@ static void cf_check vmx_set_segment_register( static int cf_check vmx_set_guest_pat(struct vcpu *v, u64 gpat) { if ( !paging_mode_hap(v->domain) || - unlikely(v->arch.hvm.cache_mode =3D=3D NO_FILL_CACHE_MODE) ) + unlikely(v->arch.hvm.vmx.cache_mode =3D=3D CACHE_MODE_NO_FILL) ) return 0; =20 vmx_vmcs_enter(v); @@ -1443,7 +1445,7 @@ static int cf_check vmx_set_guest_pat(struct vcpu *v,= u64 gpat) static int cf_check vmx_get_guest_pat(struct vcpu *v, u64 *gpat) { if ( !paging_mode_hap(v->domain) || - unlikely(v->arch.hvm.cache_mode =3D=3D NO_FILL_CACHE_MODE) ) + unlikely(v->arch.hvm.vmx.cache_mode =3D=3D CACHE_MODE_NO_FILL) ) return 0; =20 vmx_vmcs_enter(v); @@ -1462,7 +1464,7 @@ static bool domain_exit_uc_mode(struct vcpu *v) { if ( (vs =3D=3D v) || !vs->is_initialised ) continue; - if ( (vs->arch.hvm.cache_mode =3D=3D NO_FILL_CACHE_MODE) || + if ( (vs->arch.hvm.vmx.cache_mode =3D=3D CACHE_MODE_NO_FILL) || mtrr_pat_not_equal(vs, v) ) return false; } @@ -1472,7 +1474,7 @@ static bool domain_exit_uc_mode(struct vcpu *v) =20 static void hvm_set_uc_mode(struct domain *d, bool is_in_uc_mode) { - d->arch.hvm.is_in_uc_mode =3D is_in_uc_mode; + d->arch.hvm.vmx.in_uc_mode =3D is_in_uc_mode; shadow_blow_tables_per_domain(d); } =20 @@ -1483,10 +1485,10 @@ static void hvm_shadow_handle_cd(struct vcpu *v, un= signed long value) if ( value & X86_CR0_CD ) { /* Entering no fill cache mode. */ - spin_lock(&d->arch.hvm.uc_lock); - v->arch.hvm.cache_mode =3D NO_FILL_CACHE_MODE; + spin_lock(&d->arch.hvm.vmx.uc_lock); + v->arch.hvm.vmx.cache_mode =3D CACHE_MODE_NO_FILL; =20 - if ( !d->arch.hvm.is_in_uc_mode ) + if ( !d->arch.hvm.vmx.in_uc_mode ) { domain_pause_nosync(d); =20 @@ -1496,19 +1498,19 @@ static void hvm_shadow_handle_cd(struct vcpu *v, un= signed long value) =20 domain_unpause(d); } - spin_unlock(&d->arch.hvm.uc_lock); + spin_unlock(&d->arch.hvm.vmx.uc_lock); } else if ( !(value & X86_CR0_CD) && - (v->arch.hvm.cache_mode =3D=3D NO_FILL_CACHE_MODE) ) + (v->arch.hvm.vmx.cache_mode =3D=3D CACHE_MODE_NO_FILL) ) { /* Exit from no fill cache mode. */ - spin_lock(&d->arch.hvm.uc_lock); - v->arch.hvm.cache_mode =3D NORMAL_CACHE_MODE; + spin_lock(&d->arch.hvm.vmx.uc_lock); + v->arch.hvm.vmx.cache_mode =3D CACHE_MODE_NORMAL; =20 if ( domain_exit_uc_mode(v) ) hvm_set_uc_mode(d, false); =20 - spin_unlock(&d->arch.hvm.uc_lock); + spin_unlock(&d->arch.hvm.vmx.uc_lock); } } =20 @@ -1549,11 +1551,11 @@ static void cf_check vmx_handle_cd(struct vcpu *v, = unsigned long value) =20 wbinvd(); /* flush possibly polluted cache */ hvm_asid_flush_vcpu(v); /* invalidate memory type cached in TL= B */ - v->arch.hvm.cache_mode =3D NO_FILL_CACHE_MODE; + v->arch.hvm.vmx.cache_mode =3D CACHE_MODE_NO_FILL; } else { - v->arch.hvm.cache_mode =3D NORMAL_CACHE_MODE; + v->arch.hvm.vmx.cache_mode =3D CACHE_MODE_NORMAL; vmx_set_guest_pat(v, *pat); if ( !is_iommu_enabled(v->domain) || iommu_snoop ) vmx_clear_msr_intercept(v, MSR_IA32_CR_PAT, VMX_MSR_RW); diff --git a/xen/arch/x86/include/asm/hvm/domain.h b/xen/arch/x86/include/a= sm/hvm/domain.h index 95d9336a28f0..83be2bd1c29c 100644 --- a/xen/arch/x86/include/asm/hvm/domain.h +++ b/xen/arch/x86/include/asm/hvm/domain.h @@ -97,12 +97,6 @@ struct hvm_domain { /* VRAM dirty support. Protect with the domain paging lock. */ struct sh_dirty_vram *dirty_vram; =20 - /* If one of vcpus of this domain is in no_fill_mode or - * mtrr/pat between vcpus is not the same, set is_in_uc_mode - */ - spinlock_t uc_lock; - bool is_in_uc_mode; - bool is_s3_suspended; =20 /* Compatibility setting for a bug in x2APIC LDR */ diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/= hvm/hvm.h index 20b373cea6fb..728b9624522f 100644 --- a/xen/arch/x86/include/asm/hvm/hvm.h +++ b/xen/arch/x86/include/asm/hvm/hvm.h @@ -394,6 +394,9 @@ static inline bool using_svm(void) return IS_ENABLED(CONFIG_AMD_SVM) && cpu_has_svm; } =20 +#define hvm_is_in_uc_mode(d) \ + (using_vmx() && (d)->arch.hvm.vmx.in_uc_mode) + #ifdef CONFIG_HVM =20 #define hvm_get_guest_tsc(v) hvm_get_guest_tsc_fixed(v, 0) diff --git a/xen/arch/x86/include/asm/hvm/vcpu.h b/xen/arch/x86/include/asm= /hvm/vcpu.h index 9ed9eaff3bc5..eae9ac53767b 100644 --- a/xen/arch/x86/include/asm/hvm/vcpu.h +++ b/xen/arch/x86/include/asm/hvm/vcpu.h @@ -168,9 +168,6 @@ struct hvm_vcpu { =20 u8 evtchn_upcall_vector; =20 - /* Which cache mode is this VCPU in (CR0:CD/NW)? */ - u8 cache_mode; - struct hvm_vcpu_io hvm_io; =20 /* Pending hw/sw interrupt (.vector =3D -1 means nothing pending). */ diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h b/xen/arch/x86/include= /asm/hvm/vmx/vmcs.h index 53aa9e3556d3..d28a2682e9df 100644 --- a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h @@ -46,6 +46,7 @@ struct ept_data { =20 #define _VMX_DOMAIN_PML_ENABLED 0 #define VMX_DOMAIN_PML_ENABLED (1ul << _VMX_DOMAIN_PML_ENABLED) + struct vmx_domain { mfn_t apic_access_mfn; /* VMX_DOMAIN_* */ @@ -56,6 +57,13 @@ struct vmx_domain { * around CVE-2018-12207 as appropriate. */ bool exec_sp; + /* + * If one of vcpus of this domain is in no_fill_mode or + * mtrr/pat between vcpus is not the same, set in_uc_mode. + * Protected by uc_lock. + */ + bool in_uc_mode; + spinlock_t uc_lock; }; =20 /* @@ -158,6 +166,11 @@ struct vmx_vcpu { =20 uint8_t lbr_flags; =20 + /* Which cache mode is this VCPU in (CR0:CD/NW)? */ + uint8_t cache_mode; +#define CACHE_MODE_NORMAL 0 +#define CACHE_MODE_NO_FILL 2 + /* Bitmask of segments that we can't safely use in virtual 8086 mode *= / uint16_t vm86_segment_mask; /* Shadow CS, SS, DS, ES, FS, GS, TR while in virtual 8086 mode */ diff --git a/xen/arch/x86/include/asm/mtrr.h b/xen/arch/x86/include/asm/mtr= r.h index 25d442659df2..3a5b4f5b6eec 100644 --- a/xen/arch/x86/include/asm/mtrr.h +++ b/xen/arch/x86/include/asm/mtrr.h @@ -7,9 +7,6 @@ #define MEMORY_NUM_TYPES MTRR_NUM_TYPES #define NO_HARDCODE_MEM_TYPE MTRR_NUM_TYPES =20 -#define NORMAL_CACHE_MODE 0 -#define NO_FILL_CACHE_MODE 2 - #define INVALID_MEM_TYPE X86_NUM_MT =20 /* In the Intel processor's MTRR interface, the MTRR type is always held i= n diff --git a/xen/arch/x86/mm/shadow/multi.c b/xen/arch/x86/mm/shadow/multi.= c index 7be9c180ec43..03be61e225c0 100644 --- a/xen/arch/x86/mm/shadow/multi.c +++ b/xen/arch/x86/mm/shadow/multi.c @@ -559,7 +559,7 @@ _sh_propagate(struct vcpu *v, if ( !mmio_mfn && (type =3D hvm_get_mem_pinned_cacheattr(d, target_gfn, 0)) >= =3D 0 ) sflags |=3D pat_type_2_pte_flags(type); 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DB3PR0302MB8919.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: a8678701-6705-45cd-2d89-08de215f3233 X-MS-Exchange-CrossTenant-originalarrivaltime: 11 Nov 2025 20:16:28.0150 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: lWlqYpjIBQkdO8QuW7MzYp/LUuX1X5KABPwgb5O9WTJpA2BCMy3GwRmvVXXXH4KGzM1a7TS0OF5xisqOV70gzFKvqUkz6iZks4wRd+ZL7gs= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS2PR03MB10060 From: Grygorii Strashko Every XEN_DOMCTL_CDF_x flag: - is defined in public/domctl.h - explicitly listed in sanitise_domain_config() (common/domain.c) to form mask containing all supported DOMCTL_CDF flags for "Unknown CDF flags" check. So, it is required to modify two files every time XEN_DOMCTL_CDF_x flags set is modified. Simplify the things by introducing XEN_DOMCTL_CDF_ALL mask, so sanitise_domain_config() no need to be modified any more. Signed-off-by: Grygorii Strashko --- xen/common/domain.c | 7 +------ xen/include/public/domctl.h | 7 +++++++ 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/xen/common/domain.c b/xen/common/domain.c index 775c33928585..4f91316ad93e 100644 --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -730,12 +730,7 @@ static int sanitise_domain_config(struct xen_domctl_cr= eatedomain *config) bool iommu =3D config->flags & XEN_DOMCTL_CDF_iommu; bool vpmu =3D config->flags & XEN_DOMCTL_CDF_vpmu; =20 - if ( config->flags & - ~(XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap | - XEN_DOMCTL_CDF_s3_integrity | XEN_DOMCTL_CDF_oos_off | - XEN_DOMCTL_CDF_xs_domain | XEN_DOMCTL_CDF_iommu | - XEN_DOMCTL_CDF_nested_virt | XEN_DOMCTL_CDF_vpmu | - XEN_DOMCTL_CDF_trap_unmapped_accesses) ) + if ( config->flags & ~XEN_DOMCTL_CDF_ALL ) { dprintk(XENLOG_INFO, "Unknown CDF flags %#x\n", config->flags); return -EINVAL; diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h index 8f6708c0a7cd..94a8e3042cbf 100644 --- a/xen/include/public/domctl.h +++ b/xen/include/public/domctl.h @@ -72,6 +72,13 @@ struct xen_domctl_createdomain { /* Max XEN_DOMCTL_CDF_* constant. Used for ABI checking. */ #define XEN_DOMCTL_CDF_MAX XEN_DOMCTL_CDF_trap_unmapped_accesses =20 +#define XEN_DOMCTL_CDF_ALL = \ + (XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap | = \ + XEN_DOMCTL_CDF_s3_integrity | XEN_DOMCTL_CDF_oos_off | = \ + XEN_DOMCTL_CDF_xs_domain | XEN_DOMCTL_CDF_iommu | = \ + XEN_DOMCTL_CDF_nested_virt | XEN_DOMCTL_CDF_vpmu | = \ + XEN_DOMCTL_CDF_trap_unmapped_accesses) + uint32_t flags; =20 #define _XEN_DOMCTL_IOMMU_no_sharept 0 --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Nov 11 22:06:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 11 Nov 2025 22:06:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159421.1487749 (Exim 4.92) (envelope-from ) id 1vIwUs-0007Et-OD; Tue, 11 Nov 2025 22:05:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159421.1487749; Tue, 11 Nov 2025 22:05:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vIwUs-0007Em-LV; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: VI1PR03MB3583.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6c174c6c-f63a-400c-ed5a-08de216e7868 X-MS-Exchange-CrossTenant-originalarrivaltime: 11 Nov 2025 22:05:48.3196 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: S40OSPms21HY1L5pNO6Y7FlFbd0c14d7izPXCHCJKueXCwuC4g7l91Tq1B0zW4CBbHA5AatX55e5G+EzfFi4keaj9OS4pQ/bscNssi6pdX0= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR03MB7832 Introduce a new Arm-specific DOMU_TRAP_UNMAP parameter that allows configuring how Xen handles domain accesses to unmapped address ranges. This parameter corresponds to the "trap-unmapped-accesses" device tree property. Signed-off-by: Oleksandr Tyshchenko --- README.md | 6 ++++++ scripts/uboot-script-gen | 5 +++++ 2 files changed, 11 insertions(+) diff --git a/README.md b/README.md index 2efac97..7ec7e7c 100644 --- a/README.md +++ b/README.md @@ -319,6 +319,12 @@ Where: 2: Hardware 4: Xenstore =20 +- DOMU_TRAP_UNMAP[number] is an Arm-only option that configures handling o= f + domain accesses to unmapped address ranges. It is optional and has no ef= fect + on x86. If set to 0, domain reads will return all bits as ones correspon= ding + to the access size and writes will be ignored. If set to 1, such accesse= s will + trap. The default is 1 when not specified. + - LINUX is optional but specifies the Linux kernel for when Xen is NOT used. To enable this set any LINUX\_\* variables and do NOT set the XEN variable. diff --git a/scripts/uboot-script-gen b/scripts/uboot-script-gen index e319de8..7912cc7 100755 --- a/scripts/uboot-script-gen +++ b/scripts/uboot-script-gen @@ -493,6 +493,11 @@ function xen_device_tree_editing() dt_set "/chosen/domU$i" "capabilities" "int" "$caps" fi =20 + if test -n "${DOMU_TRAP_UNMAP[$i]}" && (test "${DOMU_TRAP_UNMAP[$i= ]}" -eq "0" || test "${DOMU_TRAP_UNMAP[$i]}" -eq "1") + then + dt_set "/chosen/domU$i" "trap-unmapped-accesses" "int" "${DOMU= _TRAP_UNMAP[$i]}" + fi + if test -n "${DOMU_SHARED_MEM[i]}" then add_device_tree_static_shared_mem "/chosen/domU${i}" "${DOMU_S= HARED_MEM[i]}" --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Wed Nov 12 01:21:40 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 01:21:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159435.1487760 (Exim 4.92) (envelope-from ) id 1vIzY2-0004cS-E1; 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bh=ktGJPSQTd+vfBwXa7rurz/0mSlEmpoQZvOmd02Cocdo=; b=avpBGRC5QPuxUqWUWuBJyBZmG/+M9WTaccxP1THrZUZP7ARapjNwRyRjm5DWd7CXIPeJ+GeIlHAir8Vw+S4OBA4ZteiXMWwEEeQmyn+PvlQ+kiglXJcawPU7ELat6pOh733iuj5W+QjfMh+ytNwDwOvTUtugCVBjuu2ev4d7VBI= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Message-ID: <84db78e4-313e-4d6a-81e0-230cf27ca78d@amd.com> Date: Tue, 11 Nov 2025 20:21:01 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH 1/5] x86: hvm: dm: factor out compat code under ifdefs To: Grygorii Strashko , "xen-devel@lists.xenproject.org" CC: Jan Beulich , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Alejandro Vallejo References: <20251111175413.3540690-1-grygorii_strashko@epam.com> <20251111175413.3540690-2-grygorii_strashko@epam.com> Content-Language: en-US From: Jason Andryuk In-Reply-To: <20251111175413.3540690-2-grygorii_strashko@epam.com> Content-Type: text/plain; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Nov 2025 01:21:06.7585 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 49e455bd-87a6-4904-0b86-08de2189c12b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00003F64.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB8985 On 2025-11-11 12:54, Grygorii Strashko wrote: > From: Grygorii Strashko > > Factor out COMPAT HVM DM code under ifdefs in preparation for making HVM > COMPAT code optional. > > changes in v2: > - do not move code, use ifdefs > > Signed-off-by: Grygorii Strashko Reviewed-by: Jason Andryuk Thanks, Jason From xen-devel-bounces@lists.xenproject.org Wed Nov 12 01:23:36 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 01:23:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159447.1487770 (Exim 4.92) (envelope-from ) id 1vIzaA-0005Ct-TK; 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bh=g8x/9tXkN/lAbw5bYMeeVxIhTOlPZhdFSyUxiHE0hPQ=; b=1mhHacQvJoihtxNO2vvO4sxKo0FfRUl6WNpIrdZC1a5FqK1gKDAya+SAaEydOT+OOATzuI98ZdzvflaBdTYJ0zOgNpC75vMc86zNynUJVdZIdY31kmS8yaUJ+hV5ecMOngCPJdHfabME1l5TN1+SkfbBgNpdofuu23HTyMA+VqY= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Message-ID: Date: Tue, 11 Nov 2025 20:23:22 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH 2/5] x86: hvm: compat: introduce vcpu_is_hcall_compat() helper To: Grygorii Strashko , "xen-devel@lists.xenproject.org" CC: Jan Beulich , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , "Michal Orzel" , Julien Grall , "Stefano Stabellini" , Alejandro Vallejo References: <20251111175413.3540690-1-grygorii_strashko@epam.com> <20251111175413.3540690-3-grygorii_strashko@epam.com> Content-Language: en-US From: Jason Andryuk In-Reply-To: <20251111175413.3540690-3-grygorii_strashko@epam.com> Content-Type: text/plain; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Nov 2025 01:23:24.1771 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8bfb4d15-eb50-4a1c-df84-08de218a1312 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00003F63.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4405 On 2025-11-11 12:54, Grygorii Strashko wrote: > From: Grygorii Strashko > > Introduce vcpu_is_hcall_compat() helper and use it instead of direct access > to struct vcpu->hcall_compat field in preparation for making HVM COMPAT > code optional. > > Signed-off-by: Grygorii Strashko Reviewed-by: Jason Andryuk Thanks, Jason From xen-devel-bounces@lists.xenproject.org Wed Nov 12 06:39:20 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 06:39:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159462.1487779 (Exim 4.92) (envelope-from ) id 1vJ4VU-0007EV-7d; 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Tue, 11 Nov 2025 22:38:55 -0800 (PST) Message-ID: Date: Wed, 12 Nov 2025 07:38:53 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH v3] xen/x86: guest_access: optimize raw_x_guest() for PV and HVM combinations To: Grygorii Strashko Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , Teddy Astie , "xen-devel@lists.xenproject.org" , Stefano Stabellini , "Lira, Victor M" References: <20251107181739.3034098-1-grygorii_strashko@epam.com> <47f86a44-007f-4b90-9656-b2440238b2ba@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 11.11.2025 18:52, Grygorii Strashko wrote: > On 10.11.25 09:11, Jan Beulich wrote: >> On 07.11.2025 19:17, Grygorii Strashko wrote: >>> --- a/xen/arch/x86/include/asm/guest_access.h >>> +++ b/xen/arch/x86/include/asm/guest_access.h >>> @@ -13,26 +13,64 @@ >>>   #include >>>     /* Raw access functions: no type checking. */ >>> -#define raw_copy_to_guest(dst, src, len)        \ >>> -    (is_hvm_vcpu(current) ?                     \ >>> -     copy_to_user_hvm((dst), (src), (len)) :    \ >>> -     copy_to_guest_pv(dst, src, len)) >>> -#define raw_copy_from_guest(dst, src, len)      \ >>> -    (is_hvm_vcpu(current) ?                     \ >>> -     copy_from_user_hvm((dst), (src), (len)) :  \ >>> -     copy_from_guest_pv(dst, src, len)) >>> -#define raw_clear_guest(dst,  len)              \ >>> -    (is_hvm_vcpu(current) ?                     \ >>> -     clear_user_hvm((dst), (len)) :             \ >>> -     clear_guest_pv(dst, len)) >>> -#define __raw_copy_to_guest(dst, src, len)      \ >>> -    (is_hvm_vcpu(current) ?                     \ >>> -     copy_to_user_hvm((dst), (src), (len)) :    \ >>> -     __copy_to_guest_pv(dst, src, len)) >>> -#define __raw_copy_from_guest(dst, src, len)    \ >>> -    (is_hvm_vcpu(current) ?                     \ >>> -     copy_from_user_hvm((dst), (src), (len)) :  \ >>> -     __copy_from_guest_pv(dst, src, len)) >>> +static inline bool raw_use_hvm_access(const struct vcpu *v) >>> +{ >>> +    return IS_ENABLED(CONFIG_HVM) && (!IS_ENABLED(CONFIG_PV) || is_hvm_vcpu(v)); >>> +} >> >> Without a full audit (likely tedious and error prone) this still is a >> behavioral change for some (likely unintended) use against a system domain >> (likely the idle one): With HVM=y PV=n we'd suddenly use the HVM accessor >> there. IOW imo the "system domains are implicitly PV" aspect wants >> retaining, even if only "just in case". It's okay not to invoke the PV >> accessor (but return "len" instead), but it's not okay to invoke the HVM >> one. > > This patch is subset of "constify is_hvm_domain() for PV=n case" attempts. > > It was made under assumption that: > "System domains do not have Guests running, so can't initiate hypecalls and >  can not be users of copy_to/from_user() routines. There are no Guest and no user memory". > [IDLE, COW, IO, XEN] > > If above assumption is correct - this patch was assumed safe. > > if not - it all make no sense, probably. I wouldn't go as far as saying that. It can be arranged to avid the corner case I mentioned, I think. Jan From xen-devel-bounces@lists.xenproject.org Wed Nov 12 06:40:50 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 06:40:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159473.1487789 (Exim 4.92) (envelope-from ) id 1vJ4XB-0000Fy-Hg; Wed, 12 Nov 2025 06:40:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159473.1487789; Wed, 12 Nov 2025 06:40:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJ4XB-0000Fr-F9; Wed, 12 Nov 2025 06:40:49 +0000 Received: by outflank-mailman (input) for mailman id 1159473; Wed, 12 Nov 2025 06:40:48 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJ4XA-0000Fl-RO for xen-devel@lists.xenproject.org; Wed, 12 Nov 2025 06:40:48 +0000 Received: from mail-wr1-x42c.google.com (mail-wr1-x42c.google.com [2a00:1450:4864:20::42c]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 8524168c-bf92-11f0-980a-7dc792cee155; Wed, 12 Nov 2025 07:40:47 +0100 (CET) Received: by mail-wr1-x42c.google.com with SMTP id ffacd0b85a97d-42b31c610fcso343080f8f.0 for ; Tue, 11 Nov 2025 22:40:47 -0800 (PST) Received: from ?IPV6:2003:ca:b70c:6a60:8d0a:6473:d951:bd22? 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Tue, 11 Nov 2025 22:40:46 -0800 (PST) Message-ID: Date: Wed, 12 Nov 2025 07:40:44 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH v7] x86: make Viridian support optional To: Grygorii Strashko Cc: Sergiy Kibrik , Andrew Cooper , Paul Durrant , Alejandro Vallejo , "xen-devel@lists.xenproject.org" , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk References: <20251031161716.1222956-1-grygorii_strashko@epam.com> <210edee7-8525-47a9-8191-ea7d94db5fce@suse.com> <0a5af540-214d-46cc-93e5-f0266bb79064@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <0a5af540-214d-46cc-93e5-f0266bb79064@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 11.11.2025 19:25, Grygorii Strashko wrote: > On 06.11.25 15:47, Jan Beulich wrote: >> On 06.11.2025 14:42, Grygorii Strashko wrote: >>> On 06.11.25 13:35, Jan Beulich wrote: >>>> On 31.10.2025 17:17, Grygorii Strashko wrote: >>>>> --- a/xen/arch/x86/hvm/hvm.c >>>>> +++ b/xen/arch/x86/hvm/hvm.c >>>>> @@ -4231,8 +4231,9 @@ static int hvm_set_param(struct domain *d, uint32_t index, uint64_t value) >>>>>                rc = -EINVAL; >>>>>            break; >>>>>        case HVM_PARAM_VIRIDIAN: >>>>> -        if ( (value & ~HVMPV_feature_mask) || >>>>> -             !(value & HVMPV_base_freq) ) >>>>> +        if ( !IS_ENABLED(CONFIG_VIRIDIAN) && value ) >>>>> +            rc = -ENODEV; >>>>> +        else if ( (value & ~HVMPV_feature_mask) || !(value & HVMPV_base_freq) ) >>>>>                rc = -EINVAL; >>>> >>>> I find the check for value to be (non-)zero a little dubious here: If any caller >>>> passed in 0, it would get back -EINVAL anyway. Imo -ENODEV would be more suitable >>>> in that case as well. Things would be different if 0 was a valid value to pass in. >>> >>> The idea was to distinguish between "Feature enabled, Invalid parameter" and "Feature disabled". >> " >> But you don't, or else the addition would need to live after the -EINVAL checks. >> I also question the utility of knowing "parameter was invalid" when the feature >> isn't available anyway. > > My understanding here - I need to drop non-zero "value" check. > will be: > >     case HVM_PARAM_VIRIDIAN: >         if ( !IS_ENABLED(CONFIG_VIRIDIAN) ) >             rc = -ENODEV; >         else if ( (value & ~HVMPV_feature_mask) || !(value & HVMPV_base_freq) ) >             rc = -EINVAL; >         break; Yes, or alternatively case HVM_PARAM_VIRIDIAN: if ( (value & ~HVMPV_feature_mask) || !(value & HVMPV_base_freq) ) rc = -EINVAL; else if ( !IS_ENABLED(CONFIG_VIRIDIAN) ) rc = -ENODEV; break; Both have their up- and down-sides. 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Tue, 11 Nov 2025 22:50:06 -0800 (PST) Message-ID: Date: Wed, 12 Nov 2025 07:50:04 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH 0/5] x86: pvh: allow to disable 32-bit (COMPAT) interface support To: Grygorii Strashko Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Alejandro Vallejo , Jason Andryuk , "xen-devel@lists.xenproject.org" References: <20251111175413.3540690-1-grygorii_strashko@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251111175413.3540690-1-grygorii_strashko@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 11.11.2025 18:54, Grygorii Strashko wrote: > This series introduces possibility to disable 32-bit (COMPAT) interface support > in the following cases: The use of plural here ... > - Only PVH domains are used > - Guests (OS) are started by using direct Direct Kernel Boot > - Guests (OS) are 64-bit and Guest early boot code, which is running not > in 64-bit mode, does not access Xen interfaces > (hypercalls, shared_info, ..) ... makes this an OR list, which I don't think would be correct. PVH domains, for example, can well be 32-bit ones, can't they? Otoh the latter two points look as if they really enumerate alternatives. Can you clarify please what is meant? Jan > If above criterias are met the COMPAT HVM interface become unreachable and can be disabled. > Coverage reports analyze and adding guard (debug) exceptions in hvm_hypercall/hvm_do_multicall_call > and hvm_latch_shinfo_size() confirm that COMPAT HVM interface is unused for safety use-case. > > Grygorii Strashko (5): > x86: hvm: dm: factor out compat code under ifdefs > x86: hvm: compat: introduce vcpu_is_hcall_compat() helper > x86: hvm: factor out compat code under ifdefs > x86: pvh: allow to disable 32-bit interface support > x86: constify has_32bit_shinfo() if !CONFIG_COMPAT > > xen/arch/x86/hvm/Kconfig | 19 +++++++++++++++- > xen/arch/x86/hvm/dm.c | 2 ++ > xen/arch/x86/hvm/hvm.c | 22 +++++++++++++----- > xen/arch/x86/hvm/hypercall.c | 37 +++++++++++++++++++++++-------- > xen/arch/x86/hypercall.c | 6 +---- > xen/arch/x86/include/asm/domain.h | 3 ++- > xen/common/kernel.c | 2 +- > xen/include/xen/sched.h | 9 ++++++++ > 8 files changed, 78 insertions(+), 22 deletions(-) > From xen-devel-bounces@lists.xenproject.org Wed Nov 12 07:06:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 07:06:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159500.1487809 (Exim 4.92) (envelope-from ) id 1vJ4vZ-0003vY-ON; Wed, 12 Nov 2025 07:06:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159500.1487809; Wed, 12 Nov 2025 07:06:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJ4vZ-0003vR-Lt; Wed, 12 Nov 2025 07:06:01 +0000 Received: by outflank-mailman (input) for mailman id 1159500; Wed, 12 Nov 2025 07:06:00 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJ4vY-0003vJ-9K for xen-devel@lists.xenproject.org; Wed, 12 Nov 2025 07:06:00 +0000 Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [2a00:1450:4864:20::432]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 0a6c0591-bf96-11f0-9d18-b5c5bf9af7f9; Wed, 12 Nov 2025 08:05:59 +0100 (CET) Received: by mail-wr1-x432.google.com with SMTP id ffacd0b85a97d-42b427cda88so261698f8f.0 for ; Tue, 11 Nov 2025 23:05:59 -0800 (PST) Received: from ?IPV6:2003:ca:b70c:6a60:8d0a:6473:d951:bd22? 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Tue, 11 Nov 2025 23:05:58 -0800 (PST) Message-ID: <0192173c-c88d-4f73-95fc-5ae2ab3a0bb1@suse.com> Date: Wed, 12 Nov 2025 08:05:56 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/5] config: remove stale definition from Config.mk To: Juergen Gross Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20251111161959.13667-1-jgross@suse.com> <20251111161959.13667-2-jgross@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251111161959.13667-2-jgross@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 11.11.2025 17:19, Juergen Gross wrote: > buildmakevars2shellvars is used nowhere, so remove it. Amends: 1eb944f65055 ("tools: remove qemu-traditional") > Signed-off-by: Juergen Gross Reviewed-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Wed Nov 12 07:08:32 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 07:08:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159511.1487821 (Exim 4.92) (envelope-from ) id 1vJ4xz-0004S8-5j; Wed, 12 Nov 2025 07:08:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159511.1487821; Wed, 12 Nov 2025 07:08:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJ4xz-0004S1-19; Wed, 12 Nov 2025 07:08:31 +0000 Received: by outflank-mailman (input) for mailman id 1159511; Wed, 12 Nov 2025 07:08:29 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJ4xx-0004Rv-Gv for xen-devel@lists.xenproject.org; Wed, 12 Nov 2025 07:08:29 +0000 Received: from mail136-17.atl41.mandrillapp.com (mail136-17.atl41.mandrillapp.com [198.2.136.17]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 62a680f2-bf96-11f0-9d18-b5c5bf9af7f9; Wed, 12 Nov 2025 08:08:27 +0100 (CET) Received: from pmta11.mandrill.prod.atl01.rsglab.com (localhost [127.0.0.1]) by mail136-17.atl41.mandrillapp.com (Mailchimp) with ESMTP id 4d5vd5690rzPm0ZmK for ; Wed, 12 Nov 2025 07:08:25 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id d068692f474a423bb6591a33a5e4c6c5; Wed, 12 Nov 2025 07:08:25 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 62a680f2-bf96-11f0-9d18-b5c5bf9af7f9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1762931305; x=1763201305; bh=Oa4yrycR7NIuFObzqDKHG41ZmuCJzPot29fGUbt2GPo=; h=From:Subject:To:Cc:Message-Id:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=S7rkVGk4NzzMc0ty25NVhMX/EhcVew8Ob4VNw/upJv/qQanYMyaGKbhAxTs81dAZC ilfhl58S68VkjJlFm+TMaSNcb+ACWsShm9VPOE7dJ0btyuUSkUohR5R3DLNlGtgsTg npCrVykHtBf4aurJa+h2YRglJcUK5ST6kd4nEn9iHk2ZlJXyGWh7SYbt3XHUMY9GZq aOWDki8LWD/Ul69G7UI14+bbmihWSV0R3x10a9uzFfaBDLKOGJUJMznkMl1ejQyUJk ij0YBwFWvxzaGRla9YbpZEeaXyHhS4cUZdfNw5bqkfrcdeAqohAp63Oyn1TtkddUQd Rny6FWxhOoiSQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1762931305; x=1763191805; i=ngoc-tu.dinh@vates.tech; bh=Oa4yrycR7NIuFObzqDKHG41ZmuCJzPot29fGUbt2GPo=; h=From:Subject:To:Cc:Message-Id:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=CSaW4rK3iIQVvqUAoWd633BSSoDHptDkDEdj2ruoBlm5hPC/ufnF5yFixOOFIkwcD yVh9/x34UBfXUSiN2xKtlq1aRWdVy3X7eUyLuB1Nhu+PLUPyxEG9iV0MRkvGV5dE+O DL+w1lU+2yZnxqYgn1d1VCBlHvGftzY/KxMxPKTLeyZHkdyT5CVzL4WGjFXDHtFtQA zsSbz5RYNU5h6hI5LgSDURVOrbiBczJIi5wqeGj7Zwl1RVc9Qf+6pVkz/kP6jxKL4W 4YoQMDFez2fdMUJ+GIjJBK/7qBhiGQPqXQw56qZfo21LzBUEkHN35QQ3fenwACL3Dm ztHN7jggUy6YA== From: "Tu Dinh" Subject: =?utf-8?Q?[PATCH]=20xen:=20Expose=20time=5Foffset=20in=20struct=20arch=5Fshared=5Finfo?= X-Mailer: git-send-email 2.51.2.windows.1 X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1762931304036 To: xen-devel@lists.xenproject.org Cc: "Anthony PERARD" , "Andrew Cooper" , "Michal Orzel" , "Jan Beulich" , "Julien Grall" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Stefano Stabellini" , "Bertrand Marquis" , "Volodymyr Babchuk" , "Tu Dinh" Message-Id: <20251112070815.545-1-ngoc-tu.dinh@vates.tech> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.d068692f474a423bb6591a33a5e4c6c5?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20251112:md Date: Wed, 12 Nov 2025 07:08:25 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit time_offset is currently always added to wc_sec. This means that without the actual value of time_offset, guests have no way of knowing what's the actual host clock. Once the guest clock drifts beyond 1 second, updates to the guest RTC would themselves change time_offset and make it impossible to resync guest time to host time. Since there's no way to add more fields to struct shared_info, the addition has to be done through struct arch_shared_info instead. Add two fields in arch_shared_info representing time_offset's low and high 32-bit halves. Provide a new feature bit XENFEAT_shared_info_time_offset for this functionality. Signed-off-by: Tu Dinh --- tools/include/xen-foreign/reference.size | 5 ++--- xen/common/kernel.c | 3 ++- xen/common/time.c | 5 +++++ xen/include/public/arch-arm.h | 2 ++ xen/include/public/arch-ppc.h | 3 +++ xen/include/public/arch-riscv.h | 3 ++- xen/include/public/arch-x86/xen.h | 3 +++ xen/include/public/features.h | 5 +++++ 8 files changed, 24 insertions(+), 5 deletions(-) diff --git a/tools/include/xen-foreign/reference.size b/tools/include/xen-foreign/reference.size index 11a06a7a43..38e799617a 100644 --- a/tools/include/xen-foreign/reference.size +++ b/tools/include/xen-foreign/reference.size @@ -9,6 +9,5 @@ vcpu_guest_context | 352 352 2800 5168 arch_vcpu_info | 0 0 24 16 vcpu_time_info | 32 32 32 32 vcpu_info | 48 48 64 64 -arch_shared_info | 0 0 28 48 -shared_info | 1088 1088 2344 3136 - +arch_shared_info | 8 8 36 56 +shared_info | 1096 1096 2352 3144 diff --git a/xen/common/kernel.c b/xen/common/kernel.c index e6979352e1..dbd2cf9c76 100644 --- a/xen/common/kernel.c +++ b/xen/common/kernel.c @@ -676,7 +676,8 @@ long do_xen_version(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg) #ifdef CONFIG_X86 (1U << XENFEAT_vcpu_time_phys_area) | #endif - (1U << XENFEAT_runstate_phys_area); + (1U << XENFEAT_runstate_phys_area) | + (1U << XENFEAT_shared_info_time_offset); if ( VM_ASSIST(d, pae_extended_cr3) ) fi.submap |= (1U << XENFEAT_pae_pgdir_above_4gb); if ( paging_mode_translate(d) ) diff --git a/xen/common/time.c b/xen/common/time.c index c873b5731b..0f38b1342d 100644 --- a/xen/common/time.c +++ b/xen/common/time.c @@ -118,6 +118,11 @@ void update_domain_wallclock_time(struct domain *d) shared_info(d, wc_sec_hi) = sec >> 32; #endif + shared_info(d, arch.time_offset) = + (uint32_t)(uint64_t)d->time_offset.seconds; + shared_info(d, arch.time_offset_hi) = + (uint32_t)((uint64_t)d->time_offset.seconds >> 32); + smp_wmb(); *wc_version = version_update_end(*wc_version); diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h index b31324f8d4..2f34fb409b 100644 --- a/xen/include/public/arch-arm.h +++ b/xen/include/public/arch-arm.h @@ -363,6 +363,8 @@ struct arch_vcpu_info { typedef struct arch_vcpu_info arch_vcpu_info_t; struct arch_shared_info { + uint32_t time_offset; + uint32_t time_offset_hi; }; typedef struct arch_shared_info arch_shared_info_t; typedef uint64_t xen_callback_t; diff --git a/xen/include/public/arch-ppc.h b/xen/include/public/arch-ppc.h index 4ca453a284..5bb47e09d3 100644 --- a/xen/include/public/arch-ppc.h +++ b/xen/include/public/arch-ppc.h @@ -92,6 +92,9 @@ DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); struct arch_shared_info { uint64_t boot_timebase; + + uint32_t time_offset; + uint32_t time_offset_hi; }; struct arch_vcpu_info { diff --git a/xen/include/public/arch-riscv.h b/xen/include/public/arch-riscv.h index 168263b920..e502aade99 100644 --- a/xen/include/public/arch-riscv.h +++ b/xen/include/public/arch-riscv.h @@ -65,8 +65,9 @@ struct arch_vcpu_info { }; typedef struct arch_vcpu_info arch_vcpu_info_t; -/* TODO: add a placeholder entry if no real ones surface */ struct arch_shared_info { + uint32_t time_offset; + uint32_t time_offset_hi; }; typedef struct arch_shared_info arch_shared_info_t; diff --git a/xen/include/public/arch-x86/xen.h b/xen/include/public/arch-x86/xen.h index b99a691706..598af31e4e 100644 --- a/xen/include/public/arch-x86/xen.h +++ b/xen/include/public/arch-x86/xen.h @@ -263,6 +263,9 @@ struct arch_shared_info { /* There's no room for this field in the generic structure. */ uint32_t wc_sec_hi; #endif + + uint32_t time_offset; + uint32_t time_offset_hi; }; typedef struct arch_shared_info arch_shared_info_t; diff --git a/xen/include/public/features.h b/xen/include/public/features.h index 8801930947..b48591c17a 100644 --- a/xen/include/public/features.h +++ b/xen/include/public/features.h @@ -128,6 +128,11 @@ */ #define XENFEAT_dm_msix_all_writes 20 +/* + * arch_shared_info provides time_offset and time_offset_hi + */ +#define XENFEAT_shared_info_time_offset 21 + #define XENFEAT_NR_SUBMAPS 1 #endif /* __XEN_PUBLIC_FEATURES_H__ */ -- 2.43.0 -- Ngoc Tu Dinh | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Wed Nov 12 07:08:38 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 07:08:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159512.1487831 (Exim 4.92) (envelope-from ) id 1vJ4y6-0004hx-C6; Wed, 12 Nov 2025 07:08:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159512.1487831; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AM9PR03MB7526.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 3ba82cc7-f070-420e-9507-08de21ba3750 X-MS-Exchange-CrossTenant-originalarrivaltime: 12 Nov 2025 07:08:00.8227 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: H776GSKta3829b1gJtji3FAv2qa/u9Qe0NI43X9jydmql5l+uMqtASqoQ+Jrcem5Iqdc4TZAX7EHAUmzyzP+L2awRcNslnvKb36ZF9kh2S8= X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR03MB6384 Remove the redundant local 'DTB_MAGIC' definition and replace its usage with the canonical 'FDT_MAGIC' from 'libfdt'. Fixes: 66edeb2e3972 (arm: copy DTB appended to zImage) Signed-off-by: Dmytro Prokopchuk --- xen/arch/arm/kernel.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/xen/arch/arm/kernel.c b/xen/arch/arm/kernel.c index 48f4b56d0c..7544fd50a2 100644 --- a/xen/arch/arm/kernel.c +++ b/xen/arch/arm/kernel.c @@ -40,8 +40,6 @@ struct minimal_dtb_header { /* There are other fields but we don't use them yet. */ }; =20 -#define DTB_MAGIC 0xd00dfeedU - static void __init place_modules(struct kernel_info *info, paddr_t kernbase, paddr_t kernend) { @@ -383,7 +381,7 @@ static int __init kernel_zimage32_probe(struct kernel_i= nfo *info, if ( addr + end - start + sizeof(dtb_hdr) <=3D size ) { copy_from_paddr(&dtb_hdr, addr + end - start, sizeof(dtb_hdr)); - if (be32_to_cpu(dtb_hdr.magic) =3D=3D DTB_MAGIC) { + if (be32_to_cpu(dtb_hdr.magic) =3D=3D FDT_MAGIC) { end +=3D be32_to_cpu(dtb_hdr.total_size); =20 if ( end > addr + size ) --=20 2.43.0 From xen-devel-bounces@lists.xenproject.org Wed Nov 12 07:48:24 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 07:48:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159536.1487840 (Exim 4.92) (envelope-from ) id 1vJ5aO-0001yO-8P; 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bh=yLnFpXyUB8/COLBPlJenNeNEFAicpjBvy8JZOhSkedg=; b=iF8aUhfnbncQQ7aL0dAxkOl7Cu6Y4DCH6poccO5tNPUkduLPUT1bPDp1Sx2EV7NuzAI4xllZGIkAacxWq1/gt+wngNeCBCPIgFFGmgp9bYbqgiV4wDv7XkRzUZGtWrDmDf2rQBz+HFovhkwcA+1k+60DFcE5+hFiAADiUXrER3s= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Message-ID: Date: Wed, 12 Nov 2025 09:15:24 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/arm: Use FDT_MAGIC from libfdt instead of local macro To: Luca Fancellu , Dmytro Prokopchuk1 CC: "xen-devel@lists.xenproject.org" , "Stefano Stabellini" , Julien Grall , "Bertrand Marquis" , Volodymyr Babchuk References: <464fb509cc7f66934689d9e2d3a77bf5fcd45c24.1762931200.git.dmytro_prokopchuk1@epam.com> <80431F4E-4512-478F-94B0-1CDDC5E8B6E7@arm.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <80431F4E-4512-478F-94B0-1CDDC5E8B6E7@arm.com> Content-Type: text/plain; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Nov 2025 08:15:26.3411 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: dd931486-8c9d-454e-cc1e-08de21c3a2a0 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD75.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB8224 On 12/11/2025 08:47, Luca Fancellu wrote: > Hi Dmytro, > >> On 12 Nov 2025, at 07:08, Dmytro Prokopchuk1 wrote: >> >> Remove the redundant local 'DTB_MAGIC' definition and replace its usage >> with the canonical 'FDT_MAGIC' from 'libfdt'. >> >> Fixes: 66edeb2e3972 (arm: copy DTB appended to zImage) NIT: Fixes is for bugs. Redundant macro is not a bug I believe. ~Michal >> Signed-off-by: Dmytro Prokopchuk >> --- > > Looks good to me! > > Reviewed-by: Luca Fancellu > > while there I noticed we have DTB_MAGIC that seems to be not used in the toolstack > xen/tools/libs/guest/xg_dom_armzimageloader.c. > > I don’t think that should be addressed in this patch, I just wanted to raise awareness. > > Cheers, > Luca > > From xen-devel-bounces@lists.xenproject.org Wed Nov 12 08:27:47 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 08:27:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159571.1487884 (Exim 4.92) (envelope-from ) id 1vJ6Cb-0000AQ-OC; Wed, 12 Nov 2025 08:27:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159571.1487884; Wed, 12 Nov 2025 08:27:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJ6Cb-0000AI-LU; Wed, 12 Nov 2025 08:27:41 +0000 Received: by outflank-mailman (input) for mailman id 1159571; Wed, 12 Nov 2025 08:27:40 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJ6Ca-0000A5-9p for xen-devel@lists.xenproject.org; Wed, 12 Nov 2025 08:27:40 +0000 Received: from mail-ej1-x630.google.com (mail-ej1-x630.google.com [2a00:1450:4864:20::630]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 6dab258e-bfa1-11f0-980a-7dc792cee155; Wed, 12 Nov 2025 09:27:30 +0100 (CET) Received: by mail-ej1-x630.google.com with SMTP id a640c23a62f3a-b72dc0c15abso102965666b.1 for ; Wed, 12 Nov 2025 00:27:30 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 12 Nov 2025 00:27:29 -0800 (PST) Message-ID: <105ce473-93e9-4ccb-9cb9-938cd5fd3f29@suse.com> Date: Wed, 12 Nov 2025 09:27:28 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/arm: Use FDT_MAGIC from libfdt instead of local macro To: "Orzel, Michal" , Dmytro Prokopchuk1 Cc: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Luca Fancellu References: <464fb509cc7f66934689d9e2d3a77bf5fcd45c24.1762931200.git.dmytro_prokopchuk1@epam.com> <80431F4E-4512-478F-94B0-1CDDC5E8B6E7@arm.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12.11.2025 09:15, Orzel, Michal wrote: > On 12/11/2025 08:47, Luca Fancellu wrote: >>> On 12 Nov 2025, at 07:08, Dmytro Prokopchuk1 wrote: >>> >>> Remove the redundant local 'DTB_MAGIC' definition and replace its usage >>> with the canonical 'FDT_MAGIC' from 'libfdt'. >>> >>> Fixes: 66edeb2e3972 (arm: copy DTB appended to zImage) > NIT: Fixes is for bugs. Redundant macro is not a bug I believe. Maybe use the relatively new Amends: here instead? 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AM9PR03MB7526.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6c833251-bfc7-4e3f-6996-08de21d0e786 X-MS-Exchange-CrossTenant-originalarrivaltime: 12 Nov 2025 09:50:25.4153 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: cJQgiIDoDoxI+89xWitArgJu2BbRTlCXnBQLInvsE3qcEGGXDS01s0lJXpdqBy27XXy0jhx99eq/uf5ErP6gRVuLOOqL+RkTRYvNX/Xj1xQ= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU0PR03MB9633 Remove the redundant local 'DTB_MAGIC' definition and replace its usage with the canonical 'FDT_MAGIC' from 'libfdt'. Amends: 66edeb2e3972 (arm: copy DTB appended to zImage) Signed-off-by: Dmytro Prokopchuk --- Changes in v2: - "Fixes" tag was replaced with "Amends" Link to v1: https://patchew.org/Xen/464fb509cc7f66934689d9e2d3a77bf5fcd45c24.1762931200= .git.dmytro._5Fprokopchuk1@epam.com/ --- xen/arch/arm/kernel.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/xen/arch/arm/kernel.c b/xen/arch/arm/kernel.c index 48f4b56d0c..7544fd50a2 100644 --- a/xen/arch/arm/kernel.c +++ b/xen/arch/arm/kernel.c @@ -40,8 +40,6 @@ struct minimal_dtb_header { /* There are other fields but we don't use them yet. */ }; =20 -#define DTB_MAGIC 0xd00dfeedU - static void __init place_modules(struct kernel_info *info, paddr_t kernbase, paddr_t kernend) { @@ -383,7 +381,7 @@ static int __init kernel_zimage32_probe(struct kernel_i= nfo *info, if ( addr + end - start + sizeof(dtb_hdr) <=3D size ) { copy_from_paddr(&dtb_hdr, addr + end - start, sizeof(dtb_hdr)); - if (be32_to_cpu(dtb_hdr.magic) =3D=3D DTB_MAGIC) { + if (be32_to_cpu(dtb_hdr.magic) =3D=3D FDT_MAGIC) { end +=3D be32_to_cpu(dtb_hdr.total_size); =20 if ( end > addr + size ) --=20 2.43.0 From xen-devel-bounces@lists.xenproject.org Wed Nov 12 10:02:24 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 10:02:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159645.1487957 (Exim 4.92) (envelope-from ) id 1vJ7g5-0006yf-Lz; Wed, 12 Nov 2025 10:02:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159645.1487957; Wed, 12 Nov 2025 10:02:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJ7g5-0006yY-Iv; Wed, 12 Nov 2025 10:02:13 +0000 Received: by outflank-mailman (input) for mailman id 1159645; Wed, 12 Nov 2025 10:02:12 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJ7g4-0006yR-5S for xen-devel@lists.xenproject.org; Wed, 12 Nov 2025 10:02:12 +0000 Received: from mail-ej1-x62b.google.com (mail-ej1-x62b.google.com [2a00:1450:4864:20::62b]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id a6a7256f-bfae-11f0-980a-7dc792cee155; Wed, 12 Nov 2025 11:02:09 +0100 (CET) Received: by mail-ej1-x62b.google.com with SMTP id a640c23a62f3a-b7291af7190so101950466b.3 for ; Wed, 12 Nov 2025 02:02:09 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 12 Nov 2025 02:02:08 -0800 (PST) Message-ID: <58508638-ecff-4507-a11a-8dd7ac52e61f@suse.com> Date: Wed, 12 Nov 2025 11:02:06 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 15/28] xen/domctl: wrap domain_kill() with CONFIG_MGMT_HYPERCALLS To: "Penny, Zheng" Cc: "Huang, Ray" , "oleksii.kurochko@gmail.com" , Stefano Stabellini , Julien Grall , Bertrand Marquis , "Orzel, Michal" , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Shawn Anastasio , Alistair Francis , Bob Eshleman , Connor Davis , Tamas K Lengyel , "xen-devel@lists.xenproject.org" References: <20251013101540.3502842-1-Penny.Zheng@amd.com> <20251013101540.3502842-16-Penny.Zheng@amd.com> <8c74774a-458b-4918-8d65-fcb3eacfe98b@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 12.11.2025 09:58, Penny, Zheng wrote: > [Public] > >> -----Original Message----- >> From: Jan Beulich >> Sent: Thursday, October 30, 2025 8:44 PM >> To: Penny, Zheng >> Cc: Huang, Ray ; oleksii.kurochko@gmail.com; Stefano >> Stabellini ; Julien Grall ; Bertrand >> Marquis ; Orzel, Michal ; >> Volodymyr Babchuk ; Andrew Cooper >> ; Anthony PERARD ; >> Roger Pau Monné ; Shawn Anastasio >> ; Alistair Francis ; >> Bob Eshleman ; Connor Davis >> ; Tamas K Lengyel ; xen- >> devel@lists.xenproject.org >> Subject: Re: [PATCH v3 15/28] xen/domctl: wrap domain_kill() with >> CONFIG_MGMT_HYPERCALLS >> >> On 13.10.2025 12:15, Penny Zheng wrote: >>> --- a/xen/arch/x86/mm/mem_sharing.c >>> +++ b/xen/arch/x86/mm/mem_sharing.c >>> @@ -1396,6 +1396,7 @@ int __mem_sharing_unshare_page(struct domain *d, >>> return rc; >>> } >>> >>> +#ifdef CONFIG_MGMT_HYPERCALLS >>> int relinquish_shared_pages(struct domain *d) { >>> int rc = 0; >>> @@ -1452,6 +1453,7 @@ int relinquish_shared_pages(struct domain *d) >>> p2m_unlock(p2m); >>> return rc; >>> } >>> +#endif /* CONFIG_MGMT_HYPERCALLS */ >>> >>> static int range_share(struct domain *d, struct domain *cd, >>> struct mem_sharing_op_range *range) >> >> Is this necessary? Shouldn't MEM_SHARING as a whole become dependent upon >> MGMT_HYPERCALLS, then also covering XENMEM_sharing_op? (The same will >> already implicitly happen for MEM_PAGING, due to its VM_EVENT dependency.) >> > > Yes, Since I didn't see VM_EVENT dependency for MEM_SHARING. I'm not 100% sure that whether memory sharing feature is dependent on VM_EVENT. Also as I roughly look through the codes in mm/mem_sharing.c, maybe only mem_sharing_notify_enomem() utilizes vm event subsystem. Right, a little while ago (iirc in the context of your work) Tamas said the same. But I didn't ask about VM_EVENT; I asked about MGMT_HYPERCALLS. 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It is AND for all items. I think I worded it better in Patch 4 PVH domains, > for example, can well be 32-bit ones, can't they? Otoh the latter two points > look as if they really enumerate alternatives. Can you clarify please what is > meant? > > Jan > >> If above criterias are met the COMPAT HVM interface become unreachable and can be disabled. >> Coverage reports analyze and adding guard (debug) exceptions in hvm_hypercall/hvm_do_multicall_call >> and hvm_latch_shinfo_size() confirm that COMPAT HVM interface is unused for safety use-case. >> >> Grygorii Strashko (5): >> x86: hvm: dm: factor out compat code under ifdefs >> x86: hvm: compat: introduce vcpu_is_hcall_compat() helper >> x86: hvm: factor out compat code under ifdefs >> x86: pvh: allow to disable 32-bit interface support >> x86: constify has_32bit_shinfo() if !CONFIG_COMPAT >> >> xen/arch/x86/hvm/Kconfig | 19 +++++++++++++++- >> xen/arch/x86/hvm/dm.c | 2 ++ >> xen/arch/x86/hvm/hvm.c | 22 +++++++++++++----- >> xen/arch/x86/hvm/hypercall.c | 37 +++++++++++++++++++++++-------- >> xen/arch/x86/hypercall.c | 6 +---- >> xen/arch/x86/include/asm/domain.h | 3 ++- >> xen/common/kernel.c | 2 +- >> xen/include/xen/sched.h | 9 ++++++++ >> 8 files changed, 78 insertions(+), 22 deletions(-) >> > -- Best regards, -grygorii From xen-devel-bounces@lists.xenproject.org Wed Nov 12 10:36:08 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 10:36:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159669.1487978 (Exim 4.92) (envelope-from ) id 1vJ8Cn-0003GY-Bx; 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a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1762943756; x=1763204256; i=teddy.astie@vates.tech; bh=uopzZcAexBVhZB+T7b3Dzoc1+hwrJIO3k293J16pMOk=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=mPDlsLTc0dY+GrvN5AigmqVPlq3q574D/0ACQ9P986AyGr82l7LWkW4uNw+sURHTZ 6sY/9T+j2pVAi/r94TgIObBm3+ggujchXOrzUUcw6vke1kvuWkpsek0NbTHepb/iGC sVwxHhTlMl11+iV8PBRlIk+IN9SFEHwiryUutYos54Ox3kCbdLFHJ9MLz1lnRNWJ9H u3EipM9+MqvQd0Wys/1r9ceySqMc9Jp73TOYnPFTbbkPYSO6CqRF4+Of4q33mQYA9Q hgLzEXS1rsgGLBcniOjzd0aKNe50e3ItmHYeiRHwo6jGSqFyrCFaMQPsBed1NmmpL+ rEj8ZVrI/ZO/g== From: "Teddy Astie" Subject: =?utf-8?Q?Re:=20[RFC=20PATCH=20for-4.22]=20x86/hvm:=20Introduce=20force=5Fx2apic=20flag?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1762943754497 Message-Id: To: xen-devel@lists.xenproject.org Cc: "Anthony PERARD" , "Juergen Gross" , "Jan Beulich" , "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Oleksii Kurochko" , "Alejandro Vallejo" , "Grygorii Strashko" References: In-Reply-To: X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.b47811629e5f415c9e9276478d1b43fa?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20251112:md Date: Wed, 12 Nov 2025 10:35:56 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Le 29/10/2025 =C3=A0 19:26, Teddy Astie a =C3=A9crit=C2=A0: > Introduce a new flag to force the x2APIC enabled and preventing a > guest from switching back LAPIC to xAPIC mode. > > The semantics of this mode are based IA32_XAPIC_DISABLE_STATUS > architectural MSR of Intel specification. > > Signed-off-by: Teddy Astie > --- > This feature can be useful for various reasons, starting with SEV as > it is complicated (especially with SEV-ES) to handle MMIO, and legacy > xAPIC is one thing that needs MMIO intercepts (and Linux uses it during > boot unless x2APIC is initially enabled, even if it switches to > x2apic afterward). It could also be interesting to reduce the attack > surface of the hypervisor (by only exposing x2apic to the guest). > > As it can allow to have MMIO-less guest (using PVH), perhaps it can > be enough for avoiding the problematic cases of virtualized INVLPGB > (when we have it). > > In my testing, Linux, FreeBSD and PV-shim works fine with it; OVMF > freezes for some reason, NetBSD doesn't support it (no x2apic support > as Xen guest). HVM BIOS gets stuck at SeaBIOS as it expects booting > with xAPIC. > > On Intel platforms, it would be better to expose the > IA32_XAPIC_DISABLE_STATUS architectural MSR to advertise this to > guest, but it's non-trivial as it needs to be properly exposed > through IA32_ARCH_CAPABILITIES which is currently passed-through. > > docs/man/xl.cfg.5.pod.in | 7 +++++++ > tools/libs/light/libxl_types.idl | 1 + > tools/libs/light/libxl_x86.c | 4 ++++ > tools/xl/xl_parse.c | 1 + > xen/arch/x86/domain.c | 2 +- > xen/arch/x86/hvm/hvm.c | 2 ++ > xen/arch/x86/hvm/vlapic.c | 23 ++++++++++++++++++++++- > xen/arch/x86/include/asm/domain.h | 2 ++ > xen/arch/x86/include/asm/hvm/domain.h | 3 +++ > xen/include/public/arch-x86/xen.h | 12 +++++++++++- > 10 files changed, 54 insertions(+), 3 deletions(-) > I guess for now, it would be preferable overall to : - just add a way to enable it by default, not lock in it in x2apic mode - the ability to lock it down (i.e disable xAPIC at compile time) could be introduced separately I'm not completely decided on the naming of the option, maybe something like : x2apic_mode =3D | (or just enable ?) `default` will keep the current behavior, or force x2apic if xAPIC is disabled at compile time; `pre_enable` will enable it by default, but OS may be able to go back to xAPIC mode if supported. Teddy -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Wed Nov 12 10:43:20 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 10:43:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159680.1487989 (Exim 4.92) (envelope-from ) id 1vJ8Jo-0004uh-3f; Wed, 12 Nov 2025 10:43:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159680.1487989; Wed, 12 Nov 2025 10:43:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJ8Jn-0004ua-Vy; Wed, 12 Nov 2025 10:43:15 +0000 Received: by outflank-mailman (input) for mailman id 1159680; Wed, 12 Nov 2025 10:43:14 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJ8Jm-0004uU-EN for xen-devel@lists.xenproject.org; Wed, 12 Nov 2025 10:43:14 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 602d0799-bfb4-11f0-980a-7dc792cee155; Wed, 12 Nov 2025 11:43:08 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7755A1515; Wed, 12 Nov 2025 02:42:59 -0800 (PST) Received: from [10.57.41.24] (unknown [10.57.41.24]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A008F3F5A1; Wed, 12 Nov 2025 02:43:00 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 602d0799-bfb4-11f0-980a-7dc792cee155 Message-ID: Date: Wed, 12 Nov 2025 11:42:58 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 07/12] mm: enable lazy_mmu sections to nest To: Ryan Roberts , linux-mm@kvack.org, David Hildenbrand Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-8-kevin.brodsky@arm.com> <999feffa-5d1d-42e3-bd3a-d949f2a9de9d@arm.com> <824bf705-e9d6-4eeb-9532-9059fa56427f@arm.com> <58fd1a6e-f2c4-421c-9b95-dea4b244a515@arm.com> <8f70692c-25a9-4bd0-94ab-43ab435e4b1b@arm.com> From: Kevin Brodsky Content-Language: en-GB In-Reply-To: <8f70692c-25a9-4bd0-94ab-43ab435e4b1b@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 11/11/2025 17:03, Ryan Roberts wrote: > On 11/11/2025 15:56, Kevin Brodsky wrote: >> On 11/11/2025 10:24, Ryan Roberts wrote: >>> [...] >>> >>>>>> + state->active = true; >>>>>> + arch_enter_lazy_mmu_mode(); >>>>>> + } >>>>>> } >>>>>> >>>>>> static inline void lazy_mmu_mode_disable(void) >>>>>> { >>>>>> - arch_leave_lazy_mmu_mode(); >>>>>> + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; >>>>>> + >>>>>> + VM_WARN_ON_ONCE(state->nesting_level == 0); >>>>>> + VM_WARN_ON(!state->active); >>>>>> + >>>>>> + if (--state->nesting_level == 0) { >>>>>> + state->active = false; >>>>>> + arch_leave_lazy_mmu_mode(); >>>>>> + } else { >>>>>> + /* Exiting a nested section */ >>>>>> + arch_flush_lazy_mmu_mode(); >>>>>> + } >>>>>> } >>>>>> >>>>>> static inline void lazy_mmu_mode_pause(void) >>>>>> { >>>>>> + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; >>>>>> + >>>>>> + VM_WARN_ON(state->nesting_level == 0 || !state->active); >>>>> nit: do you need the first condition? I think when nesting_level==0, we expect >>>>> to be !active? >>>> I suppose this should never happen indeed - I was just being extra >>>> defensive. >>>> >>>> Either way David suggested allowing pause()/resume() to be called >>>> outside of any section so the next version will bail out on >>>> nesting_level == 0. >>> Ignoring my current opinion that we don't need pause/resume at all for now; Are >>> you suggesting that pause/resume will be completely independent of >>> enable/disable? I think that would be best. So enable/disable increment and >>> decrement the nesting_level counter regardless of whether we are paused. >>> nesting_level 0 => 1 enables if not paused. nesting_level 1 => 0 disables if not >>> paused. pause disables nesting_level >= 1, resume enables if nesting_level >= 1. >> This is something else. Currently the rules are: >> >> [A] >> >> // pausing forbidden >> enable() >>     pause() >>     // pausing/enabling forbidden >>     resume() >> disable() >> >> David suggested allowing: >> >> [B] >> >> pause() >> // pausing/enabling forbidden >> resume() >> >> Your suggestion is also allowing: >> >> [C] >> >> pause() >>     // pausing forbidden >>     enable() >>     disable() >> resume() > I think the current kasan kasan_depopulate_vmalloc_pte() path will require [C] > if CONFIG_DEBUG_PAGEALLOC is enabled on arm64. It calls __free_page() while > paused. I guess CONFIG_DEBUG_PAGEALLOC will cause __free_page() -> > debug_pagealloc_unmap_pages() ->->-> update_range_prot() -> lazy_mmu_enable(). Well, I really should have tried booting with KASAN enabled before... lazy_mmu_mode_enable() complains exactly as you predicted: > [    1.047587] WARNING: CPU: 0 PID: 1 at include/linux/pgtable.h:273 > update_range_prot+0x2dc/0x50c > [    1.048025] Modules linked in: > [    1.048296] CPU: 0 UID: 0 PID: 1 Comm: swapper/0 Not tainted > 6.18.0-rc3-00012-ga901e7f479f1 #142 PREEMPT > [    1.048706] Hardware name: FVP Base RevC (DT) > [    1.048941] pstate: 11400009 (nzcV daif +PAN -UAO -TCO +DIT -SSBS > BTYPE=--) > [    1.049309] pc : update_range_prot+0x2dc/0x50c > [    1.049631] lr : update_range_prot+0x80/0x50c > [    1.049950] sp : ffff8000800e6f20 > [    1.050162] x29: ffff8000800e6fb0 x28: ffff700010014000 x27: > ffff700010016000 > [    1.050747] x26: 0000000000000000 x25: 0000000000000001 x24: > 00000000008800f7 > [    1.051308] x23: 0000000000000000 x22: fff00008000f7000 x21: > fff00008003009f8 > [    1.051884] x20: fff00008000f8000 x19: 1ffff0001001cdea x18: > ffff800080769000 > [    1.052469] x17: ffff95c63264ec00 x16: ffff8000800e7504 x15: > 0000000000000003 > [    1.053045] x14: ffff95c63482f000 x13: 0000000000000000 x12: > ffff783ffc0007bf > [    1.053620] x11: 1ffff83ffc0007be x10: ffff783ffc0007be x9 : > dfff800000000000 > [    1.054203] x8 : fffd80010001f000 x7 : ffffffffffffffff x6 : > 0000000000000001 > [    1.054776] x5 : 0000000000000000 x4 : fff00008003009f9 x3 : > 1ffe00010006013f > [    1.055348] x2 : fff0000800300000 x1 : 0000000000000001 x0 : > 0000000000000000 > [    1.055912] Call trace: > [    1.056100]  update_range_prot+0x2dc/0x50c (P) > [    1.056478]  set_memory_valid+0x44/0x70 > [    1.056850]  __kernel_map_pages+0x68/0xe4 > [    1.057226]  __free_frozen_pages+0x528/0x1180 > [    1.057601]  ___free_pages+0x11c/0x160 > [    1.057961]  __free_pages+0x14/0x20 > [    1.058307]  kasan_depopulate_vmalloc_pte+0xd4/0x184 > [    1.058748]  __apply_to_page_range+0x678/0xda8 > [    1.059149]  apply_to_existing_page_range+0x14/0x20 > [    1.059553]  kasan_release_vmalloc+0x138/0x200 > [    1.059982]  purge_vmap_node+0x1b4/0x8a0 > [    1.060371]  __purge_vmap_area_lazy+0x4f8/0x870 > [    1.060779]  _vm_unmap_aliases+0x488/0x6ec > [    1.061176]  vm_unmap_aliases+0x1c/0x34 > [    1.061567]  change_memory_common+0x17c/0x380 > [    1.061949]  set_memory_ro+0x18/0x24 > [...] > Arguably you could move the resume() to before the __free_page(). But it just > illustrates that it's all a bit brittle at the moment... Difficult to disagree. With things like DEBUG_PAGEALLOC it becomes very hard to know what is guaranteed not to use lazy MMU. >>> Perhaps we also need nested pause/resume? Then you just end up with 2 counters; >>> enable_count and pause_count. Sorry if this has already been discussed. >> And finally: >> >> [D] >> >> pause() >>     pause() >>         enable() >>         disable() >>     resume() >> resume() >> >> I don't really mind either way, but I don't see an immediate use for [C] >> and [D] - the idea is that the paused section is short and controlled, >> not made up of arbitrary calls. > If my thinking above is correct, then I've already demonstrated that this is not > the case. So I'd be inclined to go with [D] on the basis that it is the most robust. > > Keeping 2 nesting counts (enable and pause) feels pretty elegant to me and gives > the fewest opportunities for surprises. Agreed, if we're going to allow enable() within a paused section, then we might as well allow paused sections to nest too. The use-case is clear, so I'm happy to go ahead and make those changes. David, any thoughts? - Kevin > > Thanks, > Ryan > >> A potential downside of allowing [C] and >> [D] is that it makes it harder to detect unintended nesting (fewer >> VM_WARN assertions). Happy to implement it if this proves useful though. >> >> OTOH the idea behind [B] is that it allows the caller of >> pause()/resume() not to care about whether lazy MMU is actually enabled >> or not - i.e. the kasan helpers would keep working even if >> apply_to_page_range() didn't use lazy MMU any more. >> >>>>>> + >>>>>> + state->active = false; >>>>>> arch_leave_lazy_mmu_mode(); >>>>>> } >>>>>> >>>>>> [...] From xen-devel-bounces@lists.xenproject.org Wed Nov 12 10:51:55 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 10:51:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159699.1488032 (Exim 4.92) (envelope-from ) id 1vJ8SB-0007PP-1S; Wed, 12 Nov 2025 10:51:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159699.1488032; Wed, 12 Nov 2025 10:51:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJ8SA-0007O7-TF; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 28371c27-a8b0-463d-f3a7-08de21d97a9b X-MS-Exchange-CrossTenant-originalarrivaltime: 12 Nov 2025 10:51:48.1152 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: l5FLPJZUFgD3iE5eRA1Q4RFrlG7pSqeuJWkOqEp91KdRQnJdDP0yzUAwwmAPkM7tCJbOxAqgdJeLNeU8faecng== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAWPR03MB9786 Move IRQs from dying CPU to the online ones. Guest-bound IRQs are already handled by scheduler in the process of moving vCPUs to active pCPUs, so we only need to handle IRQs used by Xen itself. If IRQ is to be migrated, it's affinity is set to a mask of all online CPUs. With current GIC implementation, this means they are routed to a random online CPU. This may cause extra moves if multiple cores are disabled in sequence, but should prevent all interrupts from piling up on CPU0 in case of repeated up-down cycles on different cores. IRQs from CPU 0 are never migrated, as dying CPU 0 means we are either shutting down compeletely or entering system suspend. Considering that all Xen-used IRQs are currently allocated during init on CPU 0, and setup_irq uses smp_processor_id for the initial affinity. This change is not strictly required for correct operation for now, but it should future-proof cpu hotplug and system suspend support in case some kind if IRQ balancing is implemented later. Signed-off-by: Mykyta Poturai v3->v4: * patch introduced --- xen/arch/arm/include/asm/irq.h | 2 ++ xen/arch/arm/irq.c | 39 ++++++++++++++++++++++++++++++++++ xen/arch/arm/smpboot.c | 2 ++ 3 files changed, 43 insertions(+) diff --git a/xen/arch/arm/include/asm/irq.h b/xen/arch/arm/include/asm/irq.= h index 09788dbfeb..6e6e27bb80 100644 --- a/xen/arch/arm/include/asm/irq.h +++ b/xen/arch/arm/include/asm/irq.h @@ -126,6 +126,8 @@ bool irq_type_set_by_domain(const struct domain *d); void irq_end_none(struct irq_desc *irq); #define irq_end_none irq_end_none =20 +void evacuate_irqs(unsigned int from); + #endif /* _ASM_HW_IRQ_H */ /* * Local variables: diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c index 28b40331f7..b383d71930 100644 --- a/xen/arch/arm/irq.c +++ b/xen/arch/arm/irq.c @@ -158,6 +158,45 @@ static int init_local_irq_data(unsigned int cpu) return 0; } =20 +static void evacuate_irq(int irq, unsigned int from) +{ + struct irq_desc *desc =3D irq_to_desc(irq); + unsigned long flags; + + /* Don't move irqs from CPU 0 as it is always last to be disabled */ + if ( from =3D=3D 0 ) + return; + + ASSERT(!cpumask_empty(&cpu_online_map)); + ASSERT(!cpumask_test_cpu(from, &cpu_online_map)); + + spin_lock_irqsave(&desc->lock, flags); + if ( likely(!desc->action) ) + goto out; + + if ( likely(test_bit(_IRQ_GUEST, &desc->status) || + test_bit(_IRQ_MOVE_PENDING, &desc->status)) ) + goto out; + + if ( cpumask_test_cpu(from, desc->affinity) ) + irq_set_affinity(desc, &cpu_online_map); + +out: + spin_unlock_irqrestore(&desc->lock, flags); + return; +} + +void evacuate_irqs(unsigned int from) +{ + int irq; + + for ( irq =3D NR_LOCAL_IRQS; irq < NR_IRQS; irq++ ) + evacuate_irq(irq, from); + + for ( irq =3D ESPI_BASE_INTID; irq < ESPI_MAX_INTID; irq++ ) + evacuate_irq(irq, from); +} + static int cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu) { diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c index 7f3cfa812e..46b24783dd 100644 --- a/xen/arch/arm/smpboot.c +++ b/xen/arch/arm/smpboot.c @@ -425,6 +425,8 @@ void __cpu_disable(void) =20 smp_mb(); =20 + evacuate_irqs(cpu); + /* Return to caller; eventually the IPI mechanism will unwind and the= =20 * scheduler will drop to the idle loop, which will call stop_cpu(). *= / } --=20 2.51.2 From xen-devel-bounces@lists.xenproject.org Wed Nov 12 10:51:55 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 10:51:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159696.1488008 (Exim 4.92) (envelope-from ) id 1vJ8S8-0006tg-4c; Wed, 12 Nov 2025 10:51:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159696.1488008; Wed, 12 Nov 2025 10:51:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJ8S8-0006tY-1X; Wed, 12 Nov 2025 10:51:52 +0000 Received: by outflank-mailman (input) for mailman id 1159696; Wed, 12 Nov 2025 10:51:51 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJ8S6-0006fP-T6 for xen-devel@lists.xenproject.org; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1f59f719-8a77-4859-4e07-08de21d979e5 X-MS-Exchange-CrossTenant-originalarrivaltime: 12 Nov 2025 10:51:46.9532 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: QX2OXb2S1M0kltWTmajWDXjBVFkmoRdbfvncz70luuToK1w0xCwvLhvRfn4t3Z8rM0q5uWYsE/MSBDzIgmKqVw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAWPR03MB9786 When stopping a core deinit_timer_interrupt is called in non-alloc context, which causes xfree in release_irq to fail an assert. To fix this, switch to a statically allocated irqaction that does not need to be freed in release_irq. Signed-off-by: Mykyta Poturai Reviewed-by: Mykola Kvach Reviewed-by: Julien Grall v3->v4: * make irqactions static * collect RBs v2->v3: * no changes v1->v2: * use percpu actions --- xen/arch/arm/time.c | 21 +++++++++++++++++---- 1 file changed, 17 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/time.c b/xen/arch/arm/time.c index e74d30d258..3710eab109 100644 --- a/xen/arch/arm/time.c +++ b/xen/arch/arm/time.c @@ -303,9 +303,15 @@ static void check_timer_irq_cfg(unsigned int irq, cons= t char *which) "WARNING: %s-timer IRQ%u is not level triggered.\n", which, irq= ); } =20 +static DEFINE_PER_CPU_READ_MOSTLY(struct irqaction, irq_hyp); +static DEFINE_PER_CPU_READ_MOSTLY(struct irqaction, irq_virt); + /* Set up the timer interrupt on this CPU */ void init_timer_interrupt(void) { + struct irqaction *hyp_action =3D &this_cpu(irq_hyp); + struct irqaction *virt_action =3D &this_cpu(irq_virt); + /* Sensible defaults */ WRITE_SYSREG64(0, CNTVOFF_EL2); /* No VM-specific offset */ /* Do not let the VMs program the physical timer, only read the physic= al counter */ @@ -314,10 +320,17 @@ void init_timer_interrupt(void) WRITE_SYSREG(0, CNTHP_CTL_EL2); /* Hypervisor's timer disabled */ isb(); =20 - request_irq(timer_irq[TIMER_HYP_PPI], 0, htimer_interrupt, - "hyptimer", NULL); - request_irq(timer_irq[TIMER_VIRT_PPI], 0, vtimer_interrupt, - "virtimer", NULL); + hyp_action->name =3D "hyptimer"; + hyp_action->handler =3D htimer_interrupt; + hyp_action->dev_id =3D NULL; + hyp_action->free_on_release =3D 0; + setup_irq(timer_irq[TIMER_HYP_PPI], 0, hyp_action); + + virt_action->name =3D "virtimer"; + virt_action->handler =3D vtimer_interrupt; + virt_action->dev_id =3D NULL; + virt_action->free_on_release =3D 0; + setup_irq(timer_irq[TIMER_VIRT_PPI], 0, virt_action); =20 check_timer_irq_cfg(timer_irq[TIMER_HYP_PPI], "hypervisor"); check_timer_irq_cfg(timer_irq[TIMER_VIRT_PPI], "virtual"); --=20 2.51.2 From xen-devel-bounces@lists.xenproject.org Wed Nov 12 10:51:55 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 10:51:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159695.1487997 (Exim 4.92) (envelope-from ) id 1vJ8S6-0006fc-US; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8a9cc670-f322-4e49-24db-08de21d979a5 X-MS-Exchange-CrossTenant-originalarrivaltime: 12 Nov 2025 10:51:46.4892 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: lRRfJtD4jCeDIsJP3xGX/qPo8QxW7ecEwymnx1WOL5/VmcRar6QBZ+gahIl8KAp6Sjr8etlaw2CWFduHka+x7w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAWPR03MB9786 This series implements support for CPU hotplug/unplug on Arm. To achieve th= is, several things need to be done: 1. XEN_SYSCTL_CPU_HOTPLUG_* calls implemented. 2. timer and GIC maintenance interrupts switched to static irqactions to re= move the need for freeing them during release_irq. 3. Enabled the build of xen-hptool on Arm. 4. Migration of irqs from dying CPUs implemented. Tested on QEMU. Note: As there are currently no Xen-used IRQs on non-zero CPUs, I used a ha= ck that changed default affinity of IRQs in setup_irq to properly test IRQ migration. The hack consisted of changing smp_processor_id call to some hard-coded non-zero number. v3->v4: * add irq migration patches * see individual patches v2->v3: * add docs v1->v2: * see individual patches Mykyta Poturai (5): arm/time: Use static irqaction arm/gic: Use static irqaction arm/irq: Keep track of irq affinities arm/irq: Migrate IRQs from dyings CPUs smp: Move cpu_up/down helpers to common code arm/sysctl: Implement cpu hotplug ops tools: Allow building xen-hptool without CONFIG_MIGRATE docs: Document CPU hotplug config/Tools.mk.in | 1 + docs/misc/cpu-hotplug.txt | 51 ++++++++++++++++++++++++++++++++ tools/configure | 30 +++++++++++++++++++ tools/configure.ac | 1 + tools/libs/guest/Makefile.common | 4 +++ tools/misc/Makefile | 2 +- xen/arch/arm/Kconfig | 4 +++ xen/arch/arm/gic.c | 11 +++++-- xen/arch/arm/include/asm/irq.h | 2 ++ xen/arch/arm/irq.c | 42 ++++++++++++++++++++++++++ xen/arch/arm/smp.c | 6 ++++ xen/arch/arm/smpboot.c | 2 ++ xen/arch/arm/sysctl.c | 32 ++++++++++++++++++++ xen/arch/arm/time.c | 21 ++++++++++--- xen/arch/ppc/stubs.c | 4 +++ xen/arch/riscv/stubs.c | 5 ++++ xen/arch/x86/include/asm/smp.h | 3 -- xen/arch/x86/smp.c | 33 ++------------------- xen/common/smp.c | 32 ++++++++++++++++++++ xen/include/xen/smp.h | 4 +++ 20 files changed, 250 insertions(+), 40 deletions(-) create mode 100644 docs/misc/cpu-hotplug.txt mode change 100755 =3D> 100644 tools/configure --=20 2.51.2 From xen-devel-bounces@lists.xenproject.org Wed Nov 12 10:51:55 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 10:51:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159698.1488028 (Exim 4.92) (envelope-from ) id 1vJ8SA-0007Mo-Ol; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: e783116c-4e85-46f4-22e6-08de21d97a6c X-MS-Exchange-CrossTenant-originalarrivaltime: 12 Nov 2025 10:51:47.7457 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: vjAZlfqUelx24C+9gUWiL7EBWMITQoeijk/CnzJKWnNnLbKHzuLz3VQEmX6vE2cEGwYvqA1j2dJXGnia6Dwgeg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAWPR03MB9786 Currently on Arm the desc->affinity mask of an irq is never updated, which makes it hard to know the actual affinity of an interrupt. Fix this by updating the field in irq_set_affinity. Signed-off-by: Mykyta Poturai v3->v4: * patch introduced --- xen/arch/arm/irq.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c index 73e58a5108..28b40331f7 100644 --- a/xen/arch/arm/irq.c +++ b/xen/arch/arm/irq.c @@ -219,7 +219,10 @@ static inline struct domain *irq_get_domain(struct irq= _desc *desc) void irq_set_affinity(struct irq_desc *desc, const cpumask_t *mask) { if ( desc !=3D NULL ) + { + cpumask_copy(desc->affinity, mask); desc->handler->set_affinity(desc, mask); + } } =20 int request_irq(unsigned int irq, unsigned int irqflags, --=20 2.51.2 From xen-devel-bounces@lists.xenproject.org Wed Nov 12 10:51:55 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 10:51:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159697.1488019 (Exim 4.92) (envelope-from ) id 1vJ8S9-00077U-CW; Wed, 12 Nov 2025 10:51:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159697.1488019; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 927b82e9-f60b-4460-9534-08de21d97a28 X-MS-Exchange-CrossTenant-originalarrivaltime: 12 Nov 2025 10:51:47.3691 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: dGepZV0w5ptRmN7w+OQxOzcpFflsxNL5yhumyMH3f6Z+T7EwCy8IFT2N4wXW6j8k63V7NKHYq2cJ28ri+umqcA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAWPR03MB9786 When stopping a core cpu_gic_callback is called in non-alloc context, which causes xfree in release_irq to fail an assert. To fix this, switch to a statically allocated irqaction that does not need to be freed in release_irq. Signed-off-by: Mykyta Poturai Reviewed-by: Mykola Kvach Reviewed-by: Julien Grall v3->v4: * make irqactions static * collect RBs v2->v3: * no changes v1->v2: * use percpu actions --- xen/arch/arm/gic.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index 260ee64cca..ee75258fc3 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -386,10 +386,17 @@ void gic_dump_info(struct vcpu *v) gic_hw_ops->dump_state(v); } =20 +static DEFINE_PER_CPU_READ_MOSTLY(struct irqaction, irq_maintenance); + void init_maintenance_interrupt(void) { - request_irq(gic_hw_ops->info->maintenance_irq, 0, maintenance_interrup= t, - "irq-maintenance", NULL); + struct irqaction *maintenance =3D &this_cpu(irq_maintenance); + + maintenance->name =3D "irq-maintenance"; + maintenance->handler =3D maintenance_interrupt; + maintenance->dev_id =3D NULL; + maintenance->free_on_release =3D 0; + setup_irq(gic_hw_ops->info->maintenance_irq, 0, maintenance); } =20 int gic_make_hwdom_dt_node(const struct domain *d, --=20 2.51.2 From xen-devel-bounces@lists.xenproject.org Wed Nov 12 10:51:56 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 10:51:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159700.1488048 (Exim 4.92) (envelope-from ) id 1vJ8SC-0007qJ-Ex; Wed, 12 Nov 2025 10:51:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159700.1488048; Wed, 12 Nov 2025 10:51:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJ8SC-0007pP-9p; Wed, 12 Nov 2025 10:51:56 +0000 Received: by outflank-mailman (input) for mailman id 1159700; Wed, 12 Nov 2025 10:51:55 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJ8SA-0006fP-UE for xen-devel@lists.xenproject.org; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: cc993a82-5cc7-438e-19dd-08de21d97adb X-MS-Exchange-CrossTenant-originalarrivaltime: 12 Nov 2025 10:51:48.5687 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: pIMqDUUxA+VBFhfTSNwZb/GlDlJIFVsvBZYaPNN25PyRq7qEIWiACCXOAC7D2TpA+5oiuD535PlHFvnjEIKrqw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAWPR03MB9786 This will reduce code duplication for the upcoming cpu hotplug support on Arm64 patch. SMT-disable enforcement check is moved into a separate architecture-specific function. Signed-off-by: Mykyta Poturai v3->v4: * patch introduced --- xen/arch/arm/smp.c | 6 ++++++ xen/arch/ppc/stubs.c | 4 ++++ xen/arch/riscv/stubs.c | 5 +++++ xen/arch/x86/include/asm/smp.h | 3 --- xen/arch/x86/smp.c | 33 +++------------------------------ xen/common/smp.c | 32 ++++++++++++++++++++++++++++++++ xen/include/xen/smp.h | 4 ++++ 7 files changed, 54 insertions(+), 33 deletions(-) diff --git a/xen/arch/arm/smp.c b/xen/arch/arm/smp.c index b372472188..85815aeda0 100644 --- a/xen/arch/arm/smp.c +++ b/xen/arch/arm/smp.c @@ -44,6 +44,12 @@ void smp_send_call_function_mask(const cpumask_t *mask) } } =20 +/* ARM don't have SMT so we don't need any special logic for CPU disabling= */ +bool arch_smt_cpu_disable(unsigned int cpu) +{ + return false; +} + /* * Local variables: * mode: C diff --git a/xen/arch/ppc/stubs.c b/xen/arch/ppc/stubs.c index bdaf474c5c..ca97cec51f 100644 --- a/xen/arch/ppc/stubs.c +++ b/xen/arch/ppc/stubs.c @@ -101,6 +101,10 @@ void smp_send_call_function_mask(const cpumask_t *mask= ) BUG_ON("unimplemented"); } =20 +bool arch_smt_cpu_disable(unsigned int cpu) +{ + BUG_ON("unimplemented"); +} /* irq.c */ =20 void irq_ack_none(struct irq_desc *desc) diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c index 1a8c86cd8d..60610349cb 100644 --- a/xen/arch/riscv/stubs.c +++ b/xen/arch/riscv/stubs.c @@ -80,6 +80,11 @@ void smp_send_call_function_mask(const cpumask_t *mask) BUG_ON("unimplemented"); } =20 +bool arch_smt_cpu_disable(unsigned int cpu) +{ + BUG_ON("unimplemented"); +} + /* irq.c */ =20 void irq_ack_none(struct irq_desc *desc) diff --git a/xen/arch/x86/include/asm/smp.h b/xen/arch/x86/include/asm/smp.= h index 60eb4ac254..b77fc0bc6d 100644 --- a/xen/arch/x86/include/asm/smp.h +++ b/xen/arch/x86/include/asm/smp.h @@ -50,9 +50,6 @@ int cpu_add(uint32_t apic_id, uint32_t acpi_id, uint32_t = pxm); =20 void __stop_this_cpu(void); =20 -long cf_check cpu_up_helper(void *data); -long cf_check cpu_down_helper(void *data); - long cf_check core_parking_helper(void *data); bool core_parking_remove(unsigned int cpu); uint32_t get_cur_idle_nums(void); diff --git a/xen/arch/x86/smp.c b/xen/arch/x86/smp.c index 7936294f5f..d64b533cc0 100644 --- a/xen/arch/x86/smp.c +++ b/xen/arch/x86/smp.c @@ -418,35 +418,8 @@ void cf_check call_function_interrupt(void) smp_call_function_interrupt(); } =20 -long cf_check cpu_up_helper(void *data) +bool arch_smt_cpu_disable(unsigned int cpu) { - unsigned int cpu =3D (unsigned long)data; - int ret =3D cpu_up(cpu); - - /* Have one more go on EBUSY. */ - if ( ret =3D=3D -EBUSY ) - ret =3D cpu_up(cpu); - - if ( !ret && !opt_smt && - cpu_data[cpu].compute_unit_id =3D=3D INVALID_CUID && - cpumask_weight(per_cpu(cpu_sibling_mask, cpu)) > 1 ) - { - ret =3D cpu_down_helper(data); - if ( ret ) - printk("Could not re-offline CPU%u (%d)\n", cpu, ret); - else - ret =3D -EPERM; - } - - return ret; -} - -long cf_check cpu_down_helper(void *data) -{ - int cpu =3D (unsigned long)data; - int ret =3D cpu_down(cpu); - /* Have one more go on EBUSY. */ - if ( ret =3D=3D -EBUSY ) - ret =3D cpu_down(cpu); - return ret; + return !opt_smt && cpu_data[cpu].compute_unit_id =3D=3D INVALID_CUID &= & + cpumask_weight(per_cpu(cpu_sibling_mask, cpu)) > 1; } diff --git a/xen/common/smp.c b/xen/common/smp.c index a011f541f1..114c1da77d 100644 --- a/xen/common/smp.c +++ b/xen/common/smp.c @@ -16,6 +16,7 @@ * GNU General Public License for more details. */ =20 +#include #include #include #include @@ -104,6 +105,37 @@ void smp_call_function_interrupt(void) irq_exit(); } =20 +long cf_check cpu_up_helper(void *data) +{ + unsigned int cpu =3D (unsigned long)data; + int ret =3D cpu_up(cpu); + + /* Have one more go on EBUSY. */ + if ( ret =3D=3D -EBUSY ) + ret =3D cpu_up(cpu); + + if ( !ret && arch_smt_cpu_disable(cpu) ) + { + ret =3D cpu_down_helper(data); + if ( ret ) + printk("Could not re-offline CPU%u (%d)\n", cpu, ret); + else + ret =3D -EPERM; + } + + return ret; +} + +long cf_check cpu_down_helper(void *data) +{ + int cpu =3D (unsigned long)data; + int ret =3D cpu_down(cpu); + /* Have one more go on EBUSY. */ + if ( ret =3D=3D -EBUSY ) + ret =3D cpu_down(cpu); + return ret; +} + /* * Local variables: * mode: C diff --git a/xen/include/xen/smp.h b/xen/include/xen/smp.h index 2ca9ff1bfc..c734033bfb 100644 --- a/xen/include/xen/smp.h +++ b/xen/include/xen/smp.h @@ -76,4 +76,8 @@ extern void *stack_base[NR_CPUS]; void initialize_cpu_data(unsigned int cpu); int setup_cpu_root_pgt(unsigned int cpu); =20 +bool arch_smt_cpu_disable(unsigned int cpu); +long cf_check cpu_up_helper(void *data); +long cf_check cpu_down_helper(void *data); + #endif /* __XEN_SMP_H__ */ --=20 2.51.2 From xen-devel-bounces@lists.xenproject.org Wed Nov 12 10:51:58 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 10:51:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159701.1488058 (Exim 4.92) (envelope-from ) id 1vJ8SD-000887-UZ; Wed, 12 Nov 2025 10:51:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159701.1488058; Wed, 12 Nov 2025 10:51:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJ8SD-00087s-RP; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: e2c5d9b2-e834-4c46-91ae-08de21d97b1e X-MS-Exchange-CrossTenant-originalarrivaltime: 12 Nov 2025 10:51:49.0352 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: zXMOreC99SoWseZ0KgOhN46PyW3A0dWzsLhJHRlSKlI3MnDLQhaRT9O3KZTk29YkuqDB5tAc2Syb6QfJEB4Ubg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAWPR03MB9786 Implement XEN_SYSCTL_CPU_HOTPLUG_{ONLINE,OFFLINE} calls to allow for enabling/disabling CPU cores in runtime. For now this operations only support Arm64. For proper Arm32 support, there needs to be a mechanism to free per-cpu page tables, allocated in init_domheap_mappings. Also, hotplug is not supported if ITS, FFA, or TEE is enabled, as they use non-static IRQ actions. Create a Kconfig option RUNTIME_CPU_CONTROL that reflects this constraints. Signed-off-by: Mykyta Poturai v3->v4: * don't reimplement cpu_up/down helpers * add Kconfig option * fixup formatting v2->v3: * no changes v1->v2: * remove SMT ops * remove cpu =3D=3D 0 checks * add XSM hooks * only implement for 64bit Arm --- xen/arch/arm/Kconfig | 4 ++++ xen/arch/arm/sysctl.c | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 36 insertions(+) diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index cf6af68299..931ae51575 100644 --- a/xen/arch/arm/Kconfig +++ b/xen/arch/arm/Kconfig @@ -274,6 +274,10 @@ config PCI_PASSTHROUGH help This option enables PCI device passthrough =20 +config RUNTIME_CPU_CONTROL + def_bool y + depends on ARM_64 && !TEE && !FFA && !HAS_ITS + endmenu =20 menu "ARM errata workaround via the alternative framework" diff --git a/xen/arch/arm/sysctl.c b/xen/arch/arm/sysctl.c index 32cab4feff..3c4e29d82c 100644 --- a/xen/arch/arm/sysctl.c +++ b/xen/arch/arm/sysctl.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include =20 @@ -23,6 +24,33 @@ void arch_do_physinfo(struct xen_sysctl_physinfo *pi) XEN_SYSCTL_PHYSCAP_ARM_SVE_MASK); } =20 +static long cpu_hotplug_sysctl(struct xen_sysctl_cpu_hotplug *hotplug) +{ +#ifdef CONFIG_RUNTIME_CPU_CONTROL + int ret; + + switch ( hotplug->op ) + { + case XEN_SYSCTL_CPU_HOTPLUG_ONLINE: + ret =3D xsm_resource_plug_core(XSM_HOOK); + if ( ret ) + return ret; + return continue_hypercall_on_cpu(0, cpu_up_helper, _p(hotplug->cpu= )); + + case XEN_SYSCTL_CPU_HOTPLUG_OFFLINE: + ret =3D xsm_resource_unplug_core(XSM_HOOK); + if ( ret ) + return ret; + return continue_hypercall_on_cpu(0, cpu_down_helper, _p(hotplug->c= pu)); + + default: + return -EOPNOTSUPP; + } +#else + return -EOPNOTSUPP; +#endif +} + long arch_do_sysctl(struct xen_sysctl *sysctl, XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl) { @@ -34,6 +62,10 @@ long arch_do_sysctl(struct xen_sysctl *sysctl, ret =3D dt_overlay_sysctl(&sysctl->u.dt_overlay); break; =20 + case XEN_SYSCTL_cpu_hotplug: + ret =3D cpu_hotplug_sysctl(&sysctl->u.cpu_hotplug); + break; + default: ret =3D -ENOSYS; break; --=20 2.51.2 From xen-devel-bounces@lists.xenproject.org Wed Nov 12 10:51:58 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 10:51:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159702.1488061 (Exim 4.92) (envelope-from ) id 1vJ8SE-00089s-Aa; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 09306751-89f3-48d6-f7aa-08de21d97b5f X-MS-Exchange-CrossTenant-originalarrivaltime: 12 Nov 2025 10:51:49.4298 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: SyRW3I8VItaclnc+w9oiEZLwb1TGJSv03RiVosmKCfzrapc+AFkvkWFOnxNgHmVzqRwZNALEbEO/TizbadBzJA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAWPR03MB9786 With CPU hotplug sysctls implemented on Arm it becomes useful to have a tool for calling them. Introduce a new congifure option "hptool" to allow building hptool separately from other migration tools, and enable it by default. Signed-off-by: Mykyta Poturai v3->v4: * no changes v2->v3: * no changes v1->v2: * switch to configure from legacy config --- config/Tools.mk.in | 1 + tools/configure | 30 ++++++++++++++++++++++++++++++ tools/configure.ac | 1 + tools/libs/guest/Makefile.common | 4 ++++ tools/misc/Makefile | 2 +- 5 files changed, 37 insertions(+), 1 deletion(-) mode change 100755 =3D> 100644 tools/configure diff --git a/config/Tools.mk.in b/config/Tools.mk.in index 0037ad5a64..d5855ca090 100644 --- a/config/Tools.mk.in +++ b/config/Tools.mk.in @@ -49,6 +49,7 @@ CONFIG_LIBNL :=3D @libnl@ CONFIG_GOLANG :=3D @golang@ CONFIG_PYGRUB :=3D @pygrub@ CONFIG_LIBFSIMAGE :=3D @libfsimage@ +CONFIG_HPTOOL :=3D @hptool@ =20 CONFIG_SYSTEMD :=3D @systemd@ XEN_SYSTEMD_DIR :=3D @SYSTEMD_DIR@ diff --git a/tools/configure b/tools/configure old mode 100755 new mode 100644 index 3111f5688c..8a86582ece --- a/tools/configure +++ b/tools/configure @@ -731,6 +731,7 @@ LD86 AS86 ipxe LINUX_BACKEND_MODULES +hptool pygrub golang seabios @@ -837,6 +838,7 @@ enable_ovmf enable_seabios enable_golang enable_pygrub +enable_hptool with_linux_backend_modules enable_ipxe with_system_ipxe @@ -1524,6 +1526,7 @@ Optional Features: --disable-seabios Disable SeaBIOS (default is ENABLED) --disable-golang Disable Go tools (default is ENABLED) --disable-pygrub Disable pygrub (default is ENABLED) + --disable-hptool Disable hptool (default is ENABLED) --enable-ipxe Enable in-tree IPXE, (DEFAULT is off, see also --with-system-ipxe) --enable-rombios Enable ROMBIOS, (DEFAULT is on if ipxe is enable= d, @@ -4816,6 +4819,33 @@ pygrub=3D$ax_cv_pygrub =20 =20 =20 +# Check whether --enable-hptool was given. +if test ${enable_hptool+y} +then : + enableval=3D$enable_hptool; +fi + + +if test "x$enable_hptool" =3D "xno" +then : + + ax_cv_hptool=3D"n" + +elif test "x$enable_hptool" =3D "xyes" +then : + + ax_cv_hptool=3D"y" + +elif test -z $ax_cv_hptool +then : + + ax_cv_hptool=3D"y" + +fi +hptool=3D$ax_cv_hptool + + + =20 # Check whether --with-linux-backend-modules was given. if test ${with_linux_backend_modules+y} diff --git a/tools/configure.ac b/tools/configure.ac index 285b4ea128..28a0c095c2 100644 --- a/tools/configure.ac +++ b/tools/configure.ac @@ -90,6 +90,7 @@ AX_ARG_DEFAULT_DISABLE([ovmf], [Enable OVMF]) AX_ARG_DEFAULT_ENABLE([seabios], [Disable SeaBIOS]) AX_ARG_DEFAULT_ENABLE([golang], [Disable Go tools]) AX_ARG_DEFAULT_ENABLE([pygrub], [Disable pygrub]) +AX_ARG_DEFAULT_ENABLE([hptool], [Disable hptool]) =20 AC_ARG_WITH([linux-backend-modules], AS_HELP_STRING([--with-linux-backend-modules=3D"mod1 mod2"], diff --git a/tools/libs/guest/Makefile.common b/tools/libs/guest/Makefile.c= ommon index a026a2f662..774b1d5392 100644 --- a/tools/libs/guest/Makefile.common +++ b/tools/libs/guest/Makefile.common @@ -25,6 +25,10 @@ OBJS-y +=3D xg_core.o OBJS-$(CONFIG_X86) +=3D xg_core_x86.o OBJS-$(CONFIG_ARM) +=3D xg_core_arm.o =20 +ifneq (,$(filter y,$(CONFIG_MIGRATE)$(CONFIG_HPTOOL))) +OBJS-y +=3D xg_offline_page.o +endif + vpath %.c ../../../xen/common/libelf =20 LIBELF_OBJS +=3D libelf-tools.o libelf-loader.o diff --git a/tools/misc/Makefile b/tools/misc/Makefile index c26e544e83..f783f16ae6 100644 --- a/tools/misc/Makefile +++ b/tools/misc/Makefile @@ -16,7 +16,7 @@ INSTALL_BIN +=3D xencov_split INSTALL_BIN +=3D $(INSTALL_BIN-y) =20 # Everything to be installed in regular sbin/ -INSTALL_SBIN-$(CONFIG_MIGRATE) +=3D xen-hptool +INSTALL_SBIN-$(CONFIG_HPTOOL) +=3D xen-hptool INSTALL_SBIN-$(CONFIG_X86) +=3D xen-hvmcrash INSTALL_SBIN-$(CONFIG_X86) +=3D xen-hvmctx INSTALL_SBIN-$(CONFIG_X86) +=3D xen-lowmemd --=20 2.51.2 From xen-devel-bounces@lists.xenproject.org Wed Nov 12 10:51:59 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 10:51:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159703.1488075 (Exim 4.92) (envelope-from ) id 1vJ8SF-00007m-KY; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6f16fa93-8259-49b6-2fc4-08de21d97b90 X-MS-Exchange-CrossTenant-originalarrivaltime: 12 Nov 2025 10:51:49.7721 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: /fpYk6gqwWV6R89SzekAz0RqQ0lgjg4Lnz+h0uR89c1s3K7+VZebhgtjhKCC/RzGUHwmMDlWo/ALvv0Hq0GUGA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAWPR03MB9786 Signed-off-by: Mykyta Poturai v3->v4: * update configuration section v2->v3: * patch introduced --- docs/misc/cpu-hotplug.txt | 51 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 docs/misc/cpu-hotplug.txt diff --git a/docs/misc/cpu-hotplug.txt b/docs/misc/cpu-hotplug.txt new file mode 100644 index 0000000000..1fbad0ecf7 --- /dev/null +++ b/docs/misc/cpu-hotplug.txt @@ -0,0 +1,51 @@ +CPU Hotplug +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +CPU hotplug is a feature that allows pCPU cores to be added to or removed = from a +running system without requiring a reboot. It is supported on x86 and Arm6= 4 +architectures. + +Implementation Details +---------------------- + +CPU hotplug is implemented through the `XEN_SYSCTL_CPU_HOTPLUG_*` sysctl c= alls. +The specific calls are: + +- `XEN_SYSCTL_CPU_HOTPLUG_ONLINE`: Brings a pCPU online +- `XEN_SYSCTL_CPU_HOTPLUG_OFFLINE`: Takes a pCPU offline +- `XEN_SYSCTL_CPU_HOTPLUG_SMT_ENABLE`: Enables SMT threads (x86 only) +- `XEN_SYSCTL_CPU_HOTPLUG_SMT_DISABLE`: Disables SMT threads (x86 only) + +All cores can be disabled, assuming hardware support, except for core 0. S= ysctl +calls are routed to core 0 before doing any actual up/down operations on o= ther +cores. + +Configuration +------------- + +Sysctl handlers are enabled unconditionally on x86 architecture. On Arm64, +handlers are enabled by default when ITS, FFA, and TEE configs are disable= d. +Building of the userspace tool "hptool" is controlled by the "hptool" flag= in +the configure script. It is enabled by default and can be disabled with +--disable-hptool command line option. + +Usage +----- + +Disable core: + +$ xen-hptool cpu-offline 2 +Prepare to offline CPU 2 +(XEN) Removing cpu 2 from runqueue 0 +CPU 2 offlined successfully + +Enable core: + +$ xen-hptool cpu-online 2 +Prepare to online CPU 2 +(XEN) Bringing up CPU2 +(XEN) GICv3: CPU2: Found redistributor in region 0 @00000a004005c000 +(XEN) CPU2: Guest atomics will try 1 times before pausing the domain +(XEN) CPU 2 booted. +(XEN) Adding cpu 2 to runqueue 0 +CPU 2 onlined successfully --=20 2.51.2 From xen-devel-bounces@lists.xenproject.org Wed Nov 12 10:57:55 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 10:57:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159778.1488088 (Exim 4.92) (envelope-from ) id 1vJ8Xv-00033b-Jg; Wed, 12 Nov 2025 10:57:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159778.1488088; Wed, 12 Nov 2025 10:57:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJ8Xv-00033U-Gn; Wed, 12 Nov 2025 10:57:51 +0000 Received: by outflank-mailman (input) for mailman id 1159778; Wed, 12 Nov 2025 10:57:49 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJ8Xt-00033O-QS for xen-devel@lists.xenproject.org; Wed, 12 Nov 2025 10:57:49 +0000 Received: from mail-ej1-x629.google.com (mail-ej1-x629.google.com [2a00:1450:4864:20::629]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 6d5b3573-bfb6-11f0-9d18-b5c5bf9af7f9; Wed, 12 Nov 2025 11:57:48 +0100 (CET) Received: by mail-ej1-x629.google.com with SMTP id a640c23a62f3a-b72cbc24637so155041666b.0 for ; Wed, 12 Nov 2025 02:57:48 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 12 Nov 2025 02:57:48 -0800 (PST) Message-ID: <51a7d586-c1a0-4d35-b0de-6258aecaa668@suse.com> Date: Wed, 12 Nov 2025 11:57:47 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RESEND PATCH v2 1/3] x86/hvm: move hvm_shadow_handle_cd() to vmx code To: Teddy Astie , Grygorii Strashko Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , xen-devel@lists.xenproject.org References: <20251111200958.3576341-1-grygorii_strashko@epam.com> <20251111200958.3576341-2-grygorii_strashko@epam.com> <93dd7056-234d-4d3d-ae1f-d73f33a35f1a@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <93dd7056-234d-4d3d-ae1f-d73f33a35f1a@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 12.11.2025 11:52, Teddy Astie wrote: > Le 11/11/2025 à 21:11, Grygorii Strashko a écrit : >> @@ -1451,6 +1452,66 @@ static int cf_check vmx_get_guest_pat(struct vcpu *v, u64 *gpat) >> return 1; >> } >> >> +/* Exit UC mode only if all VCPUs agree on MTRR/PAT and are not in no_fill. */ >> +static bool domain_exit_uc_mode(struct vcpu *v) >> +{ >> + struct domain *d = v->domain; >> + struct vcpu *vs; >> + >> + for_each_vcpu(d, vs) >> + { >> + if ( (vs == v) || !vs->is_initialised ) >> + continue; >> + if ( (vs->arch.hvm.cache_mode == NO_FILL_CACHE_MODE) || >> + mtrr_pat_not_equal(vs, v) ) >> + return false; >> + } >> + >> + return true; >> +} >> + >> +static void hvm_set_uc_mode(struct domain *d, bool is_in_uc_mode) >> +{ >> + d->arch.hvm.is_in_uc_mode = is_in_uc_mode; >> + shadow_blow_tables_per_domain(d); >> +} >> + >> +static void hvm_shadow_handle_cd(struct vcpu *v, unsigned long value) >> +{ >> + struct domain *d = v->domain; >> + >> + if ( value & X86_CR0_CD ) >> + { >> + /* Entering no fill cache mode. */ >> + spin_lock(&d->arch.hvm.uc_lock); >> + v->arch.hvm.cache_mode = NO_FILL_CACHE_MODE; >> + >> + if ( !d->arch.hvm.is_in_uc_mode ) >> + { >> + domain_pause_nosync(d); >> + >> + /* Flush physical caches. */ >> + flush_all(FLUSH_CACHE_EVICT); >> + hvm_set_uc_mode(d, true); >> + >> + domain_unpause(d); >> + } >> + spin_unlock(&d->arch.hvm.uc_lock); >> + } >> + else if ( !(value & X86_CR0_CD) && >> + (v->arch.hvm.cache_mode == NO_FILL_CACHE_MODE) ) >> + { >> + /* Exit from no fill cache mode. */ >> + spin_lock(&d->arch.hvm.uc_lock); >> + v->arch.hvm.cache_mode = NORMAL_CACHE_MODE; >> + >> + if ( domain_exit_uc_mode(v) ) >> + hvm_set_uc_mode(d, false); >> + >> + spin_unlock(&d->arch.hvm.uc_lock); >> + } >> +} >> + > > Given that these functions are now static in vmx.c, I would give them > the vmx_* prefix instead of hvm_* (which could be confusing as it sounds > like something that is in general code). There's no need for either prefix really, I would say. Jan From xen-devel-bounces@lists.xenproject.org Wed Nov 12 10:58:38 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 10:58:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159789.1488097 (Exim 4.92) (envelope-from ) id 1vJ8Yg-0003Y0-RC; Wed, 12 Nov 2025 10:58:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159789.1488097; Wed, 12 Nov 2025 10:58:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJ8Yg-0003Xt-Of; Wed, 12 Nov 2025 10:58:38 +0000 Received: by outflank-mailman (input) for mailman id 1159789; Wed, 12 Nov 2025 10:58:37 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJ8Yf-00033O-Ii for xen-devel@lists.xenproject.org; Wed, 12 Nov 2025 10:58:37 +0000 Received: from mail136-17.atl41.mandrillapp.com (mail136-17.atl41.mandrillapp.com [198.2.136.17]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 895d6952-bfb6-11f0-9d18-b5c5bf9af7f9; Wed, 12 Nov 2025 11:58:36 +0100 (CET) Received: from pmta11.mandrill.prod.atl01.rsglab.com (localhost [127.0.0.1]) by mail136-17.atl41.mandrillapp.com (Mailchimp) with ESMTP id 4d60kg19pxzPm0ZNG for ; Wed, 12 Nov 2025 10:58:35 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id 68640975b6574f6b8a5b1d3da2c2f2b5; Wed, 12 Nov 2025 10:58:35 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 895d6952-bfb6-11f0-9d18-b5c5bf9af7f9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1762945115; x=1763215115; bh=tBMtXLUrgGGGSeKU3UBukiIF2xYXSSZmdQGOIQ0dPwI=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=NX4L6NBSPxfbqhJ0pUjK/vh6oJQxscppgq04n9B1iiXJ+dtfKAl6fTOJbpI+BFSFJ gxWg6+N5JouZ7m/8tUgGWuSN66EF76FYQ3VKW/in52iExWBqVHtKj0098xHwcn3p8z jtZM5BPtVfJiZE0NdcYwxd9GRs3bVVUIyOEDvNS5equ2TzzDP7gcKiUsMiFujRhl5H gj0fZ1tsbkVylrtqToGOd0X/r+JPAWnuCgRFsFFHA/EMYfwdOOaY1heQVeQfE6aEm3 JvIoYMuT0vb92sEs/EmLgvh9LYRVkMp15UwFmxQpJMCfWJOk5PDzj/pRDwqiTGc08V zu/EFoK0c7dcQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1762945115; x=1763205615; i=teddy.astie@vates.tech; bh=tBMtXLUrgGGGSeKU3UBukiIF2xYXSSZmdQGOIQ0dPwI=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=ZARYiMwDH6UoMyNcgvdyd8iZF+XgZXWLkC7UnCfSycYKZSnGD0hzIRjnwA63NDjUA HYepfdOza5bO61jCdrx6RXoL0LPouby3JE3Z0vpwCJHxnn5ArnZJU7VI2gl3W31l5Y 2Bvndz19dJGuT8sPGy2leAUJg6gQ5jYNP0YVZmJqP8AH0h68DkOa2HQ4ReatWEoalQ R0mmY0x7TsfUNgkZLalKSAfusP7AUtoqx82X9VvfSNlz1iYnVd/I6e9F9KXu9px0+W WwllN5eGcsTZ6XBNiywsmPK+EdCnJzuUiVn+6kfFtU9ERg5WoDNbigEKB5/Xmxp8hW 5tI/JSoIZhImA== From: "Teddy Astie" Subject: =?utf-8?Q?Re:=20[XEN][PATCH=200/5]=20x86:=20pvh:=20allow=20to=20disable=2032-bit=20(COMPAT)=20interface=20support?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1762945113454 Message-Id: To: "Grygorii Strashko" , xen-devel@lists.xenproject.org Cc: "Jan Beulich" , "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Anthony PERARD" , "Michal Orzel" , "Julien Grall" , "Stefano Stabellini" , "Alejandro Vallejo" , "Jason Andryuk" References: <20251111175413.3540690-1-grygorii_strashko@epam.com> In-Reply-To: <20251111175413.3540690-1-grygorii_strashko@epam.com> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.68640975b6574f6b8a5b1d3da2c2f2b5?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20251112:md Date: Wed, 12 Nov 2025 10:58:35 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Le 11/11/2025 =C3=A0 18:55, Grygorii Strashko a =C3=A9crit=C2=A0: > From: Grygorii Strashko > > Hi > > This series introduces possibility to disable 32-bit (COMPAT) interface s= upport > in the following cases: > - Only PVH domains are used I assume this one is mostly due to hvmloader being today running in protected mode 32-bits rather than a limitation "HVM" itself. I don't think of anything else preventing HVM (with 64-bits guests or 32-bits ones without Xen support) from working with COMPAT disabled. > - Guests (OS) are started by using direct Direct Kernel Boot > - Guests (OS) are 64-bit and Guest early boot code, which is runni= ng not > in 64-bit mode, does not access Xen interfaces > (hypercalls, shared_info, ..) > > If above criterias are met the COMPAT HVM interface become unreachable an= d can be disabled. > Coverage reports analyze and adding guard (debug) exceptions in hvm_hyper= call/hvm_do_multicall_call > and hvm_latch_shinfo_size() confirm that COMPAT HVM interface is unused f= or safety use-case. > > Grygorii Strashko (5): > x86: hvm: dm: factor out compat code under ifdefs > x86: hvm: compat: introduce vcpu_is_hcall_compat() helper > x86: hvm: factor out compat code under ifdefs > x86: pvh: allow to disable 32-bit interface support > x86: constify has_32bit_shinfo() if !CONFIG_COMPAT > > xen/arch/x86/hvm/Kconfig | 19 +++++++++++++++- > xen/arch/x86/hvm/dm.c | 2 ++ > xen/arch/x86/hvm/hvm.c | 22 +++++++++++++----- > xen/arch/x86/hvm/hypercall.c | 37 +++++++++++++++++++++++-------- > xen/arch/x86/hypercall.c | 6 +---- > xen/arch/x86/include/asm/domain.h | 3 ++- > xen/common/kernel.c | 2 +- > xen/include/xen/sched.h | 9 ++++++++ > 8 files changed, 78 insertions(+), 22 deletions(-) > Teddy -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Wed Nov 12 11:02:03 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 11:02:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159807.1488108 (Exim 4.92) (envelope-from ) id 1vJ8bs-0005Go-9I; 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a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1762944745; x=1763205245; i=teddy.astie@vates.tech; bh=86aQGi/7GaUPH3vqhUSGrPmTwZia3vX6HeEK4SO4NAs=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=gghIszI8ppzkHpmXXAoIM7qBapCg6fzPlPfORzROVnF1CKiuw3Z44G7pcgRxCTufZ 9DeQ3mdK6WG1dxJrIKiGBnQJ0wPZsttfclHD5QWWzm5U/YSiFqKWPe80EiOV26kW3S Wu35s0+izpfdSZpBu/0wODsXIEDHc2Lv/agwLCfXTyMZghHaVt4DvzuGG0ZXQJ8W8B GQRQfnhLk0CFQFL/3betC2zpl4l8HQ0qIN1lZxyfn9w6ocBrTwM+h5zINARoOGHPzT n4RDZ5lUqrcBLJKh95uAqKmxh4Cpr6cdFOIWFcw1qLr4eNs22FGBsIHTopxPJvDVjV 5ZLxjUE8p90Mg== From: "Teddy Astie" Subject: =?utf-8?Q?Re:=20[RESEND=20PATCH=20v2=201/3]=20x86/hvm:=20move=20hvm=5Fshadow=5Fhandle=5Fcd()=20to=20vmx=20code?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1762944743850 Message-Id: <93dd7056-234d-4d3d-ae1f-d73f33a35f1a@vates.tech> To: "Grygorii Strashko" , xen-devel@lists.xenproject.org Cc: "Jan Beulich" , "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Jason Andryuk" References: <20251111200958.3576341-1-grygorii_strashko@epam.com> <20251111200958.3576341-2-grygorii_strashko@epam.com> In-Reply-To: <20251111200958.3576341-2-grygorii_strashko@epam.com> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.1fd812512d564af1beb27716acce14a2?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20251112:md Date: Wed, 12 Nov 2025 10:52:25 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Le 11/11/2025 =C3=A0 21:11, Grygorii Strashko a =C3=A9crit=C2=A0: > From: Grygorii Strashko > > Functions: > hvm_shadow_handle_cd() > hvm_set_uc_mode() > domain_exit_uc_mode() > are used only by Intel VMX code, so move them to VMX code. > > While here: > - minor format change in domain_exit_uc_mode() > - s/(0/1)/(false/true) for bool types > - use "struct domain *" as parameter in hvm_set_uc_mode() > - use "struct domain *d" as local var in hvm_shadow_handle_cd() > > No functional changes. > > Signed-off-by: Grygorii Strashko > --- > changes in v2: > - use "struct domain *" as parameter in hvm_set_uc_mode() > - use "struct domain *d" as local var in hvm_shadow_handle_cd() > - move code before vmx_handle_cd() > > xen/arch/x86/hvm/hvm.c | 58 ------------------------ > xen/arch/x86/hvm/vmx/vmx.c | 61 ++++++++++++++++++++++++++ > xen/arch/x86/include/asm/hvm/support.h | 2 - > 3 files changed, 61 insertions(+), 60 deletions(-) > > diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c > index da3cde1ff0e6..9caca93e5f56 100644 > --- a/xen/arch/x86/hvm/hvm.c > +++ b/xen/arch/x86/hvm/hvm.c > @@ -2168,30 +2168,6 @@ int hvm_set_efer(uint64_t value) > return X86EMUL_OKAY; > } > > -/* Exit UC mode only if all VCPUs agree on MTRR/PAT and are not in no_fi= ll. */ > -static bool domain_exit_uc_mode(struct vcpu *v) > -{ > - struct domain *d =3D v->domain; > - struct vcpu *vs; > - > - for_each_vcpu ( d, vs ) > - { > - if ( (vs =3D=3D v) || !vs->is_initialised ) > - continue; > - if ( (vs->arch.hvm.cache_mode =3D=3D NO_FILL_CACHE_MODE) || > - mtrr_pat_not_equal(vs, v) ) > - return 0; > - } > - > - return 1; > -} > - > -static void hvm_set_uc_mode(struct vcpu *v, bool is_in_uc_mode) > -{ > - v->domain->arch.hvm.is_in_uc_mode =3D is_in_uc_mode; > - shadow_blow_tables_per_domain(v->domain); > -} > - > int hvm_mov_to_cr(unsigned int cr, unsigned int gpr) > { > struct vcpu *curr =3D current; > @@ -2273,40 +2249,6 @@ int hvm_mov_from_cr(unsigned int cr, unsigned int = gpr) > return X86EMUL_UNHANDLEABLE; > } > > -void hvm_shadow_handle_cd(struct vcpu *v, unsigned long value) > -{ > - if ( value & X86_CR0_CD ) > - { > - /* Entering no fill cache mode. */ > - spin_lock(&v->domain->arch.hvm.uc_lock); > - v->arch.hvm.cache_mode =3D NO_FILL_CACHE_MODE; > - > - if ( !v->domain->arch.hvm.is_in_uc_mode ) > - { > - domain_pause_nosync(v->domain); > - > - /* Flush physical caches. */ > - flush_all(FLUSH_CACHE_EVICT); > - hvm_set_uc_mode(v, 1); > - > - domain_unpause(v->domain); > - } > - spin_unlock(&v->domain->arch.hvm.uc_lock); > - } > - else if ( !(value & X86_CR0_CD) && > - (v->arch.hvm.cache_mode =3D=3D NO_FILL_CACHE_MODE) ) > - { > - /* Exit from no fill cache mode. */ > - spin_lock(&v->domain->arch.hvm.uc_lock); > - v->arch.hvm.cache_mode =3D NORMAL_CACHE_MODE; > - > - if ( domain_exit_uc_mode(v) ) > - hvm_set_uc_mode(v, 0); > - > - spin_unlock(&v->domain->arch.hvm.uc_lock); > - } > -} > - > static void hvm_update_cr(struct vcpu *v, unsigned int cr, unsigned lon= g value) > { > v->arch.hvm.guest_cr[cr] =3D value; > diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c > index 6f2cc635e582..d7efd0a73add 100644 > --- a/xen/arch/x86/hvm/vmx/vmx.c > +++ b/xen/arch/x86/hvm/vmx/vmx.c > @@ -44,6 +44,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -1451,6 +1452,66 @@ static int cf_check vmx_get_guest_pat(struct vcpu = *v, u64 *gpat) > return 1; > } > > +/* Exit UC mode only if all VCPUs agree on MTRR/PAT and are not in no_fi= ll. */ > +static bool domain_exit_uc_mode(struct vcpu *v) > +{ > + struct domain *d =3D v->domain; > + struct vcpu *vs; > + > + for_each_vcpu(d, vs) > + { > + if ( (vs =3D=3D v) || !vs->is_initialised ) > + continue; > + if ( (vs->arch.hvm.cache_mode =3D=3D NO_FILL_CACHE_MODE) || > + mtrr_pat_not_equal(vs, v) ) > + return false; > + } > + > + return true; > +} > + > +static void hvm_set_uc_mode(struct domain *d, bool is_in_uc_mode) > +{ > + d->arch.hvm.is_in_uc_mode =3D is_in_uc_mode; > + shadow_blow_tables_per_domain(d); > +} > + > +static void hvm_shadow_handle_cd(struct vcpu *v, unsigned long value) > +{ > + struct domain *d =3D v->domain; > + > + if ( value & X86_CR0_CD ) > + { > + /* Entering no fill cache mode. */ > + spin_lock(&d->arch.hvm.uc_lock); > + v->arch.hvm.cache_mode =3D NO_FILL_CACHE_MODE; > + > + if ( !d->arch.hvm.is_in_uc_mode ) > + { > + domain_pause_nosync(d); > + > + /* Flush physical caches. */ > + flush_all(FLUSH_CACHE_EVICT); > + hvm_set_uc_mode(d, true); > + > + domain_unpause(d); > + } > + spin_unlock(&d->arch.hvm.uc_lock); > + } > + else if ( !(value & X86_CR0_CD) && > + (v->arch.hvm.cache_mode =3D=3D NO_FILL_CACHE_MODE) ) > + { > + /* Exit from no fill cache mode. */ > + spin_lock(&d->arch.hvm.uc_lock); > + v->arch.hvm.cache_mode =3D NORMAL_CACHE_MODE; > + > + if ( domain_exit_uc_mode(v) ) > + hvm_set_uc_mode(d, false); > + > + spin_unlock(&d->arch.hvm.uc_lock); > + } > +} > + Given that these functions are now static in vmx.c, I would give them the vmx_* prefix instead of hvm_* (which could be confusing as it sounds like something that is in general code). > static void cf_check vmx_handle_cd(struct vcpu *v, unsigned long value) > { > if ( !paging_mode_hap(v->domain) ) > diff --git a/xen/arch/x86/include/asm/hvm/support.h b/xen/arch/x86/includ= e/asm/hvm/support.h > index 2a7ba36af06f..9e9fa6295567 100644 > --- a/xen/arch/x86/include/asm/hvm/support.h > +++ b/xen/arch/x86/include/asm/hvm/support.h > @@ -119,8 +119,6 @@ void hvm_rdtsc_intercept(struct cpu_user_regs *regs); > > int __must_check hvm_handle_xsetbv(u32 index, u64 new_bv); > > -void hvm_shadow_handle_cd(struct vcpu *v, unsigned long value); > - > /* > * These functions all return X86EMUL return codes. For hvm_set_*(), t= he > * caller is responsible for injecting #GP[0] if X86EMUL_EXCEPTION is Teddy -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Wed Nov 12 11:03:10 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 11:03:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159831.1488118 (Exim 4.92) (envelope-from ) id 1vJ8cu-00067M-IL; Wed, 12 Nov 2025 11:03:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159831.1488118; Wed, 12 Nov 2025 11:03:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJ8cu-00067F-Er; Wed, 12 Nov 2025 11:03:00 +0000 Received: by outflank-mailman (input) for mailman id 1159831; Wed, 12 Nov 2025 11:02:59 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJ8ct-000673-MR for xen-devel@lists.xenproject.org; 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It could also be interesting to reduce the attack >> surface of the hypervisor (by only exposing x2apic to the guest). >> >> As it can allow to have MMIO-less guest (using PVH), perhaps it can >> be enough for avoiding the problematic cases of virtualized INVLPGB >> (when we have it). >> >> In my testing, Linux, FreeBSD and PV-shim works fine with it; OVMF >> freezes for some reason, NetBSD doesn't support it (no x2apic support >> as Xen guest). HVM BIOS gets stuck at SeaBIOS as it expects booting >> with xAPIC. >> >> On Intel platforms, it would be better to expose the >> IA32_XAPIC_DISABLE_STATUS architectural MSR to advertise this to >> guest, but it's non-trivial as it needs to be properly exposed >> through IA32_ARCH_CAPABILITIES which is currently passed-through. >> >> docs/man/xl.cfg.5.pod.in | 7 +++++++ >> tools/libs/light/libxl_types.idl | 1 + >> tools/libs/light/libxl_x86.c | 4 ++++ >> tools/xl/xl_parse.c | 1 + >> xen/arch/x86/domain.c | 2 +- >> xen/arch/x86/hvm/hvm.c | 2 ++ >> xen/arch/x86/hvm/vlapic.c | 23 ++++++++++++++++++++++- >> xen/arch/x86/include/asm/domain.h | 2 ++ >> xen/arch/x86/include/asm/hvm/domain.h | 3 +++ >> xen/include/public/arch-x86/xen.h | 12 +++++++++++- >> 10 files changed, 54 insertions(+), 3 deletions(-) >> > I guess for now, it would be preferable overall to : > - just add a way to enable it by default, not lock in it in x2apic mode > - the ability to lock it down (i.e disable xAPIC at compile time) could > be introduced separately > > I'm not completely decided on the naming of the option, maybe something > like : > x2apic_mode = | (or just enable ?) > > `default` will keep the current behavior, or force x2apic if xAPIC is > disabled at compile time; `pre_enable` will enable it by default, but OS > may be able to go back to xAPIC mode if supported. You don't need any new hypercalls.  Just set the state correctly in a LAPIC record in libxg's vcpu_hvm(). ~Andrew From xen-devel-bounces@lists.xenproject.org Wed Nov 12 11:06:15 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 11:06:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159862.1488128 (Exim 4.92) (envelope-from ) id 1vJ8g2-0006xH-3U; Wed, 12 Nov 2025 11:06:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159862.1488128; Wed, 12 Nov 2025 11:06:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJ8g2-0006xA-0q; Wed, 12 Nov 2025 11:06:14 +0000 Received: by outflank-mailman (input) for mailman id 1159862; Wed, 12 Nov 2025 11:06:12 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by 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=?utf-8?B?c2VpblFkWk9ydUlFY0k0T21aQzUwdTFLQmlybFJLU3J2aEhNVytYSTZBNXZr?= =?utf-8?B?VGFGbG9BbGQwQW1NbkExZHJDU1JJalJIR3pud05oamZOUFEwUlozQ29ma1Vy?= =?utf-8?B?NXc9PQ==?= X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-Network-Message-Id: 5cef52e1-d34f-4a10-9de0-08de21de84bc X-MS-Exchange-CrossTenant-AuthSource: AS2PR03MB8907.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Nov 2025 11:27:52.9637 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: xFj3IoCrtajLl+83yWuGgStPJOQ50S1Q7bo9efV75NYv/76GJfbk5I4Ni58mEbR5Mk60RujE1w6IxF6VvcJIwgng0xIii/HLFJYNSSIrxfs= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU2PR03MB7861 On 12.11.25 08:38, Jan Beulich wrote: > On 11.11.2025 18:52, Grygorii Strashko wrote: >> On 10.11.25 09:11, Jan Beulich wrote: >>> On 07.11.2025 19:17, Grygorii Strashko wrote: >>>> --- a/xen/arch/x86/include/asm/guest_access.h >>>> +++ b/xen/arch/x86/include/asm/guest_access.h >>>> @@ -13,26 +13,64 @@ >>>>   #include >>>>     /* Raw access functions: no type checking. */ >>>> -#define raw_copy_to_guest(dst, src, len)        \ >>>> -    (is_hvm_vcpu(current) ?                     \ >>>> -     copy_to_user_hvm((dst), (src), (len)) :    \ >>>> -     copy_to_guest_pv(dst, src, len)) >>>> -#define raw_copy_from_guest(dst, src, len)      \ >>>> -    (is_hvm_vcpu(current) ?                     \ >>>> -     copy_from_user_hvm((dst), (src), (len)) :  \ >>>> -     copy_from_guest_pv(dst, src, len)) >>>> -#define raw_clear_guest(dst,  len)              \ >>>> -    (is_hvm_vcpu(current) ?                     \ >>>> -     clear_user_hvm((dst), (len)) :             \ >>>> -     clear_guest_pv(dst, len)) >>>> -#define __raw_copy_to_guest(dst, src, len)      \ >>>> -    (is_hvm_vcpu(current) ?                     \ >>>> -     copy_to_user_hvm((dst), (src), (len)) :    \ >>>> -     __copy_to_guest_pv(dst, src, len)) >>>> -#define __raw_copy_from_guest(dst, src, len)    \ >>>> -    (is_hvm_vcpu(current) ?                     \ >>>> -     copy_from_user_hvm((dst), (src), (len)) :  \ >>>> -     __copy_from_guest_pv(dst, src, len)) >>>> +static inline bool raw_use_hvm_access(const struct vcpu *v) >>>> +{ >>>> +    return IS_ENABLED(CONFIG_HVM) && (!IS_ENABLED(CONFIG_PV) || is_hvm_vcpu(v)); >>>> +} >>> >>> Without a full audit (likely tedious and error prone) this still is a >>> behavioral change for some (likely unintended) use against a system domain >>> (likely the idle one): With HVM=y PV=n we'd suddenly use the HVM accessor >>> there. IOW imo the "system domains are implicitly PV" aspect wants >>> retaining, even if only "just in case". It's okay not to invoke the PV >>> accessor (but return "len" instead), but it's not okay to invoke the HVM >>> one. >> >> This patch is subset of "constify is_hvm_domain() for PV=n case" attempts. >> >> It was made under assumption that: >> "System domains do not have Guests running, so can't initiate hypecalls and >>  can not be users of copy_to/from_user() routines. There are no Guest and no user memory". >> [IDLE, COW, IO, XEN] >> >> If above assumption is correct - this patch was assumed safe. >> >> if not - it all make no sense, probably. > > I wouldn't go as far as saying that. It can be arranged to avid the corner > case I mentioned, I think. do you mean adding "&& !is_system_domain(v->domain)" in raw_use_hvm_access()? Hm, I see that vcpu(s) are not even created for system domains in domain_create(). So seems !is_system_domain(v->domain) == true always here. Am I missing smth? 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Wed, 12 Nov 2025 03:49:36 -0800 (PST) Message-ID: <6a5a9f4e-1f0e-453f-b1d1-d0e2acf97e2a@suse.com> Date: Wed, 12 Nov 2025 12:49:35 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [for 4.22 v5 18/18] xen/riscv: introduce metadata table to store P2M type To: Oleksii Kurochko Cc: Alistair Francis , Bob Eshleman , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 20.10.2025 17:58, Oleksii Kurochko wrote: > --- a/xen/arch/riscv/p2m.c > +++ b/xen/arch/riscv/p2m.c > @@ -20,6 +20,16 @@ > > #define P2M_SUPPORTED_LEVEL_MAPPING 2 > > +/* > + * P2M PTE context is used only when a PTE's P2M type is p2m_ext_storage. > + * In this case, the P2M type is stored separately in the metadata page. > + */ > +struct p2m_pte_ctx { > + struct page_info *pt_page; /* Page table page containing the PTE. */ > + unsigned int index; /* Index of the PTE within that page. */ > + unsigned int level; /* Paging level at which the PTE resides. */ > +}; > + > unsigned char __ro_after_init gstage_mode; > unsigned int __ro_after_init gstage_root_level; > > @@ -363,24 +373,89 @@ static struct page_info *p2m_alloc_page(struct p2m_domain *p2m) > return pg; > } > > -static int p2m_set_type(pte_t *pte, p2m_type_t t) > +/* > + * `pte` – PTE entry for which the type `t` will be stored. > + * > + * If `t` is `p2m_ext_storage`, both `ctx` and `p2m` must be provided; > + * otherwise, only p2m may be NULL. > + */ > +static void p2m_set_type(pte_t *pte, const p2m_type_t t, > + struct p2m_pte_ctx *ctx, > + struct p2m_domain *p2m) > { > - int rc = 0; > + struct page_info **md_pg; > + pte_t *metadata = NULL; I'm not convinced it is a good idea to re-use pte_t for this purpose. If you used a separate type, and if then you defined that as a bitfield with only a few bits dedicated to type, future changes (additions) may be quite a bit easier. > - if ( t > p2m_first_external ) > - panic("unimplemeted\n"); > - else > + ASSERT(p2m); > + > + /* Be sure that an index correspondent to page level is passed. */ > + ASSERT(ctx && ctx->index < P2M_PAGETABLE_ENTRIES(ctx->level)); > + > + /* > + * For the root page table (16 KB in size), we need to select the correct > + * metadata table, since allocations are 4 KB each. In total, there are > + * 4 tables of 4 KB each. > + * For none-root page table index of ->pt_page[] will be always 0 as > + * index won't be higher then 511. ASSERT() above verifies that. > + */ > + md_pg = &ctx->pt_page[ctx->index / PAGETABLE_ENTRIES].v.md.pg; > + > + if ( !*md_pg && (t >= p2m_first_external) ) > + { > + BUG_ON(ctx->level > P2M_SUPPORTED_LEVEL_MAPPING); > + > + if ( ctx->level <= P2M_SUPPORTED_LEVEL_MAPPING ) > + { > + struct domain *d = p2m->domain; This is (if at all) needed only ... > + *md_pg = p2m_alloc_page(p2m); > + if ( !*md_pg ) > + { ... in this more narrow scope. > + printk("%s: can't allocate extra memory for dom%d\n", > + __func__, d->domain_id); The logging text isn't specific enough for my taste. For ordinary printk()s I'd also recommend against use of __func__ (that's fine for dprintk()). Also please us %pd in such cases. > + domain_crash(d); > + > + return; > + } > + } > + } > + > + if ( *md_pg ) > + metadata = __map_domain_page(*md_pg); > + > + if ( t < p2m_first_external ) > + { > pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK); > > - return rc; > + if ( metadata ) > + metadata[ctx->index].pte = p2m_invalid; Shouldn't this be accompanied with a BUILD_BUG_ON(p2m_invalid), as otherwise p2m_alloc_page()'s clearing of the page won't have the intended effect? > + } > + else > + { > + pte->pte |= MASK_INSR(p2m_ext_storage, P2M_TYPE_PTE_BITS_MASK); > + > + metadata[ctx->index].pte = t; If you set t to p2m_ext_storage here, the pte->pte updating could be moved ... > + } ... here, covering both cases. Overally this may then be easier as if ( t >= p2m_first_external ) metadata[ctx->index].pte = t; else if ( metadata ) metadata[ctx->index].pte = p2m_invalid; pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK); Then raising the question whether it couldn't still be the real type that's stored in metadata[] even for t < p2m_first_external. That woiuld further reduce conditionals. > + unmap_domain_page(metadata); > } > > -static p2m_type_t p2m_get_type(const pte_t pte) > +/* > + * `pte` -> PTE entry that stores the PTE's type. > + * > + * If the PTE's type is `p2m_ext_storage`, `ctx` should be provided; > + * otherwise it could be NULL. > + */ > +static p2m_type_t p2m_get_type(const pte_t pte, const struct p2m_pte_ctx *ctx) > { > p2m_type_t type = MASK_EXTR(pte.pte, P2M_TYPE_PTE_BITS_MASK); > > if ( type == p2m_ext_storage ) > - panic("unimplemented\n"); > + { > + const pte_t *md = __map_domain_page(ctx->pt_page->v.md.pg); > + type = md[ctx->index].pte; > + unmap_domain_page(md); Nit (style): Blank line please between declaration(s) and statement(s). > @@ -470,7 +545,15 @@ static void p2m_set_permission(pte_t *e, p2m_type_t t) > } > } > > -static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t, bool is_table) > +/* > + * If p2m_pte_from_mfn() is called with p2m_pte_ctx = NULL and p2m = NULL, > + * it means the function is working with a page table for which the `t` > + * should not be applicable. Otherwise, the function is handling a leaf PTE > + * for which `t` is applicable. > + */ > +static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t, > + struct p2m_pte_ctx *p2m_pte_ctx, > + struct p2m_domain *p2m) > { > pte_t e = (pte_t) { PTE_VALID }; > > @@ -478,7 +561,7 @@ static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t, bool is_table) > > ASSERT(!(mfn_to_maddr(mfn) & ~PADDR_MASK) || mfn_eq(mfn, INVALID_MFN)); > > - if ( !is_table ) > + if ( p2m_pte_ctx && p2m ) > { Maybe better if ( p2m_pte_ctx ) { ASSERT(p2m); ... (if you really think the 2nd check is needed)? > @@ -506,12 +589,19 @@ static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t, bool is_table) > /* Generate table entry with correct attributes. */ > static pte_t page_to_p2m_table(const struct page_info *page) > { > - /* > - * p2m_invalid will be ignored inside p2m_pte_from_mfn() as is_table is > - * set to true and p2m_type_t shouldn't be applied for PTEs which > - * describe an intermidiate table. > - */ > - return p2m_pte_from_mfn(page_to_mfn(page), p2m_invalid, true); > + return p2m_pte_from_mfn(page_to_mfn(page), p2m_invalid, NULL, NULL); > +} How come the comment is dropped? If you deem it unecessary, why was it added earlier in this same series? > +static void p2m_free_page(struct p2m_domain *p2m, struct page_info *pg); > + > +/* > + * Free page table's page and metadata page linked to page table's page. > + */ > +static void p2m_free_table(struct p2m_domain *p2m, struct page_info *tbl_pg) > +{ > + if ( tbl_pg->v.md.pg ) > + p2m_free_page(p2m, tbl_pg->v.md.pg); To play safe, maybe better also clear tbl_pg->v.md.pg? > @@ -749,6 +849,10 @@ static bool p2m_split_superpage(struct p2m_domain *p2m, pte_t *entry, > unsigned int next_level = level - 1; > unsigned int level_order = P2M_LEVEL_ORDER(next_level); > > + struct p2m_pte_ctx p2m_pte_ctx; I think this would better be one variable instance per scope where it's needed, and then using an initzializer. Or else ... > + /* Init with p2m_invalid just to make compiler happy. */ > + p2m_type_t old_type = p2m_invalid; > + > /* > * This should only be called with target != level and the entry is > * a superpage. > @@ -770,6 +874,19 @@ static bool p2m_split_superpage(struct p2m_domain *p2m, pte_t *entry, > > table = __map_domain_page(page); > > + if ( MASK_EXTR(entry->pte, P2M_TYPE_PTE_BITS_MASK) == p2m_ext_storage ) > + { > + p2m_pte_ctx.pt_page = tbl_pg; > + p2m_pte_ctx.index = offsets[level]; > + /* > + * It doesn't really matter what is a value for a level as > + * p2m_get_type() doesn't need it, so it is initialized just in case. > + */ > + p2m_pte_ctx.level = level; > + > + old_type = p2m_get_type(*entry, &p2m_pte_ctx); > + } > + > for ( i = 0; i < P2M_PAGETABLE_ENTRIES(next_level); i++ ) > { > pte_t *new_entry = table + i; > @@ -781,6 +898,15 @@ static bool p2m_split_superpage(struct p2m_domain *p2m, pte_t *entry, > pte = *entry; > pte_set_mfn(&pte, mfn_add(mfn, i << level_order)); > > + if ( MASK_EXTR(pte.pte, P2M_TYPE_PTE_BITS_MASK) == p2m_ext_storage ) > + { > + p2m_pte_ctx.pt_page = page; > + p2m_pte_ctx.index = i; > + p2m_pte_ctx.level = next_level; ... why are the loop-invariat fields not filled ahead of the loop here? > @@ -927,7 +1061,13 @@ static int p2m_set_entry(struct p2m_domain *p2m, > p2m_clean_pte(entry, p2m->clean_dcache); > else > { > - pte_t pte = p2m_pte_from_mfn(mfn, t, false); > + struct p2m_pte_ctx tmp_ctx = { > + .pt_page = mfn_to_page(domain_page_map_to_mfn(table)), > + .index = offsets[level], Nit: Stray blank. > @@ -1153,7 +1301,14 @@ static mfn_t p2m_get_entry(struct p2m_domain *p2m, gfn_t gfn, > if ( pte_is_valid(entry) ) > { > if ( t ) > - *t = p2m_get_type(entry); > + { > + struct p2m_pte_ctx p2m_pte_ctx = { > + .pt_page = mfn_to_page(domain_page_map_to_mfn(table)), > + .index = offsets[level], > + }; .level not being set here? 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pr=C Message-ID: <80c02055-2687-4e24-8de0-8fb4dfe2af02@amd.com> Date: Wed, 12 Nov 2025 13:40:33 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/3] arm/mpu: Implement setup_mm for MPU systems To: Harry Ramsey , CC: , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk References: <20251111101601.4171120-1-harry.ramsey@arm.com> <20251111101601.4171120-2-harry.ramsey@arm.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20251111101601.4171120-2-harry.ramsey@arm.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000A349:EE_|SJ2PR12MB9209:EE_ X-MS-Office365-Filtering-Correlation-Id: d21e65d9-39fe-4f81-06db-08de21e8b0e6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700013|376014|7053199007; X-Microsoft-Antispam-Message-Info: =?utf-8?B?cVNGOFZuTUZKMWNsd29oOTBtalpTWis0Ri9ULzZZcTQvU2ltUXI1eUxIWG8r?= =?utf-8?B?dVBNMDljbDhQN3VRWXRhd21Cc00zY1FVUXhWeXJvRFZqRzQwMWRSVTVGUXJD?= =?utf-8?B?Rjc4d2tIZUxMYmplSmF3cGZ2WmhOVkxlb1ZxODhOdFRPd1dsblBoY2VnNUw1?= =?utf-8?B?TThvTUJqanB2RVVxQzdMMzhONU1xaHpvYzVGTkNnbVNOL1NIVnVjRFVhTkRD?= =?utf-8?B?NlI1Z1dIWGJwOHd3cyt5YjROcEZRazVYeWRyQ2NGbXJoNWhuVHFYenUwR0sr?= =?utf-8?B?U0lNYnkrQXR3UmlPZ2R6ZUR1VDFFL0duZkxPYno5c212Y25oaDZmR0dMdThx?= =?utf-8?B?RW81OGxOeDUzQVYrSHYzbFR6U1dsa0JrQmVuU2paaTJVUTgrelVLcGtnYzhL?= =?utf-8?B?VEVwRGIrREJIQkJmVFdHaFhEb1BuaTExRll5alZRQmhEU1RWbWdVdDIwNDZ5?= =?utf-8?B?MnJReVdXbmJZVkJRWm9YUE5PZFBWQkxqRTVFZG1mc3R2aW96WHJqZGRLMk1h?= =?utf-8?B?bklqdFRCTnA1SmcvdlpBQTlBVGxINVJsbzJIRVZLa05sZ3dVUDhqTmNId09z?= =?utf-8?B?NmhZRHo5UTc1M0tna1VBa0c1NS9hQVhCSzJPYkVmcFJteDJxclQxZVhkSUJ3?= =?utf-8?B?OHlyeElZcC9DTGpCQWNlNEdoK0ljdmtPcTZEYlRDWDBwSmZtUDdUV0YxMWl6?= =?utf-8?B?aFJSM3FnRmQ0SitZVWtYc0ZURFR3dWNnTzBaL3ZLK0xVN1VkNGpFaVYvSEE1?= =?utf-8?B?M2Zldjc1R084QXUvTElhRnVOU1hkWnNCcE1VcjI0TmZtc2xWdGxORUZyQ2xX?= =?utf-8?B?NE5RSk52QU1YSndEdGt1SjdlZmQ0WG9nTUVLSXZVY3BmVEJ3aElicDAxL0RR?= =?utf-8?B?R040K1Z0d29aZUFiYVFQZExpbHdkUnhlVWNhZlRLZmlLSU0ycHkyMnlKbVFi?= =?utf-8?B?Yk8zTExEajFjWDZGc25ZM0RkSUIwZTV0NGRMT3VCcm16R2h3Mlg3SkwzSER2?= =?utf-8?B?ZkxEMEFCbEE4WDlPR0tkdFN3emlnckgyV2NOaG1hMUYwQ0YvMWEwWnM5TDJC?= =?utf-8?B?ZVl4Nko2MHhlbk9SdncvRTZMZkwwa01jcnJueVpCc2NaZHI2YWpNWWhGbjFv?= =?utf-8?B?dFhFZW5mbzlib0lmM2JrVnBLOGJwcmVYZE1QTkd2QmJZREh4cEg2eWZJRC9l?= =?utf-8?B?d1diZ1drSU5iSE1RUDZQdW9QK0pNQktGWVppRWIrdDlrT2FyUjRtS0F4MjFp?= =?utf-8?B?T2ptTDc3S01sOTZqc1QwaGdmc3ZJWGpvbGJJeCtjRmk3M0dOblFaSW84UllY?= =?utf-8?B?UjVxN000WmZ6VExpVEwraVdpeEh1RTJGMWtQc05ObWpza1ZoSDVKRE9WczlH?= =?utf-8?B?ZnZqRHozMDZSYm8yNnU5Z0ZpZ0JlR3FwUHhKUEtGeHVodlpIUDVkaXJFUlV0?= =?utf-8?B?NVdxN2paMWVsQnQ4MXRGVzdlendSaEdyZm9ZK2ZlZDhwWkRMSG5adElheW5H?= =?utf-8?B?aytmWHgwcitLOE5uYmxhd2xUcWlFaUNkcTFaNGIzbFlkQlJMZVNPMmowbWFO?= =?utf-8?B?ZXc1a3ZxSU53NmRjaHg3UGo5b2VzUzBNTy9mL0p5ZFM3QytGNGcwZEI0L01T?= =?utf-8?B?U2tGZzFNUXRyaTNLeUdsSHB6NmVOc0lvWFZvSktKNVRPLzRZNGovY1hQMGht?= =?utf-8?B?SU5WSmppUWZvb3U4NTdYdEpGNUd3aUpUN2pDaUZEM2daa2RUY2ZIU2JJbk5a?= =?utf-8?B?N0Vvd01OanVQcGU1dkZYRnNORFFqVXhwaFl2WTgxa3BqRzBFUDRmWkZVWVM1?= =?utf-8?B?ZzljQldpNWpEdi9IT1BBRWZnMEt3V3BzcTFzTk9RZUFrRitRWWpuUGJMUGZk?= =?utf-8?B?Sk9UZlFRcGFoMFZnVzJ5dzdOcUUzZFp4a0JsUWhHUVREczdVSXZveXRqNzNz?= =?utf-8?B?TUY1UVZyQ21QdFR5bm9TeUlRaDZmODZHeVE4bGgrV2Qxbi9PenJXZS9CL2RN?= =?utf-8?B?dm9DaG9HK3crZmF4TGlQZGdoSFF2ZU5sVGtEc1pHcExQbG1OSnh3Sm9RZml0?= =?utf-8?B?RFRGVG1xUXowbEJEUmZVTGFEZ3hDU3JyVjk4eDNNcjdkTWNKVStrdW9QOGhR?= =?utf-8?Q?LeaM=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:satlexmb08.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(36860700013)(376014)(7053199007);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Nov 2025 12:40:41.6645 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d21e65d9-39fe-4f81-06db-08de21e8b0e6 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000A349.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB9209 On 11/11/2025 11:15, Harry Ramsey wrote: > Implement `setup_mm` for MPU systems. This variant does not require > setting up a direct map. > > To reduce code duplication the common initalisation code for both MPU > and MMU Arm64 configurations is refactored into `setup_mm`. Platform-specific > setup steps are now handled by a new helper function `setup_mm_helper`. > > Signed-off-by: Harry Ramsey > --- > Changes in v2: > - Improve clarity with regards to MPU setup in setup_mm > --- > xen/arch/arm/arm64/mmu/mm.c | 26 +------------------ > xen/arch/arm/include/asm/mm.h | 2 ++ > xen/arch/arm/mm.c | 48 +++++++++++++++++++++++++++++++++++ > xen/arch/arm/mpu/mm.c | 30 ++++++++++++++++++++-- > 4 files changed, 79 insertions(+), 27 deletions(-) > > diff --git a/xen/arch/arm/arm64/mmu/mm.c b/xen/arch/arm/arm64/mmu/mm.c > index 3e64be6ae6..70b53be032 100644 > --- a/xen/arch/arm/arm64/mmu/mm.c > +++ b/xen/arch/arm/arm64/mmu/mm.c > @@ -4,8 +4,6 @@ > #include > #include > #include > -#include > -#include > > #include > > @@ -240,33 +238,18 @@ static void __init setup_directmap_mappings(unsigned long base_mfn, > panic("Unable to setup the directmap mappings.\n"); > } > > -void __init setup_mm(void) > +void __init setup_mm_helper(void) > { > const struct membanks *banks = bootinfo_get_mem(); > paddr_t ram_start = INVALID_PADDR; > paddr_t ram_end = 0; > - paddr_t ram_size = 0; > unsigned int i; > > - init_pdx(); > - > - /* > - * We need some memory to allocate the page-tables used for the directmap > - * mappings. But some regions may contain memory already allocated > - * for other uses (e.g. modules, reserved-memory...). > - * > - * For simplicity, add all the free regions in the boot allocator. > - */ > - populate_boot_allocator(); > - > - total_pages = 0; > - > for ( i = 0; i < banks->nr_banks; i++ ) > { > const struct membank *bank = &banks->bank[i]; > paddr_t bank_end = bank->start + bank->size; > > - ram_size = ram_size + bank->size; > ram_start = min(ram_start, bank->start); > ram_end = max(ram_end, bank_end); > > @@ -274,16 +257,9 @@ void __init setup_mm(void) > PFN_DOWN(bank->size)); > } > > - total_pages += ram_size >> PAGE_SHIFT; > - > directmap_virt_end = XENHEAP_VIRT_START + ram_end - ram_start; > directmap_mfn_start = maddr_to_mfn(ram_start); > directmap_mfn_end = maddr_to_mfn(ram_end); > - > - setup_frametable_mappings(ram_start, ram_end); > - > - init_staticmem_pages(); > - init_sharedmem_pages(); > } > > /* > diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h > index 7a93dad2ed..f702f4a0d6 100644 > --- a/xen/arch/arm/include/asm/mm.h > +++ b/xen/arch/arm/include/asm/mm.h > @@ -202,6 +202,8 @@ extern void remove_early_mappings(void); > extern int prepare_secondary_mm(int cpu); > /* Map a frame table to cover physical addresses ps through pe */ > extern void setup_frametable_mappings(paddr_t ps, paddr_t pe); > +/* Helper function to setup memory management */ > +void setup_mm_helper(void); > /* map a physical range in virtual memory */ > void __iomem *ioremap_attr(paddr_t start, size_t len, unsigned int attributes); > > diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c > index 3b05b46ee0..c1208de26c 100644 > --- a/xen/arch/arm/mm.c > +++ b/xen/arch/arm/mm.c > @@ -12,8 +12,12 @@ > #include > #include > #include > +#include > +#include > #include > > +#include > + > #include > > #include > @@ -24,6 +28,50 @@ > > unsigned long frametable_base_pdx __read_mostly; > > +#if defined(CONFIG_ARM_64) || defined(CONFIG_MPU) > +void __init setup_mm(void) > +{ > + const struct membanks *banks = bootinfo_get_mem(); > + paddr_t ram_start = INVALID_PADDR; > + paddr_t ram_end = 0; > + paddr_t ram_size = 0; > + unsigned int i; > + > + init_pdx(); > + > + for ( i = 0; i < banks->nr_banks; i++ ) > + { > + const struct membank *bank = &banks->bank[i]; > + paddr_t bank_end = bank->start + bank->size; > + > + ram_size = ram_size + bank->size; > + ram_start = min(ram_start, bank->start); > + ram_end = max(ram_end, bank_end); > + } > + > + total_pages = ram_size >> PAGE_SHIFT; > + > + /* > + * On MMU systems we need some memory to allocate the page-tables used for > + * the directmap mappings. But some regions may contain memory already > + * allocated for other uses (e.g. modules, reserved-memory...). > + * > + * On MPU systems we need to pre-reserve regions that were allocated for > + * other uses (e.g. modules, reserved-memory...). I'm not sure I understand this part of the comment with regards to populate_boot_allocator(). Could you please explain? ~Michal From xen-devel-bounces@lists.xenproject.org Wed Nov 12 13:07:20 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 13:07:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159921.1488179 (Exim 4.92) (envelope-from ) id 1vJAZ6-00080K-DH; Wed, 12 Nov 2025 13:07:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159921.1488179; Wed, 12 Nov 2025 13:07:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJAZ6-00080D-A8; Wed, 12 Nov 2025 13:07:12 +0000 Received: by outflank-mailman (input) for mailman id 1159921; Wed, 12 Nov 2025 13:07:10 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJAZ4-000807-Qe for xen-devel@lists.xenproject.org; Wed, 12 Nov 2025 13:07:10 +0000 Received: from mail-ed1-x52e.google.com (mail-ed1-x52e.google.com [2a00:1450:4864:20::52e]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 7f08d486-bfc8-11f0-9d18-b5c5bf9af7f9; Wed, 12 Nov 2025 14:07:09 +0100 (CET) Received: by mail-ed1-x52e.google.com with SMTP id 4fb4d7f45d1cf-6419aaced59so1164637a12.0 for ; Wed, 12 Nov 2025 05:07:09 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 12 Nov 2025 05:07:08 -0800 (PST) Message-ID: Date: Wed, 12 Nov 2025 14:07:07 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH v3] xen/x86: guest_access: optimize raw_x_guest() for PV and HVM combinations To: Grygorii Strashko Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , Teddy Astie , "xen-devel@lists.xenproject.org" , Stefano Stabellini , "Lira, Victor M" References: <20251107181739.3034098-1-grygorii_strashko@epam.com> <47f86a44-007f-4b90-9656-b2440238b2ba@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 12.11.2025 12:27, Grygorii Strashko wrote: > > > On 12.11.25 08:38, Jan Beulich wrote: >> On 11.11.2025 18:52, Grygorii Strashko wrote: >>> On 10.11.25 09:11, Jan Beulich wrote: >>>> On 07.11.2025 19:17, Grygorii Strashko wrote: >>>>> --- a/xen/arch/x86/include/asm/guest_access.h >>>>> +++ b/xen/arch/x86/include/asm/guest_access.h >>>>> @@ -13,26 +13,64 @@ >>>>>   #include >>>>>     /* Raw access functions: no type checking. */ >>>>> -#define raw_copy_to_guest(dst, src, len)        \ >>>>> -    (is_hvm_vcpu(current) ?                     \ >>>>> -     copy_to_user_hvm((dst), (src), (len)) :    \ >>>>> -     copy_to_guest_pv(dst, src, len)) >>>>> -#define raw_copy_from_guest(dst, src, len)      \ >>>>> -    (is_hvm_vcpu(current) ?                     \ >>>>> -     copy_from_user_hvm((dst), (src), (len)) :  \ >>>>> -     copy_from_guest_pv(dst, src, len)) >>>>> -#define raw_clear_guest(dst,  len)              \ >>>>> -    (is_hvm_vcpu(current) ?                     \ >>>>> -     clear_user_hvm((dst), (len)) :             \ >>>>> -     clear_guest_pv(dst, len)) >>>>> -#define __raw_copy_to_guest(dst, src, len)      \ >>>>> -    (is_hvm_vcpu(current) ?                     \ >>>>> -     copy_to_user_hvm((dst), (src), (len)) :    \ >>>>> -     __copy_to_guest_pv(dst, src, len)) >>>>> -#define __raw_copy_from_guest(dst, src, len)    \ >>>>> -    (is_hvm_vcpu(current) ?                     \ >>>>> -     copy_from_user_hvm((dst), (src), (len)) :  \ >>>>> -     __copy_from_guest_pv(dst, src, len)) >>>>> +static inline bool raw_use_hvm_access(const struct vcpu *v) >>>>> +{ >>>>> +    return IS_ENABLED(CONFIG_HVM) && (!IS_ENABLED(CONFIG_PV) || is_hvm_vcpu(v)); >>>>> +} >>>> >>>> Without a full audit (likely tedious and error prone) this still is a >>>> behavioral change for some (likely unintended) use against a system domain >>>> (likely the idle one): With HVM=y PV=n we'd suddenly use the HVM accessor >>>> there. IOW imo the "system domains are implicitly PV" aspect wants >>>> retaining, even if only "just in case". It's okay not to invoke the PV >>>> accessor (but return "len" instead), but it's not okay to invoke the HVM >>>> one. >>> >>> This patch is subset of "constify is_hvm_domain() for PV=n case" attempts. >>> >>> It was made under assumption that: >>> "System domains do not have Guests running, so can't initiate hypecalls and >>>  can not be users of copy_to/from_user() routines. There are no Guest and no user memory". >>> [IDLE, COW, IO, XEN] >>> >>> If above assumption is correct - this patch was assumed safe. >>> >>> if not - it all make no sense, probably. >> >> I wouldn't go as far as saying that. It can be arranged to avid the corner >> case I mentioned, I think. > > do you mean adding "&& !is_system_domain(v->domain)" in raw_use_hvm_access()? No, we want to avoid adding any new any runtime checks. > Hm, I see that vcpu(s) are not even created for system domains in domain_create(). > So seems !is_system_domain(v->domain) == true always here. "always" in what sense? It _should_ be always true, but in the unlikely event we have a path where it isn't (which we could be sure of only after a full audit), behavior there shouldn't change in the described problematic way. > Am I missing smth? > Or you meant smth. else? I was thinking of something along the lines of if ( is_hvm_vcpu(current) ) return ..._hvm(); if ( !IS_ENABLED(CONFIG_PV) ) return len; return ..._pv(); Jan From xen-devel-bounces@lists.xenproject.org Wed Nov 12 13:58:17 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 13:58:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159933.1488190 (Exim 4.92) (envelope-from ) id 1vJBMH-0005tf-1B; Wed, 12 Nov 2025 13:58:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159933.1488190; Wed, 12 Nov 2025 13:58:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJBMG-0005tY-U9; Wed, 12 Nov 2025 13:58:00 +0000 Received: by outflank-mailman (input) for mailman id 1159933; Wed, 12 Nov 2025 13:58:00 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJBMG-0005tI-Ai for xen-devel@lists.xenproject.org; Wed, 12 Nov 2025 13:58:00 +0000 Received: from tor.source.kernel.org (tor.source.kernel.org [172.105.4.254]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 94d44a76-bfcf-11f0-980a-7dc792cee155; Wed, 12 Nov 2025 14:57:53 +0100 (CET) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 6148D60213; Wed, 12 Nov 2025 13:57:51 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 29847C2BCB4; Wed, 12 Nov 2025 13:57:34 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 94d44a76-bfcf-11f0-980a-7dc792cee155 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1762955871; bh=wyYh5JA+N7mRZY7BRonX9hRu7lWf6kG2xADXz4mWKHk=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=uDdn5b0TMd79Lh5gGh2J4WjGYOU7mL3bVuBbQ/VXgzY4nMQRUASwOOOn1wPdm3Cym W4XE28wEzp5MfEzdP2hqphehcMkmvAS/b8w6wcpUiLZxYE0rCMGLEp+rVCdW9qI4ba ocobM87q4/c0/j7wdbVyzm/yrXe8KetWir7vwxyUiRXtVNS/+8DnZ7OaB4HqMTf7u6 36VSYtBbbyHuGEXAGGvXe/GFkuJFAWR+xBF55ycy4xXYzkSJweCr6O/7vY6qeuk4iJ 2JAYXvNk5KDLXblAvdwOWYLaBc3JfMXId6w7fnEaMQeOyF/yR5GPTl+Yi8z7SCHe3i /nZPR2FUDupLg== Message-ID: Date: Wed, 12 Nov 2025 14:57:32 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 07/12] mm: enable lazy_mmu sections to nest To: Kevin Brodsky , Ryan Roberts , linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , "David S. Miller" , David Woodhouse , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org References: <20251029100909.3381140-1-kevin.brodsky@arm.com> <20251029100909.3381140-8-kevin.brodsky@arm.com> <999feffa-5d1d-42e3-bd3a-d949f2a9de9d@arm.com> <824bf705-e9d6-4eeb-9532-9059fa56427f@arm.com> <58fd1a6e-f2c4-421c-9b95-dea4b244a515@arm.com> <8f70692c-25a9-4bd0-94ab-43ab435e4b1b@arm.com> From: "David Hildenbrand (Red Hat)" Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit >>> >>> I don't really mind either way, but I don't see an immediate use for [C] >>> and [D] - the idea is that the paused section is short and controlled, >>> not made up of arbitrary calls. >> If my thinking above is correct, then I've already demonstrated that this is not >> the case. So I'd be inclined to go with [D] on the basis that it is the most robust. >> >> Keeping 2 nesting counts (enable and pause) feels pretty elegant to me and gives >> the fewest opportunities for surprises. > > Agreed, if we're going to allow enable() within a paused section, then > we might as well allow paused sections to nest too. The use-case is > clear, so I'm happy to go ahead and make those changes. > > David, any thoughts? I don't mind allowing nesting of pause(), so works for me. -- Cheers David From xen-devel-bounces@lists.xenproject.org Wed Nov 12 14:21:44 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 14:21:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159949.1488209 (Exim 4.92) (envelope-from ) id 1vJBjC-0001uk-2B; Wed, 12 Nov 2025 14:21:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159949.1488209; Wed, 12 Nov 2025 14:21:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJBjB-0001ud-VY; Wed, 12 Nov 2025 14:21:41 +0000 Received: by outflank-mailman (input) for mailman id 1159949; Wed, 12 Nov 2025 14:21:40 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJBjA-0001eo-JL for xen-devel@lists.xenproject.org; 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Wed, 12 Nov 2025 06:21:37 -0800 (PST) MIME-Version: 1.0 References: <20251110153551.84813-1-frediano.ziglio@citrix.com> <4ac8284c-e7f1-4d6a-9241-d6c30155551b@suse.com> In-Reply-To: <4ac8284c-e7f1-4d6a-9241-d6c30155551b@suse.com> From: Frediano Ziglio Date: Wed, 12 Nov 2025 14:21:25 +0000 X-Gm-Features: AWmQ_bkxICBKmYqknrHT_nb1_4imFiMIBh7r47VmdCEIqeaANBfR_t4EahOKWio Message-ID: Subject: Re: [PATCH v5] xen: Strip xen.efi by default To: Jan Beulich Cc: Frediano Ziglio , Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Demi Marie Obenour , =?UTF-8?Q?Marek_Marczykowski=2DG=C3=B3recki?= , xen-devel@lists.xenproject.org Content-Type: text/plain; charset="UTF-8" On Mon, 10 Nov 2025 at 16:01, Jan Beulich wrote: > > On 10.11.2025 16:35, Frediano Ziglio wrote: > > From: Frediano Ziglio > > > > For xen.gz file we strip all symbols and have an additional > > xen-syms.efi file version with all symbols. > > Make xen.efi more coherent stripping all symbols too. > > xen-syms.efi can be used for debugging. > > > > Signed-off-by: Frediano Ziglio > > --- > > Changes since v1: > > - avoid leaving target if some command fails. > > > > Changes since v2: > > - do not convert type but retain PE format; > > - use xen-syms.efi for new file name, more consistent with ELF. > > > > Changes since v3: > > - update documentation; > > - do not remove xen.efi.elf; > > - check endbr instruction before generating final target. > > > > Changes since v4: > > - simplify condition check; > > - avoid reuse of $@.tmp file. > > --- > > docs/misc/efi.pandoc | 8 +------- > > xen/Kconfig.debug | 9 ++------- > > xen/Makefile | 19 ------------------- > > xen/arch/x86/Makefile | 16 ++++++++++------ > > 4 files changed, 13 insertions(+), 39 deletions(-) > > > > diff --git a/docs/misc/efi.pandoc b/docs/misc/efi.pandoc > > index 11c1ac3346..c66b18a66b 100644 > > --- a/docs/misc/efi.pandoc > > +++ b/docs/misc/efi.pandoc > > @@ -20,13 +20,7 @@ Xen to load the configuration file even if multiboot modules are found. > > Once built, `make install-xen` will place the resulting binary directly into > > the EFI boot partition, provided `EFI_VENDOR` is set in the environment (and > > `EFI_MOUNTPOINT` is overridden as needed, should the default of `/boot/efi` not > > -match your system). When built with debug info, the binary can be quite large. > > -Setting `INSTALL_EFI_STRIP=1` in the environment will cause it to be stripped > > -of debug info in the process of installing. `INSTALL_EFI_STRIP` can also be set > > -to any combination of options suitable to pass to `strip`, in case the default > > -ones don't do. The xen.efi binary will also be installed in `/usr/lib64/efi/`, > > -unless `EFI_DIR` is set in the environment to override this default. This > > -binary will not be stripped in the process. > > +match your system). > > This behavioral change likely also calls for a ChangeLog entry, btw. > > Jan Hi, I'm not familiar with the format/style of this file. Could it be simply ### Removed - ...current list ... - INSTALL_EFI_STRIP environment was removed, xen.efi will be stripped. ? For simplicity, should we always strip xen.efi and provide also xen-syms.efi only if debug info is enabled? It would probably be more consistent. Regards, Frediano From xen-devel-bounces@lists.xenproject.org Wed Nov 12 14:21:44 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 14:21:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159948.1488200 (Exim 4.92) (envelope-from ) id 1vJBj9-0001h8-Rx; Wed, 12 Nov 2025 14:21:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159948.1488200; Wed, 12 Nov 2025 14:21:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJBj9-0001h1-PH; Wed, 12 Nov 2025 14:21:39 +0000 Received: by outflank-mailman (input) for mailman id 1159948; Wed, 12 Nov 2025 14:21:38 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJBj8-0001eo-Hy for xen-devel@lists.xenproject.org; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Nov 2025 14:21:27.8917 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 56922eeb-52c9-4e42-dec2-08de21f6c4b9 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB56.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4144 On Wed Nov 12, 2025 at 11:58 AM CET, Teddy Astie wrote: > Le 11/11/2025 =C3=A0 18:55, Grygorii Strashko a =C3=A9crit=C2=A0: >> From: Grygorii Strashko >>=20 >> Hi >>=20 >> This series introduces possibility to disable 32-bit (COMPAT) interface = support >> in the following cases: >> - Only PVH domains are used > > I assume this one is mostly due to hvmloader being today running in=20 > protected mode 32-bits rather than a limitation "HVM" itself. I don't=20 > think of anything else preventing HVM (with 64-bits guests or 32-bits=20 > ones without Xen support) from working with COMPAT disabled. It is indeed because hvmloader makes hypercalls. Otherwise HVM would work t= oo. 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Nov 2025 14:27:48.3141 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5fb78638-0daa-426b-226e-08de21f7a77e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF000397AF.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7202 On Wed Nov 12, 2025 at 7:40 AM CET, Jan Beulich wrote: > On 11.11.2025 19:25, Grygorii Strashko wrote: >> On 06.11.25 15:47, Jan Beulich wrote: >>> On 06.11.2025 14:42, Grygorii Strashko wrote: >>>> On 06.11.25 13:35, Jan Beulich wrote: >>>>> On 31.10.2025 17:17, Grygorii Strashko wrote: >>>>>> --- a/xen/arch/x86/hvm/hvm.c >>>>>> +++ b/xen/arch/x86/hvm/hvm.c >>>>>> @@ -4231,8 +4231,9 @@ static int hvm_set_param(struct domain *d, uin= t32_t index, uint64_t value) >>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0 rc =3D -EINVAL; >>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 break; >>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 case HVM_PARAM_VIRIDIAN: >>>>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if ( (value & ~HVMPV_fea= ture_mask) || >>>>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0 !(value & HVMPV_base_freq) ) >>>>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if ( !IS_ENABLED(CONFIG_= VIRIDIAN) && value ) >>>>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 = rc =3D -ENODEV; >>>>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 else if ( (value & ~HVMP= V_feature_mask) || !(value & HVMPV_base_freq) ) >>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0 rc =3D -EINVAL; >>>>> >>>>> I find the check for value to be (non-)zero a little dubious here: If= any caller >>>>> passed in 0, it would get back -EINVAL anyway. Imo -ENODEV would be m= ore suitable >>>>> in that case as well. Things would be different if 0 was a valid valu= e to pass in. >>>> >>>> The idea was to distinguish between "Feature enabled, Invalid paramete= r" and "Feature disabled". >>> " >>> But you don't, or else the addition would need to live after the -EINVA= L checks. >>> I also question the utility of knowing "parameter was invalid" when the= feature >>> isn't available anyway. >>=20 >> My understanding here - I need to drop non-zero "value" check. >> will be: >>=20 >> =C2=A0=C2=A0=C2=A0 case HVM_PARAM_VIRIDIAN: >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if ( !IS_ENABLED(CONFIG_VIRID= IAN) ) >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 rc = =3D -ENODEV; >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 else if ( (value & ~HVMPV_fea= ture_mask) || !(value & HVMPV_base_freq) ) >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 rc = =3D -EINVAL; >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 break; > > Yes, or alternatively > > case HVM_PARAM_VIRIDIAN: > if ( (value & ~HVMPV_feature_mask) || !(value & HVMPV_base_freq) = ) > rc =3D -EINVAL; > else if ( !IS_ENABLED(CONFIG_VIRIDIAN) ) > rc =3D -ENODEV; > break; > > Both have their up- and down-sides. > > Jan We should aim for Grygorii's form, imo. If anything because it eliminates the second else-if on !VIRIDIAN, leading to a marginal binary size reductio= n. There's no value in validation when viridian support just isn't there. Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Wed Nov 12 14:51:56 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 14:51:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1159989.1488229 (Exim 4.92) (envelope-from ) id 1vJCCM-00079m-Ja; Wed, 12 Nov 2025 14:51:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1159989.1488229; Wed, 12 Nov 2025 14:51:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJCCM-00079f-H1; Wed, 12 Nov 2025 14:51:50 +0000 Received: by outflank-mailman (input) for mailman id 1159989; Wed, 12 Nov 2025 14:51:48 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJCCK-000787-Qo for xen-devel@lists.xenproject.org; Wed, 12 Nov 2025 14:51:48 +0000 Received: from mail179-26.suw41.mandrillapp.com (mail179-26.suw41.mandrillapp.com [198.2.179.26]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 1c4f7140-bfd7-11f0-9d18-b5c5bf9af7f9; Wed, 12 Nov 2025 15:51:47 +0100 (CET) Received: from pmta12.mandrill.prod.suw01.rsglab.com (localhost [127.0.0.1]) by mail179-26.suw41.mandrillapp.com (Mailchimp) with ESMTP id 4d65vj35BWzKsbYwq for ; Wed, 12 Nov 2025 14:51:45 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id 52d6befa532c45509e8e4ebbc4f991d1; Wed, 12 Nov 2025 14:51:45 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 1c4f7140-bfd7-11f0-9d18-b5c5bf9af7f9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1762959105; x=1763229105; bh=IuOrOxBNA8cMhpMdlUPw8GDI0O10TQFvQKvWOyS1SPc=; h=From:Subject:To:Cc:Message-Id:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=DFOEYkAh9ebmUVJ9eN0DjxpnxfsRRVOlT/FCgmV+NqIm8e5iwGgSGgOgIEeYAyfMg Q29kepInuYfrduAA1CHjexzUTNA2tNHses6Wfp/j193VbDm3LgRXLpF+iTzCcbl7Kk Ae0Zo9gHO1NWWZCtv6x1iUM021qkBi9gnoLMvwpf1HY0BcbwR7bQCXzLrk6RLXDS1K IPPMiqpI82dhI997Hr4BjYt92h4BbYUVuTm2hnVtba6bHH6muzxDIl434KEeDyE/80 EloVSX2X1E6830WrcjPKxM+DKBNLHcYxOkAOGn5BaBmyeoXV1IWMFYJ6Xw8eEYZJYI /URQsOeBse6ww== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1762959105; x=1763219605; i=teddy.astie@vates.tech; bh=IuOrOxBNA8cMhpMdlUPw8GDI0O10TQFvQKvWOyS1SPc=; h=From:Subject:To:Cc:Message-Id:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=OEQ1vAPj5iNee8+/+Br36Vwy6Kg/8lck2j+aHURrG2pkgCA1w3c1kB5W9lsNgRROW ArI7R0t5jyKF8WERYiy7rT6Qipcxfp1ugIwbEkpwmj+zoEzmlR/Dax7ldY5R20bGGp CZUrMrRTdAJM5VjgwzviSV1Iu5zRWHOFe21Rfl1xCT+dMwPKoDxuLq4/bhHTDnG5Ih umLB+eyaxEaaoLQ/CDBEpjCRSJ6cvehJuLmA9xY+GRFx47qgxgZsxl9r61VJwMJe06 Vz/eunXzEfHMW7yx8OeiPP+NoA6AU+KpEykoxgYYquHggtCdXMAP8f6eeJA5KGZOwW 3rgI/KBl3dx/Q== From: "Teddy Astie" Subject: =?utf-8?Q?[RFC=20PATCH=20v2]=20x86/hvm:=20Allow=20pre-enabling=20x2apic=20mode=20on=20BSP?= X-Mailer: git-send-email 2.51.2 X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1762959104208 To: xen-devel@lists.xenproject.org Cc: "Teddy Astie" , "Anthony PERARD" , "Juergen Gross" , "Andrew Cooper" , "Jan Beulich" , "Alejandro Vallejo" , "Grygorii Strashko" Message-Id: <0cb4d1f91212a65baf924ed0ef825d8adb4b5423.1762958551.git.teddy.astie@vates.tech> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.52d6befa532c45509e8e4ebbc4f991d1?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20251112:md Date: Wed, 12 Nov 2025 14:51:45 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Introduce a new option to start the BSP vCPU in x2APIC mode instead of xAPIC mode. Expose this in xl through a new "x2apic_mode" option. Signed-off-by: Teddy Astie --- Cc: Andrew Cooper Cc: Jan Beulich Cc: Alejandro Vallejo Cc: Grygorii Strashko Later on, we could consider with this option to use x2APIC ACPI tables instead of xAPIC ones. There is also some room into introducing a new Kconfig option to only support x2apic mode, which would change how the "Xen default" would behave. changed in v2: - only pre-enable instead of forcing - use domain builder to pre-enable instead of introducing a new domain creation flag v1: - https://lore.kernel.org/xen-devel/d498a50f6187b362ac5da3c6a7a7c348f35dc4b3.1761761288.git.teddy.astie@vates.tech/ --- docs/man/xl.cfg.5.pod.in | 16 ++++++++++++ tools/include/libxl.h | 8 ++++++ tools/include/xenguest.h | 4 +++ tools/libs/guest/xg_dom_x86.c | 42 ++++++++++++++++++++++++++++++++ tools/libs/light/libxl_types.idl | 1 + tools/libs/light/libxl_x86.c | 4 +++ tools/xl/xl_parse.c | 11 +++++++++ 7 files changed, 86 insertions(+) diff --git a/docs/man/xl.cfg.5.pod.in b/docs/man/xl.cfg.5.pod.in index ad1553c5e9..0f7a89fe92 100644 --- a/docs/man/xl.cfg.5.pod.in +++ b/docs/man/xl.cfg.5.pod.in @@ -3198,6 +3198,22 @@ option. If using this option is necessary to fix an issue, please report a bug. +=item B + +Sets the x2apic mode of the domain. The valid values are as follows: + +=over 4 + +=item B<"default"> + +Use default Xen LAPIC behavior. + +=item B<"pre_enable"> + +Initially enable x2apic for the BSP of the domain. + +=back + =back =head1 SEE ALSO diff --git a/tools/include/libxl.h b/tools/include/libxl.h index bc35e412da..9850e8aa41 100644 --- a/tools/include/libxl.h +++ b/tools/include/libxl.h @@ -1537,6 +1537,14 @@ void libxl_mac_copy(libxl_ctx *ctx, libxl_mac *dst, const libxl_mac *src); */ #define LIBXL_HAVE_XEN_PLATFORM_PCI_BAR_UC +/* + * LIBXL_HAVE_X2APIC_PREENABLE + * + * libxl_domain_build_info contains a boolean 'arch_x86.x2apic_preenable' field + * to initially set the BSP LAPIC in x2APIC mode. + */ +#define LIBXL_HAVE_X2APIC_PREENABLE + typedef char **libxl_string_list; void libxl_string_list_dispose(libxl_string_list *sl); int libxl_string_list_length(const libxl_string_list *sl); diff --git a/tools/include/xenguest.h b/tools/include/xenguest.h index c88958faa9..408a0c77e8 100644 --- a/tools/include/xenguest.h +++ b/tools/include/xenguest.h @@ -223,6 +223,10 @@ struct xc_dom_image { /* If unset disables the setup of the IOREQ pages. */ bool device_model; +#if defined(__i386__) || defined(__x86_64__) + bool preenable_x2apic; /* 1 makes x2APIC enabled initially, 0 keeps default Xen behavior */ +#endif + /* BIOS/Firmware passed to HVMLOADER */ struct xc_hvm_firmware_module system_firmware_module; diff --git a/tools/libs/guest/xg_dom_x86.c b/tools/libs/guest/xg_dom_x86.c index a82b481a12..43ada5a6ac 100644 --- a/tools/libs/guest/xg_dom_x86.c +++ b/tools/libs/guest/xg_dom_x86.c @@ -58,6 +58,9 @@ #define MTRR_TYPE_WRBACK 6 #define MTRR_DEF_TYPE_ENABLE (1u << 11) +#define APIC_BASE_EXTD (1UL << 10) +#define APIC_BASE_ENABLE (1UL << 11) + #define SPECIALPAGE_PAGING 0 #define SPECIALPAGE_ACCESS 1 #define SPECIALPAGE_SHARING 2 @@ -1131,6 +1134,45 @@ static int vcpu_hvm(struct xc_dom_image *dom) } } + if ( dom->preenable_x2apic ) + { + struct { + struct hvm_save_descriptor header_d; + HVM_SAVE_TYPE(HEADER) header; + struct hvm_save_descriptor lapic_d; + HVM_SAVE_TYPE(LAPIC) lapic; + struct hvm_save_descriptor end_d; + HVM_SAVE_TYPE(END) end; + } lapic = { + .header_d = bsp_ctx.header_d, + .header = bsp_ctx.header, + .lapic_d.typecode = HVM_SAVE_CODE(LAPIC), + .lapic_d.length = HVM_SAVE_LENGTH(LAPIC), + .end_d = bsp_ctx.end_d, + .end = bsp_ctx.end, + }; + const HVM_SAVE_TYPE(LAPIC) *lapic_record = + hvm_get_save_record(full_ctx, HVM_SAVE_CODE(LAPIC), 0); + + if ( !lapic_record ) + { + xc_dom_panic(dom->xch, XC_INTERNAL_ERROR, + "%s: unable to get LAPIC save record", __func__); + goto out; + } + + memcpy(&lapic.lapic, lapic_record, sizeof(lapic.lapic)); + + lapic.lapic.apic_base_msr |= APIC_BASE_ENABLE | APIC_BASE_EXTD; + + rc = xc_domain_hvm_setcontext(dom->xch, dom->guest_domid, + (uint8_t *)&lapic, sizeof(lapic)); + + if ( rc != 0 ) + xc_dom_panic(dom->xch, XC_INTERNAL_ERROR, + "%s: SETHVMCONTEXT failed (rc=%d)", __func__, rc); + } + /* * Loading the BSP context should be done in the last call to setcontext, * since each setcontext call will put all vCPUs down. diff --git a/tools/libs/light/libxl_types.idl b/tools/libs/light/libxl_types.idl index d64a573ff3..9fdf89d88b 100644 --- a/tools/libs/light/libxl_types.idl +++ b/tools/libs/light/libxl_types.idl @@ -738,6 +738,7 @@ libxl_domain_build_info = Struct("domain_build_info",[ ("arm_sci", libxl_arm_sci), ])), ("arch_x86", Struct(None, [("msr_relaxed", libxl_defbool), + ("x2apic_preenable", libxl_defbool) ])), # Alternate p2m is not bound to any architecture or guest type, as it is # supported by x86 HVM and ARM support is planned. diff --git a/tools/libs/light/libxl_x86.c b/tools/libs/light/libxl_x86.c index 60d4e8661c..f9725f069a 100644 --- a/tools/libs/light/libxl_x86.c +++ b/tools/libs/light/libxl_x86.c @@ -555,6 +555,9 @@ int libxl__arch_domain_init_hw_description(libxl__gc *gc, libxl__domain_build_state *state, struct xc_dom_image *dom) { + if (libxl_defbool_val(d_config->b_info.arch_x86.x2apic_preenable)) + dom->preenable_x2apic = true; + return 0; } @@ -818,6 +821,7 @@ int libxl__arch_domain_build_info_setdefault(libxl__gc *gc, { libxl_defbool_setdefault(&b_info->acpi, true); libxl_defbool_setdefault(&b_info->arch_x86.msr_relaxed, false); + libxl_defbool_setdefault(&b_info->arch_x86.x2apic_preenable, false); libxl_defbool_setdefault(&b_info->trap_unmapped_accesses, false); if (b_info->type == LIBXL_DOMAIN_TYPE_HVM) { diff --git a/tools/xl/xl_parse.c b/tools/xl/xl_parse.c index af86d3186d..92bf9d2ad5 100644 --- a/tools/xl/xl_parse.c +++ b/tools/xl/xl_parse.c @@ -3040,6 +3040,17 @@ skip_usbdev: "WARNING: msr_relaxed will be removed in future versions.\n" "If it fixes an issue you are having please report to " "xen-devel@lists.xenproject.org.\n"); + + if (!xlu_cfg_get_string(config, "x2apic_mode", &buf, 1)) { + if (!strcmp(buf, "pre_enable")) + libxl_defbool_set(&b_info->arch_x86.x2apic_preenable, true); + else if (!strcmp(buf, "default")) + libxl_defbool_set(&b_info->arch_x86.x2apic_preenable, false); + else { + fprintf(stderr, "Unknown x2apic mode \"%s\" specified\n", buf); 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Wed, 12 Nov 2025 06:59:35 -0800 (PST) Message-ID: <90b52fb4-aa65-4673-b386-cf08f332c5b0@suse.com> Date: Wed, 12 Nov 2025 15:59:33 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5] xen: Strip xen.efi by default To: Frediano Ziglio Cc: Frediano Ziglio , Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Demi Marie Obenour , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , xen-devel@lists.xenproject.org References: <20251110153551.84813-1-frediano.ziglio@citrix.com> <4ac8284c-e7f1-4d6a-9241-d6c30155551b@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12.11.2025 15:21, Frediano Ziglio wrote: > On Mon, 10 Nov 2025 at 16:01, Jan Beulich wrote: >> >> On 10.11.2025 16:35, Frediano Ziglio wrote: >>> From: Frediano Ziglio >>> >>> For xen.gz file we strip all symbols and have an additional >>> xen-syms.efi file version with all symbols. >>> Make xen.efi more coherent stripping all symbols too. >>> xen-syms.efi can be used for debugging. >>> >>> Signed-off-by: Frediano Ziglio >>> --- >>> Changes since v1: >>> - avoid leaving target if some command fails. >>> >>> Changes since v2: >>> - do not convert type but retain PE format; >>> - use xen-syms.efi for new file name, more consistent with ELF. >>> >>> Changes since v3: >>> - update documentation; >>> - do not remove xen.efi.elf; >>> - check endbr instruction before generating final target. >>> >>> Changes since v4: >>> - simplify condition check; >>> - avoid reuse of $@.tmp file. >>> --- >>> docs/misc/efi.pandoc | 8 +------- >>> xen/Kconfig.debug | 9 ++------- >>> xen/Makefile | 19 ------------------- >>> xen/arch/x86/Makefile | 16 ++++++++++------ >>> 4 files changed, 13 insertions(+), 39 deletions(-) >>> >>> diff --git a/docs/misc/efi.pandoc b/docs/misc/efi.pandoc >>> index 11c1ac3346..c66b18a66b 100644 >>> --- a/docs/misc/efi.pandoc >>> +++ b/docs/misc/efi.pandoc >>> @@ -20,13 +20,7 @@ Xen to load the configuration file even if multiboot modules are found. >>> Once built, `make install-xen` will place the resulting binary directly into >>> the EFI boot partition, provided `EFI_VENDOR` is set in the environment (and >>> `EFI_MOUNTPOINT` is overridden as needed, should the default of `/boot/efi` not >>> -match your system). When built with debug info, the binary can be quite large. >>> -Setting `INSTALL_EFI_STRIP=1` in the environment will cause it to be stripped >>> -of debug info in the process of installing. `INSTALL_EFI_STRIP` can also be set >>> -to any combination of options suitable to pass to `strip`, in case the default >>> -ones don't do. The xen.efi binary will also be installed in `/usr/lib64/efi/`, >>> -unless `EFI_DIR` is set in the environment to override this default. This >>> -binary will not be stripped in the process. >>> +match your system). >> >> This behavioral change likely also calls for a ChangeLog entry, btw. > > I'm not familiar with the format/style of this file. > > Could it be simply > > ### Removed > - ...current list ... > - INSTALL_EFI_STRIP environment was removed, xen.efi will be stripped. > > ? Not sure if it would better go under Removed or Changed. I'd also be a little more verbose here, to provide context. E.g. "The install-time environment variable INSTALL_EFI_STRIP is no longer supported, xen.efi will is now always being stripped." > For simplicity, should we always strip xen.efi and provide also > xen-syms.efi only if debug info is enabled? > It would probably be more consistent. That's an option, I suppose. Jan From xen-devel-bounces@lists.xenproject.org Wed Nov 12 15:01:17 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 15:01:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160012.1488249 (Exim 4.92) (envelope-from ) id 1vJCLU-0000tE-LT; Wed, 12 Nov 2025 15:01:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160012.1488249; Wed, 12 Nov 2025 15:01:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJCLU-0000t7-Iy; Wed, 12 Nov 2025 15:01:16 +0000 Received: by outflank-mailman (input) for mailman id 1160012; Wed, 12 Nov 2025 15:01:15 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJCLT-0000sz-RK for xen-devel@lists.xenproject.org; Wed, 12 Nov 2025 15:01:15 +0000 Received: from mail-ej1-x62c.google.com (mail-ej1-x62c.google.com [2a00:1450:4864:20::62c]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 68159a8e-bfd8-11f0-9d18-b5c5bf9af7f9; Wed, 12 Nov 2025 16:01:03 +0100 (CET) Received: by mail-ej1-x62c.google.com with SMTP id a640c23a62f3a-b72dad1b713so155595566b.2 for ; Wed, 12 Nov 2025 07:01:02 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Conversely $(TARGET) doesn't need removing twice. Fixes: cb4fcf70b2f3 ("x86emul: parallelize SIMD test code building") Signed-off-by: Jan Beulich --- a/tools/tests/x86_emulator/Makefile +++ b/tools/tests/x86_emulator/Makefile @@ -261,7 +261,8 @@ $(TARGET): $(OBJS) .PHONY: clean clean: rm -rf $(TARGET) *.o *~ core *.bin x86_emulate - rm -rf $(TARGET) $(addsuffix .h,$(TESTCASES)) $(addsuffix -opmask.h,$(OPMASK)) + rm -rf $(addsuffix .h,$(TESTCASES)) $(addsuffix -opmask.h,$(OPMASK)) + rm -rf $(addsuffix .c,$(filter-out blowfish,$(TESTCASES))) .PHONY: distclean distclean: clean From xen-devel-bounces@lists.xenproject.org Wed Nov 12 15:23:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 15:23:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160025.1488261 (Exim 4.92) (envelope-from ) id 1vJCgZ-0004JY-Dw; Wed, 12 Nov 2025 15:23:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160025.1488261; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Nov 2025 15:22:52.6339 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: faa1f061-4588-4b46-5f14-08de21ff590e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF000026C4.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB7816 General cleanup, with marginal binary size reduction in the !CONFIG_PV case. Some PV-only code remains in the build when !CONFIG_PV because it's in fallback else branches and there's a number of stubs in asm/pv/domain.h that are either irrelevant or can be made irrelevant through trivial changes to the else branches on which they are used. Alejandro Vallejo (2): x86: Conditionalise PV-only fallback branches on CONFIG_PV x86: Remove stubs from asm/pv/domain.h xen/arch/x86/cpuid.c | 4 ++-- xen/arch/x86/domain.c | 10 ++++++---- xen/arch/x86/include/asm/pv/domain.h | 25 ------------------------- 3 files changed, 8 insertions(+), 31 deletions(-) base-commit: e00c1673992e07ed31e9c60fefa8d053491abbe6 -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Wed Nov 12 15:23:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 15:23:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160026.1488267 (Exim 4.92) (envelope-from ) id 1vJCgZ-0004QU-OX; Wed, 12 Nov 2025 15:23:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160026.1488267; Wed, 12 Nov 2025 15:23:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJCgZ-0004PB-L6; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Nov 2025 15:22:53.7849 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c88f7379-30de-42ab-fdb2-08de21ff59bd X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF000026C4.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH1PR12MB9574 A couple of branches rely on PV being the "else" branch, making it be compiled even when PV support is not itself compiled-in. Add a explicit conditional on CONFIG_PV in those cases to remove the code in !CONFIG_PV builds. Not a functional change. Signed-off-by: Alejandro Vallejo --- xen/arch/x86/cpuid.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index b63a82dd38..2e24c84708 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -297,7 +297,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, if ( v->arch.hvm.guest_cr[4] & X86_CR4_OSXSAVE ) res->c |= cpufeat_mask(X86_FEATURE_OSXSAVE); } - else /* PV domain */ + else if ( IS_ENABLED(CONFIG_PV) ) { regs = guest_cpu_user_regs(); @@ -509,7 +509,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, if ( !hap_enabled(d) && !hvm_pae_enabled(v) ) res->d &= ~cpufeat_mask(X86_FEATURE_PSE36); } - else /* PV domain */ + else if ( IS_ENABLED(CONFIG_PV) ) { /* * MTRR used to unconditionally leak into PV guests. They cannot -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Wed Nov 12 15:23:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 15:23:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160027.1488280 (Exim 4.92) (envelope-from ) id 1vJCgc-0004lN-1z; Wed, 12 Nov 2025 15:23:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160027.1488280; Wed, 12 Nov 2025 15:23:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJCgb-0004lE-Ti; Wed, 12 Nov 2025 15:23:05 +0000 Received: by outflank-mailman (input) for mailman id 1160027; Wed, 12 Nov 2025 15:23:05 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJCgb-0004kl-6M for xen-devel@lists.xenproject.org; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Nov 2025 15:22:56.9465 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 82ac522a-79f0-4572-4a85-08de21ff5ba0 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF000026C4.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS4PR12MB9683 They are unnecessary. The only two cases with link-time failures are fallback else branches that can just as well be adjusted with explicit IS_ENABLED(CONFIG_PV). HVM has no equivalent stubs and there's no reason to keep the asymmetry. No functional change. Signed-off-by: Alejandro Vallejo --- I'd rather remove the "rc = -EOPNOTSUPP" branch altogether, or replace it with ASSERT_UNREACHABLE(), but I kept it here to preserve prior behaviour. Thoughts? --- xen/arch/x86/domain.c | 10 ++++++---- xen/arch/x86/include/asm/pv/domain.h | 25 ------------------------- 2 files changed, 6 insertions(+), 29 deletions(-) diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index 19fd86ce88..0977d9323d 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -571,15 +571,17 @@ int arch_vcpu_create(struct vcpu *v) if ( is_hvm_domain(d) ) rc = hvm_vcpu_initialise(v); - else if ( !is_idle_domain(d) ) - rc = pv_vcpu_initialise(v); - else + else if ( is_idle_domain(d) ) { /* Idle domain */ v->arch.cr3 = __pa(idle_pg_table); rc = 0; v->arch.msrs = ZERO_BLOCK_PTR; /* Catch stray misuses */ } + else if ( IS_ENABLED(CONFIG_PV) ) + rc = pv_vcpu_initialise(v); + else + rc = -EOPNOTSUPP; if ( rc ) goto fail; @@ -614,7 +616,7 @@ void arch_vcpu_destroy(struct vcpu *v) if ( is_hvm_vcpu(v) ) hvm_vcpu_destroy(v); - else + else if ( IS_ENABLED(CONFIG_PV) ) pv_vcpu_destroy(v); } diff --git a/xen/arch/x86/include/asm/pv/domain.h b/xen/arch/x86/include/asm/pv/domain.h index 75a6b9e5c7..582d004051 100644 --- a/xen/arch/x86/include/asm/pv/domain.h +++ b/xen/arch/x86/include/asm/pv/domain.h @@ -54,8 +54,6 @@ static inline unsigned long get_pcid_bits(const struct vcpu *v, bool is_xpti) #endif } -#ifdef CONFIG_PV - void pv_vcpu_destroy(struct vcpu *v); int pv_vcpu_initialise(struct vcpu *v); void pv_domain_destroy(struct domain *d); @@ -84,29 +82,6 @@ void pv_set_reg(struct vcpu *v, unsigned int reg, uint64_t val); bool xpti_pcid_enabled(void); -#else /* !CONFIG_PV */ - -#include - -static inline void pv_vcpu_destroy(struct vcpu *v) {} -static inline int pv_vcpu_initialise(struct vcpu *v) { return -EOPNOTSUPP; } -static inline void pv_domain_destroy(struct domain *d) {} -static inline int pv_domain_initialise(struct domain *d) { return -EOPNOTSUPP; } - -static inline unsigned long pv_make_cr4(const struct vcpu *v) { return ~0UL; } - -static inline uint64_t pv_get_reg(struct vcpu *v, unsigned int reg) -{ - ASSERT_UNREACHABLE(); - return 0; -} -static inline void pv_set_reg(struct vcpu *v, unsigned int reg, uint64_t val) -{ - ASSERT_UNREACHABLE(); -} - -#endif /* CONFIG_PV */ - void cf_check paravirt_ctxt_switch_from(struct vcpu *v); void cf_check paravirt_ctxt_switch_to(struct vcpu *v); -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Wed Nov 12 15:35:38 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 15:35:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160063.1488291 (Exim 4.92) (envelope-from ) id 1vJCsg-0007Iy-4k; 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Conversely $(TARGET) doesn't need removing > twice. > > Fixes: cb4fcf70b2f3 ("x86emul: parallelize SIMD test code building") > Signed-off-by: Jan Beulich Acked-by: Andrew Cooper From xen-devel-bounces@lists.xenproject.org Wed Nov 12 15:38:01 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 15:38:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160077.1488301 (Exim 4.92) (envelope-from ) id 1vJCv2-0007vV-Jk; Wed, 12 Nov 2025 15:38:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160077.1488301; Wed, 12 Nov 2025 15:38:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJCv2-0007vO-F4; Wed, 12 Nov 2025 15:38:00 +0000 Received: by outflank-mailman (input) for mailman id 1160077; Wed, 12 Nov 2025 15:37:59 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJCv1-0007vC-3g for xen-devel@lists.xenproject.org; Wed, 12 Nov 2025 15:37:59 +0000 Received: from mail136-17.atl41.mandrillapp.com (mail136-17.atl41.mandrillapp.com [198.2.136.17]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 8fdb73a7-bfdd-11f0-9d18-b5c5bf9af7f9; Wed, 12 Nov 2025 16:37:57 +0100 (CET) Received: from pmta11.mandrill.prod.atl01.rsglab.com (localhost [127.0.0.1]) by mail136-17.atl41.mandrillapp.com (Mailchimp) with ESMTP id 4d66x00Lp0zPm0XnY for ; Wed, 12 Nov 2025 15:37:56 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id ca881e3520284e09af5a0d4a5edb2e05; Wed, 12 Nov 2025 15:37:55 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 8fdb73a7-bfdd-11f0-9d18-b5c5bf9af7f9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1762961876; x=1763231876; bh=J9x4ke0xLc2x3x8APrrN6CRsBsF1UIlxpCMJLxJb3Gg=; h=From:Subject:To:Cc:Message-Id:In-Reply-To:References:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=bobo2YqkI0DN8lMnubvtH1DhxBMTxBW1NrqIN7Lmp0AJPCJPs+6F0c78+p2oxCmbS 2TM+11FnYMk5iLKgSq+yFhTZ6HKKxpG+U8WmarnxO7H+sC4635ODuOiq4hl/BWT2yw mIitzn23mvugWJoW8BTvtSIpQsYdrSZXW4zYAFUXoKmzUE5UgoID5tT8oDzTu2Ud3H 5H4IIJFuaL8F5SV5x5ln1sHfY4DRKLk8HAhAgOmFX8YC/fmfl+QKFeDF/RSVDh6mXT XPosCKqZCOHhi08fAp+q7YXJLBKFFn8RqrDmeK6JIMVYPkQr81XqHKPqoInPsyJNUW mYvTghtoe2sPA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1762961876; x=1763222376; i=teddy.astie@vates.tech; bh=J9x4ke0xLc2x3x8APrrN6CRsBsF1UIlxpCMJLxJb3Gg=; h=From:Subject:To:Cc:Message-Id:In-Reply-To:References:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=Shcu5diDseLfdZWVYNHW0OzCuKA6bHs4szVgFdQq5vHIdxo8Gtq0enZ3W0g8+43cJ ODwph8ONPm5R+yXvZFya7gG6ne+lV6wrpkcdXx9a2Wtk91jAtBcz/99jgY/oEUzom7 y3PKVYiaAjiszWAse8A8l4TaPEwdbTsxiydjCw7gGfJogb1J0k9yibw1QfuQsA8NdJ axExwtIx7F3X7iC68muDARKne+CZlEm+70O9L5L2fKDlGM4rQ2WAXsP4+P8ukkGWHQ E+3mELp47+ZlSefKHEMu9QPo1EcJ8pwQs2qT8jwfjb0rSCLOP+8XFDnxWWwzjOce/Y Si74+KyEynDrg== From: "Teddy Astie" Subject: =?utf-8?Q?[PATCH=201/2]=20amd/iommu:=20Always=20atomically=20update=20DTE?= X-Mailer: git-send-email 2.51.2 X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1762961874465 To: xen-devel@lists.xenproject.org Cc: "Teddy Astie" , "Jan Beulich" , "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Jason Andryuk" Message-Id: In-Reply-To: References: X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.ca881e3520284e09af5a0d4a5edb2e05?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20251112:md Date: Wed, 12 Nov 2025 15:37:55 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit amd_iommu_set_root_page_table chooses between updating atomically and non-atomically depending on whether the DTE is active or not. This choice existed mostly because cx16 wasn't supposed always available until [1]. Thus we don't need to threat the non-atomic path in a special way anymore. By rearranging slightly the atomic path, we can make it cover all the cases which improves the code generation at the expense of systematically performing cmpxchg16b. Also remove unused raw64 fields of ldte, and the deprecated comment as the function actually behaves in a more usual way and can't return >0. [1] 2636fcdc15c7 "x86/iommu: check for CMPXCHG16B when enabling IOMMU" Signed-off-by: Teddy Astie --- xen/drivers/passthrough/amd/iommu_map.c | 78 ++++++++----------------- 1 file changed, 25 insertions(+), 53 deletions(-) diff --git a/xen/drivers/passthrough/amd/iommu_map.c b/xen/drivers/passthrough/amd/iommu_map.c index 320a2dc64c..e3165d93aa 100644 --- a/xen/drivers/passthrough/amd/iommu_map.c +++ b/xen/drivers/passthrough/amd/iommu_map.c @@ -154,69 +154,41 @@ static void set_iommu_ptes_present(unsigned long pt_mfn, unmap_domain_page(table); } -/* - * This function returns - * - -errno for errors, - * - 0 for a successful update, atomic when necessary - * - 1 for a successful but non-atomic update, which may need to be warned - * about by the caller. - */ int amd_iommu_set_root_page_table(struct amd_iommu_dte *dte, uint64_t root_ptr, uint16_t domain_id, uint8_t paging_mode, unsigned int flags) { bool valid = flags & SET_ROOT_VALID; - if ( dte->v && dte->tv ) - { - union { - struct amd_iommu_dte dte; - uint64_t raw64[4]; - __uint128_t raw128[2]; - } ldte = { .dte = *dte }; - __uint128_t res, old = ldte.raw128[0]; - int ret = 0; - - ldte.dte.domain_id = domain_id; - ldte.dte.pt_root = paddr_to_pfn(root_ptr); - ldte.dte.iw = true; - ldte.dte.ir = true; - ldte.dte.paging_mode = paging_mode; - ldte.dte.v = valid; - - res = cmpxchg16b(dte, &old, &ldte.raw128[0]); - - /* - * Hardware does not update the DTE behind our backs, so the - * return value should match "old". - */ - if ( res != old ) - { - printk(XENLOG_ERR - "Dom%d: unexpected DTE %016lx_%016lx (expected %016lx_%016lx)\n", - domain_id, - (uint64_t)(res >> 64), (uint64_t)res, - (uint64_t)(old >> 64), (uint64_t)old); - ret = -EILSEQ; - } + union { + struct amd_iommu_dte dte; + __uint128_t raw128[2]; + } ldte = { .dte = *dte }; + __uint128_t res, old = ldte.raw128[0]; - return ret; - } + ldte.dte.domain_id = domain_id; + ldte.dte.pt_root = paddr_to_pfn(root_ptr); + ldte.dte.iw = true; + ldte.dte.ir = true; + ldte.dte.paging_mode = paging_mode; + ldte.dte.tv = true; + ldte.dte.v = valid; + + res = cmpxchg16b(dte, &old, &ldte.raw128[0]); - if ( valid || dte->v ) + /* + * Hardware does not update the DTE behind our backs, so the + * return value should match "old". + */ + if ( res != old ) { - dte->tv = false; - dte->v = true; - smp_wmb(); + printk(XENLOG_ERR + "Dom%d: unexpected DTE %016lx_%016lx (expected %016lx_%016lx)\n", + domain_id, + (uint64_t)(res >> 64), (uint64_t)res, + (uint64_t)(old >> 64), (uint64_t)old); + return -EILSEQ; } - dte->domain_id = domain_id; - dte->pt_root = paddr_to_pfn(root_ptr); - dte->iw = true; - dte->ir = true; - dte->paging_mode = paging_mode; - smp_wmb(); - dte->tv = true; - dte->v = valid; return 0; } -- 2.51.2 -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Wed Nov 12 15:38:02 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 15:38:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160078.1488310 (Exim 4.92) (envelope-from ) id 1vJCv4-00089e-Ov; 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charset=utf-8 Content-Transfer-Encoding: 7bit When updating a DTE, amd_iommu_setup_domain_device() would check if the update had been non-atomic (i.e rc > 0) and throw a warning if such non-atomic update could be dangerous. However since commit 3fc44151d83d, rc can no longer be positive, making this branch unreachable code. No functional change intended. Signed-off-by: Teddy Astie --- xen/drivers/passthrough/amd/pci_amd_iommu.c | 18 ------------------ 1 file changed, 18 deletions(-) diff --git a/xen/drivers/passthrough/amd/pci_amd_iommu.c b/xen/drivers/passthrough/amd/pci_amd_iommu.c index 3a14770855..02eee4e658 100644 --- a/xen/drivers/passthrough/amd/pci_amd_iommu.c +++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c @@ -225,24 +225,6 @@ static int __must_check amd_iommu_setup_domain_device( spin_unlock_irqrestore(&iommu->lock, flags); return rc; } - if ( rc && - domain != pdev->domain && - /* - * By non-atomically updating the DTE's domain ID field last, - * during a short window in time TLB entries with the old domain - * ID but the new page tables may have been inserted. This could - * affect I/O of other devices using this same (old) domain ID. - * Such updating therefore is not a problem if this was the only - * device associated with the old domain ID. Diverting I/O of any - * of a dying domain's devices to the quarantine page tables is - * intended anyway. - */ - !pdev->domain->is_dying && - pdev->domain != dom_io && - (any_pdev_behind_iommu(pdev->domain, pdev, iommu) || - pdev->phantom_stride) ) - AMD_IOMMU_WARN(" %pp: reassignment may cause %pd data corruption\n", - &PCI_SBDF(pdev->seg, bus, devfn), pdev->domain); /* * Check remaining settings are still in place from an earlier call -- 2.51.2 -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Wed Nov 12 15:38:04 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 15:38:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160079.1488320 (Exim 4.92) (envelope-from ) id 1vJCv5-0008OP-Vj; Wed, 12 Nov 2025 15:38:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160079.1488320; Wed, 12 Nov 2025 15:38:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJCv5-0008OI-Sb; Wed, 12 Nov 2025 15:38:03 +0000 Received: by outflank-mailman (input) for mailman id 1160079; Wed, 12 Nov 2025 15:38:03 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJCv5-0008Gb-BG for xen-devel@lists.xenproject.org; Wed, 12 Nov 2025 15:38:03 +0000 Received: from mail136-17.atl41.mandrillapp.com (mail136-17.atl41.mandrillapp.com [198.2.136.17]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 8fbb0437-bfdd-11f0-980a-7dc792cee155; Wed, 12 Nov 2025 16:37:57 +0100 (CET) Received: from pmta11.mandrill.prod.atl01.rsglab.com (localhost [127.0.0.1]) by mail136-17.atl41.mandrillapp.com (Mailchimp) with ESMTP id 4d66wz4Zw9zPm0Pgv for ; Wed, 12 Nov 2025 15:37:55 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id e949b06b9e564745b25a47e47821002d; Wed, 12 Nov 2025 15:37:55 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 8fbb0437-bfdd-11f0-980a-7dc792cee155 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1762961875; x=1763231875; bh=bAIekkhp/BKtr62/rlriAxaCAr8fs4tufSc18XCcYVQ=; h=From:Subject:To:Cc:Message-Id:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=x/yp2Qn+qLhavL2KM547Fovgwuv9oNIK2KTgLlJLpHaPgzv2LN7czhImJ8/aQpVjR cdbItmqJ6s2tJ0Ulrtd499eon0imTy/imRbCL1z/gm9ThcQeKMApbhcgjTp04nszGq 29Bs1oR3S7ETYEyDoIiZkYinK4ANRrHaKvIXJM0Ap2sliE+21NZngFkPqOAcIr7g7M VdQZvR7F32rVWEGfMZQn3oLfs+aO+Gv0vmNeqkOpRTowzCjiOBAnWPeShcvdfGghI3 DyBZm0wKfvuVlrA7KkLi35ErTzRRBYHVQ3u4Jne21aKPQPC0T52t4R87Iud5b4vgL8 sHgv8C31pmKuw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1762961875; x=1763222375; i=teddy.astie@vates.tech; bh=bAIekkhp/BKtr62/rlriAxaCAr8fs4tufSc18XCcYVQ=; h=From:Subject:To:Cc:Message-Id:Feedback-ID:Date:MIME-Version: Content-Type:Content-Transfer-Encoding:CC:Date:Subject:From; b=shzVzP9NaOuH2XW3KVE6PaRxv5Fc35UcPSQCewPHg2TK2AAzKw4L5DTnERqv081nH quPiHRpcAa7Z08fLp9ItY5Yq5fZ9MDDjNix5k7a/xRXrlQFsjP/3gsiqbrN8EB/hXy UayVtITSPkh5MzpTkHLZ8R/8kfy6Ss1Qmg2buwIg01o4x8BNc6q44La3WZqz2IFZ6i +Wa1DXUhW7NrpKmTTHg6colNJ+WpPDuuvJDW3vSu26k6ZQFV+riqsGKz08pGMbeoRu gcwxuPmMD5iXALMayo7/61sAEBdQDWhU8obPoVuexSt+WiBWbbxq8EbJvKL070VxbE 1OKjXbAtyIjig== From: "Teddy Astie" Subject: =?utf-8?Q?[PATCH=200/2]=20AMD-Vi=20cleanups=20around=20domain=20device=20setup?= X-Mailer: git-send-email 2.51.2 X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1762961874207 To: xen-devel@lists.xenproject.org Cc: "Teddy Astie" , "Jan Beulich" , "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Jason Andryuk" Message-Id: X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.e949b06b9e564745b25a47e47821002d?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20251112:md Date: Wed, 12 Nov 2025 15:37:55 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Various simplifications (redundant logic merging and dead code removal) with no expected impact on effective behavior. Teddy Astie (2): amd/iommu: Always atomically update DTE amd/iommu: Remove dead non-atomic update checking xen/drivers/passthrough/amd/iommu_map.c | 78 +++++++-------------- xen/drivers/passthrough/amd/pci_amd_iommu.c | 18 ----- 2 files changed, 25 insertions(+), 71 deletions(-) -- 2.51.2 -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Wed Nov 12 15:38:27 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 15:38:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160101.1488330 (Exim 4.92) (envelope-from ) id 1vJCvT-0000nK-7S; Wed, 12 Nov 2025 15:38:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160101.1488330; Wed, 12 Nov 2025 15:38:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJCvT-0000nD-3p; Wed, 12 Nov 2025 15:38:27 +0000 Received: by outflank-mailman (input) for mailman id 1160101; Wed, 12 Nov 2025 15:38:25 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJCvR-0008Gb-Sp for xen-devel@lists.xenproject.org; Wed, 12 Nov 2025 15:38:25 +0000 Received: from mail-ej1-x635.google.com (mail-ej1-x635.google.com [2a00:1450:4864:20::635]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 9b17f5bf-bfdd-11f0-980a-7dc792cee155; Wed, 12 Nov 2025 16:38:16 +0100 (CET) Received: by mail-ej1-x635.google.com with SMTP id a640c23a62f3a-b727f330dd2so159636066b.2 for ; Wed, 12 Nov 2025 07:38:16 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Therefore it is especially wasteful for it to consume more space than really needed. Use the smallest possible type. Further the array having all fields set to -1 is actually useless. Nothing relies on it, and core_parking_remove() doesn't restore the sentinel for vacated slots. Drop the initializers, moving the array to .bss. Finally take the opportunity and update an adjacent variable's type, where a fixed-width type was pretty clearly inappropriate to use. Signed-off-by: Jan Beulich --- I assume there is a reason this is acting (mostly) as a LIFO. Else a simple cpumask_t would suffice. An alternative would be to use the new BRK allocator, at least for NR_CPUS above a certain threshold. --- a/xen/common/core_parking.c +++ b/xen/common/core_parking.c @@ -27,8 +27,16 @@ #define CORE_PARKING_DECREMENT 2 static DEFINE_SPINLOCK(accounting_lock); -static uint32_t cur_idle_nums; -static unsigned int core_parking_cpunum[NR_CPUS] = {[0 ... NR_CPUS-1] = -1}; +static unsigned int cur_idle_nums; +static +#if CONFIG_NR_CPUS <= (1U << BITS_PER_BYTE) + unsigned char +#elif CONFIG_NR_CPUS <= (1U << (BITS_PER_BYTE * __SIZEOF_SHORT__)) + unsigned short +#else + unsigned int +#endif + core_parking_cpunum[CONFIG_NR_CPUS]; struct cp_policy { char name[30]; From xen-devel-bounces@lists.xenproject.org Wed Nov 12 15:39:06 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 15:39:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160119.1488339 (Exim 4.92) (envelope-from ) id 1vJCw5-0001Sp-EW; Wed, 12 Nov 2025 15:39:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160119.1488339; Wed, 12 Nov 2025 15:39:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJCw5-0001Si-Bn; Wed, 12 Nov 2025 15:39:05 +0000 Received: by outflank-mailman (input) for mailman id 1160119; Wed, 12 Nov 2025 15:39:04 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJCw4-0007vC-Iz for xen-devel@lists.xenproject.org; Wed, 12 Nov 2025 15:39:04 +0000 Received: from mail-ej1-x632.google.com (mail-ej1-x632.google.com [2a00:1450:4864:20::632]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id b7a894ec-bfdd-11f0-9d18-b5c5bf9af7f9; Wed, 12 Nov 2025 16:39:04 +0100 (CET) Received: by mail-ej1-x632.google.com with SMTP id a640c23a62f3a-b71397df721so157016166b.1 for ; Wed, 12 Nov 2025 07:39:03 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Signed-off-by: Jan Beulich --- a/xen/arch/x86/Rules.mk +++ b/xen/arch/x86/Rules.mk @@ -7,4 +7,4 @@ else object_label_flags = '-D__OBJECT_LABEL__=$(subst /,$$,$(subst -,_,$@))' endif c_flags += $(object_label_flags) $(CFLAGS_stack_boundary) -a_flags += $(object_label_flags) $(CFLAGS_stack_boundary) +a_flags += $(object_label_flags) From xen-devel-bounces@lists.xenproject.org Wed Nov 12 15:43:11 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 15:43:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160140.1488351 (Exim 4.92) (envelope-from ) id 1vJCzx-0003aA-2a; Wed, 12 Nov 2025 15:43:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160140.1488351; Wed, 12 Nov 2025 15:43:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJCzw-0003a3-V2; Wed, 12 Nov 2025 15:43:04 +0000 Received: by outflank-mailman (input) for mailman id 1160140; Wed, 12 Nov 2025 15:43:03 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJCzv-0003Zv-8s for xen-devel@lists.xenproject.org; Wed, 12 Nov 2025 15:43:03 +0000 Received: from mail-ed1-x52a.google.com (mail-ed1-x52a.google.com [2a00:1450:4864:20::52a]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 45ba9896-bfde-11f0-9d18-b5c5bf9af7f9; Wed, 12 Nov 2025 16:43:02 +0100 (CET) Received: by mail-ed1-x52a.google.com with SMTP id 4fb4d7f45d1cf-640bd9039fbso1796357a12.2 for ; Wed, 12 Nov 2025 07:43:02 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Signed-off-by: Jan Beulich --- a/xen/arch/x86/irq.c +++ b/xen/arch/x86/irq.c @@ -450,12 +450,12 @@ int __init init_irq_data(void) #ifdef CONFIG_PV /* Never allocate the Linux/BSD fast-trap vector. */ - set_bit(LEGACY_SYSCALL_VECTOR, used_vectors); + __set_bit(LEGACY_SYSCALL_VECTOR, used_vectors); #endif #ifdef CONFIG_PV32 /* Never allocate the hypercall vector. */ - set_bit(HYPERCALL_VECTOR, used_vectors); + __set_bit(HYPERCALL_VECTOR, used_vectors); #endif /* From xen-devel-bounces@lists.xenproject.org Wed Nov 12 15:45:11 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 15:45:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160151.1488360 (Exim 4.92) (envelope-from ) id 1vJD1y-00047h-D5; Wed, 12 Nov 2025 15:45:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160151.1488360; Wed, 12 Nov 2025 15:45:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJD1y-00047a-9s; Wed, 12 Nov 2025 15:45:10 +0000 Received: by outflank-mailman (input) for mailman id 1160151; Wed, 12 Nov 2025 15:45:08 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJD1w-00047S-7S for xen-devel@lists.xenproject.org; Wed, 12 Nov 2025 15:45:08 +0000 Received: from mail-ej1-x633.google.com (mail-ej1-x633.google.com [2a00:1450:4864:20::633]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 9061e42e-bfde-11f0-9d18-b5c5bf9af7f9; Wed, 12 Nov 2025 16:45:07 +0100 (CET) Received: by mail-ej1-x633.google.com with SMTP id a640c23a62f3a-b5b823b4f3dso145226866b.3 for ; Wed, 12 Nov 2025 07:45:07 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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No change in practice, due to the present aliasing. Signed-off-by: Jan Beulich --- While doing the HPET work I had to fiddle with this, even if in the end no vector below FIRST_DYNAMIC_VECTOR is being used there (for now at least). --- a/xen/arch/x86/msi.c +++ b/xen/arch/x86/msi.c @@ -158,7 +158,7 @@ void msi_compose_msg(unsigned vector, co { memset(msg, 0, sizeof(*msg)); - if ( vector < FIRST_DYNAMIC_VECTOR ) + if ( vector < FIRST_IRQ_VECTOR ) return; if ( cpu_mask ) From xen-devel-bounces@lists.xenproject.org Wed Nov 12 15:47:36 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 15:47:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160162.1488370 (Exim 4.92) (envelope-from ) id 1vJD4I-0004fr-PB; Wed, 12 Nov 2025 15:47:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160162.1488370; Wed, 12 Nov 2025 15:47:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJD4I-0004fk-MZ; Wed, 12 Nov 2025 15:47:34 +0000 Received: by outflank-mailman (input) for mailman id 1160162; Wed, 12 Nov 2025 15:47:34 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJD4I-0004fe-6U for xen-devel@lists.xenproject.org; Wed, 12 Nov 2025 15:47:34 +0000 Received: from mail-ej1-x634.google.com (mail-ej1-x634.google.com [2a00:1450:4864:20::634]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id e7476ff6-bfde-11f0-9d18-b5c5bf9af7f9; Wed, 12 Nov 2025 16:47:33 +0100 (CET) Received: by mail-ej1-x634.google.com with SMTP id a640c23a62f3a-b7277324054so142448666b.0 for ; Wed, 12 Nov 2025 07:47:33 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 12 Nov 2025 07:47:32 -0800 (PST) Message-ID: <3dce4f28-558b-495c-ac45-0f699da82458@suse.com> Date: Wed, 12 Nov 2025 16:47:31 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Penny Zheng From: Jan Beulich Subject: [PATCH] x86/mm: split struct sh_dirty_vram and make results private Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit The types are local to the shadow and HAP subsystems respectively, and HAP has no need for the shadow-specific fields (i.e. it can get away with smaller allocations). In struct hvm_domain it therefore suffices to have a union of two (generally opaque) pointers. Signed-off-by: Jan Beulich --- a/xen/arch/x86/include/asm/hvm/domain.h +++ b/xen/arch/x86/include/asm/hvm/domain.h @@ -95,7 +95,10 @@ struct hvm_domain { struct list_head pinned_cacheattr_ranges; /* VRAM dirty support. Protect with the domain paging lock. */ - struct sh_dirty_vram *dirty_vram; + union { + struct sh_dirty_vram *sh; + struct hap_dirty_vram *hap; + } dirty_vram; /* If one of vcpus of this domain is in no_fill_mode or * mtrr/pat between vcpus is not the same, set is_in_uc_mode --- a/xen/arch/x86/include/asm/paging.h +++ b/xen/arch/x86/include/asm/paging.h @@ -133,19 +133,6 @@ struct paging_mode { (DIV_ROUND_UP(PADDR_BITS - PAGE_SHIFT - (PAGE_SHIFT + 3), \ PAGE_SHIFT - ilog2(sizeof(mfn_t))) + 1) -#ifdef CONFIG_HVM -/* VRAM dirty tracking support */ -struct sh_dirty_vram { - unsigned long begin_pfn; - unsigned long end_pfn; -#ifdef CONFIG_SHADOW_PAGING - paddr_t *sl1ma; - uint8_t *dirty_bitmap; - s_time_t last_dirty; -#endif -}; -#endif - #if PG_log_dirty /* log dirty initialization */ --- a/xen/arch/x86/mm/hap/hap.c +++ b/xen/arch/x86/mm/hap/hap.c @@ -36,6 +36,11 @@ /* HAP VRAM TRACKING SUPPORT */ /************************************************/ +struct hap_dirty_vram { + unsigned long begin_pfn; + unsigned long end_pfn; +}; + /* * hap_track_dirty_vram() * Create the domain's dv_dirty_vram struct on demand. @@ -52,7 +57,7 @@ int hap_track_dirty_vram(struct domain * XEN_GUEST_HANDLE(void) guest_dirty_bitmap) { long rc = 0; - struct sh_dirty_vram *dirty_vram; + struct hap_dirty_vram *dirty_vram; uint8_t *dirty_bitmap = NULL; if ( nr_frames ) @@ -66,17 +71,17 @@ int hap_track_dirty_vram(struct domain * paging_lock(d); - dirty_vram = d->arch.hvm.dirty_vram; + dirty_vram = d->arch.hvm.dirty_vram.hap; if ( !dirty_vram ) { rc = -ENOMEM; - if ( (dirty_vram = xzalloc(struct sh_dirty_vram)) == NULL ) + if ( (dirty_vram = xzalloc(struct hap_dirty_vram)) == NULL ) { paging_unlock(d); goto out; } - d->arch.hvm.dirty_vram = dirty_vram; + d->arch.hvm.dirty_vram.hap = dirty_vram; } if ( begin_pfn != dirty_vram->begin_pfn || @@ -132,7 +137,7 @@ int hap_track_dirty_vram(struct domain * { paging_lock(d); - dirty_vram = d->arch.hvm.dirty_vram; + dirty_vram = d->arch.hvm.dirty_vram.hap; if ( dirty_vram ) { /* @@ -142,7 +147,7 @@ int hap_track_dirty_vram(struct domain * begin_pfn = dirty_vram->begin_pfn; nr_frames = dirty_vram->end_pfn - dirty_vram->begin_pfn; xfree(dirty_vram); - d->arch.hvm.dirty_vram = NULL; + d->arch.hvm.dirty_vram.hap = NULL; } paging_unlock(d); @@ -630,7 +635,7 @@ void hap_teardown(struct domain *d, bool d->arch.paging.mode &= ~PG_log_dirty; - XFREE(d->arch.hvm.dirty_vram); + XFREE(d->arch.hvm.dirty_vram.hap); out: paging_unlock(d); --- a/xen/arch/x86/mm/shadow/common.c +++ b/xen/arch/x86/mm/shadow/common.c @@ -2886,11 +2886,11 @@ void shadow_teardown(struct domain *d, b d->arch.paging.mode &= ~PG_log_dirty; #ifdef CONFIG_HVM - if ( is_hvm_domain(d) && d->arch.hvm.dirty_vram ) + if ( is_hvm_domain(d) && d->arch.hvm.dirty_vram.sh ) { - xfree(d->arch.hvm.dirty_vram->sl1ma); - xfree(d->arch.hvm.dirty_vram->dirty_bitmap); - XFREE(d->arch.hvm.dirty_vram); + xfree(d->arch.hvm.dirty_vram.sh->sl1ma); + xfree(d->arch.hvm.dirty_vram.sh->dirty_bitmap); + XFREE(d->arch.hvm.dirty_vram.sh); } #endif --- a/xen/arch/x86/mm/shadow/hvm.c +++ b/xen/arch/x86/mm/shadow/hvm.c @@ -1033,7 +1033,7 @@ int shadow_track_dirty_vram(struct domai p2m_lock(p2m_get_hostp2m(d)); paging_lock(d); - dirty_vram = d->arch.hvm.dirty_vram; + dirty_vram = d->arch.hvm.dirty_vram.sh; if ( dirty_vram && (!nr_frames || ( begin_pfn != dirty_vram->begin_pfn @@ -1043,8 +1043,8 @@ int shadow_track_dirty_vram(struct domai gdprintk(XENLOG_INFO, "stopping tracking VRAM %lx - %lx\n", dirty_vram->begin_pfn, dirty_vram->end_pfn); xfree(dirty_vram->sl1ma); xfree(dirty_vram->dirty_bitmap); - xfree(dirty_vram); - dirty_vram = d->arch.hvm.dirty_vram = NULL; + XFREE(dirty_vram); + d->arch.hvm.dirty_vram.sh = NULL; } if ( !nr_frames ) @@ -1075,7 +1075,7 @@ int shadow_track_dirty_vram(struct domai goto out; dirty_vram->begin_pfn = begin_pfn; dirty_vram->end_pfn = end_pfn; - d->arch.hvm.dirty_vram = dirty_vram; + d->arch.hvm.dirty_vram.sh = dirty_vram; if ( (dirty_vram->sl1ma = xmalloc_array(paddr_t, nr_frames)) == NULL ) goto out_dirty_vram; @@ -1202,8 +1202,8 @@ int shadow_track_dirty_vram(struct domai out_sl1ma: xfree(dirty_vram->sl1ma); out_dirty_vram: - xfree(dirty_vram); - dirty_vram = d->arch.hvm.dirty_vram = NULL; + XFREE(dirty_vram); + d->arch.hvm.dirty_vram.sh = NULL; out: paging_unlock(d); @@ -1226,7 +1226,7 @@ void shadow_vram_get_mfn(mfn_t mfn, unsi const struct domain *d) { unsigned long gfn; - struct sh_dirty_vram *dirty_vram = d->arch.hvm.dirty_vram; + struct sh_dirty_vram *dirty_vram = d->arch.hvm.dirty_vram.sh; ASSERT(is_hvm_domain(d)); @@ -1256,7 +1256,7 @@ void shadow_vram_put_mfn(mfn_t mfn, unsi const struct domain *d) { unsigned long gfn; - struct sh_dirty_vram *dirty_vram = d->arch.hvm.dirty_vram; + struct sh_dirty_vram *dirty_vram = d->arch.hvm.dirty_vram.sh; ASSERT(is_hvm_domain(d)); --- a/xen/arch/x86/mm/shadow/multi.c +++ b/xen/arch/x86/mm/shadow/multi.c @@ -608,7 +608,7 @@ _sh_propagate(struct vcpu *v, #ifdef CONFIG_HVM if ( unlikely(level == 1) && is_hvm_domain(d) ) { - struct sh_dirty_vram *dirty_vram = d->arch.hvm.dirty_vram; + struct sh_dirty_vram *dirty_vram = d->arch.hvm.dirty_vram.sh; if ( dirty_vram && dirty_vram->last_dirty == -1 && gfn_x(target_gfn) >= dirty_vram->begin_pfn && --- a/xen/arch/x86/mm/shadow/private.h +++ b/xen/arch/x86/mm/shadow/private.h @@ -424,7 +424,15 @@ mfn_t sh_make_monitor_table(const struct void sh_destroy_monitor_table(const struct vcpu *v, mfn_t mmfn, unsigned int shadow_levels); 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Nov 2025 15:51:21.8846 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: aedf1aa3-461b-43fe-7683-08de220353cf X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF000397B4.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6468 On 11/10/25 10:37, Frediano Ziglio wrote: > From: Frediano Ziglio > > For xen.gz file we strip all symbols and have an additional > xen-syms.efi file Can you add xen/xen-syms.efi to .gitignore please? Or perhaps change the existing xen/xen-syms.map to xen/xen-syms.* ? From xen-devel-bounces@lists.xenproject.org Wed Nov 12 15:52:05 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 15:52:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160182.1488391 (Exim 4.92) (envelope-from ) id 1vJD8f-0006sd-Lm; Wed, 12 Nov 2025 15:52:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160182.1488391; Wed, 12 Nov 2025 15:52:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJD8f-0006sT-Hk; Wed, 12 Nov 2025 15:52:05 +0000 Received: by outflank-mailman (input) for mailman id 1160182; Wed, 12 Nov 2025 15:52:04 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJD8e-0006dK-5b for xen-devel@lists.xenproject.org; Wed, 12 Nov 2025 15:52:04 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 87d22629-bfdf-11f0-9d18-b5c5bf9af7f9; Wed, 12 Nov 2025 16:52:03 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3FE902B; Wed, 12 Nov 2025 07:51:54 -0800 (PST) Received: from [10.57.40.63] (unknown [10.57.40.63]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id ACC473F5A1; Wed, 12 Nov 2025 07:52:00 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 87d22629-bfdf-11f0-9d18-b5c5bf9af7f9 Message-ID: Date: Wed, 12 Nov 2025 15:51:59 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/3] arm/mpu: Implement setup_mm for MPU systems Content-Language: en-GB To: "Orzel, Michal" , xen-devel@lists.xenproject.org Cc: Luca.Fancellu@arm.com, Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk References: <20251111101601.4171120-1-harry.ramsey@arm.com> <20251111101601.4171120-2-harry.ramsey@arm.com> <80c02055-2687-4e24-8de0-8fb4dfe2af02@amd.com> From: Harry Ramsey In-Reply-To: <80c02055-2687-4e24-8de0-8fb4dfe2af02@amd.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 12/11/2025 12:40, Orzel, Michal wrote: > > On 11/11/2025 11:15, Harry Ramsey wrote: >> Implement `setup_mm` for MPU systems. This variant does not require >> setting up a direct map. >> >> To reduce code duplication the common initalisation code for both MPU >> and MMU Arm64 configurations is refactored into `setup_mm`. Platform-specific >> setup steps are now handled by a new helper function `setup_mm_helper`. >> >> Signed-off-by: Harry Ramsey >> --- >> Changes in v2: >> - Improve clarity with regards to MPU setup in setup_mm >> --- >> xen/arch/arm/arm64/mmu/mm.c | 26 +------------------ >> xen/arch/arm/include/asm/mm.h | 2 ++ >> xen/arch/arm/mm.c | 48 +++++++++++++++++++++++++++++++++++ >> xen/arch/arm/mpu/mm.c | 30 ++++++++++++++++++++-- >> 4 files changed, 79 insertions(+), 27 deletions(-) >> >> diff --git a/xen/arch/arm/arm64/mmu/mm.c b/xen/arch/arm/arm64/mmu/mm.c >> index 3e64be6ae6..70b53be032 100644 >> --- a/xen/arch/arm/arm64/mmu/mm.c >> +++ b/xen/arch/arm/arm64/mmu/mm.c >> @@ -4,8 +4,6 @@ >> #include >> #include >> #include >> -#include >> -#include >> >> #include >> >> @@ -240,33 +238,18 @@ static void __init setup_directmap_mappings(unsigned long base_mfn, >> panic("Unable to setup the directmap mappings.\n"); >> } >> >> -void __init setup_mm(void) >> +void __init setup_mm_helper(void) >> { >> const struct membanks *banks = bootinfo_get_mem(); >> paddr_t ram_start = INVALID_PADDR; >> paddr_t ram_end = 0; >> - paddr_t ram_size = 0; >> unsigned int i; >> >> - init_pdx(); >> - >> - /* >> - * We need some memory to allocate the page-tables used for the directmap >> - * mappings. But some regions may contain memory already allocated >> - * for other uses (e.g. modules, reserved-memory...). >> - * >> - * For simplicity, add all the free regions in the boot allocator. >> - */ >> - populate_boot_allocator(); >> - >> - total_pages = 0; >> - >> for ( i = 0; i < banks->nr_banks; i++ ) >> { >> const struct membank *bank = &banks->bank[i]; >> paddr_t bank_end = bank->start + bank->size; >> >> - ram_size = ram_size + bank->size; >> ram_start = min(ram_start, bank->start); >> ram_end = max(ram_end, bank_end); >> >> @@ -274,16 +257,9 @@ void __init setup_mm(void) >> PFN_DOWN(bank->size)); >> } >> >> - total_pages += ram_size >> PAGE_SHIFT; >> - >> directmap_virt_end = XENHEAP_VIRT_START + ram_end - ram_start; >> directmap_mfn_start = maddr_to_mfn(ram_start); >> directmap_mfn_end = maddr_to_mfn(ram_end); >> - >> - setup_frametable_mappings(ram_start, ram_end); >> - >> - init_staticmem_pages(); >> - init_sharedmem_pages(); >> } >> >> /* >> diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h >> index 7a93dad2ed..f702f4a0d6 100644 >> --- a/xen/arch/arm/include/asm/mm.h >> +++ b/xen/arch/arm/include/asm/mm.h >> @@ -202,6 +202,8 @@ extern void remove_early_mappings(void); >> extern int prepare_secondary_mm(int cpu); >> /* Map a frame table to cover physical addresses ps through pe */ >> extern void setup_frametable_mappings(paddr_t ps, paddr_t pe); >> +/* Helper function to setup memory management */ >> +void setup_mm_helper(void); >> /* map a physical range in virtual memory */ >> void __iomem *ioremap_attr(paddr_t start, size_t len, unsigned int attributes); >> >> diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c >> index 3b05b46ee0..c1208de26c 100644 >> --- a/xen/arch/arm/mm.c >> +++ b/xen/arch/arm/mm.c >> @@ -12,8 +12,12 @@ >> #include >> #include >> #include >> +#include >> +#include >> #include >> >> +#include >> + >> #include >> >> #include >> @@ -24,6 +28,50 @@ >> >> unsigned long frametable_base_pdx __read_mostly; >> >> +#if defined(CONFIG_ARM_64) || defined(CONFIG_MPU) >> +void __init setup_mm(void) >> +{ >> + const struct membanks *banks = bootinfo_get_mem(); >> + paddr_t ram_start = INVALID_PADDR; >> + paddr_t ram_end = 0; >> + paddr_t ram_size = 0; >> + unsigned int i; >> + >> + init_pdx(); >> + >> + for ( i = 0; i < banks->nr_banks; i++ ) >> + { >> + const struct membank *bank = &banks->bank[i]; >> + paddr_t bank_end = bank->start + bank->size; >> + >> + ram_size = ram_size + bank->size; >> + ram_start = min(ram_start, bank->start); >> + ram_end = max(ram_end, bank_end); >> + } >> + >> + total_pages = ram_size >> PAGE_SHIFT; >> + >> + /* >> + * On MMU systems we need some memory to allocate the page-tables used for >> + * the directmap mappings. But some regions may contain memory already >> + * allocated for other uses (e.g. modules, reserved-memory...). >> + * >> + * On MPU systems we need to pre-reserve regions that were allocated for >> + * other uses (e.g. modules, reserved-memory...). > I'm not sure I understand this part of the comment with regards to > populate_boot_allocator(). Could you please explain? I think I should remove the MPU section and move this comment into patch 3 as it is confusing without the additional context of reference counting. During Xen initialization, the MPU assigns a refcount of 1 to pre-allocated regions in head.S prepare_xen_region. Unlike an MMU, an MPU has no virtual memory, so we must prevent these regions from being freed or remapped to non-preallocated areas. > > ~Michal > ~Harry From xen-devel-bounces@lists.xenproject.org Wed Nov 12 15:52:52 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 15:52:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160200.1488399 (Exim 4.92) (envelope-from ) id 1vJD9O-0007eK-SW; Wed, 12 Nov 2025 15:52:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160200.1488399; Wed, 12 Nov 2025 15:52:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJD9O-0007eD-PN; Wed, 12 Nov 2025 15:52:50 +0000 Received: by outflank-mailman (input) for mailman id 1160200; Wed, 12 Nov 2025 15:52:49 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJD9N-0006dK-N4 for xen-devel@lists.xenproject.org; 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charset=utf-8 Content-Transfer-Encoding: quoted-printable Le 12/11/2025 =C3=A0 16:25, Alejandro Vallejo a =C3=A9crit=C2=A0: > A couple of branches rely on PV being the "else" branch, making it > be compiled even when PV support is not itself compiled-in. > > Add a explicit conditional on CONFIG_PV in those cases to remove the > code in !CONFIG_PV builds. > > Not a functional change. > > Signed-off-by: Alejandro Vallejo > --- > xen/arch/x86/cpuid.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c > index b63a82dd38..2e24c84708 100644 > --- a/xen/arch/x86/cpuid.c > +++ b/xen/arch/x86/cpuid.c > @@ -297,7 +297,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, > if ( v->arch.hvm.guest_cr[4] & X86_CR4_OSXSAVE ) > res->c |=3D cpufeat_mask(X86_FEATURE_OSXSAVE); > } > - else /* PV domain */ > + else if ( IS_ENABLED(CONFIG_PV) ) > { > regs =3D guest_cpu_user_regs(); > > @@ -509,7 +509,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, > if ( !hap_enabled(d) && !hvm_pae_enabled(v) ) > res->d &=3D ~cpufeat_mask(X86_FEATURE_PSE36); > } > - else /* PV domain */ > + else if ( IS_ENABLED(CONFIG_PV) ) > { > /* > * MTRR used to unconditionally leak into PV guests. They = cannot I don't like having IS_ENABLED(CONFIG_PV) here, but I don't think of a better solution as using e.g is_pv_domain isn't really better as it would make us evaluate d->options twice. That said, Reviewed-by: Teddy Astie Teddy -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Wed Nov 12 15:53:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 15:53:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160208.1488411 (Exim 4.92) (envelope-from ) id 1vJDA4-0008Jy-65; Wed, 12 Nov 2025 15:53:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160208.1488411; Wed, 12 Nov 2025 15:53:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJDA4-0008Jr-2D; Wed, 12 Nov 2025 15:53:32 +0000 Received: by outflank-mailman (input) for mailman id 1160208; Wed, 12 Nov 2025 15:53:30 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJDA2-0008IB-17 for xen-devel@lists.xenproject.org; Wed, 12 Nov 2025 15:53:30 +0000 Received: from mail-ej1-x62c.google.com (mail-ej1-x62c.google.com [2a00:1450:4864:20::62c]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id bb58f16c-bfdf-11f0-9d18-b5c5bf9af7f9; Wed, 12 Nov 2025 16:53:29 +0100 (CET) Received: by mail-ej1-x62c.google.com with SMTP id a640c23a62f3a-b72cbc24637so214745166b.0 for ; Wed, 12 Nov 2025 07:53:28 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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While the pointer typically is allocated once for a CPU and then only read (i.e. wants to be marked read-mostly), the same isn't necessarily true for the array case. There things depend on how the variable is actually used. cpu_core_mask and cpu_sibling_mask (which all architectures have inherited from x86, which in turn is possibly wrong) are altered only as CPUs are brought up or down, so may remain uniformly read-mostly. Other (x86-only) instances want to change, to avoid disturbing adjacent read-mostly data. While doing the x86 adjustment, also do one in the opposite direction, i.e. where there was no read-mostly annotation when it is applicable in the "pointer" case. Signed-off-by: Jan Beulich --- Really in the pointer case it would be nice if the allocations could then also come from "read-mostly" space. --- a/xen/arch/x86/genapic/x2apic.c +++ b/xen/arch/x86/genapic/x2apic.c @@ -20,7 +20,7 @@ static DEFINE_PER_CPU_READ_MOSTLY(u32, cpu_2_logical_apicid); static DEFINE_PER_CPU_READ_MOSTLY(cpumask_t *, cluster_cpus); static cpumask_t *cluster_cpus_spare; -static DEFINE_PER_CPU(cpumask_var_t, scratch_mask); +static DEFINE_PER_CPU_CPUMASK_VAR(scratch_mask); static inline u32 x2apic_cluster(unsigned int cpu) { --- a/xen/arch/x86/smpboot.c +++ b/xen/arch/x86/smpboot.c @@ -52,13 +52,13 @@ DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t /* representing HT and core siblings of each logical CPU */ DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_core_mask); -DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, scratch_cpumask); +DEFINE_PER_CPU_CPUMASK_VAR(scratch_cpumask); static cpumask_t scratch_cpu0mask; -DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, hpet_scratch_cpumask); +DEFINE_PER_CPU_CPUMASK_VAR(hpet_scratch_cpumask); static cpumask_t hpet_scratch_cpu0mask; -DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, send_ipi_cpumask); +DEFINE_PER_CPU_CPUMASK_VAR(send_ipi_cpumask); static cpumask_t send_ipi_cpu0mask; DEFINE_PER_CPU_READ_MOSTLY(struct stubs, stubs); --- a/xen/include/xen/cpumask.h +++ b/xen/include/xen/cpumask.h @@ -311,6 +311,9 @@ extern const cpumask_t cpumask_all; typedef cpumask_t *cpumask_var_t; +#define DEFINE_PER_CPU_CPUMASK_VAR(sym) \ + DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, sym) + static inline bool alloc_cpumask_var(cpumask_var_t *mask) { *mask = _xmalloc(nr_cpumask_bits / 8, sizeof(long)); @@ -349,6 +352,9 @@ static inline void free_cpumask_var(cpum #else typedef cpumask_t cpumask_var_t[1]; +#define DEFINE_PER_CPU_CPUMASK_VAR(sym) \ + DEFINE_PER_CPU(cpumask_var_t, sym) + static inline bool alloc_cpumask_var(cpumask_var_t *mask) { return true; From xen-devel-bounces@lists.xenproject.org Wed Nov 12 15:56:24 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 15:56:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160216.1488421 (Exim 4.92) (envelope-from ) id 1vJDCp-0000WP-JC; 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The only two cases with link-time failures are > fallback else branches that can just as well be adjusted with explicit > IS_ENABLED(CONFIG_PV). HVM has no equivalent stubs and there's no reason > to keep the asymmetry. > > No functional change. > > Signed-off-by: Alejandro Vallejo > --- > I'd rather remove the "rc = -EOPNOTSUPP" branch altogether, or replace > it with ASSERT_UNREACHABLE(), but I kept it here to preserve prior behaviour. > > Thoughts? > > --- > xen/arch/x86/domain.c | 10 ++++++---- > xen/arch/x86/include/asm/pv/domain.h | 25 ------------------------- > 2 files changed, 6 insertions(+), 29 deletions(-) > > diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c > index 19fd86ce88..0977d9323d 100644 > --- a/xen/arch/x86/domain.c > +++ b/xen/arch/x86/domain.c > @@ -571,15 +571,17 @@ int arch_vcpu_create(struct vcpu *v) > > if ( is_hvm_domain(d) ) > rc = hvm_vcpu_initialise(v); > - else if ( !is_idle_domain(d) ) > - rc = pv_vcpu_initialise(v); > - else > + else if ( is_idle_domain(d) ) > { The is_idle_domain() wants to go first here, i think. [1] https://patchwork.kernel.org/comment/26646246/ > /* Idle domain */ > v->arch.cr3 = __pa(idle_pg_table); > rc = 0; > v->arch.msrs = ZERO_BLOCK_PTR; /* Catch stray misuses */ > } > + else if ( IS_ENABLED(CONFIG_PV) ) > + rc = pv_vcpu_initialise(v); > + else > + rc = -EOPNOTSUPP; > > if ( rc ) > goto fail; Actually, if you are here and have time and inspiration :) - if ( is_idle_domain(d) ) staff can be consolidated at the beginning of arch_vcpu_create() which will make it much more readable and simple. - mapcache_vcpu_init() is PV only (->pv_vcpu_initialise()?) > @@ -614,7 +616,7 @@ void arch_vcpu_destroy(struct vcpu *v) > > if ( is_hvm_vcpu(v) ) > hvm_vcpu_destroy(v); > - else > + else if ( IS_ENABLED(CONFIG_PV) ) > pv_vcpu_destroy(v); > } > -- Best regards, -grygorii From xen-devel-bounces@lists.xenproject.org Wed Nov 12 15:57:38 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 15:57:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160230.1488429 (Exim 4.92) (envelope-from ) id 1vJDDx-00015T-W4; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Nov 2025 15:57:25.1213 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9cc0e500-779e-4991-a0a4-08de22042c4f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00003F67.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB9038 Hi, On 11/11/2025 22:05, Oleksandr Tyshchenko wrote: > Introduce a new Arm-specific DOMU_TRAP_UNMAP parameter that allows > configuring how Xen handles domain accesses to unmapped address ranges. > This parameter corresponds to the "trap-unmapped-accesses" device tree > property. > > Signed-off-by: Oleksandr Tyshchenko Reviewed-by: Ayan Kumar Halder - Ayan From xen-devel-bounces@lists.xenproject.org Wed Nov 12 16:01:14 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 16:01:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160248.1488439 (Exim 4.92) (envelope-from ) id 1vJDHL-0003B6-D6; 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Wed, 12 Nov 2025 08:02:41 -0800 (PST) Message-ID: <3f73f2a0-1c91-44de-b87b-fac35447af5b@suse.com> Date: Wed, 12 Nov 2025 17:02:39 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] x86: Remove stubs from asm/pv/domain.h To: Grygorii Strashko Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , Alejandro Vallejo , xen-devel@lists.xenproject.org References: <20251112152235.224001-1-alejandro.garciavallejo@amd.com> <20251112152235.224001-3-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12.11.2025 16:56, Grygorii Strashko wrote: > On 12.11.25 17:22, Alejandro Vallejo wrote: >> --- a/xen/arch/x86/domain.c >> +++ b/xen/arch/x86/domain.c >> @@ -571,15 +571,17 @@ int arch_vcpu_create(struct vcpu *v) >> >> if ( is_hvm_domain(d) ) >> rc = hvm_vcpu_initialise(v); >> - else if ( !is_idle_domain(d) ) >> - rc = pv_vcpu_initialise(v); >> - else >> + else if ( is_idle_domain(d) ) >> { > > The is_idle_domain() wants to go first here, i think. > [1] https://patchwork.kernel.org/comment/26646246/ It's a "positive" check (no !) here, so no, imo the order above is fine. >> /* Idle domain */ >> v->arch.cr3 = __pa(idle_pg_table); >> rc = 0; >> v->arch.msrs = ZERO_BLOCK_PTR; /* Catch stray misuses */ >> } >> + else if ( IS_ENABLED(CONFIG_PV) ) >> + rc = pv_vcpu_initialise(v); >> + else >> + rc = -EOPNOTSUPP; >> >> if ( rc ) >> goto fail; > > Actually, if you are here and have time and inspiration :) > - if ( is_idle_domain(d) ) staff can be consolidated at the > beginning of arch_vcpu_create() which will make it much more readable and simple. This may indeed be possible, but needs to be done with care. Iirc at least once someone already screwed up there, while trying something along these lines. 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pr=C From: Alejandro Vallejo To: CC: Alejandro Vallejo , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH 1/4] x86: Split out AMD-specific code to be executed without ucode loading Date: Wed, 12 Nov 2025 17:22:14 +0100 Message-ID: <20251112162219.226075-2-alejandro.garciavallejo@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251112162219.226075-1-alejandro.garciavallejo@amd.com> References: <20251112162219.226075-1-alejandro.garciavallejo@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF0000B06C:EE_|DM4PR12MB5962:EE_ X-MS-Office365-Filtering-Correlation-Id: 5ea56d63-f4ad-4e6c-b1c0-08de2207b124 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|36860700013|376014; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Nov 2025 16:22:36.4844 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5ea56d63-f4ad-4e6c-b1c0-08de2207b124 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B06C.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5962 Some code must be executed even with microcode loading disabled to find out the current microcode revision. This is important to determine active erratas and such. With the intent of stripping microcode loading via Kconfig, move such essential AMD-specific code to an amd-base.c file. Not a functional change. Signed-off-by: Alejandro Vallejo --- xen/arch/x86/cpu/microcode/Makefile | 1 + xen/arch/x86/cpu/microcode/amd-base.c | 50 ++++++++++++++++++++++++ xen/arch/x86/cpu/microcode/amd.c | 55 +++------------------------ xen/arch/x86/cpu/microcode/amd.h | 15 ++++++++ 4 files changed, 72 insertions(+), 49 deletions(-) create mode 100644 xen/arch/x86/cpu/microcode/amd-base.c create mode 100644 xen/arch/x86/cpu/microcode/amd.h diff --git a/xen/arch/x86/cpu/microcode/Makefile b/xen/arch/x86/cpu/microcode/Makefile index 30d600544f..00aa0f24e4 100644 --- a/xen/arch/x86/cpu/microcode/Makefile +++ b/xen/arch/x86/cpu/microcode/Makefile @@ -1,3 +1,4 @@ obj-$(CONFIG_AMD) += amd.o +obj-$(CONFIG_AMD) += amd-base.o obj-y += core.o obj-$(CONFIG_INTEL) += intel.o diff --git a/xen/arch/x86/cpu/microcode/amd-base.c b/xen/arch/x86/cpu/microcode/amd-base.c new file mode 100644 index 0000000000..f8f5fac1e1 --- /dev/null +++ b/xen/arch/x86/cpu/microcode/amd-base.c @@ -0,0 +1,50 @@ +#include + +#include +#include +#include + +#include "amd.h" + +#define pr_debug(x...) ((void)0) + +static void cf_check collect_cpu_info(void) +{ + struct cpu_signature *csig = &this_cpu(cpu_sig); + + memset(csig, 0, sizeof(*csig)); + + csig->sig = cpuid_eax(1); + rdmsrl(MSR_AMD_PATCHLEVEL, csig->rev); + + pr_debug("microcode: CPU%d collect_cpu_info: patch_id=%#x\n", + smp_processor_id(), csig->rev); +} + +static const struct microcode_ops __initconst_cf_clobber amd_ucode_ops = { + .cpu_request_microcode = amd_cpu_request_microcode, + .collect_cpu_info = collect_cpu_info, + .apply_microcode = amd_apply_microcode, + .compare = amd_compare, + .cpio_path = amd_cpio_path, +}; + +void __init ucode_probe_amd(struct microcode_ops *ops) +{ + /* + * The Entrysign vulnerability (SB-7033, CVE-2024-36347) affects Zen1-5 + * CPUs. Taint Xen if digest checking is turned off. + */ + if ( boot_cpu_data.family >= 0x17 && boot_cpu_data.family <= 0x1a && + !opt_digest_check ) + { + printk(XENLOG_WARNING + "Microcode patch additional digest checks disabled\n"); + add_taint(TAINT_CPU_OUT_OF_SPEC); + } + + if ( boot_cpu_data.family < 0x10 ) + return; + + *ops = amd_ucode_ops; +} diff --git a/xen/arch/x86/cpu/microcode/amd.c b/xen/arch/x86/cpu/microcode/amd.c index 550b8c1e57..c6d61fd38c 100644 --- a/xen/arch/x86/cpu/microcode/amd.c +++ b/xen/arch/x86/cpu/microcode/amd.c @@ -22,9 +22,7 @@ #include -#include "private.h" - -#define pr_debug(x...) ((void)0) +#include "amd.h" struct equiv_cpu_entry { uint32_t installed_cpu; @@ -153,19 +151,6 @@ static bool check_digest(const struct container_microcode *mc) return true; } -static void cf_check collect_cpu_info(void) -{ - struct cpu_signature *csig = &this_cpu(cpu_sig); - - memset(csig, 0, sizeof(*csig)); - - csig->sig = cpuid_eax(1); - rdmsrl(MSR_AMD_PATCHLEVEL, csig->rev); - - pr_debug("microcode: CPU%d collect_cpu_info: patch_id=%#x\n", - smp_processor_id(), csig->rev); -} - static bool verify_patch_size(uint32_t patch_size) { uint32_t max_size; @@ -264,7 +249,7 @@ static bool microcode_fits_cpu(const struct microcode_patch *patch) return equiv.id == patch->processor_rev_id; } -static int cf_check amd_compare( +int cf_check amd_compare( const struct microcode_patch *old, const struct microcode_patch *new) { /* Both patches to compare are supposed to be applicable to local CPU. */ @@ -310,8 +295,8 @@ static bool check_min_rev(const struct microcode_patch *patch) return this_cpu(cpu_sig).rev >= patch->min_rev; } -static int cf_check apply_microcode(const struct microcode_patch *patch, - unsigned int flags) +int cf_check amd_apply_microcode(const struct microcode_patch *patch, + unsigned int flags) { int hw_err, result; unsigned int cpu = smp_processor_id(); @@ -424,7 +409,7 @@ static int scan_equiv_cpu_table(const struct container_equiv_table *et) return -ESRCH; } -static struct microcode_patch *cf_check cpu_request_microcode( +struct microcode_patch *cf_check amd_cpu_request_microcode( const void *buf, size_t size, bool make_copy) { const struct microcode_patch *saved = NULL; @@ -559,37 +544,9 @@ static struct microcode_patch *cf_check cpu_request_microcode( return patch; } -static const char __initconst amd_cpio_path[] = +const char __initconst amd_cpio_path[] = "kernel/x86/microcode/AuthenticAMD.bin"; -static const struct microcode_ops __initconst_cf_clobber amd_ucode_ops = { - .cpu_request_microcode = cpu_request_microcode, - .collect_cpu_info = collect_cpu_info, - .apply_microcode = apply_microcode, - .compare = amd_compare, - .cpio_path = amd_cpio_path, -}; - -void __init ucode_probe_amd(struct microcode_ops *ops) -{ - /* - * The Entrysign vulnerability (SB-7033, CVE-2024-36347) affects Zen1-5 - * CPUs. Taint Xen if digest checking is turned off. - */ - if ( boot_cpu_data.family >= 0x17 && boot_cpu_data.family <= 0x1a && - !opt_digest_check ) - { - printk(XENLOG_WARNING - "Microcode patch additional digest checks disabled\n"); - add_taint(TAINT_CPU_OUT_OF_SPEC); - } - - if ( boot_cpu_data.family < 0x10 ) - return; - - *ops = amd_ucode_ops; -} - #if 0 /* Manual CONFIG_SELF_TESTS */ static void __init __constructor test_digests_sorted(void) { diff --git a/xen/arch/x86/cpu/microcode/amd.h b/xen/arch/x86/cpu/microcode/amd.h new file mode 100644 index 0000000000..1df1b61adb --- /dev/null +++ b/xen/arch/x86/cpu/microcode/amd.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef ASM_X86_MICROCODE_AMD_H +#define ASM_X86_MICROCODE_AMD_H + +#include "private.h" + +int cf_check amd_compare(const struct microcode_patch *old, + const struct microcode_patch *new); +int cf_check amd_apply_microcode(const struct microcode_patch *patch, + unsigned int flags); +struct microcode_patch *cf_check amd_cpu_request_microcode( + const void *buf, size_t size, bool make_copy); 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Smith" , =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= Subject: [PATCH 0/4] Add Kconfig option to remove microcode loading support Date: Wed, 12 Nov 2025 17:22:13 +0100 Message-ID: <20251112162219.226075-1-alejandro.garciavallejo@amd.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF0000B06C:EE_|SJ0PR12MB6758:EE_ X-MS-Office365-Filtering-Correlation-Id: f5a9dfec-2edd-4c67-522d-08de2207b03c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700013|376014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?/QuRt4Rfc6IdGMyiJT3RZsHSpI7yzNj5UlZlw2bH1XOsOMU2fMRycHEjL3tJ?= =?us-ascii?Q?mPQY0otZr4pKNcsSNnJw1JN7GAoQG2CSG9tcXqW79LjVin1lvQqo8ircSXnL?= =?us-ascii?Q?0vNeK8HzOuL401CC56Pa5kAtpanMieg379kprk2e/qu+t3AC91zCe29OfhB0?= =?us-ascii?Q?dwyhvDex8S57uKwzGJE5vD/JOMlen9hq4FOGAP6rd3xOfjRG1/EZBptP1Gz9?= =?us-ascii?Q?8IndUCtIh/nXrkrSPq8vOK4B7QlLhQENv7H+/1DnVeH6XhP9rf5XHX0GnVLh?= =?us-ascii?Q?jmdcXHj6yfilqkX8+wKDBTUB9a5lYCdLg1g3yULcAwdRp9k80lEPB75MWwsg?= =?us-ascii?Q?k573MipzC3Cut0Qn//+XGMSy2LIpQm1AdUPQPJ1ZsyDuf2P2lI5k4vtgNlgy?= =?us-ascii?Q?w4vDpWm5aWiPuLXuYUy+zjYwDsAOjkabCApQRwNGq5OA3C44vf7GMX3NLT8j?= =?us-ascii?Q?Sc7UeGX6rpkbT0NL4p4WVB4149ZZCMRFoP36w12ka1+2Vz4+DO/um14WvXSR?= =?us-ascii?Q?5xJid2n2r6hKIK+rOe6ygqLU0MyxnIPn5IXitNMN8gyid1zQ+9JXbVmbHI84?= =?us-ascii?Q?217yb3ZksZQ8EpZFmcr5zUyJ7A9MGjOcLo3j0PzX3uxDwaJuvxzdphoT334r?= =?us-ascii?Q?ILoBjxKGxUaOthL4iWkT7coBWhvGm8yTAgARnfYOM86lri9jzblBtBZ7qmBD?= =?us-ascii?Q?SxRMYimhIJwH0y7HI1aXK3PdoWbA13wZ1mPFEvxIWvHXyGHY0o/7hHEcp34H?= =?us-ascii?Q?t8E45HdNHvFFNFbaFFYxgzdvleKssJbffHbXXxV4BeVTLnlpDP53gWqG6uY/?= =?us-ascii?Q?GUGgeebFBOfhTyk5zuEZYwQEJRIOa4Bw5sCj0k/eFmpCZ0hAR/hgvdqjGlCY?= =?us-ascii?Q?vkSQTvGDMd/bcpuIak7s7svCf2huwLusAmC04bURijGYyDTygD3qyCAGSwBf?= =?us-ascii?Q?uYsVpmbPIcHNtuXaNwVEB2rI9dEHNqmUZLYOvDfKc1T/pWrZ1MUcbYZ261LC?= =?us-ascii?Q?UAygwgC3xZRc7MBeZB39A5Wh20NXDw9n7pYr+DIeHFGIiAsMVezhFl/bdLef?= =?us-ascii?Q?b2ygTnHCumnCOK06HWAZ9WqfXj+LA6XCMVvmIOnHavh4p65K0BPwLrhJSK9m?= =?us-ascii?Q?3c1OpSNPizEvNmcoMB+wMUKa+oyo2Z7TW/g1Qwb56wpPrpvB7Tz4N8w8Nl4y?= =?us-ascii?Q?cxvgJhBg/J4xo70kTMFtq1fiMnw4EO7eIj4sYHP1FbdNWIJ4y689kDTG2TXb?= =?us-ascii?Q?0JmBTuabeEgtPTBsgpblDBrEeX96rVcpof0H6iTM4XwYyhJK0nfL0j93RHBQ?= =?us-ascii?Q?RoayRsp0z++GawGOjTPBr6+rJJriU4CN+6Ysu69FYnKWWupP7yXuMu509gxd?= =?us-ascii?Q?3fhVdqIab9Fu2NQo9FYPOyyaHcC0XtcSZC2vQILtRU8oyy1MI5FH1oJpUNJo?= =?us-ascii?Q?w+9hxYkH64bvOS+NMLau70E0pzmrUgpsNx+3Er/TVavDDUeOEb2f1j4OlwAM?= =?us-ascii?Q?4pdg12lt2JC+AkUYS7mQEMh+6Ol1fbeSWVorZNdLlOb+XMyePVMeDiLNCoNa?= =?us-ascii?Q?U/wuSxwmtrHe9GBK+m0=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(36860700013)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Nov 2025 16:22:34.9607 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f5a9dfec-2edd-4c67-522d-08de2207b03c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B06C.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB6758 Hi, The series is mostly a refactor between everything needed to load microcode and the bare minimum to probe the current microcode revision. The Kconfig option keeps the reading of microcode rev data around, as it's very relevant for security and debuggability in order to deduce which erratas apply to the current platform. The idea is to move everything that must still be compiled with !CONFIG_UCODE onto {,amd-,intel-}base.c, then remove everything else conditionally at the Makefile level. Renaming files (e.g: s/base/core/ and s/core/common/) would better reflect post-series reality, but it'd be annoying for later backports in this general area. Cheers, Alejandro Alejandro Vallejo (4): x86: Split out AMD-specific code to be executed without ucode loading x86: Split out Intel-specific code to be executed without ucode loading x86: Split out early_microcode_load() and microcode_load_one() x86: Add Kconfig option to disable microcode loading xen/arch/x86/Kconfig | 12 ++++ xen/arch/x86/cpu/microcode/Makefile | 9 ++- xen/arch/x86/cpu/microcode/amd-base.c | 55 +++++++++++++++++++ xen/arch/x86/cpu/microcode/amd.c | 55 ++----------------- xen/arch/x86/cpu/microcode/amd.h | 15 +++++ xen/arch/x86/cpu/microcode/base.c | 73 +++++++++++++++++++++++++ xen/arch/x86/cpu/microcode/core.c | 58 +------------------- xen/arch/x86/cpu/microcode/intel-base.c | 50 +++++++++++++++++ xen/arch/x86/cpu/microcode/intel.c | 56 +++---------------- xen/arch/x86/cpu/microcode/intel.h | 16 ++++++ xen/arch/x86/cpu/microcode/private.h | 14 +++++ xen/arch/x86/efi/efi-boot.h | 2 +- xen/arch/x86/platform_hypercall.c | 2 + 13 files changed, 259 insertions(+), 158 deletions(-) create mode 100644 xen/arch/x86/cpu/microcode/amd-base.c create mode 100644 xen/arch/x86/cpu/microcode/amd.h create mode 100644 xen/arch/x86/cpu/microcode/base.c create mode 100644 xen/arch/x86/cpu/microcode/intel-base.c create mode 100644 xen/arch/x86/cpu/microcode/intel.h base-commit: e00c1673992e07ed31e9c60fefa8d053491abbe6 -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Wed Nov 12 16:22:48 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 16:22:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160302.1488480 (Exim 4.92) (envelope-from ) id 1vJDcJ-0000Re-SB; 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pr=C From: Alejandro Vallejo To: CC: Alejandro Vallejo , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH 2/4] x86: Split out Intel-specific code to be executed without ucode loading Date: Wed, 12 Nov 2025 17:22:15 +0100 Message-ID: <20251112162219.226075-3-alejandro.garciavallejo@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251112162219.226075-1-alejandro.garciavallejo@amd.com> References: <20251112162219.226075-1-alejandro.garciavallejo@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF0000B06C:EE_|BY5PR12MB4162:EE_ X-MS-Office365-Filtering-Correlation-Id: 31423ed2-b646-4625-2b61-08de2207b172 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|376014|36860700013; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Nov 2025 16:22:36.9923 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 31423ed2-b646-4625-2b61-08de2207b172 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B06C.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4162 Some code must be executed even with microcode loading disabled to find out the current microcode revision. This is important to determine active erratas and such. With the intent of stripping microcode loading via Kconfig, move such essential Intel-specific code to an intel-base.c file. Not a functional change. Signed-off-by: Alejandro Vallejo --- xen/arch/x86/cpu/microcode/Makefile | 1 + xen/arch/x86/cpu/microcode/intel-base.c | 48 +++++++++++++++++++++ xen/arch/x86/cpu/microcode/intel.c | 56 ++++--------------------- xen/arch/x86/cpu/microcode/intel.h | 16 +++++++ 4 files changed, 72 insertions(+), 49 deletions(-) create mode 100644 xen/arch/x86/cpu/microcode/intel-base.c create mode 100644 xen/arch/x86/cpu/microcode/intel.h diff --git a/xen/arch/x86/cpu/microcode/Makefile b/xen/arch/x86/cpu/microcode/Makefile index 00aa0f24e4..74289981e3 100644 --- a/xen/arch/x86/cpu/microcode/Makefile +++ b/xen/arch/x86/cpu/microcode/Makefile @@ -2,3 +2,4 @@ obj-$(CONFIG_AMD) += amd.o obj-$(CONFIG_AMD) += amd-base.o obj-y += core.o obj-$(CONFIG_INTEL) += intel.o +obj-$(CONFIG_INTEL) += intel-base.o diff --git a/xen/arch/x86/cpu/microcode/intel-base.c b/xen/arch/x86/cpu/microcode/intel-base.c new file mode 100644 index 0000000000..4fcacaa192 --- /dev/null +++ b/xen/arch/x86/cpu/microcode/intel-base.c @@ -0,0 +1,48 @@ +#include + +#include +#include + +#include "intel.h" + +#define pr_debug(x...) ((void)0) + +static void cf_check collect_cpu_info(void) +{ + struct cpu_signature *csig = &this_cpu(cpu_sig); + uint64_t msr_content; + + memset(csig, 0, sizeof(*csig)); + + rdmsrl(MSR_IA32_PLATFORM_ID, msr_content); + csig->pf = 1 << ((msr_content >> 50) & 7); + + /* + * Obtaining the microcode version involves writing 0 to the "read only" + * UCODE_REV MSR, executing any CPUID instruction, after which a nonzero + * revision should appear. + */ + wrmsrl(MSR_IA32_UCODE_REV, 0); + csig->sig = cpuid_eax(1); + rdmsrl(MSR_IA32_UCODE_REV, msr_content); + csig->rev = msr_content >> 32; + + pr_debug("microcode: collect_cpu_info : sig=%#x, pf=%#x, rev=%#x\n", + csig->sig, csig->pf, csig->rev); +} + +static const struct microcode_ops __initconst_cf_clobber intel_ucode_ops = { + .cpu_request_microcode = intel_cpu_request_microcode, + .apply_microcode = intel_apply_microcode, + .collect_cpu_info = collect_cpu_info, + .compare = intel_compare, + .cpio_path = intel_cpio_path, +}; + +void __init ucode_probe_intel(struct microcode_ops *ops) +{ + *ops = intel_ucode_ops; + + if ( !intel_can_load_microcode() ) + ops->apply_microcode = NULL; +} diff --git a/xen/arch/x86/cpu/microcode/intel.c b/xen/arch/x86/cpu/microcode/intel.c index 281993e725..c5e0012a03 100644 --- a/xen/arch/x86/cpu/microcode/intel.c +++ b/xen/arch/x86/cpu/microcode/intel.c @@ -31,9 +31,7 @@ #include #include -#include "private.h" - -#define pr_debug(x...) ((void)0) +#include "intel.h" struct microcode_patch { uint32_t hdrver; @@ -120,30 +118,6 @@ static bool signature_matches(const struct cpu_signature *cpu_sig, return cpu_sig->pf & ucode_pf; } -static void cf_check collect_cpu_info(void) -{ - struct cpu_signature *csig = &this_cpu(cpu_sig); - uint64_t msr_content; - - memset(csig, 0, sizeof(*csig)); - - rdmsrl(MSR_IA32_PLATFORM_ID, msr_content); - csig->pf = 1 << ((msr_content >> 50) & 7); - - /* - * Obtaining the microcode version involves writing 0 to the "read only" - * UCODE_REV MSR, executing any CPUID instruction, after which a nonzero - * revision should appear. - */ - wrmsrl(MSR_IA32_UCODE_REV, 0); - csig->sig = cpuid_eax(1); - rdmsrl(MSR_IA32_UCODE_REV, msr_content); - csig->rev = msr_content >> 32; - - pr_debug("microcode: collect_cpu_info : sig=%#x, pf=%#x, rev=%#x\n", - csig->sig, csig->pf, csig->rev); -} - /* * Sanity check a blob which is expected to be a microcode patch. The 48 byte * header is of a known format, and together with totalsize are within the @@ -273,7 +247,7 @@ static bool microcode_fits_cpu(const struct microcode_patch *mc) return false; } -static int cf_check intel_compare( +int cf_check intel_compare( const struct microcode_patch *old, const struct microcode_patch *new) { /* @@ -286,8 +260,8 @@ static int cf_check intel_compare( return compare_revisions(old->rev, new->rev); } -static int cf_check apply_microcode(const struct microcode_patch *patch, - unsigned int flags) +int cf_check intel_apply_microcode(const struct microcode_patch *patch, + unsigned int flags) { uint64_t msr_content; unsigned int cpu = smp_processor_id(); @@ -333,7 +307,7 @@ static int cf_check apply_microcode(const struct microcode_patch *patch, return 0; } -static struct microcode_patch *cf_check cpu_request_microcode( +struct microcode_patch *cf_check intel_cpu_request_microcode( const void *buf, size_t size, bool make_copy) { int error = 0; @@ -391,7 +365,7 @@ static struct microcode_patch *cf_check cpu_request_microcode( return patch; } -static bool __init can_load_microcode(void) +bool __init intel_can_load_microcode(void) { uint64_t mcu_ctrl; @@ -404,21 +378,5 @@ static bool __init can_load_microcode(void) return !(mcu_ctrl & MCU_CONTROL_DIS_MCU_LOAD); } -static const char __initconst intel_cpio_path[] = +const char __initconst intel_cpio_path[] = "kernel/x86/microcode/GenuineIntel.bin"; - -static const struct microcode_ops __initconst_cf_clobber intel_ucode_ops = { - .cpu_request_microcode = cpu_request_microcode, - .collect_cpu_info = collect_cpu_info, - .apply_microcode = apply_microcode, - .compare = intel_compare, - .cpio_path = intel_cpio_path, -}; - -void __init ucode_probe_intel(struct microcode_ops *ops) -{ - *ops = intel_ucode_ops; - - if ( !can_load_microcode() ) - ops->apply_microcode = NULL; -} diff --git a/xen/arch/x86/cpu/microcode/intel.h b/xen/arch/x86/cpu/microcode/intel.h new file mode 100644 index 0000000000..3c1419dc77 --- /dev/null +++ b/xen/arch/x86/cpu/microcode/intel.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef ASM_X86_MICROCODE_INTEL_H +#define ASM_X86_MICROCODE_INTEL_H + +#include "private.h" + +bool intel_can_load_microcode(void); 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Smith" , =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= Subject: [PATCH 4/4] x86: Add Kconfig option to disable microcode loading Date: Wed, 12 Nov 2025 17:22:17 +0100 Message-ID: <20251112162219.226075-5-alejandro.garciavallejo@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251112162219.226075-1-alejandro.garciavallejo@amd.com> References: <20251112162219.226075-1-alejandro.garciavallejo@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF0000B06C:EE_|DS0PR12MB8220:EE_ X-MS-Office365-Filtering-Correlation-Id: 6c4ab6e9-3356-4077-6ec3-08de2207b247 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700013|82310400026|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?RZ2G5MwND2ydle6GMkTvpZmrx2APiMnKoJ8L8IorzyHsF5UnQsckqV2Vkjg3?= =?us-ascii?Q?47tVp/JiXOCoWnTQsIjEHT8PZ+PaNiKhzvwU7XsY7qNJ36LbUY2+jryBeIPq?= =?us-ascii?Q?jqRSzCcRnpRwNfiyYp5z4DJhhlzMpxLRO6KwSSawcQAPi9cy9plMORt1jmyg?= =?us-ascii?Q?vYldmTc/40vl3now+e/zTR7a/CEF2cr/c03e9jcM5GBDOeR3sSCv5bYA53Bj?= =?us-ascii?Q?2zNoDWYQ9pT1TRV6BjHayT8siA3jnvlTwL2cJXh4sgN9unSxw/rTIS5+PefX?= =?us-ascii?Q?GYyTw+bQI1DCwNqtS+1vbMdWaZ6YMhywQOjSTpvc4eT5Y2Ms3MOas+vxMUq9?= =?us-ascii?Q?/ZN1mixTVkHbGpHuQvd+TkIgijH5AXuMm5oqIML5caqO4beha+pcDG2lUAu/?= =?us-ascii?Q?NFgwA+Qu8tISvIjgWzAV8jna6M8Wt4Dnu76gleGyZrzsgzdw+Hl2FNmYrrGX?= =?us-ascii?Q?Eh4Qdg5jMUFw/G2bmv/d3viG1kLvjf5mDsc39w+zKGxhCEAl6VNI8a2t9sZv?= =?us-ascii?Q?A4qcydJ5CwsjXegxW3faEMlyD6EYedlGBDXFIFs8RfmDIvE4Hr80DrEz5qS8?= =?us-ascii?Q?tYx89aKFO3hYlXxRJmP0cZslvEyDB0SH9L78523/PHha2sJ0XRODsnmb0gPJ?= =?us-ascii?Q?mZNILpjXUIQksIdwmrhakygDBtje7F5Dq2mSi1ZGXngZ5k+f12VS6mlOoI8l?= =?us-ascii?Q?HfKNF8C+6OrVlDjwv8tkFjkejUWWP30+h1oQwtWYyPvdN2HK0J/TMf1pM9xZ?= =?us-ascii?Q?BDaDCBYtQpDviboBuZdN3byowza1imvZ9ESVDrfK6sLA/62inJrTMEgJMZAt?= =?us-ascii?Q?rR5GM3t/kdv15Xv6T6QjOO9lWiKaNIZNWIPnUzw+KQtPY/fNHmk0THsJk/sN?= =?us-ascii?Q?rvgr/HeIxTpVIJ9VTKWmY7dR4ZqdaEZLH5CetjDUdx6GcgHWNiOy7NUUackS?= =?us-ascii?Q?Y595k8AXnetVSfNeyKo3OxicYtHatL8TqvvkDpqlG3fAoyE1LOIocDOJj0io?= =?us-ascii?Q?zpi67PKy+pJGCEvaYn6KWfEbzFNFoq/u3TQymV4SBs583hieoel1KkoAdjIQ?= =?us-ascii?Q?1EsJKAFuL24RifHSQLAg10c8feBKOqfODqOs91c50aGvCYKLo2V+PCzJMaAV?= =?us-ascii?Q?Tg2CJzxvNcCnO2skDCj8uVe+0SFqykxPRnGzEOmYYatq+KyVmVKBoyHYk5C3?= =?us-ascii?Q?BGs0jRtFgMAS64cBZssE/Q7XLx2Re3OqupBbGYHimV8caH2b14RpVzcZq5es?= =?us-ascii?Q?G+NmQU+PytFPmZ2f66JO1pqXNdEv9joS4gDGs5qWB5lRU8zpGCssq2dL8G49?= =?us-ascii?Q?4UqmTVMHmbaI7EJ4ZkPtZ+30B/wuAS77PL6CPqOGNn7lZsgdnzDSN4adxFKZ?= =?us-ascii?Q?Cli2Y1HTUO9a23bMvsLcbb7okEZCHIT8o2ypz1sl8XLBBONO4+PlhqJ8vvnZ?= =?us-ascii?Q?My939rkilTORS91os5HGnkrZRrliVsQJ+swsivSJVDWRMyCm1YySogXQOJ6J?= =?us-ascii?Q?oDlZ30u6c21d1Gve56yGOWAgF0rkYEBRwrN0EVWjSgTUwuOiFf+ZTkx7scOF?= =?us-ascii?Q?tvZamAIx8Xlgf8+v4Uk=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(36860700013)(82310400026)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Nov 2025 16:22:38.3902 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6c4ab6e9-3356-4077-6ec3-08de2207b247 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B06C.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8220 Keeps around the microcode revision reading logic, as that's security sensitive to detect out-of-date patforms and report them. Move cpu_sig to base.c, because that's externally visible symbol outside the microcode subsystem and we need it always accesible. Signed-off-by: Alejandro Vallejo --- xen/arch/x86/Kconfig | 12 ++++++++++++ xen/arch/x86/cpu/microcode/Makefile | 6 +++--- xen/arch/x86/cpu/microcode/amd-base.c | 9 +++++++-- xen/arch/x86/cpu/microcode/base.c | 21 +++++++++++---------- xen/arch/x86/cpu/microcode/core.c | 1 - xen/arch/x86/cpu/microcode/intel-base.c | 6 ++++-- xen/arch/x86/efi/efi-boot.h | 2 +- xen/arch/x86/platform_hypercall.c | 2 ++ 8 files changed, 40 insertions(+), 19 deletions(-) diff --git a/xen/arch/x86/Kconfig b/xen/arch/x86/Kconfig index 3f0f3a0f3a..948dd00dbc 100644 --- a/xen/arch/x86/Kconfig +++ b/xen/arch/x86/Kconfig @@ -330,8 +330,20 @@ config REQUIRE_NX was unavailable. However, if enabled, Xen will no longer boot on any CPU which is lacking NX support. +config UCODE + bool "Microcode loading" + default y + help + Support updating the microcode revision of available CPUs with a newer + vendor-provided microcode blob. Microcode updates address some classes of + silicon defects. It's a very common delivery mechanism for fixes or + workarounds for speculative execution vulnerabilities. + + If unsure, say Y + config UCODE_SCAN_DEFAULT bool "Scan for microcode by default" + depends on UCODE help During boot, Xen can scan the multiboot images for a CPIO archive containing CPU microcode to be loaded, which is Linux's mechanism for diff --git a/xen/arch/x86/cpu/microcode/Makefile b/xen/arch/x86/cpu/microcode/Makefile index 765195ada3..4ec38b56a2 100644 --- a/xen/arch/x86/cpu/microcode/Makefile +++ b/xen/arch/x86/cpu/microcode/Makefile @@ -1,6 +1,6 @@ -obj-$(CONFIG_AMD) += amd.o +obj-$(filter $(CONFIG_AMD),$(CONFIG_UCODE)) += amd.o obj-$(CONFIG_AMD) += amd-base.o obj-y += base.o -obj-y += core.o -obj-$(CONFIG_INTEL) += intel.o +obj-$(CONFIG_UCODE) += core.o +obj-$(filter $(CONFIG_INTEL),$(CONFIG_UCODE)) += intel.o obj-$(CONFIG_INTEL) += intel-base.o diff --git a/xen/arch/x86/cpu/microcode/amd-base.c b/xen/arch/x86/cpu/microcode/amd-base.c index f8f5fac1e1..4e705fe602 100644 --- a/xen/arch/x86/cpu/microcode/amd-base.c +++ b/xen/arch/x86/cpu/microcode/amd-base.c @@ -22,19 +22,23 @@ static void cf_check collect_cpu_info(void) } static const struct microcode_ops __initconst_cf_clobber amd_ucode_ops = { - .cpu_request_microcode = amd_cpu_request_microcode, .collect_cpu_info = collect_cpu_info, +#ifdef CONFIG_UCODE + .cpu_request_microcode = amd_cpu_request_microcode, .apply_microcode = amd_apply_microcode, .compare = amd_compare, .cpio_path = amd_cpio_path, +#endif /* CONFIG_UCODE */ }; void __init ucode_probe_amd(struct microcode_ops *ops) { /* * The Entrysign vulnerability (SB-7033, CVE-2024-36347) affects Zen1-5 - * CPUs. Taint Xen if digest checking is turned off. + * CPUs. Taint Xen if digest checking is turned off and microcode loading is + * compiled in. */ +#ifdef CONFIG_UCODE if ( boot_cpu_data.family >= 0x17 && boot_cpu_data.family <= 0x1a && !opt_digest_check ) { @@ -42,6 +46,7 @@ void __init ucode_probe_amd(struct microcode_ops *ops) "Microcode patch additional digest checks disabled\n"); add_taint(TAINT_CPU_OUT_OF_SPEC); } +#endif /* CONFIG_UCODE */ if ( boot_cpu_data.family < 0x10 ) return; diff --git a/xen/arch/x86/cpu/microcode/base.c b/xen/arch/x86/cpu/microcode/base.c index 895ee78d2e..3e0b5a7447 100644 --- a/xen/arch/x86/cpu/microcode/base.c +++ b/xen/arch/x86/cpu/microcode/base.c @@ -13,6 +13,7 @@ #include "private.h" struct microcode_ops __ro_after_init ucode_ops; +DEFINE_PER_CPU(struct cpu_signature, cpu_sig); int microcode_update_one(void) { @@ -23,6 +24,9 @@ int microcode_update_one(void) if ( ucode_ops.collect_cpu_info ) alternative_vcall(ucode_ops.collect_cpu_info); + if ( !IS_ENABLED(CONFIG_UCODE) ) + return 0; + return _microcode_update_one(); } @@ -30,16 +34,10 @@ int __init early_microcode_init(struct boot_info *bi) { const struct cpuinfo_x86 *c = &boot_cpu_data; - switch ( c->vendor ) - { - case X86_VENDOR_AMD: + if ( IS_ENABLED(CONFIG_AMD) && c->vendor == X86_VENDOR_AMD ) ucode_probe_amd(&ucode_ops); - break; - - case X86_VENDOR_INTEL: + else if ( IS_ENABLED(CONFIG_INTEL) && c->vendor == X86_VENDOR_INTEL ) ucode_probe_intel(&ucode_ops); - break; - } if ( !ucode_ops.collect_cpu_info ) { @@ -60,10 +58,13 @@ int __init early_microcode_init(struct boot_info *bi) * * Take the hint in either case and ignore the microcode interface. */ - if ( !ucode_ops.apply_microcode || this_cpu(cpu_sig).rev == ~0 ) + if ( !IS_ENABLED(CONFIG_UCODE) || !ucode_ops.apply_microcode || + this_cpu(cpu_sig).rev == ~0 ) { printk(XENLOG_INFO "Microcode loading disabled due to: %s\n", - ucode_ops.apply_microcode ? "rev = ~0" : "HW toggle"); + !IS_ENABLED(CONFIG_UCODE) ? "not compiled-in" : + ucode_ops.apply_microcode ? "rev = ~0" : + "HW toggle"); ucode_ops.apply_microcode = NULL; return -ENODEV; } diff --git a/xen/arch/x86/cpu/microcode/core.c b/xen/arch/x86/cpu/microcode/core.c index 553a0ced15..d6ba250dca 100644 --- a/xen/arch/x86/cpu/microcode/core.c +++ b/xen/arch/x86/cpu/microcode/core.c @@ -164,7 +164,6 @@ custom_param("ucode", parse_ucode); static DEFINE_SPINLOCK(microcode_mutex); -DEFINE_PER_CPU(struct cpu_signature, cpu_sig); /* Store error code of the work done in NMI handler */ static DEFINE_PER_CPU(int, loading_err); diff --git a/xen/arch/x86/cpu/microcode/intel-base.c b/xen/arch/x86/cpu/microcode/intel-base.c index 4fcacaa192..18fdb4e7fc 100644 --- a/xen/arch/x86/cpu/microcode/intel-base.c +++ b/xen/arch/x86/cpu/microcode/intel-base.c @@ -32,17 +32,19 @@ static void cf_check collect_cpu_info(void) } static const struct microcode_ops __initconst_cf_clobber intel_ucode_ops = { + .collect_cpu_info = collect_cpu_info, +#ifdef CONFIG_UCODE .cpu_request_microcode = intel_cpu_request_microcode, .apply_microcode = intel_apply_microcode, - .collect_cpu_info = collect_cpu_info, .compare = intel_compare, .cpio_path = intel_cpio_path, +#endif /* CONFIG_UCODE */ }; void __init ucode_probe_intel(struct microcode_ops *ops) { *ops = intel_ucode_ops; - if ( !intel_can_load_microcode() ) + if ( IS_ENABLED(CONFIG_UCODE) && !intel_can_load_microcode() ) ops->apply_microcode = NULL; } diff --git a/xen/arch/x86/efi/efi-boot.h b/xen/arch/x86/efi/efi-boot.h index 0194720003..9ec9291681 100644 --- a/xen/arch/x86/efi/efi-boot.h +++ b/xen/arch/x86/efi/efi-boot.h @@ -295,7 +295,7 @@ static void __init efi_arch_cfg_file_late(const EFI_LOADED_IMAGE *image, { union string name; - if ( read_section(image, L"ucode", &ucode, NULL) ) + if ( !IS_ENABLED(CONFIG_UCODE) || read_section(image, L"ucode", &ucode, NULL) ) return; name.s = get_value(&cfg, section, "ucode"); diff --git a/xen/arch/x86/platform_hypercall.c b/xen/arch/x86/platform_hypercall.c index 79bb99e0b6..b2527bca93 100644 --- a/xen/arch/x86/platform_hypercall.c +++ b/xen/arch/x86/platform_hypercall.c @@ -307,6 +307,7 @@ ret_t do_platform_op( break; } +#ifdef CONFIG_UCODE case XENPF_microcode_update: { XEN_GUEST_HANDLE(const_void) data; @@ -327,6 +328,7 @@ ret_t do_platform_op( op->u.microcode2.flags); break; } +#endif /* CONFIG_UCODE */ case XENPF_platform_quirk: { -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Wed Nov 12 16:22:50 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 16:22:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160306.1488516 (Exim 4.92) (envelope-from ) id 1vJDcQ-0001EG-3K; Wed, 12 Nov 2025 16:22:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160306.1488516; Wed, 12 Nov 2025 16:22:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJDcP-0001Cp-S8; Wed, 12 Nov 2025 16:22:49 +0000 Received: by outflank-mailman (input) for mailman id 1160306; Wed, 12 Nov 2025 16:22:48 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJDcO-0000RX-Qt for xen-devel@lists.xenproject.org; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Nov 2025 16:22:37.7006 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3f27baef-e039-4b20-1cbb-08de2207b1de X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B06C.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ5PPFE4FC9FAB3 A later patch compiles out most of the microcode loading code by removing core.c from the Makefile based on Kconfig. These functions are important to set up the ucode_op to read the microcode revision and report it on every CPU. Not a functional change. Signed-off-by: Alejandro Vallejo --- xen/arch/x86/cpu/microcode/Makefile | 1 + xen/arch/x86/cpu/microcode/base.c | 72 ++++++++++++++++++++++++++++ xen/arch/x86/cpu/microcode/core.c | 57 +--------------------- xen/arch/x86/cpu/microcode/private.h | 14 ++++++ 4 files changed, 89 insertions(+), 55 deletions(-) create mode 100644 xen/arch/x86/cpu/microcode/base.c diff --git a/xen/arch/x86/cpu/microcode/Makefile b/xen/arch/x86/cpu/microcode/Makefile index 74289981e3..765195ada3 100644 --- a/xen/arch/x86/cpu/microcode/Makefile +++ b/xen/arch/x86/cpu/microcode/Makefile @@ -1,5 +1,6 @@ obj-$(CONFIG_AMD) += amd.o obj-$(CONFIG_AMD) += amd-base.o +obj-y += base.o obj-y += core.o obj-$(CONFIG_INTEL) += intel.o obj-$(CONFIG_INTEL) += intel-base.o diff --git a/xen/arch/x86/cpu/microcode/base.c b/xen/arch/x86/cpu/microcode/base.c new file mode 100644 index 0000000000..895ee78d2e --- /dev/null +++ b/xen/arch/x86/cpu/microcode/base.c @@ -0,0 +1,72 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#include + +#include +#include +#include + +#include +#include +#include +#include + +#include "private.h" + +struct microcode_ops __ro_after_init ucode_ops; + +int microcode_update_one(void) +{ + /* + * This path is used for APs and S3 resume. Read the microcode revision + * if possible, even if we can't load microcode. + */ + if ( ucode_ops.collect_cpu_info ) + alternative_vcall(ucode_ops.collect_cpu_info); + + return _microcode_update_one(); +} + +int __init early_microcode_init(struct boot_info *bi) +{ + const struct cpuinfo_x86 *c = &boot_cpu_data; + + switch ( c->vendor ) + { + case X86_VENDOR_AMD: + ucode_probe_amd(&ucode_ops); + break; + + case X86_VENDOR_INTEL: + ucode_probe_intel(&ucode_ops); + break; + } + + if ( !ucode_ops.collect_cpu_info ) + { + printk(XENLOG_INFO "Microcode loading not available\n"); + return -ENODEV; + } + + ucode_ops.collect_cpu_info(); + + printk(XENLOG_INFO "BSP microcode revision: 0x%08x\n", this_cpu(cpu_sig).rev); + + /* + * Some hypervisors deliberately report a microcode revision of -1 to + * mean that they will not accept microcode updates. + * + * It's also possible the hardware might have built-in support to disable + * updates and someone (e.g: a baremetal cloud provider) disabled them. + * + * Take the hint in either case and ignore the microcode interface. + */ + if ( !ucode_ops.apply_microcode || this_cpu(cpu_sig).rev == ~0 ) + { + printk(XENLOG_INFO "Microcode loading disabled due to: %s\n", + ucode_ops.apply_microcode ? "rev = ~0" : "HW toggle"); + ucode_ops.apply_microcode = NULL; + return -ENODEV; + } + + return early_microcode_load(bi); +} diff --git a/xen/arch/x86/cpu/microcode/core.c b/xen/arch/x86/cpu/microcode/core.c index 1d1a5aa4b0..553a0ced15 100644 --- a/xen/arch/x86/cpu/microcode/core.c +++ b/xen/arch/x86/cpu/microcode/core.c @@ -162,8 +162,6 @@ static int __init cf_check parse_ucode(const char *s) } custom_param("ucode", parse_ucode); -static struct microcode_ops __ro_after_init ucode_ops; - static DEFINE_SPINLOCK(microcode_mutex); DEFINE_PER_CPU(struct cpu_signature, cpu_sig); @@ -648,7 +646,7 @@ int ucode_update_hcall(XEN_GUEST_HANDLE(const_void) buf, } /* Load a cached update to current cpu */ -int microcode_update_one(void) +int _microcode_update_one(void) { int rc; @@ -736,13 +734,7 @@ static int __init cf_check microcode_init_cache(void) } presmp_initcall(microcode_init_cache); -/* - * There are several tasks: - * - Locate the ucode blob in the boot modules. - * - Parse and attempt in-place load. - * - Inform microcode_init_cache() of how to find the blob again. - */ -static int __init early_microcode_load(struct boot_info *bi) +int __init early_microcode_load(struct boot_info *bi) { void *data = NULL; size_t size; @@ -873,48 +865,3 @@ static int __init early_microcode_load(struct boot_info *bi) return rc; } - -int __init early_microcode_init(struct boot_info *bi) -{ - const struct cpuinfo_x86 *c = &boot_cpu_data; - - switch ( c->vendor ) - { - case X86_VENDOR_AMD: - ucode_probe_amd(&ucode_ops); - break; - - case X86_VENDOR_INTEL: - ucode_probe_intel(&ucode_ops); - break; - } - - if ( !ucode_ops.collect_cpu_info ) - { - printk(XENLOG_INFO "Microcode loading not available\n"); - return -ENODEV; - } - - ucode_ops.collect_cpu_info(); - - printk(XENLOG_INFO "BSP microcode revision: 0x%08x\n", this_cpu(cpu_sig).rev); - - /* - * Some hypervisors deliberately report a microcode revision of -1 to - * mean that they will not accept microcode updates. - * - * It's also possible the hardware might have built-in support to disable - * updates and someone (e.g: a baremetal cloud provider) disabled them. - * - * Take the hint in either case and ignore the microcode interface. - */ - if ( !ucode_ops.apply_microcode || this_cpu(cpu_sig).rev == ~0 ) - { - printk(XENLOG_INFO "Microcode loading disabled due to: %s\n", - ucode_ops.apply_microcode ? "rev = ~0" : "HW toggle"); - ucode_ops.apply_microcode = NULL; - return -ENODEV; - } - - return early_microcode_load(bi); -} diff --git a/xen/arch/x86/cpu/microcode/private.h b/xen/arch/x86/cpu/microcode/private.h index e6c965dc99..881ea7d8d9 100644 --- a/xen/arch/x86/cpu/microcode/private.h +++ b/xen/arch/x86/cpu/microcode/private.h @@ -5,6 +5,8 @@ #include +struct boot_info; + /* Opaque. Internals are vendor-specific. */ struct microcode_patch; @@ -68,6 +70,7 @@ struct microcode_ops { }; extern bool opt_digest_check; +extern struct microcode_ops ucode_ops; /* * Microcode loading falls into one of 3 states. @@ -93,4 +96,15 @@ void ucode_probe_intel(struct microcode_ops *ops); static inline void ucode_probe_intel(struct microcode_ops *ops) {} #endif +/* + * There are several tasks: + * - Locate the ucode blob in the boot modules. + * - Parse and attempt in-place load. + * - Inform microcode_init_cache() of how to find the blob again. + */ +int early_microcode_load(struct boot_info *bi); + +/* Attempt performaing a microcode load */ +int _microcode_update_one(void); + #endif /* ASM_X86_MICROCODE_PRIVATE_H */ -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Wed Nov 12 16:35:50 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 16:35:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160370.1488529 (Exim 4.92) (envelope-from ) id 1vJDow-0005Hc-DC; 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Message-ID: <6468bf48-deec-4c92-8158-92d1b28580f1@epam.com> Date: Wed, 12 Nov 2025 18:35:32 +0200 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH v7] x86: make Viridian support optional To: Alejandro Vallejo , Jan Beulich Cc: Sergiy Kibrik , Andrew Cooper , Paul Durrant , "xen-devel@lists.xenproject.org" , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , Stefano Stabellini , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= References: <20251031161716.1222956-1-grygorii_strashko@epam.com> <210edee7-8525-47a9-8191-ea7d94db5fce@suse.com> <0a5af540-214d-46cc-93e5-f0266bb79064@epam.com> Content-Language: en-US From: Grygorii Strashko In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: FR0P281CA0243.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:af::10) To AS2PR03MB8907.eurprd03.prod.outlook.com (2603:10a6:20b:5e4::22) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AS2PR03MB8907:EE_|GV1PR03MB8381:EE_ X-MS-Office365-Filtering-Correlation-Id: 6b98745f-ea53-425d-981f-08de22098038 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|366016; 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>>>>>>>            break; >>>>>>>        case HVM_PARAM_VIRIDIAN: >>>>>>> -        if ( (value & ~HVMPV_feature_mask) || >>>>>>> -             !(value & HVMPV_base_freq) ) >>>>>>> +        if ( !IS_ENABLED(CONFIG_VIRIDIAN) && value ) >>>>>>> +            rc = -ENODEV; >>>>>>> +        else if ( (value & ~HVMPV_feature_mask) || !(value & HVMPV_base_freq) ) >>>>>>>                rc = -EINVAL; >>>>>> >>>>>> I find the check for value to be (non-)zero a little dubious here: If any caller >>>>>> passed in 0, it would get back -EINVAL anyway. Imo -ENODEV would be more suitable >>>>>> in that case as well. Things would be different if 0 was a valid value to pass in. >>>>> >>>>> The idea was to distinguish between "Feature enabled, Invalid parameter" and "Feature disabled". >>>> " >>>> But you don't, or else the addition would need to live after the -EINVAL checks. >>>> I also question the utility of knowing "parameter was invalid" when the feature >>>> isn't available anyway. >>> >>> My understanding here - I need to drop non-zero "value" check. >>> will be: >>> >>>     case HVM_PARAM_VIRIDIAN: >>>         if ( !IS_ENABLED(CONFIG_VIRIDIAN) ) >>>             rc = -ENODEV; >>>         else if ( (value & ~HVMPV_feature_mask) || !(value & HVMPV_base_freq) ) >>>             rc = -EINVAL; >>>         break; >> >> Yes, or alternatively >> >> case HVM_PARAM_VIRIDIAN: >> if ( (value & ~HVMPV_feature_mask) || !(value & HVMPV_base_freq) ) >> rc = -EINVAL; >> else if ( !IS_ENABLED(CONFIG_VIRIDIAN) ) >> rc = -ENODEV; >> break; >> >> Both have their up- and down-sides. >> >> Jan > > We should aim for Grygorii's form, imo. If anything because it eliminates > the second else-if on !VIRIDIAN, leading to a marginal binary size reduction. > > There's no value in validation when viridian support just isn't there. I'm planning to resend with below diff applied: diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index c09fb2ba6873..7299cfa90ad5 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -4231,7 +4231,7 @@ static int hvm_set_param(struct domain *d, uint32_t index, uint64_t value) rc = -EINVAL; break; case HVM_PARAM_VIRIDIAN: - if ( !IS_ENABLED(CONFIG_VIRIDIAN) && value ) + if ( !IS_ENABLED(CONFIG_VIRIDIAN) ) rc = -ENODEV; else if ( (value & ~HVMPV_feature_mask) || !(value & HVMPV_base_freq) ) rc = -EINVAL; diff --git a/xen/arch/x86/hvm/viridian/viridian.c b/xen/arch/x86/hvm/viridian/viridian.c index 5fb148b2aa15..90e749ceb581 100644 --- a/xen/arch/x86/hvm/viridian/viridian.c +++ b/xen/arch/x86/hvm/viridian/viridian.c @@ -1117,9 +1117,6 @@ static int cf_check viridian_load_domain_ctxt( struct viridian_domain *vd = d->arch.hvm.viridian; struct hvm_viridian_domain_context ctxt; - if ( !IS_ENABLED(CONFIG_VIRIDIAN) ) - return -EILSEQ; - if ( hvm_load_entry_zeroextend(VIRIDIAN_DOMAIN, h, &ctxt) != 0 ) return -EINVAL; @@ -1156,9 +1153,6 @@ static int cf_check viridian_load_vcpu_ctxt( struct vcpu *v; struct hvm_viridian_vcpu_context ctxt; - if ( !IS_ENABLED(CONFIG_VIRIDIAN) ) - return -EILSEQ; - if ( vcpuid >= d->max_vcpus || (v = d->vcpu[vcpuid]) == NULL ) { dprintk(XENLOG_G_ERR, "HVM restore: dom%d has no vcpu%u\n", PS: Not sure I have enough stamina and enthusiasm to continue post v8 version. -- Best regards, -grygorii From xen-devel-bounces@lists.xenproject.org Wed Nov 12 17:15:00 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 17:15:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160386.1488539 (Exim 4.92) (envelope-from ) id 1vJEQh-00037U-DS; Wed, 12 Nov 2025 17:14:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160386.1488539; Wed, 12 Nov 2025 17:14:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJEQh-00037N-Ar; Wed, 12 Nov 2025 17:14:47 +0000 Received: by outflank-mailman (input) for mailman id 1160386; Wed, 12 Nov 2025 17:14:46 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJEQg-00037H-1p for xen-devel@lists.xenproject.org; Wed, 12 Nov 2025 17:14:46 +0000 Received: from out-186.mta0.migadu.com (out-186.mta0.migadu.com [91.218.175.186]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 14800c86-bfeb-11f0-9d18-b5c5bf9af7f9; Wed, 12 Nov 2025 18:14:43 +0100 (CET) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 14800c86-bfeb-11f0-9d18-b5c5bf9af7f9 X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1762967681; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=ZPcbU/HjyHzjDNdh8oZgw6FUm0OlxveuLUPT+TNJvls=; b=AT5U8QoU/4yVoI0kNxptJ2hvBfaaRXmzvm4o1oLcdkbjEWJmjVDR035GudP1Mt1XUGnOAU lfgMaWLQZWfiGWcCbAdJG0dRjyBPB9iZg+x6fbNrak6zJ9d14d3hh3FHICf1UGayxq4hLc aIiutbYgxmtzKZZ1giBVzcTShRrINrk= From: Thorsten Blum To: Juergen Gross , Stefano Stabellini , Oleksandr Tyshchenko , Jason Andryuk , "Dr. David Alan Gilbert" , Thorsten Blum Cc: xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org Subject: [PATCH RESEND] drivers/xen/xenbus: Simplify return statement in join() Date: Wed, 12 Nov 2025 18:14:07 +0100 Message-ID: <20251112171410.3140-2-thorsten.blum@linux.dev> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Migadu-Flow: FLOW_OUT Don't unnecessarily negate 'buffer' and simplify the return statement. Reviewed-by: Jason Andryuk Signed-off-by: Thorsten Blum --- drivers/xen/xenbus/xenbus_xs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/xen/xenbus/xenbus_xs.c b/drivers/xen/xenbus/xenbus_xs.c index 528682bf0c7f..7c6c12925326 100644 --- a/drivers/xen/xenbus/xenbus_xs.c +++ b/drivers/xen/xenbus/xenbus_xs.c @@ -407,7 +407,7 @@ static char *join(const char *dir, const char *name) buffer = kasprintf(GFP_NOIO | __GFP_HIGH, "%s", dir); else buffer = kasprintf(GFP_NOIO | __GFP_HIGH, "%s/%s", dir, name); - return (!buffer) ? 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Nov 2025 17:21:40.3501 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b387312c-84b9-436c-93dd-08de220ff181 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001EA.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB5883 On Wed Nov 12, 2025 at 4:56 PM CET, Grygorii Strashko wrote: > > > On 12.11.25 17:22, Alejandro Vallejo wrote: >> They are unnecessary. The only two cases with link-time failures are >> fallback else branches that can just as well be adjusted with explicit >> IS_ENABLED(CONFIG_PV). HVM has no equivalent stubs and there's no reason >> to keep the asymmetry. >>=20 >> No functional change. >>=20 >> Signed-off-by: Alejandro Vallejo >> --- >> I'd rather remove the "rc =3D -EOPNOTSUPP" branch altogether, or replace >> it with ASSERT_UNREACHABLE(), but I kept it here to preserve prior behav= iour. >>=20 >> Thoughts? >>=20 >> --- >> xen/arch/x86/domain.c | 10 ++++++---- >> xen/arch/x86/include/asm/pv/domain.h | 25 ------------------------- >> 2 files changed, 6 insertions(+), 29 deletions(-) >>=20 >> diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c >> index 19fd86ce88..0977d9323d 100644 >> --- a/xen/arch/x86/domain.c >> +++ b/xen/arch/x86/domain.c >> @@ -571,15 +571,17 @@ int arch_vcpu_create(struct vcpu *v) >> =20 >> if ( is_hvm_domain(d) ) >> rc =3D hvm_vcpu_initialise(v); >> - else if ( !is_idle_domain(d) ) >> - rc =3D pv_vcpu_initialise(v); >> - else >> + else if ( is_idle_domain(d) ) >> { > > The is_idle_domain() wants to go first here, i think. > [1] https://patchwork.kernel.org/comment/26646246/ I'm not sure I follow. I inverted the condition in order for the PV case to become the fallback "else" and be thus eliminable through DCE. > >> /* Idle domain */ >> v->arch.cr3 =3D __pa(idle_pg_table); >> rc =3D 0; >> v->arch.msrs =3D ZERO_BLOCK_PTR; /* Catch stray misuses */ >> } >> + else if ( IS_ENABLED(CONFIG_PV) ) >> + rc =3D pv_vcpu_initialise(v); >> + else >> + rc =3D -EOPNOTSUPP; >> =20 >> if ( rc ) >> goto fail; > > Actually, if you are here and have time and inspiration :) I may find at least one of those two :) > - if ( is_idle_domain(d) ) staff can be consolidated at the > beginning of arch_vcpu_create() which will make it much more readable = and simple. Good point Though it's subtle because the idle domain has wacky matching semantics and there's many exit paths. Let me see if I can make a clearer version with that sort of consolidation that is not a functional change. > - mapcache_vcpu_init() is PV only (->pv_vcpu_initialise()?) This I shouldn't do. It's PV-only only temporarily. The directmap removal s= eries (in-flight for a while now, but ought to make it upstream sooner or later) = makes it also usable for HVM when the directmap is sparsely populated. I'd rather= not generate more churn than I have to for that series. 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The only two cases with link-time failures are >>> fallback else branches that can just as well be adjusted with explicit >>> IS_ENABLED(CONFIG_PV). HVM has no equivalent stubs and there's no reason >>> to keep the asymmetry. >>> >>> No functional change. >>> >>> Signed-off-by: Alejandro Vallejo >>> --- >>> I'd rather remove the "rc = -EOPNOTSUPP" branch altogether, or replace >>> it with ASSERT_UNREACHABLE(), but I kept it here to preserve prior behaviour. >>> >>> Thoughts? >>> >>> --- >>> xen/arch/x86/domain.c | 10 ++++++---- >>> xen/arch/x86/include/asm/pv/domain.h | 25 ------------------------- >>> 2 files changed, 6 insertions(+), 29 deletions(-) >>> >>> diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c >>> index 19fd86ce88..0977d9323d 100644 >>> --- a/xen/arch/x86/domain.c >>> +++ b/xen/arch/x86/domain.c >>> @@ -571,15 +571,17 @@ int arch_vcpu_create(struct vcpu *v) >>> >>> if ( is_hvm_domain(d) ) >>> rc = hvm_vcpu_initialise(v); >>> - else if ( !is_idle_domain(d) ) >>> - rc = pv_vcpu_initialise(v); >>> - else >>> + else if ( is_idle_domain(d) ) >>> { >> >> The is_idle_domain() wants to go first here, i think. >> [1] https://patchwork.kernel.org/comment/26646246/ > > I'm not sure I follow. I inverted the condition in order for the PV case to > become the fallback "else" and be thus eliminable through DCE. > >> >>> /* Idle domain */ >>> v->arch.cr3 = __pa(idle_pg_table); >>> rc = 0; >>> v->arch.msrs = ZERO_BLOCK_PTR; /* Catch stray misuses */ >>> } >>> + else if ( IS_ENABLED(CONFIG_PV) ) >>> + rc = pv_vcpu_initialise(v); >>> + else >>> + rc = -EOPNOTSUPP; >>> >>> if ( rc ) >>> goto fail; >> >> Actually, if you are here and have time and inspiration :) > > I may find at least one of those two :) > >> - if ( is_idle_domain(d) ) staff can be consolidated at the >> beginning of arch_vcpu_create() which will make it much more readable and simple. > > Good point > > Though it's subtle because the idle domain has wacky matching semantics > and there's many exit paths. Let me see if I can make a clearer version > with that sort of consolidation that is not a functional change. > >> - mapcache_vcpu_init() is PV only (->pv_vcpu_initialise()?) > > This I shouldn't do. It's PV-only only temporarily. The directmap removal series > (in-flight for a while now, but ought to make it upstream sooner or later) makes > it also usable for HVM when the directmap is sparsely populated. I'd rather not > generate more churn than I have to for that series. It's all up to you. -- Best regards, -grygorii From xen-devel-bounces@lists.xenproject.org Wed Nov 12 17:43:39 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 17:43:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160427.1488569 (Exim 4.92) (envelope-from ) id 1vJEsZ-0008Tv-0e; Wed, 12 Nov 2025 17:43:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160427.1488569; Wed, 12 Nov 2025 17:43:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJEsY-0008To-Ty; Wed, 12 Nov 2025 17:43:34 +0000 Received: by outflank-mailman (input) for mailman id 1160427; Wed, 12 Nov 2025 17:43:33 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 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11.11.2025 18:52, Grygorii Strashko wrote: >>>> On 10.11.25 09:11, Jan Beulich wrote: >>>>> On 07.11.2025 19:17, Grygorii Strashko wrote: >>>>>> --- a/xen/arch/x86/include/asm/guest_access.h >>>>>> +++ b/xen/arch/x86/include/asm/guest_access.h >>>>>> @@ -13,26 +13,64 @@ >>>>>>   #include >>>>>>     /* Raw access functions: no type checking. */ >>>>>> -#define raw_copy_to_guest(dst, src, len)        \ >>>>>> -    (is_hvm_vcpu(current) ?                     \ >>>>>> -     copy_to_user_hvm((dst), (src), (len)) :    \ >>>>>> -     copy_to_guest_pv(dst, src, len)) >>>>>> -#define raw_copy_from_guest(dst, src, len)      \ >>>>>> -    (is_hvm_vcpu(current) ?                     \ >>>>>> -     copy_from_user_hvm((dst), (src), (len)) :  \ >>>>>> -     copy_from_guest_pv(dst, src, len)) >>>>>> -#define raw_clear_guest(dst,  len)              \ >>>>>> -    (is_hvm_vcpu(current) ?                     \ >>>>>> -     clear_user_hvm((dst), (len)) :             \ >>>>>> -     clear_guest_pv(dst, len)) >>>>>> -#define __raw_copy_to_guest(dst, src, len)      \ >>>>>> -    (is_hvm_vcpu(current) ?                     \ >>>>>> -     copy_to_user_hvm((dst), (src), (len)) :    \ >>>>>> -     __copy_to_guest_pv(dst, src, len)) >>>>>> -#define __raw_copy_from_guest(dst, src, len)    \ >>>>>> -    (is_hvm_vcpu(current) ?                     \ >>>>>> -     copy_from_user_hvm((dst), (src), (len)) :  \ >>>>>> -     __copy_from_guest_pv(dst, src, len)) >>>>>> +static inline bool raw_use_hvm_access(const struct vcpu *v) >>>>>> +{ >>>>>> +    return IS_ENABLED(CONFIG_HVM) && (!IS_ENABLED(CONFIG_PV) || is_hvm_vcpu(v)); >>>>>> +} >>>>> >>>>> Without a full audit (likely tedious and error prone) this still is a >>>>> behavioral change for some (likely unintended) use against a system domain >>>>> (likely the idle one): With HVM=y PV=n we'd suddenly use the HVM accessor >>>>> there. IOW imo the "system domains are implicitly PV" aspect wants >>>>> retaining, even if only "just in case". It's okay not to invoke the PV >>>>> accessor (but return "len" instead), but it's not okay to invoke the HVM >>>>> one. >>>> >>>> This patch is subset of "constify is_hvm_domain() for PV=n case" attempts. >>>> >>>> It was made under assumption that: >>>> "System domains do not have Guests running, so can't initiate hypecalls and >>>>  can not be users of copy_to/from_user() routines. There are no Guest and no user memory". >>>> [IDLE, COW, IO, XEN] >>>> >>>> If above assumption is correct - this patch was assumed safe. >>>> >>>> if not - it all make no sense, probably. >>> >>> I wouldn't go as far as saying that. It can be arranged to avid the corner >>> case I mentioned, I think. >> >> do you mean adding "&& !is_system_domain(v->domain)" in raw_use_hvm_access()? > > No, we want to avoid adding any new any runtime checks. > >> Hm, I see that vcpu(s) are not even created for system domains in domain_create(). >> So seems !is_system_domain(v->domain) == true always here. > > "always" in what sense? It _should_ be always true, but in the unlikely event we > have a path where it isn't (which we could be sure of only after a full audit), > behavior there shouldn't change in the described problematic way. > >> Am I missing smth? >> Or you meant smth. else? > > I was thinking of something along the lines of > > if ( is_hvm_vcpu(current) ) this condition will not be constified any more for HVM=y and PV=n > return ..._hvm(); > > if ( !IS_ENABLED(CONFIG_PV) ) > return len; > > return ..._pv(); Possible benefit will be reduced from: add/remove: 2/9 grow/shrink: 2/90 up/down: 1678/-32560 (-30882) to: add/remove: 3/8 grow/shrink: 3/89 up/down: 1018/-12087 (-11069) Any way it is smth. -- Best regards, -grygorii From xen-devel-bounces@lists.xenproject.org Wed Nov 12 18:54:26 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 18:54:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160445.1488579 (Exim 4.92) (envelope-from ) id 1vJFyr-00011Q-4R; Wed, 12 Nov 2025 18:54:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160445.1488579; Wed, 12 Nov 2025 18:54:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJFyr-00011J-1Y; Wed, 12 Nov 2025 18:54:09 +0000 Received: by outflank-mailman (input) for mailman id 1160445; Wed, 12 Nov 2025 18:54:08 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJFyp-00011D-VJ for xen-devel@lists.xenproject.org; Wed, 12 Nov 2025 18:54:08 +0000 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [2a00:1450:4864:20::32a]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id f6e754d3-bff8-11f0-9d18-b5c5bf9af7f9; Wed, 12 Nov 2025 19:54:06 +0100 (CET) Received: by mail-wm1-x32a.google.com with SMTP id 5b1f17b1804b1-47774d3536dso137705e9.0 for ; Wed, 12 Nov 2025 10:54:06 -0800 (PST) Received: from localhost.localdomain (host-78-149-11-196.as13285.net. [78.149.11.196]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-47787e3a63asm50059175e9.1.2025.11.12.10.54.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Nov 2025 10:54:04 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: f6e754d3-bff8-11f0-9d18-b5c5bf9af7f9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1762973646; x=1763578446; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=5k8Z21gLVTYm6B0Dso+ikwMCEQe44y5PQXbxI2nGMZ8=; b=HojHs3gGCLKeByheAJ4MhydMIb7RzEs+0cHTiznDIAG602Hd10Gxzfhx26Z/LBAjeS S1d3ihd7kbugTqEuSulJxxYp9IuUWNWb0I4EW/A3qlD6Rc3+0GoieV83LidBN2mk+6Do hr6/WncLvL9SlgVT5tL8MyT2vmkVv+IQYRsAY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1762973646; x=1763578446; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=5k8Z21gLVTYm6B0Dso+ikwMCEQe44y5PQXbxI2nGMZ8=; b=P4SAckpWg/cRWhO9MuNv5uA97J/i7YOfDvsGQ+A5pC1lWKsTZ4aBoMebZkc4+cTuNj h2P9pHnl2d0mdPRJ48+MMblcj7kpWwfkDPQhFbx4Fy267EGX9zCicfNURDJ+FFJbcCo5 5yz43JV3Zk3cVsIp6L5bwJrgkhnjsDEw7VWFiki4Z2q2QgJ9XVsfQDZst8R7clxfRG9r PFTUuNgJfBbzN1HlTTI99oPrvYd9sUWBvNP4FyLiaaNfPqD7uDWlN0g7sEsDFCxI8ps8 gRNRB/PfupmvDCRE7vgUWWEzl8mxrF25ZWWEBhAtXm/cNYB2oyIap9L6D29EgcgO1v1V tuLg== X-Gm-Message-State: AOJu0Yx/AbpjZY/VDA9BKzbSr/yIDj9etSlQAdF6qOwa5KqpIN5eRpns EhtVOSQC4sXVo4TlZd3HcD17bYgHtaPU5c8lmmBFPF2IjffJRYxYWEthRNeirv0OmXRfa+2+7c6 vetjN1Ok= X-Gm-Gg: ASbGncvZdu4Ig8DahXYgfzZtMTiIgD1HqYMzh9b8txIWXugMqddTPcQ9DfUjI9gvLc9 RGvPj/IS17aQfyHmCWu0vDLvWmYMA4Lpgpag5Nn9CCu3Yl7u8KtkpPsINrIsWh4idW5d8ARo2/0 208H8YeS8u4EjlJNT6VU0D2TuMD+WFdEZu2mXbizwFMB6ymoMRNa1EUjm11Y2r5427V2t76NXTf +9atLex9Cv8npAbRtl4t77UivV7p0U9D+kRjcs5fjkfTW7dBdCjoXWEUCtgN5BywfxoatGkMd0v b33FkVYQ+IFOjGZSoXnq19i2jv3obvpX+u7CdQpZyzTeSFSfORfE0SFCNngP836llPgyzoyYkSV HKv6QWpN+oF2R7ZVawJq/n2RS9GlJ3nE6uIOSPwQOJtdRE6Ji11re/lnTgH+SWYrDGaIDXTLIM7 oQn2wnxjYxBA/M7mRMeFHu8GlooPmL0NS6C7JNzakAg9qiG9cAX8s= X-Google-Smtp-Source: AGHT+IFElUgNsYU/vgmDo87ZKRZvl5iBZKGXHPA7SDIMCOuW10l69/+cwQSxoZZuMwEmL2rTILPuNg== X-Received: by 2002:a05:600c:154d:b0:477:4f97:cb31 with SMTP id 5b1f17b1804b1-4778bd2c40emr3920195e9.2.1762973645252; Wed, 12 Nov 2025 10:54:05 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Oleksii Kurochko Subject: [PATCH] docs: Rewrite the Tagging and Branching checklist Date: Wed, 12 Nov 2025 18:54:02 +0000 Message-Id: <20251112185402.209485-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit There's a lot of stale information in the current checklists. Merge the documents and present the information in chronological order. Provide real examples from the tree rather than trying to be too prescriptive. Signed-off-by: Andrew Cooper --- CC: Anthony PERARD CC: Michal Orzel CC: Jan Beulich CC: Julien Grall CC: Roger Pau Monné CC: Stefano Stabellini CC: Oleksii Kurochko A rendered version can be found here: https://andrewcoop-xen.readthedocs.io/en/docs-branching/process/tagging-branching.html As I'm about to do the 4.21 release, I'm tempted to defer this patch until after I've done so, so all the examples can be consistently 4.21. I wanted to replace CVS with something more modern, but Git really sucks with binary files and this repo in particular. (For anyone interested, the VM is so small that the Git server process OOM's when you try to clone it.) This is (AFAICT) an accurate statement of what gets done. It highlights some inconsistences with how we branch and tag other trees, particularly QEMU which is now the only tree that moves back to being master. --- docs/index.rst | 9 + docs/process/branching-checklist.txt | 91 -------- docs/process/index.rst | 9 + docs/process/release-technician-checklist.txt | 174 ---------------- docs/process/tagging-branching.rst | 194 ++++++++++++++++++ 5 files changed, 212 insertions(+), 265 deletions(-) delete mode 100644 docs/process/branching-checklist.txt create mode 100644 docs/process/index.rst delete mode 100644 docs/process/release-technician-checklist.txt create mode 100644 docs/process/tagging-branching.rst diff --git a/docs/index.rst b/docs/index.rst index bd87d736b9c3..3513d4b609d8 100644 --- a/docs/index.rst +++ b/docs/index.rst @@ -54,6 +54,15 @@ kind of development environment. misc/ci +Process documentation +--------------------- + +.. toctree:: + :maxdepth: 2 + + process/index + + Unsorted documents ------------------ diff --git a/docs/process/branching-checklist.txt b/docs/process/branching-checklist.txt deleted file mode 100644 index 9632888a56e2..000000000000 --- a/docs/process/branching-checklist.txt +++ /dev/null @@ -1,91 +0,0 @@ -=== Before starting === - -Access to the following accounts is necessary: - * xenbits.xen.org: xen, xendocs - * osstest.osstest-test-lab: osstest - -=== Check list === - -v=4.1 -ov=4.0 - -# make branches in xenbits.xen.org qemus - ssh xen@xenbits.xen.org - cd ~/git/qemu-xen.git - git branch staging-$v staging - git branch stable-$v master - -# make branch in libvirt - ssh xen@xenbits.xen.org - cd ~/git/libvirt.git/ - git branch osstest/frozen/xen-$v-testing xen-tested-master - -# make branches in xenbits.xen.org xen.git - ssh xen@xenbits.xen.org - cd ~/git/xen.git - git branch staging-$v staging - git branch stable-$v master - -# update xendocs@xenbits docs generator to generate new stable branch -# docs too. commit to git. -* make 13:37 https://xenbits.xen.org/docs/4.2-testing/ is now live true -#14:17 HOWTO: login to xenbits. become "xendocs" . cd cronjobs . edit -# xenbits-docs-all.sh in the obvious way. git commit - ssh xendocs@xenbits.xen.org - cd cronjobs - ed xenbits-docs-all.sh - /for branch - s/$/ 4.6-testing - # ^ OR SIMILAR - w - q - git add -p - git commit -m "Branch for $v" - -* make branches etc. in osstest - ssh osstest@osstest.test-lab - cd testing.git - OSSTEST_CONFIG=production-config ./mg-branch-setup xen-$v-testing bisect - OSSTEST_CONFIG=production-config ./mg-branch-setup qemu-upstream-$v-testing bisect - -* add branch to osstest - Add both qemu-upstream-$v-testing and xen-$v-testing to BRANCHES in cr-for-branches - git add -p - git commit -m "cr-for-branches: Add Xen and QEMU $v branch" - -* add to patchbot - ssh xen@xenbits.xen.org - cd ~/HG/patchbot/ - - cp xen--master.patchbot-reported-heads xen--stable-$v.patchbot-reported-heads - cp xen--staging.patchbot-reported-heads xen--staging-$v.patchbot-reported-heads - cp qemu-xen--master.patchbot-reported-heads qemu-xen--stable-$v.patchbot-reported-heads - cp qemu-xen--staging.patchbot-reported-heads qemu-xen--staging-$v.patchbot-reported-heads - - #emacs versions - perl -i~ -pe 'next unless m/\b\Q'$ov'\E\b/; $x=$_; $x=~ s/\b\Q'$ov'\E\b/'$v'/g; print $x;' versions - git diff - git add versions - git commit -m "Branch for $v" - -Ensure references to qemu trees and Mini-OS in xen.git's Config.mk are updated. -The variables and there content should be: - * QEMU_UPSTREAM_REVISION: qemu-xen-X.Y.0 - * MINIOS_UPSTREAM_REVISION: xen-RELEASE-X.Y.0 -Where X.Y is the release version (e.g. 4.17). - -Update newly diverging staging (unstable) according to -release-technician-checklist.txt section re README etc. - -Update newly diverging staging-$v according to -release-technician-checklist.txt section re README etc., -including turning off debug. - -Set off a manual osstest run, since the osstest cr-for-branches change -will take a while to take effect: - ssh osstest@osstest.test-lab - cd testing.git - screen -S $v - BRANCHES=xen-$v-testing ./cr-for-branches branches -w "./cr-daily-branch --real" - -Send message to committers and RM. Use previous mail as a template. diff --git a/docs/process/index.rst b/docs/process/index.rst new file mode 100644 index 000000000000..d83d6ba9271d --- /dev/null +++ b/docs/process/index.rst @@ -0,0 +1,9 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +Process documentation +===================== + +.. toctree:: + :maxdepth: 2 + + tagging-branching diff --git a/docs/process/release-technician-checklist.txt b/docs/process/release-technician-checklist.txt deleted file mode 100644 index ae369c6dc5de..000000000000 --- a/docs/process/release-technician-checklist.txt +++ /dev/null @@ -1,174 +0,0 @@ - -s=master -#b=unstable -v=$v-rc1 - -OR - -x=4.1 -m=1 -rc=-rc2 - -r=$x.$m -s=$x-testing -#b=$x-testing -v=$r$rc - -t=$r$rc -OR -t=RELEASE-$r - - -# FIRSTLY -# - check (for point releases, but not RCs) all XSAs have been applied (Lars) -# -* check, even for point releases -* http://logs.test-lab.xenproject.org/osstest/results/all-branch-statuses.txt - - -# QEMU - - git checkout $s - git show # should show appropriate intended commit - git-tag -u 'Xen.org Xen tree code signing' -m "Xen $v" xen-$v - -# consider making tag in minios, and updating xen.git Config.mk - git checkout SOMETHING - git show # should show appropriate intended commit - git-tag -u 'xen tree' -s -m "Xen $r$rc" xen-$t - git push xen@xenbits.xen.org:/home/xen/git/mini-os.git xen-$t - -* Also tag upstream qemu tree (Stefano) - git checkout SOMETHING - git show # should show appropriate intended commit - git tag -u 'xen tree' -s -m "Xen $r$rc" qemu-xen-$v - git push osstest@xenbits.xen.org:/home/xen/git/qemu-xen.git qemu-xen-$v - -* consider bumping sonames of shlibs - -* change xen-unstable README. The banner (generated using figlet) should say: - - "Xen 4.5" in releases and on stable branches - - "Xen 4.5-unstable" on unstable - - "Xen 4.5-rc" for release candidate - -* for major releases, drop staging-only text from MAINTAINERS and add stable - maintainer(s) there - -* change xen-unstable Config.mk -# QEMU_UPSTREAM_REVISION, -# MINIOS_UPSTREAM_REVISION -# (drop any references to the specific commits, e.g. date or title) -* change SUPPORT.md heading version number; -unstable or -rc tag -* (empty in stable branches after .0 release). -* SUPPORT.md: insert correct version number in release-notes link -* CHANGELOG.md: set section heading to delete UNRELEASED and add date; -# in unstable branches set to X.Y.0 and RELEASE-X.YY.0 -* change xen-unstable xen/Makefile XEN_EXTRAVERSION -# if main version number has changed (eg 4.7 -> 4.8) rerun ./autogen.sh -* rerun ./autogen.sh to update version number in configure -# - XEN_EXTRAVERSION should be as follows -# `.0-rc$(XEN_VENDORVERSION)' during freeze, first rc onwards (including staging, before branching) -# `-unstable$(XEN_VENDORVERSION)' unstable aka unfrozen staging (or unstable branch, after branching) -# `.0$(XEN_VENDORVERSION)' actual release of Xen X.Y.0 (aka first actual release of Xen X.Y) -# `.Z$(XEN_VENDORVERSION)' actual release of Xen X.Y.Z (stable point realase) -# `.Z-pre$(XEN_VENDORVERSION)' stable branch, after release of Z-1 -# -# - turn off debug on stable branches, if not already done -# - tools/Rules.mk -# debug ?= n -# - xen/Kconfig.debug -# config DEBUG -# default n - -* tag xen-unstable - -# In xen.git - git-fetch origin - git-checkout staging-$x - git-pull - git-show # should show commit updating version to right version - git-tag -u 'xen tree' -s -m "Xen $r$rc" $t - git-push origin $t - git-push origin staging-$x -## hg tag ; hg sign -k "Xen tree" - - - -HANDLING TAG GENERATED BY RELEASE MANAGER - - fetch the tag into my tree - make the tarball (RELEASE TARBALL, below) - test build (see below) - website (see below) - merge tag into staging and push to staging - maybe force push into master - definitely push tag to xenbits - git-push origin $t - - - - -RELEASE TARBALL - - for 4.5 and later, use tarball target - git checkout $t - git clean -xdff - # export http_proxy=http://localhost:3128/ - ./configure - make src-tarball-release # must be used for actual releases - make src-tarball # uses git-describe (best for RCs) - # ^find some way to add git-cache-proxy to this (done in ~iwj/.gitconfig) - mkdir /volatile/iwj/website-thing/xen.org/oss-xen/release/$v - mv dist/xen-$v.tar.[glx]z /volatile/iwj/website-thing/xen.org/oss-xen/release/$v/. - - # website-thing/xen.org is cvs -d mail.xenproject.org:/home/downloads-cvs/cvs-repos co xen.org - cd /volatile/iwj/website-thing/xen.org - -# test build - cd /volatile/iwj/d - mkdir build - cd build - tar zxf /volatile/iwj/website-thing/xen.org/oss-xen/release/$v/xen-$v.tar.gz -# rsync -a --delete xen-$v build/ - cd xen-$v - export http_proxy=http://localhost:3128/ - (./configure && make -j4 KERNELS='' && echo ok.) 2>&1 | tee ../log.$v # post 4.2 - -# [[ test build amd64 ]] - - cvs add -kb oss-xen/release/$v/ - - cd oss-xen/release/$v - for t in xen-$v.tar.[glx]z - do - gpg --digest-algo=SHA256 --detach-sign -u 'xen tree' $t - cvs add -kb $t - cvs add -kb $t.sig - done - cd ../../.. - - cvs ci -m $v - - ssh downloads-cvs@mail.xenproject.org - cd /data/downloads.xenproject.org/xen.org - cvs -q up -d - # should show something like - # U oss-xen/release/4.8.0-rc2/xen-4.8.0-rc2.tar.gz - # U oss-xen/release/4.8.0-rc2/xen-4.8.0-rc2.tar.gz.sig - # U oss-xen/release/4.8.0-rc2/xen-4.8.0-rc2.tar.lz - # U oss-xen/release/4.8.0-rc2/xen-4.8.0-rc2.tar.lz.sig - # U oss-xen/release/4.8.0-rc2/xen-4.8.0-rc2.tar.xz - # U oss-xen/release/4.8.0-rc2/xen-4.8.0-rc2.tar.xz.sig - -After a .0 release, update XEN_EXTRAVERSION again (to .1-pre, see above). - -After a .0 release, -Update new stable tree's MAINTAINERS to contain correct info for this -stable branch: usually, copy text from previous -staging-$ov:MAINTAINERS section "Stable Release Maintenance" -into new staging-$v, deleting what's there. - git cat-file blob origin/staging-$ov:MAINTAINERS >MAINTAINERS -and review the changes, commiting ONLY THE RELEVANT ONES - -Notify release manager of completion - diff --git a/docs/process/tagging-branching.rst b/docs/process/tagging-branching.rst new file mode 100644 index 000000000000..b39dd2c248a1 --- /dev/null +++ b/docs/process/tagging-branching.rst @@ -0,0 +1,194 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +=============================== +Tagging and Branching Checklist +=============================== + +Before starting +=============== + + * Review this checklist for changes during the development window. + * Access to the following necessary: + + * The 'xen tree' signing key. + * The xen and xendocs users on xenbits.xen.org + * The downloads-cvs user on mail.xenproject.org + * A checkout of the xen.org CVS repository + +:: + + cvs -d downloads-cvs@mail.xenproject.org:/home/downloads-cvs/cvs-repos checkout xen.org + + +For RC1 +======= + + * Pin ``QEMU_UPSTREAM_REVISION`` to an exact SHA. Commit. + + * Update ``XEN_EXTRAVERSION`` from ``-unstable`` to ``.0-rc1``. For + ``README`` and ``SUPPORT.md``, use the slightly more generic ``-rc`` so + they doesn't need to change during subsequent RCs. Commit. + + * Tag. Produce tarballs. + +e.g. from Xen 4.21, ``ffd25d717a74^..d1478321eacb``:: + + * d1478321eacb - (tag: 4.21.0-rc1) Update Xen version to 4.21.0-rc1 + * ffd25d717a74 - Config.mk: Pin QEMU_UPSTREAM_REVISION + + +For subsequent RCs +================== + + * Update ``XEN_EXTRAVERSION`` to the next RC number. Commit. Tag. + +e.g. from Xen 4.21, ``eff32008be0d`` and ``9632ce6fe5b2``:: + + * 9632ce6fe5b2 - (tag: 4.21.0-rc3) Update Xen version to 4.21.0-rc3 + * eff32008be0d - (tag: 4.21.0-rc2) Update Xen version to 4.21.0-rc2 + + +Branching +========= + +On xenbits: + + * Create new staging and stable branches in xen.git. + + * Add the new branches to patchbot. In ``~xen/HG/patchbot`` copy the exsting + master and staging reported heads, update the ``versions`` file, and commit + the result. + + * Add the new stable branch to the docs cronjob. In ``~xendocs/cronjobs`` + edit ``xenbits-docs-all.sh`` and commit the result. e.g.: + +:: + + ssh xenbits.xen.org + + cd ~xen/git/xen.git + git branch staging-$v staging + git branch stable-$v master + + cd ~xen/HG/patchbot + cp xen--master.patchbot-reported-heads xen--stable-$v.patchbot-reported-heads + cp xen--staging.patchbot-reported-heads xen--staging-$v.patchbot-reported-heads + $EDITOR versions + git commit -am "Branch for $v" + + cd ~xendocs/cronjobs + $EDITOR xenbits-docs-all.sh + git commit -am "Branch for $v" + + +On the new branch: + + * Switch to release builds by default. Commit. + +On staging: + + * Update ``XEN_SUBVERSION`` to the next version. Update + ``XEN_EXTRAVERSION``, ``README`` and ``SUPPORT.md`` back to ``-unstable``. + Commit. Tag the start of the new development window. + + * Rerun ``./autogen.sh`` to refresh the configure scripts. Commit. + + * Switch ``QEMU_UPSTREAM_REVISION`` back to ``master``. Commit. + + * Create a new section in ``CHANGELOG.md``. Commit. + +e.g. from Xen 4.21, ``d510f9c1430c^..62d0a92057ca`` and ``d510f9c1430c^..b0255656d121``:: + + * 62d0a92057ca - CHANGELOG.md: Start a new 4.22 section + * 7b88e463f999 - Config.mk: Switch QEMU back to master + * d954e8c5c8de - Rerun ./autogen.sh for 4.22 + * 85768c28b705 - (tag: 4.22-dev) Update Xen to 4.22 + | * b0255656d121 - (staging-4.21) Switch to release builds by default + |/ + * d510f9c1430c - doc/man: Align list of viridian default enlightenments with libxl + + +Releasing +========= + + * Finalise the release dates in ``CHANGELOG.md`` (backported from staging) + and ``SUPPORT.md`` (only in the release branch). + + * Tag the release in relevant external repos, and update ``Config.mk`` to + refer to the tag. + + * Update ``XEN_EXTRAVERSION`` to drop the ``-rc`` suffix, and update + ``README`` to match. Commit. + + * Tag. Produce tarballs. + +e.g. from Xen 4.20, ``5cd830509d38^..3ad5d648cda5``:: + + * 3ad5d648cda5 - (tag: RELEASE-4.20.0) Update to Xen 4.20 + * 89fd1ba88403 - Config.mk: Bump tags to final + * 6bf05e086765 - SUPPORT.md: Define support lifetime + * 5cd830509d38 - CHANGELOG.md: Set release date for 4.20 + + +Tagging +======= + + * Confirm that HEAD is on the commit which adjusts ``XEN_EXTRAVERSION`` + suitably. i.e. ``git show`` shows the intended commit. Check that all CIs + are happy with this commit. + + * Tags are expected to be in one of following forms: + + * ``RELEASE-$X.$Y.$Z`` for releases. + * ``$X.$Y.0-rc$N`` for release candidates. + * ``$X.$Y-dev`` for development windows. + + * Tags need to be annotated and signed with the appropriate key. e.g.: + +:: + + git tag -u 'xen tree' -s -m "Xen $VER.0-rc1" $VER.0-rc1 + + +Producing tarballs +================== + + * Confirm that HEAD is tagged. i.e. ``git describe`` does not contain a SHA + on the end. + + * In the root of Xen, run ``make src-tarball-release``. This produces one or + more tarballs with different compression schemes. + + * In the CVS repostiory, create a new directory and add it. Copy the + tarballs in, sign them and add them. Commit the result (pushes to the + server). + + * On mail.xenproject.org, update the webroot. e.g.: + +:: + + cd /path/to/xen.git + make src-tarball-release + ... # output in dist/ + + cd /path/to/xen.org.cvs + + # Make and add new directory + mkdir oss-xen/release/$VER + cvs add -kb oss-xen/release/$VER + + # Copy the tarballs, sign and add them + cp /path/to/xen.git/dist/xen-*.tar.* . + for t in xen-*.tar.* + do + gpg --digest-algo=SHA256 --detach-sign -u 'xen tree' $t + cvs add -kb $t + cvs add -kb $t.sig + done + + # Commit the result (also pushes to the server) + cvs commit -m $VER + + # SSH to the server and update the webroot + ssh downloads-cvs@mail.xenproject.org -- \ + 'cd /data/downloads.xenproject.org/xen.org/; cvs -q update -d' base-commit: 781cf8affe407654fd5d216f3bcb148601f1a61f -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Wed Nov 12 20:25:04 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 20:25:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160465.1488590 (Exim 4.92) (envelope-from ) id 1vJHOd-0003sv-EF; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AS2PR03MB8907.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: bbf0c264-22de-456f-7def-08de22298456 X-MS-Exchange-CrossTenant-originalarrivaltime: 12 Nov 2025 20:24:44.2242 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: pOHRy2lgcMw/WnBzFXI3UdIOdeND1zyyKUnVuja0wbh8odI3K631wGqa54lcMpJMuhSm6tyAfSOLpefd4FCcSzVBdNid11OFk5AI1FFHkwk= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS4PR03MB8506 From: Grygorii Strashko The VMTRACE feature is depends on Platform/Arch HW and code support and now can be used only on x86 HVM with Intel VT-x (INTEL_VMX) enabled. This makes VMTRACE support optional by introducing HVM Kconfig option: - CONFIG_VMTRACE to enable/disable the feature. Signed-off-by: Grygorii Strashko --- changes in v2: - fix comments from Jan Beulich - move CONFIG_VMTRACE in HVM - drop HAS_VMTRACE =20 v1: https://patchwork.kernel.org/project/xen-devel/patch/20251031212005.133821= 2-1-grygorii_strashko@epam.com/ xen/arch/x86/domctl.c | 4 ++++ xen/arch/x86/hvm/Kconfig | 12 ++++++++++++ xen/arch/x86/hvm/vmx/vmcs.c | 2 ++ xen/arch/x86/hvm/vmx/vmx.c | 11 +++++++++++ xen/arch/x86/include/asm/guest-msr.h | 2 ++ xen/arch/x86/include/asm/hvm/hvm.h | 10 ++++++++++ xen/arch/x86/include/asm/hvm/vmx/vmcs.h | 2 ++ xen/arch/x86/mm/mem_sharing.c | 2 ++ xen/arch/x86/vm_event.c | 7 ++++--- xen/common/domain.c | 10 ++++++++++ xen/common/memory.c | 6 ++++++ xen/common/vm_event.c | 3 ++- xen/include/xen/domain.h | 4 ++++ xen/include/xen/sched.h | 4 ++++ 14 files changed, 75 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 6153e3c07e2d..d9521808dcba 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -154,6 +154,7 @@ void arch_get_domain_info(const struct domain *d, static int do_vmtrace_op(struct domain *d, struct xen_domctl_vmtrace_op *o= p, XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl) { +#ifdef CONFIG_VMTRACE struct vcpu *v; int rc; =20 @@ -198,6 +199,9 @@ static int do_vmtrace_op(struct domain *d, struct xen_d= omctl_vmtrace_op *op, vcpu_unpause(v); =20 return rc; +#else + return -EOPNOTSUPP; +#endif } =20 #define MAX_IOPORTS 0x10000 diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig index c1a131d1851a..5c47a45c9350 100644 --- a/xen/arch/x86/hvm/Kconfig +++ b/xen/arch/x86/hvm/Kconfig @@ -35,6 +35,18 @@ config INTEL_VMX If your system includes a processor with Intel VT-x support, say Y. If in doubt, say Y. =20 +config VMTRACE + bool "HW VM tracing support" + depends on INTEL_VMX + default y + help + Enables HW VM tracing support which allows to configure HW processor + features (vmtrace_op) to enable capturing information about software + execution using dedicated hardware facilities with minimal interfere= nce + to the software being traced. The trace data can be retrieved using = buffer + shared between Xen and domain + (see XENMEM_acquire_resource(XENMEM_resource_vmtrace_buf)). + config HVM_FEP bool "HVM Forced Emulation Prefix support (UNSUPPORTED)" if UNSUPPORTED default DEBUG diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c index cd5ac8a5f0e3..2fffc2006ab0 100644 --- a/xen/arch/x86/hvm/vmx/vmcs.c +++ b/xen/arch/x86/hvm/vmx/vmcs.c @@ -307,6 +307,7 @@ static int vmx_init_vmcs_config(bool bsp) rdmsrl(MSR_IA32_VMX_MISC, _vmx_misc_cap); =20 /* Check whether IPT is supported in VMX operation. */ +#ifdef CONFIG_VMTRACE if ( bsp ) vmtrace_available =3D cpu_has_proc_trace && (_vmx_misc_cap & VMX_MISC_PROC_TRACE); @@ -317,6 +318,7 @@ static int vmx_init_vmcs_config(bool bsp) smp_processor_id()); return -EINVAL; } +#endif =20 if ( caps.cpu_based_exec_control & CPU_BASED_ACTIVATE_SECONDARY_CONTRO= LS ) { diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index e2b5077654ef..66367adf3393 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -619,6 +619,7 @@ static void cf_check domain_creation_finished(struct do= main *d) =20 static void vmx_init_ipt(struct vcpu *v) { +#ifdef CONFIG_VMTRACE unsigned int size =3D v->domain->vmtrace_size; =20 if ( !size ) @@ -629,6 +630,7 @@ static void vmx_init_ipt(struct vcpu *v) ASSERT(size >=3D PAGE_SIZE && (size & (size - 1)) =3D=3D 0); =20 v->arch.msrs->rtit.output_limit =3D size - 1; +#endif } =20 static int cf_check vmx_vcpu_initialise(struct vcpu *v) @@ -721,11 +723,13 @@ static void vmx_save_guest_msrs(struct vcpu *v) */ v->arch.hvm.vmx.shadow_gs =3D read_gs_shadow(); =20 +#ifdef CONFIG_VMTRACE if ( v->arch.hvm.vmx.ipt_active ) { rdmsrl(MSR_RTIT_OUTPUT_MASK, msrs->rtit.output_mask); rdmsrl(MSR_RTIT_STATUS, msrs->rtit.status); } +#endif =20 if ( cp->feat.pks ) msrs->pkrs =3D rdpkrs_and_cache(); @@ -744,12 +748,14 @@ static void vmx_restore_guest_msrs(struct vcpu *v) if ( cpu_has_msr_tsc_aux ) wrmsr_tsc_aux(msrs->tsc_aux); =20 +#ifdef CONFIG_VMTRACE if ( v->arch.hvm.vmx.ipt_active ) { wrmsrl(MSR_RTIT_OUTPUT_BASE, page_to_maddr(v->vmtrace.pg)); wrmsrl(MSR_RTIT_OUTPUT_MASK, msrs->rtit.output_mask); wrmsrl(MSR_RTIT_STATUS, msrs->rtit.status); } +#endif =20 if ( cp->feat.pks ) wrpkrs(msrs->pkrs); @@ -2563,6 +2569,7 @@ static bool cf_check vmx_get_pending_event( return true; } =20 +#ifdef CONFIG_VMTRACE /* * We only let vmtrace agents see and modify a subset of bits in MSR_RTIT_= CTL. * These all pertain to data-emitted into the trace buffer(s). Must not @@ -2705,6 +2712,7 @@ static int cf_check vmtrace_reset(struct vcpu *v) v->arch.msrs->rtit.status =3D 0; return 0; } +#endif =20 static uint64_t cf_check vmx_get_reg(struct vcpu *v, unsigned int reg) { @@ -2877,11 +2885,14 @@ static struct hvm_function_table __initdata_cf_clob= ber vmx_function_table =3D { .altp2m_vcpu_emulate_ve =3D vmx_vcpu_emulate_ve, .altp2m_vcpu_emulate_vmfunc =3D vmx_vcpu_emulate_vmfunc, #endif + +#ifdef CONFIG_VMTRACE .vmtrace_control =3D vmtrace_control, .vmtrace_output_position =3D vmtrace_output_position, .vmtrace_set_option =3D vmtrace_set_option, .vmtrace_get_option =3D vmtrace_get_option, .vmtrace_reset =3D vmtrace_reset, +#endif =20 .get_reg =3D vmx_get_reg, .set_reg =3D vmx_set_reg, diff --git a/xen/arch/x86/include/asm/guest-msr.h b/xen/arch/x86/include/as= m/guest-msr.h index 5f0cb0a93995..702f47fe1e16 100644 --- a/xen/arch/x86/include/asm/guest-msr.h +++ b/xen/arch/x86/include/asm/guest-msr.h @@ -50,6 +50,7 @@ struct vcpu_msrs }; } misc_features_enables; =20 +#ifdef CONFIG_VMTRACE /* * 0x00000560 ... 57x - MSR_RTIT_* * @@ -81,6 +82,7 @@ struct vcpu_msrs }; }; } rtit; +#endif =20 /* * 0x000006e1 - MSR_PKRS - Protection Key Supervisor. diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/= hvm/hvm.h index 6f174ef658f1..e59d91ded63d 100644 --- a/xen/arch/x86/include/asm/hvm/hvm.h +++ b/xen/arch/x86/include/asm/hvm/hvm.h @@ -234,12 +234,14 @@ struct hvm_function_table { int (*altp2m_vcpu_emulate_vmfunc)(const struct cpu_user_regs *regs); #endif =20 +#ifdef CONFIG_VMTRACE /* vmtrace */ int (*vmtrace_control)(struct vcpu *v, bool enable, bool reset); int (*vmtrace_output_position)(struct vcpu *v, uint64_t *pos); int (*vmtrace_set_option)(struct vcpu *v, uint64_t key, uint64_t value= ); int (*vmtrace_get_option)(struct vcpu *v, uint64_t key, uint64_t *valu= e); int (*vmtrace_reset)(struct vcpu *v); +#endif =20 uint64_t (*get_reg)(struct vcpu *v, unsigned int reg); void (*set_reg)(struct vcpu *v, unsigned int reg, uint64_t val); @@ -735,6 +737,7 @@ static inline bool altp2m_vcpu_emulate_ve(struct vcpu *= v) bool altp2m_vcpu_emulate_ve(struct vcpu *v); #endif /* CONFIG_ALTP2M */ =20 +#ifdef CONFIG_VMTRACE static inline int hvm_vmtrace_control(struct vcpu *v, bool enable, bool re= set) { if ( hvm_funcs.vmtrace_control ) @@ -769,13 +772,20 @@ static inline int hvm_vmtrace_get_option( =20 return -EOPNOTSUPP; } +#else +int hvm_vmtrace_output_position(struct vcpu *v, uint64_t *pos); +#endif =20 static inline int hvm_vmtrace_reset(struct vcpu *v) { +#ifdef CONFIG_VMTRACE if ( hvm_funcs.vmtrace_reset ) return alternative_call(hvm_funcs.vmtrace_reset, v); =20 return -EOPNOTSUPP; +#else + return 0; +#endif } =20 /* diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h b/xen/arch/x86/include= /asm/hvm/vmx/vmcs.h index ecd91389302c..24fd3162af40 100644 --- a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h @@ -146,8 +146,10 @@ struct vmx_vcpu { /* Do we need to tolerate a spurious EPT_MISCONFIG VM exit? */ bool ept_spurious_misconfig; =20 +#ifdef CONFIG_VMTRACE /* Processor Trace configured and enabled for the vcpu. */ bool ipt_active; +#endif =20 /* Is the guest in real mode? */ uint8_t vmx_realmode; diff --git a/xen/arch/x86/mm/mem_sharing.c b/xen/arch/x86/mm/mem_sharing.c index 4787b2796479..074f1b2562b3 100644 --- a/xen/arch/x86/mm/mem_sharing.c +++ b/xen/arch/x86/mm/mem_sharing.c @@ -1888,7 +1888,9 @@ static int fork(struct domain *cd, struct domain *d) domain_pause(d); cd->max_pages =3D d->max_pages; *cd->arch.cpu_policy =3D *d->arch.cpu_policy; +#ifdef CONFIG_VMTRACE cd->vmtrace_size =3D d->vmtrace_size; +#endif cd->parent =3D d; } =20 diff --git a/xen/arch/x86/vm_event.c b/xen/arch/x86/vm_event.c index fc349270b9c5..e9ac1d497594 100644 --- a/xen/arch/x86/vm_event.c +++ b/xen/arch/x86/vm_event.c @@ -253,7 +253,8 @@ void vm_event_fill_regs(vm_event_request_t *req) req->data.regs.x86.shadow_gs =3D ctxt.shadow_gs; req->data.regs.x86.dr6 =3D ctxt.dr6; =20 - if ( hvm_vmtrace_output_position(curr, &req->data.regs.x86.vmtrace_pos= ) !=3D 1 ) + if ( IS_ENABLED(CONFIG_VMTRACE) && + hvm_vmtrace_output_position(curr, &req->data.regs.x86.vmtrace_pos= ) !=3D 1 ) req->data.regs.x86.vmtrace_pos =3D ~0; #endif } @@ -303,12 +304,12 @@ void vm_event_emulate_check(struct vcpu *v, vm_event_= response_t *rsp) #endif } =20 +#ifdef CONFIG_VMTRACE void vm_event_reset_vmtrace(struct vcpu *v) { -#ifdef CONFIG_HVM hvm_vmtrace_reset(v); -#endif } +#endif =20 /* * Local variables: diff --git a/xen/common/domain.c b/xen/common/domain.c index e13e01c1d272..ce4f55339fb4 100644 --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -136,7 +136,9 @@ struct vcpu *idle_vcpu[NR_CPUS] __read_mostly; =20 vcpu_info_t dummy_vcpu_info; =20 +#ifdef CONFIG_VMTRACE bool __read_mostly vmtrace_available; +#endif =20 bool __read_mostly vpmu_is_available; =20 @@ -318,6 +320,7 @@ static void vcpu_info_reset(struct vcpu *v) =20 static void vmtrace_free_buffer(struct vcpu *v) { +#ifdef CONFIG_VMTRACE const struct domain *d =3D v->domain; struct page_info *pg =3D v->vmtrace.pg; unsigned int i; @@ -332,10 +335,12 @@ static void vmtrace_free_buffer(struct vcpu *v) put_page_alloc_ref(&pg[i]); put_page_and_type(&pg[i]); } +#endif } =20 static int vmtrace_alloc_buffer(struct vcpu *v) { +#ifdef CONFIG_VMTRACE struct domain *d =3D v->domain; struct page_info *pg; unsigned int i; @@ -377,6 +382,9 @@ static int vmtrace_alloc_buffer(struct vcpu *v) } =20 return -ENODATA; +#else + return 0; +#endif } =20 /* @@ -825,7 +833,9 @@ struct domain *domain_create(domid_t domid, ASSERT(!config->altp2m.nr); #endif =20 +#ifdef CONFIG_VMTRACE d->vmtrace_size =3D config->vmtrace_size; +#endif } =20 /* Sort out our idea of is_control_domain(). */ diff --git a/xen/common/memory.c b/xen/common/memory.c index 3688e6dd5032..66dc7f7a0a41 100644 --- a/xen/common/memory.c +++ b/xen/common/memory.c @@ -1155,8 +1155,10 @@ static unsigned int resource_max_frames(const struct= domain *d, case XENMEM_resource_ioreq_server: return ioreq_server_max_frames(d); =20 +#ifdef CONFIG_VMTRACE case XENMEM_resource_vmtrace_buf: return d->vmtrace_size >> PAGE_SHIFT; +#endif =20 default: return 0; @@ -1198,6 +1200,7 @@ static int acquire_ioreq_server(struct domain *d, #endif } =20 +#ifdef CONFIG_VMTRACE static int acquire_vmtrace_buf( struct domain *d, unsigned int id, unsigned int frame, unsigned int nr_frames, xen_pfn_t mfn_list[]) @@ -1220,6 +1223,7 @@ static int acquire_vmtrace_buf( =20 return nr_frames; } +#endif =20 /* * Returns -errno on error, or positive in the range [1, nr_frames] on @@ -1238,8 +1242,10 @@ static int _acquire_resource( case XENMEM_resource_ioreq_server: return acquire_ioreq_server(d, id, frame, nr_frames, mfn_list); =20 +#ifdef CONFIG_VMTRACE case XENMEM_resource_vmtrace_buf: return acquire_vmtrace_buf(d, id, frame, nr_frames, mfn_list); +#endif =20 default: ASSERT_UNREACHABLE(); diff --git a/xen/common/vm_event.c b/xen/common/vm_event.c index b2787c010890..cf0258223f50 100644 --- a/xen/common/vm_event.c +++ b/xen/common/vm_event.c @@ -441,7 +441,8 @@ static int vm_event_resume(struct domain *d, struct vm_= event_domain *ved) if ( rsp.flags & VM_EVENT_FLAG_GET_NEXT_INTERRUPT ) vm_event_monitor_next_interrupt(v); =20 - if ( rsp.flags & VM_EVENT_FLAG_RESET_VMTRACE ) + if ( IS_ENABLED(CONFIG_VMTRACE) && + (rsp.flags & VM_EVENT_FLAG_RESET_VMTRACE) ) vm_event_reset_vmtrace(v); =20 if ( rsp.flags & VM_EVENT_FLAG_VCPU_PAUSED ) diff --git a/xen/include/xen/domain.h b/xen/include/xen/domain.h index 8aab05ae93c8..aa86a9f46022 100644 --- a/xen/include/xen/domain.h +++ b/xen/include/xen/domain.h @@ -191,7 +191,11 @@ void vnuma_destroy(struct vnuma_info *vnuma); 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Message-ID: <7b2fe09a-02f4-4575-9e42-1328f3a40f1d@epam.com> Date: Wed, 12 Nov 2025 22:25:31 +0200 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH] x86/hvm: revise "cpu_has_vmx" usage for !CONFIG_INTEL_VMX case To: "xen-devel@lists.xenproject.org" Cc: Jan Beulich , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Alejandro Vallejo References: <20250924101417.229108-1-grygorii_strashko@epam.com> Content-Language: en-US From: Grygorii Strashko In-Reply-To: <20250924101417.229108-1-grygorii_strashko@epam.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: WA2P291CA0046.POLP291.PROD.OUTLOOK.COM (2603:10a6:1d0:1f::15) To AS2PR03MB8907.eurprd03.prod.outlook.com (2603:10a6:20b:5e4::22) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AS2PR03MB8907:EE_|AS4PR03MB8506:EE_ X-MS-Office365-Filtering-Correlation-Id: 8090cf44-484a-46ec-9421-08de2229a10d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|376014|1800799024; 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On 24.09.25 13:14, Grygorii Strashko wrote: > From: Grygorii Strashko > > Since commit b99227347230 ("x86: Fix AMD_SVM and INTEL_VMX dependency") the > HVM Intel VT-x support can be disabled, but it still keeps VMX > code partially built-in. Particularly in HVM code there are two places: > > 1) hvm/dom0_build.c > dom0_construct_pvh()->pvh_populate_p2m() > ... > if ( cpu_has_vmx && paging_mode_hap(d) && !vmx_unrestricted_guest(v) ) > { > ... > [unreachable for !cpu_has_vmx case] > rc = pvh_setup_vmx_realmode_helpers(d); > > pvh_setup_vmx_realmode_helpers() allocates memory and configures > HVM_PARAM_VM86_TSS_SIZED > HVM_PARAM_IDENT_PT > > 2) hvm/hvm.c > hvm_set_param() > ... > case HVM_PARAM_IDENT_PT: > > if ( !paging_mode_hap(d) || !cpu_has_vmx ) > { > d->arch.hvm.params[index] = value; > break; > } > [unreachable for !cpu_has_vmx case] > ... > > Hence HVM_PARAM_IDENT_PT/HVM_PARAM_VM86_TSS_SIZED are used only by VMX code > above code become unreachable in !cpu_has_vmx case and can be optimazed > when !CONFIG_INTEL_VMX. > > Replace "cpu_has_vmx" with using_vmx() to account !CONFIG_INTEL_VMX and allow > compiler DCE to optimize code. > > Signed-off-by: Grygorii Strashko > --- > add/remove: 0/0 grow/shrink: 0/2 up/down: 0/-604 (-604) > Function old new delta > hvm_set_param 1602 1473 -129 > dom0_construct_pvh 4438 3963 -475 > Total: Before=3567191, After=3566587, chg -0.02% > > xen/arch/x86/hvm/dom0_build.c | 2 +- > xen/arch/x86/hvm/hvm.c | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c > index 5551f9044836..5ac2cf8394d8 100644 > --- a/xen/arch/x86/hvm/dom0_build.c > +++ b/xen/arch/x86/hvm/dom0_build.c > @@ -473,7 +473,7 @@ static int __init pvh_populate_p2m(struct domain *d) > } > } > > - if ( cpu_has_vmx && paging_mode_hap(d) && !vmx_unrestricted_guest(v) ) > + if ( using_vmx() && paging_mode_hap(d) && !vmx_unrestricted_guest(v) ) > { > /* > * Since Dom0 cannot be migrated, we will only setup the > diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c > index 95a80369b9b8..70331aeec9a0 100644 > --- a/xen/arch/x86/hvm/hvm.c > +++ b/xen/arch/x86/hvm/hvm.c > @@ -4302,7 +4302,7 @@ static int hvm_set_param(struct domain *d, uint32_t index, uint64_t value) > * Only actually required for VT-x lacking unrestricted_guest > * capabilities. Short circuit the pause if possible. > */ > - if ( !paging_mode_hap(d) || !cpu_has_vmx ) > + if ( !paging_mode_hap(d) || !using_vmx() ) > { > d->arch.hvm.params[index] = value; > break; -- Best regards, -grygorii From xen-devel-bounces@lists.xenproject.org Wed Nov 12 21:13:54 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Nov 2025 21:13:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160491.1488610 (Exim 4.92) (envelope-from ) id 1vJI9z-0002bT-5h; Wed, 12 Nov 2025 21:13:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160491.1488610; Wed, 12 Nov 2025 21:13:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJI9z-0002bM-35; Wed, 12 Nov 2025 21:13:47 +0000 Received: by outflank-mailman (input) for mailman id 1160491; Wed, 12 Nov 2025 21:13:45 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJI9x-0002bG-EY for xen-devel@lists.xenproject.org; Wed, 12 Nov 2025 21:13:45 +0000 Received: from mailhost.m5p.com (mailhost.m5p.com [74.104.188.4]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 76c637d7-c00c-11f0-9d18-b5c5bf9af7f9; Wed, 12 Nov 2025 22:13:43 +0100 (CET) Received: from m5p.com (mailhost.m5p.com [IPv6:2001:470:8ac4:0:0:0:0:f7]) by mailhost.m5p.com (8.18.1/8.17.1) with ESMTPS id 5ACLDYAA025674 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NO) for ; Wed, 12 Nov 2025 16:13:40 -0500 (EST) (envelope-from ehem@m5p.com) Received: (from ehem@localhost) by m5p.com (8.18.1/8.15.2/Submit) id 5ACLDYTn025673 for xen-devel@lists.xenproject.org; Wed, 12 Nov 2025 13:13:34 -0800 (PST) (envelope-from ehem) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 76c637d7-c00c-11f0-9d18-b5c5bf9af7f9 Date: Wed, 12 Nov 2025 13:13:34 -0800 From: Elliott Mitchell To: xen-devel@lists.xenproject.org Subject: Xen DomU Bootloader Experiences Message-ID: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline X-Spam-Status: No, score=0.4 required=10.0 tests=KHOP_HELO_FCRDNS autolearn=no autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on mattapan.m5p.com A few times there have been mentions of a need to choose between boot methods for DomUs. There is a need to decide on ones to recommend and put effort into supportting. I may not have tried that many nor done particularly great amounts of experimentation, but I do have some experience with multiple User Domain bootloaders. PyGRUB Xen's bootloader. PyGRUB is quite functional within its limits. In particular it simulates the domain's environment in Domain 0. This means the security exposure is problematic. Another big concern is that it only does GRUB v1 syntax. For a long while Debian had a package for generating those files on a modern system, but that package was dropped. Yet PyGRUB does avoid needing to use external tools to retrieve the kernel. If the kernel is updated inside the domain, this does get the new kernel. Further being architecture-independent this works on x86, ARM*, RISC-V and PowerPC. As it is the only GRUB-flavor loader available on ARM*, that is the only place where I've used PyGRUB. PvGRUB I'm sure nearly everyone knows about PvGRUB. By being a proper port of GRUB to run directly on Xen, it overcomes PyGRUB's disadvantages. The one disadvantage is needing to get patches into an external project for changes in Xen. Two changes to Xen urgently need propogation to PvGRUB. I'm unsure whether PvGRUB unmaps its mapping of vcpu_info data. The second is needing to work on ARM*, RISC-V and PowerPC. The latter is the one and only way in which PvGRUB is inferior to PyGRUB. As PvGRUB is only available for x86, that is the only place I've used PvGRUB. EDK2/Tianocore Quite well-known for being the basis of most x86 firmwares, plus being part of a typical Qemu setup. Not nearly as well known for being a Xen DomU bootloader. When it was working you would build their ArmVirtXen.dsc file and get XEN_EFI.fd as output. You would then use XEN_EFI.fd for the domain's kernel. If you looked at the console you saw something which looked and acted pretty similar to a UEFI firmware on x86 machines. This was extremely functional for OSes which didn't particularly like GRUB. Notably I've read of it being able to load a Redmond OS and it was quite functional for booting an ARM64 port of FreeBSD. Sometime after November 16th, 2022 or commit fff6d81270. The built images stopped functioning. This is actually rather concerning since it may also effects firmwares built for x86 HVM domains. I don't presently know whether there are multiple bugs, or a single one effecting all Xen builds. There is also an urgent need to get EDK2/Tianocore updated to match Xen/ARM's disallowing mapping the shared information page multiple times. As I did not wish to become deeply involved with EDK2/Tianocore I sent a patch to xen-devel close to 1.5 years ago. Lack of action suggests there is an urgent need for a liason. Recommendations: PyGRUB is functional within its limits. Problems are GRUBv1 syntax and running within Domain 0. Given this I feel the Xen Project should be heading towards deprecating PyGRUB. Since PvGRUB works for x86 now, I would default to neither building nor installing PyGRUB on x86. For other architectures PyGRUB is still useful. The Xen Project should formally ask the GRUB Project to port PvGRUB to ARM, RISC-V and PowerPC. The need for PvGRUB on ARM seems rather urgent. Without a proper bootloader VMs aren't too useful. The Xen Project needs people to work with EDK2/Tianocore. The oldest report I've seen of the EDK2/Tianocore issue dates to mid-2023. Now two years later the bug is still present. The ability to configure XEN_EFI.fd as a domain kernel is a feature highly worthy of being ported to x86. For OSes which don't particularly like GRUB, but do have PV drivers this is an ideal boot method. -- (\___(\___(\______ --=> 8-) EHM <=-- ______/)___/)___/) \BS ( | ehem+sigmsg@m5p.com PGP 87145445 | ) / \_CS\ | _____ -O #include O- _____ | / _/ 8A19\___\_|_/58D2 7E3D DDF4 7BA6 <-PGP-> 41D1 B375 37D0 8714\_|_/___/5445 From xen-devel-bounces@lists.xenproject.org Thu Nov 13 01:01:43 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 01:01:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160463.1488620 (Exim 4.92) (envelope-from ) id 1vJLiK-0005mb-Qh; Thu, 13 Nov 2025 01:01:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160463.1488620; Thu, 13 Nov 2025 01:01:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJLiK-0005mB-Mg; Thu, 13 Nov 2025 01:01:28 +0000 Received: by outflank-mailman (input) for mailman id 1160463; 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- switch (boot_cpu_data.x86_model) { + switch (boot_cpu_data.model) { case 0x0f: /* Merom */ case 0x16: /* Merom L */ case 0x17: /* Penryn */ @@ -137,10 +137,10 @@ static void __init probe_masking_msrs(void) unsigned int exp_msr_basic, exp_msr_ext, exp_msr_xsave; /* Only family 6 supports this feature. */ - if (c->x86 != 6) + if (c->family != 6) return; - switch (c->x86_model) { + switch (c->model) { case 0x17: /* Yorkfield, Wolfdale, Penryn, Harpertown(DP) */ case 0x1d: /* Dunnington(MP) */ msr_basic = MSR_INTEL_MASK_V1_CPUID1; @@ -191,7 +191,7 @@ static void __init probe_masking_msrs(void) expected_levelling_cap, levelling_caps, (expected_levelling_cap ^ levelling_caps) & levelling_caps); printk(XENLOG_WARNING "Fam %#x, model %#x expected (%#x/%#x/%#x), " - "got (%#x/%#x/%#x)\n", c->x86, c->x86_model, + "got (%#x/%#x/%#x)\n", c->family, c->model, exp_msr_basic, exp_msr_ext, exp_msr_xsave, msr_basic, msr_ext, msr_xsave); printk(XENLOG_WARNING @@ -265,7 +265,7 @@ static void __init noinline intel_init_levelling(void) * so skip it altogether. In the case where Xen is virtualized these * MSRs may be emulated though, so we allow it in that case. */ - if ((boot_cpu_data.x86 != 0xf || cpu_has_hypervisor) && + if ((boot_cpu_data.family != 0xf || cpu_has_hypervisor) && probe_cpuid_faulting()) { expected_levelling_cap |= LCAP_faulting; levelling_caps |= LCAP_faulting; @@ -348,7 +348,7 @@ void intel_unlock_cpuid_leaves(struct cpuinfo_x86 *c) static void cf_check early_init_intel(struct cpuinfo_x86 *c) { /* Netburst reports 64 bytes clflush size, but does IO in 128 bytes */ - if (c->x86 == 15 && c->x86_cache_alignment == 64) + if (c->family == 15 && c->x86_cache_alignment == 64) c->x86_cache_alignment = 128; if (c == &boot_cpu_data && @@ -358,8 +358,8 @@ static void cf_check early_init_intel(struct cpuinfo_x86 *c) intel_unlock_cpuid_leaves(c); /* CPUID workaround for Intel 0F33/0F34 CPU */ - if (boot_cpu_data.x86 == 0xF && boot_cpu_data.x86_model == 3 && - (boot_cpu_data.x86_mask == 3 || boot_cpu_data.x86_mask == 4)) + if (boot_cpu_data.vfm == INTEL_P4_PRESCOTT && + (boot_cpu_data.stepping == 3 || boot_cpu_data.stepping == 4)) paddr_bits = 36; if (c == &boot_cpu_data) { @@ -458,7 +458,7 @@ static void Intel_errata_workarounds(struct cpuinfo_x86 *c) { uint64_t val; - if ((c->x86 == 15) && (c->x86_model == 1) && (c->x86_mask == 1)) { + if ( c->vfm == INTEL_P4_WILLAMETTE && c->stepping == 1 ) { val = rdmsr(MSR_IA32_MISC_ENABLE); if ((val & (1 << 9)) == 0) { printk (KERN_INFO "CPU: C0 stepping P4 Xeon detected.\n"); @@ -468,8 +468,10 @@ static void Intel_errata_workarounds(struct cpuinfo_x86 *c) } } - if (c->x86 == 6 && cpu_has_clflush && - (c->x86_model == 29 || c->x86_model == 46 || c->x86_model == 47)) + if ( cpu_has_clflush && + ( c->vfm == INTEL_CORE2_DUNNINGTON || + c->vfm == INTEL_NEHALEM_EX || + c->vfm == INTEL_WESTMERE_EX )) setup_force_cpu_cap(X86_BUG_CLFLUSH_MONITOR); probe_c3_errata(c); @@ -540,7 +542,7 @@ static void intel_log_freq(const struct cpuinfo_x86 *c) } } - switch ( c->x86 ) + switch ( c->family ) { static const unsigned short core_factors[] = { 26667, 13333, 20000, 16667, 33333, 10000, 40000 }; @@ -553,7 +555,7 @@ static void intel_log_freq(const struct cpuinfo_x86 *c) if ( !max_ratio ) return; - switch ( c->x86_model ) + switch ( c->model ) { case 0x0e: /* Core */ case 0x0f: case 0x16: case 0x17: case 0x1d: /* Core2 */ @@ -657,8 +659,8 @@ static void cf_check init_intel(struct cpuinfo_x86 *c) /* Work around errata */ Intel_errata_workarounds(c); - if ((c->x86 == 0xf && c->x86_model >= 0x03) || - (c->x86 == 0x6 && c->x86_model >= 0x0e)) + if ((c->family == 0xf && c->model >= 0x03) || + (c->family == 0x6 && c->model >= 0x0e)) __set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability); if (cpu_has(c, X86_FEATURE_ITSC)) { __set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability); diff --git a/xen/arch/x86/include/asm/intel-family.h b/xen/arch/x86/include/asm/intel-family.h index d8c0bcc406..c71e744731 100644 --- a/xen/arch/x86/include/asm/intel-family.h +++ b/xen/arch/x86/include/asm/intel-family.h @@ -179,6 +179,10 @@ #define INTEL_XEON_PHI_KNL IFM(6, 0x57) /* Knights Landing */ #define INTEL_XEON_PHI_KNM IFM(6, 0x85) /* Knights Mill */ +/* Family 15 - NetBurst */ +#define INTEL_P4_WILLAMETTE IFM(15, 0x01) /* Also Xeon Foster */ +#define INTEL_P4_PRESCOTT IFM(15, 0x03) + /* Family 5 */ #define INTEL_FAM5_QUARK_X1000 0x09 /* Quark X1000 SoC */ #define INTEL_QUARK_X1000 IFM(5, 0x09) /* Quark X1000 SoC */ -- 2.51.1 From xen-devel-bounces@lists.xenproject.org Thu Nov 13 03:17:20 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 03:17:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160536.1488641 (Exim 4.92) (envelope-from ) id 1vJNpi-0003tL-G4; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2025 03:17:06.9043 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d93d08d4-bafd-4e1f-3a9d-08de22632023 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF00004687.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV9PR12MB9832 Feature monitor_op is based on vm event subsystem, so monitor.o shall be wrapped under CONFIG_VM_EVENT. The following functions are only invoked by monitor-op, so they all shall be wrapped with CONFIG_VM_EVENT (otherwise they will become unreachable and violate Misra rule 2.1 when VM_EVENT=n): - hvm_enable_msr_interception - hvm_function_table.enable_msr_interception - hvm_has_set_descriptor_access_existing - hvm_function_table.set_descriptor_access_existi - arch_monitor_get_capabilities Function monitored_msr() still needs a stub to pass compilation when VM_EVENT=n. Signed-off-by: Penny Zheng --- v3 -> v4: - a new commit split from previous "xen/vm_event: consolidate CONFIG_VM_EVENT" - Another blank line ahead of the #ifdef - Move hvm_enable_msr_interception() up into the earlier #ifdef - only arch_monitor_get_capabilities() needs wrapping, as this static inline function calls hvm_has_set_descriptor_access_exiting(), which is declared only when VM_EVENT=y --- xen/arch/x86/hvm/Makefile | 2 +- xen/arch/x86/hvm/svm/svm.c | 8 +++++++- xen/arch/x86/hvm/vmx/vmx.c | 10 ++++++++++ xen/arch/x86/include/asm/hvm/hvm.h | 18 +++++++++++------- xen/arch/x86/include/asm/monitor.h | 9 +++++++++ 5 files changed, 38 insertions(+), 9 deletions(-) diff --git a/xen/arch/x86/hvm/Makefile b/xen/arch/x86/hvm/Makefile index 6ec2c8f2db..50e0b6e63b 100644 --- a/xen/arch/x86/hvm/Makefile +++ b/xen/arch/x86/hvm/Makefile @@ -16,7 +16,7 @@ obj-y += io.o obj-y += ioreq.o obj-y += irq.o obj-y += mmio.o -obj-y += monitor.o +obj-$(CONFIG_VM_EVENT) += monitor.o obj-y += mtrr.o obj-y += nestedhvm.o obj-y += pmtimer.o diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 9de2fd950e..06e4572d89 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -299,6 +299,7 @@ void svm_intercept_msr(struct vcpu *v, uint32_t msr, int flags) __clear_bit(msr * 2 + 1, msr_bit); } +#ifdef CONFIG_VM_EVENT static void cf_check svm_enable_msr_interception(struct domain *d, uint32_t msr) { struct vcpu *v; @@ -306,6 +307,7 @@ static void cf_check svm_enable_msr_interception(struct domain *d, uint32_t msr) for_each_vcpu ( d, v ) svm_intercept_msr(v, msr, MSR_INTERCEPT_WRITE); } +#endif /* CONFIG_VM_EVENT */ static void svm_save_dr(struct vcpu *v) { @@ -826,6 +828,7 @@ static void cf_check svm_set_rdtsc_exiting(struct vcpu *v, bool enable) vmcb_set_general2_intercepts(vmcb, general2_intercepts); } +#ifdef CONFIG_VM_EVENT static void cf_check svm_set_descriptor_access_exiting( struct vcpu *v, bool enable) { @@ -843,6 +846,7 @@ static void cf_check svm_set_descriptor_access_exiting( vmcb_set_general1_intercepts(vmcb, general1_intercepts); } +#endif /* CONFIG_VM_EVENT */ static unsigned int cf_check svm_get_insn_bytes(struct vcpu *v, uint8_t *buf) { @@ -2457,9 +2461,11 @@ static struct hvm_function_table __initdata_cf_clobber svm_function_table = { .fpu_dirty_intercept = svm_fpu_dirty_intercept, .msr_read_intercept = svm_msr_read_intercept, .msr_write_intercept = svm_msr_write_intercept, +#ifdef CONFIG_VM_EVENT .enable_msr_interception = svm_enable_msr_interception, - .set_rdtsc_exiting = svm_set_rdtsc_exiting, .set_descriptor_access_exiting = svm_set_descriptor_access_exiting, +#endif + .set_rdtsc_exiting = svm_set_rdtsc_exiting, .get_insn_bytes = svm_get_insn_bytes, .nhvm_vcpu_initialise = nsvm_vcpu_initialise, diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 2e9da26016..d29c9a2ff2 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -1520,6 +1520,7 @@ static void cf_check vmx_set_rdtsc_exiting(struct vcpu *v, bool enable) vmx_vmcs_exit(v); } +#ifdef CONFIG_VM_EVENT static void cf_check vmx_set_descriptor_access_exiting( struct vcpu *v, bool enable) { @@ -1534,6 +1535,7 @@ static void cf_check vmx_set_descriptor_access_exiting( vmx_update_secondary_exec_control(v); vmx_vmcs_exit(v); } +#endif /* CONFIG_VM_EVENT */ static void cf_check vmx_init_hypercall_page(void *p) { @@ -2413,6 +2415,7 @@ static void cf_check vmx_handle_eoi(uint8_t vector, int isr) printk_once(XENLOG_WARNING "EOI for %02x but SVI=%02x\n", vector, old_svi); } +#ifdef CONFIG_VM_EVENT static void cf_check vmx_enable_msr_interception(struct domain *d, uint32_t msr) { struct vcpu *v; @@ -2420,6 +2423,7 @@ static void cf_check vmx_enable_msr_interception(struct domain *d, uint32_t msr) for_each_vcpu ( d, v ) vmx_set_msr_intercept(v, msr, VMX_MSR_W); } +#endif /* CONFIG_VM_EVENT */ #ifdef CONFIG_ALTP2M @@ -2871,7 +2875,9 @@ static struct hvm_function_table __initdata_cf_clobber vmx_function_table = { .nhvm_domain_relinquish_resources = nvmx_domain_relinquish_resources, .update_vlapic_mode = vmx_vlapic_msr_changed, .nhvm_hap_walk_L1_p2m = nvmx_hap_walk_L1_p2m, +#ifdef CONFIG_VM_EVENT .enable_msr_interception = vmx_enable_msr_interception, +#endif #ifdef CONFIG_ALTP2M .altp2m_vcpu_update_p2m = vmx_vcpu_update_eptp, .altp2m_vcpu_update_vmfunc_ve = vmx_vcpu_update_vmfunc_ve, @@ -3079,9 +3085,11 @@ const struct hvm_function_table * __init start_vmx(void) vmx_function_table.caps.singlestep = cpu_has_monitor_trap_flag; +#ifdef CONFIG_VM_EVENT if ( cpu_has_vmx_dt_exiting ) vmx_function_table.set_descriptor_access_exiting = vmx_set_descriptor_access_exiting; +#endif /* * Do not enable EPT when (!cpu_has_vmx_pat), to prevent security hole @@ -3152,8 +3160,10 @@ void __init vmx_fill_funcs(void) if ( !cpu_has_xen_ibt ) return; +#ifdef CONFIG_VM_EVENT vmx_function_table.set_descriptor_access_exiting = vmx_set_descriptor_access_exiting; +#endif vmx_function_table.update_eoi_exit_bitmap = vmx_update_eoi_exit_bitmap; vmx_function_table.process_isr = vmx_process_isr; diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/hvm/hvm.h index f02183691e..da00ed0694 100644 --- a/xen/arch/x86/include/asm/hvm/hvm.h +++ b/xen/arch/x86/include/asm/hvm/hvm.h @@ -192,7 +192,11 @@ struct hvm_function_table { void (*handle_cd)(struct vcpu *v, unsigned long value); void (*set_info_guest)(struct vcpu *v); void (*set_rdtsc_exiting)(struct vcpu *v, bool enable); + +#ifdef CONFIG_VM_EVENT void (*set_descriptor_access_exiting)(struct vcpu *v, bool enable); + void (*enable_msr_interception)(struct domain *d, uint32_t msr); +#endif /* Nested HVM */ int (*nhvm_vcpu_initialise)(struct vcpu *v); @@ -224,8 +228,6 @@ struct hvm_function_table { paddr_t *L1_gpa, unsigned int *page_order, uint8_t *p2m_acc, struct npfec npfec); - void (*enable_msr_interception)(struct domain *d, uint32_t msr); - #ifdef CONFIG_ALTP2M /* Alternate p2m */ void (*altp2m_vcpu_update_p2m)(struct vcpu *v); @@ -433,11 +435,18 @@ static inline bool using_svm(void) #define hvm_long_mode_active(v) (!!((v)->arch.hvm.guest_efer & EFER_LMA)) +#ifdef CONFIG_VM_EVENT static inline bool hvm_has_set_descriptor_access_exiting(void) { return hvm_funcs.set_descriptor_access_exiting; } +static inline void hvm_enable_msr_interception(struct domain *d, uint32_t msr) +{ + alternative_vcall(hvm_funcs.enable_msr_interception, d, msr); +} +#endif /* CONFIG_VM_EVENT */ + static inline void hvm_domain_creation_finished(struct domain *d) { if ( hvm_funcs.domain_creation_finished ) @@ -679,11 +688,6 @@ static inline int nhvm_hap_walk_L1_p2m( v, L2_gpa, L1_gpa, page_order, p2m_acc, npfec); } -static inline void hvm_enable_msr_interception(struct domain *d, uint32_t msr) -{ - alternative_vcall(hvm_funcs.enable_msr_interception, d, msr); -} - static inline bool hvm_is_singlestep_supported(void) { return hvm_funcs.caps.singlestep; diff --git a/xen/arch/x86/include/asm/monitor.h b/xen/arch/x86/include/asm/monitor.h index 3c64d8258f..9249324fd0 100644 --- a/xen/arch/x86/include/asm/monitor.h +++ b/xen/arch/x86/include/asm/monitor.h @@ -71,6 +71,7 @@ int arch_monitor_domctl_op(struct domain *d, struct xen_domctl_monitor_op *mop) return rc; } +#ifdef CONFIG_VM_EVENT static inline uint32_t arch_monitor_get_capabilities(struct domain *d) { uint32_t capabilities = 0; @@ -102,6 +103,7 @@ static inline uint32_t arch_monitor_get_capabilities(struct domain *d) return capabilities; } +#endif /* CONFIG_VM_EVENT */ int arch_monitor_domctl_event(struct domain *d, struct xen_domctl_monitor_op *mop); @@ -123,7 +125,14 @@ static inline void arch_monitor_cleanup_domain(struct domain *d) {} #endif +#ifdef CONFIG_VM_EVENT bool monitored_msr(const struct domain *d, u32 msr); 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2025 03:16:55.4358 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 73c397f4-8748-4d9b-d82b-08de2263194d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF0000468D.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB6189 This patch serie originates from "Disable domctl-op via CONFIG_MGMT_HYPERCALLS" [1], and focuses on consolidating vm event subsystem (i.e. VM_EVENT), and its derived features, like memory paging, etc. [1] https://www.mail-archive.com/xen-devel@lists.xenproject.org/msg200843.html Penny Zheng (7): xen/svm: limit the scope of "rc" xen/vm_event: introduce vm_event_is_enabled() xen/monitor: wrap monitor_op under CONFIG_VM_EVENT xen/p2m: move xenmem_access_to_p2m_access() to common p2m.c xen/x86: move declaration from mem_access.h to altp2m.h xen/mem_access: wrap memory access when VM_EVENT=n xen/vm_event: consolidate CONFIG_VM_EVENT xen/arch/x86/Makefile | 2 +- xen/arch/x86/hvm/Kconfig | 1 - xen/arch/x86/hvm/Makefile | 4 +- xen/arch/x86/hvm/emulate.c | 67 +++++++------- xen/arch/x86/hvm/hvm.c | 123 ++++++++++++++++---------- xen/arch/x86/hvm/svm/intr.c | 2 +- xen/arch/x86/hvm/svm/svm.c | 82 +++++++++++------ xen/arch/x86/hvm/vmx/intr.c | 2 +- xen/arch/x86/hvm/vmx/vmx.c | 73 +++++++++------ xen/arch/x86/include/asm/altp2m.h | 10 +++ xen/arch/x86/include/asm/hvm/hvm.h | 18 ++-- xen/arch/x86/include/asm/mem_access.h | 20 ++--- xen/arch/x86/include/asm/monitor.h | 9 ++ xen/arch/x86/include/asm/vm_event.h | 8 ++ xen/arch/x86/mm/mem_access.c | 36 -------- xen/arch/x86/mm/mem_sharing.c | 3 + xen/arch/x86/mm/p2m.c | 38 ++++++++ xen/common/Kconfig | 7 +- xen/include/xen/vm_event.h | 7 ++ 19 files changed, 319 insertions(+), 193 deletions(-) -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Thu Nov 13 03:17:21 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 03:17:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160537.1488650 (Exim 4.92) (envelope-from ) id 1vJNpn-00049Z-Ns; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2025 03:17:07.2920 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ab65e609-fbd7-44ef-6f32-08de2263205e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF00004689.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB8231 Memory access and ALTP2M are two seperate features, while both depending on helper xenmem_access_to_p2m_access(). So it betters lives in common p2m.c, other than mem_access.c which will be compiled out when VM_EVENT=n && ALTP2M=y. Coding style has been corrected at the same time. Signed-off-by: Penny Zheng --- v3 -> v4: - new commit --- xen/arch/x86/mm/mem_access.c | 36 ---------------------------------- xen/arch/x86/mm/p2m.c | 38 ++++++++++++++++++++++++++++++++++++ 2 files changed, 38 insertions(+), 36 deletions(-) diff --git a/xen/arch/x86/mm/mem_access.c b/xen/arch/x86/mm/mem_access.c index e6b609064c..e55e53f44c 100644 --- a/xen/arch/x86/mm/mem_access.c +++ b/xen/arch/x86/mm/mem_access.c @@ -298,42 +298,6 @@ static int set_mem_access(struct domain *d, struct p2m_domain *p2m, return rc; } -bool xenmem_access_to_p2m_access(const struct p2m_domain *p2m, - xenmem_access_t xaccess, - p2m_access_t *paccess) -{ - static const p2m_access_t memaccess[] = { -#define ACCESS(ac) [XENMEM_access_##ac] = p2m_access_##ac - ACCESS(n), - ACCESS(r), - ACCESS(w), - ACCESS(rw), - ACCESS(x), - ACCESS(rx), - ACCESS(wx), - ACCESS(rwx), - ACCESS(rx2rw), - ACCESS(n2rwx), - ACCESS(r_pw), -#undef ACCESS - }; - - switch ( xaccess ) - { - case 0 ... ARRAY_SIZE(memaccess) - 1: - xaccess = array_index_nospec(xaccess, ARRAY_SIZE(memaccess)); - *paccess = memaccess[xaccess]; - break; - case XENMEM_access_default: - *paccess = p2m->default_access; - break; - default: - return false; - } - - return true; -} - /* * Set access type for a region of gfns. * If gfn == INVALID_GFN, sets the default access type. diff --git a/xen/arch/x86/mm/p2m.c b/xen/arch/x86/mm/p2m.c index e2a00a0efd..f2bf5ef8d3 100644 --- a/xen/arch/x86/mm/p2m.c +++ b/xen/arch/x86/mm/p2m.c @@ -2189,6 +2189,44 @@ void p2m_log_dirty_range(struct domain *d, unsigned long begin_pfn, guest_flush_tlb_mask(d, d->dirty_cpumask); } +bool xenmem_access_to_p2m_access(const struct p2m_domain *p2m, + xenmem_access_t xaccess, + p2m_access_t *paccess) +{ + static const p2m_access_t memaccess[] = { +#define ACCESS(ac) [XENMEM_access_##ac] = p2m_access_##ac + ACCESS(n), + ACCESS(r), + ACCESS(w), + ACCESS(rw), + ACCESS(x), + ACCESS(rx), + ACCESS(wx), + ACCESS(rwx), + ACCESS(rx2rw), + ACCESS(n2rwx), + ACCESS(r_pw), +#undef ACCESS + }; + + switch ( xaccess ) + { + case 0 ... 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2025 03:17:07.5706 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cfeb5208-3e14-4044-f6da-08de22632088 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF00004687.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB8371 Memory access and ALTP2M are two seperate features, and each could be controlled via VM_EVENT or ALTP2M. In order to avoid implicit declaration when ALTP2M=y and VM_EVENT=n on compiling hvm.o/altp2m.o, we move declaration of the following functions from to : - p2m_set_suppress_ve - p2m_set_suppress_ve_multi - p2m_get_suppress_ve Potential error on altp2m.c also breaks Misra Rule 8.4. Signed-off-by: Penny Zheng --- v3 -> v4: - new commit --- xen/arch/x86/include/asm/altp2m.h | 10 ++++++++++ xen/arch/x86/include/asm/mem_access.h | 10 ---------- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/xen/arch/x86/include/asm/altp2m.h b/xen/arch/x86/include/asm/altp2m.h index 8ecd74f363..9c1ac3cc26 100644 --- a/xen/arch/x86/include/asm/altp2m.h +++ b/xen/arch/x86/include/asm/altp2m.h @@ -46,6 +46,16 @@ void altp2m_vcpu_destroy(struct vcpu *v); int altp2m_vcpu_enable_ve(struct vcpu *v, gfn_t gfn); void altp2m_vcpu_disable_ve(struct vcpu *v); +int p2m_set_suppress_ve(struct domain *d, gfn_t gfn, bool suppress_ve, + unsigned int altp2m_idx); + +struct xen_hvm_altp2m_suppress_ve_multi; +int p2m_set_suppress_ve_multi(struct domain *d, + struct xen_hvm_altp2m_suppress_ve_multi *sve); + +int p2m_get_suppress_ve(struct domain *d, gfn_t gfn, bool *suppress_ve, + unsigned int altp2m_idx); + #else static inline bool altp2m_is_eptp_valid(const struct domain *d, diff --git a/xen/arch/x86/include/asm/mem_access.h b/xen/arch/x86/include/asm/mem_access.h index 1a52a10322..257ed33de1 100644 --- a/xen/arch/x86/include/asm/mem_access.h +++ b/xen/arch/x86/include/asm/mem_access.h @@ -34,16 +34,6 @@ bool p2m_mem_access_emulate_check(struct vcpu *v, /* Sanity check for mem_access hardware support */ bool p2m_mem_access_sanity_check(const struct domain *d); -int p2m_set_suppress_ve(struct domain *d, gfn_t gfn, bool suppress_ve, - unsigned int altp2m_idx); - -struct xen_hvm_altp2m_suppress_ve_multi; -int p2m_set_suppress_ve_multi(struct domain *d, - struct xen_hvm_altp2m_suppress_ve_multi *sve); - -int p2m_get_suppress_ve(struct domain *d, gfn_t gfn, bool *suppress_ve, - unsigned int altp2m_idx); - #endif /*__ASM_X86_MEM_ACCESS_H__ */ /* -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Thu Nov 13 03:17:25 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 03:17:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160543.1488670 (Exim 4.92) (envelope-from ) id 1vJNpt-0004ih-BE; Thu, 13 Nov 2025 03:17:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160543.1488670; Thu, 13 Nov 2025 03:17:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJNpt-0004iT-82; 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Smith" , Grygorii Strashko Subject: [PATCH v1 7/7] xen/vm_event: consolidate CONFIG_VM_EVENT Date: Thu, 13 Nov 2025 11:16:30 +0800 Message-ID: <20251113031630.1465599-8-Penny.Zheng@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251113031630.1465599-1-Penny.Zheng@amd.com> References: <20251113031630.1465599-1-Penny.Zheng@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF00004689:EE_|DS4PR12MB9746:EE_ X-MS-Office365-Filtering-Correlation-Id: d4ff8ba0-4d99-4b98-c692-08de22632405 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|1800799024|7416014|376014|82310400026; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?FDcAfJp1U6Ii+fmSMHNKMXIJQQPS/IepEDdskwbvBlf9ecIn5IBoc/Zixpuy?= =?us-ascii?Q?Zus6/atzI3qMHX3AFjPma2ABcjSxlN9akzXNdhSBoPfXh9spZ9mRu5bXSsKh?= =?us-ascii?Q?yllvqBXO409WRxFhtGlRcfsWaHbvkqzVPIW5xNywYt87V6dv5IXmUk3aSKdf?= =?us-ascii?Q?YocLSj0GojpMES1ddiXKqwJJ+lwO2EDNFJiU2gdqhH3CmEj0Iz/zPxg0ofx5?= =?us-ascii?Q?avxInJPkpRcP8qaXEbYHfz/MB0C43/2tU9jcHG6xHj6e47DPFNdiZTJ6VIrN?= =?us-ascii?Q?hy6AttQ1+XHjt0n3u3G7LnihpMG/DfFJEJbEvnAX9cEB2FJ4reC/uyzvCV1r?= =?us-ascii?Q?pj/EmQZ14WnrIgA+IjpV6fgHvjJInSBzvrllEPGsmEv2Rw0iebsoiIacmV+v?= =?us-ascii?Q?nSdlJKtyEyoWmYY3NcG5xH/q3AbQF5xGboy1dWtQR7iEgg7sZxEDCJ7+QC6D?= =?us-ascii?Q?HPmxNiD7ppgUbi3zKg2coztxmrTAGQ4M8d9yDMtDf+WVE/6K1XZUgnl6Wlcd?= =?us-ascii?Q?Rf0MW6FNcRyPSBfpoi3ukEUcyFjoImq1V/27Hgrg+Sj0Q+eRficLx5XEwvrA?= =?us-ascii?Q?F3U2hN118QDtvx8n2dshCga46uqXhzt37C/4IQffUU6DEQ/kcesJ10qP/AiN?= =?us-ascii?Q?C1mganS6qQY8tXTHkvipAwOp95D39bMq1YH5oivXeJYRZo588C5tmQWUaggK?= =?us-ascii?Q?+Yq+FNe3Ls5OW0qf/ZMlsrmYUABPmQPKmN6CIReNKDR3vOMjSBi+2wz7Bg5e?= =?us-ascii?Q?9pCuaO5sOJ2d/1oF97LETBHQROU71OwkQNgJqkuvjvTLKtYezLNGi74vxNoy?= =?us-ascii?Q?RIgz3l5VYq1t+GDf0YZpYog8iS667t9GXYrVav3EXyEWgWAdDvtV98RQsWle?= =?us-ascii?Q?nQ6JUJ0FuHapIuRAUEgDAeahgr19+gnWz+EWBrHCEVTSUSZiSbasEquvaobr?= =?us-ascii?Q?E4oce8mspALlYzIdEzSh+iJ84McDyP/fzWHM4gr61Tta/15ot0vhNKfn0Low?= =?us-ascii?Q?PtVt6W8auywARJneck36mInLt7FdRac+ucHqxUFd3lL3JDffOINhrhz7aPjk?= =?us-ascii?Q?BClPZNtscT9zhTD+aFu1vNfBSAKQXeoaAcsvvGsOyeTKz19CWWZHhRasUaT5?= =?us-ascii?Q?QdSS86UrbyiGU/b4AXtGCdKlRjQVikURNY5qD+CbzIo0hwF+mCvoD21gpXSp?= =?us-ascii?Q?4Y5Wmo8gEYMriRrCuM0Bh8PcEmcQgHQWLy8fsfYLEvIccw2VJhEn5N36xSS+?= =?us-ascii?Q?FwzQ5/uP2ce2ULOxk5iSAae+S6VAhtf7ZiBTdKFCq0TRJZ/oI2uCDKp1jwnj?= =?us-ascii?Q?f+HZ9bPxYSt6/h5T7DO1PkXy5sm+FFna17iOsDEjnT6wYC68AIi+O884Qw2N?= =?us-ascii?Q?RO0ApadnRrHY+n1R3D5pkNz1Pbbs63zQmS1Soy+oMaDMD/awlDIHwZdpvcuq?= =?us-ascii?Q?ptKYbuSopcGGwkAKr8JIY91xCwYI6d9rZpoVHjqylPh0hHxkRdXe7BSOwpsF?= =?us-ascii?Q?hydLXFBGKVlPfBlBUew+VsfttC6zkAX8wWlV0CgqdbwdkAQvGp9RX8Jc5J23?= =?us-ascii?Q?zoxFjXlmsDmOX+NpA/k=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(1800799024)(7416014)(376014)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2025 03:17:13.4226 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d4ff8ba0-4d99-4b98-c692-08de22632405 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF00004689.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS4PR12MB9746 File hvm/vm_event.c and x86/vm_event.c are the extend to vm_event handling routines, and its compilation shall be guarded by CONFIG_VM_EVENT too. Although CONFIG_VM_EVENT is right now forcibly enabled on x86 via MEM_ACCESS_ALWAYS_ON, we could disable it through disabling CONFIG_MGMT_HYPERCALLS later. So we remove MEM_ACCESS_ALWAYS_ON and make VM_EVENT=y on default only on x86 to retain the same. The following functions are developed on the basis of vm event framework, or only invoked by vm_event.c, so they all shall be wrapped with CONFIG_VM_EVENT (otherwise they will become unreachable and violate Misra rule 2.1 when VM_EVENT=n): - hvm_toggle_singlestep - hvm_fast_singlestep - hvm_emulate_one_vm_event - hvmemul_write{,cmpxchg,rep_ins,rep_outs,rep_movs,rep_stos,read_io,write_io}_discard And Function vm_event_check_ring() needs stub to pass compilation when VM_EVENT=n. Signed-off-by: Penny Zheng --- v1 -> v2: - split out XSM changes - remove unnecessary stubs - move "struct p2m_domain" declaration ahead of the #ifdef --- v2 -> v3: - move .enable_msr_interception and .set_descriptor_access_exiting together - with the introduction of "vm_event_is_enabled()", all hvm_monitor_xxx() stubs are no longer needed - change to use in-place stubs in do_altp2m_op() - no need to add stub for monitor_traps(), __vm_event_claim_slot(), vm_event_put_request() and vm_event_vcpu_pause() - remove MEM_ACCESS_ALWAYS_ON - return default p2m_access_rwx for xenmem_access_to_p2m_access() when VM_EVENT=n - add wrapping for hvm_emulate_one_vm_event/ hvmemul_write{,cmpxchg,rep_ins,rep_outs,rep_movs,rep_stos,read_io,write_io}_discard --- xen/arch/x86/Makefile | 2 +- xen/arch/x86/hvm/Kconfig | 1 - xen/arch/x86/hvm/Makefile | 2 +- xen/arch/x86/hvm/emulate.c | 58 ++++++++++++++++++++------------------ xen/arch/x86/hvm/hvm.c | 2 ++ xen/common/Kconfig | 7 ++--- xen/include/xen/vm_event.h | 7 +++++ 7 files changed, 44 insertions(+), 35 deletions(-) diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index 407571c510..f71ca9f18b 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -75,7 +75,7 @@ obj-y += usercopy.o obj-y += x86_emulate.o obj-$(CONFIG_TBOOT) += tboot.o obj-y += hpet.o -obj-y += vm_event.o +obj-$(CONFIG_VM_EVENT) += vm_event.o obj-y += xstate.o ifneq ($(CONFIG_PV_SHIM_EXCLUSIVE),y) diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig index f10a2b3744..ea957363a9 100644 --- a/xen/arch/x86/hvm/Kconfig +++ b/xen/arch/x86/hvm/Kconfig @@ -4,7 +4,6 @@ menuconfig HVM default !PV_SHIM select COMPAT select IOREQ_SERVER - select MEM_ACCESS_ALWAYS_ON help Interfaces to support HVM domains. HVM domains require hardware virtualisation extensions (e.g. Intel VT-x, AMD SVM), but can boot diff --git a/xen/arch/x86/hvm/Makefile b/xen/arch/x86/hvm/Makefile index 50e0b6e63b..952db00dd7 100644 --- a/xen/arch/x86/hvm/Makefile +++ b/xen/arch/x86/hvm/Makefile @@ -26,7 +26,7 @@ obj-y += save.o obj-y += stdvga.o obj-y += vioapic.o obj-y += vlapic.o -obj-y += vm_event.o +obj-$(CONFIG_VM_EVENT) += vm_event.o obj-y += vmsi.o obj-y += vpic.o obj-y += vpt.o diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c index fe75b0516d..d56ef02baf 100644 --- a/xen/arch/x86/hvm/emulate.c +++ b/xen/arch/x86/hvm/emulate.c @@ -1615,6 +1615,7 @@ static int cf_check hvmemul_blk( return rc; } +#ifdef CONFIG_VM_EVENT static int cf_check hvmemul_write_discard( enum x86_segment seg, unsigned long offset, @@ -1717,6 +1718,7 @@ static int cf_check hvmemul_cache_op_discard( { return X86EMUL_OKAY; } +#endif /* CONFIG_VM_EVENT */ static int cf_check hvmemul_cmpxchg( enum x86_segment seg, @@ -2750,33 +2752,6 @@ static const struct x86_emulate_ops hvm_emulate_ops = { .vmfunc = hvmemul_vmfunc, }; -static const struct x86_emulate_ops hvm_emulate_ops_no_write = { - .read = hvmemul_read, - .insn_fetch = hvmemul_insn_fetch, - .write = hvmemul_write_discard, - .cmpxchg = hvmemul_cmpxchg_discard, - .rep_ins = hvmemul_rep_ins_discard, - .rep_outs = hvmemul_rep_outs_discard, - .rep_movs = hvmemul_rep_movs_discard, - .rep_stos = hvmemul_rep_stos_discard, - .read_segment = hvmemul_read_segment, - .write_segment = hvmemul_write_segment, - .read_io = hvmemul_read_io_discard, - .write_io = hvmemul_write_io_discard, - .read_cr = hvmemul_read_cr, - .write_cr = hvmemul_write_cr, - .read_xcr = hvmemul_read_xcr, - .write_xcr = hvmemul_write_xcr, - .read_msr = hvmemul_read_msr, - .write_msr = hvmemul_write_msr_discard, - .cache_op = hvmemul_cache_op_discard, - .tlb_op = hvmemul_tlb_op, - .cpuid = x86emul_cpuid, - .get_fpu = hvmemul_get_fpu, - .put_fpu = hvmemul_put_fpu, - .vmfunc = hvmemul_vmfunc, -}; - /* * Note that passing VIO_no_completion into this function serves as kind * of (but not fully) an "auto select completion" indicator. When there's @@ -2887,6 +2862,34 @@ int hvm_emulate_one( return _hvm_emulate_one(hvmemul_ctxt, &hvm_emulate_ops, completion); } +#ifdef CONFIG_VM_EVENT +static const struct x86_emulate_ops hvm_emulate_ops_no_write = { + .read = hvmemul_read, + .insn_fetch = hvmemul_insn_fetch, + .write = hvmemul_write_discard, + .cmpxchg = hvmemul_cmpxchg_discard, + .rep_ins = hvmemul_rep_ins_discard, + .rep_outs = hvmemul_rep_outs_discard, + .rep_movs = hvmemul_rep_movs_discard, + .rep_stos = hvmemul_rep_stos_discard, + .read_segment = hvmemul_read_segment, + .write_segment = hvmemul_write_segment, + .read_io = hvmemul_read_io_discard, + .write_io = hvmemul_write_io_discard, + .read_cr = hvmemul_read_cr, + .write_cr = hvmemul_write_cr, + .read_xcr = hvmemul_read_xcr, + .write_xcr = hvmemul_write_xcr, + .read_msr = hvmemul_read_msr, + .write_msr = hvmemul_write_msr_discard, + .cache_op = hvmemul_cache_op_discard, + .tlb_op = hvmemul_tlb_op, + .cpuid = x86emul_cpuid, + .get_fpu = hvmemul_get_fpu, + .put_fpu = hvmemul_put_fpu, + .vmfunc = hvmemul_vmfunc, +}; + void hvm_emulate_one_vm_event(enum emul_kind kind, unsigned int trapnr, unsigned int errcode) { @@ -2949,6 +2952,7 @@ void hvm_emulate_one_vm_event(enum emul_kind kind, unsigned int trapnr, hvm_emulate_writeback(&ctx); } +#endif /* CONFIG_VM_EVENT */ void hvm_emulate_init_once( struct hvm_emulate_ctxt *hvmemul_ctxt, diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index c3417b0593..196de2db67 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -5297,6 +5297,7 @@ int hvm_debug_op(struct vcpu *v, int32_t op) return rc; } +#ifdef CONFIG_VM_EVENT void hvm_toggle_singlestep(struct vcpu *v) { ASSERT(atomic_read(&v->pause_count)); @@ -5323,6 +5324,7 @@ void hvm_fast_singlestep(struct vcpu *v, uint16_t p2midx) v->arch.hvm.fast_single_step.p2midx = p2midx; } #endif +#endif /* CONFIG_VM_EVENT */ /* * Segment caches in VMCB/VMCS are inconsistent about which bits are checked, diff --git a/xen/common/Kconfig b/xen/common/Kconfig index 53f681bbb2..0070fe42a6 100644 --- a/xen/common/Kconfig +++ b/xen/common/Kconfig @@ -170,13 +170,10 @@ config HAS_VMAP config LIBFDT bool -config MEM_ACCESS_ALWAYS_ON - bool - config VM_EVENT - def_bool MEM_ACCESS_ALWAYS_ON - prompt "Memory Access and VM events" if !MEM_ACCESS_ALWAYS_ON + bool "Memory Access and VM events" depends on HVM + default X86 help Framework to configure memory access types for guests and receive diff --git a/xen/include/xen/vm_event.h b/xen/include/xen/vm_event.h index 27d0c74216..1b76ce632e 100644 --- a/xen/include/xen/vm_event.h +++ b/xen/include/xen/vm_event.h @@ -51,7 +51,14 @@ struct vm_event_domain }; /* Returns whether a ring has been set up */ +#ifdef CONFIG_VM_EVENT bool vm_event_check_ring(struct vm_event_domain *ved); +#else +static inline bool vm_event_check_ring(struct vm_event_domain *ved) +{ + return false; +} +#endif /* CONFIG_VM_EVENT */ /* Returns 0 on success, -ENOSYS if there is no ring, -EBUSY if there is no * available space and the caller is a foreign domain. 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2025 03:17:09.6919 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7d405d3c-89d2-4f87-75c8-08de226321cc X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF00004689.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB7410 Feature memory access is based on vm event subsystem, and it could be disabled in the future. So a few switch-blocks in do_altp2m_op() need IS_ENABLED(CONFIG_VM_EVENT) wrapping to pass compilation when ALTP2M=y and VM_EVENT=n(, hence MEM_ACCESS=n), like HVMOP_altp2m_set_mem_access, etc. Function p2m_mem_access_check() still needs stub when VM_EVENT=n to pass compilation. Although local variable "req_ptr" still remains NULL throughout its lifetime, with the change of NULL assignment, we will face runtime undefined error only when CONFIG_USBAN is on. So we strengthen the condition check via adding vm_event_is_enabled() for the special case. Signed-off-by: Penny Zheng --- v3 -> v4: - a new commit split from previous "xen/vm_event: consolidate CONFIG_VM_EVENT" - use IS_ENABLED() to replace #ifdef - remove unnecessary changes in compat_altp2m_op() - strengthen the condition check to fix runtime undefined error when CONFIG_USBAN=y --- xen/arch/x86/hvm/hvm.c | 97 +++++++++++++++------------ xen/arch/x86/include/asm/mem_access.h | 10 +++ 2 files changed, 65 insertions(+), 42 deletions(-) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index ebadcf2289..c3417b0593 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -52,6 +52,7 @@ #include #include #include +#include #include #include #include @@ -2081,7 +2082,7 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla, #endif } - if ( req_ptr ) + if ( req_ptr && vm_event_is_enabled(curr) ) { if ( monitor_traps(curr, sync, req_ptr) < 0 ) rc = 0; @@ -4862,58 +4863,70 @@ static int do_altp2m_op( break; case HVMOP_altp2m_set_mem_access: - if ( a.u.mem_access.pad ) - rc = -EINVAL; - else - rc = p2m_set_mem_access(d, _gfn(a.u.mem_access.gfn), 1, 0, 0, - a.u.mem_access.access, - a.u.mem_access.view); + if ( IS_ENABLED(CONFIG_VM_EVENT) ) + { + if ( a.u.mem_access.pad ) + rc = -EINVAL; + else + rc = p2m_set_mem_access(d, _gfn(a.u.mem_access.gfn), 1, 0, 0, + a.u.mem_access.access, + a.u.mem_access.view); + } break; case HVMOP_altp2m_set_mem_access_multi: - if ( a.u.set_mem_access_multi.pad || - a.u.set_mem_access_multi.opaque > a.u.set_mem_access_multi.nr ) + if ( IS_ENABLED(CONFIG_VM_EVENT) ) { - rc = -EINVAL; - break; - } + if ( a.u.set_mem_access_multi.pad || + a.u.set_mem_access_multi.opaque > + a.u.set_mem_access_multi.nr ) + { + rc = -EINVAL; + break; + } - /* - * Unlike XENMEM_access_op_set_access_multi, we don't need any bits of - * the 'continuation' counter to be zero (to stash a command in). - * However, 0x40 is a good 'stride' to make sure that we make - * a reasonable amount of forward progress before yielding, - * so use a mask of 0x3F here. - */ - rc = p2m_set_mem_access_multi(d, a.u.set_mem_access_multi.pfn_list, - a.u.set_mem_access_multi.access_list, - a.u.set_mem_access_multi.nr, - a.u.set_mem_access_multi.opaque, - 0x3F, - a.u.set_mem_access_multi.view); - if ( rc > 0 ) - { - a.u.set_mem_access_multi.opaque = rc; - rc = -ERESTART; - if ( __copy_field_to_guest(guest_handle_cast(arg, xen_hvm_altp2m_op_t), - &a, u.set_mem_access_multi.opaque) ) - rc = -EFAULT; + /* + * Unlike XENMEM_access_op_set_access_multi, we don't need any + * bits of the 'continuation' counter to be zero (to stash a + * command in). + * However, 0x40 is a good 'stride' to make sure that we make + * a reasonable amount of forward progress before yielding, + * so use a mask of 0x3F here. + */ + rc = p2m_set_mem_access_multi(d, a.u.set_mem_access_multi.pfn_list, + a.u.set_mem_access_multi.access_list, + a.u.set_mem_access_multi.nr, + a.u.set_mem_access_multi.opaque, + 0x3F, + a.u.set_mem_access_multi.view); + if ( rc > 0 ) + { + a.u.set_mem_access_multi.opaque = rc; + rc = -ERESTART; + if ( __copy_field_to_guest( + guest_handle_cast(arg, xen_hvm_altp2m_op_t), + &a, u.set_mem_access_multi.opaque) ) + rc = -EFAULT; + } } break; case HVMOP_altp2m_get_mem_access: - if ( a.u.mem_access.pad ) - rc = -EINVAL; - else + if ( IS_ENABLED(CONFIG_VM_EVENT) ) { - xenmem_access_t access; - - rc = p2m_get_mem_access(d, _gfn(a.u.mem_access.gfn), &access, - a.u.mem_access.view); - if ( !rc ) + if ( a.u.mem_access.pad ) + rc = -EINVAL; + else { - a.u.mem_access.access = access; - rc = __copy_to_guest(arg, &a, 1) ? -EFAULT : 0; + xenmem_access_t access; + + rc = p2m_get_mem_access(d, _gfn(a.u.mem_access.gfn), &access, + a.u.mem_access.view); + if ( !rc ) + { + a.u.mem_access.access = access; + rc = __copy_to_guest(arg, &a, 1) ? -EFAULT : 0; + } } } break; diff --git a/xen/arch/x86/include/asm/mem_access.h b/xen/arch/x86/include/asm/mem_access.h index 257ed33de1..790bed81e8 100644 --- a/xen/arch/x86/include/asm/mem_access.h +++ b/xen/arch/x86/include/asm/mem_access.h @@ -14,6 +14,7 @@ #ifndef __ASM_X86_MEM_ACCESS_H__ #define __ASM_X86_MEM_ACCESS_H__ +#ifdef CONFIG_VM_EVENT /* * Setup vm_event request based on the access (gla is -1ull if not available). * Handles the rw2rx conversion. Boolean return value indicates if event type @@ -25,6 +26,15 @@ bool p2m_mem_access_check(paddr_t gpa, unsigned long gla, struct npfec npfec, struct vm_event_st **req_ptr); +#else +static inline bool p2m_mem_access_check(paddr_t gpa, unsigned long gla, + struct npfec npfec, + struct vm_event_st **req_ptr) +{ + *req_ptr = NULL; + return false; +} +#endif /* CONFIG_VM_EVENT */ /* Check for emulation and mark vcpu for skipping one instruction * upon rescheduling if required. */ -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Thu Nov 13 04:11:48 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 04:11:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160613.1488690 (Exim 4.92) (envelope-from ) id 1vJOgO-000631-LX; Thu, 13 Nov 2025 04:11:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160613.1488690; Thu, 13 Nov 2025 04:11:40 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Re: Xen DomU Bootloader Experiences To: Elliott Mitchell , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Juergen Gross Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO 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protected-headers="v1" From: Juergen Gross To: Elliott Mitchell , xen-devel@lists.xenproject.org Message-ID: <8b3d8e28-6501-462e-b028-8f4dc44027e7@suse.com> Subject: Re: Xen DomU Bootloader Experiences References: In-Reply-To: --------------DAqQCSpoGUJyWUwk8B7Srrtt Content-Type: multipart/mixed; boundary="------------RkIsOllKgeNEoAtS0urlvohf" --------------RkIsOllKgeNEoAtS0urlvohf Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: base64 T24gMTIuMTEuMjUgMjI6MTMsIEVsbGlvdHQgTWl0Y2hlbGwgd3JvdGU6DQo+IEEgZmV3IHRp bWVzIHRoZXJlIGhhdmUgYmVlbiBtZW50aW9ucyBvZiBhIG5lZWQgdG8gY2hvb3NlIGJldHdl ZW4gYm9vdA0KPiBtZXRob2RzIGZvciBEb21Vcy4gIFRoZXJlIGlzIGEgbmVlZCB0byBkZWNp ZGUgb24gb25lcyB0byByZWNvbW1lbmQgYW5kDQo+IHB1dCBlZmZvcnQgaW50byBzdXBwb3J0 dGluZy4gIEkgbWF5IG5vdCBoYXZlIHRyaWVkIHRoYXQgbWFueSBub3IgZG9uZQ0KPiBwYXJ0 aWN1bGFybHkgZ3JlYXQgYW1vdW50cyBvZiBleHBlcmltZW50YXRpb24sIGJ1dCBJIGRvIGhh dmUgc29tZQ0KPiBleHBlcmllbmNlIHdpdGggbXVsdGlwbGUgVXNlciBEb21haW4gYm9vdGxv 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Wed, 12 Nov 2025 23:09:13 -0800 (PST) Message-ID: <105178e4-4f97-45a6-ba16-f57f5945f9cf@suse.com> Date: Thu, 13 Nov 2025 08:09:12 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH v3] xen/x86: guest_access: optimize raw_x_guest() for PV and HVM combinations To: Grygorii Strashko Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , Teddy Astie , "xen-devel@lists.xenproject.org" , Stefano Stabellini , "Lira, Victor M" References: <20251107181739.3034098-1-grygorii_strashko@epam.com> <47f86a44-007f-4b90-9656-b2440238b2ba@suse.com> <51f5ea06-96aa-45f7-a90b-50d7be1c10cd@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <51f5ea06-96aa-45f7-a90b-50d7be1c10cd@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 12.11.2025 18:43, Grygorii Strashko wrote: > On 12.11.25 15:07, Jan Beulich wrote: >> On 12.11.2025 12:27, Grygorii Strashko wrote: >>> On 12.11.25 08:38, Jan Beulich wrote: >>>> On 11.11.2025 18:52, Grygorii Strashko wrote: >>>>> On 10.11.25 09:11, Jan Beulich wrote: >>>>>> On 07.11.2025 19:17, Grygorii Strashko wrote: >>>>>>> --- a/xen/arch/x86/include/asm/guest_access.h >>>>>>> +++ b/xen/arch/x86/include/asm/guest_access.h >>>>>>> @@ -13,26 +13,64 @@ >>>>>>>   #include >>>>>>>     /* Raw access functions: no type checking. */ >>>>>>> -#define raw_copy_to_guest(dst, src, len)        \ >>>>>>> -    (is_hvm_vcpu(current) ?                     \ >>>>>>> -     copy_to_user_hvm((dst), (src), (len)) :    \ >>>>>>> -     copy_to_guest_pv(dst, src, len)) >>>>>>> -#define raw_copy_from_guest(dst, src, len)      \ >>>>>>> -    (is_hvm_vcpu(current) ?                     \ >>>>>>> -     copy_from_user_hvm((dst), (src), (len)) :  \ >>>>>>> -     copy_from_guest_pv(dst, src, len)) >>>>>>> -#define raw_clear_guest(dst,  len)              \ >>>>>>> -    (is_hvm_vcpu(current) ?                     \ >>>>>>> -     clear_user_hvm((dst), (len)) :             \ >>>>>>> -     clear_guest_pv(dst, len)) >>>>>>> -#define __raw_copy_to_guest(dst, src, len)      \ >>>>>>> -    (is_hvm_vcpu(current) ?                     \ >>>>>>> -     copy_to_user_hvm((dst), (src), (len)) :    \ >>>>>>> -     __copy_to_guest_pv(dst, src, len)) >>>>>>> -#define __raw_copy_from_guest(dst, src, len)    \ >>>>>>> -    (is_hvm_vcpu(current) ?                     \ >>>>>>> -     copy_from_user_hvm((dst), (src), (len)) :  \ >>>>>>> -     __copy_from_guest_pv(dst, src, len)) >>>>>>> +static inline bool raw_use_hvm_access(const struct vcpu *v) >>>>>>> +{ >>>>>>> +    return IS_ENABLED(CONFIG_HVM) && (!IS_ENABLED(CONFIG_PV) || is_hvm_vcpu(v)); >>>>>>> +} >>>>>> >>>>>> Without a full audit (likely tedious and error prone) this still is a >>>>>> behavioral change for some (likely unintended) use against a system domain >>>>>> (likely the idle one): With HVM=y PV=n we'd suddenly use the HVM accessor >>>>>> there. IOW imo the "system domains are implicitly PV" aspect wants >>>>>> retaining, even if only "just in case". It's okay not to invoke the PV >>>>>> accessor (but return "len" instead), but it's not okay to invoke the HVM >>>>>> one. >>>>> >>>>> This patch is subset of "constify is_hvm_domain() for PV=n case" attempts. >>>>> >>>>> It was made under assumption that: >>>>> "System domains do not have Guests running, so can't initiate hypecalls and >>>>>  can not be users of copy_to/from_user() routines. There are no Guest and no user memory". >>>>> [IDLE, COW, IO, XEN] >>>>> >>>>> If above assumption is correct - this patch was assumed safe. >>>>> >>>>> if not - it all make no sense, probably. >>>> >>>> I wouldn't go as far as saying that. It can be arranged to avid the corner >>>> case I mentioned, I think. >>> >>> do you mean adding "&& !is_system_domain(v->domain)" in raw_use_hvm_access()? >> >> No, we want to avoid adding any new any runtime checks. >> >>> Hm, I see that vcpu(s) are not even created for system domains in domain_create(). >>> So seems !is_system_domain(v->domain) == true always here. >> >> "always" in what sense? It _should_ be always true, but in the unlikely event we >> have a path where it isn't (which we could be sure of only after a full audit), >> behavior there shouldn't change in the described problematic way. >> >>> Am I missing smth? >>> Or you meant smth. else? >> >> I was thinking of something along the lines of >> >> if ( is_hvm_vcpu(current) ) > > this condition will not be constified any more for HVM=y and PV=n Right, and intentionally so (as explained). Jan >> return ..._hvm(); >> >> if ( !IS_ENABLED(CONFIG_PV) ) >> return len; >> >> return ..._pv(); > > Possible benefit will be reduced from: > add/remove: 2/9 grow/shrink: 2/90 up/down: 1678/-32560 (-30882) > > to: > add/remove: 3/8 grow/shrink: 3/89 up/down: 1018/-12087 (-11069) > > Any way it is smth. > From xen-devel-bounces@lists.xenproject.org Thu Nov 13 07:31:34 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 07:31:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160668.1488730 (Exim 4.92) (envelope-from ) id 1vJRni-0007ND-Tn; Thu, 13 Nov 2025 07:31:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160668.1488730; Thu, 13 Nov 2025 07:31:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJRni-0007N6-PH; Thu, 13 Nov 2025 07:31:26 +0000 Received: by outflank-mailman (input) for mailman id 1160668; Thu, 13 Nov 2025 07:31:25 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJRnh-0007Ly-OW for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 07:31:25 +0000 Received: from mail-ed1-x52e.google.com (mail-ed1-x52e.google.com [2a00:1450:4864:20::52e]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c1941920-c062-11f0-9d18-b5c5bf9af7f9; Thu, 13 Nov 2025 08:31:23 +0100 (CET) Received: by mail-ed1-x52e.google.com with SMTP id 4fb4d7f45d1cf-6419aaced59so706919a12.0 for ; Wed, 12 Nov 2025 23:31:24 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 12 Nov 2025 23:31:23 -0800 (PST) Message-ID: Date: Thu, 13 Nov 2025 08:31:21 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH] x86/hvm: revise "cpu_has_vmx" usage for !CONFIG_INTEL_VMX case To: Grygorii Strashko Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Alejandro Vallejo , "xen-devel@lists.xenproject.org" References: <20250924101417.229108-1-grygorii_strashko@epam.com> <7b2fe09a-02f4-4575-9e42-1328f3a40f1d@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <7b2fe09a-02f4-4575-9e42-1328f3a40f1d@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12.11.2025 21:25, Grygorii Strashko wrote: > Could it be merged if no other comments, please? It's on my list of things to put in. However, since you ask: You do realize that all your recent postings were while the tree was frozen? That's okay-ish, but when preparing a release people would preferably focus on the release, not on what is to come afterwards. This change of yours, like quite a few from others, will need to wait until the tree is fully open again. It having been progressed to the point where it can in principle go in was already a courtesy, considering the timing. Jan > On 24.09.25 13:14, Grygorii Strashko wrote: >> From: Grygorii Strashko >> >> Since commit b99227347230 ("x86: Fix AMD_SVM and INTEL_VMX dependency") the >> HVM Intel VT-x support can be disabled, but it still keeps VMX >> code partially built-in. Particularly in HVM code there are two places: >> >> 1) hvm/dom0_build.c >> dom0_construct_pvh()->pvh_populate_p2m() >> ... >> if ( cpu_has_vmx && paging_mode_hap(d) && !vmx_unrestricted_guest(v) ) >> { >> ... >> [unreachable for !cpu_has_vmx case] >> rc = pvh_setup_vmx_realmode_helpers(d); >> >> pvh_setup_vmx_realmode_helpers() allocates memory and configures >> HVM_PARAM_VM86_TSS_SIZED >> HVM_PARAM_IDENT_PT >> >> 2) hvm/hvm.c >> hvm_set_param() >> ... >> case HVM_PARAM_IDENT_PT: >> >> if ( !paging_mode_hap(d) || !cpu_has_vmx ) >> { >> d->arch.hvm.params[index] = value; >> break; >> } >> [unreachable for !cpu_has_vmx case] >> ... >> >> Hence HVM_PARAM_IDENT_PT/HVM_PARAM_VM86_TSS_SIZED are used only by VMX code >> above code become unreachable in !cpu_has_vmx case and can be optimazed >> when !CONFIG_INTEL_VMX. >> >> Replace "cpu_has_vmx" with using_vmx() to account !CONFIG_INTEL_VMX and allow >> compiler DCE to optimize code. >> >> Signed-off-by: Grygorii Strashko >> --- >> add/remove: 0/0 grow/shrink: 0/2 up/down: 0/-604 (-604) >> Function old new delta >> hvm_set_param 1602 1473 -129 >> dom0_construct_pvh 4438 3963 -475 >> Total: Before=3567191, After=3566587, chg -0.02% >> >> xen/arch/x86/hvm/dom0_build.c | 2 +- >> xen/arch/x86/hvm/hvm.c | 2 +- >> 2 files changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c >> index 5551f9044836..5ac2cf8394d8 100644 >> --- a/xen/arch/x86/hvm/dom0_build.c >> +++ b/xen/arch/x86/hvm/dom0_build.c >> @@ -473,7 +473,7 @@ static int __init pvh_populate_p2m(struct domain *d) >> } >> } >> >> - if ( cpu_has_vmx && paging_mode_hap(d) && !vmx_unrestricted_guest(v) ) >> + if ( using_vmx() && paging_mode_hap(d) && !vmx_unrestricted_guest(v) ) >> { >> /* >> * Since Dom0 cannot be migrated, we will only setup the >> diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c >> index 95a80369b9b8..70331aeec9a0 100644 >> --- a/xen/arch/x86/hvm/hvm.c >> +++ b/xen/arch/x86/hvm/hvm.c >> @@ -4302,7 +4302,7 @@ static int hvm_set_param(struct domain *d, uint32_t index, uint64_t value) >> * Only actually required for VT-x lacking unrestricted_guest >> * capabilities. Short circuit the pause if possible. >> */ >> - if ( !paging_mode_hap(d) || !cpu_has_vmx ) >> + if ( !paging_mode_hap(d) || !using_vmx() ) >> { >> d->arch.hvm.params[index] = value; >> break; > From xen-devel-bounces@lists.xenproject.org Thu Nov 13 07:36:27 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 07:36:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160683.1488739 (Exim 4.92) (envelope-from ) id 1vJRsY-00088w-I1; Thu, 13 Nov 2025 07:36:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160683.1488739; Thu, 13 Nov 2025 07:36:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJRsY-00088p-F5; Thu, 13 Nov 2025 07:36:26 +0000 Received: by outflank-mailman (input) for mailman id 1160683; Thu, 13 Nov 2025 07:36:25 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJRsW-00088j-VO for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 07:36:24 +0000 Received: from mail-ej1-x633.google.com (mail-ej1-x633.google.com [2a00:1450:4864:20::633]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 7464bfa9-c063-11f0-9d18-b5c5bf9af7f9; Thu, 13 Nov 2025 08:36:23 +0100 (CET) Received: by mail-ej1-x633.google.com with SMTP id a640c23a62f3a-b735487129fso43360366b.0 for ; Wed, 12 Nov 2025 23:36:24 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Smith" , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , xen-devel@lists.xenproject.org References: <20251112162219.226075-1-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251112162219.226075-1-alejandro.garciavallejo@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12.11.2025 17:22, Alejandro Vallejo wrote: > Hi, > > The series is mostly a refactor between everything needed to load microcode and > the bare minimum to probe the current microcode revision. > > The Kconfig option keeps the reading of microcode rev data around, as it's very > relevant for security and debuggability in order to deduce which erratas apply > to the current platform. > > The idea is to move everything that must still be compiled with !CONFIG_UCODE > onto {,amd-,intel-}base.c, then remove everything else conditionally at the > Makefile level. > > Renaming files (e.g: s/base/core/ and s/core/common/) would better reflect > post-series reality, but it'd be annoying for later backports in this general > area. > > Cheers, > Alejandro > > Alejandro Vallejo (4): > x86: Split out AMD-specific code to be executed without ucode loading > x86: Split out Intel-specific code to be executed without ucode > loading > x86: Split out early_microcode_load() and microcode_load_one() > x86: Add Kconfig option to disable microcode loading > > xen/arch/x86/Kconfig | 12 ++++ > xen/arch/x86/cpu/microcode/Makefile | 9 ++- > xen/arch/x86/cpu/microcode/amd-base.c | 55 +++++++++++++++++++ > xen/arch/x86/cpu/microcode/amd.c | 55 ++----------------- > xen/arch/x86/cpu/microcode/amd.h | 15 +++++ > xen/arch/x86/cpu/microcode/base.c | 73 +++++++++++++++++++++++++ > xen/arch/x86/cpu/microcode/core.c | 58 +------------------- > xen/arch/x86/cpu/microcode/intel-base.c | 50 +++++++++++++++++ > xen/arch/x86/cpu/microcode/intel.c | 56 +++---------------- > xen/arch/x86/cpu/microcode/intel.h | 16 ++++++ > xen/arch/x86/cpu/microcode/private.h | 14 +++++ > xen/arch/x86/efi/efi-boot.h | 2 +- > xen/arch/x86/platform_hypercall.c | 2 + > 13 files changed, 259 insertions(+), 158 deletions(-) > create mode 100644 xen/arch/x86/cpu/microcode/amd-base.c > create mode 100644 xen/arch/x86/cpu/microcode/amd.h > create mode 100644 xen/arch/x86/cpu/microcode/base.c > create mode 100644 xen/arch/x86/cpu/microcode/intel-base.c > create mode 100644 xen/arch/x86/cpu/microcode/intel.h Purely based on this diffstat: A doc update likely is necessary as well, as the ucode= command line option now becomes only conditionally applicable (aiui, i.e. without having looked at the patches them selves). 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Wed, 12 Nov 2025 23:54:18 -0800 (PST) Message-ID: <9a949edb-8eb8-4984-adf0-4ab8b82e64db@suse.com> Date: Thu, 13 Nov 2025 08:54:17 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] docs: Rewrite the Tagging and Branching checklist To: Andrew Cooper Cc: Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Oleksii Kurochko , Xen-devel References: <20251112185402.209485-1-andrew.cooper3@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251112185402.209485-1-andrew.cooper3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12.11.2025 19:54, Andrew Cooper wrote: > There's a lot of stale information in the current checklists. Merge the > documents and present the information in chronological order. Provide real > examples from the tree rather than trying to be too prescriptive. > > Signed-off-by: Andrew Cooper Hardly anything is being said about stable releases - is this intentional? A few comments below, but ultimately I think it will need to be Julien to ack. > --- /dev/null > +++ b/docs/process/tagging-branching.rst > @@ -0,0 +1,194 @@ > +.. SPDX-License-Identifier: CC-BY-4.0 > + > +=============================== > +Tagging and Branching Checklist > +=============================== > + > +Before starting > +=============== > + > + * Review this checklist for changes during the development window. > + * Access to the following necessary: > + > + * The 'xen tree' signing key. > + * The xen and xendocs users on xenbits.xen.org > + * The downloads-cvs user on mail.xenproject.org > + * A checkout of the xen.org CVS repository > + > +:: > + > + cvs -d downloads-cvs@mail.xenproject.org:/home/downloads-cvs/cvs-repos checkout xen.org > + > + > +For RC1 > +======= > + > + * Pin ``QEMU_UPSTREAM_REVISION`` to an exact SHA. Commit. > + > + * Update ``XEN_EXTRAVERSION`` from ``-unstable`` to ``.0-rc1``. For > + ``README`` and ``SUPPORT.md``, use the slightly more generic ``-rc`` so > + they doesn't need to change during subsequent RCs. Commit. Nit: don't > + * Tag. Produce tarballs. > + > +e.g. from Xen 4.21, ``ffd25d717a74^..d1478321eacb``:: > + > + * d1478321eacb - (tag: 4.21.0-rc1) Update Xen version to 4.21.0-rc1 > + * ffd25d717a74 - Config.mk: Pin QEMU_UPSTREAM_REVISION > + > + > +For subsequent RCs > +================== > + > + * Update ``XEN_EXTRAVERSION`` to the next RC number. Commit. Tag. > + > +e.g. from Xen 4.21, ``eff32008be0d`` and ``9632ce6fe5b2``:: > + > + * 9632ce6fe5b2 - (tag: 4.21.0-rc3) Update Xen version to 4.21.0-rc3 > + * eff32008be0d - (tag: 4.21.0-rc2) Update Xen version to 4.21.0-rc2 > + > + > +Branching > +========= > + > +On xenbits: > + > + * Create new staging and stable branches in xen.git. > + > + * Add the new branches to patchbot. In ``~xen/HG/patchbot`` copy the exsting > + master and staging reported heads, update the ``versions`` file, and commit > + the result. > + > + * Add the new stable branch to the docs cronjob. In ``~xendocs/cronjobs`` > + edit ``xenbits-docs-all.sh`` and commit the result. e.g.: > + > +:: > + > + ssh xenbits.xen.org > + > + cd ~xen/git/xen.git > + git branch staging-$v staging > + git branch stable-$v master > + > + cd ~xen/HG/patchbot > + cp xen--master.patchbot-reported-heads xen--stable-$v.patchbot-reported-heads > + cp xen--staging.patchbot-reported-heads xen--staging-$v.patchbot-reported-heads > + $EDITOR versions > + git commit -am "Branch for $v" > + > + cd ~xendocs/cronjobs > + $EDITOR xenbits-docs-all.sh > + git commit -am "Branch for $v" > + > + > +On the new branch: > + > + * Switch to release builds by default. Commit. > + > +On staging: > + > + * Update ``XEN_SUBVERSION`` to the next version. Update > + ``XEN_EXTRAVERSION``, ``README`` and ``SUPPORT.md`` back to ``-unstable``. > + Commit. Tag the start of the new development window. > + > + * Rerun ``./autogen.sh`` to refresh the configure scripts. Commit. > + > + * Switch ``QEMU_UPSTREAM_REVISION`` back to ``master``. Commit. > + > + * Create a new section in ``CHANGELOG.md``. Commit. Should this really be four separate commits? > +e.g. from Xen 4.21, ``d510f9c1430c^..62d0a92057ca`` and ``d510f9c1430c^..b0255656d121``:: > + > + * 62d0a92057ca - CHANGELOG.md: Start a new 4.22 section > + * 7b88e463f999 - Config.mk: Switch QEMU back to master > + * d954e8c5c8de - Rerun ./autogen.sh for 4.22 > + * 85768c28b705 - (tag: 4.22-dev) Update Xen to 4.22 > + | * b0255656d121 - (staging-4.21) Switch to release builds by default > + |/ > + * d510f9c1430c - doc/man: Align list of viridian default enlightenments with libxl > + > + > +Releasing > +========= > + > + * Finalise the release dates in ``CHANGELOG.md`` (backported from staging) > + and ``SUPPORT.md`` (only in the release branch). > + > + * Tag the release in relevant external repos, and update ``Config.mk`` to > + refer to the tag. > + > + * Update ``XEN_EXTRAVERSION`` to drop the ``-rc`` suffix, and update Since further up it's now rc, imo it would be better to also say it that way here. > + ``README`` to match. Commit. The latest here QEMU_UPSTREAM_REVISION and MINIOS_UPSTREAM_REVISION also need adjusting to reference version tags, aiui. Taking tag creation in the respective leaf trees as prereq. > + * Tag. Produce tarballs. Link to the respective section further down? > +e.g. from Xen 4.20, ``5cd830509d38^..3ad5d648cda5``:: > + > + * 3ad5d648cda5 - (tag: RELEASE-4.20.0) Update to Xen 4.20 > + * 89fd1ba88403 - Config.mk: Bump tags to final > + * 6bf05e086765 - SUPPORT.md: Define support lifetime > + * 5cd830509d38 - CHANGELOG.md: Set release date for 4.20 > + > + > +Tagging > +======= Likewise this section may want linking to from respective places above? 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Thu, 13 Nov 2025 00:36:56 -0800 (PST) Message-ID: Date: Thu, 13 Nov 2025 09:36:54 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH v2] xen: make VMTRACE support optional To: Grygorii Strashko Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Tamas K Lengyel , Alexandru Isaila , Petre Pircalabu , Teddy Astie , Penny Zheng , "xen-devel@lists.xenproject.org" References: <20251112202442.3879997-1-grygorii_strashko@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251112202442.3879997-1-grygorii_strashko@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12.11.2025 21:24, Grygorii Strashko wrote: > --- a/xen/arch/x86/hvm/vmx/vmcs.c > +++ b/xen/arch/x86/hvm/vmx/vmcs.c > @@ -307,6 +307,7 @@ static int vmx_init_vmcs_config(bool bsp) > rdmsrl(MSR_IA32_VMX_MISC, _vmx_misc_cap); > > /* Check whether IPT is supported in VMX operation. */ > +#ifdef CONFIG_VMTRACE > if ( bsp ) > vmtrace_available = cpu_has_proc_trace && > (_vmx_misc_cap & VMX_MISC_PROC_TRACE); > @@ -317,6 +318,7 @@ static int vmx_init_vmcs_config(bool bsp) > smp_processor_id()); > return -EINVAL; > } > +#endif Initially I was inclined to ask for use of IS_ENABLED() here, but that wouldn't work since vmtrace_available isn't an lvalue when VMTRACE=n. Hence why generally I think it is better to check the particular identifier in such cases, rather than the original CONFIG_* (i.e. "#ifndef vmtrace_available" here). I'm not going to insist though, as I expect opinions may differ on this matter. > --- a/xen/arch/x86/include/asm/hvm/hvm.h > +++ b/xen/arch/x86/include/asm/hvm/hvm.h > @@ -234,12 +234,14 @@ struct hvm_function_table { > int (*altp2m_vcpu_emulate_vmfunc)(const struct cpu_user_regs *regs); > #endif > > +#ifdef CONFIG_VMTRACE > /* vmtrace */ > int (*vmtrace_control)(struct vcpu *v, bool enable, bool reset); > int (*vmtrace_output_position)(struct vcpu *v, uint64_t *pos); > int (*vmtrace_set_option)(struct vcpu *v, uint64_t key, uint64_t value); > int (*vmtrace_get_option)(struct vcpu *v, uint64_t key, uint64_t *value); > int (*vmtrace_reset)(struct vcpu *v); > +#endif > > uint64_t (*get_reg)(struct vcpu *v, unsigned int reg); > void (*set_reg)(struct vcpu *v, unsigned int reg, uint64_t val); > @@ -735,6 +737,7 @@ static inline bool altp2m_vcpu_emulate_ve(struct vcpu *v) > bool altp2m_vcpu_emulate_ve(struct vcpu *v); > #endif /* CONFIG_ALTP2M */ > > +#ifdef CONFIG_VMTRACE > static inline int hvm_vmtrace_control(struct vcpu *v, bool enable, bool reset) > { > if ( hvm_funcs.vmtrace_control ) > @@ -769,13 +772,20 @@ static inline int hvm_vmtrace_get_option( > > return -EOPNOTSUPP; > } > +#else > +int hvm_vmtrace_output_position(struct vcpu *v, uint64_t *pos); > +#endif There not being any definition for this declaration (regardless of configuration), a comment might have been warranted here. Furthermore, can't the stub further down in the file now go away (addressing a Misra concern of it now being unused, as HVM=n implies VMTRACE=n)? Possibly this applies to a few other stubs there as well? > static inline int hvm_vmtrace_reset(struct vcpu *v) > { > +#ifdef CONFIG_VMTRACE > if ( hvm_funcs.vmtrace_reset ) > return alternative_call(hvm_funcs.vmtrace_reset, v); > > return -EOPNOTSUPP; > +#else > + return 0; > +#endif > } This doesn't look right - if absence of a hook results in -EOPNOTSUPP, so should VMTRACE=n do. (There's no practical effect from this though, as - perhaps wrongly - neither caller checks the return value.) > --- a/xen/common/memory.c > +++ b/xen/common/memory.c > @@ -1155,8 +1155,10 @@ static unsigned int resource_max_frames(const struct domain *d, > case XENMEM_resource_ioreq_server: > return ioreq_server_max_frames(d); > > +#ifdef CONFIG_VMTRACE > case XENMEM_resource_vmtrace_buf: > return d->vmtrace_size >> PAGE_SHIFT; > +#endif > > default: > return 0; > @@ -1198,6 +1200,7 @@ static int acquire_ioreq_server(struct domain *d, > #endif > } > > +#ifdef CONFIG_VMTRACE > static int acquire_vmtrace_buf( > struct domain *d, unsigned int id, unsigned int frame, > unsigned int nr_frames, xen_pfn_t mfn_list[]) > @@ -1220,6 +1223,7 @@ static int acquire_vmtrace_buf( > > return nr_frames; > } > +#endif > > /* > * Returns -errno on error, or positive in the range [1, nr_frames] on > @@ -1238,8 +1242,10 @@ static int _acquire_resource( > case XENMEM_resource_ioreq_server: > return acquire_ioreq_server(d, id, frame, nr_frames, mfn_list); > > +#ifdef CONFIG_VMTRACE > case XENMEM_resource_vmtrace_buf: > return acquire_vmtrace_buf(d, id, frame, nr_frames, mfn_list); > +#endif > > default: > ASSERT_UNREACHABLE(); Without the intention to ask for a change right in this patch, this is a little awkward: resource_max_frames() returning 0 results in acquire_resource() to return -EINVAL, when with VMTRACE=n for XENMEM_resource_vmtrace_buf it imo better would be -EOPNOTSUPP. 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First, it should be CONFIG_MICROCODE_LOADING.  We're not getting rid of all microcode capabilities.  Also, of all the places where UCODE needs expanding properly, it's Kconfig. Next, annotate the functions that you conditionally don't reference in {amd,intel}_ucode_ops with __maybe_unused, and dead code elimination should do the rest. ~Andrew From xen-devel-bounces@lists.xenproject.org Thu Nov 13 08:56:44 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 08:56:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160750.1488805 (Exim 4.92) (envelope-from ) id 1vJT85-00045F-6F; Thu, 13 Nov 2025 08:56:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160750.1488805; Thu, 13 Nov 2025 08:56:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJT85-000458-1e; Thu, 13 Nov 2025 08:56:33 +0000 Received: by outflank-mailman (input) for mailman id 1160750; Thu, 13 Nov 2025 08:56:32 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJT84-000452-Ng for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 08:56:32 +0000 Received: from mail-ej1-x62a.google.com (mail-ej1-x62a.google.com [2a00:1450:4864:20::62a]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id a62c85a3-c06e-11f0-9d18-b5c5bf9af7f9; Thu, 13 Nov 2025 09:56:31 +0100 (CET) Received: by mail-ej1-x62a.google.com with SMTP id a640c23a62f3a-b72dc0c15abso86770766b.1 for ; Thu, 13 Nov 2025 00:56:31 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 13 Nov 2025 00:56:30 -0800 (PST) Message-ID: <8304ea57-0574-482b-a2ea-e1dadc58656e@suse.com> Date: Thu, 13 Nov 2025 09:56:29 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 1/7] xen/svm: limit the scope of "rc" To: Penny Zheng Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , xen-devel@lists.xenproject.org References: <20251113031630.1465599-1-Penny.Zheng@amd.com> <20251113031630.1465599-2-Penny.Zheng@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251113031630.1465599-2-Penny.Zheng@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.11.2025 04:16, Penny Zheng wrote: > To make codes less fragile, we limit the scope of "rc" through adding several > instances in relatively narrow scopes. We also fixes wrong indentation. > > Suggested-by: Jan Beulich > Signed-off-by: Penny Zheng Reviewed-by: Jan Beulich > @@ -2748,16 +2749,18 @@ void asmlinkage svm_vmexit_handler(void) > } > else > { > - rc = hvm_monitor_debug(regs->rip, > - HVM_MONITOR_SOFTWARE_BREAKPOINT, > - X86_ET_SW_EXC, > - insn_len, 0); > - if ( rc < 0 ) > - goto unexpected_exit_type; > - if ( !rc ) > - hvm_inject_exception(X86_EXC_BP, > - X86_ET_SW_EXC, > - insn_len, X86_EVENT_NO_EC); > + int rc; > + > + rc = hvm_monitor_debug(regs->rip, > + HVM_MONITOR_SOFTWARE_BREAKPOINT, > + X86_ET_SW_EXC, > + insn_len, 0); As you touch the code anyway, make this the initializer of rc? And at the same time join the latter two lines? (I may take the liberty of making these adjustments while committing.) Jan From xen-devel-bounces@lists.xenproject.org Thu Nov 13 09:13:54 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 09:13:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160762.1488814 (Exim 4.92) (envelope-from ) id 1vJTOm-00074v-FQ; Thu, 13 Nov 2025 09:13:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160762.1488814; Thu, 13 Nov 2025 09:13:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJTOm-00074o-B5; Thu, 13 Nov 2025 09:13:48 +0000 Received: by outflank-mailman (input) for mailman id 1160762; Thu, 13 Nov 2025 09:13:47 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJTOl-00074i-BJ for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 09:13:47 +0000 Received: from mail-ej1-x631.google.com (mail-ej1-x631.google.com [2a00:1450:4864:20::631]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 0e98df83-c071-11f0-9d18-b5c5bf9af7f9; Thu, 13 Nov 2025 10:13:45 +0100 (CET) Received: by mail-ej1-x631.google.com with SMTP id a640c23a62f3a-b728a43e410so85292266b.1 for ; Thu, 13 Nov 2025 01:13:45 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 13 Nov 2025 01:13:45 -0800 (PST) Message-ID: <8c74b068-ba9a-4867-8d39-31c77f3cc339@suse.com> Date: Thu, 13 Nov 2025 10:13:43 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 2/7] xen/vm_event: introduce vm_event_is_enabled() To: Penny Zheng Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , Tamas K Lengyel , Alexandru Isaila , Petre Pircalabu , Grygorii Strashko , xen-devel@lists.xenproject.org References: <20251113031630.1465599-1-Penny.Zheng@amd.com> <20251113031630.1465599-3-Penny.Zheng@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251113031630.1465599-3-Penny.Zheng@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.11.2025 04:16, Penny Zheng wrote: > Function vm_event_is_enabled() is introduced to check if vm event is enabled, > and also make the checking conditional upon CONFIG_VM_EVENT, which could help > DCE a lot unreachable calls/codes, such as hvm_monitor_io(), etc, when having > VM_EVENT=n. > > Signed-off-by: Penny Zheng > --- > v2 -> v3: > - move assignment (to ev) past the check. > - remove redundant check > - make "may_defer" & with vm_event_is_enabled() and have assertion back > - add vm_event_is_enabled() for hvm_monitor_xxx() in svm.c/vmx.c/mem_sharing.c, then later there is no need to add stubs for them > --- > v3 -> v4: > - move "may_defer" & with vm_event_is_enabled() to the very top of the function > - use ?: to avoid introducing a new local variable > - fix the wrong order > - use pointer-to-const when possible > - use IS_ENABLED(xxx) instead of #ifdef-block This is irritating, as the subject (bogusly) says v1. > --- > xen/arch/x86/hvm/emulate.c | 9 +++-- > xen/arch/x86/hvm/hvm.c | 24 ++++++++--- > xen/arch/x86/hvm/svm/intr.c | 2 +- > xen/arch/x86/hvm/svm/svm.c | 54 +++++++++++++++---------- > xen/arch/x86/hvm/vmx/intr.c | 2 +- > xen/arch/x86/hvm/vmx/vmx.c | 63 +++++++++++++++++------------ > xen/arch/x86/include/asm/vm_event.h | 8 ++++ > xen/arch/x86/mm/mem_sharing.c | 3 ++ > 8 files changed, 106 insertions(+), 59 deletions(-) As before - why's there no "x86" in the subject prefix? > @@ -3860,9 +3870,11 @@ int hvm_descriptor_access_intercept(uint64_t exit_info, > struct vcpu *curr = current; > struct domain *currd = curr->domain; > > - if ( currd->arch.monitor.descriptor_access_enabled ) > + if ( vm_event_is_enabled(curr) && > + currd->arch.monitor.descriptor_access_enabled ) > { > ASSERT(curr->arch.vm_event); > + > hvm_monitor_descriptor_access(exit_info, vmx_exit_qualification, > descriptor, is_write); Stray (and not really necessary) addition of a blank line? Did you perhaps rather mean to remove the now pointless ASSERT()? > @@ -2907,16 +2914,19 @@ void asmlinkage svm_vmexit_handler(void) > > case VMEXIT_IOIO: > { > - int rc; > + if ( vm_event_is_enabled(v) ) > + { > + int rc; With this the outer figure braces introduced by patch 1 can also go away again. > @@ -4703,16 +4711,20 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_regs *regs) > }; > } io_qual; > unsigned int bytes; > - int rc; > > __vmread(EXIT_QUALIFICATION, &io_qual.raw); > bytes = io_qual.size + 1; > > - rc = hvm_monitor_io(io_qual.port, bytes, io_qual.in, io_qual.str); > - if ( rc < 0 ) > - goto exit_and_crash; > - if ( rc ) > - break; > + if ( vm_event_is_enabled(v) ) > + { > + int rc; > + > + rc = hvm_monitor_io(io_qual.port, bytes, io_qual.in, io_qual.str); Make this the initializer of the variable? > --- a/xen/arch/x86/include/asm/vm_event.h > +++ b/xen/arch/x86/include/asm/vm_event.h > @@ -45,4 +45,12 @@ void vm_event_sync_event(struct vcpu *v, bool value); > > void vm_event_reset_vmtrace(struct vcpu *v); > > +static inline bool vm_event_is_enabled(const struct vcpu *v) > +{ > + if ( IS_ENABLED(CONFIG_VM_EVENT) ) > + return v->arch.vm_event != NULL; > + > + return false; > +} Simply return IS_ENABLED(CONFIG_VM_EVENT) && v->arch.vm_event != NULL; ? I guess I might as well do the adjustments while committing, even if it's quite a few of them. In any event, with the adjustments Acked-by: Jan Beulich Jan From xen-devel-bounces@lists.xenproject.org Thu Nov 13 09:18:14 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 09:18:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160776.1488824 (Exim 4.92) (envelope-from ) id 1vJTT3-0007iO-22; Thu, 13 Nov 2025 09:18:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160776.1488824; Thu, 13 Nov 2025 09:18:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJTT2-0007iH-VK; Thu, 13 Nov 2025 09:18:12 +0000 Received: by outflank-mailman (input) for mailman id 1160776; Thu, 13 Nov 2025 09:18:11 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJTT1-0007iB-Kb for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 09:18:11 +0000 Received: from mail-ed1-x52f.google.com (mail-ed1-x52f.google.com [2a00:1450:4864:20::52f]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id abcba1c5-c071-11f0-980a-7dc792cee155; Thu, 13 Nov 2025 10:18:09 +0100 (CET) Received: by mail-ed1-x52f.google.com with SMTP id 4fb4d7f45d1cf-640c6577120so1030376a12.1 for ; Thu, 13 Nov 2025 01:18:09 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 13 Nov 2025 01:18:08 -0800 (PST) Message-ID: Date: Thu, 13 Nov 2025 10:18:07 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 3/7] xen/monitor: wrap monitor_op under CONFIG_VM_EVENT To: Penny Zheng Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , Tamas K Lengyel , Alexandru Isaila , Petre Pircalabu , xen-devel@lists.xenproject.org References: <20251113031630.1465599-1-Penny.Zheng@amd.com> <20251113031630.1465599-4-Penny.Zheng@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251113031630.1465599-4-Penny.Zheng@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.11.2025 04:16, Penny Zheng wrote: > Feature monitor_op is based on vm event subsystem, so monitor.o shall be > wrapped under CONFIG_VM_EVENT. > The following functions are only invoked by monitor-op, so they all shall be > wrapped with CONFIG_VM_EVENT (otherwise they will become unreachable and > violate Misra rule 2.1 when VM_EVENT=n): > - hvm_enable_msr_interception > - hvm_function_table.enable_msr_interception > - hvm_has_set_descriptor_access_existing > - hvm_function_table.set_descriptor_access_existi > - arch_monitor_get_capabilities > Function monitored_msr() still needs a stub to pass compilation when > VM_EVENT=n. > > Signed-off-by: Penny Zheng > --- > v3 -> v4: > - a new commit split from previous "xen/vm_event: consolidate CONFIG_VM_EVENT" > - Another blank line ahead of the #ifdef > - Move hvm_enable_msr_interception() up into the earlier #ifdef > - only arch_monitor_get_capabilities() needs wrapping, as this static inline > function calls hvm_has_set_descriptor_access_exiting(), which is declared only > when VM_EVENT=y > --- > xen/arch/x86/hvm/Makefile | 2 +- > xen/arch/x86/hvm/svm/svm.c | 8 +++++++- > xen/arch/x86/hvm/vmx/vmx.c | 10 ++++++++++ > xen/arch/x86/include/asm/hvm/hvm.h | 18 +++++++++++------- > xen/arch/x86/include/asm/monitor.h | 9 +++++++++ > 5 files changed, 38 insertions(+), 9 deletions(-) Same remark as for patch 2 regarding the subject prefix. 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2025 09:23:55.3747 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c18f9b81-8034-40d4-23b5-08de22965e35 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A100.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4344 On Thu Oct 2, 2025 at 3:55 PM CEST, Alejandro Vallejo wrote: > Hi, > > I've included logic to exit QEMU using the ISA debug exit device. See pat= ch 2. > > Cheers, > Alejandro > > Alejandro Vallejo (2): > x86: Remove Xen as a hard requirement to run XTF. > x86: Allow exiting QEMU in TCG/QEMU > > arch/x86/hvm/traps.c | 16 ++++++++++++- > arch/x86/pv/traps.c | 5 ++++ > arch/x86/setup.c | 53 +++++++++++++++++++++++++++++------------ > common/lib.c | 2 +- > common/report.c | 8 ++++--- > include/xtf/framework.h | 3 +++ > 6 files changed, 67 insertions(+), 20 deletions(-) > > > base-commit: 11b552a416d1164c63be4da670f16cf8a5a9044d Ping From xen-devel-bounces@lists.xenproject.org Thu Nov 13 09:29:08 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 09:29:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160804.1488856 (Exim 4.92) (envelope-from ) id 1vJTdb-0001mI-8r; Thu, 13 Nov 2025 09:29:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160804.1488856; Thu, 13 Nov 2025 09:29:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJTdb-0001mB-62; Thu, 13 Nov 2025 09:29:07 +0000 Received: by outflank-mailman (input) for mailman id 1160804; Thu, 13 Nov 2025 09:29:06 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJTda-0001m5-4T for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 09:29:06 +0000 Received: from mail-ej1-x62e.google.com (mail-ej1-x62e.google.com [2a00:1450:4864:20::62e]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 31eb2930-c073-11f0-980a-7dc792cee155; Thu, 13 Nov 2025 10:29:04 +0100 (CET) Received: by mail-ej1-x62e.google.com with SMTP id a640c23a62f3a-b403bb7843eso112522666b.3 for ; Thu, 13 Nov 2025 01:29:04 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 13 Nov 2025 01:29:03 -0800 (PST) Message-ID: Date: Thu, 13 Nov 2025 10:29:02 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 4/7] xen/p2m: move xenmem_access_to_p2m_access() to common p2m.c To: Penny Zheng Cc: Tamas K Lengyel , Alexandru Isaila , Petre Pircalabu , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org References: <20251113031630.1465599-1-Penny.Zheng@amd.com> <20251113031630.1465599-5-Penny.Zheng@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251113031630.1465599-5-Penny.Zheng@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.11.2025 04:16, Penny Zheng wrote: > Memory access and ALTP2M are two seperate features, while both depending on > helper xenmem_access_to_p2m_access(). So it betters lives in common p2m.c, > other than mem_access.c which will be compiled out when VM_EVENT=n && ALTP2M=y. Yet when both are off, the function becomes unreachable? I.e. doesn't there need to be #ifdef around it, to please Misra? > Coding style has been corrected at the same time. That is, blank lines were inserted and nothing else, afaics. Could have been said explicitly. > Signed-off-by: Penny Zheng > --- > v3 -> v4: > - new commit > --- > xen/arch/x86/mm/mem_access.c | 36 ---------------------------------- > xen/arch/x86/mm/p2m.c | 38 ++++++++++++++++++++++++++++++++++++ > 2 files changed, 38 insertions(+), 36 deletions(-) Imo with this movement, the declaration wants to move out of mem_access.h as well. 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Thu, 13 Nov 2025 01:35:09 -0800 (PST) Message-ID: <136416d6-ea2b-444d-b331-8aef1881ed91@suse.com> Date: Thu, 13 Nov 2025 10:35:07 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 5/7] xen/x86: move declaration from mem_access.h to altp2m.h To: Penny Zheng Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Tamas K Lengyel , Alexandru Isaila , Petre Pircalabu , xen-devel@lists.xenproject.org References: <20251113031630.1465599-1-Penny.Zheng@amd.com> <20251113031630.1465599-6-Penny.Zheng@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251113031630.1465599-6-Penny.Zheng@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.11.2025 04:16, Penny Zheng wrote: > Memory access and ALTP2M are two seperate features, and each could be > controlled via VM_EVENT or ALTP2M. In order to avoid implicit declaration > when ALTP2M=y and VM_EVENT=n on compiling hvm.o/altp2m.o, we move declaration > of the following functions from to : > - p2m_set_suppress_ve > - p2m_set_suppress_ve_multi > - p2m_get_suppress_ve > Potential error on altp2m.c also breaks Misra Rule 8.4. > > Signed-off-by: Penny Zheng Reviewed-by: Jan Beulich This looks to be independent of all earlier changes, and hence could go in ahead of any of them? Jan From xen-devel-bounces@lists.xenproject.org Thu Nov 13 09:49:05 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 09:49:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160831.1488875 (Exim 4.92) (envelope-from ) id 1vJTwm-0005lU-4R; Thu, 13 Nov 2025 09:48:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160831.1488875; Thu, 13 Nov 2025 09:48:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJTwm-0005lN-1z; Thu, 13 Nov 2025 09:48:56 +0000 Received: by outflank-mailman (input) for mailman id 1160831; Thu, 13 Nov 2025 09:48:54 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJTwk-0005lH-Ko for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 09:48:54 +0000 Received: from mail-ej1-x62c.google.com (mail-ej1-x62c.google.com [2a00:1450:4864:20::62c]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id f66d2ff1-c075-11f0-9d18-b5c5bf9af7f9; Thu, 13 Nov 2025 10:48:52 +0100 (CET) Received: by mail-ej1-x62c.google.com with SMTP id a640c23a62f3a-b735487129fso63401466b.0 for ; Thu, 13 Nov 2025 01:48:52 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 13 Nov 2025 01:48:52 -0800 (PST) Message-ID: Date: Thu, 13 Nov 2025 10:48:50 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 6/7] xen/mem_access: wrap memory access when VM_EVENT=n To: Penny Zheng , Tamas K Lengyel Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Alexandru Isaila , Petre Pircalabu , xen-devel@lists.xenproject.org References: <20251113031630.1465599-1-Penny.Zheng@amd.com> <20251113031630.1465599-7-Penny.Zheng@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251113031630.1465599-7-Penny.Zheng@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.11.2025 04:16, Penny Zheng wrote: > Feature memory access is based on vm event subsystem, and it could be disabled > in the future. So a few switch-blocks in do_altp2m_op() need > IS_ENABLED(CONFIG_VM_EVENT) wrapping to pass compilation when ALTP2M=y and > VM_EVENT=n(, hence MEM_ACCESS=n), like HVMOP_altp2m_set_mem_access, etc. > Function p2m_mem_access_check() still needs stub when VM_EVENT=n to > pass compilation. > Although local variable "req_ptr" still remains NULL throughout its lifetime, > with the change of NULL assignment, we will face runtime undefined error only > when CONFIG_USBAN is on. So we strengthen the condition check via adding > vm_event_is_enabled() for the special case. As to this, didn't I ask for ... > --- a/xen/arch/x86/hvm/hvm.c > +++ b/xen/arch/x86/hvm/hvm.c > @@ -52,6 +52,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -2081,7 +2082,7 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla, > #endif > } > > - if ( req_ptr ) > + if ( req_ptr && vm_event_is_enabled(curr) ) > { > if ( monitor_traps(curr, sync, req_ptr) < 0 ) > rc = 0; ... a comment next to the (now seemingly excessive) condition? > @@ -4862,58 +4863,70 @@ static int do_altp2m_op( > break; > > case HVMOP_altp2m_set_mem_access: > - if ( a.u.mem_access.pad ) > - rc = -EINVAL; > - else > - rc = p2m_set_mem_access(d, _gfn(a.u.mem_access.gfn), 1, 0, 0, > - a.u.mem_access.access, > - a.u.mem_access.view); > + if ( IS_ENABLED(CONFIG_VM_EVENT) ) Wouldn't this then better be vm_event_is_enabled()? Or can this (and the ones below) be carried out ahead of enabling? Tamas? In any event, here and even more so ... > + { > + if ( a.u.mem_access.pad ) > + rc = -EINVAL; > + else > + rc = p2m_set_mem_access(d, _gfn(a.u.mem_access.gfn), 1, 0, 0, > + a.u.mem_access.access, > + a.u.mem_access.view); > + } > break; > > case HVMOP_altp2m_set_mem_access_multi: > - if ( a.u.set_mem_access_multi.pad || > - a.u.set_mem_access_multi.opaque > a.u.set_mem_access_multi.nr ) > + if ( IS_ENABLED(CONFIG_VM_EVENT) ) ... here please avoid this heavy churn by using the inverted condition plus break; In all cases you fiddle with rc also needs setting to a suitable error indicator, e.g. -EOPNOTSUPP, I think. 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However, since you ask: You do realize that > all your recent postings were while the tree was frozen? That's okay-ish, but > when preparing a release people would preferably focus on the release, not on > what is to come afterwards. This change of yours, like quite a few from others, > will need to wait until the tree is fully open again. It having been progressed > to the point where it can in principle go in was already a courtesy, considering > the timing. > I'm very sorry for disturbing you and being annoying in this regards. > >> On 24.09.25 13:14, Grygorii Strashko wrote: >>> From: Grygorii Strashko >>> >>> Since commit b99227347230 ("x86: Fix AMD_SVM and INTEL_VMX dependency") the >>> HVM Intel VT-x support can be disabled, but it still keeps VMX >>> code partially built-in. Particularly in HVM code there are two places: >>> >>> 1) hvm/dom0_build.c >>> dom0_construct_pvh()->pvh_populate_p2m() >>> ... >>> if ( cpu_has_vmx && paging_mode_hap(d) && !vmx_unrestricted_guest(v) ) >>> { >>> ... >>> [unreachable for !cpu_has_vmx case] >>> rc = pvh_setup_vmx_realmode_helpers(d); >>> >>> pvh_setup_vmx_realmode_helpers() allocates memory and configures >>> HVM_PARAM_VM86_TSS_SIZED >>> HVM_PARAM_IDENT_PT >>> >>> 2) hvm/hvm.c >>> hvm_set_param() >>> ... >>> case HVM_PARAM_IDENT_PT: >>> >>> if ( !paging_mode_hap(d) || !cpu_has_vmx ) >>> { >>> d->arch.hvm.params[index] = value; >>> break; >>> } >>> [unreachable for !cpu_has_vmx case] >>> ... >>> >>> Hence HVM_PARAM_IDENT_PT/HVM_PARAM_VM86_TSS_SIZED are used only by VMX code >>> above code become unreachable in !cpu_has_vmx case and can be optimazed >>> when !CONFIG_INTEL_VMX. >>> >>> Replace "cpu_has_vmx" with using_vmx() to account !CONFIG_INTEL_VMX and allow >>> compiler DCE to optimize code. >>> >>> Signed-off-by: Grygorii Strashko >>> --- >>> add/remove: 0/0 grow/shrink: 0/2 up/down: 0/-604 (-604) >>> Function old new delta >>> hvm_set_param 1602 1473 -129 >>> dom0_construct_pvh 4438 3963 -475 >>> Total: Before=3567191, After=3566587, chg -0.02% >>> >>> xen/arch/x86/hvm/dom0_build.c | 2 +- >>> xen/arch/x86/hvm/hvm.c | 2 +- >>> 2 files changed, 2 insertions(+), 2 deletions(-) >>> >>> diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c >>> index 5551f9044836..5ac2cf8394d8 100644 >>> --- a/xen/arch/x86/hvm/dom0_build.c >>> +++ b/xen/arch/x86/hvm/dom0_build.c >>> @@ -473,7 +473,7 @@ static int __init pvh_populate_p2m(struct domain *d) >>> } >>> } >>> >>> - if ( cpu_has_vmx && paging_mode_hap(d) && !vmx_unrestricted_guest(v) ) >>> + if ( using_vmx() && paging_mode_hap(d) && !vmx_unrestricted_guest(v) ) >>> { >>> /* >>> * Since Dom0 cannot be migrated, we will only setup the >>> diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c >>> index 95a80369b9b8..70331aeec9a0 100644 >>> --- a/xen/arch/x86/hvm/hvm.c >>> +++ b/xen/arch/x86/hvm/hvm.c >>> @@ -4302,7 +4302,7 @@ static int hvm_set_param(struct domain *d, uint32_t index, uint64_t value) >>> * Only actually required for VT-x lacking unrestricted_guest >>> * capabilities. Short circuit the pause if possible. >>> */ >>> - if ( !paging_mode_hap(d) || !cpu_has_vmx ) >>> + if ( !paging_mode_hap(d) || !using_vmx() ) >>> { >>> d->arch.hvm.params[index] = value; >>> break; >> > -- Best regards, -grygorii From xen-devel-bounces@lists.xenproject.org Thu Nov 13 10:07:42 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 10:07:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160877.1488926 (Exim 4.92) (envelope-from ) id 1vJUEl-00027F-A5; Thu, 13 Nov 2025 10:07:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160877.1488926; Thu, 13 Nov 2025 10:07:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJUEl-000276-6n; Thu, 13 Nov 2025 10:07:31 +0000 Received: by outflank-mailman (input) for mailman id 1160877; Thu, 13 Nov 2025 10:07:30 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJUEj-00026s-Vy for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 10:07:29 +0000 Received: from mail-ed1-x52a.google.com (mail-ed1-x52a.google.com [2a00:1450:4864:20::52a]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 8f2a2f01-c078-11f0-980a-7dc792cee155; Thu, 13 Nov 2025 11:07:28 +0100 (CET) Received: by mail-ed1-x52a.google.com with SMTP id 4fb4d7f45d1cf-64088c6b309so1086815a12.0 for ; Thu, 13 Nov 2025 02:07:28 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 13 Nov 2025 02:07:27 -0800 (PST) Message-ID: <1d0f9933-c12a-410e-84ee-e58fa78d0f8a@suse.com> Date: Thu, 13 Nov 2025 11:07:25 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 5/8] xen/pci: introduce has_vpci_bridge To: Mykyta Poturai Cc: Stefano Stabellini , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stewart Hildebrand , "xen-devel@lists.xenproject.org" References: <39458e03-31c1-4aa6-8b66-f6d72ec8bdd9@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.11.2025 10:49, Mykyta Poturai wrote: > On 06.11.25 14:15, Jan Beulich wrote:> On 24.09.2025 09:59, Mykyta > Poturai wrote: > >> From: Stefano Stabellini > >> > >> has_vpci_bridge is a macro to check if the domain is a domU or is dom0 > >> with vPCI (pci-scan=yes) enabled. > > > > Hmm. Why would DomU-s, now and forever, not have (virtual) bridges? > Wasn't them > > gaining (virtual) bridges actually the longer-term plan? > > > > Seems like there is a misunderstanding here. Indeed it is the plan for > DomUs to have virtual bridges and this check is designed to > differentiate two categories of domains. > 1. All DomUs + Dom0 with the virtual bridge. > 2. Dom0 with HW bridge. > > I will try to rephrase the commit message to be more clear. > > >> @@ -866,7 +866,7 @@ int vpci_init_header(struct pci_dev *pdev) > >> struct vpci_header *header = &pdev->vpci->header; > >> struct vpci_bar *bars = header->bars; > >> int rc; > >> - bool is_hwdom = is_hardware_domain(pdev->domain); > >> + bool is_hwdom = !has_vpci_bridge(pdev->domain); > >> > >> ASSERT(rw_is_write_locked(&pdev->domain->pci_lock)); > > > > For none of the changes (also further ones) it is clear (to me) why the > > substitution is (logically) correct. For this last instance the variable > > name also ends up wrong after the replacement. > >> Jan > > The general logic for this change is that before it we assumed that > hwdom always uses HW bridge. Now it is not always true and hwdom can > also use a virtual bridge, so it needs to be treated the same way as > DomUs are. > > You also mentioned on a previous series > > > Here and perhaps everywhere else I wonder: Is this really an > appropriately > > named predicate for the purpose / context? > > Maybe you have some ideas of a better name? From what I came up with > this seems like the best one. How to name it depends on the (ultimate) purpose. If, as you say, it's intended to cover Dom0 and DomU uniformly when they have a virtual bridge, the name might be quite okay. Then, as you said you would do, better wording may be needed, variable names like the one mentioned above may need adjustment, and any code paths suddenly becoming usable for DomU-s need to be audited for this being a safe/secure thing to do (quite a few of the Dom0-only paths have been taking some liberties so far). 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Smith" , Grygorii Strashko , xen-devel@lists.xenproject.org References: <20251113031630.1465599-1-Penny.Zheng@amd.com> <20251113031630.1465599-8-Penny.Zheng@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251113031630.1465599-8-Penny.Zheng@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.11.2025 04:16, Penny Zheng wrote: > File hvm/vm_event.c and x86/vm_event.c are the extend to vm_event handling > routines, and its compilation shall be guarded by CONFIG_VM_EVENT too. > > Although CONFIG_VM_EVENT is right now forcibly enabled on x86 via > MEM_ACCESS_ALWAYS_ON, we could disable it through disabling > CONFIG_MGMT_HYPERCALLS later. So we remove MEM_ACCESS_ALWAYS_ON and > make VM_EVENT=y on default only on x86 to retain the same. > > The following functions are developed on the basis of vm event framework, or > only invoked by vm_event.c, so they all shall be wrapped with CONFIG_VM_EVENT > (otherwise they will become unreachable and > violate Misra rule 2.1 when VM_EVENT=n): > - hvm_toggle_singlestep > - hvm_fast_singlestep > - hvm_emulate_one_vm_event > - hvmemul_write{,cmpxchg,rep_ins,rep_outs,rep_movs,rep_stos,read_io,write_io}_discard > And Function vm_event_check_ring() needs stub to pass compilation when > VM_EVENT=n. > > Signed-off-by: Penny Zheng > --- > v1 -> v2: > - split out XSM changes Isn't that split out patch also needed as a prereq to the one here? The one here on its own: Acked-by: Jan Beulich But the possibly missing dependency question needs addressing before this may go in. > - remove unnecessary stubs > - move "struct p2m_domain" declaration ahead of the #ifdef > --- > v2 -> v3: > - move .enable_msr_interception and .set_descriptor_access_exiting together > - with the introduction of "vm_event_is_enabled()", all hvm_monitor_xxx() > stubs are no longer needed > - change to use in-place stubs in do_altp2m_op() > - no need to add stub for monitor_traps(), __vm_event_claim_slot(), > vm_event_put_request() and vm_event_vcpu_pause() > - remove MEM_ACCESS_ALWAYS_ON > - return default p2m_access_rwx for xenmem_access_to_p2m_access() when > VM_EVENT=n > - add wrapping for hvm_emulate_one_vm_event/ > hvmemul_write{,cmpxchg,rep_ins,rep_outs,rep_movs,rep_stos,read_io,write_io}_discard > --- No changes at all in this version? The v3 patch was much larger, after all. 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Thu, 13 Nov 2025 02:29:36 -0800 (PST) Message-ID: <2b05b9e8-3f87-41d9-8073-5a4d5c9238ae@suse.com> Date: Thu, 13 Nov 2025 11:29:34 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86: Remove x86 prefixed names from cpuinfo To: Kevin Lampis Cc: andrew.cooper3@citrix.com, roger.pau@citrix.com, xen-devel@lists.xenproject.org References: <20251112201800.3678184-1-kevin.lampis@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251112201800.3678184-1-kevin.lampis@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12.11.2025 21:18, Kevin Lampis wrote: > struct cpuinfo_x86 > .x86 => .family > .x86_vendor => .vendor > .x86_model => .model > .x86_mask => .stepping > > No functional change. Needs you S-o-b. Also the subject is too generic - it gives the impression that you do the transformation for all of xen/arch/x86/. Then: Reviewed-by: Jan Beulich albeit with two remarks: > @@ -657,8 +659,8 @@ static void cf_check init_intel(struct cpuinfo_x86 *c) > /* Work around errata */ > Intel_errata_workarounds(c); > > - if ((c->x86 == 0xf && c->x86_model >= 0x03) || > - (c->x86 == 0x6 && c->x86_model >= 0x0e)) > + if ((c->family == 0xf && c->model >= 0x03) || > + (c->family == 0x6 && c->model >= 0x0e)) > __set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability); While you touch this, indentation also wants correcting. > --- a/xen/arch/x86/include/asm/intel-family.h > +++ b/xen/arch/x86/include/asm/intel-family.h > @@ -179,6 +179,10 @@ > #define INTEL_XEON_PHI_KNL IFM(6, 0x57) /* Knights Landing */ > #define INTEL_XEON_PHI_KNM IFM(6, 0x85) /* Knights Mill */ > > +/* Family 15 - NetBurst */ > +#define INTEL_P4_WILLAMETTE IFM(15, 0x01) /* Also Xeon Foster */ > +#define INTEL_P4_PRESCOTT IFM(15, 0x03) Any reason not to also add the other two that Linux has in this group: #define INTEL_P4_PRESCOTT_2M IFM(15, 0x04) #define INTEL_P4_CEDARMILL IFM(15, 0x06) /* Also Xeon Dempsey */ ? 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AM9PR03MB7526.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 413b537b-6136-4324-e995-08de22a0798e X-MS-Exchange-CrossTenant-originalarrivaltime: 13 Nov 2025 10:36:16.1941 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: fnWiA20eJM/U5F+27ViuW5r/WFiq02x89BJADhw7BDo8wdxAmfmLn1SLo7WPr7xxbbkzsi5jJLJHGh7L+Hd8GMCgR2WEMwLI8txMwwH9pmU= X-MS-Exchange-Transport-CrossTenantHeadersStamped: GVXPR03MB10777 Replace all hardcoded FDT version numbers (such as 16 and 17, or 0x10 and 0= x11) with the macros FDT_LAST_COMPATIBLE_VERSION and FDT_LAST_SUPPORTED_VERSION throughout the Xen device tree and libfdt code. This avoids magic numbers and makes the Xen codebase more robust to future = FDT version changes. Signed-off-by: Dmytro Prokopchuk --- xen/common/device-tree/device-tree.c | 2 +- xen/common/libfdt/fdt.c | 8 +++++--- xen/common/libfdt/fdt_ro.c | 13 +++++++------ xen/common/libfdt/fdt_rw.c | 16 ++++++++-------- 4 files changed, 21 insertions(+), 18 deletions(-) diff --git a/xen/common/device-tree/device-tree.c b/xen/common/device-tree/= device-tree.c index 0b5375f151..ee8b32a8b4 100644 --- a/xen/common/device-tree/device-tree.c +++ b/xen/common/device-tree/device-tree.c @@ -1949,7 +1949,7 @@ static unsigned long unflatten_dt_node(const void *fd= t, sz =3D be32_to_cpu(*(__be32 *)(*p)); noff =3D be32_to_cpu(*(__be32 *)((*p) + 4)); *p +=3D 8; - if ( fdt_version(fdt) < 0x10 ) + if ( fdt_version(fdt) < FDT_LAST_COMPATIBLE_VERSION ) *p =3D ROUNDUP(*p, sz >=3D 8 ? 8 : 4); =20 pname =3D fdt_string(fdt, noff); diff --git a/xen/common/libfdt/fdt.c b/xen/common/libfdt/fdt.c index 9fe7cf4b74..4b30a17b93 100644 --- a/xen/common/libfdt/fdt.c +++ b/xen/common/libfdt/fdt.c @@ -119,7 +119,8 @@ int fdt_check_header(const void *fdt) =20 if (!can_assume(VALID_DTB)) { /* Bounds check structure block */ - if (!can_assume(LATEST) && fdt_version(fdt) < 17) { + if (!can_assume(LATEST) && + fdt_version(fdt) < FDT_LAST_SUPPORTED_VERSION) { if (!check_off_(hdrsize, fdt_totalsize(fdt), fdt_off_dt_struct(fdt))) return -FDT_ERR_TRUNCATED; @@ -154,7 +155,7 @@ const void *fdt_offset_ptr(const void *fdt, int offset,= unsigned int len) || (absoffset + len) > fdt_totalsize(fdt)) return NULL; =20 - if (can_assume(LATEST) || fdt_version(fdt) >=3D 0x11) + if (can_assume(LATEST) || fdt_version(fdt) >=3D FDT_LAST_SUPPORTED_VERSIO= N) if (((uoffset + len) < uoffset) || ((offset + len) > fdt_size_dt_struct(fdt))) return NULL; @@ -195,7 +196,8 @@ uint32_t fdt_next_tag(const void *fdt, int startoffset,= int *nextoffset) offset +=3D sizeof(struct fdt_property) - FDT_TAGSIZE + fdt32_to_cpu(*lenp); if (!can_assume(LATEST) && - fdt_version(fdt) < 0x10 && fdt32_to_cpu(*lenp) >=3D 8 && + fdt_version(fdt) < FDT_LAST_COMPATIBLE_VERSION && + fdt32_to_cpu(*lenp) >=3D 8 && ((offset - fdt32_to_cpu(*lenp)) % 8) !=3D 0) offset +=3D 4; break; diff --git a/xen/common/libfdt/fdt_ro.c b/xen/common/libfdt/fdt_ro.c index 17584da257..f719712b71 100644 --- a/xen/common/libfdt/fdt_ro.c +++ b/xen/common/libfdt/fdt_ro.c @@ -60,7 +60,8 @@ const char *fdt_get_string(const void *fdt, int stroffset= , int *lenp) if (fdt_magic(fdt) =3D=3D FDT_MAGIC) { if (stroffset < 0) goto fail; - if (can_assume(LATEST) || fdt_version(fdt) >=3D 17) { + if (can_assume(LATEST) || + fdt_version(fdt) >=3D FDT_LAST_SUPPORTED_VERSION) { if ((unsigned)stroffset >=3D fdt_size_dt_strings(fdt)) goto fail; if ((fdt_size_dt_strings(fdt) - stroffset) < len) @@ -309,7 +310,7 @@ const char *fdt_get_name(const void *fdt, int nodeoffse= t, int *len) =20 nameptr =3D nh->name; =20 - if (!can_assume(LATEST) && fdt_version(fdt) < 0x10) { + if (!can_assume(LATEST) && fdt_version(fdt) < FDT_LAST_COMPATIBLE_VERSION= ) { /* * For old FDT versions, match the naming conventions of V16: * give only the leaf name (after all /). The actual tree @@ -382,7 +383,7 @@ const struct fdt_property *fdt_get_property_by_offset(c= onst void *fdt, /* Prior to version 16, properties may need realignment * and this API does not work. fdt_getprop_*() will, however. */ =20 - if (!can_assume(LATEST) && fdt_version(fdt) < 0x10) { + if (!can_assume(LATEST) && fdt_version(fdt) < FDT_LAST_COMPATIBLE_VERSION= ) { if (lenp) *lenp =3D -FDT_ERR_BADVERSION; return NULL; @@ -429,7 +430,7 @@ const struct fdt_property *fdt_get_property_namelen(con= st void *fdt, { /* Prior to version 16, properties may need realignment * and this API does not work. fdt_getprop_*() will, however. */ - if (!can_assume(LATEST) && fdt_version(fdt) < 0x10) { + if (!can_assume(LATEST) && fdt_version(fdt) < FDT_LAST_COMPATIBLE_VERSION= ) { if (lenp) *lenp =3D -FDT_ERR_BADVERSION; return NULL; @@ -460,7 +461,7 @@ const void *fdt_getprop_namelen(const void *fdt, int no= deoffset, return NULL; =20 /* Handle realignment */ - if (!can_assume(LATEST) && fdt_version(fdt) < 0x10 && + if (!can_assume(LATEST) && fdt_version(fdt) < FDT_LAST_COMPATIBLE_VERSION= && (poffset + sizeof(*prop)) % 8 && fdt32_ld_(&prop->len) >=3D 8) return prop->data + 4; return prop->data; @@ -493,7 +494,7 @@ const void *fdt_getprop_by_offset(const void *fdt, int = offset, } =20 /* Handle realignment */ - if (!can_assume(LATEST) && fdt_version(fdt) < 0x10 && + if (!can_assume(LATEST) && fdt_version(fdt) < FDT_LAST_COMPATIBLE_VERSION= && (offset + sizeof(*prop)) % 8 && fdt32_ld_(&prop->len) >=3D 8) return prop->data + 4; return prop->data; diff --git a/xen/common/libfdt/fdt_rw.c b/xen/common/libfdt/fdt_rw.c index 3621d3651d..9e87eabc5d 100644 --- a/xen/common/libfdt/fdt_rw.c +++ b/xen/common/libfdt/fdt_rw.c @@ -28,13 +28,13 @@ static int fdt_rw_probe_(void *fdt) return 0; FDT_RO_PROBE(fdt); =20 - if (!can_assume(LATEST) && fdt_version(fdt) < 17) + if (!can_assume(LATEST) && fdt_version(fdt) < FDT_LAST_SUPPORTED_VERSION) return -FDT_ERR_BADVERSION; if (fdt_blocks_misordered_(fdt, sizeof(struct fdt_reserve_entry), fdt_size_dt_struct(fdt))) return -FDT_ERR_BADLAYOUT; - if (!can_assume(LATEST) && fdt_version(fdt) > 17) - fdt_set_version(fdt, 17); + if (!can_assume(LATEST) && fdt_version(fdt) > FDT_LAST_SUPPORTED_VERSION) + fdt_set_version(fdt, FDT_LAST_SUPPORTED_VERSION); =20 return 0; } @@ -430,9 +430,9 @@ int fdt_open_into(const void *fdt, void *buf, int bufsi= ze) mem_rsv_size =3D (fdt_num_mem_rsv(fdt)+1) * sizeof(struct fdt_reserve_entry); =20 - if (can_assume(LATEST) || fdt_version(fdt) >=3D 17) { + if (can_assume(LATEST) || fdt_version(fdt) >=3D FDT_LAST_SUPPORTED_VERSIO= N) { struct_size =3D fdt_size_dt_struct(fdt); - } else if (fdt_version(fdt) =3D=3D 16) { + } else if (fdt_version(fdt) =3D=3D FDT_LAST_COMPATIBLE_VERSION) { struct_size =3D 0; while (fdt_next_tag(fdt, struct_size, &struct_size) !=3D FDT_END) ; @@ -448,7 +448,7 @@ int fdt_open_into(const void *fdt, void *buf, int bufsi= ze) err =3D fdt_move(fdt, buf, bufsize); if (err) return err; - fdt_set_version(buf, 17); + fdt_set_version(buf, FDT_LAST_SUPPORTED_VERSION); fdt_set_size_dt_struct(buf, struct_size); fdt_set_totalsize(buf, bufsize); return 0; @@ -477,8 +477,8 @@ int fdt_open_into(const void *fdt, void *buf, int bufsi= ze) =20 fdt_set_magic(buf, FDT_MAGIC); fdt_set_totalsize(buf, bufsize); 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Thu, 13 Nov 2025 02:37:19 -0800 (PST) Message-ID: <901e9a91-60f0-4b9b-a989-fbd64cf40fb1@suse.com> Date: Thu, 13 Nov 2025 11:37:17 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 5/8] smp: Move cpu_up/down helpers to common code To: Mykyta Poturai Cc: Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Timothy Pearson , Alistair Francis , Bob Eshleman , Connor Davis , Oleksii Kurochko , "xen-devel@lists.xenproject.org" References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12.11.2025 11:51, Mykyta Poturai wrote: > This will reduce code duplication for the upcoming cpu hotplug support > on Arm64 patch. > > SMT-disable enforcement check is moved into a separate > architecture-specific function. > > Signed-off-by: Mykyta Poturai Solely from an x86 perspective this looks okay to me, but on Arm you introduce ... > --- a/xen/common/smp.c > +++ b/xen/common/smp.c > @@ -16,6 +16,7 @@ > * GNU General Public License for more details. > */ > > +#include > #include > #include > #include > @@ -104,6 +105,37 @@ void smp_call_function_interrupt(void) > irq_exit(); > } > > +long cf_check cpu_up_helper(void *data) > +{ > + unsigned int cpu = (unsigned long)data; > + int ret = cpu_up(cpu); > + > + /* Have one more go on EBUSY. */ > + if ( ret == -EBUSY ) > + ret = cpu_up(cpu); > + > + if ( !ret && arch_smt_cpu_disable(cpu) ) > + { > + ret = cpu_down_helper(data); > + if ( ret ) > + printk("Could not re-offline CPU%u (%d)\n", cpu, ret); > + else > + ret = -EPERM; > + } > + > + return ret; > +} > + > +long cf_check cpu_down_helper(void *data) > +{ > + int cpu = (unsigned long)data; > + int ret = cpu_down(cpu); > + /* Have one more go on EBUSY. */ > + if ( ret == -EBUSY ) > + ret = cpu_down(cpu); > + return ret; > +} ...unreachable code, which - for the case when RUNTIME_CPU_CONTROL=n - won't even be rectified by the next patch. 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Thu, 13 Nov 2025 02:44:04 -0800 (PST) Message-ID: <25ec2731-e629-4cc7-b374-5e48fba4c814@suse.com> Date: Thu, 13 Nov 2025 11:44:02 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RESEND PATCH v2 1/3] x86/hvm: move hvm_shadow_handle_cd() to vmx code To: Grygorii Strashko Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , Teddy Astie , "xen-devel@lists.xenproject.org" References: <20251111200958.3576341-1-grygorii_strashko@epam.com> <20251111200958.3576341-2-grygorii_strashko@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251111200958.3576341-2-grygorii_strashko@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 11.11.2025 21:10, Grygorii Strashko wrote: > From: Grygorii Strashko > > Functions: > hvm_shadow_handle_cd() > hvm_set_uc_mode() > domain_exit_uc_mode() > are used only by Intel VMX code, so move them to VMX code. > > While here: > - minor format change in domain_exit_uc_mode() > - s/(0/1)/(false/true) for bool types > - use "struct domain *" as parameter in hvm_set_uc_mode() > - use "struct domain *d" as local var in hvm_shadow_handle_cd() One more please: > @@ -1451,6 +1452,66 @@ static int cf_check vmx_get_guest_pat(struct vcpu *v, u64 *gpat) > return 1; > } > > +/* Exit UC mode only if all VCPUs agree on MTRR/PAT and are not in no_fill. */ > +static bool domain_exit_uc_mode(struct vcpu *v) > +{ > + struct domain *d = v->domain; > + struct vcpu *vs; const on all three pointer target types. Then, together with the function prefix adjustment discussed on the other sub-thread, Acked-by: Jan Beulich Jan From xen-devel-bounces@lists.xenproject.org Thu Nov 13 10:59:14 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 10:59:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160958.1488990 (Exim 4.92) (envelope-from ) id 1vJV2e-000420-7N; Thu, 13 Nov 2025 10:59:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160958.1488990; Thu, 13 Nov 2025 10:59:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJV2e-00041t-4d; Thu, 13 Nov 2025 10:59:04 +0000 Received: by outflank-mailman (input) for mailman id 1160958; Thu, 13 Nov 2025 10:59:03 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJV2d-00041n-F7 for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 10:59:03 +0000 Received: from mail-ej1-x62f.google.com (mail-ej1-x62f.google.com [2a00:1450:4864:20::62f]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id bd840d88-c07f-11f0-980a-7dc792cee155; Thu, 13 Nov 2025 11:58:52 +0100 (CET) Received: by mail-ej1-x62f.google.com with SMTP id a640c23a62f3a-b7277324204so85797966b.0 for ; Thu, 13 Nov 2025 02:58:52 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. [37.24.206.209]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b734fdaf6dasm138748666b.63.2025.11.13.02.58.50 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 13 Nov 2025 02:58:51 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: bd840d88-c07f-11f0-980a-7dc792cee155 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=google; t=1763031532; x=1763636332; darn=lists.xenproject.org; h=content-transfer-encoding:autocrypt:subject:from:cc:to :content-language:user-agent:mime-version:date:message-id:from:to:cc :subject:date:message-id:reply-to; bh=tGxBTIU10Y/v1zy5kRtoc14zm7cERi9DxeHKAfNyZsM=; b=E9MfgM23VCNJwJajYViaTFlpDqD/5KN+qYSQ5zuDTGjQMIJw6w/A2ZyKtkyZ02aFAA myefvF45VRJhysF3G8rpMZftk0DOIswPuDeuzi/r2m3vw/5F1dYV3QKBDVgBFH+jmJCI GzaqAF8GSiK0OIstId0lgdk4zHxk9lpvy9f/N5NG5b8dtGEo0WPzMxO/RtZxalIIL2PP 3x1XHWqwMWM6iOZOTkoPU8fqaZBxOtM6mhmeAG7OA0uwB4+bEzOPOh0uqI9krDQQCMk5 ce05+ffMgq6eeqgFHlM9cJXGvDAOLhpcwPX/aO/w1dKYsZ2KI6UFOVto2lFMTiCf3wUQ 6ZiQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1763031532; x=1763636332; h=content-transfer-encoding:autocrypt:subject:from:cc:to :content-language:user-agent:mime-version:date:message-id:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=tGxBTIU10Y/v1zy5kRtoc14zm7cERi9DxeHKAfNyZsM=; b=NsiYpmEaN9evZafu/eWbUgKRrIfQs138wB5MTPTR5q4Aq9kiTCoua8sDn3yLcP+ncF qbwAnTcbE3kd28dljPxxBHqgS3JQCQDJwhlSHqJ3kVKyOl8/5ffxRlhBqHlekcUD4Hwy 9YjGml8eLiSVWeFrdnGDRWkipWChdP2OTqXrDpG3xHMzjB/ns77Aa5UnxfA+J+V5VnDp rmJab8+4QDmPIXIyQJ7lXadE86N3H01FIyF23Dizr8aUz9VZ9q7GHLp6nLMl/OyFurBs dbGdB7cXzilnvvvmV9GK5BypqvX1KxgldaBpJ7nnjg3Ok+DuB/fkIaS9alFb9V7OgSrF eQ/Q== X-Gm-Message-State: AOJu0YyZsinKghiYOUzg9B8xKFuy+hfPnWW09hcio04N7pikrPxTbQ1P x3LKQBd9YEhQhF4WVCff9Z8+pfDC+fAOXx9jvyBpwPrgaYuScmER99HcgJ5D3fanbMWpISOx+Qy jkuc= X-Gm-Gg: ASbGnctgnJp/RJZxBJ5IveeoEcX1oappz2YdkFGQe0H5B0VSSGex5MBXiVsDmot0XKM jRp8tkXyC4H34gecEIMDeUDu1KPuOa9sNV9kkBtYeODGS+VWViwnIuqG1UvWLAsxsDuwVUYfNEP aEyEy/PPRvdK7u6WpNjycuQfJ2miL0yN3+Zo107r/yhPJZIzqMnK0zoGhbPRuba9ZEY3hvDAylx PJCwVsqi/6Vt0kM9REH6w6jqCzNMVG91IXoKPuRh6reytoatJnDozln2ggPRtkjd0tjt6Vk8RHK cztLEIX/0yWIO5p56JsIQ0SRdD2mv4ZlPt1KiOm5gxJ4UbpVydKYDPd35O3r8lTNNJcfUpi/cQh SahXU8/g5xnnrxGlIIXG81b2It8ZPG5k8CejXYJgi1QZzRO7xJXa8TKSB3s0JwkEq1KUH86nVJU 9rta0NYUEXDseQ4eD+A/pWihzOtXPTKIX2Iqog6SVV6T/bcSMNOMdksn1ePd0DYQF3 X-Google-Smtp-Source: AGHT+IGNSi9EfQWVr+QcWe2PZLCDNYCyAdY9Arukhjy3Jxv9LEg+T4zsVGiibXpzQU+qJT6q52s/AA== X-Received: by 2002:a17:907:3e9e:b0:b70:df0d:e2f1 with SMTP id a640c23a62f3a-b73319b2c68mr559087266b.28.1763031531576; Thu, 13 Nov 2025 02:58:51 -0800 (PST) Message-ID: Date: Thu, 13 Nov 2025 11:58:49 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= From: Jan Beulich Subject: [PATCH] symbols: don't over-align data Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Arrays of .byte or .short don't really need aligning better than 1 or 2 bytes respectively. Arrays of .long also don't need aligning to 8 bytes (which would have happened when BITS_PER_LONG is 64 and SYMBOLS_ORIGIN is not defined). Signed-off-by: Jan Beulich --- Strictly speaking, however, we may have been under-aligning the arrays for x86-64: The psABI mandates "An array uses the same alignment as its elements, except that a local or global array variable of length at least 16 bytes or a C99 variable- length array variable always has alignment of at least 16 bytes." I don't think the compiler can leverage that though, as long as we declare the arrays as incomplete ones (without dimension). Note the subtlety though: C99 distinguishes [] and [*] (only the latter being "variable length"), while the psABI may not mean to limit its constraint to the latter form. This, contextually (not functionally), goes on top of "symbols: check table sizes don't change between linking passes 2 and 3" --- a/xen/tools/symbols.c +++ b/xen/tools/symbols.c @@ -252,7 +252,7 @@ static void read_map(FILE *in) } } -static void output_label(const char *label, bool keep) +static void output_label(const char *label, const char *align, bool keep) { static bool pending; @@ -266,10 +266,10 @@ static void output_label(const char *lab return; if (symbol_prefix_char) { - printf("DATA(%c%s, ALGN)\n", symbol_prefix_char, label); + printf("DATA(%c%s, %s)\n", symbol_prefix_char, label, align); printf("#define CURRENT %c%s\n", symbol_prefix_char, label); } else { - printf("DATA(%s, ALGN)\n", label); + printf("DATA(%s, %s)\n", label, align); printf("#define CURRENT %s\n", label); } } @@ -353,9 +353,9 @@ static void write_src(void) printf("#ifndef SYMBOLS_ORIGIN\n"); printf("#define SYMBOLS_ORIGIN 0\n"); - output_label("symbols_addresses", false); + output_label("symbols_addresses", "ALGN", false); printf("#else\n"); - output_label("symbols_offsets", true); + output_label("symbols_offsets", "ALGN", true); printf("#endif\n"); for (i = 0, ends = 0; i < table_cnt; i++) { printf("\tPTR\t%#llx - SYMBOLS_ORIGIN\n", table[i].addr); @@ -380,14 +380,14 @@ static void write_src(void) table[i].addr + table[i].size); } - output_label("symbols_num_addrs", false); + output_label("symbols_num_addrs", "4", false); printf("\t.long\t%d\n", table_cnt + ends); /* table of offset markers, that give the offset in the compressed stream * every 256 symbols */ markers = malloc(sizeof(*markers) * ((table_cnt + ends + 255) >> 8)); - output_label("symbols_names", false); + output_label("symbols_names", "1", false); for (i = 0, off = 0, ends = 0; i < table_cnt; i++) { if (((i + ends) & 0xFF) == 0) markers[(i + ends) >> 8] = off; @@ -412,11 +412,11 @@ static void write_src(void) ++off; } - output_label("symbols_markers", false); + output_label("symbols_markers", "4", false); for (i = 0; i < ((table_cnt + ends + 255) >> 8); i++) printf("\t.long\t%d\n", markers[i]); - output_label("symbols_token_table", false); + output_label("symbols_token_table", "1", false); off = 0; for (i = 0; i < 256; i++) { best_idx[i] = off; @@ -425,12 +425,12 @@ static void write_src(void) off += strlen(buf) + 1; } - output_label("symbols_token_index", false); + output_label("symbols_token_index", "2", false); for (i = 0; i < 256; i++) printf("\t.short\t%d\n", best_idx[i]); if (sort_by_name) { - output_label("symbols_num_names", false); + output_label("symbols_num_names", "4", false); printf("\t.long\t%d\n", table_cnt); /* Sorted by original symbol names and type. */ @@ -439,12 +439,12 @@ static void write_src(void) /* A fixed sized array with two entries: offset in the * compressed stream (for symbol name), and offset in * symbols_addresses (or symbols_offset). */ - output_label("symbols_sorted_offsets", false); + output_label("symbols_sorted_offsets", "4", false); for (i = 0; i < table_cnt; i++) printf("\t.long %u, %u\n", table[i].stream_offset, table[i].addr_idx); } - output_label(NULL, false); + output_label(NULL, NULL, false); free(markers); } From xen-devel-bounces@lists.xenproject.org Thu Nov 13 11:06:59 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 11:06:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160973.1489000 (Exim 4.92) (envelope-from ) id 1vJVAD-0005wc-1k; Thu, 13 Nov 2025 11:06:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160973.1489000; Thu, 13 Nov 2025 11:06:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJVAC-0005wV-UD; Thu, 13 Nov 2025 11:06:52 +0000 Received: by outflank-mailman (input) for mailman id 1160973; Thu, 13 Nov 2025 11:06:51 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJVAB-0005wP-KT for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 11:06:51 +0000 Received: from mail-ed1-x532.google.com (mail-ed1-x532.google.com [2a00:1450:4864:20::532]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id da598ad3-c080-11f0-9d18-b5c5bf9af7f9; Thu, 13 Nov 2025 12:06:50 +0100 (CET) Received: by mail-ed1-x532.google.com with SMTP id 4fb4d7f45d1cf-64162c04f90so1196830a12.0 for ; Thu, 13 Nov 2025 03:06:50 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 13 Nov 2025 03:06:49 -0800 (PST) Message-ID: Date: Thu, 13 Nov 2025 12:06:47 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= From: Jan Beulich Subject: [PATCH 0/3] x86: "brk" allocator Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Derive for our purposes something similar to what Linux has been having for a long while. 1: x86: introduce "brk" allocator 2: x86/EFI: replace ebmalloc() 3: xhci-dbc: use brk_alloc() To reduce padding holes, .bss.page_aligned and per-CPU data may want moving immediately ahead of __brk_start[]. Albeit then the tail of per-CPU data will all be padding space; sadly the TSS wants/needs page-aligning for XPTI purposes. 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Thu, 13 Nov 2025 03:08:20 -0800 (PST) Message-ID: <7a3eb7f3-db3e-4c2f-a231-cdf05a14be26@suse.com> Date: Thu, 13 Nov 2025 12:08:18 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 1/3] x86: introduce "brk" allocator From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit ... to replace ebmalloc(), and then to find further use(s) to allow recovering memory which is needed very early (and hence needs setting up statically), but may not fully be used (or not used at all). Note that unlike free_ebmalloc_unused_mem(), brk_free_unused() (once other code is converted) will be able to free part of the BRK space even in the xen.efi case. That would happen if BRK space extends across a 2Mb boundary, and actual use stops before that boundary. Signed-off-by: Jan Beulich --- Changing setup.c's reserve_e820_ram() uses would be cumbersome when done right here. That'll be done when ebmalloc() is replaced, and hence what's there can also simply be replaced. The xen.efi detection may want separating out into a helper. When linking xen.efi, ld produces a base relocation for the reference to __subsystem__, which is wrong (that's an absolute symbol, after all). While that will need fixing there, it does no harm for our purposes. --- a/xen/arch/x86/boot/Makefile +++ b/xen/arch/x86/boot/Makefile @@ -1,4 +1,5 @@ obj-bin-y += head.o +obj-bin-y += brk.init.o obj-bin-y += built-in-32.o obj-bin-y += $(obj64) --- /dev/null +++ b/xen/arch/x86/boot/brk.c @@ -0,0 +1,72 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include +#include +#include +#include + +#include + +extern char __brk_start[]; +extern const char __bss_end[]; + +static unsigned long __initdata allocated; +static bool __initdata finished; + +void *__init brk_alloc(size_t size) +{ + void *ptr = __brk_start + allocated; + + if ( finished ) + return NULL; + + /* Allocations PAGE_SIZE and up will be page-aligned. */ + if ( size >= PAGE_SIZE ) + allocated = ROUNDUP(allocated, PAGE_SIZE); + + allocated += ROUNDUP(size, sizeof(void *)); + + if ( allocated > __bss_end - __brk_start ) + return NULL; + + return ptr; +} + +unsigned long __init brk_get_unused_start(void) +{ + finished = true; + + allocated = ROUNDUP(allocated, PAGE_SIZE); + + return (unsigned long)__brk_start + allocated; +} + +void __init brk_free_unused(void) +{ + unsigned long start = brk_get_unused_start(), + end = (unsigned long)__bss_end; + unsigned int subsys; + + /* + * Only xen.efi will have the symbol __subsystem__ available, and it'll + * be non-zero (10) there. In ELF the symbol will be undefined, and + * hence zero will be loaded into the register. + */ + asm ( ".weak __subsystem__; mov $__subsystem__, %0" : "=r" (subsys) ); + + /* using_2M_mapping() isn't available here. */ + if ( IS_ENABLED(CONFIG_XEN_ALIGN_2M) || subsys ) + start = PAGE_ALIGN_2M(start); + + if ( start >= end ) + return; + + destroy_xen_mappings(start, PAGE_ALIGN_2M(end)); + + /* + * By reserving needed space early in the E820 map, excess space gets freed + * way before we make it here. Don't free the range a 2nd time. + */ + + printk(XENLOG_INFO "Freed %lukB unused BRK memory\n", (end - start) >> 10); +} --- /dev/null +++ b/xen/arch/x86/include/asm/brk.h @@ -0,0 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include + +void *brk_alloc(size_t size); +unsigned long brk_get_unused_start(void); +void brk_free_unused(void); --- a/xen/arch/x86/xen.lds.S +++ b/xen/arch/x86/xen.lds.S @@ -331,7 +331,11 @@ SECTIONS __bss_start = .; *(.bss.page_aligned*) PERCPU_BSS - *(.bss .bss.*) + *(.bss .bss.[a-zA-Z0-9_]*) + . = ALIGN(PAGE_SIZE); + __brk_start = .; + *(.bss..brk.page_aligned*) + *(.bss..brk*) . = ALIGN(POINTER_ALIGN); __bss_end = .; } PHDR(text) --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -112,6 +112,7 @@ #include #include +#include #include #include #include @@ -337,6 +338,8 @@ void __init arch_init_memory(void) efi_init_memory(); + brk_free_unused(); + #ifndef NDEBUG if ( highmem_start ) { From xen-devel-bounces@lists.xenproject.org Thu Nov 13 11:09:44 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 11:09:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1160998.1489021 (Exim 4.92) (envelope-from ) id 1vJVCw-00071O-Nx; Thu, 13 Nov 2025 11:09:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1160998.1489021; Thu, 13 Nov 2025 11:09:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJVCw-00071H-K0; Thu, 13 Nov 2025 11:09:42 +0000 Received: by outflank-mailman (input) for mailman id 1160998; Thu, 13 Nov 2025 11:09:41 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJVCv-00071B-21 for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 11:09:41 +0000 Received: from mail-ed1-x52a.google.com (mail-ed1-x52a.google.com [2a00:1450:4864:20::52a]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 3f821288-c081-11f0-9d18-b5c5bf9af7f9; Thu, 13 Nov 2025 12:09:39 +0100 (CET) Received: by mail-ed1-x52a.google.com with SMTP id 4fb4d7f45d1cf-6419e6dab7fso999838a12.2 for ; Thu, 13 Nov 2025 03:09:39 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 13 Nov 2025 03:09:39 -0800 (PST) Message-ID: <452fdf1f-646a-4bb1-83ea-ac4c998a096b@suse.com> Date: Thu, 13 Nov 2025 12:09:37 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 2/3] x86/EFI: replace ebmalloc() From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Marek Marczykowski , Daniel Smith , Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Use the new brk_alloc() instead, with ebmalloc() merely being a thin wrapper. Signed-off-by: Jan Beulich --- I'm not quite certain whether we ought to permit non-page-granular reservations. The in-memory image being somewhat larger due to possibly excessive padding isn't really a big problem, I think. --- a/xen/Rules.mk +++ b/xen/Rules.mk @@ -262,7 +262,7 @@ quiet_cmd_obj_init_o = INIT_O $@ define cmd_obj_init_o $(OBJDUMP) -h $< | while read idx name sz rest; do \ case "$$name" in \ - .*.local) ;; \ + .*.local|.bss..brk*) ;; \ .text|.text.*|.data|.data.*|.bss|.bss.*) \ test $$(echo $$sz | sed 's,00*,0,') != 0 || continue; \ echo "Error: size of $<:$$name is 0x$$sz" >&2; \ --- a/xen/arch/x86/efi/efi-boot.h +++ b/xen/arch/x86/efi/efi-boot.h @@ -10,6 +10,7 @@ #include #include +#include #include #include #include @@ -119,6 +120,18 @@ static void __init relocate_trampoline(u reloc_trampoline64(); } +DEFINE_BRK(efi, MB(1)); + +static void *__init ebmalloc(size_t size) +{ + void *ptr = brk_alloc(size); + + if ( !ptr ) + blexit(L"Out of BRK memory\r\n"); + + return ptr; +} + static void __init place_string(u32 *addr, const char *s) { char *alloc = NULL; --- a/xen/arch/x86/efi/stub.c +++ b/xen/arch/x86/efi/stub.c @@ -41,12 +41,4 @@ void __init noreturn efi_multiboot2(EFI_ void __init efi_init_memory(void) { } -bool efi_boot_mem_unused(unsigned long *start, unsigned long *end) -{ - /* FIXME: Simplify once the call here with two NULLs goes away. */ - if ( start || end ) - *start = *end = (unsigned long)_end; - return false; -} - void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t l4e) { } --- a/xen/arch/x86/include/asm/brk.h +++ b/xen/arch/x86/include/asm/brk.h @@ -2,6 +2,10 @@ #include +#define DEFINE_BRK(var, size) \ + static char __section(".bss..brk.page_aligned") __aligned(PAGE_SIZE) \ + __used var ## _brk_[size] + void *brk_alloc(size_t size); unsigned long brk_get_unused_start(void); void brk_free_unused(void); --- a/xen/arch/x86/include/asm/setup.h +++ b/xen/arch/x86/include/asm/setup.h @@ -9,6 +9,8 @@ extern const char __2M_rodata_start[], _ extern char __2M_init_start[], __2M_init_end[]; extern char __2M_rwdata_start[], __2M_rwdata_end[]; +extern unsigned long brk_end; + extern unsigned long xenheap_initial_phys_start; extern uint64_t boot_tsc_stamp; --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include #include @@ -163,6 +164,8 @@ cpumask_t __read_mostly cpu_present_map; unsigned long __read_mostly xen_phys_start; +unsigned long __ro_after_init brk_end; + /* Only used in asm code and within this source file */ char asmlinkage __section(".init.bss.stack_aligned") __aligned(STACK_SIZE) cpu0_stack[STACK_SIZE]; @@ -1109,7 +1112,6 @@ void asmlinkage __init noreturn __start_ struct boot_info *bi; unsigned long nr_pages, raw_max_page; int i, j, bytes = 0; - unsigned long eb_start, eb_end; bool acpi_boot_table_init_done = false, relocated = false; bool vm_init_done = false; int ret; @@ -1473,7 +1475,7 @@ void asmlinkage __init noreturn __start_ /* * This needs to remain in sync with remove_xen_ranges() and the * respective reserve_e820_ram() invocation below. No need to - * query efi_boot_mem_unused() here, though. + * query brk_get_unused_start() here, though. */ xen->start = virt_to_maddr(_stext); xen->size = __2M_rwdata_end - _stext; @@ -1616,18 +1618,11 @@ void asmlinkage __init noreturn __start_ if ( !xen_phys_start ) panic("Not enough memory to relocate Xen\n"); - /* FIXME: Putting a hole in .bss would shatter the large page mapping. */ - if ( using_2M_mapping() ) - efi_boot_mem_unused(NULL, NULL); - /* This needs to remain in sync with remove_xen_ranges(). */ - if ( efi_boot_mem_unused(&eb_start, &eb_end) ) - { - reserve_e820_ram(&boot_e820, __pa(_stext), __pa(eb_start)); - reserve_e820_ram(&boot_e820, __pa(eb_end), __pa(__2M_rwdata_end)); - } - else - reserve_e820_ram(&boot_e820, __pa(_stext), __pa(__2M_rwdata_end)); + brk_end = brk_get_unused_start(); + if ( using_2M_mapping() ) + brk_end = PAGE_ALIGN_2M(brk_end); + reserve_e820_ram(&boot_e820, __pa(_stext), __pa(brk_end)); /* Late kexec reservation (dynamic start address). */ kexec_reserve_area(); @@ -2231,7 +2226,6 @@ __initcall(init_xen_cap_info); int __hwdom_init remove_xen_ranges(struct rangeset *r) { - paddr_t start, end; int rc; /* S3 resume code (and other real mode trampoline code) */ @@ -2253,26 +2247,10 @@ int __hwdom_init remove_xen_ranges(struc return rc; /* hypervisor .data + .bss */ - if ( efi_boot_mem_unused(&start, &end) ) - { - ASSERT(__pa(start) >= __pa(&__2M_rwdata_start)); - rc = rangeset_remove_range(r, PFN_DOWN(__pa(&__2M_rwdata_start)), - PFN_DOWN(__pa(start) - 1)); - if ( rc ) - return rc; - ASSERT(__pa(end) <= __pa(&__2M_rwdata_end)); - rc = rangeset_remove_range(r, PFN_DOWN(__pa(end)), - PFN_DOWN(__pa(&__2M_rwdata_end) - 1)); - if ( rc ) - return rc; - } - else - { - rc = rangeset_remove_range(r, PFN_DOWN(__pa(&__2M_rwdata_start)), - PFN_DOWN(__pa(&__2M_rwdata_end) - 1)); - if ( rc ) - return rc; - } + rc = rangeset_remove_range(r, PFN_DOWN(__pa(&__2M_rwdata_start)), + PFN_DOWN(__pa(brk_end) - 1)); + if ( rc ) + return rc; return 0; } --- a/xen/arch/x86/tboot.c +++ b/xen/arch/x86/tboot.c @@ -321,8 +321,6 @@ void tboot_shutdown(uint32_t shutdown_ty /* if this is S3 then set regions to MAC */ if ( shutdown_type == TB_SHUTDOWN_S3 ) { - unsigned long s, e; - /* * Xen regions for tboot to MAC. This needs to remain in sync with * remove_xen_ranges(). @@ -336,16 +334,8 @@ void tboot_shutdown(uint32_t shutdown_ty g_tboot_shared->mac_regions[1].size = __2M_rodata_end - _stext; /* hypervisor .data + .bss */ g_tboot_shared->mac_regions[2].start = (uint64_t)__pa(&__2M_rwdata_start); - g_tboot_shared->mac_regions[2].size = __2M_rwdata_end - __2M_rwdata_start; - if ( efi_boot_mem_unused(&s, &e) ) - { - g_tboot_shared->mac_regions[2].size = - s - (unsigned long)__2M_rwdata_start; - g_tboot_shared->mac_regions[3].start = __pa(e); - g_tboot_shared->mac_regions[3].size = - (unsigned long)__2M_rwdata_end - e; - g_tboot_shared->num_mac_regions = 4; - } + g_tboot_shared->mac_regions[2].size = + brk_end - (unsigned long)__2M_rwdata_start; /* * MAC domains and other Xen memory --- a/xen/common/efi/boot.c +++ b/xen/common/efi/boot.c @@ -1788,8 +1788,6 @@ void __init efi_init_memory(void) pte_attr_t prot; } *extra, *extra_head = NULL; - free_ebmalloc_unused_mem(); - if ( !efi_enabled(EFI_BOOT) ) return; --- a/xen/common/efi/ebmalloc.c +++ /dev/null @@ -1,74 +0,0 @@ -#include "efi.h" -#include -#include - -#ifdef CONFIG_ARM -/* - * TODO: Enable EFI boot allocator on ARM. - * This code can be common for x86 and ARM. - * Things TODO on ARM before enabling ebmalloc: - * - estimate required EBMALLOC_SIZE value, - * - where (in which section) ebmalloc_mem[] should live; if in - * .bss.page_aligned, as it is right now, then whole BSS zeroing - * have to be disabled in xen/arch/arm/arm64/head.S; though BSS - * should be initialized somehow before use of variables living there, - * - use ebmalloc() in ARM/common EFI boot code, - * - call free_ebmalloc_unused_mem() somewhere in init code. - */ -#define EBMALLOC_SIZE MB(0) -#else -#define EBMALLOC_SIZE MB(1) -#endif - -static char __section(".bss.page_aligned") __aligned(PAGE_SIZE) - ebmalloc_mem[EBMALLOC_SIZE]; -static unsigned long __read_mostly ebmalloc_allocated; - -/* EFI boot allocator. */ -void __init *ebmalloc(size_t size) -{ - void *ptr = ebmalloc_mem + ebmalloc_allocated; - - ebmalloc_allocated += ROUNDUP(size, sizeof(void *)); - - if ( ebmalloc_allocated > sizeof(ebmalloc_mem) ) - blexit(L"Out of static memory\r\n"); - - return ptr; -} - -bool efi_boot_mem_unused(unsigned long *start, unsigned long *end) -{ - /* FIXME: Drop once the call here with two NULLs goes away. */ - if ( !start && !end ) - { - ebmalloc_allocated = sizeof(ebmalloc_mem); - return false; - } - - *start = (unsigned long)ebmalloc_mem + PAGE_ALIGN(ebmalloc_allocated); - *end = (unsigned long)ebmalloc_mem + sizeof(ebmalloc_mem); - - return *start < *end; -} - -void __init free_ebmalloc_unused_mem(void) -{ - unsigned long start, end; - - if ( !efi_boot_mem_unused(&start, &end) ) - return; - - destroy_xen_mappings(start, end); - -#ifdef CONFIG_X86 - /* - * By reserving the space early in the E820 map, it gets freed way before - * we make it here. Don't free the range a 2nd time. - */ -#else - init_xenheap_pages(__pa(start), __pa(end)); -#endif - - printk(XENLOG_INFO "Freed %lukB unused BSS memory\n", (end - start) >> 10); -} --- a/xen/common/efi/efi-common.mk +++ b/xen/common/efi/efi-common.mk @@ -1,4 +1,4 @@ -EFIOBJ-y := boot.init.o pe.init.o ebmalloc.o runtime.o +EFIOBJ-y := boot.init.o pe.init.o runtime.o EFIOBJ-$(CONFIG_COMPAT) += compat.o CFLAGS-y += -fshort-wchar --- a/xen/common/efi/efi.h +++ b/xen/common/efi/efi.h @@ -48,10 +48,6 @@ void noreturn blexit(const CHAR16 *str); const CHAR16 *wmemchr(const CHAR16 *s, CHAR16 c, UINTN n); -/* EFI boot allocator. */ -void *ebmalloc(size_t size); -void free_ebmalloc_unused_mem(void); - const void *pe_find_section(const void *image, const UINTN image_size, const CHAR16 *section_name, UINTN *size_out); --- a/xen/include/xen/efi.h +++ b/xen/include/xen/efi.h @@ -39,7 +39,6 @@ static inline bool efi_enabled(unsigned extern bool efi_secure_boot; void efi_init_memory(void); -bool efi_boot_mem_unused(unsigned long *start, unsigned long *end); bool efi_rs_using_pgtables(void); unsigned long efi_get_time(void); void efi_halt_system(void); From xen-devel-bounces@lists.xenproject.org Thu Nov 13 11:10:20 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 11:10:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161008.1489030 (Exim 4.92) (envelope-from ) id 1vJVDY-0008Tv-0U; Thu, 13 Nov 2025 11:10:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161008.1489030; Thu, 13 Nov 2025 11:10:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJVDX-0008Tm-SA; Thu, 13 Nov 2025 11:10:19 +0000 Received: by outflank-mailman (input) for mailman id 1161008; Thu, 13 Nov 2025 11:10:18 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJVDW-00071B-Po for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 11:10:18 +0000 Received: from mail-ej1-x629.google.com (mail-ej1-x629.google.com [2a00:1450:4864:20::629]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 565afd64-c081-11f0-9d18-b5c5bf9af7f9; Thu, 13 Nov 2025 12:10:18 +0100 (CET) Received: by mail-ej1-x629.google.com with SMTP id a640c23a62f3a-b472842981fso81494066b.1 for ; Thu, 13 Nov 2025 03:10:18 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 13 Nov 2025 03:10:17 -0800 (PST) Message-ID: Date: Thu, 13 Nov 2025 12:10:16 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 3/3] xhci-dbc: use brk_alloc() From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Marek Marczykowski References: Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit This way the relatively large chunk of DMA buffers can be freed when the driver isn't in use. Signed-off-by: Jan Beulich --- a/xen/drivers/char/xhci-dbc.c +++ b/xen/drivers/char/xhci-dbc.c @@ -27,6 +27,8 @@ #include #include #include + +#include #include #include #include @@ -1321,7 +1323,7 @@ static struct uart_driver dbc_uart_drive }; /* Those are accessed via DMA. */ -struct dbc_dma_bufs { +struct __aligned(PAGE_SIZE) dbc_dma_bufs { struct xhci_trb evt_trb[DBC_TRB_RING_CAP]; struct xhci_trb out_trb[DBC_TRB_RING_CAP]; struct xhci_trb in_trb[DBC_TRB_RING_CAP]; @@ -1335,8 +1337,7 @@ struct dbc_dma_bufs { * DMA-reachable by the USB controller. */ }; -static struct dbc_dma_bufs __section(".bss.page_aligned") __aligned(PAGE_SIZE) - dbc_dma_bufs; +DEFINE_BRK(xhci, sizeof(struct dbc_dma_bufs)); static int __init cf_check xhci_parse_dbgp(const char *opt_dbgp) { @@ -1413,24 +1414,33 @@ void __init xhci_dbc_uart_init(void) { struct dbc_uart *uart = &dbc_uart; struct dbc *dbc = &uart->dbc; + struct dbc_dma_bufs *dma_bufs; if ( !dbc->enable ) return; - dbc->dbc_ctx = &dbc_dma_bufs.ctx; - dbc->dbc_erst = &dbc_dma_bufs.erst; - dbc->dbc_ering.trb = dbc_dma_bufs.evt_trb; - dbc->dbc_oring.trb = dbc_dma_bufs.out_trb; - dbc->dbc_iring.trb = dbc_dma_bufs.in_trb; - dbc->dbc_owork.buf = dbc_dma_bufs.out_wrk_buf; - dbc->dbc_iwork.buf = dbc_dma_bufs.in_wrk_buf; - dbc->dbc_str = dbc_dma_bufs.str_buf; + dma_bufs = brk_alloc(sizeof(*dma_bufs)); + if ( !dma_bufs ) + { + dbc->enable = false; + printk(XENLOG_ERR "XHCI: not enough BRK space available\n"); + return; + } + + dbc->dbc_ctx = &dma_bufs->ctx; + dbc->dbc_erst = &dma_bufs->erst; + dbc->dbc_ering.trb = dma_bufs->evt_trb; + dbc->dbc_oring.trb = dma_bufs->out_trb; + dbc->dbc_iring.trb = dma_bufs->in_trb; + dbc->dbc_owork.buf = dma_bufs->out_wrk_buf; + dbc->dbc_iwork.buf = dma_bufs->in_wrk_buf; + dbc->dbc_str = dma_bufs->str_buf; if ( dbc_open(dbc) ) { iommu_add_extra_reserved_device_memory( - PFN_DOWN(virt_to_maddr(&dbc_dma_bufs)), - PFN_UP(sizeof(dbc_dma_bufs)), + PFN_DOWN(virt_to_maddr(dma_bufs)), + PFN_DOWN(sizeof(*dma_bufs)), uart->dbc.sbdf, "XHCI console"); serial_register_uart(SERHND_XHCI, &dbc_uart_driver, &dbc_uart); From xen-devel-bounces@lists.xenproject.org Thu Nov 13 11:16:15 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 11:16:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161026.1489040 (Exim 4.92) (envelope-from ) id 1vJVJB-0001Em-O1; Thu, 13 Nov 2025 11:16:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161026.1489040; Thu, 13 Nov 2025 11:16:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJVJB-0001Ef-KT; Thu, 13 Nov 2025 11:16:09 +0000 Received: by outflank-mailman (input) for mailman id 1161026; Thu, 13 Nov 2025 11:16:08 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJVJA-0001EZ-Sd for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 11:16:08 +0000 Received: from mail-ed1-x535.google.com (mail-ed1-x535.google.com [2a00:1450:4864:20::535]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 254620bd-c082-11f0-980a-7dc792cee155; Thu, 13 Nov 2025 12:16:05 +0100 (CET) Received: by mail-ed1-x535.google.com with SMTP id 4fb4d7f45d1cf-6406f3dcc66so1159768a12.3 for ; Thu, 13 Nov 2025 03:16:05 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 13 Nov 2025 03:16:04 -0800 (PST) Message-ID: <3a19c920-e5e6-43ea-ac07-674b07ce7301@suse.com> Date: Thu, 13 Nov 2025 12:16:03 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RESEND PATCH v2 3/3] x86/hvm: vmx: refactor cache disable mode data To: Grygorii Strashko Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Tim Deegan , Jason Andryuk , Teddy Astie , "xen-devel@lists.xenproject.org" References: <20251111200958.3576341-1-grygorii_strashko@epam.com> <20251111200958.3576341-4-grygorii_strashko@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251111200958.3576341-4-grygorii_strashko@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 11.11.2025 21:10, Grygorii Strashko wrote: > From: Grygorii Strashko > > The Cache Disable mode data is used only by VMX code, so move it from > common HVM structures into VMX specific structures: > - move "uc_lock", "is_in_uc_mode" fields from struct hvm_domain to struct > vmx_domain; > - move "cache_mode" field from struct hvm_vcpu to struct vmx_vcpu. > > Hence, the "in_uc_mode" field is used directly in mm/shadow/multi.c > _sh_propagate(), introduce the hvm_is_in_uc_mode() macro to avoid direct > access to this field and account for INTEL_VMX configuration. > > While here: > - rename "is_in_uc_mode" to "in_uc_mode" > - s/NORMAL_CACHE_MODE/CACHE_MODE_NORMAL > - s/NO_FILL_CACHE_MODE/CACHE_MODE_NO_FILL > > Suggested-by: Andrew Cooper > Signed-off-by: Grygorii Strashko Reviewed-by: Jan Beulich > @@ -158,6 +166,11 @@ struct vmx_vcpu { > > uint8_t lbr_flags; > > + /* Which cache mode is this VCPU in (CR0:CD/NW)? */ > + uint8_t cache_mode; > +#define CACHE_MODE_NORMAL 0 > +#define CACHE_MODE_NO_FILL 2 I wonder though whether the odd use of 0 and 2 (rather than 0 and 1) needs retaining ... > --- a/xen/arch/x86/include/asm/mtrr.h > +++ b/xen/arch/x86/include/asm/mtrr.h > @@ -7,9 +7,6 @@ > #define MEMORY_NUM_TYPES MTRR_NUM_TYPES > #define NO_HARDCODE_MEM_TYPE MTRR_NUM_TYPES > > -#define NORMAL_CACHE_MODE 0 > -#define NO_FILL_CACHE_MODE 2 ... from how it was. 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Thu, 13 Nov 2025 03:19:31 -0800 (PST) Message-ID: Date: Thu, 13 Nov 2025 12:19:29 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RESEND PATCH v2 1/3] x86/hvm: move hvm_shadow_handle_cd() to vmx code From: Jan Beulich To: Grygorii Strashko Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , Teddy Astie , "xen-devel@lists.xenproject.org" References: <20251111200958.3576341-1-grygorii_strashko@epam.com> <20251111200958.3576341-2-grygorii_strashko@epam.com> <25ec2731-e629-4cc7-b374-5e48fba4c814@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <25ec2731-e629-4cc7-b374-5e48fba4c814@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.11.2025 11:44, Jan Beulich wrote: > On 11.11.2025 21:10, Grygorii Strashko wrote: >> From: Grygorii Strashko >> >> Functions: >> hvm_shadow_handle_cd() >> hvm_set_uc_mode() >> domain_exit_uc_mode() >> are used only by Intel VMX code, so move them to VMX code. >> >> While here: >> - minor format change in domain_exit_uc_mode() >> - s/(0/1)/(false/true) for bool types >> - use "struct domain *" as parameter in hvm_set_uc_mode() >> - use "struct domain *d" as local var in hvm_shadow_handle_cd() > > One more please: > >> @@ -1451,6 +1452,66 @@ static int cf_check vmx_get_guest_pat(struct vcpu *v, u64 *gpat) >> return 1; >> } >> >> +/* Exit UC mode only if all VCPUs agree on MTRR/PAT and are not in no_fill. */ >> +static bool domain_exit_uc_mode(struct vcpu *v) >> +{ >> + struct domain *d = v->domain; >> + struct vcpu *vs; > > const on all three pointer target types. Then, together with the function > prefix adjustment discussed on the other sub-thread, > Acked-by: Jan Beulich Seeing that the other two patches are ready to go in (again, once the tree is fully open again), I might as well do these edits while committing. So long as you agree, of course. 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Thu, 13 Nov 2025 03:35:53 -0800 (PST) Message-ID: Date: Thu, 13 Nov 2025 12:35:51 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] amd/iommu: Always atomically update DTE To: Teddy Astie Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12.11.2025 16:37, Teddy Astie wrote: > amd_iommu_set_root_page_table chooses between updating atomically > and non-atomically depending on whether the DTE is active or not. > > This choice existed mostly because cx16 wasn't supposed always available > until [1]. Thus we don't need to threat the non-atomic path in a special > way anymore. > > By rearranging slightly the atomic path, we can make it cover all the cases > which improves the code generation at the expense of systematically performing > cmpxchg16b. > > Also remove unused raw64 fields of ldte, and the deprecated comment as the > function actually behaves in a more usual way and can't return >0. > > [1] 2636fcdc15c7 "x86/iommu: check for CMPXCHG16B when enabling IOMMU" > > Signed-off-by: Teddy Astie > --- > xen/drivers/passthrough/amd/iommu_map.c | 78 ++++++++----------------- > 1 file changed, 25 insertions(+), 53 deletions(-) > > diff --git a/xen/drivers/passthrough/amd/iommu_map.c b/xen/drivers/passthrough/amd/iommu_map.c > index 320a2dc64c..e3165d93aa 100644 > --- a/xen/drivers/passthrough/amd/iommu_map.c > +++ b/xen/drivers/passthrough/amd/iommu_map.c > @@ -154,69 +154,41 @@ static void set_iommu_ptes_present(unsigned long pt_mfn, > unmap_domain_page(table); > } > > -/* > - * This function returns > - * - -errno for errors, > - * - 0 for a successful update, atomic when necessary > - * - 1 for a successful but non-atomic update, which may need to be warned > - * about by the caller. > - */ > int amd_iommu_set_root_page_table(struct amd_iommu_dte *dte, > uint64_t root_ptr, uint16_t domain_id, > uint8_t paging_mode, unsigned int flags) > { > bool valid = flags & SET_ROOT_VALID; > > - if ( dte->v && dte->tv ) > - { > - union { > - struct amd_iommu_dte dte; > - uint64_t raw64[4]; > - __uint128_t raw128[2]; > - } ldte = { .dte = *dte }; > - __uint128_t res, old = ldte.raw128[0]; > - int ret = 0; > - > - ldte.dte.domain_id = domain_id; > - ldte.dte.pt_root = paddr_to_pfn(root_ptr); > - ldte.dte.iw = true; > - ldte.dte.ir = true; > - ldte.dte.paging_mode = paging_mode; > - ldte.dte.v = valid; > - > - res = cmpxchg16b(dte, &old, &ldte.raw128[0]); > - > - /* > - * Hardware does not update the DTE behind our backs, so the > - * return value should match "old". > - */ > - if ( res != old ) > - { > - printk(XENLOG_ERR > - "Dom%d: unexpected DTE %016lx_%016lx (expected %016lx_%016lx)\n", > - domain_id, > - (uint64_t)(res >> 64), (uint64_t)res, > - (uint64_t)(old >> 64), (uint64_t)old); > - ret = -EILSEQ; > - } > + union { > + struct amd_iommu_dte dte; > + __uint128_t raw128[2]; > + } ldte = { .dte = *dte }; > + __uint128_t res, old = ldte.raw128[0]; > > - return ret; > - } > + ldte.dte.domain_id = domain_id; > + ldte.dte.pt_root = paddr_to_pfn(root_ptr); > + ldte.dte.iw = true; > + ldte.dte.ir = true; > + ldte.dte.paging_mode = paging_mode; > + ldte.dte.tv = true; > + ldte.dte.v = valid; > + > + res = cmpxchg16b(dte, &old, &ldte.raw128[0]); > > - if ( valid || dte->v ) > + /* > + * Hardware does not update the DTE behind our backs, so the > + * return value should match "old". > + */ > + if ( res != old ) > { > - dte->tv = false; > - dte->v = true; > - smp_wmb(); > + printk(XENLOG_ERR > + "Dom%d: unexpected DTE %016lx_%016lx (expected %016lx_%016lx)\n", > + domain_id, > + (uint64_t)(res >> 64), (uint64_t)res, > + (uint64_t)(old >> 64), (uint64_t)old); Indentation is now off by 1 here. > + return -EILSEQ; The downside of this is that all updates can now take this path. Yes, this shouldn't be possible to be taken, but it's a (minor) concern nevertheless. At the very least such a downside wants, imo, mentioning in the description, even if for nothing else than to make clear that it was a deliberate choice. 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Thu, 13 Nov 2025 03:37:49 -0800 (PST) Message-ID: <367dc942-7113-46cf-9c54-fa77dc6b4c53@suse.com> Date: Thu, 13 Nov 2025 12:37:47 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] amd/iommu: Remove dead non-atomic update checking To: Teddy Astie Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12.11.2025 16:37, Teddy Astie wrote: > When updating a DTE, amd_iommu_setup_domain_device() would check if > the update had been non-atomic (i.e rc > 0) and throw a warning if > such non-atomic update could be dangerous. However since commit > 3fc44151d83d, rc can no longer be positive, making this branch > unreachable code. I.e. it addresses a Misra concern and hence ... > No functional change intended. > > Signed-off-by: Teddy Astie ... wants at least an Amends: tag, likely a Fixes: one. Then: Reviewed-by: Jan Beulich Jan From xen-devel-bounces@lists.xenproject.org Thu Nov 13 11:42:51 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 11:42:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161079.1489092 (Exim 4.92) (envelope-from ) id 1vJViu-0008Bm-K9; Thu, 13 Nov 2025 11:42:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161079.1489092; Thu, 13 Nov 2025 11:42:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJViu-0008Bf-H5; Thu, 13 Nov 2025 11:42:44 +0000 Received: by outflank-mailman (input) for mailman id 1161079; Thu, 13 Nov 2025 11:42:43 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJVit-0008A3-Oh for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 11:42:43 +0000 Received: from mail-ej1-x631.google.com (mail-ej1-x631.google.com [2a00:1450:4864:20::631]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id dcdf7a7b-c085-11f0-980a-7dc792cee155; Thu, 13 Nov 2025 12:42:41 +0100 (CET) Received: by mail-ej1-x631.google.com with SMTP id a640c23a62f3a-b7272012d30so105799366b.2 for ; Thu, 13 Nov 2025 03:42:41 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 13 Nov 2025 03:42:41 -0800 (PST) Message-ID: <730c6001-58a2-46db-95fa-c8ec2081d3b0@suse.com> Date: Thu, 13 Nov 2025 12:42:39 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] x86: Conditionalise PV-only fallback branches on CONFIG_PV To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org References: <20251112152235.224001-1-alejandro.garciavallejo@amd.com> <20251112152235.224001-2-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251112152235.224001-2-alejandro.garciavallejo@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12.11.2025 16:22, Alejandro Vallejo wrote: > --- a/xen/arch/x86/cpuid.c > +++ b/xen/arch/x86/cpuid.c > @@ -297,7 +297,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, > if ( v->arch.hvm.guest_cr[4] & X86_CR4_OSXSAVE ) > res->c |= cpufeat_mask(X86_FEATURE_OSXSAVE); > } > - else /* PV domain */ > + else if ( IS_ENABLED(CONFIG_PV) ) > { > regs = guest_cpu_user_regs(); > > @@ -509,7 +509,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, > if ( !hap_enabled(d) && !hvm_pae_enabled(v) ) > res->d &= ~cpufeat_mask(X86_FEATURE_PSE36); > } > - else /* PV domain */ > + else if ( IS_ENABLED(CONFIG_PV) ) Maybe better leave the "else"-s as is and, ahead of them, insert else if ( !IS_ENABLED(CONFIG_PV) ) ASSERT_UNREACHABLE(); Happy to make the adjustment while committing, provided you'd be happy with me doing so. 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Thu, 13 Nov 2025 03:50:31 -0800 (PST) Message-ID: <5c08e298-3ef4-451c-b0f8-24f207a9d512@suse.com> Date: Thu, 13 Nov 2025 12:50:29 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] x86: Remove stubs from asm/pv/domain.h To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org References: <20251112152235.224001-1-alejandro.garciavallejo@amd.com> <20251112152235.224001-3-alejandro.garciavallejo@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251112152235.224001-3-alejandro.garciavallejo@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12.11.2025 16:22, Alejandro Vallejo wrote: > They are unnecessary. The only two cases with link-time failures are > fallback else branches that can just as well be adjusted with explicit > IS_ENABLED(CONFIG_PV). HVM has no equivalent stubs and there's no reason > to keep the asymmetry. > > No functional change. > > Signed-off-by: Alejandro Vallejo > --- > I'd rather remove the "rc = -EOPNOTSUPP" branch altogether, or replace > it with ASSERT_UNREACHABLE(), but I kept it here to preserve prior behaviour. > > Thoughts? I think using ASSERT_UNREACHABLE() there would be better, in particular bring things in line with the {hvm,pv}_domain_initialise() call site. Preferably that way (happy to adjust while committing): Reviewed-by: Jan Beulich Jan From xen-devel-bounces@lists.xenproject.org Thu Nov 13 12:09:14 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 12:09:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161111.1489116 (Exim 4.92) (envelope-from ) id 1vJW8N-00049z-Tb; Thu, 13 Nov 2025 12:09:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161111.1489116; Thu, 13 Nov 2025 12:09:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJW8N-00049s-Q1; Thu, 13 Nov 2025 12:09:03 +0000 Received: by outflank-mailman (input) for mailman id 1161111; Thu, 13 Nov 2025 12:09:02 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJW8M-00049j-AC for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 12:09:02 +0000 Received: from mail-ed1-x529.google.com (mail-ed1-x529.google.com [2a00:1450:4864:20::529]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 89b5af3f-c089-11f0-980a-7dc792cee155; Thu, 13 Nov 2025 13:09:00 +0100 (CET) Received: by mail-ed1-x529.google.com with SMTP id 4fb4d7f45d1cf-64088c6b309so1289895a12.0 for ; Thu, 13 Nov 2025 04:09:00 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 13 Nov 2025 04:08:59 -0800 (PST) Message-ID: <75e6e27c-1d47-4689-a52d-e596de84db26@suse.com> Date: Thu, 13 Nov 2025 13:08:57 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen: Expose time_offset in struct arch_shared_info To: Tu Dinh Cc: Anthony PERARD , Andrew Cooper , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Bertrand Marquis , Volodymyr Babchuk , xen-devel@lists.xenproject.org References: <20251112070815.545-1-ngoc-tu.dinh@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251112070815.545-1-ngoc-tu.dinh@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12.11.2025 08:08, Tu Dinh wrote: > time_offset is currently always added to wc_sec. This means that without > the actual value of time_offset, guests have no way of knowing what's > the actual host clock. Once the guest clock drifts beyond 1 second, > updates to the guest RTC would themselves change time_offset and make it > impossible to resync guest time to host time. I guess I don't understand what the problem is, or why it would need a change in the hypervisor (interface). If the guest updates the vRTC, it is (implicitly) asking for a change of time offset, isn't it? And whatever adjustments it makes, it could track and accumulate them? > Since there's no way to add more fields to struct shared_info, the > addition has to be done through struct arch_shared_info instead. Add two > fields in arch_shared_info representing time_offset's low and high > 32-bit halves. Any why in two halves? Without that, ... > --- a/xen/common/time.c > +++ b/xen/common/time.c > @@ -118,6 +118,11 @@ void update_domain_wallclock_time(struct domain *d) > shared_info(d, wc_sec_hi) = sec >> 32; > #endif > > + shared_info(d, arch.time_offset) = > + (uint32_t)(uint64_t)d->time_offset.seconds; > + shared_info(d, arch.time_offset_hi) = > + (uint32_t)((uint64_t)d->time_offset.seconds >> 32); ... no casting at all would be needed here. (Even when there are two halves, some of the casting can be dropped.) Another question is - why unsigned? struct domain's time_offset.seconds is signed for a reason, aiui. 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2025 12:11:06.8743 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e73471ce-fc01-4339-6401-08de22adb979 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9D1.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH1PPF2D39B31FF On Thu Nov 13, 2025 at 9:50 AM CET, Andrew Cooper wrote: > On 12/11/2025 4:22 pm, Alejandro Vallejo wrote: >> xen/arch/x86/Kconfig | 12 ++++ >> xen/arch/x86/cpu/microcode/Makefile | 9 ++- >> xen/arch/x86/cpu/microcode/amd-base.c | 55 +++++++++++++++++++ >> xen/arch/x86/cpu/microcode/amd.c | 55 ++----------------- >> xen/arch/x86/cpu/microcode/amd.h | 15 +++++ >> xen/arch/x86/cpu/microcode/base.c | 73 +++++++++++++++++++++++++ >> xen/arch/x86/cpu/microcode/core.c | 58 +------------------- >> xen/arch/x86/cpu/microcode/intel-base.c | 50 +++++++++++++++++ >> xen/arch/x86/cpu/microcode/intel.c | 56 +++---------------- >> xen/arch/x86/cpu/microcode/intel.h | 16 ++++++ >> xen/arch/x86/cpu/microcode/private.h | 14 +++++ >> xen/arch/x86/efi/efi-boot.h | 2 +- >> xen/arch/x86/platform_hypercall.c | 2 + >> 13 files changed, 259 insertions(+), 158 deletions(-) >> create mode 100644 xen/arch/x86/cpu/microcode/amd-base.c >> create mode 100644 xen/arch/x86/cpu/microcode/amd.h >> create mode 100644 xen/arch/x86/cpu/microcode/base.c >> create mode 100644 xen/arch/x86/cpu/microcode/intel-base.c >> create mode 100644 xen/arch/x86/cpu/microcode/intel.h > > This is awfully invasive for something that ultimately drops only a > handful of lines of code. Two handfuls when considering both AMD and Intel. But yes, I'd rather not m= odify as much as this. However, for our purposes it's important to physically mov= e out the code we want to Kconfig out, as then coverage reports don't need except= ions. > > First, it should be CONFIG_MICROCODE_LOADING. [...] Sure, I don't mind it being $FOO or $BAR. > Next, annotate the functions that you conditionally don't reference in > {amd,intel}_ucode_ops with __maybe_unused, and dead code elimination > should do the rest. I considered that, but local DCE poses problems for coverage tracking, whic= h we care about deeply. I'll check if there's some magic we can do to enable = that pattern but as of now, there isn't. If I can't make it work I'll just take the sledgehammer and drop all ops an= d dependent functions. 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Smith" , =?utf-8?q?Marek_Marczykowski-G=C3=B3recki?= , Subject: Re: [PATCH 0/4] Add Kconfig option to remove microcode loading support From: Alejandro Vallejo To: Jan Beulich X-Mailer: aerc 0.20.1 References: <20251112162219.226075-1-alejandro.garciavallejo@amd.com> <248593ca-e24a-4518-800e-2c58e3197937@suse.com> In-Reply-To: <248593ca-e24a-4518-800e-2c58e3197937@suse.com> X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9D1:EE_|DS2PR12MB9616:EE_ X-MS-Office365-Filtering-Correlation-Id: af1bf8b4-2257-495b-2e8b-08de22ade004 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|376014|36860700013; X-Microsoft-Antispam-Message-Info: =?utf-8?B?Z3VqZmt0Uko3OEhGRDBiWXNQQUxVRjVUUmx2YmllSnVqNlFUb0VRTFA3NlBP?= =?utf-8?B?NE80T3dZSkVNcE9pUy9LMTJHK0F0aUFKTlpxZFE4d0RmT2hGZ0JUQ0ZHN3Q0?= =?utf-8?B?YjRoeFpHU000VG9CcnROakR1TEQrY3JZMXdTOGpHclVWUGZ0Mkxpa3V4YWJJ?= =?utf-8?B?bG9xMzNmMWZsVTlJQStjNGljMzBiaTNnbzU4M2xSR3RlZ1JSRldCRXBudnJ4?= =?utf-8?B?ZEtYVlJWeEhSK1I4NkJUNU0wRFIyV0dUZnEwSmZ0UEtTWlppa1NZNFdvYXdl?= =?utf-8?B?N3BWMXV1c1VlZ0Q5V3FrdWZTR1B0SnBUVFE3MC80Z0oxS3dlSHZ2eHBZbi9h?= =?utf-8?B?dXN1dWI0eGJ3cFFxMm1MZy96VlZpNXJOZko1dXZxNlh4TEorcE5sR1dnb3FT?= =?utf-8?B?V3o5cUlPbXZjSnpFOWtLTWNSaVJVdU9zTWJGUldhSCtlakx0dWFPcHJZb09I?= =?utf-8?B?Z1RNcTR1TE5LNmVJS211cVE1VVhiM2ExZHpBUEVrcXZaMTFzczJOZUEraVpI?= =?utf-8?B?SDhFVnhpL3pHZDkySzM4TVRqK1AyRGlsTWw5UHlVL2RDcC85aWE1c2R2djlp?= =?utf-8?B?NHlYMFhjNDhLUFRCOXhQTnVKREh3ekFON1h5cFEzWExYanR2SDl3czlHUmxZ?= =?utf-8?B?Y2VmU1ZWdks0MjlXSGhsSG5oelV0R0dYVGI5VUdhdVNJTElRcEFOTnNyY3RN?= =?utf-8?B?QTNHN1UyU1FhZDJqVzFyc285cWZDTTMxY0tKWkp1MGhBVVlIOFlRRFkwWHpO?= =?utf-8?B?M2FpdkQzZGJBdGNPRGFkbXVmY1czbmd6aWpMZFNaUmgvRDNjandQd29KTWJO?= =?utf-8?B?YjRUeVlmRXNLMFpqOTBaWlQzNFp1b1p6aXpvaVMzbEtVekE5YXdySGwvK3g0?= =?utf-8?B?S0x0aitzdEx4OHU2RTI3d0doUk5LclpDdkdQa00yQWtvWjlZTTRDZm1CL3pT?= =?utf-8?B?NmJTaHpQWU5sMW5HUzZ2c3JFMmFOSXU2eC9jRGpHTitLZzBnc1NiOXNzSGcy?= =?utf-8?B?bGpJa3grdTFEeU1MZjFwWGIwWVB5NzVTUHk5ZVBDaXFqc0ZUMzdVVi9FTFpm?= =?utf-8?B?cDdSWVpzU3cxU0dEOUhEQnhkUkdaWUNXbmlkejAxQk5jTmRGV1RqeU5Eci9z?= =?utf-8?B?LzQyRXJjS2Nrb3Z4L25OMGl1L2p2c1VzOC8rY1N0ZnAxcjN2V0YxbUVOOEh5?= =?utf-8?B?YTA1Vm5vc1BOOHAyTFN2Y1FDOUUxeDVBVXN0TUI1ZHFYTVZ2Tm0wNnVNQndE?= =?utf-8?B?T3hKREN6M05VUnE5WFU5clQwblpOUDRST0wyZUN6eitmTjhRT09HM2g5dGtu?= =?utf-8?B?OUNWQkk3WEdjbHVlOFFwR05la0dqNEp0Vk43RzJSSVBaVTdTMnZ0NGNsT1ZB?= =?utf-8?B?dXdVMUtERnhzVisxZGxoU2g3eUJYRlppVU0zdytoQld0Y3h6cndnWlpNSSt6?= =?utf-8?B?MWtrNFdtK1JUT0VtRXlSQWRkbnVsTWZDL2FrVy8vOXo3bmtPTkE2aVBKYmpq?= =?utf-8?B?YmJXdmZ0VDBWLy9LSitiQURFb3YwN200bmdCYnNjQWFLTDVHVXFYeXlMdUti?= =?utf-8?B?Z1FxQUJJL3FIYlpoQUpYcXdDN01LRGhIaDJYNlBBUXJkNDhCK28rcWhNdk9h?= =?utf-8?B?RXhzQnVFTkd4bjcvUXNlbko5RmtxMEpWNmNTU2Y0OGhFcUFLMEg0NUM1K3Rm?= =?utf-8?B?Vk9FSkFyY1VGaG9CQ0FLQTFpczVuQ2V6V01icTkvWEUwUW1Wd3E2ZVRvUHhO?= =?utf-8?B?Um9nSHp5SkpENEJ1L3pGeGNsRUxKOThaMGloWTZUNGs2VFF3Mi9Jc0k0aTJl?= =?utf-8?B?c2pjc0FPMVVodW1Ib0t2dXJQQk1xeDV6VXdUSzI4RkRnZmRIdEIzVUxqVEdp?= =?utf-8?B?TzM5NEZkZFVta1lDS3pWQStCTG0xMlgwZXhBc25KMzNKYnJzMjR3S2d3TXBF?= =?utf-8?B?b2VPVHYrWlV5TndHNkVaTjgzazNSNUVvNEkvUmhXQmhmR0Z1bWRhcU9ibWw5?= =?utf-8?B?RVU4djhlb2VmVFNBVzdTb2V1WGp3RHpQTGdoTXN2eng5TXlLejByOFhNcGZx?= =?utf-8?B?eGtHSGRzREJBNVNQUUx3S0U0d09tL05vQWtOM2dkUEdDQVZJVDZIVWI5bHQ4?= =?utf-8?Q?GG8Y=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(376014)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2025 12:12:11.5372 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: af1bf8b4-2257-495b-2e8b-08de22ade004 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9D1.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS2PR12MB9616 On Thu Nov 13, 2025 at 8:36 AM CET, Jan Beulich wrote: > On 12.11.2025 17:22, Alejandro Vallejo wrote: >> Hi, >>=20 >> The series is mostly a refactor between everything needed to load microc= ode and >> the bare minimum to probe the current microcode revision. >>=20 >> The Kconfig option keeps the reading of microcode rev data around, as it= 's very >> relevant for security and debuggability in order to deduce which erratas= apply >> to the current platform. >>=20 >> The idea is to move everything that must still be compiled with !CONFIG_= UCODE >> onto {,amd-,intel-}base.c, then remove everything else conditionally at = the >> Makefile level. >>=20 >> Renaming files (e.g: s/base/core/ and s/core/common/) would better refle= ct >> post-series reality, but it'd be annoying for later backports in this ge= neral >> area. >>=20 >> Cheers, >> Alejandro >>=20 >> Alejandro Vallejo (4): >> x86: Split out AMD-specific code to be executed without ucode loading >> x86: Split out Intel-specific code to be executed without ucode >> loading >> x86: Split out early_microcode_load() and microcode_load_one() >> x86: Add Kconfig option to disable microcode loading >>=20 >> xen/arch/x86/Kconfig | 12 ++++ >> xen/arch/x86/cpu/microcode/Makefile | 9 ++- >> xen/arch/x86/cpu/microcode/amd-base.c | 55 +++++++++++++++++++ >> xen/arch/x86/cpu/microcode/amd.c | 55 ++----------------- >> xen/arch/x86/cpu/microcode/amd.h | 15 +++++ >> xen/arch/x86/cpu/microcode/base.c | 73 +++++++++++++++++++++++++ >> xen/arch/x86/cpu/microcode/core.c | 58 +------------------- >> xen/arch/x86/cpu/microcode/intel-base.c | 50 +++++++++++++++++ >> xen/arch/x86/cpu/microcode/intel.c | 56 +++---------------- >> xen/arch/x86/cpu/microcode/intel.h | 16 ++++++ >> xen/arch/x86/cpu/microcode/private.h | 14 +++++ >> xen/arch/x86/efi/efi-boot.h | 2 +- >> xen/arch/x86/platform_hypercall.c | 2 + >> 13 files changed, 259 insertions(+), 158 deletions(-) >> create mode 100644 xen/arch/x86/cpu/microcode/amd-base.c >> create mode 100644 xen/arch/x86/cpu/microcode/amd.h >> create mode 100644 xen/arch/x86/cpu/microcode/base.c >> create mode 100644 xen/arch/x86/cpu/microcode/intel-base.c >> create mode 100644 xen/arch/x86/cpu/microcode/intel.h > > Purely based on this diffstat: A doc update likely is necessary as well, = as > the ucode=3D command line option now becomes only conditionally applicabl= e (aiui, > i.e. without having looked at the patches them selves). > > Jan Yes, that sounds sensible. Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Thu Nov 13 12:18:02 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 12:18:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161154.1489158 (Exim 4.92) (envelope-from ) id 1vJWGy-0007W7-Dx; Thu, 13 Nov 2025 12:17:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161154.1489158; Thu, 13 Nov 2025 12:17:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJWGy-0007W0-Ap; Thu, 13 Nov 2025 12:17:56 +0000 Received: by outflank-mailman (input) for mailman id 1161154; Thu, 13 Nov 2025 12:17:55 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJWGx-0007Vr-7V for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 12:17:55 +0000 Received: from mail136-17.atl41.mandrillapp.com (mail136-17.atl41.mandrillapp.com [198.2.136.17]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id c6ae1d0d-c08a-11f0-980a-7dc792cee155; Thu, 13 Nov 2025 13:17:52 +0100 (CET) Received: from pmta11.mandrill.prod.atl01.rsglab.com (localhost [127.0.0.1]) by mail136-17.atl41.mandrillapp.com (Mailchimp) with ESMTP id 4d6fRf42P0zPm0fhf for ; Thu, 13 Nov 2025 12:17:50 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id c69976a56ee8495baada4dfad6e54171; Thu, 13 Nov 2025 12:17:50 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: c6ae1d0d-c08a-11f0-980a-7dc792cee155 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1763036270; x=1763306270; bh=TaopVpkhSPFnx7zk1qFNE7lnuV6CYGsQCMohNV3HC6k=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=ZJK5Q0psmKEFyXD+ejP4yiuqM+fSCh0ur66Jmlrg3qHB73tMPwY5iUCXQFUFijezq knOl8hIEKEVvmSBpUow01lFBXdyKJSewStI/66rG9qr1psx5TQpvl+KbUgmIQUBZmD 9sRzvv4yYWk2fEe760hYOBiQd/fAtZ3Y3QnVawIMXNYrQhaawx7cCtgYeOZEgqUDtI H5XQHbEhr8KNihlDfWHaGZ8c7gewvmq1uY0nXTYsnKzJ3VN67gVQC/jGXYZg/pxHTa wbT76j8DvlhRtz3Pi2GXVxhE5xVY2w9vnh0QWEvPq4LKkaa8BB4CEiGpcVmolhjASN XgwwKFa9SOgkg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1763036270; x=1763296770; i=ngoc-tu.dinh@vates.tech; bh=TaopVpkhSPFnx7zk1qFNE7lnuV6CYGsQCMohNV3HC6k=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=lo1Kizl6BuJiEHc/W3ErO8CyZ2z8m+mGGz/nWyzdqnDz6cpqSVDblgU48uVhv4QXh iIqalO1bI48CXlrlk0SfDVQ7smmjdV08NkBq7IZW/pmnAyK1VOQu4Uc6nNORQ88J4/ C/75U3F15iRxSO2+LgfemBvn2NNPn8Am3GMWq6FyJaynQ0t7ksn3b8Ix2vk8RC984K 4iUa3+u0orh6Jeds7oVpP0/BU4PrKVAnwGgGN9k26BDHD/FgxM7Z6a0TeB0iS6/Xux r9ahWtps3ocLAaha4VPGBYAiygkDnJhBWwZuOHZTdUWcv1NHDq96lzlJdtslBh9R0L iFBXVEas2Ds2Q== From: "Tu Dinh" Subject: =?utf-8?Q?Re:=20[PATCH]=20xen:=20Expose=20time=5Foffset=20in=20struct=20arch=5Fshared=5Finfo?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1763036268962 Message-Id: <1d4dd308-74c3-4557-8e0b-522b53b4286d@vates.tech> To: "Jan Beulich" Cc: "Anthony PERARD" , "Andrew Cooper" , "Michal Orzel" , "Julien Grall" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Stefano Stabellini" , "Bertrand Marquis" , "Volodymyr Babchuk" , xen-devel@lists.xenproject.org References: <20251112070815.545-1-ngoc-tu.dinh@vates.tech> <75e6e27c-1d47-4689-a52d-e596de84db26@suse.com> In-Reply-To: <75e6e27c-1d47-4689-a52d-e596de84db26@suse.com> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.c69976a56ee8495baada4dfad6e54171?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20251113:md Date: Thu, 13 Nov 2025 12:17:50 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit On 13/11/2025 13:09, Jan Beulich wrote: > On 12.11.2025 08:08, Tu Dinh wrote: >> time_offset is currently always added to wc_sec. This means that without >> the actual value of time_offset, guests have no way of knowing what's >> the actual host clock. Once the guest clock drifts beyond 1 second, >> updates to the guest RTC would themselves change time_offset and make it >> impossible to resync guest time to host time. > > I guess I don't understand what the problem is, or why it would need a > change in the hypervisor (interface). If the guest updates the vRTC, it is > (implicitly) asking for a change of time offset, isn't it? And whatever > adjustments it makes, it could track and accumulate them? vRTC drift can happen for other reasons. For example, Windows can write to the RTC at any time; if a guest clock drift has already happened (e.g. after a migration), an unfortunately-timed RTC write will make it permanent. Windows time providers don't have the ability to control when Windows writes to RTC either. Thus the "real" host clock time is needed to help the VM adjust to the correct time. IOW, it's the distinction between "keeping track of already correct time" versus "correcting wrong time by adjusting the offset"; the latter is what I'm looking for. > >> Since there's no way to add more fields to struct shared_info, the >> addition has to be done through struct arch_shared_info instead. Add two >> fields in arch_shared_info representing time_offset's low and high >> 32-bit halves. > > Any why in two halves? Without that, ... > >> --- a/xen/common/time.c >> +++ b/xen/common/time.c >> @@ -118,6 +118,11 @@ void update_domain_wallclock_time(struct domain *d) >> shared_info(d, wc_sec_hi) = sec >> 32; >> #endif >> >> + shared_info(d, arch.time_offset) = >> + (uint32_t)(uint64_t)d->time_offset.seconds; >> + shared_info(d, arch.time_offset_hi) = >> + (uint32_t)((uint64_t)d->time_offset.seconds >> 32); > > ... no casting at all would be needed here. (Even when there are two halves, > some of the casting can be dropped.) > > Another question is - why unsigned? struct domain's time_offset.seconds is > signed for a reason, aiui. Both are just for easy consumption of the time offset on 32-bit guests. Unsigned is particularly because these are only parts of an int64_t (and therefore have no signedness themselves) and I prefer to let the conversion happen after reading the two fields. > > Jan -- Ngoc Tu Dinh | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Thu Nov 13 12:21:03 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 12:21:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161165.1489168 (Exim 4.92) (envelope-from ) id 1vJWJx-0000eE-Qn; Thu, 13 Nov 2025 12:21:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161165.1489168; Thu, 13 Nov 2025 12:21:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJWJx-0000e7-O6; Thu, 13 Nov 2025 12:21:01 +0000 Received: by outflank-mailman (input) for mailman id 1161165; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2025 12:20:54.1513 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: eaa31581-70f3-4303-2eab-08de22af177e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000F0E4.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV5PR12MB9825 On Thu Nov 13, 2025 at 12:42 PM CET, Jan Beulich wrote: > On 12.11.2025 16:22, Alejandro Vallejo wrote: >> --- a/xen/arch/x86/cpuid.c >> +++ b/xen/arch/x86/cpuid.c >> @@ -297,7 +297,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf= , >> if ( v->arch.hvm.guest_cr[4] & X86_CR4_OSXSAVE ) >> res->c |=3D cpufeat_mask(X86_FEATURE_OSXSAVE); >> } >> - else /* PV domain */ >> + else if ( IS_ENABLED(CONFIG_PV) ) >> { >> regs =3D guest_cpu_user_regs(); >> =20 >> @@ -509,7 +509,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf= , >> if ( !hap_enabled(d) && !hvm_pae_enabled(v) ) >> res->d &=3D ~cpufeat_mask(X86_FEATURE_PSE36); >> } >> - else /* PV domain */ >> + else if ( IS_ENABLED(CONFIG_PV) ) > > Maybe better leave the "else"-s as is and, ahead of them, insert > > else if ( !IS_ENABLED(CONFIG_PV) ) > ASSERT_UNREACHABLE(); > > Happy to make the adjustment while committing, provided you'd be happy wi= th me > doing so. > > Jan Should I understand that as an Acked-by? I think it'd be marginally clearer with the assert added to my code as an e= lse branch at the end, but either form works. I'm fine with it being committed in the form I originally sent, what you proposed, or the ASSERT as an else branch. They all have the same effect, after all. Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Thu Nov 13 12:22:34 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 12:22:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161175.1489178 (Exim 4.92) (envelope-from ) id 1vJWLR-0001bs-4E; Thu, 13 Nov 2025 12:22:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161175.1489178; Thu, 13 Nov 2025 12:22:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJWLR-0001bl-1B; Thu, 13 Nov 2025 12:22:33 +0000 Received: by outflank-mailman (input) for mailman id 1161175; Thu, 13 Nov 2025 12:22:31 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJWLP-0001aD-OQ for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 12:22:31 +0000 Received: from mail-ed1-x52a.google.com (mail-ed1-x52a.google.com [2a00:1450:4864:20::52a]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 6c230061-c08b-11f0-980a-7dc792cee155; Thu, 13 Nov 2025 13:22:29 +0100 (CET) Received: by mail-ed1-x52a.google.com with SMTP id 4fb4d7f45d1cf-640ca678745so1444035a12.2 for ; Thu, 13 Nov 2025 04:22:29 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 13 Nov 2025 04:22:29 -0800 (PST) Message-ID: Date: Thu, 13 Nov 2025 13:22:27 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH 2/5] x86: hvm: compat: introduce vcpu_is_hcall_compat() helper To: Grygorii Strashko Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Alejandro Vallejo , Jason Andryuk , "xen-devel@lists.xenproject.org" References: <20251111175413.3540690-1-grygorii_strashko@epam.com> <20251111175413.3540690-3-grygorii_strashko@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251111175413.3540690-3-grygorii_strashko@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 11.11.2025 18:54, Grygorii Strashko wrote: > --- a/xen/include/xen/sched.h > +++ b/xen/include/xen/sched.h > @@ -311,6 +311,15 @@ struct vcpu > #endif > }; > > +static inline bool vcpu_is_hcall_compat(const struct vcpu *v) Does the vcpu_ prefix really buy us much here? The per-vCPU aspect is already conveyed by the function parameter, I'd say. Actually - is a parameter in fact needed? It's always current afaics. (Then, if the parameter was to stay for some reason, it would want naming "curr".) > +{ > +#ifdef CONFIG_COMPAT > + return v->hcall_compat; As long as you don't remove the struct field, ... > +#else > + return false; > +#endif /* CONFIG_COMPAT */ ... why not return IS_ENABLED(CONFIG_COMPAT) && v->hcall_compat; ? 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2025 12:23:22.4465 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bf3f5865-30b0-4897-2726-08de22af6fe2 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000F0E2.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8234 On Thu Nov 13, 2025 at 12:50 PM CET, Jan Beulich wrote: > On 12.11.2025 16:22, Alejandro Vallejo wrote: >> They are unnecessary. The only two cases with link-time failures are >> fallback else branches that can just as well be adjusted with explicit >> IS_ENABLED(CONFIG_PV). HVM has no equivalent stubs and there's no reason >> to keep the asymmetry. >>=20 >> No functional change. >>=20 >> Signed-off-by: Alejandro Vallejo >> --- >> I'd rather remove the "rc =3D -EOPNOTSUPP" branch altogether, or replace >> it with ASSERT_UNREACHABLE(), but I kept it here to preserve prior behav= iour. >>=20 >> Thoughts? > > I think using ASSERT_UNREACHABLE() there would be better, in particular b= ring > things in line with the {hvm,pv}_domain_initialise() call site. Preferabl= y > that way (happy to adjust while committing): > Reviewed-by: Jan Beulich > > Jan Sounds good to me. Though arguablt the commit message might need to change = too to remove the last line about not being a functional change. While not externally visible, it is a real change. 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Thu, 13 Nov 2025 04:24:04 -0800 (PST) Message-ID: <457733d4-65bc-41f6-ad1b-5afb17303517@suse.com> Date: Thu, 13 Nov 2025 13:24:03 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] x86: Conditionalise PV-only fallback branches on CONFIG_PV To: Alejandro Vallejo Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org References: <20251112152235.224001-1-alejandro.garciavallejo@amd.com> <20251112152235.224001-2-alejandro.garciavallejo@amd.com> <730c6001-58a2-46db-95fa-c8ec2081d3b0@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.11.2025 13:20, Alejandro Vallejo wrote: > On Thu Nov 13, 2025 at 12:42 PM CET, Jan Beulich wrote: >> On 12.11.2025 16:22, Alejandro Vallejo wrote: >>> --- a/xen/arch/x86/cpuid.c >>> +++ b/xen/arch/x86/cpuid.c >>> @@ -297,7 +297,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, >>> if ( v->arch.hvm.guest_cr[4] & X86_CR4_OSXSAVE ) >>> res->c |= cpufeat_mask(X86_FEATURE_OSXSAVE); >>> } >>> - else /* PV domain */ >>> + else if ( IS_ENABLED(CONFIG_PV) ) >>> { >>> regs = guest_cpu_user_regs(); >>> >>> @@ -509,7 +509,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, >>> if ( !hap_enabled(d) && !hvm_pae_enabled(v) ) >>> res->d &= ~cpufeat_mask(X86_FEATURE_PSE36); >>> } >>> - else /* PV domain */ >>> + else if ( IS_ENABLED(CONFIG_PV) ) >> >> Maybe better leave the "else"-s as is and, ahead of them, insert >> >> else if ( !IS_ENABLED(CONFIG_PV) ) >> ASSERT_UNREACHABLE(); >> >> Happy to make the adjustment while committing, provided you'd be happy with me >> doing so. > > Should I understand that as an Acked-by? You may, yes (implicitly). Jan > I think it'd be marginally clearer with the assert added to my code as an else > branch at the end, but either form works. I'm fine with it being committed > in the form I originally sent, what you proposed, or the ASSERT as an else > branch. > > They all have the same effect, after all. > > Cheers, > Alejandro From xen-devel-bounces@lists.xenproject.org Thu Nov 13 12:28:58 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 12:28:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161216.1489212 (Exim 4.92) (envelope-from ) id 1vJWRX-0003NB-BB; Thu, 13 Nov 2025 12:28:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161216.1489212; Thu, 13 Nov 2025 12:28:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJWRX-0003N4-7H; Thu, 13 Nov 2025 12:28:51 +0000 Received: by outflank-mailman (input) for mailman id 1161216; Thu, 13 Nov 2025 12:28:50 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJWRV-0003Mx-Km for xen-devel@lists.xenproject.org; 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Merge the >> documents and present the information in chronological order. Provide real >> examples from the tree rather than trying to be too prescriptive. >> >> Signed-off-by: Andrew Cooper > Hardly anything is being said about stable releases - is this intentional? Is there anything you think I'm missing? I suppose the releasing section is slightly specific to new releases, but for the stable release, it really is just bump extraversion, commit and tag, and where usually tag is the only action after you've prepared the tree. > > A few comments below, but ultimately I think it will need to be Julien to > ack. > >> --- /dev/null >> +++ b/docs/process/tagging-branching.rst >> @@ -0,0 +1,194 @@ >> +.. SPDX-License-Identifier: CC-BY-4.0 >> + >> +=============================== >> +Tagging and Branching Checklist >> +=============================== >> + >> +Before starting >> +=============== >> + >> + * Review this checklist for changes during the development window. >> + * Access to the following necessary: >> + >> + * The 'xen tree' signing key. >> + * The xen and xendocs users on xenbits.xen.org >> + * The downloads-cvs user on mail.xenproject.org >> + * A checkout of the xen.org CVS repository >> + >> +:: >> + >> + cvs -d downloads-cvs@mail.xenproject.org:/home/downloads-cvs/cvs-repos checkout xen.org >> + >> + >> +For RC1 >> +======= >> + >> + * Pin ``QEMU_UPSTREAM_REVISION`` to an exact SHA. Commit. >> + >> + * Update ``XEN_EXTRAVERSION`` from ``-unstable`` to ``.0-rc1``. For >> + ``README`` and ``SUPPORT.md``, use the slightly more generic ``-rc`` so >> + they doesn't need to change during subsequent RCs. Commit. > Nit: don't > >> + * Tag. Produce tarballs. >> + >> +e.g. from Xen 4.21, ``ffd25d717a74^..d1478321eacb``:: >> + >> + * d1478321eacb - (tag: 4.21.0-rc1) Update Xen version to 4.21.0-rc1 >> + * ffd25d717a74 - Config.mk: Pin QEMU_UPSTREAM_REVISION >> + >> + >> +For subsequent RCs >> +================== >> + >> + * Update ``XEN_EXTRAVERSION`` to the next RC number. Commit. Tag. >> + >> +e.g. from Xen 4.21, ``eff32008be0d`` and ``9632ce6fe5b2``:: >> + >> + * 9632ce6fe5b2 - (tag: 4.21.0-rc3) Update Xen version to 4.21.0-rc3 >> + * eff32008be0d - (tag: 4.21.0-rc2) Update Xen version to 4.21.0-rc2 >> + >> + >> +Branching >> +========= >> + >> +On xenbits: >> + >> + * Create new staging and stable branches in xen.git. >> + >> + * Add the new branches to patchbot. In ``~xen/HG/patchbot`` copy the exsting >> + master and staging reported heads, update the ``versions`` file, and commit >> + the result. >> + >> + * Add the new stable branch to the docs cronjob. In ``~xendocs/cronjobs`` >> + edit ``xenbits-docs-all.sh`` and commit the result. e.g.: >> + >> +:: >> + >> + ssh xenbits.xen.org >> + >> + cd ~xen/git/xen.git >> + git branch staging-$v staging >> + git branch stable-$v master >> + >> + cd ~xen/HG/patchbot >> + cp xen--master.patchbot-reported-heads xen--stable-$v.patchbot-reported-heads >> + cp xen--staging.patchbot-reported-heads xen--staging-$v.patchbot-reported-heads >> + $EDITOR versions >> + git commit -am "Branch for $v" >> + >> + cd ~xendocs/cronjobs >> + $EDITOR xenbits-docs-all.sh >> + git commit -am "Branch for $v" >> + >> + >> +On the new branch: >> + >> + * Switch to release builds by default. Commit. >> + >> +On staging: >> + >> + * Update ``XEN_SUBVERSION`` to the next version. Update >> + ``XEN_EXTRAVERSION``, ``README`` and ``SUPPORT.md`` back to ``-unstable``. >> + Commit. Tag the start of the new development window. >> + >> + * Rerun ``./autogen.sh`` to refresh the configure scripts. Commit. >> + >> + * Switch ``QEMU_UPSTREAM_REVISION`` back to ``master``. Commit. >> + >> + * Create a new section in ``CHANGELOG.md``. Commit. > Should this really be four separate commits? It is and has been for a while. Folding autogen into the version update might be sensible.  Everywhere else needing an autogen does so in the same patch. But, I don't see it being sensible to fold the remaining thee patches. This also begs the question of how we indicate a planned change from the example given.  Maybe "Note, example is from prior to deciding to $X", which gets removed when the example gets updated? If we're going to do that, I'd want to make it a separate change to the main rewrite. > >> +e.g. from Xen 4.21, ``d510f9c1430c^..62d0a92057ca`` and ``d510f9c1430c^..b0255656d121``:: >> + >> + * 62d0a92057ca - CHANGELOG.md: Start a new 4.22 section >> + * 7b88e463f999 - Config.mk: Switch QEMU back to master >> + * d954e8c5c8de - Rerun ./autogen.sh for 4.22 >> + * 85768c28b705 - (tag: 4.22-dev) Update Xen to 4.22 >> + | * b0255656d121 - (staging-4.21) Switch to release builds by default >> + |/ >> + * d510f9c1430c - doc/man: Align list of viridian default enlightenments with libxl >> + >> + >> +Releasing >> +========= >> + >> + * Finalise the release dates in ``CHANGELOG.md`` (backported from staging) >> + and ``SUPPORT.md`` (only in the release branch). >> + >> + * Tag the release in relevant external repos, and update ``Config.mk`` to >> + refer to the tag. >> + >> + * Update ``XEN_EXTRAVERSION`` to drop the ``-rc`` suffix, and update > Since further up it's now rc, imo it would be better to also say it that way > here. One thing I found very problematic with the older checklists was the excessive use of variables.  In this doc, I've got it down to two, and using the examples to clear up any ambiguity. Would "to drop the RC suffix" work?  This is supposed to be clear that it means rc and whatever number we've got to, but rc (especially rendered as a literal) doesn't help IMO. > >> + ``README`` to match. Commit. > The latest here QEMU_UPSTREAM_REVISION and MINIOS_UPSTREAM_REVISION also need > adjusting to reference version tags, aiui. Taking tag creation in the respective > leaf trees as prereq. That's the previous bullet point.  I should probably make it clearer saying ``*_UPSTREAM_REVISION`` but naming more specifically like that is going to bitrot. > >> + * Tag. Produce tarballs. > Link to the respective section further down? I considered that.  The linking syntax detracts from the readability as a text file, while on the rendered version it's clear from the navigation panel that there are relevant sections. ~Andrew From xen-devel-bounces@lists.xenproject.org Thu Nov 13 12:31:06 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 12:31:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161227.1489221 (Exim 4.92) (envelope-from ) id 1vJWTg-0004rZ-LS; Thu, 13 Nov 2025 12:31:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161227.1489221; Thu, 13 Nov 2025 12:31:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJWTg-0004rS-Ik; Thu, 13 Nov 2025 12:31:04 +0000 Received: by outflank-mailman (input) for mailman id 1161227; Thu, 13 Nov 2025 12:31:02 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJWTe-0004rL-PD for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 12:31:02 +0000 Received: from mail-ej1-x62f.google.com (mail-ej1-x62f.google.com [2a00:1450:4864:20::62f]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 9cc5c549-c08c-11f0-980a-7dc792cee155; Thu, 13 Nov 2025 13:31:00 +0100 (CET) Received: by mail-ej1-x62f.google.com with SMTP id a640c23a62f3a-b71397df721so91336666b.1 for ; Thu, 13 Nov 2025 04:31:00 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 13 Nov 2025 04:31:00 -0800 (PST) Message-ID: Date: Thu, 13 Nov 2025 13:30:58 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH 3/5] x86: hvm: factor out compat code under ifdefs To: Grygorii Strashko Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Alejandro Vallejo , Jason Andryuk , "xen-devel@lists.xenproject.org" References: <20251111175413.3540690-1-grygorii_strashko@epam.com> <20251111175413.3540690-4-grygorii_strashko@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251111175413.3540690-4-grygorii_strashko@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 11.11.2025 18:54, Grygorii Strashko wrote: > @@ -3991,7 +3995,7 @@ static void hvm_latch_shinfo_size(struct domain *d) > */ > if ( current->domain == d ) > { > - d->arch.has_32bit_shinfo = > + d->arch.has_32bit_shinfo = IS_ENABLED(CONFIG_COMPAT) && > hvm_guest_x86_mode(current) != X86_MODE_64BIT; I think this could need commenting on if we really want to put it in this shape. But why would we retain the has_32bit_shinfo field in the first place when COMPAT=n? > @@ -4965,6 +4969,7 @@ static int do_altp2m_op( > #endif /* CONFIG_ALTP2M */ > } > > +#ifdef CONFIG_COMPAT > DEFINE_XEN_GUEST_HANDLE(compat_hvm_altp2m_op_t); > > /* > @@ -5064,6 +5069,12 @@ static int compat_altp2m_op( > > return rc; > } > +#else > +static int compat_altp2m_op(XEN_GUEST_HANDLE_PARAM(void) arg) > +{ > + return -EOPNOTSUPP; > +} > +#endif /* CONFIG_COMPAT */ I'm not in favor of repeating the function "header". Imo such #ifdef-s better go inside respective functions' bodies. > --- a/xen/arch/x86/hvm/hypercall.c > +++ b/xen/arch/x86/hvm/hypercall.c > @@ -29,10 +29,12 @@ long hvm_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg) > return -ENOSYS; > } > > - if ( !vcpu_is_hcall_compat(current) ) > - rc = do_memory_op(cmd, arg); > - else > +#ifdef CONFIG_COMPAT > + if ( vcpu_is_hcall_compat(current) ) > rc = compat_memory_op(cmd, arg); > + else > +#endif > + rc = do_memory_op(cmd, arg); Why would this be needed when vcpu_is_hcall_compat() already honors CONFIG_COMPAT? (Same question then applies elsewhere, of course.) > @@ -171,6 +177,7 @@ int hvm_hypercall(struct cpu_user_regs *regs) > HVM_DBG_LOG(DBG_LEVEL_HCALL, "hcall%lu(%x, %x, %x, %x, %x)", eax, > regs->ebx, regs->ecx, regs->edx, regs->esi, regs->edi); > > +#ifdef CONFIG_COMPAT > curr->hcall_compat = true; > call_handlers_hvm32(eax, regs->eax, regs->ebx, regs->ecx, regs->edx, > regs->esi, regs->edi); > @@ -178,6 +185,9 @@ int hvm_hypercall(struct cpu_user_regs *regs) > > if ( !curr->hcall_preempted && regs->eax != -ENOSYS ) > clobber_regs(regs, eax, hvm, 32); > +#else > + regs->eax = -EOPNOTSUPP; > +#endif I'm generally against most attempts to use ENOSYS, but here it should be used: The top-level hypercalls are (effectively) unimplemented in this mode. > @@ -208,10 +218,19 @@ enum mc_disposition hvm_do_multicall_call(struct mc_state *state) > } > else > { > +#ifdef CONFIG_COMPAT > struct compat_multicall_entry *call = &state->compat_call; > > call_handlers_hvm32(call->op, call->result, call->args[0], call->args[1], > call->args[2], call->args[3], call->args[4]); > +#else > + /* > + * code should never reach here in case !CONFIG_COMPAT as any > + * 32-bit hypercall should bail out earlier from hvm_hypercall() > + * with -EOPNOTSUPP > + */ > + unreachable(); I.e. you rather mean ASSERT_UNREACHABLE()? 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="ch/S/wdXVtSi1v5H" Content-Disposition: inline In-Reply-To: --ch/S/wdXVtSi1v5H Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Thu, 13 Nov 2025 13:39:16 +0100 From: Marek Marczykowski To: Jan Beulich Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , Roger Pau =?utf-8?B?TW9ubsOp?= Subject: Re: [PATCH 3/3] xhci-dbc: use brk_alloc() On Thu, Nov 13, 2025 at 12:10:16PM +0100, Jan Beulich wrote: > This way the relatively large chunk of DMA buffers can be freed when the > driver isn't in use. >=20 > Signed-off-by: Jan Beulich >=20 > --- a/xen/drivers/char/xhci-dbc.c > +++ b/xen/drivers/char/xhci-dbc.c > @@ -27,6 +27,8 @@ > #include > #include > #include > + > +#include > #include > #include > #include > @@ -1321,7 +1323,7 @@ static struct uart_driver dbc_uart_drive > }; > =20 > /* Those are accessed via DMA. */ > -struct dbc_dma_bufs { > +struct __aligned(PAGE_SIZE) dbc_dma_bufs { > struct xhci_trb evt_trb[DBC_TRB_RING_CAP]; > struct xhci_trb out_trb[DBC_TRB_RING_CAP]; > struct xhci_trb in_trb[DBC_TRB_RING_CAP]; > @@ -1335,8 +1337,7 @@ struct dbc_dma_bufs { > * DMA-reachable by the USB controller. > */ > }; > -static struct dbc_dma_bufs __section(".bss.page_aligned") __aligned(PAGE= _SIZE) > - dbc_dma_bufs; > +DEFINE_BRK(xhci, sizeof(struct dbc_dma_bufs)); I think with this change (or rather with using brk_alloc() below), the structure wants to be padded up to the page size, to avoid putting anything else on the same page (see comment just outside of context above). Previously .bss.page_aligned contained (hopefully) only page-aligned objects, but now brk_alloc() can combine them. > =20 > static int __init cf_check xhci_parse_dbgp(const char *opt_dbgp) > { > @@ -1413,24 +1414,33 @@ void __init xhci_dbc_uart_init(void) > { > struct dbc_uart *uart =3D &dbc_uart; > struct dbc *dbc =3D &uart->dbc; > + struct dbc_dma_bufs *dma_bufs; > =20 > if ( !dbc->enable ) > return; > =20 > - dbc->dbc_ctx =3D &dbc_dma_bufs.ctx; > - dbc->dbc_erst =3D &dbc_dma_bufs.erst; > - dbc->dbc_ering.trb =3D dbc_dma_bufs.evt_trb; > - dbc->dbc_oring.trb =3D dbc_dma_bufs.out_trb; > - dbc->dbc_iring.trb =3D dbc_dma_bufs.in_trb; > - dbc->dbc_owork.buf =3D dbc_dma_bufs.out_wrk_buf; > - dbc->dbc_iwork.buf =3D dbc_dma_bufs.in_wrk_buf; > - dbc->dbc_str =3D dbc_dma_bufs.str_buf; > + dma_bufs =3D brk_alloc(sizeof(*dma_bufs)); > + if ( !dma_bufs ) > + { > + dbc->enable =3D false; > + printk(XENLOG_ERR "XHCI: not enough BRK space available\n"); > + return; > + } > + > + dbc->dbc_ctx =3D &dma_bufs->ctx; > + dbc->dbc_erst =3D &dma_bufs->erst; > + dbc->dbc_ering.trb =3D dma_bufs->evt_trb; > + dbc->dbc_oring.trb =3D dma_bufs->out_trb; > + dbc->dbc_iring.trb =3D dma_bufs->in_trb; > + dbc->dbc_owork.buf =3D dma_bufs->out_wrk_buf; > + dbc->dbc_iwork.buf =3D dma_bufs->in_wrk_buf; > + dbc->dbc_str =3D dma_bufs->str_buf; > =20 > if ( dbc_open(dbc) ) > { > iommu_add_extra_reserved_device_memory( > - PFN_DOWN(virt_to_maddr(&dbc_dma_bufs)), > - PFN_UP(sizeof(dbc_dma_bufs)), > + PFN_DOWN(virt_to_maddr(dma_bufs)), > + PFN_DOWN(sizeof(*dma_bufs)), Is that really correct? But with padding (see earlier comment) it shouldn't really matter. > uart->dbc.sbdf, > "XHCI console"); > serial_register_uart(SERHND_XHCI, &dbc_uart_driver, &dbc_uart); >=20 --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --ch/S/wdXVtSi1v5H Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmkV0XUACgkQ24/THMrX 1ywdEwf+OuXjepjEDIVSvoL7/9ZRwZe8TEYUWUM1S7ebKl3a6kBJ8kevhDrYtss5 SbQBUnK1dSiPv53gjmHe25ipZXjNWGKsx9pHJCKykVCE/Eqy5v7YZ9aqRH9j8o0T v5QBMzrppP2QPpomT+luR9EqS7xd7Qlf4EFDnuO30qqiCuc5G0jGlexn+mQmN6hi KUUCSuPdYzU2sZSRggOLW3m8BjOYjPwU5f2g6ma3dPVnuCgR+g8mJw0FYz75+P+3 Ks5KWeDNWDeNR65Q8uOOATiddWNtFrlhAN6KyePbyEK6THQG55xryyuKQn95Nkvx lNHuAgI1pwRm/ikoeid85vzUePssBw== =R0OP -----END PGP SIGNATURE----- --ch/S/wdXVtSi1v5H-- From xen-devel-bounces@lists.xenproject.org Thu Nov 13 12:40:28 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 12:40:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161254.1489243 (Exim 4.92) (envelope-from ) id 1vJWcm-0007gf-Th; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="EcQHnMKI/KcaS/qC" Content-Disposition: inline In-Reply-To: <452fdf1f-646a-4bb1-83ea-ac4c998a096b@suse.com> --EcQHnMKI/KcaS/qC Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Thu, 13 Nov 2025 13:40:21 +0100 From: Marek Marczykowski To: Jan Beulich Cc: "xen-devel@lists.xenproject.org" , Daniel Smith , Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , Roger Pau =?utf-8?B?TW9ubsOp?= Subject: Re: [PATCH 2/3] x86/EFI: replace ebmalloc() On Thu, Nov 13, 2025 at 12:09:37PM +0100, Jan Beulich wrote: > Use the new brk_alloc() instead, with ebmalloc() merely being a thin > wrapper. >=20 > Signed-off-by: Jan Beulich > --- > I'm not quite certain whether we ought to permit non-page-granular > reservations. The in-memory image being somewhat larger due to possibly > excessive padding isn't really a big problem, I think. My grep says ebmalloc is used in just two places: 1. For efi_memmap (via efi_arch_allocate_mmap_buffer()) 2. For various cmdline options and module names (via aplace_string()) The second one is probably undesirable to allocate full page for each one. On the other hand, the current approach (putting small allocations at the same page as an earlier page-aligned one) also has its issues - see comments on 3/3 patch. > --- a/xen/Rules.mk > +++ b/xen/Rules.mk > @@ -262,7 +262,7 @@ quiet_cmd_obj_init_o =3D INIT_O $@ > define cmd_obj_init_o > $(OBJDUMP) -h $< | while read idx name sz rest; do \ > case "$$name" in \ > - .*.local) ;; \ > + .*.local|.bss..brk*) ;; \ > .text|.text.*|.data|.data.*|.bss|.bss.*) \ > test $$(echo $$sz | sed 's,00*,0,') !=3D 0 || continue; \ > echo "Error: size of $<:$$name is 0x$$sz" >&2; \ > --- a/xen/arch/x86/efi/efi-boot.h > +++ b/xen/arch/x86/efi/efi-boot.h > @@ -10,6 +10,7 @@ > #include > =20 > #include > +#include > #include > #include > #include > @@ -119,6 +120,18 @@ static void __init relocate_trampoline(u > reloc_trampoline64(); > } > =20 > +DEFINE_BRK(efi, MB(1)); > + > +static void *__init ebmalloc(size_t size) > +{ > + void *ptr =3D brk_alloc(size); > + > + if ( !ptr ) > + blexit(L"Out of BRK memory\r\n"); > + > + return ptr; > +} > + > static void __init place_string(u32 *addr, const char *s) > { > char *alloc =3D NULL; > --- a/xen/arch/x86/efi/stub.c > +++ b/xen/arch/x86/efi/stub.c > @@ -41,12 +41,4 @@ void __init noreturn efi_multiboot2(EFI_ > =20 > void __init efi_init_memory(void) { } > =20 > -bool efi_boot_mem_unused(unsigned long *start, unsigned long *end) > -{ > - /* FIXME: Simplify once the call here with two NULLs goes away. */ > - if ( start || end ) > - *start =3D *end =3D (unsigned long)_end; > - return false; > -} > - > void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t l4e) { } > --- a/xen/arch/x86/include/asm/brk.h > +++ b/xen/arch/x86/include/asm/brk.h > @@ -2,6 +2,10 @@ > =20 > #include > =20 > +#define DEFINE_BRK(var, size) \ > + static char __section(".bss..brk.page_aligned") __aligned(PAGE_SIZE)= \ > + __used var ## _brk_[size] This chunk belongs to the previous patch I think. > + > void *brk_alloc(size_t size); > unsigned long brk_get_unused_start(void); > void brk_free_unused(void); --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --EcQHnMKI/KcaS/qC Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmkV0bUACgkQ24/THMrX 1yxmUwf/eHsCovJTIQ9sp3liGEH3ysQq8UT0w4Bzhw5SqL3Cmx8JN/va8EI2+TxW D+AyEfdiPCftMN2s/GRLHhdL4EcnIqaB9/kEsqoO8HFXMfJbjwKTD8wD0BdI8wzp 77QQpfrl8W/rd2CmcDbDhtzEhiNFHgKkykrr+MkQy3Ccd2pex66c8A8EfvwBJla3 jM5yVO5A5v/gPzBXSQ7PiE/XPD0//gXCdccr6r+svCaEyW7RP8HHpqK12J38h4JZ eVoYRFG+zsK+TiJ2Tgo1m3ZvyTrviOfnoZmbNWBsxpdFBXBlg2SU3F6u9giEdiov RwTeWr2MBsqlzPA0lvlikVsKaRkXTw== =fLJ1 -----END PGP SIGNATURE----- --EcQHnMKI/KcaS/qC-- From xen-devel-bounces@lists.xenproject.org Thu Nov 13 12:44:45 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 12:44:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161268.1489252 (Exim 4.92) (envelope-from ) id 1vJWgp-0000OV-Aq; Thu, 13 Nov 2025 12:44:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161268.1489252; Thu, 13 Nov 2025 12:44:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJWgp-0000OO-7x; Thu, 13 Nov 2025 12:44:39 +0000 Received: by outflank-mailman (input) for mailman id 1161268; Thu, 13 Nov 2025 12:44:37 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJWgn-0000OI-PY for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 12:44:37 +0000 Received: from mail-ed1-x52b.google.com (mail-ed1-x52b.google.com [2a00:1450:4864:20::52b]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 8248fffe-c08e-11f0-980a-7dc792cee155; Thu, 13 Nov 2025 13:44:35 +0100 (CET) Received: by mail-ed1-x52b.google.com with SMTP id 4fb4d7f45d1cf-640b4a52950so1113685a12.1 for ; Thu, 13 Nov 2025 04:44:35 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 13 Nov 2025 04:44:34 -0800 (PST) Message-ID: <77ff68f1-55dc-4b9b-a40a-ee17cbbeaf09@suse.com> Date: Thu, 13 Nov 2025 13:44:33 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] docs: Rewrite the Tagging and Branching checklist To: Andrew Cooper Cc: Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Oleksii Kurochko , Xen-devel References: <20251112185402.209485-1-andrew.cooper3@citrix.com> <9a949edb-8eb8-4984-adf0-4ab8b82e64db@suse.com> <88523cc6-d069-4384-a5c2-e4399e389a41@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <88523cc6-d069-4384-a5c2-e4399e389a41@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 13.11.2025 13:28, Andrew Cooper wrote: > On 13/11/2025 7:54 am, Jan Beulich wrote: >> On 12.11.2025 19:54, Andrew Cooper wrote: >>> There's a lot of stale information in the current checklists. Merge the >>> documents and present the information in chronological order. Provide real >>> examples from the tree rather than trying to be too prescriptive. >>> >>> Signed-off-by: Andrew Cooper >> Hardly anything is being said about stable releases - is this intentional? > > Is there anything you think I'm missing? Well, ... > I suppose the releasing section is slightly specific to new releases, > but for the stable release, it really is just bump extraversion, commit > and tag, and where usually tag is the only action after you've prepared > the tree. ... this distinction isn't made clear (enough) for my taste. And while I agree with "usually", there are the rare cases where qemu and/or minios tags would still need making and propagating (the latter normally being done by me rather than the release engineer). >>> +Branching >>> +========= >>> + >>> +On xenbits: >>> + >>> + * Create new staging and stable branches in xen.git. >>> + >>> + * Add the new branches to patchbot. In ``~xen/HG/patchbot`` copy the exsting >>> + master and staging reported heads, update the ``versions`` file, and commit >>> + the result. >>> + >>> + * Add the new stable branch to the docs cronjob. In ``~xendocs/cronjobs`` >>> + edit ``xenbits-docs-all.sh`` and commit the result. e.g.: >>> + >>> +:: >>> + >>> + ssh xenbits.xen.org >>> + >>> + cd ~xen/git/xen.git >>> + git branch staging-$v staging >>> + git branch stable-$v master >>> + >>> + cd ~xen/HG/patchbot >>> + cp xen--master.patchbot-reported-heads xen--stable-$v.patchbot-reported-heads >>> + cp xen--staging.patchbot-reported-heads xen--staging-$v.patchbot-reported-heads >>> + $EDITOR versions >>> + git commit -am "Branch for $v" >>> + >>> + cd ~xendocs/cronjobs >>> + $EDITOR xenbits-docs-all.sh >>> + git commit -am "Branch for $v" >>> + >>> + >>> +On the new branch: >>> + >>> + * Switch to release builds by default. Commit. >>> + >>> +On staging: >>> + >>> + * Update ``XEN_SUBVERSION`` to the next version. Update >>> + ``XEN_EXTRAVERSION``, ``README`` and ``SUPPORT.md`` back to ``-unstable``. >>> + Commit. Tag the start of the new development window. >>> + >>> + * Rerun ``./autogen.sh`` to refresh the configure scripts. Commit. >>> + >>> + * Switch ``QEMU_UPSTREAM_REVISION`` back to ``master``. Commit. >>> + >>> + * Create a new section in ``CHANGELOG.md``. Commit. >> Should this really be four separate commits? > > It is and has been for a while. In practice maybe, but not as per the original doc? > Folding autogen into the version update might be sensible.  Everywhere > else needing an autogen does so in the same patch. > > But, I don't see it being sensible to fold the remaining thee patches. Why not? It's all part of the branching operation. > This also begs the question of how we indicate a planned change from the > example given.  Maybe "Note, example is from prior to deciding to $X", > which gets removed when the example gets updated? > > If we're going to do that, I'd want to make it a separate change to the > main rewrite. As far as changing what was written down so far goes, I'd certainly agree. But as per the original branching-checklist.txt it's not spelled out either way, so describing it one way or the other can be seen as part of the re-write. >>> +e.g. from Xen 4.21, ``d510f9c1430c^..62d0a92057ca`` and ``d510f9c1430c^..b0255656d121``:: >>> + >>> + * 62d0a92057ca - CHANGELOG.md: Start a new 4.22 section >>> + * 7b88e463f999 - Config.mk: Switch QEMU back to master >>> + * d954e8c5c8de - Rerun ./autogen.sh for 4.22 >>> + * 85768c28b705 - (tag: 4.22-dev) Update Xen to 4.22 >>> + | * b0255656d121 - (staging-4.21) Switch to release builds by default >>> + |/ >>> + * d510f9c1430c - doc/man: Align list of viridian default enlightenments with libxl >>> + >>> + >>> +Releasing >>> +========= >>> + >>> + * Finalise the release dates in ``CHANGELOG.md`` (backported from staging) >>> + and ``SUPPORT.md`` (only in the release branch). >>> + >>> + * Tag the release in relevant external repos, and update ``Config.mk`` to >>> + refer to the tag. >>> + >>> + * Update ``XEN_EXTRAVERSION`` to drop the ``-rc`` suffix, and update >> Since further up it's now rc, imo it would be better to also say it that way >> here. > > One thing I found very problematic with the older checklists was the > excessive use of variables.  In this doc, I've got it down to two, and > using the examples to clear up any ambiguity. > > Would "to drop the RC suffix" work?  This is supposed to be clear that > it means rc and whatever number we've got to, but rc (especially > rendered as a literal) doesn't help IMO. Yes, fine with me. >>> + ``README`` to match. Commit. >> The latest here QEMU_UPSTREAM_REVISION and MINIOS_UPSTREAM_REVISION also need >> adjusting to reference version tags, aiui. Taking tag creation in the respective >> leaf trees as prereq. > > That's the previous bullet point.  I should probably make it clearer > saying ``*_UPSTREAM_REVISION`` but naming more specifically like that is > going to bitrot. Oh, I see. The absence of *_UPSTREAM_REVISION made me not recognize it as what it is. >>> + * Tag. Produce tarballs. >> Link to the respective section further down? > > I considered that.  The linking syntax detracts from the readability as > a text file, while on the rendered version it's clear from the > navigation panel that there are relevant sections. Well, okay. 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Thu, 13 Nov 2025 04:46:22 -0800 (PST) Message-ID: <4391d560-870e-4010-b3bb-dee2935f9732@suse.com> Date: Thu, 13 Nov 2025 13:46:20 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/3] x86/EFI: replace ebmalloc() To: Marek Marczykowski Cc: "xen-devel@lists.xenproject.org" , Daniel Smith , Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <452fdf1f-646a-4bb1-83ea-ac4c998a096b@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.11.2025 13:40, Marek Marczykowski wrote: > On Thu, Nov 13, 2025 at 12:09:37PM +0100, Jan Beulich wrote: >> --- a/xen/arch/x86/include/asm/brk.h >> +++ b/xen/arch/x86/include/asm/brk.h >> @@ -2,6 +2,10 @@ >> >> #include >> >> +#define DEFINE_BRK(var, size) \ >> + static char __section(".bss..brk.page_aligned") __aligned(PAGE_SIZE) \ >> + __used var ## _brk_[size] > > This chunk belongs to the previous patch I think. It could, but it's not used there yet (i.e. would count as dead code). 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?nzLcIeSOtQ+/CdAS3BbSLjzsMWKc6E6BpYgE5dhWNqGMdqIr9zYCYC7q53Bg?= =?us-ascii?Q?zDzzyv7hxYHTM1eJMz32H4XxoqRD/ihTe/s2cRZBiOfV/lshInlSaX5evmlc?= =?us-ascii?Q?xhEb+rommsDAtyouUyyC4WBZy3fSo3N+xlzk+pGscMDfY3UYuxDhw0OVzb+O?= =?us-ascii?Q?g86y7w2a6uyDRel4y8PuWA9912AlOwDfSJ/bLM1ntJ63CuUKrpu1BvJ3N7Eh?= =?us-ascii?Q?KZDzIvzn7Q43WNa/vJW1Hru3FPzt1dXYMboPQyacn2lJeismSOWDPtPqogZo?= =?us-ascii?Q?0Yd2XHNY4R9f4BK2e+XGhI15khN5XW2/k81o16GaluNGk86UuL9qMioufdd/?= =?us-ascii?Q?gJF6VI2ANeV4lohIxNARKxFelpFjVqVpIos4rBJH0VLQxw21keYJkoVak/rx?= =?us-ascii?Q?Ha3tc4rCjiuj7yGZ5llG6ox5bxKAfcMzUajzip9WqRHoQGMSTIXmmzltKrLi?= =?us-ascii?Q?T+UYaM8gYENHEPDQiO92fPYy4FlB/j2yZShGsyHLkK3Y2nEx8HUpHOGhcGPb?= =?us-ascii?Q?5YCS1l+qD7DDFSLaDdCDWyX7H/B11evzwVacQptDkcweL3P3GZV79Mu8/EXQ?= =?us-ascii?Q?Ci/xrah7s4lI+c5pBlT6MF447Mn/LaYsucGVNpKLfOGxuR8Xs6+XTEOF96xt?= =?us-ascii?Q?gkT3LInjvF+c93vA0xLVIMlmBz5LWMd2522ia163vPbKOF4Wzz2vffhJ+0DI?= =?us-ascii?Q?vmGc+cQM1EK1Mm1vYOb2+alQ3hIFIqVkA9mm78GVM4bqX4M1AqROuytAqhiS?= =?us-ascii?Q?+5VoBGxi3MKaWOdXuC2+emjH25hLOy184Vxo/XiUI26l8+rTjLmzdrjgr2Yl?= =?us-ascii?Q?EyNl/GTvweZog7r+P8flQuQIjT3Gu7ZZJ7LjdGSaCJ35Mb+k67VwUkGKzO5x?= =?us-ascii?Q?7zGF9iSrcQwI5l4tG3ozXSNZFQIZXQsW80Nh6Gm/STCKyHysww5WqDOZw7qy?= =?us-ascii?Q?Ev0b/ZfAE/5Y28Eqnu5Nbs00OnKgCdhT3B5b5wolHnXvYygwopprvjKft09Q?= =?us-ascii?Q?zdxWm6rNZ/w8xDmjYwtoSSEUxJHQC56BIarrAVgEHOzkKYD53szaipWDA+DX?= =?us-ascii?Q?aG0zPtBELi22OPOtg7l8N2RkIvfJOJoI44/4HVMx4r/f028/PlDjv6fDyuge?= =?us-ascii?Q?9BHB1w4283G4Pu6SWxepxNcvJBYf0ve60iTLfsOA4EifA7snc3iofTYa6zrP?= =?us-ascii?Q?IZ99t0j6bw2nr0DkjvkGaX029j3beq1slVKDxXQJNbbcq1MaZQRIKYU45Yz6?= =?us-ascii?Q?c06+bbBD1txzjHUsQ3YuXMzI0xS6s/6aOiflQK+4JY5VcgNFQhC+JNK+sHiO?= =?us-ascii?Q?pDcpT5l6IewRb1fShcAFZ3lcb4yknnrXJ2MfklOS2MPhOSwyO10I3/CWFWmD?= =?us-ascii?Q?7MLOkC6z9hEwjvkP05XXDO9f2KyXDWV6R1A6A5eoG+04sv4slBKn9q831FPL?= =?us-ascii?Q?st0yN14wIIfw7YpvgibSO6q0g0nNEcdKT3IccpfXKkDJH8H2Zh8Y1uZaOfDW?= =?us-ascii?Q?VeUShiy1/A6tvhhs04L7uzVkKAB4xdlIW55EjWRjaLe8RsZwTXRaNB9lLPv5?= =?us-ascii?Q?H9oAL0h+z5Kbgjc89ev9xTr/Ui/9PVGm4nDdAkx2udhL/Usa71wxh6cYdkIE?= =?us-ascii?Q?BQ=3D=3D?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: 84ebeae1-4226-4107-039b-08de22b32197 X-MS-Exchange-CrossTenant-AuthSource: IA3PR03MB8408.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2025 12:49:49.2498 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: pqpf537Ddg2YZmnTKAfcgskLXoAgQg0lbfy+7lbzd8eF3Yul5HKZnKSGwdkBMqUWBSrJSemAq8aS1DewFmjpHIdQtugwGRKK3WXTgfW31IM= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR03MB6096 From: Frediano Ziglio For xen.gz file we strip all symbols and have an additional xen-syms.efi file version with all symbols. Make xen.efi more coherent stripping all symbols too. xen-syms.efi can be used for debugging. Signed-off-by: Frediano Ziglio --- Changes since v1: - avoid leaving target if some command fails. Changes since v2: - do not convert type but retain PE format; - use xen-syms.efi for new file name, more consistent with ELF. Changes since v3: - update documentation; - do not remove xen.efi.elf; - check endbr instruction before generating final target. Changes since v4: - simplify condition check; - avoid reuse of $@.tmp file. Changes since v5: - avoid creation of temporary file. Changes since v6: - install xen-syms.efi; - always strip xen.efi; - restore EFI_LDFLAGS check during rule execution; - update CHANGELOG.md; - added xen-syms.efi to .gitignore. --- .gitignore | 1 + CHANGELOG.md | 3 +++ docs/misc/efi.pandoc | 8 +------- xen/Kconfig.debug | 9 ++------- xen/Makefile | 25 +++---------------------- xen/arch/x86/Makefile | 11 ++++++++--- 6 files changed, 18 insertions(+), 39 deletions(-) diff --git a/.gitignore b/.gitignore index d83427aba8..213972b65c 100644 --- a/.gitignore +++ b/.gitignore @@ -222,6 +222,7 @@ tools/flask/policy/xenpolicy-* xen/xen xen/suppression-list.txt xen/xen-syms +xen/xen-syms.efi xen/xen-syms.map xen/xen.* diff --git a/CHANGELOG.md b/CHANGELOG.md index c9932a2af0..3bdcc3b47a 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -65,6 +65,9 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) for hypervisor mode. ### Removed + - The install-time environment variable INSTALL_EFI_STRIP is no longer + supported, xen.efi will is now always being stripped. + - On x86: - GNTTABOP_cache_flush: it's unused on x86 and the implementation is broken. diff --git a/docs/misc/efi.pandoc b/docs/misc/efi.pandoc index 11c1ac3346..c66b18a66b 100644 --- a/docs/misc/efi.pandoc +++ b/docs/misc/efi.pandoc @@ -20,13 +20,7 @@ Xen to load the configuration file even if multiboot modules are found. Once built, `make install-xen` will place the resulting binary directly into the EFI boot partition, provided `EFI_VENDOR` is set in the environment (and `EFI_MOUNTPOINT` is overridden as needed, should the default of `/boot/efi` not -match your system). When built with debug info, the binary can be quite large. -Setting `INSTALL_EFI_STRIP=1` in the environment will cause it to be stripped -of debug info in the process of installing. `INSTALL_EFI_STRIP` can also be set -to any combination of options suitable to pass to `strip`, in case the default -ones don't do. The xen.efi binary will also be installed in `/usr/lib64/efi/`, -unless `EFI_DIR` is set in the environment to override this default. This -binary will not be stripped in the process. +match your system). The binary itself will require a configuration file (names with the `.efi` extension of the binary's name replaced by `.cfg`, and - until an existing diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug index d900d926c5..1a8e0c6ec3 100644 --- a/xen/Kconfig.debug +++ b/xen/Kconfig.debug @@ -147,12 +147,7 @@ config DEBUG_INFO Say Y here if you want to build Xen with debug information. This information is needed e.g. for doing crash dump analysis of the hypervisor via the "crash" tool. - Saying Y will increase the size of the xen-syms and xen.efi - binaries. In case the space on the EFI boot partition is rather - limited, you may want to install a stripped variant of xen.efi in - the EFI boot partition (look for "INSTALL_EFI_STRIP" in - docs/misc/efi.pandoc for more information - when not using - "make install-xen" for installing xen.efi, stripping needs to be - done outside the Xen build environment). + Saying Y will increase the size of the xen-syms, xen-syms.efi and + xen.efi.elf binaries. endmenu diff --git a/xen/Makefile b/xen/Makefile index fc9244420e..5ed029fed1 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -493,22 +493,6 @@ endif .PHONY: _build _build: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX) -# Strip -# -# INSTALL_EFI_STRIP, if defined, will cause xen.efi to be stripped before it -# is installed. If INSTALL_EFI_STRIP is '1', then the default option(s) below -# will be used. Otherwise, INSTALL_EFI_STRIP value will be used as the -# option(s) to the strip command. -ifdef INSTALL_EFI_STRIP - -ifeq ($(INSTALL_EFI_STRIP),1) -efi-strip-opt := --strip-debug --keep-file-symbols -else -efi-strip-opt := $(INSTALL_EFI_STRIP) -endif - -endif - .PHONY: _install _install: D=$(DESTDIR) _install: T=$(notdir $(TARGET)) @@ -526,18 +510,15 @@ _install: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX) if [ -r $(TARGET).efi -a -n '$(EFI_DIR)' ]; then \ [ -d $(D)$(EFI_DIR) ] || $(INSTALL_DIR) $(D)$(EFI_DIR); \ $(INSTALL_DATA) $(TARGET).efi $(D)$(EFI_DIR)/$(T)-$(XEN_FULLVERSION).efi; \ - for x in map elf; do \ - if [ -e $(TARGET).efi.$$x ]; then \ - $(INSTALL_DATA) $(TARGET).efi.$$x $(D)$(DEBUG_DIR)/$(T)-$(XEN_FULLVERSION).efi.$$x; \ + for x in .efi.map .efi.elf -syms.efi; do \ + if [ -e $(TARGET)$$x ]; then \ + $(INSTALL_DATA) $(TARGET)$$x $(D)$(DEBUG_DIR)/$(T)-$(XEN_FULLVERSION)$$x; \ fi; \ done; \ ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T)-$(XEN_VERSION).$(XEN_SUBVERSION).efi; \ ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T)-$(XEN_VERSION).efi; \ ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T).efi; \ if [ -n '$(EFI_MOUNTPOINT)' -a -n '$(EFI_VENDOR)' ]; then \ - $(if $(efi-strip-opt), \ - $(STRIP) $(efi-strip-opt) -p -o $(TARGET).efi.stripped $(TARGET).efi && \ - $(INSTALL_DATA) $(TARGET).efi.stripped $(D)$(EFI_MOUNTPOINT)/efi/$(EFI_VENDOR)/$(T)-$(XEN_FULLVERSION).efi ||) \ $(INSTALL_DATA) $(TARGET).efi $(D)$(EFI_MOUNTPOINT)/efi/$(EFI_VENDOR)/$(T)-$(XEN_FULLVERSION).efi; \ elif [ "$(D)" = "$(patsubst $(shell cd $(XEN_ROOT) && pwd)/%,%,$(D))" ]; then \ echo 'EFI installation only partially done (EFI_VENDOR not set)' >&2; \ diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index 407571c510..a154ffe6b2 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -228,12 +228,17 @@ endif $(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o $(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds $< \ $(dot-target).1r.o $(dot-target).1s.o $(orphan-handling-y) \ - $(note_file_option) -o $@ - $(NM) -pa --format=sysv $@ \ + $(note_file_option) -o $(TARGET)-syms.efi + $(NM) -pa --format=sysv $(TARGET)-syms.efi \ | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > $@.map ifeq ($(CONFIG_DEBUG_INFO),y) - $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) -O elf64-x86-64 $@ $@.elf + $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) \ + -O elf64-x86-64 $(TARGET)-syms.efi $@.elf +endif + $(STRIP) $(TARGET)-syms.efi -o $@ +ifneq ($(CONFIG_DEBUG_INFO),y) + rm -f $(TARGET)-syms.efi endif rm -f $(dot-target).[0-9]* $(@D)/..$(@F).[0-9]* ifeq ($(CONFIG_XEN_IBT),y) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu Nov 13 12:50:34 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 12:50:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161307.1489282 (Exim 4.92) (envelope-from ) id 1vJWmY-0002zm-EY; Thu, 13 Nov 2025 12:50:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161307.1489282; Thu, 13 Nov 2025 12:50:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJWmY-0002zf-BH; Thu, 13 Nov 2025 12:50:34 +0000 Received: by outflank-mailman (input) for mailman id 1161307; Thu, 13 Nov 2025 12:50:32 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJWmW-0001YB-F0 for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 12:50:32 +0000 Received: from mail-ed1-x533.google.com (mail-ed1-x533.google.com [2a00:1450:4864:20::533]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 561e6695-c08f-11f0-980a-7dc792cee155; Thu, 13 Nov 2025 13:50:30 +0100 (CET) Received: by mail-ed1-x533.google.com with SMTP id 4fb4d7f45d1cf-640b06fa959so1437484a12.3 for ; Thu, 13 Nov 2025 04:50:30 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 13 Nov 2025 04:50:30 -0800 (PST) Message-ID: <0ed20aaa-2625-4555-8fab-0e15fea5e71c@suse.com> Date: Thu, 13 Nov 2025 13:50:28 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/3] xhci-dbc: use brk_alloc() To: Marek Marczykowski Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.11.2025 13:39, Marek Marczykowski wrote: > On Thu, Nov 13, 2025 at 12:10:16PM +0100, Jan Beulich wrote: >> --- a/xen/drivers/char/xhci-dbc.c >> +++ b/xen/drivers/char/xhci-dbc.c >> @@ -27,6 +27,8 @@ >> #include >> #include >> #include >> + >> +#include >> #include >> #include >> #include >> @@ -1321,7 +1323,7 @@ static struct uart_driver dbc_uart_drive >> }; >> >> /* Those are accessed via DMA. */ >> -struct dbc_dma_bufs { >> +struct __aligned(PAGE_SIZE) dbc_dma_bufs { >> struct xhci_trb evt_trb[DBC_TRB_RING_CAP]; >> struct xhci_trb out_trb[DBC_TRB_RING_CAP]; >> struct xhci_trb in_trb[DBC_TRB_RING_CAP]; >> @@ -1335,8 +1337,7 @@ struct dbc_dma_bufs { >> * DMA-reachable by the USB controller. >> */ >> }; >> -static struct dbc_dma_bufs __section(".bss.page_aligned") __aligned(PAGE_SIZE) >> - dbc_dma_bufs; >> +DEFINE_BRK(xhci, sizeof(struct dbc_dma_bufs)); > > I think with this change (or rather with using brk_alloc() below), the > structure wants to be padded up to the page size, to avoid putting > anything else on the same page (see comment just outside of context > above). Are you sure? My understanding is that sizeof(xyz) is always evenly divisible by alignof(xyz). Hence such padding doesn't need making explicit. (And yes, I did see that comment while making the change.) >> @@ -1413,24 +1414,33 @@ void __init xhci_dbc_uart_init(void) >> { >> struct dbc_uart *uart = &dbc_uart; >> struct dbc *dbc = &uart->dbc; >> + struct dbc_dma_bufs *dma_bufs; >> >> if ( !dbc->enable ) >> return; >> >> - dbc->dbc_ctx = &dbc_dma_bufs.ctx; >> - dbc->dbc_erst = &dbc_dma_bufs.erst; >> - dbc->dbc_ering.trb = dbc_dma_bufs.evt_trb; >> - dbc->dbc_oring.trb = dbc_dma_bufs.out_trb; >> - dbc->dbc_iring.trb = dbc_dma_bufs.in_trb; >> - dbc->dbc_owork.buf = dbc_dma_bufs.out_wrk_buf; >> - dbc->dbc_iwork.buf = dbc_dma_bufs.in_wrk_buf; >> - dbc->dbc_str = dbc_dma_bufs.str_buf; >> + dma_bufs = brk_alloc(sizeof(*dma_bufs)); >> + if ( !dma_bufs ) >> + { >> + dbc->enable = false; >> + printk(XENLOG_ERR "XHCI: not enough BRK space available\n"); >> + return; >> + } >> + >> + dbc->dbc_ctx = &dma_bufs->ctx; >> + dbc->dbc_erst = &dma_bufs->erst; >> + dbc->dbc_ering.trb = dma_bufs->evt_trb; >> + dbc->dbc_oring.trb = dma_bufs->out_trb; >> + dbc->dbc_iring.trb = dma_bufs->in_trb; >> + dbc->dbc_owork.buf = dma_bufs->out_wrk_buf; >> + dbc->dbc_iwork.buf = dma_bufs->in_wrk_buf; >> + dbc->dbc_str = dma_bufs->str_buf; >> >> if ( dbc_open(dbc) ) >> { >> iommu_add_extra_reserved_device_memory( >> - PFN_DOWN(virt_to_maddr(&dbc_dma_bufs)), >> - PFN_UP(sizeof(dbc_dma_bufs)), >> + PFN_DOWN(virt_to_maddr(dma_bufs)), >> + PFN_DOWN(sizeof(*dma_bufs)), > > Is that really correct? But with padding (see earlier comment) it > shouldn't really matter. I think this is addressed by the reply further up as well. Jan From xen-devel-bounces@lists.xenproject.org Thu Nov 13 12:53:20 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 12:53:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161322.1489292 (Exim 4.92) (envelope-from ) id 1vJWpD-0004CF-0I; Thu, 13 Nov 2025 12:53:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161322.1489292; Thu, 13 Nov 2025 12:53:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJWpC-0004C8-Sb; Thu, 13 Nov 2025 12:53:18 +0000 Received: by outflank-mailman (input) for mailman id 1161322; Thu, 13 Nov 2025 12:53:17 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJWpB-0004C2-DM for xen-devel@lists.xenproject.org; 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>> >> /* Check whether IPT is supported in VMX operation. */ >> +#ifdef CONFIG_VMTRACE >> if ( bsp ) >> vmtrace_available = cpu_has_proc_trace && >> (_vmx_misc_cap & VMX_MISC_PROC_TRACE); >> @@ -317,6 +318,7 @@ static int vmx_init_vmcs_config(bool bsp) >> smp_processor_id()); >> return -EINVAL; >> } >> +#endif > > Initially I was inclined to ask for use of IS_ENABLED() here, but that wouldn't > work since vmtrace_available isn't an lvalue when VMTRACE=n. Hence why generally > I think it is better to check the particular identifier in such cases, rather > than the original CONFIG_* (i.e. "#ifndef vmtrace_available" here). I'm not > going to insist though, as I expect opinions may differ on this matter. Yep. assignment required ifdef wrapping. "#ifndef vmtrace_available" will not work out of the box as there are "if (vmtrace_available)" in code. So, can't just "not define"/undef "vmtrace_available". > >> --- a/xen/arch/x86/include/asm/hvm/hvm.h >> +++ b/xen/arch/x86/include/asm/hvm/hvm.h >> @@ -234,12 +234,14 @@ struct hvm_function_table { >> int (*altp2m_vcpu_emulate_vmfunc)(const struct cpu_user_regs *regs); >> #endif >> >> +#ifdef CONFIG_VMTRACE >> /* vmtrace */ >> int (*vmtrace_control)(struct vcpu *v, bool enable, bool reset); >> int (*vmtrace_output_position)(struct vcpu *v, uint64_t *pos); >> int (*vmtrace_set_option)(struct vcpu *v, uint64_t key, uint64_t value); >> int (*vmtrace_get_option)(struct vcpu *v, uint64_t key, uint64_t *value); >> int (*vmtrace_reset)(struct vcpu *v); >> +#endif >> >> uint64_t (*get_reg)(struct vcpu *v, unsigned int reg); >> void (*set_reg)(struct vcpu *v, unsigned int reg, uint64_t val); >> @@ -735,6 +737,7 @@ static inline bool altp2m_vcpu_emulate_ve(struct vcpu *v) >> bool altp2m_vcpu_emulate_ve(struct vcpu *v); >> #endif /* CONFIG_ALTP2M */ >> >> +#ifdef CONFIG_VMTRACE >> static inline int hvm_vmtrace_control(struct vcpu *v, bool enable, bool reset) >> { >> if ( hvm_funcs.vmtrace_control ) >> @@ -769,13 +772,20 @@ static inline int hvm_vmtrace_get_option( >> >> return -EOPNOTSUPP; >> } >> +#else >> +int hvm_vmtrace_output_position(struct vcpu *v, uint64_t *pos); >> +#endif > > There not being any definition for this declaration (regardless of configuration), > a comment might have been warranted here. /* Function declaration(s) here are used without definition(s) to make compiler happy when VMTRACE=n while all call sites expected to be protected by ifdefs or IS_ENABLED() guards, so compiler DCE will eliminate unused code and overall build succeeds */ a little bit long :( ? > Furthermore, can't the stub further down > in the file now go away (addressing a Misra concern of it now being unused, as > HVM=n implies VMTRACE=n)? Possibly this applies to a few other stubs there as > well? You are talking about HVM=n stubs here, right? I'll check, most probably they all(most) can be dropped. > >> static inline int hvm_vmtrace_reset(struct vcpu *v) >> { >> +#ifdef CONFIG_VMTRACE >> if ( hvm_funcs.vmtrace_reset ) >> return alternative_call(hvm_funcs.vmtrace_reset, v); >> >> return -EOPNOTSUPP; >> +#else >> + return 0; >> +#endif >> } > > This doesn't look right - if absence of a hook results in -EOPNOTSUPP, so should > VMTRACE=n do. (There's no practical effect from this though, as - perhaps wrongly - > neither caller checks the return value.) It might be a time to make it void() - what do you think? > >> --- a/xen/common/memory.c >> +++ b/xen/common/memory.c >> @@ -1155,8 +1155,10 @@ static unsigned int resource_max_frames(const struct domain *d, >> case XENMEM_resource_ioreq_server: >> return ioreq_server_max_frames(d); >> >> +#ifdef CONFIG_VMTRACE >> case XENMEM_resource_vmtrace_buf: >> return d->vmtrace_size >> PAGE_SHIFT; >> +#endif >> >> default: >> return 0; >> @@ -1198,6 +1200,7 @@ static int acquire_ioreq_server(struct domain *d, >> #endif >> } >> >> +#ifdef CONFIG_VMTRACE >> static int acquire_vmtrace_buf( >> struct domain *d, unsigned int id, unsigned int frame, >> unsigned int nr_frames, xen_pfn_t mfn_list[]) >> @@ -1220,6 +1223,7 @@ static int acquire_vmtrace_buf( >> >> return nr_frames; >> } >> +#endif >> >> /* >> * Returns -errno on error, or positive in the range [1, nr_frames] on >> @@ -1238,8 +1242,10 @@ static int _acquire_resource( >> case XENMEM_resource_ioreq_server: >> return acquire_ioreq_server(d, id, frame, nr_frames, mfn_list); >> >> +#ifdef CONFIG_VMTRACE >> case XENMEM_resource_vmtrace_buf: >> return acquire_vmtrace_buf(d, id, frame, nr_frames, mfn_list); >> +#endif >> >> default: >> ASSERT_UNREACHABLE(); > > Without the intention to ask for a change right in this patch, this is a little > awkward: resource_max_frames() returning 0 results in acquire_resource() to > return -EINVAL, when with VMTRACE=n for XENMEM_resource_vmtrace_buf it imo > better would be -EOPNOTSUPP. -- Best regards, -grygorii From xen-devel-bounces@lists.xenproject.org Thu Nov 13 12:53:45 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 12:53:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161330.1489302 (Exim 4.92) (envelope-from ) id 1vJWpd-0004lK-68; Thu, 13 Nov 2025 12:53:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161330.1489302; Thu, 13 Nov 2025 12:53:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJWpd-0004lD-3Z; Thu, 13 Nov 2025 12:53:45 +0000 Received: by outflank-mailman (input) for mailman id 1161330; Thu, 13 Nov 2025 12:53:44 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJWpc-0004C2-C4 for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 12:53:44 +0000 Received: from mail-ed1-x530.google.com (mail-ed1-x530.google.com [2a00:1450:4864:20::530]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id c8a400b4-c08f-11f0-980a-7dc792cee155; Thu, 13 Nov 2025 13:53:42 +0100 (CET) Received: by mail-ed1-x530.google.com with SMTP id 4fb4d7f45d1cf-64074f01a6eso1376613a12.2 for ; Thu, 13 Nov 2025 04:53:42 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 13 Nov 2025 04:53:42 -0800 (PST) Message-ID: Date: Thu, 13 Nov 2025 13:53:40 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/3] x86/EFI: replace ebmalloc() To: Marek Marczykowski Cc: "xen-devel@lists.xenproject.org" , Daniel Smith , Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <452fdf1f-646a-4bb1-83ea-ac4c998a096b@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.11.2025 13:40, Marek Marczykowski wrote: > On Thu, Nov 13, 2025 at 12:09:37PM +0100, Jan Beulich wrote: >> Use the new brk_alloc() instead, with ebmalloc() merely being a thin >> wrapper. >> >> Signed-off-by: Jan Beulich >> --- >> I'm not quite certain whether we ought to permit non-page-granular >> reservations. The in-memory image being somewhat larger due to possibly >> excessive padding isn't really a big problem, I think. > > My grep says ebmalloc is used in just two places: > 1. For efi_memmap (via efi_arch_allocate_mmap_buffer()) > 2. For various cmdline options and module names (via aplace_string()) > > The second one is probably undesirable to allocate full page for each > one. On the other hand, the current approach (putting small allocations > at the same page as an earlier page-aligned one) also has its issues - > see comments on 3/3 patch. Imo if such sharing of a page is unwanted, then it's the side caring about the non-sharing which ought to request an exact multiple of pages. Wasting space due to doing this in the BRK implementation is undesirable. Jan From xen-devel-bounces@lists.xenproject.org Thu Nov 13 12:58:15 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 12:58:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161346.1489312 (Exim 4.92) (envelope-from ) id 1vJWtu-0005SW-Lj; Thu, 13 Nov 2025 12:58:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161346.1489312; Thu, 13 Nov 2025 12:58:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJWtu-0005SP-J0; Thu, 13 Nov 2025 12:58:10 +0000 Received: by outflank-mailman (input) for mailman id 1161346; Thu, 13 Nov 2025 12:58:08 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJWts-0005SJ-Tw for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 12:58:08 +0000 Received: from mail-ej1-x635.google.com (mail-ej1-x635.google.com [2a00:1450:4864:20::635]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 6612f71d-c090-11f0-980a-7dc792cee155; Thu, 13 Nov 2025 13:58:07 +0100 (CET) Received: by mail-ej1-x635.google.com with SMTP id a640c23a62f3a-b72cbc24637so135977766b.0 for ; Thu, 13 Nov 2025 04:58:07 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 13 Nov 2025 04:58:06 -0800 (PST) Message-ID: <71334f75-d50b-43f4-909b-a27b288ea1aa@suse.com> Date: Thu, 13 Nov 2025 13:58:04 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH v2] xen: make VMTRACE support optional To: Grygorii Strashko Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Tamas K Lengyel , Alexandru Isaila , Petre Pircalabu , Teddy Astie , Penny Zheng , "xen-devel@lists.xenproject.org" References: <20251112202442.3879997-1-grygorii_strashko@epam.com> <9c4294ec-906d-4607-8f7d-b5b1bb7e74f2@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <9c4294ec-906d-4607-8f7d-b5b1bb7e74f2@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.11.2025 13:53, Grygorii Strashko wrote: > On 13.11.25 10:36, Jan Beulich wrote: >> On 12.11.2025 21:24, Grygorii Strashko wrote: >>> --- a/xen/arch/x86/hvm/vmx/vmcs.c >>> +++ b/xen/arch/x86/hvm/vmx/vmcs.c >>> @@ -307,6 +307,7 @@ static int vmx_init_vmcs_config(bool bsp) >>> rdmsrl(MSR_IA32_VMX_MISC, _vmx_misc_cap); >>> >>> /* Check whether IPT is supported in VMX operation. */ >>> +#ifdef CONFIG_VMTRACE >>> if ( bsp ) >>> vmtrace_available = cpu_has_proc_trace && >>> (_vmx_misc_cap & VMX_MISC_PROC_TRACE); >>> @@ -317,6 +318,7 @@ static int vmx_init_vmcs_config(bool bsp) >>> smp_processor_id()); >>> return -EINVAL; >>> } >>> +#endif >> >> Initially I was inclined to ask for use of IS_ENABLED() here, but that wouldn't >> work since vmtrace_available isn't an lvalue when VMTRACE=n. Hence why generally >> I think it is better to check the particular identifier in such cases, rather >> than the original CONFIG_* (i.e. "#ifndef vmtrace_available" here). I'm not >> going to insist though, as I expect opinions may differ on this matter. > > Yep. assignment required ifdef wrapping. > > "#ifndef vmtrace_available" will not work out of the box as there are > > "if (vmtrace_available)" in code. So, can't just "not define"/undef "vmtrace_available". I meant this just for the case here, though. Elsewhere you want to stick to checking CONFIG_VMTRACE. >>> @@ -735,6 +737,7 @@ static inline bool altp2m_vcpu_emulate_ve(struct vcpu *v) >>> bool altp2m_vcpu_emulate_ve(struct vcpu *v); >>> #endif /* CONFIG_ALTP2M */ >>> >>> +#ifdef CONFIG_VMTRACE >>> static inline int hvm_vmtrace_control(struct vcpu *v, bool enable, bool reset) >>> { >>> if ( hvm_funcs.vmtrace_control ) >>> @@ -769,13 +772,20 @@ static inline int hvm_vmtrace_get_option( >>> >>> return -EOPNOTSUPP; >>> } >>> +#else >>> +int hvm_vmtrace_output_position(struct vcpu *v, uint64_t *pos); >>> +#endif >> >> There not being any definition for this declaration (regardless of configuration), >> a comment might have been warranted here. > > /* Function declaration(s) here are used without definition(s) to make compiler > happy when VMTRACE=n while all call sites expected to be protected by ifdefs or > IS_ENABLED() guards, so compiler DCE will eliminate unused code and overall > build succeeds */ > > a little bit long :( ? Yes. I'm sure you can shorten this quite a bit. >> Furthermore, can't the stub further down >> in the file now go away (addressing a Misra concern of it now being unused, as >> HVM=n implies VMTRACE=n)? Possibly this applies to a few other stubs there as >> well? > > You are talking about HVM=n stubs here, right? Yes. Are there any others there? >>> static inline int hvm_vmtrace_reset(struct vcpu *v) >>> { >>> +#ifdef CONFIG_VMTRACE >>> if ( hvm_funcs.vmtrace_reset ) >>> return alternative_call(hvm_funcs.vmtrace_reset, v); >>> >>> return -EOPNOTSUPP; >>> +#else >>> + return 0; >>> +#endif >>> } >> >> This doesn't look right - if absence of a hook results in -EOPNOTSUPP, so should >> VMTRACE=n do. (There's no practical effect from this though, as - perhaps wrongly - >> neither caller checks the return value.) > > It might be a time to make it void() - what do you think? Possibly (in a separate patch). I didn't check the call sites, though, i.e. I can't exclude that the return value ought to be checked there instead. Jan From xen-devel-bounces@lists.xenproject.org Thu Nov 13 12:59:37 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 12:59:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161359.1489322 (Exim 4.92) (envelope-from ) id 1vJWvI-00061p-46; Thu, 13 Nov 2025 12:59:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161359.1489322; Thu, 13 Nov 2025 12:59:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJWvI-00061i-04; Thu, 13 Nov 2025 12:59:36 +0000 Received: by outflank-mailman (input) for mailman id 1161359; Thu, 13 Nov 2025 12:59:34 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJWvF-00061b-T5 for xen-devel@lists.xenproject.org; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="LdgHJWPD6TaL8UTc" Content-Disposition: inline In-Reply-To: <4391d560-870e-4010-b3bb-dee2935f9732@suse.com> --LdgHJWPD6TaL8UTc Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Thu, 13 Nov 2025 13:59:26 +0100 From: Marek Marczykowski To: Jan Beulich Cc: "xen-devel@lists.xenproject.org" , Daniel Smith , Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , Roger Pau =?utf-8?B?TW9ubsOp?= Subject: Re: [PATCH 2/3] x86/EFI: replace ebmalloc() On Thu, Nov 13, 2025 at 01:46:20PM +0100, Jan Beulich wrote: > On 13.11.2025 13:40, Marek Marczykowski wrote: > > On Thu, Nov 13, 2025 at 12:09:37PM +0100, Jan Beulich wrote: > >> --- a/xen/arch/x86/include/asm/brk.h > >> +++ b/xen/arch/x86/include/asm/brk.h > >> @@ -2,6 +2,10 @@ > >> =20 > >> #include > >> =20 > >> +#define DEFINE_BRK(var, size) \ > >> + static char __section(".bss..brk.page_aligned") __aligned(PAGE_SI= ZE) \ > >> + __used var ## _brk_[size] > >=20 > > This chunk belongs to the previous patch I think. >=20 > It could, but it's not used there yet (i.e. would count as dead code). But in the current shape the linker script change in the first patch is unused. IOW, I think adding .bss..brk.page_aligned to the linker script should go together with DEFINE_BRK. --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --LdgHJWPD6TaL8UTc Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmkV1i4ACgkQ24/THMrX 1yyFqwf+Kh372q/KfYXGkzUZ8yM4LrARjhaX3vcyk7ZY+p6YmvXo4HXs4mqClfVp SkN7s2mx6Vx94ErvU+Rzu4uejuxcfePNiazQiYQzeeFrH/WJw8Jtz7sPLMVdS1tz PpMFW8ZVEwGubj5ImhNoXTW4eCWLM+hH8KuJWjehtvDwN5vKe5ErTJff/t9pA5AV 7yDtrUJUgULfhWlhE/sWiskQwmdOSsZx2VkvzI/Gsn7B8sFo80eo+SViSjOPKCWJ Q73u3ls8zO5/AgymZHu4tq+fn4glIFFlWSmU8iKiTv0yatIvAlOBJOaKQy7XkP/K hoME354nDqPC4W6HiFup/nqbUTjPhg== =M7Ny -----END PGP SIGNATURE----- --LdgHJWPD6TaL8UTc-- From xen-devel-bounces@lists.xenproject.org Thu Nov 13 13:01:28 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 13:01:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161370.1489332 (Exim 4.92) (envelope-from ) id 1vJWx0-0007Ym-D6; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="/UcRZ6SxJa3EZ8K7" Content-Disposition: inline In-Reply-To: <0ed20aaa-2625-4555-8fab-0e15fea5e71c@suse.com> --/UcRZ6SxJa3EZ8K7 Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Thu, 13 Nov 2025 14:01:10 +0100 From: Marek Marczykowski To: Jan Beulich Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , Roger Pau =?utf-8?B?TW9ubsOp?= Subject: Re: [PATCH 3/3] xhci-dbc: use brk_alloc() On Thu, Nov 13, 2025 at 01:50:28PM +0100, Jan Beulich wrote: > On 13.11.2025 13:39, Marek Marczykowski wrote: > > On Thu, Nov 13, 2025 at 12:10:16PM +0100, Jan Beulich wrote: > >> --- a/xen/drivers/char/xhci-dbc.c > >> +++ b/xen/drivers/char/xhci-dbc.c > >> @@ -27,6 +27,8 @@ > >> #include > >> #include > >> #include > >> + > >> +#include > >> #include > >> #include > >> #include > >> @@ -1321,7 +1323,7 @@ static struct uart_driver dbc_uart_drive > >> }; > >> =20 > >> /* Those are accessed via DMA. */ > >> -struct dbc_dma_bufs { > >> +struct __aligned(PAGE_SIZE) dbc_dma_bufs { > >> struct xhci_trb evt_trb[DBC_TRB_RING_CAP]; > >> struct xhci_trb out_trb[DBC_TRB_RING_CAP]; > >> struct xhci_trb in_trb[DBC_TRB_RING_CAP]; > >> @@ -1335,8 +1337,7 @@ struct dbc_dma_bufs { > >> * DMA-reachable by the USB controller. > >> */ > >> }; > >> -static struct dbc_dma_bufs __section(".bss.page_aligned") __aligned(P= AGE_SIZE) > >> - dbc_dma_bufs; > >> +DEFINE_BRK(xhci, sizeof(struct dbc_dma_bufs)); > >=20 > > I think with this change (or rather with using brk_alloc() below), the > > structure wants to be padded up to the page size, to avoid putting > > anything else on the same page (see comment just outside of context > > above). >=20 > Are you sure? My understanding is that sizeof(xyz) is always evenly divis= ible by > alignof(xyz). Hence such padding doesn't need making explicit. (And yes, = I did > see that comment while making the change.) Ok, then indeed the added (or rather moved) __aligned(PAGE_SIZE) is enough. Reviewed-by: Marek Marczykowski-G=C3=B3recki > >> @@ -1413,24 +1414,33 @@ void __init xhci_dbc_uart_init(void) > >> { > >> struct dbc_uart *uart =3D &dbc_uart; > >> struct dbc *dbc =3D &uart->dbc; > >> + struct dbc_dma_bufs *dma_bufs; > >> =20 > >> if ( !dbc->enable ) > >> return; > >> =20 > >> - dbc->dbc_ctx =3D &dbc_dma_bufs.ctx; > >> - dbc->dbc_erst =3D &dbc_dma_bufs.erst; > >> - dbc->dbc_ering.trb =3D dbc_dma_bufs.evt_trb; > >> - dbc->dbc_oring.trb =3D dbc_dma_bufs.out_trb; > >> - dbc->dbc_iring.trb =3D dbc_dma_bufs.in_trb; > >> - dbc->dbc_owork.buf =3D dbc_dma_bufs.out_wrk_buf; > >> - dbc->dbc_iwork.buf =3D dbc_dma_bufs.in_wrk_buf; > >> - dbc->dbc_str =3D dbc_dma_bufs.str_buf; > >> + dma_bufs =3D brk_alloc(sizeof(*dma_bufs)); > >> + if ( !dma_bufs ) > >> + { > >> + dbc->enable =3D false; > >> + printk(XENLOG_ERR "XHCI: not enough BRK space available\n"); > >> + return; > >> + } > >> + > >> + dbc->dbc_ctx =3D &dma_bufs->ctx; > >> + dbc->dbc_erst =3D &dma_bufs->erst; > >> + dbc->dbc_ering.trb =3D dma_bufs->evt_trb; > >> + dbc->dbc_oring.trb =3D dma_bufs->out_trb; > >> + dbc->dbc_iring.trb =3D dma_bufs->in_trb; > >> + dbc->dbc_owork.buf =3D dma_bufs->out_wrk_buf; > >> + dbc->dbc_iwork.buf =3D dma_bufs->in_wrk_buf; > >> + dbc->dbc_str =3D dma_bufs->str_buf; > >> =20 > >> if ( dbc_open(dbc) ) > >> { > >> iommu_add_extra_reserved_device_memory( > >> - PFN_DOWN(virt_to_maddr(&dbc_dma_bufs)), > >> - PFN_UP(sizeof(dbc_dma_bufs)), > >> + PFN_DOWN(virt_to_maddr(dma_bufs)), > >> + PFN_DOWN(sizeof(*dma_bufs)), > >=20 > > Is that really correct? But with padding (see earlier comment) it > > shouldn't really matter. >=20 > I think this is addressed by the reply further up as well. >=20 > Jan --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --/UcRZ6SxJa3EZ8K7 Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmkV1pcACgkQ24/THMrX 1yz9jQf8C4Zo5l57mM8In2zhZnW0/jRU86xRQbuGFli+O7MbaPJQ28RuRmEU/ION cMhUCgLeaTnR+9ebJzfwhN09WMljB8VvqX/tcNjOIGhO8NLDGbSKzI4KTCbuXfiv BiFB/HM+9nFakHBfFQOrRTz4PTU/Y4fMbBwpVa1cKkbv9qfMIWX/72mVIH5mjZ1B gbVu9gYlYFVVisCz+uJcj0cyBc5l3YFb/ZuFU50/0xr/m3CfCc6rRDTGz4jTE6bf fEHDVysIrjoX4wtHycCO7oPDTwP3ixP4ekKRiLzaAYUrUiIB2DRW0j1gsdIQiiHv FGvnh8E3Dtk18mcqmHBujDPy9aUuRg== =6rLb -----END PGP SIGNATURE----- --/UcRZ6SxJa3EZ8K7-- From xen-devel-bounces@lists.xenproject.org Thu Nov 13 13:01:50 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 13:01:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161374.1489342 (Exim 4.92) (envelope-from ) id 1vJWxS-0007yF-LA; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="8WlVeWfNBAhEVcW2" Content-Disposition: inline In-Reply-To: --8WlVeWfNBAhEVcW2 Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Thu, 13 Nov 2025 14:01:44 +0100 From: Marek Marczykowski To: Jan Beulich Cc: "xen-devel@lists.xenproject.org" , Daniel Smith , Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , Roger Pau =?utf-8?B?TW9ubsOp?= Subject: Re: [PATCH 2/3] x86/EFI: replace ebmalloc() On Thu, Nov 13, 2025 at 01:53:40PM +0100, Jan Beulich wrote: > On 13.11.2025 13:40, Marek Marczykowski wrote: > > On Thu, Nov 13, 2025 at 12:09:37PM +0100, Jan Beulich wrote: > >> Use the new brk_alloc() instead, with ebmalloc() merely being a thin > >> wrapper. > >> > >> Signed-off-by: Jan Beulich > >> --- > >> I'm not quite certain whether we ought to permit non-page-granular > >> reservations. The in-memory image being somewhat larger due to possibly > >> excessive padding isn't really a big problem, I think. > >=20 > > My grep says ebmalloc is used in just two places: > > 1. For efi_memmap (via efi_arch_allocate_mmap_buffer()) > > 2. For various cmdline options and module names (via aplace_string()) > >=20 > > The second one is probably undesirable to allocate full page for each > > one. On the other hand, the current approach (putting small allocations > > at the same page as an earlier page-aligned one) also has its issues - > > see comments on 3/3 patch. >=20 > Imo if such sharing of a page is unwanted, then it's the side caring about > the non-sharing which ought to request an exact multiple of pages. Wasting > space due to doing this in the BRK implementation is undesirable. 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In addition to efficiency, this causes the tarball to use root/root ownership, rather than leak whomever produced the tarball. Signed-off-by: Andrew Cooper --- CC: Jan Beulich I've made 4.20.2 using this, and the results look to be correct, and match 4.20.1 other than the ownership adjustment. For 4.19 and earlier, I'm considering just passing --owner and --group to the final tar invocation. Thoughts? --- tools/misc/mktarball | 17 +++++------------ 1 file changed, 5 insertions(+), 12 deletions(-) diff --git a/tools/misc/mktarball b/tools/misc/mktarball index 7f9b61da4368..2f574f9bf0ee 100755 --- a/tools/misc/mktarball +++ b/tools/misc/mktarball @@ -5,14 +5,6 @@ # Takes 2 arguments, the path to the dist directory and the version set -ex -function git_archive_into { - mkdir -p "$2" - - git --git-dir="$1"/.git \ - archive --format=tar HEAD | \ - tar Cxf "$2" - -} - if [[ -z "$1" || -z "$2" ]] ; then echo "usage: $0 path-to-XEN_ROOT xen-version" exit 1 @@ -21,14 +13,15 @@ fi xen_root="$1" desc="$2" -tdir="$xen_root/dist/tmp.src-tarball" +tdir="$xen_root/dist" -rm -rf $tdir +rm -f $tdir/xen-$desc.tar* mkdir -p $tdir -git_archive_into $xen_root $tdir/xen-$desc +git --git-dir="$xen_root/.git" archive --format=tar HEAD --prefix=xen-$desc/ \ + >"$tdir/xen-$desc.tar" -GZIP=-9v tar cz -f $xen_root/dist/xen-$desc.tar.gz -C $tdir xen-$desc +gzip -9k "$tdir/xen-$desc.tar" echo "Source tarball in $xen_root/dist/xen-$desc.tar.gz" base-commit: 03299bb3ec817f47a608dc6080afc32453627fb4 -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu Nov 13 13:02:49 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 13:02:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161406.1489363 (Exim 4.92) (envelope-from ) id 1vJWyP-0000wb-9c; Thu, 13 Nov 2025 13:02:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161406.1489363; Thu, 13 Nov 2025 13:02:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJWyP-0000wU-5K; Thu, 13 Nov 2025 13:02:49 +0000 Received: by outflank-mailman (input) for mailman id 1161406; Thu, 13 Nov 2025 13:02:48 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJWyO-0007t1-9R for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 13:02:48 +0000 Received: from mail-ej1-x62b.google.com (mail-ej1-x62b.google.com [2a00:1450:4864:20::62b]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 0d5cee99-c091-11f0-9d18-b5c5bf9af7f9; Thu, 13 Nov 2025 14:02:47 +0100 (CET) Received: by mail-ej1-x62b.google.com with SMTP id a640c23a62f3a-b72db05e50fso137144966b.0 for ; Thu, 13 Nov 2025 05:02:47 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 13 Nov 2025 05:02:46 -0800 (PST) Message-ID: <70c36cf7-de4e-418a-921c-fe1268178194@suse.com> Date: Thu, 13 Nov 2025 14:02:44 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v7] xen: Strip xen.efi by default To: Frediano Ziglio Cc: Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Frediano Ziglio , Demi Marie Obenour , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , Stewart Hildebrand , xen-devel@lists.xenproject.org References: <20251113124945.25343-1-frediano.ziglio@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251113124945.25343-1-frediano.ziglio@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.11.2025 13:49, Frediano Ziglio wrote: > --- a/CHANGELOG.md > +++ b/CHANGELOG.md > @@ -65,6 +65,9 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) > for hypervisor mode. > > ### Removed > + - The install-time environment variable INSTALL_EFI_STRIP is no longer > + supported, xen.efi will is now always being stripped. > + > - On x86: > - GNTTABOP_cache_flush: it's unused on x86 and the implementation is > broken. That's the wrong "Removed" section, though. Moving it where you put it would be part of backporting (to 4.21) effort. Plus it should go under "On x86". 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>> >> +static inline bool vcpu_is_hcall_compat(const struct vcpu *v) > > Does the vcpu_ prefix really buy us much here? The per-vCPU aspect is already > conveyed by the function parameter, I'd say. Such annotation makes it clear that operation is performed on struct vcpu object, which improves readability and code analyze (might help also if somebody will ever try split sched.h). For example: is_hcall_compat(curr) in the code doesn't say too much - need parse code (or have modern editor which can parse and highlight parameter type for us, still need some mouse manipulations:)) vcpu_is_hcall_compat(curr) - is kinda absolutely clear from the first look. > > Actually - is a parameter in fact needed? It's always current afaics. (Then, > if the parameter was to stay for some reason, it would want naming "curr".) "curr" it be > >> +{ >> +#ifdef CONFIG_COMPAT >> + return v->hcall_compat; > > As long as you don't remove the struct field, ... It is already under #ifdef CONFIG_COMPAT /* A hypercall is using the compat ABI? */ bool hcall_compat; /* Physical runstate area registered via compat ABI? */ bool runstate_guest_area_compat; #endif which is the main reason for vcpu_is_hcall_compat() introduction. > >> +#else >> + return false; >> +#endif /* CONFIG_COMPAT */ > > ... why not > > return IS_ENABLED(CONFIG_COMPAT) && v->hcall_compat; -- Best regards, -grygorii From xen-devel-bounces@lists.xenproject.org Thu Nov 13 13:10:28 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 13:10:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161434.1489382 (Exim 4.92) (envelope-from ) id 1vJX5f-0003lM-5l; Thu, 13 Nov 2025 13:10:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161434.1489382; Thu, 13 Nov 2025 13:10:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJX5f-0003lF-39; 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charset="UTF-8" On Thu, 13 Nov 2025 at 13:02, Jan Beulich wrote: > > On 13.11.2025 13:49, Frediano Ziglio wrote: > > --- a/CHANGELOG.md > > +++ b/CHANGELOG.md > > @@ -65,6 +65,9 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) > > for hypervisor mode. > > > > ### Removed > > + - The install-time environment variable INSTALL_EFI_STRIP is no longer > > + supported, xen.efi will is now always being stripped. > > + > > - On x86: > > - GNTTABOP_cache_flush: it's unused on x86 and the implementation is > > broken. > > That's the wrong "Removed" section, though. Moving it where you put it would > be part of backporting (to 4.21) effort. > I think there was discussion that should go to 4.21 as not stripping cause issues with some firmware. Should I move to 4.22 then ? > Plus it should go under "On x86". > > Jan Frediano From xen-devel-bounces@lists.xenproject.org Thu Nov 13 13:12:52 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 13:12:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161444.1489392 (Exim 4.92) (envelope-from ) id 1vJX86-0004cA-H0; Thu, 13 Nov 2025 13:12:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161444.1489392; Thu, 13 Nov 2025 13:12:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJX86-0004c3-EM; Thu, 13 Nov 2025 13:12:50 +0000 Received: by outflank-mailman (input) for mailman id 1161444; Thu, 13 Nov 2025 13:12:49 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJX85-0004bx-SJ for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 13:12:49 +0000 Received: from mail-ej1-x631.google.com (mail-ej1-x631.google.com [2a00:1450:4864:20::631]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 73b20b2d-c092-11f0-9d18-b5c5bf9af7f9; Thu, 13 Nov 2025 14:12:48 +0100 (CET) Received: by mail-ej1-x631.google.com with SMTP id a640c23a62f3a-b735487129fso97649066b.0 for ; Thu, 13 Nov 2025 05:12:48 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 13 Nov 2025 05:12:48 -0800 (PST) Message-ID: Date: Thu, 13 Nov 2025 14:12:46 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH for-4.20] mktarball: Drop double-processing of the archive To: Andrew Cooper References: <20251113130154.220139-1-andrew.cooper3@citrix.com> Content-Language: en-US Cc: Xen-devel From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251113130154.220139-1-andrew.cooper3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.11.2025 14:01, Andrew Cooper wrote: > This is a partial backport of commit 63ebd0e9649e ("releases: use newer > compression methods for tarballs"), but keeping gz as the only compression > method. > > In addition to efficiency, this causes the tarball to use root/root ownership, > rather than leak whomever produced the tarball. I don't understand this part. Isn't the ownership whatever "git archive" reports? I have to admit though ... > --- a/tools/misc/mktarball > +++ b/tools/misc/mktarball > @@ -5,14 +5,6 @@ > # Takes 2 arguments, the path to the dist directory and the version > set -ex > > -function git_archive_into { > - mkdir -p "$2" > - > - git --git-dir="$1"/.git \ > - archive --format=tar HEAD | \ > - tar Cxf "$2" - ... that I'm unaware of what the C here does. It can't be the same as -C, and the --help output of the GNU tar that I checked doesn't mention anything else at all. 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Thu, 13 Nov 2025 05:16:02 -0800 (PST) Message-ID: Date: Thu, 13 Nov 2025 14:16:00 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v7] xen: Strip xen.efi by default To: Frediano Ziglio Cc: Frediano Ziglio , Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Demi Marie Obenour , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , Stewart Hildebrand , xen-devel@lists.xenproject.org References: <20251113124945.25343-1-frediano.ziglio@citrix.com> <70c36cf7-de4e-418a-921c-fe1268178194@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.11.2025 14:10, Frediano Ziglio wrote: > On Thu, 13 Nov 2025 at 13:02, Jan Beulich wrote: >> >> On 13.11.2025 13:49, Frediano Ziglio wrote: >>> --- a/CHANGELOG.md >>> +++ b/CHANGELOG.md >>> @@ -65,6 +65,9 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) >>> for hypervisor mode. >>> >>> ### Removed >>> + - The install-time environment variable INSTALL_EFI_STRIP is no longer >>> + supported, xen.efi will is now always being stripped. >>> + >>> - On x86: >>> - GNTTABOP_cache_flush: it's unused on x86 and the implementation is >>> broken. >> >> That's the wrong "Removed" section, though. Moving it where you put it would >> be part of backporting (to 4.21) effort. >> > > I think there was discussion that should go to 4.21 as not stripping > cause issues with some firmware. > Should I move to 4.22 then ? All patches should be against staging, which is 4.22 now. Anything against older branches either needs explicitly tagging as such (e.g. when no staging equivalent exists), or otherwise would need backporting from what went into staging. (The more that at this time of the release cycle I'm not sure this kind of change is still eligible for going onto the release branch. It may well need to wait for 4.21.1 now. But that's [mainly] Oleksii's call, whom you didn't even Cc.) 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> - use xen-syms.efi for new file name, more consistent with ELF. > > Changes since v3: > - update documentation; > - do not remove xen.efi.elf; > - check endbr instruction before generating final target. > > Changes since v4: > - simplify condition check; > - avoid reuse of $@.tmp file. > > Changes since v5: > - avoid creation of temporary file. > > Changes since v6: > - install xen-syms.efi; > - always strip xen.efi; > - restore EFI_LDFLAGS check during rule execution; > - update CHANGELOG.md; > - added xen-syms.efi to .gitignore. > --- > .gitignore | 1 + > CHANGELOG.md | 3 +++ > docs/misc/efi.pandoc | 8 +------- > xen/Kconfig.debug | 9 ++------- > xen/Makefile | 25 +++---------------------- > xen/arch/x86/Makefile | 11 ++++++++--- > 6 files changed, 18 insertions(+), 39 deletions(-) > > diff --git a/.gitignore b/.gitignore > index d83427aba8..213972b65c 100644 > --- a/.gitignore > +++ b/.gitignore > @@ -222,6 +222,7 @@ tools/flask/policy/xenpolicy-* > xen/xen > xen/suppression-list.txt > xen/xen-syms > +xen/xen-syms.efi > xen/xen-syms.map > xen/xen.* > > diff --git a/CHANGELOG.md b/CHANGELOG.md > index c9932a2af0..3bdcc3b47a 100644 > --- a/CHANGELOG.md > +++ b/CHANGELOG.md > @@ -65,6 +65,9 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) > for hypervisor mode. > > ### Removed > + - The install-time environment variable INSTALL_EFI_STRIP is no longer > + supported, xen.efi will is now always being stripped. I'd rephrase this a little.  "... INSTALL_EFI_STRIP no longer exists.  xen.efi is always stripped, while the symbols remain available in xen-syms.efi." Personally, I'd have put this in the Changed section rather than Removed, but both can be adjusted together. This bug is on the 4.21 tracking list.  CC'ing Oleksii. ~Andrew From xen-devel-bounces@lists.xenproject.org Thu Nov 13 13:18:58 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 13:18:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161480.1489422 (Exim 4.92) (envelope-from ) id 1vJXE1-0006vC-MO; Thu, 13 Nov 2025 13:18:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161480.1489422; Thu, 13 Nov 2025 13:18:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJXE1-0006v1-J8; Thu, 13 Nov 2025 13:18:57 +0000 Received: by outflank-mailman (input) for mailman id 1161480; Thu, 13 Nov 2025 13:18:56 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJXE0-0006uu-C1 for xen-devel@lists.xenproject.org; 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> > I think this could need commenting on if we really want to put it in this shape. ok. > But why would we retain the has_32bit_shinfo field in the first place when > COMPAT=n? Here I'm not sure. May be other can comment. > >> @@ -4965,6 +4969,7 @@ static int do_altp2m_op( >> #endif /* CONFIG_ALTP2M */ >> } >> >> +#ifdef CONFIG_COMPAT >> DEFINE_XEN_GUEST_HANDLE(compat_hvm_altp2m_op_t); >> >> /* >> @@ -5064,6 +5069,12 @@ static int compat_altp2m_op( >> >> return rc; >> } >> +#else >> +static int compat_altp2m_op(XEN_GUEST_HANDLE_PARAM(void) arg) >> +{ >> + return -EOPNOTSUPP; >> +} >> +#endif /* CONFIG_COMPAT */ > > I'm not in favor of repeating the function "header". Imo such #ifdef-s better > go inside respective functions' bodies. ok. > >> --- a/xen/arch/x86/hvm/hypercall.c >> +++ b/xen/arch/x86/hvm/hypercall.c >> @@ -29,10 +29,12 @@ long hvm_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg) >> return -ENOSYS; >> } >> >> - if ( !vcpu_is_hcall_compat(current) ) >> - rc = do_memory_op(cmd, arg); >> - else >> +#ifdef CONFIG_COMPAT >> + if ( vcpu_is_hcall_compat(current) ) >> rc = compat_memory_op(cmd, arg); >> + else >> +#endif >> + rc = do_memory_op(cmd, arg); > > Why would this be needed when vcpu_is_hcall_compat() already honors CONFIG_COMPAT? > (Same question then applies elsewhere, of course.) This I do not like by myself, but I was not able to find other options :( hypercall-defs.h is autogenerated and it's the only one place where functions declarations like do_x_op() are appeared or disappeared. So build is failing without ifdefs as compiler can't find compat_memory_op() declaration. > >> @@ -171,6 +177,7 @@ int hvm_hypercall(struct cpu_user_regs *regs) >> HVM_DBG_LOG(DBG_LEVEL_HCALL, "hcall%lu(%x, %x, %x, %x, %x)", eax, >> regs->ebx, regs->ecx, regs->edx, regs->esi, regs->edi); >> >> +#ifdef CONFIG_COMPAT >> curr->hcall_compat = true; >> call_handlers_hvm32(eax, regs->eax, regs->ebx, regs->ecx, regs->edx, >> regs->esi, regs->edi); >> @@ -178,6 +185,9 @@ int hvm_hypercall(struct cpu_user_regs *regs) >> >> if ( !curr->hcall_preempted && regs->eax != -ENOSYS ) >> clobber_regs(regs, eax, hvm, 32); >> +#else >> + regs->eax = -EOPNOTSUPP; >> +#endif > > I'm generally against most attempts to use ENOSYS, but here it should be used: > The top-level hypercalls are (effectively) unimplemented in this mode. ok. > >> @@ -208,10 +218,19 @@ enum mc_disposition hvm_do_multicall_call(struct mc_state *state) >> } >> else >> { >> +#ifdef CONFIG_COMPAT >> struct compat_multicall_entry *call = &state->compat_call; >> >> call_handlers_hvm32(call->op, call->result, call->args[0], call->args[1], >> call->args[2], call->args[3], call->args[4]); >> +#else >> + /* >> + * code should never reach here in case !CONFIG_COMPAT as any >> + * 32-bit hypercall should bail out earlier from hvm_hypercall() >> + * with -EOPNOTSUPP >> + */ >> + unreachable(); > > I.e. you rather mean ASSERT_UNREACHABLE()? ok. -- Best regards, -grygorii From xen-devel-bounces@lists.xenproject.org Thu Nov 13 13:19:26 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 13:19:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161490.1489431 (Exim 4.92) (envelope-from ) id 1vJXEU-0007TA-3O; Thu, 13 Nov 2025 13:19:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161490.1489431; Thu, 13 Nov 2025 13:19:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJXEU-0007T3-0p; Thu, 13 Nov 2025 13:19:26 +0000 Received: by outflank-mailman (input) for mailman id 1161490; Thu, 13 Nov 2025 13:19:25 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJXET-0006uu-Mp for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 13:19:25 +0000 Received: from mail-ed1-x529.google.com (mail-ed1-x529.google.com [2a00:1450:4864:20::529]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 5f26e281-c093-11f0-980a-7dc792cee155; Thu, 13 Nov 2025 14:19:23 +0100 (CET) Received: by mail-ed1-x529.google.com with SMTP id 4fb4d7f45d1cf-640b06fa959so1488471a12.3 for ; Thu, 13 Nov 2025 05:19:23 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 13 Nov 2025 05:19:23 -0800 (PST) Message-ID: <3c70553d-adc4-4f84-aa28-399f6f4c1677@suse.com> Date: Thu, 13 Nov 2025 14:19:21 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH 2/5] x86: hvm: compat: introduce vcpu_is_hcall_compat() helper To: Grygorii Strashko Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Alejandro Vallejo , Jason Andryuk , "xen-devel@lists.xenproject.org" References: <20251111175413.3540690-1-grygorii_strashko@epam.com> <20251111175413.3540690-3-grygorii_strashko@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.11.2025 14:07, Grygorii Strashko wrote: > On 13.11.25 14:22, Jan Beulich wrote: >> On 11.11.2025 18:54, Grygorii Strashko wrote: >>> --- a/xen/include/xen/sched.h >>> +++ b/xen/include/xen/sched.h >>> @@ -311,6 +311,15 @@ struct vcpu >>> #endif >>> }; >>> >>> +static inline bool vcpu_is_hcall_compat(const struct vcpu *v) >> >> Does the vcpu_ prefix really buy us much here? The per-vCPU aspect is already >> conveyed by the function parameter, I'd say. > > Such annotation makes it clear that operation is performed on struct vcpu object, > which improves readability and code analyze (might help also if somebody will ever > try split sched.h). > > For example: > > is_hcall_compat(curr) in the code doesn't say too much - need parse code > (or have modern editor which can parse and highlight parameter type for us, > still need some mouse manipulations:)) That's one of the reasons we aim at using consistently named variables. "curr" should be pretty clear to everyone as being "current" latched into a local variable. Plus of course for every function invocation call site context is relevant anyway, when it comes to arguments passed to the function. > vcpu_is_hcall_compat(curr) - is kinda absolutely clear from the first look. > >> >> Actually - is a parameter in fact needed? It's always current afaics. (Then, >> if the parameter was to stay for some reason, it would want naming "curr".) > > "curr" it be My preference would still be is_hcall_compat(void). Jan From xen-devel-bounces@lists.xenproject.org Thu Nov 13 13:23:18 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 13:23:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161510.1489441 (Exim 4.92) (envelope-from ) id 1vJXI7-0001W3-II; Thu, 13 Nov 2025 13:23:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161510.1489441; Thu, 13 Nov 2025 13:23:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJXI7-0001Vw-FJ; Thu, 13 Nov 2025 13:23:11 +0000 Received: by outflank-mailman (input) for mailman id 1161510; Thu, 13 Nov 2025 13:23:10 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJXI6-0001Va-Tn for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 13:23:10 +0000 Received: from mail-ej1-x62f.google.com (mail-ej1-x62f.google.com [2a00:1450:4864:20::62f]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id e5484712-c093-11f0-980a-7dc792cee155; Thu, 13 Nov 2025 14:23:08 +0100 (CET) Received: by mail-ej1-x62f.google.com with SMTP id a640c23a62f3a-b7346565d7cso110884266b.1 for ; Thu, 13 Nov 2025 05:23:08 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 13 Nov 2025 05:23:08 -0800 (PST) Message-ID: Date: Thu, 13 Nov 2025 14:23:06 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH 3/5] x86: hvm: factor out compat code under ifdefs To: Grygorii Strashko Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Alejandro Vallejo , Jason Andryuk , "xen-devel@lists.xenproject.org" , Juergen Gross References: <20251111175413.3540690-1-grygorii_strashko@epam.com> <20251111175413.3540690-4-grygorii_strashko@epam.com> <4e4aa540-514b-458f-8036-7941a0ecf268@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <4e4aa540-514b-458f-8036-7941a0ecf268@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 13.11.2025 14:18, Grygorii Strashko wrote: > On 13.11.25 14:30, Jan Beulich wrote: >> On 11.11.2025 18:54, Grygorii Strashko wrote: >>> --- a/xen/arch/x86/hvm/hypercall.c >>> +++ b/xen/arch/x86/hvm/hypercall.c >>> @@ -29,10 +29,12 @@ long hvm_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg) >>> return -ENOSYS; >>> } >>> >>> - if ( !vcpu_is_hcall_compat(current) ) >>> - rc = do_memory_op(cmd, arg); >>> - else >>> +#ifdef CONFIG_COMPAT >>> + if ( vcpu_is_hcall_compat(current) ) >>> rc = compat_memory_op(cmd, arg); >>> + else >>> +#endif >>> + rc = do_memory_op(cmd, arg); >> >> Why would this be needed when vcpu_is_hcall_compat() already honors CONFIG_COMPAT? >> (Same question then applies elsewhere, of course.) > > This I do not like by myself, but I was not able to find other options :( > > hypercall-defs.h is autogenerated and it's the only one place where functions > declarations like do_x_op() are appeared or disappeared. > So build is failing without ifdefs as compiler can't find compat_memory_op() > declaration. Oh, I see; I hadn't thought of that aspect. I wonder if we wouldn't better take care of that in the machinery there. Cc-ing Jürgen, who did introduce this originally. Maybe he has concrete arguments against us doing so. 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 13.11.2025 13:59, Marek Marczykowski wrote: > On Thu, Nov 13, 2025 at 01:46:20PM +0100, Jan Beulich wrote: >> On 13.11.2025 13:40, Marek Marczykowski wrote: >>> On Thu, Nov 13, 2025 at 12:09:37PM +0100, Jan Beulich wrote: >>>> --- a/xen/arch/x86/include/asm/brk.h >>>> +++ b/xen/arch/x86/include/asm/brk.h >>>> @@ -2,6 +2,10 @@ >>>> >>>> #include >>>> >>>> +#define DEFINE_BRK(var, size) \ >>>> + static char __section(".bss..brk.page_aligned") __aligned(PAGE_SIZE) \ >>>> + __used var ## _brk_[size] >>> >>> This chunk belongs to the previous patch I think. >> >> It could, but it's not used there yet (i.e. would count as dead code). > > But in the current shape the linker script change in the first patch is > unused. IOW, I think adding .bss..brk.page_aligned to the linker script > should go together with DEFINE_BRK. Again - could be done that way, but there's no concept of "dead code" in the linker script (afaik at least). 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>>> } >>> >>> +/* Exit UC mode only if all VCPUs agree on MTRR/PAT and are not in no_fill. */ >>> +static bool domain_exit_uc_mode(struct vcpu *v) >>> +{ >>> + struct domain *d = v->domain; >>> + struct vcpu *vs; >> >> const on all three pointer target types. Then, together with the function >> prefix adjustment discussed on the other sub-thread, >> Acked-by: Jan Beulich > > Seeing that the other two patches are ready to go in (again, once the tree is > fully open again), I might as well do these edits while committing. So long as > you agree, of course. Of course I agree and will be infinitely grateful. Thank you. -- Best regards, -grygorii From xen-devel-bounces@lists.xenproject.org Thu Nov 13 13:29:40 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 13:29:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161549.1489471 (Exim 4.92) (envelope-from ) id 1vJXOJ-0003SG-OC; Thu, 13 Nov 2025 13:29:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161549.1489471; Thu, 13 Nov 2025 13:29:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJXOJ-0003S9-LI; Thu, 13 Nov 2025 13:29:35 +0000 Received: by outflank-mailman (input) for mailman id 1161549; Thu, 13 Nov 2025 13:29:33 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJXOH-0003S3-HB for xen-devel@lists.xenproject.org; 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Isn't the ownership whatever "git archive" reports? This is fixing the issue you noticed about internal ownership: xen.org.cvs/oss-xen/release$ tar tf 4.20.1/xen-4.20.1.tar.gz --verbose | head drwxrwxr-x andrew/andrew     0 2025-07-10 12:28 xen-4.20.1/ drwxrwxr-x andrew/andrew     0 2025-07-09 14:57 xen-4.20.1/.github/ drwxrwxr-x andrew/andrew     0 2025-07-09 14:57 xen-4.20.1/.github/workflows/ -rw-rw-r-- andrew/andrew  1362 2025-07-09 14:57 xen-4.20.1/.github/workflows/coverity.yml -rw-rw-r-- andrew/andrew    96 2025-07-09 14:57 xen-4.20.1/.gitarchive-info -rw-rw-r-- andrew/andrew  9668 2025-07-09 14:57 xen-4.20.1/Makefile drwxrwxr-x andrew/andrew     0 2025-07-09 14:57 xen-4.20.1/stubdom/ -rw-rw-r-- andrew/andrew 24220 2025-07-09 14:57 xen-4.20.1/stubdom/Makefile drwxrwxr-x andrew/andrew     0 2025-07-09 14:57 xen-4.20.1/stubdom/grub/ -rw-rw-r-- andrew/andrew  2252 2025-07-09 14:57 xen-4.20.1/stubdom/grub/Makefile xen.org.cvs/oss-xen/release$ tar tf 4.20.2/xen-4.20.2.tar.gz --verbose | head drwxrwxr-x root/root         0 2025-11-13 09:51 xen-4.20.2/ -rw-rw-r-- root/root      4781 2025-11-13 09:51 xen-4.20.2/.cirrus.yml -rw-rw-r-- root/root        97 2025-11-13 09:51 xen-4.20.2/.gitarchive-info -rw-rw-r-- root/root        30 2025-11-13 09:51 xen-4.20.2/.gitattributes drwxrwxr-x root/root         0 2025-11-13 09:51 xen-4.20.2/.github/ drwxrwxr-x root/root         0 2025-11-13 09:51 xen-4.20.2/.github/workflows/ -rw-rw-r-- root/root      1362 2025-11-13 09:51 xen-4.20.2/.github/workflows/coverity.yml -rw-rw-r-- root/root      7035 2025-11-13 09:51 xen-4.20.2/.gitignore -rw-rw-r-- root/root       798 2025-11-13 09:51 xen-4.20.2/.gitlab-ci.yml -rw-rw-r-- root/root     15298 2025-11-13 09:51 xen-4.20.2/CHANGELOG.md > I have to admit though ... > >> --- a/tools/misc/mktarball >> +++ b/tools/misc/mktarball >> @@ -5,14 +5,6 @@ >> # Takes 2 arguments, the path to the dist directory and the version >> set -ex >> >> -function git_archive_into { >> - mkdir -p "$2" >> - >> - git --git-dir="$1"/.git \ >> - archive --format=tar HEAD | \ >> - tar Cxf "$2" - > ... that I'm unaware of what the C here does. It can't be the same as -C, and the > --help output of the GNU tar that I checked doesn't mention anything else at all. It is -C.  tar has dreadful cmdline syntax. An equivalent would be tar -C "$2" xf - ~Andrew From xen-devel-bounces@lists.xenproject.org Thu Nov 13 13:35:03 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 13:35:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161561.1489482 (Exim 4.92) (envelope-from ) id 1vJXTU-0005wA-AC; Thu, 13 Nov 2025 13:34:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161561.1489482; Thu, 13 Nov 2025 13:34:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJXTU-0005w3-7S; Thu, 13 Nov 2025 13:34:56 +0000 Received: by outflank-mailman (input) for mailman id 1161561; Thu, 13 Nov 2025 13:34:55 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJXTT-0005vx-DE for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 13:34:55 +0000 Received: from mail-ed1-x534.google.com (mail-ed1-x534.google.com [2a00:1450:4864:20::534]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 89a2a73d-c095-11f0-9d18-b5c5bf9af7f9; Thu, 13 Nov 2025 14:34:54 +0100 (CET) Received: by mail-ed1-x534.google.com with SMTP id 4fb4d7f45d1cf-64198771a9bso1494749a12.2 for ; Thu, 13 Nov 2025 05:34:54 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 13 Nov 2025 05:34:53 -0800 (PST) Message-ID: Date: Thu, 13 Nov 2025 14:34:50 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH for-4.20] mktarball: Drop double-processing of the archive To: Andrew Cooper Cc: Xen-devel References: <20251113130154.220139-1-andrew.cooper3@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 13.11.2025 14:29, Andrew Cooper wrote: > On 13/11/2025 1:12 pm, Jan Beulich wrote: >> On 13.11.2025 14:01, Andrew Cooper wrote: >>> This is a partial backport of commit 63ebd0e9649e ("releases: use newer >>> compression methods for tarballs"), but keeping gz as the only compression >>> method. >>> >>> In addition to efficiency, this causes the tarball to use root/root ownership, >>> rather than leak whomever produced the tarball. >> I don't understand this part. Isn't the ownership whatever "git archive" reports? > > This is fixing the issue you noticed about internal ownership: > > xen.org.cvs/oss-xen/release$ tar tf 4.20.1/xen-4.20.1.tar.gz --verbose | head > drwxrwxr-x andrew/andrew     0 2025-07-10 12:28 xen-4.20.1/ > drwxrwxr-x andrew/andrew     0 2025-07-09 14:57 xen-4.20.1/.github/ > drwxrwxr-x andrew/andrew     0 2025-07-09 14:57 xen-4.20.1/.github/workflows/ > -rw-rw-r-- andrew/andrew  1362 2025-07-09 14:57 xen-4.20.1/.github/workflows/coverity.yml > -rw-rw-r-- andrew/andrew    96 2025-07-09 14:57 xen-4.20.1/.gitarchive-info > -rw-rw-r-- andrew/andrew  9668 2025-07-09 14:57 xen-4.20.1/Makefile > drwxrwxr-x andrew/andrew     0 2025-07-09 14:57 xen-4.20.1/stubdom/ > -rw-rw-r-- andrew/andrew 24220 2025-07-09 14:57 xen-4.20.1/stubdom/Makefile > drwxrwxr-x andrew/andrew     0 2025-07-09 14:57 xen-4.20.1/stubdom/grub/ > -rw-rw-r-- andrew/andrew  2252 2025-07-09 14:57 xen-4.20.1/stubdom/grub/Makefile > > xen.org.cvs/oss-xen/release$ tar tf 4.20.2/xen-4.20.2.tar.gz --verbose | head > drwxrwxr-x root/root         0 2025-11-13 09:51 xen-4.20.2/ > -rw-rw-r-- root/root      4781 2025-11-13 09:51 xen-4.20.2/.cirrus.yml > -rw-rw-r-- root/root        97 2025-11-13 09:51 xen-4.20.2/.gitarchive-info > -rw-rw-r-- root/root        30 2025-11-13 09:51 xen-4.20.2/.gitattributes > drwxrwxr-x root/root         0 2025-11-13 09:51 xen-4.20.2/.github/ > drwxrwxr-x root/root         0 2025-11-13 09:51 xen-4.20.2/.github/workflows/ > -rw-rw-r-- root/root      1362 2025-11-13 09:51 xen-4.20.2/.github/workflows/coverity.yml > -rw-rw-r-- root/root      7035 2025-11-13 09:51 xen-4.20.2/.gitignore > -rw-rw-r-- root/root       798 2025-11-13 09:51 xen-4.20.2/.gitlab-ci.yml > -rw-rw-r-- root/root     15298 2025-11-13 09:51 xen-4.20.2/CHANGELOG.md I guess my reply was ambiguous. I did understand that's the effect, but I wasn't able to tell why such a difference would result. It's all "git archive", before and after the change. >> I have to admit though ... >> >>> --- a/tools/misc/mktarball >>> +++ b/tools/misc/mktarball >>> @@ -5,14 +5,6 @@ >>> # Takes 2 arguments, the path to the dist directory and the version >>> set -ex >>> >>> -function git_archive_into { >>> - mkdir -p "$2" >>> - >>> - git --git-dir="$1"/.git \ >>> - archive --format=tar HEAD | \ >>> - tar Cxf "$2" - >> ... that I'm unaware of what the C here does. It can't be the same as -C, and the >> --help output of the GNU tar that I checked doesn't mention anything else at all. > > It is -C.  tar has dreadful cmdline syntax. > > An equivalent would be tar -C "$2" xf - Oh, wow. I would never have thought of writing that as Cxf. Jan From xen-devel-bounces@lists.xenproject.org Thu Nov 13 13:43:16 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 13:43:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161573.1489493 (Exim 4.92) (envelope-from ) id 1vJXbT-0008C8-4J; Thu, 13 Nov 2025 13:43:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161573.1489493; Thu, 13 Nov 2025 13:43:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJXbS-0008C1-W1; Thu, 13 Nov 2025 13:43:10 +0000 Received: by outflank-mailman (input) for mailman id 1161573; Thu, 13 Nov 2025 13:43:09 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJXbR-0008Bv-LJ for xen-devel@lists.xenproject.org; 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Isn't the ownership whatever "git archive" reports? >> This is fixing the issue you noticed about internal ownership: >> >> xen.org.cvs/oss-xen/release$ tar tf 4.20.1/xen-4.20.1.tar.gz --verbose | head >> drwxrwxr-x andrew/andrew     0 2025-07-10 12:28 xen-4.20.1/ >> drwxrwxr-x andrew/andrew     0 2025-07-09 14:57 xen-4.20.1/.github/ >> drwxrwxr-x andrew/andrew     0 2025-07-09 14:57 xen-4.20.1/.github/workflows/ >> -rw-rw-r-- andrew/andrew  1362 2025-07-09 14:57 xen-4.20.1/.github/workflows/coverity.yml >> -rw-rw-r-- andrew/andrew    96 2025-07-09 14:57 xen-4.20.1/.gitarchive-info >> -rw-rw-r-- andrew/andrew  9668 2025-07-09 14:57 xen-4.20.1/Makefile >> drwxrwxr-x andrew/andrew     0 2025-07-09 14:57 xen-4.20.1/stubdom/ >> -rw-rw-r-- andrew/andrew 24220 2025-07-09 14:57 xen-4.20.1/stubdom/Makefile >> drwxrwxr-x andrew/andrew     0 2025-07-09 14:57 xen-4.20.1/stubdom/grub/ >> -rw-rw-r-- andrew/andrew  2252 2025-07-09 14:57 xen-4.20.1/stubdom/grub/Makefile >> >> xen.org.cvs/oss-xen/release$ tar tf 4.20.2/xen-4.20.2.tar.gz --verbose | head >> drwxrwxr-x root/root         0 2025-11-13 09:51 xen-4.20.2/ >> -rw-rw-r-- root/root      4781 2025-11-13 09:51 xen-4.20.2/.cirrus.yml >> -rw-rw-r-- root/root        97 2025-11-13 09:51 xen-4.20.2/.gitarchive-info >> -rw-rw-r-- root/root        30 2025-11-13 09:51 xen-4.20.2/.gitattributes >> drwxrwxr-x root/root         0 2025-11-13 09:51 xen-4.20.2/.github/ >> drwxrwxr-x root/root         0 2025-11-13 09:51 xen-4.20.2/.github/workflows/ >> -rw-rw-r-- root/root      1362 2025-11-13 09:51 xen-4.20.2/.github/workflows/coverity.yml >> -rw-rw-r-- root/root      7035 2025-11-13 09:51 xen-4.20.2/.gitignore >> -rw-rw-r-- root/root       798 2025-11-13 09:51 xen-4.20.2/.gitlab-ci.yml >> -rw-rw-r-- root/root     15298 2025-11-13 09:51 xen-4.20.2/CHANGELOG.md > I guess my reply was ambiguous. I did understand that's the effect, but I > wasn't able to tell why such a difference would result. It's all "git > archive", before and after the change. Ah.  The first git archive does the right thing, but the result gets expanded into the regular filesystem and takes local ownership. Then, nothing is merged, and the result is re-tar'd using: GZIP=-9v tar cz -f $xen_root/dist/xen-$desc.tar.gz -C $tdir xen-$desc which retains local ownership into the resulting archive. For 4.19 and earlier, I propose to add '--owner 0 --group 0' to this tar invocation. ~Andrew From xen-devel-bounces@lists.xenproject.org Thu Nov 13 13:43:50 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 13:43:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161585.1489502 (Exim 4.92) (envelope-from ) id 1vJXc6-0000VO-Eo; Thu, 13 Nov 2025 13:43:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161585.1489502; Thu, 13 Nov 2025 13:43:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJXc6-0000VH-Bt; Thu, 13 Nov 2025 13:43:50 +0000 Received: by outflank-mailman (input) for mailman id 1161585; Thu, 13 Nov 2025 13:43:49 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJXc5-0008Bv-Gr for xen-devel@lists.xenproject.org; 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Thu, 13 Nov 2025 05:43:46 -0800 (PST) MIME-Version: 1.0 References: <20251113124945.25343-1-frediano.ziglio@citrix.com> <5c14f58d-c8bf-4c63-b48a-9af5af88c8f2@citrix.com> In-Reply-To: <5c14f58d-c8bf-4c63-b48a-9af5af88c8f2@citrix.com> From: Frediano Ziglio Date: Thu, 13 Nov 2025 13:43:34 +0000 X-Gm-Features: AWmQ_bm4XTPmiv-DuFRxOgOUcUTZ6wiYadcZiq78O5UQTmK-2wO-LwHb8SkwTvI Message-ID: Subject: Re: [PATCH for-4.21 v7] xen: Strip xen.efi by default To: Andrew Cooper Cc: Frediano Ziglio , xen-devel@lists.xenproject.org, Frediano Ziglio , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Demi Marie Obenour , =?UTF-8?Q?Marek_Marczykowski=2DG=C3=B3recki?= , Stewart Hildebrand , Oleksii Kurochko Content-Type: text/plain; charset="UTF-8" On Thu, 13 Nov 2025 at 13:17, Andrew Cooper wrote: > > On 13/11/2025 12:49 pm, Frediano Ziglio wrote: > > From: Frediano Ziglio > > > > For xen.gz file we strip all symbols and have an additional > > xen-syms.efi file version with all symbols. > > Make xen.efi more coherent stripping all symbols too. > > xen-syms.efi can be used for debugging. > > > > Signed-off-by: Frediano Ziglio > > --- > > Changes since v1: > > - avoid leaving target if some command fails. > > > > Changes since v2: > > - do not convert type but retain PE format; > > - use xen-syms.efi for new file name, more consistent with ELF. > > > > Changes since v3: > > - update documentation; > > - do not remove xen.efi.elf; > > - check endbr instruction before generating final target. > > > > Changes since v4: > > - simplify condition check; > > - avoid reuse of $@.tmp file. > > > > Changes since v5: > > - avoid creation of temporary file. > > > > Changes since v6: > > - install xen-syms.efi; > > - always strip xen.efi; > > - restore EFI_LDFLAGS check during rule execution; > > - update CHANGELOG.md; > > - added xen-syms.efi to .gitignore. > > --- > > .gitignore | 1 + > > CHANGELOG.md | 3 +++ > > docs/misc/efi.pandoc | 8 +------- > > xen/Kconfig.debug | 9 ++------- > > xen/Makefile | 25 +++---------------------- > > xen/arch/x86/Makefile | 11 ++++++++--- > > 6 files changed, 18 insertions(+), 39 deletions(-) > > > > diff --git a/.gitignore b/.gitignore > > index d83427aba8..213972b65c 100644 > > --- a/.gitignore > > +++ b/.gitignore > > @@ -222,6 +222,7 @@ tools/flask/policy/xenpolicy-* > > xen/xen > > xen/suppression-list.txt > > xen/xen-syms > > +xen/xen-syms.efi > > xen/xen-syms.map > > xen/xen.* > > > > diff --git a/CHANGELOG.md b/CHANGELOG.md > > index c9932a2af0..3bdcc3b47a 100644 > > --- a/CHANGELOG.md > > +++ b/CHANGELOG.md > > @@ -65,6 +65,9 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) > > for hypervisor mode. > > > > ### Removed > > + - The install-time environment variable INSTALL_EFI_STRIP is no longer > > + supported, xen.efi will is now always being stripped. > > I'd rephrase this a little. "... INSTALL_EFI_STRIP no longer exists. > xen.efi is always stripped, while the symbols remain available in > xen-syms.efi." > Done > Personally, I'd have put this in the Changed section rather than > Removed, but both can be adjusted together. > Done > This bug is on the 4.21 tracking list. CC'ing Oleksii. > So.. should I leave the CHANGELOG.md change in 4.21 or should I move it to 4.22 ?? > ~Andrew Frediano From xen-devel-bounces@lists.xenproject.org Thu Nov 13 13:45:22 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 13:45:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161598.1489512 (Exim 4.92) (envelope-from ) id 1vJXdZ-0001Ek-Ql; Thu, 13 Nov 2025 13:45:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161598.1489512; Thu, 13 Nov 2025 13:45:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJXdZ-0001Ed-NM; Thu, 13 Nov 2025 13:45:21 +0000 Received: by outflank-mailman (input) for mailman id 1161598; Thu, 13 Nov 2025 13:45:20 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJXdY-0001EX-Ps for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 13:45:20 +0000 Received: from mail-ed1-x530.google.com (mail-ed1-x530.google.com [2a00:1450:4864:20::530]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id fe43f5b5-c096-11f0-9d18-b5c5bf9af7f9; Thu, 13 Nov 2025 14:45:19 +0100 (CET) Received: by mail-ed1-x530.google.com with SMTP id 4fb4d7f45d1cf-64198771a9bso1516569a12.2 for ; Thu, 13 Nov 2025 05:45:19 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 13 Nov 2025 05:45:18 -0800 (PST) Message-ID: Date: Thu, 13 Nov 2025 14:45:17 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH for-4.20] mktarball: Drop double-processing of the archive To: Andrew Cooper Cc: Xen-devel References: <20251113130154.220139-1-andrew.cooper3@citrix.com> <1dc03c2e-772e-40ab-b3a1-7c9d463b7250@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <1dc03c2e-772e-40ab-b3a1-7c9d463b7250@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 13.11.2025 14:42, Andrew Cooper wrote: > On 13/11/2025 1:34 pm, Jan Beulich wrote: >> On 13.11.2025 14:29, Andrew Cooper wrote: >>> On 13/11/2025 1:12 pm, Jan Beulich wrote: >>>> On 13.11.2025 14:01, Andrew Cooper wrote: >>>>> This is a partial backport of commit 63ebd0e9649e ("releases: use newer >>>>> compression methods for tarballs"), but keeping gz as the only compression >>>>> method. >>>>> >>>>> In addition to efficiency, this causes the tarball to use root/root ownership, >>>>> rather than leak whomever produced the tarball. >>>> I don't understand this part. Isn't the ownership whatever "git archive" reports? >>> This is fixing the issue you noticed about internal ownership: >>> >>> xen.org.cvs/oss-xen/release$ tar tf 4.20.1/xen-4.20.1.tar.gz --verbose | head >>> drwxrwxr-x andrew/andrew     0 2025-07-10 12:28 xen-4.20.1/ >>> drwxrwxr-x andrew/andrew     0 2025-07-09 14:57 xen-4.20.1/.github/ >>> drwxrwxr-x andrew/andrew     0 2025-07-09 14:57 xen-4.20.1/.github/workflows/ >>> -rw-rw-r-- andrew/andrew  1362 2025-07-09 14:57 xen-4.20.1/.github/workflows/coverity.yml >>> -rw-rw-r-- andrew/andrew    96 2025-07-09 14:57 xen-4.20.1/.gitarchive-info >>> -rw-rw-r-- andrew/andrew  9668 2025-07-09 14:57 xen-4.20.1/Makefile >>> drwxrwxr-x andrew/andrew     0 2025-07-09 14:57 xen-4.20.1/stubdom/ >>> -rw-rw-r-- andrew/andrew 24220 2025-07-09 14:57 xen-4.20.1/stubdom/Makefile >>> drwxrwxr-x andrew/andrew     0 2025-07-09 14:57 xen-4.20.1/stubdom/grub/ >>> -rw-rw-r-- andrew/andrew  2252 2025-07-09 14:57 xen-4.20.1/stubdom/grub/Makefile >>> >>> xen.org.cvs/oss-xen/release$ tar tf 4.20.2/xen-4.20.2.tar.gz --verbose | head >>> drwxrwxr-x root/root         0 2025-11-13 09:51 xen-4.20.2/ >>> -rw-rw-r-- root/root      4781 2025-11-13 09:51 xen-4.20.2/.cirrus.yml >>> -rw-rw-r-- root/root        97 2025-11-13 09:51 xen-4.20.2/.gitarchive-info >>> -rw-rw-r-- root/root        30 2025-11-13 09:51 xen-4.20.2/.gitattributes >>> drwxrwxr-x root/root         0 2025-11-13 09:51 xen-4.20.2/.github/ >>> drwxrwxr-x root/root         0 2025-11-13 09:51 xen-4.20.2/.github/workflows/ >>> -rw-rw-r-- root/root      1362 2025-11-13 09:51 xen-4.20.2/.github/workflows/coverity.yml >>> -rw-rw-r-- root/root      7035 2025-11-13 09:51 xen-4.20.2/.gitignore >>> -rw-rw-r-- root/root       798 2025-11-13 09:51 xen-4.20.2/.gitlab-ci.yml >>> -rw-rw-r-- root/root     15298 2025-11-13 09:51 xen-4.20.2/CHANGELOG.md >> I guess my reply was ambiguous. I did understand that's the effect, but I >> wasn't able to tell why such a difference would result. It's all "git >> archive", before and after the change. > > Ah.  The first git archive does the right thing, but the result gets > expanded into the regular filesystem and takes local ownership. Oh, I see - because of --no-same-owner being the default for non-root. Acked-by: Jan Beulich Jan > Then, nothing is merged, and the result is re-tar'd using: > > GZIP=-9v tar cz -f $xen_root/dist/xen-$desc.tar.gz -C $tdir xen-$desc > > which retains local ownership into the resulting archive. > > For 4.19 and earlier, I propose to add '--owner 0 --group 0' to this tar > invocation. > > ~Andrew From xen-devel-bounces@lists.xenproject.org Thu Nov 13 13:50:52 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 13:50:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161613.1489522 (Exim 4.92) (envelope-from ) id 1vJXio-0002md-Ca; Thu, 13 Nov 2025 13:50:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161613.1489522; Thu, 13 Nov 2025 13:50:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJXio-0002mW-9J; Thu, 13 Nov 2025 13:50:46 +0000 Received: by outflank-mailman (input) for mailman id 1161613; Thu, 13 Nov 2025 13:50:44 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJXim-0002mQ-FD for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 13:50:44 +0000 Received: from mail-ej1-x632.google.com (mail-ej1-x632.google.com [2a00:1450:4864:20::632]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id bf62823e-c097-11f0-9d18-b5c5bf9af7f9; Thu, 13 Nov 2025 14:50:43 +0100 (CET) Received: by mail-ej1-x632.google.com with SMTP id a640c23a62f3a-b727f452fffso313236566b.1 for ; Thu, 13 Nov 2025 05:50:43 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 13 Nov 2025 05:50:42 -0800 (PST) Message-ID: Date: Thu, 13 Nov 2025 14:50:41 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH 4/5] x86: pvh: allow to disable 32-bit interface support To: Grygorii Strashko Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Alejandro Vallejo , Jason Andryuk , "xen-devel@lists.xenproject.org" References: <20251111175413.3540690-1-grygorii_strashko@epam.com> <20251111175413.3540690-5-grygorii_strashko@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251111175413.3540690-5-grygorii_strashko@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 11.11.2025 18:54, Grygorii Strashko wrote: > --- a/xen/arch/x86/hvm/Kconfig > +++ b/xen/arch/x86/hvm/Kconfig > @@ -2,7 +2,6 @@ menuconfig HVM > bool "HVM support" > depends on !PV_SHIM_EXCLUSIVE > default !PV_SHIM > - select COMPAT > select IOREQ_SERVER > select MEM_ACCESS_ALWAYS_ON > help > @@ -70,4 +69,22 @@ config MEM_PAGING > config MEM_SHARING > bool "Xen memory sharing support (UNSUPPORTED)" if UNSUPPORTED > > +config HVM_COMPAT > + bool "HVM 32-bit interface support on 64-bit Xen" if EXPERT x86 Xen is always 64-bit, so I don't view it necessary to say so explicitly. Imo the whole construct will want to move up, perhaps ahead of HVM_FEP. Jan From xen-devel-bounces@lists.xenproject.org Thu Nov 13 13:52:41 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 13:52:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161624.1489531 (Exim 4.92) (envelope-from ) id 1vJXke-0003bL-Mp; Thu, 13 Nov 2025 13:52:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161624.1489531; Thu, 13 Nov 2025 13:52:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJXke-0003bE-Jy; Thu, 13 Nov 2025 13:52:40 +0000 Received: by outflank-mailman (input) for mailman id 1161624; Thu, 13 Nov 2025 13:52:40 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJXke-0003Zf-At for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 13:52:40 +0000 Received: from mail-ej1-x635.google.com (mail-ej1-x635.google.com [2a00:1450:4864:20::635]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 049ec015-c098-11f0-9d18-b5c5bf9af7f9; Thu, 13 Nov 2025 14:52:39 +0100 (CET) Received: by mail-ej1-x635.google.com with SMTP id a640c23a62f3a-b7277324054so110307166b.0 for ; Thu, 13 Nov 2025 05:52:39 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 13 Nov 2025 05:52:38 -0800 (PST) Message-ID: <77044bac-e343-4c04-ba1f-11446ffeeb36@suse.com> Date: Thu, 13 Nov 2025 14:52:37 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH 5/5] x86: constify has_32bit_shinfo() if !CONFIG_COMPAT To: Grygorii Strashko Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Alejandro Vallejo , Jason Andryuk , "xen-devel@lists.xenproject.org" References: <20251111175413.3540690-1-grygorii_strashko@epam.com> <20251111175413.3540690-6-grygorii_strashko@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20251111175413.3540690-6-grygorii_strashko@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 11.11.2025 18:54, Grygorii Strashko wrote: > From: Grygorii Strashko > > Constify has_32bit_shinfo() if !CONFIG_COMPAT. As already indicated in reply to another patch, drop the field altogether when COMPAT=n, having the macro simply resolve to false in that case? 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Xen 4.20.2 is available from its git repository http://xenbits.xen.org/gitweb/?p=xen.git;a=shortlog;h=refs/heads/stable-4.20 (tag RELEASE-4.20.2) or from the XenProject download page https://xenproject.org/resources/downloads/. We recommend all users of the 4.20 stable series to update to this latest point release. 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Thu, 13 Nov 2025 06:13:39 -0800 (PST) Message-ID: <7573a826-23f3-4924-96da-032e74ae8916@suse.com> Date: Thu, 13 Nov 2025 15:13:37 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 5/7] xen/page_alloc: Pass node to adjust_tot_pages and check it To: Bernhard Kaindl Cc: Alejandro Vallejo , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Tamas K Lengyel , xen-devel@lists.xenproject.org References: <80adbc587f6acf6bae05bf66016ffecb532f8877.1757261045.git.bernhard.kaindl@cloud.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <80adbc587f6acf6bae05bf66016ffecb532f8877.1757261045.git.bernhard.kaindl@cloud.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 07.09.2025 18:15, Bernhard Kaindl wrote: > @@ -2806,7 +2816,8 @@ void free_domheap_pages(struct page_info *pg, unsigned int order) > } > } > > - drop_dom_ref = !domain_adjust_tot_pages(d, -(1 << order)); > + drop_dom_ref = !domain_adjust_tot_pages(d, NUMA_NO_NODE, > + -(1 << order)); As you touch this, can you take the opportunity and switch to using 1L here? Jan From xen-devel-bounces@lists.xenproject.org Thu Nov 13 14:18:50 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 14:18:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161678.1489570 (Exim 4.92) (envelope-from ) id 1vJY9v-0001Lx-6q; Thu, 13 Nov 2025 14:18:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161678.1489570; Thu, 13 Nov 2025 14:18:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJY9v-0001Lq-3r; Thu, 13 Nov 2025 14:18:47 +0000 Received: by outflank-mailman (input) for mailman id 1161678; Thu, 13 Nov 2025 14:18:45 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJY9t-0001Lk-Qn for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 14:18:45 +0000 Received: from mail-ed1-x52f.google.com (mail-ed1-x52f.google.com [2a00:1450:4864:20::52f]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id a442dec9-c09b-11f0-980a-7dc792cee155; Thu, 13 Nov 2025 15:18:35 +0100 (CET) Received: by mail-ed1-x52f.google.com with SMTP id 4fb4d7f45d1cf-641677916b5so1618196a12.0 for ; Thu, 13 Nov 2025 06:18:35 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 13 Nov 2025 06:18:35 -0800 (PST) Message-ID: <0978b00a-3848-4c45-aa64-46756c43bb5b@suse.com> Date: Thu, 13 Nov 2025 15:18:33 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 6/7] xen/page_alloc: Protect claimed memory against other allocations To: Bernhard Kaindl Cc: Alejandro Vallejo , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 07.09.2025 18:15, Bernhard Kaindl wrote: > --- a/xen/common/page_alloc.c > +++ b/xen/common/page_alloc.c > @@ -980,9 +980,19 @@ static struct page_info *get_free_buddy(unsigned int zone_lo, > { > zone = zone_hi; > do { > - /* Check if target node can support the allocation. */ > - if ( !avail[node] || (avail[node][zone] < (1UL << order)) ) > - continue; > + unsigned long request = 1UL << order; > + /* > + * Check if this node is currently suitable for this allocation. > + * 1. It has sufficient memory in the requested zone and the > + * 2. request must fit in the unclaimed memory of the node minus > + * outstanding claims, unless the allocation is made by a domain > + * with sufficient node-claimed memory to cover the allocation. > + */ > + if ( !avail[node] || (avail[node][zone] < request) || > + (insufficient_memory(node, request) && > + (!d || node != d->claim_node || /* a domain with claims */ What if ->claim_node is NUMA_NO_NODE? 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Smith" , Anthony PERARD , Andrew Cooper , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Juergen Gross , Christian Lindig , David Scott , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 07.09.2025 18:15, Bernhard Kaindl wrote: > --- a/xen/common/domain.c > +++ b/xen/common/domain.c > @@ -267,6 +267,35 @@ int get_domain_state(struct xen_domctl_get_domain_state *info, struct domain *d, > return rc; > } > > +/* XEN_DOMCTL_claim_memory: Claim an amount of memory for a domain */ > +int claim_memory(struct domain *d, const struct xen_domctl_claim_memory *uinfo) > +{ > + memory_claim_t claim; > + int rc; > + > + switch ( uinfo->nr_claims ) > + { > + case 0: Nit (style) Indentation (case labels ant indenting the same as the respective opening figure brace). Considering what follows I'm not quite sure though that using switch() is appropriate here. Kind of depends on what the longer-term plans are. > + /* Cancel existing claim. */ > + rc = domain_claim_pages(d, 0, 0); > + break; This effect also wants mentioning in the public header. It's not what I would expect (a no-op). Also, shouldn't NUMA_NO_NODE be passed here? > + case 1: > + /* Only single node claims supported at the moment. */ Isn't the comment misplaced? Comments usually describe what follows, and the "nr_claims == 1" restriction starts already a line earlier. Maybe the comment would best go on the same line as the case label. > + if ( copy_from_guest(&claim, uinfo->claims, 1) ) > + return -EFAULT; > + > + rc = domain_claim_pages(d, claim.node, claim.nr_pages); claim.node needs bounds checking, for nodemask_test() to not overrun the bitmap. > --- a/xen/include/public/domctl.h > +++ b/xen/include/public/domctl.h > @@ -1276,6 +1276,21 @@ struct xen_domctl_get_domain_state { > uint64_t unique_id; /* Unique domain identifier. */ > }; > > +struct xen_memory_claim { > + unsigned int node; /* NUMA node, XC_NUMA_NO_NODE for a host claim */ > + unsigned long nr_pages; /* Number of pages to claim */ Fixed-width types need using here and ... > +}; > +typedef struct xen_memory_claim memory_claim_t; > +DEFINE_XEN_GUEST_HANDLE(memory_claim_t); > + > +/* XEN_DOMCTL_claim_memory: Claim an amount of memory for a domain */ > +struct xen_domctl_claim_memory { > + /* IN: array of memory claims */ > + XEN_GUEST_HANDLE_64(memory_claim_t) claims; > + /* IN: number of claims */ > + unsigned int nr_claims; ... here. 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Thu, 13 Nov 2025 06:38:52 -0800 (PST) Content-Type: multipart/alternative; boundary="------------C1pOg6sJzSjWiwO5G8v6cD00" Message-ID: <7928118a-6274-4636-bcef-7b103dce9610@gmail.com> Date: Thu, 13 Nov 2025 15:38:46 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH for-4.21 v7] xen: Strip xen.efi by default To: Frediano Ziglio , Andrew Cooper Cc: Frediano Ziglio , xen-devel@lists.xenproject.org, Frediano Ziglio , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Demi Marie Obenour , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , Stewart Hildebrand References: <20251113124945.25343-1-frediano.ziglio@citrix.com> <5c14f58d-c8bf-4c63-b48a-9af5af88c8f2@citrix.com> Content-Language: en-US From: Oleksii Kurochko In-Reply-To: This is a multi-part message in MIME format. --------------C1pOg6sJzSjWiwO5G8v6cD00 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 11/13/25 2:43 PM, Frediano Ziglio wrote: > On Thu, 13 Nov 2025 at 13:17, Andrew Cooper wrote: >> On 13/11/2025 12:49 pm, Frediano Ziglio wrote: >>> From: Frediano Ziglio >>> >>> For xen.gz file we strip all symbols and have an additional >>> xen-syms.efi file version with all symbols. >>> Make xen.efi more coherent stripping all symbols too. >>> xen-syms.efi can be used for debugging. >>> >>> Signed-off-by: Frediano Ziglio >>> --- >>> Changes since v1: >>> - avoid leaving target if some command fails. >>> >>> Changes since v2: >>> - do not convert type but retain PE format; >>> - use xen-syms.efi for new file name, more consistent with ELF. >>> >>> Changes since v3: >>> - update documentation; >>> - do not remove xen.efi.elf; >>> - check endbr instruction before generating final target. >>> >>> Changes since v4: >>> - simplify condition check; >>> - avoid reuse of $@.tmp file. >>> >>> Changes since v5: >>> - avoid creation of temporary file. >>> >>> Changes since v6: >>> - install xen-syms.efi; >>> - always strip xen.efi; >>> - restore EFI_LDFLAGS check during rule execution; >>> - update CHANGELOG.md; >>> - added xen-syms.efi to .gitignore. >>> --- >>> .gitignore | 1 + >>> CHANGELOG.md | 3 +++ >>> docs/misc/efi.pandoc | 8 +------- >>> xen/Kconfig.debug | 9 ++------- >>> xen/Makefile | 25 +++---------------------- >>> xen/arch/x86/Makefile | 11 ++++++++--- >>> 6 files changed, 18 insertions(+), 39 deletions(-) >>> >>> diff --git a/.gitignore b/.gitignore >>> index d83427aba8..213972b65c 100644 >>> --- a/.gitignore >>> +++ b/.gitignore >>> @@ -222,6 +222,7 @@ tools/flask/policy/xenpolicy-* >>> xen/xen >>> xen/suppression-list.txt >>> xen/xen-syms >>> +xen/xen-syms.efi >>> xen/xen-syms.map >>> xen/xen.* >>> >>> diff --git a/CHANGELOG.md b/CHANGELOG.md >>> index c9932a2af0..3bdcc3b47a 100644 >>> --- a/CHANGELOG.md >>> +++ b/CHANGELOG.md >>> @@ -65,6 +65,9 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) >>> for hypervisor mode. >>> >>> ### Removed >>> + - The install-time environment variable INSTALL_EFI_STRIP is no longer >>> + supported, xen.efi will is now always being stripped. >> I'd rephrase this a little. "... INSTALL_EFI_STRIP no longer exists. >> xen.efi is always stripped, while the symbols remain available in >> xen-syms.efi." >> > Done > >> Personally, I'd have put this in the Changed section rather than >> Removed, but both can be adjusted together. >> > Done > >> This bug is on the 4.21 tracking list. CC'ing Oleksii. >> > So.. should I leave the CHANGELOG.md change in 4.21 or should I move > it to 4.22 ?? It should be in 4.21 as it is bug from 4.21 tracking list. Thanks. ~ Oleksii --------------C1pOg6sJzSjWiwO5G8v6cD00 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: 7bit


On 11/13/25 2:43 PM, Frediano Ziglio wrote:
On Thu, 13 Nov 2025 at 13:17, Andrew Cooper <andrew.cooper3@citrix.com> wrote:

On 13/11/2025 12:49 pm, Frediano Ziglio wrote:

From: Frediano Ziglio <frediano.ziglio@cloud.com>

For xen.gz file we strip all symbols and have an additional
xen-syms.efi file version with all symbols.
Make xen.efi more coherent stripping all symbols too.
xen-syms.efi can be used for debugging.

Signed-off-by: Frediano Ziglio <frediano.ziglio@cloud.com>
---
Changes since v1:
- avoid leaving target if some command fails.

Changes since v2:
- do not convert type but retain PE format;
- use xen-syms.efi for new file name, more consistent with ELF.

Changes since v3:
- update documentation;
- do not remove xen.efi.elf;
- check endbr instruction before generating final target.

Changes since v4:
- simplify condition check;
- avoid reuse of $@.tmp file.

Changes since v5:
- avoid creation of temporary file.

Changes since v6:
- install xen-syms.efi;
- always strip xen.efi;
- restore EFI_LDFLAGS check during rule execution;
- update CHANGELOG.md;
- added xen-syms.efi to .gitignore.
---
 .gitignore            |  1 +
 CHANGELOG.md          |  3 +++
 docs/misc/efi.pandoc  |  8 +-------
 xen/Kconfig.debug     |  9 ++-------
 xen/Makefile          | 25 +++----------------------
 xen/arch/x86/Makefile | 11 ++++++++---
 6 files changed, 18 insertions(+), 39 deletions(-)

diff --git a/.gitignore b/.gitignore
index d83427aba8..213972b65c 100644
--- a/.gitignore
+++ b/.gitignore
@@ -222,6 +222,7 @@ tools/flask/policy/xenpolicy-*
 xen/xen
 xen/suppression-list.txt
 xen/xen-syms
+xen/xen-syms.efi
 xen/xen-syms.map
 xen/xen.*

diff --git a/CHANGELOG.md b/CHANGELOG.md
index c9932a2af0..3bdcc3b47a 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -65,6 +65,9 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
       for hypervisor mode.

 ### Removed
+ - The install-time environment variable INSTALL_EFI_STRIP is no longer
+   supported, xen.efi will is now always being stripped.

I'd rephrase this a little.  "... INSTALL_EFI_STRIP no longer exists.
xen.efi is always stripped, while the symbols remain available in
xen-syms.efi."


Done


Personally, I'd have put this in the Changed section rather than
Removed, but both can be adjusted together.


Done


This bug is on the 4.21 tracking list.  CC'ing Oleksii.


So.. should I leave the CHANGELOG.md change in 4.21 or should I move
it to 4.22 ??
It should be in 4.21 as it is bug from 4.21 tracking list.

Thanks.

~ Oleksii
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Thu, 13 Nov 2025 06:39:38 -0800 (PST) Message-ID: Date: Thu, 13 Nov 2025 15:39:37 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH 3/5] x86: hvm: factor out compat code under ifdefs To: Jan Beulich , Grygorii Strashko Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Alejandro Vallejo , Jason Andryuk , "xen-devel@lists.xenproject.org" References: <20251111175413.3540690-1-grygorii_strashko@epam.com> <20251111175413.3540690-4-grygorii_strashko@epam.com> <4e4aa540-514b-458f-8036-7941a0ecf268@epam.com> Content-Language: en-US From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------PNT7fsjPsml06FkLDo6Nl4al" This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------PNT7fsjPsml06FkLDo6Nl4al Content-Type: multipart/mixed; boundary="------------qsy8rF5H46uYx7pH1GPqE8sK"; protected-headers="v1" From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= To: Jan Beulich , Grygorii Strashko Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Alejandro Vallejo , Jason Andryuk , "xen-devel@lists.xenproject.org" Message-ID: Subject: Re: [XEN][PATCH 3/5] x86: hvm: factor out compat code under ifdefs References: <20251111175413.3540690-1-grygorii_strashko@epam.com> <20251111175413.3540690-4-grygorii_strashko@epam.com> <4e4aa540-514b-458f-8036-7941a0ecf268@epam.com> In-Reply-To: Autocrypt-Gossip: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJ3BBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AAIQkQoDSui/t3IH4WIQQ+pJkfkcoLMCa4X6CgNK6L+3cgfgn7AJ9DmMd0SMJE ePbc7/m22D2v04iu7ACffXTdZQhNl557tJuDXZSBxDmW/tLOwU0EWTecRBAIAIK5OMKMU5R2 Lk2bbjgX7vyQuCFFyKf9rC/4itNwhYWFSlKzVj3WJBDsoi2KvPm7AI+XB6NIkNAkshL5C0kd pcNd5Xo0jRR5/WE/bT7LyrJ0OJWS/qUit5eNNvsO+SxGAk28KRa1ieVLeZi9D03NL0+HIAtZ tecfqwgl3Y72UpLUyt+r7LQhcI/XR5IUUaD4C/chB4Vq2QkDKO7Q8+2HJOrFIjiVli4lU+Sf OBp64m//Y1xys++Z4ODoKh7tkh5DxiO3QBHG7bHK0CSQsJ6XUvPVYubAuy1XfSDzSeSBl//C v78Fclb+gi9GWidSTG/4hsEzd1fY5XwCZG/XJJY9M/sAAwUH/09Ar9W2U1Qm+DwZeP2ii3Ou 14Z9VlVVPhcEmR/AFykL9dw/OV2O/7cdi52+l00reUu6Nd4Dl8s4f5n8b1YFzmkVVIyhwjvU jxtPyUgDOt6DRa+RaDlXZZmxQyWcMv2anAgYWGVszeB8Myzsw8y7xhBEVV1S+1KloCzw4V8Z DSJrcsZlyMDoiTb7FyqxwQnM0f6qHxWbmOOnbzJmBqpNpFuDcz/4xNsymJylm6oXiucHQBAP Xb/cE1YNHpuaH4SRhIxwQilCYEznWowQphNAbJtEKOmcocY7EbSt8VjXTzmYENkIfkrHRyXQ dUm5AoL51XZljkCqNwrADGkTvkwsWSvCSQQYEQIACQUCWTecRAIbDAAKCRCgNK6L+3cgfuef AJ9wlZQNQUp0KwEf8Tl37RmcxCL4bQCcC5alCSMzUBJ5DBIcR4BY+CyQFAs= --------------qsy8rF5H46uYx7pH1GPqE8sK Content-Type: multipart/mixed; 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name="OpenPGP_signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="OpenPGP_signature.asc" -----BEGIN PGP SIGNATURE----- wsB5BAABCAAjFiEEhRJncuj2BJSl0Jf3sN6d1ii/Ey8FAmkV7akFAwAAAAAACgkQsN6d1ii/Ey8Y 0QgAh1w1FzK6S05Z78qwkepFPrUbncQClgqYe824tHHuW4kWsPmREIsn5dpfljBYasq0YRlSYojm eGy914MXD0TzrulER55w41nrMjOq1XjO3FDDzCEh4qv11yGxILFmdVJp72DArwPrOmcMmK5hA7Yq So2X0SndHY8p2b7U/jR3xf/CaJvS6ErubwrlIn3N2sTnR/Coa0a4TJhcwjl3t+lA//ZIKFtpdBDS bLNRqw3s4ilW4Cn/klrnhMJk9Io2HpgBk+nFCLsvr0peQhT12HzX7/Dv/P8xo2eceWN3cGQiDiZI qvfuDIe8VC2ZtOYppzT/fCsXuMUAk9wSwgHafy5qhw== =Qro5 -----END PGP SIGNATURE----- --------------PNT7fsjPsml06FkLDo6Nl4al-- From xen-devel-bounces@lists.xenproject.org Thu Nov 13 14:46:46 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 14:46:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161760.1489621 (Exim 4.92) (envelope-from ) id 1vJYav-0000dc-6r; Thu, 13 Nov 2025 14:46:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161760.1489621; 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boundary="------------5xTa6XxCUJc7ILfxRI6xLB4G"; protected-headers="v1" From: Juergen Gross To: Jan Beulich , Grygorii Strashko Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Alejandro Vallejo , Jason Andryuk , "xen-devel@lists.xenproject.org" Message-ID: <8aa7ddeb-fb2b-42ac-bba6-272b91fc1e8f@suse.com> Subject: Re: [XEN][PATCH 3/5] x86: hvm: factor out compat code under ifdefs References: <20251111175413.3540690-1-grygorii_strashko@epam.com> <20251111175413.3540690-4-grygorii_strashko@epam.com> <4e4aa540-514b-458f-8036-7941a0ecf268@epam.com> In-Reply-To: Autocrypt-Gossip: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJ3BBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AAIQkQoDSui/t3IH4WIQQ+pJkfkcoLMCa4X6CgNK6L+3cgfgn7AJ9DmMd0SMJE ePbc7/m22D2v04iu7ACffXTdZQhNl557tJuDXZSBxDmW/tLOwU0EWTecRBAIAIK5OMKMU5R2 Lk2bbjgX7vyQuCFFyKf9rC/4itNwhYWFSlKzVj3WJBDsoi2KvPm7AI+XB6NIkNAkshL5C0kd pcNd5Xo0jRR5/WE/bT7LyrJ0OJWS/qUit5eNNvsO+SxGAk28KRa1ieVLeZi9D03NL0+HIAtZ tecfqwgl3Y72UpLUyt+r7LQhcI/XR5IUUaD4C/chB4Vq2QkDKO7Q8+2HJOrFIjiVli4lU+Sf OBp64m//Y1xys++Z4ODoKh7tkh5DxiO3QBHG7bHK0CSQsJ6XUvPVYubAuy1XfSDzSeSBl//C v78Fclb+gi9GWidSTG/4hsEzd1fY5XwCZG/XJJY9M/sAAwUH/09Ar9W2U1Qm+DwZeP2ii3Ou 14Z9VlVVPhcEmR/AFykL9dw/OV2O/7cdi52+l00reUu6Nd4Dl8s4f5n8b1YFzmkVVIyhwjvU jxtPyUgDOt6DRa+RaDlXZZmxQyWcMv2anAgYWGVszeB8Myzsw8y7xhBEVV1S+1KloCzw4V8Z DSJrcsZlyMDoiTb7FyqxwQnM0f6qHxWbmOOnbzJmBqpNpFuDcz/4xNsymJylm6oXiucHQBAP Xb/cE1YNHpuaH4SRhIxwQilCYEznWowQphNAbJtEKOmcocY7EbSt8VjXTzmYENkIfkrHRyXQ dUm5AoL51XZljkCqNwrADGkTvkwsWSvCSQQYEQIACQUCWTecRAIbDAAKCRCgNK6L+3cgfuef AJ9wlZQNQUp0KwEf8Tl37RmcxCL4bQCcC5alCSMzUBJ5DBIcR4BY+CyQFAs= --------------5xTa6XxCUJc7ILfxRI6xLB4G Content-Type: multipart/mixed; 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name="OpenPGP_signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="OpenPGP_signature.asc" -----BEGIN PGP SIGNATURE----- wsB5BAABCAAjFiEEhRJncuj2BJSl0Jf3sN6d1ii/Ey8FAmkV70wFAwAAAAAACgkQsN6d1ii/Ey9R 4wf9E5J4PN1UIU1rz2u9az7IU8k2nU96QUd4mw6Fx/ZaU3FvsVtQds73S+Wr+ReDRnLhbyYroj0p qVApAt1Xs7XyBzPFm9u+xazGXzi9NAUnyYqYpeSdzT4uRCBB/8XkcbbpUNxOmvyLQ6HTYD/LkH9K XFO/AZZRgNz7DtWLR6+WoEU2Gnf9Pe4c0Afle0a+rhFgoUwrccWDOsIU8MXII3lXJXlE6a4svmXD c/8hmsjKYvdNWDahiMw9tg4tMi1JUrbQZofp1YbQKBa4g7nymKOCe/oAlCXU66PyBPV/AdAKnH3q iAowUbdQH0ZySl+nGjyR6NspXsXSbitRi0xO6K4L5g== =GSh9 -----END PGP SIGNATURE----- --------------X04fl5MTB2nXuQLASpJWkBBa-- From xen-devel-bounces@lists.xenproject.org Thu Nov 13 15:30:09 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 15:30:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161779.1489631 (Exim 4.92) (envelope-from ) id 1vJZGj-0007Fr-ED; Thu, 13 Nov 2025 15:29:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161779.1489631; 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Albeit then the tail of per-CPU data will > all be padding space; sadly the TSS wants/needs page-aligning for XPTI > purposes. I've not done this yet, but I was intending to make the TSSes be dynamically allocated, so they (along with the IDTs) can be omitted entirely under FRED. The VT-x tr limit bug/misfeature complicates this somewhat, hence why I've left this out of the FRED basic support, but it can be addressed by pointing HOST_TR_BASE at a singleton TSS. ~Andrew From xen-devel-bounces@lists.xenproject.org Thu Nov 13 15:32:48 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 15:32:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161791.1489642 (Exim 4.92) (envelope-from ) id 1vJZJX-0000bB-RY; Thu, 13 Nov 2025 15:32:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161791.1489642; Thu, 13 Nov 2025 15:32:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJZJX-0000b4-Ob; Thu, 13 Nov 2025 15:32:47 +0000 Received: by outflank-mailman (input) for mailman id 1161791; Thu, 13 Nov 2025 15:32:46 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJZJW-0000ay-Id for xen-devel@lists.xenproject.org; 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>>>>>>        } >>>>>> -    if ( !vcpu_is_hcall_compat(current) ) >>>>>> -        rc = do_memory_op(cmd, arg); >>>>>> -    else >>>>>> +#ifdef CONFIG_COMPAT >>>>>> +    if ( vcpu_is_hcall_compat(current) ) >>>>>>            rc = compat_memory_op(cmd, arg); >>>>>> +    else >>>>>> +#endif >>>>>> +        rc = do_memory_op(cmd, arg); >>>>> >>>>> Why would this be needed when vcpu_is_hcall_compat() already honors CONFIG_COMPAT? >>>>> (Same question then applies elsewhere, of course.) >>>> >>>> This I do not like by myself, but I was not able to find other options :( >>>> >>>> hypercall-defs.h is autogenerated and it's the only one place where functions >>>> declarations like do_x_op() are appeared or disappeared. >>>> So build is failing without ifdefs as compiler can't find compat_memory_op() >>>> declaration. >>> >>> Oh, I see; I hadn't thought of that aspect. I wonder if we wouldn't better take >>> care of that in the machinery there. Cc-ing Jürgen, who did introduce this >>> originally. Maybe he has concrete arguments against us doing so. >> >> No arguments against it. >> >> You probably will need a new Prefix defined (e.g. compat_always) and set it via >> >> #define PREFIX_compat_always compat >> >> unconditionally. Then it should be possible to have >> >> Prefix: compat_always >> memory_op(...) >> >> outside of #ifdefs and drop the memory_op() in the #ifdef CONFIG_COMPAT section. > > Oh, this might be wrong, as this will break the PV32 memory_op() hypercall. > > You need to keep the current memory_op() in the #ifdef CONFIG_COMPAT section > and move the compat_always stuff into an #else part of the CONFIG_COMPAT. > >> >> This should result in the compat_memory_op() prototype to be always available. >> Having no related function should be no problem due to DCO in case CONFIG_COMPAT >> isn't defined. Smth like this, right? diff --git a/xen/include/hypercall-defs.c b/xen/include/hypercall-defs.c index 338d7afe3048..e85943320bd2 100644 --- a/xen/include/hypercall-defs.c +++ b/xen/include/hypercall-defs.c @@ -80,6 +80,8 @@ rettype: compat int #define PREFIX_compat #endif +#define PREFIX_compat_always compat + #ifdef CONFIG_ARM #define PREFIX_dep dep #define PREFIX_do_arm do_arm @@ -156,6 +158,9 @@ platform_op(compat_platform_op_t *u_xenpf_op) #ifdef CONFIG_KEXEC kexec_op(unsigned int op, void *uarg) #endif +#else +prefix: PREFIX_compat_always +memory_op(unsigned int cmd, void *arg) #endif /* CONFIG_COMPAT */ -- Best regards, -grygorii From xen-devel-bounces@lists.xenproject.org Thu Nov 13 15:44:08 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 15:44:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161803.1489652 (Exim 4.92) (envelope-from ) id 1vJZUS-0002IP-RT; Thu, 13 Nov 2025 15:44:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161803.1489652; Thu, 13 Nov 2025 15:44:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJZUS-0002II-Nl; Thu, 13 Nov 2025 15:44:04 +0000 Received: by outflank-mailman (input) for mailman id 1161803; Thu, 13 Nov 2025 15:44:03 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJZUR-0002IC-D4 for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 15:44:03 +0000 Received: from mail-ed1-x534.google.com (mail-ed1-x534.google.com [2a00:1450:4864:20::534]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 938a3e5d-c0a7-11f0-9d18-b5c5bf9af7f9; Thu, 13 Nov 2025 16:44:01 +0100 (CET) Received: by mail-ed1-x534.google.com with SMTP id 4fb4d7f45d1cf-640c6577120so1753122a12.1 for ; Thu, 13 Nov 2025 07:44:01 -0800 (PST) Received: from ?IPV6:2003:e5:871a:de00:dd24:7204:f00a:bf44? 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Thu, 13 Nov 2025 07:44:00 -0800 (PST) Message-ID: <8a57904f-17f2-46f9-9b08-e2287f8fd44c@suse.com> Date: Thu, 13 Nov 2025 16:43:59 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN][PATCH 3/5] x86: hvm: factor out compat code under ifdefs To: Grygorii Strashko , Jan Beulich Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Alejandro Vallejo , Jason Andryuk , "xen-devel@lists.xenproject.org" References: <20251111175413.3540690-1-grygorii_strashko@epam.com> <20251111175413.3540690-4-grygorii_strashko@epam.com> <4e4aa540-514b-458f-8036-7941a0ecf268@epam.com> <8aa7ddeb-fb2b-42ac-bba6-272b91fc1e8f@suse.com> Content-Language: en-US From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------tiZfe5OpSQ1etTKdtNsUg00X" This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------tiZfe5OpSQ1etTKdtNsUg00X Content-Type: multipart/mixed; boundary="------------Mi7lixFpgDR6stwLEs04cEBw"; protected-headers="v1" From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= To: Grygorii Strashko , Jan Beulich Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Alejandro Vallejo , Jason Andryuk , "xen-devel@lists.xenproject.org" Message-ID: <8a57904f-17f2-46f9-9b08-e2287f8fd44c@suse.com> Subject: Re: [XEN][PATCH 3/5] x86: hvm: factor out compat code under ifdefs References: <20251111175413.3540690-1-grygorii_strashko@epam.com> <20251111175413.3540690-4-grygorii_strashko@epam.com> <4e4aa540-514b-458f-8036-7941a0ecf268@epam.com> <8aa7ddeb-fb2b-42ac-bba6-272b91fc1e8f@suse.com> In-Reply-To: Autocrypt-Gossip: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJ3BBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AAIQkQoDSui/t3IH4WIQQ+pJkfkcoLMCa4X6CgNK6L+3cgfgn7AJ9DmMd0SMJE ePbc7/m22D2v04iu7ACffXTdZQhNl557tJuDXZSBxDmW/tLOwU0EWTecRBAIAIK5OMKMU5R2 Lk2bbjgX7vyQuCFFyKf9rC/4itNwhYWFSlKzVj3WJBDsoi2KvPm7AI+XB6NIkNAkshL5C0kd pcNd5Xo0jRR5/WE/bT7LyrJ0OJWS/qUit5eNNvsO+SxGAk28KRa1ieVLeZi9D03NL0+HIAtZ tecfqwgl3Y72UpLUyt+r7LQhcI/XR5IUUaD4C/chB4Vq2QkDKO7Q8+2HJOrFIjiVli4lU+Sf OBp64m//Y1xys++Z4ODoKh7tkh5DxiO3QBHG7bHK0CSQsJ6XUvPVYubAuy1XfSDzSeSBl//C v78Fclb+gi9GWidSTG/4hsEzd1fY5XwCZG/XJJY9M/sAAwUH/09Ar9W2U1Qm+DwZeP2ii3Ou 14Z9VlVVPhcEmR/AFykL9dw/OV2O/7cdi52+l00reUu6Nd4Dl8s4f5n8b1YFzmkVVIyhwjvU jxtPyUgDOt6DRa+RaDlXZZmxQyWcMv2anAgYWGVszeB8Myzsw8y7xhBEVV1S+1KloCzw4V8Z DSJrcsZlyMDoiTb7FyqxwQnM0f6qHxWbmOOnbzJmBqpNpFuDcz/4xNsymJylm6oXiucHQBAP Xb/cE1YNHpuaH4SRhIxwQilCYEznWowQphNAbJtEKOmcocY7EbSt8VjXTzmYENkIfkrHRyXQ dUm5AoL51XZljkCqNwrADGkTvkwsWSvCSQQYEQIACQUCWTecRAIbDAAKCRCgNK6L+3cgfuef AJ9wlZQNQUp0KwEf8Tl37RmcxCL4bQCcC5alCSMzUBJ5DBIcR4BY+CyQFAs= --------------Mi7lixFpgDR6stwLEs04cEBw Content-Type: multipart/mixed; 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name="OpenPGP_signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="OpenPGP_signature.asc" -----BEGIN PGP SIGNATURE----- wsB5BAABCAAjFiEEhRJncuj2BJSl0Jf3sN6d1ii/Ey8FAmkV/MAFAwAAAAAACgkQsN6d1ii/Ey8c Pwf+OD+/oM3J/6pY4t8ypNYjLefqjmOkSOx/y4TH5BCgwtKQOEQ3GTG47RaKIguKaBacFNMZXINm XyfCnEIkSTnDG6GIYcnyyNH6ebjLzyQdPshBQXqGeIEIu7AWxHjsr+yuaWaBI/wgAimhPQiUieJk xkDR6ap6cC89q+SV1DqiqlPdGpCZsBmu1rvddy25BW2hvqTXAmZ1EgvM5TwkaxPwrBs5mJ/jyl9D cbA3D+Su9ZNxlSTTaf1sSsgnjCnv/mtEqrPPuIKCRg0tJxhDjYkwmoa3R368Dr+paVYtc5nCZMZY JKOB8olGqVnlmRcFDCwZ8zlr55SI5HqvxkOwmH/ZTw== =7Hcf -----END PGP SIGNATURE----- --------------tiZfe5OpSQ1etTKdtNsUg00X-- From xen-devel-bounces@lists.xenproject.org Thu Nov 13 15:44:10 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 15:44:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161804.1489662 (Exim 4.92) (envelope-from ) id 1vJZUY-0002XZ-6S; Thu, 13 Nov 2025 15:44:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161804.1489662; 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b=pj6aMqtu/Z2Etasuk5SVeiFKtA1AiwOAKp54IkZloC51oxDY19kSJxvdH4mc/u4dfxq0kFvlm2C03t6WS/siQ8so4Ao4zJ9TDSFQhZOUZZTGwTQE6COFgtdJEjuzhd9kZgPVxGcY35+wIEnccB1Q+GPBaU0ny90Zy4ggRXLqZ10= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com; From: Frediano Ziglio To: xen-devel@lists.xenproject.org Cc: Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Frediano Ziglio , Demi Marie Obenour , =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= , Stewart Hildebrand , Oleksii Kurochko Subject: [PATCH v8] xen: Strip xen.efi by default Date: Thu, 13 Nov 2025 15:43:58 +0000 Message-ID: <20251113154358.28704-1-frediano.ziglio@citrix.com> X-Mailer: git-send-email 2.51.1 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: LO4P123CA0244.GBRP123.PROD.OUTLOOK.COM (2603:10a6:600:1a7::15) To IA3PR03MB8408.namprd03.prod.outlook.com (2603:10b6:208:546::19) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: IA3PR03MB8408:EE_|PH8PR03MB7305:EE_ X-MS-Office365-Filtering-Correlation-Id: 36463af5-d01e-47ab-ee7a-08de22cb7874 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|366016|7416014; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?VwfS5D0mK2+QnSU3HV8w8M5/EPn/6VZznokqgf/PNEsNsETvWMaNieClkQnZ?= =?us-ascii?Q?WKCPQDfJoE5RGIjBPni+P77hMDhuPayrx05Y/bjFl350HEv6UCDv9rpLozhI?= =?us-ascii?Q?4+U9UD6N25nqvPgMtlkybeqZQBSKI52IsIs64m0JNt/74nAIn+ft/oETmrlL?= =?us-ascii?Q?Hjvqonm0q9cZVVh86CQJyFouXb/Dtx7qQJKQE7QE1yMNBCgr2hz7ZKzI3IxX?= =?us-ascii?Q?MJ0Wc9+FTrQxbATSNhJ9OCI284R4HJyHcp/avPJd/TMXzSpBJ7dn07MfRvHZ?= =?us-ascii?Q?OEJsE1+iCXxp0x4H12ExqE6n5cOvR6i/yvOtAJZlJ0tsV22vchp77bz+BfEP?= =?us-ascii?Q?VXrP3MOwDX8DqNxcU+BySEa74PKKp7qdJvn/1eG8E69mZsl10Tl7+HcO79SF?= =?us-ascii?Q?22QBM1Pm09Kg6hlruz+ytFuIqDC+8ZzJXabuno4wL/GK9mFd7CiPCIKqhZv1?= =?us-ascii?Q?fKU8lVcKwO4PRekfnXAltVzac/nmcBpxFDnwwZJX8Wd806sOByZNieUGyX7U?= =?us-ascii?Q?zpuJp6Bf9YWEO9tch+no+R5cx/6PGdoNAGmc5tRfJqajRrTKNr0vDN22DKo9?= =?us-ascii?Q?o967aZbyv8XG8QbTtivjQvd2IAlluwItdBbYdWVq5gfIO2YBsr+SAcDdzPSU?= =?us-ascii?Q?Nf7GhzFvkzkL25IEfBaPWI0abHuXeLmuKDFQl99h8sgsfiYBYC00JLsFQF4s?= =?us-ascii?Q?uHNltie8NRQGIz6AhQ1hCWG/8WVbTy8+WNqjRoN0/PgpvoeTezd7vwapVOdC?= =?us-ascii?Q?AcgCzqna1BcmLLQQeesfIfnEjrId+i929Hl7hC+1simfKS/vrbgJBOwjj4SA?= =?us-ascii?Q?xkV0pgD+hUzlIovdDODxrxJp0LmYQ3T1HvsFrj5NWNN3VhVB5elVoot2lYgs?= =?us-ascii?Q?0S/2x/QrTW9sF2Pwe8lKA4LWofLyaNG435qxwLK99g3haYYsXdcV2pFGkuJW?= =?us-ascii?Q?IC++vXozv/bj2VQYC/FyY61JUzzAZLHXKrxpCi2RQpEFsAdFtsfL0uhEKcbR?= =?us-ascii?Q?mfU0tPu/00P60UYXeaihF63O7U+GsT51xC504G7H/t6xs/8LHy3lh6THXkXx?= =?us-ascii?Q?x9m46MScsU05I5B4c4IYPYAZ+m3r2y04IQFPlvDzJO+4ST8ixehav88S4Rl8?= =?us-ascii?Q?V4VGw9ZJRhaNB+gh0pnrKio0vXpWuOoQPhE7Obw90vMoVoBJ4TEDMS+lTA+O?= =?us-ascii?Q?11w1d8xcXcaEPbXVfVkN3kIIPOchxNG6M7VI2XDZa7aaXPFHlU+/nLD1HmvE?= =?us-ascii?Q?PY8gcMzrFipfW3KrO7n/NUijk9OEMb9vZgn/U0/FNmSB+mUvrxbRkvxIkVim?= =?us-ascii?Q?qainNaNlgCBhpUiiu6gmURQfHlGHImoNodnVUbFwlbeQencHooOote9emnxM?= =?us-ascii?Q?pELY/vawpmEC4wuIoJXO3dnxJ+8wvmggSb+0ddg6CMfByE5QlZJAa6M4RPa3?= =?us-ascii?Q?3IZUG73NzIXSqhnDgP/qnOEVcPYa4apFh6VmkC/p6i2OLjOK0EOo6kzb0sBL?= =?us-ascii?Q?QqiIk14kCWq3RqOJLb/UEvyTVrhP++1jdQ5d81/cMw/yM/JTzRLNOR3bKjAo?= =?us-ascii?Q?MhJT2RvJIkLlpGXWvyulVykCw40g7ZjxckHl4mVe0X4vgvPeyNCpjGO9zyj5?= =?us-ascii?Q?aQ=3D=3D?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: 36463af5-d01e-47ab-ee7a-08de22cb7874 X-MS-Exchange-CrossTenant-AuthSource: IA3PR03MB8408.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2025 15:44:02.8381 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: nn6pAe1UPwn8IoeTh13r7UhSZf+kl10lF9X6e/rYKNaCxgzpVnlkIWiP77MOZcl/ZTAyemdcuOo7tHZ4xt1Anmw3U9/dRTpu9NRPx/WkUmw= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR03MB7305 From: Frediano Ziglio For xen.gz file we strip all symbols and have an additional xen-syms.efi file version with all symbols. Make xen.efi more coherent stripping all symbols too. xen-syms.efi can be used for debugging. Signed-off-by: Frediano Ziglio --- Changes since v1: - avoid leaving target if some command fails. Changes since v2: - do not convert type but retain PE format; - use xen-syms.efi for new file name, more consistent with ELF. Changes since v3: - update documentation; - do not remove xen.efi.elf; - check endbr instruction before generating final target. Changes since v4: - simplify condition check; - avoid reuse of $@.tmp file. Changes since v5: - avoid creation of temporary file. Changes since v6: - install xen-syms.efi; - always strip xen.efi; - restore EFI_LDFLAGS check during rule execution; - update CHANGELOG.md; - added xen-syms.efi to .gitignore. Changes since v7: - move and improve CHANGELOG.md changes. --- .gitignore | 1 + CHANGELOG.md | 3 +++ docs/misc/efi.pandoc | 8 +------- xen/Kconfig.debug | 9 ++------- xen/Makefile | 25 +++---------------------- xen/arch/x86/Makefile | 11 ++++++++--- 6 files changed, 18 insertions(+), 39 deletions(-) diff --git a/.gitignore b/.gitignore index d83427aba8..213972b65c 100644 --- a/.gitignore +++ b/.gitignore @@ -222,6 +222,7 @@ tools/flask/policy/xenpolicy-* xen/xen xen/suppression-list.txt xen/xen-syms +xen/xen-syms.efi xen/xen-syms.map xen/xen.* diff --git a/CHANGELOG.md b/CHANGELOG.md index c9932a2af0..bc16e316e7 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -34,6 +34,9 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) BAR for HVM guests, to improve performance of guests using it to map the grant table or foreign memory. - Allow configuring the number of altp2m tables per domain via vm.cfg. + - The install-time environment variable INSTALL_EFI_STRIP no longer exists. + xen.efi is always stripped, while the symbols remain available in + xen-syms.efi. ### Added - Introduce new PDX compression algorithm to cope with Intel Sierra Forest and diff --git a/docs/misc/efi.pandoc b/docs/misc/efi.pandoc index 11c1ac3346..c66b18a66b 100644 --- a/docs/misc/efi.pandoc +++ b/docs/misc/efi.pandoc @@ -20,13 +20,7 @@ Xen to load the configuration file even if multiboot modules are found. Once built, `make install-xen` will place the resulting binary directly into the EFI boot partition, provided `EFI_VENDOR` is set in the environment (and `EFI_MOUNTPOINT` is overridden as needed, should the default of `/boot/efi` not -match your system). When built with debug info, the binary can be quite large. -Setting `INSTALL_EFI_STRIP=1` in the environment will cause it to be stripped -of debug info in the process of installing. `INSTALL_EFI_STRIP` can also be set -to any combination of options suitable to pass to `strip`, in case the default -ones don't do. The xen.efi binary will also be installed in `/usr/lib64/efi/`, -unless `EFI_DIR` is set in the environment to override this default. This -binary will not be stripped in the process. +match your system). The binary itself will require a configuration file (names with the `.efi` extension of the binary's name replaced by `.cfg`, and - until an existing diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug index d900d926c5..1a8e0c6ec3 100644 --- a/xen/Kconfig.debug +++ b/xen/Kconfig.debug @@ -147,12 +147,7 @@ config DEBUG_INFO Say Y here if you want to build Xen with debug information. This information is needed e.g. for doing crash dump analysis of the hypervisor via the "crash" tool. - Saying Y will increase the size of the xen-syms and xen.efi - binaries. In case the space on the EFI boot partition is rather - limited, you may want to install a stripped variant of xen.efi in - the EFI boot partition (look for "INSTALL_EFI_STRIP" in - docs/misc/efi.pandoc for more information - when not using - "make install-xen" for installing xen.efi, stripping needs to be - done outside the Xen build environment). + Saying Y will increase the size of the xen-syms, xen-syms.efi and + xen.efi.elf binaries. endmenu diff --git a/xen/Makefile b/xen/Makefile index fc9244420e..5ed029fed1 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -493,22 +493,6 @@ endif .PHONY: _build _build: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX) -# Strip -# -# INSTALL_EFI_STRIP, if defined, will cause xen.efi to be stripped before it -# is installed. If INSTALL_EFI_STRIP is '1', then the default option(s) below -# will be used. Otherwise, INSTALL_EFI_STRIP value will be used as the -# option(s) to the strip command. -ifdef INSTALL_EFI_STRIP - -ifeq ($(INSTALL_EFI_STRIP),1) -efi-strip-opt := --strip-debug --keep-file-symbols -else -efi-strip-opt := $(INSTALL_EFI_STRIP) -endif - -endif - .PHONY: _install _install: D=$(DESTDIR) _install: T=$(notdir $(TARGET)) @@ -526,18 +510,15 @@ _install: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX) if [ -r $(TARGET).efi -a -n '$(EFI_DIR)' ]; then \ [ -d $(D)$(EFI_DIR) ] || $(INSTALL_DIR) $(D)$(EFI_DIR); \ $(INSTALL_DATA) $(TARGET).efi $(D)$(EFI_DIR)/$(T)-$(XEN_FULLVERSION).efi; \ - for x in map elf; do \ - if [ -e $(TARGET).efi.$$x ]; then \ - $(INSTALL_DATA) $(TARGET).efi.$$x $(D)$(DEBUG_DIR)/$(T)-$(XEN_FULLVERSION).efi.$$x; \ + for x in .efi.map .efi.elf -syms.efi; do \ + if [ -e $(TARGET)$$x ]; then \ + $(INSTALL_DATA) $(TARGET)$$x $(D)$(DEBUG_DIR)/$(T)-$(XEN_FULLVERSION)$$x; \ fi; \ done; \ ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T)-$(XEN_VERSION).$(XEN_SUBVERSION).efi; \ ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T)-$(XEN_VERSION).efi; \ ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T).efi; \ if [ -n '$(EFI_MOUNTPOINT)' -a -n '$(EFI_VENDOR)' ]; then \ - $(if $(efi-strip-opt), \ - $(STRIP) $(efi-strip-opt) -p -o $(TARGET).efi.stripped $(TARGET).efi && \ - $(INSTALL_DATA) $(TARGET).efi.stripped $(D)$(EFI_MOUNTPOINT)/efi/$(EFI_VENDOR)/$(T)-$(XEN_FULLVERSION).efi ||) \ $(INSTALL_DATA) $(TARGET).efi $(D)$(EFI_MOUNTPOINT)/efi/$(EFI_VENDOR)/$(T)-$(XEN_FULLVERSION).efi; \ elif [ "$(D)" = "$(patsubst $(shell cd $(XEN_ROOT) && pwd)/%,%,$(D))" ]; then \ echo 'EFI installation only partially done (EFI_VENDOR not set)' >&2; \ diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index 407571c510..a154ffe6b2 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -228,12 +228,17 @@ endif $(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o $(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds $< \ $(dot-target).1r.o $(dot-target).1s.o $(orphan-handling-y) \ - $(note_file_option) -o $@ - $(NM) -pa --format=sysv $@ \ + $(note_file_option) -o $(TARGET)-syms.efi + $(NM) -pa --format=sysv $(TARGET)-syms.efi \ | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > $@.map ifeq ($(CONFIG_DEBUG_INFO),y) - $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) -O elf64-x86-64 $@ $@.elf + $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) \ + -O elf64-x86-64 $(TARGET)-syms.efi $@.elf +endif + $(STRIP) $(TARGET)-syms.efi -o $@ +ifneq ($(CONFIG_DEBUG_INFO),y) + rm -f $(TARGET)-syms.efi endif rm -f $(dot-target).[0-9]* $(@D)/..$(@F).[0-9]* ifeq ($(CONFIG_XEN_IBT),y) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu Nov 13 15:49:42 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 15:49:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161829.1489672 (Exim 4.92) (envelope-from ) id 1vJZZo-0003i9-PD; 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Message-ID: Date: Thu, 13 Nov 2025 17:49:28 +0200 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 6/8] arm/sysctl: Implement cpu hotplug ops To: Mykyta Poturai , "xen-devel@lists.xenproject.org" Cc: Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , "Daniel P. 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For proper Arm32 support, > there needs to be a mechanism to free per-cpu page tables, allocated in > init_domheap_mappings. > Also, hotplug is not supported if ITS, FFA, or TEE is enabled, as they > use non-static IRQ actions. > > Create a Kconfig option RUNTIME_CPU_CONTROL that reflects this > constraints. > > Signed-off-by: Mykyta Poturai > > v3->v4: > * don't reimplement cpu_up/down helpers > * add Kconfig option > * fixup formatting > > v2->v3: > * no changes > > v1->v2: > * remove SMT ops > * remove cpu == 0 checks > * add XSM hooks > * only implement for 64bit Arm > --- > xen/arch/arm/Kconfig | 4 ++++ > xen/arch/arm/sysctl.c | 32 ++++++++++++++++++++++++++++++++ > 2 files changed, 36 insertions(+) > > diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig > index cf6af68299..931ae51575 100644 > --- a/xen/arch/arm/Kconfig > +++ b/xen/arch/arm/Kconfig > @@ -274,6 +274,10 @@ config PCI_PASSTHROUGH > help > This option enables PCI device passthrough > > +config RUNTIME_CPU_CONTROL > + def_bool y > + depends on ARM_64 && !TEE && !FFA && !HAS_ITS > + Having it in arch code I think right as Arch can have own deps (Linux does it this way), but name has to be fixed and documented (docs). may be more common name HOTPLUG_CPU (like in linux)? naming is up to you. > endmenu > > menu "ARM errata workaround via the alternative framework" > diff --git a/xen/arch/arm/sysctl.c b/xen/arch/arm/sysctl.c > index 32cab4feff..3c4e29d82c 100644 > --- a/xen/arch/arm/sysctl.c > +++ b/xen/arch/arm/sysctl.c > @@ -12,6 +12,7 @@ > #include > #include > #include > +#include > #include > #include > > @@ -23,6 +24,33 @@ void arch_do_physinfo(struct xen_sysctl_physinfo *pi) > XEN_SYSCTL_PHYSCAP_ARM_SVE_MASK); > } > > +static long cpu_hotplug_sysctl(struct xen_sysctl_cpu_hotplug *hotplug) > +{ > +#ifdef CONFIG_RUNTIME_CPU_CONTROL > + int ret; > + > + switch ( hotplug->op ) > + { > + case XEN_SYSCTL_CPU_HOTPLUG_ONLINE: > + ret = xsm_resource_plug_core(XSM_HOOK); > + if ( ret ) > + return ret; > + return continue_hypercall_on_cpu(0, cpu_up_helper, _p(hotplug->cpu)); > + > + case XEN_SYSCTL_CPU_HOTPLUG_OFFLINE: > + ret = xsm_resource_unplug_core(XSM_HOOK); > + if ( ret ) > + return ret; > + return continue_hypercall_on_cpu(0, cpu_down_helper, _p(hotplug->cpu)); > + > + default: > + return -EOPNOTSUPP; > + } > +#else > + return -EOPNOTSUPP; > +#endif > +} > + > long arch_do_sysctl(struct xen_sysctl *sysctl, > XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl) > { > @@ -34,6 +62,10 @@ long arch_do_sysctl(struct xen_sysctl *sysctl, > ret = dt_overlay_sysctl(&sysctl->u.dt_overlay); > break; > > + case XEN_SYSCTL_cpu_hotplug: > + ret = cpu_hotplug_sysctl(&sysctl->u.cpu_hotplug); > + break; > + > default: > ret = -ENOSYS; > break; Common code need to be placed under same config guards. -- Best regards, -grygorii From xen-devel-bounces@lists.xenproject.org Thu Nov 13 15:55:19 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 15:55:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161847.1489681 (Exim 4.92) (envelope-from ) id 1vJZfH-0005fv-Fe; Thu, 13 Nov 2025 15:55:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161847.1489681; Thu, 13 Nov 2025 15:55:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJZfH-0005fo-Cc; Thu, 13 Nov 2025 15:55:15 +0000 Received: by outflank-mailman (input) for mailman id 1161847; Thu, 13 Nov 2025 15:55:14 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJZfG-0005fH-Hl for xen-devel@lists.xenproject.org; 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charset=utf-8 Content-Transfer-Encoding: quoted-printable On 10/6/25 16:28, Jason Andryuk wrote: > On 2025-09-24 10:28, Yann Sionneau wrote: >> On 9/24/25 15:30, Marek Marczykowski-G=C3=B3recki wrote: >>> On Wed, Sep 24, 2025 at 01:17:15PM +0300, Grygorii Strashko wrote: >>>> >>>> >>>> On 22.09.25 13:09, Marek Marczykowski-G=C3=B3recki wrote: >>>>> On Fri, Aug 22, 2025 at 08:42:30PM +0200, Marek Marczykowski- >>>>> G=C3=B3recki wrote: >>>>>> On Fri, Aug 22, 2025 at 05:27:20PM +0200, J=C3=BCrgen Gro=C3=9F wrot= e: >>>>>>> On 22.08.25 16:42, Marek Marczykowski-G=C3=B3recki wrote: >>>>>>>> On Fri, Aug 22, 2025 at 04:39:33PM +0200, Marek Marczykowski- >>>>>>>> G=C3=B3recki wrote: >>>>>>>>> Hi, >>>>>>>>> >>>>>>>>> When suspending domU I get the following issue: >>>>>>>>> >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Freezing user space pr= ocesses >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Freezing user space pr= ocesses failed after 20.004 >>>>>>>>> seconds (1 tasks refusing to freeze, wq_busy=3D0): >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 task:xl=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 state:D sta= ck:0=C2=A0=C2=A0=C2=A0=C2=A0 pid:466 >>>>>>>>> tgid:466=C2=A0=C2=A0 ppid:1=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 task_fl= ags:0x400040 flags:0x00004006 >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Call Trace: >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 __schedule+0x2f3= /0x780 >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 schedule+0x27/0x= 80 >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 schedule_preempt= _disabled+0x15/0x30 >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 __mutex_lock.con= stprop.0+0x49f/0x880 >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 unregister_xenbu= s_watch+0x216/0x230 >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 xenbus_write_wat= ch+0xb9/0x220 >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 xenbus_file_writ= e+0x131/0x1b0 >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 vfs_writev+0x26c= /0x3d0 >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ? do_writev+0xeb= /0x110 >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 do_writev+0xeb/0= x110 >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 do_syscall_64+0x= 84/0x2c0 >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ? do_syscall_64+= 0x200/0x2c0 >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ? generic_handle= _irq+0x3f/0x60 >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ? syscall_exit_w= ork+0x108/0x140 >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ? do_syscall_64+= 0x200/0x2c0 >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ? __irq_exit_rcu= +0x4c/0xe0 >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 entry_SYSCALL_64= _after_hwframe+0x76/0x7e >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 RIP: 0033:0x79b6181386= 42 >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 RSP: 002b:00007fff9a19= 2fc8 EFLAGS: 00000246 ORIG_RAX: >>>>>>>>> 0000000000000014 >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 RAX: ffffffffffffffda = RBX: 00000000024fd490 RCX: >>>>>>>>> 000079b618138642 >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 RDX: 0000000000000003 = RSI: 00007fff9a193120 RDI: >>>>>>>>> 0000000000000014 >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 RBP: 00007fff9a193000 = R08: 0000000000000000 R09: >>>>>>>>> 0000000000000000 >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 R10: 0000000000000000 = R11: 0000000000000246 R12: >>>>>>>>> 0000000000000014 >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 R13: 00007fff9a193120 = R14: 0000000000000003 R15: >>>>>>>>> 0000000000000000 >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 OOM killer enabled. >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Restarting tasks: Star= ting >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Restarting tasks: Done >>>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 xen:manage: do_suspend= : freeze processes failed -16 >>>>>>>>> >>>>>>>>> The process in question is `xl devd` daemon. It's a domU serving = a >>>>>>>>> xenvif backend. >>>>>>>>> >>>>>>>>> I noticed it on 6.16.1, but looking at earlier test logs I see >>>>>>>>> it with >>>>>>>>> 6.16-rc6 already (but interestingly, not 6.16-rc2 yet? feels >>>>>>>>> weird given >>>>>>>>> seemingly no relevant changes between rc2 and rc6). >>>>>>>> >>>>>>>> I forgot to include link for (a little) more details: >>>>>>>> https://github.com/QubesOS/qubes-linux-kernel/pull/1157 >>>>>>>> >>>>>>>> Especially, there is another call trace with panic_on_warn >>>>>>>> enabled - >>>>>>>> slightly different, but looks related. >>>>>>>> >>>>>>> >>>>>>> I'm pretty sure the PV variant for suspending is just wrong: it >>>>>>> is calling >>>>>>> dpm_suspend_start() from do_suspend() without taking the required >>>>>>> system_transition_mutex, resulting in the WARN() in >>>>>>> pm_restrict_gfp_mask(). >>>>>>> >>>>>>> It might be as easy as just adding the mutex() call to >>>>>>> do_suspend(), but I'm >>>>>>> really not sure that will be a proper fix. >>>>>> >>>>>> Hm, this might explain the second call trace, but not the freeze >>>>>> failure >>>>>> quoted here above, I think? >>>>> >>>>> While the patch I sent appears to fix this particular issue, it >>>>> made me >>>>> wonder: is there any fundamental reason why do_suspend() is not using >>>>> pm_suspend() and register Xen-specific actions via >>>>> platform_suspend_ops >>>>> (and maybe syscore_ops)? From a brief look at the code, it should >>>>> theoretically be possible, and should avoid issues like this. >>>>> >>>>> I tried to do a quick&dirty attempt at that[1], and it failed >>>>> (panic). I >>>>> surely made several mistakes there (and also left a ton of todo >>>>> comments). But before spending any more time at that, I'd like to ask >>>>> if this is a viable option at all. >>>> >>>> I think it might, but be careful with this, because there are two >>>> "System Low power" paths in Linux >>>> 1) Suspend2RAM and Co >>>> 2) Hybernation >>>> >>>> While "Suspend2RAM and Co" path is relatively straight forward and >>>> expected to be always >>>> started through pm_suspend(). In general, it's expected to happen >>>> =C2=A0=C2=A0 - from sysfs (User space) >>>> =C2=A0=C2=A0 - from autosuspend (wakelocks). >>>> >>>> the "hibernation" path is more complicated:( >>>> - Genuine Linux hybernation hibernate()/hibernate_quiet_exec() >>> >>> IIUC hibernation is very different as it puts Linux in charge of dumpin= g >>> all the state to the disk. In case of Xen, the primary use case for >>> suspend is preparing VM for Xen toolstack serializing its state to disk >>> (or migrating to another host). >>> Additionally, VM suspend may be used as preparation for host suspend >>> (this is what I actually do here). This is especially relevant if the V= M >>> has some PCI passthrough - to properly suspend (and resume) devices >>> across host suspend. >>> >>>> I'm not sure what path Xen originally implemented :( It seems like >>>> "suspend2RAM", >>>> but, at the same time "hybernation" specific staff is used, like >>>> PMSG_FREEZE/PMSG_THAW/PMSG_RESTORE. >>>> As result, Linux suspend/hybernation code moves forward while Xen >>>> stays behind and unsync. >>> >>> Yeah, I think it's supposed to be suspend2RAM. TBH the >>> PMSG_FREEZE/PMSG_THAW/PMSG_RESTORE confuses me too and Qubes OS has a >>> patch[2] to switch it to PMSG_SUSPEND/PMSG_RESUME. >>> >>>> So it sounds reasonable to avoid custom implementation, but may be >>>> not easy :( >>>> >>>> Suspending Xen features can be split between suspend stages, but >>>> not sure if platform_suspend_ops can be used. >>>> >>>> Generic suspend stages list >>>> - freeze >>>> - prepare >>>> - suspend >>>> - suspend_late >>>> - suspend_noirq (SPIs disabled, except wakeups) >>>> =C2=A0=C2=A0=C2=A0 [most of Xen specific staff has to be suspended at = this point] >>>> - disable_secondary_cpus >>>> - arch disable IRQ (from this point no IRQs allowed, no timers, no >>>> scheduling) >>>> - syscore_suspend >>>> =C2=A0=C2=A0=C2=A0 [rest here] >>>> - platform->enter() (suspended) >>>> >>>> You can't just overwrite platform_suspend_ops, because ARM64 is >>>> expected to enter >>>> suspend through PSCI FW interface: >>>> drivers/firmware/psci/psci.c >>>> =C2=A0=C2=A0 static const struct platform_suspend_ops psci_suspend_ops= =3D { >>> >>> Does this apply to a VM on ARM64 too? At least on x86, the VM is >>> supposed to make a hypercall to tell Xen it suspended (the hypercall >>> will return only on resume). >>> >>>> As an option, some Xen components could be converted to use >>>> syscore_ops (but not xenstore), >>>> and some might need to use DD(dev_pm_ops). >>>> >>>>> >>>>> [1] https://github.com/marmarek/linux/ >>>>> commit/47cfdb991c85566c9c333570511e67bf477a5da6 >>>> >>>> -- >>>> Best regards, >>>> -grygorii >>>> >>> >>> [2] https://github.com/QubesOS/qubes-linux-kernel/blob/main/xen-pm- >>> use-suspend.patch >>> >> >> On my setup I get a weird behavior when trying to suspend (s2idle) a >> Linux guest. >> Doing echo freeze > /sys/power/state in the guest seems to "freeze" the >> guest for good, I could not unfreeze it afterward. >> VCPU goes to 100% according to XenOrchestra >> xl list shows state "r" but xl console blocks forever >> xl shutdown would block for some time and then print: >> Shutting down domain 721 >> ?ibxl: error: libxl_domain.c:848:pvcontrol_cb: guest didn't acknowledge >> control request: -9 >> shutdown failed (rc=3D-9) >> >> Do you think it's related to your current issue? > > idle=3Dhalt on the Linux command line addresses the 100% CPU usage.=C2=A0= Or > alternatively C2 needs to be implemented for guest vcpus.=C2=A0 I forget > preceisely, but I think the 100% CPU is because there are no C-states > available and Linux/cpuidle won't use halt by default. > > To wake up, you need a wake up source.=C2=A0 The ACPI buttons presses wil= l do > that: > xl trigger $dom power > xl trigger $dom sleep > > However, I think without changes, domU s2idle/S3 will detach all its PV > devices.=C2=A0 Naturally they don't get reconnected on resume.=C2=A0 You = can hack > around that to skip the detach. > > Actually, maybe we just need: > --- i/drivers/xen/xenbus/xenbus_probe_frontend.c > +++ w/drivers/xen/xenbus/xenbus_probe_frontend.c > @@ -148,8 +148,6 @@ static void xenbus_frontend_dev_shutdown(struct > device *_dev) > =C2=A0} > > =C2=A0static const struct dev_pm_ops xenbus_pm_ops =3D { > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 .suspend=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0 =3D xenbus_dev_suspend, > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 .resume=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0 =3D xenbus_frontend_dev_resume, > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 .freeze=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D xenbus_dev_suspend, > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 .thaw=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D xenbus_dev_cancel, > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 .restore=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0 =3D xenbus_dev_resume, > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 .restore=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0 =3D xenbus_frontend_dev_resume, > =C2=A0}; > > b3e96c0c7562 ("xen: use freeze/restore/thaw PM events for suspend/ > resume/chkpt") changed from PMSG_SUSPEND/PMSG_RESUME to PMSG_FREEZE/ > PMSG_THAW/PMSG_RESTORE, but the suspend/resume callbacks remained.=C2=A0 = But > freeze and suspend being identical doesn't seem correct. > > This would leave xl save/restore/migrate using the hibernate freeze/ > thaw/resume.=C2=A0 S3/s2idle would no touch the PV devices, so they would= > still be present on resume.=C2=A0 Maybe there are cases I am not thinking= of > though. > > Regards, > Jason > Hi all, I finally took time to try what you guyz advised, thanks for all the answers! So, I tried this on a clean Debian 13 VM install on a XCP-ng 8.3 (Xen 4.17.5 with local patches) host. 1/ Just booting with idle=3Dhalt/nomwait/poll didn't help with waking up the VM, it kept being in a weird unwakable state. Even providing xl trigger power/sleep events. Although I reckon you were saying it would help with the CPU@100% and indeed I don't see this anymore. 2/ Just applying QubesOS patch https://github.com/QubesOS/qubes-linux-kernel/blob/main/xen-events-Add-wake= up-support-to-xen-pirq.patch did help *a bit*. Hitting a key would wake the VM, then show again the Debian desktop, with some flickering, allowing to move the mouse and bit and hitting some keys on the keyboard ... then it would very quickly completely freeze and stay dead. 3/ on top of previous patch, applying your modification (removing .suspend, .resume and changing .restore to xenbus_frontend_dev_resume): then tadaaa I can wake the VM and it stays alive afterward. It seems it fixes the issue (I did not test for very very long though). Thanks for the help on this! What do you think we should do to move this forward? Submit those changes to upstream Linux? That will take long to end up in distros... -- -- Yann Sionneau | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Thu Nov 13 16:19:05 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Nov 2025 16:19:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1161867.1489696 (Exim 4.92) (envelope-from ) id 1vJa2G-0001P5-AN; Thu, 13 Nov 2025 16:19:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1161867.1489696; Thu, 13 Nov 2025 16:19:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJa2G-0001Oy-6b; Thu, 13 Nov 2025 16:19:00 +0000 Received: by outflank-mailman (input) for mailman id 1161867; Thu, 13 Nov 2025 16:18:59 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vJa2E-0001Om-PG for xen-devel@lists.xenproject.org; Thu, 13 Nov 2025 16:18:59 +0000 Received: from mail-ej1-x635.google.com (mail-ej1-x635.google.com [2a00:1450:4864:20::635]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 72a4f186-c0ac-11f0-980a-7dc792cee155; Thu, 13 Nov 2025 17:18:54 +0100 (CET) Received: by mail-ej1-x635.google.com with SMTP id a640c23a62f3a-b733707e0b5so148073866b.2 for ; Thu, 13 Nov 2025 08:18:54 -0800 (PST) Received: from [192.168.1.6] (user-109-243-71-38.play-internet.pl. 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It will be added into >> p2m_init() when the latter will be introduced. > Well, thanks, but ... > >> - Introduce pre_gstage_init(). > ... the same comment that I gave before now applies here: This doesn't look to > belong directly in start_xen(). In x86'es terms I'd say this is a tiny part of > paging_init(). Does it only the question of function naming now? IMO, ideally it would be nice to have it in p2m_init(), but there is no a lot of sense to detect supported modes each time a domain is constructed. And it is the reason why I put directly to start_xen(). > >> --- a/xen/arch/riscv/include/asm/riscv_encoding.h >> +++ b/xen/arch/riscv/include/asm/riscv_encoding.h >> @@ -131,13 +131,16 @@ >> #define HGATP_MODE_SV32X4 _UL(1) >> #define HGATP_MODE_SV39X4 _UL(8) >> #define HGATP_MODE_SV48X4 _UL(9) >> +#define HGATP_MODE_SV57X4 _UL(10) >> >> #define HGATP32_MODE_SHIFT 31 >> +#define HGATP32_MODE_MASK _UL(0x80000000) > Please can we avoid redundant (and then not even connected) #define-s? I > don't see why you would need HGATP32_MODE_SHIFT when you have > HGATP32_MODE_MASK. Similarly ... > >> #define HGATP32_VMID_SHIFT 22 >> #define HGATP32_VMID_MASK _UL(0x1FC00000) > ... here, while ... > >> #define HGATP32_PPN _UL(0x003FFFFF) > ... here the constant isn't even suffixed with _MASK. I agree that it is enough to have only *_MASK. I can do a separate cleanup patch (as what mentioned below were already introduced before) which will drop: HGATP32_MODE_SHIFT, HGATP32_VMID_SHIFT, HGATP64_MODE_SHIFT, HGATP64_VMID_SHIFT and rename: HGATP*_PPN to HGATP*_PPN_MASK Does it make sense? > >> --- /dev/null >> +++ b/xen/arch/riscv/p2m.c >> @@ -0,0 +1,96 @@ >> +/* SPDX-License-Identifier: GPL-2.0-only */ >> + >> +#include >> +#include >> +#include >> +#include >> + >> +#include >> +#include >> +#include >> + >> +unsigned char __ro_after_init gstage_mode; >> + >> +static void __init gstage_mode_detect(void) >> +{ >> + static const struct { >> + unsigned char mode; >> + unsigned int paging_levels; >> + const char name[8]; >> + } modes[] __initconst = { >> + /* >> + * Based on the RISC-V spec: >> + * Bare mode is always supported, regardless of SXLEN. >> + * When SXLEN=32, the only other valid setting for MODE is Sv32. >> + * When SXLEN=64, three paged virtual-memory schemes are defined: >> + * Sv39, Sv48, and Sv57. >> + */ >> +#ifdef CONFIG_RISCV_32 >> + { HGATP_MODE_SV32X4, 2, "Sv32x4" } >> +#else >> + { HGATP_MODE_SV39X4, 3, "Sv39x4" }, >> + { HGATP_MODE_SV48X4, 4, "Sv48x4" }, >> + { HGATP_MODE_SV57X4, 5, "Sv57x4" }, >> +#endif >> + }; >> + >> + unsigned int mode_idx; >> + >> + gstage_mode = HGATP_MODE_OFF; > Why is this not the variable's initializer? Good point. It should be the variable's initializer. >> + for ( mode_idx = 0; mode_idx < ARRAY_SIZE(modes); mode_idx++ ) >> + { >> + unsigned long mode = modes[mode_idx].mode; >> + >> + csr_write(CSR_HGATP, MASK_INSR(mode, HGATP_MODE_MASK)); >> + >> + if ( MASK_EXTR(csr_read(CSR_HGATP), HGATP_MODE_MASK) == mode ) >> + { >> + gstage_mode = mode; >> + break; >> + } >> + } > I take it that using the first available mode is only transient. To support bigger > guests, you may need to pick 48x4 or even 57x4 no matter that 39x4 is available. I considered traversing the|modes[]| array in the opposite order so that the largest mode would be checked first. However, I decided that 39x4 is sufficiently large and provides a good balance between the number of page tables and supported address space, at least for now. > I wonder whether you wouldn't be better off recording all supported modes right > away. What would be the use case for recording and storing all supported modes? For example, would it be used to indicate which mode is preferable for a guest domain via the device tree? Also, I’d like to note that it probably doesn’t make much sense to record all supported modes. If we traverse the|modes[]| array in the opposite order—checking |Sv57| first—then, according to the RISC-V specification: - Implementations that support Sv57 must also support Sv48. - Implementations that support Sv48 must also support Sv39. So if Sv57 is supported then lower modes are supported too. (except Sv32 for RV32) Based on this, it seems reasonable to start checking from Sv57, right? Thanks. ~ Oleksii --------------iu02vib3uDmsZBA82REi1e6F Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: 8bit


On 11/6/25 2:43 PM, Jan Beulich wrote:
On 20.10.2025 17:57, Oleksii Kurochko wrote:

Changes in V5:
 - Add static and __initconst for local variable modes[] in
   gstage_mode_detect().
 - Change type for gstage_mode from 'unsigned long' to 'unsigned char'.
 - Update the comment inisde defintion if modes[] variable in
   gstage_mode_detect():
   - Add information about Bare mode.
   - Drop "a paged virtual-memory scheme described in Section 10.3" as it isn't
     relevant here.
 - Drop printing of function name when chosen G-stage mode message is printed.
 - Drop the call of gstage_mode_detect() from start_xen(). It will be added into
   p2m_init() when the latter will be introduced.

Well, thanks, but ...


 - Introduce pre_gstage_init().

... the same comment that I gave before now applies here: This doesn't look to
belong directly in start_xen(). In x86'es terms I'd say this is a tiny part of
paging_init().
Does it only the question of function naming now?

IMO, ideally it would be nice to have it in p2m_init(), but there is no a lot of
sense to detect supported modes each time a domain is constructed. And it is the
reason why I put directly to start_xen().




--- a/xen/arch/riscv/include/asm/riscv_encoding.h
+++ b/xen/arch/riscv/include/asm/riscv_encoding.h
@@ -131,13 +131,16 @@
 #define HGATP_MODE_SV32X4		_UL(1)
 #define HGATP_MODE_SV39X4		_UL(8)
 #define HGATP_MODE_SV48X4		_UL(9)
+#define HGATP_MODE_SV57X4		_UL(10)
 
 #define HGATP32_MODE_SHIFT		31
+#define HGATP32_MODE_MASK		_UL(0x80000000)

Please can we avoid redundant (and then not even connected) #define-s? I
don't see why you would need HGATP32_MODE_SHIFT when you have
HGATP32_MODE_MASK. Similarly ...


 #define HGATP32_VMID_SHIFT		22
 #define HGATP32_VMID_MASK		_UL(0x1FC00000)

... here, while ...


 #define HGATP32_PPN			_UL(0x003FFFFF)

... here the constant isn't even suffixed with _MASK.
I agree that it is enough to have only *_MASK.

I can do a separate cleanup patch (as what mentioned below were already introduced
before) which will drop:
 HGATP32_MODE_SHIFT, HGATP32_VMID_SHIFT, HGATP64_MODE_SHIFT, HGATP64_VMID_SHIFT
and rename:
 HGATP*_PPN to HGATP*_PPN_MASK

Does it make sense?




--- /dev/null
+++ b/xen/arch/riscv/p2m.c
@@ -0,0 +1,96 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <xen/init.h>
+#include <xen/lib.h>
+#include <xen/macros.h>
+#include <xen/sections.h>
+
+#include <asm/csr.h>
+#include <asm/flushtlb.h>
+#include <asm/riscv_encoding.h>
+
+unsigned char __ro_after_init gstage_mode;
+
+static void __init gstage_mode_detect(void)
+{
+    static const struct {
+        unsigned char mode;
+        unsigned int paging_levels;
+        const char name[8];
+    } modes[] __initconst = {
+        /*
+         * Based on the RISC-V spec:
+         *   Bare mode is always supported, regardless of SXLEN.
+         *   When SXLEN=32, the only other valid setting for MODE is Sv32.
+         *   When SXLEN=64, three paged virtual-memory schemes are defined:
+         *   Sv39, Sv48, and Sv57.
+         */
+#ifdef CONFIG_RISCV_32
+        { HGATP_MODE_SV32X4, 2, "Sv32x4" }
+#else
+        { HGATP_MODE_SV39X4, 3, "Sv39x4" },
+        { HGATP_MODE_SV48X4, 4, "Sv48x4" },
+        { HGATP_MODE_SV57X4, 5, "Sv57x4" },
+#endif
+    };
+
+    unsigned int mode_idx;
+
+    gstage_mode = HGATP_MODE_OFF;

Why is this not the variable's initializer?
Good point. It should be the variable's initializer.



      

        
+    for ( mode_idx = 0; mode_idx < ARRAY_SIZE(modes); mode_idx++ )
+    {
+        unsigned long mode = modes[mode_idx].mode;
+
+        csr_write(CSR_HGATP, MASK_INSR(mode, HGATP_MODE_MASK));
+
+        if ( MASK_EXTR(csr_read(CSR_HGATP), HGATP_MODE_MASK) == mode )
+        {
+            gstage_mode = mode;
+            break;
+        }
+    }


      

      
I take it that using the first available mode is only transient. To support bigger
guests, you may need to pick 48x4 or even 57x4 no matter that 39x4 is available.

    

    
I considered traversing the modes[] array in the opposite order so that the largest
mode would be checked first. However, I decided that 39x4 is sufficiently large and
provides a good balance between the number of page tables and supported address
space, at least for now.



    

      
I wonder whether you wouldn't be better off recording all supported modes right
away.

    

    
What would be the use case for recording and storing all supported modes?
For example, would it be used to indicate which mode is preferable for a guest
domain via the device tree?

    
Also, I’d like to note that it probably doesn’t make much sense to record all
supported modes. If we traverse the modes[] array in the opposite order—checking
Sv57 first—then, according to the RISC-V specification:
- Implementations that support Sv57 must also support Sv48.
- Implementations that support Sv48 must also support Sv39.
So if Sv57 is supported then lower modes are supported too. (except Sv32 for RV32)

    
Based on this, it seems reasonable to start checking from Sv57, right?

Thanks.

~ Oleksii

  


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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich 
Subject: [PATCH for-4.19] mktarball: Use root/root for internal ownership
Date: Thu, 13 Nov 2025 16:20:48 +0000
Message-Id: <20251113162048.224485-1-andrew.cooper3@citrix.com>
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... rather than leaking whomever created the tarball.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 

And backport to 4.17 as there's still one more release to do there.
---
 tools/misc/mktarball | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/misc/mktarball b/tools/misc/mktarball
index 42d543073cfc..15a4e0bfad62 100755
--- a/tools/misc/mktarball
+++ b/tools/misc/mktarball
@@ -49,6 +49,6 @@ git_archive_into $xen_root/tools/qemu-xen-traditional-dir-remote $tdir/xen-$desc
 
 git_archive_into $xen_root/extras/mini-os-remote $tdir/xen-$desc/extras/mini-os
 
-GZIP=-9v tar cz -f $xen_root/dist/xen-$desc.tar.gz -C $tdir xen-$desc
+GZIP=-9v tar cz -f $xen_root/dist/xen-$desc.tar.gz --owner 0 --group 0 -C $tdir xen-$desc
 
 echo "Source tarball in $xen_root/dist/xen-$desc.tar.gz"

base-commit: 3fb951af741ab2faa5a44d413fe1393cdeea05c4
-- 
2.39.5



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Date: Thu, 13 Nov 2025 17:32:26 +0100
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [for 4.22 v5 01/18] xen/riscv: detect and initialize G-stage mode
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: 
 <2b21348b3300c741b276a47d5942e71d306846eb.1760974017.git.oleksii.kurochko@gmail.com>
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On 13.11.2025 17:18, Oleksii Kurochko wrote:
> On 11/6/25 2:43 PM, Jan Beulich wrote:
>> On 20.10.2025 17:57, Oleksii Kurochko wrote:
>>> Changes in V5:
>>>   - Add static and __initconst for local variable modes[] in
>>>     gstage_mode_detect().
>>>   - Change type for gstage_mode from 'unsigned long' to 'unsigned char'.
>>>   - Update the comment inisde defintion if modes[] variable in
>>>     gstage_mode_detect():
>>>     - Add information about Bare mode.
>>>     - Drop "a paged virtual-memory scheme described in Section 10.3" as it isn't
>>>       relevant here.
>>>   - Drop printing of function name when chosen G-stage mode message is printed.
>>>   - Drop the call of gstage_mode_detect() from start_xen(). It will be added into
>>>     p2m_init() when the latter will be introduced.
>> Well, thanks, but ...
>>
>>>   - Introduce pre_gstage_init().
>> ... the same comment that I gave before now applies here: This doesn't look to
>> belong directly in start_xen(). In x86'es terms I'd say this is a tiny part of
>> paging_init().
> 
> Does it only the question of function naming now?

Not just, no. My point is that you shouldn't pollute start_xen() with calls to
dozens of special-purpose functions. There wants to be one call dealing with
everything guest-mm related, I think.

> IMO, ideally it would be nice to have it in p2m_init(), but there is no a lot of
> sense to detect supported modes each time a domain is constructed. And it is the
> reason why I put directly to start_xen().

No per-domain function wants to be used for this, I agree. Hence why I pointed
you at x86'es paging_init().

>>> --- /dev/null
>>> +++ b/xen/arch/riscv/p2m.c
>>> @@ -0,0 +1,96 @@
>>> +/* SPDX-License-Identifier: GPL-2.0-only */
>>> +
>>> +#include 
>>> +#include 
>>> +#include 
>>> +#include 
>>> +
>>> +#include 
>>> +#include 
>>> +#include 
>>> +
>>> +unsigned char __ro_after_init gstage_mode;
>>> +
>>> +static void __init gstage_mode_detect(void)
>>> +{
>>> +    static const struct {
>>> +        unsigned char mode;
>>> +        unsigned int paging_levels;
>>> +        const char name[8];
>>> +    } modes[] __initconst = {
>>> +        /*
>>> +         * Based on the RISC-V spec:
>>> +         *   Bare mode is always supported, regardless of SXLEN.
>>> +         *   When SXLEN=32, the only other valid setting for MODE is Sv32.
>>> +         *   When SXLEN=64, three paged virtual-memory schemes are defined:
>>> +         *   Sv39, Sv48, and Sv57.
>>> +         */
>>> +#ifdef CONFIG_RISCV_32
>>> +        { HGATP_MODE_SV32X4, 2, "Sv32x4" }
>>> +#else
>>> +        { HGATP_MODE_SV39X4, 3, "Sv39x4" },
>>> +        { HGATP_MODE_SV48X4, 4, "Sv48x4" },
>>> +        { HGATP_MODE_SV57X4, 5, "Sv57x4" },
>>> +#endif
>>> +    };
>>> +
>>> +    unsigned int mode_idx;
>>> +
>>> +    gstage_mode = HGATP_MODE_OFF;
>> Why is this not the variable's initializer?
> 
> Good point. It should be the variable's initializer.
> 
>>> +    for ( mode_idx = 0; mode_idx < ARRAY_SIZE(modes); mode_idx++ )
>>> +    {
>>> +        unsigned long mode = modes[mode_idx].mode;
>>> +
>>> +        csr_write(CSR_HGATP, MASK_INSR(mode, HGATP_MODE_MASK));
>>> +
>>> +        if ( MASK_EXTR(csr_read(CSR_HGATP), HGATP_MODE_MASK) == mode )
>>> +        {
>>> +            gstage_mode = mode;
>>> +            break;
>>> +        }
>>> +    }
>> I take it that using the first available mode is only transient. To support bigger
>> guests, you may need to pick 48x4 or even 57x4 no matter that 39x4 is available.
> 
> I considered traversing the|modes[]| array in the opposite order so that the largest
> mode would be checked first. However, I decided that 39x4 is sufficiently large and
> provides a good balance between the number of page tables and supported address
> space, at least for now.
> 
>> I wonder whether you wouldn't be better off recording all supported modes right
>> away.
> 
> What would be the use case for recording and storing all supported modes?
> For example, would it be used to indicate which mode is preferable for a guest
> domain via the device tree?

Why device tree? That's what's exposed to guests, isn't it? Here we talk about
what Xen uses to run guests. And that can vary from guest to guest.

> Also, I’d like to note that it probably doesn’t make much sense to record all
> supported modes. If we traverse the|modes[]| array in the opposite order—checking
> |Sv57| first—then, according to the RISC-V specification:
> - Implementations that support Sv57 must also support Sv48.
> - Implementations that support Sv48 must also support Sv39.
> So if Sv57 is supported then lower modes are supported too. (except Sv32 for RV32)
> 
> Based on this, it seems reasonable to start checking from Sv57, right?

No. Bigger guests want running in 48x4, huge ones in 57x4 (each: if available),
and most ones in 39x4. It doesn't matter what direction you do the checks, you
want to know what you have available.

Jan


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On 13.11.2025 17:20, Andrew Cooper wrote:
> ... rather than leaking whomever created the tarball.
> 
> Signed-off-by: Andrew Cooper 
> ---
> CC: Jan Beulich 
> 
> And backport to 4.17 as there's still one more release to do there.

Fine with me:
Acked-by: Jan Beulich 

Jan


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Subject: Re: [PATCH 2/5] build: add new make pattern for making file from
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To: Juergen Gross 
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On 11.11.2025 17:19, Juergen Gross wrote:
> --- a/Config.mk
> +++ b/Config.mk
> @@ -159,6 +159,20 @@ define move-if-changed
>  	if ! cmp -s $(1) $(2); then mv -f $(1) $(2); else rm -f $(1); fi
>  endef
>  
> +PATH_FILES := Paths
> +INC_FILES := $(foreach f, $(PATH_FILES), $(XEN_ROOT)/config/$(f).mk)
> +
> +include $(INC_FILES)
> +
> +BUILD_MAKE_VARS := $(foreach f, $(PATH_FILES), $(shell awk '$$2 == ":=" { print $$1; }' $(XEN_ROOT)/config/$(f).mk.in))
> +
> +define apply-build-vars
> +	sed $(foreach v, $(BUILD_MAKE_VARS), -e 's#@$(v)@#$($(v))#g') <$< >$@
> +endef
> +
> +%:: %.src
> +	$(apply-build-vars)

I'm not convinced of having this here, rather than in less central places (say
under tools/ and docs/). I'm also not sure I really understand why it needs to
be .src - can't we stick to .in, enumerating the specific files that want
generating this way (thus avoiding accidental attempts to re-generate files
which need generating a different way)?

Also - why the double colon here?

(Maybe I figure answers to these questions as I look at subsequent patches.)

Jan


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Subject: Re: [PATCH 4/5] config: remove unused paths from config/Paths.mk.in
To: Juergen Gross 
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On 11.11.2025 17:19, Juergen Gross wrote:
> --- a/config/Paths.mk.in
> +++ b/config/Paths.mk.in
> @@ -20,10 +20,7 @@ libexecdir               := @libexecdir@
>  datarootdir              := @datarootdir@
>  mandir                   := @mandir@
>  docdir                   := @docdir@
> -dvidir                   := @dvidir@
>  htmldir                  := @htmldir@
> -pdfdir                   := @pdfdir@

Question is whether we're mistakenly not respecting in particular this one,
for the *.pdf we create. For all the others I agree there's no (present or
potential) use. I notice though that docs/Makefile cleans e.g. *.dvi
nevertheless.

Jan

> -psdir                    := @psdir@
>  includedir               := @includedir@
>  localstatedir            := @localstatedir@
>  sysconfdir               := @sysconfdir@
> @@ -34,8 +31,6 @@ LIBEXEC_LIB              := @LIBEXEC_LIB@
>  LIBEXEC_INC              := @LIBEXEC_INC@
>  
>  SHAREDIR                 := @SHAREDIR@
> -MAN1DIR                  := $(mandir)/man1
> -MAN8DIR                  := $(mandir)/man8
>  
>  XEN_RUN_DIR              := @XEN_RUN_DIR@
>  XEN_LOG_DIR              := @XEN_LOG_DIR@



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Subject: Re: [PATCH 4/5] config: remove unused paths from config/Paths.mk.in
From: Jan Beulich 
To: Juergen Gross 
Cc: Anthony PERARD , xen-devel@lists.xenproject.org
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On 13.11.2025 17:59, Jan Beulich wrote:
> On 11.11.2025 17:19, Juergen Gross wrote:
>> --- a/config/Paths.mk.in
>> +++ b/config/Paths.mk.in
>> @@ -20,10 +20,7 @@ libexecdir               := @libexecdir@
>>  datarootdir              := @datarootdir@
>>  mandir                   := @mandir@
>>  docdir                   := @docdir@
>> -dvidir                   := @dvidir@
>>  htmldir                  := @htmldir@
>> -pdfdir                   := @pdfdir@
> 
> Question is whether we're mistakenly not respecting in particular this one,
> for the *.pdf we create. For all the others I agree there's no (present or
> potential) use. I notice though that docs/Makefile cleans e.g. *.dvi
> nevertheless.

Actually, I can't spot a use of htmldir either, when likely we should respect
that one, too.

Jan


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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Paul Durrant ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH] x86/viridian: use hv_timer_message_payload struct
Date: Thu, 13 Nov 2025 18:24:13 +0100
Message-ID: <20251113172413.87938-1-roger.pau@citrix.com>
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Instead of open-coding the struct type in
viridian_synic_deliver_timer_msg().  Additionally expand the union field
in hv_message struct to contain the timer payload, this way the memcpy in
viridian_synic_deliver_timer_msg() can be replaced with a struct assign.

No functional change intended.

Signed-off-by: Roger Pau Monné 
---
 xen/arch/x86/hvm/viridian/synic.c            | 17 ++++++----------
 xen/arch/x86/include/asm/guest/hyperv-tlfs.h | 21 ++++++++++----------
 2 files changed, 17 insertions(+), 21 deletions(-)

diff --git a/xen/arch/x86/hvm/viridian/synic.c b/xen/arch/x86/hvm/viridian/synic.c
index e6cba7548f1b..6d7b6bd0eda2 100644
--- a/xen/arch/x86/hvm/viridian/synic.c
+++ b/xen/arch/x86/hvm/viridian/synic.c
@@ -327,15 +327,10 @@ bool viridian_synic_deliver_timer_msg(struct vcpu *v, unsigned int sintx,
     struct viridian_vcpu *vv = v->arch.hvm.viridian;
     const union hv_synic_sint *vs = &vv->sint[sintx];
     struct hv_message *msg = vv->simp.ptr;
-    struct {
-        uint32_t TimerIndex;
-        uint32_t Reserved;
-        uint64_t ExpirationTime;
-        uint64_t DeliveryTime;
-    } payload = {
-        .TimerIndex = index,
-        .ExpirationTime = expiration,
-        .DeliveryTime = delivery,
+    const struct hv_timer_message_payload payload = {
+        .timer_index = index,
+        .expiration_time = expiration,
+        .delivery_time = delivery,
     };
 
     /* Don't assume SIM page to be mapped. */
@@ -359,8 +354,8 @@ bool viridian_synic_deliver_timer_msg(struct vcpu *v, unsigned int sintx,
     msg->header.message_flags.msg_pending = 0;
     msg->header.payload_size = sizeof(payload);
 
-    BUILD_BUG_ON(sizeof(payload) > sizeof(msg->u.payload));
-    memcpy(msg->u.payload, &payload, sizeof(payload));
+    BUILD_BUG_ON(sizeof(msg->payload.timer) > sizeof(msg->payload.raw));
+    msg->payload.timer = payload;
 
     if ( !vs->masked && vlapic_enabled(vcpu_vlapic(v)) )
         vlapic_set_irq(vcpu_vlapic(v), vs->vector, 0);
diff --git a/xen/arch/x86/include/asm/guest/hyperv-tlfs.h b/xen/arch/x86/include/asm/guest/hyperv-tlfs.h
index 79cfc90dd8ec..18da73c74e03 100644
--- a/xen/arch/x86/include/asm/guest/hyperv-tlfs.h
+++ b/xen/arch/x86/include/asm/guest/hyperv-tlfs.h
@@ -527,12 +527,21 @@ struct hv_message_header {
 	};
 };
 
+/* Define timer message payload structure. */
+struct hv_timer_message_payload {
+	uint32_t timer_index;
+	uint32_t reserved;
+	uint64_t expiration_time; /* When the timer expired */
+	uint64_t delivery_time;   /* When the message was delivered */
+};
+
 /* Define synthetic interrupt controller message format. */
 struct hv_message {
 	struct hv_message_header header;
 	union {
-		uint64_t payload[HV_MESSAGE_PAYLOAD_QWORD_COUNT];
-	} u;
+		struct hv_timer_message_payload timer;
+		uint64_t raw[HV_MESSAGE_PAYLOAD_QWORD_COUNT];
+	} payload;
 };
 
 /* Define the synthetic interrupt message page layout. */
@@ -540,14 +549,6 @@ struct hv_message_page {
 	struct hv_message sint_message[HV_SYNIC_SINT_COUNT];
 };
 
-/* Define timer message payload structure. */
-struct hv_timer_message_payload {
-	uint32_t timer_index;
-	uint32_t reserved;
-	uint64_t expiration_time; /* When the timer expired */
-	uint64_t delivery_time;   /* When the message was delivered */
-};
-
 struct hv_nested_enlightenments_control {
 	struct {
 		uint32_t directhypercall:1;
-- 
2.51.0



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Feedback-ID: i1568416f:Fastmail
Date: Thu, 13 Nov 2025 18:30:59 +0100
From: Marek Marczykowski 
To: Jan Beulich 
Cc: "xen-devel@lists.xenproject.org" ,
	Daniel Smith ,
	Andrew Cooper ,
	Julien Grall ,
	Stefano Stabellini ,
	Anthony PERARD ,
	Michal Orzel ,
	Roger Pau =?utf-8?B?TW9ubsOp?= 
Subject: Re: [PATCH 2/3] x86/EFI: replace ebmalloc()
Message-ID: 
References: 
 <452fdf1f-646a-4bb1-83ea-ac4c998a096b@suse.com>
 
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Date: Thu, 13 Nov 2025 18:30:59 +0100
From: Marek Marczykowski 
To: Jan Beulich 
Cc: "xen-devel@lists.xenproject.org" ,
	Daniel Smith ,
	Andrew Cooper ,
	Julien Grall ,
	Stefano Stabellini ,
	Anthony PERARD ,
	Michal Orzel ,
	Roger Pau =?utf-8?B?TW9ubsOp?= 
Subject: Re: [PATCH 2/3] x86/EFI: replace ebmalloc()

On Thu, Nov 13, 2025 at 02:24:38PM +0100, Jan Beulich wrote:
> On 13.11.2025 13:59, Marek Marczykowski wrote:
> > On Thu, Nov 13, 2025 at 01:46:20PM +0100, Jan Beulich wrote:
> >> On 13.11.2025 13:40, Marek Marczykowski wrote:
> >>> On Thu, Nov 13, 2025 at 12:09:37PM +0100, Jan Beulich wrote:
> >>>> --- a/xen/arch/x86/include/asm/brk.h
> >>>> +++ b/xen/arch/x86/include/asm/brk.h
> >>>> @@ -2,6 +2,10 @@
> >>>> =20
> >>>>  #include 
> >>>> =20
> >>>> +#define DEFINE_BRK(var, size) \
> >>>> +    static char __section(".bss..brk.page_aligned") __aligned(PAGE_=
SIZE) \
> >>>> +        __used var ## _brk_[size]
> >>>
> >>> This chunk belongs to the previous patch I think.
> >>
> >> It could, but it's not used there yet (i.e. would count as dead code).
> >=20
> > But in the current shape the linker script change in the first patch is
> > unused. IOW, I think adding .bss..brk.page_aligned to the linker script
> > should go together with DEFINE_BRK.
>=20
> Again - could be done that way, but there's no concept of "dead code" in
> the linker script (afaik at least).

Anyway, I voiced my opinion, but it isn't important enough to block the
patch on it. Either way:

Reviewed-by: Marek Marczykowski-G=C3=B3recki 

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Date: Thu, 13 Nov 2025 18:41:19 +0100
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Jan Beulich 
Cc: "xen-devel@lists.xenproject.org" ,
	Andrew Cooper ,
	Roger Pau =?utf-8?B?TW9ubsOp?= 
Subject: Re: [PATCH 1/3] x86: introduce "brk" allocator
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Date: Thu, 13 Nov 2025 18:41:19 +0100
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Jan Beulich 
Cc: "xen-devel@lists.xenproject.org" ,
	Andrew Cooper ,
	Roger Pau =?utf-8?B?TW9ubsOp?= 
Subject: Re: [PATCH 1/3] x86: introduce "brk" allocator

On Thu, Nov 13, 2025 at 12:08:18PM +0100, Jan Beulich wrote:
> ... to replace ebmalloc(), and then to find further use(s) to allow
> recovering memory which is needed very early (and hence needs setting up
> statically), but may not fully be used (or not used at all).
>=20
> Note that unlike free_ebmalloc_unused_mem(), brk_free_unused() (once
> other code is converted) will be able to free part of the BRK space even
> in the xen.efi case. That would happen if BRK space extends across a 2Mb
> boundary, and actual use stops before that boundary.
>=20
> Signed-off-by: Jan Beulich 
> ---
> Changing setup.c's reserve_e820_ram() uses would be cumbersome when done
> right here. That'll be done when ebmalloc() is replaced, and hence
> what's there can also simply be replaced.
>=20
> The xen.efi detection may want separating out into a helper.
>=20
> When linking xen.efi, ld produces a base relocation for the reference to
> __subsystem__, which is wrong (that's an absolute symbol, after all).
> While that will need fixing there, it does no harm for our purposes.
>=20
> --- a/xen/arch/x86/boot/Makefile
> +++ b/xen/arch/x86/boot/Makefile
> @@ -1,4 +1,5 @@
>  obj-bin-y +=3D head.o
> +obj-bin-y +=3D brk.init.o
>  obj-bin-y +=3D built-in-32.o
>  obj-bin-y +=3D $(obj64)
> =20
> --- /dev/null
> +++ b/xen/arch/x86/boot/brk.c
> @@ -0,0 +1,72 @@
> +/* SPDX-License-Identifier: GPL-2.0-or-later */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +
> +extern char __brk_start[];
> +extern const char __bss_end[];
> +
> +static unsigned long __initdata allocated;
> +static bool __initdata finished;
> +
> +void *__init brk_alloc(size_t size)
> +{
> +    void *ptr =3D __brk_start + allocated;
> +
> +    if ( finished )
> +        return NULL;
> +
> +    /* Allocations PAGE_SIZE and up will be page-aligned. */
> +    if ( size >=3D PAGE_SIZE )
> +        allocated =3D ROUNDUP(allocated, PAGE_SIZE);
> +
> +    allocated +=3D ROUNDUP(size, sizeof(void *));
> +
> +    if ( allocated > __bss_end - __brk_start )
> +        return NULL;
> +
> +    return ptr;
> +}
> +
> +unsigned long __init brk_get_unused_start(void)

It's a bit unintuitive for brk_get_* to have this significant side
effect. Maybe name it brk_finalize_get_unused_start() ?

> +{
> +    finished =3D true;
> +
> +    allocated =3D ROUNDUP(allocated, PAGE_SIZE);
> +
> +    return (unsigned long)__brk_start + allocated;
> +}
> +
> +void __init brk_free_unused(void)
> +{
> +    unsigned long start =3D brk_get_unused_start(),
> +                  end =3D (unsigned long)__bss_end;
> +    unsigned int subsys;
> +
> +    /*
> +     * Only xen.efi will have the symbol __subsystem__ available, and it=
'll
> +     * be non-zero (10) there.  In ELF the symbol will be undefined, and
> +     * hence zero will be loaded into the register.
> +     */
> +    asm ( ".weak __subsystem__; mov $__subsystem__, %0" : "=3Dr" (subsys=
) );

Is this really the best way to detect xen.efi?

> +
> +    /* using_2M_mapping() isn't available here. */
> +    if ( IS_ENABLED(CONFIG_XEN_ALIGN_2M) || subsys )
> +        start =3D PAGE_ALIGN_2M(start);
> +
> +    if ( start >=3D end )
> +        return;
> +
> +    destroy_xen_mappings(start, PAGE_ALIGN_2M(end));
> +
> +    /*
> +     * By reserving needed space early in the E820 map, excess space get=
s freed
> +     * way before we make it here. Don't free the range a 2nd time.
> +     */
> +
> +    printk(XENLOG_INFO "Freed %lukB unused BRK memory\n", (end - start) =
>> 10);
> +}
> --- /dev/null
> +++ b/xen/arch/x86/include/asm/brk.h
> @@ -0,0 +1,7 @@
> +/* SPDX-License-Identifier: GPL-2.0-or-later */
> +
> +#include 
> +
> +void *brk_alloc(size_t size);
> +unsigned long brk_get_unused_start(void);
> +void brk_free_unused(void);
> --- a/xen/arch/x86/xen.lds.S
> +++ b/xen/arch/x86/xen.lds.S
> @@ -331,7 +331,11 @@ SECTIONS
>         __bss_start =3D .;
>         *(.bss.page_aligned*)
>         PERCPU_BSS
> -       *(.bss .bss.*)
> +       *(.bss .bss.[a-zA-Z0-9_]*)
> +       . =3D ALIGN(PAGE_SIZE);
> +       __brk_start =3D .;
> +       *(.bss..brk.page_aligned*)
> +       *(.bss..brk*)
>         . =3D ALIGN(POINTER_ALIGN);
>         __bss_end =3D .;
>    } PHDR(text)
> --- a/xen/arch/x86/mm.c
> +++ b/xen/arch/x86/mm.c
> @@ -112,6 +112,7 @@
>  #include 
>  #include 
> =20
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -337,6 +338,8 @@ void __init arch_init_memory(void)
> =20
>      efi_init_memory();
> =20
> +    brk_free_unused();
> +
>  #ifndef NDEBUG
>      if ( highmem_start )
>      {
>=20
>=20

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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From xen-devel-bounces@lists.xenproject.org Thu Nov 13 17:43:04 2025
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Date: Thu, 13 Nov 2025 09:42:50 -0800
From: Elliott Mitchell 
To: Juergen Gross 
Cc: xen-devel@lists.xenproject.org
Subject: Re: Xen DomU Bootloader Experiences
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On Thu, Nov 13, 2025 at 07:46:25AM +0100, Juergen Gross wrote:
> On 12.11.25 22:13, Elliott Mitchell wrote:
> > A few times there have been mentions of a need to choose between boot
> > methods for DomUs.  There is a need to decide on ones to recommend and
> > put effort into supportting.  I may not have tried that many nor done
> > particularly great amounts of experimentation, but I do have some
> > experience with multiple User Domain bootloaders.
> > 
> > PyGRUB
> > Xen's bootloader.  PyGRUB is quite functional within its limits.  In
> > particular it simulates the domain's environment in Domain 0.  This means
> > the security exposure is problematic.  Another big concern is that it
> > only does GRUB v1 syntax.  For a long while Debian had a package for
> > generating those files on a modern system, but that package was dropped.
> > 
> > Yet PyGRUB does avoid needing to use external tools to retrieve the
> > kernel.  If the kernel is updated inside the domain, this does get the
> > new kernel.  Further being architecture-independent this works on x86,
> > ARM*, RISC-V and PowerPC.
> > 
> > As it is the only GRUB-flavor loader available on ARM*, that is the only
> > place where I've used PyGRUB.
> 
> There is one further advantage for PyGRUB: it can look into the kernel
> _before_ the domU is being created, so it can tell Xen tools whether a
> 32- or 64-bit domU is needed based on the selected kernel.
> 
> This is the main reason why PyGRUB is still existing.

Okay.

While I can believe this is a big advantage in some environments, I
suspect this is rarely used.  Whereas the security profile of PyGRUB is
troublesome,  GRUBv1 syntax nearly overwhelms all advantages by itself.
Do you think changing the default to not build/install on x86 is
inappropriate?

I suspect Tianocore/EDK2's 32/64-bit support might be a better choice for
an environment where this matters.


> > PvGRUB
> > I'm sure nearly everyone knows about PvGRUB.  By being a proper port of
> > GRUB to run directly on Xen, it overcomes PyGRUB's disadvantages.  The
> > one disadvantage is needing to get patches into an external project for
> > changes in Xen.
> > 
> > Two changes to Xen urgently need propogation to PvGRUB.  I'm unsure
> > whether PvGRUB unmaps its mapping of vcpu_info data.  The second is
> > needing to work on ARM*, RISC-V and PowerPC.  The latter is the one and
> > only way in which PvGRUB is inferior to PyGRUB.
> > 
> > As PvGRUB is only available for x86, that is the only place I've used
> > PvGRUB.
> 
> Naming is difficult. :-)
> 
> You are talking about grub-pv. pv-grub is the Xen-internal variant based
> on Mini-OS and legacy grub 0.97, supporting grub for PV-domUs.
> 
> grub-pv comes basically in three flavors, all x86-only:
> 
> - for 32-bit PV-guests
> - for 64-bit PV-guests
> - for PVH-guests (32- or 64-bit)
> 
> Adding PVH support to upstream Grub for e.g. Arm should be rather easy.

I figured as much, yet this has not yet been done.  The other two
implementations using GRUBv1 syntax is a severe weakness.  I rate this as
high priority since GRUBv2 syntax is rather valuable.  I would try to
lay groundwork for RISC-V and PowerPC too.


> > EDK2/Tianocore
> > Quite well-known for being the basis of most x86 firmwares, plus being
> > part of a typical Qemu setup.  Not nearly as well known for being a Xen
> > DomU bootloader.
> > 
> > When it was working you would build their ArmVirtXen.dsc file and get
> > XEN_EFI.fd as output.  You would then use XEN_EFI.fd for the domain's
> > kernel.  If you looked at the console you saw something which looked and
> > acted pretty similar to a UEFI firmware on x86 machines.  This was
> > extremely functional for OSes which didn't particularly like GRUB.
> > Notably I've read of it being able to load a Redmond OS and it was quite
> > functional for booting an ARM64 port of FreeBSD.
> > 
> > Sometime after November 16th, 2022 or commit fff6d81270.  The built
> > images stopped functioning.  This is actually rather concerning since it
> > may also effects firmwares built for x86 HVM domains.  I don't presently
> > know whether there are multiple bugs, or a single one effecting all Xen
> > builds.
> > 
> > There is also an urgent need to get EDK2/Tianocore updated to match
> > Xen/ARM's disallowing mapping the shared information page multiple times.
> > As I did not wish to become deeply involved with EDK2/Tianocore I sent a
> > patch to xen-devel close to 1.5 years ago.  Lack of action suggests there
> > is an urgent need for a liason.
> > 
> > 
> > 
> > Recommendations:
> > PyGRUB is functional within its limits.  Problems are GRUBv1 syntax and
> > running within Domain 0.  Given this I feel the Xen Project should be
> > heading towards deprecating PyGRUB.  Since PvGRUB works for x86 now, I
> > would default to neither building nor installing PyGRUB on x86.  For
> > other architectures PyGRUB is still useful.
> > 
> > The Xen Project should formally ask the GRUB Project to port PvGRUB to
> > ARM, RISC-V and PowerPC.  The need for PvGRUB on ARM seems rather urgent.
> > Without a proper bootloader VMs aren't too useful.
> 
> Well, I did the grub-pvh implementation.
> 
> Doing that for other architectures shouldn't be rocket science. :-)

Okay.  I've seen some it written about a number of times and no action.


My reading had been the people most knowledgeable about adapting the
tools were unsure of how to direct effort.  Proper GRUBv2 is high-value
for Linux.  Tianocore/EDK2 is valuable for everyone, high value for non-
Linux.  Worst case Tianocore/EDK2 can boot GRUB-UEFI, I doubt GRUB can
boot Tianocore/EDK2.

Is there any scenario not adaquately addressed by trying for that pair?


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On 13/11/2025 5:24 pm, Roger Pau Monne wrote:
> diff --git a/xen/arch/x86/hvm/viridian/synic.c b/xen/arch/x86/hvm/viridian/synic.c
> index e6cba7548f1b..6d7b6bd0eda2 100644
> --- a/xen/arch/x86/hvm/viridian/synic.c
> +++ b/xen/arch/x86/hvm/viridian/synic.c
> @@ -327,15 +327,10 @@ bool viridian_synic_deliver_timer_msg(struct vcpu *v, unsigned int sintx,
>      struct viridian_vcpu *vv = v->arch.hvm.viridian;
>      const union hv_synic_sint *vs = &vv->sint[sintx];
>      struct hv_message *msg = vv->simp.ptr;
> -    struct {
> -        uint32_t TimerIndex;
> -        uint32_t Reserved;
> -        uint64_t ExpirationTime;
> -        uint64_t DeliveryTime;
> -    } payload = {
> -        .TimerIndex = index,
> -        .ExpirationTime = expiration,
> -        .DeliveryTime = delivery,
> +    const struct hv_timer_message_payload payload = {
> +        .timer_index = index,
> +        .expiration_time = expiration,
> +        .delivery_time = delivery,

Align these = for readability?

>      };
>  
>      /* Don't assume SIM page to be mapped. */
> @@ -359,8 +354,8 @@ bool viridian_synic_deliver_timer_msg(struct vcpu *v, unsigned int sintx,
>      msg->header.message_flags.msg_pending = 0;
>      msg->header.payload_size = sizeof(payload);
>  
> -    BUILD_BUG_ON(sizeof(payload) > sizeof(msg->u.payload));
> -    memcpy(msg->u.payload, &payload, sizeof(payload));
> +    BUILD_BUG_ON(sizeof(msg->payload.timer) > sizeof(msg->payload.raw));

This BUILD_BUG_ON() was only needed because of the memcpy() between
different types.  With structure assignment, the compiler will tell you
if the type mismatches.

Therefore, it's safe to drop.

Otherwise, Reviewed-by: Andrew Cooper 


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Date: Thu, 13 Nov 2025 19:35:31 +0100
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Frediano Ziglio 
Cc: xen-devel@lists.xenproject.org,
	Frediano Ziglio ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich , Julien Grall ,
	Roger Pau =?utf-8?B?TW9ubsOp?= ,
	Stefano Stabellini ,
	Frediano Ziglio ,
	Demi Marie Obenour ,
	Stewart Hildebrand ,
	Oleksii Kurochko 
Subject: Re: [PATCH v8] xen: Strip xen.efi by default
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Date: Thu, 13 Nov 2025 19:35:31 +0100
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Frediano Ziglio 
Cc: xen-devel@lists.xenproject.org,
	Frediano Ziglio ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich , Julien Grall ,
	Roger Pau =?utf-8?B?TW9ubsOp?= ,
	Stefano Stabellini ,
	Frediano Ziglio ,
	Demi Marie Obenour ,
	Stewart Hildebrand ,
	Oleksii Kurochko 
Subject: Re: [PATCH v8] xen: Strip xen.efi by default

On Thu, Nov 13, 2025 at 03:43:58PM +0000, Frediano Ziglio wrote:
> From: Frediano Ziglio 
>=20
> For xen.gz file we strip all symbols and have an additional
> xen-syms.efi file version with all symbols.

You meant xen-syms here, right?

> Make xen.efi more coherent stripping all symbols too.
> xen-syms.efi can be used for debugging.
>=20
> Signed-off-by: Frediano Ziglio 

With the above fixed:

Reviewed-by: Marek Marczykowski-G=C3=B3recki 

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Date: Thu, 13 Nov 2025 18:40:10 +0000
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH for-4.21 v8] xen: Strip xen.efi by default
To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 ,
 Frediano Ziglio 
Cc: xen-devel@lists.xenproject.org,
 Frediano Ziglio ,
 Anthony PERARD ,
 Michal Orzel , Jan Beulich ,
 Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Stefano Stabellini ,
 Frediano Ziglio ,
 Demi Marie Obenour ,
 Stewart Hildebrand ,
 Oleksii Kurochko 
References: <20251113154358.28704-1-frediano.ziglio@citrix.com>
 
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On 13/11/2025 6:35 pm, Marek Marczykowski-Górecki wrote:
> On Thu, Nov 13, 2025 at 03:43:58PM +0000, Frediano Ziglio wrote:
>> From: Frediano Ziglio 
>>
>> For xen.gz file we strip all symbols and have an additional
>> xen-syms.efi file version with all symbols.
> You meant xen-syms here, right?

I think so.  I just noticed the same.

>
>> Make xen.efi more coherent stripping all symbols too.
>> xen-syms.efi can be used for debugging.
>>
>> Signed-off-by: Frediano Ziglio 
> With the above fixed:
>
> Reviewed-by: Marek Marczykowski-Górecki 
>

I've done some ad-hoc testing and everything seems to be in order.

Acked-by: Andrew Cooper 


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Feedback-ID: i1568416f:Fastmail
Date: Thu, 13 Nov 2025 19:43:07 +0100
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: linux-kernel@vger.kernel.org
Cc: Juergen Gross ,
	Stefano Stabellini ,
	Oleksandr Tyshchenko ,
	Peng Jiang ,
	Qiu-ji Chen ,
	Jason Andryuk ,
	"moderated list:XEN HYPERVISOR INTERFACE" 
Subject: Re: [PATCH] xen/xenbus: better handle backend crash
Message-ID: 
References: <20251102032105.772670-1-marmarek@invisiblethingslab.com>
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Date: Thu, 13 Nov 2025 19:43:07 +0100
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: linux-kernel@vger.kernel.org
Cc: Juergen Gross ,
	Stefano Stabellini ,
	Oleksandr Tyshchenko ,
	Peng Jiang ,
	Qiu-ji Chen ,
	Jason Andryuk ,
	"moderated list:XEN HYPERVISOR INTERFACE" 
Subject: Re: [PATCH] xen/xenbus: better handle backend crash

Ping?

On Sun, Nov 02, 2025 at 04:20:12AM +0100, Marek Marczykowski-G=C3=B3recki w=
rote:
> When the backend domain crashes, coordinated device cleanup is not
> possible (as it involves waiting for the backend state change). In that
> case, toolstack forcefully removes frontend xenstore entries.
> xenbus_dev_changed() handles this case, and triggers device cleanup.
> It's possible that toolstack manages to connect new device in that
> place, before xenbus_dev_changed() notices the old one is missing. If
> that happens, new one won't be probed and will forever remain in
> XenbusStateInitialising.
>=20
> Fix this by checking backend-id and if it changes, consider it
> unplug+plug operation. It's important that cleanup on such unplug
> doesn't modify xenstore entries (especially the "state" key) as it
> belong to the new device to be probed - changing it would derail
> establishing connection to the new backend (most likely, closing the
> device before it was even connected). Handle this case by setting new
> xenbus_device->vanished flag to true, and check it before changing state
> entry.
>=20
> And even if xenbus_dev_changed() correctly detects the device was
> forcefully removed, the cleanup handling is still racy. Since this whole
> handling doesn't happend in a single xenstore transaction, it's possible
> that toolstack might put a new device there already. Avoid re-creating
> the state key (which in the case of loosing the race would actually
> close newly attached device).
>=20
> The problem does not apply to frontend domain crash, as this case
> involves coordinated cleanup.
>=20
> Problem originally reported at
> https://lore.kernel.org/xen-devel/aOZvivyZ9YhVWDLN@mail-itl/T/#t,
> including reproduction steps.
>=20
> Signed-off-by: Marek Marczykowski-G=C3=B3recki 
> ---
> I considered re-using one of existing fields instead of a new
> xenbus_device->vanished, but I wasn't sure if that would work better.
> Setting xenbus_device->nodename to NULL would prevent few other places
> using it (including some log messages). Setting xenbus_device->otherend
> might have less unintentional impact, but logically it doesn't feel
> correct.
>=20
> With this patch applied, I cannot reproduce the issue anymore - neither
> with the simplified reproducer script, nor with the full test suite.
> ---
>  drivers/xen/xenbus/xenbus_client.c |  2 ++
>  drivers/xen/xenbus/xenbus_probe.c  | 25 +++++++++++++++++++++++++
>  include/xen/xenbus.h               |  1 +
>  3 files changed, 28 insertions(+)
>=20
> diff --git a/drivers/xen/xenbus/xenbus_client.c b/drivers/xen/xenbus/xenb=
us_client.c
> index e73ec225d4a61..ce2f49d9aa4ad 100644
> --- a/drivers/xen/xenbus/xenbus_client.c
> +++ b/drivers/xen/xenbus/xenbus_client.c
> @@ -275,6 +275,8 @@ __xenbus_switch_state(struct xenbus_device *dev,
>   */
>  int xenbus_switch_state(struct xenbus_device *dev, enum xenbus_state sta=
te)
>  {
> +	if (dev->vanished)
> +		return 0;
>  	return __xenbus_switch_state(dev, state, 0);
>  }
> =20
> diff --git a/drivers/xen/xenbus/xenbus_probe.c b/drivers/xen/xenbus/xenbu=
s_probe.c
> index 86fe6e7790566..3c3e56b544976 100644
> --- a/drivers/xen/xenbus/xenbus_probe.c
> +++ b/drivers/xen/xenbus/xenbus_probe.c
> @@ -444,6 +444,9 @@ static void xenbus_cleanup_devices(const char *path, =
struct bus_type *bus)
>  		info.dev =3D NULL;
>  		bus_for_each_dev(bus, NULL, &info, cleanup_dev);
>  		if (info.dev) {
> +			dev_warn(&info.dev->dev,
> +			         "device forcefully removed from xenstore\n");
> +			info.dev->vanished =3D true;
>  			device_unregister(&info.dev->dev);
>  			put_device(&info.dev->dev);
>  		}
> @@ -659,6 +662,28 @@ void xenbus_dev_changed(const char *node, struct xen=
_bus_type *bus)
>  		return;
> =20
>  	dev =3D xenbus_device_find(root, &bus->bus);
> +	/* Backend domain crash results in not coordinated frontend removal,
> +	 * without going through XenbusStateClosing. Check if the device
> +	 * wasn't replaced to point at another backend in the meantime.
> +	 */
> +	if (dev && !strncmp(node, "device/", sizeof("device/")-1)) {
> +		int backend_id;
> +		int err =3D xenbus_gather(XBT_NIL, root,
> +				        "backend-id", "%i", &backend_id,
> +					NULL);
> +		if (!err && backend_id !=3D dev->otherend_id) {
> +			/* It isn't the same device, assume the old one
> +			 * vanished and new one needs to be probed.
> +			 */
> +			dev_warn(&dev->dev,
> +				 "backend-id mismatch (%d !=3D %d), reconnecting\n",
> +				 backend_id, dev->otherend_id);
> +			dev->vanished =3D true;
> +			device_unregister(&dev->dev);
> +			put_device(&dev->dev);
> +			dev =3D NULL;
> +		}
> +	}
>  	if (!dev)
>  		xenbus_probe_node(bus, type, root);
>  	else
> diff --git a/include/xen/xenbus.h b/include/xen/xenbus.h
> index 7dab04cf4a36c..43a5335f1d5a3 100644
> --- a/include/xen/xenbus.h
> +++ b/include/xen/xenbus.h
> @@ -87,6 +87,7 @@ struct xenbus_device {
>  	struct completion down;
>  	struct work_struct work;
>  	struct semaphore reclaim_sem;
> +	bool vanished;
> =20
>  	/* Event channel based statistics and settings. */
>  	atomic_t event_channels;
> --=20
> 2.51.0
>=20

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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On 13/11/2025 4:49 pm, Jan Beulich wrote:
> On 11.11.2025 17:19, Juergen Gross wrote:
>> --- a/Config.mk
>> +++ b/Config.mk
>> @@ -159,6 +159,20 @@ define move-if-changed
>>  	if ! cmp -s $(1) $(2); then mv -f $(1) $(2); else rm -f $(1); fi
>>  endef
>>  
>> +PATH_FILES := Paths
>> +INC_FILES := $(foreach f, $(PATH_FILES), $(XEN_ROOT)/config/$(f).mk)
>> +
>> +include $(INC_FILES)
>> +
>> +BUILD_MAKE_VARS := $(foreach f, $(PATH_FILES), $(shell awk '$$2 == ":=" { print $$1; }' $(XEN_ROOT)/config/$(f).mk.in))
>> +
>> +define apply-build-vars
>> +	sed $(foreach v, $(BUILD_MAKE_VARS), -e 's#@$(v)@#$($(v))#g') <$< >$@
>> +endef
>> +
>> +%:: %.src
>> +	$(apply-build-vars)
> I'm not convinced of having this here, rather than in less central places (say
> under tools/ and docs/). I'm also not sure I really understand why it needs to
> be .src - can't we stick to .in, enumerating the specific files that want
> generating this way (thus avoiding accidental attempts to re-generate files
> which need generating a different way)?
>
> Also - why the double colon here?
>
> (Maybe I figure answers to these questions as I look at subsequent patches.)

I too am wondering about .src vs .in.

.in is a well known naming scheme, and the exact point in the build
where it's generated isn't of interest IMO.  I've not come across .src
before, as far as I'm aware.

Is it going to cause a problem to keep all these files named .in ?

~Andrew


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Date: Thu, 13 Nov 2025 19:58:45 +0000
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Subject: Re: [PATCH 4/5] config: remove unused paths from config/Paths.mk.in
To: Jan Beulich , Juergen Gross 
Cc: Anthony PERARD , xen-devel@lists.xenproject.org
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On 13/11/2025 5:02 pm, Jan Beulich wrote:
> On 13.11.2025 17:59, Jan Beulich wrote:
>> On 11.11.2025 17:19, Juergen Gross wrote:
>>> --- a/config/Paths.mk.in
>>> +++ b/config/Paths.mk.in
>>> @@ -20,10 +20,7 @@ libexecdir               := @libexecdir@
>>>  datarootdir              := @datarootdir@
>>>  mandir                   := @mandir@
>>>  docdir                   := @docdir@
>>> -dvidir                   := @dvidir@
>>>  htmldir                  := @htmldir@
>>> -pdfdir                   := @pdfdir@
>> Question is whether we're mistakenly not respecting in particular this one,
>> for the *.pdf we create. For all the others I agree there's no (present or
>> potential) use. I notice though that docs/Makefile cleans e.g. *.dvi
>> nevertheless.
> Actually, I can't spot a use of htmldir either, when likely we should respect
> that one, too.

Besides the manpages, nothing generated in docs/ is really fit to
package for end users.  There's no coherent structure, some of it is
straight braindumps from developers.

docdir is only used by the {un,}install-html targets (opencoding
htmldir), and the rm in the install target is further evidence to the
unsuitability of what's there.

I'd go so far as to suggest we should drop install-html, except that it
would break the generation of https://xenbits.xen.org/docs/unstable/

~Andrew


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Subject: Re: Xen DomU Bootloader Experiences
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On 12.11.25 23:13, Elliott Mitchell wrote:
> A few times there have been mentions of a need to choose between boot
> methods for DomUs.  There is a need to decide on ones to recommend and
> put effort into supportting.  I may not have tried that many nor done
> particularly great amounts of experimentation, but I do have some
> experience with multiple User Domain bootloaders.
> 
> PyGRUB
> Xen's bootloader.  PyGRUB is quite functional within its limits.  In
> particular it simulates the domain's environment in Domain 0.  This means
> the security exposure is problematic.  Another big concern is that it
> only does GRUB v1 syntax.  For a long while Debian had a package for
> generating those files on a modern system, but that package was dropped.
> 
> Yet PyGRUB does avoid needing to use external tools to retrieve the
> kernel.  If the kernel is updated inside the domain, this does get the
> new kernel.  Further being architecture-independent this works on x86,
> ARM*, RISC-V and PowerPC.
> 
> As it is the only GRUB-flavor loader available on ARM*, that is the only
> place where I've used PyGRUB.
> 
> 
> PvGRUB
> I'm sure nearly everyone knows about PvGRUB.  By being a proper port of
> GRUB to run directly on Xen, it overcomes PyGRUB's disadvantages.  The
> one disadvantage is needing to get patches into an external project for
> changes in Xen.
> 
> Two changes to Xen urgently need propogation to PvGRUB.  I'm unsure
> whether PvGRUB unmaps its mapping of vcpu_info data.  The second is
> needing to work on ARM*, RISC-V and PowerPC.  The latter is the one and
> only way in which PvGRUB is inferior to PyGRUB.
> 
> As PvGRUB is only available for x86, that is the only place I've used
> PvGRUB.
> 
> 
> EDK2/Tianocore
> Quite well-known for being the basis of most x86 firmwares, plus being
> part of a typical Qemu setup.  Not nearly as well known for being a Xen
> DomU bootloader.
> 
> When it was working you would build their ArmVirtXen.dsc file and get
> XEN_EFI.fd as output.  You would then use XEN_EFI.fd for the domain's
> kernel.  If you looked at the console you saw something which looked and
> acted pretty similar to a UEFI firmware on x86 machines.  This was
> extremely functional for OSes which didn't particularly like GRUB.
> Notably I've read of it being able to load a Redmond OS and it was quite
> functional for booting an ARM64 port of FreeBSD.
> 
> Sometime after November 16th, 2022 or commit fff6d81270.  The built
> images stopped functioning.  This is actually rather concerning since it
> may also effects firmwares built for x86 HVM domains.  I don't presently
> know whether there are multiple bugs, or a single one effecting all Xen
> builds.
> 
> There is also an urgent need to get EDK2/Tianocore updated to match
> Xen/ARM's disallowing mapping the shared information page multiple times.
> As I did not wish to become deeply involved with EDK2/Tianocore I sent a
> patch to xen-devel close to 1.5 years ago.  Lack of action suggests there
> is an urgent need for a liason.
> 
> 
> 
> Recommendations:
> PyGRUB is functional within its limits.  Problems are GRUBv1 syntax and
> running within Domain 0.  Given this I feel the Xen Project should be
> heading towards deprecating PyGRUB.  Since PvGRUB works for x86 now, I
> would default to neither building nor installing PyGRUB on x86.  For
> other architectures PyGRUB is still useful.
> 
> The Xen Project should formally ask the GRUB Project to port PvGRUB to
> ARM, RISC-V and PowerPC.  The need for PvGRUB on ARM seems rather urgent.
> Without a proper bootloader VMs aren't too useful.
> 
> 
> The Xen Project needs people to work with EDK2/Tianocore.  The oldest
> report I've seen of the EDK2/Tianocore issue dates to mid-2023.  Now two
> years later the bug is still present.
> 
> The ability to configure XEN_EFI.fd as a domain kernel is a feature
> highly worthy of being ported to x86.  For OSes which don't particularly
> like GRUB, but do have PV drivers this is an ideal boot method.
> 

Just curious, you did not mention u-boot which is widely used on ARM,
for example Android guests boot using it.

-- 
Best regards,
-grygorii



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Date: Thu, 13 Nov 2025 22:40:21 +0200
User-Agent: Mozilla Thunderbird
Subject: Re: [XEN][PATCH v2] xen: make VMTRACE support optional
To: Jan Beulich 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 Stefano Stabellini ,
 Tamas K Lengyel ,
 Alexandru Isaila ,
 Petre Pircalabu ,
 Teddy Astie , Penny Zheng ,
 "xen-devel@lists.xenproject.org" 
References: <20251112202442.3879997-1-grygorii_strashko@epam.com>
 
 <9c4294ec-906d-4607-8f7d-b5b1bb7e74f2@epam.com>
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On 13.11.25 14:58, Jan Beulich wrote:
> On 13.11.2025 13:53, Grygorii Strashko wrote:
>> On 13.11.25 10:36, Jan Beulich wrote:
>>> On 12.11.2025 21:24, Grygorii Strashko wrote:
>>>> --- a/xen/arch/x86/hvm/vmx/vmcs.c
>>>> +++ b/xen/arch/x86/hvm/vmx/vmcs.c
>>>> @@ -307,6 +307,7 @@ static int vmx_init_vmcs_config(bool bsp)
>>>>        rdmsrl(MSR_IA32_VMX_MISC, _vmx_misc_cap);
>>>>    
>>>>        /* Check whether IPT is supported in VMX operation. */
>>>> +#ifdef CONFIG_VMTRACE
>>>>        if ( bsp )
>>>>            vmtrace_available = cpu_has_proc_trace &&
>>>>                                (_vmx_misc_cap & VMX_MISC_PROC_TRACE);
>>>> @@ -317,6 +318,7 @@ static int vmx_init_vmcs_config(bool bsp)
>>>>                   smp_processor_id());
>>>>            return -EINVAL;
>>>>        }
>>>> +#endif
>>>
>>> Initially I was inclined to ask for use of IS_ENABLED() here, but that wouldn't
>>> work since vmtrace_available isn't an lvalue when VMTRACE=n. Hence why generally
>>> I think it is better to check the particular identifier in such cases, rather
>>> than the original CONFIG_* (i.e. "#ifndef vmtrace_available" here). I'm not
>>> going to insist though, as I expect opinions may differ on this matter.
>>
>> Yep. assignment required ifdef wrapping.
>>
>> "#ifndef vmtrace_available" will not work out of the box as there are
>>
>> "if (vmtrace_available)" in code. So, can't just "not define"/undef "vmtrace_available".
> 
> I meant this just for the case here, though. Elsewhere you want to stick to
> checking CONFIG_VMTRACE.
> 

I'd prefer to keep this part as is. Please tell me if you insist.


-- 
Best regards,
-grygorii



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From: "Teddy Astie" 
Subject: =?utf-8?Q?Re:=20Xen=20DomU=20Bootloader=20Experiences?=
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Le 12/11/2025 =C3=A0 22:16, Elliott Mitchell a =C3=A9crit=C2=A0:
> A few times there have been mentions of a need to choose between boot
> methods for DomUs.  There is a need to decide on ones to recommend and
> put effort into supportting.  I may not have tried that many nor done
> particularly great amounts of experimentation, but I do have some
> experience with multiple User Domain bootloaders.
> 
> PyGRUB
> Xen's bootloader.  PyGRUB is quite functional within its limits.  In
> particular it simulates the domain's environment in Domain 0.  This means
> the security exposure is problematic.  Another big concern is that it
> only does GRUB v1 syntax.  For a long while Debian had a package for
> generating those files on a modern system, but that package was dropped.
> 
> Yet PyGRUB does avoid needing to use external tools to retrieve the
> kernel.  If the kernel is updated inside the domain, this does get the
> new kernel.  Further being architecture-independent this works on x86,
> ARM*, RISC-V and PowerPC.
> 
> As it is the only GRUB-flavor loader available on ARM*, that is the only
> place where I've used PyGRUB.
> 

To be fair, I don't really like PyGRUB, it hasn't really worked well for 
me (perhaps I'm trying too modern distros ?). It's still what's being 
used for XAPI, which doesn't make things practical and even sometimes 
brittle.

I'm more tending to the other alternatives.

> 
> PvGRUB
> I'm sure nearly everyone knows about PvGRUB.  By being a proper port of
> GRUB to run directly on Xen, it overcomes PyGRUB's disadvantages.  The
> one disadvantage is needing to get patches into an external project for
> changes in Xen.
> 
> Two changes to Xen urgently need propogation to PvGRUB.  I'm unsure
> whether PvGRUB unmaps its mapping of vcpu_info data.  The second is

I don't think it maps vcpu_info, otherwise, most (all ?) Linux kernels 
will immediately break.

> needing to work on ARM*, RISC-V and PowerPC.  The latter is the one and
> only way in which PvGRUB is inferior to PyGRUB.
> 

Perhaps it could be a good idea; although I'm more tending to EDK2 
instead which works well with it and cover more cases (unless EDK2 stops 
working for some obscure reason). For a more long-term solution, I would 
prefer something different to GRUB but basing on "Boot Loader 
Specification", maybe Edera's Sprout [1] or rust-hypervisor-firmware [2] 
as a PVH firmware.

> As PvGRUB is only available for x86, that is the only place I've used
> PvGRUB.
> 

> 
> EDK2/Tianocore
> Quite well-known for being the basis of most x86 firmwares, plus being
> part of a typical Qemu setup.  Not nearly as well known for being a Xen
> DomU bootloader.
> 
> When it was working you would build their ArmVirtXen.dsc file and get
> XEN_EFI.fd as output.  You would then use XEN_EFI.fd for the domain's
> kernel.  If you looked at the console you saw something which looked and
> acted pretty similar to a UEFI firmware on x86 machines.  This was
> extremely functional for OSes which didn't particularly like GRUB.
> Notably I've read of it being able to load a Redmond OS and it was quite
> functional for booting an ARM64 port of FreeBSD.
> 
> Sometime after November 16th, 2022 or commit fff6d81270.  The built
> images stopped functioning.  This is actually rather concerning since it
> may also effects firmwares built for x86 HVM domains.  I don't presently
> know whether there are multiple bugs, or a single one effecting all Xen
> builds.
> 

Actually, you can use it for x86 like you do for ARM, with PVH (using 
the same binary as for HVM). But it broke at some point, and I'm mostly 
living with a older but working custom built version of it.

We definitely want to sort-out this, as it is going to be a blocker for 
providing better foundations for PVH guests on XAPI/XCP-ng.

> There is also an urgent need to get EDK2/Tianocore updated to match
> Xen/ARM's disallowing mapping the shared information page multiple times.
> As I did not wish to become deeply involved with EDK2/Tianocore I sent a
> patch to xen-devel close to 1.5 years ago.  Lack of action suggests there
> is an urgent need for a liason.
> 
> 
> 
> Recommendations:
> PyGRUB is functional within its limits.  Problems are GRUBv1 syntax and
> running within Domain 0.  Given this I feel the Xen Project should be
> heading towards deprecating PyGRUB.  Since PvGRUB works for x86 now, I
> would default to neither building nor installing PyGRUB on x86.  For
> other architectures PyGRUB is still useful.
> 

+1. At least making it deprecated, and at the same time improving the 
ergonomics of alternatives (i.e PVH+EDK2, legacy grub-pv and/or "PV-GRUB").

> The Xen Project should formally ask the GRUB Project to port PvGRUB to
> ARM, RISC-V and PowerPC.  The need for PvGRUB on ARM seems rather urgent.
> Without a proper bootloader VMs aren't too useful.
> 

EDK2 / U-Boot should be able to fill this niche at least for ARM; not 
sure about RISC-V though, but I guess it is going to be a similar story.

Unsure about PowerPC through.

> 
> The Xen Project needs people to work with EDK2/Tianocore.  The oldest
> report I've seen of the EDK2/Tianocore issue dates to mid-2023.  Now two
> years later the bug is still present.
> 

> The ability to configure XEN_EFI.fd as a domain kernel is a feature
> highly worthy of being ported to x86.  For OSes which don't particularly
> like GRUB, but do have PV drivers this is an ideal boot method.
> 

AFAICT it is already there :)

> 

[1] https://github.com/edera-dev/sprout
[2] https://github.com/cloud-hypervisor/rust-hypervisor-firmware


--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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From: Elliott Mitchell 
To: Grygorii Strashko 
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Subject: Re: Xen DomU Bootloader Experiences
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On Thu, Nov 13, 2025 at 10:13:07PM +0200, Grygorii Strashko wrote:
> 
> On 12.11.25 23:13, Elliott Mitchell wrote:
> > 
> > Recommendations:
> > PyGRUB is functional within its limits.  Problems are GRUBv1 syntax and
> > running within Domain 0.  Given this I feel the Xen Project should be
> > heading towards deprecating PyGRUB.  Since PvGRUB works for x86 now, I
> > would default to neither building nor installing PyGRUB on x86.  For
> > other architectures PyGRUB is still useful.
> > 
> > The Xen Project should formally ask the GRUB Project to port PvGRUB to
> > ARM, RISC-V and PowerPC.  The need for PvGRUB on ARM seems rather urgent.
> > Without a proper bootloader VMs aren't too useful.
> > 
> > 
> > The Xen Project needs people to work with EDK2/Tianocore.  The oldest
> > report I've seen of the EDK2/Tianocore issue dates to mid-2023.  Now two
> > years later the bug is still present.
> > 
> > The ability to configure XEN_EFI.fd as a domain kernel is a feature
> > highly worthy of being ported to x86.  For OSes which don't particularly
> > like GRUB, but do have PV drivers this is an ideal boot method.
> 
> Just curious, you did not mention u-boot which is widely used on ARM,
> for example Android guests boot using it.

As I have not used U-Boot to load a DomU I did not write about something
I have not done.  Have you used U-Boot to load a DomU?  Was it a pleasant
experience?  Was it easy to setup?  Was it difficult to setup?

PyGRUB still has a bit of value since it can still load some Linux
guests.  GRUBv1 syntax is a major weakness, so I think the Xen Project
should be heading towards deprecating PyGRUB.  Mostly this needs GRUB's
Xen support to be ported to ARM and RISC-V.

GRUB's Xen support works great for x86.  Pleasant experience with minimal
trouble.  This is great for loading Linux in a DomU.

Tianocore/EDK2 support worked (past tense) great for ARM64.  Pleasant
experience with minimal trouble.  I haven't done full installation, but I
expect full installation will be a breeze (sigh getting patches into some
projects is extremely difficult).



Grygorii Strashko, do you think U-Boot is likely to cover some scenario
not covered by either GRUB or Tianocore/EDK2?  Do you think U-Boot is
likely to do a better job with some scenario than either GRUB or
Tianocore/EDK2?

You mentioned using U-Boot to load Android DomUs on ARM.  Is that likely
to be difficult to switch to Tianocore/EDK2?


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From: Frediano Ziglio 
Date: Thu, 13 Nov 2025 23:32:44 +0000
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Subject: Re: [PATCH for-4.21 v8] xen: Strip xen.efi by default
To: Andrew Cooper 
Cc: =?UTF-8?Q?Marek_Marczykowski=2DG=C3=B3recki?= , 
	Frediano Ziglio , xen-devel@lists.xenproject.org, 
	Frediano Ziglio , Anthony PERARD , 
	Michal Orzel , Jan Beulich , Julien Grall , 
	=?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
	Stefano Stabellini , Demi Marie Obenour , 
	Stewart Hildebrand , Oleksii Kurochko 
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On Thu, 13 Nov 2025 at 18:40, Andrew Cooper  wro=
te:
>
> On 13/11/2025 6:35 pm, Marek Marczykowski-G=C3=B3recki wrote:
> > On Thu, Nov 13, 2025 at 03:43:58PM +0000, Frediano Ziglio wrote:
> >> From: Frediano Ziglio 
> >>
> >> For xen.gz file we strip all symbols and have an additional
> >> xen-syms.efi file version with all symbols.
> > You meant xen-syms here, right?
>
> I think so.  I just noticed the same.
>

Yes, my mistake

> >
> >> Make xen.efi more coherent stripping all symbols too.
> >> xen-syms.efi can be used for debugging.
> >>
> >> Signed-off-by: Frediano Ziglio 
> > With the above fixed:
> >
> > Reviewed-by: Marek Marczykowski-G=C3=B3recki 
> >
>
> I've done some ad-hoc testing and everything seems to be in order.
>
> Acked-by: Andrew Cooper 

Thanks,
   Frediano


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Date: Thu, 13 Nov 2025 17:54:58 -0800
From: Elliott Mitchell 
To: Teddy Astie 
Cc: xen-devel@lists.xenproject.org
Subject: Re: Xen DomU Bootloader Experiences
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On Thu, Nov 13, 2025 at 10:23:20PM +0000, Teddy Astie wrote:
> Le 12/11/2025 à 22:16, Elliott Mitchell a écrit :
> > A few times there have been mentions of a need to choose between boot
> > methods for DomUs.  There is a need to decide on ones to recommend and
> > put effort into supportting.  I may not have tried that many nor done
> > particularly great amounts of experimentation, but I do have some
> > experience with multiple User Domain bootloaders.
> > 
> > PyGRUB
> > Xen's bootloader.  PyGRUB is quite functional within its limits.  In
> > particular it simulates the domain's environment in Domain 0.  This means
> > the security exposure is problematic.  Another big concern is that it
> > only does GRUB v1 syntax.  For a long while Debian had a package for
> > generating those files on a modern system, but that package was dropped.
> > 
> > Yet PyGRUB does avoid needing to use external tools to retrieve the
> > kernel.  If the kernel is updated inside the domain, this does get the
> > new kernel.  Further being architecture-independent this works on x86,
> > ARM*, RISC-V and PowerPC.
> > 
> > As it is the only GRUB-flavor loader available on ARM*, that is the only
> > place where I've used PyGRUB.
> > 
> 
> To be fair, I don't really like PyGRUB, it hasn't really worked well for 
> me (perhaps I'm trying too modern distros ?). It's still what's being 
> used for XAPI, which doesn't make things practical and even sometimes 
> brittle.
> 
> I'm more tending to the other alternatives.
> 
> > 
> > PvGRUB
> > I'm sure nearly everyone knows about PvGRUB.  By being a proper port of
> > GRUB to run directly on Xen, it overcomes PyGRUB's disadvantages.  The
> > one disadvantage is needing to get patches into an external project for
> > changes in Xen.
> > 
> > Two changes to Xen urgently need propogation to PvGRUB.  I'm unsure
> > whether PvGRUB unmaps its mapping of vcpu_info data.  The second is
> 
> I don't think it maps vcpu_info, otherwise, most (all ?) Linux kernels 
> will immediately break.

I thought multiply mapping the vcpu_info was deprecated, but still
allowed on x86.  Only on ARM{,64} was it actually disabled.  As such it
might still have a private mapping, but it is possible it never had one
or was cleaned up at some point.

I keep mentioning this as Tianocore/EDK2 does a private mapping, but
fails to remove it when bootloading finishes.  Since support for multiply
mapped vcpu_info was removed, Tianocore/EDK2 got broken by Xen.  This is
still unfixed.

> > needing to work on ARM*, RISC-V and PowerPC.  The latter is the one and
> > only way in which PvGRUB is inferior to PyGRUB.
> 
> Perhaps it could be a good idea; although I'm more tending to EDK2 
> instead which works well with it and cover more cases (unless EDK2 stops 
> working for some obscure reason). For a more long-term solution, I would 
> prefer something different to GRUB but basing on "Boot Loader 
> Specification", maybe Edera's Sprout [1] or rust-hypervisor-firmware [2] 
> as a PVH firmware.

I concur with Tianocore/EDK2 covering more cases.  I do suspect keeping
it functional may be more difficult so I'm slightly wary of it.  Whereas
PvGRUB is lower overhead and faster for *Linux*.


> > EDK2/Tianocore
> > Quite well-known for being the basis of most x86 firmwares, plus being
> > part of a typical Qemu setup.  Not nearly as well known for being a Xen
> > DomU bootloader.
> > 
> > When it was working you would build their ArmVirtXen.dsc file and get
> > XEN_EFI.fd as output.  You would then use XEN_EFI.fd for the domain's
> > kernel.  If you looked at the console you saw something which looked and
> > acted pretty similar to a UEFI firmware on x86 machines.  This was
> > extremely functional for OSes which didn't particularly like GRUB.
> > Notably I've read of it being able to load a Redmond OS and it was quite
> > functional for booting an ARM64 port of FreeBSD.
> > 
> > Sometime after November 16th, 2022 or commit fff6d81270.  The built
> > images stopped functioning.  This is actually rather concerning since it
> > may also effects firmwares built for x86 HVM domains.  I don't presently
> > know whether there are multiple bugs, or a single one effecting all Xen
> > builds.
> 
> Actually, you can use it for x86 like you do for ARM, with PVH (using 
> the same binary as for HVM). But it broke at some point, and I'm mostly 
> living with a older but working custom built version of it.
> 
> We definitely want to sort-out this, as it is going to be a blocker for 
> providing better foundations for PVH guests on XAPI/XCP-ng.

Well, Tianocore/EDK2's Xen support was broken sometime mid-late 2022.
The only working firmware images I have are 5 years old and fail to load
as PVH.  Being used as DomU kernel may have worked on x86 at some point,
but I've never seen it.

Meanwhile Tianocore/EDK2 ARM was broken on *Xen*'s side.  Usually that
would mean the Xen developers are supposed to get updates into
Tianocore/EDK2.


> > Recommendations:
> > PyGRUB is functional within its limits.  Problems are GRUBv1 syntax and
> > running within Domain 0.  Given this I feel the Xen Project should be
> > heading towards deprecating PyGRUB.  Since PvGRUB works for x86 now, I
> > would default to neither building nor installing PyGRUB on x86.  For
> > other architectures PyGRUB is still useful.
> 
> +1. At least making it deprecated, and at the same time improving the 
> ergonomics of alternatives (i.e PVH+EDK2, legacy grub-pv and/or "PV-GRUB").

Trying to used legacy GRUB syntax is hopeless.  Most distribution scripts
will have been updated to be GRUBv2 syntax-only.  As such PV GRUB is
pretty clearly the way to go.


> > The ability to configure XEN_EFI.fd as a domain kernel is a feature
> > highly worthy of being ported to x86.  For OSes which don't particularly
> > like GRUB, but do have PV drivers this is an ideal boot method.
> > 
> 
> AFAICT it is already there :)

I've never seen it working.  It may have worked at one time, but it has
remained broken for rather a long time.

Perhaps time to add CI on Xen's side?


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From: dmukhin@ford.com
Date: Thu, 13 Nov 2025 21:19:17 -0800
To: Mykola Kvach 
Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com,
        anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org,
        michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org,
        dmukhin@ford.com
Subject: Re: [PATCH v7 03/16] emul/ns16x50: implement emulator stub
Message-ID: 
References: <20250908211149.279143-1-dmukhin@ford.com>
 <20250908211149.279143-4-dmukhin@ford.com>
 
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Hi Mykola,

Thanks for the earlier reviews!

I am getting back to that series.

On Wed, Sep 10, 2025 at 01:05:13PM +0300, Mykola Kvach wrote:
> Hi Denis,
> 
> I appreciate you addressing the comments from the earlier version
> of the patch series.
> 
> On Tue, Sep 9, 2025 at 12:12 AM  wrote:
> >
> > From: Denis Mukhin 
> >
> > The change is the first on the way on introducing minimally functional
> > NS16550-compatible UART emulator.
> >
> > Only one domain, defined via 'vuart=' parameter, will have UART emulator
> > initially. The command line option is not documented yet because of the plan
> > to adjust this code for vUART configuration via xl.
> 
> Since the command line option is not yet documented, it would be
> helpful to include the expected format of the 'vuart=' parameter in
> the commit message. This will make it easier for reviewers and future
> readers to understand how to use the option.

So I ended up moving that code into vuart.c where it belongs, along with
addressing all your feedback.

--
Denis


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From: dmukhin@xen.org
Date: Thu, 13 Nov 2025 21:28:47 -0800
To: Mykola Kvach 
Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com,
	anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org,
	michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org,
	dmukhin@ford.com
Subject: Re: [PATCH v7 03/16] emul/ns16x50: implement emulator stub
Message-ID: 
References: <20250908211149.279143-1-dmukhin@ford.com>
 <20250908211149.279143-4-dmukhin@ford.com>
 
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On Mon, Sep 15, 2025 at 01:16:26PM +0300, Mykola Kvach wrote:
> > +/*
> > + * Virtual ns16x50 device state.
> > + */
> > +struct vuart_ns16x50 {
> > +    uint8_t regs[NS16X50_EMU_REGS_NUM]; /* Emulated registers */
> 
> I think it would be better to add an init procedure for the registers.
> At least not all bits in all registers should be initialized to zero.
> Or will this be handled in some way during I/O reads?

I can do it, something like ns16x50_reset() should work I think.
Thanks for suggestion!


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Subject: Re: [PATCH 2/5] build: add new make pattern for making file from
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To: Jan Beulich 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
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On 14.11.2025 07:18, Jürgen Groß wrote:
> On 13.11.25 17:49, Jan Beulich wrote:
>> On 11.11.2025 17:19, Juergen Gross wrote:
>>> --- a/Config.mk
>>> +++ b/Config.mk
>>> @@ -159,6 +159,20 @@ define move-if-changed
>>>   	if ! cmp -s $(1) $(2); then mv -f $(1) $(2); else rm -f $(1); fi
>>>   endef
>>>   
>>> +PATH_FILES := Paths
>>> +INC_FILES := $(foreach f, $(PATH_FILES), $(XEN_ROOT)/config/$(f).mk)
>>> +
>>> +include $(INC_FILES)
>>> +
>>> +BUILD_MAKE_VARS := $(foreach f, $(PATH_FILES), $(shell awk '$$2 == ":=" { print $$1; }' $(XEN_ROOT)/config/$(f).mk.in))
>>> +
>>> +define apply-build-vars
>>> +	sed $(foreach v, $(BUILD_MAKE_VARS), -e 's#@$(v)@#$($(v))#g') <$< >$@
>>> +endef
>>> +
>>> +%:: %.src
>>> +	$(apply-build-vars)
>>
>> I'm not convinced of having this here, rather than in less central places (say
>> under tools/ and docs/). I'm also not sure I really understand why it needs to
>> be .src - can't we stick to .in, enumerating the specific files that want
>> generating this way (thus avoiding accidental attempts to re-generate files
>> which need generating a different way)?
> 
> With enumerating the files to generate we could probably stick to *.in.
> 
> I'm fine with moving the rule to the tools and docs makefiles, but I'd
> like to keep the apply-build-vars definition here in order to avoid
> duplicating it.

Oh, sure, I indeed meant only the rule to move.

Jan


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Subject: Re: [XEN][PATCH v2] xen: make VMTRACE support optional
To: Grygorii Strashko 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 Stefano Stabellini ,
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From: Jan Beulich 
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On 13.11.2025 21:40, Grygorii Strashko wrote:
> On 13.11.25 14:58, Jan Beulich wrote:
>> On 13.11.2025 13:53, Grygorii Strashko wrote:
>>> On 13.11.25 10:36, Jan Beulich wrote:
>>>> On 12.11.2025 21:24, Grygorii Strashko wrote:
>>>>> --- a/xen/arch/x86/hvm/vmx/vmcs.c
>>>>> +++ b/xen/arch/x86/hvm/vmx/vmcs.c
>>>>> @@ -307,6 +307,7 @@ static int vmx_init_vmcs_config(bool bsp)
>>>>>        rdmsrl(MSR_IA32_VMX_MISC, _vmx_misc_cap);
>>>>>    
>>>>>        /* Check whether IPT is supported in VMX operation. */
>>>>> +#ifdef CONFIG_VMTRACE
>>>>>        if ( bsp )
>>>>>            vmtrace_available = cpu_has_proc_trace &&
>>>>>                                (_vmx_misc_cap & VMX_MISC_PROC_TRACE);
>>>>> @@ -317,6 +318,7 @@ static int vmx_init_vmcs_config(bool bsp)
>>>>>                   smp_processor_id());
>>>>>            return -EINVAL;
>>>>>        }
>>>>> +#endif
>>>>
>>>> Initially I was inclined to ask for use of IS_ENABLED() here, but that wouldn't
>>>> work since vmtrace_available isn't an lvalue when VMTRACE=n. Hence why generally
>>>> I think it is better to check the particular identifier in such cases, rather
>>>> than the original CONFIG_* (i.e. "#ifndef vmtrace_available" here). I'm not
>>>> going to insist though, as I expect opinions may differ on this matter.
>>>
>>> Yep. assignment required ifdef wrapping.
>>>
>>> "#ifndef vmtrace_available" will not work out of the box as there are
>>>
>>> "if (vmtrace_available)" in code. So, can't just "not define"/undef "vmtrace_available".
>>
>> I meant this just for the case here, though. Elsewhere you want to stick to
>> checking CONFIG_VMTRACE.
> 
> I'd prefer to keep this part as is. Please tell me if you insist.

I won't insist, first and foremost again because I expect opinions on this
matter would generally differ anyway.

Jan


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On 13.11.2025 18:41, Marek Marczykowski-Górecki wrote:
> On Thu, Nov 13, 2025 at 12:08:18PM +0100, Jan Beulich wrote:
>> --- /dev/null
>> +++ b/xen/arch/x86/boot/brk.c
>> @@ -0,0 +1,72 @@
>> +/* SPDX-License-Identifier: GPL-2.0-or-later */
>> +
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +
>> +#include 
>> +
>> +extern char __brk_start[];
>> +extern const char __bss_end[];
>> +
>> +static unsigned long __initdata allocated;
>> +static bool __initdata finished;
>> +
>> +void *__init brk_alloc(size_t size)
>> +{
>> +    void *ptr = __brk_start + allocated;
>> +
>> +    if ( finished )
>> +        return NULL;
>> +
>> +    /* Allocations PAGE_SIZE and up will be page-aligned. */
>> +    if ( size >= PAGE_SIZE )
>> +        allocated = ROUNDUP(allocated, PAGE_SIZE);
>> +
>> +    allocated += ROUNDUP(size, sizeof(void *));
>> +
>> +    if ( allocated > __bss_end - __brk_start )
>> +        return NULL;
>> +
>> +    return ptr;
>> +}
>> +
>> +unsigned long __init brk_get_unused_start(void)
> 
> It's a bit unintuitive for brk_get_* to have this significant side
> effect. Maybe name it brk_finalize_get_unused_start() ?

Getting too long for my taste, and a caller obtaining this value kind of
needs to understand that either what it gets back is stale the moment it
uses the result, or (for it to not be stale) no further changes (i.e.
allocations) are permitted afterwards.

>> +{
>> +    finished = true;
>> +
>> +    allocated = ROUNDUP(allocated, PAGE_SIZE);
>> +
>> +    return (unsigned long)__brk_start + allocated;
>> +}
>> +
>> +void __init brk_free_unused(void)
>> +{
>> +    unsigned long start = brk_get_unused_start(),
>> +                  end = (unsigned long)__bss_end;
>> +    unsigned int subsys;
>> +
>> +    /*
>> +     * Only xen.efi will have the symbol __subsystem__ available, and it'll
>> +     * be non-zero (10) there.  In ELF the symbol will be undefined, and
>> +     * hence zero will be loaded into the register.
>> +     */
>> +    asm ( ".weak __subsystem__; mov $__subsystem__, %0" : "=r" (subsys) );
> 
> Is this really the best way to detect xen.efi?

Well, it took me a while to figure _some_ reasonably reliable way. I'm
all ears towards better approaches.

Jan


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Date: Fri, 14 Nov 2025 10:10:46 +0100
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To: Andrew Cooper 
Cc: xen-devel@lists.xenproject.org, Paul Durrant ,
	Jan Beulich 
Subject: Re: [PATCH] x86/viridian: use hv_timer_message_payload struct
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On Thu, Nov 13, 2025 at 05:52:47PM +0000, Andrew Cooper wrote:
> On 13/11/2025 5:24 pm, Roger Pau Monne wrote:
> > diff --git a/xen/arch/x86/hvm/viridian/synic.c b/xen/arch/x86/hvm/viridian/synic.c
> > index e6cba7548f1b..6d7b6bd0eda2 100644
> > --- a/xen/arch/x86/hvm/viridian/synic.c
> > +++ b/xen/arch/x86/hvm/viridian/synic.c
> > @@ -327,15 +327,10 @@ bool viridian_synic_deliver_timer_msg(struct vcpu *v, unsigned int sintx,
> >      struct viridian_vcpu *vv = v->arch.hvm.viridian;
> >      const union hv_synic_sint *vs = &vv->sint[sintx];
> >      struct hv_message *msg = vv->simp.ptr;
> > -    struct {
> > -        uint32_t TimerIndex;
> > -        uint32_t Reserved;
> > -        uint64_t ExpirationTime;
> > -        uint64_t DeliveryTime;
> > -    } payload = {
> > -        .TimerIndex = index,
> > -        .ExpirationTime = expiration,
> > -        .DeliveryTime = delivery,
> > +    const struct hv_timer_message_payload payload = {
> > +        .timer_index = index,
> > +        .expiration_time = expiration,
> > +        .delivery_time = delivery,
> 
> Align these = for readability?

Sure, can do.

> >      };
> >  
> >      /* Don't assume SIM page to be mapped. */
> > @@ -359,8 +354,8 @@ bool viridian_synic_deliver_timer_msg(struct vcpu *v, unsigned int sintx,
> >      msg->header.message_flags.msg_pending = 0;
> >      msg->header.payload_size = sizeof(payload);
> >  
> > -    BUILD_BUG_ON(sizeof(payload) > sizeof(msg->u.payload));
> > -    memcpy(msg->u.payload, &payload, sizeof(payload));
> > +    BUILD_BUG_ON(sizeof(msg->payload.timer) > sizeof(msg->payload.raw));
> 
> This BUILD_BUG_ON() was only needed because of the memcpy() between
> different types.  With structure assignment, the compiler will tell you
> if the type mismatches.

I've keep it to ensure the size of the hv_timer_message_payload
doesn't exceed the maximum payload size (240 bytes), as
msg->payload.raw is the maximum payload size defined by the standard.

> Therefore, it's safe to drop.
> 
> Otherwise, Reviewed-by: Andrew Cooper 

Let me know if you are fine with keeping the BUILD_BUG_ON() given the
justification above, as that would be my preference.

Thanks, Roger.


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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: Stefano Stabellini , Anthony PERARD
 , Paul Durrant , "Edgar E. Iglesias"
 , xen-devel@lists.xenproject.org, Vikram Garhwal
 
Subject: Incorrect error handling in xen_enable_tpm()
Date: Fri, 14 Nov 2025 10:16:58 +0100
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Consider xen_enable_tpm() in hw/xen/xen-pvh-common.c:

    static void xen_enable_tpm(XenPVHMachineState *s)
    {
        Error *errp = NULL;

Nitpick: confusing name; we use @errp for Error ** variables, not for
Error * variables.  Better: @err.

        DeviceState *dev;
        SysBusDevice *busdev;

        TPMBackend *be = qemu_find_tpm_be("tpm0");
        if (be == NULL) {
            error_report("Couldn't find tmp0 backend");
            return;
        }
        dev = qdev_new(TYPE_TPM_TIS_SYSBUS);
        object_property_set_link(OBJECT(dev), "tpmdev", OBJECT(be), &errp);

If this fails, @errp changes to non-null.

        object_property_set_str(OBJECT(dev), "tpmdev", be->id, &errp);

If this then succeeds, @errp remains non-null.  Since we ignore it, we
leak the Error object.

If it also fails, we trip error_setv()'s assertion, because we violate
qapi/error.h rule

 * - You may pass NULL to not receive the error, &error_abort to abort
 *   on error, &error_fatal to exit(1) on error, or a pointer to a
 *   variable containing NULL to receive the error.

Taking a step back from the incorrect error handling: we're setting the
same property *twice*.  Why?

As far as I can tell, property "tpmdev" is not a link.  It's defined
with DEFINE_PROP_TPMBE(), i.e. setting it runs set_tpm() from
backends/tpm/tpm_util.c.  Passes the value to qemu_find_tpm_be(), which
appears to take a TPMBackend ID.

I suspect the object_property_set_link() always fails, and we leak the
Error object.

I'd verify this in a debugger, but I don't have a Xen box handy.

Code goes back to commit 733766cd373 (hw/arm: introduce xenpvh machine).

        busdev = SYS_BUS_DEVICE(dev);
        sysbus_realize_and_unref(busdev, &error_fatal);
        sysbus_mmio_map(busdev, 0, s->cfg.tpm.base);

        trace_xen_enable_tpm(s->cfg.tpm.base);
    }



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Subject: Re: [PATCH v5 10/14] powerpc: Convert to physical address DMA mapping
To: Leon Romanovsky ,
 Marek Szyprowski ,
 Robin Murphy , Russell King ,
 Juergen Gross , Stefano Stabellini
 ,
 Oleksandr Tyshchenko ,
 Richard Henderson ,
 Matt Turner ,
 Thomas Bogendoerfer ,
 "James E.J. Bottomley" ,
 Helge Deller , Madhavan Srinivasan ,
 Michael Ellerman , Nicholas Piggin ,
 Geoff Levand , "David S. Miller" ,
 Andreas Larsson , Thomas Gleixner ,
 Ingo Molnar , Borislav Petkov ,
 Dave Hansen , x86@kernel.org,
 "H. Peter Anvin" 
Cc: iommu@lists.linux.dev, linux-kernel@vger.kernel.org,
 linux-arm-kernel@lists.infradead.org, xen-devel@lists.xenproject.org,
 linux-alpha@vger.kernel.org, linux-mips@vger.kernel.org,
 linux-parisc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
 sparclinux@vger.kernel.org
References: <20251015-remove-map-page-v5-0-3bbfe3a25cdf@kernel.org>
 <20251015-remove-map-page-v5-10-3bbfe3a25cdf@kernel.org>
From: Christophe Leroy 
Content-Language: fr-FR
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Le 15/10/2025 à 11:12, Leon Romanovsky a écrit :
> From: Leon Romanovsky 
> 
> Adapt PowerPC DMA to use physical addresses in order to prepare code
> to removal .map_page and .unmap_page.
> 
> Signed-off-by: Leon Romanovsky 

Reviewed-by: Christophe Leroy 

Non fatal comments below.

> ---
>   arch/powerpc/include/asm/iommu.h         |  8 ++++----
>   arch/powerpc/kernel/dma-iommu.c          | 22 ++++++++++-----------
>   arch/powerpc/kernel/iommu.c              | 14 +++++++-------
>   arch/powerpc/platforms/ps3/system-bus.c  | 33 ++++++++++++++++++--------------
>   arch/powerpc/platforms/pseries/ibmebus.c | 15 ++++++++-------
>   arch/powerpc/platforms/pseries/vio.c     | 21 +++++++++++---------
>   6 files changed, 60 insertions(+), 53 deletions(-)
> 
> diff --git a/arch/powerpc/include/asm/iommu.h b/arch/powerpc/include/asm/iommu.h
> index b410021ad4c6..eafdd63cd6c4 100644
> --- a/arch/powerpc/include/asm/iommu.h
> +++ b/arch/powerpc/include/asm/iommu.h
> @@ -274,12 +274,12 @@ extern void *iommu_alloc_coherent(struct device *dev, struct iommu_table *tbl,
>   				  unsigned long mask, gfp_t flag, int node);
>   extern void iommu_free_coherent(struct iommu_table *tbl, size_t size,
>   				void *vaddr, dma_addr_t dma_handle);
> -extern dma_addr_t iommu_map_page(struct device *dev, struct iommu_table *tbl,
> -				 struct page *page, unsigned long offset,
> -				 size_t size, unsigned long mask,
> +extern dma_addr_t iommu_map_phys(struct device *dev, struct iommu_table *tbl,
> +				 phys_addr_t phys, size_t size,
> +				 unsigned long mask,
>   				 enum dma_data_direction direction,
>   				 unsigned long attrs);

'extern' is pointless for function prototypes.

Report from checkpatch:

CHECK: extern prototypes should be avoided in .h files
#31: FILE: arch/powerpc/include/asm/iommu.h:277:
+extern dma_addr_t iommu_map_phys(struct device *dev, struct iommu_table 
*tbl,


> -extern void iommu_unmap_page(struct iommu_table *tbl, dma_addr_t dma_handle,
> +extern void iommu_unmap_phys(struct iommu_table *tbl, dma_addr_t dma_handle,
>   			     size_t size, enum dma_data_direction direction,
>   			     unsigned long attrs);

Same:

CHECK: extern prototypes should be avoided in .h files
#37: FILE: arch/powerpc/include/asm/iommu.h:282:
+extern void iommu_unmap_phys(struct iommu_table *tbl, dma_addr_t 
dma_handle,



>   
> diff --git a/arch/powerpc/kernel/dma-iommu.c b/arch/powerpc/kernel/dma-iommu.c
> index 0359ab72cd3b..aa3689d61917 100644
> --- a/arch/powerpc/kernel/dma-iommu.c
> +++ b/arch/powerpc/kernel/dma-iommu.c
> @@ -93,28 +93,26 @@ static void dma_iommu_free_coherent(struct device *dev, size_t size,
>   
>   /* Creates TCEs for a user provided buffer.  The user buffer must be
>    * contiguous real kernel storage (not vmalloc).  The address passed here
> - * comprises a page address and offset into that page. The dma_addr_t
> - * returned will point to the same byte within the page as was passed in.
> + * is a physical address to that page. The dma_addr_t returned will point
> + * to the same byte within the page as was passed in.
>    */
> -static dma_addr_t dma_iommu_map_page(struct device *dev, struct page *page,
> -				     unsigned long offset, size_t size,
> +static dma_addr_t dma_iommu_map_phys(struct device *dev, phys_addr_t phys,
> +				     size_t size,
>   				     enum dma_data_direction direction,
>   				     unsigned long attrs)
>   {
> -	return iommu_map_page(dev, get_iommu_table_base(dev), page, offset,
> -			      size, dma_get_mask(dev), direction, attrs);
> +	return iommu_map_phys(dev, get_iommu_table_base(dev), phys, size,
> +			      dma_get_mask(dev), direction, attrs);
>   }
>   
> -
> -static void dma_iommu_unmap_page(struct device *dev, dma_addr_t dma_handle,
> +static void dma_iommu_unmap_phys(struct device *dev, dma_addr_t dma_handle,
>   				 size_t size, enum dma_data_direction direction,
>   				 unsigned long attrs)
>   {
> -	iommu_unmap_page(get_iommu_table_base(dev), dma_handle, size, direction,
> +	iommu_unmap_phys(get_iommu_table_base(dev), dma_handle, size, direction,
>   			 attrs);
>   }
>   
> -
>   static int dma_iommu_map_sg(struct device *dev, struct scatterlist *sglist,
>   			    int nelems, enum dma_data_direction direction,
>   			    unsigned long attrs)
> @@ -211,8 +209,8 @@ const struct dma_map_ops dma_iommu_ops = {
>   	.map_sg			= dma_iommu_map_sg,
>   	.unmap_sg		= dma_iommu_unmap_sg,
>   	.dma_supported		= dma_iommu_dma_supported,
> -	.map_page		= dma_iommu_map_page,
> -	.unmap_page		= dma_iommu_unmap_page,
> +	.map_phys		= dma_iommu_map_phys,
> +	.unmap_phys		= dma_iommu_unmap_phys,
>   	.get_required_mask	= dma_iommu_get_required_mask,
>   	.mmap			= dma_common_mmap,
>   	.get_sgtable		= dma_common_get_sgtable,
> diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c
> index 244eb4857e7f..6b5f4b72ce97 100644
> --- a/arch/powerpc/kernel/iommu.c
> +++ b/arch/powerpc/kernel/iommu.c
> @@ -848,12 +848,12 @@ EXPORT_SYMBOL_GPL(iommu_tce_table_put);
>   
>   /* Creates TCEs for a user provided buffer.  The user buffer must be
>    * contiguous real kernel storage (not vmalloc).  The address passed here
> - * comprises a page address and offset into that page. The dma_addr_t
> - * returned will point to the same byte within the page as was passed in.
> + * is physical address into that page. The dma_addr_t returned will point
> + * to the same byte within the page as was passed in.
>    */
> -dma_addr_t iommu_map_page(struct device *dev, struct iommu_table *tbl,
> -			  struct page *page, unsigned long offset, size_t size,
> -			  unsigned long mask, enum dma_data_direction direction,
> +dma_addr_t iommu_map_phys(struct device *dev, struct iommu_table *tbl,
> +			  phys_addr_t phys, size_t size, unsigned long mask,
> +			  enum dma_data_direction direction,
>   			  unsigned long attrs)
>   {
>   	dma_addr_t dma_handle = DMA_MAPPING_ERROR;
> @@ -863,7 +863,7 @@ dma_addr_t iommu_map_page(struct device *dev, struct iommu_table *tbl,
>   
>   	BUG_ON(direction == DMA_NONE);
>   
> -	vaddr = page_address(page) + offset;
> +	vaddr = phys_to_virt(phys);
>   	uaddr = (unsigned long)vaddr;
>   
>   	if (tbl) {
> @@ -890,7 +890,7 @@ dma_addr_t iommu_map_page(struct device *dev, struct iommu_table *tbl,
>   	return dma_handle;
>   }
>   
> -void iommu_unmap_page(struct iommu_table *tbl, dma_addr_t dma_handle,
> +void iommu_unmap_phys(struct iommu_table *tbl, dma_addr_t dma_handle,
>   		      size_t size, enum dma_data_direction direction,
>   		      unsigned long attrs)
>   {
> diff --git a/arch/powerpc/platforms/ps3/system-bus.c b/arch/powerpc/platforms/ps3/system-bus.c
> index afbaabf182d0..f4f3477d3a23 100644
> --- a/arch/powerpc/platforms/ps3/system-bus.c
> +++ b/arch/powerpc/platforms/ps3/system-bus.c
> @@ -551,18 +551,20 @@ static void ps3_free_coherent(struct device *_dev, size_t size, void *vaddr,
>   
>   /* Creates TCEs for a user provided buffer.  The user buffer must be
>    * contiguous real kernel storage (not vmalloc).  The address passed here
> - * comprises a page address and offset into that page. The dma_addr_t
> - * returned will point to the same byte within the page as was passed in.
> + * is physical address to that hat page. The dma_addr_t returned will point
> + * to the same byte within the page as was passed in.
>    */
>   
> -static dma_addr_t ps3_sb_map_page(struct device *_dev, struct page *page,
> -	unsigned long offset, size_t size, enum dma_data_direction direction,
> -	unsigned long attrs)
> +static dma_addr_t ps3_sb_map_phys(struct device *_dev, phys_addr_t phys,
> +	size_t size, enum dma_data_direction direction, unsigned long attrs)

CHECK: Alignment should match open parenthesis
#151: FILE: arch/powerpc/platforms/ps3/system-bus.c:559:
+static dma_addr_t ps3_sb_map_phys(struct device *_dev, phys_addr_t phys,
+	size_t size, enum dma_data_direction direction, unsigned long attrs)



>   {
>   	struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev);
>   	int result;
>   	dma_addr_t bus_addr;
> -	void *ptr = page_address(page) + offset;
> +	void *ptr = phys_to_virt(phys);
> +
> +	if (unlikely(attrs & DMA_ATTR_MMIO))
> +		return DMA_MAPPING_ERROR;
>   
>   	result = ps3_dma_map(dev->d_region, (unsigned long)ptr, size,
>   			     &bus_addr,
> @@ -577,8 +579,8 @@ static dma_addr_t ps3_sb_map_page(struct device *_dev, struct page *page,
>   	return bus_addr;
>   }
>   
> -static dma_addr_t ps3_ioc0_map_page(struct device *_dev, struct page *page,
> -				    unsigned long offset, size_t size,
> +static dma_addr_t ps3_ioc0_map_phys(struct device *_dev, phys_addr_t phys,
> +				    size_t size,
>   				    enum dma_data_direction direction,
>   				    unsigned long attrs)
>   {
> @@ -586,7 +588,10 @@ static dma_addr_t ps3_ioc0_map_page(struct device *_dev, struct page *page,
>   	int result;
>   	dma_addr_t bus_addr;
>   	u64 iopte_flag;
> -	void *ptr = page_address(page) + offset;
> +	void *ptr = phys_to_virt(phys);
> +
> +	if (unlikely(attrs & DMA_ATTR_MMIO))
> +		return DMA_MAPPING_ERROR;
>   
>   	iopte_flag = CBE_IOPTE_M;
>   	switch (direction) {
> @@ -613,7 +618,7 @@ static dma_addr_t ps3_ioc0_map_page(struct device *_dev, struct page *page,
>   	return bus_addr;
>   }
>   
> -static void ps3_unmap_page(struct device *_dev, dma_addr_t dma_addr,
> +static void ps3_unmap_phys(struct device *_dev, dma_addr_t dma_addr,
>   	size_t size, enum dma_data_direction direction, unsigned long attrs)

CHECK: Alignment should match open parenthesis
#193: FILE: arch/powerpc/platforms/ps3/system-bus.c:622:
+static void ps3_unmap_phys(struct device *_dev, dma_addr_t dma_addr,
  	size_t size, enum dma_data_direction direction, unsigned long attrs)



>   {
>   	struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev);
> @@ -690,8 +695,8 @@ static const struct dma_map_ops ps3_sb_dma_ops = {
>   	.map_sg = ps3_sb_map_sg,
>   	.unmap_sg = ps3_sb_unmap_sg,
>   	.dma_supported = ps3_dma_supported,
> -	.map_page = ps3_sb_map_page,
> -	.unmap_page = ps3_unmap_page,
> +	.map_phys = ps3_sb_map_phys,
> +	.unmap_phys = ps3_unmap_phys,
>   	.mmap = dma_common_mmap,
>   	.get_sgtable = dma_common_get_sgtable,
>   	.alloc_pages_op = dma_common_alloc_pages,
> @@ -704,8 +709,8 @@ static const struct dma_map_ops ps3_ioc0_dma_ops = {
>   	.map_sg = ps3_ioc0_map_sg,
>   	.unmap_sg = ps3_ioc0_unmap_sg,
>   	.dma_supported = ps3_dma_supported,
> -	.map_page = ps3_ioc0_map_page,
> -	.unmap_page = ps3_unmap_page,
> +	.map_phys = ps3_ioc0_map_phys,
> +	.unmap_phys = ps3_unmap_phys,
>   	.mmap = dma_common_mmap,
>   	.get_sgtable = dma_common_get_sgtable,
>   	.alloc_pages_op = dma_common_alloc_pages,
> diff --git a/arch/powerpc/platforms/pseries/ibmebus.c b/arch/powerpc/platforms/pseries/ibmebus.c
> index 3436b0af795e..cad2deb7e70d 100644
> --- a/arch/powerpc/platforms/pseries/ibmebus.c
> +++ b/arch/powerpc/platforms/pseries/ibmebus.c
> @@ -86,17 +86,18 @@ static void ibmebus_free_coherent(struct device *dev,
>   	kfree(vaddr);
>   }
>   
> -static dma_addr_t ibmebus_map_page(struct device *dev,
> -				   struct page *page,
> -				   unsigned long offset,
> +static dma_addr_t ibmebus_map_phys(struct device *dev, phys_addr_t phys,
>   				   size_t size,
>   				   enum dma_data_direction direction,
>   				   unsigned long attrs)
>   {
> -	return (dma_addr_t)(page_address(page) + offset);
> +	if (attrs & DMA_ATTR_MMIO)
> +		return DMA_MAPPING_ERROR;
> +
> +	return (dma_addr_t)(phys_to_virt(phys));
>   }
>   
> -static void ibmebus_unmap_page(struct device *dev,
> +static void ibmebus_unmap_phys(struct device *dev,
>   			       dma_addr_t dma_addr,
>   			       size_t size,
>   			       enum dma_data_direction direction,
> @@ -146,8 +147,8 @@ static const struct dma_map_ops ibmebus_dma_ops = {
>   	.unmap_sg           = ibmebus_unmap_sg,
>   	.dma_supported      = ibmebus_dma_supported,
>   	.get_required_mask  = ibmebus_dma_get_required_mask,
> -	.map_page           = ibmebus_map_page,
> -	.unmap_page         = ibmebus_unmap_page,
> +	.map_phys           = ibmebus_map_phys,
> +	.unmap_phys         = ibmebus_unmap_phys,
>   };
>   
>   static int ibmebus_match_path(struct device *dev, const void *data)
> diff --git a/arch/powerpc/platforms/pseries/vio.c b/arch/powerpc/platforms/pseries/vio.c
> index ac1d2d2c9a88..18cffac5468f 100644
> --- a/arch/powerpc/platforms/pseries/vio.c
> +++ b/arch/powerpc/platforms/pseries/vio.c
> @@ -512,18 +512,21 @@ static void vio_dma_iommu_free_coherent(struct device *dev, size_t size,
>   	vio_cmo_dealloc(viodev, roundup(size, PAGE_SIZE));
>   }
>   
> -static dma_addr_t vio_dma_iommu_map_page(struct device *dev, struct page *page,
> -                                         unsigned long offset, size_t size,
> -                                         enum dma_data_direction direction,
> -                                         unsigned long attrs)
> +static dma_addr_t vio_dma_iommu_map_phys(struct device *dev, phys_addr_t phys,
> +					 size_t size,
> +					 enum dma_data_direction direction,
> +					 unsigned long attrs)
>   {
>   	struct vio_dev *viodev = to_vio_dev(dev);
>   	struct iommu_table *tbl = get_iommu_table_base(dev);
>   	dma_addr_t ret = DMA_MAPPING_ERROR;
>   
> +	if (unlikely(attrs & DMA_ATTR_MMIO))
> +		return ret;
> +
>   	if (vio_cmo_alloc(viodev, roundup(size, IOMMU_PAGE_SIZE(tbl))))
>   		goto out_fail;
> -	ret = iommu_map_page(dev, tbl, page, offset, size, dma_get_mask(dev),
> +	ret = iommu_map_phys(dev, tbl, phys, size, dma_get_mask(dev),
>   			direction, attrs);

CHECK: Alignment should match open parenthesis
#285: FILE: arch/powerpc/platforms/pseries/vio.c:530:
+	ret = iommu_map_phys(dev, tbl, phys, size, dma_get_mask(dev),
  			direction, attrs);


>   	if (unlikely(ret == DMA_MAPPING_ERROR))
>   		goto out_deallocate;
> @@ -536,7 +539,7 @@ static dma_addr_t vio_dma_iommu_map_page(struct device *dev, struct page *page,
>   	return DMA_MAPPING_ERROR;
>   }
>   
> -static void vio_dma_iommu_unmap_page(struct device *dev, dma_addr_t dma_handle,
> +static void vio_dma_iommu_unmap_phys(struct device *dev, dma_addr_t dma_handle,
>   				     size_t size,
>   				     enum dma_data_direction direction,
>   				     unsigned long attrs)
> @@ -544,7 +547,7 @@ static void vio_dma_iommu_unmap_page(struct device *dev, dma_addr_t dma_handle,
>   	struct vio_dev *viodev = to_vio_dev(dev);
>   	struct iommu_table *tbl = get_iommu_table_base(dev);
>   
> -	iommu_unmap_page(tbl, dma_handle, size, direction, attrs);
> +	iommu_unmap_phys(tbl, dma_handle, size, direction, attrs);
>   	vio_cmo_dealloc(viodev, roundup(size, IOMMU_PAGE_SIZE(tbl)));
>   }
>   
> @@ -605,8 +608,8 @@ static const struct dma_map_ops vio_dma_mapping_ops = {
>   	.free              = vio_dma_iommu_free_coherent,
>   	.map_sg            = vio_dma_iommu_map_sg,
>   	.unmap_sg          = vio_dma_iommu_unmap_sg,
> -	.map_page          = vio_dma_iommu_map_page,
> -	.unmap_page        = vio_dma_iommu_unmap_page,
> +	.map_phys          = vio_dma_iommu_map_phys,
> +	.unmap_phys        = vio_dma_iommu_unmap_phys,
>   	.dma_supported     = dma_iommu_dma_supported,
>   	.get_required_mask = dma_iommu_get_required_mask,
>   	.mmap		   = dma_common_mmap,
> 



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Date: Fri, 14 Nov 2025 10:27:40 +0100
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From: Oleksii Kurochko 
Subject: Re: [for 4.22 v5 02/18] xen/riscv: introduce VMID allocation and
 manegement
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 11/6/25 3:05 PM, Jan Beulich wrote:
> On 20.10.2025 17:57, Oleksii Kurochko wrote:
>
> +static unsigned int vmidlen_detect(void)
> +{
> +    unsigned int vmid_bits;
> +
> +    /*
> +     * According to the RISC-V Privileged Architecture Spec:
> +     *   When MODE=Bare, guest physical addresses are equal to supervisor
> +     *   physical addresses, and there is no further memory protection
> +     *   for a guest virtual machine beyond the physical memory protection
> +     *   scheme described in Section "Physical Memory Protection".
> +     *   In this case, the remaining fields in hgatp must be set to zeros.
> +     * Thereby it is necessary to set gstage_mode not equal to Bare.
> +     */
> +    ASSERT(gstage_mode != HGATP_MODE_OFF);
> +    csr_write(CSR_HGATP,
> +              MASK_INSR(gstage_mode, HGATP_MODE_MASK) | HGATP_VMID_MASK);
> +    vmid_bits = MASK_EXTR(csr_read(CSR_HGATP), HGATP_VMID_MASK);
> +    vmid_bits = flsl(vmid_bits);
> +    csr_write(CSR_HGATP, _AC(0, UL));
> +
> +    /*
> +     * From RISC-V spec:
> +     *   Speculative executions of the address-translation algorithm behave as
> +     *   non-speculative executions of the algorithm do, except that they must
> +     *   not set the dirty bit for a PTE, they must not trigger an exception,
> +     *   and they must not create address-translation cache entries if those
> +     *   entries would have been invalidated by any SFENCE.VMA instruction
> +     *   executed by the hart since the speculative execution of the algorithm
> +     *   began.
> +     *
> +     * Also, despite of the fact here it is mentioned that when V=0 two-stage
> +     * address translation is inactivated:
> +     *   The current virtualization mode, denoted V, indicates whether the hart
> +     *   is currently executing in a guest. When V=1, the hart is either in
> +     *   virtual S-mode (VS-mode), or in virtual U-mode (VU-mode) atop a guest
> +     *   OS running in VS-mode. When V=0, the hart is either in M-mode, in
> +     *   HS-mode, or in U-mode atop an OS running in HS-mode. The
> +     *   virtualization mode also indicates whether two-stage address
> +     *   translation is active (V=1) or inactive (V=0).
> +     * But on the same side, writing to hgatp register activates it:
> +     *   The hgatp register is considered active for the purposes of
> +     *   the address-translation algorithm unless the effective privilege mode
> +     *   is U and hstatus.HU=0.
> +     *
> +     * Thereby it leaves some room for speculation even in this stage of boot,
> +     * so it could be that we polluted local TLB so flush all guest TLB.
> +     */
> +    local_hfence_gvma_all();
> That's a lot of redundancy with gstage_mode_detect(). The function call here
> actually renders the one there redundant, afaict. Did you consider putting a
> single instance at the end of it in pre_gstage_init()? Otherwise at least
> don't repeat the comment here, but merely point at the other one?

Agree, it could be moved to the end of pre_gstage_init().


>> +    return vmid_bits;
>> +}
>> +
>> +void vmid_init(void)
> This (and its helper) isn't __init because you intend to also call it during
> bringup of secondary processors?

Yes, I wasn't able to find that VMIDLEN is guaranteed to be same for all
harts.

>> +    unsigned int vmid_len = vmidlen_detect();
>> +    struct vmid_data *data = &this_cpu(vmid_data);
>> +
>> +    BUILD_BUG_ON((HGATP_VMID_MASK >> HGATP_VMID_SHIFT) >
>> +                 (BIT((sizeof(data->max_vmid) * BITS_PER_BYTE), UL) - 1));
>> +
>> +    data->max_vmid = BIT(vmid_len, U) - 1;
>> +    data->used = opt_vmid && (vmid_len > 1);
>> +
>> +    if ( g_vmid_used < 0 )
>> +    {
>> +        g_vmid_used = data->used;
>> +        printk("VMIDs use is %sabled\n", data->used ? "en" : "dis");
>> +    }
>> +    else if ( g_vmid_used != data->used )
>> +        printk("CPU%u: VMIDs use is %sabled\n", smp_processor_id(),
>> +               data->used ? "en" : "dis");
>> +
>> +    /* Zero indicates 'invalid generation', so we start the count at one. */
>> +    data->generation = 1;
>> +
>> +    /* Zero indicates 'VMIDs use disabled', so we start the count at one. */
>> +    data->next_vmid = 1;
>> +}
>> +
>> +void vmid_flush_vcpu(struct vcpu *v)
>> +{
>> +    write_atomic(&v->arch.vmid.generation, 0);
>> +}
>> +
>> +void vmid_flush_hart(void)
>> +{
>> +    struct vmid_data *data = &this_cpu(vmid_data);
>> +
>> +    if ( !data->used )
>> +        return;
>> +
>> +    if ( likely(++data->generation != 0) )
>> +        return;
>> +
>> +    /*
>> +     * VMID generations are 64 bit.  Overflow of generations never happens.
>> +     * For safety, we simply disable ASIDs, so correctness is established; it
>> +     * only runs a bit slower.
>> +     */
>> +    printk("%s: VMID generation overrun. Disabling VMIDs.\n", __func__);
> Is logging of the function name of any value here?

Agree, there is no any sense for the logging of the function name.

>   Also, despite the x86
> original havinbg it like this - generally no full stops please if log
> messages. "VMID generation overrun; disabling VMIDs\n" would do.

Sure, I will drop it and will try to not add it in such cases. But could you
please remind (if I asked that before) me what is the reason why full stop
shouldn't be presented in such cases?

>> +bool vmid_handle_vmenter(struct vcpu_vmid *vmid)
>> +{
>> +    struct vmid_data *data = &this_cpu(vmid_data);
>> +
>> +    /* Test if VCPU has valid VMID. */
> x86 has a ->disabled check up from here; why do you not check ->used?

The x86 comment confused me, at first I thought the check was related to
erratum #170, but now I see that it might actually be useful here, so I'll add:
     if ( !data->used )
         goto disabled;

Thanks.

~ Oleksii

--------------ihJQpW5AIiAsY4FgPUKoUE3H
Content-Type: text/html; charset=UTF-8
Content-Transfer-Encoding: 7bit



  
    
  
  
    


    

    
On 11/6/25 3:05 PM, Jan Beulich wrote:

    

    

      
On 20.10.2025 17:57, Oleksii Kurochko wrote:

+static unsigned int vmidlen_detect(void)
+{
+    unsigned int vmid_bits;
+
+    /*
+     * According to the RISC-V Privileged Architecture Spec:
+     *   When MODE=Bare, guest physical addresses are equal to supervisor
+     *   physical addresses, and there is no further memory protection
+     *   for a guest virtual machine beyond the physical memory protection
+     *   scheme described in Section "Physical Memory Protection".
+     *   In this case, the remaining fields in hgatp must be set to zeros.
+     * Thereby it is necessary to set gstage_mode not equal to Bare.
+     */
+    ASSERT(gstage_mode != HGATP_MODE_OFF);
+    csr_write(CSR_HGATP,
+              MASK_INSR(gstage_mode, HGATP_MODE_MASK) | HGATP_VMID_MASK);
+    vmid_bits = MASK_EXTR(csr_read(CSR_HGATP), HGATP_VMID_MASK);
+    vmid_bits = flsl(vmid_bits);
+    csr_write(CSR_HGATP, _AC(0, UL));
+
+    /*
+     * From RISC-V spec:
+     *   Speculative executions of the address-translation algorithm behave as
+     *   non-speculative executions of the algorithm do, except that they must
+     *   not set the dirty bit for a PTE, they must not trigger an exception,
+     *   and they must not create address-translation cache entries if those
+     *   entries would have been invalidated by any SFENCE.VMA instruction
+     *   executed by the hart since the speculative execution of the algorithm
+     *   began.
+     *
+     * Also, despite of the fact here it is mentioned that when V=0 two-stage
+     * address translation is inactivated:
+     *   The current virtualization mode, denoted V, indicates whether the hart
+     *   is currently executing in a guest. When V=1, the hart is either in
+     *   virtual S-mode (VS-mode), or in virtual U-mode (VU-mode) atop a guest
+     *   OS running in VS-mode. When V=0, the hart is either in M-mode, in
+     *   HS-mode, or in U-mode atop an OS running in HS-mode. The
+     *   virtualization mode also indicates whether two-stage address
+     *   translation is active (V=1) or inactive (V=0).
+     * But on the same side, writing to hgatp register activates it:
+     *   The hgatp register is considered active for the purposes of
+     *   the address-translation algorithm unless the effective privilege mode
+     *   is U and hstatus.HU=0.
+     *
+     * Thereby it leaves some room for speculation even in this stage of boot,
+     * so it could be that we polluted local TLB so flush all guest TLB.
+     */
+    local_hfence_gvma_all();


      
That's a lot of redundancy with gstage_mode_detect(). The function call here
actually renders the one there redundant, afaict. Did you consider putting a
single instance at the end of it in pre_gstage_init()? Otherwise at least
don't repeat the comment here, but merely point at the other one?

    

    
Agree, it could be moved to the end of pre_gstage_init().

    


    

    

      

        
+    return vmid_bits;
+}
+
+void vmid_init(void)


      

      
This (and its helper) isn't __init because you intend to also call it during
bringup of secondary processors?

    

    
Yes, I wasn't able to find that VMIDLEN is guaranteed to be same for all
harts.



    

      

        
+    unsigned int vmid_len = vmidlen_detect();
+    struct vmid_data *data = &this_cpu(vmid_data);
+
+    BUILD_BUG_ON((HGATP_VMID_MASK >> HGATP_VMID_SHIFT) >
+                 (BIT((sizeof(data->max_vmid) * BITS_PER_BYTE), UL) - 1));
+
+    data->max_vmid = BIT(vmid_len, U) - 1;
+    data->used = opt_vmid && (vmid_len > 1);
+
+    if ( g_vmid_used < 0 )
+    {
+        g_vmid_used = data->used;
+        printk("VMIDs use is %sabled\n", data->used ? "en" : "dis");
+    }
+    else if ( g_vmid_used != data->used )
+        printk("CPU%u: VMIDs use is %sabled\n", smp_processor_id(),
+               data->used ? "en" : "dis");
+
+    /* Zero indicates 'invalid generation', so we start the count at one. */
+    data->generation = 1;
+
+    /* Zero indicates 'VMIDs use disabled', so we start the count at one. */
+    data->next_vmid = 1;
+}
+
+void vmid_flush_vcpu(struct vcpu *v)
+{
+    write_atomic(&v->arch.vmid.generation, 0);
+}
+
+void vmid_flush_hart(void)
+{
+    struct vmid_data *data = &this_cpu(vmid_data);
+
+    if ( !data->used )
+        return;
+
+    if ( likely(++data->generation != 0) )
+        return;
+
+    /*
+     * VMID generations are 64 bit.  Overflow of generations never happens.
+     * For safety, we simply disable ASIDs, so correctness is established; it
+     * only runs a bit slower.
+     */
+    printk("%s: VMID generation overrun. Disabling VMIDs.\n", __func__);


      

      
Is logging of the function name of any value here?

    

    
Agree, there is no any sense for the logging of the function name.



    

      
 Also, despite the x86
original havinbg it like this - generally no full stops please if log
messages. "VMID generation overrun; disabling VMIDs\n" would do.

    

    
Sure, I will drop it and will try to not add it in such cases. But could you
please remind (if I asked that before) me what is the reason why full stop
shouldn't be presented in such cases?



    

      

        
+bool vmid_handle_vmenter(struct vcpu_vmid *vmid)
+{
+    struct vmid_data *data = &this_cpu(vmid_data);
+
+    /* Test if VCPU has valid VMID. */


      

      
x86 has a ->disabled check up from here; why do you not check ->used?

    

    
The x86 comment confused me, at first I thought the check was related to
erratum #170, but now I see that it might actually be useful here, so I'll add:
    if ( !data->used )
        goto disabled;

Thanks.

~ Oleksii

  


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To: Jan Beulich 
Cc: Anthony PERARD , xen-devel@lists.xenproject.org
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Subject: Re: [PATCH 4/5] config: remove unused paths from config/Paths.mk.in
References: <20251111161959.13667-1-jgross@suse.com>
 <20251111161959.13667-5-jgross@suse.com>
 <4cfc4f5b-1d7e-4f69-9bfd-99ac0f65ac97@suse.com>
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Date: Fri, 14 Nov 2025 11:53:11 +0100
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Subject: Re: [for 4.22 v5 05/18] xen/riscv: add root page table allocation
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: 
 <81d36dc5277d4756442f3ad5d64f37148787394a.1760974017.git.oleksii.kurochko@gmail.com>
 <8e3b791c-22ca-43e2-a3bf-f440032ab1ed@suse.com>
Content-Language: en-US
From: Oleksii Kurochko 
In-Reply-To: <8e3b791c-22ca-43e2-a3bf-f440032ab1ed@suse.com>

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On 11/6/25 3:25 PM, Jan Beulich wrote:
> On 20.10.2025 17:57, Oleksii Kurochko wrote:
>> --- a/xen/arch/riscv/p2m.c
>> +++ b/xen/arch/riscv/p2m.c
>> @@ -3,6 +3,7 @@
>>   #include 
>>   #include 
>>   #include 
>> +#include 
>>   #include 
>>   #include 
>>   #include 
>> @@ -103,6 +104,70 @@ void __init pre_gstage_init(void)
>>       vmid_init();
>>   }
>>   
>> +static void clear_and_clean_page(struct page_info *page, bool clean_dcache)
>> +{
>> +    clear_domain_page(page_to_mfn(page));
>> +
>> +    /*
>> +     * If the IOMMU doesn't support coherent walks and the p2m tables are
>> +     * shared between the CPU and IOMMU, it is necessary to clean the
>> +     * d-cache.
>> +     */
>> +    if ( clean_dcache )
>> +        clean_dcache_va_range(page, PAGE_SIZE);
> This cleans part of frame_table[], but not the memory page in question.

Oh, right, we need to map the domain page first.

Would it make sense to avoid using|clear_domain_page()| in order to prevent
calling|map_domain_page()| twice (once inside|clear_domain_page()| and once
before|clean_dcache_va_range()|), and instead do it like this:
     void *p = __map_domain_page(page);

     clear_page(p);

     /*
      * If the IOMMU doesn't support coherent walks and the p2m tables are
      * shared between the CPU and IOMMU, it is necessary to clean the
      * d-cache.
      */
     if ( clean_dcache )
         clean_dcache_va_range(p, PAGE_SIZE);

     unmap_domain_page(p);

>> @@ -55,6 +76,39 @@ int paging_freelist_adjust(struct domain *d, unsigned long pages,
>>       return 0;
>>   }
>>   
>> +int paging_refill_from_domheap(struct domain *d, unsigned int nr_pages)
>> +{
>> +    ASSERT(spin_is_locked(&d->arch.paging.lock));
>> +
>> +    for ( unsigned int i = 0; i < nr_pages; i++ )
>> +    {
>> +        int rc = paging_add_page_to_freelist(d);
> The anomaly is more pronounced here, with the other function name in context:
> paging_refill_from_domheap() doesn't suggest there's a page (or several) being
> handed to it. paging_add_page_to_freelist() suggests one of its parameter
> would want to be struct page_info *. Within the naming model you chose, maybe
> paging_refill_from_domheap_one() or paging_refill_one_from_domheap()? Or
> simply _paging_refill_from_domheap()?

Thanks for suggestions. I like the option with "_*" as it is more clearly marks it
as an internal helper without introducing "_one" suffix. I will use the same approach
for paging_ret_page_to_domheap(): s/paging_ret_page_to_domheap/_paging_ret_to_domheap().

Shouldn't we use "__*" instead of "_*" or "__*" is reserved for something else? "__*" is
used quite frequent in Xen code base.

~ Oleksii


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On 11/6/25 3:25 PM, Jan Beulich wrote:

    

    

      
On 20.10.2025 17:57, Oleksii Kurochko wrote:


      

        
--- a/xen/arch/riscv/p2m.c
+++ b/xen/arch/riscv/p2m.c
@@ -3,6 +3,7 @@
 #include <xen/init.h>
 #include <xen/lib.h>
 #include <xen/macros.h>
+#include <xen/domain_page.h>
 #include <xen/mm.h>
 #include <xen/paging.h>
 #include <xen/rwlock.h>
@@ -103,6 +104,70 @@ void __init pre_gstage_init(void)
     vmid_init();
 }
 
+static void clear_and_clean_page(struct page_info *page, bool clean_dcache)
+{
+    clear_domain_page(page_to_mfn(page));
+
+    /*
+     * If the IOMMU doesn't support coherent walks and the p2m tables are
+     * shared between the CPU and IOMMU, it is necessary to clean the
+     * d-cache.
+     */
+    if ( clean_dcache )
+        clean_dcache_va_range(page, PAGE_SIZE);


      

      
This cleans part of frame_table[], but not the memory page in question.

    

    
Oh, right, we need to map the domain page first.

Would it make sense to avoid using clear_domain_page() in order to prevent
calling map_domain_page() twice (once inside clear_domain_page() and once
before clean_dcache_va_range()), and instead do it like this:
    void *p = __map_domain_page(page);

    clear_page(p);

    /*
     * If the IOMMU doesn't support coherent walks and the p2m tables are
     * shared between the CPU and IOMMU, it is necessary to clean the
     * d-cache.
     */
    if ( clean_dcache )
        clean_dcache_va_range(p, PAGE_SIZE);

    unmap_domain_page(p);



    

      

        
@@ -55,6 +76,39 @@ int paging_freelist_adjust(struct domain *d, unsigned long pages,
     return 0;
 }
 
+int paging_refill_from_domheap(struct domain *d, unsigned int nr_pages)
+{
+    ASSERT(spin_is_locked(&d->arch.paging.lock));
+
+    for ( unsigned int i = 0; i < nr_pages; i++ )
+    {
+        int rc = paging_add_page_to_freelist(d);


      

      
The anomaly is more pronounced here, with the other function name in context:
paging_refill_from_domheap() doesn't suggest there's a page (or several) being
handed to it. paging_add_page_to_freelist() suggests one of its parameter
would want to be struct page_info *. Within the naming model you chose, maybe
paging_refill_from_domheap_one() or paging_refill_one_from_domheap()? Or
simply _paging_refill_from_domheap()?

    

    
Thanks for suggestions. I like the option with "_*" as it is more clearly marks it
as an internal helper without introducing "_one" suffix. I will use the same approach
for paging_ret_page_to_domheap(): s/paging_ret_page_to_domheap/_paging_ret_to_domheap().

Shouldn't we use "__*" instead of "_*" or "__*" is reserved for something else? "__*" is
used quite frequent in Xen code base.

~ Oleksii

    

  


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From: Juergen Gross 
To: xen-devel@lists.xenproject.org
Cc: Juergen Gross ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Christian Lindig ,
	David Scott 
Subject: [PATCH v2 0/4] configure: reduce number of files created
Date: Fri, 14 Nov 2025 12:32:34 +0100
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Instead of creating lots of files during configure, create those
files (where possible) rather at build time. This reduces the need
to run configure when e.g. changing a man page containing a path
defined by the configure run.

Changes in V2:
- dropped patch 1 as already applied
- no longer rename files to *.src
- don't use pattern rule

Juergen Gross (4):
  build: add make macro for making file from file.in
  docs: replace @xxx@ markers at build time
  config: remove unused paths from config/Paths.mk.in
  tools: replace @xxx@ markers at build time

 .gitignore                     |  1 +
 Config.mk                      | 13 +++++++++++++
 config/Paths.mk.in             |  5 -----
 config/Tools-paths.mk.in       | 10 ++++++++++
 docs/Makefile                  |  8 +++++++-
 docs/configure                 |  7 +------
 docs/configure.ac              |  9 +--------
 tools/configure                | 21 ++-------------------
 tools/configure.ac             | 19 +------------------
 tools/hotplug/FreeBSD/Makefile |  7 ++++++-
 tools/hotplug/Linux/Makefile   | 10 +++++++++-
 tools/hotplug/NetBSD/Makefile  |  7 ++++++-
 tools/hotplug/common/Makefile  |  7 ++++++-
 tools/ocaml/libs/xs/Makefile   |  9 +++++++++
 tools/ocaml/xenstored/Makefile |  9 ++++++++-
 15 files changed, 80 insertions(+), 62 deletions(-)
 create mode 100644 config/Tools-paths.mk.in

-- 
2.51.0



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	Anthony PERARD 
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Use the apply-build-vars make macro to replace the @xxx@ markers in
*.in files only at build time.

This allows to change the affected document files without having to
run "configure" for making the change effective.

While at it add the generated files to the distclean make target.

Signed-off-by: Juergen Gross 
---
V2:
- don't rename source files
---
 docs/Makefile     | 8 +++++++-
 docs/configure    | 7 +------
 docs/configure.ac | 9 +--------
 3 files changed, 9 insertions(+), 15 deletions(-)

diff --git a/docs/Makefile b/docs/Makefile
index 37776d303c..e5f4a8ca86 100644
--- a/docs/Makefile
+++ b/docs/Makefile
@@ -8,8 +8,11 @@ DATE		:= $(call date,"+%Y-%m-%d")
 DOC_ARCHES      := arm ppc riscv x86_32 x86_64
 MAN_SECTIONS    := 1 5 7 8
 
+IN_FILES := man/xl-disk-configuration.5.pod man/xl-network-configuration.5.pod
+IN_FILES += man/xl.1.pod man/xl.cfg.5.pod man/xl.conf.5.pod
+
 # Documentation sources to build
-MAN-SRC-y := $(sort $(basename $(wildcard man/*.pod man/*.pandoc)))
+MAN-SRC-y := $(sort $(basename $(wildcard man/*.pod man/*.pandoc) $(IN_FILES)))
 
 RST-SRC-y := $(sort $(filter-out %index.rst,$(shell find * -type f -name '*.rst' -print)))
 
@@ -77,11 +80,14 @@ clean: clean-man-pages
 distclean: clean
 	rm -rf $(XEN_ROOT)/config/Docs.mk config.log config.status config.cache \
 		autom4te.cache
+	rm -f $(IN_FILES)
 
 # Top level install targets
 
 .PHONY: man-pages install-man-pages clean-man-pages uninstall-man-pages
 
+$(foreach file,$(IN_FILES),$(eval $(call apply-build-vars,$(file))))
+
 # Metarules for generating manpages.  Run with $(1) substitued for section
 define GENERATE_MANPAGE_RULES
 
diff --git a/docs/configure b/docs/configure
index 98dda3cd0f..8871914dcb 100755
--- a/docs/configure
+++ b/docs/configure
@@ -1794,7 +1794,7 @@ ac_compiler_gnu=$ac_cv_c_compiler_gnu
 
 
 
-ac_config_files="$ac_config_files ../config/Docs.mk man/xl.cfg.5.pod man/xl.1.pod man/xl-disk-configuration.5.pod man/xl-network-configuration.5.pod man/xl.conf.5.pod"
+ac_config_files="$ac_config_files ../config/Docs.mk"
 
 
 
@@ -3063,11 +3063,6 @@ for ac_config_target in $ac_config_targets
 do
   case $ac_config_target in
     "../config/Docs.mk") CONFIG_FILES="$CONFIG_FILES ../config/Docs.mk" ;;
-    "man/xl.cfg.5.pod") CONFIG_FILES="$CONFIG_FILES man/xl.cfg.5.pod" ;;
-    "man/xl.1.pod") CONFIG_FILES="$CONFIG_FILES man/xl.1.pod" ;;
-    "man/xl-disk-configuration.5.pod") CONFIG_FILES="$CONFIG_FILES man/xl-disk-configuration.5.pod" ;;
-    "man/xl-network-configuration.5.pod") CONFIG_FILES="$CONFIG_FILES man/xl-network-configuration.5.pod" ;;
-    "man/xl.conf.5.pod") CONFIG_FILES="$CONFIG_FILES man/xl.conf.5.pod" ;;
 
   *) as_fn_error $? "invalid argument: \`$ac_config_target'" "$LINENO" 5;;
   esac
diff --git a/docs/configure.ac b/docs/configure.ac
index c2e5edd3b3..43dc516056 100644
--- a/docs/configure.ac
+++ b/docs/configure.ac
@@ -5,14 +5,7 @@ AC_PREREQ([2.67])
 AC_INIT([Xen Hypervisor Documentation], m4_esyscmd([../version.sh ../xen/Makefile]),
     [xen-devel@lists.xen.org], [xen], [https://www.xen.org/])
 AC_CONFIG_SRCDIR([misc/xen-command-line.pandoc])
-AC_CONFIG_FILES([
-../config/Docs.mk
-man/xl.cfg.5.pod
-man/xl.1.pod
-man/xl-disk-configuration.5.pod
-man/xl-network-configuration.5.pod
-man/xl.conf.5.pod
-])
+AC_CONFIG_FILES([../config/Docs.mk])
 AC_CONFIG_AUX_DIR([../])
 
 # M4 Macro includes
-- 
2.51.0



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To: xen-devel@lists.xenproject.org
Cc: Juergen Gross ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v2 1/4] build: add make macro for making file from file.in
Date: Fri, 14 Nov 2025 12:32:35 +0100
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Add a new make macro for creating  from .in at build
time. To be used like this:

$(foreach file,$(IN_FILES),$(eval $(call apply-build-vars,$(file))))

This can be used instead of the current approach to perform the similar
step for file.in during ./configure.

This will avoid having to run ./configure just because of modifying a
file depending on a variable set by configure.

Prepare to have multiple files as source for the replacement patterns.

Signed-off-by: Juergen Gross 
---
V2:
- don't use pattern rule, but create explicit dependency in macro,
  don't require to rename source files (Jan Beulich, Andrew Cooper)
---
 Config.mk | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/Config.mk b/Config.mk
index e1556dfbfa..d21d67945a 100644
--- a/Config.mk
+++ b/Config.mk
@@ -159,6 +159,19 @@ define move-if-changed
 	if ! cmp -s $(1) $(2); then mv -f $(1) $(2); else rm -f $(1); fi
 endef
 
+PATH_FILES := Paths
+INC_FILES := $(foreach f, $(PATH_FILES), $(XEN_ROOT)/config/$(f).mk)
+
+include $(INC_FILES)
+
+BUILD_MAKE_VARS := $(foreach f, $(PATH_FILES), $(shell awk '$$2 == ":=" { print $$1; }' $(XEN_ROOT)/config/$(f).mk.in))
+
+# Replace @xxx@ markers in $(1).in with $(xxx) variable contents, write to $(1)
+define apply-build-vars
+ $(1): $(1).in
+	sed $$(foreach v, $$(BUILD_MAKE_VARS), -e 's#@$$(v)@#$$($$(v))#g') <$$< >$$@
+endef
+
 CFLAGS += -fno-strict-aliasing
 
 CFLAGS += -std=gnu99
-- 
2.51.0



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From: Juergen Gross 
To: xen-devel@lists.xenproject.org
Cc: Juergen Gross ,
	Anthony PERARD 
Subject: [PATCH v2 3/4] config: remove unused paths from config/Paths.mk.in
Date: Fri, 14 Nov 2025 12:32:37 +0100
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Some paths in config/Paths.mk.in are used nowhere, so remove them.

Signed-off-by: Juergen Gross 
---
 config/Paths.mk.in | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/config/Paths.mk.in b/config/Paths.mk.in
index bc42748b7a..668545be2f 100644
--- a/config/Paths.mk.in
+++ b/config/Paths.mk.in
@@ -20,10 +20,7 @@ libexecdir               := @libexecdir@
 datarootdir              := @datarootdir@
 mandir                   := @mandir@
 docdir                   := @docdir@
-dvidir                   := @dvidir@
 htmldir                  := @htmldir@
-pdfdir                   := @pdfdir@
-psdir                    := @psdir@
 includedir               := @includedir@
 localstatedir            := @localstatedir@
 sysconfdir               := @sysconfdir@
@@ -34,8 +31,6 @@ LIBEXEC_LIB              := @LIBEXEC_LIB@
 LIBEXEC_INC              := @LIBEXEC_INC@
 
 SHAREDIR                 := @SHAREDIR@
-MAN1DIR                  := $(mandir)/man1
-MAN8DIR                  := $(mandir)/man8
 
 XEN_RUN_DIR              := @XEN_RUN_DIR@
 XEN_LOG_DIR              := @XEN_LOG_DIR@
-- 
2.51.0



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From: Juergen Gross 
To: xen-devel@lists.xenproject.org
Cc: Juergen Gross ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Christian Lindig ,
	David Scott 
Subject: [PATCH v2 4/4] tools: replace @xxx@ markers at build time
Date: Fri, 14 Nov 2025 12:32:38 +0100
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Use the apply-build-vars make macro to replace the @xxx@ markers in
most *.in files only at build time.

As some of the markers are local to tools/configure, introduce
config/Tools-paths.mk.in and add the related make variables to it.
Add Tools-paths to the PATH_FILES make variable in order to include
the definitions for replacing them in the *.in files.

Add the generated files to the distclean target.

Signed-off-by: Juergen Gross 
---
V2:
- don't rename source files
---
 .gitignore                     |  1 +
 Config.mk                      |  2 +-
 config/Tools-paths.mk.in       | 10 ++++++++++
 tools/configure                | 21 ++-------------------
 tools/configure.ac             | 19 +------------------
 tools/hotplug/FreeBSD/Makefile |  7 ++++++-
 tools/hotplug/Linux/Makefile   | 10 +++++++++-
 tools/hotplug/NetBSD/Makefile  |  7 ++++++-
 tools/hotplug/common/Makefile  |  7 ++++++-
 tools/ocaml/libs/xs/Makefile   |  9 +++++++++
 tools/ocaml/xenstored/Makefile |  9 ++++++++-
 11 files changed, 59 insertions(+), 43 deletions(-)
 create mode 100644 config/Tools-paths.mk.in

diff --git a/.gitignore b/.gitignore
index d83427aba8..57d54f676f 100644
--- a/.gitignore
+++ b/.gitignore
@@ -47,6 +47,7 @@ config.status
 config.cache
 config/Toplevel.mk
 config/Paths.mk
+config/Tools-paths.mk
 
 dist/*
 extras/
diff --git a/Config.mk b/Config.mk
index d21d67945a..8d1368d25b 100644
--- a/Config.mk
+++ b/Config.mk
@@ -159,7 +159,7 @@ define move-if-changed
 	if ! cmp -s $(1) $(2); then mv -f $(1) $(2); else rm -f $(1); fi
 endef
 
-PATH_FILES := Paths
+PATH_FILES := Paths Tools-paths
 INC_FILES := $(foreach f, $(PATH_FILES), $(XEN_ROOT)/config/$(f).mk)
 
 include $(INC_FILES)
diff --git a/config/Tools-paths.mk.in b/config/Tools-paths.mk.in
new file mode 100644
index 0000000000..ac6298e761
--- /dev/null
+++ b/config/Tools-paths.mk.in
@@ -0,0 +1,10 @@
+-include $(XEN_ROOT)/config/Paths.mk
+
+XENSTORED                := @XENSTORED@
+XENSTORED_KVA            := @XENSTORED_KVA@
+XENSTORED_PORT           := @XENSTORED_PORT@
+XEN_RUN_STORED           := @XEN_RUN_STORED@
+
+LINUX_BACKEND_MODULES    := @LINUX_BACKEND_MODULES@
+
+qemu_xen_path            := @qemu_xen_path@
diff --git a/tools/configure b/tools/configure
index 3111f5688c..479c7c9a3c 100755
--- a/tools/configure
+++ b/tools/configure
@@ -2742,7 +2742,7 @@ ac_compiler_gnu=$ac_cv_c_compiler_gnu
 
 
 
-ac_config_files="$ac_config_files ../config/Tools.mk hotplug/common/hotplugpath.sh hotplug/FreeBSD/rc.d/xencommons hotplug/FreeBSD/rc.d/xendriverdomain hotplug/Linux/init.d/sysconfig.xencommons hotplug/Linux/init.d/sysconfig.xendomains hotplug/Linux/init.d/xen-watchdog hotplug/Linux/init.d/xencommons hotplug/Linux/init.d/xendomains hotplug/Linux/init.d/xendriverdomain hotplug/Linux/launch-xenstore hotplug/Linux/vif-setup hotplug/Linux/xen-hotplug-common.sh hotplug/Linux/xendomains hotplug/NetBSD/rc.d/xencommons hotplug/NetBSD/rc.d/xendriverdomain ocaml/libs/xs/paths.ml ocaml/xenstored/paths.ml ocaml/xenstored/oxenstored.conf"
+ac_config_files="$ac_config_files ../config/Tools.mk ../config/Tools-paths.mk"
 
 ac_config_headers="$ac_config_headers config.h"
 
@@ -11268,24 +11268,7 @@ for ac_config_target in $ac_config_targets
 do
   case $ac_config_target in
     "../config/Tools.mk") CONFIG_FILES="$CONFIG_FILES ../config/Tools.mk" ;;
-    "hotplug/common/hotplugpath.sh") CONFIG_FILES="$CONFIG_FILES hotplug/common/hotplugpath.sh" ;;
-    "hotplug/FreeBSD/rc.d/xencommons") CONFIG_FILES="$CONFIG_FILES hotplug/FreeBSD/rc.d/xencommons" ;;
-    "hotplug/FreeBSD/rc.d/xendriverdomain") CONFIG_FILES="$CONFIG_FILES hotplug/FreeBSD/rc.d/xendriverdomain" ;;
-    "hotplug/Linux/init.d/sysconfig.xencommons") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/init.d/sysconfig.xencommons" ;;
-    "hotplug/Linux/init.d/sysconfig.xendomains") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/init.d/sysconfig.xendomains" ;;
-    "hotplug/Linux/init.d/xen-watchdog") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/init.d/xen-watchdog" ;;
-    "hotplug/Linux/init.d/xencommons") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/init.d/xencommons" ;;
-    "hotplug/Linux/init.d/xendomains") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/init.d/xendomains" ;;
-    "hotplug/Linux/init.d/xendriverdomain") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/init.d/xendriverdomain" ;;
-    "hotplug/Linux/launch-xenstore") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/launch-xenstore" ;;
-    "hotplug/Linux/vif-setup") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/vif-setup" ;;
-    "hotplug/Linux/xen-hotplug-common.sh") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/xen-hotplug-common.sh" ;;
-    "hotplug/Linux/xendomains") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/xendomains" ;;
-    "hotplug/NetBSD/rc.d/xencommons") CONFIG_FILES="$CONFIG_FILES hotplug/NetBSD/rc.d/xencommons" ;;
-    "hotplug/NetBSD/rc.d/xendriverdomain") CONFIG_FILES="$CONFIG_FILES hotplug/NetBSD/rc.d/xendriverdomain" ;;
-    "ocaml/libs/xs/paths.ml") CONFIG_FILES="$CONFIG_FILES ocaml/libs/xs/paths.ml" ;;
-    "ocaml/xenstored/paths.ml") CONFIG_FILES="$CONFIG_FILES ocaml/xenstored/paths.ml" ;;
-    "ocaml/xenstored/oxenstored.conf") CONFIG_FILES="$CONFIG_FILES ocaml/xenstored/oxenstored.conf" ;;
+    "../config/Tools-paths.mk") CONFIG_FILES="$CONFIG_FILES ../config/Tools-paths.mk" ;;
     "config.h") CONFIG_HEADERS="$CONFIG_HEADERS config.h" ;;
     "hotplug/Linux/systemd/proc-xen.mount") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/systemd/proc-xen.mount" ;;
     "hotplug/Linux/systemd/xen-init-dom0.service") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/systemd/xen-init-dom0.service" ;;
diff --git a/tools/configure.ac b/tools/configure.ac
index 285b4ea128..ecd45e782e 100644
--- a/tools/configure.ac
+++ b/tools/configure.ac
@@ -7,24 +7,7 @@ AC_INIT([Xen Hypervisor Tools], m4_esyscmd([../version.sh ../xen/Makefile]),
 AC_CONFIG_SRCDIR([libs/light/libxl.c])
 AC_CONFIG_FILES([
 ../config/Tools.mk
-hotplug/common/hotplugpath.sh
-hotplug/FreeBSD/rc.d/xencommons
-hotplug/FreeBSD/rc.d/xendriverdomain
-hotplug/Linux/init.d/sysconfig.xencommons
-hotplug/Linux/init.d/sysconfig.xendomains
-hotplug/Linux/init.d/xen-watchdog
-hotplug/Linux/init.d/xencommons
-hotplug/Linux/init.d/xendomains
-hotplug/Linux/init.d/xendriverdomain
-hotplug/Linux/launch-xenstore
-hotplug/Linux/vif-setup
-hotplug/Linux/xen-hotplug-common.sh
-hotplug/Linux/xendomains
-hotplug/NetBSD/rc.d/xencommons
-hotplug/NetBSD/rc.d/xendriverdomain
-ocaml/libs/xs/paths.ml
-ocaml/xenstored/paths.ml
-ocaml/xenstored/oxenstored.conf
+../config/Tools-paths.mk
 ])
 AC_CONFIG_HEADERS([config.h])
 AC_CONFIG_AUX_DIR([../])
diff --git a/tools/hotplug/FreeBSD/Makefile b/tools/hotplug/FreeBSD/Makefile
index a6552c9884..8de923781c 100644
--- a/tools/hotplug/FreeBSD/Makefile
+++ b/tools/hotplug/FreeBSD/Makefile
@@ -8,9 +8,13 @@ XEN_SCRIPT_DATA :=
 
 XEN_RCD_PROG := rc.d/xencommons rc.d/xendriverdomain
 
+IN_FILES := rc.d/xencommons rc.d/xendriverdomain
+
 .PHONY: all
 all:
 
+$(foreach file,$(IN_FILES),$(eval $(call apply-build-vars,$(file))))
+
 .PHONY: install
 install: install-scripts install-rcd
 
@@ -35,7 +39,7 @@ uninstall-scripts:
 	rm -f $(addprefix $(DESTDIR)$(XEN_SCRIPT_DIR)/, $(XEN_SCRIPT_DATA))
 
 .PHONY: install-rcd
-install-rcd:
+install-rcd: $(IN_FILES)
 	$(INSTALL_DIR) $(DESTDIR)$(INITD_DIR)
 	set -e; for i in $(XEN_RCD_PROG); \
 	   do \
@@ -51,3 +55,4 @@ clean:
 
 .PHONY: distclean
 distclean: clean
+	rm -rf $(IN_FILES)
diff --git a/tools/hotplug/Linux/Makefile b/tools/hotplug/Linux/Makefile
index 9a7b3a3515..6fcf84a6f4 100644
--- a/tools/hotplug/Linux/Makefile
+++ b/tools/hotplug/Linux/Makefile
@@ -26,9 +26,16 @@ XEN_SCRIPT_DATA := xen-script-common.sh locking.sh logging.sh
 XEN_SCRIPT_DATA += xen-hotplug-common.sh xen-network-common.sh vif-common.sh
 XEN_SCRIPT_DATA += block-common.sh
 
+IN_FILES := launch-xenstore vif-setup xendomains xen-hotplug-common.sh
+IN_FILES += init.d/sysconfig.xendomains init.d/xen-watchdog
+IN_FILES += init.d/xencommons init.d/xendomains
+IN_FILES += init.d/xendriverdomain init.d/sysconfig.xencommons
+
 .PHONY: all
 all: subdirs-all
 
+$(foreach file,$(IN_FILES),$(eval $(call apply-build-vars,$(file))))
+
 .PHONY: install
 install: install-initd install-scripts subdirs-install
 
@@ -37,7 +44,7 @@ uninstall: uninstall-initd uninstall-scripts subdirs-uninstall
 
 # See docs/misc/distro_mapping.txt for INITD_DIR location
 .PHONY: install-initd
-install-initd:
+install-initd: $(IN_FILES)
 	$(INSTALL_DIR) $(DESTDIR)$(INITD_DIR)
 	$(INSTALL_DIR) $(DESTDIR)$(SYSCONFIG_DIR)
 	$(INSTALL_DIR) $(DESTDIR)$(LIBEXEC_BIN)
@@ -81,3 +88,4 @@ clean: subdirs-clean
 
 .PHONY: distclean
 distclean: clean
+	rm -rf $(IN_FILES)
diff --git a/tools/hotplug/NetBSD/Makefile b/tools/hotplug/NetBSD/Makefile
index 1cd3db2ccb..4ac6bd8fa7 100644
--- a/tools/hotplug/NetBSD/Makefile
+++ b/tools/hotplug/NetBSD/Makefile
@@ -12,9 +12,13 @@ XEN_SCRIPTS += qemu-ifup
 XEN_SCRIPT_DATA :=
 XEN_RCD_PROG := rc.d/xencommons rc.d/xendomains rc.d/xen-watchdog rc.d/xendriverdomain
 
+IN_FILES := rc.d/xencommons rc.d/xendriverdomain
+
 .PHONY: all
 all:
 
+$(foreach file,$(IN_FILES),$(eval $(call apply-build-vars,$(file))))
+
 .PHONY: install
 install: install-scripts install-rcd
 
@@ -39,7 +43,7 @@ uninstall-scripts:
 	rm -f $(addprefix $(DESTDIR)$(XEN_SCRIPT_DIR)/, $(XEN_SCRIPT_DATA))
 
 .PHONY: install-rcd
-install-rcd:
+install-rcd: $(IN_FILES)
 	$(INSTALL_DIR) $(DESTDIR)$(INITD_DIR)
 	set -e; for i in $(XEN_RCD_PROG); \
 	   do \
@@ -57,3 +61,4 @@ clean:
 
 .PHONY: distclean
 distclean: clean
+	rm -rf $(IN_FILES)
diff --git a/tools/hotplug/common/Makefile b/tools/hotplug/common/Makefile
index 62afe1019e..0017332293 100644
--- a/tools/hotplug/common/Makefile
+++ b/tools/hotplug/common/Makefile
@@ -7,9 +7,13 @@ include $(XEN_ROOT)/tools/Rules.mk
 XEN_SCRIPTS :=
 XEN_SCRIPT_DATA := hotplugpath.sh
 
+IN_FILES := hotplugpath.sh
+
 .PHONY: all
 all:
 
+$(foreach file,$(IN_FILES),$(eval $(call apply-build-vars,$(file))))
+
 .PHONY: install
 install: install-scripts
 
@@ -17,7 +21,7 @@ install: install-scripts
 uninstall: uninstall-scripts
 
 .PHONY: install-scripts
-install-scripts: all
+install-scripts: all $(IN_FILES)
 	$(INSTALL_DIR) $(DESTDIR)$(XEN_SCRIPT_DIR)
 	set -e; for i in $(XEN_SCRIPTS); \
 	   do \
@@ -38,3 +42,4 @@ clean:
 
 .PHONY: distclean
 distclean: clean
+	rm -rf $(IN_FILES)
diff --git a/tools/ocaml/libs/xs/Makefile b/tools/ocaml/libs/xs/Makefile
index e160e6a711..7d70d0904c 100644
--- a/tools/ocaml/libs/xs/Makefile
+++ b/tools/ocaml/libs/xs/Makefile
@@ -8,6 +8,8 @@ OCAMLOPTFLAGS += -for-pack Xenstore
 .NOTPARALLEL:
 # Ocaml is such a PITA!
 
+IN_FILES := paths.ml
+
 PREINTF = xsraw.cmi xst.cmi
 PREOBJS = queueop xsraw xst
 PRELIBS = $(foreach obj, $(PREOBJS),$(obj).cmo) $(foreach obj,$(PREOJBS),$(obj).cmx)
@@ -17,6 +19,10 @@ LIBS = xenstore.cma xenstore.cmxa
 
 all: $(PREINTF) $(PRELIBS) $(INTF) $(LIBS) $(PROGRAMS)
 
+$(foreach file,$(IN_FILES),$(eval $(call apply-build-vars,$(file))))
+
+$(OBJS): $(IN_FILES)
+
 bins: $(PROGRAMS)
 
 libs: $(LIBS)
@@ -43,4 +49,7 @@ install: $(LIBS) META
 uninstall:
 	$(OCAMLFIND) remove -destdir $(OCAMLDESTDIR) xenstore
 
+.PHONY: distclean
+	rm -rf $(IN_FILES)
+
 include $(OCAML_TOPLEVEL)/Makefile.rules
diff --git a/tools/ocaml/xenstored/Makefile b/tools/ocaml/xenstored/Makefile
index c333394a34..2576991030 100644
--- a/tools/ocaml/xenstored/Makefile
+++ b/tools/ocaml/xenstored/Makefile
@@ -72,6 +72,8 @@ XENSTOREDLIBS = \
 	-ccopt -L -ccopt $(OCAML_TOPLEVEL)/libs/xsd_glue $(OCAML_TOPLEVEL)/libs/xsd_glue/plugin_interface_v1.cmxa \
 	-ccopt -L -ccopt $(XEN_ROOT)/tools/libs/ctrl
 
+IN_FILES := paths.ml oxenstored.conf
+
 PROGRAMS = oxenstored
 
 oxenstored_LIBS = $(XENSTOREDLIBS)
@@ -83,7 +85,9 @@ oxenstored_OBJS = $(oxenstored_MLSORTED:.ml=)
 
 OCAML_PROGRAM = oxenstored
 
-all: $(INTF) $(LIBS) $(PROGRAMS)
+all: $(IN_FILES) $(INTF) $(LIBS) $(PROGRAMS)
+
+$(foreach file,$(IN_FILES),$(eval $(call apply-build-vars,$(file))))
 
 bins: $(PROGRAMS)
 
@@ -99,4 +103,7 @@ uninstall:
 	rm -f $(DESTDIR)$(XEN_CONFIG_DIR)/oxenstored.conf
 	rm -f $(DESTDIR)$(sbindir)/oxenstored
 
+distclean:
+	rm -rf $(IN_FILES)
+
 include $(OCAML_TOPLEVEL)/Makefile.rules
-- 
2.51.0



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On 14/11/2025 11:32 am, Juergen Gross wrote:
> diff --git a/docs/Makefile b/docs/Makefile
> index 37776d303c..e5f4a8ca86 100644
> --- a/docs/Makefile
> +++ b/docs/Makefile
> @@ -8,8 +8,11 @@ DATE		:= $(call date,"+%Y-%m-%d")
>  DOC_ARCHES      := arm ppc riscv x86_32 x86_64
>  MAN_SECTIONS    := 1 5 7 8
>  
> +IN_FILES := man/xl-disk-configuration.5.pod man/xl-network-configuration.5.pod
> +IN_FILES += man/xl.1.pod man/xl.cfg.5.pod man/xl.conf.5.pod

Sorry, I meant to say this on the previous revision.  Can we please list
these one per line, for the future ease of inserting/removing.

Is IN_FILES really correct?  These are the generated (non-.in) files,
rather than the .in files themselves.  GEN_FILES from v1 would seem to
be a better fit.

But, overall I think this is a nicer change.

> +
>  # Documentation sources to build
> -MAN-SRC-y := $(sort $(basename $(wildcard man/*.pod man/*.pandoc)))
> +MAN-SRC-y := $(sort $(basename $(wildcard man/*.pod man/*.pandoc) $(IN_FILES)))

Doesn't the man/*.pod wildcard do this already ?

~Andrew


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Date: Fri, 14 Nov 2025 11:42:32 +0000
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Subject: Re: [PATCH v2 1/4] build: add make macro for making file from file.in
To: Juergen Gross , xen-devel@lists.xenproject.org
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On 14/11/2025 11:32 am, Juergen Gross wrote:
> diff --git a/Config.mk b/Config.mk
> index e1556dfbfa..d21d67945a 100644
> --- a/Config.mk
> +++ b/Config.mk
> @@ -159,6 +159,19 @@ define move-if-changed
>  	if ! cmp -s $(1) $(2); then mv -f $(1) $(2); else rm -f $(1); fi
>  endef
>  
> +PATH_FILES := Paths
> +INC_FILES := $(foreach f, $(PATH_FILES), $(XEN_ROOT)/config/$(f).mk)
> +
> +include $(INC_FILES)
> +
> +BUILD_MAKE_VARS := $(foreach f, $(PATH_FILES), $(shell awk '$$2 == ":=" { print $$1; }' $(XEN_ROOT)/config/$(f).mk.in))
> +
> +# Replace @xxx@ markers in $(1).in with $(xxx) variable contents, write to $(1)
> +define apply-build-vars
> + $(1): $(1).in
> +	sed $$(foreach v, $$(BUILD_MAKE_VARS), -e 's#@$$(v)@#$$($$(v))#g') <$$< >$$@
> +endef

Shouldn't this write to a tmp file, and use move-if-changed?  Most of
the time the markers won't have changed, and we'll want to short circuit
dependent rules.

~Andrew


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Date: Fri, 14 Nov 2025 11:47:01 +0000
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Subject: Re: [PATCH v2 3/4] config: remove unused paths from
 config/Paths.mk.in
To: Juergen Gross , xen-devel@lists.xenproject.org
Cc: Anthony PERARD 
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 <20251114113238.9279-4-jgross@suse.com>
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On 14/11/2025 11:32 am, Juergen Gross wrote:
> Some paths in config/Paths.mk.in are used nowhere, so remove them.
>
> Signed-off-by: Juergen Gross 
> ---
>  config/Paths.mk.in | 5 -----
>  1 file changed, 5 deletions(-)
>
> diff --git a/config/Paths.mk.in b/config/Paths.mk.in
> index bc42748b7a..668545be2f 100644
> --- a/config/Paths.mk.in
> +++ b/config/Paths.mk.in
> @@ -20,10 +20,7 @@ libexecdir               := @libexecdir@
>  datarootdir              := @datarootdir@
>  mandir                   := @mandir@
>  docdir                   := @docdir@
> -dvidir                   := @dvidir@
>  htmldir                  := @htmldir@
> -pdfdir                   := @pdfdir@
> -psdir                    := @psdir@

The point I apparently didn't make very well was this:

We generate both HTML and PDFs, yet use neither of htmldir nor pdfdir. 
Whatever is done to one should be done to the other.

Leave just docdir, and let whomever tidies up the mess in docs/ adjust
the paths as necessary.

~Andrew


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Date: Fri, 14 Nov 2025 11:54:16 +0000
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Subject: Re: [PATCH v2 4/4] tools: replace @xxx@ markers at build time
To: Juergen Gross , xen-devel@lists.xenproject.org
Cc: Anthony PERARD ,
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 <20251114113238.9279-5-jgross@suse.com>
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On 14/11/2025 11:32 am, Juergen Gross wrote:
> diff --git a/tools/hotplug/FreeBSD/Makefile b/tools/hotplug/FreeBSD/Makefile
> index a6552c9884..8de923781c 100644
> --- a/tools/hotplug/FreeBSD/Makefile
> +++ b/tools/hotplug/FreeBSD/Makefile
> @@ -51,3 +55,4 @@ clean:
>  
>  .PHONY: distclean
>  distclean: clean
> +	rm -rf $(IN_FILES)

In addition to the points in patch 2, can we use $(RM) (which includes
-f IIRC) when adding these.  None of the generated files are
directories, so the -r wants dropping.

But again, this is far nicer than v1 overall.

> diff --git a/tools/hotplug/Linux/Makefile b/tools/hotplug/Linux/Makefile
> index 9a7b3a3515..6fcf84a6f4 100644
> --- a/tools/hotplug/Linux/Makefile
> +++ b/tools/hotplug/Linux/Makefile
> @@ -37,7 +44,7 @@ uninstall: uninstall-initd uninstall-scripts subdirs-uninstall
>  
>  # See docs/misc/distro_mapping.txt for INITD_DIR location
>  .PHONY: install-initd
> -install-initd:
> +install-initd: $(IN_FILES)
>  	$(INSTALL_DIR) $(DESTDIR)$(INITD_DIR)
>  	$(INSTALL_DIR) $(DESTDIR)$(SYSCONFIG_DIR)
>  	$(INSTALL_DIR) $(DESTDIR)$(LIBEXEC_BIN)

Hmm.  Logically, generating the files should be part of the build step,
not the install step.

I see you already had to adapt this way for Ocaml, where the generated
files are source files, not just config.

~Andrew


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Subject: Re: [PATCH v2 1/4] build: add make macro for making file from file.in
To: Andrew Cooper , xen-devel@lists.xenproject.org
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Subject: Re: [PATCH v2 1/4] build: add make macro for making file from file.in
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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: Andrew Cooper , xen-devel@lists.xenproject.org
Cc: Anthony PERARD 
Message-ID: <2de93313-9f1b-46a7-99c8-618281aff2f1@suse.com>
Subject: Re: [PATCH v2 2/4] docs: replace @xxx@ markers at build time
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 <20251114113238.9279-3-jgross@suse.com>
 <7e24823f-cce1-4430-83f1-ebde6986efa4@citrix.com>
In-Reply-To: <7e24823f-cce1-4430-83f1-ebde6986efa4@citrix.com>

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Subject: Re: [PATCH v2 3/4] config: remove unused paths from
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To: Andrew Cooper , xen-devel@lists.xenproject.org
Cc: Anthony PERARD 
References: <20251114113238.9279-1-jgross@suse.com>
 <20251114113238.9279-4-jgross@suse.com>
 
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To: Andrew Cooper , xen-devel@lists.xenproject.org
Cc: Anthony PERARD 
Message-ID: <09723aa8-bcb7-4f3f-9b9e-5bb626c1fb98@suse.com>
Subject: Re: [PATCH v2 3/4] config: remove unused paths from
 config/Paths.mk.in
References: <20251114113238.9279-1-jgross@suse.com>
 <20251114113238.9279-4-jgross@suse.com>
 
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Date: Fri, 14 Nov 2025 14:03:18 +0100
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v2 4/4] tools: replace @xxx@ markers at build time
To: Andrew Cooper , xen-devel@lists.xenproject.org
Cc: Anthony PERARD ,
 Michal Orzel , Jan Beulich ,
 Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Stefano Stabellini ,
 Christian Lindig , David Scott 
References: <20251114113238.9279-1-jgross@suse.com>
 <20251114113238.9279-5-jgross@suse.com>
 
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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: Andrew Cooper , xen-devel@lists.xenproject.org
Cc: Anthony PERARD ,
 Michal Orzel , Jan Beulich ,
 Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Stefano Stabellini ,
 Christian Lindig , David Scott 
Message-ID: 
Subject: Re: [PATCH v2 4/4] tools: replace @xxx@ markers at build time
References: <20251114113238.9279-1-jgross@suse.com>
 <20251114113238.9279-5-jgross@suse.com>
 
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From: "Teddy Astie" 
Subject: =?utf-8?Q?[PATCH]=20ioreq:=20Assert=20with=20out=20of=20bounds=20vCPU=20ID?=
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To: xen-devel@lists.xenproject.org
Cc: "Teddy Astie" , "Andrew Cooper" , "Anthony PERARD" , "Michal Orzel" , "Jan Beulich" , "Julien Grall" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Stefano Stabellini" , "Julian Vetter" 
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A 4K page appears to be able to hold 128 ioreq entries, which luckly
matches the current vCPU limit. However, if we decide to increase the
domain vCPU limit, that doesn't hold anymore and this function would now
silently create a out of bounds pointer leading to confusing problems.

All architectures have no more than 128 as vCPU limit on HVM guests,
and have pages that are at most 4 KB, so this case doesn't occurs in
with the current limits.

Assert if the vCPU ID will lead to a out of bounds pointer.

No functional change.

Reported-by: Julian Vetter 
Signed-off-by: Teddy Astie 
---
Not sure if this is the best approach, perhaps preventing compilation if the
vCPU limit is higher than what the ioreq page can hold is preferable ?

 xen/common/ioreq.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/xen/common/ioreq.c b/xen/common/ioreq.c
index f5fd30ce12..b2ef46ed7b 100644
--- a/xen/common/ioreq.c
+++ b/xen/common/ioreq.c
@@ -99,6 +99,7 @@ static ioreq_t *get_ioreq(struct ioreq_server *s, struct vcpu *v)
 
     ASSERT((v == current) || !vcpu_runnable(v));
     ASSERT(p != NULL);
+    ASSERT(v->vcpu_id < (PAGE_SIZE / sizeof(struct ioreq)));
 
     return &p->vcpu_ioreq[v->vcpu_id];
 }
-- 
2.51.2



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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On 14/11/2025 1:05 pm, Teddy Astie wrote:
> A 4K page appears to be able to hold 128 ioreq entries, which luckly
> matches the current vCPU limit. However, if we decide to increase the
> domain vCPU limit, that doesn't hold anymore and this function would now
> silently create a out of bounds pointer leading to confusing problems.
>
> All architectures have no more than 128 as vCPU limit on HVM guests,
> and have pages that are at most 4 KB, so this case doesn't occurs in
> with the current limits.
>
> Assert if the vCPU ID will lead to a out of bounds pointer.
>
> No functional change.
>
> Reported-by: Julian Vetter 
> Signed-off-by: Teddy Astie 
> ---
> Not sure if this is the best approach, perhaps preventing compilation if the
> vCPU limit is higher than what the ioreq page can hold is preferable ?
>
>  xen/common/ioreq.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/xen/common/ioreq.c b/xen/common/ioreq.c
> index f5fd30ce12..b2ef46ed7b 100644
> --- a/xen/common/ioreq.c
> +++ b/xen/common/ioreq.c
> @@ -99,6 +99,7 @@ static ioreq_t *get_ioreq(struct ioreq_server *s, struct vcpu *v)
>  
>      ASSERT((v == current) || !vcpu_runnable(v));
>      ASSERT(p != NULL);
> +    ASSERT(v->vcpu_id < (PAGE_SIZE / sizeof(struct ioreq)));
>  
>      return &p->vcpu_ioreq[v->vcpu_id];
>  }

The 128 vCPU problem was known and IOERQ servers intentionally had
multi-page capabilities from the outset to address this problem.

See the calculation in ioreq_server_max_frames().

It hasn't been exercised in anger because there's still the APIC ID
limit at 128 still, but IOREQ servers are expected to work correctly
above this limit.  That said, this function is clearly buggy and in need
of fixing.

To the assert specifically, that's really not appropriate.  If it were
to ever fire, we'd have an XSA.  Logic if this nature either needs to be
fail safe (if returning NULL is ok), or be a BUG() so it doesn't become
unsafe in release builds.

~Andrew


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From: Grygorii Strashko 
To: "xen-devel@lists.xenproject.org" 
CC: Grygorii Strashko , Jan Beulich
	, Andrew Cooper ,
	=?iso-8859-1?Q?Roger_Pau_Monn=E9?= , Jason Andryuk
	, Teddy Astie , Alejandro
 Vallejo 
Subject: [XEN][PATCH v4] xen/x86: guest_access: optimize raw_x_guest() for PV
 and HVM combinations
Thread-Topic: [XEN][PATCH v4] xen/x86: guest_access: optimize raw_x_guest()
 for PV and HVM combinations
Thread-Index: AQHcVW8mVQ2jSEgYfEK6o/9vmk6AaA==
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From: Grygorii Strashko 

Xen uses below pattern for raw_x_guest() functions:

define raw_copy_to_guest(dst, src, len)        \
    (is_hvm_vcpu(current) ?                     \
     copy_to_user_hvm((dst), (src), (len)) :    \
     copy_to_guest_pv(dst, src, len))

This pattern works depending on CONFIG_PV/CONFIG_HVM as:
- PV=3Dy and HVM=3Dy
  Proper guest access function is selected depending on domain type.
- PV=3Dy and HVM=3Dn
  Only PV domains are possible. is_hvm_domain/vcpu() will constify to "fals=
e"
  and compiler will optimize code and skip HVM specific part.
- PV=3Dn and HVM=3Dy
  Only HVM domains are possible. is_hvm_domain/vcpu() will not be constifie=
d.
  No PV specific code will be optimized by compiler.
- PV=3Dn and HVM=3Dn
  No guests should possible. The code will still follow PV path.

Rework raw_x_guest() code to use static inline functions which account for
above PV/HVM possible configurations with main intention to optimize code
for (PV=3Dn and HVM=3Dy) case.

For the case (PV=3Dn and HVM=3Dn) return "len" value indicating a failure (=
no
guests should be possible in this case, which means no access to guest
memory should ever happen).

Finally move arch/x86/usercopy.c into arch/x86/pv/usercopy.c to use it only
with PV=3Dy.

The measured (bloat-o-meter) improvement for (PV=3Dn and HVM=3Dy) case is:
  add/remove: 3/8 grow/shrink: 3/89 up/down: 1018/-12087 (-11069)
  Total: Before=3D1937280, After=3D1926211, chg -0.57%

[teddy.astie@vates.tech: Suggested to use static inline functions vs
macro combinations]
Suggested-by: Teddy Astie 
Signed-off-by: Grygorii Strashko 
Reviewed-by: Jason Andryuk 
---
changes in v4:
- move usercopy.c into arch/x86/pv/
- rework to always dynamically check for HVM vcpu(domain) by using is_hvm_v=
cpu()
  as requested by Jan Beulich

changes in v3:
- add raw_use_hvm_access() wrapper

changes in v2:
- use static inline functions instead of macro combinations

 xen/arch/x86/Makefile                   |  4 --
 xen/arch/x86/include/asm/guest_access.h | 78 ++++++++++++++++++-------
 xen/arch/x86/pv/Makefile                |  4 ++
 xen/arch/x86/{ =3D> pv}/usercopy.c        |  0
 4 files changed, 62 insertions(+), 24 deletions(-)
 rename xen/arch/x86/{ =3D> pv}/usercopy.c (100%)

diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
index 407571c510e1..6e2b17471719 100644
--- a/xen/arch/x86/Makefile
+++ b/xen/arch/x86/Makefile
@@ -71,7 +71,6 @@ obj-y +=3D time.o
 obj-y +=3D traps-setup.o
 obj-y +=3D traps.o
 obj-$(CONFIG_INTEL) +=3D tsx.o
-obj-y +=3D usercopy.o
 obj-y +=3D x86_emulate.o
 obj-$(CONFIG_TBOOT) +=3D tboot.o
 obj-y +=3D hpet.o
@@ -92,9 +91,6 @@ hostprogs-y +=3D efi/mkreloc
=20
 $(obj)/efi/mkreloc: HOSTCFLAGS +=3D -I$(srctree)/include
=20
-# Allows usercopy.c to include itself
-$(obj)/usercopy.o: CFLAGS-y +=3D -iquote .
-
 ifneq ($(CONFIG_HVM),y)
 $(obj)/x86_emulate.o: CFLAGS-y +=3D -Wno-unused-label
 endif
diff --git a/xen/arch/x86/include/asm/guest_access.h b/xen/arch/x86/include=
/asm/guest_access.h
index 69716c8b41bb..f0e56b112e14 100644
--- a/xen/arch/x86/include/asm/guest_access.h
+++ b/xen/arch/x86/include/asm/guest_access.h
@@ -13,26 +13,64 @@
 #include 
=20
 /* Raw access functions: no type checking. */
-#define raw_copy_to_guest(dst, src, len)        \
-    (is_hvm_vcpu(current) ?                     \
-     copy_to_user_hvm((dst), (src), (len)) :    \
-     copy_to_guest_pv(dst, src, len))
-#define raw_copy_from_guest(dst, src, len)      \
-    (is_hvm_vcpu(current) ?                     \
-     copy_from_user_hvm((dst), (src), (len)) :  \
-     copy_from_guest_pv(dst, src, len))
-#define raw_clear_guest(dst,  len)              \
-    (is_hvm_vcpu(current) ?                     \
-     clear_user_hvm((dst), (len)) :             \
-     clear_guest_pv(dst, len))
-#define __raw_copy_to_guest(dst, src, len)      \
-    (is_hvm_vcpu(current) ?                     \
-     copy_to_user_hvm((dst), (src), (len)) :    \
-     __copy_to_guest_pv(dst, src, len))
-#define __raw_copy_from_guest(dst, src, len)    \
-    (is_hvm_vcpu(current) ?                     \
-     copy_from_user_hvm((dst), (src), (len)) :  \
-     __copy_from_guest_pv(dst, src, len))
+static inline unsigned int raw_copy_to_guest(void *dst, const void *src,
+                                             unsigned int len)
+{
+    if ( is_hvm_vcpu(current) )
+        return copy_to_user_hvm(dst, src, len);
+
+    if ( !IS_ENABLED(CONFIG_PV) )
+        return len;
+
+    return copy_to_guest_pv(dst, src, len);
+}
+
+static inline unsigned int raw_copy_from_guest(void *dst, const void *src,
+                                               unsigned int len)
+{
+    if ( is_hvm_vcpu(current) )
+        return copy_from_user_hvm(dst, src, len);
+
+    if ( !IS_ENABLED(CONFIG_PV) )
+        return len;
+
+    return copy_from_guest_pv(dst, src, len);
+}
+
+static inline unsigned int raw_clear_guest(void *dst, unsigned int len)
+{
+    if ( is_hvm_vcpu(current) )
+        return clear_user_hvm(dst, len);
+
+    if ( !IS_ENABLED(CONFIG_PV) )
+        return len;
+
+    return clear_guest_pv(dst, len);
+}
+
+static inline unsigned int __raw_copy_to_guest(void *dst, const void *src,
+                                               unsigned int len)
+{
+    if ( is_hvm_vcpu(current) )
+        return copy_to_user_hvm(dst, src, len);
+
+    if ( !IS_ENABLED(CONFIG_PV) )
+        return len;
+
+    return __copy_to_guest_pv(dst, src, len);
+}
+
+static inline unsigned int __raw_copy_from_guest(void *dst, const void *sr=
c,
+                                                 unsigned int len)
+{
+    if ( is_hvm_vcpu(current) )
+        return copy_from_user_hvm(dst, src, len);
+
+    if ( !IS_ENABLED(CONFIG_PV) )
+        return len;
+
+    return __copy_from_guest_pv(dst, src, len);
+}
=20
 /*
  * Pre-validate a guest handle.
diff --git a/xen/arch/x86/pv/Makefile b/xen/arch/x86/pv/Makefile
index 6cda354cc41f..59489cd75af6 100644
--- a/xen/arch/x86/pv/Makefile
+++ b/xen/arch/x86/pv/Makefile
@@ -14,6 +14,10 @@ obj-y +=3D ro-page-fault.o
 obj-$(CONFIG_PV_SHIM) +=3D shim.o
 obj-$(CONFIG_TRACEBUFFER) +=3D trace.o
 obj-y +=3D traps.o
+obj-$(CONFIG_PV) +=3D usercopy.o
=20
 obj-bin-y +=3D dom0_build.init.o
 obj-bin-y +=3D gpr_switch.o
+
+# Allows usercopy.c to include itself
+$(obj)/usercopy.o: CFLAGS-y +=3D -iquote .
diff --git a/xen/arch/x86/usercopy.c b/xen/arch/x86/pv/usercopy.c
similarity index 100%
rename from xen/arch/x86/usercopy.c
rename to xen/arch/x86/pv/usercopy.c
--=20
2.34.1


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From: Grygorii Strashko 
To: "xen-devel@lists.xenproject.org" 
CC: Grygorii Strashko , Jan Beulich
	, Andrew Cooper ,
	=?iso-8859-1?Q?Roger_Pau_Monn=E9?= , Anthony PERARD
	, Michal Orzel , Julien
 Grall , Stefano Stabellini , Tamas K
 Lengyel , Alexandru Isaila ,
	Petre Pircalabu , Teddy Astie
	, Penny Zheng 
Subject: [XEN][PATCH v3] xen: make VMTRACE support optional
Thread-Topic: [XEN][PATCH v3] xen: make VMTRACE support optional
Thread-Index: AQHcVXIP26AfHxCGuEiFwRo5YoIXjA==
Date: Fri, 14 Nov 2025 14:22:08 +0000
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From: Grygorii Strashko 

The VMTRACE feature is depends on Platform/Arch HW and code support and now
can be used only on x86 HVM with Intel VT-x (INTEL_VMX) enabled.
This makes VMTRACE support optional by introducing HVM Kconfig option:
- CONFIG_VMTRACE to enable/disable the feature.

Signed-off-by: Grygorii Strashko 
---
changes in v3:
- drop vmtrace stubs for HVM=3Dn case from hvm.h (VMTRACE depnds on HVM)
- hvm_vmtrace_reset() fix return err code
- add comment about using func declaration without definition

changes in v2:
 - fix comments from Jan Beulich
 - move CONFIG_VMTRACE in HVM
 - drop HAS_VMTRACE

v2:
 https://patchwork.kernel.org/project/xen-devel/patch/20251112202442.387999=
7-1-grygorii_strashko@epam.com/=20
v1:
 https://patchwork.kernel.org/project/xen-devel/patch/20251031212005.133821=
2-1-grygorii_strashko@epam.com/

 xen/arch/x86/domctl.c                   |  4 +++
 xen/arch/x86/hvm/Kconfig                | 12 +++++++++
 xen/arch/x86/hvm/vmx/vmcs.c             |  2 ++
 xen/arch/x86/hvm/vmx/vmx.c              | 11 ++++++++
 xen/arch/x86/include/asm/guest-msr.h    |  2 ++
 xen/arch/x86/include/asm/hvm/hvm.h      | 36 ++++++++++---------------
 xen/arch/x86/include/asm/hvm/vmx/vmcs.h |  2 ++
 xen/arch/x86/mm/mem_sharing.c           |  2 ++
 xen/arch/x86/vm_event.c                 |  7 ++---
 xen/common/domain.c                     | 10 +++++++
 xen/common/memory.c                     |  6 +++++
 xen/common/vm_event.c                   |  3 ++-
 xen/include/xen/domain.h                |  4 +++
 xen/include/xen/sched.h                 |  4 +++
 14 files changed, 79 insertions(+), 26 deletions(-)

diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c
index 6153e3c07e2d..d9521808dcba 100644
--- a/xen/arch/x86/domctl.c
+++ b/xen/arch/x86/domctl.c
@@ -154,6 +154,7 @@ void arch_get_domain_info(const struct domain *d,
 static int do_vmtrace_op(struct domain *d, struct xen_domctl_vmtrace_op *o=
p,
                          XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl)
 {
+#ifdef CONFIG_VMTRACE
     struct vcpu *v;
     int rc;
=20
@@ -198,6 +199,9 @@ static int do_vmtrace_op(struct domain *d, struct xen_d=
omctl_vmtrace_op *op,
     vcpu_unpause(v);
=20
     return rc;
+#else
+    return -EOPNOTSUPP;
+#endif
 }
=20
 #define MAX_IOPORTS 0x10000
diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig
index c1a131d1851a..5c47a45c9350 100644
--- a/xen/arch/x86/hvm/Kconfig
+++ b/xen/arch/x86/hvm/Kconfig
@@ -35,6 +35,18 @@ config INTEL_VMX
 	  If your system includes a processor with Intel VT-x support, say Y.
 	  If in doubt, say Y.
=20
+config VMTRACE
+    bool "HW VM tracing support"
+    depends on INTEL_VMX
+    default y
+    help
+      Enables HW VM tracing support which allows to configure HW processor
+      features (vmtrace_op) to enable capturing information about software
+      execution using dedicated hardware facilities with minimal interfere=
nce
+      to the software being traced. The trace data can be retrieved using =
buffer
+      shared between Xen and domain
+      (see XENMEM_acquire_resource(XENMEM_resource_vmtrace_buf)).
+
 config HVM_FEP
 	bool "HVM Forced Emulation Prefix support (UNSUPPORTED)" if UNSUPPORTED
 	default DEBUG
diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c
index cd5ac8a5f0e3..2fffc2006ab0 100644
--- a/xen/arch/x86/hvm/vmx/vmcs.c
+++ b/xen/arch/x86/hvm/vmx/vmcs.c
@@ -307,6 +307,7 @@ static int vmx_init_vmcs_config(bool bsp)
     rdmsrl(MSR_IA32_VMX_MISC, _vmx_misc_cap);
=20
     /* Check whether IPT is supported in VMX operation. */
+#ifdef CONFIG_VMTRACE
     if ( bsp )
         vmtrace_available =3D cpu_has_proc_trace &&
                             (_vmx_misc_cap & VMX_MISC_PROC_TRACE);
@@ -317,6 +318,7 @@ static int vmx_init_vmcs_config(bool bsp)
                smp_processor_id());
         return -EINVAL;
     }
+#endif
=20
     if ( caps.cpu_based_exec_control & CPU_BASED_ACTIVATE_SECONDARY_CONTRO=
LS )
     {
diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c
index ee6977e94127..3f0e113b0b67 100644
--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -622,6 +622,7 @@ static void cf_check domain_creation_finished(struct do=
main *d)
=20
 static void vmx_init_ipt(struct vcpu *v)
 {
+#ifdef CONFIG_VMTRACE
     unsigned int size =3D v->domain->vmtrace_size;
=20
     if ( !size )
@@ -632,6 +633,7 @@ static void vmx_init_ipt(struct vcpu *v)
     ASSERT(size >=3D PAGE_SIZE && (size & (size - 1)) =3D=3D 0);
=20
     v->arch.msrs->rtit.output_limit =3D size - 1;
+#endif
 }
=20
 static int cf_check vmx_vcpu_initialise(struct vcpu *v)
@@ -724,11 +726,13 @@ static void vmx_save_guest_msrs(struct vcpu *v)
      */
     v->arch.hvm.vmx.shadow_gs =3D read_gs_shadow();
=20
+#ifdef CONFIG_VMTRACE
     if ( v->arch.hvm.vmx.ipt_active )
     {
         rdmsrl(MSR_RTIT_OUTPUT_MASK, msrs->rtit.output_mask);
         rdmsrl(MSR_RTIT_STATUS, msrs->rtit.status);
     }
+#endif
=20
     if ( cp->feat.pks )
         msrs->pkrs =3D rdpkrs_and_cache();
@@ -747,12 +751,14 @@ static void vmx_restore_guest_msrs(struct vcpu *v)
     if ( cpu_has_msr_tsc_aux )
         wrmsr_tsc_aux(msrs->tsc_aux);
=20
+#ifdef CONFIG_VMTRACE
     if ( v->arch.hvm.vmx.ipt_active )
     {
         wrmsrl(MSR_RTIT_OUTPUT_BASE, page_to_maddr(v->vmtrace.pg));
         wrmsrl(MSR_RTIT_OUTPUT_MASK, msrs->rtit.output_mask);
         wrmsrl(MSR_RTIT_STATUS, msrs->rtit.status);
     }
+#endif
=20
     if ( cp->feat.pks )
         wrpkrs(msrs->pkrs);
@@ -2626,6 +2632,7 @@ static bool cf_check vmx_get_pending_event(
     return true;
 }
=20
+#ifdef CONFIG_VMTRACE
 /*
  * We only let vmtrace agents see and modify a subset of bits in MSR_RTIT_=
CTL.
  * These all pertain to data-emitted into the trace buffer(s).  Must not
@@ -2768,6 +2775,7 @@ static int cf_check vmtrace_reset(struct vcpu *v)
     v->arch.msrs->rtit.status =3D 0;
     return 0;
 }
+#endif
=20
 static uint64_t cf_check vmx_get_reg(struct vcpu *v, unsigned int reg)
 {
@@ -2940,11 +2948,14 @@ static struct hvm_function_table __initdata_cf_clob=
ber vmx_function_table =3D {
     .altp2m_vcpu_emulate_ve =3D vmx_vcpu_emulate_ve,
     .altp2m_vcpu_emulate_vmfunc =3D vmx_vcpu_emulate_vmfunc,
 #endif
+
+#ifdef CONFIG_VMTRACE
     .vmtrace_control =3D vmtrace_control,
     .vmtrace_output_position =3D vmtrace_output_position,
     .vmtrace_set_option =3D vmtrace_set_option,
     .vmtrace_get_option =3D vmtrace_get_option,
     .vmtrace_reset =3D vmtrace_reset,
+#endif
=20
     .get_reg =3D vmx_get_reg,
     .set_reg =3D vmx_set_reg,
diff --git a/xen/arch/x86/include/asm/guest-msr.h b/xen/arch/x86/include/as=
m/guest-msr.h
index 5f0cb0a93995..702f47fe1e16 100644
--- a/xen/arch/x86/include/asm/guest-msr.h
+++ b/xen/arch/x86/include/asm/guest-msr.h
@@ -50,6 +50,7 @@ struct vcpu_msrs
         };
     } misc_features_enables;
=20
+#ifdef CONFIG_VMTRACE
     /*
      * 0x00000560 ... 57x - MSR_RTIT_*
      *
@@ -81,6 +82,7 @@ struct vcpu_msrs
             };
         };
     } rtit;
+#endif
=20
     /*
      * 0x000006e1 - MSR_PKRS - Protection Key Supervisor.
diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/=
hvm/hvm.h
index 7412256a2dab..93da4dd2dc4b 100644
--- a/xen/arch/x86/include/asm/hvm/hvm.h
+++ b/xen/arch/x86/include/asm/hvm/hvm.h
@@ -234,12 +234,14 @@ struct hvm_function_table {
     int (*altp2m_vcpu_emulate_vmfunc)(const struct cpu_user_regs *regs);
 #endif
=20
+#ifdef CONFIG_VMTRACE
     /* vmtrace */
     int (*vmtrace_control)(struct vcpu *v, bool enable, bool reset);
     int (*vmtrace_output_position)(struct vcpu *v, uint64_t *pos);
     int (*vmtrace_set_option)(struct vcpu *v, uint64_t key, uint64_t value=
);
     int (*vmtrace_get_option)(struct vcpu *v, uint64_t key, uint64_t *valu=
e);
     int (*vmtrace_reset)(struct vcpu *v);
+#endif
=20
     uint64_t (*get_reg)(struct vcpu *v, unsigned int reg);
     void (*set_reg)(struct vcpu *v, unsigned int reg, uint64_t val);
@@ -738,6 +740,7 @@ static inline bool altp2m_vcpu_emulate_ve(struct vcpu *=
v)
 bool altp2m_vcpu_emulate_ve(struct vcpu *v);
 #endif /* CONFIG_ALTP2M */
=20
+#ifdef CONFIG_VMTRACE
 static inline int hvm_vmtrace_control(struct vcpu *v, bool enable, bool re=
set)
 {
     if ( hvm_funcs.vmtrace_control )
@@ -772,13 +775,24 @@ static inline int hvm_vmtrace_get_option(
=20
     return -EOPNOTSUPP;
 }
+#else
+/*
+ * Function declaration(s) here are used without definition(s) to make com=
piler
+ * happy when VMTRACE=3Dn, compiler DCE will eliminate unused code.
+ */
+int hvm_vmtrace_output_position(struct vcpu *v, uint64_t *pos);
+#endif
=20
 static inline int hvm_vmtrace_reset(struct vcpu *v)
 {
+#ifdef CONFIG_VMTRACE
     if ( hvm_funcs.vmtrace_reset )
         return alternative_call(hvm_funcs.vmtrace_reset, v);
=20
     return -EOPNOTSUPP;
+#else
+    return -EOPNOTSUPP;
+#endif
 }
=20
 /*
@@ -934,28 +948,6 @@ static inline bool hvm_has_set_descriptor_access_exiti=
ng(void)
     return false;
 }
=20
-static inline int hvm_vmtrace_control(struct vcpu *v, bool enable, bool re=
set)
-{
-    return -EOPNOTSUPP;
-}
-
-static inline int hvm_vmtrace_output_position(struct vcpu *v, uint64_t *po=
s)
-{
-    return -EOPNOTSUPP;
-}
-
-static inline int hvm_vmtrace_set_option(
-    struct vcpu *v, uint64_t key, uint64_t value)
-{
-    return -EOPNOTSUPP;
-}
-
-static inline int hvm_vmtrace_get_option(
-    struct vcpu *v, uint64_t key, uint64_t *value)
-{
-    return -EOPNOTSUPP;
-}
-
 static inline uint64_t hvm_get_reg(struct vcpu *v, unsigned int reg)
 {
     ASSERT_UNREACHABLE();
diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h b/xen/arch/x86/include=
/asm/hvm/vmx/vmcs.h
index 8ff7c8045fc6..879ec10cefd0 100644
--- a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h
+++ b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h
@@ -154,8 +154,10 @@ struct vmx_vcpu {
     /* Do we need to tolerate a spurious EPT_MISCONFIG VM exit? */
     bool                 ept_spurious_misconfig;
=20
+#ifdef CONFIG_VMTRACE
     /* Processor Trace configured and enabled for the vcpu. */
     bool                 ipt_active;
+#endif
=20
     /* Is the guest in real mode? */
     uint8_t              vmx_realmode;
diff --git a/xen/arch/x86/mm/mem_sharing.c b/xen/arch/x86/mm/mem_sharing.c
index 4787b2796479..074f1b2562b3 100644
--- a/xen/arch/x86/mm/mem_sharing.c
+++ b/xen/arch/x86/mm/mem_sharing.c
@@ -1888,7 +1888,9 @@ static int fork(struct domain *cd, struct domain *d)
         domain_pause(d);
         cd->max_pages =3D d->max_pages;
         *cd->arch.cpu_policy =3D *d->arch.cpu_policy;
+#ifdef CONFIG_VMTRACE
         cd->vmtrace_size =3D d->vmtrace_size;
+#endif
         cd->parent =3D d;
     }
=20
diff --git a/xen/arch/x86/vm_event.c b/xen/arch/x86/vm_event.c
index fc349270b9c5..e9ac1d497594 100644
--- a/xen/arch/x86/vm_event.c
+++ b/xen/arch/x86/vm_event.c
@@ -253,7 +253,8 @@ void vm_event_fill_regs(vm_event_request_t *req)
     req->data.regs.x86.shadow_gs =3D ctxt.shadow_gs;
     req->data.regs.x86.dr6 =3D ctxt.dr6;
=20
-    if ( hvm_vmtrace_output_position(curr, &req->data.regs.x86.vmtrace_pos=
) !=3D 1 )
+    if ( IS_ENABLED(CONFIG_VMTRACE) &&
+         hvm_vmtrace_output_position(curr, &req->data.regs.x86.vmtrace_pos=
) !=3D 1 )
         req->data.regs.x86.vmtrace_pos =3D ~0;
 #endif
 }
@@ -303,12 +304,12 @@ void vm_event_emulate_check(struct vcpu *v, vm_event_=
response_t *rsp)
 #endif
 }
=20
+#ifdef CONFIG_VMTRACE
 void vm_event_reset_vmtrace(struct vcpu *v)
 {
-#ifdef CONFIG_HVM
     hvm_vmtrace_reset(v);
-#endif
 }
+#endif
=20
 /*
  * Local variables:
diff --git a/xen/common/domain.c b/xen/common/domain.c
index e13e01c1d272..ce4f55339fb4 100644
--- a/xen/common/domain.c
+++ b/xen/common/domain.c
@@ -136,7 +136,9 @@ struct vcpu *idle_vcpu[NR_CPUS] __read_mostly;
=20
 vcpu_info_t dummy_vcpu_info;
=20
+#ifdef CONFIG_VMTRACE
 bool __read_mostly vmtrace_available;
+#endif
=20
 bool __read_mostly vpmu_is_available;
=20
@@ -318,6 +320,7 @@ static void vcpu_info_reset(struct vcpu *v)
=20
 static void vmtrace_free_buffer(struct vcpu *v)
 {
+#ifdef CONFIG_VMTRACE
     const struct domain *d =3D v->domain;
     struct page_info *pg =3D v->vmtrace.pg;
     unsigned int i;
@@ -332,10 +335,12 @@ static void vmtrace_free_buffer(struct vcpu *v)
         put_page_alloc_ref(&pg[i]);
         put_page_and_type(&pg[i]);
     }
+#endif
 }
=20
 static int vmtrace_alloc_buffer(struct vcpu *v)
 {
+#ifdef CONFIG_VMTRACE
     struct domain *d =3D v->domain;
     struct page_info *pg;
     unsigned int i;
@@ -377,6 +382,9 @@ static int vmtrace_alloc_buffer(struct vcpu *v)
     }
=20
     return -ENODATA;
+#else
+    return 0;
+#endif
 }
=20
 /*
@@ -825,7 +833,9 @@ struct domain *domain_create(domid_t domid,
         ASSERT(!config->altp2m.nr);
 #endif
=20
+#ifdef CONFIG_VMTRACE
         d->vmtrace_size =3D config->vmtrace_size;
+#endif
     }
=20
     /* Sort out our idea of is_control_domain(). */
diff --git a/xen/common/memory.c b/xen/common/memory.c
index 3688e6dd5032..66dc7f7a0a41 100644
--- a/xen/common/memory.c
+++ b/xen/common/memory.c
@@ -1155,8 +1155,10 @@ static unsigned int resource_max_frames(const struct=
 domain *d,
     case XENMEM_resource_ioreq_server:
         return ioreq_server_max_frames(d);
=20
+#ifdef CONFIG_VMTRACE
     case XENMEM_resource_vmtrace_buf:
         return d->vmtrace_size >> PAGE_SHIFT;
+#endif
=20
     default:
         return 0;
@@ -1198,6 +1200,7 @@ static int acquire_ioreq_server(struct domain *d,
 #endif
 }
=20
+#ifdef CONFIG_VMTRACE
 static int acquire_vmtrace_buf(
     struct domain *d, unsigned int id, unsigned int frame,
     unsigned int nr_frames, xen_pfn_t mfn_list[])
@@ -1220,6 +1223,7 @@ static int acquire_vmtrace_buf(
=20
     return nr_frames;
 }
+#endif
=20
 /*
  * Returns -errno on error, or positive in the range [1, nr_frames] on
@@ -1238,8 +1242,10 @@ static int _acquire_resource(
     case XENMEM_resource_ioreq_server:
         return acquire_ioreq_server(d, id, frame, nr_frames, mfn_list);
=20
+#ifdef CONFIG_VMTRACE
     case XENMEM_resource_vmtrace_buf:
         return acquire_vmtrace_buf(d, id, frame, nr_frames, mfn_list);
+#endif
=20
     default:
         ASSERT_UNREACHABLE();
diff --git a/xen/common/vm_event.c b/xen/common/vm_event.c
index b2787c010890..cf0258223f50 100644
--- a/xen/common/vm_event.c
+++ b/xen/common/vm_event.c
@@ -441,7 +441,8 @@ static int vm_event_resume(struct domain *d, struct vm_=
event_domain *ved)
             if ( rsp.flags & VM_EVENT_FLAG_GET_NEXT_INTERRUPT )
                 vm_event_monitor_next_interrupt(v);
=20
-            if ( rsp.flags & VM_EVENT_FLAG_RESET_VMTRACE )
+            if ( IS_ENABLED(CONFIG_VMTRACE) &&
+                 (rsp.flags & VM_EVENT_FLAG_RESET_VMTRACE) )
                 vm_event_reset_vmtrace(v);
=20
             if ( rsp.flags & VM_EVENT_FLAG_VCPU_PAUSED )
diff --git a/xen/include/xen/domain.h b/xen/include/xen/domain.h
index 8aab05ae93c8..aa86a9f46022 100644
--- a/xen/include/xen/domain.h
+++ b/xen/include/xen/domain.h
@@ -191,7 +191,11 @@ void vnuma_destroy(struct vnuma_info *vnuma);
 static inline void vnuma_destroy(struct vnuma_info *vnuma) { ASSERT(!vnuma=
); }
 #endif
=20
+#ifdef CONFIG_VMTRACE
 extern bool vmtrace_available;
+#else
+#define vmtrace_available false
+#endif
=20
 extern bool vpmu_is_available;
=20
diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h
index 02bdc256ce37..dcd8647e0d36 100644
--- a/xen/include/xen/sched.h
+++ b/xen/include/xen/sched.h
@@ -300,9 +300,11 @@ struct vcpu
     /* vPCI per-vCPU area, used to store data for long running operations.=
 */
     struct vpci_vcpu vpci;
=20
+#ifdef CONFIG_VMTRACE
     struct {
         struct page_info *pg; /* One contiguous allocation of d->vmtrace_s=
ize */
     } vmtrace;
+#endif
=20
     struct arch_vcpu arch;
=20
@@ -623,7 +625,9 @@ struct domain
     unsigned int nr_altp2m;    /* Number of altp2m tables. */
 #endif
=20
+#ifdef CONFIG_VMTRACE
     unsigned int vmtrace_size; /* Buffer size in bytes, or 0 to disable. *=
/
+#endif
=20
 #ifdef CONFIG_ARGO
     /* Argo interdomain communication support */
--=20
2.34.1


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CC: Grygorii Strashko , Jan Beulich
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Subject: [XEN][PATCH] x86/paging: replace !paging_mode_hap() with
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From: Grygorii Strashko 

Now Xen supports only two paging modes: HAP and SHADOW, so
!paging_mode_hap() is actually means paging_mode_shadow().

For an abstract, future case of there being a 3rd paging mode it is also
better to explicitly mention checked paging mode (SHADOW) instead of using
negative check of another paging mode (HAP).

Hence, s/!paging_mode_hap()/paging_mode_shadow() which also allows DCE drop
unused code when SHADOW_PAGING=3Dn.
The !paging_mode_hap() in hap.c not changed as HAP is checking for itself
to be enabled.

Inspired by [1].

[1] https://patchwork.kernel.org/project/xen-devel/patch/20251111200958.357=
6341-3-grygorii_strashko@epam.com/
Signed-off-by: Grygorii Strashko 
---
 xen/arch/x86/cpu/mcheck/vmce.c   |  2 +-
 xen/arch/x86/hvm/domain.c        |  2 +-
 xen/arch/x86/hvm/hvm.c           | 10 +++++-----
 xen/arch/x86/hvm/svm/nestedsvm.c |  2 +-
 xen/arch/x86/hvm/svm/svm.c       |  8 ++++----
 xen/arch/x86/hvm/vmx/vmcs.c      |  2 +-
 xen/arch/x86/hvm/vmx/vmx.c       |  4 ++--
 xen/arch/x86/mm/p2m-ept.c        |  2 +-
 8 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/xen/arch/x86/cpu/mcheck/vmce.c b/xen/arch/x86/cpu/mcheck/vmce.=
c
index 5abdf4cb5fd5..1a7e92506ac8 100644
--- a/xen/arch/x86/cpu/mcheck/vmce.c
+++ b/xen/arch/x86/cpu/mcheck/vmce.c
@@ -525,7 +525,7 @@ int unmmap_broken_page(struct domain *d, mfn_t mfn, uns=
igned long gfn)
     if ( !mfn_valid(mfn) )
         return -EINVAL;
=20
-    if ( !is_hvm_domain(d) || !paging_mode_hap(d) )
+    if ( !is_hvm_domain(d) || paging_mode_shadow(d) )
         return -EOPNOTSUPP;
=20
     rc =3D -1;
diff --git a/xen/arch/x86/hvm/domain.c b/xen/arch/x86/hvm/domain.c
index 048f29ae4911..37092f31f3f7 100644
--- a/xen/arch/x86/hvm/domain.c
+++ b/xen/arch/x86/hvm/domain.c
@@ -287,7 +287,7 @@ int arch_set_info_hvm_guest(struct vcpu *v, const struc=
t vcpu_hvm_context *ctx)
     hvm_update_guest_cr(v, 4);
     hvm_update_guest_efer(v);
=20
-    if ( hvm_paging_enabled(v) && !paging_mode_hap(v->domain) )
+    if ( hvm_paging_enabled(v) && paging_mode_shadow(v->domain) )
     {
         /* Shadow-mode CR3 change. Check PDBR and update refcounts. */
         struct page_info *page =3D get_page_from_gfn(v->domain,
diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 7299cfa90ad5..cb4924be9aff 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -2317,7 +2317,7 @@ int hvm_set_cr0(unsigned long value, bool may_defer)
             hvm_update_guest_efer(v);
         }
=20
-        if ( !paging_mode_hap(d) )
+        if ( paging_mode_shadow(d) )
         {
             /* The guest CR3 must be pointing to the guest physical. */
             gfn =3D v->arch.hvm.guest_cr[3] >> PAGE_SHIFT;
@@ -2368,7 +2368,7 @@ int hvm_set_cr0(unsigned long value, bool may_defer)
             hvm_update_guest_efer(v);
         }
=20
-        if ( !paging_mode_hap(d) )
+        if ( paging_mode_shadow(d) )
         {
             put_page(pagetable_get_page(v->arch.guest_table));
             v->arch.guest_table =3D pagetable_null();
@@ -2422,7 +2422,7 @@ int hvm_set_cr3(unsigned long value, bool noflush, bo=
ol may_defer)
         }
     }
=20
-    if ( hvm_paging_enabled(curr) && !paging_mode_hap(currd) &&
+    if ( hvm_paging_enabled(curr) && paging_mode_shadow(currd) &&
          ((value ^ curr->arch.hvm.guest_cr[3]) >> PAGE_SHIFT) )
     {
         /* Shadow-mode CR3 change. Check PDBR and update refcounts. */
@@ -3966,7 +3966,7 @@ void hvm_vcpu_reset_state(struct vcpu *v, uint16_t cs=
, uint16_t ip)
     if ( v->is_initialised )
         goto out;
=20
-    if ( !paging_mode_hap(d) )
+    if ( paging_mode_shadow(d) )
     {
         if ( v->arch.hvm.guest_cr[0] & X86_CR0_PG )
             put_page(pagetable_get_page(v->arch.guest_table));
@@ -4241,7 +4241,7 @@ static int hvm_set_param(struct domain *d, uint32_t i=
ndex, uint64_t value)
          * Only actually required for VT-x lacking unrestricted_guest
          * capabilities.  Short circuit the pause if possible.
          */
-        if ( !paging_mode_hap(d) || !using_vmx() )
+        if ( paging_mode_shadow(d) || !using_vmx() )
         {
             d->arch.hvm.params[index] =3D value;
             break;
diff --git a/xen/arch/x86/hvm/svm/nestedsvm.c b/xen/arch/x86/hvm/svm/nested=
svm.c
index dc2b6a42534a..1813692ffb03 100644
--- a/xen/arch/x86/hvm/svm/nestedsvm.c
+++ b/xen/arch/x86/hvm/svm/nestedsvm.c
@@ -1341,7 +1341,7 @@ nestedsvm_check_intercepts(struct vcpu *v, struct cpu=
_user_regs *regs,
             /* l2 guest intercepts #PF unnecessarily */
             return NESTEDHVM_VMEXIT_INJECT;
         }
-        if ( !paging_mode_hap(v->domain) )
+        if ( paging_mode_shadow(v->domain) )
             /* host shadow paging + guest shadow paging */
             return NESTEDHVM_VMEXIT_HOST;
=20
diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c
index b54f9d9af50e..73d6c7ed03f2 100644
--- a/xen/arch/x86/hvm/svm/svm.c
+++ b/xen/arch/x86/hvm/svm/svm.c
@@ -171,7 +171,7 @@ static void cf_check svm_update_guest_cr(
         }
=20
         value =3D v->arch.hvm.guest_cr[0] | hw_cr0_mask;
-        if ( !paging_mode_hap(v->domain) )
+        if ( paging_mode_shadow(v->domain) )
             value |=3D X86_CR0_PG | X86_CR0_WP;
         vmcb_set_cr0(vmcb, value);
         break;
@@ -440,7 +440,7 @@ static int svm_vmcb_restore(struct vcpu *v, struct hvm_=
hw_cpu *c)
         }
     }
=20
-    if ( !paging_mode_hap(v->domain) )
+    if ( paging_mode_shadow(v->domain) )
     {
         if ( c->cr0 & X86_CR0_PG )
         {
@@ -762,7 +762,7 @@ static int cf_check svm_set_guest_pat(struct vcpu *v, u=
64 gpat)
 {
     struct vmcb_struct *vmcb =3D v->arch.hvm.svm.vmcb;
=20
-    if ( !paging_mode_hap(v->domain) )
+    if ( paging_mode_shadow(v->domain) )
         return 0;
=20
     vmcb_set_g_pat(vmcb, gpat);
@@ -773,7 +773,7 @@ static int cf_check svm_get_guest_pat(struct vcpu *v, u=
64 *gpat)
 {
     struct vmcb_struct *vmcb =3D v->arch.hvm.svm.vmcb;
=20
-    if ( !paging_mode_hap(v->domain) )
+    if ( paging_mode_shadow(v->domain) )
         return 0;
=20
     *gpat =3D vmcb_get_g_pat(vmcb);
diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c
index 2fffc2006ab0..0b511939ac8a 100644
--- a/xen/arch/x86/hvm/vmx/vmcs.c
+++ b/xen/arch/x86/hvm/vmx/vmcs.c
@@ -135,7 +135,7 @@ static int cf_check parse_ept_param_runtime(const char =
*s)
     for_each_domain ( d )
     {
         /* PV, or HVM Shadow domain?  Not applicable. */
-        if ( !paging_mode_hap(d) )
+        if ( paging_mode_shadow(d) )
             continue;
=20
         /* Hardware domain? Not applicable. */
diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c
index 3f0e113b0b67..c98ec110d144 100644
--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -1432,7 +1432,7 @@ static void cf_check vmx_set_segment_register(
=20
 static int cf_check vmx_set_guest_pat(struct vcpu *v, u64 gpat)
 {
-    if ( !paging_mode_hap(v->domain) ||
+    if ( paging_mode_shadow(v->domain) ||
          unlikely(v->arch.hvm.vmx.cache_mode =3D=3D CACHE_MODE_NO_FILL) )
         return 0;
=20
@@ -1444,7 +1444,7 @@ static int cf_check vmx_set_guest_pat(struct vcpu *v,=
 u64 gpat)
=20
 static int cf_check vmx_get_guest_pat(struct vcpu *v, u64 *gpat)
 {
-    if ( !paging_mode_hap(v->domain) ||
+    if ( paging_mode_shadow(v->domain) ||
          unlikely(v->arch.hvm.vmx.cache_mode =3D=3D CACHE_MODE_NO_FILL) )
         return 0;
=20
diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c
index b854a08b4c4f..ce4ef632ae0a 100644
--- a/xen/arch/x86/mm/p2m-ept.c
+++ b/xen/arch/x86/mm/p2m-ept.c
@@ -1270,7 +1270,7 @@ void ept_sync_domain(struct p2m_domain *p2m)
     struct domain *d =3D p2m->domain;
=20
     /* Only if using EPT and this domain has some VCPUs to dirty. */
-    if ( !paging_mode_hap(d) || !d->vcpu || !d->vcpu[0] )
+    if ( paging_mode_shadow(d) || !d->vcpu || !d->vcpu[0] )
         return;
=20
     ept_sync_domain_prepare(p2m);
--=20
2.34.1


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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Oleksii Kurochko 
Subject: [PATCH for-4.21] x86/ucode: Add extra rows to the entrysign model table (again)
Date: Fri, 14 Nov 2025 15:24:47 +0000
Message-Id: <20251114152447.272823-1-andrew.cooper3@citrix.com>
X-Mailer: git-send-email 2.39.5
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Link: https://git.kernel.org/tip/dd14022a7ce96963aa923e35cf4bcc8c32f95840
Fixes: ff8228ab4658 ("x86/ucode: Relax digest check when Entrysign is fixed in firmware")
Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 
CC: Oleksii Kurochko 

Found because AMD have released ucode to fix RDSEED on this CPU, and I
cross-referenced the tables.

Again, for 4.21 even at this juncture.  It wants backporting everywhere in due
course.
---
 xen/arch/x86/cpu/microcode/amd.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/xen/arch/x86/cpu/microcode/amd.c b/xen/arch/x86/cpu/microcode/amd.c
index 550b8c1e57ec..4a7573c885e5 100644
--- a/xen/arch/x86/cpu/microcode/amd.c
+++ b/xen/arch/x86/cpu/microcode/amd.c
@@ -659,6 +659,7 @@ void __init amd_check_entrysign(void)
     case 0x0b1010: fixed_rev = 0x47; break;
     case 0x0b2040: fixed_rev = 0x32; break;
     case 0x0b4040: fixed_rev = 0x32; break;
+    case 0x0b4041: fixed_rev = 0x02; break;
     case 0x0b6000: fixed_rev = 0x32; break;
     case 0x0b6080: fixed_rev = 0x32; break;
     case 0x0b7000: fixed_rev = 0x32; break;
-- 
2.39.5



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From: "Teddy Astie" 
Subject: =?utf-8?Q?Re:=20[PATCH]=20ioreq:=20Assert=20with=20out=20of=20bounds=20vCPU=20ID?=
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To: "Andrew Cooper" , xen-devel@lists.xenproject.org
Cc: "Anthony PERARD" , "Michal Orzel" , "Jan Beulich" , "Julien Grall" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Stefano Stabellini" , "Julian Vetter" 
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Le 14/11/2025 =C3=A0 14:24, Andrew Cooper a =C3=A9crit=C2=A0:
> On 14/11/2025 1:05 pm, Teddy Astie wrote:
>> A 4K page appears to be able to hold 128 ioreq entries, which luckly
>> matches the current vCPU limit. However, if we decide to increase the
>> domain vCPU limit, that doesn't hold anymore and this function would now
>> silently create a out of bounds pointer leading to confusing problems.
>>
>> All architectures have no more than 128 as vCPU limit on HVM guests,
>> and have pages that are at most 4 KB, so this case doesn't occurs in
>> with the current limits.
>>
>> Assert if the vCPU ID will lead to a out of bounds pointer.
>>
>> No functional change.
>>
>> Reported-by: Julian Vetter 
>> Signed-off-by: Teddy Astie 
>> ---
>> Not sure if this is the best approach, perhaps preventing compilation if=
 the
>> vCPU limit is higher than what the ioreq page can hold is preferable ?
>>
>>   xen/common/ioreq.c | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/xen/common/ioreq.c b/xen/common/ioreq.c
>> index f5fd30ce12..b2ef46ed7b 100644
>> --- a/xen/common/ioreq.c
>> +++ b/xen/common/ioreq.c
>> @@ -99,6 +99,7 @@ static ioreq_t *get_ioreq(struct ioreq_server *s, stru=
ct vcpu *v)
>>   
>>       ASSERT((v =3D=3D current) || !vcpu_runnable(v));
>>       ASSERT(p !=3D NULL);
>> +    ASSERT(v->vcpu_id < (PAGE_SIZE / sizeof(struct ioreq)));
>>   
>>       return &p->vcpu_ioreq[v->vcpu_id];
>>   }
> 
> The 128 vCPU problem was known and IOERQ servers intentionally had
> multi-page capabilities from the outset to address this problem.
> 
> See the calculation in ioreq_server_max_frames().
> 
> It hasn't been exercised in anger because there's still the APIC ID
> limit at 128 still, but IOREQ servers are expected to work correctly
> above this limit.  


Yes, although only the first ioreq page exists and can be used (even 
though ioreq_server_max_frames may report more). It looks like the logic 
is incomplete there.


> That said, this function is clearly buggy and in need
> of fixing.
> 
> To the assert specifically, that's really not appropriate.=C2=A0 If it we=
re
> to ever fire, we'd have an XSA.=C2=A0 Logic if this nature either needs t=
o be
> fail safe (if returning NULL is ok), or be a BUG() so it doesn't become
> unsafe in release builds.
> 

It looks like it is possible to somewhat gracefully handle this, by e.g 
crashing the offending domain instead of stepping in a assert. I'm 
trying this for v2.

> ~Andrew



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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Subject: Re: [PATCH v8] xen: Strip xen.efi by default
To: Frediano Ziglio ,
 xen-devel@lists.xenproject.org
Cc: Frediano Ziglio ,
 Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Jan Beulich ,
 Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
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On 11/13/25 4:43 PM, Frediano Ziglio wrote:
> From: Frediano Ziglio
>
> For xen.gz file we strip all symbols and have an additional
> xen-syms.efi file version with all symbols.
> Make xen.efi more coherent stripping all symbols too.
> xen-syms.efi can be used for debugging.
>
> Signed-off-by: Frediano Ziglio

Release-Acked-By: Oleksii Kurochko

Thanks.

~ Oleksii

> ---
> Changes since v1:
> - avoid leaving target if some command fails.
>
> Changes since v2:
> - do not convert type but retain PE format;
> - use xen-syms.efi for new file name, more consistent with ELF.
>
> Changes since v3:
> - update documentation;
> - do not remove xen.efi.elf;
> - check endbr instruction before generating final target.
>
> Changes since v4:
> - simplify condition check;
> - avoid reuse of $@.tmp file.
>
> Changes since v5:
> - avoid creation of temporary file.
>
> Changes since v6:
> - install xen-syms.efi;
> - always strip xen.efi;
> - restore EFI_LDFLAGS check during rule execution;
> - update CHANGELOG.md;
> - added xen-syms.efi to .gitignore.
>
> Changes since v7:
> - move and improve CHANGELOG.md changes.
> ---
>   .gitignore            |  1 +
>   CHANGELOG.md          |  3 +++
>   docs/misc/efi.pandoc  |  8 +-------
>   xen/Kconfig.debug     |  9 ++-------
>   xen/Makefile          | 25 +++----------------------
>   xen/arch/x86/Makefile | 11 ++++++++---
>   6 files changed, 18 insertions(+), 39 deletions(-)
>
> diff --git a/.gitignore b/.gitignore
> index d83427aba8..213972b65c 100644
> --- a/.gitignore
> +++ b/.gitignore
> @@ -222,6 +222,7 @@ tools/flask/policy/xenpolicy-*
>   xen/xen
>   xen/suppression-list.txt
>   xen/xen-syms
> +xen/xen-syms.efi
>   xen/xen-syms.map
>   xen/xen.*
>   
> diff --git a/CHANGELOG.md b/CHANGELOG.md
> index c9932a2af0..bc16e316e7 100644
> --- a/CHANGELOG.md
> +++ b/CHANGELOG.md
> @@ -34,6 +34,9 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
>        BAR for HVM guests, to improve performance of guests using it to map the
>        grant table or foreign memory.
>      - Allow configuring the number of altp2m tables per domain via vm.cfg.
> +   - The install-time environment variable INSTALL_EFI_STRIP no longer exists.
> +     xen.efi is always stripped, while the symbols remain available in
> +     xen-syms.efi.
>   
>   ### Added
>    - Introduce new PDX compression algorithm to cope with Intel Sierra Forest and
> diff --git a/docs/misc/efi.pandoc b/docs/misc/efi.pandoc
> index 11c1ac3346..c66b18a66b 100644
> --- a/docs/misc/efi.pandoc
> +++ b/docs/misc/efi.pandoc
> @@ -20,13 +20,7 @@ Xen to load the configuration file even if multiboot modules are found.
>   Once built, `make install-xen` will place the resulting binary directly into
>   the EFI boot partition, provided `EFI_VENDOR` is set in the environment (and
>   `EFI_MOUNTPOINT` is overridden as needed, should the default of `/boot/efi` not
> -match your system). When built with debug info, the binary can be quite large.
> -Setting `INSTALL_EFI_STRIP=1` in the environment will cause it to be stripped
> -of debug info in the process of installing. `INSTALL_EFI_STRIP` can also be set
> -to any combination of options suitable to pass to `strip`, in case the default
> -ones don't do. The xen.efi binary will also be installed in `/usr/lib64/efi/`,
> -unless `EFI_DIR` is set in the environment to override this default. This
> -binary will not be stripped in the process.
> +match your system).
>   
>   The binary itself will require a configuration file (names with the `.efi`
>   extension of the binary's name replaced by `.cfg`, and - until an existing
> diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug
> index d900d926c5..1a8e0c6ec3 100644
> --- a/xen/Kconfig.debug
> +++ b/xen/Kconfig.debug
> @@ -147,12 +147,7 @@ config DEBUG_INFO
>   	  Say Y here if you want to build Xen with debug information. This
>   	  information is needed e.g. for doing crash dump analysis of the
>   	  hypervisor via the "crash" tool.
> -	  Saying Y will increase the size of the xen-syms and xen.efi
> -	  binaries. In case the space on the EFI boot partition is rather
> -	  limited, you may want to install a stripped variant of xen.efi in
> -	  the EFI boot partition (look for "INSTALL_EFI_STRIP" in
> -	  docs/misc/efi.pandoc for more information - when not using
> -	  "make install-xen" for installing xen.efi, stripping needs to be
> -	  done outside the Xen build environment).
> +	  Saying Y will increase the size of the xen-syms, xen-syms.efi and
> +	  xen.efi.elf binaries.
>   
>   endmenu
> diff --git a/xen/Makefile b/xen/Makefile
> index fc9244420e..5ed029fed1 100644
> --- a/xen/Makefile
> +++ b/xen/Makefile
> @@ -493,22 +493,6 @@ endif
>   .PHONY: _build
>   _build: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX)
>   
> -# Strip
> -#
> -# INSTALL_EFI_STRIP, if defined, will cause xen.efi to be stripped before it
> -# is installed. If INSTALL_EFI_STRIP is '1', then the default option(s) below
> -# will be used. Otherwise, INSTALL_EFI_STRIP value will be used as the
> -# option(s) to the strip command.
> -ifdef INSTALL_EFI_STRIP
> -
> -ifeq ($(INSTALL_EFI_STRIP),1)
> -efi-strip-opt := --strip-debug --keep-file-symbols
> -else
> -efi-strip-opt := $(INSTALL_EFI_STRIP)
> -endif
> -
> -endif
> -
>   .PHONY: _install
>   _install: D=$(DESTDIR)
>   _install: T=$(notdir $(TARGET))
> @@ -526,18 +510,15 @@ _install: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX)
>   	if [ -r $(TARGET).efi -a -n '$(EFI_DIR)' ]; then \
>   		[ -d $(D)$(EFI_DIR) ] || $(INSTALL_DIR) $(D)$(EFI_DIR); \
>   		$(INSTALL_DATA) $(TARGET).efi $(D)$(EFI_DIR)/$(T)-$(XEN_FULLVERSION).efi; \
> -		for x in map elf; do \
> -			if [ -e $(TARGET).efi.$$x ]; then \
> -				$(INSTALL_DATA) $(TARGET).efi.$$x $(D)$(DEBUG_DIR)/$(T)-$(XEN_FULLVERSION).efi.$$x; \
> +		for x in .efi.map .efi.elf -syms.efi; do \
> +			if [ -e $(TARGET)$$x ]; then \
> +				$(INSTALL_DATA) $(TARGET)$$x $(D)$(DEBUG_DIR)/$(T)-$(XEN_FULLVERSION)$$x; \
>   			fi; \
>   		done; \
>   		ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T)-$(XEN_VERSION).$(XEN_SUBVERSION).efi; \
>   		ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T)-$(XEN_VERSION).efi; \
>   		ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T).efi; \
>   		if [ -n '$(EFI_MOUNTPOINT)' -a -n '$(EFI_VENDOR)' ]; then \
> -			$(if $(efi-strip-opt), \
> -			     $(STRIP) $(efi-strip-opt) -p -o $(TARGET).efi.stripped $(TARGET).efi && \
> -			     $(INSTALL_DATA) $(TARGET).efi.stripped $(D)$(EFI_MOUNTPOINT)/efi/$(EFI_VENDOR)/$(T)-$(XEN_FULLVERSION).efi ||) \
>   			$(INSTALL_DATA) $(TARGET).efi $(D)$(EFI_MOUNTPOINT)/efi/$(EFI_VENDOR)/$(T)-$(XEN_FULLVERSION).efi; \
>   		elif [ "$(D)" = "$(patsubst $(shell cd $(XEN_ROOT) && pwd)/%,%,$(D))" ]; then \
>   			echo 'EFI installation only partially done (EFI_VENDOR not set)' >&2; \
> diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
> index 407571c510..a154ffe6b2 100644
> --- a/xen/arch/x86/Makefile
> +++ b/xen/arch/x86/Makefile
> @@ -228,12 +228,17 @@ endif
>   	$(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o
>   	$(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds $< \
>   	      $(dot-target).1r.o $(dot-target).1s.o $(orphan-handling-y) \
> -	      $(note_file_option) -o $@
> -	$(NM) -pa --format=sysv $@ \
> +	      $(note_file_option) -o $(TARGET)-syms.efi
> +	$(NM) -pa --format=sysv $(TARGET)-syms.efi \
>   		| $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \
>   		> $@.map
>   ifeq ($(CONFIG_DEBUG_INFO),y)
> -	$(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) -O elf64-x86-64 $@ $@.elf
> +	$(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) \
> +		-O elf64-x86-64 $(TARGET)-syms.efi $@.elf
> +endif
> +	$(STRIP) $(TARGET)-syms.efi -o $@
> +ifneq ($(CONFIG_DEBUG_INFO),y)
> +	rm -f $(TARGET)-syms.efi
>   endif
>   	rm -f $(dot-target).[0-9]* $(@D)/..$(@F).[0-9]*
>   ifeq ($(CONFIG_XEN_IBT),y)
--------------rIgHzd3MjhhWKv1T3mEQ2sVM
Content-Type: text/html; charset=UTF-8
Content-Transfer-Encoding: 7bit



  
    
  
  
    


    

    
On 11/13/25 4:43 PM, Frediano Ziglio
      wrote:

    

    

      
From: Frediano Ziglio <frediano.ziglio@cloud.com>

For xen.gz file we strip all symbols and have an additional
xen-syms.efi file version with all symbols.
Make xen.efi more coherent stripping all symbols too.
xen-syms.efi can be used for debugging.

Signed-off-by: Frediano Ziglio <frediano.ziglio@cloud.com>

    

    
Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>

Thanks.

~ Oleksii

    

      
---
Changes since v1:
- avoid leaving target if some command fails.

Changes since v2:
- do not convert type but retain PE format;
- use xen-syms.efi for new file name, more consistent with ELF.

Changes since v3:
- update documentation;
- do not remove xen.efi.elf;
- check endbr instruction before generating final target.

Changes since v4:
- simplify condition check;
- avoid reuse of $@.tmp file.

Changes since v5:
- avoid creation of temporary file.

Changes since v6:
- install xen-syms.efi;
- always strip xen.efi;
- restore EFI_LDFLAGS check during rule execution;
- update CHANGELOG.md;
- added xen-syms.efi to .gitignore.

Changes since v7:
- move and improve CHANGELOG.md changes.
---
 .gitignore            |  1 +
 CHANGELOG.md          |  3 +++
 docs/misc/efi.pandoc  |  8 +-------
 xen/Kconfig.debug     |  9 ++-------
 xen/Makefile          | 25 +++----------------------
 xen/arch/x86/Makefile | 11 ++++++++---
 6 files changed, 18 insertions(+), 39 deletions(-)

diff --git a/.gitignore b/.gitignore
index d83427aba8..213972b65c 100644
--- a/.gitignore
+++ b/.gitignore
@@ -222,6 +222,7 @@ tools/flask/policy/xenpolicy-*
 xen/xen
 xen/suppression-list.txt
 xen/xen-syms
+xen/xen-syms.efi
 xen/xen-syms.map
 xen/xen.*
 
diff --git a/CHANGELOG.md b/CHANGELOG.md
index c9932a2af0..bc16e316e7 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -34,6 +34,9 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
      BAR for HVM guests, to improve performance of guests using it to map the
      grant table or foreign memory.
    - Allow configuring the number of altp2m tables per domain via vm.cfg.
+   - The install-time environment variable INSTALL_EFI_STRIP no longer exists.
+     xen.efi is always stripped, while the symbols remain available in
+     xen-syms.efi.
 
 ### Added
  - Introduce new PDX compression algorithm to cope with Intel Sierra Forest and
diff --git a/docs/misc/efi.pandoc b/docs/misc/efi.pandoc
index 11c1ac3346..c66b18a66b 100644
--- a/docs/misc/efi.pandoc
+++ b/docs/misc/efi.pandoc
@@ -20,13 +20,7 @@ Xen to load the configuration file even if multiboot modules are found.
 Once built, `make install-xen` will place the resulting binary directly into
 the EFI boot partition, provided `EFI_VENDOR` is set in the environment (and
 `EFI_MOUNTPOINT` is overridden as needed, should the default of `/boot/efi` not
-match your system). When built with debug info, the binary can be quite large.
-Setting `INSTALL_EFI_STRIP=1` in the environment will cause it to be stripped
-of debug info in the process of installing. `INSTALL_EFI_STRIP` can also be set
-to any combination of options suitable to pass to `strip`, in case the default
-ones don't do. The xen.efi binary will also be installed in `/usr/lib64/efi/`,
-unless `EFI_DIR` is set in the environment to override this default. This
-binary will not be stripped in the process.
+match your system).
 
 The binary itself will require a configuration file (names with the `.efi`
 extension of the binary's name replaced by `.cfg`, and - until an existing
diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug
index d900d926c5..1a8e0c6ec3 100644
--- a/xen/Kconfig.debug
+++ b/xen/Kconfig.debug
@@ -147,12 +147,7 @@ config DEBUG_INFO
 	  Say Y here if you want to build Xen with debug information. This
 	  information is needed e.g. for doing crash dump analysis of the
 	  hypervisor via the "crash" tool.
-	  Saying Y will increase the size of the xen-syms and xen.efi
-	  binaries. In case the space on the EFI boot partition is rather
-	  limited, you may want to install a stripped variant of xen.efi in
-	  the EFI boot partition (look for "INSTALL_EFI_STRIP" in
-	  docs/misc/efi.pandoc for more information - when not using
-	  "make install-xen" for installing xen.efi, stripping needs to be
-	  done outside the Xen build environment).
+	  Saying Y will increase the size of the xen-syms, xen-syms.efi and
+	  xen.efi.elf binaries.
 
 endmenu
diff --git a/xen/Makefile b/xen/Makefile
index fc9244420e..5ed029fed1 100644
--- a/xen/Makefile
+++ b/xen/Makefile
@@ -493,22 +493,6 @@ endif
 .PHONY: _build
 _build: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX)
 
-# Strip
-#
-# INSTALL_EFI_STRIP, if defined, will cause xen.efi to be stripped before it
-# is installed. If INSTALL_EFI_STRIP is '1', then the default option(s) below
-# will be used. Otherwise, INSTALL_EFI_STRIP value will be used as the
-# option(s) to the strip command.
-ifdef INSTALL_EFI_STRIP
-
-ifeq ($(INSTALL_EFI_STRIP),1)
-efi-strip-opt := --strip-debug --keep-file-symbols
-else
-efi-strip-opt := $(INSTALL_EFI_STRIP)
-endif
-
-endif
-
 .PHONY: _install
 _install: D=$(DESTDIR)
 _install: T=$(notdir $(TARGET))
@@ -526,18 +510,15 @@ _install: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX)
 	if [ -r $(TARGET).efi -a -n '$(EFI_DIR)' ]; then \
 		[ -d $(D)$(EFI_DIR) ] || $(INSTALL_DIR) $(D)$(EFI_DIR); \
 		$(INSTALL_DATA) $(TARGET).efi $(D)$(EFI_DIR)/$(T)-$(XEN_FULLVERSION).efi; \
-		for x in map elf; do \
-			if [ -e $(TARGET).efi.$$x ]; then \
-				$(INSTALL_DATA) $(TARGET).efi.$$x $(D)$(DEBUG_DIR)/$(T)-$(XEN_FULLVERSION).efi.$$x; \
+		for x in .efi.map .efi.elf -syms.efi; do \
+			if [ -e $(TARGET)$$x ]; then \
+				$(INSTALL_DATA) $(TARGET)$$x $(D)$(DEBUG_DIR)/$(T)-$(XEN_FULLVERSION)$$x; \
 			fi; \
 		done; \
 		ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T)-$(XEN_VERSION).$(XEN_SUBVERSION).efi; \
 		ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T)-$(XEN_VERSION).efi; \
 		ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T).efi; \
 		if [ -n '$(EFI_MOUNTPOINT)' -a -n '$(EFI_VENDOR)' ]; then \
-			$(if $(efi-strip-opt), \
-			     $(STRIP) $(efi-strip-opt) -p -o $(TARGET).efi.stripped $(TARGET).efi && \
-			     $(INSTALL_DATA) $(TARGET).efi.stripped $(D)$(EFI_MOUNTPOINT)/efi/$(EFI_VENDOR)/$(T)-$(XEN_FULLVERSION).efi ||) \
 			$(INSTALL_DATA) $(TARGET).efi $(D)$(EFI_MOUNTPOINT)/efi/$(EFI_VENDOR)/$(T)-$(XEN_FULLVERSION).efi; \
 		elif [ "$(D)" = "$(patsubst $(shell cd $(XEN_ROOT) && pwd)/%,%,$(D))" ]; then \
 			echo 'EFI installation only partially done (EFI_VENDOR not set)' >&2; \
diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
index 407571c510..a154ffe6b2 100644
--- a/xen/arch/x86/Makefile
+++ b/xen/arch/x86/Makefile
@@ -228,12 +228,17 @@ endif
 	$(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o
 	$(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds $< \
 	      $(dot-target).1r.o $(dot-target).1s.o $(orphan-handling-y) \
-	      $(note_file_option) -o $@
-	$(NM) -pa --format=sysv $@ \
+	      $(note_file_option) -o $(TARGET)-syms.efi
+	$(NM) -pa --format=sysv $(TARGET)-syms.efi \
 		| $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \
 		> $@.map
 ifeq ($(CONFIG_DEBUG_INFO),y)
-	$(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) -O elf64-x86-64 $@ $@.elf
+	$(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) \
+		-O elf64-x86-64 $(TARGET)-syms.efi $@.elf
+endif
+	$(STRIP) $(TARGET)-syms.efi -o $@
+ifneq ($(CONFIG_DEBUG_INFO),y)
+	rm -f $(TARGET)-syms.efi
 endif
 	rm -f $(dot-target).[0-9]* $(@D)/..$(@F).[0-9]*
 ifeq ($(CONFIG_XEN_IBT),y)


    

  


--------------rIgHzd3MjhhWKv1T3mEQ2sVM--


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From: "Teddy Astie" 
Subject: =?utf-8?Q?[PATCH=20v2]=20ioreq:=20Check=20for=20out=20of=20bounds=20vCPU=20ID?=
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To: xen-devel@lists.xenproject.org
Cc: "Teddy Astie" , "Andrew Cooper" , "Anthony PERARD" , "Michal Orzel" , "Jan Beulich" , "Julien Grall" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Stefano Stabellini" , "Julian Vetter" 
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A 4K page appears to be able to hold 128 ioreq entries, which luckly
matches the current vCPU limit. However, if we decide to increase the
vCPU limit, that doesn't hold anymore and this function would now
silently fetch a out of bounds pointer.

All architectures have no more than 128 as vCPU limit on HVM guests,
and have pages that are at most 4 KB, so this case doesn't occurs in
with the current limits.

Make sure that out of bounds attempts are reported and adjust the around
logic to at worst crash the offending domain instead.

No functional change.

Reported-by: Julian Vetter 
Signed-off-by: Teddy Astie 
---
v2:
 - check and report instead of ASSERT and eventually crash offending domain

 xen/common/ioreq.c | 27 ++++++++++++++++++++++++---
 1 file changed, 24 insertions(+), 3 deletions(-)

diff --git a/xen/common/ioreq.c b/xen/common/ioreq.c
index f5fd30ce12..a2a2dafe85 100644
--- a/xen/common/ioreq.c
+++ b/xen/common/ioreq.c
@@ -100,7 +100,14 @@ static ioreq_t *get_ioreq(struct ioreq_server *s, struct vcpu *v)
     ASSERT((v == current) || !vcpu_runnable(v));
     ASSERT(p != NULL);
 
-    return &p->vcpu_ioreq[v->vcpu_id];
+    if ( likely(v->vcpu_id < (PAGE_SIZE / sizeof(struct ioreq))) )
+        return &p->vcpu_ioreq[v->vcpu_id];
+    else
+    {
+        gprintk(XENLOG_ERR, "Out of bounds vCPU %pv in ioreq server\n", v);
+        WARN();
+        return NULL;
+    }
 }
 
 /*
@@ -154,9 +161,17 @@ bool vcpu_ioreq_pending(struct vcpu *v)
 static bool wait_for_io(struct ioreq_vcpu *sv, ioreq_t *p)
 {
     unsigned int prev_state = STATE_IOREQ_NONE;
-    unsigned int state = p->state;
+    unsigned int state;
     uint64_t data = ~0;
 
+    if ( unlikely(!p) )
+    {
+        domain_crash(sv->vcpu->domain);
+        return false;
+    }
+
+    state = p->state;
+
     smp_rmb();
 
     /*
@@ -354,7 +369,10 @@ static void ioreq_server_update_evtchn(struct ioreq_server *s,
     {
         ioreq_t *p = get_ioreq(s, sv->vcpu);
 
-        p->vp_eport = sv->ioreq_evtchn;
+        if ( likely(p) )
+            p->vp_eport = sv->ioreq_evtchn;
+        else
+            WARN();
     }
 }
 
@@ -1274,6 +1292,9 @@ int ioreq_send(struct ioreq_server *s, ioreq_t *proto_p,
             evtchn_port_t port = sv->ioreq_evtchn;
             ioreq_t *p = get_ioreq(s, curr);
 
+            if ( unlikely(!p) )
+                break;
+
             if ( unlikely(p->state != STATE_IOREQ_NONE) )
             {
                 gprintk(XENLOG_ERR, "device model set bad IO state %d\n",
-- 
2.51.2



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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Subject: Re: [PATCH for-4.21] x86/ucode: Add extra rows to the entrysign model
 table (again)
To: Andrew Cooper ,
 Xen-devel 
Cc: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 
References: <20251114152447.272823-1-andrew.cooper3@citrix.com>
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On 11/14/25 4:24 PM, Andrew Cooper wrote:
> Link:https://git.kernel.org/tip/dd14022a7ce96963aa923e35cf4bcc8c32f95840
> Fixes: ff8228ab4658 ("x86/ucode: Relax digest check when Entrysign is fixed in firmware")
> Signed-off-by: Andrew Cooper
> ---
> CC: Jan Beulich
> CC: Roger Pau Monné
> CC: Oleksii Kurochko
>
> Found because AMD have released ucode to fix RDSEED on this CPU, and I
> cross-referenced the tables.
>
> Again, for 4.21 even at this juncture.  It wants backporting everywhere in due
> course.

The same as for previous/another patch:
   Release-Acked-By: Oleksii Kurochko

Thanks.

~ Oleksii

> ---
>   xen/arch/x86/cpu/microcode/amd.c | 1 +
>   1 file changed, 1 insertion(+)
>
> diff --git a/xen/arch/x86/cpu/microcode/amd.c b/xen/arch/x86/cpu/microcode/amd.c
> index 550b8c1e57ec..4a7573c885e5 100644
> --- a/xen/arch/x86/cpu/microcode/amd.c
> +++ b/xen/arch/x86/cpu/microcode/amd.c
> @@ -659,6 +659,7 @@ void __init amd_check_entrysign(void)
>       case 0x0b1010: fixed_rev = 0x47; break;
>       case 0x0b2040: fixed_rev = 0x32; break;
>       case 0x0b4040: fixed_rev = 0x32; break;
> +    case 0x0b4041: fixed_rev = 0x02; break;
>       case 0x0b6000: fixed_rev = 0x32; break;
>       case 0x0b6080: fixed_rev = 0x32; break;
>       case 0x0b7000: fixed_rev = 0x32; break;
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On 11/14/25 4:24 PM, Andrew Cooper
      wrote:

    

    

      
Link: https://git.kernel.org/tip/dd14022a7ce96963aa923e35cf4bcc8c32f95840
Fixes: ff8228ab4658 ("x86/ucode: Relax digest check when Entrysign is fixed in firmware")
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Jan Beulich <JBeulich@suse.com>
CC: Roger Pau Monné <roger.pau@citrix.com>
CC: Oleksii Kurochko <oleksii.kurochko@gmail.com>

Found because AMD have released ucode to fix RDSEED on this CPU, and I
cross-referenced the tables.

Again, for 4.21 even at this juncture.  It wants backporting everywhere in due
course.

    

    
The same as for previous/another patch:
  Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>

Thanks.

~ Oleksii

    

      
---
 xen/arch/x86/cpu/microcode/amd.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/xen/arch/x86/cpu/microcode/amd.c b/xen/arch/x86/cpu/microcode/amd.c
index 550b8c1e57ec..4a7573c885e5 100644
--- a/xen/arch/x86/cpu/microcode/amd.c
+++ b/xen/arch/x86/cpu/microcode/amd.c
@@ -659,6 +659,7 @@ void __init amd_check_entrysign(void)
     case 0x0b1010: fixed_rev = 0x47; break;
     case 0x0b2040: fixed_rev = 0x32; break;
     case 0x0b4040: fixed_rev = 0x32; break;
+    case 0x0b4041: fixed_rev = 0x02; break;
     case 0x0b6000: fixed_rev = 0x32; break;
     case 0x0b6080: fixed_rev = 0x32; break;
     case 0x0b7000: fixed_rev = 0x32; break;


    

  


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Subject: Re: [for 4.22 v5 10/18] xen/riscv: implement p2m_set_range()
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
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On 11/10/25 3:53 PM, Jan Beulich wrote:
> On 20.10.2025 17:57, Oleksii Kurochko wrote:
>> --- a/xen/arch/riscv/include/asm/p2m.h
>> +++ b/xen/arch/riscv/include/asm/p2m.h
>> @@ -8,12 +8,45 @@
>>   #include 
>>   #include 
>>   
>> +#include 
>>   #include 
>>   
>>   extern unsigned char gstage_mode;
>> +extern unsigned int gstage_root_level;
>>   
>>   #define P2M_ROOT_ORDER  (ilog2(GSTAGE_ROOT_PAGE_TABLE_SIZE) - PAGE_SHIFT)
>>   #define P2M_ROOT_PAGES  BIT(P2M_ROOT_ORDER, U)
>> +#define P2M_ROOT_LEVEL  gstage_root_level
>> +
>> +/*
>> + * According to the RISC-V spec:
>> + *   When hgatp.MODE specifies a translation scheme of Sv32x4, Sv39x4, Sv48x4,
>> + *   or Sv57x4, G-stage address translation is a variation on the usual
>> + *   page-based virtual address translation scheme of Sv32, Sv39, Sv48, or
>> + *   Sv57, respectively. In each case, the size of the incoming address is
>> + *   widened by 2 bits (to 34, 41, 50, or 59 bits).
>> + *
>> + * P2M_LEVEL_ORDER(lvl) defines the bit position in the GFN from which
>> + * the index for this level of the P2M page table starts. The extra 2
>> + * bits added by the "x4" schemes only affect the root page table width.
>> + *
>> + * Therefore, this macro can safely reuse XEN_PT_LEVEL_ORDER() for all
>> + * levels: the extra 2 bits do not change the indices of lower levels.
>> + *
>> + * The extra 2 bits are only relevant if one tried to address beyond the
>> + * root level (i.e., P2M_LEVEL_ORDER(P2M_ROOT_LEVEL + 1)), which is
>> + * invalid.
>> + */
>> +#define P2M_LEVEL_ORDER(lvl) XEN_PT_LEVEL_ORDER(lvl)
> Is the last paragraph of the comment really needed? It talks about something
> absurd / impossible only.

Agree, it isn't really needed, lets drop it.

>
>> +#define P2M_ROOT_EXTRA_BITS(lvl) (2 * ((lvl) == P2M_ROOT_LEVEL))
>> +
>> +#define P2M_PAGETABLE_ENTRIES(lvl) \
>> +    (BIT(PAGETABLE_ORDER + P2M_ROOT_EXTRA_BITS(lvl), UL))
>> +
>> +#define GFN_MASK(lvl) (P2M_PAGETABLE_ENTRIES(lvl) - 1UL)
> If I'm not mistaken, this is a mask with the low 10 or 12 bits set.

I'm not sure I fully understand you here. With the current implementation,
it returns a bitmask that corresponds to the number of index bits used
at each level. So, if|P2M_ROOT_LEVEL = 2|, then:
   |G||FN_MASK(0) = 0x1ff| (9-bit GFN for the level 0)
   |GFN_MASK(1) = 0x1ff| (9-bit GFN width for level 1)
   |GFN_MASK(2) = 0x7ff| (11-bit GFN width for level 2)

Or do you mean that GFN_MASK(lvl) should return something like this:
   |G||FN_MASK_(0) = 0x1FF000 (0x1ff << 0xc) GFN_MASK_(1) = 0x3FE00000 
(GFN_MASK_(0)<<9) GFN_MASK_(2) = 0x1FFC0000000 (GFN_MASK_(1)<<9 + extra 
2 bits) And then here ...|

> That's not really something you can apply to a GFN, unlike the name
> suggests.

That is why virtual address should be properly shifted before, something
like it is done in calc_offset():
   (va >> P2M_LEVEL_SHIFT(lvl)) & GFN_MASK(lvl);

...
  (va & GFN_MASK_(lvl)) >> P2M_LEVEL_SHIFT(lvl) ?
In this option more shifts will be needed.

Would it be better to just rename GFN_MASK() to P2M_PT_INDEX_MASK()? Or,
maybe, even just P2M_INDEX_MASK().

>
>> +#define P2M_LEVEL_SHIFT(lvl) (P2M_LEVEL_ORDER(lvl) + PAGE_SHIFT)
> Whereas here the macro name doesn't make clear what is shifted: An
> address or a GFN. (It's the former, aiui.)

Yes, it is expected to be used to shift gfn.

The similar as with above would it be better to rename P2M_LEVEL_SHIFT to
P2M_GFN_LEVEL_SHIFT()?

>
>> --- a/xen/arch/riscv/p2m.c
>> +++ b/xen/arch/riscv/p2m.c
>> @@ -9,6 +9,7 @@
>>   #include 
>>   #include 
>>   #include 
>> +#include 
>>   
>>   #include 
>>   #include 
>> @@ -17,6 +18,43 @@
>>   #include 
>>   
>>   unsigned char __ro_after_init gstage_mode;
>> +unsigned int __ro_after_init gstage_root_level;
> Like for mode, I'm unconvinced of this being a global (and not per-P2M /
> per-domain).

The question is then if we really will (or want to) have cases when gstage
mode will be different per-domain/per-p2m?

>
>> +/*
>> + * The P2M root page table is extended by 2 bits, making its size 16KB
>> + * (instead of 4KB for non-root page tables). Therefore, P2M root page
>> + * is allocated as four consecutive 4KB pages (since alloc_domheap_pages()
>> + * only allocates 4KB pages).
>> + */
>> +#define ENTRIES_PER_ROOT_PAGE \
>> +    (P2M_PAGETABLE_ENTRIES(P2M_ROOT_LEVEL) / P2M_ROOT_ORDER)
>> +
>> +static inline unsigned int calc_offset(unsigned int lvl, vaddr_t va)
> Where would a vaddr_t come from here? Your input are guest-physical addresses,
> if I'm not mistaken.

You are right. Would it be right to 'paddr_t gpa' here? Or paddr_t is supposed to use
only with machine physical address?


>
>> +{
>> +    unsigned int offset = (va >> P2M_LEVEL_SHIFT(lvl)) & GFN_MASK(lvl);
>> +
>> +    /*
>> +     * For P2M_ROOT_LEVEL, `offset` ranges from 0 to 2047, since the root
>> +     * page table spans 4 consecutive 4KB pages.
>> +     * We want to return an index within one of these 4 pages.
>> +     * The specific page to use is determined by `p2m_get_root_pointer()`.
>> +     *
>> +     * Example: if `offset == 512`:
>> +     *  - A single 4KB page holds 512 entries.
>> +     *  - Therefore, entry 512 corresponds to index 0 of the second page.
>> +     *
>> +     * At all other levels, only one page is allocated, and `offset` is
>> +     * always in the range 0 to 511, since the VPN is 9 bits long.
>> +     */
>> +    return offset % ENTRIES_PER_ROOT_PAGE;
> Seeing something "root" used here (when this is for all levels) is pretty odd,
> despite all the commentary. Given all the commentary, why not simply
>
>      return offset & ((1U << PAGETABLE_ORDER) - 1);
>
> ?

It works for all levels where|lvl < P2M_ROOT_LEVEL|, because in those cases the GFN
bit length is equal to|PAGETABLE_ORDER|. However, at the root level the GFN bit length
is 2 bits larger. So something like the following is needed:
   offset & ((1U << (PAGETABLE_ORDER + P2M_ROOT_EXTRA_BITS(lvl))) - 1);
This still returns an offset within a single 16 KB page, but in the case of the P2M
root we actually have four consecutive 4 KB pages, so the intention was to return
an offset inside one of those four 4 KB pages.

While writing the above, I started thinking whether|calc_offset()| could be implemented
much more simply. Since the root page table consists of four/consecutive/ pages, it seems
acceptable to have the offset in the range|[0, 2^11)| instead of doing all the extra
manipulation to determine which of the four pages is used and the offset within that
specific page:

   static inline unsigned int calc_offset(unsigned int lvl, paddr_t gpa)
   {
      return (gpa >> P2M_LEVEL_SHIFT(lvl)) & GFN_MASK(lvl);
   }

   static pte_t *p2m_get_root_pointer(struct p2m_domain *p2m, gfn_t gfn)
   {
     return __map_domain_page(p2m->root);
   }

It probably still makes sense for|p2m_get_root_pointer()| to check that the root GFN
index is not larger than|2^11|.

Am I missing something?

>
>> +}
>> +
>> +#define P2M_MAX_ROOT_LEVEL 4
>> +
>> +#define P2M_DECLARE_OFFSETS(var, addr) \
>> +    unsigned int var[P2M_MAX_ROOT_LEVEL] = {-1};\
>> +    for ( unsigned int i = 0; i <= gstage_root_level; i++ ) \
>> +        var[i] = calc_offset(i, addr);
> This surely is more than just "declare", and it's dealing with all levels no
> matter whether you actually will use all offsets.

I will rename|P2M_DECLARE_OFFSETS| to|P2M_BUILD_LEVEL_OFFSETS()|.

But how can I know which offset I will actually need to use?
If we take the following loop as an example:
   |for( level = P2M_ROOT_LEVEL; level > target; level-- ) { ||/* ||* Don't try to allocate intermediate page tables if the mapping ||* is about to be removed. ||*/ ||rc = p2m_next_level(p2m, !removing_mapping, ||level, &table, offsets[level]); ||... ||} |It walks from|P2M_ROOT_LEVEL| down to|target|, where|target| is determined at runtime.

If you mean that, for example, when the G-stage mode is Sv39, there is no need to allocate
an array with 4 entries (or 5 entries if we consider Sv57, so P2M_MAX_ROOT_LEVEL should be
updated), because Sv39 only uses 3 page table levels — then yes, in theory it could be
smaller. But I don't think it is a real issue if the|offsets[]| array on the stack has a
few extra unused entries.

If preferred, Icould allocate the array dynamically based on|gstage_root_level|.
Would that be better?

>
>> @@ -259,13 +308,293 @@ int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted)
>>       return rc;
>>   }
>>   
>> +/*
>> + * Map one of the four root pages of the P2M root page table.
>> + *
>> + * The P2M root page table is larger than normal (16KB instead of 4KB),
>> + * so it is allocated as four consecutive 4KB pages. This function selects
>> + * the appropriate 4KB page based on the given GFN and returns a mapping
>> + * to it.
>> + *
>> + * The caller is responsible for unmapping the page after use.
>> + *
>> + * Returns NULL if the calculated offset into the root table is invalid.
>> + */
>> +static pte_t *p2m_get_root_pointer(struct p2m_domain *p2m, gfn_t gfn)
>> +{
>> +    unsigned long root_table_indx;
>> +
>> +    root_table_indx = gfn_x(gfn) >> P2M_LEVEL_ORDER(P2M_ROOT_LEVEL);
> With the variable name shortened (to e.g. idx) this could be its initializer
> without ending up with too long a line. The root_table_ prefix isn't really
> adding much value in the context of this function.
>
>> +    if ( root_table_indx >= P2M_ROOT_PAGES )
>> +        return NULL;
>> +
>> +    /*
>> +     * The P2M root page table is extended by 2 bits, making its size 16KB
>> +     * (instead of 4KB for non-root page tables). Therefore, p2m->root is
>> +     * allocated as four consecutive 4KB pages (since alloc_domheap_pages()
>> +     * only allocates 4KB pages).
>> +     *
>> +     * Initially, `root_table_indx` is derived directly from `va`.
> There's no 'va' here.

Should be gfn.

>
>> +static inline void p2m_clean_pte(pte_t *p, bool clean_pte)
> "clean_pte" as a parameter name of a function of this name is, well, odd.

clean_cache should be better:
   p2m_clean_pte(pte_t *p, bool clean_cache)

I suppose it would be nice to rename everywhere clean_pte to clean_cache.

Thanks.

~ Oleksii

--------------Pq48CNIJ8D8qOdyUGPQOyyLN
Content-Type: text/html; charset=UTF-8
Content-Transfer-Encoding: 8bit



  
    
  
  
    


    

    
On 11/10/25 3:53 PM, Jan Beulich wrote:

    

    

      
On 20.10.2025 17:57, Oleksii Kurochko wrote:


      

        
--- a/xen/arch/riscv/include/asm/p2m.h
+++ b/xen/arch/riscv/include/asm/p2m.h
@@ -8,12 +8,45 @@
 #include <xen/rwlock.h>
 #include <xen/types.h>
 
+#include <asm/page.h>
 #include <asm/page-bits.h>
 
 extern unsigned char gstage_mode;
+extern unsigned int gstage_root_level;
 
 #define P2M_ROOT_ORDER  (ilog2(GSTAGE_ROOT_PAGE_TABLE_SIZE) - PAGE_SHIFT)
 #define P2M_ROOT_PAGES  BIT(P2M_ROOT_ORDER, U)
+#define P2M_ROOT_LEVEL  gstage_root_level
+
+/*
+ * According to the RISC-V spec:
+ *   When hgatp.MODE specifies a translation scheme of Sv32x4, Sv39x4, Sv48x4,
+ *   or Sv57x4, G-stage address translation is a variation on the usual
+ *   page-based virtual address translation scheme of Sv32, Sv39, Sv48, or
+ *   Sv57, respectively. In each case, the size of the incoming address is
+ *   widened by 2 bits (to 34, 41, 50, or 59 bits).
+ *
+ * P2M_LEVEL_ORDER(lvl) defines the bit position in the GFN from which
+ * the index for this level of the P2M page table starts. The extra 2
+ * bits added by the "x4" schemes only affect the root page table width.
+ *
+ * Therefore, this macro can safely reuse XEN_PT_LEVEL_ORDER() for all
+ * levels: the extra 2 bits do not change the indices of lower levels.
+ *
+ * The extra 2 bits are only relevant if one tried to address beyond the
+ * root level (i.e., P2M_LEVEL_ORDER(P2M_ROOT_LEVEL + 1)), which is
+ * invalid.
+ */
+#define P2M_LEVEL_ORDER(lvl) XEN_PT_LEVEL_ORDER(lvl)


      

      
Is the last paragraph of the comment really needed? It talks about something
absurd / impossible only.

    

    
Agree, it isn't really needed, lets drop it.



    

      



      

        
+#define P2M_ROOT_EXTRA_BITS(lvl) (2 * ((lvl) == P2M_ROOT_LEVEL))
+
+#define P2M_PAGETABLE_ENTRIES(lvl) \
+    (BIT(PAGETABLE_ORDER + P2M_ROOT_EXTRA_BITS(lvl), UL))
+
+#define GFN_MASK(lvl) (P2M_PAGETABLE_ENTRIES(lvl) - 1UL)


      

      
If I'm not mistaken, this is a mask with the low 10 or 12 bits set.

    

    
I'm not sure I fully understand you here. With the current implementation,
it returns a bitmask that corresponds to the number of index bits used
at each level. So, if P2M_ROOT_LEVEL = 2, then:
  GFN_MASK(0) = 0x1ff (9-bit GFN for the level 0)
  GFN_MASK(1) = 0x1ff (9-bit GFN width for level 1)
  GFN_MASK(2) = 0x7ff (11-bit GFN width for level 2)

Or do you mean that GFN_MASK(lvl) should return something like this:
  GFN_MASK_(0) = 0x1FF000 (0x1ff << 0xc)
  GFN_MASK_(1) = 0x3FE00000 (GFN_MASK_(0)<<9)
  GFN_MASK_(2) = 0x1FFC0000000 (GFN_MASK_(1)<<9 + extra 2 bits)
And then here ...

    

    

      
That's not really something you can apply to a GFN, unlike the name
suggests.

    

    
That is why virtual address should be properly shifted before, something
like it is done in calc_offset():
  (va >> P2M_LEVEL_SHIFT(lvl)) & GFN_MASK(lvl);

...
 (va & GFN_MASK_(lvl)) >> P2M_LEVEL_SHIFT(lvl) ?
In this option more shifts will be needed.

Would it be better to just rename GFN_MASK() to P2M_PT_INDEX_MASK()? Or,
maybe, even just P2M_INDEX_MASK().



    

      



      

        
+#define P2M_LEVEL_SHIFT(lvl) (P2M_LEVEL_ORDER(lvl) + PAGE_SHIFT)


      

      
Whereas here the macro name doesn't make clear what is shifted: An
address or a GFN. (It's the former, aiui.)

    

    
Yes, it is expected to be used to shift gfn.

The similar as with above would it be better to rename P2M_LEVEL_SHIFT to
P2M_GFN_LEVEL_SHIFT()?



    

      



      

        
--- a/xen/arch/riscv/p2m.c
+++ b/xen/arch/riscv/p2m.c
@@ -9,6 +9,7 @@
 #include <xen/rwlock.h>
 #include <xen/sched.h>
 #include <xen/sections.h>
+#include <xen/xvmalloc.h>
 
 #include <asm/csr.h>
 #include <asm/flushtlb.h>
@@ -17,6 +18,43 @@
 #include <asm/vmid.h>
 
 unsigned char __ro_after_init gstage_mode;
+unsigned int __ro_after_init gstage_root_level;


      

      
Like for mode, I'm unconvinced of this being a global (and not per-P2M /
per-domain).

    

    
The question is then if we really will (or want to) have cases when gstage
mode will be different per-domain/per-p2m? 



    

      



      

        
+/*
+ * The P2M root page table is extended by 2 bits, making its size 16KB
+ * (instead of 4KB for non-root page tables). Therefore, P2M root page
+ * is allocated as four consecutive 4KB pages (since alloc_domheap_pages()
+ * only allocates 4KB pages).
+ */
+#define ENTRIES_PER_ROOT_PAGE \
+    (P2M_PAGETABLE_ENTRIES(P2M_ROOT_LEVEL) / P2M_ROOT_ORDER)
+
+static inline unsigned int calc_offset(unsigned int lvl, vaddr_t va)


      

      
Where would a vaddr_t come from here? Your input are guest-physical addresses,
if I'm not mistaken.

    

    
You are right. Would it be right to 'paddr_t gpa' here? Or paddr_t is supposed to use
only with machine physical address?

    


    

    

      



      

        
+{
+    unsigned int offset = (va >> P2M_LEVEL_SHIFT(lvl)) & GFN_MASK(lvl);
+
+    /*
+     * For P2M_ROOT_LEVEL, `offset` ranges from 0 to 2047, since the root
+     * page table spans 4 consecutive 4KB pages.
+     * We want to return an index within one of these 4 pages.
+     * The specific page to use is determined by `p2m_get_root_pointer()`.
+     *
+     * Example: if `offset == 512`:
+     *  - A single 4KB page holds 512 entries.
+     *  - Therefore, entry 512 corresponds to index 0 of the second page.
+     *
+     * At all other levels, only one page is allocated, and `offset` is
+     * always in the range 0 to 511, since the VPN is 9 bits long.
+     */
+    return offset % ENTRIES_PER_ROOT_PAGE;


      

      
Seeing something "root" used here (when this is for all levels) is pretty odd,
despite all the commentary. Given all the commentary, why not simply

    return offset & ((1U << PAGETABLE_ORDER) - 1);

?

    

    
It works for all levels where lvl < P2M_ROOT_LEVEL, because in those cases the GFN
bit length is equal to PAGETABLE_ORDER. However, at the root level the GFN bit length
is 2 bits larger. So something like the following is needed:
  offset & ((1U << (PAGETABLE_ORDER + P2M_ROOT_EXTRA_BITS(lvl))) - 1);
This still returns an offset within a single 16 KB page, but in the case of the P2M
root we actually have four consecutive 4 KB pages, so the intention was to return
an offset inside one of those four 4 KB pages.

While writing the above, I started thinking whether calc_offset() could be implemented
much more simply. Since the root page table consists of four consecutive pages, it seems
acceptable to have the offset in the range [0, 2^11) instead of doing all the extra
manipulation to determine which of the four pages is used and the offset within that
specific page:

  static inline unsigned int calc_offset(unsigned int lvl, paddr_t gpa)
  {
     return (gpa >> P2M_LEVEL_SHIFT(lvl)) & GFN_MASK(lvl);
  }

  static pte_t *p2m_get_root_pointer(struct p2m_domain *p2m, gfn_t gfn)
  {
    return __map_domain_page(p2m->root);
  }


    
It probably still makes sense for p2m_get_root_pointer() to check that the root GFN
index is not larger than 2^11.

    
Am I missing something?

    

    

      



      

        
+}
+
+#define P2M_MAX_ROOT_LEVEL 4
+
+#define P2M_DECLARE_OFFSETS(var, addr) \
+    unsigned int var[P2M_MAX_ROOT_LEVEL] = {-1};\
+    for ( unsigned int i = 0; i <= gstage_root_level; i++ ) \
+        var[i] = calc_offset(i, addr);


      

      
This surely is more than just "declare", and it's dealing with all levels no
matter whether you actually will use all offsets.

    

    
I will rename P2M_DECLARE_OFFSETS to P2M_BUILD_LEVEL_OFFSETS().

But how can I know which offset I will actually need to use?
If we take the following loop as an example:
  for ( level = P2M_ROOT_LEVEL; level > target; level-- )
  {
    /*
     * Don't try to allocate intermediate page tables if the mapping
     * is about to be removed.
     */
     rc = p2m_next_level(p2m, !removing_mapping,
                         level, &table, offsets[level]);
     ...
  }
It walks from P2M_ROOT_LEVEL down to target, where target is determined at runtime.

If you mean that, for example, when the G-stage mode is Sv39, there is no need to allocate
an array with 4 entries (or 5 entries if we consider Sv57, so P2M_MAX_ROOT_LEVEL should be
updated), because Sv39 only uses 3 page table levels — then yes, in theory it could be
smaller. But I don't think it is a real issue if the offsets[] array on the stack has a
few extra unused entries.

If preferred, I could allocate the array dynamically based on gstage_root_level.
Would that be better?



    

    

      



      

        
@@ -259,13 +308,293 @@ int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted)
     return rc;
 }
 
+/*
+ * Map one of the four root pages of the P2M root page table.
+ *
+ * The P2M root page table is larger than normal (16KB instead of 4KB),
+ * so it is allocated as four consecutive 4KB pages. This function selects
+ * the appropriate 4KB page based on the given GFN and returns a mapping
+ * to it.
+ *
+ * The caller is responsible for unmapping the page after use.
+ *
+ * Returns NULL if the calculated offset into the root table is invalid.
+ */
+static pte_t *p2m_get_root_pointer(struct p2m_domain *p2m, gfn_t gfn)
+{
+    unsigned long root_table_indx;
+
+    root_table_indx = gfn_x(gfn) >> P2M_LEVEL_ORDER(P2M_ROOT_LEVEL);


      

      
With the variable name shortened (to e.g. idx) this could be its initializer
without ending up with too long a line. The root_table_ prefix isn't really
adding much value in the context of this function.



      

        
+    if ( root_table_indx >= P2M_ROOT_PAGES )
+        return NULL;
+
+    /*
+     * The P2M root page table is extended by 2 bits, making its size 16KB
+     * (instead of 4KB for non-root page tables). Therefore, p2m->root is
+     * allocated as four consecutive 4KB pages (since alloc_domheap_pages()
+     * only allocates 4KB pages).
+     *
+     * Initially, `root_table_indx` is derived directly from `va`.


      

      
There's no 'va' here.

    

    
Should be gfn.



    

      



      

        
+static inline void p2m_clean_pte(pte_t *p, bool clean_pte)


      

      
"clean_pte" as a parameter name of a function of this name is, well, odd.

    

    
clean_cache should be better:
  p2m_clean_pte(pte_t *p, bool clean_cache)

I suppose it would be nice to rename everywhere clean_pte to clean_cache.

Thanks.

~ Oleksii

  


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From: Grygorii Strashko 

Now all libfdt features are built-it unconditionally, but...

X86: The libfdt is used on x86 only to parse Hyperlaunch/dom0less Xen
nodes, so full libfdt is not needed in this case and minimal, RO
configuration can be used.

ARM - situation is more complicated:
1) ARM reads Host DT (fdt.c RO)
2) ARM reads passthrough DT (RO)
3) ARM generates dom0/hwdom DT from Host DT (there is a mix of WIP and SW A=
PIs)
4) ARM generates domU DT (there is a mix of WIP and SW APIs)
4) With EFI enabled - ARM needs RW API and fdt_empty_tree
5) With CONFIG_OVERLAY_DTB - ARM needs RW and fdt_overlay API

Hence, add possibility for optimizing libfdt usage by introducing separate
Kconfig options for each libfdt feature and select them where needed.

Following libfdt modules are not used after this change:
 Makefile.libfdt
 fdt_addresses.c
 fdt_strerror.c
 fdt_check.c

Signed-off-by: Grygorii Strashko 
---
Not sure about using DOMAIN_BUILD_HELPERS for selecting=20
LIBFDT features, as DOMAIN_BUILD_HELPERS doesn't exactly
says that domain's DT will be generated when selected.

 xen/arch/arm/Kconfig       |  4 ++++
 xen/common/Kconfig         |  4 ++++
 xen/common/libfdt/Kconfig  | 14 ++++++++++++++
 xen/common/libfdt/Makefile | 12 +++++++++---
 4 files changed, 31 insertions(+), 3 deletions(-)
 create mode 100644 xen/common/libfdt/Kconfig

diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
index cf6af68299f6..f10cd3d7effc 100644
--- a/xen/arch/arm/Kconfig
+++ b/xen/arch/arm/Kconfig
@@ -111,6 +111,8 @@ config ARM_EFI
 	bool "UEFI boot service support"
 	depends on ARM_64 && !MPU
 	default y
+	select LIBFDT_RW
+	select LIBFDT_EMPTY_TREE
 	help
 	  This option provides support for boot services through
 	  UEFI firmware. A UEFI stub is provided to allow Xen to
@@ -149,6 +151,8 @@ config HAS_ITS
 config OVERLAY_DTB
 	bool "DTB overlay support (UNSUPPORTED)" if UNSUPPORTED
 	depends on SYSCTL
+	select LIBFDT_RW
+	select LIBFDT_OVERLAY
 	help
 	  Dynamic addition/removal of Xen device tree nodes using a dtbo.
=20
diff --git a/xen/common/Kconfig b/xen/common/Kconfig
index 401d5046f6f5..256aff269c3b 100644
--- a/xen/common/Kconfig
+++ b/xen/common/Kconfig
@@ -28,6 +28,8 @@ config DOM0LESS_BOOT
=20
 config DOMAIN_BUILD_HELPERS
 	bool
+	select LIBFDT_WIP
+	select LIBFDT_SW
=20
 config GRANT_TABLE
 	bool "Grant table support" if EXPERT
@@ -680,4 +682,6 @@ config PM_STATS
 	  Enable collection of performance management statistics to aid in
 	  analyzing and tuning power/performance characteristics of the system
=20
+source "common/libfdt/Kconfig"
+
 endmenu
diff --git a/xen/common/libfdt/Kconfig b/xen/common/libfdt/Kconfig
new file mode 100644
index 000000000000..3abd904b2969
--- /dev/null
+++ b/xen/common/libfdt/Kconfig
@@ -0,0 +1,14 @@
+config LIBFDT_WIP
+	bool
+
+config LIBFDT_SW
+    bool
+
+config LIBFDT_RW
+    bool
+
+config LIBFDT_EMPTY_TREE
+    bool
+
+config LIBFDT_OVERLAY
+    bool
diff --git a/xen/common/libfdt/Makefile b/xen/common/libfdt/Makefile
index 6ce679f98f47..c832d1849a5c 100644
--- a/xen/common/libfdt/Makefile
+++ b/xen/common/libfdt/Makefile
@@ -1,7 +1,13 @@
-include $(src)/Makefile.libfdt
=20
 SECTIONS :=3D text data $(SPECIAL_DATA_SECTIONS)
=20
+obj-libfdt-y :=3D fdt.o fdt_ro.o
+obj-libfdt-$(CONFIG_LIBFDT_WIP) +=3D fdt_wip.o
+obj-libfdt-$(CONFIG_LIBFDT_SW) +=3D fdt_sw.o
+obj-libfdt-$(CONFIG_LIBFDT_RW) +=3D fdt_rw.o
+obj-libfdt-$(CONFIG_LIBFDT_EMPTY_TREE) +=3D fdt_empty_tree.o
+obj-libfdt-$(CONFIG_LIBFDT_OVERLAY) +=3D fdt_overlay.o
+
 # For CONFIG_OVERLAY_DTB, libfdt functionalities will be needed during run=
time.
 ifneq ($(CONFIG_OVERLAY_DTB),y)
 OBJCOPYFLAGS :=3D $(foreach s,$(SECTIONS),--rename-section .$(s)=3D.init.$=
(s))
@@ -15,7 +21,7 @@ CFLAGS-y +=3D -I$(srctree)/include/xen/libfdt/
 $(obj)/libfdt.o: $(obj)/libfdt-temp.o FORCE
 	$(call if_changed,objcopy)
=20
-$(obj)/libfdt-temp.o: $(addprefix $(obj)/,$(LIBFDT_OBJS)) FORCE
+$(obj)/libfdt-temp.o: $(addprefix $(obj)/,$(obj-libfdt-y)) FORCE
 	$(call if_changed,ld)
=20
-targets +=3D libfdt-temp.o $(LIBFDT_OBJS)
+targets +=3D libfdt-temp.o $(obj-libfdt-y)
--=20
2.34.1


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Subject: Re: [PATCH v2] ioreq: Check for out of bounds vCPU ID
To: Teddy Astie , xen-devel@lists.xenproject.org
Cc: Anthony PERARD ,
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On 14/11/2025 4:32 pm, Teddy Astie wrote:
> A 4K page appears to be able to hold 128 ioreq entries, which luckly
> matches the current vCPU limit. However, if we decide to increase the
> vCPU limit, that doesn't hold anymore and this function would now
> silently fetch a out of bounds pointer.
>
> All architectures have no more than 128 as vCPU limit on HVM guests,
> and have pages that are at most 4 KB, so this case doesn't occurs in
> with the current limits.
>
> Make sure that out of bounds attempts are reported and adjust the around
> logic to at worst crash the offending domain instead.
>
> No functional change.
>
> Reported-by: Julian Vetter 
> Signed-off-by: Teddy Astie 
> ---
> v2:
>  - check and report instead of ASSERT and eventually crash offending domain
>
>  xen/common/ioreq.c | 27 ++++++++++++++++++++++++---
>  1 file changed, 24 insertions(+), 3 deletions(-)
>
> diff --git a/xen/common/ioreq.c b/xen/common/ioreq.c
> index f5fd30ce12..a2a2dafe85 100644
> --- a/xen/common/ioreq.c
> +++ b/xen/common/ioreq.c
> @@ -100,7 +100,14 @@ static ioreq_t *get_ioreq(struct ioreq_server *s, struct vcpu *v)
>      ASSERT((v == current) || !vcpu_runnable(v));
>      ASSERT(p != NULL);
>  
> -    return &p->vcpu_ioreq[v->vcpu_id];
> +    if ( likely(v->vcpu_id < (PAGE_SIZE / sizeof(struct ioreq))) )
> +        return &p->vcpu_ioreq[v->vcpu_id];
> +    else
> +    {
> +        gprintk(XENLOG_ERR, "Out of bounds vCPU %pv in ioreq server\n", v);
> +        WARN();
> +        return NULL;
> +    }
>  }

While I appreciate this is fixing a latent bug, it's very invasive *and*
needs removing as part of changing the 128 limit.  (i.e. its a lot of
churn for no benefit in the meantime.)

Xen cannot release in a position where the user can request 130 CPUs but
explodes like this on the top two.

Furthermore, the WARN() isn't ratelimited, yet this is
guest-triggerable.  What we need to do is borrow WARN_ON_ONCE() from
Linux for cases like this, where it's obvious in the logs but can't be
triggered repeatedly.

~Andrew


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On 14/11/2025 3:40 pm, Oleksii Kurochko wrote:
>
>
> On 11/13/25 4:43 PM, Frediano Ziglio wrote:
>> From: Frediano Ziglio 
>>
>> For xen.gz file we strip all symbols and have an additional
>> xen-syms.efi file version with all symbols.
>> Make xen.efi more coherent stripping all symbols too.
>> xen-syms.efi can be used for debugging.
>>
>> Signed-off-by: Frediano Ziglio 
> Release-Acked-By: Oleksii Kurochko 
>
> Thanks.

Thanks.  Unfortunately CI says no.

Ubuntu's 20.04, 18.04 and 16.04 all fail: 
https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2159622869

>From 16.04:

2025-11-14T18:01:51.192964Z 01O strip xen-syms.efi -o xen.efi
2025-11-14T18:01:51.198151Z 01O strip:xen-syms.efi[.init]: relocation count is negative: File truncated
2025-11-14T18:01:51.198166Z 01O strip: xen.efi: Failed to read debug data section
2025-11-14T18:01:51.198169Z 01O strip:xen.efi: error copying private BFD data: File truncated
2025-11-14T18:01:51.198932Z 01O arch/x86/Makefile:207: recipe for target 'xen.efi' failed
2025-11-14T18:01:51.198937Z 01O make[3]: *** [xen.efi] Error 1
2025-11-14T18:01:51.199616Z 01O build.mk:90: recipe for target 'xen' failed
2025-11-14T18:01:51.199619Z 01O make[2]: *** [xen] Error 2
2025-11-14T18:01:51.200402Z 01O Makefile:600: recipe for target 'xen' failed
2025-11-14T18:01:51.200409Z 01O make[1]: *** [xen] Error 2


I find it hard to believe that the relocation count is really negative,
and given that newer binuitls works, I expect this is a binutils bug.

Nevertheless, we need some workaround.  Given that the previous
behaviour was not to strip, I think we can reuse that for broken toolchains?

~Andrew


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On 2025-11-13 06:37, Jan Beulich wrote:
> On 12.11.2025 16:37, Teddy Astie wrote:
>> When updating a DTE, amd_iommu_setup_domain_device() would check if
>> the update had been non-atomic (i.e rc > 0) and throw a warning if
>> such non-atomic update could be dangerous.  However since commit
>> 3fc44151d83d, rc can no longer be positive, making this branch
>> unreachable code.
> 
> I.e. it addresses a Misra concern and hence ...
> 
>> No functional change intended.
>>
>> Signed-off-by: Teddy Astie 
> 
> ... wants at least an Amends: tag, likely a Fixes: one. Then:
> Reviewed-by: Jan Beulich 

Reviewed-by: Jason Andryuk 


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On 2025-11-14 09:44, Grygorii Strashko wrote:
> From: Grygorii Strashko 
> 
> Now Xen supports only two paging modes: HAP and SHADOW, so
> !paging_mode_hap() is actually means paging_mode_shadow().
> 
> For an abstract, future case of there being a 3rd paging mode it is also
> better to explicitly mention checked paging mode (SHADOW) instead of using
> negative check of another paging mode (HAP).
> 
> Hence, s/!paging_mode_hap()/paging_mode_shadow() which also allows DCE drop
> unused code when SHADOW_PAGING=n.
> The !paging_mode_hap() in hap.c not changed as HAP is checking for itself
> to be enabled.
> 
> Inspired by [1].
> 
> [1] https://patchwork.kernel.org/project/xen-devel/patch/20251111200958.3576341-3-grygorii_strashko@epam.com/
> Signed-off-by: Grygorii Strashko 

Reviewed-by: Jason Andryuk 


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From: Frediano Ziglio 
Date: Sat, 15 Nov 2025 06:23:08 +0000
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Subject: Re: [PATCH v8] xen: Strip xen.efi by default
To: Andrew Cooper 
Cc: Oleksii Kurochko , 
	Frediano Ziglio , xen-devel@lists.xenproject.org, 
	Frediano Ziglio , Anthony PERARD , 
	Michal Orzel , Jan Beulich , Julien Grall , 
	=?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
	Stefano Stabellini , Demi Marie Obenour , 
	=?UTF-8?Q?Marek_Marczykowski=2DG=C3=B3recki?= , 
	Stewart Hildebrand 
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On Fri, 14 Nov 2025 at 19:18, Andrew Cooper  wrote:
>
> On 14/11/2025 3:40 pm, Oleksii Kurochko wrote:
> >
> >
> > On 11/13/25 4:43 PM, Frediano Ziglio wrote:
> >> From: Frediano Ziglio 
> >>
> >> For xen.gz file we strip all symbols and have an additional
> >> xen-syms.efi file version with all symbols.
> >> Make xen.efi more coherent stripping all symbols too.
> >> xen-syms.efi can be used for debugging.
> >>
> >> Signed-off-by: Frediano Ziglio 
> > Release-Acked-By: Oleksii Kurochko 
> >
> > Thanks.
>
> Thanks.  Unfortunately CI says no.
>
> Ubuntu's 20.04, 18.04 and 16.04 all fail:
> https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2159622869
>
> From 16.04:
>
> 2025-11-14T18:01:51.192964Z 01O strip xen-syms.efi -o xen.efi
> 2025-11-14T18:01:51.198151Z 01O strip:xen-syms.efi[.init]: relocation count is negative: File truncated
> 2025-11-14T18:01:51.198166Z 01O strip: xen.efi: Failed to read debug data section
> 2025-11-14T18:01:51.198169Z 01O strip:xen.efi: error copying private BFD data: File truncated
> 2025-11-14T18:01:51.198932Z 01O arch/x86/Makefile:207: recipe for target 'xen.efi' failed
> 2025-11-14T18:01:51.198937Z 01O make[3]: *** [xen.efi] Error 1
> 2025-11-14T18:01:51.199616Z 01O build.mk:90: recipe for target 'xen' failed
> 2025-11-14T18:01:51.199619Z 01O make[2]: *** [xen] Error 2
> 2025-11-14T18:01:51.200402Z 01O Makefile:600: recipe for target 'xen' failed
> 2025-11-14T18:01:51.200409Z 01O make[1]: *** [xen] Error 2
>
>
> I find it hard to believe that the relocation count is really negative,
> and given that newer binuitls works, I expect this is a binutils bug.
>

Unless the message is just misleading I find it hard to have a
negative number of items in a container.

> Nevertheless, we need some workaround.  Given that the previous
> behaviour was not to strip, I think we can reuse that for broken toolchains?
>

Something like that ?

diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
index a154ffe6b2..c465eb12e2 100644
--- a/xen/arch/x86/Makefile
+++ b/xen/arch/x86/Makefile
@@ -236,7 +236,9 @@ ifeq ($(CONFIG_DEBUG_INFO),y)
        $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) \
                -O elf64-x86-64 $(TARGET)-syms.efi $@.elf
 endif
-       $(STRIP) $(TARGET)-syms.efi -o $@
+       $(STRIP) $(TARGET)-syms.efi -o $@ || { \
+               LANG=C strip $(TARGET)-syms.efi -o $@ 2>&1 | grep -q \
+               "relocation count is negative" && mv -f $(TARGET)-syms.efi $@; }
 ifneq ($(CONFIG_DEBUG_INFO),y)
        rm -f $(TARGET)-syms.efi
 endif

It will fall back to not stripping in case that bug is detected. I
don't know how to test it.
(the LANG=C is to always force the English message).

> ~Andrew

Frediano


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Subject: Re: [PATCH v4 3/8] arm/irq: Keep track of irq affinities
Content-Language: en-GB
To: Mykyta Poturai ,
 "xen-devel@lists.xenproject.org" 
Cc: Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk 
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Hi Mykyta,

On 12/11/2025 10:51, Mykyta Poturai wrote:
> Currently on Arm the desc->affinity mask of an irq is never updated,
> which makes it hard to know the actual affinity of an interrupt.
> 
> Fix this by updating the field in irq_set_affinity.
> 
> Signed-off-by: Mykyta Poturai 
> 
> v3->v4:
> * patch introduced
> ---
>   xen/arch/arm/irq.c | 3 +++
>   1 file changed, 3 insertions(+)
> 
> diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c
> index 73e58a5108..28b40331f7 100644
> --- a/xen/arch/arm/irq.c
> +++ b/xen/arch/arm/irq.c
> @@ -219,7 +219,10 @@ static inline struct domain *irq_get_domain(struct irq_desc *desc)
>   void irq_set_affinity(struct irq_desc *desc, const cpumask_t *mask)
>   {
>       if ( desc != NULL )
> +    {
> +        cpumask_copy(desc->affinity, mask);

irq_set_affinity() doesn't always seems to be called with ``desc->lock`` 
taken (see vgic_migrate_irq(), arch_move_irqs()). So I am not sure this 
is safe. You probably need to update the callers as well to always take 
the lock. irq_set_affinity() probably want to gain an 
ASSERT(spin_is_locked()) with some documentation on top of the function.

>           desc->handler->set_affinity(desc, mask);
> +    }

NIT: As there are multiple lines in the ``if``, I would consider 
reworking the logic so we return early when desc is NULL.

>   }
>   
>   int request_irq(unsigned int irq, unsigned int irqflags,

Cheers,

-- 
Julien Grall



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Subject: Re: [PATCH v4 4/8] arm/irq: Migrate IRQs from dyings CPUs
Content-Language: en-GB
To: Mykyta Poturai ,
 "xen-devel@lists.xenproject.org" 
Cc: Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk 
References: 
 <6371ac96102f48b55ffd884656770187ed3a7f84.1762939773.git.mykyta_poturai@epam.com>
From: Julien Grall 
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Hi,

On 12/11/2025 10:51, Mykyta Poturai wrote:
> Move IRQs from dying CPU to the online ones.
> Guest-bound IRQs are already handled by scheduler in the process of
> moving vCPUs to active pCPUs, so we only need to handle IRQs used by Xen
> itself.
> 
> If IRQ is to be migrated, it's affinity is set to a mask of all online
> CPUs. With current GIC implementation, this means they are routed to a
> random online CPU. This may cause extra moves if multiple cores are
> disabled in sequence, but should prevent all interrupts from piling up
> on CPU0 in case of repeated up-down cycles on different cores.

Wouldn't they eventually all move to CPU0 in the case of suspend/resume 
or if all the CPUs but CPU0 are turned off and then off? If so, 
shouldn't we try to rebalance the interrupts?

> 
> IRQs from CPU 0 are never migrated, as dying CPU 0 means we are either
> shutting down compeletely or entering system suspend.

I can't find a place where __cpu_disable() is called on CPU0. Do you 
have any pointer? In any case, I am not sure I want to bake that 
assumption in more places of the code.

> 
> Considering that all Xen-used IRQs are currently allocated during init
> on CPU 0, and setup_irq uses smp_processor_id for the initial affinity.

Looking at the SMMU driver, we seems to request IRQs at the time the 
device is attached. So are you sure about this?

> This change is not strictly required for correct operation for now, but
> it should future-proof cpu hotplug and system suspend support in case
> some kind if IRQ balancing is implemented later.
> 
> Signed-off-by: Mykyta Poturai 
> 
> v3->v4:
> * patch introduced
> ---
>   xen/arch/arm/include/asm/irq.h |  2 ++
>   xen/arch/arm/irq.c             | 39 ++++++++++++++++++++++++++++++++++
>   xen/arch/arm/smpboot.c         |  2 ++
>   3 files changed, 43 insertions(+)
> 
> diff --git a/xen/arch/arm/include/asm/irq.h b/xen/arch/arm/include/asm/irq.h
> index 09788dbfeb..6e6e27bb80 100644
> --- a/xen/arch/arm/include/asm/irq.h
> +++ b/xen/arch/arm/include/asm/irq.h
> @@ -126,6 +126,8 @@ bool irq_type_set_by_domain(const struct domain *d);
>   void irq_end_none(struct irq_desc *irq);
>   #define irq_end_none irq_end_none
>   
> +void evacuate_irqs(unsigned int from);
> +
>   #endif /* _ASM_HW_IRQ_H */
>   /*
>    * Local variables:
> diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c
> index 28b40331f7..b383d71930 100644
> --- a/xen/arch/arm/irq.c
> +++ b/xen/arch/arm/irq.c
> @@ -158,6 +158,45 @@ static int init_local_irq_data(unsigned int cpu)
>       return 0;
>   }
>   
> +static void evacuate_irq(int irq, unsigned int from)

Any reason why the 'irq' is signed?

> +{
> +    struct irq_desc *desc = irq_to_desc(irq);
> +    unsigned long flags;
> +
> +    /* Don't move irqs from CPU 0 as it is always last to be disabled */

Per above, I am not convinced that we should special case CPU 0. But if 
we do, then shouldn't this be part of evacuate_irqs() so we don't 
pointlessly go through all the IRQs?

> +    if ( from == 0 )
> +        return;
> +
> +    ASSERT(!cpumask_empty(&cpu_online_map));
> +    ASSERT(!cpumask_test_cpu(from, &cpu_online_map));
> +
> +    spin_lock_irqsave(&desc->lock, flags);
> +    if ( likely(!desc->action) )
> +        goto out;
> +
> +    if ( likely(test_bit(_IRQ_GUEST, &desc->status) ||
> +                test_bit(_IRQ_MOVE_PENDING, &desc->status)) )
> +        goto out;
> +
> +    if ( cpumask_test_cpu(from, desc->affinity) )
> +        irq_set_affinity(desc, &cpu_online_map);

I think it would be worth explaining why we are routing to any CPU 
online rather than checking whether the affinity has other online CPUs.

Just to note, I don't have strong opinion either way. It mainly needs to 
be documented.

> +
> +out:
> +    spin_unlock_irqrestore(&desc->lock, flags);
> +    return;
> +}
> +
> +void evacuate_irqs(unsigned int from)
> +{
> +    int irq;
 > +> +    for ( irq = NR_LOCAL_IRQS; irq < NR_IRQS; irq++ )
> +        evacuate_irq(irq, from);
> +
> +    for ( irq = ESPI_BASE_INTID; irq < ESPI_MAX_INTID; irq++ )

AFAICT, irq_to_desc() would not be able to cope with ESPI interrupts 
when CONFIG_GICV3_ESPI is not set. Has this been tested?

> +        evacuate_irq(irq, from);
> +}
> +
>   static int cpu_callback(struct notifier_block *nfb, unsigned long action,
>                           void *hcpu)
>   {
> diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c
> index 7f3cfa812e..46b24783dd 100644
> --- a/xen/arch/arm/smpboot.c
> +++ b/xen/arch/arm/smpboot.c
> @@ -425,6 +425,8 @@ void __cpu_disable(void)
>   
>       smp_mb();
>   
> +    evacuate_irqs(cpu);

I think it would be worth explaining why evacuate_irqs() is called this 
late in the process.

 > +>       /* Return to caller; eventually the IPI mechanism will 
unwind and the
>        * scheduler will drop to the idle loop, which will call stop_cpu(). */
>   }

Cheers,

-- 
Julien Grall



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Subject: Re: [PATCH v4 5/8] smp: Move cpu_up/down helpers to common code
Content-Language: en-GB
To: Mykyta Poturai ,
 "xen-devel@lists.xenproject.org" 
Cc: Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Andrew Cooper ,
 Anthony PERARD , Jan Beulich ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Timothy Pearson ,
 Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Oleksii Kurochko 
References: 
 
From: Julien Grall 
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Hi,

On 12/11/2025 10:51, Mykyta Poturai wrote:
> This will reduce code duplication for the upcoming cpu hotplug support
> on Arm64 patch.
> 
> SMT-disable enforcement check is moved into a separate
> architecture-specific function.
> 
> Signed-off-by: Mykyta Poturai 
> 
> v3->v4:
> * patch introduced
> ---
>   xen/arch/arm/smp.c             |  6 ++++++
>   xen/arch/ppc/stubs.c           |  4 ++++
>   xen/arch/riscv/stubs.c         |  5 +++++
>   xen/arch/x86/include/asm/smp.h |  3 ---
>   xen/arch/x86/smp.c             | 33 +++------------------------------
>   xen/common/smp.c               | 32 ++++++++++++++++++++++++++++++++
>   xen/include/xen/smp.h          |  4 ++++
>   7 files changed, 54 insertions(+), 33 deletions(-)
> 
> diff --git a/xen/arch/arm/smp.c b/xen/arch/arm/smp.c
> index b372472188..85815aeda0 100644
> --- a/xen/arch/arm/smp.c
> +++ b/xen/arch/arm/smp.c
> @@ -44,6 +44,12 @@ void smp_send_call_function_mask(const cpumask_t *mask)
>       }
>   }
>   
> +/* ARM don't have SMT so we don't need any special logic for CPU disabling  */

Xen doesn't support SMT on Arm. But some of the cores may support SMT. 
So would reword this to:

"We currently don't support SMT"

Cheers,

-- 
Julien Grall



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Subject: Re: [PATCH v4 6/8] arm/sysctl: Implement cpu hotplug ops
Content-Language: en-GB
To: Mykyta Poturai ,
 "xen-devel@lists.xenproject.org" 
Cc: Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 "Daniel P. Smith" 
References: 
 <656cb01061f2ec726eb23784d01517a94117618e.1762939773.git.mykyta_poturai@epam.com>
From: Julien Grall 
In-Reply-To: <656cb01061f2ec726eb23784d01517a94117618e.1762939773.git.mykyta_poturai@epam.com>
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Hi,

On 12/11/2025 10:51, Mykyta Poturai wrote:
> Implement XEN_SYSCTL_CPU_HOTPLUG_{ONLINE,OFFLINE} calls to allow for
> enabling/disabling CPU cores in runtime.
> 
> For now this operations only support Arm64. For proper Arm32 support,
> there needs to be a mechanism to free per-cpu page tables, allocated in
> init_domheap_mappings.
> Also, hotplug is not supported if ITS, FFA, or TEE is enabled, as they
> use non-static IRQ actions.
> 
> Create a Kconfig option RUNTIME_CPU_CONTROL that reflects this
> constraints.
> 
> Signed-off-by: Mykyta Poturai 
> 
> v3->v4:
> * don't reimplement cpu_up/down helpers
> * add Kconfig option
> * fixup formatting
> 
> v2->v3:
> * no changes
> 
> v1->v2:
> * remove SMT ops
> * remove cpu == 0 checks
> * add XSM hooks
> * only implement for 64bit Arm
> ---
>   xen/arch/arm/Kconfig  |  4 ++++
>   xen/arch/arm/sysctl.c | 32 ++++++++++++++++++++++++++++++++
>   2 files changed, 36 insertions(+)
> 
> diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
> index cf6af68299..931ae51575 100644
> --- a/xen/arch/arm/Kconfig
> +++ b/xen/arch/arm/Kconfig
> @@ -274,6 +274,10 @@ config PCI_PASSTHROUGH
>   	help
>   	  This option enables PCI device passthrough
>   
> +config RUNTIME_CPU_CONTROL
> +    def_bool y
> +    depends on ARM_64 && !TEE && !FFA && !HAS_ITS
> +
>   endmenu
>   
>   menu "ARM errata workaround via the alternative framework"
> diff --git a/xen/arch/arm/sysctl.c b/xen/arch/arm/sysctl.c
> index 32cab4feff..3c4e29d82c 100644
> --- a/xen/arch/arm/sysctl.c
> +++ b/xen/arch/arm/sysctl.c
> @@ -12,6 +12,7 @@
>   #include 
>   #include 
>   #include 
> +#include 
>   #include 
>   #include 
>   
> @@ -23,6 +24,33 @@ void arch_do_physinfo(struct xen_sysctl_physinfo *pi)
>                                          XEN_SYSCTL_PHYSCAP_ARM_SVE_MASK);
>   }
>   
> +static long cpu_hotplug_sysctl(struct xen_sysctl_cpu_hotplug *hotplug)

As you moved the helper in common code. I was expecting the logic to 
handle CPU_HOTPLUG_ONLINE and CPU_HOTPLUG_OFFLINE to also move in 
common. Can you explain why this wasn't done?

> +{
> +#ifdef CONFIG_RUNTIME_CPU_CONTROL
> +    int ret;
> +
> +    switch ( hotplug->op )
> +    {
> +    case XEN_SYSCTL_CPU_HOTPLUG_ONLINE:
> +        ret = xsm_resource_plug_core(XSM_HOOK);
> +        if ( ret )
> +            return ret;
> +        return continue_hypercall_on_cpu(0, cpu_up_helper, _p(hotplug->cpu));
> +
> +    case XEN_SYSCTL_CPU_HOTPLUG_OFFLINE:
> +        ret = xsm_resource_unplug_core(XSM_HOOK);
> +        if ( ret )
> +            return ret;
> +        return continue_hypercall_on_cpu(0, cpu_down_helper, _p(hotplug->cpu));
> +
> +    default:
> +        return -EOPNOTSUPP;
> +    }
> +#else
> +    return -EOPNOTSUPP;
> +#endif
> +}
> +
>   long arch_do_sysctl(struct xen_sysctl *sysctl,
>                       XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
>   {
> @@ -34,6 +62,10 @@ long arch_do_sysctl(struct xen_sysctl *sysctl,
>           ret = dt_overlay_sysctl(&sysctl->u.dt_overlay);
>           break;
>   
> +    case XEN_SYSCTL_cpu_hotplug:
> +        ret = cpu_hotplug_sysctl(&sysctl->u.cpu_hotplug);
> +        break;
> +
>       default:
>           ret = -ENOSYS;
>           break;

Cheers,

-- 
Julien Grall



From xen-devel-bounces@lists.xenproject.org Sun Nov 16 11:43:15 2025
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Subject: Re: [PATCH v4 8/8] docs: Document CPU hotplug
Content-Language: en-GB
To: Mykyta Poturai ,
 "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Jan Beulich ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini 
References: 
 <48bafdb8e6269a3d958065c6a1062ce2736632a0.1762939773.git.mykyta_poturai@epam.com>
From: Julien Grall 
In-Reply-To: <48bafdb8e6269a3d958065c6a1062ce2736632a0.1762939773.git.mykyta_poturai@epam.com>
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Hi,

On 12/11/2025 10:51, Mykyta Poturai wrote:
> Signed-off-by: Mykyta Poturai 
> 
> v3->v4:
> * update configuration section
> 
> v2->v3:
> * patch introduced
> ---
>   docs/misc/cpu-hotplug.txt | 51 +++++++++++++++++++++++++++++++++++++++
>   1 file changed, 51 insertions(+)
>   create mode 100644 docs/misc/cpu-hotplug.txt
> 
> diff --git a/docs/misc/cpu-hotplug.txt b/docs/misc/cpu-hotplug.txt
> new file mode 100644
> index 0000000000..1fbad0ecf7
> --- /dev/null
> +++ b/docs/misc/cpu-hotplug.txt
> @@ -0,0 +1,51 @@
> +CPU Hotplug
> +===========
> +
> +CPU hotplug is a feature that allows pCPU cores to be added to or removed from a
> +running system without requiring a reboot. It is supported on x86 and Arm64
> +architectures.

"supported" usually implies that we will backport fixes and issues XSA. 
Is this what you intended to say?

Asking because SUPPORT.md has the following:

### ACPI CPU Hotplug

     Status, x86: Experimental

There is also no mention for Arm in SUPPORT.md. As you enable the 
feature, we should clarify what's its state.
	> +
> +Implementation Details
> +----------------------
> +
> +CPU hotplug is implemented through the `XEN_SYSCTL_CPU_HOTPLUG_*` sysctl calls.
> +The specific calls are:
> +
> +- `XEN_SYSCTL_CPU_HOTPLUG_ONLINE`: Brings a pCPU online
> +- `XEN_SYSCTL_CPU_HOTPLUG_OFFLINE`: Takes a pCPU offline
> +- `XEN_SYSCTL_CPU_HOTPLUG_SMT_ENABLE`: Enables SMT threads (x86 only)
> +- `XEN_SYSCTL_CPU_HOTPLUG_SMT_DISABLE`: Disables SMT threads (x86 only)
> +
> +All cores can be disabled, assuming hardware support, except for core 0. Sysctl
> +calls are routed to core 0 before doing any actual up/down operations on other
> +cores.
> +
> +Configuration
> +-------------
> +
> +Sysctl handlers are enabled unconditionally on x86 architecture. On Arm64,
> +handlers are enabled by default when ITS, FFA, and TEE configs are disabled.
> +Building of the userspace tool "hptool" is controlled by the "hptool" flag in
> +the configure script. It is enabled by default and can be disabled with
> +--disable-hptool command line option.
> +
> +Usage
> +-----
> +
> +Disable core:
> +
> +$ xen-hptool cpu-offline 2
> +Prepare to offline CPU 2
> +(XEN) Removing cpu 2 from runqueue 0
> +CPU 2 offlined successfully
> +
> +Enable core:
> +
> +$ xen-hptool cpu-online 2
> +Prepare to online CPU 2
> +(XEN) Bringing up CPU2
> +(XEN) GICv3: CPU2: Found redistributor in region 0 @00000a004005c000
> +(XEN) CPU2: Guest atomics will try 1 times before pausing the domain
> +(XEN) CPU 2 booted.
> +(XEN) Adding cpu 2 to runqueue 0
> +CPU 2 onlined successfully

Cheers,

-- 
Julien Grall



From xen-devel-bounces@lists.xenproject.org Sun Nov 16 11:49:20 2025
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Subject: Re: [PATCH] libfdt: Replace hardcoded FDT version numbers with macros
Content-Language: en-GB
To: Dmytro Prokopchuk1 ,
 "xen-devel@lists.xenproject.org" 
Cc: Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel 
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From: Julien Grall 
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Hi,

On 13/11/2025 10:36, Dmytro Prokopchuk1 wrote:
> Replace all hardcoded FDT version numbers (such as 16 and 17, or 0x10 and 0x11)
> with the macros FDT_LAST_COMPATIBLE_VERSION and FDT_LAST_SUPPORTED_VERSION
> throughout the Xen device tree and libfdt code.
> 
> This avoids magic numbers and makes the Xen codebase more robust to future FDT
> version changes.
 > > Signed-off-by: Dmytro Prokopchuk 
> ---
>   xen/common/device-tree/device-tree.c |  2 +-
>   xen/common/libfdt/fdt.c              |  8 +++++---
>   xen/common/libfdt/fdt_ro.c           | 13 +++++++------
>   xen/common/libfdt/fdt_rw.c           | 16 ++++++++--------

While I appreciate the goal, libfdt/ is meant to be a verbatim copy of 
the [1]. I would like to keep it like that (backports would be 
acceptable). So if you want to make any change, then it first needs to 
be merged in the upstream repo.

Cheers,

[1] https://github.com/dgibson/dtc/tree/main/libfdt

-- 
Julien Grall



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Subject: Re: [PATCH v2] xen/arm: Use FDT_MAGIC from libfdt instead of local
 macro
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To: Dmytro Prokopchuk1 ,
 "xen-devel@lists.xenproject.org" 
Cc: Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk 
References: <92efc0f0bb286ceeb8788a8900bac9f9f1ed9613.1762940762.git.dmytro_prokopchuk1@epam.com>
From: Julien Grall 
In-Reply-To: <92efc0f0bb286ceeb8788a8900bac9f9f1ed9613.1762940762.git.dmytro_prokopchuk1@epam.com>
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Hi,

On 12/11/2025 09:50, Dmytro Prokopchuk1 wrote:
> Remove the redundant local 'DTB_MAGIC' definition and replace its usage
> with the canonical 'FDT_MAGIC' from 'libfdt'.
> 
> Amends: 66edeb2e3972 (arm: copy DTB appended to zImage)
> Signed-off-by: Dmytro Prokopchuk 

Acked-by: Julien Grall 

Cheers,

-- 
Julien Grall



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Subject: Re: [PATCH] xen/arm: gicv3: initialize eSPI unconditionally
Content-Language: en-GB
To: Leonid Komarianskyi ,
 "xen-devel@lists.xenproject.org" 
Cc: Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Julien Grall 
References: <70927412079d26973fda7025b99c566e03217aa7.1759222404.git.leonid_komarianskyi@epam.com>
From: Julien Grall 
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Hi,

On 30/09/2025 10:00, Leonid Komarianskyi wrote:
> Since the firmware may initialize eSPIs before Xen, and without
> CONFIG_GICV3_ESPI enabled, Xen would not reinitialize them properly
> during boot. In such cases, once the GIC is re-enabled in Xen,
> interrupts may be received that cannot be handled.
> 
> To ensure proper operation on hardware with eSPI feature, even when the eSPI
> config is disabled, gicv3_dist_espi_common_init() should be invoked
> regardless of whether CONFIG_GICV3_ESPI is enabled or not. This will not
> affect hardware without eSPI support, as the function checks if the
> hardware supports eSPIs by reading the GICD_TYPER.ESPI field (using
> GICD_TYPER_ESPIS_NUM macro), which indicates whether the extended SPI
> range is supported. If the hardware does not support eSPI, the function
> will not perform any actions.
> 
> There are no functional changes for setups where CONFIG_GICV3_ESPI=y.
> 
> Signed-off-by: Leonid Komarianskyi 
> Suggested-by: Julien Grall 

Usually tags are ordered chronologically. So this tag would need to 
appear first. I can fix that while committing.

Acked-by: Julien Grall 

Cheers,

-- 
Julien Grall



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Subject: Re: [XEN PATCH] xen/arm/p2m: perform IPA-based TLBI for arm64 when
 IPA is known
Content-Language: en-GB
To: Haseeb Ashraf ,
 xen-devel@lists.xenproject.org, Bertrand Marquis 
Cc: Haseeb Ashraf ,
 Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Dan Driscoll ,
 Noor Ahsan Khawaja ,
 Fahad Arslan ,
 Andrew Bachtel ,
 Mohamed Mediouni 
References: <20251105124727.142272-1-haseebashraf091@gmail.com>
From: Julien Grall 
In-Reply-To: <20251105124727.142272-1-haseebashraf091@gmail.com>
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Hi Haseeb,

On 05/11/2025 12:47, Haseeb Ashraf wrote:
> From: Haseeb Ashraf 
> 
> This commit addresses a major issue for running Xen on KVM arm64 i.e.
> costly emulation of VMALLS12E1IS which becomes worse when this TLBI
> is invoked too many times. There are mainly two places where this is
> problematic:
> (a) When vCPUs switch on a pCPU or pCPUs
> (b) When domu mapped pages onto dom0, are to be unmapped, then each
>      page being removed by XENMEM_remove_from_physmap has its TLBs
>      invalidated by VMALLS12E1IS.
> 
> The first one is addressed by relaxing VMALLS12E1IS -> VMALLE1IS.
> Each CPU have their own private TLBs, so flush between vCPU of the
> same domains is required to avoid translations from vCPUx to "leak"
> to the vCPUy.

This doesn't really tell me why we don't need the flush the S2. The key 
point is (barring altp2m) the stage-2 is common between all the vCPUs of 
a VM.

> This can be achieved by using VMALLE1. If FEAT_nTLBPA
> is present then VMALLE1 can also be avoided.

I had a look at the Arm Arm and I can't figure out why it is fine to 
skip the flush. Can you provide a pointer? BTW, in general, it is useful 
to quote the Arm Arm for the reviewer and future reader. It makes easier 
to find what you are talking about.

> 
> The second one is addressed by using IPA-based TLBI (IPAS2E1) in
> combination with VMALLE1 whenever the IPA range is known instead of
> using VMALLS12E1. Again, VMALLE1 can be avoided FEAT_nTLBPA is
> present.
> 
> Suggested-by: Mohamed Mediouni 
> Suggested-by: Julien Grall 
> Signed-off-by: Haseeb Ashraf 
> ---
>   xen/arch/arm/include/asm/arm64/flushtlb.h | 34 ++++++++
>   xen/arch/arm/include/asm/arm64/sysregs.h  |  1 +
>   xen/arch/arm/include/asm/cpufeature.h     |  3 +-
>   xen/arch/arm/include/asm/mmu/p2m.h        |  4 +
>   xen/arch/arm/include/asm/processor.h      |  2 +
>   xen/arch/arm/mmu/p2m.c                    | 96 ++++++++++++++++++++++-
>   6 files changed, 136 insertions(+), 4 deletions(-)
> 
> diff --git a/xen/arch/arm/include/asm/arm64/flushtlb.h b/xen/arch/arm/include/asm/arm64/flushtlb.h
> index 3b99c11b50..6703aab8a7 100644
> --- a/xen/arch/arm/include/asm/arm64/flushtlb.h
> +++ b/xen/arch/arm/include/asm/arm64/flushtlb.h
> @@ -45,6 +45,27 @@ static inline void name(void)                    \
>           : : : "memory");                         \
>   }
>   
> +/*
> + * FLush TLB by IPA. This will likely be used in a loop, so the caller
> + * is responsible to use the appropriate memory barriers before/after
> + * the sequence.

If the goal is to call TLB_HELPER_IPA() in a loop, then the current 
implementation is too expensive.

If the CPU doesn't need the repeat TLBI workaround, then you only need 
to do the dsb; isb once.

If the CPU need the repeat TLBI workaround, looking at the Cortex A76 
errata doc (https://developer.arm.com/documentation/SDEN885749/latest/) 
then I think you might be able to do:

"Flush TLBs"
"DSB"
"ISB"
"Flush TLBs"
"DSB"
"ISB"

Bertrand, what do you think?

> + *
> + * See above about the ARM64_WORKAROUND_REPEAT_TLBI sequence.
> + */
 > +#define TLB_HELPER_IPA(name, tlbop)              \> +static inline 
void name(paddr_t ipa)             \
> +{                                                \
> +    asm volatile(                                \
> +        "tlbi "  # tlbop  ", %0;"                \
> +        ALTERNATIVE(                             \
> +            "nop; nop;",                         \
> +            "dsb  ish;"                          \
> +            "tlbi "  # tlbop  ", %0;",           \
> +            ARM64_WORKAROUND_REPEAT_TLBI,        \
> +            CONFIG_ARM64_WORKAROUND_REPEAT_TLBI) \
> +        : : "r" (ipa >> PAGE_SHIFT) : "memory"); \
> +}
> +
>   /*
>    * FLush TLB by VA. This will likely be used in a loop, so the caller
>    * is responsible to use the appropriate memory barriers before/after
> @@ -72,6 +93,18 @@ TLB_HELPER(flush_guest_tlb_local, vmalls12e1, nsh)
>   /* Flush innershareable TLBs, current VMID only */
>   TLB_HELPER(flush_guest_tlb, vmalls12e1is, ish)
>   
> +/* Flush local TLBs, current VMID, stage-1 only */
> +TLB_HELPER(flush_guest_tlb_s1_local, vmalle1, nsh)
> +
> +/* Flush innershareable TLBs, current VMID, stage-1 only */
> +TLB_HELPER(flush_guest_tlb_s1, vmalle1is, ish)
> +
> +/* Flush local TLBs, current VMID, stage-2 for ipa address */
> +TLB_HELPER_IPA(flush_guest_tlb_one_s2_local, ipas2e1)
> +
> +/* Flush innershareable TLBs, current VMID, stage-2 for ipa address */
> +TLB_HELPER_IPA(flush_guest_tlb_one_s2, ipas2e1is)
> +
>   /* Flush local TLBs, all VMIDs, non-hypervisor mode */
>   TLB_HELPER(flush_all_guests_tlb_local, alle1, nsh)
>   
> @@ -88,6 +121,7 @@ TLB_HELPER_VA(__flush_xen_tlb_one_local, vae2)
>   TLB_HELPER_VA(__flush_xen_tlb_one, vae2is)
>   
>   #undef TLB_HELPER
> +#undef TLB_HELPER_IPA
>   #undef TLB_HELPER_VA
>   
>   #endif /* __ASM_ARM_ARM64_FLUSHTLB_H__ */
> diff --git a/xen/arch/arm/include/asm/arm64/sysregs.h b/xen/arch/arm/include/asm/arm64/sysregs.h
> index 7440d495e4..30a7c3b9fd 100644
> --- a/xen/arch/arm/include/asm/arm64/sysregs.h
> +++ b/xen/arch/arm/include/asm/arm64/sysregs.h
> @@ -286,6 +286,7 @@
>   
>   /* id_aa64mmfr1 */
>   #define ID_AA64MMFR1_ECBHB_SHIFT     60
> +#define ID_AA64MMFR1_NTLBPA_SHIFT    48
>   #define ID_AA64MMFR1_AFP_SHIFT       44
>   #define ID_AA64MMFR1_ETS_SHIFT       36
>   #define ID_AA64MMFR1_TWED_SHIFT      32
> diff --git a/xen/arch/arm/include/asm/cpufeature.h b/xen/arch/arm/include/asm/cpufeature.h
> index b6df188011..21df7603fc 100644
> --- a/xen/arch/arm/include/asm/cpufeature.h
> +++ b/xen/arch/arm/include/asm/cpufeature.h
> @@ -269,7 +269,8 @@ struct cpuinfo_arm {
>               unsigned long ets:4;
>               unsigned long __res1:4;
>               unsigned long afp:4;
> -            unsigned long __res2:12;
> +            unsigned long ntlbpa:4;
> +            unsigned long __res2:8;
>               unsigned long ecbhb:4;
>   
>               /* MMFR2 */
> diff --git a/xen/arch/arm/include/asm/mmu/p2m.h b/xen/arch/arm/include/asm/mmu/p2m.h
> index 58496c0b09..fc2e08bbe8 100644
> --- a/xen/arch/arm/include/asm/mmu/p2m.h
> +++ b/xen/arch/arm/include/asm/mmu/p2m.h
> @@ -10,6 +10,10 @@ extern unsigned int p2m_root_level;
>   
>   struct p2m_domain;
>   void p2m_force_tlb_flush_sync(struct p2m_domain *p2m);
> +#ifdef CONFIG_ARM_64

We should also handle Arm 32-bit. Barring nTLBA, the code should be the 
same.

> +void p2m_force_tlb_flush_range_sync(struct p2m_domain *p2m, uint64_t start_ipa,
> +                                    uint64_t page_count);
> +#endif
>   void p2m_tlb_flush_sync(struct p2m_domain *p2m);
>   
>   void p2m_clear_root_pages(struct p2m_domain *p2m);
> diff --git a/xen/arch/arm/include/asm/processor.h b/xen/arch/arm/include/asm/processor.h
> index 92c8bc1a31..07f6a2ef6a 100644
> --- a/xen/arch/arm/include/asm/processor.h
> +++ b/xen/arch/arm/include/asm/processor.h
> @@ -461,6 +461,8 @@
>   #ifdef CONFIG_ARM_64
>   #define MM64_VMID_8_BITS_SUPPORT    0x0
>   #define MM64_VMID_16_BITS_SUPPORT   0x2
> +#define MM64_NTLBPA_SUPPORT_NI      0x0
> +#define MM64_NTLBPA_SUPPORT_IMP     0x1
>   #endif
>   
>   #ifndef __ASSEMBLY__
> diff --git a/xen/arch/arm/mmu/p2m.c b/xen/arch/arm/mmu/p2m.c
> index 51abf3504f..28268fb67f 100644
> --- a/xen/arch/arm/mmu/p2m.c
> +++ b/xen/arch/arm/mmu/p2m.c
> @@ -235,7 +235,12 @@ void p2m_restore_state(struct vcpu *n)
>        * when running multiple vCPU of the same domain on a single pCPU.
>        */
>       if ( *last_vcpu_ran != INVALID_VCPU_ID && *last_vcpu_ran != n->vcpu_id )
> +#ifdef CONFIG_ARM_64
> +        if ( system_cpuinfo.mm64.ntlbpa != MM64_NTLBPA_SUPPORT_IMP )

If we decide to use nTLBA, then we should introduce a capability so the 
check can be patched at aboot time.

> +            flush_guest_tlb_s1_local();
> +#else
>           flush_guest_tlb_local();
> +#endif
>   
>       *last_vcpu_ran = n->vcpu_id;
>   }
> @@ -293,6 +298,75 @@ void p2m_force_tlb_flush_sync(struct p2m_domain *p2m)
>       p2m->need_flush = false;
>   }
>   
> +#ifdef CONFIG_ARM_64
> +/*
> + * Force a synchronous P2M TLB flush on a range of addresses.
> + *
> + * Must be called with the p2m lock held.
> + */
> +void p2m_force_tlb_flush_range_sync(struct p2m_domain *p2m, uint64_t start_ipa,
> +                                    uint64_t page_count)
> +{
> +    unsigned long flags = 0;
> +    uint64_t ovttbr;
> +    uint64_t ipa = start_ipa;
> +    uint64_t i;
> +
> +    ASSERT(p2m_is_write_locked(p2m));
> +
> +    /*
> +     * ARM only provides an instruction to flush TLBs for the current
> +     * VMID. So switch to the VTTBR of a given P2M if different.
> +     */
> +    ovttbr = READ_SYSREG64(VTTBR_EL2);
> +    if ( ovttbr != p2m->vttbr )
> +    {
> +        uint64_t vttbr;
> +
> +        local_irq_save(flags);
> +
> +        /*
> +         * ARM64_WORKAROUND_AT_SPECULATE: We need to stop AT to allocate
> +         * TLBs entries because the context is partially modified. We
> +         * only need the VMID for flushing the TLBs, so we can generate
> +         * a new VTTBR with the VMID to flush and the empty root table.
> +         */
> +        if ( !cpus_have_const_cap(ARM64_WORKAROUND_AT_SPECULATE) )
> +            vttbr = p2m->vttbr;
> +        else
> +            vttbr = generate_vttbr(p2m->vmid, empty_root_mfn);
> +
> +        WRITE_SYSREG64(vttbr, VTTBR_EL2);
> +
> +        /* Ensure VTTBR_EL2 is synchronized before flushing the TLBs */
> +        isb();
> +    }

I don't really like the idea to duplicate the AT speculation logic. 
Could we try to consolidate by introducing helper to load and unload the 
VTTBR?

> +
> +    /* Ensure prior page-tables updates have completed */
> +    dsb(ishst);
> +
> +    /* Invalidate stage-2 TLB entries by IPA range */
> +    for ( i = 0; i < page_count; i++ ) {
> +        flush_guest_tlb_one_s2(ipa);
> +        ipa += 1UL << PAGE_SHIFT;
> +    }

In theory, __p2m_set_entry() could modify large region. For 1GB region 
it means the loop would send 262144 TLB instructions. This seems quite a 
lot.

If the region is a superpage, then you might be able to send a single 
TLB instruction (need to confirm from the ARM ARM).

If the region contains multiple mapping, then I wonder whether it would 
be better to flush the full S2. Not sure what would be the threshold.

Bertrand, Michal, Stefano, any opinions?

> +
> +    if ( system_cpuinfo.mm64.ntlbpa != MM64_NTLBPA_SUPPORT_IMP )
> +        flush_guest_tlb_s1_local();
> +
> +    /* Ensure the TLB invalidation has completed */
> +    dsb(ishst);
> +
> +    if ( ovttbr != READ_SYSREG64(VTTBR_EL2) )
> +    {
> +        WRITE_SYSREG64(ovttbr, VTTBR_EL2);
> +        /* Ensure VTTBR_EL2 is back in place before continuing. */
> +        isb();
> +        local_irq_restore(flags);
> +    }
> +}
> +#endif
> +
>   void p2m_tlb_flush_sync(struct p2m_domain *p2m)
>   {
>       if ( p2m->need_flush )
> @@ -1034,7 +1108,12 @@ static int __p2m_set_entry(struct p2m_domain *p2m,
>            * For more details see (D4.7.1 in ARM DDI 0487A.j).
>            */
>           p2m_remove_pte(entry, p2m->clean_pte);
> +#ifdef CONFIG_ARM_64
> +        p2m_force_tlb_flush_range_sync(p2m, gfn_x(sgfn) << PAGE_SHIFT,
> +                                       1UL << page_order);
> +#else
>           p2m_force_tlb_flush_sync(p2m);
> +#endif
>   
>           p2m_write_pte(entry, split_pte, p2m->clean_pte);
>   
> @@ -1090,8 +1169,13 @@ static int __p2m_set_entry(struct p2m_domain *p2m,
>           p2m_remove_pte(entry, p2m->clean_pte);
>   
>       if ( removing_mapping )
> +#ifdef CONFIG_ARM_64
> +        p2m_force_tlb_flush_range_sync(p2m, gfn_x(sgfn) << PAGE_SHIFT,
> +                                       1UL << page_order);
> +#else
>           /* Flush can be deferred if the entry is removed */
>           p2m->need_flush |= !!lpae_is_valid(orig_pte);
> +#endif

To emphasis on what I wrote above, this is one of the reason I would 
strongly prefer if we had support for p2m_force_flush_range_sync() on 
Arm 32-bit. This would make the code a lot simpler and easier to reason.

>       else
>       {
>           lpae_t pte = mfn_to_p2m_entry(smfn, t, a);
> @@ -1102,17 +1186,23 @@ static int __p2m_set_entry(struct p2m_domain *p2m,
>           /*
>            * It is necessary to flush the TLB before writing the new entry
>            * to keep coherency when the previous entry was valid.
> -         *
> -         * Although, it could be defered when only the permissions are
> -         * changed (e.g in case of memaccess).
>            */
>           if ( lpae_is_valid(orig_pte) )
>           {
> +#ifdef CONFIG_ARM_64
> +            p2m_force_tlb_flush_range_sync(p2m, gfn_x(sgfn) << PAGE_SHIFT,
> +                                           1UL << page_order);
> +#else
> +        /*
> +         * Although, flush could be defered when only the permissions are
> +         * changed (e.g in case of memaccess).
> +         */
>               if ( likely(!p2m->mem_access_enabled) ||
>                    P2M_CLEAR_PERM(pte) != P2M_CLEAR_PERM(orig_pte) )
>                   p2m_force_tlb_flush_sync(p2m);
>               else
>                   p2m->need_flush = true;
> +#endif
>           }
>           else if ( !p2m_is_valid(orig_pte) ) /* new mapping */
>               p2m->stats.mappings[level]++;

Cheers,

-- 
Julien Grall



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Date: Mon, 17 Nov 2025 09:35:18 +0100
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [for 4.22 v5 02/18] xen/riscv: introduce VMID allocation and
 manegement
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: 
 
 <7e9671b3-6972-45b8-9cba-4447fa802fe2@suse.com>
 
Content-Language: en-US
From: Jan Beulich 
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In-Reply-To: 
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On 14.11.2025 10:27, Oleksii Kurochko wrote:
> On 11/6/25 3:05 PM, Jan Beulich wrote:
>> On 20.10.2025 17:57, Oleksii Kurochko wrote:
>>> +void vmid_flush_hart(void)
>>> +{
>>> +    struct vmid_data *data = &this_cpu(vmid_data);
>>> +
>>> +    if ( !data->used )
>>> +        return;
>>> +
>>> +    if ( likely(++data->generation != 0) )
>>> +        return;
>>> +
>>> +    /*
>>> +     * VMID generations are 64 bit.  Overflow of generations never happens.
>>> +     * For safety, we simply disable ASIDs, so correctness is established; it
>>> +     * only runs a bit slower.
>>> +     */
>>> +    printk("%s: VMID generation overrun. Disabling VMIDs.\n", __func__);
>> Is logging of the function name of any value here?
> 
> Agree, there is no any sense for the logging of the function name.
> 
>>   Also, despite the x86
>> original havinbg it like this - generally no full stops please if log
>> messages. "VMID generation overrun; disabling VMIDs\n" would do.
> 
> Sure, I will drop it and will try to not add it in such cases. But could you
> please remind (if I asked that before) me what is the reason why full stop
> shouldn't be presented in such cases?

First: Consistency across the code base. Second: Meaningless characters
needlessly consume serial line bandwidth.

Jan


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Subject: Re: [for 4.22 v5 05/18] xen/riscv: add root page table allocation
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: 
 <81d36dc5277d4756442f3ad5d64f37148787394a.1760974017.git.oleksii.kurochko@gmail.com>
 <8e3b791c-22ca-43e2-a3bf-f440032ab1ed@suse.com>
 
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On 14.11.2025 11:53, Oleksii Kurochko wrote:
> On 11/6/25 3:25 PM, Jan Beulich wrote:
>> On 20.10.2025 17:57, Oleksii Kurochko wrote:
>>> --- a/xen/arch/riscv/p2m.c
>>> +++ b/xen/arch/riscv/p2m.c
>>> @@ -3,6 +3,7 @@
>>>   #include 
>>>   #include 
>>>   #include 
>>> +#include 
>>>   #include 
>>>   #include 
>>>   #include 
>>> @@ -103,6 +104,70 @@ void __init pre_gstage_init(void)
>>>       vmid_init();
>>>   }
>>>   
>>> +static void clear_and_clean_page(struct page_info *page, bool clean_dcache)
>>> +{
>>> +    clear_domain_page(page_to_mfn(page));
>>> +
>>> +    /*
>>> +     * If the IOMMU doesn't support coherent walks and the p2m tables are
>>> +     * shared between the CPU and IOMMU, it is necessary to clean the
>>> +     * d-cache.
>>> +     */
>>> +    if ( clean_dcache )
>>> +        clean_dcache_va_range(page, PAGE_SIZE);
>> This cleans part of frame_table[], but not the memory page in question.
> 
> Oh, right, we need to map the domain page first.
> 
> Would it make sense to avoid using|clear_domain_page()| in order to prevent
> calling|map_domain_page()| twice (once inside|clear_domain_page()| and once
> before|clean_dcache_va_range()|), and instead do it like this:
>      void *p = __map_domain_page(page);
> 
>      clear_page(p);
> 
>      /*
>       * If the IOMMU doesn't support coherent walks and the p2m tables are
>       * shared between the CPU and IOMMU, it is necessary to clean the
>       * d-cache.
>       */
>      if ( clean_dcache )
>          clean_dcache_va_range(p, PAGE_SIZE);
> 
>      unmap_domain_page(p);

Certainly.

>>> @@ -55,6 +76,39 @@ int paging_freelist_adjust(struct domain *d, unsigned long pages,
>>>       return 0;
>>>   }
>>>   
>>> +int paging_refill_from_domheap(struct domain *d, unsigned int nr_pages)
>>> +{
>>> +    ASSERT(spin_is_locked(&d->arch.paging.lock));
>>> +
>>> +    for ( unsigned int i = 0; i < nr_pages; i++ )
>>> +    {
>>> +        int rc = paging_add_page_to_freelist(d);
>> The anomaly is more pronounced here, with the other function name in context:
>> paging_refill_from_domheap() doesn't suggest there's a page (or several) being
>> handed to it. paging_add_page_to_freelist() suggests one of its parameter
>> would want to be struct page_info *. Within the naming model you chose, maybe
>> paging_refill_from_domheap_one() or paging_refill_one_from_domheap()? Or
>> simply _paging_refill_from_domheap()?
> 
> Thanks for suggestions. I like the option with "_*" as it is more clearly marks it
> as an internal helper without introducing "_one" suffix. I will use the same approach
> for paging_ret_page_to_domheap(): s/paging_ret_page_to_domheap/_paging_ret_to_domheap().
> 
> Shouldn't we use "__*" instead of "_*" or "__*" is reserved for something else? "__*" is
> used quite frequent in Xen code base.

And wrongly so. "__*" are reserved to the implementation (i.e. compiler / library).
Whereas "_*" (with the letter following the _ not being an upper-case one) is
dedicated to file scope identifiers. (That's mandated by the library part of the
spec, but imo we're well-advised to follow that, because even if we don't link to
any libraries, the compiler using certain symbols [e.g. __builtin_*()] is still
[potentially] getting in our way.)

Jan


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Date: Mon, 17 Nov 2025 09:56:27 +0100
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Subject: Re: [for 4.22 v5 10/18] xen/riscv: implement p2m_set_range()
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: 
 
 
 <3fc28006-4a03-4d95-8db3-71a7b3131f82@gmail.com>
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On 14.11.2025 18:04, Oleksii Kurochko wrote:
> On 11/10/25 3:53 PM, Jan Beulich wrote:
>> On 20.10.2025 17:57, Oleksii Kurochko wrote:
>>> +#define GFN_MASK(lvl) (P2M_PAGETABLE_ENTRIES(lvl) - 1UL)
>> If I'm not mistaken, this is a mask with the low 10 or 12 bits set.
> 
> I'm not sure I fully understand you here. With the current implementation,
> it returns a bitmask that corresponds to the number of index bits used
> at each level. So, if|P2M_ROOT_LEVEL = 2|, then:
>    |G||FN_MASK(0) = 0x1ff| (9-bit GFN for the level 0)
>    |GFN_MASK(1) = 0x1ff| (9-bit GFN width for level 1)
>    |GFN_MASK(2) = 0x7ff| (11-bit GFN width for level 2)

Oh, sorry, 9 and 11 bits is what I meant.

> Or do you mean that GFN_MASK(lvl) should return something like this:
>    |G||FN_MASK_(0) = 0x1FF000 (0x1ff << 0xc) GFN_MASK_(1) = 0x3FE00000 
> (GFN_MASK_(0)<<9) GFN_MASK_(2) = 0x1FFC0000000 (GFN_MASK_(1)<<9 + extra 
> 2 bits)

Yes.

> And then here ...|
> 
>> That's not really something you can apply to a GFN, unlike the name
>> suggests.
> 
> That is why virtual address should be properly shifted before, something
> like it is done in calc_offset():

Please can we stop calling guest physical addresses "virtual address"?

>    (va >> P2M_LEVEL_SHIFT(lvl)) & GFN_MASK(lvl);
> 
> ...
>   (va & GFN_MASK_(lvl)) >> P2M_LEVEL_SHIFT(lvl) ?
> In this option more shifts will be needed.

It's okay to try to limit the number of shifts needed, but the macros need
naming accordingly.

> Would it be better to just rename GFN_MASK() to P2M_PT_INDEX_MASK()? Or,
> maybe, even just P2M_INDEX_MASK().

Perhaps. I would recommend though that you take a looks at other ports'
naming. In x86, for example, we have l_table_offset().

>>> --- a/xen/arch/riscv/p2m.c
>>> +++ b/xen/arch/riscv/p2m.c
>>> @@ -9,6 +9,7 @@
>>>   #include 
>>>   #include 
>>>   #include 
>>> +#include 
>>>   
>>>   #include 
>>>   #include 
>>> @@ -17,6 +18,43 @@
>>>   #include 
>>>   
>>>   unsigned char __ro_after_init gstage_mode;
>>> +unsigned int __ro_after_init gstage_root_level;
>> Like for mode, I'm unconvinced of this being a global (and not per-P2M /
>> per-domain).
> 
> The question is then if we really will (or want to) have cases when gstage
> mode will be different per-domain/per-p2m?

Can you explain to me why you think we wouldn't want that, sooner or later?

>>> +/*
>>> + * The P2M root page table is extended by 2 bits, making its size 16KB
>>> + * (instead of 4KB for non-root page tables). Therefore, P2M root page
>>> + * is allocated as four consecutive 4KB pages (since alloc_domheap_pages()
>>> + * only allocates 4KB pages).
>>> + */
>>> +#define ENTRIES_PER_ROOT_PAGE \
>>> +    (P2M_PAGETABLE_ENTRIES(P2M_ROOT_LEVEL) / P2M_ROOT_ORDER)
>>> +
>>> +static inline unsigned int calc_offset(unsigned int lvl, vaddr_t va)
>> Where would a vaddr_t come from here? Your input are guest-physical addresses,
>> if I'm not mistaken.
> 
> You are right. Would it be right to 'paddr_t gpa' here? Or paddr_t is supposed to use
> only with machine physical address?

In x86 we use paddr_t in such cases. Arm iirc additionally has gaddr_t.

>>> +#define P2M_MAX_ROOT_LEVEL 4
>>> +
>>> +#define P2M_DECLARE_OFFSETS(var, addr) \
>>> +    unsigned int var[P2M_MAX_ROOT_LEVEL] = {-1};\
>>> +    for ( unsigned int i = 0; i <= gstage_root_level; i++ ) \
>>> +        var[i] = calc_offset(i, addr);
>> This surely is more than just "declare", and it's dealing with all levels no
>> matter whether you actually will use all offsets.
> 
> I will rename|P2M_DECLARE_OFFSETS| to|P2M_BUILD_LEVEL_OFFSETS()|.
> 
> But how can I know which offset I will actually need to use?
> If we take the following loop as an example:
>    |for( level = P2M_ROOT_LEVEL; level > target; level-- ) { ||/* ||* Don't try to allocate intermediate page tables if the mapping ||* is about to be removed. ||*/ ||rc = p2m_next_level(p2m, !removing_mapping, ||level, &table, offsets[level]); ||... ||} |It walks from|P2M_ROOT_LEVEL| down to|target|, where|target| is determined at runtime.
> 
> If you mean that, for example, when the G-stage mode is Sv39, there is no need to allocate
> an array with 4 entries (or 5 entries if we consider Sv57, so P2M_MAX_ROOT_LEVEL should be
> updated), because Sv39 only uses 3 page table levels — then yes, in theory it could be
> smaller. But I don't think it is a real issue if the|offsets[]| array on the stack has a
> few extra unused entries.
> 
> If preferred, Icould allocate the array dynamically based on|gstage_root_level|.
> Would that be better?

Having a few unused entries isn't a big deal imo. What I'm not happy with here is
that you may _initialize_ more entries than actually needed. I have no good
suggestion within the conceptual framework you use for page walking (the same
issue iirc exists in host page table walks, just that the calculations there are
cheaper).

Jan


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Subject: Re: [PATCH v2] ioreq: Check for out of bounds vCPU ID
To: Teddy Astie 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Julian Vetter , xen-devel@lists.xenproject.org
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On 14.11.2025 17:32, Teddy Astie wrote:
> A 4K page appears to be able to hold 128 ioreq entries, which luckly
> matches the current vCPU limit. However, if we decide to increase the
> vCPU limit, that doesn't hold anymore and this function would now
> silently fetch a out of bounds pointer.
> 
> All architectures have no more than 128 as vCPU limit on HVM guests,
> and have pages that are at most 4 KB, so this case doesn't occurs in
> with the current limits.

DYM "at least 4 KB"? If there was an arch with 2k pages but 128 vCPU limit,
it would be affected, wouldn't it?

> Make sure that out of bounds attempts are reported and adjust the around
> logic to at worst crash the offending domain instead.

Wouldn't we better prevent creation of such guests? And point out the need
to adjust code by a build-time check?

> --- a/xen/common/ioreq.c
> +++ b/xen/common/ioreq.c
> @@ -100,7 +100,14 @@ static ioreq_t *get_ioreq(struct ioreq_server *s, struct vcpu *v)
>      ASSERT((v == current) || !vcpu_runnable(v));
>      ASSERT(p != NULL);
>  
> -    return &p->vcpu_ioreq[v->vcpu_id];
> +    if ( likely(v->vcpu_id < (PAGE_SIZE / sizeof(struct ioreq))) )
> +        return &p->vcpu_ioreq[v->vcpu_id];

Imo you then also need to use array_access_nospec() here.

> +    else
> +    {
> +        gprintk(XENLOG_ERR, "Out of bounds vCPU %pv in ioreq server\n", v);
> +        WARN();
> +        return NULL;
> +    }
>  }

While I'm generally arguing against such needless uses of "else", this one
is imo a particularly bad example. The brace-enclosed scope give the strong
(but misleading) impression that the function is lacking a trailing "return".

Jan


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Subject: Re: [XEN][PATCH] common/libfdt: optimize usage
To: Grygorii Strashko 
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Andrew Cooper ,
 Anthony PERARD ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Alejandro Vallejo ,
 Jason Andryuk ,
 "xen-devel@lists.xenproject.org" 
References: <20251114180130.346755-1-grygorii_strashko@epam.com>
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From: Jan Beulich 
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On 14.11.2025 19:01, Grygorii Strashko wrote:
> From: Grygorii Strashko 
> 
> Now all libfdt features are built-it unconditionally, but...
> 
> X86: The libfdt is used on x86 only to parse Hyperlaunch/dom0less Xen
> nodes, so full libfdt is not needed in this case and minimal, RO
> configuration can be used.
> 
> ARM - situation is more complicated:
> 1) ARM reads Host DT (fdt.c RO)
> 2) ARM reads passthrough DT (RO)
> 3) ARM generates dom0/hwdom DT from Host DT (there is a mix of WIP and SW APIs)
> 4) ARM generates domU DT (there is a mix of WIP and SW APIs)
> 4) With EFI enabled - ARM needs RW API and fdt_empty_tree
> 5) With CONFIG_OVERLAY_DTB - ARM needs RW and fdt_overlay API

This goes too far, imo.

> --- /dev/null
> +++ b/xen/common/libfdt/Kconfig
> @@ -0,0 +1,14 @@
> +config LIBFDT_WIP
> +	bool
> +
> +config LIBFDT_SW
> +    bool
> +
> +config LIBFDT_RW
> +    bool
> +
> +config LIBFDT_EMPTY_TREE
> +    bool
> +
> +config LIBFDT_OVERLAY
> +    bool

Nit: Inconsistent indentation.

Also, how would one be to guess which of these may need selecting? What do
"WIP", "SW", and "RW" stand for? What exactly would "empty tree" mean? Yes,
you follow what the files are named under libfdt/, but that naming is
overly cryptic, too. The comments at the top of these files also don't
say anything helpful.

Jan


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Subject: Re: [XEN][PATCH] common/libfdt: optimize usage
From: Jan Beulich 
To: Grygorii Strashko 
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Andrew Cooper ,
 Anthony PERARD ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Alejandro Vallejo ,
 Jason Andryuk ,
 "xen-devel@lists.xenproject.org" 
References: <20251114180130.346755-1-grygorii_strashko@epam.com>
 <0557029f-5946-4ee1-a622-842e2698a6c8@suse.com>
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On 17.11.2025 10:31, Jan Beulich wrote:
> On 14.11.2025 19:01, Grygorii Strashko wrote:
>> From: Grygorii Strashko 
>>
>> Now all libfdt features are built-it unconditionally, but...
>>
>> X86: The libfdt is used on x86 only to parse Hyperlaunch/dom0less Xen
>> nodes, so full libfdt is not needed in this case and minimal, RO
>> configuration can be used.
>>
>> ARM - situation is more complicated:
>> 1) ARM reads Host DT (fdt.c RO)
>> 2) ARM reads passthrough DT (RO)
>> 3) ARM generates dom0/hwdom DT from Host DT (there is a mix of WIP and SW APIs)
>> 4) ARM generates domU DT (there is a mix of WIP and SW APIs)
>> 4) With EFI enabled - ARM needs RW API and fdt_empty_tree
>> 5) With CONFIG_OVERLAY_DTB - ARM needs RW and fdt_overlay API
> 
> This goes too far, imo.

The more that, unless OVERLAY_DTB=y, all code and data moves to .init.*. Is
coverage in in .init.* really of as much concern as runtime code/data?

Jan


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On 14.11.2025 16:24, Andrew Cooper wrote:
> Link: https://git.kernel.org/tip/dd14022a7ce96963aa923e35cf4bcc8c32f95840
> Fixes: ff8228ab4658 ("x86/ucode: Relax digest check when Entrysign is fixed in firmware")
> Signed-off-by: Andrew Cooper 

Acked-by: Jan Beulich 

> ---
> CC: Jan Beulich 
> CC: Roger Pau Monné 
> CC: Oleksii Kurochko 
> 
> Found because AMD have released ucode to fix RDSEED on this CPU, and I
> cross-referenced the tables.

I wonder how many more we're going to see.

Jan


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On 15.11.2025 00:21, Jason Andryuk wrote:
> On 2025-11-14 09:44, Grygorii Strashko wrote:
>> From: Grygorii Strashko 
>>
>> Now Xen supports only two paging modes: HAP and SHADOW, so
>> !paging_mode_hap() is actually means paging_mode_shadow().

For HVM, that is. For PV both could produce "false". Luckily the code
changes are all in line with that, but somewhere this detail wants
mentioning imo (as it's also not part of the patch subject). Happy to
make a small adjustment while committing; then ...

>> For an abstract, future case of there being a 3rd paging mode it is also
>> better to explicitly mention checked paging mode (SHADOW) instead of using
>> negative check of another paging mode (HAP).
>>
>> Hence, s/!paging_mode_hap()/paging_mode_shadow() which also allows DCE drop
>> unused code when SHADOW_PAGING=n.
>> The !paging_mode_hap() in hap.c not changed as HAP is checking for itself
>> to be enabled.
>>
>> Inspired by [1].
>>
>> [1] https://patchwork.kernel.org/project/xen-devel/patch/20251111200958.3576341-3-grygorii_strashko@epam.com/
>> Signed-off-by: Grygorii Strashko 
> 
> Reviewed-by: Jason Andryuk 

Acked-by: Jan Beulich 

Jan


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From: "Teddy Astie" 
Subject: =?utf-8?Q?Re:=20[PATCH=20v2]=20ioreq:=20Check=20for=20out=20of=20bounds=20vCPU=20ID?=
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Le 17/11/2025 =C3=A0 10:29, Jan Beulich a =C3=A9crit=C2=A0:
> On 14.11.2025 17:32, Teddy Astie wrote:
>> A 4K page appears to be able to hold 128 ioreq entries, which luckly
>> matches the current vCPU limit. However, if we decide to increase the
>> vCPU limit, that doesn't hold anymore and this function would now
>> silently fetch a out of bounds pointer.
>>
>> All architectures have no more than 128 as vCPU limit on HVM guests,
>> and have pages that are at most 4 KB, so this case doesn't occurs in
>> with the current limits.
> 
> DYM "at least 4 KB"? If there was an arch with 2k pages but 128 vCPU limi=
t,
> it would be affected, wouldn't it?
> 

Yes, made some typo here

>> Make sure that out of bounds attempts are reported and adjust the around
>> logic to at worst crash the offending domain instead.
> 
> Wouldn't we better prevent creation of such guests? And point out the nee=
d
> to adjust code by a build-time check?
> 

So overall just

diff --git a/xen/common/ioreq.c b/xen/common/ioreq.c
index f5fd30ce12..7a0421cc07 100644
--- a/xen/common/ioreq.c
+++ b/xen/common/ioreq.c
@@ -99,6 +99,7 @@ static ioreq_t *get_ioreq(struct ioreq_server *s, 
struct vcpu *v)

      ASSERT((v =3D=3D current) || !vcpu_runnable(v));
      ASSERT(p !=3D NULL);
+    BUILD_BUG_ON(HVM_MAX_VCPUS > (PAGE_SIZE / sizeof(struct ioreq)));

      return &p->vcpu_ioreq[v->vcpu_id];
  }

>> --- a/xen/common/ioreq.c
>> +++ b/xen/common/ioreq.c
>> @@ -100,7 +100,14 @@ static ioreq_t *get_ioreq(struct ioreq_server *s, s=
truct vcpu *v)
>>       ASSERT((v =3D=3D current) || !vcpu_runnable(v));
>>       ASSERT(p !=3D NULL);
>>   
>> -    return &p->vcpu_ioreq[v->vcpu_id];
>> +    if ( likely(v->vcpu_id < (PAGE_SIZE / sizeof(struct ioreq))) )
>> +        return &p->vcpu_ioreq[v->vcpu_id];
> 
> Imo you then also need to use array_access_nospec() here.
> 
>> +    else
>> +    {
>> +        gprintk(XENLOG_ERR, "Out of bounds vCPU %pv in ioreq server\n",=
 v);
>> +        WARN();
>> +        return NULL;
>> +    }
>>   }
> 
> While I'm generally arguing against such needless uses of "else", this on=
e
> is imo a particularly bad example. The brace-enclosed scope give the stro=
ng
> (but misleading) impression that the function is lacking a trailing "retu=
rn".
> 
> Jan
> 




--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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Date: Mon, 17 Nov 2025 12:36:29 +0100
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Subject: Re: [for 4.22 v5 11/18] xen/riscv: Implement p2m_free_subtree() and
 related helpers
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
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 <24928a25f63f81ee72b78830306881b2c4c5a1e4.1760974017.git.oleksii.kurochko@gmail.com>
 
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From: Oleksii Kurochko 
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On 11/10/25 4:29 PM, Jan Beulich wrote:
> On 20.10.2025 17:57, Oleksii Kurochko wrote:
>> --- a/xen/arch/riscv/include/asm/p2m.h
>> +++ b/xen/arch/riscv/include/asm/p2m.h
>> @@ -110,6 +110,8 @@ typedef enum {
>>       p2m_mmio_direct_io, /* Read/write mapping of genuine Device MMIO area,
>>                              PTE_PBMT_IO will be used for such mappings */
>>       p2m_ext_storage,    /* Following types'll be stored outsude PTE bits: */
>> +    p2m_map_foreign_rw, /* Read/write RAM pages from foreign domain */
>> +    p2m_map_foreign_ro, /* Read-only RAM pages from foreign domain */
>>   
>>       /* Sentinel — not a real type, just a marker for comparison */
>>       p2m_first_external = p2m_ext_storage,
>> @@ -120,15 +122,28 @@ static inline p2m_type_t arch_dt_passthrough_p2m_type(void)
>>       return p2m_mmio_direct_io;
>>   }
>>   
>> +/*
>> + * Bits 8 and 9 are reserved for use by supervisor software;
>> + * the implementation shall ignore this field.
>> + * We are going to use to save in these bits frequently used types to avoid
>> + * get/set of a type from radix tree.
>> + */
>> +#define P2M_TYPE_PTE_BITS_MASK  0x300
> Better use PTE_RSW in place of the raw number?

It would be better, thanks.

>
>> --- a/xen/arch/riscv/p2m.c
>> +++ b/xen/arch/riscv/p2m.c
>> @@ -17,6 +17,8 @@
>>   #include 
>>   #include 
>>   
>> +#define P2M_SUPPORTED_LEVEL_MAPPING 2
> I fear without a comment it's left unclear what this is / represents.

Probably just renaming it to|P2M_MAX_SUPPORTED_LEVEL_MAPPING| would make it clearer,
wouldn’t it?
Otherwise, I can add the following comment:
/*
  * At the moment, only 4K, 2M, and 1G mappings are supported for G-stage
  * translation. Therefore, the maximum supported page-table level is 2,
  * which corresponds to 1G mappings.
  */



>
>> @@ -403,11 +415,147 @@ static int p2m_next_level(struct p2m_domain *p2m, bool alloc_tbl,
>>       return P2M_TABLE_MAP_NONE;
>>   }
>>   
>> +static void p2m_put_foreign_page(struct page_info *pg)
>> +{
>> +    /*
>> +     * It’s safe to call put_page() here because arch_flush_tlb_mask()
>> +     * will be invoked if the page is reallocated, which will trigger a
>> +     * flush of the guest TLBs.
>> +     */
>> +    put_page(pg);
>> +}
>> +
>> +/* Put any references on the single 4K page referenced by mfn. */
> To me this and ...
>
>> +static void p2m_put_4k_page(mfn_t mfn, p2m_type_t type)
>> +{
>> +    /* TODO: Handle other p2m types */
>> +
>> +    if ( p2m_is_foreign(type) )
>> +    {
>> +        ASSERT(mfn_valid(mfn));
>> +        p2m_put_foreign_page(mfn_to_page(mfn));
>> +    }
>> +}
>> +
>> +/* Put any references on the superpage referenced by mfn. */
> ... to a lesser degree this comment are potentially misleading. Down here at
> least there is something plural-ish (the 4k pages that the 2M one consists
> of), but especially for the single page case above "any" could easily mean
> "anything that's still outstanding, anywhere". I'm also not quite sure "on"
> is really what you mean (I'm not a native speaker, so my gut feeling may be
> wrong here).

Then I could suggest the following instead:
   /* Put the reference associated with the 4K page identified by mfn. */
and
  /* Put the references associated with the superpage identified by mfn. */

I think the comments could be omitted, since the function names already make
this clear.

>
>> +static void p2m_put_2m_superpage(mfn_t mfn, p2m_type_t type)
>> +{
>> +    struct page_info *pg;
>> +    unsigned int i;
>> +
>> +    /*
>> +     * TODO: Handle other p2m types, but be aware that any changes to handle
>> +     * different types should require an update on the relinquish code to
>> +     * handle preemption.
>> +     */
> I guess if I was to address this TODO, I wouldn't know what the latter part
> of the sentence is warning me of.

It is referencing to the code which isn't introduced yet, something like Arm has
in|relinquish_p2m_mapping()|:
   https://gitlab.com/xen-project/xen/-/blob/staging/xen/arch/arm/mmu/p2m.c#L1588
I am not 100% sure that this comment is useful now (as|relinquish_p2m_mapping() isn't introduced yet), so I am okay just to 
drop it and add it when ||relinquish_p2m_mapping() will be introduced.|


>
>> +    if ( !p2m_is_foreign(type) )
>> +        return;
> Are super-page foreign mappings actually intended to be permitted, conceptually?

Good question. Conceptually, yes (and I thought that was the reason why ARM has
code to handle such cases and so I decided to have the same for RISC-V), but in
reality, it will be 4 KB pages, as I can see in the current codebase for other
architectures.

>
>>   /* Free pte sub-tree behind an entry */
>>   static void p2m_free_subtree(struct p2m_domain *p2m,
>>                                pte_t entry, unsigned int level)
>>   {
>> -    panic("%s: hasn't been implemented yet\n", __func__);
>> +    unsigned int i;
>> +    pte_t *table;
>> +    mfn_t mfn;
>> +    struct page_info *pg;
>> +
>> +    /*
>> +     * Check if the level is valid: only 4K - 2M - 1G mappings are supported.
>> +     * To support levels > 2, the implementation of p2m_free_subtree() would
>> +     * need to be updated, as the current recursive approach could consume
>> +     * excessive time and memory.
>> +     */
>> +    ASSERT(level <= P2M_SUPPORTED_LEVEL_MAPPING);
>> +
>> +    /* Nothing to do if the entry is invalid. */
>> +    if ( !pte_is_valid(entry) )
>> +        return;
>> +
>> +    if ( (level == 0) || pte_is_superpage(entry, level) )
> Considering what pte_is_superpage() expands to, simply pte_is_mapping()?

Makes sense, we can really just have:
  if ( pte_is_mapping(entry) )

>
>> +    {
>> +        p2m_type_t p2mt = p2m_get_type(entry);
>> +
>> +#ifdef CONFIG_IOREQ_SERVER
>> +        /*
>> +         * If this gets called then either the entry was replaced by an entry
>> +         * with a different base (valid case) or the shattering of a superpage
>> +         * has failed (error case).
>> +         * So, at worst, the spurious mapcache invalidation might be sent.
>> +         */
>> +        if ( p2m_is_ram(p2mt) &&
>> +             domain_has_ioreq_server(p2m->domain) )
>> +            ioreq_request_mapcache_invalidate(p2m->domain);
>> +#endif
>> +
>> +        p2m_put_page(entry, level, p2mt);
>> +
>> +        return;
>> +    }
>> +
>> +    table = map_domain_page(pte_get_mfn(entry));
>> +    for ( i = 0; i < P2M_PAGETABLE_ENTRIES(level); i++ )
>> +        p2m_free_subtree(p2m, table[i], level - 1);
>> +
>> +    unmap_domain_page(table);
> Please can the use of blank lines in such cases be symmetric: Either have them
> ahead of and after the loop, or have them nowhere?
>
>> @@ -435,7 +583,7 @@ static int p2m_set_entry(struct p2m_domain *p2m,
>>        * Check if the level target is valid: we only support
>>        * 4K - 2M - 1G mapping.
>>        */
>> -    ASSERT(target <= 2);
>> +    ASSERT(target <= P2M_SUPPORTED_LEVEL_MAPPING);
> Ah, this is where that constant comes into play. It wants moving to the earlier
> patch, and with this being the purpose I guess it also wants to include MAX in
> its name.

Regarding MAX it is what I came up to in my reply somewhere above, so then lets
just add "MAX".

~ Oleksii

--------------V6mKv6hgrgibcKtaBVf7Ty0a
Content-Type: text/html; charset=UTF-8
Content-Transfer-Encoding: 8bit



  
    
  
  
    


    

    
On 11/10/25 4:29 PM, Jan Beulich wrote:

    

    

      
On 20.10.2025 17:57, Oleksii Kurochko wrote:


      

        
--- a/xen/arch/riscv/include/asm/p2m.h
+++ b/xen/arch/riscv/include/asm/p2m.h
@@ -110,6 +110,8 @@ typedef enum {
     p2m_mmio_direct_io, /* Read/write mapping of genuine Device MMIO area,
                            PTE_PBMT_IO will be used for such mappings */
     p2m_ext_storage,    /* Following types'll be stored outsude PTE bits: */
+    p2m_map_foreign_rw, /* Read/write RAM pages from foreign domain */
+    p2m_map_foreign_ro, /* Read-only RAM pages from foreign domain */
 
     /* Sentinel — not a real type, just a marker for comparison */
     p2m_first_external = p2m_ext_storage,
@@ -120,15 +122,28 @@ static inline p2m_type_t arch_dt_passthrough_p2m_type(void)
     return p2m_mmio_direct_io;
 }
 
+/*
+ * Bits 8 and 9 are reserved for use by supervisor software;
+ * the implementation shall ignore this field.
+ * We are going to use to save in these bits frequently used types to avoid
+ * get/set of a type from radix tree.
+ */
+#define P2M_TYPE_PTE_BITS_MASK  0x300


      

      
Better use PTE_RSW in place of the raw number?

    

    
It would be better, thanks.



    

      



      

        
--- a/xen/arch/riscv/p2m.c
+++ b/xen/arch/riscv/p2m.c
@@ -17,6 +17,8 @@
 #include <asm/riscv_encoding.h>
 #include <asm/vmid.h>
 
+#define P2M_SUPPORTED_LEVEL_MAPPING 2


      

      
I fear without a comment it's left unclear what this is / represents.

    

    
Probably just renaming it to P2M_MAX_SUPPORTED_LEVEL_MAPPING would make it clearer,
wouldn’t it?
Otherwise, I can add the following comment:
/*
 * At the moment, only 4K, 2M, and 1G mappings are supported for G-stage
 * translation. Therefore, the maximum supported page-table level is 2,
 * which corresponds to 1G mappings.
 */




    


    

    

      



      

        
@@ -403,11 +415,147 @@ static int p2m_next_level(struct p2m_domain *p2m, bool alloc_tbl,
     return P2M_TABLE_MAP_NONE;
 }
 
+static void p2m_put_foreign_page(struct page_info *pg)
+{
+    /*
+     * It’s safe to call put_page() here because arch_flush_tlb_mask()
+     * will be invoked if the page is reallocated, which will trigger a
+     * flush of the guest TLBs.
+     */
+    put_page(pg);
+}
+
+/* Put any references on the single 4K page referenced by mfn. */


      

      
To me this and ...



      

        
+static void p2m_put_4k_page(mfn_t mfn, p2m_type_t type)
+{
+    /* TODO: Handle other p2m types */
+
+    if ( p2m_is_foreign(type) )
+    {
+        ASSERT(mfn_valid(mfn));
+        p2m_put_foreign_page(mfn_to_page(mfn));
+    }
+}
+
+/* Put any references on the superpage referenced by mfn. */


      

      
... to a lesser degree this comment are potentially misleading. Down here at
least there is something plural-ish (the 4k pages that the 2M one consists
of), but especially for the single page case above "any" could easily mean
"anything that's still outstanding, anywhere". I'm also not quite sure "on"
is really what you mean (I'm not a native speaker, so my gut feeling may be
wrong here).

    

    
Then I could suggest the following instead:
  /* Put the reference associated with the 4K page identified by mfn. */
and
 /* Put the references associated with the superpage identified by mfn. */

I think the comments could be omitted, since the function names already make
this clear.



    

      



      

        
+static void p2m_put_2m_superpage(mfn_t mfn, p2m_type_t type)
+{
+    struct page_info *pg;
+    unsigned int i;
+
+    /*
+     * TODO: Handle other p2m types, but be aware that any changes to handle
+     * different types should require an update on the relinquish code to
+     * handle preemption.
+     */


      

      
I guess if I was to address this TODO, I wouldn't know what the latter part
of the sentence is warning me of.

    

    
It is referencing to the code which isn't introduced yet, something like Arm has
in relinquish_p2m_mapping():
  https://gitlab.com/xen-project/xen/-/blob/staging/xen/arch/arm/mmu/p2m.c#L1588
I am not 100% sure that this comment is useful now (as relinquish_p2m_mapping()
isn't introduced yet), so I am okay just to drop it and add it when
relinquish_p2m_mapping() will be introduced.

    


    

    

      



      

        
+    if ( !p2m_is_foreign(type) )
+        return;


      

      
Are super-page foreign mappings actually intended to be permitted, conceptually?

    

    
Good question. Conceptually, yes (and I thought that was the reason why ARM has
code to handle such cases and so I decided to have the same for RISC-V), but in
reality, it will be 4 KB pages, as I can see in the current codebase for other
architectures.



    

      



      

        
 /* Free pte sub-tree behind an entry */
 static void p2m_free_subtree(struct p2m_domain *p2m,
                              pte_t entry, unsigned int level)
 {
-    panic("%s: hasn't been implemented yet\n", __func__);
+    unsigned int i;
+    pte_t *table;
+    mfn_t mfn;
+    struct page_info *pg;
+
+    /*
+     * Check if the level is valid: only 4K - 2M - 1G mappings are supported.
+     * To support levels > 2, the implementation of p2m_free_subtree() would
+     * need to be updated, as the current recursive approach could consume
+     * excessive time and memory.
+     */
+    ASSERT(level <= P2M_SUPPORTED_LEVEL_MAPPING);
+
+    /* Nothing to do if the entry is invalid. */
+    if ( !pte_is_valid(entry) )
+        return;
+
+    if ( (level == 0) || pte_is_superpage(entry, level) )


      

      
Considering what pte_is_superpage() expands to, simply pte_is_mapping()?

    

    
Makes sense, we can really just have:
 if ( pte_is_mapping(entry) )

    

      



      

        
+    {
+        p2m_type_t p2mt = p2m_get_type(entry);
+
+#ifdef CONFIG_IOREQ_SERVER
+        /*
+         * If this gets called then either the entry was replaced by an entry
+         * with a different base (valid case) or the shattering of a superpage
+         * has failed (error case).
+         * So, at worst, the spurious mapcache invalidation might be sent.
+         */
+        if ( p2m_is_ram(p2mt) &&
+             domain_has_ioreq_server(p2m->domain) )
+            ioreq_request_mapcache_invalidate(p2m->domain);
+#endif
+
+        p2m_put_page(entry, level, p2mt);
+
+        return;
+    }
+
+    table = map_domain_page(pte_get_mfn(entry));
+    for ( i = 0; i < P2M_PAGETABLE_ENTRIES(level); i++ )
+        p2m_free_subtree(p2m, table[i], level - 1);
+
+    unmap_domain_page(table);


      

      
Please can the use of blank lines in such cases be symmetric: Either have them
ahead of and after the loop, or have them nowhere?



      

        
@@ -435,7 +583,7 @@ static int p2m_set_entry(struct p2m_domain *p2m,
      * Check if the level target is valid: we only support
      * 4K - 2M - 1G mapping.
      */
-    ASSERT(target <= 2);
+    ASSERT(target <= P2M_SUPPORTED_LEVEL_MAPPING);


      

      
Ah, this is where that constant comes into play. It wants moving to the earlier
patch, and with this being the purpose I guess it also wants to include MAX in
its name.

    

    
Regarding MAX it is what I came up to in my reply somewhere above, so then lets
just add "MAX".

~ Oleksii

  


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On 17/11/2025 9:43 am, Jan Beulich wrote:
> On 14.11.2025 16:24, Andrew Cooper wrote:
>> Link: https://git.kernel.org/tip/dd14022a7ce96963aa923e35cf4bcc8c32f95840
>> Fixes: ff8228ab4658 ("x86/ucode: Relax digest check when Entrysign is fixed in firmware")
>> Signed-off-by: Andrew Cooper 
> Acked-by: Jan Beulich 

Thanks.

>> ---
>> CC: Jan Beulich 
>> CC: Roger Pau Monné 
>> CC: Oleksii Kurochko 
>>
>> Found because AMD have released ucode to fix RDSEED on this CPU, and I
>> cross-referenced the tables.
> I wonder how many more we're going to see.

I doubt this will be the last.

~Andrew


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Subject: Re: [for 4.22 v5 12/18] xen/riscv: Implement p2m_pte_from_mfn() and
 support PBMT configuration
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 11/10/25 5:22 PM, Jan Beulich wrote:
> On 20.10.2025 17:57, Oleksii Kurochko wrote:
>> This patch adds the initial logic for constructing PTEs from MFNs in the RISC-V
>> p2m subsystem. It includes:
>> - Implementation of p2m_pte_from_mfn(): Generates a valid PTE using the
>>    given MFN, p2m_type_t, including permission encoding and PBMT attribute
>>    setup.
>> - New helper p2m_set_permission(): Encodes access rights (r, w, x) into the
>>    PTE based on both p2m type and access permissions.
>> - p2m_set_type(): Stores the p2m type in PTE's bits. The storage of types,
>>    which don't fit PTE bits, will be implemented separately later.
>> - Add detection of Svade extension to properly handle a possible page-fault
>>    if A and D bits aren't set.
>>
>> PBMT type encoding support:
>> - Introduces an enum pbmt_type_t to represent the PBMT field values.
>> - Maps types like p2m_mmio_direct_dev to p2m_mmio_direct_io, others default
>>    to pbmt_pma.
>>
>> Signed-off-by: Oleksii Kurochko
>> ---
>> Changes in V5:
>>   - Moved setting of p2m_mmio_direct_io inside (!is_table) case in p2m_pte_from_mfn().
>>   - Extend comment about the place of setting A/D bits with explanation
>>     why it is done in this way for now.
>> ---
>> Changes in V4:
>>   - p2m_set_permission() updates:
>>     - Update permissions for p2m_ram_rw case, make it also executable.
>>     - Add pernissions setting for p2m_map_foreign_* types.
>>     - Drop setting peromissions for p2m_ext_storage.
>>     - Only turn off PTE_VALID bit for p2m_invalid, don't touch other bits.
>>   - p2m_pte_from_mfn() updates:
>>     - Update ASSERT(), add a check that mfn isn't INVALID_MFN (1)
>>       explicitly to avoid the case when PADDR_MASK isn't narrow enough to
>>       catch the case (1).
>>     - Drop unnessary check around call of p2m_set_type() as this check
>>       is already included inside p2m_set_type().
>>   - Introduce new p2m type p2m_first_external to detect that passed type
>>     is stored in external storage.
>>   - Add handling of PTE's A and D bits in pm2_set_permission. Also, set
>>     PTE_USER bit. For this cpufeatures.{h and c} were updated to be able
>>     to detect availability of Svade extension.
>>   - Drop grant table related code as it isn't going to be used at the moment.
>> ---
>> Changes in V3:
>>   - s/p2m_entry_from_mfn/p2m_pte_from_mfn.
>>   - s/pbmt_type_t/pbmt_type.
>>   - s/pbmt_max/pbmt_count.
>>   - s/p2m_type_radix_set/p2m_set_type.
>>   - Rework p2m_set_type() to handle only types which are fited into PTEs bits.
>>     Other types will be covered separately.
>>     Update arguments of p2m_set_type(): there is no any reason for p2m anymore.
>>   - p2m_set_permissions() updates:
>>     - Update the code in p2m_set_permission() for cases p2m_raw_rw and
>>       p2m_mmio_direct_io to set proper type permissions.
>>     - Add cases for p2m_grant_map_rw and p2m_grant_map_ro.
>>     - Use ASSERT_UNEACHABLE() instead of BUG() in switch cases of
>>       p2m_set_permissions.
>>     - Add blank lines non-fall-through case blocks in switch cases.
>>   - Set MFN before permissions are set in p2m_pte_from_mfn().
>>   - Update prototype of p2m_entry_from_mfn().
>> ---
>> Changes in V2:
>>   - New patch. It was a part of a big patch "xen/riscv: implement p2m mapping
>>     functionality" which was splitted to smaller.
>> ---
>>   xen/arch/riscv/cpufeature.c             |   1 +
>>   xen/arch/riscv/include/asm/cpufeature.h |   1 +
>>   xen/arch/riscv/include/asm/page.h       |   8 ++
>>   xen/arch/riscv/p2m.c                    | 112 +++++++++++++++++++++++-
>>   4 files changed, 118 insertions(+), 4 deletions(-)
>>
>> diff --git a/xen/arch/riscv/cpufeature.c b/xen/arch/riscv/cpufeature.c
>> index b846a106a3..02b68aeaa4 100644
>> --- a/xen/arch/riscv/cpufeature.c
>> +++ b/xen/arch/riscv/cpufeature.c
>> @@ -138,6 +138,7 @@ const struct riscv_isa_ext_data __initconst riscv_isa_ext[] = {
>>       RISCV_ISA_EXT_DATA(zbs),
>>       RISCV_ISA_EXT_DATA(smaia),
>>       RISCV_ISA_EXT_DATA(ssaia),
>> +    RISCV_ISA_EXT_DATA(svade),
>>       RISCV_ISA_EXT_DATA(svpbmt),
>>   };
>>   
>> diff --git a/xen/arch/riscv/include/asm/cpufeature.h b/xen/arch/riscv/include/asm/cpufeature.h
>> index 768b84b769..5f756c76db 100644
>> --- a/xen/arch/riscv/include/asm/cpufeature.h
>> +++ b/xen/arch/riscv/include/asm/cpufeature.h
>> @@ -37,6 +37,7 @@ enum riscv_isa_ext_id {
>>       RISCV_ISA_EXT_zbs,
>>       RISCV_ISA_EXT_smaia,
>>       RISCV_ISA_EXT_ssaia,
>> +    RISCV_ISA_EXT_svade,
>>       RISCV_ISA_EXT_svpbmt,
>>       RISCV_ISA_EXT_MAX
>>   };
>> diff --git a/xen/arch/riscv/include/asm/page.h b/xen/arch/riscv/include/asm/page.h
>> index 78e53981ac..4b6baeaaf2 100644
>> --- a/xen/arch/riscv/include/asm/page.h
>> +++ b/xen/arch/riscv/include/asm/page.h
>> @@ -73,6 +73,14 @@
>>   #define PTE_SMALL       BIT(10, UL)
>>   #define PTE_POPULATE    BIT(11, UL)
>>   
>> +enum pbmt_type {
>> +    pbmt_pma,
>> +    pbmt_nc,
>> +    pbmt_io,
>> +    pbmt_rsvd,
>> +    pbmt_count,
>> +};
>> +
>>   #define PTE_ACCESS_MASK (PTE_READABLE | PTE_WRITABLE | PTE_EXECUTABLE)
>>   
>>   #define PTE_PBMT_MASK   (PTE_PBMT_NOCACHE | PTE_PBMT_IO)
>> diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c
>> index 71b211410b..f4658e2560 100644
>> --- a/xen/arch/riscv/p2m.c
>> +++ b/xen/arch/riscv/p2m.c
>> @@ -11,6 +11,7 @@
>>   #include 
>>   #include 
>>   
>> +#include 
>>   #include 
>>   #include 
>>   #include 
>> @@ -349,6 +350,18 @@ static pte_t *p2m_get_root_pointer(struct p2m_domain *p2m, gfn_t gfn)
>>       return __map_domain_page(p2m->root + root_table_indx);
>>   }
>>   
>> +static int p2m_set_type(pte_t *pte, p2m_type_t t)
>> +{
>> +    int rc = 0;
>> +
>> +    if ( t > p2m_first_external )
>> +        panic("unimplemeted\n");
>> +    else
>> +        pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK);
>> +
>> +    return rc;
>> +}
>> +
>>   static p2m_type_t p2m_get_type(const pte_t pte)
>>   {
>>       p2m_type_t type = MASK_EXTR(pte.pte, P2M_TYPE_PTE_BITS_MASK);
>> @@ -379,11 +392,102 @@ static inline void p2m_clean_pte(pte_t *p, bool clean_pte)
>>       p2m_write_pte(p, pte, clean_pte);
>>   }
>>   
>> -static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t)
>> +static void p2m_set_permission(pte_t *e, p2m_type_t t)
>>   {
>> -    panic("%s: hasn't been implemented yet\n", __func__);
>> +    e->pte &= ~PTE_ACCESS_MASK;
>> +
>> +    e->pte |= PTE_USER;
>> +
>> +    /*
>> +     * Two schemes to manage the A and D bits are defined:
>> +     *   • The Svade extension: when a virtual page is accessed and the A bit
>> +     *     is clear, or is written and the D bit is clear, a page-fault
>> +     *     exception is raised.
>> +     *   • When the Svade extension is not implemented, the following scheme
>> +     *     applies.
>> +     *     When a virtual page is accessed and the A bit is clear, the PTE is
>> +     *     updated to set the A bit. When the virtual page is written and the
>> +     *     D bit is clear, the PTE is updated to set the D bit. When G-stage
>> +     *     address translation is in use and is not Bare, the G-stage virtual
>> +     *     pages may be accessed or written by implicit accesses to VS-level
>> +     *     memory management data structures, such as page tables.
> Can you point me at the part of the spec where this behavior is described?

Sure, it is mentioned here:
  https://github.com/riscv/riscv-isa-manual/blob/98ea4b5a409456ee28749748e1eafa8533c463bd/src/supervisor.adoc?plain=1#L1453

>   If
> things indeed work like this, ...
>
>> +     * Thereby to avoid a page-fault in case of Svade is available, it is
>> +     * necesssary to set A and D bits.
> ... I'd then agree with the "necessary" here. (Nit: note the extra 's' in your
> spelling.)

Oh, right.

Thanks.

~ Oleksii

--------------hBrUH0xIX0VKVjdil9R6jiHA
Content-Type: text/html; charset=UTF-8
Content-Transfer-Encoding: 8bit



  
    
  
  
    


    

    
On 11/10/25 5:22 PM, Jan Beulich wrote:

    

    

      
On 20.10.2025 17:57, Oleksii Kurochko wrote:


      

        
This patch adds the initial logic for constructing PTEs from MFNs in the RISC-V
p2m subsystem. It includes:
- Implementation of p2m_pte_from_mfn(): Generates a valid PTE using the
  given MFN, p2m_type_t, including permission encoding and PBMT attribute
  setup.
- New helper p2m_set_permission(): Encodes access rights (r, w, x) into the
  PTE based on both p2m type and access permissions.
- p2m_set_type(): Stores the p2m type in PTE's bits. The storage of types,
  which don't fit PTE bits, will be implemented separately later.
- Add detection of Svade extension to properly handle a possible page-fault
  if A and D bits aren't set.

PBMT type encoding support:
- Introduces an enum pbmt_type_t to represent the PBMT field values.
- Maps types like p2m_mmio_direct_dev to p2m_mmio_direct_io, others default
  to pbmt_pma.

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
Changes in V5:
 - Moved setting of p2m_mmio_direct_io inside (!is_table) case in p2m_pte_from_mfn().
 - Extend comment about the place of setting A/D bits with explanation
   why it is done in this way for now.
---
Changes in V4:
 - p2m_set_permission() updates:
   - Update permissions for p2m_ram_rw case, make it also executable.
   - Add pernissions setting for p2m_map_foreign_* types.
   - Drop setting peromissions for p2m_ext_storage.
   - Only turn off PTE_VALID bit for p2m_invalid, don't touch other bits.
 - p2m_pte_from_mfn() updates:
   - Update ASSERT(), add a check that mfn isn't INVALID_MFN (1)
     explicitly to avoid the case when PADDR_MASK isn't narrow enough to
     catch the case (1).
   - Drop unnessary check around call of p2m_set_type() as this check
     is already included inside p2m_set_type().
 - Introduce new p2m type p2m_first_external to detect that passed type
   is stored in external storage.
 - Add handling of PTE's A and D bits in pm2_set_permission. Also, set
   PTE_USER bit. For this cpufeatures.{h and c} were updated to be able
   to detect availability of Svade extension.
 - Drop grant table related code as it isn't going to be used at the moment.
---
Changes in V3:
 - s/p2m_entry_from_mfn/p2m_pte_from_mfn.
 - s/pbmt_type_t/pbmt_type.
 - s/pbmt_max/pbmt_count.
 - s/p2m_type_radix_set/p2m_set_type.
 - Rework p2m_set_type() to handle only types which are fited into PTEs bits.
   Other types will be covered separately.
   Update arguments of p2m_set_type(): there is no any reason for p2m anymore.
 - p2m_set_permissions() updates:
   - Update the code in p2m_set_permission() for cases p2m_raw_rw and
     p2m_mmio_direct_io to set proper type permissions.
   - Add cases for p2m_grant_map_rw and p2m_grant_map_ro.
   - Use ASSERT_UNEACHABLE() instead of BUG() in switch cases of
     p2m_set_permissions.
   - Add blank lines non-fall-through case blocks in switch cases.
 - Set MFN before permissions are set in p2m_pte_from_mfn().
 - Update prototype of p2m_entry_from_mfn().
---
Changes in V2:
 - New patch. It was a part of a big patch "xen/riscv: implement p2m mapping
   functionality" which was splitted to smaller.
---
 xen/arch/riscv/cpufeature.c             |   1 +
 xen/arch/riscv/include/asm/cpufeature.h |   1 +
 xen/arch/riscv/include/asm/page.h       |   8 ++
 xen/arch/riscv/p2m.c                    | 112 +++++++++++++++++++++++-
 4 files changed, 118 insertions(+), 4 deletions(-)

diff --git a/xen/arch/riscv/cpufeature.c b/xen/arch/riscv/cpufeature.c
index b846a106a3..02b68aeaa4 100644
--- a/xen/arch/riscv/cpufeature.c
+++ b/xen/arch/riscv/cpufeature.c
@@ -138,6 +138,7 @@ const struct riscv_isa_ext_data __initconst riscv_isa_ext[] = {
     RISCV_ISA_EXT_DATA(zbs),
     RISCV_ISA_EXT_DATA(smaia),
     RISCV_ISA_EXT_DATA(ssaia),
+    RISCV_ISA_EXT_DATA(svade),
     RISCV_ISA_EXT_DATA(svpbmt),
 };
 
diff --git a/xen/arch/riscv/include/asm/cpufeature.h b/xen/arch/riscv/include/asm/cpufeature.h
index 768b84b769..5f756c76db 100644
--- a/xen/arch/riscv/include/asm/cpufeature.h
+++ b/xen/arch/riscv/include/asm/cpufeature.h
@@ -37,6 +37,7 @@ enum riscv_isa_ext_id {
     RISCV_ISA_EXT_zbs,
     RISCV_ISA_EXT_smaia,
     RISCV_ISA_EXT_ssaia,
+    RISCV_ISA_EXT_svade,
     RISCV_ISA_EXT_svpbmt,
     RISCV_ISA_EXT_MAX
 };
diff --git a/xen/arch/riscv/include/asm/page.h b/xen/arch/riscv/include/asm/page.h
index 78e53981ac..4b6baeaaf2 100644
--- a/xen/arch/riscv/include/asm/page.h
+++ b/xen/arch/riscv/include/asm/page.h
@@ -73,6 +73,14 @@
 #define PTE_SMALL       BIT(10, UL)
 #define PTE_POPULATE    BIT(11, UL)
 
+enum pbmt_type {
+    pbmt_pma,
+    pbmt_nc,
+    pbmt_io,
+    pbmt_rsvd,
+    pbmt_count,
+};
+
 #define PTE_ACCESS_MASK (PTE_READABLE | PTE_WRITABLE | PTE_EXECUTABLE)
 
 #define PTE_PBMT_MASK   (PTE_PBMT_NOCACHE | PTE_PBMT_IO)
diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c
index 71b211410b..f4658e2560 100644
--- a/xen/arch/riscv/p2m.c
+++ b/xen/arch/riscv/p2m.c
@@ -11,6 +11,7 @@
 #include <xen/sections.h>
 #include <xen/xvmalloc.h>
 
+#include <asm/cpufeature.h>
 #include <asm/csr.h>
 #include <asm/flushtlb.h>
 #include <asm/paging.h>
@@ -349,6 +350,18 @@ static pte_t *p2m_get_root_pointer(struct p2m_domain *p2m, gfn_t gfn)
     return __map_domain_page(p2m->root + root_table_indx);
 }
 
+static int p2m_set_type(pte_t *pte, p2m_type_t t)
+{
+    int rc = 0;
+
+    if ( t > p2m_first_external )
+        panic("unimplemeted\n");
+    else
+        pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK);
+
+    return rc;
+}
+
 static p2m_type_t p2m_get_type(const pte_t pte)
 {
     p2m_type_t type = MASK_EXTR(pte.pte, P2M_TYPE_PTE_BITS_MASK);
@@ -379,11 +392,102 @@ static inline void p2m_clean_pte(pte_t *p, bool clean_pte)
     p2m_write_pte(p, pte, clean_pte);
 }
 
-static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t)
+static void p2m_set_permission(pte_t *e, p2m_type_t t)
 {
-    panic("%s: hasn't been implemented yet\n", __func__);
+    e->pte &= ~PTE_ACCESS_MASK;
+
+    e->pte |= PTE_USER;
+
+    /*
+     * Two schemes to manage the A and D bits are defined:
+     *   • The Svade extension: when a virtual page is accessed and the A bit
+     *     is clear, or is written and the D bit is clear, a page-fault
+     *     exception is raised.
+     *   • When the Svade extension is not implemented, the following scheme
+     *     applies.
+     *     When a virtual page is accessed and the A bit is clear, the PTE is
+     *     updated to set the A bit. When the virtual page is written and the
+     *     D bit is clear, the PTE is updated to set the D bit. When G-stage
+     *     address translation is in use and is not Bare, the G-stage virtual
+     *     pages may be accessed or written by implicit accesses to VS-level
+     *     memory management data structures, such as page tables.


      

      
Can you point me at the part of the spec where this behavior is described?

    

    
Sure, it is mentioned here:
 https://github.com/riscv/riscv-isa-manual/blob/98ea4b5a409456ee28749748e1eafa8533c463bd/src/supervisor.adoc?plain=1#L1453



    

      
 If
things indeed work like this, ...



      

        
+     * Thereby to avoid a page-fault in case of Svade is available, it is
+     * necesssary to set A and D bits.


      

      
... I'd then agree with the "necessary" here. (Nit: note the extra 's' in your
spelling.)

    

    
Oh, right.

Thanks.

~ Oleksii

  


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On 14.11.2025 13:54, Jürgen Groß wrote:
> On 14.11.25 12:42, Andrew Cooper wrote:
>> On 14/11/2025 11:32 am, Juergen Gross wrote:
>>> diff --git a/Config.mk b/Config.mk
>>> index e1556dfbfa..d21d67945a 100644
>>> --- a/Config.mk
>>> +++ b/Config.mk
>>> @@ -159,6 +159,19 @@ define move-if-changed
>>>   	if ! cmp -s $(1) $(2); then mv -f $(1) $(2); else rm -f $(1); fi
>>>   endef
>>>   
>>> +PATH_FILES := Paths
>>> +INC_FILES := $(foreach f, $(PATH_FILES), $(XEN_ROOT)/config/$(f).mk)
>>> +
>>> +include $(INC_FILES)
>>> +
>>> +BUILD_MAKE_VARS := $(foreach f, $(PATH_FILES), $(shell awk '$$2 == ":=" { print $$1; }' $(XEN_ROOT)/config/$(f).mk.in))
>>> +
>>> +# Replace @xxx@ markers in $(1).in with $(xxx) variable contents, write to $(1)
>>> +define apply-build-vars
>>> + $(1): $(1).in
>>> +	sed $$(foreach v, $$(BUILD_MAKE_VARS), -e 's#@$$(v)@#$$($$(v))#g') <$$< >$$@
>>> +endef
>>
>> Shouldn't this write to a tmp file, and use move-if-changed?  Most of
>> the time the markers won't have changed, and we'll want to short circuit
>> dependent rules.
> 
> I can see this being an advantage when e.g. generating header files, as
> those being generated again would potentially cause lots of rebuilds.
> 
> In this case I can hardly see any case where make wouldn't do the right
> thing already. Either the *.in file is newer than the generated file due
> to a git update or a manual edit, so make will regenerate the target (and
> this is what we want), or the *.in file hasn't changed, so make won't
> regenerate the file as it is newer than the *.in file already.
> 
> Or did I miss some aspect?

Aren't some of the generated files Makefile fragments? Them being re-generated
means make re-invoking itself, which could be avoided if the contents don't
really change. (This isn't just a performance concern; this re-invocation has
been the source of, well, surprising behavior in certain cases.)

Jan


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On 14.11.2025 12:32, Juergen Gross wrote:
> Add a new make macro for creating  from .in at build
> time. To be used like this:
> 
> $(foreach file,$(IN_FILES),$(eval $(call apply-build-vars,$(file))))
> 
> This can be used instead of the current approach to perform the similar
> step for file.in during ./configure.
> 
> This will avoid having to run ./configure just because of modifying a
> file depending on a variable set by configure.
> 
> Prepare to have multiple files as source for the replacement patterns.
> 
> Signed-off-by: Juergen Gross 
> ---
> V2:
> - don't use pattern rule, but create explicit dependency in macro,
>   don't require to rename source files (Jan Beulich, Andrew Cooper)
> ---
>  Config.mk | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/Config.mk b/Config.mk
> index e1556dfbfa..d21d67945a 100644
> --- a/Config.mk
> +++ b/Config.mk
> @@ -159,6 +159,19 @@ define move-if-changed
>  	if ! cmp -s $(1) $(2); then mv -f $(1) $(2); else rm -f $(1); fi
>  endef
>  
> +PATH_FILES := Paths
> +INC_FILES := $(foreach f, $(PATH_FILES), $(XEN_ROOT)/config/$(f).mk)
> +
> +include $(INC_FILES)

Is any of the above part of introducing the macro? "Paths" is already a
specific case of holding patterns that want replacing. In turn ...

> +BUILD_MAKE_VARS := $(foreach f, $(PATH_FILES), $(shell awk '$$2 == ":=" { print $$1; }' $(XEN_ROOT)/config/$(f).mk.in))

... it's not quite clear to me how it can be $(PATH_FILES) here.

> +# Replace @xxx@ markers in $(1).in with $(xxx) variable contents, write to $(1)
> +define apply-build-vars
> + $(1): $(1).in

This being indented by a space looks a little unusual.

Jan

> +	sed $$(foreach v, $$(BUILD_MAKE_VARS), -e 's#@$$(v)@#$$($$(v))#g') <$$< >$$@
> +endef
> +
>  CFLAGS += -fno-strict-aliasing
>  
>  CFLAGS += -std=gnu99



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Message-ID: 
Date: Mon, 17 Nov 2025 12:30:10 +0000
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v2 1/4] build: add make macro for making file from file.in
To: Jan Beulich , =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?=
 
Cc: Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
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On 17/11/2025 12:24 pm, Jan Beulich wrote:
> On 14.11.2025 13:54, Jürgen Groß wrote:
>> On 14.11.25 12:42, Andrew Cooper wrote:
>>> On 14/11/2025 11:32 am, Juergen Gross wrote:
>>>> diff --git a/Config.mk b/Config.mk
>>>> index e1556dfbfa..d21d67945a 100644
>>>> --- a/Config.mk
>>>> +++ b/Config.mk
>>>> @@ -159,6 +159,19 @@ define move-if-changed
>>>>   	if ! cmp -s $(1) $(2); then mv -f $(1) $(2); else rm -f $(1); fi
>>>>   endef
>>>>   
>>>> +PATH_FILES := Paths
>>>> +INC_FILES := $(foreach f, $(PATH_FILES), $(XEN_ROOT)/config/$(f).mk)
>>>> +
>>>> +include $(INC_FILES)
>>>> +
>>>> +BUILD_MAKE_VARS := $(foreach f, $(PATH_FILES), $(shell awk '$$2 == ":=" { print $$1; }' $(XEN_ROOT)/config/$(f).mk.in))
>>>> +
>>>> +# Replace @xxx@ markers in $(1).in with $(xxx) variable contents, write to $(1)
>>>> +define apply-build-vars
>>>> + $(1): $(1).in
>>>> +	sed $$(foreach v, $$(BUILD_MAKE_VARS), -e 's#@$$(v)@#$$($$(v))#g') <$$< >$$@
>>>> +endef
>>> Shouldn't this write to a tmp file, and use move-if-changed?  Most of
>>> the time the markers won't have changed, and we'll want to short circuit
>>> dependent rules.
>> I can see this being an advantage when e.g. generating header files, as
>> those being generated again would potentially cause lots of rebuilds.
>>
>> In this case I can hardly see any case where make wouldn't do the right
>> thing already. Either the *.in file is newer than the generated file due
>> to a git update or a manual edit, so make will regenerate the target (and
>> this is what we want), or the *.in file hasn't changed, so make won't
>> regenerate the file as it is newer than the *.in file already.
>>
>> Or did I miss some aspect?
> Aren't some of the generated files Makefile fragments? Them being re-generated
> means make re-invoking itself, which could be avoided if the contents don't
> really change. (This isn't just a performance concern; this re-invocation has
> been the source of, well, surprising behavior in certain cases.)

Having thought about this some more, it needs to be FORCE and
move-if-changed, or to express a dependency on Paths.mk

Otherwise, if you ./configure --libdir=something/else and then do an
incremental build, the generated files will be wrong.

~Andrew


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Subject: Re: [PATCH v2 2/4] docs: replace @xxx@ markers at build time
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Cc: Anthony PERARD ,
 Andrew Cooper , xen-devel@lists.xenproject.org
References: <20251114113238.9279-1-jgross@suse.com>
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On 14.11.2025 14:00, Jürgen Groß wrote:
> On 14.11.25 12:40, Andrew Cooper wrote:
>> On 14/11/2025 11:32 am, Juergen Gross wrote:
>>> diff --git a/docs/Makefile b/docs/Makefile
>>> index 37776d303c..e5f4a8ca86 100644
>>> --- a/docs/Makefile
>>> +++ b/docs/Makefile
>>> @@ -8,8 +8,11 @@ DATE		:= $(call date,"+%Y-%m-%d")
>>>   DOC_ARCHES      := arm ppc riscv x86_32 x86_64
>>>   MAN_SECTIONS    := 1 5 7 8
>>>   
>>> +IN_FILES := man/xl-disk-configuration.5.pod man/xl-network-configuration.5.pod
>>> +IN_FILES += man/xl.1.pod man/xl.cfg.5.pod man/xl.conf.5.pod
>>
>> Sorry, I meant to say this on the previous revision.  Can we please list
>> these one per line, for the future ease of inserting/removing.
> 
> Okay.
> 
>> Is IN_FILES really correct?  These are the generated (non-.in) files,
>> rather than the .in files themselves.  GEN_FILES from v1 would seem to
>> be a better fit.
> 
> I wanted to make clear this is related to *.in files. And IMHO GEN_FILES
> was too generic on a second thought.
> 
> GENERATED_FROM_IN_SUFFIXED_FILES seems a little bit clumsy. ;-)
> Seriously, if you have any better name, I'd be happy to use it.

GEN_POD_FILES, seeing they're all *.pod?

Jan


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From: "Teddy Astie" 
Subject: =?utf-8?Q?[PATCH=20v3]=20ioreq:=20Make=20sure=20ioreq=20is=20always=20in-bounds?=
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To: xen-devel@lists.xenproject.org
Cc: "Teddy Astie" , "Andrew Cooper" , "Anthony PERARD" , "Michal Orzel" , "Jan Beulich" , "Julien Grall" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Stefano Stabellini" , "Julian Vetter" 
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A 4K page appears to be able to hold 128 ioreq entries, which luckly
matches the current vCPU limit. However, if we decide to increase the
domain vCPU limit, that doesn't hold anymore and this function would now
silently create a out of bounds pointer leading to confusing problems.

All architectures with ioreq support don't support 128 vCPU limit for
HVM guests, and  have pages that are at least 4 KB large, so this case
doesn't occurs in with the current limits.

For the time being, make sure we can't make a Xen build that can
accidentally make a out of bounds pointers here.

No functional change.

Reported-by: Julian Vetter 
Signed-off-by: Teddy Astie 
---
v3:
 - make it a BUILD_BUG_ON instead (compile-time check)
v2:
 - check and report instead of ASSERT and eventually crash offending domain

 xen/common/ioreq.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/xen/common/ioreq.c b/xen/common/ioreq.c
index f5fd30ce12..7a0421cc07 100644
--- a/xen/common/ioreq.c
+++ b/xen/common/ioreq.c
@@ -99,6 +99,7 @@ static ioreq_t *get_ioreq(struct ioreq_server *s, struct vcpu *v)
 
     ASSERT((v == current) || !vcpu_runnable(v));
     ASSERT(p != NULL);
+    BUILD_BUG_ON(HVM_MAX_VCPUS > (PAGE_SIZE / sizeof(struct ioreq)));
 
     return &p->vcpu_ioreq[v->vcpu_id];
 }
-- 
2.51.2



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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Message-ID: <88e6b9d8-21b6-4b37-97fc-d35b90ed9b49@suse.com>
Date: Mon, 17 Nov 2025 13:37:36 +0100
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Subject: Re: [PATCH v2 1/4] build: add make macro for making file from file.in
To: Jan Beulich 
Cc: Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Andrew Cooper , xen-devel@lists.xenproject.org
References: <20251114113238.9279-1-jgross@suse.com>
 <20251114113238.9279-2-jgross@suse.com>
 <468c6686-43e5-4c35-8366-58558f199e22@citrix.com>
 
 <113c9cc1-5e39-4a54-88de-dd2b70b90a49@suse.com>
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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: Jan Beulich 
Cc: Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Andrew Cooper , xen-devel@lists.xenproject.org
Message-ID: <88e6b9d8-21b6-4b37-97fc-d35b90ed9b49@suse.com>
Subject: Re: [PATCH v2 1/4] build: add make macro for making file from file.in
References: <20251114113238.9279-1-jgross@suse.com>
 <20251114113238.9279-2-jgross@suse.com>
 <468c6686-43e5-4c35-8366-58558f199e22@citrix.com>
 
 <113c9cc1-5e39-4a54-88de-dd2b70b90a49@suse.com>
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Subject: Re: [PATCH v3] ioreq: Make sure ioreq is always in-bounds
To: Teddy Astie 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Julian Vetter , xen-devel@lists.xenproject.org
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On 17.11.2025 13:35, Teddy Astie wrote:
> A 4K page appears to be able to hold 128 ioreq entries, which luckly
> matches the current vCPU limit. However, if we decide to increase the
> domain vCPU limit, that doesn't hold anymore and this function would now
> silently create a out of bounds pointer leading to confusing problems.
> 
> All architectures with ioreq support don't support 128 vCPU limit for
> HVM guests, and  have pages that are at least 4 KB large, so this case
> doesn't occurs in with the current limits.
> 
> For the time being, make sure we can't make a Xen build that can
> accidentally make a out of bounds pointers here.
> 
> No functional change.
> 
> Reported-by: Julian Vetter 
> Signed-off-by: Teddy Astie 

I was meaning to ack this, but ...

> --- a/xen/common/ioreq.c
> +++ b/xen/common/ioreq.c
> @@ -99,6 +99,7 @@ static ioreq_t *get_ioreq(struct ioreq_server *s, struct vcpu *v)
>  
>      ASSERT((v == current) || !vcpu_runnable(v));
>      ASSERT(p != NULL);
> +    BUILD_BUG_ON(HVM_MAX_VCPUS > (PAGE_SIZE / sizeof(struct ioreq)));

... does this even build on e.g. Arm? IOREQ_SERVER is a setting which can be
enabled (with EXPERT=y) also for non-x86. Yet HVM_MAX_VCPUS looks to be an
x86-only thing. (I then also wonder about some of what the description says).

Just to mention (no further change requested at this point, in this regard):
HVM_MAX_VCPUS being part of the public interface, we'll need to see whether we
can sensibly retain that identifier to carry changed meaning once we up the
limit. The check here may therefore not trigger at that point; the hope then
is that while making respective changes, people would at least stumble across
it by e.g. seeing it in grep output.

Jan


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Message-ID: <7577ceec-1271-4569-91f1-fd7197a33991@suse.com>
Date: Mon, 17 Nov 2025 13:48:28 +0100
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Subject: Re: [PATCH v2 1/4] build: add make macro for making file from file.in
To: Jan Beulich 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <20251114113238.9279-1-jgross@suse.com>
 <20251114113238.9279-2-jgross@suse.com>
 <936632a3-d713-4183-b1db-5a554b617b74@suse.com>
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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: Jan Beulich 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
Message-ID: <7577ceec-1271-4569-91f1-fd7197a33991@suse.com>
Subject: Re: [PATCH v2 1/4] build: add make macro for making file from file.in
References: <20251114113238.9279-1-jgross@suse.com>
 <20251114113238.9279-2-jgross@suse.com>
 <936632a3-d713-4183-b1db-5a554b617b74@suse.com>
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Subject: Re: [PATCH v2 1/4] build: add make macro for making file from file.in
To: Andrew Cooper , Jan Beulich 
Cc: Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
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 <20251114113238.9279-2-jgross@suse.com>
 <468c6686-43e5-4c35-8366-58558f199e22@citrix.com>
 
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To: Andrew Cooper , Jan Beulich 
Cc: Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
Message-ID: <4e721924-d28b-4d7e-9aee-d55cd5e7878f@suse.com>
Subject: Re: [PATCH v2 1/4] build: add make macro for making file from file.in
References: <20251114113238.9279-1-jgross@suse.com>
 <20251114113238.9279-2-jgross@suse.com>
 <468c6686-43e5-4c35-8366-58558f199e22@citrix.com>
 
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Subject: Re: [PATCH v2 1/4] build: add make macro for making file from file.in
To: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
Cc: Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Andrew Cooper , xen-devel@lists.xenproject.org
References: <20251114113238.9279-1-jgross@suse.com>
 <20251114113238.9279-2-jgross@suse.com>
 <468c6686-43e5-4c35-8366-58558f199e22@citrix.com>
 
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From: Jan Beulich 
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On 17.11.2025 13:37, Jürgen Groß wrote:
> On 17.11.25 13:24, Jan Beulich wrote:
>> On 14.11.2025 13:54, Jürgen Groß wrote:
>>> On 14.11.25 12:42, Andrew Cooper wrote:
>>>> On 14/11/2025 11:32 am, Juergen Gross wrote:
>>>>> diff --git a/Config.mk b/Config.mk
>>>>> index e1556dfbfa..d21d67945a 100644
>>>>> --- a/Config.mk
>>>>> +++ b/Config.mk
>>>>> @@ -159,6 +159,19 @@ define move-if-changed
>>>>>    	if ! cmp -s $(1) $(2); then mv -f $(1) $(2); else rm -f $(1); fi
>>>>>    endef
>>>>>    
>>>>> +PATH_FILES := Paths
>>>>> +INC_FILES := $(foreach f, $(PATH_FILES), $(XEN_ROOT)/config/$(f).mk)
>>>>> +
>>>>> +include $(INC_FILES)
>>>>> +
>>>>> +BUILD_MAKE_VARS := $(foreach f, $(PATH_FILES), $(shell awk '$$2 == ":=" { print $$1; }' $(XEN_ROOT)/config/$(f).mk.in))
>>>>> +
>>>>> +# Replace @xxx@ markers in $(1).in with $(xxx) variable contents, write to $(1)
>>>>> +define apply-build-vars
>>>>> + $(1): $(1).in
>>>>> +	sed $$(foreach v, $$(BUILD_MAKE_VARS), -e 's#@$$(v)@#$$($$(v))#g') <$$< >$$@
>>>>> +endef
>>>>
>>>> Shouldn't this write to a tmp file, and use move-if-changed?  Most of
>>>> the time the markers won't have changed, and we'll want to short circuit
>>>> dependent rules.
>>>
>>> I can see this being an advantage when e.g. generating header files, as
>>> those being generated again would potentially cause lots of rebuilds.
>>>
>>> In this case I can hardly see any case where make wouldn't do the right
>>> thing already. Either the *.in file is newer than the generated file due
>>> to a git update or a manual edit, so make will regenerate the target (and
>>> this is what we want), or the *.in file hasn't changed, so make won't
>>> regenerate the file as it is newer than the *.in file already.
>>>
>>> Or did I miss some aspect?
>>
>> Aren't some of the generated files Makefile fragments? Them being re-generated
> 
> No.
> 
> Man-pages, shell scripts and some Ocaml files (one config file and one .ml file,
> which is similar to an include file I believe).
> 
>> means make re-invoking itself, which could be avoided if the contents don't
>> really change. (This isn't just a performance concern; this re-invocation has
>> been the source of, well, surprising behavior in certain cases.)
> 
> I still don't see a case where make would consider rebuilding the file from
> its .in file without the .in file having changed, thus resulting in the built
> file to change, too.

As Andrew indicated, Paths.mk might have changed, so at the very least an
explicit dependency would need adding. But as alluded to elsewhere, I'm not
quite convinced Paths.mk should be hard-coded as the sole source of patterns
in Config.mk. At the point further such file come into play, dealing with the
dependencies might get interesting / clumsy.

> Well, with one probably very rare exception: in case a
> different @marker@ is used in the .in file, but without changing the resulting
> file due to old and new marker resulting in the same output.
> 
> In case we really care about such cases, we should think about using
> move-if-changed everywhere, as e.g. building a program with $HOSTCC could
> result in an unchanged binary even with source files having changed, and the
> resulting program could be used to generate other files ...

For some of the cases this might actually be worthwhile. It all depends on
how much of a knock-on effect the re-building of a particular file has.

Jan


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Subject: Re: [PATCH v2 1/3] arm/mpu: Implement setup_mm for MPU systems
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On 12/11/2025 17:06, Luca Fancellu wrote:
> Hi Michal,
> 
>>>> +void __init setup_mm(void)
>>>> +{
>>>> +    const struct membanks *banks = bootinfo_get_mem();
>>>> +    paddr_t ram_start = INVALID_PADDR;
>>>> +    paddr_t ram_end = 0;
>>>> +    paddr_t ram_size = 0;
>>>> +    unsigned int i;
>>>> +
>>>> +    init_pdx();
>>>> +
>>>> +    for ( i = 0; i < banks->nr_banks; i++ )
>>>> +    {
>>>> +        const struct membank *bank = &banks->bank[i];
>>>> +        paddr_t bank_end = bank->start + bank->size;
>>>> +
>>>> +        ram_size = ram_size + bank->size;
>>>> +        ram_start = min(ram_start, bank->start);
>>>> +        ram_end = max(ram_end, bank_end);
>>>> +    }
>>>> +
>>>> +    total_pages = ram_size >> PAGE_SHIFT;
>>>> +
>>>> +    /*
>>>> +     * On MMU systems we need some memory to allocate the page-tables used for
>>>> +     * the directmap mappings.  But some regions may contain memory already
>>>> +     * allocated for other uses (e.g. modules, reserved-memory...).
>>>> +     *
>>>> +     * On MPU systems we need to pre-reserve regions that were allocated for
>>>> +     * other uses (e.g. modules, reserved-memory...).
>>> I'm not sure I understand this part of the comment with regards to
>>> populate_boot_allocator(). Could you please explain?
> 
> Maybe here we should just write that on MPU system we are populating the boot allocator with the
> static heap region, since static heap is mandatory for MPU.
> 
> What do you think?
The reason for the original comment was to explain why we need to call
populate_boot_allocator() that early (i.e. before setting up direct map and not
before setting up frametable). It's not about explaining why we need to populate
boot allocator because that is rather clear. In case of MPU I don't think there
is a reason for doing that early, so we might not need any reasoning.

~Michal



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On 17.11.2025 13:48, Jürgen Groß wrote:
> On 17.11.25 13:29, Jan Beulich wrote:
>> On 14.11.2025 12:32, Juergen Gross wrote:
>>> --- a/Config.mk
>>> +++ b/Config.mk
>>> @@ -159,6 +159,19 @@ define move-if-changed
>>>   	if ! cmp -s $(1) $(2); then mv -f $(1) $(2); else rm -f $(1); fi
>>>   endef
>>>   
>>> +PATH_FILES := Paths
>>> +INC_FILES := $(foreach f, $(PATH_FILES), $(XEN_ROOT)/config/$(f).mk)
>>> +
>>> +include $(INC_FILES)
>>
>> Is any of the above part of introducing the macro? "Paths" is already a
>> specific case of holding patterns that want replacing. In turn ...
>>
>>> +BUILD_MAKE_VARS := $(foreach f, $(PATH_FILES), $(shell awk '$$2 == ":=" { print $$1; }' $(XEN_ROOT)/config/$(f).mk.in))
>>
>> ... it's not quite clear to me how it can be $(PATH_FILES) here.
> 
> See patch 4.
> 
> PATH_FILES is specifying the .mk files containing the marker definitions.
> I need the ability to have multiple such files in order to be able to let
> tools/configure build its own definitions.

That's a good example - why would that affect the stubdom/ part of the tree?
Imo what pattern file(s) to use wants leaving to the invokee of the macro,
not pinning down globally for everyone.

Jan


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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: Jan Beulich 
Cc: Anthony PERARD ,
 Andrew Cooper , xen-devel@lists.xenproject.org
Message-ID: <0ed9b152-6465-4736-be59-352d68b77e6f@suse.com>
Subject: Re: [PATCH v2 2/4] docs: replace @xxx@ markers at build time
References: <20251114113238.9279-1-jgross@suse.com>
 <20251114113238.9279-3-jgross@suse.com>
 <7e24823f-cce1-4430-83f1-ebde6986efa4@citrix.com>
 <2de93313-9f1b-46a7-99c8-618281aff2f1@suse.com>
 
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Subject: Re: [PATCH v2 2/4] docs: replace @xxx@ markers at build time
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Cc: Anthony PERARD ,
 Andrew Cooper , xen-devel@lists.xenproject.org
References: <20251114113238.9279-1-jgross@suse.com>
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On 17.11.2025 13:55, Jürgen Groß wrote:
> On 17.11.25 13:33, Jan Beulich wrote:
>> On 14.11.2025 14:00, Jürgen Groß wrote:
>>> On 14.11.25 12:40, Andrew Cooper wrote:
>>>> On 14/11/2025 11:32 am, Juergen Gross wrote:
>>>>> diff --git a/docs/Makefile b/docs/Makefile
>>>>> index 37776d303c..e5f4a8ca86 100644
>>>>> --- a/docs/Makefile
>>>>> +++ b/docs/Makefile
>>>>> @@ -8,8 +8,11 @@ DATE		:= $(call date,"+%Y-%m-%d")
>>>>>    DOC_ARCHES      := arm ppc riscv x86_32 x86_64
>>>>>    MAN_SECTIONS    := 1 5 7 8
>>>>>    
>>>>> +IN_FILES := man/xl-disk-configuration.5.pod man/xl-network-configuration.5.pod
>>>>> +IN_FILES += man/xl.1.pod man/xl.cfg.5.pod man/xl.conf.5.pod
>>>>
>>>> Sorry, I meant to say this on the previous revision.  Can we please list
>>>> these one per line, for the future ease of inserting/removing.
>>>
>>> Okay.
>>>
>>>> Is IN_FILES really correct?  These are the generated (non-.in) files,
>>>> rather than the .in files themselves.  GEN_FILES from v1 would seem to
>>>> be a better fit.
>>>
>>> I wanted to make clear this is related to *.in files. And IMHO GEN_FILES
>>> was too generic on a second thought.
>>>
>>> GENERATED_FROM_IN_SUFFIXED_FILES seems a little bit clumsy. ;-)
>>> Seriously, if you have any better name, I'd be happy to use it.
>>
>> GEN_POD_FILES, seeing they're all *.pod?
> 
> For this case, maybe. OTOH in case someone adds a .podman file we'd need
> to rename again.
> 
> And I think using the same make variable name in all Makefiles needing to
> specify *.in derived files would be preferable.
> 
> Maybe IN_TARGETS?

Better than IN_FILES, but still potentially ambiguous. How about sticking
to IN_FILES but indeed enumerating the .in there (zapping the suffix upon
use)? And/or would $(wildcard /*.in) perhaps make sense to use?

Jan


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Subject: Re: [PATCH v2 1/4] build: add make macro for making file from file.in
To: Jan Beulich 
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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: Jan Beulich 
Cc: Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Andrew Cooper , xen-devel@lists.xenproject.org
Message-ID: <8b2e64a9-c4a3-4b0e-9b9f-3176f44dc249@suse.com>
Subject: Re: [PATCH v2 1/4] build: add make macro for making file from file.in
References: <20251114113238.9279-1-jgross@suse.com>
 <20251114113238.9279-2-jgross@suse.com>
 <468c6686-43e5-4c35-8366-58558f199e22@citrix.com>
 
 <113c9cc1-5e39-4a54-88de-dd2b70b90a49@suse.com>
 <88e6b9d8-21b6-4b37-97fc-d35b90ed9b49@suse.com>
 
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Subject: Re: [PATCH v2 2/3] arm/mpu: Implement reference counting for
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On 11/11/2025 11:16, Harry Ramsey wrote:
> Implement reference counting to enable inclusive MPU regions. An
> inclusive region is defined as a region encapsulated inside a
> previously allocated region sharing the same permissions.
> 
> References are incremented and decremented in xen_mpumap_update_entry. A
> region will be destroyed if the reference count is 0 upon calling
> destroy_xen_mappings and if the full region range is specified.
> 
> Additionally XEN_MPUMAP_ENTRY_SHIFT and XEN_MPUMAP_ENTRY_SHIFT_ZERO are
> no longer hardcoded and defined inside asm-offsets.c.
> 
> Signed-off-by: Harry Ramsey 
> ---
> Changes in v2:
> - Improve clarity with regards to MPU inclusive regions
> - Fix code format issues
> ---
>  xen/arch/arm/arm32/asm-offsets.c         |  2 +
>  xen/arch/arm/arm64/asm-offsets.c         |  2 +
>  xen/arch/arm/include/asm/arm32/mpu.h     |  2 +
>  xen/arch/arm/include/asm/arm64/mpu.h     |  2 +
>  xen/arch/arm/include/asm/mpu/regions.inc | 11 +++-
>  xen/arch/arm/mpu/mm.c                    | 75 +++++++++++++++++++-----
>  6 files changed, 78 insertions(+), 16 deletions(-)
> 
> diff --git a/xen/arch/arm/arm32/asm-offsets.c b/xen/arch/arm/arm32/asm-offsets.c
> index c203ce269d..951f8d03f3 100644
> --- a/xen/arch/arm/arm32/asm-offsets.c
> +++ b/xen/arch/arm/arm32/asm-offsets.c
> @@ -79,6 +79,8 @@ void __dummy__(void)
>  #ifdef CONFIG_MPU
>     DEFINE(XEN_MPUMAP_MASK_sizeof, sizeof(xen_mpumap_mask));
>     DEFINE(XEN_MPUMAP_sizeof, sizeof(xen_mpumap));
> +   DEFINE(XEN_MPUMAP_ENTRY_SHIFT, ilog2(sizeof(pr_t)));
> +   DEFINE(XEN_MPUMAP_ENTRY_ZERO_OFFSET, sizeof(prbar_t) + sizeof(prlar_t));
>     BLANK();
>  #endif
>  }
> diff --git a/xen/arch/arm/arm64/asm-offsets.c b/xen/arch/arm/arm64/asm-offsets.c
> index 320289b281..38a3894a3b 100644
> --- a/xen/arch/arm/arm64/asm-offsets.c
> +++ b/xen/arch/arm/arm64/asm-offsets.c
> @@ -73,6 +73,8 @@ void __dummy__(void)
>  #ifdef CONFIG_MPU
>     DEFINE(XEN_MPUMAP_MASK_sizeof, sizeof(xen_mpumap_mask));
>     DEFINE(XEN_MPUMAP_sizeof, sizeof(xen_mpumap));
> +   DEFINE(XEN_MPUMAP_ENTRY_SHIFT, ilog2(sizeof(pr_t)));
> +   DEFINE(XEN_MPUMAP_ENTRY_ZERO_OFFSET, sizeof(prbar_t) + sizeof(prlar_t));
>     BLANK();
>  #endif
>  }
> diff --git a/xen/arch/arm/include/asm/arm32/mpu.h b/xen/arch/arm/include/asm/arm32/mpu.h
> index 0a6930b3a0..137022d922 100644
> --- a/xen/arch/arm/include/asm/arm32/mpu.h
> +++ b/xen/arch/arm/include/asm/arm32/mpu.h
> @@ -39,6 +39,8 @@ typedef union {
>  typedef struct {
>      prbar_t prbar;
>      prlar_t prlar;
> +    uint8_t refcount;
> +    uint8_t pad[7];     /* Pad structure to 16 Bytes */
>  } pr_t;
> 
>  #endif /* __ASSEMBLY__ */
> diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h
> index f0ce344e78..17f62ccaf6 100644
> --- a/xen/arch/arm/include/asm/arm64/mpu.h
> +++ b/xen/arch/arm/include/asm/arm64/mpu.h
> @@ -38,6 +38,8 @@ typedef union {
>  typedef struct {
>      prbar_t prbar;
>      prlar_t prlar;
> +    uint8_t refcount;
> +    uint8_t pad[15];    /* Pad structure to 32 Bytes */
>  } pr_t;
> 
>  #endif /* __ASSEMBLY__ */
> diff --git a/xen/arch/arm/include/asm/mpu/regions.inc b/xen/arch/arm/include/asm/mpu/regions.inc
> index 23fead3b21..0cdbb17bc3 100644
> --- a/xen/arch/arm/include/asm/mpu/regions.inc
> +++ b/xen/arch/arm/include/asm/mpu/regions.inc
> @@ -14,14 +14,12 @@
>  #define PRLAR_ELx_EN            0x1
> 
>  #ifdef CONFIG_ARM_64
> -#define XEN_MPUMAP_ENTRY_SHIFT  0x4     /* 16 byte structure */
> 
>  .macro store_pair reg1, reg2, dst
>      stp \reg1, \reg2, [\dst]
>  .endm
> 
>  #else
> -#define XEN_MPUMAP_ENTRY_SHIFT  0x3     /* 8 byte structure */
> 
>  .macro store_pair reg1, reg2, dst
>      strd  \reg1, \reg2, [\dst]
> @@ -97,6 +95,15 @@
> 
>  3:
> 
> +    /* Clear the rest of the xen_mpumap entry. */
> +#ifdef CONFIG_ARM_64
> +    stp xzr, xzr, [\base, #XEN_MPUMAP_ENTRY_ZERO_OFFSET]
> +#else
> +    mov \prbar, #0
> +    mov \prlar, #0
> +    strd \prbar, \prlar, [\base, #XEN_MPUMAP_ENTRY_ZERO_OFFSET]
> +#endif
> +
>      add   \sel, \sel, #1
> 
>  1:
> diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
> index b80edcf1ca..cd84f9e3c6 100644
> --- a/xen/arch/arm/mpu/mm.c
> +++ b/xen/arch/arm/mpu/mm.c
> @@ -106,6 +106,7 @@ pr_t pr_of_addr(paddr_t base, paddr_t limit, unsigned int flags)
>      region = (pr_t) {
>          .prbar = prbar,
>          .prlar = prlar,
> +        .refcount = 0,
>      };
> 
>      /* Set base address and limit address. */
> @@ -170,6 +171,37 @@ int mpumap_contains_region(pr_t *table, uint8_t nr_regions, paddr_t base,
>      return MPUMAP_REGION_NOTFOUND;
>  }
> 
> +static bool is_mm_attr_match(pr_t *region, unsigned int attributes)
> +{
> +    bool ret = true;
> +
> +    if ( region->prbar.reg.ro != PAGE_RO_MASK(attributes) )
> +    {
> +        printk(XENLOG_WARNING
> +               "Mismatched Access Permission attributes (%#x instead of %#x)\n",
> +               region->prbar.reg.ro, PAGE_RO_MASK(attributes));
> +        ret = false;
NIT: I think it's more clear when you return false here. Otherwise after setting
ret to false, what's the point for checking additionally for below conditions?

> +    }
> +
> +    if ( region->prbar.reg.xn != PAGE_XN_MASK(attributes) )
> +    {
> +        printk(XENLOG_WARNING
> +               "Mismatched Execute Never attributes (%#x instead of %#x)\n",
> +               region->prbar.reg.xn, PAGE_XN_MASK(attributes));
> +        ret = false;
> +    }
> +
> +    if ( region->prlar.reg.ai != PAGE_AI_MASK(attributes) )
> +    {
> +        printk(XENLOG_WARNING
> +               "Mismatched Memory Attribute Index (%#x instead of %#x)\n",
> +               region->prlar.reg.ai, PAGE_AI_MASK(attributes));
> +        ret = false;
> +    }
> +
> +    return ret;
> +}
> +
>  /* Map a frame table to cover physical addresses ps through pe */
>  void __init setup_frametable_mappings(paddr_t ps, paddr_t pe)
>  {
> @@ -284,22 +316,26 @@ static int xen_mpumap_update_entry(paddr_t base, paddr_t limit,
> 
>      flags_has_page_present = flags & _PAGE_PRESENT;
> 
> -    /* Currently we don't support modifying an existing entry. */
> +    /*
> +    * Currently, we only support removing/modifying a *WHOLE* MPU memory
> +    * region. Part-region removal/modification is not supported as in the worst
> +    * case it will leave two/three fragments behind.
> +    */
>      if ( flags_has_page_present && (rc >= MPUMAP_REGION_FOUND) )
>      {
> -        printk("Modifying an existing entry is not supported\n");
> -        return -EINVAL;
> -    }
> +        if ( !is_mm_attr_match(&xen_mpumap[idx], flags) )
> +        {
> +            printk("Modifying an existing entry is not supported\n");
> +            return -EINVAL;
> +        }
> 
> -    /*
> -     * Currently, we only support removing/modifying a *WHOLE* MPU memory
> -     * region. Part-region removal/modification is not supported as in the worst
> -     * case it will leave two/three fragments behind.
> -     */
> -    if ( rc == MPUMAP_REGION_INCLUSIVE )
> -    {
> -        printk("Part-region removal/modification is not supported\n");
> -        return -EINVAL;
> +        /* Check for overflow of refcount before incrementing.  */
> +        if ( xen_mpumap[idx].refcount == 0xFF )
> +        {
> +            printk("Cannot allocate region as it would cause reference overflow\n");
s/reference/reference count or refcount/

Reviewed-by: Michal Orzel 

~Michal




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From: "Teddy Astie" 
Subject: =?utf-8?Q?Re:=20[PATCH=201/2]=20amd/iommu:=20Always=20atomically=20update=20DTE?=
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To: "Jan Beulich" 
Cc: "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Jason Andryuk" , xen-devel@lists.xenproject.org
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Le 13/11/2025 =C3=A0 12:38, Jan Beulich a =C3=A9crit=C2=A0:
> On 12.11.2025 16:37, Teddy Astie wrote:
>> amd_iommu_set_root_page_table chooses between updating atomically
>> and non-atomically depending on whether the DTE is active or not.
>>
>> This choice existed mostly because cx16 wasn't supposed always available
>> until [1]. Thus we don't need to threat the non-atomic path in a special
>> way anymore.
>>
>> By rearranging slightly the atomic path, we can make it cover all the ca=
ses
>> which improves the code generation at the expense of systematically perf=
orming
>> cmpxchg16b.
>>
>> Also remove unused raw64 fields of ldte, and the deprecated comment as t=
he
>> function actually behaves in a more usual way and can't return >0.
>>
>> [1] 2636fcdc15c7 "x86/iommu: check for CMPXCHG16B when enabling IOMMU"
>>
>> Signed-off-by: Teddy Astie 
>> ---
>>   xen/drivers/passthrough/amd/iommu_map.c | 78 ++++++++-----------------
>>   1 file changed, 25 insertions(+), 53 deletions(-)
>>
>> diff --git a/xen/drivers/passthrough/amd/iommu_map.c b/xen/drivers/passt=
hrough/amd/iommu_map.c
>> index 320a2dc64c..e3165d93aa 100644
>> --- a/xen/drivers/passthrough/amd/iommu_map.c
>> +++ b/xen/drivers/passthrough/amd/iommu_map.c
>> @@ -154,69 +154,41 @@ static void set_iommu_ptes_present(unsigned long p=
t_mfn,
>>       unmap_domain_page(table);
>>   }
>>   
>> -/*
>> - * This function returns
>> - * - -errno for errors,
>> - * - 0 for a successful update, atomic when necessary
>> - * - 1 for a successful but non-atomic update, which may need to be war=
ned
>> - *   about by the caller.
>> - */
>>   int amd_iommu_set_root_page_table(struct amd_iommu_dte *dte,
>>                                     uint64_t root_ptr, uint16_t domain_i=
d,
>>                                     uint8_t paging_mode, unsigned int fl=
ags)
>>   {
>>       bool valid =3D flags & SET_ROOT_VALID;
>>   
>> -    if ( dte->v && dte->tv )
>> -    {
>> -        union {
>> -            struct amd_iommu_dte dte;
>> -            uint64_t raw64[4];
>> -            __uint128_t raw128[2];
>> -        } ldte =3D { .dte =3D *dte };
>> -        __uint128_t res, old =3D ldte.raw128[0];
>> -        int ret =3D 0;
>> -
>> -        ldte.dte.domain_id =3D domain_id;
>> -        ldte.dte.pt_root =3D paddr_to_pfn(root_ptr);
>> -        ldte.dte.iw =3D true;
>> -        ldte.dte.ir =3D true;
>> -        ldte.dte.paging_mode =3D paging_mode;
>> -        ldte.dte.v =3D valid;
>> -
>> -        res =3D cmpxchg16b(dte, &old, &ldte.raw128[0]);
>> -
>> -        /*
>> -         * Hardware does not update the DTE behind our backs, so the
>> -         * return value should match "old".
>> -         */
>> -        if ( res !=3D old )
>> -        {
>> -            printk(XENLOG_ERR
>> -                   "Dom%d: unexpected DTE %016lx_%016lx (expected %016l=
x_%016lx)\n",
>> -                   domain_id,
>> -                   (uint64_t)(res >> 64), (uint64_t)res,
>> -                   (uint64_t)(old >> 64), (uint64_t)old);
>> -            ret =3D -EILSEQ;
>> -        }
>> +    union {
>> +        struct amd_iommu_dte dte;
>> +        __uint128_t raw128[2];
>> +    } ldte =3D { .dte =3D *dte };
>> +    __uint128_t res, old =3D ldte.raw128[0];
>>   
>> -        return ret;
>> -    }
>> +    ldte.dte.domain_id =3D domain_id;
>> +    ldte.dte.pt_root =3D paddr_to_pfn(root_ptr);
>> +    ldte.dte.iw =3D true;
>> +    ldte.dte.ir =3D true;
>> +    ldte.dte.paging_mode =3D paging_mode;
>> +    ldte.dte.tv =3D true;
>> +    ldte.dte.v =3D valid;
>> +
>> +    res =3D cmpxchg16b(dte, &old, &ldte.raw128[0]);
>>   
>> -    if ( valid || dte->v )
>> +    /*
>> +     * Hardware does not update the DTE behind our backs, so the
>> +     * return value should match "old".
>> +     */
>> +    if ( res !=3D old )
>>       {
>> -        dte->tv =3D false;
>> -        dte->v =3D true;
>> -        smp_wmb();
>> +        printk(XENLOG_ERR
>> +                "Dom%d: unexpected DTE %016lx_%016lx (expected %016lx_%=
016lx)\n",
>> +                domain_id,
>> +                (uint64_t)(res >> 64), (uint64_t)res,
>> +                (uint64_t)(old >> 64), (uint64_t)old);
> 
> Indentation is now off by 1 here.
> 
>> +        return -EILSEQ;
> 
> The downside of this is that all updates can now take this path. Yes, thi=
s shouldn't
> be possible to be taken, but it's a (minor) concern nevertheless. At the =
very least
> such a downside wants, imo, mentioning in the description, even if for no=
thing else
> than to make clear that it was a deliberate choice.
> 

Apparently it doesn't build (debian-bookworm-gcc-arm32-randconfig 
catched it).
ARM does provide MAX_VIRT_CPUS and GUEST_MAX_VCPUS which is 128 or 
lower, but that doesn't map (or not properly) with what we have in x86 
(MAX_VIRT_CPUS=3D8192 is PV-specific, and GUEST_MAX_VCPUS doesn't exist).

I am not sure what to do, looks like many things are redundant here.

> Jan
> 



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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Subject: Re: [PATCH v2 3/3] arm/mpu: Implement ioremap_attr for MPU
To: Harry Ramsey , 
CC: , Stefano Stabellini ,
	Julien Grall , Bertrand Marquis ,
	Volodymyr Babchuk 
References: <20251111101601.4171120-1-harry.ramsey@arm.com>
 <20251111101601.4171120-4-harry.ramsey@arm.com>
From: "Orzel, Michal" 
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On 11/11/2025 11:16, Harry Ramsey wrote:
> Implement the function `ioremap_attr` for MPU systems.
> 
> Signed-off-by: Harry Ramsey 
Acked-by: Michal Orzel 

~Michal



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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: Jan Beulich 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
Message-ID: <7ce4dd85-d88d-420d-b6da-9bee9fe61017@suse.com>
Subject: Re: [PATCH v2 1/4] build: add make macro for making file from file.in
References: <20251114113238.9279-1-jgross@suse.com>
 <20251114113238.9279-2-jgross@suse.com>
 <936632a3-d713-4183-b1db-5a554b617b74@suse.com>
 <7577ceec-1271-4569-91f1-fd7197a33991@suse.com>
 
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Date: Mon, 17 Nov 2025 14:17:35 +0100
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Subject: Re: [PATCH v2 2/4] docs: replace @xxx@ markers at build time
To: Jan Beulich 
Cc: Anthony PERARD ,
 Andrew Cooper , xen-devel@lists.xenproject.org
References: <20251114113238.9279-1-jgross@suse.com>
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To: Jan Beulich 
Cc: Anthony PERARD ,
 Andrew Cooper , xen-devel@lists.xenproject.org
Message-ID: 
Subject: Re: [PATCH v2 2/4] docs: replace @xxx@ markers at build time
References: <20251114113238.9279-1-jgross@suse.com>
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From: "Teddy Astie" 
Subject: =?utf-8?Q?Re:=20[PATCH=20v3]=20ioreq:=20Make=20sure=20ioreq=20is=20always=20in-bounds?=
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To: "Jan Beulich" 
Cc: "Andrew Cooper" , "Anthony PERARD" , "Michal Orzel" , "Julien Grall" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Stefano Stabellini" , "Julian Vetter" , xen-devel@lists.xenproject.org
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Le 17/11/2025 =C3=A0 13:46, Jan Beulich a =C3=A9crit=C2=A0:
> On 17.11.2025 13:35, Teddy Astie wrote:
>> A 4K page appears to be able to hold 128 ioreq entries, which luckly
>> matches the current vCPU limit. However, if we decide to increase the
>> domain vCPU limit, that doesn't hold anymore and this function would now
>> silently create a out of bounds pointer leading to confusing problems.
>>
>> All architectures with ioreq support don't support 128 vCPU limit for
>> HVM guests, and  have pages that are at least 4 KB large, so this case
>> doesn't occurs in with the current limits.
>>
>> For the time being, make sure we can't make a Xen build that can
>> accidentally make a out of bounds pointers here.
>>
>> No functional change.
>>
>> Reported-by: Julian Vetter 
>> Signed-off-by: Teddy Astie 
> 
> I was meaning to ack this, but ...
> 
>> --- a/xen/common/ioreq.c
>> +++ b/xen/common/ioreq.c
>> @@ -99,6 +99,7 @@ static ioreq_t *get_ioreq(struct ioreq_server *s, stru=
ct vcpu *v)
>>   
>>       ASSERT((v =3D=3D current) || !vcpu_runnable(v));
>>       ASSERT(p !=3D NULL);
>> +    BUILD_BUG_ON(HVM_MAX_VCPUS > (PAGE_SIZE / sizeof(struct ioreq)));
> 
> ... does this even build on e.g. Arm? IOREQ_SERVER is a setting which can=
 be
> enabled (with EXPERT=3Dy) also for non-x86. Yet HVM_MAX_VCPUS looks to be=
 an
> x86-only thing. (I then also wonder about some of what the description sa=
ys).
> 
> Just to mention (no further change requested at this point, in this regar=
d):
> HVM_MAX_VCPUS being part of the public interface, we'll need to see wheth=
er we
> can sensibly retain that identifier to carry changed meaning once we up t=
he
> limit. The check here may therefore not trigger at that point; the hope t=
hen
> is that while making respective changes, people would at least stumble ac=
ross
> it by e.g. seeing it in grep output.
> 

Apparently it doesn't build (debian-bookworm-gcc-arm32-randconfig 
catched it).
ARM does provide MAX_VIRT_CPUS and GUEST_MAX_VCPUS which is 128 or 
lower, but that doesn't map (or not properly) with what we have in x86 
(MAX_VIRT_CPUS=3D8192 is PV-specific, and GUEST_MAX_VCPUS doesn't exist).

I am not sure what to do, looks like many things are redundant here.

> Jan



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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From: "Teddy Astie" 
Subject: =?utf-8?Q?Re:=20[PATCH=201/2]=20amd/iommu:=20Always=20atomically=20update=20DTE?=
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Le 13/11/2025 =C3=A0 12:38, Jan Beulich a =C3=A9crit=C2=A0:
> On 12.11.2025 16:37, Teddy Astie wrote:
>> amd_iommu_set_root_page_table chooses between updating atomically
>> and non-atomically depending on whether the DTE is active or not.
>>
>> This choice existed mostly because cx16 wasn't supposed always available
>> until [1]. Thus we don't need to threat the non-atomic path in a special
>> way anymore.
>>
>> By rearranging slightly the atomic path, we can make it cover all the ca=
ses
>> which improves the code generation at the expense of systematically perf=
orming
>> cmpxchg16b.
>>
>> Also remove unused raw64 fields of ldte, and the deprecated comment as t=
he
>> function actually behaves in a more usual way and can't return >0.
>>
>> [1] 2636fcdc15c7 "x86/iommu: check for CMPXCHG16B when enabling IOMMU"
>>
>> Signed-off-by: Teddy Astie 
>> ---
>>   xen/drivers/passthrough/amd/iommu_map.c | 78 ++++++++-----------------
>>   1 file changed, 25 insertions(+), 53 deletions(-)
>>
>> diff --git a/xen/drivers/passthrough/amd/iommu_map.c b/xen/drivers/passt=
hrough/amd/iommu_map.c
>> index 320a2dc64c..e3165d93aa 100644
>> --- a/xen/drivers/passthrough/amd/iommu_map.c
>> +++ b/xen/drivers/passthrough/amd/iommu_map.c
>> @@ -154,69 +154,41 @@ static void set_iommu_ptes_present(unsigned long p=
t_mfn,
>>       unmap_domain_page(table);
>>   }
>>   
>> -/*
>> - * This function returns
>> - * - -errno for errors,
>> - * - 0 for a successful update, atomic when necessary
>> - * - 1 for a successful but non-atomic update, which may need to be war=
ned
>> - *   about by the caller.
>> - */
>>   int amd_iommu_set_root_page_table(struct amd_iommu_dte *dte,
>>                                     uint64_t root_ptr, uint16_t domain_i=
d,
>>                                     uint8_t paging_mode, unsigned int fl=
ags)
>>   {
>>       bool valid =3D flags & SET_ROOT_VALID;
>>   
>> -    if ( dte->v && dte->tv )
>> -    {
>> -        union {
>> -            struct amd_iommu_dte dte;
>> -            uint64_t raw64[4];
>> -            __uint128_t raw128[2];
>> -        } ldte =3D { .dte =3D *dte };
>> -        __uint128_t res, old =3D ldte.raw128[0];
>> -        int ret =3D 0;
>> -
>> -        ldte.dte.domain_id =3D domain_id;
>> -        ldte.dte.pt_root =3D paddr_to_pfn(root_ptr);
>> -        ldte.dte.iw =3D true;
>> -        ldte.dte.ir =3D true;
>> -        ldte.dte.paging_mode =3D paging_mode;
>> -        ldte.dte.v =3D valid;
>> -
>> -        res =3D cmpxchg16b(dte, &old, &ldte.raw128[0]);
>> -
>> -        /*
>> -         * Hardware does not update the DTE behind our backs, so the
>> -         * return value should match "old".
>> -         */
>> -        if ( res !=3D old )
>> -        {
>> -            printk(XENLOG_ERR
>> -                   "Dom%d: unexpected DTE %016lx_%016lx (expected %016l=
x_%016lx)\n",
>> -                   domain_id,
>> -                   (uint64_t)(res >> 64), (uint64_t)res,
>> -                   (uint64_t)(old >> 64), (uint64_t)old);
>> -            ret =3D -EILSEQ;
>> -        }
>> +    union {
>> +        struct amd_iommu_dte dte;
>> +        __uint128_t raw128[2];
>> +    } ldte =3D { .dte =3D *dte };
>> +    __uint128_t res, old =3D ldte.raw128[0];
>>   
>> -        return ret;
>> -    }
>> +    ldte.dte.domain_id =3D domain_id;
>> +    ldte.dte.pt_root =3D paddr_to_pfn(root_ptr);
>> +    ldte.dte.iw =3D true;
>> +    ldte.dte.ir =3D true;
>> +    ldte.dte.paging_mode =3D paging_mode;
>> +    ldte.dte.tv =3D true;
>> +    ldte.dte.v =3D valid;
>> +
>> +    res =3D cmpxchg16b(dte, &old, &ldte.raw128[0]);
>>   
>> -    if ( valid || dte->v )
>> +    /*
>> +     * Hardware does not update the DTE behind our backs, so the
>> +     * return value should match "old".
>> +     */
>> +    if ( res !=3D old )
>>       {
>> -        dte->tv =3D false;
>> -        dte->v =3D true;
>> -        smp_wmb();
>> +        printk(XENLOG_ERR
>> +                "Dom%d: unexpected DTE %016lx_%016lx (expected %016lx_%=
016lx)\n",
>> +                domain_id,
>> +                (uint64_t)(res >> 64), (uint64_t)res,
>> +                (uint64_t)(old >> 64), (uint64_t)old);
> 
> Indentation is now off by 1 here.
> 
>> +        return -EILSEQ;
> 
> The downside of this is that all updates can now take this path. Yes, thi=
s shouldn't
> be possible to be taken, but it's a (minor) concern nevertheless. At the =
very least
> such a downside wants, imo, mentioning in the description, even if for no=
thing else
> than to make clear that it was a deliberate choice.
> 

I only expect to see this path in case of a bug (recoverable here), 
which is only checked in the res !=3D old case. But if something similar 
occurs in the non-atomic path, then nothing good will happen as such 
checks cannot be implemented properly.

Perhaps we want to emphasis this :
"The race check is now always made instead of only being made for the 
atomic path. This specific path should be triggered under normal 
circumstances, and is very likely a bug."

And wrap the res !=3D old inside a unlikely() to insist on this aspect.

> Jan
> 



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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From: "Teddy Astie" 
Subject: =?utf-8?Q?Re:=20[PATCH=201/2]=20amd/iommu:=20Always=20atomically=20update=20DTE?=
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Le 17/11/2025 =C3=A0 14:05, Teddy Astie a =C3=A9crit=C2=A0:
> Le 13/11/2025 =C3=A0 12:38, Jan Beulich a =C3=A9crit=C2=A0:
>> On 12.11.2025 16:37, Teddy Astie wrote:
>>> amd_iommu_set_root_page_table chooses between updating atomically
>>> and non-atomically depending on whether the DTE is active or not.
>>>
>>> This choice existed mostly because cx16 wasn't supposed always availabl=
e
>>> until [1]. Thus we don't need to threat the non-atomic path in a specia=
l
>>> way anymore.
>>>
>>> By rearranging slightly the atomic path, we can make it cover all the 
>>> cases
>>> which improves the code generation at the expense of systematically 
>>> performing
>>> cmpxchg16b.
>>>
>>> Also remove unused raw64 fields of ldte, and the deprecated comment 
>>> as the
>>> function actually behaves in a more usual way and can't return >0.
>>>
>>> [1] 2636fcdc15c7 "x86/iommu: check for CMPXCHG16B when enabling IOMMU"
>>>
>>> Signed-off-by: Teddy Astie 
>>> ---
>>> =C2=A0 xen/drivers/passthrough/amd/iommu_map.c | 78 ++++++++-----------=
------
>>> =C2=A0 1 file changed, 25 insertions(+), 53 deletions(-)
>>>
>>> diff --git a/xen/drivers/passthrough/amd/iommu_map.c b/xen/drivers/ 
>>> passthrough/amd/iommu_map.c
>>> index 320a2dc64c..e3165d93aa 100644
>>> --- a/xen/drivers/passthrough/amd/iommu_map.c
>>> +++ b/xen/drivers/passthrough/amd/iommu_map.c
>>> @@ -154,69 +154,41 @@ static void set_iommu_ptes_present(unsigned 
>>> long pt_mfn,
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 unmap_domain_page(table);
>>> =C2=A0 }
>>> -/*
>>> - * This function returns
>>> - * - -errno for errors,
>>> - * - 0 for a successful update, atomic when necessary
>>> - * - 1 for a successful but non-atomic update, which may need to be 
>>> warned
>>> - *=C2=A0=C2=A0 about by the caller.
>>> - */
>>> =C2=A0 int amd_iommu_set_root_page_table(struct amd_iommu_dte *dte,
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 uint64_t=
 root_ptr, uint16_t 
>>> domain_id,
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 uint8_t =
paging_mode, unsigned int 
>>> flags)
>>> =C2=A0 {
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 bool valid =3D flags & SET_ROOT_VALID;
>>> -=C2=A0=C2=A0=C2=A0 if ( dte->v && dte->tv )
>>> -=C2=A0=C2=A0=C2=A0 {
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 union {
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 str=
uct amd_iommu_dte dte;
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 uin=
t64_t raw64[4];
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 __u=
int128_t raw128[2];
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 } ldte =3D { .dte =3D *dte =
};
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 __uint128_t res, old =3D ld=
te.raw128[0];
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 int ret =3D 0;
>>> -
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ldte.dte.domain_id =3D doma=
in_id;
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ldte.dte.pt_root =3D paddr_=
to_pfn(root_ptr);
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ldte.dte.iw =3D true;
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ldte.dte.ir =3D true;
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ldte.dte.paging_mode =3D pa=
ging_mode;
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ldte.dte.v =3D valid;
>>> -
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 res =3D cmpxchg16b(dte, &ol=
d, &ldte.raw128[0]);
>>> -
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 /*
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 * Hardware does not u=
pdate the DTE behind our backs, so the
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 * return value should=
 match "old".
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 */
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if ( res !=3D old )
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 {
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 pri=
ntk(XENLOG_ERR
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 "Dom%d: unexpected DTE %016lx_%016l=
x (expected 
>>> %016lx_%016lx)\n",
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 domain_id,
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 (uint64_t)(res >> 64), (uint64_t)re=
s,
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 (uint64_t)(old >> 64), (uint64_t)ol=
d);
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ret=
 =3D -EILSEQ;
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 }
>>> +=C2=A0=C2=A0=C2=A0 union {
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 struct amd_iommu_dte dte;
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 __uint128_t raw128[2];
>>> +=C2=A0=C2=A0=C2=A0 } ldte =3D { .dte =3D *dte };
>>> +=C2=A0=C2=A0=C2=A0 __uint128_t res, old =3D ldte.raw128[0];
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return ret;
>>> -=C2=A0=C2=A0=C2=A0 }
>>> +=C2=A0=C2=A0=C2=A0 ldte.dte.domain_id =3D domain_id;
>>> +=C2=A0=C2=A0=C2=A0 ldte.dte.pt_root =3D paddr_to_pfn(root_ptr);
>>> +=C2=A0=C2=A0=C2=A0 ldte.dte.iw =3D true;
>>> +=C2=A0=C2=A0=C2=A0 ldte.dte.ir =3D true;
>>> +=C2=A0=C2=A0=C2=A0 ldte.dte.paging_mode =3D paging_mode;
>>> +=C2=A0=C2=A0=C2=A0 ldte.dte.tv =3D true;
>>> +=C2=A0=C2=A0=C2=A0 ldte.dte.v =3D valid;
>>> +
>>> +=C2=A0=C2=A0=C2=A0 res =3D cmpxchg16b(dte, &old, &ldte.raw128[0]);
>>> -=C2=A0=C2=A0=C2=A0 if ( valid || dte->v )
>>> +=C2=A0=C2=A0=C2=A0 /*
>>> +=C2=A0=C2=A0=C2=A0=C2=A0 * Hardware does not update the DTE behind our=
 backs, so the
>>> +=C2=A0=C2=A0=C2=A0=C2=A0 * return value should match "old".
>>> +=C2=A0=C2=A0=C2=A0=C2=A0 */
>>> +=C2=A0=C2=A0=C2=A0 if ( res !=3D old )
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 {
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 dte->tv =3D false;
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 dte->v =3D true;
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 smp_wmb();
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 printk(XENLOG_ERR
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0 "Dom%d: unexpected DTE %016lx_%016lx (expected 
>>> %016lx_%016lx)\n",
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0 domain_id,
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0 (uint64_t)(res >> 64), (uint64_t)res,
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0 (uint64_t)(old >> 64), (uint64_t)old);
>>
>> Indentation is now off by 1 here.
>>
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return -EILSEQ;
>>
>> The downside of this is that all updates can now take this path. Yes, 
>> this shouldn't
>> be possible to be taken, but it's a (minor) concern nevertheless. At 
>> the very least
>> such a downside wants, imo, mentioning in the description, even if for 
>> nothing else
>> than to make clear that it was a deliberate choice.
>>
> 
> Apparently it doesn't build (debian-bookworm-gcc-arm32-randconfig 
> catched it).
> ARM does provide MAX_VIRT_CPUS and GUEST_MAX_VCPUS which is 128 or 
> lower, but that doesn't map (or not properly) with what we have in x86 
> (MAX_VIRT_CPUS=3D8192 is PV-specific, and GUEST_MAX_VCPUS doesn't exist).
> 
> I am not sure what to do, looks like many things are redundant here.
> 
>> Jan
>>
> 

Oops, sent the wrong message. Please ignore.


--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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On 17.11.2025 14:10, Jürgen Groß wrote:
> On 17.11.25 13:54, Jan Beulich wrote:
>> On 17.11.2025 13:48, Jürgen Groß wrote:
>>> On 17.11.25 13:29, Jan Beulich wrote:
>>>> On 14.11.2025 12:32, Juergen Gross wrote:
>>>>> --- a/Config.mk
>>>>> +++ b/Config.mk
>>>>> @@ -159,6 +159,19 @@ define move-if-changed
>>>>>    	if ! cmp -s $(1) $(2); then mv -f $(1) $(2); else rm -f $(1); fi
>>>>>    endef
>>>>>    
>>>>> +PATH_FILES := Paths
>>>>> +INC_FILES := $(foreach f, $(PATH_FILES), $(XEN_ROOT)/config/$(f).mk)
>>>>> +
>>>>> +include $(INC_FILES)
>>>>
>>>> Is any of the above part of introducing the macro? "Paths" is already a
>>>> specific case of holding patterns that want replacing. In turn ...
>>>>
>>>>> +BUILD_MAKE_VARS := $(foreach f, $(PATH_FILES), $(shell awk '$$2 == ":=" { print $$1; }' $(XEN_ROOT)/config/$(f).mk.in))
>>>>
>>>> ... it's not quite clear to me how it can be $(PATH_FILES) here.
>>>
>>> See patch 4.
>>>
>>> PATH_FILES is specifying the .mk files containing the marker definitions.
>>> I need the ability to have multiple such files in order to be able to let
>>> tools/configure build its own definitions.
>>
>> That's a good example - why would that affect the stubdom/ part of the tree?
>> Imo what pattern file(s) to use wants leaving to the invokee of the macro,
>> not pinning down globally for everyone.
> 
> Yes, I could add the tools specific marker file in the use cases under tools.
> 
> The question is whether adding it to 6 Makefiles is really worth that
> optimization, especially as only building the man files would be effected
> right now (which could change in future, of course).

Sticking to Paths.mk (which sits in the global config/ subtree anyway) might
be okay. The new (tools/ specific aiui) file you add later doesn't really
belong there, though. Therefore the macro may want to be constructed such
that it can be used both ways.

Jan


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On 17.11.2025 14:17, Jürgen Groß wrote:
> And using $(wildcard /*.in) is not an option, as that would reintroduce
> the need to distinguish the configure-time and build-time *.in files,

Hmm, yes, if there's a mix of them in any one directory, that wouldn't work.

Jan

> which
> I solved in V1 of my series by renaming the build-time ones to *.src.
> 
> 
> Juergen



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Subject: Re: [PATCH v3] ioreq: Make sure ioreq is always in-bounds
To: Teddy Astie 
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On 17.11.2025 14:43, Teddy Astie wrote:
> Le 17/11/2025 à 13:46, Jan Beulich a écrit :
>> On 17.11.2025 13:35, Teddy Astie wrote:
>>> A 4K page appears to be able to hold 128 ioreq entries, which luckly
>>> matches the current vCPU limit. However, if we decide to increase the
>>> domain vCPU limit, that doesn't hold anymore and this function would now
>>> silently create a out of bounds pointer leading to confusing problems.
>>>
>>> All architectures with ioreq support don't support 128 vCPU limit for
>>> HVM guests, and  have pages that are at least 4 KB large, so this case
>>> doesn't occurs in with the current limits.
>>>
>>> For the time being, make sure we can't make a Xen build that can
>>> accidentally make a out of bounds pointers here.
>>>
>>> No functional change.
>>>
>>> Reported-by: Julian Vetter 
>>> Signed-off-by: Teddy Astie 
>>
>> I was meaning to ack this, but ...
>>
>>> --- a/xen/common/ioreq.c
>>> +++ b/xen/common/ioreq.c
>>> @@ -99,6 +99,7 @@ static ioreq_t *get_ioreq(struct ioreq_server *s, struct vcpu *v)
>>>   
>>>       ASSERT((v == current) || !vcpu_runnable(v));
>>>       ASSERT(p != NULL);
>>> +    BUILD_BUG_ON(HVM_MAX_VCPUS > (PAGE_SIZE / sizeof(struct ioreq)));
>>
>> ... does this even build on e.g. Arm? IOREQ_SERVER is a setting which can be
>> enabled (with EXPERT=y) also for non-x86. Yet HVM_MAX_VCPUS looks to be an
>> x86-only thing. (I then also wonder about some of what the description says).
>>
>> Just to mention (no further change requested at this point, in this regard):
>> HVM_MAX_VCPUS being part of the public interface, we'll need to see whether we
>> can sensibly retain that identifier to carry changed meaning once we up the
>> limit. The check here may therefore not trigger at that point; the hope then
>> is that while making respective changes, people would at least stumble across
>> it by e.g. seeing it in grep output.
>>
> 
> Apparently it doesn't build (debian-bookworm-gcc-arm32-randconfig 
> catched it).
> ARM does provide MAX_VIRT_CPUS and GUEST_MAX_VCPUS which is 128 or 
> lower, but that doesn't map (or not properly) with what we have in x86 
> (MAX_VIRT_CPUS=8192 is PV-specific, and GUEST_MAX_VCPUS doesn't exist).
> 
> I am not sure what to do, looks like many things are redundant here.

Maybe non-x86 could surface HVM_MAX_VCPUS as an alias of whatever they already
got, much like CONFIG_HVM exists also for Arm, and will likely need introducing
for PPC and RISC-V (despite not being overly meaningful for non-x86)?

Jan


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Date: Mon, 17 Nov 2025 15:18:20 +0100
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Subject: Re: [PATCH 1/2] amd/iommu: Always atomically update DTE
To: Teddy Astie 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Jason Andryuk , xen-devel@lists.xenproject.org
References: 
 
 
 <4da9ecf1-3984-43a6-be45-1988bf79b85d@vates.tech>
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From: Jan Beulich 
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On 17.11.2025 14:49, Teddy Astie wrote:
> Le 13/11/2025 à 12:38, Jan Beulich a écrit :
>> On 12.11.2025 16:37, Teddy Astie wrote:
>>> amd_iommu_set_root_page_table chooses between updating atomically
>>> and non-atomically depending on whether the DTE is active or not.
>>>
>>> This choice existed mostly because cx16 wasn't supposed always available
>>> until [1]. Thus we don't need to threat the non-atomic path in a special
>>> way anymore.
>>>
>>> By rearranging slightly the atomic path, we can make it cover all the cases
>>> which improves the code generation at the expense of systematically performing
>>> cmpxchg16b.
>>>
>>> Also remove unused raw64 fields of ldte, and the deprecated comment as the
>>> function actually behaves in a more usual way and can't return >0.
>>>
>>> [1] 2636fcdc15c7 "x86/iommu: check for CMPXCHG16B when enabling IOMMU"
>>>
>>> Signed-off-by: Teddy Astie 
>>> ---
>>>   xen/drivers/passthrough/amd/iommu_map.c | 78 ++++++++-----------------
>>>   1 file changed, 25 insertions(+), 53 deletions(-)
>>>
>>> diff --git a/xen/drivers/passthrough/amd/iommu_map.c b/xen/drivers/passthrough/amd/iommu_map.c
>>> index 320a2dc64c..e3165d93aa 100644
>>> --- a/xen/drivers/passthrough/amd/iommu_map.c
>>> +++ b/xen/drivers/passthrough/amd/iommu_map.c
>>> @@ -154,69 +154,41 @@ static void set_iommu_ptes_present(unsigned long pt_mfn,
>>>       unmap_domain_page(table);
>>>   }
>>>   
>>> -/*
>>> - * This function returns
>>> - * - -errno for errors,
>>> - * - 0 for a successful update, atomic when necessary
>>> - * - 1 for a successful but non-atomic update, which may need to be warned
>>> - *   about by the caller.
>>> - */
>>>   int amd_iommu_set_root_page_table(struct amd_iommu_dte *dte,
>>>                                     uint64_t root_ptr, uint16_t domain_id,
>>>                                     uint8_t paging_mode, unsigned int flags)
>>>   {
>>>       bool valid = flags & SET_ROOT_VALID;
>>>   
>>> -    if ( dte->v && dte->tv )
>>> -    {
>>> -        union {
>>> -            struct amd_iommu_dte dte;
>>> -            uint64_t raw64[4];
>>> -            __uint128_t raw128[2];
>>> -        } ldte = { .dte = *dte };
>>> -        __uint128_t res, old = ldte.raw128[0];
>>> -        int ret = 0;
>>> -
>>> -        ldte.dte.domain_id = domain_id;
>>> -        ldte.dte.pt_root = paddr_to_pfn(root_ptr);
>>> -        ldte.dte.iw = true;
>>> -        ldte.dte.ir = true;
>>> -        ldte.dte.paging_mode = paging_mode;
>>> -        ldte.dte.v = valid;
>>> -
>>> -        res = cmpxchg16b(dte, &old, &ldte.raw128[0]);
>>> -
>>> -        /*
>>> -         * Hardware does not update the DTE behind our backs, so the
>>> -         * return value should match "old".
>>> -         */
>>> -        if ( res != old )
>>> -        {
>>> -            printk(XENLOG_ERR
>>> -                   "Dom%d: unexpected DTE %016lx_%016lx (expected %016lx_%016lx)\n",
>>> -                   domain_id,
>>> -                   (uint64_t)(res >> 64), (uint64_t)res,
>>> -                   (uint64_t)(old >> 64), (uint64_t)old);
>>> -            ret = -EILSEQ;
>>> -        }
>>> +    union {
>>> +        struct amd_iommu_dte dte;
>>> +        __uint128_t raw128[2];
>>> +    } ldte = { .dte = *dte };
>>> +    __uint128_t res, old = ldte.raw128[0];
>>>   
>>> -        return ret;
>>> -    }
>>> +    ldte.dte.domain_id = domain_id;
>>> +    ldte.dte.pt_root = paddr_to_pfn(root_ptr);
>>> +    ldte.dte.iw = true;
>>> +    ldte.dte.ir = true;
>>> +    ldte.dte.paging_mode = paging_mode;
>>> +    ldte.dte.tv = true;
>>> +    ldte.dte.v = valid;
>>> +
>>> +    res = cmpxchg16b(dte, &old, &ldte.raw128[0]);
>>>   
>>> -    if ( valid || dte->v )
>>> +    /*
>>> +     * Hardware does not update the DTE behind our backs, so the
>>> +     * return value should match "old".
>>> +     */
>>> +    if ( res != old )
>>>       {
>>> -        dte->tv = false;
>>> -        dte->v = true;
>>> -        smp_wmb();
>>> +        printk(XENLOG_ERR
>>> +                "Dom%d: unexpected DTE %016lx_%016lx (expected %016lx_%016lx)\n",
>>> +                domain_id,
>>> +                (uint64_t)(res >> 64), (uint64_t)res,
>>> +                (uint64_t)(old >> 64), (uint64_t)old);
>>
>> Indentation is now off by 1 here.
>>
>>> +        return -EILSEQ;
>>
>> The downside of this is that all updates can now take this path. Yes, this shouldn't
>> be possible to be taken, but it's a (minor) concern nevertheless. At the very least
>> such a downside wants, imo, mentioning in the description, even if for nothing else
>> than to make clear that it was a deliberate choice.
>>
> 
> I only expect to see this path in case of a bug (recoverable here), 
> which is only checked in the res != old case. But if something similar 
> occurs in the non-atomic path, then nothing good will happen as such 
> checks cannot be implemented properly.
> 
> Perhaps we want to emphasis this :
> "The race check is now always made instead of only being made for the 
> atomic path. This specific path should be triggered under normal 
> circumstances, and is very likely a bug."

s/should/shouldn't/ I suppose?

Jan

> And wrap the res != old inside a unlikely() to insist on this aspect.
> --
> Teddy Astie | Vates XCP-ng Developer
> 
> XCP-ng & Xen Orchestra - Vates solutions
> 
> web: https://vates.tech
> 
> 



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From: Luca Fancellu 
To: "Orzel, Michal" 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Volodymyr Babchuk
	, Harry Ramsey 
Subject: Re: [PATCH v2 1/3] arm/mpu: Implement setup_mm for MPU systems
Thread-Topic: [PATCH v2 1/3] arm/mpu: Implement setup_mm for MPU systems
Thread-Index: AQHcU9GZpx9Ewja+9EW1e1HUZJtzELTvMOuAgAAD+oCAB6VIAIAAGNOA
Date: Mon, 17 Nov 2025 14:20:57 +0000
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HI Michal,

> On 17 Nov 2025, at 12:51, Orzel, Michal  wrote:
>=20
>=20
>=20
> On 12/11/2025 17:06, Luca Fancellu wrote:
>> Hi Michal,
>>=20
>>>>> +void __init setup_mm(void)
>>>>> +{
>>>>> +    const struct membanks *banks =3D bootinfo_get_mem();
>>>>> +    paddr_t ram_start =3D INVALID_PADDR;
>>>>> +    paddr_t ram_end =3D 0;
>>>>> +    paddr_t ram_size =3D 0;
>>>>> +    unsigned int i;
>>>>> +
>>>>> +    init_pdx();
>>>>> +
>>>>> +    for ( i =3D 0; i < banks->nr_banks; i++ )
>>>>> +    {
>>>>> +        const struct membank *bank =3D &banks->bank[i];
>>>>> +        paddr_t bank_end =3D bank->start + bank->size;
>>>>> +
>>>>> +        ram_size =3D ram_size + bank->size;
>>>>> +        ram_start =3D min(ram_start, bank->start);
>>>>> +        ram_end =3D max(ram_end, bank_end);
>>>>> +    }
>>>>> +
>>>>> +    total_pages =3D ram_size >> PAGE_SHIFT;
>>>>> +
>>>>> +    /*
>>>>> +     * On MMU systems we need some memory to allocate the page-table=
s used for
>>>>> +     * the directmap mappings.  But some regions may contain memory =
already
>>>>> +     * allocated for other uses (e.g. modules, reserved-memory...).
>>>>> +     *
>>>>> +     * On MPU systems we need to pre-reserve regions that were alloc=
ated for
>>>>> +     * other uses (e.g. modules, reserved-memory...).
>>>> I'm not sure I understand this part of the comment with regards to
>>>> populate_boot_allocator(). Could you please explain?
>>=20
>> Maybe here we should just write that on MPU system we are populating the=
 boot allocator with the
>> static heap region, since static heap is mandatory for MPU.
>>=20
>> What do you think?
> The reason for the original comment was to explain why we need to call
> populate_boot_allocator() that early (i.e. before setting up direct map a=
nd not
> before setting up frametable). It's not about explaining why we need to p=
opulate
> boot allocator because that is rather clear. In case of MPU I don't think=
 there
> is a reason for doing that early, so we might not need any reasoning.

ok sounds good, we can avoid mentioning the MPU section all together.

Cheers,
Luca



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Date: Mon, 17 Nov 2025 15:22:04 +0100
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Subject: Re: [for 4.22 v5 11/18] xen/riscv: Implement p2m_free_subtree() and
 related helpers
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: 
 <24928a25f63f81ee72b78830306881b2c4c5a1e4.1760974017.git.oleksii.kurochko@gmail.com>
 
 <6eb7b19e-df55-4706-9da2-67158640aa08@gmail.com>
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From: Jan Beulich 
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On 17.11.2025 12:36, Oleksii Kurochko wrote:
> On 11/10/25 4:29 PM, Jan Beulich wrote:
>> On 20.10.2025 17:57, Oleksii Kurochko wrote:
>>> --- a/xen/arch/riscv/p2m.c
>>> +++ b/xen/arch/riscv/p2m.c
>>> @@ -17,6 +17,8 @@
>>>   #include 
>>>   #include 
>>>   
>>> +#define P2M_SUPPORTED_LEVEL_MAPPING 2
>> I fear without a comment it's left unclear what this is / represents.
> 
> Probably just renaming it to|P2M_MAX_SUPPORTED_LEVEL_MAPPING| would make it clearer,
> wouldn’t it?
> Otherwise, I can add the following comment:
> /*
>   * At the moment, only 4K, 2M, and 1G mappings are supported for G-stage
>   * translation. Therefore, the maximum supported page-table level is 2,
>   * which corresponds to 1G mappings.
>   */

Both the name change and the comment, if you ask me.

>>> @@ -403,11 +415,147 @@ static int p2m_next_level(struct p2m_domain *p2m, bool alloc_tbl,
>>>       return P2M_TABLE_MAP_NONE;
>>>   }
>>>   
>>> +static void p2m_put_foreign_page(struct page_info *pg)
>>> +{
>>> +    /*
>>> +     * It’s safe to call put_page() here because arch_flush_tlb_mask()
>>> +     * will be invoked if the page is reallocated, which will trigger a
>>> +     * flush of the guest TLBs.
>>> +     */
>>> +    put_page(pg);
>>> +}
>>> +
>>> +/* Put any references on the single 4K page referenced by mfn. */
>> To me this and ...
>>
>>> +static void p2m_put_4k_page(mfn_t mfn, p2m_type_t type)
>>> +{
>>> +    /* TODO: Handle other p2m types */
>>> +
>>> +    if ( p2m_is_foreign(type) )
>>> +    {
>>> +        ASSERT(mfn_valid(mfn));
>>> +        p2m_put_foreign_page(mfn_to_page(mfn));
>>> +    }
>>> +}
>>> +
>>> +/* Put any references on the superpage referenced by mfn. */
>> ... to a lesser degree this comment are potentially misleading. Down here at
>> least there is something plural-ish (the 4k pages that the 2M one consists
>> of), but especially for the single page case above "any" could easily mean
>> "anything that's still outstanding, anywhere". I'm also not quite sure "on"
>> is really what you mean (I'm not a native speaker, so my gut feeling may be
>> wrong here).
> 
> Then I could suggest the following instead:
>    /* Put the reference associated with the 4K page identified by mfn. */
> and
>   /* Put the references associated with the superpage identified by mfn. */
> 
> I think the comments could be omitted, since the function names already make
> this clear.

Okay with me.

Jan


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Subject: Re: [XEN][PATCH] common/libfdt: optimize usage
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To: Grygorii Strashko ,
	"xen-devel@lists.xenproject.org" 
CC: Stefano Stabellini , Julien Grall
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On Fri Nov 14, 2025 at 7:01 PM CET, Grygorii Strashko wrote:
> From: Grygorii Strashko 
>
> Now all libfdt features are built-it unconditionally, but...
>
> X86: The libfdt is used on x86 only to parse Hyperlaunch/dom0less Xen
> nodes, so full libfdt is not needed in this case and minimal, RO
> configuration can be used.
>
> ARM - situation is more complicated:
> 1) ARM reads Host DT (fdt.c RO)
> 2) ARM reads passthrough DT (RO)
> 3) ARM generates dom0/hwdom DT from Host DT (there is a mix of WIP and SW=
 APIs)
> 4) ARM generates domU DT (there is a mix of WIP and SW APIs)
> 4) With EFI enabled - ARM needs RW API and fdt_empty_tree
> 5) With CONFIG_OVERLAY_DTB - ARM needs RW and fdt_overlay API
>
> Hence, add possibility for optimizing libfdt usage by introducing separat=
e
> Kconfig options for each libfdt feature and select them where needed.
>
> Following libfdt modules are not used after this change:
>  Makefile.libfdt
>  fdt_addresses.c
>  fdt_strerror.c
>  fdt_check.c

This is a nice idea, and the less we compile of this nonsense library the
better.

>
> Signed-off-by: Grygorii Strashko 
> ---
> Not sure about using DOMAIN_BUILD_HELPERS for selecting=20
> LIBFDT features, as DOMAIN_BUILD_HELPERS doesn't exactly
> says that domain's DT will be generated when selected.

We likely want a DEVICE_TREE_WRITER Kconfig, or some such. That would compi=
le
in all code that performs DTB writes and gate the DTB overlay. Not having i=
t
restricts libfdt to fdt.c and fdt_ro.c, and having it adds fdt_rw, and allo=
ws
the others depending on EFI and/or overlay settings.

But the helpers themselves are not terribly well organized, so I'd say it's
not strictly required for now.

>
>  xen/arch/arm/Kconfig       |  4 ++++
>  xen/common/Kconfig         |  4 ++++
>  xen/common/libfdt/Kconfig  | 14 ++++++++++++++
>  xen/common/libfdt/Makefile | 12 +++++++++---
>  4 files changed, 31 insertions(+), 3 deletions(-)
>  create mode 100644 xen/common/libfdt/Kconfig
>
> diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
> index cf6af68299f6..f10cd3d7effc 100644
> --- a/xen/arch/arm/Kconfig
> +++ b/xen/arch/arm/Kconfig
> @@ -111,6 +111,8 @@ config ARM_EFI
>  	bool "UEFI boot service support"
>  	depends on ARM_64 && !MPU
>  	default y
> +	select LIBFDT_RW
> +	select LIBFDT_EMPTY_TREE

Only on UEFI? That's surprising. Why does this entry point need more than
creating a DTB for a domU in dom0less?

>  	help
>  	  This option provides support for boot services through
>  	  UEFI firmware. A UEFI stub is provided to allow Xen to
> @@ -149,6 +151,8 @@ config HAS_ITS
>  config OVERLAY_DTB
>  	bool "DTB overlay support (UNSUPPORTED)" if UNSUPPORTED
>  	depends on SYSCTL
> +	select LIBFDT_RW
> +	select LIBFDT_OVERLAY
>  	help
>  	  Dynamic addition/removal of Xen device tree nodes using a dtbo.
> =20
> diff --git a/xen/common/Kconfig b/xen/common/Kconfig
> index 401d5046f6f5..256aff269c3b 100644
> --- a/xen/common/Kconfig
> +++ b/xen/common/Kconfig
> @@ -28,6 +28,8 @@ config DOM0LESS_BOOT
> =20
>  config DOMAIN_BUILD_HELPERS
>  	bool
> +	select LIBFDT_WIP
> +	select LIBFDT_SW

Out of curiosity, what's the relationship between those libfdt files and th=
e
helpers? What do they use them for?

It's not like LIBFDT_WIP or LIBFDT_SW have very insighful names (through no
fault of your own. The original file organization is dubious at best), so w=
hy
not just compile those files conditionally on DOMAIN_BUILD_HELPERS instead?

Something like...

> =20
>  config GRANT_TABLE
>  	bool "Grant table support" if EXPERT
> @@ -680,4 +682,6 @@ config PM_STATS
>  	  Enable collection of performance management statistics to aid in
>  	  analyzing and tuning power/performance characteristics of the system
> =20
> +source "common/libfdt/Kconfig"
> +
>  endmenu
> diff --git a/xen/common/libfdt/Kconfig b/xen/common/libfdt/Kconfig
> new file mode 100644
> index 000000000000..3abd904b2969
> --- /dev/null
> +++ b/xen/common/libfdt/Kconfig
> @@ -0,0 +1,14 @@
> +config LIBFDT_WIP
> +	bool
> +
> +config LIBFDT_SW
> +    bool
> +
> +config LIBFDT_RW
> +    bool
> +
> +config LIBFDT_EMPTY_TREE
> +    bool
> +
> +config LIBFDT_OVERLAY
> +    bool
> diff --git a/xen/common/libfdt/Makefile b/xen/common/libfdt/Makefile
> index 6ce679f98f47..c832d1849a5c 100644
> --- a/xen/common/libfdt/Makefile
> +++ b/xen/common/libfdt/Makefile
> @@ -1,7 +1,13 @@
> -include $(src)/Makefile.libfdt
> =20
>  SECTIONS :=3D text data $(SPECIAL_DATA_SECTIONS)
> =20
> +obj-libfdt-y :=3D fdt.o fdt_ro.o

> +obj-libfdt-$(CONFIG_LIBFDT_WIP) +=3D fdt_wip.o
> +obj-libfdt-$(CONFIG_LIBFDT_SW) +=3D fdt_sw.o

... turning these two into:

  obj-libfdt-$(CONFIG_DOMAIN_BUILD_HELPERS) +=3D fdt_sw.o fdt_wip.o

Likewise for fdt_empty_tree.o and fdt_overlay.o for ARM_EFI and OVERLAY_DTB
respectively.

> +obj-libfdt-$(CONFIG_LIBFDT_RW) +=3D fdt_rw.o
> +obj-libfdt-$(CONFIG_LIBFDT_EMPTY_TREE) +=3D fdt_empty_tree.o
> +obj-libfdt-$(CONFIG_LIBFDT_OVERLAY) +=3D fdt_overlay.o
> +
>  # For CONFIG_OVERLAY_DTB, libfdt functionalities will be needed during r=
untime.
>  ifneq ($(CONFIG_OVERLAY_DTB),y)
>  OBJCOPYFLAGS :=3D $(foreach s,$(SECTIONS),--rename-section .$(s)=3D.init=
.$(s))
> @@ -15,7 +21,7 @@ CFLAGS-y +=3D -I$(srctree)/include/xen/libfdt/
>  $(obj)/libfdt.o: $(obj)/libfdt-temp.o FORCE
>  	$(call if_changed,objcopy)
> =20
> -$(obj)/libfdt-temp.o: $(addprefix $(obj)/,$(LIBFDT_OBJS)) FORCE
> +$(obj)/libfdt-temp.o: $(addprefix $(obj)/,$(obj-libfdt-y)) FORCE
>  	$(call if_changed,ld)
> =20
> -targets +=3D libfdt-temp.o $(LIBFDT_OBJS)
> +targets +=3D libfdt-temp.o $(obj-libfdt-y)

Cheers,
Alejandro


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Subject: [PATCH v4 0/8] x86/HPET: tidying / improvements
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v4 is what is left from the broadcast-IRQ series, plus yet another two new
changes. Logically the changes are largely independent, and can likely go in
in about any order.

1: avoid indirect call to event handler
2: make another channel flags update atomic
3: move legacy tick IRQ count adjustment
4: reduce hpet_next_event() call sites
5: drop "long timeout" handling from reprogram_hpet_evt_channel()
6: simplify "expire" check a little in reprogram_hpet_evt_channel()
7: drop .set_affinity hook
8: don't arbitrarily cap delta in reprogram_hpet_evt_channel()

Jan


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Subject: [PATCH v4 1/8] x86/HPET: avoid indirect call to event handler
From: Jan Beulich 
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It's only ever handle_hpet_broadcast() that's used. While we now don't
enable IRQs right away, still play safe and convert the function pointer
to a boolean, to make sure no calls occur too early.

Signed-off-by: Jan Beulich 
---
v2: Re-base over changes earlier in the series.

--- a/xen/arch/x86/hpet.c
+++ b/xen/arch/x86/hpet.c
@@ -40,7 +40,7 @@ struct hpet_event_channel
     s_time_t      next_event;
     cpumask_var_t cpumask;
     spinlock_t    lock;
-    void          (*event_handler)(struct hpet_event_channel *ch);
+    bool          event_handler;
 
     unsigned int idx;   /* physical channel idx */
     unsigned int cpu;   /* msi target */
@@ -194,7 +194,7 @@ static void evt_do_broadcast(cpumask_t *
        cpumask_raise_softirq(mask, TIMER_SOFTIRQ);
 }
 
-static void cf_check handle_hpet_broadcast(struct hpet_event_channel *ch)
+static void handle_hpet_broadcast(struct hpet_event_channel *ch)
 {
     cpumask_t *scratch = this_cpu(hpet_scratch_cpumask);
     s_time_t now, next_event;
@@ -250,7 +250,7 @@ static void cf_check hpet_interrupt_hand
         return;
     }
 
-    ch->event_handler(ch);
+    handle_hpet_broadcast(ch);
 }
 
 static void hpet_enable_channel(struct hpet_event_channel *ch)
@@ -657,7 +657,7 @@ void __init hpet_broadcast_init(void)
         hpet_events[i].next_event = STIME_MAX;
         spin_lock_init(&hpet_events[i].lock);
         smp_wmb();
-        hpet_events[i].event_handler = handle_hpet_broadcast;
+        hpet_events[i].event_handler = true;
 
         hpet_events[i].msi.msi_attrib.maskbit = 1;
         hpet_events[i].msi.msi_attrib.pos = MSI_TYPE_HPET;
@@ -814,7 +814,9 @@ int hpet_legacy_irq_tick(void)
          (hpet_events->flags & (HPET_EVT_DISABLE|HPET_EVT_LEGACY)) !=
          HPET_EVT_LEGACY )
         return 0;
-    hpet_events->event_handler(hpet_events);
+
+    handle_hpet_broadcast(hpet_events);
+
     return 1;
 }
 



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Subject: [PATCH v4 2/8] x86/HPET: make another channel flags update atomic
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Unlike the setting of HPET_EVT_LEGACY in hpet_broadcast_init(), the
setting of HPET_EVT_DISABLE in hpet_disable_legacy_broadcast() isn't init-
only and hence can race other flag manipulation (not all of which occur
while holding the channel's lock). While possibly any such updates would
only ever occur when HPET_EVT_LEGACY isn't set in the first place, this
doesn't look straightforward to prove, so better be on the safe side.

Fixes: d09486dba36a ("cpuidle: Enable hpet broadcast by default")
Signed-off-by: Jan Beulich 

--- a/xen/arch/x86/hpet.c
+++ b/xen/arch/x86/hpet.c
@@ -729,7 +729,7 @@ void hpet_disable_legacy_broadcast(void)
 
     spin_lock_irqsave(&hpet_events->lock, flags);
 
-    hpet_events->flags |= HPET_EVT_DISABLE;
+    set_bit(HPET_EVT_DISABLE_BIT, &hpet_events->flags);
 
     /* disable HPET T0 */
     cfg = hpet_read32(HPET_Tn_CFG(0));



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Subject: [PATCH v4 3/8] x86/HPET: move legacy tick IRQ count adjustment
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
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If already we play with the IRQ count, we should do so only if we actually
"consume" the interrupt; normal timer IRQs should not have any adjustment
done.

Fixes: 353533232730 ("cpuidle: fix the menu governor to enhance IO performance")
Signed-off-by: Jan Beulich 
---
_Why_ we do these adjustments (also elsewhere) I don't really know.

--- a/xen/arch/x86/hpet.c
+++ b/xen/arch/x86/hpet.c
@@ -808,13 +808,13 @@ int hpet_broadcast_is_available(void)
 
 int hpet_legacy_irq_tick(void)
 {
-    this_cpu(irq_count)--;
-
     if ( !hpet_events ||
          (hpet_events->flags & (HPET_EVT_DISABLE|HPET_EVT_LEGACY)) !=
          HPET_EVT_LEGACY )
         return 0;
 
+    this_cpu(irq_count)--;
+
     handle_hpet_broadcast(hpet_events);
 
     return 1;



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Subject: [PATCH v4 4/8] x86/HPET: reduce hpet_next_event() call sites
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I'm surprised gcc doesn't manage to do that: At least in debug builds two
call sites exist, just like source code has it. That's not necessary
though - by using do/while we can reduce this to a single call site. Then
the function will be inlined.

While improving code gen, also switch the function's 2nd parameter to
unsigned.

Signed-off-by: Jan Beulich 
---
Oddly enough the CDQE is replaced by an entirely unnecessary 32-bit MOV of
a register to itself (i.e. zero-extending to 64 bits), as that's
immediately preceded by a 32-bit ADD targeting the same register.

--- a/xen/arch/x86/hpet.c
+++ b/xen/arch/x86/hpet.c
@@ -124,7 +124,7 @@ static inline unsigned long ns2ticks(uns
     return (unsigned long) tmp;
 }
 
-static int hpet_next_event(unsigned long delta, int timer)
+static int hpet_next_event(unsigned long delta, unsigned int timer)
 {
     uint32_t cnt, cmp;
     unsigned long flags;
@@ -173,12 +173,10 @@ static int reprogram_hpet_evt_channel(
     delta = max_t(int64_t, delta, MIN_DELTA_NS);
     delta = ns2ticks(delta, ch->shift, ch->mult);
 
-    ret = hpet_next_event(delta, ch->idx);
-    while ( ret && force )
-    {
-        delta += delta;
+    do {
         ret = hpet_next_event(delta, ch->idx);
-    }
+        delta += delta;
+    } while ( ret && force );
 
     return ret;
 }



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Neither caller passes STIME_MAX, so (bogusly) handling the case isn't
necessary.

"Bogusly" because with 32-bit counters, writing 0 means on average half
the wrapping period until an interrupt would be raised, while of course
in extreme cases an interrupt would be raised almost right away.

Amends: aa42fc0e9cd9 ("cpuidle: remove hpet access in hpet_broadcast_exit")
Signed-off-by: Jan Beulich 
---
v3: Drop the code instead of adjusting it.

--- a/xen/arch/x86/hpet.c
+++ b/xen/arch/x86/hpet.c
@@ -162,13 +162,6 @@ static int reprogram_hpet_evt_channel(
 
     ch->next_event = expire;
 
-    if ( expire == STIME_MAX )
-    {
-        /* We assume it will take a long time for the timer to wrap. */
-        hpet_write32(0, HPET_Tn_CMP(ch->idx));
-        return 0;
-    }
-
     delta = min_t(int64_t, delta, MAX_DELTA_NS);
     delta = max_t(int64_t, delta, MIN_DELTA_NS);
     delta = ns2ticks(delta, ch->shift, ch->mult);



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When this was added, the log message was updated correctly, but the zero
case was needlessly checked separately: hpet_broadcast_enter() had a zero
check added at the same time, while handle_hpet_broadcast() can't possibly
pass 0 here anyway.

Fixes: 7145897cfb81 ("cpuidle: Fix for timer_deadline==0 case")
Signed-off-by: Jan Beulich 
---
v2: New.

--- a/xen/arch/x86/hpet.c
+++ b/xen/arch/x86/hpet.c
@@ -147,10 +147,10 @@ static int reprogram_hpet_evt_channel(
     int64_t delta;
     int ret;
 
-    if ( (ch->flags & HPET_EVT_DISABLE) || (expire == 0) )
+    if ( ch->flags & HPET_EVT_DISABLE )
         return 0;
 
-    if ( unlikely(expire < 0) )
+    if ( unlikely(expire <= 0) )
     {
         printk(KERN_DEBUG "reprogram: expire <= 0\n");
         return -ETIME;



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Subject: [PATCH v4 7/8] x86/HPET: drop .set_affinity hook
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
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No IRQ balancing is supposed to be happening on the broadcast IRQs. The
only entity responsible for fiddling with the CPU affinities is
set_channel_irq_affinity(). They shouldn't even be fiddled with when
offlining a CPU: A CPU going down can't at the same time be idle. Some
properties (->arch.cpu_mask in particular) may transiently reference an
offline CPU, but that'll be adjusted as soon as a channel goes into active
use again.

Along with adjusting fixup_irqs() (in a more general way, i.e. covering all
vectors which are marked in use globally), also adjust section placement of
used_vectors.

Signed-off-by: Jan Beulich 
---
v4: New.

--- a/xen/arch/x86/hpet.c
+++ b/xen/arch/x86/hpet.c
@@ -294,22 +294,6 @@ static int hpet_msi_write(struct hpet_ev
 
 #define hpet_msi_shutdown hpet_msi_mask
 
-static void cf_check hpet_msi_set_affinity(
-    struct irq_desc *desc, const cpumask_t *mask)
-{
-    struct hpet_event_channel *ch = desc->action->dev_id;
-    struct msi_msg msg = ch->msi.msg;
-
-    /* This really is only for dump_irqs(). */
-    cpumask_copy(desc->arch.cpu_mask, mask);
-
-    msg.dest32 = cpu_mask_to_apicid(mask);
-    msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK;
-    msg.address_lo |= MSI_ADDR_DEST_ID(msg.dest32);
-    if ( msg.dest32 != ch->msi.msg.dest32 )
-        hpet_msi_write(ch, &msg);
-}
-
 /*
  * IRQ Chip for MSI HPET Devices,
  */
@@ -321,7 +305,6 @@ static hw_irq_controller hpet_msi_type =
     .disable    = hpet_msi_mask,
     .ack        = irq_actor_none,
     .end        = end_nonmaskable_irq,
-    .set_affinity   = hpet_msi_set_affinity,
 };
 
 static int __hpet_setup_msi_irq(struct irq_desc *desc)
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -51,7 +51,7 @@ static vmask_t global_used_vector_map;
 
 struct irq_desc __read_mostly *irq_desc = NULL;
 
-static DECLARE_BITMAP(used_vectors, X86_IDT_VECTORS);
+static DECLARE_BITMAP(used_vectors, X86_IDT_VECTORS) __ro_after_init;
 
 static DEFINE_SPINLOCK(vector_lock);
 
@@ -2630,13 +2630,17 @@ void fixup_irqs(void)
         spin_lock(&desc->lock);
 
         vector = irq_to_vector(irq);
-        if ( vector >= FIRST_HIPRIORITY_VECTOR &&
-             vector <= LAST_HIPRIORITY_VECTOR &&
-             desc->handler == &no_irq_type )
+        if ( (vector >= FIRST_HIPRIORITY_VECTOR &&
+              vector <= LAST_HIPRIORITY_VECTOR &&
+              desc->handler == &no_irq_type) ||
+             test_bit(vector, used_vectors) )
         {
             /*
              * This can in particular happen when parking secondary threads
              * during boot and when the serial console wants to use a PCI IRQ.
+             *
+             * Globally used vectors (like the HPET broadcast IRQ ones), need
+             * to be left alone in any event.
              */
             spin_unlock(&desc->lock);
             continue;



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Subject: [PATCH v4 8/8] x86/HPET: don't arbitrarily cap delta in
 reprogram_hpet_evt_channel()
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There's no reason to set an arbitrary upper bound of 10 seconds. We can
simply set the comparator such that it'll take a whole cycle through all
32-bit values until the next interrupt would be raised. (For an extremely
fast-running HPET [400 MHz and up] 10 seconds would also be too long.)

Signed-off-by: Jan Beulich 
---
v4: New.

--- a/xen/arch/x86/hpet.c
+++ b/xen/arch/x86/hpet.c
@@ -23,7 +23,6 @@
 #include 
 #include 
 
-#define MAX_DELTA_NS MILLISECS(10*1000)
 #define MIN_DELTA_NS MICROSECS(20)
 
 #define HPET_EVT_USED_BIT    0
@@ -162,10 +161,15 @@ static int reprogram_hpet_evt_channel(
 
     ch->next_event = expire;
 
-    delta = min_t(int64_t, delta, MAX_DELTA_NS);
     delta = max_t(int64_t, delta, MIN_DELTA_NS);
     delta = ns2ticks(delta, ch->shift, ch->mult);
 
+    if ( delta > UINT32_MAX )
+    {
+        hpet_write32(hpet_read32(HPET_COUNTER), HPET_Tn_CMP(ch->idx));
+        return 0;
+    }
+
     do {
         ret = hpet_next_event(delta, ch->idx);
         delta += delta;



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Subject: Re: [for 4.22 v5 17/18] xen/riscv: add support of page lookup by GFN
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: 
 <3eea04894401202666ea0bb7ee1240a23ba54d8a.1760974017.git.oleksii.kurochko@gmail.com>
 
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On 11/10/25 5:46 PM, Jan Beulich wrote:
> On 20.10.2025 17:58, Oleksii Kurochko wrote:
>> --- a/xen/arch/riscv/p2m.c
>> +++ b/xen/arch/riscv/p2m.c
>> @@ -1049,3 +1049,178 @@ int map_regions_p2mt(struct domain *d,
>>   
>>       return rc;
>>   }
>> +
>> +/*
>> + * p2m_get_entry() should always return the correct order value, even if an
>> + * entry is not present (i.e. the GFN is outside the range):
>> + *   [p2m->lowest_mapped_gfn, p2m->max_mapped_gfn]).    (1)
> There's one closing parenthesis too many here (likely the one before the colon).

You are right, ')' should be dropped. I think that "." could be drooped too.

>
>> + * This ensures that callers of p2m_get_entry() can determine what range of
>> + * address space would be altered by a corresponding p2m_set_entry().
>> + * Also, it would help to avoid cost page walks for GFNs outside range (1).
> DYM "costly"?

Agree, costly would be better here.

>
>> + * Therefore, this function returns true for GFNs outside range (1), and in
>> + * that case the corresponding level is returned via the level_out argument.
>> + * Otherwise, it returns false and p2m_get_entry() performs a page walk to
>> + * find the proper entry.
>> + */
>> +static bool check_outside_boundary(gfn_t gfn, gfn_t boundary, bool is_lower,
>> +                                   unsigned int *level_out)
>> +{
>> +    unsigned int level;
>> +
>> +    if ( is_lower ? gfn_x(gfn) < gfn_x(boundary)
>> +                  : gfn_x(gfn) > gfn_x(boundary) )
>> +    {
>> +        unsigned long mask = 0;
>> +
>> +        for ( level = P2M_ROOT_LEVEL; level; level-- )
>> +        {
>> +            unsigned long masked_gfn;
>> +
>> +            mask |= PFN_DOWN(P2M_LEVEL_MASK(level));
>> +            masked_gfn = gfn_x(gfn) & mask;
>> +
>> +            if ( is_lower ? masked_gfn < gfn_x(boundary)
>> +                          : masked_gfn > gfn_x(boundary) )
>> +            {
>> +                *level_out = level;
> For this to be correct in the is_lower case, don't you need to fill the
> bottom bits of masked_gfn with all 1s, rather than with all 0s? Otherwise
> the tail of the range may be above boundary.

I think that I didn't get what you mean by "the range" here and so I can't understand
what is "the tail of the range".
Could you please clarify?

>
>> +struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn,
>> +                                        p2m_type_t *t)
>> +{
>> +    struct page_info *page;
>> +    p2m_type_t p2mt = p2m_invalid;
>> +    mfn_t mfn;
>> +
>> +    p2m_read_lock(p2m);
>> +    mfn = p2m_get_entry(p2m, gfn, t, NULL);
>> +
>> +    if ( !mfn_valid(mfn) )
>> +    {
>> +        p2m_read_unlock(p2m);
>> +        return NULL;
>> +    }
>> +
>> +    if ( t )
>> +        p2mt = *t;
> Doesn't it need to be the other way around? The way you have it, when a caller
> passes NULL for t, p2m_get_entry() won't give you a type, and you'll do all
> further work with p2m_invalid.

IIUC, then the following should resolve the mentioned issue:
@@ -1344,11 +1344,14 @@ struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn,
                                          p2m_type_t *t)
  {
      struct page_info *page;
-    p2m_type_t p2mt = p2m_invalid;
+    p2m_type_t p2mt;
      mfn_t mfn;
  
      p2m_read_lock(p2m);
-    mfn = p2m_get_entry(p2m, gfn, t, NULL);
+    mfn = p2m_get_entry(p2m, gfn, &p2mt, NULL);

>
> Also, might this better move ahead of the earlier if()? Callers might be able
> to do still something based on the type, when they get back NULL as function
> return value. (Practically this might only become of interest once you add
> something like PoD, paging, or sharing.)

Agree with that, it should be moved before "if ( !mfn_valid(mfn) )"

Thanks.

~ Oleksii

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On 11/10/25 5:46 PM, Jan Beulich wrote:

    

    

      
On 20.10.2025 17:58, Oleksii Kurochko wrote:


      

        
--- a/xen/arch/riscv/p2m.c
+++ b/xen/arch/riscv/p2m.c
@@ -1049,3 +1049,178 @@ int map_regions_p2mt(struct domain *d,
 
     return rc;
 }
+
+/*
+ * p2m_get_entry() should always return the correct order value, even if an
+ * entry is not present (i.e. the GFN is outside the range):
+ *   [p2m->lowest_mapped_gfn, p2m->max_mapped_gfn]).    (1)


      

      
There's one closing parenthesis too many here (likely the one before the colon).

    

    
You are right, ')' should be dropped. I think that "." could be drooped too.



    

      



      

        
+ * This ensures that callers of p2m_get_entry() can determine what range of
+ * address space would be altered by a corresponding p2m_set_entry().
+ * Also, it would help to avoid cost page walks for GFNs outside range (1).


      

      
DYM "costly"?

    

    
Agree, costly would be better here.



    

      



      

        
+ * Therefore, this function returns true for GFNs outside range (1), and in
+ * that case the corresponding level is returned via the level_out argument.
+ * Otherwise, it returns false and p2m_get_entry() performs a page walk to
+ * find the proper entry.
+ */
+static bool check_outside_boundary(gfn_t gfn, gfn_t boundary, bool is_lower,
+                                   unsigned int *level_out)
+{
+    unsigned int level;
+
+    if ( is_lower ? gfn_x(gfn) < gfn_x(boundary)
+                  : gfn_x(gfn) > gfn_x(boundary) )
+    {
+        unsigned long mask = 0;
+
+        for ( level = P2M_ROOT_LEVEL; level; level-- )
+        {
+            unsigned long masked_gfn;
+
+            mask |= PFN_DOWN(P2M_LEVEL_MASK(level));
+            masked_gfn = gfn_x(gfn) & mask;
+
+            if ( is_lower ? masked_gfn < gfn_x(boundary)
+                          : masked_gfn > gfn_x(boundary) )
+            {
+                *level_out = level;


      

      
For this to be correct in the is_lower case, don't you need to fill the
bottom bits of masked_gfn with all 1s, rather than with all 0s? Otherwise
the tail of the range may be above boundary.

    

    
I think that I didn't get what you mean by "the range" here and so I can't understand
what is "the tail of the range".
Could you please clarify?



    

      



      

        
+struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn,
+                                        p2m_type_t *t)
+{
+    struct page_info *page;
+    p2m_type_t p2mt = p2m_invalid;
+    mfn_t mfn;
+
+    p2m_read_lock(p2m);
+    mfn = p2m_get_entry(p2m, gfn, t, NULL);
+
+    if ( !mfn_valid(mfn) )
+    {
+        p2m_read_unlock(p2m);
+        return NULL;
+    }
+
+    if ( t )
+        p2mt = *t;


      

      
Doesn't it need to be the other way around? The way you have it, when a caller
passes NULL for t, p2m_get_entry() won't give you a type, and you'll do all
further work with p2m_invalid.

    

    
IIUC, then the following should resolve the mentioned issue:
@@ -1344,11 +1344,14 @@ struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn,
                                         p2m_type_t *t)
 {
     struct page_info *page;
-    p2m_type_t p2mt = p2m_invalid;
+    p2m_type_t p2mt;
     mfn_t mfn;
 
     p2m_read_lock(p2m);
-    mfn = p2m_get_entry(p2m, gfn, t, NULL);
+    mfn = p2m_get_entry(p2m, gfn, &p2mt, NULL);



    

      

Also, might this better move ahead of the earlier if()? Callers might be able
to do still something based on the type, when they get back NULL as function
return value. (Practically this might only become of interest once you add
something like PoD, paging, or sharing.)

    

    
Agree with that, it should be moved before "if ( !mfn_valid(mfn) )"

Thanks.

~ Oleksii

  


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Date: Mon, 17 Nov 2025 17:00:39 +0100
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Subject: Re: [for 4.22 v5 17/18] xen/riscv: add support of page lookup by GFN
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 17.11.2025 16:52, Oleksii Kurochko wrote:
> On 11/10/25 5:46 PM, Jan Beulich wrote:
>> On 20.10.2025 17:58, Oleksii Kurochko wrote:
>>> +static bool check_outside_boundary(gfn_t gfn, gfn_t boundary, bool is_lower,
>>> +                                   unsigned int *level_out)
>>> +{
>>> +    unsigned int level;
>>> +
>>> +    if ( is_lower ? gfn_x(gfn) < gfn_x(boundary)
>>> +                  : gfn_x(gfn) > gfn_x(boundary) )
>>> +    {
>>> +        unsigned long mask = 0;
>>> +
>>> +        for ( level = P2M_ROOT_LEVEL; level; level-- )
>>> +        {
>>> +            unsigned long masked_gfn;
>>> +
>>> +            mask |= PFN_DOWN(P2M_LEVEL_MASK(level));
>>> +            masked_gfn = gfn_x(gfn) & mask;
>>> +
>>> +            if ( is_lower ? masked_gfn < gfn_x(boundary)
>>> +                          : masked_gfn > gfn_x(boundary) )
>>> +            {
>>> +                *level_out = level;
>> For this to be correct in the is_lower case, don't you need to fill the
>> bottom bits of masked_gfn with all 1s, rather than with all 0s? Otherwise
>> the tail of the range may be above boundary.
> 
> I think that I didn't get what you mean by "the range" here and so I can't understand
> what is "the tail of the range".
> Could you please clarify?

By applying "mask" you effectively produce a range (with "gfn" somewhere in
the middle). For the level (which you return to the caller) to be correct,
the entire range must be matching "gfn" in being below or above of the
boundary. My impression is that this isn't the case when is_lower is true.

Jan


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Subject: Re: [XEN][PATCH v4] xen/x86: guest_access: optimize raw_x_guest() for
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To: Grygorii Strashko 
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 14.11.2025 15:01, Grygorii Strashko wrote:
> From: Grygorii Strashko 
> 
> Xen uses below pattern for raw_x_guest() functions:
> 
> define raw_copy_to_guest(dst, src, len)        \
>     (is_hvm_vcpu(current) ?                     \
>      copy_to_user_hvm((dst), (src), (len)) :    \
>      copy_to_guest_pv(dst, src, len))
> 
> This pattern works depending on CONFIG_PV/CONFIG_HVM as:
> - PV=y and HVM=y
>   Proper guest access function is selected depending on domain type.
> - PV=y and HVM=n
>   Only PV domains are possible. is_hvm_domain/vcpu() will constify to "false"
>   and compiler will optimize code and skip HVM specific part.
> - PV=n and HVM=y
>   Only HVM domains are possible. is_hvm_domain/vcpu() will not be constified.
>   No PV specific code will be optimized by compiler.
> - PV=n and HVM=n
>   No guests should possible. The code will still follow PV path.
> 
> Rework raw_x_guest() code to use static inline functions which account for
> above PV/HVM possible configurations with main intention to optimize code
> for (PV=n and HVM=y) case.
> 
> For the case (PV=n and HVM=n) return "len" value indicating a failure (no
> guests should be possible in this case, which means no access to guest
> memory should ever happen).
> 
> Finally move arch/x86/usercopy.c into arch/x86/pv/usercopy.c to use it only
> with PV=y.
> 
> The measured (bloat-o-meter) improvement for (PV=n and HVM=y) case is:
>   add/remove: 3/8 grow/shrink: 3/89 up/down: 1018/-12087 (-11069)
>   Total: Before=1937280, After=1926211, chg -0.57%
> 
> [teddy.astie@vates.tech: Suggested to use static inline functions vs
> macro combinations]
> Suggested-by: Teddy Astie 
> Signed-off-by: Grygorii Strashko 
> Reviewed-by: Jason Andryuk 

I would guess that this R-b would have needed dropping, ...

> ---
> changes in v4:
> - move usercopy.c into arch/x86/pv/
> - rework to always dynamically check for HVM vcpu(domain) by using is_hvm_vcpu()
>   as requested by Jan Beulich

... with at least the latter of these two changes.

> --- a/xen/arch/x86/pv/Makefile
> +++ b/xen/arch/x86/pv/Makefile
> @@ -14,6 +14,10 @@ obj-y += ro-page-fault.o
>  obj-$(CONFIG_PV_SHIM) += shim.o
>  obj-$(CONFIG_TRACEBUFFER) += trace.o
>  obj-y += traps.o
> +obj-$(CONFIG_PV) += usercopy.o

Just obj-y with the movement.

However, is the movement (and was the adding of $(CONFIG_PV) in the earlier
version) actually correct? The file also produces copy_{from,to}_unsafe_ll(),
which aren't PV-specific. This may be only a latent issue right now, as we
have only a single use site of copy_from_unsafe(), but those functions need
to remain available. (We may want to arrange for them to be removed when
linking, as long as they're not referenced. But that's a separate topic.)

Jan


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Date: Mon, 17 Nov 2025 17:52:13 +0100
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Subject: Re: [XEN][PATCH v3] xen: make VMTRACE support optional
To: Grygorii Strashko 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 Stefano Stabellini ,
 Tamas K Lengyel ,
 Alexandru Isaila ,
 Petre Pircalabu ,
 Teddy Astie , Penny Zheng ,
 "xen-devel@lists.xenproject.org" 
References: <20251114142207.279834-1-grygorii_strashko@epam.com>
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From: Jan Beulich 
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On 14.11.2025 15:22, Grygorii Strashko wrote:
> --- a/xen/arch/x86/hvm/Kconfig
> +++ b/xen/arch/x86/hvm/Kconfig
> @@ -35,6 +35,18 @@ config INTEL_VMX
>  	  If your system includes a processor with Intel VT-x support, say Y.
>  	  If in doubt, say Y.
>  
> +config VMTRACE
> +    bool "HW VM tracing support"
> +    depends on INTEL_VMX
> +    default y
> +    help
> +      Enables HW VM tracing support which allows to configure HW processor
> +      features (vmtrace_op) to enable capturing information about software
> +      execution using dedicated hardware facilities with minimal interference
> +      to the software being traced. The trace data can be retrieved using buffer
> +      shared between Xen and domain
> +      (see XENMEM_acquire_resource(XENMEM_resource_vmtrace_buf)).

Please check adjacent options above or ...

>  config HVM_FEP
>  	bool "HVM Forced Emulation Prefix support (UNSUPPORTED)" if UNSUPPORTED
>  	default DEBUG

... below for how proper indentation would look like here.

> --- a/xen/arch/x86/hvm/vmx/vmcs.c
> +++ b/xen/arch/x86/hvm/vmx/vmcs.c
> @@ -307,6 +307,7 @@ static int vmx_init_vmcs_config(bool bsp)
>      rdmsrl(MSR_IA32_VMX_MISC, _vmx_misc_cap);
>  
>      /* Check whether IPT is supported in VMX operation. */
> +#ifdef CONFIG_VMTRACE

This imo wants to move ahead of the comment. (Feels a little like I may have
said so already, but it may well have been in the context of a different
recent patch.)

> @@ -772,13 +775,24 @@ static inline int hvm_vmtrace_get_option(
>  
>      return -EOPNOTSUPP;
>  }
> +#else
> +/*
> + * Function declaration(s) here are used without definition(s) to make compiler
> + * happy when VMTRACE=n, compiler DCE will eliminate unused code.
> + */
> +int hvm_vmtrace_output_position(struct vcpu *v, uint64_t *pos);
> +#endif
>  
>  static inline int hvm_vmtrace_reset(struct vcpu *v)
>  {
> +#ifdef CONFIG_VMTRACE
>      if ( hvm_funcs.vmtrace_reset )
>          return alternative_call(hvm_funcs.vmtrace_reset, v);
>  
>      return -EOPNOTSUPP;
> +#else
> +    return -EOPNOTSUPP;
> +#endif

No #else please and the #endif moved up.

> --- a/xen/arch/x86/vm_event.c
> +++ b/xen/arch/x86/vm_event.c
> @@ -253,7 +253,8 @@ void vm_event_fill_regs(vm_event_request_t *req)
>      req->data.regs.x86.shadow_gs = ctxt.shadow_gs;
>      req->data.regs.x86.dr6 = ctxt.dr6;
>  
> -    if ( hvm_vmtrace_output_position(curr, &req->data.regs.x86.vmtrace_pos) != 1 )
> +    if ( IS_ENABLED(CONFIG_VMTRACE) &&
> +         hvm_vmtrace_output_position(curr, &req->data.regs.x86.vmtrace_pos) != 1 )

Would be nice if the too-long-line issue here was also address, when the line
needs touching anyway.

Jan


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On 13.11.2025 09:50, Andrew Cooper wrote:
> On 12/11/2025 4:22 pm, Alejandro Vallejo wrote:
>>  xen/arch/x86/Kconfig                    | 12 ++++
>>  xen/arch/x86/cpu/microcode/Makefile     |  9 ++-
>>  xen/arch/x86/cpu/microcode/amd-base.c   | 55 +++++++++++++++++++
>>  xen/arch/x86/cpu/microcode/amd.c        | 55 ++-----------------
>>  xen/arch/x86/cpu/microcode/amd.h        | 15 +++++
>>  xen/arch/x86/cpu/microcode/base.c       | 73 +++++++++++++++++++++++++
>>  xen/arch/x86/cpu/microcode/core.c       | 58 +-------------------
>>  xen/arch/x86/cpu/microcode/intel-base.c | 50 +++++++++++++++++
>>  xen/arch/x86/cpu/microcode/intel.c      | 56 +++----------------
>>  xen/arch/x86/cpu/microcode/intel.h      | 16 ++++++
>>  xen/arch/x86/cpu/microcode/private.h    | 14 +++++
>>  xen/arch/x86/efi/efi-boot.h             |  2 +-
>>  xen/arch/x86/platform_hypercall.c       |  2 +
>>  13 files changed, 259 insertions(+), 158 deletions(-)
>>  create mode 100644 xen/arch/x86/cpu/microcode/amd-base.c
>>  create mode 100644 xen/arch/x86/cpu/microcode/amd.h
>>  create mode 100644 xen/arch/x86/cpu/microcode/base.c
>>  create mode 100644 xen/arch/x86/cpu/microcode/intel-base.c
>>  create mode 100644 xen/arch/x86/cpu/microcode/intel.h
> 
> This is awfully invasive for something that ultimately drops only a
> handful of lines of code.
> 
> First, it should be CONFIG_MICROCODE_LOADING.  We're not getting rid of
> all microcode capabilities.  Also, of all the places where UCODE needs
> expanding properly, it's Kconfig.
> 
> Next, annotate the functions that you conditionally don't reference in
> {amd,intel}_ucode_ops with __maybe_unused, and dead code elimination
> should do the rest.

Are you, btw, sure this would be Misra-compliant? Right now we solely
deviate __maybe_unused when used on labels which may really be unused,
afaics.

Jan


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On 10/07/2025 3:24 pm, Jan Beulich wrote:
> Use an existing macro instead of open-coding the operation and flags
> handling, just like we already do in x86_emul_rmw(). While possibly
> yielding slightly larger compiled code, it's easier to maintain this
> way.
>
> Note that the setting of dst.orig_val was already redundant with that
> done ahead of the main switch() (where DST_MEM is handled), the latest
> as of 4e59f578cb75 ("x86emul: simplify SHLD/SHRD handling").
>
> Signed-off-by: Jan Beulich 

Reviewed-by: Andrew Cooper 


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Subject: Re: [for 4.22 v5 18/18] xen/riscv: introduce metadata table to store
 P2M type
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
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 <6a5a9f4e-1f0e-453f-b1d1-d0e2acf97e2a@suse.com>
Content-Language: en-US
From: Oleksii Kurochko 
In-Reply-To: <6a5a9f4e-1f0e-453f-b1d1-d0e2acf97e2a@suse.com>

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On 11/12/25 12:49 PM, Jan Beulich wrote:
> On 20.10.2025 17:58, Oleksii Kurochko wrote:
>> --- a/xen/arch/riscv/p2m.c
>> +++ b/xen/arch/riscv/p2m.c
>> @@ -20,6 +20,16 @@
>>   
>>   #define P2M_SUPPORTED_LEVEL_MAPPING 2
>>   
>> +/*
>> + * P2M PTE context is used only when a PTE's P2M type is p2m_ext_storage.
>> + * In this case, the P2M type is stored separately in the metadata page.
>> + */
>> +struct p2m_pte_ctx {
>> +    struct page_info *pt_page;   /* Page table page containing the PTE. */
>> +    unsigned int index;          /* Index of the PTE within that page. */
>> +    unsigned int level;          /* Paging level at which the PTE resides. */
>> +};
>> +
>>   unsigned char __ro_after_init gstage_mode;
>>   unsigned int __ro_after_init gstage_root_level;
>>   
>> @@ -363,24 +373,89 @@ static struct page_info *p2m_alloc_page(struct p2m_domain *p2m)
>>       return pg;
>>   }
>>   
>> -static int p2m_set_type(pte_t *pte, p2m_type_t t)
>> +/*
>> + * `pte` – PTE entry for which the type `t` will be stored.
>> + *
>> + * If `t` is `p2m_ext_storage`, both `ctx` and `p2m` must be provided;
>> + * otherwise, only p2m may be NULL.
>> + */
>> +static void p2m_set_type(pte_t *pte, const p2m_type_t t,
>> +                         struct p2m_pte_ctx *ctx,
>> +                         struct p2m_domain *p2m)
>>   {
>> -    int rc = 0;
>> +    struct page_info **md_pg;
>> +    pte_t *metadata = NULL;
> I'm not convinced it is a good idea to re-use pte_t for this purpose. If you used
> a separate type, and if then you defined that as a bitfield with only a few bits
> dedicated to type, future changes (additions) may be quite a bit easier.

Make sense, then lets go with the following structure:
   struct md_t {
       /*
        * Describes a type stored outside the PTE.
        * Look at the comment above definition of enum p2m_type_t.
        */
       p2m_type_t type : 4;
   };

>
>> -    if ( t > p2m_first_external )
>> -        panic("unimplemeted\n");
>> -    else
>> +    ASSERT(p2m);
>> +
>> +     /* Be sure that an index correspondent to page level is passed. */
>> +    ASSERT(ctx && ctx->index < P2M_PAGETABLE_ENTRIES(ctx->level));
>> +
>> +    /*
>> +     * For the root page table (16 KB in size), we need to select the correct
>> +     * metadata table, since allocations are 4 KB each. In total, there are
>> +     * 4 tables of 4 KB each.
>> +     * For none-root page table index of ->pt_page[] will be always 0 as
>> +     * index won't be higher then 511. ASSERT() above verifies that.
>> +     */
>> +    md_pg = &ctx->pt_page[ctx->index / PAGETABLE_ENTRIES].v.md.pg;
>> +
>> +    if ( !*md_pg && (t >= p2m_first_external) )
>> +    {
>> +        BUG_ON(ctx->level > P2M_SUPPORTED_LEVEL_MAPPING);
>> +
>> +        if ( ctx->level <= P2M_SUPPORTED_LEVEL_MAPPING )
>> +        {
>> +            struct domain *d = p2m->domain;
> This is (if at all) needed only ...
>
>> +            *md_pg = p2m_alloc_page(p2m);
>> +            if ( !*md_pg )
>> +            {
> ... in this more narrow scope.
>
>> +                printk("%s: can't allocate extra memory for dom%d\n",
>> +                       __func__, d->domain_id);
> The logging text isn't specific enough for my taste. For ordinary printk()s I'd
> also recommend against use of __func__ (that's fine for dprintk()).

I will update the message to:
   printk("%pd: can't allocate metadata page\n", p2m->domain);


>
> Also please us %pd in such cases.
>
>> +                domain_crash(d);
>> +
>> +                return;
>> +            }
>> +        }
>> +    }
>> +
>> +    if ( *md_pg )
>> +        metadata = __map_domain_page(*md_pg);
>> +
>> +    if ( t < p2m_first_external )
>> +    {
>>           pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK);
>>   
>> -    return rc;
>> +        if ( metadata )
>> +            metadata[ctx->index].pte = p2m_invalid;
> Shouldn't this be accompanied with a BUILD_BUG_ON(p2m_invalid), as otherwise
> p2m_alloc_page()'s clearing of the page won't have the intended effect?

I think that, at least, at the moment we are always explicitly set p2m type and
do not rely on that by default 0==p2m_invalid.

Just to be safe, I will add after "if ( metadata )" suggested
BUILD_BUG_ON(p2m_invalid):
         if ( metadata )
             metadata[ctx->index].type = p2m_invalid;
         
         /*
          * metadata.type is expected to be p2m_invalid (0) after the page is
          * allocated and zero-initialized in p2m_alloc_page().
          */
         BUILD_BUG_ON(p2m_invalid);
...

>
>> +    }
>> +    else
>> +    {
>> +        pte->pte |= MASK_INSR(p2m_ext_storage, P2M_TYPE_PTE_BITS_MASK);
>> +
>> +        metadata[ctx->index].pte = t;
> If you set t to p2m_ext_storage here, the pte->pte updating could be moved ...

't' shouldn't be passed as 'p2m_ext_storage'.
For example, in this case we will have that in metadata page we will have type
equal to p2m_ext_storage and then in pte->pte will have the type set to
p2m_ext_storage, and the we end that we don't have a real type stored somewhere.
Even more, metadata.pte shouldn't be used to store p2m_ext_storage, only
p2m_invalid and types mentioned in enum p2m_t after p2m_ext_storage.

>
>> +    }
> ... here, covering both cases. Overally this may then be easier as
>
>      if ( t >= p2m_first_external )
>          metadata[ctx->index].pte = t;
>      else if ( metadata )
>          metadata[ctx->index].pte = p2m_invalid;
>
>      pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK);
>
> Then raising the question whether it couldn't still be the real type that's
> stored in metadata[] even for t < p2m_first_external. That woiuld further
> reduce conditionals.

It would be nice, but I think that at the moment we can’t do that. As I explained
above, 't' should not normally be passed as p2m_ext_storage. If we want to
handle this properly, I would need to update the code to:

     if (!*md_pg && (t > p2m_first_external))

Alternatively, we could set p2m_first_external = p2m_map_foreign_rw instead of
p2m_ext_storage, since p2m_ext_storage is technically just a marker indicating
that the type is stored elsewhere.

We should also add a BUG_ON(t == p2m_ext_storage) before the if-condition
mentioned above.

>
>> @@ -470,7 +545,15 @@ static void p2m_set_permission(pte_t *e, p2m_type_t t)
>>       }
>>   }
>>   
>> -static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t, bool is_table)
>> +/*
>> + * If p2m_pte_from_mfn() is called with p2m_pte_ctx = NULL and p2m = NULL,
>> + * it means the function is working with a page table for which the `t`
>> + * should not be applicable. Otherwise, the function is handling a leaf PTE
>> + * for which `t` is applicable.
>> + */
>> +static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t,
>> +                              struct p2m_pte_ctx *p2m_pte_ctx,
>> +                              struct p2m_domain *p2m)
>>   {
>>       pte_t e = (pte_t) { PTE_VALID };
>>   
>> @@ -478,7 +561,7 @@ static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t, bool is_table)
>>   
>>       ASSERT(!(mfn_to_maddr(mfn) & ~PADDR_MASK) || mfn_eq(mfn, INVALID_MFN));
>>   
>> -    if ( !is_table )
>> +    if ( p2m_pte_ctx && p2m )
>>       {
> Maybe better
>
>      if ( p2m_pte_ctx )
>      {
>          ASSERT(p2m);
>          ...
>
> (if you really think the 2nd check is needed)?

It seems like we don't really need it as p2m_set_type() has the same ASSERT() at the start.
I will double-check why I've added it and drop  if it was not very specific reason.

>
>> @@ -506,12 +589,19 @@ static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t, bool is_table)
>>   /* Generate table entry with correct attributes. */
>>   static pte_t page_to_p2m_table(const struct page_info *page)
>>   {
>> -    /*
>> -     * p2m_invalid will be ignored inside p2m_pte_from_mfn() as is_table is
>> -     * set to true and p2m_type_t shouldn't be applied for PTEs which
>> -     * describe an intermidiate table.
>> -     */
>> -    return p2m_pte_from_mfn(page_to_mfn(page), p2m_invalid, true);
>> +    return p2m_pte_from_mfn(page_to_mfn(page), p2m_invalid, NULL, NULL);
>> +}
> How come the comment is dropped? If you deem it unecessary, why was it added
> earlier in this same series?

It is still relevant. Something went wrong during rebase and conflict resolving. Thanks for
finding that.

>
>> +static void p2m_free_page(struct p2m_domain *p2m, struct page_info *pg);
>> +
>> +/*
>> + * Free page table's page and metadata page linked to page table's page.
>> + */
>> +static void p2m_free_table(struct p2m_domain *p2m, struct page_info *tbl_pg)
>> +{
>> +    if ( tbl_pg->v.md.pg )
>> +        p2m_free_page(p2m, tbl_pg->v.md.pg);
> To play safe, maybe better also clear tbl_pg->v.md.pg?

I thought it would be enough to clear it during allocation in p2m_alloc_page(),
since I'm not sure it is critical if md.pg data were somehow leaked and read.
But to be safer, we can add this here:
    clear_and_clean_page(tbl_pg->v.md.pg, p2m->clean_dcache);

>
>> @@ -749,6 +849,10 @@ static bool p2m_split_superpage(struct p2m_domain *p2m, pte_t *entry,
>>       unsigned int next_level = level - 1;
>>       unsigned int level_order = P2M_LEVEL_ORDER(next_level);
>>   
>> +    struct p2m_pte_ctx p2m_pte_ctx;
> I think this would better be one variable instance per scope where it's needed,
> and then using an initzializer. Or else ...
>
>> +    /* Init with p2m_invalid just to make compiler happy. */
>> +    p2m_type_t old_type = p2m_invalid;
>> +
>>       /*
>>        * This should only be called with target != level and the entry is
>>        * a superpage.
>> @@ -770,6 +874,19 @@ static bool p2m_split_superpage(struct p2m_domain *p2m, pte_t *entry,
>>   
>>       table = __map_domain_page(page);
>>   
>> +    if ( MASK_EXTR(entry->pte, P2M_TYPE_PTE_BITS_MASK) == p2m_ext_storage )
>> +    {
>> +        p2m_pte_ctx.pt_page = tbl_pg;
>> +        p2m_pte_ctx.index = offsets[level];
>> +        /*
>> +         * It doesn't really matter what is a value for a level as
>> +         * p2m_get_type() doesn't need it, so it is initialized just in case.
>> +         */
>> +        p2m_pte_ctx.level = level;
>> +
>> +        old_type = p2m_get_type(*entry, &p2m_pte_ctx);
>> +    }
>> +
>>       for ( i = 0; i < P2M_PAGETABLE_ENTRIES(next_level); i++ )
>>       {
>>           pte_t *new_entry = table + i;
>> @@ -781,6 +898,15 @@ static bool p2m_split_superpage(struct p2m_domain *p2m, pte_t *entry,
>>           pte = *entry;
>>           pte_set_mfn(&pte, mfn_add(mfn, i << level_order));
>>   
>> +        if ( MASK_EXTR(pte.pte, P2M_TYPE_PTE_BITS_MASK) == p2m_ext_storage )
>> +        {
>> +            p2m_pte_ctx.pt_page = page;
>> +            p2m_pte_ctx.index = i;
>> +            p2m_pte_ctx.level = next_level;
> ... why are the loop-invariat fields not filled ahead of the loop here?

Actually, they could be filled before the loop. If I move the initialization of
p2m_pte_ctx.pt_page and p2m_pte_ctx.level ahead of the loop, does it still make
sense to have a separate variable inside
"if (MASK_EXTR(entry->pte, P2M_TYPE_PTE_BITS_MASK) == p2m_ext_storage)"?

>
>> @@ -927,7 +1061,13 @@ static int p2m_set_entry(struct p2m_domain *p2m,
>>           p2m_clean_pte(entry, p2m->clean_dcache);
>>       else
>>       {
>> -        pte_t pte = p2m_pte_from_mfn(mfn, t, false);
>> +        struct p2m_pte_ctx tmp_ctx = {
>> +            .pt_page = mfn_to_page(domain_page_map_to_mfn(table)),
>> +            .index =  offsets[level],
> Nit: Stray blank.
>
>> @@ -1153,7 +1301,14 @@ static mfn_t p2m_get_entry(struct p2m_domain *p2m, gfn_t gfn,
>>       if ( pte_is_valid(entry) )
>>       {
>>           if ( t )
>> -            *t = p2m_get_type(entry);
>> +        {
>> +            struct p2m_pte_ctx p2m_pte_ctx = {
>> +                .pt_page = mfn_to_page(domain_page_map_to_mfn(table)),
>> +                .index = offsets[level],
>> +            };
> .level not being set here?

It isn't used in the case when p2m_get_type() is called, but just for consistency and to
be sure that nothing will be broken if an implemnatation of p2m_get_type() will change,
I will add:
  .level = level,

Thanks.

~ Oleksii

--------------93UWKmCx80UaqdW07reU00oC
Content-Type: text/html; charset=UTF-8
Content-Transfer-Encoding: 8bit



  
    
  
  
    


    

    
On 11/12/25 12:49 PM, Jan Beulich
      wrote:

    

    

      
On 20.10.2025 17:58, Oleksii Kurochko wrote:


      

        
--- a/xen/arch/riscv/p2m.c
+++ b/xen/arch/riscv/p2m.c
@@ -20,6 +20,16 @@
 
 #define P2M_SUPPORTED_LEVEL_MAPPING 2
 
+/*
+ * P2M PTE context is used only when a PTE's P2M type is p2m_ext_storage.
+ * In this case, the P2M type is stored separately in the metadata page.
+ */
+struct p2m_pte_ctx {
+    struct page_info *pt_page;   /* Page table page containing the PTE. */
+    unsigned int index;          /* Index of the PTE within that page. */
+    unsigned int level;          /* Paging level at which the PTE resides. */
+};
+
 unsigned char __ro_after_init gstage_mode;
 unsigned int __ro_after_init gstage_root_level;
 
@@ -363,24 +373,89 @@ static struct page_info *p2m_alloc_page(struct p2m_domain *p2m)
     return pg;
 }
 
-static int p2m_set_type(pte_t *pte, p2m_type_t t)
+/*
+ * `pte` – PTE entry for which the type `t` will be stored.
+ *
+ * If `t` is `p2m_ext_storage`, both `ctx` and `p2m` must be provided;
+ * otherwise, only p2m may be NULL.
+ */
+static void p2m_set_type(pte_t *pte, const p2m_type_t t,
+                         struct p2m_pte_ctx *ctx,
+                         struct p2m_domain *p2m)
 {
-    int rc = 0;
+    struct page_info **md_pg;
+    pte_t *metadata = NULL;


      

      
I'm not convinced it is a good idea to re-use pte_t for this purpose. If you used
a separate type, and if then you defined that as a bitfield with only a few bits
dedicated to type, future changes (additions) may be quite a bit easier.

    

    
Make sense, then lets go with the following structure:
  struct md_t {
      /*
       * Describes a type stored outside the PTE.
       * Look at the comment above definition of enum p2m_type_t.
       */
      p2m_type_t type : 4;
  };



    

      



      

        
-    if ( t > p2m_first_external )
-        panic("unimplemeted\n");
-    else
+    ASSERT(p2m);
+
+     /* Be sure that an index correspondent to page level is passed. */
+    ASSERT(ctx && ctx->index < P2M_PAGETABLE_ENTRIES(ctx->level));
+
+    /*
+     * For the root page table (16 KB in size), we need to select the correct
+     * metadata table, since allocations are 4 KB each. In total, there are
+     * 4 tables of 4 KB each.
+     * For none-root page table index of ->pt_page[] will be always 0 as
+     * index won't be higher then 511. ASSERT() above verifies that.
+     */
+    md_pg = &ctx->pt_page[ctx->index / PAGETABLE_ENTRIES].v.md.pg;
+
+    if ( !*md_pg && (t >= p2m_first_external) )
+    {
+        BUG_ON(ctx->level > P2M_SUPPORTED_LEVEL_MAPPING);
+
+        if ( ctx->level <= P2M_SUPPORTED_LEVEL_MAPPING )
+        {
+            struct domain *d = p2m->domain;


      

      
This is (if at all) needed only ...



      

        
+            *md_pg = p2m_alloc_page(p2m);
+            if ( !*md_pg )
+            {


      

      
... in this more narrow scope.



      

        
+                printk("%s: can't allocate extra memory for dom%d\n",
+                       __func__, d->domain_id);


      

      
The logging text isn't specific enough for my taste. For ordinary printk()s I'd
also recommend against use of __func__ (that's fine for dprintk()).

    

    
I will update the message to:
  printk("%pd: can't allocate metadata page\n", p2m->domain);

    


    

    

      

Also please us %pd in such cases.



      

        
+                domain_crash(d);
+
+                return;
+            }
+        }
+    }
+
+    if ( *md_pg )
+        metadata = __map_domain_page(*md_pg);
+
+    if ( t < p2m_first_external )
+    {
         pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK);
 
-    return rc;
+        if ( metadata )
+            metadata[ctx->index].pte = p2m_invalid;


      

      
Shouldn't this be accompanied with a BUILD_BUG_ON(p2m_invalid), as otherwise
p2m_alloc_page()'s clearing of the page won't have the intended effect?

    

    
I think that, at least, at the moment we are always explicitly set p2m type and
do not rely on that by default 0==p2m_invalid.

Just to be safe, I will add after "if ( metadata )" suggested
BUILD_BUG_ON(p2m_invalid):
        if ( metadata )
            metadata[ctx->index].type = p2m_invalid;
        
        /*
         * metadata.type is expected to be p2m_invalid (0) after the page is
         * allocated and zero-initialized in p2m_alloc_page().
         */
        BUILD_BUG_ON(p2m_invalid);
...



    

      



      

        
+    }
+    else
+    {
+        pte->pte |= MASK_INSR(p2m_ext_storage, P2M_TYPE_PTE_BITS_MASK);
+
+        metadata[ctx->index].pte = t;


      

      
If you set t to p2m_ext_storage here, the pte->pte updating could be moved ...

    

    
't' shouldn't be passed as 'p2m_ext_storage'.
For example, in this case we will have that in metadata page we will have type
equal to p2m_ext_storage and then in pte->pte will have the type set to
p2m_ext_storage, and the we end that we don't have a real type stored somewhere.
Even more, metadata.pte shouldn't be used to store p2m_ext_storage, only
p2m_invalid and types mentioned in enum p2m_t after p2m_ext_storage.

    

      



      

        
+    }


      

      
... here, covering both cases. Overally this may then be easier as

    if ( t >= p2m_first_external )
        metadata[ctx->index].pte = t;
    else if ( metadata )
        metadata[ctx->index].pte = p2m_invalid;

    pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK);

Then raising the question whether it couldn't still be the real type that's
stored in metadata[] even for t < p2m_first_external. That woiuld further
reduce conditionals.

    

    
It would be nice, but I think that at the moment we can’t do that. As I explained
above, 't' should not normally be passed as p2m_ext_storage. If we want to
handle this properly, I would need to update the code to:

    if (!*md_pg && (t > p2m_first_external))

Alternatively, we could set p2m_first_external = p2m_map_foreign_rw instead of
p2m_ext_storage, since p2m_ext_storage is technically just a marker indicating
that the type is stored elsewhere.

We should also add a BUG_ON(t == p2m_ext_storage) before the if-condition
mentioned above.




    

      



      

        
@@ -470,7 +545,15 @@ static void p2m_set_permission(pte_t *e, p2m_type_t t)
     }
 }
 
-static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t, bool is_table)
+/*
+ * If p2m_pte_from_mfn() is called with p2m_pte_ctx = NULL and p2m = NULL,
+ * it means the function is working with a page table for which the `t`
+ * should not be applicable. Otherwise, the function is handling a leaf PTE
+ * for which `t` is applicable.
+ */
+static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t,
+                              struct p2m_pte_ctx *p2m_pte_ctx,
+                              struct p2m_domain *p2m)
 {
     pte_t e = (pte_t) { PTE_VALID };
 
@@ -478,7 +561,7 @@ static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t, bool is_table)
 
     ASSERT(!(mfn_to_maddr(mfn) & ~PADDR_MASK) || mfn_eq(mfn, INVALID_MFN));
 
-    if ( !is_table )
+    if ( p2m_pte_ctx && p2m )
     {


      

      
Maybe better

    if ( p2m_pte_ctx )
    {
        ASSERT(p2m);
        ...

(if you really think the 2nd check is needed)?

    

    
It seems like we don't really need it as p2m_set_type() has the same ASSERT() at the start.
I will double-check why I've added it and drop  if it was not very specific reason.



    

      



      

        
@@ -506,12 +589,19 @@ static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t, bool is_table)
 /* Generate table entry with correct attributes. */
 static pte_t page_to_p2m_table(const struct page_info *page)
 {
-    /*
-     * p2m_invalid will be ignored inside p2m_pte_from_mfn() as is_table is
-     * set to true and p2m_type_t shouldn't be applied for PTEs which
-     * describe an intermidiate table.
-     */
-    return p2m_pte_from_mfn(page_to_mfn(page), p2m_invalid, true);
+    return p2m_pte_from_mfn(page_to_mfn(page), p2m_invalid, NULL, NULL);
+}


      

      
How come the comment is dropped? If you deem it unecessary, why was it added
earlier in this same series?

    

    
It is still relevant. Something went wrong during rebase and conflict resolving. Thanks for
finding that.



    

      



      

        
+static void p2m_free_page(struct p2m_domain *p2m, struct page_info *pg);
+
+/*
+ * Free page table's page and metadata page linked to page table's page.
+ */
+static void p2m_free_table(struct p2m_domain *p2m, struct page_info *tbl_pg)
+{
+    if ( tbl_pg->v.md.pg )
+        p2m_free_page(p2m, tbl_pg->v.md.pg);


      

      
To play safe, maybe better also clear tbl_pg->v.md.pg?

    

    
I thought it would be enough to clear it during allocation in p2m_alloc_page(),
since I'm not sure it is critical if md.pg data were somehow leaked and read.
But to be safer, we can add this here:
   clear_and_clean_page(tbl_pg->v.md.pg, p2m->clean_dcache);



    

      



      

        
@@ -749,6 +849,10 @@ static bool p2m_split_superpage(struct p2m_domain *p2m, pte_t *entry,
     unsigned int next_level = level - 1;
     unsigned int level_order = P2M_LEVEL_ORDER(next_level);
 
+    struct p2m_pte_ctx p2m_pte_ctx;


      

      
I think this would better be one variable instance per scope where it's needed,
and then using an initzializer. Or else ...



      

        
+    /* Init with p2m_invalid just to make compiler happy. */
+    p2m_type_t old_type = p2m_invalid;
+
     /*
      * This should only be called with target != level and the entry is
      * a superpage.
@@ -770,6 +874,19 @@ static bool p2m_split_superpage(struct p2m_domain *p2m, pte_t *entry,
 
     table = __map_domain_page(page);
 
+    if ( MASK_EXTR(entry->pte, P2M_TYPE_PTE_BITS_MASK) == p2m_ext_storage )
+    {
+        p2m_pte_ctx.pt_page = tbl_pg;
+        p2m_pte_ctx.index = offsets[level];
+        /*
+         * It doesn't really matter what is a value for a level as
+         * p2m_get_type() doesn't need it, so it is initialized just in case.
+         */
+        p2m_pte_ctx.level = level;
+
+        old_type = p2m_get_type(*entry, &p2m_pte_ctx);
+    }
+
     for ( i = 0; i < P2M_PAGETABLE_ENTRIES(next_level); i++ )
     {
         pte_t *new_entry = table + i;
@@ -781,6 +898,15 @@ static bool p2m_split_superpage(struct p2m_domain *p2m, pte_t *entry,
         pte = *entry;
         pte_set_mfn(&pte, mfn_add(mfn, i << level_order));
 
+        if ( MASK_EXTR(pte.pte, P2M_TYPE_PTE_BITS_MASK) == p2m_ext_storage )
+        {
+            p2m_pte_ctx.pt_page = page;
+            p2m_pte_ctx.index = i;
+            p2m_pte_ctx.level = next_level;


      

      
... why are the loop-invariat fields not filled ahead of the loop here?

    

    
Actually, they could be filled before the loop. If I move the initialization of
p2m_pte_ctx.pt_page and p2m_pte_ctx.level ahead of the loop, does it still make
sense to have a separate variable inside
"if (MASK_EXTR(entry->pte, P2M_TYPE_PTE_BITS_MASK) == p2m_ext_storage)"?

    

      



      

        
@@ -927,7 +1061,13 @@ static int p2m_set_entry(struct p2m_domain *p2m,
         p2m_clean_pte(entry, p2m->clean_dcache);
     else
     {
-        pte_t pte = p2m_pte_from_mfn(mfn, t, false);
+        struct p2m_pte_ctx tmp_ctx = {
+            .pt_page = mfn_to_page(domain_page_map_to_mfn(table)),
+            .index =  offsets[level],


      

      
Nit: Stray blank.



      

        
@@ -1153,7 +1301,14 @@ static mfn_t p2m_get_entry(struct p2m_domain *p2m, gfn_t gfn,
     if ( pte_is_valid(entry) )
     {
         if ( t )
-            *t = p2m_get_type(entry);
+        {
+            struct p2m_pte_ctx p2m_pte_ctx = {
+                .pt_page = mfn_to_page(domain_page_map_to_mfn(table)),
+                .index = offsets[level],
+            };


      

      
.level not being set here?

    

    
It isn't used in the case when p2m_get_type() is called, but just for consistency and to
be sure that nothing will be broken if an implemnatation of p2m_get_type() will change,
I will add: 
 .level = level,

Thanks.

~ Oleksii

  


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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH 1/3] x86/ucode: Fix error handling during parallel ucode load
Date: Mon, 17 Nov 2025 22:21:18 +0000
Message-Id: <20251117222120.473451-2-andrew.cooper3@citrix.com>
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wait_for_state() returns false on encountering LOADING_EXIT.
control_thread_fn() can move directly to this state in the case of an early
error.  It is not an error condition for APs, but right now the latest write
into stopmachine_data.fn_result wins, causing the real error, -EIO, to get
clobbered with -EBUSY.  e.g.:

  # xen-ucode /lib/firmware/amd-ucode/microcode_amd_fam17h.bin --force
  Failed to update microcode. (err: Device or resource busy)

  (XEN) 256 cores are to update their microcode
  (XEN) microcode: CPU0 update rev 0x830107d to 0x830107c failed, result 0x830107d
  (XEN) Late loading aborted: CPU0 failed to update ucode: -5

Drop all the -EBUSY's, and treat hitting LOADING_EXIT as a success case.  This
causes only a single error to be returned through stop_machine_run().  e.g.:

  # xen-ucode /lib/firmware/amd-ucode/microcode_amd_fam17h.bin --force
  Failed to update microcode. (err: Input/output error)

  (XEN) 256 cores are to update their microcode
  (XEN) microcode: CPU0 update rev 0x830107d to 0x830107c failed, result 0x830107d
  (XEN) Late loading aborted: CPU0 failed to update ucode: -5

Fixes: 5ed12565aa32 ("microcode: rendezvous CPUs in NMI handler and load ucode")
Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 

Xen 4.19 and earlier hit this case naturally, without the need of --force.
---
 xen/arch/x86/cpu/microcode/core.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/xen/arch/x86/cpu/microcode/core.c b/xen/arch/x86/cpu/microcode/core.c
index 1d1a5aa4b097..ecee400f28a6 100644
--- a/xen/arch/x86/cpu/microcode/core.c
+++ b/xen/arch/x86/cpu/microcode/core.c
@@ -260,7 +260,9 @@ static int secondary_nmi_work(void)
 {
     cpumask_set_cpu(smp_processor_id(), &cpu_callin_map);
 
-    return wait_for_state(LOADING_EXIT) ? 0 : -EBUSY;
+    wait_for_state(LOADING_EXIT);
+
+    return 0;
 }
 
 static int primary_thread_work(const struct microcode_patch *patch,
@@ -271,7 +273,7 @@ static int primary_thread_work(const struct microcode_patch *patch,
     cpumask_set_cpu(smp_processor_id(), &cpu_callin_map);
 
     if ( !wait_for_state(LOADING_ENTER) )
-        return -EBUSY;
+        return 0;
 
     ret = alternative_call(ucode_ops.apply_microcode, patch, flags);
     if ( !ret )
@@ -313,7 +315,7 @@ static int cf_check microcode_nmi_callback(
 static int secondary_thread_fn(void)
 {
     if ( !wait_for_state(LOADING_CALLIN) )
-        return -EBUSY;
+        return 0;
 
     self_nmi();
 
@@ -336,7 +338,7 @@ static int primary_thread_fn(const struct microcode_patch *patch,
                              unsigned int flags)
 {
     if ( !wait_for_state(LOADING_CALLIN) )
-        return -EBUSY;
+        return 0;
 
     if ( ucode_in_nmi )
     {
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH 2/3] x86/ucode: Drop structurally unreachable ASSERT()s
Date: Mon, 17 Nov 2025 22:21:19 +0000
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It's impossible for wait_for_state() to return false when looking for
LOADING_EXIT, so much so that the optimiser can drop the ASSERT()s.

No functional change.

Fixes: 5ed12565aa32 ("microcode: rendezvous CPUs in NMI handler and load ucode")
Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 
---
 xen/arch/x86/cpu/microcode/core.c | 16 ++++++----------
 1 file changed, 6 insertions(+), 10 deletions(-)

diff --git a/xen/arch/x86/cpu/microcode/core.c b/xen/arch/x86/cpu/microcode/core.c
index ecee400f28a6..7aaf62839f56 100644
--- a/xen/arch/x86/cpu/microcode/core.c
+++ b/xen/arch/x86/cpu/microcode/core.c
@@ -320,12 +320,10 @@ static int secondary_thread_fn(void)
     self_nmi();
 
     /*
-     * Wait for ucode loading is done in case that the NMI does not arrive
-     * synchronously, which may lead to a not-yet-updated CPU signature is
-     * copied below.
+     * NMIs may not be delivered synchronously.  Wait for the primary threads
+     * to be done.
      */
-    if ( unlikely(!wait_for_state(LOADING_EXIT)) )
-        ASSERT_UNREACHABLE();
+    wait_for_state(LOADING_EXIT);
 
     /* Copy update revision from the primary thread. */
     this_cpu(cpu_sig).rev =
@@ -345,12 +343,10 @@ static int primary_thread_fn(const struct microcode_patch *patch,
         self_nmi();
 
         /*
-         * Wait for ucode loading is done in case that the NMI does not arrive
-         * synchronously, which may lead to a not-yet-updated error is returned
-         * below.
+         * NMIs may not be delivered synchronously.  Wait for the primary
+         * threads to be done.
          */
-        if ( unlikely(!wait_for_state(LOADING_EXIT)) )
-            ASSERT_UNREACHABLE();
+        wait_for_state(LOADING_EXIT);
 
         return this_cpu(loading_err);
     }
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH 3/3] x86/ucode: Create a real type for loading_state
Date: Mon, 17 Nov 2025 22:21:20 +0000
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Using typeof() in wait_for_state()/set_state() unnecesserily cryptic, and more
verbose than using a proper type.

No functional change.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 
---
 xen/arch/x86/cpu/microcode/core.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/xen/arch/x86/cpu/microcode/core.c b/xen/arch/x86/cpu/microcode/core.c
index 7aaf62839f56..fe47c3a6c18d 100644
--- a/xen/arch/x86/cpu/microcode/core.c
+++ b/xen/arch/x86/cpu/microcode/core.c
@@ -70,12 +70,13 @@ static unsigned int nr_cores;
  *  - LOADING_ENTER: all CPUs have called in. Initiate ucode loading.
  *  - LOADING_EXIT: ucode loading is done or aborted.
  */
-static enum {
+typedef enum {
     LOADING_PREPARE,
     LOADING_CALLIN,
     LOADING_ENTER,
     LOADING_EXIT,
-} loading_state;
+} loading_state_t;
+static loading_state_t loading_state;
 
 struct patch_with_flags {
     unsigned int flags;
@@ -237,9 +238,9 @@ static bool cf_check wait_cpu_callout(unsigned int nr)
     return atomic_read(&cpu_out) >= nr;
 }
 
-static bool wait_for_state(typeof(loading_state) state)
+static bool wait_for_state(loading_state_t state)
 {
-    typeof(loading_state) cur_state;
+    loading_state_t cur_state;
 
     while ( (cur_state = ACCESS_ONCE(loading_state)) != state )
     {
@@ -251,7 +252,7 @@ static bool wait_for_state(typeof(loading_state) state)
     return true;
 }
 
-static void set_state(typeof(loading_state) state)
+static void set_state(loading_state_t state)
 {
     ACCESS_ONCE(loading_state) = state;
 }
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH 0/3] x86/ucode: Parallel loading fixes
Date: Mon, 17 Nov 2025 22:21:17 +0000
Message-Id: <20251117222120.473451-1-andrew.cooper3@citrix.com>
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At least patch 1 wants backporting.  Commit e0bb712a28a9 ("x86/ucode: Abort
parallel load early on any control thread error") made the problem easier to
hit, but the bug has been present since the introduction of parallel loading.

Another potential fix would be to have stop_machine_run()'s error value filled
in using cmpxchg.

Andrew Cooper (3):
  x86/ucode: Fix error handling during parallel ucode load
  x86/ucode: Drop structurally unreachable ASSERT()s
  x86/ucode: Create a real type for loading_state

 xen/arch/x86/cpu/microcode/core.c | 37 +++++++++++++++----------------
 1 file changed, 18 insertions(+), 19 deletions(-)

-- 
2.39.5



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Subject: Re: [PATCH v7 14/16] x86/domain: enable per-domain I/O port bitmaps
To: dmukhin@xen.org
Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, 
	anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, 
	michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, 
	dmukhin@ford.com
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Hi Denis,

Thank you for the patch.

On Tue, Sep 9, 2025 at 12:12=E2=80=AFAM  wrote:
>
> From: Denis Mukhin 
>
> Current design enables all HVM domains share the same I/O port bitmap.
>
> It is necessary for domains crafting its own I/O port address space depen=
ding
> on the user configuration.
>
> Ensure NS16550 emulator does not share I/O ports with the physical I/O po=
rts,
> which is essential for emulation in PVH hwdom case (dom0).
>
> Not a functional change.
>
> Signed-off-by: Denis Mukhin 
> ---
> Changes since v6:
> - n/a
> ---
>  xen/arch/x86/Makefile                    |   1 +
>  xen/arch/x86/dom0_build.c                | 111 +--------------
>  xen/arch/x86/hvm/hvm.c                   |  35 +----
>  xen/arch/x86/hvm/nestedhvm.c             |   8 +-
>  xen/arch/x86/hvm/quirks.c                |   3 -
>  xen/arch/x86/hvm/svm/nestedsvm.c         |   2 +-
>  xen/arch/x86/hvm/vmx/vvmx.c              |   4 +-
>  xen/arch/x86/include/asm/hvm/nestedhvm.h |   3 +-
>  xen/arch/x86/include/asm/hvm/support.h   |   2 -
>  xen/arch/x86/include/asm/iocap.h         |   2 +
>  xen/arch/x86/ioport.c                    | 163 +++++++++++++++++++++++
>  xen/arch/x86/pv/dom0_build.c             |   4 +
>  xen/common/emul/vuart/ns16x50.c          |  11 ++
>  13 files changed, 200 insertions(+), 149 deletions(-)
>  create mode 100644 xen/arch/x86/ioport.c
>
> diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
> index d7aed7d92c15..85a8475e126c 100644
> --- a/xen/arch/x86/Makefile
> +++ b/xen/arch/x86/Makefile
> @@ -44,6 +44,7 @@ obj-y +=3D msi.o
>  obj-y +=3D msr.o
>  obj-$(CONFIG_INDIRECT_THUNK) +=3D indirect-thunk.o
>  obj-$(CONFIG_RETURN_THUNK) +=3D indirect-thunk.o
> +obj-y +=3D ioport.o
>  obj-$(CONFIG_PV) +=3D ioport_emulate.o
>  obj-y +=3D irq.o
>  obj-$(CONFIG_KEXEC) +=3D machine_kexec.o
> diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c
> index 0b467fd4a4fc..26202b33345c 100644
> --- a/xen/arch/x86/dom0_build.c
> +++ b/xen/arch/x86/dom0_build.c
> @@ -298,9 +298,6 @@ int __init parse_arch_dom0_param(const char *s, const=
 char *e)
>      return 0;
>  }
>
> -static char __initdata opt_dom0_ioports_disable[200] =3D "";
> -string_param("dom0_ioports_disable", opt_dom0_ioports_disable);
> -
>  static bool __initdata ro_hpet =3D true;
>  boolean_param("ro-hpet", ro_hpet);
>
> @@ -433,122 +430,20 @@ unsigned long __init dom0_compute_nr_pages(
>      return nr_pages;
>  }
>
> -static void __init process_dom0_ioports_disable(struct domain *dom0)
> -{
> -    unsigned long io_from, io_to;
> -    char *t, *s =3D opt_dom0_ioports_disable;
> -    const char *u;
> -
> -    if ( *s =3D=3D '\0' )
> -        return;
> -
> -    while ( (t =3D strsep(&s, ",")) !=3D NULL )
> -    {
> -        io_from =3D simple_strtoul(t, &u, 16);
> -        if ( u =3D=3D t )
> -        {
> -        parse_error:
> -            printk("Invalid ioport range <%s> "
> -                   "in dom0_ioports_disable, skipping\n", t);
> -            continue;
> -        }
> -
> -        if ( *u =3D=3D '\0' )
> -            io_to =3D io_from;
> -        else if ( *u =3D=3D '-' )
> -            io_to =3D simple_strtoul(u + 1, &u, 16);
> -        else
> -            goto parse_error;
> -
> -        if ( (*u !=3D '\0') || (io_to < io_from) || (io_to >=3D 65536) )
> -            goto parse_error;
> -
> -        printk("Disabling dom0 access to ioport range %04lx-%04lx\n",
> -            io_from, io_to);
> -
> -        if ( ioports_deny_access(dom0, io_from, io_to) !=3D 0 )
> -            BUG();
> -    }
> -}
> -
> +/* Modify I/O memory access permissions. */
>  int __init dom0_setup_permissions(struct domain *d)
>  {
>      unsigned long mfn;
> -    unsigned int i, offs;
> -    int rc;
> +    unsigned int i;
> +    int rc =3D 0;
>
>      if ( pv_shim )
>          return 0;
>
> -    /* The hardware domain is initially permitted full I/O capabilities.=
 */
> -    rc =3D ioports_permit_access(d, 0, 0xFFFF);
>      rc |=3D iomem_permit_access(d, 0UL,
>                                PFN_DOWN(1UL << domain_max_paddr_bits(d)) =
- 1);
>      rc |=3D irqs_permit_access(d, 1, nr_irqs_gsi - 1);
>
> -    /* Modify I/O port access permissions. */
> -
> -    for ( offs =3D 0, i =3D ISOLATE_LSB(i8259A_alias_mask) ?: 2;
> -          offs <=3D i8259A_alias_mask; offs +=3D i )
> -    {
> -        if ( offs & ~i8259A_alias_mask )
> -            continue;
> -        /* Master Interrupt Controller (PIC). */
> -        rc |=3D ioports_deny_access(d, 0x20 + offs, 0x21 + offs);
> -        /* Slave Interrupt Controller (PIC). */
> -        rc |=3D ioports_deny_access(d, 0xA0 + offs, 0xA1 + offs);
> -    }
> -
> -    /* ELCR of both PICs. */
> -    rc |=3D ioports_deny_access(d, 0x4D0, 0x4D1);
> -
> -    /* Interval Timer (PIT). */
> -    for ( offs =3D 0, i =3D ISOLATE_LSB(pit_alias_mask) ?: 4;
> -          offs <=3D pit_alias_mask; offs +=3D i )
> -        if ( !(offs & ~pit_alias_mask) )
> -            rc |=3D ioports_deny_access(d, PIT_CH0 + offs, PIT_MODE + of=
fs);
> -
> -    /* PIT Channel 2 / PC Speaker Control. */
> -    rc |=3D ioports_deny_access(d, 0x61, 0x61);
> -
> -    /* INIT# and alternative A20M# control. */
> -    rc |=3D ioports_deny_access(d, 0x92, 0x92);
> -
> -    /* IGNNE# control. */
> -    rc |=3D ioports_deny_access(d, 0xF0, 0xF0);
> -
> -    /* ACPI PM Timer. */
> -    if ( pmtmr_ioport )
> -        rc |=3D ioports_deny_access(d, pmtmr_ioport, pmtmr_ioport + 3);
> -
> -    /* Reset control. */
> -    rc |=3D ioports_deny_access(d, 0xCF9, 0xCF9);
> -
> -    /* PCI configuration space (NB. 0xCF8 has special treatment). */
> -    rc |=3D ioports_deny_access(d, 0xCFC, 0xCFF);
> -
> -#ifdef CONFIG_HVM
> -    if ( is_hvm_domain(d) )
> -    {
> -        /* ISA DMA controller, channels 0-3 (incl possible aliases). */
> -        rc |=3D ioports_deny_access(d, 0x00, 0x1F);
> -        /* ISA DMA controller, page registers (incl various reserved one=
s). */
> -        rc |=3D ioports_deny_access(d, 0x80 + !!hvm_port80_allowed, 0x8F=
);
> -        /* ISA DMA controller, channels 4-7 (incl usual aliases). */
> -        rc |=3D ioports_deny_access(d, 0xC0, 0xDF);
> -
> -        /* HVM debug console IO port. */
> -        rc |=3D ioports_deny_access(d, XEN_HVM_DEBUGCONS_IOPORT,
> -                                  XEN_HVM_DEBUGCONS_IOPORT);
> -        if ( amd_acpi_c1e_quirk )
> -            rc |=3D ioports_deny_access(d, acpi_smi_cmd, acpi_smi_cmd);
> -    }
> -#endif
> -    /* Command-line I/O ranges. */
> -    process_dom0_ioports_disable(d);
> -
> -    /* Modify I/O memory access permissions. */
> -
>      /* Local APIC. */
>      if ( mp_lapic_addr !=3D 0 )
>      {
> diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
> index 363c010f8dcc..1fc16a22e157 100644
> --- a/xen/arch/x86/hvm/hvm.c
> +++ b/xen/arch/x86/hvm/hvm.c
> @@ -51,6 +51,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -81,14 +82,6 @@ integer_param("hvm_debug", opt_hvm_debug_level);
>
>  struct hvm_function_table __ro_after_init hvm_funcs;
>
> -/*
> - * The I/O permission bitmap is globally shared by all HVM guests except
> - * the hardware domain which needs a more permissive one.
> - */
> -#define HVM_IOBITMAP_SIZE (3 * PAGE_SIZE)
> -unsigned long __section(".bss.page_aligned") __aligned(PAGE_SIZE)
> -    hvm_io_bitmap[HVM_IOBITMAP_SIZE / BYTES_PER_LONG];
> -
>  /* Xen command-line option to enable HAP */
>  static bool __initdata opt_hap_enabled =3D true;
>  boolean_param("hap", opt_hap_enabled);
> @@ -266,15 +259,6 @@ static int __init cf_check hvm_enable(void)
>      if ( opt_hvm_fep )
>          warning_add(warning_hvm_fep);
>
> -    /*
> -     * Allow direct access to the PC debug ports 0x80 and 0xed (they are
> -     * often used for I/O delays, but the vmexits simply slow things dow=
n).
> -     */
> -    memset(hvm_io_bitmap, ~0, sizeof(hvm_io_bitmap));
> -    if ( hvm_port80_allowed )
> -        __clear_bit(0x80, hvm_io_bitmap);
> -    __clear_bit(0xed, hvm_io_bitmap);
> -
>      register_cpu_notifier(&cpu_nfb);
>
>      return 0;
> @@ -706,19 +690,12 @@ int hvm_domain_initialise(struct domain *d,
>
>      rwlock_init(&d->arch.hvm.pl_time->pt_migrate);
>
> -    /* Set the default IO Bitmap. */
> -    if ( is_hardware_domain(d) )
> +    rc =3D ioports_setup_access(d);
> +    if ( rc )
>      {
> -        d->arch.hvm.io_bitmap =3D _xmalloc(HVM_IOBITMAP_SIZE, PAGE_SIZE)=
;
> -        if ( d->arch.hvm.io_bitmap =3D=3D NULL )
> -        {
> -            rc =3D -ENOMEM;
> -            goto fail1;
> -        }
> -        memset(d->arch.hvm.io_bitmap, ~0, HVM_IOBITMAP_SIZE);
> +        printk("%pd failed to setup I/O bitmap: %d\n", d, rc);
> +        goto fail1;
>      }
> -    else
> -        d->arch.hvm.io_bitmap =3D hvm_io_bitmap;
>
>      register_g2m_portio_handler(d);
>      register_vpci_portio_handler(d);
> @@ -745,6 +722,8 @@ int hvm_domain_initialise(struct domain *d,
>          break;
>      }
>
> +    BUG_ON(!d->arch.ioport_caps);
> +
>      vpic_init(d);
>
>      rc =3D vioapic_init(d);
> diff --git a/xen/arch/x86/hvm/nestedhvm.c b/xen/arch/x86/hvm/nestedhvm.c
> index bddd77d8109b..d4e03123d910 100644
> --- a/xen/arch/x86/hvm/nestedhvm.c
> +++ b/xen/arch/x86/hvm/nestedhvm.c
> @@ -107,7 +107,7 @@ nestedhvm_vmcx_flushtlb(struct p2m_domain *p2m)
>   * The users of the bitmap patterns are in SVM/VMX specific code.
>   *
>   * bitmap        port 0x80  port 0xed
> - * hvm_io_bitmap cleared    cleared
> + * hvm.io_bitmap cleared    cleared
>   * iomap[0]      cleared    set
>   * iomap[1]      set        cleared
>   * iomap[2]      set        set
> @@ -115,7 +115,7 @@ nestedhvm_vmcx_flushtlb(struct p2m_domain *p2m)
>
>  static int __init cf_check nestedhvm_setup(void)
>  {
> -    /* Same format and size as hvm_io_bitmap (Intel needs only 2 pages).=
 */
> +    /* Same format and size as hvm.io_bitmap (Intel needs only 2 pages).=
 */
>      unsigned nr =3D cpu_has_vmx ? 2 : 3;
>      unsigned int i, order =3D get_order_from_pages(nr);
>
> @@ -165,7 +165,7 @@ static int __init cf_check nestedhvm_setup(void)
>  __initcall(nestedhvm_setup);
>
>  unsigned long *
> -nestedhvm_vcpu_iomap_get(bool ioport_80, bool ioport_ed)
> +nestedhvm_vcpu_iomap_get(struct vcpu *v, bool ioport_80, bool ioport_ed)
>  {
>      int i;
>
> @@ -174,7 +174,7 @@ nestedhvm_vcpu_iomap_get(bool ioport_80, bool ioport_=
ed)
>
>      if (ioport_80 =3D=3D 0) {
>          if (ioport_ed =3D=3D 0)
> -            return hvm_io_bitmap;
> +            return v->domain->arch.hvm.io_bitmap;
>          i =3D 0;
>      } else {
>          if (ioport_ed =3D=3D 0)
> diff --git a/xen/arch/x86/hvm/quirks.c b/xen/arch/x86/hvm/quirks.c
> index 9202f5a47fe9..f4d95441fcff 100644
> --- a/xen/arch/x86/hvm/quirks.c
> +++ b/xen/arch/x86/hvm/quirks.c
> @@ -73,9 +73,6 @@ static int __init cf_check check_port80(void)
>
>      dmi_check_system(hvm_no_port80_dmi_table);
>
> -    if ( !hvm_port80_allowed )
> -        __set_bit(0x80, hvm_io_bitmap);
> -
>      return 0;
>  }
>  __initcall(check_port80);
> diff --git a/xen/arch/x86/hvm/svm/nestedsvm.c b/xen/arch/x86/hvm/svm/nest=
edsvm.c
> index dc2b6a42534a..cc8500b61665 100644
> --- a/xen/arch/x86/hvm/svm/nestedsvm.c
> +++ b/xen/arch/x86/hvm/svm/nestedsvm.c
> @@ -381,7 +381,7 @@ static int nsvm_vmrun_permissionmap(struct vcpu *v, b=
ool viopm)
>          hvm_unmap_guest_frame(ns_viomap, 0);
>      }
>
> -    svm->ns_iomap =3D nestedhvm_vcpu_iomap_get(ioport_80, ioport_ed);
> +    svm->ns_iomap =3D nestedhvm_vcpu_iomap_get(v, ioport_80, ioport_ed);
>
>      nv->nv_ioport80 =3D ioport_80;
>      nv->nv_ioportED =3D ioport_ed;
> diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c
> index e4f3a5fe4c71..4da3e6e90e6c 100644
> --- a/xen/arch/x86/hvm/vmx/vvmx.c
> +++ b/xen/arch/x86/hvm/vmx/vvmx.c
> @@ -554,7 +554,7 @@ unsigned long *_shadow_io_bitmap(struct vcpu *v)
>      port80 =3D bitmap[0x80 >> 3] & (1 << (0x80 & 0x7)) ? 1 : 0;
>      portED =3D bitmap[0xed >> 3] & (1 << (0xed & 0x7)) ? 1 : 0;
>
> -    return nestedhvm_vcpu_iomap_get(port80, portED);
> +    return nestedhvm_vcpu_iomap_get(v, port80, portED);
>  }
>
>  static void update_msrbitmap(struct vcpu *v, uint32_t shadow_ctrl)
> @@ -622,7 +622,7 @@ void nvmx_update_exec_control(struct vcpu *v, u32 hos=
t_cntrl)
>               * L1 VMM doesn't intercept IO instruction.
>               * Use host configuration and reset IO_BITMAP
>               */
> -            bitmap =3D hvm_io_bitmap;
> +            bitmap =3D v->domain->arch.hvm.io_bitmap;
>          }
>          else {
>              /* use IO bitmap */
> diff --git a/xen/arch/x86/include/asm/hvm/nestedhvm.h b/xen/arch/x86/incl=
ude/asm/hvm/nestedhvm.h
> index ea2c1bc328c7..d691ccb07dd6 100644
> --- a/xen/arch/x86/include/asm/hvm/nestedhvm.h
> +++ b/xen/arch/x86/include/asm/hvm/nestedhvm.h
> @@ -50,7 +50,8 @@ int nestedhvm_hap_nested_page_fault(struct vcpu *v, pad=
dr_t *L2_gpa,
>                                      struct npfec npfec);
>
>  /* IO permission map */
> -unsigned long *nestedhvm_vcpu_iomap_get(bool ioport_80, bool ioport_ed);
> +unsigned long *nestedhvm_vcpu_iomap_get(struct vcpu *v,
> +                                        bool ioport_80, bool ioport_ed);
>
>  /* Misc */
>  #define nestedhvm_paging_mode_hap(v) (!!nhvm_vmcx_hap_enabled(v))
> diff --git a/xen/arch/x86/include/asm/hvm/support.h b/xen/arch/x86/includ=
e/asm/hvm/support.h
> index 2a7ba36af06f..7e36d00cc188 100644
> --- a/xen/arch/x86/include/asm/hvm/support.h
> +++ b/xen/arch/x86/include/asm/hvm/support.h
> @@ -41,8 +41,6 @@ extern unsigned int opt_hvm_debug_level;
>  #define HVM_DBG_LOG(level, _f, _a...) do {} while (0)
>  #endif
>
> -extern unsigned long hvm_io_bitmap[];
> -
>  enum hvm_translation_result {
>      HVMTRANS_okay,
>      HVMTRANS_bad_linear_to_gfn,
> diff --git a/xen/arch/x86/include/asm/iocap.h b/xen/arch/x86/include/asm/=
iocap.h
> index f948b7186e95..1083f6171cf7 100644
> --- a/xen/arch/x86/include/asm/iocap.h
> +++ b/xen/arch/x86/include/asm/iocap.h
> @@ -22,6 +22,8 @@
>  #define cache_flush_permitted(d) \
>      (has_arch_io_resources(d) || has_arch_pdevs(d))
>
> +int ioports_setup_access(struct domain *d);
> +
>  static inline int ioports_permit_access(struct domain *d, unsigned long =
s,
>                                          unsigned long e)
>  {
> diff --git a/xen/arch/x86/ioport.c b/xen/arch/x86/ioport.c
> new file mode 100644
> index 000000000000..dbcd52d37a4f
> --- /dev/null
> +++ b/xen/arch/x86/ioport.c
> @@ -0,0 +1,163 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Guest I/O port address space configuration.
> + *
> + * Copyright 2025 Ford Motor Company
> + */
> +
> +#include 
> +#include 
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +static char __initdata opt_dom0_ioports_disable[200] =3D "";
> +string_param("dom0_ioports_disable", opt_dom0_ioports_disable);
> +
> +/*
> + * The I/O permission bitmap size.
> + * See: comment in nestedhvm_setup()
> + */
> +#define HVM_IOBITMAP_SIZE (3 * PAGE_SIZE)
> +
> +/* Hide user-defined I/O ports from the guest OS. */
> +static void process_dom0_ioports_disable(struct domain *dom0)
> +{
> +    unsigned long io_from, io_to;
> +    char *t, *s =3D opt_dom0_ioports_disable;
> +    const char *u;
> +
> +    if ( *s =3D=3D '\0' )
> +        return;
> +
> +    while ( (t =3D strsep(&s, ",")) !=3D NULL )
> +    {
> +        io_from =3D simple_strtoul(t, &u, 16);
> +        if ( u =3D=3D t )
> +        {
> +        parse_error:
> +            printk("Invalid ioport range <%s> "
> +                   "in dom0_ioports_disable, skipping\n", t);
> +            continue;
> +        }
> +
> +        if ( *u =3D=3D '\0' )
> +            io_to =3D io_from;
> +        else if ( *u =3D=3D '-' )
> +            io_to =3D simple_strtoul(u + 1, &u, 16);
> +        else
> +            goto parse_error;
> +
> +        if ( (*u !=3D '\0') || (io_to < io_from) || (io_to >=3D 65536) )
> +            goto parse_error;
> +
> +        printk("Disabling dom0 access to ioport range %04lx-%04lx\n",
> +            io_from, io_to);
> +
> +        if ( ioports_deny_access(dom0, io_from, io_to) !=3D 0 )
> +            BUG();
> +    }
> +}
> +
> +/* Set the default IO Bitmap. */
> +int ioports_setup_access(struct domain *d)
> +{
> +    unsigned int i, offs;
> +    int rc;
> +
> +    if ( pv_shim )
> +        return 0;
> +
> +#ifdef CONFIG_HVM

ioports_setup_access() now allocates a per-domain io_bitmap for all HVM dom=
ains:

> +    d->arch.hvm.io_bitmap =3D _xmalloc(HVM_IOBITMAP_SIZE, PAGE_SIZE);

but I only see this being freed for the hardware domain in the
existing failure paths.
Where is io_bitmap freed for non-hardware HVM domains?

> +    if ( d->arch.hvm.io_bitmap =3D=3D NULL )
> +        return -ENOMEM;
> +
> +    memset(d->arch.hvm.io_bitmap, ~0, HVM_IOBITMAP_SIZE);
> +
> +    if ( !is_hardware_domain(d) )
> +    {
> +        /*
> +         * Allow direct access to the PC debug ports 0x80 and 0xed (they=
 are
> +         * often used for I/O delays, but the vmexits simply slow things=
 down).
> +         */
> +        if ( hvm_port80_allowed )
> +            __clear_bit(0x80, d->arch.hvm.io_bitmap);
> +
> +        __clear_bit(0xed, d->arch.hvm.io_bitmap);
> +
> +        return 0;
> +    }
> +#endif
> +
> +    /* The hardware domain is initially permitted full I/O capabilities.=
 */
> +    rc =3D ioports_permit_access(d, 0, 0xFFFF);
> +
> +    /* Modify I/O port access permissions. */
> +
> +    for ( offs =3D 0, i =3D ISOLATE_LSB(i8259A_alias_mask) ?: 2;
> +          offs <=3D i8259A_alias_mask; offs +=3D i )
> +    {
> +        if ( offs & ~i8259A_alias_mask )
> +            continue;
> +        /* Master Interrupt Controller (PIC). */
> +        rc |=3D ioports_deny_access(d, 0x20 + offs, 0x21 + offs);
> +        /* Slave Interrupt Controller (PIC). */
> +        rc |=3D ioports_deny_access(d, 0xA0 + offs, 0xA1 + offs);
> +    }
> +
> +    /* ELCR of both PICs. */
> +    rc |=3D ioports_deny_access(d, 0x4D0, 0x4D1);
> +
> +    /* Interval Timer (PIT). */
> +    for ( offs =3D 0, i =3D ISOLATE_LSB(pit_alias_mask) ?: 4;
> +          offs <=3D pit_alias_mask; offs +=3D i )
> +        if ( !(offs & ~pit_alias_mask) )
> +            rc |=3D ioports_deny_access(d, PIT_CH0 + offs, PIT_MODE + of=
fs);
> +
> +    /* PIT Channel 2 / PC Speaker Control. */
> +    rc |=3D ioports_deny_access(d, 0x61, 0x61);
> +
> +    /* INIT# and alternative A20M# control. */
> +    rc |=3D ioports_deny_access(d, 0x92, 0x92);
> +
> +    /* IGNNE# control. */
> +    rc |=3D ioports_deny_access(d, 0xF0, 0xF0);
> +
> +    /* ACPI PM Timer. */
> +    if ( pmtmr_ioport )
> +        rc |=3D ioports_deny_access(d, pmtmr_ioport, pmtmr_ioport + 3);
> +
> +    /* Reset control. */
> +    rc |=3D ioports_deny_access(d, 0xCF9, 0xCF9);
> +
> +    /* PCI configuration space (NB. 0xCF8 has special treatment). */
> +    rc |=3D ioports_deny_access(d, 0xCFC, 0xCFF);
> +
> +#ifdef CONFIG_HVM
> +    if ( is_hvm_domain(d) )
> +    {
> +        /* ISA DMA controller, channels 0-3 (incl possible aliases). */
> +        rc |=3D ioports_deny_access(d, 0x00, 0x1F);
> +        /* ISA DMA controller, page registers (incl various reserved one=
s). */
> +        rc |=3D ioports_deny_access(d, 0x80 + !!hvm_port80_allowed, 0x8F=
);
> +        /* ISA DMA controller, channels 4-7 (incl usual aliases). */
> +        rc |=3D ioports_deny_access(d, 0xC0, 0xDF);
> +
> +        /* HVM debug console IO port. */
> +        rc |=3D ioports_deny_access(d, XEN_HVM_DEBUGCONS_IOPORT,
> +                                  XEN_HVM_DEBUGCONS_IOPORT);
> +        if ( amd_acpi_c1e_quirk )
> +            rc |=3D ioports_deny_access(d, acpi_smi_cmd, acpi_smi_cmd);
> +    }
> +#endif
> +
> +    /* Command-line I/O ranges. */
> +    process_dom0_ioports_disable(d);
> +
> +    return rc;
> +}
> diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c
> index 21158ce1812e..2b8b4d869ee7 100644
> --- a/xen/arch/x86/pv/dom0_build.c
> +++ b/xen/arch/x86/pv/dom0_build.c
> @@ -17,6 +17,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -1033,6 +1034,9 @@ static int __init dom0_construct(const struct boot_=
domain *bd)
>      if ( test_bit(XENFEAT_supervisor_mode_kernel, parms.f_required) )
>          panic("Dom0 requires supervisor-mode execution\n");
>
> +    rc =3D ioports_setup_access(d);
> +    BUG_ON(rc !=3D 0);
> +
>      rc =3D dom0_setup_permissions(d);
>      BUG_ON(rc !=3D 0);
>
> diff --git a/xen/common/emul/vuart/ns16x50.c b/xen/common/emul/vuart/ns16=
x50.c
> index c341f012d005..ea34c3ae598a 100644
> --- a/xen/common/emul/vuart/ns16x50.c
> +++ b/xen/common/emul/vuart/ns16x50.c
> @@ -783,9 +783,20 @@ static int ns16x50_init(void *arg)
>      struct vuart_ns16x50 *vdev =3D arg;
>      const struct vuart_info *info =3D vdev->info;
>      struct domain *d =3D vdev->owner;
> +    int rc;
>
>      ASSERT(vdev);
>
> +    /* Disallow sharing physical I/O port */

Should this be undone on teardown and error paths?

> +    rc =3D ioports_deny_access(d, info->base_addr,
> +                             info->base_addr + info->size - 1);


Best regards,
Mykola


> +    if ( rc )
> +    {
> +        ns16x50_err(info, " virtual I/O port range [0x%04lx..0x%04lx]: c=
onflict w/ physical range\n",
> +                    info->base_addr, info->base_addr + info->size - 1);
> +        return rc;
> +    }
> +
>      /* NB: report 115200 baud rate. */
>      vdev->regs[NS16X50_REGS_NUM + UART_DLL] =3D divisor & UINT8_MAX;
>      vdev->regs[NS16X50_REGS_NUM + UART_DLM] =3D (divisor >> 8) & UINT8_M=
AX;
> --
> 2.51.0
>
>


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From: Mykola Kvach 
Date: Tue, 18 Nov 2025 08:00:00 +0200
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Subject: Re: [PATCH v7 13/16] emul/ns16x50: add Kconfig options
To: dmukhin@xen.org
Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, 
	anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, 
	michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, 
	dmukhin@ford.com
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Hi Denis,

Thank you for the patch.

Reviewed-by: Mykola Kvach 


Best regards,
Mykola


On Tue, Sep 9, 2025 at 12:12=E2=80=AFAM  wrote:
>
> From: Denis Mukhin 
>
> Add initial Kconfig options configure NS16550-capable emulator.
>
> Signed-off-by: Denis Mukhin 
> ---
> Changes since v6:
> - new patch
> ---
>  xen/common/emul/vuart/Kconfig | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
>
> diff --git a/xen/common/emul/vuart/Kconfig b/xen/common/emul/vuart/Kconfi=
g
> index ce1b976b7da7..9a49a6528b5a 100644
> --- a/xen/common/emul/vuart/Kconfig
> +++ b/xen/common/emul/vuart/Kconfig
> @@ -3,4 +3,23 @@ config VUART_FRAMEWORK
>
>  menu "UART Emulation"
>
> +config VUART_NS16X50
> +       bool "NS16550-compatible UART Emulator" if EXPERT
> +       depends on X86 && HVM
> +       select VUART_FRAMEWORK
> +       help
> +         In-hypervisor NS16550-compatible UART emulation.
> +
> +         Only one legacy PC COM port is emulated for domain with a certa=
in ID
> +         (set via 'vuart-domid=3D' command line setting).
> +
> +         This is strictly for testing purposes (such as early HVM guest =
console),
> +         and not appropriate for use in production.
> +
> +config VUART_NS16X50_DEBUG
> +       bool "Development: NS16550-compatible UART Emulator Debugging"
> +       depends on VUART_NS16X50 && DEBUG
> +       help
> +         Enable development debugging.
> +
>  endmenu
> --
> 2.51.0
>
>


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From: Mykola Kvach 
Date: Tue, 18 Nov 2025 08:00:00 +0200
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Message-ID: 
Subject: Re: [PATCH v7 12/16] emul/ns16550: implement dump_state() hook
To: dmukhin@xen.org
Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, 
	anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, 
	michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, 
	dmukhin@ford.com
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Hi Denis,

Thank you for the patch.

On Tue, Sep 9, 2025 at 12:12=E2=80=AFAM  wrote:
>
> From: Denis Mukhin 
>
> Implement dump_state() vUART hook for debugging UART state machine over X=
en
> console. dump_state() prints state of all emulated registers (including
> state-less IIR) and state of RX/TX FIFOs.
>
> Signed-off-by: Denis Mukhin 
> ---
> Changes since v6:
> - n/a
> ---
>  xen/common/emul/vuart/ns16x50.c | 59 ++++++++++++++++++++++++++++++++-
>  1 file changed, 58 insertions(+), 1 deletion(-)
>
> diff --git a/xen/common/emul/vuart/ns16x50.c b/xen/common/emul/vuart/ns16=
x50.c
> index a92df6923aa5..c341f012d005 100644
> --- a/xen/common/emul/vuart/ns16x50.c
> +++ b/xen/common/emul/vuart/ns16x50.c
> @@ -640,6 +640,58 @@ static int ns16x50_io_read(
>      return rc;
>  }
>
> +static void cf_check ns16x50_dump_state(void *arg)
> +{
> +#ifdef CONFIG_VUART_NS16X50_DEBUG
> +    struct vuart_ns16x50 *vdev =3D arg;
> +    const struct domain *d =3D vdev->owner;
> +    const struct vuart_info *info =3D vdev->info;
> +    const struct xencons_interface *cons;
> +    const uint8_t *regs;
> +
> +    if ( !vdev )

Is this NULL check actually useful here? At this point we=E2=80=99ve alread=
y
dereferenced vdev (vdev->owner / vdev->info), so if arg could be NULL
we=E2=80=99d already be in UB. Either the hook never receives NULL (and we =
can
drop the check or turn it into ASSERT(vdev)), or the check should be
moved before the first dereference.

> +        return;
> +
> +    /* Allow printing state in case of a deadlock. */
> +    if ( !spin_trylock(&vdev->lock) )
> +        return;
> +
> +    cons =3D &vdev->cons;
> +    regs =3D &vdev->regs[0];
> +
> +    printk("Virtual " pr_prefix " (%s) I/O port 0x%04x IRQ#%d owner %pd\=
n",
> +            vdev->name, info->base_addr, info->irq, d);
> +
> +    printk("  RX FIFO size %ld in_prod %d in_cons %d used %d\n",
> +            ARRAY_SIZE(cons->in), cons->in_prod, cons->in_cons,
> +            cons->in_prod - cons->in_cons);
> +
> +    printk("  TX FIFO size %ld out_prod %d out_cons %d used %d\n",
> +            ARRAY_SIZE(cons->out), cons->out_prod, cons->out_cons,
> +            cons->out_prod - cons->out_cons);
> +
> +    printk("  %02"PRIx8" RBR %02"PRIx8" THR %02"PRIx8" DLL %02"PRIx8" DL=
M %02"PRIx8"\n",
> +            UART_RBR,

Should this be using cons->in / cons->out instead of cons?

> +            cons->in[MASK_XENCONS_IDX(cons->in_prod, cons)],
> +            cons->out[MASK_XENCONS_IDX(cons->out_prod, cons)],

As written, MASK_XENCONS_IDX() gets &vdev->cons (struct pointer), not the
RX/TX arrays themselves, so its size/index calculation will use the size
of the pointer/struct rather than the in[]/out[] ring size. I think this
should be:

    cons->in[MASK_XENCONS_IDX(cons->in_prod, cons->in)],
    cons->out[MASK_XENCONS_IDX(cons->out_prod, cons->out)],


Best regards,
Mykola


> +            regs[NS16X50_REGS_NUM + UART_DLL],
> +            regs[NS16X50_REGS_NUM + UART_DLM]);
> +
> +    printk("  %02"PRIx8" IER %02"PRIx8"\n", UART_IER, regs[UART_IER]);
> +
> +    printk("  %02"PRIx8" FCR %02"PRIx8" IIR %02"PRIx8"\n",
> +            UART_FCR, regs[UART_FCR], ns16x50_iir_get(vdev));
> +
> +    printk("  %02"PRIx8" LCR %02"PRIx8"\n", UART_LCR, regs[UART_LCR]);
> +    printk("  %02"PRIx8" MCR %02"PRIx8"\n", UART_MCR, regs[UART_MCR]);
> +    printk("  %02"PRIx8" LSR %02"PRIx8"\n", UART_LSR, regs[UART_LSR]);
> +    printk("  %02"PRIx8" MSR %02"PRIx8"\n", UART_MSR, regs[UART_MSR]);
> +    printk("  %02"PRIx8" SCR %02"PRIx8"\n", UART_SCR, regs[UART_SCR]);
> +
> +    spin_unlock(&vdev->lock);
> +#endif /* CONFIG_VUART_NS16X50_DEBUG */
> +}
> +
>  /*
>   * Emulate I/O access to ns16x50 register.
>   * Note, emulation always returns X86EMUL_OKAY, once I/O port trap is en=
abled.
> @@ -709,6 +761,9 @@ static int cf_check ns16x50_io_handle(
>
>      spin_unlock(&vdev->lock);
>
> +    if ( ns16x50_log_level >=3D 3 )
> +        ns16x50_dump_state(vdev);
> +
>      if ( rc =3D=3D 0 )
>          ns16x50_debug(vdev, "%c 0x%04x %d: DLAB=3D%d %02"PRIx32" 0x%08"P=
RIx32"\n",
>                        op, addr, size, dlab, reg, *data);
> @@ -844,6 +899,8 @@ static int cf_check ns16x50_put_rx(void *arg, char ch=
)
>      }
>
>      spin_unlock(&vdev->lock);
> +    if ( ns16x50_log_level >=3D 3 )
> +        ns16x50_dump_state(vdev);
>
>      return rc;
>  }
> @@ -853,7 +910,7 @@ static int cf_check ns16x50_put_rx(void *arg, char ch=
)
>      .compatible =3D "ns16550",            \
>      .alloc      =3D ns16x50_alloc,        \
>      .free       =3D ns16x50_free,         \
> -    .dump_state =3D NULL,                 \
> +    .dump_state =3D ns16x50_dump_state,   \
>      .put_rx     =3D ns16x50_put_rx,       \
>  }
>
> --
> 2.51.0
>
>


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From: Mykola Kvach 
Date: Tue, 18 Nov 2025 08:00:00 +0200
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Message-ID: 
Subject: Re: [PATCH v7 11/16] emul/ns16x50: implement FCR register (write-only)
To: dmukhin@xen.org
Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, 
	anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, 
	michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, 
	dmukhin@ford.com
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Hi Denis,

Thank you for the patch.

On Tue, Sep 9, 2025 at 1:06=E2=80=AFAM  wrote:
>
> From: Denis Mukhin 
>
> Add emulation logic for FCR register.
>
> Note, that does not hook FIFO interrupt moderation to the FIFO management
> code for simplicity.
>
> Signed-off-by: Denis Mukhin 
> ---
> Changes since v6:
> - dropped UART_IIR_THR handling from UART_FCR_CLTX case
> ---
>  xen/common/emul/vuart/ns16x50.c | 27 +++++++++++++++++++++++++++
>  1 file changed, 27 insertions(+)
>
> diff --git a/xen/common/emul/vuart/ns16x50.c b/xen/common/emul/vuart/ns16=
x50.c
> index 137ce08f4e1d..a92df6923aa5 100644
> --- a/xen/common/emul/vuart/ns16x50.c
> +++ b/xen/common/emul/vuart/ns16x50.c
> @@ -374,6 +374,33 @@ static int ns16x50_io_write8(
>              regs[UART_IER] =3D val & UART_IER_MASK;
>              break;
>
> +        case UART_FCR: /* WO */
> +            if ( val & UART_FCR_RSRVD0 )
> +                ns16x50_warn(vdev, "FCR: attempt to set reserved bit: %x=
\n",
> +                             UART_FCR_RSRVD0);
> +
> +            if ( val & UART_FCR_RSRVD1 )
> +                ns16x50_warn(vdev, "FCR: attempt to set reserved bit: %x=
\n",
> +                             UART_FCR_RSRVD1);

Do we really need these checks and prints?

> +
> +            if ( val & UART_FCR_CLRX )
> +            {
> +                ns16x50_fifo_rx_reset(vdev);

Note from the NS16550A datasheet:
Bit 0: This bit must be a 1 when other FCR bits are written to, or they
will not be programmed.

> +                regs[UART_LSR] &=3D ~UART_LSR_DR;
> +            }
> +
> +            if ( val & UART_FCR_CLTX )
> +                ns16x50_fifo_tx_reset(vdev);
> +
> +            if ( val & UART_FCR_ENABLE )
> +                val &=3D UART_FCR_ENABLE | UART_FCR_DMA | UART_FCR_TRG_M=
ASK;

Why can=E2=80=99t we just write back val as is, but with CLTX/CLRX cleared =
when
UART_FCR_ENABLE is set? For example:

    regs[UART_FCR] =3D val & ~(UART_FCR_CLTX | UART_FCR_CLRX);

> +            else
> +                val =3D 0;

If we take the above into account, I think we shouldn=E2=80=99t change the
content of FCR in the case where bit 0 is 0.

Also, from the spec:
=E2=80=9CResetting FCR0 will clear all bytes in both FIFOs.=E2=80=9D


Best regards,
Mykola



> +
> +            regs[UART_FCR] =3D val;
> +
> +            break;
> +
>          case UART_LCR:
>              regs[UART_LCR] =3D val;
>              break;
> --
> 2.51.0
>
>


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From: Mykola Kvach 
Date: Tue, 18 Nov 2025 08:00:00 +0200
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Subject: Re: [PATCH v7 10/16] emul/ns16x50: implement THR register
To: dmukhin@xen.org
Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, 
	anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, 
	michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, 
	dmukhin@ford.com
Content-Type: text/plain; charset="UTF-8"
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Hi Denis,

Thank you for the patch.

On Tue, Sep 9, 2025 at 1:26=E2=80=AFAM  wrote:
>
> From: Denis Mukhin 
>
> Add THR register emulation to the I/O port handlder.
>
> Add TX FIFO management code since THR depends on TX FIFO.
>
> TX FIFOs is not emulated as per UART specs for simplicity (not need to em=
ulate
> baud rate). Emulator does not emulate NS8250 (no FIFO), NS16550a (16 byte=
s) or
> NS16750 (64 bytes).
>
> TX FIFOs is emulated by using xencons_interface which conveniently provid=
es
> primitives for buffer management and later can be used for inter-domain
> communication similarly to vpl011.
>
> Account for DLL =3D=3D 0: in this case, disable transmitter.
>
> Add UART_IIR_THR interrupt reason handling since it depends on THR regist=
er
> access.
>
> Signed-off-by: Denis Mukhin 
> ---
> Changes since v6:
> - added DLL =3D=3D 0 case handling as per Mykola's suggestion
> - dropped UART_IIR_THR clearing in UART_IIR register emulation in ns16x50=
_io_write8()
> - simplified UART_IIR_THR handling
> - updated ns16x50_iir_check_thr()
> ---
>  xen/common/emul/vuart/ns16x50.c | 82 ++++++++++++++++++++++++++++++++-
>  1 file changed, 81 insertions(+), 1 deletion(-)
>
> diff --git a/xen/common/emul/vuart/ns16x50.c b/xen/common/emul/vuart/ns16=
x50.c
> index 250411e0a7d8..137ce08f4e1d 100644
> --- a/xen/common/emul/vuart/ns16x50.c
> +++ b/xen/common/emul/vuart/ns16x50.c
> @@ -149,6 +149,66 @@ static int ns16x50_fifo_rx_putchar(struct vuart_ns16=
x50 *vdev, char c)
>      return rc;
>  }
>
> +static bool ns16x50_fifo_tx_full(const struct vuart_ns16x50 *vdev)
> +{
> +    const struct xencons_interface *cons =3D &vdev->cons;
> +
> +    return cons->out_prod - cons->out_cons =3D=3D ARRAY_SIZE(cons->out);
> +}
> +
> +static void ns16x50_fifo_tx_reset(struct vuart_ns16x50 *vdev)
> +{
> +    struct xencons_interface *cons =3D &vdev->cons;
> +
> +    cons->out_cons =3D cons->out_prod;
> +}
> +
> +/*
> + * Flush cached output to Xen console.
> + */
> +static void ns16x50_fifo_tx_flush(struct vuart_ns16x50 *vdev)
> +{
> +    struct xencons_interface *cons =3D &vdev->cons;
> +    struct domain *d =3D vdev->owner;
> +    XENCONS_RING_IDX i, n, len =3D cons->out_prod - cons->out_cons;
> +
> +    ASSERT(len <=3D ARRAY_SIZE(cons->out));
> +    if ( !len )
> +        return;
> +
> +    i =3D MASK_XENCONS_IDX(cons->out_cons, cons->out);
> +    n =3D min_t(XENCONS_RING_IDX, len, ARRAY_SIZE(cons->out) - i);
> +    if ( n )
> +        guest_printk(d, guest_prefix "%.*s", n, &cons->out[i]);
> +
> +    i =3D 0;
> +    n =3D len - n;
> +    if ( n )
> +        guest_printk(d, guest_prefix "%.*s", n, &cons->out[i]);

ns16x50_fifo_tx_flush() splits wrapped output into two guest_printk()
calls, so the log gets two prefixes for a single line:
    (d1) PART1(d1) PART2

Could we linearize the wrapped buffer and emit a single guest_printk()
(e.g. by printing both spans in one format string) to keep just one prefix?


Best regards,
Mykola


> +
> +    cons->out_cons +=3D len;
> +}
> +
> +/*
> + * Accumulate guest OS output before sending to Xen console.
> + */
> +static void ns16x50_fifo_tx_putchar(struct vuart_ns16x50 *vdev, char ch)
> +{
> +    struct xencons_interface *cons =3D &vdev->cons;
> +
> +    if ( !is_console_printable(ch) )
> +        return;
> +
> +    if ( !ns16x50_fifo_tx_full(vdev) )
> +    {
> +        cons->out[MASK_XENCONS_IDX(cons->out_prod, cons->out)] =3D ch;
> +        cons->out_prod++;
> +    }
> +
> +    if ( ch =3D=3D '\n' || ch =3D=3D '\0' || ns16x50_fifo_tx_full(vdev) =
)
> +        ns16x50_fifo_tx_flush(vdev);
> +}
> +
>  static bool ns16x50_is_running(const struct vuart_ns16x50 *vdev)
>  {
>      /* DLL set to 0 disables serial communication. */
> @@ -172,7 +232,7 @@ static bool cf_check ns16x50_iir_check_rda(const stru=
ct vuart_ns16x50 *vdev)
>
>  static bool cf_check ns16x50_iir_check_thr(const struct vuart_ns16x50 *v=
dev)
>  {
> -    return false;
> +    return !ns16x50_fifo_tx_full(vdev);
>  }
>
>  static bool cf_check ns16x50_iir_check_msi(const struct vuart_ns16x50 *v=
dev)
> @@ -294,6 +354,22 @@ static int ns16x50_io_write8(
>      {
>          switch ( reg )
>          {
> +        case UART_THR:
> +            if ( !ns16x50_is_running(vdev) )
> +                break;
> +
> +            if ( regs[UART_MCR] & UART_MCR_LOOP )
> +            {
> +                if ( ns16x50_fifo_rx_putchar(vdev, val) )
> +                    regs[UART_LSR] |=3D UART_LSR_OE;
> +
> +                regs[UART_LSR] |=3D UART_LSR_DR;
> +            }
> +            else
> +                ns16x50_fifo_tx_putchar(vdev, val);
> +
> +            break;
> +
>          case UART_IER:
>              regs[UART_IER] =3D val & UART_IER_MASK;
>              break;
> @@ -646,6 +722,10 @@ static void cf_check ns16x50_deinit(void *arg)
>      struct vuart_ns16x50 *vdev =3D arg;
>
>      ASSERT(vdev);
> +
> +    spin_lock(&vdev->lock);
> +    ns16x50_fifo_tx_flush(vdev);
> +    spin_unlock(&vdev->lock);
>  }
>
>  static void * cf_check ns16x50_alloc(struct domain *d, const struct vuar=
t_info *info)
> --
> 2.51.0
>
>


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From: Mykola Kvach 
Date: Tue, 18 Nov 2025 08:00:00 +0200
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Message-ID: 
Subject: Re: [PATCH v7 15/16] xen/domain: allocate d->irq_caps before
 arch-specific initialization
To: dmukhin@xen.org
Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, 
	anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, 
	michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, 
	dmukhin@ford.com
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Hi Denis,

Thank you for the patch.

On Tue, Sep 9, 2025 at 12:12=E2=80=AFAM  wrote:
>
> From: Denis Mukhin 
>
> Make sure that NS16550 emulator does not share virtual device IRQ with th=
e
> physical one. This is needed for enabling NS16550 emulator for PVH hwdom
> (dom0).
>
> To do that, move per-domain interrupt rangeset allocation before arch-spe=
cific
> code. Add irqs_setup_access() to setup the initial rangeset.
>
> Signed-off-by: Denis Mukhin 
> ---
> Changes since v6:
> - n/a
> ---
>  xen/arch/x86/dom0_build.c       | 1 -
>  xen/arch/x86/hvm/dom0_build.c   | 7 +++++++
>  xen/arch/x86/include/asm/irq.h  | 2 ++
>  xen/arch/x86/irq.c              | 8 ++++++++
>  xen/arch/x86/pv/dom0_build.c    | 3 +++
>  xen/common/domain.c             | 8 ++++++--
>  xen/common/emul/vuart/ns16x50.c | 9 +++++++++
>  7 files changed, 35 insertions(+), 3 deletions(-)
>
> diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c
> index 26202b33345c..9dc87efbf3e8 100644
> --- a/xen/arch/x86/dom0_build.c
> +++ b/xen/arch/x86/dom0_build.c
> @@ -442,7 +442,6 @@ int __init dom0_setup_permissions(struct domain *d)
>
>      rc |=3D iomem_permit_access(d, 0UL,
>                                PFN_DOWN(1UL << domain_max_paddr_bits(d)) =
- 1);
> -    rc |=3D irqs_permit_access(d, 1, nr_irqs_gsi - 1);
>
>      /* Local APIC. */
>      if ( mp_lapic_addr !=3D 0 )
> diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.=
c
> index 5551f9044836..245a42dec9aa 100644
> --- a/xen/arch/x86/hvm/dom0_build.c
> +++ b/xen/arch/x86/hvm/dom0_build.c
> @@ -1348,6 +1348,13 @@ int __init dom0_construct_pvh(const struct boot_do=
main *bd)
>           */
>          pvh_setup_mmcfg(d);
>
> +        rc =3D irqs_setup_access(d);
> +        if ( rc )
> +        {
> +            printk("%pd unable to setup IRQ rangeset: %d\n", d, rc);
> +            return rc;
> +        }
> +
>          /*
>           * Setup permissions early so that calls to add MMIO regions to =
the
>           * p2m as part of vPCI setup don't fail due to permission checks=
.
> diff --git a/xen/arch/x86/include/asm/irq.h b/xen/arch/x86/include/asm/ir=
q.h
> index 8c81f66434a8..8bffec3bbfee 100644
> --- a/xen/arch/x86/include/asm/irq.h
> +++ b/xen/arch/x86/include/asm/irq.h
> @@ -231,4 +231,6 @@ int allocate_and_map_gsi_pirq(struct domain *d, int i=
ndex, int *pirq_p);
>  int allocate_and_map_msi_pirq(struct domain *d, int index, int *pirq_p,
>                                int type, struct msi_info *msi);
>
> +int irqs_setup_access(struct domain *d);
> +
>  #endif /* _ASM_HW_IRQ_H */
> diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
> index 556134f85aa0..079277be719d 100644
> --- a/xen/arch/x86/irq.c
> +++ b/xen/arch/x86/irq.c
> @@ -3046,3 +3046,11 @@ int allocate_and_map_msi_pirq(struct domain *d, in=
t index, int *pirq_p,
>
>      return ret;
>  }
> +
> +int irqs_setup_access(struct domain *d)
> +{
> +    if ( is_hardware_domain(d) )
> +        return irqs_permit_access(d, 1, nr_irqs_gsi - 1);
> +
> +    return 0;
> +}
> diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c
> index 2b8b4d869ee7..1a092b802833 100644
> --- a/xen/arch/x86/pv/dom0_build.c
> +++ b/xen/arch/x86/pv/dom0_build.c
> @@ -1037,6 +1037,9 @@ static int __init dom0_construct(const struct boot_=
domain *bd)
>      rc =3D ioports_setup_access(d);
>      BUG_ON(rc !=3D 0);
>
> +    rc =3D irqs_setup_access(d);
> +    BUG_ON(rc !=3D 0);
> +
>      rc =3D dom0_setup_permissions(d);
>      BUG_ON(rc !=3D 0);
>
> diff --git a/xen/common/domain.c b/xen/common/domain.c
> index 775c33928585..edf76b02e1a1 100644
> --- a/xen/common/domain.c
> +++ b/xen/common/domain.c
> @@ -952,6 +952,11 @@ struct domain *domain_create(domid_t domid,
>      radix_tree_init(&d->pirq_tree);
>  #endif
>
> +    err =3D -ENOMEM;
> +    d->irq_caps =3D rangeset_new(d, "Interrupts", 0);
> +    if ( !d->irq_caps )
> +        goto fail;
> +
>      if ( (err =3D arch_domain_create(d, config, flags)) !=3D 0 )
>          goto fail;
>      init_status |=3D INIT_arch;
> @@ -961,8 +966,7 @@ struct domain *domain_create(domid_t domid,
>
>      err =3D -ENOMEM;
>      d->iomem_caps =3D rangeset_new(d, "I/O Memory", RANGESETF_prettyprin=
t_hex);
> -    d->irq_caps   =3D rangeset_new(d, "Interrupts", 0);
> -    if ( !d->iomem_caps || !d->irq_caps )
> +    if ( !d->iomem_caps )
>          goto fail;
>
>      if ( (err =3D xsm_domain_create(XSM_HOOK, d, config->ssidref)) !=3D =
0 )
> diff --git a/xen/common/emul/vuart/ns16x50.c b/xen/common/emul/vuart/ns16=
x50.c
> index ea34c3ae598a..6bd58ba5540b 100644
> --- a/xen/common/emul/vuart/ns16x50.c
> +++ b/xen/common/emul/vuart/ns16x50.c
> @@ -797,6 +797,15 @@ static int ns16x50_init(void *arg)
>          return rc;
>      }
>
> +    /* Disallow sharing physical IRQ */

Should this be undone on teardown and error paths?


Best regards,
Mykola


> +    rc =3D irq_deny_access(d, info->irq);
> +    if ( rc )
> +    {
> +        ns16x50_err(info, "virtual IRQ#%d: conflict w/ physical IRQ: %d\=
n",
> +                    info->irq, rc);
> +        return rc;
> +    }
> +
>      /* NB: report 115200 baud rate. */
>      vdev->regs[NS16X50_REGS_NUM + UART_DLL] =3D divisor & UINT8_MAX;
>      vdev->regs[NS16X50_REGS_NUM + UART_DLM] =3D (divisor >> 8) & UINT8_M=
AX;
> --
> 2.51.0
>
>


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From: Mykola Kvach 
Date: Tue, 18 Nov 2025 08:00:00 +0200
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Message-ID: 
Subject: Re: [PATCH v7 09/16] emul/ns16x50: implement RBR register
To: dmukhin@xen.org, xen-devel@lists.xenproject.org
Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, 
	julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, 
	sstabellini@kernel.org, dmukhin@ford.com
Content-Type: text/plain; charset="UTF-8"

Hi Denis,

Thank you for the patch.

On 09/09/2025 00:11, dmukhin@xen.org wrote:
> From: Denis Mukhin 
>
> Add RBR register emulation to the I/O port handlder.
>
> Add RX FIFO management code since RBR depends on RX FIFO.
>
> RX FIFO is not emulated as per UART specs for simplicity (not need to emulate
> baud rate). Emulator does not emulate NS8250 (no FIFO), NS16550a (16 bytes) or
> NS16750 (64 bytes).
>
> RX FIFO is emulated by means of using xencons_interface which conveniently
> provides primitives for buffer management and later can be used for
> inter-domain communication similarly to vpl011.
>
> Account for DLL == 0: in this case, disable receiver.
>
> Add UART_LSR_DR handling since it depends on RBR register access.
>
> Finally, implement put_rx() vUART hook for placing a character into the
> emulated RX FIFO from console driver. That implements physical console
> forwarding to the guest OS over emulated NS16550.
>
> Signed-off-by: Denis Mukhin 
> ---
> Changes since v6:
> - added DLL == 0 case handling as per Mykola's suggestion
> ---
>   xen/common/emul/vuart/ns16x50.c | 134 +++++++++++++++++++++++++++++++-
>   1 file changed, 132 insertions(+), 2 deletions(-)
>
> diff --git a/xen/common/emul/vuart/ns16x50.c b/xen/common/emul/vuart/ns16x50.c
> index fdc20124d4c9..250411e0a7d8 100644
> --- a/xen/common/emul/vuart/ns16x50.c
> +++ b/xen/common/emul/vuart/ns16x50.c
> @@ -9,6 +9,8 @@
>    *     https://www.ti.com/lit/ds/symlink/tl16c550c.pdf
>    * - UART w/ 64 byte FIFO:
>    *     https://www.ti.com/lit/ds/symlink/tl16c750.pdf
> + * - DesignWare DW_apb_uart Databook, v4.02a:
> + *     https://iccircle.com/static/upload/img20240313113905.pdf
>    *
>    * Limitations:
>    * - Only x86;
> @@ -85,6 +87,74 @@ struct vuart_ns16x50 {
>       struct xencons_interface cons;      /* Emulated RX/TX FIFOs */
>   };
>
> +static bool ns16x50_fifo_rx_empty(const struct vuart_ns16x50 *vdev)
> +{
> +    const struct xencons_interface *cons = &vdev->cons;
> +
> +    return cons->in_prod == cons->in_cons;
> +}
> +
> +static bool ns16x50_fifo_rx_full(const struct vuart_ns16x50 *vdev)
> +{
> +    const struct xencons_interface *cons = &vdev->cons;
> +
> +    return cons->in_prod - cons->in_cons == ARRAY_SIZE(cons->in);
> +}
> +
> +static void ns16x50_fifo_rx_reset(struct vuart_ns16x50 *vdev)
> +{
> +    struct xencons_interface *cons = &vdev->cons;
> +
> +    cons->in_cons = cons->in_prod;
> +}
> +
> +/*
> + * Transfer character from RX FIFO and return the RX FIFO status after the
> + * transfer.
> + */
> +static int ns16x50_fifo_rx_getchar(struct vuart_ns16x50 *vdev, uint8_t *ptr)
> +{
> +    struct xencons_interface *cons = &vdev->cons;
> +
> +    if ( ns16x50_fifo_rx_empty(vdev) )
> +        return -ENODATA;
> +
> +    *ptr = cons->in[MASK_XENCONS_IDX(cons->in_cons, cons->in)];
> +    cons->in_cons++;
> +
> +    return ns16x50_fifo_rx_empty(vdev) ? -ENODATA : 0;
> +}
> +
> +static int ns16x50_fifo_rx_putchar(struct vuart_ns16x50 *vdev, char c)
> +{
> +    struct xencons_interface *cons = &vdev->cons;
> +    int rc;
> +
> +    /*
> +     * FIFO-less 8250/16450 UARTs: newly arrived word overwrites the contents
> +     * of the THR.
> +     */
> +    if ( ns16x50_fifo_rx_full(vdev) )
> +    {
> +        ns16x50_debug(vdev, "RX FIFO full; resetting\n");
> +        ns16x50_fifo_rx_reset(vdev);

Do we really need to drop everything from the buffer here?
Should we document somewhere that in case of OE the whole RX buffer is dropped?

> +        rc = -ENOSPC;
> +    }
> +    else
> +        rc = 0;
> +
> +    cons->in[MASK_XENCONS_IDX(cons->in_prod, cons->in)] = c;
> +    cons->in_prod++;
> +
> +    return rc;
> +}
> +
> +static bool ns16x50_is_running(const struct vuart_ns16x50 *vdev)
> +{
> +    /* DLL set to 0 disables serial communication. */
> +    return vdev->regs[NS16X50_REGS_NUM + UART_DLL];
> +}
> +
>   static uint8_t ns16x50_dlab_get(const struct vuart_ns16x50 *vdev)
>   {
>       return vdev->regs[UART_LCR] & UART_LCR_DLAB ? 1 : 0;
> @@ -97,7 +167,7 @@ static bool cf_check ns16x50_iir_check_lsi(const struct vuart_ns16x50 *vdev)
>
>   static bool cf_check ns16x50_iir_check_rda(const struct vuart_ns16x50 *vdev)
>   {
> -    return false;
> +    return !ns16x50_fifo_rx_empty(vdev);
>   }
>
>   static bool cf_check ns16x50_iir_check_thr(const struct vuart_ns16x50 *vdev)
> @@ -362,6 +432,20 @@ static int ns16x50_io_read8(
>       {
>           switch ( reg )
>           {
> +        case UART_RBR:
> +            if ( !ns16x50_is_running(vdev) )
> +                break;
> +
> +            /* NB: do not forget to clear overrun condition */
> +            regs[UART_LSR] &= ~UART_LSR_OE;

The "NS16550A Universal Asynchronous Receiver/Transmitter
with FIFOs" states:

The OE indicator is set to a logic 1 upon detection of an overrun
condition and reset whenever the CPU reads the contents of the Line
Status Register.

So it looks like we don't need to clear this bit here.
According to the spec it should be cleared only on LSR read.

Best regards,
Mykola


> +
> +            if ( ns16x50_fifo_rx_getchar(vdev, &val) )
> +                regs[UART_LSR] &= ~UART_LSR_DR;
> +            else
> +                regs[UART_LSR] |= UART_LSR_DR;
> +
> +            break;
> +
>           case UART_IER:
>               val = regs[UART_IER];
>               break;
> @@ -611,13 +695,59 @@ static void cf_check ns16x50_free(void *arg)
>       xvfree(arg);
>   }
>
> +static int cf_check ns16x50_put_rx(void *arg, char ch)
> +{
> +    struct vuart_ns16x50 *vdev = arg;
> +    uint8_t *regs;
> +    uint8_t dlab;
> +    int rc = -EBUSY;
> +
> +    spin_lock(&vdev->lock);
> +
> +    dlab = ns16x50_dlab_get(vdev);
> +    regs = vdev->regs;
> +
> +    if ( !ns16x50_is_running(vdev) )
> +        ns16x50_debug(vdev, "THR/RBR access disabled: DLL == 0\n");
> +    else if ( dlab )
> +        ns16x50_debug(vdev, "THR/RBR access disabled: DLAB=1\n");
> +    else if ( regs[UART_MCR] & UART_MCR_LOOP )
> +        ns16x50_debug(vdev, "THR/RBR access disabled: loopback mode\n");
> +    else
> +    {
> +        const struct domain *d = vdev->owner;
> +
> +        /*
> +         * Echo the user input on Xen console iff Xen console input is owned
> +         * by ns16x50 domain.
> +         * NB: use 'console_timestamps=none' to disable Xen timestamps.
> +         */
> +        if ( is_console_printable(ch) )
> +            guest_printk(d, "%c", ch);
> +
> +        if ( ns16x50_fifo_rx_putchar(vdev, ch) )
> +            regs[UART_LSR] |= UART_LSR_OE;
> +
> +        regs[UART_LSR] |= UART_LSR_DR;
> +
> +        /* TODO: check FCR when to fire an interrupt */
> +        ns16x50_irq_check(vdev);
> +
> +        rc = 0;
> +    }
> +
> +    spin_unlock(&vdev->lock);
> +
> +    return rc;
> +}
> +
>   #define ns16x50_emulator                \
>   {                                       \
>       .compatible = "ns16550",            \
>       .alloc      = ns16x50_alloc,        \
>       .free       = ns16x50_free,         \
>       .dump_state = NULL,                 \
> -    .put_rx     = NULL,                 \
> +    .put_rx     = ns16x50_put_rx,       \
>   }
>
>   VUART_REGISTER(ns16x50, ns16x50_emulator);


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From: "Penny, Zheng" 
To: Jan Beulich 
CC: "Huang, Ray" , "oleksii.kurochko@gmail.com"
	, Andrew Cooper ,
	Anthony PERARD , "Orzel, Michal"
	, Julien Grall ,
	=?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= , Stefano
 Stabellini , "xen-devel@lists.xenproject.org"
	
Subject: RE: [PATCH v3 28/28] xen/domctl: wrap common/domctl.c with
 CONFIG_MGMT_HYPERCALLS
Thread-Topic: [PATCH v3 28/28] xen/domctl: wrap common/domctl.c with
 CONFIG_MGMT_HYPERCALLS
Thread-Index: AQHcPCqhC21cJdWa5E25eCgk7enLhrTazScAgB1fVEA=
Date: Tue, 18 Nov 2025 06:43:07 +0000
Message-ID:
 
References: <20251013101540.3502842-1-Penny.Zheng@amd.com>
 <20251013101540.3502842-29-Penny.Zheng@amd.com>
 
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From: "Penny, Zheng" 
To: Jan Beulich 
CC: "Huang, Ray" , "oleksii.kurochko@gmail.com"
	, Andrew Cooper ,
	=?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= ,
	"xen-devel@lists.xenproject.org" 
Subject: RE: [PATCH v3 27/28] xen/domctl: make HVM_PARAM_IDENT_PT conditional
 upon CONFIG_MGMT_HYPERCALLS
Thread-Topic: [PATCH v3 27/28] xen/domctl: make HVM_PARAM_IDENT_PT conditional
 upon CONFIG_MGMT_HYPERCALLS
Thread-Index: AQHcPCqgC80pLf2zKEG1m+/WaQbSMLTay4MAgB0wHeA=
Date: Tue, 18 Nov 2025 06:45:11 +0000
Message-ID:
 
References: <20251013101540.3502842-1-Penny.Zheng@amd.com>
 <20251013101540.3502842-28-Penny.Zheng@amd.com>
 
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Subject: Re: [for 4.22 v5 18/18] xen/riscv: introduce metadata table to store
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In-Reply-To: <5d4ec4d9-b4c1-4365-a343-f42b390da165@gmail.com>
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On 17.11.2025 20:51, Oleksii Kurochko wrote:
> On 11/12/25 12:49 PM, Jan Beulich wrote:
>> On 20.10.2025 17:58, Oleksii Kurochko wrote:
>>> +    if ( *md_pg )
>>> +        metadata = __map_domain_page(*md_pg);
>>> +
>>> +    if ( t < p2m_first_external )
>>> +    {
>>>           pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK);
>>>   -    return rc;
>>> +        if ( metadata )
>>> +            metadata[ctx->index].pte = p2m_invalid;
>> Shouldn't this be accompanied with a BUILD_BUG_ON(p2m_invalid), as otherwise
>> p2m_alloc_page()'s clearing of the page won't have the intended effect?
> 
> I think that, at least, at the moment we are always explicitly set p2m type and
> do not rely on that by default 0==p2m_invalid.

You don't, and ...

> Just to be safe, I will add after "if ( metadata )" suggested
> BUILD_BUG_ON(p2m_invalid):
>         if ( metadata )
>             metadata[ctx->index].type = p2m_invalid;
>                 /*
>          * metadata.type is expected to be p2m_invalid (0) after the page is
>          * allocated and zero-initialized in p2m_alloc_page().
>          */
>         BUILD_BUG_ON(p2m_invalid);
> ...

... this leaves me with the impression that you didn't read my reply correctly.
p2m_alloc_page() clear the page, thus _implicitly_ setting all entries to
p2m_invalid. That's where the BUILD_BUG_ON() would want to go (the call site,
ftaod).

>>> +    }
>>> +    else
>>> +    {
>>> +        pte->pte |= MASK_INSR(p2m_ext_storage, P2M_TYPE_PTE_BITS_MASK);
>>> +
>>> +        metadata[ctx->index].pte = t;
>> If you set t to p2m_ext_storage here, the pte->pte updating could be moved ...
> 
> 't' shouldn't be passed as 'p2m_ext_storage'.

Of course not. I said "set", not "pass". I suggested to set t to p2m_ext_storage
right after the assignment above. I notice though that I missed ...

> For example, in this case we will have that in metadata page we will have type
> equal to p2m_ext_storage and then in pte->pte will have the type set to
> p2m_ext_storage, and the we end that we don't have a real type stored somewhere.
> Even more, metadata.pte shouldn't be used to store p2m_ext_storage, only
> p2m_invalid and types mentioned in enum p2m_t after p2m_ext_storage.
> 
>>
>>> +    }
>> ... here, covering both cases. Overally this may then be easier as
>>
>>      if ( t >= p2m_first_external )
>>          metadata[ctx->index].pte = t;

... the respective line (and the figure braces which are the needed) here:

        t = p2m_ext_storage;

>>      else if ( metadata )
>>          metadata[ctx->index].pte = p2m_invalid;
>>
>>      pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK);
>>
>> Then raising the question whether it couldn't still be the real type that's
>> stored in metadata[] even for t < p2m_first_external. That woiuld further
>> reduce conditionals.
> 
> It would be nice, but I think that at the moment we can’t do that. As I explained
> above, 't' should not normally be passed as p2m_ext_storage.

Of course not, but how's that relevant to storing the _real_ type in the
metadata page even when it's one which can also can be stored in the PTE?
As said, for a frequently used path it may help to reduce the number of
conditionals here.

>>> +static void p2m_free_page(struct p2m_domain *p2m, struct page_info *pg);
>>> +
>>> +/*
>>> + * Free page table's page and metadata page linked to page table's page.
>>> + */
>>> +static void p2m_free_table(struct p2m_domain *p2m, struct page_info *tbl_pg)
>>> +{
>>> +    if ( tbl_pg->v.md.pg )
>>> +        p2m_free_page(p2m, tbl_pg->v.md.pg);
>> To play safe, maybe better also clear tbl_pg->v.md.pg?
> 
> I thought it would be enough to clear it during allocation in p2m_alloc_page(),
> since I'm not sure it is critical if md.pg data were somehow leaked and read.
> But to be safer, we can add this here:
>    clear_and_clean_page(tbl_pg->v.md.pg, p2m->clean_dcache);

I didn't say clear what tbl_pg->v.md.pg points to, though. I suggested to clear
the struct field itself.

>>> @@ -749,6 +849,10 @@ static bool p2m_split_superpage(struct p2m_domain *p2m, pte_t *entry,
>>>       unsigned int next_level = level - 1;
>>>       unsigned int level_order = P2M_LEVEL_ORDER(next_level);
>>>   +    struct p2m_pte_ctx p2m_pte_ctx;
>> I think this would better be one variable instance per scope where it's needed,
>> and then using an initzializer. Or else ...
>>
>>> +    /* Init with p2m_invalid just to make compiler happy. */
>>> +    p2m_type_t old_type = p2m_invalid;
>>> +
>>>       /*
>>>        * This should only be called with target != level and the entry is
>>>        * a superpage.
>>> @@ -770,6 +874,19 @@ static bool p2m_split_superpage(struct p2m_domain *p2m, pte_t *entry,
>>>         table = __map_domain_page(page);
>>>   +    if ( MASK_EXTR(entry->pte, P2M_TYPE_PTE_BITS_MASK) == p2m_ext_storage )
>>> +    {
>>> +        p2m_pte_ctx.pt_page = tbl_pg;
>>> +        p2m_pte_ctx.index = offsets[level];
>>> +        /*
>>> +         * It doesn't really matter what is a value for a level as
>>> +         * p2m_get_type() doesn't need it, so it is initialized just in case.
>>> +         */
>>> +        p2m_pte_ctx.level = level;
>>> +
>>> +        old_type = p2m_get_type(*entry, &p2m_pte_ctx);
>>> +    }
>>> +
>>>       for ( i = 0; i < P2M_PAGETABLE_ENTRIES(next_level); i++ )
>>>       {
>>>           pte_t *new_entry = table + i;
>>> @@ -781,6 +898,15 @@ static bool p2m_split_superpage(struct p2m_domain *p2m, pte_t *entry,
>>>           pte = *entry;
>>>           pte_set_mfn(&pte, mfn_add(mfn, i << level_order));
>>>   +        if ( MASK_EXTR(pte.pte, P2M_TYPE_PTE_BITS_MASK) == p2m_ext_storage )
>>> +        {
>>> +            p2m_pte_ctx.pt_page = page;
>>> +            p2m_pte_ctx.index = i;
>>> +            p2m_pte_ctx.level = next_level;
>> ... why are the loop-invariat fields not filled ahead of the loop here?
> 
> Actually, they could be filled before the loop. If I move the initialization of
> p2m_pte_ctx.pt_page and p2m_pte_ctx.level ahead of the loop, does it still make
> sense to have a separate variable inside
> "if (MASK_EXTR(entry->pte, P2M_TYPE_PTE_BITS_MASK) == p2m_ext_storage)"?

No, it's one of the two - scope limited variable within the loop, or wider-scope
variable with loop-invariant fields set ahead of the loop.

Jan


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From: "Penny, Zheng" 
To: Jan Beulich 
CC: Andrew Cooper ,
	=?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= , "Andryuk, Jason"
	, "xen-devel@lists.xenproject.org"
	
Subject: RE: [PATCH v1 1/7] xen/svm: limit the scope of "rc"
Thread-Topic: [PATCH v1 1/7] xen/svm: limit the scope of "rc"
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Date: Tue, 18 Nov 2025 07:11:25 +0000
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On 18.11.2025 07:45, Penny, Zheng wrote:
> [Public]
> 
>> -----Original Message-----
>> From: Jan Beulich 
>> Sent: Thursday, October 30, 2025 9:35 PM
>> To: Penny, Zheng 
>> Cc: Huang, Ray ; oleksii.kurochko@gmail.com; Andrew
>> Cooper ; Roger Pau Monné ;
>> xen-devel@lists.xenproject.org
>> Subject: Re: [PATCH v3 27/28] xen/domctl: make HVM_PARAM_IDENT_PT
>> conditional upon CONFIG_MGMT_HYPERCALLS
>>
>> On 13.10.2025 12:15, Penny Zheng wrote:
>>> Helper domctl_lock_{acquire,release} is domctl_lock, which
>>> HVM_PARAM_IDENT_PT uses to ensure synchronization and hence being a
>> toolstack-only operation.
>>> So we shall make HVM_PARAM_IDENT_PT conditional upon
>>> CONFIG_MGMT_HYPERCALLS, returning -EOPNOTSUPP when
>> MGMT_HYPERCALLS=n.
>>>
>>> Suggested-by: Jan Beulich 
>>
>> I fear this isn't quite what I suggested. The param get/set are XSM_TARGET, i.e.
>> can be used by DM as well. The particular one here shouldn't be used by a DM, but
>> that's a different question. Similarly in principle the PVH Dom0 building code should
>> be able to use this path; it doesn't right now in favor of some open- coding.
>>
>> What iirc I did suggest was that the serialization isn't needed when no domctl can
>> be used to otherwise alter (relevant) guest state.
> 
> Ah, true, serialization isn't needed when MGMT_HYPERCALLS=n, as no domctl-op could alter the guest state at the same time.
> Then maybe adding IS_ENABLED() checking is enough:

Yes, that or indeed introducing stubs. Which one is the lesser evil I'm having
a hard time determining. Hence I'd suggest that you go with the below, unless
someone else chimes in.

Jan

> ```
> diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
> index 5a50721bd0..4e1b3ee5f4 100644
> --- a/xen/arch/x86/hvm/hvm.c
> +++ b/xen/arch/x86/hvm/hvm.c
> @@ -4324,7 +4324,7 @@ static int hvm_set_param(struct domain *d, uint32_t index, uint64_t value)
>           * the domctl_lock.
>           */
>          rc = -ERESTART;
> -        if ( !domctl_lock_acquire() )
> +        if ( IS_ENABLED(CONFIG_MGMT_HYPERCALLS) && !domctl_lock_acquire() )
>              break;
> 
>          rc = 0;
> @@ -4334,7 +4334,8 @@ static int hvm_set_param(struct domain *d, uint32_t index, uint64_t value)
>              paging_update_cr3(v, false);
>          domain_unpause(d);
> 
> -        domctl_lock_release();
> +        if ( IS_ENABLED(CONFIG_MGMT_HYPERCALLS) )
> +            domctl_lock_release();
>          break;
>      case HVM_PARAM_DM_DOMAIN:
>          /* The only value this should ever be set to is DOMID_SELF */
> ```
> 
>>
>> Jan



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Subject: Re: [PATCH v3 28/28] xen/domctl: wrap common/domctl.c with
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To: "Penny, Zheng" 
Cc: "Huang, Ray" ,
 "oleksii.kurochko@gmail.com" ,
 Andrew Cooper ,
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 "xen-devel@lists.xenproject.org" 
References: <20251013101540.3502842-1-Penny.Zheng@amd.com>
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On 18.11.2025 07:43, Penny, Zheng wrote:
> [Public]
> 
>> -----Original Message-----
>> From: Jan Beulich 
>> Sent: Thursday, October 30, 2025 9:40 PM
>> To: Penny, Zheng 
>> Cc: Huang, Ray ; oleksii.kurochko@gmail.com; Andrew
>> Cooper ; Anthony PERARD
>> ; Orzel, Michal ; Julien
>> Grall ; Roger Pau Monné ; Stefano
>> Stabellini ; xen-devel@lists.xenproject.org
>> Subject: Re: [PATCH v3 28/28] xen/domctl: wrap common/domctl.c with
>> CONFIG_MGMT_HYPERCALLS
>>
>> On 13.10.2025 12:15, Penny Zheng wrote:
>>> --- a/xen/common/Kconfig
>>> +++ b/xen/common/Kconfig
>>> @@ -646,11 +646,13 @@ config SYSTEM_SUSPEND
>>>       If unsure, say N.
>>>
>>>  config MGMT_HYPERCALLS
>>> -   def_bool y
>>> +   bool "Enable privileged hypercalls for system management"
>>>     help
>>>       This option shall only be disabled on some dom0less systems, or
>>>       PV shim on x86, to reduce Xen footprint via managing unnessary
>>> -     hypercalls, like sysctl, etc.
>>> +     hypercalls, like sysctl, domctl, etc.
>>> +     Be cautious to disable it, as users will face missing a few basic
>>> +     hypercalls like listdomains, getdomaininfo, etc.
>>
>> This is still too little, imo. For one I'm not sure "users" is quite the right term. I'd say
>> it's more "admins". And then, as mentioned, there are a few domctl-s which are
>> usable by DMs. Aiui device pass-through may also be impacted, which imo will
>> want mentioning here as well. Or else, if there is an implication that DMs aren't to
>> be used when MGMT_HYPERCALLS=n, that is what would want calling out.
> 
> How about
> "
>         Be cautious to disable it, as admins will face missing a few basic
>         hypercalls like listdomains, getdomaininfo, etc, hence leading to
>         have an impact on xl-device-passthrough and restricted DM.
> "

Much better. However, why "xl-" and why "restricted"? Neither aspect matters
here, unless I overlook something.

> Another question on PV_SHIM_EXCLUSIVE:
> After Stefano's " 6c80f0dd1bb  xen: fix randconfig build problems after introducing SYSCTL " reversion patch, and to avoid incurring randconfig failures till the last, maybe I shall combine all PV_SHIM_EXCLUSIVE-related changes into a new commit and put it in the last, after making MGMT_HYPERCALLS optional again?

Whatever works best.

Jan


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Date: Tue, 18 Nov 2025 08:49:34 +0100
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Subject: Re: [PATCH 1/3] x86/ucode: Fix error handling during parallel ucode
 load
To: Andrew Cooper 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Xen-devel 
References: <20251117222120.473451-1-andrew.cooper3@citrix.com>
 <20251117222120.473451-2-andrew.cooper3@citrix.com>
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From: Jan Beulich 
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On 17.11.2025 23:21, Andrew Cooper wrote:
> wait_for_state() returns false on encountering LOADING_EXIT.
> control_thread_fn() can move directly to this state in the case of an early
> error.  It is not an error condition for APs, but right now the latest write
> into stopmachine_data.fn_result wins, causing the real error, -EIO, to get
> clobbered with -EBUSY.  e.g.:
> 
>   # xen-ucode /lib/firmware/amd-ucode/microcode_amd_fam17h.bin --force
>   Failed to update microcode. (err: Device or resource busy)
> 
>   (XEN) 256 cores are to update their microcode
>   (XEN) microcode: CPU0 update rev 0x830107d to 0x830107c failed, result 0x830107d
>   (XEN) Late loading aborted: CPU0 failed to update ucode: -5
> 
> Drop all the -EBUSY's, and treat hitting LOADING_EXIT as a success case.  This
> causes only a single error to be returned through stop_machine_run().  e.g.:

Why "single"? stop_machine_run() can't return multiple ones, having only a
scalar return type? Or do you mean "a single, consistent" or some such?

>   # xen-ucode /lib/firmware/amd-ucode/microcode_amd_fam17h.bin --force
>   Failed to update microcode. (err: Input/output error)
> 
>   (XEN) 256 cores are to update their microcode
>   (XEN) microcode: CPU0 update rev 0x830107d to 0x830107c failed, result 0x830107d
>   (XEN) Late loading aborted: CPU0 failed to update ucode: -5

The sole difference being which specific error is observed, which looks to
support the above interpretation. What I don't quite understand is ...

> Fixes: 5ed12565aa32 ("microcode: rendezvous CPUs in NMI handler and load ucode")

... this and the specific indication that this needs backporting: Why is
the particular error code this important here?

> --- a/xen/arch/x86/cpu/microcode/core.c
> +++ b/xen/arch/x86/cpu/microcode/core.c
> @@ -260,7 +260,9 @@ static int secondary_nmi_work(void)
>  {
>      cpumask_set_cpu(smp_processor_id(), &cpu_callin_map);
>  
> -    return wait_for_state(LOADING_EXIT) ? 0 : -EBUSY;
> +    wait_for_state(LOADING_EXIT);
> +
> +    return 0;
>  }

At which point the function could as well return void? Preferably with this
adjustment (and the knock-on one at the call site) and with the slight
clarification to the description
Reviewed-by: Jan Beulich 

> @@ -271,7 +273,7 @@ static int primary_thread_work(const struct microcode_patch *patch,
>      cpumask_set_cpu(smp_processor_id(), &cpu_callin_map);
>  
>      if ( !wait_for_state(LOADING_ENTER) )
> -        return -EBUSY;
> +        return 0;
>  
>      ret = alternative_call(ucode_ops.apply_microcode, patch, flags);
>      if ( !ret )
> @@ -313,7 +315,7 @@ static int cf_check microcode_nmi_callback(
>  static int secondary_thread_fn(void)
>  {
>      if ( !wait_for_state(LOADING_CALLIN) )
> -        return -EBUSY;
> +        return 0;
>  
>      self_nmi();
>  
> @@ -336,7 +338,7 @@ static int primary_thread_fn(const struct microcode_patch *patch,
>                               unsigned int flags)
>  {
>      if ( !wait_for_state(LOADING_CALLIN) )
> -        return -EBUSY;
> +        return 0;
>  
>      if ( ucode_in_nmi )
>      {

Vaguely recalling the original intentions, these changes looked wrong to me at
the first glance. But yes, an exit indication from the control thread isn't
really a separate error condition.

Jan


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From: "Penny, Zheng" 
To: Jan Beulich , "Andryuk, Jason" 
CC: "Huang, Ray" , "oleksii.kurochko@gmail.com"
	, Andrew Cooper ,
	Anthony PERARD , "Orzel, Michal"
	, Julien Grall ,
	=?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= , Stefano
 Stabellini , "xen-devel@lists.xenproject.org"
	
Subject: RE: [PATCH v3 28/28] xen/domctl: wrap common/domctl.c with
 CONFIG_MGMT_HYPERCALLS
Thread-Topic: [PATCH v3 28/28] xen/domctl: wrap common/domctl.c with
 CONFIG_MGMT_HYPERCALLS
Thread-Index: AQHcPCqhC21cJdWa5E25eCgk7enLhrTazScAgB1wfK+AAAbwUA==
Date: Tue, 18 Nov 2025 07:51:29 +0000
Message-ID:
 
References: <20251013101540.3502842-1-Penny.Zheng@amd.com>
 <20251013101540.3502842-29-Penny.Zheng@amd.com>
 
 
 
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Subject: Re: [PATCH 2/3] x86/ucode: Drop structurally unreachable ASSERT()s
To: Andrew Cooper 
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On 17.11.2025 23:21, Andrew Cooper wrote:
> It's impossible for wait_for_state() to return false when looking for
> LOADING_EXIT, so much so that the optimiser can drop the ASSERT()s.
> 
> No functional change.
> 
> Fixes: 5ed12565aa32 ("microcode: rendezvous CPUs in NMI handler and load ucode")
> Signed-off-by: Andrew Cooper 

Reviewed-by: Jan Beulich 

Besides helping code clarity, mainly a Misra fix as it looks (unreachable
code).

Jan


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Subject: Re: [PATCH 3/3] x86/ucode: Create a real type for loading_state
To: Andrew Cooper 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 17.11.2025 23:21, Andrew Cooper wrote:
> Using typeof() in wait_for_state()/set_state() unnecesserily cryptic, and more
> verbose than using a proper type.
> 
> No functional change.
> 
> Signed-off-by: Andrew Cooper 

I don't strictly mind the change, so
Acked-by: Jan Beulich 
but I think the use of typeof() also has its benefits:

> @@ -237,9 +238,9 @@ static bool cf_check wait_cpu_callout(unsigned int nr)
>      return atomic_read(&cpu_out) >= nr;
>  }
>  
> -static bool wait_for_state(typeof(loading_state) state)
> +static bool wait_for_state(loading_state_t state)
>  {
> -    typeof(loading_state) cur_state;
> +    loading_state_t cur_state;
>  
>      while ( (cur_state = ACCESS_ONCE(loading_state)) != state )
>      {

Even if the type of loading_state changed, no type mismatches would result
here. Or in other words, a type adjustment there would not entail code
changes here and ...

> @@ -251,7 +252,7 @@ static bool wait_for_state(typeof(loading_state) state)
>      return true;
>  }
>  
> -static void set_state(typeof(loading_state) state)
> +static void set_state(loading_state_t state)
>  {
>      ACCESS_ONCE(loading_state) = state;
>  }

... here (which could easily be forgotten as the compiler might not flag
such mismatches).

Thing of course is that the type of loading_state is pretty unlikely to
change.

Jan


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References: <20241217170637.233097-1-carlo.nonato@minervasys.tech>
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From: Mykola Kvach 
Date: Tue, 18 Nov 2025 10:08:45 +0200
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Message-ID: 
Subject: Re: [PATCH v13 01/12] xen/common: add cache coloring common code
To: Julien Grall 
Cc: Carlo Nonato , xen-devel@lists.xenproject.org, 
	andrea.bastoni@minervasys.tech, marco.solieri@minervasys.tech, 
	Andrew Cooper , Anthony PERARD , 
	Michal Orzel , Jan Beulich , 
	=?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
	Stefano Stabellini 
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Hi Julien,

Thanks for your response.

On Tue, Nov 11, 2025 at 1:02=E2=80=AFAM Julien Grall  wrote=
:
>
> Hi Mykola,
>
> On 07/11/2025 08:27, Mykola Kvach wrote:
> >> +void __init llc_coloring_init(void)
> >> +{
> >> +    unsigned int way_size;
> >> +
> >> +    llc_coloring_enabled =3D (opt_llc_coloring >=3D 1);
> >> +    if ( (opt_llc_coloring !=3D 0) && llc_size && llc_nr_ways )
> >> +    {
> >> +        llc_coloring_enabled =3D true;
> >> +        way_size =3D llc_size / llc_nr_ways;
> >> +    }
> >> +    else if ( !llc_coloring_enabled )
> >> +        return;
> >> +    else
> >> +    {
> >> +        way_size =3D get_llc_way_size();
> >> +        if ( !way_size )
> >> +            panic("LLC probing failed and 'llc-size' or 'llc-nr-ways'
> >> missing\n");
> >
> > As far as I can see, this error means that we did not detect a suitable
> > LLC/unified cache.
> > Maybe it would be better to make that explicit in the panic message.
>
> I am rather confused why there are reviews on the series that was merged
> nearly a year ago. If you have comments that needs to be addressed, then
> it would be best to either send a new series or start a new thread (if
> there are bugs which needs discussion).

I wasn=E2=80=99t reviewing this specific series, but rather the code in
mainline. I needed to understand whether the LLC coloring code could
impact suspend/resume (s2ram) functionality, because one of my TODO
items was to check and test the interaction between s2ram and LLC
coloring.

During this testing I noticed a few potential problems and had some
questions. Then I found the corresponding mailing list series and saw
that the part I was interested in has not changed since it was
merged, so I replied directly to that thread because the context
still matches the current mainline code.

At the time this felt like the quickest way to ask questions in the
right context without duplicating it. I understand now that this is
not the preferred workflow for this project. In the near future I
will start a new discussion thread about my findings, or possibly
send patches if I manage to address some of them myself.

Thank you.

>
> Cheers,
>
> --
> Julien Grall
>

Best regards,
Mykola


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Subject: Re: [for 4.22 v5 01/18] xen/riscv: detect and initialize G-stage mode
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: 
 <2b21348b3300c741b276a47d5942e71d306846eb.1760974017.git.oleksii.kurochko@gmail.com>
 <8b204b21-80fb-408d-972e-8f183eb45dfc@suse.com>
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From: Oleksii Kurochko 
In-Reply-To: <7d81564c-d7c0-47f4-9f2c-bf4508a0a870@suse.com>

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On 11/13/25 5:32 PM, Jan Beulich wrote:
> On 13.11.2025 17:18, Oleksii Kurochko wrote:
>> On 11/6/25 2:43 PM, Jan Beulich wrote:
>>> On 20.10.2025 17:57, Oleksii Kurochko wrote:
>>>> Changes in V5:
>>>>    - Add static and __initconst for local variable modes[] in
>>>>      gstage_mode_detect().
>>>>    - Change type for gstage_mode from 'unsigned long' to 'unsigned char'.
>>>>    - Update the comment inisde defintion if modes[] variable in
>>>>      gstage_mode_detect():
>>>>      - Add information about Bare mode.
>>>>      - Drop "a paged virtual-memory scheme described in Section 10.3" as it isn't
>>>>        relevant here.
>>>>    - Drop printing of function name when chosen G-stage mode message is printed.
>>>>    - Drop the call of gstage_mode_detect() from start_xen(). It will be added into
>>>>      p2m_init() when the latter will be introduced.
>>> Well, thanks, but ...
>>>
>>>>    - Introduce pre_gstage_init().
>>> ... the same comment that I gave before now applies here: This doesn't look to
>>> belong directly in start_xen(). In x86'es terms I'd say this is a tiny part of
>>> paging_init().
>> Does it only the question of function naming now?
> Not just, no. My point is that you shouldn't pollute start_xen() with calls to
> dozens of special-purpose functions. There wants to be one call dealing with
> everything guest-mm related, I think.

I think I understand your point now. I’ll introduce|guest_mm_init()| and move
everything related to it inside that function (at the moment, this includes
the VMID initialization and G-stage mode detection).

>
>> IMO, ideally it would be nice to have it in p2m_init(), but there is no a lot of
>> sense to detect supported modes each time a domain is constructed. And it is the
>> reason why I put directly to start_xen().
> No per-domain function wants to be used for this, I agree. Hence why I pointed
> you at x86'es paging_init().
>
>>>> --- /dev/null
>>>> +++ b/xen/arch/riscv/p2m.c
>>>> @@ -0,0 +1,96 @@
>>>> +/* SPDX-License-Identifier: GPL-2.0-only */
>>>> +
>>>> +#include 
>>>> +#include 
>>>> +#include 
>>>> +#include 
>>>> +
>>>> +#include 
>>>> +#include 
>>>> +#include 
>>>> +
>>>> +unsigned char __ro_after_init gstage_mode;
>>>> +
>>>> +static void __init gstage_mode_detect(void)
>>>> +{
>>>> +    static const struct {
>>>> +        unsigned char mode;
>>>> +        unsigned int paging_levels;
>>>> +        const char name[8];
>>>> +    } modes[] __initconst = {
>>>> +        /*
>>>> +         * Based on the RISC-V spec:
>>>> +         *   Bare mode is always supported, regardless of SXLEN.
>>>> +         *   When SXLEN=32, the only other valid setting for MODE is Sv32.
>>>> +         *   When SXLEN=64, three paged virtual-memory schemes are defined:
>>>> +         *   Sv39, Sv48, and Sv57.
>>>> +         */
>>>> +#ifdef CONFIG_RISCV_32
>>>> +        { HGATP_MODE_SV32X4, 2, "Sv32x4" }
>>>> +#else
>>>> +        { HGATP_MODE_SV39X4, 3, "Sv39x4" },
>>>> +        { HGATP_MODE_SV48X4, 4, "Sv48x4" },
>>>> +        { HGATP_MODE_SV57X4, 5, "Sv57x4" },
>>>> +#endif
>>>> +    };
>>>> +
>>>> +    unsigned int mode_idx;
>>>> +
>>>> +    gstage_mode = HGATP_MODE_OFF;
>>> Why is this not the variable's initializer?
>> Good point. It should be the variable's initializer.
>>
>>>> +    for ( mode_idx = 0; mode_idx < ARRAY_SIZE(modes); mode_idx++ )
>>>> +    {
>>>> +        unsigned long mode = modes[mode_idx].mode;
>>>> +
>>>> +        csr_write(CSR_HGATP, MASK_INSR(mode, HGATP_MODE_MASK));
>>>> +
>>>> +        if ( MASK_EXTR(csr_read(CSR_HGATP), HGATP_MODE_MASK) == mode )
>>>> +        {
>>>> +            gstage_mode = mode;
>>>> +            break;
>>>> +        }
>>>> +    }
>>> I take it that using the first available mode is only transient. To support bigger
>>> guests, you may need to pick 48x4 or even 57x4 no matter that 39x4 is available.
>> I considered traversing the|modes[]| array in the opposite order so that the largest
>> mode would be checked first. However, I decided that 39x4 is sufficiently large and
>> provides a good balance between the number of page tables and supported address
>> space, at least for now.
>>
>>> I wonder whether you wouldn't be better off recording all supported modes right
>>> away.
>> What would be the use case for recording and storing all supported modes?
>> For example, would it be used to indicate which mode is preferable for a guest
>> domain via the device tree?
> Why device tree? That's what's exposed to guests, isn't it? Here we talk about
> what Xen uses to run guests. And that can vary from guest to guest.

At the same time, the bootloader also passes a device tree to Xen, and Xen
uses it, at least—to determine the RAM addresses and sizes. I also referred to
device tree because it can indicate the largest MMU mode supported on a hart:
   mmu-type:
     description:
       Identifies the largest MMU address translation mode supported by
       this hart.  These values originate from the RISC-V Privileged
       Specification document, available from
       https://riscv.org/specifications/
     $ref: /schemas/types.yaml#/definitions/string
     enum:
       - riscv,sv32
       - riscv,sv39
       - riscv,sv48
       - riscv,sv57
       - riscv,none
And so, I thought, that Xen could also re-use this information and use it as starting
value for Mode detection. But considering how much modes are supported by RISC-V spec,
it seems that it won't be too long just to detect which are supported in the way it
is done now.

>
>> Also, I’d like to note that it probably doesn’t make much sense to record all
>> supported modes. If we traverse the|modes[]| array in the opposite order—checking
>> |Sv57| first—then, according to the RISC-V specification:
>> - Implementations that support Sv57 must also support Sv48.
>> - Implementations that support Sv48 must also support Sv39.
>> So if Sv57 is supported then lower modes are supported too. (except Sv32 for RV32)
>>
>> Based on this, it seems reasonable to start checking from Sv57, right?
> No. Bigger guests want running in 48x4, huge ones in 57x4 (each: if available),
> and most ones in 39x4. It doesn't matter what direction you do the checks, you
> want to know what you have available.

My point was that if we change the direction, then once we find the first (largest)
supported MMU mode, there is no need to check the others (lower modes) as according
to the RISC-V specification, the lower modes must be supported automatically.

~ Oleksii

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On 11/13/25 5:32 PM, Jan Beulich wrote:

    

    

      
On 13.11.2025 17:18, Oleksii Kurochko wrote:


      

        
On 11/6/25 2:43 PM, Jan Beulich wrote:


        

          
On 20.10.2025 17:57, Oleksii Kurochko wrote:


          

            
Changes in V5:
  - Add static and __initconst for local variable modes[] in
    gstage_mode_detect().
  - Change type for gstage_mode from 'unsigned long' to 'unsigned char'.
  - Update the comment inisde defintion if modes[] variable in
    gstage_mode_detect():
    - Add information about Bare mode.
    - Drop "a paged virtual-memory scheme described in Section 10.3" as it isn't
      relevant here.
  - Drop printing of function name when chosen G-stage mode message is printed.
  - Drop the call of gstage_mode_detect() from start_xen(). It will be added into
    p2m_init() when the latter will be introduced.


          

          
Well, thanks, but ...



          

            
  - Introduce pre_gstage_init().


          

          
... the same comment that I gave before now applies here: This doesn't look to
belong directly in start_xen(). In x86'es terms I'd say this is a tiny part of
paging_init().


        

        
Does it only the question of function naming now?


      

      
Not just, no. My point is that you shouldn't pollute start_xen() with calls to
dozens of special-purpose functions. There wants to be one call dealing with
everything guest-mm related, I think.

    

    
I think I understand your point now. I’ll introduce guest_mm_init() and move
everything related to it inside that function (at the moment, this includes
the VMID initialization and G-stage mode detection).



    

      



      

        
IMO, ideally it would be nice to have it in p2m_init(), but there is no a lot of
sense to detect supported modes each time a domain is constructed. And it is the
reason why I put directly to start_xen().


      

      
No per-domain function wants to be used for this, I agree. Hence why I pointed
you at x86'es paging_init().



      

        

          

            
--- /dev/null
+++ b/xen/arch/riscv/p2m.c
@@ -0,0 +1,96 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <xen/init.h>
+#include <xen/lib.h>
+#include <xen/macros.h>
+#include <xen/sections.h>
+
+#include <asm/csr.h>
+#include <asm/flushtlb.h>
+#include <asm/riscv_encoding.h>
+
+unsigned char __ro_after_init gstage_mode;
+
+static void __init gstage_mode_detect(void)
+{
+    static const struct {
+        unsigned char mode;
+        unsigned int paging_levels;
+        const char name[8];
+    } modes[] __initconst = {
+        /*
+         * Based on the RISC-V spec:
+         *   Bare mode is always supported, regardless of SXLEN.
+         *   When SXLEN=32, the only other valid setting for MODE is Sv32.
+         *   When SXLEN=64, three paged virtual-memory schemes are defined:
+         *   Sv39, Sv48, and Sv57.
+         */
+#ifdef CONFIG_RISCV_32
+        { HGATP_MODE_SV32X4, 2, "Sv32x4" }
+#else
+        { HGATP_MODE_SV39X4, 3, "Sv39x4" },
+        { HGATP_MODE_SV48X4, 4, "Sv48x4" },
+        { HGATP_MODE_SV57X4, 5, "Sv57x4" },
+#endif
+    };
+
+    unsigned int mode_idx;
+
+    gstage_mode = HGATP_MODE_OFF;


          

          
Why is this not the variable's initializer?


        

        
Good point. It should be the variable's initializer.



        

          

            
+    for ( mode_idx = 0; mode_idx < ARRAY_SIZE(modes); mode_idx++ )
+    {
+        unsigned long mode = modes[mode_idx].mode;
+
+        csr_write(CSR_HGATP, MASK_INSR(mode, HGATP_MODE_MASK));
+
+        if ( MASK_EXTR(csr_read(CSR_HGATP), HGATP_MODE_MASK) == mode )
+        {
+            gstage_mode = mode;
+            break;
+        }
+    }


          

          
I take it that using the first available mode is only transient. To support bigger
guests, you may need to pick 48x4 or even 57x4 no matter that 39x4 is available.


        

        
I considered traversing the|modes[]| array in the opposite order so that the largest
mode would be checked first. However, I decided that 39x4 is sufficiently large and
provides a good balance between the number of page tables and supported address
space, at least for now.



        

          
I wonder whether you wouldn't be better off recording all supported modes right
away.


        

        
What would be the use case for recording and storing all supported modes?
For example, would it be used to indicate which mode is preferable for a guest
domain via the device tree?


      

      
Why device tree? That's what's exposed to guests, isn't it? Here we talk about
what Xen uses to run guests. And that can vary from guest to guest.

    

    
At the same time, the bootloader also passes a device tree to Xen, and Xen
uses it, at least—to determine the RAM addresses and sizes. I also referred to
device tree because it can indicate the largest MMU mode supported on a hart:
  mmu-type:
    description:
      Identifies the largest MMU address translation mode supported by
      this hart.  These values originate from the RISC-V Privileged
      Specification document, available from
      https://riscv.org/specifications/
    $ref: /schemas/types.yaml#/definitions/string
    enum:
      - riscv,sv32
      - riscv,sv39
      - riscv,sv48
      - riscv,sv57
      - riscv,none
And so, I thought, that Xen could also re-use this information and use it as starting
value for Mode detection. But considering how much modes are supported by RISC-V spec,
it seems that it won't be too long just to detect which are supported in the way it
is done now.



    

      



      

        
Also, I’d like to note that it probably doesn’t make much sense to record all
supported modes. If we traverse the|modes[]| array in the opposite order—checking
|Sv57| first—then, according to the RISC-V specification:
- Implementations that support Sv57 must also support Sv48.
- Implementations that support Sv48 must also support Sv39.
So if Sv57 is supported then lower modes are supported too. (except Sv32 for RV32)

Based on this, it seems reasonable to start checking from Sv57, right?


      

      
No. Bigger guests want running in 48x4, huge ones in 57x4 (each: if available),
and most ones in 39x4. It doesn't matter what direction you do the checks, you
want to know what you have available.

    

    
My point was that if we change the direction, then once we find the first (largest)
supported MMU mode, there is no need to check the others (lower modes) as according
to the RISC-V specification, the lower modes must be supported automatically.

~ Oleksii

  


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Subject: Re: [for 4.22 v5 01/18] xen/riscv: detect and initialize G-stage mode
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
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On 18.11.2025 09:56, Oleksii Kurochko wrote:
> On 11/13/25 5:32 PM, Jan Beulich wrote:
>> On 13.11.2025 17:18, Oleksii Kurochko wrote:
>>> Also, I’d like to note that it probably doesn’t make much sense to record all
>>> supported modes. If we traverse the|modes[]| array in the opposite order—checking
>>> |Sv57| first—then, according to the RISC-V specification:
>>> - Implementations that support Sv57 must also support Sv48.
>>> - Implementations that support Sv48 must also support Sv39.
>>> So if Sv57 is supported then lower modes are supported too. (except Sv32 for RV32)
>>>
>>> Based on this, it seems reasonable to start checking from Sv57, right?
>> No. Bigger guests want running in 48x4, huge ones in 57x4 (each: if available),
>> and most ones in 39x4. It doesn't matter what direction you do the checks, you
>> want to know what you have available.
> 
> My point was that if we change the direction, then once we find the first (largest)
> supported MMU mode, there is no need to check the others (lower modes) as according
> to the RISC-V specification, the lower modes must be supported automatically.

Oh, I see, makes sense.

Jan


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From: "Penny, Zheng" 
To: Jan Beulich 
CC: Andrew Cooper ,
	=?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= , "Andryuk, Jason"
	, Tamas K Lengyel , Alexandru
 Isaila , Petre Pircalabu
	, Grygorii Strashko ,
	"xen-devel@lists.xenproject.org" 
Subject: RE: [PATCH v1 2/7] xen/vm_event: introduce vm_event_is_enabled()
Thread-Topic: [PATCH v1 2/7] xen/vm_event: introduce vm_event_is_enabled()
Thread-Index: AQHcVEv8xX7X3Fxy9k66rxMQCyTwArTwUwWAgAfo9XA=
Date: Tue, 18 Nov 2025 10:11:24 +0000
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 <8c74b068-ba9a-4867-8d39-31c77f3cc339@suse.com>
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Date: Tue, 18 Nov 2025 11:19:45 +0100
Message-ID: 
From: Alejandro Vallejo 
To: Jan Beulich , Andrew Cooper 
CC: =?utf-8?q?Roger_Pau_Monn=C3=A9?= , "Daniel P. Smith"
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Subject: Re: [PATCH 0/4] Add Kconfig option to remove microcode loading
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On Mon Nov 17, 2025 at 5:55 PM CET, Jan Beulich wrote:
> On 13.11.2025 09:50, Andrew Cooper wrote:
>> On 12/11/2025 4:22 pm, Alejandro Vallejo wrote:
>>>  xen/arch/x86/Kconfig                    | 12 ++++
>>>  xen/arch/x86/cpu/microcode/Makefile     |  9 ++-
>>>  xen/arch/x86/cpu/microcode/amd-base.c   | 55 +++++++++++++++++++
>>>  xen/arch/x86/cpu/microcode/amd.c        | 55 ++-----------------
>>>  xen/arch/x86/cpu/microcode/amd.h        | 15 +++++
>>>  xen/arch/x86/cpu/microcode/base.c       | 73 +++++++++++++++++++++++++
>>>  xen/arch/x86/cpu/microcode/core.c       | 58 +-------------------
>>>  xen/arch/x86/cpu/microcode/intel-base.c | 50 +++++++++++++++++
>>>  xen/arch/x86/cpu/microcode/intel.c      | 56 +++----------------
>>>  xen/arch/x86/cpu/microcode/intel.h      | 16 ++++++
>>>  xen/arch/x86/cpu/microcode/private.h    | 14 +++++
>>>  xen/arch/x86/efi/efi-boot.h             |  2 +-
>>>  xen/arch/x86/platform_hypercall.c       |  2 +
>>>  13 files changed, 259 insertions(+), 158 deletions(-)
>>>  create mode 100644 xen/arch/x86/cpu/microcode/amd-base.c
>>>  create mode 100644 xen/arch/x86/cpu/microcode/amd.h
>>>  create mode 100644 xen/arch/x86/cpu/microcode/base.c
>>>  create mode 100644 xen/arch/x86/cpu/microcode/intel-base.c
>>>  create mode 100644 xen/arch/x86/cpu/microcode/intel.h
>>=20
>> This is awfully invasive for something that ultimately drops only a
>> handful of lines of code.
>>=20
>> First, it should be CONFIG_MICROCODE_LOADING.=C2=A0 We're not getting ri=
d of
>> all microcode capabilities.=C2=A0 Also, of all the places where UCODE ne=
eds
>> expanding properly, it's Kconfig.
>>=20
>> Next, annotate the functions that you conditionally don't reference in
>> {amd,intel}_ucode_ops with __maybe_unused, and dead code elimination
>> should do the rest.

I've done a few tests to see how something along those lines would pan out =
for
our needs. Our coverage tool correctly ignores ellided functions, so I'll b=
e
sending a v2 shortly.

>
> Are you, btw, sure this would be Misra-compliant? Right now we solely
> deviate __maybe_unused when used on labels which may really be unused,
> afaics.
>
> Jan

Rather than appending an unconditional __maybe_unused (that's, imo, a bad i=
dea),
I'll be creating a local __ucode_loading attribute in private.h that maps t=
o
__maybe_unused when CONFIG_MICROCODE_LOADING is not set and to nothing when=
 it
is set.

However, I'm tentatively keeping the movement from core.c to base.c, as the=
re's
just way too many functions with external linkage to ifdef. It'd be an utte=
rly
confusing file otherwise.

Plus, I'll be conditionally getting rid of earlycpio.c too, which is someth=
ing I
neglected to do in v1 even if it's only used for microcode loading.

Cheers,
Alejandro


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From: Frediano Ziglio 
Date: Tue, 18 Nov 2025 10:44:06 +0000
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Message-ID: 
Subject: RE: [PATCH livepatch-build-tools v2] Treat constant sections as
 string sections
To: xen-devel 
Cc: Frediano Ziglio , Ross Lagerwall , 
	Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
	Konrad Rzeszutek Wilk 
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> > Newer compiler can put some constant strings inside constant
> > sections (.rodata.cstXX) instead of string sections (.rodata.str1.XX).
> > This causes the produced live patch to not apply when such
> > strings are produced.
> > So treat the constant sections as string ones.
> >
> > Signed-off-by: Frediano Ziglio 
>
> Reviewed-by: Ross Lagerwall 
>
> Thanks,
> Ross

Hi,
  any update on this change? Could it be merged?

Regards,
   Frediano


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Date: Tue, 18 Nov 2025 11:54:25 +0100
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From: Alejandro Vallejo 
To: Jan Beulich , Teddy Astie 
CC: Andrew Cooper , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , =?utf-8?q?Roger_Pau_Monn=C3=A9?=
	, Stefano Stabellini , "Julian
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	Xen-devel 
Subject: Re: [PATCH v3] ioreq: Make sure ioreq is always in-bounds
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On Mon Nov 17, 2025 at 3:09 PM CET, Jan Beulich wrote:
> On 17.11.2025 14:43, Teddy Astie wrote:
>> Le 17/11/2025 =C3=A0 13:46, Jan Beulich a =C3=A9crit=C2=A0:
>>> On 17.11.2025 13:35, Teddy Astie wrote:
>>>> A 4K page appears to be able to hold 128 ioreq entries, which luckly
>>>> matches the current vCPU limit. However, if we decide to increase the
>>>> domain vCPU limit, that doesn't hold anymore and this function would n=
ow
>>>> silently create a out of bounds pointer leading to confusing problems.
>>>>
>>>> All architectures with ioreq support don't support 128 vCPU limit for
>>>> HVM guests, and  have pages that are at least 4 KB large, so this case
>>>> doesn't occurs in with the current limits.
>>>>
>>>> For the time being, make sure we can't make a Xen build that can
>>>> accidentally make a out of bounds pointers here.
>>>>
>>>> No functional change.
>>>>
>>>> Reported-by: Julian Vetter 
>>>> Signed-off-by: Teddy Astie 
>>>
>>> I was meaning to ack this, but ...
>>>
>>>> --- a/xen/common/ioreq.c
>>>> +++ b/xen/common/ioreq.c
>>>> @@ -99,6 +99,7 @@ static ioreq_t *get_ioreq(struct ioreq_server *s, st=
ruct vcpu *v)
>>>>  =20
>>>>       ASSERT((v =3D=3D current) || !vcpu_runnable(v));
>>>>       ASSERT(p !=3D NULL);
>>>> +    BUILD_BUG_ON(HVM_MAX_VCPUS > (PAGE_SIZE / sizeof(struct ioreq)));
>>>
>>> ... does this even build on e.g. Arm? IOREQ_SERVER is a setting which c=
an be
>>> enabled (with EXPERT=3Dy) also for non-x86. Yet HVM_MAX_VCPUS looks to =
be an
>>> x86-only thing. (I then also wonder about some of what the description =
says).
>>>
>>> Just to mention (no further change requested at this point, in this reg=
ard):
>>> HVM_MAX_VCPUS being part of the public interface, we'll need to see whe=
ther we
>>> can sensibly retain that identifier to carry changed meaning once we up=
 the
>>> limit. The check here may therefore not trigger at that point; the hope=
 then
>>> is that while making respective changes, people would at least stumble =
across
>>> it by e.g. seeing it in grep output.
>>>
>>=20
>> Apparently it doesn't build (debian-bookworm-gcc-arm32-randconfig=20
>> catched it).
>> ARM does provide MAX_VIRT_CPUS and GUEST_MAX_VCPUS which is 128 or=20
>> lower, but that doesn't map (or not properly) with what we have in x86=
=20
>> (MAX_VIRT_CPUS=3D8192 is PV-specific, and GUEST_MAX_VCPUS doesn't exist)=
.
>>=20
>> I am not sure what to do, looks like many things are redundant here.
>
> Maybe non-x86 could surface HVM_MAX_VCPUS as an alias of whatever they al=
ready
> got, much like CONFIG_HVM exists also for Arm, and will likely need intro=
ducing
> for PPC and RISC-V (despite not being overly meaningful for non-x86)?
>
> Jan

I'd say this is the better choice, pending some non-x86 people acking the p=
lan.

Cheers,
Alejandro


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From: "Penny, Zheng" 
To: Jan Beulich 
CC: Andrew Cooper ,
	=?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= , Tamas K Lengyel
	, Alexandru Isaila , Petre
 Pircalabu , "xen-devel@lists.xenproject.org"
	
Subject: RE: [PATCH v1 5/7] xen/x86: move declaration from mem_access.h to
 altp2m.h
Thread-Topic: [PATCH v1 5/7] xen/x86: move declaration from mem_access.h to
 altp2m.h
Thread-Index: AQHcVEwAn1Hu22XaJ02mYEVUbE68oLTwWQCAgAf1+hA=
Date: Tue, 18 Nov 2025 11:09:59 +0000
Message-ID:
 
References: <20251113031630.1465599-1-Penny.Zheng@amd.com>
 <20251113031630.1465599-6-Penny.Zheng@amd.com>
 <136416d6-ea2b-444d-b331-8aef1881ed91@suse.com>
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Date: Tue, 18 Nov 2025 11:22:19 +0000
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH 0/4] Add Kconfig option to remove microcode loading
 support
To: Alejandro Vallejo ,
 Jan Beulich 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 "Daniel P. Smith" ,
 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 , xen-devel@lists.xenproject.org
References: <20251112162219.226075-1-alejandro.garciavallejo@amd.com>
 <61df49ba-4aab-42e3-b945-700a8f20c739@citrix.com>
 <035a9514-9a7f-44ab-86a7-61deab37f7c7@suse.com>
 
Content-Language: en-GB
From: Andrew Cooper 
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On 18/11/2025 10:19 am, Alejandro Vallejo wrote:
> On Mon Nov 17, 2025 at 5:55 PM CET, Jan Beulich wrote:
>> On 13.11.2025 09:50, Andrew Cooper wrote:
>>> On 12/11/2025 4:22 pm, Alejandro Vallejo wrote:
>>>>  xen/arch/x86/Kconfig                    | 12 ++++
>>>>  xen/arch/x86/cpu/microcode/Makefile     |  9 ++-
>>>>  xen/arch/x86/cpu/microcode/amd-base.c   | 55 +++++++++++++++++++
>>>>  xen/arch/x86/cpu/microcode/amd.c        | 55 ++-----------------
>>>>  xen/arch/x86/cpu/microcode/amd.h        | 15 +++++
>>>>  xen/arch/x86/cpu/microcode/base.c       | 73 +++++++++++++++++++++++++
>>>>  xen/arch/x86/cpu/microcode/core.c       | 58 +-------------------
>>>>  xen/arch/x86/cpu/microcode/intel-base.c | 50 +++++++++++++++++
>>>>  xen/arch/x86/cpu/microcode/intel.c      | 56 +++----------------
>>>>  xen/arch/x86/cpu/microcode/intel.h      | 16 ++++++
>>>>  xen/arch/x86/cpu/microcode/private.h    | 14 +++++
>>>>  xen/arch/x86/efi/efi-boot.h             |  2 +-
>>>>  xen/arch/x86/platform_hypercall.c       |  2 +
>>>>  13 files changed, 259 insertions(+), 158 deletions(-)
>>>>  create mode 100644 xen/arch/x86/cpu/microcode/amd-base.c
>>>>  create mode 100644 xen/arch/x86/cpu/microcode/amd.h
>>>>  create mode 100644 xen/arch/x86/cpu/microcode/base.c
>>>>  create mode 100644 xen/arch/x86/cpu/microcode/intel-base.c
>>>>  create mode 100644 xen/arch/x86/cpu/microcode/intel.h
>>> This is awfully invasive for something that ultimately drops only a
>>> handful of lines of code.
>>>
>>> First, it should be CONFIG_MICROCODE_LOADING.  We're not getting rid of
>>> all microcode capabilities.  Also, of all the places where UCODE needs
>>> expanding properly, it's Kconfig.
>>>
>>> Next, annotate the functions that you conditionally don't reference in
>>> {amd,intel}_ucode_ops with __maybe_unused, and dead code elimination
>>> should do the rest.
> I've done a few tests to see how something along those lines would pan out for
> our needs. Our coverage tool correctly ignores ellided functions, so I'll be
> sending a v2 shortly.
>
>> Are you, btw, sure this would be Misra-compliant? Right now we solely
>> deviate __maybe_unused when used on labels which may really be unused,
>> afaics.
>>
>> Jan
> Rather than appending an unconditional __maybe_unused (that's, imo, a bad idea),
> I'll be creating a local __ucode_loading attribute in private.h that maps to
> __maybe_unused when CONFIG_MICROCODE_LOADING is not set and to nothing when it
> is set.

__maybe_unused literally exists for this purpose.  See it's comment.

Wrapping in another condition just adds complexity for no gain.  This
case is unlike livepatch_or_$FOO because it's not choice between two
different things.

>
> However, I'm tentatively keeping the movement from core.c to base.c, as there's
> just way too many functions with external linkage to ifdef. It'd be an utterly
> confusing file otherwise.

There are 4 functions with external linkage, only one of which you can
fully elide.

(I think) you can do everything you need here with 4 IS_ENABLED()'s (two
in do_platform_op(), one in early_microcode_init() and
microcode_update_one()), one ifdef around ucode_update_hcall(), and one
__maybe_unused for ucode_update_hcall().

I'm going to save you some time, and insist that core.c is not split;
I'm not willing to take that kind of disruption into logic this
complicated.  The result is far nicer not split than split.

>
> Plus, I'll be conditionally getting rid of earlycpio.c too, which is something I
> neglected to do in v1 even if it's only used for microcode loading.

This is fine, but cpio should be lib-ified like sha2 so it's simply
dropped if not referenced.

In fact, the one ifdef mentioned above could be dropped if someone were
to get --gc-sections working, but I suppose that is a task for a
different day.

~Andrew


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Date: Tue, 18 Nov 2025 12:01:21 +0000
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH 1/3] x86/ucode: Fix error handling during parallel ucode
 load
To: Jan Beulich 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Xen-devel 
References: <20251117222120.473451-1-andrew.cooper3@citrix.com>
 <20251117222120.473451-2-andrew.cooper3@citrix.com>
 <52b13a38-f037-4235-8ea2-70b0d8a4b470@suse.com>
Content-Language: en-GB
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On 18/11/2025 7:49 am, Jan Beulich wrote:
> On 17.11.2025 23:21, Andrew Cooper wrote:
>> wait_for_state() returns false on encountering LOADING_EXIT.
>> control_thread_fn() can move directly to this state in the case of an early
>> error.  It is not an error condition for APs, but right now the latest write
>> into stopmachine_data.fn_result wins, causing the real error, -EIO, to get
>> clobbered with -EBUSY.  e.g.:
>>
>>   # xen-ucode /lib/firmware/amd-ucode/microcode_amd_fam17h.bin --force
>>   Failed to update microcode. (err: Device or resource busy)
>>
>>   (XEN) 256 cores are to update their microcode
>>   (XEN) microcode: CPU0 update rev 0x830107d to 0x830107c failed, result 0x830107d
>>   (XEN) Late loading aborted: CPU0 failed to update ucode: -5
>>
>> Drop all the -EBUSY's, and treat hitting LOADING_EXIT as a success case.  This
>> causes only a single error to be returned through stop_machine_run().  e.g.:
> Why "single"? stop_machine_run() can't return multiple ones, having only a
> scalar return type? Or do you mean "a single, consistent" or some such?

stop_machine_run() has a data race on stopmachine_data.fn_result.

Any CPU returning any nonzero value back into the stop_machine machinery
will update the singleton result, and latest wins.

This causes the BSP to return -EIO, and all APs to return 0 and not
interfere with the -EIO.

>
>>   # xen-ucode /lib/firmware/amd-ucode/microcode_amd_fam17h.bin --force
>>   Failed to update microcode. (err: Input/output error)
>>
>>   (XEN) 256 cores are to update their microcode
>>   (XEN) microcode: CPU0 update rev 0x830107d to 0x830107c failed, result 0x830107d
>>   (XEN) Late loading aborted: CPU0 failed to update ucode: -5
> The sole difference being which specific error is observed, which looks to
> support the above interpretation. What I don't quite understand is ...
>
>> Fixes: 5ed12565aa32 ("microcode: rendezvous CPUs in NMI handler and load ucode")
> ... this and the specific indication that this needs backporting: Why is
> the particular error code this important here?

Because userspace cares about -EEXIST as a special case for success.

Having -EEIXST clobbered with -EBUSY causes a false negative failure in
XenServer's testing.

As said in the cover letter, 4.19 and earlier now suffer this as a side
effect of e0bb712a28a9 ("x86/ucode: Abort parallel load early on any
control thread error") because out-of-date ucodes used to be passed into
stop_machine and cause every CPU to fail with -EEXIST.

>> --- a/xen/arch/x86/cpu/microcode/core.c
>> +++ b/xen/arch/x86/cpu/microcode/core.c
>> @@ -260,7 +260,9 @@ static int secondary_nmi_work(void)
>>  {
>>      cpumask_set_cpu(smp_processor_id(), &cpu_callin_map);
>>  
>> -    return wait_for_state(LOADING_EXIT) ? 0 : -EBUSY;
>> +    wait_for_state(LOADING_EXIT);
>> +
>> +    return 0;
>>  }
> At which point the function could as well return void? Preferably with this
> adjustment (and the knock-on one at the call site) and with the slight
> clarification to the description
> Reviewed-by: Jan Beulich 

I have a different series, but ucode_in_nmi needs untangling first.

Even changing this function to be void causes this patch to be dominated
by cleanup, which isn't appropriate for a bugfix.

~Andrew


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Subject: Re: [XEN][PATCH] x86/paging: replace !paging_mode_hap() with
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Hi Jan,

On 17.11.25 11:47, Jan Beulich wrote:
> On 15.11.2025 00:21, Jason Andryuk wrote:
>> On 2025-11-14 09:44, Grygorii Strashko wrote:
>>> From: Grygorii Strashko 
>>>
>>> Now Xen supports only two paging modes: HAP and SHADOW, so
>>> !paging_mode_hap() is actually means paging_mode_shadow().
> 
> For HVM, that is. For PV both could produce "false". Luckily the code
> changes are all in line with that, but somewhere this detail wants
> mentioning imo (as it's also not part of the patch subject). Happy to
> make a small adjustment while committing; then ...

Sure. Thank you very much.

> 
>>> For an abstract, future case of there being a 3rd paging mode it is also
>>> better to explicitly mention checked paging mode (SHADOW) instead of using
>>> negative check of another paging mode (HAP).
>>>
>>> Hence, s/!paging_mode_hap()/paging_mode_shadow() which also allows DCE drop
>>> unused code when SHADOW_PAGING=n.
>>> The !paging_mode_hap() in hap.c not changed as HAP is checking for itself
>>> to be enabled.
>>>
>>> Inspired by [1].
>>>
>>> [1] https://patchwork.kernel.org/project/xen-devel/patch/20251111200958.3576341-3-grygorii_strashko@epam.com/
>>> Signed-off-by: Grygorii Strashko 
>>
>> Reviewed-by: Jason Andryuk 
> 
> Acked-by: Jan Beulich 
> 
> Jan

-- 
Best regards,
-grygorii



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Date: Tue, 18 Nov 2025 14:42:02 +0200
User-Agent: Mozilla Thunderbird
Subject: Re: [XEN][PATCH v3] xen: make VMTRACE support optional
To: Jan Beulich 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 Stefano Stabellini ,
 Tamas K Lengyel ,
 Alexandru Isaila ,
 Petre Pircalabu ,
 Teddy Astie , Penny Zheng ,
 "xen-devel@lists.xenproject.org" 
References: <20251114142207.279834-1-grygorii_strashko@epam.com>
 <225378f4-0ebd-4c77-ae77-807bbb03b0bb@suse.com>
Content-Language: en-US
From: Grygorii Strashko 
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Hi Jan,

On 17.11.25 18:52, Jan Beulich wrote:
> On 14.11.2025 15:22, Grygorii Strashko wrote:
>> --- a/xen/arch/x86/hvm/Kconfig
>> +++ b/xen/arch/x86/hvm/Kconfig
>> @@ -35,6 +35,18 @@ config INTEL_VMX
>>   	  If your system includes a processor with Intel VT-x support, say Y.
>>   	  If in doubt, say Y.
>>   
>> +config VMTRACE
>> +    bool "HW VM tracing support"
>> +    depends on INTEL_VMX
>> +    default y
>> +    help
>> +      Enables HW VM tracing support which allows to configure HW processor
>> +      features (vmtrace_op) to enable capturing information about software
>> +      execution using dedicated hardware facilities with minimal interference
>> +      to the software being traced. The trace data can be retrieved using buffer
>> +      shared between Xen and domain
>> +      (see XENMEM_acquire_resource(XENMEM_resource_vmtrace_buf)).
> 
> Please check adjacent options above or ...
> 
>>   config HVM_FEP
>>   	bool "HVM Forced Emulation Prefix support (UNSUPPORTED)" if UNSUPPORTED
>>   	default DEBUG
> 
> ... below for how proper indentation would look like here.

There is a mix in Kconfigs - some places  some places  :(
Will change to 

> 
>> --- a/xen/arch/x86/hvm/vmx/vmcs.c
>> +++ b/xen/arch/x86/hvm/vmx/vmcs.c
>> @@ -307,6 +307,7 @@ static int vmx_init_vmcs_config(bool bsp)
>>       rdmsrl(MSR_IA32_VMX_MISC, _vmx_misc_cap);
>>   
>>       /* Check whether IPT is supported in VMX operation. */
>> +#ifdef CONFIG_VMTRACE
> 
> This imo wants to move ahead of the comment. (Feels a little like I may have
> said so already, but it may well have been in the context of a different
> recent patch.)
> 
>> @@ -772,13 +775,24 @@ static inline int hvm_vmtrace_get_option(
>>   
>>       return -EOPNOTSUPP;
>>   }
>> +#else
>> +/*
>> + * Function declaration(s) here are used without definition(s) to make compiler
>> + * happy when VMTRACE=n, compiler DCE will eliminate unused code.
>> + */
>> +int hvm_vmtrace_output_position(struct vcpu *v, uint64_t *pos);
>> +#endif
>>   
>>   static inline int hvm_vmtrace_reset(struct vcpu *v)
>>   {
>> +#ifdef CONFIG_VMTRACE
>>       if ( hvm_funcs.vmtrace_reset )
>>           return alternative_call(hvm_funcs.vmtrace_reset, v);
>>   
>>       return -EOPNOTSUPP;
>> +#else
>> +    return -EOPNOTSUPP;
>> +#endif
> 
> No #else please and the #endif moved up.
> 
>> --- a/xen/arch/x86/vm_event.c
>> +++ b/xen/arch/x86/vm_event.c
>> @@ -253,7 +253,8 @@ void vm_event_fill_regs(vm_event_request_t *req)
>>       req->data.regs.x86.shadow_gs = ctxt.shadow_gs;
>>       req->data.regs.x86.dr6 = ctxt.dr6;
>>   
>> -    if ( hvm_vmtrace_output_position(curr, &req->data.regs.x86.vmtrace_pos) != 1 )
>> +    if ( IS_ENABLED(CONFIG_VMTRACE) &&
>> +         hvm_vmtrace_output_position(curr, &req->data.regs.x86.vmtrace_pos) != 1 )
> 
> Would be nice if the too-long-line issue here was also address, when the line
> needs touching anyway.

I left it as is for better readability as an exception.
Will below be ok:

      if ( IS_ENABLED(CONFIG_VMTRACE) &&
-         hvm_vmtrace_output_position(curr, &req->data.regs.x86.vmtrace_pos) != 1 )
+         hvm_vmtrace_output_position(curr,
+                                     &req->data.regs.x86.vmtrace_pos) != 1 )
          req->data.regs.x86.vmtrace_pos = ~0;

-- 
Best regards,
-grygorii



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Date: Tue, 18 Nov 2025 15:08:16 +0200
User-Agent: Mozilla Thunderbird
Subject: Re: [XEN][PATCH v4] xen/x86: guest_access: optimize raw_x_guest() for
 PV and HVM combinations
To: Jan Beulich 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Jason Andryuk , Teddy Astie ,
 Alejandro Vallejo ,
 "xen-devel@lists.xenproject.org" 
References: <20251114140117.270461-1-grygorii_strashko@epam.com>
 <11c3929a-977b-4ef8-aaaa-9aea01657b04@suse.com>
Content-Language: en-US
From: Grygorii Strashko 
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On 17.11.25 18:43, Jan Beulich wrote:
> On 14.11.2025 15:01, Grygorii Strashko wrote:
>> From: Grygorii Strashko 
>>
>> Xen uses below pattern for raw_x_guest() functions:
>>
>> define raw_copy_to_guest(dst, src, len)        \
>>      (is_hvm_vcpu(current) ?                     \
>>       copy_to_user_hvm((dst), (src), (len)) :    \
>>       copy_to_guest_pv(dst, src, len))
>>
>> This pattern works depending on CONFIG_PV/CONFIG_HVM as:
>> - PV=y and HVM=y
>>    Proper guest access function is selected depending on domain type.
>> - PV=y and HVM=n
>>    Only PV domains are possible. is_hvm_domain/vcpu() will constify to "false"
>>    and compiler will optimize code and skip HVM specific part.
>> - PV=n and HVM=y
>>    Only HVM domains are possible. is_hvm_domain/vcpu() will not be constified.
>>    No PV specific code will be optimized by compiler.
>> - PV=n and HVM=n
>>    No guests should possible. The code will still follow PV path.
>>
>> Rework raw_x_guest() code to use static inline functions which account for
>> above PV/HVM possible configurations with main intention to optimize code
>> for (PV=n and HVM=y) case.
>>
>> For the case (PV=n and HVM=n) return "len" value indicating a failure (no
>> guests should be possible in this case, which means no access to guest
>> memory should ever happen).
>>
>> Finally move arch/x86/usercopy.c into arch/x86/pv/usercopy.c to use it only
>> with PV=y.
>>
>> The measured (bloat-o-meter) improvement for (PV=n and HVM=y) case is:
>>    add/remove: 3/8 grow/shrink: 3/89 up/down: 1018/-12087 (-11069)
>>    Total: Before=1937280, After=1926211, chg -0.57%
>>
>> [teddy.astie@vates.tech: Suggested to use static inline functions vs
>> macro combinations]
>> Suggested-by: Teddy Astie 
>> Signed-off-by: Grygorii Strashko 
>> Reviewed-by: Jason Andryuk 
> 
> I would guess that this R-b would have needed dropping, ...
> 
>> ---
>> changes in v4:
>> - move usercopy.c into arch/x86/pv/
>> - rework to always dynamically check for HVM vcpu(domain) by using is_hvm_vcpu()
>>    as requested by Jan Beulich
> 
> ... with at least the latter of these two changes.
> 
>> --- a/xen/arch/x86/pv/Makefile
>> +++ b/xen/arch/x86/pv/Makefile
>> @@ -14,6 +14,10 @@ obj-y += ro-page-fault.o
>>   obj-$(CONFIG_PV_SHIM) += shim.o
>>   obj-$(CONFIG_TRACEBUFFER) += trace.o
>>   obj-y += traps.o
>> +obj-$(CONFIG_PV) += usercopy.o
> 
> Just obj-y with the movement.
> 
> However, is the movement (and was the adding of $(CONFIG_PV) in the earlier
> version) actually correct? The file also produces copy_{from,to}_unsafe_ll(),
> which aren't PV-specific. This may be only a latent issue right now, as we
> have only a single use site of copy_from_unsafe(), but those functions need
> to remain available. (We may want to arrange for them to be removed when
> linking, as long as they're not referenced. But that's a separate topic.)

It is confusing that none of build cfg combinations have failed
(HVM=y PV=n, HVM=n PV=n) :(

copy_to_unsafe_ll()
- called from copy_to_unsafe()
- copy_to_unsafe() has no users (unreachable, MISRA 2.1?)

copy_from_unsafe_ll()
- called from copy_from_unsafe()
- copy_from_unsafe() called from one place do_invalid_op() with
   copy_from_unsafe(,, n = sizeof(bug_insn)).
   Due to __builtin_constant_p(n) check the copy_from_unsafe() call
   optimized by compiler to
   get_unsafe_size(*(uint16_t *)to, from, 2, UA_DROP, ret, 2);

as result copy_from_unsafe_ll() is unreachable also (?).

If those function are not subject to be removed, the
  usercopy.c can't be moved in "x86/pv", Right?

Making copy_{from,to}_unsafe_ll() available for !PV means
rewriting usercopy.c in some way, Right?

-- 
Best regards,
-grygorii



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From: Mykyta Poturai 
To: "xen-devel@lists.xenproject.org" 
CC: Stewart Hildebrand , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , Volodymyr
 Babchuk , Mykyta Poturai
	
Subject: [PATCH v3 2/8] xen/dt: pass flags to callback in dt_for_each_range()
Thread-Topic: [PATCH v3 2/8] xen/dt: pass flags to callback in
 dt_for_each_range()
Thread-Index: AQHcWJBaNx96+qKbF0KY5H+PAaMMXw==
Date: Tue, 18 Nov 2025 13:36:33 +0000
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From: Stewart Hildebrand 

PCI ranges have prefetchable / non-prefetchable flags that will be
needed in the callback. Pass the flags to the callback.

Signed-off-by: Stewart Hildebrand 
Signed-off-by: Mykyta Poturai 
---
v2->v3:
* style fixes

v1->v2:
* no changes
---
 xen/arch/arm/device.c                | 4 ++--
 xen/arch/arm/domain_build.c          | 3 ++-
 xen/arch/arm/include/asm/setup.h     | 2 +-
 xen/arch/arm/pci/pci-host-common.c   | 4 ++--
 xen/common/device-tree/device-tree.c | 5 +++--
 xen/include/xen/device_tree.h        | 2 +-
 6 files changed, 11 insertions(+), 9 deletions(-)

diff --git a/xen/arch/arm/device.c b/xen/arch/arm/device.c
index 74b54cad34..732c84e726 100644
--- a/xen/arch/arm/device.c
+++ b/xen/arch/arm/device.c
@@ -49,7 +49,7 @@ int map_irq_to_domain(struct domain *d, unsigned int irq,
     return 0;
 }
=20
-int map_range_to_domain(const struct dt_device_node *dev,
+int map_range_to_domain(const struct dt_device_node *dev, uint32_t flags,
                         uint64_t addr, uint64_t len, void *data)
 {
     struct map_range_data *mr_data =3D data;
@@ -325,7 +325,7 @@ int handle_device(struct domain *d, struct dt_device_no=
de *dev, p2m_type_t p2mt,
             return res;
         }
=20
-        res =3D map_range_to_domain(dev, addr, size, &mr_data);
+        res =3D map_range_to_domain(dev, 0, addr, size, &mr_data);
         if ( res )
             return res;
     }
diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index fb8fbb1650..4bbffdf535 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
@@ -762,7 +762,8 @@ int __init add_ext_regions(unsigned long s_gfn, unsigne=
d long e_gfn,
 }
=20
 static int __init handle_pci_range(const struct dt_device_node *dev,
-                                   uint64_t addr, uint64_t len, void *data=
)
+                                   uint32_t flags, uint64_t addr, uint64_t=
 len,
+                                   void *data)
 {
     struct rangeset *mem_holes =3D data;
     paddr_t start, end;
diff --git a/xen/arch/arm/include/asm/setup.h b/xen/arch/arm/include/asm/se=
tup.h
index 1eaf13bd66..97bc5f90a1 100644
--- a/xen/arch/arm/include/asm/setup.h
+++ b/xen/arch/arm/include/asm/setup.h
@@ -62,7 +62,7 @@ int map_device_irqs_to_domain(struct domain *d, struct dt=
_device_node *dev,
 int map_irq_to_domain(struct domain *d, unsigned int irq,
                       bool need_mapping, const char *devname);
=20
-int map_range_to_domain(const struct dt_device_node *dev,
+int map_range_to_domain(const struct dt_device_node *dev, uint32_t flags,
                         uint64_t addr, uint64_t len, void *data);
=20
 struct init_info
diff --git a/xen/arch/arm/pci/pci-host-common.c b/xen/arch/arm/pci/pci-host=
-common.c
index d3481b05eb..46e7e3b707 100644
--- a/xen/arch/arm/pci/pci-host-common.c
+++ b/xen/arch/arm/pci/pci-host-common.c
@@ -418,7 +418,7 @@ int __init pci_host_bridge_mappings(struct domain *d)
                     bridge->child_ops->need_p2m_hwdom_mapping(d, bridge, a=
ddr);
             if ( need_mapping )
             {
-                err =3D map_range_to_domain(dev, addr, size, &mr_data);
+                err =3D map_range_to_domain(dev, 0, addr, size, &mr_data);
                 if ( err )
                     return err;
             }
@@ -433,7 +433,7 @@ int __init pci_host_bridge_mappings(struct domain *d)
  * to be page aligned. We should check for alignment but this is not the
  * right place for alignment check.
  */
-static int is_bar_valid(const struct dt_device_node *dev,
+static int is_bar_valid(const struct dt_device_node *dev, uint32_t flags,
                         uint64_t addr, uint64_t len, void *data)
 {
     struct pdev_bar_check *bar_data =3D data;
diff --git a/xen/common/device-tree/device-tree.c b/xen/common/device-tree/=
device-tree.c
index 0b5375f151..5ee1fa4eb1 100644
--- a/xen/common/device-tree/device-tree.c
+++ b/xen/common/device-tree/device-tree.c
@@ -976,7 +976,7 @@ int dt_device_get_paddr(const struct dt_device_node *de=
v, unsigned int index,
=20
 int dt_for_each_range(const struct dt_device_node *dev,
                       int (*cb)(const struct dt_device_node *dev,
-                                uint64_t addr, uint64_t length,
+                                uint32_t flags, uint64_t addr, uint64_t le=
ngth,
                                 void *data),
                       void *data)
 {
@@ -1041,13 +1041,14 @@ int dt_for_each_range(const struct dt_device_node *=
dev,
     {
         uint64_t a, s;
         int ret;
+        uint32_t flags =3D bus->get_flags(ranges);
=20
         memcpy(addr, ranges + na, 4 * pna);
=20
         a =3D __dt_translate_address(dev, addr, "ranges");
         s =3D dt_read_number(ranges + na + pna, ns);
=20
-        ret =3D cb(dev, a, s, data);
+        ret =3D cb(dev, flags, a, s, data);
         if ( ret )
         {
             dt_dprintk(" -> callback failed=3D%d\n", ret);
diff --git a/xen/include/xen/device_tree.h b/xen/include/xen/device_tree.h
index 06d7643622..1091e34a10 100644
--- a/xen/include/xen/device_tree.h
+++ b/xen/include/xen/device_tree.h
@@ -667,7 +667,7 @@ int dt_for_each_irq_map(const struct dt_device_node *de=
v,
  */
 int dt_for_each_range(const struct dt_device_node *dev,
                       int (*cb)(const struct dt_device_node *dev,
-                                uint64_t addr, uint64_t length,
+                                uint32_t flags, uint64_t addr, uint64_t le=
ngth,
                                 void *data),
                       void *data);
=20
--=20
2.51.2


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From: Mykyta Poturai 
To: "xen-devel@lists.xenproject.org" 
CC: Mykyta Poturai , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , Volodymyr
 Babchuk 
Subject: [PATCH v3 5/8] arm/pci: Mark pci_host_common_probe as init
Thread-Topic: [PATCH v3 5/8] arm/pci: Mark pci_host_common_probe as init
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pci_host_common_probe is only ever called from init context so mark it
as such.

Signed-off-by: Mykyta Poturai 
---
v2->v3:
* patch introduced
---
 xen/arch/arm/pci/pci-host-common.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/arch/arm/pci/pci-host-common.c b/xen/arch/arm/pci/pci-host=
-common.c
index 46e7e3b707..de30fb0aec 100644
--- a/xen/arch/arm/pci/pci-host-common.c
+++ b/xen/arch/arm/pci/pci-host-common.c
@@ -232,7 +232,7 @@ static int pci_bus_find_domain_nr(struct dt_device_node=
 *dev)
     return domain;
 }
=20
-struct pci_host_bridge *
+struct pci_host_bridge * __init
 pci_host_common_probe(struct dt_device_node *dev,
                       const struct pci_ecam_ops *ops,
                       const struct pci_ecam_ops *child_ops)
--=20
2.51.2


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From: Mykyta Poturai 
To: "xen-devel@lists.xenproject.org" 
CC: Luca Fancellu , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , Volodymyr
 Babchuk , Jan Beulich ,
	=?iso-8859-1?Q?Roger_Pau_Monn=E9?= , Stewart Hildebrand
	, Mykyta Poturai 
Subject: [PATCH v3 7/8] xen/pci: assign discovered devices to hwdom
Thread-Topic: [PATCH v3 7/8] xen/pci: assign discovered devices to hwdom
Thread-Index: AQHcWJBc5bz51R8u20uOZBtSz+TqyQ==
Date: Tue, 18 Nov 2025 13:36:35 +0000
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From: Luca Fancellu 

Hook up existing PCI setup routines for hwdom into Arm iommu
initialization sequence, only assign endpoint devices.

During scanned PCI device assignment, also permit access to the BAR
ranges if hwdom is using vpci and hide host bridges from domains that
use the fully emulated one.

Signed-off-by: Luca Fancellu 
Signed-off-by: Stewart Hildebrand 
Signed-off-by: Mykyta Poturai 
---
v2->v3:
* style fixes
* rework iomem access configuration

v1->v2:
* add host bridge hiding
* fix build without CONFIG_HAS_PCI
---
 xen/arch/arm/pci/pci-host-common.c  | 11 +++++++++++
 xen/drivers/passthrough/arm/iommu.c | 15 +++++++++++++++
 xen/drivers/passthrough/pci.c       | 11 +++++++++++
 3 files changed, 37 insertions(+)

diff --git a/xen/arch/arm/pci/pci-host-common.c b/xen/arch/arm/pci/pci-host=
-common.c
index 28c26af9eb..110c334f59 100644
--- a/xen/arch/arm/pci/pci-host-common.c
+++ b/xen/arch/arm/pci/pci-host-common.c
@@ -430,6 +430,17 @@ int __init pci_host_bridge_mappings(struct domain *d)
         unsigned int i;
         bool need_mapping;
=20
+        /*
+         * Only allow iomem access to ranges if we use pci-scan
+         * Actual mappings will be handled by VPCI code.
+         */
+        if ( has_vpci_bridge(d) )
+        {
+            mr_data.skip_mapping =3D true;
+            dt_for_each_range(dev, map_range_to_domain, &mr_data);
+            continue;
+        }
+
         for ( i =3D 0; i < dt_number_of_address(dev); i++ )
         {
             paddr_t addr, size;
diff --git a/xen/drivers/passthrough/arm/iommu.c b/xen/drivers/passthrough/=
arm/iommu.c
index 100545e23f..124a99f198 100644
--- a/xen/drivers/passthrough/arm/iommu.c
+++ b/xen/drivers/passthrough/arm/iommu.c
@@ -19,6 +19,7 @@
 #include 
 #include 
 #include 
+#include 
=20
 #include 
=20
@@ -133,6 +134,16 @@ void arch_iommu_domain_destroy(struct domain *d)
 {
 }
=20
+#ifdef CONFIG_HAS_PCI
+static int __hwdom_init iommu_add_hwdom_pci_device(u8 devfn,
+                                                   struct pci_dev *pdev)
+{
+    const struct domain_iommu *hd =3D dom_iommu(hardware_domain);
+
+    return iommu_call(hd->platform_ops, add_device, devfn, pci_to_dev(pdev=
));
+}
+#endif
+
 void __hwdom_init arch_iommu_hwdom_init(struct domain *d)
 {
     /* Set to false options not supported on ARM. */
@@ -142,6 +153,10 @@ void __hwdom_init arch_iommu_hwdom_init(struct domain =
*d)
     if ( iommu_hwdom_reserved =3D=3D 1 )
         printk(XENLOG_WARNING "map-reserved dom0-iommu option is not suppo=
rted on ARM\n");
     iommu_hwdom_reserved =3D 0;
+
+#ifdef CONFIG_HAS_PCI
+    setup_hwdom_pci_devices(d, iommu_add_hwdom_pci_device);
+#endif
 }
=20
 /*
diff --git a/xen/drivers/passthrough/pci.c b/xen/drivers/passthrough/pci.c
index 52c22fa50c..70c21403d5 100644
--- a/xen/drivers/passthrough/pci.c
+++ b/xen/drivers/passthrough/pci.c
@@ -20,6 +20,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -1041,6 +1042,12 @@ enum pdev_type pdev_type(u16 seg, u8 bus, u8 devfn)
     return pos ? DEV_TYPE_PCIe_ENDPOINT : DEV_TYPE_PCI;
 }
=20
+static bool __hwdom_init pdev_is_endpoint(const struct pci_dev *pdev)
+{
+    enum pdev_type type =3D pdev_type(pdev->seg, pdev->bus, pdev->devfn);
+    return type =3D=3D DEV_TYPE_PCIe_ENDPOINT || type =3D=3D DEV_TYPE_PCI;
+}
+
 /*
  * find the upstream PCIe-to-PCI/PCIX bridge or PCI legacy bridge
  * return 0: the device is integrated PCI device or PCIe
@@ -1221,6 +1228,10 @@ static int __hwdom_init cf_check _setup_hwdom_pci_de=
vices(
             if ( !pdev )
                 continue;
=20
+            /* Hide real bridges from HWdom when it's using the emulated o=
ne */
+            if ( has_vpci_bridge(hardware_domain) && !pdev_is_endpoint(pde=
v) )
+                pci_hide_device(pdev->seg, pdev->bus, pdev->devfn);
+
             if ( !pdev->domain )
             {
                 pdev->domain =3D ctxt->d;
--=20
2.51.2


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From: Mykyta Poturai 
To: "xen-devel@lists.xenproject.org" 
CC: Stefano Stabellini , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , Volodymyr
 Babchuk , =?iso-8859-1?Q?Roger_Pau_Monn=E9?=
	, Stewart Hildebrand ,
	Mykyta Poturai 
Subject: [PATCH v3 3/8] xen/vpci: introduce has_vpci_bridge
Thread-Topic: [PATCH v3 3/8] xen/vpci: introduce has_vpci_bridge
Thread-Index: AQHcWJBaPhgfVTH0K0SSYJwd1HNNWw==
Date: Tue, 18 Nov 2025 13:36:33 +0000
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 <207b6aef763d12426385efb925beeebbbb56f6b3.1763462211.git.mykyta_poturai@epam.com>
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From: Stefano Stabellini 

With Dom0 now being able to use a virtual bridge we need a way to
distinguish Dom0 using HW bridghe from Dom0 using virtual bridge.
Introduce a new macro has_vpci_bridge that would determine if a domain
should be treated as using HW bridge (only Dom0 with pci-scan disabled)
or as using a virtual one (all DomUs and Dom0 with pci-scan enabled)

Use the macro in drivers/vpci.

Signed-off-by: Stefano Stabellini 
Signed-off-by: Stewart Hildebrand 
Signed-off-by: Mykyta Poturai 
---
v2->v3:
* s/is_hwdom/is_hw_bridge/

v1->v2:
* simplify definition
---
 xen/arch/arm/include/asm/pci.h |  1 +
 xen/arch/arm/pci/pci.c         |  2 +-
 xen/drivers/vpci/header.c      | 74 +++++++++++++++++-----------------
 xen/drivers/vpci/vpci.c        |  4 +-
 xen/include/xen/vpci.h         |  8 ++++
 5 files changed, 50 insertions(+), 39 deletions(-)

diff --git a/xen/arch/arm/include/asm/pci.h b/xen/arch/arm/include/asm/pci.=
h
index 0680b2f50c..7289f7688b 100644
--- a/xen/arch/arm/include/asm/pci.h
+++ b/xen/arch/arm/include/asm/pci.h
@@ -23,6 +23,7 @@
 #define pci_to_dev(pcidev) (&(pcidev)->arch.dev)
=20
 extern bool pci_passthrough_enabled;
+extern bool pci_scan_enabled;
=20
 struct rangeset;
=20
diff --git a/xen/arch/arm/pci/pci.c b/xen/arch/arm/pci/pci.c
index 49ee003c5e..951639eb3f 100644
--- a/xen/arch/arm/pci/pci.c
+++ b/xen/arch/arm/pci/pci.c
@@ -92,7 +92,7 @@ bool __read_mostly pci_passthrough_enabled;
 boolean_param("pci-passthrough", pci_passthrough_enabled);
=20
 /* By default pci scan is disabled. */
-static __ro_after_init bool pci_scan_enabled;
+__ro_after_init bool pci_scan_enabled;
 boolean_param("pci-scan", pci_scan_enabled);
=20
 static int __init pci_init(void)
diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c
index 469f497744..528e8b660b 100644
--- a/xen/drivers/vpci/header.c
+++ b/xen/drivers/vpci/header.c
@@ -230,7 +230,7 @@ bool vpci_process_pending(struct vcpu *v)
=20
             read_unlock(&v->domain->pci_lock);
=20
-            if ( !is_hardware_domain(v->domain) )
+            if ( has_vpci_bridge(v->domain) )
                 domain_crash(v->domain);
=20
             return false;
@@ -492,7 +492,7 @@ static int modify_bars(const struct pci_dev *pdev, uint=
16_t cmd, bool rom_only)
             }
         }
=20
-        if ( !is_hardware_domain(d) )
+        if ( has_vpci_bridge(d) )
             break;
=20
         d =3D dom_xen;
@@ -522,7 +522,7 @@ static void cf_check cmd_write(
 {
     struct vpci_header *header =3D data;
=20
-    if ( !is_hardware_domain(pdev->domain) )
+    if ( has_vpci_bridge(pdev->domain) )
     {
         const struct vpci *vpci =3D pdev->vpci;
=20
@@ -564,7 +564,7 @@ static void cf_check bar_write(
     struct vpci_bar *bar =3D data;
     bool hi =3D false;
=20
-    ASSERT(is_hardware_domain(pdev->domain));
+    ASSERT(!has_vpci_bridge(pdev->domain));
=20
     if ( bar->type =3D=3D VPCI_BAR_MEM64_HI )
     {
@@ -747,7 +747,7 @@ static int vpci_init_capability_list(struct pci_dev *pd=
ev)
 {
     int rc;
     bool mask_cap_list =3D false;
-    bool is_hwdom =3D is_hardware_domain(pdev->domain);
+    bool is_hw_bridge =3D !has_vpci_bridge(pdev->domain);
=20
     if ( pci_conf_read16(pdev->sbdf, PCI_STATUS) & PCI_STATUS_CAP_LIST )
     {
@@ -758,17 +758,17 @@ static int vpci_init_capability_list(struct pci_dev *=
pdev)
             PCI_CAP_ID_MSIX,
         };
         /*
-         * For dom0, we should expose all capabilities instead of a fixed
+         * For hw bridge, we should expose all capabilities instead of a f=
ixed
          * capabilities array, so setting n to 0 here is to get the next
          * capability position directly in pci_find_next_cap_ttl.
          */
-        const unsigned int n =3D is_hwdom ? 0 : ARRAY_SIZE(supported_caps)=
;
+        const unsigned int n =3D is_hw_bridge ? 0 : ARRAY_SIZE(supported_c=
aps);
=20
         next =3D pci_find_next_cap_ttl(pdev->sbdf, PCI_CAPABILITY_LIST,
                                      supported_caps, n, &ttl);
=20
         rc =3D vpci_add_register(pdev->vpci, vpci_read_val,
-                               is_hwdom ? vpci_hw_write8 : NULL,
+                               is_hw_bridge ? vpci_hw_write8 : NULL,
                                PCI_CAPABILITY_LIST, 1,
                                (void *)(uintptr_t)next);
         if ( rc )
@@ -776,7 +776,7 @@ static int vpci_init_capability_list(struct pci_dev *pd=
ev)
=20
         next &=3D ~3;
=20
-        if ( !next && !is_hwdom )
+        if ( !next && !is_hw_bridge )
             /*
              * If we don't have any supported capabilities to expose to th=
e
              * guest, mask the PCI_STATUS_CAP_LIST bit in the status
@@ -792,7 +792,7 @@ static int vpci_init_capability_list(struct pci_dev *pd=
ev)
                                          pos + PCI_CAP_LIST_NEXT,
                                          supported_caps, n, &ttl);
=20
-            if ( !is_hwdom )
+            if ( !is_hw_bridge )
             {
                 rc =3D vpci_add_register(pdev->vpci, vpci_hw_read8, NULL,
                                        pos + PCI_CAP_LIST_ID, 1, NULL);
@@ -801,7 +801,7 @@ static int vpci_init_capability_list(struct pci_dev *pd=
ev)
             }
=20
             rc =3D vpci_add_register(pdev->vpci, vpci_read_val,
-                                   is_hwdom ? vpci_hw_write8 : NULL,
+                                   is_hw_bridge ? vpci_hw_write8 : NULL,
                                    pos + PCI_CAP_LIST_NEXT, 1,
                                    (void *)(uintptr_t)next);
             if ( rc )
@@ -811,8 +811,8 @@ static int vpci_init_capability_list(struct pci_dev *pd=
ev)
         }
     }
=20
-    /* Return early for the hw domain, no masking of PCI_STATUS. */
-    if ( is_hwdom )
+    /* Return early for the hw bridge, no masking of PCI_STATUS. */
+    if ( is_hw_bridge )
         return 0;
=20
     /* Utilize rsvdp_mask to hide PCI_STATUS_CAP_LIST from the guest. */
@@ -829,7 +829,7 @@ static int vpci_init_ext_capability_list(const struct p=
ci_dev *pdev)
 {
     unsigned int pos =3D PCI_CFG_SPACE_SIZE;
=20
-    if ( !is_hardware_domain(pdev->domain) )
+    if ( has_vpci_bridge(pdev->domain) )
         /* Extended capabilities read as zero, write ignore for DomU */
         return vpci_add_register(pdev->vpci, vpci_read_val, NULL,
                                  pos, 4, (void *)0);
@@ -866,7 +866,7 @@ int vpci_init_header(struct pci_dev *pdev)
     struct vpci_header *header =3D &pdev->vpci->header;
     struct vpci_bar *bars =3D header->bars;
     int rc;
-    bool is_hwdom =3D is_hardware_domain(pdev->domain);
+    bool is_hw_bridge =3D !has_vpci_bridge(pdev->domain);
=20
     ASSERT(rw_is_write_locked(&pdev->domain->pci_lock));
=20
@@ -893,15 +893,15 @@ int vpci_init_header(struct pci_dev *pdev)
      * PCI_COMMAND_PARITY, PCI_COMMAND_SERR, and PCI_COMMAND_FAST_BACK.
      */
     rc =3D vpci_add_register_mask(pdev->vpci,
-                                is_hwdom ? vpci_hw_read16 : guest_cmd_read=
,
+                                is_hw_bridge ? vpci_hw_read16 : guest_cmd_=
read,
                                 cmd_write, PCI_COMMAND, 2, header, 0, 0,
-                                is_hwdom ? 0
-                                         : PCI_COMMAND_RSVDP_MASK |
-                                           PCI_COMMAND_IO |
-                                           PCI_COMMAND_PARITY |
-                                           PCI_COMMAND_WAIT |
-                                           PCI_COMMAND_SERR |
-                                           PCI_COMMAND_FAST_BACK,
+                                is_hw_bridge ? 0
+                                             : PCI_COMMAND_RSVDP_MASK |
+                                               PCI_COMMAND_IO |
+                                               PCI_COMMAND_PARITY |
+                                               PCI_COMMAND_WAIT |
+                                               PCI_COMMAND_SERR |
+                                               PCI_COMMAND_FAST_BACK,
                                 0);
     if ( rc )
         return rc;
@@ -925,7 +925,7 @@ int vpci_init_header(struct pci_dev *pdev)
      * start with memory decoding disabled, and modify_bars() will not be =
called
      * at the end of this function.
      */
-    if ( !is_hwdom )
+    if ( !is_hw_bridge )
         cmd &=3D ~(PCI_COMMAND_VGA_PALETTE | PCI_COMMAND_INVALIDATE |
                  PCI_COMMAND_SPECIAL | PCI_COMMAND_MASTER | PCI_COMMAND_ME=
MORY |
                  PCI_COMMAND_IO);
@@ -933,7 +933,7 @@ int vpci_init_header(struct pci_dev *pdev)
     header->guest_cmd =3D cmd;
=20
     /* Disable memory decoding before sizing. */
-    if ( !is_hwdom || (cmd & PCI_COMMAND_MEMORY) )
+    if ( !is_hw_bridge || (cmd & PCI_COMMAND_MEMORY) )
         pci_conf_write16(pdev->sbdf, PCI_COMMAND, cmd & ~PCI_COMMAND_MEMOR=
Y);
=20
     for ( i =3D 0; i < num_bars; i++ )
@@ -945,9 +945,10 @@ int vpci_init_header(struct pci_dev *pdev)
         {
             bars[i].type =3D VPCI_BAR_MEM64_HI;
             rc =3D vpci_add_register(pdev->vpci,
-                                   is_hwdom ? vpci_hw_read32
-                                            : guest_mem_bar_read,
-                                   is_hwdom ? bar_write : guest_mem_bar_wr=
ite,
+                                   is_hw_bridge ? vpci_hw_read32
+                                                : guest_mem_bar_read,
+                                   is_hw_bridge ? bar_write
+                                                : guest_mem_bar_write,
                                    reg, 4, &bars[i]);
             if ( rc )
                 goto fail;
@@ -959,7 +960,7 @@ int vpci_init_header(struct pci_dev *pdev)
         if ( (val & PCI_BASE_ADDRESS_SPACE) =3D=3D PCI_BASE_ADDRESS_SPACE_=
IO )
         {
             bars[i].type =3D VPCI_BAR_IO;
-            if ( !IS_ENABLED(CONFIG_X86) && !is_hwdom )
+            if ( !IS_ENABLED(CONFIG_X86) && !is_hw_bridge )
             {
                 rc =3D vpci_add_register(pdev->vpci, vpci_read_val, NULL,
                                        reg, 4, (void *)0);
@@ -988,7 +989,7 @@ int vpci_init_header(struct pci_dev *pdev)
         {
             bars[i].type =3D VPCI_BAR_EMPTY;
=20
-            if ( !is_hwdom )
+            if ( !is_hw_bridge )
             {
                 rc =3D vpci_add_register(pdev->vpci, vpci_read_val, NULL,
                                        reg, 4, (void *)0);
@@ -1005,17 +1006,18 @@ int vpci_init_header(struct pci_dev *pdev)
         bars[i].prefetchable =3D val & PCI_BASE_ADDRESS_MEM_PREFETCH;
=20
         rc =3D vpci_add_register(pdev->vpci,
-                               is_hwdom ? vpci_hw_read32 : guest_mem_bar_r=
ead,
-                               is_hwdom ? bar_write : guest_mem_bar_write,
+                               is_hw_bridge ? vpci_hw_read32
+                                            : guest_mem_bar_read,
+                               is_hw_bridge ? bar_write : guest_mem_bar_wr=
ite,
                                reg, 4, &bars[i]);
         if ( rc )
             goto fail;
     }
=20
     /* Check expansion ROM. */
-    rc =3D is_hwdom ? pci_size_mem_bar(pdev->sbdf, rom_reg, &addr, &size,
-                                     PCI_BAR_ROM)
-                  : 0;
+    rc =3D is_hw_bridge ? pci_size_mem_bar(pdev->sbdf, rom_reg, &addr, &si=
ze,
+                                         PCI_BAR_ROM)
+                      : 0;
     if ( rc > 0 && size )
     {
         struct vpci_bar *rom =3D &header->bars[num_bars];
@@ -1038,7 +1040,7 @@ int vpci_init_header(struct pci_dev *pdev)
                 goto fail;
         }
     }
-    else if ( !is_hwdom )
+    else if ( !is_hw_bridge )
     {
         /* TODO: Check expansion ROM, we do not handle ROM for guests for =
now */
         header->bars[num_bars].type =3D VPCI_BAR_EMPTY;
diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c
index 07c7071d0a..8ea89b9805 100644
--- a/xen/drivers/vpci/vpci.c
+++ b/xen/drivers/vpci/vpci.c
@@ -48,7 +48,7 @@ static int assign_virtual_sbdf(struct pci_dev *pdev)
=20
     ASSERT(rw_is_write_locked(&pdev->domain->pci_lock));
=20
-    if ( is_hardware_domain(d) )
+    if ( !has_vpci_bridge(d) )
         return 0;
=20
     /*
@@ -429,7 +429,7 @@ static const struct pci_dev *translate_virtual_device(c=
onst struct domain *d,
 #ifdef CONFIG_HAS_VPCI_GUEST_SUPPORT
     const struct pci_dev *pdev;
=20
-    ASSERT(!is_hardware_domain(d));
+    ASSERT(has_vpci_bridge(d));
     ASSERT(rw_is_locked(&d->pci_lock));
=20
     for_each_pdev ( d, pdev )
diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h
index 9ae75d946a..d4695cb353 100644
--- a/xen/include/xen/vpci.h
+++ b/xen/include/xen/vpci.h
@@ -339,6 +339,14 @@ static inline int __must_check vpci_reset_device(struc=
t pci_dev *pdev)
     return vpci_assign_device(pdev);
 }
=20
+#ifdef CONFIG_ARM
+#include 
+
+#define has_vpci_bridge(d) (!is_hardware_domain(d) || pci_scan_enabled)
+#else
+#define has_vpci_bridge(d) (!is_hardware_domain(d))
+#endif
+
 #endif
=20
 /*
--=20
2.51.2


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From: Mykyta Poturai 
To: "xen-devel@lists.xenproject.org" 
CC: Mykyta Poturai , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , Volodymyr
 Babchuk 
Subject: [PATCH v3 8/8] arm/pci: enable vpci for hwdom when pci-scan is
 enabled
Thread-Topic: [PATCH v3 8/8] arm/pci: enable vpci for hwdom when pci-scan is
 enabled
Thread-Index: AQHcWJBceLVR272n0Uem7ppfvpbz3Q==
Date: Tue, 18 Nov 2025 13:36:36 +0000
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With pci-scan implemented it is now possible to use vpci for hardware
domains. Update has_vpci to reflect this change.

Signed-off-by: Mykyta Poturai 
---
v2->v3:
* replace hwdom_uses_vpci with has_vpci_bridge

v1->v2:
* fix typo in commit message
---
 xen/arch/arm/include/asm/domain.h | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/d=
omain.h
index af3e168374..3eac0aea64 100644
--- a/xen/arch/arm/include/asm/domain.h
+++ b/xen/arch/arm/include/asm/domain.h
@@ -305,8 +305,7 @@ static inline void arch_vcpu_block(struct vcpu *v) {}
=20
 #define arch_vm_assist_valid_mask(d) (1UL << VMASST_TYPE_runstate_update_f=
lag)
=20
-/* vPCI is not available on Arm */
-#define has_vpci(d)    ({ (void)(d); false; })
+#define has_vpci(d)    (is_hardware_domain(d) && has_vpci_bridge(d))
=20
 struct arch_vcpu_io {
     struct instr_details dabt_instr; /* when the instruction is decoded */
--=20
2.51.2


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From: Mykyta Poturai 
To: "xen-devel@lists.xenproject.org" 
CC: Edward Pickup , Andrew Cooper
	, Anthony PERARD ,
	Michal Orzel , Jan Beulich , Julien
 Grall , =?iso-8859-1?Q?Roger_Pau_Monn=E9?=
	, Stefano Stabellini , Bertrand
 Marquis , Volodymyr Babchuk
	, Luca Fancellu , Stewart
 Hildebrand , Mykyta Poturai
	
Subject: [PATCH v3 1/8] arm/pci: Add pci-scan boot argument
Thread-Topic: [PATCH v3 1/8] arm/pci: Add pci-scan boot argument
Thread-Index: AQHcWJBa0sfFMet/uEihbNa8Xr70/w==
Date: Tue, 18 Nov 2025 13:36:32 +0000
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From: Edward Pickup 

This patch adds a Xen boot arguments that, if enabled, causes a call to
existing code to scan pci devices enumerated by the firmware.

This will be needed ahead of dom0less support for pci passthrough on
arm.

Signed-off-by: Luca Fancellu 
Signed-off-by: Stewart Hildebrand 
Signed-off-by: Mykyta Poturai 
---

v2->v3:
* add define for cases when HAS_PCI is not set

v1->v2:
* remove dead code
* don't return errors from pci_init, but report them

changes from previous series:
* remove is_pci_scan_enabled wrapper
* make pci_scan_enabled ro_after_init
* drop debug prints
* drop Edward's SOB
---
 docs/misc/xen-command-line.pandoc  |  7 +++++++
 xen/arch/arm/include/asm/pci.h     |  2 ++
 xen/arch/arm/pci/pci-host-common.c |  1 +
 xen/arch/arm/pci/pci.c             | 29 +++++++++++++++++++++++++++--
 4 files changed, 37 insertions(+), 2 deletions(-)

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line=
.pandoc
index 34004ce282..e5f7275bdc 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -2079,6 +2079,13 @@ This option can be specified more than once (up to 8=
 times at present).
=20
 Flag to enable or disable support for PCI passthrough
=20
+### pci-scan (arm)
+> `=3D `
+
+> Default: `false`
+
+Flag to enable or disable Xen PCI scan at boot.
+
 ### pcid (x86)
 > `=3D  | xpti=3D`
=20
diff --git a/xen/arch/arm/include/asm/pci.h b/xen/arch/arm/include/asm/pci.=
h
index 08ffcd4438..0680b2f50c 100644
--- a/xen/arch/arm/include/asm/pci.h
+++ b/xen/arch/arm/include/asm/pci.h
@@ -155,6 +155,8 @@ bool arch_pci_device_physdevop(void);
=20
 #else   /*!CONFIG_HAS_PCI*/
=20
+#define pci_scan_enabled false
+
 struct pci_dev;
=20
 static inline void arch_pci_init_pdev(struct pci_dev *pdev) {}
diff --git a/xen/arch/arm/pci/pci-host-common.c b/xen/arch/arm/pci/pci-host=
-common.c
index 487c545f3a..d3481b05eb 100644
--- a/xen/arch/arm/pci/pci-host-common.c
+++ b/xen/arch/arm/pci/pci-host-common.c
@@ -284,6 +284,7 @@ pci_host_common_probe(struct dt_device_node *dev,
     }
=20
     pci_add_host_bridge(bridge);
+    pci_add_segment(bridge->segment);
=20
     return bridge;
=20
diff --git a/xen/arch/arm/pci/pci.c b/xen/arch/arm/pci/pci.c
index beb1f971fa..49ee003c5e 100644
--- a/xen/arch/arm/pci/pci.c
+++ b/xen/arch/arm/pci/pci.c
@@ -91,8 +91,14 @@ bool arch_pci_device_physdevop(void)
 bool __read_mostly pci_passthrough_enabled;
 boolean_param("pci-passthrough", pci_passthrough_enabled);
=20
+/* By default pci scan is disabled. */
+static __ro_after_init bool pci_scan_enabled;
+boolean_param("pci-scan", pci_scan_enabled);
+
 static int __init pci_init(void)
 {
+    int ret;
+
     /*
      * Enable PCI passthrough when has been enabled explicitly
      * (pci-passthrough=3Don).
@@ -104,9 +110,28 @@ static int __init pci_init(void)
         panic("Could not initialize PCI segment 0\n");
=20
     if ( acpi_disabled )
-        return dt_pci_init();
+        ret =3D dt_pci_init();
     else
-        return acpi_pci_init();
+        ret =3D acpi_pci_init();
+
+    if ( ret < 0 )
+    {
+        printk(XENLOG_ERR "PCI: Failed to initialize PCI host bridges (rc=
=3D%d)\n", ret);
+        return 0;
+    }
+
+    if ( pci_scan_enabled )
+    {
+        ret =3D scan_pci_devices();
+
+        if ( ret < 0 )
+        {
+            printk(XENLOG_ERR "PCI: Failed to scan PCI devices (rc=3D%d)\n=
", ret);
+            return 0;
+        }
+    }
+
+    return 0;
 }
 __initcall(pci_init);
=20
--=20
2.51.2


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From: Mykyta Poturai 
To: "xen-devel@lists.xenproject.org" 
CC: Stewart Hildebrand , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , Volodymyr
 Babchuk , Andrew Cooper
	, Anthony PERARD , Jan
 Beulich , =?iso-8859-1?Q?Roger_Pau_Monn=E9?=
	, Mykyta Poturai 
Subject: [PATCH v3 6/8] xen/pci: initialize BARs
Thread-Topic: [PATCH v3 6/8] xen/pci: initialize BARs
Thread-Index: AQHcWJBbzP55AknCK0ePM8b3+jQIaw==
Date: Tue, 18 Nov 2025 13:36:35 +0000
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 <20b26b4a3f180139971105ee1b23cc4b0a82092b.1763462211.git.mykyta_poturai@epam.com>
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From: Stewart Hildebrand 

A PCI device must have valid BARs in order to assign it to a domain.  On
ARM, firmware is unlikely to have initialized the BARs, so we must do
this in Xen. During setup_hwdom_pci_devices(), check if each BAR is
valid. If the BAR happens to already be valid, remove the BAR range from
a rangeset of valid PCI ranges so as to avoid overlap when reserving a
new BAR. If not valid, reserve a new BAR address from the rangeset and
write it to the device.

Avaliable ranges are read from DT during init and stored in two distinct
rangesets, one for prefetchable and one for non-prefetchable BARs.

Signed-off-by: Stewart Hildebrand 
Signed-off-by: Mykyta Poturai 
---
v2->v3:
* drop hwdom_uses_vpci
* check that rangeset can handle u64
* rework rangeset manipulaiton
* mark more functions as __init
* move bar init to arm files
* style fixes

v1->v2:
* move hwdom_uses_vpci to this patch
* fixup error reporting
---
 xen/arch/arm/include/asm/pci.h     |   7 ++
 xen/arch/arm/pci/pci-host-common.c |  92 ++++++++++++++++++++++++
 xen/arch/arm/pci/pci.c             | 110 +++++++++++++++++++++++++++++
 xen/common/rangeset.c              |  62 ++++++++++++++--
 xen/include/xen/rangeset.h         |  11 +++
 5 files changed, 277 insertions(+), 5 deletions(-)

diff --git a/xen/arch/arm/include/asm/pci.h b/xen/arch/arm/include/asm/pci.=
h
index 7289f7688b..ac4e87f9c1 100644
--- a/xen/arch/arm/include/asm/pci.h
+++ b/xen/arch/arm/include/asm/pci.h
@@ -74,6 +74,8 @@ struct pci_host_bridge {
     struct pci_config_window *child_cfg;
     const struct pci_ops *child_ops;
     void *priv;                      /* Private data of the bridge. */
+    struct rangeset *bar_ranges;
+    struct rangeset *bar_ranges_prefetch;
 };
=20
 struct pci_ops {
@@ -154,6 +156,11 @@ void pci_generic_init_bus_range_child(struct dt_device=
_node *dev,
=20
 bool arch_pci_device_physdevop(void);
=20
+uint64_t pci_get_new_bar_addr(const struct pci_dev *pdev, uint64_t size,
+                              bool is_64bit, bool prefetch);
+int pci_reserve_bar_range(const struct pci_dev *pdev, uint64_t addr,
+                          uint64_t size, bool prefetch);
+
 #else   /*!CONFIG_HAS_PCI*/
=20
 #define pci_scan_enabled false
diff --git a/xen/arch/arm/pci/pci-host-common.c b/xen/arch/arm/pci/pci-host=
-common.c
index de30fb0aec..28c26af9eb 100644
--- a/xen/arch/arm/pci/pci-host-common.c
+++ b/xen/arch/arm/pci/pci-host-common.c
@@ -21,6 +21,7 @@
 #include 
 #include 
 #include 
+#include 
=20
 #include 
=20
@@ -232,6 +233,25 @@ static int pci_bus_find_domain_nr(struct dt_device_nod=
e *dev)
     return domain;
 }
=20
+static int __init add_bar_range(const struct dt_device_node *dev,
+                                uint32_t flags, uint64_t addr, uint64_t le=
n,
+                                void *data)
+{
+    struct pci_host_bridge *bridge =3D data;
+
+    /* Ensure we are not using bits in a rangeset */
+    BUILD_BUG_ON(sizeof(unsigned long) !=3D sizeof(uint64_t));
+
+    if ( !(flags & IORESOURCE_MEM) )
+        return 0;
+
+    if ( flags & IORESOURCE_PREFETCH )
+        return rangeset_add_range(bridge->bar_ranges_prefetch, addr,
+                                  addr + len - 1);
+    else
+        return rangeset_add_range(bridge->bar_ranges, addr, addr + len - 1=
);
+}
+
 struct pci_host_bridge * __init
 pci_host_common_probe(struct dt_device_node *dev,
                       const struct pci_ecam_ops *ops,
@@ -283,6 +303,18 @@ pci_host_common_probe(struct dt_device_node *dev,
         bridge->child_ops =3D &child_ops->pci_ops;
     }
=20
+    bridge->bar_ranges =3D rangeset_new(NULL, "BAR ranges",
+                                      RANGESETF_prettyprint_hex);
+    bridge->bar_ranges_prefetch =3D rangeset_new(NULL,
+                                               "BAR ranges (prefetchable)"=
,
+                                               RANGESETF_prettyprint_hex);
+    if ( bridge->bar_ranges && bridge->bar_ranges_prefetch )
+    {
+        err =3D dt_for_each_range(bridge->dt_node, add_bar_range, bridge);
+        if ( err )
+            goto err_child;
+    }
+
     pci_add_host_bridge(bridge);
     pci_add_segment(bridge->segment);
=20
@@ -476,6 +508,66 @@ bool pci_check_bar(const struct pci_dev *pdev, mfn_t s=
tart, mfn_t end)
=20
     return bar_data.is_valid;
 }
+
+/*
+ * Find suitable place for an uninitialized bar of specified size in the
+ * host bridge ranges
+ */
+uint64_t __init pci_get_new_bar_addr(const struct pci_dev *pdev, uint64_t =
size,
+                                     bool is_64bit, bool prefetch)
+{
+    struct pci_host_bridge *bridge;
+    struct rangeset *range;
+    uint64_t addr =3D 0, end =3D GB(4);
+
+    /* Make sure we can store addr in a rangeset */
+    BUILD_BUG_ON(sizeof(addr) !=3D sizeof(unsigned long));
+
+    bridge =3D pci_find_host_bridge(pdev->seg, pdev->bus);
+    if ( !bridge )
+        return 0;
+
+    range =3D prefetch ? bridge->bar_ranges_prefetch : bridge->bar_ranges;
+
+    if ( size < PAGE_SIZE )
+        size =3D PAGE_SIZE;
+
+    if ( is_64bit )
+    {
+        addr =3D GB(4);
+        end =3D ~0;
+    }
+
+    if ( !rangeset_claim_aligned_range(range, size, &addr, end) )
+        return addr;
+
+    printk(XENLOG_ERR "Failed to claim BAR range %lx-%lx from rangeset\n",
+           addr, addr + size - 1);
+
+    return 0;
+}
+
+/*
+ * Remove already used memory from the host bridge bar ranges
+ */
+int __init pci_reserve_bar_range(const struct pci_dev *pdev, uint64_t addr=
,
+                                 uint64_t size, bool prefetch)
+{
+    struct pci_host_bridge *bridge;
+    struct rangeset *range;
+
+    /* Make sure we can store addr in a rangeset */
+    BUILD_BUG_ON(sizeof(addr) !=3D sizeof(unsigned long));
+
+    bridge =3D pci_find_host_bridge(pdev->seg, pdev->bus);
+    if ( !bridge )
+        return 0;
+
+    range =3D prefetch ? bridge->bar_ranges_prefetch : bridge->bar_ranges;
+
+    return rangeset_remove_range(range, addr, addr + size - 1);
+}
+
 /*
  * Local variables:
  * mode: C
diff --git a/xen/arch/arm/pci/pci.c b/xen/arch/arm/pci/pci.c
index 951639eb3f..0330220e93 100644
--- a/xen/arch/arm/pci/pci.c
+++ b/xen/arch/arm/pci/pci.c
@@ -95,6 +95,108 @@ boolean_param("pci-passthrough", pci_passthrough_enable=
d);
 __ro_after_init bool pci_scan_enabled;
 boolean_param("pci-scan", pci_scan_enabled);
=20
+typedef int (*bar_callback_t)(struct pci_dev *, uint8_t, uint64_t, uint64_=
t,
+                              bool, bool);
+
+static int __init reserve_bar_range(struct pci_dev *pdev, uint8_t reg,
+                                    uint64_t addr, uint64_t size, bool is_=
64bit,
+                                    bool prefetch)
+{
+    if ( pci_check_bar(pdev, maddr_to_mfn(addr),
+                       maddr_to_mfn(addr + size - 1)) )
+        return pci_reserve_bar_range(pdev, addr, size, prefetch);
+    return 0;
+}
+
+static int __init setup_bar(struct pci_dev *pdev, uint8_t reg, uint64_t ad=
dr,
+                            uint64_t size, bool is_64bit, bool prefetch)
+{
+    if ( !pci_check_bar(pdev, maddr_to_mfn(addr),
+                        maddr_to_mfn(addr + size - 1)) )
+    {
+        uint16_t cmd =3D pci_conf_read16(pdev->sbdf, PCI_COMMAND);
+
+        addr =3D pci_get_new_bar_addr(pdev, size, is_64bit, prefetch);
+        if ( !addr )
+            return -ENOMEM;
+
+        pci_conf_write16(pdev->sbdf, PCI_COMMAND,
+                         cmd & ~(PCI_COMMAND_MEMORY | PCI_COMMAND_IO));
+
+        pci_conf_write32(pdev->sbdf, reg,
+                         (addr & GENMASK(31, 0)) |
+                         (is_64bit ? PCI_BASE_ADDRESS_MEM_TYPE_64 : 0));
+
+        if ( is_64bit )
+            pci_conf_write32(pdev->sbdf, reg + 4, addr >> 32);
+
+        pci_conf_write16(pdev->sbdf, PCI_COMMAND, cmd);
+    }
+
+    return 0;
+}
+
+static int __init bars_iterate(struct pci_dev *pdev, void *arg)
+{
+    unsigned int i, barsize, ret =3D 0, num_bars =3D PCI_HEADER_NORMAL_NR_=
BARS;
+    uint64_t addr, size;
+    bar_callback_t cb =3D arg;
+
+    if ( (pci_conf_read8(pdev->sbdf, PCI_HEADER_TYPE) & 0x7f) =3D=3D
+         PCI_HEADER_TYPE_NORMAL )
+    {
+        for ( i =3D 0; i < num_bars; i +=3D barsize )
+        {
+            uint8_t reg =3D PCI_BASE_ADDRESS_0 + i * 4;
+            bool prefetch;
+
+            if ( (pci_conf_read32(pdev->sbdf, reg) & PCI_BASE_ADDRESS_SPAC=
E) =3D=3D
+                 PCI_BASE_ADDRESS_SPACE_IO )
+            {
+                barsize =3D 1;
+                continue;
+            }
+
+            barsize =3D pci_size_mem_bar(pdev->sbdf, reg, &addr, &size,
+                                       (i =3D=3D num_bars - 1) ? PCI_BAR_L=
AST : 0);
+
+            if ( !size )
+                continue;
+
+            prefetch =3D pci_conf_read32(pdev->sbdf, reg) &
+                       PCI_BASE_ADDRESS_MEM_PREFETCH;
+
+            ret =3D cb(pdev, reg, addr, size, barsize =3D=3D 2, prefetch);
+            if ( ret )
+                return ret;
+        }
+    }
+
+    return ret;
+}
+
+static int __init pci_setup_bars(void)
+{
+    int ret;
+    /* We can't change the signature of bars_iterate to only accept
+     * bar_callback_t, so use intermediate variables to ensure callback
+     * signatures are always correct
+     */
+    bar_callback_t cb_reserve =3D reserve_bar_range;
+    bar_callback_t cb_setup =3D setup_bar;
+
+    pcidevs_lock();
+    ret =3D pci_iterate_devices(bars_iterate, cb_reserve);
+    if ( ret )
+        goto out;
+
+    ret =3D pci_iterate_devices(bars_iterate, cb_setup);
+
+out:
+    pcidevs_unlock();
+    return ret;
+}
+
 static int __init pci_init(void)
 {
     int ret;
@@ -129,6 +231,14 @@ static int __init pci_init(void)
             printk(XENLOG_ERR "PCI: Failed to scan PCI devices (rc=3D%d)\n=
", ret);
             return 0;
         }
+
+        ret =3D pci_setup_bars();
+
+        if ( ret < 0 )
+        {
+            printk(XENLOG_ERR "PCI: Failed to configure BARs (rc=3D%d)\n",=
 ret);
+            return 0;
+        }
     }
=20
     return 0;
diff --git a/xen/common/rangeset.c b/xen/common/rangeset.c
index 0e3b9acd35..6a0c20ab41 100644
--- a/xen/common/rangeset.c
+++ b/xen/common/rangeset.c
@@ -180,16 +180,13 @@ int rangeset_add_range(
     return rc;
 }
=20
-int rangeset_remove_range(
-    struct rangeset *r, unsigned long s, unsigned long e)
+static int remove_range(struct rangeset *r, unsigned long s, unsigned long=
 e)
 {
     struct range *x, *y, *t;
     int rc =3D 0;
=20
     ASSERT(s <=3D e);
=20
-    write_lock(&r->lock);
-
     x =3D find_range(r, s);
     y =3D find_range(r, e);
=20
@@ -244,8 +241,18 @@ int rangeset_remove_range(
             destroy_range(r, x);
     }
=20
- out:
+out:
+    return rc;
+}
+
+int rangeset_remove_range(struct rangeset *r, unsigned long s, unsigned lo=
ng e)
+{
+    int rc =3D 0;
+
+    write_lock(&r->lock);
+    rc =3D remove_range(r, s, e);
     write_unlock(&r->lock);
+
     return rc;
 }
=20
@@ -357,6 +364,51 @@ int rangeset_claim_range(struct rangeset *r, unsigned =
long size,
     return 0;
 }
=20
+int rangeset_claim_aligned_range(struct rangeset *r, unsigned long size,
+                                 unsigned long *s, unsigned long e)
+{
+    struct range *x;
+    int rc =3D 0;
+
+    /* Power of 2 check */
+    if ( (size & (size - 1)) !=3D 0 && size !=3D 0 )
+    {
+        *s =3D 0;
+        return -EINVAL;
+    }
+
+    if ( e < *s )
+        return -EINVAL;
+
+    write_lock(&r->lock);
+
+    for ( x =3D first_range(r); x; x =3D next_range(r, x) )
+    {
+        /* Assumes size is a power of 2 */
+        unsigned long start_aligned =3D ROUNDUP(x->s, size);
+
+        if ( x->e > start_aligned &&
+             (x->e - start_aligned) >=3D size &&
+             start_aligned >=3D *s &&
+             start_aligned + size <=3D e)
+        {
+            rc =3D remove_range(r, start_aligned, start_aligned + size - 1=
);
+            if ( !rc )
+                *s =3D start_aligned;
+            else
+                *s =3D 0;
+
+            write_unlock(&r->lock);
+            return rc;
+        }
+    }
+
+    *s =3D 0;
+
+    write_unlock(&r->lock);
+    return -ENOSPC;
+}
+
 int rangeset_consume_ranges(struct rangeset *r,
                             int (*cb)(unsigned long s, unsigned long e,
                                       void *ctxt, unsigned long *c),
diff --git a/xen/include/xen/rangeset.h b/xen/include/xen/rangeset.h
index 817505badf..dcef96cb2c 100644
--- a/xen/include/xen/rangeset.h
+++ b/xen/include/xen/rangeset.h
@@ -61,6 +61,17 @@ int __must_check rangeset_add_range(
     struct rangeset *r, unsigned long s, unsigned long e);
 int __must_check rangeset_claim_range(struct rangeset *r, unsigned long si=
ze,
                                       unsigned long *s);
+
+/*
+ * Find a range subset that starts at or after s, ends before e,
+ * and is aligned to the size.
+ * If such subset is present it is removed from the rangeset and
+ * it's start is written to s, otherwise s is set to 0.
+ */
+int __must_check rangeset_claim_aligned_range(struct rangeset *r,
+                                              unsigned long size,
+                                              unsigned long *s,
+                                              unsigned long e);
 int __must_check rangeset_remove_range(
     struct rangeset *r, unsigned long s, unsigned long e);
 bool __must_check rangeset_contains_range(
--=20
2.51.2


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From: Mykyta Poturai 
To: "xen-devel@lists.xenproject.org" 
CC: Luca Fancellu , Andrew Cooper
	, Anthony PERARD ,
	Michal Orzel , Jan Beulich , Julien
 Grall , =?iso-8859-1?Q?Roger_Pau_Monn=E9?=
	, Stefano Stabellini , Bertrand
 Marquis , Volodymyr Babchuk
	, Stewart Hildebrand
	, Mykyta Poturai 
Subject: [PATCH v3 4/8] xen/pci: update DT for hwdom when it uses vpci
Thread-Topic: [PATCH v3 4/8] xen/pci: update DT for hwdom when it uses vpci
Thread-Index: AQHcWJBbokhYTBMFOESThWU0kpE72A==
Date: Tue, 18 Nov 2025 13:36:34 +0000
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From: Luca Fancellu 

When pci-scan is enabled and Xen supports vpci for guests, Xen will
scan the pci bus to find devices and emulate the pci bus, so the hw
domain must see the emulated bus instead of the real one.

A new helper function, hwdom_uses_vpci, is implemented and returns true
when pci-scan is enabled and Xen is built with
CONFIG_HAS_VPCI_GUEST_SUPPORT=3Dy. When hwdom_uses_vpci() is true, a vpci
node is created for the hwdom device tree.

Depending on whether the guest is using vPCI or not, and whether the
domain is using host layout or not, generate the appropriate device tree
nodes for the guest and handle the right MMIO regions traps.

Signed-off-by: Luca Fancellu 
Signed-off-by: Stewart Hildebrand 
Signed-off-by: Mykyta Poturai 
---
v2->v3:
* use has_vpci_bridge in place of hwdom_uses_vpci

v1->v2:
* make make_vpci_node static
---
 docs/misc/xen-command-line.pandoc |   4 +-
 xen/arch/arm/domain_build.c       | 151 +++++++++++++++++++++++++++++-
 2 files changed, 153 insertions(+), 2 deletions(-)

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line=
.pandoc
index e5f7275bdc..4a546f94a7 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -2084,7 +2084,9 @@ Flag to enable or disable support for PCI passthrough
=20
 > Default: `false`
=20
-Flag to enable or disable Xen PCI scan at boot.
+Flag to enable or disable Xen PCI scan at boot. When the flag is enabled, =
the
+hardware domain cannot have access to the real PCI bus, it will see the bu=
s
+emulated by Xen.
=20
 ### pcid (x86)
 > `=3D  | xpti=3D`
diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index 4bbffdf535..7423605b61 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
@@ -41,6 +41,7 @@
 #include 
 #include 
 #include 
+#include 
=20
 static unsigned int __initdata opt_dom0_max_vcpus;
 integer_param("dom0_max_vcpus", opt_dom0_max_vcpus);
@@ -1557,6 +1558,142 @@ int __init make_chosen_node(const struct kernel_inf=
o *kinfo)
     return res;
 }
=20
+#ifdef CONFIG_HAS_VPCI_GUEST_SUPPORT
+struct vpci_param {
+   uint64_t vpci_ecam_base;
+   uint64_t vpci_ecam_size;
+   uint64_t vpci_mem_base;
+   uint64_t vpci_mem_size;
+   uint64_t vpci_mem_prefetch_base;
+   uint64_t vpci_mem_prefetch_size;
+};
+
+static int __init handle_vpci_range(const struct dt_device_node *dev,
+                                    uint32_t flags, uint64_t addr, uint64_=
t len,
+                                    void *data)
+{
+    struct vpci_param *vpci =3D (struct vpci_param *)data;
+
+    if ( !(flags & IORESOURCE_MEM) )
+        return 0;
+
+    if ( !(flags & IORESOURCE_PREFETCH) && addr < GB(4) )
+    {
+        vpci->vpci_mem_base =3D addr;
+        vpci->vpci_mem_size =3D len;
+    }
+    else if ( flags & IORESOURCE_PREFETCH )
+    {
+        vpci->vpci_mem_prefetch_base =3D addr;
+        vpci->vpci_mem_prefetch_size =3D len;
+    }
+    return 0;
+}
+
+static int __init make_vpci_node(struct domain *d, void *fdt)
+{
+    /* reg is sized to be used for all the needed properties below */
+    __be32 reg[((GUEST_ROOT_ADDRESS_CELLS * 2) + GUEST_ROOT_SIZE_CELLS + 1=
)
+               * 2];
+    __be32 *cells;
+    char buf[22]; /* pcie@ + max 16 char address + '\0' */
+    int res;
+    struct vpci_param vpci =3D {
+        .vpci_ecam_base =3D GUEST_VPCI_ECAM_BASE,
+        .vpci_ecam_size =3D GUEST_VPCI_ECAM_SIZE,
+        .vpci_mem_base =3D GUEST_VPCI_MEM_ADDR,
+        .vpci_mem_size =3D GUEST_VPCI_MEM_SIZE,
+        .vpci_mem_prefetch_base =3D GUEST_VPCI_PREFETCH_MEM_ADDR,
+        .vpci_mem_prefetch_size =3D GUEST_VPCI_PREFETCH_MEM_SIZE
+    };
+
+    if ( domain_use_host_layout(d) )
+    {
+        struct pci_host_bridge *bridge;
+
+        bridge =3D pci_find_host_bridge(0, 0);
+
+        vpci.vpci_ecam_base =3D bridge->cfg->phys_addr;
+        vpci.vpci_ecam_size =3D bridge->cfg->size;
+
+        res =3D dt_for_each_range(bridge->dt_node, handle_vpci_range, &vpc=
i);
+        if ( res < 0 )
+            return -EINVAL;
+    }
+
+    snprintf(buf, sizeof(buf), "pcie@%"PRIx64, vpci.vpci_ecam_base);
+    dt_dprintk("Create vpci node\n");
+    res =3D fdt_begin_node(fdt, buf);
+    if ( res )
+        return res;
+
+    res =3D fdt_property_string(fdt, "compatible", "pci-host-ecam-generic"=
);
+    if ( res )
+        return res;
+
+    res =3D fdt_property_string(fdt, "device_type", "pci");
+    if ( res )
+        return res;
+
+    /* Create reg property */
+    cells =3D ®[0];
+    dt_child_set_range(&cells, GUEST_ROOT_ADDRESS_CELLS, GUEST_ROOT_SIZE_C=
ELLS,
+                       vpci.vpci_ecam_base, vpci.vpci_ecam_size);
+
+    res =3D fdt_property(fdt, "reg", reg,
+                       (GUEST_ROOT_ADDRESS_CELLS +
+                       GUEST_ROOT_SIZE_CELLS) * sizeof(*reg));
+    if ( res )
+        return res;
+
+    /* Create bus-range property */
+    cells =3D ®[0];
+    dt_set_cell(&cells, 1, 0);
+    dt_set_cell(&cells, 1, 255);
+    res =3D fdt_property(fdt, "bus-range", reg, 2 * sizeof(*reg));
+    if ( res )
+        return res;
+
+    res =3D fdt_property_cell(fdt, "#address-cells", 3);
+    if ( res )
+        return res;
+
+    res =3D fdt_property_cell(fdt, "#size-cells", 2);
+    if ( res )
+        return res;
+
+    res =3D fdt_property_string(fdt, "status", "okay");
+    if ( res )
+        return res;
+
+    /*
+     * Create ranges property as:
+     * <(PCI bitfield) (PCI address) (CPU address) (Size)>
+     */
+    cells =3D ®[0];
+    dt_set_cell(&cells, 1, GUEST_VPCI_ADDR_TYPE_MEM);
+    dt_set_cell(&cells, GUEST_ROOT_ADDRESS_CELLS, vpci.vpci_mem_base);
+    dt_set_cell(&cells, GUEST_ROOT_ADDRESS_CELLS, vpci.vpci_mem_base);
+    dt_set_cell(&cells, GUEST_ROOT_SIZE_CELLS, vpci.vpci_mem_size);
+    dt_set_cell(&cells, 1, GUEST_VPCI_ADDR_TYPE_PREFETCH_MEM);
+    dt_set_cell(&cells, GUEST_ROOT_ADDRESS_CELLS, vpci.vpci_mem_prefetch_b=
ase);
+    dt_set_cell(&cells, GUEST_ROOT_ADDRESS_CELLS, vpci.vpci_mem_prefetch_b=
ase);
+    dt_set_cell(&cells, GUEST_ROOT_SIZE_CELLS, vpci.vpci_mem_prefetch_size=
);
+    res =3D fdt_property(fdt, "ranges", reg, sizeof(reg));
+    if ( res )
+        return res;
+
+    res =3D fdt_end_node(fdt);
+
+    return res;
+}
+#else
+static inline int __init make_vpci_node(struct domain *d, void *fdt)
+{
+    return 0;
+}
+#endif
+
 static int __init handle_node(struct domain *d, struct kernel_info *kinfo,
                               struct dt_device_node *node,
                               p2m_type_t p2mt)
@@ -1615,7 +1752,12 @@ static int __init handle_node(struct domain *d, stru=
ct kernel_info *kinfo,
         dt_dprintk("  Skip it (blacklisted)\n");
         return 0;
     }
-
+    /* If Xen is scanning the PCI devices, don't expose real bus to hwdom =
*/
+    if ( has_vpci_bridge(d) && dt_device_type_is_equal(node, "pci") )
+    {
+        dt_dprintk("  Skip it (pci-scan is enabled)\n");
+        return 0;
+    }
     /*
      * Replace these nodes with our own. Note that the original may be
      * used_by DOMID_XEN so this check comes first.
@@ -1766,6 +1908,13 @@ static int __init handle_node(struct domain *d, stru=
ct kernel_info *kinfo,
             if ( res )
                 return res;
         }
+
+        if ( has_vpci_bridge(d) )
+        {
+            res =3D make_vpci_node(d, kinfo->fdt);
+            if ( res )
+                return res;
+        }
     }
=20
     res =3D fdt_end_node(kinfo->fdt);
--=20
2.51.2


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From: Mykyta Poturai 
To: "xen-devel@lists.xenproject.org" 
CC: Mykyta Poturai , Andrew Cooper
	, Anthony PERARD ,
	Michal Orzel , Jan Beulich , Julien
 Grall , =?iso-8859-1?Q?Roger_Pau_Monn=E9?=
	, Stefano Stabellini , Bertrand
 Marquis , Volodymyr Babchuk
	, Stewart Hildebrand 
Subject: [PATCH v3 0/8] Implement PCI device enumeration on Arm
Thread-Topic: [PATCH v3 0/8] Implement PCI device enumeration on Arm
Thread-Index: AQHcWJBZXXA6diOiFk6VZUR45VGpMw==
Date: Tue, 18 Nov 2025 13:36:32 +0000
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This series adds basic PCI device enumeration in Xen on Arm. This will allo=
w us
to not rely on Dom0 enumeration for supported controllers, which will enabl=
e PCI
passthrough for dom0less setups.

Enumeration is disabled by default and can be enabled with "pci-scan" cmdli=
ne
option.

For now the discovered devices are only assigned to HW domain. To achieve t=
his,
several things need to be done:
1. A VPCI node is created for HW domain device tree, and the real PCI nodes=
 are
hidden from it.
2. Discovered devices BARs are initialized.
3. Register handles for VPCI are updated to change behaviour depending on
whether or not the calling domain uses VPCI or HW PCI, instead of relying o=
n
is_hardware_domain()

Tested on QEMU.
Arm:
* pci-scan=3Dyes pci-passthrough=3Dyes
* pci-scan=3Dno pci-passthrough=3Dyes
* pci-scan=3Dno pci-passthrough=3Dno
X86:
* no special options

v2->v3:
* add arm/pci: Mark pci_host_common_probe as init
* reorder patches
* see individual patches

v1->v2:
* drop xen/pci: disable pci_device_{add,remove} when hwdom uses vpci on arm
* see individual patches


Edward Pickup (1):
  arm/pci: Add pci-scan boot argument

Luca Fancellu (2):
  xen/pci: update DT for hwdom when it uses vpci
  xen/pci: assign discovered devices to hwdom

Mykyta Poturai (2):
  arm/pci: Mark pci_host_common_probe as init
  arm/pci: enable vpci for hwdom when pci-scan is enabled

Stefano Stabellini (1):
  xen/vpci: introduce has_vpci_bridge

Stewart Hildebrand (2):
  xen/dt: pass flags to callback in dt_for_each_range()
  xen/pci: initialize BARs

 docs/misc/xen-command-line.pandoc    |   9 ++
 xen/arch/arm/device.c                |   4 +-
 xen/arch/arm/domain_build.c          | 154 ++++++++++++++++++++++++++-
 xen/arch/arm/include/asm/domain.h    |   3 +-
 xen/arch/arm/include/asm/pci.h       |  10 ++
 xen/arch/arm/include/asm/setup.h     |   2 +-
 xen/arch/arm/pci/pci-host-common.c   | 110 ++++++++++++++++++-
 xen/arch/arm/pci/pci.c               | 139 +++++++++++++++++++++++-
 xen/common/device-tree/device-tree.c |   5 +-
 xen/common/rangeset.c                |  62 ++++++++++-
 xen/drivers/passthrough/arm/iommu.c  |  15 +++
 xen/drivers/passthrough/pci.c        |  11 ++
 xen/drivers/vpci/header.c            |  74 ++++++-------
 xen/drivers/vpci/vpci.c              |   4 +-
 xen/include/xen/device_tree.h        |   2 +-
 xen/include/xen/rangeset.h           |  11 ++
 xen/include/xen/vpci.h               |   8 ++
 17 files changed, 565 insertions(+), 58 deletions(-)

--=20
2.51.2


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On 18.11.2025 13:42, Grygorii Strashko wrote:
> On 17.11.25 18:52, Jan Beulich wrote:
>> On 14.11.2025 15:22, Grygorii Strashko wrote:
>>> --- a/xen/arch/x86/hvm/Kconfig
>>> +++ b/xen/arch/x86/hvm/Kconfig
>>> @@ -35,6 +35,18 @@ config INTEL_VMX
>>>   	  If your system includes a processor with Intel VT-x support, say Y.
>>>   	  If in doubt, say Y.
>>>   
>>> +config VMTRACE
>>> +    bool "HW VM tracing support"
>>> +    depends on INTEL_VMX
>>> +    default y
>>> +    help
>>> +      Enables HW VM tracing support which allows to configure HW processor
>>> +      features (vmtrace_op) to enable capturing information about software
>>> +      execution using dedicated hardware facilities with minimal interference
>>> +      to the software being traced. The trace data can be retrieved using buffer
>>> +      shared between Xen and domain
>>> +      (see XENMEM_acquire_resource(XENMEM_resource_vmtrace_buf)).
>>
>> Please check adjacent options above or ...
>>
>>>   config HVM_FEP
>>>   	bool "HVM Forced Emulation Prefix support (UNSUPPORTED)" if UNSUPPORTED
>>>   	default DEBUG
>>
>> ... below for how proper indentation would look like here.
> 
> There is a mix in Kconfigs - some places  some places  :(
> Will change to 

Any place where only spaces are used is malformed. "help" text with its special
indentation is a separate thing, of course.

>>> --- a/xen/arch/x86/vm_event.c
>>> +++ b/xen/arch/x86/vm_event.c
>>> @@ -253,7 +253,8 @@ void vm_event_fill_regs(vm_event_request_t *req)
>>>       req->data.regs.x86.shadow_gs = ctxt.shadow_gs;
>>>       req->data.regs.x86.dr6 = ctxt.dr6;
>>>   
>>> -    if ( hvm_vmtrace_output_position(curr, &req->data.regs.x86.vmtrace_pos) != 1 )
>>> +    if ( IS_ENABLED(CONFIG_VMTRACE) &&
>>> +         hvm_vmtrace_output_position(curr, &req->data.regs.x86.vmtrace_pos) != 1 )
>>
>> Would be nice if the too-long-line issue here was also address, when the line
>> needs touching anyway.
> 
> I left it as is for better readability as an exception.
> Will below be ok:
> 
>       if ( IS_ENABLED(CONFIG_VMTRACE) &&
> -         hvm_vmtrace_output_position(curr, &req->data.regs.x86.vmtrace_pos) != 1 )
> +         hvm_vmtrace_output_position(curr,
> +                                     &req->data.regs.x86.vmtrace_pos) != 1 )
>           req->data.regs.x86.vmtrace_pos = ~0;

Almost, albeit the off-by-1 indentation may also merely be an effect of your mailer.

Jan


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Subject: Re: [XEN][PATCH v4] xen/x86: guest_access: optimize raw_x_guest() for
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To: Grygorii Strashko 
Cc: Andrew Cooper ,
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On 18.11.2025 14:08, Grygorii Strashko wrote:
> On 17.11.25 18:43, Jan Beulich wrote:
>> On 14.11.2025 15:01, Grygorii Strashko wrote:
>>> --- a/xen/arch/x86/pv/Makefile
>>> +++ b/xen/arch/x86/pv/Makefile
>>> @@ -14,6 +14,10 @@ obj-y += ro-page-fault.o
>>>   obj-$(CONFIG_PV_SHIM) += shim.o
>>>   obj-$(CONFIG_TRACEBUFFER) += trace.o
>>>   obj-y += traps.o
>>> +obj-$(CONFIG_PV) += usercopy.o
>>
>> Just obj-y with the movement.
>>
>> However, is the movement (and was the adding of $(CONFIG_PV) in the earlier
>> version) actually correct? The file also produces copy_{from,to}_unsafe_ll(),
>> which aren't PV-specific. This may be only a latent issue right now, as we
>> have only a single use site of copy_from_unsafe(), but those functions need
>> to remain available. (We may want to arrange for them to be removed when
>> linking, as long as they're not referenced. But that's a separate topic.)
> 
> It is confusing that none of build cfg combinations have failed
> (HVM=y PV=n, HVM=n PV=n) :(
> 
> copy_to_unsafe_ll()
> - called from copy_to_unsafe()
> - copy_to_unsafe() has no users (unreachable, MISRA 2.1?)
> 
> copy_from_unsafe_ll()
> - called from copy_from_unsafe()
> - copy_from_unsafe() called from one place do_invalid_op() with
>    copy_from_unsafe(,, n = sizeof(bug_insn)).
>    Due to __builtin_constant_p(n) check the copy_from_unsafe() call
>    optimized by compiler to
>    get_unsafe_size(*(uint16_t *)to, from, 2, UA_DROP, ret, 2);
> 
> as result copy_from_unsafe_ll() is unreachable also (?).

Yes, these likely all want to become library-like, so they are linked in only
when actually referenced.

> If those function are not subject to be removed, the
>   usercopy.c can't be moved in "x86/pv", Right?

That's my take, yes.

> Making copy_{from,to}_unsafe_ll() available for !PV means
> rewriting usercopy.c in some way, Right?

"Re-writing" is probably too much, but some adjustments would be needed if
you want to keep the "unsafe" functions but compile out the "guest" ones.
It may be possible to compile the file twice, once from x86/pv/ and once
from x86/, replacing the self-#include near the bottom of the file. The
former would then produce the "guest" functions, the latter the "unsafe"
ones.

Jan


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Subject: Re: [PATCH v3 3/8] xen/vpci: introduce has_vpci_bridge
To: Mykyta Poturai ,
 Stefano Stabellini 
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stewart Hildebrand ,
 "xen-devel@lists.xenproject.org" 
References: 
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From: Jan Beulich 
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On 18.11.2025 14:36, Mykyta Poturai wrote:
> From: Stefano Stabellini 
> 
> With Dom0 now being able to use a virtual bridge we need a way to
> distinguish Dom0 using HW bridghe from Dom0 using virtual bridge.
> Introduce a new macro has_vpci_bridge that would determine if a domain
> should be treated as using HW bridge (only Dom0 with pci-scan disabled)
> or as using a virtual one (all DomUs and Dom0 with pci-scan enabled)

Where does the connection of "pci-scan {en,dis}abled" with "kind of bridges
in use" come from? There is a connection for what you're trying to achieve
right now, but this doesn't want setting in stone now, to avoid making it
harder to decouple the two again later.

> --- a/xen/drivers/vpci/header.c
> +++ b/xen/drivers/vpci/header.c
> @@ -230,7 +230,7 @@ bool vpci_process_pending(struct vcpu *v)
>  
>              read_unlock(&v->domain->pci_lock);
>  
> -            if ( !is_hardware_domain(v->domain) )
> +            if ( has_vpci_bridge(v->domain) )
>                  domain_crash(v->domain);

At this example (applies more or less similarly elsewhere as well, and needs
answering separately for every instance), and effectively re-iterating a
point made previously: Why is it the kind of bridges that are used which
determines whether to call domain_crash() here?

Jan


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From: "Teddy Astie" 
Subject: =?utf-8?Q?Re:=20[RFC]=20x86:=20Alternative=20AP=20bringup=20protocol=20(i.e=20SMP=20on=20SEV-ES)?=
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Le 30/10/2025 =C3=A0 18:46, Teddy Astie a =C3=A9crit=C2=A0:
> Hello,
> 
> In order to implement SMP support in SEV-ES, things quickly gets quite
> complicated.
> 
> As a PVH guest under Xen, we have 2 ways of initializing a vCPU (aside
> BSP) :
> - VCPUOP_initialise
> - INIT-SIPI with vLAPIC
> 
> The first one is a hypercall that takes vcpu_hvm_context where provide
> some initial state for the vCPU. The second one works by initializing
> the vCPU at some cs.
> 
> This works, but for instance under SEV-ES (*), the vCPUs state (VMSA)
> must be measured then stays encrypted, which means that we can't set the
> vCPU state once the VM is started; which prevent both of the methods to
> work.
> 
> IOW, all vCPUs state must be known before the guest actually starts
> running (and ideally be defined as a part of boot ABI in order to be
> able to reconstruct the VMSA for remote attestation).
> 
> GHCB specification provide a way to deal with it ([1] SEV-ES GHCB
> standardization 4.3 SMP Booting).
> It is mostly based on a "AP Jump Table" address that can be queried (and
> also modified by inside-guest UEFI firmware) by the guest through a GHCB
> operation to the hypervisor.
> This AP Jump Table is the address of a IP:CS combination that will be
> used to initialize the vCPU (e.g as a part of a long jump instruction
> that the vCPU is initially pointing to).
> 
> But it's UEFI firmware centric, and is still relies on
> hypervisor-specific behaviors. And it relies on the hypervisor to give a
> proper "AP Jump Table" addresses (originally given by guest UEFI
> firmware) which could be tampered (defeating some of the security
> aspects of SEV-ES).
> Another issue is that the CPU initially starts in real mode, which
> complicates the placement of such AP Jump Table.
> 
> Here is a idea on a alternative functionally similar to SEV-ES
> specification but more flexible and somewhat simpler to implement :
> 
> Introduce a new special page "Alternative AP bring-up page" which
> contains some header (similar to vcpu_hvm_x86_64) and some vcpu
> initialization logic that sets up some control registers, EFER, GPR,
> ..., and then long jump to some guest-provided CS:EIP.
> 
> All !BSP vCPUs start at the entry point with a CPU state similar to the
> one defined in direct boot ABI, all vCPUs are initially stopped.
> 
> In order to initialize a vCPU :
> - sets a appropriate vCPU state in bring-up page
> - calls VCPUOP_up on this vCPU
> - wait for vCPU initialization termination
> 
> This is similar to the one proposed in GHCB specification with some
> differences :
> - vCPU starts in protected mode (instead of real mode), which avoids
> some of the AP Jump Table placement restrictions, as we now can put our
> spacial page along the other ones (xenstore, pv console, ...)
> - we avoid potentially complicated initialization trampoline chains
> - we can start the vCPU directly in long mode (from guest PoV) if
> appropriate EFER and control registers values are provided
> 
> And the "AP Jump Table" protocol can still be implemented on top of this
> proposal, given that the guest UEFI firmware supports it.
> 
> Given that this expands some aspects of the "direct boot ABI", I would
> like to gather some feedback on the idea.
> 
> Thanks
> 
> [1]
> https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/spec=
ifications/56421.pdf
> 
> * regarding SEV-SNP, a different (simpler) method for vCPU
> initialization is supported as the guest can directly provide a usable
> VMSA with the entire encrypted state of the vCPU through
> 
> 
> --
> Teddy Astie | Vates XCP-ng Developer
> 
> XCP-ng & Xen Orchestra - Vates solutions
> 
> web: https://vates.tech
> 
> 

Ping.

I still looking for a feedback on this.


--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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Message-ID: <063fbe0f-8ebc-4a13-a65c-c3225c469b16@suse.com>
Date: Tue, 18 Nov 2025 15:41:39 +0100
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Subject: Re: [PATCH v3 6/8] xen/pci: initialize BARs
To: Mykyta Poturai 
Cc: Stewart Hildebrand ,
 Stefano Stabellini , Julien Grall ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Andrew Cooper ,
 Anthony PERARD ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 "xen-devel@lists.xenproject.org" 
References: 
 <20b26b4a3f180139971105ee1b23cc4b0a82092b.1763462211.git.mykyta_poturai@epam.com>
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In-Reply-To: <20b26b4a3f180139971105ee1b23cc4b0a82092b.1763462211.git.mykyta_poturai@epam.com>
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On 18.11.2025 14:36, Mykyta Poturai wrote:
> @@ -232,6 +233,25 @@ static int pci_bus_find_domain_nr(struct dt_device_node *dev)
>      return domain;
>  }
>  
> +static int __init add_bar_range(const struct dt_device_node *dev,
> +                                uint32_t flags, uint64_t addr, uint64_t len,
> +                                void *data)
> +{
> +    struct pci_host_bridge *bridge = data;
> +
> +    /* Ensure we are not using bits in a rangeset */
> +    BUILD_BUG_ON(sizeof(unsigned long) != sizeof(uint64_t));

Can you please help me interpret the comment?

Also, rather than != isn't < sufficient to check for?

> @@ -283,6 +303,18 @@ pci_host_common_probe(struct dt_device_node *dev,
>          bridge->child_ops = &child_ops->pci_ops;
>      }
>  
> +    bridge->bar_ranges = rangeset_new(NULL, "BAR ranges",
> +                                      RANGESETF_prettyprint_hex);
> +    bridge->bar_ranges_prefetch = rangeset_new(NULL,
> +                                               "BAR ranges (prefetchable)",
> +                                               RANGESETF_prettyprint_hex);
> +    if ( bridge->bar_ranges && bridge->bar_ranges_prefetch )
> +    {
> +        err = dt_for_each_range(bridge->dt_node, add_bar_range, bridge);
> +        if ( err )
> +            goto err_child;
> +    }

I'm pretty sure I commented on this already: Without an "else" use sites
of the two rangesets need to have NULL checks added, plus imo there would
want to be a comment here explaining to readers why omitting the "else"
(and hence proper error handling) is okay.

> @@ -476,6 +508,66 @@ bool pci_check_bar(const struct pci_dev *pdev, mfn_t start, mfn_t end)
>  
>      return bar_data.is_valid;
>  }
> +
> +/*
> + * Find suitable place for an uninitialized bar of specified size in the
> + * host bridge ranges
> + */
> +uint64_t __init pci_get_new_bar_addr(const struct pci_dev *pdev, uint64_t size,
> +                                     bool is_64bit, bool prefetch)

Seeing the comment - why only "host bridge"? Especially for Dom0, if other
bridges are present in the system, I think you won't get away without having
a virtual counterpart for evey one of them (or alternatively without hiding
all of them plus the devices behind them).

> +{
> +    struct pci_host_bridge *bridge;
> +    struct rangeset *range;
> +    uint64_t addr = 0, end = GB(4);
> +
> +    /* Make sure we can store addr in a rangeset */
> +    BUILD_BUG_ON(sizeof(addr) != sizeof(unsigned long));

While "store" looks right here, ...

> +    bridge = pci_find_host_bridge(pdev->seg, pdev->bus);
> +    if ( !bridge )
> +        return 0;
> +
> +    range = prefetch ? bridge->bar_ranges_prefetch : bridge->bar_ranges;
> +
> +    if ( size < PAGE_SIZE )
> +        size = PAGE_SIZE;
> +
> +    if ( is_64bit )
> +    {
> +        addr = GB(4);
> +        end = ~0;
> +    }
> +
> +    if ( !rangeset_claim_aligned_range(range, size, &addr, end) )
> +        return addr;
> +
> +    printk(XENLOG_ERR "Failed to claim BAR range %lx-%lx from rangeset\n",
> +           addr, addr + size - 1);
> +
> +    return 0;
> +}
> +
> +/*
> + * Remove already used memory from the host bridge bar ranges
> + */
> +int __init pci_reserve_bar_range(const struct pci_dev *pdev, uint64_t addr,
> +                                 uint64_t size, bool prefetch)
> +{
> +    struct pci_host_bridge *bridge;
> +    struct rangeset *range;
> +
> +    /* Make sure we can store addr in a rangeset */
> +    BUILD_BUG_ON(sizeof(addr) != sizeof(unsigned long));

... it doen't here, as ...

> +    bridge = pci_find_host_bridge(pdev->seg, pdev->bus);
> +    if ( !bridge )
> +        return 0;
> +
> +    range = prefetch ? bridge->bar_ranges_prefetch : bridge->bar_ranges;
> +
> +    return rangeset_remove_range(range, addr, addr + size - 1);

... there's nothing being stored.

But I'm apparently confused in a broader way: Here you remove a range from the
selected rangeset. rangeset_claim_aligned_range() also does so. Why are there
two removals? 

> --- a/xen/arch/arm/pci/pci.c
> +++ b/xen/arch/arm/pci/pci.c
> @@ -95,6 +95,108 @@ boolean_param("pci-passthrough", pci_passthrough_enabled);
>  __ro_after_init bool pci_scan_enabled;
>  boolean_param("pci-scan", pci_scan_enabled);
>  
> +typedef int (*bar_callback_t)(struct pci_dev *, uint8_t, uint64_t, uint64_t,
> +                              bool, bool);

Hmm, okay, you have a typedef now. But ...

> +static int __init reserve_bar_range(struct pci_dev *pdev, uint8_t reg,
> +                                    uint64_t addr, uint64_t size, bool is_64bit,
> +                                    bool prefetch)

... if I altered e.g. this function's signature, ...

> +{
> +    if ( pci_check_bar(pdev, maddr_to_mfn(addr),
> +                       maddr_to_mfn(addr + size - 1)) )
> +        return pci_reserve_bar_range(pdev, addr, size, prefetch);
> +    return 0;
> +}
> +
> +static int __init setup_bar(struct pci_dev *pdev, uint8_t reg, uint64_t addr,
> +                            uint64_t size, bool is_64bit, bool prefetch)
> +{
> +    if ( !pci_check_bar(pdev, maddr_to_mfn(addr),
> +                        maddr_to_mfn(addr + size - 1)) )
> +    {
> +        uint16_t cmd = pci_conf_read16(pdev->sbdf, PCI_COMMAND);
> +
> +        addr = pci_get_new_bar_addr(pdev, size, is_64bit, prefetch);
> +        if ( !addr )
> +            return -ENOMEM;
> +
> +        pci_conf_write16(pdev->sbdf, PCI_COMMAND,
> +                         cmd & ~(PCI_COMMAND_MEMORY | PCI_COMMAND_IO));
> +
> +        pci_conf_write32(pdev->sbdf, reg,
> +                         (addr & GENMASK(31, 0)) |
> +                         (is_64bit ? PCI_BASE_ADDRESS_MEM_TYPE_64 : 0));
> +
> +        if ( is_64bit )
> +            pci_conf_write32(pdev->sbdf, reg + 4, addr >> 32);
> +
> +        pci_conf_write16(pdev->sbdf, PCI_COMMAND, cmd);
> +    }
> +
> +    return 0;
> +}
> +
> +static int __init bars_iterate(struct pci_dev *pdev, void *arg)

... the use of void * here still renders things type-unsafe. Plus you
needlessly introduce function pointer <=> data pointer conversions,
which Misra wants us to avoid. IOW ...

> +{
> +    unsigned int i, barsize, ret = 0, num_bars = PCI_HEADER_NORMAL_NR_BARS;
> +    uint64_t addr, size;
> +    bar_callback_t cb = arg;

... this (bar_callback_t cb) is what the function parameter wants to be.
Ideally though as "bar_callback_t *cb" to not hide the pointer-ness, then
requiring the pointer part to be dropped from the typedef itself.

> +    if ( (pci_conf_read8(pdev->sbdf, PCI_HEADER_TYPE) & 0x7f) ==
> +         PCI_HEADER_TYPE_NORMAL )
> +    {
> +        for ( i = 0; i < num_bars; i += barsize )
> +        {
> +            uint8_t reg = PCI_BASE_ADDRESS_0 + i * 4;
> +            bool prefetch;
> +
> +            if ( (pci_conf_read32(pdev->sbdf, reg) & PCI_BASE_ADDRESS_SPACE) ==
> +                 PCI_BASE_ADDRESS_SPACE_IO )
> +            {
> +                barsize = 1;
> +                continue;
> +            }
> +
> +            barsize = pci_size_mem_bar(pdev->sbdf, reg, &addr, &size,
> +                                       (i == num_bars - 1) ? PCI_BAR_LAST : 0);
> +
> +            if ( !size )
> +                continue;
> +
> +            prefetch = pci_conf_read32(pdev->sbdf, reg) &
> +                       PCI_BASE_ADDRESS_MEM_PREFETCH;
> +
> +            ret = cb(pdev, reg, addr, size, barsize == 2, prefetch);
> +            if ( ret )
> +                return ret;
> +        }
> +    }
> +
> +    return ret;
> +}
> +
> +static int __init pci_setup_bars(void)
> +{
> +    int ret;
> +    /* We can't change the signature of bars_iterate to only accept
> +     * bar_callback_t, so use intermediate variables to ensure callback
> +     * signatures are always correct
> +     */
> +    bar_callback_t cb_reserve = reserve_bar_range;
> +    bar_callback_t cb_setup = setup_bar;

Oh, here you actually fake partial type-safety. This should be dropped.

> @@ -244,8 +241,18 @@ int rangeset_remove_range(
>              destroy_range(r, x);
>      }
>  
> - out:
> +out:

Why are you violating style here? See ./CODING_STYLE, also for other labels
you introduce.

> +    return rc;
> +}
> +
> +int rangeset_remove_range(struct rangeset *r, unsigned long s, unsigned long e)
> +{
> +    int rc = 0;

Pointless initializer.

> +    write_lock(&r->lock);
> +    rc = remove_range(r, s, e);
>      write_unlock(&r->lock);
> +
>      return rc;
>  }
>  
> @@ -357,6 +364,51 @@ int rangeset_claim_range(struct rangeset *r, unsigned long size,
>      return 0;
>  }
>  
> +int rangeset_claim_aligned_range(struct rangeset *r, unsigned long size,
> +                                 unsigned long *s, unsigned long e)
> +{
> +    struct range *x;
> +    int rc = 0;

Again, plus this variable looks to be used only ...

> +    /* Power of 2 check */
> +    if ( (size & (size - 1)) != 0 && size != 0 )
> +    {
> +        *s = 0;
> +        return -EINVAL;
> +    }
> +
> +    if ( e < *s )
> +        return -EINVAL;
> +
> +    write_lock(&r->lock);
> +
> +    for ( x = first_range(r); x; x = next_range(r, x) )
> +    {
> +        /* Assumes size is a power of 2 */
> +        unsigned long start_aligned = ROUNDUP(x->s, size);

I don't think the comment is very useful - you do the necessary check above,
and what is said is an inherent property of ROUNDUP().

> +        if ( x->e > start_aligned &&
> +             (x->e - start_aligned) >= size &&

Remember that x->e is an inclusive upper bound.

> +             start_aligned >= *s &&
> +             start_aligned + size <= e)
> +        {
> +            rc = remove_range(r, start_aligned, start_aligned + size - 1);

... in the narrow scope (so should move here).

> +            if ( !rc )
> +                *s = start_aligned;
> +            else
> +                *s = 0;

Is it reasonably possible to take this path? If not, please add
ASSERT_UNREACHABLE().

> +            write_unlock(&r->lock);

This can move up some, can't it? We want to keep locked regions as narrow as
possible.

> +            return rc;
> +        }
> +    }
> +
> +    *s = 0;
> +
> +    write_unlock(&r->lock);
> +    return -ENOSPC;

Blank line please ahead of the main / final "return" of a function.

> --- a/xen/include/xen/rangeset.h
> +++ b/xen/include/xen/rangeset.h
> @@ -61,6 +61,17 @@ int __must_check rangeset_add_range(
>      struct rangeset *r, unsigned long s, unsigned long e);
>  int __must_check rangeset_claim_range(struct rangeset *r, unsigned long size,
>                                        unsigned long *s);
> +
> +/*
> + * Find a range subset that starts at or after s, ends before e,
> + * and is aligned to the size.

Is "before" correct? Isn't it "at or before", just like for s it's "at or after"?

As to "aligned", nothing contrary being said here I think I ought to be able to
pass e.g. 7. (Tying together size and alignment is suitable for the BAR handling
purpose you have, but is making this new interface pretty much not general-
purpose.)

Jan


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Subject: Re: [PATCH v3 7/8] xen/pci: assign discovered devices to hwdom
To: Mykyta Poturai ,
 Luca Fancellu 
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
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On 18.11.2025 14:36, Mykyta Poturai wrote:
> @@ -1041,6 +1042,12 @@ enum pdev_type pdev_type(u16 seg, u8 bus, u8 devfn)
>      return pos ? DEV_TYPE_PCIe_ENDPOINT : DEV_TYPE_PCI;
>  }
>  
> +static bool __hwdom_init pdev_is_endpoint(const struct pci_dev *pdev)
> +{
> +    enum pdev_type type = pdev_type(pdev->seg, pdev->bus, pdev->devfn);
> +    return type == DEV_TYPE_PCIe_ENDPOINT || type == DEV_TYPE_PCI;

Once again - blank line please before the main return of a function (or, for
that matter, between declaration(s) and statement(s)).

> @@ -1221,6 +1228,10 @@ static int __hwdom_init cf_check _setup_hwdom_pci_devices(
>              if ( !pdev )
>                  continue;
>  
> +            /* Hide real bridges from HWdom when it's using the emulated one */
> +            if ( has_vpci_bridge(hardware_domain) && !pdev_is_endpoint(pdev) )
> +                pci_hide_device(pdev->seg, pdev->bus, pdev->devfn);

As said elsewhere, when you hide bridges without introducing virtual counterparts,
everything behind the bridge also needs hiding.

Jan


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From: Jan Beulich 
Subject: [PATCH 0/8] x86: CPUID leaf 6 consolidation
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Integrate this leaf with CPU policy handling, to leverage the host policy
when feature bits need evaluating.

1: cpu-policy: move invocation of recalculate_misc()
2: cpu-policy: define bits of leaf 6
3: include: de-assemblify cpuid.h
4: replace APERRMPERF synthetic feature bit
5: rename ARAT feature flag
6: Intel: use host CPU policy for ARAT checking
7: cpufreq: use host CPU policy for Turbo checking
8: cpufreq: use host CPU policy in HWP driver

Jan


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From: Jan Beulich 
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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The function is about guest exposure of features / leaves. There's no need
for it to be applied on the host policy. In fact doing so gets in the way
of using the host policy in certain places.

Signed-off-by: Jan Beulich 

--- a/xen/arch/x86/cpu-policy.c
+++ b/xen/arch/x86/cpu-policy.c
@@ -383,7 +383,6 @@ static void __init calculate_host_policy
 
     x86_cpu_featureset_to_policy(boot_cpu_data.x86_capability, p);
     recalculate_xstate(p);
-    recalculate_misc(p);
 
     /* When vPMU is disabled, drop it from the host policy. */
     if ( vpmu_mode == XENPMU_MODE_OFF )
@@ -634,6 +633,7 @@ static void __init calculate_pv_max_poli
     unsigned int i;
 
     *p = host_cpu_policy;
+    recalculate_misc(p);
 
     guest_common_max_leaves(p);
 
@@ -736,6 +736,7 @@ static void __init calculate_hvm_max_pol
     const uint32_t *mask;
 
     *p = host_cpu_policy;
+    recalculate_misc(p);
 
     guest_common_max_leaves(p);
 



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Subject: [PATCH 2/8] x86/cpu-policy: define bits of leaf 6
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... as far as we presently use them in the codebase.

Signed-off-by: Jan Beulich 
---
Or should we make both parts proper featureset elements? At least
APERFMPERF could likely be made visible to guests (in principle).

--- a/xen/include/xen/lib/x86/cpu-policy.h
+++ b/xen/include/xen/lib/x86/cpu-policy.h
@@ -121,7 +121,31 @@ struct cpu_policy
             uint64_t :64, :64; /* Leaf 0x3 - PSN. */
             uint64_t :64, :64; /* Leaf 0x4 - Structured Cache. */
             uint64_t :64, :64; /* Leaf 0x5 - MONITOR. */
-            uint64_t :64, :64; /* Leaf 0x6 - Therm/Perf. */
+
+            /* Leaf 0x6 - Therm/Perf. */
+            struct {
+                uint32_t /* a */:1,
+                    turbo:1,
+                    arat:1,
+                    :4,
+                    hwp:1,
+                    hwp_notification:1,
+                    hwp_activity_window:1,
+                    hwp_epp:1,
+                    hwp_plr:1,
+                    :1,
+                    hdc:1,
+                    :2,
+                    hwp_peci:1,
+                    :2,
+                    hw_feedback:1,
+                    :12;
+                uint32_t /* b */:32;
+                uint32_t /* c */ aperfmperf:1,
+                    :31;
+                uint32_t /* d */:32;
+            } pm;
+
             uint64_t :64, :64; /* Leaf 0x7 - Structured Features. */
             uint64_t :64, :64; /* Leaf 0x8 - rsvd */
             uint64_t :64, :64; /* Leaf 0x9 - DCA */



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Subject: [PATCH 3/8] x86/include: de-assemblify cpuid.h
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
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There's nothing in that header which assembly files would need. Arrange
for cpufeatureset.h to be included directly by cpufeature.h in that case,
allowing respective guarding to be dropped

Signed-off-by: Jan Beulich 

--- a/xen/arch/x86/include/asm/cpufeature.h
+++ b/xen/arch/x86/include/asm/cpufeature.h
@@ -10,7 +10,11 @@
 #include 
 #include 
 
+#ifndef __ASSEMBLY__
 #include 
+#else
+#include 
+#endif
 
 #define cpufeat_word(idx)	((idx) / 32)
 #define cpufeat_bit(idx)	((idx) % 32)
--- a/xen/arch/x86/include/asm/cpuid.h
+++ b/xen/arch/x86/include/asm/cpuid.h
@@ -3,7 +3,6 @@
 
 #include 
 
-#ifndef __ASSEMBLY__
 #include 
 #include 
 #include 
@@ -50,7 +49,6 @@ struct cpuid_leaf;
 void guest_cpuid(const struct vcpu *v, uint32_t leaf,
                  uint32_t subleaf, struct cpuid_leaf *res);
 
-#endif /* __ASSEMBLY__ */
 #endif /* !__X86_CPUID_H__ */
 
 /*



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Subject: [PATCH 4/8] x86: replace APERFMPERF synthetic feature bit
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
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Use the respective host CPU policy bit instead.

Signed-off-by: Jan Beulich 

--- a/xen/arch/x86/cpu/common.c
+++ b/xen/arch/x86/cpu/common.c
@@ -523,10 +523,6 @@ static void generic_identify(struct cpui
 	if ( cpu_has(c, X86_FEATURE_CLFLUSH) )
 		c->x86_clflush_size = ((ebx >> 8) & 0xff) * 8;
 
-	if ( (c->cpuid_level >= CPUID_PM_LEAF) &&
-	     (cpuid_ecx(CPUID_PM_LEAF) & CPUID6_ECX_APERFMPERF_CAPABILITY) )
-		__set_bit(X86_FEATURE_APERFMPERF, c->x86_capability);
-
 	/* AMD-defined flags: level 0x80000001 */
 	if (c->extended_cpuid_level >= 0x80000001)
 		cpuid(0x80000001, &tmp, &tmp,
--- a/xen/arch/x86/include/asm/cpufeature.h
+++ b/xen/arch/x86/include/asm/cpufeature.h
@@ -11,7 +11,9 @@
 #include 
 
 #ifndef __ASSEMBLY__
+#include 
 #include 
+#include 
 #else
 #include 
 #endif
@@ -121,7 +123,6 @@ static inline bool boot_cpu_has(unsigned
 #define CPUID6_EAX_HDC                               BIT(13, U)
 #define CPUID6_EAX_HWP_PECI                          BIT(16, U)
 #define CPUID6_EAX_HW_FEEDBACK                       BIT(19, U)
-#define CPUID6_ECX_APERFMPERF_CAPABILITY             BIT(0, U)
 
 /* CPUID level 0x00000001.edx */
 #define cpu_has_fpu             1
@@ -175,6 +176,9 @@ static inline bool boot_cpu_has(unsigned
 #define cpu_has_fma4            boot_cpu_has(X86_FEATURE_FMA4)
 #define cpu_has_tbm             boot_cpu_has(X86_FEATURE_TBM)
 
+/* CPUID level 0x00000006.ecx */
+#define cpu_has_aperfmperf      host_cpu_policy.basic.pm.aperfmperf
+
 /* CPUID level 0x0000000D:1.eax */
 #define cpu_has_xsaveopt        boot_cpu_has(X86_FEATURE_XSAVEOPT)
 #define cpu_has_xsavec          boot_cpu_has(X86_FEATURE_XSAVEC)
@@ -292,7 +296,6 @@ static inline bool boot_cpu_has(unsigned
 /* Synthesized. */
 #define cpu_has_arch_perfmon    boot_cpu_has(X86_FEATURE_ARCH_PERFMON)
 #define cpu_has_cpuid_faulting  boot_cpu_has(X86_FEATURE_CPUID_FAULTING)
-#define cpu_has_aperfmperf      boot_cpu_has(X86_FEATURE_APERFMPERF)
 #define cpu_has_xen_lbr         boot_cpu_has(X86_FEATURE_XEN_LBR)
 #define cpu_has_xen_shstk       (IS_ENABLED(CONFIG_XEN_SHSTK) && \
                                  boot_cpu_has(X86_FEATURE_XEN_SHSTK))
--- a/xen/arch/x86/include/asm/cpufeatures.h
+++ b/xen/arch/x86/include/asm/cpufeatures.h
@@ -19,7 +19,7 @@ XEN_CPUFEATURE(TSC_RELIABLE,      X86_SY
 XEN_CPUFEATURE(XTOPOLOGY,         X86_SYNTH( 5)) /* cpu topology enum extensions */
 XEN_CPUFEATURE(CPUID_FAULTING,    X86_SYNTH( 6)) /* cpuid faulting */
 XEN_CPUFEATURE(XEN_FRED,          X86_SYNTH( 7)) /* Xen uses FRED */
-XEN_CPUFEATURE(APERFMPERF,        X86_SYNTH( 8)) /* APERFMPERF */
+/* Bit 8 unused */
 XEN_CPUFEATURE(MFENCE_RDTSC,      X86_SYNTH( 9)) /* MFENCE synchronizes RDTSC */
 XEN_CPUFEATURE(XEN_SMEP,          X86_SYNTH(10)) /* SMEP gets used by Xen itself */
 XEN_CPUFEATURE(XEN_SMAP,          X86_SYNTH(11)) /* SMAP gets used by Xen itself */



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Subject: [PATCH 8/8] x86/cpufreq: use host CPU policy in HWP driver
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Jason Andryuk 
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There's no need to invoke CPUID yet another time. This way two of the
static booleans can also go away.

Signed-off-by: Jan Beulich 

--- a/xen/arch/x86/acpi/cpufreq/hwp.c
+++ b/xen/arch/x86/acpi/cpufreq/hwp.c
@@ -18,9 +18,6 @@
 
 static bool __ro_after_init hwp_in_use;
 
-static bool __ro_after_init feature_hwp_notification;
-static bool __ro_after_init feature_hwp_activity_window;
-
 static bool __read_mostly feature_hdc;
 
 static bool __ro_after_init opt_cpufreq_hdc = true;
@@ -165,8 +162,6 @@ bool hwp_active(void)
 
 static bool __init hwp_available(void)
 {
-    unsigned int eax;
-
     if ( boot_cpu_data.cpuid_level < CPUID_PM_LEAF )
     {
         hwp_verbose("cpuid_level (%#x) lacks HWP support\n",
@@ -183,29 +178,25 @@ static bool __init hwp_available(void)
         return false;
     }
 
-    eax = cpuid_eax(CPUID_PM_LEAF);
-
     hwp_verbose("%d notify: %d act-window: %d energy-perf: %d pkg-level: %d peci: %d\n",
-                !!(eax & CPUID6_EAX_HWP),
-                !!(eax & CPUID6_EAX_HWP_NOTIFICATION),
-                !!(eax & CPUID6_EAX_HWP_ACTIVITY_WINDOW),
-                !!(eax & CPUID6_EAX_HWP_ENERGY_PERFORMANCE_PREFERENCE),
-                !!(eax & CPUID6_EAX_HWP_PACKAGE_LEVEL_REQUEST),
-                !!(eax & CPUID6_EAX_HWP_PECI));
+                host_cpu_policy.basic.pm.hwp,
+                host_cpu_policy.basic.pm.hwp_notification,
+                host_cpu_policy.basic.pm.hwp_activity_window,
+                host_cpu_policy.basic.pm.hwp_epp,
+                host_cpu_policy.basic.pm.hwp_plr,
+                host_cpu_policy.basic.pm.hwp_peci);
 
-    if ( !(eax & CPUID6_EAX_HWP) )
+    if ( !host_cpu_policy.basic.pm.hwp )
         return false;
 
-    if ( !(eax & CPUID6_EAX_HWP_ENERGY_PERFORMANCE_PREFERENCE) )
+    if ( !host_cpu_policy.basic.pm.hwp_epp )
     {
         hwp_verbose("disabled: No energy/performance preference available");
 
         return false;
     }
 
-    feature_hwp_notification    = eax & CPUID6_EAX_HWP_NOTIFICATION;
-    feature_hwp_activity_window = eax & CPUID6_EAX_HWP_ACTIVITY_WINDOW;
-    feature_hdc                 = eax & CPUID6_EAX_HDC;
+    feature_hdc                 = host_cpu_policy.basic.pm.hdc;
 
     hwp_verbose("Hardware Duty Cycling (HDC) %ssupported%s\n",
                 feature_hdc ? "" : "not ",
@@ -213,7 +204,7 @@ static bool __init hwp_available(void)
                             : "");
 
     hwp_verbose("HW_FEEDBACK %ssupported\n",
-                (eax & CPUID6_EAX_HW_FEEDBACK) ? "" : "not ");
+                host_cpu_policy.basic.pm.hw_feedback ? "" : "not ");
 
     hwp_in_use = true;
 
@@ -226,7 +217,8 @@ static int cf_check hwp_cpufreq_verify(s
 {
     struct hwp_drv_data *data = per_cpu(hwp_drv_data, policy->cpu);
 
-    if ( !feature_hwp_activity_window && data->activity_window )
+    if ( !host_cpu_policy.basic.pm.hwp_activity_window &&
+         data->activity_window )
     {
         hwp_verbose("HWP activity window not supported\n");
 
@@ -268,7 +260,7 @@ static int cf_check hwp_cpufreq_target(s
     hwp_req.max_perf = data->maximum;
     hwp_req.desired = data->desired;
     hwp_req.energy_perf = data->energy_perf;
-    if ( feature_hwp_activity_window )
+    if ( host_cpu_policy.basic.pm.hwp_activity_window )
         hwp_req.activity_window = data->activity_window;
 
     if ( hwp_req.raw == data->curr_req.raw )
@@ -365,7 +357,7 @@ static void cf_check hwp_init_msrs(void
     }
 
     /* Ensure we don't generate interrupts */
-    if ( feature_hwp_notification )
+    if ( host_cpu_policy.basic.pm.hwp_notification )
         wrmsr_safe(MSR_HWP_INTERRUPT, 0);
 
     if ( !(val & PM_ENABLE_HWP_ENABLE) )
@@ -537,7 +529,8 @@ int get_hwp_para(unsigned int cpu,
         return -ENODATA;
 
     cppc_para->features         =
-        (feature_hwp_activity_window ? XEN_SYSCTL_CPPC_FEAT_ACT_WINDOW : 0);
+        (host_cpu_policy.basic.pm.hwp_activity_window
+         ? XEN_SYSCTL_CPPC_FEAT_ACT_WINDOW : 0);
     cppc_para->lowest           = data->hw.lowest;
     cppc_para->lowest_nonlinear = data->hw.most_efficient;
     cppc_para->nominal          = data->hw.guaranteed;
@@ -585,7 +578,7 @@ int set_hwp_para(struct cpufreq_policy *
 
     /* Clear out activity window if lacking HW supported. */
     if ( (set_cppc->set_params & XEN_SYSCTL_CPPC_SET_ACT_WINDOW) &&
-         !feature_hwp_activity_window )
+         !host_cpu_policy.basic.pm.hwp_activity_window )
     {
         set_cppc->set_params &= ~XEN_SYSCTL_CPPC_SET_ACT_WINDOW;
         cleared_act_window = true;
--- a/xen/arch/x86/include/asm/cpufeature.h
+++ b/xen/arch/x86/include/asm/cpufeature.h
@@ -115,14 +115,6 @@ static inline bool boot_cpu_has(unsigned
 }
 
 #define CPUID_PM_LEAF                                6
-#define CPUID6_EAX_HWP                               BIT(7, U)
-#define CPUID6_EAX_HWP_NOTIFICATION                  BIT(8, U)
-#define CPUID6_EAX_HWP_ACTIVITY_WINDOW               BIT(9, U)
-#define CPUID6_EAX_HWP_ENERGY_PERFORMANCE_PREFERENCE BIT(10, U)
-#define CPUID6_EAX_HWP_PACKAGE_LEVEL_REQUEST         BIT(11, U)
-#define CPUID6_EAX_HDC                               BIT(13, U)
-#define CPUID6_EAX_HWP_PECI                          BIT(16, U)
-#define CPUID6_EAX_HW_FEEDBACK                       BIT(19, U)
 
 /* CPUID level 0x00000001.edx */
 #define cpu_has_fpu             1



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Date: Tue, 18 Nov 2025 15:10:10 +0000
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH 1/8] x86/cpu-policy: move invocation of recalculate_misc()
To: Jan Beulich ,
 "xen-devel@lists.xenproject.org" 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Teddy Astie 
References: <53ef6c9a-1115-4bb4-bb7f-e2595ab9d0b6@suse.com>
 
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On 18/11/2025 3:05 pm, Jan Beulich wrote:
> The function is about guest exposure of features / leaves. There's no need
> for it to be applied on the host policy. In fact doing so gets in the way
> of using the host policy in certain places.
>
> Signed-off-by: Jan Beulich 

Reviewed-by: Andrew Cooper 

I've been meaning to do this for a while.  It has interfered with some
debugging I've done in the past.


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Subject: [PATCH 7/8] x86/cpufreq: use host CPU policy for Turbo checking
From: Jan Beulich 
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There's no need to invoke CPUID yet another time - we assume symmetry
anyway. With symmetry assumed, logging per-CPU also isn't very useful.

Signed-off-by: Jan Beulich 

--- a/xen/arch/x86/acpi/cpufreq/acpi.c
+++ b/xen/arch/x86/acpi/cpufreq/acpi.c
@@ -220,14 +220,11 @@ static unsigned int cf_check get_cur_fre
 
 void intel_feature_detect(struct cpufreq_policy *policy)
 {
-    unsigned int eax;
-
-    eax = cpuid_eax(6);
-    if (eax & 0x2) {
+    if ( cpu_has_turbo )
+    {
         policy->turbo = CPUFREQ_TURBO_ENABLED;
-        if (cpufreq_verbose)
-            printk(XENLOG_INFO "CPU%u: Turbo Mode detected and enabled\n",
-                   smp_processor_id());
+        if ( cpufreq_verbose )
+            printk_once(XENLOG_INFO "Turbo Mode detected and enabled\n");
     }
 }
 
--- a/xen/arch/x86/include/asm/cpufeature.h
+++ b/xen/arch/x86/include/asm/cpufeature.h
@@ -177,6 +177,7 @@ static inline bool boot_cpu_has(unsigned
 #define cpu_has_tbm             boot_cpu_has(X86_FEATURE_TBM)
 
 /* CPUID level 0x00000006.eax */
+#define cpu_has_turbo           host_cpu_policy.basic.pm.turbo
 #define cpu_has_arat            host_cpu_policy.basic.pm.arat
 
 /* CPUID level 0x00000006.ecx */



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Subject: [PATCH 5/8] x86: rename ARAT feature flag
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
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Add a XEN infix, to properly distinguish it from the CPUID feature flag
(leaf 6 EAX bit 2).

Signed-off-by: Jan Beulich 
---
Question is whether we still need opt_arat (and the command line option),
or whether we could go directly from the CPUID bit (overriding it to on
for older AMD [and Hygon?] CPUs). Or whether to have opt_arat affect the
(host) CPU policy directly.

--- a/xen/arch/x86/acpi/cpu_idle.c
+++ b/xen/arch/x86/acpi/cpu_idle.c
@@ -109,7 +109,7 @@ void (*__read_mostly lapic_timer_on)(voi
 
 bool lapic_timer_init(void)
 {
-    if ( boot_cpu_has(X86_FEATURE_ARAT) )
+    if ( boot_cpu_has(X86_FEATURE_XEN_ARAT) )
     {
         lapic_timer_off = lapic_timer_nop;
         lapic_timer_on = lapic_timer_nop;
@@ -1463,7 +1463,7 @@ static void amd_cpuidle_init(struct acpi
 
         if ( !vendor_override )
         {
-            if ( !boot_cpu_has(X86_FEATURE_ARAT) )
+            if ( !boot_cpu_has(X86_FEATURE_XEN_ARAT) )
                 hpet_broadcast_init();
 
             if ( !lapic_timer_init() )
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -1355,7 +1355,7 @@ static void cf_check init_amd(struct cpu
 	 * running in deep C states.
 	 */
 	if ( opt_arat && c->x86 > 0x11 )
-		__set_bit(X86_FEATURE_ARAT, c->x86_capability);
+		__set_bit(X86_FEATURE_XEN_ARAT, c->x86_capability);
 
 	/*
 	 * Prior to Family 0x14, perf counters are not reset during warm reboot.
--- a/xen/arch/x86/cpu/hygon.c
+++ b/xen/arch/x86/cpu/hygon.c
@@ -76,7 +76,7 @@ static void cf_check init_hygon(struct c
 
 	/* Hygon processors have APIC timer running in deep C states. */
 	if (opt_arat)
-		__set_bit(X86_FEATURE_ARAT, c->x86_capability);
+		__set_bit(X86_FEATURE_XEN_ARAT, c->x86_capability);
 
 	if (cpu_has(c, X86_FEATURE_EFRO)) {
 		rdmsrl(MSR_K8_HWCR, value);
--- a/xen/arch/x86/cpu/intel.c
+++ b/xen/arch/x86/cpu/intel.c
@@ -668,7 +668,7 @@ static void cf_check init_intel(struct c
 	if ( opt_arat &&
 	     ( c->cpuid_level >= 0x00000006 ) &&
 	     ( cpuid_eax(0x00000006) & (1u<<2) ) )
-		__set_bit(X86_FEATURE_ARAT, c->x86_capability);
+		__set_bit(X86_FEATURE_XEN_ARAT, c->x86_capability);
 
 	if ((opt_cpu_info && !(c->apicid & (c->x86_num_siblings - 1))) ||
 	    c == &boot_cpu_data )
--- a/xen/arch/x86/cpu/mwait-idle.c
+++ b/xen/arch/x86/cpu/mwait-idle.c
@@ -1633,7 +1633,7 @@ static int __init mwait_idle_probe(void)
 	icpu = id->driver_data;
 	cpuidle_state_table = icpu->state_table;
 
-	if (boot_cpu_has(X86_FEATURE_ARAT))
+	if (boot_cpu_has(X86_FEATURE_XEN_ARAT))
 		lapic_timer_reliable_states = LAPIC_TIMER_ALWAYS_RELIABLE;
 
 	pr_debug(PREFIX "v" MWAIT_IDLE_VERSION " model %#x\n",
@@ -1792,7 +1792,7 @@ int __init mwait_idle_init(struct notifi
 		return -ENODEV;
 
 	err = mwait_idle_probe();
-	if (!err && !boot_cpu_has(X86_FEATURE_ARAT)) {
+	if (!err && !boot_cpu_has(X86_FEATURE_XEN_ARAT)) {
 		hpet_broadcast_init();
 		if (xen_cpuidle < 0 && !hpet_broadcast_is_available())
 			err = -ENODEV;
--- a/xen/arch/x86/include/asm/cpufeatures.h
+++ b/xen/arch/x86/include/asm/cpufeatures.h
@@ -13,7 +13,7 @@
 /* Synthetic features */
 XEN_CPUFEATURE(CONSTANT_TSC,      X86_SYNTH( 0)) /* TSC ticks at a constant rate */
 XEN_CPUFEATURE(NONSTOP_TSC,       X86_SYNTH( 1)) /* TSC does not stop in C states */
-XEN_CPUFEATURE(ARAT,              X86_SYNTH( 2)) /* Always running APIC timer */
+XEN_CPUFEATURE(XEN_ARAT,          X86_SYNTH( 2)) /* Xen may utilize always running APIC timer */
 XEN_CPUFEATURE(ARCH_PERFMON,      X86_SYNTH( 3)) /* Intel Architectural PerfMon */
 XEN_CPUFEATURE(TSC_RELIABLE,      X86_SYNTH( 4)) /* TSC is known to be reliable */
 XEN_CPUFEATURE(XTOPOLOGY,         X86_SYNTH( 5)) /* cpu topology enum extensions */
--- a/xen/arch/x86/time.c
+++ b/xen/arch/x86/time.c
@@ -2642,7 +2642,7 @@ static int _disable_pit_irq(bool init)
      * XXX dom0 may rely on RTC interrupt delivery, so only enable
      * hpet_broadcast if FSB mode available or if force_hpet_broadcast.
      */
-    if ( cpuidle_using_deep_cstate() && !boot_cpu_has(X86_FEATURE_ARAT) )
+    if ( cpuidle_using_deep_cstate() && !boot_cpu_has(X86_FEATURE_XEN_ARAT) )
     {
         init ? hpet_broadcast_init() : hpet_broadcast_resume();
         if ( !hpet_broadcast_is_available() )



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Subject: [PATCH 6/8] x86/Intel: use host CPU policy for ARAT checking
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
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There's no need to invoke CPUID yet another time. However, as the host CPU
policy is set up only shortly after init_intel() ran on the BSP, defer the
logic to a pre-SMP initcall. This can't be (a new) one in cpu/intel.c
though, as that's linked after acpi/cpu_idle.c (which is where we already
need the feature set). Since opt_arat is local to the cpu/ subtree,
introduce a new Intel-specific helper to hold the code needed.

Further, as we assume symmetry anyway, use setup_force_cpu_cap() and hence
limit the checking to the boot CPU.

Signed-off-by: Jan Beulich 
---
The need to move where cpu_has_arat is checked would go away if we did
away with opt_arat (as mentioned in the previous patch), and hence could
use cpu_has_arat directly where right now XEN_ARAT is checked.

--- a/xen/arch/x86/acpi/cpu_idle.c
+++ b/xen/arch/x86/acpi/cpu_idle.c
@@ -1666,6 +1666,9 @@ static int __init cf_check cpuidle_presm
 {
     void *cpu = (void *)(long)smp_processor_id();
 
+    if ( boot_cpu_data.vendor == X86_VENDOR_INTEL )
+        intel_init_arat();
+
     if ( !xen_cpuidle )
         return 0;
 
--- a/xen/arch/x86/cpu/intel.c
+++ b/xen/arch/x86/cpu/intel.c
@@ -665,10 +665,6 @@ static void cf_check init_intel(struct c
 		__set_bit(X86_FEATURE_NONSTOP_TSC, c->x86_capability);
 		__set_bit(X86_FEATURE_TSC_RELIABLE, c->x86_capability);
 	}
-	if ( opt_arat &&
-	     ( c->cpuid_level >= 0x00000006 ) &&
-	     ( cpuid_eax(0x00000006) & (1u<<2) ) )
-		__set_bit(X86_FEATURE_XEN_ARAT, c->x86_capability);
 
 	if ((opt_cpu_info && !(c->apicid & (c->x86_num_siblings - 1))) ||
 	    c == &boot_cpu_data )
@@ -690,3 +686,9 @@ const struct cpu_dev __initconst_cf_clob
 	.c_early_init	= early_init_intel,
 	.c_init		= init_intel,
 };
+
+void __init intel_init_arat(void)
+{
+    if ( opt_arat && cpu_has_arat )
+        setup_force_cpu_cap(X86_FEATURE_XEN_ARAT);
+}
--- a/xen/arch/x86/include/asm/cpufeature.h
+++ b/xen/arch/x86/include/asm/cpufeature.h
@@ -176,6 +176,9 @@ static inline bool boot_cpu_has(unsigned
 #define cpu_has_fma4            boot_cpu_has(X86_FEATURE_FMA4)
 #define cpu_has_tbm             boot_cpu_has(X86_FEATURE_TBM)
 
+/* CPUID level 0x00000006.eax */
+#define cpu_has_arat            host_cpu_policy.basic.pm.arat
+
 /* CPUID level 0x00000006.ecx */
 #define cpu_has_aperfmperf      host_cpu_policy.basic.pm.aperfmperf
 
--- a/xen/arch/x86/include/asm/processor.h
+++ b/xen/arch/x86/include/asm/processor.h
@@ -102,6 +102,7 @@ extern void setup_force_cpu_cap(unsigned
 extern bool is_forced_cpu_cap(unsigned int cap);
 extern void print_cpu_info(unsigned int cpu);
 extern void init_intel_cacheinfo(struct cpuinfo_x86 *c);
+extern void intel_init_arat(void);
 
 #define cpu_to_core(_cpu)   (cpu_data[_cpu].cpu_core_id)
 #define cpu_to_socket(_cpu) (cpu_data[_cpu].phys_proc_id)



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Subject: Re: [for 4.22 v5 10/18] xen/riscv: implement p2m_set_range()
To: Jan Beulich 
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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From: Oleksii Kurochko 
In-Reply-To: <31c69c86-46ba-4670-b265-10baa0001f85@suse.com>

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On 11/17/25 9:56 AM, Jan Beulich wrote:
>>>> +#define P2M_MAX_ROOT_LEVEL 4
>>>> +
>>>> +#define P2M_DECLARE_OFFSETS(var, addr) \
>>>> +    unsigned int var[P2M_MAX_ROOT_LEVEL] = {-1};\
>>>> +    for ( unsigned int i = 0; i <= gstage_root_level; i++ ) \
>>>> +        var[i] = calc_offset(i, addr);
>>> This surely is more than just "declare", and it's dealing with all levels no
>>> matter whether you actually will use all offsets.
>> I will rename|P2M_DECLARE_OFFSETS| to|P2M_BUILD_LEVEL_OFFSETS()|.
>>
>> But how can I know which offset I will actually need to use?
>> If we take the following loop as an example:
>>     |for( level = P2M_ROOT_LEVEL; level > target; level-- ) { ||/* ||* 
>> Don't try to allocate intermediate page tables if the mapping ||* is 
>> about to be removed. ||*/ ||rc = p2m_next_level(p2m, 
>> !removing_mapping, ||level, &table, offsets[level]); ||... ||} |It 
>> walks from|P2M_ROOT_LEVEL| down to|target|, where|target| is determined at runtime.
>>
>> If you mean that, for example, when the G-stage mode is Sv39, there is no need to allocate
>> an array with 4 entries (or 5 entries if we consider Sv57, so P2M_MAX_ROOT_LEVEL should be
>> updated), because Sv39 only uses 3 page table levels — then yes, in theory it could be
>> smaller. But I don't think it is a real issue if the|offsets[]| array on the stack has a
>> few extra unused entries.
>>
>> If preferred, Icould allocate the array dynamically based on|gstage_root_level|.
>> Would that be better?
> Having a few unused entries isn't a big deal imo. What I'm not happy with here is
> that you may_initialize_ more entries than actually needed. I have no good
> suggestion within the conceptual framework you use for page walking (the same
> issue iirc exists in host page table walks, just that the calculations there are
> cheaper).

The loop inside|P2M_DECLARE_OFFSETS()| uses|gstage_root_level|, so only the entries that
are actually going to be used are initialized.

You probably mean that it’s possible we don’t need to walk all the tables because a
leaf page-table entry appears earlier than the L0 page table for some gfns? IMO, it’s not
really a big deal, because at worst we just spend some time calculating something that
isn’t actually needed, but considering that it will be just extra 2 calls in the worst case
(when mapping is 1g, for no reason we calculated offsets for L1 and L0) of calc_offset()
it won't affect performance too much.

~ Oleksii

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On 11/17/25 9:56 AM, Jan Beulich wrote:

    

    

      
+#define P2M_MAX_ROOT_LEVEL 4
+
+#define P2M_DECLARE_OFFSETS(var, addr) \
+    unsigned int var[P2M_MAX_ROOT_LEVEL] = {-1};\
+    for ( unsigned int i = 0; i <= gstage_root_level; i++ ) \
+        var[i] = calc_offset(i, addr);

This surely is more than just "declare", and it's dealing with all levels no
matter whether you actually will use all offsets.

I will rename|P2M_DECLARE_OFFSETS| to|P2M_BUILD_LEVEL_OFFSETS()|.

But how can I know which offset I will actually need to use?
If we take the following loop as an example:
   |for( level = P2M_ROOT_LEVEL; level > target; level-- ) { ||/* ||* Don't try to allocate intermediate page tables if the mapping ||* is about to be removed. ||*/ ||rc = p2m_next_level(p2m, !removing_mapping, ||level, &table, offsets[level]); ||... ||} |It walks from|P2M_ROOT_LEVEL| down to|target|, where|target| is determined at runtime.

If you mean that, for example, when the G-stage mode is Sv39, there is no need to allocate
an array with 4 entries (or 5 entries if we consider Sv57, so P2M_MAX_ROOT_LEVEL should be
updated), because Sv39 only uses 3 page table levels — then yes, in theory it could be
smaller. But I don't think it is a real issue if the|offsets[]| array on the stack has a
few extra unused entries.

If preferred, Icould allocate the array dynamically based on|gstage_root_level|.
Would that be better?

Having a few unused entries isn't a big deal imo. What I'm not happy with here is
that you may _initialize_ more entries than actually needed. I have no good
suggestion within the conceptual framework you use for page walking (the same
issue iirc exists in host page table walks, just that the calculations there are
cheaper).

    

    
The loop inside P2M_DECLARE_OFFSETS() uses gstage_root_level, so only the entries that
are actually going to be used are initialized.

You probably mean that it’s possible we don’t need to walk all the tables because a
leaf page-table entry appears earlier than the L0 page table for some gfns? IMO, it’s not
really a big deal, because at worst we just spend some time calculating something that
isn’t actually needed, but considering that it will be just extra 2 calls in the worst case
(when mapping is 1g, for no reason we calculated offsets for L1 and L0) of calc_offset()
it won't affect performance too much.

~ Oleksii

  


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Date: Tue, 18 Nov 2025 15:30:18 +0000
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Subject: Re: [PATCH 2/8] x86/cpu-policy: define bits of leaf 6
To: Jan Beulich ,
 "xen-devel@lists.xenproject.org" 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Teddy Astie 
References: <53ef6c9a-1115-4bb4-bb7f-e2595ab9d0b6@suse.com>
 
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On 18/11/2025 3:06 pm, Jan Beulich wrote:
> ... as far as we presently use them in the codebase.
>
> Signed-off-by: Jan Beulich 
> ---
> Or should we make both parts proper featureset elements? At least
> APERFMPERF could likely be made visible to guests (in principle).

As before, A/MPERF can't be used safely by a VM.

In order to be persuaded to offer this to VMs, someone is going to have
to present a mechanism for how a VM could even figure out that it read
junk from the regsiters...

>
> --- a/xen/include/xen/lib/x86/cpu-policy.h
> +++ b/xen/include/xen/lib/x86/cpu-policy.h
> @@ -121,7 +121,31 @@ struct cpu_policy
>              uint64_t :64, :64; /* Leaf 0x3 - PSN. */
>              uint64_t :64, :64; /* Leaf 0x4 - Structured Cache. */
>              uint64_t :64, :64; /* Leaf 0x5 - MONITOR. */
> -            uint64_t :64, :64; /* Leaf 0x6 - Therm/Perf. */
> +
> +            /* Leaf 0x6 - Therm/Perf. */
> +            struct {
> +                uint32_t /* a */:1,
> +                    turbo:1,
> +                    arat:1,
> +                    :4,
> +                    hwp:1,
> +                    hwp_notification:1,
> +                    hwp_activity_window:1,
> +                    hwp_epp:1,
> +                    hwp_plr:1,
> +                    :1,
> +                    hdc:1,
> +                    :2,
> +                    hwp_peci:1,
> +                    :2,
> +                    hw_feedback:1,
> +                    :12;
> +                uint32_t /* b */:32;
> +                uint32_t /* c */ aperfmperf:1,
> +                    :31;
> +                uint32_t /* d */:32;

Elsewhere, single bit fields are bool foo:1, and these want to match for
consistency.  In particular using uint32_t:1 creates a latent bug in
patch 8.

One problem with bool bitfields is that your :4 needs to become 4x :1. 
Right now his hidden in the macros that gen-cpuid.py makes.

Given that b is of type uint32_t, you can omit the :12 from the end of a
and leave a comment.  Similarly, the trailing :31 on c can be dropped.

> +            } pm;

Nothing else is sub-scoped.  I'd prefer that you drop the 'pm'.

~Andrew


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On 18/11/2025 3:06 pm, Jan Beulich wrote:
> There's nothing in that header which assembly files would need. Arrange
> for cpufeatureset.h to be included directly by cpufeature.h in that case,
> allowing respective guarding to be dropped

Missing full stop.

>
> Signed-off-by: Jan Beulich 

Acked-by: Andrew Cooper 


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From: Mykola Kvach 
To: xen-devel@lists.xenproject.org
Cc: Mykola Kvach ,
	Anthony PERARD ,
	Juergen Gross 
Subject: [PATCH v14 2/4] tools/xl: Allow compilation of 'xl resume' command on Arm
Date: Tue, 18 Nov 2025 17:37:29 +0200
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From: Mykola Kvach 

The "xl resume" command was previously excluded from Arm builds because
system suspend/resume (e.g., SYSTEM_SUSPEND via vPSCI) was not
implemented. On x86, this command is used for resume.

This change enables compilation of `xl resume` on Arm regardless of the
underlying implementation status, making the tool available for testing
and future feature support. The relevant libxl infrastructure and handler
functions are already present and usable.

Note: This does not imply full system suspend/resume support on Arm.
      The `xl suspend` command still does not work on Arm platforms.

Signed-off-by: Mykola Kvach 
Acked-by: Anthony PERARD 
---
Changes in v14:
- no chnages
---
 tools/include/libxl.h     |  1 -
 tools/xl/xl.h             |  4 ++--
 tools/xl/xl_cmdtable.c    |  4 ++--
 tools/xl/xl_migrate.c     |  2 +-
 tools/xl/xl_saverestore.c |  2 +-
 tools/xl/xl_vmcontrol.c   | 12 ++++++------
 6 files changed, 12 insertions(+), 13 deletions(-)

diff --git a/tools/include/libxl.h b/tools/include/libxl.h
index bc35e412da..14b9e4a859 100644
--- a/tools/include/libxl.h
+++ b/tools/include/libxl.h
@@ -1145,7 +1145,6 @@ typedef struct libxl__ctx libxl_ctx;
  * restoring or migrating a domain. In this case the related functions
  * should be expected to return failure. That is:
  *  - libxl_domain_suspend
- *  - libxl_domain_resume
  *  - libxl_domain_remus_start
  */
 #if defined(__arm__) || defined(__aarch64__)
diff --git a/tools/xl/xl.h b/tools/xl/xl.h
index 9000df00de..63db30a6eb 100644
--- a/tools/xl/xl.h
+++ b/tools/xl/xl.h
@@ -65,7 +65,7 @@ static const char migrate_permission_to_go[]=
     "domain is yours, you are cleared to unpause";
 static const char migrate_report[]=
     "my copy unpause results are as follows";
-#endif
+#endif /* !LIBXL_HAVE_NO_SUSPEND_RESUME */
 
   /* followed by one byte:
    *     0: everything went well, domain is running
@@ -130,8 +130,8 @@ int main_migrate_receive(int argc, char **argv);
 int main_save(int argc, char **argv);
 int main_migrate(int argc, char **argv);
 int main_suspend(int argc, char **argv);
+#endif /* !LIBXL_HAVE_NO_SUSPEND_RESUME */
 int main_resume(int argc, char **argv);
-#endif
 int main_dump_core(int argc, char **argv);
 int main_pause(int argc, char **argv);
 int main_unpause(int argc, char **argv);
diff --git a/tools/xl/xl_cmdtable.c b/tools/xl/xl_cmdtable.c
index 06a0039718..bcb2d233cc 100644
--- a/tools/xl/xl_cmdtable.c
+++ b/tools/xl/xl_cmdtable.c
@@ -198,12 +198,12 @@ const struct cmd_spec cmd_table[] = {
       "Suspend a domain to RAM",
       "",
     },
+#endif /* !LIBXL_HAVE_NO_SUSPEND_RESUME */
     { "resume",
       &main_resume, 0, 1,
       "Resume a domain from RAM",
       "",
     },
-#endif
     { "dump-core",
       &main_dump_core, 0, 1,
       "Core dump a domain",
@@ -548,7 +548,7 @@ const struct cmd_spec cmd_table[] = {
       "                        checkpoint must be disabled.\n"
       "-p                      Use COLO userspace proxy."
     },
-#endif
+#endif /* !LIBXL_HAVE_NO_SUSPEND_RESUME */
     { "devd",
       &main_devd, 0, 1,
       "Daemon that listens for devices and launches backends",
diff --git a/tools/xl/xl_migrate.c b/tools/xl/xl_migrate.c
index b8594f44a5..4b4a379aa1 100644
--- a/tools/xl/xl_migrate.c
+++ b/tools/xl/xl_migrate.c
@@ -767,7 +767,7 @@ int main_remus(int argc, char **argv)
     close(send_fd);
     return EXIT_FAILURE;
 }
-#endif
+#endif /* !LIBXL_HAVE_NO_SUSPEND_RESUME */
 
 
 /*
diff --git a/tools/xl/xl_saverestore.c b/tools/xl/xl_saverestore.c
index 953d791d1a..747094ec7b 100644
--- a/tools/xl/xl_saverestore.c
+++ b/tools/xl/xl_saverestore.c
@@ -270,7 +270,7 @@ int main_save(int argc, char **argv)
     return EXIT_SUCCESS;
 }
 
-#endif /* LIBXL_HAVE_NO_SUSPEND_RESUME */
+#endif /* !LIBXL_HAVE_NO_SUSPEND_RESUME */
 
 
 
diff --git a/tools/xl/xl_vmcontrol.c b/tools/xl/xl_vmcontrol.c
index c813732838..93766f631b 100644
--- a/tools/xl/xl_vmcontrol.c
+++ b/tools/xl/xl_vmcontrol.c
@@ -38,11 +38,6 @@ static void suspend_domain(uint32_t domid)
     libxl_domain_suspend_only(ctx, domid, NULL);
 }
 
-static void resume_domain(uint32_t domid)
-{
-    libxl_domain_resume(ctx, domid, 1, NULL);
-}
-
 int main_suspend(int argc, char **argv)
 {
     int opt;
@@ -55,6 +50,12 @@ int main_suspend(int argc, char **argv)
 
     return EXIT_SUCCESS;
 }
+#endif /* !LIBXL_HAVE_NO_SUSPEND_RESUME */
+
+static void resume_domain(uint32_t domid)
+{
+    libxl_domain_resume(ctx, domid, 1, NULL);
+}
 
 int main_resume(int argc, char **argv)
 {
@@ -68,7 +69,6 @@ int main_resume(int argc, char **argv)
 
     return EXIT_SUCCESS;
 }
-#endif
 
 static void pause_domain(uint32_t domid)
 {
-- 
2.43.0



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From: Mykola Kvach 
To: xen-devel@lists.xenproject.org
Cc: Mykola Kvach ,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk ,
	Andrew Cooper ,
	Anthony PERARD ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v14 1/4] xen/arm: Implement PSCI SYSTEM_SUSPEND call for guests
Date: Tue, 18 Nov 2025 17:37:28 +0200
Message-ID: <3786204d034ae4461aa0fde77771b8e14256314a.1763479083.git.xakep.amatop@gmail.com>
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From: Mykola Kvach 

Add support for the PSCI SYSTEM_SUSPEND function in the vPSCI interface,
allowing guests to request suspend via the PSCI v1.0+ SYSTEM_SUSPEND call
(both 32-bit and 64-bit variants).

Implementation details:
- Add SYSTEM_SUSPEND function IDs to PSCI definitions
- Trap and handle SYSTEM_SUSPEND in vPSCI
- Allow only non-hardware domains to invoke SYSTEM_SUSPEND; return
  PSCI_NOT_SUPPORTED for the hardware domain to avoid halting the system
  in hwdom_shutdown() via domain_shutdown
- Require all secondary VCPUs of the calling domain to be offline before
  suspend, as mandated by the PSCI specification

The arch_domain_resume() function is an architecture-specific hook that is
invoked during domain resume to perform any necessary setup or restoration
steps required by the platform.

The new vpsci_vcpu_up_prepare() helper is called on the resume path to set up
the vCPU context (such as entry point, some system regs and context ID) before
resuming a suspended guest. This keeps ARM/vPSCI-specific logic out of common
code and avoids intrusive changes to the generic resume flow.

Usage:

For Linux-based guests, suspend can be initiated with:
    echo mem > /sys/power/state
or via:
    systemctl suspend

Resuming the guest is performed from control domain using:
      xl resume 

Signed-off-by: Mykola Kvach 
---
Changes in V14:
- move arch_domain_resume to a separate header
- avoid usage of typeof for context struct
- moved error printing from domain_resume to arch_domain_resume
  in order to simplify common parts of code
- minor changes after review
---
 xen/arch/arm/domain.c                 |  41 +++++++++
 xen/arch/arm/include/asm/domain.h     |   2 +
 xen/arch/arm/include/asm/perfc_defn.h |   1 +
 xen/arch/arm/include/asm/psci.h       |   2 +
 xen/arch/arm/include/asm/suspend.h    |  24 ++++++
 xen/arch/arm/include/asm/vpsci.h      |   5 +-
 xen/arch/arm/vpsci.c                  | 116 +++++++++++++++++++++-----
 xen/common/domain.c                   |   5 ++
 xen/include/xen/suspend.h             |  15 ++++
 9 files changed, 189 insertions(+), 22 deletions(-)
 create mode 100644 xen/arch/arm/include/asm/suspend.h
 create mode 100644 xen/include/xen/suspend.h

diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
index e36719bce4..3c0170480b 100644
--- a/xen/arch/arm/domain.c
+++ b/xen/arch/arm/domain.c
@@ -12,6 +12,8 @@
 #include 
 #include 
 
+#include 
+
 #include 
 #include 
 #include 
@@ -24,10 +26,12 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include "vpci.h"
@@ -885,6 +889,43 @@ void arch_domain_creation_finished(struct domain *d)
     p2m_domain_creation_finished(d);
 }
 
+int arch_domain_resume(struct domain *d)
+{
+    int rc;
+    struct resume_info *ctx = &d->arch.resume_ctx;
+
+    if ( !d->is_shutting_down || d->shutdown_code != SHUTDOWN_suspend )
+    {
+        dprintk(XENLOG_WARNING,
+                "%pd: Invalid domain state for resume: is_shutting_down=%d, shutdown_code=%d\n",
+                d, d->is_shutting_down, d->shutdown_code);
+        return -EINVAL;
+    }
+
+    /*
+     * It is still possible to call domain_shutdown() with a suspend reason
+     * via some hypercalls, such as SCHEDOP_shutdown or SCHEDOP_remote_shutdown.
+     * In these cases, the resume context will be empty.
+     * This is not expected to cause any issues, so we just warn about the
+     * situation and return without error, allowing the existing logic to
+     * proceed as expected.
+     */
+    if ( !ctx->wake_cpu )
+    {
+        dprintk(XENLOG_INFO, "%pd: Wake CPU pointer context was not provided\n",
+                d);
+        return 0;
+    }
+
+    rc = vpsci_vcpu_up_prepare(ctx->wake_cpu , ctx->ep, ctx->cid);
+    if ( rc )
+        printk("%pd: Failed to resume domain (ret %d)\n", d, rc);
+
+    memset(ctx, 0, sizeof(*ctx));
+
+    return rc;
+}
+
 static int is_guest_pv32_psr(uint32_t psr)
 {
     switch (psr & PSR_MODE_MASK)
diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h
index af3e168374..e637cb4de0 100644
--- a/xen/arch/arm/include/asm/domain.h
+++ b/xen/arch/arm/include/asm/domain.h
@@ -5,6 +5,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -126,6 +127,7 @@ struct arch_domain
     void *sci_data;
 #endif
 
+    struct resume_info resume_ctx;
 }  __cacheline_aligned;
 
 struct arch_vcpu
diff --git a/xen/arch/arm/include/asm/perfc_defn.h b/xen/arch/arm/include/asm/perfc_defn.h
index effd25b69e..8dfcac7e3b 100644
--- a/xen/arch/arm/include/asm/perfc_defn.h
+++ b/xen/arch/arm/include/asm/perfc_defn.h
@@ -33,6 +33,7 @@ PERFCOUNTER(vpsci_system_reset,        "vpsci: system_reset")
 PERFCOUNTER(vpsci_cpu_suspend,         "vpsci: cpu_suspend")
 PERFCOUNTER(vpsci_cpu_affinity_info,   "vpsci: cpu_affinity_info")
 PERFCOUNTER(vpsci_features,            "vpsci: features")
+PERFCOUNTER(vpsci_system_suspend,      "vpsci: system_suspend")
 
 PERFCOUNTER(vcpu_kick,                 "vcpu: notify other vcpu")
 
diff --git a/xen/arch/arm/include/asm/psci.h b/xen/arch/arm/include/asm/psci.h
index 4780972621..48a93e6b79 100644
--- a/xen/arch/arm/include/asm/psci.h
+++ b/xen/arch/arm/include/asm/psci.h
@@ -47,10 +47,12 @@ void call_psci_system_reset(void);
 #define PSCI_0_2_FN32_SYSTEM_OFF          PSCI_0_2_FN32(8)
 #define PSCI_0_2_FN32_SYSTEM_RESET        PSCI_0_2_FN32(9)
 #define PSCI_1_0_FN32_PSCI_FEATURES       PSCI_0_2_FN32(10)
+#define PSCI_1_0_FN32_SYSTEM_SUSPEND      PSCI_0_2_FN32(14)
 
 #define PSCI_0_2_FN64_CPU_SUSPEND         PSCI_0_2_FN64(1)
 #define PSCI_0_2_FN64_CPU_ON              PSCI_0_2_FN64(3)
 #define PSCI_0_2_FN64_AFFINITY_INFO       PSCI_0_2_FN64(4)
+#define PSCI_1_0_FN64_SYSTEM_SUSPEND      PSCI_0_2_FN64(14)
 
 /* PSCI v0.2 affinity level state returned by AFFINITY_INFO */
 #define PSCI_0_2_AFFINITY_LEVEL_ON      0
diff --git a/xen/arch/arm/include/asm/suspend.h b/xen/arch/arm/include/asm/suspend.h
new file mode 100644
index 0000000000..b991a94d5a
--- /dev/null
+++ b/xen/arch/arm/include/asm/suspend.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __ARM_SUSPEND_H__
+#define __ARM_SUSPEND_H__
+
+struct resume_info {
+    register_t ep;
+    register_t cid;
+    struct vcpu *wake_cpu;
+};
+
+int arch_domain_resume(struct domain *d);
+
+#endif /* __ARM_SUSPEND_H__ */
+
+ /*
+  * Local variables:
+  * mode: C
+  * c-file-style: "BSD"
+  * c-basic-offset: 4
+  * tab-width: 4
+  * indent-tabs-mode: nil
+  * End:
+  */
diff --git a/xen/arch/arm/include/asm/vpsci.h b/xen/arch/arm/include/asm/vpsci.h
index 0cca5e6830..d790ab3715 100644
--- a/xen/arch/arm/include/asm/vpsci.h
+++ b/xen/arch/arm/include/asm/vpsci.h
@@ -23,12 +23,15 @@
 #include 
 
 /* Number of function implemented by virtual PSCI (only 0.2 or later) */
-#define VPSCI_NR_FUNCS  12
+#define VPSCI_NR_FUNCS  14
 
 /* Functions handle PSCI calls from the guests */
 bool do_vpsci_0_1_call(struct cpu_user_regs *regs, uint32_t fid);
 bool do_vpsci_0_2_call(struct cpu_user_regs *regs, uint32_t fid);
 
+int vpsci_vcpu_up_prepare(struct vcpu *v, register_t entry_point,
+                          register_t context_id);
+
 #endif /* __ASM_VPSCI_H__ */
 
 /*
diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c
index 7ba9ccd94b..22c3a5f544 100644
--- a/xen/arch/arm/vpsci.c
+++ b/xen/arch/arm/vpsci.c
@@ -10,32 +10,16 @@
 
 #include 
 
-static int do_common_cpu_on(register_t target_cpu, register_t entry_point,
-                            register_t context_id)
+int vpsci_vcpu_up_prepare(struct vcpu *v, register_t entry_point,
+                   register_t context_id)
 {
-    struct vcpu *v;
-    struct domain *d = current->domain;
-    struct vcpu_guest_context *ctxt;
     int rc;
+    struct domain *d = v->domain;
     bool is_thumb = entry_point & 1;
-    register_t vcpuid;
-
-    vcpuid = vaffinity_to_vcpuid(target_cpu);
-
-    if ( (v = domain_vcpu(d, vcpuid)) == NULL )
-        return PSCI_INVALID_PARAMETERS;
-
-    /* THUMB set is not allowed with 64-bit domain */
-    if ( is_64bit_domain(d) && is_thumb )
-        return PSCI_INVALID_ADDRESS;
-
-    if ( !test_bit(_VPF_down, &v->pause_flags) )
-        return PSCI_ALREADY_ON;
+    struct vcpu_guest_context *ctxt;
 
     if ( (ctxt = alloc_vcpu_guest_context()) == NULL )
-        return PSCI_DENIED;
-
-    vgic_clear_pending_irqs(v);
+        return -ENOMEM;
 
     memset(ctxt, 0, sizeof(*ctxt));
     ctxt->user_regs.pc64 = (u64) entry_point;
@@ -76,8 +60,37 @@ static int do_common_cpu_on(register_t target_cpu, register_t entry_point,
     free_vcpu_guest_context(ctxt);
 
     if ( rc < 0 )
+        return rc;
+
+    return 0;
+}
+
+static int do_common_cpu_on(register_t target_cpu, register_t entry_point,
+                            register_t context_id)
+{
+    struct vcpu *v;
+    struct domain *d = current->domain;
+    int rc;
+    bool is_thumb = entry_point & 1;
+    register_t vcpuid;
+
+    vcpuid = vaffinity_to_vcpuid(target_cpu);
+
+    if ( (v = domain_vcpu(d, vcpuid)) == NULL )
+        return PSCI_INVALID_PARAMETERS;
+
+    /* THUMB set is not allowed with 64-bit domain */
+    if ( is_64bit_domain(d) && is_thumb )
+        return PSCI_INVALID_ADDRESS;
+
+    if ( !test_bit(_VPF_down, &v->pause_flags) )
+        return PSCI_ALREADY_ON;
+
+    rc = vpsci_vcpu_up_prepare(v, entry_point, context_id);
+    if ( rc )
         return PSCI_DENIED;
 
+    vgic_clear_pending_irqs(v);
     vcpu_wake(v);
 
     return PSCI_SUCCESS;
@@ -197,6 +210,48 @@ static void do_psci_0_2_system_reset(void)
     domain_shutdown(d,SHUTDOWN_reboot);
 }
 
+static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid)
+{
+    int32_t rc;
+    struct vcpu *v;
+    struct domain *d = current->domain;
+    bool is_thumb = epoint & 1;
+
+    /* THUMB set is not allowed with 64-bit domain */
+    if ( is_64bit_domain(d) && is_thumb )
+        return PSCI_INVALID_ADDRESS;
+
+    /* SYSTEM_SUSPEND is not supported for the hardware domain yet */
+    if ( is_hardware_domain(d) )
+        return PSCI_NOT_SUPPORTED;
+
+    /* Ensure that all CPUs other than the calling one are offline */
+    domain_lock(d);
+    for_each_vcpu ( d, v )
+    {
+        if ( v != current && is_vcpu_online(v) )
+        {
+            domain_unlock(d);
+            return PSCI_DENIED;
+        }
+    }
+    domain_unlock(d);
+
+    rc = domain_shutdown(d, SHUTDOWN_suspend);
+    if ( rc )
+        return PSCI_DENIED;
+
+    d->arch.resume_ctx.ep = epoint;
+    d->arch.resume_ctx.cid = cid;
+    d->arch.resume_ctx.wake_cpu = current;
+
+    gprintk(XENLOG_DEBUG,
+            "SYSTEM_SUSPEND requested, epoint=0x%"PRIregister", cid=0x%"PRIregister"\n",
+            epoint, cid);
+
+    return rc;
+}
+
 static int32_t do_psci_1_0_features(uint32_t psci_func_id)
 {
     /* /!\ Ordered by function ID and not name */
@@ -214,6 +269,8 @@ static int32_t do_psci_1_0_features(uint32_t psci_func_id)
     case PSCI_0_2_FN32_SYSTEM_OFF:
     case PSCI_0_2_FN32_SYSTEM_RESET:
     case PSCI_1_0_FN32_PSCI_FEATURES:
+    case PSCI_1_0_FN32_SYSTEM_SUSPEND:
+    case PSCI_1_0_FN64_SYSTEM_SUSPEND:
     case ARM_SMCCC_VERSION_FID:
         return 0;
     default:
@@ -344,6 +401,23 @@ bool do_vpsci_0_2_call(struct cpu_user_regs *regs, uint32_t fid)
         return true;
     }
 
+    case PSCI_1_0_FN32_SYSTEM_SUSPEND:
+    case PSCI_1_0_FN64_SYSTEM_SUSPEND:
+    {
+        register_t epoint = PSCI_ARG(regs, 1);
+        register_t cid = PSCI_ARG(regs, 2);
+
+        if ( fid == PSCI_1_0_FN32_SYSTEM_SUSPEND )
+        {
+            epoint &= GENMASK(31, 0);
+            cid &= GENMASK(31, 0);
+        }
+
+        perfc_incr(vpsci_system_suspend);
+        PSCI_SET_RESULT(regs, do_psci_1_0_system_suspend(epoint, cid));
+        return true;
+    }
+
     default:
         return false;
     }
diff --git a/xen/common/domain.c b/xen/common/domain.c
index 775c339285..6410d32970 100644
--- a/xen/common/domain.c
+++ b/xen/common/domain.c
@@ -26,6 +26,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -1363,6 +1364,9 @@ void domain_resume(struct domain *d)
 
     spin_lock(&d->shutdown_lock);
 
+    if ( arch_domain_resume(d) )
+        goto fail;
+
     d->is_shutting_down = d->is_shut_down = 0;
     d->shutdown_code = SHUTDOWN_CODE_INVALID;
 
@@ -1373,6 +1377,7 @@ void domain_resume(struct domain *d)
         v->paused_for_shutdown = 0;
     }
 
+ fail:
     spin_unlock(&d->shutdown_lock);
 
     domain_unpause(d);
diff --git a/xen/include/xen/suspend.h b/xen/include/xen/suspend.h
new file mode 100644
index 0000000000..53f75fd6ad
--- /dev/null
+++ b/xen/include/xen/suspend.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef __XEN_SUSPEND_H__
+#define __XEN_SUSPEND_H__
+
+#if __has_include()
+#include 
+#else
+static inline int arch_domain_resume(struct domain *d)
+{
+    return 0;
+}
+#endif
+
+
+#endif /* __XEN_SUSPEND_H__ */
-- 
2.43.0



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        Tue, 18 Nov 2025 07:39:44 -0800 (PST)
From: Mykola Kvach 
To: xen-devel@lists.xenproject.org
Cc: Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk ,
	Andrew Cooper ,
	Anthony PERARD ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Juergen Gross ,
	Oleksii Kurochko ,
	Community Manager 
Subject: [PATCH v14 0/4] Enable guest suspend/resume support on ARM via vPSCI
Date: Tue, 18 Nov 2025 17:37:27 +0200
Message-ID: 
X-Mailer: git-send-email 2.43.0
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This patch series introduces the initial support for guest suspend
and resume on ARM platforms using the PSCI SYSTEM_SUSPEND interface. The main
goal is to allow ARM guests to request suspension using PSCI and be resumed
by the control domain (e.g., via "xl resume").


Background

The PSCI SYSTEM_SUSPEND call is part of the PSCI v1.0+ specification and is
used by guests to enter the deepest possible power state. On Xen/ARM, we
emulate this interface in the virtual PSCI (vPSCI) layer for guests.

This series includes:

1. A new vPSCI implementation of the PSCI SYSTEM_SUSPEND function for guests
2. Documentation updates to SUPPORT.md to reflect PSCI and vPSCI support status
3. Enabling "xl resume" command compilation for ARM, which was previously disabled


Usage

For Linux-based guests:
  - Suspend can be triggered using: "echo mem > /sys/power/state" or "systemctl suspend"
  - Resume can be performed from control domain using: "xl resume "

For more information, refer to the official Linux kernel documentation on power management.

Note that currently, SYSTEM_SUSPEND is supported only for guest domains (not for
the hardware domain).
---

This is the first part of previous patch series and originally consist only
with necessary changes needed for guest domain suspend.

The second part can be found here:
    https://patchew.org/Xen/cover.1756763487.git.mykola._5Fkvach@epam.com/
---

Changes introduced in v14:
- move arch_domain_resume() to its own header, drop typeof usage for
  the resume context, move resume error prints into arch_domain_resume(),
  and address review nits
- move the suspend-to-RAM changelog entry to the 4.22 section
- commit message tweaks.

Mykola Kvach (4):
  xen/arm: Implement PSCI SYSTEM_SUSPEND call for guests
  tools/xl: Allow compilation of 'xl resume' command on Arm
  SUPPORT.md: Document PSCI SYSTEM_SUSPEND support for guests
  CHANGELOG: Document guest suspend/resume to RAM support on Arm

 CHANGELOG.md                          |   4 +
 SUPPORT.md                            |   5 +-
 tools/include/libxl.h                 |   1 -
 tools/xl/xl.h                         |   4 +-
 tools/xl/xl_cmdtable.c                |   4 +-
 tools/xl/xl_migrate.c                 |   2 +-
 tools/xl/xl_saverestore.c             |   2 +-
 tools/xl/xl_vmcontrol.c               |  12 +--
 xen/arch/arm/domain.c                 |  41 +++++++++
 xen/arch/arm/include/asm/domain.h     |   2 +
 xen/arch/arm/include/asm/perfc_defn.h |   1 +
 xen/arch/arm/include/asm/psci.h       |   2 +
 xen/arch/arm/include/asm/suspend.h    |  24 ++++++
 xen/arch/arm/include/asm/vpsci.h      |   5 +-
 xen/arch/arm/vpsci.c                  | 116 +++++++++++++++++++++-----
 xen/common/domain.c                   |   5 ++
 xen/include/xen/suspend.h             |  15 ++++
 17 files changed, 208 insertions(+), 37 deletions(-)
 create mode 100644 xen/arch/arm/include/asm/suspend.h
 create mode 100644 xen/include/xen/suspend.h

-- 
2.43.0


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From: Mykola Kvach 
To: xen-devel@lists.xenproject.org
Cc: Mykola Kvach ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Julien Grall 
Subject: [PATCH v14 3/4] SUPPORT.md: Document PSCI SYSTEM_SUSPEND support for guests
Date: Tue, 18 Nov 2025 17:37:30 +0200
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From: Mykola Kvach 

Add a new entry under the "Virtual Hardware, Hypervisor" section
documenting support for the optional PSCI SYSTEM_SUSPEND function
exposed to guests.

This function is available via the virtual PSCI interface and allows
guest domains (domUs) to initiate system suspend operations.

The feature is currently marked as "Tech Preview".

Signed-off-by: Mykola Kvach 
Acked-by: Julien Grall 
---
Changes in V14:
- fixes in commit message.
---
 SUPPORT.md | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/SUPPORT.md b/SUPPORT.md
index d441bccf37..8e7ab7cb3e 100644
--- a/SUPPORT.md
+++ b/SUPPORT.md
@@ -962,8 +962,9 @@ Emulated PSCI interface exposed to guests. We support all mandatory
 functions of PSCI 1.1. See below for the list of optional PSCI call
 implemented and their status.
 
-   Status, Mandatory: Supported
-   Status, MIGRATE_INFO_TYPE: Supported
+    Status, Mandatory: Supported
+    Status, MIGRATE_INFO_TYPE: Supported
+    Status, SYSTEM_SUSPEND: Tech Preview
 
 ## Virtual Hardware, QEMU
 
-- 
2.43.0



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From: Mykola Kvach 
To: xen-devel@lists.xenproject.org
Cc: Mykola Kvach ,
	Oleksii Kurochko ,
	Community Manager 
Subject: [PATCH v14 4/4] CHANGELOG: Document guest suspend/resume to RAM support on Arm
Date: Tue, 18 Nov 2025 17:37:31 +0200
Message-ID: <8ed791c2471a23bf63715c16df519c86e0699157.1763479083.git.xakep.amatop@gmail.com>
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From: Mykola Kvach 

Mention the newly added support for guest suspend and resume to/from
RAM via vPSCI on Arm platforms.

This support is limited to non-hardware domain guests.

Signed-off-by: Mykola Kvach 
---
Chnages in v14:
- moved s2ram changelog to 4.22 release section
---
 CHANGELOG.md | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index c9932a2af0..fd4657ea42 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -10,6 +10,10 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
 
 ### Added
 
+ - On Arm:
+   - Support for guest suspend and resume to/from RAM via vPSCI.
+     Applies only to non-hardware domain guests.
+
 ### Removed
 
 ## [4.21.0 UNRELEASED](https://xenbits.xenproject.org/gitweb/?p=xen.git;a=shortlog;h=staging) - TBD
-- 
2.43.0



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Date: Tue, 18 Nov 2025 15:41:03 +0000
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Subject: Re: [PATCH 4/8] x86: replace APERFMPERF synthetic feature bit
To: Jan Beulich ,
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On 18/11/2025 3:07 pm, Jan Beulich wrote:
> Use the respective host CPU policy bit instead.
>
> Signed-off-by: Jan Beulich 

Right now, the synthetic features get levelled across the system.  Now,
we take the BSP's copy.

This change is broadly fine, but it does need mentioning in the commit
message.

One thing we may want to do is take greater care to get the
masking/levelling MSRs properly level.  Right now, if they're asymmetric
for any reason, we would previously end up using the common subset.

> --- a/xen/arch/x86/cpu/common.c
> +++ b/xen/arch/x86/cpu/common.c
> @@ -523,10 +523,6 @@ static void generic_identify(struct cpui
>  	if ( cpu_has(c, X86_FEATURE_CLFLUSH) )
>  		c->x86_clflush_size = ((ebx >> 8) & 0xff) * 8;
>  
> -	if ( (c->cpuid_level >= CPUID_PM_LEAF) &&
> -	     (cpuid_ecx(CPUID_PM_LEAF) & CPUID6_ECX_APERFMPERF_CAPABILITY) )
> -		__set_bit(X86_FEATURE_APERFMPERF, c->x86_capability);
> -
>  	/* AMD-defined flags: level 0x80000001 */
>  	if (c->extended_cpuid_level >= 0x80000001)
>  		cpuid(0x80000001, &tmp, &tmp,
> --- a/xen/arch/x86/include/asm/cpufeature.h
> +++ b/xen/arch/x86/include/asm/cpufeature.h
> @@ -11,7 +11,9 @@
>  #include 
>  
>  #ifndef __ASSEMBLY__
> +#include 
>  #include 
> +#include 

Why both?

~Andrew


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Subject: Re: [PATCH] xen/arm: irq: Use appropriate priority for SGIs in setup_irq()
To: Julien Grall 
Cc: xen-devel@lists.xenproject.org, Mykola Kvach , 
	Stefano Stabellini , Bertrand Marquis , 
	Michal Orzel , Volodymyr Babchuk 
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Hi Julien,

Gentle ping on this patch.

About two months ago I replied to your questions on the priority choice
and on the dynamic SGI use case (ffa_notif). Could you let me know
whether my explanation makes sense, and if you would like me to rework
the patch?

If you think the current approach is not acceptable, I am also happy to
drop or redesign it based on your guidance.

It would also be helpful to get feedback from other Arm maintainers.

Thanks,
Mykola

On Tue, Sep 16, 2025 at 1:19=E2=80=AFPM Mykola Kvach  wrote:
>
> Hi Julien,
>
> Thank you for your review and the helpful comments.
> I appreciate your time and feedback.
>
> On Sat, Sep 13, 2025 at 1:01=E2=80=AFAM Julien Grall  wro=
te:
> >
> > Hi Mykola,
> >
> > On 03/09/2025 03:55, Mykola Kvach wrote:
> > > From: Mykola Kvach 
> > >
> > > Use GIC_PRI_IPI priority for SGI interrupts instead of the generic
> > > GIC_PRI_IRQ priority in setup_irq().
> > >
> > > This change ensures that SGIs get the correct priority level when
> > > being set up for Xen's use, maintaining proper interrupt precedence
> > > in the system.
> > >
> > > The priority assignment now follows ARM GIC best practices:
> > > - SGIs (0-15): GIC_PRI_IPI (higher priority)
> > > - PPIs/SPIs (16+): GIC_PRI_IRQ (standard priority)
> >
> > Please provide a reference to the spec. But I don't follow why we shoul=
d
> > follow exactly what the spec suggest. This is up to us to decide what w=
e
> > want. Otherwise what's the point of having more than two priorities?
>
> To clarify, the GIC specification does not require SGIs to have higher
> priority than PPIs or SPIs. My reference to =E2=80=9Cbest practices=E2=80=
=9D is based on
> how Xen typically configures SGIs with higher priority during initializat=
ion.
> This is not a strict requirement, but it helps maintain interrupt precede=
nce
> in a way that aligns with established implementations.
>
> If needed, PPIs or SPIs could be assigned higher priority depending on
> system requirements.
>
> >
> > >
> > > Signed-off-by: Mykola Kvach 
> > > ---
> > >   xen/arch/arm/irq.c | 8 +++++++-
> > >   1 file changed, 7 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c
> > > index 02ca82c089..17c7ac92b5 100644
> > > --- a/xen/arch/arm/irq.c
> > > +++ b/xen/arch/arm/irq.c
> > > @@ -397,7 +397,13 @@ int setup_irq(unsigned int irq, unsigned int irq=
flags, struct irqaction *new)
> > AFAIK, we are not using setup_irq() to handle SGIs because they are all
> > static and always enabled. Are you planning to handle dynamic SGIs? If
> > yes, then can you provide more details?As far as I know, there can be a=
t least one =E2=80=9Cdynamic=E2=80=9D SGI in Xen.
>
> As far as I know, there is at least one =E2=80=9Cdynamic=E2=80=9D SGI in =
Xen. For
> example, see ffa_notif.c in the functions ffa_notif_init_interrupt
> and ffa_notif_init, which handle initialization of such SGIs.
>
> >
> > >       /* First time the IRQ is setup */
> > >       if ( disabled )
> > >       {
> > > -        gic_route_irq_to_xen(desc, GIC_PRI_IRQ);
> > > +        unsigned int prio =3D GIC_PRI_IRQ;
> > > +
> > > +        /* Use appropriate priority based on interrupt type */
> > > +        if (desc->irq < NR_GIC_SGI)
> > > +            prio =3D GIC_PRI_IPI;
> >
> > I am a bit split with this change. I feel static SGI (e.g. EVENT_CHECK,
> > CALL_FUNCTION) should have higher priority to the dynamic SGIs because
> > they are critical for Xen.
>
> That=E2=80=99s a good point. My intention was to follow the general appro=
ach of
> assigning higher priority to SGIs, as done during GIC initialization.
>
> >
> > Before making my mind, I would like to understand a bit more the use ca=
se.
> >
> > Cheers,
> >
> > --
> > Julien Grall
> >
>
> Best regards,
> Mykola


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From: Mykola Kvach 
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Message-ID: 
Subject: Re: [PATCH v5] xen/char: implement suspend/resume calls for SCIF driver
To: xen-devel@lists.xenproject.org
Cc: Volodymyr Babchuk , Stefano Stabellini , 
	Julien Grall , Bertrand Marquis , 
	Michal Orzel , 
	Oleksandr Andrushchenko , Mykola Kvach 
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Hi all,

Friendly ping on this series.

As far as I can see, all comments have been addressed and this series
already has the relevant Reviewed-by/Acked-by tags.

Is there anything else needed before this can be queued or merged?

Best regards,
Mykola

On Thu, Aug 7, 2025 at 8:16=E2=80=AFAM Mykola Kvach  wrote:
>
> From: Volodymyr Babchuk 
>
> Implement suspend and resume callbacks for the SCIF UART driver,
> enabled when CONFIG_SYSTEM_SUSPEND is set. This allows proper
> handling of UART state across system suspend/resume cycles.
>
> Tested on Renesas R-Car H3 Starter Kit.
>
> Signed-off-by: Volodymyr Babchuk 
> Signed-off-by: Oleksandr Andrushchenko 
> Signed-off-by: Mykola Kvach 
> ---
> In patch v5, there are no changes at all;
> it was done just to trigger a review.
>
> In patch v4, enhance commit message, no functional changes
>
> In patch v2, I just added a CONFIG_SYSTEM_SUSPEND check around
> the suspend/resume functions in the SCIF driver.
> ---
>  xen/drivers/char/scif-uart.c | 40 ++++++++++++++++++++++++++++++++++--
>  1 file changed, 38 insertions(+), 2 deletions(-)
>
> diff --git a/xen/drivers/char/scif-uart.c b/xen/drivers/char/scif-uart.c
> index 757793ca45..888821a3b8 100644
> --- a/xen/drivers/char/scif-uart.c
> +++ b/xen/drivers/char/scif-uart.c
> @@ -139,9 +139,8 @@ static void scif_uart_interrupt(int irq, void *data)
>      }
>  }
>
> -static void __init scif_uart_init_preirq(struct serial_port *port)
> +static void scif_uart_disable(struct scif_uart *uart)
>  {
> -    struct scif_uart *uart =3D port->uart;
>      const struct port_params *params =3D uart->params;
>
>      /*
> @@ -155,6 +154,14 @@ static void __init scif_uart_init_preirq(struct seri=
al_port *port)
>
>      /* Reset TX/RX FIFOs */
>      scif_writew(uart, SCIF_SCFCR, SCFCR_RFRST | SCFCR_TFRST);
> +}
> +
> +static void scif_uart_init_preirq(struct serial_port *port)
> +{
> +    struct scif_uart *uart =3D port->uart;
> +    const struct port_params *params =3D uart->params;
> +
> +    scif_uart_disable(uart);
>
>      /* Clear all errors and flags */
>      scif_readw(uart, params->status_reg);
> @@ -271,6 +278,31 @@ static void scif_uart_stop_tx(struct serial_port *po=
rt)
>      scif_writew(uart, SCIF_SCSCR, scif_readw(uart, SCIF_SCSCR) & ~SCSCR_=
TIE);
>  }
>
> +#ifdef CONFIG_SYSTEM_SUSPEND
> +
> +static void scif_uart_suspend(struct serial_port *port)
> +{
> +    struct scif_uart *uart =3D port->uart;
> +
> +    scif_uart_stop_tx(port);
> +    scif_uart_disable(uart);
> +}
> +
> +static void scif_uart_resume(struct serial_port *port)
> +{
> +    struct scif_uart *uart =3D port->uart;
> +    const struct port_params *params =3D uart->params;
> +    uint16_t ctrl;
> +
> +    scif_uart_init_preirq(port);
> +
> +    /* Enable TX/RX and Error Interrupts  */
> +    ctrl =3D scif_readw(uart, SCIF_SCSCR);
> +    scif_writew(uart, SCIF_SCSCR, ctrl | params->irq_flags);
> +}
> +
> +#endif /* CONFIG_SYSTEM_SUSPEND */
> +
>  static struct uart_driver __read_mostly scif_uart_driver =3D {
>      .init_preirq  =3D scif_uart_init_preirq,
>      .init_postirq =3D scif_uart_init_postirq,
> @@ -281,6 +313,10 @@ static struct uart_driver __read_mostly scif_uart_dr=
iver =3D {
>      .start_tx     =3D scif_uart_start_tx,
>      .stop_tx      =3D scif_uart_stop_tx,
>      .vuart_info   =3D scif_vuart_info,
> +#ifdef CONFIG_SYSTEM_SUSPEND
> +    .suspend      =3D scif_uart_suspend,
> +    .resume       =3D scif_uart_resume,
> +#endif
>  };
>
>  static const struct dt_device_match scif_uart_dt_match[] __initconst =3D
> --
> 2.48.1
>


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Date: Tue, 18 Nov 2025 17:30:06 +0100
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Subject: Re: [for 4.22 v5 10/18] xen/riscv: implement p2m_set_range()
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: 
 
 
 <3fc28006-4a03-4d95-8db3-71a7b3131f82@gmail.com>
 <31c69c86-46ba-4670-b265-10baa0001f85@suse.com>
 <6ddb0571-6c19-404b-813b-55c9ad0dd062@gmail.com>
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From: Jan Beulich 
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On 18.11.2025 16:28, Oleksii Kurochko wrote:
> 
> On 11/17/25 9:56 AM, Jan Beulich wrote:
>>>>> +#define P2M_MAX_ROOT_LEVEL 4
>>>>> +
>>>>> +#define P2M_DECLARE_OFFSETS(var, addr) \
>>>>> +    unsigned int var[P2M_MAX_ROOT_LEVEL] = {-1};\
>>>>> +    for ( unsigned int i = 0; i <= gstage_root_level; i++ ) \
>>>>> +        var[i] = calc_offset(i, addr);
>>>> This surely is more than just "declare", and it's dealing with all levels no
>>>> matter whether you actually will use all offsets.
>>> I will rename|P2M_DECLARE_OFFSETS| to|P2M_BUILD_LEVEL_OFFSETS()|.
>>>
>>> But how can I know which offset I will actually need to use?
>>> If we take the following loop as an example:
>>>     |for( level = P2M_ROOT_LEVEL; level > target; level-- ) { ||/* ||* 
>>> Don't try to allocate intermediate page tables if the mapping ||* is 
>>> about to be removed. ||*/ ||rc = p2m_next_level(p2m, 
>>> !removing_mapping, ||level, &table, offsets[level]); ||... ||} |It 
>>> walks from|P2M_ROOT_LEVEL| down to|target|, where|target| is determined at runtime.
>>>
>>> If you mean that, for example, when the G-stage mode is Sv39, there is no need to allocate
>>> an array with 4 entries (or 5 entries if we consider Sv57, so P2M_MAX_ROOT_LEVEL should be
>>> updated), because Sv39 only uses 3 page table levels — then yes, in theory it could be
>>> smaller. But I don't think it is a real issue if the|offsets[]| array on the stack has a
>>> few extra unused entries.
>>>
>>> If preferred, Icould allocate the array dynamically based on|gstage_root_level|.
>>> Would that be better?
>> Having a few unused entries isn't a big deal imo. What I'm not happy with here is
>> that you may_initialize_ more entries than actually needed. I have no good
>> suggestion within the conceptual framework you use for page walking (the same
>> issue iirc exists in host page table walks, just that the calculations there are
>> cheaper).
> 
> The loop inside|P2M_DECLARE_OFFSETS()| uses|gstage_root_level|, so only the entries that
> are actually going to be used are initialized.
> 
> You probably mean that it’s possible we don’t need to walk all the tables because a
> leaf page-table entry appears earlier than the L0 page table for some gfns?

Yes.

> IMO, it’s not
> really a big deal, because at worst we just spend some time calculating something that
> isn’t actually needed, but considering that it will be just extra 2 calls in the worst case
> (when mapping is 1g, for no reason we calculated offsets for L1 and L0) of calc_offset()
> it won't affect performance too much.

Well, it's your call in the end.

Jan


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On 18/11/2025 3:07 pm, Jan Beulich wrote:
> Add a XEN infix, to properly distinguish it from the CPUID feature flag
> (leaf 6 EAX bit 2).
>
> Signed-off-by: Jan Beulich 
> ---
> Question is whether we still need opt_arat (and the command line option),
> or whether we could go directly from the CPUID bit (overriding it to on
> for older AMD [and Hygon?] CPUs). Or whether to have opt_arat affect the
> (host) CPU policy directly.

I have no particular love for opt_arat.  I added it when there was no
way to force a system to fall back to an older timer.

As long as we've got some way of configuring the exact timer to, I'm not
fussed about keeping the top level boolean.

~Andrew


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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Oleksii Kurochko 
Subject: [PATCH] CHANGELOG.md: Set release date for 4.21
Date: Tue, 18 Nov 2025 16:47:30 +0000
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CC: Oleksii Kurochko 
---
 CHANGELOG.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index c9932a2af077..adaad5ee8923 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -12,7 +12,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
 
 ### Removed
 
-## [4.21.0 UNRELEASED](https://xenbits.xenproject.org/gitweb/?p=xen.git;a=shortlog;h=staging) - TBD
+## [4.21.0](https://xenbits.xenproject.org/gitweb/?p=xen.git;a=shortlog;h=RELEASE-4.21.0) - 2025-11-19
 
 ### Changed
  - The minimum toolchain requirements have increased for some architectures:

base-commit: 07e57af2b4715a9d088781b06c4f97c7d9f25b19
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Oleksii Kurochko 
Subject: [PATCH for-4.21] SUPPORT.md: Define support lifetime
Date: Tue, 18 Nov 2025 16:50:22 +0000
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---
 SUPPORT.md | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/SUPPORT.md b/SUPPORT.md
index 491f9ecd1bbb..3099225c77f4 100644
--- a/SUPPORT.md
+++ b/SUPPORT.md
@@ -9,13 +9,13 @@ for the definitions of the support status levels etc.
 
 # Release Support
 
-    Xen-Version: 4.21-rc
-    Initial-Release: n/a
-    Supported-Until: TBD
-    Security-Support-Until: Unreleased - not yet security-supported
+    Xen-Version: 4.21
+    Initial-Release: 2025-11-19
+    Supported-Until: 2027-05-19
+    Security-Support-Until: 2028-11-19
 
 Release Notes
-: RN
+: RN
 
 # Feature Support
 
-- 
2.39.5



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Subject: Re: [PATCH 2/8] x86/cpu-policy: define bits of leaf 6
To: Andrew Cooper 
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On 18.11.2025 16:30, Andrew Cooper wrote:
> On 18/11/2025 3:06 pm, Jan Beulich wrote:
>> --- a/xen/include/xen/lib/x86/cpu-policy.h
>> +++ b/xen/include/xen/lib/x86/cpu-policy.h
>> @@ -121,7 +121,31 @@ struct cpu_policy
>>              uint64_t :64, :64; /* Leaf 0x3 - PSN. */
>>              uint64_t :64, :64; /* Leaf 0x4 - Structured Cache. */
>>              uint64_t :64, :64; /* Leaf 0x5 - MONITOR. */
>> -            uint64_t :64, :64; /* Leaf 0x6 - Therm/Perf. */
>> +
>> +            /* Leaf 0x6 - Therm/Perf. */
>> +            struct {
>> +                uint32_t /* a */:1,
>> +                    turbo:1,
>> +                    arat:1,
>> +                    :4,
>> +                    hwp:1,
>> +                    hwp_notification:1,
>> +                    hwp_activity_window:1,
>> +                    hwp_epp:1,
>> +                    hwp_plr:1,
>> +                    :1,
>> +                    hdc:1,
>> +                    :2,
>> +                    hwp_peci:1,
>> +                    :2,
>> +                    hw_feedback:1,
>> +                    :12;
>> +                uint32_t /* b */:32;
>> +                uint32_t /* c */ aperfmperf:1,
>> +                    :31;
>> +                uint32_t /* d */:32;
> 
> Elsewhere, single bit fields are bool foo:1, and these want to match for
> consistency.

Oh, yes, will change.

>  In particular using uint32_t:1 creates a latent bug in
> patch 8.

I don't see where that would be.

> One problem with bool bitfields is that your :4 needs to become 4x :1. 
> Right now his hidden in the macros that gen-cpuid.py makes.
> 
> Given that b is of type uint32_t, you can omit the :12 from the end of a
> and leave a comment.  Similarly, the trailing :31 on c can be dropped.

We have these in many other places, and omitting in particular the :31
would also feel somewhat fragile / misleading. It'll need to be

                bool     /* c */ aperfmperf:1;
                uint32_t :31;

or something along these lines.

>> +            } pm;
> 
> Nothing else is sub-scoped.  I'd prefer that you drop the 'pm'.

Wouldn't that require the use of the very extension you just talked about
at the committer's call?

Jan


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Subject: Re: [PATCH for-4.21] SUPPORT.md: Define support lifetime
To: Andrew Cooper 
Cc: Anthony PERARD ,
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On 18.11.2025 17:50, Andrew Cooper wrote:
> Signed-off-by: Andrew Cooper 

Acked-by: Jan Beulich 



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Date: Tue, 18 Nov 2025 17:20:15 +0000
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Subject: Re: [PATCH 2/8] x86/cpu-policy: define bits of leaf 6
To: Jan Beulich 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Teddy Astie ,
 "xen-devel@lists.xenproject.org" 
References: <53ef6c9a-1115-4bb4-bb7f-e2595ab9d0b6@suse.com>
 
 
 
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On 18/11/2025 4:53 pm, Jan Beulich wrote:
> On 18.11.2025 16:30, Andrew Cooper wrote:
>> On 18/11/2025 3:06 pm, Jan Beulich wrote:
>>> --- a/xen/include/xen/lib/x86/cpu-policy.h
>>> +++ b/xen/include/xen/lib/x86/cpu-policy.h
>>> @@ -121,7 +121,31 @@ struct cpu_policy
>>>              uint64_t :64, :64; /* Leaf 0x3 - PSN. */
>>>              uint64_t :64, :64; /* Leaf 0x4 - Structured Cache. */
>>>              uint64_t :64, :64; /* Leaf 0x5 - MONITOR. */
>>> -            uint64_t :64, :64; /* Leaf 0x6 - Therm/Perf. */
>>> +
>>> +            /* Leaf 0x6 - Therm/Perf. */
>>> +            struct {
>>> +                uint32_t /* a */:1,
>>> +                    turbo:1,
>>> +                    arat:1,
>>> +                    :4,
>>> +                    hwp:1,
>>> +                    hwp_notification:1,
>>> +                    hwp_activity_window:1,
>>> +                    hwp_epp:1,
>>> +                    hwp_plr:1,
>>> +                    :1,
>>> +                    hdc:1,
>>> +                    :2,
>>> +                    hwp_peci:1,
>>> +                    :2,
>>> +                    hw_feedback:1,
>>> +                    :12;
>>> +                uint32_t /* b */:32;
>>> +                uint32_t /* c */ aperfmperf:1,
>>> +                    :31;
>>> +                uint32_t /* d */:32;
>> Elsewhere, single bit fields are bool foo:1, and these want to match for
>> consistency.
> Oh, yes, will change.
>
>>   In particular using uint32_t:1 creates a latent bug in
>> patch 8.
> I don't see where that would be.

In the printf.  %d vs %u.  Latent because it's ok until bit 31 gets
used, and then it's not ok.

>
>> One problem with bool bitfields is that your :4 needs to become 4x :1. 
>> Right now his hidden in the macros that gen-cpuid.py makes.
>>
>> Given that b is of type uint32_t, you can omit the :12 from the end of a
>> and leave a comment.  Similarly, the trailing :31 on c can be dropped.
> We have these in many other places, and omitting in particular the :31
> would also feel somewhat fragile / misleading. It'll need to be
>
>                 bool     /* c */ aperfmperf:1;
>                 uint32_t :31;
>
> or something along these lines.

This doesn't work.  A gap of 31 bits gets inserted because of uint32_t's
alignment, which is why the suggestion to ignore it does work (even if
fragile).

I suggest a /* 31 spare bits */ comment, because the only other option
is 31x :1's.

>
>>> +            } pm;
>> Nothing else is sub-scoped.  I'd prefer that you drop the 'pm'.
> Wouldn't that require the use of the very extension you just talked about
> at the committer's call?

No. It would just be a plain anonymous struct in this case, but it
doesn't even need to be a struct.

leaf 0,2,10 are all "top level" insofar as they're all inside .basic. 
leaf 1 only has anonymous unions to join the the bitfield names and the
field-wide name.

~Andrew


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Date: Tue, 18 Nov 2025 18:45:11 +0100
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich , Julien Grall ,
	Stefano Stabellini ,
	Oleksii Kurochko 
Subject: Re: [PATCH] CHANGELOG.md: Set release date for 4.21
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References: <20251118164730.475344-1-andrew.cooper3@citrix.com>
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On Tue, Nov 18, 2025 at 04:47:30PM +0000, Andrew Cooper wrote:
> Signed-off-by: Andrew Cooper 

Acked-by: Roger Pau Monné 

Thanks, Roger.


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Message-ID: <81030d67-ddc2-4d20-a0c8-8a73c6afa801@gmail.com>
Date: Tue, 18 Nov 2025 18:58:19 +0100
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH for-4.21] SUPPORT.md: Define support lifetime
To: Andrew Cooper ,
 Xen-devel 
Cc: Anthony PERARD ,
 Michal Orzel , Jan Beulich ,
 Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Stefano Stabellini 
References: <20251118165022.476308-1-andrew.cooper3@citrix.com>
Content-Language: en-US
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In-Reply-To: <20251118165022.476308-1-andrew.cooper3@citrix.com>

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On 11/18/25 5:50 PM, Andrew Cooper wrote:
> Signed-off-by: Andrew Cooper
> ---
> CC: Anthony PERARD
> CC: Michal Orzel
> CC: Jan Beulich
> CC: Julien Grall
> CC: Roger Pau Monné
> CC: Stefano Stabellini
> CC: Oleksii Kurochko
> ---
>   SUPPORT.md | 10 +++++-----
>   1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/SUPPORT.md b/SUPPORT.md
> index 491f9ecd1bbb..3099225c77f4 100644
> --- a/SUPPORT.md
> +++ b/SUPPORT.md
> @@ -9,13 +9,13 @@ for the definitions of the support status levels etc.
>   
>   # Release Support
>   
> -    Xen-Version: 4.21-rc
> -    Initial-Release: n/a
> -    Supported-Until: TBD
> -    Security-Support-Until: Unreleased - not yet security-supported
> +    Xen-Version: 4.21
> +    Initial-Release: 2025-11-19
> +    Supported-Until: 2027-05-19
> +    Security-Support-Until: 2028-11-19
>   
>   Release Notes
> -: RN
> +: RN
>   
>   # Feature Support

Release-Acked-By: Oleksii Kurochko

Thanks.

~ Oleksii

--------------590qd5gvnSXjggih0WnwLrqx
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On 11/18/25 5:50 PM, Andrew Cooper
      wrote:

    

    

      
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Anthony PERARD <anthony.perard@vates.tech>
CC: Michal Orzel <michal.orzel@amd.com>
CC: Jan Beulich <jbeulich@suse.com>
CC: Julien Grall <julien@xen.org>
CC: Roger Pau Monné <roger.pau@citrix.com>
CC: Stefano Stabellini <sstabellini@kernel.org>
CC: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 SUPPORT.md | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/SUPPORT.md b/SUPPORT.md
index 491f9ecd1bbb..3099225c77f4 100644
--- a/SUPPORT.md
+++ b/SUPPORT.md
@@ -9,13 +9,13 @@ for the definitions of the support status levels etc.
 
 # Release Support
 
-    Xen-Version: 4.21-rc
-    Initial-Release: n/a
-    Supported-Until: TBD
-    Security-Support-Until: Unreleased - not yet security-supported
+    Xen-Version: 4.21
+    Initial-Release: 2025-11-19
+    Supported-Until: 2027-05-19
+    Security-Support-Until: 2028-11-19
 
 Release Notes
-: <a href="https://wiki.xenproject.org/wiki/Xen_Project_X.YY_Release_Notes">RN</a>
+: <a href="https://wiki.xenproject.org/wiki/Xen_Project_4.21_Release_Notes">RN</a>
 
 # Feature Support

    

    
Release-Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>

Thanks.

~ Oleksii

  


--------------590qd5gvnSXjggih0WnwLrqx--


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On 2025-11-18 10:09, Jan Beulich wrote:
> There's no need to invoke CPUID yet another time. This way two of the
> static booleans can also go away.
> 
> Signed-off-by: Jan Beulich 

Reviewed-by: Jason Andryuk 

Thanks,
Jason


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Message-ID: <120bb273-60b2-4405-8db6-defc27715250@amd.com>
Date: Tue, 18 Nov 2025 14:29:56 -0500
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Subject: Re: [PATCH v3 28/28] xen/domctl: wrap common/domctl.c with
 CONFIG_MGMT_HYPERCALLS
To: "Penny, Zheng" , Jan Beulich 
CC: "Huang, Ray" , "oleksii.kurochko@gmail.com"
	, Andrew Cooper ,
	Anthony PERARD , "Orzel, Michal"
	, Julien Grall ,
	=?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini
	, "xen-devel@lists.xenproject.org"
	
References: <20251013101540.3502842-1-Penny.Zheng@amd.com>
 <20251013101540.3502842-29-Penny.Zheng@amd.com>
 
 
 
 
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On 2025-11-18 02:51, Penny, Zheng wrote:
> [Public]
> 
>> -----Original Message-----
>> From: Jan Beulich 
>> Sent: Tuesday, November 18, 2025 3:14 PM
>> To: Penny, Zheng 
>> Cc: Huang, Ray ; oleksii.kurochko@gmail.com; Andrew
>> Cooper ; Anthony PERARD
>> ; Orzel, Michal ; Julien
>> Grall ; Roger Pau Monné ; Stefano
>> Stabellini ; xen-devel@lists.xenproject.org
>> Subject: Re: [PATCH v3 28/28] xen/domctl: wrap common/domctl.c with
>> CONFIG_MGMT_HYPERCALLS
>>
>> On 18.11.2025 07:43, Penny, Zheng wrote:
>>> [Public]
>>>
>>>> -----Original Message-----
>>>> From: Jan Beulich 
>>>> Sent: Thursday, October 30, 2025 9:40 PM
>>>> To: Penny, Zheng 
>>>> Cc: Huang, Ray ; oleksii.kurochko@gmail.com;
>>>> Andrew Cooper ; Anthony PERARD
>>>> ; Orzel, Michal ;
>>>> Julien Grall ; Roger Pau Monné
>>>> ; Stefano Stabellini ;
>>>> xen-devel@lists.xenproject.org
>>>> Subject: Re: [PATCH v3 28/28] xen/domctl: wrap common/domctl.c with
>>>> CONFIG_MGMT_HYPERCALLS
>>>>
>>>> On 13.10.2025 12:15, Penny Zheng wrote:
>>>>> --- a/xen/common/Kconfig
>>>>> +++ b/xen/common/Kconfig
>>>>> @@ -646,11 +646,13 @@ config SYSTEM_SUSPEND
>>>>>        If unsure, say N.
>>>>>
>>>>>   config MGMT_HYPERCALLS
>>>>> -   def_bool y
>>>>> +   bool "Enable privileged hypercalls for system management"
>>>>>      help
>>>>>        This option shall only be disabled on some dom0less systems, or
>>>>>        PV shim on x86, to reduce Xen footprint via managing unnessary

"unnecessary"

>>>>> -     hypercalls, like sysctl, etc.
>>>>> +     hypercalls, like sysctl, domctl, etc.
>>>>> +     Be cautious to disable it, as users will face missing a few basic
>>>>> +     hypercalls like listdomains, getdomaininfo, etc.
>>>>
>>>> This is still too little, imo. For one I'm not sure "users" is quite
>>>> the right term. I'd say it's more "admins". And then, as mentioned,
>>>> there are a few domctl-s which are usable by DMs. Aiui device
>>>> pass-through may also be impacted, which imo will want mentioning
>>>> here as well. Or else, if there is an implication that DMs aren't to be used when
>> MGMT_HYPERCALLS=n, that is what would want calling out.
>>>
>>> How about
>>> "
>>>          Be cautious to disable it, as admins will face missing a few basic
>>>          hypercalls like listdomains, getdomaininfo, etc, hence leading to
>>>          have an impact on xl-device-passthrough and restricted DM.
>>> "
>>
>> Much better. However, why "xl-" and why "restricted"? Neither aspect matters here,
>> unless I overlook something.
>>
> 
> Later, in hyperlaunch scenario, device passthrough is still needed, but it's not current device passthrough mode, which depends on xl-tool-stack to de-assign it from hardware domain and re-assign it to guest. It will be limited in boot-up stage, and configured via device tree only. FWIU, we may reuse VPCI framework, but commands like "xl assign/deassign xxx" will not be needed anymore. PLZ correct me if understand wrongly, @Andryuk, Jason

Yes, this is correct.

> 
> And DM, like QEMU, is still applicable, but only supports a new machine type, "pvh".

vPCI is used to assign the PCI devices to a PVH domain during boot. 
QEMU is present and provides virtio devices, but it does not play a role 
in PCI passthrough.  So far we've used independent PCI segments for vPCI 
and QEMU/virtio.

Anyway, maybe something like this for the help text:
"""
Management hypercalls provide the means for dom0 to manage the overall 
Xen system and other domains.  This includes the hypercalls needed to 
construct new domains.  In a dom0less or pv-shim build, they can be 
omitted to cut down on the Xen binary's size.  However, this comes at 
the loss of significant runtime functionality.

Unless you know what you are doing, you should enable this.
"""

Regards,
Jason


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Date: Tue, 18 Nov 2025 19:42:28 +0000
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Subject: Re: [PATCH 6/8] x86/Intel: use host CPU policy for ARAT checking
To: Jan Beulich ,
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On 18/11/2025 3:08 pm, Jan Beulich wrote:
> There's no need to invoke CPUID yet another time. However, as the host CPU
> policy is set up only shortly after init_intel() ran on the BSP, defer the
> logic to a pre-SMP initcall. This can't be (a new) one in cpu/intel.c
> though, as that's linked after acpi/cpu_idle.c (which is where we already
> need the feature set). Since opt_arat is local to the cpu/ subtree,
> introduce a new Intel-specific helper to hold the code needed.
>
> Further, as we assume symmetry anyway, use setup_force_cpu_cap() and hence
> limit the checking to the boot CPU.
>
> Signed-off-by: Jan Beulich 
> ---
> The need to move where cpu_has_arat is checked would go away if we did
> away with opt_arat (as mentioned in the previous patch), and hence could
> use cpu_has_arat directly where right now XEN_ARAT is checked.
>
> --- a/xen/arch/x86/acpi/cpu_idle.c
> +++ b/xen/arch/x86/acpi/cpu_idle.c
> @@ -1666,6 +1666,9 @@ static int __init cf_check cpuidle_presm
>  {
>      void *cpu = (void *)(long)smp_processor_id();
>  
> +    if ( boot_cpu_data.vendor == X86_VENDOR_INTEL )
> +        intel_init_arat();

I really would prefer to avoid the need for this.

Now that microcode loading has moved to the start of day, we can drop
most of the order-of-init complexity for CPUID/etc, and I expect that
problems like this will cease to exist as a result.

Notably, we've now got no relevant difference between early_init() and
regular init().  That was a complexity we inherited from Linux.

~Andrew


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Date: Tue, 18 Nov 2025 21:43:33 +0200
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Subject: Re: [XEN][PATCH] common/libfdt: optimize usage
To: Jan Beulich 
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
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 Andrew Cooper ,
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 17.11.25 11:31, Jan Beulich wrote:
> On 14.11.2025 19:01, Grygorii Strashko wrote:
>> From: Grygorii Strashko 
>>
>> Now all libfdt features are built-it unconditionally, but...
>>
>> X86: The libfdt is used on x86 only to parse Hyperlaunch/dom0less Xen
>> nodes, so full libfdt is not needed in this case and minimal, RO
>> configuration can be used.
>>
>> ARM - situation is more complicated:
>> 1) ARM reads Host DT (fdt.c RO)
>> 2) ARM reads passthrough DT (RO)
>> 3) ARM generates dom0/hwdom DT from Host DT (there is a mix of WIP and SW APIs)
>> 4) ARM generates domU DT (there is a mix of WIP and SW APIs)
>> 4) With EFI enabled - ARM needs RW API and fdt_empty_tree
>> 5) With CONFIG_OVERLAY_DTB - ARM needs RW and fdt_overlay API
> 
> This goes too far, imo.
> 
>> --- /dev/null
>> +++ b/xen/common/libfdt/Kconfig
>> @@ -0,0 +1,14 @@
>> +config LIBFDT_WIP

"Write-in-place"
- update property in place
- NOP the property or node
(no resize)

>> +	bool
>> +
>> +config LIBFDT_SW

"Sequential-write"
Used to create DT in a buffer sequentially in one pass
fdt_create
  fdt_begin_node
   fdt_property
   ...
  fdt_end_node
...
fdt_finish

>> +    bool
>> +
>> +config LIBFDT_RW

"Full read-write"
- add/del/change nodes or properties in fdt blob
- no automatic resize

>> +    bool
>> +
>> +config LIBFDT_EMPTY_TREE

Enables fdt_create_empty_tree() helper

>> +    bool
>> +
>> +config LIBFDT_OVERLAY

Enables DT overlay helpers (deps: RW, WIP)

>> +    bool
> 
> Nit: Inconsistent indentation.
> 
> Also, how would one be to guess which of these may need selecting? What do
> "WIP", "SW", and "RW" stand for? What exactly would "empty tree" mean? Yes,
> you follow what the files are named under libfdt/, but that naming is
> overly cryptic, too. The comments at the top of these files also don't
> say anything helpful.

Indeed.

-- 
Best regards,
-grygorii



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Date: Tue, 18 Nov 2025 19:43:33 +0000
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Subject: Re: [PATCH 7/8] x86/cpufreq: use host CPU policy for Turbo checking
To: Jan Beulich ,
 "xen-devel@lists.xenproject.org" 
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On 18/11/2025 3:08 pm, Jan Beulich wrote:
> There's no need to invoke CPUID yet another time - we assume symmetry
> anyway. With symmetry assumed, logging per-CPU also isn't very useful.
>
> Signed-off-by: Jan Beulich 

Subject to the feedback from earlier in the series, Reviewed-by: Andrew
Cooper 


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Date: Tue, 18 Nov 2025 20:04:01 +0000
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Subject: Re: [PATCH 8/8] x86/cpufreq: use host CPU policy in HWP driver
To: Jan Beulich ,
 "xen-devel@lists.xenproject.org" 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Jason Andryuk 
References: <53ef6c9a-1115-4bb4-bb7f-e2595ab9d0b6@suse.com>
 
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On 18/11/2025 3:09 pm, Jan Beulich wrote:
> --- a/xen/arch/x86/acpi/cpufreq/hwp.c
> +++ b/xen/arch/x86/acpi/cpufreq/hwp.c
> @@ -183,29 +178,25 @@ static bool __init hwp_available(void)
>          return false;
>      }
>  
> -    eax = cpuid_eax(CPUID_PM_LEAF);
> -
>      hwp_verbose("%d notify: %d act-window: %d energy-perf: %d pkg-level: %d peci: %d\n",
> -                !!(eax & CPUID6_EAX_HWP),
> -                !!(eax & CPUID6_EAX_HWP_NOTIFICATION),
> -                !!(eax & CPUID6_EAX_HWP_ACTIVITY_WINDOW),
> -                !!(eax & CPUID6_EAX_HWP_ENERGY_PERFORMANCE_PREFERENCE),
> -                !!(eax & CPUID6_EAX_HWP_PACKAGE_LEVEL_REQUEST),
> -                !!(eax & CPUID6_EAX_HWP_PECI));
> +                host_cpu_policy.basic.pm.hwp,
> +                host_cpu_policy.basic.pm.hwp_notification,
> +                host_cpu_policy.basic.pm.hwp_activity_window,
> +                host_cpu_policy.basic.pm.hwp_epp,
> +                host_cpu_policy.basic.pm.hwp_plr,
> +                host_cpu_policy.basic.pm.hwp_peci);
>  
> -    if ( !(eax & CPUID6_EAX_HWP) )
> +    if ( !host_cpu_policy.basic.pm.hwp )

I think this justifies a cpu_has_hwp like we have for turbo/arat/etc. 
Similarly for the other features.

>          return false;
>  
> -    if ( !(eax & CPUID6_EAX_HWP_ENERGY_PERFORMANCE_PREFERENCE) )
> +    if ( !host_cpu_policy.basic.pm.hwp_epp )
>      {
>          hwp_verbose("disabled: No energy/performance preference available");
>  
>          return false;
>      }
>  
> -    feature_hwp_notification    = eax & CPUID6_EAX_HWP_NOTIFICATION;
> -    feature_hwp_activity_window = eax & CPUID6_EAX_HWP_ACTIVITY_WINDOW;
> -    feature_hdc                 = eax & CPUID6_EAX_HDC;
> +    feature_hdc                 = host_cpu_policy.basic.pm.hdc;

Looking at how feature_hdc is used, I think it should be the bit within
the host policy, rather than a separate boolean.

The host policy "is" what Xen is using, so if the HWP code decides it
doesn't like HDC, then that does want reflecting.

Unrelated to this patch, but as I've been looking at the code.  What
happens when hwp_init_msrs() fails on an AP?  I can't see anything which
unwinds the initialised HDC state on the prior CPUs...

> @@ -365,7 +357,7 @@ static void cf_check hwp_init_msrs(void
>      }
>  
>      /* Ensure we don't generate interrupts */
> -    if ( feature_hwp_notification )
> +    if ( host_cpu_policy.basic.pm.hwp_notification )
>          wrmsr_safe(MSR_HWP_INTERRUPT, 0);

Again, unrelated to the patch, but why is this a wrmsr_safe() ?

If the feature is enumerated, the MSR had better work.

Things like this start to matter more when we consider the code
generation for wrmsr_safe() using MSR_IMM.

> --- a/xen/arch/x86/include/asm/cpufeature.h
> +++ b/xen/arch/x86/include/asm/cpufeature.h
> @@ -115,14 +115,6 @@ static inline bool boot_cpu_has(unsigned
>  }
>  
>  #define CPUID_PM_LEAF                                6

Doesn't this patch drop the final user?

~Andrew


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Subject: Re: [PATCH 8/8] x86/cpufreq: use host CPU policy in HWP driver
To: Andrew Cooper , Jan Beulich
	, "xen-devel@lists.xenproject.org"
	
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On 2025-11-18 15:04, Andrew Cooper wrote:
> On 18/11/2025 3:09 pm, Jan Beulich wrote:
>> --- a/xen/arch/x86/acpi/cpufreq/hwp.c
>> +++ b/xen/arch/x86/acpi/cpufreq/hwp.c
>> @@ -183,29 +178,25 @@ static bool __init hwp_available(void)

>>           return false;
>>   
>> -    if ( !(eax & CPUID6_EAX_HWP_ENERGY_PERFORMANCE_PREFERENCE) )
>> +    if ( !host_cpu_policy.basic.pm.hwp_epp )
>>       {
>>           hwp_verbose("disabled: No energy/performance preference available");
>>   
>>           return false;
>>       }
>>   
>> -    feature_hwp_notification    = eax & CPUID6_EAX_HWP_NOTIFICATION;
>> -    feature_hwp_activity_window = eax & CPUID6_EAX_HWP_ACTIVITY_WINDOW;
>> -    feature_hdc                 = eax & CPUID6_EAX_HDC;
>> +    feature_hdc                 = host_cpu_policy.basic.pm.hdc;
> 
> Looking at how feature_hdc is used, I think it should be the bit within
> the host policy, rather than a separate boolean.
> 
> The host policy "is" what Xen is using, so if the HWP code decides it
> doesn't like HDC, then that does want reflecting.
> 
> Unrelated to this patch, but as I've been looking at the code.  What
> happens when hwp_init_msrs() fails on an AP?  I can't see anything which
> unwinds the initialised HDC state on the prior CPUs...

Assuming symmetry, it'd fail on the BSP and never get to an AP.  Yes, I 
didn't consider unwinding.

>> @@ -365,7 +357,7 @@ static void cf_check hwp_init_msrs(void
>>       }
>>   
>>       /* Ensure we don't generate interrupts */
>> -    if ( feature_hwp_notification )
>> +    if ( host_cpu_policy.basic.pm.hwp_notification )
>>           wrmsr_safe(MSR_HWP_INTERRUPT, 0);
> 
> Again, unrelated to the patch, but why is this a wrmsr_safe() ?

It seemed safer ;)

> If the feature is enumerated, the MSR had better work.

Yes, but I wasn't sure how much to trust it.  I only tested with 2 
processor models, so I wanted to be safer.  IIRC, I saw a #GP or two 
during development.  Those might have been from writing a reserved bit 
and fixed during development.

Given my small testing size, I wanted to keep it safe and not take down Xen.

Regards,
Jason


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Subject: Re: [PATCH v1 1/7] xen/svm: limit the scope of "rc"
To: "Penny, Zheng" , Jan Beulich 
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On 2025-11-18 02:11, Penny, Zheng wrote:
>> -----Original Message-----
>> From: Jan Beulich 
>> On 13.11.2025 04:16, Penny Zheng wrote:
>>> To make codes less fragile, we limit the scope of "rc" through adding
>>> several instances in relatively narrow scopes. We also fixes wrong indentation.
>>>
>>> Suggested-by: Jan Beulich 
>>> Signed-off-by: Penny Zheng 
>>
>> Reviewed-by: Jan Beulich 

>> As you touch the code anyway, make this the initializer of rc? And at the same time
>> join the latter two lines? (I may take the liberty of making these adjustments while
>> committing.)
>>
> 
> Thx, plz

Reviewed-by: Jason Andryuk 


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Subject: Re: [PATCH v1 2/7] xen/vm_event: introduce vm_event_is_enabled()
To: "Penny, Zheng" , Jan Beulich 
CC: Andrew Cooper ,
	=?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Tamas K Lengyel
	, Alexandru Isaila , "Petre
 Pircalabu" , Grygorii Strashko
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References: <20251113031630.1465599-1-Penny.Zheng@amd.com>
 <20251113031630.1465599-3-Penny.Zheng@amd.com>
 <8c74b068-ba9a-4867-8d39-31c77f3cc339@suse.com>
 
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On 2025-11-18 05:11, Penny, Zheng wrote:
> [Public]
> 
>> -----Original Message-----
>> From: Jan Beulich 
>> Sent: Thursday, November 13, 2025 5:14 PM
>> To: Penny, Zheng 
>> Cc: Andrew Cooper ; Roger Pau Monné
>> ; Andryuk, Jason ; Tamas K
>> Lengyel ; Alexandru Isaila ;
>> Petre Pircalabu ; Grygorii Strashko
>> ; xen-devel@lists.xenproject.org
>> Subject: Re: [PATCH v1 2/7] xen/vm_event: introduce vm_event_is_enabled()
>>
>> On 13.11.2025 04:16, Penny Zheng wrote:
>>> Function vm_event_is_enabled() is introduced to check if vm event is
>>> enabled, and also make the checking conditional upon CONFIG_VM_EVENT,
>>> which could help DCE a lot unreachable calls/codes, such as
>>> hvm_monitor_io(), etc, when having VM_EVENT=n.
>>>
>>> Signed-off-by: Penny Zheng 
>> I guess I might as well do the adjustments while committing, even if it's quite a few
>> of them. In any event, with the adjustments
>> Acked-by: Jan Beulich 
> 
> Mant thanks

Reviewed-by: Jason Andryuk 

Regards,
Jason


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Subject: Re: [PATCH v1 3/7] xen/monitor: wrap monitor_op under CONFIG_VM_EVENT
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 Pircalabu" , 
References: <20251113031630.1465599-1-Penny.Zheng@amd.com>
 <20251113031630.1465599-4-Penny.Zheng@amd.com>
 
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On 2025-11-13 04:18, Jan Beulich wrote:
> On 13.11.2025 04:16, Penny Zheng wrote:
>> Feature monitor_op is based on vm event subsystem, so monitor.o shall be
>> wrapped under CONFIG_VM_EVENT.
>> The following functions are only invoked by monitor-op, so they all shall be
>> wrapped with CONFIG_VM_EVENT (otherwise they will become unreachable and
>> violate Misra rule 2.1 when VM_EVENT=n):
>> - hvm_enable_msr_interception
>>    - hvm_function_table.enable_msr_interception
>> - hvm_has_set_descriptor_access_existing
>>    - hvm_function_table.set_descriptor_access_existi
>> - arch_monitor_get_capabilities
>> Function monitored_msr() still needs a stub to pass compilation when
>> VM_EVENT=n.
>>
>> Signed-off-by: Penny Zheng 
>> ---
>> v3 -> v4:
>> - a new commit split from previous "xen/vm_event: consolidate CONFIG_VM_EVENT"
>> - Another blank line ahead of the #ifdef
>> - Move hvm_enable_msr_interception() up into the earlier #ifdef
>> - only arch_monitor_get_capabilities() needs wrapping, as this static inline
>> function calls hvm_has_set_descriptor_access_exiting(), which is declared only
>> when VM_EVENT=y
>> ---
>>   xen/arch/x86/hvm/Makefile          |  2 +-
>>   xen/arch/x86/hvm/svm/svm.c         |  8 +++++++-
>>   xen/arch/x86/hvm/vmx/vmx.c         | 10 ++++++++++
>>   xen/arch/x86/include/asm/hvm/hvm.h | 18 +++++++++++-------
>>   xen/arch/x86/include/asm/monitor.h |  9 +++++++++
>>   5 files changed, 38 insertions(+), 9 deletions(-)
> 
> Same remark as for patch 2 regarding the subject prefix. Then
> Acked-by: Jan Beulich 

Reviewed-by: Jason Andryuk 


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On 2025-11-18 06:09, Penny, Zheng wrote:
> [Public]
> 
>> -----Original Message-----
>> From: Jan Beulich 
>> Sent: Thursday, November 13, 2025 5:35 PM
>> To: Penny, Zheng 
>> Cc: Andrew Cooper ; Roger Pau Monné
>> ; Tamas K Lengyel ; Alexandru
>> Isaila ; Petre Pircalabu ;
>> xen-devel@lists.xenproject.org
>> Subject: Re: [PATCH v1 5/7] xen/x86: move declaration from mem_access.h to
>> altp2m.h
>>
>> On 13.11.2025 04:16, Penny Zheng wrote:
>>> Memory access and ALTP2M are two seperate features, and each could be
>>> controlled via VM_EVENT or ALTP2M. In order to avoid implicit
>>> declaration when ALTP2M=y and VM_EVENT=n on compiling hvm.o/altp2m.o,
>>> we move declaration of the following functions from  to
>> :
>>> - p2m_set_suppress_ve
>>> - p2m_set_suppress_ve_multi
>>> - p2m_get_suppress_ve
>>> Potential error on altp2m.c also breaks Misra Rule 8.4.
>>>
>>> Signed-off-by: Penny Zheng 
>>
>> Reviewed-by: Jan Beulich 
>>
> 
> Thx

Reviewed-by: Jason Andryuk 


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Subject: Re: [PATCH v1 7/7] xen/vm_event: consolidate CONFIG_VM_EVENT
To: Jan Beulich , Penny Zheng 
CC: Andrew Cooper ,
	=?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini , "Tamas
 K Lengyel" , Alexandru Isaila ,
	Petre Pircalabu , "Daniel P. Smith"
	, Grygorii Strashko
	, 
References: <20251113031630.1465599-1-Penny.Zheng@amd.com>
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On 2025-11-13 05:16, Jan Beulich wrote:
> On 13.11.2025 04:16, Penny Zheng wrote:
>> File hvm/vm_event.c and x86/vm_event.c are the extend to vm_event handling
>> routines, and its compilation shall be guarded by CONFIG_VM_EVENT too.
>>
>> Although CONFIG_VM_EVENT is right now forcibly enabled on x86 via
>> MEM_ACCESS_ALWAYS_ON, we could disable it through disabling
>> CONFIG_MGMT_HYPERCALLS later. So we remove MEM_ACCESS_ALWAYS_ON and
>> make VM_EVENT=y on default only on x86 to retain the same.
>>
>> The following functions are developed on the basis of vm event framework, or
>> only invoked by vm_event.c, so they all shall be wrapped with CONFIG_VM_EVENT
>> (otherwise they will become unreachable and
>> violate Misra rule 2.1 when VM_EVENT=n):
>> - hvm_toggle_singlestep
>> - hvm_fast_singlestep
>> - hvm_emulate_one_vm_event
>>      - hvmemul_write{,cmpxchg,rep_ins,rep_outs,rep_movs,rep_stos,read_io,write_io}_discard
>> And Function vm_event_check_ring() needs stub to pass compilation when
>> VM_EVENT=n.
>>
>> Signed-off-by: Penny Zheng 
>> ---
>> v1 -> v2:
>> - split out XSM changes
> 
> Isn't that split out patch also needed as a prereq to the one here? The one
> here on its own:
> Acked-by: Jan Beulich 

Reviewed-by: Jason Andryuk 


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From: "Penny, Zheng" 
To: "Hildebrand, Stewart" ,
	"xen-devel@lists.xenproject.org" ,
	"xen-devel@dornerworks.com" 
CC: "Huang, Ray" , "oleksii.kurochko@gmail.com"
	, Andrew Cooper ,
	Anthony PERARD , "Orzel, Michal"
	, Jan Beulich , Julien Grall
	, =?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?=
	, Stefano Stabellini , Bertrand
 Marquis , Volodymyr Babchuk
	, Alistair Francis ,
	Bob Eshleman , Connor Davis ,
	Nathan Studer , Stewart Hildebrand
	, Dario Faggioli , Juergen Gross
	, George Dunlap , "Daniel P. Smith"
	
Subject: RE: [PATCH v3 05/28] xen/sysctl: replace CONFIG_SYSCTL with
 CONFIG_MGMT_DOMCTL
Thread-Topic: [PATCH v3 05/28] xen/sysctl: replace CONFIG_SYSCTL with
 CONFIG_MGMT_DOMCTL
Thread-Index: AQHcPCp8W9F3cPi2vkONW8in9Aw31LTZvQMAgCAHPaA=
Date: Wed, 19 Nov 2025 06:33:06 +0000
Message-ID:
 
References: <20251013101540.3502842-1-Penny.Zheng@amd.com>
 <20251013101540.3502842-6-Penny.Zheng@amd.com>
 
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Subject: Re: [PATCH 2/8] x86/cpu-policy: define bits of leaf 6
To: Andrew Cooper 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Teddy Astie ,
 "xen-devel@lists.xenproject.org" 
References: <53ef6c9a-1115-4bb4-bb7f-e2595ab9d0b6@suse.com>
 
 
 
 
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On 18.11.2025 18:20, Andrew Cooper wrote:
> On 18/11/2025 4:53 pm, Jan Beulich wrote:
>> On 18.11.2025 16:30, Andrew Cooper wrote:
>>> On 18/11/2025 3:06 pm, Jan Beulich wrote:
>>>> --- a/xen/include/xen/lib/x86/cpu-policy.h
>>>> +++ b/xen/include/xen/lib/x86/cpu-policy.h
>>>> @@ -121,7 +121,31 @@ struct cpu_policy
>>>>              uint64_t :64, :64; /* Leaf 0x3 - PSN. */
>>>>              uint64_t :64, :64; /* Leaf 0x4 - Structured Cache. */
>>>>              uint64_t :64, :64; /* Leaf 0x5 - MONITOR. */
>>>> -            uint64_t :64, :64; /* Leaf 0x6 - Therm/Perf. */
>>>> +
>>>> +            /* Leaf 0x6 - Therm/Perf. */
>>>> +            struct {
>>>> +                uint32_t /* a */:1,
>>>> +                    turbo:1,
>>>> +                    arat:1,
>>>> +                    :4,
>>>> +                    hwp:1,
>>>> +                    hwp_notification:1,
>>>> +                    hwp_activity_window:1,
>>>> +                    hwp_epp:1,
>>>> +                    hwp_plr:1,
>>>> +                    :1,
>>>> +                    hdc:1,
>>>> +                    :2,
>>>> +                    hwp_peci:1,
>>>> +                    :2,
>>>> +                    hw_feedback:1,
>>>> +                    :12;
>>>> +                uint32_t /* b */:32;
>>>> +                uint32_t /* c */ aperfmperf:1,
>>>> +                    :31;
>>>> +                uint32_t /* d */:32;
>>> Elsewhere, single bit fields are bool foo:1, and these want to match for
>>> consistency.
>> Oh, yes, will change.
>>
>>>   In particular using uint32_t:1 creates a latent bug in
>>> patch 8.
>> I don't see where that would be.
> 
> In the printf.  %d vs %u.  Latent because it's ok until bit 31 gets
> used, and then it's not ok.

How would there be a difference? Every bit is individually unsigned when
the field type is uint32_t, so even bit 31 will cleanly produce 0 / 1
when read.

>>> One problem with bool bitfields is that your :4 needs to become 4x :1. 
>>> Right now his hidden in the macros that gen-cpuid.py makes.
>>>
>>> Given that b is of type uint32_t, you can omit the :12 from the end of a
>>> and leave a comment.  Similarly, the trailing :31 on c can be dropped.
>> We have these in many other places, and omitting in particular the :31
>> would also feel somewhat fragile / misleading. It'll need to be
>>
>>                 bool     /* c */ aperfmperf:1;
>>                 uint32_t :31;
>>
>> or something along these lines.
> 
> This doesn't work.  A gap of 31 bits gets inserted because of uint32_t's
> alignment, which is why the suggestion to ignore it does work (even if
> fragile).

Interesting. When (iirc) we converted the AMD IOMMU machinery to use
struct-s, it was me to be concerned of this, and you telling me the
opposite of what you say now. See how there's no problem in e.g.
struct amd_iommu_dte.

> I suggest a /* 31 spare bits */ comment, because the only other option
> is 31x :1's.

I'll do this differently anyway, ..

>>>> +            } pm;
>>> Nothing else is sub-scoped.  I'd prefer that you drop the 'pm'.
>> Wouldn't that require the use of the very extension you just talked about
>> at the committer's call?
> 
> No. It would just be a plain anonymous struct in this case, but it
> doesn't even need to be a struct.

... having realized over night that this would be what you ask for, and ...

> leaf 0,2,10 are all "top level" insofar as they're all inside .basic. 
> leaf 1 only has anonymous unions to join the the bitfield names and the
> field-wide name.

... getting things closer to what we use there:

            union {
                uint32_t _6c;
                struct { ... };
            };

Then I can safely and obviously omit any unused tail bits in the bitfield
set. I hope that's going to be okay with you.

Jan


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Subject: Re: [PATCH 4/8] x86: replace APERFMPERF synthetic feature bit
To: Andrew Cooper 
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On 18.11.2025 16:41, Andrew Cooper wrote:
> On 18/11/2025 3:07 pm, Jan Beulich wrote:
>> Use the respective host CPU policy bit instead.
>>
>> Signed-off-by: Jan Beulich 
> 
> Right now, the synthetic features get levelled across the system.  Now,
> we take the BSP's copy.
> 
> This change is broadly fine, but it does need mentioning in the commit
> message.

"Use the respective host CPU policy bit instead. This has the (tolerable,
 as we generally assume symmetry anyway) effect of using the BSP's
 (unleveled) setting, rather than the result of leveling (as is done by
 identify_cpu() on boot_cpu_data, rendering the variable name somewhat
 misleading)."

?

> One thing we may want to do is take greater care to get the
> masking/levelling MSRs properly level.  Right now, if they're asymmetric
> for any reason, we would previously end up using the common subset.

Possibly; I'd prefer to leave that to you, though.

>> --- a/xen/arch/x86/include/asm/cpufeature.h
>> +++ b/xen/arch/x86/include/asm/cpufeature.h
>> @@ -11,7 +11,9 @@
>>  #include 
>>  
>>  #ifndef __ASSEMBLY__
>> +#include 
>>  #include 
>> +#include 
> 
> Why both?

The former declares host_cpu_policy, while the latter defines struct cpu_policy.
And neither of the two #include-s the other, afaics.

Jan


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On 18.11.2025 17:38, Andrew Cooper wrote:
> On 18/11/2025 3:07 pm, Jan Beulich wrote:
>> Add a XEN infix, to properly distinguish it from the CPUID feature flag
>> (leaf 6 EAX bit 2).
>>
>> Signed-off-by: Jan Beulich 
>> ---
>> Question is whether we still need opt_arat (and the command line option),
>> or whether we could go directly from the CPUID bit (overriding it to on
>> for older AMD [and Hygon?] CPUs). Or whether to have opt_arat affect the
>> (host) CPU policy directly.
> 
> I have no particular love for opt_arat.  I added it when there was no
> way to force a system to fall back to an older timer.
> 
> As long as we've got some way of configuring the exact timer to, I'm not
> fussed about keeping the top level boolean.

But the question is what the replacement would look like. Is it okay to
override bits to true in the host policy? (It may be as long as we don't
expose this in the guest policies, but at some point we may want or even
need to.) Would the command line option also go away (in favor of
integrating with cpuid=, which would require extra logic as long as we
don't put leaf 6 bits in public/arch-x86/cpufeatureset.h)?

IOW for the patch at hand I wouldn't mean to make adjustments. The remark
was more towards further, future adjustments.

Jan


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Date: Wed, 19 Nov 2025 08:40:31 +0100
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Subject: Re: [PATCH 6/8] x86/Intel: use host CPU policy for ARAT checking
To: Andrew Cooper 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 "xen-devel@lists.xenproject.org" 
References: <53ef6c9a-1115-4bb4-bb7f-e2595ab9d0b6@suse.com>
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From: Jan Beulich 
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On 18.11.2025 20:42, Andrew Cooper wrote:
> On 18/11/2025 3:08 pm, Jan Beulich wrote:
>> There's no need to invoke CPUID yet another time. However, as the host CPU
>> policy is set up only shortly after init_intel() ran on the BSP, defer the
>> logic to a pre-SMP initcall. This can't be (a new) one in cpu/intel.c
>> though, as that's linked after acpi/cpu_idle.c (which is where we already
>> need the feature set). Since opt_arat is local to the cpu/ subtree,
>> introduce a new Intel-specific helper to hold the code needed.
>>
>> Further, as we assume symmetry anyway, use setup_force_cpu_cap() and hence
>> limit the checking to the boot CPU.
>>
>> Signed-off-by: Jan Beulich 
>> ---
>> The need to move where cpu_has_arat is checked would go away if we did
>> away with opt_arat (as mentioned in the previous patch), and hence could
>> use cpu_has_arat directly where right now XEN_ARAT is checked.
>>
>> --- a/xen/arch/x86/acpi/cpu_idle.c
>> +++ b/xen/arch/x86/acpi/cpu_idle.c
>> @@ -1666,6 +1666,9 @@ static int __init cf_check cpuidle_presm
>>  {
>>      void *cpu = (void *)(long)smp_processor_id();
>>  
>> +    if ( boot_cpu_data.vendor == X86_VENDOR_INTEL )
>> +        intel_init_arat();
> 
> I really would prefer to avoid the need for this.

So would I, but ...

> Now that microcode loading has moved to the start of day, we can drop
> most of the order-of-init complexity for CPUID/etc, and I expect that
> problems like this will cease to exist as a result.
> 
> Notably, we've now got no relevant difference between early_init() and
> regular init().  That was a complexity we inherited from Linux.

... I don't see how this leads to any concrete suggestion as to better
arrangements. With cpu_has_arat using the host policy now,
setup_force_cpu_cap(X86_FEATURE_XEN_ARAT) being conditional upon that
has to run _after_ calculate_host_policy(), which in turn runs after
intel_init(). We could add a .c_late_init hook to struct cpu_dev, but
doing so felt like overkill for the purpose here. Plus it feels like
that wouldn't really address your concern either.

Jan


From xen-devel-bounces@lists.xenproject.org Wed Nov 19 07:54:20 2025
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From: Harry Ramsey 
To: xen-devel@lists.xenproject.org
Cc: Luca.Fancellu@arm.com,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk 
Subject: [PATCH v3 2/3] arm/mpu: Implement reference counting for inclusive regions
Date: Wed, 19 Nov 2025 07:53:50 +0000
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Implement reference counting to enable inclusive MPU regions. An
inclusive region is defined as a region encapsulated inside a
previously allocated region sharing the same permissions.

Reference counts are incremented and decremented in
xen_mpumap_update_entry. A region will be destroyed if the reference
count is 0 upon calling destroy_xen_mappings and if the full region
range is specified.

Additionally XEN_MPUMAP_ENTRY_SHIFT and XEN_MPUMAP_ENTRY_SHIFT_ZERO are
no longer hardcoded and defined inside asm-offsets.c.

Signed-off-by: Harry Ramsey 
Reviewed-by: Michal Orzel 
---
Changes in v3:
- Return early when checking memory attribute condtions
- Replace references with refcount
Changes in v2:
- Improve clarity with regards to MPU inclusive regions
- Fix code format issues
---
 xen/arch/arm/arm32/asm-offsets.c         |  2 +
 xen/arch/arm/arm64/asm-offsets.c         |  2 +
 xen/arch/arm/include/asm/arm32/mpu.h     |  2 +
 xen/arch/arm/include/asm/arm64/mpu.h     |  2 +
 xen/arch/arm/include/asm/mpu/regions.inc | 11 +++-
 xen/arch/arm/mpu/mm.c                    | 73 +++++++++++++++++++-----
 6 files changed, 76 insertions(+), 16 deletions(-)

diff --git a/xen/arch/arm/arm32/asm-offsets.c b/xen/arch/arm/arm32/asm-offsets.c
index c203ce269d..951f8d03f3 100644
--- a/xen/arch/arm/arm32/asm-offsets.c
+++ b/xen/arch/arm/arm32/asm-offsets.c
@@ -79,6 +79,8 @@ void __dummy__(void)
 #ifdef CONFIG_MPU
    DEFINE(XEN_MPUMAP_MASK_sizeof, sizeof(xen_mpumap_mask));
    DEFINE(XEN_MPUMAP_sizeof, sizeof(xen_mpumap));
+   DEFINE(XEN_MPUMAP_ENTRY_SHIFT, ilog2(sizeof(pr_t)));
+   DEFINE(XEN_MPUMAP_ENTRY_ZERO_OFFSET, sizeof(prbar_t) + sizeof(prlar_t));
    BLANK();
 #endif
 }
diff --git a/xen/arch/arm/arm64/asm-offsets.c b/xen/arch/arm/arm64/asm-offsets.c
index 320289b281..38a3894a3b 100644
--- a/xen/arch/arm/arm64/asm-offsets.c
+++ b/xen/arch/arm/arm64/asm-offsets.c
@@ -73,6 +73,8 @@ void __dummy__(void)
 #ifdef CONFIG_MPU
    DEFINE(XEN_MPUMAP_MASK_sizeof, sizeof(xen_mpumap_mask));
    DEFINE(XEN_MPUMAP_sizeof, sizeof(xen_mpumap));
+   DEFINE(XEN_MPUMAP_ENTRY_SHIFT, ilog2(sizeof(pr_t)));
+   DEFINE(XEN_MPUMAP_ENTRY_ZERO_OFFSET, sizeof(prbar_t) + sizeof(prlar_t));
    BLANK();
 #endif
 }
diff --git a/xen/arch/arm/include/asm/arm32/mpu.h b/xen/arch/arm/include/asm/arm32/mpu.h
index 0a6930b3a0..137022d922 100644
--- a/xen/arch/arm/include/asm/arm32/mpu.h
+++ b/xen/arch/arm/include/asm/arm32/mpu.h
@@ -39,6 +39,8 @@ typedef union {
 typedef struct {
     prbar_t prbar;
     prlar_t prlar;
+    uint8_t refcount;
+    uint8_t pad[7];     /* Pad structure to 16 Bytes */
 } pr_t;
 
 #endif /* __ASSEMBLY__ */
diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h
index f0ce344e78..17f62ccaf6 100644
--- a/xen/arch/arm/include/asm/arm64/mpu.h
+++ b/xen/arch/arm/include/asm/arm64/mpu.h
@@ -38,6 +38,8 @@ typedef union {
 typedef struct {
     prbar_t prbar;
     prlar_t prlar;
+    uint8_t refcount;
+    uint8_t pad[15];    /* Pad structure to 32 Bytes */
 } pr_t;
 
 #endif /* __ASSEMBLY__ */
diff --git a/xen/arch/arm/include/asm/mpu/regions.inc b/xen/arch/arm/include/asm/mpu/regions.inc
index 23fead3b21..0cdbb17bc3 100644
--- a/xen/arch/arm/include/asm/mpu/regions.inc
+++ b/xen/arch/arm/include/asm/mpu/regions.inc
@@ -14,14 +14,12 @@
 #define PRLAR_ELx_EN            0x1
 
 #ifdef CONFIG_ARM_64
-#define XEN_MPUMAP_ENTRY_SHIFT  0x4     /* 16 byte structure */
 
 .macro store_pair reg1, reg2, dst
     stp \reg1, \reg2, [\dst]
 .endm
 
 #else
-#define XEN_MPUMAP_ENTRY_SHIFT  0x3     /* 8 byte structure */
 
 .macro store_pair reg1, reg2, dst
     strd  \reg1, \reg2, [\dst]
@@ -97,6 +95,15 @@
 
 3:
 
+    /* Clear the rest of the xen_mpumap entry. */
+#ifdef CONFIG_ARM_64
+    stp xzr, xzr, [\base, #XEN_MPUMAP_ENTRY_ZERO_OFFSET]
+#else
+    mov \prbar, #0
+    mov \prlar, #0
+    strd \prbar, \prlar, [\base, #XEN_MPUMAP_ENTRY_ZERO_OFFSET]
+#endif
+
     add   \sel, \sel, #1
 
 1:
diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
index b80edcf1ca..29dd8c4622 100644
--- a/xen/arch/arm/mpu/mm.c
+++ b/xen/arch/arm/mpu/mm.c
@@ -106,6 +106,7 @@ pr_t pr_of_addr(paddr_t base, paddr_t limit, unsigned int flags)
     region = (pr_t) {
         .prbar = prbar,
         .prlar = prlar,
+        .refcount = 0,
     };
 
     /* Set base address and limit address. */
@@ -170,6 +171,35 @@ int mpumap_contains_region(pr_t *table, uint8_t nr_regions, paddr_t base,
     return MPUMAP_REGION_NOTFOUND;
 }
 
+static bool is_mm_attr_match(pr_t *region, unsigned int attributes)
+{
+    if ( region->prbar.reg.ro != PAGE_RO_MASK(attributes) )
+    {
+        printk(XENLOG_WARNING
+               "Mismatched Access Permission attributes (%#x instead of %#x)\n",
+               region->prbar.reg.ro, PAGE_RO_MASK(attributes));
+        return false;
+    }
+
+    if ( region->prbar.reg.xn != PAGE_XN_MASK(attributes) )
+    {
+        printk(XENLOG_WARNING
+               "Mismatched Execute Never attributes (%#x instead of %#x)\n",
+               region->prbar.reg.xn, PAGE_XN_MASK(attributes));
+        return false;
+    }
+
+    if ( region->prlar.reg.ai != PAGE_AI_MASK(attributes) )
+    {
+        printk(XENLOG_WARNING
+               "Mismatched Memory Attribute Index (%#x instead of %#x)\n",
+               region->prlar.reg.ai, PAGE_AI_MASK(attributes));
+        return false;
+    }
+
+    return true;
+}
+
 /* Map a frame table to cover physical addresses ps through pe */
 void __init setup_frametable_mappings(paddr_t ps, paddr_t pe)
 {
@@ -284,22 +314,26 @@ static int xen_mpumap_update_entry(paddr_t base, paddr_t limit,
 
     flags_has_page_present = flags & _PAGE_PRESENT;
 
-    /* Currently we don't support modifying an existing entry. */
+    /*
+    * Currently, we only support removing/modifying a *WHOLE* MPU memory
+    * region. Part-region removal/modification is not supported as in the worst
+    * case it will leave two/three fragments behind.
+    */
     if ( flags_has_page_present && (rc >= MPUMAP_REGION_FOUND) )
     {
-        printk("Modifying an existing entry is not supported\n");
-        return -EINVAL;
-    }
+        if ( !is_mm_attr_match(&xen_mpumap[idx], flags) )
+        {
+            printk("Modifying an existing entry is not supported\n");
+            return -EINVAL;
+        }
 
-    /*
-     * Currently, we only support removing/modifying a *WHOLE* MPU memory
-     * region. Part-region removal/modification is not supported as in the worst
-     * case it will leave two/three fragments behind.
-     */
-    if ( rc == MPUMAP_REGION_INCLUSIVE )
-    {
-        printk("Part-region removal/modification is not supported\n");
-        return -EINVAL;
+        /* Check for overflow of refcount before incrementing.  */
+        if ( xen_mpumap[idx].refcount == 0xFF )
+        {
+            printk("Cannot allocate region as it would cause refcount overflow\n");
+            return -ENOENT;
+        }
+        xen_mpumap[idx].refcount += 1;
     }
 
     /* We are inserting a mapping => Create new region. */
@@ -323,7 +357,18 @@ static int xen_mpumap_update_entry(paddr_t base, paddr_t limit,
             return -EINVAL;
         }
 
-        disable_mpu_region_from_index(idx);
+        if ( xen_mpumap[idx].refcount == 0 )
+        {
+            if ( MPUMAP_REGION_FOUND == rc )
+                disable_mpu_region_from_index(idx);
+            else
+            {
+                printk("Cannot remove a partial region\n");
+                return -EINVAL;
+            }
+        }
+        else
+            xen_mpumap[idx].refcount -= 1;
     }
 
     return 0;
-- 
2.43.0



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	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk 
Subject: [PATCH v3 3/3] arm/mpu: Implement ioremap_attr for MPU
Date: Wed, 19 Nov 2025 07:53:51 +0000
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Implement the function `ioremap_attr` for MPU systems.

Signed-off-by: Harry Ramsey 
Acked-by: Michal Orzel 
---
 xen/arch/arm/mpu/mm.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
index 29dd8c4622..f25560d746 100644
--- a/xen/arch/arm/mpu/mm.c
+++ b/xen/arch/arm/mpu/mm.c
@@ -473,8 +473,13 @@ void free_init_memory(void)
 
 void __iomem *ioremap_attr(paddr_t start, size_t len, unsigned int flags)
 {
-    BUG_ON("unimplemented");
-    return NULL;
+    paddr_t start_pg = round_pgdown(start);
+    paddr_t end_pg = round_pgup(start_pg + len);
+    if ( xen_mpumap_update(start_pg, end_pg, flags) )
+        return NULL;
+
+    /* Mapped or already mapped */
+    return maddr_to_virt(start_pg);
 }
 
 /*
-- 
2.43.0



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	Stefano Stabellini ,
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	Volodymyr Babchuk 
Subject: [PATCH v3 1/3] arm/mpu: Implement setup_mm for MPU systems
Date: Wed, 19 Nov 2025 07:53:49 +0000
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Implement `setup_mm` for MPU systems. This variant does not require
setting up a direct map.

To reduce code duplication the common initalisation code for both MPU
and MMU Arm64 configurations is refactored into `setup_mm`. Platform-specific
setup steps are now handled by a new helper function `setup_mm_helper`.

Signed-off-by: Harry Ramsey 
---
Changes in v3:
- Remove reference to MPU in comment
Changes in v2:
- Improve clarity with regards to MPU inclusive regions
- Fix code format issues
---
 xen/arch/arm/arm64/mmu/mm.c   | 26 +-------------------
 xen/arch/arm/include/asm/mm.h |  2 ++
 xen/arch/arm/mm.c             | 45 +++++++++++++++++++++++++++++++++++
 xen/arch/arm/mpu/mm.c         | 30 +++++++++++++++++++++--
 4 files changed, 76 insertions(+), 27 deletions(-)

diff --git a/xen/arch/arm/arm64/mmu/mm.c b/xen/arch/arm/arm64/mmu/mm.c
index 3e64be6ae6..70b53be032 100644
--- a/xen/arch/arm/arm64/mmu/mm.c
+++ b/xen/arch/arm/arm64/mmu/mm.c
@@ -4,8 +4,6 @@
 #include 
 #include 
 #include 
-#include 
-#include 

 #include 

@@ -240,33 +238,18 @@ static void __init setup_directmap_mappings(unsigned long base_mfn,
         panic("Unable to setup the directmap mappings.\n");
 }

-void __init setup_mm(void)
+void __init setup_mm_helper(void)
 {
     const struct membanks *banks = bootinfo_get_mem();
     paddr_t ram_start = INVALID_PADDR;
     paddr_t ram_end = 0;
-    paddr_t ram_size = 0;
     unsigned int i;

-    init_pdx();
-
-    /*
-     * We need some memory to allocate the page-tables used for the directmap
-     * mappings. But some regions may contain memory already allocated
-     * for other uses (e.g. modules, reserved-memory...).
-     *
-     * For simplicity, add all the free regions in the boot allocator.
-     */
-    populate_boot_allocator();
-
-    total_pages = 0;
-
     for ( i = 0; i < banks->nr_banks; i++ )
     {
         const struct membank *bank = &banks->bank[i];
         paddr_t bank_end = bank->start + bank->size;

-        ram_size = ram_size + bank->size;
         ram_start = min(ram_start, bank->start);
         ram_end = max(ram_end, bank_end);

@@ -274,16 +257,9 @@ void __init setup_mm(void)
                                  PFN_DOWN(bank->size));
     }

-    total_pages += ram_size >> PAGE_SHIFT;
-
     directmap_virt_end = XENHEAP_VIRT_START + ram_end - ram_start;
     directmap_mfn_start = maddr_to_mfn(ram_start);
     directmap_mfn_end = maddr_to_mfn(ram_end);
-
-    setup_frametable_mappings(ram_start, ram_end);
-
-    init_staticmem_pages();
-    init_sharedmem_pages();
 }

 /*
diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h
index 7a93dad2ed..f702f4a0d6 100644
--- a/xen/arch/arm/include/asm/mm.h
+++ b/xen/arch/arm/include/asm/mm.h
@@ -202,6 +202,8 @@ extern void remove_early_mappings(void);
 extern int prepare_secondary_mm(int cpu);
 /* Map a frame table to cover physical addresses ps through pe */
 extern void setup_frametable_mappings(paddr_t ps, paddr_t pe);
+/* Helper function to setup memory management */
+void setup_mm_helper(void);
 /* map a physical range in virtual memory */
 void __iomem *ioremap_attr(paddr_t start, size_t len, unsigned int attributes);

diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index 3b05b46ee0..6df8b616e4 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -12,8 +12,12 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 

+#include 
+
 #include 

 #include 
@@ -24,6 +28,47 @@

 unsigned long frametable_base_pdx __read_mostly;

+#if defined(CONFIG_ARM_64) || defined(CONFIG_MPU)
+void __init setup_mm(void)
+{
+    const struct membanks *banks = bootinfo_get_mem();
+    paddr_t ram_start = INVALID_PADDR;
+    paddr_t ram_end = 0;
+    paddr_t ram_size = 0;
+    unsigned int i;
+
+    init_pdx();
+
+    for ( i = 0; i < banks->nr_banks; i++ )
+    {
+        const struct membank *bank = &banks->bank[i];
+        paddr_t bank_end = bank->start + bank->size;
+
+        ram_size = ram_size + bank->size;
+        ram_start = min(ram_start, bank->start);
+        ram_end = max(ram_end, bank_end);
+    }
+
+    total_pages = ram_size >> PAGE_SHIFT;
+
+    /*
+     * On MMU systems we need some memory to allocate the page-tables used for
+     * the direct mapmappings. But some regions may contain memory already
+     * allocated for other uses (e.g. modules, reserved-memory...).
+     *
+     * For simplicity, add all the free regions in the boot allocator.
+     */
+    populate_boot_allocator();
+
+    setup_mm_helper();
+
+    setup_frametable_mappings(ram_start, ram_end);
+
+    init_staticmem_pages();
+    init_sharedmem_pages();
+}
+#endif
+
 bool flags_has_rwx(unsigned int flags)
 {
     /*
diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
index 3f155b7db2..b80edcf1ca 100644
--- a/xen/arch/arm/mpu/mm.c
+++ b/xen/arch/arm/mpu/mm.c
@@ -5,12 +5,14 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
 #include 
 #include 
 #include 
+#include 
 #include 

 struct page_info *frame_table;
@@ -378,9 +380,33 @@ int map_pages_to_xen(unsigned long virt, mfn_t mfn, unsigned long nr_mfns,
     return xen_mpumap_update(virt, mfn_to_maddr(mfn_add(mfn, nr_mfns)), flags);
 }

-void __init setup_mm(void)
+/*
+ * Heap must be statically configured in Device Tree through "xen,static-heap"
+ * on MPU systems, use setup_mm_helper() for that.
+ */
+void __init setup_mm_helper(void)
 {
-    BUG_ON("unimplemented");
+    const struct membanks *reserved_mem = bootinfo_get_reserved_mem();
+    unsigned int bank = 0;
+
+    for ( ; bank < reserved_mem->nr_banks; bank++ )
+    {
+        if ( reserved_mem->bank[bank].type == MEMBANK_STATIC_HEAP )
+        {
+            paddr_t bank_start = round_pgup(reserved_mem->bank[bank].start);
+            paddr_t bank_size = round_pgdown(reserved_mem->bank[bank].size);
+            paddr_t bank_end = bank_start + bank_size;
+
+            /* Map static heap with one MPU protection region */
+            if ( xen_mpumap_update(bank_start, bank_end, PAGE_HYPERVISOR) )
+                panic("Failed to map static heap\n");
+
+            break;
+        }
+    }
+
+    if ( bank == reserved_mem->nr_banks )
+        panic("No static heap memory bank found\n");
 }

 int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int nf)
--
2.43.0



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	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk 
Subject: [PATCH v3 0/3] Third MPU Series
Date: Wed, 19 Nov 2025 07:53:48 +0000
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Implement `setup_mm` for MPU systems. This variant does not require
setting up a direct map.

To reduce code duplication the common initalisation code for both MPU
and MMU Arm64 configurations is refactored into `setup_mm`. Platform-specific
setup steps are now handled by a new helper function `setup_mm_helper`.

Harry Ramsey (3):
  arm/mpu: Implement setup_mm for MPU systems
  arm/mpu: Implement reference counting for inclusive regions
  arm/mpu: Implement ioremap_attr for MPU

 xen/arch/arm/arm32/asm-offsets.c         |   2 +
 xen/arch/arm/arm64/asm-offsets.c         |   2 +
 xen/arch/arm/arm64/mmu/mm.c              |  26 +-----
 xen/arch/arm/include/asm/arm32/mpu.h     |   2 +
 xen/arch/arm/include/asm/arm64/mpu.h     |   2 +
 xen/arch/arm/include/asm/mm.h            |   2 +
 xen/arch/arm/include/asm/mpu/regions.inc |  11 ++-
 xen/arch/arm/mm.c                        |  45 +++++++++
 xen/arch/arm/mpu/mm.c                    | 112 +++++++++++++++++++----
 9 files changed, 159 insertions(+), 45 deletions(-)

--
2.43.0



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From: Luca Fancellu 
To: Harry Ramsey 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk 
Subject: Re: [PATCH v3 3/3] arm/mpu: Implement ioremap_attr for MPU
Thread-Topic: [PATCH v3 3/3] arm/mpu: Implement ioremap_attr for MPU
Thread-Index: AQHcWSm12J9R4GyDBUGq1Kes7XNCkLT5ofCA
Date: Wed, 19 Nov 2025 07:57:52 +0000
Message-ID: 
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 <20251119075351.3926690-4-harry.ramsey@arm.com>
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Subject: Re: [PATCH v3 3/3] arm/mpu: Implement ioremap_attr for MPU
To: Harry Ramsey , 
CC: , Stefano Stabellini ,
	Julien Grall , Bertrand Marquis ,
	Volodymyr Babchuk 
References: <20251119075351.3926690-1-harry.ramsey@arm.com>
 <20251119075351.3926690-4-harry.ramsey@arm.com>
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On 19/11/2025 08:53, Harry Ramsey wrote:
> Implement the function `ioremap_attr` for MPU systems.
> 
> Signed-off-by: Harry Ramsey 
> Acked-by: Michal Orzel 
> ---
>  xen/arch/arm/mpu/mm.c | 9 +++++++--
>  1 file changed, 7 insertions(+), 2 deletions(-)
> 
> diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
> index 29dd8c4622..f25560d746 100644
> --- a/xen/arch/arm/mpu/mm.c
> +++ b/xen/arch/arm/mpu/mm.c
> @@ -473,8 +473,13 @@ void free_init_memory(void)
>  
>  void __iomem *ioremap_attr(paddr_t start, size_t len, unsigned int flags)
>  {
> -    BUG_ON("unimplemented");
> -    return NULL;
> +    paddr_t start_pg = round_pgdown(start);
> +    paddr_t end_pg = round_pgup(start_pg + len);
NIT (can be done on commit): There should be a space between initializers and
rest of code. I missed that previously.

~Michal

> +    if ( xen_mpumap_update(start_pg, end_pg, flags) )
> +        return NULL;
> +
> +    /* Mapped or already mapped */
> +    return maddr_to_virt(start_pg);
>  }
>  
>  /*



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Subject: Re: [PATCH 8/8] x86/cpufreq: use host CPU policy in HWP driver
To: Andrew Cooper 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Jason Andryuk ,
 "xen-devel@lists.xenproject.org" 
References: <53ef6c9a-1115-4bb4-bb7f-e2595ab9d0b6@suse.com>
 
 
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On 18.11.2025 21:04, Andrew Cooper wrote:
> On 18/11/2025 3:09 pm, Jan Beulich wrote:
>> --- a/xen/arch/x86/acpi/cpufreq/hwp.c
>> +++ b/xen/arch/x86/acpi/cpufreq/hwp.c
>> @@ -183,29 +178,25 @@ static bool __init hwp_available(void)
>>          return false;
>>      }
>>  
>> -    eax = cpuid_eax(CPUID_PM_LEAF);
>> -
>>      hwp_verbose("%d notify: %d act-window: %d energy-perf: %d pkg-level: %d peci: %d\n",
>> -                !!(eax & CPUID6_EAX_HWP),
>> -                !!(eax & CPUID6_EAX_HWP_NOTIFICATION),
>> -                !!(eax & CPUID6_EAX_HWP_ACTIVITY_WINDOW),
>> -                !!(eax & CPUID6_EAX_HWP_ENERGY_PERFORMANCE_PREFERENCE),
>> -                !!(eax & CPUID6_EAX_HWP_PACKAGE_LEVEL_REQUEST),
>> -                !!(eax & CPUID6_EAX_HWP_PECI));
>> +                host_cpu_policy.basic.pm.hwp,
>> +                host_cpu_policy.basic.pm.hwp_notification,
>> +                host_cpu_policy.basic.pm.hwp_activity_window,
>> +                host_cpu_policy.basic.pm.hwp_epp,
>> +                host_cpu_policy.basic.pm.hwp_plr,
>> +                host_cpu_policy.basic.pm.hwp_peci);
>>  
>> -    if ( !(eax & CPUID6_EAX_HWP) )
>> +    if ( !host_cpu_policy.basic.pm.hwp )
> 
> I think this justifies a cpu_has_hwp like we have for turbo/arat/etc. 
> Similarly for the other features.

Hmm, okay, I can do that. The difference between using boot_cpu_data vs
host_cpu_policy in cpu_has_* is completely that way, which in fact made
me uncertain even for the introduction of the APERFMPERF, ARAT, and
TURBO shorthands.

>>          return false;
>>  
>> -    if ( !(eax & CPUID6_EAX_HWP_ENERGY_PERFORMANCE_PREFERENCE) )
>> +    if ( !host_cpu_policy.basic.pm.hwp_epp )
>>      {
>>          hwp_verbose("disabled: No energy/performance preference available");
>>  
>>          return false;
>>      }
>>  
>> -    feature_hwp_notification    = eax & CPUID6_EAX_HWP_NOTIFICATION;
>> -    feature_hwp_activity_window = eax & CPUID6_EAX_HWP_ACTIVITY_WINDOW;
>> -    feature_hdc                 = eax & CPUID6_EAX_HDC;
>> +    feature_hdc                 = host_cpu_policy.basic.pm.hdc;
> 
> Looking at how feature_hdc is used, I think it should be the bit within
> the host policy, rather than a separate boolean.
> 
> The host policy "is" what Xen is using, so if the HWP code decides it
> doesn't like HDC, then that does want reflecting.

I'm not sure about this. Yes as long as the host policy bits don't propagate
to guest policies. But if they did (and as said earlier, sooner or later we
may want / need to do that for some of the leaf 6 ones), why would the
driver's choice affect what guests get to see? (That's applicable to a fair
degree for the host policy as well: What the driver chooses doesn't need to
match Xen's global view of the world.

>> @@ -365,7 +357,7 @@ static void cf_check hwp_init_msrs(void
>>      }
>>  
>>      /* Ensure we don't generate interrupts */
>> -    if ( feature_hwp_notification )
>> +    if ( host_cpu_policy.basic.pm.hwp_notification )
>>          wrmsr_safe(MSR_HWP_INTERRUPT, 0);
> 
> Again, unrelated to the patch, but why is this a wrmsr_safe() ?
> 
> If the feature is enumerated, the MSR had better work.

Yet as we know when running virtualized ourselves, we can't always rely on
CPUID bits and MSR accessibility to be fully in sync. Yes, using in fact any
cpufreq driver is pretty meaningless when running virtualized, but we don't
prevent that scenario afaict.

> Things like this start to matter more when we consider the code
> generation for wrmsr_safe() using MSR_IMM.

Your patch from August only altered wrmsrns() iirc, hence even if we switched
to wrmsr() here there would be no difference (yet). If wrmsrns() was provably
usable in this case, wouldn't wrmsrns_safe() (yet to be invented) ultimately
be not significantly different in terms of code gen, wrt MSR_IMM? The
difference would continue to be whether there's recovery code; the recovery
code, however, isn't affected by MSR_IMM. Finally, for a purpose like the one
here (infrequently executed code), would the code size increase from trying
to use the immediate form really be justified by the to be expected perf
gain?

>> --- a/xen/arch/x86/include/asm/cpufeature.h
>> +++ b/xen/arch/x86/include/asm/cpufeature.h
>> @@ -115,14 +115,6 @@ static inline bool boot_cpu_has(unsigned
>>  }
>>  
>>  #define CPUID_PM_LEAF                                6
> 
> Doesn't this patch drop the final user?

No, there's one use left in the HWP driver.

Jan


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On 19/11/2025 08:53, Harry Ramsey wrote:
> Implement `setup_mm` for MPU systems. This variant does not require
> setting up a direct map.
> 
> To reduce code duplication the common initalisation code for both MPU
> and MMU Arm64 configurations is refactored into `setup_mm`. Platform-specific
> setup steps are now handled by a new helper function `setup_mm_helper`.
> 
> Signed-off-by: Harry Ramsey 
Reviewed-by: Michal Orzel 

~Michal



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Subject: Re: [PATCH v14 1/4] xen/arm: Implement PSCI SYSTEM_SUSPEND call for
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To: Mykola Kvach , 
CC: Mykola Kvach , Stefano Stabellini
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On 18/11/2025 16:37, Mykola Kvach wrote:
> From: Mykola Kvach 
> 
> Add support for the PSCI SYSTEM_SUSPEND function in the vPSCI interface,
> allowing guests to request suspend via the PSCI v1.0+ SYSTEM_SUSPEND call
> (both 32-bit and 64-bit variants).
> 
> Implementation details:
> - Add SYSTEM_SUSPEND function IDs to PSCI definitions
> - Trap and handle SYSTEM_SUSPEND in vPSCI
> - Allow only non-hardware domains to invoke SYSTEM_SUSPEND; return
>   PSCI_NOT_SUPPORTED for the hardware domain to avoid halting the system
>   in hwdom_shutdown() via domain_shutdown
> - Require all secondary VCPUs of the calling domain to be offline before
>   suspend, as mandated by the PSCI specification
> 
> The arch_domain_resume() function is an architecture-specific hook that is
> invoked during domain resume to perform any necessary setup or restoration
> steps required by the platform.
> 
> The new vpsci_vcpu_up_prepare() helper is called on the resume path to set up
> the vCPU context (such as entry point, some system regs and context ID) before
> resuming a suspended guest. This keeps ARM/vPSCI-specific logic out of common
> code and avoids intrusive changes to the generic resume flow.
> 
> Usage:
> 
> For Linux-based guests, suspend can be initiated with:
>     echo mem > /sys/power/state
> or via:
>     systemctl suspend
> 
> Resuming the guest is performed from control domain using:
>       xl resume 
> 
> Signed-off-by: Mykola Kvach 
> ---
> Changes in V14:
> - move arch_domain_resume to a separate header
> - avoid usage of typeof for context struct
> - moved error printing from domain_resume to arch_domain_resume
>   in order to simplify common parts of code
> - minor changes after review
> ---
>  xen/arch/arm/domain.c                 |  41 +++++++++
>  xen/arch/arm/include/asm/domain.h     |   2 +
>  xen/arch/arm/include/asm/perfc_defn.h |   1 +
>  xen/arch/arm/include/asm/psci.h       |   2 +
>  xen/arch/arm/include/asm/suspend.h    |  24 ++++++
>  xen/arch/arm/include/asm/vpsci.h      |   5 +-
>  xen/arch/arm/vpsci.c                  | 116 +++++++++++++++++++++-----
>  xen/common/domain.c                   |   5 ++
>  xen/include/xen/suspend.h             |  15 ++++
>  9 files changed, 189 insertions(+), 22 deletions(-)
>  create mode 100644 xen/arch/arm/include/asm/suspend.h
>  create mode 100644 xen/include/xen/suspend.h
> 
> diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
> index e36719bce4..3c0170480b 100644
> --- a/xen/arch/arm/domain.c
> +++ b/xen/arch/arm/domain.c
> @@ -12,6 +12,8 @@
>  #include 
>  #include 
>  
> +#include 
> +
>  #include 
>  #include 
>  #include 
> @@ -24,10 +26,12 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  
>  #include "vpci.h"
> @@ -885,6 +889,43 @@ void arch_domain_creation_finished(struct domain *d)
>      p2m_domain_creation_finished(d);
>  }
>  
> +int arch_domain_resume(struct domain *d)
> +{
> +    int rc;
> +    struct resume_info *ctx = &d->arch.resume_ctx;
> +
> +    if ( !d->is_shutting_down || d->shutdown_code != SHUTDOWN_suspend )
> +    {
> +        dprintk(XENLOG_WARNING,
> +                "%pd: Invalid domain state for resume: is_shutting_down=%d, shutdown_code=%d\n",
These are bool and uint, so %u should be used.

> +                d, d->is_shutting_down, d->shutdown_code);
> +        return -EINVAL;
> +    }
> +
> +    /*
> +     * It is still possible to call domain_shutdown() with a suspend reason
> +     * via some hypercalls, such as SCHEDOP_shutdown or SCHEDOP_remote_shutdown.
> +     * In these cases, the resume context will be empty.
> +     * This is not expected to cause any issues, so we just warn about the
> +     * situation and return without error, allowing the existing logic to
> +     * proceed as expected.
> +     */
> +    if ( !ctx->wake_cpu )
> +    {
> +        dprintk(XENLOG_INFO, "%pd: Wake CPU pointer context was not provided\n",
> +                d);
> +        return 0;
> +    }
> +
> +    rc = vpsci_vcpu_up_prepare(ctx->wake_cpu , ctx->ep, ctx->cid);
> +    if ( rc )
> +        printk("%pd: Failed to resume domain (ret %d)\n", d, rc);
> +
> +    memset(ctx, 0, sizeof(*ctx));
> +
> +    return rc;
> +}
> +
>  static int is_guest_pv32_psr(uint32_t psr)
>  {
>      switch (psr & PSR_MODE_MASK)
> diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h
> index af3e168374..e637cb4de0 100644
> --- a/xen/arch/arm/include/asm/domain.h
> +++ b/xen/arch/arm/include/asm/domain.h
> @@ -5,6 +5,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -126,6 +127,7 @@ struct arch_domain
>      void *sci_data;
>  #endif
>  
> +    struct resume_info resume_ctx;
>  }  __cacheline_aligned;
>  
>  struct arch_vcpu
> diff --git a/xen/arch/arm/include/asm/perfc_defn.h b/xen/arch/arm/include/asm/perfc_defn.h
> index effd25b69e..8dfcac7e3b 100644
> --- a/xen/arch/arm/include/asm/perfc_defn.h
> +++ b/xen/arch/arm/include/asm/perfc_defn.h
> @@ -33,6 +33,7 @@ PERFCOUNTER(vpsci_system_reset,        "vpsci: system_reset")
>  PERFCOUNTER(vpsci_cpu_suspend,         "vpsci: cpu_suspend")
>  PERFCOUNTER(vpsci_cpu_affinity_info,   "vpsci: cpu_affinity_info")
>  PERFCOUNTER(vpsci_features,            "vpsci: features")
> +PERFCOUNTER(vpsci_system_suspend,      "vpsci: system_suspend")
>  
>  PERFCOUNTER(vcpu_kick,                 "vcpu: notify other vcpu")
>  
> diff --git a/xen/arch/arm/include/asm/psci.h b/xen/arch/arm/include/asm/psci.h
> index 4780972621..48a93e6b79 100644
> --- a/xen/arch/arm/include/asm/psci.h
> +++ b/xen/arch/arm/include/asm/psci.h
> @@ -47,10 +47,12 @@ void call_psci_system_reset(void);
>  #define PSCI_0_2_FN32_SYSTEM_OFF          PSCI_0_2_FN32(8)
>  #define PSCI_0_2_FN32_SYSTEM_RESET        PSCI_0_2_FN32(9)
>  #define PSCI_1_0_FN32_PSCI_FEATURES       PSCI_0_2_FN32(10)
> +#define PSCI_1_0_FN32_SYSTEM_SUSPEND      PSCI_0_2_FN32(14)
>  
>  #define PSCI_0_2_FN64_CPU_SUSPEND         PSCI_0_2_FN64(1)
>  #define PSCI_0_2_FN64_CPU_ON              PSCI_0_2_FN64(3)
>  #define PSCI_0_2_FN64_AFFINITY_INFO       PSCI_0_2_FN64(4)
> +#define PSCI_1_0_FN64_SYSTEM_SUSPEND      PSCI_0_2_FN64(14)
>  
>  /* PSCI v0.2 affinity level state returned by AFFINITY_INFO */
>  #define PSCI_0_2_AFFINITY_LEVEL_ON      0
> diff --git a/xen/arch/arm/include/asm/suspend.h b/xen/arch/arm/include/asm/suspend.h
> new file mode 100644
> index 0000000000..b991a94d5a
> --- /dev/null
> +++ b/xen/arch/arm/include/asm/suspend.h
> @@ -0,0 +1,24 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +
> +#ifndef __ARM_SUSPEND_H__
There should be no double underscores in guards (see examples in CODING_STYLE)
> +#define __ARM_SUSPEND_H__
> +
> +struct resume_info {
> +    register_t ep;
> +    register_t cid;
> +    struct vcpu *wake_cpu;
> +};
> +
> +int arch_domain_resume(struct domain *d);
If possible, headers should be standalone, meaning you should include necessary
headers or forward declare what's missing.

> +
> +#endif /* __ARM_SUSPEND_H__ */
> +
> + /*
> +  * Local variables:
> +  * mode: C
> +  * c-file-style: "BSD"
> +  * c-basic-offset: 4
> +  * tab-width: 4
> +  * indent-tabs-mode: nil
> +  * End:
> +  */
> diff --git a/xen/arch/arm/include/asm/vpsci.h b/xen/arch/arm/include/asm/vpsci.h
> index 0cca5e6830..d790ab3715 100644
> --- a/xen/arch/arm/include/asm/vpsci.h
> +++ b/xen/arch/arm/include/asm/vpsci.h
> @@ -23,12 +23,15 @@
>  #include 
>  
>  /* Number of function implemented by virtual PSCI (only 0.2 or later) */
> -#define VPSCI_NR_FUNCS  12
> +#define VPSCI_NR_FUNCS  14
>  
>  /* Functions handle PSCI calls from the guests */
>  bool do_vpsci_0_1_call(struct cpu_user_regs *regs, uint32_t fid);
>  bool do_vpsci_0_2_call(struct cpu_user_regs *regs, uint32_t fid);
>  
> +int vpsci_vcpu_up_prepare(struct vcpu *v, register_t entry_point,
> +                          register_t context_id);
> +
>  #endif /* __ASM_VPSCI_H__ */
>  
>  /*
> diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c
> index 7ba9ccd94b..22c3a5f544 100644
> --- a/xen/arch/arm/vpsci.c
> +++ b/xen/arch/arm/vpsci.c
> @@ -10,32 +10,16 @@
>  
>  #include 
>  
> -static int do_common_cpu_on(register_t target_cpu, register_t entry_point,
> -                            register_t context_id)
> +int vpsci_vcpu_up_prepare(struct vcpu *v, register_t entry_point,
> +                   register_t context_id)
NIT: incorrect parameter alignment

>  {
> -    struct vcpu *v;
> -    struct domain *d = current->domain;
> -    struct vcpu_guest_context *ctxt;
>      int rc;
> +    struct domain *d = v->domain;
>      bool is_thumb = entry_point & 1;
> -    register_t vcpuid;
> -
> -    vcpuid = vaffinity_to_vcpuid(target_cpu);
> -
> -    if ( (v = domain_vcpu(d, vcpuid)) == NULL )
> -        return PSCI_INVALID_PARAMETERS;
> -
> -    /* THUMB set is not allowed with 64-bit domain */
> -    if ( is_64bit_domain(d) && is_thumb )
> -        return PSCI_INVALID_ADDRESS;
> -
> -    if ( !test_bit(_VPF_down, &v->pause_flags) )
> -        return PSCI_ALREADY_ON;
> +    struct vcpu_guest_context *ctxt;
>  
>      if ( (ctxt = alloc_vcpu_guest_context()) == NULL )
> -        return PSCI_DENIED;
> -
> -    vgic_clear_pending_irqs(v);
> +        return -ENOMEM;
>  
>      memset(ctxt, 0, sizeof(*ctxt));
>      ctxt->user_regs.pc64 = (u64) entry_point;
> @@ -76,8 +60,37 @@ static int do_common_cpu_on(register_t target_cpu, register_t entry_point,
>      free_vcpu_guest_context(ctxt);
>  
>      if ( rc < 0 )
> +        return rc;
> +
> +    return 0;
> +}
> +
> +static int do_common_cpu_on(register_t target_cpu, register_t entry_point,
> +                            register_t context_id)
> +{
> +    struct vcpu *v;
> +    struct domain *d = current->domain;
> +    int rc;
> +    bool is_thumb = entry_point & 1;
> +    register_t vcpuid;
> +
> +    vcpuid = vaffinity_to_vcpuid(target_cpu);
> +
> +    if ( (v = domain_vcpu(d, vcpuid)) == NULL )
> +        return PSCI_INVALID_PARAMETERS;
> +
> +    /* THUMB set is not allowed with 64-bit domain */
> +    if ( is_64bit_domain(d) && is_thumb )
> +        return PSCI_INVALID_ADDRESS;
> +
> +    if ( !test_bit(_VPF_down, &v->pause_flags) )
> +        return PSCI_ALREADY_ON;
> +
> +    rc = vpsci_vcpu_up_prepare(v, entry_point, context_id);
> +    if ( rc )
>          return PSCI_DENIED;
>  
> +    vgic_clear_pending_irqs(v);
>      vcpu_wake(v);
>  
>      return PSCI_SUCCESS;
> @@ -197,6 +210,48 @@ static void do_psci_0_2_system_reset(void)
>      domain_shutdown(d,SHUTDOWN_reboot);
>  }
>  
> +static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid)
> +{
> +    int32_t rc;
> +    struct vcpu *v;
> +    struct domain *d = current->domain;
> +    bool is_thumb = epoint & 1;
> +
> +    /* THUMB set is not allowed with 64-bit domain */
> +    if ( is_64bit_domain(d) && is_thumb )
> +        return PSCI_INVALID_ADDRESS;
> +
> +    /* SYSTEM_SUSPEND is not supported for the hardware domain yet */
> +    if ( is_hardware_domain(d) )
> +        return PSCI_NOT_SUPPORTED;
> +
> +    /* Ensure that all CPUs other than the calling one are offline */
> +    domain_lock(d);
> +    for_each_vcpu ( d, v )
> +    {
> +        if ( v != current && is_vcpu_online(v) )
> +        {
> +            domain_unlock(d);
> +            return PSCI_DENIED;
> +        }
> +    }
> +    domain_unlock(d);
> +
> +    rc = domain_shutdown(d, SHUTDOWN_suspend);
> +    if ( rc )
> +        return PSCI_DENIED;
> +
> +    d->arch.resume_ctx.ep = epoint;
> +    d->arch.resume_ctx.cid = cid;
> +    d->arch.resume_ctx.wake_cpu = current;
> +
> +    gprintk(XENLOG_DEBUG,
> +            "SYSTEM_SUSPEND requested, epoint=0x%"PRIregister", cid=0x%"PRIregister"\n",
NIT: %# is preffered over 0x%.

> +            epoint, cid);
> +
> +    return rc;
> +}
> +
>  static int32_t do_psci_1_0_features(uint32_t psci_func_id)
>  {
>      /* /!\ Ordered by function ID and not name */
> @@ -214,6 +269,8 @@ static int32_t do_psci_1_0_features(uint32_t psci_func_id)
>      case PSCI_0_2_FN32_SYSTEM_OFF:
>      case PSCI_0_2_FN32_SYSTEM_RESET:
>      case PSCI_1_0_FN32_PSCI_FEATURES:
> +    case PSCI_1_0_FN32_SYSTEM_SUSPEND:
> +    case PSCI_1_0_FN64_SYSTEM_SUSPEND:
>      case ARM_SMCCC_VERSION_FID:
>          return 0;
>      default:
> @@ -344,6 +401,23 @@ bool do_vpsci_0_2_call(struct cpu_user_regs *regs, uint32_t fid)
>          return true;
>      }
>  
> +    case PSCI_1_0_FN32_SYSTEM_SUSPEND:
> +    case PSCI_1_0_FN64_SYSTEM_SUSPEND:
> +    {
> +        register_t epoint = PSCI_ARG(regs, 1);
> +        register_t cid = PSCI_ARG(regs, 2);
> +
> +        if ( fid == PSCI_1_0_FN32_SYSTEM_SUSPEND )
> +        {
> +            epoint &= GENMASK(31, 0);
> +            cid &= GENMASK(31, 0);
> +        }
> +
> +        perfc_incr(vpsci_system_suspend);
> +        PSCI_SET_RESULT(regs, do_psci_1_0_system_suspend(epoint, cid));
> +        return true;
> +    }
> +
>      default:
>          return false;
>      }
> diff --git a/xen/common/domain.c b/xen/common/domain.c
> index 775c339285..6410d32970 100644
> --- a/xen/common/domain.c
> +++ b/xen/common/domain.c
> @@ -26,6 +26,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -1363,6 +1364,9 @@ void domain_resume(struct domain *d)
>  
>      spin_lock(&d->shutdown_lock);
>  
> +    if ( arch_domain_resume(d) )
> +        goto fail;
> +
>      d->is_shutting_down = d->is_shut_down = 0;
>      d->shutdown_code = SHUTDOWN_CODE_INVALID;
>  
> @@ -1373,6 +1377,7 @@ void domain_resume(struct domain *d)
>          v->paused_for_shutdown = 0;
>      }
>  
> + fail:
>      spin_unlock(&d->shutdown_lock);
>  
>      domain_unpause(d);
> diff --git a/xen/include/xen/suspend.h b/xen/include/xen/suspend.h
> new file mode 100644
> index 0000000000..53f75fd6ad
> --- /dev/null
> +++ b/xen/include/xen/suspend.h
> @@ -0,0 +1,15 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +#ifndef __XEN_SUSPEND_H__
There should be no double underscores in guards

> +#define __XEN_SUSPEND_H__
> +
> +#if __has_include()
> +#include 
> +#else
> +static inline int arch_domain_resume(struct domain *d)
> +{
> +    return 0;
> +}
> +#endif
> +
Stray whiteline?

> +
> +#endif /* __XEN_SUSPEND_H__ */
Missing emacs block?

Did you run MISRA scan on this patch?

~Michal




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From: "Teddy Astie" 
Subject: =?utf-8?Q?Re:=20[PATCH=202/2]=20amd/iommu:=20Remove=20dead=20non-atomic=20update=20checking?=
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Le 13/11/2025 =C3=A0 12:39, Jan Beulich a =C3=A9crit=C2=A0:
> On 12.11.2025 16:37, Teddy Astie wrote:
>> When updating a DTE, amd_iommu_setup_domain_device() would check if
>> the update had been non-atomic (i.e rc > 0) and throw a warning if
>> such non-atomic update could be dangerous.  However since commit
>> 3fc44151d83d, rc can no longer be positive, making this branch
>> unreachable code.
> 
> I.e. it addresses a Misra concern and hence ...
> 
>> No functional change intended.
>>
>> Signed-off-by: Teddy Astie 
> 
> ... wants at least an Amends: tag, likely a Fixes: one. Then:

With :

Fixes: 3fc44151d83d ("x86/iommu: remove non-CX16 logic from DMA remapping")

?

As it is the commit that removed the rc > 0 case.

> Reviewed-by: Jan Beulich 
> 
> Jan
> 



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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Subject: Re: [PATCH 2/2] amd/iommu: Remove dead non-atomic update checking
To: Teddy Astie 
Cc: Andrew Cooper ,
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 Jason Andryuk , xen-devel@lists.xenproject.org
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On 19.11.2025 11:22, Teddy Astie wrote:
> Le 13/11/2025 à 12:39, Jan Beulich a écrit :
>> On 12.11.2025 16:37, Teddy Astie wrote:
>>> When updating a DTE, amd_iommu_setup_domain_device() would check if
>>> the update had been non-atomic (i.e rc > 0) and throw a warning if
>>> such non-atomic update could be dangerous.  However since commit
>>> 3fc44151d83d, rc can no longer be positive, making this branch
>>> unreachable code.
>>
>> I.e. it addresses a Misra concern and hence ...
>>
>>> No functional change intended.
>>>
>>> Signed-off-by: Teddy Astie 
>>
>> ... wants at least an Amends: tag, likely a Fixes: one. Then:
> 
> With :
> 
> Fixes: 3fc44151d83d ("x86/iommu: remove non-CX16 logic from DMA remapping")
> 
> ?
> 
> As it is the commit that removed the rc > 0 case.

Yes, that looks to be the one.

Jan


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On 23/10/2025 10:12 am, Teddy Astie wrote:
> diff --git a/xen/drivers/passthrough/vtd/intremap.c b/xen/drivers/passthrough/vtd/intremap.c
> index 612e08bcec..a276518c52 100644
> --- a/xen/drivers/passthrough/vtd/intremap.c
> +++ b/xen/drivers/passthrough/vtd/intremap.c
> @@ -411,11 +411,8 @@ unsigned int cf_check io_apic_read_remap_rte(
>  
>      if ( remap_entry_to_ioapic_rte(iommu, index, &old_rte) )
>          return __io_apic_read(apic, reg);
> -
> -    if ( rte_upper )
> -        return (*(((u32 *)&old_rte) + 1));
> -    else
> -        return (*(((u32 *)&old_rte) + 0));
> +    
> +    return rte_upper ? old_rte.high : old_rte.low;
>  }

This hunk introduces trailing whitespace where there was none previously.

~Andrew


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To: "xen-devel@lists.xenproject.org" 
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From: Jan Beulich 
Subject: [PATCH 0/4] x86: direct APIC vector adjustments
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The setting up of such vectors really is a boot-time-only thing. vPMU also
doesn't need any vector when it's no in use anyway (which is the default).

1: guest: move allocation of Xen upcall vector to init code
2: MCE: restrict allocation of thermal and CMCI vector to BSP
3: IRQ: direct-APIC-vector setting is now init-only
4: vPMU: don't statically reserve the interrupt vector

Jan


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There's no need to do this every time init_evtchn() is called. Just do it
once when setting up CPU0. Drop the assertion as well, as
alloc_hipriority_vector() (called by alloc_direct_apic_vector()) uses more
restrictive BUG_ON() anyway. Then evtchn_upcall_vector can also validly
become ro-after-init, just that it needs to move out of init_evtchn().

Signed-off-by: Jan Beulich 

--- a/xen/arch/x86/guest/xen/xen.c
+++ b/xen/arch/x86/guest/xen/xen.c
@@ -233,16 +233,12 @@ static void cf_check xen_evtchn_upcall(v
     ack_APIC_irq();
 }
 
+static uint8_t __ro_after_init evtchn_upcall_vector;
+
 static int init_evtchn(void)
 {
-    static uint8_t evtchn_upcall_vector;
     int rc;
 
-    if ( !evtchn_upcall_vector )
-        alloc_direct_apic_vector(&evtchn_upcall_vector, xen_evtchn_upcall);
-
-    ASSERT(evtchn_upcall_vector);
-
     rc = xen_hypercall_set_evtchn_upcall_vector(this_cpu(vcpu_id),
                                                 evtchn_upcall_vector);
     if ( rc )
@@ -293,6 +289,8 @@ static void __init cf_check setup(void)
                XEN_LEGACY_MAX_VCPUS);
     }
 
+    alloc_direct_apic_vector(&evtchn_upcall_vector, xen_evtchn_upcall);
+
     BUG_ON(init_evtchn());
 }
 



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Subject: [PATCH 2/4] x86/MCE: restrict allocation of thermal and CMCI vector
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From: Jan Beulich 
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There's no need to do this for every AP; just do it once when setting up
the BSP. Then both vector variables can also validly become ro-after-init.

While touching intel_init_thermal(), constify its 1st parameter, which
in turn requires touching intel_thermal_supported() as well.

Signed-off-by: Jan Beulich 
---
This contextually (but not functionally) collides with "x86/MCE: adjust S3
resume handling".

--- a/xen/arch/x86/cpu/mcheck/mce.c
+++ b/xen/arch/x86/cpu/mcheck/mce.c
@@ -37,7 +37,7 @@ bool is_mc_panic;
 DEFINE_PER_CPU_READ_MOSTLY(unsigned int, nr_mce_banks);
 unsigned int __read_mostly firstbank;
 unsigned int __read_mostly ppin_msr;
-uint8_t __read_mostly cmci_apic_vector;
+uint8_t __ro_after_init cmci_apic_vector;
 bool __read_mostly cmci_support;
 
 /* If mce_force_broadcast == 1, lmce_support will be disabled forcibly. */
--- a/xen/arch/x86/cpu/mcheck/mce_intel.c
+++ b/xen/arch/x86/cpu/mcheck/mce_intel.c
@@ -87,7 +87,7 @@ static void cf_check intel_thermal_inter
 }
 
 /* Thermal monitoring depends on APIC, ACPI and clock modulation */
-static bool intel_thermal_supported(struct cpuinfo_x86 *c)
+static bool intel_thermal_supported(const struct cpuinfo_x86 *c)
 {
     if ( !cpu_has_apic )
         return false;
@@ -110,13 +110,13 @@ static void __init mcheck_intel_therm_in
 }
 
 /* P4/Xeon Thermal regulation detect and init */
-static void intel_init_thermal(struct cpuinfo_x86 *c)
+static void intel_init_thermal(const struct cpuinfo_x86 *c, bool bsp)
 {
     uint64_t msr_content;
     uint32_t val;
     int tm2 = 0;
     unsigned int cpu = smp_processor_id();
-    static uint8_t thermal_apic_vector;
+    static uint8_t __ro_after_init thermal_apic_vector;
 
     if ( !intel_thermal_supported(c) )
         return; /* -ENODEV */
@@ -160,7 +160,8 @@ static void intel_init_thermal(struct cp
         return; /* -EBUSY */
     }
 
-    alloc_direct_apic_vector(&thermal_apic_vector, intel_thermal_interrupt);
+    if ( bsp )
+        alloc_direct_apic_vector(&thermal_apic_vector, intel_thermal_interrupt);
 
     /* The temperature transition interrupt handler setup */
     val = thermal_apic_vector;    /* our delivery vector */
@@ -667,7 +668,7 @@ static void cf_check cmci_interrupt(void
         mctelem_dismiss(mctc);
 }
 
-static void intel_init_cmci(struct cpuinfo_x86 *c)
+static void intel_init_cmci(struct cpuinfo_x86 *c, bool bsp)
 {
     u32 l, apic;
     int cpu = smp_processor_id();
@@ -687,7 +688,8 @@ static void intel_init_cmci(struct cpuin
         return;
     }
 
-    alloc_direct_apic_vector(&cmci_apic_vector, cmci_interrupt);
+    if ( bsp )
+        alloc_direct_apic_vector(&cmci_apic_vector, cmci_interrupt);
 
     apic = cmci_apic_vector;
     apic |= (APIC_DM_FIXED | APIC_LVT_MASKED);
@@ -993,9 +995,9 @@ enum mcheck_type intel_mcheck_init(struc
 
     intel_init_mce(bsp);
 
-    intel_init_cmci(c);
+    intel_init_cmci(c, bsp);
 
-    intel_init_thermal(c);
+    intel_init_thermal(c, bsp);
 
     intel_init_ppin(c);
 



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Subject: [PATCH 3/4] x86/IRQ: direct-APIC-vector setting is now init-only
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With all callers of alloc_direct_apic_vector() now being limited to BSP
setup, it and its helpers (whose other callers have already been init-
only) can become __init. As a result data items can be adjusted, too.

Signed-off-by: Jan Beulich 
---
Question is whether with this the "if (*vector == 0)" in
alloc_direct_apic_vector() is of much use anymore.

--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -970,22 +970,22 @@ void pirq_set_affinity(struct domain *d,
 DEFINE_PER_CPU(unsigned int, irq_count);
 static DEFINE_PER_CPU(bool, check_eoi_deferral);
 
-uint8_t alloc_hipriority_vector(void)
+uint8_t __init alloc_hipriority_vector(void)
 {
-    static uint8_t next = FIRST_HIPRIORITY_VECTOR;
+    static uint8_t __initdata next = FIRST_HIPRIORITY_VECTOR;
     BUG_ON(next < FIRST_HIPRIORITY_VECTOR);
     BUG_ON(next > LAST_HIPRIORITY_VECTOR);
     return next++;
 }
 
-static void (*direct_apic_vector[X86_IDT_VECTORS])(void);
-void set_direct_apic_vector(uint8_t vector, void (*handler)(void))
+static void (*__ro_after_init direct_apic_vector[X86_IDT_VECTORS])(void);
+void __init set_direct_apic_vector(uint8_t vector, void (*handler)(void))
 {
     BUG_ON(direct_apic_vector[vector] != NULL);
     direct_apic_vector[vector] = handler;
 }
 
-void alloc_direct_apic_vector(uint8_t *vector, void (*handler)(void))
+void __init alloc_direct_apic_vector(uint8_t *vector, void (*handler)(void))
 {
     static DEFINE_SPINLOCK(lock);
 



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Move the setup to vPMU code, doing the allocation of a vector only when
one is actually going to be needed. With that the handler function also
doesn't need to be split across two places anymore.

Add the freed up vector to the dynamically allocatable range.

Signed-off-by: Jan Beulich 
---
In case down the road we also want to have a build mode with vPMU code
excluded, this may also simplify things a little there.

--- a/xen/arch/x86/apic.c
+++ b/xen/arch/x86/apic.c
@@ -1313,16 +1313,6 @@ static void cf_check error_interrupt(voi
            entries[3], entries[2], entries[1], entries[0]);
 }
 
-/*
- * This interrupt handles performance counters interrupt
- */
-
-static void cf_check pmu_interrupt(void)
-{
-    ack_APIC_irq();
-    vpmu_do_interrupt();
-}
-
 void __init apic_intr_init(void)
 {
     smp_intr_init();
@@ -1333,9 +1323,6 @@ void __init apic_intr_init(void)
     /* IPI vectors for APIC spurious and error interrupts */
     set_direct_apic_vector(SPURIOUS_APIC_VECTOR, spurious_interrupt);
     set_direct_apic_vector(ERROR_APIC_VECTOR, error_interrupt);
-
-    /* Performance Counters Interrupt */
-    set_direct_apic_vector(PMU_APIC_VECTOR, pmu_interrupt);
 }
 
 /*
--- a/xen/arch/x86/cpu/vpmu.c
+++ b/xen/arch/x86/cpu/vpmu.c
@@ -40,6 +40,8 @@ static struct arch_vpmu_ops __initdata v
 static DEFINE_SPINLOCK(vpmu_lock);
 static unsigned vpmu_count;
 
+static uint8_t __ro_after_init pmu_apic_vector;
+
 static DEFINE_PER_CPU(struct vcpu *, last_vcpu);
 
 static int __init cf_check parse_vpmu_params(const char *s)
@@ -94,7 +96,7 @@ void vpmu_lvtpc_update(uint32_t val)
 
     vpmu = vcpu_vpmu(curr);
 
-    vpmu->hw_lapic_lvtpc = PMU_APIC_VECTOR | (val & APIC_LVT_MASKED);
+    vpmu->hw_lapic_lvtpc = pmu_apic_vector | (val & APIC_LVT_MASKED);
 
     /* Postpone APIC updates for PV(H) guests if PMU interrupt is pending */
     if ( has_vlapic(curr->domain) || !vpmu->xenpmu_data ||
@@ -160,7 +162,7 @@ static inline struct vcpu *choose_hwdom_
     return hardware_domain->vcpu[idx];
 }
 
-void vpmu_do_interrupt(void)
+static void cf_check vpmu_interrupt(void)
 {
     struct vcpu *sampled = current, *sampling;
     struct vpmu_struct *vpmu;
@@ -169,6 +171,8 @@ void vpmu_do_interrupt(void)
     uint32_t vlapic_lvtpc;
 #endif
 
+    ack_APIC_irq();
+
     /*
      * dom0 will handle interrupt for special domains (e.g. idle domain) or,
      * in XENPMU_MODE_ALL, for everyone.
@@ -369,7 +373,7 @@ void vpmu_save(struct vcpu *v)
 
     vpmu_reset(vpmu, VPMU_CONTEXT_SAVE);
 
-    apic_write(APIC_LVTPC, PMU_APIC_VECTOR | APIC_LVT_MASKED);
+    apic_write(APIC_LVTPC, pmu_apic_vector | APIC_LVT_MASKED);
 }
 
 int vpmu_load(struct vcpu *v, bool from_guest)
@@ -432,7 +436,7 @@ static int vpmu_arch_initialise(struct v
         return ret;
     }
 
-    vpmu->hw_lapic_lvtpc = PMU_APIC_VECTOR | APIC_LVT_MASKED;
+    vpmu->hw_lapic_lvtpc = pmu_apic_vector | APIC_LVT_MASKED;
     vpmu_set(vpmu, VPMU_INITIALIZED);
 
     return 0;
@@ -860,6 +864,8 @@ static int __init cf_check vpmu_init(voi
         register_cpu_notifier(&cpu_nfb);
         printk(XENLOG_INFO "VPMU: version " __stringify(XENPMU_VER_MAJ) "."
                __stringify(XENPMU_VER_MIN) "\n");
+
+        alloc_direct_apic_vector(&pmu_apic_vector, vpmu_interrupt);
     }
     else
     {
--- a/xen/arch/x86/include/asm/irq-vectors.h
+++ b/xen/arch/x86/include/asm/irq-vectors.h
@@ -8,13 +8,12 @@
 #define EVENT_CHECK_VECTOR	0xfc
 #define CALL_FUNCTION_VECTOR	0xfb
 #define LOCAL_TIMER_VECTOR	0xfa
-#define PMU_APIC_VECTOR 	0xf9
 /*
  * High-priority dynamically-allocated vectors. For interrupts that
  * must be higher priority than any guest-bound interrupt.
  */
 #define FIRST_HIPRIORITY_VECTOR	0xf1
-#define LAST_HIPRIORITY_VECTOR  0xf8
+#define LAST_HIPRIORITY_VECTOR  0xf9
 /* IRQ0 (timer) is statically allocated but must be high priority. */
 #define IRQ0_VECTOR             0xf0
 
--- a/xen/arch/x86/include/asm/vpmu.h
+++ b/xen/arch/x86/include/asm/vpmu.h
@@ -99,7 +99,6 @@ static inline bool vpmu_are_all_set(cons
 
 void vpmu_lvtpc_update(uint32_t val);
 int vpmu_do_msr(unsigned int msr, uint64_t *msr_content, bool is_write);
-void vpmu_do_interrupt(void);
 void vpmu_initialise(struct vcpu *v);
 void vpmu_destroy(struct vcpu *v);
 void vpmu_save(struct vcpu *v);



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From: Mykola Kvach 
Date: Wed, 19 Nov 2025 13:00:03 +0200
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Subject: Re: [PATCH v14 1/4] xen/arm: Implement PSCI SYSTEM_SUSPEND call for guests
To: "Orzel, Michal" 
Cc: xen-devel@lists.xenproject.org, Mykola Kvach , 
	Stefano Stabellini , Julien Grall , 
	Bertrand Marquis , Volodymyr Babchuk , 
	Andrew Cooper , Anthony PERARD , 
	Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
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Hi Michal,

Thanks for your review.

On Wed, Nov 19, 2025 at 10:48=E2=80=AFAM Orzel, Michal  wrote:
>
>
>
> On 18/11/2025 16:37, Mykola Kvach wrote:
> > From: Mykola Kvach 
> >
> > Add support for the PSCI SYSTEM_SUSPEND function in the vPSCI interface=
,
> > allowing guests to request suspend via the PSCI v1.0+ SYSTEM_SUSPEND ca=
ll
> > (both 32-bit and 64-bit variants).
> >
> > Implementation details:
> > - Add SYSTEM_SUSPEND function IDs to PSCI definitions
> > - Trap and handle SYSTEM_SUSPEND in vPSCI
> > - Allow only non-hardware domains to invoke SYSTEM_SUSPEND; return
> >   PSCI_NOT_SUPPORTED for the hardware domain to avoid halting the syste=
m
> >   in hwdom_shutdown() via domain_shutdown
> > - Require all secondary VCPUs of the calling domain to be offline befor=
e
> >   suspend, as mandated by the PSCI specification
> >
> > The arch_domain_resume() function is an architecture-specific hook that=
 is
> > invoked during domain resume to perform any necessary setup or restorat=
ion
> > steps required by the platform.
> >
> > The new vpsci_vcpu_up_prepare() helper is called on the resume path to =
set up
> > the vCPU context (such as entry point, some system regs and context ID)=
 before
> > resuming a suspended guest. This keeps ARM/vPSCI-specific logic out of =
common
> > code and avoids intrusive changes to the generic resume flow.
> >
> > Usage:
> >
> > For Linux-based guests, suspend can be initiated with:
> >     echo mem > /sys/power/state
> > or via:
> >     systemctl suspend
> >
> > Resuming the guest is performed from control domain using:
> >       xl resume 
> >
> > Signed-off-by: Mykola Kvach 
> > ---
> > Changes in V14:
> > - move arch_domain_resume to a separate header
> > - avoid usage of typeof for context struct
> > - moved error printing from domain_resume to arch_domain_resume
> >   in order to simplify common parts of code
> > - minor changes after review
> > ---
> >  xen/arch/arm/domain.c                 |  41 +++++++++
> >  xen/arch/arm/include/asm/domain.h     |   2 +
> >  xen/arch/arm/include/asm/perfc_defn.h |   1 +
> >  xen/arch/arm/include/asm/psci.h       |   2 +
> >  xen/arch/arm/include/asm/suspend.h    |  24 ++++++
> >  xen/arch/arm/include/asm/vpsci.h      |   5 +-
> >  xen/arch/arm/vpsci.c                  | 116 +++++++++++++++++++++-----
> >  xen/common/domain.c                   |   5 ++
> >  xen/include/xen/suspend.h             |  15 ++++
> >  9 files changed, 189 insertions(+), 22 deletions(-)
> >  create mode 100644 xen/arch/arm/include/asm/suspend.h
> >  create mode 100644 xen/include/xen/suspend.h
> >
> > diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
> > index e36719bce4..3c0170480b 100644
> > --- a/xen/arch/arm/domain.c
> > +++ b/xen/arch/arm/domain.c
> > @@ -12,6 +12,8 @@
> >  #include 
> >  #include 
> >
> > +#include 
> > +
> >  #include 
> >  #include 
> >  #include 
> > @@ -24,10 +26,12 @@
> >  #include 
> >  #include 
> >  #include 
> > +#include 
> >  #include 
> >  #include 
> >  #include 
> >  #include 
> > +#include 
> >  #include 
> >
> >  #include "vpci.h"
> > @@ -885,6 +889,43 @@ void arch_domain_creation_finished(struct domain *=
d)
> >      p2m_domain_creation_finished(d);
> >  }
> >
> > +int arch_domain_resume(struct domain *d)
> > +{
> > +    int rc;
> > +    struct resume_info *ctx =3D &d->arch.resume_ctx;
> > +
> > +    if ( !d->is_shutting_down || d->shutdown_code !=3D SHUTDOWN_suspen=
d )
> > +    {
> > +        dprintk(XENLOG_WARNING,
> > +                "%pd: Invalid domain state for resume: is_shutting_dow=
n=3D%d, shutdown_code=3D%d\n",
> These are bool and uint, so %u should be used.

ack

>
> > +                d, d->is_shutting_down, d->shutdown_code);
> > +        return -EINVAL;
> > +    }
> > +
> > +    /*
> > +     * It is still possible to call domain_shutdown() with a suspend r=
eason
> > +     * via some hypercalls, such as SCHEDOP_shutdown or SCHEDOP_remote=
_shutdown.
> > +     * In these cases, the resume context will be empty.
> > +     * This is not expected to cause any issues, so we just warn about=
 the
> > +     * situation and return without error, allowing the existing logic=
 to
> > +     * proceed as expected.
> > +     */
> > +    if ( !ctx->wake_cpu )
> > +    {
> > +        dprintk(XENLOG_INFO, "%pd: Wake CPU pointer context was not pr=
ovided\n",
> > +                d);
> > +        return 0;
> > +    }
> > +
> > +    rc =3D vpsci_vcpu_up_prepare(ctx->wake_cpu , ctx->ep, ctx->cid);
> > +    if ( rc )
> > +        printk("%pd: Failed to resume domain (ret %d)\n", d, rc);
> > +
> > +    memset(ctx, 0, sizeof(*ctx));
> > +
> > +    return rc;
> > +}
> > +
> >  static int is_guest_pv32_psr(uint32_t psr)
> >  {
> >      switch (psr & PSR_MODE_MASK)
> > diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/a=
sm/domain.h
> > index af3e168374..e637cb4de0 100644
> > --- a/xen/arch/arm/include/asm/domain.h
> > +++ b/xen/arch/arm/include/asm/domain.h
> > @@ -5,6 +5,7 @@
> >  #include 
> >  #include 
> >  #include 
> > +#include 
> >  #include 
> >  #include 
> >  #include 
> > @@ -126,6 +127,7 @@ struct arch_domain
> >      void *sci_data;
> >  #endif
> >
> > +    struct resume_info resume_ctx;
> >  }  __cacheline_aligned;
> >
> >  struct arch_vcpu
> > diff --git a/xen/arch/arm/include/asm/perfc_defn.h b/xen/arch/arm/inclu=
de/asm/perfc_defn.h
> > index effd25b69e..8dfcac7e3b 100644
> > --- a/xen/arch/arm/include/asm/perfc_defn.h
> > +++ b/xen/arch/arm/include/asm/perfc_defn.h
> > @@ -33,6 +33,7 @@ PERFCOUNTER(vpsci_system_reset,        "vpsci: system=
_reset")
> >  PERFCOUNTER(vpsci_cpu_suspend,         "vpsci: cpu_suspend")
> >  PERFCOUNTER(vpsci_cpu_affinity_info,   "vpsci: cpu_affinity_info")
> >  PERFCOUNTER(vpsci_features,            "vpsci: features")
> > +PERFCOUNTER(vpsci_system_suspend,      "vpsci: system_suspend")
> >
> >  PERFCOUNTER(vcpu_kick,                 "vcpu: notify other vcpu")
> >
> > diff --git a/xen/arch/arm/include/asm/psci.h b/xen/arch/arm/include/asm=
/psci.h
> > index 4780972621..48a93e6b79 100644
> > --- a/xen/arch/arm/include/asm/psci.h
> > +++ b/xen/arch/arm/include/asm/psci.h
> > @@ -47,10 +47,12 @@ void call_psci_system_reset(void);
> >  #define PSCI_0_2_FN32_SYSTEM_OFF          PSCI_0_2_FN32(8)
> >  #define PSCI_0_2_FN32_SYSTEM_RESET        PSCI_0_2_FN32(9)
> >  #define PSCI_1_0_FN32_PSCI_FEATURES       PSCI_0_2_FN32(10)
> > +#define PSCI_1_0_FN32_SYSTEM_SUSPEND      PSCI_0_2_FN32(14)
> >
> >  #define PSCI_0_2_FN64_CPU_SUSPEND         PSCI_0_2_FN64(1)
> >  #define PSCI_0_2_FN64_CPU_ON              PSCI_0_2_FN64(3)
> >  #define PSCI_0_2_FN64_AFFINITY_INFO       PSCI_0_2_FN64(4)
> > +#define PSCI_1_0_FN64_SYSTEM_SUSPEND      PSCI_0_2_FN64(14)
> >
> >  /* PSCI v0.2 affinity level state returned by AFFINITY_INFO */
> >  #define PSCI_0_2_AFFINITY_LEVEL_ON      0
> > diff --git a/xen/arch/arm/include/asm/suspend.h b/xen/arch/arm/include/=
asm/suspend.h
> > new file mode 100644
> > index 0000000000..b991a94d5a
> > --- /dev/null
> > +++ b/xen/arch/arm/include/asm/suspend.h
> > @@ -0,0 +1,24 @@
> > +/* SPDX-License-Identifier: GPL-2.0-only */
> > +
> > +#ifndef __ARM_SUSPEND_H__
> There should be no double underscores in guards (see examples in CODING_S=
TYLE)

I had initially followed the style used by some of the existing headers
in this directory, which still use guards with double underscores.

I'll remove underscores in the next series.

> > +#define __ARM_SUSPEND_H__
> > +
> > +struct resume_info {
> > +    register_t ep;
> > +    register_t cid;
> > +    struct vcpu *wake_cpu;
> > +};
> > +
> > +int arch_domain_resume(struct domain *d);
> If possible, headers should be standalone, meaning you should include nec=
essary
> headers or forward declare what's missing.

Thanks for the comment.

My initial intention was to avoid adding new dependencies from asm
headers to higher-level Xen headers, so I did not include e.g.
 directly here. In this header we only need pointers to
struct domain and struct vcpu, we never dereference them, so forward
declarations would be sufficient to make it standalone.

I also noticed that some existing asm headers in this directory do
include higher-level Xen headers, so both patterns exist in the tree.

If you prefer, I can either:
  - add forward declarations

      struct domain;
      struct vcpu;

    at the top of this header and keep the full includes in the .c
    files that actually dereference these types, or

  - include the appropriate Xen header(s) directly in this header.

Personally I slightly prefer the forward-declaration approach to keep
this header lightweight and avoid tightening the layering, but I am
happy to follow your preference.

>
> > +
> > +#endif /* __ARM_SUSPEND_H__ */
> > +
> > + /*
> > +  * Local variables:
> > +  * mode: C
> > +  * c-file-style: "BSD"
> > +  * c-basic-offset: 4
> > +  * tab-width: 4
> > +  * indent-tabs-mode: nil
> > +  * End:
> > +  */
> > diff --git a/xen/arch/arm/include/asm/vpsci.h b/xen/arch/arm/include/as=
m/vpsci.h
> > index 0cca5e6830..d790ab3715 100644
> > --- a/xen/arch/arm/include/asm/vpsci.h
> > +++ b/xen/arch/arm/include/asm/vpsci.h
> > @@ -23,12 +23,15 @@
> >  #include 
> >
> >  /* Number of function implemented by virtual PSCI (only 0.2 or later) =
*/
> > -#define VPSCI_NR_FUNCS  12
> > +#define VPSCI_NR_FUNCS  14
> >
> >  /* Functions handle PSCI calls from the guests */
> >  bool do_vpsci_0_1_call(struct cpu_user_regs *regs, uint32_t fid);
> >  bool do_vpsci_0_2_call(struct cpu_user_regs *regs, uint32_t fid);
> >
> > +int vpsci_vcpu_up_prepare(struct vcpu *v, register_t entry_point,
> > +                          register_t context_id);
> > +
> >  #endif /* __ASM_VPSCI_H__ */
> >
> >  /*
> > diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c
> > index 7ba9ccd94b..22c3a5f544 100644
> > --- a/xen/arch/arm/vpsci.c
> > +++ b/xen/arch/arm/vpsci.c
> > @@ -10,32 +10,16 @@
> >
> >  #include 
> >
> > -static int do_common_cpu_on(register_t target_cpu, register_t entry_po=
int,
> > -                            register_t context_id)
> > +int vpsci_vcpu_up_prepare(struct vcpu *v, register_t entry_point,
> > +                   register_t context_id)
> NIT: incorrect parameter alignment

ack

>
> >  {
> > -    struct vcpu *v;
> > -    struct domain *d =3D current->domain;
> > -    struct vcpu_guest_context *ctxt;
> >      int rc;
> > +    struct domain *d =3D v->domain;
> >      bool is_thumb =3D entry_point & 1;
> > -    register_t vcpuid;
> > -
> > -    vcpuid =3D vaffinity_to_vcpuid(target_cpu);
> > -
> > -    if ( (v =3D domain_vcpu(d, vcpuid)) =3D=3D NULL )
> > -        return PSCI_INVALID_PARAMETERS;
> > -
> > -    /* THUMB set is not allowed with 64-bit domain */
> > -    if ( is_64bit_domain(d) && is_thumb )
> > -        return PSCI_INVALID_ADDRESS;
> > -
> > -    if ( !test_bit(_VPF_down, &v->pause_flags) )
> > -        return PSCI_ALREADY_ON;
> > +    struct vcpu_guest_context *ctxt;
> >
> >      if ( (ctxt =3D alloc_vcpu_guest_context()) =3D=3D NULL )
> > -        return PSCI_DENIED;
> > -
> > -    vgic_clear_pending_irqs(v);
> > +        return -ENOMEM;
> >
> >      memset(ctxt, 0, sizeof(*ctxt));
> >      ctxt->user_regs.pc64 =3D (u64) entry_point;
> > @@ -76,8 +60,37 @@ static int do_common_cpu_on(register_t target_cpu, r=
egister_t entry_point,
> >      free_vcpu_guest_context(ctxt);
> >
> >      if ( rc < 0 )
> > +        return rc;
> > +
> > +    return 0;
> > +}
> > +
> > +static int do_common_cpu_on(register_t target_cpu, register_t entry_po=
int,
> > +                            register_t context_id)
> > +{
> > +    struct vcpu *v;
> > +    struct domain *d =3D current->domain;
> > +    int rc;
> > +    bool is_thumb =3D entry_point & 1;
> > +    register_t vcpuid;
> > +
> > +    vcpuid =3D vaffinity_to_vcpuid(target_cpu);
> > +
> > +    if ( (v =3D domain_vcpu(d, vcpuid)) =3D=3D NULL )
> > +        return PSCI_INVALID_PARAMETERS;
> > +
> > +    /* THUMB set is not allowed with 64-bit domain */
> > +    if ( is_64bit_domain(d) && is_thumb )
> > +        return PSCI_INVALID_ADDRESS;
> > +
> > +    if ( !test_bit(_VPF_down, &v->pause_flags) )
> > +        return PSCI_ALREADY_ON;
> > +
> > +    rc =3D vpsci_vcpu_up_prepare(v, entry_point, context_id);
> > +    if ( rc )
> >          return PSCI_DENIED;
> >
> > +    vgic_clear_pending_irqs(v);
> >      vcpu_wake(v);
> >
> >      return PSCI_SUCCESS;
> > @@ -197,6 +210,48 @@ static void do_psci_0_2_system_reset(void)
> >      domain_shutdown(d,SHUTDOWN_reboot);
> >  }
> >
> > +static int32_t do_psci_1_0_system_suspend(register_t epoint, register_=
t cid)
> > +{
> > +    int32_t rc;
> > +    struct vcpu *v;
> > +    struct domain *d =3D current->domain;
> > +    bool is_thumb =3D epoint & 1;
> > +
> > +    /* THUMB set is not allowed with 64-bit domain */
> > +    if ( is_64bit_domain(d) && is_thumb )
> > +        return PSCI_INVALID_ADDRESS;
> > +
> > +    /* SYSTEM_SUSPEND is not supported for the hardware domain yet */
> > +    if ( is_hardware_domain(d) )
> > +        return PSCI_NOT_SUPPORTED;
> > +
> > +    /* Ensure that all CPUs other than the calling one are offline */
> > +    domain_lock(d);
> > +    for_each_vcpu ( d, v )
> > +    {
> > +        if ( v !=3D current && is_vcpu_online(v) )
> > +        {
> > +            domain_unlock(d);
> > +            return PSCI_DENIED;
> > +        }
> > +    }
> > +    domain_unlock(d);
> > +
> > +    rc =3D domain_shutdown(d, SHUTDOWN_suspend);
> > +    if ( rc )
> > +        return PSCI_DENIED;
> > +
> > +    d->arch.resume_ctx.ep =3D epoint;
> > +    d->arch.resume_ctx.cid =3D cid;
> > +    d->arch.resume_ctx.wake_cpu =3D current;
> > +
> > +    gprintk(XENLOG_DEBUG,
> > +            "SYSTEM_SUSPEND requested, epoint=3D0x%"PRIregister", cid=
=3D0x%"PRIregister"\n",
> NIT: %# is preffered over 0x%.

ack

>
> > +            epoint, cid);
> > +
> > +    return rc;
> > +}
> > +
> >  static int32_t do_psci_1_0_features(uint32_t psci_func_id)
> >  {
> >      /* /!\ Ordered by function ID and not name */
> > @@ -214,6 +269,8 @@ static int32_t do_psci_1_0_features(uint32_t psci_f=
unc_id)
> >      case PSCI_0_2_FN32_SYSTEM_OFF:
> >      case PSCI_0_2_FN32_SYSTEM_RESET:
> >      case PSCI_1_0_FN32_PSCI_FEATURES:
> > +    case PSCI_1_0_FN32_SYSTEM_SUSPEND:
> > +    case PSCI_1_0_FN64_SYSTEM_SUSPEND:
> >      case ARM_SMCCC_VERSION_FID:
> >          return 0;
> >      default:
> > @@ -344,6 +401,23 @@ bool do_vpsci_0_2_call(struct cpu_user_regs *regs,=
 uint32_t fid)
> >          return true;
> >      }
> >
> > +    case PSCI_1_0_FN32_SYSTEM_SUSPEND:
> > +    case PSCI_1_0_FN64_SYSTEM_SUSPEND:
> > +    {
> > +        register_t epoint =3D PSCI_ARG(regs, 1);
> > +        register_t cid =3D PSCI_ARG(regs, 2);
> > +
> > +        if ( fid =3D=3D PSCI_1_0_FN32_SYSTEM_SUSPEND )
> > +        {
> > +            epoint &=3D GENMASK(31, 0);
> > +            cid &=3D GENMASK(31, 0);
> > +        }
> > +
> > +        perfc_incr(vpsci_system_suspend);
> > +        PSCI_SET_RESULT(regs, do_psci_1_0_system_suspend(epoint, cid))=
;
> > +        return true;
> > +    }
> > +
> >      default:
> >          return false;
> >      }
> > diff --git a/xen/common/domain.c b/xen/common/domain.c
> > index 775c339285..6410d32970 100644
> > --- a/xen/common/domain.c
> > +++ b/xen/common/domain.c
> > @@ -26,6 +26,7 @@
> >  #include 
> >  #include 
> >  #include 
> > +#include 
> >  #include 
> >  #include 
> >  #include 
> > @@ -1363,6 +1364,9 @@ void domain_resume(struct domain *d)
> >
> >      spin_lock(&d->shutdown_lock);
> >
> > +    if ( arch_domain_resume(d) )
> > +        goto fail;
> > +
> >      d->is_shutting_down =3D d->is_shut_down =3D 0;
> >      d->shutdown_code =3D SHUTDOWN_CODE_INVALID;
> >
> > @@ -1373,6 +1377,7 @@ void domain_resume(struct domain *d)
> >          v->paused_for_shutdown =3D 0;
> >      }
> >
> > + fail:
> >      spin_unlock(&d->shutdown_lock);
> >
> >      domain_unpause(d);
> > diff --git a/xen/include/xen/suspend.h b/xen/include/xen/suspend.h
> > new file mode 100644
> > index 0000000000..53f75fd6ad
> > --- /dev/null
> > +++ b/xen/include/xen/suspend.h
> > @@ -0,0 +1,15 @@
> > +/* SPDX-License-Identifier: GPL-2.0-only */
> > +#ifndef __XEN_SUSPEND_H__
> There should be no double underscores in guards

I initially followed the style used by the existing headers in this
directory, which still have include guards with double underscores.

You are right that this does not match CODING_STYLE examples.
I will update this header to use a proper guard name.

>
> > +#define __XEN_SUSPEND_H__
> > +
> > +#if __has_include()
> > +#include 
> > +#else
> > +static inline int arch_domain_resume(struct domain *d)
> > +{
> > +    return 0;
> > +}
> > +#endif
> > +
> Stray whiteline?

will drop

>
> > +
> > +#endif /* __XEN_SUSPEND_H__ */
> Missing emacs block?

It is permitted but isn't necessary as far as know,
but if it needed here per your opinion I'll add it
just let me know

>
> Did you run MISRA scan on this patch?

Yes, I ran it with:

  ./xen/scripts/xen-analysis.py \
      --run-cppcheck --cppcheck-misra --cppcheck-html -- \
      XEN_TARGET_ARCH=3Darm64 CROSS_COMPILE=3Daarch64-linux-gnu-

The analysis did not report any new MISRA violations in the code
touched by this patch.

>
> ~Michal
>
>

Best regards,
Mykola


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From: "Teddy Astie" 
Subject: =?utf-8?Q?[PATCH=20v2.1=205/5]=20x86/ioapic:=20Don't=20open-code=2032-bits=20rte=20reads?=
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There are many places where we use interesting ways of reading 32-bits
components of the RTE. Introduce and use low and high components directly
to the rte structure instead.

Also take the opportunity to simplify "x & 1 ? 1 : 0".

Signed-off-by: Teddy Astie 
Acked-by: Jan Beulich 
---
v2.1:
 - fix trailing spaces
v2:
 - make rte_upper to use bool instead

 xen/arch/x86/include/asm/io_apic.h     |  1 +
 xen/arch/x86/io_apic.c                 | 29 ++++++++++----------------
 xen/drivers/passthrough/vtd/intremap.c |  7 ++-----
 3 files changed, 14 insertions(+), 23 deletions(-)

diff --git a/xen/arch/x86/include/asm/io_apic.h b/xen/arch/x86/include/asm/io_apic.h
index 4680dce9e1..0e85f2a860 100644
--- a/xen/arch/x86/include/asm/io_apic.h
+++ b/xen/arch/x86/include/asm/io_apic.h
@@ -122,6 +122,7 @@ struct IO_APIC_route_entry {
             } dest;
         };
         uint64_t raw;
+        struct { uint32_t low, high; };
     };
 };
 
diff --git a/xen/arch/x86/io_apic.c b/xen/arch/x86/io_apic.c
index d20ab2aa98..46c2a43dac 100644
--- a/xen/arch/x86/io_apic.c
+++ b/xen/arch/x86/io_apic.c
@@ -254,28 +254,23 @@ nomem:
     return NULL;
 }
 
-union entry_union {
-    struct { u32 w1, w2; };
-    struct IO_APIC_route_entry entry;
-};
-
 struct IO_APIC_route_entry __ioapic_read_entry(
     unsigned int apic, unsigned int pin, bool raw)
 {
-    union entry_union eu;
+    struct IO_APIC_route_entry entry;
 
     if ( raw || !iommu_intremap )
     {
-        eu.w1 = __io_apic_read(apic, 0x10 + 2 * pin);
-        eu.w2 = __io_apic_read(apic, 0x11 + 2 * pin);
+        entry.low  = __io_apic_read(apic, 0x10 + 2 * pin);
+        entry.high = __io_apic_read(apic, 0x11 + 2 * pin);
     }
     else
     {
-        eu.w1 = iommu_read_apic_from_ire(apic, 0x10 + 2 * pin);
-        eu.w2 = iommu_read_apic_from_ire(apic, 0x11 + 2 * pin);
+        entry.low  = iommu_read_apic_from_ire(apic, 0x10 + 2 * pin);
+        entry.high = iommu_read_apic_from_ire(apic, 0x11 + 2 * pin);
     }
 
-    return eu.entry;
+    return entry;
 }
 
 static struct IO_APIC_route_entry ioapic_read_entry(
@@ -294,12 +289,10 @@ void __ioapic_write_entry(
     unsigned int apic, unsigned int pin, bool raw,
     struct IO_APIC_route_entry e)
 {
-    union entry_union eu = { .entry = e };
-
     if ( raw || !iommu_intremap )
     {
-        __io_apic_write(apic, 0x11 + 2 * pin, eu.w2);
-        __io_apic_write(apic, 0x10 + 2 * pin, eu.w1);
+        __io_apic_write(apic, 0x11 + 2 * pin, e.high);
+        __io_apic_write(apic, 0x10 + 2 * pin, e.low);
         /*
          * Might be called before io_apic_pin_eoi is allocated.  Entry will be
          * initialized to the RTE value once the cache is allocated.
@@ -2218,7 +2211,7 @@ int ioapic_guest_read(unsigned long physbase, unsigned int reg, u32 *pval)
     dprintk(XENLOG_INFO, "IO-APIC: apic=%d, pin=%d, irq=%d\n" \
             XENLOG_INFO "IO-APIC: new_entry=%08x\n"           \
             XENLOG_INFO "IO-APIC: " f "\n",                   \
-            apic, pin, irq, *(u32 *)&rte, ##a )
+            apic, pin, irq, rte.low, ##a )
 
 int ioapic_guest_write(unsigned long physbase, unsigned int reg, u32 val)
 {
@@ -2237,7 +2230,7 @@ int ioapic_guest_write(unsigned long physbase, unsigned int reg, u32 val)
     pin = (reg - 0x10) >> 1;
 
     /* Write first half from guest; second half is target info. */
-    *(u32 *)&rte = val;
+    rte.low = val;
 
     /*
      * What about weird destination types?
@@ -2288,7 +2281,7 @@ int ioapic_guest_write(unsigned long physbase, unsigned int reg, u32 val)
         ret = io_apic_read(apic, 0x10 + 2 * pin);
         spin_unlock_irqrestore(&ioapic_lock, flags);
         rte.vector = desc->arch.vector;
-        if ( *(u32*)&rte != ret )
+        if ( rte.low != ret )
             WARN_BOGUS_WRITE("old_entry=%08x pirq=%d\n" XENLOG_INFO
                              "IO-APIC: Attempt to modify IO-APIC pin for in-use IRQ!",
                              ret, pirq);
diff --git a/xen/drivers/passthrough/vtd/intremap.c b/xen/drivers/passthrough/vtd/intremap.c
index 116c2e75ae..ac39405c0d 100644
--- a/xen/drivers/passthrough/vtd/intremap.c
+++ b/xen/drivers/passthrough/vtd/intremap.c
@@ -399,7 +399,7 @@ unsigned int cf_check io_apic_read_remap_rte(
     unsigned int ioapic_pin = (reg - 0x10) / 2;
     int index;
     struct IO_APIC_route_entry old_rte = {};
-    int rte_upper = (reg & 1) ? 1 : 0;
+    bool rte_upper = reg & 1;
     struct vtd_iommu *iommu = ioapic_to_iommu(IO_APIC_ID(apic));
 
     if ( !iommu->intremap.num ||
@@ -411,10 +411,7 @@ unsigned int cf_check io_apic_read_remap_rte(
     if ( remap_entry_to_ioapic_rte(iommu, index, &old_rte) )
         return __io_apic_read(apic, reg);
 
-    if ( rte_upper )
-        return (*(((u32 *)&old_rte) + 1));
-    else
-        return (*(((u32 *)&old_rte) + 0));
+    return rte_upper ? old_rte.high : old_rte.low;
 }
 
 void cf_check io_apic_write_remap_rte(
-- 
2.51.2



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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Date: Wed, 19 Nov 2025 12:07:18 +0100
From: Nicola Vetrini 
To: Mykola Kvach 
Cc: "Orzel, Michal" , xen-devel@lists.xenproject.org,
 Mykola Kvach , Stefano Stabellini
 , Julien Grall , Bertrand Marquis
 , Volodymyr Babchuk ,
 Andrew Cooper , Anthony PERARD
 , Jan Beulich ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
Subject: Re: [PATCH v14 1/4] xen/arm: Implement PSCI SYSTEM_SUSPEND call for
 guests
In-Reply-To: 
References: 
 <3786204d034ae4461aa0fde77771b8e14256314a.1763479083.git.xakep.amatop@gmail.com>
 <5a5b4bf6-4cd6-4b64-ba31-07a87b1fdbaa@amd.com>
 
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On 2025-11-19 12:00, Mykola Kvach wrote:
> Hi Michal,
> 
> Thanks for your review.
> 
> On Wed, Nov 19, 2025 at 10:48 AM Orzel, Michal  
> wrote:
>> 
>> 
>> 
>> On 18/11/2025 16:37, Mykola Kvach wrote:
>> > From: Mykola Kvach 
>> >
>> > Add support for the PSCI SYSTEM_SUSPEND function in the vPSCI interface,
>> > allowing guests to request suspend via the PSCI v1.0+ SYSTEM_SUSPEND call
>> > (both 32-bit and 64-bit variants).
>> >
>> > Implementation details:
>> > - Add SYSTEM_SUSPEND function IDs to PSCI definitions
>> > - Trap and handle SYSTEM_SUSPEND in vPSCI
>> > - Allow only non-hardware domains to invoke SYSTEM_SUSPEND; return
>> >   PSCI_NOT_SUPPORTED for the hardware domain to avoid halting the system
>> >   in hwdom_shutdown() via domain_shutdown
>> > - Require all secondary VCPUs of the calling domain to be offline before
>> >   suspend, as mandated by the PSCI specification
>> >
>> > The arch_domain_resume() function is an architecture-specific hook that is
>> > invoked during domain resume to perform any necessary setup or restoration
>> > steps required by the platform.
>> >
>> > The new vpsci_vcpu_up_prepare() helper is called on the resume path to set up
>> > the vCPU context (such as entry point, some system regs and context ID) before
>> > resuming a suspended guest. This keeps ARM/vPSCI-specific logic out of common
>> > code and avoids intrusive changes to the generic resume flow.
>> >
>> > Usage:
>> >
>> > For Linux-based guests, suspend can be initiated with:
>> >     echo mem > /sys/power/state
>> > or via:
>> >     systemctl suspend
>> >
>> > Resuming the guest is performed from control domain using:
>> >       xl resume 
>> >
>> > Signed-off-by: Mykola Kvach 
>> > ---
>> > Changes in V14:
>> > - move arch_domain_resume to a separate header
>> > - avoid usage of typeof for context struct
>> > - moved error printing from domain_resume to arch_domain_resume
>> >   in order to simplify common parts of code
>> > - minor changes after review
>> > ---
>> >  xen/arch/arm/domain.c                 |  41 +++++++++
>> >  xen/arch/arm/include/asm/domain.h     |   2 +
>> >  xen/arch/arm/include/asm/perfc_defn.h |   1 +
>> >  xen/arch/arm/include/asm/psci.h       |   2 +
>> >  xen/arch/arm/include/asm/suspend.h    |  24 ++++++
>> >  xen/arch/arm/include/asm/vpsci.h      |   5 +-
>> >  xen/arch/arm/vpsci.c                  | 116 +++++++++++++++++++++-----
>> >  xen/common/domain.c                   |   5 ++
>> >  xen/include/xen/suspend.h             |  15 ++++
>> >  9 files changed, 189 insertions(+), 22 deletions(-)
>> >  create mode 100644 xen/arch/arm/include/asm/suspend.h
>> >  create mode 100644 xen/include/xen/suspend.h
>> >
>> > diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
>> > index e36719bce4..3c0170480b 100644
>> > --- a/xen/arch/arm/domain.c
>> > +++ b/xen/arch/arm/domain.c
>> > @@ -12,6 +12,8 @@
>> >  #include 
>> >  #include 
>> >
>> > +#include 
>> > +
>> >  #include 
>> >  #include 
>> >  #include 
>> > @@ -24,10 +26,12 @@
>> >  #include 
>> >  #include 
>> >  #include 
>> > +#include 
>> >  #include 
>> >  #include 
>> >  #include 
>> >  #include 
>> > +#include 
>> >  #include 
>> >
>> >  #include "vpci.h"
>> > @@ -885,6 +889,43 @@ void arch_domain_creation_finished(struct domain *d)
>> >      p2m_domain_creation_finished(d);
>> >  }
>> >
>> > +int arch_domain_resume(struct domain *d)
>> > +{
>> > +    int rc;
>> > +    struct resume_info *ctx = &d->arch.resume_ctx;
>> > +
>> > +    if ( !d->is_shutting_down || d->shutdown_code != SHUTDOWN_suspend )
>> > +    {
>> > +        dprintk(XENLOG_WARNING,
>> > +                "%pd: Invalid domain state for resume: is_shutting_down=%d, shutdown_code=%d\n",
>> These are bool and uint, so %u should be used.
> 
> ack
> 
>> 
>> > +                d, d->is_shutting_down, d->shutdown_code);
>> > +        return -EINVAL;
>> > +    }
>> > +
>> > +    /*
>> > +     * It is still possible to call domain_shutdown() with a suspend reason
>> > +     * via some hypercalls, such as SCHEDOP_shutdown or SCHEDOP_remote_shutdown.
>> > +     * In these cases, the resume context will be empty.
>> > +     * This is not expected to cause any issues, so we just warn about the
>> > +     * situation and return without error, allowing the existing logic to
>> > +     * proceed as expected.
>> > +     */
>> > +    if ( !ctx->wake_cpu )
>> > +    {
>> > +        dprintk(XENLOG_INFO, "%pd: Wake CPU pointer context was not provided\n",
>> > +                d);
>> > +        return 0;
>> > +    }
>> > +
>> > +    rc = vpsci_vcpu_up_prepare(ctx->wake_cpu , ctx->ep, ctx->cid);
>> > +    if ( rc )
>> > +        printk("%pd: Failed to resume domain (ret %d)\n", d, rc);
>> > +
>> > +    memset(ctx, 0, sizeof(*ctx));
>> > +
>> > +    return rc;
>> > +}
>> > +
>> >  static int is_guest_pv32_psr(uint32_t psr)
>> >  {
>> >      switch (psr & PSR_MODE_MASK)
>> > diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h
>> > index af3e168374..e637cb4de0 100644
>> > --- a/xen/arch/arm/include/asm/domain.h
>> > +++ b/xen/arch/arm/include/asm/domain.h
>> > @@ -5,6 +5,7 @@
>> >  #include 
>> >  #include 
>> >  #include 
>> > +#include 
>> >  #include 
>> >  #include 
>> >  #include 
>> > @@ -126,6 +127,7 @@ struct arch_domain
>> >      void *sci_data;
>> >  #endif
>> >
>> > +    struct resume_info resume_ctx;
>> >  }  __cacheline_aligned;
>> >
>> >  struct arch_vcpu
>> > diff --git a/xen/arch/arm/include/asm/perfc_defn.h b/xen/arch/arm/include/asm/perfc_defn.h
>> > index effd25b69e..8dfcac7e3b 100644
>> > --- a/xen/arch/arm/include/asm/perfc_defn.h
>> > +++ b/xen/arch/arm/include/asm/perfc_defn.h
>> > @@ -33,6 +33,7 @@ PERFCOUNTER(vpsci_system_reset,        "vpsci: system_reset")
>> >  PERFCOUNTER(vpsci_cpu_suspend,         "vpsci: cpu_suspend")
>> >  PERFCOUNTER(vpsci_cpu_affinity_info,   "vpsci: cpu_affinity_info")
>> >  PERFCOUNTER(vpsci_features,            "vpsci: features")
>> > +PERFCOUNTER(vpsci_system_suspend,      "vpsci: system_suspend")
>> >
>> >  PERFCOUNTER(vcpu_kick,                 "vcpu: notify other vcpu")
>> >
>> > diff --git a/xen/arch/arm/include/asm/psci.h b/xen/arch/arm/include/asm/psci.h
>> > index 4780972621..48a93e6b79 100644
>> > --- a/xen/arch/arm/include/asm/psci.h
>> > +++ b/xen/arch/arm/include/asm/psci.h
>> > @@ -47,10 +47,12 @@ void call_psci_system_reset(void);
>> >  #define PSCI_0_2_FN32_SYSTEM_OFF          PSCI_0_2_FN32(8)
>> >  #define PSCI_0_2_FN32_SYSTEM_RESET        PSCI_0_2_FN32(9)
>> >  #define PSCI_1_0_FN32_PSCI_FEATURES       PSCI_0_2_FN32(10)
>> > +#define PSCI_1_0_FN32_SYSTEM_SUSPEND      PSCI_0_2_FN32(14)
>> >
>> >  #define PSCI_0_2_FN64_CPU_SUSPEND         PSCI_0_2_FN64(1)
>> >  #define PSCI_0_2_FN64_CPU_ON              PSCI_0_2_FN64(3)
>> >  #define PSCI_0_2_FN64_AFFINITY_INFO       PSCI_0_2_FN64(4)
>> > +#define PSCI_1_0_FN64_SYSTEM_SUSPEND      PSCI_0_2_FN64(14)
>> >
>> >  /* PSCI v0.2 affinity level state returned by AFFINITY_INFO */
>> >  #define PSCI_0_2_AFFINITY_LEVEL_ON      0
>> > diff --git a/xen/arch/arm/include/asm/suspend.h b/xen/arch/arm/include/asm/suspend.h
>> > new file mode 100644
>> > index 0000000000..b991a94d5a
>> > --- /dev/null
>> > +++ b/xen/arch/arm/include/asm/suspend.h
>> > @@ -0,0 +1,24 @@
>> > +/* SPDX-License-Identifier: GPL-2.0-only */
>> > +
>> > +#ifndef __ARM_SUSPEND_H__
>> There should be no double underscores in guards (see examples in 
>> CODING_STYLE)
> 
> I had initially followed the style used by some of the existing headers
> in this directory, which still use guards with double underscores.
> 
> I'll remove underscores in the next series.
> 
>> > +#define __ARM_SUSPEND_H__
>> > +
>> > +struct resume_info {
>> > +    register_t ep;
>> > +    register_t cid;
>> > +    struct vcpu *wake_cpu;
>> > +};
>> > +
>> > +int arch_domain_resume(struct domain *d);
>> If possible, headers should be standalone, meaning you should include 
>> necessary
>> headers or forward declare what's missing.
> 
> Thanks for the comment.
> 
> My initial intention was to avoid adding new dependencies from asm
> headers to higher-level Xen headers, so I did not include e.g.
>  directly here. In this header we only need pointers to
> struct domain and struct vcpu, we never dereference them, so forward
> declarations would be sufficient to make it standalone.
> 
> I also noticed that some existing asm headers in this directory do
> include higher-level Xen headers, so both patterns exist in the tree.
> 
> If you prefer, I can either:
>   - add forward declarations
> 
>       struct domain;
>       struct vcpu;
> 
>     at the top of this header and keep the full includes in the .c
>     files that actually dereference these types, or
> 
>   - include the appropriate Xen header(s) directly in this header.
> 
> Personally I slightly prefer the forward-declaration approach to keep
> this header lightweight and avoid tightening the layering, but I am
> happy to follow your preference.
> 
>> 
>> > +
>> > +#endif /* __ARM_SUSPEND_H__ */
>> > +
>> > + /*
>> > +  * Local variables:
>> > +  * mode: C
>> > +  * c-file-style: "BSD"
>> > +  * c-basic-offset: 4
>> > +  * tab-width: 4
>> > +  * indent-tabs-mode: nil
>> > +  * End:
>> > +  */
>> > diff --git a/xen/arch/arm/include/asm/vpsci.h b/xen/arch/arm/include/asm/vpsci.h
>> > index 0cca5e6830..d790ab3715 100644
>> > --- a/xen/arch/arm/include/asm/vpsci.h
>> > +++ b/xen/arch/arm/include/asm/vpsci.h
>> > @@ -23,12 +23,15 @@
>> >  #include 
>> >
>> >  /* Number of function implemented by virtual PSCI (only 0.2 or later) */
>> > -#define VPSCI_NR_FUNCS  12
>> > +#define VPSCI_NR_FUNCS  14
>> >
>> >  /* Functions handle PSCI calls from the guests */
>> >  bool do_vpsci_0_1_call(struct cpu_user_regs *regs, uint32_t fid);
>> >  bool do_vpsci_0_2_call(struct cpu_user_regs *regs, uint32_t fid);
>> >
>> > +int vpsci_vcpu_up_prepare(struct vcpu *v, register_t entry_point,
>> > +                          register_t context_id);
>> > +
>> >  #endif /* __ASM_VPSCI_H__ */
>> >
>> >  /*
>> > diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c
>> > index 7ba9ccd94b..22c3a5f544 100644
>> > --- a/xen/arch/arm/vpsci.c
>> > +++ b/xen/arch/arm/vpsci.c
>> > @@ -10,32 +10,16 @@
>> >
>> >  #include 
>> >
>> > -static int do_common_cpu_on(register_t target_cpu, register_t entry_point,
>> > -                            register_t context_id)
>> > +int vpsci_vcpu_up_prepare(struct vcpu *v, register_t entry_point,
>> > +                   register_t context_id)
>> NIT: incorrect parameter alignment
> 
> ack
> 
>> 
>> >  {
>> > -    struct vcpu *v;
>> > -    struct domain *d = current->domain;
>> > -    struct vcpu_guest_context *ctxt;
>> >      int rc;
>> > +    struct domain *d = v->domain;
>> >      bool is_thumb = entry_point & 1;
>> > -    register_t vcpuid;
>> > -
>> > -    vcpuid = vaffinity_to_vcpuid(target_cpu);
>> > -
>> > -    if ( (v = domain_vcpu(d, vcpuid)) == NULL )
>> > -        return PSCI_INVALID_PARAMETERS;
>> > -
>> > -    /* THUMB set is not allowed with 64-bit domain */
>> > -    if ( is_64bit_domain(d) && is_thumb )
>> > -        return PSCI_INVALID_ADDRESS;
>> > -
>> > -    if ( !test_bit(_VPF_down, &v->pause_flags) )
>> > -        return PSCI_ALREADY_ON;
>> > +    struct vcpu_guest_context *ctxt;
>> >
>> >      if ( (ctxt = alloc_vcpu_guest_context()) == NULL )
>> > -        return PSCI_DENIED;
>> > -
>> > -    vgic_clear_pending_irqs(v);
>> > +        return -ENOMEM;
>> >
>> >      memset(ctxt, 0, sizeof(*ctxt));
>> >      ctxt->user_regs.pc64 = (u64) entry_point;
>> > @@ -76,8 +60,37 @@ static int do_common_cpu_on(register_t target_cpu, register_t entry_point,
>> >      free_vcpu_guest_context(ctxt);
>> >
>> >      if ( rc < 0 )
>> > +        return rc;
>> > +
>> > +    return 0;
>> > +}
>> > +
>> > +static int do_common_cpu_on(register_t target_cpu, register_t entry_point,
>> > +                            register_t context_id)
>> > +{
>> > +    struct vcpu *v;
>> > +    struct domain *d = current->domain;
>> > +    int rc;
>> > +    bool is_thumb = entry_point & 1;
>> > +    register_t vcpuid;
>> > +
>> > +    vcpuid = vaffinity_to_vcpuid(target_cpu);
>> > +
>> > +    if ( (v = domain_vcpu(d, vcpuid)) == NULL )
>> > +        return PSCI_INVALID_PARAMETERS;
>> > +
>> > +    /* THUMB set is not allowed with 64-bit domain */
>> > +    if ( is_64bit_domain(d) && is_thumb )
>> > +        return PSCI_INVALID_ADDRESS;
>> > +
>> > +    if ( !test_bit(_VPF_down, &v->pause_flags) )
>> > +        return PSCI_ALREADY_ON;
>> > +
>> > +    rc = vpsci_vcpu_up_prepare(v, entry_point, context_id);
>> > +    if ( rc )
>> >          return PSCI_DENIED;
>> >
>> > +    vgic_clear_pending_irqs(v);
>> >      vcpu_wake(v);
>> >
>> >      return PSCI_SUCCESS;
>> > @@ -197,6 +210,48 @@ static void do_psci_0_2_system_reset(void)
>> >      domain_shutdown(d,SHUTDOWN_reboot);
>> >  }
>> >
>> > +static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid)
>> > +{
>> > +    int32_t rc;
>> > +    struct vcpu *v;
>> > +    struct domain *d = current->domain;
>> > +    bool is_thumb = epoint & 1;
>> > +
>> > +    /* THUMB set is not allowed with 64-bit domain */
>> > +    if ( is_64bit_domain(d) && is_thumb )
>> > +        return PSCI_INVALID_ADDRESS;
>> > +
>> > +    /* SYSTEM_SUSPEND is not supported for the hardware domain yet */
>> > +    if ( is_hardware_domain(d) )
>> > +        return PSCI_NOT_SUPPORTED;
>> > +
>> > +    /* Ensure that all CPUs other than the calling one are offline */
>> > +    domain_lock(d);
>> > +    for_each_vcpu ( d, v )
>> > +    {
>> > +        if ( v != current && is_vcpu_online(v) )
>> > +        {
>> > +            domain_unlock(d);
>> > +            return PSCI_DENIED;
>> > +        }
>> > +    }
>> > +    domain_unlock(d);
>> > +
>> > +    rc = domain_shutdown(d, SHUTDOWN_suspend);
>> > +    if ( rc )
>> > +        return PSCI_DENIED;
>> > +
>> > +    d->arch.resume_ctx.ep = epoint;
>> > +    d->arch.resume_ctx.cid = cid;
>> > +    d->arch.resume_ctx.wake_cpu = current;
>> > +
>> > +    gprintk(XENLOG_DEBUG,
>> > +            "SYSTEM_SUSPEND requested, epoint=0x%"PRIregister", cid=0x%"PRIregister"\n",
>> NIT: %# is preffered over 0x%.
> 
> ack
> 
>> 
>> > +            epoint, cid);
>> > +
>> > +    return rc;
>> > +}
>> > +
>> >  static int32_t do_psci_1_0_features(uint32_t psci_func_id)
>> >  {
>> >      /* /!\ Ordered by function ID and not name */
>> > @@ -214,6 +269,8 @@ static int32_t do_psci_1_0_features(uint32_t psci_func_id)
>> >      case PSCI_0_2_FN32_SYSTEM_OFF:
>> >      case PSCI_0_2_FN32_SYSTEM_RESET:
>> >      case PSCI_1_0_FN32_PSCI_FEATURES:
>> > +    case PSCI_1_0_FN32_SYSTEM_SUSPEND:
>> > +    case PSCI_1_0_FN64_SYSTEM_SUSPEND:
>> >      case ARM_SMCCC_VERSION_FID:
>> >          return 0;
>> >      default:
>> > @@ -344,6 +401,23 @@ bool do_vpsci_0_2_call(struct cpu_user_regs *regs, uint32_t fid)
>> >          return true;
>> >      }
>> >
>> > +    case PSCI_1_0_FN32_SYSTEM_SUSPEND:
>> > +    case PSCI_1_0_FN64_SYSTEM_SUSPEND:
>> > +    {
>> > +        register_t epoint = PSCI_ARG(regs, 1);
>> > +        register_t cid = PSCI_ARG(regs, 2);
>> > +
>> > +        if ( fid == PSCI_1_0_FN32_SYSTEM_SUSPEND )
>> > +        {
>> > +            epoint &= GENMASK(31, 0);
>> > +            cid &= GENMASK(31, 0);
>> > +        }
>> > +
>> > +        perfc_incr(vpsci_system_suspend);
>> > +        PSCI_SET_RESULT(regs, do_psci_1_0_system_suspend(epoint, cid));
>> > +        return true;
>> > +    }
>> > +
>> >      default:
>> >          return false;
>> >      }
>> > diff --git a/xen/common/domain.c b/xen/common/domain.c
>> > index 775c339285..6410d32970 100644
>> > --- a/xen/common/domain.c
>> > +++ b/xen/common/domain.c
>> > @@ -26,6 +26,7 @@
>> >  #include 
>> >  #include 
>> >  #include 
>> > +#include 
>> >  #include 
>> >  #include 
>> >  #include 
>> > @@ -1363,6 +1364,9 @@ void domain_resume(struct domain *d)
>> >
>> >      spin_lock(&d->shutdown_lock);
>> >
>> > +    if ( arch_domain_resume(d) )
>> > +        goto fail;
>> > +
>> >      d->is_shutting_down = d->is_shut_down = 0;
>> >      d->shutdown_code = SHUTDOWN_CODE_INVALID;
>> >
>> > @@ -1373,6 +1377,7 @@ void domain_resume(struct domain *d)
>> >          v->paused_for_shutdown = 0;
>> >      }
>> >
>> > + fail:
>> >      spin_unlock(&d->shutdown_lock);
>> >
>> >      domain_unpause(d);
>> > diff --git a/xen/include/xen/suspend.h b/xen/include/xen/suspend.h
>> > new file mode 100644
>> > index 0000000000..53f75fd6ad
>> > --- /dev/null
>> > +++ b/xen/include/xen/suspend.h
>> > @@ -0,0 +1,15 @@
>> > +/* SPDX-License-Identifier: GPL-2.0-only */
>> > +#ifndef __XEN_SUSPEND_H__
>> There should be no double underscores in guards
> 
> I initially followed the style used by the existing headers in this
> directory, which still have include guards with double underscores.
> 
> You are right that this does not match CODING_STYLE examples.
> I will update this header to use a proper guard name.
> 
>> 
>> > +#define __XEN_SUSPEND_H__
>> > +
>> > +#if __has_include()
>> > +#include 
>> > +#else
>> > +static inline int arch_domain_resume(struct domain *d)
>> > +{
>> > +    return 0;
>> > +}
>> > +#endif
>> > +
>> Stray whiteline?
> 
> will drop
> 
>> 
>> > +
>> > +#endif /* __XEN_SUSPEND_H__ */
>> Missing emacs block?
> 
> It is permitted but isn't necessary as far as know,
> but if it needed here per your opinion I'll add it
> just let me know
> 
>> 
>> Did you run MISRA scan on this patch?
> 
> Yes, I ran it with:
> 
>   ./xen/scripts/xen-analysis.py \
>       --run-cppcheck --cppcheck-misra --cppcheck-html -- \
>       XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu-
> 
> The analysis did not report any new MISRA violations in the code
> touched by this patch.
> 

This just runs cppcheck, which has many false negatives, but the 
upstream analysis should be done using ECLAIR with GitLab pipelines

>> 
>> ~Michal
>> 
>> 
> 
> Best regards,
> Mykola

-- 
Nicola Vetrini, B.Sc.
Software Engineer
BUGSENG (https://bugseng.com)
LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253


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Subject: Re: [PATCH v14 1/4] xen/arm: Implement PSCI SYSTEM_SUSPEND call for
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To: Mykola Kvach 
CC: , Mykola Kvach ,
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	Bertrand Marquis , Volodymyr Babchuk
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On 19/11/2025 12:00, Mykola Kvach wrote:
> Hi Michal,
> 
> Thanks for your review.
> 
> On Wed, Nov 19, 2025 at 10:48 AM Orzel, Michal  wrote:
>>
>>
>>
>> On 18/11/2025 16:37, Mykola Kvach wrote:
>>> From: Mykola Kvach 
>>>
>>> Add support for the PSCI SYSTEM_SUSPEND function in the vPSCI interface,
>>> allowing guests to request suspend via the PSCI v1.0+ SYSTEM_SUSPEND call
>>> (both 32-bit and 64-bit variants).
>>>
>>> Implementation details:
>>> - Add SYSTEM_SUSPEND function IDs to PSCI definitions
>>> - Trap and handle SYSTEM_SUSPEND in vPSCI
>>> - Allow only non-hardware domains to invoke SYSTEM_SUSPEND; return
>>>   PSCI_NOT_SUPPORTED for the hardware domain to avoid halting the system
>>>   in hwdom_shutdown() via domain_shutdown
>>> - Require all secondary VCPUs of the calling domain to be offline before
>>>   suspend, as mandated by the PSCI specification
>>>
>>> The arch_domain_resume() function is an architecture-specific hook that is
>>> invoked during domain resume to perform any necessary setup or restoration
>>> steps required by the platform.
>>>
>>> The new vpsci_vcpu_up_prepare() helper is called on the resume path to set up
>>> the vCPU context (such as entry point, some system regs and context ID) before
>>> resuming a suspended guest. This keeps ARM/vPSCI-specific logic out of common
>>> code and avoids intrusive changes to the generic resume flow.
>>>
>>> Usage:
>>>
>>> For Linux-based guests, suspend can be initiated with:
>>>     echo mem > /sys/power/state
>>> or via:
>>>     systemctl suspend
>>>
>>> Resuming the guest is performed from control domain using:
>>>       xl resume 
>>>
>>> Signed-off-by: Mykola Kvach 
>>> ---
>>> Changes in V14:
>>> - move arch_domain_resume to a separate header
>>> - avoid usage of typeof for context struct
>>> - moved error printing from domain_resume to arch_domain_resume
>>>   in order to simplify common parts of code
>>> - minor changes after review
>>> ---
>>>  xen/arch/arm/domain.c                 |  41 +++++++++
>>>  xen/arch/arm/include/asm/domain.h     |   2 +
>>>  xen/arch/arm/include/asm/perfc_defn.h |   1 +
>>>  xen/arch/arm/include/asm/psci.h       |   2 +
>>>  xen/arch/arm/include/asm/suspend.h    |  24 ++++++
>>>  xen/arch/arm/include/asm/vpsci.h      |   5 +-
>>>  xen/arch/arm/vpsci.c                  | 116 +++++++++++++++++++++-----
>>>  xen/common/domain.c                   |   5 ++
>>>  xen/include/xen/suspend.h             |  15 ++++
>>>  9 files changed, 189 insertions(+), 22 deletions(-)
>>>  create mode 100644 xen/arch/arm/include/asm/suspend.h
>>>  create mode 100644 xen/include/xen/suspend.h
>>>
>>> diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
>>> index e36719bce4..3c0170480b 100644
>>> --- a/xen/arch/arm/domain.c
>>> +++ b/xen/arch/arm/domain.c
>>> @@ -12,6 +12,8 @@
>>>  #include 
>>>  #include 
>>>
>>> +#include 
>>> +
>>>  #include 
>>>  #include 
>>>  #include 
>>> @@ -24,10 +26,12 @@
>>>  #include 
>>>  #include 
>>>  #include 
>>> +#include 
>>>  #include 
>>>  #include 
>>>  #include 
>>>  #include 
>>> +#include 
>>>  #include 
>>>
>>>  #include "vpci.h"
>>> @@ -885,6 +889,43 @@ void arch_domain_creation_finished(struct domain *d)
>>>      p2m_domain_creation_finished(d);
>>>  }
>>>
>>> +int arch_domain_resume(struct domain *d)
>>> +{
>>> +    int rc;
>>> +    struct resume_info *ctx = &d->arch.resume_ctx;
>>> +
>>> +    if ( !d->is_shutting_down || d->shutdown_code != SHUTDOWN_suspend )
>>> +    {
>>> +        dprintk(XENLOG_WARNING,
>>> +                "%pd: Invalid domain state for resume: is_shutting_down=%d, shutdown_code=%d\n",
>> These are bool and uint, so %u should be used.
> 
> ack
> 
>>
>>> +                d, d->is_shutting_down, d->shutdown_code);
>>> +        return -EINVAL;
>>> +    }
>>> +
>>> +    /*
>>> +     * It is still possible to call domain_shutdown() with a suspend reason
>>> +     * via some hypercalls, such as SCHEDOP_shutdown or SCHEDOP_remote_shutdown.
>>> +     * In these cases, the resume context will be empty.
>>> +     * This is not expected to cause any issues, so we just warn about the
>>> +     * situation and return without error, allowing the existing logic to
>>> +     * proceed as expected.
>>> +     */
>>> +    if ( !ctx->wake_cpu )
>>> +    {
>>> +        dprintk(XENLOG_INFO, "%pd: Wake CPU pointer context was not provided\n",
>>> +                d);
>>> +        return 0;
>>> +    }
>>> +
>>> +    rc = vpsci_vcpu_up_prepare(ctx->wake_cpu , ctx->ep, ctx->cid);
>>> +    if ( rc )
>>> +        printk("%pd: Failed to resume domain (ret %d)\n", d, rc);
>>> +
>>> +    memset(ctx, 0, sizeof(*ctx));
>>> +
>>> +    return rc;
>>> +}
>>> +
>>>  static int is_guest_pv32_psr(uint32_t psr)
>>>  {
>>>      switch (psr & PSR_MODE_MASK)
>>> diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h
>>> index af3e168374..e637cb4de0 100644
>>> --- a/xen/arch/arm/include/asm/domain.h
>>> +++ b/xen/arch/arm/include/asm/domain.h
>>> @@ -5,6 +5,7 @@
>>>  #include 
>>>  #include 
>>>  #include 
>>> +#include 
>>>  #include 
>>>  #include 
>>>  #include 
>>> @@ -126,6 +127,7 @@ struct arch_domain
>>>      void *sci_data;
>>>  #endif
>>>
>>> +    struct resume_info resume_ctx;
>>>  }  __cacheline_aligned;
>>>
>>>  struct arch_vcpu
>>> diff --git a/xen/arch/arm/include/asm/perfc_defn.h b/xen/arch/arm/include/asm/perfc_defn.h
>>> index effd25b69e..8dfcac7e3b 100644
>>> --- a/xen/arch/arm/include/asm/perfc_defn.h
>>> +++ b/xen/arch/arm/include/asm/perfc_defn.h
>>> @@ -33,6 +33,7 @@ PERFCOUNTER(vpsci_system_reset,        "vpsci: system_reset")
>>>  PERFCOUNTER(vpsci_cpu_suspend,         "vpsci: cpu_suspend")
>>>  PERFCOUNTER(vpsci_cpu_affinity_info,   "vpsci: cpu_affinity_info")
>>>  PERFCOUNTER(vpsci_features,            "vpsci: features")
>>> +PERFCOUNTER(vpsci_system_suspend,      "vpsci: system_suspend")
>>>
>>>  PERFCOUNTER(vcpu_kick,                 "vcpu: notify other vcpu")
>>>
>>> diff --git a/xen/arch/arm/include/asm/psci.h b/xen/arch/arm/include/asm/psci.h
>>> index 4780972621..48a93e6b79 100644
>>> --- a/xen/arch/arm/include/asm/psci.h
>>> +++ b/xen/arch/arm/include/asm/psci.h
>>> @@ -47,10 +47,12 @@ void call_psci_system_reset(void);
>>>  #define PSCI_0_2_FN32_SYSTEM_OFF          PSCI_0_2_FN32(8)
>>>  #define PSCI_0_2_FN32_SYSTEM_RESET        PSCI_0_2_FN32(9)
>>>  #define PSCI_1_0_FN32_PSCI_FEATURES       PSCI_0_2_FN32(10)
>>> +#define PSCI_1_0_FN32_SYSTEM_SUSPEND      PSCI_0_2_FN32(14)
>>>
>>>  #define PSCI_0_2_FN64_CPU_SUSPEND         PSCI_0_2_FN64(1)
>>>  #define PSCI_0_2_FN64_CPU_ON              PSCI_0_2_FN64(3)
>>>  #define PSCI_0_2_FN64_AFFINITY_INFO       PSCI_0_2_FN64(4)
>>> +#define PSCI_1_0_FN64_SYSTEM_SUSPEND      PSCI_0_2_FN64(14)
>>>
>>>  /* PSCI v0.2 affinity level state returned by AFFINITY_INFO */
>>>  #define PSCI_0_2_AFFINITY_LEVEL_ON      0
>>> diff --git a/xen/arch/arm/include/asm/suspend.h b/xen/arch/arm/include/asm/suspend.h
>>> new file mode 100644
>>> index 0000000000..b991a94d5a
>>> --- /dev/null
>>> +++ b/xen/arch/arm/include/asm/suspend.h
>>> @@ -0,0 +1,24 @@
>>> +/* SPDX-License-Identifier: GPL-2.0-only */
>>> +
>>> +#ifndef __ARM_SUSPEND_H__
>> There should be no double underscores in guards (see examples in CODING_STYLE)
> 
> I had initially followed the style used by some of the existing headers
> in this directory, which still use guards with double underscores.
> 
> I'll remove underscores in the next series.
> 
>>> +#define __ARM_SUSPEND_H__
>>> +
>>> +struct resume_info {
>>> +    register_t ep;
>>> +    register_t cid;
>>> +    struct vcpu *wake_cpu;
>>> +};
>>> +
>>> +int arch_domain_resume(struct domain *d);
>> If possible, headers should be standalone, meaning you should include necessary
>> headers or forward declare what's missing.
> 
> Thanks for the comment.
> 
> My initial intention was to avoid adding new dependencies from asm
> headers to higher-level Xen headers, so I did not include e.g.
>  directly here. In this header we only need pointers to
> struct domain and struct vcpu, we never dereference them, so forward
> declarations would be sufficient to make it standalone.
> 
> I also noticed that some existing asm headers in this directory do
> include higher-level Xen headers, so both patterns exist in the tree.
> 
> If you prefer, I can either:
>   - add forward declarations
> 
>       struct domain;
>       struct vcpu;
> 
>     at the top of this header and keep the full includes in the .c
>     files that actually dereference these types, or
> 
>   - include the appropriate Xen header(s) directly in this header.
> 
> Personally I slightly prefer the forward-declaration approach to keep
> this header lightweight and avoid tightening the layering, but I am
> happy to follow your preference.
My preference is also to forward declare these structs.

> 
>>
>>> +
>>> +#endif /* __ARM_SUSPEND_H__ */
>>> +
>>> + /*
>>> +  * Local variables:
>>> +  * mode: C
>>> +  * c-file-style: "BSD"
>>> +  * c-basic-offset: 4
>>> +  * tab-width: 4
>>> +  * indent-tabs-mode: nil
>>> +  * End:
>>> +  */
>>> diff --git a/xen/arch/arm/include/asm/vpsci.h b/xen/arch/arm/include/asm/vpsci.h
>>> index 0cca5e6830..d790ab3715 100644
>>> --- a/xen/arch/arm/include/asm/vpsci.h
>>> +++ b/xen/arch/arm/include/asm/vpsci.h
>>> @@ -23,12 +23,15 @@
>>>  #include 
>>>
>>>  /* Number of function implemented by virtual PSCI (only 0.2 or later) */
>>> -#define VPSCI_NR_FUNCS  12
>>> +#define VPSCI_NR_FUNCS  14
>>>
>>>  /* Functions handle PSCI calls from the guests */
>>>  bool do_vpsci_0_1_call(struct cpu_user_regs *regs, uint32_t fid);
>>>  bool do_vpsci_0_2_call(struct cpu_user_regs *regs, uint32_t fid);
>>>
>>> +int vpsci_vcpu_up_prepare(struct vcpu *v, register_t entry_point,
>>> +                          register_t context_id);
>>> +
>>>  #endif /* __ASM_VPSCI_H__ */
>>>
>>>  /*
>>> diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c
>>> index 7ba9ccd94b..22c3a5f544 100644
>>> --- a/xen/arch/arm/vpsci.c
>>> +++ b/xen/arch/arm/vpsci.c
>>> @@ -10,32 +10,16 @@
>>>
>>>  #include 
>>>
>>> -static int do_common_cpu_on(register_t target_cpu, register_t entry_point,
>>> -                            register_t context_id)
>>> +int vpsci_vcpu_up_prepare(struct vcpu *v, register_t entry_point,
>>> +                   register_t context_id)
>> NIT: incorrect parameter alignment
> 
> ack
> 
>>
>>>  {
>>> -    struct vcpu *v;
>>> -    struct domain *d = current->domain;
>>> -    struct vcpu_guest_context *ctxt;
>>>      int rc;
>>> +    struct domain *d = v->domain;
>>>      bool is_thumb = entry_point & 1;
>>> -    register_t vcpuid;
>>> -
>>> -    vcpuid = vaffinity_to_vcpuid(target_cpu);
>>> -
>>> -    if ( (v = domain_vcpu(d, vcpuid)) == NULL )
>>> -        return PSCI_INVALID_PARAMETERS;
>>> -
>>> -    /* THUMB set is not allowed with 64-bit domain */
>>> -    if ( is_64bit_domain(d) && is_thumb )
>>> -        return PSCI_INVALID_ADDRESS;
>>> -
>>> -    if ( !test_bit(_VPF_down, &v->pause_flags) )
>>> -        return PSCI_ALREADY_ON;
>>> +    struct vcpu_guest_context *ctxt;
>>>
>>>      if ( (ctxt = alloc_vcpu_guest_context()) == NULL )
>>> -        return PSCI_DENIED;
>>> -
>>> -    vgic_clear_pending_irqs(v);
>>> +        return -ENOMEM;
>>>
>>>      memset(ctxt, 0, sizeof(*ctxt));
>>>      ctxt->user_regs.pc64 = (u64) entry_point;
>>> @@ -76,8 +60,37 @@ static int do_common_cpu_on(register_t target_cpu, register_t entry_point,
>>>      free_vcpu_guest_context(ctxt);
>>>
>>>      if ( rc < 0 )
>>> +        return rc;
>>> +
>>> +    return 0;
>>> +}
>>> +
>>> +static int do_common_cpu_on(register_t target_cpu, register_t entry_point,
>>> +                            register_t context_id)
>>> +{
>>> +    struct vcpu *v;
>>> +    struct domain *d = current->domain;
>>> +    int rc;
>>> +    bool is_thumb = entry_point & 1;
>>> +    register_t vcpuid;
>>> +
>>> +    vcpuid = vaffinity_to_vcpuid(target_cpu);
>>> +
>>> +    if ( (v = domain_vcpu(d, vcpuid)) == NULL )
>>> +        return PSCI_INVALID_PARAMETERS;
>>> +
>>> +    /* THUMB set is not allowed with 64-bit domain */
>>> +    if ( is_64bit_domain(d) && is_thumb )
>>> +        return PSCI_INVALID_ADDRESS;
>>> +
>>> +    if ( !test_bit(_VPF_down, &v->pause_flags) )
>>> +        return PSCI_ALREADY_ON;
>>> +
>>> +    rc = vpsci_vcpu_up_prepare(v, entry_point, context_id);
>>> +    if ( rc )
>>>          return PSCI_DENIED;
>>>
>>> +    vgic_clear_pending_irqs(v);
>>>      vcpu_wake(v);
>>>
>>>      return PSCI_SUCCESS;
>>> @@ -197,6 +210,48 @@ static void do_psci_0_2_system_reset(void)
>>>      domain_shutdown(d,SHUTDOWN_reboot);
>>>  }
>>>
>>> +static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid)
>>> +{
>>> +    int32_t rc;
>>> +    struct vcpu *v;
>>> +    struct domain *d = current->domain;
>>> +    bool is_thumb = epoint & 1;
>>> +
>>> +    /* THUMB set is not allowed with 64-bit domain */
>>> +    if ( is_64bit_domain(d) && is_thumb )
>>> +        return PSCI_INVALID_ADDRESS;
>>> +
>>> +    /* SYSTEM_SUSPEND is not supported for the hardware domain yet */
>>> +    if ( is_hardware_domain(d) )
>>> +        return PSCI_NOT_SUPPORTED;
>>> +
>>> +    /* Ensure that all CPUs other than the calling one are offline */
>>> +    domain_lock(d);
>>> +    for_each_vcpu ( d, v )
>>> +    {
>>> +        if ( v != current && is_vcpu_online(v) )
>>> +        {
>>> +            domain_unlock(d);
>>> +            return PSCI_DENIED;
>>> +        }
>>> +    }
>>> +    domain_unlock(d);
>>> +
>>> +    rc = domain_shutdown(d, SHUTDOWN_suspend);
>>> +    if ( rc )
>>> +        return PSCI_DENIED;
>>> +
>>> +    d->arch.resume_ctx.ep = epoint;
>>> +    d->arch.resume_ctx.cid = cid;
>>> +    d->arch.resume_ctx.wake_cpu = current;
>>> +
>>> +    gprintk(XENLOG_DEBUG,
>>> +            "SYSTEM_SUSPEND requested, epoint=0x%"PRIregister", cid=0x%"PRIregister"\n",
>> NIT: %# is preffered over 0x%.
> 
> ack
> 
>>
>>> +            epoint, cid);
>>> +
>>> +    return rc;
>>> +}
>>> +
>>>  static int32_t do_psci_1_0_features(uint32_t psci_func_id)
>>>  {
>>>      /* /!\ Ordered by function ID and not name */
>>> @@ -214,6 +269,8 @@ static int32_t do_psci_1_0_features(uint32_t psci_func_id)
>>>      case PSCI_0_2_FN32_SYSTEM_OFF:
>>>      case PSCI_0_2_FN32_SYSTEM_RESET:
>>>      case PSCI_1_0_FN32_PSCI_FEATURES:
>>> +    case PSCI_1_0_FN32_SYSTEM_SUSPEND:
>>> +    case PSCI_1_0_FN64_SYSTEM_SUSPEND:
>>>      case ARM_SMCCC_VERSION_FID:
>>>          return 0;
>>>      default:
>>> @@ -344,6 +401,23 @@ bool do_vpsci_0_2_call(struct cpu_user_regs *regs, uint32_t fid)
>>>          return true;
>>>      }
>>>
>>> +    case PSCI_1_0_FN32_SYSTEM_SUSPEND:
>>> +    case PSCI_1_0_FN64_SYSTEM_SUSPEND:
>>> +    {
>>> +        register_t epoint = PSCI_ARG(regs, 1);
>>> +        register_t cid = PSCI_ARG(regs, 2);
>>> +
>>> +        if ( fid == PSCI_1_0_FN32_SYSTEM_SUSPEND )
>>> +        {
>>> +            epoint &= GENMASK(31, 0);
>>> +            cid &= GENMASK(31, 0);
>>> +        }
>>> +
>>> +        perfc_incr(vpsci_system_suspend);
>>> +        PSCI_SET_RESULT(regs, do_psci_1_0_system_suspend(epoint, cid));
>>> +        return true;
>>> +    }
>>> +
>>>      default:
>>>          return false;
>>>      }
>>> diff --git a/xen/common/domain.c b/xen/common/domain.c
>>> index 775c339285..6410d32970 100644
>>> --- a/xen/common/domain.c
>>> +++ b/xen/common/domain.c
>>> @@ -26,6 +26,7 @@
>>>  #include 
>>>  #include 
>>>  #include 
>>> +#include 
>>>  #include 
>>>  #include 
>>>  #include 
>>> @@ -1363,6 +1364,9 @@ void domain_resume(struct domain *d)
>>>
>>>      spin_lock(&d->shutdown_lock);
>>>
>>> +    if ( arch_domain_resume(d) )
>>> +        goto fail;
>>> +
>>>      d->is_shutting_down = d->is_shut_down = 0;
>>>      d->shutdown_code = SHUTDOWN_CODE_INVALID;
>>>
>>> @@ -1373,6 +1377,7 @@ void domain_resume(struct domain *d)
>>>          v->paused_for_shutdown = 0;
>>>      }
>>>
>>> + fail:
>>>      spin_unlock(&d->shutdown_lock);
>>>
>>>      domain_unpause(d);
>>> diff --git a/xen/include/xen/suspend.h b/xen/include/xen/suspend.h
>>> new file mode 100644
>>> index 0000000000..53f75fd6ad
>>> --- /dev/null
>>> +++ b/xen/include/xen/suspend.h
>>> @@ -0,0 +1,15 @@
>>> +/* SPDX-License-Identifier: GPL-2.0-only */
>>> +#ifndef __XEN_SUSPEND_H__
>> There should be no double underscores in guards
> 
> I initially followed the style used by the existing headers in this
> directory, which still have include guards with double underscores.
> 
> You are right that this does not match CODING_STYLE examples.
> I will update this header to use a proper guard name.
> 
>>
>>> +#define __XEN_SUSPEND_H__
>>> +
>>> +#if __has_include()
>>> +#include 
>>> +#else
>>> +static inline int arch_domain_resume(struct domain *d)
>>> +{
>>> +    return 0;
>>> +}
>>> +#endif
>>> +
>> Stray whiteline?
> 
> will drop
> 
>>
>>> +
>>> +#endif /* __XEN_SUSPEND_H__ */
>> Missing emacs block?
> 
> It is permitted but isn't necessary as far as know,
> but if it needed here per your opinion I'll add it
> just let me know
On Arm we usually require them and that's the overall preference I would say.

> 
>>
>> Did you run MISRA scan on this patch?
> 
> Yes, I ran it with:
> 
>   ./xen/scripts/xen-analysis.py \
>       --run-cppcheck --cppcheck-misra --cppcheck-html -- \
>       XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu-
> 
> The analysis did not report any new MISRA violations in the code
> touched by this patch.
That's only cppcheck scan which is rather poor in finding violations. ECLAIR
scan is done through Gitlab CI and this one is what we rely on for taking the
series in.

~Michal



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From: Mykola Kvach 
Date: Wed, 19 Nov 2025 13:32:43 +0200
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Subject: Re: [PATCH v14 1/4] xen/arm: Implement PSCI SYSTEM_SUSPEND call for guests
To: "Orzel, Michal" 
Cc: xen-devel@lists.xenproject.org, Mykola Kvach , 
	Stefano Stabellini , Julien Grall , 
	Bertrand Marquis , Volodymyr Babchuk , 
	Andrew Cooper , Anthony PERARD , 
	Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
Content-Type: text/plain; charset="UTF-8"
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On Wed, Nov 19, 2025 at 1:07=E2=80=AFPM Orzel, Michal  wrote:
>
>
>
> On 19/11/2025 12:00, Mykola Kvach wrote:
> > Hi Michal,
> >
> > Thanks for your review.
> >
> > On Wed, Nov 19, 2025 at 10:48=E2=80=AFAM Orzel, Michal  wrote:
> >>
> >>
> >>
> >> On 18/11/2025 16:37, Mykola Kvach wrote:
> >>> From: Mykola Kvach 
> >>>
> >>> Add support for the PSCI SYSTEM_SUSPEND function in the vPSCI interfa=
ce,
> >>> allowing guests to request suspend via the PSCI v1.0+ SYSTEM_SUSPEND =
call
> >>> (both 32-bit and 64-bit variants).
> >>>
> >>> Implementation details:
> >>> - Add SYSTEM_SUSPEND function IDs to PSCI definitions
> >>> - Trap and handle SYSTEM_SUSPEND in vPSCI
> >>> - Allow only non-hardware domains to invoke SYSTEM_SUSPEND; return
> >>>   PSCI_NOT_SUPPORTED for the hardware domain to avoid halting the sys=
tem
> >>>   in hwdom_shutdown() via domain_shutdown
> >>> - Require all secondary VCPUs of the calling domain to be offline bef=
ore
> >>>   suspend, as mandated by the PSCI specification
> >>>
> >>> The arch_domain_resume() function is an architecture-specific hook th=
at is
> >>> invoked during domain resume to perform any necessary setup or restor=
ation
> >>> steps required by the platform.
> >>>
> >>> The new vpsci_vcpu_up_prepare() helper is called on the resume path t=
o set up
> >>> the vCPU context (such as entry point, some system regs and context I=
D) before
> >>> resuming a suspended guest. This keeps ARM/vPSCI-specific logic out o=
f common
> >>> code and avoids intrusive changes to the generic resume flow.
> >>>
> >>> Usage:
> >>>
> >>> For Linux-based guests, suspend can be initiated with:
> >>>     echo mem > /sys/power/state
> >>> or via:
> >>>     systemctl suspend
> >>>
> >>> Resuming the guest is performed from control domain using:
> >>>       xl resume 
> >>>
> >>> Signed-off-by: Mykola Kvach 
> >>> ---
> >>> Changes in V14:
> >>> - move arch_domain_resume to a separate header
> >>> - avoid usage of typeof for context struct
> >>> - moved error printing from domain_resume to arch_domain_resume
> >>>   in order to simplify common parts of code
> >>> - minor changes after review
> >>> ---
> >>>  xen/arch/arm/domain.c                 |  41 +++++++++
> >>>  xen/arch/arm/include/asm/domain.h     |   2 +
> >>>  xen/arch/arm/include/asm/perfc_defn.h |   1 +
> >>>  xen/arch/arm/include/asm/psci.h       |   2 +
> >>>  xen/arch/arm/include/asm/suspend.h    |  24 ++++++
> >>>  xen/arch/arm/include/asm/vpsci.h      |   5 +-
> >>>  xen/arch/arm/vpsci.c                  | 116 +++++++++++++++++++++---=
--
> >>>  xen/common/domain.c                   |   5 ++
> >>>  xen/include/xen/suspend.h             |  15 ++++
> >>>  9 files changed, 189 insertions(+), 22 deletions(-)
> >>>  create mode 100644 xen/arch/arm/include/asm/suspend.h
> >>>  create mode 100644 xen/include/xen/suspend.h
> >>>
> >>> diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
> >>> index e36719bce4..3c0170480b 100644
> >>> --- a/xen/arch/arm/domain.c
> >>> +++ b/xen/arch/arm/domain.c
> >>> @@ -12,6 +12,8 @@
> >>>  #include 
> >>>  #include 
> >>>
> >>> +#include 
> >>> +
> >>>  #include 
> >>>  #include 
> >>>  #include 
> >>> @@ -24,10 +26,12 @@
> >>>  #include 
> >>>  #include 
> >>>  #include 
> >>> +#include 
> >>>  #include 
> >>>  #include 
> >>>  #include 
> >>>  #include 
> >>> +#include 
> >>>  #include 
> >>>
> >>>  #include "vpci.h"
> >>> @@ -885,6 +889,43 @@ void arch_domain_creation_finished(struct domain=
 *d)
> >>>      p2m_domain_creation_finished(d);
> >>>  }
> >>>
> >>> +int arch_domain_resume(struct domain *d)
> >>> +{
> >>> +    int rc;
> >>> +    struct resume_info *ctx =3D &d->arch.resume_ctx;
> >>> +
> >>> +    if ( !d->is_shutting_down || d->shutdown_code !=3D SHUTDOWN_susp=
end )
> >>> +    {
> >>> +        dprintk(XENLOG_WARNING,
> >>> +                "%pd: Invalid domain state for resume: is_shutting_d=
own=3D%d, shutdown_code=3D%d\n",
> >> These are bool and uint, so %u should be used.
> >
> > ack
> >
> >>
> >>> +                d, d->is_shutting_down, d->shutdown_code);
> >>> +        return -EINVAL;
> >>> +    }
> >>> +
> >>> +    /*
> >>> +     * It is still possible to call domain_shutdown() with a suspend=
 reason
> >>> +     * via some hypercalls, such as SCHEDOP_shutdown or SCHEDOP_remo=
te_shutdown.
> >>> +     * In these cases, the resume context will be empty.
> >>> +     * This is not expected to cause any issues, so we just warn abo=
ut the
> >>> +     * situation and return without error, allowing the existing log=
ic to
> >>> +     * proceed as expected.
> >>> +     */
> >>> +    if ( !ctx->wake_cpu )
> >>> +    {
> >>> +        dprintk(XENLOG_INFO, "%pd: Wake CPU pointer context was not =
provided\n",
> >>> +                d);
> >>> +        return 0;
> >>> +    }
> >>> +
> >>> +    rc =3D vpsci_vcpu_up_prepare(ctx->wake_cpu , ctx->ep, ctx->cid);
> >>> +    if ( rc )
> >>> +        printk("%pd: Failed to resume domain (ret %d)\n", d, rc);
> >>> +
> >>> +    memset(ctx, 0, sizeof(*ctx));
> >>> +
> >>> +    return rc;
> >>> +}
> >>> +
> >>>  static int is_guest_pv32_psr(uint32_t psr)
> >>>  {
> >>>      switch (psr & PSR_MODE_MASK)
> >>> diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include=
/asm/domain.h
> >>> index af3e168374..e637cb4de0 100644
> >>> --- a/xen/arch/arm/include/asm/domain.h
> >>> +++ b/xen/arch/arm/include/asm/domain.h
> >>> @@ -5,6 +5,7 @@
> >>>  #include 
> >>>  #include 
> >>>  #include 
> >>> +#include 
> >>>  #include 
> >>>  #include 
> >>>  #include 
> >>> @@ -126,6 +127,7 @@ struct arch_domain
> >>>      void *sci_data;
> >>>  #endif
> >>>
> >>> +    struct resume_info resume_ctx;
> >>>  }  __cacheline_aligned;
> >>>
> >>>  struct arch_vcpu
> >>> diff --git a/xen/arch/arm/include/asm/perfc_defn.h b/xen/arch/arm/inc=
lude/asm/perfc_defn.h
> >>> index effd25b69e..8dfcac7e3b 100644
> >>> --- a/xen/arch/arm/include/asm/perfc_defn.h
> >>> +++ b/xen/arch/arm/include/asm/perfc_defn.h
> >>> @@ -33,6 +33,7 @@ PERFCOUNTER(vpsci_system_reset,        "vpsci: syst=
em_reset")
> >>>  PERFCOUNTER(vpsci_cpu_suspend,         "vpsci: cpu_suspend")
> >>>  PERFCOUNTER(vpsci_cpu_affinity_info,   "vpsci: cpu_affinity_info")
> >>>  PERFCOUNTER(vpsci_features,            "vpsci: features")
> >>> +PERFCOUNTER(vpsci_system_suspend,      "vpsci: system_suspend")
> >>>
> >>>  PERFCOUNTER(vcpu_kick,                 "vcpu: notify other vcpu")
> >>>
> >>> diff --git a/xen/arch/arm/include/asm/psci.h b/xen/arch/arm/include/a=
sm/psci.h
> >>> index 4780972621..48a93e6b79 100644
> >>> --- a/xen/arch/arm/include/asm/psci.h
> >>> +++ b/xen/arch/arm/include/asm/psci.h
> >>> @@ -47,10 +47,12 @@ void call_psci_system_reset(void);
> >>>  #define PSCI_0_2_FN32_SYSTEM_OFF          PSCI_0_2_FN32(8)
> >>>  #define PSCI_0_2_FN32_SYSTEM_RESET        PSCI_0_2_FN32(9)
> >>>  #define PSCI_1_0_FN32_PSCI_FEATURES       PSCI_0_2_FN32(10)
> >>> +#define PSCI_1_0_FN32_SYSTEM_SUSPEND      PSCI_0_2_FN32(14)
> >>>
> >>>  #define PSCI_0_2_FN64_CPU_SUSPEND         PSCI_0_2_FN64(1)
> >>>  #define PSCI_0_2_FN64_CPU_ON              PSCI_0_2_FN64(3)
> >>>  #define PSCI_0_2_FN64_AFFINITY_INFO       PSCI_0_2_FN64(4)
> >>> +#define PSCI_1_0_FN64_SYSTEM_SUSPEND      PSCI_0_2_FN64(14)
> >>>
> >>>  /* PSCI v0.2 affinity level state returned by AFFINITY_INFO */
> >>>  #define PSCI_0_2_AFFINITY_LEVEL_ON      0
> >>> diff --git a/xen/arch/arm/include/asm/suspend.h b/xen/arch/arm/includ=
e/asm/suspend.h
> >>> new file mode 100644
> >>> index 0000000000..b991a94d5a
> >>> --- /dev/null
> >>> +++ b/xen/arch/arm/include/asm/suspend.h
> >>> @@ -0,0 +1,24 @@
> >>> +/* SPDX-License-Identifier: GPL-2.0-only */
> >>> +
> >>> +#ifndef __ARM_SUSPEND_H__
> >> There should be no double underscores in guards (see examples in CODIN=
G_STYLE)
> >
> > I had initially followed the style used by some of the existing headers
> > in this directory, which still use guards with double underscores.
> >
> > I'll remove underscores in the next series.
> >
> >>> +#define __ARM_SUSPEND_H__
> >>> +
> >>> +struct resume_info {
> >>> +    register_t ep;
> >>> +    register_t cid;
> >>> +    struct vcpu *wake_cpu;
> >>> +};
> >>> +
> >>> +int arch_domain_resume(struct domain *d);
> >> If possible, headers should be standalone, meaning you should include =
necessary
> >> headers or forward declare what's missing.
> >
> > Thanks for the comment.
> >
> > My initial intention was to avoid adding new dependencies from asm
> > headers to higher-level Xen headers, so I did not include e.g.
> >  directly here. In this header we only need pointers to
> > struct domain and struct vcpu, we never dereference them, so forward
> > declarations would be sufficient to make it standalone.
> >
> > I also noticed that some existing asm headers in this directory do
> > include higher-level Xen headers, so both patterns exist in the tree.
> >
> > If you prefer, I can either:
> >   - add forward declarations
> >
> >       struct domain;
> >       struct vcpu;
> >
> >     at the top of this header and keep the full includes in the .c
> >     files that actually dereference these types, or
> >
> >   - include the appropriate Xen header(s) directly in this header.
> >
> > Personally I slightly prefer the forward-declaration approach to keep
> > this header lightweight and avoid tightening the layering, but I am
> > happy to follow your preference.
> My preference is also to forward declare these structs.
>
> >
> >>
> >>> +
> >>> +#endif /* __ARM_SUSPEND_H__ */
> >>> +
> >>> + /*
> >>> +  * Local variables:
> >>> +  * mode: C
> >>> +  * c-file-style: "BSD"
> >>> +  * c-basic-offset: 4
> >>> +  * tab-width: 4
> >>> +  * indent-tabs-mode: nil
> >>> +  * End:
> >>> +  */
> >>> diff --git a/xen/arch/arm/include/asm/vpsci.h b/xen/arch/arm/include/=
asm/vpsci.h
> >>> index 0cca5e6830..d790ab3715 100644
> >>> --- a/xen/arch/arm/include/asm/vpsci.h
> >>> +++ b/xen/arch/arm/include/asm/vpsci.h
> >>> @@ -23,12 +23,15 @@
> >>>  #include 
> >>>
> >>>  /* Number of function implemented by virtual PSCI (only 0.2 or later=
) */
> >>> -#define VPSCI_NR_FUNCS  12
> >>> +#define VPSCI_NR_FUNCS  14
> >>>
> >>>  /* Functions handle PSCI calls from the guests */
> >>>  bool do_vpsci_0_1_call(struct cpu_user_regs *regs, uint32_t fid);
> >>>  bool do_vpsci_0_2_call(struct cpu_user_regs *regs, uint32_t fid);
> >>>
> >>> +int vpsci_vcpu_up_prepare(struct vcpu *v, register_t entry_point,
> >>> +                          register_t context_id);
> >>> +
> >>>  #endif /* __ASM_VPSCI_H__ */
> >>>
> >>>  /*
> >>> diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c
> >>> index 7ba9ccd94b..22c3a5f544 100644
> >>> --- a/xen/arch/arm/vpsci.c
> >>> +++ b/xen/arch/arm/vpsci.c
> >>> @@ -10,32 +10,16 @@
> >>>
> >>>  #include 
> >>>
> >>> -static int do_common_cpu_on(register_t target_cpu, register_t entry_=
point,
> >>> -                            register_t context_id)
> >>> +int vpsci_vcpu_up_prepare(struct vcpu *v, register_t entry_point,
> >>> +                   register_t context_id)
> >> NIT: incorrect parameter alignment
> >
> > ack
> >
> >>
> >>>  {
> >>> -    struct vcpu *v;
> >>> -    struct domain *d =3D current->domain;
> >>> -    struct vcpu_guest_context *ctxt;
> >>>      int rc;
> >>> +    struct domain *d =3D v->domain;
> >>>      bool is_thumb =3D entry_point & 1;
> >>> -    register_t vcpuid;
> >>> -
> >>> -    vcpuid =3D vaffinity_to_vcpuid(target_cpu);
> >>> -
> >>> -    if ( (v =3D domain_vcpu(d, vcpuid)) =3D=3D NULL )
> >>> -        return PSCI_INVALID_PARAMETERS;
> >>> -
> >>> -    /* THUMB set is not allowed with 64-bit domain */
> >>> -    if ( is_64bit_domain(d) && is_thumb )
> >>> -        return PSCI_INVALID_ADDRESS;
> >>> -
> >>> -    if ( !test_bit(_VPF_down, &v->pause_flags) )
> >>> -        return PSCI_ALREADY_ON;
> >>> +    struct vcpu_guest_context *ctxt;
> >>>
> >>>      if ( (ctxt =3D alloc_vcpu_guest_context()) =3D=3D NULL )
> >>> -        return PSCI_DENIED;
> >>> -
> >>> -    vgic_clear_pending_irqs(v);
> >>> +        return -ENOMEM;
> >>>
> >>>      memset(ctxt, 0, sizeof(*ctxt));
> >>>      ctxt->user_regs.pc64 =3D (u64) entry_point;
> >>> @@ -76,8 +60,37 @@ static int do_common_cpu_on(register_t target_cpu,=
 register_t entry_point,
> >>>      free_vcpu_guest_context(ctxt);
> >>>
> >>>      if ( rc < 0 )
> >>> +        return rc;
> >>> +
> >>> +    return 0;
> >>> +}
> >>> +
> >>> +static int do_common_cpu_on(register_t target_cpu, register_t entry_=
point,
> >>> +                            register_t context_id)
> >>> +{
> >>> +    struct vcpu *v;
> >>> +    struct domain *d =3D current->domain;
> >>> +    int rc;
> >>> +    bool is_thumb =3D entry_point & 1;
> >>> +    register_t vcpuid;
> >>> +
> >>> +    vcpuid =3D vaffinity_to_vcpuid(target_cpu);
> >>> +
> >>> +    if ( (v =3D domain_vcpu(d, vcpuid)) =3D=3D NULL )
> >>> +        return PSCI_INVALID_PARAMETERS;
> >>> +
> >>> +    /* THUMB set is not allowed with 64-bit domain */
> >>> +    if ( is_64bit_domain(d) && is_thumb )
> >>> +        return PSCI_INVALID_ADDRESS;
> >>> +
> >>> +    if ( !test_bit(_VPF_down, &v->pause_flags) )
> >>> +        return PSCI_ALREADY_ON;
> >>> +
> >>> +    rc =3D vpsci_vcpu_up_prepare(v, entry_point, context_id);
> >>> +    if ( rc )
> >>>          return PSCI_DENIED;
> >>>
> >>> +    vgic_clear_pending_irqs(v);
> >>>      vcpu_wake(v);
> >>>
> >>>      return PSCI_SUCCESS;
> >>> @@ -197,6 +210,48 @@ static void do_psci_0_2_system_reset(void)
> >>>      domain_shutdown(d,SHUTDOWN_reboot);
> >>>  }
> >>>
> >>> +static int32_t do_psci_1_0_system_suspend(register_t epoint, registe=
r_t cid)
> >>> +{
> >>> +    int32_t rc;
> >>> +    struct vcpu *v;
> >>> +    struct domain *d =3D current->domain;
> >>> +    bool is_thumb =3D epoint & 1;
> >>> +
> >>> +    /* THUMB set is not allowed with 64-bit domain */
> >>> +    if ( is_64bit_domain(d) && is_thumb )
> >>> +        return PSCI_INVALID_ADDRESS;
> >>> +
> >>> +    /* SYSTEM_SUSPEND is not supported for the hardware domain yet *=
/
> >>> +    if ( is_hardware_domain(d) )
> >>> +        return PSCI_NOT_SUPPORTED;
> >>> +
> >>> +    /* Ensure that all CPUs other than the calling one are offline *=
/
> >>> +    domain_lock(d);
> >>> +    for_each_vcpu ( d, v )
> >>> +    {
> >>> +        if ( v !=3D current && is_vcpu_online(v) )
> >>> +        {
> >>> +            domain_unlock(d);
> >>> +            return PSCI_DENIED;
> >>> +        }
> >>> +    }
> >>> +    domain_unlock(d);
> >>> +
> >>> +    rc =3D domain_shutdown(d, SHUTDOWN_suspend);
> >>> +    if ( rc )
> >>> +        return PSCI_DENIED;
> >>> +
> >>> +    d->arch.resume_ctx.ep =3D epoint;
> >>> +    d->arch.resume_ctx.cid =3D cid;
> >>> +    d->arch.resume_ctx.wake_cpu =3D current;
> >>> +
> >>> +    gprintk(XENLOG_DEBUG,
> >>> +            "SYSTEM_SUSPEND requested, epoint=3D0x%"PRIregister", ci=
d=3D0x%"PRIregister"\n",
> >> NIT: %# is preffered over 0x%.
> >
> > ack
> >
> >>
> >>> +            epoint, cid);
> >>> +
> >>> +    return rc;
> >>> +}
> >>> +
> >>>  static int32_t do_psci_1_0_features(uint32_t psci_func_id)
> >>>  {
> >>>      /* /!\ Ordered by function ID and not name */
> >>> @@ -214,6 +269,8 @@ static int32_t do_psci_1_0_features(uint32_t psci=
_func_id)
> >>>      case PSCI_0_2_FN32_SYSTEM_OFF:
> >>>      case PSCI_0_2_FN32_SYSTEM_RESET:
> >>>      case PSCI_1_0_FN32_PSCI_FEATURES:
> >>> +    case PSCI_1_0_FN32_SYSTEM_SUSPEND:
> >>> +    case PSCI_1_0_FN64_SYSTEM_SUSPEND:
> >>>      case ARM_SMCCC_VERSION_FID:
> >>>          return 0;
> >>>      default:
> >>> @@ -344,6 +401,23 @@ bool do_vpsci_0_2_call(struct cpu_user_regs *reg=
s, uint32_t fid)
> >>>          return true;
> >>>      }
> >>>
> >>> +    case PSCI_1_0_FN32_SYSTEM_SUSPEND:
> >>> +    case PSCI_1_0_FN64_SYSTEM_SUSPEND:
> >>> +    {
> >>> +        register_t epoint =3D PSCI_ARG(regs, 1);
> >>> +        register_t cid =3D PSCI_ARG(regs, 2);
> >>> +
> >>> +        if ( fid =3D=3D PSCI_1_0_FN32_SYSTEM_SUSPEND )
> >>> +        {
> >>> +            epoint &=3D GENMASK(31, 0);
> >>> +            cid &=3D GENMASK(31, 0);
> >>> +        }
> >>> +
> >>> +        perfc_incr(vpsci_system_suspend);
> >>> +        PSCI_SET_RESULT(regs, do_psci_1_0_system_suspend(epoint, cid=
));
> >>> +        return true;
> >>> +    }
> >>> +
> >>>      default:
> >>>          return false;
> >>>      }
> >>> diff --git a/xen/common/domain.c b/xen/common/domain.c
> >>> index 775c339285..6410d32970 100644
> >>> --- a/xen/common/domain.c
> >>> +++ b/xen/common/domain.c
> >>> @@ -26,6 +26,7 @@
> >>>  #include 
> >>>  #include 
> >>>  #include 
> >>> +#include 
> >>>  #include 
> >>>  #include 
> >>>  #include 
> >>> @@ -1363,6 +1364,9 @@ void domain_resume(struct domain *d)
> >>>
> >>>      spin_lock(&d->shutdown_lock);
> >>>
> >>> +    if ( arch_domain_resume(d) )
> >>> +        goto fail;
> >>> +
> >>>      d->is_shutting_down =3D d->is_shut_down =3D 0;
> >>>      d->shutdown_code =3D SHUTDOWN_CODE_INVALID;
> >>>
> >>> @@ -1373,6 +1377,7 @@ void domain_resume(struct domain *d)
> >>>          v->paused_for_shutdown =3D 0;
> >>>      }
> >>>
> >>> + fail:
> >>>      spin_unlock(&d->shutdown_lock);
> >>>
> >>>      domain_unpause(d);
> >>> diff --git a/xen/include/xen/suspend.h b/xen/include/xen/suspend.h
> >>> new file mode 100644
> >>> index 0000000000..53f75fd6ad
> >>> --- /dev/null
> >>> +++ b/xen/include/xen/suspend.h
> >>> @@ -0,0 +1,15 @@
> >>> +/* SPDX-License-Identifier: GPL-2.0-only */
> >>> +#ifndef __XEN_SUSPEND_H__
> >> There should be no double underscores in guards
> >
> > I initially followed the style used by the existing headers in this
> > directory, which still have include guards with double underscores.
> >
> > You are right that this does not match CODING_STYLE examples.
> > I will update this header to use a proper guard name.
> >
> >>
> >>> +#define __XEN_SUSPEND_H__
> >>> +
> >>> +#if __has_include()
> >>> +#include 
> >>> +#else
> >>> +static inline int arch_domain_resume(struct domain *d)
> >>> +{
> >>> +    return 0;
> >>> +}
> >>> +#endif
> >>> +
> >> Stray whiteline?
> >
> > will drop
> >
> >>
> >>> +
> >>> +#endif /* __XEN_SUSPEND_H__ */
> >> Missing emacs block?
> >
> > It is permitted but isn't necessary as far as know,
> > but if it needed here per your opinion I'll add it
> > just let me know
> On Arm we usually require them and that's the overall preference I would =
say.
>
> >
> >>
> >> Did you run MISRA scan on this patch?
> >
> > Yes, I ran it with:
> >
> >   ./xen/scripts/xen-analysis.py \
> >       --run-cppcheck --cppcheck-misra --cppcheck-html -- \
> >       XEN_TARGET_ARCH=3Darm64 CROSS_COMPILE=3Daarch64-linux-gnu-
> >
> > The analysis did not report any new MISRA violations in the code
> > touched by this patch.
> That's only cppcheck scan which is rather poor in finding violations. ECL=
AIR
> scan is done through Gitlab CI and this one is what we rely on for taking=
 the
> series in.

Thanks for the clarification.

Is it possible to run the ECLAIR MISRA scan locally, or is it only
available via the project Gitlab CI instance? If there is a way to run
it on a developer machine, I would be happy to set it up and check this
series with the same configuration.

>
> ~Michal
>

Best regards,
Mykola


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Date: Wed, 19 Nov 2025 12:43:25 +0100
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Subject: Re: [PATCH v14 1/4] xen/arm: Implement PSCI SYSTEM_SUSPEND call for
 guests
To: Mykola Kvach 
CC: , Mykola Kvach ,
	Stefano Stabellini , Julien Grall ,
	Bertrand Marquis , Volodymyr Babchuk
	, Andrew Cooper ,
	Anthony PERARD , Jan Beulich ,
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References: 
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On 19/11/2025 12:32, Mykola Kvach wrote:
> On Wed, Nov 19, 2025 at 1:07 PM Orzel, Michal  wrote:
>>
>>
>>
>> On 19/11/2025 12:00, Mykola Kvach wrote:
>>> Hi Michal,
>>>
>>> Thanks for your review.
>>>
>>> On Wed, Nov 19, 2025 at 10:48 AM Orzel, Michal  wrote:
>>>>
>>>>
>>>>
>>>> On 18/11/2025 16:37, Mykola Kvach wrote:
>>>>> From: Mykola Kvach 
>>>>>
>>>>> Add support for the PSCI SYSTEM_SUSPEND function in the vPSCI interface,
>>>>> allowing guests to request suspend via the PSCI v1.0+ SYSTEM_SUSPEND call
>>>>> (both 32-bit and 64-bit variants).
>>>>>
>>>>> Implementation details:
>>>>> - Add SYSTEM_SUSPEND function IDs to PSCI definitions
>>>>> - Trap and handle SYSTEM_SUSPEND in vPSCI
>>>>> - Allow only non-hardware domains to invoke SYSTEM_SUSPEND; return
>>>>>   PSCI_NOT_SUPPORTED for the hardware domain to avoid halting the system
>>>>>   in hwdom_shutdown() via domain_shutdown
>>>>> - Require all secondary VCPUs of the calling domain to be offline before
>>>>>   suspend, as mandated by the PSCI specification
>>>>>
>>>>> The arch_domain_resume() function is an architecture-specific hook that is
>>>>> invoked during domain resume to perform any necessary setup or restoration
>>>>> steps required by the platform.
>>>>>
>>>>> The new vpsci_vcpu_up_prepare() helper is called on the resume path to set up
>>>>> the vCPU context (such as entry point, some system regs and context ID) before
>>>>> resuming a suspended guest. This keeps ARM/vPSCI-specific logic out of common
>>>>> code and avoids intrusive changes to the generic resume flow.
>>>>>
>>>>> Usage:
>>>>>
>>>>> For Linux-based guests, suspend can be initiated with:
>>>>>     echo mem > /sys/power/state
>>>>> or via:
>>>>>     systemctl suspend
>>>>>
>>>>> Resuming the guest is performed from control domain using:
>>>>>       xl resume 
>>>>>
>>>>> Signed-off-by: Mykola Kvach 
>>>>> ---
>>>>> Changes in V14:
>>>>> - move arch_domain_resume to a separate header
>>>>> - avoid usage of typeof for context struct
>>>>> - moved error printing from domain_resume to arch_domain_resume
>>>>>   in order to simplify common parts of code
>>>>> - minor changes after review
>>>>> ---
>>>>>  xen/arch/arm/domain.c                 |  41 +++++++++
>>>>>  xen/arch/arm/include/asm/domain.h     |   2 +
>>>>>  xen/arch/arm/include/asm/perfc_defn.h |   1 +
>>>>>  xen/arch/arm/include/asm/psci.h       |   2 +
>>>>>  xen/arch/arm/include/asm/suspend.h    |  24 ++++++
>>>>>  xen/arch/arm/include/asm/vpsci.h      |   5 +-
>>>>>  xen/arch/arm/vpsci.c                  | 116 +++++++++++++++++++++-----
>>>>>  xen/common/domain.c                   |   5 ++
>>>>>  xen/include/xen/suspend.h             |  15 ++++
>>>>>  9 files changed, 189 insertions(+), 22 deletions(-)
>>>>>  create mode 100644 xen/arch/arm/include/asm/suspend.h
>>>>>  create mode 100644 xen/include/xen/suspend.h
>>>>>
>>>>> diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
>>>>> index e36719bce4..3c0170480b 100644
>>>>> --- a/xen/arch/arm/domain.c
>>>>> +++ b/xen/arch/arm/domain.c
>>>>> @@ -12,6 +12,8 @@
>>>>>  #include 
>>>>>  #include 
>>>>>
>>>>> +#include 
>>>>> +
>>>>>  #include 
>>>>>  #include 
>>>>>  #include 
>>>>> @@ -24,10 +26,12 @@
>>>>>  #include 
>>>>>  #include 
>>>>>  #include 
>>>>> +#include 
>>>>>  #include 
>>>>>  #include 
>>>>>  #include 
>>>>>  #include 
>>>>> +#include 
>>>>>  #include 
>>>>>
>>>>>  #include "vpci.h"
>>>>> @@ -885,6 +889,43 @@ void arch_domain_creation_finished(struct domain *d)
>>>>>      p2m_domain_creation_finished(d);
>>>>>  }
>>>>>
>>>>> +int arch_domain_resume(struct domain *d)
>>>>> +{
>>>>> +    int rc;
>>>>> +    struct resume_info *ctx = &d->arch.resume_ctx;
>>>>> +
>>>>> +    if ( !d->is_shutting_down || d->shutdown_code != SHUTDOWN_suspend )
>>>>> +    {
>>>>> +        dprintk(XENLOG_WARNING,
>>>>> +                "%pd: Invalid domain state for resume: is_shutting_down=%d, shutdown_code=%d\n",
>>>> These are bool and uint, so %u should be used.
>>>
>>> ack
>>>
>>>>
>>>>> +                d, d->is_shutting_down, d->shutdown_code);
>>>>> +        return -EINVAL;
>>>>> +    }
>>>>> +
>>>>> +    /*
>>>>> +     * It is still possible to call domain_shutdown() with a suspend reason
>>>>> +     * via some hypercalls, such as SCHEDOP_shutdown or SCHEDOP_remote_shutdown.
>>>>> +     * In these cases, the resume context will be empty.
>>>>> +     * This is not expected to cause any issues, so we just warn about the
>>>>> +     * situation and return without error, allowing the existing logic to
>>>>> +     * proceed as expected.
>>>>> +     */
>>>>> +    if ( !ctx->wake_cpu )
>>>>> +    {
>>>>> +        dprintk(XENLOG_INFO, "%pd: Wake CPU pointer context was not provided\n",
>>>>> +                d);
>>>>> +        return 0;
>>>>> +    }
>>>>> +
>>>>> +    rc = vpsci_vcpu_up_prepare(ctx->wake_cpu , ctx->ep, ctx->cid);
>>>>> +    if ( rc )
>>>>> +        printk("%pd: Failed to resume domain (ret %d)\n", d, rc);
>>>>> +
>>>>> +    memset(ctx, 0, sizeof(*ctx));
>>>>> +
>>>>> +    return rc;
>>>>> +}
>>>>> +
>>>>>  static int is_guest_pv32_psr(uint32_t psr)
>>>>>  {
>>>>>      switch (psr & PSR_MODE_MASK)
>>>>> diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h
>>>>> index af3e168374..e637cb4de0 100644
>>>>> --- a/xen/arch/arm/include/asm/domain.h
>>>>> +++ b/xen/arch/arm/include/asm/domain.h
>>>>> @@ -5,6 +5,7 @@
>>>>>  #include 
>>>>>  #include 
>>>>>  #include 
>>>>> +#include 
>>>>>  #include 
>>>>>  #include 
>>>>>  #include 
>>>>> @@ -126,6 +127,7 @@ struct arch_domain
>>>>>      void *sci_data;
>>>>>  #endif
>>>>>
>>>>> +    struct resume_info resume_ctx;
>>>>>  }  __cacheline_aligned;
>>>>>
>>>>>  struct arch_vcpu
>>>>> diff --git a/xen/arch/arm/include/asm/perfc_defn.h b/xen/arch/arm/include/asm/perfc_defn.h
>>>>> index effd25b69e..8dfcac7e3b 100644
>>>>> --- a/xen/arch/arm/include/asm/perfc_defn.h
>>>>> +++ b/xen/arch/arm/include/asm/perfc_defn.h
>>>>> @@ -33,6 +33,7 @@ PERFCOUNTER(vpsci_system_reset,        "vpsci: system_reset")
>>>>>  PERFCOUNTER(vpsci_cpu_suspend,         "vpsci: cpu_suspend")
>>>>>  PERFCOUNTER(vpsci_cpu_affinity_info,   "vpsci: cpu_affinity_info")
>>>>>  PERFCOUNTER(vpsci_features,            "vpsci: features")
>>>>> +PERFCOUNTER(vpsci_system_suspend,      "vpsci: system_suspend")
>>>>>
>>>>>  PERFCOUNTER(vcpu_kick,                 "vcpu: notify other vcpu")
>>>>>
>>>>> diff --git a/xen/arch/arm/include/asm/psci.h b/xen/arch/arm/include/asm/psci.h
>>>>> index 4780972621..48a93e6b79 100644
>>>>> --- a/xen/arch/arm/include/asm/psci.h
>>>>> +++ b/xen/arch/arm/include/asm/psci.h
>>>>> @@ -47,10 +47,12 @@ void call_psci_system_reset(void);
>>>>>  #define PSCI_0_2_FN32_SYSTEM_OFF          PSCI_0_2_FN32(8)
>>>>>  #define PSCI_0_2_FN32_SYSTEM_RESET        PSCI_0_2_FN32(9)
>>>>>  #define PSCI_1_0_FN32_PSCI_FEATURES       PSCI_0_2_FN32(10)
>>>>> +#define PSCI_1_0_FN32_SYSTEM_SUSPEND      PSCI_0_2_FN32(14)
>>>>>
>>>>>  #define PSCI_0_2_FN64_CPU_SUSPEND         PSCI_0_2_FN64(1)
>>>>>  #define PSCI_0_2_FN64_CPU_ON              PSCI_0_2_FN64(3)
>>>>>  #define PSCI_0_2_FN64_AFFINITY_INFO       PSCI_0_2_FN64(4)
>>>>> +#define PSCI_1_0_FN64_SYSTEM_SUSPEND      PSCI_0_2_FN64(14)
>>>>>
>>>>>  /* PSCI v0.2 affinity level state returned by AFFINITY_INFO */
>>>>>  #define PSCI_0_2_AFFINITY_LEVEL_ON      0
>>>>> diff --git a/xen/arch/arm/include/asm/suspend.h b/xen/arch/arm/include/asm/suspend.h
>>>>> new file mode 100644
>>>>> index 0000000000..b991a94d5a
>>>>> --- /dev/null
>>>>> +++ b/xen/arch/arm/include/asm/suspend.h
>>>>> @@ -0,0 +1,24 @@
>>>>> +/* SPDX-License-Identifier: GPL-2.0-only */
>>>>> +
>>>>> +#ifndef __ARM_SUSPEND_H__
>>>> There should be no double underscores in guards (see examples in CODING_STYLE)
>>>
>>> I had initially followed the style used by some of the existing headers
>>> in this directory, which still use guards with double underscores.
>>>
>>> I'll remove underscores in the next series.
>>>
>>>>> +#define __ARM_SUSPEND_H__
>>>>> +
>>>>> +struct resume_info {
>>>>> +    register_t ep;
>>>>> +    register_t cid;
>>>>> +    struct vcpu *wake_cpu;
>>>>> +};
>>>>> +
>>>>> +int arch_domain_resume(struct domain *d);
>>>> If possible, headers should be standalone, meaning you should include necessary
>>>> headers or forward declare what's missing.
>>>
>>> Thanks for the comment.
>>>
>>> My initial intention was to avoid adding new dependencies from asm
>>> headers to higher-level Xen headers, so I did not include e.g.
>>>  directly here. In this header we only need pointers to
>>> struct domain and struct vcpu, we never dereference them, so forward
>>> declarations would be sufficient to make it standalone.
>>>
>>> I also noticed that some existing asm headers in this directory do
>>> include higher-level Xen headers, so both patterns exist in the tree.
>>>
>>> If you prefer, I can either:
>>>   - add forward declarations
>>>
>>>       struct domain;
>>>       struct vcpu;
>>>
>>>     at the top of this header and keep the full includes in the .c
>>>     files that actually dereference these types, or
>>>
>>>   - include the appropriate Xen header(s) directly in this header.
>>>
>>> Personally I slightly prefer the forward-declaration approach to keep
>>> this header lightweight and avoid tightening the layering, but I am
>>> happy to follow your preference.
>> My preference is also to forward declare these structs.
>>
>>>
>>>>
>>>>> +
>>>>> +#endif /* __ARM_SUSPEND_H__ */
>>>>> +
>>>>> + /*
>>>>> +  * Local variables:
>>>>> +  * mode: C
>>>>> +  * c-file-style: "BSD"
>>>>> +  * c-basic-offset: 4
>>>>> +  * tab-width: 4
>>>>> +  * indent-tabs-mode: nil
>>>>> +  * End:
>>>>> +  */
>>>>> diff --git a/xen/arch/arm/include/asm/vpsci.h b/xen/arch/arm/include/asm/vpsci.h
>>>>> index 0cca5e6830..d790ab3715 100644
>>>>> --- a/xen/arch/arm/include/asm/vpsci.h
>>>>> +++ b/xen/arch/arm/include/asm/vpsci.h
>>>>> @@ -23,12 +23,15 @@
>>>>>  #include 
>>>>>
>>>>>  /* Number of function implemented by virtual PSCI (only 0.2 or later) */
>>>>> -#define VPSCI_NR_FUNCS  12
>>>>> +#define VPSCI_NR_FUNCS  14
>>>>>
>>>>>  /* Functions handle PSCI calls from the guests */
>>>>>  bool do_vpsci_0_1_call(struct cpu_user_regs *regs, uint32_t fid);
>>>>>  bool do_vpsci_0_2_call(struct cpu_user_regs *regs, uint32_t fid);
>>>>>
>>>>> +int vpsci_vcpu_up_prepare(struct vcpu *v, register_t entry_point,
>>>>> +                          register_t context_id);
>>>>> +
>>>>>  #endif /* __ASM_VPSCI_H__ */
>>>>>
>>>>>  /*
>>>>> diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c
>>>>> index 7ba9ccd94b..22c3a5f544 100644
>>>>> --- a/xen/arch/arm/vpsci.c
>>>>> +++ b/xen/arch/arm/vpsci.c
>>>>> @@ -10,32 +10,16 @@
>>>>>
>>>>>  #include 
>>>>>
>>>>> -static int do_common_cpu_on(register_t target_cpu, register_t entry_point,
>>>>> -                            register_t context_id)
>>>>> +int vpsci_vcpu_up_prepare(struct vcpu *v, register_t entry_point,
>>>>> +                   register_t context_id)
>>>> NIT: incorrect parameter alignment
>>>
>>> ack
>>>
>>>>
>>>>>  {
>>>>> -    struct vcpu *v;
>>>>> -    struct domain *d = current->domain;
>>>>> -    struct vcpu_guest_context *ctxt;
>>>>>      int rc;
>>>>> +    struct domain *d = v->domain;
>>>>>      bool is_thumb = entry_point & 1;
>>>>> -    register_t vcpuid;
>>>>> -
>>>>> -    vcpuid = vaffinity_to_vcpuid(target_cpu);
>>>>> -
>>>>> -    if ( (v = domain_vcpu(d, vcpuid)) == NULL )
>>>>> -        return PSCI_INVALID_PARAMETERS;
>>>>> -
>>>>> -    /* THUMB set is not allowed with 64-bit domain */
>>>>> -    if ( is_64bit_domain(d) && is_thumb )
>>>>> -        return PSCI_INVALID_ADDRESS;
>>>>> -
>>>>> -    if ( !test_bit(_VPF_down, &v->pause_flags) )
>>>>> -        return PSCI_ALREADY_ON;
>>>>> +    struct vcpu_guest_context *ctxt;
>>>>>
>>>>>      if ( (ctxt = alloc_vcpu_guest_context()) == NULL )
>>>>> -        return PSCI_DENIED;
>>>>> -
>>>>> -    vgic_clear_pending_irqs(v);
>>>>> +        return -ENOMEM;
>>>>>
>>>>>      memset(ctxt, 0, sizeof(*ctxt));
>>>>>      ctxt->user_regs.pc64 = (u64) entry_point;
>>>>> @@ -76,8 +60,37 @@ static int do_common_cpu_on(register_t target_cpu, register_t entry_point,
>>>>>      free_vcpu_guest_context(ctxt);
>>>>>
>>>>>      if ( rc < 0 )
>>>>> +        return rc;
>>>>> +
>>>>> +    return 0;
>>>>> +}
>>>>> +
>>>>> +static int do_common_cpu_on(register_t target_cpu, register_t entry_point,
>>>>> +                            register_t context_id)
>>>>> +{
>>>>> +    struct vcpu *v;
>>>>> +    struct domain *d = current->domain;
>>>>> +    int rc;
>>>>> +    bool is_thumb = entry_point & 1;
>>>>> +    register_t vcpuid;
>>>>> +
>>>>> +    vcpuid = vaffinity_to_vcpuid(target_cpu);
>>>>> +
>>>>> +    if ( (v = domain_vcpu(d, vcpuid)) == NULL )
>>>>> +        return PSCI_INVALID_PARAMETERS;
>>>>> +
>>>>> +    /* THUMB set is not allowed with 64-bit domain */
>>>>> +    if ( is_64bit_domain(d) && is_thumb )
>>>>> +        return PSCI_INVALID_ADDRESS;
>>>>> +
>>>>> +    if ( !test_bit(_VPF_down, &v->pause_flags) )
>>>>> +        return PSCI_ALREADY_ON;
>>>>> +
>>>>> +    rc = vpsci_vcpu_up_prepare(v, entry_point, context_id);
>>>>> +    if ( rc )
>>>>>          return PSCI_DENIED;
>>>>>
>>>>> +    vgic_clear_pending_irqs(v);
>>>>>      vcpu_wake(v);
>>>>>
>>>>>      return PSCI_SUCCESS;
>>>>> @@ -197,6 +210,48 @@ static void do_psci_0_2_system_reset(void)
>>>>>      domain_shutdown(d,SHUTDOWN_reboot);
>>>>>  }
>>>>>
>>>>> +static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid)
>>>>> +{
>>>>> +    int32_t rc;
>>>>> +    struct vcpu *v;
>>>>> +    struct domain *d = current->domain;
>>>>> +    bool is_thumb = epoint & 1;
>>>>> +
>>>>> +    /* THUMB set is not allowed with 64-bit domain */
>>>>> +    if ( is_64bit_domain(d) && is_thumb )
>>>>> +        return PSCI_INVALID_ADDRESS;
>>>>> +
>>>>> +    /* SYSTEM_SUSPEND is not supported for the hardware domain yet */
>>>>> +    if ( is_hardware_domain(d) )
>>>>> +        return PSCI_NOT_SUPPORTED;
>>>>> +
>>>>> +    /* Ensure that all CPUs other than the calling one are offline */
>>>>> +    domain_lock(d);
>>>>> +    for_each_vcpu ( d, v )
>>>>> +    {
>>>>> +        if ( v != current && is_vcpu_online(v) )
>>>>> +        {
>>>>> +            domain_unlock(d);
>>>>> +            return PSCI_DENIED;
>>>>> +        }
>>>>> +    }
>>>>> +    domain_unlock(d);
>>>>> +
>>>>> +    rc = domain_shutdown(d, SHUTDOWN_suspend);
>>>>> +    if ( rc )
>>>>> +        return PSCI_DENIED;
>>>>> +
>>>>> +    d->arch.resume_ctx.ep = epoint;
>>>>> +    d->arch.resume_ctx.cid = cid;
>>>>> +    d->arch.resume_ctx.wake_cpu = current;
>>>>> +
>>>>> +    gprintk(XENLOG_DEBUG,
>>>>> +            "SYSTEM_SUSPEND requested, epoint=0x%"PRIregister", cid=0x%"PRIregister"\n",
>>>> NIT: %# is preffered over 0x%.
>>>
>>> ack
>>>
>>>>
>>>>> +            epoint, cid);
>>>>> +
>>>>> +    return rc;
>>>>> +}
>>>>> +
>>>>>  static int32_t do_psci_1_0_features(uint32_t psci_func_id)
>>>>>  {
>>>>>      /* /!\ Ordered by function ID and not name */
>>>>> @@ -214,6 +269,8 @@ static int32_t do_psci_1_0_features(uint32_t psci_func_id)
>>>>>      case PSCI_0_2_FN32_SYSTEM_OFF:
>>>>>      case PSCI_0_2_FN32_SYSTEM_RESET:
>>>>>      case PSCI_1_0_FN32_PSCI_FEATURES:
>>>>> +    case PSCI_1_0_FN32_SYSTEM_SUSPEND:
>>>>> +    case PSCI_1_0_FN64_SYSTEM_SUSPEND:
>>>>>      case ARM_SMCCC_VERSION_FID:
>>>>>          return 0;
>>>>>      default:
>>>>> @@ -344,6 +401,23 @@ bool do_vpsci_0_2_call(struct cpu_user_regs *regs, uint32_t fid)
>>>>>          return true;
>>>>>      }
>>>>>
>>>>> +    case PSCI_1_0_FN32_SYSTEM_SUSPEND:
>>>>> +    case PSCI_1_0_FN64_SYSTEM_SUSPEND:
>>>>> +    {
>>>>> +        register_t epoint = PSCI_ARG(regs, 1);
>>>>> +        register_t cid = PSCI_ARG(regs, 2);
>>>>> +
>>>>> +        if ( fid == PSCI_1_0_FN32_SYSTEM_SUSPEND )
>>>>> +        {
>>>>> +            epoint &= GENMASK(31, 0);
>>>>> +            cid &= GENMASK(31, 0);
>>>>> +        }
>>>>> +
>>>>> +        perfc_incr(vpsci_system_suspend);
>>>>> +        PSCI_SET_RESULT(regs, do_psci_1_0_system_suspend(epoint, cid));
>>>>> +        return true;
>>>>> +    }
>>>>> +
>>>>>      default:
>>>>>          return false;
>>>>>      }
>>>>> diff --git a/xen/common/domain.c b/xen/common/domain.c
>>>>> index 775c339285..6410d32970 100644
>>>>> --- a/xen/common/domain.c
>>>>> +++ b/xen/common/domain.c
>>>>> @@ -26,6 +26,7 @@
>>>>>  #include 
>>>>>  #include 
>>>>>  #include 
>>>>> +#include 
>>>>>  #include 
>>>>>  #include 
>>>>>  #include 
>>>>> @@ -1363,6 +1364,9 @@ void domain_resume(struct domain *d)
>>>>>
>>>>>      spin_lock(&d->shutdown_lock);
>>>>>
>>>>> +    if ( arch_domain_resume(d) )
>>>>> +        goto fail;
>>>>> +
>>>>>      d->is_shutting_down = d->is_shut_down = 0;
>>>>>      d->shutdown_code = SHUTDOWN_CODE_INVALID;
>>>>>
>>>>> @@ -1373,6 +1377,7 @@ void domain_resume(struct domain *d)
>>>>>          v->paused_for_shutdown = 0;
>>>>>      }
>>>>>
>>>>> + fail:
>>>>>      spin_unlock(&d->shutdown_lock);
>>>>>
>>>>>      domain_unpause(d);
>>>>> diff --git a/xen/include/xen/suspend.h b/xen/include/xen/suspend.h
>>>>> new file mode 100644
>>>>> index 0000000000..53f75fd6ad
>>>>> --- /dev/null
>>>>> +++ b/xen/include/xen/suspend.h
>>>>> @@ -0,0 +1,15 @@
>>>>> +/* SPDX-License-Identifier: GPL-2.0-only */
>>>>> +#ifndef __XEN_SUSPEND_H__
>>>> There should be no double underscores in guards
>>>
>>> I initially followed the style used by the existing headers in this
>>> directory, which still have include guards with double underscores.
>>>
>>> You are right that this does not match CODING_STYLE examples.
>>> I will update this header to use a proper guard name.
>>>
>>>>
>>>>> +#define __XEN_SUSPEND_H__
>>>>> +
>>>>> +#if __has_include()
>>>>> +#include 
>>>>> +#else
>>>>> +static inline int arch_domain_resume(struct domain *d)
>>>>> +{
>>>>> +    return 0;
>>>>> +}
>>>>> +#endif
>>>>> +
>>>> Stray whiteline?
>>>
>>> will drop
>>>
>>>>
>>>>> +
>>>>> +#endif /* __XEN_SUSPEND_H__ */
>>>> Missing emacs block?
>>>
>>> It is permitted but isn't necessary as far as know,
>>> but if it needed here per your opinion I'll add it
>>> just let me know
>> On Arm we usually require them and that's the overall preference I would say.
>>
>>>
>>>>
>>>> Did you run MISRA scan on this patch?
>>>
>>> Yes, I ran it with:
>>>
>>>   ./xen/scripts/xen-analysis.py \
>>>       --run-cppcheck --cppcheck-misra --cppcheck-html -- \
>>>       XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu-
>>>
>>> The analysis did not report any new MISRA violations in the code
>>> touched by this patch.
>> That's only cppcheck scan which is rather poor in finding violations. ECLAIR
>> scan is done through Gitlab CI and this one is what we rely on for taking the
>> series in.
> 
> Thanks for the clarification.
> 
> Is it possible to run the ECLAIR MISRA scan locally, or is it only
> available via the project Gitlab CI instance? If there is a way to run
> it on a developer machine, I would be happy to set it up and check this
> series with the same configuration.
It's not possible to run it locally. But you can use your (if you don't have,
ask on Matrix) Xen fork under https://gitlab.com/xen-project/people to push a
branch and trigger the CI (ECLAIR scan needs to be manually executed from the
pipeline page).

~Michal



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Date: Wed, 19 Nov 2025 13:48:14 +0200
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Subject: Re: [XEN][PATCH 3/5] x86: hvm: factor out compat code under ifdefs
To: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= ,
 Jan Beulich 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Alejandro Vallejo ,
 Jason Andryuk ,
 "xen-devel@lists.xenproject.org" 
References: <20251111175413.3540690-1-grygorii_strashko@epam.com>
 <20251111175413.3540690-4-grygorii_strashko@epam.com>
 
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Hi Jürgen,

On 13.11.25 17:43, Jürgen Groß wrote:
> On 13.11.25 16:32, Grygorii Strashko wrote:
>> Hi Jürgen,
>>
>> On 13.11.25 16:46, Juergen Gross wrote:
>>> On 13.11.25 15:39, Jürgen Groß wrote:
>>>> On 13.11.25 14:23, Jan Beulich wrote:
>>>>> On 13.11.2025 14:18, Grygorii Strashko wrote:
>>>>>> On 13.11.25 14:30, Jan Beulich wrote:
>>>>>>> On 11.11.2025 18:54, Grygorii Strashko wrote:
>>>>>>>> --- a/xen/arch/x86/hvm/hypercall.c
>>>>>>>> +++ b/xen/arch/x86/hvm/hypercall.c
>>>>>>>> @@ -29,10 +29,12 @@ long hvm_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
>>>>>>>>            return -ENOSYS;
>>>>>>>>        }
>>>>>>>> -    if ( !vcpu_is_hcall_compat(current) )
>>>>>>>> -        rc = do_memory_op(cmd, arg);
>>>>>>>> -    else
>>>>>>>> +#ifdef CONFIG_COMPAT
>>>>>>>> +    if ( vcpu_is_hcall_compat(current) )
>>>>>>>>            rc = compat_memory_op(cmd, arg);
>>>>>>>> +    else
>>>>>>>> +#endif
>>>>>>>> +        rc = do_memory_op(cmd, arg);
>>>>>>>
>>>>>>> Why would this be needed when vcpu_is_hcall_compat() already honors CONFIG_COMPAT?
>>>>>>> (Same question then applies elsewhere, of course.)
>>>>>>
>>>>>> This I do not like by myself, but I was not able to find other options :(
>>>>>>
>>>>>> hypercall-defs.h is autogenerated and it's the only one place where functions
>>>>>> declarations like do_x_op() are appeared or disappeared.
>>>>>> So build is failing without ifdefs as compiler can't find compat_memory_op()
>>>>>> declaration.
>>>>>
>>>>> Oh, I see; I hadn't thought of that aspect. I wonder if we wouldn't better take
>>>>> care of that in the machinery there. Cc-ing Jürgen, who did introduce this
>>>>> originally. Maybe he has concrete arguments against us doing so.
>>>>
>>>> No arguments against it.
>>>>
>>>> You probably will need a new Prefix defined (e.g. compat_always) and set it via
>>>>
>>>> #define PREFIX_compat_always compat
>>>>
>>>> unconditionally. Then it should be possible to have
>>>>
>>>> Prefix: compat_always
>>>> memory_op(...)
>>>>
>>>> outside of #ifdefs and drop the memory_op() in the #ifdef CONFIG_COMPAT section.
>>>
>>> Oh, this might be wrong, as this will break the PV32 memory_op() hypercall.
>>>
>>> You need to keep the current memory_op() in the #ifdef CONFIG_COMPAT section
>>> and move the compat_always stuff into an #else part of the CONFIG_COMPAT.
>>>
>>>>
>>>> This should result in the compat_memory_op() prototype to be always available.
>>>> Having no related function should be no problem due to DCO in case CONFIG_COMPAT
>>>> isn't defined.
>>
>> Smth like this, right?
>>
>> diff --git a/xen/include/hypercall-defs.c b/xen/include/hypercall-defs.c
>> index 338d7afe3048..e85943320bd2 100644
>> --- a/xen/include/hypercall-defs.c
>> +++ b/xen/include/hypercall-defs.c
>> @@ -80,6 +80,8 @@ rettype: compat int
>>   #define PREFIX_compat
>>   #endif
>>
>> +#define PREFIX_compat_always compat
>> +
>>   #ifdef CONFIG_ARM
>>   #define PREFIX_dep dep
>>   #define PREFIX_do_arm do_arm
>> @@ -156,6 +158,9 @@ platform_op(compat_platform_op_t *u_xenpf_op)
>>   #ifdef CONFIG_KEXEC
>>   kexec_op(unsigned int op, void *uarg)
>>   #endif
>> +#else
>> +prefix: PREFIX_compat_always
> 
> This should be:
> 
> +prefix: compat_always

Unfortunately, ^ is not working it generates
long compat_always_memory_op(unsigned int cmd, XEN_GUEST_HANDLE_PARAM(void) arg);

My version works "prefix: PREFIX_compat_always"

-- 
Best regards,
-grygorii



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From: Mykola Kvach 
Date: Wed, 19 Nov 2025 13:51:04 +0200
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Subject: Re: [PATCH v14 1/4] xen/arm: Implement PSCI SYSTEM_SUSPEND call for guests
To: "Orzel, Michal" 
Cc: xen-devel@lists.xenproject.org, Mykola Kvach , 
	Stefano Stabellini , Julien Grall , 
	Bertrand Marquis , Volodymyr Babchuk , 
	Andrew Cooper , Anthony PERARD , 
	Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
Content-Type: text/plain; charset="UTF-8"
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On Wed, Nov 19, 2025 at 1:43=E2=80=AFPM Orzel, Michal  wrote:
>
>
>
> On 19/11/2025 12:32, Mykola Kvach wrote:
> > On Wed, Nov 19, 2025 at 1:07=E2=80=AFPM Orzel, Michal  wrote:
> >>
> >>
> >>
> >> On 19/11/2025 12:00, Mykola Kvach wrote:
> >>> Hi Michal,
> >>>
> >>> Thanks for your review.
> >>>
> >>> On Wed, Nov 19, 2025 at 10:48=E2=80=AFAM Orzel, Michal  wrote:
> >>>>
> >>>>
> >>>>
> >>>> On 18/11/2025 16:37, Mykola Kvach wrote:
> >>>>> From: Mykola Kvach 
> >>>>>
> >>>>> Add support for the PSCI SYSTEM_SUSPEND function in the vPSCI inter=
face,
> >>>>> allowing guests to request suspend via the PSCI v1.0+ SYSTEM_SUSPEN=
D call
> >>>>> (both 32-bit and 64-bit variants).
> >>>>>
> >>>>> Implementation details:
> >>>>> - Add SYSTEM_SUSPEND function IDs to PSCI definitions
> >>>>> - Trap and handle SYSTEM_SUSPEND in vPSCI
> >>>>> - Allow only non-hardware domains to invoke SYSTEM_SUSPEND; return
> >>>>>   PSCI_NOT_SUPPORTED for the hardware domain to avoid halting the s=
ystem
> >>>>>   in hwdom_shutdown() via domain_shutdown
> >>>>> - Require all secondary VCPUs of the calling domain to be offline b=
efore
> >>>>>   suspend, as mandated by the PSCI specification
> >>>>>
> >>>>> The arch_domain_resume() function is an architecture-specific hook =
that is
> >>>>> invoked during domain resume to perform any necessary setup or rest=
oration
> >>>>> steps required by the platform.
> >>>>>
> >>>>> The new vpsci_vcpu_up_prepare() helper is called on the resume path=
 to set up
> >>>>> the vCPU context (such as entry point, some system regs and context=
 ID) before
> >>>>> resuming a suspended guest. This keeps ARM/vPSCI-specific logic out=
 of common
> >>>>> code and avoids intrusive changes to the generic resume flow.
> >>>>>
> >>>>> Usage:
> >>>>>
> >>>>> For Linux-based guests, suspend can be initiated with:
> >>>>>     echo mem > /sys/power/state
> >>>>> or via:
> >>>>>     systemctl suspend
> >>>>>
> >>>>> Resuming the guest is performed from control domain using:
> >>>>>       xl resume 
> >>>>>
> >>>>> Signed-off-by: Mykola Kvach 
> >>>>> ---
> >>>>> Changes in V14:
> >>>>> - move arch_domain_resume to a separate header
> >>>>> - avoid usage of typeof for context struct
> >>>>> - moved error printing from domain_resume to arch_domain_resume
> >>>>>   in order to simplify common parts of code
> >>>>> - minor changes after review
> >>>>> ---
> >>>>>  xen/arch/arm/domain.c                 |  41 +++++++++
> >>>>>  xen/arch/arm/include/asm/domain.h     |   2 +
> >>>>>  xen/arch/arm/include/asm/perfc_defn.h |   1 +
> >>>>>  xen/arch/arm/include/asm/psci.h       |   2 +
> >>>>>  xen/arch/arm/include/asm/suspend.h    |  24 ++++++
> >>>>>  xen/arch/arm/include/asm/vpsci.h      |   5 +-
> >>>>>  xen/arch/arm/vpsci.c                  | 116 +++++++++++++++++++++-=
----
> >>>>>  xen/common/domain.c                   |   5 ++
> >>>>>  xen/include/xen/suspend.h             |  15 ++++
> >>>>>  9 files changed, 189 insertions(+), 22 deletions(-)
> >>>>>  create mode 100644 xen/arch/arm/include/asm/suspend.h
> >>>>>  create mode 100644 xen/include/xen/suspend.h
> >>>>>
> >>>>> diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
> >>>>> index e36719bce4..3c0170480b 100644
> >>>>> --- a/xen/arch/arm/domain.c
> >>>>> +++ b/xen/arch/arm/domain.c
> >>>>> @@ -12,6 +12,8 @@
> >>>>>  #include 
> >>>>>  #include 
> >>>>>
> >>>>> +#include 
> >>>>> +
> >>>>>  #include 
> >>>>>  #include 
> >>>>>  #include 
> >>>>> @@ -24,10 +26,12 @@
> >>>>>  #include 
> >>>>>  #include 
> >>>>>  #include 
> >>>>> +#include 
> >>>>>  #include 
> >>>>>  #include 
> >>>>>  #include 
> >>>>>  #include 
> >>>>> +#include 
> >>>>>  #include 
> >>>>>
> >>>>>  #include "vpci.h"
> >>>>> @@ -885,6 +889,43 @@ void arch_domain_creation_finished(struct doma=
in *d)
> >>>>>      p2m_domain_creation_finished(d);
> >>>>>  }
> >>>>>
> >>>>> +int arch_domain_resume(struct domain *d)
> >>>>> +{
> >>>>> +    int rc;
> >>>>> +    struct resume_info *ctx =3D &d->arch.resume_ctx;
> >>>>> +
> >>>>> +    if ( !d->is_shutting_down || d->shutdown_code !=3D SHUTDOWN_su=
spend )
> >>>>> +    {
> >>>>> +        dprintk(XENLOG_WARNING,
> >>>>> +                "%pd: Invalid domain state for resume: is_shutting=
_down=3D%d, shutdown_code=3D%d\n",
> >>>> These are bool and uint, so %u should be used.
> >>>
> >>> ack
> >>>
> >>>>
> >>>>> +                d, d->is_shutting_down, d->shutdown_code);
> >>>>> +        return -EINVAL;
> >>>>> +    }
> >>>>> +
> >>>>> +    /*
> >>>>> +     * It is still possible to call domain_shutdown() with a suspe=
nd reason
> >>>>> +     * via some hypercalls, such as SCHEDOP_shutdown or SCHEDOP_re=
mote_shutdown.
> >>>>> +     * In these cases, the resume context will be empty.
> >>>>> +     * This is not expected to cause any issues, so we just warn a=
bout the
> >>>>> +     * situation and return without error, allowing the existing l=
ogic to
> >>>>> +     * proceed as expected.
> >>>>> +     */
> >>>>> +    if ( !ctx->wake_cpu )
> >>>>> +    {
> >>>>> +        dprintk(XENLOG_INFO, "%pd: Wake CPU pointer context was no=
t provided\n",
> >>>>> +                d);
> >>>>> +        return 0;
> >>>>> +    }
> >>>>> +
> >>>>> +    rc =3D vpsci_vcpu_up_prepare(ctx->wake_cpu , ctx->ep, ctx->cid=
);
> >>>>> +    if ( rc )
> >>>>> +        printk("%pd: Failed to resume domain (ret %d)\n", d, rc);
> >>>>> +
> >>>>> +    memset(ctx, 0, sizeof(*ctx));
> >>>>> +
> >>>>> +    return rc;
> >>>>> +}
> >>>>> +
> >>>>>  static int is_guest_pv32_psr(uint32_t psr)
> >>>>>  {
> >>>>>      switch (psr & PSR_MODE_MASK)
> >>>>> diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/inclu=
de/asm/domain.h
> >>>>> index af3e168374..e637cb4de0 100644
> >>>>> --- a/xen/arch/arm/include/asm/domain.h
> >>>>> +++ b/xen/arch/arm/include/asm/domain.h
> >>>>> @@ -5,6 +5,7 @@
> >>>>>  #include 
> >>>>>  #include 
> >>>>>  #include 
> >>>>> +#include 
> >>>>>  #include 
> >>>>>  #include 
> >>>>>  #include 
> >>>>> @@ -126,6 +127,7 @@ struct arch_domain
> >>>>>      void *sci_data;
> >>>>>  #endif
> >>>>>
> >>>>> +    struct resume_info resume_ctx;
> >>>>>  }  __cacheline_aligned;
> >>>>>
> >>>>>  struct arch_vcpu
> >>>>> diff --git a/xen/arch/arm/include/asm/perfc_defn.h b/xen/arch/arm/i=
nclude/asm/perfc_defn.h
> >>>>> index effd25b69e..8dfcac7e3b 100644
> >>>>> --- a/xen/arch/arm/include/asm/perfc_defn.h
> >>>>> +++ b/xen/arch/arm/include/asm/perfc_defn.h
> >>>>> @@ -33,6 +33,7 @@ PERFCOUNTER(vpsci_system_reset,        "vpsci: sy=
stem_reset")
> >>>>>  PERFCOUNTER(vpsci_cpu_suspend,         "vpsci: cpu_suspend")
> >>>>>  PERFCOUNTER(vpsci_cpu_affinity_info,   "vpsci: cpu_affinity_info")
> >>>>>  PERFCOUNTER(vpsci_features,            "vpsci: features")
> >>>>> +PERFCOUNTER(vpsci_system_suspend,      "vpsci: system_suspend")
> >>>>>
> >>>>>  PERFCOUNTER(vcpu_kick,                 "vcpu: notify other vcpu")
> >>>>>
> >>>>> diff --git a/xen/arch/arm/include/asm/psci.h b/xen/arch/arm/include=
/asm/psci.h
> >>>>> index 4780972621..48a93e6b79 100644
> >>>>> --- a/xen/arch/arm/include/asm/psci.h
> >>>>> +++ b/xen/arch/arm/include/asm/psci.h
> >>>>> @@ -47,10 +47,12 @@ void call_psci_system_reset(void);
> >>>>>  #define PSCI_0_2_FN32_SYSTEM_OFF          PSCI_0_2_FN32(8)
> >>>>>  #define PSCI_0_2_FN32_SYSTEM_RESET        PSCI_0_2_FN32(9)
> >>>>>  #define PSCI_1_0_FN32_PSCI_FEATURES       PSCI_0_2_FN32(10)
> >>>>> +#define PSCI_1_0_FN32_SYSTEM_SUSPEND      PSCI_0_2_FN32(14)
> >>>>>
> >>>>>  #define PSCI_0_2_FN64_CPU_SUSPEND         PSCI_0_2_FN64(1)
> >>>>>  #define PSCI_0_2_FN64_CPU_ON              PSCI_0_2_FN64(3)
> >>>>>  #define PSCI_0_2_FN64_AFFINITY_INFO       PSCI_0_2_FN64(4)
> >>>>> +#define PSCI_1_0_FN64_SYSTEM_SUSPEND      PSCI_0_2_FN64(14)
> >>>>>
> >>>>>  /* PSCI v0.2 affinity level state returned by AFFINITY_INFO */
> >>>>>  #define PSCI_0_2_AFFINITY_LEVEL_ON      0
> >>>>> diff --git a/xen/arch/arm/include/asm/suspend.h b/xen/arch/arm/incl=
ude/asm/suspend.h
> >>>>> new file mode 100644
> >>>>> index 0000000000..b991a94d5a
> >>>>> --- /dev/null
> >>>>> +++ b/xen/arch/arm/include/asm/suspend.h
> >>>>> @@ -0,0 +1,24 @@
> >>>>> +/* SPDX-License-Identifier: GPL-2.0-only */
> >>>>> +
> >>>>> +#ifndef __ARM_SUSPEND_H__
> >>>> There should be no double underscores in guards (see examples in COD=
ING_STYLE)
> >>>
> >>> I had initially followed the style used by some of the existing heade=
rs
> >>> in this directory, which still use guards with double underscores.
> >>>
> >>> I'll remove underscores in the next series.
> >>>
> >>>>> +#define __ARM_SUSPEND_H__
> >>>>> +
> >>>>> +struct resume_info {
> >>>>> +    register_t ep;
> >>>>> +    register_t cid;
> >>>>> +    struct vcpu *wake_cpu;
> >>>>> +};
> >>>>> +
> >>>>> +int arch_domain_resume(struct domain *d);
> >>>> If possible, headers should be standalone, meaning you should includ=
e necessary
> >>>> headers or forward declare what's missing.
> >>>
> >>> Thanks for the comment.
> >>>
> >>> My initial intention was to avoid adding new dependencies from asm
> >>> headers to higher-level Xen headers, so I did not include e.g.
> >>>  directly here. In this header we only need pointers to
> >>> struct domain and struct vcpu, we never dereference them, so forward
> >>> declarations would be sufficient to make it standalone.
> >>>
> >>> I also noticed that some existing asm headers in this directory do
> >>> include higher-level Xen headers, so both patterns exist in the tree.
> >>>
> >>> If you prefer, I can either:
> >>>   - add forward declarations
> >>>
> >>>       struct domain;
> >>>       struct vcpu;
> >>>
> >>>     at the top of this header and keep the full includes in the .c
> >>>     files that actually dereference these types, or
> >>>
> >>>   - include the appropriate Xen header(s) directly in this header.
> >>>
> >>> Personally I slightly prefer the forward-declaration approach to keep
> >>> this header lightweight and avoid tightening the layering, but I am
> >>> happy to follow your preference.
> >> My preference is also to forward declare these structs.
> >>
> >>>
> >>>>
> >>>>> +
> >>>>> +#endif /* __ARM_SUSPEND_H__ */
> >>>>> +
> >>>>> + /*
> >>>>> +  * Local variables:
> >>>>> +  * mode: C
> >>>>> +  * c-file-style: "BSD"
> >>>>> +  * c-basic-offset: 4
> >>>>> +  * tab-width: 4
> >>>>> +  * indent-tabs-mode: nil
> >>>>> +  * End:
> >>>>> +  */
> >>>>> diff --git a/xen/arch/arm/include/asm/vpsci.h b/xen/arch/arm/includ=
e/asm/vpsci.h
> >>>>> index 0cca5e6830..d790ab3715 100644
> >>>>> --- a/xen/arch/arm/include/asm/vpsci.h
> >>>>> +++ b/xen/arch/arm/include/asm/vpsci.h
> >>>>> @@ -23,12 +23,15 @@
> >>>>>  #include 
> >>>>>
> >>>>>  /* Number of function implemented by virtual PSCI (only 0.2 or lat=
er) */
> >>>>> -#define VPSCI_NR_FUNCS  12
> >>>>> +#define VPSCI_NR_FUNCS  14
> >>>>>
> >>>>>  /* Functions handle PSCI calls from the guests */
> >>>>>  bool do_vpsci_0_1_call(struct cpu_user_regs *regs, uint32_t fid);
> >>>>>  bool do_vpsci_0_2_call(struct cpu_user_regs *regs, uint32_t fid);
> >>>>>
> >>>>> +int vpsci_vcpu_up_prepare(struct vcpu *v, register_t entry_point,
> >>>>> +                          register_t context_id);
> >>>>> +
> >>>>>  #endif /* __ASM_VPSCI_H__ */
> >>>>>
> >>>>>  /*
> >>>>> diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c
> >>>>> index 7ba9ccd94b..22c3a5f544 100644
> >>>>> --- a/xen/arch/arm/vpsci.c
> >>>>> +++ b/xen/arch/arm/vpsci.c
> >>>>> @@ -10,32 +10,16 @@
> >>>>>
> >>>>>  #include 
> >>>>>
> >>>>> -static int do_common_cpu_on(register_t target_cpu, register_t entr=
y_point,
> >>>>> -                            register_t context_id)
> >>>>> +int vpsci_vcpu_up_prepare(struct vcpu *v, register_t entry_point,
> >>>>> +                   register_t context_id)
> >>>> NIT: incorrect parameter alignment
> >>>
> >>> ack
> >>>
> >>>>
> >>>>>  {
> >>>>> -    struct vcpu *v;
> >>>>> -    struct domain *d =3D current->domain;
> >>>>> -    struct vcpu_guest_context *ctxt;
> >>>>>      int rc;
> >>>>> +    struct domain *d =3D v->domain;
> >>>>>      bool is_thumb =3D entry_point & 1;
> >>>>> -    register_t vcpuid;
> >>>>> -
> >>>>> -    vcpuid =3D vaffinity_to_vcpuid(target_cpu);
> >>>>> -
> >>>>> -    if ( (v =3D domain_vcpu(d, vcpuid)) =3D=3D NULL )
> >>>>> -        return PSCI_INVALID_PARAMETERS;
> >>>>> -
> >>>>> -    /* THUMB set is not allowed with 64-bit domain */
> >>>>> -    if ( is_64bit_domain(d) && is_thumb )
> >>>>> -        return PSCI_INVALID_ADDRESS;
> >>>>> -
> >>>>> -    if ( !test_bit(_VPF_down, &v->pause_flags) )
> >>>>> -        return PSCI_ALREADY_ON;
> >>>>> +    struct vcpu_guest_context *ctxt;
> >>>>>
> >>>>>      if ( (ctxt =3D alloc_vcpu_guest_context()) =3D=3D NULL )
> >>>>> -        return PSCI_DENIED;
> >>>>> -
> >>>>> -    vgic_clear_pending_irqs(v);
> >>>>> +        return -ENOMEM;
> >>>>>
> >>>>>      memset(ctxt, 0, sizeof(*ctxt));
> >>>>>      ctxt->user_regs.pc64 =3D (u64) entry_point;
> >>>>> @@ -76,8 +60,37 @@ static int do_common_cpu_on(register_t target_cp=
u, register_t entry_point,
> >>>>>      free_vcpu_guest_context(ctxt);
> >>>>>
> >>>>>      if ( rc < 0 )
> >>>>> +        return rc;
> >>>>> +
> >>>>> +    return 0;
> >>>>> +}
> >>>>> +
> >>>>> +static int do_common_cpu_on(register_t target_cpu, register_t entr=
y_point,
> >>>>> +                            register_t context_id)
> >>>>> +{
> >>>>> +    struct vcpu *v;
> >>>>> +    struct domain *d =3D current->domain;
> >>>>> +    int rc;
> >>>>> +    bool is_thumb =3D entry_point & 1;
> >>>>> +    register_t vcpuid;
> >>>>> +
> >>>>> +    vcpuid =3D vaffinity_to_vcpuid(target_cpu);
> >>>>> +
> >>>>> +    if ( (v =3D domain_vcpu(d, vcpuid)) =3D=3D NULL )
> >>>>> +        return PSCI_INVALID_PARAMETERS;
> >>>>> +
> >>>>> +    /* THUMB set is not allowed with 64-bit domain */
> >>>>> +    if ( is_64bit_domain(d) && is_thumb )
> >>>>> +        return PSCI_INVALID_ADDRESS;
> >>>>> +
> >>>>> +    if ( !test_bit(_VPF_down, &v->pause_flags) )
> >>>>> +        return PSCI_ALREADY_ON;
> >>>>> +
> >>>>> +    rc =3D vpsci_vcpu_up_prepare(v, entry_point, context_id);
> >>>>> +    if ( rc )
> >>>>>          return PSCI_DENIED;
> >>>>>
> >>>>> +    vgic_clear_pending_irqs(v);
> >>>>>      vcpu_wake(v);
> >>>>>
> >>>>>      return PSCI_SUCCESS;
> >>>>> @@ -197,6 +210,48 @@ static void do_psci_0_2_system_reset(void)
> >>>>>      domain_shutdown(d,SHUTDOWN_reboot);
> >>>>>  }
> >>>>>
> >>>>> +static int32_t do_psci_1_0_system_suspend(register_t epoint, regis=
ter_t cid)
> >>>>> +{
> >>>>> +    int32_t rc;
> >>>>> +    struct vcpu *v;
> >>>>> +    struct domain *d =3D current->domain;
> >>>>> +    bool is_thumb =3D epoint & 1;
> >>>>> +
> >>>>> +    /* THUMB set is not allowed with 64-bit domain */
> >>>>> +    if ( is_64bit_domain(d) && is_thumb )
> >>>>> +        return PSCI_INVALID_ADDRESS;
> >>>>> +
> >>>>> +    /* SYSTEM_SUSPEND is not supported for the hardware domain yet=
 */
> >>>>> +    if ( is_hardware_domain(d) )
> >>>>> +        return PSCI_NOT_SUPPORTED;
> >>>>> +
> >>>>> +    /* Ensure that all CPUs other than the calling one are offline=
 */
> >>>>> +    domain_lock(d);
> >>>>> +    for_each_vcpu ( d, v )
> >>>>> +    {
> >>>>> +        if ( v !=3D current && is_vcpu_online(v) )
> >>>>> +        {
> >>>>> +            domain_unlock(d);
> >>>>> +            return PSCI_DENIED;
> >>>>> +        }
> >>>>> +    }
> >>>>> +    domain_unlock(d);
> >>>>> +
> >>>>> +    rc =3D domain_shutdown(d, SHUTDOWN_suspend);
> >>>>> +    if ( rc )
> >>>>> +        return PSCI_DENIED;
> >>>>> +
> >>>>> +    d->arch.resume_ctx.ep =3D epoint;
> >>>>> +    d->arch.resume_ctx.cid =3D cid;
> >>>>> +    d->arch.resume_ctx.wake_cpu =3D current;
> >>>>> +
> >>>>> +    gprintk(XENLOG_DEBUG,
> >>>>> +            "SYSTEM_SUSPEND requested, epoint=3D0x%"PRIregister", =
cid=3D0x%"PRIregister"\n",
> >>>> NIT: %# is preffered over 0x%.
> >>>
> >>> ack
> >>>
> >>>>
> >>>>> +            epoint, cid);
> >>>>> +
> >>>>> +    return rc;
> >>>>> +}
> >>>>> +
> >>>>>  static int32_t do_psci_1_0_features(uint32_t psci_func_id)
> >>>>>  {
> >>>>>      /* /!\ Ordered by function ID and not name */
> >>>>> @@ -214,6 +269,8 @@ static int32_t do_psci_1_0_features(uint32_t ps=
ci_func_id)
> >>>>>      case PSCI_0_2_FN32_SYSTEM_OFF:
> >>>>>      case PSCI_0_2_FN32_SYSTEM_RESET:
> >>>>>      case PSCI_1_0_FN32_PSCI_FEATURES:
> >>>>> +    case PSCI_1_0_FN32_SYSTEM_SUSPEND:
> >>>>> +    case PSCI_1_0_FN64_SYSTEM_SUSPEND:
> >>>>>      case ARM_SMCCC_VERSION_FID:
> >>>>>          return 0;
> >>>>>      default:
> >>>>> @@ -344,6 +401,23 @@ bool do_vpsci_0_2_call(struct cpu_user_regs *r=
egs, uint32_t fid)
> >>>>>          return true;
> >>>>>      }
> >>>>>
> >>>>> +    case PSCI_1_0_FN32_SYSTEM_SUSPEND:
> >>>>> +    case PSCI_1_0_FN64_SYSTEM_SUSPEND:
> >>>>> +    {
> >>>>> +        register_t epoint =3D PSCI_ARG(regs, 1);
> >>>>> +        register_t cid =3D PSCI_ARG(regs, 2);
> >>>>> +
> >>>>> +        if ( fid =3D=3D PSCI_1_0_FN32_SYSTEM_SUSPEND )
> >>>>> +        {
> >>>>> +            epoint &=3D GENMASK(31, 0);
> >>>>> +            cid &=3D GENMASK(31, 0);
> >>>>> +        }
> >>>>> +
> >>>>> +        perfc_incr(vpsci_system_suspend);
> >>>>> +        PSCI_SET_RESULT(regs, do_psci_1_0_system_suspend(epoint, c=
id));
> >>>>> +        return true;
> >>>>> +    }
> >>>>> +
> >>>>>      default:
> >>>>>          return false;
> >>>>>      }
> >>>>> diff --git a/xen/common/domain.c b/xen/common/domain.c
> >>>>> index 775c339285..6410d32970 100644
> >>>>> --- a/xen/common/domain.c
> >>>>> +++ b/xen/common/domain.c
> >>>>> @@ -26,6 +26,7 @@
> >>>>>  #include 
> >>>>>  #include 
> >>>>>  #include 
> >>>>> +#include 
> >>>>>  #include 
> >>>>>  #include 
> >>>>>  #include 
> >>>>> @@ -1363,6 +1364,9 @@ void domain_resume(struct domain *d)
> >>>>>
> >>>>>      spin_lock(&d->shutdown_lock);
> >>>>>
> >>>>> +    if ( arch_domain_resume(d) )
> >>>>> +        goto fail;
> >>>>> +
> >>>>>      d->is_shutting_down =3D d->is_shut_down =3D 0;
> >>>>>      d->shutdown_code =3D SHUTDOWN_CODE_INVALID;
> >>>>>
> >>>>> @@ -1373,6 +1377,7 @@ void domain_resume(struct domain *d)
> >>>>>          v->paused_for_shutdown =3D 0;
> >>>>>      }
> >>>>>
> >>>>> + fail:
> >>>>>      spin_unlock(&d->shutdown_lock);
> >>>>>
> >>>>>      domain_unpause(d);
> >>>>> diff --git a/xen/include/xen/suspend.h b/xen/include/xen/suspend.h
> >>>>> new file mode 100644
> >>>>> index 0000000000..53f75fd6ad
> >>>>> --- /dev/null
> >>>>> +++ b/xen/include/xen/suspend.h
> >>>>> @@ -0,0 +1,15 @@
> >>>>> +/* SPDX-License-Identifier: GPL-2.0-only */
> >>>>> +#ifndef __XEN_SUSPEND_H__
> >>>> There should be no double underscores in guards
> >>>
> >>> I initially followed the style used by the existing headers in this
> >>> directory, which still have include guards with double underscores.
> >>>
> >>> You are right that this does not match CODING_STYLE examples.
> >>> I will update this header to use a proper guard name.
> >>>
> >>>>
> >>>>> +#define __XEN_SUSPEND_H__
> >>>>> +
> >>>>> +#if __has_include()
> >>>>> +#include 
> >>>>> +#else
> >>>>> +static inline int arch_domain_resume(struct domain *d)
> >>>>> +{
> >>>>> +    return 0;
> >>>>> +}
> >>>>> +#endif
> >>>>> +
> >>>> Stray whiteline?
> >>>
> >>> will drop
> >>>
> >>>>
> >>>>> +
> >>>>> +#endif /* __XEN_SUSPEND_H__ */
> >>>> Missing emacs block?
> >>>
> >>> It is permitted but isn't necessary as far as know,
> >>> but if it needed here per your opinion I'll add it
> >>> just let me know
> >> On Arm we usually require them and that's the overall preference I wou=
ld say.
> >>
> >>>
> >>>>
> >>>> Did you run MISRA scan on this patch?
> >>>
> >>> Yes, I ran it with:
> >>>
> >>>   ./xen/scripts/xen-analysis.py \
> >>>       --run-cppcheck --cppcheck-misra --cppcheck-html -- \
> >>>       XEN_TARGET_ARCH=3Darm64 CROSS_COMPILE=3Daarch64-linux-gnu-
> >>>
> >>> The analysis did not report any new MISRA violations in the code
> >>> touched by this patch.
> >> That's only cppcheck scan which is rather poor in finding violations. =
ECLAIR
> >> scan is done through Gitlab CI and this one is what we rely on for tak=
ing the
> >> series in.
> >
> > Thanks for the clarification.
> >
> > Is it possible to run the ECLAIR MISRA scan locally, or is it only
> > available via the project Gitlab CI instance? If there is a way to run
> > it on a developer machine, I would be happy to set it up and check this
> > series with the same configuration.
> It's not possible to run it locally. But you can use your (if you don't h=
ave,
> ask on Matrix) Xen fork under https://gitlab.com/xen-project/people to pu=
sh a
> branch and trigger the CI (ECLAIR scan needs to be manually executed from=
 the
> pipeline page).

Got it, thanks.

~Mykola

>
> ~Michal
>


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Subject: Re: [XEN][PATCH 3/5] x86: hvm: factor out compat code under ifdefs
To: Grygorii Strashko ,
 Jan Beulich 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Alejandro Vallejo ,
 Jason Andryuk ,
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 Stefano Stabellini ,
 Alejandro Vallejo ,
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Subject: Re: [XEN][PATCH 3/5] x86: hvm: factor out compat code under ifdefs
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From: Mykola Kvach 
Date: Wed, 19 Nov 2025 14:47:39 +0200
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Subject: Re: [PATCH v14 1/4] xen/arm: Implement PSCI SYSTEM_SUSPEND call for guests
To: "Orzel, Michal" 
Cc: xen-devel@lists.xenproject.org, Mykola Kvach , 
	Stefano Stabellini , Julien Grall , 
	Bertrand Marquis , Volodymyr Babchuk , 
	Andrew Cooper , Anthony PERARD , 
	Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
Content-Type: text/plain; charset="UTF-8"
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On Wed, Nov 19, 2025 at 10:48=E2=80=AFAM Orzel, Michal  wrote:
>
>
>
> On 18/11/2025 16:37, Mykola Kvach wrote:
> > From: Mykola Kvach 
> >
> > Add support for the PSCI SYSTEM_SUSPEND function in the vPSCI interface=
,
> > allowing guests to request suspend via the PSCI v1.0+ SYSTEM_SUSPEND ca=
ll
> > (both 32-bit and 64-bit variants).
> >
> > Implementation details:
> > - Add SYSTEM_SUSPEND function IDs to PSCI definitions
> > - Trap and handle SYSTEM_SUSPEND in vPSCI
> > - Allow only non-hardware domains to invoke SYSTEM_SUSPEND; return
> >   PSCI_NOT_SUPPORTED for the hardware domain to avoid halting the syste=
m
> >   in hwdom_shutdown() via domain_shutdown
> > - Require all secondary VCPUs of the calling domain to be offline befor=
e
> >   suspend, as mandated by the PSCI specification
> >
> > The arch_domain_resume() function is an architecture-specific hook that=
 is
> > invoked during domain resume to perform any necessary setup or restorat=
ion
> > steps required by the platform.
> >
> > The new vpsci_vcpu_up_prepare() helper is called on the resume path to =
set up
> > the vCPU context (such as entry point, some system regs and context ID)=
 before
> > resuming a suspended guest. This keeps ARM/vPSCI-specific logic out of =
common
> > code and avoids intrusive changes to the generic resume flow.
> >
> > Usage:
> >
> > For Linux-based guests, suspend can be initiated with:
> >     echo mem > /sys/power/state
> > or via:
> >     systemctl suspend
> >
> > Resuming the guest is performed from control domain using:
> >       xl resume 
> >
> > Signed-off-by: Mykola Kvach 
> > ---
> > Changes in V14:
> > - move arch_domain_resume to a separate header
> > - avoid usage of typeof for context struct
> > - moved error printing from domain_resume to arch_domain_resume
> >   in order to simplify common parts of code
> > - minor changes after review
> > ---
> >  xen/arch/arm/domain.c                 |  41 +++++++++
> >  xen/arch/arm/include/asm/domain.h     |   2 +
> >  xen/arch/arm/include/asm/perfc_defn.h |   1 +
> >  xen/arch/arm/include/asm/psci.h       |   2 +
> >  xen/arch/arm/include/asm/suspend.h    |  24 ++++++
> >  xen/arch/arm/include/asm/vpsci.h      |   5 +-
> >  xen/arch/arm/vpsci.c                  | 116 +++++++++++++++++++++-----
> >  xen/common/domain.c                   |   5 ++
> >  xen/include/xen/suspend.h             |  15 ++++
> >  9 files changed, 189 insertions(+), 22 deletions(-)
> >  create mode 100644 xen/arch/arm/include/asm/suspend.h
> >  create mode 100644 xen/include/xen/suspend.h
> >
> > diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
> > index e36719bce4..3c0170480b 100644
> > --- a/xen/arch/arm/domain.c
> > +++ b/xen/arch/arm/domain.c
> > @@ -12,6 +12,8 @@
> >  #include 
> >  #include 
> >
> > +#include 
> > +
> >  #include 
> >  #include 
> >  #include 
> > @@ -24,10 +26,12 @@
> >  #include 
> >  #include 
> >  #include 
> > +#include 
> >  #include 
> >  #include 
> >  #include 
> >  #include 
> > +#include 
> >  #include 
> >
> >  #include "vpci.h"
> > @@ -885,6 +889,43 @@ void arch_domain_creation_finished(struct domain *=
d)
> >      p2m_domain_creation_finished(d);
> >  }
> >
> > +int arch_domain_resume(struct domain *d)
> > +{
> > +    int rc;
> > +    struct resume_info *ctx =3D &d->arch.resume_ctx;
> > +
> > +    if ( !d->is_shutting_down || d->shutdown_code !=3D SHUTDOWN_suspen=
d )
> > +    {
> > +        dprintk(XENLOG_WARNING,
> > +                "%pd: Invalid domain state for resume: is_shutting_dow=
n=3D%d, shutdown_code=3D%d\n",
> These are bool and uint, so %u should be used.
>
> > +                d, d->is_shutting_down, d->shutdown_code);
> > +        return -EINVAL;
> > +    }
> > +
> > +    /*
> > +     * It is still possible to call domain_shutdown() with a suspend r=
eason
> > +     * via some hypercalls, such as SCHEDOP_shutdown or SCHEDOP_remote=
_shutdown.
> > +     * In these cases, the resume context will be empty.
> > +     * This is not expected to cause any issues, so we just warn about=
 the
> > +     * situation and return without error, allowing the existing logic=
 to
> > +     * proceed as expected.
> > +     */
> > +    if ( !ctx->wake_cpu )
> > +    {
> > +        dprintk(XENLOG_INFO, "%pd: Wake CPU pointer context was not pr=
ovided\n",
> > +                d);
> > +        return 0;
> > +    }
> > +
> > +    rc =3D vpsci_vcpu_up_prepare(ctx->wake_cpu , ctx->ep, ctx->cid);
> > +    if ( rc )
> > +        printk("%pd: Failed to resume domain (ret %d)\n", d, rc);
> > +
> > +    memset(ctx, 0, sizeof(*ctx));
> > +
> > +    return rc;
> > +}
> > +
> >  static int is_guest_pv32_psr(uint32_t psr)
> >  {
> >      switch (psr & PSR_MODE_MASK)
> > diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/a=
sm/domain.h
> > index af3e168374..e637cb4de0 100644
> > --- a/xen/arch/arm/include/asm/domain.h
> > +++ b/xen/arch/arm/include/asm/domain.h
> > @@ -5,6 +5,7 @@
> >  #include 
> >  #include 
> >  #include 
> > +#include 
> >  #include 
> >  #include 
> >  #include 
> > @@ -126,6 +127,7 @@ struct arch_domain
> >      void *sci_data;
> >  #endif
> >
> > +    struct resume_info resume_ctx;
> >  }  __cacheline_aligned;
> >
> >  struct arch_vcpu
> > diff --git a/xen/arch/arm/include/asm/perfc_defn.h b/xen/arch/arm/inclu=
de/asm/perfc_defn.h
> > index effd25b69e..8dfcac7e3b 100644
> > --- a/xen/arch/arm/include/asm/perfc_defn.h
> > +++ b/xen/arch/arm/include/asm/perfc_defn.h
> > @@ -33,6 +33,7 @@ PERFCOUNTER(vpsci_system_reset,        "vpsci: system=
_reset")
> >  PERFCOUNTER(vpsci_cpu_suspend,         "vpsci: cpu_suspend")
> >  PERFCOUNTER(vpsci_cpu_affinity_info,   "vpsci: cpu_affinity_info")
> >  PERFCOUNTER(vpsci_features,            "vpsci: features")
> > +PERFCOUNTER(vpsci_system_suspend,      "vpsci: system_suspend")
> >
> >  PERFCOUNTER(vcpu_kick,                 "vcpu: notify other vcpu")
> >
> > diff --git a/xen/arch/arm/include/asm/psci.h b/xen/arch/arm/include/asm=
/psci.h
> > index 4780972621..48a93e6b79 100644
> > --- a/xen/arch/arm/include/asm/psci.h
> > +++ b/xen/arch/arm/include/asm/psci.h
> > @@ -47,10 +47,12 @@ void call_psci_system_reset(void);
> >  #define PSCI_0_2_FN32_SYSTEM_OFF          PSCI_0_2_FN32(8)
> >  #define PSCI_0_2_FN32_SYSTEM_RESET        PSCI_0_2_FN32(9)
> >  #define PSCI_1_0_FN32_PSCI_FEATURES       PSCI_0_2_FN32(10)
> > +#define PSCI_1_0_FN32_SYSTEM_SUSPEND      PSCI_0_2_FN32(14)
> >
> >  #define PSCI_0_2_FN64_CPU_SUSPEND         PSCI_0_2_FN64(1)
> >  #define PSCI_0_2_FN64_CPU_ON              PSCI_0_2_FN64(3)
> >  #define PSCI_0_2_FN64_AFFINITY_INFO       PSCI_0_2_FN64(4)
> > +#define PSCI_1_0_FN64_SYSTEM_SUSPEND      PSCI_0_2_FN64(14)
> >
> >  /* PSCI v0.2 affinity level state returned by AFFINITY_INFO */
> >  #define PSCI_0_2_AFFINITY_LEVEL_ON      0
> > diff --git a/xen/arch/arm/include/asm/suspend.h b/xen/arch/arm/include/=
asm/suspend.h
> > new file mode 100644
> > index 0000000000..b991a94d5a
> > --- /dev/null
> > +++ b/xen/arch/arm/include/asm/suspend.h
> > @@ -0,0 +1,24 @@
> > +/* SPDX-License-Identifier: GPL-2.0-only */
> > +
> > +#ifndef __ARM_SUSPEND_H__
> There should be no double underscores in guards (see examples in CODING_S=
TYLE)
> > +#define __ARM_SUSPEND_H__
> > +
> > +struct resume_info {
> > +    register_t ep;
> > +    register_t cid;
> > +    struct vcpu *wake_cpu;
> > +};
> > +
> > +int arch_domain_resume(struct domain *d);
> If possible, headers should be standalone, meaning you should include nec=
essary
> headers or forward declare what's missing.
>
> > +
> > +#endif /* __ARM_SUSPEND_H__ */
> > +
> > + /*
> > +  * Local variables:
> > +  * mode: C
> > +  * c-file-style: "BSD"
> > +  * c-basic-offset: 4
> > +  * tab-width: 4
> > +  * indent-tabs-mode: nil
> > +  * End:
> > +  */
> > diff --git a/xen/arch/arm/include/asm/vpsci.h b/xen/arch/arm/include/as=
m/vpsci.h
> > index 0cca5e6830..d790ab3715 100644
> > --- a/xen/arch/arm/include/asm/vpsci.h
> > +++ b/xen/arch/arm/include/asm/vpsci.h
> > @@ -23,12 +23,15 @@
> >  #include 
> >
> >  /* Number of function implemented by virtual PSCI (only 0.2 or later) =
*/
> > -#define VPSCI_NR_FUNCS  12
> > +#define VPSCI_NR_FUNCS  14
> >
> >  /* Functions handle PSCI calls from the guests */
> >  bool do_vpsci_0_1_call(struct cpu_user_regs *regs, uint32_t fid);
> >  bool do_vpsci_0_2_call(struct cpu_user_regs *regs, uint32_t fid);
> >
> > +int vpsci_vcpu_up_prepare(struct vcpu *v, register_t entry_point,
> > +                          register_t context_id);
> > +
> >  #endif /* __ASM_VPSCI_H__ */
> >
> >  /*
> > diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c
> > index 7ba9ccd94b..22c3a5f544 100644
> > --- a/xen/arch/arm/vpsci.c
> > +++ b/xen/arch/arm/vpsci.c
> > @@ -10,32 +10,16 @@
> >
> >  #include 
> >
> > -static int do_common_cpu_on(register_t target_cpu, register_t entry_po=
int,
> > -                            register_t context_id)
> > +int vpsci_vcpu_up_prepare(struct vcpu *v, register_t entry_point,
> > +                   register_t context_id)
> NIT: incorrect parameter alignment
>
> >  {
> > -    struct vcpu *v;
> > -    struct domain *d =3D current->domain;
> > -    struct vcpu_guest_context *ctxt;
> >      int rc;
> > +    struct domain *d =3D v->domain;
> >      bool is_thumb =3D entry_point & 1;
> > -    register_t vcpuid;
> > -
> > -    vcpuid =3D vaffinity_to_vcpuid(target_cpu);
> > -
> > -    if ( (v =3D domain_vcpu(d, vcpuid)) =3D=3D NULL )
> > -        return PSCI_INVALID_PARAMETERS;
> > -
> > -    /* THUMB set is not allowed with 64-bit domain */
> > -    if ( is_64bit_domain(d) && is_thumb )
> > -        return PSCI_INVALID_ADDRESS;
> > -
> > -    if ( !test_bit(_VPF_down, &v->pause_flags) )
> > -        return PSCI_ALREADY_ON;
> > +    struct vcpu_guest_context *ctxt;
> >
> >      if ( (ctxt =3D alloc_vcpu_guest_context()) =3D=3D NULL )
> > -        return PSCI_DENIED;
> > -
> > -    vgic_clear_pending_irqs(v);
> > +        return -ENOMEM;
> >
> >      memset(ctxt, 0, sizeof(*ctxt));
> >      ctxt->user_regs.pc64 =3D (u64) entry_point;
> > @@ -76,8 +60,37 @@ static int do_common_cpu_on(register_t target_cpu, r=
egister_t entry_point,
> >      free_vcpu_guest_context(ctxt);
> >
> >      if ( rc < 0 )
> > +        return rc;
> > +
> > +    return 0;
> > +}
> > +
> > +static int do_common_cpu_on(register_t target_cpu, register_t entry_po=
int,
> > +                            register_t context_id)
> > +{
> > +    struct vcpu *v;
> > +    struct domain *d =3D current->domain;
> > +    int rc;
> > +    bool is_thumb =3D entry_point & 1;
> > +    register_t vcpuid;
> > +
> > +    vcpuid =3D vaffinity_to_vcpuid(target_cpu);
> > +
> > +    if ( (v =3D domain_vcpu(d, vcpuid)) =3D=3D NULL )
> > +        return PSCI_INVALID_PARAMETERS;
> > +
> > +    /* THUMB set is not allowed with 64-bit domain */
> > +    if ( is_64bit_domain(d) && is_thumb )
> > +        return PSCI_INVALID_ADDRESS;
> > +
> > +    if ( !test_bit(_VPF_down, &v->pause_flags) )
> > +        return PSCI_ALREADY_ON;
> > +
> > +    rc =3D vpsci_vcpu_up_prepare(v, entry_point, context_id);
> > +    if ( rc )
> >          return PSCI_DENIED;
> >
> > +    vgic_clear_pending_irqs(v);
> >      vcpu_wake(v);
> >
> >      return PSCI_SUCCESS;
> > @@ -197,6 +210,48 @@ static void do_psci_0_2_system_reset(void)
> >      domain_shutdown(d,SHUTDOWN_reboot);
> >  }
> >
> > +static int32_t do_psci_1_0_system_suspend(register_t epoint, register_=
t cid)
> > +{
> > +    int32_t rc;
> > +    struct vcpu *v;
> > +    struct domain *d =3D current->domain;
> > +    bool is_thumb =3D epoint & 1;
> > +
> > +    /* THUMB set is not allowed with 64-bit domain */
> > +    if ( is_64bit_domain(d) && is_thumb )
> > +        return PSCI_INVALID_ADDRESS;
> > +
> > +    /* SYSTEM_SUSPEND is not supported for the hardware domain yet */
> > +    if ( is_hardware_domain(d) )
> > +        return PSCI_NOT_SUPPORTED;
> > +
> > +    /* Ensure that all CPUs other than the calling one are offline */
> > +    domain_lock(d);
> > +    for_each_vcpu ( d, v )
> > +    {
> > +        if ( v !=3D current && is_vcpu_online(v) )
> > +        {
> > +            domain_unlock(d);
> > +            return PSCI_DENIED;
> > +        }
> > +    }
> > +    domain_unlock(d);
> > +
> > +    rc =3D domain_shutdown(d, SHUTDOWN_suspend);
> > +    if ( rc )
> > +        return PSCI_DENIED;
> > +
> > +    d->arch.resume_ctx.ep =3D epoint;
> > +    d->arch.resume_ctx.cid =3D cid;
> > +    d->arch.resume_ctx.wake_cpu =3D current;
> > +
> > +    gprintk(XENLOG_DEBUG,
> > +            "SYSTEM_SUSPEND requested, epoint=3D0x%"PRIregister", cid=
=3D0x%"PRIregister"\n",
> NIT: %# is preffered over 0x%.
>
> > +            epoint, cid);
> > +
> > +    return rc;
> > +}
> > +
> >  static int32_t do_psci_1_0_features(uint32_t psci_func_id)
> >  {
> >      /* /!\ Ordered by function ID and not name */
> > @@ -214,6 +269,8 @@ static int32_t do_psci_1_0_features(uint32_t psci_f=
unc_id)
> >      case PSCI_0_2_FN32_SYSTEM_OFF:
> >      case PSCI_0_2_FN32_SYSTEM_RESET:
> >      case PSCI_1_0_FN32_PSCI_FEATURES:
> > +    case PSCI_1_0_FN32_SYSTEM_SUSPEND:
> > +    case PSCI_1_0_FN64_SYSTEM_SUSPEND:
> >      case ARM_SMCCC_VERSION_FID:
> >          return 0;
> >      default:
> > @@ -344,6 +401,23 @@ bool do_vpsci_0_2_call(struct cpu_user_regs *regs,=
 uint32_t fid)
> >          return true;
> >      }
> >
> > +    case PSCI_1_0_FN32_SYSTEM_SUSPEND:
> > +    case PSCI_1_0_FN64_SYSTEM_SUSPEND:
> > +    {
> > +        register_t epoint =3D PSCI_ARG(regs, 1);
> > +        register_t cid =3D PSCI_ARG(regs, 2);
> > +
> > +        if ( fid =3D=3D PSCI_1_0_FN32_SYSTEM_SUSPEND )
> > +        {
> > +            epoint &=3D GENMASK(31, 0);
> > +            cid &=3D GENMASK(31, 0);
> > +        }
> > +
> > +        perfc_incr(vpsci_system_suspend);
> > +        PSCI_SET_RESULT(regs, do_psci_1_0_system_suspend(epoint, cid))=
;
> > +        return true;
> > +    }
> > +
> >      default:
> >          return false;
> >      }
> > diff --git a/xen/common/domain.c b/xen/common/domain.c
> > index 775c339285..6410d32970 100644
> > --- a/xen/common/domain.c
> > +++ b/xen/common/domain.c
> > @@ -26,6 +26,7 @@
> >  #include 
> >  #include 
> >  #include 
> > +#include 
> >  #include 
> >  #include 
> >  #include 
> > @@ -1363,6 +1364,9 @@ void domain_resume(struct domain *d)
> >
> >      spin_lock(&d->shutdown_lock);
> >
> > +    if ( arch_domain_resume(d) )
> > +        goto fail;
> > +
> >      d->is_shutting_down =3D d->is_shut_down =3D 0;
> >      d->shutdown_code =3D SHUTDOWN_CODE_INVALID;
> >
> > @@ -1373,6 +1377,7 @@ void domain_resume(struct domain *d)
> >          v->paused_for_shutdown =3D 0;
> >      }
> >
> > + fail:
> >      spin_unlock(&d->shutdown_lock);
> >
> >      domain_unpause(d);
> > diff --git a/xen/include/xen/suspend.h b/xen/include/xen/suspend.h
> > new file mode 100644
> > index 0000000000..53f75fd6ad
> > --- /dev/null
> > +++ b/xen/include/xen/suspend.h
> > @@ -0,0 +1,15 @@
> > +/* SPDX-License-Identifier: GPL-2.0-only */
> > +#ifndef __XEN_SUSPEND_H__
> There should be no double underscores in guards
>
> > +#define __XEN_SUSPEND_H__
> > +
> > +#if __has_include()
> > +#include 
> > +#else
> > +static inline int arch_domain_resume(struct domain *d)
> > +{
> > +    return 0;
> > +}
> > +#endif
> > +
> Stray whiteline?
>
> > +
> > +#endif /* __XEN_SUSPEND_H__ */
> Missing emacs block?
>
> Did you run MISRA scan on this patch?

The ECLAIR MISRA scan was run via GitLab CI for this branch by my
colleague:

https://gitlab.com/xen-project/people/dimaprkp4k/xen/-/pipelines/2167389661

As far as I can see, there are no new MISRA violations reported for the
code touched by this patch.


~Mykola

>
> ~Michal
>
>


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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: kwolf@redhat.com,
	hreitz@redhat.com,
	mst@redhat.com,
	imammedo@redhat.com,
	anisinha@redhat.com,
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Subject: [PATCH 2/5] hw/nvram/xlnx-bbram: More idiomatic and simpler error reporting
Date: Wed, 19 Nov 2025 14:08:52 +0100
Message-ID: <20251119130855.105479-3-armbru@redhat.com>
In-Reply-To: <20251119130855.105479-1-armbru@redhat.com>
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bbram_bdrv_error() interpolates a "detail" string into a template with
error_setg_errno(), then reports the result with error_report().
Produces error messages with an unwanted '.':

    BLK-NAME: BBRAM backstore DETAIL failed.: STERROR

Replace both calls of bbram_bdrv_error() by straightforward
error_report(), and drop the function.  This is less code, easier to
read, and the error message is more greppable.

Also delete the unwanted '.'.

Signed-off-by: Markus Armbruster 
---
 hw/nvram/xlnx-bbram.c | 18 ++++--------------
 1 file changed, 4 insertions(+), 14 deletions(-)

diff --git a/hw/nvram/xlnx-bbram.c b/hw/nvram/xlnx-bbram.c
index 22aefbc240..fe289bad9d 100644
--- a/hw/nvram/xlnx-bbram.c
+++ b/hw/nvram/xlnx-bbram.c
@@ -88,18 +88,6 @@ static bool bbram_pgm_enabled(XlnxBBRam *s)
     return ARRAY_FIELD_EX32(s->regs, BBRAM_STATUS, PGM_MODE) != 0;
 }
 
-static void bbram_bdrv_error(XlnxBBRam *s, int rc, gchar *detail)
-{
-    Error *errp = NULL;
-
-    error_setg_errno(&errp, -rc, "%s: BBRAM backstore %s failed.",
-                     blk_name(s->blk), detail);
-    error_report("%s", error_get_pretty(errp));
-    error_free(errp);
-
-    g_free(detail);
-}
-
 static void bbram_bdrv_read(XlnxBBRam *s, Error **errp)
 {
     uint32_t *ram = &s->regs[R_BBRAM_0];
@@ -162,7 +150,8 @@ static void bbram_bdrv_sync(XlnxBBRam *s, uint64_t hwaddr)
     offset = hwaddr - A_BBRAM_0;
     rc = blk_pwrite(s->blk, offset, 4, &le32, 0);
     if (rc < 0) {
-        bbram_bdrv_error(s, rc, g_strdup_printf("write to offset %u", offset));
+        error_report("%s: BBRAM backstore write to offset %u failed: %s",
+                     blk_name(s->blk), offset, strerror(-rc));
     }
 }
 
@@ -178,7 +167,8 @@ static void bbram_bdrv_zero(XlnxBBRam *s)
 
     rc = blk_make_zero(s->blk, 0);
     if (rc < 0) {
-        bbram_bdrv_error(s, rc, g_strdup("zeroizing"));
+        error_report("%s: BBRAM backstore zeroizing failed: %s",
+                     blk_name(s->blk), strerror(-rc));
     }
 
     /* Restore bbram8 if it is non-zero */
-- 
2.49.0



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Subject: [PATCH 1/5] hw/core/loader: Make load_elf_hdr() return bool, simplify caller
Date: Wed, 19 Nov 2025 14:08:51 +0100
Message-ID: <20251119130855.105479-2-armbru@redhat.com>
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Signed-off-by: Markus Armbruster 
---
 include/hw/loader.h |  4 +++-
 hw/arm/boot.c       |  6 +-----
 hw/core/loader.c    |  8 ++++++--
 hw/riscv/spike.c    | 10 +---------
 4 files changed, 11 insertions(+), 17 deletions(-)

diff --git a/include/hw/loader.h b/include/hw/loader.h
index d035e72748..6f91703503 100644
--- a/include/hw/loader.h
+++ b/include/hw/loader.h
@@ -188,8 +188,10 @@ ssize_t load_elf(const char *filename,
  *
  * Inspect an ELF file's header. Read its full header contents into a
  * buffer and/or determine if the ELF is 64bit.
+ *
+ * Returns true on success, false on failure.
  */
-void load_elf_hdr(const char *filename, void *hdr, bool *is64, Error **errp);
+bool load_elf_hdr(const char *filename, void *hdr, bool *is64, Error **errp);
 
 ssize_t load_aout(const char *filename, hwaddr addr, int max_sz,
                   bool big_endian, hwaddr target_page_size);
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index b91660208f..06b303aab8 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -766,16 +766,12 @@ static ssize_t arm_load_elf(struct arm_boot_info *info, uint64_t *pentry,
     int data_swab = 0;
     int elf_data_order;
     ssize_t ret;
-    Error *err = NULL;
 
-
-    load_elf_hdr(info->kernel_filename, &elf_header, &elf_is64, &err);
-    if (err) {
+    if (!load_elf_hdr(info->kernel_filename, &elf_header, &elf_is64, NULL)) {
         /*
          * If the file is not an ELF file we silently return.
          * The caller will fall back to try other formats.
          */
-        error_free(err);
         return -1;
     }
 
diff --git a/hw/core/loader.c b/hw/core/loader.c
index 590c5b02aa..10687fe1c8 100644
--- a/hw/core/loader.c
+++ b/hw/core/loader.c
@@ -364,8 +364,9 @@ const char *load_elf_strerror(ssize_t error)
     }
 }
 
-void load_elf_hdr(const char *filename, void *hdr, bool *is64, Error **errp)
+bool load_elf_hdr(const char *filename, void *hdr, bool *is64, Error **errp)
 {
+    bool ok = false;
     int fd;
     uint8_t e_ident_local[EI_NIDENT];
     uint8_t *e_ident;
@@ -380,7 +381,7 @@ void load_elf_hdr(const char *filename, void *hdr, bool *is64, Error **errp)
     fd = open(filename, O_RDONLY | O_BINARY);
     if (fd < 0) {
         error_setg_errno(errp, errno, "Failed to open file: %s", filename);
-        return;
+        return false;
     }
     if (read(fd, hdr, EI_NIDENT) != EI_NIDENT) {
         error_setg_errno(errp, errno, "Failed to read file: %s", filename);
@@ -415,8 +416,11 @@ void load_elf_hdr(const char *filename, void *hdr, bool *is64, Error **errp)
         off += br;
     }
 
+    ok = true;
+
 fail:
     close(fd);
+    return ok;
 }
 
 /* return < 0 if error, otherwise the number of bytes loaded in memory */
diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
index b0bab3fe00..8531e1d121 100644
--- a/hw/riscv/spike.c
+++ b/hw/riscv/spike.c
@@ -180,15 +180,7 @@ static void create_fdt(SpikeState *s, const MemMapEntry *memmap,
 
 static bool spike_test_elf_image(char *filename)
 {
-    Error *err = NULL;
-
-    load_elf_hdr(filename, NULL, NULL, &err);
-    if (err) {
-        error_free(err);
-        return false;
-    } else {
-        return true;
-    }
+    return load_elf_hdr(filename, NULL, NULL, NULL);
 }
 
 static void spike_board_init(MachineState *machine)
-- 
2.49.0



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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: kwolf@redhat.com,
	hreitz@redhat.com,
	mst@redhat.com,
	imammedo@redhat.com,
	anisinha@redhat.com,
	gengdongjiu1@gmail.com,
	peter.maydell@linaro.org,
	alistair@alistair23.me,
	edgar.iglesias@gmail.com,
	npiggin@gmail.com,
	harshpb@linux.ibm.com,
	palmer@dabbelt.com,
	liwei1518@gmail.com,
	dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com,
	sstabellini@kernel.org,
	anthony@xenproject.org,
	paul@xen.org,
	berrange@redhat.com,
	peterx@redhat.com,
	farosas@suse.de,
	eblake@redhat.com,
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	eduardo@habkost.net,
	marcel.apfelbaum@gmail.com,
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	qemu-ppc@nongnu.org,
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	xen-devel@lists.xenproject.org
Subject: [PATCH 4/5] error: error_free(NULL) is safe, drop unnecessary conditionals
Date: Wed, 19 Nov 2025 14:08:54 +0100
Message-ID: <20251119130855.105479-5-armbru@redhat.com>
In-Reply-To: <20251119130855.105479-1-armbru@redhat.com>
References: <20251119130855.105479-1-armbru@redhat.com>
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Signed-off-by: Markus Armbruster 
---
 hw/acpi/pcihp.c             | 4 +---
 io/channel-websock.c        | 4 +---
 io/task.c                   | 4 +---
 migration/migration.c       | 6 ++----
 tests/unit/test-smp-parse.c | 5 +----
 5 files changed, 6 insertions(+), 17 deletions(-)

diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
index 4922bbc778..87162ff2c0 100644
--- a/hw/acpi/pcihp.c
+++ b/hw/acpi/pcihp.c
@@ -62,9 +62,7 @@ static int acpi_pcihp_get_bsel(PCIBus *bus)
                                              &local_err);
 
     if (local_err || bsel >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
-        if (local_err) {
-            error_free(local_err);
-        }
+        error_free(local_err);
         return -1;
     } else {
         return bsel;
diff --git a/io/channel-websock.c b/io/channel-websock.c
index cb4dafdebb..d0929ba232 100644
--- a/io/channel-websock.c
+++ b/io/channel-websock.c
@@ -932,9 +932,7 @@ static void qio_channel_websock_finalize(Object *obj)
     if (ioc->io_tag) {
         g_source_remove(ioc->io_tag);
     }
-    if (ioc->io_err) {
-        error_free(ioc->io_err);
-    }
+    error_free(ioc->io_err);
     object_unref(OBJECT(ioc->master));
 }
 
diff --git a/io/task.c b/io/task.c
index 451f26f8b4..da79d31782 100644
--- a/io/task.c
+++ b/io/task.c
@@ -91,9 +91,7 @@ static void qio_task_free(QIOTask *task)
     if (task->destroyResult) {
         task->destroyResult(task->result);
     }
-    if (task->err) {
-        error_free(task->err);
-    }
+    error_free(task->err);
     object_unref(task->source);
 
     qemu_mutex_unlock(&task->thread_lock);
diff --git a/migration/migration.c b/migration/migration.c
index c2daab6bdd..3160e24220 100644
--- a/migration/migration.c
+++ b/migration/migration.c
@@ -1569,10 +1569,8 @@ bool migrate_has_error(MigrationState *s)
 static void migrate_error_free(MigrationState *s)
 {
     QEMU_LOCK_GUARD(&s->error_mutex);
-    if (s->error) {
-        error_free(s->error);
-        s->error = NULL;
-    }
+    error_free(s->error);
+    s->error = NULL;
 }
 
 static void migration_connect_set_error(MigrationState *s, const Error *error)
diff --git a/tests/unit/test-smp-parse.c b/tests/unit/test-smp-parse.c
index 326045ecbb..34082c1465 100644
--- a/tests/unit/test-smp-parse.c
+++ b/tests/unit/test-smp-parse.c
@@ -875,10 +875,7 @@ static void check_parse(MachineState *ms, const SMPConfiguration *config,
                config_str, expect_err, output_topo_str);
 
 end:
-    if (err != NULL) {
-        error_free(err);
-    }
-
+    error_free(err);
     abort();
 }
 
-- 
2.49.0



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To: qemu-devel@nongnu.org
Cc: kwolf@redhat.com,
	hreitz@redhat.com,
	mst@redhat.com,
	imammedo@redhat.com,
	anisinha@redhat.com,
	gengdongjiu1@gmail.com,
	peter.maydell@linaro.org,
	alistair@alistair23.me,
	edgar.iglesias@gmail.com,
	npiggin@gmail.com,
	harshpb@linux.ibm.com,
	palmer@dabbelt.com,
	liwei1518@gmail.com,
	dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com,
	sstabellini@kernel.org,
	anthony@xenproject.org,
	paul@xen.org,
	berrange@redhat.com,
	peterx@redhat.com,
	farosas@suse.de,
	eblake@redhat.com,
	vsementsov@yandex-team.ru,
	eduardo@habkost.net,
	marcel.apfelbaum@gmail.com,
	philmd@linaro.org,
	wangyanan55@huawei.com,
	zhao1.liu@intel.com,
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	xen-devel@lists.xenproject.org
Subject: [PATCH 3/5] nbd/client-connection: Replace error_propagate() by assignment
Date: Wed, 19 Nov 2025 14:08:53 +0100
Message-ID: <20251119130855.105479-4-armbru@redhat.com>
In-Reply-To: <20251119130855.105479-1-armbru@redhat.com>
References: <20251119130855.105479-1-armbru@redhat.com>
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connect_thread_func() sets a variable to null, then error_propagate()s
an Error * to it.  This is a roundabout way to assign the Error * to
it, so replace it by just that.

Signed-off-by: Markus Armbruster 
---
 nbd/client-connection.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/nbd/client-connection.c b/nbd/client-connection.c
index 79ea97e4cc..6a4f080717 100644
--- a/nbd/client-connection.c
+++ b/nbd/client-connection.c
@@ -207,8 +207,7 @@ static void *connect_thread_func(void *opaque)
         qemu_mutex_lock(&conn->mutex);
 
         error_free(conn->err);
-        conn->err = NULL;
-        error_propagate(&conn->err, local_err);
+        conn->err = local_err;
 
         if (ret < 0) {
             object_unref(OBJECT(conn->sioc));
-- 
2.49.0



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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: kwolf@redhat.com,
	hreitz@redhat.com,
	mst@redhat.com,
	imammedo@redhat.com,
	anisinha@redhat.com,
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	npiggin@gmail.com,
	harshpb@linux.ibm.com,
	palmer@dabbelt.com,
	liwei1518@gmail.com,
	dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com,
	sstabellini@kernel.org,
	anthony@xenproject.org,
	paul@xen.org,
	berrange@redhat.com,
	peterx@redhat.com,
	farosas@suse.de,
	eblake@redhat.com,
	vsementsov@yandex-team.ru,
	eduardo@habkost.net,
	marcel.apfelbaum@gmail.com,
	philmd@linaro.org,
	wangyanan55@huawei.com,
	zhao1.liu@intel.com,
	qemu-block@nongnu.org,
	qemu-arm@nongnu.org,
	qemu-ppc@nongnu.org,
	qemu-riscv@nongnu.org,
	xen-devel@lists.xenproject.org
Subject: [PATCH 0/5] A bit of cleanup around Error
Date: Wed, 19 Nov 2025 14:08:50 +0100
Message-ID: <20251119130855.105479-1-armbru@redhat.com>
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Note: the last patch adds a drive-by FIXME.  I asked for advice on how
to fix it:

    Subject: Incorrect error handling in xen_enable_tpm()
    To: qemu-devel@nongnu.org
    Cc: Stefano Stabellini , Anthony PERARD , Paul
     Durrant , "Edgar E. Iglesias" ,
     xen-devel@lists.xenproject.org, Vikram Garhwal  
    Date: Fri, 14 Nov 2025 10:16:58 +0100
    Message-ID: <87jyzt0y9h.fsf@pond.sub.org>

No reply so far.

Markus Armbruster (5):
  hw/core/loader: Make load_elf_hdr() return bool, simplify caller
  hw/nvram/xlnx-bbram: More idiomatic and simpler error reporting
  nbd/client-connection: Replace error_propagate() by assignment
  error: error_free(NULL) is safe, drop unnecessary conditionals
  error: Consistently name Error * objects err, and not errp

 include/hw/loader.h         |  4 +++-
 block/crypto.c              |  8 ++++----
 hw/acpi/ghes.c              |  8 ++++----
 hw/acpi/pcihp.c             |  4 +---
 hw/arm/boot.c               |  6 +-----
 hw/core/loader.c            |  8 ++++++--
 hw/nvram/xlnx-bbram.c       | 18 ++++--------------
 hw/ppc/spapr.c              | 16 ++++++++--------
 hw/riscv/spike.c            | 10 +---------
 hw/xen/xen-pvh-common.c     | 13 ++++++++++---
 io/channel-websock.c        |  4 +---
 io/task.c                   |  4 +---
 migration/migration.c       |  6 ++----
 nbd/client-connection.c     |  3 +--
 nbd/common.c                |  6 +++---
 tests/unit/test-smp-parse.c |  5 +----
 16 files changed, 51 insertions(+), 72 deletions(-)

-- 
2.49.0



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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: kwolf@redhat.com,
	hreitz@redhat.com,
	mst@redhat.com,
	imammedo@redhat.com,
	anisinha@redhat.com,
	gengdongjiu1@gmail.com,
	peter.maydell@linaro.org,
	alistair@alistair23.me,
	edgar.iglesias@gmail.com,
	npiggin@gmail.com,
	harshpb@linux.ibm.com,
	palmer@dabbelt.com,
	liwei1518@gmail.com,
	dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com,
	sstabellini@kernel.org,
	anthony@xenproject.org,
	paul@xen.org,
	berrange@redhat.com,
	peterx@redhat.com,
	farosas@suse.de,
	eblake@redhat.com,
	vsementsov@yandex-team.ru,
	eduardo@habkost.net,
	marcel.apfelbaum@gmail.com,
	philmd@linaro.org,
	wangyanan55@huawei.com,
	zhao1.liu@intel.com,
	qemu-block@nongnu.org,
	qemu-arm@nongnu.org,
	qemu-ppc@nongnu.org,
	qemu-riscv@nongnu.org,
	xen-devel@lists.xenproject.org
Subject: [PATCH 5/5] error: Consistently name Error * objects err, and not errp
Date: Wed, 19 Nov 2025 14:08:55 +0100
Message-ID: <20251119130855.105479-6-armbru@redhat.com>
In-Reply-To: <20251119130855.105479-1-armbru@redhat.com>
References: <20251119130855.105479-1-armbru@redhat.com>
MIME-Version: 1.0
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X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93

This touches code in xen_enable_tpm() that is obviously wrong.  Since
I don't know how to fix it properly, I'm adding a FIXME there.

Signed-off-by: Markus Armbruster 
---
 block/crypto.c          |  8 ++++----
 hw/acpi/ghes.c          |  8 ++++----
 hw/ppc/spapr.c          | 16 ++++++++--------
 hw/xen/xen-pvh-common.c | 13 ++++++++++---
 nbd/common.c            |  6 +++---
 5 files changed, 29 insertions(+), 22 deletions(-)

diff --git a/block/crypto.c b/block/crypto.c
index b97d027444..36abb7af46 100644
--- a/block/crypto.c
+++ b/block/crypto.c
@@ -938,14 +938,14 @@ static void GRAPH_RDLOCK
 block_crypto_amend_cleanup(BlockDriverState *bs)
 {
     BlockCrypto *crypto = bs->opaque;
-    Error *errp = NULL;
+    Error *err = NULL;
 
     /* release exclusive read/write permissions to the underlying file */
     crypto->updating_keys = false;
-    bdrv_child_refresh_perms(bs, bs->file, &errp);
+    bdrv_child_refresh_perms(bs, bs->file, &err);
 
-    if (errp) {
-        error_report_err(errp);
+    if (err) {
+        error_report_err(err);
     }
 }
 
diff --git a/hw/acpi/ghes.c b/hw/acpi/ghes.c
index 06555905ce..841a36e370 100644
--- a/hw/acpi/ghes.c
+++ b/hw/acpi/ghes.c
@@ -563,7 +563,7 @@ int acpi_ghes_memory_errors(AcpiGhesState *ags, uint16_t source_id,
     const uint8_t guid[] =
           UUID_LE(0xA5BC1114, 0x6F64, 0x4EDE, 0xB8, 0x63, 0x3E, 0x83, \
                   0xED, 0x7C, 0x83, 0xB1);
-    Error *errp = NULL;
+    Error *err = NULL;
     int data_length;
     GArray *block;
 
@@ -583,12 +583,12 @@ int acpi_ghes_memory_errors(AcpiGhesState *ags, uint16_t source_id,
     acpi_ghes_build_append_mem_cper(block, physical_address);
 
     /* Report the error */
-    ghes_record_cper_errors(ags, block->data, block->len, source_id, &errp);
+    ghes_record_cper_errors(ags, block->data, block->len, source_id, &err);
 
     g_array_free(block, true);
 
-    if (errp) {
-        error_report_err(errp);
+    if (err) {
+        error_report_err(err);
         return -1;
     }
 
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 99b843ba2f..db5e98e458 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -2847,7 +2847,7 @@ static void spapr_machine_init(MachineState *machine)
     int i;
     MemoryRegion *sysmem = get_system_memory();
     long load_limit, fw_size;
-    Error *errp = NULL;
+    Error *err = NULL;
     NICInfo *nd;
 
     if (!filename) {
@@ -2871,7 +2871,7 @@ static void spapr_machine_init(MachineState *machine)
     /* Determine capabilities to run with */
     spapr_caps_init(spapr);
 
-    kvmppc_check_papr_resize_hpt(&errp);
+    kvmppc_check_papr_resize_hpt(&err);
     if (spapr->resize_hpt == SPAPR_RESIZE_HPT_DEFAULT) {
         /*
          * If the user explicitly requested a mode we should either
@@ -2879,10 +2879,10 @@ static void spapr_machine_init(MachineState *machine)
          * it's not set explicitly, we reset our mode to something
          * that works
          */
-        if (errp) {
+        if (err) {
             spapr->resize_hpt = SPAPR_RESIZE_HPT_DISABLED;
-            error_free(errp);
-            errp = NULL;
+            error_free(err);
+            err = NULL;
         } else {
             spapr->resize_hpt = smc->resize_hpt_default;
         }
@@ -2890,14 +2890,14 @@ static void spapr_machine_init(MachineState *machine)
 
     assert(spapr->resize_hpt != SPAPR_RESIZE_HPT_DEFAULT);
 
-    if ((spapr->resize_hpt != SPAPR_RESIZE_HPT_DISABLED) && errp) {
+    if ((spapr->resize_hpt != SPAPR_RESIZE_HPT_DISABLED) && err) {
         /*
          * User requested HPT resize, but this host can't supply it.  Bail out
          */
-        error_report_err(errp);
+        error_report_err(err);
         exit(1);
     }
-    error_free(errp);
+    error_free(err);
 
     spapr->rma_size = spapr_rma_size(spapr, &error_fatal);
 
diff --git a/hw/xen/xen-pvh-common.c b/hw/xen/xen-pvh-common.c
index b93ff80c85..3e62ec09d0 100644
--- a/hw/xen/xen-pvh-common.c
+++ b/hw/xen/xen-pvh-common.c
@@ -101,7 +101,7 @@ static void xen_create_virtio_mmio_devices(XenPVHMachineState *s)
 #ifdef CONFIG_TPM
 static void xen_enable_tpm(XenPVHMachineState *s)
 {
-    Error *errp = NULL;
+    Error *err = NULL;
     DeviceState *dev;
     SysBusDevice *busdev;
 
@@ -111,8 +111,15 @@ static void xen_enable_tpm(XenPVHMachineState *s)
         return;
     }
     dev = qdev_new(TYPE_TPM_TIS_SYSBUS);
-    object_property_set_link(OBJECT(dev), "tpmdev", OBJECT(be), &errp);
-    object_property_set_str(OBJECT(dev), "tpmdev", be->id, &errp);
+    /*
+     * FIXME This use of &err is is wrong.  If both calls fail, the
+     * second will trip error_setv()'s assertion.  If just one call
+     * fails, we leak an Error object.  Setting the same property
+     * twice (first to a QOM path, then to an ID string) is almost
+     * certainly wrong, too.
+     */
+    object_property_set_link(OBJECT(dev), "tpmdev", OBJECT(be), &err);
+    object_property_set_str(OBJECT(dev), "tpmdev", be->id, &err);
     busdev = SYS_BUS_DEVICE(dev);
     sysbus_realize_and_unref(busdev, &error_fatal);
     sysbus_mmio_map(busdev, 0, s->cfg.tpm.base);
diff --git a/nbd/common.c b/nbd/common.c
index 2a133a66c3..f43cbaa15b 100644
--- a/nbd/common.c
+++ b/nbd/common.c
@@ -282,10 +282,10 @@ void nbd_set_socket_send_buffer(QIOChannelSocket *sioc)
 #ifdef UNIX_STREAM_SOCKET_SEND_BUFFER_SIZE
     if (sioc->localAddr.ss_family == AF_UNIX) {
         size_t size = UNIX_STREAM_SOCKET_SEND_BUFFER_SIZE;
-        Error *errp = NULL;
+        Error *err = NULL;
 
-        if (qio_channel_socket_set_send_buffer(sioc, size, &errp) < 0) {
-            warn_report_err(errp);
+        if (qio_channel_socket_set_send_buffer(sioc, size, &err) < 0) {
+            warn_report_err(err);
         }
     }
 #endif /* UNIX_STREAM_SOCKET_SEND_BUFFER_SIZE */
-- 
2.49.0



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Date: Wed, 19 Nov 2025 13:22:06 +0000
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH 5/5] error: Consistently name Error * objects err, and not
 errp
To: Markus Armbruster , qemu-devel@nongnu.org
Cc: kwolf@redhat.com, hreitz@redhat.com, mst@redhat.com, imammedo@redhat.com,
 anisinha@redhat.com, gengdongjiu1@gmail.com, peter.maydell@linaro.org,
 alistair@alistair23.me, edgar.iglesias@gmail.com, npiggin@gmail.com,
 harshpb@linux.ibm.com, palmer@dabbelt.com, liwei1518@gmail.com,
 dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com,
 sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
 berrange@redhat.com, peterx@redhat.com, farosas@suse.de, eblake@redhat.com,
 vsementsov@yandex-team.ru, eduardo@habkost.net, marcel.apfelbaum@gmail.com,
 philmd@linaro.org, wangyanan55@huawei.com, zhao1.liu@intel.com,
 qemu-block@nongnu.org, qemu-arm@nongnu.org, qemu-ppc@nongnu.org,
 qemu-riscv@nongnu.org, xen-devel@lists.xenproject.org
References: <20251119130855.105479-1-armbru@redhat.com>
 <20251119130855.105479-6-armbru@redhat.com>
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On 19/11/2025 1:08 pm, Markus Armbruster wrote:
> diff --git a/hw/xen/xen-pvh-common.c b/hw/xen/xen-pvh-common.c
> index b93ff80c85..3e62ec09d0 100644
> --- a/hw/xen/xen-pvh-common.c
> +++ b/hw/xen/xen-pvh-common.c
> @@ -101,7 +101,7 @@ static void xen_create_virtio_mmio_devices(XenPVHMachineState *s)
>  #ifdef CONFIG_TPM
>  static void xen_enable_tpm(XenPVHMachineState *s)
>  {
> -    Error *errp = NULL;
> +    Error *err = NULL;
>      DeviceState *dev;
>      SysBusDevice *busdev;
>  
> @@ -111,8 +111,15 @@ static void xen_enable_tpm(XenPVHMachineState *s)
>          return;
>      }
>      dev = qdev_new(TYPE_TPM_TIS_SYSBUS);
> -    object_property_set_link(OBJECT(dev), "tpmdev", OBJECT(be), &errp);
> -    object_property_set_str(OBJECT(dev), "tpmdev", be->id, &errp);
> +    /*
> +     * FIXME This use of &err is is wrong.  If both calls fail, the
> +     * second will trip error_setv()'s assertion.  If just one call
> +     * fails, we leak an Error object.  Setting the same property
> +     * twice (first to a QOM path, then to an ID string) is almost
> +     * certainly wrong, too.
> +     */
> +    object_property_set_link(OBJECT(dev), "tpmdev", OBJECT(be), &err);
> +    object_property_set_str(OBJECT(dev), "tpmdev", be->id, &err);

To your question, I don't know the answer, but I think it's far more
likely that the original author didn't grok the proper use of &errp,
than for this behaviour to be intentional.

Surely we just want a failure path and abort the construction if this
goes wrong?

~Andrew


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Date: Wed, 19 Nov 2025 13:35:32 +0000
From: Daniel =?utf-8?B?UC4gQmVycmFuZ8Op?= 
To: Andrew Cooper 
Cc: Markus Armbruster , qemu-devel@nongnu.org,
	kwolf@redhat.com, hreitz@redhat.com, mst@redhat.com,
	imammedo@redhat.com, anisinha@redhat.com, gengdongjiu1@gmail.com,
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	qemu-arm@nongnu.org, qemu-ppc@nongnu.org, qemu-riscv@nongnu.org,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH 5/5] error: Consistently name Error * objects err, and
 not errp
Message-ID: 
Reply-To: Daniel =?utf-8?B?UC4gQmVycmFuZ8Op?= 
References: <20251119130855.105479-1-armbru@redhat.com>
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 <3ffe11b9-db81-4930-aefa-e55d758645bf@citrix.com>
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On Wed, Nov 19, 2025 at 01:22:06PM +0000, Andrew Cooper wrote:
> On 19/11/2025 1:08 pm, Markus Armbruster wrote:
> > diff --git a/hw/xen/xen-pvh-common.c b/hw/xen/xen-pvh-common.c
> > index b93ff80c85..3e62ec09d0 100644
> > --- a/hw/xen/xen-pvh-common.c
> > +++ b/hw/xen/xen-pvh-common.c
> > @@ -101,7 +101,7 @@ static void xen_create_virtio_mmio_devices(XenPVHMachineState *s)
> >  #ifdef CONFIG_TPM
> >  static void xen_enable_tpm(XenPVHMachineState *s)
> >  {
> > -    Error *errp = NULL;
> > +    Error *err = NULL;
> >      DeviceState *dev;
> >      SysBusDevice *busdev;
> >  
> > @@ -111,8 +111,15 @@ static void xen_enable_tpm(XenPVHMachineState *s)
> >          return;
> >      }
> >      dev = qdev_new(TYPE_TPM_TIS_SYSBUS);
> > -    object_property_set_link(OBJECT(dev), "tpmdev", OBJECT(be), &errp);
> > -    object_property_set_str(OBJECT(dev), "tpmdev", be->id, &errp);
> > +    /*
> > +     * FIXME This use of &err is is wrong.  If both calls fail, the
> > +     * second will trip error_setv()'s assertion.  If just one call
> > +     * fails, we leak an Error object.  Setting the same property
> > +     * twice (first to a QOM path, then to an ID string) is almost
> > +     * certainly wrong, too.
> > +     */
> > +    object_property_set_link(OBJECT(dev), "tpmdev", OBJECT(be), &err);
> > +    object_property_set_str(OBJECT(dev), "tpmdev", be->id, &err);
> 
> To your question, I don't know the answer, but I think it's far more
> likely that the original author didn't grok the proper use of &errp,
> than for this behaviour to be intentional.
> 
> Surely we just want a failure path and abort the construction if this
> goes wrong?

In the caller of xen_enable_tpm, we just have error_report+exit calls,
so there's no error propagation ability in the call chain.

The caller will also skip  xen_enable_tpm unless a TPM was explicitly
requested in the config.

Given that, I'm inclined to say that the object_property_set_* calls
in xen_enable_tpm should be using &error_abort, as a failure to setup
the explicitly requested TPM should be fatal.

With regards,
Daniel
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From: "haseeb.ashraf@siemens.com" 
To: Julien Grall , "xen-devel@lists.xenproject.org"
	, Bertrand Marquis
	, Mohamed Mediouni 
CC: Stefano Stabellini , Michal Orzel
	, Volodymyr Babchuk ,
	"Driscoll, Dan" , "noor.ahsan@siemens.com"
	, "fahad.arslan@siemens.com"
	, "Bachtel, Andrew" ,
	Haseeb Ashraf 
Subject: Re: [XEN PATCH] xen/arm/p2m: perform IPA-based TLBI for arm64 when
 IPA is known
Thread-Topic: [XEN PATCH] xen/arm/p2m: perform IPA-based TLBI for arm64 when
 IPA is known
Thread-Index: AQHcTlJkrRvi9xUbREKbU/4GUfXtUrT1Vd2AgAMhG4c=
Date: Wed, 19 Nov 2025 13:47:34 +0000
Message-ID:
 
References: <20251105124727.142272-1-haseebashraf091@gmail.com>
 
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Hi Julien,

Thanks for your review.

> > The first one is addressed by relaxing VMALLS12E1IS -> VMALLE1IS.
> > Each CPU have their own private TLBs, so flush between vCPU of the
> > same domains is required to avoid translations from vCPUx to "leak"
> > to the vCPUy.
>
> This doesn't really tell me why we don't need the flush the S2. The key
> point is (barring altp2m) the stage-2 is common between all the vCPUs of
> a VM.

Alright, I'll update the commit message in version 2.

> > This can be achieved by using VMALLE1. If FEAT_nTLBPA
> > is present then VMALLE1 can also be avoided.
>
> I had a look at the Arm Arm and I can't figure out why it is fine to
> skip the flush. Can you provide a pointer? BTW, in general, it is useful
> to quote the Arm Arm for the reviewer and future reader. It makes easier
> to find what you are talking about.

Okay. This was pointed out by @Mohamed Mediouni. From Arm Arm:
> Translation table entry caching that is used for stage 1 translations and=
 is indexed by the intermediate physical
> address of the location holding the translation table entry. However, FEA=
T_nTLBPA allows software
> discoverability of whether such caches exist, such that if FEAT_nTLBPA is=
 implemented, such caching is not
> implemented.

> > +/*
> > + * FLush TLB by IPA. This will likely be used in a loop, so the caller
> > + * is responsible to use the appropriate memory barriers before/after
> > + * the sequence.
>
> If the goal is to call TLB_HELPER_IPA() in a loop, then the current
> implementation is too expensive.
>
> If the CPU doesn't need the repeat TLBI workaround, then you only need
> to do the dsb; isb once.
>
> If the CPU need the repeat TLBI workaround, looking at the Cortex A76
> errata doc (https://developer.arm.com/documentation/SDEN885749/latest/)
> then I think you might be able to do:
>
> "Flush TLBs"
> "DSB"
> "ISB"
> "Flush TLBs"
> "DSB"
> "ISB"

Yes, I did not use dsb/isb inside this helper TLB_HELPER_IPA(). That's what=
 the comment explains that the caller is responsible to call isb/dsb outsid=
e as it can be invoked in a loop. So, dsb() and isb() should be added befor=
e and after the loop where this is invoked in the loop. (I forgot isb() in =
my patch, I'll update that). And I kept the sequence with repeat TLBI worka=
round same as used in TLB_HELPER_VA() and it is also same in Linux Kernel: =
https://github.com/torvalds/linux/blob/master/arch/arm64/include/asm/tlbflu=
sh.h#L32.

> > diff --git a/xen/arch/arm/include/asm/mmu/p2m.h b/xen/arch/arm/include/=
asm/mmu/p2m.h
> > index 58496c0b09..fc2e08bbe8 100644
> > --- a/xen/arch/arm/include/asm/mmu/p2m.h
> > +++ b/xen/arch/arm/include/asm/mmu/p2m.h
> > @@ -10,6 +10,10 @@ extern unsigned int p2m_root_level;
> >
> >   struct p2m_domain;
> >   void p2m_force_tlb_flush_sync(struct p2m_domain *p2m);
> > +#ifdef CONFIG_ARM_64
>
> We should also handle Arm 32-bit. Barring nTLBA, the code should be the
> same.

Okay, nTLBPA feature is also available on Arm 32-bit. I'll update this.

> > diff --git a/xen/arch/arm/mmu/p2m.c b/xen/arch/arm/mmu/p2m.c
> > index 51abf3504f..28268fb67f 100644
> > --- a/xen/arch/arm/mmu/p2m.c
> > +++ b/xen/arch/arm/mmu/p2m.c
> > @@ -235,7 +235,12 @@ void p2m_restore_state(struct vcpu *n)
> >        * when running multiple vCPU of the same domain on a single pCPU=
.
> >        */
> >       if ( *last_vcpu_ran !=3D INVALID_VCPU_ID && *last_vcpu_ran !=3D n=
->vcpu_id )
> > +#ifdef CONFIG_ARM_64
> > +        if ( system_cpuinfo.mm64.ntlbpa !=3D MM64_NTLBPA_SUPPORT_IMP )
>
> If we decide to use nTLBA, then we should introduce a capability so the
> check can be patched at aboot time.

Alright, I need to go through how a CPU capability is added in Xen. Any com=
mit I can use as reference?

> > +        /*
> > +         * ARM64_WORKAROUND_AT_SPECULATE: We need to stop AT to alloca=
te
> > +         * TLBs entries because the context is partially modified. We
> > +         * only need the VMID for flushing the TLBs, so we can generat=
e
> > +         * a new VTTBR with the VMID to flush and the empty root table=
.
> > +         */
> > +        if ( !cpus_have_const_cap(ARM64_WORKAROUND_AT_SPECULATE) )
> > +            vttbr =3D p2m->vttbr;
> > +        else
> > +            vttbr =3D generate_vttbr(p2m->vmid, empty_root_mfn);
> > +
> > +        WRITE_SYSREG64(vttbr, VTTBR_EL2);
> > +
> > +        /* Ensure VTTBR_EL2 is synchronized before flushing the TLBs *=
/
> > +        isb();
> > +    }
>
> I don't really like the idea to duplicate the AT speculation logic.
> Could we try to consolidate by introducing helper to load and unload the
> VTTBR?

Okay, I'll create helpers for load_vttbr() and restore_vttbr().

> > +
> > +    /* Ensure prior page-tables updates have completed */
> > +    dsb(ishst);
> > +
> > +    /* Invalidate stage-2 TLB entries by IPA range */
> > +    for ( i =3D 0; i < page_count; i++ ) {
> > +        flush_guest_tlb_one_s2(ipa);
> > +        ipa +=3D 1UL << PAGE_SHIFT;
> > +    }
>
> In theory, __p2m_set_entry() could modify large region. For 1GB region
> it means the loop would send 262144 TLB instructions. This seems quite a
> lot.
>
> If the region is a superpage, then you might be able to send a single
> TLB instruction (need to confirm from the ARM ARM).
>
> If the region contains multiple mapping, then I wonder whether it would
> be better to flush the full S2. Not sure what would be the threshold.

__p2m_set_entry() invokes p2m_force_tlb_flush_range_sync() only after split=
ting the superpage. Therefore, I think it would require invalidating w.r.t.=
 normal page size. IPAS2E1 does not have any input argument to specify supe=
rpage size, only base address and translation granules of 4K, 16K and 64K.
I'll do some profiling and let you know of threshold for full S2 invalidati=
on vs IPA-based S2-invalidation in my use-case.

> > @@ -1090,8 +1169,13 @@ static int __p2m_set_entry(struct p2m_domain *p2=
m,
> >           p2m_remove_pte(entry, p2m->clean_pte);
> >
> >       if ( removing_mapping )
> > +#ifdef CONFIG_ARM_64
> > +        p2m_force_tlb_flush_range_sync(p2m, gfn_x(sgfn) << PAGE_SHIFT,
> > +                                       1UL << page_order);
> > +#else
> >           /* Flush can be deferred if the entry is removed */
> >           p2m->need_flush |=3D !!lpae_is_valid(orig_pte);
> > +#endif
>
> To emphasis on what I wrote above, this is one of the reason I would
> strongly prefer if we had support for p2m_force_flush_range_sync() on
> Arm 32-bit. This would make the code a lot simpler and easier to reason.

IPA-based TLBI (TLBIIPAS2) exists for Arm 32-bit only after armv8a.
For simplification, we can wrap p2m_force_tlb_flush_sync() in p2m_force_tlb=
_flush_range_sync() for Arm 32-bit for older architectures where this is un=
supported. How an architecture-specific feature is implemented? like this o=
ne is supported only after armv8a and range TLBI is supported only after ar=
mv8.4a. Any reference example would be helpful.

Regards,
Haseeb

--_000_KL1PR0601MB45885BEB1C85C8AAFDD062CFE6D6AKL1PR0601MB4588_
Content-Type: text/html; charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable









Hi Julien,









Thanks for your review.









> > The first one is addressed by relaxing VMALLS12E1IS -> VMALLE1=
IS.

> > Each CPU have their own private TLBs, so flush between vCPU of th=
e

> > same domains is required to avoid translations from vCPUx to &quo=
t;leak"

> > to the vCPUy.

>

> This doesn't really tell me why we don't need the flush the S2. The ke=
y

> point is (barring altp2m) the stage-2 is common between all the vCPUs =
of

> a VM.









Alright, I'll update the commit message in version 2.









> > This can be achieved by using VMALLE1. If FEAT_nTLBPA

> > is present then VMALLE1 can also be avoided.

> 

> I had a look at the Arm Arm and I can't figure out why it is fine to
> skip the flush. Can you provide a pointer? BTW, in general, it is usef=
ul

> to quote the Arm Arm for the reviewer and future reader. It makes easi=
er

> to find what you are talking about.









Okay. This was pointed out by 
@Mohamed Mediouni. From Arm Arm:



> Translation table entry caching that is used for stage 1 translations =
and is indexed by the intermediate physical



> address of the location holding the translation table entry. However, =
FEAT_nTLBPA allows software



> discoverability of whether such caches exist, such that if FEAT_nTLBPA=
 is implemented, such caching is not



> implemented.









> > +/*

> > + * FLush TLB by IPA. This will likely be used in a loop, so the =
caller

> > + * is responsible to use the appropriate memory barriers before/=
after

> > + * the sequence.

> 

> If the goal is to call TLB_HELPER_IPA() in a loop, then the current
> implementation is too expensive.

> 

> If the CPU doesn't need the repeat TLBI workaround, then you only need=


> to do the dsb; isb once.

> 

> If the CPU need the repeat TLBI workaround, looking at the Cortex A76<=
/div>


> errata doc (https://developer.arm.com/documentation/=
SDEN885749/latest/)



> then I think you might be able to do:

> 

> "Flush TLBs"

> "DSB"

> "ISB"

> "Flush TLBs"

> "DSB"

> "ISB"









Yes, I did not use dsb/isb inside this helper TLB_HELPER_IPA(). That's what=
 the comment explains that the caller is responsible to call isb/dsb outsid=
e as it can be invoked in a loop. So, dsb() and isb() should be added befor=
e and after the loop where this
 is invoked in the loop. (I forgot isb() in my patch, I'll update that). An=
d I kept the sequence with repeat TLBI workaround same as used in TLB_HELPE=
R_VA() and it is also same in Linux Kernel:

https://github.com/torvalds/linux/blob/master/arch/arm64/include/asm/tlbflu=
sh.h#L32.









> > diff --git a/xen/arch/arm/include/asm/mmu/p2m.h b/xen/arch/arm/in=
clude/asm/mmu/p2m.h

> > index 58496c0b09..fc2e08bbe8 100644

> > --- a/xen/arch/arm/include/asm/mmu/p2m.h

> > +++ b/xen/arch/arm/include/asm/mmu/p2m.h

> > @@ -10,6 +10,10 @@ extern unsigned int p2m_root_level;

> >  

> >   struct p2m_domain;

> >   void p2m_force_tlb_flush_sync(struct p2m_domain *p2m)=
;

> > +#ifdef CONFIG_ARM_64

> 

> We should also handle Arm 32-bit. Barring nTLBA, the code should be th=
e

> same.









Okay, nTLBPA feature is also available on Arm 32-bit. I'll update this.








> > diff --git a/xen/arch/arm/mmu/p2m.c b/xen/arch/arm/mmu/p2m.c

> > index 51abf3504f..28268fb67f 100644

> > --- a/xen/arch/arm/mmu/p2m.c

> > +++ b/xen/arch/arm/mmu/p2m.c

> > @@ -235,7 +235,12 @@ void p2m_restore_state(struct vcpu *n)

> >        * when running multiple=
 vCPU of the same domain on a single pCPU.

> >        */

> >       if ( *last_vcpu_ran !=3D INVA=
LID_VCPU_ID && *last_vcpu_ran !=3D n->vcpu_id )

> > +#ifdef CONFIG_ARM_64

> > +        if ( system_cpuinfo.m=
m64.ntlbpa !=3D MM64_NTLBPA_SUPPORT_IMP )

> 

> If we decide to use nTLBA, then we should introduce a capability so th=
e

> check can be patched at aboot time.









Alright, I need to go through how a CPU capability is added in Xen. Any com=
mit I can use as reference?









> > +        /*

> > +         * ARM64_WORKARO=
UND_AT_SPECULATE: We need to stop AT to allocate

> > +         * TLBs entries =
because the context is partially modified. We

> > +         * only need the=
 VMID for flushing the TLBs, so we can generate

> > +         * a new VTTBR w=
ith the VMID to flush and the empty root table.

> > +         */

> > +        if ( !cpus_have_const=
_cap(ARM64_WORKAROUND_AT_SPECULATE) )

> > +          &nbs=
p; vttbr =3D p2m->vttbr;

> > +        else

> > +          &nbs=
p; vttbr =3D generate_vttbr(p2m->vmid, empty_root_mfn);

> > +

> > +        WRITE_SYSREG64(vttbr,=
 VTTBR_EL2);

> > +

> > +        /* Ensure VTTBR_EL2 i=
s synchronized before flushing the TLBs */

> > +        isb();

> > +    }

> 

> I don't really like the idea to duplicate the AT speculation logic.
> Could we try to consolidate by introducing helper to load and unload t=
he

> VTTBR?









Okay, I'll create helpers for load_vttbr() and restore_vttbr().









> > +

> > +    /* Ensure prior page-tables updates have comp=
leted */

> > +    dsb(ishst);

> > +

> > +    /* Invalidate stage-2 TLB entries by IPA rang=
e */

> > +    for ( i =3D 0; i < page_count; i++ ) {

> > +        flush_guest_tlb_one_s=
2(ipa);

> > +        ipa +=3D 1UL <<=
 PAGE_SHIFT;

> > +    }

> 

> In theory, __p2m_set_entry() could modify large region. For =
1GB region

> it means the loop would send 262144 TLB instructions. This seems quite=
 a

> lot.

> 

> If the region is a superpage, then you might be able to send a single<=
br>
> TLB instruction (need to confirm from the ARM ARM).

> 

> If the region contains multiple mapping, then I wonder whether it woul=
d

> be better to flush the full S2. Not sure what would be the threshold.<=
br>






__p2m_set_entry() invokes p2m_force_tlb_flush_range_sync() only after split=
ting the superpage. Therefore, I think it would require invalidating w=
.r.t. normal page size. IPAS2E1 does not have any input argument to specify=
 superpage size, only base address and
 translation granules of 4K, 16K and 64K.



I'll do some profiling and let you know of threshold for full S2 invalidati=
on vs IPA-based S2-invalidation in my use-case.









> > @@ -1090,8 +1169,13 @@ static int __p2m_set_entry(struct p2m_doma=
in *p2m,

> >           p2m_r=
emove_pte(entry, p2m->clean_pte);

> >  

> >       if ( removing_mapping )

> > +#ifdef CONFIG_ARM_64

> > +        p2m_force_tlb_flush_r=
ange_sync(p2m, gfn_x(sgfn) << PAGE_SHIFT,

> > +          &nbs=
p;            &=
nbsp;           &nbs=
p;   1UL << page_order);

> > +#else

> >           /* Fl=
ush can be deferred if the entry is removed */

> >           p2m-&=
gt;need_flush |=3D !!lpae_is_valid(orig_pte);

> > +#endif

> 

> To emphasis on what I wrote above, this is one of the reason I would
> strongly prefer if we had support for p2m_force_flush_range_sync() on<=
br>
> Arm 32-bit. This would make the code a lot simpler and easier to reaso=
n.









IPA-based TLBI (TLBIIPAS2) exists for Arm 32-bit only after armv8a.



For simplification, we can wrap p2m_force_tlb_flush_sync() in p2m_force_tlb=
_flush_range_sync() for Arm 32-bit for older architectures where this is un=
supported. How an architecture-specific feature is implemented? like this o=
ne is supported only after armv8a
 and range TLBI is supported only after armv8.4a. Any reference example wou=
ld be helpful.









Regards,



Haseeb




--_000_KL1PR0601MB45885BEB1C85C8AAFDD062CFE6D6AKL1PR0601MB4588_--


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From: Markus Armbruster 
To: Daniel P. =?utf-8?Q?Berrang=C3=A9?= 
Cc: Andrew Cooper ,  qemu-devel@nongnu.org,
  kwolf@redhat.com,  hreitz@redhat.com,  mst@redhat.com,
  imammedo@redhat.com,  anisinha@redhat.com,  gengdongjiu1@gmail.com,
  peter.maydell@linaro.org,  alistair@alistair23.me,
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  palmer@dabbelt.com,  liwei1518@gmail.com,  dbarboza@ventanamicro.com,
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  xen-devel@lists.xenproject.org
Subject: Re: [PATCH 5/5] error: Consistently name Error * objects err, and
 not errp
In-Reply-To:  ("Daniel P. =?utf-8?Q?Berrang?=
 =?utf-8?Q?=C3=A9=22's?= message of
	"Wed, 19 Nov 2025 13:35:32 +0000")
References: <20251119130855.105479-1-armbru@redhat.com>
	<20251119130855.105479-6-armbru@redhat.com>
	<3ffe11b9-db81-4930-aefa-e55d758645bf@citrix.com>
	
Date: Wed, 19 Nov 2025 14:48:11 +0100
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Daniel P. Berrang=C3=A9  writes:

> On Wed, Nov 19, 2025 at 01:22:06PM +0000, Andrew Cooper wrote:
>> On 19/11/2025 1:08 pm, Markus Armbruster wrote:
>> > diff --git a/hw/xen/xen-pvh-common.c b/hw/xen/xen-pvh-common.c
>> > index b93ff80c85..3e62ec09d0 100644
>> > --- a/hw/xen/xen-pvh-common.c
>> > +++ b/hw/xen/xen-pvh-common.c
>> > @@ -101,7 +101,7 @@ static void xen_create_virtio_mmio_devices(XenPVHM=
achineState *s)
>> >  #ifdef CONFIG_TPM
>> >  static void xen_enable_tpm(XenPVHMachineState *s)
>> >  {
>> > -    Error *errp =3D NULL;
>> > +    Error *err =3D NULL;
>> >      DeviceState *dev;
>> >      SysBusDevice *busdev;
>> >=20=20
>> > @@ -111,8 +111,15 @@ static void xen_enable_tpm(XenPVHMachineState *s)
>> >          return;
>> >      }
>> >      dev =3D qdev_new(TYPE_TPM_TIS_SYSBUS);
>> > -    object_property_set_link(OBJECT(dev), "tpmdev", OBJECT(be), &errp=
);
>> > -    object_property_set_str(OBJECT(dev), "tpmdev", be->id, &errp);
>> > +    /*
>> > +     * FIXME This use of &err is is wrong.  If both calls fail, the
>> > +     * second will trip error_setv()'s assertion.  If just one call
>> > +     * fails, we leak an Error object.  Setting the same property
>> > +     * twice (first to a QOM path, then to an ID string) is almost
>> > +     * certainly wrong, too.
>> > +     */
>> > +    object_property_set_link(OBJECT(dev), "tpmdev", OBJECT(be), &err);
>> > +    object_property_set_str(OBJECT(dev), "tpmdev", be->id, &err);
>>=20
>> To your question, I don't know the answer, but I think it's far more
>> likely that the original author didn't grok the proper use of &errp,
>> than for this behaviour to be intentional.
>>=20
>> Surely we just want a failure path and abort the construction if this
>> goes wrong?
>
> In the caller of xen_enable_tpm, we just have error_report+exit calls,
> so there's no error propagation ability in the call chain.
>
> The caller will also skip  xen_enable_tpm unless a TPM was explicitly
> requested in the config.
>
> Given that, I'm inclined to say that the object_property_set_* calls
> in xen_enable_tpm should be using &error_abort, as a failure to setup
> the explicitly requested TPM should be fatal.

I *suspect* that the first call always fails, and the second one always
works.  If that's the case, the fix is to delete the first call, and
pass &error_abort to the second.



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Subject: Re: [PATCH v2.1 5/5] x86/ioapic: Don't open-code 32-bits rte reads
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 19.11.2025 12:02, Teddy Astie wrote:
> There are many places where we use interesting ways of reading 32-bits
> components of the RTE. Introduce and use low and high components directly
> to the rte structure instead.
> 
> Also take the opportunity to simplify "x & 1 ? 1 : 0".
> 
> Signed-off-by: Teddy Astie 
> Acked-by: Jan Beulich 
> ---
> v2.1:
>  - fix trailing spaces

You did notice v2 was committed already, didn't you? I suppose that's what
made Andrew notice the style issue.

Jan


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Date: Wed, 19 Nov 2025 16:06:59 +0100
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Frediano Ziglio 
Cc: Andrew Cooper ,
	Oleksii Kurochko ,
	Frediano Ziglio ,
	xen-devel@lists.xenproject.org,
	Frediano Ziglio ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich , Julien Grall ,
	Roger Pau =?utf-8?B?TW9ubsOp?= ,
	Stefano Stabellini ,
	Demi Marie Obenour ,
	Stewart Hildebrand 
Subject: Re: [PATCH v8] xen: Strip xen.efi by default
Message-ID: 
References: <20251113154358.28704-1-frediano.ziglio@citrix.com>
 <6729f3d9-618c-4dcd-93f8-d02ca7cea017@gmail.com>
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Date: Wed, 19 Nov 2025 16:06:59 +0100
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Frediano Ziglio 
Cc: Andrew Cooper ,
	Oleksii Kurochko ,
	Frediano Ziglio ,
	xen-devel@lists.xenproject.org,
	Frediano Ziglio ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich , Julien Grall ,
	Roger Pau =?utf-8?B?TW9ubsOp?= ,
	Stefano Stabellini ,
	Demi Marie Obenour ,
	Stewart Hildebrand 
Subject: Re: [PATCH v8] xen: Strip xen.efi by default

On Sat, Nov 15, 2025 at 06:23:08AM +0000, Frediano Ziglio wrote:
> On Fri, 14 Nov 2025 at 19:18, Andrew Cooper  w=
rote:
> >
> > On 14/11/2025 3:40 pm, Oleksii Kurochko wrote:
> > >
> > >
> > > On 11/13/25 4:43 PM, Frediano Ziglio wrote:
> > >> From: Frediano Ziglio 
> > >>
> > >> For xen.gz file we strip all symbols and have an additional
> > >> xen-syms.efi file version with all symbols.
> > >> Make xen.efi more coherent stripping all symbols too.
> > >> xen-syms.efi can be used for debugging.
> > >>
> > >> Signed-off-by: Frediano Ziglio 
> > > Release-Acked-By: Oleksii Kurochko 
> > >
> > > Thanks.
> >
> > Thanks.  Unfortunately CI says no.
> >
> > Ubuntu's 20.04, 18.04 and 16.04 all fail:
> > https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2159622=
869
> >
> > From 16.04:
> >
> > 2025-11-14T18:01:51.192964Z 01O strip xen-syms.efi -o xen.efi
> > 2025-11-14T18:01:51.198151Z 01O strip:xen-syms.efi[.init]: relocation c=
ount is negative: File truncated
> > 2025-11-14T18:01:51.198166Z 01O strip: xen.efi: Failed to read debug da=
ta section
> > 2025-11-14T18:01:51.198169Z 01O strip:xen.efi: error copying private BF=
D data: File truncated
> > 2025-11-14T18:01:51.198932Z 01O arch/x86/Makefile:207: recipe for targe=
t 'xen.efi' failed
> > 2025-11-14T18:01:51.198937Z 01O make[3]: *** [xen.efi] Error 1
> > 2025-11-14T18:01:51.199616Z 01O build.mk:90: recipe for target 'xen' fa=
iled
> > 2025-11-14T18:01:51.199619Z 01O make[2]: *** [xen] Error 2
> > 2025-11-14T18:01:51.200402Z 01O Makefile:600: recipe for target 'xen' f=
ailed
> > 2025-11-14T18:01:51.200409Z 01O make[1]: *** [xen] Error 2
> >
> >
> > I find it hard to believe that the relocation count is really negative,
> > and given that newer binuitls works, I expect this is a binutils bug.
> >
>=20
> Unless the message is just misleading I find it hard to have a
> negative number of items in a container.
>=20
> > Nevertheless, we need some workaround.  Given that the previous
> > behaviour was not to strip, I think we can reuse that for broken toolch=
ains?
> >
>=20
> Something like that ?
>=20
> diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
> index a154ffe6b2..c465eb12e2 100644
> --- a/xen/arch/x86/Makefile
> +++ b/xen/arch/x86/Makefile
> @@ -236,7 +236,9 @@ ifeq ($(CONFIG_DEBUG_INFO),y)
>         $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) \
>                 -O elf64-x86-64 $(TARGET)-syms.efi $@.elf
>  endif
> -       $(STRIP) $(TARGET)-syms.efi -o $@
> +       $(STRIP) $(TARGET)-syms.efi -o $@ || { \
> +               LANG=3DC strip $(TARGET)-syms.efi -o $@ 2>&1 | grep -q \
> +               "relocation count is negative" && mv -f $(TARGET)-syms.ef=
i $@; }
>  ifneq ($(CONFIG_DEBUG_INFO),y)
>         rm -f $(TARGET)-syms.efi
>  endif

On Ubuntu 20.04 it fails different way:

    strip: xen.efi: Data Directory size (1c) exceeds space left in section =
(18)
    strip: xen.efi: error copying private BFD data: file in wrong format

Looks similar to:
https://lore.kernel.org/all/3TMd7J2u5gCA8ouIG_Xfcw7s5JKMG06XsDIesEB3Fi9htUJ=
43Lfl057wXohlpCHcszqoCmicpIlneEDO26ZqT8QfC2Y39VxBuqD3nS1j5Q4=3D@trmm.net/

Qubes has this patch:
https://github.com/QubesOS/qubes-vmm-xen/blob/main/0608-Fix-buildid-alignme=
nt.patch

    diff --git a/xen/arch/x86/xen.lds.S b/xen/arch/x86/xen.lds.S
    index 9a1dfe1b340a..26a23a7b0651 100644
    --- a/xen/arch/x86/xen.lds.S
    +++ b/xen/arch/x86/xen.lds.S
    @@ -171,6 +171,7 @@ SECTIONS
            __note_gnu_build_id_end =3D .;
       } PHDR(note) PHDR(text)
     #elif defined(BUILD_ID_EFI)
    +  . =3D ALIGN(32);
       DECL_SECTION(.buildid) {
            __note_gnu_build_id_start =3D .;
            *(.buildid)

Lets see if that helps:
https://gitlab.com/xen-project/people/marmarek/xen/-/pipelines/2167783980

And few lines earlier there is also:

    ld: xen-syms.efi: warning: section .init: alignment 2**15 not represent=
able

> It will fall back to not stripping in case that bug is detected. I
> don't know how to test it.
> (the LANG=3DC is to always force the English message).

If going this way, use LC_ALL=3DC (otherwise LC_ALL=3Dsomething present in
the env would override your LANG=3DC). But given there are different
messages, this may not be the best option.

And TBH, I don't like silent behavior change based on (unknown) version
of binutils. Lets see if the alignment adjustment helps. While it
shouldn't be necessary on newer binutils (thanks to Jan's fix there -
see thread linked above), IMO it isn't too bad to add it, to keep older
versions happy. And it can be dropped, once we raise toolchain base
version next time.

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Date: Wed, 19 Nov 2025 16:02:30 +0000
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Subject: Re: [PATCH v8] xen: Strip xen.efi by default
To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 , Frediano Ziglio 
Cc: Oleksii Kurochko ,
 Frediano Ziglio ,
 xen-devel@lists.xenproject.org, Frediano Ziglio ,
 Anthony PERARD ,
 Michal Orzel , Jan Beulich ,
 Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Stefano Stabellini ,
 Demi Marie Obenour ,
 Stewart Hildebrand 
References: <20251113154358.28704-1-frediano.ziglio@citrix.com>
 <6729f3d9-618c-4dcd-93f8-d02ca7cea017@gmail.com>
 <8f8a769d-95ea-4554-8ee0-d6247f583e37@citrix.com>
 
 
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On 19/11/2025 3:06 pm, Marek Marczykowski-Górecki wrote:
> On Sat, Nov 15, 2025 at 06:23:08AM +0000, Frediano Ziglio wrote:
>> On Fri, 14 Nov 2025 at 19:18, Andrew Cooper  wrote:
>>> On 14/11/2025 3:40 pm, Oleksii Kurochko wrote:
>>>>
>>>> On 11/13/25 4:43 PM, Frediano Ziglio wrote:
>>>>> From: Frediano Ziglio 
>>>>>
>>>>> For xen.gz file we strip all symbols and have an additional
>>>>> xen-syms.efi file version with all symbols.
>>>>> Make xen.efi more coherent stripping all symbols too.
>>>>> xen-syms.efi can be used for debugging.
>>>>>
>>>>> Signed-off-by: Frediano Ziglio 
>>>> Release-Acked-By: Oleksii Kurochko 
>>>>
>>>> Thanks.
>>> Thanks.  Unfortunately CI says no.
>>>
>>> Ubuntu's 20.04, 18.04 and 16.04 all fail:
>>> https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2159622869
>>>
>>> From 16.04:
>>>
>>> 2025-11-14T18:01:51.192964Z 01O strip xen-syms.efi -o xen.efi
>>> 2025-11-14T18:01:51.198151Z 01O strip:xen-syms.efi[.init]: relocation count is negative: File truncated
>>> 2025-11-14T18:01:51.198166Z 01O strip: xen.efi: Failed to read debug data section
>>> 2025-11-14T18:01:51.198169Z 01O strip:xen.efi: error copying private BFD data: File truncated
>>> 2025-11-14T18:01:51.198932Z 01O arch/x86/Makefile:207: recipe for target 'xen.efi' failed
>>> 2025-11-14T18:01:51.198937Z 01O make[3]: *** [xen.efi] Error 1
>>> 2025-11-14T18:01:51.199616Z 01O build.mk:90: recipe for target 'xen' failed
>>> 2025-11-14T18:01:51.199619Z 01O make[2]: *** [xen] Error 2
>>> 2025-11-14T18:01:51.200402Z 01O Makefile:600: recipe for target 'xen' failed
>>> 2025-11-14T18:01:51.200409Z 01O make[1]: *** [xen] Error 2
>>>
>>>
>>> I find it hard to believe that the relocation count is really negative,
>>> and given that newer binuitls works, I expect this is a binutils bug.
>>>
>> Unless the message is just misleading I find it hard to have a
>> negative number of items in a container.
>>
>>> Nevertheless, we need some workaround.  Given that the previous
>>> behaviour was not to strip, I think we can reuse that for broken toolchains?
>>>
>> Something like that ?
>>
>> diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
>> index a154ffe6b2..c465eb12e2 100644
>> --- a/xen/arch/x86/Makefile
>> +++ b/xen/arch/x86/Makefile
>> @@ -236,7 +236,9 @@ ifeq ($(CONFIG_DEBUG_INFO),y)
>>         $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) \
>>                 -O elf64-x86-64 $(TARGET)-syms.efi $@.elf
>>  endif
>> -       $(STRIP) $(TARGET)-syms.efi -o $@
>> +       $(STRIP) $(TARGET)-syms.efi -o $@ || { \
>> +               LANG=C strip $(TARGET)-syms.efi -o $@ 2>&1 | grep -q \
>> +               "relocation count is negative" && mv -f $(TARGET)-syms.efi $@; }
>>  ifneq ($(CONFIG_DEBUG_INFO),y)
>>         rm -f $(TARGET)-syms.efi
>>  endif
> On Ubuntu 20.04 it fails different way:
>
>     strip: xen.efi: Data Directory size (1c) exceeds space left in section (18)
>     strip: xen.efi: error copying private BFD data: file in wrong format
>
> Looks similar to:
> https://lore.kernel.org/all/3TMd7J2u5gCA8ouIG_Xfcw7s5JKMG06XsDIesEB3Fi9htUJ43Lfl057wXohlpCHcszqoCmicpIlneEDO26ZqT8QfC2Y39VxBuqD3nS1j5Q4=@trmm.net/
>
> Qubes has this patch:
> https://github.com/QubesOS/qubes-vmm-xen/blob/main/0608-Fix-buildid-alignment.patch
>
>     diff --git a/xen/arch/x86/xen.lds.S b/xen/arch/x86/xen.lds.S
>     index 9a1dfe1b340a..26a23a7b0651 100644
>     --- a/xen/arch/x86/xen.lds.S
>     +++ b/xen/arch/x86/xen.lds.S
>     @@ -171,6 +171,7 @@ SECTIONS
>             __note_gnu_build_id_end = .;
>        } PHDR(note) PHDR(text)
>      #elif defined(BUILD_ID_EFI)
>     +  . = ALIGN(32);
>        DECL_SECTION(.buildid) {
>             __note_gnu_build_id_start = .;
>             *(.buildid)
>
> Lets see if that helps:
> https://gitlab.com/xen-project/people/marmarek/xen/-/pipelines/2167783980

That seems to have fixed 20.04 and 18.04.

The extra line wants a comment at least identifying roughly which
binutils it's a workaround for, so we can drop it eventually.

And, as it's already in a downstream, it should be upstreamed and
backported.

>
> And few lines earlier there is also:
>
>     ld: xen-syms.efi: warning: section .init: alignment 2**15 not representable

This can't be helped.  It's not an error, but you also cant get LD to
shut up about it.

>
>> It will fall back to not stripping in case that bug is detected. I
>> don't know how to test it.
>> (the LANG=C is to always force the English message).
> If going this way, use LC_ALL=C (otherwise LC_ALL=something present in
> the env would override your LANG=C). But given there are different
> messages, this may not be the best option.
>
> And TBH, I don't like silent behavior change based on (unknown) version
> of binutils. Lets see if the alignment adjustment helps. While it
> shouldn't be necessary on newer binutils (thanks to Jan's fix there -
> see thread linked above), IMO it isn't too bad to add it, to keep older
> versions happy. And it can be dropped, once we raise toolchain base
> version next time.

Given it's now only 16.04 broken, how about simply excluding xen.efi
with these broken toolchains?

~Andrew


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Date: Wed, 19 Nov 2025 19:34:26 +0300
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH 1/5] hw/core/loader: Make load_elf_hdr() return bool,
 simplify caller
To: Markus Armbruster , qemu-devel@nongnu.org
Cc: kwolf@redhat.com, hreitz@redhat.com, mst@redhat.com, imammedo@redhat.com,
 anisinha@redhat.com, gengdongjiu1@gmail.com, peter.maydell@linaro.org,
 alistair@alistair23.me, edgar.iglesias@gmail.com, npiggin@gmail.com,
 harshpb@linux.ibm.com, palmer@dabbelt.com, liwei1518@gmail.com,
 dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com,
 sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
 berrange@redhat.com, peterx@redhat.com, farosas@suse.de, eblake@redhat.com,
 eduardo@habkost.net, marcel.apfelbaum@gmail.com, philmd@linaro.org,
 wangyanan55@huawei.com, zhao1.liu@intel.com, qemu-block@nongnu.org,
 qemu-arm@nongnu.org, qemu-ppc@nongnu.org, qemu-riscv@nongnu.org,
 xen-devel@lists.xenproject.org
References: <20251119130855.105479-1-armbru@redhat.com>
 <20251119130855.105479-2-armbru@redhat.com>
Content-Language: en-US
From: Vladimir Sementsov-Ogievskiy 
In-Reply-To: <20251119130855.105479-2-armbru@redhat.com>
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: 7bit

On 19.11.25 16:08, Markus Armbruster wrote:
> Signed-off-by: Markus Armbruster 

Reviewed-by: Vladimir Sementsov-Ogievskiy 

> ---
>   include/hw/loader.h |  4 +++-
>   hw/arm/boot.c       |  6 +-----
>   hw/core/loader.c    |  8 ++++++--
>   hw/riscv/spike.c    | 10 +---------
>   4 files changed, 11 insertions(+), 17 deletions(-)
> 
> diff --git a/include/hw/loader.h b/include/hw/loader.h
> index d035e72748..6f91703503 100644
> --- a/include/hw/loader.h
> +++ b/include/hw/loader.h
> @@ -188,8 +188,10 @@ ssize_t load_elf(const char *filename,
>    *
>    * Inspect an ELF file's header. Read its full header contents into a
>    * buffer and/or determine if the ELF is 64bit.
> + *
> + * Returns true on success, false on failure.

I don't really care, but IMO, it's obvious contract for bool+errp functions, not worth a comment.

>    */
> -void load_elf_hdr(const char *filename, void *hdr, bool *is64, Error **errp);
> +bool load_elf_hdr(const char *filename, void *hdr, bool *is64, Error **errp);
>   
>   ssize_t load_aout(const char *filename, hwaddr addr, int max_sz,
>                     bool big_endian, hwaddr target_page_size);

-- 
Best regards,
Vladimir


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Subject: Re: [PATCH 2/5] hw/nvram/xlnx-bbram: More idiomatic and simpler error
 reporting
To: Markus Armbruster , qemu-devel@nongnu.org
Cc: kwolf@redhat.com, hreitz@redhat.com, mst@redhat.com, imammedo@redhat.com,
 anisinha@redhat.com, gengdongjiu1@gmail.com, peter.maydell@linaro.org,
 alistair@alistair23.me, edgar.iglesias@gmail.com, npiggin@gmail.com,
 harshpb@linux.ibm.com, palmer@dabbelt.com, liwei1518@gmail.com,
 dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com,
 sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
 berrange@redhat.com, peterx@redhat.com, farosas@suse.de, eblake@redhat.com,
 eduardo@habkost.net, marcel.apfelbaum@gmail.com, philmd@linaro.org,
 wangyanan55@huawei.com, zhao1.liu@intel.com, qemu-block@nongnu.org,
 qemu-arm@nongnu.org, qemu-ppc@nongnu.org, qemu-riscv@nongnu.org,
 xen-devel@lists.xenproject.org
References: <20251119130855.105479-1-armbru@redhat.com>
 <20251119130855.105479-3-armbru@redhat.com>
Content-Language: en-US
From: Vladimir Sementsov-Ogievskiy 
In-Reply-To: <20251119130855.105479-3-armbru@redhat.com>
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: 7bit

On 19.11.25 16:08, Markus Armbruster wrote:
> bbram_bdrv_error() interpolates a "detail" string into a template with
> error_setg_errno(), then reports the result with error_report().
> Produces error messages with an unwanted '.':
> 
>      BLK-NAME: BBRAM backstore DETAIL failed.: STERROR
> 
> Replace both calls of bbram_bdrv_error() by straightforward
> error_report(), and drop the function.  This is less code, easier to
> read, and the error message is more greppable.
> 
> Also delete the unwanted '.'.

Also, using "errp" name for local "Error *" (one star) variable is a bit misleading.

> 
> Signed-off-by: Markus Armbruster 

Reviewed-by: Vladimir Sementsov-Ogievskiy 

> ---
>   hw/nvram/xlnx-bbram.c | 18 ++++--------------
>   1 file changed, 4 insertions(+), 14 deletions(-)
> 
> diff --git a/hw/nvram/xlnx-bbram.c b/hw/nvram/xlnx-bbram.c
> index 22aefbc240..fe289bad9d 100644
> --- a/hw/nvram/xlnx-bbram.c
> +++ b/hw/nvram/xlnx-bbram.c
> @@ -88,18 +88,6 @@ static bool bbram_pgm_enabled(XlnxBBRam *s)
>       return ARRAY_FIELD_EX32(s->regs, BBRAM_STATUS, PGM_MODE) != 0;
>   }
>   
> -static void bbram_bdrv_error(XlnxBBRam *s, int rc, gchar *detail)
> -{
> -    Error *errp = NULL;
> -
> -    error_setg_errno(&errp, -rc, "%s: BBRAM backstore %s failed.",
> -                     blk_name(s->blk), detail);
> -    error_report("%s", error_get_pretty(errp));
> -    error_free(errp);
> -
> -    g_free(detail);
> -}
> -
>   static void bbram_bdrv_read(XlnxBBRam *s, Error **errp)
>   {
>       uint32_t *ram = &s->regs[R_BBRAM_0];
> @@ -162,7 +150,8 @@ static void bbram_bdrv_sync(XlnxBBRam *s, uint64_t hwaddr)
>       offset = hwaddr - A_BBRAM_0;
>       rc = blk_pwrite(s->blk, offset, 4, &le32, 0);
>       if (rc < 0) {
> -        bbram_bdrv_error(s, rc, g_strdup_printf("write to offset %u", offset));
> +        error_report("%s: BBRAM backstore write to offset %u failed: %s",
> +                     blk_name(s->blk), offset, strerror(-rc));
>       }
>   }
>   
> @@ -178,7 +167,8 @@ static void bbram_bdrv_zero(XlnxBBRam *s)
>   
>       rc = blk_make_zero(s->blk, 0);
>       if (rc < 0) {
> -        bbram_bdrv_error(s, rc, g_strdup("zeroizing"));
> +        error_report("%s: BBRAM backstore zeroizing failed: %s",
> +                     blk_name(s->blk), strerror(-rc));
>       }
>   
>       /* Restore bbram8 if it is non-zero */


-- 
Best regards,
Vladimir


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Subject: Re: [PATCH 3/5] nbd/client-connection: Replace error_propagate() by
 assignment
To: Markus Armbruster , qemu-devel@nongnu.org
Cc: kwolf@redhat.com, hreitz@redhat.com, mst@redhat.com, imammedo@redhat.com,
 anisinha@redhat.com, gengdongjiu1@gmail.com, peter.maydell@linaro.org,
 alistair@alistair23.me, edgar.iglesias@gmail.com, npiggin@gmail.com,
 harshpb@linux.ibm.com, palmer@dabbelt.com, liwei1518@gmail.com,
 dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com,
 sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
 berrange@redhat.com, peterx@redhat.com, farosas@suse.de, eblake@redhat.com,
 eduardo@habkost.net, marcel.apfelbaum@gmail.com, philmd@linaro.org,
 wangyanan55@huawei.com, zhao1.liu@intel.com, qemu-block@nongnu.org,
 qemu-arm@nongnu.org, qemu-ppc@nongnu.org, qemu-riscv@nongnu.org,
 xen-devel@lists.xenproject.org
References: <20251119130855.105479-1-armbru@redhat.com>
 <20251119130855.105479-4-armbru@redhat.com>
Content-Language: en-US
From: Vladimir Sementsov-Ogievskiy 
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On 19.11.25 16:08, Markus Armbruster wrote:
> connect_thread_func() sets a variable to null, then error_propagate()s
> an Error * to it.  This is a roundabout way to assign the Error * to
> it, so replace it by just that.
> 
> Signed-off-by: Markus Armbruster


Reviewed-by: Vladimir Sementsov-Ogievskiy 

-- 
Best regards,
Vladimir


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Subject: Re: [PATCH 4/5] error: error_free(NULL) is safe, drop unnecessary
 conditionals
To: Markus Armbruster , qemu-devel@nongnu.org
Cc: kwolf@redhat.com, hreitz@redhat.com, mst@redhat.com, imammedo@redhat.com,
 anisinha@redhat.com, gengdongjiu1@gmail.com, peter.maydell@linaro.org,
 alistair@alistair23.me, edgar.iglesias@gmail.com, npiggin@gmail.com,
 harshpb@linux.ibm.com, palmer@dabbelt.com, liwei1518@gmail.com,
 dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com,
 sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
 berrange@redhat.com, peterx@redhat.com, farosas@suse.de, eblake@redhat.com,
 eduardo@habkost.net, marcel.apfelbaum@gmail.com, philmd@linaro.org,
 wangyanan55@huawei.com, zhao1.liu@intel.com, qemu-block@nongnu.org,
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References: <20251119130855.105479-1-armbru@redhat.com>
 <20251119130855.105479-5-armbru@redhat.com>
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From: Vladimir Sementsov-Ogievskiy 
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On 19.11.25 16:08, Markus Armbruster wrote:
> Signed-off-by: Markus Armbruster

Reviewed-by: Vladimir Sementsov-Ogievskiy 

-- 
Best regards,
Vladimir


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Feedback-ID: i1568416f:Fastmail
Date: Wed, 19 Nov 2025 18:08:30 +0100
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Frediano Ziglio ,
	Oleksii Kurochko ,
	Frediano Ziglio ,
	xen-devel@lists.xenproject.org,
	Frediano Ziglio ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich , Julien Grall ,
	Roger Pau =?utf-8?B?TW9ubsOp?= ,
	Stefano Stabellini ,
	Demi Marie Obenour ,
	Stewart Hildebrand 
Subject: Re: [PATCH v8] xen: Strip xen.efi by default
Message-ID: 
References: <20251113154358.28704-1-frediano.ziglio@citrix.com>
 <6729f3d9-618c-4dcd-93f8-d02ca7cea017@gmail.com>
 <8f8a769d-95ea-4554-8ee0-d6247f583e37@citrix.com>
 
 
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--himx9ggVNJp+HM6G
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Date: Wed, 19 Nov 2025 18:08:30 +0100
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Frediano Ziglio ,
	Oleksii Kurochko ,
	Frediano Ziglio ,
	xen-devel@lists.xenproject.org,
	Frediano Ziglio ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich , Julien Grall ,
	Roger Pau =?utf-8?B?TW9ubsOp?= ,
	Stefano Stabellini ,
	Demi Marie Obenour ,
	Stewart Hildebrand 
Subject: Re: [PATCH v8] xen: Strip xen.efi by default

On Wed, Nov 19, 2025 at 04:02:30PM +0000, Andrew Cooper wrote:
> Given it's now only 16.04 broken, how about simply excluding xen.efi
> with these broken toolchains?

That would mean adjusting README to say a newer binutils is required for
xen.efi, right? Then ofc we would need to figure out which version
specifically. FWIW Ubuntu 16.04 has 2.26 and Ubuntu 18.04 has 2.30.
Would raising required toolchain version (for some configuration here)
even accepted, especially if considered for backporting?

Alternatively, simply disable building xen.efi in CI on 16.04, and maybe
document as "known issue" pointing at toolchain bug? Result is very
similar, but might be more acceptable on the process side...

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Date: Wed, 19 Nov 2025 18:11:39 +0100
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Subject: Re: [for 4.22 v5 17/18] xen/riscv: add support of page lookup by GFN
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: 
 <3eea04894401202666ea0bb7ee1240a23ba54d8a.1760974017.git.oleksii.kurochko@gmail.com>
 
 <1cd26ed4-cf48-4524-acec-3d806a5cf953@gmail.com>
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From: Oleksii Kurochko 
In-Reply-To: <499df585-d50e-435c-8496-bc6078dd504b@suse.com>

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On 11/17/25 5:00 PM, Jan Beulich wrote:
> On 17.11.2025 16:52, Oleksii Kurochko wrote:
>> On 11/10/25 5:46 PM, Jan Beulich wrote:
>>> On 20.10.2025 17:58, Oleksii Kurochko wrote:
>>>> +static bool check_outside_boundary(gfn_t gfn, gfn_t boundary, bool is_lower,
>>>> +                                   unsigned int *level_out)
>>>> +{
>>>> +    unsigned int level;
>>>> +
>>>> +    if ( is_lower ? gfn_x(gfn) < gfn_x(boundary)
>>>> +                  : gfn_x(gfn) > gfn_x(boundary) )
>>>> +    {
>>>> +        unsigned long mask = 0;
>>>> +
>>>> +        for ( level = P2M_ROOT_LEVEL; level; level-- )
>>>> +        {
>>>> +            unsigned long masked_gfn;
>>>> +
>>>> +            mask |= PFN_DOWN(P2M_LEVEL_MASK(level));
>>>> +            masked_gfn = gfn_x(gfn) & mask;
>>>> +
>>>> +            if ( is_lower ? masked_gfn < gfn_x(boundary)
>>>> +                          : masked_gfn > gfn_x(boundary) )
>>>> +            {
>>>> +                *level_out = level;
>>> For this to be correct in the is_lower case, don't you need to fill the
>>> bottom bits of masked_gfn with all 1s, rather than with all 0s? Otherwise
>>> the tail of the range may be above boundary.
>> I think that I didn't get what you mean by "the range" here and so I can't understand
>> what is "the tail of the range".
>> Could you please clarify?
> By applying "mask" you effectively produce a range (with "gfn" somewhere in
> the middle). For the level (which you return to the caller) to be correct,
> the entire range must be matching "gfn" in being below or above of the
> boundary. My impression is that this isn't the case when is_lower is true.

Oh, got it. Then I agree that when is_lower is true we really need to fill the bottoms
bits of masked_gfn with all 1s.

Thanks for clarifying.

~ Oleksii

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On 11/17/25 5:00 PM, Jan Beulich wrote:

    

    

      
On 17.11.2025 16:52, Oleksii Kurochko wrote:


      

        
On 11/10/25 5:46 PM, Jan Beulich wrote:


        

          
On 20.10.2025 17:58, Oleksii Kurochko wrote:


          

            
+static bool check_outside_boundary(gfn_t gfn, gfn_t boundary, bool is_lower,
+                                   unsigned int *level_out)
+{
+    unsigned int level;
+
+    if ( is_lower ? gfn_x(gfn) < gfn_x(boundary)
+                  : gfn_x(gfn) > gfn_x(boundary) )
+    {
+        unsigned long mask = 0;
+
+        for ( level = P2M_ROOT_LEVEL; level; level-- )
+        {
+            unsigned long masked_gfn;
+
+            mask |= PFN_DOWN(P2M_LEVEL_MASK(level));
+            masked_gfn = gfn_x(gfn) & mask;
+
+            if ( is_lower ? masked_gfn < gfn_x(boundary)
+                          : masked_gfn > gfn_x(boundary) )
+            {
+                *level_out = level;


          

          
For this to be correct in the is_lower case, don't you need to fill the
bottom bits of masked_gfn with all 1s, rather than with all 0s? Otherwise
the tail of the range may be above boundary.


        

        
I think that I didn't get what you mean by "the range" here and so I can't understand
what is "the tail of the range".
Could you please clarify?


      

      
By applying "mask" you effectively produce a range (with "gfn" somewhere in
the middle). For the level (which you return to the caller) to be correct,
the entire range must be matching "gfn" in being below or above of the
boundary. My impression is that this isn't the case when is_lower is true.


    

    
Oh, got it. Then I agree that when is_lower is true we really need to fill the bottoms
bits of masked_gfn with all 1s.

Thanks for clarifying.

~ Oleksii

  


--------------0X0aeALjqkcNTZ3peP7NrZqg--


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To: Xen-devel ,
 xen-announce@lists.xenproject.org, advisory-board@lists.xenproject.org,
 Community Manager 
From: Oleksii Kurochko 
Subject: Xen Project Releases Version 4.21
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Hello everyone,

It's with great pleasure that I announce our 4.21 PR release.

I want to thank the whole community for their efforts in getting this
release published!

*Please find the PR article attached here
*

Please find the tarball and its signature at:
     https://downloads.xenproject.org/release/xen/4.21.0/

You can also check out the tag in xen.git:
     git://xenbits.xen.org/xen.git RELEASE-4.21.0

Git checkout and build instructions can be found at:
https://wiki.xenproject.org/wiki/Xen_Project_4.21_Release_Notes#Build_Requirements

Release notes can be found at:
     https://wiki.xenproject.org/wiki/Xen_Project_4.21_Release_Notes

A summary for 4.21 release documents can be found at:
     https://wiki.xenproject.org/wiki/Category:Xen_4.21

Please find the released features below:
https://xenbits.xen.org/gitweb/?p=xen.git;a=blob;f=CHANGELOG.md;h=adaad5ee8923d3a1811fbcd1a99429958fec2fb8;hb=HEAD#l15

Best regards,
   Oleksii

Come join the conversation on Matrix:

XenProject:https://matrix.to/#/#XenProject:matrix.org

XenDevel:https://matrix.to/#/#XenDevel:matrix.org






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Cc: Frediano Ziglio ,
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References: <20251113154358.28704-1-frediano.ziglio@citrix.com>
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On 19/11/2025 5:08 pm, Marek Marczykowski-Górecki wrote:
> On Wed, Nov 19, 2025 at 04:02:30PM +0000, Andrew Cooper wrote:
>> Given it's now only 16.04 broken, how about simply excluding xen.efi
>> with these broken toolchains?
> That would mean adjusting README to say a newer binutils is required for
> xen.efi, right? Then ofc we would need to figure out which version
> specifically. FWIW Ubuntu 16.04 has 2.26 and Ubuntu 18.04 has 2.30.
> Would raising required toolchain version (for some configuration here)
> even accepted, especially if considered for backporting?
>
> Alternatively, simply disable building xen.efi in CI on 16.04, and maybe
> document as "known issue" pointing at toolchain bug? Result is very
> similar, but might be more acceptable on the process side...

xen.efi has never been part of the toolchain minimum statement.

It was introduced as unconditionally enabled, with probing of the
toolchain to decide whether it was capable or not. That's what
XEN_BUILD_EFI is doing.

~Andrew


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Date: Wed, 19 Nov 2025 13:04:56 -0500
From: Peter Xu 
To: Markus Armbruster 
Cc: qemu-devel@nongnu.org, kwolf@redhat.com, hreitz@redhat.com,
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	xen-devel@lists.xenproject.org
Subject: Re: [PATCH 4/5] error: error_free(NULL) is safe, drop unnecessary
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On Wed, Nov 19, 2025 at 02:08:54PM +0100, Markus Armbruster wrote:
> Signed-off-by: Markus Armbruster 

Acked-by: Peter Xu 

-- 
Peter Xu



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Date: Wed, 19 Nov 2025 13:06:29 -0500
From: Peter Xu 
To: Markus Armbruster 
Cc: qemu-devel@nongnu.org, kwolf@redhat.com, hreitz@redhat.com,
	mst@redhat.com, imammedo@redhat.com, anisinha@redhat.com,
	gengdongjiu1@gmail.com, peter.maydell@linaro.org,
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	harshpb@linux.ibm.com, palmer@dabbelt.com, liwei1518@gmail.com,
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	sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
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	vsementsov@yandex-team.ru, eduardo@habkost.net,
	marcel.apfelbaum@gmail.com, philmd@linaro.org,
	wangyanan55@huawei.com, zhao1.liu@intel.com, qemu-block@nongnu.org,
	qemu-arm@nongnu.org, qemu-ppc@nongnu.org, qemu-riscv@nongnu.org,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH 1/5] hw/core/loader: Make load_elf_hdr() return bool,
 simplify caller
Message-ID: 
References: <20251119130855.105479-1-armbru@redhat.com>
 <20251119130855.105479-2-armbru@redhat.com>
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On Wed, Nov 19, 2025 at 02:08:51PM +0100, Markus Armbruster wrote:
> Signed-off-by: Markus Armbruster 

Reviewed-by: Peter Xu 

-- 
Peter Xu



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Date: Wed, 19 Nov 2025 13:09:24 -0500
From: Peter Xu 
To: Markus Armbruster 
Cc: qemu-devel@nongnu.org, kwolf@redhat.com, hreitz@redhat.com,
	mst@redhat.com, imammedo@redhat.com, anisinha@redhat.com,
	gengdongjiu1@gmail.com, peter.maydell@linaro.org,
	alistair@alistair23.me, edgar.iglesias@gmail.com, npiggin@gmail.com,
	harshpb@linux.ibm.com, palmer@dabbelt.com, liwei1518@gmail.com,
	dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com,
	sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
	berrange@redhat.com, farosas@suse.de, eblake@redhat.com,
	vsementsov@yandex-team.ru, eduardo@habkost.net,
	marcel.apfelbaum@gmail.com, philmd@linaro.org,
	wangyanan55@huawei.com, zhao1.liu@intel.com, qemu-block@nongnu.org,
	qemu-arm@nongnu.org, qemu-ppc@nongnu.org, qemu-riscv@nongnu.org,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH 2/5] hw/nvram/xlnx-bbram: More idiomatic and simpler
 error reporting
Message-ID: 
References: <20251119130855.105479-1-armbru@redhat.com>
 <20251119130855.105479-3-armbru@redhat.com>
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On Wed, Nov 19, 2025 at 02:08:52PM +0100, Markus Armbruster wrote:
> bbram_bdrv_error() interpolates a "detail" string into a template with
> error_setg_errno(), then reports the result with error_report().
> Produces error messages with an unwanted '.':
> 
>     BLK-NAME: BBRAM backstore DETAIL failed.: STERROR
> 
> Replace both calls of bbram_bdrv_error() by straightforward
> error_report(), and drop the function.  This is less code, easier to
> read, and the error message is more greppable.
> 
> Also delete the unwanted '.'.
> 
> Signed-off-by: Markus Armbruster 

Reviewed-by: Peter Xu 

-- 
Peter Xu



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Date: Wed, 19 Nov 2025 13:09:35 -0500
From: Peter Xu 
To: Markus Armbruster 
Cc: qemu-devel@nongnu.org, kwolf@redhat.com, hreitz@redhat.com,
	mst@redhat.com, imammedo@redhat.com, anisinha@redhat.com,
	gengdongjiu1@gmail.com, peter.maydell@linaro.org,
	alistair@alistair23.me, edgar.iglesias@gmail.com, npiggin@gmail.com,
	harshpb@linux.ibm.com, palmer@dabbelt.com, liwei1518@gmail.com,
	dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com,
	sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
	berrange@redhat.com, farosas@suse.de, eblake@redhat.com,
	vsementsov@yandex-team.ru, eduardo@habkost.net,
	marcel.apfelbaum@gmail.com, philmd@linaro.org,
	wangyanan55@huawei.com, zhao1.liu@intel.com, qemu-block@nongnu.org,
	qemu-arm@nongnu.org, qemu-ppc@nongnu.org, qemu-riscv@nongnu.org,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH 3/5] nbd/client-connection: Replace error_propagate() by
 assignment
Message-ID: 
References: <20251119130855.105479-1-armbru@redhat.com>
 <20251119130855.105479-4-armbru@redhat.com>
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On Wed, Nov 19, 2025 at 02:08:53PM +0100, Markus Armbruster wrote:
> connect_thread_func() sets a variable to null, then error_propagate()s
> an Error * to it.  This is a roundabout way to assign the Error * to
> it, so replace it by just that.
> 
> Signed-off-by: Markus Armbruster 

Reviewed-by: Peter Xu 

-- 
Peter Xu



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From: Markus Armbruster 
To: Vladimir Sementsov-Ogievskiy 
Cc: qemu-devel@nongnu.org,  kwolf@redhat.com,  hreitz@redhat.com,
  mst@redhat.com,  imammedo@redhat.com,  anisinha@redhat.com,
  gengdongjiu1@gmail.com,  peter.maydell@linaro.org,
  alistair@alistair23.me,  edgar.iglesias@gmail.com,  npiggin@gmail.com,
  harshpb@linux.ibm.com,  palmer@dabbelt.com,  liwei1518@gmail.com,
  dbarboza@ventanamicro.com,  zhiwei_liu@linux.alibaba.com,
  sstabellini@kernel.org,  anthony@xenproject.org,  paul@xen.org,
  berrange@redhat.com,  peterx@redhat.com,  farosas@suse.de,
  eblake@redhat.com,  eduardo@habkost.net,  marcel.apfelbaum@gmail.com,
  philmd@linaro.org,  wangyanan55@huawei.com,  zhao1.liu@intel.com,
  qemu-block@nongnu.org,  qemu-arm@nongnu.org,  qemu-ppc@nongnu.org,
  qemu-riscv@nongnu.org,  xen-devel@lists.xenproject.org
Subject: Re: [PATCH 2/5] hw/nvram/xlnx-bbram: More idiomatic and simpler
 error reporting
In-Reply-To:  (Vladimir
	Sementsov-Ogievskiy's message of "Wed, 19 Nov 2025 19:39:14 +0300")
References: <20251119130855.105479-1-armbru@redhat.com>
	<20251119130855.105479-3-armbru@redhat.com>
	
Date: Wed, 19 Nov 2025 20:10:49 +0100
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Vladimir Sementsov-Ogievskiy  writes:

> On 19.11.25 16:08, Markus Armbruster wrote:
>> bbram_bdrv_error() interpolates a "detail" string into a template with
>> error_setg_errno(), then reports the result with error_report().
>> Produces error messages with an unwanted '.':
>>
>>      BLK-NAME: BBRAM backstore DETAIL failed.: STERROR
>>
>> Replace both calls of bbram_bdrv_error() by straightforward
>> error_report(), and drop the function.  This is less code, easier to
>> read, and the error message is more greppable.
>>
>> Also delete the unwanted '.'.
>
> Also, using "errp" name for local "Error *" (one star) variable is a bit misleading.

True.  I don't mention it, because I delete the variable.

My search for misleading uses of @errp led me here.

>> Signed-off-by: Markus Armbruster 
>
> Reviewed-by: Vladimir Sementsov-Ogievskiy 

Thanks!



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From: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
To: xen-devel@lists.xenproject.org
Cc: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH] xen: Fix EFI buildid alignment
Date: Wed, 19 Nov 2025 20:12:31 +0100
Message-ID: <20251119191235.863187-1-marmarek@invisiblethingslab.com>
X-Mailer: git-send-email 2.51.0
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Old binutils get confused about .buildid overlapping (in VA space) with
earlier section. That confusion results in weird errors down the road,
like this one:

    objcopy: xen.efi: Data Directory size (1c) exceeds space left in section (8)

While the bug is fixed in later binutils version, force alignment of the
buildid to avoid overlapping and make it work with older versions too.
This can be reverted once toolchain base is raised at or above binutils
2.36.

Details at:
https://lore.kernel.org/all/3TMd7J2u5gCA8ouIG_Xfcw7s5JKMG06XsDIesEB3Fi9htUJ43Lfl057wXohlpCHcszqoCmicpIlneEDO26ZqT8QfC2Y39VxBuqD3nS1j5Q4=@trmm.net/

Signed-off-by: Marek Marczykowski-Górecki 
Fixes: eee5909e9d1e ("x86/EFI: use less crude a way of generating the build ID")
---
While the actual bug apparently is in binutils, the commit mentioned in
Fixes: tag introduced part that triggers that bug.
---
 xen/arch/x86/xen.lds.S | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/xen/arch/x86/xen.lds.S b/xen/arch/x86/xen.lds.S
index 5d02f83a409c..967f9167f757 100644
--- a/xen/arch/x86/xen.lds.S
+++ b/xen/arch/x86/xen.lds.S
@@ -171,6 +171,8 @@ SECTIONS
        __note_gnu_build_id_end = .;
   } PHDR(note) PHDR(text)
 #elif defined(BUILD_ID_EFI)
+  /* Workaround bug in binutils < 2.38 */
+  . = ALIGN(32);
   DECL_SECTION(.buildid) {
        __note_gnu_build_id_start = .;
        *(.buildid)
-- 
2.51.0



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From: Markus Armbruster 
To: Vladimir Sementsov-Ogievskiy 
Cc: qemu-devel@nongnu.org,  kwolf@redhat.com,  hreitz@redhat.com,
  mst@redhat.com,  imammedo@redhat.com,  anisinha@redhat.com,
  gengdongjiu1@gmail.com,  peter.maydell@linaro.org,
  alistair@alistair23.me,  edgar.iglesias@gmail.com,  npiggin@gmail.com,
  harshpb@linux.ibm.com,  palmer@dabbelt.com,  liwei1518@gmail.com,
  dbarboza@ventanamicro.com,  zhiwei_liu@linux.alibaba.com,
  sstabellini@kernel.org,  anthony@xenproject.org,  paul@xen.org,
  berrange@redhat.com,  peterx@redhat.com,  farosas@suse.de,
  eblake@redhat.com,  eduardo@habkost.net,  marcel.apfelbaum@gmail.com,
  philmd@linaro.org,  wangyanan55@huawei.com,  zhao1.liu@intel.com,
  qemu-block@nongnu.org,  qemu-arm@nongnu.org,  qemu-ppc@nongnu.org,
  qemu-riscv@nongnu.org,  xen-devel@lists.xenproject.org
Subject: Re: [PATCH 1/5] hw/core/loader: Make load_elf_hdr() return bool,
 simplify caller
In-Reply-To:  (Vladimir
	Sementsov-Ogievskiy's message of "Wed, 19 Nov 2025 19:34:26 +0300")
References: <20251119130855.105479-1-armbru@redhat.com>
	<20251119130855.105479-2-armbru@redhat.com>
	
Date: Wed, 19 Nov 2025 20:12:47 +0100
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Vladimir Sementsov-Ogievskiy  writes:

> On 19.11.25 16:08, Markus Armbruster wrote:
>> Signed-off-by: Markus Armbruster 
>
> Reviewed-by: Vladimir Sementsov-Ogievskiy 
>
>> ---
>>   include/hw/loader.h |  4 +++-
>>   hw/arm/boot.c       |  6 +-----
>>   hw/core/loader.c    |  8 ++++++--
>>   hw/riscv/spike.c    | 10 +---------
>>   4 files changed, 11 insertions(+), 17 deletions(-)
>> diff --git a/include/hw/loader.h b/include/hw/loader.h
>> index d035e72748..6f91703503 100644
>> --- a/include/hw/loader.h
>> +++ b/include/hw/loader.h
>> @@ -188,8 +188,10 @@ ssize_t load_elf(const char *filename,
>>    *
>>    * Inspect an ELF file's header. Read its full header contents into a
>>    * buffer and/or determine if the ELF is 64bit.
>> + *
>> + * Returns true on success, false on failure.
>
> I don't really care, but IMO, it's obvious contract for bool+errp functions, not worth a comment.

Nearby function comments all have a "Returns" sentence.  I try to blend
in :)

>>    */
>> -void load_elf_hdr(const char *filename, void *hdr, bool *is64, Error **errp);
>> +bool load_elf_hdr(const char *filename, void *hdr, bool *is64, Error **errp);
>>     ssize_t load_aout(const char *filename, hwaddr addr, int max_sz,
>>                     bool big_endian, hwaddr target_page_size);



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From: Grygorii Strashko 
To: "xen-devel@lists.xenproject.org" 
CC: Grygorii Strashko , Jan Beulich
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	=?iso-8859-1?Q?Roger_Pau_Monn=E9?= , Anthony PERARD
	, Michal Orzel , Julien
 Grall , Stefano Stabellini ,
	Alejandro Vallejo , Jason Andryuk
	
Subject: [XEN][PATCH v2 2/4] x86: hvm: compat: introduce is_hcall_compat()
 helper
Thread-Topic: [XEN][PATCH v2 2/4] x86: hvm: compat: introduce
 is_hcall_compat() helper
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Date: Wed, 19 Nov 2025 19:30:09 +0000
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From: Grygorii Strashko 

Introduce is_hcall_compat() helper and use it instead of direct access to
struct vcpu->hcall_compat field in preparation for making HVM COMPAT code
optional. The vcpu->hcall_compat field is under CONFIG_COMPAT ifdefs
already.

Signed-off-by: Grygorii Strashko 
---
changes in v2:
- change to bool is_hcall_compat(void)

 xen/arch/x86/hvm/hvm.c       | 8 ++++----
 xen/arch/x86/hvm/hypercall.c | 9 ++++-----
 xen/arch/x86/hypercall.c     | 6 +-----
 xen/common/kernel.c          | 2 +-
 xen/include/xen/sched.h      | 9 +++++++++
 5 files changed, 19 insertions(+), 15 deletions(-)

diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 0ff242d4a0d6..0fd3f95b6e0e 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -3500,7 +3500,7 @@ unsigned int copy_to_user_hvm(void *to, const void *f=
rom, unsigned int len)
 {
     int rc;
=20
-    if ( current->hcall_compat && is_compat_arg_xlat_range(to, len) )
+    if ( is_hcall_compat() && is_compat_arg_xlat_range(to, len) )
     {
         memcpy(to, from, len);
         return 0;
@@ -3514,7 +3514,7 @@ unsigned int clear_user_hvm(void *to, unsigned int le=
n)
 {
     int rc;
=20
-    if ( current->hcall_compat && is_compat_arg_xlat_range(to, len) )
+    if ( is_hcall_compat() && is_compat_arg_xlat_range(to, len) )
     {
         memset(to, 0x00, len);
         return 0;
@@ -3529,7 +3529,7 @@ unsigned int copy_from_user_hvm(void *to, const void =
*from, unsigned int len)
 {
     int rc;
=20
-    if ( current->hcall_compat && is_compat_arg_xlat_range(from, len) )
+    if ( is_hcall_compat() && is_compat_arg_xlat_range(from, len) )
     {
         memcpy(to, from, len);
         return 0;
@@ -5214,7 +5214,7 @@ long do_hvm_op(unsigned long op, XEN_GUEST_HANDLE_PAR=
AM(void) arg)
         break;
=20
     case HVMOP_altp2m:
-        rc =3D current->hcall_compat ? compat_altp2m_op(arg) : do_altp2m_o=
p(arg);
+        rc =3D is_hcall_compat() ? compat_altp2m_op(arg) : do_altp2m_op(ar=
g);
         break;
=20
     default:
diff --git a/xen/arch/x86/hvm/hypercall.c b/xen/arch/x86/hvm/hypercall.c
index b254b3e2f7d6..52cae1d15312 100644
--- a/xen/arch/x86/hvm/hypercall.c
+++ b/xen/arch/x86/hvm/hypercall.c
@@ -29,7 +29,7 @@ long hvm_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PA=
RAM(void) arg)
         return -ENOSYS;
     }
=20
-    if ( !current->hcall_compat )
+    if ( !is_hcall_compat() )
         rc =3D do_memory_op(cmd, arg);
     else
         rc =3D compat_memory_op(cmd, arg);
@@ -57,7 +57,7 @@ long hvm_grant_table_op(
         return -ENOSYS;
     }
=20
-    if ( !current->hcall_compat )
+    if ( !is_hcall_compat() )
         return do_grant_table_op(cmd, uop, count);
     else
         return compat_grant_table_op(cmd, uop, count);
@@ -66,8 +66,7 @@ long hvm_grant_table_op(
=20
 long hvm_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
 {
-    const struct vcpu *curr =3D current;
-    const struct domain *currd =3D curr->domain;
+    const struct domain *currd =3D current->domain;
=20
     switch ( cmd )
     {
@@ -96,7 +95,7 @@ long hvm_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void)=
 arg)
         return -ENOSYS;
     }
=20
-    if ( !curr->hcall_compat )
+    if ( !is_hcall_compat() )
         return do_physdev_op(cmd, arg);
     else
         return compat_physdev_op(cmd, arg);
diff --git a/xen/arch/x86/hypercall.c b/xen/arch/x86/hypercall.c
index dc0a90ca0915..5d1ac906fd37 100644
--- a/xen/arch/x86/hypercall.c
+++ b/xen/arch/x86/hypercall.c
@@ -53,11 +53,7 @@ unsigned long hypercall_create_continuation(
=20
         regs->rax =3D op;
=20
-#ifdef CONFIG_COMPAT
-        if ( !curr->hcall_compat )
-#else
-        if ( true )
-#endif
+        if ( !is_hcall_compat() )
         {
             for ( i =3D 0; *p !=3D '\0'; i++ )
             {
diff --git a/xen/common/kernel.c b/xen/common/kernel.c
index e6979352e100..3ff06e315f57 100644
--- a/xen/common/kernel.c
+++ b/xen/common/kernel.c
@@ -615,7 +615,7 @@ long do_xen_version(int cmd, XEN_GUEST_HANDLE_PARAM(voi=
d) arg)
         const struct vcpu *curr =3D current;
=20
 #ifdef CONFIG_COMPAT
-        if ( curr->hcall_compat )
+        if ( is_hcall_compat() )
         {
             compat_platform_parameters_t params =3D {
                 .virt_start =3D is_pv_vcpu(curr)
diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h
index 02bdc256ce37..ed6fdeeda9f9 100644
--- a/xen/include/xen/sched.h
+++ b/xen/include/xen/sched.h
@@ -311,6 +311,15 @@ struct vcpu
 #endif
 };
=20
+static inline bool is_hcall_compat(void)
+{
+#ifdef CONFIG_COMPAT
+    return current->hcall_compat;
+#else
+    return false;
+#endif /* CONFIG_COMPAT */
+}
+
 struct sched_unit {
     struct domain         *domain;
     struct vcpu           *vcpu_list;
--=20
2.34.1


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From: Grygorii Strashko 
To: "xen-devel@lists.xenproject.org" 
CC: Grygorii Strashko , Jan Beulich
	, Andrew Cooper ,
	=?iso-8859-1?Q?Roger_Pau_Monn=E9?= , Stefano Stabellini
	, Alejandro Vallejo
	, Jason Andryuk 
Subject: [XEN][PATCH v2 1/4] x86: hvm: dm: factor out compat code under ifdefs
Thread-Topic: [XEN][PATCH v2 1/4] x86: hvm: dm: factor out compat code under
 ifdefs
Thread-Index: AQHcWYrqEylB9yFxC0Ctjtrr94qNKw==
Date: Wed, 19 Nov 2025 19:30:08 +0000
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From: Grygorii Strashko 

Factor out COMPAT HVM DM code under ifdefs in preparation for making HVM
COMPAT code optional.

Signed-off-by: Grygorii Strashko 
Reviewed-by: Jason Andryuk 
---
changes in v2:
 - no changes

 xen/arch/x86/hvm/dm.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/xen/arch/x86/hvm/dm.c b/xen/arch/x86/hvm/dm.c
index 3b53471af0d9..f6dd1634428a 100644
--- a/xen/arch/x86/hvm/dm.c
+++ b/xen/arch/x86/hvm/dm.c
@@ -623,6 +623,7 @@ int dm_op(const struct dmop_args *op_args)
     return rc;
 }
=20
+#ifdef CONFIG_COMPAT
 #include 
=20
 CHECK_dm_op_create_ioreq_server;
@@ -680,6 +681,7 @@ int compat_dm_op(
=20
     return rc;
 }
+#endif /* CONFIG_COMPAT */
=20
 /*
  * Local variables:
--=20
2.34.1


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From: Grygorii Strashko 
To: "xen-devel@lists.xenproject.org" 
CC: Grygorii Strashko , Jan Beulich
	, Andrew Cooper ,
	=?iso-8859-1?Q?Roger_Pau_Monn=E9?= , Anthony PERARD
	, Michal Orzel , Julien
 Grall , Stefano Stabellini ,
	Alejandro Vallejo , Jason Andryuk
	, =?iso-8859-1?Q?J=FCrgen_Gro=DF?= 
Subject: [XEN][PATCH v2 3/4] x86: hvm: factor out COMPAT code under ifdefs
Thread-Topic: [XEN][PATCH v2 3/4] x86: hvm: factor out COMPAT code under
 ifdefs
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From: Grygorii Strashko 

Factor out COMPAT HVM code under ifdefs in preparation for making HVM
COMPAT code optional.

- hypercall-defs.c updated to always provide compat declaration for:
physdev_op, grant_table_op, grant_table_op. This reduces number of COMPAT
ifdefs in HVM code and lets compiler DCE do the job.

- Only 64-bit shinfo is supported with COMPAT=3Dn, so struct
arch_domain->has_32bit_shinfo field is moved under COMPAT ifdef and
has_32bit_shinfo() is updated to account for COMPAT=3Dn.

Signed-off-by: Grygorii Strashko 
---
changes in v2:
- update hypercall-defs.c to always provide compat declaration for:
  physdev_op, grant_table_op, grant_table_op
- move struct arch_domain->has_32bit_shinfo is moved under COMPAT ifdef
- return hvm_hypercall()
- use ASSERT_UNREACHABLE() in hvm_do_multicall_call()
- constify has_32bit_shinfo() for COMPAT=3Dn

 xen/arch/x86/hvm/hvm.c            | 16 ++++++++++++++++
 xen/arch/x86/hvm/hypercall.c      | 13 +++++++++++++
 xen/arch/x86/include/asm/domain.h |  9 +++++++--
 xen/include/hypercall-defs.c      |  9 +++++++--
 4 files changed, 43 insertions(+), 4 deletions(-)

diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 0fd3f95b6e0e..19524cb7a914 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -69,7 +69,9 @@
 #include 
 #include 
=20
+#ifdef CONFIG_COMPAT
 #include 
+#endif
=20
 bool __read_mostly hvm_enabled;
=20
@@ -1255,6 +1257,7 @@ static int cf_check hvm_save_cpu_xsave_states(
     return 0;
 }
=20
+#ifdef CONFIG_COMPAT
 /*
  * Structure layout conformity checks, documenting correctness of the cast=
 in
  * the invocation of validate_xstate() below.
@@ -1267,6 +1270,7 @@ CHECK_FIELD_(struct, xsave_hdr, xcomp_bv);
 CHECK_FIELD_(struct, xsave_hdr, reserved);
 #undef compat_xsave_hdr
 #undef xen_xsave_hdr
+#endif /* CONFIG_COMPAT */
=20
 static int cf_check hvm_load_cpu_xsave_states(
     struct domain *d, hvm_domain_context_t *h)
@@ -3991,8 +3995,14 @@ static void hvm_latch_shinfo_size(struct domain *d)
      */
     if ( current->domain =3D=3D d )
     {
+#ifdef CONFIG_COMPAT
+        /*
+         * Only 64-bit shinfo is supported when COMPAT 32-bit hypercalls
+         * interface is disabled
+         */
         d->arch.has_32bit_shinfo =3D
             hvm_guest_x86_mode(current) !=3D X86_MODE_64BIT;
+#endif
=20
         /*
          * Make sure that the timebase in the shared info structure is cor=
rect.
@@ -4965,6 +4975,7 @@ static int do_altp2m_op(
 #endif /* CONFIG_ALTP2M */
 }
=20
+#ifdef CONFIG_COMPAT
 DEFINE_XEN_GUEST_HANDLE(compat_hvm_altp2m_op_t);
=20
 /*
@@ -4992,10 +5003,12 @@ DEFINE_XEN_GUEST_HANDLE(compat_hvm_altp2m_op_t);
=20
 CHECK_hvm_altp2m_op;
 CHECK_hvm_altp2m_set_mem_access_multi;
+#endif /* CONFIG_COMPAT */
=20
 static int compat_altp2m_op(
     XEN_GUEST_HANDLE_PARAM(void) arg)
 {
+#ifdef CONFIG_COMPAT
     int rc =3D 0;
     struct compat_hvm_altp2m_op a;
     union
@@ -5063,6 +5076,9 @@ static int compat_altp2m_op(
     }
=20
     return rc;
+#else
+    return -EOPNOTSUPP;
+#endif /* CONFIG_COMPAT */
 }
=20
 static int hvmop_get_mem_type(
diff --git a/xen/arch/x86/hvm/hypercall.c b/xen/arch/x86/hvm/hypercall.c
index 52cae1d15312..1ee0193b69af 100644
--- a/xen/arch/x86/hvm/hypercall.c
+++ b/xen/arch/x86/hvm/hypercall.c
@@ -170,6 +170,7 @@ int hvm_hypercall(struct cpu_user_regs *regs)
         HVM_DBG_LOG(DBG_LEVEL_HCALL, "hcall%lu(%x, %x, %x, %x, %x)", eax,
                     regs->ebx, regs->ecx, regs->edx, regs->esi, regs->edi)=
;
=20
+#ifdef CONFIG_COMPAT
         curr->hcall_compat =3D true;
         call_handlers_hvm32(eax, regs->eax, regs->ebx, regs->ecx, regs->ed=
x,
                             regs->esi, regs->edi);
@@ -177,6 +178,9 @@ int hvm_hypercall(struct cpu_user_regs *regs)
=20
         if ( !curr->hcall_preempted && regs->eax !=3D -ENOSYS )
             clobber_regs(regs, eax, hvm, 32);
+#else
+        regs->eax =3D -ENOSYS;
+#endif
     }
=20
     hvmemul_cache_restore(curr, token);
@@ -207,10 +211,19 @@ enum mc_disposition hvm_do_multicall_call(struct mc_s=
tate *state)
     }
     else
     {
+#ifdef CONFIG_COMPAT
         struct compat_multicall_entry *call =3D &state->compat_call;
=20
         call_handlers_hvm32(call->op, call->result, call->args[0], call->a=
rgs[1],
                             call->args[2], call->args[3], call->args[4]);
+#else
+        /*
+         * code should never reach here in case !CONFIG_COMPAT as any
+         * 32-bit hypercall should bail out earlier from hvm_hypercall()
+         * with -EOPNOTSUPP
+         */
+        ASSERT_UNREACHABLE();
+#endif
     }
=20
     return !hvm_get_cpl(curr) ? mc_continue : mc_preempt;
diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/d=
omain.h
index 5df8c7825333..0005f4450931 100644
--- a/xen/arch/x86/include/asm/domain.h
+++ b/xen/arch/x86/include/asm/domain.h
@@ -12,8 +12,11 @@
 #include 
 #include 
=20
-#define has_32bit_shinfo(d)    ((d)->arch.has_32bit_shinfo)
-
+#ifdef CONFIG_COMPAT
+#define has_32bit_shinfo(d) ((d)->arch.has_32bit_shinfo)
+#else
+#define has_32bit_shinfo(d) ((void)(d), false)
+#endif
 /*
  * Set to true if either the global vector-type callback or per-vCPU
  * LAPIC vectors are used. Assume all vCPUs will use
@@ -365,8 +368,10 @@ struct arch_domain
     /* NB. protected by d->event_lock and by irq_desc[irq].lock */
     struct radix_tree_root irq_pirq;
=20
+#ifdef CONFIG_COMPAT
     /* Is shared-info page in 32-bit format? */
     bool has_32bit_shinfo;
+#endif
=20
     /* Is PHYSDEVOP_eoi to automatically unmask the event channel? */
     bool auto_unmask;
diff --git a/xen/include/hypercall-defs.c b/xen/include/hypercall-defs.c
index cef08eeec1b8..08c01153ac56 100644
--- a/xen/include/hypercall-defs.c
+++ b/xen/include/hypercall-defs.c
@@ -80,6 +80,8 @@ rettype: compat int
 #define PREFIX_compat
 #endif
=20
+#define PREFIX_compat_always compat
+
 #ifdef CONFIG_ARM
 #define PREFIX_dep dep
 #define PREFIX_do_arm do_arm
@@ -104,10 +106,10 @@ defhandle: trap_info_compat_t
 defhandle: physdev_op_compat_t
 #endif
=20
-prefix: do PREFIX_hvm PREFIX_compat PREFIX_do_arm
+prefix: do PREFIX_hvm PREFIX_compat_always PREFIX_do_arm
 physdev_op(int cmd, void *arg)
=20
-prefix: do PREFIX_hvm PREFIX_compat
+prefix: do PREFIX_hvm PREFIX_compat_always
 #if defined(CONFIG_GRANT_TABLE) || defined(CONFIG_PV_SHIM)
 grant_table_op(unsigned int cmd, void *uop, unsigned int count)
 #endif
@@ -156,6 +158,9 @@ platform_op(compat_platform_op_t *u_xenpf_op)
 #ifdef CONFIG_KEXEC
 kexec_op(unsigned int op, void *uarg)
 #endif
+#else /* CONFIG_COMPAT */
+prefix: PREFIX_compat_always
+memory_op(unsigned int cmd, void *arg)
 #endif /* CONFIG_COMPAT */
=20
 #if defined(CONFIG_PV) || defined(CONFIG_ARM)
--=20
2.34.1


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From: Grygorii Strashko 
To: "xen-devel@lists.xenproject.org" 
CC: Grygorii Strashko , Jan Beulich
	, Andrew Cooper ,
	=?iso-8859-1?Q?Roger_Pau_Monn=E9?= , Anthony PERARD
	, Michal Orzel , Julien
 Grall , Stefano Stabellini 
Subject: [XEN][PATCH v2 0/4] x86: pvh: allow to disable 32-bit (COMPAT)
 interface support
Thread-Topic: [XEN][PATCH v2 0/4] x86: pvh: allow to disable 32-bit (COMPAT)
 interface support
Thread-Index: AQHcWYrqEdLIdxgHq06iG/KRChB4+A==
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From: Grygorii Strashko 

Hi

This series introduces possibility to disable 32-bit (COMPAT) interface sup=
port
in the following case:
      - Only PVH domains are used
      - Guests (OS) are started by using direct Direct Kernel Boot
      - Guests (OS) are 64-bit and Guest early boot code, which is running =
not
        in 64-bit mode, does not access Xen interfaces
        (hypercalls, shared_info, ..)

If above criterias are met the COMPAT HVM interface become unreachable and =
can be disabled.
Coverage reports analyze and adding guard (debug) exceptions in hvm_hyperca=
ll/hvm_do_multicall_call
and hvm_latch_shinfo_size() confirm that COMPAT HVM interface is unused for=
 safety use-case.

Changes in v2 described in each patch:
- patch "x86: constify has_32bit_shinfo() if !CONFIG_COMPAT" squashed in pa=
tch 2.

v1:
 https://patchwork.kernel.org/project/xen-devel/cover/20251111175413.354069=
0-1-grygorii_strashko@epam.com/

Grygorii Strashko (4):
  x86: hvm: dm: factor out compat code under ifdefs
  x86: hvm: compat: introduce is_hcall_compat() helper
  x86: hvm: factor out COMPAT code under ifdefs
  x86: pvh: allow to disable 32-bit interface support

 xen/arch/x86/hvm/Kconfig          | 19 ++++++++++++++++++-
 xen/arch/x86/hvm/dm.c             |  2 ++
 xen/arch/x86/hvm/hvm.c            | 24 ++++++++++++++++++++----
 xen/arch/x86/hvm/hypercall.c      | 22 +++++++++++++++++-----
 xen/arch/x86/hypercall.c          |  6 +-----
 xen/arch/x86/include/asm/domain.h |  9 +++++++--
 xen/common/kernel.c               |  2 +-
 xen/include/hypercall-defs.c      |  9 +++++++--
 xen/include/xen/sched.h           |  9 +++++++++
 9 files changed, 82 insertions(+), 20 deletions(-)

--=20
2.34.1


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From: Grygorii Strashko 
To: "xen-devel@lists.xenproject.org" 
CC: Grygorii Strashko , Jan Beulich
	, Andrew Cooper ,
	=?iso-8859-1?Q?Roger_Pau_Monn=E9?= , Stefano Stabellini
	, Alejandro Vallejo
	, Jason Andryuk 
Subject: [XEN][PATCH v2 4/4] x86: pvh: allow to disable 32-bit interface
 support
Thread-Topic: [XEN][PATCH v2 4/4] x86: pvh: allow to disable 32-bit interface
 support
Thread-Index: AQHcWYrr1fGFNDkTXkKtxIuHdmqCJw==
Date: Wed, 19 Nov 2025 19:30:10 +0000
Message-ID: <20251119192916.1009549-5-grygorii_strashko@epam.com>
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From: Grygorii Strashko 

For x86 Xen safety certification only PVH Gusts are selected to be allowed
which are started by using direct Direct Kernel Boot only. There is also an
assumption that x86 Guest's (OS) early boot code (which is running not in
64-bit mode) does not access Xen interfaces (hypercalls, shared_info, ..).

In this case the Xen HVM 32-bit COMPAT interface become unused and leaves
gaps in terms of coverage.

Hence now all prerequisite changes are in place, introduce a
CONFIG_HVM_COMPAT option through which HVM(PVH) 32-bit interface support on
64-bit Xen can be disabled.

By default, CONFIG_HVM_COMPAT is ("y") enabled and accessible only in
EXPERT mode.

Signed-off-by: Grygorii Strashko 
---
changes in v2:
- fix format and move above HVM_FEP

 xen/arch/x86/hvm/Kconfig | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig
index c323d767e77c..88090f5b3965 100644
--- a/xen/arch/x86/hvm/Kconfig
+++ b/xen/arch/x86/hvm/Kconfig
@@ -2,7 +2,6 @@ menuconfig HVM
 	bool "HVM support"
 	depends on !PV_SHIM_EXCLUSIVE
 	default !PV_SHIM
-	select COMPAT
 	select IOREQ_SERVER
 	select MEM_ACCESS_ALWAYS_ON
 	help
@@ -35,6 +34,24 @@ config INTEL_VMX
 	  If your system includes a processor with Intel VT-x support, say Y.
 	  If in doubt, say Y.
=20
+config HVM_COMPAT
+	bool "HVM 32-bit hypercalls interface support" if EXPERT
+	select COMPAT
+	default y
+	help
+	  The HVM 32-bit interface must be enabled for HVM domains to be able to
+	  make hypercalls in 32bit mode. Non-PVH domains unconditionally need thi=
s
+	  option so that hvmloader may issue hypercalls in 32bit mode.
+
+	  The HVM 32-bit interface can be disabled if:
+	  - Only PVH domains are used
+	  - Guests (OS) are started by using direct Direct Kernel Boot
+	  - Guests (OS) are 64-bit and Guest early boot code, which is running no=
t
+	    in 64-bit mode, does not access Xen interfaces
+	    (hypercalls, shared_info, ..)
+
+	  If unsure, say Y.
+
 config HVM_FEP
 	bool "HVM Forced Emulation Prefix support (UNSUPPORTED)" if UNSUPPORTED
 	default DEBUG
--=20
2.34.1


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From: Grygorii Strashko 
To: "xen-devel@lists.xenproject.org" 
CC: Grygorii Strashko , Jan Beulich
	, Andrew Cooper ,
	=?iso-8859-1?Q?Roger_Pau_Monn=E9?= , Anthony PERARD
	, Michal Orzel , Julien
 Grall , Stefano Stabellini , Tamas K
 Lengyel , Alexandru Isaila ,
	Petre Pircalabu , Teddy Astie
	, Penny Zheng 
Subject: [XEN][PATCH v4] xen: make VMTRACE support optional
Thread-Topic: [XEN][PATCH v4] xen: make VMTRACE support optional
Thread-Index: AQHcWYsVwkzlU6tg9E6YV8TOMrknlQ==
Date: Wed, 19 Nov 2025 19:31:20 +0000
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From: Grygorii Strashko 

The VMTRACE feature is depends on Platform/Arch HW and code support and now
can be used only on x86 HVM with Intel VT-x (INTEL_VMX) enabled.
This makes VMTRACE support optional by introducing HVM Kconfig option:
- CONFIG_VMTRACE to enable/disable the feature.

Signed-off-by: Grygorii Strashko 
---
changes in v4:
- format changes

changes in v3:
- drop vmtrace stubs for HVM=3Dn case from hvm.h (VMTRACE depnds on HVM)
- hvm_vmtrace_reset() fix return err code
- add comment about using func declaration without definition

changes in v2:
 - fix comments from Jan Beulich
 - move CONFIG_VMTRACE in HVM
 - drop HAS_VMTRACE

v3:
 https://patchwork.kernel.org/project/xen-devel/patch/20251114142207.279834=
-1-grygorii_strashko@epam.com/
v2:
 https://patchwork.kernel.org/project/xen-devel/patch/20251112202442.387999=
7-1-grygorii_strashko@epam.com/=20
v1:
 https://patchwork.kernel.org/project/xen-devel/patch/20251031212005.133821=
2-1-grygorii_strashko@epam.com/

 xen/arch/x86/domctl.c                   |  4 +++
 xen/arch/x86/hvm/Kconfig                | 12 +++++++++
 xen/arch/x86/hvm/vmx/vmcs.c             |  2 ++
 xen/arch/x86/hvm/vmx/vmx.c              | 11 ++++++++
 xen/arch/x86/include/asm/guest-msr.h    |  2 ++
 xen/arch/x86/include/asm/hvm/hvm.h      | 36 ++++++++++---------------
 xen/arch/x86/include/asm/hvm/vmx/vmcs.h |  2 ++
 xen/arch/x86/mm/mem_sharing.c           |  2 ++
 xen/arch/x86/vm_event.c                 |  8 +++---
 xen/common/domain.c                     | 10 +++++++
 xen/common/memory.c                     |  6 +++++
 xen/common/vm_event.c                   |  3 ++-
 xen/include/xen/domain.h                |  4 +++
 xen/include/xen/sched.h                 |  4 +++
 14 files changed, 80 insertions(+), 26 deletions(-)

diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c
index 6153e3c07e2d..d9521808dcba 100644
--- a/xen/arch/x86/domctl.c
+++ b/xen/arch/x86/domctl.c
@@ -154,6 +154,7 @@ void arch_get_domain_info(const struct domain *d,
 static int do_vmtrace_op(struct domain *d, struct xen_domctl_vmtrace_op *o=
p,
                          XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl)
 {
+#ifdef CONFIG_VMTRACE
     struct vcpu *v;
     int rc;
=20
@@ -198,6 +199,9 @@ static int do_vmtrace_op(struct domain *d, struct xen_d=
omctl_vmtrace_op *op,
     vcpu_unpause(v);
=20
     return rc;
+#else
+    return -EOPNOTSUPP;
+#endif
 }
=20
 #define MAX_IOPORTS 0x10000
diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig
index c1a131d1851a..f75dec5ea40a 100644
--- a/xen/arch/x86/hvm/Kconfig
+++ b/xen/arch/x86/hvm/Kconfig
@@ -35,6 +35,18 @@ config INTEL_VMX
 	  If your system includes a processor with Intel VT-x support, say Y.
 	  If in doubt, say Y.
=20
+config VMTRACE
+	bool "HW VM tracing support"
+	depends on INTEL_VMX
+	default y
+	help
+	  Enables HW VM tracing support which allows to configure HW processor
+	  features (vmtrace_op) to enable capturing information about software
+	  execution using dedicated hardware facilities with minimal interference
+	  to the software being traced. The trace data can be retrieved using buf=
fer
+	  shared between Xen and domain
+	  (see XENMEM_acquire_resource(XENMEM_resource_vmtrace_buf)).
+
 config HVM_FEP
 	bool "HVM Forced Emulation Prefix support (UNSUPPORTED)" if UNSUPPORTED
 	default DEBUG
diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c
index d610988bf91b..c2e7f9aed39f 100644
--- a/xen/arch/x86/hvm/vmx/vmcs.c
+++ b/xen/arch/x86/hvm/vmx/vmcs.c
@@ -306,6 +306,7 @@ static int vmx_init_vmcs_config(bool bsp)
=20
     rdmsrl(MSR_IA32_VMX_MISC, _vmx_misc_cap);
=20
+#ifdef CONFIG_VMTRACE
     /* Check whether IPT is supported in VMX operation. */
     if ( bsp )
         vmtrace_available =3D cpu_has_proc_trace &&
@@ -317,6 +318,7 @@ static int vmx_init_vmcs_config(bool bsp)
                smp_processor_id());
         return -EINVAL;
     }
+#endif
=20
     if ( caps.cpu_based_exec_control & CPU_BASED_ACTIVATE_SECONDARY_CONTRO=
LS )
     {
diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c
index d042e7fb927f..c98ec110d144 100644
--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -622,6 +622,7 @@ static void cf_check domain_creation_finished(struct do=
main *d)
=20
 static void vmx_init_ipt(struct vcpu *v)
 {
+#ifdef CONFIG_VMTRACE
     unsigned int size =3D v->domain->vmtrace_size;
=20
     if ( !size )
@@ -632,6 +633,7 @@ static void vmx_init_ipt(struct vcpu *v)
     ASSERT(size >=3D PAGE_SIZE && (size & (size - 1)) =3D=3D 0);
=20
     v->arch.msrs->rtit.output_limit =3D size - 1;
+#endif
 }
=20
 static int cf_check vmx_vcpu_initialise(struct vcpu *v)
@@ -724,11 +726,13 @@ static void vmx_save_guest_msrs(struct vcpu *v)
      */
     v->arch.hvm.vmx.shadow_gs =3D read_gs_shadow();
=20
+#ifdef CONFIG_VMTRACE
     if ( v->arch.hvm.vmx.ipt_active )
     {
         rdmsrl(MSR_RTIT_OUTPUT_MASK, msrs->rtit.output_mask);
         rdmsrl(MSR_RTIT_STATUS, msrs->rtit.status);
     }
+#endif
=20
     if ( cp->feat.pks )
         msrs->pkrs =3D rdpkrs_and_cache();
@@ -747,12 +751,14 @@ static void vmx_restore_guest_msrs(struct vcpu *v)
     if ( cpu_has_msr_tsc_aux )
         wrmsr_tsc_aux(msrs->tsc_aux);
=20
+#ifdef CONFIG_VMTRACE
     if ( v->arch.hvm.vmx.ipt_active )
     {
         wrmsrl(MSR_RTIT_OUTPUT_BASE, page_to_maddr(v->vmtrace.pg));
         wrmsrl(MSR_RTIT_OUTPUT_MASK, msrs->rtit.output_mask);
         wrmsrl(MSR_RTIT_STATUS, msrs->rtit.status);
     }
+#endif
=20
     if ( cp->feat.pks )
         wrpkrs(msrs->pkrs);
@@ -2626,6 +2632,7 @@ static bool cf_check vmx_get_pending_event(
     return true;
 }
=20
+#ifdef CONFIG_VMTRACE
 /*
  * We only let vmtrace agents see and modify a subset of bits in MSR_RTIT_=
CTL.
  * These all pertain to data-emitted into the trace buffer(s).  Must not
@@ -2768,6 +2775,7 @@ static int cf_check vmtrace_reset(struct vcpu *v)
     v->arch.msrs->rtit.status =3D 0;
     return 0;
 }
+#endif
=20
 static uint64_t cf_check vmx_get_reg(struct vcpu *v, unsigned int reg)
 {
@@ -2940,11 +2948,14 @@ static struct hvm_function_table __initdata_cf_clob=
ber vmx_function_table =3D {
     .altp2m_vcpu_emulate_ve =3D vmx_vcpu_emulate_ve,
     .altp2m_vcpu_emulate_vmfunc =3D vmx_vcpu_emulate_vmfunc,
 #endif
+
+#ifdef CONFIG_VMTRACE
     .vmtrace_control =3D vmtrace_control,
     .vmtrace_output_position =3D vmtrace_output_position,
     .vmtrace_set_option =3D vmtrace_set_option,
     .vmtrace_get_option =3D vmtrace_get_option,
     .vmtrace_reset =3D vmtrace_reset,
+#endif
=20
     .get_reg =3D vmx_get_reg,
     .set_reg =3D vmx_set_reg,
diff --git a/xen/arch/x86/include/asm/guest-msr.h b/xen/arch/x86/include/as=
m/guest-msr.h
index 5f0cb0a93995..702f47fe1e16 100644
--- a/xen/arch/x86/include/asm/guest-msr.h
+++ b/xen/arch/x86/include/asm/guest-msr.h
@@ -50,6 +50,7 @@ struct vcpu_msrs
         };
     } misc_features_enables;
=20
+#ifdef CONFIG_VMTRACE
     /*
      * 0x00000560 ... 57x - MSR_RTIT_*
      *
@@ -81,6 +82,7 @@ struct vcpu_msrs
             };
         };
     } rtit;
+#endif
=20
     /*
      * 0x000006e1 - MSR_PKRS - Protection Key Supervisor.
diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/=
hvm/hvm.h
index 7412256a2dab..93da4dd2dc4b 100644
--- a/xen/arch/x86/include/asm/hvm/hvm.h
+++ b/xen/arch/x86/include/asm/hvm/hvm.h
@@ -234,12 +234,14 @@ struct hvm_function_table {
     int (*altp2m_vcpu_emulate_vmfunc)(const struct cpu_user_regs *regs);
 #endif
=20
+#ifdef CONFIG_VMTRACE
     /* vmtrace */
     int (*vmtrace_control)(struct vcpu *v, bool enable, bool reset);
     int (*vmtrace_output_position)(struct vcpu *v, uint64_t *pos);
     int (*vmtrace_set_option)(struct vcpu *v, uint64_t key, uint64_t value=
);
     int (*vmtrace_get_option)(struct vcpu *v, uint64_t key, uint64_t *valu=
e);
     int (*vmtrace_reset)(struct vcpu *v);
+#endif
=20
     uint64_t (*get_reg)(struct vcpu *v, unsigned int reg);
     void (*set_reg)(struct vcpu *v, unsigned int reg, uint64_t val);
@@ -738,6 +740,7 @@ static inline bool altp2m_vcpu_emulate_ve(struct vcpu *=
v)
 bool altp2m_vcpu_emulate_ve(struct vcpu *v);
 #endif /* CONFIG_ALTP2M */
=20
+#ifdef CONFIG_VMTRACE
 static inline int hvm_vmtrace_control(struct vcpu *v, bool enable, bool re=
set)
 {
     if ( hvm_funcs.vmtrace_control )
@@ -772,13 +775,24 @@ static inline int hvm_vmtrace_get_option(
=20
     return -EOPNOTSUPP;
 }
+#else
+/*
+ * Function declaration(s) here are used without definition(s) to make com=
piler
+ * happy when VMTRACE=3Dn, compiler DCE will eliminate unused code.
+ */
+int hvm_vmtrace_output_position(struct vcpu *v, uint64_t *pos);
+#endif
=20
 static inline int hvm_vmtrace_reset(struct vcpu *v)
 {
+#ifdef CONFIG_VMTRACE
     if ( hvm_funcs.vmtrace_reset )
         return alternative_call(hvm_funcs.vmtrace_reset, v);
=20
     return -EOPNOTSUPP;
+#else
+    return -EOPNOTSUPP;
+#endif
 }
=20
 /*
@@ -934,28 +948,6 @@ static inline bool hvm_has_set_descriptor_access_exiti=
ng(void)
     return false;
 }
=20
-static inline int hvm_vmtrace_control(struct vcpu *v, bool enable, bool re=
set)
-{
-    return -EOPNOTSUPP;
-}
-
-static inline int hvm_vmtrace_output_position(struct vcpu *v, uint64_t *po=
s)
-{
-    return -EOPNOTSUPP;
-}
-
-static inline int hvm_vmtrace_set_option(
-    struct vcpu *v, uint64_t key, uint64_t value)
-{
-    return -EOPNOTSUPP;
-}
-
-static inline int hvm_vmtrace_get_option(
-    struct vcpu *v, uint64_t key, uint64_t *value)
-{
-    return -EOPNOTSUPP;
-}
-
 static inline uint64_t hvm_get_reg(struct vcpu *v, unsigned int reg)
 {
     ASSERT_UNREACHABLE();
diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h b/xen/arch/x86/include=
/asm/hvm/vmx/vmcs.h
index 8ff7c8045fc6..879ec10cefd0 100644
--- a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h
+++ b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h
@@ -154,8 +154,10 @@ struct vmx_vcpu {
     /* Do we need to tolerate a spurious EPT_MISCONFIG VM exit? */
     bool                 ept_spurious_misconfig;
=20
+#ifdef CONFIG_VMTRACE
     /* Processor Trace configured and enabled for the vcpu. */
     bool                 ipt_active;
+#endif
=20
     /* Is the guest in real mode? */
     uint8_t              vmx_realmode;
diff --git a/xen/arch/x86/mm/mem_sharing.c b/xen/arch/x86/mm/mem_sharing.c
index 4787b2796479..074f1b2562b3 100644
--- a/xen/arch/x86/mm/mem_sharing.c
+++ b/xen/arch/x86/mm/mem_sharing.c
@@ -1888,7 +1888,9 @@ static int fork(struct domain *cd, struct domain *d)
         domain_pause(d);
         cd->max_pages =3D d->max_pages;
         *cd->arch.cpu_policy =3D *d->arch.cpu_policy;
+#ifdef CONFIG_VMTRACE
         cd->vmtrace_size =3D d->vmtrace_size;
+#endif
         cd->parent =3D d;
     }
=20
diff --git a/xen/arch/x86/vm_event.c b/xen/arch/x86/vm_event.c
index fc349270b9c5..112d2ef66dc7 100644
--- a/xen/arch/x86/vm_event.c
+++ b/xen/arch/x86/vm_event.c
@@ -253,7 +253,9 @@ void vm_event_fill_regs(vm_event_request_t *req)
     req->data.regs.x86.shadow_gs =3D ctxt.shadow_gs;
     req->data.regs.x86.dr6 =3D ctxt.dr6;
=20
-    if ( hvm_vmtrace_output_position(curr, &req->data.regs.x86.vmtrace_pos=
) !=3D 1 )
+    if ( IS_ENABLED(CONFIG_VMTRACE) &&
+         hvm_vmtrace_output_position(curr,
+                                     &req->data.regs.x86.vmtrace_pos) !=3D=
 1 )
         req->data.regs.x86.vmtrace_pos =3D ~0;
 #endif
 }
@@ -303,12 +305,12 @@ void vm_event_emulate_check(struct vcpu *v, vm_event_=
response_t *rsp)
 #endif
 }
=20
+#ifdef CONFIG_VMTRACE
 void vm_event_reset_vmtrace(struct vcpu *v)
 {
-#ifdef CONFIG_HVM
     hvm_vmtrace_reset(v);
-#endif
 }
+#endif
=20
 /*
  * Local variables:
diff --git a/xen/common/domain.c b/xen/common/domain.c
index e13e01c1d272..ce4f55339fb4 100644
--- a/xen/common/domain.c
+++ b/xen/common/domain.c
@@ -136,7 +136,9 @@ struct vcpu *idle_vcpu[NR_CPUS] __read_mostly;
=20
 vcpu_info_t dummy_vcpu_info;
=20
+#ifdef CONFIG_VMTRACE
 bool __read_mostly vmtrace_available;
+#endif
=20
 bool __read_mostly vpmu_is_available;
=20
@@ -318,6 +320,7 @@ static void vcpu_info_reset(struct vcpu *v)
=20
 static void vmtrace_free_buffer(struct vcpu *v)
 {
+#ifdef CONFIG_VMTRACE
     const struct domain *d =3D v->domain;
     struct page_info *pg =3D v->vmtrace.pg;
     unsigned int i;
@@ -332,10 +335,12 @@ static void vmtrace_free_buffer(struct vcpu *v)
         put_page_alloc_ref(&pg[i]);
         put_page_and_type(&pg[i]);
     }
+#endif
 }
=20
 static int vmtrace_alloc_buffer(struct vcpu *v)
 {
+#ifdef CONFIG_VMTRACE
     struct domain *d =3D v->domain;
     struct page_info *pg;
     unsigned int i;
@@ -377,6 +382,9 @@ static int vmtrace_alloc_buffer(struct vcpu *v)
     }
=20
     return -ENODATA;
+#else
+    return 0;
+#endif
 }
=20
 /*
@@ -825,7 +833,9 @@ struct domain *domain_create(domid_t domid,
         ASSERT(!config->altp2m.nr);
 #endif
=20
+#ifdef CONFIG_VMTRACE
         d->vmtrace_size =3D config->vmtrace_size;
+#endif
     }
=20
     /* Sort out our idea of is_control_domain(). */
diff --git a/xen/common/memory.c b/xen/common/memory.c
index 3688e6dd5032..66dc7f7a0a41 100644
--- a/xen/common/memory.c
+++ b/xen/common/memory.c
@@ -1155,8 +1155,10 @@ static unsigned int resource_max_frames(const struct=
 domain *d,
     case XENMEM_resource_ioreq_server:
         return ioreq_server_max_frames(d);
=20
+#ifdef CONFIG_VMTRACE
     case XENMEM_resource_vmtrace_buf:
         return d->vmtrace_size >> PAGE_SHIFT;
+#endif
=20
     default:
         return 0;
@@ -1198,6 +1200,7 @@ static int acquire_ioreq_server(struct domain *d,
 #endif
 }
=20
+#ifdef CONFIG_VMTRACE
 static int acquire_vmtrace_buf(
     struct domain *d, unsigned int id, unsigned int frame,
     unsigned int nr_frames, xen_pfn_t mfn_list[])
@@ -1220,6 +1223,7 @@ static int acquire_vmtrace_buf(
=20
     return nr_frames;
 }
+#endif
=20
 /*
  * Returns -errno on error, or positive in the range [1, nr_frames] on
@@ -1238,8 +1242,10 @@ static int _acquire_resource(
     case XENMEM_resource_ioreq_server:
         return acquire_ioreq_server(d, id, frame, nr_frames, mfn_list);
=20
+#ifdef CONFIG_VMTRACE
     case XENMEM_resource_vmtrace_buf:
         return acquire_vmtrace_buf(d, id, frame, nr_frames, mfn_list);
+#endif
=20
     default:
         ASSERT_UNREACHABLE();
diff --git a/xen/common/vm_event.c b/xen/common/vm_event.c
index b2787c010890..cf0258223f50 100644
--- a/xen/common/vm_event.c
+++ b/xen/common/vm_event.c
@@ -441,7 +441,8 @@ static int vm_event_resume(struct domain *d, struct vm_=
event_domain *ved)
             if ( rsp.flags & VM_EVENT_FLAG_GET_NEXT_INTERRUPT )
                 vm_event_monitor_next_interrupt(v);
=20
-            if ( rsp.flags & VM_EVENT_FLAG_RESET_VMTRACE )
+            if ( IS_ENABLED(CONFIG_VMTRACE) &&
+                 (rsp.flags & VM_EVENT_FLAG_RESET_VMTRACE) )
                 vm_event_reset_vmtrace(v);
=20
             if ( rsp.flags & VM_EVENT_FLAG_VCPU_PAUSED )
diff --git a/xen/include/xen/domain.h b/xen/include/xen/domain.h
index 8aab05ae93c8..aa86a9f46022 100644
--- a/xen/include/xen/domain.h
+++ b/xen/include/xen/domain.h
@@ -191,7 +191,11 @@ void vnuma_destroy(struct vnuma_info *vnuma);
 static inline void vnuma_destroy(struct vnuma_info *vnuma) { ASSERT(!vnuma=
); }
 #endif
=20
+#ifdef CONFIG_VMTRACE
 extern bool vmtrace_available;
+#else
+#define vmtrace_available false
+#endif
=20
 extern bool vpmu_is_available;
=20
diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h
index 02bdc256ce37..dcd8647e0d36 100644
--- a/xen/include/xen/sched.h
+++ b/xen/include/xen/sched.h
@@ -300,9 +300,11 @@ struct vcpu
     /* vPCI per-vCPU area, used to store data for long running operations.=
 */
     struct vpci_vcpu vpci;
=20
+#ifdef CONFIG_VMTRACE
     struct {
         struct page_info *pg; /* One contiguous allocation of d->vmtrace_s=
ize */
     } vmtrace;
+#endif
=20
     struct arch_vcpu arch;
=20
@@ -623,7 +625,9 @@ struct domain
     unsigned int nr_altp2m;    /* Number of altp2m tables. */
 #endif
=20
+#ifdef CONFIG_VMTRACE
     unsigned int vmtrace_size; /* Buffer size in bytes, or 0 to disable. *=
/
+#endif
=20
 #ifdef CONFIG_ARGO
     /* Argo interdomain communication support */
--=20
2.34.1


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Subject: Re: [XEN][PATCH v4] xen/x86: guest_access: optimize raw_x_guest() for
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To: Jan Beulich 
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Hi Jan

On 18.11.25 15:45, Jan Beulich wrote:
> On 18.11.2025 14:08, Grygorii Strashko wrote:
>> On 17.11.25 18:43, Jan Beulich wrote:
>>> On 14.11.2025 15:01, Grygorii Strashko wrote:
>>>> --- a/xen/arch/x86/pv/Makefile
>>>> +++ b/xen/arch/x86/pv/Makefile
>>>> @@ -14,6 +14,10 @@ obj-y += ro-page-fault.o
>>>>    obj-$(CONFIG_PV_SHIM) += shim.o
>>>>    obj-$(CONFIG_TRACEBUFFER) += trace.o
>>>>    obj-y += traps.o
>>>> +obj-$(CONFIG_PV) += usercopy.o
>>>
>>> Just obj-y with the movement.
>>>
>>> However, is the movement (and was the adding of $(CONFIG_PV) in the earlier
>>> version) actually correct? The file also produces copy_{from,to}_unsafe_ll(),
>>> which aren't PV-specific. This may be only a latent issue right now, as we
>>> have only a single use site of copy_from_unsafe(), but those functions need
>>> to remain available. (We may want to arrange for them to be removed when
>>> linking, as long as they're not referenced. But that's a separate topic.)
>>
>> It is confusing that none of build cfg combinations have failed
>> (HVM=y PV=n, HVM=n PV=n) :(
>>
>> copy_to_unsafe_ll()
>> - called from copy_to_unsafe()
>> - copy_to_unsafe() has no users (unreachable, MISRA 2.1?)
>>
>> copy_from_unsafe_ll()
>> - called from copy_from_unsafe()
>> - copy_from_unsafe() called from one place do_invalid_op() with
>>     copy_from_unsafe(,, n = sizeof(bug_insn)).
>>     Due to __builtin_constant_p(n) check the copy_from_unsafe() call
>>     optimized by compiler to
>>     get_unsafe_size(*(uint16_t *)to, from, 2, UA_DROP, ret, 2);
>>
>> as result copy_from_unsafe_ll() is unreachable also (?).
> 
> Yes, these likely all want to become library-like, so they are linked in only
> when actually referenced.
> 
>> If those function are not subject to be removed, the
>>    usercopy.c can't be moved in "x86/pv", Right?
> 
> That's my take, yes.
> 
>> Making copy_{from,to}_unsafe_ll() available for !PV means
>> rewriting usercopy.c in some way, Right?
> 
> "Re-writing" is probably too much, but some adjustments would be needed if
> you want to keep the "unsafe" functions but compile out the "guest" ones.
> It may be possible to compile the file twice, once from x86/pv/ and once
> from x86/, replacing the self-#include near the bottom of the file. The
> former would then produce the "guest" functions, the latter the "unsafe"
> ones.

Below is the difference I came up with, will it work?

diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
index 6e2b17471719..a2017b4600b3 100644
--- a/xen/arch/x86/Makefile
+++ b/xen/arch/x86/Makefile
@@ -71,6 +71,7 @@ obj-y += time.o
  obj-y += traps-setup.o
  obj-y += traps.o
  obj-$(CONFIG_INTEL) += tsx.o
+obj-y += usercopy.o
  obj-y += x86_emulate.o
  obj-$(CONFIG_TBOOT) += tboot.o
  obj-y += hpet.o
diff --git a/xen/arch/x86/pv/Makefile b/xen/arch/x86/pv/Makefile
index 59489cd75af6..1fddfac8303e 100644
--- a/xen/arch/x86/pv/Makefile
+++ b/xen/arch/x86/pv/Makefile
@@ -14,10 +14,7 @@ obj-y += ro-page-fault.o
  obj-$(CONFIG_PV_SHIM) += shim.o
  obj-$(CONFIG_TRACEBUFFER) += trace.o
  obj-y += traps.o
-obj-$(CONFIG_PV) += usercopy.o
+obj-y += usercopy.o
  
  obj-bin-y += dom0_build.init.o
  obj-bin-y += gpr_switch.o
-
-# Allows usercopy.c to include itself
-$(obj)/usercopy.o: CFLAGS-y += -iquote .
diff --git a/xen/arch/x86/pv/usercopy.c b/xen/arch/x86/pv/usercopy.c
index a24b52cc66c1..6ca6eca5d818 100644
--- a/xen/arch/x86/pv/usercopy.c
+++ b/xen/arch/x86/pv/usercopy.c
@@ -64,8 +64,6 @@ unsigned int copy_from_guest_ll(void *to, const void __user *from, unsigned int
      return n;
  }
  
-#if GUARD(1) + 0
-
  /**
   * copy_to_guest_pv: - Copy a block of data into PV guest space.
   * @to:   Destination address, in PV guest space.
@@ -139,16 +137,6 @@ unsigned int copy_from_guest_pv(void *to, const void __user *from,
      return n;
  }
  
-# undef GUARD
-# define GUARD UA_DROP
-# define copy_to_guest_ll copy_to_unsafe_ll
-# define copy_from_guest_ll copy_from_unsafe_ll
-# undef __user
-# define __user
-# include __FILE__
-
-#endif /* GUARD(1) */
-
  /*
   * Local variables:
   * mode: C
diff --git a/xen/arch/x86/usercopy.c b/xen/arch/x86/usercopy.c
new file mode 100644
index 000000000000..9c12eda64181
--- /dev/null
+++ b/xen/arch/x86/usercopy.c
@@ -0,0 +1,77 @@
+/*
+ * User address space access functions.
+ *
+ * Copyright 1997 Andi Kleen 
+ * Copyright 1997 Linus Torvalds
+ * Copyright 2002 Andi Kleen 
+ */
+
+#include 
+#include 
+#include 
+
+# define GUARD UA_DROP
+# define copy_to_guest_ll copy_to_unsafe_ll
+# define copy_from_guest_ll copy_from_unsafe_ll
+# undef __user
+# define __user
+
+unsigned int copy_to_guest_ll(void __user *to, const void *from, unsigned int n)
+{
+    GUARD(unsigned dummy);
+
+    stac();
+    asm_inline volatile (
+        GUARD(
+        "    guest_access_mask_ptr %[to], %q[scratch1], %q[scratch2]\n"
+        )
+        "1:  rep movsb\n"
+        "2:\n"
+        _ASM_EXTABLE(1b, 2b)
+        : [cnt] "+c" (n), [to] "+D" (to), [from] "+S" (from)
+          GUARD(, [scratch1] "=&r" (dummy), [scratch2] "=&r" (dummy))
+        :: "memory" );
+    clac();
+
+    return n;
+}
+
+unsigned int copy_from_guest_ll(void *to, const void __user *from, unsigned int n)
+{
+    unsigned dummy;
+
+    stac();
+    asm_inline volatile (
+        GUARD(
+        "    guest_access_mask_ptr %[from], %q[scratch1], %q[scratch2]\n"
+        )
+        "1:  rep movsb\n"
+        "2:\n"
+        ".section .fixup,\"ax\"\n"
+        "6:  mov  %[cnt], %k[from]\n"
+        "    xchg %%eax, %[aux]\n"
+        "    xor  %%eax, %%eax\n"
+        "    rep stosb\n"
+        "    xchg %[aux], %%eax\n"
+        "    mov  %k[from], %[cnt]\n"
+        "    jmp 2b\n"
+        ".previous\n"
+        _ASM_EXTABLE(1b, 6b)
+        : [cnt] "+c" (n), [to] "+D" (to), [from] "+S" (from),
+          [aux] "=&r" (dummy)
+          GUARD(, [scratch1] "=&r" (dummy), [scratch2] "=&r" (dummy))
+        :: "memory" );
+    clac();
+
+    return n;
+}



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From: Grygorii Strashko 
To: "xen-devel@lists.xenproject.org" 
CC: Sergiy Kibrik , Jan Beulich ,
	Andrew Cooper , =?iso-8859-1?Q?Roger_Pau_Monn=E9?=
	, Paul Durrant , Alejandro Vallejo
	, Jason Andryuk ,
	Grygorii Strashko 
Subject: [XEN][PATCH] x86: make Viridian support optional
Thread-Topic: [XEN][PATCH] x86: make Viridian support optional
Thread-Index: AQHcWYs2Y218dBKOy0uhfhyo74AxFw==
Date: Wed, 19 Nov 2025 19:32:16 +0000
Message-ID: <20251119193215.1012108-1-grygorii_strashko@epam.com>
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From: Sergiy Kibrik 

Add config option VIRIDIAN that covers viridian code within HVM.
Calls to viridian functions guarded by is_viridian_domain() and related mac=
ros.
Having this option may be beneficial by reducing code footprint for systems
that are not using Hyper-V.

[grygorii_strashko@epam.com: fixed NULL pointer deref in
viridian_save_domain_ctxt(); stub viridian_vcpu/domain_init/deinit()]
Signed-off-by: Sergiy Kibrik 
Signed-off-by: Grygorii Strashko 
Reviewed-by: Jason Andryuk =20
---
changes in v8:
- drop checks from viridian_load_vcpu/domain_ctxt()
- drop check "value !=3D 0" in HVM_PARAM_VIRIDIAN handler, laways return
  -ENODEV for VIRIDIAN=3Dn

changes in v7:
- s/!is_viridian_vcpu()/!IS_ENABLED(CONFIG_VIRIDIAN) checks in
  viridian_load_vcpu/domain_ctxt(), because it is not
  guaranteed that HVM_PARAM_VIRIDIAN will be loaded before
  viridian_load_vcpu_ctxt() is called (comment from Jason Andryuk)

changes in v6:
- add stubs for viridian_vcpu/domain_init/deinit()
- update Kconfig description
- make set(HVM_PARAM_VIRIDIAN) return -ENODEV
  if (!IS_ENABLED(CONFIG_VIRIDIAN) && value)

changes in v5:
- drop "depends on AMD_SVM || INTEL_VMX"
- return -EILSEQ from viridian_load_x() if !VIRIDIAN

changes in v4:
- s/HVM_VIRIDIAN/VIRIDIAN
- add "depends on AMD_SVM || INTEL_VMX"
- add guard !is_viridian_vcpu() checks in viridian_load_vcpu_ctxt/viridian_=
load_domain_ctxt

changes in v3:
- fixed NULL pointer deref in viridian_save_domain_ctxt() reported for v2,
  which caused v2 revert by commit 1fffcf10cd71 ("Revert "x86: make Viridia=
n
  support optional")

v7: https://patchwork.kernel.org/project/xen-devel/patch/20251031161716.122=
2956-1-grygorii_strashko@epam.com/
v6: https://patchwork.kernel.org/project/xen-devel/patch/20251023151807.560=
843-1-grygorii_strashko@epam.com/
v5: https://patchwork.kernel.org/project/xen-devel/patch/20250930125215.108=
7214-1-grygorii_strashko@epam.com/
v4: https://patchwork.kernel.org/project/xen-devel/patch/20250919163139.282=
1531-1-grygorii_strashko@epam.com/
v3: https://patchwork.kernel.org/project/xen-devel/patch/20250916134114.221=
4104-1-grygorii_strashko@epam.com/
v2: https://patchwork.kernel.org/project/xen-devel/patch/20250321092633.398=
2645-1-Sergiy_Kibrik@epam.com/

 xen/arch/x86/hvm/Kconfig                | 10 ++++++++++
 xen/arch/x86/hvm/Makefile               |  2 +-
 xen/arch/x86/hvm/hvm.c                  |  5 +++--
 xen/arch/x86/hvm/viridian/viridian.c    |  8 ++++----
 xen/arch/x86/hvm/vlapic.c               | 11 +++++++----
 xen/arch/x86/include/asm/hvm/domain.h   |  2 ++
 xen/arch/x86/include/asm/hvm/hvm.h      |  3 ++-
 xen/arch/x86/include/asm/hvm/vcpu.h     |  2 ++
 xen/arch/x86/include/asm/hvm/viridian.h | 15 +++++++++++++++
 9 files changed, 46 insertions(+), 12 deletions(-)

diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig
index 5e86cac26e1b..5c47a45c9350 100644
--- a/xen/arch/x86/hvm/Kconfig
+++ b/xen/arch/x86/hvm/Kconfig
@@ -75,6 +75,16 @@ config ALTP2M
=20
 	  If unsure, stay with defaults.
=20
+config VIRIDIAN
+	bool "Hyper-V enlightenments for guests" if EXPERT
+	default y
+	help
+	  Support optimizations for Hyper-V guests such as hypercalls, efficient
+	  timers and interrupt handling. This is to improve performance and
+	  compatibility of Windows VMs.
+
+	  If unsure, say Y.
+
 config MEM_PAGING
 	bool "Xen memory paging support (UNSUPPORTED)" if UNSUPPORTED
 	depends on VM_EVENT
diff --git a/xen/arch/x86/hvm/Makefile b/xen/arch/x86/hvm/Makefile
index 6ec2c8f2db56..736eb3f966e9 100644
--- a/xen/arch/x86/hvm/Makefile
+++ b/xen/arch/x86/hvm/Makefile
@@ -1,6 +1,6 @@
 obj-$(CONFIG_AMD_SVM) +=3D svm/
 obj-$(CONFIG_INTEL_VMX) +=3D vmx/
-obj-y +=3D viridian/
+obj-$(CONFIG_VIRIDIAN) +=3D viridian/
=20
 obj-y +=3D asid.o
 obj-y +=3D dm.o
diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 88ad4100001e..7299cfa90ad5 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -4231,8 +4231,9 @@ static int hvm_set_param(struct domain *d, uint32_t i=
ndex, uint64_t value)
             rc =3D -EINVAL;
         break;
     case HVM_PARAM_VIRIDIAN:
-        if ( (value & ~HVMPV_feature_mask) ||
-             !(value & HVMPV_base_freq) )
+        if ( !IS_ENABLED(CONFIG_VIRIDIAN) )
+            rc =3D -ENODEV;
+        else if ( (value & ~HVMPV_feature_mask) || !(value & HVMPV_base_fr=
eq) )
             rc =3D -EINVAL;
         break;
     case HVM_PARAM_IDENT_PT:
diff --git a/xen/arch/x86/hvm/viridian/viridian.c b/xen/arch/x86/hvm/viridi=
an/viridian.c
index f79cffcb3767..90e749ceb581 100644
--- a/xen/arch/x86/hvm/viridian/viridian.c
+++ b/xen/arch/x86/hvm/viridian/viridian.c
@@ -1097,14 +1097,14 @@ static int cf_check viridian_save_domain_ctxt(
 {
     const struct domain *d =3D v->domain;
     const struct viridian_domain *vd =3D d->arch.hvm.viridian;
-    struct hvm_viridian_domain_context ctxt =3D {
-        .hypercall_gpa =3D vd->hypercall_gpa.raw,
-        .guest_os_id =3D vd->guest_os_id.raw,
-    };
+    struct hvm_viridian_domain_context ctxt =3D {};
=20
     if ( !is_viridian_domain(d) )
         return 0;
=20
+    ctxt.hypercall_gpa =3D vd->hypercall_gpa.raw;
+    ctxt.guest_os_id =3D vd->guest_os_id.raw,
+
     viridian_time_save_domain_ctxt(d, &ctxt);
     viridian_synic_save_domain_ctxt(d, &ctxt);
=20
diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c
index 4121285daef8..b315e56d3f18 100644
--- a/xen/arch/x86/hvm/vlapic.c
+++ b/xen/arch/x86/hvm/vlapic.c
@@ -447,7 +447,8 @@ void vlapic_EOI_set(struct vlapic *vlapic)
      * priority vector and then recurse to handle the lower priority
      * vector.
      */
-    bool missed_eoi =3D viridian_apic_assist_completed(v);
+    bool missed_eoi =3D has_viridian_apic_assist(v->domain) &&
+                      viridian_apic_assist_completed(v);
     int vector;
=20
  again:
@@ -463,7 +464,7 @@ void vlapic_EOI_set(struct vlapic *vlapic)
      * NOTE: It is harmless to call viridian_apic_assist_clear() on a
      *       recursion, even though it is not necessary.
      */
-    if ( !missed_eoi )
+    if ( has_viridian_apic_assist(v->domain) && !missed_eoi )
         viridian_apic_assist_clear(v);
=20
     vlapic_clear_vector(vector, &vlapic->regs->data[APIC_ISR]);
@@ -1375,7 +1376,8 @@ int vlapic_has_pending_irq(struct vcpu *v)
      * If so, we need to emulate the EOI here before comparing ISR
      * with IRR.
      */
-    if ( viridian_apic_assist_completed(v) )
+    if ( has_viridian_apic_assist(v->domain) &&
+         viridian_apic_assist_completed(v) )
         vlapic_EOI_set(vlapic);
=20
     isr =3D vlapic_find_highest_isr(vlapic);
@@ -1388,7 +1390,8 @@ int vlapic_has_pending_irq(struct vcpu *v)
     if ( isr >=3D 0 &&
          (irr & 0xf0) <=3D (isr & 0xf0) )
     {
-        viridian_apic_assist_clear(v);
+        if ( has_viridian_apic_assist(v->domain) )
+            viridian_apic_assist_clear(v);
         return -1;
     }
=20
diff --git a/xen/arch/x86/include/asm/hvm/domain.h b/xen/arch/x86/include/a=
sm/hvm/domain.h
index 94d19730b2c1..83be2bd1c29c 100644
--- a/xen/arch/x86/include/asm/hvm/domain.h
+++ b/xen/arch/x86/include/asm/hvm/domain.h
@@ -105,7 +105,9 @@ struct hvm_domain {
     /* hypervisor intercepted msix table */
     struct list_head       msixtbl_list;
=20
+#ifdef CONFIG_VIRIDIAN
     struct viridian_domain *viridian;
+#endif
=20
     /*
      * TSC value that VCPUs use to calculate their tsc_offset value.
diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/=
hvm/hvm.h
index 927427764c9e..93da4dd2dc4b 100644
--- a/xen/arch/x86/include/asm/hvm/hvm.h
+++ b/xen/arch/x86/include/asm/hvm/hvm.h
@@ -514,7 +514,8 @@ hvm_get_cpl(struct vcpu *v)
     (has_hvm_params(d) ? (d)->arch.hvm.params[HVM_PARAM_VIRIDIAN] : 0)
=20
 #define is_viridian_domain(d) \
-    (is_hvm_domain(d) && (viridian_feature_mask(d) & HVMPV_base_freq))
+    (IS_ENABLED(CONFIG_VIRIDIAN) && \
+     is_hvm_domain(d) && (viridian_feature_mask(d) & HVMPV_base_freq))
=20
 #define is_viridian_vcpu(v) \
     is_viridian_domain((v)->domain)
diff --git a/xen/arch/x86/include/asm/hvm/vcpu.h b/xen/arch/x86/include/asm=
/hvm/vcpu.h
index 3cf7a71fd309..eae9ac53767b 100644
--- a/xen/arch/x86/include/asm/hvm/vcpu.h
+++ b/xen/arch/x86/include/asm/hvm/vcpu.h
@@ -173,7 +173,9 @@ struct hvm_vcpu {
     /* Pending hw/sw interrupt (.vector =3D -1 means nothing pending). */
     struct x86_event     inject_event;
=20
+#ifdef CONFIG_VIRIDIAN
     struct viridian_vcpu *viridian;
+#endif
 };
=20
 #endif /* __ASM_X86_HVM_VCPU_H__ */
diff --git a/xen/arch/x86/include/asm/hvm/viridian.h b/xen/arch/x86/include=
/asm/hvm/viridian.h
index 47c9d13841ac..07ea95d4ae6e 100644
--- a/xen/arch/x86/include/asm/hvm/viridian.h
+++ b/xen/arch/x86/include/asm/hvm/viridian.h
@@ -86,11 +86,26 @@ viridian_hypercall(struct cpu_user_regs *regs);
 void viridian_time_domain_freeze(const struct domain *d);
 void viridian_time_domain_thaw(const struct domain *d);
=20
+#if defined(CONFIG_VIRIDIAN)
 int viridian_vcpu_init(struct vcpu *v);
 int viridian_domain_init(struct domain *d);
=20
 void viridian_vcpu_deinit(struct vcpu *v);
 void viridian_domain_deinit(struct domain *d);
+#else
+static inline int viridian_vcpu_init(struct vcpu *v)
+{
+    return 0;
+}
+
+static inline int viridian_domain_init(struct domain *d)
+{
+    return 0;
+}
+
+static inline void viridian_vcpu_deinit(struct vcpu *v) {}
+static inline void viridian_domain_deinit(struct domain *d) {}
+#endif
=20
 void viridian_apic_assist_set(const struct vcpu *v);
 bool viridian_apic_assist_completed(const struct vcpu *v);
--=20
2.34.1


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From: Jason Andryuk 
To: Juergen Gross , Stefano Stabellini
	, Oleksandr Tyshchenko
	
CC: Yann Sionneau , Jason Andryuk
	, ,
	
Subject: [PATCH 1/2] xenbus: Use .freeze/.thaw to handle xenbus devices
Date: Wed, 19 Nov 2025 17:47:29 -0500
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The goal is to fix s2idle and S3 for Xen PV devices.  A domain resuming
from s3 or s2idle disconnects its PV devices during resume.  The
backends are not expecting this and do not reconnect.

b3e96c0c7562 ("xen: use freeze/restore/thaw PM events for suspend/
resume/chkpt") changed xen_suspend()/do_suspend() from
PMSG_SUSPEND/PMSG_RESUME to PMSG_FREEZE/PMSG_THAW/PMSG_RESTORE, but the
suspend/resume callbacks remained.

.freeze/restore are used with hiberation where Linux restarts in a new
place in the future.  .suspend/resume are useful for runtime power
management for the duration of a boot.

The current behavior of the callbacks works for an xl save/restore or
live migration where the domain is restored/migrated to a new location
and connecting to a not-already-connected backend.

Change xenbus_pm_ops to use .freeze/thaw/restore and drop the
.suspend/resume hook.  This matches the use in drivers/xen/manage.c for
save/restore and live migration.  With .suspend/resume empty, PV devices
are left connected during s2idle and s3, so PV devices are not changed
and work after resume.

Signed-off-by: Jason Andryuk 
---
 drivers/xen/xenbus/xenbus_probe_frontend.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/xen/xenbus/xenbus_probe_frontend.c b/drivers/xen/xenbus/xenbus_probe_frontend.c
index 6d1819269cbe..199917b6f77c 100644
--- a/drivers/xen/xenbus/xenbus_probe_frontend.c
+++ b/drivers/xen/xenbus/xenbus_probe_frontend.c
@@ -148,11 +148,9 @@ static void xenbus_frontend_dev_shutdown(struct device *_dev)
 }
 
 static const struct dev_pm_ops xenbus_pm_ops = {
-	.suspend	= xenbus_dev_suspend,
-	.resume		= xenbus_frontend_dev_resume,
 	.freeze		= xenbus_dev_suspend,
 	.thaw		= xenbus_dev_cancel,
-	.restore	= xenbus_dev_resume,
+	.restore	= xenbus_frontend_dev_resume,
 };
 
 static struct xen_bus_type xenbus_frontend = {
-- 
2.34.1



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From: Jason Andryuk 
To: Juergen Gross , Stefano Stabellini
	, Oleksandr Tyshchenko
	
CC: Yann Sionneau , Jason Andryuk
	, ,
	
Subject: [PATCH 2/2] xenbus: Rename helpers to freeze/thaw/restore
Date: Wed, 19 Nov 2025 17:47:30 -0500
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Rename the xenbus helpers called from the .freeze, .thaw, and .restore
pm ops to have matching names.

Signed-off-by: Jason Andryuk 
---
We could continue renaming and change struct xenbus_driver
.suspend/.resume to .freeze/.restore.  Thereis only the single callback,
and it would be more churn, so I did not do it.
---
 drivers/xen/xenbus/xenbus.h                |  6 +++---
 drivers/xen/xenbus/xenbus_probe.c          | 22 +++++++++++-----------
 drivers/xen/xenbus/xenbus_probe_frontend.c | 16 ++++++++--------
 3 files changed, 22 insertions(+), 22 deletions(-)

diff --git a/drivers/xen/xenbus/xenbus.h b/drivers/xen/xenbus/xenbus.h
index 9ac0427724a3..daba7f5e05c4 100644
--- a/drivers/xen/xenbus/xenbus.h
+++ b/drivers/xen/xenbus/xenbus.h
@@ -120,9 +120,9 @@ int xenbus_probe_devices(struct xen_bus_type *bus);
 
 void xenbus_dev_changed(const char *node, struct xen_bus_type *bus);
 
-int xenbus_dev_suspend(struct device *dev);
-int xenbus_dev_resume(struct device *dev);
-int xenbus_dev_cancel(struct device *dev);
+int xenbus_dev_freeze(struct device *dev);
+int xenbus_dev_restore(struct device *dev);
+int xenbus_dev_thaw(struct device *dev);
 
 void xenbus_otherend_changed(struct xenbus_watch *watch,
 			     const char *path, const char *token,
diff --git a/drivers/xen/xenbus/xenbus_probe.c b/drivers/xen/xenbus/xenbus_probe.c
index 86fe6e779056..9f9011cd7447 100644
--- a/drivers/xen/xenbus/xenbus_probe.c
+++ b/drivers/xen/xenbus/xenbus_probe.c
@@ -668,7 +668,7 @@ void xenbus_dev_changed(const char *node, struct xen_bus_type *bus)
 }
 EXPORT_SYMBOL_GPL(xenbus_dev_changed);
 
-int xenbus_dev_suspend(struct device *dev)
+int xenbus_dev_freeze(struct device *dev)
 {
 	int err = 0;
 	struct xenbus_driver *drv;
@@ -683,12 +683,12 @@ int xenbus_dev_suspend(struct device *dev)
 	if (drv->suspend)
 		err = drv->suspend(xdev);
 	if (err)
-		dev_warn(dev, "suspend failed: %i\n", err);
+		dev_warn(dev, "freeze failed: %i\n", err);
 	return 0;
 }
-EXPORT_SYMBOL_GPL(xenbus_dev_suspend);
+EXPORT_SYMBOL_GPL(xenbus_dev_freeze);
 
-int xenbus_dev_resume(struct device *dev)
+int xenbus_dev_restore(struct device *dev)
 {
 	int err;
 	struct xenbus_driver *drv;
@@ -702,7 +702,7 @@ int xenbus_dev_resume(struct device *dev)
 	drv = to_xenbus_driver(dev->driver);
 	err = talk_to_otherend(xdev);
 	if (err) {
-		dev_warn(dev, "resume (talk_to_otherend) failed: %i\n", err);
+		dev_warn(dev, "restore (talk_to_otherend) failed: %i\n", err);
 		return err;
 	}
 
@@ -711,28 +711,28 @@ int xenbus_dev_resume(struct device *dev)
 	if (drv->resume) {
 		err = drv->resume(xdev);
 		if (err) {
-			dev_warn(dev, "resume failed: %i\n", err);
+			dev_warn(dev, "restore failed: %i\n", err);
 			return err;
 		}
 	}
 
 	err = watch_otherend(xdev);
 	if (err) {
-		dev_warn(dev, "resume (watch_otherend) failed: %d\n", err);
+		dev_warn(dev, "restore (watch_otherend) failed: %d\n", err);
 		return err;
 	}
 
 	return 0;
 }
-EXPORT_SYMBOL_GPL(xenbus_dev_resume);
+EXPORT_SYMBOL_GPL(xenbus_dev_restore);
 
-int xenbus_dev_cancel(struct device *dev)
+int xenbus_dev_thaw(struct device *dev)
 {
 	/* Do nothing */
-	DPRINTK("cancel");
+	DPRINTK("thaw");
 	return 0;
 }
-EXPORT_SYMBOL_GPL(xenbus_dev_cancel);
+EXPORT_SYMBOL_GPL(xenbus_dev_thaw);
 
 /* A flag to determine if xenstored is 'ready' (i.e. has started) */
 int xenstored_ready;
diff --git a/drivers/xen/xenbus/xenbus_probe_frontend.c b/drivers/xen/xenbus/xenbus_probe_frontend.c
index 199917b6f77c..f04707d1f667 100644
--- a/drivers/xen/xenbus/xenbus_probe_frontend.c
+++ b/drivers/xen/xenbus/xenbus_probe_frontend.c
@@ -91,14 +91,14 @@ static void backend_changed(struct xenbus_watch *watch,
 	xenbus_otherend_changed(watch, path, token, 1);
 }
 
-static void xenbus_frontend_delayed_resume(struct work_struct *w)
+static void xenbus_frontend_delayed_restore(struct work_struct *w)
 {
 	struct xenbus_device *xdev = container_of(w, struct xenbus_device, work);
 
-	xenbus_dev_resume(&xdev->dev);
+	xenbus_dev_restore(&xdev->dev);
 }
 
-static int xenbus_frontend_dev_resume(struct device *dev)
+static int xenbus_frontend_dev_restore(struct device *dev)
 {
 	/*
 	 * If xenstored is running in this domain, we cannot access the backend
@@ -112,14 +112,14 @@ static int xenbus_frontend_dev_resume(struct device *dev)
 		return 0;
 	}
 
-	return xenbus_dev_resume(dev);
+	return xenbus_dev_restore(dev);
 }
 
 static int xenbus_frontend_dev_probe(struct device *dev)
 {
 	if (xen_store_domain_type == XS_LOCAL) {
 		struct xenbus_device *xdev = to_xenbus_device(dev);
-		INIT_WORK(&xdev->work, xenbus_frontend_delayed_resume);
+		INIT_WORK(&xdev->work, xenbus_frontend_delayed_restore);
 	}
 
 	return xenbus_dev_probe(dev);
@@ -148,9 +148,9 @@ static void xenbus_frontend_dev_shutdown(struct device *_dev)
 }
 
 static const struct dev_pm_ops xenbus_pm_ops = {
-	.freeze		= xenbus_dev_suspend,
-	.thaw		= xenbus_dev_cancel,
-	.restore	= xenbus_frontend_dev_resume,
+	.freeze		= xenbus_dev_freeze,
+	.thaw		= xenbus_dev_thaw,
+	.restore	= xenbus_frontend_dev_restore,
 };
 
 static struct xen_bus_type xenbus_frontend = {
-- 
2.34.1



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Message-ID: <596ea613-5f09-42cf-88e3-0cb7a4220ff1@amd.com>
Date: Wed, 19 Nov 2025 17:48:01 -0500
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Subject: Re: domU suspend issue - freeze processes failed - Linux 6.16
To: Yann Sionneau , 
References:  
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From: Jason Andryuk 
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On 2025-11-13 10:55, Yann Sionneau wrote:
> On 10/6/25 16:28, Jason Andryuk wrote:
>> On 2025-09-24 10:28, Yann Sionneau wrote:
>>> On 9/24/25 15:30, Marek Marczykowski-Górecki wrote:
>>>> On Wed, Sep 24, 2025 at 01:17:15PM +0300, Grygorii Strashko wrote:
>>>>>
>>>>>
>>>>> On 22.09.25 13:09, Marek Marczykowski-Górecki wrote:
>>>>>> On Fri, Aug 22, 2025 at 08:42:30PM +0200, Marek Marczykowski-
>>>>>> Górecki wrote:
>>>>>>> On Fri, Aug 22, 2025 at 05:27:20PM +0200, Jürgen Groß wrote:
>>>>>>>> On 22.08.25 16:42, Marek Marczykowski-Górecki wrote:
>>>>>>>>> On Fri, Aug 22, 2025 at 04:39:33PM +0200, Marek Marczykowski-
>>>>>>>>> Górecki wrote:
>>>>>>>>>> Hi,
>>>>>>>>>>
>>>>>>>>>> When suspending domU I get the following issue:
>>>>>>>>>>
>>>>>>>>>>          Freezing user space processes
>>>>>>>>>>          Freezing user space processes failed after 20.004
>>>>>>>>>> seconds (1 tasks refusing to freeze, wq_busy=0):
>>>>>>>>>>          task:xl              state:D stack:0     pid:466
>>>>>>>>>> tgid:466   ppid:1      task_flags:0x400040 flags:0x00004006
>>>>>>>>>>          Call Trace:
>>>>>>>>>>           
>>>>>>>>>>           __schedule+0x2f3/0x780
>>>>>>>>>>           schedule+0x27/0x80
>>>>>>>>>>           schedule_preempt_disabled+0x15/0x30
>>>>>>>>>>           __mutex_lock.constprop.0+0x49f/0x880
>>>>>>>>>>           unregister_xenbus_watch+0x216/0x230
>>>>>>>>>>           xenbus_write_watch+0xb9/0x220
>>>>>>>>>>           xenbus_file_write+0x131/0x1b0
>>>>>>>>>>           vfs_writev+0x26c/0x3d0
>>>>>>>>>>           ? do_writev+0xeb/0x110
>>>>>>>>>>           do_writev+0xeb/0x110
>>>>>>>>>>           do_syscall_64+0x84/0x2c0
>>>>>>>>>>           ? do_syscall_64+0x200/0x2c0
>>>>>>>>>>           ? generic_handle_irq+0x3f/0x60
>>>>>>>>>>           ? syscall_exit_work+0x108/0x140
>>>>>>>>>>           ? do_syscall_64+0x200/0x2c0
>>>>>>>>>>           ? __irq_exit_rcu+0x4c/0xe0
>>>>>>>>>>           entry_SYSCALL_64_after_hwframe+0x76/0x7e
>>>>>>>>>>          RIP: 0033:0x79b618138642
>>>>>>>>>>          RSP: 002b:00007fff9a192fc8 EFLAGS: 00000246 ORIG_RAX:
>>>>>>>>>> 0000000000000014
>>>>>>>>>>          RAX: ffffffffffffffda RBX: 00000000024fd490 RCX:
>>>>>>>>>> 000079b618138642
>>>>>>>>>>          RDX: 0000000000000003 RSI: 00007fff9a193120 RDI:
>>>>>>>>>> 0000000000000014
>>>>>>>>>>          RBP: 00007fff9a193000 R08: 0000000000000000 R09:
>>>>>>>>>> 0000000000000000
>>>>>>>>>>          R10: 0000000000000000 R11: 0000000000000246 R12:
>>>>>>>>>> 0000000000000014
>>>>>>>>>>          R13: 00007fff9a193120 R14: 0000000000000003 R15:
>>>>>>>>>> 0000000000000000
>>>>>>>>>>           
>>>>>>>>>>          OOM killer enabled.
>>>>>>>>>>          Restarting tasks: Starting
>>>>>>>>>>          Restarting tasks: Done
>>>>>>>>>>          xen:manage: do_suspend: freeze processes failed -16
>>>>>>>>>>
>>>>>>>>>> The process in question is `xl devd` daemon. It's a domU serving a
>>>>>>>>>> xenvif backend.
>>>>>>>>>>
>>>>>>>>>> I noticed it on 6.16.1, but looking at earlier test logs I see
>>>>>>>>>> it with
>>>>>>>>>> 6.16-rc6 already (but interestingly, not 6.16-rc2 yet? feels
>>>>>>>>>> weird given
>>>>>>>>>> seemingly no relevant changes between rc2 and rc6).
>>>>>>>>>
>>>>>>>>> I forgot to include link for (a little) more details:
>>>>>>>>> https://github.com/QubesOS/qubes-linux-kernel/pull/1157
>>>>>>>>>
>>>>>>>>> Especially, there is another call trace with panic_on_warn
>>>>>>>>> enabled -
>>>>>>>>> slightly different, but looks related.
>>>>>>>>>
>>>>>>>>
>>>>>>>> I'm pretty sure the PV variant for suspending is just wrong: it
>>>>>>>> is calling
>>>>>>>> dpm_suspend_start() from do_suspend() without taking the required
>>>>>>>> system_transition_mutex, resulting in the WARN() in
>>>>>>>> pm_restrict_gfp_mask().
>>>>>>>>
>>>>>>>> It might be as easy as just adding the mutex() call to
>>>>>>>> do_suspend(), but I'm
>>>>>>>> really not sure that will be a proper fix.
>>>>>>>
>>>>>>> Hm, this might explain the second call trace, but not the freeze
>>>>>>> failure
>>>>>>> quoted here above, I think?
>>>>>>
>>>>>> While the patch I sent appears to fix this particular issue, it
>>>>>> made me
>>>>>> wonder: is there any fundamental reason why do_suspend() is not using
>>>>>> pm_suspend() and register Xen-specific actions via
>>>>>> platform_suspend_ops
>>>>>> (and maybe syscore_ops)? From a brief look at the code, it should
>>>>>> theoretically be possible, and should avoid issues like this.
>>>>>>
>>>>>> I tried to do a quick&dirty attempt at that[1], and it failed
>>>>>> (panic). I
>>>>>> surely made several mistakes there (and also left a ton of todo
>>>>>> comments). But before spending any more time at that, I'd like to ask
>>>>>> if this is a viable option at all.
>>>>>
>>>>> I think it might, but be careful with this, because there are two
>>>>> "System Low power" paths in Linux
>>>>> 1) Suspend2RAM and Co
>>>>> 2) Hybernation
>>>>>
>>>>> While "Suspend2RAM and Co" path is relatively straight forward and
>>>>> expected to be always
>>>>> started through pm_suspend(). In general, it's expected to happen
>>>>>     - from sysfs (User space)
>>>>>     - from autosuspend (wakelocks).
>>>>>
>>>>> the "hibernation" path is more complicated:(
>>>>> - Genuine Linux hybernation hibernate()/hibernate_quiet_exec()
>>>>
>>>> IIUC hibernation is very different as it puts Linux in charge of dumping
>>>> all the state to the disk. In case of Xen, the primary use case for
>>>> suspend is preparing VM for Xen toolstack serializing its state to disk
>>>> (or migrating to another host).
>>>> Additionally, VM suspend may be used as preparation for host suspend
>>>> (this is what I actually do here). This is especially relevant if the VM
>>>> has some PCI passthrough - to properly suspend (and resume) devices
>>>> across host suspend.
>>>>
>>>>> I'm not sure what path Xen originally implemented :( It seems like
>>>>> "suspend2RAM",
>>>>> but, at the same time "hybernation" specific staff is used, like
>>>>> PMSG_FREEZE/PMSG_THAW/PMSG_RESTORE.
>>>>> As result, Linux suspend/hybernation code moves forward while Xen
>>>>> stays behind and unsync.
>>>>
>>>> Yeah, I think it's supposed to be suspend2RAM. TBH the
>>>> PMSG_FREEZE/PMSG_THAW/PMSG_RESTORE confuses me too and Qubes OS has a
>>>> patch[2] to switch it to PMSG_SUSPEND/PMSG_RESUME.
>>>>
>>>>> So it sounds reasonable to avoid custom implementation, but may be
>>>>> not easy :(
>>>>>
>>>>> Suspending Xen features can be split between suspend stages, but
>>>>> not sure if platform_suspend_ops can be used.
>>>>>
>>>>> Generic suspend stages list
>>>>> - freeze
>>>>> - prepare
>>>>> - suspend
>>>>> - suspend_late
>>>>> - suspend_noirq (SPIs disabled, except wakeups)
>>>>>      [most of Xen specific staff has to be suspended at this point]
>>>>> - disable_secondary_cpus
>>>>> - arch disable IRQ (from this point no IRQs allowed, no timers, no
>>>>> scheduling)
>>>>> - syscore_suspend
>>>>>      [rest here]
>>>>> - platform->enter() (suspended)
>>>>>
>>>>> You can't just overwrite platform_suspend_ops, because ARM64 is
>>>>> expected to enter
>>>>> suspend through PSCI FW interface:
>>>>> drivers/firmware/psci/psci.c
>>>>>     static const struct platform_suspend_ops psci_suspend_ops = {
>>>>
>>>> Does this apply to a VM on ARM64 too? At least on x86, the VM is
>>>> supposed to make a hypercall to tell Xen it suspended (the hypercall
>>>> will return only on resume).
>>>>
>>>>> As an option, some Xen components could be converted to use
>>>>> syscore_ops (but not xenstore),
>>>>> and some might need to use DD(dev_pm_ops).
>>>>>
>>>>>>
>>>>>> [1] https://github.com/marmarek/linux/
>>>>>> commit/47cfdb991c85566c9c333570511e67bf477a5da6
>>>>>
>>>>> -- 
>>>>> Best regards,
>>>>> -grygorii
>>>>>
>>>>
>>>> [2] https://github.com/QubesOS/qubes-linux-kernel/blob/main/xen-pm-
>>>> use-suspend.patch
>>>>
>>>
>>> On my setup I get a weird behavior when trying to suspend (s2idle) a
>>> Linux guest.
>>> Doing echo freeze > /sys/power/state in the guest seems to "freeze" the
>>> guest for good, I could not unfreeze it afterward.
>>> VCPU goes to 100% according to XenOrchestra
>>> xl list shows state "r" but xl console blocks forever
>>> xl shutdown would block for some time and then print:
>>> Shutting down domain 721
>>> ?ibxl: error: libxl_domain.c:848:pvcontrol_cb: guest didn't acknowledge
>>> control request: -9
>>> shutdown failed (rc=-9)
>>>
>>> Do you think it's related to your current issue?
>>
>> idle=halt on the Linux command line addresses the 100% CPU usage.  Or
>> alternatively C2 needs to be implemented for guest vcpus.  I forget
>> preceisely, but I think the 100% CPU is because there are no C-states
>> available and Linux/cpuidle won't use halt by default.
>>
>> To wake up, you need a wake up source.  The ACPI buttons presses will do
>> that:
>> xl trigger $dom power
>> xl trigger $dom sleep
>>
>> However, I think without changes, domU s2idle/S3 will detach all its PV
>> devices.  Naturally they don't get reconnected on resume.  You can hack
>> around that to skip the detach.
>>
>> Actually, maybe we just need:
>> --- i/drivers/xen/xenbus/xenbus_probe_frontend.c
>> +++ w/drivers/xen/xenbus/xenbus_probe_frontend.c
>> @@ -148,8 +148,6 @@ static void xenbus_frontend_dev_shutdown(struct
>> device *_dev)
>>    }
>>
>>    static const struct dev_pm_ops xenbus_pm_ops = {
>> -       .suspend        = xenbus_dev_suspend,
>> -       .resume         = xenbus_frontend_dev_resume,
>>           .freeze         = xenbus_dev_suspend,
>>           .thaw           = xenbus_dev_cancel,
>> -       .restore        = xenbus_dev_resume,
>> +       .restore        = xenbus_frontend_dev_resume,
>>    };
>>
>> b3e96c0c7562 ("xen: use freeze/restore/thaw PM events for suspend/
>> resume/chkpt") changed from PMSG_SUSPEND/PMSG_RESUME to PMSG_FREEZE/
>> PMSG_THAW/PMSG_RESTORE, but the suspend/resume callbacks remained.  But
>> freeze and suspend being identical doesn't seem correct.
>>
>> This would leave xl save/restore/migrate using the hibernate freeze/
>> thaw/resume.  S3/s2idle would no touch the PV devices, so they would
>> still be present on resume.  Maybe there are cases I am not thinking of
>> though.
>>
>> Regards,
>> Jason
>>
> 
> Hi all,
> 
> I finally took time to try what you guyz advised, thanks for all the
> answers!
> 
> So, I tried this on a clean Debian 13 VM install on a XCP-ng 8.3 (Xen
> 4.17.5 with local patches) host.
> 
> 1/ Just booting with idle=halt/nomwait/poll didn't help with waking up
> the VM, it kept being in a weird unwakable state. Even providing xl
> trigger power/sleep events. Although I reckon you were saying it would
> help with the CPU@100% and indeed I don't see this anymore.

Yes, just 100% CPU.

> 2/ Just applying QubesOS patch
> https://github.com/QubesOS/qubes-linux-kernel/blob/main/xen-events-Add-wakeup-support-to-xen-pirq.patch
> did help *a bit*. Hitting a key would wake the VM, then show again the
> Debian desktop, with some flickering, allowing to move the mouse and bit
> and hitting some keys on the keyboard ... then it would very quickly
> completely freeze and stay dead.

I think this is needed for dom0 s2idle, but not for domU.

> 3/ on top of previous patch, applying your modification (removing
> .suspend, .resume and changing .restore to xenbus_frontend_dev_resume):
> then tadaaa I can wake the VM and it stays alive afterward. It seems it
> fixes the issue (I did not test for very very long though).
> 
> Thanks for the help on this!
> What do you think we should do to move this forward? Submit those
> changes to upstream Linux? That will take long to end up in distros...

I submitted the patch for #3.  Yes, it'll take a little while to get to 
distros, but I don't see any other choice here.

Regards,
Jason


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Date: Thu, 20 Nov 2025 00:43:57 +0000
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Subject: Re: [PATCH] xen: Fix EFI buildid alignment
To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
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Cc: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 
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On 19/11/2025 7:12 pm, Marek Marczykowski-Górecki wrote:
> Old binutils get confused about .buildid overlapping (in VA space) with
> earlier section. That confusion results in weird errors down the road,
> like this one:
>
>     objcopy: xen.efi: Data Directory size (1c) exceeds space left in section (8)
>
> While the bug is fixed in later binutils version, force alignment of the
> buildid to avoid overlapping and make it work with older versions too.
> This can be reverted once toolchain base is raised at or above binutils
> 2.36.
>
> Details at:
> https://lore.kernel.org/all/3TMd7J2u5gCA8ouIG_Xfcw7s5JKMG06XsDIesEB3Fi9htUJ43Lfl057wXohlpCHcszqoCmicpIlneEDO26ZqT8QfC2Y39VxBuqD3nS1j5Q4=@trmm.net/
>
> Signed-off-by: Marek Marczykowski-Górecki 
> Fixes: eee5909e9d1e ("x86/EFI: use less crude a way of generating the build ID")

We typically put these tags in the other order.  I can fix on commit.

Reviewed-by: Andrew Cooper , although...

> ---
> While the actual bug apparently is in binutils, the commit mentioned in
> Fixes: tag introduced part that triggers that bug.
> ---
>  xen/arch/x86/xen.lds.S | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/xen/arch/x86/xen.lds.S b/xen/arch/x86/xen.lds.S
> index 5d02f83a409c..967f9167f757 100644
> --- a/xen/arch/x86/xen.lds.S
> +++ b/xen/arch/x86/xen.lds.S
> @@ -171,6 +171,8 @@ SECTIONS
>         __note_gnu_build_id_end = .;
>    } PHDR(note) PHDR(text)
>  #elif defined(BUILD_ID_EFI)
> +  /* Workaround bug in binutils < 2.38 */

... this says 2.38, but the commit message says 2.36.  Which one is it?

~Andrew

> +  . = ALIGN(32);
>    DECL_SECTION(.buildid) {
>         __note_gnu_build_id_start = .;
>         *(.buildid)



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Feedback-ID: i1568416f:Fastmail
Date: Thu, 20 Nov 2025 02:33:55 +0100
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: xen-devel@lists.xenproject.org, Jan Beulich ,
	Roger Pau =?utf-8?B?TW9ubsOp?= 
Subject: Re: [PATCH] xen: Fix EFI buildid alignment
Message-ID: 
References: <20251119191235.863187-1-marmarek@invisiblethingslab.com>
 
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Date: Thu, 20 Nov 2025 02:33:55 +0100
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: xen-devel@lists.xenproject.org, Jan Beulich ,
	Roger Pau =?utf-8?B?TW9ubsOp?= 
Subject: Re: [PATCH] xen: Fix EFI buildid alignment

On Thu, Nov 20, 2025 at 12:43:57AM +0000, Andrew Cooper wrote:
> On 19/11/2025 7:12 pm, Marek Marczykowski-G=C3=B3recki wrote:
> > Old binutils get confused about .buildid overlapping (in VA space) with
> > earlier section. That confusion results in weird errors down the road,
> > like this one:
> >
> >     objcopy: xen.efi: Data Directory size (1c) exceeds space left in se=
ction (8)
> >
> > While the bug is fixed in later binutils version, force alignment of the
> > buildid to avoid overlapping and make it work with older versions too.
> > This can be reverted once toolchain base is raised at or above binutils
> > 2.36.
> >
> > Details at:
> > https://lore.kernel.org/all/3TMd7J2u5gCA8ouIG_Xfcw7s5JKMG06XsDIesEB3Fi9=
htUJ43Lfl057wXohlpCHcszqoCmicpIlneEDO26ZqT8QfC2Y39VxBuqD3nS1j5Q4=3D@trmm.ne=
t/
> >
> > Signed-off-by: Marek Marczykowski-G=C3=B3recki 
> > Fixes: eee5909e9d1e ("x86/EFI: use less crude a way of generating the b=
uild ID")
>=20
> We typically put these tags in the other order.=C2=A0 I can fix on commit.
>=20
> Reviewed-by: Andrew Cooper , although...
>=20
> > ---
> > While the actual bug apparently is in binutils, the commit mentioned in
> > Fixes: tag introduced part that triggers that bug.
> > ---
> >  xen/arch/x86/xen.lds.S | 2 ++
> >  1 file changed, 2 insertions(+)
> >
> > diff --git a/xen/arch/x86/xen.lds.S b/xen/arch/x86/xen.lds.S
> > index 5d02f83a409c..967f9167f757 100644
> > --- a/xen/arch/x86/xen.lds.S
> > +++ b/xen/arch/x86/xen.lds.S
> > @@ -171,6 +171,8 @@ SECTIONS
> >         __note_gnu_build_id_end =3D .;
> >    } PHDR(note) PHDR(text)
> >  #elif defined(BUILD_ID_EFI)
> > +  /* Workaround bug in binutils < 2.38 */
>=20
> ... this says 2.38, but the commit message says 2.36.=C2=A0 Which one is =
it?

2.36

> ~Andrew
>=20
> > +  . =3D ALIGN(32);
> >    DECL_SECTION(.buildid) {
> >         __note_gnu_build_id_start =3D .;
> >         *(.buildid)
>=20

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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From: "Penny, Zheng" 
To: "Andryuk, Jason" , Jan Beulich 
CC: "Huang, Ray" , "oleksii.kurochko@gmail.com"
	, Andrew Cooper ,
	Anthony PERARD , "Orzel, Michal"
	, Julien Grall ,
	=?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= , Stefano
 Stabellini , "xen-devel@lists.xenproject.org"
	
Subject: RE: [PATCH v3 28/28] xen/domctl: wrap common/domctl.c with
 CONFIG_MGMT_HYPERCALLS
Thread-Topic: [PATCH v3 28/28] xen/domctl: wrap common/domctl.c with
 CONFIG_MGMT_HYPERCALLS
Thread-Index: AQHcPCqhC21cJdWa5E25eCgk7enLhrTazScAgB1wfK+AAAbwUIAAxogAgAIjbCA=
Date: Thu, 20 Nov 2025 04:09:55 +0000
Message-ID:
 
References: <20251013101540.3502842-1-Penny.Zheng@amd.com>
 <20251013101540.3502842-29-Penny.Zheng@amd.com>
 
 
 
 
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Date: Thu, 20 Nov 2025 09:11:59 +0100
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Subject: Re: [XEN][PATCH v4] xen/x86: guest_access: optimize raw_x_guest() for
 PV and HVM combinations
To: Grygorii Strashko 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Jason Andryuk , Teddy Astie ,
 Alejandro Vallejo ,
 "xen-devel@lists.xenproject.org" 
References: <20251114140117.270461-1-grygorii_strashko@epam.com>
 <11c3929a-977b-4ef8-aaaa-9aea01657b04@suse.com>
 
 <567f2759-fa03-43bd-9ae4-75e0e3811b60@suse.com>
 <276968a6-4688-48bb-b0a1-5270ad3f0002@epam.com>
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From: Jan Beulich 
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In-Reply-To: <276968a6-4688-48bb-b0a1-5270ad3f0002@epam.com>
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On 19.11.2025 20:36, Grygorii Strashko wrote:
> Hi Jan
> 
> On 18.11.25 15:45, Jan Beulich wrote:
>> On 18.11.2025 14:08, Grygorii Strashko wrote:
>>> On 17.11.25 18:43, Jan Beulich wrote:
>>>> On 14.11.2025 15:01, Grygorii Strashko wrote:
>>>>> --- a/xen/arch/x86/pv/Makefile
>>>>> +++ b/xen/arch/x86/pv/Makefile
>>>>> @@ -14,6 +14,10 @@ obj-y += ro-page-fault.o
>>>>>    obj-$(CONFIG_PV_SHIM) += shim.o
>>>>>    obj-$(CONFIG_TRACEBUFFER) += trace.o
>>>>>    obj-y += traps.o
>>>>> +obj-$(CONFIG_PV) += usercopy.o
>>>>
>>>> Just obj-y with the movement.
>>>>
>>>> However, is the movement (and was the adding of $(CONFIG_PV) in the earlier
>>>> version) actually correct? The file also produces copy_{from,to}_unsafe_ll(),
>>>> which aren't PV-specific. This may be only a latent issue right now, as we
>>>> have only a single use site of copy_from_unsafe(), but those functions need
>>>> to remain available. (We may want to arrange for them to be removed when
>>>> linking, as long as they're not referenced. But that's a separate topic.)
>>>
>>> It is confusing that none of build cfg combinations have failed
>>> (HVM=y PV=n, HVM=n PV=n) :(
>>>
>>> copy_to_unsafe_ll()
>>> - called from copy_to_unsafe()
>>> - copy_to_unsafe() has no users (unreachable, MISRA 2.1?)
>>>
>>> copy_from_unsafe_ll()
>>> - called from copy_from_unsafe()
>>> - copy_from_unsafe() called from one place do_invalid_op() with
>>>     copy_from_unsafe(,, n = sizeof(bug_insn)).
>>>     Due to __builtin_constant_p(n) check the copy_from_unsafe() call
>>>     optimized by compiler to
>>>     get_unsafe_size(*(uint16_t *)to, from, 2, UA_DROP, ret, 2);
>>>
>>> as result copy_from_unsafe_ll() is unreachable also (?).
>>
>> Yes, these likely all want to become library-like, so they are linked in only
>> when actually referenced.
>>
>>> If those function are not subject to be removed, the
>>>    usercopy.c can't be moved in "x86/pv", Right?
>>
>> That's my take, yes.
>>
>>> Making copy_{from,to}_unsafe_ll() available for !PV means
>>> rewriting usercopy.c in some way, Right?
>>
>> "Re-writing" is probably too much, but some adjustments would be needed if
>> you want to keep the "unsafe" functions but compile out the "guest" ones.
>> It may be possible to compile the file twice, once from x86/pv/ and once
>> from x86/, replacing the self-#include near the bottom of the file. The
>> former would then produce the "guest" functions, the latter the "unsafe"
>> ones.
> 
> Below is the difference I came up with, will it work?

That'll be on you to make sure, but ...

> --- /dev/null
> +++ b/xen/arch/x86/usercopy.c
> @@ -0,0 +1,77 @@
> +/*
> + * User address space access functions.
> + *
> + * Copyright 1997 Andi Kleen 
> + * Copyright 1997 Linus Torvalds
> + * Copyright 2002 Andi Kleen 
> + */
> +
> +#include 
> +#include 
> +#include 
> +
> +# define GUARD UA_DROP
> +# define copy_to_guest_ll copy_to_unsafe_ll
> +# define copy_from_guest_ll copy_from_unsafe_ll
> +# undef __user
> +# define __user
> +
> +unsigned int copy_to_guest_ll(void __user *to, const void *from, unsigned int n)
> +{
> +    GUARD(unsigned dummy);
> +
> +    stac();
> +    asm_inline volatile (
> +        GUARD(
> +        "    guest_access_mask_ptr %[to], %q[scratch1], %q[scratch2]\n"
> +        )
> +        "1:  rep movsb\n"
> +        "2:\n"
> +        _ASM_EXTABLE(1b, 2b)
> +        : [cnt] "+c" (n), [to] "+D" (to), [from] "+S" (from)
> +          GUARD(, [scratch1] "=&r" (dummy), [scratch2] "=&r" (dummy))
> +        :: "memory" );
> +    clac();
> +
> +    return n;
> +}
> +
> +unsigned int copy_from_guest_ll(void *to, const void __user *from, unsigned int n)
> +{
> +    unsigned dummy;
> +
> +    stac();
> +    asm_inline volatile (
> +        GUARD(
> +        "    guest_access_mask_ptr %[from], %q[scratch1], %q[scratch2]\n"
> +        )
> +        "1:  rep movsb\n"
> +        "2:\n"
> +        ".section .fixup,\"ax\"\n"
> +        "6:  mov  %[cnt], %k[from]\n"
> +        "    xchg %%eax, %[aux]\n"
> +        "    xor  %%eax, %%eax\n"
> +        "    rep stosb\n"
> +        "    xchg %[aux], %%eax\n"
> +        "    mov  %k[from], %[cnt]\n"
> +        "    jmp 2b\n"
> +        ".previous\n"
> +        _ASM_EXTABLE(1b, 6b)
> +        : [cnt] "+c" (n), [to] "+D" (to), [from] "+S" (from),
> +          [aux] "=&r" (dummy)
> +          GUARD(, [scratch1] "=&r" (dummy), [scratch2] "=&r" (dummy))
> +        :: "memory" );
> +    clac();
> +
> +    return n;
> +}

... we don't want to have two instances of that code in the code base. One file
should #include the other, after putting in place suitable #define-s. Which
direction the #include should work I'm not entirely certain:
- pv/usercopy.c including usercopy.c means usercopy.c then ends up misnamed,
- usercopy.c including pv/usercopy.c means a "common" file includes a more
  specialized (PV-only) one.

Jan


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Date: Thu, 20 Nov 2025 09:10:56 +0100
From: Luc Michel 
To: Markus Armbruster 
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Subject: Re: [PATCH 2/5] hw/nvram/xlnx-bbram: More idiomatic and simpler
 error reporting
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On 14:08 Wed 19 Nov     , Markus Armbruster wrote:
> Caution: This message originated from an External Source. Use proper caution when opening attachments, clicking links, or responding.
> 
> 
> bbram_bdrv_error() interpolates a "detail" string into a template with
> error_setg_errno(), then reports the result with error_report().
> Produces error messages with an unwanted '.':
> 
>     BLK-NAME: BBRAM backstore DETAIL failed.: STERROR
> 
> Replace both calls of bbram_bdrv_error() by straightforward
> error_report(), and drop the function.  This is less code, easier to
> read, and the error message is more greppable.
> 
> Also delete the unwanted '.'.
> 
> Signed-off-by: Markus Armbruster 

Reviewed-by: Luc Michel 

> ---
>  hw/nvram/xlnx-bbram.c | 18 ++++--------------
>  1 file changed, 4 insertions(+), 14 deletions(-)
> 
> diff --git a/hw/nvram/xlnx-bbram.c b/hw/nvram/xlnx-bbram.c
> index 22aefbc240..fe289bad9d 100644
> --- a/hw/nvram/xlnx-bbram.c
> +++ b/hw/nvram/xlnx-bbram.c
> @@ -88,18 +88,6 @@ static bool bbram_pgm_enabled(XlnxBBRam *s)
>      return ARRAY_FIELD_EX32(s->regs, BBRAM_STATUS, PGM_MODE) != 0;
>  }
> 
> -static void bbram_bdrv_error(XlnxBBRam *s, int rc, gchar *detail)
> -{
> -    Error *errp = NULL;
> -
> -    error_setg_errno(&errp, -rc, "%s: BBRAM backstore %s failed.",
> -                     blk_name(s->blk), detail);
> -    error_report("%s", error_get_pretty(errp));
> -    error_free(errp);
> -
> -    g_free(detail);
> -}
> -
>  static void bbram_bdrv_read(XlnxBBRam *s, Error **errp)
>  {
>      uint32_t *ram = &s->regs[R_BBRAM_0];
> @@ -162,7 +150,8 @@ static void bbram_bdrv_sync(XlnxBBRam *s, uint64_t hwaddr)
>      offset = hwaddr - A_BBRAM_0;
>      rc = blk_pwrite(s->blk, offset, 4, &le32, 0);
>      if (rc < 0) {
> -        bbram_bdrv_error(s, rc, g_strdup_printf("write to offset %u", offset));
> +        error_report("%s: BBRAM backstore write to offset %u failed: %s",
> +                     blk_name(s->blk), offset, strerror(-rc));
>      }
>  }
> 
> @@ -178,7 +167,8 @@ static void bbram_bdrv_zero(XlnxBBRam *s)
> 
>      rc = blk_make_zero(s->blk, 0);
>      if (rc < 0) {
> -        bbram_bdrv_error(s, rc, g_strdup("zeroizing"));
> +        error_report("%s: BBRAM backstore zeroizing failed: %s",
> +                     blk_name(s->blk), strerror(-rc));
>      }
> 
>      /* Restore bbram8 if it is non-zero */
> --
> 2.49.0
> 
> 

-- 


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Subject: Re: [PATCH v8] xen: Strip xen.efi by default
To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 
Cc: Frediano Ziglio ,
 Oleksii Kurochko ,
 Frediano Ziglio ,
 xen-devel@lists.xenproject.org, Frediano Ziglio ,
 Anthony PERARD ,
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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 Demi Marie Obenour ,
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References: <20251113154358.28704-1-frediano.ziglio@citrix.com>
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On 19.11.2025 18:08, Marek Marczykowski-Górecki wrote:
> On Wed, Nov 19, 2025 at 04:02:30PM +0000, Andrew Cooper wrote:
>> Given it's now only 16.04 broken, how about simply excluding xen.efi
>> with these broken toolchains?
> 
> That would mean adjusting README to say a newer binutils is required for
> xen.efi, right? Then ofc we would need to figure out which version
> specifically. FWIW Ubuntu 16.04 has 2.26 and Ubuntu 18.04 has 2.30.
> Would raising required toolchain version (for some configuration here)
> even accepted, especially if considered for backporting?
> 
> Alternatively, simply disable building xen.efi in CI on 16.04, and maybe
> document as "known issue" pointing at toolchain bug? Result is very
> similar, but might be more acceptable on the process side...

Along the lines of what Andrew said, the probing done would then want
updating. Which in turn raises the need to properly know what to probe.
That said, from what I've read so far it's not the building of xen.efi
which would need disabling, but (as we already do for certain cases)
its building with debug info included (which in turn is now going to
require its stripping during the build process).

Jan


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Date: Thu, 20 Nov 2025 09:50:18 +0100
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Subject: Re: [XEN][PATCH v8] x86: make Viridian support optional
To: Grygorii Strashko ,
 Jason Andryuk 
Cc: Sergiy Kibrik ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Paul Durrant ,
 Alejandro Vallejo ,
 "xen-devel@lists.xenproject.org" 
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From: Jan Beulich 
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(adding v8 tag to subject)

On 19.11.2025 20:32, Grygorii Strashko wrote:
> From: Sergiy Kibrik 
> 
> Add config option VIRIDIAN that covers viridian code within HVM.
> Calls to viridian functions guarded by is_viridian_domain() and related macros.
> Having this option may be beneficial by reducing code footprint for systems
> that are not using Hyper-V.
> 
> [grygorii_strashko@epam.com: fixed NULL pointer deref in
> viridian_save_domain_ctxt(); stub viridian_vcpu/domain_init/deinit()]
> Signed-off-by: Sergiy Kibrik 
> Signed-off-by: Grygorii Strashko 
> Reviewed-by: Jason Andryuk  

As before - this R-b likely would need dropping, ...

> ---
> changes in v8:
> - drop checks from viridian_load_vcpu/domain_ctxt()
> - drop check "value != 0" in HVM_PARAM_VIRIDIAN handler, laways return
>   -ENODEV for VIRIDIAN=n

... when more than just cosmetic changes are made. Jason, please can you
indicate whether it's fine to retain?

> --- a/xen/arch/x86/hvm/Makefile
> +++ b/xen/arch/x86/hvm/Makefile
> @@ -1,6 +1,6 @@
>  obj-$(CONFIG_AMD_SVM) += svm/
>  obj-$(CONFIG_INTEL_VMX) += vmx/
> -obj-y += viridian/
> +obj-$(CONFIG_VIRIDIAN) += viridian/

When committing, I'll likely take the liberty to also move the altered line
up, to restore proper alphabetical sorting here.

> --- a/xen/arch/x86/include/asm/hvm/viridian.h
> +++ b/xen/arch/x86/include/asm/hvm/viridian.h
> @@ -86,11 +86,26 @@ viridian_hypercall(struct cpu_user_regs *regs);
>  void viridian_time_domain_freeze(const struct domain *d);
>  void viridian_time_domain_thaw(const struct domain *d);
>  
> +#if defined(CONFIG_VIRIDIAN)

Similarly I'm likely going to take the liberty and change this to #ifdef,
just like you have it elsewhere.

Preferably with the adjustments:
Reviewed-by: Jan Beulich 

Jan


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Subject: Re: [XEN][PATCH v4] xen: make VMTRACE support optional
To: Grygorii Strashko 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 Stefano Stabellini ,
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 Alexandru Isaila ,
 Petre Pircalabu ,
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In-Reply-To: <20251119193120.1011448-1-grygorii_strashko@epam.com>
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On 19.11.2025 20:31, Grygorii Strashko wrote:
> From: Grygorii Strashko 
> 
> The VMTRACE feature is depends on Platform/Arch HW and code support and now
> can be used only on x86 HVM with Intel VT-x (INTEL_VMX) enabled.
> This makes VMTRACE support optional by introducing HVM Kconfig option:
> - CONFIG_VMTRACE to enable/disable the feature.
> 
> Signed-off-by: Grygorii Strashko 
> ---
> changes in v4:
> - format changes

Just partly, ...

> @@ -772,13 +775,24 @@ static inline int hvm_vmtrace_get_option(
>  
>      return -EOPNOTSUPP;
>  }
> +#else
> +/*
> + * Function declaration(s) here are used without definition(s) to make compiler
> + * happy when VMTRACE=n, compiler DCE will eliminate unused code.
> + */
> +int hvm_vmtrace_output_position(struct vcpu *v, uint64_t *pos);
> +#endif
>  
>  static inline int hvm_vmtrace_reset(struct vcpu *v)
>  {
> +#ifdef CONFIG_VMTRACE
>      if ( hvm_funcs.vmtrace_reset )
>          return alternative_call(hvm_funcs.vmtrace_reset, v);
>  
>      return -EOPNOTSUPP;
> +#else
> +    return -EOPNOTSUPP;
> +#endif
>  }

... the #else wasn't dropped from here. If no need for a v5 arises, I guess
I can make the adjustment while committing. But it would be really nice if
all earlier comments were taken care of (one way or another) when submitting
a new version.

With the adjustment:
Reviewed-by: Jan Beulich 

Jan


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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Julien Grall ,
	Stefano Stabellini ,
	Jason Andryuk 
Subject: [PATCH 00/12] x86/irq: drop interrupt target cpumasks
Date: Thu, 20 Nov 2025 10:06:25 +0100
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Hello,

After the adjustments that dropped logical delivery mode for all
external interrupts the Xen internal interrupt descriptors no longer
require a cpumask to store the possible targets of the interrupt.  Using
physical delivery mode only allows a single CPU to be the target of the
interrupt, and hence the field can be converted into an unsigned int.

The series contain a bit of cleanup and code adjustments ahead of the
removal of the cpumasks that's done in the last 3 patches.

A couple of notes from the series:

 * It's possible that further simplifications can be applied to
   fixup_irqs() (and other logic) after dropping the cpumasks.  I
   haven't looked closely enough, but in any case that would be a
   followup change(s) on top of this series.

 * Current code seems to confuse interrupt affinity (possible interrupt
   destinations) with the current target of the interrupt.  For example
   irq_set_affinity() doesn't set the interrupt affinity, but rather
   migrates the interrupt from one target CPU to another.

Thanks, Roger.

Roger Pau Monne (12):
  x86/apic: remove cpu_mask_to_apicid hook
  x86/apic: remove vector_allocation_cpumask hook
  x86/irq: introduce local irq_desc
  x86/irq: set accurate cpu_mask for high priority vectors used by
    external interrupts
  x86/io-apic: purge usage of logical mode
  x86/i8259: redo workaround for AMD spurious PIC interrupts
  x86/io-apic: fix usage of setup_ioapic_dest()
  x86/irq: adjust bind_irq_vector() to take a single CPU as parameter
  x86/irq: convert cpumask parameter to integer in
    {,p}irq_set_affinity()
  x86/irq: convert irq_desc cpu_mask field to integer
  x86/irq: convert irq_desc old_cpu_mask field to integer
  x86/irq: convert irq_desc pending_mask field to integer

 xen/arch/x86/genapic/bigsmp.c            |   2 -
 xen/arch/x86/genapic/default.c           |   2 -
 xen/arch/x86/genapic/delivery.c          |   7 +-
 xen/arch/x86/genapic/x2apic.c            |   9 -
 xen/arch/x86/hpet.c                      |  11 +-
 xen/arch/x86/hvm/hvm.c                   |   2 +-
 xen/arch/x86/i8259.c                     |  17 +-
 xen/arch/x86/include/asm/genapic.h       |  17 +-
 xen/arch/x86/include/asm/irq.h           |  22 +-
 xen/arch/x86/include/asm/msi.h           |   3 +-
 xen/arch/x86/io_apic.c                   |  61 +++---
 xen/arch/x86/irq.c                       | 249 ++++++++++-------------
 xen/arch/x86/msi.c                       |  17 +-
 xen/arch/x86/platform_hypercall.c        |   2 +-
 xen/arch/x86/smpboot.c                   |  12 +-
 xen/common/cpu.c                         |   1 +
 xen/common/event_channel.c               |   6 +-
 xen/drivers/passthrough/amd/iommu_init.c |   2 +-
 xen/drivers/passthrough/vtd/iommu.c      |   2 +-
 xen/include/xen/cpumask.h                |   1 +
 xen/include/xen/irq.h                    |   3 +-
 21 files changed, 179 insertions(+), 269 deletions(-)

-- 
2.51.0



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH 01/12] x86/apic: remove cpu_mask_to_apicid hook
Date: Thu, 20 Nov 2025 10:06:26 +0100
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All implementations use the same hook.  No functional change intended.

Signed-off-by: Roger Pau Monné 
---
 xen/arch/x86/genapic/bigsmp.c      |  1 -
 xen/arch/x86/genapic/default.c     |  1 -
 xen/arch/x86/genapic/delivery.c    |  2 +-
 xen/arch/x86/genapic/x2apic.c      |  2 --
 xen/arch/x86/include/asm/genapic.h | 13 +------------
 5 files changed, 2 insertions(+), 17 deletions(-)

diff --git a/xen/arch/x86/genapic/bigsmp.c b/xen/arch/x86/genapic/bigsmp.c
index ddb3a0b5d727..066feb4a1755 100644
--- a/xen/arch/x86/genapic/bigsmp.c
+++ b/xen/arch/x86/genapic/bigsmp.c
@@ -48,7 +48,6 @@ const struct genapic __initconst_cf_clobber apic_bigsmp = {
 	APIC_INIT("bigsmp", probe_bigsmp),
 	.init_apic_ldr = init_apic_ldr_phys,
 	.vector_allocation_cpumask = vector_allocation_cpumask_phys,
-	.cpu_mask_to_apicid = cpu_mask_to_apicid_phys,
 	.send_IPI_mask = send_IPI_mask_phys,
 	.send_IPI_self = send_IPI_self_legacy
 };
diff --git a/xen/arch/x86/genapic/default.c b/xen/arch/x86/genapic/default.c
index 16e1875f6378..ab9a292464d6 100644
--- a/xen/arch/x86/genapic/default.c
+++ b/xen/arch/x86/genapic/default.c
@@ -18,7 +18,6 @@ const struct genapic __initconst_cf_clobber apic_default = {
 	APIC_INIT("default", NULL),
 	.init_apic_ldr = init_apic_ldr_flat,
 	.vector_allocation_cpumask = vector_allocation_cpumask_phys,
-	.cpu_mask_to_apicid = cpu_mask_to_apicid_phys,
 	.send_IPI_mask = send_IPI_mask_flat,
 	.send_IPI_self = send_IPI_self_legacy
 };
diff --git a/xen/arch/x86/genapic/delivery.c b/xen/arch/x86/genapic/delivery.c
index 15100439be05..5d105e848502 100644
--- a/xen/arch/x86/genapic/delivery.c
+++ b/xen/arch/x86/genapic/delivery.c
@@ -35,7 +35,7 @@ const cpumask_t *cf_check vector_allocation_cpumask_phys(int cpu)
 	return cpumask_of(cpu);
 }
 
-unsigned int cf_check cpu_mask_to_apicid_phys(const cpumask_t *cpumask)
+unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask)
 {
 	/* As we are using single CPU as destination, pick only one CPU here */
 	return cpu_physical_id(cpumask_any(cpumask));
diff --git a/xen/arch/x86/genapic/x2apic.c b/xen/arch/x86/genapic/x2apic.c
index 58157c217ee8..f4709ab92950 100644
--- a/xen/arch/x86/genapic/x2apic.c
+++ b/xen/arch/x86/genapic/x2apic.c
@@ -142,7 +142,6 @@ static const struct genapic __initconst_cf_clobber apic_x2apic_phys = {
     APIC_INIT("x2apic_phys", NULL),
     .init_apic_ldr = init_apic_ldr_phys,
     .vector_allocation_cpumask = vector_allocation_cpumask_phys,
-    .cpu_mask_to_apicid = cpu_mask_to_apicid_phys,
     .send_IPI_mask = send_IPI_mask_x2apic_phys,
     .send_IPI_self = send_IPI_self_x2apic
 };
@@ -162,7 +161,6 @@ static const struct genapic __initconst_cf_clobber apic_x2apic_mixed = {
      * hence are set to use Physical destination mode handlers.
      */
     .vector_allocation_cpumask = vector_allocation_cpumask_phys,
-    .cpu_mask_to_apicid = cpu_mask_to_apicid_phys,
 
     /*
      * The following fields are exclusively used by IPIs and hence are set to
diff --git a/xen/arch/x86/include/asm/genapic.h b/xen/arch/x86/include/asm/genapic.h
index 04d3f1de7a1f..6d979279bd2b 100644
--- a/xen/arch/x86/include/asm/genapic.h
+++ b/xen/arch/x86/include/asm/genapic.h
@@ -25,7 +25,6 @@ struct genapic {
 
 	void (*init_apic_ldr)(void);
 	const cpumask_t *(*vector_allocation_cpumask)(int cpu);
-	unsigned int (*cpu_mask_to_apicid)(const cpumask_t *cpumask);
 	void (*send_IPI_mask)(const cpumask_t *mask, int vector);
     void (*send_IPI_self)(uint8_t vector);
 };
@@ -36,16 +35,6 @@ struct genapic {
 
 #define TARGET_CPUS ((const typeof(cpu_online_map) *)&cpu_online_map)
 #define init_apic_ldr() alternative_vcall(genapic.init_apic_ldr)
-#define cpu_mask_to_apicid(mask) ({ \
-	/* \
-	 * There are a number of places where the address of a local variable \
-	 * gets passed here. The use of ?: in alternative_call() triggers an \
-	 * "address of ... is always true" warning in such a case with at least \
-	 * gcc 7 and 8. Hence the seemingly pointless local variable here. \
-	 */ \
-	const cpumask_t *m_ = (mask); \
-	alternative_call(genapic.cpu_mask_to_apicid, m_); \
-})
 #define vector_allocation_cpumask(cpu) \
 	alternative_call(genapic.vector_allocation_cpumask, cpu)
 
@@ -59,7 +48,7 @@ void cf_check init_apic_ldr_flat(void);
 void cf_check send_IPI_mask_flat(const cpumask_t *cpumask, int vector);
 
 void cf_check init_apic_ldr_phys(void);
-unsigned int cf_check cpu_mask_to_apicid_phys(const cpumask_t *cpumask);
+unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask);
 void cf_check send_IPI_mask_phys(const cpumask_t *mask, int vector);
 const cpumask_t *cf_check vector_allocation_cpumask_phys(int cpu);
 
-- 
2.51.0



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH 02/12] x86/apic: remove vector_allocation_cpumask hook
Date: Thu, 20 Nov 2025 10:06:27 +0100
Message-ID: <20251120090637.25087-3-roger.pau@citrix.com>
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All implementations use the same hook which is a wrapper around
cpumask_of(cpu).  Adjust callers to no longer use such dummy mask with a
single CPU set, as the CPU is already known to the caller.  This removes a
pair of usages of for_each_cpu().

No functional change intended.

Signed-off-by: Roger Pau Monné 
---
 xen/arch/x86/genapic/bigsmp.c      |  1 -
 xen/arch/x86/genapic/default.c     |  1 -
 xen/arch/x86/genapic/delivery.c    |  5 -----
 xen/arch/x86/genapic/x2apic.c      |  7 -------
 xen/arch/x86/include/asm/genapic.h |  4 ----
 xen/arch/x86/irq.c                 | 19 +++++++------------
 6 files changed, 7 insertions(+), 30 deletions(-)

diff --git a/xen/arch/x86/genapic/bigsmp.c b/xen/arch/x86/genapic/bigsmp.c
index 066feb4a1755..c0bcee659f1b 100644
--- a/xen/arch/x86/genapic/bigsmp.c
+++ b/xen/arch/x86/genapic/bigsmp.c
@@ -47,7 +47,6 @@ static int __init cf_check probe_bigsmp(void)
 const struct genapic __initconst_cf_clobber apic_bigsmp = {
 	APIC_INIT("bigsmp", probe_bigsmp),
 	.init_apic_ldr = init_apic_ldr_phys,
-	.vector_allocation_cpumask = vector_allocation_cpumask_phys,
 	.send_IPI_mask = send_IPI_mask_phys,
 	.send_IPI_self = send_IPI_self_legacy
 };
diff --git a/xen/arch/x86/genapic/default.c b/xen/arch/x86/genapic/default.c
index ab9a292464d6..58b5884aac0d 100644
--- a/xen/arch/x86/genapic/default.c
+++ b/xen/arch/x86/genapic/default.c
@@ -17,7 +17,6 @@
 const struct genapic __initconst_cf_clobber apic_default = {
 	APIC_INIT("default", NULL),
 	.init_apic_ldr = init_apic_ldr_flat,
-	.vector_allocation_cpumask = vector_allocation_cpumask_phys,
 	.send_IPI_mask = send_IPI_mask_flat,
 	.send_IPI_self = send_IPI_self_legacy
 };
diff --git a/xen/arch/x86/genapic/delivery.c b/xen/arch/x86/genapic/delivery.c
index 5d105e848502..777570f3b633 100644
--- a/xen/arch/x86/genapic/delivery.c
+++ b/xen/arch/x86/genapic/delivery.c
@@ -30,11 +30,6 @@ void cf_check init_apic_ldr_phys(void)
 	/* We only deliver in phys mode - no setup needed. */
 }
 
-const cpumask_t *cf_check vector_allocation_cpumask_phys(int cpu)
-{
-	return cpumask_of(cpu);
-}
-
 unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask)
 {
 	/* As we are using single CPU as destination, pick only one CPU here */
diff --git a/xen/arch/x86/genapic/x2apic.c b/xen/arch/x86/genapic/x2apic.c
index f4709ab92950..89d66bc627d7 100644
--- a/xen/arch/x86/genapic/x2apic.c
+++ b/xen/arch/x86/genapic/x2apic.c
@@ -141,7 +141,6 @@ static void cf_check send_IPI_mask_x2apic_cluster(
 static const struct genapic __initconst_cf_clobber apic_x2apic_phys = {
     APIC_INIT("x2apic_phys", NULL),
     .init_apic_ldr = init_apic_ldr_phys,
-    .vector_allocation_cpumask = vector_allocation_cpumask_phys,
     .send_IPI_mask = send_IPI_mask_x2apic_phys,
     .send_IPI_self = send_IPI_self_x2apic
 };
@@ -156,12 +155,6 @@ static const struct genapic __initconst_cf_clobber apic_x2apic_phys = {
 static const struct genapic __initconst_cf_clobber apic_x2apic_mixed = {
     APIC_INIT("x2apic_mixed", NULL),
 
-    /*
-     * The following fields are exclusively used by external interrupts and
-     * hence are set to use Physical destination mode handlers.
-     */
-    .vector_allocation_cpumask = vector_allocation_cpumask_phys,
-
     /*
      * The following fields are exclusively used by IPIs and hence are set to
      * use Cluster Logical destination mode handlers.  Note that init_apic_ldr
diff --git a/xen/arch/x86/include/asm/genapic.h b/xen/arch/x86/include/asm/genapic.h
index 6d979279bd2b..33ec492a6ff5 100644
--- a/xen/arch/x86/include/asm/genapic.h
+++ b/xen/arch/x86/include/asm/genapic.h
@@ -24,7 +24,6 @@ struct genapic {
 	int (*probe)(void);
 
 	void (*init_apic_ldr)(void);
-	const cpumask_t *(*vector_allocation_cpumask)(int cpu);
 	void (*send_IPI_mask)(const cpumask_t *mask, int vector);
     void (*send_IPI_self)(uint8_t vector);
 };
@@ -35,8 +34,6 @@ struct genapic {
 
 #define TARGET_CPUS ((const typeof(cpu_online_map) *)&cpu_online_map)
 #define init_apic_ldr() alternative_vcall(genapic.init_apic_ldr)
-#define vector_allocation_cpumask(cpu) \
-	alternative_call(genapic.vector_allocation_cpumask, cpu)
 
 extern struct genapic genapic;
 extern const struct genapic apic_default;
@@ -50,7 +47,6 @@ void cf_check send_IPI_mask_flat(const cpumask_t *cpumask, int vector);
 void cf_check init_apic_ldr_phys(void);
 unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask);
 void cf_check send_IPI_mask_phys(const cpumask_t *mask, int vector);
-const cpumask_t *cf_check vector_allocation_cpumask_phys(int cpu);
 
 void generic_apic_probe(void);
 void generic_bigsmp_probe(void);
diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index 80f7417d2103..7009a3c6d0dd 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -621,16 +621,12 @@ static int _assign_irq_vector(struct irq_desc *desc, const cpumask_t *mask)
 
     for_each_cpu(cpu, mask)
     {
-        const cpumask_t *vec_mask;
-        int new_cpu;
         int vector, offset;
 
         /* Only try and allocate irqs on cpus that are present. */
         if (!cpu_online(cpu))
             continue;
 
-        vec_mask = vector_allocation_cpumask(cpu);
-
         vector = current_vector;
         offset = current_offset;
 next:
@@ -650,13 +646,12 @@ next:
             && test_bit(vector, irq_used_vectors) )
             goto next;
 
-        if ( cpumask_test_cpu(0, vec_mask) &&
+        if ( !cpu &&
              vector >= FIRST_LEGACY_VECTOR && vector <= LAST_LEGACY_VECTOR )
             goto next;
 
-        for_each_cpu(new_cpu, vec_mask)
-            if (per_cpu(vector_irq, new_cpu)[vector] >= 0)
-                goto next;
+        if ( per_cpu(vector_irq, cpu)[vector] >= 0 )
+            goto next;
         /* Found one! */
         current_vector = vector;
         current_offset = offset;
@@ -688,12 +683,12 @@ next:
                 release_old_vec(desc);
         }
 
-        trace_irq_mask(TRC_HW_IRQ_ASSIGN_VECTOR, irq, vector, vec_mask);
+        trace_irq_mask(TRC_HW_IRQ_ASSIGN_VECTOR, irq, vector, cpumask_of(cpu));
 
-        for_each_cpu(new_cpu, vec_mask)
-            per_cpu(vector_irq, new_cpu)[vector] = irq;
+        per_cpu(vector_irq, cpu)[vector] = irq;
         desc->arch.vector = vector;
-        cpumask_copy(desc->arch.cpu_mask, vec_mask);
+        cpumask_clear(desc->arch.cpu_mask);
+        cpumask_set_cpu(cpu, desc->arch.cpu_mask);
 
         desc->arch.used = IRQ_USED;
         ASSERT((desc->arch.used_vectors == NULL)
-- 
2.51.0



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH 03/12] x86/irq: introduce local irq_desc
Date: Thu, 20 Nov 2025 10:06:28 +0100
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Avoid duplicated calls to irq_to_desc() by storing the result in a local
variable.  No functional change.

Signed-off-by: Roger Pau Monné 
---
 xen/arch/x86/smpboot.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/smpboot.c b/xen/arch/x86/smpboot.c
index 8d3161248de0..7fab5552335b 100644
--- a/xen/arch/x86/smpboot.c
+++ b/xen/arch/x86/smpboot.c
@@ -1455,12 +1455,16 @@ void __init smp_intr_init(void)
      */
     for ( seridx = 0; seridx <= SERHND_IDX; seridx++ )
     {
+        struct irq_desc *desc;
+
         if ( (irq = serial_irq(seridx)) < 0 )
             continue;
         vector = alloc_hipriority_vector();
         per_cpu(vector_irq, cpu)[vector] = irq;
-        irq_to_desc(irq)->arch.vector = vector;
-        cpumask_copy(irq_to_desc(irq)->arch.cpu_mask, &cpu_online_map);
+
+        desc = irq_to_desc(irq);
+        desc->arch.vector = vector;
+        cpumask_copy(desc->arch.cpu_mask, &cpu_online_map);
     }
 
     /* Direct IPI vectors. */
-- 
2.51.0



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH 04/12] x86/irq: set accurate cpu_mask for high priority vectors used by external interrupts
Date: Thu, 20 Nov 2025 10:06:29 +0100
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Setting the irq descriptor target CPU mask of high priority interrupts to
contain all online CPUs is not accurate.  External interrupts are
exclusively delivered using physical destination mode, and hence can only
target a single CPU.  Setting the descriptor CPU mask to contain all online
CPUs makes it impossible for Xen to figure out which CPU the interrupt is
really targeting.

Instead handle high priority vectors used by external interrupts similarly
to normal vectors, keeping the target CPU mask accurate.  Introduce
specific code in _assign_irq_vector() to deal with moving high priority
vectors across CPUs, this is needed at least for fixup_irqs() to be able to
evacuate those if the target CPU goes offline.

Fixes: fc0c3fa2ad5c ("x86/IO-APIC: fix setup of Xen internally used IRQs (take 2)")
Signed-off-by: Roger Pau Monné 
---
 xen/arch/x86/irq.c     | 24 ++++++++++++++++++------
 xen/arch/x86/smpboot.c |  3 ++-
 2 files changed, 20 insertions(+), 7 deletions(-)

diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index 7009a3c6d0dd..5cd934ea2a32 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -547,6 +547,20 @@ static int _assign_irq_vector(struct irq_desc *desc, const cpumask_t *mask)
         cpumask_t tmp_mask;
 
         cpumask_and(&tmp_mask, mask, &cpu_online_map);
+
+        /*
+         * High priority vectors are reserved on all CPUs, hence moving them
+         * just requires changing the target CPU.  There's no need for vector
+         * allocation on the destination.
+         */
+        if ( old_vector >= FIRST_HIPRIORITY_VECTOR &&
+             old_vector <= LAST_HIPRIORITY_VECTOR )
+        {
+            cpumask_copy(desc->arch.cpu_mask,
+                         cpumask_of(cpumask_any(&tmp_mask)));
+            return 0;
+        }
+
         if (cpumask_intersects(&tmp_mask, desc->arch.cpu_mask)) {
             desc->arch.vector = old_vector;
             return 0;
@@ -756,12 +770,10 @@ void setup_vector_irq(unsigned int cpu)
         if ( !irq_desc_initialized(desc) )
             continue;
         vector = irq_to_vector(irq);
-        if ( vector >= FIRST_HIPRIORITY_VECTOR &&
-             vector <= LAST_HIPRIORITY_VECTOR )
-            cpumask_set_cpu(cpu, desc->arch.cpu_mask);
-        else if ( !cpumask_test_cpu(cpu, desc->arch.cpu_mask) )
-            continue;
-        per_cpu(vector_irq, cpu)[vector] = irq;
+        if ( (vector >= FIRST_HIPRIORITY_VECTOR &&
+              vector <= LAST_HIPRIORITY_VECTOR) ||
+             cpumask_test_cpu(cpu, desc->arch.cpu_mask) )
+            per_cpu(vector_irq, cpu)[vector] = irq;
     }
 }
 
diff --git a/xen/arch/x86/smpboot.c b/xen/arch/x86/smpboot.c
index 7fab5552335b..69cc9bbc6e2c 100644
--- a/xen/arch/x86/smpboot.c
+++ b/xen/arch/x86/smpboot.c
@@ -1464,7 +1464,8 @@ void __init smp_intr_init(void)
 
         desc = irq_to_desc(irq);
         desc->arch.vector = vector;
-        cpumask_copy(desc->arch.cpu_mask, &cpu_online_map);
+        cpumask_copy(desc->arch.cpu_mask, cpumask_of(cpu));
+        cpumask_setall(desc->affinity);
     }
 
     /* Direct IPI vectors. */
-- 
2.51.0



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH 05/12] x86/io-apic: purge usage of logical mode
Date: Thu, 20 Nov 2025 10:06:30 +0100
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The IO-APIC RTEs are unconditionally programmed with physical destination
mode, and hence the field to set in the RTE is always physical_dest.

Remove the mode parameter from SET_DEST() and take the opportunity to
convert it into a function, there's no need for it to be a macro.

This is a benign fix, because due to the endianness of x86 the start of the
physical_dest and logical_dest fields on the RTE overlap.

While there also adjust setup_IO_APIC_irqs() to use the target CPU set by
the assign_irq_vector(), rather than using TARGET_CPUS and possibly
creating a mismatch between the target CPU in desc->arch.cpu_mask and the
one programmed in the IO-APIC RTE.

Fixes: 032d6733a458 ("x86/apic: remove delivery and destination mode fields from drivers")
Signed-off-by: Roger Pau Monné 
---
 xen/arch/x86/io_apic.c | 27 +++++++++++++++------------
 1 file changed, 15 insertions(+), 12 deletions(-)

diff --git a/xen/arch/x86/io_apic.c b/xen/arch/x86/io_apic.c
index 46c2a43dac6d..3c59bf0e15da 100644
--- a/xen/arch/x86/io_apic.c
+++ b/xen/arch/x86/io_apic.c
@@ -1037,12 +1037,14 @@ static hw_irq_controller ioapic_edge_type;
 #define IOAPIC_EDGE	0
 #define IOAPIC_LEVEL	1
 
-#define SET_DEST(ent, mode, val) do { \
-    if (x2apic_enabled && iommu_intremap) \
-        (ent).dest.dest32 = (val); \
-    else \
-        (ent).dest.mode.mode##_dest = (val); \
-} while (0)
+static void set_entry_dest(struct IO_APIC_route_entry *entry,
+                           unsigned int apic_id)
+{
+    if ( x2apic_enabled && iommu_intremap )
+        entry->dest.dest32 = apic_id;
+    else
+        entry->dest.physical.physical_dest = apic_id;
+}
 
 static inline void ioapic_register_intr(int irq, unsigned long trigger)
 {
@@ -1109,7 +1111,8 @@ static void __init setup_IO_APIC_irqs(void)
             if (platform_legacy_irq(irq))
                 disable_8259A_irq(irq_to_desc(irq));
 
-            SET_DEST(entry, logical, cpu_mask_to_apicid(TARGET_CPUS));
+            set_entry_dest(&entry,
+                           cpu_mask_to_apicid(irq_to_desc(irq)->arch.cpu_mask));
             spin_lock_irqsave(&ioapic_lock, flags);
             __ioapic_write_entry(apic, pin, false, entry);
             spin_unlock_irqrestore(&ioapic_lock, flags);
@@ -1140,7 +1143,7 @@ static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, in
      */
     entry.dest_mode = 0; /* physical delivery */
     entry.mask = 0;					/* unmask IRQ now */
-    SET_DEST(entry, logical, cpu_mask_to_apicid(TARGET_CPUS));
+    set_entry_dest(&entry, cpu_mask_to_apicid(TARGET_CPUS));
     entry.delivery_mode = dest_Fixed;
     entry.polarity = 0;
     entry.trigger = 0;
@@ -1432,7 +1435,7 @@ void disable_IO_APIC(void)
         entry.dest_mode       = 0; /* Physical */
         entry.delivery_mode   = dest_ExtINT; /* ExtInt */
         entry.vector          = 0;
-        SET_DEST(entry, physical, get_apic_id());
+        set_entry_dest(&entry, get_apic_id());
 
         /*
          * Add it to the IO-APIC irq-routing table:
@@ -1806,7 +1809,7 @@ static void __init unlock_ExtINT_logic(void)
 
     entry1.dest_mode = 0;			/* physical delivery */
     entry1.mask = 0;			/* unmask IRQ now */
-    SET_DEST(entry1, physical, get_apic_id());
+    set_entry_dest(&entry1, get_apic_id());
     entry1.delivery_mode = dest_ExtINT;
     entry1.polarity = entry0.polarity;
     entry1.trigger = 0;
@@ -2137,7 +2140,7 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int a
         cpumask_t *mask = this_cpu(scratch_cpumask);
 
         cpumask_and(mask, desc->arch.cpu_mask, TARGET_CPUS);
-        SET_DEST(entry, logical, cpu_mask_to_apicid(mask));
+        set_entry_dest(&entry, cpu_mask_to_apicid(mask));
     } else {
         printk(XENLOG_ERR "IRQ%d: no target CPU (%*pb vs %*pb)\n",
                irq, CPUMASK_PR(desc->arch.cpu_mask), CPUMASK_PR(TARGET_CPUS));
@@ -2334,7 +2337,7 @@ int ioapic_guest_write(unsigned long physbase, unsigned int reg, u32 val)
         cpumask_t *mask = this_cpu(scratch_cpumask);
 
         cpumask_and(mask, desc->arch.cpu_mask, TARGET_CPUS);
-        SET_DEST(rte, logical, cpu_mask_to_apicid(mask));
+        set_entry_dest(&rte, cpu_mask_to_apicid(mask));
     }
     else
     {
-- 
2.51.0



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH 07/12] x86/io-apic: fix usage of setup_ioapic_dest()
Date: Thu, 20 Nov 2025 10:58:21 +0100
Message-ID: <20251120095826.25782-2-roger.pau@citrix.com>
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 <20251120095826.25782-1-roger.pau@citrix.com>
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Attempt to clarify the purpose of setup_ioapic_dest(), as the comment ahead
of it is outdated, and looks to be a verbatim copy from Linux from one of
the code imports.

The function serves two purposes: shuffling the interrupts across CPUs
after SMP bringup or re-assigning all interrupts to CPU#0 if no IRQ
balancing is set at run time.  However the function won't perform any of
those functions correctly, as it was unconditionally using
desc->arch.cpu_mask as the target CPU mask for interrupts (which is the
current target anyway).

Fix by adding a new `shuffle` parameter that's used to signal whether the
function is intended to balance interrupts across CPUs, or to re-assign all
interrupts to the BSP.

Signed-off-by: Roger Pau Monné 
---
I couldn't find a specific Fixes tag to use here, I think this has been
broken all along.
---
 xen/arch/x86/include/asm/irq.h    |  2 +-
 xen/arch/x86/io_apic.c            | 13 +++++++------
 xen/arch/x86/platform_hypercall.c |  2 +-
 xen/arch/x86/smpboot.c            |  3 ++-
 4 files changed, 11 insertions(+), 9 deletions(-)

diff --git a/xen/arch/x86/include/asm/irq.h b/xen/arch/x86/include/asm/irq.h
index 7315150b66b4..df7b48c8653e 100644
--- a/xen/arch/x86/include/asm/irq.h
+++ b/xen/arch/x86/include/asm/irq.h
@@ -137,7 +137,7 @@ int i8259A_resume(void);
 void enable_IO_APIC(void);
 void setup_IO_APIC(void);
 void disable_IO_APIC(void);
-void setup_ioapic_dest(void);
+void setup_ioapic_dest(bool shuffle);
 vmask_t *io_apic_get_used_vector_map(unsigned int irq);
 
 extern unsigned int io_apic_irqs;
diff --git a/xen/arch/x86/io_apic.c b/xen/arch/x86/io_apic.c
index 3c59bf0e15da..19960d291c47 100644
--- a/xen/arch/x86/io_apic.c
+++ b/xen/arch/x86/io_apic.c
@@ -717,12 +717,14 @@ static int __init find_isa_irq_apic(int irq, int type)
 static int pin_2_irq(int idx, int apic, int pin);
 
 /*
- * This function currently is only a helper for the i386 smp boot process where 
- * we need to reprogram the ioredtbls to cater for the cpus which have come online
- * so mask in all cases should simply be TARGET_CPUS
+ * This function serves two different purposes: shuffling the IO-APIC
+ * interrupts across CPUs after SMP bringup, or re-assigning all interrupts to
+ * the BSP if IRQ balancing is disabled at runtime.  Such functional
+ * distinction is signaled by the `shuffle` parameter.
  */
-void /*__init*/ setup_ioapic_dest(void)
+void setup_ioapic_dest(bool shuffle)
 {
+    const cpumask_t *mask = shuffle ? TARGET_CPUS : cpumask_of(0);
     int pin, ioapic, irq, irq_entry;
 
     if (skip_ioapic_setup)
@@ -740,8 +742,7 @@ void /*__init*/ setup_ioapic_dest(void)
             desc = irq_to_desc(irq);
 
             spin_lock_irqsave(&desc->lock, flags);
-            BUG_ON(!cpumask_intersects(desc->arch.cpu_mask, &cpu_online_map));
-            set_ioapic_affinity_irq(desc, desc->arch.cpu_mask);
+            set_ioapic_affinity_irq(desc, mask);
             spin_unlock_irqrestore(&desc->lock, flags);
         }
     }
diff --git a/xen/arch/x86/platform_hypercall.c b/xen/arch/x86/platform_hypercall.c
index 79bb99e0b602..22fd65a6aa7e 100644
--- a/xen/arch/x86/platform_hypercall.c
+++ b/xen/arch/x86/platform_hypercall.c
@@ -337,7 +337,7 @@ ret_t do_platform_op(
         case QUIRK_NOIRQBALANCING:
             printk("Platform quirk -- Disabling IRQ balancing/affinity.\n");
             opt_noirqbalance = 1;
-            setup_ioapic_dest();
+            setup_ioapic_dest(false);
             break;
         case QUIRK_IOAPIC_BAD_REGSEL:
             dprintk(XENLOG_WARNING,
diff --git a/xen/arch/x86/smpboot.c b/xen/arch/x86/smpboot.c
index 69cc9bbc6e2c..55ea62d7d67f 100644
--- a/xen/arch/x86/smpboot.c
+++ b/xen/arch/x86/smpboot.c
@@ -1433,7 +1433,8 @@ void __init smp_cpus_done(void)
         check_nmi_watchdog();
     }
 
-    setup_ioapic_dest();
+    if ( !opt_noirqbalance )
+        setup_ioapic_dest(true);
 
     mtrr_save_state();
     mtrr_aps_sync_end();
-- 
2.51.0



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH 06/12] x86/i8259: redo workaround for AMD spurious PIC interrupts
Date: Thu, 20 Nov 2025 10:58:20 +0100
Message-ID: <20251120095826.25782-1-roger.pau@citrix.com>
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Do not set legacy IRQs target CPU mask to all CPUs, as the interrupt is
strictly targeting a single CPU, even if a spurious interrupt can be
delivered to other CPUs.

Instead set the target CPU mask correctly, as do_IRQ() will always deal
with spurious interrupts generated on AMD hardware.  Otherwise fixup_irqs()
would assume the IRQ is targeting all CPUs, and would simply not perform
the required affinity move if the target CPU goes offline.

Most of this is unlikely to make any difference in practice, the IO-APIC
setup will take over those entries and set the proper destination as part
of startup setup.

Fixes: 87f37449d586 ("x86/i8259: do not assume interrupts always target CPU0")
Signed-off-by: Roger Pau Monné 
---
 xen/arch/x86/i8259.c | 17 +++++------------
 1 file changed, 5 insertions(+), 12 deletions(-)

diff --git a/xen/arch/x86/i8259.c b/xen/arch/x86/i8259.c
index 5c7e21a7515c..41f949a36531 100644
--- a/xen/arch/x86/i8259.c
+++ b/xen/arch/x86/i8259.c
@@ -407,21 +407,14 @@ void __init init_IRQ(void)
         per_cpu(vector_irq, cpu)[LEGACY_VECTOR(irq)] = irq;
 
         /*
-         * The interrupt affinity logic never targets interrupts to offline
-         * CPUs, hence it's safe to use cpumask_all here.
-         *
          * Legacy PIC interrupts are only targeted to CPU0, but depending on
          * the platform they can be distributed to any online CPU in hardware.
-         * Note this behavior has only been observed on AMD hardware. In order
-         * to cope install all active legacy vectors on all CPUs.
-         *
-         * IO-APIC will change the destination mask if/when taking ownership of
-         * the interrupt.
+         * Note this behavior has only been observed on AMD hardware. Set the
+         * target CPU as expected here, and cope with the possibly spurious
+         * interrupts in do_IRQ().  This behavior has only been observed
+         * during AP bringup.
          */
-        cpumask_copy(desc->arch.cpu_mask,
-                     (boot_cpu_data.x86_vendor &
-                      (X86_VENDOR_AMD | X86_VENDOR_HYGON) ? &cpumask_all
-                                                          : cpumask_of(cpu)));
+        cpumask_copy(desc->arch.cpu_mask, cpumask_of(cpu));
         desc->arch.vector = LEGACY_VECTOR(irq);
     }
     
-- 
2.51.0



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH 08/12] x86/irq: adjust bind_irq_vector() to take a single CPU as parameter
Date: Thu, 20 Nov 2025 10:58:22 +0100
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The vector will be targeting a single CPU at a time, so passing a mask is
not needed.  Simplify the interface and adjust callers to make use of it.

Signed-off-by: Roger Pau Monné 
---
 xen/arch/x86/hpet.c            |  2 +-
 xen/arch/x86/include/asm/irq.h |  2 +-
 xen/arch/x86/io_apic.c         |  2 +-
 xen/arch/x86/irq.c             | 23 ++++++++++-------------
 4 files changed, 13 insertions(+), 16 deletions(-)

diff --git a/xen/arch/x86/hpet.c b/xen/arch/x86/hpet.c
index a69abe2650a8..abf4eaf86db1 100644
--- a/xen/arch/x86/hpet.c
+++ b/xen/arch/x86/hpet.c
@@ -352,7 +352,7 @@ static int __init hpet_setup_msi_irq(struct hpet_event_channel *ch)
      * Technically we don't want to bind the IRQ to any CPU yet, but we need to
      * specify at least one online one here.  Use the BSP.
      */
-    ret = bind_irq_vector(ch->msi.irq, HPET_BROADCAST_VECTOR, cpumask_of(0));
+    ret = bind_irq_vector(ch->msi.irq, HPET_BROADCAST_VECTOR, 0);
     if ( ret )
         return ret;
     cpumask_setall(desc->affinity);
diff --git a/xen/arch/x86/include/asm/irq.h b/xen/arch/x86/include/asm/irq.h
index df7b48c8653e..355332188932 100644
--- a/xen/arch/x86/include/asm/irq.h
+++ b/xen/arch/x86/include/asm/irq.h
@@ -199,7 +199,7 @@ void setup_vector_irq(unsigned int cpu);
 void move_native_irq(struct irq_desc *desc);
 void move_masked_irq(struct irq_desc *desc);
 
-int bind_irq_vector(int irq, int vector, const cpumask_t *mask);
+int bind_irq_vector(int irq, int vector, unsigned int cpu);
 
 void cf_check end_nonmaskable_irq(struct irq_desc *desc, uint8_t vector);
 void irq_set_affinity(struct irq_desc *desc, const cpumask_t *mask);
diff --git a/xen/arch/x86/io_apic.c b/xen/arch/x86/io_apic.c
index 19960d291c47..dfbe27b12d54 100644
--- a/xen/arch/x86/io_apic.c
+++ b/xen/arch/x86/io_apic.c
@@ -1859,7 +1859,7 @@ static void __init check_timer(void)
     vector = IRQ0_VECTOR;
     clear_irq_vector(0);
 
-    if ((ret = bind_irq_vector(0, vector, &cpumask_all)))
+    if ((ret = bind_irq_vector(0, vector, smp_processor_id())))
         printk(KERN_ERR"..IRQ0 is not set correctly with ioapic!!!, err:%d\n", ret);
     
     irq_desc[0].status &= ~IRQ_DISABLED;
diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index 5cd934ea2a32..e09559fce856 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -150,26 +150,23 @@ static void trace_irq_mask(uint32_t event, int irq, int vector,
 }
 
 static int __init _bind_irq_vector(struct irq_desc *desc, int vector,
-                                   const cpumask_t *cpu_mask)
+                                   unsigned int cpu)
 {
-    cpumask_t online_mask;
-    int cpu;
-
     BUG_ON((unsigned)vector >= X86_IDT_VECTORS);
 
-    cpumask_and(&online_mask, cpu_mask, &cpu_online_map);
-    if (cpumask_empty(&online_mask))
+    if ( !cpu_online(cpu) )
         return -EINVAL;
     if ( (desc->arch.vector == vector) &&
-         cpumask_equal(desc->arch.cpu_mask, &online_mask) )
+         cpumask_test_cpu(cpu, desc->arch.cpu_mask) )
         return 0;
     if ( desc->arch.vector != IRQ_VECTOR_UNASSIGNED )
         return -EBUSY;
-    trace_irq_mask(TRC_HW_IRQ_BIND_VECTOR, desc->irq, vector, &online_mask);
-    for_each_cpu(cpu, &online_mask)
-        per_cpu(vector_irq, cpu)[vector] = desc->irq;
+
+    trace_irq_mask(TRC_HW_IRQ_BIND_VECTOR, desc->irq, vector, cpumask_of(cpu));
+    per_cpu(vector_irq, cpu)[vector] = desc->irq;
     desc->arch.vector = vector;
-    cpumask_copy(desc->arch.cpu_mask, &online_mask);
+    cpumask_clear(desc->arch.cpu_mask);
+    cpumask_set_cpu(cpu, desc->arch.cpu_mask);
     if ( desc->arch.used_vectors )
     {
         ASSERT(!test_bit(vector, desc->arch.used_vectors));
@@ -179,7 +176,7 @@ static int __init _bind_irq_vector(struct irq_desc *desc, int vector,
     return 0;
 }
 
-int __init bind_irq_vector(int irq, int vector, const cpumask_t *mask)
+int __init bind_irq_vector(int irq, int vector, unsigned int cpu)
 {
     struct irq_desc *desc = irq_to_desc(irq);
     unsigned long flags;
@@ -189,7 +186,7 @@ int __init bind_irq_vector(int irq, int vector, const cpumask_t *mask)
 
     spin_lock_irqsave(&desc->lock, flags);
     spin_lock(&vector_lock);
-    ret = _bind_irq_vector(desc, vector, mask);
+    ret = _bind_irq_vector(desc, vector, cpu);
     spin_unlock(&vector_lock);
     spin_unlock_irqrestore(&desc->lock, flags);
 
-- 
2.51.0



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Julien Grall ,
	Stefano Stabellini 
Subject: [PATCH 09/12] x86/irq: convert cpumask parameter to integer in {,p}irq_set_affinity()
Date: Thu, 20 Nov 2025 10:58:23 +0100
Message-ID: <20251120095826.25782-4-roger.pau@citrix.com>
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 <20251120095826.25782-1-roger.pau@citrix.com>
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Existing callers where already generating the passed cpumask using
cpumask_of() to contain a single target CPU.  Reduce complexity by passing
the single target CPU as an integer parameter.

No functional change intended.

Signed-off-by: Roger Pau Monné 
---
The function names are misleading, as {,p}irq_set_affinity() doesn't adjust
the affinity of the interrupt (desc->affinity) but the interrupt target
itself.  Further cleanup might be helpful to correctly differentiate
between setting interrupt affinity vs setting interrupt target.
---
 xen/arch/x86/hvm/hvm.c         | 2 +-
 xen/arch/x86/include/asm/irq.h | 2 +-
 xen/arch/x86/irq.c             | 8 ++++----
 xen/common/event_channel.c     | 6 ++----
 xen/include/xen/irq.h          | 3 +--
 5 files changed, 9 insertions(+), 12 deletions(-)

diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 0ff242d4a0d6..33521599a844 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -485,7 +485,7 @@ void hvm_migrate_pirq(struct hvm_pirq_dpci *pirq_dpci, const struct vcpu *v)
         if ( !desc )
             return;
         ASSERT(MSI_IRQ(desc - irq_desc));
-        irq_set_affinity(desc, cpumask_of(v->processor));
+        irq_set_affinity(desc, v->processor);
         spin_unlock_irq(&desc->lock);
     }
 }
diff --git a/xen/arch/x86/include/asm/irq.h b/xen/arch/x86/include/asm/irq.h
index 355332188932..73abc8323a8d 100644
--- a/xen/arch/x86/include/asm/irq.h
+++ b/xen/arch/x86/include/asm/irq.h
@@ -202,7 +202,7 @@ void move_masked_irq(struct irq_desc *desc);
 int bind_irq_vector(int irq, int vector, unsigned int cpu);
 
 void cf_check end_nonmaskable_irq(struct irq_desc *desc, uint8_t vector);
-void irq_set_affinity(struct irq_desc *desc, const cpumask_t *mask);
+void irq_set_affinity(struct irq_desc *desc, unsigned int cpu);
 
 int init_domain_irq_mapping(struct domain *d);
 void cleanup_domain_irq_mapping(struct domain *d);
diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index e09559fce856..bfb94852a6dc 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -947,7 +947,7 @@ unsigned int set_desc_affinity(struct irq_desc *desc, const cpumask_t *mask)
 }
 
 /* For re-setting irq interrupt affinity for specific irq */
-void irq_set_affinity(struct irq_desc *desc, const cpumask_t *mask)
+void irq_set_affinity(struct irq_desc *desc, unsigned int cpu)
 {
     if (!desc->handler->set_affinity)
         return;
@@ -955,19 +955,19 @@ void irq_set_affinity(struct irq_desc *desc, const cpumask_t *mask)
     ASSERT(spin_is_locked(&desc->lock));
     desc->status &= ~IRQ_MOVE_PENDING;
     smp_wmb();
-    cpumask_copy(desc->arch.pending_mask, mask);
+    cpumask_copy(desc->arch.pending_mask, cpumask_of(cpu));
     smp_wmb();
     desc->status |= IRQ_MOVE_PENDING;
 }
 
-void pirq_set_affinity(struct domain *d, int pirq, const cpumask_t *mask)
+void pirq_set_affinity(struct domain *d, int pirq, unsigned int cpu)
 {
     unsigned long flags;
     struct irq_desc *desc = domain_spin_lock_irq_desc(d, pirq, &flags);
 
     if ( !desc )
         return;
-    irq_set_affinity(desc, mask);
+    irq_set_affinity(desc, cpu);
     spin_unlock_irqrestore(&desc->lock, flags);
 }
 
diff --git a/xen/common/event_channel.c b/xen/common/event_channel.c
index 67700b050ad1..8e155649b171 100644
--- a/xen/common/event_channel.c
+++ b/xen/common/event_channel.c
@@ -1226,8 +1226,7 @@ int evtchn_bind_vcpu(evtchn_port_t port, unsigned int vcpu_id)
             break;
         unlink_pirq_port(chn, d->vcpu[chn->notify_vcpu_id]);
         chn->notify_vcpu_id = v->vcpu_id;
-        pirq_set_affinity(d, chn->u.pirq.irq,
-                          cpumask_of(v->processor));
+        pirq_set_affinity(d, chn->u.pirq.irq, v->processor);
         link_pirq_port(port, chn, v);
         break;
 #endif
@@ -1712,7 +1711,6 @@ void evtchn_destroy_final(struct domain *d)
 void evtchn_move_pirqs(struct vcpu *v)
 {
     struct domain *d = v->domain;
-    const cpumask_t *mask = cpumask_of(v->processor);
     unsigned int port;
     struct evtchn *chn;
 
@@ -1720,7 +1718,7 @@ void evtchn_move_pirqs(struct vcpu *v)
     for ( port = v->pirq_evtchn_head; port; port = chn->u.pirq.next_port )
     {
         chn = evtchn_from_port(d, port);
-        pirq_set_affinity(d, chn->u.pirq.irq, mask);
+        pirq_set_affinity(d, chn->u.pirq.irq, v->processor);
     }
     read_unlock(&d->event_lock);
 }
diff --git a/xen/include/xen/irq.h b/xen/include/xen/irq.h
index 95034c0d6bb5..f0b119d23521 100644
--- a/xen/include/xen/irq.h
+++ b/xen/include/xen/irq.h
@@ -193,8 +193,7 @@ extern void desc_guest_eoi(struct irq_desc *desc, struct pirq *pirq);
 extern int pirq_guest_unmask(struct domain *d);
 extern int pirq_guest_bind(struct vcpu *v, struct pirq *pirq, int will_share);
 extern void pirq_guest_unbind(struct domain *d, struct pirq *pirq);
-extern void pirq_set_affinity(struct domain *d, int pirq,
-                              const cpumask_t *mask);
+extern void pirq_set_affinity(struct domain *d, int pirq, unsigned int cpu);
 extern struct irq_desc *domain_spin_lock_irq_desc(
     struct domain *d, int pirq, unsigned long *pflags);
 extern struct irq_desc *pirq_spin_lock_irq_desc(
-- 
2.51.0



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Julien Grall ,
	Stefano Stabellini ,
	Jason Andryuk 
Subject: [PATCH 10/12] x86/irq: convert irq_desc cpu_mask field to integer
Date: Thu, 20 Nov 2025 10:58:24 +0100
Message-ID: <20251120095826.25782-5-roger.pau@citrix.com>
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With the dropping of logical target mode for interrupts Xen can now
guarantee that an irq_desc can only target a single CPU.  As such, simplify
the fields and convert the cpu_mask that used to contain the set of target
CPUs into a integer that will contain the single target CPU.

No functional change intended in how interrupts are assigned or distributed
across CPUs.

Signed-off-by: Roger Pau Monné 
---
 xen/arch/x86/hpet.c                      |  9 ++-
 xen/arch/x86/i8259.c                     |  2 +-
 xen/arch/x86/include/asm/irq.h           | 10 +--
 xen/arch/x86/include/asm/msi.h           |  3 +-
 xen/arch/x86/io_apic.c                   | 27 +++----
 xen/arch/x86/irq.c                       | 97 ++++++++++--------------
 xen/arch/x86/msi.c                       | 17 +----
 xen/arch/x86/smpboot.c                   |  2 +-
 xen/common/cpu.c                         |  1 +
 xen/drivers/passthrough/amd/iommu_init.c |  2 +-
 xen/drivers/passthrough/vtd/iommu.c      |  2 +-
 xen/include/xen/cpumask.h                |  1 +
 12 files changed, 70 insertions(+), 103 deletions(-)

diff --git a/xen/arch/x86/hpet.c b/xen/arch/x86/hpet.c
index abf4eaf86db1..168675420f06 100644
--- a/xen/arch/x86/hpet.c
+++ b/xen/arch/x86/hpet.c
@@ -310,9 +310,9 @@ static void cf_check hpet_msi_set_affinity(
     struct msi_msg msg = ch->msi.msg;
 
     /* This really is only for dump_irqs(). */
-    cpumask_copy(desc->arch.cpu_mask, mask);
+    desc->arch.cpu = cpumask_any(mask);
 
-    msg.dest32 = cpu_mask_to_apicid(mask);
+    msg.dest32 = cpu_physical_id(desc->arch.cpu);
     msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK;
     msg.address_lo |= MSI_ADDR_DEST_ID(msg.dest32);
     if ( msg.dest32 != ch->msi.msg.dest32 )
@@ -337,7 +337,8 @@ static int __hpet_setup_msi_irq(struct irq_desc *desc)
 {
     struct msi_msg msg;
 
-    msi_compose_msg(desc->arch.vector, desc->arch.cpu_mask, &msg);
+    msg.dest32 = cpu_physical_id(desc->arch.cpu);
+    msi_compose_msg(desc->arch.vector, &msg);
     return hpet_msi_write(desc->action->dev_id, &msg);
 }
 
@@ -501,7 +502,7 @@ static void set_channel_irq_affinity(struct hpet_event_channel *ch)
      * we're no longer at risk of missing IRQs (provided hpet_broadcast_enter()
      * keeps setting the new deadline only afterwards).
      */
-    cpumask_copy(desc->arch.cpu_mask, cpumask_of(ch->cpu));
+    desc->arch.cpu = ch->cpu;
 
     spin_unlock(&desc->lock);
 
diff --git a/xen/arch/x86/i8259.c b/xen/arch/x86/i8259.c
index 41f949a36531..5ad5e622c0e1 100644
--- a/xen/arch/x86/i8259.c
+++ b/xen/arch/x86/i8259.c
@@ -414,7 +414,7 @@ void __init init_IRQ(void)
          * interrupts in do_IRQ().  This behavior has only been observed
          * during AP bringup.
          */
-        cpumask_copy(desc->arch.cpu_mask, cpumask_of(cpu));
+        desc->arch.cpu = cpu;
         desc->arch.vector = LEGACY_VECTOR(irq);
     }
     
diff --git a/xen/arch/x86/include/asm/irq.h b/xen/arch/x86/include/asm/irq.h
index 73abc8323a8d..97c706acebf2 100644
--- a/xen/arch/x86/include/asm/irq.h
+++ b/xen/arch/x86/include/asm/irq.h
@@ -69,13 +69,9 @@ struct irq_desc;
 struct arch_irq_desc {
         int16_t vector;                  /* vector itself is only 8 bits, */
         int16_t old_vector;              /* but we use -1 for unassigned  */
-        /*
-         * Except for high priority interrupts @cpu_mask may have bits set for
-         * offline CPUs.  Consumers need to be careful to mask this down to
-         * online ones as necessary.  There is supposed to always be a non-
-         * empty intersection with cpu_online_map.
-         */
-        cpumask_var_t cpu_mask;
+/* Special target CPU values. */
+#define CPU_INVALID  ~0U
+        unsigned int cpu;                /* Target CPU of the interrupt. */
         cpumask_var_t old_cpu_mask;
         cpumask_var_t pending_mask;
         vmask_t *used_vectors;
diff --git a/xen/arch/x86/include/asm/msi.h b/xen/arch/x86/include/asm/msi.h
index 00059d4a3a9d..2f91294105be 100644
--- a/xen/arch/x86/include/asm/msi.h
+++ b/xen/arch/x86/include/asm/msi.h
@@ -235,8 +235,7 @@ struct arch_msix {
 };
 
 void early_msi_init(void);
-void msi_compose_msg(unsigned vector, const cpumask_t *cpu_mask,
-                     struct msi_msg *msg);
+void msi_compose_msg(unsigned vector, struct msi_msg *msg);
 void __msi_set_enable(pci_sbdf_t sbdf, int pos, int enable);
 void cf_check mask_msi_irq(struct irq_desc *desc);
 void cf_check unmask_msi_irq(struct irq_desc *desc);
diff --git a/xen/arch/x86/io_apic.c b/xen/arch/x86/io_apic.c
index dfbe27b12d54..a50f7061161a 100644
--- a/xen/arch/x86/io_apic.c
+++ b/xen/arch/x86/io_apic.c
@@ -1112,8 +1112,7 @@ static void __init setup_IO_APIC_irqs(void)
             if (platform_legacy_irq(irq))
                 disable_8259A_irq(irq_to_desc(irq));
 
-            set_entry_dest(&entry,
-                           cpu_mask_to_apicid(irq_to_desc(irq)->arch.cpu_mask));
+            set_entry_dest(&entry, cpu_physical_id(irq_to_desc(irq)->arch.cpu));
             spin_lock_irqsave(&ioapic_lock, flags);
             __ioapic_write_entry(apic, pin, false, entry);
             spin_unlock_irqrestore(&ioapic_lock, flags);
@@ -2137,14 +2136,11 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int a
         return vector;
     entry.vector = vector;
 
-    if (cpumask_intersects(desc->arch.cpu_mask, TARGET_CPUS)) {
-        cpumask_t *mask = this_cpu(scratch_cpumask);
-
-        cpumask_and(mask, desc->arch.cpu_mask, TARGET_CPUS);
-        set_entry_dest(&entry, cpu_mask_to_apicid(mask));
+    if (cpu_online(desc->arch.cpu)) {
+        set_entry_dest(&entry, cpu_physical_id(desc->arch.cpu));
     } else {
-        printk(XENLOG_ERR "IRQ%d: no target CPU (%*pb vs %*pb)\n",
-               irq, CPUMASK_PR(desc->arch.cpu_mask), CPUMASK_PR(TARGET_CPUS));
+        printk(XENLOG_ERR "IRQ%d: target CPU %u is offline\n",
+               irq, desc->arch.cpu);
         desc->status |= IRQ_DISABLED;
     }
 
@@ -2333,17 +2329,12 @@ int ioapic_guest_write(unsigned long physbase, unsigned int reg, u32 val)
     /* Set the vector field to the real vector! */
     rte.vector = desc->arch.vector;
 
-    if ( cpumask_intersects(desc->arch.cpu_mask, TARGET_CPUS) )
-    {
-        cpumask_t *mask = this_cpu(scratch_cpumask);
-
-        cpumask_and(mask, desc->arch.cpu_mask, TARGET_CPUS);
-        set_entry_dest(&rte, cpu_mask_to_apicid(mask));
-    }
+    if ( cpu_online(desc->arch.cpu) )
+        set_entry_dest(&rte, cpu_physical_id(desc->arch.cpu));
     else
     {
-        gprintk(XENLOG_ERR, "IRQ%d: no target CPU (%*pb vs %*pb)\n",
-               irq, CPUMASK_PR(desc->arch.cpu_mask), CPUMASK_PR(TARGET_CPUS));
+        gprintk(XENLOG_ERR, "IRQ%d: target CPU %u offline\n",
+                irq, desc->arch.cpu);
         desc->status |= IRQ_DISABLED;
         rte.mask = 1;
     }
diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index bfb94852a6dc..a56d1e8fc267 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -156,8 +156,7 @@ static int __init _bind_irq_vector(struct irq_desc *desc, int vector,
 
     if ( !cpu_online(cpu) )
         return -EINVAL;
-    if ( (desc->arch.vector == vector) &&
-         cpumask_test_cpu(cpu, desc->arch.cpu_mask) )
+    if ( (desc->arch.vector == vector) && cpu == desc->arch.cpu )
         return 0;
     if ( desc->arch.vector != IRQ_VECTOR_UNASSIGNED )
         return -EBUSY;
@@ -165,8 +164,7 @@ static int __init _bind_irq_vector(struct irq_desc *desc, int vector,
     trace_irq_mask(TRC_HW_IRQ_BIND_VECTOR, desc->irq, vector, cpumask_of(cpu));
     per_cpu(vector_irq, cpu)[vector] = desc->irq;
     desc->arch.vector = vector;
-    cpumask_clear(desc->arch.cpu_mask);
-    cpumask_set_cpu(cpu, desc->arch.cpu_mask);
+    desc->arch.cpu = cpu;
     if ( desc->arch.used_vectors )
     {
         ASSERT(!test_bit(vector, desc->arch.used_vectors));
@@ -195,23 +193,21 @@ int __init bind_irq_vector(int irq, int vector, unsigned int cpu)
 
 static void _clear_irq_vector(struct irq_desc *desc)
 {
-    unsigned int cpu, old_vector, irq = desc->irq;
+    unsigned int cpu = desc->arch.cpu, old_vector, irq = desc->irq;
     unsigned int vector = desc->arch.vector;
     cpumask_t *tmp_mask = this_cpu(scratch_cpumask);
 
     BUG_ON(!valid_irq_vector(vector));
 
     /* Always clear desc->arch.vector */
-    cpumask_and(tmp_mask, desc->arch.cpu_mask, &cpu_online_map);
-
-    for_each_cpu(cpu, tmp_mask)
+    if ( cpu_online(cpu) )
     {
         ASSERT(per_cpu(vector_irq, cpu)[vector] == irq);
         per_cpu(vector_irq, cpu)[vector] = ~irq;
     }
 
     desc->arch.vector = IRQ_VECTOR_UNASSIGNED;
-    cpumask_clear(desc->arch.cpu_mask);
+    desc->arch.cpu = CPU_INVALID;
 
     if ( desc->arch.used_vectors )
     {
@@ -219,7 +215,7 @@ static void _clear_irq_vector(struct irq_desc *desc)
         clear_bit(vector, desc->arch.used_vectors);
     }
 
-    trace_irq_mask(TRC_HW_IRQ_CLEAR_VECTOR, irq, vector, tmp_mask);
+    trace_irq_mask(TRC_HW_IRQ_CLEAR_VECTOR, irq, vector, cpumask_of(cpu));
 
     if ( unlikely(desc->arch.move_in_progress) )
     {
@@ -392,22 +388,16 @@ int irq_to_vector(int irq)
 
 int arch_init_one_irq_desc(struct irq_desc *desc)
 {
-    if ( !zalloc_cpumask_var(&desc->arch.cpu_mask) )
-        return -ENOMEM;
-
     if ( !alloc_cpumask_var(&desc->arch.old_cpu_mask) )
-    {
-        free_cpumask_var(desc->arch.cpu_mask);
         return -ENOMEM;
-    }
 
     if ( !alloc_cpumask_var(&desc->arch.pending_mask) )
     {
         free_cpumask_var(desc->arch.old_cpu_mask);
-        free_cpumask_var(desc->arch.cpu_mask);
         return -ENOMEM;
     }
 
+    desc->arch.cpu = CPU_INVALID;
     desc->arch.vector = IRQ_VECTOR_UNASSIGNED;
     desc->arch.old_vector = IRQ_VECTOR_UNASSIGNED;
     desc->arch.creator_domid = DOMID_INVALID;
@@ -553,12 +543,12 @@ static int _assign_irq_vector(struct irq_desc *desc, const cpumask_t *mask)
         if ( old_vector >= FIRST_HIPRIORITY_VECTOR &&
              old_vector <= LAST_HIPRIORITY_VECTOR )
         {
-            cpumask_copy(desc->arch.cpu_mask,
-                         cpumask_of(cpumask_any(&tmp_mask)));
+            desc->arch.cpu = cpumask_any(&tmp_mask);
             return 0;
         }
 
-        if (cpumask_intersects(&tmp_mask, desc->arch.cpu_mask)) {
+        if ( cpumask_test_cpu(desc->arch.cpu, &tmp_mask) )
+        {
             desc->arch.vector = old_vector;
             return 0;
         }
@@ -570,7 +560,7 @@ static int _assign_irq_vector(struct irq_desc *desc, const cpumask_t *mask)
          * If the current destination is online refuse to shuffle.  Retry after
          * the in-progress movement has finished.
          */
-        if ( cpumask_intersects(desc->arch.cpu_mask, &cpu_online_map) )
+        if ( cpu_online(desc->arch.cpu) )
             return -EAGAIN;
 
         /*
@@ -591,11 +581,10 @@ static int _assign_irq_vector(struct irq_desc *desc, const cpumask_t *mask)
              * in the 'mask' parameter.
              */
             desc->arch.vector = desc->arch.old_vector;
-            cpumask_and(desc->arch.cpu_mask, desc->arch.old_cpu_mask, mask);
+            desc->arch.cpu = cpumask_any(desc->arch.old_cpu_mask);
 
             /* Undo any possibly done cleanup. */
-            for_each_cpu(cpu, desc->arch.cpu_mask)
-                per_cpu(vector_irq, cpu)[desc->arch.vector] = irq;
+            per_cpu(vector_irq, desc->arch.cpu)[desc->arch.vector] = irq;
 
             /* Cancel the pending move and release the current vector. */
             desc->arch.old_vector = IRQ_VECTOR_UNASSIGNED;
@@ -669,7 +658,7 @@ next:
 
         if ( desc->arch.move_in_progress || desc->arch.move_cleanup_count )
         {
-            ASSERT(!cpumask_intersects(desc->arch.cpu_mask, &cpu_online_map));
+            ASSERT(!cpu_online(desc->arch.cpu));
             /*
              * Special case when evacuating an interrupt from a CPU to be
              * offlined and the interrupt was already in the process of being
@@ -684,8 +673,9 @@ next:
         }
         else if ( valid_irq_vector(old_vector) )
         {
-            cpumask_and(desc->arch.old_cpu_mask, desc->arch.cpu_mask,
-                        &cpu_online_map);
+            cpumask_clear(desc->arch.old_cpu_mask);
+            if ( cpu_online(desc->arch.cpu) )
+                cpumask_set_cpu(desc->arch.cpu, desc->arch.old_cpu_mask);
             desc->arch.old_vector = desc->arch.vector;
             if ( !cpumask_empty(desc->arch.old_cpu_mask) )
                 desc->arch.move_in_progress = 1;
@@ -698,8 +688,7 @@ next:
 
         per_cpu(vector_irq, cpu)[vector] = irq;
         desc->arch.vector = vector;
-        cpumask_clear(desc->arch.cpu_mask);
-        cpumask_set_cpu(cpu, desc->arch.cpu_mask);
+        desc->arch.cpu = cpu;
 
         desc->arch.used = IRQ_USED;
         ASSERT((desc->arch.used_vectors == NULL)
@@ -762,14 +751,14 @@ void setup_vector_irq(unsigned int cpu)
     /* Mark the inuse vectors */
     for ( irq = 0; irq < nr_irqs; ++irq )
     {
-        struct irq_desc *desc = irq_to_desc(irq);
+        const struct irq_desc *desc = irq_to_desc(irq);
 
         if ( !irq_desc_initialized(desc) )
             continue;
         vector = irq_to_vector(irq);
         if ( (vector >= FIRST_HIPRIORITY_VECTOR &&
               vector <= LAST_HIPRIORITY_VECTOR) ||
-             cpumask_test_cpu(cpu, desc->arch.cpu_mask) )
+             cpu == desc->arch.cpu )
             per_cpu(vector_irq, cpu)[vector] = irq;
     }
 }
@@ -847,8 +836,7 @@ void cf_check irq_move_cleanup_interrupt(void)
         if (!desc->arch.move_cleanup_count)
             goto unlock;
 
-        if ( vector == desc->arch.vector &&
-             cpumask_test_cpu(me, desc->arch.cpu_mask) )
+        if ( vector == desc->arch.vector && me == desc->arch.cpu )
             goto unlock;
 
         irr = apic_read(APIC_IRR + (vector / 32 * 0x10));
@@ -910,8 +898,7 @@ void cf_check irq_complete_move(struct irq_desc *desc)
     vector = (u8)get_irq_regs()->entry_vector;
     me = smp_processor_id();
 
-    if ( vector == desc->arch.vector &&
-         cpumask_test_cpu(me, desc->arch.cpu_mask) )
+    if ( vector == desc->arch.vector && me == desc->arch.cpu )
         send_cleanup_vector(desc);
 }
 
@@ -919,7 +906,6 @@ unsigned int set_desc_affinity(struct irq_desc *desc, const cpumask_t *mask)
 {
     int ret;
     unsigned long flags;
-    cpumask_t dest_mask;
 
     if ( mask && !cpumask_intersects(mask, &cpu_online_map) )
         return BAD_APICID;
@@ -932,18 +918,12 @@ unsigned int set_desc_affinity(struct irq_desc *desc, const cpumask_t *mask)
         return BAD_APICID;
 
     if ( mask )
-    {
         cpumask_copy(desc->affinity, mask);
-        cpumask_and(&dest_mask, mask, desc->arch.cpu_mask);
-    }
     else
-    {
         cpumask_setall(desc->affinity);
-        cpumask_copy(&dest_mask, desc->arch.cpu_mask);
-    }
-    cpumask_and(&dest_mask, &dest_mask, &cpu_online_map);
 
-    return cpu_mask_to_apicid(&dest_mask);
+    ASSERT(cpu_online(desc->arch.cpu));
+    return cpu_physical_id(desc->arch.cpu);
 }
 
 /* For re-setting irq interrupt affinity for specific irq */
@@ -1687,8 +1667,7 @@ int pirq_guest_bind(struct vcpu *v, struct pirq *pirq, int will_share)
                 cpumask_setall(desc->affinity);
                 affinity = &cpumask_all;
             }
-            else if ( !cpumask_intersects(desc->arch.cpu_mask,
-                                          &cpu_online_map) )
+            else if ( !cpu_online(desc->arch.cpu) )
                 affinity = desc->affinity;
             if ( affinity )
                 desc->handler->set_affinity(desc, affinity);
@@ -1966,6 +1945,15 @@ static void do_IRQ_guest(struct irq_desc *desc, unsigned int vector)
     }
 }
 
+static const cpumask_t *get_cpumask(unsigned int cpu)
+{
+    if ( cpu < nr_cpu_ids )
+        return cpumask_of(cpu);
+
+    ASSERT(cpu == CPU_INVALID);
+    return &cpumask_none;
+}
+
 void do_IRQ(struct cpu_user_regs *regs)
 {
     struct irqaction *action;
@@ -2013,7 +2001,8 @@ void do_IRQ(struct cpu_user_regs *regs)
                     spin_lock(&desc->lock);
                     printk("IRQ%d a={%*pbl}[{%*pbl},{%*pbl}] v=%02x[%02x] t=%s s=%08x\n",
                            ~irq, CPUMASK_PR(desc->affinity),
-                           CPUMASK_PR(desc->arch.cpu_mask),
+                           /* TODO: handle hipri vectors nicely. */
+                           CPUMASK_PR(get_cpumask(desc->arch.cpu)),
                            CPUMASK_PR(desc->arch.old_cpu_mask),
                            desc->arch.vector, desc->arch.old_vector,
                            desc->handler->typename, desc->status);
@@ -2545,7 +2534,8 @@ static void cf_check dump_irqs(unsigned char key)
 
         printk("   IRQ:%4d vec:%02x %-15s status=%03x aff:{%*pbl}/{%*pbl} ",
                irq, desc->arch.vector, desc->handler->typename, desc->status,
-               CPUMASK_PR(desc->affinity), CPUMASK_PR(desc->arch.cpu_mask));
+               CPUMASK_PR(desc->affinity),
+               CPUMASK_PR(get_cpumask(desc->arch.cpu)));
 
         if ( ssid )
             printk("Z=%-25s ", ssid);
@@ -2683,8 +2673,7 @@ void fixup_irqs(void)
              * interrupts.
              */
             if ( apic_irr_read(desc->arch.old_vector) )
-                send_IPI_mask(cpumask_of(cpumask_any(desc->arch.cpu_mask)),
-                              desc->arch.vector);
+                send_IPI_mask(cpumask_of(desc->arch.cpu), desc->arch.vector);
 
             /*
              * This CPU is going offline, remove it from ->arch.old_cpu_mask
@@ -2709,8 +2698,7 @@ void fixup_irqs(void)
          * are a subset of the online mask.  What fixup_irqs() cares about is
          * evacuating interrupts from CPUs not in the online mask.
          */
-        if ( !desc->action || cpumask_subset(desc->arch.cpu_mask,
-                                             &cpu_online_map) )
+        if ( !desc->action || cpu_online(desc->arch.cpu) )
         {
             spin_unlock(&desc->lock);
             continue;
@@ -2732,7 +2720,7 @@ void fixup_irqs(void)
          * the interrupt, signal to check whether there are any pending vectors
          * to be handled in the local APIC after the interrupt has been moved.
          */
-        if ( cpumask_test_cpu(cpu, desc->arch.cpu_mask) )
+        if ( cpu == desc->arch.cpu )
             check_irr = true;
 
         if ( desc->handler->set_affinity )
@@ -2754,8 +2742,7 @@ void fixup_irqs(void)
              * desc in order for any in-flight interrupts to be delivered to
              * the lapic.
              */
-            send_IPI_mask(cpumask_of(cpumask_any(desc->arch.cpu_mask)),
-                          desc->arch.vector);
+            send_IPI_mask(cpumask_of(desc->arch.cpu), desc->arch.vector);
 
         spin_unlock(&desc->lock);
 
diff --git a/xen/arch/x86/msi.c b/xen/arch/x86/msi.c
index 5389bc08674a..f70abac687e4 100644
--- a/xen/arch/x86/msi.c
+++ b/xen/arch/x86/msi.c
@@ -154,24 +154,13 @@ static bool msix_memory_decoded(const struct pci_dev *dev, unsigned int pos)
 /*
  * MSI message composition
  */
-void msi_compose_msg(unsigned vector, const cpumask_t *cpu_mask, struct msi_msg *msg)
+void msi_compose_msg(unsigned vector, struct msi_msg *msg)
 {
     memset(msg, 0, sizeof(*msg));
 
     if ( vector < FIRST_DYNAMIC_VECTOR )
         return;
 
-    if ( cpu_mask )
-    {
-        cpumask_t *mask = this_cpu(scratch_cpumask);
-
-        if ( !cpumask_intersects(cpu_mask, &cpu_online_map) )
-            return;
-
-        cpumask_and(mask, cpu_mask, &cpu_online_map);
-        msg->dest32 = cpu_mask_to_apicid(mask);
-    }
-
     msg->address_hi = MSI_ADDR_BASE_HI;
     msg->address_lo = MSI_ADDR_BASE_LO |
                       MSI_ADDR_DESTMODE_PHYS |
@@ -531,7 +520,9 @@ int __setup_msi_irq(struct irq_desc *desc, struct msi_desc *msidesc,
 
     desc->msi_desc = msidesc;
     desc->handler = handler;
-    msi_compose_msg(desc->arch.vector, desc->arch.cpu_mask, &msg);
+    msg.dest32 = cpu_physical_id(desc->arch.cpu);
+
+    msi_compose_msg(desc->arch.vector, &msg);
     ret = write_msi_msg(msidesc, &msg, true);
     if ( unlikely(ret) )
     {
diff --git a/xen/arch/x86/smpboot.c b/xen/arch/x86/smpboot.c
index 55ea62d7d67f..3492073d5c8c 100644
--- a/xen/arch/x86/smpboot.c
+++ b/xen/arch/x86/smpboot.c
@@ -1465,7 +1465,7 @@ void __init smp_intr_init(void)
 
         desc = irq_to_desc(irq);
         desc->arch.vector = vector;
-        cpumask_copy(desc->arch.cpu_mask, cpumask_of(cpu));
+        desc->arch.cpu = cpu;
         cpumask_setall(desc->affinity);
     }
 
diff --git a/xen/common/cpu.c b/xen/common/cpu.c
index f09af0444b6a..f52f02e2a9d6 100644
--- a/xen/common/cpu.c
+++ b/xen/common/cpu.c
@@ -16,6 +16,7 @@ unsigned int __read_mostly nr_cpumask_bits
 const cpumask_t cpumask_all = {
     .bits[0 ... (BITS_TO_LONGS(NR_CPUS) - 1)] = ~0UL
 };
+const cpumask_t cpumask_none;
 
 /*
  * cpu_bit_bitmap[] is a special, "compressed" data structure that
diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c
index 00d2c46cbcd5..0d03b9d86254 100644
--- a/xen/drivers/passthrough/amd/iommu_init.c
+++ b/xen/drivers/passthrough/amd/iommu_init.c
@@ -507,7 +507,7 @@ static void cf_check set_x2apic_affinity(
     if ( dest == BAD_APICID )
         return;
 
-    msi_compose_msg(desc->arch.vector, NULL, &iommu->msi.msg);
+    msi_compose_msg(desc->arch.vector, &iommu->msi.msg);
     iommu->msi.msg.dest32 = dest;
 
     ctrl.dest_mode = MASK_EXTR(iommu->msi.msg.address_lo,
diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c
index 90f36ac22b8a..d2dbf74bc8bb 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -1194,7 +1194,7 @@ static void cf_check dma_msi_set_affinity(
         return;
     }
 
-    msi_compose_msg(desc->arch.vector, NULL, &msg);
+    msi_compose_msg(desc->arch.vector, &msg);
     msg.dest32 = dest;
     if (x2apic_enabled)
         msg.address_hi = dest & 0xFFFFFF00;
diff --git a/xen/include/xen/cpumask.h b/xen/include/xen/cpumask.h
index b713bb69a9cb..1d72c179d7a4 100644
--- a/xen/include/xen/cpumask.h
+++ b/xen/include/xen/cpumask.h
@@ -289,6 +289,7 @@ static inline const cpumask_t *cpumask_of(unsigned int cpu)
 #define cpumask_bits(maskp) ((maskp)->bits)
 
 extern const cpumask_t cpumask_all;
+extern const cpumask_t cpumask_none;
 
 /*
  * cpumask_var_t: struct cpumask for stack usage.
-- 
2.51.0



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH 11/12] x86/irq: convert irq_desc old_cpu_mask field to integer
Date: Thu, 20 Nov 2025 10:58:25 +0100
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As the cpu_mask field has already been converted to an integer, propagate
such change to the field that stores the previous target CPU and convert it
to an integer.

Also convert the move_cleanup_count field into a boolean, since the
previous target will always be a single CPU.

Signed-off-by: Roger Pau Monné 
---
 xen/arch/x86/include/asm/irq.h |  4 +-
 xen/arch/x86/irq.c             | 90 +++++++++++++---------------------
 2 files changed, 35 insertions(+), 59 deletions(-)

diff --git a/xen/arch/x86/include/asm/irq.h b/xen/arch/x86/include/asm/irq.h
index 97c706acebf2..bc59ce7c3ffb 100644
--- a/xen/arch/x86/include/asm/irq.h
+++ b/xen/arch/x86/include/asm/irq.h
@@ -72,10 +72,10 @@ struct arch_irq_desc {
 /* Special target CPU values. */
 #define CPU_INVALID  ~0U
         unsigned int cpu;                /* Target CPU of the interrupt. */
-        cpumask_var_t old_cpu_mask;
+        unsigned int old_cpu;
         cpumask_var_t pending_mask;
         vmask_t *used_vectors;
-        unsigned move_cleanup_count;
+        bool move_cleanup : 1;
         bool move_in_progress : 1;
         int8_t used;
         /*
diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index a56d1e8fc267..680f190da065 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -115,7 +115,7 @@ static void release_old_vec(struct irq_desc *desc)
     unsigned int vector = desc->arch.old_vector;
 
     desc->arch.old_vector = IRQ_VECTOR_UNASSIGNED;
-    cpumask_clear(desc->arch.old_cpu_mask);
+    desc->arch.old_cpu = CPU_INVALID;
 
     if ( !valid_irq_vector(vector) )
         ASSERT_UNREACHABLE();
@@ -195,7 +195,6 @@ static void _clear_irq_vector(struct irq_desc *desc)
 {
     unsigned int cpu = desc->arch.cpu, old_vector, irq = desc->irq;
     unsigned int vector = desc->arch.vector;
-    cpumask_t *tmp_mask = this_cpu(scratch_cpumask);
 
     BUG_ON(!valid_irq_vector(vector));
 
@@ -221,10 +220,10 @@ static void _clear_irq_vector(struct irq_desc *desc)
     {
         /* If we were in motion, also clear desc->arch.old_vector */
         old_vector = desc->arch.old_vector;
-        cpumask_and(tmp_mask, desc->arch.old_cpu_mask, &cpu_online_map);
 
-        for_each_cpu(cpu, tmp_mask)
+        if ( cpu_online(desc->arch.old_cpu) )
         {
+            cpu = desc->arch.old_cpu;
             ASSERT(per_cpu(vector_irq, cpu)[old_vector] == irq);
             TRACE_TIME(TRC_HW_IRQ_MOVE_FINISH, irq, old_vector, cpu);
             per_cpu(vector_irq, cpu)[old_vector] = ~irq;
@@ -388,16 +387,11 @@ int irq_to_vector(int irq)
 
 int arch_init_one_irq_desc(struct irq_desc *desc)
 {
-    if ( !alloc_cpumask_var(&desc->arch.old_cpu_mask) )
-        return -ENOMEM;
-
     if ( !alloc_cpumask_var(&desc->arch.pending_mask) )
-    {
-        free_cpumask_var(desc->arch.old_cpu_mask);
         return -ENOMEM;
-    }
 
     desc->arch.cpu = CPU_INVALID;
+    desc->arch.old_cpu = CPU_INVALID;
     desc->arch.vector = IRQ_VECTOR_UNASSIGNED;
     desc->arch.old_vector = IRQ_VECTOR_UNASSIGNED;
     desc->arch.creator_domid = DOMID_INVALID;
@@ -554,7 +548,7 @@ static int _assign_irq_vector(struct irq_desc *desc, const cpumask_t *mask)
         }
     }
 
-    if ( desc->arch.move_in_progress || desc->arch.move_cleanup_count )
+    if ( desc->arch.move_in_progress || desc->arch.move_cleanup )
     {
         /*
          * If the current destination is online refuse to shuffle.  Retry after
@@ -570,9 +564,9 @@ static int _assign_irq_vector(struct irq_desc *desc, const cpumask_t *mask)
          * ->arch.old_cpu_mask.
          */
         ASSERT(valid_irq_vector(desc->arch.old_vector));
-        ASSERT(cpumask_intersects(desc->arch.old_cpu_mask, &cpu_online_map));
+        ASSERT(cpu_online(desc->arch.old_cpu));
 
-        if ( cpumask_intersects(desc->arch.old_cpu_mask, mask) )
+        if ( cpumask_test_cpu(desc->arch.old_cpu, mask) )
         {
             /*
              * Fallback to the old destination if moving is in progress and the
@@ -581,16 +575,16 @@ static int _assign_irq_vector(struct irq_desc *desc, const cpumask_t *mask)
              * in the 'mask' parameter.
              */
             desc->arch.vector = desc->arch.old_vector;
-            desc->arch.cpu = cpumask_any(desc->arch.old_cpu_mask);
+            desc->arch.cpu = desc->arch.old_cpu;
 
             /* Undo any possibly done cleanup. */
             per_cpu(vector_irq, desc->arch.cpu)[desc->arch.vector] = irq;
 
             /* Cancel the pending move and release the current vector. */
             desc->arch.old_vector = IRQ_VECTOR_UNASSIGNED;
-            cpumask_clear(desc->arch.old_cpu_mask);
+            desc->arch.old_cpu = CPU_INVALID;
             desc->arch.move_in_progress = 0;
-            desc->arch.move_cleanup_count = 0;
+            desc->arch.move_cleanup =  false;
             if ( desc->arch.used_vectors )
             {
                 ASSERT(test_bit(old_vector, desc->arch.used_vectors));
@@ -656,7 +650,7 @@ next:
         current_vector = vector;
         current_offset = offset;
 
-        if ( desc->arch.move_in_progress || desc->arch.move_cleanup_count )
+        if ( desc->arch.move_in_progress || desc->arch.move_cleanup )
         {
             ASSERT(!cpu_online(desc->arch.cpu));
             /*
@@ -673,12 +667,13 @@ next:
         }
         else if ( valid_irq_vector(old_vector) )
         {
-            cpumask_clear(desc->arch.old_cpu_mask);
-            if ( cpu_online(desc->arch.cpu) )
-                cpumask_set_cpu(desc->arch.cpu, desc->arch.old_cpu_mask);
+            desc->arch.old_cpu = CPU_INVALID;
             desc->arch.old_vector = desc->arch.vector;
-            if ( !cpumask_empty(desc->arch.old_cpu_mask) )
+            if ( cpu_online(desc->arch.cpu) )
+            {
+                desc->arch.old_cpu = desc->arch.cpu;
                 desc->arch.move_in_progress = 1;
+            }
             else
                 /* This can happen while offlining a CPU. */
                 release_old_vec(desc);
@@ -833,7 +828,7 @@ void cf_check irq_move_cleanup_interrupt(void)
         if (desc->handler->enable == enable_8259A_irq)
             goto unlock;
 
-        if (!desc->arch.move_cleanup_count)
+        if ( !desc->arch.move_cleanup )
             goto unlock;
 
         if ( vector == desc->arch.vector && me == desc->arch.cpu )
@@ -862,13 +857,10 @@ void cf_check irq_move_cleanup_interrupt(void)
         TRACE_TIME(TRC_HW_IRQ_MOVE_CLEANUP, irq, vector, me);
 
         per_cpu(vector_irq, me)[vector] = ~irq;
-        desc->arch.move_cleanup_count--;
+        desc->arch.move_cleanup = false;
 
-        if ( desc->arch.move_cleanup_count == 0 )
-        {
-            ASSERT(vector == desc->arch.old_vector);
-            release_old_vec(desc);
-        }
+        ASSERT(vector == desc->arch.old_vector);
+        release_old_vec(desc);
 unlock:
         spin_unlock(&desc->lock);
     }
@@ -876,12 +868,11 @@ unlock:
 
 static void send_cleanup_vector(struct irq_desc *desc)
 {
-    cpumask_and(desc->arch.old_cpu_mask, desc->arch.old_cpu_mask,
-                &cpu_online_map);
-    desc->arch.move_cleanup_count = cpumask_weight(desc->arch.old_cpu_mask);
-
-    if ( desc->arch.move_cleanup_count )
-        send_IPI_mask(desc->arch.old_cpu_mask, IRQ_MOVE_CLEANUP_VECTOR);
+    if ( cpu_online(desc->arch.old_cpu) )
+    {
+        desc->arch.move_cleanup = true;
+        send_IPI_mask(cpumask_of(desc->arch.old_cpu), IRQ_MOVE_CLEANUP_VECTOR);
+    }
     else
         release_old_vec(desc);
 
@@ -2003,7 +1994,7 @@ void do_IRQ(struct cpu_user_regs *regs)
                            ~irq, CPUMASK_PR(desc->affinity),
                            /* TODO: handle hipri vectors nicely. */
                            CPUMASK_PR(get_cpumask(desc->arch.cpu)),
-                           CPUMASK_PR(desc->arch.old_cpu_mask),
+                           CPUMASK_PR(get_cpumask(desc->arch.old_cpu)),
                            desc->arch.vector, desc->arch.old_vector,
                            desc->handler->typename, desc->status);
                     spin_unlock(&desc->lock);
@@ -2636,26 +2627,14 @@ void fixup_irqs(void)
             continue;
         }
 
-        if ( desc->arch.move_cleanup_count )
+        if ( desc->arch.move_cleanup && !cpu_online(desc->arch.old_cpu) )
         {
             /* The cleanup IPI may have got sent while we were still online. */
-            cpumask_andnot(affinity, desc->arch.old_cpu_mask,
-                           &cpu_online_map);
-            desc->arch.move_cleanup_count -= cpumask_weight(affinity);
-            if ( !desc->arch.move_cleanup_count )
-                release_old_vec(desc);
-            else
-                /*
-                 * Adjust old_cpu_mask to account for the offline CPUs,
-                 * otherwise further calls to fixup_irqs() could subtract those
-                 * again and possibly underflow the counter.
-                 */
-                cpumask_andnot(desc->arch.old_cpu_mask, desc->arch.old_cpu_mask,
-                               affinity);
+            desc->arch.move_cleanup = false;
+            release_old_vec(desc);
         }
 
-        if ( desc->arch.move_in_progress &&
-             cpumask_test_cpu(cpu, desc->arch.old_cpu_mask) )
+        if ( desc->arch.move_in_progress && cpu == desc->arch.old_cpu )
         {
             /*
              * This to be offlined CPU was the target of an interrupt that's
@@ -2685,12 +2664,9 @@ void fixup_irqs(void)
              * per-cpu vector table will no longer have ->arch.old_vector
              * setup, and hence ->arch.old_cpu_mask would be stale.
              */
-            cpumask_clear_cpu(cpu, desc->arch.old_cpu_mask);
-            if ( cpumask_empty(desc->arch.old_cpu_mask) )
-            {
-                desc->arch.move_in_progress = 0;
-                release_old_vec(desc);
-            }
+            desc->arch.old_cpu = CPU_INVALID;
+            desc->arch.move_in_progress = 0;
+            release_old_vec(desc);
         }
 
         /*
-- 
2.51.0



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH 12/12] x86/irq: convert irq_desc pending_mask field to integer
Date: Thu, 20 Nov 2025 10:58:26 +0100
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Much like the rest of the fields that relate to the current or old CPU
target, the pending_mask can be converted into an integer field.

No functional change intended.

Signed-off-by: Roger Pau Monné 
---
 xen/arch/x86/include/asm/irq.h |  2 +-
 xen/arch/x86/irq.c             | 14 +++++---------
 2 files changed, 6 insertions(+), 10 deletions(-)

diff --git a/xen/arch/x86/include/asm/irq.h b/xen/arch/x86/include/asm/irq.h
index bc59ce7c3ffb..55047772eb46 100644
--- a/xen/arch/x86/include/asm/irq.h
+++ b/xen/arch/x86/include/asm/irq.h
@@ -73,7 +73,7 @@ struct arch_irq_desc {
 #define CPU_INVALID  ~0U
         unsigned int cpu;                /* Target CPU of the interrupt. */
         unsigned int old_cpu;
-        cpumask_var_t pending_mask;
+        unsigned int pending_cpu;
         vmask_t *used_vectors;
         bool move_cleanup : 1;
         bool move_in_progress : 1;
diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index 680f190da065..8d7947116e33 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -387,11 +387,9 @@ int irq_to_vector(int irq)
 
 int arch_init_one_irq_desc(struct irq_desc *desc)
 {
-    if ( !alloc_cpumask_var(&desc->arch.pending_mask) )
-        return -ENOMEM;
-
     desc->arch.cpu = CPU_INVALID;
     desc->arch.old_cpu = CPU_INVALID;
+    desc->arch.pending_cpu = CPU_INVALID;
     desc->arch.vector = IRQ_VECTOR_UNASSIGNED;
     desc->arch.old_vector = IRQ_VECTOR_UNASSIGNED;
     desc->arch.creator_domid = DOMID_INVALID;
@@ -760,8 +758,6 @@ void setup_vector_irq(unsigned int cpu)
 
 void move_masked_irq(struct irq_desc *desc)
 {
-    cpumask_t *pending_mask = desc->arch.pending_mask;
-
     if (likely(!(desc->status & IRQ_MOVE_PENDING)))
         return;
     
@@ -779,10 +775,10 @@ void move_masked_irq(struct irq_desc *desc)
      *
      * For correct operation this depends on the caller masking the irqs.
      */
-    if ( likely(cpumask_intersects(pending_mask, &cpu_online_map)) )
-        desc->handler->set_affinity(desc, pending_mask);
+    if ( likely(cpu_online(desc->arch.pending_cpu)) )
+        desc->handler->set_affinity(desc, cpumask_of(desc->arch.pending_cpu));
 
-    cpumask_clear(pending_mask);
+    desc->arch.pending_cpu = CPU_INVALID;
 }
 
 void move_native_irq(struct irq_desc *desc)
@@ -926,7 +922,7 @@ void irq_set_affinity(struct irq_desc *desc, unsigned int cpu)
     ASSERT(spin_is_locked(&desc->lock));
     desc->status &= ~IRQ_MOVE_PENDING;
     smp_wmb();
-    cpumask_copy(desc->arch.pending_mask, cpumask_of(cpu));
+    desc->arch.pending_cpu = cpu;
     smp_wmb();
     desc->status |= IRQ_MOVE_PENDING;
 }
-- 
2.51.0



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Date: Thu, 20 Nov 2025 12:42:03 +0200
User-Agent: Mozilla Thunderbird
Subject: Re: [XEN][PATCH v8] x86: make Viridian support optional
To: Jan Beulich , Jason Andryuk 
Cc: Sergiy Kibrik ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Paul Durrant ,
 Alejandro Vallejo ,
 "xen-devel@lists.xenproject.org" 
References: <20251119193215.1012108-1-grygorii_strashko@epam.com>
 
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Hi Jan,

On 20.11.25 10:50, Jan Beulich wrote:
> (adding v8 tag to subject)
> 
> On 19.11.2025 20:32, Grygorii Strashko wrote:
>> From: Sergiy Kibrik 
>>
>> Add config option VIRIDIAN that covers viridian code within HVM.
>> Calls to viridian functions guarded by is_viridian_domain() and related macros.
>> Having this option may be beneficial by reducing code footprint for systems
>> that are not using Hyper-V.
>>
>> [grygorii_strashko@epam.com: fixed NULL pointer deref in
>> viridian_save_domain_ctxt(); stub viridian_vcpu/domain_init/deinit()]
>> Signed-off-by: Sergiy Kibrik 
>> Signed-off-by: Grygorii Strashko 
>> Reviewed-by: Jason Andryuk 
> 
> As before - this R-b likely would need dropping, ...
> 
>> ---
>> changes in v8:
>> - drop checks from viridian_load_vcpu/domain_ctxt()
>> - drop check "value != 0" in HVM_PARAM_VIRIDIAN handler, laways return
>>    -ENODEV for VIRIDIAN=n
> 
> ... when more than just cosmetic changes are made. Jason, please can you
> indicate whether it's fine to retain?

Sorry, I'll be more careful with tags.

> 
>> --- a/xen/arch/x86/hvm/Makefile
>> +++ b/xen/arch/x86/hvm/Makefile
>> @@ -1,6 +1,6 @@
>>   obj-$(CONFIG_AMD_SVM) += svm/
>>   obj-$(CONFIG_INTEL_VMX) += vmx/
>> -obj-y += viridian/
>> +obj-$(CONFIG_VIRIDIAN) += viridian/
> 
> When committing, I'll likely take the liberty to also move the altered line
> up, to restore proper alphabetical sorting here.
> 
>> --- a/xen/arch/x86/include/asm/hvm/viridian.h
>> +++ b/xen/arch/x86/include/asm/hvm/viridian.h
>> @@ -86,11 +86,26 @@ viridian_hypercall(struct cpu_user_regs *regs);
>>   void viridian_time_domain_freeze(const struct domain *d);
>>   void viridian_time_domain_thaw(const struct domain *d);
>>   
>> +#if defined(CONFIG_VIRIDIAN)
> 
> Similarly I'm likely going to take the liberty and change this to #ifdef,
> just like you have it elsewhere.

I'm ok with mentioned adjustments.

> 
> Preferably with the adjustments:
> Reviewed-by: Jan Beulich 

Thank you.

-- 
Best regards,
-grygorii



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Date: Thu, 20 Nov 2025 12:47:22 +0200
User-Agent: Mozilla Thunderbird
Subject: Re: [XEN][PATCH v4] xen: make VMTRACE support optional
To: Jan Beulich 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 Stefano Stabellini ,
 Tamas K Lengyel ,
 Alexandru Isaila ,
 Petre Pircalabu ,
 Teddy Astie , Penny Zheng ,
 "xen-devel@lists.xenproject.org" 
References: <20251119193120.1011448-1-grygorii_strashko@epam.com>
 
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Hi Jan,

On 20.11.25 10:56, Jan Beulich wrote:
> On 19.11.2025 20:31, Grygorii Strashko wrote:
>> From: Grygorii Strashko 
>>
>> The VMTRACE feature is depends on Platform/Arch HW and code support and now
>> can be used only on x86 HVM with Intel VT-x (INTEL_VMX) enabled.
>> This makes VMTRACE support optional by introducing HVM Kconfig option:
>> - CONFIG_VMTRACE to enable/disable the feature.
>>
>> Signed-off-by: Grygorii Strashko 
>> ---
>> changes in v4:
>> - format changes
> 
> Just partly, ...
> 
>> @@ -772,13 +775,24 @@ static inline int hvm_vmtrace_get_option(
>>   
>>       return -EOPNOTSUPP;
>>   }
>> +#else
>> +/*
>> + * Function declaration(s) here are used without definition(s) to make compiler
>> + * happy when VMTRACE=n, compiler DCE will eliminate unused code.
>> + */
>> +int hvm_vmtrace_output_position(struct vcpu *v, uint64_t *pos);
>> +#endif
>>   
>>   static inline int hvm_vmtrace_reset(struct vcpu *v)
>>   {
>> +#ifdef CONFIG_VMTRACE
>>       if ( hvm_funcs.vmtrace_reset )
>>           return alternative_call(hvm_funcs.vmtrace_reset, v);
>>   
>>       return -EOPNOTSUPP;
>> +#else
>> +    return -EOPNOTSUPP;
>> +#endif
>>   }
> 
> ... the #else wasn't dropped from here. If no need for a v5 arises, I guess
> I can make the adjustment while committing. But it would be really nice if
> all earlier comments were taken care of (one way or another) when submitting
> a new version.

This is absolutely my miss. Sorry.
I can resend with fix. Just tell me how will be better for you.

> 
> With the adjustment:
> Reviewed-by: Jan Beulich 

Thank you.

-- 
Best regards,
-grygorii



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Subject: Re: [PATCH 1/5] hw/core/loader: Make load_elf_hdr() return bool,
 simplify caller
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To: Markus Armbruster ,
 Vladimir Sementsov-Ogievskiy 
Cc: qemu-devel@nongnu.org, kwolf@redhat.com, hreitz@redhat.com,
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References: <20251119130855.105479-1-armbru@redhat.com>
 <20251119130855.105479-2-armbru@redhat.com>
 
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On 19/11/25 20:12, Markus Armbruster wrote:
> Vladimir Sementsov-Ogievskiy  writes:
> 
>> On 19.11.25 16:08, Markus Armbruster wrote:
>>> Signed-off-by: Markus Armbruster 
>>
>> Reviewed-by: Vladimir Sementsov-Ogievskiy 
>>
>>> ---
>>>    include/hw/loader.h |  4 +++-
>>>    hw/arm/boot.c       |  6 +-----
>>>    hw/core/loader.c    |  8 ++++++--
>>>    hw/riscv/spike.c    | 10 +---------
>>>    4 files changed, 11 insertions(+), 17 deletions(-)
>>> diff --git a/include/hw/loader.h b/include/hw/loader.h
>>> index d035e72748..6f91703503 100644
>>> --- a/include/hw/loader.h
>>> +++ b/include/hw/loader.h
>>> @@ -188,8 +188,10 @@ ssize_t load_elf(const char *filename,
>>>     *
>>>     * Inspect an ELF file's header. Read its full header contents into a
>>>     * buffer and/or determine if the ELF is 64bit.
>>> + *
>>> + * Returns true on success, false on failure.
>>
>> I don't really care, but IMO, it's obvious contract for bool+errp functions, not worth a comment.
> 
> Nearby function comments all have a "Returns" sentence.  I try to blend
> in :)

New developers might just have to look at a particular API such this
loader one, without knowing the global errp contract. With that in
mind, I'll documents @return everywhere.

> 
>>>     */
>>> -void load_elf_hdr(const char *filename, void *hdr, bool *is64, Error **errp);
>>> +bool load_elf_hdr(const char *filename, void *hdr, bool *is64, Error **errp);
>>>      ssize_t load_aout(const char *filename, hwaddr addr, int max_sz,
>>>                      bool big_endian, hwaddr target_page_size);
> 



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Date: Thu, 20 Nov 2025 11:01:36 +0000
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Subject: Re: [PATCH 1/4] x86/guest: move allocation of Xen upcall vector to
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To: Jan Beulich ,
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On 19/11/2025 10:50 am, Jan Beulich wrote:
> There's no need to do this every time init_evtchn() is called. Just do it
> once when setting up CPU0. Drop the assertion as well, as
> alloc_hipriority_vector() (called by alloc_direct_apic_vector()) uses more
> restrictive BUG_ON() anyway. Then evtchn_upcall_vector can also validly
> become ro-after-init, just that it needs to move out of init_evtchn().
>
> Signed-off-by: Jan Beulich 
>
> --- a/xen/arch/x86/guest/xen/xen.c
> +++ b/xen/arch/x86/guest/xen/xen.c
> @@ -233,16 +233,12 @@ static void cf_check xen_evtchn_upcall(v
>      ack_APIC_irq();
>  }
>  
> +static uint8_t __ro_after_init evtchn_upcall_vector;
> +
>  static int init_evtchn(void)
>  {
> -    static uint8_t evtchn_upcall_vector;
>      int rc;
>  
> -    if ( !evtchn_upcall_vector )
> -        alloc_direct_apic_vector(&evtchn_upcall_vector, xen_evtchn_upcall);
> -
> -    ASSERT(evtchn_upcall_vector);
> -
>      rc = xen_hypercall_set_evtchn_upcall_vector(this_cpu(vcpu_id),
>                                                  evtchn_upcall_vector);
>      if ( rc )
> @@ -293,6 +289,8 @@ static void __init cf_check setup(void)
>                 XEN_LEGACY_MAX_VCPUS);
>      }
>  
> +    alloc_direct_apic_vector(&evtchn_upcall_vector, xen_evtchn_upcall);
> +
>      BUG_ON(init_evtchn());
>  }
>  
>

This patch is fine, but it would be nicer to split init_evtchn() into
bsp_init_evtchn() and percpu_init_evtchn().

Just out of context in init_evtchn(), there's a check for CPU0 that also
ought to move into bsp_init_evtchn() (and therefore into __init), at
which point the percpu simplifies to a single hypercall, and we keep
subsystem specifics out of setup().

~Andrew


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Subject: Re: [PATCH 1/4] x86/guest: move allocation of Xen upcall vector to
 init code
From: Andrew Cooper 
To: Jan Beulich ,
 "xen-devel@lists.xenproject.org" 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
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On 20/11/2025 11:01 am, Andrew Cooper wrote:
> On 19/11/2025 10:50 am, Jan Beulich wrote:
>> There's no need to do this every time init_evtchn() is called. Just do it
>> once when setting up CPU0. Drop the assertion as well, as
>> alloc_hipriority_vector() (called by alloc_direct_apic_vector()) uses more
>> restrictive BUG_ON() anyway. Then evtchn_upcall_vector can also validly
>> become ro-after-init, just that it needs to move out of init_evtchn().
>>
>> Signed-off-by: Jan Beulich 
>>
>> --- a/xen/arch/x86/guest/xen/xen.c
>> +++ b/xen/arch/x86/guest/xen/xen.c
>> @@ -233,16 +233,12 @@ static void cf_check xen_evtchn_upcall(v
>>      ack_APIC_irq();
>>  }
>>  
>> +static uint8_t __ro_after_init evtchn_upcall_vector;
>> +
>>  static int init_evtchn(void)
>>  {
>> -    static uint8_t evtchn_upcall_vector;
>>      int rc;
>>  
>> -    if ( !evtchn_upcall_vector )
>> -        alloc_direct_apic_vector(&evtchn_upcall_vector, xen_evtchn_upcall);
>> -
>> -    ASSERT(evtchn_upcall_vector);
>> -
>>      rc = xen_hypercall_set_evtchn_upcall_vector(this_cpu(vcpu_id),
>>                                                  evtchn_upcall_vector);
>>      if ( rc )
>> @@ -293,6 +289,8 @@ static void __init cf_check setup(void)
>>                 XEN_LEGACY_MAX_VCPUS);
>>      }
>>  
>> +    alloc_direct_apic_vector(&evtchn_upcall_vector, xen_evtchn_upcall);
>> +
>>      BUG_ON(init_evtchn());
>>  }
>>  
>>
> This patch is fine, but it would be nicer to split init_evtchn() into
> bsp_init_evtchn() and percpu_init_evtchn().
>
> Just out of context in init_evtchn(), there's a check for CPU0 that also
> ought to move into bsp_init_evtchn() (and therefore into __init), at
> which point the percpu simplifies to a single hypercall, and we keep
> subsystem specifics out of setup().

No, scratch that.  HVM_PARAM_CALLBACK_IRQ is not in the list of HVM
Params that migration moves on migrate (see write_hvm_params() in
xg_sr_save_x86_hvm.c).

Everything is awful.

Could you include a comment such as /* HVM_PARAM_CALLBACK_IRQ is not
moved on migrate, so has to be set up again on resume. */ to make it
clear why that piece of logic needs to stay in a non-init function?

~Andrew


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This work has been presented at Xen Summit 2024 during the
  IOMMU paravirtualization and Xen IOMMU subsystem rework
design session.

Operating systems may want to have access to a IOMMU in order to do DMA
protection or implement certain features (e.g VFIO on Linux).

VFIO support is mandatory for framework such as SPDK, which can be useful t=
o
implement an alternative storage backend for virtual machines [1].

In this patch series, we introduce in Xen the ability to manage several
"IOMMU contexts" per domain and provide a new hypercall interface to allow
guests to manage IOMMU contexts.

The VT-d and AMD-Vi drivers are updated to support these new features.
Work still remain to do for ARM/PPC/RISC-V.

Assuming appropriate Dom0 drivers, aside the capability to use VFIO in Dom0=
,
it also changes the way Linux performs DMA with devices to rely on the "IOM=
MU"
(thus "PV-IOMMU") instead of assuming all of it is device-visible and event=
ually
relying on the swiotlb. (this behavior can be disabled with Linux's iommu=
=3Dpt).

In this case, address space of device is no longer tied to the p2m, causing=
 all
modifications of p2m (e.g grant, foreign) to no longer require a IOTLB flus=
h (usually
on unmap, when using Dom0 PVH or dom0-iommu=3Dstrict).
That makes virtualized I/O vastly better with PVH Dom0, at least on Intel p=
latform.

On a Intel i5-4670 platform

PVH Dom0 with current Xen behavior or with iommu=3Dpt:
iperf VM -> Dom0: ~600 Mbps

PVH Dom0 with Dom0 IOMMU driver and iommu=3Dnopt (usually default):
iperf VM -> Dom0: ~7 Gbps (~11x performance increase)

Dom0 driver branch (until a make a new patch):
https://gitlab.com/xen-project/people/tsnake41/linux/-/tree/xen-pviommu-6.1=
8

[1] Using SPDK with the Xen hypervisor - FOSDEM 2023
---
This is a RFC, things are still experimental at this state.

Cc: Marek Marczykowski-G=C3=B3recki 

Changed in v2 :
* fixed Xen crash when dumping IOMMU contexts (using X debug key)
with DomUs without IOMMU
* s/dettach/detach/
* removed some unused includes
* fix dangling devices in contexts with detach

Changed in v3 :
* lock entirely map/unmap in hypercall
* prevent IOMMU operations on dying contexts (fix race condition)
* iommu_check_context+iommu_get_context -> iommu_get_context and check for =
NULL

Changed in v4 :
* Part of initialization logic is moved to domain or toolstack (IOMMU_init)
  + domain/toolstack now decides on "context count" and "pagetable pool siz=
e"
  + for now, all domains are able to initialize PV-IOMMU
* introduce "dom0-iommu=3Dno-dma" to make default context block all DMA
  (disables HAP and sync-pt), enforcing usage of PV-IOMMU for DMA
  Can be used to expose properly "Pre-boot DMA protection"
* redesigned locking logic for contexts
  + contexts are accessed using iommu_get_context and released with iommu_p=
ut_context

Changed in v5 :
* various PCI Passthrough related fixes
  + rewrote parts of PCI Passthrough logic
  + various other related bug fixes
* simplified VT-d DID (for hardware) management by only having one map inst=
ead of two
  (pseudo_domid map was previously used for old quarantine code then recycl=
ed for PV-IOMMU
   in addition to another map also tracing Domain<->VT-d DID, now there is =
only one
   map tracking both making things simpler)
* reworked parts of Xen quarantine logic (needed for PCI Passthrough)
* added cf_check annotations
* some changes to PV-IOMMU headers (Alejandro)

Changed in v6 :
* reorganized the patch series to allow bissecting
   * it is splitted in various smaller patches
* initial AMD-Vi port (it doesn't completely work with PV-IOMMU though, but=
 builds at
  least)
   * AMD-Vi lacks support for iommu_lookup_page (needed for several PV-IOMM=
U ops)

Changed in v7 :
* Proper AMD-Vi support for PV-IOMMU, mostly works with some quirks (e.g 'A=
MD IOMMU' devices
  that are visible for Dom0, but doesn't exist from PV-IOMMU point of view)
* splitted some parts of patches to smaller ones
* fixed numerous issues
 * a notable one being a ASSERT in PV-IOMMU map operation due to problemati=
c foreign page
   reference counting
* fixed typo in design document
* introduce a transient "invalid context" ID for devices that aren't handle=
d yet
* add proper "no-dma" documentation

TODO:
* Proper cleanup of AMD-Vi mappings (for ctx_no !=3D 0)
* consider per-iommu domid limit (allocate did on first attach/reattach ?)
* ARM implementation
* properly define nested mode and PASID support
* define how PV-IOMMU should behave in DomUs (e.g they don't see machine bd=
f) 
 * especially regarding how to expose "no-dma" mode

* better quarantine code (e.g isolate devices with different reserved regio=
ns
  regions using separate 'contexts')
* there are corner cases with PV-IOMMU and to-domain Xen PCI Passthrough
  (e.g pci-assignable-remove will reassign to context 0, while the driver
   expects the device to to be in context X)

Teddy Astie (14):
  docs/designs: Add a design document for IOMMU subsystem redesign
  docs/designs: Add a design document for PV-IOMMU
  x86/domain: Defer domain iommu initialization.
  iommu: Move IOMMU domain related structures to (arch_)iommu_context
  iommu: Simplify quarantine logic
  vtd: Remove MAP_ERROR_RECOVERY code path in domain_context_mapping_one
  iommu: Simplify hardware did management
  iommu: Introduce redesigned IOMMU subsystem
  iommu: Provide 'X' debug key to dump IOMMU context infos
  amd/iommu: Introduce lookup implementation
  iommu: Introduce iommu_get_max_iova
  x86/iommu: Introduce IOMMU arena
  iommu: Introduce PV-IOMMU
  iommu: Introduce no-dma feature

 docs/designs/iommu-contexts.md              |  403 +++++
 docs/designs/pv-iommu.md                    |  118 ++
 docs/misc/xen-command-line.pandoc           |   16 +-
 xen/arch/arm/include/asm/iommu.h            |    4 +
 xen/arch/ppc/include/asm/iommu.h            |    3 +
 xen/arch/x86/domain.c                       |   10 +-
 xen/arch/x86/include/asm/arena.h            |   54 +
 xen/arch/x86/include/asm/iommu.h            |   59 +-
 xen/arch/x86/include/asm/pci.h              |   17 -
 xen/arch/x86/mm/p2m-ept.c                   |    2 +-
 xen/arch/x86/pv/dom0_build.c                |    6 +-
 xen/arch/x86/tboot.c                        |    3 +-
 xen/arch/x86/x86_64/mm.c                    |    3 +-
 xen/common/Makefile                         |    1 +
 xen/common/memory.c                         |    4 +-
 xen/common/pv-iommu.c                       |  554 +++++++
 xen/drivers/passthrough/amd/iommu.h         |   23 +-
 xen/drivers/passthrough/amd/iommu_cmd.c     |   20 +-
 xen/drivers/passthrough/amd/iommu_init.c    |   57 +-
 xen/drivers/passthrough/amd/iommu_map.c     |  307 ++--
 xen/drivers/passthrough/amd/pci_amd_iommu.c |  411 +++--
 xen/drivers/passthrough/iommu.c             |  751 ++++++++-
 xen/drivers/passthrough/pci.c               |  394 ++---
 xen/drivers/passthrough/vtd/extern.h        |   19 +-
 xen/drivers/passthrough/vtd/iommu.c         | 1623 ++++++-------------
 xen/drivers/passthrough/vtd/iommu.h         |    2 -
 xen/drivers/passthrough/vtd/qinval.c        |    2 +-
 xen/drivers/passthrough/vtd/quirks.c        |   21 +-
 xen/drivers/passthrough/vtd/vtd.h           |    3 +-
 xen/drivers/passthrough/x86/Makefile        |    1 +
 xen/drivers/passthrough/x86/arena.c         |  157 ++
 xen/drivers/passthrough/x86/iommu.c         |  294 +++-
 xen/include/hypercall-defs.c                |    6 +
 xen/include/public/pv-iommu.h               |  343 ++++
 xen/include/public/xen.h                    |    1 +
 xen/include/xen/iommu.h                     |  122 +-
 xen/include/xen/pci.h                       |    3 +
 37 files changed, 3777 insertions(+), 2040 deletions(-)
 create mode 100644 docs/designs/iommu-contexts.md
 create mode 100644 docs/designs/pv-iommu.md
 create mode 100644 xen/arch/x86/include/asm/arena.h
 create mode 100644 xen/common/pv-iommu.c
 create mode 100644 xen/drivers/passthrough/x86/arena.c
 create mode 100644 xen/include/public/pv-iommu.h

-- 
2.51.2



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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Current IOMMU subsystem has some limitations that make PV-IOMMU practically impossible.
One of them is the assumtion that each domain is bound to a single "IOMMU domain", which
also causes complications with quarantine implementation.

Moreover, current IOMMU subsystem is not entirely well-defined, for instance, the behavior
of map_page between ARM SMMUv3 and x86 VT-d/AMD-Vi greatly differs. On ARM, it can modifies
the domain page table while on x86, it may be forbidden (e.g using HAP with PVH), or only
modifying the devices PoV (e.g using PV).

The goal of this redesign is to define more explicitely the behavior and interface of the
IOMMU subsystem while allowing PV-IOMMU to be effectively implemented.

Signed-off-by Teddy Astie 
---
 docs/designs/iommu-contexts.md | 403 +++++++++++++++++++++++++++++++++
 1 file changed, 403 insertions(+)
 create mode 100644 docs/designs/iommu-contexts.md

diff --git a/docs/designs/iommu-contexts.md b/docs/designs/iommu-contexts.md
new file mode 100644
index 0000000000..d61c5fcde2
--- /dev/null
+++ b/docs/designs/iommu-contexts.md
@@ -0,0 +1,403 @@
+# IOMMU context management in Xen
+
+Status: Experimental
+Revision: 0
+
+# Background
+
+The design for *IOMMU paravirtualization for Dom0* [1] explains that some guests may
+want to access to IOMMU features. In order to implement this in Xen, several adjustments
+needs to be made to the IOMMU subsystem.
+
+This "hardware IOMMU domain" is currently implemented on a per-domain basis such as each
+domain actually has a specific *hardware IOMMU domain*, this design aims to allow a
+single Xen domain to manage several "IOMMU context", and allow some domains (e.g Dom0
+[1]) to modify their IOMMU contexts.
+
+In addition to this, quarantine feature can be refactored into using IOMMU contexts
+to reduce the complexity of platform-specific implementations and ensuring more
+consistency across platforms.
+
+# IOMMU context
+
+We define a "IOMMU context" as being a *hardware IOMMU domain*, but named as a context
+to avoid confusion with Xen domains.
+It represents some hardware-specific data structure that contains mappings from a device
+frame-number to a machine frame-number (e.g using a pagetable) that can be applied to
+a device using IOMMU hardware.
+
+This structure is bound to a Xen domain, but a Xen domain may have several IOMMU context.
+These contexts may be modifiable using the interface as defined in [1] aside some
+specific cases (e.g modifying default context).
+
+This is implemented in Xen as a new structure that will hold context-specific
+data.
+
+```c
+struct iommu_context {
+    u16 id; /* Context id (0 means default context) */
+    struct list_head devices;
+
+    struct arch_iommu_context arch;
+
+    bool opaque; /* context can't be modified nor accessed (e.g HAP) */
+};
+```
+
+A context is identified by a number that is domain-specific and may be used by IOMMU
+users such as PV-IOMMU by the guest.
+
+struct arch_iommu_context is splited from struct arch_iommu
+
+```c
+struct arch_iommu_context
+{
+    spinlock_t pgtables_lock;
+    struct page_list_head pgtables;
+
+    union {
+        /* Intel VT-d */
+        struct {
+            uint64_t pgd_maddr; /* io page directory machine address */
+            domid_t *didmap; /* per-iommu DID */
+            unsigned long *iommu_bitmap; /* bitmap of iommu(s) that the context uses */
+        } vtd;
+        /* AMD IOMMU */
+        struct {
+            struct page_info *root_table;
+        } amd;
+    };
+};
+
+struct arch_iommu
+{
+    spinlock_t mapping_lock; /* io page table lock */
+    struct {
+        struct page_list_head list;
+        spinlock_t lock;
+    } pgtables;
+
+    struct list_head identity_maps;
+
+    union {
+        /* Intel VT-d */
+        struct {
+            /* no more context-specific values */
+            unsigned int agaw; /* adjusted guest address width, 0 is level 2 30-bit */
+        } vtd;
+        /* AMD IOMMU */
+        struct {
+            unsigned int paging_mode;
+            struct guest_iommu *g_iommu;
+        } amd;
+    };
+};
+```
+
+IOMMU context information is now carried by iommu_context rather than being integrated to
+struct arch_iommu.
+
+# Xen domain IOMMU structure
+
+`struct domain_iommu` is modified to allow multiples context within a single Xen domain
+to exist :
+
+```c
+struct iommu_context_list {
+    uint16_t count; /* Context count excluding default context */
+
+    /* if count > 0 */
+
+    uint64_t *bitmap; /* bitmap of context allocation */
+    struct iommu_context *map; /* Map of contexts */
+};
+
+struct domain_iommu {
+    /* ... */
+
+    struct iommu_context default_ctx;
+    struct iommu_context_list other_contexts;
+
+    /* ... */
+}
+```
+
+default_ctx is a special context with id=0 that holds the page table mapping the entire
+domain, which basically preserve the previous behavior. All devices are expected to be
+bound to this context during initialization.
+
+Along with this default context that always exist, we use a pool of contexts that has a
+fixed size at domain initialization, where contexts can be allocated (if possible), and
+have a id matching their position in the map (considering that id != 0).
+These contexts may be used by IOMMU contexts users such as PV-IOMMU or quarantine domain
+(DomIO).
+
+# Platform independent context management interface
+
+A new platform independant interface is introduced in Xen hypervisor to allow
+IOMMU contexts users to create and manage contexts within domains.
+
+```c
+/* Direct context access functions (not supposed to be used directly) */
+struct iommu_context *iommu_get_context(struct domain *d, u16 ctx_id);
+void iommu_put_context(struct iommu_context *ctx);
+
+/* Flag for default context initialization */
+#define IOMMU_CONTEXT_INIT_default (1 << 0)
+
+/* Flag for quarantine contexts (scratch page, DMA Abort mode, ...) */
+#define IOMMU_CONTEXT_INIT_quarantine (1 << 1)
+
+int iommu_context_init(struct domain *d, struct iommu_context *ctx, u16 ctx_id, u32 flags);
+
+/* Flag to specify that devices will need to be reattached to default domain */
+#define IOMMU_TEARDOWN_REATTACH_DEFAULT (1 << 0)
+
+/*
+ * Flag to specify that the context needs to be destroyed preemptively
+ * (multiple calls to iommu_context_teardown will be required)
+ */
+#define IOMMU_TEARDOWN_PREEMPT (1 << 1)
+
+int iommu_context_teardown(struct domain *d, struct iommu_context *ctx, u32 flags);
+
+/* Allocate a new context, uses CONTEXT_INIT flags */
+int iommu_context_alloc(struct domain *d, u16 *ctx_id, u32 flags);
+
+/* Free a context, uses CONTEXT_TEARDOWN flags */
+int iommu_context_free(struct domain *d, u16 ctx_id, u32 flags);
+
+/* Move a device from one context to another, including between different domains. */
+int iommu_reattach_context(struct domain *prev_dom, struct domain *next_dom,
+                           device_t *dev, u16 ctx_id);
+
+/* Add a device to a context for first initialization */
+int iommu_attach_context(struct domain *d, device_t *dev, u16 ctx_id);
+
+/* Remove a device from a context, effectively removing it from the IOMMU. */
+int iommu_detach_context(struct domain *d, device_t *dev);
+```
+
+This interface will use a new interface with drivers to implement these features.
+
+Some existing functions will have a new parameter to specify on what context to do the operation.
+- iommu_map (iommu_legacy_map untouched)
+- iommu_unmap (iommu_legacy_unmap untouched)
+- iommu_lookup_page
+- iommu_iotlb_flush
+
+These functions will modify the iommu_context structure to accomodate with the
+operations applied, these functions will be used to replace some operations previously
+made in the IOMMU driver.
+
+# IOMMU platform_ops interface changes
+
+The IOMMU driver needs to expose a way to create and manage IOMMU contexts, the approach
+taken here is to modify the interface to allow specifying a IOMMU context on operations,
+and at the same time, simplifying the interface by relying more on iommu
+platform-independent code.
+
+Added functions in iommu_ops
+
+```c
+/* Initialize a context (creating page tables, allocating hardware, structures, ...) */
+int (*context_init)(struct domain *d, struct iommu_context *ctx,
+                    u32 flags);
+/* Destroy a context, assumes no device is bound to the context. */
+int (*context_teardown)(struct domain *d, struct iommu_context *ctx,
+                        u32 flags);
+/* Put a device in a context (assumes the device is not attached to another context) */
+int (*attach)(struct domain *d, device_t *dev,
+              struct iommu_context *ctx);
+/* Remove a device from a context, and from the IOMMU. */
+int (*detach)(struct domain *d, device_t *dev,
+              struct iommu_context *prev_ctx);
+/* Move the device from a context to another, including if the new context is in
+   another domain. d corresponds to the target domain. */
+int (*reattach)(struct domain *d, device_t *dev,
+                struct iommu_context *prev_ctx,
+                struct iommu_context *ctx);
+
+#ifdef CONFIG_HAS_PCI
+/* Specific interface for phantom function devices. */
+int (*add_devfn)(struct domain *d, struct pci_dev *pdev, u16 devfn,
+                 struct iommu_context *ctx);
+int (*remove_devfn)(struct domain *d, struct pci_dev *pdev, u16 devfn,
+                    struct iommu_context *ctx);
+#endif
+
+/* Changes in existing to use a specified iommu_context. */
+int __must_check (*map_page)(struct domain *d, dfn_t dfn, mfn_t mfn,
+                             unsigned int flags,
+                             unsigned int *flush_flags,
+                             struct iommu_context *ctx);
+int __must_check (*unmap_page)(struct domain *d, dfn_t dfn,
+                               unsigned int order,
+                               unsigned int *flush_flags,
+                               struct iommu_context *ctx);
+int __must_check (*lookup_page)(struct domain *d, dfn_t dfn, mfn_t *mfn,
+                                unsigned int *flags,
+                                struct iommu_context *ctx);
+
+int __must_check (*iotlb_flush)(struct domain *d,
+                                struct iommu_context *ctx, dfn_t dfn,
+                                unsigned long page_count,
+                                unsigned int flush_flags);
+
+void (*clear_root_pgtable)(struct domain *d, struct iommu_context *ctx);
+```
+
+These functions are redundant with existing functions, therefore, the following functions
+are replaced with new equivalents :
+- quarantine_init : platform-independent code and IOMMU_CONTEXT_INIT_quarantine flag
+- add_device : attach and add_devfn (phantom)
+- assign_device : attach and add_devfn (phantom)
+- remove_device : detach and remove_devfn (phantom)
+- reassign_device : reattach
+
+Some functionnal differences with previous functions, the following should be handled
+by platform-independent/arch-specific code instead of IOMMU driver :
+- identity mappings (unity mappings and rmrr)
+- device list in context and domain
+- domain of a device
+- quarantine
+
+The idea behind this is to implement IOMMU context features while simplifying IOMMU
+drivers implementations and ensuring more consistency between IOMMU drivers.
+
+## Phantom function handling
+
+PCI devices may use additionnal devfn to do DMA operations, in order to support such
+devices, an interface is added to map specific device functions without implying that
+the device is mapped to a new context (that may cause duplicates in Xen data structures).
+
+Functions add_devfn and remove_devfn allows to map a iommu context on specific devfn
+for a pci device, without altering platform-independent data structures.
+
+It is important for the reattach operation to care about these devices, in order
+to prevent devices from being partially reattached to the new context (see XSA-449 [2])
+by using a all-or-nothing approach for reattaching such devices.
+
+# Quarantine refactoring using IOMMU contexts
+
+The quarantine mecanism can be entirely reimplemented using IOMMU context, making
+it simpler, more consistent between platforms,
+
+Quarantine is currently only supported with x86 platforms and works by creating a
+single *hardware IOMMU domain* per quarantined device. All the quarantine logic is
+the implemented in a platform-specific fashion while actually implementing the same
+concepts :
+
+The *hardware IOMMU context* data structures for quarantine are currently stored in
+the device structure itself (using arch_pci_dev) and IOMMU driver needs to care about
+whether we are dealing with quarantine operations or regular operations (often dealt
+using macros such as QUARANTINE_SKIP or DEVICE_PGTABLE).
+
+The page table that will apply on the quarantined device is created reserved device
+regions, and adding mappings to a scratch page if enabled (quarantine=scratch-page).
+
+A new approach we can use is allowing the quarantine domain (DomIO) to manage IOMMU
+contexts, and implement all the quarantine logic using IOMMU contexts.
+
+That way, the quarantine implementation can be platform-independent, thus have a more
+consistent implementation between platforms. It will also allows quarantine to work
+with other IOMMU implementations without having to implement platform-specific behavior.
+Moreover, quarantine operations can be implemented using regular context operations
+instead of relying on driver-specific code.
+
+Quarantine implementation can be summarised as
+
+```c
+int iommu_quarantine_dev_init(device_t *dev)
+{
+    int ret;
+    u16 ctx_id;
+
+    if ( !iommu_quarantine )
+        return -EINVAL;
+
+    ret = iommu_context_alloc(dom_io, &ctx_id, IOMMU_CONTEXT_INIT_quarantine);
+
+    if ( ret )
+        return ret;
+
+    /** TODO: Setup scratch page, mappings... */
+
+    ret = iommu_reattach_context(dev->domain, dom_io, dev, ctx_id);
+
+    if ( ret )
+    {
+        ASSERT(!iommu_context_free(dom_io, ctx_id, 0));
+        return ret;
+    }
+
+    return ret;
+}
+```
+
+# Platform-specific considerations
+
+## Reference counters on target pages
+
+When mapping a guest page onto a IOMMU context, we need to make sure that
+this page is not reused for something else while being actually referenced
+by a IOMMU context. One way of doing it is incrementing the reference counter
+of each target page we map (excluding reserved regions), and decrementing it
+when the mapping isn't used anymore.
+
+One consideration to have is when destroying the context while having existing
+mappings in it. We can walk through the entire page table and decrement the
+reference counter of all mappings. All of that assumes that there is no reserved
+region mapped (which should be the case as a requirement of teardown, or as a
+consequence of REATTACH_DEFAULT flag).
+
+Another consideration is that the "cleanup mappings" operation may take a lot
+of time depending on the complexity of the page table. Making the teardown operation preemptable can allow the hypercall to be preempted if needed also preventing a malicious
+guest from stalling a CPU in a teardown operation with a specially crafted IOMMU
+context (e.g with several 1G superpages).
+
+## Limit the amount of pages IOMMU contexts can use
+
+In order to prevent a (eventually malicious) guest from causing too much allocations
+in Xen, we can enforce limits on the memory the IOMMU subsystem can use for IOMMU context.
+A possible implementation can be to preallocate a reasonably large chunk of memory
+and split it into pages for use by the IOMMU subsystem only for non-default IOMMU
+contexts (e.g PV-IOMMU interface), if this limitation is overcome, some operations
+may fail from the guest side. These limitations shouldn't impact "usual" operations
+of the IOMMU subsystem (e.g default context initialization).
+
+## x86 Architecture
+
+TODO
+
+### Intel VT-d
+
+VT-d uses DID to tag the *IOMMU domain* applied to a device and assumes that all entries
+with the same DID uses the same page table (i.e same IOMMU context).
+Under certain circonstances (e.g DRHD with DID limit below 16-bits), the *DID* is
+transparently converted into a DRHD-specific DID using a map managed internally.
+
+The current implementation of the code reuses the Xen domain_id as DID.
+However, by using multiples IOMMU contexts per domain, we can't use the domain_id for
+contexts (otherwise, different page tables will be mapped with the same DID).
+The following strategy is used :
+- on the default context, reuse the domain_id (the default context is unique per domain)
+- on non-default context, use a id allocated in the pseudo_domid map, (actually used by
+quarantine) which is a DID outside of Xen domain_id range
+
+### AMD-Vi
+
+TODO
+
+## Device-tree platforms
+
+### SMMU and SMMUv3
+
+TODO
+
+* * *
+
+[1] See pv-iommu.md
+
+[2] pci: phantom functions assigned to incorrect contexts
+https://xenbits.xen.org/xsa/advisory-449.html
\ No newline at end of file
-- 
2.51.2



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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From: "Teddy Astie" 
Subject: =?utf-8?Q?[RFC=20PATCH=20v7=2002/14]=20docs/designs:=20Add=20a=20design=20document=20for=20PV-IOMMU?=
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Some operating systems want to use IOMMU to implement various features (e.g
VFIO) or DMA protection.
This patch introduce a proposal for IOMMU paravirtualization for Dom0.

Signed-off-by Teddy Astie 
---
 docs/designs/pv-iommu.md | 118 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 118 insertions(+)
 create mode 100644 docs/designs/pv-iommu.md

diff --git a/docs/designs/pv-iommu.md b/docs/designs/pv-iommu.md
new file mode 100644
index 0000000000..d2f708b3e8
--- /dev/null
+++ b/docs/designs/pv-iommu.md
@@ -0,0 +1,118 @@
+# IOMMU paravirtualization for Dom0
+
+Status: Experimental
+
+# Background
+
+By default, Xen only uses the IOMMU for itself, either to make device address
+space coherent with guest address space (x86 HVM/PVH) or to prevent devices
+from doing DMA outside it's expected memory regions including the hypervisor
+(x86 PV).
+
+A limitation is that guests (especially privileged ones) may want to use
+IOMMU hardware in order to implement features such as DMA protection and
+VFIO [1] as IOMMU functionality is not available outside of the hypervisor
+currently.
+
+[1] VFIO - "Virtual Function I/O" - https://www.kernel.org/doc/html/latest/driver-api/vfio.html
+
+# Design
+
+The operating system may want to have access to various IOMMU features such as
+context management and DMA remapping. We can create a new hypercall that allows
+the guest to have access to a new paravirtualized IOMMU interface.
+
+This feature is only meant to be available for the Dom0, as DomU have some
+emulated devices that can't be managed on Xen side and are not hardware, we
+can't rely on the hardware IOMMU to enforce DMA remapping.
+
+This interface is exposed under the `iommu_op` hypercall.
+
+In addition, Xen domains are modified in order to allow existence of several
+IOMMU context including a default one that implement default behavior (e.g
+hardware assisted paging) and can't be modified by guest. DomU cannot have
+contexts, and therefore act as if they only have the default domain.
+
+Each IOMMU context within a Xen domain is identified using a domain-specific
+context number that is used in the Xen IOMMU subsystem and the hypercall
+interface.
+
+The number of IOMMU context a domain is specified by either the toolstack or
+the domain itself.
+
+# IOMMU operations
+
+## Initialize PV-IOMMU
+
+Initialize PV-IOMMU for the domain.
+It can only be called once.
+
+## Alloc context
+
+Create a new IOMMU context for the guest and return the context number to the
+guest.
+Fail if the IOMMU context limit of the guest is reached.
+
+A flag can be specified to create a identity mapping.
+
+## Free context
+
+Destroy a IOMMU context created previously.
+It is not possible to free the default context.
+
+Reattach context devices to default context if specified by the guest.
+
+Fail if there is a device in the context and reattach-to-default flag is not
+specified.
+
+## Reattach device
+
+Reattach a device to another IOMMU context (including the default one).
+The target IOMMU context number must be valid and the context allocated.
+
+The guest needs to specify a PCI SBDF of a device he has access to.
+
+## Map/unmap page
+
+Map/unmap a page on a context.
+The guest needs to specify a gfn and target dfn to map.
+
+Refuse to create the mapping if one already exist for the same dfn.
+
+## Lookup page
+
+Get the gfn mapped by a specific dfn.
+
+## Remote command
+
+Make a PV-IOMMU operation on behalf of another domain.
+Especially useful for implementing IOMMU emulation (e.g using QEMU)
+or initializing PV-IOMMU with enforced limits.
+
+# Implementation considerations
+
+## Hypercall batching
+
+In order to prevent unneeded hypercalls and IOMMU flushing, it is advisable to
+be able to batch some critical IOMMU operations (e.g map/unmap multiple pages).
+These batched operations should be preemptable/abortable to prevent a large
+map/unmap to block execution forever.
+
+## Hardware without IOMMU support
+
+Operating system needs to be aware on PV-IOMMU capability, and whether it is
+able to make contexts. However, some operating system may critically fail in
+case they are able to make a new IOMMU context. Which is supposed to happen
+if no IOMMU hardware is available.
+
+The hypercall interface needs a interface to advertise the ability to create
+and manage IOMMU contexts including the amount of context the guest is able
+to use. Using these informations, the Dom0 may decide whether to use or not
+the PV-IOMMU interface.
+
+## Page pool for contexts
+
+In order to prevent unexpected starving on the hypervisor memory with a
+buggy Dom0. We can preallocate the pages the contexts will use and make
+map/unmap use these pages instead of allocating them dynamically.
+
-- 
2.51.2



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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For the IOMMU redesign, the iommu context pagetable is defined once during
initialization. When reusing P2M pagetable, we want to ensure that this
pagetable is properly initialized.

Signed-off-by Teddy Astie 
---
 xen/arch/x86/domain.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index 66b7412b87..393b0fe27c 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -927,9 +927,6 @@ int arch_domain_create(struct domain *d,
     if ( (rc = init_domain_irq_mapping(d)) != 0 )
         goto fail;
 
-    if ( (rc = iommu_domain_init(d, config->iommu_opts)) != 0 )
-        goto fail;
-
     psr_domain_init(d);
 
     if ( is_hvm_domain(d) )
@@ -948,6 +945,9 @@ int arch_domain_create(struct domain *d,
     else
         ASSERT_UNREACHABLE(); /* Not HVM and not PV? */
 
+    if ( (rc = iommu_domain_init(d, config->iommu_opts)) != 0 )
+        goto fail;
+
     if ( (rc = tsc_set_info(d, XEN_CPUID_TSC_MODE_DEFAULT, 0, 0, 0)) != 0 )
     {
         ASSERT_UNREACHABLE();
-- 
2.51.2



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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From: "Teddy Astie" 
Subject: =?utf-8?Q?[RFC=20PATCH=20v7=2004/14]=20iommu:=20Move=20IOMMU=20domain=20related=20structures=20to=20(arch=5F)iommu=5Fcontext?=
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To: xen-devel@lists.xenproject.org
Cc: "Teddy Astie" , "Stefano Stabellini" , "Julien Grall" , "Bertrand Marquis" , "Michal Orzel" , "Volodymyr Babchuk" , "Timothy Pearson" , "Jan Beulich" , "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Lukasz Hawrylko" , "Daniel P. Smith" , "=?utf-8?Q?Mateusz=20M=C3=B3wka?=" , "Jason Andryuk" 
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Preparatory work for IOMMU redesign.

Introduce a new structure (arch_)iommu_context that will hold all
per-IOMMU context related informations for the IOMMU drivers.

Signed-off-by Teddy Astie 
---
 xen/arch/arm/include/asm/iommu.h            |   4 +
 xen/arch/ppc/include/asm/iommu.h            |   3 +
 xen/arch/x86/domain.c                       |   4 +-
 xen/arch/x86/include/asm/iommu.h            |  50 +++--
 xen/arch/x86/tboot.c                        |   3 +-
 xen/drivers/passthrough/amd/iommu.h         |   5 +-
 xen/drivers/passthrough/amd/iommu_init.c    |   6 +-
 xen/drivers/passthrough/amd/iommu_map.c     | 102 +++++-----
 xen/drivers/passthrough/amd/pci_amd_iommu.c |  81 ++++----
 xen/drivers/passthrough/iommu.c             |   6 +
 xen/drivers/passthrough/vtd/extern.h        |   4 +-
 xen/drivers/passthrough/vtd/iommu.c         | 206 +++++++++++---------
 xen/drivers/passthrough/vtd/quirks.c        |   3 +-
 xen/drivers/passthrough/x86/iommu.c         |  62 +++---
 xen/include/xen/iommu.h                     |  10 +
 15 files changed, 318 insertions(+), 231 deletions(-)

diff --git a/xen/arch/arm/include/asm/iommu.h b/xen/arch/arm/include/asm/iommu.h
index ad15477e24..41fc676db6 100644
--- a/xen/arch/arm/include/asm/iommu.h
+++ b/xen/arch/arm/include/asm/iommu.h
@@ -20,6 +20,10 @@ struct arch_iommu
     void *priv;
 };
 
+struct arch_iommu_context
+{
+};
+
 const struct iommu_ops *iommu_get_ops(void);
 void iommu_set_ops(const struct iommu_ops *ops);
 
diff --git a/xen/arch/ppc/include/asm/iommu.h b/xen/arch/ppc/include/asm/iommu.h
index 024ead3473..8367505de2 100644
--- a/xen/arch/ppc/include/asm/iommu.h
+++ b/xen/arch/ppc/include/asm/iommu.h
@@ -5,4 +5,7 @@
 struct arch_iommu {
 };
 
+struct arch_iommu_context {
+};
+
 #endif /* __ASM_PPC_IOMMU_H__ */
diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index 393b0fe27c..35abbfcc82 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -665,7 +665,7 @@ int arch_sanitise_domain_config(struct xen_domctl_createdomain *config)
     if ( nested_virt && !hvm_nested_virt_supported() )
     {
         dprintk(XENLOG_INFO, "Nested virt requested but not available\n");
-        return -EINVAL;        
+        return -EINVAL;
     }
 
     if ( nested_virt && !hap )
@@ -2498,7 +2498,7 @@ int domain_relinquish_resources(struct domain *d)
 
     PROGRESS(iommu_pagetables):
 
-        ret = iommu_free_pgtables(d);
+        ret = iommu_free_pgtables(d, iommu_default_context(d));
         if ( ret )
             return ret;
 
diff --git a/xen/arch/x86/include/asm/iommu.h b/xen/arch/x86/include/asm/iommu.h
index 8dc464fbd3..94513ba9dc 100644
--- a/xen/arch/x86/include/asm/iommu.h
+++ b/xen/arch/x86/include/asm/iommu.h
@@ -31,22 +31,21 @@ typedef uint64_t daddr_t;
 #define dfn_to_daddr(dfn) __dfn_to_daddr(dfn_x(dfn))
 #define daddr_to_dfn(daddr) _dfn(__daddr_to_dfn(daddr))
 
-struct arch_iommu
-{
-    spinlock_t mapping_lock; /* io page table lock */
-    struct {
-        struct page_list_head list;
-        spinlock_t lock;
-    } pgtables;
+struct iommu_context;
 
+struct arch_iommu_context
+{
+    struct page_list_head pgtables;
     struct list_head identity_maps;
 
+
+    spinlock_t mapping_lock; /* io page table lock */
+
     union {
         /* Intel VT-d */
         struct {
             uint64_t pgd_maddr; /* io page directory machine address */
-            unsigned int agaw; /* adjusted guest address width, 0 is level 2 30-bit */
-            unsigned long *iommu_bitmap; /* bitmap of iommu(s) that the domain uses */
+            unsigned long *iommu_bitmap; /* bitmap of iommu(s) that the context uses */
         } vtd;
         /* AMD IOMMU */
         struct {
@@ -56,6 +55,24 @@ struct arch_iommu
     };
 };
 
+struct arch_iommu
+{
+    /* Queue for freeing pages */
+    struct page_list_head free_queue;
+
+    union {
+        /* Intel VT-d */
+        struct {
+            unsigned int agaw; /* adjusted guest address width, 0 is level 2 30-bit */
+        } vtd;
+        /* AMD IOMMU */
+        struct {
+            unsigned int paging_mode;
+            struct guest_iommu *g_iommu;
+        };
+    };
+};
+
 extern struct iommu_ops iommu_ops;
 
 # include 
@@ -109,10 +126,10 @@ static inline void iommu_disable_x2apic(void)
         iommu_vcall(&iommu_ops, disable_x2apic);
 }
 
-int iommu_identity_mapping(struct domain *d, p2m_access_t p2ma,
-                           paddr_t base, paddr_t end,
+int iommu_identity_mapping(struct domain *d, struct iommu_context *ctx,
+                           p2m_access_t p2ma, paddr_t base, paddr_t end,
                            unsigned int flag);
-void iommu_identity_map_teardown(struct domain *d);
+void iommu_identity_map_teardown(struct domain *d, struct iommu_context *ctx);
 
 extern bool untrusted_msi;
 
@@ -128,14 +145,19 @@ unsigned long *iommu_init_domid(domid_t reserve);
 domid_t iommu_alloc_domid(unsigned long *map);
 void iommu_free_domid(domid_t domid, unsigned long *map);
 
-int __must_check iommu_free_pgtables(struct domain *d);
+int __must_check iommu_free_pgtables(struct domain *d, struct iommu_context *ctx);
 struct domain_iommu;
 struct page_info *__must_check iommu_alloc_pgtable(struct domain_iommu *hd,
+                                                   struct iommu_context *ctx,
                                                    uint64_t contig_mask);
-void iommu_queue_free_pgtable(struct domain_iommu *hd, struct page_info *pg);
+void iommu_queue_free_pgtable(struct domain *d, struct iommu_context *ctx,
+                              struct page_info *pg);
 
 /* Check [start, end] unity map range for correctness. */
 bool iommu_unity_region_ok(const char *prefix, mfn_t start, mfn_t end);
+int arch_iommu_context_init(struct domain *d, struct iommu_context *ctx, u32 flags);
+int arch_iommu_context_teardown(struct domain *d, struct iommu_context *ctx, u32 flags);
+int arch_iommu_flush_free_queue(struct domain *d);
 
 #endif /* !__ARCH_X86_IOMMU_H__ */
 /*
diff --git a/xen/arch/x86/tboot.c b/xen/arch/x86/tboot.c
index 9d9bb6e7cf..ecc0666334 100644
--- a/xen/arch/x86/tboot.c
+++ b/xen/arch/x86/tboot.c
@@ -222,7 +222,8 @@ static void tboot_gen_domain_integrity(const uint8_t key[TB_KEY_SIZE],
         {
             const struct domain_iommu *dio = dom_iommu(d);
 
-            update_iommu_mac(&ctx, dio->arch.vtd.pgd_maddr,
+            update_iommu_mac(&ctx,
+                             iommu_default_context(d)->arch.vtd.pgd_maddr,
                              agaw_to_level(dio->arch.vtd.agaw));
         }
     }
diff --git a/xen/drivers/passthrough/amd/iommu.h b/xen/drivers/passthrough/amd/iommu.h
index 52f748310b..4938cc38ed 100644
--- a/xen/drivers/passthrough/amd/iommu.h
+++ b/xen/drivers/passthrough/amd/iommu.h
@@ -26,6 +26,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -199,10 +200,10 @@ int __must_check cf_check amd_iommu_unmap_page(
     struct domain *d, dfn_t dfn, unsigned int order,
     unsigned int *flush_flags);
 int __must_check amd_iommu_alloc_root(struct domain *d);
-int amd_iommu_reserve_domain_unity_map(struct domain *d,
+int amd_iommu_reserve_domain_unity_map(struct domain *d, struct iommu_context *ctx,
                                        const struct ivrs_unity_map *map,
                                        unsigned int flag);
-int amd_iommu_reserve_domain_unity_unmap(struct domain *d,
+int amd_iommu_reserve_domain_unity_unmap(struct domain *d, struct iommu_context *ctx,
                                          const struct ivrs_unity_map *map);
 int cf_check amd_iommu_get_reserved_device_memory(
     iommu_grdm_t *func, void *ctxt);
diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c
index 00d2c46cbc..56b5c2c6ec 100644
--- a/xen/drivers/passthrough/amd/iommu_init.c
+++ b/xen/drivers/passthrough/amd/iommu_init.c
@@ -608,7 +608,6 @@ static void iommu_check_event_log(struct amd_iommu *iommu)
                    sizeof(event_entry_t), parse_event_log_entry);
 
     spin_lock_irqsave(&iommu->lock, flags);
-    
     /* Check event overflow. */
     entry = readl(iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
     if ( entry & IOMMU_STATUS_EVENT_LOG_OVERFLOW )
@@ -664,9 +663,8 @@ static void iommu_check_ppr_log(struct amd_iommu *iommu)
 
     iommu_read_log(iommu, &iommu->ppr_log,
                    sizeof(ppr_entry_t), parse_ppr_log_entry);
-    
-    spin_lock_irqsave(&iommu->lock, flags);
 
+    spin_lock_irqsave(&iommu->lock, flags);
     /* Check event overflow. */
     entry = readl(iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
     if ( entry & IOMMU_STATUS_PPR_LOG_OVERFLOW )
@@ -1595,7 +1593,7 @@ void cf_check amd_iommu_resume(void)
     for_each_amd_iommu ( iommu )
     {
        /*
-        * To make sure that iommus have not been touched 
+        * To make sure that iommus have not been touched
         * before re-enablement
         */
         disable_iommu(iommu);
diff --git a/xen/drivers/passthrough/amd/iommu_map.c b/xen/drivers/passthrough/amd/iommu_map.c
index 320a2dc64c..81a63cce8e 100644
--- a/xen/drivers/passthrough/amd/iommu_map.c
+++ b/xen/drivers/passthrough/amd/iommu_map.c
@@ -18,6 +18,7 @@
  */
 
 #include 
+#include 
 
 #include "iommu.h"
 
@@ -264,9 +265,9 @@ void __init iommu_dte_add_device_entry(struct amd_iommu_dte *dte,
  * {Re, un}mapping super page frames causes re-allocation of io
  * page tables.
  */
-static int iommu_pde_from_dfn(struct domain *d, unsigned long dfn,
-                              unsigned int target, unsigned long *pt_mfn,
-                              unsigned int *flush_flags, bool map)
+static int iommu_pde_from_dfn(struct domain *d, struct iommu_context *ctx,
+                              unsigned long dfn, unsigned int target,
+                              unsigned long *pt_mfn, unsigned int *flush_flags, bool map)
 {
     union amd_iommu_pte *pde, *next_table_vaddr;
     unsigned long  next_table_mfn;
@@ -274,8 +275,8 @@ static int iommu_pde_from_dfn(struct domain *d, unsigned long dfn,
     struct page_info *table;
     struct domain_iommu *hd = dom_iommu(d);
 
-    table = hd->arch.amd.root_table;
-    level = hd->arch.amd.paging_mode;
+    table = ctx->arch.amd.root_table;
+    level = ctx->arch.amd.paging_mode;
 
     if ( !table || target < 1 || level < target || level > 6 )
     {
@@ -311,7 +312,7 @@ static int iommu_pde_from_dfn(struct domain *d, unsigned long dfn,
             mfn = next_table_mfn;
 
             /* allocate lower level page table */
-            table = iommu_alloc_pgtable(hd, IOMMU_PTE_CONTIG_MASK);
+            table = iommu_alloc_pgtable(hd, ctx, IOMMU_PTE_CONTIG_MASK);
             if ( table == NULL )
             {
                 AMD_IOMMU_ERROR("cannot allocate I/O page table\n");
@@ -346,7 +347,7 @@ static int iommu_pde_from_dfn(struct domain *d, unsigned long dfn,
 
             if ( next_table_mfn == 0 )
             {
-                table = iommu_alloc_pgtable(hd, IOMMU_PTE_CONTIG_MASK);
+                table = iommu_alloc_pgtable(hd, ctx, IOMMU_PTE_CONTIG_MASK);
                 if ( table == NULL )
                 {
                     AMD_IOMMU_ERROR("cannot allocate I/O page table\n");
@@ -376,7 +377,8 @@ static int iommu_pde_from_dfn(struct domain *d, unsigned long dfn,
     return 0;
 }
 
-static void queue_free_pt(struct domain_iommu *hd, mfn_t mfn, unsigned int level)
+static void queue_free_pt(struct domain *d, struct iommu_context *ctx, mfn_t mfn,
+                          unsigned int level)
 {
     if ( level > 1 )
     {
@@ -387,13 +389,13 @@ static void queue_free_pt(struct domain_iommu *hd, mfn_t mfn, unsigned int level
             if ( pt[i].pr && pt[i].next_level )
             {
                 ASSERT(pt[i].next_level < level);
-                queue_free_pt(hd, _mfn(pt[i].mfn), pt[i].next_level);
+                queue_free_pt(d, ctx, _mfn(pt[i].mfn), pt[i].next_level);
             }
 
         unmap_domain_page(pt);
     }
 
-    iommu_queue_free_pgtable(hd, mfn_to_page(mfn));
+    iommu_queue_free_pgtable(d, ctx, mfn_to_page(mfn));
 }
 
 int cf_check amd_iommu_map_page(
@@ -401,6 +403,7 @@ int cf_check amd_iommu_map_page(
     unsigned int *flush_flags)
 {
     struct domain_iommu *hd = dom_iommu(d);
+    struct iommu_context *ctx = iommu_default_context(d);
     unsigned int level = (IOMMUF_order(flags) / PTE_PER_TABLE_SHIFT) + 1;
     bool contig;
     int rc;
@@ -410,7 +413,7 @@ int cf_check amd_iommu_map_page(
     ASSERT((hd->platform_ops->page_sizes >> IOMMUF_order(flags)) &
            PAGE_SIZE_4K);
 
-    spin_lock(&hd->arch.mapping_lock);
+    spin_lock(&ctx->arch.mapping_lock);
 
     /*
      * IOMMU mapping request can be safely ignored when the domain is dying.
@@ -420,24 +423,24 @@ int cf_check amd_iommu_map_page(
      */
     if ( d->is_dying )
     {
-        spin_unlock(&hd->arch.mapping_lock);
+        spin_unlock(&ctx->arch.mapping_lock);
         return 0;
     }
 
     rc = amd_iommu_alloc_root(d);
     if ( rc )
     {
-        spin_unlock(&hd->arch.mapping_lock);
+        spin_unlock(&ctx->arch.mapping_lock);
         AMD_IOMMU_ERROR("root table alloc failed, dfn = %"PRI_dfn"\n",
                         dfn_x(dfn));
         domain_crash(d);
         return rc;
     }
 
-    if ( iommu_pde_from_dfn(d, dfn_x(dfn), level, &pt_mfn, flush_flags, true) ||
+    if ( iommu_pde_from_dfn(d, ctx, dfn_x(dfn), level, &pt_mfn, flush_flags, true) ||
          !pt_mfn )
     {
-        spin_unlock(&hd->arch.mapping_lock);
+        spin_unlock(&ctx->arch.mapping_lock);
         AMD_IOMMU_ERROR("invalid IO pagetable entry dfn = %"PRI_dfn"\n",
                         dfn_x(dfn));
         domain_crash(d);
@@ -449,12 +452,12 @@ int cf_check amd_iommu_map_page(
                                 flags & IOMMUF_writable,
                                 flags & IOMMUF_readable, &contig);
 
-    while ( unlikely(contig) && ++level < hd->arch.amd.paging_mode )
+    while ( unlikely(contig) && ++level < ctx->arch.amd.paging_mode )
     {
         struct page_info *pg = mfn_to_page(_mfn(pt_mfn));
         unsigned long next_mfn;
 
-        if ( iommu_pde_from_dfn(d, dfn_x(dfn), level, &pt_mfn, flush_flags,
+        if ( iommu_pde_from_dfn(d, ctx, dfn_x(dfn), level, &pt_mfn, flush_flags,
                                 false) )
             BUG();
         BUG_ON(!pt_mfn);
@@ -464,11 +467,11 @@ int cf_check amd_iommu_map_page(
                               flags & IOMMUF_writable,
                               flags & IOMMUF_readable, &contig);
         *flush_flags |= IOMMU_FLUSHF_modified | IOMMU_FLUSHF_all;
-        iommu_queue_free_pgtable(hd, pg);
+        iommu_queue_free_pgtable(d, ctx, pg);
         perfc_incr(iommu_pt_coalesces);
     }
 
-    spin_unlock(&hd->arch.mapping_lock);
+    spin_unlock(&ctx->arch.mapping_lock);
 
     *flush_flags |= IOMMU_FLUSHF_added;
     if ( old.pr )
@@ -476,7 +479,7 @@ int cf_check amd_iommu_map_page(
         *flush_flags |= IOMMU_FLUSHF_modified;
 
         if ( IOMMUF_order(flags) && old.next_level )
-            queue_free_pt(hd, _mfn(old.mfn), old.next_level);
+            queue_free_pt(d, ctx, _mfn(old.mfn), old.next_level);
     }
 
     return 0;
@@ -487,6 +490,7 @@ int cf_check amd_iommu_unmap_page(
 {
     unsigned long pt_mfn = 0;
     struct domain_iommu *hd = dom_iommu(d);
+    struct iommu_context *ctx = iommu_default_context(d);
     unsigned int level = (order / PTE_PER_TABLE_SHIFT) + 1;
     union amd_iommu_pte old = {};
 
@@ -496,17 +500,17 @@ int cf_check amd_iommu_unmap_page(
      */
     ASSERT((hd->platform_ops->page_sizes >> order) & PAGE_SIZE_4K);
 
-    spin_lock(&hd->arch.mapping_lock);
+    spin_lock(&ctx->arch.mapping_lock);
 
-    if ( !hd->arch.amd.root_table )
+    if ( !ctx->arch.amd.root_table )
     {
-        spin_unlock(&hd->arch.mapping_lock);
+        spin_unlock(&ctx->arch.mapping_lock);
         return 0;
     }
 
-    if ( iommu_pde_from_dfn(d, dfn_x(dfn), level, &pt_mfn, flush_flags, false) )
+    if ( iommu_pde_from_dfn(d, ctx, dfn_x(dfn), level, &pt_mfn, flush_flags, false) )
     {
-        spin_unlock(&hd->arch.mapping_lock);
+        spin_unlock(&ctx->arch.mapping_lock);
         AMD_IOMMU_ERROR("invalid IO pagetable entry dfn = %"PRI_dfn"\n",
                         dfn_x(dfn));
         domain_crash(d);
@@ -520,30 +524,30 @@ int cf_check amd_iommu_unmap_page(
         /* Mark PTE as 'page not present'. */
         old = clear_iommu_pte_present(pt_mfn, dfn_x(dfn), level, &free);
 
-        while ( unlikely(free) && ++level < hd->arch.amd.paging_mode )
+        while ( unlikely(free) && ++level < ctx->arch.amd.paging_mode )
         {
             struct page_info *pg = mfn_to_page(_mfn(pt_mfn));
 
-            if ( iommu_pde_from_dfn(d, dfn_x(dfn), level, &pt_mfn,
+            if ( iommu_pde_from_dfn(d, ctx, dfn_x(dfn), level, &pt_mfn,
                                     flush_flags, false) )
                 BUG();
             BUG_ON(!pt_mfn);
 
             clear_iommu_pte_present(pt_mfn, dfn_x(dfn), level, &free);
             *flush_flags |= IOMMU_FLUSHF_all;
-            iommu_queue_free_pgtable(hd, pg);
+            iommu_queue_free_pgtable(d, ctx, pg);
             perfc_incr(iommu_pt_coalesces);
         }
     }
 
-    spin_unlock(&hd->arch.mapping_lock);
+    spin_unlock(&ctx->arch.mapping_lock);
 
     if ( old.pr )
     {
         *flush_flags |= IOMMU_FLUSHF_modified;
 
         if ( order && old.next_level )
-            queue_free_pt(hd, _mfn(old.mfn), old.next_level);
+            queue_free_pt(d, ctx, _mfn(old.mfn), old.next_level);
     }
 
     return 0;
@@ -646,7 +650,7 @@ int cf_check amd_iommu_flush_iotlb_pages(
     return 0;
 }
 
-int amd_iommu_reserve_domain_unity_map(struct domain *d,
+int amd_iommu_reserve_domain_unity_map(struct domain *d, struct iommu_context *ctx,
                                        const struct ivrs_unity_map *map,
                                        unsigned int flag)
 {
@@ -664,14 +668,14 @@ int amd_iommu_reserve_domain_unity_map(struct domain *d,
         if ( map->write )
             p2ma |= p2m_access_w;
 
-        rc = iommu_identity_mapping(d, p2ma, map->addr,
+        rc = iommu_identity_mapping(d, ctx, p2ma, map->addr,
                                     map->addr + map->length - 1, flag);
     }
 
     return rc;
 }
 
-int amd_iommu_reserve_domain_unity_unmap(struct domain *d,
+int amd_iommu_reserve_domain_unity_unmap(struct domain *d, struct iommu_context *ctx,
                                          const struct ivrs_unity_map *map)
 {
     int rc;
@@ -681,7 +685,7 @@ int amd_iommu_reserve_domain_unity_unmap(struct domain *d,
 
     for ( rc = 0; map; map = map->next )
     {
-        int ret = iommu_identity_mapping(d, p2m_access_x, map->addr,
+        int ret = iommu_identity_mapping(d, ctx, p2m_access_x, map->addr,
                                          map->addr + map->length - 1, 0);
 
         if ( ret && ret != -ENOENT && !rc )
@@ -771,6 +775,7 @@ static int fill_qpt(union amd_iommu_pte *this, unsigned int level,
                     struct page_info *pgs[IOMMU_MAX_PT_LEVELS])
 {
     struct domain_iommu *hd = dom_iommu(dom_io);
+    struct iommu_context *ctx = iommu_default_context(dom_io);
     unsigned int i;
     int rc = 0;
 
@@ -787,7 +792,7 @@ static int fill_qpt(union amd_iommu_pte *this, unsigned int level,
                  * page table pages, and the resulting allocations are always
                  * zeroed.
                  */
-                pgs[level] = iommu_alloc_pgtable(hd, 0);
+                pgs[level] = iommu_alloc_pgtable(hd, ctx, 0);
                 if ( !pgs[level] )
                 {
                     rc = -ENOMEM;
@@ -823,14 +828,15 @@ static int fill_qpt(union amd_iommu_pte *this, unsigned int level,
 int cf_check amd_iommu_quarantine_init(struct pci_dev *pdev, bool scratch_page)
 {
     struct domain_iommu *hd = dom_iommu(dom_io);
-    unsigned int level = hd->arch.amd.paging_mode;
+    struct iommu_context *ctx = iommu_default_context(dom_io);
+    unsigned int level = ctx->arch.amd.paging_mode;
     unsigned int req_id = get_dma_requestor_id(pdev->seg, pdev->sbdf.bdf);
     const struct ivrs_mappings *ivrs_mappings = get_ivrs_mappings(pdev->seg);
     int rc;
 
     ASSERT(pcidevs_locked());
-    ASSERT(!hd->arch.amd.root_table);
-    ASSERT(page_list_empty(&hd->arch.pgtables.list));
+    ASSERT(!ctx->arch.amd.root_table);
+    ASSERT(page_list_empty(&ctx->arch.pgtables));
 
     if ( !scratch_page && !ivrs_mappings[req_id].unity_map )
         return 0;
@@ -843,19 +849,19 @@ int cf_check amd_iommu_quarantine_init(struct pci_dev *pdev, bool scratch_page)
         return 0;
     }
 
-    pdev->arch.amd.root_table = iommu_alloc_pgtable(hd, 0);
+    pdev->arch.amd.root_table = iommu_alloc_pgtable(hd, ctx, 0);
     if ( !pdev->arch.amd.root_table )
         return -ENOMEM;
 
     /* Transiently install the root into DomIO, for iommu_identity_mapping(). */
-    hd->arch.amd.root_table = pdev->arch.amd.root_table;
+    ctx->arch.amd.root_table = pdev->arch.amd.root_table;
 
-    rc = amd_iommu_reserve_domain_unity_map(dom_io,
+    rc = amd_iommu_reserve_domain_unity_map(dom_io, ctx,
                                             ivrs_mappings[req_id].unity_map,
                                             0);
 
-    iommu_identity_map_teardown(dom_io);
-    hd->arch.amd.root_table = NULL;
+    iommu_identity_map_teardown(dom_io, ctx);
+    ctx->arch.amd.root_table = NULL;
 
     if ( rc )
         AMD_IOMMU_WARN("%pp: quarantine unity mapping failed\n", &pdev->sbdf);
@@ -871,7 +877,7 @@ int cf_check amd_iommu_quarantine_init(struct pci_dev *pdev, bool scratch_page)
         pdev->arch.leaf_mfn = page_to_mfn(pgs[0]);
     }
 
-    page_list_move(&pdev->arch.pgtables_list, &hd->arch.pgtables.list);
+    page_list_move(&pdev->arch.pgtables_list, &ctx->arch.pgtables);
 
     if ( rc )
         amd_iommu_quarantine_teardown(pdev);
@@ -881,16 +887,16 @@ int cf_check amd_iommu_quarantine_init(struct pci_dev *pdev, bool scratch_page)
 
 void amd_iommu_quarantine_teardown(struct pci_dev *pdev)
 {
-    struct domain_iommu *hd = dom_iommu(dom_io);
+    struct iommu_context *ctx = iommu_default_context(dom_io);
 
     ASSERT(pcidevs_locked());
 
     if ( !pdev->arch.amd.root_table )
         return;
 
-    ASSERT(page_list_empty(&hd->arch.pgtables.list));
-    page_list_move(&hd->arch.pgtables.list, &pdev->arch.pgtables_list);
-    while ( iommu_free_pgtables(dom_io) == -ERESTART )
+    ASSERT(page_list_empty(&ctx->arch.pgtables));
+    page_list_move(&ctx->arch.pgtables, &pdev->arch.pgtables_list);
+    while ( iommu_free_pgtables(dom_io, ctx) == -ERESTART )
         /* nothing */;
     pdev->arch.amd.root_table = NULL;
 }
diff --git a/xen/drivers/passthrough/amd/pci_amd_iommu.c b/xen/drivers/passthrough/amd/pci_amd_iommu.c
index 3a14770855..964f6b47db 100644
--- a/xen/drivers/passthrough/amd/pci_amd_iommu.c
+++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c
@@ -19,6 +19,7 @@
 
 #include 
 #include 
+#include 
 
 #include 
 
@@ -86,12 +87,12 @@ int get_dma_requestor_id(uint16_t seg, uint16_t bdf)
 
 static int __must_check allocate_domain_resources(struct domain *d)
 {
-    struct domain_iommu *hd = dom_iommu(d);
+    struct iommu_context *ctx = iommu_default_context(d);
     int rc;
 
-    spin_lock(&hd->arch.mapping_lock);
+    spin_lock(&ctx->arch.mapping_lock);
     rc = amd_iommu_alloc_root(d);
-    spin_unlock(&hd->arch.mapping_lock);
+    spin_unlock(&ctx->arch.mapping_lock);
 
     return rc;
 }
@@ -125,7 +126,7 @@ static bool use_ats(
 }
 
 static int __must_check amd_iommu_setup_domain_device(
-    struct domain *domain, struct amd_iommu *iommu,
+    struct domain *domain, struct iommu_context *ctx, struct amd_iommu *iommu,
     uint8_t devfn, struct pci_dev *pdev)
 {
     struct amd_iommu_dte *table, *dte;
@@ -133,7 +134,6 @@ static int __must_check amd_iommu_setup_domain_device(
     unsigned int req_id, sr_flags;
     int rc;
     u8 bus = pdev->bus;
-    struct domain_iommu *hd = dom_iommu(domain);
     const struct ivrs_mappings *ivrs_dev;
     const struct page_info *root_pg;
     domid_t domid;
@@ -141,7 +141,7 @@ static int __must_check amd_iommu_setup_domain_device(
     if ( QUARANTINE_SKIP(domain, pdev) )
         return 0;
 
-    BUG_ON(!hd->arch.amd.paging_mode || !iommu->dev_table.buffer);
+    BUG_ON(!ctx->arch.amd.paging_mode || !iommu->dev_table.buffer);
 
     rc = allocate_domain_resources(domain);
     if ( rc )
@@ -161,7 +161,7 @@ static int __must_check amd_iommu_setup_domain_device(
 
     if ( domain != dom_io )
     {
-        root_pg = hd->arch.amd.root_table;
+        root_pg = ctx->arch.amd.root_table;
         domid = domain->domain_id;
     }
     else
@@ -177,7 +177,7 @@ static int __must_check amd_iommu_setup_domain_device(
         /* bind DTE to domain page-tables */
         rc = amd_iommu_set_root_page_table(
                  dte, page_to_maddr(root_pg), domid,
-                 hd->arch.amd.paging_mode, sr_flags);
+                 ctx->arch.amd.paging_mode, sr_flags);
         if ( rc )
         {
             ASSERT(rc < 0);
@@ -219,7 +219,7 @@ static int __must_check amd_iommu_setup_domain_device(
         else
             rc = amd_iommu_set_root_page_table(
                      dte, page_to_maddr(root_pg), domid,
-                     hd->arch.amd.paging_mode, sr_flags);
+                     ctx->arch.amd.paging_mode, sr_flags);
         if ( rc < 0 )
         {
             spin_unlock_irqrestore(&iommu->lock, flags);
@@ -270,7 +270,7 @@ static int __must_check amd_iommu_setup_domain_device(
                     "root table = %#"PRIx64", "
                     "domain = %d, paging mode = %d\n",
                     req_id, pdev->type, page_to_maddr(root_pg),
-                    domid, hd->arch.amd.paging_mode);
+                    domid, ctx->arch.amd.paging_mode);
 
     ASSERT(pcidevs_locked());
 
@@ -352,11 +352,12 @@ static int cf_check iov_enable_xt(void)
 int amd_iommu_alloc_root(struct domain *d)
 {
     struct domain_iommu *hd = dom_iommu(d);
+    struct iommu_context *ctx = iommu_default_context(d);
 
-    if ( unlikely(!hd->arch.amd.root_table) && d != dom_io )
+    if ( unlikely(!ctx->arch.amd.root_table) && d != dom_io )
     {
-        hd->arch.amd.root_table = iommu_alloc_pgtable(hd, 0);
-        if ( !hd->arch.amd.root_table )
+        ctx->arch.amd.root_table = iommu_alloc_pgtable(hd, ctx, 0);
+        if ( !ctx->arch.amd.root_table )
             return -ENOMEM;
     }
 
@@ -368,7 +369,7 @@ int __read_mostly amd_iommu_min_paging_mode = 1;
 
 static int cf_check amd_iommu_domain_init(struct domain *d)
 {
-    struct domain_iommu *hd = dom_iommu(d);
+    struct iommu_context *ctx = iommu_default_context(d);
     int pglvl = amd_iommu_get_paging_mode(
                     1UL << (domain_max_paddr_bits(d) - PAGE_SHIFT));
 
@@ -379,7 +380,7 @@ static int cf_check amd_iommu_domain_init(struct domain *d)
      * Choose the number of levels for the IOMMU page tables, taking into
      * account unity maps.
      */
-    hd->arch.amd.paging_mode = max(pglvl, amd_iommu_min_paging_mode);
+    ctx->arch.amd.paging_mode = max(pglvl, amd_iommu_min_paging_mode);
 
     return 0;
 }
@@ -455,7 +456,7 @@ static void amd_iommu_disable_domain_device(const struct domain *domain,
         AMD_IOMMU_DEBUG("Disable: device id = %#x, "
                         "domain = %d, paging mode = %d\n",
                         req_id, dte->domain_id,
-                        dom_iommu(domain)->arch.amd.paging_mode);
+                        iommu_default_context(domain)->arch.amd.paging_mode);
     }
     else
         spin_unlock_irqrestore(&iommu->lock, flags);
@@ -466,6 +467,8 @@ static int cf_check reassign_device(
     struct pci_dev *pdev)
 {
     struct amd_iommu *iommu;
+    struct iommu_context *target_ctx = iommu_default_context(target);
+    struct iommu_context *source_ctx = iommu_default_context(source);
     int rc;
 
     iommu = find_iommu_for_device(pdev->sbdf);
@@ -478,7 +481,7 @@ static int cf_check reassign_device(
 
     if ( !QUARANTINE_SKIP(target, pdev) )
     {
-        rc = amd_iommu_setup_domain_device(target, iommu, devfn, pdev);
+        rc = amd_iommu_setup_domain_device(target, target_ctx, iommu, devfn, pdev);
         if ( rc )
             return rc;
     }
@@ -509,7 +512,7 @@ static int cf_check reassign_device(
         unsigned int bdf = PCI_BDF(pdev->bus, devfn);
 
         rc = amd_iommu_reserve_domain_unity_unmap(
-                 source,
+                 source, source_ctx,
                  ivrs_mappings[get_dma_requestor_id(pdev->seg, bdf)].unity_map);
         if ( rc )
             return rc;
@@ -528,7 +531,8 @@ static int cf_check amd_iommu_assign_device(
     unsigned int bdf = PCI_BDF(pdev->bus, devfn);
     int req_id = get_dma_requestor_id(pdev->seg, bdf);
     int rc = amd_iommu_reserve_domain_unity_map(
-                 d, ivrs_mappings[req_id].unity_map, flag);
+                 d, iommu_default_context(d),
+                 ivrs_mappings[req_id].unity_map, flag);
 
     if ( !rc )
         rc = reassign_device(pdev->domain, d, devfn, pdev);
@@ -536,7 +540,8 @@ static int cf_check amd_iommu_assign_device(
     if ( rc && !is_hardware_domain(d) )
     {
         int ret = amd_iommu_reserve_domain_unity_unmap(
-                      d, ivrs_mappings[req_id].unity_map);
+                      d, iommu_default_context(d),
+                      ivrs_mappings[req_id].unity_map);
 
         if ( ret )
         {
@@ -553,22 +558,25 @@ static int cf_check amd_iommu_assign_device(
 
 static void cf_check amd_iommu_clear_root_pgtable(struct domain *d)
 {
-    struct domain_iommu *hd = dom_iommu(d);
+    struct iommu_context *ctx = iommu_default_context(d);
 
-    spin_lock(&hd->arch.mapping_lock);
-    hd->arch.amd.root_table = NULL;
-    spin_unlock(&hd->arch.mapping_lock);
+    spin_lock(&ctx->arch.mapping_lock);
+    ctx->arch.amd.root_table = NULL;
+    spin_unlock(&ctx->arch.mapping_lock);
 }
 
 static void cf_check amd_iommu_domain_destroy(struct domain *d)
 {
-    iommu_identity_map_teardown(d);
-    ASSERT(!dom_iommu(d)->arch.amd.root_table);
+    struct iommu_context *ctx = iommu_default_context(d);
+
+    iommu_identity_map_teardown(d, ctx);
+    ASSERT(!ctx->arch.amd.root_table);
 }
 
 static int cf_check amd_iommu_add_device(u8 devfn, struct pci_dev *pdev)
 {
     struct amd_iommu *iommu;
+    struct iommu_context *ctx;
     u16 bdf;
     struct ivrs_mappings *ivrs_mappings;
     bool fresh_domid = false;
@@ -577,6 +585,8 @@ static int cf_check amd_iommu_add_device(u8 devfn, struct pci_dev *pdev)
     if ( !pdev->domain )
         return -EINVAL;
 
+    ctx = iommu_default_context(pdev->domain);
+
     for_each_amd_iommu(iommu)
         if ( pdev->sbdf.sbdf == iommu->sbdf.sbdf )
             return is_hardware_domain(pdev->domain) ? 0 : -ENODEV;
@@ -633,7 +643,7 @@ static int cf_check amd_iommu_add_device(u8 devfn, struct pci_dev *pdev)
     }
 
     if ( amd_iommu_reserve_domain_unity_map(
-             pdev->domain,
+             pdev->domain, ctx,
              ivrs_mappings[ivrs_mappings[bdf].dte_requestor_id].unity_map,
              0) )
         AMD_IOMMU_WARN("%pd: unity mapping failed for %pp\n",
@@ -647,7 +657,7 @@ static int cf_check amd_iommu_add_device(u8 devfn, struct pci_dev *pdev)
         fresh_domid = true;
     }
 
-    ret = amd_iommu_setup_domain_device(pdev->domain, iommu, devfn, pdev);
+    ret = amd_iommu_setup_domain_device(pdev->domain, ctx, iommu, devfn, pdev);
     if ( ret && fresh_domid )
     {
         iommu_free_domid(pdev->arch.pseudo_domid, iommu->domid_map);
@@ -660,12 +670,15 @@ static int cf_check amd_iommu_add_device(u8 devfn, struct pci_dev *pdev)
 static int cf_check amd_iommu_remove_device(u8 devfn, struct pci_dev *pdev)
 {
     struct amd_iommu *iommu;
+    struct iommu_context *ctx;
     u16 bdf;
     struct ivrs_mappings *ivrs_mappings;
 
     if ( !pdev->domain )
         return -EINVAL;
 
+    ctx = iommu_default_context(pdev->domain);
+
     iommu = find_iommu_for_device(pdev->sbdf);
     if ( !iommu )
     {
@@ -680,7 +693,7 @@ static int cf_check amd_iommu_remove_device(u8 devfn, struct pci_dev *pdev)
     bdf = PCI_BDF(pdev->bus, devfn);
 
     if ( amd_iommu_reserve_domain_unity_unmap(
-             pdev->domain,
+             pdev->domain, ctx,
              ivrs_mappings[ivrs_mappings[bdf].dte_requestor_id].unity_map) )
         AMD_IOMMU_WARN("%pd: unity unmapping failed for %pp\n",
                        pdev->domain, &PCI_SBDF(pdev->seg, bdf));
@@ -755,14 +768,14 @@ static void amd_dump_page_table_level(struct page_info *pg, int level,
 
 static void cf_check amd_dump_page_tables(struct domain *d)
 {
-    const struct domain_iommu *hd = dom_iommu(d);
+    struct iommu_context *ctx = iommu_default_context(d);
 
-    if ( !hd->arch.amd.root_table )
+    if ( !ctx->arch.amd.root_table )
         return;
 
-    printk("AMD IOMMU %pd table has %u levels\n", d, hd->arch.amd.paging_mode);
-    amd_dump_page_table_level(hd->arch.amd.root_table,
-                              hd->arch.amd.paging_mode, 0, 0);
+    printk("AMD IOMMU %pd table has %u levels\n", d, ctx->arch.amd.paging_mode);
+    amd_dump_page_table_level(ctx->arch.amd.root_table,
+                              ctx->arch.amd.paging_mode, 0, 0);
 }
 
 static const struct iommu_ops __initconst_cf_clobber _iommu_ops = {
diff --git a/xen/drivers/passthrough/iommu.c b/xen/drivers/passthrough/iommu.c
index c9425d6971..32c5011820 100644
--- a/xen/drivers/passthrough/iommu.c
+++ b/xen/drivers/passthrough/iommu.c
@@ -403,12 +403,15 @@ long iommu_unmap(struct domain *d, dfn_t dfn0, unsigned long page_count,
     unsigned long i;
     unsigned int order, j = 0;
     int rc = 0;
+    struct iommu_context *ctx;
 
     if ( !is_iommu_enabled(d) )
         return 0;
 
     ASSERT(!(flags & ~IOMMUF_preempt));
 
+    ctx = iommu_default_context(d);
+
     for ( i = 0; i < page_count; i += 1UL << order )
     {
         dfn_t dfn = dfn_add(dfn0, i);
@@ -468,10 +471,13 @@ int iommu_lookup_page(struct domain *d, dfn_t dfn, mfn_t *mfn,
                       unsigned int *flags)
 {
     const struct domain_iommu *hd = dom_iommu(d);
+    struct iommu_context *ctx;
 
     if ( !is_iommu_enabled(d) || !hd->platform_ops->lookup_page )
         return -EOPNOTSUPP;
 
+    ctx = iommu_default_context(d);
+
     return iommu_call(hd->platform_ops, lookup_page, d, dfn, mfn, flags);
 }
 
diff --git a/xen/drivers/passthrough/vtd/extern.h b/xen/drivers/passthrough/vtd/extern.h
index c16583c951..3dcb77c711 100644
--- a/xen/drivers/passthrough/vtd/extern.h
+++ b/xen/drivers/passthrough/vtd/extern.h
@@ -80,8 +80,8 @@ uint64_t alloc_pgtable_maddr(unsigned long npages, nodeid_t node);
 void free_pgtable_maddr(u64 maddr);
 void *map_vtd_domain_page(u64 maddr);
 void unmap_vtd_domain_page(const void *va);
-int domain_context_mapping_one(struct domain *domain, struct vtd_iommu *iommu,
-                               uint8_t bus, uint8_t devfn,
+int domain_context_mapping_one(struct domain *domain, struct iommu_context *ctx,
+                               struct vtd_iommu *iommu, uint8_t bus, uint8_t devfn,
                                const struct pci_dev *pdev, domid_t domid,
                                paddr_t pgd_maddr, unsigned int mode);
 int domain_context_unmap_one(struct domain *domain, struct vtd_iommu *iommu,
diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c
index 90f36ac22b..9252c3e0f3 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -54,7 +54,7 @@
 #define DEVICE_DOMID(d, pdev) ((d) != dom_io ? (d)->domain_id \
                                              : (pdev)->arch.pseudo_domid)
 #define DEVICE_PGTABLE(d, pdev) ((d) != dom_io \
-                                 ? dom_iommu(d)->arch.vtd.pgd_maddr \
+                                 ? iommu_default_context(d)->arch.vtd.pgd_maddr \
                                  : (pdev)->arch.vtd.pgd_maddr)
 
 bool __read_mostly iommu_igfx = true;
@@ -227,7 +227,7 @@ static void check_cleanup_domid_map(const struct domain *d,
 
     if ( !found )
     {
-        clear_bit(iommu->index, dom_iommu(d)->arch.vtd.iommu_bitmap);
+        clear_bit(iommu->index, iommu_default_context(d)->arch.vtd.iommu_bitmap);
         cleanup_domid_map(d->domain_id, iommu);
     }
 }
@@ -315,8 +315,9 @@ static u64 bus_to_context_maddr(struct vtd_iommu *iommu, u8 bus)
  *   PTE for the requested address,
  * - for target == 0 the full PTE contents below PADDR_BITS limit.
  */
-static uint64_t addr_to_dma_page_maddr(struct domain *domain, daddr_t addr,
-                                       unsigned int target,
+static uint64_t addr_to_dma_page_maddr(struct domain *domain,
+                                       struct iommu_context *ctx,
+                                       daddr_t addr, unsigned int target,
                                        unsigned int *flush_flags, bool alloc)
 {
     struct domain_iommu *hd = dom_iommu(domain);
@@ -326,10 +327,10 @@ static uint64_t addr_to_dma_page_maddr(struct domain *domain, daddr_t addr,
     u64 pte_maddr = 0;
 
     addr &= (((u64)1) << addr_width) - 1;
-    ASSERT(spin_is_locked(&hd->arch.mapping_lock));
+    ASSERT(spin_is_locked(&ctx->arch.mapping_lock));
     ASSERT(target || !alloc);
 
-    if ( !hd->arch.vtd.pgd_maddr )
+    if ( !ctx->arch.vtd.pgd_maddr )
     {
         struct page_info *pg;
 
@@ -337,13 +338,13 @@ static uint64_t addr_to_dma_page_maddr(struct domain *domain, daddr_t addr,
             goto out;
 
         pte_maddr = level;
-        if ( !(pg = iommu_alloc_pgtable(hd, 0)) )
+        if ( !(pg = iommu_alloc_pgtable(hd, ctx, 0)) )
             goto out;
 
-        hd->arch.vtd.pgd_maddr = page_to_maddr(pg);
+        ctx->arch.vtd.pgd_maddr = page_to_maddr(pg);
     }
 
-    pte_maddr = hd->arch.vtd.pgd_maddr;
+    pte_maddr = ctx->arch.vtd.pgd_maddr;
     parent = map_vtd_domain_page(pte_maddr);
     while ( level > target )
     {
@@ -379,7 +380,7 @@ static uint64_t addr_to_dma_page_maddr(struct domain *domain, daddr_t addr,
             }
 
             pte_maddr = level - 1;
-            pg = iommu_alloc_pgtable(hd, DMA_PTE_CONTIG_MASK);
+            pg = iommu_alloc_pgtable(hd, ctx, DMA_PTE_CONTIG_MASK);
             if ( !pg )
                 break;
 
@@ -431,13 +432,12 @@ static uint64_t addr_to_dma_page_maddr(struct domain *domain, daddr_t addr,
     return pte_maddr;
 }
 
-static paddr_t domain_pgd_maddr(struct domain *d, paddr_t pgd_maddr,
-                                unsigned int nr_pt_levels)
+static paddr_t domain_pgd_maddr(struct domain *d, struct iommu_context *ctx,
+                                paddr_t pgd_maddr, unsigned int nr_pt_levels)
 {
-    struct domain_iommu *hd = dom_iommu(d);
     unsigned int agaw;
 
-    ASSERT(spin_is_locked(&hd->arch.mapping_lock));
+    ASSERT(spin_is_locked(&ctx->arch.mapping_lock));
 
     if ( pgd_maddr )
         /* nothing */;
@@ -449,19 +449,19 @@ static paddr_t domain_pgd_maddr(struct domain *d, paddr_t pgd_maddr,
     }
     else
     {
-        if ( !hd->arch.vtd.pgd_maddr )
+        if ( !ctx->arch.vtd.pgd_maddr )
         {
             /*
              * Ensure we have pagetables allocated down to the smallest
              * level the loop below may need to run to.
              */
-            addr_to_dma_page_maddr(d, 0, min_pt_levels, NULL, true);
+            addr_to_dma_page_maddr(d, ctx, 0, min_pt_levels, NULL, true);
 
-            if ( !hd->arch.vtd.pgd_maddr )
+            if ( !ctx->arch.vtd.pgd_maddr )
                 return 0;
         }
 
-        pgd_maddr = hd->arch.vtd.pgd_maddr;
+        pgd_maddr = ctx->arch.vtd.pgd_maddr;
     }
 
     /* Skip top level(s) of page tables for less-than-maximum level DRHDs. */
@@ -735,7 +735,7 @@ static int __must_check cf_check iommu_flush_iotlb(struct domain *d, dfn_t dfn,
                                                    unsigned long page_count,
                                                    unsigned int flush_flags)
 {
-    struct domain_iommu *hd = dom_iommu(d);
+    struct iommu_context *ctx = iommu_default_context(d);
     struct acpi_drhd_unit *drhd;
     struct vtd_iommu *iommu;
     bool flush_dev_iotlb;
@@ -763,7 +763,7 @@ static int __must_check cf_check iommu_flush_iotlb(struct domain *d, dfn_t dfn,
 
         iommu = drhd->iommu;
 
-        if ( !test_bit(iommu->index, hd->arch.vtd.iommu_bitmap) )
+        if ( !test_bit(iommu->index, ctx->arch.vtd.iommu_bitmap) )
             continue;
 
         flush_dev_iotlb = !!find_ats_dev_drhd(iommu);
@@ -791,7 +791,8 @@ static int __must_check cf_check iommu_flush_iotlb(struct domain *d, dfn_t dfn,
     return ret;
 }
 
-static void queue_free_pt(struct domain_iommu *hd, mfn_t mfn, unsigned int level)
+static void queue_free_pt(struct domain *d, struct iommu_context *ctx, mfn_t mfn,
+                          unsigned int level)
 {
     if ( level > 1 )
     {
@@ -800,13 +801,13 @@ static void queue_free_pt(struct domain_iommu *hd, mfn_t mfn, unsigned int level
 
         for ( i = 0; i < PTE_NUM; ++i )
             if ( dma_pte_present(pt[i]) && !dma_pte_superpage(pt[i]) )
-                queue_free_pt(hd, maddr_to_mfn(dma_pte_addr(pt[i])),
+                queue_free_pt(d, ctx, maddr_to_mfn(dma_pte_addr(pt[i])),
                               level - 1);
 
         unmap_domain_page(pt);
     }
 
-    iommu_queue_free_pgtable(hd, mfn_to_page(mfn));
+    iommu_queue_free_pgtable(d, ctx, mfn_to_page(mfn));
 }
 
 static int iommu_set_root_entry(struct vtd_iommu *iommu)
@@ -1436,10 +1437,11 @@ void __init iommu_free(struct acpi_drhd_unit *drhd)
 static int cf_check intel_iommu_domain_init(struct domain *d)
 {
     struct domain_iommu *hd = dom_iommu(d);
+    struct iommu_context *ctx = iommu_default_context(d);
 
-    hd->arch.vtd.iommu_bitmap = xzalloc_array(unsigned long,
+    ctx->arch.vtd.iommu_bitmap = xzalloc_array(unsigned long,
                                               BITS_TO_LONGS(nr_iommus));
-    if ( !hd->arch.vtd.iommu_bitmap )
+    if ( !ctx->arch.vtd.iommu_bitmap )
         return -ENOMEM;
 
     hd->arch.vtd.agaw = width_to_agaw(DEFAULT_DOMAIN_ADDRESS_WIDTH);
@@ -1480,11 +1482,11 @@ static void __hwdom_init cf_check intel_iommu_hwdom_init(struct domain *d)
  */
 int domain_context_mapping_one(
     struct domain *domain,
+    struct iommu_context *ctx,
     struct vtd_iommu *iommu,
     uint8_t bus, uint8_t devfn, const struct pci_dev *pdev,
     domid_t domid, paddr_t pgd_maddr, unsigned int mode)
 {
-    struct domain_iommu *hd = dom_iommu(domain);
     struct context_entry *context, *context_entries, lctxt;
     __uint128_t res, old;
     uint64_t maddr;
@@ -1537,12 +1539,12 @@ int domain_context_mapping_one(
     {
         paddr_t root;
 
-        spin_lock(&hd->arch.mapping_lock);
+        spin_lock(&ctx->arch.mapping_lock);
 
-        root = domain_pgd_maddr(domain, pgd_maddr, iommu->nr_pt_levels);
+        root = domain_pgd_maddr(domain, ctx, pgd_maddr, iommu->nr_pt_levels);
         if ( !root )
         {
-            spin_unlock(&hd->arch.mapping_lock);
+            spin_unlock(&ctx->arch.mapping_lock);
             spin_unlock(&iommu->lock);
             unmap_vtd_domain_page(context_entries);
             if ( prev_dom )
@@ -1556,7 +1558,7 @@ int domain_context_mapping_one(
         else
             context_set_translation_type(lctxt, CONTEXT_TT_MULTI_LEVEL);
 
-        spin_unlock(&hd->arch.mapping_lock);
+        spin_unlock(&ctx->arch.mapping_lock);
     }
 
     rc = context_set_domain_id(&lctxt, domid, iommu);
@@ -1630,7 +1632,7 @@ int domain_context_mapping_one(
     if ( rc > 0 )
         rc = 0;
 
-    set_bit(iommu->index, hd->arch.vtd.iommu_bitmap);
+    set_bit(iommu->index, ctx->arch.vtd.iommu_bitmap);
 
     unmap_vtd_domain_page(context_entries);
 
@@ -1648,7 +1650,7 @@ int domain_context_mapping_one(
              (prev_dom == dom_io && !pdev) )
             ret = domain_context_unmap_one(domain, iommu, bus, devfn);
         else
-            ret = domain_context_mapping_one(prev_dom, iommu, bus, devfn, pdev,
+            ret = domain_context_mapping_one(prev_dom, ctx, iommu, bus, devfn, pdev,
                                              DEVICE_DOMID(prev_dom, pdev),
                                              DEVICE_PGTABLE(prev_dom, pdev),
                                              (mode & MAP_WITH_RMRR) |
@@ -1667,8 +1669,8 @@ int domain_context_mapping_one(
 static const struct acpi_drhd_unit *domain_context_unmap(
     struct domain *d, uint8_t devfn, struct pci_dev *pdev);
 
-static int domain_context_mapping(struct domain *domain, u8 devfn,
-                                  struct pci_dev *pdev)
+static int domain_context_mapping(struct domain *domain, struct iommu_context *ctx,
+                                  u8 devfn, struct pci_dev *pdev)
 {
     const struct acpi_drhd_unit *drhd = acpi_find_matched_drhd_unit(pdev);
     const struct acpi_rmrr_unit *rmrr;
@@ -1737,7 +1739,7 @@ static int domain_context_mapping(struct domain *domain, u8 devfn,
         if ( iommu_debug )
             printk(VTDPREFIX "%pd:PCIe: map %pp\n",
                    domain, &PCI_SBDF(seg, bus, devfn));
-        ret = domain_context_mapping_one(domain, drhd->iommu, bus, devfn, pdev,
+        ret = domain_context_mapping_one(domain, ctx, drhd->iommu, bus, devfn, pdev,
                                          DEVICE_DOMID(domain, pdev), pgd_maddr,
                                          mode);
         if ( ret > 0 )
@@ -1763,7 +1765,7 @@ static int domain_context_mapping(struct domain *domain, u8 devfn,
             printk(VTDPREFIX "%pd:PCI: map %pp\n",
                    domain, &PCI_SBDF(seg, bus, devfn));
 
-        ret = domain_context_mapping_one(domain, drhd->iommu, bus, devfn,
+        ret = domain_context_mapping_one(domain, ctx, drhd->iommu, bus, devfn,
                                          pdev, DEVICE_DOMID(domain, pdev),
                                          pgd_maddr, mode);
         if ( ret < 0 )
@@ -1794,7 +1796,7 @@ static int domain_context_mapping(struct domain *domain, u8 devfn,
          * their owner would be the wrong one. Pass NULL instead.
          */
         if ( ret >= 0 )
-            ret = domain_context_mapping_one(domain, drhd->iommu, bus, devfn,
+            ret = domain_context_mapping_one(domain, ctx, drhd->iommu, bus, devfn,
                                              NULL, DEVICE_DOMID(domain, pdev),
                                              pgd_maddr, mode);
 
@@ -1810,7 +1812,7 @@ static int domain_context_mapping(struct domain *domain, u8 devfn,
          */
         if ( !ret && pdev_type(seg, bus, devfn) == DEV_TYPE_PCIe2PCI_BRIDGE &&
              (secbus != pdev->bus || pdev->devfn != 0) )
-            ret = domain_context_mapping_one(domain, drhd->iommu, secbus, 0,
+            ret = domain_context_mapping_one(domain, ctx, drhd->iommu, secbus, 0,
                                              NULL, DEVICE_DOMID(domain, pdev),
                                              pgd_maddr, mode);
 
@@ -1819,7 +1821,7 @@ static int domain_context_mapping(struct domain *domain, u8 devfn,
             if ( !prev_present )
                 domain_context_unmap(domain, devfn, pdev);
             else if ( pdev->domain != domain ) /* Avoid infinite recursion. */
-                domain_context_mapping(pdev->domain, devfn, pdev);
+                domain_context_mapping(pdev->domain, ctx, devfn, pdev);
         }
 
         break;
@@ -2013,44 +2015,44 @@ static const struct acpi_drhd_unit *domain_context_unmap(
 
 static void cf_check iommu_clear_root_pgtable(struct domain *d)
 {
-    struct domain_iommu *hd = dom_iommu(d);
+    struct iommu_context *ctx = iommu_default_context(d);
 
-    spin_lock(&hd->arch.mapping_lock);
-    hd->arch.vtd.pgd_maddr = 0;
-    spin_unlock(&hd->arch.mapping_lock);
+    spin_lock(&ctx->arch.mapping_lock);
+    ctx->arch.vtd.pgd_maddr = 0;
+    spin_unlock(&ctx->arch.mapping_lock);
 }
 
 static void cf_check iommu_domain_teardown(struct domain *d)
 {
-    struct domain_iommu *hd = dom_iommu(d);
+    struct iommu_context *ctx = iommu_default_context(d);
     const struct acpi_drhd_unit *drhd;
 
     if ( list_empty(&acpi_drhd_units) )
         return;
 
-    iommu_identity_map_teardown(d);
+    iommu_identity_map_teardown(d, ctx);
 
-    ASSERT(!hd->arch.vtd.pgd_maddr);
+    ASSERT(!ctx->arch.vtd.pgd_maddr);
 
     for_each_drhd_unit ( drhd )
         cleanup_domid_map(d->domain_id, drhd->iommu);
 
-    XFREE(hd->arch.vtd.iommu_bitmap);
+    XFREE(ctx->arch.vtd.iommu_bitmap);
 }
 
 static void quarantine_teardown(struct pci_dev *pdev,
                                 const struct acpi_drhd_unit *drhd)
 {
-    struct domain_iommu *hd = dom_iommu(dom_io);
+    struct iommu_context *ctx = iommu_default_context(dom_io);
 
     ASSERT(pcidevs_locked());
 
     if ( !pdev->arch.vtd.pgd_maddr )
         return;
 
-    ASSERT(page_list_empty(&hd->arch.pgtables.list));
-    page_list_move(&hd->arch.pgtables.list, &pdev->arch.pgtables_list);
-    while ( iommu_free_pgtables(dom_io) == -ERESTART )
+    ASSERT(page_list_empty(&ctx->arch.pgtables));
+    page_list_move(&ctx->arch.pgtables, &pdev->arch.pgtables_list);
+    while ( iommu_free_pgtables(dom_io, ctx) == -ERESTART )
         /* nothing */;
     pdev->arch.vtd.pgd_maddr = 0;
 
@@ -2063,6 +2065,7 @@ static int __must_check cf_check intel_iommu_map_page(
     unsigned int *flush_flags)
 {
     struct domain_iommu *hd = dom_iommu(d);
+    struct iommu_context *ctx = iommu_default_context(d);
     struct dma_pte *page, *pte, old, new = {};
     u64 pg_maddr;
     unsigned int level = (IOMMUF_order(flags) / LEVEL_STRIDE) + 1;
@@ -2079,7 +2082,7 @@ static int __must_check cf_check intel_iommu_map_page(
     if ( iommu_hwdom_passthrough && is_hardware_domain(d) )
         return 0;
 
-    spin_lock(&hd->arch.mapping_lock);
+    spin_lock(&ctx->arch.mapping_lock);
 
     /*
      * IOMMU mapping request can be safely ignored when the domain is dying.
@@ -2089,15 +2092,15 @@ static int __must_check cf_check intel_iommu_map_page(
      */
     if ( d->is_dying )
     {
-        spin_unlock(&hd->arch.mapping_lock);
+        spin_unlock(&ctx->arch.mapping_lock);
         return 0;
     }
 
-    pg_maddr = addr_to_dma_page_maddr(d, dfn_to_daddr(dfn), level, flush_flags,
+    pg_maddr = addr_to_dma_page_maddr(d, ctx, dfn_to_daddr(dfn), level, flush_flags,
                                       true);
     if ( pg_maddr < PAGE_SIZE )
     {
-        spin_unlock(&hd->arch.mapping_lock);
+        spin_unlock(&ctx->arch.mapping_lock);
         return -ENOMEM;
     }
 
@@ -2118,7 +2121,7 @@ static int __must_check cf_check intel_iommu_map_page(
 
     if ( !((old.val ^ new.val) & ~DMA_PTE_CONTIG_MASK) )
     {
-        spin_unlock(&hd->arch.mapping_lock);
+        spin_unlock(&ctx->arch.mapping_lock);
         unmap_vtd_domain_page(page);
         return 0;
     }
@@ -2147,7 +2150,7 @@ static int __must_check cf_check intel_iommu_map_page(
         new.val &= ~(LEVEL_MASK << level_to_offset_bits(level));
         dma_set_pte_superpage(new);
 
-        pg_maddr = addr_to_dma_page_maddr(d, dfn_to_daddr(dfn), ++level,
+        pg_maddr = addr_to_dma_page_maddr(d, ctx, dfn_to_daddr(dfn), ++level,
                                           flush_flags, false);
         BUG_ON(pg_maddr < PAGE_SIZE);
 
@@ -2157,11 +2160,11 @@ static int __must_check cf_check intel_iommu_map_page(
         iommu_sync_cache(pte, sizeof(*pte));
 
         *flush_flags |= IOMMU_FLUSHF_modified | IOMMU_FLUSHF_all;
-        iommu_queue_free_pgtable(hd, pg);
+        iommu_queue_free_pgtable(d, ctx, pg);
         perfc_incr(iommu_pt_coalesces);
     }
 
-    spin_unlock(&hd->arch.mapping_lock);
+    spin_unlock(&ctx->arch.mapping_lock);
     unmap_vtd_domain_page(page);
 
     *flush_flags |= IOMMU_FLUSHF_added;
@@ -2170,7 +2173,7 @@ static int __must_check cf_check intel_iommu_map_page(
         *flush_flags |= IOMMU_FLUSHF_modified;
 
         if ( IOMMUF_order(flags) && !dma_pte_superpage(old) )
-            queue_free_pt(hd, maddr_to_mfn(dma_pte_addr(old)),
+            queue_free_pt(d, ctx, maddr_to_mfn(dma_pte_addr(old)),
                           IOMMUF_order(flags) / LEVEL_STRIDE);
     }
 
@@ -2181,6 +2184,7 @@ static int __must_check cf_check intel_iommu_unmap_page(
     struct domain *d, dfn_t dfn, unsigned int order, unsigned int *flush_flags)
 {
     struct domain_iommu *hd = dom_iommu(d);
+    struct iommu_context *ctx = iommu_default_context(d);
     daddr_t addr = dfn_to_daddr(dfn);
     struct dma_pte *page = NULL, *pte = NULL, old;
     uint64_t pg_maddr;
@@ -2200,12 +2204,12 @@ static int __must_check cf_check intel_iommu_unmap_page(
     if ( iommu_hwdom_passthrough && is_hardware_domain(d) )
         return 0;
 
-    spin_lock(&hd->arch.mapping_lock);
+    spin_lock(&ctx->arch.mapping_lock);
     /* get target level pte */
-    pg_maddr = addr_to_dma_page_maddr(d, addr, level, flush_flags, false);
+    pg_maddr = addr_to_dma_page_maddr(d, ctx, addr, level, flush_flags, false);
     if ( pg_maddr < PAGE_SIZE )
     {
-        spin_unlock(&hd->arch.mapping_lock);
+        spin_unlock(&ctx->arch.mapping_lock);
         return pg_maddr ? -ENOMEM : 0;
     }
 
@@ -2214,7 +2218,7 @@ static int __must_check cf_check intel_iommu_unmap_page(
 
     if ( !dma_pte_present(*pte) )
     {
-        spin_unlock(&hd->arch.mapping_lock);
+        spin_unlock(&ctx->arch.mapping_lock);
         unmap_vtd_domain_page(page);
         return 0;
     }
@@ -2232,7 +2236,7 @@ static int __must_check cf_check intel_iommu_unmap_page(
 
         unmap_vtd_domain_page(page);
 
-        pg_maddr = addr_to_dma_page_maddr(d, addr, level, flush_flags, false);
+        pg_maddr = addr_to_dma_page_maddr(d, ctx, addr, level, flush_flags, false);
         BUG_ON(pg_maddr < PAGE_SIZE);
 
         page = map_vtd_domain_page(pg_maddr);
@@ -2241,18 +2245,18 @@ static int __must_check cf_check intel_iommu_unmap_page(
         iommu_sync_cache(pte, sizeof(*pte));
 
         *flush_flags |= IOMMU_FLUSHF_all;
-        iommu_queue_free_pgtable(hd, pg);
+        iommu_queue_free_pgtable(d, ctx, pg);
         perfc_incr(iommu_pt_coalesces);
     }
 
-    spin_unlock(&hd->arch.mapping_lock);
+    spin_unlock(&ctx->arch.mapping_lock);
 
     unmap_vtd_domain_page(page);
 
     *flush_flags |= IOMMU_FLUSHF_modified;
 
     if ( order && !dma_pte_superpage(old) )
-        queue_free_pt(hd, maddr_to_mfn(dma_pte_addr(old)),
+        queue_free_pt(d, ctx, maddr_to_mfn(dma_pte_addr(old)),
                       order / LEVEL_STRIDE);
 
     return 0;
@@ -2261,7 +2265,7 @@ static int __must_check cf_check intel_iommu_unmap_page(
 static int cf_check intel_iommu_lookup_page(
     struct domain *d, dfn_t dfn, mfn_t *mfn, unsigned int *flags)
 {
-    struct domain_iommu *hd = dom_iommu(d);
+    struct iommu_context *ctx = iommu_default_context(d);
     uint64_t val;
 
     /*
@@ -2272,11 +2276,11 @@ static int cf_check intel_iommu_lookup_page(
          (iommu_hwdom_passthrough && is_hardware_domain(d)) )
         return -EOPNOTSUPP;
 
-    spin_lock(&hd->arch.mapping_lock);
+    spin_lock(&ctx->arch.mapping_lock);
 
-    val = addr_to_dma_page_maddr(d, dfn_to_daddr(dfn), 0, NULL, false);
+    val = addr_to_dma_page_maddr(d, ctx, dfn_to_daddr(dfn), 0, NULL, false);
 
-    spin_unlock(&hd->arch.mapping_lock);
+    spin_unlock(&ctx->arch.mapping_lock);
 
     if ( val < PAGE_SIZE )
         return -ENOENT;
@@ -2309,6 +2313,7 @@ static bool __init vtd_ept_page_compatible(const struct vtd_iommu *iommu)
 static int cf_check intel_iommu_add_device(u8 devfn, struct pci_dev *pdev)
 {
     struct acpi_rmrr_unit *rmrr;
+    struct iommu_context *ctx;
     u16 bdf;
     int ret, i;
 
@@ -2317,6 +2322,8 @@ static int cf_check intel_iommu_add_device(u8 devfn, struct pci_dev *pdev)
     if ( !pdev->domain )
         return -EINVAL;
 
+    ctx = iommu_default_context(pdev->domain);
+
     for_each_rmrr_device ( rmrr, bdf, i )
     {
         if ( rmrr->segment == pdev->seg && bdf == PCI_BDF(pdev->bus, devfn) )
@@ -2327,7 +2334,7 @@ static int cf_check intel_iommu_add_device(u8 devfn, struct pci_dev *pdev)
              * Since RMRRs are always reserved in the e820 map for the hardware
              * domain, there shouldn't be a conflict.
              */
-            ret = iommu_identity_mapping(pdev->domain, p2m_access_rw,
+            ret = iommu_identity_mapping(pdev->domain, ctx, p2m_access_rw,
                                          rmrr->base_address, rmrr->end_address,
                                          0);
             if ( ret )
@@ -2336,7 +2343,7 @@ static int cf_check intel_iommu_add_device(u8 devfn, struct pci_dev *pdev)
         }
     }
 
-    ret = domain_context_mapping(pdev->domain, devfn, pdev);
+    ret = domain_context_mapping(pdev->domain, ctx, devfn, pdev);
     if ( ret )
         dprintk(XENLOG_ERR VTDPREFIX, "%pd: context mapping failed\n",
                 pdev->domain);
@@ -2365,10 +2372,13 @@ static int cf_check intel_iommu_remove_device(u8 devfn, struct pci_dev *pdev)
     struct acpi_rmrr_unit *rmrr;
     u16 bdf;
     unsigned int i;
+    struct iommu_context *ctx;
 
     if ( !pdev->domain )
         return -EINVAL;
 
+    ctx = iommu_default_context(pdev->domain);
+
     drhd = domain_context_unmap(pdev->domain, devfn, pdev);
     if ( IS_ERR(drhd) )
         return PTR_ERR(drhd);
@@ -2382,7 +2392,7 @@ static int cf_check intel_iommu_remove_device(u8 devfn, struct pci_dev *pdev)
          * Any flag is nothing to clear these mappings but here
          * its always safe and strict to set 0.
          */
-        iommu_identity_mapping(pdev->domain, p2m_access_x, rmrr->base_address,
+        iommu_identity_mapping(pdev->domain, ctx, p2m_access_x, rmrr->base_address,
                                rmrr->end_address, 0);
     }
 
@@ -2401,7 +2411,9 @@ static int cf_check intel_iommu_remove_device(u8 devfn, struct pci_dev *pdev)
 static int __hwdom_init cf_check setup_hwdom_device(
     u8 devfn, struct pci_dev *pdev)
 {
-    return domain_context_mapping(pdev->domain, devfn, pdev);
+    struct iommu_context *ctx = iommu_default_context(pdev->domain);
+
+    return domain_context_mapping(pdev->domain, ctx, devfn, pdev);
 }
 
 void clear_fault_bits(struct vtd_iommu *iommu)
@@ -2495,7 +2507,7 @@ static int __must_check init_vtd_hw(bool resume)
 
     /*
      * Enable queue invalidation
-     */   
+     */
     for_each_drhd_unit ( drhd )
     {
         iommu = drhd->iommu;
@@ -2516,7 +2528,7 @@ static int __must_check init_vtd_hw(bool resume)
 
     /*
      * Enable interrupt remapping
-     */  
+     */
     if ( iommu_intremap != iommu_intremap_off )
     {
         int apic;
@@ -2573,6 +2585,7 @@ static int __must_check init_vtd_hw(bool resume)
 
 static void __hwdom_init setup_hwdom_rmrr(struct domain *d)
 {
+    struct iommu_context *ctx = iommu_default_context(d);
     struct acpi_rmrr_unit *rmrr;
     u16 bdf;
     int ret, i;
@@ -2586,7 +2599,7 @@ static void __hwdom_init setup_hwdom_rmrr(struct domain *d)
          * domain, there shouldn't be a conflict. So its always safe and
          * strict to set 0.
          */
-        ret = iommu_identity_mapping(d, p2m_access_rw, rmrr->base_address,
+        ret = iommu_identity_mapping(d, ctx, p2m_access_rw, rmrr->base_address,
                                      rmrr->end_address, 0);
         if ( ret )
             dprintk(XENLOG_ERR VTDPREFIX,
@@ -2751,6 +2764,8 @@ static int cf_check reassign_device_ownership(
 
     if ( !QUARANTINE_SKIP(target, pdev->arch.vtd.pgd_maddr) )
     {
+        struct iommu_context *target_ctx = iommu_default_context(target);
+
         if ( !has_arch_pdevs(target) )
             vmx_pi_hooks_assign(target);
 
@@ -2765,7 +2780,7 @@ static int cf_check reassign_device_ownership(
             untrusted_msi = true;
 #endif
 
-        ret = domain_context_mapping(target, devfn, pdev);
+        ret = domain_context_mapping(target, target_ctx, devfn, pdev);
 
         if ( !ret && pdev->devfn == devfn &&
              !QUARANTINE_SKIP(source, pdev->arch.vtd.pgd_maddr) )
@@ -2814,6 +2829,7 @@ static int cf_check reassign_device_ownership(
     if ( !is_hardware_domain(source) )
     {
         const struct acpi_rmrr_unit *rmrr;
+        struct iommu_context *ctx = iommu_default_context(source);
         u16 bdf;
         unsigned int i;
 
@@ -2825,7 +2841,7 @@ static int cf_check reassign_device_ownership(
                  * Any RMRR flag is always ignored when remove a device,
                  * but its always safe and strict to set 0.
                  */
-                ret = iommu_identity_mapping(source, p2m_access_x,
+                ret = iommu_identity_mapping(source, ctx, p2m_access_x,
                                              rmrr->base_address,
                                              rmrr->end_address, 0);
                 if ( ret && ret != -ENOENT )
@@ -2840,6 +2856,7 @@ static int cf_check intel_iommu_assign_device(
     struct domain *d, u8 devfn, struct pci_dev *pdev, u32 flag)
 {
     struct domain *s = pdev->domain;
+    struct iommu_context *ctx = iommu_default_context(d);
     struct acpi_rmrr_unit *rmrr;
     int ret = 0, i;
     u16 bdf, seg;
@@ -2887,7 +2904,7 @@ static int cf_check intel_iommu_assign_device(
     {
         if ( rmrr->segment == seg && bdf == PCI_BDF(bus, devfn) )
         {
-            ret = iommu_identity_mapping(d, p2m_access_rw, rmrr->base_address,
+            ret = iommu_identity_mapping(d, ctx, p2m_access_rw, rmrr->base_address,
                                          rmrr->end_address, flag);
             if ( ret )
             {
@@ -2910,7 +2927,7 @@ static int cf_check intel_iommu_assign_device(
     {
         if ( rmrr->segment == seg && bdf == PCI_BDF(bus, devfn) )
         {
-            int rc = iommu_identity_mapping(d, p2m_access_x,
+            int rc = iommu_identity_mapping(d, ctx, p2m_access_x,
                                             rmrr->base_address,
                                             rmrr->end_address, 0);
 
@@ -3083,10 +3100,11 @@ static void vtd_dump_page_table_level(paddr_t pt_maddr, int level, paddr_t gpa,
 static void cf_check vtd_dump_page_tables(struct domain *d)
 {
     const struct domain_iommu *hd = dom_iommu(d);
+    struct iommu_context *ctx = iommu_default_context(d);
 
     printk(VTDPREFIX" %pd table has %d levels\n", d,
            agaw_to_level(hd->arch.vtd.agaw));
-    vtd_dump_page_table_level(hd->arch.vtd.pgd_maddr,
+    vtd_dump_page_table_level(ctx->arch.vtd.pgd_maddr,
                               agaw_to_level(hd->arch.vtd.agaw), 0, 0);
 }
 
@@ -3094,6 +3112,7 @@ static int fill_qpt(struct dma_pte *this, unsigned int level,
                     struct page_info *pgs[6])
 {
     struct domain_iommu *hd = dom_iommu(dom_io);
+    struct iommu_context *ctx = iommu_default_context(dom_io);
     unsigned int i;
     int rc = 0;
 
@@ -3110,7 +3129,7 @@ static int fill_qpt(struct dma_pte *this, unsigned int level,
                  * page table pages, and the resulting allocations are always
                  * zeroed.
                  */
-                pgs[level] = iommu_alloc_pgtable(hd, 0);
+                pgs[level] = iommu_alloc_pgtable(hd, ctx, 0);
                 if ( !pgs[level] )
                 {
                     rc = -ENOMEM;
@@ -3144,6 +3163,7 @@ static int cf_check intel_iommu_quarantine_init(struct pci_dev *pdev,
                                                 bool scratch_page)
 {
     struct domain_iommu *hd = dom_iommu(dom_io);
+    struct iommu_context *ctx = iommu_default_context(dom_io);
     struct page_info *pg;
     unsigned int agaw = hd->arch.vtd.agaw;
     unsigned int level = agaw_to_level(agaw);
@@ -3154,8 +3174,8 @@ static int cf_check intel_iommu_quarantine_init(struct pci_dev *pdev,
     int rc;
 
     ASSERT(pcidevs_locked());
-    ASSERT(!hd->arch.vtd.pgd_maddr);
-    ASSERT(page_list_empty(&hd->arch.pgtables.list));
+    ASSERT(!ctx->arch.vtd.pgd_maddr);
+    ASSERT(page_list_empty(&ctx->arch.pgtables));
 
     if ( pdev->arch.vtd.pgd_maddr )
     {
@@ -3167,14 +3187,14 @@ static int cf_check intel_iommu_quarantine_init(struct pci_dev *pdev,
     if ( !drhd )
         return -ENODEV;
 
-    pg = iommu_alloc_pgtable(hd, 0);
+    pg = iommu_alloc_pgtable(hd, ctx, 0);
     if ( !pg )
         return -ENOMEM;
 
     rc = context_set_domain_id(NULL, pdev->arch.pseudo_domid, drhd->iommu);
 
     /* Transiently install the root into DomIO, for iommu_identity_mapping(). */
-    hd->arch.vtd.pgd_maddr = page_to_maddr(pg);
+    ctx->arch.vtd.pgd_maddr = page_to_maddr(pg);
 
     for_each_rmrr_device ( rmrr, bdf, i )
     {
@@ -3185,7 +3205,7 @@ static int cf_check intel_iommu_quarantine_init(struct pci_dev *pdev,
         {
             rmrr_found = true;
 
-            rc = iommu_identity_mapping(dom_io, p2m_access_rw,
+            rc = iommu_identity_mapping(dom_io, ctx, p2m_access_rw,
                                         rmrr->base_address, rmrr->end_address,
                                         0);
             if ( rc )
@@ -3195,8 +3215,8 @@ static int cf_check intel_iommu_quarantine_init(struct pci_dev *pdev,
         }
     }
 
-    iommu_identity_map_teardown(dom_io);
-    hd->arch.vtd.pgd_maddr = 0;
+    iommu_identity_map_teardown(dom_io, ctx);
+    ctx->arch.vtd.pgd_maddr = 0;
     pdev->arch.vtd.pgd_maddr = page_to_maddr(pg);
 
     if ( !rc && scratch_page )
@@ -3211,7 +3231,7 @@ static int cf_check intel_iommu_quarantine_init(struct pci_dev *pdev,
         pdev->arch.leaf_mfn = page_to_mfn(pgs[0]);
     }
 
-    page_list_move(&pdev->arch.pgtables_list, &hd->arch.pgtables.list);
+    page_list_move(&pdev->arch.pgtables_list, &ctx->arch.pgtables);
 
     if ( rc || (!scratch_page && !rmrr_found) )
         quarantine_teardown(pdev, drhd);
diff --git a/xen/drivers/passthrough/vtd/quirks.c b/xen/drivers/passthrough/vtd/quirks.c
index 0a10a46d90..195fc5c08f 100644
--- a/xen/drivers/passthrough/vtd/quirks.c
+++ b/xen/drivers/passthrough/vtd/quirks.c
@@ -423,7 +423,8 @@ static int __must_check map_me_phantom_function(struct domain *domain,
 
     /* map or unmap ME phantom function */
     if ( !(mode & UNMAP_ME_PHANTOM_FUNC) )
-        rc = domain_context_mapping_one(domain, drhd->iommu, 0,
+        rc = domain_context_mapping_one(domain, iommu_default_context(domain),
+                                        drhd->iommu, 0,
                                         PCI_DEVFN(dev, 7), NULL,
                                         domid, pgd_maddr, mode);
     else
diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/x86/iommu.c
index 0954cc4922..3bc8aa3e09 100644
--- a/xen/drivers/passthrough/x86/iommu.c
+++ b/xen/drivers/passthrough/x86/iommu.c
@@ -19,6 +19,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -185,26 +186,31 @@ void __hwdom_init arch_iommu_check_autotranslated_hwdom(struct domain *d)
 
 int arch_iommu_domain_init(struct domain *d)
 {
-    struct domain_iommu *hd = dom_iommu(d);
+    INIT_PAGE_LIST_HEAD(&dom_iommu(d)->arch.free_queue);
+    return 0;
+}
 
-    spin_lock_init(&hd->arch.mapping_lock);
+int arch_iommu_context_init(struct domain *d, struct iommu_context *ctx, u32 flags)
+{
+    spin_lock_init(&ctx->arch.mapping_lock);
 
-    INIT_PAGE_LIST_HEAD(&hd->arch.pgtables.list);
-    spin_lock_init(&hd->arch.pgtables.lock);
-    INIT_LIST_HEAD(&hd->arch.identity_maps);
+    INIT_PAGE_LIST_HEAD(&ctx->arch.pgtables);
+    INIT_LIST_HEAD(&ctx->arch.identity_maps);
+
+    return 0;
+}
+
+int arch_iommu_context_teardown(struct domain *d, struct iommu_context *ctx, u32 flags)
+{
+    /* Cleanup all page tables */
+    while ( iommu_free_pgtables(d, ctx) == -ERESTART )
+        /* nothing */;
 
     return 0;
 }
 
 void arch_iommu_domain_destroy(struct domain *d)
 {
-    /*
-     * There should be not page-tables left allocated by the time the
-     * domain is destroyed. Note that arch_iommu_domain_destroy() is
-     * called unconditionally, so pgtables may be uninitialized.
-     */
-    ASSERT(!dom_iommu(d)->platform_ops ||
-           page_list_empty(&dom_iommu(d)->arch.pgtables.list));
 }
 
 struct identity_map {
@@ -214,14 +220,13 @@ struct identity_map {
     unsigned int count;
 };
 
-int iommu_identity_mapping(struct domain *d, p2m_access_t p2ma,
-                           paddr_t base, paddr_t end,
+int iommu_identity_mapping(struct domain *d, struct iommu_context *ctx,
+                           p2m_access_t p2ma, paddr_t base, paddr_t end,
                            unsigned int flag)
 {
     unsigned long base_pfn = base >> PAGE_SHIFT_4K;
     unsigned long end_pfn = PAGE_ALIGN_4K(end) >> PAGE_SHIFT_4K;
     struct identity_map *map;
-    struct domain_iommu *hd = dom_iommu(d);
 
     ASSERT(pcidevs_locked());
     ASSERT(base < end);
@@ -230,7 +235,7 @@ int iommu_identity_mapping(struct domain *d, p2m_access_t p2ma,
      * No need to acquire hd->arch.mapping_lock: Both insertion and removal
      * get done while holding pcidevs_lock.
      */
-    list_for_each_entry( map, &hd->arch.identity_maps, list )
+    list_for_each_entry( map, &ctx->arch.identity_maps, list )
     {
         if ( map->base == base && map->end == end )
         {
@@ -280,7 +285,7 @@ int iommu_identity_mapping(struct domain *d, p2m_access_t p2ma,
      * Insert into list ahead of mapping, so the range can be found when
      * trying to clean up.
      */
-    list_add_tail(&map->list, &hd->arch.identity_maps);
+    list_add_tail(&map->list, &ctx->arch.identity_maps);
 
     for ( ; base_pfn < end_pfn; ++base_pfn )
     {
@@ -300,12 +305,11 @@ int iommu_identity_mapping(struct domain *d, p2m_access_t p2ma,
     return 0;
 }
 
-void iommu_identity_map_teardown(struct domain *d)
+void iommu_identity_map_teardown(struct domain *d, struct iommu_context *ctx)
 {
-    struct domain_iommu *hd = dom_iommu(d);
     struct identity_map *map, *tmp;
 
-    list_for_each_entry_safe ( map, tmp, &hd->arch.identity_maps, list )
+    list_for_each_entry_safe ( map, tmp, &ctx->arch.identity_maps, list )
     {
         list_del(&map->list);
         xfree(map);
@@ -582,7 +586,7 @@ void iommu_free_domid(domid_t domid, unsigned long *map)
         BUG();
 }
 
-int iommu_free_pgtables(struct domain *d)
+int iommu_free_pgtables(struct domain *d, struct iommu_context *ctx)
 {
     struct domain_iommu *hd = dom_iommu(d);
     struct page_info *pg;
@@ -592,7 +596,7 @@ int iommu_free_pgtables(struct domain *d)
         return 0;
 
     /* After this barrier, no new IOMMU mappings can be inserted. */
-    spin_barrier(&hd->arch.mapping_lock);
+    spin_barrier(&ctx->arch.mapping_lock);
 
     /*
      * Pages will be moved to the free list below. So we want to
@@ -600,7 +604,7 @@ int iommu_free_pgtables(struct domain *d)
      */
     iommu_vcall(hd->platform_ops, clear_root_pgtable, d);
 
-    while ( (pg = page_list_remove_head(&hd->arch.pgtables.list)) )
+    while ( (pg = page_list_remove_head(&ctx->arch.pgtables)) )
     {
         free_domheap_page(pg);
 
@@ -612,6 +616,7 @@ int iommu_free_pgtables(struct domain *d)
 }
 
 struct page_info *iommu_alloc_pgtable(struct domain_iommu *hd,
+                                      struct iommu_context *ctx,
                                       uint64_t contig_mask)
 {
     unsigned int memflags = 0;
@@ -656,9 +661,7 @@ struct page_info *iommu_alloc_pgtable(struct domain_iommu *hd,
 
     unmap_domain_page(p);
 
-    spin_lock(&hd->arch.pgtables.lock);
-    page_list_add(pg, &hd->arch.pgtables.list);
-    spin_unlock(&hd->arch.pgtables.lock);
+    page_list_add(pg, &ctx->arch.pgtables);
 
     return pg;
 }
@@ -697,13 +700,12 @@ static void cf_check free_queued_pgtables(void *arg)
     }
 }
 
-void iommu_queue_free_pgtable(struct domain_iommu *hd, struct page_info *pg)
+void iommu_queue_free_pgtable(struct domain *d, struct iommu_context *ctx,
+                              struct page_info *pg)
 {
     unsigned int cpu = smp_processor_id();
 
-    spin_lock(&hd->arch.pgtables.lock);
-    page_list_del(pg, &hd->arch.pgtables.list);
-    spin_unlock(&hd->arch.pgtables.lock);
+    page_list_del(pg, &ctx->arch.pgtables);
 
     page_list_add_tail(pg, &per_cpu(free_pgt_list, cpu));
 
diff --git a/xen/include/xen/iommu.h b/xen/include/xen/iommu.h
index 37c4a1dc82..91f106968e 100644
--- a/xen/include/xen/iommu.h
+++ b/xen/include/xen/iommu.h
@@ -416,9 +416,18 @@ extern int iommu_get_extra_reserved_device_memory(iommu_grdm_t *func,
 # define iommu_vcall iommu_call
 #endif
 
+struct iommu_context {
+    #ifdef CONFIG_HAS_PASSTHROUGH
+    u16 id; /* Context id (0 means default context) */
+
+    struct arch_iommu_context arch;
+    #endif
+};
+
 struct domain_iommu {
 #ifdef CONFIG_HAS_PASSTHROUGH
     struct arch_iommu arch;
+    struct iommu_context default_ctx;
 #endif
 
     /* iommu_ops */
@@ -453,6 +462,7 @@ struct domain_iommu {
 #define dom_iommu(d)              (&(d)->iommu)
 #define iommu_set_feature(d, f)   set_bit(f, dom_iommu(d)->features)
 #define iommu_clear_feature(d, f) clear_bit(f, dom_iommu(d)->features)
+#define iommu_default_context(d) (&dom_iommu(d)->default_ctx) /* does not lock ! */
 
 #ifdef CONFIG_HAS_PASSTHROUGH
 /* Are we using the domain P2M table as its IOMMU pagetable? */
-- 
2.51.2



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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From: "Teddy Astie" 
Subject: =?utf-8?Q?[RFC=20PATCH=20v7=2005/14]=20iommu:=20Simplify=20quarantine=20logic?=
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To: xen-devel@lists.xenproject.org
Cc: "Teddy Astie" , "Jan Beulich" , "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Jason Andryuk" 
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Date: Thu, 20 Nov 2025 11:09:55 +0000
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Current quarantine code is very hard to change and is very
complicated, remove most bits of it and replace it with direct
reassignement to dom_io domain instead.

Signed-off-by: Teddy Astie 
---
A idea would be to rework this feature using the new reworked
IOMMU subsystem.
---
 xen/arch/x86/include/asm/pci.h              |  17 --
 xen/drivers/passthrough/amd/iommu_map.c     | 129 +---------
 xen/drivers/passthrough/amd/pci_amd_iommu.c |  51 +---
 xen/drivers/passthrough/pci.c               |   7 +-
 xen/drivers/passthrough/vtd/iommu.c         | 253 ++------------------
 xen/drivers/passthrough/x86/iommu.c         |   1 -
 6 files changed, 29 insertions(+), 429 deletions(-)

diff --git a/xen/arch/x86/include/asm/pci.h b/xen/arch/x86/include/asm/pci.h
index 0b98081aea..c64dd13452 100644
--- a/xen/arch/x86/include/asm/pci.h
+++ b/xen/arch/x86/include/asm/pci.h
@@ -17,23 +17,6 @@ struct pci_dev;
 
 struct arch_pci_dev {
     vmask_t used_vectors;
-    /*
-     * These fields are (de)initialized under pcidevs-lock. Other uses of
-     * them don't race (de)initialization and hence don't strictly need any
-     * locking.
-     */
-    union {
-        /* Subset of struct arch_iommu's fields, to be used in dom_io. */
-        struct {
-            uint64_t pgd_maddr;
-        } vtd;
-        struct {
-            struct page_info *root_table;
-        } amd;
-    };
-    domid_t pseudo_domid;
-    mfn_t leaf_mfn;
-    struct page_list_head pgtables_list;
 };
 
 int pci_conf_write_intercept(unsigned int seg, unsigned int bdf,
diff --git a/xen/drivers/passthrough/amd/iommu_map.c b/xen/drivers/passthrough/amd/iommu_map.c
index 81a63cce8e..42827c7dc7 100644
--- a/xen/drivers/passthrough/amd/iommu_map.c
+++ b/xen/drivers/passthrough/amd/iommu_map.c
@@ -656,9 +656,6 @@ int amd_iommu_reserve_domain_unity_map(struct domain *d, struct iommu_context *c
 {
     int rc;
 
-    if ( d == dom_io )
-        return 0;
-
     for ( rc = 0; !rc && map; map = map->next )
     {
         p2m_access_t p2ma = p2m_access_n;
@@ -680,9 +677,6 @@ int amd_iommu_reserve_domain_unity_unmap(struct domain *d, struct iommu_context
 {
     int rc;
 
-    if ( d == dom_io )
-        return 0;
-
     for ( rc = 0; map; map = map->next )
     {
         int ret = iommu_identity_mapping(d, ctx, p2m_access_x, map->addr,
@@ -771,134 +765,15 @@ int cf_check amd_iommu_get_reserved_device_memory(
     return 0;
 }
 
-static int fill_qpt(union amd_iommu_pte *this, unsigned int level,
-                    struct page_info *pgs[IOMMU_MAX_PT_LEVELS])
-{
-    struct domain_iommu *hd = dom_iommu(dom_io);
-    struct iommu_context *ctx = iommu_default_context(dom_io);
-    unsigned int i;
-    int rc = 0;
-
-    for ( i = 0; !rc && i < PTE_PER_TABLE_SIZE; ++i )
-    {
-        union amd_iommu_pte *pte = &this[i], *next;
-
-        if ( !pte->pr )
-        {
-            if ( !pgs[level] )
-            {
-                /*
-                 * The pgtable allocator is fine for the leaf page, as well as
-                 * page table pages, and the resulting allocations are always
-                 * zeroed.
-                 */
-                pgs[level] = iommu_alloc_pgtable(hd, ctx, 0);
-                if ( !pgs[level] )
-                {
-                    rc = -ENOMEM;
-                    break;
-                }
-
-                if ( level )
-                {
-                    next = __map_domain_page(pgs[level]);
-                    rc = fill_qpt(next, level - 1, pgs);
-                    unmap_domain_page(next);
-                }
-            }
-
-            /*
-             * PDEs are essentially a subset of PTEs, so this function
-             * is fine to use even at the leaf.
-             */
-            set_iommu_pde_present(pte, mfn_x(page_to_mfn(pgs[level])), level,
-                                  true, true);
-        }
-        else if ( level && pte->next_level )
-        {
-            next = map_domain_page(_mfn(pte->mfn));
-            rc = fill_qpt(next, level - 1, pgs);
-            unmap_domain_page(next);
-        }
-    }
-
-    return rc;
-}
-
 int cf_check amd_iommu_quarantine_init(struct pci_dev *pdev, bool scratch_page)
 {
-    struct domain_iommu *hd = dom_iommu(dom_io);
-    struct iommu_context *ctx = iommu_default_context(dom_io);
-    unsigned int level = ctx->arch.amd.paging_mode;
-    unsigned int req_id = get_dma_requestor_id(pdev->seg, pdev->sbdf.bdf);
-    const struct ivrs_mappings *ivrs_mappings = get_ivrs_mappings(pdev->seg);
-    int rc;
+    amd_iommu_quarantine_teardown(pdev);
 
-    ASSERT(pcidevs_locked());
-    ASSERT(!ctx->arch.amd.root_table);
-    ASSERT(page_list_empty(&ctx->arch.pgtables));
-
-    if ( !scratch_page && !ivrs_mappings[req_id].unity_map )
-        return 0;
-
-    ASSERT(pdev->arch.pseudo_domid != DOMID_INVALID);
-
-    if ( pdev->arch.amd.root_table )
-    {
-        clear_domain_page(pdev->arch.leaf_mfn);
-        return 0;
-    }
-
-    pdev->arch.amd.root_table = iommu_alloc_pgtable(hd, ctx, 0);
-    if ( !pdev->arch.amd.root_table )
-        return -ENOMEM;
-
-    /* Transiently install the root into DomIO, for iommu_identity_mapping(). */
-    ctx->arch.amd.root_table = pdev->arch.amd.root_table;
-
-    rc = amd_iommu_reserve_domain_unity_map(dom_io, ctx,
-                                            ivrs_mappings[req_id].unity_map,
-                                            0);
-
-    iommu_identity_map_teardown(dom_io, ctx);
-    ctx->arch.amd.root_table = NULL;
-
-    if ( rc )
-        AMD_IOMMU_WARN("%pp: quarantine unity mapping failed\n", &pdev->sbdf);
-    else if ( scratch_page )
-    {
-        union amd_iommu_pte *root;
-        struct page_info *pgs[IOMMU_MAX_PT_LEVELS] = {};
-
-        root = __map_domain_page(pdev->arch.amd.root_table);
-        rc = fill_qpt(root, level - 1, pgs);
-        unmap_domain_page(root);
-
-        pdev->arch.leaf_mfn = page_to_mfn(pgs[0]);
-    }
-
-    page_list_move(&pdev->arch.pgtables_list, &ctx->arch.pgtables);
-
-    if ( rc )
-        amd_iommu_quarantine_teardown(pdev);
-
-    return rc;
+    return 0;
 }
 
 void amd_iommu_quarantine_teardown(struct pci_dev *pdev)
 {
-    struct iommu_context *ctx = iommu_default_context(dom_io);
-
-    ASSERT(pcidevs_locked());
-
-    if ( !pdev->arch.amd.root_table )
-        return;
-
-    ASSERT(page_list_empty(&ctx->arch.pgtables));
-    page_list_move(&ctx->arch.pgtables, &pdev->arch.pgtables_list);
-    while ( iommu_free_pgtables(dom_io, ctx) == -ERESTART )
-        /* nothing */;
-    pdev->arch.amd.root_table = NULL;
 }
 
 /*
diff --git a/xen/drivers/passthrough/amd/pci_amd_iommu.c b/xen/drivers/passthrough/amd/pci_amd_iommu.c
index 964f6b47db..c871660661 100644
--- a/xen/drivers/passthrough/amd/pci_amd_iommu.c
+++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c
@@ -138,9 +138,6 @@ static int __must_check amd_iommu_setup_domain_device(
     const struct page_info *root_pg;
     domid_t domid;
 
-    if ( QUARANTINE_SKIP(domain, pdev) )
-        return 0;
-
     BUG_ON(!ctx->arch.amd.paging_mode || !iommu->dev_table.buffer);
 
     rc = allocate_domain_resources(domain);
@@ -159,16 +156,8 @@ static int __must_check amd_iommu_setup_domain_device(
     dte = &table[req_id];
     ivrs_dev = &get_ivrs_mappings(iommu->sbdf.seg)[req_id];
 
-    if ( domain != dom_io )
-    {
-        root_pg = ctx->arch.amd.root_table;
-        domid = domain->domain_id;
-    }
-    else
-    {
-        root_pg = pdev->arch.amd.root_table;
-        domid = pdev->arch.pseudo_domid;
-    }
+    root_pg = ctx->arch.amd.root_table;
+    domid = domain->domain_id;
 
     spin_lock_irqsave(&iommu->lock, flags);
 
@@ -414,9 +403,6 @@ static void amd_iommu_disable_domain_device(const struct domain *domain,
     int req_id;
     u8 bus = pdev->bus;
 
-    if ( QUARANTINE_SKIP(domain, pdev) )
-        return;
-
     ASSERT(pcidevs_locked());
 
     if ( pci_ats_device(iommu->sbdf.seg, bus, pdev->devfn) &&
@@ -479,14 +465,9 @@ static int cf_check reassign_device(
         return -ENODEV;
     }
 
-    if ( !QUARANTINE_SKIP(target, pdev) )
-    {
-        rc = amd_iommu_setup_domain_device(target, target_ctx, iommu, devfn, pdev);
-        if ( rc )
-            return rc;
-    }
-    else
-        amd_iommu_disable_domain_device(source, iommu, devfn, pdev);
+    rc = amd_iommu_setup_domain_device(target, target_ctx, iommu, devfn, pdev);
+    if ( rc )
+        return rc;
 
     if ( devfn == pdev->devfn && pdev->domain != target )
     {
@@ -579,8 +560,6 @@ static int cf_check amd_iommu_add_device(u8 devfn, struct pci_dev *pdev)
     struct iommu_context *ctx;
     u16 bdf;
     struct ivrs_mappings *ivrs_mappings;
-    bool fresh_domid = false;
-    int ret;
 
     if ( !pdev->domain )
         return -EINVAL;
@@ -649,22 +628,7 @@ static int cf_check amd_iommu_add_device(u8 devfn, struct pci_dev *pdev)
         AMD_IOMMU_WARN("%pd: unity mapping failed for %pp\n",
                        pdev->domain, &PCI_SBDF(pdev->seg, bdf));
 
-    if ( iommu_quarantine && pdev->arch.pseudo_domid == DOMID_INVALID )
-    {
-        pdev->arch.pseudo_domid = iommu_alloc_domid(iommu->domid_map);
-        if ( pdev->arch.pseudo_domid == DOMID_INVALID )
-            return -ENOSPC;
-        fresh_domid = true;
-    }
-
-    ret = amd_iommu_setup_domain_device(pdev->domain, ctx, iommu, devfn, pdev);
-    if ( ret && fresh_domid )
-    {
-        iommu_free_domid(pdev->arch.pseudo_domid, iommu->domid_map);
-        pdev->arch.pseudo_domid = DOMID_INVALID;
-    }
-
-    return ret;
+    return amd_iommu_setup_domain_device(pdev->domain, ctx, iommu, devfn, pdev);
 }
 
 static int cf_check amd_iommu_remove_device(u8 devfn, struct pci_dev *pdev)
@@ -700,9 +664,6 @@ static int cf_check amd_iommu_remove_device(u8 devfn, struct pci_dev *pdev)
 
     amd_iommu_quarantine_teardown(pdev);
 
-    iommu_free_domid(pdev->arch.pseudo_domid, iommu->domid_map);
-    pdev->arch.pseudo_domid = DOMID_INVALID;
-
     if ( amd_iommu_perdev_intremap &&
          ivrs_mappings[bdf].dte_requestor_id == bdf &&
          ivrs_mappings[bdf].intremap_table )
diff --git a/xen/drivers/passthrough/pci.c b/xen/drivers/passthrough/pci.c
index 52c22fa50c..ee73d55740 100644
--- a/xen/drivers/passthrough/pci.c
+++ b/xen/drivers/passthrough/pci.c
@@ -1371,12 +1371,7 @@ static int cf_check _dump_pci_devices(struct pci_seg *pseg, void *arg)
     list_for_each_entry ( pdev, &pseg->alldevs_list, alldevs_list )
     {
         printk("%pp - ", &pdev->sbdf);
-#ifdef CONFIG_X86
-        if ( pdev->domain == dom_io )
-            printk("DomIO:%x", pdev->arch.pseudo_domid);
-        else
-#endif
-            printk("%pd", pdev->domain);
+        printk("%pd", pdev->domain);
         printk(" - node %-3d", (pdev->node != NUMA_NO_NODE) ? pdev->node : -1);
         pdev_dump_msi(pdev);
         printk("\n");
diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c
index 9252c3e0f3..f269fca9bf 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -49,14 +49,6 @@
 #define CONTIG_MASK DMA_PTE_CONTIG_MASK
 #include 
 
-/* dom_io is used as a sentinel for quarantined devices */
-#define QUARANTINE_SKIP(d, pgd_maddr) ((d) == dom_io && !(pgd_maddr))
-#define DEVICE_DOMID(d, pdev) ((d) != dom_io ? (d)->domain_id \
-                                             : (pdev)->arch.pseudo_domid)
-#define DEVICE_PGTABLE(d, pdev) ((d) != dom_io \
-                                 ? iommu_default_context(d)->arch.vtd.pgd_maddr \
-                                 : (pdev)->arch.vtd.pgd_maddr)
-
 bool __read_mostly iommu_igfx = true;
 bool __read_mostly iommu_qinval = true;
 #ifndef iommu_snoop
@@ -1495,8 +1487,6 @@ int domain_context_mapping_one(
     int rc, ret;
     bool flush_dev_iotlb;
 
-    if ( QUARANTINE_SKIP(domain, pgd_maddr) )
-        return 0;
 
     ASSERT(pcidevs_locked());
     spin_lock(&iommu->lock);
@@ -1518,8 +1508,6 @@ int domain_context_mapping_one(
         domid = did_to_domain_id(iommu, prev_did);
         if ( domid < DOMID_FIRST_RESERVED )
             prev_dom = rcu_lock_domain_by_id(domid);
-        else if ( pdev ? domid == pdev->arch.pseudo_domid : domid > DOMID_MASK )
-            prev_dom = rcu_lock_domain(dom_io);
         if ( !prev_dom )
         {
             spin_unlock(&iommu->lock);
@@ -1651,8 +1639,8 @@ int domain_context_mapping_one(
             ret = domain_context_unmap_one(domain, iommu, bus, devfn);
         else
             ret = domain_context_mapping_one(prev_dom, ctx, iommu, bus, devfn, pdev,
-                                             DEVICE_DOMID(prev_dom, pdev),
-                                             DEVICE_PGTABLE(prev_dom, pdev),
+                                             prev_dom->domain_id,
+                                             iommu_default_context(prev_dom)->arch.vtd.pgd_maddr,
                                              (mode & MAP_WITH_RMRR) |
                                              MAP_ERROR_RECOVERY) < 0;
 
@@ -1674,8 +1662,8 @@ static int domain_context_mapping(struct domain *domain, struct iommu_context *c
 {
     const struct acpi_drhd_unit *drhd = acpi_find_matched_drhd_unit(pdev);
     const struct acpi_rmrr_unit *rmrr;
-    paddr_t pgd_maddr = DEVICE_PGTABLE(domain, pdev);
-    domid_t orig_domid = pdev->arch.pseudo_domid;
+    paddr_t pgd_maddr = ctx->arch.vtd.pgd_maddr;
+    domid_t did = domain->domain_id;
     int ret = 0;
     unsigned int i, mode = 0;
     uint16_t seg = pdev->seg, bdf;
@@ -1728,20 +1716,11 @@ static int domain_context_mapping(struct domain *domain, struct iommu_context *c
         if ( !drhd )
             return -ENODEV;
 
-        if ( iommu_quarantine && orig_domid == DOMID_INVALID )
-        {
-            pdev->arch.pseudo_domid =
-                iommu_alloc_domid(drhd->iommu->pseudo_domid_map);
-            if ( pdev->arch.pseudo_domid == DOMID_INVALID )
-                return -ENOSPC;
-        }
-
         if ( iommu_debug )
             printk(VTDPREFIX "%pd:PCIe: map %pp\n",
                    domain, &PCI_SBDF(seg, bus, devfn));
         ret = domain_context_mapping_one(domain, ctx, drhd->iommu, bus, devfn, pdev,
-                                         DEVICE_DOMID(domain, pdev), pgd_maddr,
-                                         mode);
+                                         did, pgd_maddr, mode);
         if ( ret > 0 )
             ret = 0;
         if ( !ret && devfn == pdev->devfn && ats_device(pdev, drhd) > 0 )
@@ -1753,21 +1732,12 @@ static int domain_context_mapping(struct domain *domain, struct iommu_context *c
         if ( !drhd )
             return -ENODEV;
 
-        if ( iommu_quarantine && orig_domid == DOMID_INVALID )
-        {
-            pdev->arch.pseudo_domid =
-                iommu_alloc_domid(drhd->iommu->pseudo_domid_map);
-            if ( pdev->arch.pseudo_domid == DOMID_INVALID )
-                return -ENOSPC;
-        }
-
         if ( iommu_debug )
             printk(VTDPREFIX "%pd:PCI: map %pp\n",
                    domain, &PCI_SBDF(seg, bus, devfn));
 
         ret = domain_context_mapping_one(domain, ctx, drhd->iommu, bus, devfn,
-                                         pdev, DEVICE_DOMID(domain, pdev),
-                                         pgd_maddr, mode);
+                                         pdev, did, pgd_maddr, mode);
         if ( ret < 0 )
             break;
         prev_present = ret;
@@ -1797,8 +1767,7 @@ static int domain_context_mapping(struct domain *domain, struct iommu_context *c
          */
         if ( ret >= 0 )
             ret = domain_context_mapping_one(domain, ctx, drhd->iommu, bus, devfn,
-                                             NULL, DEVICE_DOMID(domain, pdev),
-                                             pgd_maddr, mode);
+                                             NULL, did, pgd_maddr, mode);
 
         /*
          * Devices behind PCIe-to-PCI/PCIx bridge may generate different
@@ -1813,8 +1782,7 @@ static int domain_context_mapping(struct domain *domain, struct iommu_context *c
         if ( !ret && pdev_type(seg, bus, devfn) == DEV_TYPE_PCIe2PCI_BRIDGE &&
              (secbus != pdev->bus || pdev->devfn != 0) )
             ret = domain_context_mapping_one(domain, ctx, drhd->iommu, secbus, 0,
-                                             NULL, DEVICE_DOMID(domain, pdev),
-                                             pgd_maddr, mode);
+                                             NULL, did, pgd_maddr, mode);
 
         if ( ret )
         {
@@ -1836,13 +1804,6 @@ static int domain_context_mapping(struct domain *domain, struct iommu_context *c
     if ( !ret && devfn == pdev->devfn )
         pci_vtd_quirk(pdev);
 
-    if ( ret && drhd && orig_domid == DOMID_INVALID )
-    {
-        iommu_free_domid(pdev->arch.pseudo_domid,
-                         drhd->iommu->pseudo_domid_map);
-        pdev->arch.pseudo_domid = DOMID_INVALID;
-    }
-
     return ret;
 }
 
@@ -2006,10 +1967,6 @@ static const struct acpi_drhd_unit *domain_context_unmap(
         return ERR_PTR(-EINVAL);
     }
 
-    if ( !ret && pdev->devfn == devfn &&
-         !QUARANTINE_SKIP(domain, pdev->arch.vtd.pgd_maddr) )
-        check_cleanup_domid_map(domain, pdev, iommu);
-
     return drhd;
 }
 
@@ -2043,21 +2000,6 @@ static void cf_check iommu_domain_teardown(struct domain *d)
 static void quarantine_teardown(struct pci_dev *pdev,
                                 const struct acpi_drhd_unit *drhd)
 {
-    struct iommu_context *ctx = iommu_default_context(dom_io);
-
-    ASSERT(pcidevs_locked());
-
-    if ( !pdev->arch.vtd.pgd_maddr )
-        return;
-
-    ASSERT(page_list_empty(&ctx->arch.pgtables));
-    page_list_move(&ctx->arch.pgtables, &pdev->arch.pgtables_list);
-    while ( iommu_free_pgtables(dom_io, ctx) == -ERESTART )
-        /* nothing */;
-    pdev->arch.vtd.pgd_maddr = 0;
-
-    if ( drhd )
-        cleanup_domid_map(pdev->arch.pseudo_domid, drhd->iommu);
 }
 
 static int __must_check cf_check intel_iommu_map_page(
@@ -2398,13 +2340,6 @@ static int cf_check intel_iommu_remove_device(u8 devfn, struct pci_dev *pdev)
 
     quarantine_teardown(pdev, drhd);
 
-    if ( drhd )
-    {
-        iommu_free_domid(pdev->arch.pseudo_domid,
-                         drhd->iommu->pseudo_domid_map);
-        pdev->arch.pseudo_domid = DOMID_INVALID;
-    }
-
     return 0;
 }
 
@@ -2762,42 +2697,22 @@ static int cf_check reassign_device_ownership(
 {
     int ret;
 
-    if ( !QUARANTINE_SKIP(target, pdev->arch.vtd.pgd_maddr) )
-    {
-        struct iommu_context *target_ctx = iommu_default_context(target);
-
-        if ( !has_arch_pdevs(target) )
-            vmx_pi_hooks_assign(target);
+    if ( !has_arch_pdevs(target) )
+        vmx_pi_hooks_assign(target);
 
 #ifdef CONFIG_PV
-        /*
-         * Devices assigned to untrusted domains (here assumed to be any domU)
-         * can attempt to send arbitrary LAPIC/MSI messages. We are unprotected
-         * by the root complex unless interrupt remapping is enabled.
-         */
-        if ( !iommu_intremap && !is_hardware_domain(target) &&
-             !is_system_domain(target) )
-            untrusted_msi = true;
+    /*
+        * Devices assigned to untrusted domains (here assumed to be any domU)
+        * can attempt to send arbitrary LAPIC/MSI messages. We are unprotected
+        * by the root complex unless interrupt remapping is enabled.
+        */
+    if ( !iommu_intremap && !is_hardware_domain(target) &&
+            !is_system_domain(target) )
+        untrusted_msi = true;
 #endif
 
-        ret = domain_context_mapping(target, target_ctx, devfn, pdev);
-
-        if ( !ret && pdev->devfn == devfn &&
-             !QUARANTINE_SKIP(source, pdev->arch.vtd.pgd_maddr) )
-        {
-            const struct acpi_drhd_unit *drhd = acpi_find_matched_drhd_unit(pdev);
+    ret = domain_context_mapping(target, iommu_default_context(target), devfn, pdev);
 
-            if ( drhd )
-                check_cleanup_domid_map(source, pdev, drhd->iommu);
-        }
-    }
-    else
-    {
-        const struct acpi_drhd_unit *drhd;
-
-        drhd = domain_context_unmap(source, devfn, pdev);
-        ret = IS_ERR(drhd) ? PTR_ERR(drhd) : 0;
-    }
     if ( ret )
     {
         if ( !has_arch_pdevs(target) )
@@ -2896,9 +2811,6 @@ static int cf_check intel_iommu_assign_device(
         }
     }
 
-    if ( d == dom_io )
-        return reassign_device_ownership(s, d, devfn, pdev);
-
     /* Setup rmrr identity mapping */
     for_each_rmrr_device( rmrr, bdf, i )
     {
@@ -3108,135 +3020,10 @@ static void cf_check vtd_dump_page_tables(struct domain *d)
                               agaw_to_level(hd->arch.vtd.agaw), 0, 0);
 }
 
-static int fill_qpt(struct dma_pte *this, unsigned int level,
-                    struct page_info *pgs[6])
-{
-    struct domain_iommu *hd = dom_iommu(dom_io);
-    struct iommu_context *ctx = iommu_default_context(dom_io);
-    unsigned int i;
-    int rc = 0;
-
-    for ( i = 0; !rc && i < PTE_NUM; ++i )
-    {
-        struct dma_pte *pte = &this[i], *next;
-
-        if ( !dma_pte_present(*pte) )
-        {
-            if ( !pgs[level] )
-            {
-                /*
-                 * The pgtable allocator is fine for the leaf page, as well as
-                 * page table pages, and the resulting allocations are always
-                 * zeroed.
-                 */
-                pgs[level] = iommu_alloc_pgtable(hd, ctx, 0);
-                if ( !pgs[level] )
-                {
-                    rc = -ENOMEM;
-                    break;
-                }
-
-                if ( level )
-                {
-                    next = map_vtd_domain_page(page_to_maddr(pgs[level]));
-                    rc = fill_qpt(next, level - 1, pgs);
-                    unmap_vtd_domain_page(next);
-                }
-            }
-
-            dma_set_pte_addr(*pte, page_to_maddr(pgs[level]));
-            dma_set_pte_readable(*pte);
-            dma_set_pte_writable(*pte);
-        }
-        else if ( level && !dma_pte_superpage(*pte) )
-        {
-            next = map_vtd_domain_page(dma_pte_addr(*pte));
-            rc = fill_qpt(next, level - 1, pgs);
-            unmap_vtd_domain_page(next);
-        }
-    }
-
-    return rc;
-}
-
 static int cf_check intel_iommu_quarantine_init(struct pci_dev *pdev,
                                                 bool scratch_page)
 {
-    struct domain_iommu *hd = dom_iommu(dom_io);
-    struct iommu_context *ctx = iommu_default_context(dom_io);
-    struct page_info *pg;
-    unsigned int agaw = hd->arch.vtd.agaw;
-    unsigned int level = agaw_to_level(agaw);
-    const struct acpi_drhd_unit *drhd;
-    const struct acpi_rmrr_unit *rmrr;
-    unsigned int i, bdf;
-    bool rmrr_found = false;
-    int rc;
-
-    ASSERT(pcidevs_locked());
-    ASSERT(!ctx->arch.vtd.pgd_maddr);
-    ASSERT(page_list_empty(&ctx->arch.pgtables));
-
-    if ( pdev->arch.vtd.pgd_maddr )
-    {
-        clear_domain_page(pdev->arch.leaf_mfn);
-        return 0;
-    }
-
-    drhd = acpi_find_matched_drhd_unit(pdev);
-    if ( !drhd )
-        return -ENODEV;
-
-    pg = iommu_alloc_pgtable(hd, ctx, 0);
-    if ( !pg )
-        return -ENOMEM;
-
-    rc = context_set_domain_id(NULL, pdev->arch.pseudo_domid, drhd->iommu);
-
-    /* Transiently install the root into DomIO, for iommu_identity_mapping(). */
-    ctx->arch.vtd.pgd_maddr = page_to_maddr(pg);
-
-    for_each_rmrr_device ( rmrr, bdf, i )
-    {
-        if ( rc )
-            break;
-
-        if ( rmrr->segment == pdev->seg && bdf == pdev->sbdf.bdf )
-        {
-            rmrr_found = true;
-
-            rc = iommu_identity_mapping(dom_io, ctx, p2m_access_rw,
-                                        rmrr->base_address, rmrr->end_address,
-                                        0);
-            if ( rc )
-                printk(XENLOG_ERR VTDPREFIX
-                       "%pp: RMRR quarantine mapping failed\n",
-                       &pdev->sbdf);
-        }
-    }
-
-    iommu_identity_map_teardown(dom_io, ctx);
-    ctx->arch.vtd.pgd_maddr = 0;
-    pdev->arch.vtd.pgd_maddr = page_to_maddr(pg);
-
-    if ( !rc && scratch_page )
-    {
-        struct dma_pte *root;
-        struct page_info *pgs[6] = {};
-
-        root = map_vtd_domain_page(pdev->arch.vtd.pgd_maddr);
-        rc = fill_qpt(root, level - 1, pgs);
-        unmap_vtd_domain_page(root);
-
-        pdev->arch.leaf_mfn = page_to_mfn(pgs[0]);
-    }
-
-    page_list_move(&pdev->arch.pgtables_list, &ctx->arch.pgtables);
-
-    if ( rc || (!scratch_page && !rmrr_found) )
-        quarantine_teardown(pdev, drhd);
-
-    return rc;
+    return 0;
 }
 
 static void cf_check vtd_quiesce(void)
diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/x86/iommu.c
index 3bc8aa3e09..75c8752022 100644
--- a/xen/drivers/passthrough/x86/iommu.c
+++ b/xen/drivers/passthrough/x86/iommu.c
@@ -528,7 +528,6 @@ void __hwdom_init arch_iommu_hwdom_init(struct domain *d)
 
 void arch_pci_init_pdev(struct pci_dev *pdev)
 {
-    pdev->arch.pseudo_domid = DOMID_INVALID;
 }
 
 unsigned long *__init iommu_init_domid(domid_t reserve)
-- 
2.51.2



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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From: "Teddy Astie" 
Subject: =?utf-8?Q?[RFC=20PATCH=20v7=2006/14]=20vtd:=20Remove=20MAP=5FERROR=5FRECOVERY=20code=20path=20in=20domain=5Fcontext=5Fmapping=5Fone?=
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To: xen-devel@lists.xenproject.org
Cc: "Teddy Astie" , "Jan Beulich" , "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" 
Message-Id: <149e3a765a5a55792be7af0a4d9c0ca9fb5098c6.1763569135.git.teddy.astie@vates.tech>
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This logic is basically never called as the only possible failures are
- no memory to allocate the pagetable (if it isn't already allocated)
  this is fixed in this patch serie by ensuring that the pagetable is allocated
  when entering this function
- EILSEQ when there is a race condtion with hardware, which should not happen under
  normal circonstances

Remove this logic to simplify the error management of the function.

Signed-off-by: Teddy Astie 
---
This is fairly similar to [1], although we don't check for -EILSEQ.
Such failures can happen through me_wifi_quirk which can recursively
calls domain_context_mapping_one.

[1] https://lore.kernel.org/xen-devel/b0e81bd67c3f135a4102d12ed95a52ce56482992.1762961527.git.teddy.astie@vates.tech/
---
 xen/drivers/passthrough/vtd/iommu.c | 20 --------------------
 xen/drivers/passthrough/vtd/vtd.h   |  3 +--
 2 files changed, 1 insertion(+), 22 deletions(-)

diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c
index f269fca9bf..986b05b9dd 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -1627,26 +1627,6 @@ int domain_context_mapping_one(
     if ( !seg && !rc )
         rc = me_wifi_quirk(domain, bus, devfn, domid, pgd_maddr, mode);
 
-    if ( rc && !(mode & MAP_ERROR_RECOVERY) )
-    {
-        if ( !prev_dom ||
-             /*
-              * Unmapping here means DEV_TYPE_PCI devices with RMRRs (if such
-              * exist) would cause problems if such a region was actually
-              * accessed.
-              */
-             (prev_dom == dom_io && !pdev) )
-            ret = domain_context_unmap_one(domain, iommu, bus, devfn);
-        else
-            ret = domain_context_mapping_one(prev_dom, ctx, iommu, bus, devfn, pdev,
-                                             prev_dom->domain_id,
-                                             iommu_default_context(prev_dom)->arch.vtd.pgd_maddr,
-                                             (mode & MAP_WITH_RMRR) |
-                                             MAP_ERROR_RECOVERY) < 0;
-
-        if ( !ret && pdev && pdev->devfn == devfn )
-            check_cleanup_domid_map(domain, pdev, iommu);
-    }
 
     if ( prev_dom )
         rcu_unlock_domain(prev_dom);
diff --git a/xen/drivers/passthrough/vtd/vtd.h b/xen/drivers/passthrough/vtd/vtd.h
index f0286b40c3..0178214929 100644
--- a/xen/drivers/passthrough/vtd/vtd.h
+++ b/xen/drivers/passthrough/vtd/vtd.h
@@ -28,8 +28,7 @@
  */
 #define MAP_WITH_RMRR         (1u << 0)
 #define MAP_OWNER_DYING       (1u << 1)
-#define MAP_ERROR_RECOVERY    (1u << 2)
-#define UNMAP_ME_PHANTOM_FUNC (1u << 3)
+#define UNMAP_ME_PHANTOM_FUNC (1u << 2)
 
 struct IO_APIC_route_remap_entry {
     union {
-- 
2.51.2



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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Subject: =?utf-8?Q?[RFC=20PATCH=20v7=2007/14]=20iommu:=20Simplify=20hardware=20did=20management?=
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Cc: "Teddy Astie" , "Jan Beulich" , "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Jason Andryuk" 
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X-Mandrill-User: md_30504962
Feedback-ID: 30504962:30504962.20251120:md
Date: Thu, 20 Nov 2025 11:09:58 +0000
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Simplify the hardware DID management by allocating a DID
per IOMMU context (currently Xen domain) instead of trying
to reuse Xen domain DID (which may not be possible depending
on hardware constraints like did limits).

Signed-off-by Teddy Astie 
---
 xen/arch/x86/include/asm/iommu.h         |   5 +-
 xen/drivers/passthrough/amd/iommu.h      |   3 +
 xen/drivers/passthrough/amd/iommu_cmd.c  |   4 +-
 xen/drivers/passthrough/amd/iommu_init.c |   3 +-
 xen/drivers/passthrough/vtd/extern.h     |   2 -
 xen/drivers/passthrough/vtd/iommu.c      | 335 +++++------------------
 xen/drivers/passthrough/vtd/iommu.h      |   2 -
 xen/drivers/passthrough/vtd/qinval.c     |   2 +-
 xen/drivers/passthrough/x86/iommu.c      |  27 +-
 9 files changed, 89 insertions(+), 294 deletions(-)

diff --git a/xen/arch/x86/include/asm/iommu.h b/xen/arch/x86/include/asm/iommu.h
index 94513ba9dc..d20c3cda59 100644
--- a/xen/arch/x86/include/asm/iommu.h
+++ b/xen/arch/x86/include/asm/iommu.h
@@ -45,12 +45,15 @@ struct arch_iommu_context
         /* Intel VT-d */
         struct {
             uint64_t pgd_maddr; /* io page directory machine address */
-            unsigned long *iommu_bitmap; /* bitmap of iommu(s) that the context uses */
+            domid_t *didmap; /* per-iommu DID (valid only if related iommu_dev_cnt > 0) */
+            unsigned long *iommu_dev_cnt; /* counter of devices per iommu */
         } vtd;
         /* AMD IOMMU */
         struct {
             unsigned int paging_mode;
             struct page_info *root_table;
+            domid_t *didmap; /* per-iommu DID (valid only if related iommu_dev_cnt > 0) */
+            unsigned long *iommu_dev_cnt; /* counter of devices per iommu */
         } amd;
     };
 };
diff --git a/xen/drivers/passthrough/amd/iommu.h b/xen/drivers/passthrough/amd/iommu.h
index 4938cc38ed..db6d7ace02 100644
--- a/xen/drivers/passthrough/amd/iommu.h
+++ b/xen/drivers/passthrough/amd/iommu.h
@@ -35,6 +35,7 @@
 
 #define iommu_found()           (!list_empty(&amd_iommu_head))
 
+extern unsigned int nr_amd_iommus;
 extern struct list_head amd_iommu_head;
 
 typedef struct event_entry
@@ -106,6 +107,8 @@ struct amd_iommu {
 
     int enabled;
 
+    unsigned int index;
+
     struct list_head ats_devices;
 };
 
diff --git a/xen/drivers/passthrough/amd/iommu_cmd.c b/xen/drivers/passthrough/amd/iommu_cmd.c
index 6b80c57f44..0c4dcf4ece 100644
--- a/xen/drivers/passthrough/amd/iommu_cmd.c
+++ b/xen/drivers/passthrough/amd/iommu_cmd.c
@@ -331,11 +331,13 @@ static void _amd_iommu_flush_pages(struct domain *d,
                                    daddr_t daddr, unsigned int order)
 {
     struct amd_iommu *iommu;
-    unsigned int dom_id = d->domain_id;
+    struct iommu_context *ctx = iommu_default_context(d);
 
     /* send INVALIDATE_IOMMU_PAGES command */
     for_each_amd_iommu ( iommu )
     {
+        domid_t dom_id = ctx->arch.amd.didmap[iommu->index];
+
         invalidate_iommu_pages(iommu, daddr, dom_id, order);
         flush_command_buffer(iommu, 0);
     }
diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c
index 56b5c2c6ec..5cbb3fdb05 100644
--- a/xen/drivers/passthrough/amd/iommu_init.c
+++ b/xen/drivers/passthrough/amd/iommu_init.c
@@ -23,7 +23,7 @@
 
 #include "iommu.h"
 
-static int __initdata nr_amd_iommus;
+unsigned int nr_amd_iommus = 0;
 static bool __initdata pci_init;
 
 static struct tasklet amd_iommu_irq_tasklet;
@@ -920,6 +920,7 @@ static void enable_iommu(struct amd_iommu *iommu)
     set_iommu_translation_control(iommu, IOMMU_CONTROL_ENABLED);
 
     iommu->enabled = 1;
+    iommu->index = nr_amd_iommus;
 
     spin_unlock_irqrestore(&iommu->lock, flags);
 
diff --git a/xen/drivers/passthrough/vtd/extern.h b/xen/drivers/passthrough/vtd/extern.h
index 3dcb77c711..82db8f9435 100644
--- a/xen/drivers/passthrough/vtd/extern.h
+++ b/xen/drivers/passthrough/vtd/extern.h
@@ -45,8 +45,6 @@ void disable_intremap(struct vtd_iommu *iommu);
 int iommu_alloc(struct acpi_drhd_unit *drhd);
 void iommu_free(struct acpi_drhd_unit *drhd);
 
-domid_t did_to_domain_id(const struct vtd_iommu *iommu, unsigned int did);
-
 int iommu_flush_iec_global(struct vtd_iommu *iommu);
 int iommu_flush_iec_index(struct vtd_iommu *iommu, u8 im, u16 iidx);
 void clear_fault_bits(struct vtd_iommu *iommu);
diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c
index 986b05b9dd..3668185ebc 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -63,50 +63,6 @@ static struct tasklet vtd_fault_tasklet;
 static int cf_check setup_hwdom_device(u8 devfn, struct pci_dev *);
 static void setup_hwdom_rmrr(struct domain *d);
 
-static bool domid_mapping(const struct vtd_iommu *iommu)
-{
-    return (const void *)iommu->domid_bitmap != (const void *)iommu->domid_map;
-}
-
-static domid_t convert_domid(const struct vtd_iommu *iommu, domid_t domid)
-{
-    /*
-     * While we need to avoid DID 0 for caching-mode IOMMUs, maintain
-     * the property of the transformation being the same in either
-     * direction. By clipping to 16 bits we ensure that the resulting
-     * DID will fit in the respective context entry field.
-     */
-    BUILD_BUG_ON(DOMID_MASK >= 0xffff);
-
-    return !cap_caching_mode(iommu->cap) ? domid : ~domid;
-}
-
-static int get_iommu_did(domid_t domid, const struct vtd_iommu *iommu,
-                         bool warn)
-{
-    unsigned int nr_dom, i;
-
-    if ( !domid_mapping(iommu) )
-        return convert_domid(iommu, domid);
-
-    nr_dom = cap_ndoms(iommu->cap);
-    i = find_first_bit(iommu->domid_bitmap, nr_dom);
-    while ( i < nr_dom )
-    {
-        if ( iommu->domid_map[i] == domid )
-            return i;
-
-        i = find_next_bit(iommu->domid_bitmap, nr_dom, i + 1);
-    }
-
-    if ( warn )
-        dprintk(XENLOG_ERR VTDPREFIX,
-                "No valid iommu %u domid for Dom%d\n",
-                iommu->index, domid);
-
-    return -1;
-}
-
 #define DID_FIELD_WIDTH 16
 #define DID_HIGH_OFFSET 8
 
@@ -117,127 +73,17 @@ static int get_iommu_did(domid_t domid, const struct vtd_iommu *iommu,
 static int context_set_domain_id(struct context_entry *context,
                                  domid_t domid, struct vtd_iommu *iommu)
 {
-    unsigned int i;
-
     ASSERT(pcidevs_locked());
 
-    if ( domid_mapping(iommu) )
-    {
-        unsigned int nr_dom = cap_ndoms(iommu->cap);
-
-        i = find_first_bit(iommu->domid_bitmap, nr_dom);
-        while ( i < nr_dom && iommu->domid_map[i] != domid )
-            i = find_next_bit(iommu->domid_bitmap, nr_dom, i + 1);
-
-        if ( i >= nr_dom )
-        {
-            i = find_first_zero_bit(iommu->domid_bitmap, nr_dom);
-            if ( i >= nr_dom )
-            {
-                dprintk(XENLOG_ERR VTDPREFIX, "IOMMU: no free domain id\n");
-                return -EBUSY;
-            }
-            iommu->domid_map[i] = domid;
-            set_bit(i, iommu->domid_bitmap);
-        }
-    }
-    else
-        i = convert_domid(iommu, domid);
-
     if ( context )
     {
         context->hi &= ~(((1 << DID_FIELD_WIDTH) - 1) << DID_HIGH_OFFSET);
-        context->hi |= (i & ((1 << DID_FIELD_WIDTH) - 1)) << DID_HIGH_OFFSET;
+        context->hi |= (domid & ((1 << DID_FIELD_WIDTH) - 1)) << DID_HIGH_OFFSET;
     }
 
     return 0;
 }
 
-static void cleanup_domid_map(domid_t domid, struct vtd_iommu *iommu)
-{
-    int iommu_domid;
-
-    if ( !domid_mapping(iommu) )
-        return;
-
-    iommu_domid = get_iommu_did(domid, iommu, false);
-
-    if ( iommu_domid >= 0 )
-    {
-        /*
-         * Update domid_map[] /before/ domid_bitmap[] to avoid a race with
-         * context_set_domain_id(), setting the slot to DOMID_INVALID for
-         * did_to_domain_id() to return a suitable value while the bit is
-         * still set.
-         */
-        iommu->domid_map[iommu_domid] = DOMID_INVALID;
-        clear_bit(iommu_domid, iommu->domid_bitmap);
-    }
-}
-
-static bool any_pdev_behind_iommu(const struct domain *d,
-                                  const struct pci_dev *exclude,
-                                  const struct vtd_iommu *iommu)
-{
-    const struct pci_dev *pdev;
-
-    for_each_pdev ( d, pdev )
-    {
-        const struct acpi_drhd_unit *drhd;
-
-        if ( pdev == exclude )
-            continue;
-
-        drhd = acpi_find_matched_drhd_unit(pdev);
-        if ( drhd && drhd->iommu == iommu )
-            return true;
-    }
-
-    return false;
-}
-
-/*
- * If no other devices under the same iommu owned by this domain,
- * clear iommu in iommu_bitmap and clear domain_id in domid_bitmap.
- */
-static void check_cleanup_domid_map(const struct domain *d,
-                                    const struct pci_dev *exclude,
-                                    struct vtd_iommu *iommu)
-{
-    bool found;
-
-    if ( d == dom_io )
-        return;
-
-    found = any_pdev_behind_iommu(d, exclude, iommu);
-    /*
-     * Hidden devices are associated with DomXEN but usable by the hardware
-     * domain. Hence they need considering here as well.
-     */
-    if ( !found && is_hardware_domain(d) )
-        found = any_pdev_behind_iommu(dom_xen, exclude, iommu);
-
-    if ( !found )
-    {
-        clear_bit(iommu->index, iommu_default_context(d)->arch.vtd.iommu_bitmap);
-        cleanup_domid_map(d->domain_id, iommu);
-    }
-}
-
-domid_t did_to_domain_id(const struct vtd_iommu *iommu, unsigned int did)
-{
-    if ( did >= cap_ndoms(iommu->cap) )
-        return DOMID_INVALID;
-
-    if ( !domid_mapping(iommu) )
-        return convert_domid(iommu, did);
-
-    if ( !test_bit(did, iommu->domid_bitmap) )
-        return DOMID_INVALID;
-
-    return iommu->domid_map[did];
-}
-
 /* Allocate page table, return its machine address */
 uint64_t alloc_pgtable_maddr(unsigned long npages, nodeid_t node)
 {
@@ -755,13 +601,11 @@ static int __must_check cf_check iommu_flush_iotlb(struct domain *d, dfn_t dfn,
 
         iommu = drhd->iommu;
 
-        if ( !test_bit(iommu->index, ctx->arch.vtd.iommu_bitmap) )
+        if ( !ctx->arch.vtd.iommu_dev_cnt[iommu->index] )
             continue;
 
         flush_dev_iotlb = !!find_ats_dev_drhd(iommu);
-        iommu_domid = get_iommu_did(d->domain_id, iommu, !d->is_dying);
-        if ( iommu_domid == -1 )
-            continue;
+        iommu_domid = ctx->arch.vtd.didmap[iommu->index];
 
         if ( !page_count || (page_count & (page_count - 1)) ||
              dfn_eq(dfn, INVALID_DFN) || !IS_ALIGNED(dfn_x(dfn), page_count) )
@@ -1258,7 +1102,6 @@ int __init iommu_alloc(struct acpi_drhd_unit *drhd)
 {
     struct vtd_iommu *iommu;
     unsigned int sagaw, agaw = 0, nr_dom;
-    domid_t reserved_domid = DOMID_INVALID;
     int rc;
 
     iommu = xzalloc(struct vtd_iommu);
@@ -1347,43 +1190,16 @@ int __init iommu_alloc(struct acpi_drhd_unit *drhd)
     if ( !ecap_coherent(iommu->ecap) )
         iommu_non_coherent = true;
 
-    if ( nr_dom <= DOMID_MASK * 2 + cap_caching_mode(iommu->cap) )
-    {
-        /* Allocate domain id (bit) maps. */
-        iommu->domid_bitmap = xzalloc_array(unsigned long,
-                                            BITS_TO_LONGS(nr_dom));
-        iommu->domid_map = xzalloc_array(domid_t, nr_dom);
-        rc = -ENOMEM;
-        if ( !iommu->domid_bitmap || !iommu->domid_map )
-            goto free;
-
-        /*
-         * If Caching mode is set, then invalid translations are tagged
-         * with domain id 0. Hence reserve bit/slot 0.
-         */
-        if ( cap_caching_mode(iommu->cap) )
-        {
-            iommu->domid_map[0] = DOMID_INVALID;
-            __set_bit(0, iommu->domid_bitmap);
-        }
-    }
-    else
-    {
-        /* Don't leave dangling NULL pointers. */
-        iommu->domid_bitmap = ZERO_BLOCK_PTR;
-        iommu->domid_map = ZERO_BLOCK_PTR;
-
-        /*
-         * If Caching mode is set, then invalid translations are tagged
-         * with domain id 0. Hence reserve the ID taking up bit/slot 0.
-         */
-        reserved_domid = convert_domid(iommu, 0) ?: DOMID_INVALID;
-    }
+    /* Allocate domain id (bit) maps. */
+    iommu->domid_bitmap = xzalloc_array(unsigned long,
+                                        BITS_TO_LONGS(nr_dom));
 
-    iommu->pseudo_domid_map = iommu_init_domid(reserved_domid);
-    rc = -ENOMEM;
-    if ( !iommu->pseudo_domid_map )
-        goto free;
+    /*
+        * If Caching mode is set, then invalid translations are tagged
+        * with domain id 0. Hence reserve bit/slot 0.
+        */
+    if ( cap_caching_mode(iommu->cap) )
+        __set_bit(0, iommu->domid_bitmap);
 
     return 0;
 
@@ -1411,8 +1227,6 @@ void __init iommu_free(struct acpi_drhd_unit *drhd)
         iounmap(iommu->reg);
 
     xfree(iommu->domid_bitmap);
-    xfree(iommu->domid_map);
-    xfree(iommu->pseudo_domid_map);
 
     if ( iommu->msi.irq >= 0 )
         destroy_irq(iommu->msi.irq);
@@ -1426,19 +1240,39 @@ void __init iommu_free(struct acpi_drhd_unit *drhd)
         agaw = 64;                              \
     agaw; })
 
-static int cf_check intel_iommu_domain_init(struct domain *d)
+static int cf_check intel_iommu_context_init(struct domain *d, struct iommu_context *ctx)
 {
-    struct domain_iommu *hd = dom_iommu(d);
-    struct iommu_context *ctx = iommu_default_context(d);
+    struct acpi_drhd_unit *drhd;
 
-    ctx->arch.vtd.iommu_bitmap = xzalloc_array(unsigned long,
-                                              BITS_TO_LONGS(nr_iommus));
-    if ( !ctx->arch.vtd.iommu_bitmap )
+    ctx->arch.vtd.didmap = xzalloc_array(domid_t, nr_iommus);
+    if ( !ctx->arch.vtd.didmap )
         return -ENOMEM;
 
+    ctx->arch.vtd.iommu_dev_cnt = xzalloc_array(unsigned long, nr_iommus);
+    if ( !ctx->arch.vtd.iommu_dev_cnt )
+    {
+        xfree(ctx->arch.vtd.didmap);
+        return -ENOMEM;
+    }
+
+    // TODO: Allocate IOMMU domid only when attaching devices ?
+    /* Populate context DID map using pseudo DIDs */
+    for_each_drhd_unit(drhd)
+    {
+        ctx->arch.vtd.didmap[drhd->iommu->index] =
+            iommu_alloc_domid(drhd->iommu->domid_bitmap);
+    }
+
+    return arch_iommu_context_init(d, ctx, 0);
+}
+
+static int cf_check intel_iommu_domain_init(struct domain *d)
+{
+    struct domain_iommu *hd = dom_iommu(d);
+
     hd->arch.vtd.agaw = width_to_agaw(DEFAULT_DOMAIN_ADDRESS_WIDTH);
 
-    return 0;
+    return intel_iommu_context_init(d, iommu_default_context(d));
 }
 
 static void __hwdom_init cf_check intel_iommu_hwdom_init(struct domain *d)
@@ -1482,11 +1316,11 @@ int domain_context_mapping_one(
     struct context_entry *context, *context_entries, lctxt;
     __uint128_t res, old;
     uint64_t maddr;
-    uint16_t seg = iommu->drhd->segment, prev_did = 0;
-    struct domain *prev_dom = NULL;
+    uint16_t seg = iommu->drhd->segment, prev_did = 0, did;
     int rc, ret;
-    bool flush_dev_iotlb;
+    bool flush_dev_iotlb, overwrite_entry = false;
 
+    struct iommu_context *prev_ctx = pdev->domain ? iommu_default_context(pdev->domain) : NULL;
 
     ASSERT(pcidevs_locked());
     spin_lock(&iommu->lock);
@@ -1500,23 +1334,12 @@ int domain_context_mapping_one(
     context = &context_entries[devfn];
     old = (lctxt = *context).full;
 
+    did = ctx->arch.vtd.didmap[iommu->index];
+
     if ( context_present(lctxt) )
     {
-        domid_t domid;
-
         prev_did = context_domain_id(lctxt);
-        domid = did_to_domain_id(iommu, prev_did);
-        if ( domid < DOMID_FIRST_RESERVED )
-            prev_dom = rcu_lock_domain_by_id(domid);
-        if ( !prev_dom )
-        {
-            spin_unlock(&iommu->lock);
-            unmap_vtd_domain_page(context_entries);
-            dprintk(XENLOG_DEBUG VTDPREFIX,
-                    "no domain for did %u (nr_dom %u)\n",
-                    prev_did, cap_ndoms(iommu->cap));
-            return -ESRCH;
-        }
+        overwrite_entry = true;
     }
 
     if ( iommu_hwdom_passthrough && is_hardware_domain(domain) )
@@ -1532,11 +1355,7 @@ int domain_context_mapping_one(
         root = domain_pgd_maddr(domain, ctx, pgd_maddr, iommu->nr_pt_levels);
         if ( !root )
         {
-            spin_unlock(&ctx->arch.mapping_lock);
-            spin_unlock(&iommu->lock);
             unmap_vtd_domain_page(context_entries);
-            if ( prev_dom )
-                rcu_unlock_domain(prev_dom);
             return -ENOMEM;
         }
 
@@ -1549,35 +1368,13 @@ int domain_context_mapping_one(
         spin_unlock(&ctx->arch.mapping_lock);
     }
 
-    rc = context_set_domain_id(&lctxt, domid, iommu);
+    rc = context_set_domain_id(&lctxt, did, iommu);
     if ( rc )
-    {
-    unlock:
-        spin_unlock(&iommu->lock);
-        unmap_vtd_domain_page(context_entries);
-        if ( prev_dom )
-            rcu_unlock_domain(prev_dom);
-        return rc;
-    }
-
-    if ( !prev_dom )
-    {
-        context_set_address_width(lctxt, level_to_agaw(iommu->nr_pt_levels));
-        context_set_fault_enable(lctxt);
-        context_set_present(lctxt);
-    }
-    else if ( prev_dom == domain )
-    {
-        ASSERT(lctxt.full == context->full);
-        rc = !!pdev;
         goto unlock;
-    }
-    else
-    {
-        ASSERT(context_address_width(lctxt) ==
-               level_to_agaw(iommu->nr_pt_levels));
-        ASSERT(!context_fault_disable(lctxt));
-    }
+
+    context_set_address_width(lctxt, level_to_agaw(iommu->nr_pt_levels));
+    context_set_fault_enable(lctxt);
+    context_set_present(lctxt);
 
     res = cmpxchg16b(context, &old, &lctxt.full);
 
@@ -1587,8 +1384,6 @@ int domain_context_mapping_one(
      */
     if ( res != old )
     {
-        if ( pdev )
-            check_cleanup_domid_map(domain, pdev, iommu);
         printk(XENLOG_ERR
                 "%pp: unexpected context entry %016lx_%016lx (expected %016lx_%016lx)\n",
                 &PCI_SBDF(seg, bus, devfn),
@@ -1602,9 +1397,9 @@ int domain_context_mapping_one(
     spin_unlock(&iommu->lock);
 
     rc = iommu_flush_context_device(iommu, prev_did, PCI_BDF(bus, devfn),
-                                    DMA_CCMD_MASK_NOBIT, !prev_dom);
+                                    DMA_CCMD_MASK_NOBIT, !overwrite_entry);
     flush_dev_iotlb = !!find_ats_dev_drhd(iommu);
-    ret = iommu_flush_iotlb_dsi(iommu, prev_did, !prev_dom, flush_dev_iotlb);
+    ret = iommu_flush_iotlb_dsi(iommu, prev_did, !overwrite_entry, flush_dev_iotlb);
 
     /*
      * The current logic for returns:
@@ -1620,18 +1415,27 @@ int domain_context_mapping_one(
     if ( rc > 0 )
         rc = 0;
 
-    set_bit(iommu->index, ctx->arch.vtd.iommu_bitmap);
+    if ( prev_ctx )
+    {
+        /* Don't underflow the counter. */
+        BUG_ON(!prev_ctx->arch.vtd.iommu_dev_cnt[iommu->index]);
+        prev_ctx->arch.vtd.iommu_dev_cnt[iommu->index]--;
+    }
+
+    ctx->arch.vtd.iommu_dev_cnt[iommu->index]++;
 
     unmap_vtd_domain_page(context_entries);
+    spin_unlock(&iommu->lock);
 
     if ( !seg && !rc )
         rc = me_wifi_quirk(domain, bus, devfn, domid, pgd_maddr, mode);
 
+    return rc;
 
-    if ( prev_dom )
-        rcu_unlock_domain(prev_dom);
-
-    return rc ?: pdev && prev_dom;
+    unlock:
+        unmap_vtd_domain_page(context_entries);
+        spin_unlock(&iommu->lock);
+        return rc;
 }
 
 static const struct acpi_drhd_unit *domain_context_unmap(
@@ -1643,7 +1447,7 @@ static int domain_context_mapping(struct domain *domain, struct iommu_context *c
     const struct acpi_drhd_unit *drhd = acpi_find_matched_drhd_unit(pdev);
     const struct acpi_rmrr_unit *rmrr;
     paddr_t pgd_maddr = ctx->arch.vtd.pgd_maddr;
-    domid_t did = domain->domain_id;
+    domid_t did = ctx->arch.vtd.didmap[drhd->iommu->index];
     int ret = 0;
     unsigned int i, mode = 0;
     uint16_t seg = pdev->seg, bdf;
@@ -1972,9 +1776,10 @@ static void cf_check iommu_domain_teardown(struct domain *d)
     ASSERT(!ctx->arch.vtd.pgd_maddr);
 
     for_each_drhd_unit ( drhd )
-        cleanup_domid_map(d->domain_id, drhd->iommu);
+        iommu_free_domid(d->domain_id, drhd->iommu->domid_bitmap);
 
-    XFREE(ctx->arch.vtd.iommu_bitmap);
+    XFREE(ctx->arch.vtd.iommu_dev_cnt);
+    XFREE(ctx->arch.vtd.didmap);
 }
 
 static void quarantine_teardown(struct pci_dev *pdev,
diff --git a/xen/drivers/passthrough/vtd/iommu.h b/xen/drivers/passthrough/vtd/iommu.h
index 29d350b23d..77edfa3587 100644
--- a/xen/drivers/passthrough/vtd/iommu.h
+++ b/xen/drivers/passthrough/vtd/iommu.h
@@ -506,9 +506,7 @@ struct vtd_iommu {
     } flush;
 
     struct list_head ats_devices;
-    unsigned long *pseudo_domid_map; /* "pseudo" domain id bitmap */
     unsigned long *domid_bitmap;  /* domain id bitmap */
-    domid_t *domid_map;           /* domain id mapping array */
     uint32_t version;
 };
 
diff --git a/xen/drivers/passthrough/vtd/qinval.c b/xen/drivers/passthrough/vtd/qinval.c
index 036f3e8505..3f25b6a2e0 100644
--- a/xen/drivers/passthrough/vtd/qinval.c
+++ b/xen/drivers/passthrough/vtd/qinval.c
@@ -229,7 +229,7 @@ static int __must_check dev_invalidate_sync(struct vtd_iommu *iommu,
     rc = queue_invalidate_wait(iommu, 0, 1, 1, 1);
     if ( rc == -ETIMEDOUT && !pdev->broken )
     {
-        struct domain *d = rcu_lock_domain_by_id(did_to_domain_id(iommu, did));
+        struct domain *d = rcu_lock_domain(pdev->domain);
 
         /*
          * In case the domain has been freed or the IOMMU domid bitmap is
diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/x86/iommu.c
index 75c8752022..98cca92dc3 100644
--- a/xen/drivers/passthrough/x86/iommu.c
+++ b/xen/drivers/passthrough/x86/iommu.c
@@ -534,9 +534,6 @@ unsigned long *__init iommu_init_domid(domid_t reserve)
 {
     unsigned long *map;
 
-    if ( !iommu_quarantine )
-        return ZERO_BLOCK_PTR;
-
     BUILD_BUG_ON(DOMID_MASK * 2U >= UINT16_MAX);
 
     map = xzalloc_array(unsigned long, BITS_TO_LONGS(UINT16_MAX - DOMID_MASK));
@@ -551,36 +548,24 @@ unsigned long *__init iommu_init_domid(domid_t reserve)
 
 domid_t iommu_alloc_domid(unsigned long *map)
 {
-    /*
-     * This is used uniformly across all IOMMUs, such that on typical
-     * systems we wouldn't re-use the same ID very quickly (perhaps never).
-     */
-    static unsigned int start;
-    unsigned int idx = find_next_zero_bit(map, UINT16_MAX - DOMID_MASK, start);
+    /* TODO: Consider nr_doms ? */
+    unsigned int idx = find_next_zero_bit(map, UINT16_MAX, 0);
 
-    ASSERT(pcidevs_locked());
-
-    if ( idx >= UINT16_MAX - DOMID_MASK )
-        idx = find_first_zero_bit(map, UINT16_MAX - DOMID_MASK);
-    if ( idx >= UINT16_MAX - DOMID_MASK )
-        return DOMID_INVALID;
+    if ( idx >= UINT16_MAX )
+        return UINT16_MAX;
 
     __set_bit(idx, map);
 
-    start = idx + 1;
-
-    return idx | (DOMID_MASK + 1);
+    return idx;
 }
 
 void iommu_free_domid(domid_t domid, unsigned long *map)
 {
     ASSERT(pcidevs_locked());
 
-    if ( domid == DOMID_INVALID )
+    if ( domid == UINT16_MAX )
         return;
 
-    ASSERT(domid > DOMID_MASK);
-
     if ( !__test_and_clear_bit(domid & DOMID_MASK, map) )
         BUG();
 }
-- 
2.51.2



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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From: "Teddy Astie" 
Subject: =?utf-8?Q?[RFC=20PATCH=20v7=2009/14]=20iommu:=20Provide=20'X'=20debug=20key=20to=20dump=20IOMMU=20context=20infos?=
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It is often useful to know the state of all contexts and what devices
are in it. It can also be used to know what device belong to which domains.

Signed-off-by: Teddy Astie 
---
v7: introduced

 xen/drivers/passthrough/amd/iommu_init.c | 46 ++++++++++++++++++++++++
 xen/drivers/passthrough/vtd/iommu.c      | 45 ++++++++++++++++++++++-
 2 files changed, 90 insertions(+), 1 deletion(-)

diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c
index bf32b6c718..1c38ac0369 100644
--- a/xen/drivers/passthrough/amd/iommu_init.c
+++ b/xen/drivers/passthrough/amd/iommu_init.c
@@ -1332,6 +1332,51 @@ static int __init cf_check amd_iommu_setup_device_table(
     return 0;
 }
 
+static void cf_check amd_dump_domain_iommu_contexts(struct domain *d)
+{
+    unsigned int i, iommu_no;
+    struct domain_iommu *hd = dom_iommu(d);
+    struct iommu_context *ctx;
+    struct pci_dev *pdev;
+
+    if (d == dom_io)
+        printk("d[IO] contexts\n");
+    else
+        printk("d%hu contexts\n", d->domain_id);
+
+    for (i = 0; i < (1 + hd->other_contexts.count); ++i)
+    {
+        if ( (ctx = iommu_get_context(d, i)) )
+        {
+            printk(" Context %d (%"PRI_mfn")\n", i,
+                   mfn_x(page_to_mfn(ctx->arch.amd.root_table)));
+
+            for (iommu_no = 0; iommu_no < nr_amd_iommus; iommu_no++)
+                printk("  IOMMU %u (used=%lu; did=%hu)\n", iommu_no,
+                       ctx->arch.amd.iommu_dev_cnt[iommu_no],
+                       ctx->arch.amd.didmap[iommu_no]);
+
+            list_for_each_entry(pdev, &ctx->devices, context_list)
+            {
+                printk("  - %pp\n", &pdev->sbdf);
+            }
+
+            iommu_put_context(ctx);
+        }
+    }
+}
+
+static void cf_check amd_dump_iommu_contexts(unsigned char key)
+{
+    struct domain *d;
+
+    for_each_domain(d)
+        if (is_iommu_enabled(d))
+            amd_dump_domain_iommu_contexts(d);
+
+    amd_dump_domain_iommu_contexts(dom_io);
+}
+
 /* Check whether SP5100 SATA Combined mode is on */
 static bool __init amd_sp5100_erratum28(void)
 {
@@ -1486,6 +1531,7 @@ int __init amd_iommu_init(bool xt)
         register_keyhandler('V', &amd_iommu_dump_intremap_tables,
                             "dump IOMMU intremap tables", 0);
 
+    register_keyhandler('X', amd_dump_iommu_contexts, "dump iommu contexts", 1);
     return 0;
 
 error_out:
diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c
index 3319903297..a602edd755 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -1954,6 +1954,49 @@ static int __must_check init_vtd_hw(bool resume)
     return iommu_flush_all();
 }
 
+static void cf_check vtd_dump_domain_contexts(struct domain *d)
+{
+    unsigned int i, iommu_no;
+    struct pci_dev *pdev;
+    struct iommu_context *ctx;
+    struct domain_iommu *hd = dom_iommu(d);
+
+    if (d == dom_io)
+        printk("d[IO] contexts\n");
+    else
+        printk("d%hu contexts\n", d->domain_id);
+
+    for (i = 0; i < (1 + hd->other_contexts.count); ++i)
+    {
+        if ( (ctx = iommu_get_context(d, i)) )
+        {
+            printk(" Context %d (%"PRIx64")\n", i, ctx->arch.vtd.pgd_maddr);
+
+            for (iommu_no = 0; iommu_no < nr_iommus; iommu_no++)
+                printk("  IOMMU %u (used=%lu; did=%hu)\n", iommu_no,
+                       ctx->arch.vtd.iommu_dev_cnt[iommu_no],
+                       ctx->arch.vtd.didmap[iommu_no]);
+
+            list_for_each_entry(pdev, &ctx->devices, context_list)
+            {
+                printk("  - %pp\n", &pdev->sbdf);
+            }
+
+            iommu_put_context(ctx);
+        }
+    }
+}
+
+static void cf_check vtd_dump_contexts(unsigned char key)
+{
+    struct domain *d;
+
+    for_each_domain(d)
+        if (is_iommu_enabled(d))
+            vtd_dump_domain_contexts(d);
+
+    vtd_dump_domain_contexts(dom_io);
+}
 
 static struct iommu_state {
     uint32_t fectl;
@@ -2088,7 +2131,7 @@ static int __init cf_check vtd_setup(void)
     iommu_ops.page_sizes |= large_sizes;
 
     register_keyhandler('V', vtd_dump_iommu_info, "dump iommu info", 1);
-
+    register_keyhandler('X', vtd_dump_contexts, "dump iommu contexts", 1);
     return 0;
 
  error:
-- 
2.51.2



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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Subject: =?utf-8?Q?[RFC=20PATCH=20v7=2008/14]=20iommu:=20Introduce=20redesigned=20IOMMU=20subsystem?=
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Introduce the changes proposed in docs/designs/iommu-context.md.

Signed-off-by Teddy Astie 
---
This patch is still quite large but I am not sure how to split it further.
---
 xen/arch/x86/include/asm/iommu.h            |    8 +-
 xen/arch/x86/mm/p2m-ept.c                   |    2 +-
 xen/arch/x86/pv/dom0_build.c                |    6 +-
 xen/common/memory.c                         |    4 +-
 xen/drivers/passthrough/amd/iommu.h         |   13 +-
 xen/drivers/passthrough/amd/iommu_cmd.c     |   20 +-
 xen/drivers/passthrough/amd/iommu_init.c    |    2 +-
 xen/drivers/passthrough/amd/iommu_map.c     |   52 +-
 xen/drivers/passthrough/amd/pci_amd_iommu.c |  383 ++++---
 xen/drivers/passthrough/iommu.c             |  635 +++++++++++-
 xen/drivers/passthrough/pci.c               |  387 +++----
 xen/drivers/passthrough/vtd/extern.h        |   17 +-
 xen/drivers/passthrough/vtd/iommu.c         | 1030 +++++++------------
 xen/drivers/passthrough/vtd/quirks.c        |   22 +-
 xen/drivers/passthrough/x86/iommu.c         |  153 ++-
 xen/include/xen/iommu.h                     |   99 +-
 xen/include/xen/pci.h                       |    3 +
 17 files changed, 1530 insertions(+), 1306 deletions(-)

diff --git a/xen/arch/x86/include/asm/iommu.h b/xen/arch/x86/include/asm/iommu.h
index d20c3cda59..654a07b9b2 100644
--- a/xen/arch/x86/include/asm/iommu.h
+++ b/xen/arch/x86/include/asm/iommu.h
@@ -2,10 +2,12 @@
 #ifndef __ARCH_X86_IOMMU_H__
 #define __ARCH_X86_IOMMU_H__
 
+#include 
 #include 
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -39,18 +41,16 @@ struct arch_iommu_context
     struct list_head identity_maps;
 
 
-    spinlock_t mapping_lock; /* io page table lock */
-
     union {
         /* Intel VT-d */
         struct {
             uint64_t pgd_maddr; /* io page directory machine address */
             domid_t *didmap; /* per-iommu DID (valid only if related iommu_dev_cnt > 0) */
             unsigned long *iommu_dev_cnt; /* counter of devices per iommu */
+            uint32_t superpage_progress; /* superpage progress during teardown */
         } vtd;
         /* AMD IOMMU */
         struct {
-            unsigned int paging_mode;
             struct page_info *root_table;
             domid_t *didmap; /* per-iommu DID (valid only if related iommu_dev_cnt > 0) */
             unsigned long *iommu_dev_cnt; /* counter of devices per iommu */
@@ -72,7 +72,7 @@ struct arch_iommu
         struct {
             unsigned int paging_mode;
             struct guest_iommu *g_iommu;
-        };
+        } amd;
     };
 };
 
diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c
index b854a08b4c..6cc97ec139 100644
--- a/xen/arch/x86/mm/p2m-ept.c
+++ b/xen/arch/x86/mm/p2m-ept.c
@@ -978,7 +978,7 @@ out:
             rc = iommu_iotlb_flush(d, _dfn(gfn), 1ul << order,
                                    (iommu_flags ? IOMMU_FLUSHF_added : 0) |
                                    (vtd_pte_present ? IOMMU_FLUSHF_modified
-                                                    : 0));
+                                                    : 0), 0);
         else if ( need_iommu_pt_sync(d) )
             rc = iommu_flags ?
                 iommu_legacy_map(d, _dfn(gfn), mfn, 1ul << order, iommu_flags) :
diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c
index 21158ce181..1bae5f2ba9 100644
--- a/xen/arch/x86/pv/dom0_build.c
+++ b/xen/arch/x86/pv/dom0_build.c
@@ -77,7 +77,7 @@ static __init void mark_pv_pt_pages_rdonly(struct domain *d,
          * iommu_memory_setup() ended up mapping them.
          */
         if ( need_iommu_pt_sync(d) &&
-             iommu_unmap(d, _dfn(mfn_x(page_to_mfn(page))), 1, 0, flush_flags) )
+             iommu_unmap(d, _dfn(mfn_x(page_to_mfn(page))), 1, 0, flush_flags, 0) )
             BUG();
 
         /* Read-only mapping + PGC_allocated + page-table page. */
@@ -128,7 +128,7 @@ static void __init iommu_memory_setup(struct domain *d, const char *what,
 
     while ( (rc = iommu_map(d, _dfn(mfn_x(mfn)), mfn, nr,
                             IOMMUF_readable | IOMMUF_writable | IOMMUF_preempt,
-                            flush_flags)) > 0 )
+                            flush_flags, 0)) > 0 )
     {
         mfn = mfn_add(mfn, rc);
         nr -= rc;
@@ -962,7 +962,7 @@ static int __init dom0_construct(const struct boot_domain *bd)
     }
 
     /* Use while() to avoid compiler warning. */
-    while ( iommu_iotlb_flush_all(d, flush_flags) )
+    while ( iommu_iotlb_flush_all(d, 0, flush_flags) )
         break;
 
     if ( initrd_len != 0 )
diff --git a/xen/common/memory.c b/xen/common/memory.c
index 3688e6dd50..0c0526a160 100644
--- a/xen/common/memory.c
+++ b/xen/common/memory.c
@@ -928,7 +928,7 @@ int xenmem_add_to_physmap(struct domain *d, struct xen_add_to_physmap *xatp,
         this_cpu(iommu_dont_flush_iotlb) = 0;
 
         ret = iommu_iotlb_flush(d, _dfn(xatp->idx - done), done,
-                                IOMMU_FLUSHF_modified);
+                                IOMMU_FLUSHF_modified, 0);
         if ( unlikely(ret) && rc >= 0 )
             rc = ret;
 
@@ -942,7 +942,7 @@ int xenmem_add_to_physmap(struct domain *d, struct xen_add_to_physmap *xatp,
             put_page(pages[i]);
 
         ret = iommu_iotlb_flush(d, _dfn(xatp->gpfn - done), done,
-                                IOMMU_FLUSHF_added | IOMMU_FLUSHF_modified);
+                                IOMMU_FLUSHF_added | IOMMU_FLUSHF_modified, 0);
         if ( unlikely(ret) && rc >= 0 )
             rc = ret;
     }
diff --git a/xen/drivers/passthrough/amd/iommu.h b/xen/drivers/passthrough/amd/iommu.h
index db6d7ace02..0bd0f15a72 100644
--- a/xen/drivers/passthrough/amd/iommu.h
+++ b/xen/drivers/passthrough/amd/iommu.h
@@ -198,11 +198,10 @@ void amd_iommu_quarantine_teardown(struct pci_dev *pdev);
 /* mapping functions */
 int __must_check cf_check amd_iommu_map_page(
     struct domain *d, dfn_t dfn, mfn_t mfn, unsigned int flags,
-    unsigned int *flush_flags);
+    unsigned int *flush_flags, struct iommu_context *ctx);
 int __must_check cf_check amd_iommu_unmap_page(
     struct domain *d, dfn_t dfn, unsigned int order,
-    unsigned int *flush_flags);
-int __must_check amd_iommu_alloc_root(struct domain *d);
+    unsigned int *flush_flags, struct iommu_context *ctx);
 int amd_iommu_reserve_domain_unity_map(struct domain *d, struct iommu_context *ctx,
                                        const struct ivrs_unity_map *map,
                                        unsigned int flag);
@@ -211,7 +210,7 @@ int amd_iommu_reserve_domain_unity_unmap(struct domain *d, struct iommu_context
 int cf_check amd_iommu_get_reserved_device_memory(
     iommu_grdm_t *func, void *ctxt);
 int __must_check cf_check amd_iommu_flush_iotlb_pages(
-    struct domain *d, dfn_t dfn, unsigned long page_count,
+    struct domain *d, struct iommu_context *ctx, dfn_t dfn, unsigned long page_count,
     unsigned int flush_flags);
 void amd_iommu_print_entries(const struct amd_iommu *iommu, unsigned int dev_id,
                              dfn_t dfn);
@@ -233,9 +232,9 @@ void iommu_dte_add_device_entry(struct amd_iommu_dte *dte,
                                 const struct ivrs_mappings *ivrs_dev);
 
 /* send cmd to iommu */
-void amd_iommu_flush_all_pages(struct domain *d);
-void amd_iommu_flush_pages(struct domain *d, unsigned long dfn,
-                           unsigned int order);
+void amd_iommu_flush_all_pages(struct domain *d, struct iommu_context *ctx);
+void amd_iommu_flush_pages(struct domain *d, struct iommu_context *ctx,
+                           unsigned long dfn, unsigned int order);
 void amd_iommu_flush_iotlb(u8 devfn, const struct pci_dev *pdev,
                            daddr_t daddr, unsigned int order);
 void amd_iommu_flush_device(struct amd_iommu *iommu, uint16_t bdf,
diff --git a/xen/drivers/passthrough/amd/iommu_cmd.c b/xen/drivers/passthrough/amd/iommu_cmd.c
index 0c4dcf4ece..13c353b038 100644
--- a/xen/drivers/passthrough/amd/iommu_cmd.c
+++ b/xen/drivers/passthrough/amd/iommu_cmd.c
@@ -327,19 +327,21 @@ static void amd_iommu_flush_all_iotlbs(const struct domain *d, daddr_t daddr,
 }
 
 /* Flush iommu cache after p2m changes. */
-static void _amd_iommu_flush_pages(struct domain *d,
+static void _amd_iommu_flush_pages(struct domain *d, struct iommu_context *ctx,
                                    daddr_t daddr, unsigned int order)
 {
     struct amd_iommu *iommu;
-    struct iommu_context *ctx = iommu_default_context(d);
 
     /* send INVALIDATE_IOMMU_PAGES command */
     for_each_amd_iommu ( iommu )
     {
-        domid_t dom_id = ctx->arch.amd.didmap[iommu->index];
+        if ( ctx->arch.amd.iommu_dev_cnt[iommu->index] )
+        {
+            domid_t dom_id = ctx->arch.amd.didmap[iommu->index];
 
-        invalidate_iommu_pages(iommu, daddr, dom_id, order);
-        flush_command_buffer(iommu, 0);
+            invalidate_iommu_pages(iommu, daddr, dom_id, order);
+            flush_command_buffer(iommu, 0);
+        }
     }
 
     if ( ats_enabled )
@@ -355,15 +357,15 @@ static void _amd_iommu_flush_pages(struct domain *d,
     }
 }
 
-void amd_iommu_flush_all_pages(struct domain *d)
+void amd_iommu_flush_all_pages(struct domain *d, struct iommu_context *ctx)
 {
-    _amd_iommu_flush_pages(d, INV_IOMMU_ALL_PAGES_ADDRESS, 0);
+    _amd_iommu_flush_pages(d, ctx, INV_IOMMU_ALL_PAGES_ADDRESS, 0);
 }
 
-void amd_iommu_flush_pages(struct domain *d,
+void amd_iommu_flush_pages(struct domain *d, struct iommu_context *ctx,
                            unsigned long dfn, unsigned int order)
 {
-    _amd_iommu_flush_pages(d, __dfn_to_daddr(dfn), order);
+    _amd_iommu_flush_pages(d, ctx, __dfn_to_daddr(dfn), order);
 }
 
 void amd_iommu_flush_device(struct amd_iommu *iommu, uint16_t bdf,
diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c
index 5cbb3fdb05..bf32b6c718 100644
--- a/xen/drivers/passthrough/amd/iommu_init.c
+++ b/xen/drivers/passthrough/amd/iommu_init.c
@@ -1538,7 +1538,7 @@ static void invalidate_all_domain_pages(void)
 
     for_each_domain( d )
         if ( is_iommu_enabled(d) )
-            amd_iommu_flush_all_pages(d);
+            amd_iommu_flush_all_pages(d, iommu_default_context(d));
 }
 
 static int cf_check _invalidate_all_devices(
diff --git a/xen/drivers/passthrough/amd/iommu_map.c b/xen/drivers/passthrough/amd/iommu_map.c
index 42827c7dc7..01b36fdf4f 100644
--- a/xen/drivers/passthrough/amd/iommu_map.c
+++ b/xen/drivers/passthrough/amd/iommu_map.c
@@ -276,7 +276,7 @@ static int iommu_pde_from_dfn(struct domain *d, struct iommu_context *ctx,
     struct domain_iommu *hd = dom_iommu(d);
 
     table = ctx->arch.amd.root_table;
-    level = ctx->arch.amd.paging_mode;
+    level = hd->arch.amd.paging_mode;
 
     if ( !table || target < 1 || level < target || level > 6 )
     {
@@ -400,21 +400,17 @@ static void queue_free_pt(struct domain *d, struct iommu_context *ctx, mfn_t mfn
 
 int cf_check amd_iommu_map_page(
     struct domain *d, dfn_t dfn, mfn_t mfn, unsigned int flags,
-    unsigned int *flush_flags)
+    unsigned int *flush_flags, struct iommu_context *ctx)
 {
     struct domain_iommu *hd = dom_iommu(d);
-    struct iommu_context *ctx = iommu_default_context(d);
     unsigned int level = (IOMMUF_order(flags) / PTE_PER_TABLE_SHIFT) + 1;
     bool contig;
-    int rc;
     unsigned long pt_mfn = 0;
     union amd_iommu_pte old;
 
     ASSERT((hd->platform_ops->page_sizes >> IOMMUF_order(flags)) &
            PAGE_SIZE_4K);
 
-    spin_lock(&ctx->arch.mapping_lock);
-
     /*
      * IOMMU mapping request can be safely ignored when the domain is dying.
      *
@@ -422,25 +418,11 @@ int cf_check amd_iommu_map_page(
      * before any page tables are freed (see iommu_free_pgtables()).
      */
     if ( d->is_dying )
-    {
-        spin_unlock(&ctx->arch.mapping_lock);
         return 0;
-    }
-
-    rc = amd_iommu_alloc_root(d);
-    if ( rc )
-    {
-        spin_unlock(&ctx->arch.mapping_lock);
-        AMD_IOMMU_ERROR("root table alloc failed, dfn = %"PRI_dfn"\n",
-                        dfn_x(dfn));
-        domain_crash(d);
-        return rc;
-    }
 
     if ( iommu_pde_from_dfn(d, ctx, dfn_x(dfn), level, &pt_mfn, flush_flags, true) ||
          !pt_mfn )
     {
-        spin_unlock(&ctx->arch.mapping_lock);
         AMD_IOMMU_ERROR("invalid IO pagetable entry dfn = %"PRI_dfn"\n",
                         dfn_x(dfn));
         domain_crash(d);
@@ -452,7 +434,7 @@ int cf_check amd_iommu_map_page(
                                 flags & IOMMUF_writable,
                                 flags & IOMMUF_readable, &contig);
 
-    while ( unlikely(contig) && ++level < ctx->arch.amd.paging_mode )
+    while ( unlikely(contig) && ++level < hd->arch.amd.paging_mode )
     {
         struct page_info *pg = mfn_to_page(_mfn(pt_mfn));
         unsigned long next_mfn;
@@ -471,8 +453,6 @@ int cf_check amd_iommu_map_page(
         perfc_incr(iommu_pt_coalesces);
     }
 
-    spin_unlock(&ctx->arch.mapping_lock);
-
     *flush_flags |= IOMMU_FLUSHF_added;
     if ( old.pr )
     {
@@ -486,11 +466,11 @@ int cf_check amd_iommu_map_page(
 }
 
 int cf_check amd_iommu_unmap_page(
-    struct domain *d, dfn_t dfn, unsigned int order, unsigned int *flush_flags)
+    struct domain *d, dfn_t dfn, unsigned int order, unsigned int *flush_flags,
+    struct iommu_context *ctx)
 {
     unsigned long pt_mfn = 0;
     struct domain_iommu *hd = dom_iommu(d);
-    struct iommu_context *ctx = iommu_default_context(d);
     unsigned int level = (order / PTE_PER_TABLE_SHIFT) + 1;
     union amd_iommu_pte old = {};
 
@@ -500,17 +480,11 @@ int cf_check amd_iommu_unmap_page(
      */
     ASSERT((hd->platform_ops->page_sizes >> order) & PAGE_SIZE_4K);
 
-    spin_lock(&ctx->arch.mapping_lock);
-
     if ( !ctx->arch.amd.root_table )
-    {
-        spin_unlock(&ctx->arch.mapping_lock);
         return 0;
-    }
 
     if ( iommu_pde_from_dfn(d, ctx, dfn_x(dfn), level, &pt_mfn, flush_flags, false) )
     {
-        spin_unlock(&ctx->arch.mapping_lock);
         AMD_IOMMU_ERROR("invalid IO pagetable entry dfn = %"PRI_dfn"\n",
                         dfn_x(dfn));
         domain_crash(d);
@@ -524,7 +498,7 @@ int cf_check amd_iommu_unmap_page(
         /* Mark PTE as 'page not present'. */
         old = clear_iommu_pte_present(pt_mfn, dfn_x(dfn), level, &free);
 
-        while ( unlikely(free) && ++level < ctx->arch.amd.paging_mode )
+        while ( unlikely(free) && ++level < hd->arch.amd.paging_mode )
         {
             struct page_info *pg = mfn_to_page(_mfn(pt_mfn));
 
@@ -540,8 +514,6 @@ int cf_check amd_iommu_unmap_page(
         }
     }
 
-    spin_unlock(&ctx->arch.mapping_lock);
-
     if ( old.pr )
     {
         *flush_flags |= IOMMU_FLUSHF_modified;
@@ -608,7 +580,7 @@ static unsigned long flush_count(unsigned long dfn, unsigned long page_count,
 }
 
 int cf_check amd_iommu_flush_iotlb_pages(
-    struct domain *d, dfn_t dfn, unsigned long page_count,
+    struct domain *d, struct iommu_context *ctx, dfn_t dfn, unsigned long page_count,
     unsigned int flush_flags)
 {
     unsigned long dfn_l = dfn_x(dfn);
@@ -626,7 +598,7 @@ int cf_check amd_iommu_flush_iotlb_pages(
     /* If so requested or if the range wraps then just flush everything. */
     if ( (flush_flags & IOMMU_FLUSHF_all) || dfn_l + page_count < dfn_l )
     {
-        amd_iommu_flush_all_pages(d);
+        amd_iommu_flush_all_pages(d, ctx);
         return 0;
     }
 
@@ -639,13 +611,13 @@ int cf_check amd_iommu_flush_iotlb_pages(
      *       flush code.
      */
     if ( page_count == 1 ) /* order 0 flush count */
-        amd_iommu_flush_pages(d, dfn_l, 0);
+        amd_iommu_flush_pages(d, ctx, dfn_l, 0);
     else if ( flush_count(dfn_l, page_count, 9) == 1 )
-        amd_iommu_flush_pages(d, dfn_l, 9);
+        amd_iommu_flush_pages(d, ctx, dfn_l, 9);
     else if ( flush_count(dfn_l, page_count, 18) == 1 )
-        amd_iommu_flush_pages(d, dfn_l, 18);
+        amd_iommu_flush_pages(d, ctx, dfn_l, 18);
     else
-        amd_iommu_flush_all_pages(d);
+        amd_iommu_flush_all_pages(d, ctx);
 
     return 0;
 }
diff --git a/xen/drivers/passthrough/amd/pci_amd_iommu.c b/xen/drivers/passthrough/amd/pci_amd_iommu.c
index c871660661..3c17d78caf 100644
--- a/xen/drivers/passthrough/amd/pci_amd_iommu.c
+++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c
@@ -20,8 +20,11 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include 
+#include 
 
 #include "iommu.h"
 #include "../ats.h"
@@ -85,18 +88,6 @@ int get_dma_requestor_id(uint16_t seg, uint16_t bdf)
     return req_id;
 }
 
-static int __must_check allocate_domain_resources(struct domain *d)
-{
-    struct iommu_context *ctx = iommu_default_context(d);
-    int rc;
-
-    spin_lock(&ctx->arch.mapping_lock);
-    rc = amd_iommu_alloc_root(d);
-    spin_unlock(&ctx->arch.mapping_lock);
-
-    return rc;
-}
-
 static bool any_pdev_behind_iommu(const struct domain *d,
                                   const struct pci_dev *exclude,
                                   const struct amd_iommu *iommu)
@@ -127,8 +118,9 @@ static bool use_ats(
 
 static int __must_check amd_iommu_setup_domain_device(
     struct domain *domain, struct iommu_context *ctx, struct amd_iommu *iommu,
-    uint8_t devfn, struct pci_dev *pdev)
+    uint8_t devfn, struct pci_dev *pdev, struct iommu_context *prev_ctx)
 {
+    struct domain_iommu *hd = dom_iommu(domain);
     struct amd_iommu_dte *table, *dte;
     unsigned long flags;
     unsigned int req_id, sr_flags;
@@ -138,11 +130,7 @@ static int __must_check amd_iommu_setup_domain_device(
     const struct page_info *root_pg;
     domid_t domid;
 
-    BUG_ON(!ctx->arch.amd.paging_mode || !iommu->dev_table.buffer);
-
-    rc = allocate_domain_resources(domain);
-    if ( rc )
-        return rc;
+    BUG_ON(!hd->arch.amd.paging_mode || !iommu->dev_table.buffer);
 
     req_id = get_dma_requestor_id(iommu->sbdf.seg, pdev->sbdf.bdf);
     ivrs_dev = &get_ivrs_mappings(iommu->sbdf.seg)[req_id];
@@ -157,7 +145,7 @@ static int __must_check amd_iommu_setup_domain_device(
     ivrs_dev = &get_ivrs_mappings(iommu->sbdf.seg)[req_id];
 
     root_pg = ctx->arch.amd.root_table;
-    domid = domain->domain_id;
+    domid = ctx->arch.amd.didmap[iommu->index];
 
     spin_lock_irqsave(&iommu->lock, flags);
 
@@ -166,7 +154,7 @@ static int __must_check amd_iommu_setup_domain_device(
         /* bind DTE to domain page-tables */
         rc = amd_iommu_set_root_page_table(
                  dte, page_to_maddr(root_pg), domid,
-                 ctx->arch.amd.paging_mode, sr_flags);
+                 hd->arch.amd.paging_mode, sr_flags);
         if ( rc )
         {
             ASSERT(rc < 0);
@@ -208,7 +196,7 @@ static int __must_check amd_iommu_setup_domain_device(
         else
             rc = amd_iommu_set_root_page_table(
                      dte, page_to_maddr(root_pg), domid,
-                     ctx->arch.amd.paging_mode, sr_flags);
+                     hd->arch.amd.paging_mode, sr_flags);
         if ( rc < 0 )
         {
             spin_unlock_irqrestore(&iommu->lock, flags);
@@ -251,6 +239,7 @@ static int __must_check amd_iommu_setup_domain_device(
         spin_unlock_irqrestore(&iommu->lock, flags);
 
         amd_iommu_flush_device(iommu, req_id, prev_domid);
+        amd_iommu_flush_device(iommu, req_id, domid);
     }
     else
         spin_unlock_irqrestore(&iommu->lock, flags);
@@ -259,7 +248,7 @@ static int __must_check amd_iommu_setup_domain_device(
                     "root table = %#"PRIx64", "
                     "domain = %d, paging mode = %d\n",
                     req_id, pdev->type, page_to_maddr(root_pg),
-                    domid, ctx->arch.amd.paging_mode);
+                    domid, hd->arch.amd.paging_mode);
 
     ASSERT(pcidevs_locked());
 
@@ -272,6 +261,15 @@ static int __must_check amd_iommu_setup_domain_device(
         amd_iommu_flush_iotlb(devfn, pdev, INV_IOMMU_ALL_PAGES_ADDRESS, 0);
     }
 
+    if ( prev_ctx )
+    {
+        /* Don't underflow the counter. */
+        BUG_ON(!prev_ctx->arch.amd.iommu_dev_cnt[iommu->index]);
+        prev_ctx->arch.amd.iommu_dev_cnt[iommu->index]--;
+    }
+
+    ctx->arch.amd.iommu_dev_cnt[iommu->index]++;
+
     return 0;
 }
 
@@ -338,27 +336,12 @@ static int cf_check iov_enable_xt(void)
     return 0;
 }
 
-int amd_iommu_alloc_root(struct domain *d)
-{
-    struct domain_iommu *hd = dom_iommu(d);
-    struct iommu_context *ctx = iommu_default_context(d);
-
-    if ( unlikely(!ctx->arch.amd.root_table) && d != dom_io )
-    {
-        ctx->arch.amd.root_table = iommu_alloc_pgtable(hd, ctx, 0);
-        if ( !ctx->arch.amd.root_table )
-            return -ENOMEM;
-    }
-
-    return 0;
-}
-
 unsigned int __read_mostly amd_iommu_max_paging_mode = IOMMU_MAX_PT_LEVELS;
 int __read_mostly amd_iommu_min_paging_mode = 1;
 
 static int cf_check amd_iommu_domain_init(struct domain *d)
 {
-    struct iommu_context *ctx = iommu_default_context(d);
+    struct domain_iommu *hd = dom_iommu(d);
     int pglvl = amd_iommu_get_paging_mode(
                     1UL << (domain_max_paddr_bits(d) - PAGE_SHIFT));
 
@@ -369,20 +352,20 @@ static int cf_check amd_iommu_domain_init(struct domain *d)
      * Choose the number of levels for the IOMMU page tables, taking into
      * account unity maps.
      */
-    ctx->arch.amd.paging_mode = max(pglvl, amd_iommu_min_paging_mode);
+    hd->arch.amd.paging_mode = max(pglvl, amd_iommu_min_paging_mode);
 
     return 0;
 }
 
-static int cf_check amd_iommu_add_device(u8 devfn, struct pci_dev *pdev);
+static int __hwdom_init cf_check setup_hwdom_device(u8 devfn, struct pci_dev *pdev)
+{
+    return iommu_attach_context(hardware_domain, pdev, 0);
+}
 
 static void __hwdom_init cf_check amd_iommu_hwdom_init(struct domain *d)
 {
     const struct amd_iommu *iommu;
 
-    if ( allocate_domain_resources(d) )
-        BUG();
-
     for_each_amd_iommu ( iommu )
         if ( iomem_deny_access(d, PFN_DOWN(iommu->mmio_base_phys),
                                PFN_DOWN(iommu->mmio_base_phys +
@@ -391,11 +374,12 @@ static void __hwdom_init cf_check amd_iommu_hwdom_init(struct domain *d)
 
     /* Make sure workarounds are applied (if needed) before adding devices. */
     arch_iommu_hwdom_init(d);
-    setup_hwdom_pci_devices(d, amd_iommu_add_device);
+    setup_hwdom_pci_devices(d, setup_hwdom_device);
 }
 
 static void amd_iommu_disable_domain_device(const struct domain *domain,
                                             struct amd_iommu *iommu,
+                                            struct iommu_context *prev_ctx,
                                             uint8_t devfn, struct pci_dev *pdev)
 {
     struct amd_iommu_dte *table, *dte;
@@ -442,155 +426,82 @@ static void amd_iommu_disable_domain_device(const struct domain *domain,
         AMD_IOMMU_DEBUG("Disable: device id = %#x, "
                         "domain = %d, paging mode = %d\n",
                         req_id, dte->domain_id,
-                        iommu_default_context(domain)->arch.amd.paging_mode);
+                        dom_iommu(domain)->arch.amd.paging_mode);
     }
     else
         spin_unlock_irqrestore(&iommu->lock, flags);
+
+    BUG_ON(!prev_ctx->arch.amd.iommu_dev_cnt[iommu->index]);
+    prev_ctx->arch.amd.iommu_dev_cnt[iommu->index]--;
 }
 
-static int cf_check reassign_device(
-    struct domain *source, struct domain *target, u8 devfn,
-    struct pci_dev *pdev)
+static int cf_check amd_iommu_context_init(struct domain *d, struct iommu_context *ctx,
+                                           u32 flags)
 {
     struct amd_iommu *iommu;
-    struct iommu_context *target_ctx = iommu_default_context(target);
-    struct iommu_context *source_ctx = iommu_default_context(source);
-    int rc;
+    struct domain_iommu *hd = dom_iommu(d);
 
-    iommu = find_iommu_for_device(pdev->sbdf);
-    if ( !iommu )
+    ctx->arch.amd.didmap = xzalloc_array(domid_t, nr_amd_iommus);
+    if ( !ctx->arch.amd.didmap )
+        return -ENOMEM;
+
+    ctx->arch.amd.iommu_dev_cnt = xzalloc_array(unsigned long, nr_amd_iommus);
+    if ( !ctx->arch.amd.iommu_dev_cnt )
     {
-        AMD_IOMMU_WARN("failed to find IOMMU: %pp cannot be assigned to %pd\n",
-                       &PCI_SBDF(pdev->seg, pdev->bus, devfn), target);
-        return -ENODEV;
+        xfree(ctx->arch.amd.didmap);
+        return -ENOMEM;
     }
 
-    rc = amd_iommu_setup_domain_device(target, target_ctx, iommu, devfn, pdev);
-    if ( rc )
-        return rc;
-
-    if ( devfn == pdev->devfn && pdev->domain != target )
+    // TODO: Allocate IOMMU domid only when attaching devices ?
+    /* Populate context DID map using pseudo DIDs */
+    for_each_amd_iommu(iommu)
     {
-        write_lock(&source->pci_lock);
-        list_del(&pdev->domain_list);
-        write_unlock(&source->pci_lock);
-
-        pdev->domain = target;
-
-        write_lock(&target->pci_lock);
-        list_add(&pdev->domain_list, &target->pdev_list);
-        write_unlock(&target->pci_lock);
+        ctx->arch.amd.didmap[iommu->index] =
+            iommu_alloc_domid(iommu->domid_map);
     }
 
-    /*
-     * If the device belongs to the hardware domain, and it has a unity mapping,
-     * don't remove it from the hardware domain, because BIOS may reference that
-     * mapping.
-     */
-    if ( !is_hardware_domain(source) )
+    if ( !ctx->opaque )
     {
-        const struct ivrs_mappings *ivrs_mappings = get_ivrs_mappings(pdev->seg);
-        unsigned int bdf = PCI_BDF(pdev->bus, devfn);
-
-        rc = amd_iommu_reserve_domain_unity_unmap(
-                 source, source_ctx,
-                 ivrs_mappings[get_dma_requestor_id(pdev->seg, bdf)].unity_map);
-        if ( rc )
-            return rc;
+        /* Create initial context page */
+        ctx->arch.amd.root_table = iommu_alloc_pgtable(hd, ctx, 0);
     }
 
-    AMD_IOMMU_DEBUG("Re-assign %pp from %pd to %pd\n",
-                    &PCI_SBDF(pdev->seg, pdev->bus, devfn), source, target);
+    return arch_iommu_context_init(d, ctx, flags);
 
-    return 0;
 }
 
-static int cf_check amd_iommu_assign_device(
-    struct domain *d, u8 devfn, struct pci_dev *pdev, u32 flag)
+static int cf_check amd_iommu_context_teardown(struct domain *d,
+                                        struct iommu_context *ctx, u32 flags)
 {
-    struct ivrs_mappings *ivrs_mappings = get_ivrs_mappings(pdev->seg);
-    unsigned int bdf = PCI_BDF(pdev->bus, devfn);
-    int req_id = get_dma_requestor_id(pdev->seg, bdf);
-    int rc = amd_iommu_reserve_domain_unity_map(
-                 d, iommu_default_context(d),
-                 ivrs_mappings[req_id].unity_map, flag);
+    struct amd_iommu *iommu;
+    pcidevs_lock();
 
-    if ( !rc )
-        rc = reassign_device(pdev->domain, d, devfn, pdev);
+    // TODO: Cleanup mappings
+    ASSERT(ctx->arch.amd.didmap);
 
-    if ( rc && !is_hardware_domain(d) )
+    for_each_amd_iommu(iommu)
     {
-        int ret = amd_iommu_reserve_domain_unity_unmap(
-                      d, iommu_default_context(d),
-                      ivrs_mappings[req_id].unity_map);
-
-        if ( ret )
-        {
-            printk(XENLOG_ERR "AMD-Vi: "
-                   "unity-unmap for %pd/%04x:%02x:%02x.%u failed (%d)\n",
-                   d, pdev->seg, pdev->bus,
-                   PCI_SLOT(devfn), PCI_FUNC(devfn), ret);
-            domain_crash(d);
-        }
+        iommu_free_domid(ctx->arch.amd.didmap[iommu->index], iommu->domid_map);
     }
 
-    return rc;
-}
-
-static void cf_check amd_iommu_clear_root_pgtable(struct domain *d)
-{
-    struct iommu_context *ctx = iommu_default_context(d);
-
-    spin_lock(&ctx->arch.mapping_lock);
-    ctx->arch.amd.root_table = NULL;
-    spin_unlock(&ctx->arch.mapping_lock);
-}
-
-static void cf_check amd_iommu_domain_destroy(struct domain *d)
-{
-    struct iommu_context *ctx = iommu_default_context(d);
+    xfree(ctx->arch.amd.didmap);
 
-    iommu_identity_map_teardown(d, ctx);
-    ASSERT(!ctx->arch.amd.root_table);
+    pcidevs_unlock();
+    return arch_iommu_context_teardown(d, ctx, flags);
 }
 
-static int cf_check amd_iommu_add_device(u8 devfn, struct pci_dev *pdev)
+static int cf_check amd_iommu_attach(
+    struct domain *d, struct pci_dev *pdev, struct iommu_context *ctx)
 {
-    struct amd_iommu *iommu;
-    struct iommu_context *ctx;
-    u16 bdf;
-    struct ivrs_mappings *ivrs_mappings;
-
-    if ( !pdev->domain )
-        return -EINVAL;
-
-    ctx = iommu_default_context(pdev->domain);
-
-    for_each_amd_iommu(iommu)
-        if ( pdev->sbdf.sbdf == iommu->sbdf.sbdf )
-            return is_hardware_domain(pdev->domain) ? 0 : -ENODEV;
-
-    iommu = find_iommu_for_device(pdev->sbdf);
-    if ( unlikely(!iommu) )
-    {
-        /* Filter bridge devices. */
-        if ( pdev->type == DEV_TYPE_PCI_HOST_BRIDGE &&
-             is_hardware_domain(pdev->domain) )
-        {
-            AMD_IOMMU_DEBUG("Skipping host bridge %pp\n", &pdev->sbdf);
-            return 0;
-        }
-
-        AMD_IOMMU_WARN("no IOMMU for %pp; cannot be handed to %pd\n",
-                        &PCI_SBDF(pdev->seg, pdev->bus, devfn), pdev->domain);
-        return -ENODEV;
-    }
+    int ret;
+    struct ivrs_mappings *ivrs_mappings = get_ivrs_mappings(pdev->seg);
+    int req_id = get_dma_requestor_id(pdev->seg, pdev->sbdf.bdf);
+    struct ivrs_unity_map *map = ivrs_mappings[req_id].unity_map;
+    struct amd_iommu *iommu = find_iommu_for_device(pdev->sbdf);
+    uint16_t bdf = pdev->sbdf.bdf;
 
-    ivrs_mappings = get_ivrs_mappings(pdev->seg);
-    bdf = PCI_BDF(pdev->bus, devfn);
-    if ( !ivrs_mappings ||
-         !ivrs_mappings[ivrs_mappings[bdf].dte_requestor_id].valid )
-        return -EPERM;
+    if ( !iommu )
+        return 0;
 
     if ( iommu_intremap &&
          ivrs_mappings[bdf].dte_requestor_id == bdf &&
@@ -621,55 +532,98 @@ static int cf_check amd_iommu_add_device(u8 devfn, struct pci_dev *pdev)
         amd_iommu_flush_device(iommu, bdf, DOMID_INVALID);
     }
 
-    if ( amd_iommu_reserve_domain_unity_map(
-             pdev->domain, ctx,
-             ivrs_mappings[ivrs_mappings[bdf].dte_requestor_id].unity_map,
-             0) )
-        AMD_IOMMU_WARN("%pd: unity mapping failed for %pp\n",
-                       pdev->domain, &PCI_SBDF(pdev->seg, bdf));
+    ret = amd_iommu_reserve_domain_unity_map(d, ctx, map, 0);
+    if ( ret )
+        return ret;
 
-    return amd_iommu_setup_domain_device(pdev->domain, ctx, iommu, devfn, pdev);
+    return amd_iommu_setup_domain_device(d, ctx, iommu, pdev->devfn, pdev, NULL);
 }
 
-static int cf_check amd_iommu_remove_device(u8 devfn, struct pci_dev *pdev)
+static int cf_check amd_iommu_detach(struct domain *d, struct pci_dev *pdev,
+                                     struct iommu_context *prev_ctx)
 {
-    struct amd_iommu *iommu;
-    struct iommu_context *ctx;
-    u16 bdf;
-    struct ivrs_mappings *ivrs_mappings;
+    struct ivrs_mappings *ivrs_mappings = get_ivrs_mappings(pdev->seg);
+    int req_id = get_dma_requestor_id(pdev->seg, pdev->sbdf.bdf);
+    struct amd_iommu *iommu = find_iommu_for_device(pdev->sbdf);
 
-    if ( !pdev->domain )
-        return -EINVAL;
+    if ( !iommu )
+        return 0;
 
-    ctx = iommu_default_context(pdev->domain);
+    amd_iommu_disable_domain_device(d, iommu, prev_ctx, pdev->devfn, pdev);
+
+    return amd_iommu_reserve_domain_unity_unmap(d, prev_ctx, ivrs_mappings[req_id].unity_map);
+}
+
+static int cf_check amd_iommu_add_devfn(struct domain *d, struct pci_dev *pdev,
+                                        u16 devfn, struct iommu_context *ctx)
+{
+    struct amd_iommu *iommu = find_iommu_for_device(pdev->sbdf);
 
-    iommu = find_iommu_for_device(pdev->sbdf);
     if ( !iommu )
+        return 0;
+
+    return amd_iommu_setup_domain_device(d, ctx, iommu, pdev->devfn, pdev, NULL);
+}
+
+static int cf_check amd_iommu_remove_devfn(struct domain *d, struct pci_dev *pdev,
+                                           u16 devfn, struct iommu_context *prev_ctx)
+{
+    struct amd_iommu *iommu = find_iommu_for_device(pdev->sbdf);
+
+    if ( !iommu )
+        return 0;
+
+    amd_iommu_disable_domain_device(d, iommu, prev_ctx, pdev->devfn, pdev);
+
+    return 0;
+}
+
+static int cf_check amd_iommu_reattach(struct domain *d,
+                                       struct pci_dev *pdev,
+                                       struct iommu_context *prev_ctx,
+                                       struct iommu_context *ctx)
+{
+    int ret, rc, req_id = get_dma_requestor_id(pdev->seg, pdev->sbdf.bdf);
+    struct ivrs_mappings *ivrs_mapping = &get_ivrs_mappings(pdev->seg)[req_id];
+    struct ivrs_unity_map *map = ivrs_mapping ? ivrs_mapping->unity_map : NULL;
+    struct amd_iommu *iommu = find_iommu_for_device(pdev->sbdf);
+
+    if ( !iommu )
+        return 0;
+
+    ret = amd_iommu_reserve_domain_unity_map(d, ctx, map, 0);
+    if ( ret )
+        return ret;
+
+    ret = amd_iommu_setup_domain_device(d, ctx, ivrs_mapping->iommu, pdev->devfn,
+                                        pdev, prev_ctx);
+    if ( ret )
     {
-        AMD_IOMMU_WARN("failed to find IOMMU: %pp cannot be removed from %pd\n",
-                        &PCI_SBDF(pdev->seg, pdev->bus, devfn), pdev->domain);
-        return -ENODEV;
-    }
+        if ( (rc = amd_iommu_reserve_domain_unity_unmap(d, ctx, map)) )
+            AMD_IOMMU_DEBUG(" Unable to unmap RMRR from d%dc%d for %pp (%d)\n",
+                            d->domain_id, prev_ctx->id, &pdev->sbdf, rc);
 
-    amd_iommu_disable_domain_device(pdev->domain, iommu, devfn, pdev);
+        return ret;
+    }
 
-    ivrs_mappings = get_ivrs_mappings(pdev->seg);
-    bdf = PCI_BDF(pdev->bus, devfn);
+    if ( (rc = amd_iommu_reserve_domain_unity_unmap(d, prev_ctx, map)) )
+        AMD_IOMMU_DEBUG(" Unable to unmap previous RMRR for %pp (%d)\n",
+                        &pdev->sbdf, rc);
 
-    if ( amd_iommu_reserve_domain_unity_unmap(
-             pdev->domain, ctx,
-             ivrs_mappings[ivrs_mappings[bdf].dte_requestor_id].unity_map) )
-        AMD_IOMMU_WARN("%pd: unity unmapping failed for %pp\n",
-                       pdev->domain, &PCI_SBDF(pdev->seg, bdf));
+    return ret;
+}
 
-    amd_iommu_quarantine_teardown(pdev);
+static void cf_check amd_iommu_clear_root_pgtable(struct domain *d, struct iommu_context *ctx)
+{
+    ctx->arch.amd.root_table = NULL;
+}
 
-    if ( amd_iommu_perdev_intremap &&
-         ivrs_mappings[bdf].dte_requestor_id == bdf &&
-         ivrs_mappings[bdf].intremap_table )
-        amd_iommu_free_intremap_table(iommu, &ivrs_mappings[bdf], bdf);
+static void cf_check amd_iommu_domain_destroy(struct domain *d)
+{
+    struct iommu_context *ctx = iommu_default_context(d);
 
-    return 0;
+    iommu_identity_map_teardown(d, ctx);
+    ASSERT(!ctx->arch.amd.root_table);
 }
 
 static int cf_check amd_iommu_group_id(u16 seg, u8 bus, u8 devfn)
@@ -729,30 +683,45 @@ static void amd_dump_page_table_level(struct page_info *pg, int level,
 
 static void cf_check amd_dump_page_tables(struct domain *d)
 {
-    struct iommu_context *ctx = iommu_default_context(d);
+    unsigned int i;
+    struct domain_iommu *hd = dom_iommu(d);
+    struct iommu_context *ctx;
 
-    if ( !ctx->arch.amd.root_table )
-        return;
+    if (d == dom_io)
+        printk("d[IO] page tables\n");
+    else
+        printk("d%hu page tables\n", d->domain_id);
+
+    for (i = 0; i < (1 + hd->other_contexts.count); ++i)
+    {
+        if ( (ctx = iommu_get_context(d, i)) )
+        {
+            printk(" Context %d (%"PRI_mfn")\n", i,
+                   mfn_x(page_to_mfn(ctx->arch.amd.root_table)));
 
-    printk("AMD IOMMU %pd table has %u levels\n", d, ctx->arch.amd.paging_mode);
-    amd_dump_page_table_level(ctx->arch.amd.root_table,
-                              ctx->arch.amd.paging_mode, 0, 0);
+            amd_dump_page_table_level(ctx->arch.amd.root_table,
+                                      hd->arch.amd.paging_mode, 0, 0);
+            iommu_put_context(ctx);
+        }
+    }
 }
 
 static const struct iommu_ops __initconst_cf_clobber _iommu_ops = {
     .page_sizes = PAGE_SIZE_4K | PAGE_SIZE_2M | PAGE_SIZE_1G,
     .init = amd_iommu_domain_init,
     .hwdom_init = amd_iommu_hwdom_init,
-    .quarantine_init = amd_iommu_quarantine_init,
-    .add_device = amd_iommu_add_device,
-    .remove_device = amd_iommu_remove_device,
-    .assign_device  = amd_iommu_assign_device,
+    .context_init = amd_iommu_context_init,
+    .context_teardown = amd_iommu_context_teardown,
+    .attach = amd_iommu_attach,
+    .detach = amd_iommu_detach,
+    .reattach = amd_iommu_reattach,
+    .add_devfn = amd_iommu_add_devfn,
+    .remove_devfn = amd_iommu_remove_devfn,
     .teardown = amd_iommu_domain_destroy,
     .clear_root_pgtable = amd_iommu_clear_root_pgtable,
     .map_page = amd_iommu_map_page,
     .unmap_page = amd_iommu_unmap_page,
     .iotlb_flush = amd_iommu_flush_iotlb_pages,
-    .reassign_device = reassign_device,
     .get_device_group_id = amd_iommu_group_id,
     .enable_x2apic = iov_enable_xt,
     .update_ire_from_apic = amd_iommu_ioapic_update_ire,
diff --git a/xen/drivers/passthrough/iommu.c b/xen/drivers/passthrough/iommu.c
index 32c5011820..feda2e390b 100644
--- a/xen/drivers/passthrough/iommu.c
+++ b/xen/drivers/passthrough/iommu.c
@@ -208,13 +208,15 @@ int iommu_domain_init(struct domain *d, unsigned int opts)
     hd->node = NUMA_NO_NODE;
 #endif
 
+    rspin_lock_init(&hd->default_ctx.lock);
+
     ret = arch_iommu_domain_init(d);
     if ( ret )
         return ret;
 
     hd->platform_ops = iommu_get_ops();
     ret = iommu_call(hd->platform_ops, init, d);
-    if ( ret || is_system_domain(d) )
+    if ( ret || (is_system_domain(d) && d != dom_io) )
         return ret;
 
     /*
@@ -236,7 +238,17 @@ int iommu_domain_init(struct domain *d, unsigned int opts)
 
     ASSERT(!(hd->need_sync && hd->hap_pt_share));
 
-    return 0;
+    rspin_lock(&hd->default_ctx.lock);
+    ret = iommu_context_init(d, &hd->default_ctx, 0, IOMMU_CONTEXT_INIT_default);
+    rspin_unlock(&hd->default_ctx.lock);
+
+    rwlock_init(&hd->other_contexts.lock);
+    hd->other_contexts.initialized = (atomic_t)ATOMIC_INIT(0);
+    hd->other_contexts.count = 0;
+    hd->other_contexts.bitmap = NULL;
+    hd->other_contexts.map = NULL;
+
+    return ret;
 }
 
 static void cf_check iommu_dump_page_tables(unsigned char key)
@@ -249,14 +261,11 @@ static void cf_check iommu_dump_page_tables(unsigned char key)
 
     for_each_domain(d)
     {
-        if ( is_hardware_domain(d) || !is_iommu_enabled(d) )
+        if ( !is_iommu_enabled(d) )
             continue;
 
         if ( iommu_use_hap_pt(d) )
-        {
             printk("%pd sharing page tables\n", d);
-            continue;
-        }
 
         iommu_vcall(dom_iommu(d)->platform_ops, dump_page_tables, d);
     }
@@ -274,9 +283,13 @@ void __hwdom_init iommu_hwdom_init(struct domain *d)
     iommu_vcall(hd->platform_ops, hwdom_init, d);
 }
 
-static void iommu_teardown(struct domain *d)
+void cf_check iommu_domain_destroy(struct domain *d)
 {
     struct domain_iommu *hd = dom_iommu(d);
+    struct pci_dev *pdev;
+
+    if ( !is_iommu_enabled(d) )
+        return;
 
     /*
      * During early domain creation failure, we may reach here with the
@@ -285,17 +298,68 @@ static void iommu_teardown(struct domain *d)
     if ( !hd->platform_ops )
         return;
 
+    /* Move all devices back to quarantine */
+    /* TODO: Is it needed ? */
+    for_each_pdev(d, pdev)
+    {
+        int rc = iommu_reattach_context(d, dom_io, pdev, 0);
+
+        if ( rc )
+        {
+            printk(XENLOG_WARNING "Unable to quarantine device %pp (%d)\n", &pdev->sbdf, rc);
+            pdev->broken = true;
+        }
+        else
+            pdev->domain = dom_io;
+    }
+
     iommu_vcall(hd->platform_ops, teardown, d);
+
+    arch_iommu_domain_destroy(d);
 }
 
-void iommu_domain_destroy(struct domain *d)
-{
-    if ( !is_iommu_enabled(d) )
-        return;
+bool cf_check iommu_check_context(struct domain *d, uint16_t ctx_id) {
+    struct domain_iommu *hd = dom_iommu(d);
 
-    iommu_teardown(d);
+    if ( ctx_id == 0 )
+        return true; /* Default context always exist. */
 
-    arch_iommu_domain_destroy(d);
+    if ( (ctx_id - 1) >= hd->other_contexts.count )
+        return false; /* out of bounds */
+
+    if ( ctx_id == IOMMU_INVALID_CONTEXT_ID )
+        return false; /* Invalid ID */
+
+    return test_bit(ctx_id - 1, hd->other_contexts.bitmap);
+}
+
+struct iommu_context * cf_check iommu_get_context(struct domain *d, uint16_t ctx_id) {
+    struct domain_iommu *hd = dom_iommu(d);
+    struct iommu_context *ctx;
+
+    if ( !iommu_check_context(d, ctx_id) )
+        return NULL;
+
+    if (ctx_id == 0)
+        ctx = &hd->default_ctx;
+    else
+        ctx = &hd->other_contexts.map[ctx_id - 1];
+
+    rspin_lock(&ctx->lock);
+    /* Check if the context is still valid at this point */
+    if ( unlikely(!iommu_check_context(d, ctx_id)) )
+    {
+        /* Context has been destroyed in between */
+        rspin_unlock(&ctx->lock);
+        return NULL;
+    }
+
+    return ctx;
+}
+
+void cf_check iommu_put_context(struct iommu_context *ctx)
+{
+    rspin_unlock(&ctx->lock);
 }
 
 static unsigned int mapping_order(const struct domain_iommu *hd,
@@ -323,11 +387,11 @@ static unsigned int mapping_order(const struct domain_iommu *hd,
     return order;
 }
 
-long iommu_map(struct domain *d, dfn_t dfn0, mfn_t mfn0,
-               unsigned long page_count, unsigned int flags,
-               unsigned int *flush_flags)
+static long _iommu_map(struct domain *d, dfn_t dfn0, mfn_t mfn0,
+                       unsigned long page_count, unsigned int flags,
+                       unsigned int *flush_flags, struct iommu_context *ctx)
 {
-    const struct domain_iommu *hd = dom_iommu(d);
+    struct domain_iommu *hd = dom_iommu(d);
     unsigned long i;
     unsigned int order, j = 0;
     int rc = 0;
@@ -350,7 +414,7 @@ long iommu_map(struct domain *d, dfn_t dfn0, mfn_t mfn0,
             return i;
 
         rc = iommu_call(hd->platform_ops, map_page, d, dfn, mfn,
-                        flags | IOMMUF_order(order), flush_flags);
+                        flags | IOMMUF_order(order), flush_flags, ctx);
 
         if ( likely(!rc) )
             continue;
@@ -361,10 +425,10 @@ long iommu_map(struct domain *d, dfn_t dfn0, mfn_t mfn0,
                    d->domain_id, dfn_x(dfn), mfn_x(mfn), rc);
 
         /* while statement to satisfy __must_check */
-        while ( iommu_unmap(d, dfn0, i, 0, flush_flags) )
+        while ( iommu_unmap(d, dfn0, i, 0, flush_flags, ctx->id) )
             break;
 
-        if ( !is_hardware_domain(d) )
+        if ( !ctx->id && !is_hardware_domain(d) )
             domain_crash(d);
 
         break;
@@ -375,43 +439,67 @@ long iommu_map(struct domain *d, dfn_t dfn0, mfn_t mfn0,
      * page, flush everything and clear flush flags.
      */
     if ( page_count > 1 && unlikely(rc) &&
-         !iommu_iotlb_flush_all(d, *flush_flags) )
+         !iommu_iotlb_flush_all(d, ctx->id, *flush_flags) )
         *flush_flags = 0;
 
     return rc;
 }
 
+long iommu_map(struct domain *d, dfn_t dfn0, mfn_t mfn0,
+               unsigned long page_count, unsigned int flags,
+               unsigned int *flush_flags, uint16_t ctx_id)
+{
+    struct iommu_context *ctx;
+    long ret;
+
+    if ( !(ctx = iommu_get_context(d, ctx_id)) )
+        return -ENOENT;
+
+    ret = _iommu_map(d, dfn0, mfn0, page_count, flags, flush_flags, ctx);
+
+    iommu_put_context(ctx);
+
+    return ret;
+}
+
 int iommu_legacy_map(struct domain *d, dfn_t dfn, mfn_t mfn,
                      unsigned long page_count, unsigned int flags)
 {
+    struct iommu_context *ctx;
     unsigned int flush_flags = 0;
-    int rc;
+    int rc = 0;
 
     ASSERT(!(flags & IOMMUF_preempt));
-    rc = iommu_map(d, dfn, mfn, page_count, flags, &flush_flags);
 
-    if ( !this_cpu(iommu_dont_flush_iotlb) && !rc )
-        rc = iommu_iotlb_flush(d, dfn, page_count, flush_flags);
+    ctx = iommu_get_context(d, 0);
+
+    if ( !ctx->opaque )
+    {
+        rc = iommu_map(d, dfn, mfn, page_count, flags, &flush_flags, 0);
+
+        if ( !this_cpu(iommu_dont_flush_iotlb) && !rc )
+            rc = iommu_iotlb_flush(d, dfn, page_count, flush_flags, 0);
+    }
+
+    iommu_put_context(ctx);
 
     return rc;
 }
 
-long iommu_unmap(struct domain *d, dfn_t dfn0, unsigned long page_count,
-                 unsigned int flags, unsigned int *flush_flags)
+static long _iommu_unmap(struct domain *d, dfn_t dfn0, unsigned long page_count,
+                         unsigned int flags, unsigned int *flush_flags,
+                         struct iommu_context *ctx)
 {
-    const struct domain_iommu *hd = dom_iommu(d);
+    struct domain_iommu *hd = dom_iommu(d);
     unsigned long i;
     unsigned int order, j = 0;
     int rc = 0;
-    struct iommu_context *ctx;
 
     if ( !is_iommu_enabled(d) )
         return 0;
 
     ASSERT(!(flags & ~IOMMUF_preempt));
 
-    ctx = iommu_default_context(d);
-
     for ( i = 0; i < page_count; i += 1UL << order )
     {
         dfn_t dfn = dfn_add(dfn0, i);
@@ -425,7 +513,8 @@ long iommu_unmap(struct domain *d, dfn_t dfn0, unsigned long page_count,
             return i;
 
         err = iommu_call(hd->platform_ops, unmap_page, d, dfn,
-                         flags | IOMMUF_order(order), flush_flags);
+                         flags | IOMMUF_order(order), flush_flags,
+                         ctx);
 
         if ( likely(!err) )
             continue;
@@ -438,7 +527,7 @@ long iommu_unmap(struct domain *d, dfn_t dfn0, unsigned long page_count,
         if ( !rc )
             rc = err;
 
-        if ( !is_hardware_domain(d) )
+        if ( !ctx->id && !is_hardware_domain(d) )
         {
             domain_crash(d);
             break;
@@ -450,41 +539,74 @@ long iommu_unmap(struct domain *d, dfn_t dfn0, unsigned long page_count,
      * page, flush everything and clear flush flags.
      */
     if ( page_count > 1 && unlikely(rc) &&
-         !iommu_iotlb_flush_all(d, *flush_flags) )
+         !iommu_iotlb_flush_all(d, ctx->id, *flush_flags) )
         *flush_flags = 0;
 
     return rc;
 }
 
+long iommu_unmap(struct domain *d, dfn_t dfn0, unsigned long page_count,
+                 unsigned int flags, unsigned int *flush_flags,
+                 uint16_t ctx_id)
+{
+    struct iommu_context *ctx;
+    long ret;
+
+    if ( !(ctx = iommu_get_context(d, ctx_id)) )
+        return -ENOENT;
+
+    ret = _iommu_unmap(d, dfn0, page_count, flags, flush_flags, ctx);
+
+    iommu_put_context(ctx);
+
+    return ret;
+}
+
 int iommu_legacy_unmap(struct domain *d, dfn_t dfn, unsigned long page_count)
 {
     unsigned int flush_flags = 0;
-    int rc = iommu_unmap(d, dfn, page_count, 0, &flush_flags);
+    struct iommu_context *ctx;
+    int rc = 0;
 
-    if ( !this_cpu(iommu_dont_flush_iotlb) && !rc )
-        rc = iommu_iotlb_flush(d, dfn, page_count, flush_flags);
+    ctx = iommu_get_context(d, 0);
+
+    if ( !ctx->opaque )
+    {
+        rc = iommu_unmap(d, dfn, page_count, 0, &flush_flags, 0);
+
+        if ( !this_cpu(iommu_dont_flush_iotlb) && !rc )
+            rc = iommu_iotlb_flush(d, dfn, page_count, flush_flags, 0);
+    }
+
+    iommu_put_context(ctx);
 
     return rc;
 }
 
 int iommu_lookup_page(struct domain *d, dfn_t dfn, mfn_t *mfn,
-                      unsigned int *flags)
+                      unsigned int *flags, uint16_t ctx_id)
 {
-    const struct domain_iommu *hd = dom_iommu(d);
+    struct domain_iommu *hd = dom_iommu(d);
     struct iommu_context *ctx;
+    int ret;
 
     if ( !is_iommu_enabled(d) || !hd->platform_ops->lookup_page )
         return -EOPNOTSUPP;
 
-    ctx = iommu_default_context(d);
+    if ( !(ctx = iommu_get_context(d, ctx_id)) )
+        return -ENOENT;
 
-    return iommu_call(hd->platform_ops, lookup_page, d, dfn, mfn, flags);
+    ret = iommu_call(hd->platform_ops, lookup_page, d, dfn, mfn, flags, ctx);
+
+    iommu_put_context(ctx);
+    return ret;
 }
 
 int iommu_iotlb_flush(struct domain *d, dfn_t dfn, unsigned long page_count,
-                      unsigned int flush_flags)
+                      unsigned int flush_flags, uint16_t ctx_id)
 {
-    const struct domain_iommu *hd = dom_iommu(d);
+    struct domain_iommu *hd = dom_iommu(d);
+    struct iommu_context *ctx;
     int rc;
 
     if ( !is_iommu_enabled(d) || !hd->platform_ops->iotlb_flush ||
@@ -494,7 +616,10 @@ int iommu_iotlb_flush(struct domain *d, dfn_t dfn, unsigned long page_count,
     if ( dfn_eq(dfn, INVALID_DFN) )
         return -EINVAL;
 
-    rc = iommu_call(hd->platform_ops, iotlb_flush, d, dfn, page_count,
+    if ( !(ctx = iommu_get_context(d, ctx_id)) )
+        return -ENOENT;
+
+    rc = iommu_call(hd->platform_ops, iotlb_flush, d, ctx, dfn, page_count,
                     flush_flags);
     if ( unlikely(rc) )
     {
@@ -503,23 +628,29 @@ int iommu_iotlb_flush(struct domain *d, dfn_t dfn, unsigned long page_count,
                    "d%d: IOMMU IOTLB flush failed: %d, dfn %"PRI_dfn", page count %lu flags %x\n",
                    d->domain_id, rc, dfn_x(dfn), page_count, flush_flags);
 
-        if ( !is_hardware_domain(d) )
+        if ( !ctx->id && !is_hardware_domain(d) )
             domain_crash(d);
     }
 
+    iommu_put_context(ctx);
+
     return rc;
 }
 
-int iommu_iotlb_flush_all(struct domain *d, unsigned int flush_flags)
+int iommu_iotlb_flush_all(struct domain *d, uint16_t ctx_id, unsigned int flush_flags)
 {
-    const struct domain_iommu *hd = dom_iommu(d);
+    struct domain_iommu *hd = dom_iommu(d);
+    struct iommu_context *ctx;
     int rc;
 
     if ( !is_iommu_enabled(d) || !hd->platform_ops->iotlb_flush ||
          !flush_flags )
         return 0;
 
-    rc = iommu_call(hd->platform_ops, iotlb_flush, d, INVALID_DFN, 0,
+    if ( !(ctx = iommu_get_context(d, ctx_id)) )
+        return -ENOENT;
+
+    rc = iommu_call(hd->platform_ops, iotlb_flush, d, ctx, _dfn(0), 0,
                     flush_flags | IOMMU_FLUSHF_all);
     if ( unlikely(rc) )
     {
@@ -532,21 +663,419 @@ int iommu_iotlb_flush_all(struct domain *d, unsigned int flush_flags)
             domain_crash(d);
     }
 
+    iommu_put_context(ctx);
     return rc;
 }
 
+int cf_check iommu_context_init(struct domain *d, struct iommu_context *ctx,
+                                uint16_t ctx_id, unsigned int flags)
+{
+    if ( !dom_iommu(d)->platform_ops->context_init )
+        return -ENOSYS;
+
+    INIT_LIST_HEAD(&ctx->devices);
+    ctx->id = ctx_id;
+    ctx->dying = false;
+    ctx->opaque = false; /* assume non-opaque by default */
+
+    return iommu_call(dom_iommu(d)->platform_ops, context_init, d, ctx, flags);
+}
+
+int iommu_context_alloc(struct domain *d, uint16_t *ctx_id, unsigned int flags)
+{
+    unsigned int i;
+    int ret;
+    struct domain_iommu *hd = dom_iommu(d);
+    struct iommu_context *ctx;
+
+    do {
+        i = find_first_zero_bit(hd->other_contexts.bitmap, hd->other_contexts.count);
+
+        if ( i >= hd->other_contexts.count )
+            return -ENOSPC;
+
+        ctx = &hd->other_contexts.map[i];
+
+        /* Try to lock the mutex, can fail on concurrent accesses */
+        if ( !rspin_trylock(&ctx->lock) )
+            continue;
+
+        /* We can now set it as used, we keep the lock for initialization. */
+        set_bit(i, hd->other_contexts.bitmap);
+    } while (0);
+
+    *ctx_id = i + 1;
+
+    ret = iommu_context_init(d, ctx, *ctx_id, flags);
+
+    if ( ret )
+        clear_bit(*ctx_id, hd->other_contexts.bitmap);
+
+    iommu_put_context(ctx);
+    return ret;
+}
+
+/**
+ * Attach dev phantom functions to ctx, override any existing
+ * mapped context.
+ */
+static int cf_check iommu_reattach_phantom(struct domain *d, device_t *dev,
+                                           struct iommu_context *ctx)
+{
+    int ret = 0;
+    uint8_t devfn = dev->devfn;
+    struct domain_iommu *hd = dom_iommu(d);
+
+    while ( dev->phantom_stride )
+    {
+        devfn += dev->phantom_stride;
+
+        if ( PCI_SLOT(devfn) != PCI_SLOT(dev->devfn) )
+            break;
+
+        ret = iommu_call(hd->platform_ops, add_devfn, d, dev, devfn, ctx);
+
+        if ( ret )
+            break;
+    }
+
+    return ret;
+}
+
+/**
+ * Detach all device phantom functions.
+ */
+static int cf_check iommu_detach_phantom(struct domain *d, device_t *dev,
+                                         struct iommu_context *prev_ctx)
+{
+    int ret = 0;
+    uint8_t devfn = dev->devfn;
+    struct domain_iommu *hd = dom_iommu(d);
+
+    while ( dev->phantom_stride )
+    {
+        devfn += dev->phantom_stride;
+
+        if ( PCI_SLOT(devfn) != PCI_SLOT(dev->devfn) )
+            break;
+
+        ret = iommu_call(hd->platform_ops, remove_devfn, d, dev, devfn, prev_ctx);
+
+        if ( ret )
+            break;
+    }
+
+    return ret;
+}
+
+int cf_check iommu_attach_context(struct domain *d, device_t *dev, uint16_t ctx_id)
+{
+    struct iommu_context *ctx = NULL;
+    int ret = 0, rc;
+
+    if ( dev->context == ctx_id )
+        return 0;
+
+    if ( !(ctx = iommu_get_context(d, ctx_id)) )
+    {
+        ret = -ENOENT;
+        goto unlock;
+    }
+
+    pcidevs_lock();
+
+    if ( ctx->dying )
+    {
+        ret = -EINVAL;
+        goto unlock;
+    }
+
+    /* ignore attach operations on PCIe bridges */
+    if ( dev->type != DEV_TYPE_PCIe_BRIDGE )
+        ret = iommu_call(dom_iommu(d)->platform_ops, attach, d, dev, ctx);
+
+    if ( ret )
+        goto unlock;
+
+    /* See iommu_reattach_context() */
+    rc = iommu_reattach_phantom(d, dev, ctx);
+
+    if ( rc )
+    {
+        printk(XENLOG_ERR "IOMMU: Unable to attach %pp phantom functions\n",
+               &dev->sbdf);
+
+        if( iommu_call(dom_iommu(d)->platform_ops, detach, d, dev, ctx)
+            || iommu_detach_phantom(d, dev, ctx) )
+        {
+            printk(XENLOG_ERR "IOMMU: Improperly detached %pp\n", &dev->sbdf);
+            WARN();
+        }
+
+        ret = -EIO;
+        goto unlock;
+    }
+
+    dev->context = ctx_id;
+    list_add(&dev->context_list, &ctx->devices);
+
+unlock:
+    pcidevs_unlock();
+
+    if ( ctx )
+        iommu_put_context(ctx);
+
+    return ret;
+}
+
+int cf_check iommu_detach_context(struct domain *d, device_t *dev)
+{
+    struct iommu_context *ctx;
+    int ret = 0, rc;
+
+    if ( !dev->domain || dev->context == IOMMU_INVALID_CONTEXT_ID )
+    {
+        printk(XENLOG_WARNING "IOMMU: Trying to detach a non-attached device\n");
+        WARN();
+        return 0;
+    }
+
+    /* Make sure device is actually in the domain. */
+    ASSERT(d == dev->domain);
+
+    pcidevs_lock();
+
+    ctx = iommu_get_context(d, dev->context);
+    ASSERT(ctx); /* device is using an invalid context ?
+                    dev->context invalid ? */
+
+    /* ignore detach operations on PCIe bridges */
+    if ( dev->type != DEV_TYPE_PCIe_BRIDGE )
+        ret = iommu_call(dom_iommu(d)->platform_ops, detach, d, dev, ctx);
+
+    if ( ret )
+        goto unlock;
+
+    rc = iommu_detach_phantom(d, dev, ctx);
+
+    if ( rc )
+        printk(XENLOG_WARNING "IOMMU: "
+               "Improperly detached device functions (%d)\n", rc);
+
+    list_del(&dev->context_list);
+
+unlock:
+    pcidevs_unlock();
+    iommu_put_context(ctx);
+    return ret;
+}
+
+int cf_check iommu_reattach_context(struct domain *prev_dom, struct domain *next_dom,
+                                    device_t *dev, uint16_t ctx_id)
+{
+    uint16_t prev_ctx_id;
+    device_t *ctx_dev;
+    struct domain_iommu *prev_hd, *next_hd;
+    struct iommu_context *prev_ctx = NULL, *next_ctx = NULL;
+    int ret = 0, rc;
+    bool same_domain;
+
+    /* Make sure we actually are doing something meaningful */
+    BUG_ON(!prev_dom && !next_dom);
+
+    /* Device domain must be coherent with prev_dom. */
+    ASSERT(!prev_dom || dev->domain == prev_dom);
+
+    /// TODO: Do such cases exists ?
+    // /* Platform ops must match */
+    // if (dom_iommu(prev_dom)->platform_ops != dom_iommu(next_dom)->platform_ops)
+    //     return -EINVAL;
+
+    if ( !prev_dom )
+        return iommu_attach_context(next_dom, dev, ctx_id);
+
+    if ( !next_dom )
+        return iommu_detach_context(prev_dom, dev);
+
+    prev_hd = dom_iommu(prev_dom);
+    next_hd = dom_iommu(next_dom);
+
+    pcidevs_lock();
+
+    same_domain = prev_dom == next_dom;
+
+    prev_ctx_id = dev->context;
+
+    if ( same_domain && (ctx_id == prev_ctx_id) )
+    {
+        printk(XENLOG_DEBUG
+               "IOMMU: Reattaching %pp to same IOMMU context c%hu\n",
+               &dev->sbdf, ctx_id);
+        ret = 0;
+        goto unlock;
+    }
+
+    if ( !(prev_ctx = iommu_get_context(prev_dom, prev_ctx_id)) )
+    {
+        ret = -ENOENT;
+        goto unlock;
+    }
+
+    if ( !(next_ctx = iommu_get_context(next_dom, ctx_id)) )
+    {
+        ret = -ENOENT;
+        goto unlock;
+    }
+
+    if ( next_ctx->dying )
+    {
+        ret = -EINVAL;
+        goto unlock;
+    }
+
+    /* ignore reattach operations on PCIe bridges */
+    if ( dev->type != DEV_TYPE_PCIe_BRIDGE )
+        ret = iommu_call(prev_hd->platform_ops, reattach, next_dom, dev,
+                         prev_ctx, next_ctx);
+
+    if ( ret )
+        goto unlock;
+
+    /*
+     * We need to do special handling for phantom devices as they
+     * also use some other PCI functions behind the scenes.
+     */
+    rc = iommu_reattach_phantom(next_dom, dev, next_ctx);
+
+    if ( rc )
+    {
+        /**
+         * Device is being partially reattached (we have primary function and
+         * maybe some phantom functions attached to next_ctx, some others to prev_ctx),
+         * some functions of the device will be attached to next_ctx.
+         */
+        printk(XENLOG_WARNING "IOMMU: "
+               "Device %pp improperly reattached due to phantom function"
+               " reattach failure between %dd%dc and %dd%dc (%d)\n", dev,
+               prev_dom->domain_id, prev_ctx->id, next_dom->domain_id,
+               next_dom->domain_id, rc);
+
+        /* Try reattaching to previous context, reverting into a consistent state. */
+        if ( iommu_call(prev_hd->platform_ops, reattach, prev_dom, dev, next_ctx,
+                        prev_ctx) || iommu_reattach_phantom(prev_dom, dev, prev_ctx) )
+        {
+            printk(XENLOG_ERR "Unable to reattach %pp back to %dd%dc\n",
+                   &dev->sbdf, prev_dom->domain_id, prev_ctx->id);
+
+            if ( !is_hardware_domain(prev_dom) )
+                domain_crash(prev_dom);
+
+            if ( prev_dom != next_dom && !is_hardware_domain(next_dom) )
+                domain_crash(next_dom);
+
+            rc = -EIO;
+        }
+
+        ret = rc;
+        goto unlock;
+    }
+
+    /* Remove device from previous context, and add it to new one. */
+    list_for_each_entry(ctx_dev, &prev_ctx->devices, context_list)
+    {
+        if ( ctx_dev == dev )
+        {
+            list_del(&ctx_dev->context_list);
+            list_add(&ctx_dev->context_list, &next_ctx->devices);
+            break;
+        }
+    }
+
+    if (!ret)
+        dev->context = ctx_id; /* update device context*/
+
+unlock:
+    pcidevs_unlock();
+
+    if ( prev_ctx )
+        iommu_put_context(prev_ctx);
+
+    if ( next_ctx )
+        iommu_put_context(next_ctx);
+
+    return ret;
+}
+
+int cf_check iommu_context_teardown(struct domain *d, struct iommu_context *ctx, u32 flags)
+{
+    struct domain_iommu *hd = dom_iommu(d);
+
+    if ( !hd->platform_ops->context_teardown )
+        return -ENOSYS;
+
+    ctx->dying = true;
+
+    /* first reattach devices back to default context if needed */
+    if ( flags & IOMMU_TEARDOWN_REATTACH_DEFAULT )
+    {
+        struct pci_dev *device;
+        list_for_each_entry(device, &ctx->devices, context_list)
+            iommu_reattach_context(d, d, device, 0);
+    }
+    else if (!list_empty(&ctx->devices))
+        return -EBUSY; /* there is a device in context */
+
+    return iommu_call(hd->platform_ops, context_teardown, d, ctx, flags);
+}
+
+int cf_check iommu_context_free(struct domain *d, uint16_t ctx_id, u32 flags)
+{
+    int ret;
+    struct domain_iommu *hd = dom_iommu(d);
+    struct iommu_context *ctx;
+
+    if ( ctx_id == 0 )
+        return -EINVAL;
+
+    if ( !(ctx = iommu_get_context(d, ctx_id)) )
+        return -ENOENT;
+
+    ret = iommu_context_teardown(d, ctx, flags);
+
+    if ( !ret )
+        clear_bit(ctx_id - 1, hd->other_contexts.bitmap);
+
+    iommu_put_context(ctx);
+    return ret;
+}
+
 int iommu_quarantine_dev_init(device_t *dev)
 {
-    const struct domain_iommu *hd = dom_iommu(dom_io);
+    int ret;
+    uint16_t ctx_id;
 
-    if ( !iommu_quarantine || !hd->platform_ops->quarantine_init )
+    if ( !iommu_quarantine )
         return 0;
 
-    return iommu_call(hd->platform_ops, quarantine_init,
-                      dev, iommu_quarantine == IOMMU_quarantine_scratch_page);
+    ret = iommu_context_alloc(dom_io, &ctx_id, IOMMU_CONTEXT_INIT_quarantine);
+
+    if ( ret )
+        return ret;
+
+    /** TODO: Setup scratch page, mappings... */
+
+    ret = iommu_reattach_context(dev->domain, dom_io, dev, ctx_id);
+
+    if ( ret )
+    {
+        ASSERT(!iommu_context_free(dom_io, ctx_id, 0));
+        return ret;
+    }
+
+    return ret;
 }
 
-static int __init iommu_quarantine_init(void)
+int __init iommu_quarantine_init(void)
 {
     dom_io->options |= XEN_DOMCTL_CDF_iommu;
 
diff --git a/xen/drivers/passthrough/pci.c b/xen/drivers/passthrough/pci.c
index ee73d55740..2d9db79787 100644
--- a/xen/drivers/passthrough/pci.c
+++ b/xen/drivers/passthrough/pci.c
@@ -330,6 +330,7 @@ static struct pci_dev *alloc_pdev(struct pci_seg *pseg, u8 bus, u8 devfn)
     *((u8*) &pdev->bus) = bus;
     *((u8*) &pdev->devfn) = devfn;
     pdev->domain = NULL;
+    pdev->context = IOMMU_INVALID_CONTEXT_ID;
 
     INIT_LIST_HEAD(&pdev->vf_list);
 
@@ -604,7 +605,6 @@ static void pci_enable_acs(struct pci_dev *pdev)
 }
 
 static int iommu_add_device(struct pci_dev *pdev);
-static int iommu_enable_device(struct pci_dev *pdev);
 static int iommu_remove_device(struct pci_dev *pdev);
 
 unsigned int pci_size_mem_bar(pci_sbdf_t sbdf, unsigned int pos,
@@ -654,6 +654,101 @@ unsigned int pci_size_mem_bar(pci_sbdf_t sbdf, unsigned int pos,
     return is64bits ? 2 : 1;
 }
 
+static int device_assigned(struct pci_dev *pdev)
+{
+    int rc = 0;
+
+    /*
+     * If the device exists and it is not owned by either the hardware
+     * domain or dom_io then it must be assigned to a guest, or be
+     * hidden (owned by dom_xen).
+     */
+    if ( pdev->domain != hardware_domain && pdev->domain != dom_io )
+        rc = -EBUSY;
+
+    return rc;
+}
+
+/* Caller should hold the pcidevs_lock */
+static int pci_reassign_device(struct domain *prev_dom, struct domain *next_dom,
+                               struct pci_dev *pdev, u32 flag)
+{
+    int rc = 0;
+    ASSERT(prev_dom || next_dom);
+
+    if ( !is_iommu_enabled(next_dom) )
+        return -EINVAL;
+
+    if ( !arch_iommu_use_permitted(next_dom) )
+        return -EXDEV;
+
+    /* Do not allow broken devices to be assigned to guests. */
+    if ( pdev->broken && next_dom != hardware_domain && next_dom != dom_io )
+        return -EBADF;
+
+    if ( prev_dom )
+    {
+        write_lock(&prev_dom->pci_lock);
+        vpci_deassign_device(pdev);
+        write_unlock(&prev_dom->pci_lock);
+    }
+
+    rc = pdev_msix_assign(next_dom, pdev);
+    if ( rc )
+        goto done;
+
+    pdev->fault.count = 0;
+
+    if ( prev_dom && next_dom )
+    {
+        printk(XENLOG_INFO "PCI: Reassigning PCI device from %dd to %dd\n",
+               prev_dom->domain_id, next_dom->domain_id);
+    }
+    else if ( prev_dom )
+    {
+        printk(XENLOG_INFO "PCI: Assigning PCI device to %dd\n", prev_dom->domain_id);
+    }
+    else if ( next_dom )
+    {
+        printk(XENLOG_INFO "PCI: Remove PCI device of %dd\n", next_dom->domain_id);
+    }
+    else
+    {
+        ASSERT_UNREACHABLE();
+    }
+
+    rc = iommu_reattach_context(prev_dom, next_dom, pci_to_dev(pdev), 0);
+
+    if ( rc )
+        goto done;
+
+    if ( prev_dom )
+    {
+        write_lock(&prev_dom->pci_lock);
+        list_del(&pdev->domain_list);
+        write_unlock(&prev_dom->pci_lock);
+    }
+
+    pdev->domain = next_dom;
+
+    if ( next_dom )
+    {
+        write_lock(&next_dom->pci_lock);
+        list_add(&pdev->domain_list, &next_dom->pdev_list);
+
+        rc = vpci_assign_device(pdev);
+        write_unlock(&next_dom->pci_lock);
+    }
+
+ done:
+
+    /* The device is assigned to dom_io so mark it as quarantined */
+    if ( !rc && next_dom == dom_io )
+        pdev->quarantine = true;
+
+    return rc;
+}
+
 int pci_add_device(u16 seg, u8 bus, u8 devfn,
                    const struct pci_dev_info *info, nodeid_t node)
 {
@@ -798,7 +893,7 @@ int pci_add_device(u16 seg, u8 bus, u8 devfn,
         }
     }
     else
-        iommu_enable_device(pdev);
+        ret = iommu_add_device(pdev);
 
     pci_enable_acs(pdev);
 
@@ -878,74 +973,6 @@ int pci_remove_device(u16 seg, u8 bus, u8 devfn)
     return ret;
 }
 
-/* Caller should hold the pcidevs_lock */
-static int deassign_device(struct domain *d, uint16_t seg, uint8_t bus,
-                           uint8_t devfn)
-{
-    const struct domain_iommu *hd = dom_iommu(d);
-    struct pci_dev *pdev;
-    struct domain *target;
-    int ret = 0;
-
-    if ( !is_iommu_enabled(d) )
-        return -EINVAL;
-
-    ASSERT(pcidevs_locked());
-    pdev = pci_get_pdev(d, PCI_SBDF(seg, bus, devfn));
-    if ( !pdev )
-        return -ENODEV;
-
-    /* De-assignment from dom_io should de-quarantine the device */
-    if ( (pdev->quarantine || iommu_quarantine) && pdev->domain != dom_io )
-    {
-        ret = iommu_quarantine_dev_init(pci_to_dev(pdev));
-        if ( ret )
-           return ret;
-
-        target = dom_io;
-    }
-    else
-        target = hardware_domain;
-
-    while ( pdev->phantom_stride )
-    {
-        devfn += pdev->phantom_stride;
-        if ( PCI_SLOT(devfn) != PCI_SLOT(pdev->devfn) )
-            break;
-        ret = iommu_call(hd->platform_ops, reassign_device, d, target, devfn,
-                         pci_to_dev(pdev));
-        if ( ret )
-            goto out;
-    }
-
-    write_lock(&d->pci_lock);
-    vpci_deassign_device(pdev);
-    write_unlock(&d->pci_lock);
-
-    devfn = pdev->devfn;
-    ret = iommu_call(hd->platform_ops, reassign_device, d, target, devfn,
-                     pci_to_dev(pdev));
-    if ( ret )
-        goto out;
-
-    if ( pdev->domain == hardware_domain  )
-        pdev->quarantine = false;
-
-    pdev->fault.count = 0;
-
-    write_lock(&target->pci_lock);
-    /* Re-assign back to hardware_domain */
-    ret = vpci_assign_device(pdev);
-    write_unlock(&target->pci_lock);
-
- out:
-    if ( ret )
-        printk(XENLOG_G_ERR "%pd: deassign (%pp) failed (%d)\n",
-               d, &PCI_SBDF(seg, bus, devfn), ret);
-
-    return ret;
-}
-
 int pci_release_devices(struct domain *d)
 {
     int combined_ret;
@@ -967,13 +994,10 @@ int pci_release_devices(struct domain *d)
         struct pci_dev *pdev = list_first_entry(&d->pdev_list,
                                                 struct pci_dev,
                                                 domain_list);
-        uint16_t seg = pdev->seg;
-        uint8_t bus = pdev->bus;
-        uint8_t devfn = pdev->devfn;
         int ret;
 
         write_unlock(&d->pci_lock);
-        ret = deassign_device(d, seg, bus, devfn);
+        ret = pci_reassign_device(d, dom_io, pdev, 0);
         write_lock(&d->pci_lock);
         if ( ret )
         {
@@ -1181,25 +1205,18 @@ struct setup_hwdom {
 static void __hwdom_init setup_one_hwdom_device(const struct setup_hwdom *ctxt,
                                                 struct pci_dev *pdev)
 {
-    u8 devfn = pdev->devfn;
     int err;
 
-    do {
-        err = ctxt->handler(devfn, pdev);
-        if ( err )
-        {
-            printk(XENLOG_ERR "setup %pp for d%d failed (%d)\n",
-                   &pdev->sbdf, ctxt->d->domain_id, err);
-            if ( devfn == pdev->devfn )
-                return;
-        }
-        devfn += pdev->phantom_stride;
-    } while ( devfn != pdev->devfn &&
-              PCI_SLOT(devfn) == PCI_SLOT(pdev->devfn) );
+    err = ctxt->handler(pdev->devfn, pdev);
+
+    if ( err )
+        goto done;
 
     write_lock(&ctxt->d->pci_lock);
     err = vpci_assign_device(pdev);
     write_unlock(&ctxt->d->pci_lock);
+
+done:
     if ( err )
         printk(XENLOG_ERR "setup of vPCI for d%d failed: %d\n",
                ctxt->d->domain_id, err);
@@ -1398,8 +1415,6 @@ __initcall(setup_dump_pcidevs);
 static int iommu_add_device(struct pci_dev *pdev)
 {
     const struct domain_iommu *hd;
-    int rc;
-    unsigned int devfn = pdev->devfn;
 
     if ( !pdev->domain )
         return -EINVAL;
@@ -1410,180 +1425,18 @@ static int iommu_add_device(struct pci_dev *pdev)
     if ( !is_iommu_enabled(pdev->domain) )
         return 0;
 
-    rc = iommu_call(hd->platform_ops, add_device, devfn, pci_to_dev(pdev));
-    if ( rc || !pdev->phantom_stride )
-        return rc;
-
-    for ( ; ; )
-    {
-        devfn += pdev->phantom_stride;
-        if ( PCI_SLOT(devfn) != PCI_SLOT(pdev->devfn) )
-            return 0;
-        rc = iommu_call(hd->platform_ops, add_device, devfn, pci_to_dev(pdev));
-        if ( rc )
-            printk(XENLOG_WARNING "IOMMU: add %pp failed (%d)\n",
-                   &PCI_SBDF(pdev->seg, pdev->bus, devfn), rc);
-    }
-}
-
-static int iommu_enable_device(struct pci_dev *pdev)
-{
-    const struct domain_iommu *hd;
-
-    if ( !pdev->domain )
-        return -EINVAL;
-
-    ASSERT(pcidevs_locked());
-
-    hd = dom_iommu(pdev->domain);
-    if ( !is_iommu_enabled(pdev->domain) ||
-         !hd->platform_ops->enable_device )
-        return 0;
-
-    return iommu_call(hd->platform_ops, enable_device, pci_to_dev(pdev));
+    return iommu_attach_context(pdev->domain, pci_to_dev(pdev), 0);
 }
 
 static int iommu_remove_device(struct pci_dev *pdev)
 {
-    const struct domain_iommu *hd;
-    u8 devfn;
-
     if ( !pdev->domain )
         return -EINVAL;
 
-    hd = dom_iommu(pdev->domain);
     if ( !is_iommu_enabled(pdev->domain) )
         return 0;
 
-    for ( devfn = pdev->devfn ; pdev->phantom_stride; )
-    {
-        int rc;
-
-        devfn += pdev->phantom_stride;
-        if ( PCI_SLOT(devfn) != PCI_SLOT(pdev->devfn) )
-            break;
-        rc = iommu_call(hd->platform_ops, remove_device, devfn,
-                        pci_to_dev(pdev));
-        if ( !rc )
-            continue;
-
-        printk(XENLOG_ERR "IOMMU: remove %pp failed (%d)\n",
-               &PCI_SBDF(pdev->seg, pdev->bus, devfn), rc);
-        return rc;
-    }
-
-    devfn = pdev->devfn;
-
-    return iommu_call(hd->platform_ops, remove_device, devfn, pci_to_dev(pdev));
-}
-
-static int device_assigned(u16 seg, u8 bus, u8 devfn)
-{
-    struct pci_dev *pdev;
-    int rc = 0;
-
-    ASSERT(pcidevs_locked());
-    pdev = pci_get_pdev(NULL, PCI_SBDF(seg, bus, devfn));
-
-    if ( !pdev )
-        rc = -ENODEV;
-    /*
-     * If the device exists and it is not owned by either the hardware
-     * domain or dom_io then it must be assigned to a guest, or be
-     * hidden (owned by dom_xen).
-     */
-    else if ( pdev->domain != hardware_domain &&
-              pdev->domain != dom_io )
-        rc = -EBUSY;
-
-    return rc;
-}
-
-/* Caller should hold the pcidevs_lock */
-static int assign_device(struct domain *d, u16 seg, u8 bus, u8 devfn, u32 flag)
-{
-    const struct domain_iommu *hd = dom_iommu(d);
-    struct pci_dev *pdev;
-    int rc = 0;
-
-    if ( !is_iommu_enabled(d) )
-        return 0;
-
-    if ( !arch_iommu_use_permitted(d) )
-        return -EXDEV;
-
-    /* device_assigned() should already have cleared the device for assignment */
-    ASSERT(pcidevs_locked());
-    pdev = pci_get_pdev(NULL, PCI_SBDF(seg, bus, devfn));
-    ASSERT(pdev && (pdev->domain == hardware_domain ||
-                    pdev->domain == dom_io));
-
-    /* Do not allow broken devices to be assigned to guests. */
-    rc = -EBADF;
-    if ( pdev->broken && d != hardware_domain && d != dom_io )
-        goto done;
-
-    write_lock(&pdev->domain->pci_lock);
-    vpci_deassign_device(pdev);
-    write_unlock(&pdev->domain->pci_lock);
-
-    rc = pdev_msix_assign(d, pdev);
-    if ( rc )
-        goto done;
-
-    if ( pdev->domain != dom_io )
-    {
-        rc = iommu_quarantine_dev_init(pci_to_dev(pdev));
-        if ( rc )
-            goto done;
-    }
-
-    pdev->fault.count = 0;
-
-    rc = iommu_call(hd->platform_ops, assign_device, d, devfn, pci_to_dev(pdev),
-                    flag);
-
-    while ( pdev->phantom_stride && !rc )
-    {
-        devfn += pdev->phantom_stride;
-        if ( PCI_SLOT(devfn) != PCI_SLOT(pdev->devfn) )
-            break;
-        rc = iommu_call(hd->platform_ops, assign_device, d, devfn,
-                        pci_to_dev(pdev), flag);
-    }
-
-    if ( rc )
-        goto done;
-
-    write_lock(&d->pci_lock);
-    rc = vpci_assign_device(pdev);
-    write_unlock(&d->pci_lock);
-
- done:
-    if ( rc )
-    {
-        printk(XENLOG_G_WARNING "%pd: assign %s(%pp) failed (%d)\n",
-               d, devfn != pdev->devfn ? "phantom function " : "",
-               &PCI_SBDF(seg, bus, devfn), rc);
-
-        if ( devfn != pdev->devfn && deassign_device(d, seg, bus, pdev->devfn) )
-        {
-            /*
-             * Device with phantom functions that failed to both assign and
-             * rollback.  Mark the device as broken and crash the target domain,
-             * as the state of the functions at this point is unknown and Xen
-             * has no way to assert consistent context assignment among them.
-             */
-            pdev->broken = true;
-            if ( !is_hardware_domain(d) && d != dom_io )
-                domain_crash(d);
-        }
-    }
-    /* The device is assigned to dom_io so mark it as quarantined */
-    else if ( d == dom_io )
-        pdev->quarantine = true;
-
-    return rc;
+    return iommu_detach_context(pdev->domain, pdev);
 }
 
 static int iommu_get_device_group(
@@ -1673,6 +1526,7 @@ int iommu_do_pci_domctl(
     u8 bus, devfn;
     int ret = 0;
     uint32_t machine_sbdf;
+    struct pci_dev *pdev;
 
     switch ( domctl->cmd )
     {
@@ -1742,7 +1596,15 @@ int iommu_do_pci_domctl(
         devfn = PCI_DEVFN(machine_sbdf);
 
         pcidevs_lock();
-        ret = device_assigned(seg, bus, devfn);
+        pdev = pci_get_pdev(NULL, PCI_SBDF(seg, bus, devfn));
+
+        if ( !pdev )
+        {
+            printk(XENLOG_G_INFO "%pp doesn't exist", &PCI_SBDF(seg, bus, devfn));
+            break;
+        }
+
+        ret = device_assigned(pdev);
         if ( domctl->cmd == XEN_DOMCTL_test_assign_device )
         {
             if ( ret )
@@ -1753,7 +1615,7 @@ int iommu_do_pci_domctl(
             }
         }
         else if ( !ret )
-            ret = assign_device(d, seg, bus, devfn, flags);
+            ret = pci_reassign_device(pdev->domain, d, pdev, flags);
         pcidevs_unlock();
         if ( ret == -ERESTART )
             ret = hypercall_create_continuation(__HYPERVISOR_domctl,
@@ -1787,7 +1649,20 @@ int iommu_do_pci_domctl(
         devfn = PCI_DEVFN(machine_sbdf);
 
         pcidevs_lock();
-        ret = deassign_device(d, seg, bus, devfn);
+        pdev = pci_get_pdev(d, PCI_SBDF(seg, bus, devfn));
+
+        if ( pdev )
+        {
+            struct domain *target = hardware_domain;
+
+            if ( (pdev->quarantine || iommu_quarantine) && pdev->domain != dom_io )
+                target = dom_io;
+
+            ret = pci_reassign_device(d, target, pdev, 0);
+        }
+        else
+            ret = -ENODEV;
+
         pcidevs_unlock();
         break;
 
diff --git a/xen/drivers/passthrough/vtd/extern.h b/xen/drivers/passthrough/vtd/extern.h
index 82db8f9435..a980be3646 100644
--- a/xen/drivers/passthrough/vtd/extern.h
+++ b/xen/drivers/passthrough/vtd/extern.h
@@ -78,12 +78,12 @@ uint64_t alloc_pgtable_maddr(unsigned long npages, nodeid_t node);
 void free_pgtable_maddr(u64 maddr);
 void *map_vtd_domain_page(u64 maddr);
 void unmap_vtd_domain_page(const void *va);
-int domain_context_mapping_one(struct domain *domain, struct iommu_context *ctx,
-                               struct vtd_iommu *iommu, uint8_t bus, uint8_t devfn,
-                               const struct pci_dev *pdev, domid_t domid,
-                               paddr_t pgd_maddr, unsigned int mode);
-int domain_context_unmap_one(struct domain *domain, struct vtd_iommu *iommu,
-                             uint8_t bus, uint8_t devfn);
+int apply_context_single(struct domain *domain, struct iommu_context *ctx,
+                         struct vtd_iommu *iommu, uint8_t bus, uint8_t devfn,
+                         struct iommu_context *prev_ctx);
+int unapply_context_single(struct domain *domain, struct vtd_iommu *iommu,
+                           struct iommu_context *prev_ctx, uint8_t bus,
+                           uint8_t devfn);
 int cf_check intel_iommu_get_reserved_device_memory(
     iommu_grdm_t *func, void *ctxt);
 
@@ -104,8 +104,9 @@ void platform_quirks_init(void);
 void vtd_ops_preamble_quirk(struct vtd_iommu *iommu);
 void vtd_ops_postamble_quirk(struct vtd_iommu *iommu);
 int __must_check me_wifi_quirk(struct domain *domain, uint8_t bus,
-                               uint8_t devfn, domid_t domid, paddr_t pgd_maddr,
-                               unsigned int mode);
+                               uint8_t devfn, domid_t domid,
+                               unsigned int mode, struct iommu_context *ctx,
+                               struct iommu_context *prev_ctx);
 void pci_vtd_quirk(const struct pci_dev *);
 void quirk_iommu_caps(struct vtd_iommu *iommu);
 
diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c
index 3668185ebc..3319903297 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -27,6 +27,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -61,7 +62,6 @@ static unsigned int __ro_after_init min_pt_levels = UINT_MAX;
 static struct tasklet vtd_fault_tasklet;
 
 static int cf_check setup_hwdom_device(u8 devfn, struct pci_dev *);
-static void setup_hwdom_rmrr(struct domain *d);
 
 #define DID_FIELD_WIDTH 16
 #define DID_HIGH_OFFSET 8
@@ -165,7 +165,7 @@ static uint64_t addr_to_dma_page_maddr(struct domain *domain,
     u64 pte_maddr = 0;
 
     addr &= (((u64)1) << addr_width) - 1;
-    ASSERT(spin_is_locked(&ctx->arch.mapping_lock));
+    ASSERT(rspin_is_locked(&ctx->lock));
     ASSERT(target || !alloc);
 
     if ( !ctx->arch.vtd.pgd_maddr )
@@ -270,36 +270,22 @@ static uint64_t addr_to_dma_page_maddr(struct domain *domain,
     return pte_maddr;
 }
 
-static paddr_t domain_pgd_maddr(struct domain *d, struct iommu_context *ctx,
-                                paddr_t pgd_maddr, unsigned int nr_pt_levels)
+static paddr_t get_context_pgd(struct domain *d, struct iommu_context *ctx,
+                               unsigned int nr_pt_levels)
 {
     unsigned int agaw;
+    paddr_t pgd_maddr = ctx->arch.vtd.pgd_maddr;
 
-    ASSERT(spin_is_locked(&ctx->arch.mapping_lock));
-
-    if ( pgd_maddr )
-        /* nothing */;
-    else if ( iommu_use_hap_pt(d) )
+    if ( !ctx->arch.vtd.pgd_maddr )
     {
-        pagetable_t pgt = p2m_get_pagetable(p2m_get_hostp2m(d));
+        /*
+         * Ensure we have pagetables allocated down to the smallest
+         * level the loop below may need to run to.
+         */
+        addr_to_dma_page_maddr(d, ctx, 0, min_pt_levels, NULL, true);
 
-        pgd_maddr = pagetable_get_paddr(pgt);
-    }
-    else
-    {
         if ( !ctx->arch.vtd.pgd_maddr )
-        {
-            /*
-             * Ensure we have pagetables allocated down to the smallest
-             * level the loop below may need to run to.
-             */
-            addr_to_dma_page_maddr(d, ctx, 0, min_pt_levels, NULL, true);
-
-            if ( !ctx->arch.vtd.pgd_maddr )
-                return 0;
-        }
-
-        pgd_maddr = ctx->arch.vtd.pgd_maddr;
+            return 0;
     }
 
     /* Skip top level(s) of page tables for less-than-maximum level DRHDs. */
@@ -569,17 +555,20 @@ static int __must_check iommu_flush_all(void)
     return rc;
 }
 
-static int __must_check cf_check iommu_flush_iotlb(struct domain *d, dfn_t dfn,
+static int __must_check cf_check iommu_flush_iotlb(struct domain *d,
+                                                   struct iommu_context *ctx,
+                                                   dfn_t dfn,
                                                    unsigned long page_count,
                                                    unsigned int flush_flags)
 {
-    struct iommu_context *ctx = iommu_default_context(d);
     struct acpi_drhd_unit *drhd;
     struct vtd_iommu *iommu;
     bool flush_dev_iotlb;
     int iommu_domid;
     int ret = 0;
 
+    ASSERT(ctx);
+
     if ( flush_flags & IOMMU_FLUSHF_all )
     {
         dfn = INVALID_DFN;
@@ -1240,7 +1229,8 @@ void __init iommu_free(struct acpi_drhd_unit *drhd)
         agaw = 64;                              \
     agaw; })
 
-static int cf_check intel_iommu_context_init(struct domain *d, struct iommu_context *ctx)
+static int cf_check intel_iommu_context_init(struct domain *d, struct iommu_context *ctx,
+                                             u32 flags)
 {
     struct acpi_drhd_unit *drhd;
 
@@ -1255,6 +1245,27 @@ static int cf_check intel_iommu_context_init(struct domain *d, struct iommu_cont
         return -ENOMEM;
     }
 
+    ctx->arch.vtd.superpage_progress = 0;
+
+    if ( flags & IOMMU_CONTEXT_INIT_default )
+    {
+        ctx->arch.vtd.pgd_maddr = 0;
+
+        /*
+         * Context is considered "opaque" (non-managed) in these cases :
+         *  - HAP is enabled, in this case, the pagetable is not managed by the
+         *    IOMMU code, thus opaque
+         *  - IOMMU is in passthrough which means that there is no actual pagetable
+         */
+        if ( iommu_use_hap_pt(d) )
+        {
+            pagetable_t pgt = p2m_get_pagetable(p2m_get_hostp2m(d));
+            ctx->arch.vtd.pgd_maddr = pagetable_get_paddr(pgt);
+
+            ctx->opaque = true;
+        }
+    }
+
     // TODO: Allocate IOMMU domid only when attaching devices ?
     /* Populate context DID map using pseudo DIDs */
     for_each_drhd_unit(drhd)
@@ -1263,7 +1274,11 @@ static int cf_check intel_iommu_context_init(struct domain *d, struct iommu_cont
             iommu_alloc_domid(drhd->iommu->domid_bitmap);
     }
 
-    return arch_iommu_context_init(d, ctx, 0);
+    if ( !ctx->opaque )
+        /* Create initial context page */
+        addr_to_dma_page_maddr(d, ctx, 0, min_pt_levels, NULL, true);
+
+    return arch_iommu_context_init(d, ctx, flags);
 }
 
 static int cf_check intel_iommu_domain_init(struct domain *d)
@@ -1272,7 +1287,7 @@ static int cf_check intel_iommu_domain_init(struct domain *d)
 
     hd->arch.vtd.agaw = width_to_agaw(DEFAULT_DOMAIN_ADDRESS_WIDTH);
 
-    return intel_iommu_context_init(d, iommu_default_context(d));
+    return 0;
 }
 
 static void __hwdom_init cf_check intel_iommu_hwdom_init(struct domain *d)
@@ -1280,7 +1295,7 @@ static void __hwdom_init cf_check intel_iommu_hwdom_init(struct domain *d)
     struct acpi_drhd_unit *drhd;
 
     setup_hwdom_pci_devices(d, setup_hwdom_device);
-    setup_hwdom_rmrr(d);
+
     /* Make sure workarounds are applied before enabling the IOMMU(s). */
     arch_iommu_hwdom_init(d);
 
@@ -1297,21 +1312,17 @@ static void __hwdom_init cf_check intel_iommu_hwdom_init(struct domain *d)
     }
 }
 
-/*
- * This function returns
- * - a negative errno value upon error,
- * - zero upon success when previously the entry was non-present, or this isn't
- *   the "main" request for a device (pdev == NULL), or for no-op quarantining
- *   assignments,
- * - positive (one) upon success when previously the entry was present and this
- *   is the "main" request for a device (pdev != NULL).
+/**
+ * Apply a context on a device.
+ * @param domain Domain of the context
+ * @param ctx IOMMU context to apply
+ * @param iommu IOMMU hardware to use (must match device iommu)
+ * @param bus PCI device bus
+ * @param devfn PCI device function
  */
-int domain_context_mapping_one(
-    struct domain *domain,
-    struct iommu_context *ctx,
-    struct vtd_iommu *iommu,
-    uint8_t bus, uint8_t devfn, const struct pci_dev *pdev,
-    domid_t domid, paddr_t pgd_maddr, unsigned int mode)
+int apply_context_single(struct domain *domain, struct iommu_context *ctx,
+                         struct vtd_iommu *iommu, uint8_t bus, uint8_t devfn,
+                         struct iommu_context *prev_ctx)
 {
     struct context_entry *context, *context_entries, lctxt;
     __uint128_t res, old;
@@ -1320,8 +1331,6 @@ int domain_context_mapping_one(
     int rc, ret;
     bool flush_dev_iotlb, overwrite_entry = false;
 
-    struct iommu_context *prev_ctx = pdev->domain ? iommu_default_context(pdev->domain) : NULL;
-
     ASSERT(pcidevs_locked());
     spin_lock(&iommu->lock);
     maddr = bus_to_context_maddr(iommu, bus);
@@ -1342,7 +1351,7 @@ int domain_context_mapping_one(
         overwrite_entry = true;
     }
 
-    if ( iommu_hwdom_passthrough && is_hardware_domain(domain) )
+    if ( iommu_hwdom_passthrough && is_hardware_domain(domain) && !ctx->id )
     {
         context_set_translation_type(lctxt, CONTEXT_TT_PASS_THRU);
     }
@@ -1350,9 +1359,7 @@ int domain_context_mapping_one(
     {
         paddr_t root;
 
-        spin_lock(&ctx->arch.mapping_lock);
-
-        root = domain_pgd_maddr(domain, ctx, pgd_maddr, iommu->nr_pt_levels);
+        root = get_context_pgd(domain, ctx, iommu->nr_pt_levels);
         if ( !root )
         {
             unmap_vtd_domain_page(context_entries);
@@ -1364,8 +1371,6 @@ int domain_context_mapping_one(
             context_set_translation_type(lctxt, CONTEXT_TT_DEV_IOTLB);
         else
             context_set_translation_type(lctxt, CONTEXT_TT_MULTI_LEVEL);
-
-        spin_unlock(&ctx->arch.mapping_lock);
     }
 
     rc = context_set_domain_id(&lctxt, did, iommu);
@@ -1394,7 +1399,6 @@ int domain_context_mapping_one(
     }
 
     iommu_sync_cache(context, sizeof(struct context_entry));
-    spin_unlock(&iommu->lock);
 
     rc = iommu_flush_context_device(iommu, prev_did, PCI_BDF(bus, devfn),
                                     DMA_CCMD_MASK_NOBIT, !overwrite_entry);
@@ -1428,7 +1432,7 @@ int domain_context_mapping_one(
     spin_unlock(&iommu->lock);
 
     if ( !seg && !rc )
-        rc = me_wifi_quirk(domain, bus, devfn, domid, pgd_maddr, mode);
+        WARN_ON(me_wifi_quirk(domain, bus, devfn, did, 0, ctx, prev_ctx));
 
     return rc;
 
@@ -1438,152 +1442,23 @@ int domain_context_mapping_one(
         return rc;
 }
 
-static const struct acpi_drhd_unit *domain_context_unmap(
-    struct domain *d, uint8_t devfn, struct pci_dev *pdev);
-
-static int domain_context_mapping(struct domain *domain, struct iommu_context *ctx,
-                                  u8 devfn, struct pci_dev *pdev)
+int apply_context(struct domain *d, struct iommu_context *ctx,
+                  struct pci_dev *pdev, u8 devfn,
+                  struct iommu_context *prev_ctx)
 {
-    const struct acpi_drhd_unit *drhd = acpi_find_matched_drhd_unit(pdev);
-    const struct acpi_rmrr_unit *rmrr;
-    paddr_t pgd_maddr = ctx->arch.vtd.pgd_maddr;
-    domid_t did = ctx->arch.vtd.didmap[drhd->iommu->index];
+    struct acpi_drhd_unit *drhd = acpi_find_matched_drhd_unit(pdev);
+    struct vtd_iommu *iommu = drhd->iommu;
     int ret = 0;
-    unsigned int i, mode = 0;
-    uint16_t seg = pdev->seg, bdf;
-    uint8_t bus = pdev->bus, secbus;
 
-    /*
-     * Generally we assume only devices from one node to get assigned to a
-     * given guest.  But even if not, by replacing the prior value here we
-     * guarantee that at least some basic allocations for the device being
-     * added will get done against its node.  Any further allocations for
-     * this or other devices may be penalized then, but some would also be
-     * if we left other than NUMA_NO_NODE untouched here.
-     */
-    if ( drhd && drhd->iommu->node != NUMA_NO_NODE )
-        dom_iommu(domain)->node = drhd->iommu->node;
+    if ( !drhd )
+        return -EINVAL;
 
     ASSERT(pcidevs_locked());
 
-    for_each_rmrr_device( rmrr, bdf, i )
-    {
-        if ( rmrr->segment != pdev->seg || bdf != pdev->sbdf.bdf )
-            continue;
-
-        mode |= MAP_WITH_RMRR;
-        break;
-    }
-
-    if ( domain != pdev->domain && pdev->domain != dom_io &&
-         pdev->domain->is_dying )
-        mode |= MAP_OWNER_DYING;
-
-    switch ( pdev->type )
-    {
-        bool prev_present;
-
-    case DEV_TYPE_PCI_HOST_BRIDGE:
-        if ( iommu_debug )
-            printk(VTDPREFIX "%pd:Hostbridge: skip %pp map\n",
-                   domain, &PCI_SBDF(seg, bus, devfn));
-        if ( !is_hardware_domain(domain) )
-            return -EPERM;
-        break;
-
-    case DEV_TYPE_PCIe_BRIDGE:
-    case DEV_TYPE_PCIe2PCI_BRIDGE:
-    case DEV_TYPE_LEGACY_PCI_BRIDGE:
-        break;
-
-    case DEV_TYPE_PCIe_ENDPOINT:
-        if ( !drhd )
-            return -ENODEV;
+    ret = apply_context_single(d, ctx, iommu, pdev->bus, pdev->devfn, prev_ctx);
 
-        if ( iommu_debug )
-            printk(VTDPREFIX "%pd:PCIe: map %pp\n",
-                   domain, &PCI_SBDF(seg, bus, devfn));
-        ret = domain_context_mapping_one(domain, ctx, drhd->iommu, bus, devfn, pdev,
-                                         did, pgd_maddr, mode);
-        if ( ret > 0 )
-            ret = 0;
-        if ( !ret && devfn == pdev->devfn && ats_device(pdev, drhd) > 0 )
-            enable_ats_device(pdev, &drhd->iommu->ats_devices);
-
-        break;
-
-    case DEV_TYPE_PCI:
-        if ( !drhd )
-            return -ENODEV;
-
-        if ( iommu_debug )
-            printk(VTDPREFIX "%pd:PCI: map %pp\n",
-                   domain, &PCI_SBDF(seg, bus, devfn));
-
-        ret = domain_context_mapping_one(domain, ctx, drhd->iommu, bus, devfn,
-                                         pdev, did, pgd_maddr, mode);
-        if ( ret < 0 )
-            break;
-        prev_present = ret;
-
-        if ( (ret = find_upstream_bridge(seg, &bus, &devfn, &secbus)) < 1 )
-        {
-            if ( !ret )
-                break;
-            ret = -ENXIO;
-        }
-        /*
-         * Strictly speaking if the device is the only one behind this bridge
-         * and the only one with this (secbus,0,0) tuple, it could be allowed
-         * to be re-assigned regardless of RMRR presence.  But let's deal with
-         * that case only if it is actually found in the wild.  Note that
-         * dealing with this just here would still not render the operation
-         * secure.
-         */
-        else if ( prev_present && (mode & MAP_WITH_RMRR) &&
-                  domain != pdev->domain )
-            ret = -EOPNOTSUPP;
-
-        /*
-         * Mapping a bridge should, if anything, pass the struct pci_dev of
-         * that bridge. Since bridges don't normally get assigned to guests,
-         * their owner would be the wrong one. Pass NULL instead.
-         */
-        if ( ret >= 0 )
-            ret = domain_context_mapping_one(domain, ctx, drhd->iommu, bus, devfn,
-                                             NULL, did, pgd_maddr, mode);
-
-        /*
-         * Devices behind PCIe-to-PCI/PCIx bridge may generate different
-         * requester-id. It may originate from devfn=0 on the secondary bus
-         * behind the bridge. Map that id as well if we didn't already.
-         *
-         * Somewhat similar as for bridges, we don't want to pass a struct
-         * pci_dev here - there may not even exist one for this (secbus,0,0)
-         * tuple. If there is one, without properly working device groups it
-         * may again not have the correct owner.
-         */
-        if ( !ret && pdev_type(seg, bus, devfn) == DEV_TYPE_PCIe2PCI_BRIDGE &&
-             (secbus != pdev->bus || pdev->devfn != 0) )
-            ret = domain_context_mapping_one(domain, ctx, drhd->iommu, secbus, 0,
-                                             NULL, did, pgd_maddr, mode);
-
-        if ( ret )
-        {
-            if ( !prev_present )
-                domain_context_unmap(domain, devfn, pdev);
-            else if ( pdev->domain != domain ) /* Avoid infinite recursion. */
-                domain_context_mapping(pdev->domain, ctx, devfn, pdev);
-        }
-
-        break;
-
-    default:
-        dprintk(XENLOG_ERR VTDPREFIX, "%pd:unknown(%u): %pp\n",
-                domain, pdev->type, &PCI_SBDF(seg, bus, devfn));
-        ret = -EINVAL;
-        break;
-    }
+    if ( !ret && ats_device(pdev, drhd) > 0 )
+        enable_ats_device(pdev, &iommu->ats_devices);
 
     if ( !ret && devfn == pdev->devfn )
         pci_vtd_quirk(pdev);
@@ -1591,10 +1466,8 @@ static int domain_context_mapping(struct domain *domain, struct iommu_context *c
     return ret;
 }
 
-int domain_context_unmap_one(
-    struct domain *domain,
-    struct vtd_iommu *iommu,
-    uint8_t bus, uint8_t devfn)
+int unapply_context_single(struct domain *domain, struct vtd_iommu *iommu,
+                           struct iommu_context *prev_ctx, uint8_t bus, uint8_t devfn)
 {
     struct context_entry *context, *context_entries;
     u64 maddr;
@@ -1648,12 +1521,18 @@ int domain_context_unmap_one(
     if ( rc > 0 )
         rc = 0;
 
+    if ( !rc )
+    {
+        BUG_ON(!prev_ctx->arch.vtd.iommu_dev_cnt[iommu->index]);
+        prev_ctx->arch.vtd.iommu_dev_cnt[iommu->index]--;
+    }
+
     spin_unlock(&iommu->lock);
     unmap_vtd_domain_page(context_entries);
 
     if ( !iommu->drhd->segment && !rc )
-        rc = me_wifi_quirk(domain, bus, devfn, DOMID_INVALID, 0,
-                           UNMAP_ME_PHANTOM_FUNC);
+        WARN_ON(me_wifi_quirk(domain, bus, devfn, DOMID_INVALID, UNMAP_ME_PHANTOM_FUNC,
+                           NULL, prev_ctx));
 
     if ( rc && !is_hardware_domain(domain) && domain != dom_io )
     {
@@ -1671,128 +1550,27 @@ int domain_context_unmap_one(
     return rc;
 }
 
-static const struct acpi_drhd_unit *domain_context_unmap(
-    struct domain *domain,
-    uint8_t devfn,
-    struct pci_dev *pdev)
-{
-    const struct acpi_drhd_unit *drhd = acpi_find_matched_drhd_unit(pdev);
-    struct vtd_iommu *iommu = drhd ? drhd->iommu : NULL;
-    int ret;
-    uint16_t seg = pdev->seg;
-    uint8_t bus = pdev->bus, tmp_bus, tmp_devfn, secbus;
-
-    switch ( pdev->type )
-    {
-    case DEV_TYPE_PCI_HOST_BRIDGE:
-        if ( iommu_debug )
-            printk(VTDPREFIX "%pd:Hostbridge: skip %pp unmap\n",
-                   domain, &PCI_SBDF(seg, bus, devfn));
-        return ERR_PTR(is_hardware_domain(domain) ? 0 : -EPERM);
-
-    case DEV_TYPE_PCIe_BRIDGE:
-    case DEV_TYPE_PCIe2PCI_BRIDGE:
-    case DEV_TYPE_LEGACY_PCI_BRIDGE:
-        return ERR_PTR(0);
-
-    case DEV_TYPE_PCIe_ENDPOINT:
-        if ( !iommu )
-            return ERR_PTR(-ENODEV);
-
-        if ( iommu_debug )
-            printk(VTDPREFIX "%pd:PCIe: unmap %pp\n",
-                   domain, &PCI_SBDF(seg, bus, devfn));
-        ret = domain_context_unmap_one(domain, iommu, bus, devfn);
-        if ( !ret && devfn == pdev->devfn && ats_device(pdev, drhd) > 0 )
-            disable_ats_device(pdev);
-
-        break;
-
-    case DEV_TYPE_PCI:
-        if ( !iommu )
-            return ERR_PTR(-ENODEV);
-
-        if ( iommu_debug )
-            printk(VTDPREFIX "%pd:PCI: unmap %pp\n",
-                   domain, &PCI_SBDF(seg, bus, devfn));
-        ret = domain_context_unmap_one(domain, iommu, bus, devfn);
-        if ( ret )
-            break;
-
-        tmp_bus = bus;
-        tmp_devfn = devfn;
-        if ( (ret = find_upstream_bridge(seg, &tmp_bus, &tmp_devfn,
-                                         &secbus)) < 1 )
-        {
-            if ( ret )
-            {
-                ret = -ENXIO;
-                if ( !domain->is_dying &&
-                     !is_hardware_domain(domain) && domain != dom_io )
-                {
-                    domain_crash(domain);
-                    /* Make upper layers continue in a best effort manner. */
-                    ret = 0;
-                }
-            }
-            break;
-        }
-
-        ret = domain_context_unmap_one(domain, iommu, tmp_bus, tmp_devfn);
-        /* PCIe to PCI/PCIx bridge */
-        if ( !ret && pdev_type(seg, tmp_bus, tmp_devfn) == DEV_TYPE_PCIe2PCI_BRIDGE )
-            ret = domain_context_unmap_one(domain, iommu, secbus, 0);
-
-        break;
-
-    default:
-        dprintk(XENLOG_ERR VTDPREFIX, "%pd:unknown(%u): %pp\n",
-                domain, pdev->type, &PCI_SBDF(seg, bus, devfn));
-        return ERR_PTR(-EINVAL);
-    }
-
-    return drhd;
-}
-
-static void cf_check iommu_clear_root_pgtable(struct domain *d)
+static void cf_check iommu_clear_root_pgtable(struct domain *d,
+                                              struct iommu_context *ctx)
 {
-    struct iommu_context *ctx = iommu_default_context(d);
-
-    spin_lock(&ctx->arch.mapping_lock);
     ctx->arch.vtd.pgd_maddr = 0;
-    spin_unlock(&ctx->arch.mapping_lock);
 }
 
 static void cf_check iommu_domain_teardown(struct domain *d)
 {
     struct iommu_context *ctx = iommu_default_context(d);
-    const struct acpi_drhd_unit *drhd;
 
     if ( list_empty(&acpi_drhd_units) )
         return;
 
-    iommu_identity_map_teardown(d, ctx);
-
     ASSERT(!ctx->arch.vtd.pgd_maddr);
-
-    for_each_drhd_unit ( drhd )
-        iommu_free_domid(d->domain_id, drhd->iommu->domid_bitmap);
-
-    XFREE(ctx->arch.vtd.iommu_dev_cnt);
-    XFREE(ctx->arch.vtd.didmap);
-}
-
-static void quarantine_teardown(struct pci_dev *pdev,
-                                const struct acpi_drhd_unit *drhd)
-{
 }
 
 static int __must_check cf_check intel_iommu_map_page(
     struct domain *d, dfn_t dfn, mfn_t mfn, unsigned int flags,
-    unsigned int *flush_flags)
+    unsigned int *flush_flags, struct iommu_context *ctx)
 {
     struct domain_iommu *hd = dom_iommu(d);
-    struct iommu_context *ctx = iommu_default_context(d);
     struct dma_pte *page, *pte, old, new = {};
     u64 pg_maddr;
     unsigned int level = (IOMMUF_order(flags) / LEVEL_STRIDE) + 1;
@@ -1801,35 +1579,22 @@ static int __must_check cf_check intel_iommu_map_page(
     ASSERT((hd->platform_ops->page_sizes >> IOMMUF_order(flags)) &
            PAGE_SIZE_4K);
 
-    /* Do nothing if VT-d shares EPT page table */
-    if ( iommu_use_hap_pt(d) )
+    if ( ctx->opaque )
         return 0;
 
-    /* Do nothing if hardware domain and iommu supports pass thru. */
-    if ( iommu_hwdom_passthrough && is_hardware_domain(d) )
-        return 0;
-
-    spin_lock(&ctx->arch.mapping_lock);
-
     /*
      * IOMMU mapping request can be safely ignored when the domain is dying.
      *
-     * hd->arch.mapping_lock guarantees that d->is_dying will be observed
+     * hd->lock guarantees that d->is_dying will be observed
      * before any page tables are freed (see iommu_free_pgtables())
      */
     if ( d->is_dying )
-    {
-        spin_unlock(&ctx->arch.mapping_lock);
         return 0;
-    }
 
     pg_maddr = addr_to_dma_page_maddr(d, ctx, dfn_to_daddr(dfn), level, flush_flags,
                                       true);
     if ( pg_maddr < PAGE_SIZE )
-    {
-        spin_unlock(&ctx->arch.mapping_lock);
         return -ENOMEM;
-    }
 
     page = (struct dma_pte *)map_vtd_domain_page(pg_maddr);
     pte = &page[address_level_offset(dfn_to_daddr(dfn), level)];
@@ -1848,7 +1613,6 @@ static int __must_check cf_check intel_iommu_map_page(
 
     if ( !((old.val ^ new.val) & ~DMA_PTE_CONTIG_MASK) )
     {
-        spin_unlock(&ctx->arch.mapping_lock);
         unmap_vtd_domain_page(page);
         return 0;
     }
@@ -1891,7 +1655,6 @@ static int __must_check cf_check intel_iommu_map_page(
         perfc_incr(iommu_pt_coalesces);
     }
 
-    spin_unlock(&ctx->arch.mapping_lock);
     unmap_vtd_domain_page(page);
 
     *flush_flags |= IOMMU_FLUSHF_added;
@@ -1908,10 +1671,10 @@ static int __must_check cf_check intel_iommu_map_page(
 }
 
 static int __must_check cf_check intel_iommu_unmap_page(
-    struct domain *d, dfn_t dfn, unsigned int order, unsigned int *flush_flags)
+    struct domain *d, dfn_t dfn, unsigned int order, unsigned int *flush_flags,
+    struct iommu_context *ctx)
 {
     struct domain_iommu *hd = dom_iommu(d);
-    struct iommu_context *ctx = iommu_default_context(d);
     daddr_t addr = dfn_to_daddr(dfn);
     struct dma_pte *page = NULL, *pte = NULL, old;
     uint64_t pg_maddr;
@@ -1923,20 +1686,13 @@ static int __must_check cf_check intel_iommu_unmap_page(
      */
     ASSERT((hd->platform_ops->page_sizes >> order) & PAGE_SIZE_4K);
 
-    /* Do nothing if VT-d shares EPT page table */
-    if ( iommu_use_hap_pt(d) )
-        return 0;
-
-    /* Do nothing if hardware domain and iommu supports pass thru. */
-    if ( iommu_hwdom_passthrough && is_hardware_domain(d) )
+    if ( ctx->opaque )
         return 0;
 
-    spin_lock(&ctx->arch.mapping_lock);
     /* get target level pte */
     pg_maddr = addr_to_dma_page_maddr(d, ctx, addr, level, flush_flags, false);
     if ( pg_maddr < PAGE_SIZE )
     {
-        spin_unlock(&ctx->arch.mapping_lock);
         return pg_maddr ? -ENOMEM : 0;
     }
 
@@ -1945,7 +1701,6 @@ static int __must_check cf_check intel_iommu_unmap_page(
 
     if ( !dma_pte_present(*pte) )
     {
-        spin_unlock(&ctx->arch.mapping_lock);
         unmap_vtd_domain_page(page);
         return 0;
     }
@@ -1976,8 +1731,6 @@ static int __must_check cf_check intel_iommu_unmap_page(
         perfc_incr(iommu_pt_coalesces);
     }
 
-    spin_unlock(&ctx->arch.mapping_lock);
-
     unmap_vtd_domain_page(page);
 
     *flush_flags |= IOMMU_FLUSHF_modified;
@@ -1990,25 +1743,16 @@ static int __must_check cf_check intel_iommu_unmap_page(
 }
 
 static int cf_check intel_iommu_lookup_page(
-    struct domain *d, dfn_t dfn, mfn_t *mfn, unsigned int *flags)
+    struct domain *d, dfn_t dfn, mfn_t *mfn, unsigned int *flags,
+    struct iommu_context *ctx)
 {
-    struct iommu_context *ctx = iommu_default_context(d);
     uint64_t val;
 
-    /*
-     * If VT-d shares EPT page table or if the domain is the hardware
-     * domain and iommu_passthrough is set then pass back the dfn.
-     */
-    if ( iommu_use_hap_pt(d) ||
-         (iommu_hwdom_passthrough && is_hardware_domain(d)) )
+    if ( ctx->opaque )
         return -EOPNOTSUPP;
 
-    spin_lock(&ctx->arch.mapping_lock);
-
     val = addr_to_dma_page_maddr(d, ctx, dfn_to_daddr(dfn), 0, NULL, false);
 
-    spin_unlock(&ctx->arch.mapping_lock);
-
     if ( val < PAGE_SIZE )
         return -ENOENT;
 
@@ -2037,103 +1781,10 @@ static bool __init vtd_ept_page_compatible(const struct vtd_iommu *iommu)
             (cap_sps_1gb(vtd_cap) && iommu_superpages);
 }
 
-static int cf_check intel_iommu_add_device(u8 devfn, struct pci_dev *pdev)
-{
-    struct acpi_rmrr_unit *rmrr;
-    struct iommu_context *ctx;
-    u16 bdf;
-    int ret, i;
-
-    ASSERT(pcidevs_locked());
-
-    if ( !pdev->domain )
-        return -EINVAL;
-
-    ctx = iommu_default_context(pdev->domain);
-
-    for_each_rmrr_device ( rmrr, bdf, i )
-    {
-        if ( rmrr->segment == pdev->seg && bdf == PCI_BDF(pdev->bus, devfn) )
-        {
-            /*
-             * iommu_add_device() is only called for the hardware
-             * domain (see xen/drivers/passthrough/pci.c:pci_add_device()).
-             * Since RMRRs are always reserved in the e820 map for the hardware
-             * domain, there shouldn't be a conflict.
-             */
-            ret = iommu_identity_mapping(pdev->domain, ctx, p2m_access_rw,
-                                         rmrr->base_address, rmrr->end_address,
-                                         0);
-            if ( ret )
-                dprintk(XENLOG_ERR VTDPREFIX, "%pd: RMRR mapping failed\n",
-                        pdev->domain);
-        }
-    }
-
-    ret = domain_context_mapping(pdev->domain, ctx, devfn, pdev);
-    if ( ret )
-        dprintk(XENLOG_ERR VTDPREFIX, "%pd: context mapping failed\n",
-                pdev->domain);
-
-    return ret;
-}
-
-static int cf_check intel_iommu_enable_device(struct pci_dev *pdev)
-{
-    struct acpi_drhd_unit *drhd = acpi_find_matched_drhd_unit(pdev);
-    int ret = drhd ? ats_device(pdev, drhd) : -ENODEV;
-
-    pci_vtd_quirk(pdev);
-
-    if ( ret <= 0 )
-        return ret;
-
-    ret = enable_ats_device(pdev, &drhd->iommu->ats_devices);
-
-    return ret >= 0 ? 0 : ret;
-}
-
-static int cf_check intel_iommu_remove_device(u8 devfn, struct pci_dev *pdev)
-{
-    const struct acpi_drhd_unit *drhd;
-    struct acpi_rmrr_unit *rmrr;
-    u16 bdf;
-    unsigned int i;
-    struct iommu_context *ctx;
-
-    if ( !pdev->domain )
-        return -EINVAL;
-
-    ctx = iommu_default_context(pdev->domain);
-
-    drhd = domain_context_unmap(pdev->domain, devfn, pdev);
-    if ( IS_ERR(drhd) )
-        return PTR_ERR(drhd);
-
-    for_each_rmrr_device ( rmrr, bdf, i )
-    {
-        if ( rmrr->segment != pdev->seg || bdf != PCI_BDF(pdev->bus, devfn) )
-            continue;
-
-        /*
-         * Any flag is nothing to clear these mappings but here
-         * its always safe and strict to set 0.
-         */
-        iommu_identity_mapping(pdev->domain, ctx, p2m_access_x, rmrr->base_address,
-                               rmrr->end_address, 0);
-    }
-
-    quarantine_teardown(pdev, drhd);
-
-    return 0;
-}
-
 static int __hwdom_init cf_check setup_hwdom_device(
     u8 devfn, struct pci_dev *pdev)
 {
-    struct iommu_context *ctx = iommu_default_context(pdev->domain);
-
-    return domain_context_mapping(pdev->domain, ctx, devfn, pdev);
+    return iommu_attach_context(hardware_domain, pdev, 0);
 }
 
 void clear_fault_bits(struct vtd_iommu *iommu)
@@ -2303,30 +1954,6 @@ static int __must_check init_vtd_hw(bool resume)
     return iommu_flush_all();
 }
 
-static void __hwdom_init setup_hwdom_rmrr(struct domain *d)
-{
-    struct iommu_context *ctx = iommu_default_context(d);
-    struct acpi_rmrr_unit *rmrr;
-    u16 bdf;
-    int ret, i;
-
-    pcidevs_lock();
-    for_each_rmrr_device ( rmrr, bdf, i )
-    {
-        /*
-         * Here means we're add a device to the hardware domain.
-         * Since RMRRs are always reserved in the e820 map for the hardware
-         * domain, there shouldn't be a conflict. So its always safe and
-         * strict to set 0.
-         */
-        ret = iommu_identity_mapping(d, ctx, p2m_access_rw, rmrr->base_address,
-                                     rmrr->end_address, 0);
-        if ( ret )
-            dprintk(XENLOG_ERR VTDPREFIX,
-                     "IOMMU: mapping reserved region failed\n");
-    }
-    pcidevs_unlock();
-}
 
 static struct iommu_state {
     uint32_t fectl;
@@ -2475,173 +2102,6 @@ static int __init cf_check vtd_setup(void)
     return ret;
 }
 
-static int cf_check reassign_device_ownership(
-    struct domain *source,
-    struct domain *target,
-    u8 devfn, struct pci_dev *pdev)
-{
-    int ret;
-
-    if ( !has_arch_pdevs(target) )
-        vmx_pi_hooks_assign(target);
-
-#ifdef CONFIG_PV
-    /*
-        * Devices assigned to untrusted domains (here assumed to be any domU)
-        * can attempt to send arbitrary LAPIC/MSI messages. We are unprotected
-        * by the root complex unless interrupt remapping is enabled.
-        */
-    if ( !iommu_intremap && !is_hardware_domain(target) &&
-            !is_system_domain(target) )
-        untrusted_msi = true;
-#endif
-
-    ret = domain_context_mapping(target, iommu_default_context(target), devfn, pdev);
-
-    if ( ret )
-    {
-        if ( !has_arch_pdevs(target) )
-            vmx_pi_hooks_deassign(target);
-        return ret;
-    }
-
-    if ( devfn == pdev->devfn && pdev->domain != target )
-    {
-        write_lock(&source->pci_lock);
-        list_del(&pdev->domain_list);
-        write_unlock(&source->pci_lock);
-
-        pdev->domain = target;
-
-        write_lock(&target->pci_lock);
-        list_add(&pdev->domain_list, &target->pdev_list);
-        write_unlock(&target->pci_lock);
-    }
-
-    if ( !has_arch_pdevs(source) )
-        vmx_pi_hooks_deassign(source);
-
-    /*
-     * If the device belongs to the hardware domain, and it has RMRR, don't
-     * remove it from the hardware domain, because BIOS may use RMRR at
-     * booting time.
-     */
-    if ( !is_hardware_domain(source) )
-    {
-        const struct acpi_rmrr_unit *rmrr;
-        struct iommu_context *ctx = iommu_default_context(source);
-        u16 bdf;
-        unsigned int i;
-
-        for_each_rmrr_device( rmrr, bdf, i )
-            if ( rmrr->segment == pdev->seg &&
-                 bdf == PCI_BDF(pdev->bus, devfn) )
-            {
-                /*
-                 * Any RMRR flag is always ignored when remove a device,
-                 * but its always safe and strict to set 0.
-                 */
-                ret = iommu_identity_mapping(source, ctx, p2m_access_x,
-                                             rmrr->base_address,
-                                             rmrr->end_address, 0);
-                if ( ret && ret != -ENOENT )
-                    return ret;
-            }
-    }
-
-    return 0;
-}
-
-static int cf_check intel_iommu_assign_device(
-    struct domain *d, u8 devfn, struct pci_dev *pdev, u32 flag)
-{
-    struct domain *s = pdev->domain;
-    struct iommu_context *ctx = iommu_default_context(d);
-    struct acpi_rmrr_unit *rmrr;
-    int ret = 0, i;
-    u16 bdf, seg;
-    u8 bus;
-
-    if ( list_empty(&acpi_drhd_units) )
-        return -ENODEV;
-
-    seg = pdev->seg;
-    bus = pdev->bus;
-    /*
-     * In rare cases one given rmrr is shared by multiple devices but
-     * obviously this would put the security of a system at risk. So
-     * we would prevent from this sort of device assignment. But this
-     * can be permitted if user set
-     *      "pci = [ 'sbdf, rdm_policy=relaxed' ]"
-     *
-     * TODO: in the future we can introduce group device assignment
-     * interface to make sure devices sharing RMRR are assigned to the
-     * same domain together.
-     */
-    for_each_rmrr_device( rmrr, bdf, i )
-    {
-        if ( rmrr->segment == seg && bdf == PCI_BDF(bus, devfn) &&
-             rmrr->scope.devices_cnt > 1 )
-        {
-            bool relaxed = flag & XEN_DOMCTL_DEV_RDM_RELAXED;
-
-            printk(XENLOG_GUEST "%s" VTDPREFIX
-                   " It's %s to assign %pp"
-                   " with shared RMRR at %"PRIx64" for %pd.\n",
-                   relaxed ? XENLOG_WARNING : XENLOG_ERR,
-                   relaxed ? "risky" : "disallowed",
-                   &PCI_SBDF(seg, bus, devfn), rmrr->base_address, d);
-            if ( !relaxed )
-                return -EPERM;
-        }
-    }
-
-    /* Setup rmrr identity mapping */
-    for_each_rmrr_device( rmrr, bdf, i )
-    {
-        if ( rmrr->segment == seg && bdf == PCI_BDF(bus, devfn) )
-        {
-            ret = iommu_identity_mapping(d, ctx, p2m_access_rw, rmrr->base_address,
-                                         rmrr->end_address, flag);
-            if ( ret )
-            {
-                printk(XENLOG_G_ERR VTDPREFIX
-                       "%pd: cannot map reserved region [%"PRIx64",%"PRIx64"]: %d\n",
-                       d, rmrr->base_address, rmrr->end_address, ret);
-                break;
-            }
-        }
-    }
-
-    if ( !ret )
-        ret = reassign_device_ownership(s, d, devfn, pdev);
-
-    /* See reassign_device_ownership() for the hwdom aspect. */
-    if ( !ret || is_hardware_domain(d) )
-        return ret;
-
-    for_each_rmrr_device( rmrr, bdf, i )
-    {
-        if ( rmrr->segment == seg && bdf == PCI_BDF(bus, devfn) )
-        {
-            int rc = iommu_identity_mapping(d, ctx, p2m_access_x,
-                                            rmrr->base_address,
-                                            rmrr->end_address, 0);
-
-            if ( rc && rc != -ENOENT )
-            {
-                printk(XENLOG_ERR VTDPREFIX
-                       "%pd: cannot unmap reserved region [%"PRIx64",%"PRIx64"]: %d\n",
-                       d, rmrr->base_address, rmrr->end_address, rc);
-                domain_crash(d);
-                break;
-            }
-        }
-    }
-
-    return ret;
-}
-
 static int cf_check intel_iommu_group_id(u16 seg, u8 bus, u8 devfn)
 {
     u8 secbus;
@@ -2766,6 +2226,11 @@ static void vtd_dump_page_table_level(paddr_t pt_maddr, int level, paddr_t gpa,
     if ( level < 1 )
         return;
 
+    if (pt_maddr == 0) {
+        printk(" (empty)\n");
+        return;
+    }
+
     pt_vaddr = map_vtd_domain_page(pt_maddr);
 
     next_level = level - 1;
@@ -2797,20 +2262,296 @@ static void vtd_dump_page_table_level(paddr_t pt_maddr, int level, paddr_t gpa,
 static void cf_check vtd_dump_page_tables(struct domain *d)
 {
     const struct domain_iommu *hd = dom_iommu(d);
-    struct iommu_context *ctx = iommu_default_context(d);
+    unsigned int i;
 
-    printk(VTDPREFIX" %pd table has %d levels\n", d,
+    printk(VTDPREFIX " %pd table has %d levels\n", d,
            agaw_to_level(hd->arch.vtd.agaw));
-    vtd_dump_page_table_level(ctx->arch.vtd.pgd_maddr,
-                              agaw_to_level(hd->arch.vtd.agaw), 0, 0);
+
+    for (i = 1; i < (1 + hd->other_contexts.count); ++i)
+    {
+        struct iommu_context *ctx = iommu_get_context(d, i);
+
+        printk(VTDPREFIX " %pd context %d: %s\n", d, i,
+               ctx ? "allocated" : "non-allocated");
+
+        if (ctx)
+        {
+            vtd_dump_page_table_level(ctx->arch.vtd.pgd_maddr,
+                                      agaw_to_level(hd->arch.vtd.agaw), 0, 0);
+            iommu_put_context(ctx);
+        }
+    }
+}
+
+static int intel_iommu_cleanup_pte(uint64_t pte_maddr, bool preempt)
+{
+    size_t i;
+    struct dma_pte *pte = map_vtd_domain_page(pte_maddr);
+
+    for (i = 0; i < (1 << PAGETABLE_ORDER); ++i)
+        if ( dma_pte_present(pte[i]) )
+        {
+            /* Remove the reference of the target mapping (if needed) */
+            mfn_t mfn = maddr_to_mfn(dma_pte_addr(pte[i]));
+
+            if ( mfn_valid(mfn) )
+                put_page(mfn_to_page(mfn));
+
+            if ( preempt )
+                dma_clear_pte(pte[i]);
+        }
+
+    unmap_vtd_domain_page(pte);
+
+    return 0;
+}
+
+/**
+ * Cleanup logic :
+ * Walk through the entire page table, progressively removing mappings if preempt.
+ *
+ * Return values :
+ *  - Report preemption with -ERESTART.
+ *  - Report empty pte/pgd with 0.
+ *
+ * When preempted during superpage operation, store state in vtd.superpage_progress.
+ */
+
+static int intel_iommu_cleanup_superpage(struct iommu_context *ctx,
+                                          unsigned int page_order, uint64_t pte_maddr,
+                                          bool preempt)
+{
+    size_t i = 0, page_count = 1 << page_order;
+    struct page_info *page = maddr_to_page(pte_maddr);
+
+    if ( preempt )
+        i = ctx->arch.vtd.superpage_progress;
+
+    for (; i < page_count; page++)
+    {
+        put_page(page);
+
+        if ( preempt && (i & 0xff) && general_preempt_check() )
+        {
+            ctx->arch.vtd.superpage_progress = i + 1;
+            return -ERESTART;
+        }
+    }
+
+    if ( preempt )
+        ctx->arch.vtd.superpage_progress = 0;
+
+    return 0;
+}
+
+static int intel_iommu_cleanup_mappings(struct iommu_context *ctx,
+                                         unsigned int nr_pt_levels, uint64_t pgd_maddr,
+                                         bool preempt)
+{
+    size_t i;
+    int rc;
+    struct dma_pte *pgd;
+
+    if ( ctx->opaque )
+        /* don't touch opaque contexts */
+        return 0;
+
+    pgd = map_vtd_domain_page(pgd_maddr);
+
+    for (i = 0; i < (1 << PAGETABLE_ORDER); ++i)
+    {
+        if ( dma_pte_present(pgd[i]) )
+        {
+            uint64_t pte_maddr = dma_pte_addr(pgd[i]);
+
+            if ( dma_pte_superpage(pgd[i]) )
+                rc = intel_iommu_cleanup_superpage(ctx, nr_pt_levels * SUPERPAGE_ORDER,
+                                                   pte_maddr, preempt);
+            else if ( nr_pt_levels > 2 )
+                /* Next level is not PTE */
+                rc = intel_iommu_cleanup_mappings(ctx, nr_pt_levels - 1,
+                                                  pte_maddr, preempt);
+            else
+                rc = intel_iommu_cleanup_pte(pte_maddr, preempt);
+
+            if ( preempt && !rc )
+                /* Fold pgd (no more mappings in it) */
+                dma_clear_pte(pgd[i]);
+            else if ( preempt && (rc == -ERESTART || general_preempt_check()) )
+            {
+                unmap_vtd_domain_page(pgd);
+                return -ERESTART;
+            }
+        }
+    }
+
+    unmap_vtd_domain_page(pgd);
+
+    return 0;
+}
+
+static int cf_check intel_iommu_context_teardown(struct domain *d,
+                                        struct iommu_context *ctx, u32 flags)
+{
+    struct acpi_drhd_unit *drhd;
+    pcidevs_lock();
+
+    // Cleanup mappings
+    if ( intel_iommu_cleanup_mappings(ctx, agaw_to_level(d->iommu.arch.vtd.agaw),
+                                      ctx->arch.vtd.pgd_maddr,
+                                      flags & IOMMUF_preempt) < 0 )
+    {
+        pcidevs_unlock();
+        return -ERESTART;
+    }
+
+    ASSERT(ctx->arch.vtd.didmap);
+
+    for_each_drhd_unit(drhd)
+    {
+        unsigned long index = drhd->iommu->index;
+
+        iommu_free_domid(ctx->arch.vtd.didmap[index], drhd->iommu->domid_bitmap);
+    }
+
+    xfree(ctx->arch.vtd.didmap);
+
+    pcidevs_unlock();
+    return arch_iommu_context_teardown(d, ctx, flags);
 }
 
-static int cf_check intel_iommu_quarantine_init(struct pci_dev *pdev,
-                                                bool scratch_page)
+static int intel_iommu_dev_rmrr(struct domain *d, struct pci_dev *pdev,
+                                struct iommu_context *ctx, bool unmap)
 {
+    struct acpi_rmrr_unit *rmrr;
+    u16 bdf;
+    int ret, i;
+
+    for_each_rmrr_device(rmrr, bdf, i)
+    {
+        if ( PCI_SBDF(rmrr->segment, bdf).sbdf == pdev->sbdf.sbdf )
+        {
+            ret = iommu_identity_mapping(d, ctx,
+                                         unmap ? p2m_access_x : p2m_access_rw,
+                                         rmrr->base_address, rmrr->end_address,
+                                         0);
+
+            if ( ret < 0 )
+                return ret;
+        }
+    }
+
     return 0;
 }
 
+static int cf_check intel_iommu_attach(struct domain *d, struct pci_dev *pdev,
+                                       struct iommu_context *ctx)
+{
+    int ret;
+    const struct acpi_drhd_unit *drhd = acpi_find_matched_drhd_unit(pdev);
+
+    if ( !pdev || !drhd )
+        return -EINVAL;
+
+    ret = intel_iommu_dev_rmrr(d, pdev, ctx, false);
+
+    if ( ret )
+        return ret;
+
+    ret = apply_context(d, ctx, pdev, pdev->devfn, NULL);
+
+    if ( ret )
+        return ret;
+
+    pci_vtd_quirk(pdev);
+
+    return ret;
+}
+
+static int cf_check intel_iommu_detach(struct domain *d, struct pci_dev *pdev,
+                                       struct iommu_context *prev_ctx)
+{
+    int ret, rc;
+    const struct acpi_drhd_unit *drhd = acpi_find_matched_drhd_unit(pdev);
+
+    if ( !pdev || !drhd )
+        return -EINVAL;
+
+    ret = unapply_context_single(d, drhd->iommu, prev_ctx, pdev->bus, pdev->devfn);
+
+    if ( ret )
+        return ret;
+
+    if ( (rc = intel_iommu_dev_rmrr(d, pdev, prev_ctx, true)) )
+        printk(XENLOG_WARNING VTDPREFIX
+               " Unable to unmap RMRR from d%dc%d for %pp (%d)\n",
+               d->domain_id, prev_ctx->id, &pdev->sbdf, rc);
+
+    return ret;
+}
+
+static int cf_check intel_iommu_reattach(struct domain *d,
+                                         struct pci_dev *pdev,
+                                         struct iommu_context *prev_ctx,
+                                         struct iommu_context *ctx)
+{
+    int ret, rc;
+    const struct acpi_drhd_unit *drhd = acpi_find_matched_drhd_unit(pdev);
+
+    if ( !pdev || !drhd )
+        return -EINVAL;
+
+    ret = intel_iommu_dev_rmrr(d, pdev, ctx, false);
+
+    if ( ret )
+        return ret;
+
+    ret = apply_context(d, ctx, pdev, pdev->devfn, prev_ctx);
+
+    if ( ret )
+    {
+        /* Remove the RMRR we just added */
+        if ( (rc = intel_iommu_dev_rmrr(d, pdev, ctx, true)) )
+            printk(XENLOG_WARNING VTDPREFIX
+                   " Unable to unmap RMRR from d%dc%d for %pp (%d)\n",
+                   d->domain_id, prev_ctx->id, &pdev->sbdf, rc);
+
+        return ret;
+    }
+
+    /* Remove previous context RMRR  */
+    if ( (rc = intel_iommu_dev_rmrr(d, pdev, prev_ctx, true)) )
+        printk(XENLOG_WARNING VTDPREFIX
+               " Unable to unmap previous RMRR for %pp (%d)\n", &pdev->sbdf, rc);
+
+    pci_vtd_quirk(pdev);
+
+    return ret;
+}
+
+static int cf_check intel_iommu_add_devfn(struct domain *d,
+                                          struct pci_dev *pdev, u16 devfn,
+                                          struct iommu_context *ctx)
+{
+    const struct acpi_drhd_unit *drhd = acpi_find_matched_drhd_unit(pdev);
+
+    if ( !pdev || !drhd )
+        return -EINVAL;
+
+    return apply_context(d, ctx, pdev, devfn, NULL);
+}
+
+static int cf_check intel_iommu_remove_devfn(struct domain *d, struct pci_dev *pdev,
+                                             u16 devfn, struct iommu_context *prev_ctx)
+{
+    const struct acpi_drhd_unit *drhd = acpi_find_matched_drhd_unit(pdev);
+
+    if ( !pdev || !drhd )
+        return -EINVAL;
+
+    return unapply_context_single(d, drhd->iommu, prev_ctx, pdev->bus, devfn);
+}
+
 static void cf_check vtd_quiesce(void)
 {
     const struct acpi_drhd_unit *drhd;
@@ -2833,17 +2574,18 @@ static const struct iommu_ops __initconst_cf_clobber vtd_ops = {
     .page_sizes = PAGE_SIZE_4K,
     .init = intel_iommu_domain_init,
     .hwdom_init = intel_iommu_hwdom_init,
-    .quarantine_init = intel_iommu_quarantine_init,
-    .add_device = intel_iommu_add_device,
-    .enable_device = intel_iommu_enable_device,
-    .remove_device = intel_iommu_remove_device,
-    .assign_device  = intel_iommu_assign_device,
+    .context_init = intel_iommu_context_init,
+    .context_teardown = intel_iommu_context_teardown,
+    .attach = intel_iommu_attach,
+    .detach = intel_iommu_detach,
+    .reattach = intel_iommu_reattach,
+    .add_devfn = intel_iommu_add_devfn,
+    .remove_devfn = intel_iommu_remove_devfn,
     .teardown = iommu_domain_teardown,
     .clear_root_pgtable = iommu_clear_root_pgtable,
     .map_page = intel_iommu_map_page,
     .unmap_page = intel_iommu_unmap_page,
     .lookup_page = intel_iommu_lookup_page,
-    .reassign_device = reassign_device_ownership,
     .get_device_group_id = intel_iommu_group_id,
     .enable_x2apic = intel_iommu_enable_eim,
     .disable_x2apic = intel_iommu_disable_eim,
diff --git a/xen/drivers/passthrough/vtd/quirks.c b/xen/drivers/passthrough/vtd/quirks.c
index 195fc5c08f..517d0e7a13 100644
--- a/xen/drivers/passthrough/vtd/quirks.c
+++ b/xen/drivers/passthrough/vtd/quirks.c
@@ -409,9 +409,9 @@ void __init platform_quirks_init(void)
 
 static int __must_check map_me_phantom_function(struct domain *domain,
                                                 unsigned int dev,
-                                                domid_t domid,
-                                                paddr_t pgd_maddr,
-                                                unsigned int mode)
+                                                unsigned int mode,
+                                                struct iommu_context *ctx,
+                                                struct iommu_context *prev_ctx)
 {
     struct acpi_drhd_unit *drhd;
     struct pci_dev *pdev;
@@ -423,19 +423,17 @@ static int __must_check map_me_phantom_function(struct domain *domain,
 
     /* map or unmap ME phantom function */
     if ( !(mode & UNMAP_ME_PHANTOM_FUNC) )
-        rc = domain_context_mapping_one(domain, iommu_default_context(domain),
-                                        drhd->iommu, 0,
-                                        PCI_DEVFN(dev, 7), NULL,
-                                        domid, pgd_maddr, mode);
+        rc = apply_context_single(domain, ctx, drhd->iommu, 0,
+                                  PCI_DEVFN(dev, 7), prev_ctx);
     else
-        rc = domain_context_unmap_one(domain, drhd->iommu, 0,
-                                      PCI_DEVFN(dev, 7));
+        rc = unapply_context_single(domain, drhd->iommu, prev_ctx, 0, PCI_DEVFN(dev, 7));
 
     return rc;
 }
 
 int me_wifi_quirk(struct domain *domain, uint8_t bus, uint8_t devfn,
-                  domid_t domid, paddr_t pgd_maddr, unsigned int mode)
+                  domid_t domid, unsigned int mode,
+                  struct iommu_context *ctx, struct iommu_context *prev_ctx)
 {
     u32 id;
     int rc = 0;
@@ -459,7 +457,7 @@ int me_wifi_quirk(struct domain *domain, uint8_t bus, uint8_t devfn,
             case 0x423b8086:
             case 0x423c8086:
             case 0x423d8086:
-                rc = map_me_phantom_function(domain, 3, domid, pgd_maddr, mode);
+                rc = map_me_phantom_function(domain, 3, mode, ctx, prev_ctx);
                 break;
             default:
                 break;
@@ -485,7 +483,7 @@ int me_wifi_quirk(struct domain *domain, uint8_t bus, uint8_t devfn,
             case 0x42388086:        /* Puma Peak */
             case 0x422b8086:
             case 0x422c8086:
-                rc = map_me_phantom_function(domain, 22, domid, pgd_maddr, mode);
+                rc = map_me_phantom_function(domain, 22, mode, ctx, prev_ctx);
                 break;
             default:
                 break;
diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/x86/iommu.c
index 98cca92dc3..d8becfa869 100644
--- a/xen/drivers/passthrough/x86/iommu.c
+++ b/xen/drivers/passthrough/x86/iommu.c
@@ -12,6 +12,12 @@
  * this program; If not, see .
  */
 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
 #include 
 #include 
 #include 
@@ -19,7 +25,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -29,6 +34,9 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 
 const struct iommu_init_ops *__initdata iommu_init_ops;
 struct iommu_ops __ro_after_init iommu_ops;
@@ -192,8 +200,6 @@ int arch_iommu_domain_init(struct domain *d)
 
 int arch_iommu_context_init(struct domain *d, struct iommu_context *ctx, u32 flags)
 {
-    spin_lock_init(&ctx->arch.mapping_lock);
-
     INIT_PAGE_LIST_HEAD(&ctx->arch.pgtables);
     INIT_LIST_HEAD(&ctx->arch.identity_maps);
 
@@ -220,6 +226,95 @@ struct identity_map {
     unsigned int count;
 };
 
+static int unmap_identity_region(struct domain *d, struct iommu_context *ctx,
+                                 unsigned int base_pfn, unsigned int end_pfn)
+{
+    int ret = 0;
+
+    if ( ctx->opaque && !ctx->id )
+    {
+        #ifdef CONFIG_HVM
+        this_cpu(iommu_dont_flush_iotlb) = true;
+        while ( base_pfn < end_pfn )
+        {
+            if ( p2m_remove_identity_entry(d, base_pfn) )
+                ret = -ENXIO;
+
+            base_pfn++;
+        }
+        this_cpu(iommu_dont_flush_iotlb) = false;
+        #else
+        ASSERT_UNREACHABLE();
+        #endif
+    }
+    else
+    {
+        size_t page_count = end_pfn - base_pfn + 1;
+        unsigned int flush_flags;
+
+        ret = iommu_unmap(d, _dfn(base_pfn), page_count, 0, &flush_flags,
+                          ctx->id);
+
+        if ( ret )
+            return ret;
+
+        ret = iommu_iotlb_flush(d, _dfn(base_pfn), page_count,
+                                flush_flags, ctx->id);
+    }
+
+    return ret;
+}
+
+static int map_identity_region(struct domain *d, struct iommu_context *ctx,
+                               unsigned int base_pfn, unsigned int end_pfn,
+                               p2m_access_t p2ma, unsigned int flag)
+{
+    int ret = 0;
+    unsigned int flush_flags = 0;
+    size_t page_count = end_pfn - base_pfn + 1;
+
+    if ( ctx->opaque && !ctx->id )
+    {
+        #ifdef CONFIG_HVM
+        int i;
+        this_cpu(iommu_dont_flush_iotlb) = true;
+
+        for (i = 0; i < page_count; i++)
+        {
+            ret = p2m_add_identity_entry(d, base_pfn + i, p2ma, flag);
+
+            if ( ret )
+                break;
+
+            base_pfn++;
+        }
+        this_cpu(iommu_dont_flush_iotlb) = false;
+        #else
+        ASSERT_UNREACHABLE();
+        #endif
+    }
+    else
+    {
+        int i;
+
+        for (i = 0; i < page_count; i++)
+        {
+            ret = iommu_map(d, _dfn(base_pfn + i), _mfn(base_pfn + i), 1,
+                            p2m_access_to_iommu_flags(p2ma), &flush_flags,
+                            ctx->id);
+
+            if ( ret )
+                break;
+        }
+    }
+
+    ret = iommu_iotlb_flush(d, _dfn(base_pfn), page_count, flush_flags,
+                            ctx->id);
+
+    return ret;
+}
+
+/* p2m_access_x removes the mapping */
 int iommu_identity_mapping(struct domain *d, struct iommu_context *ctx,
                            p2m_access_t p2ma, paddr_t base, paddr_t end,
                            unsigned int flag)
@@ -227,24 +322,20 @@ int iommu_identity_mapping(struct domain *d, struct iommu_context *ctx,
     unsigned long base_pfn = base >> PAGE_SHIFT_4K;
     unsigned long end_pfn = PAGE_ALIGN_4K(end) >> PAGE_SHIFT_4K;
     struct identity_map *map;
+    int ret = 0;
 
     ASSERT(pcidevs_locked());
     ASSERT(base < end);
 
-    /*
-     * No need to acquire hd->arch.mapping_lock: Both insertion and removal
-     * get done while holding pcidevs_lock.
-     */
     list_for_each_entry( map, &ctx->arch.identity_maps, list )
     {
         if ( map->base == base && map->end == end )
         {
-            int ret = 0;
-
             if ( p2ma != p2m_access_x )
             {
                 if ( map->access != p2ma )
                     return -EADDRINUSE;
+
                 ++map->count;
                 return 0;
             }
@@ -252,12 +343,9 @@ int iommu_identity_mapping(struct domain *d, struct iommu_context *ctx,
             if ( --map->count )
                 return 0;
 
-            while ( base_pfn < end_pfn )
-            {
-                if ( clear_identity_p2m_entry(d, base_pfn) )
-                    ret = -ENXIO;
-                base_pfn++;
-            }
+            printk("Unmapping [%"PRI_mfn"x:%"PRI_mfn"] for d%dc%d\n", base_pfn, end_pfn,
+                   d->domain_id, ctx->id);
+            ret = unmap_identity_region(d, ctx, base_pfn, end_pfn);
 
             list_del(&map->list);
             xfree(map);
@@ -281,27 +369,17 @@ int iommu_identity_mapping(struct domain *d, struct iommu_context *ctx,
     map->access = p2ma;
     map->count = 1;
 
-    /*
-     * Insert into list ahead of mapping, so the range can be found when
-     * trying to clean up.
-     */
-    list_add_tail(&map->list, &ctx->arch.identity_maps);
+    printk("Mapping [%"PRI_mfn"x:%"PRI_mfn"] for d%dc%d\n", base_pfn, end_pfn,
+           d->domain_id, ctx->id);
+    ret = map_identity_region(d, ctx, base_pfn, end_pfn, p2ma, flag);
 
-    for ( ; base_pfn < end_pfn; ++base_pfn )
+    if ( ret )
     {
-        int err = set_identity_p2m_entry(d, base_pfn, p2ma, flag);
-
-        if ( !err )
-            continue;
-
-        if ( (map->base >> PAGE_SHIFT_4K) == base_pfn )
-        {
-            list_del(&map->list);
-            xfree(map);
-        }
-        return err;
+        xfree(map);
+        return ret;
     }
 
+    list_add(&map->list, &ctx->arch.identity_maps);
     return 0;
 }
 
@@ -385,7 +463,7 @@ static int __hwdom_init cf_check identity_map(unsigned long s, unsigned long e,
             if ( iomem_access_permitted(d, s, s) )
             {
                 rc = iommu_map(d, _dfn(s), _mfn(s), 1, perms,
-                               &info->flush_flags);
+                               &info->flush_flags, 0);
                 if ( rc < 0 )
                     break;
                 /* Must map a frame at least, which is what we request for. */
@@ -395,7 +473,7 @@ static int __hwdom_init cf_check identity_map(unsigned long s, unsigned long e,
             s++;
         }
         while ( (rc = iommu_map(d, _dfn(s), _mfn(s), e - s + 1,
-                                perms, &info->flush_flags)) > 0 )
+                                perms, &info->flush_flags, 0)) > 0 )
         {
             s += rc;
             process_pending_softirqs();
@@ -522,7 +600,7 @@ void __hwdom_init arch_iommu_hwdom_init(struct domain *d)
                map_data.mmio_ro ? "read-only " : "", rc);
 
     /* Use if to avoid compiler warning */
-    if ( iommu_iotlb_flush_all(d, map_data.flush_flags) )
+    if ( iommu_iotlb_flush_all(d, 0, map_data.flush_flags) )
         return;
 }
 
@@ -579,14 +657,11 @@ int iommu_free_pgtables(struct domain *d, struct iommu_context *ctx)
     if ( !is_iommu_enabled(d) )
         return 0;
 
-    /* After this barrier, no new IOMMU mappings can be inserted. */
-    spin_barrier(&ctx->arch.mapping_lock);
-
     /*
      * Pages will be moved to the free list below. So we want to
      * clear the root page-table to avoid any potential use after-free.
      */
-    iommu_vcall(hd->platform_ops, clear_root_pgtable, d);
+    iommu_vcall(hd->platform_ops, clear_root_pgtable, d, ctx);
 
     while ( (pg = page_list_remove_head(&ctx->arch.pgtables)) )
     {
diff --git a/xen/include/xen/iommu.h b/xen/include/xen/iommu.h
index 91f106968e..8c20f575ee 100644
--- a/xen/include/xen/iommu.h
+++ b/xen/include/xen/iommu.h
@@ -187,11 +187,10 @@ enum
  */
 long __must_check iommu_map(struct domain *d, dfn_t dfn0, mfn_t mfn0,
                             unsigned long page_count, unsigned int flags,
-                            unsigned int *flush_flags);
+                            unsigned int *flush_flags, u16 ctx_id);
 long __must_check iommu_unmap(struct domain *d, dfn_t dfn0,
                               unsigned long page_count, unsigned int flags,
-                              unsigned int *flush_flags);
-
+                              unsigned int *flush_flags, u16 ctx_id);
 int __must_check iommu_legacy_map(struct domain *d, dfn_t dfn, mfn_t mfn,
                                   unsigned long page_count,
                                   unsigned int flags);
@@ -199,12 +198,13 @@ int __must_check iommu_legacy_unmap(struct domain *d, dfn_t dfn,
                                     unsigned long page_count);
 
 int __must_check iommu_lookup_page(struct domain *d, dfn_t dfn, mfn_t *mfn,
-                                   unsigned int *flags);
+                                   unsigned int *flags, u16 ctx_id);
 
 int __must_check iommu_iotlb_flush(struct domain *d, dfn_t dfn,
                                    unsigned long page_count,
-                                   unsigned int flush_flags);
-int __must_check iommu_iotlb_flush_all(struct domain *d,
+                                   unsigned int flush_flags,
+                                   u16 ctx_id);
+int __must_check iommu_iotlb_flush_all(struct domain *d, u16 ctx_id,
                                        unsigned int flush_flags);
 
 enum iommu_feature
@@ -321,20 +321,32 @@ struct page_info;
  */
 typedef int iommu_grdm_t(xen_pfn_t start, xen_ulong_t nr, u32 id, void *ctxt);
 
+#define IOMMU_INVALID_CONTEXT_ID 0xFFFF
+
+struct iommu_context;
+
 struct iommu_ops {
     unsigned long page_sizes;
     int (*init)(struct domain *d);
     void (*hwdom_init)(struct domain *d);
-    int (*quarantine_init)(device_t *dev, bool scratch_page);
-    int (*add_device)(uint8_t devfn, device_t *dev);
-    int (*enable_device)(device_t *dev);
-    int (*remove_device)(uint8_t devfn, device_t *dev);
-    int (*assign_device)(struct domain *d, uint8_t devfn, device_t *dev,
-                         uint32_t flag);
-    int (*reassign_device)(struct domain *s, struct domain *t,
-                           uint8_t devfn, device_t *dev);
+    int (*context_init)(struct domain *d, struct iommu_context *ctx,
+                        u32 flags);
+    int (*context_teardown)(struct domain *d, struct iommu_context *ctx,
+                            u32 flags);
+    int (*attach)(struct domain *d, device_t *dev,
+                  struct iommu_context *ctx);
+    int (*detach)(struct domain *d, device_t *dev,
+                   struct iommu_context *prev_ctx);
+    int (*reattach)(struct domain *d, device_t *dev,
+                    struct iommu_context *prev_ctx,
+                    struct iommu_context *ctx);
+
 #ifdef CONFIG_HAS_PCI
     int (*get_device_group_id)(uint16_t seg, uint8_t bus, uint8_t devfn);
+    int (*add_devfn)(struct domain *d, struct pci_dev *pdev, u16 devfn,
+                     struct iommu_context *ctx);
+    int (*remove_devfn)(struct domain *d, struct pci_dev *pdev, u16 devfn,
+                        struct iommu_context *prev_ctx);
 #endif /* HAS_PCI */
 
     void (*teardown)(struct domain *d);
@@ -345,12 +357,15 @@ struct iommu_ops {
      */
     int __must_check (*map_page)(struct domain *d, dfn_t dfn, mfn_t mfn,
                                  unsigned int flags,
-                                 unsigned int *flush_flags);
+                                 unsigned int *flush_flags,
+                                 struct iommu_context *ctx);
     int __must_check (*unmap_page)(struct domain *d, dfn_t dfn,
                                    unsigned int order,
-                                   unsigned int *flush_flags);
+                                   unsigned int *flush_flags,
+                                   struct iommu_context *ctx);
     int __must_check (*lookup_page)(struct domain *d, dfn_t dfn, mfn_t *mfn,
-                                    unsigned int *flags);
+                                    unsigned int *flags,
+                                    struct iommu_context *ctx);
 
 #ifdef CONFIG_X86
     int (*enable_x2apic)(void);
@@ -363,14 +378,15 @@ struct iommu_ops {
     int (*setup_hpet_msi)(struct msi_desc *msi_desc);
 
     void (*adjust_irq_affinities)(void);
-    void (*clear_root_pgtable)(struct domain *d);
+    void (*clear_root_pgtable)(struct domain *d, struct iommu_context *ctx);
     int (*update_ire_from_msi)(struct msi_desc *msi_desc, struct msi_msg *msg);
 #endif /* CONFIG_X86 */
 
     int __must_check (*suspend)(void);
     void (*resume)(void);
     void (*crash_shutdown)(void);
-    int __must_check (*iotlb_flush)(struct domain *d, dfn_t dfn,
+    int __must_check (*iotlb_flush)(struct domain *d,
+                                    struct iommu_context *ctx, dfn_t dfn,
                                     unsigned long page_count,
                                     unsigned int flush_flags);
     int (*get_reserved_device_memory)(iommu_grdm_t *func, void *ctxt);
@@ -418,16 +434,37 @@ extern int iommu_get_extra_reserved_device_memory(iommu_grdm_t *func,
 
 struct iommu_context {
     #ifdef CONFIG_HAS_PASSTHROUGH
-    u16 id; /* Context id (0 means default context) */
+    uint16_t id; /* Context id (0 means default context) */
+    rspinlock_t lock; /* context lock */
+
+    struct list_head devices;
 
     struct arch_iommu_context arch;
+
+    bool opaque; /* context can't be modified nor accessed (e.g HAP) */
+    bool dying; /* the context is tearing down */
     #endif
 };
 
+struct iommu_context_list {
+    atomic_t initialized; /* has/is context list being initialized ? */
+    rwlock_t lock; /* prevent concurrent destruction and access of contexts */
+    uint16_t count; /* Context count excluding default context */
+
+    /* if count > 0 */
+
+    unsigned long *bitmap; /* bitmap of context allocation */
+    struct iommu_context *map; /* Map of contexts */
+};
+
+
 struct domain_iommu {
+
 #ifdef CONFIG_HAS_PASSTHROUGH
     struct arch_iommu arch;
+
     struct iommu_context default_ctx;
+    struct iommu_context_list other_contexts;
 #endif
 
     /* iommu_ops */
@@ -491,6 +528,8 @@ void iommu_resume(void);
 void iommu_crash_shutdown(void);
 void iommu_quiesce(void);
 int iommu_get_reserved_device_memory(iommu_grdm_t *func, void *ctxt);
+
+int __init iommu_quarantine_init(void);
 int iommu_quarantine_dev_init(device_t *dev);
 
 #ifdef CONFIG_HAS_PCI
@@ -500,6 +539,26 @@ int iommu_do_pci_domctl(struct xen_domctl *domctl, struct domain *d,
 
 void iommu_dev_iotlb_flush_timeout(struct domain *d, struct pci_dev *pdev);
 
+
+struct iommu_context *iommu_get_context(struct domain *d, u16 ctx_id);
+void iommu_put_context(struct iommu_context *ctx);
+
+#define IOMMU_CONTEXT_INIT_default (1 << 0)
+#define IOMMU_CONTEXT_INIT_quarantine (1 << 1)
+int iommu_context_init(struct domain *d, struct iommu_context *ctx, u16 ctx_id, u32 flags);
+
+#define IOMMU_TEARDOWN_REATTACH_DEFAULT (1 << 0)
+#define IOMMU_TEARDOWN_PREEMPT (1 << 1)
+int iommu_context_teardown(struct domain *d, struct iommu_context *ctx, u32 flags);
+
+int iommu_context_alloc(struct domain *d, u16 *ctx_id, u32 flags);
+int iommu_context_free(struct domain *d, u16 ctx_id, u32 flags);
+
+int iommu_reattach_context(struct domain *prev_dom, struct domain *next_dom,
+                           device_t *dev, u16 ctx_id);
+int iommu_attach_context(struct domain *d, device_t *dev, u16 ctx_id);
+int iommu_detach_context(struct domain *d, device_t *dev);
+
 /*
  * The purpose of the iommu_dont_flush_iotlb optional cpu flag is to
  * avoid unecessary iotlb_flush in the low level IOMMU code.
diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h
index 130c2a8c1a..acc2229ccf 100644
--- a/xen/include/xen/pci.h
+++ b/xen/include/xen/pci.h
@@ -102,6 +102,7 @@ struct pci_dev_info {
 struct pci_dev {
     struct list_head alldevs_list;
     struct list_head domain_list;
+    struct list_head context_list;
 
     struct list_head msi_list;
 
@@ -109,6 +110,8 @@ struct pci_dev {
 
     struct domain *domain;
 
+    uint16_t context; /* IOMMU context number of domain */
+
     const union {
         struct {
             uint8_t devfn;
-- 
2.51.2



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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From: "Teddy Astie" 
Subject: =?utf-8?Q?[RFC=20PATCH=20v7=2010/14]=20amd/iommu:=20Introduce=20lookup=20implementation?=
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PV-IOMMU requires a lookup implementation to behave properly, provide one.

Signed-off-by: Teddy Astie 
---
v7: introduced
---
 xen/drivers/passthrough/amd/iommu.h         |  2 +
 xen/drivers/passthrough/amd/iommu_map.c     | 90 +++++++++++++++++++++
 xen/drivers/passthrough/amd/pci_amd_iommu.c |  1 +
 3 files changed, 93 insertions(+)

diff --git a/xen/drivers/passthrough/amd/iommu.h b/xen/drivers/passthrough/amd/iommu.h
index 0bd0f15a72..de1442af1b 100644
--- a/xen/drivers/passthrough/amd/iommu.h
+++ b/xen/drivers/passthrough/amd/iommu.h
@@ -202,6 +202,8 @@ int __must_check cf_check amd_iommu_map_page(
 int __must_check cf_check amd_iommu_unmap_page(
     struct domain *d, dfn_t dfn, unsigned int order,
     unsigned int *flush_flags, struct iommu_context *ctx);
+int cf_check amd_iommu_lookup_page(struct domain *d, dfn_t dfn, mfn_t *mfn,
+                                   unsigned int *flags, struct iommu_context *ctx);
 int amd_iommu_reserve_domain_unity_map(struct domain *d, struct iommu_context *ctx,
                                        const struct ivrs_unity_map *map,
                                        unsigned int flag);
diff --git a/xen/drivers/passthrough/amd/iommu_map.c b/xen/drivers/passthrough/amd/iommu_map.c
index 01b36fdf4f..82f8eb85c8 100644
--- a/xen/drivers/passthrough/amd/iommu_map.c
+++ b/xen/drivers/passthrough/amd/iommu_map.c
@@ -622,6 +622,96 @@ int cf_check amd_iommu_flush_iotlb_pages(
     return 0;
 }
 
+static int lookup_pagewalk(struct page_info *table, dfn_t dfn, unsigned long level,
+                           mfn_t *mfn, unsigned int *flags)
+{
+    int rc = 0;
+    union amd_iommu_pte entry, *pagetable;
+
+    pagetable = __map_domain_page(table);
+    if ( !pagetable )
+        return -ENOMEM;
+
+    entry = pagetable[pfn_to_pde_idx(dfn_x(dfn), level)];
+
+    if ( !entry.pr || WARN_ON(!entry.mfn) )
+    {
+        /* Missing mapping has no flag. */
+        *flags = 0;
+        rc = -ENOENT;
+        goto out;
+    }
+
+    /*
+     * AMD-Vi Specification, 2.2.3 I/O Page Tables for Host Translations
+     *
+     * Effective write permission is calculated using the IW(resp IR) bits in the DTE,
+     * the I/O PDEs, and the I/O PTE. At each step of the translation process,
+     * I/O write permission (IW) bits (resp IR) from fetched page table entries are
+     * logically ANDed into cumulative I/O write permissions for the translation
+     * including the IW (resp IR) bit in the DTE.
+     */
+
+    if ( !entry.ir )
+        *flags &= ~IOMMUF_readable;
+
+    if ( !entry.iw )
+        *flags &= ~IOMMUF_writable;
+
+    if ( entry.next_level )
+    {
+        /* Go to the next mapping */
+        if ( WARN_ON(entry.next_level >= level) )
+        {
+            rc = -EILSEQ;
+            goto out;
+        }
+
+        unmap_domain_page(pagetable);
+        return lookup_pagewalk(mfn_to_page(_mfn(entry.mfn)), dfn, entry.next_level,
+                               mfn, flags);
+    }
+    else
+    {
+        /*
+         * Terminal mapping (either superpage or PTE). Compute that by combining entry
+         * address with dfn (for taking account of sub-entry frames in case of a superpage).
+         */
+        *mfn = _mfn(entry.mfn |
+               (dfn_x(dfn) & ((1ULL << ((level - 1) * PTE_PER_TABLE_SHIFT)) - 1)));
+    }
+
+out:
+    unmap_domain_page(pagetable);
+    return rc;
+}
+
+int cf_check amd_iommu_lookup_page(struct domain *d, dfn_t dfn, mfn_t *mfn,
+                                   unsigned int *flags, struct iommu_context *ctx)
+{
+    struct page_info *root_table;
+    unsigned long level;
+
+    if ( ctx->opaque )
+        return -EOPNOTSUPP;
+
+    if ( !ctx->arch.amd.root_table )
+        return -ENOENT;
+
+    root_table = ctx->arch.amd.root_table;
+    level = dom_iommu(d)->arch.amd.paging_mode;
+
+    if ( dfn_x(dfn) >> (PTE_PER_TABLE_SHIFT * level) )
+        return -ENOENT;
+
+    /*
+     * We initially consider the page writable and readable, lookup_pagewalk will
+     * remove these flags if it is not actually the case.
+     */
+    *flags |= IOMMUF_writable | IOMMUF_readable;
+    return lookup_pagewalk(root_table, dfn, level, mfn, flags);
+}
+
 int amd_iommu_reserve_domain_unity_map(struct domain *d, struct iommu_context *ctx,
                                        const struct ivrs_unity_map *map,
                                        unsigned int flag)
diff --git a/xen/drivers/passthrough/amd/pci_amd_iommu.c b/xen/drivers/passthrough/amd/pci_amd_iommu.c
index 3c17d78caf..3d08a925d6 100644
--- a/xen/drivers/passthrough/amd/pci_amd_iommu.c
+++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c
@@ -732,6 +732,7 @@ static const struct iommu_ops __initconst_cf_clobber _iommu_ops = {
     .suspend = amd_iommu_suspend,
     .resume = amd_iommu_resume,
     .crash_shutdown = amd_iommu_crash_shutdown,
+    .lookup_page = amd_iommu_lookup_page,
     .get_reserved_device_memory = amd_iommu_get_reserved_device_memory,
     .dump_page_tables = amd_dump_page_tables,
     .quiesce = amd_iommu_quiesce,
-- 
2.51.2



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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From: "Teddy Astie" 
Subject: =?utf-8?Q?[RFC=20PATCH=20v7=2011/14]=20iommu:=20Introduce=20iommu=5Fget=5Fmax=5Fiova?=
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Provide a way to know what maximum IOVA is usable for DMA.
This will be later used by PV-IOMMU to provide limits to guest.

Signed-off-by: Teddy Astie 
---
v7: introduced
---
 xen/drivers/passthrough/amd/pci_amd_iommu.c | 15 +++++++++++++++
 xen/drivers/passthrough/iommu.c             | 10 ++++++++++
 xen/drivers/passthrough/vtd/iommu.c         |  8 ++++++++
 xen/include/xen/iommu.h                     |  3 +++
 4 files changed, 36 insertions(+)

diff --git a/xen/drivers/passthrough/amd/pci_amd_iommu.c b/xen/drivers/passthrough/amd/pci_amd_iommu.c
index 3d08a925d6..4185e4cd64 100644
--- a/xen/drivers/passthrough/amd/pci_amd_iommu.c
+++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c
@@ -706,6 +706,20 @@ static void cf_check amd_dump_page_tables(struct domain *d)
     }
 }
 
+static uint64_t cf_check amd_iommu_get_max_iova(struct domain *d)
+{
+    struct domain_iommu *hd = dom_iommu(d);
+    unsigned int bits = 12 + hd->arch.amd.paging_mode * 9;
+
+    /* If paging_mode == 6, which indicates 6-level page tables,
+       we have bits == 66 while the GPA space is still 64-bits
+     */
+    if (bits >= 64)
+        return ~0LLU;
+
+    return (1LLU << bits) - 1;
+}
+
 static const struct iommu_ops __initconst_cf_clobber _iommu_ops = {
     .page_sizes = PAGE_SIZE_4K | PAGE_SIZE_2M | PAGE_SIZE_1G,
     .init = amd_iommu_domain_init,
@@ -736,6 +750,7 @@ static const struct iommu_ops __initconst_cf_clobber _iommu_ops = {
     .get_reserved_device_memory = amd_iommu_get_reserved_device_memory,
     .dump_page_tables = amd_dump_page_tables,
     .quiesce = amd_iommu_quiesce,
+    .get_max_iova = amd_iommu_get_max_iova,
 };
 
 static const struct iommu_init_ops __initconstrel _iommu_init_ops = {
diff --git a/xen/drivers/passthrough/iommu.c b/xen/drivers/passthrough/iommu.c
index feda2e390b..4434a9dcd0 100644
--- a/xen/drivers/passthrough/iommu.c
+++ b/xen/drivers/passthrough/iommu.c
@@ -1229,6 +1229,16 @@ bool iommu_has_feature(struct domain *d, enum iommu_feature feature)
     return is_iommu_enabled(d) && test_bit(feature, dom_iommu(d)->features);
 }
 
+uint64_t iommu_get_max_iova(struct domain *d)
+{
+    struct domain_iommu *hd = dom_iommu(d);
+
+    if ( !hd->platform_ops->get_max_iova )
+        return 0;
+
+    return iommu_call(hd->platform_ops, get_max_iova, d);
+}
+
 #define MAX_EXTRA_RESERVED_RANGES 20
 struct extra_reserved_range {
     unsigned long start;
diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c
index a602edd755..af3c6fb178 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -2595,6 +2595,13 @@ static int cf_check intel_iommu_remove_devfn(struct domain *d, struct pci_dev *p
     return unapply_context_single(d, drhd->iommu, prev_ctx, pdev->bus, devfn);
 }
 
+static uint64_t cf_check intel_iommu_get_max_iova(struct domain *d)
+{
+    struct domain_iommu *hd = dom_iommu(d);
+
+    return (1LLU << agaw_to_width(hd->arch.vtd.agaw)) - 1;
+}
+
 static void cf_check vtd_quiesce(void)
 {
     const struct acpi_drhd_unit *drhd;
@@ -2644,6 +2651,7 @@ static const struct iommu_ops __initconst_cf_clobber vtd_ops = {
     .get_reserved_device_memory = intel_iommu_get_reserved_device_memory,
     .dump_page_tables = vtd_dump_page_tables,
     .quiesce = vtd_quiesce,
+    .get_max_iova = intel_iommu_get_max_iova,
 };
 
 const struct iommu_init_ops __initconstrel intel_iommu_init_ops = {
diff --git a/xen/include/xen/iommu.h b/xen/include/xen/iommu.h
index 8c20f575ee..66951c9809 100644
--- a/xen/include/xen/iommu.h
+++ b/xen/include/xen/iommu.h
@@ -403,6 +403,9 @@ struct iommu_ops {
 #endif
     /* Inhibit all interrupt generation, to be used at shutdown. */
     void (*quiesce)(void);
+
+    /* Get maximum domain device address (IOVA). */
+    uint64_t (*get_max_iova)(struct domain *d);
 };
 
 /*
-- 
2.51.2



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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From: "Teddy Astie" 
Subject: =?utf-8?Q?[RFC=20PATCH=20v7=2014/14]=20iommu:=20Introduce=20no-dma=20feature?=
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Cc: "Teddy Astie" , "Andrew Cooper" , "Anthony PERARD" , "Michal Orzel" , "Jan Beulich" , "Julien Grall" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Stefano Stabellini" 
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This feature exposed through `dom0-iommu=no-dma` prevents the devices
of default context to have access to domain's memory.
This basically enforces DMA protection by default. The domain will
need to prepare a specific IOMMU context to do DMA.

This feature needs the guest to provide a PV-IOMMU driver.

Signed-off-by Teddy Astie 
---
 docs/misc/xen-command-line.pandoc   | 16 +++++++++++++++-
 xen/arch/x86/x86_64/mm.c            |  3 ++-
 xen/common/pv-iommu.c               |  3 +++
 xen/drivers/passthrough/iommu.c     | 13 +++++++++++++
 xen/drivers/passthrough/x86/iommu.c |  4 ++++
 xen/include/xen/iommu.h             |  3 +++
 6 files changed, 40 insertions(+), 2 deletions(-)

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index 34004ce282..b528f626a7 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -941,7 +941,7 @@ is necessary to fix an issue, please report a bug.
 
 ### dom0-iommu
     = List of [ passthrough=, strict=, map-inclusive=,
-                map-reserved=, none ]
+                map-reserved=, dma=, none ]
 
 Controls for the dom0 IOMMU setup.
 
@@ -992,6 +992,20 @@ Controls for the dom0 IOMMU setup.
     subset of the correction by only mapping reserved memory regions rather
     than all non-RAM regions.
 
+*   The `dma` option determines if the IOMMU is configured to identity map
+    the "default IOMMU context". If set to false, all devices of the Dom0 get
+    their DMA blocked until the IOMMU is properly configured by the guest (aside
+    special reserved regions).
+
+    Disabling this can slightly improve performance by removing the need to synchronize
+    p2m modifications with the IOMMU subsystem, moreover, disabling it provides DMA
+    protection that some operating systems can expect in order to securely handle some
+    devices (e.g Thunderbolt).
+
+    Disabling this requires guest support for PV-IOMMU for devices to behave properly.
+
+    This option is enabled by default.
+
 *   The `none` option is intended for development purposes only, and skips
     certain safety checks pertaining to the correct IOMMU configuration for
     dom0 to boot.
diff --git a/xen/arch/x86/x86_64/mm.c b/xen/arch/x86/x86_64/mm.c
index d4e6a9c0a2..00ff5d0b71 100644
--- a/xen/arch/x86/x86_64/mm.c
+++ b/xen/arch/x86/x86_64/mm.c
@@ -1315,7 +1315,8 @@ int memory_add(unsigned long spfn, unsigned long epfn, unsigned int pxm)
      */
     if ( is_iommu_enabled(hardware_domain) &&
          !iommu_use_hap_pt(hardware_domain) &&
-         !need_iommu_pt_sync(hardware_domain) )
+         !need_iommu_pt_sync(hardware_domain) &&
+         !iommu_hwdom_no_dma )
     {
         for ( i = spfn; i < epfn; i++ )
             if ( iommu_legacy_map(hardware_domain, _dfn(i), _mfn(i),
diff --git a/xen/common/pv-iommu.c b/xen/common/pv-iommu.c
index 4cdb30a031..a1d0552a66 100644
--- a/xen/common/pv-iommu.c
+++ b/xen/common/pv-iommu.c
@@ -107,6 +107,9 @@ static long capabilities_op(struct pv_iommu_capabilities *cap, struct domain *d)
     cap->max_pasid = 0; /* TODO */
     cap->cap_flags = 0;
 
+    if ( !dom_iommu(d)->no_dma )
+        cap->cap_flags |= IOMMUCAP_default_identity;
+
     cap->pgsize_mask = PAGE_SIZE_4K;
 
     return 0;
diff --git a/xen/drivers/passthrough/iommu.c b/xen/drivers/passthrough/iommu.c
index 5c6b272697..81d4cb87cf 100644
--- a/xen/drivers/passthrough/iommu.c
+++ b/xen/drivers/passthrough/iommu.c
@@ -55,6 +55,7 @@ static bool __hwdom_initdata iommu_hwdom_none;
 bool __hwdom_initdata iommu_hwdom_strict;
 bool __read_mostly iommu_hwdom_passthrough;
 bool __hwdom_initdata iommu_hwdom_inclusive;
+bool __read_mostly iommu_hwdom_no_dma = false;
 int8_t __hwdom_initdata iommu_hwdom_reserved = -1;
 
 #ifndef iommu_hap_pt_share
@@ -172,6 +173,8 @@ static int __init cf_check parse_dom0_iommu_param(const char *s)
             iommu_hwdom_reserved = val;
         else if ( !cmdline_strcmp(s, "none") )
             iommu_hwdom_none = true;
+        else if ( (val = parse_boolean("dma", s, ss)) >= 0 )
+            iommu_hwdom_no_dma = !val;
         else
             rc = -EINVAL;
 
@@ -292,7 +295,10 @@ int iommu_domain_init(struct domain *d, unsigned int opts)
     int ret = 0;
 
     if ( is_hardware_domain(d) )
+    {
         check_hwdom_reqs(d); /* may modify iommu_hwdom_strict */
+        hd->no_dma = iommu_hwdom_no_dma;
+    }
 
     if ( !is_iommu_enabled(d) )
         return 0;
@@ -329,6 +335,13 @@ int iommu_domain_init(struct domain *d, unsigned int opts)
     if ( !is_hardware_domain(d) || iommu_hwdom_strict )
         hd->need_sync = !iommu_use_hap_pt(d);
 
+    if ( hd->no_dma )
+    {
+        /* No-DMA mode is exclusive with HAP and sync_pt. */
+        hd->hap_pt_share = false;
+        hd->need_sync = false;
+    }
+
     ASSERT(!(hd->need_sync && hd->hap_pt_share));
 
     hd->allow_pv_iommu = true;
diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/x86/iommu.c
index ac339a2ed3..b100c55e69 100644
--- a/xen/drivers/passthrough/x86/iommu.c
+++ b/xen/drivers/passthrough/x86/iommu.c
@@ -542,6 +542,10 @@ void __hwdom_init arch_iommu_hwdom_init(struct domain *d)
     if ( iommu_hwdom_reserved == -1 )
         iommu_hwdom_reserved = 1;
 
+    if ( iommu_hwdom_no_dma )
+        /* Skip special mappings with no-dma mode */
+        return;
+
     if ( iommu_hwdom_inclusive )
     {
         printk(XENLOG_WARNING
diff --git a/xen/include/xen/iommu.h b/xen/include/xen/iommu.h
index 3c77dfaf41..55bd9c9704 100644
--- a/xen/include/xen/iommu.h
+++ b/xen/include/xen/iommu.h
@@ -108,6 +108,7 @@ extern bool iommu_debug;
 extern bool amd_iommu_perdev_intremap;
 
 extern bool iommu_hwdom_strict, iommu_hwdom_passthrough, iommu_hwdom_inclusive;
+extern bool iommu_hwdom_no_dma;
 extern int8_t iommu_hwdom_reserved;
 
 extern unsigned int iommu_dev_iotlb_timeout;
@@ -487,6 +488,8 @@ struct domain_iommu {
     /* SAF-2-safe enum constant in arithmetic operation */
     DECLARE_BITMAP(features, IOMMU_FEAT_count);
 
+    /* Do the IOMMU block all DMA on default context (implies !has_pt_share) ? */
+    bool no_dma;
 
     /* Is the domain allowed to use PV-IOMMU ? */
     bool allow_pv_iommu;
-- 
2.51.2



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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From: "Teddy Astie" 
Subject: =?utf-8?Q?[RFC=20PATCH=20v7=2013/14]=20iommu:=20Introduce=20PV-IOMMU?=
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To: xen-devel@lists.xenproject.org
Cc: "Teddy Astie" , "Jan Beulich" , "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Anthony PERARD" , "Michal Orzel" , "Julien Grall" , "Stefano Stabellini" 
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Introduce the PV-IOMMU subsystem as defined in docs/designs/pv-iommu.md.

Signed-off-by Teddy Astie 
---
 xen/arch/x86/include/asm/iommu.h    |   5 +-
 xen/common/Makefile                 |   1 +
 xen/common/pv-iommu.c               | 551 ++++++++++++++++++++++++++++
 xen/drivers/passthrough/iommu.c     |  95 +++++
 xen/drivers/passthrough/x86/iommu.c |  61 ++-
 xen/include/hypercall-defs.c        |   6 +
 xen/include/public/pv-iommu.h       | 343 +++++++++++++++++
 xen/include/public/xen.h            |   1 +
 xen/include/xen/iommu.h             |   9 +
 9 files changed, 1066 insertions(+), 6 deletions(-)
 create mode 100644 xen/common/pv-iommu.c
 create mode 100644 xen/include/public/pv-iommu.h

diff --git a/xen/arch/x86/include/asm/iommu.h b/xen/arch/x86/include/asm/iommu.h
index 452b98b42d..c1d19baa13 100644
--- a/xen/arch/x86/include/asm/iommu.h
+++ b/xen/arch/x86/include/asm/iommu.h
@@ -136,6 +136,9 @@ int iommu_identity_mapping(struct domain *d, struct iommu_context *ctx,
                            p2m_access_t p2ma, paddr_t base, paddr_t end,
                            unsigned int flag);
 void iommu_identity_map_teardown(struct domain *d, struct iommu_context *ctx);
+bool iommu_identity_map_check(struct domain *d, struct iommu_context *ctx,
+                              mfn_t mfn);
+
 
 extern bool untrusted_msi;
 
@@ -151,7 +154,7 @@ unsigned long *iommu_init_domid(domid_t reserve);
 domid_t iommu_alloc_domid(unsigned long *map);
 void iommu_free_domid(domid_t domid, unsigned long *map);
 
-int __must_check iommu_free_pgtables(struct domain *d, struct iommu_context *ctx);
+int __must_check cf_check iommu_free_pgtables(struct domain *d, struct iommu_context *ctx);
 struct domain_iommu;
 struct page_info *__must_check iommu_alloc_pgtable(struct domain_iommu *hd,
                                                    struct iommu_context *ctx,
diff --git a/xen/common/Makefile b/xen/common/Makefile
index 0c7d0f5d46..e2180b382e 100644
--- a/xen/common/Makefile
+++ b/xen/common/Makefile
@@ -39,6 +39,7 @@ obj-y += percpu.o
 obj-$(CONFIG_PERF_COUNTERS) += perfc.o
 obj-bin-$(CONFIG_HAS_PMAP) += pmap.init.o
 obj-y += preempt.o
+obj-y += pv-iommu.o
 obj-y += random.o
 obj-y += rangeset.o
 obj-y += radix-tree.o
diff --git a/xen/common/pv-iommu.c b/xen/common/pv-iommu.c
new file mode 100644
index 0000000000..4cdb30a031
--- /dev/null
+++ b/xen/common/pv-iommu.c
@@ -0,0 +1,551 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * xen/common/pv_iommu.c
+ *
+ * PV-IOMMU hypercall interface.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define PVIOMMU_PREFIX "[PV-IOMMU] "
+
+static int get_paged_frame(struct domain *d, gfn_t gfn, mfn_t *mfn,
+                           struct page_info **page, bool readonly)
+{
+    int ret = 0;
+    p2m_type_t p2mt = p2m_invalid;
+
+    #ifdef CONFIG_X86
+    p2m_query_t query = P2M_ALLOC;
+
+    if ( !readonly )
+        query |= P2M_UNSHARE;
+
+    *mfn = get_gfn_type(d, gfn_x(gfn), &p2mt, query);
+    #else
+    *mfn = p2m_lookup(d, gfn, &p2mt);
+    #endif
+
+    if ( mfn_eq(*mfn, INVALID_MFN) )
+    {
+        /* No mapping ? */
+        gprintk(XENLOG_G_WARNING, PVIOMMU_PREFIX
+                "Trying to map to non-backed page frame (gfn=%"PRI_gfn" p2mt=%d)\n",
+                gfn_x(gfn), p2mt);
+
+        ret = -ENOENT;
+    }
+    else if ( p2m_is_any_ram(p2mt) && mfn_valid(*mfn) )
+    {
+        struct domain *owner;
+
+        *page = mfn_to_page(*mfn);
+        owner = page_get_owner_and_reference(*page);
+        if ( !owner || (owner != d && !is_hardware_domain(d)) )
+        {
+            /* TODO: foreign mappings when d is not privileged ? */
+            put_page(*page);
+            *page = NULL;
+            return -EPERM;
+        }
+        ret = 0;
+    }
+    else if ( p2m_is_mmio(p2mt) ||
+              iomem_access_permitted(d, mfn_x(*mfn),mfn_x(*mfn)) )
+    {
+        *page = NULL;
+        ret = 0;
+    }
+    else
+    {
+        gprintk(XENLOG_WARNING, PVIOMMU_PREFIX
+                "Unexpected p2mt %d (gfn=%"PRI_gfn" mfn=%"PRI_mfn")\n",
+                p2mt, gfn_x(gfn), mfn_x(*mfn));
+
+        ret = -EPERM;
+    }
+
+    put_gfn(d, gfn_x(gfn));
+    return ret;
+}
+
+static bool can_use_iommu_check(struct domain *d)
+{
+    if ( !is_iommu_enabled(d) )
+    {
+        gprintk(XENLOG_WARNING, PVIOMMU_PREFIX "IOMMU disabled for this domain\n");
+        return false;
+    }
+
+    if ( !dom_iommu(d)->allow_pv_iommu )
+    {
+        gprintk(XENLOG_WARNING, PVIOMMU_PREFIX "PV-IOMMU disabled for this domain\n");
+        return false;
+    }
+
+    return true;
+}
+
+static long capabilities_op(struct pv_iommu_capabilities *cap, struct domain *d)
+{
+    cap->max_ctx_no = d->iommu.other_contexts.count;
+    cap->max_iova_addr = iommu_get_max_iova(d);
+
+    cap->max_pasid = 0; /* TODO */
+    cap->cap_flags = 0;
+
+    cap->pgsize_mask = PAGE_SIZE_4K;
+
+    return 0;
+}
+
+static long init_op(struct pv_iommu_init *init, struct domain *d)
+{
+    if (init->max_ctx_no == UINT32_MAX)
+        return -E2BIG;
+
+    return iommu_domain_pviommu_init(d, init->max_ctx_no + 1, init->arena_order);
+}
+
+static long alloc_context_op(struct pv_iommu_alloc *alloc, struct domain *d)
+{
+    uint16_t ctx_no = 0;
+    int status = 0;
+
+    status = iommu_context_alloc(d, &ctx_no, 0);
+
+    if ( status )
+        return status;
+
+    gprintk(XENLOG_INFO, PVIOMMU_PREFIX "Created IOMMU context %hu\n", ctx_no);
+
+    alloc->ctx_no = ctx_no;
+    return 0;
+}
+
+static long free_context_op(struct pv_iommu_free *free, struct domain *d)
+{
+    int flags = IOMMU_TEARDOWN_PREEMPT;
+
+    if ( !free->ctx_no )
+        return -EINVAL;
+
+    if ( free->free_flags & IOMMU_FREE_reattach_default )
+        flags |= IOMMU_TEARDOWN_REATTACH_DEFAULT;
+
+    return iommu_context_free(d, free->ctx_no, flags);
+}
+
+static long reattach_device_op(struct pv_iommu_reattach_device *reattach,
+                               struct domain *d)
+{
+    int ret;
+    device_t *pdev;
+    struct physdev_pci_device dev = reattach->dev;
+
+    pcidevs_lock();
+    pdev = pci_get_pdev(d, PCI_SBDF(dev.seg, dev.bus, dev.devfn));
+
+    if ( !pdev )
+    {
+        pcidevs_unlock();
+        return -ENODEV;
+    }
+
+    ret = iommu_reattach_context(d, d, pdev, reattach->ctx_no);
+
+    pcidevs_unlock();
+    return ret;
+}
+
+static long map_pages_op(struct pv_iommu_map_pages *map, struct domain *d)
+{
+    struct iommu_context *ctx;
+    int ret = 0, flush_ret;
+    struct page_info *page = NULL;
+    mfn_t mfn, mfn_lookup;
+    unsigned int lookup_flags, flags = 0, flush_flags = 0;
+    size_t i = 0;
+    dfn_t dfn0 = _dfn(map->dfn); /* original map->dfn */
+
+    if ( !map->ctx_no || !(ctx = iommu_get_context(d, map->ctx_no)) )
+        return -EINVAL;
+
+    if ( map->map_flags & IOMMU_MAP_readable )
+        flags |= IOMMUF_readable;
+
+    if ( map->map_flags & IOMMU_MAP_writeable )
+        flags |= IOMMUF_writable;
+
+    for (i = 0; i < map->nr_pages; i++)
+    {
+        gfn_t gfn = _gfn(map->gfn + i);
+        dfn_t dfn = _dfn(map->dfn + i);
+
+#ifdef CONFIG_X86
+        if ( iommu_identity_map_check(d, ctx, _mfn(map->dfn)) )
+        {
+            ret = -EADDRNOTAVAIL;
+            break;
+        }
+#endif
+
+        ret = get_paged_frame(d, gfn, &mfn, &page, 0);
+
+        if ( ret )
+            break;
+
+        /* Check for conflict with existing mappings */
+        if ( !iommu_lookup_page(d, dfn, &mfn_lookup, &lookup_flags, map->ctx_no) )
+        {
+            if ( page && mfn_valid(mfn) )
+                put_page(page);
+
+            ret = -EADDRINUSE;
+            break;
+        }
+
+        ret = iommu_map(d, dfn, mfn, 1, flags, &flush_flags, map->ctx_no);
+
+        if ( ret )
+        {
+            if ( page && mfn_valid(mfn) )
+                put_page(page);
+
+            break;
+        }
+
+        map->mapped++;
+
+        if ( (i & 0xff) && hypercall_preempt_check() )
+        {
+            i++;
+
+            map->gfn += i;
+            map->dfn += i;
+            map->nr_pages -= i;
+
+            ret = -ERESTART;
+            break;
+        }
+    }
+
+    flush_ret = iommu_iotlb_flush(d, dfn0, i, flush_flags, map->ctx_no);
+
+    iommu_put_context(ctx);
+
+    if ( flush_ret )
+        gprintk(XENLOG_G_WARNING, PVIOMMU_PREFIX
+                "Flush operation failed for %d (%d)\n", ctx->id, flush_ret);
+
+    return ret;
+}
+
+static long unmap_pages_op(struct pv_iommu_unmap_pages *unmap, struct domain *d)
+{
+    struct iommu_context *ctx;
+    mfn_t mfn;
+    int ret = 0, flush_ret;
+    unsigned int flags, flush_flags = 0;
+    size_t i = 0;
+    dfn_t dfn0 = _dfn(unmap->dfn); /* original unmap->dfn */
+
+    if ( !unmap->ctx_no || !(ctx = iommu_get_context(d, unmap->ctx_no)) )
+        return -EINVAL;
+
+    for (i = 0; i < unmap->nr_pages; i++)
+    {
+        dfn_t dfn = _dfn(unmap->dfn + i);
+
+#ifdef CONFIG_X86
+        if ( iommu_identity_map_check(d, ctx, _mfn(dfn_x(dfn))) )
+        {
+            ret = -EADDRNOTAVAIL;
+            break;
+        }
+#endif
+
+        /* Check if there is a valid mapping for this domain */
+        if ( iommu_lookup_page(d, dfn, &mfn, &flags, unmap->ctx_no) ) {
+            ret = -ENOENT;
+            break;
+        }
+
+        ret = iommu_unmap(d, dfn, 1, 0, &flush_flags, unmap->ctx_no);
+
+        if ( ret )
+            break;
+
+        unmap->unmapped++;
+
+        /* Decrement reference counter (if needed) */
+        if ( mfn_valid(mfn) )
+            put_page(mfn_to_page(mfn));
+
+        if ( (i & 0xff) && hypercall_preempt_check() )
+        {
+            i++;
+
+            unmap->dfn += i;
+            unmap->nr_pages -= i;
+
+            ret = -ERESTART;
+            break;
+        }
+    }
+
+    flush_ret = iommu_iotlb_flush(d, dfn0, i, flush_flags, unmap->ctx_no);
+
+    iommu_put_context(ctx);
+
+    if ( flush_ret )
+        printk(XENLOG_WARNING PVIOMMU_PREFIX
+               "Flush operation failed for c%d (%d)\n", ctx->id, flush_ret);
+
+    return ret;
+}
+
+static long do_iommu_subop(int subop, XEN_GUEST_HANDLE_PARAM(void) arg,
+                           struct domain *d, bool remote);
+
+static long remote_cmd_op(struct pv_iommu_remote_cmd *remote_cmd,
+                          struct domain *current_domain)
+{
+    long ret = 0;
+    struct domain *d;
+
+    /* TODO: use a better permission logic */
+    if ( !is_hardware_domain(current_domain) )
+        return -EPERM;
+
+    d = get_domain_by_id(remote_cmd->domid);
+
+    if ( !d )
+        return -ENOENT;
+
+    ret = do_iommu_subop(remote_cmd->subop, remote_cmd->arg, d, true);
+
+    put_domain(d);
+
+    return ret;
+}
+
+static long do_iommu_subop(int subop, XEN_GUEST_HANDLE_PARAM(void) arg,
+                           struct domain *d, bool remote)
+{
+    long ret = 0;
+
+    switch ( subop )
+    {
+        case IOMMU_noop:
+            break;
+
+        case IOMMU_query_capabilities:
+        {
+            struct pv_iommu_capabilities cap;
+
+            ret = capabilities_op(&cap, d);
+
+            if ( unlikely(copy_to_guest(arg, &cap, 1)) )
+                ret = -EFAULT;
+
+            break;
+        }
+
+        case IOMMU_init:
+        {
+            struct pv_iommu_init init;
+
+            if ( unlikely(copy_from_guest(&init, arg, 1)) )
+            {
+                ret = -EFAULT;
+                break;
+            }
+
+            ret = init_op(&init, d);
+            gdprintk(XENLOG_INFO, PVIOMMU_PREFIX "init -> %ld\n", ret);
+        }
+
+        case IOMMU_alloc_context:
+        {
+            struct pv_iommu_alloc alloc;
+
+            if ( unlikely(copy_from_guest(&alloc, arg, 1)) )
+            {
+                ret = -EFAULT;
+                break;
+            }
+
+            ret = alloc_context_op(&alloc, d);
+
+            if ( unlikely(copy_to_guest(arg, &alloc, 1)) )
+                ret = -EFAULT;
+
+            gdprintk(XENLOG_INFO, PVIOMMU_PREFIX
+                     "alloc_context(flags:%x) -> ctx_no: %d, ret=%ld\n",
+                     alloc.alloc_flags, alloc.ctx_no, ret);
+            break;
+        }
+
+        case IOMMU_free_context:
+        {
+            struct pv_iommu_free free;
+
+            if ( unlikely(copy_from_guest(&free, arg, 1)) )
+            {
+                ret = -EFAULT;
+                break;
+            }
+
+            ret = free_context_op(&free, d);
+            gdprintk(XENLOG_INFO, PVIOMMU_PREFIX
+                     "free_context(ctx_no:%d) -> %ld\n", free.ctx_no, ret);
+            break;
+        }
+
+        case IOMMU_reattach_device:
+        {
+            struct pv_iommu_reattach_device reattach;
+
+            if ( unlikely(copy_from_guest(&reattach, arg, 1)) )
+            {
+                ret = -EFAULT;
+                break;
+            }
+
+            ret = reattach_device_op(&reattach, d);
+            gdprintk(XENLOG_INFO, PVIOMMU_PREFIX
+                     "reattach(ctx_no:%d, bus:%02x, devfn:%2x) -> %ld\n",
+                     reattach.ctx_no, reattach.dev.bus, reattach.dev.devfn, ret);
+            break;
+        }
+
+        case IOMMU_map_pages:
+        {
+            struct pv_iommu_map_pages map;
+
+            if ( unlikely(copy_from_guest(&map, arg, 1)) )
+            {
+                ret = -EFAULT;
+                break;
+            }
+
+            ret = map_pages_op(&map, d);
+
+            if ( unlikely(copy_to_guest(arg, &map, 1)) )
+                ret = -EFAULT;
+
+            break;
+        }
+
+        case IOMMU_unmap_pages:
+        {
+            struct pv_iommu_unmap_pages unmap;
+
+            if ( unlikely(copy_from_guest(&unmap, arg, 1)) )
+            {
+                ret = -EFAULT;
+                break;
+            }
+
+            ret = unmap_pages_op(&unmap, d);
+
+            if ( unlikely(copy_to_guest(arg, &unmap, 1)) )
+                ret = -EFAULT;
+
+            break;
+        }
+
+        case IOMMU_remote_cmd:
+        {
+            struct pv_iommu_remote_cmd remote_cmd;
+
+            if ( remote )
+            {
+                /* Prevent remote_cmd from being called recursively */
+                ret = -EINVAL;
+                break;
+            }
+
+            if ( unlikely(copy_from_guest(&remote_cmd, arg, 1)) )
+            {
+                ret = -EFAULT;
+                break;
+            }
+
+            ret = remote_cmd_op(&remote_cmd, d);
+            break;
+        }
+
+        /*
+         * TODO
+         */
+        case IOMMU_alloc_nested:
+        {
+            ret = -EOPNOTSUPP;
+            break;
+        }
+
+        case IOMMU_flush_nested:
+        {
+            ret = -EOPNOTSUPP;
+            break;
+        }
+
+        case IOMMU_attach_pasid:
+        {
+            ret = -EOPNOTSUPP;
+            break;
+        }
+
+        case IOMMU_detach_pasid:
+        {
+            ret = -EOPNOTSUPP;
+            break;
+        }
+
+        default:
+            return -EOPNOTSUPP;
+    }
+
+    return ret;
+}
+
+long do_iommu_op(unsigned int subop, XEN_GUEST_HANDLE_PARAM(void) arg)
+{
+    long ret = 0;
+    struct domain *d = current->domain;
+
+    if ( !can_use_iommu_check(d) )
+        return -ENODEV;
+
+    ret = do_iommu_subop(subop, arg, d, false);
+
+    if ( ret == -ERESTART )
+        return hypercall_create_continuation(__HYPERVISOR_iommu_op, "ih", subop, arg);
+
+    return ret;
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * tab-width: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/drivers/passthrough/iommu.c b/xen/drivers/passthrough/iommu.c
index 4434a9dcd0..5c6b272697 100644
--- a/xen/drivers/passthrough/iommu.c
+++ b/xen/drivers/passthrough/iommu.c
@@ -193,6 +193,99 @@ static void __hwdom_init check_hwdom_reqs(struct domain *d)
     arch_iommu_check_autotranslated_hwdom(d);
 }
 
+
+int iommu_domain_pviommu_init(struct domain *d, uint16_t nb_ctx, uint32_t arena_order)
+{
+    struct domain_iommu *hd = dom_iommu(d);
+    int rc;
+
+    BUG_ON(nb_ctx == 0); /* sanity check (prevent underflow) */
+
+    /*
+     * hd->other_contexts.count is always reported as 0 during initialization
+     * preventing misuse of partially initialized IOMMU contexts.
+     */
+
+    if ( atomic_cmpxchg(&hd->other_contexts.initialized, 0, 1) == 1 )
+        return -EACCES;
+
+    if ( (nb_ctx - 1) > 0 ) {
+        /* Initialize context bitmap */
+        size_t i;
+
+        hd->other_contexts.bitmap = xzalloc_array(unsigned long,
+                                                  BITS_TO_LONGS(nb_ctx - 1));
+
+        if (!hd->other_contexts.bitmap)
+        {
+            rc = -ENOMEM;
+            goto cleanup;
+        }
+
+        hd->other_contexts.map = xzalloc_array(struct iommu_context, nb_ctx - 1);
+
+        if (!hd->other_contexts.map)
+        {
+            rc = -ENOMEM;
+            goto cleanup;
+        }
+
+        for (i = 0; i < (nb_ctx - 1); i++)
+            rspin_lock_init(&hd->other_contexts.map[i].lock);
+    }
+
+    rc = arch_iommu_pviommu_init(d, nb_ctx, arena_order);
+
+    if ( rc )
+        goto cleanup;
+
+    /* Make sure initialization is complete before making it visible to other CPUs. */
+    smp_wmb();
+
+    hd->other_contexts.count = nb_ctx - 1;
+
+    printk(XENLOG_INFO "Dom%d uses %lu IOMMU contexts (%llu pages arena)\n",
+           d->domain_id, (unsigned long)nb_ctx, 1llu << arena_order);
+
+    return 0;
+
+cleanup:
+    /* TODO: Reset hd->other_contexts.initialized */
+    if ( hd->other_contexts.bitmap )
+    {
+        xfree(hd->other_contexts.bitmap);
+        hd->other_contexts.bitmap = NULL;
+    }
+
+    if ( hd->other_contexts.map )
+    {
+        xfree(hd->other_contexts.map);
+        hd->other_contexts.bitmap = NULL;
+    }
+
+    return rc;
+}
+
+int iommu_domain_pviommu_teardown(struct domain *d)
+{
+    struct domain_iommu *hd = dom_iommu(d);
+    int i;
+    /* FIXME: Potential race condition with remote_op ? */
+
+    for (i = 0; i < hd->other_contexts.count; i++)
+        WARN_ON(iommu_context_free(d, i, IOMMU_TEARDOWN_REATTACH_DEFAULT) != ENOENT);
+
+    hd->other_contexts.count = 0;
+
+    if ( hd->other_contexts.bitmap )
+        xfree(hd->other_contexts.bitmap);
+
+    if ( hd->other_contexts.map )
+        xfree(hd->other_contexts.map);
+
+    return 0;
+}
+
 int iommu_domain_init(struct domain *d, unsigned int opts)
 {
     struct domain_iommu *hd = dom_iommu(d);
@@ -238,6 +331,8 @@ int iommu_domain_init(struct domain *d, unsigned int opts)
 
     ASSERT(!(hd->need_sync && hd->hap_pt_share));
 
+    hd->allow_pv_iommu = true;
+
     rspin_lock(&hd->default_ctx.lock);
     ret = iommu_context_init(d, &hd->default_ctx, 0, IOMMU_CONTEXT_INIT_default);
     rspin_unlock(&hd->default_ctx.lock);
diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/x86/iommu.c
index d8becfa869..ac339a2ed3 100644
--- a/xen/drivers/passthrough/x86/iommu.c
+++ b/xen/drivers/passthrough/x86/iommu.c
@@ -215,6 +215,32 @@ int arch_iommu_context_teardown(struct domain *d, struct iommu_context *ctx, u32
     return 0;
 }
 
+int arch_iommu_pviommu_init(struct domain *d, uint16_t nb_ctx, uint32_t arena_order)
+{
+    struct domain_iommu *hd = dom_iommu(d);
+
+    if ( arena_order == 0 )
+        return 0;
+
+    return iommu_arena_initialize(&hd->arch.pt_arena, NULL, arena_order, 0);
+}
+
+int arch_iommu_pviommu_teardown(struct domain *d)
+{
+    struct domain_iommu *hd = dom_iommu(d);
+
+    if ( iommu_arena_teardown(&hd->arch.pt_arena, true) )
+    {
+        printk(XENLOG_WARNING "IOMMU Arena used while being destroyed\n");
+        WARN();
+
+        /* Teardown anyway */
+        iommu_arena_teardown(&hd->arch.pt_arena, false);
+    }
+
+    return 0;
+}
+
 void arch_iommu_domain_destroy(struct domain *d)
 {
 }
@@ -394,6 +420,19 @@ void iommu_identity_map_teardown(struct domain *d, struct iommu_context *ctx)
     }
 }
 
+bool iommu_identity_map_check(struct domain *d, struct iommu_context *ctx,
+                              mfn_t mfn)
+{
+    struct identity_map *map;
+    uint64_t addr = pfn_to_paddr(mfn_x(mfn));
+
+    list_for_each_entry ( map, &ctx->arch.identity_maps, list )
+        if (addr >= map->base && addr < map->end)
+            return true;
+
+    return false;
+}
+
 struct handle_iomemcap {
     struct rangeset *r;
     unsigned long last;
@@ -648,7 +687,7 @@ void iommu_free_domid(domid_t domid, unsigned long *map)
         BUG();
 }
 
-int iommu_free_pgtables(struct domain *d, struct iommu_context *ctx)
+int cf_check iommu_free_pgtables(struct domain *d, struct iommu_context *ctx)
 {
     struct domain_iommu *hd = dom_iommu(d);
     struct page_info *pg;
@@ -665,7 +704,10 @@ int iommu_free_pgtables(struct domain *d, struct iommu_context *ctx)
 
     while ( (pg = page_list_remove_head(&ctx->arch.pgtables)) )
     {
-        free_domheap_page(pg);
+        if (ctx->id == 0)
+            free_domheap_page(pg);
+        else
+            iommu_arena_free_page(&hd->arch.pt_arena, pg);
 
         if ( !(++done & 0xff) && general_preempt_check() )
             return -ERESTART;
@@ -687,7 +729,11 @@ struct page_info *iommu_alloc_pgtable(struct domain_iommu *hd,
         memflags = MEMF_node(hd->node);
 #endif
 
-    pg = alloc_domheap_page(NULL, memflags);
+    if (ctx->id == 0)
+        pg = alloc_domheap_page(NULL, memflags);
+    else
+        pg = iommu_arena_allocate_page(&hd->arch.pt_arena);
+
     if ( !pg )
         return NULL;
 
@@ -766,9 +812,14 @@ void iommu_queue_free_pgtable(struct domain *d, struct iommu_context *ctx,
 
     page_list_del(pg, &ctx->arch.pgtables);
 
-    page_list_add_tail(pg, &per_cpu(free_pgt_list, cpu));
+    if ( !ctx->id )
+    {
+        page_list_add_tail(pg, &per_cpu(free_pgt_list, cpu));
 
-    tasklet_schedule(&per_cpu(free_pgt_tasklet, cpu));
+        tasklet_schedule(&per_cpu(free_pgt_tasklet, cpu));
+    }
+    else
+        iommu_arena_free_page(&dom_iommu(d)->arch.pt_arena, pg);
 }
 
 static int cf_check cpu_callback(
diff --git a/xen/include/hypercall-defs.c b/xen/include/hypercall-defs.c
index cef08eeec1..0cfda01094 100644
--- a/xen/include/hypercall-defs.c
+++ b/xen/include/hypercall-defs.c
@@ -213,6 +213,9 @@ hypfs_op(unsigned int cmd, const char *arg1, unsigned long arg2, void *arg3, uns
 #ifdef CONFIG_X86
 xenpmu_op(unsigned int op, xen_pmu_params_t *arg)
 #endif
+#ifdef CONFIG_HAS_PASSTHROUGH
+iommu_op(unsigned int subop, void *arg)
+#endif
 
 #ifdef CONFIG_PV
 caller: pv64
@@ -301,5 +304,8 @@ mca                                do       do       -        -        -
 #if defined(CONFIG_X86) && defined(CONFIG_PAGING) && !defined(CONFIG_PV_SHIM_EXCLUSIVE)
 paging_domctl_cont                 do       do       do       do       -
 #endif
+#ifdef CONFIG_HAS_PASSTHROUGH
+iommu_op                           do       do       do       do       -
+#endif
 
 #endif /* !CPPCHECK */
diff --git a/xen/include/public/pv-iommu.h b/xen/include/public/pv-iommu.h
new file mode 100644
index 0000000000..6f50aea4b7
--- /dev/null
+++ b/xen/include/public/pv-iommu.h
@@ -0,0 +1,343 @@
+/* SPDX-License-Identifier: MIT */
+/**
+ * pv-iommu.h
+ *
+ * Paravirtualized IOMMU driver interface.
+ *
+ * Copyright (c) 2024 Teddy Astie 
+ */
+
+#ifndef __XEN_PUBLIC_PV_IOMMU_H__
+#define __XEN_PUBLIC_PV_IOMMU_H__
+
+#include "xen.h"
+#include "physdev.h"
+
+#ifndef uint64_aligned_t
+#define uint64_aligned_t uint64_t
+#endif
+
+#define IOMMU_DEFAULT_CONTEXT (0)
+
+enum pv_iommu_cmd {
+    /* Basic cmd */
+    IOMMU_noop = 0,
+    IOMMU_query_capabilities = 1,
+    IOMMU_init = 2,
+    IOMMU_alloc_context = 3,
+    IOMMU_free_context = 4,
+    IOMMU_reattach_device = 5,
+    IOMMU_map_pages = 6,
+    IOMMU_unmap_pages = 7,
+    IOMMU_remote_cmd = 8,
+
+    /* Extended cmd */
+    IOMMU_alloc_nested = 9,      /* if IOMMUCAP_nested */
+    IOMMU_flush_nested = 10,     /* if IOMMUCAP_nested */
+    IOMMU_attach_pasid = 11,     /* if IOMMUCAP_pasid */
+    IOMMU_detach_pasid = 12,     /* if IOMMUCAP_pasid */
+};
+
+/**
+ * If set, default context allow DMA to domain memory.
+ * If cleared, default context blocks all DMA to domain memory.
+ */
+#define IOMMUCAP_default_identity  (1U << 0)
+
+/**
+ * IOMMU_MAP_cache support.
+ */
+#define IOMMUCAP_cache     (1U << 1)
+
+/**
+ * If set, IOMMU_alloc_nested and IOMMU_flush_nested are supported.
+ */
+#define IOMMUCAP_nested    (1U << 2)
+
+/**
+ * If set, IOMMU_attach_pasid and IOMMU_detach_pasid are supported and
+ * a device PASID can be specified in reattach_context.
+ */
+#define IOMMUCAP_pasid     (1U << 3)
+
+/**
+ * If set, IOMMU_ALLOC_identity is supported in pv_iommu_alloc.
+ */
+#define IOMMUCAP_identity  (1U << 4)
+
+/**
+ * IOMMU_query_capabilities
+ * Query PV-IOMMU capabilities for this domain.
+ */
+struct pv_iommu_capabilities {
+    /*
+     * OUT: Maximum device address (iova) that the guest can use for mappings.
+     */
+    uint64_aligned_t max_iova_addr;
+
+    /* OUT: IOMMU capabilities flags */
+    uint32_t cap_flags;
+
+    /* OUT: Mask of all supported page sizes. */
+    uint32_t pgsize_mask;
+
+    /* OUT: Maximum pasid (if IOMMUCAP_pasid) */
+    uint32_t max_pasid;
+
+    /* OUT: Maximum number of IOMMU context this domain can use. */
+    uint16_t max_ctx_no;
+
+    uint16_t pad0;
+};
+typedef struct pv_iommu_capabilities pv_iommu_capabilities_t;
+DEFINE_XEN_GUEST_HANDLE(pv_iommu_capabilities_t);
+
+/**
+ * IOMMU_init
+ * Initialize PV-IOMMU for this domain.
+ *
+ * Fails with -EACCESS if PV-IOMMU is already initialized.
+ */
+struct pv_iommu_init {
+    /* IN: Maximum number of IOMMU context this domain can use. */
+    uint32_t max_ctx_no;
+
+    /* IN: Arena size in pages (in power of two) */
+    uint32_t arena_order;
+};
+typedef struct pv_iommu_init pv_iommu_init_t;
+DEFINE_XEN_GUEST_HANDLE(pv_iommu_init_t);
+
+/**
+ * Create a 1:1 identity mapped context to domain memory
+ * (needs IOMMUCAP_identity).
+ */
+#define IOMMU_ALLOC_identity (1 << 0)
+
+/**
+ * IOMMU_alloc_context
+ * Allocate an IOMMU context.
+ * Fails with -ENOSPC if no context number is available.
+ */
+struct pv_iommu_alloc {
+    /* OUT: allocated IOMMU context number */
+    uint16_t ctx_no;
+
+    /* IN: allocation flags */
+    uint32_t alloc_flags;
+};
+typedef struct pv_iommu_alloc pv_iommu_alloc_t;
+DEFINE_XEN_GUEST_HANDLE(pv_iommu_alloc_t);
+
+/**
+ * Move all devices to default context before freeing the context.
+ */
+#define IOMMU_FREE_reattach_default (1 << 0)
+
+/**
+ * IOMMU_free_context
+ * Destroy a IOMMU context.
+ *
+ * If IOMMU_FREE_reattach_default is specified, move all context devices to
+ * default context before destroying this context.
+ *
+ * If there are devices in the context and IOMMU_FREE_reattach_default is not
+ * specified, fail with -EBUSY.
+ *
+ * The default context can't be destroyed.
+ */
+struct pv_iommu_free {
+    /* IN: IOMMU context number to free */
+    uint16_t ctx_no;
+
+    /* IN: Free operation specific flags */
+    uint32_t free_flags;
+};
+typedef struct pv_iommu_free pv_iommu_free_t;
+DEFINE_XEN_GUEST_HANDLE(pv_iommu_free_t);
+
+/* Device has read access */
+#define IOMMU_MAP_readable (1 << 0)
+
+/* Device has write access */
+#define IOMMU_MAP_writeable (1 << 1)
+
+/* Enforce DMA coherency */
+#define IOMMU_MAP_cache (1 << 2)
+
+/**
+ * IOMMU_map_pages
+ * Map pages on a IOMMU context.
+ *
+ * pgsize must be supported by pgsize_mask.
+ * Fails with -EINVAL if mapping on top of another mapping.
+ * Report actually mapped page count in mapped field (regardless of failure).
+ */
+struct pv_iommu_map_pages {
+    /* IN: IOMMU context number */
+    uint16_t ctx_no;
+
+    /* IN: Guest frame number */
+    uint64_aligned_t gfn;
+
+    /* IN: Device frame number */
+    uint64_aligned_t dfn;
+
+    /* IN: Map flags */
+    uint32_t map_flags;
+
+    /* IN: Size of pages to map */
+    uint32_t pgsize;
+
+    /* IN: Number of pages to map */
+    uint32_t nr_pages;
+
+    /* OUT: Number of pages actually mapped */
+    uint32_t mapped;
+};
+typedef struct pv_iommu_map_pages pv_iommu_map_pages_t;
+DEFINE_XEN_GUEST_HANDLE(pv_iommu_map_pages_t);
+
+/**
+ * IOMMU_unmap_pages
+ * Unmap pages on a IOMMU context.
+ *
+ * pgsize must be supported by pgsize_mask.
+ * Report actually unmapped page count in mapped field (regardless of failure).
+ * Fails with -ENOENT when attempting to unmap a page without any mapping
+ */
+struct pv_iommu_unmap_pages {
+    /* IN: IOMMU context number */
+    uint16_t ctx_no;
+
+    /* IN: Device frame number */
+    uint64_aligned_t dfn;
+
+    /* IN: Size of pages to unmap */
+    uint32_t pgsize;
+
+    /* IN: Number of pages to unmap */
+    uint32_t nr_pages;
+
+    /* OUT: Number of pages actually unmapped */
+    uint32_t unmapped;
+};
+typedef struct pv_iommu_unmap_pages pv_iommu_unmap_pages_t;
+DEFINE_XEN_GUEST_HANDLE(pv_iommu_unmap_pages_t);
+
+/**
+ * IOMMU_reattach_device
+ * Reattach a device to another IOMMU context.
+ * Fails with -ENODEV if no such device exist.
+ */
+struct pv_iommu_reattach_device {
+    /* IN: Target IOMMU context number */
+    uint16_t ctx_no;
+
+    /* IN: Physical device to move */
+    struct physdev_pci_device dev;
+
+    /* IN: PASID of the device (if IOMMUCAP_pasid) */
+    uint32_t pasid;
+};
+typedef struct pv_iommu_reattach_device pv_iommu_reattach_device_t;
+DEFINE_XEN_GUEST_HANDLE(pv_iommu_reattach_device_t);
+
+
+/**
+ * IOMMU_remote_cmd
+ * Do a PV-IOMMU operation on another domain.
+ * Current domain needs to be allowed to act on the target domain, otherwise
+ * fails with -EPERM.
+ */
+struct pv_iommu_remote_cmd {
+    /* IN: Target domain to do the subop on */
+    uint16_t domid;
+
+    /* IN: Command to do on target domain. */
+    uint16_t subop;
+
+    /* INOUT: Command argument from current domain memory */
+    XEN_GUEST_HANDLE(void) arg;
+};
+typedef struct pv_iommu_remote_cmd pv_iommu_remote_cmd_t;
+DEFINE_XEN_GUEST_HANDLE(pv_iommu_remote_cmd_t);
+
+/**
+ * IOMMU_alloc_nested
+ * Create a nested IOMMU context (needs IOMMUCAP_nested).
+ *
+ * This context uses a platform-specific page table from domain address space
+ * specified in pgtable_gfn and use it for nested translations.
+ *
+ * Explicit flushes needs to be submited with IOMMU_flush_nested on
+ * modification of the nested pagetable to ensure coherency between IOTLB and
+ * nested page table.
+ *
+ * This context can be destroyed using IOMMU_free_context.
+ * This context cannot be modified using map_pages, unmap_pages.
+ */
+struct pv_iommu_alloc_nested {
+    /* OUT: allocated IOMMU context number */
+    uint16_t ctx_no;
+
+    /* IN: guest frame number of the nested page table */
+    uint64_aligned_t pgtable_gfn;
+
+    /* IN: nested mode flags */
+    uint64_aligned_t nested_flags;
+};
+typedef struct pv_iommu_alloc_nested pv_iommu_alloc_nested_t;
+DEFINE_XEN_GUEST_HANDLE(pv_iommu_alloc_nested_t);
+
+/**
+ * IOMMU_flush_nested (needs IOMMUCAP_nested)
+ * Flush the IOTLB for nested translation.
+ */
+struct pv_iommu_flush_nested {
+    /* TODO */
+};
+typedef struct pv_iommu_flush_nested pv_iommu_flush_nested_t;
+DEFINE_XEN_GUEST_HANDLE(pv_iommu_flush_nested_t);
+
+/**
+ * IOMMU_attach_pasid (needs IOMMUCAP_pasid)
+ * Attach a new device-with-pasid to a IOMMU context.
+ * If a matching device-with-pasid already exists (globally),
+ * fail with -EEXIST.
+ * If pasid is 0, fails with -EINVAL.
+ * If physical device doesn't exist in domain, fail with -ENOENT.
+ */
+struct pv_iommu_attach_pasid {
+    /* IN: IOMMU context to add the device-with-pasid in */
+    uint16_t ctx_no;
+
+    /* IN: Physical device */
+    struct physdev_pci_device dev;
+
+    /* IN: pasid of the device to attach */
+    uint32_t pasid;
+};
+typedef struct pv_iommu_attach_pasid pv_iommu_attach_pasid_t;
+DEFINE_XEN_GUEST_HANDLE(pv_iommu_attach_pasid_t);
+
+/**
+ * IOMMU_detach_pasid (needs IOMMUCAP_pasid)
+ * detach a device-with-pasid.
+ * If the device-with-pasid doesn't exist or belong to the domain,
+ * fail with -ENOENT.
+ * If pasid is 0, fails with -EINVAL.
+ */
+struct pv_iommu_detach_pasid {
+    /* IN: Physical device */
+    struct physdev_pci_device dev;
+
+    /* pasid of the device to detach */
+    uint32_t pasid;
+};
+typedef struct pv_iommu_detach_pasid pv_iommu_detach_pasid_t;
+DEFINE_XEN_GUEST_HANDLE(pv_iommu_detach_pasid_t);
+
+/* long do_iommu_op(int subop, XEN_GUEST_HANDLE_PARAM(void) arg) */
+
+#endif
\ No newline at end of file
diff --git a/xen/include/public/xen.h b/xen/include/public/xen.h
index 82b9c05a76..f0b1860c7c 100644
--- a/xen/include/public/xen.h
+++ b/xen/include/public/xen.h
@@ -118,6 +118,7 @@ DEFINE_XEN_GUEST_HANDLE(xen_ulong_t);
 #define __HYPERVISOR_xenpmu_op            40
 #define __HYPERVISOR_dm_op                41
 #define __HYPERVISOR_hypfs_op             42
+#define __HYPERVISOR_iommu_op             43
 
 /* Architecture-specific hypercall definitions. */
 #define __HYPERVISOR_arch_0               48
diff --git a/xen/include/xen/iommu.h b/xen/include/xen/iommu.h
index 66951c9809..3c77dfaf41 100644
--- a/xen/include/xen/iommu.h
+++ b/xen/include/xen/iommu.h
@@ -487,6 +487,10 @@ struct domain_iommu {
     /* SAF-2-safe enum constant in arithmetic operation */
     DECLARE_BITMAP(features, IOMMU_FEAT_count);
 
+
+    /* Is the domain allowed to use PV-IOMMU ? */
+    bool allow_pv_iommu;
+
     /* Does the guest share HAP mapping with the IOMMU? */
     bool hap_pt_share;
 
@@ -526,6 +530,8 @@ static inline int iommu_do_domctl(struct xen_domctl *domctl, struct domain *d,
 }
 #endif
 
+int iommu_domain_pviommu_init(struct domain *d, uint16_t nb_ctx, uint32_t arena_order);
+
 int __must_check iommu_suspend(void);
 void iommu_resume(void);
 void iommu_crash_shutdown(void);
@@ -542,6 +548,7 @@ int iommu_do_pci_domctl(struct xen_domctl *domctl, struct domain *d,
 
 void iommu_dev_iotlb_flush_timeout(struct domain *d, struct pci_dev *pdev);
 
+uint64_t iommu_get_max_iova(struct domain *d);
 
 struct iommu_context *iommu_get_context(struct domain *d, u16 ctx_id);
 void iommu_put_context(struct iommu_context *ctx);
@@ -574,6 +581,8 @@ int iommu_detach_context(struct domain *d, device_t *dev);
  */
 DECLARE_PER_CPU(bool, iommu_dont_flush_iotlb);
 
+int arch_iommu_pviommu_init(struct domain *d, uint16_t nb_ctx, uint32_t arena_order);
+int arch_iommu_pviommu_teardown(struct domain *d);
 bool arch_iommu_use_permitted(const struct domain *d);
 
 #ifdef CONFIG_X86
-- 
2.51.2



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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From: "Teddy Astie" 
Subject: =?utf-8?Q?[RFC=20PATCH=20v7=2012/14]=20x86/iommu:=20Introduce=20IOMMU=20arena?=
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Introduce a new facility that reserves a fixed amount of contiguous
pages and provide a way to allocate them.

It is used to ensure that the guest cannot cause the hypervisor to
OOM with unconstrained allocations by abusing the PV-IOMMU interface.

Signed-off-by Teddy Astie 
---
 xen/arch/x86/include/asm/arena.h     |  54 +++++++++
 xen/arch/x86/include/asm/iommu.h     |   3 +
 xen/drivers/passthrough/x86/Makefile |   1 +
 xen/drivers/passthrough/x86/arena.c  | 157 +++++++++++++++++++++++++++
 4 files changed, 215 insertions(+)
 create mode 100644 xen/arch/x86/include/asm/arena.h
 create mode 100644 xen/drivers/passthrough/x86/arena.c

diff --git a/xen/arch/x86/include/asm/arena.h b/xen/arch/x86/include/asm/arena.h
new file mode 100644
index 0000000000..7555b100e0
--- /dev/null
+++ b/xen/arch/x86/include/asm/arena.h
@@ -0,0 +1,54 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/**
+ * Simple arena-based page allocator.
+ */
+
+#ifndef __XEN_IOMMU_ARENA_H__
+#define __XEN_IOMMU_ARENA_H__
+
+#include "xen/domain.h"
+#include "xen/atomic.h"
+#include "xen/mm-frame.h"
+#include "xen/types.h"
+
+/**
+ * struct page_arena: Page arena structure
+ */
+struct iommu_arena {
+    /* mfn of the first page of the memory region */
+    mfn_t region_start;
+    /* bitmap of allocations */
+    unsigned long *map;
+
+    /* Order of the arena */
+    unsigned int order;
+
+    /* Used page count */
+    atomic_t used_pages;
+};
+
+/**
+ * Initialize a arena using domheap allocator.
+ * @param [out] arena Arena to allocate
+ * @param [in] domain domain that has ownership of arena pages
+ * @param [in] order order of the arena (power of two of the size)
+ * @param [in] memflags Flags for domheap_alloc_pages()
+ * @return -ENOMEM on arena allocation error, 0 otherwise
+ */
+int iommu_arena_initialize(struct iommu_arena *arena, struct domain *domain,
+                           unsigned int order, unsigned int memflags);
+
+/**
+ * Teardown a arena.
+ * @param [out] arena arena to allocate
+ * @param [in] check check for existing allocations
+ * @return -EBUSY if check is specified
+ */
+int iommu_arena_teardown(struct iommu_arena *arena, bool check);
+
+struct page_info *iommu_arena_allocate_page(struct iommu_arena *arena);
+bool iommu_arena_free_page(struct iommu_arena *arena, struct page_info *page);
+
+#define iommu_arena_size(arena) (1LLU << (arena)->order)
+
+#endif
diff --git a/xen/arch/x86/include/asm/iommu.h b/xen/arch/x86/include/asm/iommu.h
index 654a07b9b2..452b98b42d 100644
--- a/xen/arch/x86/include/asm/iommu.h
+++ b/xen/arch/x86/include/asm/iommu.h
@@ -12,6 +12,8 @@
 #include 
 #include 
 
+#include "arena.h"
+
 #define DEFAULT_DOMAIN_ADDRESS_WIDTH 48
 
 struct g2m_ioport {
@@ -62,6 +64,7 @@ struct arch_iommu
 {
     /* Queue for freeing pages */
     struct page_list_head free_queue;
+    struct iommu_arena pt_arena; /* allocator for non-default contexts */
 
     union {
         /* Intel VT-d */
diff --git a/xen/drivers/passthrough/x86/Makefile b/xen/drivers/passthrough/x86/Makefile
index 75b2885336..1614f3d284 100644
--- a/xen/drivers/passthrough/x86/Makefile
+++ b/xen/drivers/passthrough/x86/Makefile
@@ -1,2 +1,3 @@
 obj-y += iommu.o
+obj-y += arena.o
 obj-$(CONFIG_HVM) += hvm.o
diff --git a/xen/drivers/passthrough/x86/arena.c b/xen/drivers/passthrough/x86/arena.c
new file mode 100644
index 0000000000..984bc4d643
--- /dev/null
+++ b/xen/drivers/passthrough/x86/arena.c
@@ -0,0 +1,157 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/**
+ * Simple arena-based page allocator.
+ *
+ * Allocate a large block using alloc_domheam_pages and allocate single pages
+ * using iommu_arena_allocate_page and iommu_arena_free_page functions.
+ *
+ * Concurrent {allocate/free}_page is thread-safe
+ * iommu_arena_teardown during {allocate/free}_page is not thread-safe.
+ *
+ * Written by Teddy Astie 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+/* Maximum of scan tries if the bit found not available */
+#define ARENA_TSL_MAX_TRIES 5
+
+int iommu_arena_initialize(struct iommu_arena *arena, struct domain *d,
+                           unsigned int order, unsigned int memflags)
+{
+    struct page_info *page;
+
+    /* TODO: Maybe allocate differently ? */
+    page = alloc_domheap_pages(d, order, memflags);
+
+    if ( !page )
+        return -ENOMEM;
+
+    arena->map = xzalloc_array(unsigned long, BITS_TO_LONGS(1LLU << order));
+    arena->order = order;
+    arena->region_start = page_to_mfn(page);
+
+    _atomic_set(&arena->used_pages, 0);
+    bitmap_zero(arena->map, iommu_arena_size(arena));
+
+    printk(XENLOG_DEBUG "IOMMU: Allocated arena (%llu pages, start=%"PRI_mfn")\n",
+           iommu_arena_size(arena), mfn_x(arena->region_start));
+    return 0;
+}
+
+int iommu_arena_teardown(struct iommu_arena *arena, bool check)
+{
+    BUG_ON(mfn_x(arena->region_start) == 0);
+
+    /* Check for allocations if check is specified */
+    if ( check && (atomic_read(&arena->used_pages) > 0) )
+        return -EBUSY;
+
+    free_domheap_pages(mfn_to_page(arena->region_start), arena->order);
+
+    arena->region_start = _mfn(0);
+    _atomic_set(&arena->used_pages, 0);
+    xfree(arena->map);
+    arena->map = NULL;
+
+    return 0;
+}
+
+struct page_info *iommu_arena_allocate_page(struct iommu_arena *arena)
+{
+    unsigned int index;
+    unsigned int tsl_tries = 0;
+
+    BUG_ON(mfn_x(arena->region_start) == 0);
+
+    if ( atomic_read(&arena->used_pages) == iommu_arena_size(arena) )
+        /* All pages used */
+        return NULL;
+
+    do
+    {
+        index = find_first_zero_bit(arena->map, iommu_arena_size(arena));
+
+        if ( index >= iommu_arena_size(arena) )
+            /* No more free pages */
+            return NULL;
+
+        /*
+         * While there shouldn't be a lot of retries in practice, this loop
+         * *may* run indefinetly if the found bit is never free due to being
+         * overwriten by another CPU core right after. Add a safeguard for
+         * such very rare cases.
+         */
+        tsl_tries++;
+
+        if ( unlikely(tsl_tries == ARENA_TSL_MAX_TRIES) )
+        {
+            printk(XENLOG_ERR "ARENA: Too many TSL retries !");
+            return NULL;
+        }
+
+        /* Make sure that the bit we found is still free */
+    } while ( test_and_set_bit(index, arena->map) );
+
+    atomic_inc(&arena->used_pages);
+
+    return mfn_to_page(mfn_add(arena->region_start, index));
+}
+
+bool iommu_arena_free_page(struct iommu_arena *arena, struct page_info *page)
+{
+    unsigned long index;
+    mfn_t frame;
+
+    if ( !page )
+    {
+        printk(XENLOG_WARNING "IOMMU: Trying to free NULL page");
+        WARN();
+        return false;
+    }
+
+    frame = page_to_mfn(page);
+
+    /* Check if page belongs to our arena */
+    if ( (mfn_x(frame) < mfn_x(arena->region_start))
+        || (mfn_x(frame) >= (mfn_x(arena->region_start) + iommu_arena_size(arena))) )
+    {
+        printk(XENLOG_WARNING
+               "IOMMU: Trying to free outside arena region [mfn=%"PRI_mfn"]",
+               mfn_x(frame));
+        WARN();
+        return false;
+    }
+
+    index = mfn_x(frame) - mfn_x(arena->region_start);
+
+    /* Sanity check in case of underflow. */
+    ASSERT(index < iommu_arena_size(arena));
+
+    if ( !test_and_clear_bit(index, arena->map) )
+    {
+        /*
+         * Bit was free during our arena_free_page, which means that
+         * either this page was never allocated, or we are in a double-free
+         * situation.
+         */
+        printk(XENLOG_WARNING
+               "IOMMU: Freeing non-allocated region (double-free?) [mfn=%"PRI_mfn"]",
+               mfn_x(frame));
+        WARN();
+        return false;
+    }
+
+    atomic_dec(&arena->used_pages);
+
+    return true;
+}
\ No newline at end of file
-- 
2.51.2



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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Subject: Re: [XEN][PATCH v4] xen: make VMTRACE support optional
To: Grygorii Strashko 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 Stefano Stabellini ,
 Tamas K Lengyel ,
 Alexandru Isaila ,
 Petre Pircalabu ,
 Teddy Astie , Penny Zheng ,
 "xen-devel@lists.xenproject.org" 
References: <20251119193120.1011448-1-grygorii_strashko@epam.com>
 
 <054aaca3-919f-4b9e-bdfe-9bdb40f08388@epam.com>
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On 20.11.2025 11:47, Grygorii Strashko wrote:
> Hi Jan,
> 
> On 20.11.25 10:56, Jan Beulich wrote:
>> On 19.11.2025 20:31, Grygorii Strashko wrote:
>>> From: Grygorii Strashko 
>>>
>>> The VMTRACE feature is depends on Platform/Arch HW and code support and now
>>> can be used only on x86 HVM with Intel VT-x (INTEL_VMX) enabled.
>>> This makes VMTRACE support optional by introducing HVM Kconfig option:
>>> - CONFIG_VMTRACE to enable/disable the feature.
>>>
>>> Signed-off-by: Grygorii Strashko 
>>> ---
>>> changes in v4:
>>> - format changes
>>
>> Just partly, ...
>>
>>> @@ -772,13 +775,24 @@ static inline int hvm_vmtrace_get_option(
>>>   
>>>       return -EOPNOTSUPP;
>>>   }
>>> +#else
>>> +/*
>>> + * Function declaration(s) here are used without definition(s) to make compiler
>>> + * happy when VMTRACE=n, compiler DCE will eliminate unused code.
>>> + */
>>> +int hvm_vmtrace_output_position(struct vcpu *v, uint64_t *pos);
>>> +#endif
>>>   
>>>   static inline int hvm_vmtrace_reset(struct vcpu *v)
>>>   {
>>> +#ifdef CONFIG_VMTRACE
>>>       if ( hvm_funcs.vmtrace_reset )
>>>           return alternative_call(hvm_funcs.vmtrace_reset, v);
>>>   
>>>       return -EOPNOTSUPP;
>>> +#else
>>> +    return -EOPNOTSUPP;
>>> +#endif
>>>   }
>>
>> ... the #else wasn't dropped from here. If no need for a v5 arises, I guess
>> I can make the adjustment while committing. But it would be really nice if
>> all earlier comments were taken care of (one way or another) when submitting
>> a new version.
> 
> This is absolutely my miss. Sorry.
> I can resend with fix. Just tell me how will be better for you.

Well, as said above - no need to resend unless another reason for a v5 surfaces.

Jan


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Date: Thu, 20 Nov 2025 11:51:26 +0000
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Subject: Re: [PATCH 2/4] x86/MCE: restrict allocation of thermal and CMCI
 vector to BSP
To: Jan Beulich ,
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On 19/11/2025 10:50 am, Jan Beulich wrote:
> --- a/xen/arch/x86/cpu/mcheck/mce.c
> +++ b/xen/arch/x86/cpu/mcheck/mce.c
> @@ -110,13 +110,13 @@ static void __init mcheck_intel_therm_in
>  }
>  
>  /* P4/Xeon Thermal regulation detect and init */
> -static void intel_init_thermal(struct cpuinfo_x86 *c)
> +static void intel_init_thermal(const struct cpuinfo_x86 *c, bool bsp)
>  {
>      uint64_t msr_content;
>      uint32_t val;
>      int tm2 = 0;
>      unsigned int cpu = smp_processor_id();
> -    static uint8_t thermal_apic_vector;
> +    static uint8_t __ro_after_init thermal_apic_vector;
>  
>      if ( !intel_thermal_supported(c) )
>          return; /* -ENODEV */
> @@ -160,7 +160,8 @@ static void intel_init_thermal(struct cp
>          return; /* -EBUSY */
>      }
>  
> -    alloc_direct_apic_vector(&thermal_apic_vector, intel_thermal_interrupt);
> +    if ( bsp )
> +        alloc_direct_apic_vector(&thermal_apic_vector, intel_thermal_interrupt);

We really don't want both c and bsp passed in.  That can only go wrong.

Furthermore, this function has 2 other examples generating bsp locally.

The function is in desperate need of cleanup (MSRs, variable and
constant names), but right now this makes it worse.

Please either use c == &boot_cpu_data, and I'll do some cleanup later,
or generate bsp = c == &boot_cpu_data and fix up all users in the function.

~Andrew


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Subject: Re: [PATCH 1/5] hw/core/loader: Make load_elf_hdr() return bool,
 simplify caller
To: Markus Armbruster , qemu-devel@nongnu.org
Cc: kwolf@redhat.com, hreitz@redhat.com, mst@redhat.com, imammedo@redhat.com,
 anisinha@redhat.com, gengdongjiu1@gmail.com, peter.maydell@linaro.org,
 alistair@alistair23.me, edgar.iglesias@gmail.com, npiggin@gmail.com,
 harshpb@linux.ibm.com, palmer@dabbelt.com, liwei1518@gmail.com,
 zhiwei_liu@linux.alibaba.com, sstabellini@kernel.org,
 anthony@xenproject.org, paul@xen.org, berrange@redhat.com,
 peterx@redhat.com, farosas@suse.de, eblake@redhat.com,
 vsementsov@yandex-team.ru, eduardo@habkost.net, marcel.apfelbaum@gmail.com,
 philmd@linaro.org, wangyanan55@huawei.com, zhao1.liu@intel.com,
 qemu-block@nongnu.org, qemu-arm@nongnu.org, qemu-ppc@nongnu.org,
 qemu-riscv@nongnu.org, xen-devel@lists.xenproject.org
References: <20251119130855.105479-1-armbru@redhat.com>
 <20251119130855.105479-2-armbru@redhat.com>
From: Daniel Henrique Barboza 
Content-Language: en-US
In-Reply-To: <20251119130855.105479-2-armbru@redhat.com>
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On 11/19/25 10:08 AM, Markus Armbruster wrote:
> Signed-off-by: Markus Armbruster 
> ---

Nice cleanup


Reviewed-by: Daniel Henrique Barboza 

>   include/hw/loader.h |  4 +++-
>   hw/arm/boot.c       |  6 +-----
>   hw/core/loader.c    |  8 ++++++--
>   hw/riscv/spike.c    | 10 +---------
>   4 files changed, 11 insertions(+), 17 deletions(-)
> 
> diff --git a/include/hw/loader.h b/include/hw/loader.h
> index d035e72748..6f91703503 100644
> --- a/include/hw/loader.h
> +++ b/include/hw/loader.h
> @@ -188,8 +188,10 @@ ssize_t load_elf(const char *filename,
>    *
>    * Inspect an ELF file's header. Read its full header contents into a
>    * buffer and/or determine if the ELF is 64bit.
> + *
> + * Returns true on success, false on failure.
>    */
> -void load_elf_hdr(const char *filename, void *hdr, bool *is64, Error **errp);
> +bool load_elf_hdr(const char *filename, void *hdr, bool *is64, Error **errp);
>   
>   ssize_t load_aout(const char *filename, hwaddr addr, int max_sz,
>                     bool big_endian, hwaddr target_page_size);
> diff --git a/hw/arm/boot.c b/hw/arm/boot.c
> index b91660208f..06b303aab8 100644
> --- a/hw/arm/boot.c
> +++ b/hw/arm/boot.c
> @@ -766,16 +766,12 @@ static ssize_t arm_load_elf(struct arm_boot_info *info, uint64_t *pentry,
>       int data_swab = 0;
>       int elf_data_order;
>       ssize_t ret;
> -    Error *err = NULL;
>   
> -
> -    load_elf_hdr(info->kernel_filename, &elf_header, &elf_is64, &err);
> -    if (err) {
> +    if (!load_elf_hdr(info->kernel_filename, &elf_header, &elf_is64, NULL)) {
>           /*
>            * If the file is not an ELF file we silently return.
>            * The caller will fall back to try other formats.
>            */
> -        error_free(err);
>           return -1;
>       }
>   
> diff --git a/hw/core/loader.c b/hw/core/loader.c
> index 590c5b02aa..10687fe1c8 100644
> --- a/hw/core/loader.c
> +++ b/hw/core/loader.c
> @@ -364,8 +364,9 @@ const char *load_elf_strerror(ssize_t error)
>       }
>   }
>   
> -void load_elf_hdr(const char *filename, void *hdr, bool *is64, Error **errp)
> +bool load_elf_hdr(const char *filename, void *hdr, bool *is64, Error **errp)
>   {
> +    bool ok = false;
>       int fd;
>       uint8_t e_ident_local[EI_NIDENT];
>       uint8_t *e_ident;
> @@ -380,7 +381,7 @@ void load_elf_hdr(const char *filename, void *hdr, bool *is64, Error **errp)
>       fd = open(filename, O_RDONLY | O_BINARY);
>       if (fd < 0) {
>           error_setg_errno(errp, errno, "Failed to open file: %s", filename);
> -        return;
> +        return false;
>       }
>       if (read(fd, hdr, EI_NIDENT) != EI_NIDENT) {
>           error_setg_errno(errp, errno, "Failed to read file: %s", filename);
> @@ -415,8 +416,11 @@ void load_elf_hdr(const char *filename, void *hdr, bool *is64, Error **errp)
>           off += br;
>       }
>   
> +    ok = true;
> +
>   fail:
>       close(fd);
> +    return ok;
>   }
>   
>   /* return < 0 if error, otherwise the number of bytes loaded in memory */
> diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
> index b0bab3fe00..8531e1d121 100644
> --- a/hw/riscv/spike.c
> +++ b/hw/riscv/spike.c
> @@ -180,15 +180,7 @@ static void create_fdt(SpikeState *s, const MemMapEntry *memmap,
>   
>   static bool spike_test_elf_image(char *filename)
>   {
> -    Error *err = NULL;
> -
> -    load_elf_hdr(filename, NULL, NULL, &err);
> -    if (err) {
> -        error_free(err);
> -        return false;
> -    } else {
> -        return true;
> -    }
> +    return load_elf_hdr(filename, NULL, NULL, NULL);
>   }
>   
>   static void spike_board_init(MachineState *machine)



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On 19/11/2025 10:50 am, Jan Beulich wrote:
> With all callers of alloc_direct_apic_vector() now being limited to BSP
> setup, it and its helpers (whose other callers have already been init-
> only) can become __init. As a result data items can be adjusted, too.
>
> Signed-off-by: Jan Beulich 
> ---
> Question is whether with this the "if (*vector == 0)" in
> alloc_direct_apic_vector() is of much use anymore.
>
> --- a/xen/arch/x86/irq.c
> +++ b/xen/arch/x86/irq.c
> @@ -970,22 +970,22 @@ void pirq_set_affinity(struct domain *d,
>  DEFINE_PER_CPU(unsigned int, irq_count);
>  static DEFINE_PER_CPU(bool, check_eoi_deferral);
>  
> -uint8_t alloc_hipriority_vector(void)
> +uint8_t __init alloc_hipriority_vector(void)
>  {
> -    static uint8_t next = FIRST_HIPRIORITY_VECTOR;
> +    static uint8_t __initdata next = FIRST_HIPRIORITY_VECTOR;
>      BUG_ON(next < FIRST_HIPRIORITY_VECTOR);
>      BUG_ON(next > LAST_HIPRIORITY_VECTOR);
>      return next++;
>  }
>  
> -static void (*direct_apic_vector[X86_IDT_VECTORS])(void);
> -void set_direct_apic_vector(uint8_t vector, void (*handler)(void))
> +static void (*__ro_after_init direct_apic_vector[X86_IDT_VECTORS])(void);
> +void __init set_direct_apic_vector(uint8_t vector, void (*handler)(void))
>  {
>      BUG_ON(direct_apic_vector[vector] != NULL);
>      direct_apic_vector[vector] = handler;
>  }
>  
> -void alloc_direct_apic_vector(uint8_t *vector, void (*handler)(void))
> +void __init alloc_direct_apic_vector(uint8_t *vector, void (*handler)(void))
>  {
>      static DEFINE_SPINLOCK(lock);
>  
>

This function, being __init now, cannot possibly need the spinlock.

To your question checking vector for 0, that always wrong in my opinion,
stemming from this being a bad API.

It should become:

diff --git a/xen/arch/x86/cpu/mcheck/mce_intel.c b/xen/arch/x86/cpu/mcheck/mce_intel.c
index bb3c9f9e5234..9ae0bece1af7 100644
--- a/xen/arch/x86/cpu/mcheck/mce_intel.c
+++ b/xen/arch/x86/cpu/mcheck/mce_intel.c
@@ -161,7 +161,7 @@ static void intel_init_thermal(const struct cpuinfo_x86 *c, bool bsp)
     }
 
     if ( bsp )
-        alloc_direct_apic_vector(&thermal_apic_vector, intel_thermal_interrupt);
+        thermal_apic_vector = alloc_direct_apic_vector(intel_thermal_interrupt);
 
     /* The temperature transition interrupt handler setup */
     val = thermal_apic_vector;    /* our delivery vector */
@@ -689,7 +689,7 @@ static void intel_init_cmci(struct cpuinfo_x86 *c, bool bsp)
     }
 
     if ( bsp )
-        alloc_direct_apic_vector(&cmci_apic_vector, cmci_interrupt);
+        cmci_apic_vector = alloc_direct_apic_vector(cmci_interrupt);
 
     apic = cmci_apic_vector;
     apic |= (APIC_DM_FIXED | APIC_LVT_MASKED);
diff --git a/xen/arch/x86/guest/xen/xen.c b/xen/arch/x86/guest/xen/xen.c
index 640872efdd2a..a473296ba94f 100644
--- a/xen/arch/x86/guest/xen/xen.c
+++ b/xen/arch/x86/guest/xen/xen.c
@@ -289,7 +289,7 @@ static void __init cf_check setup(void)
                XEN_LEGACY_MAX_VCPUS);
     }
 
-    alloc_direct_apic_vector(&evtchn_upcall_vector, xen_evtchn_upcall);
+    evtchn_upcall_vector = alloc_direct_apic_vector(xen_evtchn_upcall);
 
     BUG_ON(init_evtchn());
 }
diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c
index e2b5077654ef..0919edd73312 100644
--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -3118,10 +3118,10 @@ const struct hvm_function_table * __init start_vmx(void)
 
     if ( cpu_has_vmx_posted_intr_processing )
     {
-        alloc_direct_apic_vector(&posted_intr_vector, pi_notification_interrupt);
+        posted_intr_vector = alloc_direct_apic_vector(pi_notification_interrupt);
         if ( iommu_intpost )
         {
-            alloc_direct_apic_vector(&pi_wakeup_vector, pi_wakeup_interrupt);
+            pi_wakeup_vector = alloc_direct_apic_vector(pi_wakeup_interrupt);
 
             vmx_function_table.pi_update_irte = vmx_pi_update_irte;
         }
diff --git a/xen/arch/x86/include/asm/irq.h b/xen/arch/x86/include/asm/irq.h
index 7315150b66b4..0cf47a883722 100644
--- a/xen/arch/x86/include/asm/irq.h
+++ b/xen/arch/x86/include/asm/irq.h
@@ -119,7 +119,7 @@ uint8_t alloc_hipriority_vector(void);
 void free_lopriority_vector(uint8_t vector);
 
 void set_direct_apic_vector(uint8_t vector, void (*handler)(void));
-void alloc_direct_apic_vector(uint8_t *vector, void (*handler)(void));
+uint8_t alloc_direct_apic_vector(void (*handler)(void));
 
 void do_IRQ(struct cpu_user_regs *regs);
 
diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index c740035927c2..f50b5b5d5037 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -985,16 +985,13 @@ void __init set_direct_apic_vector(uint8_t vector, void (*handler)(void))
     direct_apic_vector[vector] = handler;
 }
 
-void __init alloc_direct_apic_vector(uint8_t *vector, void (*handler)(void))
+uint8_t __init alloc_direct_apic_vector(void (*handler)(void))
 {
-    static DEFINE_SPINLOCK(lock);
+    uint8_t vec = alloc_hipriority_vector();
 
-    spin_lock(&lock);
-    if (*vector == 0) {
-        *vector = alloc_hipriority_vector();
-        set_direct_apic_vector(*vector, handler);
-    }
-    spin_unlock(&lock);
+    set_direct_apic_vector(vec, handler);
+
+    return vec;
 }
 
 /* This could free any vectors, but is needed only for low-prio ones. */


which makes it a far more normal looking API, improves code generation,
and gets rid of the pointless lock.

Feel free to fold this in, or I can submit it separately, but I think
both parts want to go in together.

~Andrew


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Date: Thu, 20 Nov 2025 13:08:47 +0100
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Subject: Re: [PATCH 1/4] x86/guest: move allocation of Xen upcall vector to
 init code
To: Andrew Cooper 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 "xen-devel@lists.xenproject.org" 
References: 
 <5ccf9000-9847-40de-838e-cb181633b098@suse.com>
 <943e462f-d948-4f72-8d4c-626febca5b32@citrix.com>
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On 20.11.2025 12:07, Andrew Cooper wrote:
> On 20/11/2025 11:01 am, Andrew Cooper wrote:
>> On 19/11/2025 10:50 am, Jan Beulich wrote:
>>> There's no need to do this every time init_evtchn() is called. Just do it
>>> once when setting up CPU0. Drop the assertion as well, as
>>> alloc_hipriority_vector() (called by alloc_direct_apic_vector()) uses more
>>> restrictive BUG_ON() anyway. Then evtchn_upcall_vector can also validly
>>> become ro-after-init, just that it needs to move out of init_evtchn().
>>>
>>> Signed-off-by: Jan Beulich 
>>>
>>> --- a/xen/arch/x86/guest/xen/xen.c
>>> +++ b/xen/arch/x86/guest/xen/xen.c
>>> @@ -233,16 +233,12 @@ static void cf_check xen_evtchn_upcall(v
>>>      ack_APIC_irq();
>>>  }
>>>  
>>> +static uint8_t __ro_after_init evtchn_upcall_vector;
>>> +
>>>  static int init_evtchn(void)
>>>  {
>>> -    static uint8_t evtchn_upcall_vector;
>>>      int rc;
>>>  
>>> -    if ( !evtchn_upcall_vector )
>>> -        alloc_direct_apic_vector(&evtchn_upcall_vector, xen_evtchn_upcall);
>>> -
>>> -    ASSERT(evtchn_upcall_vector);
>>> -
>>>      rc = xen_hypercall_set_evtchn_upcall_vector(this_cpu(vcpu_id),
>>>                                                  evtchn_upcall_vector);
>>>      if ( rc )
>>> @@ -293,6 +289,8 @@ static void __init cf_check setup(void)
>>>                 XEN_LEGACY_MAX_VCPUS);
>>>      }
>>>  
>>> +    alloc_direct_apic_vector(&evtchn_upcall_vector, xen_evtchn_upcall);
>>> +
>>>      BUG_ON(init_evtchn());
>>>  }
>>>  
>>>
>> This patch is fine, but it would be nicer to split init_evtchn() into
>> bsp_init_evtchn() and percpu_init_evtchn().
>>
>> Just out of context in init_evtchn(), there's a check for CPU0 that also
>> ought to move into bsp_init_evtchn() (and therefore into __init), at
>> which point the percpu simplifies to a single hypercall, and we keep
>> subsystem specifics out of setup().
> 
> No, scratch that.  HVM_PARAM_CALLBACK_IRQ is not in the list of HVM
> Params that migration moves on migrate (see write_hvm_params() in
> xg_sr_save_x86_hvm.c).
> 
> Everything is awful.
> 
> Could you include a comment such as /* HVM_PARAM_CALLBACK_IRQ is not
> moved on migrate, so has to be set up again on resume. */ to make it
> clear why that piece of logic needs to stay in a non-init function?

It's pretty much unrelated to the change here, but yes, sure, I can add
such a comment while touching the function.

Jan


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Subject: Re: [PATCH 2/4] x86/MCE: restrict allocation of thermal and CMCI
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On 20.11.2025 12:51, Andrew Cooper wrote:
> On 19/11/2025 10:50 am, Jan Beulich wrote:
>> --- a/xen/arch/x86/cpu/mcheck/mce.c
>> +++ b/xen/arch/x86/cpu/mcheck/mce.c
>> @@ -110,13 +110,13 @@ static void __init mcheck_intel_therm_in
>>  }
>>  
>>  /* P4/Xeon Thermal regulation detect and init */
>> -static void intel_init_thermal(struct cpuinfo_x86 *c)
>> +static void intel_init_thermal(const struct cpuinfo_x86 *c, bool bsp)
>>  {
>>      uint64_t msr_content;
>>      uint32_t val;
>>      int tm2 = 0;
>>      unsigned int cpu = smp_processor_id();
>> -    static uint8_t thermal_apic_vector;
>> +    static uint8_t __ro_after_init thermal_apic_vector;
>>  
>>      if ( !intel_thermal_supported(c) )
>>          return; /* -ENODEV */
>> @@ -160,7 +160,8 @@ static void intel_init_thermal(struct cp
>>          return; /* -EBUSY */
>>      }
>>  
>> -    alloc_direct_apic_vector(&thermal_apic_vector, intel_thermal_interrupt);
>> +    if ( bsp )
>> +        alloc_direct_apic_vector(&thermal_apic_vector, intel_thermal_interrupt);
> 
> We really don't want both c and bsp passed in.  That can only go wrong.
> 
> Furthermore, this function has 2 other examples generating bsp locally.
> 
> The function is in desperate need of cleanup (MSRs, variable and
> constant names), but right now this makes it worse.
> 
> Please either use c == &boot_cpu_data, and I'll do some cleanup later,
> or generate bsp = c == &boot_cpu_data and fix up all users in the function.

No, throughout mce/ this won't work as long as acpi/power.c:enter_state() has

    mcheck_init(&boot_cpu_data, false);

Jan


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On 20.11.2025 10:06, Roger Pau Monne wrote:
> All implementations use the same hook.  No functional change intended.
> 
> Signed-off-by: Roger Pau Monné 

Reviewed-by: Jan Beulich 
(even more so that I had effectively the same patch, just dealing with the other
hook at the same time)


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Subject: Re: [PATCH 4/4] x86/vPMU: don't statically reserve the interrupt
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On 19/11/2025 10:51 am, Jan Beulich wrote:
> Move the setup to vPMU code, doing the allocation of a vector only when
> one is actually going to be needed. With that the handler function also
> doesn't need to be split across two places anymore.
>
> Add the freed up vector to the dynamically allocatable range.
>
> Signed-off-by: Jan Beulich 
> ---
> In case down the road we also want to have a build mode with vPMU code
> excluded, this may also simplify things a little there.
>
> --- a/xen/arch/x86/apic.c
> +++ b/xen/arch/x86/apic.c
> @@ -1313,16 +1313,6 @@ static void cf_check error_interrupt(voi
>             entries[3], entries[2], entries[1], entries[0]);
>  }
>  
> -/*
> - * This interrupt handles performance counters interrupt
> - */
> -
> -static void cf_check pmu_interrupt(void)
> -{
> -    ack_APIC_irq();
> -    vpmu_do_interrupt();
> -}
> -

I know you're only moving this, but it's likely-buggy before and after. 
ack_APIC_irq() needs to be last, and Xen's habit for acking early is why
we have reentrancy problems.

I think there wants to be a patch ahead of this one swapping the order
so the ack is at the end, so that this patch can retain that property
when merging the functions.

Or, if you're absolutely certain it doesn't need backporting as a
bugfix, then merging into this patch is probably ok as long as it's
called out clearly in the commit message.

> --- a/xen/arch/x86/cpu/vpmu.c
> +++ b/xen/arch/x86/cpu/vpmu.c
> @@ -369,7 +373,7 @@ void vpmu_save(struct vcpu *v)
>  
>      vpmu_reset(vpmu, VPMU_CONTEXT_SAVE);
>  
> -    apic_write(APIC_LVTPC, PMU_APIC_VECTOR | APIC_LVT_MASKED);
> +    apic_write(APIC_LVTPC, pmu_apic_vector | APIC_LVT_MASKED);
>  }
>  
>  int vpmu_load(struct vcpu *v, bool from_guest)
> @@ -432,7 +436,7 @@ static int vpmu_arch_initialise(struct v
>          return ret;
>      }
>  
> -    vpmu->hw_lapic_lvtpc = PMU_APIC_VECTOR | APIC_LVT_MASKED;
> +    vpmu->hw_lapic_lvtpc = pmu_apic_vector | APIC_LVT_MASKED;

Taking a step back, I'm confused as to why we have pmu_apic_vector at all.

LVTPC needs programming with NMIs in order to provide coherent information.

I think this might go a long way to explaining some of the complaints
we've had in the past about junk showing up.

~Andrew


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On 20.11.2025 10:06, Roger Pau Monne wrote:
> All implementations use the same hook which is a wrapper around
> cpumask_of(cpu).  Adjust callers to no longer use such dummy mask with a
> single CPU set, as the CPU is already known to the caller.  This removes a
> pair of usages of for_each_cpu().
> 
> No functional change intended.
> 
> Signed-off-by: Roger Pau Monné 

Reviewed-by: Jan Beulich 
with one possible adjustment:

> @@ -688,12 +683,12 @@ next:
>                  release_old_vec(desc);
>          }
>  
> -        trace_irq_mask(TRC_HW_IRQ_ASSIGN_VECTOR, irq, vector, vec_mask);
> +        trace_irq_mask(TRC_HW_IRQ_ASSIGN_VECTOR, irq, vector, cpumask_of(cpu));
>  
> -        for_each_cpu(new_cpu, vec_mask)
> -            per_cpu(vector_irq, new_cpu)[vector] = irq;
> +        per_cpu(vector_irq, cpu)[vector] = irq;
>          desc->arch.vector = vector;
> -        cpumask_copy(desc->arch.cpu_mask, vec_mask);
> +        cpumask_clear(desc->arch.cpu_mask);
> +        cpumask_set_cpu(cpu, desc->arch.cpu_mask);

This being a LOCKed operation, might we better use

        cpumask_copy(desc->arch.cpu_mask, cpumask_of(cpu));

here? Otoh I expect this to go away later in the series anyway, so possibly not
a big deal.

Jan


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On 20/11/2025 9:06 am, Roger Pau Monne wrote:
> All implementations use the same hook.  No functional change intended.
>
> Signed-off-by: Roger Pau Monné 

Acked-by: Andrew Cooper 


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Date: Thu, 20 Nov 2025 12:30:10 +0000
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Subject: Re: [PATCH 02/12] x86/apic: remove vector_allocation_cpumask hook
To: Roger Pau Monne , xen-devel@lists.xenproject.org
Cc: Jan Beulich 
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 <20251120090637.25087-3-roger.pau@citrix.com>
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On 20/11/2025 9:06 am, Roger Pau Monne wrote:
> All implementations use the same hook which is a wrapper around
> cpumask_of(cpu).  Adjust callers to no longer use such dummy mask with a
> single CPU set, as the CPU is already known to the caller.  This removes a
> pair of usages of for_each_cpu().
>
> No functional change intended.
>
> Signed-off-by: Roger Pau Monné 

Acked-by: Andrew Cooper , with one suggestion.

> diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
> index 80f7417d2103..7009a3c6d0dd 100644
> --- a/xen/arch/x86/irq.c
> +++ b/xen/arch/x86/irq.c
> @@ -650,13 +646,12 @@ next:
>              && test_bit(vector, irq_used_vectors) )
>              goto next;
>  
> -        if ( cpumask_test_cpu(0, vec_mask) &&
> +        if ( !cpu &&
>               vector >= FIRST_LEGACY_VECTOR && vector <= LAST_LEGACY_VECTOR )
>              goto next;
>  
> -        for_each_cpu(new_cpu, vec_mask)
> -            if (per_cpu(vector_irq, new_cpu)[vector] >= 0)
> -                goto next;
> +        if ( per_cpu(vector_irq, cpu)[vector] >= 0 )
> +            goto next;

Please can we have a blank line here for legibility.

>          /* Found one! */
>          current_vector = vector;
>          current_offset = offset;
> @@ -688,12 +683,12 @@ next:
>                  release_old_vec(desc);
>          }
>  
> -        trace_irq_mask(TRC_HW_IRQ_ASSIGN_VECTOR, irq, vector, vec_mask);
> +        trace_irq_mask(TRC_HW_IRQ_ASSIGN_VECTOR, irq, vector, cpumask_of(cpu));

This highlights that there's a problem with tracing on large systems,
not that there's anything we can really do about it.

~Andrew


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Subject: Re: [PATCH 4/4] x86/vPMU: don't statically reserve the interrupt
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On 20.11.2025 13:24, Andrew Cooper wrote:
> On 19/11/2025 10:51 am, Jan Beulich wrote:
>> --- a/xen/arch/x86/apic.c
>> +++ b/xen/arch/x86/apic.c
>> @@ -1313,16 +1313,6 @@ static void cf_check error_interrupt(voi
>>             entries[3], entries[2], entries[1], entries[0]);
>>  }
>>  
>> -/*
>> - * This interrupt handles performance counters interrupt
>> - */
>> -
>> -static void cf_check pmu_interrupt(void)
>> -{
>> -    ack_APIC_irq();
>> -    vpmu_do_interrupt();
>> -}
>> -
> 
> I know you're only moving this, but it's likely-buggy before and after. 
> ack_APIC_irq() needs to be last, and Xen's habit for acking early is why
> we have reentrancy problems.

I was wondering, but was vaguely (but apparently wrongly) remembering that
the PMU interrupt is self-disabling (i.e. requires re-enabling before it
can fire again). Should have checked vpmu_do_interrupt() a little more
closely, where from the various plain "return" it's pretty clear that isn't
the case.

> I think there wants to be a patch ahead of this one swapping the order
> so the ack is at the end, so that this patch can retain that property
> when merging the functions.
> 
> Or, if you're absolutely certain it doesn't need backporting as a
> bugfix, then merging into this patch is probably ok as long as it's
> called out clearly in the commit message.

No, I'll make this a separate, prereq patch.

Jan


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Date: Thu, 20 Nov 2025 12:39:14 +0000
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Subject: Re: [PATCH 4/4] x86/vPMU: don't statically reserve the interrupt
 vector
To: Jan Beulich 
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On 20/11/2025 12:31 pm, Jan Beulich wrote:
> On 20.11.2025 13:24, Andrew Cooper wrote:
>> On 19/11/2025 10:51 am, Jan Beulich wrote:
>>> --- a/xen/arch/x86/apic.c
>>> +++ b/xen/arch/x86/apic.c
>>> @@ -1313,16 +1313,6 @@ static void cf_check error_interrupt(voi
>>>             entries[3], entries[2], entries[1], entries[0]);
>>>  }
>>>  
>>> -/*
>>> - * This interrupt handles performance counters interrupt
>>> - */
>>> -
>>> -static void cf_check pmu_interrupt(void)
>>> -{
>>> -    ack_APIC_irq();
>>> -    vpmu_do_interrupt();
>>> -}
>>> -
>> I know you're only moving this, but it's likely-buggy before and after. 
>> ack_APIC_irq() needs to be last, and Xen's habit for acking early is why
>> we have reentrancy problems.
> I was wondering, but was vaguely (but apparently wrongly) remembering that
> the PMU interrupt is self-disabling (i.e. requires re-enabling before it
> can fire again). Should have checked vpmu_do_interrupt() a little more
> closely, where from the various plain "return" it's pretty clear that isn't
> the case.

It can be configured to be self-disabling. 
IA32_DEBUGCTL.Freeze_PerfMon_On_PMI, and variations on this theme
depending on the arch perfmon revision.

I'm not aware of AMD having a similar capability.

>
>> I think there wants to be a patch ahead of this one swapping the order
>> so the ack is at the end, so that this patch can retain that property
>> when merging the functions.
>>
>> Or, if you're absolutely certain it doesn't need backporting as a
>> bugfix, then merging into this patch is probably ok as long as it's
>> called out clearly in the commit message.
> No, I'll make this a separate, prereq patch.

Ok, and with this rebased on top, Acked-by: Andrew Cooper



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Date: Thu, 20 Nov 2025 12:39:33 +0000
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH 03/12] x86/irq: introduce local irq_desc
To: Roger Pau Monne , xen-devel@lists.xenproject.org
Cc: Jan Beulich 
References: <20251120090637.25087-1-roger.pau@citrix.com>
 <20251120090637.25087-4-roger.pau@citrix.com>
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On 20/11/2025 9:06 am, Roger Pau Monne wrote:
> Avoid duplicated calls to irq_to_desc() by storing the result in a local
> variable.  No functional change.
>
> Signed-off-by: Roger Pau Monné 

Acked-by: Andrew Cooper 


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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
From: Jan Beulich 
Subject: [PATCH] x86emul/test: correct compiler checking and avoid it when
 merely cleaning
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The error messages that the compiler may emit can be confusing.

The check was also the wrong way round in case multiple make targets are
specified: We want to do the check whenever targets other than the running
and cleaning ones are specified.

Fixes: 05f4cc219235 ("x86emul: suppress default test harness build with incapable compiler")
Fixes: d5997399b7ad ("x86emul: suppress "not built" warning for test harness'es run targets")
Signed-off-by: Jan Beulich 

--- a/tools/tests/x86_emulator/Makefile
+++ b/tools/tests/x86_emulator/Makefile
@@ -98,7 +98,7 @@ avx512bw-opmask-vecs := 4 8
 # partially even with older compilers.
 TARGET-y := $(TARGET)
 
-ifeq ($(filter run%,$(MAKECMDGOALS)),)
+ifneq ($(filter-out run% clean% distclean,$(MAKECMDGOALS)),)
 
 define isa-check-cc
 TARGET-$(shell echo 'int i;' | $(CC) -x c -c -o /dev/null -m$(1) - || echo y) :=


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On 20/11/2025 12:43 pm, Jan Beulich wrote:
> The error messages that the compiler may emit can be confusing.
>
> The check was also the wrong way round in case multiple make targets are
> specified: We want to do the check whenever targets other than the running
> and cleaning ones are specified.
>
> Fixes: 05f4cc219235 ("x86emul: suppress default test harness build with incapable compiler")
> Fixes: d5997399b7ad ("x86emul: suppress "not built" warning for test harness'es run targets")
> Signed-off-by: Jan Beulich 

Acked-by: Andrew Cooper 


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Date: Thu, 20 Nov 2025 12:45:25 +0000
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Subject: Re: [PATCH 04/12] x86/irq: set accurate cpu_mask for high priority
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To: Roger Pau Monne , xen-devel@lists.xenproject.org
Cc: Jan Beulich 
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 <20251120090637.25087-5-roger.pau@citrix.com>
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On 20/11/2025 9:06 am, Roger Pau Monne wrote:
> Setting the irq descriptor target CPU mask of high priority interrupts to
> contain all online CPUs is not accurate.  External interrupts are
> exclusively delivered using physical destination mode, and hence can only
> target a single CPU.  Setting the descriptor CPU mask to contain all online
> CPUs makes it impossible for Xen to figure out which CPU the interrupt is
> really targeting.
>
> Instead handle high priority vectors used by external interrupts similarly
> to normal vectors, keeping the target CPU mask accurate.  Introduce
> specific code in _assign_irq_vector() to deal with moving high priority
> vectors across CPUs, this is needed at least for fixup_irqs() to be able to
> evacuate those if the target CPU goes offline.
>
> Fixes: fc0c3fa2ad5c ("x86/IO-APIC: fix setup of Xen internally used IRQs (take 2)")
> Signed-off-by: Roger Pau Monné 

Which external interrupts do we have like this?

Looking at Jan's series, the VMX Posted Interrupt vector is like this,
but I can't see a case of getting a high priority vector, and
fixup_irqs() being a legitimate thing to do.

~Andrew


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Subject: Re: [PATCH 04/12] x86/irq: set accurate cpu_mask for high priority
 vectors used by external interrupts
To: Andrew Cooper 
References: <20251120090637.25087-1-roger.pau@citrix.com>
 <20251120090637.25087-5-roger.pau@citrix.com>
 <7ba08f24-1803-4fd8-95b5-1587045d50f4@citrix.com>
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On 20.11.2025 13:45, Andrew Cooper wrote:
> On 20/11/2025 9:06 am, Roger Pau Monne wrote:
>> Setting the irq descriptor target CPU mask of high priority interrupts to
>> contain all online CPUs is not accurate.  External interrupts are
>> exclusively delivered using physical destination mode, and hence can only
>> target a single CPU.  Setting the descriptor CPU mask to contain all online
>> CPUs makes it impossible for Xen to figure out which CPU the interrupt is
>> really targeting.
>>
>> Instead handle high priority vectors used by external interrupts similarly
>> to normal vectors, keeping the target CPU mask accurate.  Introduce
>> specific code in _assign_irq_vector() to deal with moving high priority
>> vectors across CPUs, this is needed at least for fixup_irqs() to be able to
>> evacuate those if the target CPU goes offline.
>>
>> Fixes: fc0c3fa2ad5c ("x86/IO-APIC: fix setup of Xen internally used IRQs (take 2)")
>> Signed-off-by: Roger Pau Monné 
> 
> Which external interrupts do we have like this?
> 
> Looking at Jan's series, the VMX Posted Interrupt vector is like this,
> but I can't see a case of getting a high priority vector, and
> fixup_irqs() being a legitimate thing to do.

The serial IRQ is hiprio and wants to be subject to moving around.

Jan


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Date: Thu, 20 Nov 2025 13:55:13 +0100 (CET)
From: BALATON Zoltan 
To: Daniel Henrique Barboza 
cc: Markus Armbruster , qemu-devel@nongnu.org, 
    kwolf@redhat.com, hreitz@redhat.com, mst@redhat.com, imammedo@redhat.com, 
    anisinha@redhat.com, gengdongjiu1@gmail.com, peter.maydell@linaro.org, 
    alistair@alistair23.me, edgar.iglesias@gmail.com, npiggin@gmail.com, 
    harshpb@linux.ibm.com, palmer@dabbelt.com, liwei1518@gmail.com, 
    zhiwei_liu@linux.alibaba.com, sstabellini@kernel.org, 
    anthony@xenproject.org, paul@xen.org, berrange@redhat.com, 
    peterx@redhat.com, farosas@suse.de, eblake@redhat.com, 
    vsementsov@yandex-team.ru, eduardo@habkost.net, marcel.apfelbaum@gmail.com, 
    philmd@linaro.org, wangyanan55@huawei.com, zhao1.liu@intel.com, 
    qemu-block@nongnu.org, qemu-arm@nongnu.org, qemu-ppc@nongnu.org, 
    qemu-riscv@nongnu.org, xen-devel@lists.xenproject.org
Subject: Re: [PATCH 1/5] hw/core/loader: Make load_elf_hdr() return bool,
 simplify caller
In-Reply-To: <4fb0a736-4450-47c0-9f9e-6cb86a3b28ea@ventanamicro.com>
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References: <20251119130855.105479-1-armbru@redhat.com> <20251119130855.105479-2-armbru@redhat.com> <4fb0a736-4450-47c0-9f9e-6cb86a3b28ea@ventanamicro.com>
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On Thu, 20 Nov 2025, Daniel Henrique Barboza wrote:
> On 11/19/25 10:08 AM, Markus Armbruster wrote:
>> Signed-off-by: Markus Armbruster 
>> ---
>
> Nice cleanup
>
>
> Reviewed-by: Daniel Henrique Barboza 
>
>>   include/hw/loader.h |  4 +++-
>>   hw/arm/boot.c       |  6 +-----
>>   hw/core/loader.c    |  8 ++++++--
>>   hw/riscv/spike.c    | 10 +---------
>>   4 files changed, 11 insertions(+), 17 deletions(-)
>> 
>> diff --git a/include/hw/loader.h b/include/hw/loader.h
>> index d035e72748..6f91703503 100644
>> --- a/include/hw/loader.h
>> +++ b/include/hw/loader.h
>> @@ -188,8 +188,10 @@ ssize_t load_elf(const char *filename,
>>    *
>>    * Inspect an ELF file's header. Read its full header contents into a
>>    * buffer and/or determine if the ELF is 64bit.
>> + *
>> + * Returns true on success, false on failure.
>>    */
>> -void load_elf_hdr(const char *filename, void *hdr, bool *is64, Error 
>> **errp);
>> +bool load_elf_hdr(const char *filename, void *hdr, bool *is64, Error 
>> **errp);
>>     ssize_t load_aout(const char *filename, hwaddr addr, int max_sz,
>>                     bool big_endian, hwaddr target_page_size);
>> diff --git a/hw/arm/boot.c b/hw/arm/boot.c
>> index b91660208f..06b303aab8 100644
>> --- a/hw/arm/boot.c
>> +++ b/hw/arm/boot.c
>> @@ -766,16 +766,12 @@ static ssize_t arm_load_elf(struct arm_boot_info 
>> *info, uint64_t *pentry,
>>       int data_swab = 0;
>>       int elf_data_order;
>>       ssize_t ret;
>> -    Error *err = NULL;
>>   -
>> -    load_elf_hdr(info->kernel_filename, &elf_header, &elf_is64, &err);
>> -    if (err) {
>> +    if (!load_elf_hdr(info->kernel_filename, &elf_header, &elf_is64, 
>> NULL)) {
>>           /*
>>            * If the file is not an ELF file we silently return.
>>            * The caller will fall back to try other formats.
>>            */
>> -        error_free(err);
>>           return -1;
>>       }
>>   diff --git a/hw/core/loader.c b/hw/core/loader.c
>> index 590c5b02aa..10687fe1c8 100644
>> --- a/hw/core/loader.c
>> +++ b/hw/core/loader.c
>> @@ -364,8 +364,9 @@ const char *load_elf_strerror(ssize_t error)
>>       }
>>   }
>>   -void load_elf_hdr(const char *filename, void *hdr, bool *is64, Error 
>> **errp)
>> +bool load_elf_hdr(const char *filename, void *hdr, bool *is64, Error 
>> **errp)
>>   {
>> +    bool ok = false;
>>       int fd;
>>       uint8_t e_ident_local[EI_NIDENT];
>>       uint8_t *e_ident;
>> @@ -380,7 +381,7 @@ void load_elf_hdr(const char *filename, void *hdr, bool 
>> *is64, Error **errp)
>>       fd = open(filename, O_RDONLY | O_BINARY);
>>       if (fd < 0) {
>>           error_setg_errno(errp, errno, "Failed to open file: %s", 
>> filename);
>> -        return;
>> +        return false;
>>       }
>>       if (read(fd, hdr, EI_NIDENT) != EI_NIDENT) {
>>           error_setg_errno(errp, errno, "Failed to read file: %s", 
>> filename);
>> @@ -415,8 +416,11 @@ void load_elf_hdr(const char *filename, void *hdr, 
>> bool *is64, Error **errp)
>>           off += br;
>>       }
>>   +    ok = true;
>> +
>>   fail:
>>       close(fd);
>> +    return ok;
>>   }
>>     /* return < 0 if error, otherwise the number of bytes loaded in memory 
>> */
>> diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
>> index b0bab3fe00..8531e1d121 100644
>> --- a/hw/riscv/spike.c
>> +++ b/hw/riscv/spike.c
>> @@ -180,15 +180,7 @@ static void create_fdt(SpikeState *s, const 
>> MemMapEntry *memmap,
>>     static bool spike_test_elf_image(char *filename)
>>   {
>> -    Error *err = NULL;
>> -
>> -    load_elf_hdr(filename, NULL, NULL, &err);
>> -    if (err) {
>> -        error_free(err);
>> -        return false;
>> -    } else {
>> -        return true;
>> -    }
>> +    return load_elf_hdr(filename, NULL, NULL, NULL);

Does it worth to keep this function or could just be inlined at the two 
callers now that it's equivalent with load_elf_hdr?

Regards,
BALATON Zoltan


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Date: Thu, 20 Nov 2025 14:06:39 +0100
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Subject: Re: [PATCH 04/12] x86/irq: set accurate cpu_mask for high priority
 vectors used by external interrupts
To: Roger Pau Monne 
Cc: Andrew Cooper , xen-devel@lists.xenproject.org
References: <20251120090637.25087-1-roger.pau@citrix.com>
 <20251120090637.25087-5-roger.pau@citrix.com>
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From: Jan Beulich 
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On 20.11.2025 10:06, Roger Pau Monne wrote:
> Setting the irq descriptor target CPU mask of high priority interrupts to
> contain all online CPUs is not accurate.  External interrupts are
> exclusively delivered using physical destination mode, and hence can only
> target a single CPU.  Setting the descriptor CPU mask to contain all online
> CPUs makes it impossible for Xen to figure out which CPU the interrupt is
> really targeting.
> 
> Instead handle high priority vectors used by external interrupts similarly
> to normal vectors, keeping the target CPU mask accurate.  Introduce
> specific code in _assign_irq_vector() to deal with moving high priority
> vectors across CPUs, this is needed at least for fixup_irqs() to be able to
> evacuate those if the target CPU goes offline.
> 
> Fixes: fc0c3fa2ad5c ("x86/IO-APIC: fix setup of Xen internally used IRQs (take 2)")
> Signed-off-by: Roger Pau Monné 

Reviewed-by: Jan Beulich 
with one further request:

> @@ -756,12 +770,10 @@ void setup_vector_irq(unsigned int cpu)
>          if ( !irq_desc_initialized(desc) )
>              continue;
>          vector = irq_to_vector(irq);
> -        if ( vector >= FIRST_HIPRIORITY_VECTOR &&
> -             vector <= LAST_HIPRIORITY_VECTOR )
> -            cpumask_set_cpu(cpu, desc->arch.cpu_mask);
> -        else if ( !cpumask_test_cpu(cpu, desc->arch.cpu_mask) )
> -            continue;
> -        per_cpu(vector_irq, cpu)[vector] = irq;
> +        if ( (vector >= FIRST_HIPRIORITY_VECTOR &&
> +              vector <= LAST_HIPRIORITY_VECTOR) ||
> +             cpumask_test_cpu(cpu, desc->arch.cpu_mask) )
> +            per_cpu(vector_irq, cpu)[vector] = irq;

Going beyond desc->arch.cpu_mask for hiprio vectors may deserve a comment here. When
the vector is global, this is necessary. But for e.g. the serial IRQ (which still
moves, but isn't bound to multiple CPUs, the more normal way of respecting
desc->arch.cpu_mask would be sufficient. It is merely (largely) benign if we set
vector_irq[] also for other CPUs. "Largely" because strictly speaking if that vector
triggered on the wrong CPU for whatever reason, we rather shouldn't treat it as a
legitimate interrupt.

Jan


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Date: Thu, 20 Nov 2025 13:18:37 +0000
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Subject: Re: [PATCH 05/12] x86/io-apic: purge usage of logical mode
To: Roger Pau Monne , xen-devel@lists.xenproject.org
Cc: Jan Beulich 
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 <20251120090637.25087-6-roger.pau@citrix.com>
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On 20/11/2025 9:06 am, Roger Pau Monne wrote:
> The IO-APIC RTEs are unconditionally programmed with physical destination
> mode, and hence the field to set in the RTE is always physical_dest.
>
> Remove the mode parameter from SET_DEST() and take the opportunity to
> convert it into a function, there's no need for it to be a macro.
>
> This is a benign fix, because due to the endianness of x86 the start of the
> physical_dest and logical_dest fields on the RTE overlap.

RTEs do not have overlapping fields; it's Xen's abstraction of the
IO-APIC which is buggy.

For starters, Xen's IO_APIC_route_entry still only has a 4-bit
physical_dest field which hasn't been true since the Pentium 4 days. 
This might explain some of the interrupt bugs we see.

~Andrew


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On 2025-11-20 05:42, Grygorii Strashko wrote:
> Hi Jan,
> 
> On 20.11.25 10:50, Jan Beulich wrote:
>> (adding v8 tag to subject)
>>
>> On 19.11.2025 20:32, Grygorii Strashko wrote:
>>> From: Sergiy Kibrik 
>>>
>>> Add config option VIRIDIAN that covers viridian code within HVM.
>>> Calls to viridian functions guarded by is_viridian_domain() and 
>>> related macros.
>>> Having this option may be beneficial by reducing code footprint for 
>>> systems
>>> that are not using Hyper-V.
>>>
>>> [grygorii_strashko@epam.com: fixed NULL pointer deref in
>>> viridian_save_domain_ctxt(); stub viridian_vcpu/domain_init/deinit()]
>>> Signed-off-by: Sergiy Kibrik 
>>> Signed-off-by: Grygorii Strashko 
>>> Reviewed-by: Jason Andryuk 
>>
>> As before - this R-b likely would need dropping, ...
>>
>>> ---
>>> changes in v8:
>>> - drop checks from viridian_load_vcpu/domain_ctxt()
>>> - drop check "value != 0" in HVM_PARAM_VIRIDIAN handler, laways return
>>>    -ENODEV for VIRIDIAN=n
>>
>> ... when more than just cosmetic changes are made. Jason, please can you
>> indicate whether it's fine to retain?

Yes.

Reviewed-by: Jason Andryuk 

Thanks,
Jason


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In-Reply-To: 
From: Frediano Ziglio 
Date: Thu, 20 Nov 2025 13:59:24 +0000
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Message-ID: 
Subject: Re: [PATCH v8] xen: Strip xen.efi by default
To: Andrew Cooper 
Cc: Oleksii Kurochko , 
	Frediano Ziglio , xen-devel@lists.xenproject.org, 
	Frediano Ziglio , Anthony PERARD , 
	Michal Orzel , Jan Beulich , Julien Grall , 
	=?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
	Stefano Stabellini , Demi Marie Obenour , 
	=?UTF-8?Q?Marek_Marczykowski=2DG=C3=B3recki?= , 
	Stewart Hildebrand 
Content-Type: text/plain; charset="UTF-8"

On Sat, 15 Nov 2025 at 06:23, Frediano Ziglio  wrote:
>
> On Fri, 14 Nov 2025 at 19:18, Andrew Cooper  wrote:
> >
> > On 14/11/2025 3:40 pm, Oleksii Kurochko wrote:
> > >
> > >
> > > On 11/13/25 4:43 PM, Frediano Ziglio wrote:
> > >> From: Frediano Ziglio 
> > >>
> > >> For xen.gz file we strip all symbols and have an additional
> > >> xen-syms.efi file version with all symbols.
> > >> Make xen.efi more coherent stripping all symbols too.
> > >> xen-syms.efi can be used for debugging.
> > >>
> > >> Signed-off-by: Frediano Ziglio 
> > > Release-Acked-By: Oleksii Kurochko 
> > >
> > > Thanks.
> >
> > Thanks.  Unfortunately CI says no.
> >
> > Ubuntu's 20.04, 18.04 and 16.04 all fail:
> > https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2159622869
> >
> > From 16.04:
> >
> > 2025-11-14T18:01:51.192964Z 01O strip xen-syms.efi -o xen.efi
> > 2025-11-14T18:01:51.198151Z 01O strip:xen-syms.efi[.init]: relocation count is negative: File truncated
> > 2025-11-14T18:01:51.198166Z 01O strip: xen.efi: Failed to read debug data section
> > 2025-11-14T18:01:51.198169Z 01O strip:xen.efi: error copying private BFD data: File truncated
> > 2025-11-14T18:01:51.198932Z 01O arch/x86/Makefile:207: recipe for target 'xen.efi' failed
> > 2025-11-14T18:01:51.198937Z 01O make[3]: *** [xen.efi] Error 1
> > 2025-11-14T18:01:51.199616Z 01O build.mk:90: recipe for target 'xen' failed
> > 2025-11-14T18:01:51.199619Z 01O make[2]: *** [xen] Error 2
> > 2025-11-14T18:01:51.200402Z 01O Makefile:600: recipe for target 'xen' failed
> > 2025-11-14T18:01:51.200409Z 01O make[1]: *** [xen] Error 2
> >
> >
> > I find it hard to believe that the relocation count is really negative,
> > and given that newer binuitls works, I expect this is a binutils bug.
> >
>
> Unless the message is just misleading I find it hard to have a
> negative number of items in a container.
>
> > Nevertheless, we need some workaround.  Given that the previous
> > behaviour was not to strip, I think we can reuse that for broken toolchains?
> >
>
> Something like that ?
>
> diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
> index a154ffe6b2..c465eb12e2 100644
> --- a/xen/arch/x86/Makefile
> +++ b/xen/arch/x86/Makefile
> @@ -236,7 +236,9 @@ ifeq ($(CONFIG_DEBUG_INFO),y)
>         $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) \
>                 -O elf64-x86-64 $(TARGET)-syms.efi $@.elf
>  endif
> -       $(STRIP) $(TARGET)-syms.efi -o $@
> +       $(STRIP) $(TARGET)-syms.efi -o $@ || { \
> +               LANG=C strip $(TARGET)-syms.efi -o $@ 2>&1 | grep -q \
> +               "relocation count is negative" && mv -f $(TARGET)-syms.efi $@; }
>  ifneq ($(CONFIG_DEBUG_INFO),y)
>         rm -f $(TARGET)-syms.efi
>  endif
>
> It will fall back to not stripping in case that bug is detected. I
> don't know how to test it.
> (the LANG=C is to always force the English message).
>

It looks like this change works better and CI is happy.
It duplicates the linking with -s option if the strip fails.
Yes, it's a hack and almost duplicates the one command above.
What about it?

diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
index a154ffe6b2..5f5162841e 100644
--- a/xen/arch/x86/Makefile
+++ b/xen/arch/x86/Makefile
@@ -236,7 +236,10 @@ ifeq ($(CONFIG_DEBUG_INFO),y)
        $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) \
                -O elf64-x86-64 $(TARGET)-syms.efi $@.elf
 endif
-       $(STRIP) $(TARGET)-syms.efi -o $@
+       $(STRIP) $(TARGET)-syms.efi -o $@ || \
+       $(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds $< \
+             $(dot-target).1r.o $(dot-target).1s.o $(orphan-handling-y) \
+             $(note_file_option) -s -o $@
 ifneq ($(CONFIG_DEBUG_INFO),y)
        rm -f $(TARGET)-syms.efi
 endif

Frediano


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Subject: Re: [PATCH 4/4] x86/vPMU: don't statically reserve the interrupt
 vector
From: Jan Beulich 
To: Andrew Cooper 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 20.11.2025 13:31, Jan Beulich wrote:
> On 20.11.2025 13:24, Andrew Cooper wrote:
>> On 19/11/2025 10:51 am, Jan Beulich wrote:
>>> --- a/xen/arch/x86/apic.c
>>> +++ b/xen/arch/x86/apic.c
>>> @@ -1313,16 +1313,6 @@ static void cf_check error_interrupt(voi
>>>             entries[3], entries[2], entries[1], entries[0]);
>>>  }
>>>  
>>> -/*
>>> - * This interrupt handles performance counters interrupt
>>> - */
>>> -
>>> -static void cf_check pmu_interrupt(void)
>>> -{
>>> -    ack_APIC_irq();
>>> -    vpmu_do_interrupt();
>>> -}
>>> -
>>
>> I know you're only moving this, but it's likely-buggy before and after. 
>> ack_APIC_irq() needs to be last, and Xen's habit for acking early is why
>> we have reentrancy problems.
> 
> I was wondering, but was vaguely (but apparently wrongly) remembering that
> the PMU interrupt is self-disabling (i.e. requires re-enabling before it
> can fire again). Should have checked vpmu_do_interrupt() a little more
> closely, where from the various plain "return" it's pretty clear that isn't
> the case.
> 
>> I think there wants to be a patch ahead of this one swapping the order
>> so the ack is at the end, so that this patch can retain that property
>> when merging the functions.
>>
>> Or, if you're absolutely certain it doesn't need backporting as a
>> bugfix, then merging into this patch is probably ok as long as it's
>> called out clearly in the commit message.
> 
> No, I'll make this a separate, prereq patch.

It won't really need backporting, though: Direct-APIC-vector handlers are
called with IRQs off, and hence when to ack is benign as long as IRQs aren't
transiently turned on while handling. Nevertheless it probably makes sense
to switch things around, so I'll add that extra patch anyway.

Jan


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Date: Thu, 20 Nov 2025 15:04:48 +0100
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Subject: Re: [PATCH v8] xen: Strip xen.efi by default
To: Frediano Ziglio 
Cc: Oleksii Kurochko ,
 Frediano Ziglio ,
 xen-devel@lists.xenproject.org, Frediano Ziglio ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Demi Marie Obenour ,
 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 ,
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References: <20251113154358.28704-1-frediano.ziglio@citrix.com>
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On 20.11.2025 14:59, Frediano Ziglio wrote:
> On Sat, 15 Nov 2025 at 06:23, Frediano Ziglio  wrote:
>>
>> On Fri, 14 Nov 2025 at 19:18, Andrew Cooper  wrote:
>>>
>>> On 14/11/2025 3:40 pm, Oleksii Kurochko wrote:
>>>>
>>>>
>>>> On 11/13/25 4:43 PM, Frediano Ziglio wrote:
>>>>> From: Frediano Ziglio 
>>>>>
>>>>> For xen.gz file we strip all symbols and have an additional
>>>>> xen-syms.efi file version with all symbols.
>>>>> Make xen.efi more coherent stripping all symbols too.
>>>>> xen-syms.efi can be used for debugging.
>>>>>
>>>>> Signed-off-by: Frediano Ziglio 
>>>> Release-Acked-By: Oleksii Kurochko 
>>>>
>>>> Thanks.
>>>
>>> Thanks.  Unfortunately CI says no.
>>>
>>> Ubuntu's 20.04, 18.04 and 16.04 all fail:
>>> https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2159622869
>>>
>>> From 16.04:
>>>
>>> 2025-11-14T18:01:51.192964Z 01O strip xen-syms.efi -o xen.efi
>>> 2025-11-14T18:01:51.198151Z 01O strip:xen-syms.efi[.init]: relocation count is negative: File truncated
>>> 2025-11-14T18:01:51.198166Z 01O strip: xen.efi: Failed to read debug data section
>>> 2025-11-14T18:01:51.198169Z 01O strip:xen.efi: error copying private BFD data: File truncated
>>> 2025-11-14T18:01:51.198932Z 01O arch/x86/Makefile:207: recipe for target 'xen.efi' failed
>>> 2025-11-14T18:01:51.198937Z 01O make[3]: *** [xen.efi] Error 1
>>> 2025-11-14T18:01:51.199616Z 01O build.mk:90: recipe for target 'xen' failed
>>> 2025-11-14T18:01:51.199619Z 01O make[2]: *** [xen] Error 2
>>> 2025-11-14T18:01:51.200402Z 01O Makefile:600: recipe for target 'xen' failed
>>> 2025-11-14T18:01:51.200409Z 01O make[1]: *** [xen] Error 2
>>>
>>>
>>> I find it hard to believe that the relocation count is really negative,
>>> and given that newer binuitls works, I expect this is a binutils bug.
>>>
>>
>> Unless the message is just misleading I find it hard to have a
>> negative number of items in a container.
>>
>>> Nevertheless, we need some workaround.  Given that the previous
>>> behaviour was not to strip, I think we can reuse that for broken toolchains?
>>>
>>
>> Something like that ?
>>
>> diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
>> index a154ffe6b2..c465eb12e2 100644
>> --- a/xen/arch/x86/Makefile
>> +++ b/xen/arch/x86/Makefile
>> @@ -236,7 +236,9 @@ ifeq ($(CONFIG_DEBUG_INFO),y)
>>         $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) \
>>                 -O elf64-x86-64 $(TARGET)-syms.efi $@.elf
>>  endif
>> -       $(STRIP) $(TARGET)-syms.efi -o $@
>> +       $(STRIP) $(TARGET)-syms.efi -o $@ || { \
>> +               LANG=C strip $(TARGET)-syms.efi -o $@ 2>&1 | grep -q \
>> +               "relocation count is negative" && mv -f $(TARGET)-syms.efi $@; }
>>  ifneq ($(CONFIG_DEBUG_INFO),y)
>>         rm -f $(TARGET)-syms.efi
>>  endif
>>
>> It will fall back to not stripping in case that bug is detected. I
>> don't know how to test it.
>> (the LANG=C is to always force the English message).
>>
> 
> It looks like this change works better and CI is happy.
> It duplicates the linking with -s option if the strip fails.
> Yes, it's a hack and almost duplicates the one command above.
> What about it?

As alluded to elsewhere - can't we detect the situation and avoid linking
with debug info included in that case, like we already do for other reasons?
Linking xen.efi is quite a bit slower than linking xen-syms, so the extra
linking pass would better be avoided imo.

Jan

> --- a/xen/arch/x86/Makefile
> +++ b/xen/arch/x86/Makefile
> @@ -236,7 +236,10 @@ ifeq ($(CONFIG_DEBUG_INFO),y)
>         $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) \
>                 -O elf64-x86-64 $(TARGET)-syms.efi $@.elf
>  endif
> -       $(STRIP) $(TARGET)-syms.efi -o $@
> +       $(STRIP) $(TARGET)-syms.efi -o $@ || \
> +       $(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds $< \
> +             $(dot-target).1r.o $(dot-target).1s.o $(orphan-handling-y) \
> +             $(note_file_option) -s -o $@
>  ifneq ($(CONFIG_DEBUG_INFO),y)
>         rm -f $(TARGET)-syms.efi
>  endif
> 
> Frediano



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Date: Thu, 20 Nov 2025 15:05:00 +0100
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Frediano Ziglio 
Cc: Andrew Cooper ,
	Oleksii Kurochko ,
	Frediano Ziglio ,
	xen-devel@lists.xenproject.org,
	Frediano Ziglio ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich , Julien Grall ,
	Roger Pau =?utf-8?B?TW9ubsOp?= ,
	Stefano Stabellini ,
	Demi Marie Obenour ,
	Stewart Hildebrand 
Subject: Re: [PATCH v8] xen: Strip xen.efi by default
Message-ID: 
References: <20251113154358.28704-1-frediano.ziglio@citrix.com>
 <6729f3d9-618c-4dcd-93f8-d02ca7cea017@gmail.com>
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Date: Thu, 20 Nov 2025 15:05:00 +0100
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Frediano Ziglio 
Cc: Andrew Cooper ,
	Oleksii Kurochko ,
	Frediano Ziglio ,
	xen-devel@lists.xenproject.org,
	Frediano Ziglio ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich , Julien Grall ,
	Roger Pau =?utf-8?B?TW9ubsOp?= ,
	Stefano Stabellini ,
	Demi Marie Obenour ,
	Stewart Hildebrand 
Subject: Re: [PATCH v8] xen: Strip xen.efi by default

On Thu, Nov 20, 2025 at 01:59:24PM +0000, Frediano Ziglio wrote:
> On Sat, 15 Nov 2025 at 06:23, Frediano Ziglio  wrote:
> >
> > On Fri, 14 Nov 2025 at 19:18, Andrew Cooper =
 wrote:
> > >
> > > On 14/11/2025 3:40 pm, Oleksii Kurochko wrote:
> > > >
> > > >
> > > > On 11/13/25 4:43 PM, Frediano Ziglio wrote:
> > > >> From: Frediano Ziglio 
> > > >>
> > > >> For xen.gz file we strip all symbols and have an additional
> > > >> xen-syms.efi file version with all symbols.
> > > >> Make xen.efi more coherent stripping all symbols too.
> > > >> xen-syms.efi can be used for debugging.
> > > >>
> > > >> Signed-off-by: Frediano Ziglio 
> > > > Release-Acked-By: Oleksii Kurochko 
> > > >
> > > > Thanks.
> > >
> > > Thanks.  Unfortunately CI says no.
> > >
> > > Ubuntu's 20.04, 18.04 and 16.04 all fail:
> > > https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/21596=
22869
> > >
> > > From 16.04:
> > >
> > > 2025-11-14T18:01:51.192964Z 01O strip xen-syms.efi -o xen.efi
> > > 2025-11-14T18:01:51.198151Z 01O strip:xen-syms.efi[.init]: relocation=
 count is negative: File truncated
> > > 2025-11-14T18:01:51.198166Z 01O strip: xen.efi: Failed to read debug =
data section
> > > 2025-11-14T18:01:51.198169Z 01O strip:xen.efi: error copying private =
BFD data: File truncated
> > > 2025-11-14T18:01:51.198932Z 01O arch/x86/Makefile:207: recipe for tar=
get 'xen.efi' failed
> > > 2025-11-14T18:01:51.198937Z 01O make[3]: *** [xen.efi] Error 1
> > > 2025-11-14T18:01:51.199616Z 01O build.mk:90: recipe for target 'xen' =
failed
> > > 2025-11-14T18:01:51.199619Z 01O make[2]: *** [xen] Error 2
> > > 2025-11-14T18:01:51.200402Z 01O Makefile:600: recipe for target 'xen'=
 failed
> > > 2025-11-14T18:01:51.200409Z 01O make[1]: *** [xen] Error 2
> > >
> > >
> > > I find it hard to believe that the relocation count is really negativ=
e,
> > > and given that newer binuitls works, I expect this is a binutils bug.
> > >
> >
> > Unless the message is just misleading I find it hard to have a
> > negative number of items in a container.
> >
> > > Nevertheless, we need some workaround.  Given that the previous
> > > behaviour was not to strip, I think we can reuse that for broken tool=
chains?
> > >
> >
> > Something like that ?
> >
> > diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
> > index a154ffe6b2..c465eb12e2 100644
> > --- a/xen/arch/x86/Makefile
> > +++ b/xen/arch/x86/Makefile
> > @@ -236,7 +236,9 @@ ifeq ($(CONFIG_DEBUG_INFO),y)
> >         $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY=
) \
> >                 -O elf64-x86-64 $(TARGET)-syms.efi $@.elf
> >  endif
> > -       $(STRIP) $(TARGET)-syms.efi -o $@
> > +       $(STRIP) $(TARGET)-syms.efi -o $@ || { \
> > +               LANG=3DC strip $(TARGET)-syms.efi -o $@ 2>&1 | grep -q \
> > +               "relocation count is negative" && mv -f $(TARGET)-syms.=
efi $@; }
> >  ifneq ($(CONFIG_DEBUG_INFO),y)
> >         rm -f $(TARGET)-syms.efi
> >  endif
> >
> > It will fall back to not stripping in case that bug is detected. I
> > don't know how to test it.
> > (the LANG=3DC is to always force the English message).
> >
>=20
> It looks like this change works better and CI is happy.
> It duplicates the linking with -s option if the strip fails.
> Yes, it's a hack and almost duplicates the one command above.
> What about it?

Is it guaranteed to match xen-syms.efi?

There is an alternative option: based on observation that Ubuntu 16.04
runs out of support in April 2026 - which is before Xen 4.22 release,
maybe we can drop that test from CI already?

> diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
> index a154ffe6b2..5f5162841e 100644
> --- a/xen/arch/x86/Makefile
> +++ b/xen/arch/x86/Makefile
> @@ -236,7 +236,10 @@ ifeq ($(CONFIG_DEBUG_INFO),y)
>         $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) \
>                 -O elf64-x86-64 $(TARGET)-syms.efi $@.elf
>  endif
> -       $(STRIP) $(TARGET)-syms.efi -o $@
> +       $(STRIP) $(TARGET)-syms.efi -o $@ || \
> +       $(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds $< \
> +             $(dot-target).1r.o $(dot-target).1s.o $(orphan-handling-y) \
> +             $(note_file_option) -s -o $@
>  ifneq ($(CONFIG_DEBUG_INFO),y)
>         rm -f $(TARGET)-syms.efi
>  endif
>=20
> Frediano

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Subject: Re: [PATCH] xen: Fix EFI buildid alignment
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On 20/11/2025 1:33 am, Marek Marczykowski-Górecki wrote:
> On Thu, Nov 20, 2025 at 12:43:57AM +0000, Andrew Cooper wrote:
>> On 19/11/2025 7:12 pm, Marek Marczykowski-Górecki wrote:
>>> Old binutils get confused about .buildid overlapping (in VA space) with
>>> earlier section. That confusion results in weird errors down the road,
>>> like this one:
>>>
>>>     objcopy: xen.efi: Data Directory size (1c) exceeds space left in section (8)
>>>
>>> While the bug is fixed in later binutils version, force alignment of the
>>> buildid to avoid overlapping and make it work with older versions too.
>>> This can be reverted once toolchain base is raised at or above binutils
>>> 2.36.
>>>
>>> Details at:
>>> https://lore.kernel.org/all/3TMd7J2u5gCA8ouIG_Xfcw7s5JKMG06XsDIesEB3Fi9htUJ43Lfl057wXohlpCHcszqoCmicpIlneEDO26ZqT8QfC2Y39VxBuqD3nS1j5Q4=@trmm.net/
>>>
>>> Signed-off-by: Marek Marczykowski-Górecki 
>>> Fixes: eee5909e9d1e ("x86/EFI: use less crude a way of generating the build ID")
>> We typically put these tags in the other order.  I can fix on commit.
>>
>> Reviewed-by: Andrew Cooper , although...
>>
>>> ---
>>> While the actual bug apparently is in binutils, the commit mentioned in
>>> Fixes: tag introduced part that triggers that bug.
>>> ---
>>>  xen/arch/x86/xen.lds.S | 2 ++
>>>  1 file changed, 2 insertions(+)
>>>
>>> diff --git a/xen/arch/x86/xen.lds.S b/xen/arch/x86/xen.lds.S
>>> index 5d02f83a409c..967f9167f757 100644
>>> --- a/xen/arch/x86/xen.lds.S
>>> +++ b/xen/arch/x86/xen.lds.S
>>> @@ -171,6 +171,8 @@ SECTIONS
>>>         __note_gnu_build_id_end = .;
>>>    } PHDR(note) PHDR(text)
>>>  #elif defined(BUILD_ID_EFI)
>>> +  /* Workaround bug in binutils < 2.38 */
>> ... this says 2.38, but the commit message says 2.36.  Which one is it?
> 2.36

Thanks.  I'll adjust on commit.

~Andrew


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Subject: Re: [PATCH 05/12] x86/io-apic: purge usage of logical mode
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In-Reply-To: <63a4f416-f475-4b6b-8f44-db570b7a75d9@citrix.com>
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On 20.11.2025 14:18, Andrew Cooper wrote:
> On 20/11/2025 9:06 am, Roger Pau Monne wrote:
>> The IO-APIC RTEs are unconditionally programmed with physical destination
>> mode, and hence the field to set in the RTE is always physical_dest.
>>
>> Remove the mode parameter from SET_DEST() and take the opportunity to
>> convert it into a function, there's no need for it to be a macro.
>>
>> This is a benign fix, because due to the endianness of x86 the start of the
>> physical_dest and logical_dest fields on the RTE overlap.
> 
> RTEs do not have overlapping fields; it's Xen's abstraction of the
> IO-APIC which is buggy.

I wouldn't put it this negatively. In the old days, ...

> For starters, Xen's IO_APIC_route_entry still only has a 4-bit
> physical_dest field which hasn't been true since the Pentium 4 days. 
> This might explain some of the interrupt bugs we see.

... as you mention here, the two fields were distinct (and hence overlapping).
In a number of places we passed "logical" to SET_DEST() as the middle argument,
thus covering for the too narrow field width of physical_dest. Dropping that
parameter and always using physical_dest requires that field to be widened,
though (or else we'll end up chopping off the top 4 bits, as we already do in
disable_IO_APIC() and unlock_ExtINT_logic() - both benign as long as the CPU
used always has APIC ID 0, which will at least typically be the case, I think).

Jan


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Date: Thu, 20 Nov 2025 22:53:30 +0800
From: Zhao Liu 
To: Markus Armbruster 
Cc: qemu-devel@nongnu.org, kwolf@redhat.com, hreitz@redhat.com,
	mst@redhat.com, imammedo@redhat.com, anisinha@redhat.com,
	gengdongjiu1@gmail.com, peter.maydell@linaro.org,
	alistair@alistair23.me, edgar.iglesias@gmail.com, npiggin@gmail.com,
	harshpb@linux.ibm.com, palmer@dabbelt.com, liwei1518@gmail.com,
	dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com,
	sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
	berrange@redhat.com, peterx@redhat.com, farosas@suse.de,
	eblake@redhat.com, vsementsov@yandex-team.ru, eduardo@habkost.net,
	marcel.apfelbaum@gmail.com, philmd@linaro.org,
	wangyanan55@huawei.com, qemu-block@nongnu.org, qemu-arm@nongnu.org,
	qemu-ppc@nongnu.org, qemu-riscv@nongnu.org,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH 1/5] hw/core/loader: Make load_elf_hdr() return bool,
 simplify caller
Message-ID: 
References: <20251119130855.105479-1-armbru@redhat.com>
 <20251119130855.105479-2-armbru@redhat.com>
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On Wed, Nov 19, 2025 at 02:08:51PM +0100, Markus Armbruster wrote:
> Date: Wed, 19 Nov 2025 14:08:51 +0100
> From: Markus Armbruster 
> Subject: [PATCH 1/5] hw/core/loader: Make load_elf_hdr() return bool,
>  simplify caller
> 
> Signed-off-by: Markus Armbruster 
> ---
>  include/hw/loader.h |  4 +++-
>  hw/arm/boot.c       |  6 +-----
>  hw/core/loader.c    |  8 ++++++--
>  hw/riscv/spike.c    | 10 +---------
>  4 files changed, 11 insertions(+), 17 deletions(-)

Reviewed-by: Zhao Liu 



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In-Reply-To: 
From: Frediano Ziglio 
Date: Thu, 20 Nov 2025 14:32:20 +0000
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Subject: Re: [PATCH v8] xen: Strip xen.efi by default
To: =?UTF-8?Q?Marek_Marczykowski=2DG=C3=B3recki?= 
Cc: Andrew Cooper , 
	Oleksii Kurochko , Frediano Ziglio , 
	xen-devel@lists.xenproject.org, Frediano Ziglio , 
	Anthony PERARD , Michal Orzel , 
	Jan Beulich , Julien Grall , 
	=?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
	Stefano Stabellini , Demi Marie Obenour , 
	Stewart Hildebrand 
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On Thu, 20 Nov 2025 at 14:05, Marek Marczykowski-G=C3=B3recki
 wrote:
>
> On Thu, Nov 20, 2025 at 01:59:24PM +0000, Frediano Ziglio wrote:
> > On Sat, 15 Nov 2025 at 06:23, Frediano Ziglio  wrot=
e:
> > >
> > > On Fri, 14 Nov 2025 at 19:18, Andrew Cooper  wrote:
> > > >
> > > > On 14/11/2025 3:40 pm, Oleksii Kurochko wrote:
> > > > >
> > > > >
> > > > > On 11/13/25 4:43 PM, Frediano Ziglio wrote:
> > > > >> From: Frediano Ziglio 
> > > > >>
> > > > >> For xen.gz file we strip all symbols and have an additional
> > > > >> xen-syms.efi file version with all symbols.
> > > > >> Make xen.efi more coherent stripping all symbols too.
> > > > >> xen-syms.efi can be used for debugging.
> > > > >>
> > > > >> Signed-off-by: Frediano Ziglio 
> > > > > Release-Acked-By: Oleksii Kurochko 
> > > > >
> > > > > Thanks.
> > > >
> > > > Thanks.  Unfortunately CI says no.
> > > >
> > > > Ubuntu's 20.04, 18.04 and 16.04 all fail:
> > > > https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/215=
9622869
> > > >
> > > > From 16.04:
> > > >
> > > > 2025-11-14T18:01:51.192964Z 01O strip xen-syms.efi -o xen.efi
> > > > 2025-11-14T18:01:51.198151Z 01O strip:xen-syms.efi[.init]: relocati=
on count is negative: File truncated
> > > > 2025-11-14T18:01:51.198166Z 01O strip: xen.efi: Failed to read debu=
g data section
> > > > 2025-11-14T18:01:51.198169Z 01O strip:xen.efi: error copying privat=
e BFD data: File truncated
> > > > 2025-11-14T18:01:51.198932Z 01O arch/x86/Makefile:207: recipe for t=
arget 'xen.efi' failed
> > > > 2025-11-14T18:01:51.198937Z 01O make[3]: *** [xen.efi] Error 1
> > > > 2025-11-14T18:01:51.199616Z 01O build.mk:90: recipe for target 'xen=
' failed
> > > > 2025-11-14T18:01:51.199619Z 01O make[2]: *** [xen] Error 2
> > > > 2025-11-14T18:01:51.200402Z 01O Makefile:600: recipe for target 'xe=
n' failed
> > > > 2025-11-14T18:01:51.200409Z 01O make[1]: *** [xen] Error 2
> > > >
> > > >
> > > > I find it hard to believe that the relocation count is really negat=
ive,
> > > > and given that newer binuitls works, I expect this is a binutils bu=
g.
> > > >
> > >
> > > Unless the message is just misleading I find it hard to have a
> > > negative number of items in a container.
> > >
> > > > Nevertheless, we need some workaround.  Given that the previous
> > > > behaviour was not to strip, I think we can reuse that for broken to=
olchains?
> > > >
> > >
> > > Something like that ?
> > >
> > > diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
> > > index a154ffe6b2..c465eb12e2 100644
> > > --- a/xen/arch/x86/Makefile
> > > +++ b/xen/arch/x86/Makefile
> > > @@ -236,7 +236,9 @@ ifeq ($(CONFIG_DEBUG_INFO),y)
> > >         $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCO=
PY) \
> > >                 -O elf64-x86-64 $(TARGET)-syms.efi $@.elf
> > >  endif
> > > -       $(STRIP) $(TARGET)-syms.efi -o $@
> > > +       $(STRIP) $(TARGET)-syms.efi -o $@ || { \
> > > +               LANG=3DC strip $(TARGET)-syms.efi -o $@ 2>&1 | grep -=
q \
> > > +               "relocation count is negative" && mv -f $(TARGET)-sym=
s.efi $@; }
> > >  ifneq ($(CONFIG_DEBUG_INFO),y)
> > >         rm -f $(TARGET)-syms.efi
> > >  endif
> > >
> > > It will fall back to not stripping in case that bug is detected. I
> > > don't know how to test it.
> > > (the LANG=3DC is to always force the English message).
> > >
> >
> > It looks like this change works better and CI is happy.
> > It duplicates the linking with -s option if the strip fails.
> > Yes, it's a hack and almost duplicates the one command above.
> > What about it?
>
> Is it guaranteed to match xen-syms.efi?
>
> There is an alternative option: based on observation that Ubuntu 16.04
> runs out of support in April 2026 - which is before Xen 4.22 release,
> maybe we can drop that test from CI already?
>

That would work too.

Looking a bit more at the logs from
https://gitlab.com/xen-project/people/fziglio/xen/-/jobs/12158955130/viewer
there's something that worries me about.
I added "ls -l" and "objdump -x" of the output file and objdump is
complaining about relocations more or less the same strip was
complaining about:

    RELOCATION RECORDS FOR [.init]:
    objdump: failed to read relocs in: xen-syms.efi
    objdump: error message was: File truncated

not counting some weird relocations:

    reloc 2060 offset    0 [a4b8a4b0] UNKNOWN

    reloc 2294 offset    0 [a4b8a4b0] HIGHADJ (  80)

    reloc 2348 offset    0 [a4b8a4b0] SECTION

    reloc 2372 offset    0 [a4b8a4b0] RESERVED1

    reloc 2730 offset    0 [a4b8a4b0] MIPS_JMPADDR

Maybe the CI now is happy but there's not much point if the produced
files are not working.

> > diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
> > index a154ffe6b2..5f5162841e 100644
> > --- a/xen/arch/x86/Makefile
> > +++ b/xen/arch/x86/Makefile
> > @@ -236,7 +236,10 @@ ifeq ($(CONFIG_DEBUG_INFO),y)
> >         $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY=
) \
> >                 -O elf64-x86-64 $(TARGET)-syms.efi $@.elf
> >  endif
> > -       $(STRIP) $(TARGET)-syms.efi -o $@
> > +       $(STRIP) $(TARGET)-syms.efi -o $@ || \
> > +       $(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds $< \
> > +             $(dot-target).1r.o $(dot-target).1s.o $(orphan-handling-y=
) \
> > +             $(note_file_option) -s -o $@
> >  ifneq ($(CONFIG_DEBUG_INFO),y)
> >         rm -f $(TARGET)-syms.efi
> >  endif
> >


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Date: Thu, 20 Nov 2025 22:54:51 +0800
From: Zhao Liu 
To: Markus Armbruster 
Cc: qemu-devel@nongnu.org, kwolf@redhat.com, hreitz@redhat.com,
	mst@redhat.com, imammedo@redhat.com, anisinha@redhat.com,
	gengdongjiu1@gmail.com, peter.maydell@linaro.org,
	alistair@alistair23.me, edgar.iglesias@gmail.com, npiggin@gmail.com,
	harshpb@linux.ibm.com, palmer@dabbelt.com, liwei1518@gmail.com,
	dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com,
	sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
	berrange@redhat.com, peterx@redhat.com, farosas@suse.de,
	eblake@redhat.com, vsementsov@yandex-team.ru, eduardo@habkost.net,
	marcel.apfelbaum@gmail.com, philmd@linaro.org,
	wangyanan55@huawei.com, qemu-block@nongnu.org, qemu-arm@nongnu.org,
	qemu-ppc@nongnu.org, qemu-riscv@nongnu.org,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH 2/5] hw/nvram/xlnx-bbram: More idiomatic and simpler
 error reporting
Message-ID: 
References: <20251119130855.105479-1-armbru@redhat.com>
 <20251119130855.105479-3-armbru@redhat.com>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
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In-Reply-To: <20251119130855.105479-3-armbru@redhat.com>

On Wed, Nov 19, 2025 at 02:08:52PM +0100, Markus Armbruster wrote:
> Date: Wed, 19 Nov 2025 14:08:52 +0100
> From: Markus Armbruster 
> Subject: [PATCH 2/5] hw/nvram/xlnx-bbram: More idiomatic and simpler error
>  reporting
> 
> bbram_bdrv_error() interpolates a "detail" string into a template with
> error_setg_errno(), then reports the result with error_report().
> Produces error messages with an unwanted '.':
> 
>     BLK-NAME: BBRAM backstore DETAIL failed.: STERROR
> 
> Replace both calls of bbram_bdrv_error() by straightforward
> error_report(), and drop the function.  This is less code, easier to
> read, and the error message is more greppable.
> 
> Also delete the unwanted '.'.
> 
> Signed-off-by: Markus Armbruster 
> ---
>  hw/nvram/xlnx-bbram.c | 18 ++++--------------
>  1 file changed, 4 insertions(+), 14 deletions(-)

Reviewed-by: Zhao Liu 



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Date: Thu, 20 Nov 2025 22:55:48 +0800
From: Zhao Liu 
To: Markus Armbruster 
Cc: qemu-devel@nongnu.org, kwolf@redhat.com, hreitz@redhat.com,
	mst@redhat.com, imammedo@redhat.com, anisinha@redhat.com,
	gengdongjiu1@gmail.com, peter.maydell@linaro.org,
	alistair@alistair23.me, edgar.iglesias@gmail.com, npiggin@gmail.com,
	harshpb@linux.ibm.com, palmer@dabbelt.com, liwei1518@gmail.com,
	dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com,
	sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
	berrange@redhat.com, peterx@redhat.com, farosas@suse.de,
	eblake@redhat.com, vsementsov@yandex-team.ru, eduardo@habkost.net,
	marcel.apfelbaum@gmail.com, philmd@linaro.org,
	wangyanan55@huawei.com, qemu-block@nongnu.org, qemu-arm@nongnu.org,
	qemu-ppc@nongnu.org, qemu-riscv@nongnu.org,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH 3/5] nbd/client-connection: Replace error_propagate() by
 assignment
Message-ID: 
References: <20251119130855.105479-1-armbru@redhat.com>
 <20251119130855.105479-4-armbru@redhat.com>
MIME-Version: 1.0
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In-Reply-To: <20251119130855.105479-4-armbru@redhat.com>

On Wed, Nov 19, 2025 at 02:08:53PM +0100, Markus Armbruster wrote:
> Date: Wed, 19 Nov 2025 14:08:53 +0100
> From: Markus Armbruster 
> Subject: [PATCH 3/5] nbd/client-connection: Replace error_propagate() by
>  assignment
> 
> connect_thread_func() sets a variable to null, then error_propagate()s
> an Error * to it.  This is a roundabout way to assign the Error * to
> it, so replace it by just that.
> 
> Signed-off-by: Markus Armbruster 
> ---
>  nbd/client-connection.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)

Reviewed-by: Zhao Liu 



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Date: Thu, 20 Nov 2025 22:56:34 +0800
From: Zhao Liu 
To: Markus Armbruster 
Cc: qemu-devel@nongnu.org, kwolf@redhat.com, hreitz@redhat.com,
	mst@redhat.com, imammedo@redhat.com, anisinha@redhat.com,
	gengdongjiu1@gmail.com, peter.maydell@linaro.org,
	alistair@alistair23.me, edgar.iglesias@gmail.com, npiggin@gmail.com,
	harshpb@linux.ibm.com, palmer@dabbelt.com, liwei1518@gmail.com,
	dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com,
	sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
	berrange@redhat.com, peterx@redhat.com, farosas@suse.de,
	eblake@redhat.com, vsementsov@yandex-team.ru, eduardo@habkost.net,
	marcel.apfelbaum@gmail.com, philmd@linaro.org,
	wangyanan55@huawei.com, qemu-block@nongnu.org, qemu-arm@nongnu.org,
	qemu-ppc@nongnu.org, qemu-riscv@nongnu.org,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH 4/5] error: error_free(NULL) is safe, drop unnecessary
 conditionals
Message-ID: 
References: <20251119130855.105479-1-armbru@redhat.com>
 <20251119130855.105479-5-armbru@redhat.com>
MIME-Version: 1.0
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In-Reply-To: <20251119130855.105479-5-armbru@redhat.com>

On Wed, Nov 19, 2025 at 02:08:54PM +0100, Markus Armbruster wrote:
> Date: Wed, 19 Nov 2025 14:08:54 +0100
> From: Markus Armbruster 
> Subject: [PATCH 4/5] error: error_free(NULL) is safe, drop unnecessary
>  conditionals
> 
> Signed-off-by: Markus Armbruster 
> ---
>  hw/acpi/pcihp.c             | 4 +---
>  io/channel-websock.c        | 4 +---
>  io/task.c                   | 4 +---
>  migration/migration.c       | 6 ++----
>  tests/unit/test-smp-parse.c | 5 +----
>  5 files changed, 6 insertions(+), 17 deletions(-)

Reviewed-by: Zhao Liu 



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Date: Thu, 20 Nov 2025 22:57:36 +0800
From: Zhao Liu 
To: Markus Armbruster 
Cc: qemu-devel@nongnu.org, kwolf@redhat.com, hreitz@redhat.com,
	mst@redhat.com, imammedo@redhat.com, anisinha@redhat.com,
	gengdongjiu1@gmail.com, peter.maydell@linaro.org,
	alistair@alistair23.me, edgar.iglesias@gmail.com, npiggin@gmail.com,
	harshpb@linux.ibm.com, palmer@dabbelt.com, liwei1518@gmail.com,
	dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com,
	sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
	berrange@redhat.com, peterx@redhat.com, farosas@suse.de,
	eblake@redhat.com, vsementsov@yandex-team.ru, eduardo@habkost.net,
	marcel.apfelbaum@gmail.com, philmd@linaro.org,
	wangyanan55@huawei.com, qemu-block@nongnu.org, qemu-arm@nongnu.org,
	qemu-ppc@nongnu.org, qemu-riscv@nongnu.org,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH 5/5] error: Consistently name Error * objects err, and
 not errp
Message-ID: 
References: <20251119130855.105479-1-armbru@redhat.com>
 <20251119130855.105479-6-armbru@redhat.com>
MIME-Version: 1.0
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In-Reply-To: <20251119130855.105479-6-armbru@redhat.com>

On Wed, Nov 19, 2025 at 02:08:55PM +0100, Markus Armbruster wrote:
> Date: Wed, 19 Nov 2025 14:08:55 +0100
> From: Markus Armbruster 
> Subject: [PATCH 5/5] error: Consistently name Error * objects err, and not
>  errp
> 
> This touches code in xen_enable_tpm() that is obviously wrong.  Since
> I don't know how to fix it properly, I'm adding a FIXME there.
> 
> Signed-off-by: Markus Armbruster 
> ---
>  block/crypto.c          |  8 ++++----
>  hw/acpi/ghes.c          |  8 ++++----
>  hw/ppc/spapr.c          | 16 ++++++++--------
>  hw/xen/xen-pvh-common.c | 13 ++++++++++---
>  nbd/common.c            |  6 +++---
>  5 files changed, 29 insertions(+), 22 deletions(-)

Reviewed-by: Zhao Liu 



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From: Jason Andryuk 
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CC: Yann Sionneau ,
	, , "Jason
 Andryuk" 
Subject: [PATCH 0/2] xenbus: Fix PV devices in s3/s2idle
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The first patch fixes the issue, and the second renames some items to
match.

This was tested with s2idle in PVH and HVM guests.  Also xl save/restore
of a PVH guest.

Jason Andryuk (2):
  xenbus: Use .freeze/.thaw to handle xenbus devices
  xenbus: Rename helpers to freeze/thaw/restore

 drivers/xen/xenbus/xenbus.h                |  6 +++---
 drivers/xen/xenbus/xenbus_probe.c          | 22 +++++++++++-----------
 drivers/xen/xenbus/xenbus_probe_frontend.c | 18 ++++++++----------
 3 files changed, 22 insertions(+), 24 deletions(-)

-- 
2.34.1



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Subject: Re: [PATCH 06/12] x86/i8259: redo workaround for AMD spurious PIC
 interrupts
To: Roger Pau Monne 
Cc: Andrew Cooper , xen-devel@lists.xenproject.org
References: <20251120090637.25087-1-roger.pau@citrix.com>
 <20251120095826.25782-1-roger.pau@citrix.com>
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On 20.11.2025 10:58, Roger Pau Monne wrote:
> --- a/xen/arch/x86/i8259.c
> +++ b/xen/arch/x86/i8259.c
> @@ -407,21 +407,14 @@ void __init init_IRQ(void)
>          per_cpu(vector_irq, cpu)[LEGACY_VECTOR(irq)] = irq;
>  
>          /*
> -         * The interrupt affinity logic never targets interrupts to offline
> -         * CPUs, hence it's safe to use cpumask_all here.
> -         *
>           * Legacy PIC interrupts are only targeted to CPU0, but depending on
>           * the platform they can be distributed to any online CPU in hardware.
> -         * Note this behavior has only been observed on AMD hardware. In order
> -         * to cope install all active legacy vectors on all CPUs.
> -         *
> -         * IO-APIC will change the destination mask if/when taking ownership of
> -         * the interrupt.
> +         * Note this behavior has only been observed on AMD hardware. Set the
> +         * target CPU as expected here, and cope with the possibly spurious
> +         * interrupts in do_IRQ().  This behavior has only been observed
> +         * during AP bringup.
>           */
> -        cpumask_copy(desc->arch.cpu_mask,
> -                     (boot_cpu_data.x86_vendor &
> -                      (X86_VENDOR_AMD | X86_VENDOR_HYGON) ? &cpumask_all
> -                                                          : cpumask_of(cpu)));
> +        cpumask_copy(desc->arch.cpu_mask, cpumask_of(cpu));
>          desc->arch.vector = LEGACY_VECTOR(irq);
>      }

Doesn't this collide with what setup_vector_irq() does (see also patch 04)? If
you don't set all bits here, not all CPUs will have the vector_irq[] slot set
correctly for do_IRQ() to actually be able to associate the vector with the
right IRQ.

Jan


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Date: Thu, 20 Nov 2025 16:38:14 +0100
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Subject: Re: [for 4.22 v5 18/18] xen/riscv: introduce metadata table to store
 P2M type
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: 
 
 <6a5a9f4e-1f0e-453f-b1d1-d0e2acf97e2a@suse.com>
 <5d4ec4d9-b4c1-4365-a343-f42b390da165@gmail.com>
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From: Oleksii Kurochko 
In-Reply-To: <6f431394-5c08-4974-85ae-4b38f1975289@suse.com>

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On 11/18/25 7:58 AM, Jan Beulich wrote:
> On 17.11.2025 20:51, Oleksii Kurochko wrote:
>> On 11/12/25 12:49 PM, Jan Beulich wrote:
>>> On 20.10.2025 17:58, Oleksii Kurochko wrote:
>>>> +    if ( *md_pg )
>>>> +        metadata = __map_domain_page(*md_pg);
>>>> +
>>>> +    if ( t < p2m_first_external )
>>>> +    {
>>>>            pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK);
>>>>    -    return rc;
>>>> +        if ( metadata )
>>>> +            metadata[ctx->index].pte = p2m_invalid;
>>> Shouldn't this be accompanied with a BUILD_BUG_ON(p2m_invalid), as otherwise
>>> p2m_alloc_page()'s clearing of the page won't have the intended effect?
>> I think that, at least, at the moment we are always explicitly set p2m type and
>> do not rely on that by default 0==p2m_invalid.
> You don't, and ...
>
>> Just to be safe, I will add after "if ( metadata )" suggested
>> BUILD_BUG_ON(p2m_invalid):
>>          if ( metadata )
>>              metadata[ctx->index].type = p2m_invalid;
>>                  /*
>>           * metadata.type is expected to be p2m_invalid (0) after the page is
>>           * allocated and zero-initialized in p2m_alloc_page().
>>           */
>>          BUILD_BUG_ON(p2m_invalid);
>> ...
> ... this leaves me with the impression that you didn't read my reply correctly.
> p2m_alloc_page() clear the page, thus _implicitly_ setting all entries to
> p2m_invalid. That's where the BUILD_BUG_ON() would want to go (the call site,
> ftaod).

I think I still don’t fully understand what the issue would be if|p2m_invalid| were
ever equal to 1 instead of 0 in the context of a metadata page.

Yes, if|p2m_invalid| were 1, there would be a problem if someone tried to read this
metadata pagebefore it was assigned any type. They would find a value of 0, which
corresponds to a valid type rather than to|p2m_invalid|, as one might expect.
However, I’m not sure I currently see a scenario in which the metadata page would
be read before being initialized.
But just to be safe when such case will occur I am okay with putting
BUILD_BUG_ON(p2m_invalid) before p2m_alloc_page() in p2m_set_type() function.


>
>>>> +    }
>>>> +    else
>>>> +    {
>>>> +        pte->pte |= MASK_INSR(p2m_ext_storage, P2M_TYPE_PTE_BITS_MASK);
>>>> +
>>>> +        metadata[ctx->index].pte = t;
>>> If you set t to p2m_ext_storage here, the pte->pte updating could be moved ...
>> 't' shouldn't be passed as 'p2m_ext_storage'.
> Of course not. I said "set", not "pass". I suggested to set t to p2m_ext_storage
> right after the assignment above. I notice though that I missed ...

Now, I see then ...

>
>> For example, in this case we will have that in metadata page we will have type
>> equal to p2m_ext_storage and then in pte->pte will have the type set to
>> p2m_ext_storage, and the we end that we don't have a real type stored somewhere.
>> Even more, metadata.pte shouldn't be used to store p2m_ext_storage, only
>> p2m_invalid and types mentioned in enum p2m_t after p2m_ext_storage.
>>
>>>> +    }
>>> ... here, covering both cases. Overally this may then be easier as
>>>
>>>       if ( t >= p2m_first_external )
>>>           metadata[ctx->index].pte = t;
> ... the respective line (and the figure braces which are the needed) here:
>
>          t = p2m_ext_storage;

...  (what suggested above) will work.

>
>>>       else if ( metadata )
>>>           metadata[ctx->index].pte = p2m_invalid;
>>>
>>>       pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK);
>>>
>>> Then raising the question whether it couldn't still be the real type that's
>>> stored in metadata[] even for t < p2m_first_external. That woiuld further
>>> reduce conditionals.
>> It would be nice, but I think that at the moment we can’t do that. As I explained
>> above, 't' should not normally be passed as p2m_ext_storage.
> Of course not, but how's that relevant to storing the _real_ type in the
> metadata page even when it's one which can also can be stored in the PTE?
> As said, for a frequently used path it may help to reduce the number of
> conditionals here.

IIUC, you are asking whether, if|pte->pte| stores a type|< p2m_ext_storage|,
it would still be possible for|metadata[].pte| to contain anyreal type?
If yes, then the answer is that it could be done, because in the|p2m_get_type() |function the value stored in|pte->pte| is checked first. If it isn't|p2m_ext_storage|,
then|metadata[].pte| will not be checked at all. So technically, it could contain
whatever we want in case when pte.pte's type != p2m_ext_storage.

But will it really reduce an amount of conditions? It seems like we still need one
condition to check of metadata is mapped and one condition to set 't' to p2m_ext_storage:
   if ( metadata )
        metadata[ctx->index].pte = t;
   
   if ( t >= p2m_first_external )
      t = p2m_ext_storage;

   pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK);

We can do:
   if ( metadata )
   {
        metadata[ctx->index].pte = t;
        
        if ( t >= p2m_first_external )
             t = p2m_ext_storage;
   }

   pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK);
It will reduce an amount of conditions if metadata wasn't used/allocated, but I think you
have a different idea, don't you?


>
>>>> +static void p2m_free_page(struct p2m_domain *p2m, struct page_info *pg);
>>>> +
>>>> +/*
>>>> + * Free page table's page and metadata page linked to page table's page.
>>>> + */
>>>> +static void p2m_free_table(struct p2m_domain *p2m, struct page_info *tbl_pg)
>>>> +{
>>>> +    if ( tbl_pg->v.md.pg )
>>>> +        p2m_free_page(p2m, tbl_pg->v.md.pg);
>>> To play safe, maybe better also clear tbl_pg->v.md.pg?
>> I thought it would be enough to clear it during allocation in p2m_alloc_page(),
>> since I'm not sure it is critical if md.pg data were somehow leaked and read.
>> But to be safer, we can add this here:
>>     clear_and_clean_page(tbl_pg->v.md.pg, p2m->clean_dcache);
> I didn't say clear what tbl_pg->v.md.pg points to, though. I suggested to clear
> the struct field itself.

Won't be enough just tbl_pg->v.md.pg = NULL; ?

Thanks!

~ Oleksii

--------------Vj02mSHy997N6no8B2pnb0vh
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On 11/18/25 7:58 AM, Jan Beulich wrote:

    

    

      
On 17.11.2025 20:51, Oleksii Kurochko wrote:


      

        
On 11/12/25 12:49 PM, Jan Beulich wrote:


        

          
On 20.10.2025 17:58, Oleksii Kurochko wrote:


          

            
+    if ( *md_pg )
+        metadata = __map_domain_page(*md_pg);
+
+    if ( t < p2m_first_external )
+    {
          pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK);
  -    return rc;
+        if ( metadata )
+            metadata[ctx->index].pte = p2m_invalid;


          

          
Shouldn't this be accompanied with a BUILD_BUG_ON(p2m_invalid), as otherwise
p2m_alloc_page()'s clearing of the page won't have the intended effect?


        

        
I think that, at least, at the moment we are always explicitly set p2m type and
do not rely on that by default 0==p2m_invalid.


      

      
You don't, and ...



      

        
Just to be safe, I will add after "if ( metadata )" suggested
BUILD_BUG_ON(p2m_invalid):
        if ( metadata )
            metadata[ctx->index].type = p2m_invalid;
                /*
         * metadata.type is expected to be p2m_invalid (0) after the page is
         * allocated and zero-initialized in p2m_alloc_page().
         */
        BUILD_BUG_ON(p2m_invalid);
...


      

      
... this leaves me with the impression that you didn't read my reply correctly.
p2m_alloc_page() clear the page, thus _implicitly_ setting all entries to
p2m_invalid. That's where the BUILD_BUG_ON() would want to go (the call site,
ftaod).

    

    
I think I still don’t fully understand what the issue would be if p2m_invalid were
ever equal to 1 instead of 0 in the context of a metadata page.

    
Yes, if p2m_invalid were 1, there would be a problem if someone tried to read this
metadata page before it was assigned any type. They would find a value of 0, which
corresponds to a valid type rather than to p2m_invalid, as one might expect.
However, I’m not sure I currently see a scenario in which the metadata page would
be read before being initialized.
But just to be safe when such case will occur I am okay with putting
BUILD_BUG_ON(p2m_invalid) before p2m_alloc_page() in p2m_set_type() function.

    

    


    

    

      



      

        

          

            
+    }
+    else
+    {
+        pte->pte |= MASK_INSR(p2m_ext_storage, P2M_TYPE_PTE_BITS_MASK);
+
+        metadata[ctx->index].pte = t;


          

          
If you set t to p2m_ext_storage here, the pte->pte updating could be moved ...


        

        
't' shouldn't be passed as 'p2m_ext_storage'.


      

      
Of course not. I said "set", not "pass". I suggested to set t to p2m_ext_storage
right after the assignment above. I notice though that I missed ...

    

    
Now, I see then ...

    

      



      

        
For example, in this case we will have that in metadata page we will have type
equal to p2m_ext_storage and then in pte->pte will have the type set to
p2m_ext_storage, and the we end that we don't have a real type stored somewhere.
Even more, metadata.pte shouldn't be used to store p2m_ext_storage, only
p2m_invalid and types mentioned in enum p2m_t after p2m_ext_storage.



        

          

          

            
+    }


          

          
... here, covering both cases. Overally this may then be easier as

     if ( t >= p2m_first_external )
         metadata[ctx->index].pte = t;


        

      

      
... the respective line (and the figure braces which are the needed) here:

        t = p2m_ext_storage;

    

    
...  (what suggested above) will work.



    

      



      

        

          
     else if ( metadata )
         metadata[ctx->index].pte = p2m_invalid;

     pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK);

Then raising the question whether it couldn't still be the real type that's
stored in metadata[] even for t < p2m_first_external. That woiuld further
reduce conditionals.


        

        
It would be nice, but I think that at the moment we can’t do that. As I explained
above, 't' should not normally be passed as p2m_ext_storage.


      

      
Of course not, but how's that relevant to storing the _real_ type in the
metadata page even when it's one which can also can be stored in the PTE?
As said, for a frequently used path it may help to reduce the number of
conditionals here.

    

    
IIUC, you are asking whether, if pte->pte stores a type < p2m_ext_storage,
it would still be possible for metadata[].pte to contain any real type?
If yes, then the answer is that it could be done, because in the p2m_get_type()
function the value stored in pte->pte is checked first. If it isn't p2m_ext_storage,
then metadata[].pte will not be checked at all. So technically, it could contain
whatever we want in case when pte.pte's type != p2m_ext_storage.

    
But will it really reduce an amount of conditions? It seems like we still need one
condition to check of metadata is mapped and one condition to set 't' to p2m_ext_storage:
  if ( metadata )
       metadata[ctx->index].pte = t;
  
  if ( t >= p2m_first_external )
     t = p2m_ext_storage;

  pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK);

We can do:
  if ( metadata )
  {
       metadata[ctx->index].pte = t;
       
       if ( t >= p2m_first_external )
            t = p2m_ext_storage;
  }

  pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK);
It will reduce an amount of conditions if metadata wasn't used/allocated, but I think you
have a different idea, don't you?




    

      



      

        

          

            
+static void p2m_free_page(struct p2m_domain *p2m, struct page_info *pg);
+
+/*
+ * Free page table's page and metadata page linked to page table's page.
+ */
+static void p2m_free_table(struct p2m_domain *p2m, struct page_info *tbl_pg)
+{
+    if ( tbl_pg->v.md.pg )
+        p2m_free_page(p2m, tbl_pg->v.md.pg);


          

          
To play safe, maybe better also clear tbl_pg->v.md.pg?


        

        
I thought it would be enough to clear it during allocation in p2m_alloc_page(),
since I'm not sure it is critical if md.pg data were somehow leaked and read.
But to be safer, we can add this here:
   clear_and_clean_page(tbl_pg->v.md.pg, p2m->clean_dcache);


      

      
I didn't say clear what tbl_pg->v.md.pg points to, though. I suggested to clear
the struct field itself.

    

    
Won't be enough just tbl_pg->v.md.pg = NULL; ?

Thanks!

~ Oleksii

  


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Subject: Re: [for 4.22 v5 18/18] xen/riscv: introduce metadata table to store
 P2M type
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
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On 20.11.2025 16:38, Oleksii Kurochko wrote:
> On 11/18/25 7:58 AM, Jan Beulich wrote:
>> On 17.11.2025 20:51, Oleksii Kurochko wrote:
>>> On 11/12/25 12:49 PM, Jan Beulich wrote:
>>>> On 20.10.2025 17:58, Oleksii Kurochko wrote:
>>>>> +    if ( *md_pg )
>>>>> +        metadata = __map_domain_page(*md_pg);
>>>>> +
>>>>> +    if ( t < p2m_first_external )
>>>>> +    {
>>>>>            pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK);
>>>>>    -    return rc;
>>>>> +        if ( metadata )
>>>>> +            metadata[ctx->index].pte = p2m_invalid;
>>>> Shouldn't this be accompanied with a BUILD_BUG_ON(p2m_invalid), as otherwise
>>>> p2m_alloc_page()'s clearing of the page won't have the intended effect?
>>> I think that, at least, at the moment we are always explicitly set p2m type and
>>> do not rely on that by default 0==p2m_invalid.
>> You don't, and ...
>>
>>> Just to be safe, I will add after "if ( metadata )" suggested
>>> BUILD_BUG_ON(p2m_invalid):
>>>          if ( metadata )
>>>              metadata[ctx->index].type = p2m_invalid;
>>>                  /*
>>>           * metadata.type is expected to be p2m_invalid (0) after the page is
>>>           * allocated and zero-initialized in p2m_alloc_page().
>>>           */
>>>          BUILD_BUG_ON(p2m_invalid);
>>> ...
>> ... this leaves me with the impression that you didn't read my reply correctly.
>> p2m_alloc_page() clear the page, thus _implicitly_ setting all entries to
>> p2m_invalid. That's where the BUILD_BUG_ON() would want to go (the call site,
>> ftaod).
> 
> I think I still don’t fully understand what the issue would be if|p2m_invalid| were
> ever equal to 1 instead of 0 in the context of a metadata page.
> 
> Yes, if|p2m_invalid| were 1, there would be a problem if someone tried to read this
> metadata pagebefore it was assigned any type. They would find a value of 0, which
> corresponds to a valid type rather than to|p2m_invalid|, as one might expect.
> However, I’m not sure I currently see a scenario in which the metadata page would
> be read before being initialized.

Are you sure walks can only happen for GFNs that were set up? What you need to
do walks on is under guest control, after all.

> But just to be safe when such case will occur I am okay with putting
> BUILD_BUG_ON(p2m_invalid) before p2m_alloc_page() in p2m_set_type() function.

Thanks.

>>>>> +static void p2m_free_page(struct p2m_domain *p2m, struct page_info *pg);
>>>>> +
>>>>> +/*
>>>>> + * Free page table's page and metadata page linked to page table's page.
>>>>> + */
>>>>> +static void p2m_free_table(struct p2m_domain *p2m, struct page_info *tbl_pg)
>>>>> +{
>>>>> +    if ( tbl_pg->v.md.pg )
>>>>> +        p2m_free_page(p2m, tbl_pg->v.md.pg);
>>>> To play safe, maybe better also clear tbl_pg->v.md.pg?
>>> I thought it would be enough to clear it during allocation in p2m_alloc_page(),
>>> since I'm not sure it is critical if md.pg data were somehow leaked and read.
>>> But to be safer, we can add this here:
>>>     clear_and_clean_page(tbl_pg->v.md.pg, p2m->clean_dcache);
>> I didn't say clear what tbl_pg->v.md.pg points to, though. I suggested to clear
>> the struct field itself.
> 
> Won't be enough just tbl_pg->v.md.pg = NULL; ?

Exactly that, yes.

Jan


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Subject: Re: [PATCH 07/12] x86/io-apic: fix usage of setup_ioapic_dest()
To: Roger Pau Monne 
Cc: Andrew Cooper , xen-devel@lists.xenproject.org
References: <20251120090637.25087-1-roger.pau@citrix.com>
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On 20.11.2025 10:58, Roger Pau Monne wrote:
> Attempt to clarify the purpose of setup_ioapic_dest(), as the comment ahead
> of it is outdated, and looks to be a verbatim copy from Linux from one of
> the code imports.
> 
> The function serves two purposes: shuffling the interrupts across CPUs
> after SMP bringup or re-assigning all interrupts to CPU#0 if no IRQ
> balancing is set at run time.  However the function won't perform any of
> those functions correctly, as it was unconditionally using
> desc->arch.cpu_mask as the target CPU mask for interrupts (which is the
> current target anyway).
> 
> Fix by adding a new `shuffle` parameter that's used to signal whether the
> function is intended to balance interrupts across CPUs, or to re-assign all
> interrupts to the BSP.
> 
> Signed-off-by: Roger Pau Monné 

Reviewed-by: Jan Beulich 

> ---
> I couldn't find a specific Fixes tag to use here, I think this has been
> broken all along.

Perhaps dddd88c891af ("Auto-disable IRQ balancing/affinity on buggy chipsets"),
which is where the 2nd use of the function was introduced?

> --- a/xen/arch/x86/io_apic.c
> +++ b/xen/arch/x86/io_apic.c
> @@ -717,12 +717,14 @@ static int __init find_isa_irq_apic(int irq, int type)
>  static int pin_2_irq(int idx, int apic, int pin);
>  
>  /*
> - * This function currently is only a helper for the i386 smp boot process where 
> - * we need to reprogram the ioredtbls to cater for the cpus which have come online
> - * so mask in all cases should simply be TARGET_CPUS
> + * This function serves two different purposes: shuffling the IO-APIC
> + * interrupts across CPUs after SMP bringup, or re-assigning all interrupts to
> + * the BSP if IRQ balancing is disabled at runtime.  Such functional
> + * distinction is signaled by the `shuffle` parameter.
>   */
> -void /*__init*/ setup_ioapic_dest(void)
> +void setup_ioapic_dest(bool shuffle)
>  {
> +    const cpumask_t *mask = shuffle ? TARGET_CPUS : cpumask_of(0);

Don't we want to aim at getting rid of TARGET_CPUS, which is now only hiding
something invariant? IOW should we perhaps avoid introducing new uses?

Jan


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Subject: Re: [for 4.22 v5 18/18] xen/riscv: introduce metadata table to store
 P2M type
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 11/20/25 4:47 PM, Jan Beulich wrote:
> On 20.11.2025 16:38, Oleksii Kurochko wrote:
>> On 11/18/25 7:58 AM, Jan Beulich wrote:
>>> On 17.11.2025 20:51, Oleksii Kurochko wrote:
>>>> On 11/12/25 12:49 PM, Jan Beulich wrote:
>>>>> On 20.10.2025 17:58, Oleksii Kurochko wrote:
>>>>>> +    if ( *md_pg )
>>>>>> +        metadata = __map_domain_page(*md_pg);
>>>>>> +
>>>>>> +    if ( t < p2m_first_external )
>>>>>> +    {
>>>>>>             pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK);
>>>>>>     -    return rc;
>>>>>> +        if ( metadata )
>>>>>> +            metadata[ctx->index].pte = p2m_invalid;
>>>>> Shouldn't this be accompanied with a BUILD_BUG_ON(p2m_invalid), as otherwise
>>>>> p2m_alloc_page()'s clearing of the page won't have the intended effect?
>>>> I think that, at least, at the moment we are always explicitly set p2m type and
>>>> do not rely on that by default 0==p2m_invalid.
>>> You don't, and ...
>>>
>>>> Just to be safe, I will add after "if ( metadata )" suggested
>>>> BUILD_BUG_ON(p2m_invalid):
>>>>           if ( metadata )
>>>>               metadata[ctx->index].type = p2m_invalid;
>>>>                   /*
>>>>            * metadata.type is expected to be p2m_invalid (0) after the page is
>>>>            * allocated and zero-initialized in p2m_alloc_page().
>>>>            */
>>>>           BUILD_BUG_ON(p2m_invalid);
>>>> ...
>>> ... this leaves me with the impression that you didn't read my reply correctly.
>>> p2m_alloc_page() clear the page, thus_implicitly_ setting all entries to
>>> p2m_invalid. That's where the BUILD_BUG_ON() would want to go (the call site,
>>> ftaod).
>> I think I still don’t fully understand what the issue would be if|p2m_invalid| were
>> ever equal to 1 instead of 0 in the context of a metadata page.
>>
>> Yes, if|p2m_invalid| were 1, there would be a problem if someone tried to read this
>> metadata pagebefore it was assigned any type. They would find a value of 0, which
>> corresponds to a valid type rather than to|p2m_invalid|, as one might expect.
>> However, I’m not sure I currently see a scenario in which the metadata page would
>> be read before being initialized.
> Are you sure walks can only happen for GFNs that were set up? What you need to
> do walks on is under guest control, after all.

If a GFN lies within the range[p2m->lowest_mapped_gfn, p2m->max_mapped_gfn], then
|p2m_set_entry()| must already have been called for this GFN. This means that either
- a metadata page has been created and its entry filled with the appropriate type, or
- no metadata page was needed and the type was stored directly in|pte->pte|

For a GFN outside the range(p2m->lowest_mapped_gfn, p2m->max_mapped_gfn),
|p2m_get_entry()| will not even attempt a walk because of the boundary checks:
     static mfn_t p2m_get_entry(struct p2m_domain *p2m, gfn_t gfn,
                                p2m_type_t *t,
                                unsigned int *page_order)
     ...
         if ( check_outside_boundary(p2m, gfn, p2m->lowest_mapped_gfn, true,
                                     &level) )
             goto out;
     
         if ( check_outside_boundary(p2m, gfn, p2m->max_mapped_gfn, false, &level) )
             goto out;

If I am misunderstanding something and there are other cases where a walk can occur for
GFNs that were never set up, then such GFNs would have neither an allocated metadata
page nor a type stored in|pte->pte|, which looks like we are in trouble.

~ Oleksii

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On 11/20/25 4:47 PM, Jan Beulich wrote:

    

    

      
On 20.11.2025 16:38, Oleksii Kurochko wrote:

On 11/18/25 7:58 AM, Jan Beulich wrote:

On 17.11.2025 20:51, Oleksii Kurochko wrote:

On 11/12/25 12:49 PM, Jan Beulich wrote:

On 20.10.2025 17:58, Oleksii Kurochko wrote:

+    if ( *md_pg )
+        metadata = __map_domain_page(*md_pg);
+
+    if ( t < p2m_first_external )
+    {
           pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK);
   -    return rc;
+        if ( metadata )
+            metadata[ctx->index].pte = p2m_invalid;

Shouldn't this be accompanied with a BUILD_BUG_ON(p2m_invalid), as otherwise
p2m_alloc_page()'s clearing of the page won't have the intended effect?

I think that, at least, at the moment we are always explicitly set p2m type and
do not rely on that by default 0==p2m_invalid.

You don't, and ...


Just to be safe, I will add after "if ( metadata )" suggested
BUILD_BUG_ON(p2m_invalid):
         if ( metadata )
             metadata[ctx->index].type = p2m_invalid;
                 /*
          * metadata.type is expected to be p2m_invalid (0) after the page is
          * allocated and zero-initialized in p2m_alloc_page().
          */
         BUILD_BUG_ON(p2m_invalid);
...

... this leaves me with the impression that you didn't read my reply correctly.
p2m_alloc_page() clear the page, thus _implicitly_ setting all entries to
p2m_invalid. That's where the BUILD_BUG_ON() would want to go (the call site,
ftaod).

I think I still don’t fully understand what the issue would be if|p2m_invalid| were
ever equal to 1 instead of 0 in the context of a metadata page.

Yes, if|p2m_invalid| were 1, there would be a problem if someone tried to read this
metadata pagebefore it was assigned any type. They would find a value of 0, which
corresponds to a valid type rather than to|p2m_invalid|, as one might expect.
However, I’m not sure I currently see a scenario in which the metadata page would
be read before being initialized.

Are you sure walks can only happen for GFNs that were set up? What you need to
do walks on is under guest control, after all.

    

    
If a GFN lies within the range [p2m->lowest_mapped_gfn, p2m->max_mapped_gfn], then
p2m_set_entry() must already have been called for this GFN. This means that either
- a metadata page has been created and its entry filled with the appropriate type, or
- no metadata page was needed and the type was stored directly in pte->pte

    
For a GFN outside the range (p2m->lowest_mapped_gfn, p2m->max_mapped_gfn),
p2m_get_entry() will not even attempt a walk because of the boundary checks:
    static mfn_t p2m_get_entry(struct p2m_domain *p2m, gfn_t gfn,
                               p2m_type_t *t,
                               unsigned int *page_order)
    ...
        if ( check_outside_boundary(p2m, gfn, p2m->lowest_mapped_gfn, true,
                                    &level) )
            goto out;
    
        if ( check_outside_boundary(p2m, gfn, p2m->max_mapped_gfn, false, &level) )
            goto out;

If I am misunderstanding something and there are other cases where a walk can occur for
GFNs that were never set up, then such GFNs would have neither an allocated metadata
page nor a type stored in pte->pte, which looks like we are in trouble.

~ Oleksii



  


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On 20/11/2025 12:08 pm, Jan Beulich wrote:
> On 20.11.2025 12:07, Andrew Cooper wrote:
>> On 20/11/2025 11:01 am, Andrew Cooper wrote:
>>> On 19/11/2025 10:50 am, Jan Beulich wrote:
>>>> There's no need to do this every time init_evtchn() is called. Just do it
>>>> once when setting up CPU0. Drop the assertion as well, as
>>>> alloc_hipriority_vector() (called by alloc_direct_apic_vector()) uses more
>>>> restrictive BUG_ON() anyway. Then evtchn_upcall_vector can also validly
>>>> become ro-after-init, just that it needs to move out of init_evtchn().
>>>>
>>>> Signed-off-by: Jan Beulich 
>>>>
>>>> --- a/xen/arch/x86/guest/xen/xen.c
>>>> +++ b/xen/arch/x86/guest/xen/xen.c
>>>> @@ -233,16 +233,12 @@ static void cf_check xen_evtchn_upcall(v
>>>>      ack_APIC_irq();
>>>>  }
>>>>  
>>>> +static uint8_t __ro_after_init evtchn_upcall_vector;
>>>> +
>>>>  static int init_evtchn(void)
>>>>  {
>>>> -    static uint8_t evtchn_upcall_vector;
>>>>      int rc;
>>>>  
>>>> -    if ( !evtchn_upcall_vector )
>>>> -        alloc_direct_apic_vector(&evtchn_upcall_vector, xen_evtchn_upcall);
>>>> -
>>>> -    ASSERT(evtchn_upcall_vector);
>>>> -
>>>>      rc = xen_hypercall_set_evtchn_upcall_vector(this_cpu(vcpu_id),
>>>>                                                  evtchn_upcall_vector);
>>>>      if ( rc )
>>>> @@ -293,6 +289,8 @@ static void __init cf_check setup(void)
>>>>                 XEN_LEGACY_MAX_VCPUS);
>>>>      }
>>>>  
>>>> +    alloc_direct_apic_vector(&evtchn_upcall_vector, xen_evtchn_upcall);
>>>> +
>>>>      BUG_ON(init_evtchn());
>>>>  }
>>>>  
>>>>
>>> This patch is fine, but it would be nicer to split init_evtchn() into
>>> bsp_init_evtchn() and percpu_init_evtchn().
>>>
>>> Just out of context in init_evtchn(), there's a check for CPU0 that also
>>> ought to move into bsp_init_evtchn() (and therefore into __init), at
>>> which point the percpu simplifies to a single hypercall, and we keep
>>> subsystem specifics out of setup().
>> No, scratch that.  HVM_PARAM_CALLBACK_IRQ is not in the list of HVM
>> Params that migration moves on migrate (see write_hvm_params() in
>> xg_sr_save_x86_hvm.c).
>>
>> Everything is awful.
>>
>> Could you include a comment such as /* HVM_PARAM_CALLBACK_IRQ is not
>> moved on migrate, so has to be set up again on resume. */ to make it
>> clear why that piece of logic needs to stay in a non-init function?
> It's pretty much unrelated to the change here, but yes, sure, I can add
> such a comment while touching the function.

Yes please.  It's relevant to judging which code should move out of
init_evtchn().

With that done, Reviewed-by: Andrew Cooper 


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Date: Thu, 20 Nov 2025 17:25:43 +0000
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Subject: Re: [PATCH 2/4] x86/MCE: restrict allocation of thermal and CMCI
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To: Jan Beulich 
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On 20/11/2025 12:11 pm, Jan Beulich wrote:
> On 20.11.2025 12:51, Andrew Cooper wrote:
>> On 19/11/2025 10:50 am, Jan Beulich wrote:
>>> --- a/xen/arch/x86/cpu/mcheck/mce.c
>>> +++ b/xen/arch/x86/cpu/mcheck/mce.c
>>> @@ -110,13 +110,13 @@ static void __init mcheck_intel_therm_in
>>>  }
>>>  
>>>  /* P4/Xeon Thermal regulation detect and init */
>>> -static void intel_init_thermal(struct cpuinfo_x86 *c)
>>> +static void intel_init_thermal(const struct cpuinfo_x86 *c, bool bsp)
>>>  {
>>>      uint64_t msr_content;
>>>      uint32_t val;
>>>      int tm2 = 0;
>>>      unsigned int cpu = smp_processor_id();
>>> -    static uint8_t thermal_apic_vector;
>>> +    static uint8_t __ro_after_init thermal_apic_vector;
>>>  
>>>      if ( !intel_thermal_supported(c) )
>>>          return; /* -ENODEV */
>>> @@ -160,7 +160,8 @@ static void intel_init_thermal(struct cp
>>>          return; /* -EBUSY */
>>>      }
>>>  
>>> -    alloc_direct_apic_vector(&thermal_apic_vector, intel_thermal_interrupt);
>>> +    if ( bsp )
>>> +        alloc_direct_apic_vector(&thermal_apic_vector, intel_thermal_interrupt);
>> We really don't want both c and bsp passed in.  That can only go wrong.
>>
>> Furthermore, this function has 2 other examples generating bsp locally.
>>
>> The function is in desperate need of cleanup (MSRs, variable and
>> constant names), but right now this makes it worse.
>>
>> Please either use c == &boot_cpu_data, and I'll do some cleanup later,
>> or generate bsp = c == &boot_cpu_data and fix up all users in the function.
> No, throughout mce/ this won't work as long as acpi/power.c:enter_state() has
>
>     mcheck_init(&boot_cpu_data, false);

How's not not already broken then?  As said, intel_init_thermal() is
already using c == &boot_cpu_data.

This patch introduces a conflicting idea of bsp in this function, and
that's what I really want to avoid.

This looks like it wants splitting properly as {bsp,percpu}_init_$FOO()
like we have elsewhere.

~Andrew


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Date: Thu, 20 Nov 2025 18:30:50 +0000
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH 05/12] x86/io-apic: purge usage of logical mode
To: Jan Beulich 
Cc: Roger Pau Monne , xen-devel@lists.xenproject.org
References: <20251120090637.25087-1-roger.pau@citrix.com>
 <20251120090637.25087-6-roger.pau@citrix.com>
 <63a4f416-f475-4b6b-8f44-db570b7a75d9@citrix.com>
 
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On 20/11/2025 2:27 pm, Jan Beulich wrote:
> On 20.11.2025 14:18, Andrew Cooper wrote:
>> On 20/11/2025 9:06 am, Roger Pau Monne wrote:
>>> The IO-APIC RTEs are unconditionally programmed with physical destination
>>> mode, and hence the field to set in the RTE is always physical_dest.
>>>
>>> Remove the mode parameter from SET_DEST() and take the opportunity to
>>> convert it into a function, there's no need for it to be a macro.
>>>
>>> This is a benign fix, because due to the endianness of x86 the start of the
>>> physical_dest and logical_dest fields on the RTE overlap.
>> RTEs do not have overlapping fields; it's Xen's abstraction of the
>> IO-APIC which is buggy.
> I wouldn't put it this negatively. In the old days, ...
>
>> For starters, Xen's IO_APIC_route_entry still only has a 4-bit
>> physical_dest field which hasn't been true since the Pentium 4 days. 
>> This might explain some of the interrupt bugs we see.
> ... as you mention here, the two fields were distinct (and hence overlapping).

Since when?

Even in the oldest manuals I can find, it's a single field called
destination, and who's contents is interpreted differently depending on
the logical mode bit.

>From a hardware point of view, there will either be 4 or 8 bits of
storage, and it will have nothing to do with the lower bits.

> In a number of places we passed "logical" to SET_DEST() as the middle argument,
> thus covering for the too narrow field width of physical_dest. Dropping that
> parameter and always using physical_dest requires that field to be widened,
> though (or else we'll end up chopping off the top 4 bits, as we already do in
> disable_IO_APIC() and unlock_ExtINT_logic() - both benign as long as the CPU
> used always has APIC ID 0, which will at least typically be the case, I think).

Latent or not, it's still in need of fixing.

It looks like the code Xen inherited was added to Linux in e1d919786
(Jan 2008, even then only x86_32) and deleted by d83e94acd957 (August 2008).

It looks like we're 17 years late undoing this...

~Andrew


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From: Markus Armbruster 
To: BALATON Zoltan 
Cc: Daniel Henrique Barboza ,
  qemu-devel@nongnu.org,  kwolf@redhat.com,  hreitz@redhat.com,
  mst@redhat.com,  imammedo@redhat.com,  anisinha@redhat.com,
  gengdongjiu1@gmail.com,  peter.maydell@linaro.org,
  alistair@alistair23.me,  edgar.iglesias@gmail.com,  npiggin@gmail.com,
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Subject: Re: [PATCH 1/5] hw/core/loader: Make load_elf_hdr() return bool,
 simplify caller
In-Reply-To: <072c1f11-1bb4-6f19-f847-e4ba07c148c3@eik.bme.hu> (BALATON
	Zoltan's message of "Thu, 20 Nov 2025 13:55:13 +0100 (CET)")
References: <20251119130855.105479-1-armbru@redhat.com>
	<20251119130855.105479-2-armbru@redhat.com>
	<4fb0a736-4450-47c0-9f9e-6cb86a3b28ea@ventanamicro.com>
	<072c1f11-1bb4-6f19-f847-e4ba07c148c3@eik.bme.hu>
Date: Thu, 20 Nov 2025 20:12:54 +0100
Message-ID: <873468tt55.fsf@pond.sub.org>
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BALATON Zoltan  writes:

> On Thu, 20 Nov 2025, Daniel Henrique Barboza wrote:
>> On 11/19/25 10:08 AM, Markus Armbruster wrote:
>>> Signed-off-by: Markus Armbruster 
>>> ---
>>
>> Nice cleanup
>>
>>
>> Reviewed-by: Daniel Henrique Barboza 

[...]

>>> diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
>>> index b0bab3fe00..8531e1d121 100644
>>> --- a/hw/riscv/spike.c
>>> +++ b/hw/riscv/spike.c
>>> @@ -180,15 +180,7 @@ static void create_fdt(SpikeState *s, const 
>>> MemMapEntry *memmap,
>>>     static bool spike_test_elf_image(char *filename)
>>>   {
>>> -    Error *err = NULL;
>>> -
>>> -    load_elf_hdr(filename, NULL, NULL, &err);
>>> -    if (err) {
>>> -        error_free(err);
>>> -        return false;
>>> -    } else {
>>> -        return true;
>>> -    }
>>> +    return load_elf_hdr(filename, NULL, NULL, NULL);
>
> Does it worth to keep this function or could just be inlined at the two 
> callers now that it's equivalent with load_elf_hdr?

Palmer, Alistair, Daniel, got a preference?



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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com,
	pizhenwei@bytedance.com,
	alistair.francis@wdc.com,
	stefanb@linux.vnet.ibm.com,
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	groug@kaod.org,
	mst@redhat.com,
	imammedo@redhat.com,
	anisinha@redhat.com,
	kraxel@redhat.com,
	shentey@gmail.com,
	npiggin@gmail.com,
	harshpb@linux.ibm.com,
	sstabellini@kernel.org,
	anthony@xenproject.org,
	paul@xen.org,
	edgar.iglesias@gmail.com,
	elena.ufimtseva@oracle.com,
	jag.raman@oracle.com,
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	pbonzini@redhat.com,
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	mtosatti@redhat.com,
	rathc@linux.ibm.com,
	palmer@dabbelt.com,
	liwei1518@gmail.com,
	dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com,
	marcandre.lureau@redhat.com,
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	qemu-ppc@nongnu.org,
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Subject: [PATCH 03/14] tap-solaris: Use error_setg_file_open() for better error messages
Date: Thu, 20 Nov 2025 20:13:28 +0100
Message-ID: <20251120191339.756429-4-armbru@redhat.com>
In-Reply-To: <20251120191339.756429-1-armbru@redhat.com>
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Error messages change from

    Can't open /dev/ip (actually /dev/udp)
    Can't open /dev/tap
    Can't open /dev/tap (2)

to

    Could not open '/dev/udp': REASON
    Could not open '/dev/tap': REASON

where REASON is the value of strerror(errno).

Signed-off-by: Markus Armbruster 
---
 net/tap-solaris.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/net/tap-solaris.c b/net/tap-solaris.c
index 75397e6c54..faf7922ea8 100644
--- a/net/tap-solaris.c
+++ b/net/tap-solaris.c
@@ -87,13 +87,13 @@ static int tap_alloc(char *dev, size_t dev_size, Error **errp)
 
     ip_fd = RETRY_ON_EINTR(open("/dev/udp", O_RDWR, 0));
     if (ip_fd < 0) {
-        error_setg(errp, "Can't open /dev/ip (actually /dev/udp)");
+        error_setg_file_open(errp, errno, "/dev/udp");
         return -1;
     }
 
     tap_fd = RETRY_ON_EINTR(open("/dev/tap", O_RDWR, 0));
     if (tap_fd < 0) {
-        error_setg(errp, "Can't open /dev/tap");
+        error_setg_file_open(errp, errno, "/dev/tap");
         return -1;
     }
 
@@ -107,7 +107,7 @@ static int tap_alloc(char *dev, size_t dev_size, Error **errp)
 
     if_fd = RETRY_ON_EINTR(open("/dev/tap", O_RDWR, 0));
     if (if_fd < 0) {
-        error_setg(errp, "Can't open /dev/tap (2)");
+        error_setg_file_open(errp, errno, "/dev/tap");
         return -1;
     }
     if(ioctl(if_fd, I_PUSH, "ip") < 0){
-- 
2.49.0



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From: Markus Armbruster 
To: qemu-devel@nongnu.org
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	pizhenwei@bytedance.com,
	alistair.francis@wdc.com,
	stefanb@linux.vnet.ibm.com,
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	jasowang@redhat.com,
	samuel.thibault@ens-lyon.org,
	michael.roth@amd.com,
	kkostiuk@redhat.com,
	zhao1.liu@intel.com,
	mtosatti@redhat.com,
	rathc@linux.ibm.com,
	palmer@dabbelt.com,
	liwei1518@gmail.com,
	dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com,
	marcandre.lureau@redhat.com,
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	qemu-ppc@nongnu.org,
	xen-devel@lists.xenproject.org,
	kvm@vger.kernel.org,
	qemu-riscv@nongnu.org
Subject: [PATCH 01/14] error: Strip trailing '\n' from error string arguments (again)
Date: Thu, 20 Nov 2025 20:13:26 +0100
Message-ID: <20251120191339.756429-2-armbru@redhat.com>
In-Reply-To: <20251120191339.756429-1-armbru@redhat.com>
References: <20251120191339.756429-1-armbru@redhat.com>
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Content-Transfer-Encoding: 8bit
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Tracked down with scripts/coccinelle/err-bad-newline.cocci.

Signed-off-by: Markus Armbruster 
---
 hw/audio/es1370.c | 2 +-
 ui/gtk.c          | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/audio/es1370.c b/hw/audio/es1370.c
index 9873ffadab..566f93f1ea 100644
--- a/hw/audio/es1370.c
+++ b/hw/audio/es1370.c
@@ -228,7 +228,7 @@ static void print_sctl(uint32_t val)
 #undef a
         error_report("es1370: "
                 "%s p2_end_inc %d, p2_st_inc %d,"
-                " r1_fmt %s, p2_fmt %s, p1_fmt %s\n",
+                " r1_fmt %s, p2_fmt %s, p1_fmt %s",
                 buf,
                 (val & SCTRL_P2ENDINC) >> SCTRL_SH_P2ENDINC,
                 (val & SCTRL_P2STINC) >> SCTRL_SH_P2STINC,
diff --git a/ui/gtk.c b/ui/gtk.c
index 48571bedbf..e83a366625 100644
--- a/ui/gtk.c
+++ b/ui/gtk.c
@@ -1197,7 +1197,7 @@ static gboolean gd_touch_event(GtkWidget *widget, GdkEventTouch *touch,
         type = INPUT_MULTI_TOUCH_TYPE_END;
         break;
     default:
-        warn_report("gtk: unexpected touch event type\n");
+        warn_report("gtk: unexpected touch event type");
         return FALSE;
     }
 
-- 
2.49.0



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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com,
	pizhenwei@bytedance.com,
	alistair.francis@wdc.com,
	stefanb@linux.vnet.ibm.com,
	kwolf@redhat.com,
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	anthony@xenproject.org,
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Subject: [PATCH 04/14] qga: Use error_setg_file_open() for better error messages
Date: Thu, 20 Nov 2025 20:13:29 +0100
Message-ID: <20251120191339.756429-5-armbru@redhat.com>
In-Reply-To: <20251120191339.756429-1-armbru@redhat.com>
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Error messages change from

    open("FNAME"): REASON

to

    Could not open 'FNAME': REASON

Signed-off-by: Markus Armbruster 
---
 qga/commands-linux.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/qga/commands-linux.c b/qga/commands-linux.c
index 4a09ddc760..5cf76ca2d9 100644
--- a/qga/commands-linux.c
+++ b/qga/commands-linux.c
@@ -1502,14 +1502,15 @@ static void transfer_vcpu(GuestLogicalProcessor *vcpu, bool sys2vcpu,
 
     dirfd = open(dirpath, O_RDONLY | O_DIRECTORY);
     if (dirfd == -1) {
-        error_setg_errno(errp, errno, "open(\"%s\")", dirpath);
+        error_setg_file_open(errp, errno, dirpath);
         return;
     }
 
     fd = openat(dirfd, fn, sys2vcpu ? O_RDONLY : O_RDWR);
     if (fd == -1) {
         if (errno != ENOENT) {
-            error_setg_errno(errp, errno, "open(\"%s/%s\")", dirpath, fn);
+            error_setg_errno(errp, errno, "could not open %s/%s",
+                             dirpath, fn);
         } else if (sys2vcpu) {
             vcpu->online = true;
             vcpu->can_offline = false;
@@ -1711,7 +1712,7 @@ static void transfer_memory_block(GuestMemoryBlock *mem_blk, bool sys2memblk,
     dirfd = open(dirpath, O_RDONLY | O_DIRECTORY);
     if (dirfd == -1) {
         if (sys2memblk) {
-            error_setg_errno(errp, errno, "open(\"%s\")", dirpath);
+            error_setg_file_open(errp, errno, dirpath);
         } else {
             if (errno == ENOENT) {
                 result->response = GUEST_MEMORY_BLOCK_RESPONSE_TYPE_NOT_FOUND;
@@ -1936,7 +1937,7 @@ static GuestDiskStatsInfoList *guest_get_diskstats(Error **errp)
 
     fp = fopen(diskstats, "r");
     if (fp  == NULL) {
-        error_setg_errno(errp, errno, "open(\"%s\")", diskstats);
+        error_setg_file_open(errp, errno, diskstats);
         return NULL;
     }
 
@@ -2047,7 +2048,7 @@ GuestCpuStatsList *qmp_guest_get_cpustats(Error **errp)
 
     fp = fopen(cpustats, "r");
     if (fp  == NULL) {
-        error_setg_errno(errp, errno, "open(\"%s\")", cpustats);
+        error_setg_file_open(errp, errno, cpustats);
         return NULL;
     }
 
-- 
2.49.0



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To: qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com,
	pizhenwei@bytedance.com,
	alistair.francis@wdc.com,
	stefanb@linux.vnet.ibm.com,
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	imammedo@redhat.com,
	anisinha@redhat.com,
	kraxel@redhat.com,
	shentey@gmail.com,
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	harshpb@linux.ibm.com,
	sstabellini@kernel.org,
	anthony@xenproject.org,
	paul@xen.org,
	edgar.iglesias@gmail.com,
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	jag.raman@oracle.com,
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Subject: [PATCH 10/14] net/slirp: Improve file open error message
Date: Thu, 20 Nov 2025 20:13:35 +0100
Message-ID: <20251120191339.756429-11-armbru@redhat.com>
In-Reply-To: <20251120191339.756429-1-armbru@redhat.com>
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This error reports failure to create a temporary file, and
error_setg_file_open() would probably be too terse, so merely switch
to error_setg_errno() to add errno information.

Signed-off-by: Markus Armbruster 
---
 net/slirp.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/net/slirp.c b/net/slirp.c
index 120eef6122..5996fec512 100644
--- a/net/slirp.c
+++ b/net/slirp.c
@@ -1034,8 +1034,10 @@ static int slirp_smb(SlirpState* s, const char *exported_dir,
 
     f = fopen(smb_conf, "w");
     if (!f) {
+        int eno = errno;
+
         slirp_smb_cleanup(s);
-        error_setg(errp,
+        error_setg_errno(errp, eno,
                    "Could not create samba server configuration file '%s'",
                     smb_conf);
         g_free(smb_conf);
-- 
2.49.0



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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com,
	pizhenwei@bytedance.com,
	alistair.francis@wdc.com,
	stefanb@linux.vnet.ibm.com,
	kwolf@redhat.com,
	hreitz@redhat.com,
	sw@weilnetz.de,
	qemu_oss@crudebyte.com,
	groug@kaod.org,
	mst@redhat.com,
	imammedo@redhat.com,
	anisinha@redhat.com,
	kraxel@redhat.com,
	shentey@gmail.com,
	npiggin@gmail.com,
	harshpb@linux.ibm.com,
	sstabellini@kernel.org,
	anthony@xenproject.org,
	paul@xen.org,
	edgar.iglesias@gmail.com,
	elena.ufimtseva@oracle.com,
	jag.raman@oracle.com,
	sgarzare@redhat.com,
	pbonzini@redhat.com,
	fam@euphon.net,
	philmd@linaro.org,
	alex@shazbot.org,
	clg@redhat.com,
	peterx@redhat.com,
	farosas@suse.de,
	lizhijian@fujitsu.com,
	dave@treblig.org,
	jasowang@redhat.com,
	samuel.thibault@ens-lyon.org,
	michael.roth@amd.com,
	kkostiuk@redhat.com,
	zhao1.liu@intel.com,
	mtosatti@redhat.com,
	rathc@linux.ibm.com,
	palmer@dabbelt.com,
	liwei1518@gmail.com,
	dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com,
	marcandre.lureau@redhat.com,
	qemu-block@nongnu.org,
	qemu-ppc@nongnu.org,
	xen-devel@lists.xenproject.org,
	kvm@vger.kernel.org,
	qemu-riscv@nongnu.org
Subject: [PATCH 02/14] hw/usb: Use error_setg_file_open() for a better error message
Date: Thu, 20 Nov 2025 20:13:27 +0100
Message-ID: <20251120191339.756429-3-armbru@redhat.com>
In-Reply-To: <20251120191339.756429-1-armbru@redhat.com>
References: <20251120191339.756429-1-armbru@redhat.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
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The error message changes from

    open FILENAME failed

to

    Could not open 'FILENAME': REASON

where REASON is the value of strerror(errno).

Signed-off-by: Markus Armbruster 
---
 hw/usb/bus.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/usb/bus.c b/hw/usb/bus.c
index 8dd2ce415e..47d42ca3c1 100644
--- a/hw/usb/bus.c
+++ b/hw/usb/bus.c
@@ -262,7 +262,7 @@ static void usb_qdev_realize(DeviceState *qdev, Error **errp)
         int fd = qemu_open_old(dev->pcap_filename,
                                O_CREAT | O_WRONLY | O_TRUNC | O_BINARY, 0666);
         if (fd < 0) {
-            error_setg(errp, "open %s failed", dev->pcap_filename);
+            error_setg_file_open(errp, errno, dev->pcap_filename);
             usb_qdev_unrealize(qdev);
             return;
         }
-- 
2.49.0



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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com,
	pizhenwei@bytedance.com,
	alistair.francis@wdc.com,
	stefanb@linux.vnet.ibm.com,
	kwolf@redhat.com,
	hreitz@redhat.com,
	sw@weilnetz.de,
	qemu_oss@crudebyte.com,
	groug@kaod.org,
	mst@redhat.com,
	imammedo@redhat.com,
	anisinha@redhat.com,
	kraxel@redhat.com,
	shentey@gmail.com,
	npiggin@gmail.com,
	harshpb@linux.ibm.com,
	sstabellini@kernel.org,
	anthony@xenproject.org,
	paul@xen.org,
	edgar.iglesias@gmail.com,
	elena.ufimtseva@oracle.com,
	jag.raman@oracle.com,
	sgarzare@redhat.com,
	pbonzini@redhat.com,
	fam@euphon.net,
	philmd@linaro.org,
	alex@shazbot.org,
	clg@redhat.com,
	peterx@redhat.com,
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	lizhijian@fujitsu.com,
	dave@treblig.org,
	jasowang@redhat.com,
	samuel.thibault@ens-lyon.org,
	michael.roth@amd.com,
	kkostiuk@redhat.com,
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	mtosatti@redhat.com,
	rathc@linux.ibm.com,
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	dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com,
	marcandre.lureau@redhat.com,
	qemu-block@nongnu.org,
	qemu-ppc@nongnu.org,
	xen-devel@lists.xenproject.org,
	kvm@vger.kernel.org,
	qemu-riscv@nongnu.org
Subject: [PATCH 09/14] error: Use error_setg_file_open() for simplicity and consistency
Date: Thu, 20 Nov 2025 20:13:34 +0100
Message-ID: <20251120191339.756429-10-armbru@redhat.com>
In-Reply-To: <20251120191339.756429-1-armbru@redhat.com>
References: <20251120191339.756429-1-armbru@redhat.com>
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Replace

    error_setg_errno(errp, errno, MSG, FNAME);

by

    error_setg_file_open(errp, errno, FNAME);

where MSG is "Could not open '%s'" or similar.

Also replace equivalent uses of error_setg().

A few messages lose prefixes ("net dump: ", "SEV: ", __func__ ": ").
We could put them back with error_prepend().  Not worth the bother.

Signed-off-by: Markus Armbruster 
---
 hw/9pfs/9p-local.c        | 2 +-
 hw/acpi/core.c            | 2 +-
 hw/core/loader.c          | 2 +-
 hw/pci-host/xen_igd_pt.c  | 2 +-
 monitor/hmp-cmds-target.c | 2 +-
 net/dump.c                | 2 +-
 net/tap-bsd.c             | 6 +++---
 net/tap-linux.c           | 2 +-
 target/i386/sev.c         | 6 ++----
 ui/ui-qmp-cmds.c          | 3 +--
 util/vfio-helpers.c       | 5 ++---
 11 files changed, 15 insertions(+), 19 deletions(-)

diff --git a/hw/9pfs/9p-local.c b/hw/9pfs/9p-local.c
index 31e216227c..376b377698 100644
--- a/hw/9pfs/9p-local.c
+++ b/hw/9pfs/9p-local.c
@@ -1456,7 +1456,7 @@ static int local_init(FsContext *ctx, Error **errp)
 
     data->mountfd = open(ctx->fs_root, O_DIRECTORY | O_RDONLY);
     if (data->mountfd == -1) {
-        error_setg_errno(errp, errno, "failed to open '%s'", ctx->fs_root);
+        error_setg_file_open(errp, errno, ctx->fs_root);
         goto err;
     }
 
diff --git a/hw/acpi/core.c b/hw/acpi/core.c
index ff16582803..d2677332af 100644
--- a/hw/acpi/core.c
+++ b/hw/acpi/core.c
@@ -277,7 +277,7 @@ void acpi_table_add(const QemuOpts *opts, Error **errp)
         int fd = open(*cur, O_RDONLY | O_BINARY);
 
         if (fd < 0) {
-            error_setg(errp, "can't open file %s: %s", *cur, strerror(errno));
+            error_setg_file_open(errp, errno, *cur);
             goto out;
         }
 
diff --git a/hw/core/loader.c b/hw/core/loader.c
index 590c5b02aa..b56e5eb2f5 100644
--- a/hw/core/loader.c
+++ b/hw/core/loader.c
@@ -379,7 +379,7 @@ void load_elf_hdr(const char *filename, void *hdr, bool *is64, Error **errp)
 
     fd = open(filename, O_RDONLY | O_BINARY);
     if (fd < 0) {
-        error_setg_errno(errp, errno, "Failed to open file: %s", filename);
+        error_setg_file_open(errp, errno, filename);
         return;
     }
     if (read(fd, hdr, EI_NIDENT) != EI_NIDENT) {
diff --git a/hw/pci-host/xen_igd_pt.c b/hw/pci-host/xen_igd_pt.c
index 5dd17ef236..f6016f2cd5 100644
--- a/hw/pci-host/xen_igd_pt.c
+++ b/hw/pci-host/xen_igd_pt.c
@@ -55,7 +55,7 @@ static void host_pci_config_read(int pos, int len, uint32_t *val, Error **errp)
 
     config_fd = open(path, O_RDWR);
     if (config_fd < 0) {
-        error_setg_errno(errp, errno, "Failed to open: %s", path);
+        error_setg_file_open(errp, errno, path);
         goto out;
     }
 
diff --git a/monitor/hmp-cmds-target.c b/monitor/hmp-cmds-target.c
index e982061146..ad4ed2167d 100644
--- a/monitor/hmp-cmds-target.c
+++ b/monitor/hmp-cmds-target.c
@@ -331,7 +331,7 @@ static uint64_t vtop(void *ptr, Error **errp)
 
     fd = open("/proc/self/pagemap", O_RDONLY);
     if (fd == -1) {
-        error_setg_errno(errp, errno, "Cannot open /proc/self/pagemap");
+        error_setg_file_open(errp, errno, "/proc/self/pagemap");
         return -1;
     }
 
diff --git a/net/dump.c b/net/dump.c
index 581234b775..0c39f09892 100644
--- a/net/dump.c
+++ b/net/dump.c
@@ -111,7 +111,7 @@ static int net_dump_state_init(DumpState *s, const char *filename,
 
     fd = open(filename, O_CREAT | O_TRUNC | O_WRONLY | O_BINARY, 0644);
     if (fd < 0) {
-        error_setg_errno(errp, errno, "net dump: can't open %s", filename);
+        error_setg_file_open(errp, errno, filename);
         return -1;
     }
 
diff --git a/net/tap-bsd.c b/net/tap-bsd.c
index bbf84d1828..3fd300d46f 100644
--- a/net/tap-bsd.c
+++ b/net/tap-bsd.c
@@ -68,7 +68,7 @@ int tap_open(char *ifname, int ifname_size, int *vnet_hdr,
         }
     }
     if (fd < 0) {
-        error_setg_errno(errp, errno, "could not open %s", dname);
+        error_setg_file_open(errp, errno, dname);
         return -1;
     }
 
@@ -118,7 +118,7 @@ static int tap_open_clone(char *ifname, int ifname_size, Error **errp)
 
     fd = RETRY_ON_EINTR(open(PATH_NET_TAP, O_RDWR));
     if (fd < 0) {
-        error_setg_errno(errp, errno, "could not open %s", PATH_NET_TAP);
+        error_setg_file_open(errp, errno, PATH_NET_TAP);
         return -1;
     }
 
@@ -166,7 +166,7 @@ int tap_open(char *ifname, int ifname_size, int *vnet_hdr,
         snprintf(dname, sizeof dname, "/dev/%s", ifname);
         fd = RETRY_ON_EINTR(open(dname, O_RDWR));
         if (fd < 0 && errno != ENOENT) {
-            error_setg_errno(errp, errno, "could not open %s", dname);
+            error_setg_file_open(errp, errno, dname);
             return -1;
         }
     }
diff --git a/net/tap-linux.c b/net/tap-linux.c
index 2a90b58467..909c4f1fcf 100644
--- a/net/tap-linux.c
+++ b/net/tap-linux.c
@@ -57,7 +57,7 @@ int tap_open(char *ifname, int ifname_size, int *vnet_hdr,
     if (fd < 0) {
         fd = RETRY_ON_EINTR(open(PATH_NET_TUN, O_RDWR));
         if (fd < 0) {
-            error_setg_errno(errp, errno, "could not open %s", PATH_NET_TUN);
+            error_setg_file_open(errp, errno, PATH_NET_TUN);
             return -1;
         }
     }
diff --git a/target/i386/sev.c b/target/i386/sev.c
index fd2dada013..8660ecd9e4 100644
--- a/target/i386/sev.c
+++ b/target/i386/sev.c
@@ -891,8 +891,7 @@ static SevCapability *sev_get_capabilities(Error **errp)
 
     fd = open(sev_device, O_RDWR);
     if (fd < 0) {
-        error_setg_errno(errp, errno, "SEV: Failed to open %s",
-                         sev_device);
+        error_setg_file_open(errp, errno, sev_device);
         g_free(sev_device);
         return NULL;
     }
@@ -1819,8 +1818,7 @@ static int sev_common_kvm_init(ConfidentialGuestSupport *cgs, Error **errp)
     devname = object_property_get_str(OBJECT(sev_common), "sev-device", NULL);
     sev_common->sev_fd = open(devname, O_RDWR);
     if (sev_common->sev_fd < 0) {
-        error_setg(errp, "%s: Failed to open %s '%s'", __func__,
-                   devname, strerror(errno));
+        error_setg_file_open(errp, errno, devname);
         g_free(devname);
         return -1;
     }
diff --git a/ui/ui-qmp-cmds.c b/ui/ui-qmp-cmds.c
index 74fa6c6ec5..d927121676 100644
--- a/ui/ui-qmp-cmds.c
+++ b/ui/ui-qmp-cmds.c
@@ -371,8 +371,7 @@ qmp_screendump(const char *filename, const char *device,
 
     fd = qemu_open_old(filename, O_WRONLY | O_CREAT | O_TRUNC | O_BINARY, 0666);
     if (fd == -1) {
-        error_setg(errp, "failed to open file '%s': %s", filename,
-                   strerror(errno));
+        error_setg_file_open(errp, errno, filename);
         return;
     }
 
diff --git a/util/vfio-helpers.c b/util/vfio-helpers.c
index fdff042ab4..8b1b2e2f05 100644
--- a/util/vfio-helpers.c
+++ b/util/vfio-helpers.c
@@ -309,7 +309,7 @@ static int qemu_vfio_init_pci(QEMUVFIOState *s, const char *device,
     s->container = open("/dev/vfio/vfio", O_RDWR);
 
     if (s->container == -1) {
-        error_setg_errno(errp, errno, "Failed to open /dev/vfio/vfio");
+        error_setg_file_open(errp, errno, "/dev/vfio/vfio");
         return -errno;
     }
     if (ioctl(s->container, VFIO_GET_API_VERSION) != VFIO_API_VERSION) {
@@ -333,8 +333,7 @@ static int qemu_vfio_init_pci(QEMUVFIOState *s, const char *device,
 
     s->group = open(group_file, O_RDWR);
     if (s->group == -1) {
-        error_setg_errno(errp, errno, "Failed to open VFIO group file: %s",
-                         group_file);
+        error_setg_file_open(errp, errno, group_file);
         g_free(group_file);
         ret = -errno;
         goto fail_container;
-- 
2.49.0



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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com,
	pizhenwei@bytedance.com,
	alistair.francis@wdc.com,
	stefanb@linux.vnet.ibm.com,
	kwolf@redhat.com,
	hreitz@redhat.com,
	sw@weilnetz.de,
	qemu_oss@crudebyte.com,
	groug@kaod.org,
	mst@redhat.com,
	imammedo@redhat.com,
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	kkostiuk@redhat.com,
	zhao1.liu@intel.com,
	mtosatti@redhat.com,
	rathc@linux.ibm.com,
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	marcandre.lureau@redhat.com,
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	qemu-ppc@nongnu.org,
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	qemu-riscv@nongnu.org
Subject: [PATCH 06/14] hw/virtio: Use error_setg_file_open() for a better error message
Date: Thu, 20 Nov 2025 20:13:31 +0100
Message-ID: <20251120191339.756429-7-armbru@redhat.com>
In-Reply-To: <20251120191339.756429-1-armbru@redhat.com>
References: <20251120191339.756429-1-armbru@redhat.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
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The error message changes from

    vhost-vsock: failed to open vhost device: REASON

to

    Could not open '/dev/vhost-vsock': REASON

I think the exact file name is more useful to know than the file's
purpose.

Signed-off-by: Markus Armbruster 
---
 hw/virtio/vhost-vsock.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/hw/virtio/vhost-vsock.c b/hw/virtio/vhost-vsock.c
index 107d88babe..7940b60d8a 100644
--- a/hw/virtio/vhost-vsock.c
+++ b/hw/virtio/vhost-vsock.c
@@ -153,8 +153,7 @@ static void vhost_vsock_device_realize(DeviceState *dev, Error **errp)
     } else {
         vhostfd = open("/dev/vhost-vsock", O_RDWR);
         if (vhostfd < 0) {
-            error_setg_errno(errp, errno,
-                             "vhost-vsock: failed to open vhost device");
+            error_setg_file_open(errp, errno, "/dev/vhost-vsock");
             return;
         }
 
-- 
2.49.0



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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com,
	pizhenwei@bytedance.com,
	alistair.francis@wdc.com,
	stefanb@linux.vnet.ibm.com,
	kwolf@redhat.com,
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	qemu_oss@crudebyte.com,
	groug@kaod.org,
	mst@redhat.com,
	imammedo@redhat.com,
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Subject: [PATCH 08/14] blkdebug: Use error_setg_file_open() for a better error message
Date: Thu, 20 Nov 2025 20:13:33 +0100
Message-ID: <20251120191339.756429-9-armbru@redhat.com>
In-Reply-To: <20251120191339.756429-1-armbru@redhat.com>
References: <20251120191339.756429-1-armbru@redhat.com>
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Content-Transfer-Encoding: 8bit
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The error message changes from

    Could not read blkdebug config file: REASON

to

    Could not open 'FNAME': REASON

I think the exact file name is more useful to know than the file's
purpose.

Signed-off-by: Markus Armbruster 
---
 block/blkdebug.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/block/blkdebug.c b/block/blkdebug.c
index c54aee0c84..8a4a8cb85e 100644
--- a/block/blkdebug.c
+++ b/block/blkdebug.c
@@ -288,7 +288,7 @@ static int read_config(BDRVBlkdebugState *s, const char *filename,
     if (filename) {
         f = fopen(filename, "r");
         if (f == NULL) {
-            error_setg_errno(errp, errno, "Could not read blkdebug config file");
+            error_setg_file_open(errp, errno, filename);
             return -errno;
         }
 
-- 
2.49.0



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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com,
	pizhenwei@bytedance.com,
	alistair.francis@wdc.com,
	stefanb@linux.vnet.ibm.com,
	kwolf@redhat.com,
	hreitz@redhat.com,
	sw@weilnetz.de,
	qemu_oss@crudebyte.com,
	groug@kaod.org,
	mst@redhat.com,
	imammedo@redhat.com,
	anisinha@redhat.com,
	kraxel@redhat.com,
	shentey@gmail.com,
	npiggin@gmail.com,
	harshpb@linux.ibm.com,
	sstabellini@kernel.org,
	anthony@xenproject.org,
	paul@xen.org,
	edgar.iglesias@gmail.com,
	elena.ufimtseva@oracle.com,
	jag.raman@oracle.com,
	sgarzare@redhat.com,
	pbonzini@redhat.com,
	fam@euphon.net,
	philmd@linaro.org,
	alex@shazbot.org,
	clg@redhat.com,
	peterx@redhat.com,
	farosas@suse.de,
	lizhijian@fujitsu.com,
	dave@treblig.org,
	jasowang@redhat.com,
	samuel.thibault@ens-lyon.org,
	michael.roth@amd.com,
	kkostiuk@redhat.com,
	zhao1.liu@intel.com,
	mtosatti@redhat.com,
	rathc@linux.ibm.com,
	palmer@dabbelt.com,
	liwei1518@gmail.com,
	dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com,
	marcandre.lureau@redhat.com,
	qemu-block@nongnu.org,
	qemu-ppc@nongnu.org,
	xen-devel@lists.xenproject.org,
	kvm@vger.kernel.org,
	qemu-riscv@nongnu.org
Subject: [PATCH 07/14] net/tap: Use error_setg_file_open() for a better error message
Date: Thu, 20 Nov 2025 20:13:32 +0100
Message-ID: <20251120191339.756429-8-armbru@redhat.com>
In-Reply-To: <20251120191339.756429-1-armbru@redhat.com>
References: <20251120191339.756429-1-armbru@redhat.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
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The error message changes from

    tap: open vhost char device failed

to

    Could not open '/dev/vhost-net': REASON

I think the exact file name is more useful to know than the file's
purpose.

We could put back the "tap: " prefix with error_prepend().  Not
worth the bother.

Signed-off-by: Markus Armbruster 
---
 net/tap.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/net/tap.c b/net/tap.c
index abe3b2d036..bfba3fd7a7 100644
--- a/net/tap.c
+++ b/net/tap.c
@@ -747,8 +747,7 @@ static void net_init_tap_one(const NetdevTapOptions *tap, NetClientState *peer,
         } else {
             vhostfd = open("/dev/vhost-net", O_RDWR);
             if (vhostfd < 0) {
-                error_setg_errno(errp, errno,
-                                 "tap: open vhost char device failed");
+                error_setg_file_open(errp, errno, "/dev/vhost-net");
                 goto failed;
             }
             if (!qemu_set_blocking(vhostfd, false, errp)) {
-- 
2.49.0



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To: qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com,
	pizhenwei@bytedance.com,
	alistair.francis@wdc.com,
	stefanb@linux.vnet.ibm.com,
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	mst@redhat.com,
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	samuel.thibault@ens-lyon.org,
	michael.roth@amd.com,
	kkostiuk@redhat.com,
	zhao1.liu@intel.com,
	mtosatti@redhat.com,
	rathc@linux.ibm.com,
	palmer@dabbelt.com,
	liwei1518@gmail.com,
	dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com,
	marcandre.lureau@redhat.com,
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	qemu-ppc@nongnu.org,
	xen-devel@lists.xenproject.org,
	kvm@vger.kernel.org,
	qemu-riscv@nongnu.org
Subject: [PATCH 05/14] hw/scsi: Use error_setg_file_open() for a better error message
Date: Thu, 20 Nov 2025 20:13:30 +0100
Message-ID: <20251120191339.756429-6-armbru@redhat.com>
In-Reply-To: <20251120191339.756429-1-armbru@redhat.com>
References: <20251120191339.756429-1-armbru@redhat.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
X-Scanned-By: MIMEDefang 3.0 on 10.30.177.12

The error message changes from

    vhost-scsi: open vhost char device failed: REASON

to

    Could not open '/dev/vhost-scsi': REASON

I think the exact file name is more useful to know than the file's
purpose.

We could put back the "vhost-scsi: " prefix with error_prepend().  Not
worth the bother.

Signed-off-by: Markus Armbruster 
---
 hw/scsi/vhost-scsi.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/hw/scsi/vhost-scsi.c b/hw/scsi/vhost-scsi.c
index cdf405b0f8..239138c931 100644
--- a/hw/scsi/vhost-scsi.c
+++ b/hw/scsi/vhost-scsi.c
@@ -245,8 +245,7 @@ static void vhost_scsi_realize(DeviceState *dev, Error **errp)
     } else {
         vhostfd = open("/dev/vhost-scsi", O_RDWR);
         if (vhostfd < 0) {
-            error_setg(errp, "vhost-scsi: open vhost char device failed: %s",
-                       strerror(errno));
+            error_setg_file_open(errp, errno, "/dev/vhost-scsi");
             return;
         }
     }
-- 
2.49.0



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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com,
	pizhenwei@bytedance.com,
	alistair.francis@wdc.com,
	stefanb@linux.vnet.ibm.com,
	kwolf@redhat.com,
	hreitz@redhat.com,
	sw@weilnetz.de,
	qemu_oss@crudebyte.com,
	groug@kaod.org,
	mst@redhat.com,
	imammedo@redhat.com,
	anisinha@redhat.com,
	kraxel@redhat.com,
	shentey@gmail.com,
	npiggin@gmail.com,
	harshpb@linux.ibm.com,
	sstabellini@kernel.org,
	anthony@xenproject.org,
	paul@xen.org,
	edgar.iglesias@gmail.com,
	elena.ufimtseva@oracle.com,
	jag.raman@oracle.com,
	sgarzare@redhat.com,
	pbonzini@redhat.com,
	fam@euphon.net,
	philmd@linaro.org,
	alex@shazbot.org,
	clg@redhat.com,
	peterx@redhat.com,
	farosas@suse.de,
	lizhijian@fujitsu.com,
	dave@treblig.org,
	jasowang@redhat.com,
	samuel.thibault@ens-lyon.org,
	michael.roth@amd.com,
	kkostiuk@redhat.com,
	zhao1.liu@intel.com,
	mtosatti@redhat.com,
	rathc@linux.ibm.com,
	palmer@dabbelt.com,
	liwei1518@gmail.com,
	dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com,
	marcandre.lureau@redhat.com,
	qemu-block@nongnu.org,
	qemu-ppc@nongnu.org,
	xen-devel@lists.xenproject.org,
	kvm@vger.kernel.org,
	qemu-riscv@nongnu.org
Subject: [PATCH 11/14] error: Use error_setg_errno() to improve error messages
Date: Thu, 20 Nov 2025 20:13:36 +0100
Message-ID: <20251120191339.756429-12-armbru@redhat.com>
In-Reply-To: <20251120191339.756429-1-armbru@redhat.com>
References: <20251120191339.756429-1-armbru@redhat.com>
MIME-Version: 1.0
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A few error messages show numeric errno codes.  Use error_setg_errno()
to show human-readable text instead.

Signed-off-by: Markus Armbruster 
---
 backends/cryptodev-lkcf.c   |  2 +-
 hw/ppc/spapr.c              |  6 +++---
 hw/vfio/migration-multifd.c |  5 +++--
 migration/rdma.c            |  3 +--
 net/l2tpv3.c                |  6 ++----
 target/riscv/kvm/kvm-cpu.c  | 11 ++++++-----
 6 files changed, 16 insertions(+), 17 deletions(-)

diff --git a/backends/cryptodev-lkcf.c b/backends/cryptodev-lkcf.c
index 97a8a8812c..40c7bd3c5a 100644
--- a/backends/cryptodev-lkcf.c
+++ b/backends/cryptodev-lkcf.c
@@ -218,7 +218,7 @@ static void cryptodev_lkcf_init(CryptoDevBackend *backend, Error **errp)
     }
     lkcf->eventfd = eventfd(0, 0);
     if (lkcf->eventfd < 0) {
-        error_setg(errp, "Failed to create eventfd: %d", errno);
+        error_setg_errno(errp, errno, "Failed to create eventfd");
         return;
     }
 
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 99b843ba2f..cdab822c88 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -2699,9 +2699,9 @@ static void spapr_set_vsmt_mode(SpaprMachineState *spapr, Error **errp)
         ret = kvmppc_set_smt_threads(spapr->vsmt);
         if (ret) {
             /* Looks like KVM isn't able to change VSMT mode */
-            error_setg(&local_err,
-                       "Failed to set KVM's VSMT mode to %d (errno %d)",
-                       spapr->vsmt, ret);
+            error_setg_errno(&local_err, -ret,
+                             "Failed to set KVM's VSMT mode to %d",
+                             spapr->vsmt);
             /* We can live with that if the default one is big enough
              * for the number of threads, and a submultiple of the one
              * we want.  In this case we'll waste some vcpu ids, but
diff --git a/hw/vfio/migration-multifd.c b/hw/vfio/migration-multifd.c
index e4785031a7..4a855f4e12 100644
--- a/hw/vfio/migration-multifd.c
+++ b/hw/vfio/migration-multifd.c
@@ -725,8 +725,9 @@ vfio_multifd_save_complete_precopy_thread(SaveCompletePrecopyThreadData *d,
         data_size = read(migration->data_fd, &packet->data,
                          migration->data_buffer_size);
         if (data_size < 0) {
-            error_setg(errp, "%s: reading state buffer %" PRIu32 " failed: %d",
-                       vbasedev->name, idx, errno);
+            error_setg_errno(errp, errno,
+                             "%s: reading state buffer %" PRIu32 " failed",
+                             vbasedev->name, idx);
             goto thread_exit;
         } else if (data_size == 0) {
             break;
diff --git a/migration/rdma.c b/migration/rdma.c
index 337b415889..ef4885ef5f 100644
--- a/migration/rdma.c
+++ b/migration/rdma.c
@@ -2349,8 +2349,7 @@ static int qemu_get_cm_event_timeout(RDMAContext *rdma,
         error_setg(errp, "RDMA ERROR: poll cm event timeout");
         return -1;
     } else if (ret < 0) {
-        error_setg(errp, "RDMA ERROR: failed to poll cm event, errno=%i",
-                   errno);
+        error_setg_errno(errp, "RDMA ERROR: failed to poll cm event");
         return -1;
     } else if (poll_fd.revents & POLLIN) {
         if (rdma_get_cm_event(rdma->channel, cm_event) < 0) {
diff --git a/net/l2tpv3.c b/net/l2tpv3.c
index cdfc641aa6..3044fa4608 100644
--- a/net/l2tpv3.c
+++ b/net/l2tpv3.c
@@ -639,13 +639,11 @@ int net_init_l2tpv3(const Netdev *netdev,
     }
     fd = socket(result->ai_family, result->ai_socktype, result->ai_protocol);
     if (fd == -1) {
-        fd = -errno;
-        error_setg(errp, "socket creation failed, errno = %d",
-                   -fd);
+        error_setg_errno(errp, errno, "socket creation failed");
         goto outerr;
     }
     if (bind(fd, (struct sockaddr *) result->ai_addr, result->ai_addrlen)) {
-        error_setg(errp, "could not bind socket err=%i", errno);
+        error_setg_errno(errp, errno, "could not bind socket");
         goto outerr;
     }
     if (!qemu_set_blocking(fd, false, errp)) {
diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c
index 47e672c7aa..c73f1cd5cf 100644
--- a/target/riscv/kvm/kvm-cpu.c
+++ b/target/riscv/kvm/kvm-cpu.c
@@ -1996,8 +1996,8 @@ static bool kvm_cpu_realize(CPUState *cs, Error **errp)
     if (riscv_has_ext(&cpu->env, RVV)) {
         ret = prctl(PR_RISCV_V_SET_CONTROL, PR_RISCV_V_VSTATE_CTRL_ON);
         if (ret) {
-            error_setg(errp, "Error in prctl PR_RISCV_V_SET_CONTROL, code: %s",
-                       strerrorname_np(errno));
+            error_setg_errno(errp, errno,
+                             "Error in prctl PR_RISCV_V_SET_CONTROL");
             return false;
         }
     }
@@ -2032,7 +2032,8 @@ void riscv_kvm_cpu_finalize_features(RISCVCPU *cpu, Error **errp)
         reg.addr = (uint64_t)&val;
         ret = ioctl(kvmcpu.cpufd, KVM_GET_ONE_REG, ®);
         if (ret != 0) {
-            error_setg(errp, "Unable to read cbom_blocksize, error %d", errno);
+            error_setg(errp, errno,
+                       "Unable to read cbom_blocksize");
             return;
         }
 
@@ -2051,7 +2052,7 @@ void riscv_kvm_cpu_finalize_features(RISCVCPU *cpu, Error **errp)
         reg.addr = (uint64_t)&val;
         ret = ioctl(kvmcpu.cpufd, KVM_GET_ONE_REG, ®);
         if (ret != 0) {
-            error_setg(errp, "Unable to read cboz_blocksize, error %d", errno);
+            error_setg_errno(errp, errno, "Unable to read cboz_blocksize");
             return;
         }
 
@@ -2073,7 +2074,7 @@ void riscv_kvm_cpu_finalize_features(RISCVCPU *cpu, Error **errp)
         reg.addr = (uint64_t)&val;
         ret = ioctl(kvmcpu.cpufd, KVM_GET_ONE_REG, ®);
         if (ret != 0) {
-            error_setg(errp, "Unable to read vlenb register, error %d", errno);
+            error_setg_errno(errp, errno, "Unable to read vlenb register");
             return;
         }
 
-- 
2.49.0



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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com,
	pizhenwei@bytedance.com,
	alistair.francis@wdc.com,
	stefanb@linux.vnet.ibm.com,
	kwolf@redhat.com,
	hreitz@redhat.com,
	sw@weilnetz.de,
	qemu_oss@crudebyte.com,
	groug@kaod.org,
	mst@redhat.com,
	imammedo@redhat.com,
	anisinha@redhat.com,
	kraxel@redhat.com,
	shentey@gmail.com,
	npiggin@gmail.com,
	harshpb@linux.ibm.com,
	sstabellini@kernel.org,
	anthony@xenproject.org,
	paul@xen.org,
	edgar.iglesias@gmail.com,
	elena.ufimtseva@oracle.com,
	jag.raman@oracle.com,
	sgarzare@redhat.com,
	pbonzini@redhat.com,
	fam@euphon.net,
	philmd@linaro.org,
	alex@shazbot.org,
	clg@redhat.com,
	peterx@redhat.com,
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	lizhijian@fujitsu.com,
	dave@treblig.org,
	jasowang@redhat.com,
	samuel.thibault@ens-lyon.org,
	michael.roth@amd.com,
	kkostiuk@redhat.com,
	zhao1.liu@intel.com,
	mtosatti@redhat.com,
	rathc@linux.ibm.com,
	palmer@dabbelt.com,
	liwei1518@gmail.com,
	dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com,
	marcandre.lureau@redhat.com,
	qemu-block@nongnu.org,
	qemu-ppc@nongnu.org,
	xen-devel@lists.xenproject.org,
	kvm@vger.kernel.org,
	qemu-riscv@nongnu.org
Subject: [PATCH 00/14] Error message improvements
Date: Thu, 20 Nov 2025 20:13:25 +0100
Message-ID: <20251120191339.756429-1-armbru@redhat.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4

Markus Armbruster (14):
  error: Strip trailing '\n' from error string arguments (again)
  hw/usb: Use error_setg_file_open() for a better error message
  tap-solaris: Use error_setg_file_open() for better error messages
  qga: Use error_setg_file_open() for better error messages
  hw/scsi: Use error_setg_file_open() for a better error message
  hw/virtio: Use error_setg_file_open() for a better error message
  net/tap: Use error_setg_file_open() for a better error message
  blkdebug: Use error_setg_file_open() for a better error message
  error: Use error_setg_file_open() for simplicity and consistency
  net/slirp: Improve file open error message
  error: Use error_setg_errno() to improve error messages
  error: Use error_setg_errno() for simplicity and consistency
  qga/commands-win32: Use error_setg_win32() for better error messages
  block/file-win32: Improve an error message

 backends/cryptodev-lkcf.c   |  2 +-
 backends/spdm-socket.c      |  4 ++--
 backends/tpm/tpm_emulator.c | 13 +++++--------
 block/blkdebug.c            |  2 +-
 block/file-win32.c          |  2 +-
 hw/9pfs/9p-local.c          |  2 +-
 hw/9pfs/9p.c                |  3 +--
 hw/acpi/core.c              |  5 ++---
 hw/audio/es1370.c           |  2 +-
 hw/core/loader.c            |  2 +-
 hw/intc/openpic_kvm.c       |  3 +--
 hw/intc/xics_kvm.c          |  5 +++--
 hw/pci-host/xen_igd_pt.c    |  2 +-
 hw/ppc/spapr.c              |  6 +++---
 hw/remote/vfio-user-obj.c   | 18 +++++++++---------
 hw/scsi/vhost-scsi.c        |  3 +--
 hw/sensor/emc141x.c         |  4 ++--
 hw/sensor/tmp421.c          |  4 ++--
 hw/smbios/smbios.c          |  4 ++--
 hw/usb/bus.c                |  2 +-
 hw/vfio/migration-multifd.c |  5 +++--
 hw/virtio/vdpa-dev.c        |  4 ++--
 hw/virtio/vhost-vsock.c     |  3 +--
 migration/postcopy-ram.c    | 10 +++++-----
 migration/rdma.c            |  3 +--
 monitor/hmp-cmds-target.c   |  2 +-
 net/dump.c                  |  2 +-
 net/l2tpv3.c                |  6 ++----
 net/slirp.c                 |  9 ++++++---
 net/tap-bsd.c               |  6 +++---
 net/tap-linux.c             |  2 +-
 net/tap-solaris.c           |  6 +++---
 net/tap.c                   |  3 +--
 qga/commands-linux.c        | 11 ++++++-----
 qga/commands-posix-ssh.c    | 23 +++++++++++++----------
 qga/commands-win32.c        | 16 ++++++++--------
 system/vl.c                 |  2 +-
 target/i386/sev.c           |  6 ++----
 target/ppc/kvm.c            |  5 ++---
 target/riscv/kvm/kvm-cpu.c  | 11 ++++++-----
 ui/gtk.c                    |  2 +-
 ui/ui-qmp-cmds.c            |  3 +--
 util/vfio-helpers.c         |  5 ++---
 43 files changed, 113 insertions(+), 120 deletions(-)

-- 
2.49.0



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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com,
	pizhenwei@bytedance.com,
	alistair.francis@wdc.com,
	stefanb@linux.vnet.ibm.com,
	kwolf@redhat.com,
	hreitz@redhat.com,
	sw@weilnetz.de,
	qemu_oss@crudebyte.com,
	groug@kaod.org,
	mst@redhat.com,
	imammedo@redhat.com,
	anisinha@redhat.com,
	kraxel@redhat.com,
	shentey@gmail.com,
	npiggin@gmail.com,
	harshpb@linux.ibm.com,
	sstabellini@kernel.org,
	anthony@xenproject.org,
	paul@xen.org,
	edgar.iglesias@gmail.com,
	elena.ufimtseva@oracle.com,
	jag.raman@oracle.com,
	sgarzare@redhat.com,
	pbonzini@redhat.com,
	fam@euphon.net,
	philmd@linaro.org,
	alex@shazbot.org,
	clg@redhat.com,
	peterx@redhat.com,
	farosas@suse.de,
	lizhijian@fujitsu.com,
	dave@treblig.org,
	jasowang@redhat.com,
	samuel.thibault@ens-lyon.org,
	michael.roth@amd.com,
	kkostiuk@redhat.com,
	zhao1.liu@intel.com,
	mtosatti@redhat.com,
	rathc@linux.ibm.com,
	palmer@dabbelt.com,
	liwei1518@gmail.com,
	dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com,
	marcandre.lureau@redhat.com,
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	qemu-ppc@nongnu.org,
	xen-devel@lists.xenproject.org,
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	qemu-riscv@nongnu.org
Subject: [PATCH 13/14] qga/commands-win32: Use error_setg_win32() for better error messages
Date: Thu, 20 Nov 2025 20:13:38 +0100
Message-ID: <20251120191339.756429-14-armbru@redhat.com>
In-Reply-To: <20251120191339.756429-1-armbru@redhat.com>
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We include numeric GetLastError() codes in error messages in a few
places, like this:

    error_setg(errp, "GRIPE: %d", (int)GetLastError());

Show text instead, like this:

    error_setg_win32(errp, GetLastError(), "GRIPE");

Signed-off-by: Markus Armbruster 
---
 qga/commands-win32.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/qga/commands-win32.c b/qga/commands-win32.c
index acc2c11589..0fd0c966e4 100644
--- a/qga/commands-win32.c
+++ b/qga/commands-win32.c
@@ -1798,8 +1798,8 @@ void qmp_guest_set_time(bool has_time, int64_t time_ns, Error **errp)
     tf.dwHighDateTime = (DWORD) (time >> 32);
 
     if (!FileTimeToSystemTime(&tf, &ts)) {
-        error_setg(errp, "Failed to convert system time %d",
-                   (int)GetLastError());
+        error_setg_win32(errp, GetLastError(),
+                         "Failed to convert system time");
         return;
     }
 
@@ -1810,7 +1810,8 @@ void qmp_guest_set_time(bool has_time, int64_t time_ns, Error **errp)
     }
 
     if (!SetSystemTime(&ts)) {
-        error_setg(errp, "Failed to set time to guest: %d", (int)GetLastError());
+        error_setg_win32(errp, GetLastError(),
+                         "Failed to set time to guest");
         return;
     }
 }
@@ -1834,13 +1835,12 @@ GuestLogicalProcessorList *qmp_guest_get_vcpus(Error **errp)
         (length > sizeof(SYSTEM_LOGICAL_PROCESSOR_INFORMATION))) {
         ptr = pslpi = g_malloc0(length);
         if (GetLogicalProcessorInformation(pslpi, &length) == FALSE) {
-            error_setg(&local_err, "Failed to get processor information: %d",
-                       (int)GetLastError());
+            error_setg_win32(&local_err, GetLastError(),
+                             "Failed to get processor information");
         }
     } else {
-        error_setg(&local_err,
-                   "Failed to get processor information buffer length: %d",
-                   (int)GetLastError());
+        error_setg_win32(&local_err, GetLastError(),
+                         "Failed to get processor information buffer length");
     }
 
     while ((local_err == NULL) && (length > 0)) {
-- 
2.49.0



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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com,
	pizhenwei@bytedance.com,
	alistair.francis@wdc.com,
	stefanb@linux.vnet.ibm.com,
	kwolf@redhat.com,
	hreitz@redhat.com,
	sw@weilnetz.de,
	qemu_oss@crudebyte.com,
	groug@kaod.org,
	mst@redhat.com,
	imammedo@redhat.com,
	anisinha@redhat.com,
	kraxel@redhat.com,
	shentey@gmail.com,
	npiggin@gmail.com,
	harshpb@linux.ibm.com,
	sstabellini@kernel.org,
	anthony@xenproject.org,
	paul@xen.org,
	edgar.iglesias@gmail.com,
	elena.ufimtseva@oracle.com,
	jag.raman@oracle.com,
	sgarzare@redhat.com,
	pbonzini@redhat.com,
	fam@euphon.net,
	philmd@linaro.org,
	alex@shazbot.org,
	clg@redhat.com,
	peterx@redhat.com,
	farosas@suse.de,
	lizhijian@fujitsu.com,
	dave@treblig.org,
	jasowang@redhat.com,
	samuel.thibault@ens-lyon.org,
	michael.roth@amd.com,
	kkostiuk@redhat.com,
	zhao1.liu@intel.com,
	mtosatti@redhat.com,
	rathc@linux.ibm.com,
	palmer@dabbelt.com,
	liwei1518@gmail.com,
	dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com,
	marcandre.lureau@redhat.com,
	qemu-block@nongnu.org,
	qemu-ppc@nongnu.org,
	xen-devel@lists.xenproject.org,
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Subject: [PATCH 14/14] block/file-win32: Improve an error message
Date: Thu, 20 Nov 2025 20:13:39 +0100
Message-ID: <20251120191339.756429-15-armbru@redhat.com>
In-Reply-To: <20251120191339.756429-1-armbru@redhat.com>
References: <20251120191339.756429-1-armbru@redhat.com>
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Two out of three calls of CreateFile() use error_setg_win32() to
report errors.  The third uses error_setg_errno(), mapping
ERROR_ACCESS_DENIED to EACCES, and everything else to EINVAL, throwing
away detail.  Switch it to error_setg_win32().

Signed-off-by: Markus Armbruster 
---
 block/file-win32.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/block/file-win32.c b/block/file-win32.c
index 0efb609e1d..78961837c8 100644
--- a/block/file-win32.c
+++ b/block/file-win32.c
@@ -904,7 +904,7 @@ static int hdev_open(BlockDriverState *bs, QDict *options, int flags,
         } else {
             ret = -EINVAL;
         }
-        error_setg_errno(errp, -ret, "Could not open device");
+        error_setg_win32(errp, err, "Could not open device");
         goto done;
     }
 
-- 
2.49.0



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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com,
	pizhenwei@bytedance.com,
	alistair.francis@wdc.com,
	stefanb@linux.vnet.ibm.com,
	kwolf@redhat.com,
	hreitz@redhat.com,
	sw@weilnetz.de,
	qemu_oss@crudebyte.com,
	groug@kaod.org,
	mst@redhat.com,
	imammedo@redhat.com,
	anisinha@redhat.com,
	kraxel@redhat.com,
	shentey@gmail.com,
	npiggin@gmail.com,
	harshpb@linux.ibm.com,
	sstabellini@kernel.org,
	anthony@xenproject.org,
	paul@xen.org,
	edgar.iglesias@gmail.com,
	elena.ufimtseva@oracle.com,
	jag.raman@oracle.com,
	sgarzare@redhat.com,
	pbonzini@redhat.com,
	fam@euphon.net,
	philmd@linaro.org,
	alex@shazbot.org,
	clg@redhat.com,
	peterx@redhat.com,
	farosas@suse.de,
	lizhijian@fujitsu.com,
	dave@treblig.org,
	jasowang@redhat.com,
	samuel.thibault@ens-lyon.org,
	michael.roth@amd.com,
	kkostiuk@redhat.com,
	zhao1.liu@intel.com,
	mtosatti@redhat.com,
	rathc@linux.ibm.com,
	palmer@dabbelt.com,
	liwei1518@gmail.com,
	dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com,
	marcandre.lureau@redhat.com,
	qemu-block@nongnu.org,
	qemu-ppc@nongnu.org,
	xen-devel@lists.xenproject.org,
	kvm@vger.kernel.org,
	qemu-riscv@nongnu.org
Subject: [PATCH 12/14] error: Use error_setg_errno() for simplicity and consistency
Date: Thu, 20 Nov 2025 20:13:37 +0100
Message-ID: <20251120191339.756429-13-armbru@redhat.com>
In-Reply-To: <20251120191339.756429-1-armbru@redhat.com>
References: <20251120191339.756429-1-armbru@redhat.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93

Use error_setg_errno() instead of passing the value of strerror() or
g_strerror() to error_setg().

The separator between the error message proper and the value of
strerror() changes from " : ", "", " - ", "- " to ": " in places.

Signed-off-by: Markus Armbruster 
---
 backends/spdm-socket.c      |  4 ++--
 backends/tpm/tpm_emulator.c | 13 +++++--------
 hw/9pfs/9p.c                |  3 +--
 hw/acpi/core.c              |  3 +--
 hw/intc/openpic_kvm.c       |  3 +--
 hw/intc/xics_kvm.c          |  5 +++--
 hw/remote/vfio-user-obj.c   | 18 +++++++++---------
 hw/sensor/emc141x.c         |  4 ++--
 hw/sensor/tmp421.c          |  4 ++--
 hw/smbios/smbios.c          |  4 ++--
 hw/virtio/vdpa-dev.c        |  4 ++--
 migration/postcopy-ram.c    | 10 +++++-----
 migration/rdma.c            |  2 +-
 net/slirp.c                 |  5 +++--
 qga/commands-posix-ssh.c    | 23 +++++++++++++----------
 system/vl.c                 |  2 +-
 target/ppc/kvm.c            |  5 ++---
 17 files changed, 55 insertions(+), 57 deletions(-)

diff --git a/backends/spdm-socket.c b/backends/spdm-socket.c
index 6d8f02d3b9..a12bc47f77 100644
--- a/backends/spdm-socket.c
+++ b/backends/spdm-socket.c
@@ -167,7 +167,7 @@ int spdm_socket_connect(uint16_t port, Error **errp)
 
     client_socket = socket(AF_INET, SOCK_STREAM, IPPROTO_TCP);
     if (client_socket < 0) {
-        error_setg(errp, "cannot create socket: %s", strerror(errno));
+        error_setg_errno(errp, errno, "cannot create socket");
         return -1;
     }
 
@@ -179,7 +179,7 @@ int spdm_socket_connect(uint16_t port, Error **errp)
 
     if (connect(client_socket, (struct sockaddr *)&server_addr,
                 sizeof(server_addr)) < 0) {
-        error_setg(errp, "cannot connect: %s", strerror(errno));
+        error_setg_errno(errp, errno, "cannot connect");
         close(client_socket);
         return -1;
     }
diff --git a/backends/tpm/tpm_emulator.c b/backends/tpm/tpm_emulator.c
index f10b9074fb..f52cb4d435 100644
--- a/backends/tpm/tpm_emulator.c
+++ b/backends/tpm/tpm_emulator.c
@@ -225,8 +225,7 @@ static int tpm_emulator_set_locality(TPMEmulator *tpm_emu, uint8_t locty_number,
     if (tpm_emulator_ctrlcmd(tpm_emu, CMD_SET_LOCALITY, &loc,
                              sizeof(loc), sizeof(loc.u.resp.tpm_result),
                              sizeof(loc)) < 0) {
-        error_setg(errp, "tpm-emulator: could not set locality : %s",
-                   strerror(errno));
+        error_setg_errno(errp, errno, "tpm-emulator: could not set locality");
         return -1;
     }
 
@@ -315,8 +314,7 @@ static int tpm_emulator_stop_tpm(TPMBackend *tb, Error **errp)
 
     if (tpm_emulator_ctrlcmd(tpm_emu, CMD_STOP, &res, 0,
                              sizeof(ptm_res), sizeof(res)) < 0) {
-        error_setg(errp, "tpm-emulator: Could not stop TPM: %s",
-                   strerror(errno));
+        error_setg_errno(errp, errno, "tpm-emulator: Could not stop TPM");
         return -1;
     }
 
@@ -377,8 +375,8 @@ static int tpm_emulator_set_buffer_size(TPMBackend *tb,
     if (tpm_emulator_ctrlcmd(tpm_emu, CMD_SET_BUFFERSIZE, &psbs,
                              sizeof(psbs.u.req), sizeof(psbs.u.resp.tpm_result),
                              sizeof(psbs.u.resp)) < 0) {
-        error_setg(errp, "tpm-emulator: Could not set buffer size: %s",
-                   strerror(errno));
+        error_setg_errno(errp, errno,
+                         "tpm-emulator: Could not set buffer size");
         return -1;
     }
 
@@ -426,8 +424,7 @@ static int tpm_emulator_startup_tpm_resume(TPMBackend *tb, size_t buffersize,
     if (tpm_emulator_ctrlcmd(tpm_emu, CMD_INIT, &init, sizeof(init),
                              sizeof(init.u.resp.tpm_result),
                              sizeof(init)) < 0) {
-        error_setg(errp, "tpm-emulator: could not send INIT: %s",
-                   strerror(errno));
+        error_setg_errno(errp, errno, "tpm-emulator: could not send INIT");
         goto err_exit;
     }
 
diff --git a/hw/9pfs/9p.c b/hw/9pfs/9p.c
index bc4a016ee3..6fbe604ce8 100644
--- a/hw/9pfs/9p.c
+++ b/hw/9pfs/9p.c
@@ -4345,8 +4345,7 @@ int v9fs_device_realize_common(V9fsState *s, const V9fsTransport *t,
      * use co-routines here.
      */
     if (s->ops->name_to_path(&s->ctx, NULL, "/", &path) < 0) {
-        error_setg(errp,
-                   "error in converting name to path %s", strerror(errno));
+        error_setg_errno(errp, errno, "error in converting name to path");
         goto out;
     }
     if (s->ops->lstat(&s->ctx, &path, &stat)) {
diff --git a/hw/acpi/core.c b/hw/acpi/core.c
index d2677332af..82974eb257 100644
--- a/hw/acpi/core.c
+++ b/hw/acpi/core.c
@@ -293,8 +293,7 @@ void acpi_table_add(const QemuOpts *opts, Error **errp)
                 memcpy(blob + bloblen, data, r);
                 bloblen += r;
             } else if (errno != EINTR) {
-                error_setg(errp, "can't read file %s: %s", *cur,
-                           strerror(errno));
+                error_setg_errno(errp, errno, "can't read file %s", *cur);
                 close(fd);
                 goto out;
             }
diff --git a/hw/intc/openpic_kvm.c b/hw/intc/openpic_kvm.c
index 673ea9ca05..0c11bbc963 100644
--- a/hw/intc/openpic_kvm.c
+++ b/hw/intc/openpic_kvm.c
@@ -223,8 +223,7 @@ static void kvm_openpic_realize(DeviceState *dev, Error **errp)
     cd.type = kvm_openpic_model;
     ret = kvm_vm_ioctl(s, KVM_CREATE_DEVICE, &cd);
     if (ret < 0) {
-        error_setg(errp, "Can't create device %d: %s",
-                   cd.type, strerror(errno));
+        error_setg_errno(errp, errno, "Can't create device %d", cd.type);
         return;
     }
     opp->fd = cd.fd;
diff --git a/hw/intc/xics_kvm.c b/hw/intc/xics_kvm.c
index ee72969f5f..61f66d1019 100644
--- a/hw/intc/xics_kvm.c
+++ b/hw/intc/xics_kvm.c
@@ -165,8 +165,9 @@ void icp_kvm_realize(DeviceState *dev, Error **errp)
     if (ret < 0) {
         Error *local_err = NULL;
 
-        error_setg(&local_err, "Unable to connect CPU%ld to kernel XICS: %s",
-                   vcpu_id, strerror(errno));
+        error_setg_errno(&local_err, errno,
+                         "Unable to connect CPU%ld to kernel XICS",
+                         vcpu_id);
         if (errno == ENOSPC) {
             error_append_hint(&local_err, "Try -smp maxcpus=N with N < %u\n",
                               MACHINE(qdev_get_machine())->smp.max_cpus);
diff --git a/hw/remote/vfio-user-obj.c b/hw/remote/vfio-user-obj.c
index 216b4876e2..9ab02b7abc 100644
--- a/hw/remote/vfio-user-obj.c
+++ b/hw/remote/vfio-user-obj.c
@@ -751,7 +751,7 @@ static void vfu_object_init_ctx(VfuObject *o, Error **errp)
                                 LIBVFIO_USER_FLAG_ATTACH_NB,
                                 o, VFU_DEV_TYPE_PCI);
     if (o->vfu_ctx == NULL) {
-        error_setg(errp, "vfu: Failed to create context - %s", strerror(errno));
+        error_setg_errno(errp, errno, "vfu: Failed to create context");
         return;
     }
 
@@ -776,9 +776,9 @@ static void vfu_object_init_ctx(VfuObject *o, Error **errp)
 
     ret = vfu_pci_init(o->vfu_ctx, pci_type, PCI_HEADER_TYPE_NORMAL, 0);
     if (ret < 0) {
-        error_setg(errp,
-                   "vfu: Failed to attach PCI device %s to context - %s",
-                   o->device, strerror(errno));
+        error_setg_errno(errp, errno,
+                         "vfu: Failed to attach PCI device %s to context",
+                         o->device);
         goto fail;
     }
 
@@ -792,9 +792,9 @@ static void vfu_object_init_ctx(VfuObject *o, Error **errp)
                            VFU_REGION_FLAG_RW | VFU_REGION_FLAG_ALWAYS_CB,
                            NULL, 0, -1, 0);
     if (ret < 0) {
-        error_setg(errp,
-                   "vfu: Failed to setup config space handlers for %s- %s",
-                   o->device, strerror(errno));
+        error_setg_errno(errp,
+                         "vfu: Failed to setup config space handlers for %s",
+                         o->device);
         goto fail;
     }
 
@@ -822,8 +822,8 @@ static void vfu_object_init_ctx(VfuObject *o, Error **errp)
 
     ret = vfu_realize_ctx(o->vfu_ctx);
     if (ret < 0) {
-        error_setg(errp, "vfu: Failed to realize device %s- %s",
-                   o->device, strerror(errno));
+        error_setg_errno(errp, "vfu: Failed to realize device %s",
+                         o->device);
         goto fail;
     }
 
diff --git a/hw/sensor/emc141x.c b/hw/sensor/emc141x.c
index 7b2ce383a1..a51fc44395 100644
--- a/hw/sensor/emc141x.c
+++ b/hw/sensor/emc141x.c
@@ -59,7 +59,7 @@ static void emc141x_get_temperature(Object *obj, Visitor *v, const char *name,
     unsigned tempid;
 
     if (sscanf(name, "temperature%u", &tempid) != 1) {
-        error_setg(errp, "error reading %s: %s", name, g_strerror(errno));
+        error_setg_errno(errp, errno, "error reading %s", name);
         return;
     }
 
@@ -86,7 +86,7 @@ static void emc141x_set_temperature(Object *obj, Visitor *v, const char *name,
     }
 
     if (sscanf(name, "temperature%u", &tempid) != 1) {
-        error_setg(errp, "error reading %s: %s", name, g_strerror(errno));
+        error_setg_errno(errp, errno, "error reading %s", name);
         return;
     }
 
diff --git a/hw/sensor/tmp421.c b/hw/sensor/tmp421.c
index 3421c44086..127edd0ba5 100644
--- a/hw/sensor/tmp421.c
+++ b/hw/sensor/tmp421.c
@@ -117,7 +117,7 @@ static void tmp421_get_temperature(Object *obj, Visitor *v, const char *name,
     int tempid;
 
     if (sscanf(name, "temperature%d", &tempid) != 1) {
-        error_setg(errp, "error reading %s: %s", name, g_strerror(errno));
+        error_setg_errno(errp, errno, "error reading %s", name);
         return;
     }
 
@@ -154,7 +154,7 @@ static void tmp421_set_temperature(Object *obj, Visitor *v, const char *name,
     }
 
     if (sscanf(name, "temperature%d", &tempid) != 1) {
-        error_setg(errp, "error reading %s: %s", name, g_strerror(errno));
+        error_setg_errno(errp, errno, "error reading %s", name);
         return;
     }
 
diff --git a/hw/smbios/smbios.c b/hw/smbios/smbios.c
index 7558b2ad83..b228f9eb85 100644
--- a/hw/smbios/smbios.c
+++ b/hw/smbios/smbios.c
@@ -1281,8 +1281,8 @@ static int save_opt_one(void *opaque,
                 break;
             }
             if (ret < 0) {
-                error_setg(errp, "Unable to read from %s: %s",
-                           value, strerror(errno));
+                error_setg_errno(errp, errno, "Unable to read from %s",
+                                 value);
                 qemu_close(fd);
                 return -1;
             }
diff --git a/hw/virtio/vdpa-dev.c b/hw/virtio/vdpa-dev.c
index 4a7b970976..f97d576171 100644
--- a/hw/virtio/vdpa-dev.c
+++ b/hw/virtio/vdpa-dev.c
@@ -41,8 +41,8 @@ vhost_vdpa_device_get_u32(int fd, unsigned long int cmd, Error **errp)
     uint32_t val = (uint32_t)-1;
 
     if (ioctl(fd, cmd, &val) < 0) {
-        error_setg(errp, "vhost-vdpa-device: cmd 0x%lx failed: %s",
-                   cmd, strerror(errno));
+        error_setg_errno(errp, errno, "vhost-vdpa-device: cmd 0x%lx failed",
+                         cmd);
     }
 
     return val;
diff --git a/migration/postcopy-ram.c b/migration/postcopy-ram.c
index 3f98dcb6fd..5454372ac6 100644
--- a/migration/postcopy-ram.c
+++ b/migration/postcopy-ram.c
@@ -582,7 +582,7 @@ bool postcopy_ram_supported_by_host(MigrationIncomingState *mis, Error **errp)
 
     ufd = uffd_open(O_CLOEXEC);
     if (ufd == -1) {
-        error_setg(errp, "Userfaultfd not available: %s", strerror(errno));
+        error_setg_errno(errp, errno, "Userfaultfd not available");
         goto out;
     }
 
@@ -620,7 +620,7 @@ bool postcopy_ram_supported_by_host(MigrationIncomingState *mis, Error **errp)
      * it was enabled.
      */
     if (munlockall()) {
-        error_setg(errp, "munlockall() failed: %s", strerror(errno));
+        error_setg_errno(errp, errno, "munlockall() failed");
         goto out;
     }
 
@@ -632,7 +632,7 @@ bool postcopy_ram_supported_by_host(MigrationIncomingState *mis, Error **errp)
     testarea = mmap(NULL, pagesize, PROT_READ | PROT_WRITE, MAP_PRIVATE |
                                     MAP_ANONYMOUS, -1, 0);
     if (testarea == MAP_FAILED) {
-        error_setg(errp, "Failed to map test area: %s", strerror(errno));
+        error_setg_errno(errp, errno, "Failed to map test area");
         goto out;
     }
     g_assert(QEMU_PTR_IS_ALIGNED(testarea, pagesize));
@@ -642,14 +642,14 @@ bool postcopy_ram_supported_by_host(MigrationIncomingState *mis, Error **errp)
     reg_struct.mode = UFFDIO_REGISTER_MODE_MISSING;
 
     if (ioctl(ufd, UFFDIO_REGISTER, ®_struct)) {
-        error_setg(errp, "UFFDIO_REGISTER failed: %s", strerror(errno));
+        error_setg_errno(errp, errno, "UFFDIO_REGISTER failed");
         goto out;
     }
 
     range_struct.start = (uintptr_t)testarea;
     range_struct.len = pagesize;
     if (ioctl(ufd, UFFDIO_UNREGISTER, &range_struct)) {
-        error_setg(errp, "UFFDIO_UNREGISTER failed: %s", strerror(errno));
+        error_setg_errno(errp, errno, "UFFDIO_UNREGISTER failed");
         goto out;
     }
 
diff --git a/migration/rdma.c b/migration/rdma.c
index ef4885ef5f..9e301cf917 100644
--- a/migration/rdma.c
+++ b/migration/rdma.c
@@ -2349,7 +2349,7 @@ static int qemu_get_cm_event_timeout(RDMAContext *rdma,
         error_setg(errp, "RDMA ERROR: poll cm event timeout");
         return -1;
     } else if (ret < 0) {
-        error_setg_errno(errp, "RDMA ERROR: failed to poll cm event");
+        error_setg_errno(errp, errno, "RDMA ERROR: failed to poll cm event");
         return -1;
     } else if (poll_fd.revents & POLLIN) {
         if (rdma_get_cm_event(rdma->channel, cm_event) < 0) {
diff --git a/net/slirp.c b/net/slirp.c
index 5996fec512..04925f3318 100644
--- a/net/slirp.c
+++ b/net/slirp.c
@@ -1020,8 +1020,9 @@ static int slirp_smb(SlirpState* s, const char *exported_dir,
     }
 
     if (access(exported_dir, R_OK | X_OK)) {
-        error_setg(errp, "Error accessing shared directory '%s': %s",
-                   exported_dir, strerror(errno));
+        error_setg_errno(errp, errno,
+                         "Error accessing shared directory '%s'",
+                         exported_dir);
         return -1;
     }
 
diff --git a/qga/commands-posix-ssh.c b/qga/commands-posix-ssh.c
index 246171d323..661972e34e 100644
--- a/qga/commands-posix-ssh.c
+++ b/qga/commands-posix-ssh.c
@@ -61,20 +61,22 @@ mkdir_for_user(const char *path, const struct passwd *p,
                mode_t mode, Error **errp)
 {
     if (g_mkdir(path, mode) == -1) {
-        error_setg(errp, "failed to create directory '%s': %s",
-                   path, g_strerror(errno));
+        error_setg_errno(errp, errno, "failed to create directory '%s'",
+                         path);
         return false;
     }
 
     if (chown(path, p->pw_uid, p->pw_gid) == -1) {
-        error_setg(errp, "failed to set ownership of directory '%s': %s",
-                   path, g_strerror(errno));
+        error_setg_errno(errp, errno,
+                         "failed to set ownership of directory '%s'",
+                         path);
         return false;
     }
 
     if (chmod(path, mode) == -1) {
-        error_setg(errp, "failed to set permissions of directory '%s': %s",
-                   path, g_strerror(errno));
+        error_setg_errno(errp, errno,
+                         "failed to set permissions of directory '%s'",
+                         path);
         return false;
     }
 
@@ -95,14 +97,15 @@ write_authkeys(const char *path, const GStrv keys,
     }
 
     if (chown(path, p->pw_uid, p->pw_gid) == -1) {
-        error_setg(errp, "failed to set ownership of directory '%s': %s",
-                   path, g_strerror(errno));
+        error_setg_errno(errp, errno,
+                         "failed to set ownership of directory '%s'",
+                         path);
         return false;
     }
 
     if (chmod(path, 0600) == -1) {
-        error_setg(errp, "failed to set permissions of '%s': %s",
-                   path, g_strerror(errno));
+        error_setg_errno(errp, errno, "failed to set permissions of '%s'",
+                         path);
         return false;
     }
 
diff --git a/system/vl.c b/system/vl.c
index 5091fe52d9..2ef5b4b3b2 100644
--- a/system/vl.c
+++ b/system/vl.c
@@ -619,7 +619,7 @@ static int parse_add_fd(void *opaque, QemuOpts *opts, Error **errp)
     }
 #endif
     if (dupfd == -1) {
-        error_setg(errp, "error duplicating fd: %s", strerror(errno));
+        error_setg_errno(errp, errno, "error duplicating fd");
         return -1;
     }
 
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index 43124bf1c7..3501b5d546 100644
--- a/target/ppc/kvm.c
+++ b/target/ppc/kvm.c
@@ -2699,9 +2699,8 @@ int kvmppc_get_htab_fd(bool write, uint64_t index, Error **errp)
 
     ret = kvm_vm_ioctl(kvm_state, KVM_PPC_GET_HTAB_FD, &s);
     if (ret < 0) {
-        error_setg(errp, "Unable to open fd for %s HPT %s KVM: %s",
-                   write ? "writing" : "reading", write ? "to" : "from",
-                   strerror(errno));
+        error_setg_errno(errp, errno, "Unable to open fd for %s HPT %s KVM",
+                   write ? "writing" : "reading", write ? "to" : "from");
         return -errno;
     }
 
-- 
2.49.0



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From: Nicola Vetrini 
To: xen-devel@lists.xenproject.org
Cc: andrew.cooper3@citrix.com,
	jbeulich@suse.com,
	sstabellini@kernel.org,
	Nicola Vetrini ,
	Dario Faggioli ,
	Juergen Gross ,
	George Dunlap 
Subject: [PATCH 2/4] xen/sched: address violation of MISRA C Rule 16.3
Date: Thu, 20 Nov 2025 20:32:54 +0100
Message-ID: <60e3bd1ba6ab3bc47d3a95ddf1e3e7ef71db5f3d.1763642993.git.nicola.vetrini@gmail.com>
X-Mailer: git-send-email 2.51.2
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References: 
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit

The rule states: An unconditional `break' statement shall terminate
every switch-clause.

Use the `fallthrough' pseudo-keyword for which an ECLAIR deviation
is already in place.

No functional change.

Signed-off-by: Nicola Vetrini 
---
 xen/common/sched/credit.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/common/sched/credit.c b/xen/common/sched/credit.c
index 6dcf6b2c8b..e9a91d11c3 100644
--- a/xen/common/sched/credit.c
+++ b/xen/common/sched/credit.c
@@ -1288,7 +1288,7 @@ csched_sys_cntl(const struct scheduler *ops,
         prv->unit_migr_delay = MICROSECS(params->vcpu_migr_delay_us);
         spin_unlock_irqrestore(&prv->lock, flags);
 
-        /* FALLTHRU */
+        fallthrough;
     case XEN_SYSCTL_SCHEDOP_getinfo:
         params->tslice_ms = prv->tslice / MILLISECS(1);
         params->ratelimit_us = prv->ratelimit / MICROSECS(1);
-- 
2.51.2



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From: Nicola Vetrini 
To: xen-devel@lists.xenproject.org
Cc: andrew.cooper3@citrix.com,
	jbeulich@suse.com,
	sstabellini@kernel.org,
	Nicola Vetrini ,
	"Daniel P. Smith" ,
	Dario Faggioli ,
	Juergen Gross ,
	George Dunlap ,
	Anthony PERARD ,
	Michal Orzel ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH 0/4] Misc MISRA fixes for default Xen build configurations
Date: Thu, 20 Nov 2025 20:32:52 +0100
Message-ID: 
X-Mailer: git-send-email 2.51.2
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This series addresses some of the violations found by widening the scope of
application of MISRA checking to default builds of Xen for both ARM64 and x86_64.

While it has been tested on top of a patch yet to be applied (but with
the necessary R-by [1]) these fixes can go in independently of that.

As evidenced by the CI pipeline below, there are a number of regressions on
guidelines that were clean on the restricted scope but are not in the wider one;
the patches in this series address a subset of those.

CI pipeline: https://gitlab.com/xen-project/people/bugseng/xen/-/pipelines/2156782159

[1] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2511031448530.495094@ubuntu-linux-20-04-desktop/

Nicola Vetrini (4):
  xen/xsm: address violations of MISRA C rules 8.3 and 7.2
  xen/sched: address violation of MISRA C Rule 16.3
  xen/param: address violation of MISRA C Rule 20.7
  xen/param: address violation of MISRA C Rule 8.2

 xen/common/sched/credit.c | 2 +-
 xen/include/xen/param.h   | 6 +++---
 xen/include/xsm/xsm.h     | 6 +++---
 3 files changed, 7 insertions(+), 7 deletions(-)

-- 
2.51.2



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From: Nicola Vetrini 
To: xen-devel@lists.xenproject.org
Cc: andrew.cooper3@citrix.com,
	jbeulich@suse.com,
	sstabellini@kernel.org,
	Nicola Vetrini ,
	Anthony PERARD ,
	Michal Orzel ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH 4/4] xen/param: address violation of MISRA C Rule 8.2
Date: Thu, 20 Nov 2025 20:32:56 +0100
Message-ID: 
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add missing parameter name in function pointer member declaration.

No functional change.

Signed-off-by: Nicola Vetrini 
---
 xen/include/xen/param.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/include/xen/param.h b/xen/include/xen/param.h
index f5a2189400..3b6f134b07 100644
--- a/xen/include/xen/param.h
+++ b/xen/include/xen/param.h
@@ -90,7 +90,7 @@ extern const struct kernel_param __setup_start[], __setup_end[];
 struct param_hypfs {
     struct hypfs_entry_leaf hypfs;
     void (*init_leaf)(struct param_hypfs *par);
-    int (*func)(const char *);
+    int (*func)(const char *s);
 };
 
 extern struct param_hypfs __paramhypfs_start[], __paramhypfs_end[];
-- 
2.51.2



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From: Nicola Vetrini 
To: xen-devel@lists.xenproject.org
Cc: andrew.cooper3@citrix.com,
	jbeulich@suse.com,
	sstabellini@kernel.org,
	Nicola Vetrini ,
	Anthony PERARD ,
	Michal Orzel ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH 3/4] xen/param: address violation of MISRA C Rule 20.7
Date: Thu, 20 Nov 2025 20:32:55 +0100
Message-ID: 
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The rule states: Expressions resulting from the expansion of
macro parameters shall be enclosed in parentheses.

Add parentheses in the defition of `custom_runtime_var_sz' to
address the violations.

No functional change.

Signed-off-by: Nicola Vetrini 
---
 xen/include/xen/param.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/xen/include/xen/param.h b/xen/include/xen/param.h
index 1bdbab34ab..f5a2189400 100644
--- a/xen/include/xen/param.h
+++ b/xen/include/xen/param.h
@@ -102,8 +102,8 @@ extern struct param_hypfs __paramhypfs_start[], __paramhypfs_end[];
 
 #define custom_runtime_set_var_sz(parfs, var, sz) \
     { \
-        (parfs)->hypfs.u.content = var; \
-        (parfs)->hypfs.e.max_size = sz; \
+        (parfs)->hypfs.u.content = (var); \
+        (parfs)->hypfs.e.max_size = (sz); \
         (parfs)->hypfs.e.size = strlen(var) + 1; \
     }
 #define custom_runtime_set_var(parfs, var) \
-- 
2.51.2



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From: Nicola Vetrini 
To: xen-devel@lists.xenproject.org
Cc: andrew.cooper3@citrix.com,
	jbeulich@suse.com,
	sstabellini@kernel.org,
	Nicola Vetrini ,
	"Daniel P. Smith" 
Subject: [PATCH 1/4] xen/xsm: address violations of MISRA C rules 8.3 and 7.2
Date: Thu, 20 Nov 2025 20:32:53 +0100
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Rule 8.3 states: Function types shall be in prototype form
with named parameters.

add parameter to 'has_xsm_magic' to make it consistent with the
definition.

Rule 7.2 states: A `u' or `U' suffix shall be applied to all
integer constants that are represented in an unsigned type.

add missing `U' to both #define for `XSM_MAGIC` for consistency.

No functional change.

Signed-off-by: Nicola Vetrini 
---
 xen/include/xsm/xsm.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/xen/include/xsm/xsm.h b/xen/include/xsm/xsm.h
index 9a23d2827c..074d61cd45 100644
--- a/xen/include/xsm/xsm.h
+++ b/xen/include/xsm/xsm.h
@@ -22,9 +22,9 @@
 typedef uint32_t xsm_magic_t;
 
 #ifdef CONFIG_XSM_FLASK
-#define XSM_MAGIC 0xf97cff8c
+#define XSM_MAGIC 0xf97cff8cU
 #else
-#define XSM_MAGIC 0x0
+#define XSM_MAGIC 0x0U
 #endif
 
 /*
@@ -815,7 +815,7 @@ int xsm_multiboot_policy_init(
  */
 int xsm_dt_init(void);
 int xsm_dt_policy_init(void **policy_buffer, size_t *policy_size);
-bool has_xsm_magic(paddr_t);
+bool has_xsm_magic(paddr_t start);
 #endif
 
 void xsm_fixup_ops(struct xsm_ops *ops);
-- 
2.51.2



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Date: Thu, 20 Nov 2025 23:57:13 +0000
From: "Dr. David Alan Gilbert" 
To: Markus Armbruster 
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Subject: Re: [PATCH 09/14] error: Use error_setg_file_open() for simplicity
 and consistency
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In-Reply-To: <20251120191339.756429-10-armbru@redhat.com>
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* Markus Armbruster (armbru@redhat.com) wrote:
> Replace
> 
>     error_setg_errno(errp, errno, MSG, FNAME);
> 
> by
> 
>     error_setg_file_open(errp, errno, FNAME);
> 
> where MSG is "Could not open '%s'" or similar.
> 
> Also replace equivalent uses of error_setg().
> 
> A few messages lose prefixes ("net dump: ", "SEV: ", __func__ ": ").
> We could put them back with error_prepend().  Not worth the bother.

Yeh, I guess you could just do it with another macro using
the same internal function just with string concatenation.

> Signed-off-by: Markus Armbruster 

Reviewed-by: Dr. David Alan Gilbert 

> ---
>  hw/9pfs/9p-local.c        | 2 +-
>  hw/acpi/core.c            | 2 +-
>  hw/core/loader.c          | 2 +-
>  hw/pci-host/xen_igd_pt.c  | 2 +-
>  monitor/hmp-cmds-target.c | 2 +-
>  net/dump.c                | 2 +-
>  net/tap-bsd.c             | 6 +++---
>  net/tap-linux.c           | 2 +-
>  target/i386/sev.c         | 6 ++----
>  ui/ui-qmp-cmds.c          | 3 +--
>  util/vfio-helpers.c       | 5 ++---
>  11 files changed, 15 insertions(+), 19 deletions(-)
> 
> diff --git a/hw/9pfs/9p-local.c b/hw/9pfs/9p-local.c
> index 31e216227c..376b377698 100644
> --- a/hw/9pfs/9p-local.c
> +++ b/hw/9pfs/9p-local.c
> @@ -1456,7 +1456,7 @@ static int local_init(FsContext *ctx, Error **errp)
>  
>      data->mountfd = open(ctx->fs_root, O_DIRECTORY | O_RDONLY);
>      if (data->mountfd == -1) {
> -        error_setg_errno(errp, errno, "failed to open '%s'", ctx->fs_root);
> +        error_setg_file_open(errp, errno, ctx->fs_root);
>          goto err;
>      }
>  
> diff --git a/hw/acpi/core.c b/hw/acpi/core.c
> index ff16582803..d2677332af 100644
> --- a/hw/acpi/core.c
> +++ b/hw/acpi/core.c
> @@ -277,7 +277,7 @@ void acpi_table_add(const QemuOpts *opts, Error **errp)
>          int fd = open(*cur, O_RDONLY | O_BINARY);
>  
>          if (fd < 0) {
> -            error_setg(errp, "can't open file %s: %s", *cur, strerror(errno));
> +            error_setg_file_open(errp, errno, *cur);
>              goto out;
>          }
>  
> diff --git a/hw/core/loader.c b/hw/core/loader.c
> index 590c5b02aa..b56e5eb2f5 100644
> --- a/hw/core/loader.c
> +++ b/hw/core/loader.c
> @@ -379,7 +379,7 @@ void load_elf_hdr(const char *filename, void *hdr, bool *is64, Error **errp)
>  
>      fd = open(filename, O_RDONLY | O_BINARY);
>      if (fd < 0) {
> -        error_setg_errno(errp, errno, "Failed to open file: %s", filename);
> +        error_setg_file_open(errp, errno, filename);
>          return;
>      }
>      if (read(fd, hdr, EI_NIDENT) != EI_NIDENT) {
> diff --git a/hw/pci-host/xen_igd_pt.c b/hw/pci-host/xen_igd_pt.c
> index 5dd17ef236..f6016f2cd5 100644
> --- a/hw/pci-host/xen_igd_pt.c
> +++ b/hw/pci-host/xen_igd_pt.c
> @@ -55,7 +55,7 @@ static void host_pci_config_read(int pos, int len, uint32_t *val, Error **errp)
>  
>      config_fd = open(path, O_RDWR);
>      if (config_fd < 0) {
> -        error_setg_errno(errp, errno, "Failed to open: %s", path);
> +        error_setg_file_open(errp, errno, path);
>          goto out;
>      }
>  
> diff --git a/monitor/hmp-cmds-target.c b/monitor/hmp-cmds-target.c
> index e982061146..ad4ed2167d 100644
> --- a/monitor/hmp-cmds-target.c
> +++ b/monitor/hmp-cmds-target.c
> @@ -331,7 +331,7 @@ static uint64_t vtop(void *ptr, Error **errp)
>  
>      fd = open("/proc/self/pagemap", O_RDONLY);
>      if (fd == -1) {
> -        error_setg_errno(errp, errno, "Cannot open /proc/self/pagemap");
> +        error_setg_file_open(errp, errno, "/proc/self/pagemap");
>          return -1;
>      }
>  
> diff --git a/net/dump.c b/net/dump.c
> index 581234b775..0c39f09892 100644
> --- a/net/dump.c
> +++ b/net/dump.c
> @@ -111,7 +111,7 @@ static int net_dump_state_init(DumpState *s, const char *filename,
>  
>      fd = open(filename, O_CREAT | O_TRUNC | O_WRONLY | O_BINARY, 0644);
>      if (fd < 0) {
> -        error_setg_errno(errp, errno, "net dump: can't open %s", filename);
> +        error_setg_file_open(errp, errno, filename);
>          return -1;
>      }
>  
> diff --git a/net/tap-bsd.c b/net/tap-bsd.c
> index bbf84d1828..3fd300d46f 100644
> --- a/net/tap-bsd.c
> +++ b/net/tap-bsd.c
> @@ -68,7 +68,7 @@ int tap_open(char *ifname, int ifname_size, int *vnet_hdr,
>          }
>      }
>      if (fd < 0) {
> -        error_setg_errno(errp, errno, "could not open %s", dname);
> +        error_setg_file_open(errp, errno, dname);
>          return -1;
>      }
>  
> @@ -118,7 +118,7 @@ static int tap_open_clone(char *ifname, int ifname_size, Error **errp)
>  
>      fd = RETRY_ON_EINTR(open(PATH_NET_TAP, O_RDWR));
>      if (fd < 0) {
> -        error_setg_errno(errp, errno, "could not open %s", PATH_NET_TAP);
> +        error_setg_file_open(errp, errno, PATH_NET_TAP);
>          return -1;
>      }
>  
> @@ -166,7 +166,7 @@ int tap_open(char *ifname, int ifname_size, int *vnet_hdr,
>          snprintf(dname, sizeof dname, "/dev/%s", ifname);
>          fd = RETRY_ON_EINTR(open(dname, O_RDWR));
>          if (fd < 0 && errno != ENOENT) {
> -            error_setg_errno(errp, errno, "could not open %s", dname);
> +            error_setg_file_open(errp, errno, dname);
>              return -1;
>          }
>      }
> diff --git a/net/tap-linux.c b/net/tap-linux.c
> index 2a90b58467..909c4f1fcf 100644
> --- a/net/tap-linux.c
> +++ b/net/tap-linux.c
> @@ -57,7 +57,7 @@ int tap_open(char *ifname, int ifname_size, int *vnet_hdr,
>      if (fd < 0) {
>          fd = RETRY_ON_EINTR(open(PATH_NET_TUN, O_RDWR));
>          if (fd < 0) {
> -            error_setg_errno(errp, errno, "could not open %s", PATH_NET_TUN);
> +            error_setg_file_open(errp, errno, PATH_NET_TUN);
>              return -1;
>          }
>      }
> diff --git a/target/i386/sev.c b/target/i386/sev.c
> index fd2dada013..8660ecd9e4 100644
> --- a/target/i386/sev.c
> +++ b/target/i386/sev.c
> @@ -891,8 +891,7 @@ static SevCapability *sev_get_capabilities(Error **errp)
>  
>      fd = open(sev_device, O_RDWR);
>      if (fd < 0) {
> -        error_setg_errno(errp, errno, "SEV: Failed to open %s",
> -                         sev_device);
> +        error_setg_file_open(errp, errno, sev_device);
>          g_free(sev_device);
>          return NULL;
>      }
> @@ -1819,8 +1818,7 @@ static int sev_common_kvm_init(ConfidentialGuestSupport *cgs, Error **errp)
>      devname = object_property_get_str(OBJECT(sev_common), "sev-device", NULL);
>      sev_common->sev_fd = open(devname, O_RDWR);
>      if (sev_common->sev_fd < 0) {
> -        error_setg(errp, "%s: Failed to open %s '%s'", __func__,
> -                   devname, strerror(errno));
> +        error_setg_file_open(errp, errno, devname);
>          g_free(devname);
>          return -1;
>      }
> diff --git a/ui/ui-qmp-cmds.c b/ui/ui-qmp-cmds.c
> index 74fa6c6ec5..d927121676 100644
> --- a/ui/ui-qmp-cmds.c
> +++ b/ui/ui-qmp-cmds.c
> @@ -371,8 +371,7 @@ qmp_screendump(const char *filename, const char *device,
>  
>      fd = qemu_open_old(filename, O_WRONLY | O_CREAT | O_TRUNC | O_BINARY, 0666);
>      if (fd == -1) {
> -        error_setg(errp, "failed to open file '%s': %s", filename,
> -                   strerror(errno));
> +        error_setg_file_open(errp, errno, filename);
>          return;
>      }
>  
> diff --git a/util/vfio-helpers.c b/util/vfio-helpers.c
> index fdff042ab4..8b1b2e2f05 100644
> --- a/util/vfio-helpers.c
> +++ b/util/vfio-helpers.c
> @@ -309,7 +309,7 @@ static int qemu_vfio_init_pci(QEMUVFIOState *s, const char *device,
>      s->container = open("/dev/vfio/vfio", O_RDWR);
>  
>      if (s->container == -1) {
> -        error_setg_errno(errp, errno, "Failed to open /dev/vfio/vfio");
> +        error_setg_file_open(errp, errno, "/dev/vfio/vfio");
>          return -errno;
>      }
>      if (ioctl(s->container, VFIO_GET_API_VERSION) != VFIO_API_VERSION) {
> @@ -333,8 +333,7 @@ static int qemu_vfio_init_pci(QEMUVFIOState *s, const char *device,
>  
>      s->group = open(group_file, O_RDWR);
>      if (s->group == -1) {
> -        error_setg_errno(errp, errno, "Failed to open VFIO group file: %s",
> -                         group_file);
> +        error_setg_file_open(errp, errno, group_file);
>          g_free(group_file);
>          ret = -errno;
>          goto fail_container;
> -- 
> 2.49.0
> 
-- 
 -----Open up your eyes, open up your mind, open up your code -------   
/ Dr. David Alan Gilbert    |       Running GNU/Linux       | Happy  \ 
\        dave @ treblig.org |                               | In Hex /
 \ _________________________|_____ http://www.treblig.org   |_______/


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Date: Fri, 21 Nov 2025 00:10:13 +0000
From: "Dr. David Alan Gilbert" 
To: Markus Armbruster 
Cc: qemu-devel@nongnu.org, arei.gonglei@huawei.com, pizhenwei@bytedance.com,
	alistair.francis@wdc.com, stefanb@linux.vnet.ibm.com,
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	qemu_oss@crudebyte.com, groug@kaod.org, mst@redhat.com,
	imammedo@redhat.com, anisinha@redhat.com, kraxel@redhat.com,
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	sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
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	jag.raman@oracle.com, sgarzare@redhat.com, pbonzini@redhat.com,
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	xen-devel@lists.xenproject.org, kvm@vger.kernel.org,
	qemu-riscv@nongnu.org
Subject: Re: [PATCH 11/14] error: Use error_setg_errno() to improve error
 messages
Message-ID: 
References: <20251120191339.756429-1-armbru@redhat.com>
 <20251120191339.756429-12-armbru@redhat.com>
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* Markus Armbruster (armbru@redhat.com) wrote:
> A few error messages show numeric errno codes.  Use error_setg_errno()
> to show human-readable text instead.
> 
> Signed-off-by: Markus Armbruster 

...

> diff --git a/migration/rdma.c b/migration/rdma.c
> index 337b415889..ef4885ef5f 100644
> --- a/migration/rdma.c
> +++ b/migration/rdma.c
> @@ -2349,8 +2349,7 @@ static int qemu_get_cm_event_timeout(RDMAContext *rdma,
>          error_setg(errp, "RDMA ERROR: poll cm event timeout");
>          return -1;
>      } else if (ret < 0) {
> -        error_setg(errp, "RDMA ERROR: failed to poll cm event, errno=%i",
> -                   errno);
> +        error_setg_errno(errp, "RDMA ERROR: failed to poll cm event");

Hasn't that lost the errno ?

Dave

-- 
 -----Open up your eyes, open up your mind, open up your code -------   
/ Dr. David Alan Gilbert    |       Running GNU/Linux       | Happy  \ 
\        dave @ treblig.org |                               | In Hex /
 \ _________________________|_____ http://www.treblig.org   |_______/


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Date: Fri, 21 Nov 2025 00:15:15 +0000
From: "Dr. David Alan Gilbert" 
To: Markus Armbruster 
Cc: qemu-devel@nongnu.org, arei.gonglei@huawei.com, pizhenwei@bytedance.com,
	alistair.francis@wdc.com, stefanb@linux.vnet.ibm.com,
	kwolf@redhat.com, hreitz@redhat.com, sw@weilnetz.de,
	qemu_oss@crudebyte.com, groug@kaod.org, mst@redhat.com,
	imammedo@redhat.com, anisinha@redhat.com, kraxel@redhat.com,
	shentey@gmail.com, npiggin@gmail.com, harshpb@linux.ibm.com,
	sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
	edgar.iglesias@gmail.com, elena.ufimtseva@oracle.com,
	jag.raman@oracle.com, sgarzare@redhat.com, pbonzini@redhat.com,
	fam@euphon.net, philmd@linaro.org, alex@shazbot.org, clg@redhat.com,
	peterx@redhat.com, farosas@suse.de, lizhijian@fujitsu.com,
	jasowang@redhat.com, samuel.thibault@ens-lyon.org,
	michael.roth@amd.com, kkostiuk@redhat.com, zhao1.liu@intel.com,
	mtosatti@redhat.com, rathc@linux.ibm.com, palmer@dabbelt.com,
	liwei1518@gmail.com, dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com, marcandre.lureau@redhat.com,
	qemu-block@nongnu.org, qemu-ppc@nongnu.org,
	xen-devel@lists.xenproject.org, kvm@vger.kernel.org,
	qemu-riscv@nongnu.org
Subject: Re: [PATCH 12/14] error: Use error_setg_errno() for simplicity and
 consistency
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 <20251120191339.756429-13-armbru@redhat.com>
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 0.00
User-Agent: Mutt/2.2.13 (2024-03-09)

* Markus Armbruster (armbru@redhat.com) wrote:
> Use error_setg_errno() instead of passing the value of strerror() or
> g_strerror() to error_setg().
> 
> The separator between the error message proper and the value of
> strerror() changes from " : ", "", " - ", "- " to ": " in places.
> 
> Signed-off-by: Markus Armbruster 

> @@ -792,9 +792,9 @@ static void vfu_object_init_ctx(VfuObject *o, Error **errp)
>                             VFU_REGION_FLAG_RW | VFU_REGION_FLAG_ALWAYS_CB,
>                             NULL, 0, -1, 0);
>      if (ret < 0) {
> -        error_setg(errp,
> -                   "vfu: Failed to setup config space handlers for %s- %s",
> -                   o->device, strerror(errno));
> +        error_setg_errno(errp,
> +                         "vfu: Failed to setup config space handlers for %s",
> +                         o->device);

missing errno.

>          goto fail;
>      }
>  
> @@ -822,8 +822,8 @@ static void vfu_object_init_ctx(VfuObject *o, Error **errp)
>  
>      ret = vfu_realize_ctx(o->vfu_ctx);
>      if (ret < 0) {
> -        error_setg(errp, "vfu: Failed to realize device %s- %s",
> -                   o->device, strerror(errno));
> +        error_setg_errno(errp, "vfu: Failed to realize device %s",
> +                         o->device);

missing errno.

Dave

>          goto fail;
>      }
>  
> diff --git a/hw/sensor/emc141x.c b/hw/sensor/emc141x.c
> index 7b2ce383a1..a51fc44395 100644
> --- a/hw/sensor/emc141x.c
> +++ b/hw/sensor/emc141x.c
> @@ -59,7 +59,7 @@ static void emc141x_get_temperature(Object *obj, Visitor *v, const char *name,
>      unsigned tempid;
>  
>      if (sscanf(name, "temperature%u", &tempid) != 1) {
> -        error_setg(errp, "error reading %s: %s", name, g_strerror(errno));
> +        error_setg_errno(errp, errno, "error reading %s", name);
>          return;
>      }
>  
> @@ -86,7 +86,7 @@ static void emc141x_set_temperature(Object *obj, Visitor *v, const char *name,
>      }
>  
>      if (sscanf(name, "temperature%u", &tempid) != 1) {
> -        error_setg(errp, "error reading %s: %s", name, g_strerror(errno));
> +        error_setg_errno(errp, errno, "error reading %s", name);
>          return;
>      }
>  
> diff --git a/hw/sensor/tmp421.c b/hw/sensor/tmp421.c
> index 3421c44086..127edd0ba5 100644
> --- a/hw/sensor/tmp421.c
> +++ b/hw/sensor/tmp421.c
> @@ -117,7 +117,7 @@ static void tmp421_get_temperature(Object *obj, Visitor *v, const char *name,
>      int tempid;
>  
>      if (sscanf(name, "temperature%d", &tempid) != 1) {
> -        error_setg(errp, "error reading %s: %s", name, g_strerror(errno));
> +        error_setg_errno(errp, errno, "error reading %s", name);
>          return;
>      }
>  
> @@ -154,7 +154,7 @@ static void tmp421_set_temperature(Object *obj, Visitor *v, const char *name,
>      }
>  
>      if (sscanf(name, "temperature%d", &tempid) != 1) {
> -        error_setg(errp, "error reading %s: %s", name, g_strerror(errno));
> +        error_setg_errno(errp, errno, "error reading %s", name);
>          return;
>      }
>  
> diff --git a/hw/smbios/smbios.c b/hw/smbios/smbios.c
> index 7558b2ad83..b228f9eb85 100644
> --- a/hw/smbios/smbios.c
> +++ b/hw/smbios/smbios.c
> @@ -1281,8 +1281,8 @@ static int save_opt_one(void *opaque,
>                  break;
>              }
>              if (ret < 0) {
> -                error_setg(errp, "Unable to read from %s: %s",
> -                           value, strerror(errno));
> +                error_setg_errno(errp, errno, "Unable to read from %s",
> +                                 value);
>                  qemu_close(fd);
>                  return -1;
>              }
> diff --git a/hw/virtio/vdpa-dev.c b/hw/virtio/vdpa-dev.c
> index 4a7b970976..f97d576171 100644
> --- a/hw/virtio/vdpa-dev.c
> +++ b/hw/virtio/vdpa-dev.c
> @@ -41,8 +41,8 @@ vhost_vdpa_device_get_u32(int fd, unsigned long int cmd, Error **errp)
>      uint32_t val = (uint32_t)-1;
>  
>      if (ioctl(fd, cmd, &val) < 0) {
> -        error_setg(errp, "vhost-vdpa-device: cmd 0x%lx failed: %s",
> -                   cmd, strerror(errno));
> +        error_setg_errno(errp, errno, "vhost-vdpa-device: cmd 0x%lx failed",
> +                         cmd);
>      }
>  
>      return val;
> diff --git a/migration/postcopy-ram.c b/migration/postcopy-ram.c
> index 3f98dcb6fd..5454372ac6 100644
> --- a/migration/postcopy-ram.c
> +++ b/migration/postcopy-ram.c
> @@ -582,7 +582,7 @@ bool postcopy_ram_supported_by_host(MigrationIncomingState *mis, Error **errp)
>  
>      ufd = uffd_open(O_CLOEXEC);
>      if (ufd == -1) {
> -        error_setg(errp, "Userfaultfd not available: %s", strerror(errno));
> +        error_setg_errno(errp, errno, "Userfaultfd not available");
>          goto out;
>      }
>  
> @@ -620,7 +620,7 @@ bool postcopy_ram_supported_by_host(MigrationIncomingState *mis, Error **errp)
>       * it was enabled.
>       */
>      if (munlockall()) {
> -        error_setg(errp, "munlockall() failed: %s", strerror(errno));
> +        error_setg_errno(errp, errno, "munlockall() failed");
>          goto out;
>      }
>  
> @@ -632,7 +632,7 @@ bool postcopy_ram_supported_by_host(MigrationIncomingState *mis, Error **errp)
>      testarea = mmap(NULL, pagesize, PROT_READ | PROT_WRITE, MAP_PRIVATE |
>                                      MAP_ANONYMOUS, -1, 0);
>      if (testarea == MAP_FAILED) {
> -        error_setg(errp, "Failed to map test area: %s", strerror(errno));
> +        error_setg_errno(errp, errno, "Failed to map test area");
>          goto out;
>      }
>      g_assert(QEMU_PTR_IS_ALIGNED(testarea, pagesize));
> @@ -642,14 +642,14 @@ bool postcopy_ram_supported_by_host(MigrationIncomingState *mis, Error **errp)
>      reg_struct.mode = UFFDIO_REGISTER_MODE_MISSING;
>  
>      if (ioctl(ufd, UFFDIO_REGISTER, ®_struct)) {
> -        error_setg(errp, "UFFDIO_REGISTER failed: %s", strerror(errno));
> +        error_setg_errno(errp, errno, "UFFDIO_REGISTER failed");
>          goto out;
>      }
>  
>      range_struct.start = (uintptr_t)testarea;
>      range_struct.len = pagesize;
>      if (ioctl(ufd, UFFDIO_UNREGISTER, &range_struct)) {
> -        error_setg(errp, "UFFDIO_UNREGISTER failed: %s", strerror(errno));
> +        error_setg_errno(errp, errno, "UFFDIO_UNREGISTER failed");
>          goto out;
>      }
>  
> diff --git a/migration/rdma.c b/migration/rdma.c
> index ef4885ef5f..9e301cf917 100644
> --- a/migration/rdma.c
> +++ b/migration/rdma.c
> @@ -2349,7 +2349,7 @@ static int qemu_get_cm_event_timeout(RDMAContext *rdma,
>          error_setg(errp, "RDMA ERROR: poll cm event timeout");
>          return -1;
>      } else if (ret < 0) {
> -        error_setg_errno(errp, "RDMA ERROR: failed to poll cm event");
> +        error_setg_errno(errp, errno, "RDMA ERROR: failed to poll cm event");
>          return -1;
>      } else if (poll_fd.revents & POLLIN) {
>          if (rdma_get_cm_event(rdma->channel, cm_event) < 0) {
> diff --git a/net/slirp.c b/net/slirp.c
> index 5996fec512..04925f3318 100644
> --- a/net/slirp.c
> +++ b/net/slirp.c
> @@ -1020,8 +1020,9 @@ static int slirp_smb(SlirpState* s, const char *exported_dir,
>      }
>  
>      if (access(exported_dir, R_OK | X_OK)) {
> -        error_setg(errp, "Error accessing shared directory '%s': %s",
> -                   exported_dir, strerror(errno));
> +        error_setg_errno(errp, errno,
> +                         "Error accessing shared directory '%s'",
> +                         exported_dir);
>          return -1;
>      }
>  
> diff --git a/qga/commands-posix-ssh.c b/qga/commands-posix-ssh.c
> index 246171d323..661972e34e 100644
> --- a/qga/commands-posix-ssh.c
> +++ b/qga/commands-posix-ssh.c
> @@ -61,20 +61,22 @@ mkdir_for_user(const char *path, const struct passwd *p,
>                 mode_t mode, Error **errp)
>  {
>      if (g_mkdir(path, mode) == -1) {
> -        error_setg(errp, "failed to create directory '%s': %s",
> -                   path, g_strerror(errno));
> +        error_setg_errno(errp, errno, "failed to create directory '%s'",
> +                         path);
>          return false;
>      }
>  
>      if (chown(path, p->pw_uid, p->pw_gid) == -1) {
> -        error_setg(errp, "failed to set ownership of directory '%s': %s",
> -                   path, g_strerror(errno));
> +        error_setg_errno(errp, errno,
> +                         "failed to set ownership of directory '%s'",
> +                         path);
>          return false;
>      }
>  
>      if (chmod(path, mode) == -1) {
> -        error_setg(errp, "failed to set permissions of directory '%s': %s",
> -                   path, g_strerror(errno));
> +        error_setg_errno(errp, errno,
> +                         "failed to set permissions of directory '%s'",
> +                         path);
>          return false;
>      }
>  
> @@ -95,14 +97,15 @@ write_authkeys(const char *path, const GStrv keys,
>      }
>  
>      if (chown(path, p->pw_uid, p->pw_gid) == -1) {
> -        error_setg(errp, "failed to set ownership of directory '%s': %s",
> -                   path, g_strerror(errno));
> +        error_setg_errno(errp, errno,
> +                         "failed to set ownership of directory '%s'",
> +                         path);
>          return false;
>      }
>  
>      if (chmod(path, 0600) == -1) {
> -        error_setg(errp, "failed to set permissions of '%s': %s",
> -                   path, g_strerror(errno));
> +        error_setg_errno(errp, errno, "failed to set permissions of '%s'",
> +                         path);
>          return false;
>      }
>  
> diff --git a/system/vl.c b/system/vl.c
> index 5091fe52d9..2ef5b4b3b2 100644
> --- a/system/vl.c
> +++ b/system/vl.c
> @@ -619,7 +619,7 @@ static int parse_add_fd(void *opaque, QemuOpts *opts, Error **errp)
>      }
>  #endif
>      if (dupfd == -1) {
> -        error_setg(errp, "error duplicating fd: %s", strerror(errno));
> +        error_setg_errno(errp, errno, "error duplicating fd");
>          return -1;
>      }
>  
> diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
> index 43124bf1c7..3501b5d546 100644
> --- a/target/ppc/kvm.c
> +++ b/target/ppc/kvm.c
> @@ -2699,9 +2699,8 @@ int kvmppc_get_htab_fd(bool write, uint64_t index, Error **errp)
>  
>      ret = kvm_vm_ioctl(kvm_state, KVM_PPC_GET_HTAB_FD, &s);
>      if (ret < 0) {
> -        error_setg(errp, "Unable to open fd for %s HPT %s KVM: %s",
> -                   write ? "writing" : "reading", write ? "to" : "from",
> -                   strerror(errno));
> +        error_setg_errno(errp, errno, "Unable to open fd for %s HPT %s KVM",
> +                   write ? "writing" : "reading", write ? "to" : "from");
>          return -errno;
>      }
>  
> -- 
> 2.49.0
> 
-- 
 -----Open up your eyes, open up your mind, open up your code -------   
/ Dr. David Alan Gilbert    |       Running GNU/Linux       | Happy  \ 
\        dave @ treblig.org |                               | In Hex /
 \ _________________________|_____ http://www.treblig.org   |_______/


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Date: Fri, 21 Nov 2025 00:24:06 +0000
From: "Dr. David Alan Gilbert" 
To: Markus Armbruster 
Cc: qemu-devel@nongnu.org, arei.gonglei@huawei.com, pizhenwei@bytedance.com,
	alistair.francis@wdc.com, stefanb@linux.vnet.ibm.com,
	kwolf@redhat.com, hreitz@redhat.com, sw@weilnetz.de,
	qemu_oss@crudebyte.com, groug@kaod.org, mst@redhat.com,
	imammedo@redhat.com, anisinha@redhat.com, kraxel@redhat.com,
	shentey@gmail.com, npiggin@gmail.com, harshpb@linux.ibm.com,
	sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
	edgar.iglesias@gmail.com, elena.ufimtseva@oracle.com,
	jag.raman@oracle.com, sgarzare@redhat.com, pbonzini@redhat.com,
	fam@euphon.net, philmd@linaro.org, alex@shazbot.org, clg@redhat.com,
	peterx@redhat.com, farosas@suse.de, lizhijian@fujitsu.com,
	jasowang@redhat.com, samuel.thibault@ens-lyon.org,
	michael.roth@amd.com, kkostiuk@redhat.com, zhao1.liu@intel.com,
	mtosatti@redhat.com, rathc@linux.ibm.com, palmer@dabbelt.com,
	liwei1518@gmail.com, dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com, marcandre.lureau@redhat.com,
	qemu-block@nongnu.org, qemu-ppc@nongnu.org,
	xen-devel@lists.xenproject.org, kvm@vger.kernel.org,
	qemu-riscv@nongnu.org
Subject: Re: [PATCH 03/14] tap-solaris: Use error_setg_file_open() for better
 error messages
Message-ID: 
References: <20251120191339.756429-1-armbru@redhat.com>
 <20251120191339.756429-4-armbru@redhat.com>
MIME-Version: 1.0
Content-Type: text/plain; charset=iso-8859-1
Content-Disposition: inline
In-Reply-To: <20251120191339.756429-4-armbru@redhat.com>
X-Chocolate: 70 percent or better cocoa solids preferably
X-Operating-System: Linux/6.12.48+deb13-amd64 (x86_64)
X-Uptime: 00:23:09 up 24 days, 23:59,  2 users,  load average: 0.00, 0.00,
 0.00
User-Agent: Mutt/2.2.13 (2024-03-09)

* Markus Armbruster (armbru@redhat.com) wrote:
> Error messages change from
> 
>     Can't open /dev/ip (actually /dev/udp)
>     Can't open /dev/tap
>     Can't open /dev/tap (2)
> 
> to
> 
>     Could not open '/dev/udp': REASON
>     Could not open '/dev/tap': REASON
> 
> where REASON is the value of strerror(errno).

I guess the new macro has a __LINE__ so the (2) is redundant.

> 
> Signed-off-by: Markus Armbruster 

Reviewed-by: Dr. David Alan Gilbert 

> ---
>  net/tap-solaris.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/net/tap-solaris.c b/net/tap-solaris.c
> index 75397e6c54..faf7922ea8 100644
> --- a/net/tap-solaris.c
> +++ b/net/tap-solaris.c
> @@ -87,13 +87,13 @@ static int tap_alloc(char *dev, size_t dev_size, Error **errp)
>  
>      ip_fd = RETRY_ON_EINTR(open("/dev/udp", O_RDWR, 0));
>      if (ip_fd < 0) {
> -        error_setg(errp, "Can't open /dev/ip (actually /dev/udp)");
> +        error_setg_file_open(errp, errno, "/dev/udp");
>          return -1;
>      }
>  
>      tap_fd = RETRY_ON_EINTR(open("/dev/tap", O_RDWR, 0));
>      if (tap_fd < 0) {
> -        error_setg(errp, "Can't open /dev/tap");
> +        error_setg_file_open(errp, errno, "/dev/tap");
>          return -1;
>      }
>  
> @@ -107,7 +107,7 @@ static int tap_alloc(char *dev, size_t dev_size, Error **errp)
>  
>      if_fd = RETRY_ON_EINTR(open("/dev/tap", O_RDWR, 0));
>      if (if_fd < 0) {
> -        error_setg(errp, "Can't open /dev/tap (2)");
> +        error_setg_file_open(errp, errno, "/dev/tap");
>          return -1;
>      }
>      if(ioctl(if_fd, I_PUSH, "ip") < 0){
> -- 
> 2.49.0
> 
-- 
 -----Open up your eyes, open up your mind, open up your code -------   
/ Dr. David Alan Gilbert    |       Running GNU/Linux       | Happy  \ 
\        dave @ treblig.org |                               | In Hex /
 \ _________________________|_____ http://www.treblig.org   |_______/


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Date: Fri, 21 Nov 2025 00:42:52 +0000
From: "Dr. David Alan Gilbert" 
To: Markus Armbruster 
Cc: qemu-devel@nongnu.org, arei.gonglei@huawei.com,
	alistair.francis@wdc.com, stefanb@linux.vnet.ibm.com,
	kwolf@redhat.com, hreitz@redhat.com, sw@weilnetz.de,
	qemu_oss@crudebyte.com, groug@kaod.org, mst@redhat.com,
	imammedo@redhat.com, anisinha@redhat.com, kraxel@redhat.com,
	shentey@gmail.com, npiggin@gmail.com, harshpb@linux.ibm.com,
	sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
	edgar.iglesias@gmail.com, elena.ufimtseva@oracle.com,
	jag.raman@oracle.com, sgarzare@redhat.com, pbonzini@redhat.com,
	fam@euphon.net, philmd@linaro.org, alex@shazbot.org, clg@redhat.com,
	peterx@redhat.com, farosas@suse.de, lizhijian@fujitsu.com,
	jasowang@redhat.com, samuel.thibault@ens-lyon.org,
	michael.roth@amd.com, kkostiuk@redhat.com, zhao1.liu@intel.com,
	mtosatti@redhat.com, rathc@linux.ibm.com, palmer@dabbelt.com,
	liwei1518@gmail.com, dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com, marcandre.lureau@redhat.com,
	qemu-block@nongnu.org, qemu-ppc@nongnu.org,
	xen-devel@lists.xenproject.org, kvm@vger.kernel.org,
	qemu-riscv@nongnu.org
Subject: Re: [PATCH 02/14] hw/usb: Use error_setg_file_open() for a better
 error message
Message-ID: 
References: <20251120191339.756429-1-armbru@redhat.com>
 <20251120191339.756429-3-armbru@redhat.com>
MIME-Version: 1.0
Content-Type: text/plain; charset=iso-8859-1
Content-Disposition: inline
In-Reply-To: <20251120191339.756429-3-armbru@redhat.com>
X-Chocolate: 70 percent or better cocoa solids preferably
X-Operating-System: Linux/6.12.48+deb13-amd64 (x86_64)
X-Uptime: 00:41:22 up 25 days, 17 min,  2 users,  load average: 0.01, 0.02,
 0.00
User-Agent: Mutt/2.2.13 (2024-03-09)

* Markus Armbruster (armbru@redhat.com) wrote:
> The error message changes from
> 
>     open FILENAME failed
> 
> to
> 
>     Could not open 'FILENAME': REASON
> 
> where REASON is the value of strerror(errno).
> 
> Signed-off-by: Markus Armbruster 
> ---
>  hw/usb/bus.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/hw/usb/bus.c b/hw/usb/bus.c
> index 8dd2ce415e..47d42ca3c1 100644
> --- a/hw/usb/bus.c
> +++ b/hw/usb/bus.c
> @@ -262,7 +262,7 @@ static void usb_qdev_realize(DeviceState *qdev, Error **errp)
>          int fd = qemu_open_old(dev->pcap_filename,
>                                 O_CREAT | O_WRONLY | O_TRUNC | O_BINARY, 0666);
>          if (fd < 0) {
> -            error_setg(errp, "open %s failed", dev->pcap_filename);
> +            error_setg_file_open(errp, errno, dev->pcap_filename);

Wouldn't it be easier to flip it to use qemu_open() ?

Dave

>              usb_qdev_unrealize(qdev);
>              return;
>          }
> -- 
> 2.49.0
> 
-- 
 -----Open up your eyes, open up your mind, open up your code -------   
/ Dr. David Alan Gilbert    |       Running GNU/Linux       | Happy  \ 
\        dave @ treblig.org |                               | In Hex /
 \ _________________________|_____ http://www.treblig.org   |_______/


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Date: Fri, 21 Nov 2025 01:12:56 +0000
From: "Dr. David Alan Gilbert" 
To: Markus Armbruster 
Cc: qemu-devel@nongnu.org, arei.gonglei@huawei.com, pizhenwei@bytedance.com,
	alistair.francis@wdc.com, stefanb@linux.vnet.ibm.com,
	kwolf@redhat.com, hreitz@redhat.com, sw@weilnetz.de,
	qemu_oss@crudebyte.com, groug@kaod.org, mst@redhat.com,
	imammedo@redhat.com, anisinha@redhat.com, kraxel@redhat.com,
	shentey@gmail.com, npiggin@gmail.com, harshpb@linux.ibm.com,
	sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
	edgar.iglesias@gmail.com, elena.ufimtseva@oracle.com,
	jag.raman@oracle.com, sgarzare@redhat.com, pbonzini@redhat.com,
	fam@euphon.net, philmd@linaro.org, alex@shazbot.org, clg@redhat.com,
	peterx@redhat.com, farosas@suse.de, lizhijian@fujitsu.com,
	jasowang@redhat.com, samuel.thibault@ens-lyon.org,
	michael.roth@amd.com, kkostiuk@redhat.com, zhao1.liu@intel.com,
	mtosatti@redhat.com, rathc@linux.ibm.com, palmer@dabbelt.com,
	liwei1518@gmail.com, dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com, marcandre.lureau@redhat.com,
	qemu-block@nongnu.org, qemu-ppc@nongnu.org,
	xen-devel@lists.xenproject.org, kvm@vger.kernel.org,
	qemu-riscv@nongnu.org
Subject: Re: [PATCH 04/14] qga: Use error_setg_file_open() for better error
 messages
Message-ID: 
References: <20251120191339.756429-1-armbru@redhat.com>
 <20251120191339.756429-5-armbru@redhat.com>
MIME-Version: 1.0
Content-Type: text/plain; charset=iso-8859-1
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In-Reply-To: <20251120191339.756429-5-armbru@redhat.com>
X-Chocolate: 70 percent or better cocoa solids preferably
X-Operating-System: Linux/6.12.48+deb13-amd64 (x86_64)
X-Uptime: 01:12:53 up 25 days, 49 min,  2 users,  load average: 0.02, 0.01,
 0.00
User-Agent: Mutt/2.2.13 (2024-03-09)

* Markus Armbruster (armbru@redhat.com) wrote:
> Error messages change from
> 
>     open("FNAME"): REASON
> 
> to
> 
>     Could not open 'FNAME': REASON
> 
> Signed-off-by: Markus Armbruster 

Reviewed-by: Dr. David Alan Gilbert 

> ---
>  qga/commands-linux.c | 11 ++++++-----
>  1 file changed, 6 insertions(+), 5 deletions(-)
> 
> diff --git a/qga/commands-linux.c b/qga/commands-linux.c
> index 4a09ddc760..5cf76ca2d9 100644
> --- a/qga/commands-linux.c
> +++ b/qga/commands-linux.c
> @@ -1502,14 +1502,15 @@ static void transfer_vcpu(GuestLogicalProcessor *vcpu, bool sys2vcpu,
>  
>      dirfd = open(dirpath, O_RDONLY | O_DIRECTORY);
>      if (dirfd == -1) {
> -        error_setg_errno(errp, errno, "open(\"%s\")", dirpath);
> +        error_setg_file_open(errp, errno, dirpath);
>          return;
>      }
>  
>      fd = openat(dirfd, fn, sys2vcpu ? O_RDONLY : O_RDWR);
>      if (fd == -1) {
>          if (errno != ENOENT) {
> -            error_setg_errno(errp, errno, "open(\"%s/%s\")", dirpath, fn);
> +            error_setg_errno(errp, errno, "could not open %s/%s",
> +                             dirpath, fn);
>          } else if (sys2vcpu) {
>              vcpu->online = true;
>              vcpu->can_offline = false;
> @@ -1711,7 +1712,7 @@ static void transfer_memory_block(GuestMemoryBlock *mem_blk, bool sys2memblk,
>      dirfd = open(dirpath, O_RDONLY | O_DIRECTORY);
>      if (dirfd == -1) {
>          if (sys2memblk) {
> -            error_setg_errno(errp, errno, "open(\"%s\")", dirpath);
> +            error_setg_file_open(errp, errno, dirpath);
>          } else {
>              if (errno == ENOENT) {
>                  result->response = GUEST_MEMORY_BLOCK_RESPONSE_TYPE_NOT_FOUND;
> @@ -1936,7 +1937,7 @@ static GuestDiskStatsInfoList *guest_get_diskstats(Error **errp)
>  
>      fp = fopen(diskstats, "r");
>      if (fp  == NULL) {
> -        error_setg_errno(errp, errno, "open(\"%s\")", diskstats);
> +        error_setg_file_open(errp, errno, diskstats);
>          return NULL;
>      }
>  
> @@ -2047,7 +2048,7 @@ GuestCpuStatsList *qmp_guest_get_cpustats(Error **errp)
>  
>      fp = fopen(cpustats, "r");
>      if (fp  == NULL) {
> -        error_setg_errno(errp, errno, "open(\"%s\")", cpustats);
> +        error_setg_file_open(errp, errno, cpustats);
>          return NULL;
>      }
>  
> -- 
> 2.49.0
> 
-- 
 -----Open up your eyes, open up your mind, open up your code -------   
/ Dr. David Alan Gilbert    |       Running GNU/Linux       | Happy  \ 
\        dave @ treblig.org |                               | In Hex /
 \ _________________________|_____ http://www.treblig.org   |_______/


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Date: Fri, 21 Nov 2025 02:05:08 +0000
From: "Dr. David Alan Gilbert" 
To: Markus Armbruster 
Cc: qemu-devel@nongnu.org, arei.gonglei@huawei.com,
	alistair.francis@wdc.com, stefanb@linux.vnet.ibm.com,
	kwolf@redhat.com, hreitz@redhat.com, sw@weilnetz.de,
	qemu_oss@crudebyte.com, groug@kaod.org, mst@redhat.com,
	imammedo@redhat.com, anisinha@redhat.com, kraxel@redhat.com,
	shentey@gmail.com, npiggin@gmail.com, harshpb@linux.ibm.com,
	sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
	edgar.iglesias@gmail.com, elena.ufimtseva@oracle.com,
	jag.raman@oracle.com, sgarzare@redhat.com, pbonzini@redhat.com,
	fam@euphon.net, philmd@linaro.org, alex@shazbot.org, clg@redhat.com,
	peterx@redhat.com, farosas@suse.de, lizhijian@fujitsu.com,
	jasowang@redhat.com, samuel.thibault@ens-lyon.org,
	michael.roth@amd.com, kkostiuk@redhat.com, zhao1.liu@intel.com,
	mtosatti@redhat.com, rathc@linux.ibm.com, palmer@dabbelt.com,
	liwei1518@gmail.com, dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com, marcandre.lureau@redhat.com,
	qemu-block@nongnu.org, qemu-ppc@nongnu.org,
	xen-devel@lists.xenproject.org, kvm@vger.kernel.org,
	qemu-riscv@nongnu.org
Subject: Re: [PATCH 05/14] hw/scsi: Use error_setg_file_open() for a better
 error message
Message-ID: 
References: <20251120191339.756429-1-armbru@redhat.com>
 <20251120191339.756429-6-armbru@redhat.com>
MIME-Version: 1.0
Content-Type: text/plain; charset=iso-8859-1
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In-Reply-To: <20251120191339.756429-6-armbru@redhat.com>
X-Chocolate: 70 percent or better cocoa solids preferably
X-Operating-System: Linux/6.12.48+deb13-amd64 (x86_64)
X-Uptime: 02:04:59 up 25 days,  1:41,  2 users,  load average: 0.04, 0.04,
 0.00
User-Agent: Mutt/2.2.13 (2024-03-09)

* Markus Armbruster (armbru@redhat.com) wrote:
> The error message changes from
> 
>     vhost-scsi: open vhost char device failed: REASON
> 
> to
> 
>     Could not open '/dev/vhost-scsi': REASON
> 
> I think the exact file name is more useful to know than the file's
> purpose.
> 
> We could put back the "vhost-scsi: " prefix with error_prepend().  Not
> worth the bother.
> 
> Signed-off-by: Markus Armbruster 

Reviewed-by: Dr. David Alan Gilbert 

> ---
>  hw/scsi/vhost-scsi.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/hw/scsi/vhost-scsi.c b/hw/scsi/vhost-scsi.c
> index cdf405b0f8..239138c931 100644
> --- a/hw/scsi/vhost-scsi.c
> +++ b/hw/scsi/vhost-scsi.c
> @@ -245,8 +245,7 @@ static void vhost_scsi_realize(DeviceState *dev, Error **errp)
>      } else {
>          vhostfd = open("/dev/vhost-scsi", O_RDWR);
>          if (vhostfd < 0) {
> -            error_setg(errp, "vhost-scsi: open vhost char device failed: %s",
> -                       strerror(errno));
> +            error_setg_file_open(errp, errno, "/dev/vhost-scsi");
>              return;
>          }
>      }
> -- 
> 2.49.0
> 
-- 
 -----Open up your eyes, open up your mind, open up your code -------   
/ Dr. David Alan Gilbert    |       Running GNU/Linux       | Happy  \ 
\        dave @ treblig.org |                               | In Hex /
 \ _________________________|_____ http://www.treblig.org   |_______/


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From: Markus Armbruster 
To: "Dr. David Alan Gilbert" 
Cc: qemu-devel@nongnu.org,  arei.gonglei@huawei.com,
  alistair.francis@wdc.com,  stefanb@linux.vnet.ibm.com,  kwolf@redhat.com,
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  anisinha@redhat.com,  kraxel@redhat.com,  shentey@gmail.com,
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  anthony@xenproject.org,  paul@xen.org,  edgar.iglesias@gmail.com,
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Subject: Re: [PATCH 02/14] hw/usb: Use error_setg_file_open() for a better
 error message
In-Reply-To:  (David Alan Gilbert's message of
	"Fri, 21 Nov 2025 00:42:52 +0000")
References: <20251120191339.756429-1-armbru@redhat.com>
	<20251120191339.756429-3-armbru@redhat.com>
	
Date: Fri, 21 Nov 2025 06:28:14 +0100
Message-ID: <873468rm35.fsf@pond.sub.org>
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"Dr. David Alan Gilbert"  writes:

> * Markus Armbruster (armbru@redhat.com) wrote:
>> The error message changes from
>> 
>>     open FILENAME failed
>> 
>> to
>> 
>>     Could not open 'FILENAME': REASON
>> 
>> where REASON is the value of strerror(errno).
>> 
>> Signed-off-by: Markus Armbruster 
>> ---
>>  hw/usb/bus.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>> 
>> diff --git a/hw/usb/bus.c b/hw/usb/bus.c
>> index 8dd2ce415e..47d42ca3c1 100644
>> --- a/hw/usb/bus.c
>> +++ b/hw/usb/bus.c
>> @@ -262,7 +262,7 @@ static void usb_qdev_realize(DeviceState *qdev, Error **errp)
>>          int fd = qemu_open_old(dev->pcap_filename,
>>                                 O_CREAT | O_WRONLY | O_TRUNC | O_BINARY, 0666);
>>          if (fd < 0) {
>> -            error_setg(errp, "open %s failed", dev->pcap_filename);
>> +            error_setg_file_open(errp, errno, dev->pcap_filename);
>
> Wouldn't it be easier to flip it to use qemu_open() ?

Mechanical change; I missed the obvious :)

I'll give it a try, along with the call in ui/ui-qmp-cmd.c [PATCH 09].
Thanks!

>
> Dave
>
>>              usb_qdev_unrealize(qdev);
>>              return;
>>          }
>> -- 
>> 2.49.0
>> 



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From: Markus Armbruster 
To: "Dr. David Alan Gilbert" 
Cc: qemu-devel@nongnu.org,  arei.gonglei@huawei.com,
  pizhenwei@bytedance.com,  alistair.francis@wdc.com,
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Subject: Re: [PATCH 03/14] tap-solaris: Use error_setg_file_open() for
 better error messages
In-Reply-To:  (David Alan Gilbert's message of
	"Fri, 21 Nov 2025 00:24:06 +0000")
References: <20251120191339.756429-1-armbru@redhat.com>
	<20251120191339.756429-4-armbru@redhat.com>
	
Date: Fri, 21 Nov 2025 06:35:03 +0100
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"Dr. David Alan Gilbert"  writes:

> * Markus Armbruster (armbru@redhat.com) wrote:
>> Error messages change from
>> 
>>     Can't open /dev/ip (actually /dev/udp)
>>     Can't open /dev/tap
>>     Can't open /dev/tap (2)
>> 
>> to
>> 
>>     Could not open '/dev/udp': REASON
>>     Could not open '/dev/tap': REASON
>> 
>> where REASON is the value of strerror(errno).
>
> I guess the new macro has a __LINE__ so the (2) is redundant.

It does capture __FILE__, __LINE__, and __func__, but they're only
printed for &error_abort.

How likely is it that the first open of /dev/tap succeeds, and the
second fails?

Do users users then need to know that the second failed?  If yes, then
" (2)" is a terrible way to tell them.

>> Signed-off-by: Markus Armbruster 
>
> Reviewed-by: Dr. David Alan Gilbert 

Thanks!



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From: Markus Armbruster 
To: "Dr. David Alan Gilbert" 
Cc: qemu-devel@nongnu.org,  arei.gonglei@huawei.com,
  pizhenwei@bytedance.com,  alistair.francis@wdc.com,
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Subject: Re: [PATCH 09/14] error: Use error_setg_file_open() for simplicity
 and consistency
In-Reply-To:  (David Alan Gilbert's message of
	"Thu, 20 Nov 2025 23:57:13 +0000")
References: <20251120191339.756429-1-armbru@redhat.com>
	<20251120191339.756429-10-armbru@redhat.com>
	
Date: Fri, 21 Nov 2025 06:45:05 +0100
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"Dr. David Alan Gilbert"  writes:

> * Markus Armbruster (armbru@redhat.com) wrote:
>> Replace
>> 
>>     error_setg_errno(errp, errno, MSG, FNAME);
>> 
>> by
>> 
>>     error_setg_file_open(errp, errno, FNAME);
>> 
>> where MSG is "Could not open '%s'" or similar.
>> 
>> Also replace equivalent uses of error_setg().
>> 
>> A few messages lose prefixes ("net dump: ", "SEV: ", __func__ ": ").
>> We could put them back with error_prepend().  Not worth the bother.
>
> Yeh, I guess you could just do it with another macro using
> the same internal function just with string concatenation.

I'm no fan of such prefixes.  A sign of developers not caring enough to
craft a good error message for *users*.  *Especially* in the case of
__func__.

The error messages changes in question are:

    net dump: can't open DUMP-FILE: REASON
    Could not open 'DUMP-FILE': REASON

    SEV: Failed to open SEV-DEVICE: REASON
    Could not open 'SEV-DEVICE': REASON

    sev_common_kvm_init: Failed to open SEV_DEVICE 'REASON'
    Could not open 'SEV-DEVICE': REASON

I think these are all improvements, and the loss of the prefix is fine.

>> Signed-off-by: Markus Armbruster 
>
> Reviewed-by: Dr. David Alan Gilbert 

Thanks!



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From: Markus Armbruster 
To: "Dr. David Alan Gilbert" 
Cc: qemu-devel@nongnu.org,  arei.gonglei@huawei.com,
  pizhenwei@bytedance.com,  alistair.francis@wdc.com,
  stefanb@linux.vnet.ibm.com,  kwolf@redhat.com,  hreitz@redhat.com,
  sw@weilnetz.de,  qemu_oss@crudebyte.com,  groug@kaod.org,
  mst@redhat.com,  imammedo@redhat.com,  anisinha@redhat.com,
  kraxel@redhat.com,  shentey@gmail.com,  npiggin@gmail.com,
  harshpb@linux.ibm.com,  sstabellini@kernel.org,  anthony@xenproject.org,
  paul@xen.org,  edgar.iglesias@gmail.com,  elena.ufimtseva@oracle.com,
  jag.raman@oracle.com,  sgarzare@redhat.com,  pbonzini@redhat.com,
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  jasowang@redhat.com,  samuel.thibault@ens-lyon.org,
  michael.roth@amd.com,  kkostiuk@redhat.com,  zhao1.liu@intel.com,
  mtosatti@redhat.com,  rathc@linux.ibm.com,  palmer@dabbelt.com,
  liwei1518@gmail.com,  dbarboza@ventanamicro.com,
  zhiwei_liu@linux.alibaba.com,  marcandre.lureau@redhat.com,
  qemu-block@nongnu.org,  qemu-ppc@nongnu.org,
  xen-devel@lists.xenproject.org,  kvm@vger.kernel.org,
  qemu-riscv@nongnu.org
Subject: Re: [PATCH 11/14] error: Use error_setg_errno() to improve error
 messages
In-Reply-To:  (David Alan Gilbert's message of
	"Fri, 21 Nov 2025 00:10:13 +0000")
References: <20251120191339.756429-1-armbru@redhat.com>
	<20251120191339.756429-12-armbru@redhat.com>
	
Date: Fri, 21 Nov 2025 06:46:28 +0100
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"Dr. David Alan Gilbert"  writes:

> * Markus Armbruster (armbru@redhat.com) wrote:
>> A few error messages show numeric errno codes.  Use error_setg_errno()
>> to show human-readable text instead.
>> 
>> Signed-off-by: Markus Armbruster 
>
> ...
>
>> diff --git a/migration/rdma.c b/migration/rdma.c
>> index 337b415889..ef4885ef5f 100644
>> --- a/migration/rdma.c
>> +++ b/migration/rdma.c
>> @@ -2349,8 +2349,7 @@ static int qemu_get_cm_event_timeout(RDMAContext *rdma,
>>          error_setg(errp, "RDMA ERROR: poll cm event timeout");
>>          return -1;
>>      } else if (ret < 0) {
>> -        error_setg(errp, "RDMA ERROR: failed to poll cm event, errno=%i",
>> -                   errno);
>> +        error_setg_errno(errp, "RDMA ERROR: failed to poll cm event");
>
> Hasn't that lost the errno ?

Yes.  My build tree must have lost the ability to compile this file.  I
need to fix that.

Thanks!



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From: Markus Armbruster 
To: "Dr. David Alan Gilbert" 
Cc: qemu-devel@nongnu.org,  arei.gonglei@huawei.com,
  pizhenwei@bytedance.com,  alistair.francis@wdc.com,
  stefanb@linux.vnet.ibm.com,  kwolf@redhat.com,  hreitz@redhat.com,
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  kraxel@redhat.com,  shentey@gmail.com,  npiggin@gmail.com,
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Subject: Re: [PATCH 12/14] error: Use error_setg_errno() for simplicity and
 consistency
In-Reply-To:  (David Alan Gilbert's message of
	"Fri, 21 Nov 2025 00:15:15 +0000")
References: <20251120191339.756429-1-armbru@redhat.com>
	<20251120191339.756429-13-armbru@redhat.com>
	
Date: Fri, 21 Nov 2025 06:47:18 +0100
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"Dr. David Alan Gilbert"  writes:

> * Markus Armbruster (armbru@redhat.com) wrote:
>> Use error_setg_errno() instead of passing the value of strerror() or
>> g_strerror() to error_setg().
>> 
>> The separator between the error message proper and the value of
>> strerror() changes from " : ", "", " - ", "- " to ": " in places.
>> 
>> Signed-off-by: Markus Armbruster 
>
>> @@ -792,9 +792,9 @@ static void vfu_object_init_ctx(VfuObject *o, Error **errp)
>>                             VFU_REGION_FLAG_RW | VFU_REGION_FLAG_ALWAYS_CB,
>>                             NULL, 0, -1, 0);
>>      if (ret < 0) {
>> -        error_setg(errp,
>> -                   "vfu: Failed to setup config space handlers for %s- %s",
>> -                   o->device, strerror(errno));
>> +        error_setg_errno(errp,
>> +                         "vfu: Failed to setup config space handlers for %s",
>> +                         o->device);
>
> missing errno.

Yes.

>>          goto fail;
>>      }
>>  
>> @@ -822,8 +822,8 @@ static void vfu_object_init_ctx(VfuObject *o, Error **errp)
>>  
>>      ret = vfu_realize_ctx(o->vfu_ctx);
>>      if (ret < 0) {
>> -        error_setg(errp, "vfu: Failed to realize device %s- %s",
>> -                   o->device, strerror(errno));
>> +        error_setg_errno(errp, "vfu: Failed to realize device %s",
>> +                         o->device);
>
> missing errno.

Yes.  Another file my build tree doesn't compile anymore.  Will fix,
thanks!

[...]



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Subject: Re: [for 4.22 v5 18/18] xen/riscv: introduce metadata table to store
 P2M type
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: 
 
 <6a5a9f4e-1f0e-453f-b1d1-d0e2acf97e2a@suse.com>
 <5d4ec4d9-b4c1-4365-a343-f42b390da165@gmail.com>
 <6f431394-5c08-4974-85ae-4b38f1975289@suse.com>
 
 
 <3f772780-75af-4d77-96c9-7eb7dc697ff8@gmail.com>
Content-Language: en-US
From: Jan Beulich 
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In-Reply-To: <3f772780-75af-4d77-96c9-7eb7dc697ff8@gmail.com>
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On 20.11.2025 17:52, Oleksii Kurochko wrote:
> 
> On 11/20/25 4:47 PM, Jan Beulich wrote:
>> On 20.11.2025 16:38, Oleksii Kurochko wrote:
>>> On 11/18/25 7:58 AM, Jan Beulich wrote:
>>>> On 17.11.2025 20:51, Oleksii Kurochko wrote:
>>>>> On 11/12/25 12:49 PM, Jan Beulich wrote:
>>>>>> On 20.10.2025 17:58, Oleksii Kurochko wrote:
>>>>>>> +    if ( *md_pg )
>>>>>>> +        metadata = __map_domain_page(*md_pg);
>>>>>>> +
>>>>>>> +    if ( t < p2m_first_external )
>>>>>>> +    {
>>>>>>>             pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK);
>>>>>>>     -    return rc;
>>>>>>> +        if ( metadata )
>>>>>>> +            metadata[ctx->index].pte = p2m_invalid;
>>>>>> Shouldn't this be accompanied with a BUILD_BUG_ON(p2m_invalid), as otherwise
>>>>>> p2m_alloc_page()'s clearing of the page won't have the intended effect?
>>>>> I think that, at least, at the moment we are always explicitly set p2m type and
>>>>> do not rely on that by default 0==p2m_invalid.
>>>> You don't, and ...
>>>>
>>>>> Just to be safe, I will add after "if ( metadata )" suggested
>>>>> BUILD_BUG_ON(p2m_invalid):
>>>>>           if ( metadata )
>>>>>               metadata[ctx->index].type = p2m_invalid;
>>>>>                   /*
>>>>>            * metadata.type is expected to be p2m_invalid (0) after the page is
>>>>>            * allocated and zero-initialized in p2m_alloc_page().
>>>>>            */
>>>>>           BUILD_BUG_ON(p2m_invalid);
>>>>> ...
>>>> ... this leaves me with the impression that you didn't read my reply correctly.
>>>> p2m_alloc_page() clear the page, thus_implicitly_ setting all entries to
>>>> p2m_invalid. That's where the BUILD_BUG_ON() would want to go (the call site,
>>>> ftaod).
>>> I think I still don’t fully understand what the issue would be if|p2m_invalid| were
>>> ever equal to 1 instead of 0 in the context of a metadata page.
>>>
>>> Yes, if|p2m_invalid| were 1, there would be a problem if someone tried to read this
>>> metadata pagebefore it was assigned any type. They would find a value of 0, which
>>> corresponds to a valid type rather than to|p2m_invalid|, as one might expect.
>>> However, I’m not sure I currently see a scenario in which the metadata page would
>>> be read before being initialized.
>> Are you sure walks can only happen for GFNs that were set up? What you need to
>> do walks on is under guest control, after all.
> 
> If a GFN lies within the range[p2m->lowest_mapped_gfn, p2m->max_mapped_gfn], then
> |p2m_set_entry()| must already have been called for this GFN.

No. All you know from the pre-condition is that p2m_set_entry() was called for the
lowest and highest GFNs in that range.

Jan

> This means that either
> - a metadata page has been created and its entry filled with the appropriate type, or
> - no metadata page was needed and the type was stored directly in|pte->pte|
> 
> For a GFN outside the range(p2m->lowest_mapped_gfn, p2m->max_mapped_gfn),
> |p2m_get_entry()| will not even attempt a walk because of the boundary checks:
>      static mfn_t p2m_get_entry(struct p2m_domain *p2m, gfn_t gfn,
>                                 p2m_type_t *t,
>                                 unsigned int *page_order)
>      ...
>          if ( check_outside_boundary(p2m, gfn, p2m->lowest_mapped_gfn, true,
>                                      &level) )
>              goto out;
>      
>          if ( check_outside_boundary(p2m, gfn, p2m->max_mapped_gfn, false, &level) )
>              goto out;
> 
> If I am misunderstanding something and there are other cases where a walk can occur for
> GFNs that were never set up, then such GFNs would have neither an allocated metadata
> page nor a type stored in|pte->pte|, which looks like we are in trouble.
> 
> ~ Oleksii
> 



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From: Markus Armbruster 
To: "Dr. David Alan Gilbert" 
Cc: qemu-devel@nongnu.org,  arei.gonglei@huawei.com,
  pizhenwei@bytedance.com,  alistair.francis@wdc.com,
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  xen-devel@lists.xenproject.org,  kvm@vger.kernel.org,
  qemu-riscv@nongnu.org
Subject: Re: [PATCH 11/14] error: Use error_setg_errno() to improve error
 messages
In-Reply-To: <87o6owq6ob.fsf@pond.sub.org> (Markus Armbruster's message of
	"Fri, 21 Nov 2025 06:46:28 +0100")
References: <20251120191339.756429-1-armbru@redhat.com>
	<20251120191339.756429-12-armbru@redhat.com>
	 <87o6owq6ob.fsf@pond.sub.org>
Date: Fri, 21 Nov 2025 08:37:21 +0100
Message-ID: <87a50fq1ji.fsf@pond.sub.org>
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Markus Armbruster  writes:

> "Dr. David Alan Gilbert"  writes:
>
>> * Markus Armbruster (armbru@redhat.com) wrote:
>>> A few error messages show numeric errno codes.  Use error_setg_errno()
>>> to show human-readable text instead.
>>> 
>>> Signed-off-by: Markus Armbruster 
>>
>> ...
>>
>>> diff --git a/migration/rdma.c b/migration/rdma.c
>>> index 337b415889..ef4885ef5f 100644
>>> --- a/migration/rdma.c
>>> +++ b/migration/rdma.c
>>> @@ -2349,8 +2349,7 @@ static int qemu_get_cm_event_timeout(RDMAContext *rdma,
>>>          error_setg(errp, "RDMA ERROR: poll cm event timeout");
>>>          return -1;
>>>      } else if (ret < 0) {
>>> -        error_setg(errp, "RDMA ERROR: failed to poll cm event, errno=%i",
>>> -                   errno);
>>> +        error_setg_errno(errp, "RDMA ERROR: failed to poll cm event");
>>
>> Hasn't that lost the errno ?
>
> Yes.  My build tree must have lost the ability to compile this file.  I
> need to fix that.

Actually a patch splitting accident.  Fixed.

[...]



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Subject: Re: [PATCH 05/12] x86/io-apic: purge usage of logical mode
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On 20.11.2025 19:30, Andrew Cooper wrote:
> On 20/11/2025 2:27 pm, Jan Beulich wrote:
>> On 20.11.2025 14:18, Andrew Cooper wrote:
>>> On 20/11/2025 9:06 am, Roger Pau Monne wrote:
>>>> The IO-APIC RTEs are unconditionally programmed with physical destination
>>>> mode, and hence the field to set in the RTE is always physical_dest.
>>>>
>>>> Remove the mode parameter from SET_DEST() and take the opportunity to
>>>> convert it into a function, there's no need for it to be a macro.
>>>>
>>>> This is a benign fix, because due to the endianness of x86 the start of the
>>>> physical_dest and logical_dest fields on the RTE overlap.
>>> RTEs do not have overlapping fields; it's Xen's abstraction of the
>>> IO-APIC which is buggy.
>> I wouldn't put it this negatively. In the old days, ...
>>
>>> For starters, Xen's IO_APIC_route_entry still only has a 4-bit
>>> physical_dest field which hasn't been true since the Pentium 4 days. 
>>> This might explain some of the interrupt bugs we see.
>> ... as you mention here, the two fields were distinct (and hence overlapping).
> 
> Since when?
> 
> Even in the oldest manuals I can find, it's a single field called
> destination, and who's contents is interpreted differently depending on
> the logical mode bit.

And these two different meanings are reflected in the union-ized definition
in Xen. Which I still think is fair to describe as "overlapping". And the
use of a union itself isn't buggy imo; it's some of the code using it which
is.

Jan


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Subject: Re: [PATCH 2/4] x86/MCE: restrict allocation of thermal and CMCI
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To: Andrew Cooper 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 "xen-devel@lists.xenproject.org" 
References: 
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On 20.11.2025 18:25, Andrew Cooper wrote:
> On 20/11/2025 12:11 pm, Jan Beulich wrote:
>> On 20.11.2025 12:51, Andrew Cooper wrote:
>>> On 19/11/2025 10:50 am, Jan Beulich wrote:
>>>> --- a/xen/arch/x86/cpu/mcheck/mce.c
>>>> +++ b/xen/arch/x86/cpu/mcheck/mce.c
>>>> @@ -110,13 +110,13 @@ static void __init mcheck_intel_therm_in
>>>>  }
>>>>  
>>>>  /* P4/Xeon Thermal regulation detect and init */
>>>> -static void intel_init_thermal(struct cpuinfo_x86 *c)
>>>> +static void intel_init_thermal(const struct cpuinfo_x86 *c, bool bsp)
>>>>  {
>>>>      uint64_t msr_content;
>>>>      uint32_t val;
>>>>      int tm2 = 0;
>>>>      unsigned int cpu = smp_processor_id();
>>>> -    static uint8_t thermal_apic_vector;
>>>> +    static uint8_t __ro_after_init thermal_apic_vector;
>>>>  
>>>>      if ( !intel_thermal_supported(c) )
>>>>          return; /* -ENODEV */
>>>> @@ -160,7 +160,8 @@ static void intel_init_thermal(struct cp
>>>>          return; /* -EBUSY */
>>>>      }
>>>>  
>>>> -    alloc_direct_apic_vector(&thermal_apic_vector, intel_thermal_interrupt);
>>>> +    if ( bsp )
>>>> +        alloc_direct_apic_vector(&thermal_apic_vector, intel_thermal_interrupt);
>>> We really don't want both c and bsp passed in.  That can only go wrong.
>>>
>>> Furthermore, this function has 2 other examples generating bsp locally.
>>>
>>> The function is in desperate need of cleanup (MSRs, variable and
>>> constant names), but right now this makes it worse.
>>>
>>> Please either use c == &boot_cpu_data, and I'll do some cleanup later,
>>> or generate bsp = c == &boot_cpu_data and fix up all users in the function.
>> No, throughout mce/ this won't work as long as acpi/power.c:enter_state() has
>>
>>     mcheck_init(&boot_cpu_data, false);
> 
> How's not not already broken then?  As said, intel_init_thermal() is
> already using c == &boot_cpu_data.

That's two printk()s, so not overly severe a bug. And being fixed by "x86/MCE:
adjust S3 resume handling" posted months ago. There I'm actually putting up
the question whether one of the two could/should stay as is.

> This patch introduces a conflicting idea of bsp in this function, and
> that's what I really want to avoid.
> 
> This looks like it wants splitting properly as {bsp,percpu}_init_$FOO()
> like we have elsewhere.

Without detailed checking, I'm not sure that would properly cover things.
Right now we have three modes: BSP (boot), BSP (resume), and AP.

More importantly, though: This would be more than enough content for another
series, i.e. shouldn't block the work here (which really moves things to a
more consistent state, within cpu/mcheck/, just like that other patch also
aims at doing).

Jan


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Subject: Re: [PATCH 04/14] qga: Use error_setg_file_open() for better error messages
To: Markus Armbruster 
Cc: qemu-devel@nongnu.org, arei.gonglei@huawei.com, pizhenwei@bytedance.com, 
	alistair.francis@wdc.com, stefanb@linux.vnet.ibm.com, kwolf@redhat.com, 
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--000000000000fce1ef064415ea4e
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Reviewed-by: Kostiantyn Kostiuk 

On Thu, Nov 20, 2025 at 9:13=E2=80=AFPM Markus Armbruster  wrote:

> Error messages change from
>
>     open("FNAME"): REASON
>
> to
>
>     Could not open 'FNAME': REASON
>
> Signed-off-by: Markus Armbruster 
> ---
>  qga/commands-linux.c | 11 ++++++-----
>  1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/qga/commands-linux.c b/qga/commands-linux.c
> index 4a09ddc760..5cf76ca2d9 100644
> --- a/qga/commands-linux.c
> +++ b/qga/commands-linux.c
> @@ -1502,14 +1502,15 @@ static void transfer_vcpu(GuestLogicalProcessor
> *vcpu, bool sys2vcpu,
>
>      dirfd =3D open(dirpath, O_RDONLY | O_DIRECTORY);
>      if (dirfd =3D=3D -1) {
> -        error_setg_errno(errp, errno, "open(\"%s\")", dirpath);
> +        error_setg_file_open(errp, errno, dirpath);
>          return;
>      }
>
>      fd =3D openat(dirfd, fn, sys2vcpu ? O_RDONLY : O_RDWR);
>      if (fd =3D=3D -1) {
>          if (errno !=3D ENOENT) {
> -            error_setg_errno(errp, errno, "open(\"%s/%s\")", dirpath, fn=
);
> +            error_setg_errno(errp, errno, "could not open %s/%s",
> +                             dirpath, fn);
>          } else if (sys2vcpu) {
>              vcpu->online =3D true;
>              vcpu->can_offline =3D false;
> @@ -1711,7 +1712,7 @@ static void transfer_memory_block(GuestMemoryBlock
> *mem_blk, bool sys2memblk,
>      dirfd =3D open(dirpath, O_RDONLY | O_DIRECTORY);
>      if (dirfd =3D=3D -1) {
>          if (sys2memblk) {
> -            error_setg_errno(errp, errno, "open(\"%s\")", dirpath);
> +            error_setg_file_open(errp, errno, dirpath);
>          } else {
>              if (errno =3D=3D ENOENT) {
>                  result->response =3D
> GUEST_MEMORY_BLOCK_RESPONSE_TYPE_NOT_FOUND;
> @@ -1936,7 +1937,7 @@ static GuestDiskStatsInfoList
> *guest_get_diskstats(Error **errp)
>
>      fp =3D fopen(diskstats, "r");
>      if (fp  =3D=3D NULL) {
> -        error_setg_errno(errp, errno, "open(\"%s\")", diskstats);
> +        error_setg_file_open(errp, errno, diskstats);
>          return NULL;
>      }
>
> @@ -2047,7 +2048,7 @@ GuestCpuStatsList *qmp_guest_get_cpustats(Error
> **errp)
>
>      fp =3D fopen(cpustats, "r");
>      if (fp  =3D=3D NULL) {
> -        error_setg_errno(errp, errno, "open(\"%s\")", cpustats);
> +        error_setg_file_open(errp, errno, cpustats);
>          return NULL;
>      }
>
> --
> 2.49.0
>
>

--000000000000fce1ef064415ea4e
Content-Type: text/html; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable


Reviewed-by: Kostiantyn Kostiuk <kkostiuk@redhat.com>

On Thu, Nov 20, 2025 at 9:13=E2=80=AFPM Markus Armbruster <armbru@redhat.com> wrote:
=

Error messages change fro=
m



=C2=A0 =C2=A0 open("FNAME"): REASON



to



=C2=A0 =C2=A0 Could not open 'FNAME': REASON



Signed-off-by: Markus Armbruster <armbru@redhat.com>

---

=C2=A0qga/commands-linux.c | 11 ++++++-----

=C2=A01 file changed, 6 insertions(+), 5 deletions(-)



diff --git a/qga/commands-linux.c b/qga/commands-linux.c

index 4a09ddc760..5cf76ca2d9 100644

--- a/qga/commands-linux.c

+++ b/qga/commands-linux.c

@@ -1502,14 +1502,15 @@ static void transfer_vcpu(GuestLogicalProcessor *vc=
pu, bool sys2vcpu,



=C2=A0 =C2=A0 =C2=A0dirfd =3D open(dirpath, O_RDONLY | O_DIRECTORY);

=C2=A0 =C2=A0 =C2=A0if (dirfd =3D=3D -1) {

-=C2=A0 =C2=A0 =C2=A0 =C2=A0 error_setg_errno(errp, errno, "open(\&quo=
t;%s\")", dirpath);

+=C2=A0 =C2=A0 =C2=A0 =C2=A0 error_setg_file_open(errp, errno, dirpath);
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return;

=C2=A0 =C2=A0 =C2=A0}



=C2=A0 =C2=A0 =C2=A0fd =3D openat(dirfd, fn, sys2vcpu ? O_RDONLY : O_RDWR);=


=C2=A0 =C2=A0 =C2=A0if (fd =3D=3D -1) {

=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0if (errno !=3D ENOENT) {

-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 error_setg_errno(errp, errno, &q=
uot;open(\"%s/%s\")", dirpath, fn);

+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 error_setg_errno(errp, errno, &q=
uot;could not open %s/%s",

+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=
=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0dirpath, fn);

=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0} else if (sys2vcpu) {

=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0vcpu->online =3D true;
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0vcpu->can_offline =3D fa=
lse;

@@ -1711,7 +1712,7 @@ static void transfer_memory_block(GuestMemoryBlock *m=
em_blk, bool sys2memblk,

=C2=A0 =C2=A0 =C2=A0dirfd =3D open(dirpath, O_RDONLY | O_DIRECTORY);

=C2=A0 =C2=A0 =C2=A0if (dirfd =3D=3D -1) {

=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0if (sys2memblk) {

-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 error_setg_errno(errp, errno, &q=
uot;open(\"%s\")", dirpath);

+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 error_setg_file_open(errp, errno=
, dirpath);

=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0} else {

=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0if (errno =3D=3D ENOENT) {<=
br>
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0result->re=
sponse =3D GUEST_MEMORY_BLOCK_RESPONSE_TYPE_NOT_FOUND;

@@ -1936,7 +1937,7 @@ static GuestDiskStatsInfoList *guest_get_diskstats(Er=
ror **errp)



=C2=A0 =C2=A0 =C2=A0fp =3D fopen(diskstats, "r");

=C2=A0 =C2=A0 =C2=A0if (fp=C2=A0 =3D=3D NULL) {

-=C2=A0 =C2=A0 =C2=A0 =C2=A0 error_setg_errno(errp, errno, "open(\&quo=
t;%s\")", diskstats);

+=C2=A0 =C2=A0 =C2=A0 =C2=A0 error_setg_file_open(errp, errno, diskstats);<=
br>
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return NULL;

=C2=A0 =C2=A0 =C2=A0}



@@ -2047,7 +2048,7 @@ GuestCpuStatsList *qmp_guest_get_cpustats(Error **err=
p)



=C2=A0 =C2=A0 =C2=A0fp =3D fopen(cpustats, "r");

=C2=A0 =C2=A0 =C2=A0if (fp=C2=A0 =3D=3D NULL) {

-=C2=A0 =C2=A0 =C2=A0 =C2=A0 error_setg_errno(errp, errno, "open(\&quo=
t;%s\")", cpustats);

+=C2=A0 =C2=A0 =C2=A0 =C2=A0 error_setg_file_open(errp, errno, cpustats);
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return NULL;

=C2=A0 =C2=A0 =C2=A0}



-- 

2.49.0






--000000000000fce1ef064415ea4e--



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From: Kostiantyn Kostiuk 
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Subject: Re: [PATCH 13/14] qga/commands-win32: Use error_setg_win32() for
 better error messages
To: Markus Armbruster 
Cc: qemu-devel@nongnu.org, arei.gonglei@huawei.com, pizhenwei@bytedance.com, 
	alistair.francis@wdc.com, stefanb@linux.vnet.ibm.com, kwolf@redhat.com, 
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--00000000000064bbee064415f7a2
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Reviewed-by: Kostiantyn Kostiuk 

On Thu, Nov 20, 2025 at 9:14=E2=80=AFPM Markus Armbruster  wrote:

> We include numeric GetLastError() codes in error messages in a few
> places, like this:
>
>     error_setg(errp, "GRIPE: %d", (int)GetLastError());
>
> Show text instead, like this:
>
>     error_setg_win32(errp, GetLastError(), "GRIPE");
>
> Signed-off-by: Markus Armbruster 
> ---
>  qga/commands-win32.c | 16 ++++++++--------
>  1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/qga/commands-win32.c b/qga/commands-win32.c
> index acc2c11589..0fd0c966e4 100644
> --- a/qga/commands-win32.c
> +++ b/qga/commands-win32.c
> @@ -1798,8 +1798,8 @@ void qmp_guest_set_time(bool has_time, int64_t
> time_ns, Error **errp)
>      tf.dwHighDateTime =3D (DWORD) (time >> 32);
>
>      if (!FileTimeToSystemTime(&tf, &ts)) {
> -        error_setg(errp, "Failed to convert system time %d",
> -                   (int)GetLastError());
> +        error_setg_win32(errp, GetLastError(),
> +                         "Failed to convert system time");
>          return;
>      }
>
> @@ -1810,7 +1810,8 @@ void qmp_guest_set_time(bool has_time, int64_t
> time_ns, Error **errp)
>      }
>
>      if (!SetSystemTime(&ts)) {
> -        error_setg(errp, "Failed to set time to guest: %d",
> (int)GetLastError());
> +        error_setg_win32(errp, GetLastError(),
> +                         "Failed to set time to guest");
>          return;
>      }
>  }
> @@ -1834,13 +1835,12 @@ GuestLogicalProcessorList
> *qmp_guest_get_vcpus(Error **errp)
>          (length > sizeof(SYSTEM_LOGICAL_PROCESSOR_INFORMATION))) {
>          ptr =3D pslpi =3D g_malloc0(length);
>          if (GetLogicalProcessorInformation(pslpi, &length) =3D=3D FALSE)=
 {
> -            error_setg(&local_err, "Failed to get processor information:
> %d",
> -                       (int)GetLastError());
> +            error_setg_win32(&local_err, GetLastError(),
> +                             "Failed to get processor information");
>          }
>      } else {
> -        error_setg(&local_err,
> -                   "Failed to get processor information buffer length:
> %d",
> -                   (int)GetLastError());
> +        error_setg_win32(&local_err, GetLastError(),
> +                         "Failed to get processor information buffer
> length");
>      }
>
>      while ((local_err =3D=3D NULL) && (length > 0)) {
> --
> 2.49.0
>
>

--00000000000064bbee064415f7a2
Content-Type: text/html; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable


Reviewed-by: Kostiantyn Kostiuk <kkostiuk@redhat.com>

On Thu, Nov 20, 2025 at 9:14=E2=80=AFPM Markus Armbruster <armbru@redhat.com> wrote:
=

We include numeric GetLas=
tError() codes in error messages in a few

places, like this:



=C2=A0 =C2=A0 error_setg(errp, "GRIPE: %d", (int)GetLastError());=




Show text instead, like this:



=C2=A0 =C2=A0 error_setg_win32(errp, GetLastError(), "GRIPE");


Signed-off-by: Markus Armbruster <armbru@redhat.com>

---

=C2=A0qga/commands-win32.c | 16 ++++++++--------

=C2=A01 file changed, 8 insertions(+), 8 deletions(-)



diff --git a/qga/commands-win32.c b/qga/commands-win32.c

index acc2c11589..0fd0c966e4 100644

--- a/qga/commands-win32.c

+++ b/qga/commands-win32.c

@@ -1798,8 +1798,8 @@ void qmp_guest_set_time(bool has_time, int64_t time_n=
s, Error **errp)

=C2=A0 =C2=A0 =C2=A0tf.dwHighDateTime =3D (DWORD) (time >> 32);



=C2=A0 =C2=A0 =C2=A0if (!FileTimeToSystemTime(&tf, &ts)) {

-=C2=A0 =C2=A0 =C2=A0 =C2=A0 error_setg(errp, "Failed to convert syste=
m time %d",

-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0(int)=
GetLastError());

+=C2=A0 =C2=A0 =C2=A0 =C2=A0 error_setg_win32(errp, GetLastError(),

+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=
=A0 =C2=A0 =C2=A0"Failed to convert system time");

=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return;

=C2=A0 =C2=A0 =C2=A0}



@@ -1810,7 +1810,8 @@ void qmp_guest_set_time(bool has_time, int64_t time_n=
s, Error **errp)

=C2=A0 =C2=A0 =C2=A0}



=C2=A0 =C2=A0 =C2=A0if (!SetSystemTime(&ts)) {

-=C2=A0 =C2=A0 =C2=A0 =C2=A0 error_setg(errp, "Failed to set time to g=
uest: %d", (int)GetLastError());

+=C2=A0 =C2=A0 =C2=A0 =C2=A0 error_setg_win32(errp, GetLastError(),

+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=
=A0 =C2=A0 =C2=A0"Failed to set time to guest");

=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return;

=C2=A0 =C2=A0 =C2=A0}

=C2=A0}

@@ -1834,13 +1835,12 @@ GuestLogicalProcessorList *qmp_guest_get_vcpus(Erro=
r **errp)

=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0(length > sizeof(SYSTEM_LOGICAL_PROCES=
SOR_INFORMATION))) {

=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0ptr =3D pslpi =3D g_malloc0(length);

=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0if (GetLogicalProcessorInformation(pslpi,=
 &length) =3D=3D FALSE) {

-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 error_setg(&local_err, "=
;Failed to get processor information: %d",

-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=
=A0 =C2=A0(int)GetLastError());

+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 error_setg_win32(&local_err,=
 GetLastError(),

+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=
=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0"Failed to get processor information&qu=
ot;);

=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0}

=C2=A0 =C2=A0 =C2=A0} else {

-=C2=A0 =C2=A0 =C2=A0 =C2=A0 error_setg(&local_err,

-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0"=
;Failed to get processor information buffer length: %d",

-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0(int)=
GetLastError());

+=C2=A0 =C2=A0 =C2=A0 =C2=A0 error_setg_win32(&local_err, GetLastError(=
),

+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=
=A0 =C2=A0 =C2=A0"Failed to get processor information buffer length&qu=
ot;);

=C2=A0 =C2=A0 =C2=A0}



=C2=A0 =C2=A0 =C2=A0while ((local_err =3D=3D NULL) && (length > =
0)) {

-- 

2.49.0






--00000000000064bbee064415f7a2--



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Subject: [PATCH v2 0/7] consolidate vm event subsystem
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This patch serie originates from "Disable domctl-op via CONFIG_MGMT_HYPERCALLS"
[1], and focuses on consolidating vm event subsystem (i.e. VM_EVENT), and its
derived features, like memory paging, etc.

[1] https://www.mail-archive.com/xen-devel@lists.xenproject.org/msg200843.html

Penny Zheng (7):
  xen/x86: move declaration from mem_access.h to altp2m.h
  xen/xsm: wrap xsm_vm_event_control() with CONFIG_VM_EVENT
  x86/vm_event: introduce vm_event_is_enabled()
  x86/monitor: wrap monitor_op under CONFIG_VM_EVENT
  xen/p2m: move xenmem_access_to_p2m_access() to common p2m.c
  xen/mem_access: wrap memory access when VM_EVENT=n
  xen/vm_event: consolidate CONFIG_VM_EVENT

 xen/arch/x86/Makefile                 |  2 +-
 xen/arch/x86/hvm/Kconfig              |  1 -
 xen/arch/x86/hvm/Makefile             |  4 +-
 xen/arch/x86/hvm/emulate.c            | 67 ++++++++++++------------
 xen/arch/x86/hvm/hvm.c                | 49 +++++++++++++++---
 xen/arch/x86/hvm/svm/intr.c           |  2 +-
 xen/arch/x86/hvm/svm/svm.c            | 54 ++++++++++++--------
 xen/arch/x86/hvm/vmx/intr.c           |  2 +-
 xen/arch/x86/hvm/vmx/vmx.c            | 73 ++++++++++++++++++---------
 xen/arch/x86/include/asm/altp2m.h     | 10 ++++
 xen/arch/x86/include/asm/hvm/hvm.h    | 18 ++++---
 xen/arch/x86/include/asm/mem_access.h | 20 ++++----
 xen/arch/x86/include/asm/monitor.h    |  9 ++++
 xen/arch/x86/include/asm/vm_event.h   |  5 ++
 xen/arch/x86/mm/mem_access.c          | 36 -------------
 xen/arch/x86/mm/mem_sharing.c         |  3 ++
 xen/arch/x86/mm/p2m.c                 | 40 +++++++++++++++
 xen/common/Kconfig                    |  7 +--
 xen/include/xen/mem_access.h          |  5 --
 xen/include/xen/p2m-common.h          |  3 ++
 xen/include/xen/vm_event.h            |  7 +++
 xen/include/xsm/dummy.h               |  2 +-
 xen/include/xsm/xsm.h                 |  4 +-
 xen/xsm/dummy.c                       |  2 +-
 xen/xsm/flask/hooks.c                 |  4 +-
 25 files changed, 270 insertions(+), 159 deletions(-)

-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, "Daniel P. Smith" ,
	Stefano Stabellini 
Subject: [PATCH v2 2/7] xen/xsm: wrap xsm_vm_event_control() with CONFIG_VM_EVENT
Date: Fri, 21 Nov 2025 15:47:58 +0800
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Function xsm_vm_event_control() is only invoked under CONFIG_VM_EVENT, so
it shall be wrapped with it, otherwiae it will become unreachable when
VM_EVENT=n and hence violating Misra rule 2.1.

Signed-off-by: Penny Zheng 
Reviewed-by: Stefano Stabellini 
---
v1 -> v2:
- new commit
---
 xen/include/xsm/dummy.h | 2 +-
 xen/include/xsm/xsm.h   | 4 ++--
 xen/xsm/dummy.c         | 2 +-
 xen/xsm/flask/hooks.c   | 4 ++--
 4 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/xen/include/xsm/dummy.h b/xen/include/xsm/dummy.h
index 12792c3a43..e801dbcdba 100644
--- a/xen/include/xsm/dummy.h
+++ b/xen/include/xsm/dummy.h
@@ -640,6 +640,7 @@ static XSM_INLINE int cf_check xsm_hvm_altp2mhvm_op(
     }
 }
 
+#ifdef CONFIG_VM_EVENT
 static XSM_INLINE int cf_check xsm_vm_event_control(
     XSM_DEFAULT_ARG struct domain *d, int mode, int op)
 {
@@ -647,7 +648,6 @@ static XSM_INLINE int cf_check xsm_vm_event_control(
     return xsm_default_action(action, current->domain, d);
 }
 
-#ifdef CONFIG_VM_EVENT
 static XSM_INLINE int cf_check xsm_mem_access(XSM_DEFAULT_ARG struct domain *d)
 {
     XSM_ASSERT_ACTION(XSM_DM_PRIV);
diff --git a/xen/include/xsm/xsm.h b/xen/include/xsm/xsm.h
index 9a23d2827c..d9e5c831f3 100644
--- a/xen/include/xsm/xsm.h
+++ b/xen/include/xsm/xsm.h
@@ -155,9 +155,9 @@ struct xsm_ops {
     int (*hvm_altp2mhvm_op)(struct domain *d, uint64_t mode, uint32_t op);
     int (*get_vnumainfo)(struct domain *d);
 
+#ifdef CONFIG_VM_EVENT
     int (*vm_event_control)(struct domain *d, int mode, int op);
 
-#ifdef CONFIG_VM_EVENT
     int (*mem_access)(struct domain *d);
 #endif
 
@@ -649,13 +649,13 @@ static inline int xsm_get_vnumainfo(xsm_default_t def, struct domain *d)
     return alternative_call(xsm_ops.get_vnumainfo, d);
 }
 
+#ifdef CONFIG_VM_EVENT
 static inline int xsm_vm_event_control(
     xsm_default_t def, struct domain *d, int mode, int op)
 {
     return alternative_call(xsm_ops.vm_event_control, d, mode, op);
 }
 
-#ifdef CONFIG_VM_EVENT
 static inline int xsm_mem_access(xsm_default_t def, struct domain *d)
 {
     return alternative_call(xsm_ops.mem_access, d);
diff --git a/xen/xsm/dummy.c b/xen/xsm/dummy.c
index 8b7e01b506..96dc82ac2e 100644
--- a/xen/xsm/dummy.c
+++ b/xen/xsm/dummy.c
@@ -115,9 +115,9 @@ static const struct xsm_ops __initconst_cf_clobber dummy_ops = {
     .remove_from_physmap           = xsm_remove_from_physmap,
     .map_gmfn_foreign              = xsm_map_gmfn_foreign,
 
+#ifdef CONFIG_VM_EVENT
     .vm_event_control              = xsm_vm_event_control,
 
-#ifdef CONFIG_VM_EVENT
     .mem_access                    = xsm_mem_access,
 #endif
 
diff --git a/xen/xsm/flask/hooks.c b/xen/xsm/flask/hooks.c
index b0308e1b26..9f3915617c 100644
--- a/xen/xsm/flask/hooks.c
+++ b/xen/xsm/flask/hooks.c
@@ -1365,12 +1365,12 @@ static int cf_check flask_hvm_altp2mhvm_op(struct domain *d, uint64_t mode, uint
     return current_has_perm(d, SECCLASS_HVM, HVM__ALTP2MHVM_OP);
 }
 
+#ifdef CONFIG_VM_EVENT
 static int cf_check flask_vm_event_control(struct domain *d, int mode, int op)
 {
     return current_has_perm(d, SECCLASS_DOMAIN2, DOMAIN2__VM_EVENT);
 }
 
-#ifdef CONFIG_VM_EVENT
 static int cf_check flask_mem_access(struct domain *d)
 {
     return current_has_perm(d, SECCLASS_DOMAIN2, DOMAIN2__MEM_ACCESS);
@@ -1967,9 +1967,9 @@ static const struct xsm_ops __initconst_cf_clobber flask_ops = {
     .do_xsm_op = do_flask_op,
     .get_vnumainfo = flask_get_vnumainfo,
 
+#ifdef CONFIG_VM_EVENT
     .vm_event_control = flask_vm_event_control,
 
-#ifdef CONFIG_VM_EVENT
     .mem_access = flask_mem_access,
 #endif
 
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, Jan Beulich , Andrew Cooper
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Tamas K Lengyel , "Alexandru
 Isaila" , Petre Pircalabu
	, Jason Andryuk 
Subject: [PATCH v2 1/7] xen/x86: move declaration from mem_access.h to altp2m.h
Date: Fri, 21 Nov 2025 15:47:57 +0800
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Memory access and ALTP2M are two seperate features, and each could be
controlled via VM_EVENT or ALTP2M. In order to avoid implicit declaration
when ALTP2M=y and VM_EVENT=n on compiling hvm.o/altp2m.o, we move declaration
of the following functions from  to :
- p2m_set_suppress_ve
- p2m_set_suppress_ve_multi
- p2m_get_suppress_ve
Potential error on altp2m.c also breaks Misra Rule 8.4.

Signed-off-by: Penny Zheng 
Reviewed-by: Jan Beulich 
Reviewed-by: Jason Andryuk 
---
 xen/arch/x86/include/asm/altp2m.h     | 10 ++++++++++
 xen/arch/x86/include/asm/mem_access.h | 10 ----------
 2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/xen/arch/x86/include/asm/altp2m.h b/xen/arch/x86/include/asm/altp2m.h
index 8ecd74f363..9c1ac3cc26 100644
--- a/xen/arch/x86/include/asm/altp2m.h
+++ b/xen/arch/x86/include/asm/altp2m.h
@@ -46,6 +46,16 @@ void altp2m_vcpu_destroy(struct vcpu *v);
 int altp2m_vcpu_enable_ve(struct vcpu *v, gfn_t gfn);
 void altp2m_vcpu_disable_ve(struct vcpu *v);
 
+int p2m_set_suppress_ve(struct domain *d, gfn_t gfn, bool suppress_ve,
+                        unsigned int altp2m_idx);
+
+struct xen_hvm_altp2m_suppress_ve_multi;
+int p2m_set_suppress_ve_multi(struct domain *d,
+                              struct xen_hvm_altp2m_suppress_ve_multi *sve);
+
+int p2m_get_suppress_ve(struct domain *d, gfn_t gfn, bool *suppress_ve,
+                        unsigned int altp2m_idx);
+
 #else
 
 static inline bool altp2m_is_eptp_valid(const struct domain *d,
diff --git a/xen/arch/x86/include/asm/mem_access.h b/xen/arch/x86/include/asm/mem_access.h
index 1a52a10322..257ed33de1 100644
--- a/xen/arch/x86/include/asm/mem_access.h
+++ b/xen/arch/x86/include/asm/mem_access.h
@@ -34,16 +34,6 @@ bool p2m_mem_access_emulate_check(struct vcpu *v,
 /* Sanity check for mem_access hardware support */
 bool p2m_mem_access_sanity_check(const struct domain *d);
 
-int p2m_set_suppress_ve(struct domain *d, gfn_t gfn, bool suppress_ve,
-                        unsigned int altp2m_idx);
-
-struct xen_hvm_altp2m_suppress_ve_multi;
-int p2m_set_suppress_ve_multi(struct domain *d,
-                              struct xen_hvm_altp2m_suppress_ve_multi *sve);
-
-int p2m_get_suppress_ve(struct domain *d, gfn_t gfn, bool *suppress_ve,
-                        unsigned int altp2m_idx);
-
 #endif /*__ASM_X86_MEM_ACCESS_H__ */
 
 /*
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, Tamas K Lengyel , "Alexandru
 Isaila" , Petre Pircalabu
	, Jan Beulich , Andrew Cooper
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Anthony PERARD , "Michal
 Orzel" , Julien Grall , "Stefano
 Stabellini" 
Subject: [PATCH v2 5/7] xen/p2m: move xenmem_access_to_p2m_access() to common p2m.c
Date: Fri, 21 Nov 2025 15:48:01 +0800
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Memory access and ALTP2M are two seperate features, while both depending on
helper xenmem_access_to_p2m_access(). So it betters lives in common p2m.c,
other than mem_access.c which will be compiled out when VM_EVENT=n && ALTP2M=y.
Guard xenmem_access_to_p2m_access() with VM_EVENT || ALTP2M, otherwise it
will become unreachable when both VM_EVENT=n and ALTP2M=n, and hence
violating Misra rule 2.1
We also need to move declaration from mem_access.h to p2m-common.h
An extra blank line is inserted after each case-block to correct coding
style at the same time.

Signed-off-by: Penny Zheng 
---
v1 -> v2:
- Guard xenmem_access_to_p2m_access() with VM_EVENT || ALTP2M
- Move declaration from mem_access.h to p2m-common.h
- refine commit message
---
 xen/arch/x86/mm/mem_access.c | 36 --------------------------------
 xen/arch/x86/mm/p2m.c        | 40 ++++++++++++++++++++++++++++++++++++
 xen/include/xen/mem_access.h |  5 -----
 xen/include/xen/p2m-common.h |  3 +++
 4 files changed, 43 insertions(+), 41 deletions(-)

diff --git a/xen/arch/x86/mm/mem_access.c b/xen/arch/x86/mm/mem_access.c
index e6b609064c..e55e53f44c 100644
--- a/xen/arch/x86/mm/mem_access.c
+++ b/xen/arch/x86/mm/mem_access.c
@@ -298,42 +298,6 @@ static int set_mem_access(struct domain *d, struct p2m_domain *p2m,
     return rc;
 }
 
-bool xenmem_access_to_p2m_access(const struct p2m_domain *p2m,
-                                 xenmem_access_t xaccess,
-                                 p2m_access_t *paccess)
-{
-    static const p2m_access_t memaccess[] = {
-#define ACCESS(ac) [XENMEM_access_##ac] = p2m_access_##ac
-        ACCESS(n),
-        ACCESS(r),
-        ACCESS(w),
-        ACCESS(rw),
-        ACCESS(x),
-        ACCESS(rx),
-        ACCESS(wx),
-        ACCESS(rwx),
-        ACCESS(rx2rw),
-        ACCESS(n2rwx),
-        ACCESS(r_pw),
-#undef ACCESS
-    };
-
-    switch ( xaccess )
-    {
-    case 0 ... ARRAY_SIZE(memaccess) - 1:
-        xaccess = array_index_nospec(xaccess, ARRAY_SIZE(memaccess));
-        *paccess = memaccess[xaccess];
-        break;
-    case XENMEM_access_default:
-        *paccess = p2m->default_access;
-        break;
-    default:
-        return false;
-    }
-
-    return true;
-}
-
 /*
  * Set access type for a region of gfns.
  * If gfn == INVALID_GFN, sets the default access type.
diff --git a/xen/arch/x86/mm/p2m.c b/xen/arch/x86/mm/p2m.c
index e2a00a0efd..2763f9a6be 100644
--- a/xen/arch/x86/mm/p2m.c
+++ b/xen/arch/x86/mm/p2m.c
@@ -2189,6 +2189,46 @@ void p2m_log_dirty_range(struct domain *d, unsigned long begin_pfn,
     guest_flush_tlb_mask(d, d->dirty_cpumask);
 }
 
+#if defined(CONFIG_VM_EVENT) || defined(CONFIG_ALTP2M)
+bool xenmem_access_to_p2m_access(const struct p2m_domain *p2m,
+                                 xenmem_access_t xaccess,
+                                 p2m_access_t *paccess)
+{
+    static const p2m_access_t memaccess[] = {
+#define ACCESS(ac) [XENMEM_access_##ac] = p2m_access_##ac
+        ACCESS(n),
+        ACCESS(r),
+        ACCESS(w),
+        ACCESS(rw),
+        ACCESS(x),
+        ACCESS(rx),
+        ACCESS(wx),
+        ACCESS(rwx),
+        ACCESS(rx2rw),
+        ACCESS(n2rwx),
+        ACCESS(r_pw),
+#undef ACCESS
+    };
+
+    switch ( xaccess )
+    {
+    case 0 ... ARRAY_SIZE(memaccess) - 1:
+        xaccess = array_index_nospec(xaccess, ARRAY_SIZE(memaccess));
+        *paccess = memaccess[xaccess];
+        break;
+
+    case XENMEM_access_default:
+        *paccess = p2m->default_access;
+        break;
+
+    default:
+        return false;
+    }
+
+    return true;
+}
+#endif /* VM_EVENT || ALTP2M */
+
 /*
  * Local variables:
  * mode: C
diff --git a/xen/include/xen/mem_access.h b/xen/include/xen/mem_access.h
index 4de651038d..8e7d9ea2e3 100644
--- a/xen/include/xen/mem_access.h
+++ b/xen/include/xen/mem_access.h
@@ -73,11 +73,6 @@ typedef enum {
     /* NOTE: Assumed to be only 4 bits right now on x86. */
 } p2m_access_t;
 
-struct p2m_domain;
-bool xenmem_access_to_p2m_access(const struct p2m_domain *p2m,
-                                 xenmem_access_t xaccess,
-                                 p2m_access_t *paccess);
-
 /*
  * Set access type for a region of gfns.
  * If gfn == INVALID_GFN, sets the default access type.
diff --git a/xen/include/xen/p2m-common.h b/xen/include/xen/p2m-common.h
index f0bd9a6b98..bd4169caee 100644
--- a/xen/include/xen/p2m-common.h
+++ b/xen/include/xen/p2m-common.h
@@ -43,5 +43,8 @@ int __must_check check_get_page_from_gfn(struct domain *d, gfn_t gfn,
                                          bool readonly, p2m_type_t *p2mt_p,
                                          struct page_info **page_p);
 
+bool xenmem_access_to_p2m_access(const struct p2m_domain *p2m,
+                                 xenmem_access_t xaccess,
+                                 p2m_access_t *paccess);
 
 #endif /* _XEN_P2M_COMMON_H */
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, Jan Beulich , Andrew Cooper
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Jason Andryuk , "Tamas K
 Lengyel" , Alexandru Isaila ,
	Petre Pircalabu 
Subject: [PATCH v2 4/7] x86/monitor: wrap monitor_op under CONFIG_VM_EVENT
Date: Fri, 21 Nov 2025 15:48:00 +0800
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Feature monitor_op is based on vm event subsystem, so monitor.o shall be
wrapped under CONFIG_VM_EVENT.
The following functions are only invoked by monitor-op, so they all shall be
wrapped with CONFIG_VM_EVENT (otherwise they will become unreachable and
violate Misra rule 2.1 when VM_EVENT=n):
- hvm_enable_msr_interception
  - hvm_function_table.enable_msr_interception
- hvm_has_set_descriptor_access_existing
  - hvm_function_table.set_descriptor_access_existi
- arch_monitor_get_capabilities
Function monitored_msr() still needs a stub to pass compilation when
VM_EVENT=n.

Signed-off-by: Penny Zheng 
Acked-by: Jan Beulich 
Reviewed-by: Jason Andryuk 
---
 xen/arch/x86/hvm/Makefile          |  2 +-
 xen/arch/x86/hvm/svm/svm.c         |  8 +++++++-
 xen/arch/x86/hvm/vmx/vmx.c         | 10 ++++++++++
 xen/arch/x86/include/asm/hvm/hvm.h | 18 +++++++++++-------
 xen/arch/x86/include/asm/monitor.h |  9 +++++++++
 5 files changed, 38 insertions(+), 9 deletions(-)

diff --git a/xen/arch/x86/hvm/Makefile b/xen/arch/x86/hvm/Makefile
index 6ec2c8f2db..50e0b6e63b 100644
--- a/xen/arch/x86/hvm/Makefile
+++ b/xen/arch/x86/hvm/Makefile
@@ -16,7 +16,7 @@ obj-y += io.o
 obj-y += ioreq.o
 obj-y += irq.o
 obj-y += mmio.o
-obj-y += monitor.o
+obj-$(CONFIG_VM_EVENT) += monitor.o
 obj-y += mtrr.o
 obj-y += nestedhvm.o
 obj-y += pmtimer.o
diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c
index e9d39f59a9..ce4fbbe488 100644
--- a/xen/arch/x86/hvm/svm/svm.c
+++ b/xen/arch/x86/hvm/svm/svm.c
@@ -299,6 +299,7 @@ void svm_intercept_msr(struct vcpu *v, uint32_t msr, int flags)
         __clear_bit(msr * 2 + 1, msr_bit);
 }
 
+#ifdef CONFIG_VM_EVENT
 static void cf_check svm_enable_msr_interception(struct domain *d, uint32_t msr)
 {
     struct vcpu *v;
@@ -306,6 +307,7 @@ static void cf_check svm_enable_msr_interception(struct domain *d, uint32_t msr)
     for_each_vcpu ( d, v )
         svm_intercept_msr(v, msr, MSR_INTERCEPT_WRITE);
 }
+#endif /* CONFIG_VM_EVENT */
 
 static void svm_save_dr(struct vcpu *v)
 {
@@ -826,6 +828,7 @@ static void cf_check svm_set_rdtsc_exiting(struct vcpu *v, bool enable)
     vmcb_set_general2_intercepts(vmcb, general2_intercepts);
 }
 
+#ifdef CONFIG_VM_EVENT
 static void cf_check svm_set_descriptor_access_exiting(
     struct vcpu *v, bool enable)
 {
@@ -843,6 +846,7 @@ static void cf_check svm_set_descriptor_access_exiting(
 
     vmcb_set_general1_intercepts(vmcb, general1_intercepts);
 }
+#endif /* CONFIG_VM_EVENT */
 
 static unsigned int cf_check svm_get_insn_bytes(struct vcpu *v, uint8_t *buf)
 {
@@ -2457,9 +2461,11 @@ static struct hvm_function_table __initdata_cf_clobber svm_function_table = {
     .fpu_dirty_intercept  = svm_fpu_dirty_intercept,
     .msr_read_intercept   = svm_msr_read_intercept,
     .msr_write_intercept  = svm_msr_write_intercept,
+#ifdef CONFIG_VM_EVENT
     .enable_msr_interception = svm_enable_msr_interception,
-    .set_rdtsc_exiting    = svm_set_rdtsc_exiting,
     .set_descriptor_access_exiting = svm_set_descriptor_access_exiting,
+#endif
+    .set_rdtsc_exiting    = svm_set_rdtsc_exiting,
     .get_insn_bytes       = svm_get_insn_bytes,
 
     .nhvm_vcpu_initialise = nsvm_vcpu_initialise,
diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c
index 3ca18302e5..75e0ea8d52 100644
--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -1583,6 +1583,7 @@ static void cf_check vmx_set_rdtsc_exiting(struct vcpu *v, bool enable)
     vmx_vmcs_exit(v);
 }
 
+#ifdef CONFIG_VM_EVENT
 static void cf_check vmx_set_descriptor_access_exiting(
     struct vcpu *v, bool enable)
 {
@@ -1597,6 +1598,7 @@ static void cf_check vmx_set_descriptor_access_exiting(
     vmx_update_secondary_exec_control(v);
     vmx_vmcs_exit(v);
 }
+#endif /* CONFIG_VM_EVENT */
 
 static void cf_check vmx_init_hypercall_page(void *p)
 {
@@ -2476,6 +2478,7 @@ static void cf_check vmx_handle_eoi(uint8_t vector, int isr)
         printk_once(XENLOG_WARNING "EOI for %02x but SVI=%02x\n", vector, old_svi);
 }
 
+#ifdef CONFIG_VM_EVENT
 static void cf_check vmx_enable_msr_interception(struct domain *d, uint32_t msr)
 {
     struct vcpu *v;
@@ -2483,6 +2486,7 @@ static void cf_check vmx_enable_msr_interception(struct domain *d, uint32_t msr)
     for_each_vcpu ( d, v )
         vmx_set_msr_intercept(v, msr, VMX_MSR_W);
 }
+#endif /* CONFIG_VM_EVENT */
 
 #ifdef CONFIG_ALTP2M
 
@@ -2934,7 +2938,9 @@ static struct hvm_function_table __initdata_cf_clobber vmx_function_table = {
     .nhvm_domain_relinquish_resources = nvmx_domain_relinquish_resources,
     .update_vlapic_mode = vmx_vlapic_msr_changed,
     .nhvm_hap_walk_L1_p2m = nvmx_hap_walk_L1_p2m,
+#ifdef CONFIG_VM_EVENT
     .enable_msr_interception = vmx_enable_msr_interception,
+#endif
 #ifdef CONFIG_ALTP2M
     .altp2m_vcpu_update_p2m = vmx_vcpu_update_eptp,
     .altp2m_vcpu_update_vmfunc_ve = vmx_vcpu_update_vmfunc_ve,
@@ -3142,9 +3148,11 @@ const struct hvm_function_table * __init start_vmx(void)
 
     vmx_function_table.caps.singlestep = cpu_has_monitor_trap_flag;
 
+#ifdef CONFIG_VM_EVENT
     if ( cpu_has_vmx_dt_exiting )
         vmx_function_table.set_descriptor_access_exiting =
             vmx_set_descriptor_access_exiting;
+#endif
 
     /*
      * Do not enable EPT when (!cpu_has_vmx_pat), to prevent security hole
@@ -3215,8 +3223,10 @@ void __init vmx_fill_funcs(void)
     if ( !cpu_has_xen_ibt )
         return;
 
+#ifdef CONFIG_VM_EVENT
     vmx_function_table.set_descriptor_access_exiting =
         vmx_set_descriptor_access_exiting;
+#endif
 
     vmx_function_table.update_eoi_exit_bitmap = vmx_update_eoi_exit_bitmap;
     vmx_function_table.process_isr            = vmx_process_isr;
diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/hvm/hvm.h
index 56ad63dc57..a513f47b7a 100644
--- a/xen/arch/x86/include/asm/hvm/hvm.h
+++ b/xen/arch/x86/include/asm/hvm/hvm.h
@@ -192,7 +192,11 @@ struct hvm_function_table {
     void (*handle_cd)(struct vcpu *v, unsigned long value);
     void (*set_info_guest)(struct vcpu *v);
     void (*set_rdtsc_exiting)(struct vcpu *v, bool enable);
+
+#ifdef CONFIG_VM_EVENT
     void (*set_descriptor_access_exiting)(struct vcpu *v, bool enable);
+    void (*enable_msr_interception)(struct domain *d, uint32_t msr);
+#endif
 
     /* Nested HVM */
     int (*nhvm_vcpu_initialise)(struct vcpu *v);
@@ -224,8 +228,6 @@ struct hvm_function_table {
                                 paddr_t *L1_gpa, unsigned int *page_order,
                                 uint8_t *p2m_acc, struct npfec npfec);
 
-    void (*enable_msr_interception)(struct domain *d, uint32_t msr);
-
 #ifdef CONFIG_ALTP2M
     /* Alternate p2m */
     void (*altp2m_vcpu_update_p2m)(struct vcpu *v);
@@ -435,11 +437,18 @@ static inline bool using_svm(void)
 
 #define hvm_long_mode_active(v) (!!((v)->arch.hvm.guest_efer & EFER_LMA))
 
+#ifdef CONFIG_VM_EVENT
 static inline bool hvm_has_set_descriptor_access_exiting(void)
 {
     return hvm_funcs.set_descriptor_access_exiting;
 }
 
+static inline void hvm_enable_msr_interception(struct domain *d, uint32_t msr)
+{
+    alternative_vcall(hvm_funcs.enable_msr_interception, d, msr);
+}
+#endif /* CONFIG_VM_EVENT */
+
 static inline void hvm_domain_creation_finished(struct domain *d)
 {
     if ( hvm_funcs.domain_creation_finished )
@@ -681,11 +690,6 @@ static inline int nhvm_hap_walk_L1_p2m(
         v, L2_gpa, L1_gpa, page_order, p2m_acc, npfec);
 }
 
-static inline void hvm_enable_msr_interception(struct domain *d, uint32_t msr)
-{
-    alternative_vcall(hvm_funcs.enable_msr_interception, d, msr);
-}
-
 static inline bool hvm_is_singlestep_supported(void)
 {
     return hvm_funcs.caps.singlestep;
diff --git a/xen/arch/x86/include/asm/monitor.h b/xen/arch/x86/include/asm/monitor.h
index 3c64d8258f..9249324fd0 100644
--- a/xen/arch/x86/include/asm/monitor.h
+++ b/xen/arch/x86/include/asm/monitor.h
@@ -71,6 +71,7 @@ int arch_monitor_domctl_op(struct domain *d, struct xen_domctl_monitor_op *mop)
     return rc;
 }
 
+#ifdef CONFIG_VM_EVENT
 static inline uint32_t arch_monitor_get_capabilities(struct domain *d)
 {
     uint32_t capabilities = 0;
@@ -102,6 +103,7 @@ static inline uint32_t arch_monitor_get_capabilities(struct domain *d)
 
     return capabilities;
 }
+#endif /* CONFIG_VM_EVENT */
 
 int arch_monitor_domctl_event(struct domain *d,
                               struct xen_domctl_monitor_op *mop);
@@ -123,7 +125,14 @@ static inline void arch_monitor_cleanup_domain(struct domain *d) {}
 
 #endif
 
+#ifdef CONFIG_VM_EVENT
 bool monitored_msr(const struct domain *d, u32 msr);
+#else
+static inline bool monitored_msr(const struct domain *d, u32 msr)
+{
+    return false;
+}
+#endif
 bool monitored_msr_onchangeonly(const struct domain *d, u32 msr);
 
 #endif /* __ASM_X86_MONITOR_H__ */
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, Jan Beulich , Andrew Cooper
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Tamas K Lengyel , "Alexandru
 Isaila" , Petre Pircalabu
	
Subject: [PATCH v2 6/7] xen/mem_access: wrap memory access when VM_EVENT=n
Date: Fri, 21 Nov 2025 15:48:02 +0800
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Feature memory access is based on vm event subsystem, and it could be disabled
in the future. So a few switch-blocks in do_altp2m_op() need
vm_event_is_enabled() condition check to pass compilation when ALTP2M=y and
VM_EVENT=n(, hence MEM_ACCESS=n), like HVMOP_altp2m_set_mem_access, etc.
Function p2m_mem_access_check() still needs stub when VM_EVENT=n to
pass compilation.
Although local variable "req_ptr" still remains NULL throughout its lifetime,
with the change of NULL assignment, we will face runtime undefined error only
when CONFIG_USBAN is on. So we strengthen the condition check via adding
vm_event_is_enabled() for the special case.

Signed-off-by: Penny Zheng 
---
v1 -> v2:
- a comment next to the excessive condition
- use vm_event_is_enabled() instead
- avoid heavy churn by using the inverted condition plus break
---
 xen/arch/x86/hvm/hvm.c                | 24 +++++++++++++++++++++++-
 xen/arch/x86/include/asm/mem_access.h | 10 ++++++++++
 2 files changed, 33 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index aa14101241..0103f5c6ba 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -2080,7 +2080,11 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla,
 #endif
     }
 
-    if ( req_ptr )
+    /*
+     * Excessive condition is to avoid runtime undefined error only
+     * when CONFIG_USBAN=y
+     */
+    if ( req_ptr && vm_event_is_enabled(curr) )
     {
         if ( monitor_traps(curr, sync, req_ptr) < 0 )
             rc = 0;
@@ -4802,6 +4806,12 @@ static int do_altp2m_op(
         break;
 
     case HVMOP_altp2m_set_mem_access:
+        if ( !vm_event_is_enabled(current) )
+        {
+            rc = -EOPNOTSUPP;
+            break;
+        }
+
         if ( a.u.mem_access.pad )
             rc = -EINVAL;
         else
@@ -4811,6 +4821,12 @@ static int do_altp2m_op(
         break;
 
     case HVMOP_altp2m_set_mem_access_multi:
+        if ( !vm_event_is_enabled(current) )
+        {
+            rc = -EOPNOTSUPP;
+            break;
+        }
+
         if ( a.u.set_mem_access_multi.pad ||
              a.u.set_mem_access_multi.opaque > a.u.set_mem_access_multi.nr )
         {
@@ -4842,6 +4858,12 @@ static int do_altp2m_op(
         break;
 
     case HVMOP_altp2m_get_mem_access:
+        if ( !vm_event_is_enabled(current) )
+        {
+            rc = -EOPNOTSUPP;
+            break;
+        }
+
         if ( a.u.mem_access.pad )
             rc = -EINVAL;
         else
diff --git a/xen/arch/x86/include/asm/mem_access.h b/xen/arch/x86/include/asm/mem_access.h
index 257ed33de1..790bed81e8 100644
--- a/xen/arch/x86/include/asm/mem_access.h
+++ b/xen/arch/x86/include/asm/mem_access.h
@@ -14,6 +14,7 @@
 #ifndef __ASM_X86_MEM_ACCESS_H__
 #define __ASM_X86_MEM_ACCESS_H__
 
+#ifdef CONFIG_VM_EVENT
 /*
  * Setup vm_event request based on the access (gla is -1ull if not available).
  * Handles the rw2rx conversion. Boolean return value indicates if event type
@@ -25,6 +26,15 @@
 bool p2m_mem_access_check(paddr_t gpa, unsigned long gla,
                           struct npfec npfec,
                           struct vm_event_st **req_ptr);
+#else
+static inline bool p2m_mem_access_check(paddr_t gpa, unsigned long gla,
+                                        struct npfec npfec,
+                                        struct vm_event_st **req_ptr)
+{
+    *req_ptr = NULL;
+    return false;
+}
+#endif /* CONFIG_VM_EVENT */
 
 /* Check for emulation and mark vcpu for skipping one instruction
  * upon rescheduling if required. */
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, Jan Beulich , Andrew Cooper
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Anthony PERARD , "Michal
 Orzel" , Julien Grall , "Stefano
 Stabellini" , Tamas K Lengyel ,
	Alexandru Isaila , Petre Pircalabu
	, Jason Andryuk 
Subject: [PATCH v2 7/7] xen/vm_event: consolidate CONFIG_VM_EVENT
Date: Fri, 21 Nov 2025 15:48:03 +0800
Message-ID: <20251121074803.312568-8-Penny.Zheng@amd.com>
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File hvm/vm_event.c and x86/vm_event.c are the extend to vm_event handling
routines, and its compilation shall be guarded by CONFIG_VM_EVENT too.

Although CONFIG_VM_EVENT is right now forcibly enabled on x86 via
MEM_ACCESS_ALWAYS_ON, we could disable it through disabling
CONFIG_MGMT_HYPERCALLS later. So we remove MEM_ACCESS_ALWAYS_ON and
make VM_EVENT=y on default only on x86 to retain the same.

The following functions are developed on the basis of vm event framework, or
only invoked by vm_event.c, so they all shall be wrapped with CONFIG_VM_EVENT
(otherwise they will become unreachable and
violate Misra rule 2.1 when VM_EVENT=n):
- hvm_toggle_singlestep
- hvm_fast_singlestep
- hvm_emulate_one_vm_event
    - hvmemul_write{,cmpxchg,rep_ins,rep_outs,rep_movs,rep_stos,read_io,write_io}_discard
And Function vm_event_check_ring() needs stub to pass compilation when
VM_EVENT=n.

Signed-off-by: Penny Zheng 
Acked-by: Jan Beulich 
Reviewed-by: Jason Andryuk 
---
As the last commit, plz commited either in the last, or shall be commited
together with prereq commit 6435bdf209, dcef13c65e, 648fdf2bdf, 5ca05aad31,
and 48587d9448
---
 xen/arch/x86/Makefile      |  2 +-
 xen/arch/x86/hvm/Kconfig   |  1 -
 xen/arch/x86/hvm/Makefile  |  2 +-
 xen/arch/x86/hvm/emulate.c | 58 ++++++++++++++++++++------------------
 xen/arch/x86/hvm/hvm.c     |  2 ++
 xen/common/Kconfig         |  7 ++---
 xen/include/xen/vm_event.h |  7 +++++
 7 files changed, 44 insertions(+), 35 deletions(-)

diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
index 407571c510..f71ca9f18b 100644
--- a/xen/arch/x86/Makefile
+++ b/xen/arch/x86/Makefile
@@ -75,7 +75,7 @@ obj-y += usercopy.o
 obj-y += x86_emulate.o
 obj-$(CONFIG_TBOOT) += tboot.o
 obj-y += hpet.o
-obj-y += vm_event.o
+obj-$(CONFIG_VM_EVENT) += vm_event.o
 obj-y += xstate.o
 
 ifneq ($(CONFIG_PV_SHIM_EXCLUSIVE),y)
diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig
index c323d767e7..31859deb97 100644
--- a/xen/arch/x86/hvm/Kconfig
+++ b/xen/arch/x86/hvm/Kconfig
@@ -4,7 +4,6 @@ menuconfig HVM
 	default !PV_SHIM
 	select COMPAT
 	select IOREQ_SERVER
-	select MEM_ACCESS_ALWAYS_ON
 	help
 	  Interfaces to support HVM domains.  HVM domains require hardware
 	  virtualisation extensions (e.g. Intel VT-x, AMD SVM), but can boot
diff --git a/xen/arch/x86/hvm/Makefile b/xen/arch/x86/hvm/Makefile
index 50e0b6e63b..952db00dd7 100644
--- a/xen/arch/x86/hvm/Makefile
+++ b/xen/arch/x86/hvm/Makefile
@@ -26,7 +26,7 @@ obj-y += save.o
 obj-y += stdvga.o
 obj-y += vioapic.o
 obj-y += vlapic.o
-obj-y += vm_event.o
+obj-$(CONFIG_VM_EVENT) += vm_event.o
 obj-y += vmsi.o
 obj-y += vpic.o
 obj-y += vpt.o
diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c
index fe75b0516d..d56ef02baf 100644
--- a/xen/arch/x86/hvm/emulate.c
+++ b/xen/arch/x86/hvm/emulate.c
@@ -1615,6 +1615,7 @@ static int cf_check hvmemul_blk(
     return rc;
 }
 
+#ifdef CONFIG_VM_EVENT
 static int cf_check hvmemul_write_discard(
     enum x86_segment seg,
     unsigned long offset,
@@ -1717,6 +1718,7 @@ static int cf_check hvmemul_cache_op_discard(
 {
     return X86EMUL_OKAY;
 }
+#endif /* CONFIG_VM_EVENT */
 
 static int cf_check hvmemul_cmpxchg(
     enum x86_segment seg,
@@ -2750,33 +2752,6 @@ static const struct x86_emulate_ops hvm_emulate_ops = {
     .vmfunc        = hvmemul_vmfunc,
 };
 
-static const struct x86_emulate_ops hvm_emulate_ops_no_write = {
-    .read          = hvmemul_read,
-    .insn_fetch    = hvmemul_insn_fetch,
-    .write         = hvmemul_write_discard,
-    .cmpxchg       = hvmemul_cmpxchg_discard,
-    .rep_ins       = hvmemul_rep_ins_discard,
-    .rep_outs      = hvmemul_rep_outs_discard,
-    .rep_movs      = hvmemul_rep_movs_discard,
-    .rep_stos      = hvmemul_rep_stos_discard,
-    .read_segment  = hvmemul_read_segment,
-    .write_segment = hvmemul_write_segment,
-    .read_io       = hvmemul_read_io_discard,
-    .write_io      = hvmemul_write_io_discard,
-    .read_cr       = hvmemul_read_cr,
-    .write_cr      = hvmemul_write_cr,
-    .read_xcr      = hvmemul_read_xcr,
-    .write_xcr     = hvmemul_write_xcr,
-    .read_msr      = hvmemul_read_msr,
-    .write_msr     = hvmemul_write_msr_discard,
-    .cache_op      = hvmemul_cache_op_discard,
-    .tlb_op        = hvmemul_tlb_op,
-    .cpuid         = x86emul_cpuid,
-    .get_fpu       = hvmemul_get_fpu,
-    .put_fpu       = hvmemul_put_fpu,
-    .vmfunc        = hvmemul_vmfunc,
-};
-
 /*
  * Note that passing VIO_no_completion into this function serves as kind
  * of (but not fully) an "auto select completion" indicator.  When there's
@@ -2887,6 +2862,34 @@ int hvm_emulate_one(
     return _hvm_emulate_one(hvmemul_ctxt, &hvm_emulate_ops, completion);
 }
 
+#ifdef CONFIG_VM_EVENT
+static const struct x86_emulate_ops hvm_emulate_ops_no_write = {
+    .read          = hvmemul_read,
+    .insn_fetch    = hvmemul_insn_fetch,
+    .write         = hvmemul_write_discard,
+    .cmpxchg       = hvmemul_cmpxchg_discard,
+    .rep_ins       = hvmemul_rep_ins_discard,
+    .rep_outs      = hvmemul_rep_outs_discard,
+    .rep_movs      = hvmemul_rep_movs_discard,
+    .rep_stos      = hvmemul_rep_stos_discard,
+    .read_segment  = hvmemul_read_segment,
+    .write_segment = hvmemul_write_segment,
+    .read_io       = hvmemul_read_io_discard,
+    .write_io      = hvmemul_write_io_discard,
+    .read_cr       = hvmemul_read_cr,
+    .write_cr      = hvmemul_write_cr,
+    .read_xcr      = hvmemul_read_xcr,
+    .write_xcr     = hvmemul_write_xcr,
+    .read_msr      = hvmemul_read_msr,
+    .write_msr     = hvmemul_write_msr_discard,
+    .cache_op      = hvmemul_cache_op_discard,
+    .tlb_op        = hvmemul_tlb_op,
+    .cpuid         = x86emul_cpuid,
+    .get_fpu       = hvmemul_get_fpu,
+    .put_fpu       = hvmemul_put_fpu,
+    .vmfunc        = hvmemul_vmfunc,
+};
+
 void hvm_emulate_one_vm_event(enum emul_kind kind, unsigned int trapnr,
     unsigned int errcode)
 {
@@ -2949,6 +2952,7 @@ void hvm_emulate_one_vm_event(enum emul_kind kind, unsigned int trapnr,
 
     hvm_emulate_writeback(&ctx);
 }
+#endif /* CONFIG_VM_EVENT */
 
 void hvm_emulate_init_once(
     struct hvm_emulate_ctxt *hvmemul_ctxt,
diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 0103f5c6ba..77cf541e26 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -5246,6 +5246,7 @@ int hvm_debug_op(struct vcpu *v, int32_t op)
     return rc;
 }
 
+#ifdef CONFIG_VM_EVENT
 void hvm_toggle_singlestep(struct vcpu *v)
 {
     ASSERT(atomic_read(&v->pause_count));
@@ -5272,6 +5273,7 @@ void hvm_fast_singlestep(struct vcpu *v, uint16_t p2midx)
     v->arch.hvm.fast_single_step.p2midx = p2midx;
 }
 #endif
+#endif /* CONFIG_VM_EVENT */
 
 /*
  * Segment caches in VMCB/VMCS are inconsistent about which bits are checked,
diff --git a/xen/common/Kconfig b/xen/common/Kconfig
index 401d5046f6..218ac3d549 100644
--- a/xen/common/Kconfig
+++ b/xen/common/Kconfig
@@ -173,13 +173,10 @@ config HAS_VMAP
 config LIBFDT
 	bool
 
-config MEM_ACCESS_ALWAYS_ON
-	bool
-
 config VM_EVENT
-	def_bool MEM_ACCESS_ALWAYS_ON
-	prompt "Memory Access and VM events" if !MEM_ACCESS_ALWAYS_ON
+	bool "Memory Access and VM events"
 	depends on HVM
+	default X86
 	help
 
 	  Framework to configure memory access types for guests and receive
diff --git a/xen/include/xen/vm_event.h b/xen/include/xen/vm_event.h
index 27d0c74216..1b76ce632e 100644
--- a/xen/include/xen/vm_event.h
+++ b/xen/include/xen/vm_event.h
@@ -51,7 +51,14 @@ struct vm_event_domain
 };
 
 /* Returns whether a ring has been set up */
+#ifdef CONFIG_VM_EVENT
 bool vm_event_check_ring(struct vm_event_domain *ved);
+#else
+static inline bool vm_event_check_ring(struct vm_event_domain *ved)
+{
+    return false;
+}
+#endif /* CONFIG_VM_EVENT */
 
 /* Returns 0 on success, -ENOSYS if there is no ring, -EBUSY if there is no
  * available space and the caller is a foreign domain. If the guest itself
-- 
2.34.1



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Message-ID: <04570040-beee-4150-907a-20ffacfda689@suse.com>
Date: Fri, 21 Nov 2025 08:52:46 +0100
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Subject: Re: [PATCH v2 2/7] xen/xsm: wrap xsm_vm_event_control() with
 CONFIG_VM_EVENT
To: Penny Zheng 
Cc: ray.huang@amd.com, grygorii_strashko@epam.com,
 "Daniel P. Smith" ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <20251121074803.312568-1-Penny.Zheng@amd.com>
 <20251121074803.312568-3-Penny.Zheng@amd.com>
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From: Jan Beulich 
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In-Reply-To: <20251121074803.312568-3-Penny.Zheng@amd.com>
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On 21.11.2025 08:47, Penny Zheng wrote:
> Function xsm_vm_event_control() is only invoked under CONFIG_VM_EVENT, so
> it shall be wrapped with it, otherwiae it will become unreachable when
> VM_EVENT=n and hence violating Misra rule 2.1.
> 
> Signed-off-by: Penny Zheng 
> Reviewed-by: Stefano Stabellini 
> ---
> v1 -> v2:
> - new commit

In which case - where's the R-b coming from?

Jan


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From: Mykola Kvach 
Date: Fri, 21 Nov 2025 10:10:47 +0200
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Subject: Re: [PATCH v6 01/13] xen/arm: Add suspend and resume timer helpers
To: Julien Grall 
Cc: xen-devel@lists.xenproject.org, 
	Mirela Simonovic , Stefano Stabellini , 
	Bertrand Marquis , Michal Orzel , 
	Volodymyr Babchuk , Saeed Nowshadi , 
	Mykola Kvach 
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Hi Julien,

Thanks for your review and for the time spent on this series.

On Sat, Sep 13, 2025 at 2:04=E2=80=AFAM Julien Grall  wrote=
:
>
> Hi Mykola,
>
> On 01/09/2025 23:10, Mykola Kvach wrote:
> > From: Mirela Simonovic 
> >
> > Timer interrupts must be disabled while the system is suspended to prev=
ent
> > spurious wake-ups.
>
> Yet, you don't seem to disable the virtual interrupt. Can you explain why=
?

Thanks for the question =E2=80=94 looks like I missed calling this out.

The virtual timer is already disabled on vCPU context switch. During the
suspend flow, ctxt_switch_from() calls virt_timer_save(), which clears
CNTV_CTL_EL0.ENABLE and preserves the timer state in
vcpu->arch.virt_timer. Therefore there is no live virtual timer interrupt
source by the time time_suspend() executes.

Also, the context switch happens before the suspend tasklet is invoked,
and time_suspend() is called from that tasklet.

>
> > Suspending the timers involves disabling both the EL1
> > physical timer and the EL2 hypervisor timer.
> I know this is what Arm is naming the timers. But I would rather s/EL1//
> and s/EL2// because the physical timer is also accessible from EL0.

Thanks, makes sense. I'll drop the EL1/EL2 wording and refer to them as
physical timer and hypervisor timer.

>
> Note that Xen doesn't use or expose the physical timer. So it should
> always be disabled at the point "time_suspend()" is called. I am still
> ok to disable it just in case though.

Right, Xen doesn't rely on CNTP, so it should already be disabled by
the time we reach time_suspend().

>
> > Resuming consists of raising
> > the TIMER_SOFTIRQ, which prompts the generic timer code to reprogram th=
e
> > EL2 timer as needed. Re-enabling of the EL1 timer is left to the entity
> > that uses it.
> >
> > Introduce a new helper, disable_physical_timers, to encapsulate disabli=
ng
> > of the physical timers.
> >
> > Signed-off-by: Mirela Simonovic 
> > Signed-off-by: Saeed Nowshadi 
> > Signed-off-by: Mykola Kvach 
> > ---
> > Changes in V4:
> >    - Rephrased comment and commit message for better clarity
> >    - Created separate function for disabling physical timers
> >
> > Changes in V3:
> >    - time_suspend and time_resume are now conditionally compiled
> >      under CONFIG_SYSTEM_SUSPEND
> > ---
> >   xen/arch/arm/include/asm/time.h |  5 +++++
> >   xen/arch/arm/time.c             | 38 +++++++++++++++++++++++++++-----=
-
> >   2 files changed, 37 insertions(+), 6 deletions(-)
> >
> > diff --git a/xen/arch/arm/include/asm/time.h b/xen/arch/arm/include/asm=
/time.h
> > index 49ad8c1a6d..f4fd0c6af5 100644
> > --- a/xen/arch/arm/include/asm/time.h
> > +++ b/xen/arch/arm/include/asm/time.h
> > @@ -108,6 +108,11 @@ void preinit_xen_time(void);
> >
> >   void force_update_vcpu_system_time(struct vcpu *v);
> >
> > +#ifdef CONFIG_SYSTEM_SUSPEND
> > +void time_suspend(void);
> > +void time_resume(void);
> > +#endif /* CONFIG_SYSTEM_SUSPEND */
> > +
> >   #endif /* __ARM_TIME_H__ */
> >   /*
> >    * Local variables:
> > diff --git a/xen/arch/arm/time.c b/xen/arch/arm/time.c
> > index e74d30d258..ad984fdfdd 100644
> > --- a/xen/arch/arm/time.c
> > +++ b/xen/arch/arm/time.c
> > @@ -303,6 +303,14 @@ static void check_timer_irq_cfg(unsigned int irq, =
const char *which)
> >              "WARNING: %s-timer IRQ%u is not level triggered.\n", which=
, irq);
> >   }
> >
> > +/* Disable physical timers for EL1 and EL2 on the current CPU */
>
> The name of the times are "physical timer" and "hypervisor timer".

Ack

>
> > +static inline void disable_physical_timers(void)
>
> "Physical is a bit misleading" in this context. All the 3 timers
> (virtual, physical, hypervisor) are physical timers. My preference would
> be to name this function disable_timers() (assuming you also need to
> disable the virtual timer).

As explained above, CNTV is already disabled before suspend, so the helper
only targets CNTP/CNTHP. Renamed it to disable_phys_hyp_timers() accordingl=
y.

>
> > +{
> > +    WRITE_SYSREG(0, CNTP_CTL_EL0);    /* Physical timer disabled */
> > +    WRITE_SYSREG(0, CNTHP_CTL_EL2);   /* Hypervisor's timer disabled *=
/
> > +    isb();
> > +}
> > +
> >   /* Set up the timer interrupt on this CPU */
> >   void init_timer_interrupt(void)
> >   {
> > @@ -310,9 +318,7 @@ void init_timer_interrupt(void)
> >       WRITE_SYSREG64(0, CNTVOFF_EL2);     /* No VM-specific offset */
> >       /* Do not let the VMs program the physical timer, only read the p=
hysical counter */
> >       WRITE_SYSREG(CNTHCTL_EL2_EL1PCTEN, CNTHCTL_EL2);
> > -    WRITE_SYSREG(0, CNTP_CTL_EL0);    /* Physical timer disabled */
> > -    WRITE_SYSREG(0, CNTHP_CTL_EL2);   /* Hypervisor's timer disabled *=
/
> > -    isb();
> > +    disable_physical_timers();
> >
> >       request_irq(timer_irq[TIMER_HYP_PPI], 0, htimer_interrupt,
> >                   "hyptimer", NULL);
> > @@ -330,9 +336,7 @@ void init_timer_interrupt(void)
> >    */
> >   static void deinit_timer_interrupt(void)
> >   {
> > -    WRITE_SYSREG(0, CNTP_CTL_EL0);    /* Disable physical timer */
> > -    WRITE_SYSREG(0, CNTHP_CTL_EL2);   /* Disable hypervisor's timer */
> > -    isb();
> > +    disable_physical_timers();
> >
> >       release_irq(timer_irq[TIMER_HYP_PPI], NULL);
> >       release_irq(timer_irq[TIMER_VIRT_PPI], NULL);
> > @@ -372,6 +376,28 @@ void domain_set_time_offset(struct domain *d, int6=
4_t time_offset_seconds)
> >       /* XXX update guest visible wallclock time */
> >   }
> >
> > +#ifdef CONFIG_SYSTEM_SUSPEND
> > +
> > +void time_suspend(void)
> > +{
> > +    disable_physical_timers();
> > +}
> > +
> > +void time_resume(void)
> > +{
> > +    /*
> > +     * Raising the timer softirq triggers generic code to call reprogr=
am_timer
> > +     * with the correct timeout (not known here).
> > +     *
> > +     * No further action is needed to restore timekeeping after power =
down,
> > +     * since the system counter is unaffected. See ARM DDI 0487 L.a, D=
12.1.2
> > +     * "The system counter must be implemented in an always-on power d=
omain."
> > +     */
> > +    raise_softirq(TIMER_SOFTIRQ);
>
> I think we should add a comment about the physical timer.

I'll add a comment in time_resume() clarifying that the physical timer rema=
ins
disabled in Xen, while the virtual timer is restored per-vCPU on
context restore.

>
> > +}
> > +
> > +#endif /* CONFIG_SYSTEM_SUSPEND */
> > +
> >   static int cpu_time_callback(struct notifier_block *nfb,
> >                                unsigned long action,
> >                                void *hcpu)Cheers,
>
> --
> Julien Grall
>

Best regards,
Mykola


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Subject: Re: [PATCH 04/12] x86/irq: set accurate cpu_mask for high priority
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On Thu, Nov 20, 2025 at 02:06:39PM +0100, Jan Beulich wrote:
> On 20.11.2025 10:06, Roger Pau Monne wrote:
> > Setting the irq descriptor target CPU mask of high priority interrupts to
> > contain all online CPUs is not accurate.  External interrupts are
> > exclusively delivered using physical destination mode, and hence can only
> > target a single CPU.  Setting the descriptor CPU mask to contain all online
> > CPUs makes it impossible for Xen to figure out which CPU the interrupt is
> > really targeting.
> > 
> > Instead handle high priority vectors used by external interrupts similarly
> > to normal vectors, keeping the target CPU mask accurate.  Introduce
> > specific code in _assign_irq_vector() to deal with moving high priority
> > vectors across CPUs, this is needed at least for fixup_irqs() to be able to
> > evacuate those if the target CPU goes offline.
> > 
> > Fixes: fc0c3fa2ad5c ("x86/IO-APIC: fix setup of Xen internally used IRQs (take 2)")
> > Signed-off-by: Roger Pau Monné 
> 
> Reviewed-by: Jan Beulich 
> with one further request:
> 
> > @@ -756,12 +770,10 @@ void setup_vector_irq(unsigned int cpu)
> >          if ( !irq_desc_initialized(desc) )
> >              continue;
> >          vector = irq_to_vector(irq);
> > -        if ( vector >= FIRST_HIPRIORITY_VECTOR &&
> > -             vector <= LAST_HIPRIORITY_VECTOR )
> > -            cpumask_set_cpu(cpu, desc->arch.cpu_mask);
> > -        else if ( !cpumask_test_cpu(cpu, desc->arch.cpu_mask) )
> > -            continue;
> > -        per_cpu(vector_irq, cpu)[vector] = irq;
> > +        if ( (vector >= FIRST_HIPRIORITY_VECTOR &&
> > +              vector <= LAST_HIPRIORITY_VECTOR) ||
> > +             cpumask_test_cpu(cpu, desc->arch.cpu_mask) )
> > +            per_cpu(vector_irq, cpu)[vector] = irq;
> 
> Going beyond desc->arch.cpu_mask for hiprio vectors may deserve a comment here. When
> the vector is global, this is necessary. But for e.g. the serial IRQ (which still
> moves, but isn't bound to multiple CPUs, the more normal way of respecting
> desc->arch.cpu_mask would be sufficient.

Note that hiprio vectors are handled specially in _assign_irq_vector()
and the logic to set per_cpu(vector_irq, cpu)[vector] is
short-circuited assuming that hiprio vectors are already setup on all
CPUs.

> It is merely (largely) benign if we set
> vector_irq[] also for other CPUs. "Largely" because strictly speaking if that vector
> triggered on the wrong CPU for whatever reason, we rather shouldn't treat it as a
> legitimate interrupt.

I see, yes, we could handle hiprio vectors more like normal ones and
do a bit more work in _assign_irq_vector() to also set the
vector_irq[] array at bind time, but then we would need the cleanup
logic as the interrupt migrates, which is a bit of overhead when we
know the vector won't be re-used for anything else.

What about I add the following comment:

        if ( cpumask_test_cpu(cpu, desc->arch.cpu_mask) ||
             /*
              * High-priority vectors are reserved on all CPUs.  Set
              * the vector to IRQ assignment on all CPUs, even if the
              * interrupt is not targeting this CPU.  That makes
              * shuffling those interrupts around CPUs easier.
              */
             (vector >= FIRST_HIPRIORITY_VECTOR &&
              vector <= LAST_HIPRIORITY_VECTOR) )
            per_cpu(vector_irq, cpu)[vector] = irq;

Thanks, Roger.


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Date: Fri, 21 Nov 2025 09:35:16 +0100
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: Andrew Cooper ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH 06/12] x86/i8259: redo workaround for AMD spurious PIC
 interrupts
Message-ID: 
References: <20251120090637.25087-1-roger.pau@citrix.com>
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On Thu, Nov 20, 2025 at 04:05:38PM +0100, Jan Beulich wrote:
> On 20.11.2025 10:58, Roger Pau Monne wrote:
> > --- a/xen/arch/x86/i8259.c
> > +++ b/xen/arch/x86/i8259.c
> > @@ -407,21 +407,14 @@ void __init init_IRQ(void)
> >          per_cpu(vector_irq, cpu)[LEGACY_VECTOR(irq)] = irq;
> >  
> >          /*
> > -         * The interrupt affinity logic never targets interrupts to offline
> > -         * CPUs, hence it's safe to use cpumask_all here.
> > -         *
> >           * Legacy PIC interrupts are only targeted to CPU0, but depending on
> >           * the platform they can be distributed to any online CPU in hardware.
> > -         * Note this behavior has only been observed on AMD hardware. In order
> > -         * to cope install all active legacy vectors on all CPUs.
> > -         *
> > -         * IO-APIC will change the destination mask if/when taking ownership of
> > -         * the interrupt.
> > +         * Note this behavior has only been observed on AMD hardware. Set the
> > +         * target CPU as expected here, and cope with the possibly spurious
> > +         * interrupts in do_IRQ().  This behavior has only been observed
> > +         * during AP bringup.
> >           */
> > -        cpumask_copy(desc->arch.cpu_mask,
> > -                     (boot_cpu_data.x86_vendor &
> > -                      (X86_VENDOR_AMD | X86_VENDOR_HYGON) ? &cpumask_all
> > -                                                          : cpumask_of(cpu)));
> > +        cpumask_copy(desc->arch.cpu_mask, cpumask_of(cpu));
> >          desc->arch.vector = LEGACY_VECTOR(irq);
> >      }
> 
> Doesn't this collide with what setup_vector_irq() does (see also patch 04)? If
> you don't set all bits here, not all CPUs will have the vector_irq[] slot set
> correctly for do_IRQ() to actually be able to associate the vector with the
> right IRQ.

For the AMD workaround I've only ever saw the spurious vector
triggering on CPUs different than the BSP at bringup, I don't think we
strictly need to bind all legacy vectors on all possible CPUs.  Well
behaved PIC interrupts will only target the BSP, and that's properly
setup.

Thanks, Roger.


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From: "Penny, Zheng" 
To: Jan Beulich 
CC: "Huang, Ray" , "grygorii_strashko@epam.com"
	, "Daniel P. Smith"
	, Stefano Stabellini ,
	"xen-devel@lists.xenproject.org" 
Subject: RE: [PATCH v2 2/7] xen/xsm: wrap xsm_vm_event_control() with
 CONFIG_VM_EVENT
Thread-Topic: [PATCH v2 2/7] xen/xsm: wrap xsm_vm_event_control() with
 CONFIG_VM_EVENT
Thread-Index: AQHcWrs/qm1DByfUmEiEsQ0KFVhiiLT8wi8AgAAOyqA=
Date: Fri, 21 Nov 2025 08:47:26 +0000
Message-ID:
 
References: <20251121074803.312568-1-Penny.Zheng@amd.com>
 <20251121074803.312568-3-Penny.Zheng@amd.com>
 <04570040-beee-4150-907a-20ffacfda689@suse.com>
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From: Penny Zheng 
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 Isaila" , Petre Pircalabu
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	Anthony PERARD , Michal Orzel
	, Julien Grall , Stefano Stabellini
	
Subject: [PATCH v3 0/7] consolidate vm event subsystem
Date: Fri, 21 Nov 2025 17:15:47 +0800
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This patch serie originates from "Disable domctl-op via CONFIG_MGMT_HYPERCALLS"
[1], and focuses on consolidating vm event subsystem (i.e. VM_EVENT), and its
derived features, like memory paging, etc.

[1] https://www.mail-archive.com/xen-devel@lists.xenproject.org/msg200843.html
---
Plz ignore v2 version, as I accidently sent the weong dev version.

Penny Zheng (7):
  xen/x86: move declaration from mem_access.h to altp2m.h
  xen/xsm: wrap xsm_vm_event_control() with CONFIG_VM_EVENT
  x86/vm_event: introduce vm_event_is_enabled()
  x86/monitor: wrap monitor_op under CONFIG_VM_EVENT
  xen/p2m: move xenmem_access_to_p2m_access() to common p2m.c
  xen/mem_access: wrap memory access when VM_EVENT=n
  xen/vm_event: consolidate CONFIG_VM_EVENT

 xen/arch/x86/Makefile                 |  2 +-
 xen/arch/x86/hvm/Kconfig              |  1 -
 xen/arch/x86/hvm/Makefile             |  4 +-
 xen/arch/x86/hvm/emulate.c            | 67 ++++++++++++------------
 xen/arch/x86/hvm/hvm.c                | 50 +++++++++++++++---
 xen/arch/x86/hvm/svm/intr.c           |  2 +-
 xen/arch/x86/hvm/svm/svm.c            | 54 ++++++++++++--------
 xen/arch/x86/hvm/vmx/intr.c           |  2 +-
 xen/arch/x86/hvm/vmx/vmx.c            | 73 ++++++++++++++++++---------
 xen/arch/x86/include/asm/altp2m.h     | 10 ++++
 xen/arch/x86/include/asm/hvm/hvm.h    | 18 ++++---
 xen/arch/x86/include/asm/mem_access.h | 20 ++++----
 xen/arch/x86/include/asm/monitor.h    |  9 ++++
 xen/arch/x86/include/asm/vm_event.h   |  5 ++
 xen/arch/x86/mm/mem_access.c          | 36 -------------
 xen/arch/x86/mm/mem_sharing.c         |  3 ++
 xen/arch/x86/mm/p2m.c                 | 40 +++++++++++++++
 xen/common/Kconfig                    |  7 +--
 xen/include/xen/mem_access.h          |  5 --
 xen/include/xen/p2m-common.h          |  3 ++
 xen/include/xen/vm_event.h            |  7 +++
 xen/include/xsm/dummy.h               |  2 +-
 xen/include/xsm/xsm.h                 |  4 +-
 xen/xsm/dummy.c                       |  2 +-
 xen/xsm/flask/hooks.c                 |  4 +-
 25 files changed, 271 insertions(+), 159 deletions(-)

-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, Jan Beulich , Andrew Cooper
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Tamas K Lengyel , "Alexandru
 Isaila" , Petre Pircalabu
	, Jason Andryuk 
Subject: [PATCH v3 1/7] xen/x86: move declaration from mem_access.h to altp2m.h
Date: Fri, 21 Nov 2025 17:15:48 +0800
Message-ID: <20251121091554.1003315-2-Penny.Zheng@amd.com>
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Memory access and ALTP2M are two seperate features, and each could be
controlled via VM_EVENT or ALTP2M. In order to avoid implicit declaration
when ALTP2M=y and VM_EVENT=n on compiling hvm.o/altp2m.o, we move declaration
of the following functions from  to :
- p2m_set_suppress_ve
- p2m_set_suppress_ve_multi
- p2m_get_suppress_ve
Potential error on altp2m.c also breaks Misra Rule 8.4.

Signed-off-by: Penny Zheng 
Reviewed-by: Jan Beulich 
Reviewed-by: Jason Andryuk 
---
 xen/arch/x86/include/asm/altp2m.h     | 10 ++++++++++
 xen/arch/x86/include/asm/mem_access.h | 10 ----------
 2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/xen/arch/x86/include/asm/altp2m.h b/xen/arch/x86/include/asm/altp2m.h
index 8ecd74f363..9c1ac3cc26 100644
--- a/xen/arch/x86/include/asm/altp2m.h
+++ b/xen/arch/x86/include/asm/altp2m.h
@@ -46,6 +46,16 @@ void altp2m_vcpu_destroy(struct vcpu *v);
 int altp2m_vcpu_enable_ve(struct vcpu *v, gfn_t gfn);
 void altp2m_vcpu_disable_ve(struct vcpu *v);
 
+int p2m_set_suppress_ve(struct domain *d, gfn_t gfn, bool suppress_ve,
+                        unsigned int altp2m_idx);
+
+struct xen_hvm_altp2m_suppress_ve_multi;
+int p2m_set_suppress_ve_multi(struct domain *d,
+                              struct xen_hvm_altp2m_suppress_ve_multi *sve);
+
+int p2m_get_suppress_ve(struct domain *d, gfn_t gfn, bool *suppress_ve,
+                        unsigned int altp2m_idx);
+
 #else
 
 static inline bool altp2m_is_eptp_valid(const struct domain *d,
diff --git a/xen/arch/x86/include/asm/mem_access.h b/xen/arch/x86/include/asm/mem_access.h
index 1a52a10322..257ed33de1 100644
--- a/xen/arch/x86/include/asm/mem_access.h
+++ b/xen/arch/x86/include/asm/mem_access.h
@@ -34,16 +34,6 @@ bool p2m_mem_access_emulate_check(struct vcpu *v,
 /* Sanity check for mem_access hardware support */
 bool p2m_mem_access_sanity_check(const struct domain *d);
 
-int p2m_set_suppress_ve(struct domain *d, gfn_t gfn, bool suppress_ve,
-                        unsigned int altp2m_idx);
-
-struct xen_hvm_altp2m_suppress_ve_multi;
-int p2m_set_suppress_ve_multi(struct domain *d,
-                              struct xen_hvm_altp2m_suppress_ve_multi *sve);
-
-int p2m_get_suppress_ve(struct domain *d, gfn_t gfn, bool *suppress_ve,
-                        unsigned int altp2m_idx);
-
 #endif /*__ASM_X86_MEM_ACCESS_H__ */
 
 /*
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, "Daniel P. Smith" 
Subject: [PATCH v3 2/7] xen/xsm: wrap xsm_vm_event_control() with CONFIG_VM_EVENT
Date: Fri, 21 Nov 2025 17:15:49 +0800
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Function xsm_vm_event_control() is only invoked under CONFIG_VM_EVENT, so
it shall be wrapped with it, otherwiae it will become unreachable when
VM_EVENT=n and hence violating Misra rule 2.1.

Signed-off-by: Penny Zheng 
---
v1 -> v3:
- new commit
---
 xen/include/xsm/dummy.h | 2 +-
 xen/include/xsm/xsm.h   | 4 ++--
 xen/xsm/dummy.c         | 2 +-
 xen/xsm/flask/hooks.c   | 4 ++--
 4 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/xen/include/xsm/dummy.h b/xen/include/xsm/dummy.h
index 12792c3a43..e801dbcdba 100644
--- a/xen/include/xsm/dummy.h
+++ b/xen/include/xsm/dummy.h
@@ -640,6 +640,7 @@ static XSM_INLINE int cf_check xsm_hvm_altp2mhvm_op(
     }
 }
 
+#ifdef CONFIG_VM_EVENT
 static XSM_INLINE int cf_check xsm_vm_event_control(
     XSM_DEFAULT_ARG struct domain *d, int mode, int op)
 {
@@ -647,7 +648,6 @@ static XSM_INLINE int cf_check xsm_vm_event_control(
     return xsm_default_action(action, current->domain, d);
 }
 
-#ifdef CONFIG_VM_EVENT
 static XSM_INLINE int cf_check xsm_mem_access(XSM_DEFAULT_ARG struct domain *d)
 {
     XSM_ASSERT_ACTION(XSM_DM_PRIV);
diff --git a/xen/include/xsm/xsm.h b/xen/include/xsm/xsm.h
index 9a23d2827c..d9e5c831f3 100644
--- a/xen/include/xsm/xsm.h
+++ b/xen/include/xsm/xsm.h
@@ -155,9 +155,9 @@ struct xsm_ops {
     int (*hvm_altp2mhvm_op)(struct domain *d, uint64_t mode, uint32_t op);
     int (*get_vnumainfo)(struct domain *d);
 
+#ifdef CONFIG_VM_EVENT
     int (*vm_event_control)(struct domain *d, int mode, int op);
 
-#ifdef CONFIG_VM_EVENT
     int (*mem_access)(struct domain *d);
 #endif
 
@@ -649,13 +649,13 @@ static inline int xsm_get_vnumainfo(xsm_default_t def, struct domain *d)
     return alternative_call(xsm_ops.get_vnumainfo, d);
 }
 
+#ifdef CONFIG_VM_EVENT
 static inline int xsm_vm_event_control(
     xsm_default_t def, struct domain *d, int mode, int op)
 {
     return alternative_call(xsm_ops.vm_event_control, d, mode, op);
 }
 
-#ifdef CONFIG_VM_EVENT
 static inline int xsm_mem_access(xsm_default_t def, struct domain *d)
 {
     return alternative_call(xsm_ops.mem_access, d);
diff --git a/xen/xsm/dummy.c b/xen/xsm/dummy.c
index 8b7e01b506..96dc82ac2e 100644
--- a/xen/xsm/dummy.c
+++ b/xen/xsm/dummy.c
@@ -115,9 +115,9 @@ static const struct xsm_ops __initconst_cf_clobber dummy_ops = {
     .remove_from_physmap           = xsm_remove_from_physmap,
     .map_gmfn_foreign              = xsm_map_gmfn_foreign,
 
+#ifdef CONFIG_VM_EVENT
     .vm_event_control              = xsm_vm_event_control,
 
-#ifdef CONFIG_VM_EVENT
     .mem_access                    = xsm_mem_access,
 #endif
 
diff --git a/xen/xsm/flask/hooks.c b/xen/xsm/flask/hooks.c
index b0308e1b26..9f3915617c 100644
--- a/xen/xsm/flask/hooks.c
+++ b/xen/xsm/flask/hooks.c
@@ -1365,12 +1365,12 @@ static int cf_check flask_hvm_altp2mhvm_op(struct domain *d, uint64_t mode, uint
     return current_has_perm(d, SECCLASS_HVM, HVM__ALTP2MHVM_OP);
 }
 
+#ifdef CONFIG_VM_EVENT
 static int cf_check flask_vm_event_control(struct domain *d, int mode, int op)
 {
     return current_has_perm(d, SECCLASS_DOMAIN2, DOMAIN2__VM_EVENT);
 }
 
-#ifdef CONFIG_VM_EVENT
 static int cf_check flask_mem_access(struct domain *d)
 {
     return current_has_perm(d, SECCLASS_DOMAIN2, DOMAIN2__MEM_ACCESS);
@@ -1967,9 +1967,9 @@ static const struct xsm_ops __initconst_cf_clobber flask_ops = {
     .do_xsm_op = do_flask_op,
     .get_vnumainfo = flask_get_vnumainfo,
 
+#ifdef CONFIG_VM_EVENT
     .vm_event_control = flask_vm_event_control,
 
-#ifdef CONFIG_VM_EVENT
     .mem_access = flask_mem_access,
 #endif
 
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, Jan Beulich , Andrew Cooper
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Jason Andryuk , "Tamas K
 Lengyel" , Alexandru Isaila ,
	Petre Pircalabu 
Subject: [PATCH v3 4/7] x86/monitor: wrap monitor_op under CONFIG_VM_EVENT
Date: Fri, 21 Nov 2025 17:15:51 +0800
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Feature monitor_op is based on vm event subsystem, so monitor.o shall be
wrapped under CONFIG_VM_EVENT.
The following functions are only invoked by monitor-op, so they all shall be
wrapped with CONFIG_VM_EVENT (otherwise they will become unreachable and
violate Misra rule 2.1 when VM_EVENT=n):
- hvm_enable_msr_interception
  - hvm_function_table.enable_msr_interception
- hvm_has_set_descriptor_access_existing
  - hvm_function_table.set_descriptor_access_existi
- arch_monitor_get_capabilities
Function monitored_msr() still needs a stub to pass compilation when
VM_EVENT=n.

Signed-off-by: Penny Zheng 
Acked-by: Jan Beulich 
Reviewed-by: Jason Andryuk 
---
 xen/arch/x86/hvm/Makefile          |  2 +-
 xen/arch/x86/hvm/svm/svm.c         |  8 +++++++-
 xen/arch/x86/hvm/vmx/vmx.c         | 10 ++++++++++
 xen/arch/x86/include/asm/hvm/hvm.h | 18 +++++++++++-------
 xen/arch/x86/include/asm/monitor.h |  9 +++++++++
 5 files changed, 38 insertions(+), 9 deletions(-)

diff --git a/xen/arch/x86/hvm/Makefile b/xen/arch/x86/hvm/Makefile
index 6ec2c8f2db..50e0b6e63b 100644
--- a/xen/arch/x86/hvm/Makefile
+++ b/xen/arch/x86/hvm/Makefile
@@ -16,7 +16,7 @@ obj-y += io.o
 obj-y += ioreq.o
 obj-y += irq.o
 obj-y += mmio.o
-obj-y += monitor.o
+obj-$(CONFIG_VM_EVENT) += monitor.o
 obj-y += mtrr.o
 obj-y += nestedhvm.o
 obj-y += pmtimer.o
diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c
index e9d39f59a9..ce4fbbe488 100644
--- a/xen/arch/x86/hvm/svm/svm.c
+++ b/xen/arch/x86/hvm/svm/svm.c
@@ -299,6 +299,7 @@ void svm_intercept_msr(struct vcpu *v, uint32_t msr, int flags)
         __clear_bit(msr * 2 + 1, msr_bit);
 }
 
+#ifdef CONFIG_VM_EVENT
 static void cf_check svm_enable_msr_interception(struct domain *d, uint32_t msr)
 {
     struct vcpu *v;
@@ -306,6 +307,7 @@ static void cf_check svm_enable_msr_interception(struct domain *d, uint32_t msr)
     for_each_vcpu ( d, v )
         svm_intercept_msr(v, msr, MSR_INTERCEPT_WRITE);
 }
+#endif /* CONFIG_VM_EVENT */
 
 static void svm_save_dr(struct vcpu *v)
 {
@@ -826,6 +828,7 @@ static void cf_check svm_set_rdtsc_exiting(struct vcpu *v, bool enable)
     vmcb_set_general2_intercepts(vmcb, general2_intercepts);
 }
 
+#ifdef CONFIG_VM_EVENT
 static void cf_check svm_set_descriptor_access_exiting(
     struct vcpu *v, bool enable)
 {
@@ -843,6 +846,7 @@ static void cf_check svm_set_descriptor_access_exiting(
 
     vmcb_set_general1_intercepts(vmcb, general1_intercepts);
 }
+#endif /* CONFIG_VM_EVENT */
 
 static unsigned int cf_check svm_get_insn_bytes(struct vcpu *v, uint8_t *buf)
 {
@@ -2457,9 +2461,11 @@ static struct hvm_function_table __initdata_cf_clobber svm_function_table = {
     .fpu_dirty_intercept  = svm_fpu_dirty_intercept,
     .msr_read_intercept   = svm_msr_read_intercept,
     .msr_write_intercept  = svm_msr_write_intercept,
+#ifdef CONFIG_VM_EVENT
     .enable_msr_interception = svm_enable_msr_interception,
-    .set_rdtsc_exiting    = svm_set_rdtsc_exiting,
     .set_descriptor_access_exiting = svm_set_descriptor_access_exiting,
+#endif
+    .set_rdtsc_exiting    = svm_set_rdtsc_exiting,
     .get_insn_bytes       = svm_get_insn_bytes,
 
     .nhvm_vcpu_initialise = nsvm_vcpu_initialise,
diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c
index 3ca18302e5..75e0ea8d52 100644
--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -1583,6 +1583,7 @@ static void cf_check vmx_set_rdtsc_exiting(struct vcpu *v, bool enable)
     vmx_vmcs_exit(v);
 }
 
+#ifdef CONFIG_VM_EVENT
 static void cf_check vmx_set_descriptor_access_exiting(
     struct vcpu *v, bool enable)
 {
@@ -1597,6 +1598,7 @@ static void cf_check vmx_set_descriptor_access_exiting(
     vmx_update_secondary_exec_control(v);
     vmx_vmcs_exit(v);
 }
+#endif /* CONFIG_VM_EVENT */
 
 static void cf_check vmx_init_hypercall_page(void *p)
 {
@@ -2476,6 +2478,7 @@ static void cf_check vmx_handle_eoi(uint8_t vector, int isr)
         printk_once(XENLOG_WARNING "EOI for %02x but SVI=%02x\n", vector, old_svi);
 }
 
+#ifdef CONFIG_VM_EVENT
 static void cf_check vmx_enable_msr_interception(struct domain *d, uint32_t msr)
 {
     struct vcpu *v;
@@ -2483,6 +2486,7 @@ static void cf_check vmx_enable_msr_interception(struct domain *d, uint32_t msr)
     for_each_vcpu ( d, v )
         vmx_set_msr_intercept(v, msr, VMX_MSR_W);
 }
+#endif /* CONFIG_VM_EVENT */
 
 #ifdef CONFIG_ALTP2M
 
@@ -2934,7 +2938,9 @@ static struct hvm_function_table __initdata_cf_clobber vmx_function_table = {
     .nhvm_domain_relinquish_resources = nvmx_domain_relinquish_resources,
     .update_vlapic_mode = vmx_vlapic_msr_changed,
     .nhvm_hap_walk_L1_p2m = nvmx_hap_walk_L1_p2m,
+#ifdef CONFIG_VM_EVENT
     .enable_msr_interception = vmx_enable_msr_interception,
+#endif
 #ifdef CONFIG_ALTP2M
     .altp2m_vcpu_update_p2m = vmx_vcpu_update_eptp,
     .altp2m_vcpu_update_vmfunc_ve = vmx_vcpu_update_vmfunc_ve,
@@ -3142,9 +3148,11 @@ const struct hvm_function_table * __init start_vmx(void)
 
     vmx_function_table.caps.singlestep = cpu_has_monitor_trap_flag;
 
+#ifdef CONFIG_VM_EVENT
     if ( cpu_has_vmx_dt_exiting )
         vmx_function_table.set_descriptor_access_exiting =
             vmx_set_descriptor_access_exiting;
+#endif
 
     /*
      * Do not enable EPT when (!cpu_has_vmx_pat), to prevent security hole
@@ -3215,8 +3223,10 @@ void __init vmx_fill_funcs(void)
     if ( !cpu_has_xen_ibt )
         return;
 
+#ifdef CONFIG_VM_EVENT
     vmx_function_table.set_descriptor_access_exiting =
         vmx_set_descriptor_access_exiting;
+#endif
 
     vmx_function_table.update_eoi_exit_bitmap = vmx_update_eoi_exit_bitmap;
     vmx_function_table.process_isr            = vmx_process_isr;
diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/hvm/hvm.h
index 56ad63dc57..a513f47b7a 100644
--- a/xen/arch/x86/include/asm/hvm/hvm.h
+++ b/xen/arch/x86/include/asm/hvm/hvm.h
@@ -192,7 +192,11 @@ struct hvm_function_table {
     void (*handle_cd)(struct vcpu *v, unsigned long value);
     void (*set_info_guest)(struct vcpu *v);
     void (*set_rdtsc_exiting)(struct vcpu *v, bool enable);
+
+#ifdef CONFIG_VM_EVENT
     void (*set_descriptor_access_exiting)(struct vcpu *v, bool enable);
+    void (*enable_msr_interception)(struct domain *d, uint32_t msr);
+#endif
 
     /* Nested HVM */
     int (*nhvm_vcpu_initialise)(struct vcpu *v);
@@ -224,8 +228,6 @@ struct hvm_function_table {
                                 paddr_t *L1_gpa, unsigned int *page_order,
                                 uint8_t *p2m_acc, struct npfec npfec);
 
-    void (*enable_msr_interception)(struct domain *d, uint32_t msr);
-
 #ifdef CONFIG_ALTP2M
     /* Alternate p2m */
     void (*altp2m_vcpu_update_p2m)(struct vcpu *v);
@@ -435,11 +437,18 @@ static inline bool using_svm(void)
 
 #define hvm_long_mode_active(v) (!!((v)->arch.hvm.guest_efer & EFER_LMA))
 
+#ifdef CONFIG_VM_EVENT
 static inline bool hvm_has_set_descriptor_access_exiting(void)
 {
     return hvm_funcs.set_descriptor_access_exiting;
 }
 
+static inline void hvm_enable_msr_interception(struct domain *d, uint32_t msr)
+{
+    alternative_vcall(hvm_funcs.enable_msr_interception, d, msr);
+}
+#endif /* CONFIG_VM_EVENT */
+
 static inline void hvm_domain_creation_finished(struct domain *d)
 {
     if ( hvm_funcs.domain_creation_finished )
@@ -681,11 +690,6 @@ static inline int nhvm_hap_walk_L1_p2m(
         v, L2_gpa, L1_gpa, page_order, p2m_acc, npfec);
 }
 
-static inline void hvm_enable_msr_interception(struct domain *d, uint32_t msr)
-{
-    alternative_vcall(hvm_funcs.enable_msr_interception, d, msr);
-}
-
 static inline bool hvm_is_singlestep_supported(void)
 {
     return hvm_funcs.caps.singlestep;
diff --git a/xen/arch/x86/include/asm/monitor.h b/xen/arch/x86/include/asm/monitor.h
index 3c64d8258f..9249324fd0 100644
--- a/xen/arch/x86/include/asm/monitor.h
+++ b/xen/arch/x86/include/asm/monitor.h
@@ -71,6 +71,7 @@ int arch_monitor_domctl_op(struct domain *d, struct xen_domctl_monitor_op *mop)
     return rc;
 }
 
+#ifdef CONFIG_VM_EVENT
 static inline uint32_t arch_monitor_get_capabilities(struct domain *d)
 {
     uint32_t capabilities = 0;
@@ -102,6 +103,7 @@ static inline uint32_t arch_monitor_get_capabilities(struct domain *d)
 
     return capabilities;
 }
+#endif /* CONFIG_VM_EVENT */
 
 int arch_monitor_domctl_event(struct domain *d,
                               struct xen_domctl_monitor_op *mop);
@@ -123,7 +125,14 @@ static inline void arch_monitor_cleanup_domain(struct domain *d) {}
 
 #endif
 
+#ifdef CONFIG_VM_EVENT
 bool monitored_msr(const struct domain *d, u32 msr);
+#else
+static inline bool monitored_msr(const struct domain *d, u32 msr)
+{
+    return false;
+}
+#endif
 bool monitored_msr_onchangeonly(const struct domain *d, u32 msr);
 
 #endif /* __ASM_X86_MONITOR_H__ */
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, Tamas K Lengyel , "Alexandru
 Isaila" , Petre Pircalabu
	, Jan Beulich , Andrew Cooper
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Anthony PERARD , "Michal
 Orzel" , Julien Grall , "Stefano
 Stabellini" 
Subject: [PATCH v3 5/7] xen/p2m: move xenmem_access_to_p2m_access() to common p2m.c
Date: Fri, 21 Nov 2025 17:15:52 +0800
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Memory access and ALTP2M are two seperate features, while both depending on
helper xenmem_access_to_p2m_access(). So it betters lives in common p2m.c,
other than mem_access.c which will be compiled out when VM_EVENT=n && ALTP2M=y.
Guard xenmem_access_to_p2m_access() with VM_EVENT || ALTP2M, otherwise it
will become unreachable when both VM_EVENT=n and ALTP2M=n, and hence
violating Misra rule 2.1
We also need to move declaration from mem_access.h to p2m-common.h
An extra blank line is inserted after each case-block to correct coding
style at the same time.

Signed-off-by: Penny Zheng 
---
v1 -> v3:
- Guard xenmem_access_to_p2m_access() with VM_EVENT || ALTP2M
- Move declaration from mem_access.h to p2m-common.h
- refine commit message
---
 xen/arch/x86/mm/mem_access.c | 36 --------------------------------
 xen/arch/x86/mm/p2m.c        | 40 ++++++++++++++++++++++++++++++++++++
 xen/include/xen/mem_access.h |  5 -----
 xen/include/xen/p2m-common.h |  3 +++
 4 files changed, 43 insertions(+), 41 deletions(-)

diff --git a/xen/arch/x86/mm/mem_access.c b/xen/arch/x86/mm/mem_access.c
index e6b609064c..e55e53f44c 100644
--- a/xen/arch/x86/mm/mem_access.c
+++ b/xen/arch/x86/mm/mem_access.c
@@ -298,42 +298,6 @@ static int set_mem_access(struct domain *d, struct p2m_domain *p2m,
     return rc;
 }
 
-bool xenmem_access_to_p2m_access(const struct p2m_domain *p2m,
-                                 xenmem_access_t xaccess,
-                                 p2m_access_t *paccess)
-{
-    static const p2m_access_t memaccess[] = {
-#define ACCESS(ac) [XENMEM_access_##ac] = p2m_access_##ac
-        ACCESS(n),
-        ACCESS(r),
-        ACCESS(w),
-        ACCESS(rw),
-        ACCESS(x),
-        ACCESS(rx),
-        ACCESS(wx),
-        ACCESS(rwx),
-        ACCESS(rx2rw),
-        ACCESS(n2rwx),
-        ACCESS(r_pw),
-#undef ACCESS
-    };
-
-    switch ( xaccess )
-    {
-    case 0 ... ARRAY_SIZE(memaccess) - 1:
-        xaccess = array_index_nospec(xaccess, ARRAY_SIZE(memaccess));
-        *paccess = memaccess[xaccess];
-        break;
-    case XENMEM_access_default:
-        *paccess = p2m->default_access;
-        break;
-    default:
-        return false;
-    }
-
-    return true;
-}
-
 /*
  * Set access type for a region of gfns.
  * If gfn == INVALID_GFN, sets the default access type.
diff --git a/xen/arch/x86/mm/p2m.c b/xen/arch/x86/mm/p2m.c
index e2a00a0efd..2763f9a6be 100644
--- a/xen/arch/x86/mm/p2m.c
+++ b/xen/arch/x86/mm/p2m.c
@@ -2189,6 +2189,46 @@ void p2m_log_dirty_range(struct domain *d, unsigned long begin_pfn,
     guest_flush_tlb_mask(d, d->dirty_cpumask);
 }
 
+#if defined(CONFIG_VM_EVENT) || defined(CONFIG_ALTP2M)
+bool xenmem_access_to_p2m_access(const struct p2m_domain *p2m,
+                                 xenmem_access_t xaccess,
+                                 p2m_access_t *paccess)
+{
+    static const p2m_access_t memaccess[] = {
+#define ACCESS(ac) [XENMEM_access_##ac] = p2m_access_##ac
+        ACCESS(n),
+        ACCESS(r),
+        ACCESS(w),
+        ACCESS(rw),
+        ACCESS(x),
+        ACCESS(rx),
+        ACCESS(wx),
+        ACCESS(rwx),
+        ACCESS(rx2rw),
+        ACCESS(n2rwx),
+        ACCESS(r_pw),
+#undef ACCESS
+    };
+
+    switch ( xaccess )
+    {
+    case 0 ... ARRAY_SIZE(memaccess) - 1:
+        xaccess = array_index_nospec(xaccess, ARRAY_SIZE(memaccess));
+        *paccess = memaccess[xaccess];
+        break;
+
+    case XENMEM_access_default:
+        *paccess = p2m->default_access;
+        break;
+
+    default:
+        return false;
+    }
+
+    return true;
+}
+#endif /* VM_EVENT || ALTP2M */
+
 /*
  * Local variables:
  * mode: C
diff --git a/xen/include/xen/mem_access.h b/xen/include/xen/mem_access.h
index 4de651038d..8e7d9ea2e3 100644
--- a/xen/include/xen/mem_access.h
+++ b/xen/include/xen/mem_access.h
@@ -73,11 +73,6 @@ typedef enum {
     /* NOTE: Assumed to be only 4 bits right now on x86. */
 } p2m_access_t;
 
-struct p2m_domain;
-bool xenmem_access_to_p2m_access(const struct p2m_domain *p2m,
-                                 xenmem_access_t xaccess,
-                                 p2m_access_t *paccess);
-
 /*
  * Set access type for a region of gfns.
  * If gfn == INVALID_GFN, sets the default access type.
diff --git a/xen/include/xen/p2m-common.h b/xen/include/xen/p2m-common.h
index f0bd9a6b98..bd4169caee 100644
--- a/xen/include/xen/p2m-common.h
+++ b/xen/include/xen/p2m-common.h
@@ -43,5 +43,8 @@ int __must_check check_get_page_from_gfn(struct domain *d, gfn_t gfn,
                                          bool readonly, p2m_type_t *p2mt_p,
                                          struct page_info **page_p);
 
+bool xenmem_access_to_p2m_access(const struct p2m_domain *p2m,
+                                 xenmem_access_t xaccess,
+                                 p2m_access_t *paccess);
 
 #endif /* _XEN_P2M_COMMON_H */
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, Jan Beulich , Andrew Cooper
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Tamas K Lengyel , "Alexandru
 Isaila" , Petre Pircalabu
	
Subject: [PATCH v3 6/7] xen/mem_access: wrap memory access when VM_EVENT=n
Date: Fri, 21 Nov 2025 17:15:53 +0800
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Feature memory access is based on vm event subsystem, and it could be disabled
in the future. So a few switch-blocks in do_altp2m_op() need
vm_event_is_enabled() condition check to pass compilation when ALTP2M=y and
VM_EVENT=n(, hence MEM_ACCESS=n), like HVMOP_altp2m_set_mem_access, etc.
Function p2m_mem_access_check() still needs stub when VM_EVENT=n to
pass compilation.
Although local variable "req_ptr" still remains NULL throughout its lifetime,
with the change of NULL assignment, we will face runtime undefined error only
when CONFIG_USBAN is on. So we strengthen the condition check via adding
vm_event_is_enabled() for the special case.

Signed-off-by: Penny Zheng 
---
v1 -> v3:
- a comment next to the excessive condition
- use vm_event_is_enabled() instead
- avoid heavy churn by using the inverted condition plus break
---
 xen/arch/x86/hvm/hvm.c                | 25 ++++++++++++++++++++++++-
 xen/arch/x86/include/asm/mem_access.h | 10 ++++++++++
 2 files changed, 34 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index aa14101241..8509b53585 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -52,6 +52,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -2080,7 +2081,11 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla,
 #endif
     }
 
-    if ( req_ptr )
+    /*
+     * Excessive condition is to avoid runtime undefined error only
+     * when CONFIG_USBAN=y
+     */
+    if ( req_ptr && vm_event_is_enabled(curr) )
     {
         if ( monitor_traps(curr, sync, req_ptr) < 0 )
             rc = 0;
@@ -4802,6 +4807,12 @@ static int do_altp2m_op(
         break;
 
     case HVMOP_altp2m_set_mem_access:
+        if ( !vm_event_is_enabled(current) )
+        {
+            rc = -EOPNOTSUPP;
+            break;
+        }
+
         if ( a.u.mem_access.pad )
             rc = -EINVAL;
         else
@@ -4811,6 +4822,12 @@ static int do_altp2m_op(
         break;
 
     case HVMOP_altp2m_set_mem_access_multi:
+        if ( !vm_event_is_enabled(current) )
+        {
+            rc = -EOPNOTSUPP;
+            break;
+        }
+
         if ( a.u.set_mem_access_multi.pad ||
              a.u.set_mem_access_multi.opaque > a.u.set_mem_access_multi.nr )
         {
@@ -4842,6 +4859,12 @@ static int do_altp2m_op(
         break;
 
     case HVMOP_altp2m_get_mem_access:
+        if ( !vm_event_is_enabled(current) )
+        {
+            rc = -EOPNOTSUPP;
+            break;
+        }
+
         if ( a.u.mem_access.pad )
             rc = -EINVAL;
         else
diff --git a/xen/arch/x86/include/asm/mem_access.h b/xen/arch/x86/include/asm/mem_access.h
index 257ed33de1..790bed81e8 100644
--- a/xen/arch/x86/include/asm/mem_access.h
+++ b/xen/arch/x86/include/asm/mem_access.h
@@ -14,6 +14,7 @@
 #ifndef __ASM_X86_MEM_ACCESS_H__
 #define __ASM_X86_MEM_ACCESS_H__
 
+#ifdef CONFIG_VM_EVENT
 /*
  * Setup vm_event request based on the access (gla is -1ull if not available).
  * Handles the rw2rx conversion. Boolean return value indicates if event type
@@ -25,6 +26,15 @@
 bool p2m_mem_access_check(paddr_t gpa, unsigned long gla,
                           struct npfec npfec,
                           struct vm_event_st **req_ptr);
+#else
+static inline bool p2m_mem_access_check(paddr_t gpa, unsigned long gla,
+                                        struct npfec npfec,
+                                        struct vm_event_st **req_ptr)
+{
+    *req_ptr = NULL;
+    return false;
+}
+#endif /* CONFIG_VM_EVENT */
 
 /* Check for emulation and mark vcpu for skipping one instruction
  * upon rescheduling if required. */
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, Jan Beulich , Andrew Cooper
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Anthony PERARD , "Michal
 Orzel" , Julien Grall , "Stefano
 Stabellini" , Tamas K Lengyel ,
	Alexandru Isaila , Petre Pircalabu
	, Jason Andryuk 
Subject: [PATCH v3 7/7] xen/vm_event: consolidate CONFIG_VM_EVENT
Date: Fri, 21 Nov 2025 17:15:54 +0800
Message-ID: <20251121091554.1003315-8-Penny.Zheng@amd.com>
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File hvm/vm_event.c and x86/vm_event.c are the extend to vm_event handling
routines, and its compilation shall be guarded by CONFIG_VM_EVENT too.

Although CONFIG_VM_EVENT is right now forcibly enabled on x86 via
MEM_ACCESS_ALWAYS_ON, we could disable it through disabling
CONFIG_MGMT_HYPERCALLS later. So we remove MEM_ACCESS_ALWAYS_ON and
make VM_EVENT=y on default only on x86 to retain the same.

The following functions are developed on the basis of vm event framework, or
only invoked by vm_event.c, so they all shall be wrapped with CONFIG_VM_EVENT
(otherwise they will become unreachable and
violate Misra rule 2.1 when VM_EVENT=n):
- hvm_toggle_singlestep
- hvm_fast_singlestep
- hvm_emulate_one_vm_event
    - hvmemul_write{,cmpxchg,rep_ins,rep_outs,rep_movs,rep_stos,read_io,write_io}_discard
And Function vm_event_check_ring() needs stub to pass compilation when
VM_EVENT=n.

Signed-off-by: Penny Zheng 
Acked-by: Jan Beulich 
Reviewed-by: Jason Andryuk 
---
As the last commit, plz be commited either in the last, or shall be commited
together with prereq commit 55d5245f85, 2edfe59bc1, 316aac242d, 690b46c23d,
and 0bbd6cebfd
---
 xen/arch/x86/Makefile      |  2 +-
 xen/arch/x86/hvm/Kconfig   |  1 -
 xen/arch/x86/hvm/Makefile  |  2 +-
 xen/arch/x86/hvm/emulate.c | 58 ++++++++++++++++++++------------------
 xen/arch/x86/hvm/hvm.c     |  2 ++
 xen/common/Kconfig         |  7 ++---
 xen/include/xen/vm_event.h |  7 +++++
 7 files changed, 44 insertions(+), 35 deletions(-)

diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
index 407571c510..f71ca9f18b 100644
--- a/xen/arch/x86/Makefile
+++ b/xen/arch/x86/Makefile
@@ -75,7 +75,7 @@ obj-y += usercopy.o
 obj-y += x86_emulate.o
 obj-$(CONFIG_TBOOT) += tboot.o
 obj-y += hpet.o
-obj-y += vm_event.o
+obj-$(CONFIG_VM_EVENT) += vm_event.o
 obj-y += xstate.o
 
 ifneq ($(CONFIG_PV_SHIM_EXCLUSIVE),y)
diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig
index c323d767e7..31859deb97 100644
--- a/xen/arch/x86/hvm/Kconfig
+++ b/xen/arch/x86/hvm/Kconfig
@@ -4,7 +4,6 @@ menuconfig HVM
 	default !PV_SHIM
 	select COMPAT
 	select IOREQ_SERVER
-	select MEM_ACCESS_ALWAYS_ON
 	help
 	  Interfaces to support HVM domains.  HVM domains require hardware
 	  virtualisation extensions (e.g. Intel VT-x, AMD SVM), but can boot
diff --git a/xen/arch/x86/hvm/Makefile b/xen/arch/x86/hvm/Makefile
index 50e0b6e63b..952db00dd7 100644
--- a/xen/arch/x86/hvm/Makefile
+++ b/xen/arch/x86/hvm/Makefile
@@ -26,7 +26,7 @@ obj-y += save.o
 obj-y += stdvga.o
 obj-y += vioapic.o
 obj-y += vlapic.o
-obj-y += vm_event.o
+obj-$(CONFIG_VM_EVENT) += vm_event.o
 obj-y += vmsi.o
 obj-y += vpic.o
 obj-y += vpt.o
diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c
index fe75b0516d..d56ef02baf 100644
--- a/xen/arch/x86/hvm/emulate.c
+++ b/xen/arch/x86/hvm/emulate.c
@@ -1615,6 +1615,7 @@ static int cf_check hvmemul_blk(
     return rc;
 }
 
+#ifdef CONFIG_VM_EVENT
 static int cf_check hvmemul_write_discard(
     enum x86_segment seg,
     unsigned long offset,
@@ -1717,6 +1718,7 @@ static int cf_check hvmemul_cache_op_discard(
 {
     return X86EMUL_OKAY;
 }
+#endif /* CONFIG_VM_EVENT */
 
 static int cf_check hvmemul_cmpxchg(
     enum x86_segment seg,
@@ -2750,33 +2752,6 @@ static const struct x86_emulate_ops hvm_emulate_ops = {
     .vmfunc        = hvmemul_vmfunc,
 };
 
-static const struct x86_emulate_ops hvm_emulate_ops_no_write = {
-    .read          = hvmemul_read,
-    .insn_fetch    = hvmemul_insn_fetch,
-    .write         = hvmemul_write_discard,
-    .cmpxchg       = hvmemul_cmpxchg_discard,
-    .rep_ins       = hvmemul_rep_ins_discard,
-    .rep_outs      = hvmemul_rep_outs_discard,
-    .rep_movs      = hvmemul_rep_movs_discard,
-    .rep_stos      = hvmemul_rep_stos_discard,
-    .read_segment  = hvmemul_read_segment,
-    .write_segment = hvmemul_write_segment,
-    .read_io       = hvmemul_read_io_discard,
-    .write_io      = hvmemul_write_io_discard,
-    .read_cr       = hvmemul_read_cr,
-    .write_cr      = hvmemul_write_cr,
-    .read_xcr      = hvmemul_read_xcr,
-    .write_xcr     = hvmemul_write_xcr,
-    .read_msr      = hvmemul_read_msr,
-    .write_msr     = hvmemul_write_msr_discard,
-    .cache_op      = hvmemul_cache_op_discard,
-    .tlb_op        = hvmemul_tlb_op,
-    .cpuid         = x86emul_cpuid,
-    .get_fpu       = hvmemul_get_fpu,
-    .put_fpu       = hvmemul_put_fpu,
-    .vmfunc        = hvmemul_vmfunc,
-};
-
 /*
  * Note that passing VIO_no_completion into this function serves as kind
  * of (but not fully) an "auto select completion" indicator.  When there's
@@ -2887,6 +2862,34 @@ int hvm_emulate_one(
     return _hvm_emulate_one(hvmemul_ctxt, &hvm_emulate_ops, completion);
 }
 
+#ifdef CONFIG_VM_EVENT
+static const struct x86_emulate_ops hvm_emulate_ops_no_write = {
+    .read          = hvmemul_read,
+    .insn_fetch    = hvmemul_insn_fetch,
+    .write         = hvmemul_write_discard,
+    .cmpxchg       = hvmemul_cmpxchg_discard,
+    .rep_ins       = hvmemul_rep_ins_discard,
+    .rep_outs      = hvmemul_rep_outs_discard,
+    .rep_movs      = hvmemul_rep_movs_discard,
+    .rep_stos      = hvmemul_rep_stos_discard,
+    .read_segment  = hvmemul_read_segment,
+    .write_segment = hvmemul_write_segment,
+    .read_io       = hvmemul_read_io_discard,
+    .write_io      = hvmemul_write_io_discard,
+    .read_cr       = hvmemul_read_cr,
+    .write_cr      = hvmemul_write_cr,
+    .read_xcr      = hvmemul_read_xcr,
+    .write_xcr     = hvmemul_write_xcr,
+    .read_msr      = hvmemul_read_msr,
+    .write_msr     = hvmemul_write_msr_discard,
+    .cache_op      = hvmemul_cache_op_discard,
+    .tlb_op        = hvmemul_tlb_op,
+    .cpuid         = x86emul_cpuid,
+    .get_fpu       = hvmemul_get_fpu,
+    .put_fpu       = hvmemul_put_fpu,
+    .vmfunc        = hvmemul_vmfunc,
+};
+
 void hvm_emulate_one_vm_event(enum emul_kind kind, unsigned int trapnr,
     unsigned int errcode)
 {
@@ -2949,6 +2952,7 @@ void hvm_emulate_one_vm_event(enum emul_kind kind, unsigned int trapnr,
 
     hvm_emulate_writeback(&ctx);
 }
+#endif /* CONFIG_VM_EVENT */
 
 void hvm_emulate_init_once(
     struct hvm_emulate_ctxt *hvmemul_ctxt,
diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 8509b53585..d03f563d76 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -5247,6 +5247,7 @@ int hvm_debug_op(struct vcpu *v, int32_t op)
     return rc;
 }
 
+#ifdef CONFIG_VM_EVENT
 void hvm_toggle_singlestep(struct vcpu *v)
 {
     ASSERT(atomic_read(&v->pause_count));
@@ -5273,6 +5274,7 @@ void hvm_fast_singlestep(struct vcpu *v, uint16_t p2midx)
     v->arch.hvm.fast_single_step.p2midx = p2midx;
 }
 #endif
+#endif /* CONFIG_VM_EVENT */
 
 /*
  * Segment caches in VMCB/VMCS are inconsistent about which bits are checked,
diff --git a/xen/common/Kconfig b/xen/common/Kconfig
index 401d5046f6..218ac3d549 100644
--- a/xen/common/Kconfig
+++ b/xen/common/Kconfig
@@ -173,13 +173,10 @@ config HAS_VMAP
 config LIBFDT
 	bool
 
-config MEM_ACCESS_ALWAYS_ON
-	bool
-
 config VM_EVENT
-	def_bool MEM_ACCESS_ALWAYS_ON
-	prompt "Memory Access and VM events" if !MEM_ACCESS_ALWAYS_ON
+	bool "Memory Access and VM events"
 	depends on HVM
+	default X86
 	help
 
 	  Framework to configure memory access types for guests and receive
diff --git a/xen/include/xen/vm_event.h b/xen/include/xen/vm_event.h
index 27d0c74216..1b76ce632e 100644
--- a/xen/include/xen/vm_event.h
+++ b/xen/include/xen/vm_event.h
@@ -51,7 +51,14 @@ struct vm_event_domain
 };
 
 /* Returns whether a ring has been set up */
+#ifdef CONFIG_VM_EVENT
 bool vm_event_check_ring(struct vm_event_domain *ved);
+#else
+static inline bool vm_event_check_ring(struct vm_event_domain *ved)
+{
+    return false;
+}
+#endif /* CONFIG_VM_EVENT */
 
 /* Returns 0 on success, -ENOSYS if there is no ring, -EBUSY if there is no
  * available space and the caller is a foreign domain. If the guest itself
-- 
2.34.1



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Subject: Re: [for 4.22 v5 18/18] xen/riscv: introduce metadata table to store
 P2M type
To: Jan Beulich 
Cc: Alistair Francis ,
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 , Andrew Cooper ,
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On 11/21/25 8:35 AM, Jan Beulich wrote:
> On 20.11.2025 17:52, Oleksii Kurochko wrote:
>> On 11/20/25 4:47 PM, Jan Beulich wrote:
>>> On 20.11.2025 16:38, Oleksii Kurochko wrote:
>>>> On 11/18/25 7:58 AM, Jan Beulich wrote:
>>>>> On 17.11.2025 20:51, Oleksii Kurochko wrote:
>>>>>> On 11/12/25 12:49 PM, Jan Beulich wrote:
>>>>>>> On 20.10.2025 17:58, Oleksii Kurochko wrote:
>>>>>>>> +    if ( *md_pg )
>>>>>>>> +        metadata = __map_domain_page(*md_pg);
>>>>>>>> +
>>>>>>>> +    if ( t < p2m_first_external )
>>>>>>>> +    {
>>>>>>>>              pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK);
>>>>>>>>      -    return rc;
>>>>>>>> +        if ( metadata )
>>>>>>>> +            metadata[ctx->index].pte = p2m_invalid;
>>>>>>> Shouldn't this be accompanied with a BUILD_BUG_ON(p2m_invalid), as otherwise
>>>>>>> p2m_alloc_page()'s clearing of the page won't have the intended effect?
>>>>>> I think that, at least, at the moment we are always explicitly set p2m type and
>>>>>> do not rely on that by default 0==p2m_invalid.
>>>>> You don't, and ...
>>>>>
>>>>>> Just to be safe, I will add after "if ( metadata )" suggested
>>>>>> BUILD_BUG_ON(p2m_invalid):
>>>>>>            if ( metadata )
>>>>>>                metadata[ctx->index].type = p2m_invalid;
>>>>>>                    /*
>>>>>>             * metadata.type is expected to be p2m_invalid (0) after the page is
>>>>>>             * allocated and zero-initialized in p2m_alloc_page().
>>>>>>             */
>>>>>>            BUILD_BUG_ON(p2m_invalid);
>>>>>> ...
>>>>> ... this leaves me with the impression that you didn't read my reply correctly.
>>>>> p2m_alloc_page() clear the page, thus_implicitly_ setting all entries to
>>>>> p2m_invalid. That's where the BUILD_BUG_ON() would want to go (the call site,
>>>>> ftaod).
>>>> I think I still don’t fully understand what the issue would be if|p2m_invalid| were
>>>> ever equal to 1 instead of 0 in the context of a metadata page.
>>>>
>>>> Yes, if|p2m_invalid| were 1, there would be a problem if someone tried to read this
>>>> metadata pagebefore it was assigned any type. They would find a value of 0, which
>>>> corresponds to a valid type rather than to|p2m_invalid|, as one might expect.
>>>> However, I’m not sure I currently see a scenario in which the metadata page would
>>>> be read before being initialized.
>>> Are you sure walks can only happen for GFNs that were set up? What you need to
>>> do walks on is under guest control, after all.
>> If a GFN lies within the range[p2m->lowest_mapped_gfn, p2m->max_mapped_gfn], then
>> |p2m_set_entry()| must already have been called for this GFN.
> No. All you know from the pre-condition is that p2m_set_entry() was called for the
> lowest and highest GFNs in that range.
>
Oh, right. There could still be some GFNs inside the range for which|p2m_set_entry()| has
not yet been called. Then it probably makes sense to add a|BUILD_BUG_ON| here as well, before
"if ( type == p2m_ext_storage )":

     static p2m_type_t p2m_get_type(const pte_t pte, const struct p2m_pte_ctx *ctx)
     {
         p2m_type_t type = MASK_EXTR(pte.pte, P2M_TYPE_PTE_BITS_MASK);
     
         if ( type == p2m_ext_storage )
         {
             const pte_t *md = __map_domain_page(ctx->pt_page->v.md.pg);
     
             type = md[ctx->index].pte;
     
             unmap_domain_page(md);
         }
     
         return type;
     }

I would expect that if|p2m_set_entry()| has not been called for a GFN, then|p2m_get_entry()|
(|p2m_get_type()| will be called somewhere inside|p2m_get_entry()|, for example) should return
the|p2m_invalid| type. I think we want to have the same check (as the one before the call to
|p2m_alloc_page()|), placed before the condition:
   BUILD_BUG_ON(p2m_invalid);

~ Oleksii

>
>> This means that either
>> - a metadata page has been created and its entry filled with the appropriate type, or
>> - no metadata page was needed and the type was stored directly in|pte->pte|
>>
>> For a GFN outside the range(p2m->lowest_mapped_gfn, p2m->max_mapped_gfn),
>> |p2m_get_entry()| will not even attempt a walk because of the boundary checks:
>>       static mfn_t p2m_get_entry(struct p2m_domain *p2m, gfn_t gfn,
>>                                  p2m_type_t *t,
>>                                  unsigned int *page_order)
>>       ...
>>           if ( check_outside_boundary(p2m, gfn, p2m->lowest_mapped_gfn, true,
>>                                       &level) )
>>               goto out;
>>       
>>           if ( check_outside_boundary(p2m, gfn, p2m->max_mapped_gfn, false, &level) )
>>               goto out;
>>
>> If I am misunderstanding something and there are other cases where a walk can occur for
>> GFNs that were never set up, then such GFNs would have neither an allocated metadata
>> page nor a type stored in|pte->pte|, which looks like we are in trouble.
>>
>> ~ Oleksii
>>
--------------8XlkmW7sZwONcM6khLj70fBq
Content-Type: text/html; charset=UTF-8
Content-Transfer-Encoding: 8bit



  
    
  
  
    


    

    
On 11/21/25 8:35 AM, Jan Beulich wrote:

    

    

      
On 20.11.2025 17:52, Oleksii Kurochko wrote:


      

        
On 11/20/25 4:47 PM, Jan Beulich wrote:


        

          
On 20.11.2025 16:38, Oleksii Kurochko wrote:


          

            
On 11/18/25 7:58 AM, Jan Beulich wrote:


            

              
On 17.11.2025 20:51, Oleksii Kurochko wrote:


              

                
On 11/12/25 12:49 PM, Jan Beulich wrote:


                

                  
On 20.10.2025 17:58, Oleksii Kurochko wrote:


                  

                    
+    if ( *md_pg )
+        metadata = __map_domain_page(*md_pg);
+
+    if ( t < p2m_first_external )
+    {
            pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK);
    -    return rc;
+        if ( metadata )
+            metadata[ctx->index].pte = p2m_invalid;


                  

                  
Shouldn't this be accompanied with a BUILD_BUG_ON(p2m_invalid), as otherwise
p2m_alloc_page()'s clearing of the page won't have the intended effect?


                

                
I think that, at least, at the moment we are always explicitly set p2m type and
do not rely on that by default 0==p2m_invalid.


              

              
You don't, and ...



              

                
Just to be safe, I will add after "if ( metadata )" suggested
BUILD_BUG_ON(p2m_invalid):
          if ( metadata )
              metadata[ctx->index].type = p2m_invalid;
                  /*
           * metadata.type is expected to be p2m_invalid (0) after the page is
           * allocated and zero-initialized in p2m_alloc_page().
           */
          BUILD_BUG_ON(p2m_invalid);
...


              

              
... this leaves me with the impression that you didn't read my reply correctly.
p2m_alloc_page() clear the page, thus_implicitly_ setting all entries to
p2m_invalid. That's where the BUILD_BUG_ON() would want to go (the call site,
ftaod).


            

            
I think I still don’t fully understand what the issue would be if|p2m_invalid| were
ever equal to 1 instead of 0 in the context of a metadata page.

Yes, if|p2m_invalid| were 1, there would be a problem if someone tried to read this
metadata pagebefore it was assigned any type. They would find a value of 0, which
corresponds to a valid type rather than to|p2m_invalid|, as one might expect.
However, I’m not sure I currently see a scenario in which the metadata page would
be read before being initialized.


          

          
Are you sure walks can only happen for GFNs that were set up? What you need to
do walks on is under guest control, after all.


        

        
If a GFN lies within the range[p2m->lowest_mapped_gfn, p2m->max_mapped_gfn], then
|p2m_set_entry()| must already have been called for this GFN.


      

      
No. All you know from the pre-condition is that p2m_set_entry() was called for the
lowest and highest GFNs in that range.



    

    
Oh, right. There could still be some GFNs inside the range for which p2m_set_entry() has
not yet been called. Then it probably makes sense to add a BUILD_BUG_ON here as well, before
"if ( type == p2m_ext_storage )":

    static p2m_type_t p2m_get_type(const pte_t pte, const struct p2m_pte_ctx *ctx)
    {
        p2m_type_t type = MASK_EXTR(pte.pte, P2M_TYPE_PTE_BITS_MASK);
    
        if ( type == p2m_ext_storage )
        {
            const pte_t *md = __map_domain_page(ctx->pt_page->v.md.pg);
    
            type = md[ctx->index].pte;
    
            unmap_domain_page(md);
        }
    
        return type;
    }

I would expect that if p2m_set_entry() has not been called for a GFN, then p2m_get_entry()
(p2m_get_type() will be called somewhere inside p2m_get_entry(), for example) should return
the p2m_invalid type. I think we want to have the same check (as the one before the call to
p2m_alloc_page()), placed before the condition:
  BUILD_BUG_ON(p2m_invalid);

~ Oleksii

    

      



      

        
This means that either
- a metadata page has been created and its entry filled with the appropriate type, or
- no metadata page was needed and the type was stored directly in|pte->pte|

For a GFN outside the range(p2m->lowest_mapped_gfn, p2m->max_mapped_gfn),
|p2m_get_entry()| will not even attempt a walk because of the boundary checks:
     static mfn_t p2m_get_entry(struct p2m_domain *p2m, gfn_t gfn,
                                p2m_type_t *t,
                                unsigned int *page_order)
     ...
         if ( check_outside_boundary(p2m, gfn, p2m->lowest_mapped_gfn, true,
                                     &level) )
             goto out;
     
         if ( check_outside_boundary(p2m, gfn, p2m->max_mapped_gfn, false, &level) )
             goto out;

If I am misunderstanding something and there are other cases where a walk can occur for
GFNs that were never set up, then such GFNs would have neither an allocated metadata
page nor a type stored in|pte->pte|, which looks like we are in trouble.

~ Oleksii



      

      

    

  


--------------8XlkmW7sZwONcM6khLj70fBq--


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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, Andrew Cooper , "Anthony
 PERARD" , Michal Orzel ,
	"Jan Beulich" , Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Stefano
 Stabellini" 
Subject: [PATCH v4 04/24] xen/domctl: make MGMT_HYPERCALLS transiently def_bool
Date: Fri, 21 Nov 2025 18:57:41 +0800
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In order to asist in reviewing/developing disabling domctl-op patch serie,
we will transiently make MGMT_HYPERCALLS def_bool. And it will become
optional at the last of domctl-op patch serie, where common/domctl.o's
building as a whole becomes dependent upon that setting.

Signed-off-by: Penny Zheng 
---
v2 -> v3:
- new commit
---
 xen/common/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/common/Kconfig b/xen/common/Kconfig
index 6709c3c95c..aef29e0174 100644
--- a/xen/common/Kconfig
+++ b/xen/common/Kconfig
@@ -654,7 +654,7 @@ menu "Supported hypercall interfaces"
 config MGMT_HYPERCALLS
 	bool "Enable privileged hypercalls for system management"
 	depends on !PV_SHIM_EXCLUSIVE
-	default y
+	def_bool y
 	help
 	  This option shall only be disabled on some dom0less systems, or
 	  PV shim on x86, to reduce Xen footprint via managing unnessary
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, Andrew Cooper , "Anthony
 PERARD" , Michal Orzel ,
	"Jan Beulich" , Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Stefano
 Stabellini" 
Subject: [PATCH v4 05/24] xen/vm_event: make VM_EVENT depend on CONFIG_MGMT_HYPERCALLS
Date: Fri, 21 Nov 2025 18:57:42 +0800
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VM event could only be enabled/disabled via vm_event domctl-op, so
CONFIG_VM_EVENT shall depend on CONFIG_MGMT_HYPERCALLS

Signed-off-by: Penny Zheng 
Acked-by: Jan Beulich 
---
v1 -> v2:
- adapt to changes of "unify DOMCTL to MGMT_HYPERCALLS"
---
 xen/common/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/common/Kconfig b/xen/common/Kconfig
index aef29e0174..973b8e26bd 100644
--- a/xen/common/Kconfig
+++ b/xen/common/Kconfig
@@ -175,7 +175,7 @@ config LIBFDT
 
 config VM_EVENT
 	bool "Memory Access and VM events"
-	depends on HVM
+	depends on HVM && MGMT_HYPERCALLS
 	default X86
 	help
 
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, Jan Beulich , Andrew Cooper
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Anthony PERARD , "Juergen
 Gross" 
Subject: [PATCH v4 02/24] xen: consolidate cpuid library
Date: Fri, 21 Nov 2025 18:57:39 +0800
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There are some cpuid library functions only referenced in
XEN_DOMCTL_get{,set}_cpu_policy-case, and shall be wrapped with
CONFIG_MGMT_HYPERCALLS later, otherwise they will become unreachable when
MGMT_HYPERCALLS=n, and hence violate Misra 2.1
- x86_cpu_policy_clear_out_of_range_leaves
  - zero_leaves
- x86_cpuid_copy_to_buffer
  - copy_leaf_to_buffer
- x86_cpuid_copy_from_buffer
We seperate these functions by moving other functions to a new file named
cpuid-generic.c, and modify related Makefile-s to retain same behavior.

Signed-off-by: Penny Zheng 
---
v3 -> v4:
- new commit
---
 tools/fuzz/cpu-policy/Makefile               |   2 +-
 tools/fuzz/x86_instruction_emulator/Makefile |  10 +-
 tools/libs/guest/Makefile.common             |   2 +-
 tools/tests/cpu-policy/Makefile              |   2 +-
 tools/tests/x86_emulator/Makefile            |   2 +-
 xen/lib/x86/Makefile                         |   1 +
 xen/lib/x86/cpuid-generic.c                  | 273 +++++++++++++++++++
 xen/lib/x86/cpuid.c                          | 260 ------------------
 8 files changed, 283 insertions(+), 269 deletions(-)
 create mode 100644 xen/lib/x86/cpuid-generic.c

diff --git a/tools/fuzz/cpu-policy/Makefile b/tools/fuzz/cpu-policy/Makefile
index 6e7743e0aa..9d4627887b 100644
--- a/tools/fuzz/cpu-policy/Makefile
+++ b/tools/fuzz/cpu-policy/Makefile
@@ -22,7 +22,7 @@ CFLAGS += $(APPEND_CFLAGS) -Og
 
 vpath %.c ../../../xen/lib/x86
 
-afl-policy-fuzzer: afl-policy-fuzzer.o msr.o cpuid.o
+afl-policy-fuzzer: afl-policy-fuzzer.o msr.o cpuid.o cpuid-generic.o
 	$(CC) $(CFLAGS) $^ -o $@
 
 -include $(DEPS_INCLUDE)
diff --git a/tools/fuzz/x86_instruction_emulator/Makefile b/tools/fuzz/x86_instruction_emulator/Makefile
index 459743f4d9..6e2363a06b 100644
--- a/tools/fuzz/x86_instruction_emulator/Makefile
+++ b/tools/fuzz/x86_instruction_emulator/Makefile
@@ -25,7 +25,7 @@ x86_emulate/%.h: x86_emulate ;
 	ln -nsf $< $@
 
 CFLAGS += $(CFLAGS_xeninclude) -D__XEN_TOOLS__ -iquote .
-cpuid.o: CFLAGS += -iquote $(XEN_ROOT)/xen/lib/x86
+cpuid.o cpuid-generic.o: CFLAGS += -iquote $(XEN_ROOT)/xen/lib/x86
 
 GCOV_FLAGS := --coverage
 %-cov.o: %.c
@@ -49,16 +49,16 @@ $(filter x86_emulate/%.o,$(OBJS)): x86_emulate/%.o: x86_emulate/%.c $(private.h)
 $(patsubst %.o,%-cov.o,$(filter x86_emulate/%.o,$(OBJS))): x86_emulate/%-cov.o: x86_emulate/%.c $(private.h)
 	$(CC) $(CPPFLAGS) $(CFLAGS) $(CFLAGS_$*.o) $(GCOV_FLAGS) -c -o $@ $< $(APPEND_CFLAGS)
 
-x86-insn-fuzzer.a: $(OBJS) cpuid.o
+x86-insn-fuzzer.a: $(OBJS) cpuid.o cpuid-generic.o
 	$(AR) rc $@ $^
 
-afl-harness: afl-harness.o $(OBJS) cpuid.o wrappers.o
+afl-harness: afl-harness.o $(OBJS) cpuid.o cpuid-generic.o wrappers.o
 	$(CC) $(CFLAGS) $(addprefix -Wl$(comma)--wrap=,$(WRAPPED)) $^ -o $@
 
-afl-harness-cov: afl-harness-cov.o $(patsubst %.o,%-cov.o,$(OBJS)) cpuid.o wrappers.o
+afl-harness-cov: afl-harness-cov.o $(patsubst %.o,%-cov.o,$(OBJS)) cpuid.o cpuid-generic.o wrappers.o
 	$(CC) $(CFLAGS) $(GCOV_FLAGS) $(addprefix -Wl$(comma)--wrap=,$(WRAPPED)) $^ -o $@
 
-libfuzzer-harness: $(OBJS) cpuid.o wrappers.o
+libfuzzer-harness: $(OBJS) cpuid.o cpuid-generic.o wrappers.o
 	$(CC) $(CFLAGS) $(LIB_FUZZING_ENGINE) -fsanitize=fuzzer $(addprefix -Wl$(comma)--wrap=,$(WRAPPED)) $^ -o $@
 
 # Common targets
diff --git a/tools/libs/guest/Makefile.common b/tools/libs/guest/Makefile.common
index a026a2f662..da3c21e67e 100644
--- a/tools/libs/guest/Makefile.common
+++ b/tools/libs/guest/Makefile.common
@@ -35,7 +35,7 @@ OBJS-y += $(LIBELF_OBJS)
 ifeq ($(CONFIG_X86),y) # Add libx86 to the build
 vpath %.c ../../../xen/lib/x86
 
-OBJS-y                 += cpuid.o msr.o policy.o
+OBJS-y                 += cpuid.o cpuid-generic.o msr.o policy.o
 endif
 
 # new domain builder
diff --git a/tools/tests/cpu-policy/Makefile b/tools/tests/cpu-policy/Makefile
index 24f87e2eca..2f946b8a5e 100644
--- a/tools/tests/cpu-policy/Makefile
+++ b/tools/tests/cpu-policy/Makefile
@@ -46,7 +46,7 @@ vpath %.c ../../../xen/lib/x86
 
 %.o: Makefile
 
-test-cpu-policy: test-cpu-policy.o msr.o cpuid.o policy.o
+test-cpu-policy: test-cpu-policy.o msr.o cpuid.o cpuid-generic.o policy.o
 	$(CC) $^ -o $@ $(LDFLAGS)
 
 -include $(DEPS_INCLUDE)
diff --git a/tools/tests/x86_emulator/Makefile b/tools/tests/x86_emulator/Makefile
index fefa29a06c..eb79abd5b4 100644
--- a/tools/tests/x86_emulator/Makefile
+++ b/tools/tests/x86_emulator/Makefile
@@ -248,7 +248,7 @@ xop.h avx512f.h avx512fp16.h: simd-fma.c
 
 endif # 32-bit override
 
-OBJS := x86-emulate.o cpuid.o test_x86_emulator.o evex-disp8.o predicates.o wrappers.o
+OBJS := x86-emulate.o cpuid.o cpuid-generic.o test_x86_emulator.o evex-disp8.o predicates.o wrappers.o
 OBJS += x86_emulate/0f01.o x86_emulate/0fae.o x86_emulate/0fc7.o
 OBJS += x86_emulate/blk.o x86_emulate/decode.o x86_emulate/fpu.o x86_emulate/util.o
 
diff --git a/xen/lib/x86/Makefile b/xen/lib/x86/Makefile
index 780ea05db1..ac6d4369f3 100644
--- a/xen/lib/x86/Makefile
+++ b/xen/lib/x86/Makefile
@@ -1,3 +1,4 @@
 obj-y += cpuid.o
+obj-y += cpuid-generic.o
 obj-y += msr.o
 obj-y += policy.o
diff --git a/xen/lib/x86/cpuid-generic.c b/xen/lib/x86/cpuid-generic.c
new file mode 100644
index 0000000000..465bdee35a
--- /dev/null
+++ b/xen/lib/x86/cpuid-generic.c
@@ -0,0 +1,273 @@
+#include "private.h"
+
+#include 
+
+unsigned int x86_cpuid_lookup_vendor(uint32_t ebx, uint32_t ecx, uint32_t edx)
+{
+    switch ( ebx )
+    {
+    case X86_VENDOR_INTEL_EBX:
+        if ( ecx == X86_VENDOR_INTEL_ECX &&
+             edx == X86_VENDOR_INTEL_EDX )
+            return X86_VENDOR_INTEL;
+        break;
+
+    case X86_VENDOR_AMD_EBX:
+        if ( ecx == X86_VENDOR_AMD_ECX &&
+             edx == X86_VENDOR_AMD_EDX )
+            return X86_VENDOR_AMD;
+        break;
+
+    case X86_VENDOR_CENTAUR_EBX:
+        if ( ecx == X86_VENDOR_CENTAUR_ECX &&
+             edx == X86_VENDOR_CENTAUR_EDX )
+            return X86_VENDOR_CENTAUR;
+        break;
+
+    case X86_VENDOR_SHANGHAI_EBX:
+        if ( ecx == X86_VENDOR_SHANGHAI_ECX &&
+             edx == X86_VENDOR_SHANGHAI_EDX )
+            return X86_VENDOR_SHANGHAI;
+        break;
+
+    case X86_VENDOR_HYGON_EBX:
+        if ( ecx == X86_VENDOR_HYGON_ECX &&
+             edx == X86_VENDOR_HYGON_EDX )
+            return X86_VENDOR_HYGON;
+        break;
+    }
+
+    return X86_VENDOR_UNKNOWN;
+}
+
+const char *x86_cpuid_vendor_to_str(unsigned int vendor)
+{
+    switch ( vendor )
+    {
+    case X86_VENDOR_INTEL:    return "Intel";
+    case X86_VENDOR_AMD:      return "AMD";
+    case X86_VENDOR_CENTAUR:  return "Centaur";
+    case X86_VENDOR_SHANGHAI: return "Shanghai";
+    case X86_VENDOR_HYGON:    return "Hygon";
+    default:                  return "Unknown";
+    }
+}
+
+void x86_cpu_policy_to_featureset(
+    const struct cpu_policy *p, uint32_t fs[FEATURESET_NR_ENTRIES])
+{
+    fs[FEATURESET_1d]        = p->basic._1d;
+    fs[FEATURESET_1c]        = p->basic._1c;
+    fs[FEATURESET_e1d]       = p->extd.e1d;
+    fs[FEATURESET_e1c]       = p->extd.e1c;
+    fs[FEATURESET_Da1]       = p->xstate.Da1;
+    fs[FEATURESET_7b0]       = p->feat._7b0;
+    fs[FEATURESET_7c0]       = p->feat._7c0;
+    fs[FEATURESET_e7d]       = p->extd.e7d;
+    fs[FEATURESET_e8b]       = p->extd.e8b;
+    fs[FEATURESET_7d0]       = p->feat._7d0;
+    fs[FEATURESET_7a1]       = p->feat._7a1;
+    fs[FEATURESET_e21a]      = p->extd.e21a;
+    fs[FEATURESET_7b1]       = p->feat._7b1;
+    fs[FEATURESET_7d2]       = p->feat._7d2;
+    fs[FEATURESET_7c1]       = p->feat._7c1;
+    fs[FEATURESET_7d1]       = p->feat._7d1;
+    fs[FEATURESET_m10Al]     = p->arch_caps.lo;
+    fs[FEATURESET_m10Ah]     = p->arch_caps.hi;
+    fs[FEATURESET_e21c]      = p->extd.e21c;
+}
+
+void x86_cpu_featureset_to_policy(
+    const uint32_t fs[FEATURESET_NR_ENTRIES], struct cpu_policy *p)
+{
+    p->basic._1d             = fs[FEATURESET_1d];
+    p->basic._1c             = fs[FEATURESET_1c];
+    p->extd.e1d              = fs[FEATURESET_e1d];
+    p->extd.e1c              = fs[FEATURESET_e1c];
+    p->xstate.Da1            = fs[FEATURESET_Da1];
+    p->feat._7b0             = fs[FEATURESET_7b0];
+    p->feat._7c0             = fs[FEATURESET_7c0];
+    p->extd.e7d              = fs[FEATURESET_e7d];
+    p->extd.e8b              = fs[FEATURESET_e8b];
+    p->feat._7d0             = fs[FEATURESET_7d0];
+    p->feat._7a1             = fs[FEATURESET_7a1];
+    p->extd.e21a             = fs[FEATURESET_e21a];
+    p->feat._7b1             = fs[FEATURESET_7b1];
+    p->feat._7d2             = fs[FEATURESET_7d2];
+    p->feat._7c1             = fs[FEATURESET_7c1];
+    p->feat._7d1             = fs[FEATURESET_7d1];
+    p->arch_caps.lo          = fs[FEATURESET_m10Al];
+    p->arch_caps.hi          = fs[FEATURESET_m10Ah];
+    p->extd.e21c             = fs[FEATURESET_e21c];
+}
+
+void x86_cpu_policy_recalc_synth(struct cpu_policy *p)
+{
+    p->x86_vendor = x86_cpuid_lookup_vendor(
+        p->basic.vendor_ebx, p->basic.vendor_ecx, p->basic.vendor_edx);
+}
+
+void x86_cpu_policy_fill_native(struct cpu_policy *p)
+{
+    unsigned int i;
+
+    cpuid_leaf(0, &p->basic.raw[0]);
+    for ( i = 1; i <= MIN(p->basic.max_leaf,
+                          ARRAY_SIZE(p->basic.raw) - 1); ++i )
+    {
+        switch ( i )
+        {
+        case 0x4: case 0x7: case 0xb: case 0xd:
+            /* Multi-invocation leaves.  Deferred. */
+            continue;
+        }
+
+        cpuid_leaf(i, &p->basic.raw[i]);
+    }
+
+    if ( p->basic.max_leaf >= 4 )
+    {
+        for ( i = 0; i < ARRAY_SIZE(p->cache.raw); ++i )
+        {
+            union {
+                struct cpuid_leaf l;
+                struct cpuid_cache_leaf c;
+            } u;
+
+            cpuid_count_leaf(4, i, &u.l);
+
+            if ( u.c.type == 0 )
+                break;
+
+            p->cache.subleaf[i] = u.c;
+        }
+
+        /*
+         * The choice of CPUID_GUEST_NR_CACHE is arbitrary.  It is expected
+         * that it will eventually need increasing for future hardware.
+         */
+#ifdef __XEN__
+        if ( i == ARRAY_SIZE(p->cache.raw) )
+            printk(XENLOG_WARNING
+                   "CPUID: Insufficient Leaf 4 space for this hardware\n");
+#endif
+    }
+
+    if ( p->basic.max_leaf >= 7 )
+    {
+        cpuid_count_leaf(7, 0, &p->feat.raw[0]);
+
+        for ( i = 1; i <= MIN(p->feat.max_subleaf,
+                              ARRAY_SIZE(p->feat.raw) - 1); ++i )
+            cpuid_count_leaf(7, i, &p->feat.raw[i]);
+    }
+
+    if ( p->basic.max_leaf >= 0xb )
+    {
+        union {
+            struct cpuid_leaf l;
+            struct cpuid_topo_leaf t;
+        } u;
+
+        for ( i = 0; i < ARRAY_SIZE(p->topo.raw); ++i )
+        {
+            cpuid_count_leaf(0xb, i, &u.l);
+
+            if ( u.t.type == 0 )
+                break;
+
+            p->topo.subleaf[i] = u.t;
+        }
+
+        /*
+         * The choice of CPUID_GUEST_NR_TOPO is per the manual.  It may need
+         * to grow for future hardware.
+         */
+#ifdef __XEN__
+        if ( i == ARRAY_SIZE(p->topo.raw) &&
+             (cpuid_count_leaf(0xb, i, &u.l), u.t.type != 0) )
+            printk(XENLOG_WARNING
+                   "CPUID: Insufficient Leaf 0xb space for this hardware\n");
+#endif
+    }
+
+    if ( p->basic.max_leaf >= 0xd )
+    {
+        uint64_t xstates;
+
+        cpuid_count_leaf(0xd, 0, &p->xstate.raw[0]);
+        cpuid_count_leaf(0xd, 1, &p->xstate.raw[1]);
+
+        xstates = cpu_policy_xstates(p);
+
+        /* This logic will probably need adjusting when XCR0[63] gets used. */
+        BUILD_BUG_ON(ARRAY_SIZE(p->xstate.raw) > 63);
+
+        for ( i = 2; i < min_t(unsigned int, 63,
+                               ARRAY_SIZE(p->xstate.raw)); ++i )
+        {
+            if ( xstates & (1ULL << i) )
+                cpuid_count_leaf(0xd, i, &p->xstate.raw[i]);
+        }
+    }
+
+    /* Extended leaves. */
+    cpuid_leaf(0x80000000U, &p->extd.raw[0]);
+    for ( i = 1; i <= MIN(p->extd.max_leaf & 0xffffU,
+                          ARRAY_SIZE(p->extd.raw) - 1); ++i )
+        cpuid_leaf(0x80000000U + i, &p->extd.raw[i]);
+
+    /* Don't report leaves from possible lower level hypervisor, for now. */
+    p->hv_limit = 0;
+    p->hv2_limit = 0;
+
+#ifdef __XEN__
+    /* TODO MSR_PLATFORM_INFO */
+
+    if ( p->feat.arch_caps )
+        rdmsrl(MSR_ARCH_CAPABILITIES, p->arch_caps.raw);
+#endif
+
+    x86_cpu_policy_recalc_synth(p);
+}
+
+const uint32_t *x86_cpu_policy_lookup_deep_deps(uint32_t feature)
+{
+    static const uint32_t deep_features[] = INIT_DEEP_FEATURES;
+    static const struct {
+        uint32_t feature;
+        uint32_t fs[FEATURESET_NR_ENTRIES];
+    } deep_deps[] = INIT_DEEP_DEPS;
+    unsigned int start = 0, end = ARRAY_SIZE(deep_deps);
+
+    BUILD_BUG_ON(ARRAY_SIZE(deep_deps) != NR_DEEP_DEPS);
+
+    /* Fast early exit. */
+    if ( !test_bit(feature, deep_features) )
+        return NULL;
+
+    /* deep_deps[] is sorted.  Perform a binary search. */
+    while ( start < end )
+    {
+        unsigned int mid = start + ((end - start) / 2);
+
+        if ( deep_deps[mid].feature > feature )
+            end = mid;
+        else if ( deep_deps[mid].feature < feature )
+            start = mid + 1;
+        else
+            return deep_deps[mid].fs;
+    }
+
+    return NULL;
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * tab-width: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/lib/x86/cpuid.c b/xen/lib/x86/cpuid.c
index 6298d051f2..5de1e2ca74 100644
--- a/xen/lib/x86/cpuid.c
+++ b/xen/lib/x86/cpuid.c
@@ -9,235 +9,6 @@ static void zero_leaves(struct cpuid_leaf *l,
         memset(&l[first], 0, sizeof(*l) * (last - first + 1));
 }
 
-unsigned int x86_cpuid_lookup_vendor(uint32_t ebx, uint32_t ecx, uint32_t edx)
-{
-    switch ( ebx )
-    {
-    case X86_VENDOR_INTEL_EBX:
-        if ( ecx == X86_VENDOR_INTEL_ECX &&
-             edx == X86_VENDOR_INTEL_EDX )
-            return X86_VENDOR_INTEL;
-        break;
-
-    case X86_VENDOR_AMD_EBX:
-        if ( ecx == X86_VENDOR_AMD_ECX &&
-             edx == X86_VENDOR_AMD_EDX )
-            return X86_VENDOR_AMD;
-        break;
-
-    case X86_VENDOR_CENTAUR_EBX:
-        if ( ecx == X86_VENDOR_CENTAUR_ECX &&
-             edx == X86_VENDOR_CENTAUR_EDX )
-            return X86_VENDOR_CENTAUR;
-        break;
-
-    case X86_VENDOR_SHANGHAI_EBX:
-        if ( ecx == X86_VENDOR_SHANGHAI_ECX &&
-             edx == X86_VENDOR_SHANGHAI_EDX )
-            return X86_VENDOR_SHANGHAI;
-        break;
-
-    case X86_VENDOR_HYGON_EBX:
-        if ( ecx == X86_VENDOR_HYGON_ECX &&
-             edx == X86_VENDOR_HYGON_EDX )
-            return X86_VENDOR_HYGON;
-        break;
-    }
-
-    return X86_VENDOR_UNKNOWN;
-}
-
-const char *x86_cpuid_vendor_to_str(unsigned int vendor)
-{
-    switch ( vendor )
-    {
-    case X86_VENDOR_INTEL:    return "Intel";
-    case X86_VENDOR_AMD:      return "AMD";
-    case X86_VENDOR_CENTAUR:  return "Centaur";
-    case X86_VENDOR_SHANGHAI: return "Shanghai";
-    case X86_VENDOR_HYGON:    return "Hygon";
-    default:                  return "Unknown";
-    }
-}
-
-void x86_cpu_policy_to_featureset(
-    const struct cpu_policy *p, uint32_t fs[FEATURESET_NR_ENTRIES])
-{
-    fs[FEATURESET_1d]        = p->basic._1d;
-    fs[FEATURESET_1c]        = p->basic._1c;
-    fs[FEATURESET_e1d]       = p->extd.e1d;
-    fs[FEATURESET_e1c]       = p->extd.e1c;
-    fs[FEATURESET_Da1]       = p->xstate.Da1;
-    fs[FEATURESET_7b0]       = p->feat._7b0;
-    fs[FEATURESET_7c0]       = p->feat._7c0;
-    fs[FEATURESET_e7d]       = p->extd.e7d;
-    fs[FEATURESET_e8b]       = p->extd.e8b;
-    fs[FEATURESET_7d0]       = p->feat._7d0;
-    fs[FEATURESET_7a1]       = p->feat._7a1;
-    fs[FEATURESET_e21a]      = p->extd.e21a;
-    fs[FEATURESET_7b1]       = p->feat._7b1;
-    fs[FEATURESET_7d2]       = p->feat._7d2;
-    fs[FEATURESET_7c1]       = p->feat._7c1;
-    fs[FEATURESET_7d1]       = p->feat._7d1;
-    fs[FEATURESET_m10Al]     = p->arch_caps.lo;
-    fs[FEATURESET_m10Ah]     = p->arch_caps.hi;
-    fs[FEATURESET_e21c]      = p->extd.e21c;
-}
-
-void x86_cpu_featureset_to_policy(
-    const uint32_t fs[FEATURESET_NR_ENTRIES], struct cpu_policy *p)
-{
-    p->basic._1d             = fs[FEATURESET_1d];
-    p->basic._1c             = fs[FEATURESET_1c];
-    p->extd.e1d              = fs[FEATURESET_e1d];
-    p->extd.e1c              = fs[FEATURESET_e1c];
-    p->xstate.Da1            = fs[FEATURESET_Da1];
-    p->feat._7b0             = fs[FEATURESET_7b0];
-    p->feat._7c0             = fs[FEATURESET_7c0];
-    p->extd.e7d              = fs[FEATURESET_e7d];
-    p->extd.e8b              = fs[FEATURESET_e8b];
-    p->feat._7d0             = fs[FEATURESET_7d0];
-    p->feat._7a1             = fs[FEATURESET_7a1];
-    p->extd.e21a             = fs[FEATURESET_e21a];
-    p->feat._7b1             = fs[FEATURESET_7b1];
-    p->feat._7d2             = fs[FEATURESET_7d2];
-    p->feat._7c1             = fs[FEATURESET_7c1];
-    p->feat._7d1             = fs[FEATURESET_7d1];
-    p->arch_caps.lo          = fs[FEATURESET_m10Al];
-    p->arch_caps.hi          = fs[FEATURESET_m10Ah];
-    p->extd.e21c             = fs[FEATURESET_e21c];
-}
-
-void x86_cpu_policy_recalc_synth(struct cpu_policy *p)
-{
-    p->x86_vendor = x86_cpuid_lookup_vendor(
-        p->basic.vendor_ebx, p->basic.vendor_ecx, p->basic.vendor_edx);
-}
-
-void x86_cpu_policy_fill_native(struct cpu_policy *p)
-{
-    unsigned int i;
-
-    cpuid_leaf(0, &p->basic.raw[0]);
-    for ( i = 1; i <= MIN(p->basic.max_leaf,
-                          ARRAY_SIZE(p->basic.raw) - 1); ++i )
-    {
-        switch ( i )
-        {
-        case 0x4: case 0x7: case 0xb: case 0xd:
-            /* Multi-invocation leaves.  Deferred. */
-            continue;
-        }
-
-        cpuid_leaf(i, &p->basic.raw[i]);
-    }
-
-    if ( p->basic.max_leaf >= 4 )
-    {
-        for ( i = 0; i < ARRAY_SIZE(p->cache.raw); ++i )
-        {
-            union {
-                struct cpuid_leaf l;
-                struct cpuid_cache_leaf c;
-            } u;
-
-            cpuid_count_leaf(4, i, &u.l);
-
-            if ( u.c.type == 0 )
-                break;
-
-            p->cache.subleaf[i] = u.c;
-        }
-
-        /*
-         * The choice of CPUID_GUEST_NR_CACHE is arbitrary.  It is expected
-         * that it will eventually need increasing for future hardware.
-         */
-#ifdef __XEN__
-        if ( i == ARRAY_SIZE(p->cache.raw) )
-            printk(XENLOG_WARNING
-                   "CPUID: Insufficient Leaf 4 space for this hardware\n");
-#endif
-    }
-
-    if ( p->basic.max_leaf >= 7 )
-    {
-        cpuid_count_leaf(7, 0, &p->feat.raw[0]);
-
-        for ( i = 1; i <= MIN(p->feat.max_subleaf,
-                              ARRAY_SIZE(p->feat.raw) - 1); ++i )
-            cpuid_count_leaf(7, i, &p->feat.raw[i]);
-    }
-
-    if ( p->basic.max_leaf >= 0xb )
-    {
-        union {
-            struct cpuid_leaf l;
-            struct cpuid_topo_leaf t;
-        } u;
-
-        for ( i = 0; i < ARRAY_SIZE(p->topo.raw); ++i )
-        {
-            cpuid_count_leaf(0xb, i, &u.l);
-
-            if ( u.t.type == 0 )
-                break;
-
-            p->topo.subleaf[i] = u.t;
-        }
-
-        /*
-         * The choice of CPUID_GUEST_NR_TOPO is per the manual.  It may need
-         * to grow for future hardware.
-         */
-#ifdef __XEN__
-        if ( i == ARRAY_SIZE(p->topo.raw) &&
-             (cpuid_count_leaf(0xb, i, &u.l), u.t.type != 0) )
-            printk(XENLOG_WARNING
-                   "CPUID: Insufficient Leaf 0xb space for this hardware\n");
-#endif
-    }
-
-    if ( p->basic.max_leaf >= 0xd )
-    {
-        uint64_t xstates;
-
-        cpuid_count_leaf(0xd, 0, &p->xstate.raw[0]);
-        cpuid_count_leaf(0xd, 1, &p->xstate.raw[1]);
-
-        xstates = cpu_policy_xstates(p);
-
-        /* This logic will probably need adjusting when XCR0[63] gets used. */
-        BUILD_BUG_ON(ARRAY_SIZE(p->xstate.raw) > 63);
-
-        for ( i = 2; i < min_t(unsigned int, 63,
-                               ARRAY_SIZE(p->xstate.raw)); ++i )
-        {
-            if ( xstates & (1ULL << i) )
-                cpuid_count_leaf(0xd, i, &p->xstate.raw[i]);
-        }
-    }
-
-    /* Extended leaves. */
-    cpuid_leaf(0x80000000U, &p->extd.raw[0]);
-    for ( i = 1; i <= MIN(p->extd.max_leaf & 0xffffU,
-                          ARRAY_SIZE(p->extd.raw) - 1); ++i )
-        cpuid_leaf(0x80000000U + i, &p->extd.raw[i]);
-
-    /* Don't report leaves from possible lower level hypervisor, for now. */
-    p->hv_limit = 0;
-    p->hv2_limit = 0;
-
-#ifdef __XEN__
-    /* TODO MSR_PLATFORM_INFO */
-
-    if ( p->feat.arch_caps )
-        rdmsrl(MSR_ARCH_CAPABILITIES, p->arch_caps.raw);
-#endif
-
-    x86_cpu_policy_recalc_synth(p);
-}
-
 void x86_cpu_policy_clear_out_of_range_leaves(struct cpu_policy *p)
 {
     unsigned int i;
@@ -291,37 +62,6 @@ void x86_cpu_policy_clear_out_of_range_leaves(struct cpu_policy *p)
                 ARRAY_SIZE(p->extd.raw) - 1);
 }
 
-const uint32_t *x86_cpu_policy_lookup_deep_deps(uint32_t feature)
-{
-    static const uint32_t deep_features[] = INIT_DEEP_FEATURES;
-    static const struct {
-        uint32_t feature;
-        uint32_t fs[FEATURESET_NR_ENTRIES];
-    } deep_deps[] = INIT_DEEP_DEPS;
-    unsigned int start = 0, end = ARRAY_SIZE(deep_deps);
-
-    BUILD_BUG_ON(ARRAY_SIZE(deep_deps) != NR_DEEP_DEPS);
-
-    /* Fast early exit. */
-    if ( !test_bit(feature, deep_features) )
-        return NULL;
-
-    /* deep_deps[] is sorted.  Perform a binary search. */
-    while ( start < end )
-    {
-        unsigned int mid = start + ((end - start) / 2);
-
-        if ( deep_deps[mid].feature > feature )
-            end = mid;
-        else if ( deep_deps[mid].feature < feature )
-            start = mid + 1;
-        else
-            return deep_deps[mid].fs;
-    }
-
-    return NULL;
-}
-
 /*
  * Copy a single cpuid_leaf into a provided xen_cpuid_leaf_t buffer,
  * performing boundary checking against the buffer size.
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, Andrew Cooper , "Anthony
 PERARD" , Michal Orzel ,
	"Jan Beulich" , Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Stefano
 Stabellini" , Stewart Hildebrand
	, "Daniel P. Smith"
	, Daniel De Graaf 
Subject: [PATCH v4 01/24] xen/xsm: remove redundant xsm_iomem_mapping()
Date: Fri, 21 Nov 2025 18:57:38 +0800
Message-ID: <20251121105801.1251262-2-Penny.Zheng@amd.com>
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Function xsm_iomem_mapping() seems redundant, and in flask policy, it just
directly calls xsm_iomem_permission().
Remove it and use xsm_iomem_permission() instead, with the benefit of a
cf_check disappearing too.

Signed-off-by: Penny Zheng 
Cc: Daniel De Graaf 
---
v2 -> v3:
- new commit
---
 xen/common/domctl.c       | 2 +-
 xen/drivers/vpci/header.c | 2 +-
 xen/include/xsm/dummy.h   | 7 -------
 xen/include/xsm/xsm.h     | 8 --------
 xen/xsm/dummy.c           | 1 -
 xen/xsm/flask/hooks.c     | 6 ------
 6 files changed, 2 insertions(+), 24 deletions(-)

diff --git a/xen/common/domctl.c b/xen/common/domctl.c
index 29a7726d32..86da0086de 100644
--- a/xen/common/domctl.c
+++ b/xen/common/domctl.c
@@ -707,7 +707,7 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl)
              !iomem_access_permitted(d, mfn, mfn_end) )
             break;
 
-        ret = xsm_iomem_mapping(XSM_HOOK, d, mfn, mfn_end, add);
+        ret = xsm_iomem_permission(XSM_HOOK, d, mfn, mfn_end, add);
         if ( ret )
             break;
 
diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c
index 469f497744..1ff6c63f4d 100644
--- a/xen/drivers/vpci/header.c
+++ b/xen/drivers/vpci/header.c
@@ -67,7 +67,7 @@ static int cf_check map_range(
             return -EPERM;
         }
 
-        rc = xsm_iomem_mapping(XSM_HOOK, map->d, map_mfn, m_end, map->map);
+        rc = xsm_iomem_permission(XSM_HOOK, map->d, map_mfn, m_end, map->map);
         if ( rc )
         {
             printk(XENLOG_G_WARNING
diff --git a/xen/include/xsm/dummy.h b/xen/include/xsm/dummy.h
index e801dbcdba..e4e1c680c8 100644
--- a/xen/include/xsm/dummy.h
+++ b/xen/include/xsm/dummy.h
@@ -570,13 +570,6 @@ static XSM_INLINE int cf_check xsm_iomem_permission(
     return xsm_default_action(action, current->domain, d);
 }
 
-static XSM_INLINE int cf_check xsm_iomem_mapping(
-    XSM_DEFAULT_ARG struct domain *d, uint64_t s, uint64_t e, uint8_t allow)
-{
-    XSM_ASSERT_ACTION(XSM_HOOK);
-    return xsm_default_action(action, current->domain, d);
-}
-
 static XSM_INLINE int cf_check xsm_pci_config_permission(
     XSM_DEFAULT_ARG struct domain *d, uint32_t machine_bdf, uint16_t start,
     uint16_t end, uint8_t access)
diff --git a/xen/include/xsm/xsm.h b/xen/include/xsm/xsm.h
index d9e5c831f3..1d72431d32 100644
--- a/xen/include/xsm/xsm.h
+++ b/xen/include/xsm/xsm.h
@@ -116,8 +116,6 @@ struct xsm_ops {
     int (*irq_permission)(struct domain *d, int pirq, uint8_t allow);
     int (*iomem_permission)(struct domain *d, uint64_t s, uint64_t e,
                             uint8_t allow);
-    int (*iomem_mapping)(struct domain *d, uint64_t s, uint64_t e,
-                         uint8_t allow);
     int (*pci_config_permission)(struct domain *d, uint32_t machine_bdf,
                                  uint16_t start, uint16_t end, uint8_t access);
 
@@ -517,12 +515,6 @@ static inline int xsm_iomem_permission(
     return alternative_call(xsm_ops.iomem_permission, d, s, e, allow);
 }
 
-static inline int xsm_iomem_mapping(
-    xsm_default_t def, struct domain *d, uint64_t s, uint64_t e, uint8_t allow)
-{
-    return alternative_call(xsm_ops.iomem_mapping, d, s, e, allow);
-}
-
 static inline int xsm_pci_config_permission(
     xsm_default_t def, struct domain *d, uint32_t machine_bdf, uint16_t start,
     uint16_t end, uint8_t access)
diff --git a/xen/xsm/dummy.c b/xen/xsm/dummy.c
index 96dc82ac2e..b7b65a7122 100644
--- a/xen/xsm/dummy.c
+++ b/xen/xsm/dummy.c
@@ -75,7 +75,6 @@ static const struct xsm_ops __initconst_cf_clobber dummy_ops = {
     .unbind_pt_irq                 = xsm_unbind_pt_irq,
     .irq_permission                = xsm_irq_permission,
     .iomem_permission              = xsm_iomem_permission,
-    .iomem_mapping                 = xsm_iomem_mapping,
     .pci_config_permission         = xsm_pci_config_permission,
     .get_vnumainfo                 = xsm_get_vnumainfo,
 
diff --git a/xen/xsm/flask/hooks.c b/xen/xsm/flask/hooks.c
index 9f3915617c..89e790b774 100644
--- a/xen/xsm/flask/hooks.c
+++ b/xen/xsm/flask/hooks.c
@@ -1167,11 +1167,6 @@ static int cf_check flask_iomem_permission(
     return security_iterate_iomem_sids(start, end, _iomem_has_perm, &data);
 }
 
-static int cf_check flask_iomem_mapping(struct domain *d, uint64_t start, uint64_t end, uint8_t access)
-{
-    return flask_iomem_permission(d, start, end, access);
-}
-
 static int cf_check flask_pci_config_permission(
     struct domain *d, uint32_t machine_bdf, uint16_t start, uint16_t end,
     uint8_t access)
@@ -1945,7 +1940,6 @@ static const struct xsm_ops __initconst_cf_clobber flask_ops = {
     .unbind_pt_irq = flask_unbind_pt_irq,
     .irq_permission = flask_irq_permission,
     .iomem_permission = flask_iomem_permission,
-    .iomem_mapping = flask_iomem_mapping,
     .pci_config_permission = flask_pci_config_permission,
 
     .resource_plug_core = flask_resource_plug_core,
-- 
2.34.1



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From: Penny Zheng 
To: , 
CC: , , Penny Zheng
	, Andrew Cooper , "Anthony
 PERARD" , Michal Orzel ,
	"Jan Beulich" , Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Stefano
 Stabellini" , Stewart Hildebrand
	, "Daniel P. Smith"
	, Daniel De Graaf ,
	Juergen Gross , Bertrand Marquis ,
	Volodymyr Babchuk , Alistair Francis
	, Bob Eshleman , "Connor
 Davis" , Oleksii Kurochko
	, Nathan Studer ,
	Stewart Hildebrand , Dario Faggioli ,
	George Dunlap , Timothy Pearson
	, "Meng Xu" , Jason
 Andryuk , Rahul Singh 
Subject: [PATCH v4 00/24] Disable domctl-op via CONFIG_MGMT_HYPERCALLS
Date: Fri, 21 Nov 2025 18:57:37 +0800
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It can be beneficial for some dom0less systems to further reduce Xen footprint
via disabling some hypercalls handling code, which may not to be used &
required in such systems.
We are introducing a new single Kconfig CONFIG_MGMT_HYPERCALLS to manage
such hypercalls.

We are trying to disable hypercalls in the following aspects:
- sysctl
- domctl
- hvm
- physdev
- platform
This patch serie is only focusing on domctl-op. Different aspects will be
covered in different patch serie.

Features, like VM event, or paging log-dirty support, which fully rely on
domctl-op, will be wrapped with CONFIG_MGMT_HYPERCALLS, to reduce Xen
footprint as much as possible.

It is derived from Stefano Stabellini's commit "xen: introduce kconfig options
to disable hypercalls"(
https://lore.kernel.org/xen-devel/20241219092917.3006174-1-Sergiy_Kibrik@epam.com)
---
This patch serie is based on two patch serie, one is
"[XEN][PATCH v4] xen: make VMTRACE support optional" and "
[PATCH v3 0/7] consolidate vm event subsystem"
---
Penny Zheng (24):
  xen/xsm: remove redundant xsm_iomem_mapping()
  xen: consolidate cpuid library
  xen/sysctl: replace CONFIG_SYSCTL with CONFIG_MGMT_HYPERCALLS
  xen/domctl: make MGMT_HYPERCALLS transiently def_bool
  xen/vm_event: make VM_EVENT depend on CONFIG_MGMT_HYPERCALLS
  xen/domctl: consolidate domain.c with MGMT_HYPERCALLS
  xen/mem_sharing: make memory sharing depend on MGMT_HYPERCALLS
  xen/domctl: wrap domain_kill() with CONFIG_MGMT_HYPERCALLS
  xen/domctl: wrap vcpu_affinity_domctl() with CONFIG_MGMT_HYPERCALLS
  xen/domctl: wrap sched_adjust() with CONFIG_MGMT_HYPERCALLS
  xen/domctl: wrap xsm_irq_permission with CONFIG_MGMT_HYPERCALLS
  xen/domctl: wrap arch-specific domain_set_time_offset() with
    CONFIG_MGMT_HYPERCALLS
  xen/domctl: wrap xsm_set_target() with CONFIG_MGMT_HYPERCALLS
  xen/domctl: wrap pci-subset iommu-related domctl op with
    CONFIG_MGMT_HYPERCALLS
  xen/domctl: wrap device-tree-subset iommu-related domctl op with
    CONFIG_MGMT_HYPERCALLS
  xen/domctl: wrap iommu-related domctl op with CONFIG_MGMT_HYPERCALLS
  xen/domctl: wrap arch_{get,set}_paging_mempool_size() with
    CONFIG_MGMT_HYPERCALLS
  xen/domctl: make CONFIG_X86_PSR depend on CONFIG_MGMT_HYPERCALLS
  xen/domctl: wrap hvm_save{,load} with CONFIG_MGMT_HYPERCALLS
  xen/x86: wrap x86-specific domctl-op with CONFIG_MGMT_HYPERCALLS
  xen/arm: wrap arm-specific domctl-op with CONFIG_MGMT_HYPERCALLS
  xen/domctl: domctl_lock synchronization only when MGMT_HYPERCALLS=y
  xen/domctl: wrap common/domctl.c with CONFIG_MGMT_HYPERCALLS
  xen: move MGMT_HYPERCALLS out of PV_SHIM_EXCLUSIVE

 tools/fuzz/cpu-policy/Makefile               |   2 +-
 tools/fuzz/x86_instruction_emulator/Makefile |  10 +-
 tools/libs/guest/Makefile.common             |   2 +-
 tools/tests/cpu-policy/Makefile              |   2 +-
 tools/tests/x86_emulator/Makefile            |   2 +-
 xen/Kconfig.debug                            |   3 +-
 xen/arch/arm/Kconfig                         |   2 +-
 xen/arch/arm/Makefile                        |   4 +-
 xen/arch/arm/arm32/Makefile                  |   2 +-
 xen/arch/arm/arm64/Makefile                  |   2 +-
 xen/arch/arm/domain.c                        |   3 +
 xen/arch/arm/include/asm/tee/tee.h           |   2 +
 xen/arch/arm/mmu/p2m.c                       |   8 +
 xen/arch/arm/mpu/p2m.c                       |   2 +
 xen/arch/arm/tee/ffa.c                       |   4 +
 xen/arch/arm/tee/optee.c                     |   4 +
 xen/arch/arm/tee/tee.c                       |   2 +
 xen/arch/arm/time.c                          |   2 +
 xen/arch/ppc/stubs.c                         |   2 +
 xen/arch/riscv/stubs.c                       |   8 +-
 xen/arch/x86/Kconfig                         |   3 +-
 xen/arch/x86/Makefile                        |   4 +-
 xen/arch/x86/configs/pvshim_defconfig        |   2 +-
 xen/arch/x86/domain.c                        |   2 +
 xen/arch/x86/emul-i8254.c                    |   2 +
 xen/arch/x86/hvm/Kconfig                     |   3 +-
 xen/arch/x86/hvm/hvm.c                       |   7 +-
 xen/arch/x86/hvm/pmtimer.c                   |   2 +
 xen/arch/x86/hvm/save.c                      | 154 +++++------
 xen/arch/x86/include/asm/p2m.h               |   2 +-
 xen/arch/x86/include/asm/paging.h            |   2 +-
 xen/arch/x86/mm/p2m-pod.c                    |   2 +
 xen/arch/x86/mm/p2m.c                        |   2 +
 xen/arch/x86/mm/paging.c                     |   4 +
 xen/arch/x86/psr.c                           |  18 --
 xen/arch/x86/time.c                          |   2 +
 xen/common/Kconfig                           |  28 +-
 xen/common/Makefile                          |   7 +-
 xen/common/device-tree/device-tree.c         |   2 +
 xen/common/domain.c                          | 116 ++++----
 xen/common/domctl.c                          |   2 +-
 xen/common/page_alloc.c                      |   8 +-
 xen/common/perfc.c                           |   4 +-
 xen/common/sched/arinc653.c                  |  11 +-
 xen/common/sched/core.c                      |   8 +-
 xen/common/sched/cpupool.c                   |  16 +-
 xen/common/sched/credit.c                    |  10 +-
 xen/common/sched/credit2.c                   |  10 +-
 xen/common/sched/private.h                   |  10 +-
 xen/common/sched/rt.c                        |   4 +
 xen/common/spinlock.c                        |   4 +-
 xen/drivers/char/console.c                   |   4 +-
 xen/drivers/passthrough/amd/pci_amd_iommu.c  |  20 +-
 xen/drivers/passthrough/arm/ipmmu-vmsa.c     |  26 +-
 xen/drivers/passthrough/arm/smmu-v3.c        |   4 +
 xen/drivers/passthrough/arm/smmu.c           |  55 ++--
 xen/drivers/passthrough/device_tree.c        | 108 ++++----
 xen/drivers/passthrough/iommu.c              |   2 +
 xen/drivers/passthrough/pci.c                |  52 ++--
 xen/drivers/passthrough/vtd/iommu.c          |   6 +-
 xen/drivers/vpci/header.c                    |   2 +-
 xen/include/hypercall-defs.c                 |  14 +-
 xen/include/xen/domain.h                     |   4 -
 xen/include/xsm/dummy.h                      |  29 +-
 xen/include/xsm/xsm.h                        |  60 ++--
 xen/lib/x86/Makefile                         |   7 +-
 xen/lib/x86/cpuid-generic.c                  | 273 +++++++++++++++++++
 xen/lib/x86/cpuid.c                          | 260 ------------------
 xen/xsm/dummy.c                              |  21 +-
 xen/xsm/flask/hooks.c                        |  54 ++--
 70 files changed, 812 insertions(+), 708 deletions(-)
 create mode 100644 xen/lib/x86/cpuid-generic.c

-- 
2.34.1



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From: Penny Zheng 
To: , 
CC: , , Penny Zheng
	, Andrew Cooper , "Anthony
 PERARD" , Michal Orzel ,
	"Jan Beulich" , Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Stefano
 Stabellini" , Bertrand Marquis
	, Volodymyr Babchuk ,
	Bob Eshleman , Connor Davis ,
	Oleksii Kurochko , Nathan Studer
	, Stewart Hildebrand , "Dario
 Faggioli" , Juergen Gross , George
 Dunlap , "Daniel P. Smith"
	, Alistair Francis 
Subject: [PATCH v4 03/24] xen/sysctl: replace CONFIG_SYSCTL with CONFIG_MGMT_HYPERCALLS
Date: Fri, 21 Nov 2025 18:57:40 +0800
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Rename all the CONFIG_SYSCTL into CONFIG_MGMT_HYPERCALLS to help provide a
single option to manage all unnecessary hypercalls, including
sysctl, domctl, etc, in dom0less system and PV shim mode, which could also
make it easier to support randconfigs.
While doing the replacement, we fix some bugs on xsm system:
- wrap the whole xsm function to avoid bringing unreachable codes when
MGMT_DOMCTL=n
- add missing wrapping in include/xsm/dummy.h

Suggested-by: Stefano Stabellini 
Signed-off-by: Penny Zheng 
Reviewed-by: Stefano Stabellini 
Reviewed-by: Juergen Gross 
Acked-by: Stewart Hildebrand  #ARINC 653
Acked-by: Jan Beulich 
Cc: Alistair Francis 
---
v2 -> v3:
- wrap the whole xsm function
- add missing wrapping in include/xsm/dummy.h
- refine kconfig description
---
 xen/Kconfig.debug                     |  2 +-
 xen/arch/arm/Makefile                 |  2 +-
 xen/arch/riscv/stubs.c                |  4 ++--
 xen/arch/x86/Makefile                 |  2 +-
 xen/arch/x86/configs/pvshim_defconfig |  2 +-
 xen/arch/x86/psr.c                    | 26 +++++++++++++-------------
 xen/common/Kconfig                    | 15 ++++++++-------
 xen/common/Makefile                   |  2 +-
 xen/common/page_alloc.c               |  8 ++++----
 xen/common/perfc.c                    |  4 ++--
 xen/common/sched/arinc653.c           | 10 +++++-----
 xen/common/sched/core.c               |  6 +++---
 xen/common/sched/cpupool.c            | 16 ++++++++--------
 xen/common/sched/credit.c             |  6 +++---
 xen/common/sched/credit2.c            |  6 +++---
 xen/common/sched/private.h            |  4 ++--
 xen/common/spinlock.c                 |  4 ++--
 xen/drivers/char/console.c            |  4 ++--
 xen/include/hypercall-defs.c          |  4 ++--
 xen/include/xsm/dummy.h               |  6 ++++++
 xen/include/xsm/xsm.h                 | 24 +++++++++---------------
 xen/xsm/dummy.c                       |  6 +++---
 xen/xsm/flask/hooks.c                 | 22 +++++++++++-----------
 23 files changed, 93 insertions(+), 92 deletions(-)

diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug
index d900d926c5..a69615cd63 100644
--- a/xen/Kconfig.debug
+++ b/xen/Kconfig.debug
@@ -37,7 +37,7 @@ config SELF_TESTS
 
 config COVERAGE
 	bool "Code coverage support"
-	depends on SYSCTL && !LIVEPATCH
+	depends on MGMT_HYPERCALLS && !LIVEPATCH
 	select SUPPRESS_DUPLICATE_SYMBOL_WARNINGS if !ENFORCE_UNIQUE_SYMBOLS
 	help
 	  Enable code coverage support.
diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile
index 7e88ddd3d7..2aff1a1630 100644
--- a/xen/arch/arm/Makefile
+++ b/xen/arch/arm/Makefile
@@ -51,7 +51,7 @@ obj-y += setup.o
 obj-y += shutdown.o
 obj-y += smp.o
 obj-y += smpboot.o
-obj-$(CONFIG_SYSCTL) += sysctl.o
+obj-$(CONFIG_MGMT_HYPERCALLS) += sysctl.o
 obj-y += time.o
 obj-y += traps.o
 obj-y += vcpreg.o
diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c
index 340ed3cd6c..37b4346d3f 100644
--- a/xen/arch/riscv/stubs.c
+++ b/xen/arch/riscv/stubs.c
@@ -277,7 +277,7 @@ unsigned long raw_copy_from_guest(void *to, const void __user *from,
     BUG_ON("unimplemented");
 }
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
 /* sysctl.c */
 
 long arch_do_sysctl(struct xen_sysctl *sysctl,
@@ -290,7 +290,7 @@ void arch_do_physinfo(struct xen_sysctl_physinfo *pi)
 {
     BUG_ON("unimplemented");
 }
-#endif /* CONFIG_SYSCTL */
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 /* p2m.c */
 
diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
index f71ca9f18b..d21fdd49df 100644
--- a/xen/arch/x86/Makefile
+++ b/xen/arch/x86/Makefile
@@ -66,7 +66,7 @@ obj-y += smpboot.o
 obj-y += spec_ctrl.o
 obj-y += srat.o
 obj-y += string.o
-obj-$(CONFIG_SYSCTL) += sysctl.o
+obj-$(CONFIG_MGMT_HYPERCALLS) += sysctl.o
 obj-y += time.o
 obj-y += traps-setup.o
 obj-y += traps.o
diff --git a/xen/arch/x86/configs/pvshim_defconfig b/xen/arch/x86/configs/pvshim_defconfig
index 24f4e4857d..d1db94df78 100644
--- a/xen/arch/x86/configs/pvshim_defconfig
+++ b/xen/arch/x86/configs/pvshim_defconfig
@@ -25,4 +25,4 @@ CONFIG_PDX_NONE=y
 # CONFIG_INTEL_IOMMU is not set
 # CONFIG_DEBUG is not set
 # CONFIG_GDBSX is not set
-# CONFIG_SYSCTL is not set
+# CONFIG_MGMT_HYPERCALLS is not set
diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c
index cce7020868..80ce5804b4 100644
--- a/xen/arch/x86/psr.c
+++ b/xen/arch/x86/psr.c
@@ -135,7 +135,7 @@ static const struct feat_props {
      */
     enum psr_type alt_type;
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
     /* get_feat_info is used to return feature HW info through sysctl. */
     bool (*get_feat_info)(const struct feat_node *feat,
                           uint32_t data[], unsigned int array_len);
@@ -422,7 +422,7 @@ static bool mba_init_feature(const struct cpuid_leaf *regs,
     return true;
 }
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
 static bool cf_check cat_get_feat_info(
     const struct feat_node *feat, uint32_t data[], unsigned int array_len)
 {
@@ -435,7 +435,7 @@ static bool cf_check cat_get_feat_info(
 
     return true;
 }
-#endif /* CONFIG_SYSCTL */
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 /* L3 CAT props */
 static void cf_check l3_cat_write_msr(
@@ -448,14 +448,14 @@ static const struct feat_props l3_cat_props = {
     .cos_num = 1,
     .type[0] = PSR_TYPE_L3_CBM,
     .alt_type = PSR_TYPE_UNKNOWN,
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
     .get_feat_info = cat_get_feat_info,
 #endif
     .write_msr = l3_cat_write_msr,
     .sanitize = cat_check_cbm,
 };
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
 /* L3 CDP props */
 static bool cf_check l3_cdp_get_feat_info(
     const struct feat_node *feat, uint32_t data[], uint32_t array_len)
@@ -467,7 +467,7 @@ static bool cf_check l3_cdp_get_feat_info(
 
     return true;
 }
-#endif /* CONFIG_SYSCTL */
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static void cf_check l3_cdp_write_msr(
     unsigned int cos, uint32_t val, enum psr_type type)
@@ -483,7 +483,7 @@ static const struct feat_props l3_cdp_props = {
     .type[0] = PSR_TYPE_L3_DATA,
     .type[1] = PSR_TYPE_L3_CODE,
     .alt_type = PSR_TYPE_L3_CBM,
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
     .get_feat_info = l3_cdp_get_feat_info,
 #endif
     .write_msr = l3_cdp_write_msr,
@@ -501,14 +501,14 @@ static const struct feat_props l2_cat_props = {
     .cos_num = 1,
     .type[0] = PSR_TYPE_L2_CBM,
     .alt_type = PSR_TYPE_UNKNOWN,
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
     .get_feat_info = cat_get_feat_info,
 #endif
     .write_msr = l2_cat_write_msr,
     .sanitize = cat_check_cbm,
 };
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
 /* MBA props */
 static bool cf_check mba_get_feat_info(
     const struct feat_node *feat, uint32_t data[], unsigned int array_len)
@@ -523,7 +523,7 @@ static bool cf_check mba_get_feat_info(
 
     return true;
 }
-#endif /* CONFIG_SYSCTL */
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static void cf_check mba_write_msr(
     unsigned int cos, uint32_t val, enum psr_type type)
@@ -561,7 +561,7 @@ static const struct feat_props mba_props = {
     .cos_num = 1,
     .type[0] = PSR_TYPE_MBA_THRTL,
     .alt_type = PSR_TYPE_UNKNOWN,
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
     .get_feat_info = mba_get_feat_info,
 #endif
     .write_msr = mba_write_msr,
@@ -826,7 +826,7 @@ static struct psr_socket_info *get_socket_info(unsigned int socket)
     return socket_info + socket;
 }
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
 int psr_get_info(unsigned int socket, enum psr_type type,
                  uint32_t data[], unsigned int array_len)
 {
@@ -858,7 +858,7 @@ int psr_get_info(unsigned int socket, enum psr_type type,
 
     return -EINVAL;
 }
-#endif /* CONFIG_SYSCTL */
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 int psr_get_val(struct domain *d, unsigned int socket,
                 uint32_t *val, enum psr_type type)
diff --git a/xen/common/Kconfig b/xen/common/Kconfig
index 218ac3d549..6709c3c95c 100644
--- a/xen/common/Kconfig
+++ b/xen/common/Kconfig
@@ -508,7 +508,7 @@ config CRYPTO
 config LIVEPATCH
 	bool "Live patching support"
 	default X86
-	depends on "$(XEN_HAS_BUILD_ID)" = "y" && SYSCTL && HAS_VMAP
+	depends on "$(XEN_HAS_BUILD_ID)" = "y" && MGMT_HYPERCALLS && HAS_VMAP
 	select CC_SPLIT_SECTIONS
 	help
 	  Allows a running Xen hypervisor to be dynamically patched using
@@ -600,7 +600,7 @@ config DTB_FILE
 config TRACEBUFFER
 	bool "Enable tracing infrastructure" if EXPERT
 	default y
-	depends on SYSCTL
+	depends on MGMT_HYPERCALLS
 	help
 	  Enable tracing infrastructure and pre-defined tracepoints within Xen.
 	  This will allow live information about Xen's execution and performance
@@ -651,19 +651,20 @@ config SYSTEM_SUSPEND
 menu "Supported hypercall interfaces"
 	visible if EXPERT
 
-config SYSCTL
-	bool "Enable sysctl hypercall"
+config MGMT_HYPERCALLS
+	bool "Enable privileged hypercalls for system management"
 	depends on !PV_SHIM_EXCLUSIVE
 	default y
 	help
 	  This option shall only be disabled on some dom0less systems, or
-	  PV shim on x86, to reduce Xen footprint.
+	  PV shim on x86, to reduce Xen footprint via managing unnessary
+	  hypercalls, like sysctl, etc.
 
 endmenu
 
 config PM_OP
 	bool "Enable Performance Management Operation"
-	depends on ACPI && HAS_CPUFREQ && SYSCTL
+	depends on ACPI && HAS_CPUFREQ && MGMT_HYPERCALLS
 	default y
 	help
 	  This option shall enable userspace performance management control
@@ -671,7 +672,7 @@ config PM_OP
 
 config PM_STATS
 	bool "Enable Performance Management Statistics"
-	depends on ACPI && HAS_CPUFREQ && SYSCTL
+	depends on ACPI && HAS_CPUFREQ && MGMT_HYPERCALLS
 	default y
 	help
 	  Enable collection of performance management statistics to aid in
diff --git a/xen/common/Makefile b/xen/common/Makefile
index 0c7d0f5d46..7c32fbd9f1 100644
--- a/xen/common/Makefile
+++ b/xen/common/Makefile
@@ -51,7 +51,7 @@ obj-y += spinlock.o
 obj-$(CONFIG_STACK_PROTECTOR) += stack-protector.o
 obj-y += stop_machine.o
 obj-y += symbols.o
-obj-$(CONFIG_SYSCTL) += sysctl.o
+obj-$(CONFIG_MGMT_HYPERCALLS) += sysctl.o
 obj-y += tasklet.o
 obj-y += time.o
 obj-y += timer.o
diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c
index 1f67b88a89..26615d1e97 100644
--- a/xen/common/page_alloc.c
+++ b/xen/common/page_alloc.c
@@ -602,7 +602,7 @@ out:
     return ret;
 }
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
 void get_outstanding_claims(uint64_t *free_pages, uint64_t *outstanding_pages)
 {
     spin_lock(&heap_lock);
@@ -610,7 +610,7 @@ void get_outstanding_claims(uint64_t *free_pages, uint64_t *outstanding_pages)
     *free_pages = avail_heap_pages(MEMZONE_XEN + 1, NR_ZONES - 1, -1);
     spin_unlock(&heap_lock);
 }
-#endif /* CONFIG_SYSCTL */
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static bool __read_mostly first_node_initialised;
 #ifndef CONFIG_SEPARATE_XENHEAP
@@ -1788,7 +1788,7 @@ int offline_page(mfn_t mfn, int broken, uint32_t *status)
     return 0;
 }
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
 /*
  * Online the memory.
  *   The caller should make sure end_pfn <= max_page,
@@ -1873,7 +1873,7 @@ int query_page_offline(mfn_t mfn, uint32_t *status)
 
     return 0;
 }
-#endif /* CONFIG_SYSCTL */
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 /*
  * This function should only be called with valid pages from the same NUMA
diff --git a/xen/common/perfc.c b/xen/common/perfc.c
index 0f3b89af2c..97a94ef1fc 100644
--- a/xen/common/perfc.c
+++ b/xen/common/perfc.c
@@ -149,7 +149,7 @@ void cf_check perfc_reset(unsigned char key)
     }
 }
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
 static struct xen_sysctl_perfc_desc perfc_d[NR_PERFCTRS];
 static xen_sysctl_perfc_val_t *perfc_vals;
 static unsigned int      perfc_nbr_vals;
@@ -266,7 +266,7 @@ int perfc_control(struct xen_sysctl_perfc_op *pc)
 
     return rc;
 }
-#endif /* CONFIG_SYSCTL */
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 /*
  * Local variables:
diff --git a/xen/common/sched/arinc653.c b/xen/common/sched/arinc653.c
index 8a4f4259d8..7d6c40d800 100644
--- a/xen/common/sched/arinc653.c
+++ b/xen/common/sched/arinc653.c
@@ -220,7 +220,7 @@ static void update_schedule_units(const struct scheduler *ops)
                       SCHED_PRIV(ops)->schedule[i].unit_id);
 }
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
 /**
  * This function is called by the adjust_global scheduler hook to put
  * in place a new ARINC653 schedule.
@@ -335,7 +335,7 @@ arinc653_sched_get(
 
     return 0;
 }
-#endif /* CONFIG_SYSCTL */
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 /**************************************************************************
  * Scheduler callback functions                                           *
@@ -661,7 +661,7 @@ a653_switch_sched(struct scheduler *new_ops, unsigned int cpu,
     return &sr->_lock;
 }
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
 /**
  * Xen scheduler callback function to perform a global (not domain-specific)
  * adjustment. It is used by the ARINC 653 scheduler to put in place a new
@@ -701,7 +701,7 @@ a653sched_adjust_global(const struct scheduler *ops,
 
     return rc;
 }
-#endif /* CONFIG_SYSCTL */
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 /**
  * This structure defines our scheduler for Xen.
@@ -736,7 +736,7 @@ static const struct scheduler sched_arinc653_def = {
     .switch_sched   = a653_switch_sched,
 
     .adjust         = NULL,
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
     .adjust_global  = a653sched_adjust_global,
 #endif
 
diff --git a/xen/common/sched/core.c b/xen/common/sched/core.c
index ec2448cfa1..88150432c3 100644
--- a/xen/common/sched/core.c
+++ b/xen/common/sched/core.c
@@ -2064,7 +2064,7 @@ long do_set_timer_op(s_time_t timeout)
     return 0;
 }
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
 /* scheduler_id - fetch ID of current scheduler */
 int scheduler_id(void)
 {
@@ -2107,7 +2107,7 @@ long sched_adjust(struct domain *d, struct xen_domctl_scheduler_op *op)
     return ret;
 }
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
 long sched_adjust_global(struct xen_sysctl_scheduler_op *op)
 {
     struct cpupool *pool;
@@ -2136,7 +2136,7 @@ long sched_adjust_global(struct xen_sysctl_scheduler_op *op)
 
     return rc;
 }
-#endif /* CONFIG_SYSCTL */
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static void vcpu_periodic_timer_work_locked(struct vcpu *v)
 {
diff --git a/xen/common/sched/cpupool.c b/xen/common/sched/cpupool.c
index f5459c2779..51ba3cb43d 100644
--- a/xen/common/sched/cpupool.c
+++ b/xen/common/sched/cpupool.c
@@ -241,12 +241,12 @@ struct cpupool *cpupool_get_by_id(unsigned int poolid)
     return __cpupool_get_by_id(poolid, true);
 }
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
 static struct cpupool *cpupool_get_next_by_id(unsigned int poolid)
 {
     return __cpupool_get_by_id(poolid, false);
 }
-#endif /* CONFIG_SYSCTL */
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 void cpupool_put(struct cpupool *pool)
 {
@@ -354,7 +354,7 @@ static struct cpupool *cpupool_create(unsigned int poolid,
 
     return ERR_PTR(ret);
 }
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
 /*
  * destroys the given cpupool
  * returns 0 on success, 1 else
@@ -382,7 +382,7 @@ static int cpupool_destroy(struct cpupool *c)
     debugtrace_printk("cpupool_destroy(pool=%u)\n", c->cpupool_id);
     return 0;
 }
-#endif /* CONFIG_SYSCTL */
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 /*
  * Move domain to another cpupool
@@ -572,7 +572,7 @@ static int cpupool_unassign_cpu_start(struct cpupool *c, unsigned int cpu)
     return ret;
 }
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
 static long cf_check cpupool_unassign_cpu_helper(void *info)
 {
     struct cpupool *c = info;
@@ -638,7 +638,7 @@ static int cpupool_unassign_cpu(struct cpupool *c, unsigned int cpu)
     }
     return continue_hypercall_on_cpu(work_cpu, cpupool_unassign_cpu_helper, c);
 }
-#endif /* CONFIG_SYSCTL */
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 /*
  * add a new domain to a cpupool
@@ -816,7 +816,7 @@ static void cpupool_cpu_remove_forced(unsigned int cpu)
     rcu_read_unlock(&sched_res_rculock);
 }
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
 /*
  * do cpupool related sysctl operations
  */
@@ -982,7 +982,7 @@ int cpupool_do_sysctl(struct xen_sysctl_cpupool_op *op)
 
     return ret;
 }
-#endif /* CONFIG_SYSCTL */
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 unsigned int cpupool_get_id(const struct domain *d)
 {
diff --git a/xen/common/sched/credit.c b/xen/common/sched/credit.c
index 6dcf6b2c8b..0cbec2a9c0 100644
--- a/xen/common/sched/credit.c
+++ b/xen/common/sched/credit.c
@@ -1256,7 +1256,7 @@ __csched_set_tslice(struct csched_private *prv, unsigned int timeslice_ms)
     prv->credit = prv->credits_per_tslice * prv->ncpus;
 }
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
 static int cf_check
 csched_sys_cntl(const struct scheduler *ops,
                         struct xen_sysctl_scheduler_op *sc)
@@ -1299,7 +1299,7 @@ csched_sys_cntl(const struct scheduler *ops,
     out:
     return rc;
 }
-#endif /* CONFIG_SYSCTL */
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static void *cf_check
 csched_alloc_domdata(const struct scheduler *ops, struct domain *dom)
@@ -2290,7 +2290,7 @@ static const struct scheduler sched_credit_def = {
 
     .adjust         = csched_dom_cntl,
     .adjust_affinity= csched_aff_cntl,
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
     .adjust_global  = csched_sys_cntl,
 #endif
 
diff --git a/xen/common/sched/credit2.c b/xen/common/sched/credit2.c
index 75316d42b7..307e63ebd8 100644
--- a/xen/common/sched/credit2.c
+++ b/xen/common/sched/credit2.c
@@ -3131,7 +3131,7 @@ csched2_aff_cntl(const struct scheduler *ops, struct sched_unit *unit,
         __clear_bit(__CSFLAG_pinned, &svc->flags);
 }
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
 static int cf_check csched2_sys_cntl(
     const struct scheduler *ops, struct xen_sysctl_scheduler_op *sc)
 {
@@ -3163,7 +3163,7 @@ static int cf_check csched2_sys_cntl(
 
     return 0;
 }
-#endif /* CONFIG_SYSCTL */
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static void *cf_check
 csched2_alloc_domdata(const struct scheduler *ops, struct domain *dom)
@@ -4248,7 +4248,7 @@ static const struct scheduler sched_credit2_def = {
 
     .adjust         = csched2_dom_cntl,
     .adjust_affinity= csched2_aff_cntl,
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
     .adjust_global  = csched2_sys_cntl,
 #endif
 
diff --git a/xen/common/sched/private.h b/xen/common/sched/private.h
index d6884550cd..b7ff67200b 100644
--- a/xen/common/sched/private.h
+++ b/xen/common/sched/private.h
@@ -356,7 +356,7 @@ struct scheduler {
                                     struct sched_unit *unit,
                                     const struct cpumask *hard,
                                     const struct cpumask *soft);
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
     int          (*adjust_global)  (const struct scheduler *ops,
                                     struct xen_sysctl_scheduler_op *sc);
 #endif
@@ -512,7 +512,7 @@ static inline int sched_adjust_dom(const struct scheduler *s, struct domain *d,
     return s->adjust ? s->adjust(s, d, op) : 0;
 }
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
 static inline int sched_adjust_cpupool(const struct scheduler *s,
                                        struct xen_sysctl_scheduler_op *op)
 {
diff --git a/xen/common/spinlock.c b/xen/common/spinlock.c
index 0389293b09..9d08159615 100644
--- a/xen/common/spinlock.c
+++ b/xen/common/spinlock.c
@@ -690,7 +690,7 @@ void cf_check spinlock_profile_reset(unsigned char key)
     spinlock_profile_iterate(spinlock_profile_reset_elem, NULL);
 }
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
 typedef struct {
     struct xen_sysctl_lockprof_op *pc;
     int                      rc;
@@ -750,7 +750,7 @@ int spinlock_profile_control(struct xen_sysctl_lockprof_op *pc)
 
     return rc;
 }
-#endif /* CONFIG_SYSCTL */
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 void _lock_profile_register_struct(
     int32_t type, struct lock_profile_qhead *qhead, int32_t idx)
diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c
index 9bd5b4825d..c38b58d5fc 100644
--- a/xen/drivers/char/console.c
+++ b/xen/drivers/char/console.c
@@ -371,7 +371,7 @@ static void conring_puts(const char *str, size_t len)
         conringc = conringp - conring_size;
 }
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
 long read_console_ring(struct xen_sysctl_readconsole *op)
 {
     XEN_GUEST_HANDLE_PARAM(char) str;
@@ -414,7 +414,7 @@ long read_console_ring(struct xen_sysctl_readconsole *op)
 
     return 0;
 }
-#endif /* CONFIG_SYSCTL */
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 
 /*
diff --git a/xen/include/hypercall-defs.c b/xen/include/hypercall-defs.c
index cef08eeec1..4840de805b 100644
--- a/xen/include/hypercall-defs.c
+++ b/xen/include/hypercall-defs.c
@@ -194,7 +194,7 @@ kexec_op(unsigned long op, void *uarg)
 #ifdef CONFIG_IOREQ_SERVER
 dm_op(domid_t domid, unsigned int nr_bufs, xen_dm_op_buf_t *bufs)
 #endif
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
 sysctl(xen_sysctl_t *u_sysctl)
 #endif
 #if defined(CONFIG_X86) && defined(CONFIG_PAGING) && !defined(CONFIG_PV_SHIM_EXCLUSIVE)
@@ -277,7 +277,7 @@ physdev_op                         compat   do       hvm      hvm      do_arm
 #ifdef CONFIG_HVM
 hvm_op                             do       do       do       do       do
 #endif
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
 sysctl                             do       do       do       do       do
 #endif
 #ifndef CONFIG_PV_SHIM_EXCLUSIVE
diff --git a/xen/include/xsm/dummy.h b/xen/include/xsm/dummy.h
index e4e1c680c8..9b1d31b6ec 100644
--- a/xen/include/xsm/dummy.h
+++ b/xen/include/xsm/dummy.h
@@ -148,11 +148,13 @@ static XSM_INLINE int cf_check xsm_domctl_scheduler_op(
     return xsm_default_action(action, current->domain, d);
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 static XSM_INLINE int cf_check xsm_sysctl_scheduler_op(XSM_DEFAULT_ARG int cmd)
 {
     XSM_ASSERT_ACTION(XSM_HOOK);
     return xsm_default_action(action, current->domain, NULL);
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static XSM_INLINE int cf_check xsm_set_target(
     XSM_DEFAULT_ARG struct domain *d, struct domain *e)
@@ -180,6 +182,7 @@ static XSM_INLINE int cf_check xsm_domctl(
     }
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 static XSM_INLINE int cf_check xsm_sysctl(XSM_DEFAULT_ARG int cmd)
 {
     XSM_ASSERT_ACTION(XSM_PRIV);
@@ -191,6 +194,7 @@ static XSM_INLINE int cf_check xsm_readconsole(XSM_DEFAULT_ARG uint32_t clear)
     XSM_ASSERT_ACTION(XSM_HOOK);
     return xsm_default_action(action, current->domain, NULL);
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static XSM_INLINE int cf_check xsm_alloc_security_domain(struct domain *d)
 {
@@ -485,11 +489,13 @@ static XSM_INLINE int cf_check xsm_resource_setup_misc(XSM_DEFAULT_VOID)
     return xsm_default_action(action, current->domain, NULL);
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 static XSM_INLINE int cf_check xsm_page_offline(XSM_DEFAULT_ARG uint32_t cmd)
 {
     XSM_ASSERT_ACTION(XSM_HOOK);
     return xsm_default_action(action, current->domain, NULL);
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static XSM_INLINE int cf_check xsm_hypfs_op(XSM_DEFAULT_VOID)
 {
diff --git a/xen/include/xsm/xsm.h b/xen/include/xsm/xsm.h
index 1d72431d32..4c6e0dc0f9 100644
--- a/xen/include/xsm/xsm.h
+++ b/xen/include/xsm/xsm.h
@@ -57,13 +57,15 @@ struct xsm_ops {
     int (*domain_create)(struct domain *d, uint32_t ssidref);
     int (*getdomaininfo)(struct domain *d);
     int (*domctl_scheduler_op)(struct domain *d, int op);
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
     int (*sysctl_scheduler_op)(int op);
 #endif
     int (*set_target)(struct domain *d, struct domain *e);
     int (*domctl)(struct domain *d, unsigned int cmd, uint32_t ssidref);
+#ifdef CONFIG_MGMT_HYPERCALLS
     int (*sysctl)(int cmd);
     int (*readconsole)(uint32_t clear);
+#endif
 
     int (*evtchn_unbound)(struct domain *d, struct evtchn *chn, domid_t id2);
     int (*evtchn_interdomain)(struct domain *d1, struct evtchn *chn1,
@@ -138,7 +140,7 @@ struct xsm_ops {
     int (*resource_setup_gsi)(int gsi);
     int (*resource_setup_misc)(void);
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
     int (*page_offline)(uint32_t cmd);
 #endif
     int (*hypfs_op)(void);
@@ -244,7 +246,7 @@ static inline int xsm_domctl_scheduler_op(
     return alternative_call(xsm_ops.domctl_scheduler_op, d, cmd);
 }
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
 static inline int xsm_sysctl_scheduler_op(xsm_default_t def, int cmd)
 {
     return alternative_call(xsm_ops.sysctl_scheduler_op, cmd);
@@ -263,23 +265,17 @@ static inline int xsm_domctl(xsm_default_t def, struct domain *d,
     return alternative_call(xsm_ops.domctl, d, cmd, ssidref);
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 static inline int xsm_sysctl(xsm_default_t def, int cmd)
 {
-#ifdef CONFIG_SYSCTL
     return alternative_call(xsm_ops.sysctl, cmd);
-#else
-    return -EOPNOTSUPP;
-#endif
 }
 
 static inline int xsm_readconsole(xsm_default_t def, uint32_t clear)
 {
-#ifdef CONFIG_SYSCTL
     return alternative_call(xsm_ops.readconsole, clear);
-#else
-    return -EOPNOTSUPP;
-#endif
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static inline int xsm_evtchn_unbound(
     xsm_default_t def, struct domain *d1, struct evtchn *chn, domid_t id2)
@@ -593,14 +589,12 @@ static inline int xsm_resource_setup_misc(xsm_default_t def)
     return alternative_call(xsm_ops.resource_setup_misc);
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 static inline int xsm_page_offline(xsm_default_t def, uint32_t cmd)
 {
-#ifdef CONFIG_SYSCTL
     return alternative_call(xsm_ops.page_offline, cmd);
-#else
-    return -EOPNOTSUPP;
-#endif
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static inline int xsm_hypfs_op(xsm_default_t def)
 {
diff --git a/xen/xsm/dummy.c b/xen/xsm/dummy.c
index b7b65a7122..dbe363f0de 100644
--- a/xen/xsm/dummy.c
+++ b/xen/xsm/dummy.c
@@ -19,12 +19,12 @@ static const struct xsm_ops __initconst_cf_clobber dummy_ops = {
     .domain_create                 = xsm_domain_create,
     .getdomaininfo                 = xsm_getdomaininfo,
     .domctl_scheduler_op           = xsm_domctl_scheduler_op,
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
     .sysctl_scheduler_op           = xsm_sysctl_scheduler_op,
 #endif
     .set_target                    = xsm_set_target,
     .domctl                        = xsm_domctl,
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
     .sysctl                        = xsm_sysctl,
     .readconsole                   = xsm_readconsole,
 #endif
@@ -97,7 +97,7 @@ static const struct xsm_ops __initconst_cf_clobber dummy_ops = {
     .resource_setup_gsi            = xsm_resource_setup_gsi,
     .resource_setup_misc           = xsm_resource_setup_misc,
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
     .page_offline                  = xsm_page_offline,
 #endif
     .hypfs_op                      = xsm_hypfs_op,
diff --git a/xen/xsm/flask/hooks.c b/xen/xsm/flask/hooks.c
index 89e790b774..d0fd057db5 100644
--- a/xen/xsm/flask/hooks.c
+++ b/xen/xsm/flask/hooks.c
@@ -626,7 +626,7 @@ static int cf_check flask_domctl_scheduler_op(struct domain *d, int op)
     }
 }
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
 static int cf_check flask_sysctl_scheduler_op(int op)
 {
     switch ( op )
@@ -641,7 +641,7 @@ static int cf_check flask_sysctl_scheduler_op(int op)
         return avc_unknown_permission("sysctl_scheduler_op", op);
     }
 }
-#endif /* CONFIG_SYSCTL */
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static int cf_check flask_set_target(struct domain *d, struct domain *t)
 {
@@ -858,7 +858,7 @@ static int cf_check flask_domctl(struct domain *d, unsigned int cmd,
     }
 }
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
 static int cf_check flask_sysctl(int cmd)
 {
     switch ( cmd )
@@ -946,7 +946,7 @@ static int cf_check flask_readconsole(uint32_t clear)
 
     return domain_has_xen(current->domain, perms);
 }
-#endif /* CONFIG_SYSCTL */
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static inline uint32_t resource_to_perm(uint8_t access)
 {
@@ -1203,12 +1203,12 @@ static int cf_check flask_resource_unplug_core(void)
     return avc_current_has_perm(SECINITSID_DOMXEN, SECCLASS_RESOURCE, RESOURCE__UNPLUG, NULL);
 }
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
 static int flask_resource_use_core(void)
 {
     return avc_current_has_perm(SECINITSID_DOMXEN, SECCLASS_RESOURCE, RESOURCE__USE, NULL);
 }
-#endif /* CONFIG_SYSCTL */
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static int cf_check flask_resource_plug_pci(uint32_t machine_bdf)
 {
@@ -1273,7 +1273,7 @@ static int cf_check flask_resource_setup_misc(void)
     return avc_current_has_perm(SECINITSID_XEN, SECCLASS_RESOURCE, RESOURCE__SETUP, NULL);
 }
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
 static inline int cf_check flask_page_offline(uint32_t cmd)
 {
     switch ( cmd )
@@ -1288,7 +1288,7 @@ static inline int cf_check flask_page_offline(uint32_t cmd)
         return avc_unknown_permission("page_offline", cmd);
     }
 }
-#endif /* CONFIG_SYSCTL */
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static inline int cf_check flask_hypfs_op(void)
 {
@@ -1884,12 +1884,12 @@ static const struct xsm_ops __initconst_cf_clobber flask_ops = {
     .domain_create = flask_domain_create,
     .getdomaininfo = flask_getdomaininfo,
     .domctl_scheduler_op = flask_domctl_scheduler_op,
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
     .sysctl_scheduler_op = flask_sysctl_scheduler_op,
 #endif
     .set_target = flask_set_target,
     .domctl = flask_domctl,
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
     .sysctl = flask_sysctl,
     .readconsole = flask_readconsole,
 #endif
@@ -1950,7 +1950,7 @@ static const struct xsm_ops __initconst_cf_clobber flask_ops = {
     .resource_setup_gsi = flask_resource_setup_gsi,
     .resource_setup_misc = flask_resource_setup_misc,
 
-#ifdef CONFIG_SYSCTL
+#ifdef CONFIG_MGMT_HYPERCALLS
     .page_offline = flask_page_offline,
 #endif
     .hypfs_op = flask_hypfs_op,
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, Andrew Cooper , "Anthony
 PERARD" , Michal Orzel ,
	"Jan Beulich" , Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Stefano
 Stabellini" 
Subject: [PATCH v4 06/24] xen/domctl: consolidate domain.c with MGMT_HYPERCALLS
Date: Fri, 21 Nov 2025 18:57:43 +0800
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The following functions, scattered in common/domain.c, and are only referenced
and responsible for domctl-op:
- domain_pause_by_systemcontroller
- domain_resume
- domain_set_node_affinity
So they shall be wrapped with CONFIG_MGMT_HYPERCALLS. Otherwise it will
become unreachable codes when MGMT_HYPERCALLS=n, and hence violating Misra
rule 2.1.
Move them together to avoid scattering #ifdef.

Signed-off-by: Penny Zheng 
---
v3 - v4:
- combine commit "xen/domctl: wrap domain_pause_by_systemcontroller() with MGMT_HYPERCALLS",
"xen/domctl: wrap domain_resume() with CONFIG_MGMT_HYPERCALLS", and
"xen/domctl: wrap domain_set_node_affinity() with CONFIG_MGMT_HYPERCALLS"
---
 xen/common/domain.c | 114 ++++++++++++++++++++++----------------------
 1 file changed, 58 insertions(+), 56 deletions(-)

diff --git a/xen/common/domain.c b/xen/common/domain.c
index 6935b7d5e8..c6b0f931dc 100644
--- a/xen/common/domain.c
+++ b/xen/common/domain.c
@@ -1115,35 +1115,6 @@ void __init setup_system_domains(void)
 #endif
 }
 
-int domain_set_node_affinity(struct domain *d, const nodemask_t *affinity)
-{
-    /* Being disjoint with the system is just wrong. */
-    if ( !nodes_intersects(*affinity, node_online_map) )
-        return -EINVAL;
-
-    spin_lock(&d->node_affinity_lock);
-
-    /*
-     * Being/becoming explicitly affine to all nodes is not particularly
-     * useful. Let's take it as the `reset node affinity` command.
-     */
-    if ( nodes_full(*affinity) )
-    {
-        d->auto_node_affinity = 1;
-        goto out;
-    }
-
-    d->auto_node_affinity = 0;
-    d->node_affinity = *affinity;
-
-out:
-    spin_unlock(&d->node_affinity_lock);
-
-    domain_update_node_affinity(d);
-
-    return 0;
-}
-
 /* rcu_read_lock(&domlist_read_lock) must be held. */
 static struct domain *domid_to_domain(domid_t dom)
 {
@@ -1361,33 +1332,6 @@ int domain_shutdown(struct domain *d, u8 reason)
     return 0;
 }
 
-void domain_resume(struct domain *d)
-{
-    struct vcpu *v;
-
-    /*
-     * Some code paths assume that shutdown status does not get reset under
-     * their feet (e.g., some assertions make this assumption).
-     */
-    domain_pause(d);
-
-    spin_lock(&d->shutdown_lock);
-
-    d->is_shutting_down = d->is_shut_down = 0;
-    d->shutdown_code = SHUTDOWN_CODE_INVALID;
-
-    for_each_vcpu ( d, v )
-    {
-        if ( v->paused_for_shutdown )
-            vcpu_unpause(v);
-        v->paused_for_shutdown = 0;
-    }
-
-    spin_unlock(&d->shutdown_lock);
-
-    domain_unpause(d);
-}
-
 int vcpu_start_shutdown_deferral(struct vcpu *v)
 {
     if ( v->defer_shutdown )
@@ -1616,10 +1560,68 @@ static int _domain_pause_by_systemcontroller(struct domain *d, bool sync)
     return 0;
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
+int domain_set_node_affinity(struct domain *d, const nodemask_t *affinity)
+{
+    /* Being disjoint with the system is just wrong. */
+    if ( !nodes_intersects(*affinity, node_online_map) )
+        return -EINVAL;
+
+    spin_lock(&d->node_affinity_lock);
+
+    /*
+     * Being/becoming explicitly affine to all nodes is not particularly
+     * useful. Let's take it as the `reset node affinity` command.
+     */
+    if ( nodes_full(*affinity) )
+    {
+        d->auto_node_affinity = 1;
+        goto out;
+    }
+
+    d->auto_node_affinity = 0;
+    d->node_affinity = *affinity;
+
+out:
+    spin_unlock(&d->node_affinity_lock);
+
+    domain_update_node_affinity(d);
+
+    return 0;
+}
+
+void domain_resume(struct domain *d)
+{
+    struct vcpu *v;
+
+    /*
+     * Some code paths assume that shutdown status does not get reset under
+     * their feet (e.g., some assertions make this assumption).
+     */
+    domain_pause(d);
+
+    spin_lock(&d->shutdown_lock);
+
+    d->is_shutting_down = d->is_shut_down = 0;
+    d->shutdown_code = SHUTDOWN_CODE_INVALID;
+
+    for_each_vcpu ( d, v )
+    {
+        if ( v->paused_for_shutdown )
+            vcpu_unpause(v);
+        v->paused_for_shutdown = 0;
+    }
+
+    spin_unlock(&d->shutdown_lock);
+
+    domain_unpause(d);
+}
+
 int domain_pause_by_systemcontroller(struct domain *d)
 {
     return _domain_pause_by_systemcontroller(d, true /* sync */);
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 int domain_pause_by_systemcontroller_nosync(struct domain *d)
 {
-- 
2.34.1



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From: Penny Zheng 
To: 
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	, Jan Beulich , Andrew Cooper
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	
Subject: [PATCH v4 07/24] xen/mem_sharing: make memory sharing depend on MGMT_HYPERCALLS
Date: Fri, 21 Nov 2025 18:57:44 +0800
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The enabling bit (d->arch.hvm.mem_sharing.enabled) for memory sharing could
only be enabled via domctl-op, so we shall make memory sharing feature
depend on MGMT_HYPERCALLS.

Signed-off-by: Penny Zheng 
---
v3 -> v4:
- new commit
---
 xen/arch/x86/hvm/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig
index 62dfb1b6f1..d540c0ebf3 100644
--- a/xen/arch/x86/hvm/Kconfig
+++ b/xen/arch/x86/hvm/Kconfig
@@ -81,5 +81,6 @@ config MEM_PAGING
 config MEM_SHARING
 	bool "Xen memory sharing support (UNSUPPORTED)" if UNSUPPORTED
 	depends on INTEL_VMX
+	depends on MGMT_HYPERCALLS
 
 endif
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, Stefano Stabellini , "Julien
 Grall" , Bertrand Marquis , "Michal
 Orzel" , Volodymyr Babchuk
	, Andrew Cooper ,
	Anthony PERARD , Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Timothy Pearson
	, Alistair Francis
	, Bob Eshleman , "Connor
 Davis" , Oleksii Kurochko 
Subject: [PATCH v4 08/24] xen/domctl: wrap domain_kill() with CONFIG_MGMT_HYPERCALLS
Date: Fri, 21 Nov 2025 18:57:45 +0800
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Function domain_kill() is responsible for killing domain and relinquish
domain-held resources. and it is only invoked under
XEN_DOMCTL_destroydomain-case. So it shall be wrapped with
CONFIG_MGMT_HYPERCALLS.
Tracking its calling chain, the following functions could also be wrapped with
CONFIG_MGMT_HYPERCALLS:
- domain_relinquish_resource
  - pci_release_device
  - paging_teardown
    - p2m_pod_empty_cache
  - relinquish_memory
  - pit_deinit
  - iommu_release_dt_devices
  - tee_relinquish_resources
    - ffa_relinquish_resources/optee_relinquish_resources
  - relinquish_p2m_mapping
  - p2m_clear_root_pages
Otherwise all these functions will become unreachable codes when
MGMT_HYPERCALLS=n, and hence violating Misra rule 2.1.
The reason why {arch_}domain_teardown() is not wrapped is that it is also used
on the failure path of domain_create(). And the exclusion of
paging_final_teardown() is blocked by domain_destroy(), which will be
triggered when d->refcnt equals zero.

Signed-off-by: Penny Zheng 
Reviewed-by: Stefano Stabellini 
---
v1 -> v2:
- adapt to changes of "unify DOMCTL to MGMT_HYPERCALLS"
- wrap XEN_DOMCTL_destroydomain-case transiently
---
v2 -> v3:
- add back stub wrapping in ppc/riscv
- address "violating Misra rule 2.1" in commit message
- remove transient wrapping around XEN_DOMCTL_destroydomain-case
---
v3 -> v4:
- remove diff in mem_sharing.c
- add description for some functions to aid review
---
 xen/arch/arm/domain.c                 | 3 +++
 xen/arch/arm/include/asm/tee/tee.h    | 2 ++
 xen/arch/arm/mmu/p2m.c                | 4 ++++
 xen/arch/arm/mpu/p2m.c                | 2 ++
 xen/arch/arm/tee/ffa.c                | 4 ++++
 xen/arch/arm/tee/optee.c              | 4 ++++
 xen/arch/arm/tee/tee.c                | 2 ++
 xen/arch/ppc/stubs.c                  | 2 ++
 xen/arch/riscv/stubs.c                | 2 ++
 xen/arch/x86/domain.c                 | 2 ++
 xen/arch/x86/emul-i8254.c             | 2 ++
 xen/arch/x86/mm/p2m-pod.c             | 2 ++
 xen/arch/x86/mm/p2m.c                 | 2 ++
 xen/arch/x86/mm/paging.c              | 2 ++
 xen/common/domain.c                   | 2 ++
 xen/drivers/passthrough/device_tree.c | 2 ++
 xen/drivers/passthrough/pci.c         | 2 ++
 17 files changed, 41 insertions(+)

diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
index ab78444335..e1fa76e1e8 100644
--- a/xen/arch/arm/domain.c
+++ b/xen/arch/arm/domain.c
@@ -988,6 +988,7 @@ int arch_vcpu_reset(struct vcpu *v)
     return 0;
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 static int relinquish_memory(struct domain *d, struct page_list_head *list)
 {
     struct page_info *page, *tmp;
@@ -1139,6 +1140,8 @@ int domain_relinquish_resources(struct domain *d)
 
 #undef PROGRESS
 
+#endif /* CONFIG_MGMT_HYPERCALLS */
+
 void arch_dump_domain_info(struct domain *d)
 {
     p2m_dump_info(d);
diff --git a/xen/arch/arm/include/asm/tee/tee.h b/xen/arch/arm/include/asm/tee/tee.h
index 15d664e28d..f4187c5dc3 100644
--- a/xen/arch/arm/include/asm/tee/tee.h
+++ b/xen/arch/arm/include/asm/tee/tee.h
@@ -40,12 +40,14 @@ struct tee_mediator_ops {
     int (*domain_teardown)(struct domain *d);
     void (*free_domain_ctx)(struct domain *d);
 
+#ifdef CONFIG_MGMT_HYPERCALLS
     /*
      * Called during domain destruction to relinquish resources used
      * by mediator itself. This function can return -ERESTART to indicate
      * that it does not finished work and should be called again.
      */
     int (*relinquish_resources)(struct domain *d);
+#endif
 
     /* Handle SMCCC call for current domain. */
     bool (*handle_call)(struct cpu_user_regs *regs);
diff --git a/xen/arch/arm/mmu/p2m.c b/xen/arch/arm/mmu/p2m.c
index 51abf3504f..30d6071e91 100644
--- a/xen/arch/arm/mmu/p2m.c
+++ b/xen/arch/arm/mmu/p2m.c
@@ -1243,6 +1243,7 @@ static void p2m_invalidate_table(struct p2m_domain *p2m, mfn_t mfn)
     p2m->need_flush = true;
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 /*
  * The domain will not be scheduled anymore, so in theory we should
  * not need to flush the TLBs. Do it for safety purpose.
@@ -1262,6 +1263,7 @@ void p2m_clear_root_pages(struct p2m_domain *p2m)
 
     p2m_write_unlock(p2m);
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 /*
  * Invalidate all entries in the root page-tables. This is
@@ -1556,6 +1558,7 @@ int p2m_init(struct domain *d)
     return 0;
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 /*
  * The function will go through the p2m and remove page reference when it
  * is required. The mapping will be removed from the p2m.
@@ -1626,6 +1629,7 @@ int relinquish_p2m_mapping(struct domain *d)
 
     return rc;
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 /*
  * Clean & invalidate RAM associated to the guest vCPU.
diff --git a/xen/arch/arm/mpu/p2m.c b/xen/arch/arm/mpu/p2m.c
index f7fb58ab6a..c44297a9e3 100644
--- a/xen/arch/arm/mpu/p2m.c
+++ b/xen/arch/arm/mpu/p2m.c
@@ -57,10 +57,12 @@ bool p2m_resolve_translation_fault(struct domain *d, gfn_t gfn)
 
 void p2m_flush_vm(struct vcpu *v) {}
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 int relinquish_p2m_mapping(struct domain *d)
 {
     return 0;
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 void p2m_domain_creation_finished(struct domain *d) {}
 
diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c
index 1d0239cf69..f9ba9b60bf 100644
--- a/xen/arch/arm/tee/ffa.c
+++ b/xen/arch/arm/tee/ffa.c
@@ -469,10 +469,12 @@ static void ffa_free_domain_ctx(struct domain *d)
     XFREE(d->arch.tee);
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 static int ffa_relinquish_resources(struct domain *d)
 {
     return 0;
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static void ffa_init_secondary(void)
 {
@@ -623,7 +625,9 @@ static const struct tee_mediator_ops ffa_ops =
     .domain_init = ffa_domain_init,
     .domain_teardown = ffa_domain_teardown,
     .free_domain_ctx = ffa_free_domain_ctx,
+#ifdef CONFIG_MGMT_HYPERCALLS
     .relinquish_resources = ffa_relinquish_resources,
+#endif
     .handle_call = ffa_handle_call,
 };
 
diff --git a/xen/arch/arm/tee/optee.c b/xen/arch/arm/tee/optee.c
index 5151bd90ed..1ed0fd231d 100644
--- a/xen/arch/arm/tee/optee.c
+++ b/xen/arch/arm/tee/optee.c
@@ -632,6 +632,7 @@ static void free_optee_shm_buf_pg_list(struct optee_domain *ctx,
                  cookie);
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 static int optee_relinquish_resources(struct domain *d)
 {
     struct arm_smccc_res resp;
@@ -693,6 +694,7 @@ static int optee_relinquish_resources(struct domain *d)
 
     return 0;
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 #define PAGELIST_ENTRIES_PER_PAGE                       \
     ((OPTEE_MSG_NONCONTIG_PAGE_SIZE / sizeof(u64)) - 1)
@@ -1727,7 +1729,9 @@ static const struct tee_mediator_ops optee_ops =
     .probe = optee_probe,
     .domain_init = optee_domain_init,
     .domain_teardown = optee_domain_teardown,
+#ifdef CONFIG_MGMT_HYPERCALLS
     .relinquish_resources = optee_relinquish_resources,
+#endif
     .handle_call = optee_handle_call,
 };
 
diff --git a/xen/arch/arm/tee/tee.c b/xen/arch/arm/tee/tee.c
index 8501443c8e..a8e160700f 100644
--- a/xen/arch/arm/tee/tee.c
+++ b/xen/arch/arm/tee/tee.c
@@ -65,6 +65,7 @@ int tee_domain_teardown(struct domain *d)
     return cur_mediator->ops->domain_teardown(d);
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 int tee_relinquish_resources(struct domain *d)
 {
     if ( !cur_mediator )
@@ -72,6 +73,7 @@ int tee_relinquish_resources(struct domain *d)
 
     return cur_mediator->ops->relinquish_resources(d);
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 uint16_t tee_get_type(void)
 {
diff --git a/xen/arch/ppc/stubs.c b/xen/arch/ppc/stubs.c
index 75ebcae5e2..e70e1a12cb 100644
--- a/xen/arch/ppc/stubs.c
+++ b/xen/arch/ppc/stubs.c
@@ -234,10 +234,12 @@ int arch_vcpu_reset(struct vcpu *v)
     BUG_ON("unimplemented");
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 int domain_relinquish_resources(struct domain *d)
 {
     BUG_ON("unimplemented");
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 void arch_dump_domain_info(struct domain *d)
 {
diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c
index 37b4346d3f..42bac26aa7 100644
--- a/xen/arch/riscv/stubs.c
+++ b/xen/arch/riscv/stubs.c
@@ -208,10 +208,12 @@ int arch_vcpu_reset(struct vcpu *v)
     BUG_ON("unimplemented");
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 int domain_relinquish_resources(struct domain *d)
 {
     BUG_ON("unimplemented");
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 void arch_dump_domain_info(struct domain *d)
 {
diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index 3a21e035f4..fff5cf7238 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -2305,6 +2305,7 @@ void sync_vcpu_execstate(struct vcpu *v)
            read_atomic(&v->dirty_cpu) != dirty_cpu);
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 static int relinquish_memory(
     struct domain *d, struct page_list_head *list, unsigned long type)
 {
@@ -2629,6 +2630,7 @@ int domain_relinquish_resources(struct domain *d)
 
     return 0;
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 void arch_dump_domain_info(struct domain *d)
 {
diff --git a/xen/arch/x86/emul-i8254.c b/xen/arch/x86/emul-i8254.c
index 144aa168a3..f106ab794c 100644
--- a/xen/arch/x86/emul-i8254.c
+++ b/xen/arch/x86/emul-i8254.c
@@ -651,6 +651,7 @@ void pit_init(struct domain *d)
     pit_reset(d);
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 void pit_deinit(struct domain *d)
 {
     PITState *pit = domain_vpit(d);
@@ -664,6 +665,7 @@ void pit_deinit(struct domain *d)
         destroy_periodic_time(&pit->pt0);
     }
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 /*
  * Local variables:
diff --git a/xen/arch/x86/mm/p2m-pod.c b/xen/arch/x86/mm/p2m-pod.c
index 05633fe2ac..4e915808f4 100644
--- a/xen/arch/x86/mm/p2m-pod.c
+++ b/xen/arch/x86/mm/p2m-pod.c
@@ -366,6 +366,7 @@ void p2m_pod_get_mem_target(const struct domain *d, xen_pod_target_t *target)
     pod_unlock(p2m);
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 int p2m_pod_empty_cache(struct domain *d)
 {
     struct p2m_domain *p2m = p2m_get_hostp2m(d);
@@ -409,6 +410,7 @@ int p2m_pod_empty_cache(struct domain *d)
     unlock_page_alloc(p2m);
     return p2m->pod.count ? -ERESTART : 0;
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 int
 p2m_pod_offline_or_broken_hit(struct page_info *p)
diff --git a/xen/arch/x86/mm/p2m.c b/xen/arch/x86/mm/p2m.c
index 2763f9a6be..a5db8e6d4a 100644
--- a/xen/arch/x86/mm/p2m.c
+++ b/xen/arch/x86/mm/p2m.c
@@ -2097,6 +2097,7 @@ int xenmem_add_to_physmap_one(
     return rc;
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 /*
  * Remove foreign mappings from the p2m, as that drops the page reference taken
  * when mapped.
@@ -2160,6 +2161,7 @@ int relinquish_p2m_mapping(struct domain *d)
 
     return rc;
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 void p2m_log_dirty_range(struct domain *d, unsigned long begin_pfn,
                          unsigned long nr, uint8_t *dirty_bitmap)
diff --git a/xen/arch/x86/mm/paging.c b/xen/arch/x86/mm/paging.c
index 65455a6867..116389d4e9 100644
--- a/xen/arch/x86/mm/paging.c
+++ b/xen/arch/x86/mm/paging.c
@@ -768,6 +768,7 @@ void paging_vcpu_teardown(struct vcpu *v)
         shadow_vcpu_teardown(v);
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 /* Call when destroying a domain */
 int paging_teardown(struct domain *d)
 {
@@ -794,6 +795,7 @@ int paging_teardown(struct domain *d)
 
     return rc;
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 /* Call once all of the references to the domain have gone away */
 void paging_final_teardown(struct domain *d)
diff --git a/xen/common/domain.c b/xen/common/domain.c
index c6b0f931dc..e8a5c30557 100644
--- a/xen/common/domain.c
+++ b/xen/common/domain.c
@@ -1211,6 +1211,7 @@ int rcu_lock_live_remote_domain_by_id(domid_t dom, struct domain **d)
     return 0;
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 int domain_kill(struct domain *d)
 {
     int rc = 0;
@@ -1261,6 +1262,7 @@ int domain_kill(struct domain *d)
 
     return rc;
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 
 void __domain_crash(struct domain *d)
diff --git a/xen/drivers/passthrough/device_tree.c b/xen/drivers/passthrough/device_tree.c
index f5850a2607..015ffa15d4 100644
--- a/xen/drivers/passthrough/device_tree.c
+++ b/xen/drivers/passthrough/device_tree.c
@@ -108,6 +108,7 @@ int iommu_dt_domain_init(struct domain *d)
     return 0;
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 int iommu_release_dt_devices(struct domain *d)
 {
     const struct domain_iommu *hd = dom_iommu(d);
@@ -136,6 +137,7 @@ int iommu_release_dt_devices(struct domain *d)
 
     return 0;
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static int iommu_dt_xlate(struct device *dev,
                           const struct dt_phandle_args *iommu_spec,
diff --git a/xen/drivers/passthrough/pci.c b/xen/drivers/passthrough/pci.c
index 52c22fa50c..422e45f5a6 100644
--- a/xen/drivers/passthrough/pci.c
+++ b/xen/drivers/passthrough/pci.c
@@ -946,6 +946,7 @@ static int deassign_device(struct domain *d, uint16_t seg, uint8_t bus,
     return ret;
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 int pci_release_devices(struct domain *d)
 {
     int combined_ret;
@@ -1004,6 +1005,7 @@ int pci_release_devices(struct domain *d)
 
     return combined_ret;
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 #define PCI_CLASS_BRIDGE_HOST    0x0600
 #define PCI_CLASS_BRIDGE_PCI     0x0604
-- 
2.34.1



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From: Penny Zheng 
To: , 
CC: , , Penny Zheng
	, Nathan Studer ,
	"Stewart Hildebrand" , Dario Faggioli ,
	"Juergen Gross" , George Dunlap , Meng
 Xu , "Daniel P. Smith" ,
	Stefano Stabellini 
Subject: [PATCH v4 10/24] xen/domctl: wrap sched_adjust() with CONFIG_MGMT_HYPERCALLS
Date: Fri, 21 Nov 2025 18:57:47 +0800
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Function sched_adjust() is responsible for XEN_DOMCTL_scheduler_op domctl-op,
so it could be wrapped with CONFIG_MGMT_HYPERCALLS.
Tracing its calling chain, the following functions shall be wrapped with
CONFIG_MGMT_HYPERCALLS too:
- sched_adjust_dom()
- scheduler-specific .adjust() callback
- xsm_sysctl_scheduler_op()
Otherwise all these functions will become unreachable when MGMT_HYPERCALLS=n,
and hence violating Misra rule 2.1.

Signed-off-by: Penny Zheng 
Reviewed-by: Stefano Stabellini 
Reviewed-by: Juergen Gross 
---
v1 -> v2:
- adapt to changes of "unify DOMCTL to MGMT_HYPERCALLS"
- wrap XEN_DOMCTL_scheduler_op-case transiently
---
v2 -> v3
- add missing wrapping in xsm/dummy.h
- move and get away with just a single #ifdef
- address "violating Misra rule 2.1" in commit message
- remove transient wrapping around XEN_DOMCTL_scheduler_op-case
---
 xen/common/sched/arinc653.c | 1 -
 xen/common/sched/core.c     | 2 --
 xen/common/sched/credit.c   | 4 +++-
 xen/common/sched/credit2.c  | 4 +++-
 xen/common/sched/private.h  | 8 ++++----
 xen/common/sched/rt.c       | 4 ++++
 xen/include/xsm/dummy.h     | 2 ++
 xen/include/xsm/xsm.h       | 4 ++--
 xen/xsm/dummy.c             | 2 +-
 xen/xsm/flask/hooks.c       | 4 ++--
 10 files changed, 21 insertions(+), 14 deletions(-)

diff --git a/xen/common/sched/arinc653.c b/xen/common/sched/arinc653.c
index 7d6c40d800..5a6f8c8642 100644
--- a/xen/common/sched/arinc653.c
+++ b/xen/common/sched/arinc653.c
@@ -735,7 +735,6 @@ static const struct scheduler sched_arinc653_def = {
 
     .switch_sched   = a653_switch_sched,
 
-    .adjust         = NULL,
 #ifdef CONFIG_MGMT_HYPERCALLS
     .adjust_global  = a653sched_adjust_global,
 #endif
diff --git a/xen/common/sched/core.c b/xen/common/sched/core.c
index 83e34e7c05..0943cb1e97 100644
--- a/xen/common/sched/core.c
+++ b/xen/common/sched/core.c
@@ -2072,7 +2072,6 @@ int scheduler_id(void)
 {
     return operations.sched_id;
 }
-#endif
 
 /* Adjust scheduling parameter for a given domain. */
 long sched_adjust(struct domain *d, struct xen_domctl_scheduler_op *op)
@@ -2109,7 +2108,6 @@ long sched_adjust(struct domain *d, struct xen_domctl_scheduler_op *op)
     return ret;
 }
 
-#ifdef CONFIG_MGMT_HYPERCALLS
 long sched_adjust_global(struct xen_sysctl_scheduler_op *op)
 {
     struct cpupool *pool;
diff --git a/xen/common/sched/credit.c b/xen/common/sched/credit.c
index 0cbec2a9c0..ed3241bec8 100644
--- a/xen/common/sched/credit.c
+++ b/xen/common/sched/credit.c
@@ -1183,6 +1183,7 @@ csched_unit_yield(const struct scheduler *ops, struct sched_unit *unit)
     set_bit(CSCHED_FLAG_UNIT_YIELD, &svc->flags);
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 static int cf_check
 csched_dom_cntl(
     const struct scheduler *ops,
@@ -1227,6 +1228,7 @@ csched_dom_cntl(
 
     return rc;
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static void cf_check
 csched_aff_cntl(const struct scheduler *ops, struct sched_unit *unit,
@@ -2288,9 +2290,9 @@ static const struct scheduler sched_credit_def = {
     .wake           = csched_unit_wake,
     .yield          = csched_unit_yield,
 
-    .adjust         = csched_dom_cntl,
     .adjust_affinity= csched_aff_cntl,
 #ifdef CONFIG_MGMT_HYPERCALLS
+    .adjust         = csched_dom_cntl,
     .adjust_global  = csched_sys_cntl,
 #endif
 
diff --git a/xen/common/sched/credit2.c b/xen/common/sched/credit2.c
index 307e63ebd8..b73dd3c548 100644
--- a/xen/common/sched/credit2.c
+++ b/xen/common/sched/credit2.c
@@ -2909,6 +2909,7 @@ static void cf_check csched2_unit_migrate(
         sched_set_res(unit, get_sched_res(new_cpu));
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 static int cf_check
 csched2_dom_cntl(
     const struct scheduler *ops,
@@ -3114,6 +3115,7 @@ csched2_dom_cntl(
 
     return rc;
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static void cf_check
 csched2_aff_cntl(const struct scheduler *ops, struct sched_unit *unit,
@@ -4246,9 +4248,9 @@ static const struct scheduler sched_credit2_def = {
     .wake           = csched2_unit_wake,
     .yield          = csched2_unit_yield,
 
-    .adjust         = csched2_dom_cntl,
     .adjust_affinity= csched2_aff_cntl,
 #ifdef CONFIG_MGMT_HYPERCALLS
+    .adjust         = csched2_dom_cntl,
     .adjust_global  = csched2_sys_cntl,
 #endif
 
diff --git a/xen/common/sched/private.h b/xen/common/sched/private.h
index b7ff67200b..3b35002c5d 100644
--- a/xen/common/sched/private.h
+++ b/xen/common/sched/private.h
@@ -349,14 +349,14 @@ struct scheduler {
     void         (*migrate)        (const struct scheduler *ops,
                                     struct sched_unit *unit,
                                     unsigned int new_cpu);
-    int          (*adjust)         (const struct scheduler *ops,
-                                    struct domain *d,
-                                    struct xen_domctl_scheduler_op *op);
     void         (*adjust_affinity)(const struct scheduler *ops,
                                     struct sched_unit *unit,
                                     const struct cpumask *hard,
                                     const struct cpumask *soft);
 #ifdef CONFIG_MGMT_HYPERCALLS
+    int          (*adjust)         (const struct scheduler *ops,
+                                    struct domain *d,
+                                    struct xen_domctl_scheduler_op *op);
     int          (*adjust_global)  (const struct scheduler *ops,
                                     struct xen_sysctl_scheduler_op *sc);
 #endif
@@ -506,13 +506,13 @@ static inline void sched_adjust_affinity(const struct scheduler *s,
         s->adjust_affinity(s, unit, hard, soft);
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 static inline int sched_adjust_dom(const struct scheduler *s, struct domain *d,
                                    struct xen_domctl_scheduler_op *op)
 {
     return s->adjust ? s->adjust(s, d, op) : 0;
 }
 
-#ifdef CONFIG_MGMT_HYPERCALLS
 static inline int sched_adjust_cpupool(const struct scheduler *s,
                                        struct xen_sysctl_scheduler_op *op)
 {
diff --git a/xen/common/sched/rt.c b/xen/common/sched/rt.c
index 7b1f64a779..a42040b259 100644
--- a/xen/common/sched/rt.c
+++ b/xen/common/sched/rt.c
@@ -1362,6 +1362,7 @@ out:
     unit_schedule_unlock_irq(lock, unit);
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 /*
  * set/get each unit info of each domain
  */
@@ -1471,6 +1472,7 @@ rt_dom_cntl(
 
     return rc;
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 /*
  * The replenishment timer handler picks units
@@ -1572,7 +1574,9 @@ static const struct scheduler sched_rtds_def = {
     .insert_unit    = rt_unit_insert,
     .remove_unit    = rt_unit_remove,
 
+#ifdef CONFIG_MGMT_HYPERCALLS
     .adjust         = rt_dom_cntl,
+#endif
 
     .pick_resource  = rt_res_pick,
     .do_schedule    = rt_schedule,
diff --git a/xen/include/xsm/dummy.h b/xen/include/xsm/dummy.h
index 9b1d31b6ec..5810a18087 100644
--- a/xen/include/xsm/dummy.h
+++ b/xen/include/xsm/dummy.h
@@ -141,12 +141,14 @@ static XSM_INLINE int cf_check xsm_getdomaininfo(
     return xsm_default_action(action, current->domain, d);
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 static XSM_INLINE int cf_check xsm_domctl_scheduler_op(
     XSM_DEFAULT_ARG struct domain *d, int cmd)
 {
     XSM_ASSERT_ACTION(XSM_HOOK);
     return xsm_default_action(action, current->domain, d);
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 #ifdef CONFIG_MGMT_HYPERCALLS
 static XSM_INLINE int cf_check xsm_sysctl_scheduler_op(XSM_DEFAULT_ARG int cmd)
diff --git a/xen/include/xsm/xsm.h b/xen/include/xsm/xsm.h
index 4c6e0dc0f9..9dd485646a 100644
--- a/xen/include/xsm/xsm.h
+++ b/xen/include/xsm/xsm.h
@@ -56,8 +56,8 @@ struct xsm_ops {
                                 struct xen_domctl_getdomaininfo *info);
     int (*domain_create)(struct domain *d, uint32_t ssidref);
     int (*getdomaininfo)(struct domain *d);
-    int (*domctl_scheduler_op)(struct domain *d, int op);
 #ifdef CONFIG_MGMT_HYPERCALLS
+    int (*domctl_scheduler_op)(struct domain *d, int op);
     int (*sysctl_scheduler_op)(int op);
 #endif
     int (*set_target)(struct domain *d, struct domain *e);
@@ -240,13 +240,13 @@ static inline int xsm_get_domain_state(xsm_default_t def, struct domain *d)
     return alternative_call(xsm_ops.get_domain_state, d);
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 static inline int xsm_domctl_scheduler_op(
     xsm_default_t def, struct domain *d, int cmd)
 {
     return alternative_call(xsm_ops.domctl_scheduler_op, d, cmd);
 }
 
-#ifdef CONFIG_MGMT_HYPERCALLS
 static inline int xsm_sysctl_scheduler_op(xsm_default_t def, int cmd)
 {
     return alternative_call(xsm_ops.sysctl_scheduler_op, cmd);
diff --git a/xen/xsm/dummy.c b/xen/xsm/dummy.c
index dbe363f0de..724b2a2653 100644
--- a/xen/xsm/dummy.c
+++ b/xen/xsm/dummy.c
@@ -18,8 +18,8 @@ static const struct xsm_ops __initconst_cf_clobber dummy_ops = {
     .security_domaininfo           = xsm_security_domaininfo,
     .domain_create                 = xsm_domain_create,
     .getdomaininfo                 = xsm_getdomaininfo,
-    .domctl_scheduler_op           = xsm_domctl_scheduler_op,
 #ifdef CONFIG_MGMT_HYPERCALLS
+    .domctl_scheduler_op           = xsm_domctl_scheduler_op,
     .sysctl_scheduler_op           = xsm_sysctl_scheduler_op,
 #endif
     .set_target                    = xsm_set_target,
diff --git a/xen/xsm/flask/hooks.c b/xen/xsm/flask/hooks.c
index d0fd057db5..839a4cf9e6 100644
--- a/xen/xsm/flask/hooks.c
+++ b/xen/xsm/flask/hooks.c
@@ -609,6 +609,7 @@ static int cf_check flask_getdomaininfo(struct domain *d)
     return current_has_perm(d, SECCLASS_DOMAIN, DOMAIN__GETDOMAININFO);
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 static int cf_check flask_domctl_scheduler_op(struct domain *d, int op)
 {
     switch ( op )
@@ -626,7 +627,6 @@ static int cf_check flask_domctl_scheduler_op(struct domain *d, int op)
     }
 }
 
-#ifdef CONFIG_MGMT_HYPERCALLS
 static int cf_check flask_sysctl_scheduler_op(int op)
 {
     switch ( op )
@@ -1883,8 +1883,8 @@ static const struct xsm_ops __initconst_cf_clobber flask_ops = {
     .security_domaininfo = flask_security_domaininfo,
     .domain_create = flask_domain_create,
     .getdomaininfo = flask_getdomaininfo,
-    .domctl_scheduler_op = flask_domctl_scheduler_op,
 #ifdef CONFIG_MGMT_HYPERCALLS
+    .domctl_scheduler_op = flask_domctl_scheduler_op,
     .sysctl_scheduler_op = flask_sysctl_scheduler_op,
 #endif
     .set_target = flask_set_target,
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, "Daniel P. Smith" 
Subject: [PATCH v4 11/24] xen/domctl: wrap xsm_irq_permission with CONFIG_MGMT_HYPERCALLS
Date: Fri, 21 Nov 2025 18:57:48 +0800
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Function xsm_irq_permission() is invoked only under
XEN_DOMCTL_irq_permission domctl-op, and shall be wrapped with
CONFIG_MGMT_HYPERCALLS. Otherwise it will become unreanchable when
MGMT_HYPERCALLS=n, and hence violating Misra rule 2.1.

Signed-off-by: Penny Zheng 
---
v1 -> v2:
- adapt to changes of "unify DOMCTL to MGMT_HYPERCALLS"
---
v2 -> v3
- add missing wrapping in xsm/dummy.h
- adapt to the commit of "remove redundant xsm_iomem_mapping()"
- address "violating Misra rule 2.1" in commit message
---
 xen/include/xsm/dummy.h | 2 ++
 xen/include/xsm/xsm.h   | 4 ++++
 xen/xsm/dummy.c         | 2 ++
 xen/xsm/flask/hooks.c   | 4 ++++
 4 files changed, 12 insertions(+)

diff --git a/xen/include/xsm/dummy.h b/xen/include/xsm/dummy.h
index 5810a18087..a5deb8a975 100644
--- a/xen/include/xsm/dummy.h
+++ b/xen/include/xsm/dummy.h
@@ -564,12 +564,14 @@ static XSM_INLINE int cf_check xsm_unmap_domain_irq(
     return xsm_default_action(action, current->domain, d);
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 static XSM_INLINE int cf_check xsm_irq_permission(
     XSM_DEFAULT_ARG struct domain *d, int pirq, uint8_t allow)
 {
     XSM_ASSERT_ACTION(XSM_HOOK);
     return xsm_default_action(action, current->domain, d);
 }
+#endif
 
 static XSM_INLINE int cf_check xsm_iomem_permission(
     XSM_DEFAULT_ARG struct domain *d, uint64_t s, uint64_t e, uint8_t allow)
diff --git a/xen/include/xsm/xsm.h b/xen/include/xsm/xsm.h
index 9dd485646a..ee43002fdb 100644
--- a/xen/include/xsm/xsm.h
+++ b/xen/include/xsm/xsm.h
@@ -115,7 +115,9 @@ struct xsm_ops {
     int (*unmap_domain_irq)(struct domain *d, int irq, const void *data);
     int (*bind_pt_irq)(struct domain *d, struct xen_domctl_bind_pt_irq *bind);
     int (*unbind_pt_irq)(struct domain *d, struct xen_domctl_bind_pt_irq *bind);
+#ifdef CONFIG_MGMT_HYPERCALLS
     int (*irq_permission)(struct domain *d, int pirq, uint8_t allow);
+#endif
     int (*iomem_permission)(struct domain *d, uint64_t s, uint64_t e,
                             uint8_t allow);
     int (*pci_config_permission)(struct domain *d, uint32_t machine_bdf,
@@ -499,11 +501,13 @@ static inline int xsm_unbind_pt_irq(
     return alternative_call(xsm_ops.unbind_pt_irq, d, bind);
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 static inline int xsm_irq_permission(
     xsm_default_t def, struct domain *d, int pirq, uint8_t allow)
 {
     return alternative_call(xsm_ops.irq_permission, d, pirq, allow);
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static inline int xsm_iomem_permission(
     xsm_default_t def, struct domain *d, uint64_t s, uint64_t e, uint8_t allow)
diff --git a/xen/xsm/dummy.c b/xen/xsm/dummy.c
index 724b2a2653..7cf00ce37e 100644
--- a/xen/xsm/dummy.c
+++ b/xen/xsm/dummy.c
@@ -73,7 +73,9 @@ static const struct xsm_ops __initconst_cf_clobber dummy_ops = {
     .unmap_domain_irq              = xsm_unmap_domain_irq,
     .bind_pt_irq                   = xsm_bind_pt_irq,
     .unbind_pt_irq                 = xsm_unbind_pt_irq,
+#ifdef CONFIG_MGMT_HYPERCALLS
     .irq_permission                = xsm_irq_permission,
+#endif
     .iomem_permission              = xsm_iomem_permission,
     .pci_config_permission         = xsm_pci_config_permission,
     .get_vnumainfo                 = xsm_get_vnumainfo,
diff --git a/xen/xsm/flask/hooks.c b/xen/xsm/flask/hooks.c
index 839a4cf9e6..ca07585450 100644
--- a/xen/xsm/flask/hooks.c
+++ b/xen/xsm/flask/hooks.c
@@ -1111,12 +1111,14 @@ static int cf_check flask_unbind_pt_irq(
     return current_has_perm(d, SECCLASS_RESOURCE, RESOURCE__REMOVE);
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 static int cf_check flask_irq_permission(
     struct domain *d, int pirq, uint8_t access)
 {
     /* the PIRQ number is not useful; real IRQ is checked during mapping */
     return current_has_perm(d, SECCLASS_RESOURCE, resource_to_perm(access));
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 struct iomem_has_perm_data {
     uint32_t ssid;
@@ -1938,7 +1940,9 @@ static const struct xsm_ops __initconst_cf_clobber flask_ops = {
     .unmap_domain_irq = flask_unmap_domain_irq,
     .bind_pt_irq = flask_bind_pt_irq,
     .unbind_pt_irq = flask_unbind_pt_irq,
+#ifdef CONFIG_MGMT_HYPERCALLS
     .irq_permission = flask_irq_permission,
+#endif
     .iomem_permission = flask_iomem_permission,
     .pci_config_permission = flask_pci_config_permission,
 
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, Jan Beulich , Andrew Cooper
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Anthony PERARD , "Michal
 Orzel" , Julien Grall , "Stefano
 Stabellini" 
Subject: [PATCH v4 24/24] xen: move MGMT_HYPERCALLS out of PV_SHIM_EXCLUSIVE
Date: Fri, 21 Nov 2025 18:58:01 +0800
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As we're aiming at moving away from PV_SHIM_EXCLUSIVE=y, we are
moving MGMT_HYPERCALLS out of it.

Signed-off-by: Penny Zheng 
---
v3 -> v4:
- new commit
---
 xen/arch/x86/Makefile             |  2 +-
 xen/arch/x86/hvm/Kconfig          |  1 -
 xen/arch/x86/include/asm/paging.h |  2 +-
 xen/common/Kconfig                |  1 -
 xen/common/Makefile               |  5 +----
 xen/include/hypercall-defs.c      | 10 ++--------
 xen/include/xen/domain.h          |  4 ----
 7 files changed, 5 insertions(+), 20 deletions(-)

diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
index 006a6e56d3..3aea179838 100644
--- a/xen/arch/x86/Makefile
+++ b/xen/arch/x86/Makefile
@@ -30,6 +30,7 @@ obj-bin-y += dmi_scan.init.o
 obj-y += domain.o
 obj-bin-y += dom0_build.init.o
 obj-y += domain_page.o
+obj-$(CONFIG_MGMT_HYPERCALLS) += domctl.o
 obj-y += e820.o
 obj-y += emul-i8254.o
 obj-y += extable.o
@@ -79,7 +80,6 @@ obj-$(CONFIG_VM_EVENT) += vm_event.o
 obj-y += xstate.o
 
 ifneq ($(CONFIG_PV_SHIM_EXCLUSIVE),y)
-obj-$(CONFIG_MGMT_HYPERCALLS) += domctl.o
 obj-y += platform_hypercall.o
 obj-$(CONFIG_COMPAT) += x86_64/platform_hypercall.o
 endif
diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig
index 52b22e5d17..3351afc5a1 100644
--- a/xen/arch/x86/hvm/Kconfig
+++ b/xen/arch/x86/hvm/Kconfig
@@ -1,6 +1,5 @@
 menuconfig HVM
 	bool "HVM support"
-	depends on !PV_SHIM_EXCLUSIVE
 	default !PV_SHIM
 	select COMPAT
 	select IOREQ_SERVER
diff --git a/xen/arch/x86/include/asm/paging.h b/xen/arch/x86/include/asm/paging.h
index ba5ba7324e..db3e5b8f31 100644
--- a/xen/arch/x86/include/asm/paging.h
+++ b/xen/arch/x86/include/asm/paging.h
@@ -55,7 +55,7 @@
 #define PG_translate   0
 #define PG_external    0
 #endif
-#if defined(CONFIG_PAGING) && !defined(CONFIG_PV_SHIM_EXCLUSIVE) && defined(CONFIG_MGMT_HYPERCALLS)
+#if defined(CONFIG_PAGING) && defined(CONFIG_MGMT_HYPERCALLS)
 /* Enable log dirty mode */
 #define PG_log_dirty   (XEN_DOMCTL_SHADOW_ENABLE_LOG_DIRTY << PG_mode_shift)
 #else
diff --git a/xen/common/Kconfig b/xen/common/Kconfig
index 5aecb88680..d396ac94ab 100644
--- a/xen/common/Kconfig
+++ b/xen/common/Kconfig
@@ -653,7 +653,6 @@ menu "Supported hypercall interfaces"
 
 config MGMT_HYPERCALLS
 	bool "Enable privileged hypercalls for system management"
-	depends on !PV_SHIM_EXCLUSIVE
 	help
 	  Management hypercalls provide the means for dom0 to manage the
 	  overall Xen system and other domains, including sysctl, domctl, etc.
diff --git a/xen/common/Makefile b/xen/common/Makefile
index e0afc89591..45c0bda000 100644
--- a/xen/common/Makefile
+++ b/xen/common/Makefile
@@ -11,6 +11,7 @@ obj-$(filter-out $(CONFIG_X86),$(CONFIG_ACPI)) += device.o
 obj-$(CONFIG_DEVICE_TREE_PARSE) += device-tree/
 obj-$(CONFIG_IOREQ_SERVER) += dm.o
 obj-y += domain.o
+obj-$(CONFIG_MGMT_HYPERCALLS) += domctl.o
 obj-y += domid.o
 obj-y += event_2l.o
 obj-y += event_channel.o
@@ -70,10 +71,6 @@ obj-bin-$(CONFIG_X86) += $(foreach n,decompress bunzip2 unxz unlzma lzo unlzo un
 
 obj-$(CONFIG_COMPAT) += $(addprefix compat/,domain.o memory.o multicall.o xlat.o)
 
-ifneq ($(CONFIG_PV_SHIM_EXCLUSIVE),y)
-obj-$(CONFIG_MGMT_HYPERCALLS) += domctl.o
-endif
-
 extra-y := symbols-dummy.o
 
 obj-$(CONFIG_COVERAGE) += coverage/
diff --git a/xen/include/hypercall-defs.c b/xen/include/hypercall-defs.c
index 5343fd7a6f..ae56383bf7 100644
--- a/xen/include/hypercall-defs.c
+++ b/xen/include/hypercall-defs.c
@@ -196,13 +196,11 @@ dm_op(domid_t domid, unsigned int nr_bufs, xen_dm_op_buf_t *bufs)
 #endif
 #ifdef CONFIG_MGMT_HYPERCALLS
 sysctl(xen_sysctl_t *u_sysctl)
-#if defined(CONFIG_X86) && defined(CONFIG_PAGING) && !defined(CONFIG_PV_SHIM_EXCLUSIVE)
+#if defined(CONFIG_X86) && defined(CONFIG_PAGING)
 paging_domctl_cont(xen_domctl_t *u_domctl)
 #endif
-#ifndef CONFIG_PV_SHIM_EXCLUSIVE
 domctl(xen_domctl_t *u_domctl)
 #endif
-#endif
 #ifndef CONFIG_PV_SHIM_EXCLUSIVE
 platform_op(xen_platform_op_t *u_xenpf_op)
 #endif
@@ -281,10 +279,8 @@ hvm_op                             do       do       do       do       do
 #endif
 #ifdef CONFIG_MGMT_HYPERCALLS
 sysctl                             do       do       do       do       do
-#ifndef CONFIG_PV_SHIM_EXCLUSIVE
 domctl                             do       do       do       do       do
 #endif
-#endif
 #ifdef CONFIG_KEXEC
 kexec_op                           compat   do       -        -        -
 #endif
@@ -300,10 +296,8 @@ dm_op                              compat   do       compat   do       do
 hypfs_op                           do       do       do       do       do
 #endif
 mca                                do       do       -        -        -
-#if defined(CONFIG_X86) && defined(CONFIG_PAGING) && !defined(CONFIG_PV_SHIM_EXCLUSIVE)
-#ifdef CONFIG_MGMT_HYPERCALLS
+#if defined(CONFIG_X86) && defined(CONFIG_PAGING) && defined(CONFIG_MGMT_HYPERCALLS)
 paging_domctl_cont                 do       do       do       do       -
 #endif
-#endif
 
 #endif /* !CPPCHECK */
diff --git a/xen/include/xen/domain.h b/xen/include/xen/domain.h
index aa86a9f460..6d8cb9690c 100644
--- a/xen/include/xen/domain.h
+++ b/xen/include/xen/domain.h
@@ -185,11 +185,7 @@ struct vnuma_info {
     struct xen_vmemrange *vmemrange;
 };
 
-#ifndef CONFIG_PV_SHIM_EXCLUSIVE
 void vnuma_destroy(struct vnuma_info *vnuma);
-#else
-static inline void vnuma_destroy(struct vnuma_info *vnuma) { ASSERT(!vnuma); }
-#endif
 
 #ifdef CONFIG_VMTRACE
 extern bool vmtrace_available;
-- 
2.34.1



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Subject: [PATCH v4 23/24] xen/domctl: wrap common/domctl.c with CONFIG_MGMT_HYPERCALLS
Date: Fri, 21 Nov 2025 18:58:00 +0800
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Wrap domctl hypercall def and domctl.o with CONFIG_MGMT_HYPERCALLS.
Make CONFIG_MGMT_HYPERCALLS optional and expand help message

Signed-off-by: Penny Zheng 
---
v1 -> v2:
- remove stub in common/domctl.c
- combine the original commit of "xen/domctl: provide stub for
 domctl_lock_{acquire,release}"
- adapt to changes of "unify DOMCTL to MGMT_HYPERCALLS"
---
v2 -> v3:
- add pitfall warnning in Kconfig help
---
v3 -> v4:
- refine help message
---
 xen/common/Kconfig           | 14 ++++++++++----
 xen/common/Makefile          |  2 +-
 xen/include/hypercall-defs.c |  6 ++++--
 3 files changed, 15 insertions(+), 7 deletions(-)

diff --git a/xen/common/Kconfig b/xen/common/Kconfig
index 973b8e26bd..5aecb88680 100644
--- a/xen/common/Kconfig
+++ b/xen/common/Kconfig
@@ -654,11 +654,17 @@ menu "Supported hypercall interfaces"
 config MGMT_HYPERCALLS
 	bool "Enable privileged hypercalls for system management"
 	depends on !PV_SHIM_EXCLUSIVE
-	def_bool y
 	help
-	  This option shall only be disabled on some dom0less systems, or
-	  PV shim on x86, to reduce Xen footprint via managing unnessary
-	  hypercalls, like sysctl, etc.
+	  Management hypercalls provide the means for dom0 to manage the
+	  overall Xen system and other domains, including sysctl, domctl, etc.
+	  In a dom0less or pv-shim build, they can be omitted to cut down
+	  on the Xen binary's size. However, this comes at the loss of
+	  significant runtime functionality.
+	  So be cautious to disable it, as admins will face missing a few basic
+	  hypercalls like listdomains, getdomaininfo, etc, hence leading to
+	  have an impact on device-passthrough and DM.
+
+	  Unless you know what you are doing, you should enable this.
 
 endmenu
 
diff --git a/xen/common/Makefile b/xen/common/Makefile
index 7c32fbd9f1..e0afc89591 100644
--- a/xen/common/Makefile
+++ b/xen/common/Makefile
@@ -71,7 +71,7 @@ obj-bin-$(CONFIG_X86) += $(foreach n,decompress bunzip2 unxz unlzma lzo unlzo un
 obj-$(CONFIG_COMPAT) += $(addprefix compat/,domain.o memory.o multicall.o xlat.o)
 
 ifneq ($(CONFIG_PV_SHIM_EXCLUSIVE),y)
-obj-y += domctl.o
+obj-$(CONFIG_MGMT_HYPERCALLS) += domctl.o
 endif
 
 extra-y := symbols-dummy.o
diff --git a/xen/include/hypercall-defs.c b/xen/include/hypercall-defs.c
index 38b21dccbd..5343fd7a6f 100644
--- a/xen/include/hypercall-defs.c
+++ b/xen/include/hypercall-defs.c
@@ -199,9 +199,11 @@ sysctl(xen_sysctl_t *u_sysctl)
 #if defined(CONFIG_X86) && defined(CONFIG_PAGING) && !defined(CONFIG_PV_SHIM_EXCLUSIVE)
 paging_domctl_cont(xen_domctl_t *u_domctl)
 #endif
-#endif
 #ifndef CONFIG_PV_SHIM_EXCLUSIVE
 domctl(xen_domctl_t *u_domctl)
+#endif
+#endif
+#ifndef CONFIG_PV_SHIM_EXCLUSIVE
 platform_op(xen_platform_op_t *u_xenpf_op)
 #endif
 #ifdef CONFIG_HVM
@@ -279,10 +281,10 @@ hvm_op                             do       do       do       do       do
 #endif
 #ifdef CONFIG_MGMT_HYPERCALLS
 sysctl                             do       do       do       do       do
-#endif
 #ifndef CONFIG_PV_SHIM_EXCLUSIVE
 domctl                             do       do       do       do       do
 #endif
+#endif
 #ifdef CONFIG_KEXEC
 kexec_op                           compat   do       -        -        -
 #endif
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, Stefano Stabellini , "Julien
 Grall" , Bertrand Marquis , "Michal
 Orzel" , Volodymyr Babchuk
	, Rahul Singh , "Daniel P.
 Smith" 
Subject: [PATCH v4 15/24] xen/domctl: wrap device-tree-subset iommu-related domctl op with CONFIG_MGMT_HYPERCALLS
Date: Fri, 21 Nov 2025 18:57:52 +0800
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Function iommu_do_dt_domctl() is the main entry for all device-tree-subset
iommu-related domctl-op, and shall be wrapped with CONFIG_MGMT_HYPERCALLS.
Tracking its calling chain, the following functions shall all be wrapped
with CONFIG_MGMT_HYPERCALLS:
- make PCI_PASSTHROUGH depend on MGMT_HYPERCALLS
- iommu_do_dt_domctl
  - xsm_assign_dtdevice
  - xsm_deassign_dtdevice
  - iommu_deassign_dt_device
    - arm_smmu_reassign_dev
      - arm_smmu_deassign_dev
        - arm_smmu_detach_dev
          - arm_smmu_domain_remove_master
    - ipmmu_reassign_device
      - ipmmu_deassign_device
        - ipmmu_detach_device
  - iommu_remove_dt_device
    - iommu_dt_device_is_assigned_locked
  - dt_find_node_by_gpath
Otherwise all the functions will become unreachable when MGMT_HYPERCALLS=n,
and hence violating Misra rule 2.1
Move codes closer to avoid scattering #ifdef

Signed-off-by: Penny Zheng 
---
v3 -> v4
- split into PCI related subset and DT subset
- Move codes closer to avoid scattering #ifdef
---
 xen/arch/arm/Kconfig                     |   2 +-
 xen/common/device-tree/device-tree.c     |   2 +
 xen/drivers/passthrough/arm/ipmmu-vmsa.c |  26 +++---
 xen/drivers/passthrough/arm/smmu-v3.c    |   4 +
 xen/drivers/passthrough/arm/smmu.c       |  55 ++++++------
 xen/drivers/passthrough/device_tree.c    | 108 ++++++++++++-----------
 xen/include/xsm/dummy.h                  |   6 +-
 xen/include/xsm/xsm.h                    |  12 +--
 xen/xsm/dummy.c                          |   6 +-
 xen/xsm/flask/hooks.c                    |  12 +--
 10 files changed, 126 insertions(+), 107 deletions(-)

diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
index cf6af68299..5a5d7810c8 100644
--- a/xen/arch/arm/Kconfig
+++ b/xen/arch/arm/Kconfig
@@ -270,7 +270,7 @@ source "arch/arm/firmware/Kconfig"
 
 config PCI_PASSTHROUGH
 	bool "PCI passthrough" if EXPERT
-	depends on ARM_64 && HAS_PASSTHROUGH
+	depends on ARM_64 && HAS_PASSTHROUGH && MGMT_HYPERCALLS
 	help
 	  This option enables PCI device passthrough
 
diff --git a/xen/common/device-tree/device-tree.c b/xen/common/device-tree/device-tree.c
index 0b5375f151..70bd8e7da5 100644
--- a/xen/common/device-tree/device-tree.c
+++ b/xen/common/device-tree/device-tree.c
@@ -371,6 +371,7 @@ struct dt_device_node *dt_find_node_by_path_from(struct dt_device_node *from,
     return np;
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 int dt_find_node_by_gpath(XEN_GUEST_HANDLE(char) u_path, uint32_t u_plen,
                           struct dt_device_node **node)
 {
@@ -386,6 +387,7 @@ int dt_find_node_by_gpath(XEN_GUEST_HANDLE(char) u_path, uint32_t u_plen,
 
     return (*node == NULL) ? -ESRCH : 0;
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 struct dt_device_node *dt_find_node_by_alias(const char *alias)
 {
diff --git a/xen/drivers/passthrough/arm/ipmmu-vmsa.c b/xen/drivers/passthrough/arm/ipmmu-vmsa.c
index ea9fa9ddf3..b1fc14bc32 100644
--- a/xen/drivers/passthrough/arm/ipmmu-vmsa.c
+++ b/xen/drivers/passthrough/arm/ipmmu-vmsa.c
@@ -739,16 +739,6 @@ static int ipmmu_attach_device(struct ipmmu_vmsa_domain *domain,
     return 0;
 }
 
-static void ipmmu_detach_device(struct ipmmu_vmsa_domain *domain,
-                                struct device *dev)
-{
-    struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
-    unsigned int i;
-
-    for ( i = 0; i < fwspec->num_ids; ++i )
-        ipmmu_utlb_disable(domain, fwspec->ids[i]);
-}
-
 static int ipmmu_init_platform_device(struct device *dev,
                                       const struct dt_phandle_args *args)
 {
@@ -1138,7 +1128,9 @@ static void ipmmu_free_root_domain(struct ipmmu_vmsa_domain *domain)
     xfree(domain);
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 static int ipmmu_deassign_device(struct domain *d, struct device *dev);
+#endif
 
 static int ipmmu_assign_device(struct domain *d, u8 devfn, struct device *dev,
                                uint32_t flag)
@@ -1254,6 +1246,17 @@ out:
     return ret;
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
+static void ipmmu_detach_device(struct ipmmu_vmsa_domain *domain,
+                                struct device *dev)
+{
+    struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
+    unsigned int i;
+
+    for ( i = 0; i < fwspec->num_ids; ++i )
+        ipmmu_utlb_disable(domain, fwspec->ids[i]);
+}
+
 static int ipmmu_deassign_device(struct domain *d, struct device *dev)
 {
     struct ipmmu_vmsa_xen_domain *xen_domain = dom_iommu(d)->arch.priv;
@@ -1309,6 +1312,7 @@ static int ipmmu_reassign_device(struct domain *s, struct domain *t,
 
     return 0;
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static int ipmmu_dt_xlate(struct device *dev,
                           const struct dt_phandle_args *spec)
@@ -1487,7 +1491,9 @@ static const struct iommu_ops ipmmu_iommu_ops =
     .teardown        = ipmmu_iommu_domain_teardown,
     .iotlb_flush     = ipmmu_iotlb_flush,
     .assign_device   = ipmmu_assign_device,
+#ifdef CONFIG_MGMT_HYPERCALLS
     .reassign_device = ipmmu_reassign_device,
+#endif
     .map_page        = arm_iommu_map_page,
     .unmap_page      = arm_iommu_unmap_page,
     .dt_xlate        = ipmmu_dt_xlate,
diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passthrough/arm/smmu-v3.c
index bf153227db..22def57b03 100644
--- a/xen/drivers/passthrough/arm/smmu-v3.c
+++ b/xen/drivers/passthrough/arm/smmu-v3.c
@@ -2759,6 +2759,7 @@ out:
 	return ret;
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 static int arm_smmu_deassign_dev(struct domain *d, uint8_t devfn, struct device *dev)
 {
 	struct iommu_domain *io_domain = arm_smmu_get_domain(d, dev);
@@ -2826,6 +2827,7 @@ static int arm_smmu_reassign_dev(struct domain *s, struct domain *t,
 
 	return 0;
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static int arm_smmu_iommu_xen_domain_init(struct domain *d)
 {
@@ -2862,7 +2864,9 @@ static const struct iommu_ops arm_smmu_iommu_ops = {
 	.teardown		= arm_smmu_iommu_xen_domain_teardown,
 	.iotlb_flush		= arm_smmu_iotlb_flush,
 	.assign_device		= arm_smmu_assign_dev,
+#ifdef CONFIG_MGMT_HYPERCALLS
 	.reassign_device	= arm_smmu_reassign_dev,
+#endif
 	.map_page		= arm_iommu_map_page,
 	.unmap_page		= arm_iommu_unmap_page,
 	.dt_xlate		= arm_smmu_dt_xlate,
diff --git a/xen/drivers/passthrough/arm/smmu.c b/xen/drivers/passthrough/arm/smmu.c
index 22d306d0cb..a75ec08633 100644
--- a/xen/drivers/passthrough/arm/smmu.c
+++ b/xen/drivers/passthrough/arm/smmu.c
@@ -894,8 +894,10 @@ static int register_smmu_master(struct arm_smmu_device *smmu,
 /* Forward declaration */
 static int arm_smmu_assign_dev(struct domain *d, u8 devfn,
 			       struct device *dev, u32 flag);
+#ifdef CONFIG_MGMT_HYPERCALLS
 static int arm_smmu_deassign_dev(struct domain *d, uint8_t devfn,
 				 struct device *dev);
+#endif
 
 /*
  * The driver which supports generic IOMMU DT bindings must have this
@@ -1699,21 +1701,6 @@ static int arm_smmu_domain_add_master(struct arm_smmu_domain *smmu_domain,
 	return 0;
 }
 
-static void arm_smmu_domain_remove_master(
-				const struct arm_smmu_domain *smmu_domain,
-				struct arm_smmu_master_cfg *cfg)
-{
-	uint32_t i, idx;
-	struct arm_smmu_device *smmu = smmu_domain->smmu;
-	struct arm_smmu_s2cr *s2cr = smmu->s2crs;
-	const struct iommu_fwspec *fwspec = arm_smmu_get_fwspec(cfg);
-
-	for_each_cfg_sme(cfg, i, idx, fwspec->num_ids) {
-		s2cr[idx] = s2cr_init_val;
-		arm_smmu_write_s2cr(smmu, idx);
-	}
-}
-
 static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
 {
 	int ret;
@@ -1761,16 +1748,6 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
 	return arm_smmu_domain_add_master(smmu_domain, cfg);
 }
 
-static void arm_smmu_detach_dev(struct iommu_domain *domain, struct device *dev)
-{
-	struct arm_smmu_domain *smmu_domain = domain->priv;
-	struct arm_smmu_master_cfg *cfg = find_smmu_master_cfg(dev);
-
-	if (cfg)
-		arm_smmu_domain_remove_master(smmu_domain, cfg);
-
-}
-
 #if 0 /*
        * Xen: The page table is shared with the processor, therefore
        * helpers to implement separate is not necessary.
@@ -2849,6 +2826,31 @@ out:
 	return ret;
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
+static void arm_smmu_domain_remove_master(
+                                const struct arm_smmu_domain *smmu_domain,
+                                struct arm_smmu_master_cfg *cfg)
+{
+        uint32_t i, idx;
+        struct arm_smmu_device *smmu = smmu_domain->smmu;
+        struct arm_smmu_s2cr *s2cr = smmu->s2crs;
+        const struct iommu_fwspec *fwspec = arm_smmu_get_fwspec(cfg);
+
+        for_each_cfg_sme(cfg, i, idx, fwspec->num_ids) {
+                s2cr[idx] = s2cr_init_val;
+                arm_smmu_write_s2cr(smmu, idx);
+        }
+}
+
+static void arm_smmu_detach_dev(struct iommu_domain *domain, struct device *dev)
+{
+        struct arm_smmu_domain *smmu_domain = domain->priv;
+        struct arm_smmu_master_cfg *cfg = find_smmu_master_cfg(dev);
+
+        if (cfg)
+                arm_smmu_domain_remove_master(smmu_domain, cfg);
+
+}
 static int arm_smmu_deassign_dev(struct domain *d, uint8_t devfn,
 				 struct device *dev)
 {
@@ -2918,6 +2920,7 @@ static int arm_smmu_reassign_dev(struct domain *s, struct domain *t,
 
 	return 0;
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static int arm_smmu_iommu_domain_init(struct domain *d)
 {
@@ -2956,7 +2959,9 @@ static const struct iommu_ops arm_smmu_iommu_ops = {
     .teardown = arm_smmu_iommu_domain_teardown,
     .iotlb_flush = arm_smmu_iotlb_flush,
     .assign_device = arm_smmu_assign_dev,
+#ifdef CONFIG_MGMT_HYPERCALLS
     .reassign_device = arm_smmu_reassign_dev,
+#endif
     .map_page = arm_iommu_map_page,
     .unmap_page = arm_iommu_unmap_page,
     .dt_xlate = arm_smmu_dt_xlate_generic,
diff --git a/xen/drivers/passthrough/device_tree.c b/xen/drivers/passthrough/device_tree.c
index 015ffa15d4..72c38355eb 100644
--- a/xen/drivers/passthrough/device_tree.c
+++ b/xen/drivers/passthrough/device_tree.c
@@ -59,6 +59,14 @@ fail:
     return rc;
 }
 
+int iommu_dt_domain_init(struct domain *d)
+{
+    INIT_LIST_HEAD(&dom_iommu(d)->dt_devices);
+
+    return 0;
+}
+
+#ifdef CONFIG_MGMT_HYPERCALLS
 int iommu_deassign_dt_device(struct domain *d, struct dt_device_node *dev)
 {
     const struct domain_iommu *hd = dom_iommu(d);
@@ -101,14 +109,6 @@ static bool iommu_dt_device_is_assigned_locked(const struct dt_device_node *dev)
     return assigned;
 }
 
-int iommu_dt_domain_init(struct domain *d)
-{
-    INIT_LIST_HEAD(&dom_iommu(d)->dt_devices);
-
-    return 0;
-}
-
-#ifdef CONFIG_MGMT_HYPERCALLS
 int iommu_release_dt_devices(struct domain *d)
 {
     const struct domain_iommu *hd = dom_iommu(d);
@@ -212,51 +212,6 @@ int iommu_add_dt_pci_sideband_ids(struct pci_dev *pdev)
 }
 #endif /* CONFIG_HAS_PCI */
 
-int iommu_remove_dt_device(struct dt_device_node *np)
-{
-    const struct iommu_ops *ops = iommu_get_ops();
-    struct device *dev = dt_to_dev(np);
-    int rc;
-
-    ASSERT(rw_is_locked(&dt_host_lock));
-
-    if ( !iommu_enabled )
-        return 1;
-
-    if ( !ops )
-        return -EOPNOTSUPP;
-
-    spin_lock(&dtdevs_lock);
-
-    if ( iommu_dt_device_is_assigned_locked(np) )
-    {
-        rc = -EBUSY;
-        goto fail;
-    }
-
-    if ( !ops->remove_device )
-    {
-        rc = -EOPNOTSUPP;
-        goto fail;
-    }
-
-    /*
-     * De-register the device from the IOMMU driver.
-     * The driver is responsible for removing is_protected flag.
-     */
-    rc = ops->remove_device(0, dev);
-
-    if ( !rc )
-    {
-        ASSERT(!dt_device_is_protected(np));
-        iommu_fwspec_free(dev);
-    }
-
- fail:
-    spin_unlock(&dtdevs_lock);
-    return rc;
-}
-
 int iommu_add_dt_device(struct dt_device_node *np)
 {
     const struct iommu_ops *ops = iommu_get_ops();
@@ -320,6 +275,52 @@ int iommu_add_dt_device(struct dt_device_node *np)
     return rc;
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
+int iommu_remove_dt_device(struct dt_device_node *np)
+{
+    const struct iommu_ops *ops = iommu_get_ops();
+    struct device *dev = dt_to_dev(np);
+    int rc;
+
+    ASSERT(rw_is_locked(&dt_host_lock));
+
+    if ( !iommu_enabled )
+        return 1;
+
+    if ( !ops )
+        return -EOPNOTSUPP;
+
+    spin_lock(&dtdevs_lock);
+
+    if ( iommu_dt_device_is_assigned_locked(np) )
+    {
+        rc = -EBUSY;
+        goto fail;
+    }
+
+    if ( !ops->remove_device )
+    {
+        rc = -EOPNOTSUPP;
+        goto fail;
+    }
+
+    /*
+     * De-register the device from the IOMMU driver.
+     * The driver is responsible for removing is_protected flag.
+     */
+    rc = ops->remove_device(0, dev);
+
+    if ( !rc )
+    {
+        ASSERT(!dt_device_is_protected(np));
+        iommu_fwspec_free(dev);
+    }
+
+ fail:
+    spin_unlock(&dtdevs_lock);
+    return rc;
+}
+
 int iommu_do_dt_domctl(struct xen_domctl *domctl, struct domain *d,
                        XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl)
 {
@@ -431,3 +432,4 @@ int iommu_do_dt_domctl(struct xen_domctl *domctl, struct domain *d,
 
     return ret;
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
diff --git a/xen/include/xsm/dummy.h b/xen/include/xsm/dummy.h
index 83972d36b7..fba0de9d4b 100644
--- a/xen/include/xsm/dummy.h
+++ b/xen/include/xsm/dummy.h
@@ -431,9 +431,8 @@ static XSM_INLINE int cf_check xsm_deassign_device(
 }
 
 #endif /* CONFIG_HAS_PCI */
-#endif /* HAS_PASSTHROUGH && MGMT_HYPERCALLS */
 
-#if defined(CONFIG_HAS_PASSTHROUGH) && defined(CONFIG_HAS_DEVICE_TREE_DISCOVERY)
+#ifdef CONFIG_HAS_DEVICE_TREE_DISCOVERY
 static XSM_INLINE int cf_check xsm_assign_dtdevice(
     XSM_DEFAULT_ARG struct domain *d, const char *dtpath)
 {
@@ -448,7 +447,8 @@ static XSM_INLINE int cf_check xsm_deassign_dtdevice(
     return xsm_default_action(action, current->domain, d);
 }
 
-#endif /* HAS_PASSTHROUGH && HAS_DEVICE_TREE_DISCOVERY */
+#endif /* CONFIG_HAS_DEVICE_TREE_DISCOVERY */
+#endif /* HAS_PASSTHROUGH && MGMT_HYPERCALLS */
 
 static XSM_INLINE int cf_check xsm_resource_plug_core(XSM_DEFAULT_VOID)
 {
diff --git a/xen/include/xsm/xsm.h b/xen/include/xsm/xsm.h
index f2e92645ef..3bef1ec8ad 100644
--- a/xen/include/xsm/xsm.h
+++ b/xen/include/xsm/xsm.h
@@ -129,12 +129,12 @@ struct xsm_ops {
     int (*assign_device)(struct domain *d, uint32_t machine_bdf);
     int (*deassign_device)(struct domain *d, uint32_t machine_bdf);
 #endif /* CONFIG_HAS_PCI */
-#endif /* HAS_PASSTHROUGH && MGMT_HYPERCALLS */
 
-#if defined(CONFIG_HAS_PASSTHROUGH) && defined(CONFIG_HAS_DEVICE_TREE_DISCOVERY)
+#ifdef CONFIG_HAS_DEVICE_TREE_DISCOVERY
     int (*assign_dtdevice)(struct domain *d, const char *dtpath);
     int (*deassign_dtdevice)(struct domain *d, const char *dtpath);
-#endif
+#endif /* CONFIG_HAS_DEVICE_TREE_DISCOVERY */
+#endif /* HAS_PASSTHROUGH && MGMT_HYPERCALLS */
 
     int (*resource_plug_core)(void);
     int (*resource_unplug_core)(void);
@@ -545,9 +545,8 @@ static inline int xsm_deassign_device(
     return alternative_call(xsm_ops.deassign_device, d, machine_bdf);
 }
 #endif /* CONFIG_HAS_PCI */
-#endif /* HAS_PASSTHROUGH && MGMT_HYPERCALLS */
 
-#if defined(CONFIG_HAS_PASSTHROUGH) && defined(CONFIG_HAS_DEVICE_TREE_DISCOVERY)
+#ifdef CONFIG_HAS_DEVICE_TREE_DISCOVERY
 static inline int xsm_assign_dtdevice(
     xsm_default_t def, struct domain *d, const char *dtpath)
 {
@@ -560,7 +559,8 @@ static inline int xsm_deassign_dtdevice(
     return alternative_call(xsm_ops.deassign_dtdevice, d, dtpath);
 }
 
-#endif /* HAS_PASSTHROUGH && HAS_DEVICE_TREE_DISCOVERY */
+#endif /* CONFIG_HAS_DEVICE_TREE_DISCOVERY */
+#endif /* HAS_PASSTHROUGH && MGMT_HYPERCALLS */
 
 static inline int xsm_resource_plug_pci(xsm_default_t def, uint32_t machine_bdf)
 {
diff --git a/xen/xsm/dummy.c b/xen/xsm/dummy.c
index 0026a0963b..f624e90992 100644
--- a/xen/xsm/dummy.c
+++ b/xen/xsm/dummy.c
@@ -86,12 +86,12 @@ static const struct xsm_ops __initconst_cf_clobber dummy_ops = {
     .assign_device                 = xsm_assign_device,
     .deassign_device               = xsm_deassign_device,
 #endif /* CONFIG_HAS_PCI */
-#endif /* HAS_PASSTHROUGH && MGMT_HYPERCALLS */
 
-#if defined(CONFIG_HAS_PASSTHROUGH) && defined(CONFIG_HAS_DEVICE_TREE_DISCOVERY)
+#ifdef CONFIG_HAS_DEVICE_TREE_DISCOVERY
     .assign_dtdevice               = xsm_assign_dtdevice,
     .deassign_dtdevice             = xsm_deassign_dtdevice,
-#endif
+#endif /* CONFIG_HAS_DEVICE_TREE_DISCOVERY */
+#endif /* HAS_PASSTHROUGH && MGMT_HYPERCALLS */
 
     .resource_plug_core            = xsm_resource_plug_core,
     .resource_unplug_core          = xsm_resource_unplug_core,
diff --git a/xen/xsm/flask/hooks.c b/xen/xsm/flask/hooks.c
index 805a9a528e..4e67bc214a 100644
--- a/xen/xsm/flask/hooks.c
+++ b/xen/xsm/flask/hooks.c
@@ -1461,9 +1461,8 @@ static int cf_check flask_deassign_device(
     return avc_current_has_perm(rsid, SECCLASS_RESOURCE, RESOURCE__REMOVE_DEVICE, NULL);
 }
 #endif /* CONFIG_HAS_PCI */
-#endif /* HAS_PASSTHROUGH && MGMT_HYPERCALLS */
 
-#if defined(CONFIG_HAS_PASSTHROUGH) && defined(CONFIG_HAS_DEVICE_TREE_DISCOVERY)
+#ifdef CONFIG_HAS_DEVICE_TREE_DISCOVERY
 static int flask_test_assign_dtdevice(const char *dtpath)
 {
     uint32_t rsid;
@@ -1524,7 +1523,8 @@ static int cf_check flask_deassign_dtdevice(
     return avc_current_has_perm(rsid, SECCLASS_RESOURCE, RESOURCE__REMOVE_DEVICE,
                                 NULL);
 }
-#endif /* HAS_PASSTHROUGH && HAS_DEVICE_TREE_DISCOVERY */
+#endif /* CONFIG_HAS_DEVICE_TREE_DISCOVERY */
+#endif /* HAS_PASSTHROUGH && MGMT_HYPERCALLS */
 
 static int cf_check flask_platform_op(uint32_t op)
 {
@@ -1995,12 +1995,12 @@ static const struct xsm_ops __initconst_cf_clobber flask_ops = {
     .assign_device = flask_assign_device,
     .deassign_device = flask_deassign_device,
 #endif /* CONFIG_HAS_PCI */
-#endif /* HAS_PASSTHROUGH && MGMT_HYPERCALLS */
 
-#if defined(CONFIG_HAS_PASSTHROUGH) && defined(CONFIG_HAS_DEVICE_TREE_DISCOVERY)
+#ifdef CONFIG_HAS_DEVICE_TREE_DISCOVERY
     .assign_dtdevice = flask_assign_dtdevice,
     .deassign_dtdevice = flask_deassign_dtdevice,
-#endif
+#endif /* CONFIG_HAS_DEVICE_TREE_DISCOVERY */
+#endif /* HAS_PASSTHROUGH && MGMT_HYPERCALLS */
 
     .platform_op = flask_platform_op,
 #ifdef CONFIG_X86
-- 
2.34.1



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From: Penny Zheng 
To: 
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	, Stefano Stabellini , "Julien
 Grall" , Bertrand Marquis , "Michal
 Orzel" , Volodymyr Babchuk 
Subject: [PATCH v4 21/24] xen/arm: wrap arm-specific domctl-op with CONFIG_MGMT_HYPERCALLS
Date: Fri, 21 Nov 2025 18:57:58 +0800
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Function arch_do_domctl() is responsible for arch-specific domctl-op,
and shall be wrapped with CONFIG_MGMT_HYPERCALLS
Guard arm-specific domctl.o compilation with CONFIG_MGMT_HYPERCALLS. Otherwise
the whole file will become unreachable when MGMT_HYPERCALLS=n, and hence
violating Misra Rule 2.1.

Signed-off-by: Penny Zheng 
---
v3 -> v4:
- split arch-specific domctl-op into x86 and arm
---
 xen/arch/arm/Makefile       | 2 +-
 xen/arch/arm/arm32/Makefile | 2 +-
 xen/arch/arm/arm64/Makefile | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile
index 2aff1a1630..2f4593f5eb 100644
--- a/xen/arch/arm/Makefile
+++ b/xen/arch/arm/Makefile
@@ -20,7 +20,7 @@ obj-$(CONFIG_IOREQ_SERVER) += dm.o
 obj-$(CONFIG_DOM0LESS_BOOT) += dom0less-build.init.o
 obj-y += domain.o
 obj-y += domain_build.init.o
-obj-y += domctl.o
+obj-$(CONFIG_MGMT_HYPERCALLS) += domctl.o
 obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
 obj-y += efi/
 obj-y += gic.o
diff --git a/xen/arch/arm/arm32/Makefile b/xen/arch/arm/arm32/Makefile
index 531168f58a..f8cbf14211 100644
--- a/xen/arch/arm/arm32/Makefile
+++ b/xen/arch/arm/arm32/Makefile
@@ -4,7 +4,7 @@ obj-$(CONFIG_MPU) += mpu/
 
 obj-y += cache.o
 obj-$(CONFIG_EARLY_PRINTK) += debug.o
-obj-y += domctl.o
+obj-$(CONFIG_MGMT_HYPERCALLS) += domctl.o
 obj-y += domain.o
 obj-y += entry.o
 obj-y += head.o
diff --git a/xen/arch/arm/arm64/Makefile b/xen/arch/arm/arm64/Makefile
index 6491c5350b..6b77a15abe 100644
--- a/xen/arch/arm/arm64/Makefile
+++ b/xen/arch/arm/arm64/Makefile
@@ -6,7 +6,7 @@ obj-y += cache.o
 obj-y += cpufeature.o
 obj-$(CONFIG_HARDEN_BRANCH_PREDICTOR) += bpi.o
 obj-$(CONFIG_EARLY_PRINTK) += debug.o
-obj-y += domctl.o
+obj-$(CONFIG_MGMT_HYPERCALLS) += domctl.o
 obj-y += domain.o
 obj-y += entry.o
 obj-y += head.o
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, Jan Beulich , Andrew Cooper
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Subject: [PATCH v4 19/24] xen/domctl: wrap hvm_save{,load} with CONFIG_MGMT_HYPERCALLS
Date: Fri, 21 Nov 2025 18:57:56 +0800
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The following functions have been referenced in places which is either guarded
with CONFIG_MGMT_HYPERCALLS or CONFIG_MEM_SHARING:
- arch_hvm_save
- arch_hvm_check
- arch_hvm_load
- hvm_save_size
- hvm_save
- hvm_load
While CONFIG_MEM_SHARING is also dependent on CONFIG_MGMT_HYPERCALLS.
So they shall be wrapped under MGMT_HYPERCALLS, otherwise they will become
unreachable codes when MGMT_HYPERCALLS=n, and hence violating Misra rule 2.1.
We move arch_hvm_save(), arch_hvm_check(), arch_hvm_load() and hvm_save_size()
nearer to the left functions, to avoid scattered #ifdef-wrapping.

Signed-off-by: Penny Zheng 
---
v3 -> v4
- new commit
---
 xen/arch/x86/hvm/save.c | 154 ++++++++++++++++++++--------------------
 1 file changed, 78 insertions(+), 76 deletions(-)

diff --git a/xen/arch/x86/hvm/save.c b/xen/arch/x86/hvm/save.c
index 8ab6405706..5e99dd5998 100644
--- a/xen/arch/x86/hvm/save.c
+++ b/xen/arch/x86/hvm/save.c
@@ -15,62 +15,6 @@
 
 #include 
 
-static void arch_hvm_save(struct domain *d, struct hvm_save_header *hdr)
-{
-    uint32_t eax, ebx, ecx, edx;
-
-    /* Save some CPUID bits */
-    cpuid(1, &eax, &ebx, &ecx, &edx);
-    hdr->cpuid = eax;
-
-    /* Save guest's preferred TSC. */
-    hdr->gtsc_khz = d->arch.tsc_khz;
-
-    /* Time when saving started */
-    d->arch.hvm.sync_tsc = rdtsc();
-}
-
-static int arch_hvm_check(const struct domain *d,
-                          const struct hvm_save_header *hdr)
-{
-    uint32_t eax, ebx, ecx, edx;
-
-    if ( hdr->magic != HVM_FILE_MAGIC )
-    {
-        printk(XENLOG_G_ERR "HVM%d restore: bad magic number %#"PRIx32"\n",
-               d->domain_id, hdr->magic);
-        return -EINVAL;
-    }
-
-    if ( hdr->version != HVM_FILE_VERSION )
-    {
-        printk(XENLOG_G_ERR "HVM%d restore: unsupported version %u\n",
-               d->domain_id, hdr->version);
-        return -EINVAL;
-    }
-
-    cpuid(1, &eax, &ebx, &ecx, &edx);
-    /* CPUs ought to match but with feature-masking they might not */
-    if ( (hdr->cpuid & ~0x0fUL) != (eax & ~0x0fUL) )
-        printk(XENLOG_G_INFO "HVM%d restore: VM saved on one CPU "
-               "(%#"PRIx32") and restored on another (%#"PRIx32").\n",
-               d->domain_id, hdr->cpuid, eax);
-
-    return 0;
-}
-
-static void arch_hvm_load(struct domain *d, const struct hvm_save_header *hdr)
-{
-    /* Restore guest's preferred TSC frequency. */
-    if ( hdr->gtsc_khz )
-        d->arch.tsc_khz = hdr->gtsc_khz;
-    if ( d->arch.vtsc )
-        hvm_set_rdtsc_exiting(d, 1);
-
-    /* Time when restore started  */
-    d->arch.hvm.sync_tsc = rdtsc();
-}
-
 /* List of handlers for various HVM save and restore types */
 static struct {
     hvm_save_handler save;
@@ -101,26 +45,6 @@ void __init hvm_register_savevm(uint16_t typecode,
     hvm_sr_handlers[typecode].kind = kind;
 }
 
-size_t hvm_save_size(struct domain *d)
-{
-    struct vcpu *v;
-    size_t sz;
-    int i;
-
-    /* Basic overhead for header and footer */
-    sz = (2 * sizeof (struct hvm_save_descriptor)) + HVM_SAVE_LENGTH(HEADER);
-
-    /* Plus space for each thing we will be saving */
-    for ( i = 0; i <= HVM_SAVE_CODE_MAX; i++ )
-        if ( hvm_sr_handlers[i].kind == HVMSR_PER_VCPU )
-            for_each_vcpu(d, v)
-                sz += hvm_sr_handlers[i].size;
-        else
-            sz += hvm_sr_handlers[i].size;
-
-    return sz;
-}
-
 /*
  * Extract a single instance of a save record, by marshalling all records of
  * that type and copying out the one we need.
@@ -196,6 +120,83 @@ int hvm_save_one(struct domain *d, unsigned int typecode, unsigned int instance,
     return rv;
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
+static void arch_hvm_save(struct domain *d, struct hvm_save_header *hdr)
+{
+    uint32_t eax, ebx, ecx, edx;
+
+    /* Save some CPUID bits */
+    cpuid(1, &eax, &ebx, &ecx, &edx);
+    hdr->cpuid = eax;
+
+    /* Save guest's preferred TSC. */
+    hdr->gtsc_khz = d->arch.tsc_khz;
+
+    /* Time when saving started */
+    d->arch.hvm.sync_tsc = rdtsc();
+}
+
+static int arch_hvm_check(const struct domain *d,
+                          const struct hvm_save_header *hdr)
+{
+    uint32_t eax, ebx, ecx, edx;
+
+    if ( hdr->magic != HVM_FILE_MAGIC )
+    {
+        printk(XENLOG_G_ERR "HVM%d restore: bad magic number %#"PRIx32"\n",
+               d->domain_id, hdr->magic);
+        return -EINVAL;
+    }
+
+    if ( hdr->version != HVM_FILE_VERSION )
+    {
+        printk(XENLOG_G_ERR "HVM%d restore: unsupported version %u\n",
+               d->domain_id, hdr->version);
+        return -EINVAL;
+    }
+
+    cpuid(1, &eax, &ebx, &ecx, &edx);
+    /* CPUs ought to match but with feature-masking they might not */
+    if ( (hdr->cpuid & ~0x0fUL) != (eax & ~0x0fUL) )
+        printk(XENLOG_G_INFO "HVM%d restore: VM saved on one CPU "
+               "(%#"PRIx32") and restored on another (%#"PRIx32").\n",
+               d->domain_id, hdr->cpuid, eax);
+
+    return 0;
+}
+
+static void arch_hvm_load(struct domain *d, const struct hvm_save_header *hdr)
+{
+    /* Restore guest's preferred TSC frequency. */
+    if ( hdr->gtsc_khz )
+        d->arch.tsc_khz = hdr->gtsc_khz;
+    if ( d->arch.vtsc )
+        hvm_set_rdtsc_exiting(d, 1);
+
+    /* Time when restore started  */
+    d->arch.hvm.sync_tsc = rdtsc();
+}
+
+size_t hvm_save_size(struct domain *d)
+{
+    struct vcpu *v;
+    size_t sz;
+    unsigned int i;
+
+    /* Basic overhead for header and footer */
+    sz = (2 * sizeof (struct hvm_save_descriptor)) + HVM_SAVE_LENGTH(HEADER);
+
+    /* Plus space for each thing we will be saving */
+    for ( i = 0; i <= HVM_SAVE_CODE_MAX; i++ )
+        if ( hvm_sr_handlers[i].kind == HVMSR_PER_VCPU )
+            for_each_vcpu(d, v)
+                sz += hvm_sr_handlers[i].size;
+        else
+            sz += hvm_sr_handlers[i].size;
+
+    return sz;
+}
+
 int hvm_save(struct domain *d, hvm_domain_context_t *h)
 {
     char *c;
@@ -390,6 +391,7 @@ int hvm_load(struct domain *d, bool real, hvm_domain_context_t *h)
 
     /* Not reached */
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 int _hvm_init_entry(struct hvm_domain_context *h, uint16_t tc, uint16_t inst,
                     uint32_t len)
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, "Daniel P. Smith" 
Subject: [PATCH v4 13/24] xen/domctl: wrap xsm_set_target() with CONFIG_MGMT_HYPERCALLS
Date: Fri, 21 Nov 2025 18:57:50 +0800
Message-ID: <20251121105801.1251262-14-Penny.Zheng@amd.com>
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Function xsm_set_target() is only invoked under XEN_DOMCTL_set_target
domctl-op, and shall be wrapped with CONFIG_MGMT_HYPERCALLS. Otherwise
it will become unreachable codes when MGMT_HYPERCALLS=n, and hence violating
Misra 2.1.

Signed-off-by: Penny Zheng 
---
v1 -> v2:
- adapt to changes of "unify DOMCTL to MGMT_HYPERCALLS"
---
v2 -> v3
- wrap the whole inline function xsm_set_target()
- add missing wrapping in xsm/dummy.h
- address "violating Misra rule 2.1" in commit message
---
 xen/include/xsm/dummy.h | 2 ++
 xen/include/xsm/xsm.h   | 4 +++-
 xen/xsm/dummy.c         | 2 +-
 xen/xsm/flask/hooks.c   | 4 ++--
 4 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/xen/include/xsm/dummy.h b/xen/include/xsm/dummy.h
index a5deb8a975..a598d74f1f 100644
--- a/xen/include/xsm/dummy.h
+++ b/xen/include/xsm/dummy.h
@@ -158,12 +158,14 @@ static XSM_INLINE int cf_check xsm_sysctl_scheduler_op(XSM_DEFAULT_ARG int cmd)
 }
 #endif /* CONFIG_MGMT_HYPERCALLS */
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 static XSM_INLINE int cf_check xsm_set_target(
     XSM_DEFAULT_ARG struct domain *d, struct domain *e)
 {
     XSM_ASSERT_ACTION(XSM_HOOK);
     return xsm_default_action(action, current->domain, NULL);
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static XSM_INLINE int cf_check xsm_domctl(
     XSM_DEFAULT_ARG struct domain *d, unsigned int cmd, uint32_t ssidref)
diff --git a/xen/include/xsm/xsm.h b/xen/include/xsm/xsm.h
index ee43002fdb..154a4b8a92 100644
--- a/xen/include/xsm/xsm.h
+++ b/xen/include/xsm/xsm.h
@@ -59,8 +59,8 @@ struct xsm_ops {
 #ifdef CONFIG_MGMT_HYPERCALLS
     int (*domctl_scheduler_op)(struct domain *d, int op);
     int (*sysctl_scheduler_op)(int op);
-#endif
     int (*set_target)(struct domain *d, struct domain *e);
+#endif
     int (*domctl)(struct domain *d, unsigned int cmd, uint32_t ssidref);
 #ifdef CONFIG_MGMT_HYPERCALLS
     int (*sysctl)(int cmd);
@@ -255,11 +255,13 @@ static inline int xsm_sysctl_scheduler_op(xsm_default_t def, int cmd)
 }
 #endif
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 static inline int xsm_set_target(
     xsm_default_t def, struct domain *d, struct domain *e)
 {
     return alternative_call(xsm_ops.set_target, d, e);
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static inline int xsm_domctl(xsm_default_t def, struct domain *d,
                              unsigned int cmd, uint32_t ssidref)
diff --git a/xen/xsm/dummy.c b/xen/xsm/dummy.c
index 7cf00ce37e..9774bb3bdb 100644
--- a/xen/xsm/dummy.c
+++ b/xen/xsm/dummy.c
@@ -21,8 +21,8 @@ static const struct xsm_ops __initconst_cf_clobber dummy_ops = {
 #ifdef CONFIG_MGMT_HYPERCALLS
     .domctl_scheduler_op           = xsm_domctl_scheduler_op,
     .sysctl_scheduler_op           = xsm_sysctl_scheduler_op,
-#endif
     .set_target                    = xsm_set_target,
+#endif
     .domctl                        = xsm_domctl,
 #ifdef CONFIG_MGMT_HYPERCALLS
     .sysctl                        = xsm_sysctl,
diff --git a/xen/xsm/flask/hooks.c b/xen/xsm/flask/hooks.c
index ca07585450..9b63c516e6 100644
--- a/xen/xsm/flask/hooks.c
+++ b/xen/xsm/flask/hooks.c
@@ -641,7 +641,6 @@ static int cf_check flask_sysctl_scheduler_op(int op)
         return avc_unknown_permission("sysctl_scheduler_op", op);
     }
 }
-#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static int cf_check flask_set_target(struct domain *d, struct domain *t)
 {
@@ -666,6 +665,7 @@ static int cf_check flask_set_target(struct domain *d, struct domain *t)
                                  &dsec->target_sid);
     return rc;
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static int cf_check flask_domctl(struct domain *d, unsigned int cmd,
                                  uint32_t ssidref)
@@ -1888,8 +1888,8 @@ static const struct xsm_ops __initconst_cf_clobber flask_ops = {
 #ifdef CONFIG_MGMT_HYPERCALLS
     .domctl_scheduler_op = flask_domctl_scheduler_op,
     .sysctl_scheduler_op = flask_sysctl_scheduler_op,
-#endif
     .set_target = flask_set_target,
+#endif
     .domctl = flask_domctl,
 #ifdef CONFIG_MGMT_HYPERCALLS
     .sysctl = flask_sysctl,
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v4 16/24] xen/domctl: wrap iommu-related domctl op with CONFIG_MGMT_HYPERCALLS
Date: Fri, 21 Nov 2025 18:57:53 +0800
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Function iommu_do_domctl() is the main entry for all iommu-related domctl-op,
and shall be wrapped with CONFIG_MGMT_HYPERCALLS.
Otherwise it will become unreachable when MGMT_HYPERCALLS=n, and hence
violating Misra rule 2.1

Signed-off-by: Penny Zheng 
---
v3 -> v4:
- new commit
---
Commit "xen/domctl: wrap pci-subset iommu-related domctl op with
CONFIG_MGMT_HYPERCALLS" and "xen/domctl: wrap device-tree-subset iommu-related
domctl op with CONFIG_MGMT_HYPERCALLS" are the prereq commit.
---
 xen/drivers/passthrough/iommu.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/xen/drivers/passthrough/iommu.c b/xen/drivers/passthrough/iommu.c
index c9425d6971..8812e38174 100644
--- a/xen/drivers/passthrough/iommu.c
+++ b/xen/drivers/passthrough/iommu.c
@@ -625,6 +625,7 @@ void iommu_resume(void)
         iommu_vcall(iommu_get_ops(), resume);
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 int iommu_do_domctl(
     struct xen_domctl *domctl, struct domain *d,
     XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl)
@@ -645,6 +646,7 @@ int iommu_do_domctl(
 
     return ret;
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */1
 
 void iommu_crash_shutdown(void)
 {
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, Jan Beulich , Andrew Cooper
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Stefano Stabellini 
Subject: [PATCH v4 18/24] xen/domctl: make CONFIG_X86_PSR depend on CONFIG_MGMT_HYPERCALLS
Date: Fri, 21 Nov 2025 18:57:55 +0800
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Users control/monitor Intel Platform Shared Resource (PSR) through
related domctl-op or sysctl-op, so CONFIG_X86_PSR can be put under
MGMT_HYPERCALLS. With this change, we could remove MGMT_HYPERCALLS-wrapping
in psr.c.

Signed-off-by: Penny Zheng 
Reviewed-by: Stefano Stabellini 
Acked-by: Jan Beulich 
---
v1 -> v2:
- adapt to changes of "unify DOMCTL to MGMT_HYPERCALLS"
---
 xen/arch/x86/Kconfig |  1 +
 xen/arch/x86/psr.c   | 18 ------------------
 2 files changed, 1 insertion(+), 18 deletions(-)

diff --git a/xen/arch/x86/Kconfig b/xen/arch/x86/Kconfig
index c808c989fc..8368c6ecf0 100644
--- a/xen/arch/x86/Kconfig
+++ b/xen/arch/x86/Kconfig
@@ -191,6 +191,7 @@ config TBOOT
 config X86_PSR
 	bool "Platform Shared Resource support" if EXPERT
 	default INTEL
+	depends on MGMT_HYPERCALLS
 	help
 	  Support of Platform Shared Resource technology, which is basis for
 	  monitoring and control of resources like cache and memory bandwidth.
diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c
index 80ce5804b4..4f2c2d0042 100644
--- a/xen/arch/x86/psr.c
+++ b/xen/arch/x86/psr.c
@@ -135,11 +135,9 @@ static const struct feat_props {
      */
     enum psr_type alt_type;
 
-#ifdef CONFIG_MGMT_HYPERCALLS
     /* get_feat_info is used to return feature HW info through sysctl. */
     bool (*get_feat_info)(const struct feat_node *feat,
                           uint32_t data[], unsigned int array_len);
-#endif
 
     /* write_msr is used to write out feature MSR register. */
     void (*write_msr)(unsigned int cos, uint32_t val, enum psr_type type);
@@ -422,7 +420,6 @@ static bool mba_init_feature(const struct cpuid_leaf *regs,
     return true;
 }
 
-#ifdef CONFIG_MGMT_HYPERCALLS
 static bool cf_check cat_get_feat_info(
     const struct feat_node *feat, uint32_t data[], unsigned int array_len)
 {
@@ -435,7 +432,6 @@ static bool cf_check cat_get_feat_info(
 
     return true;
 }
-#endif /* CONFIG_MGMT_HYPERCALLS */
 
 /* L3 CAT props */
 static void cf_check l3_cat_write_msr(
@@ -448,14 +444,11 @@ static const struct feat_props l3_cat_props = {
     .cos_num = 1,
     .type[0] = PSR_TYPE_L3_CBM,
     .alt_type = PSR_TYPE_UNKNOWN,
-#ifdef CONFIG_MGMT_HYPERCALLS
     .get_feat_info = cat_get_feat_info,
-#endif
     .write_msr = l3_cat_write_msr,
     .sanitize = cat_check_cbm,
 };
 
-#ifdef CONFIG_MGMT_HYPERCALLS
 /* L3 CDP props */
 static bool cf_check l3_cdp_get_feat_info(
     const struct feat_node *feat, uint32_t data[], uint32_t array_len)
@@ -467,7 +460,6 @@ static bool cf_check l3_cdp_get_feat_info(
 
     return true;
 }
-#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static void cf_check l3_cdp_write_msr(
     unsigned int cos, uint32_t val, enum psr_type type)
@@ -483,9 +475,7 @@ static const struct feat_props l3_cdp_props = {
     .type[0] = PSR_TYPE_L3_DATA,
     .type[1] = PSR_TYPE_L3_CODE,
     .alt_type = PSR_TYPE_L3_CBM,
-#ifdef CONFIG_MGMT_HYPERCALLS
     .get_feat_info = l3_cdp_get_feat_info,
-#endif
     .write_msr = l3_cdp_write_msr,
     .sanitize = cat_check_cbm,
 };
@@ -501,14 +491,11 @@ static const struct feat_props l2_cat_props = {
     .cos_num = 1,
     .type[0] = PSR_TYPE_L2_CBM,
     .alt_type = PSR_TYPE_UNKNOWN,
-#ifdef CONFIG_MGMT_HYPERCALLS
     .get_feat_info = cat_get_feat_info,
-#endif
     .write_msr = l2_cat_write_msr,
     .sanitize = cat_check_cbm,
 };
 
-#ifdef CONFIG_MGMT_HYPERCALLS
 /* MBA props */
 static bool cf_check mba_get_feat_info(
     const struct feat_node *feat, uint32_t data[], unsigned int array_len)
@@ -523,7 +510,6 @@ static bool cf_check mba_get_feat_info(
 
     return true;
 }
-#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static void cf_check mba_write_msr(
     unsigned int cos, uint32_t val, enum psr_type type)
@@ -561,9 +547,7 @@ static const struct feat_props mba_props = {
     .cos_num = 1,
     .type[0] = PSR_TYPE_MBA_THRTL,
     .alt_type = PSR_TYPE_UNKNOWN,
-#ifdef CONFIG_MGMT_HYPERCALLS
     .get_feat_info = mba_get_feat_info,
-#endif
     .write_msr = mba_write_msr,
     .sanitize = mba_sanitize_thrtl,
 };
@@ -826,7 +810,6 @@ static struct psr_socket_info *get_socket_info(unsigned int socket)
     return socket_info + socket;
 }
 
-#ifdef CONFIG_MGMT_HYPERCALLS
 int psr_get_info(unsigned int socket, enum psr_type type,
                  uint32_t data[], unsigned int array_len)
 {
@@ -858,7 +841,6 @@ int psr_get_info(unsigned int socket, enum psr_type type,
 
     return -EINVAL;
 }
-#endif /* CONFIG_MGMT_HYPERCALLS */
 
 int psr_get_val(struct domain *d, unsigned int socket,
                 uint32_t *val, enum psr_type type)
-- 
2.34.1



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From: Penny Zheng 
To: 
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Subject: [PATCH v4 17/24] xen/domctl: wrap arch_{get,set}_paging_mempool_size() with CONFIG_MGMT_HYPERCALLS
Date: Fri, 21 Nov 2025 18:57:54 +0800
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Arch-specific arch_{get,set}_paging_mempool_size() is responsible for
XEN_DOMCTL_{get,set}_paging_mempool_size domctl-op, and shall be wrapped
with CONFIG_MGMT_HYPERCALLS. Otherwise it will become unreachable codes when
MGMT_HYPERCALLS=n, and hence violating Misra 2.1.

Signed-off-by: Penny Zheng 
Acked-by: Jan Beulich  # x86
Reviewed-by: Stefano Stabellini 
---
v1 -> v2:
- adapt to changes of "unify DOMCTL to MGMT_HYPERCALLS"
- wrap XEN_DOMCTL_{get,set}_paging_mempool_size-case transiently
---
v2 -> v3
- address "violating Misra rule 2.1" in commit message
- remove transient wrapping around XEN_DOMCTL_{get,set}_paging_mempool_size-case
---
 xen/arch/arm/mmu/p2m.c   | 4 ++++
 xen/arch/x86/mm/paging.c | 2 ++
 2 files changed, 6 insertions(+)

diff --git a/xen/arch/arm/mmu/p2m.c b/xen/arch/arm/mmu/p2m.c
index 30d6071e91..4caa5844e4 100644
--- a/xen/arch/arm/mmu/p2m.c
+++ b/xen/arch/arm/mmu/p2m.c
@@ -58,12 +58,14 @@ static void p2m_free_page(struct domain *d, struct page_info *pg)
     }
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 /* Return the size of the pool, in bytes. */
 int arch_get_paging_mempool_size(struct domain *d, uint64_t *size)
 {
     *size = (uint64_t)ACCESS_ONCE(d->arch.paging.p2m_total_pages) << PAGE_SHIFT;
     return 0;
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 /*
  * Set the pool of pages to the required number of pages.
@@ -122,6 +124,7 @@ int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted)
     return 0;
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 int arch_set_paging_mempool_size(struct domain *d, uint64_t size)
 {
     unsigned long pages = size >> PAGE_SHIFT;
@@ -140,6 +143,7 @@ int arch_set_paging_mempool_size(struct domain *d, uint64_t size)
 
     return rc;
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 int p2m_teardown_allocation(struct domain *d)
 {
diff --git a/xen/arch/x86/mm/paging.c b/xen/arch/x86/mm/paging.c
index 116389d4e9..c6e3996093 100644
--- a/xen/arch/x86/mm/paging.c
+++ b/xen/arch/x86/mm/paging.c
@@ -949,6 +949,7 @@ int __init paging_set_allocation(struct domain *d, unsigned int pages,
 }
 #endif
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 int arch_get_paging_mempool_size(struct domain *d, uint64_t *size)
 {
     unsigned long pages;
@@ -991,6 +992,7 @@ int arch_set_paging_mempool_size(struct domain *d, uint64_t size)
 
     return preempted ? -ERESTART : rc;
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 /*
  * Local variables:
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, Stefano Stabellini , "Julien
 Grall" , Bertrand Marquis , "Michal
 Orzel" , Volodymyr Babchuk
	, Alistair Francis ,
	Bob Eshleman , Connor Davis ,
	"Oleksii Kurochko" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v4 12/24] xen/domctl: wrap arch-specific domain_set_time_offset() with CONFIG_MGMT_HYPERCALLS
Date: Fri, 21 Nov 2025 18:57:49 +0800
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Arch-specific domain_set_time_offset() is responisble for
XEN_DOMCTL_settimeoffset domctl-op, and shall be wrapped with
CONFIG_MGMT_HYPERCALLS. Otherwise it will become unreachable when
MGMT_HYPERCALLS=n, and hence violating Misra rule 2.1.

Signed-off-by: Penny Zheng 
Reviewed-by: Stefano Stabellini 
Acked-by: Jan Beulich  # x86
---
v1 -> v2:
- adapt to changes of "unify DOMCTL to MGMT_HYPERCALLS"
- wrap XEN_DOMCTL_settimeoffset-case transiently
---
v2 -> v3:
- add back stub wrapping for riscv
- address "violating Misra rule 2.1" in commit message
- remove transient wrapping around XEN_DOMCTL_settimeoffset-case
---
 xen/arch/arm/time.c    | 2 ++
 xen/arch/riscv/stubs.c | 2 ++
 xen/arch/x86/time.c    | 2 ++
 3 files changed, 6 insertions(+)

diff --git a/xen/arch/arm/time.c b/xen/arch/arm/time.c
index 3710eab109..a40b233f9d 100644
--- a/xen/arch/arm/time.c
+++ b/xen/arch/arm/time.c
@@ -378,12 +378,14 @@ void force_update_vcpu_system_time(struct vcpu *v)
     update_vcpu_system_time(v);
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 void domain_set_time_offset(struct domain *d, int64_t time_offset_seconds)
 {
     d->time_offset.seconds = time_offset_seconds;
     d->time_offset.set = true;
     /* XXX update guest visible wallclock time */
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static int cpu_time_callback(struct notifier_block *nfb,
                              unsigned long action,
diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c
index 42bac26aa7..b414a85177 100644
--- a/xen/arch/riscv/stubs.c
+++ b/xen/arch/riscv/stubs.c
@@ -31,10 +31,12 @@ void send_timer_event(struct vcpu *v)
     BUG_ON("unimplemented");
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 void domain_set_time_offset(struct domain *d, int64_t time_offset_seconds)
 {
     BUG_ON("unimplemented");
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 /* domctl.c */
 
diff --git a/xen/arch/x86/time.c b/xen/arch/x86/time.c
index ece9ae0b34..8ba2dd9395 100644
--- a/xen/arch/x86/time.c
+++ b/xen/arch/x86/time.c
@@ -1841,6 +1841,7 @@ static void update_domain_rtc(void)
     rcu_read_unlock(&domlist_read_lock);
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 void domain_set_time_offset(struct domain *d, int64_t time_offset_seconds)
 {
     d->time_offset.seconds = time_offset_seconds;
@@ -1849,6 +1850,7 @@ void domain_set_time_offset(struct domain *d, int64_t time_offset_seconds)
         rtc_update_clock(d);
     update_domain_wallclock_time(d);
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 int cpu_frequency_change(u64 freq)
 {
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, Jan Beulich , Andrew Cooper
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	
Subject: [PATCH v4 22/24] xen/domctl: domctl_lock synchronization only when MGMT_HYPERCALLS=y
Date: Fri, 21 Nov 2025 18:57:59 +0800
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Helper domctl_lock_{acquire,release} is domctl_lock, which HVM_PARAM_IDENT_PT
uses to ensure synchronization on potential domctl-op altering guest state.
So it is only needed when MGMT_HYPERCALLS=y.

Suggested-by: Jan Beulich 
Signed-off-by: Penny Zheng 
---
v3 -> v4:
- new commit
---
 xen/arch/x86/hvm/hvm.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index b03f7dfcf6..8afd0d9d7d 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -4268,7 +4268,7 @@ static int hvm_set_param(struct domain *d, uint32_t index, uint64_t value)
          * the domctl_lock.
          */
         rc = -ERESTART;
-        if ( !domctl_lock_acquire() )
+        if ( IS_ENABLED(CONFIG_MGMT_HYPERCALLS) && !domctl_lock_acquire() )
             break;
 
         rc = 0;
@@ -4278,7 +4278,8 @@ static int hvm_set_param(struct domain *d, uint32_t index, uint64_t value)
             paging_update_cr3(v, false);
         domain_unpause(d);
 
-        domctl_lock_release();
+        if ( IS_ENABLED(CONFIG_MGMT_HYPERCALLS) )
+            domctl_lock_release();
         break;
     case HVM_PARAM_DM_DOMAIN:
         /* The only value this should ever be set to is DOMID_SELF */
-- 
2.34.1



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Date: Fri, 21 Nov 2025 12:59:38 +0200
User-Agent: Mozilla Thunderbird
Subject: Re: [XEN][PATCH] common/libfdt: optimize usage
To: Jan Beulich 
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Andrew Cooper ,
 Anthony PERARD ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Alejandro Vallejo ,
 Jason Andryuk ,
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On 17.11.25 11:34, Jan Beulich wrote:
> On 17.11.2025 10:31, Jan Beulich wrote:
>> On 14.11.2025 19:01, Grygorii Strashko wrote:
>>> From: Grygorii Strashko 
>>>
>>> Now all libfdt features are built-it unconditionally, but...
>>>
>>> X86: The libfdt is used on x86 only to parse Hyperlaunch/dom0less Xen
>>> nodes, so full libfdt is not needed in this case and minimal, RO
>>> configuration can be used.
>>>
>>> ARM - situation is more complicated:
>>> 1) ARM reads Host DT (fdt.c RO)
>>> 2) ARM reads passthrough DT (RO)
>>> 3) ARM generates dom0/hwdom DT from Host DT (there is a mix of WIP and SW APIs)
>>> 4) ARM generates domU DT (there is a mix of WIP and SW APIs)
>>> 4) With EFI enabled - ARM needs RW API and fdt_empty_tree
>>> 5) With CONFIG_OVERLAY_DTB - ARM needs RW and fdt_overlay API
>>
>> This goes too far, imo.
> 
> The more that, unless OVERLAY_DTB=y, all code and data moves to .init.*. Is
> coverage in in .init.* really of as much concern as runtime code/data?

It is less priority, but still is. Any way it is unnecessary build units (build time) and
increased binary size.


Actually, I see interesting behavior - when build with CONFIG_CC_SPLIT_SECTIONS=y (CONFIG_LIVEPATCH=y)
the libfdt code is not moved in ".init"

0xa000027aa10 T fdt_ro_probe_

0xa00002c0000 T __init_begin
  

-- 
Best regards,
-grygorii



From xen-devel-bounces@lists.xenproject.org Fri Nov 21 11:01:44 2025
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Date: Fri, 21 Nov 2025 13:01:31 +0200
User-Agent: Mozilla Thunderbird
Subject: Re: [XEN][PATCH] common/libfdt: optimize usage
To: "xen-devel@lists.xenproject.org" 
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Andrew Cooper ,
 Anthony PERARD , Jan Beulich ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Alejandro Vallejo ,
 Jason Andryuk 
References: <20251114180130.346755-1-grygorii_strashko@epam.com>
Content-Language: en-US
From: Grygorii Strashko 
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Hi

On 14.11.25 20:01, Grygorii Strashko wrote:
> From: Grygorii Strashko 
> 
> Now all libfdt features are built-it unconditionally, but...
> 
> X86: The libfdt is used on x86 only to parse Hyperlaunch/dom0less Xen
> nodes, so full libfdt is not needed in this case and minimal, RO
> configuration can be used.
> 
> ARM - situation is more complicated:
> 1) ARM reads Host DT (fdt.c RO)
> 2) ARM reads passthrough DT (RO)
> 3) ARM generates dom0/hwdom DT from Host DT (there is a mix of WIP and SW APIs)
> 4) ARM generates domU DT (there is a mix of WIP and SW APIs)
> 4) With EFI enabled - ARM needs RW API and fdt_empty_tree
> 5) With CONFIG_OVERLAY_DTB - ARM needs RW and fdt_overlay API
> 
> Hence, add possibility for optimizing libfdt usage by introducing separate
> Kconfig options for each libfdt feature and select them where needed.
> 
> Following libfdt modules are not used after this change:
>   Makefile.libfdt
>   fdt_addresses.c
>   fdt_strerror.c
>   fdt_check.c
> 
> Signed-off-by: Grygorii Strashko 
> ---
> Not sure about using DOMAIN_BUILD_HELPERS for selecting
> LIBFDT features, as DOMAIN_BUILD_HELPERS doesn't exactly
> says that domain's DT will be generated when selected.
> 
>   xen/arch/arm/Kconfig       |  4 ++++
>   xen/common/Kconfig         |  4 ++++
>   xen/common/libfdt/Kconfig  | 14 ++++++++++++++
>   xen/common/libfdt/Makefile | 12 +++++++++---
>   4 files changed, 31 insertions(+), 3 deletions(-)
>   create mode 100644 xen/common/libfdt/Kconfig
> 

Before continue Kconfig related discussion...

I've been thinking what if we use libfdt as a library (.a)?
We'd get the same result as linker can do optimization basing
on obj granularity while linking with library (.a).

OK. I've started experimenting - obvious choice is to use "lib-y" and
build system will do the rest. But in this case we'll lose ".init" and
libfdt will be built-in.

I've tried to preserve exiting behavior when libfdt is moved in ".init", but,
honestly got lost a bit in Xen build system.

Below diff is what I've came up with - probably no exactly right.

Does it make sense?

diff --git a/xen/Makefile b/xen/Makefile
index a4d53526bd0b..3fb77ab19853 100644
--- a/xen/Makefile
+++ b/xen/Makefile
@@ -464,6 +464,7 @@ ALL_OBJS-y                += arch/$(SRCARCH)/built_in.o
  ALL_OBJS-$(CONFIG_CRYPTO) += crypto/built_in.o
  
  ALL_LIBS-y                := lib/lib.a
+ALL_LIBS-$(CONFIG_LIBFDT) += common/libfdt/libfdt.a
  
  include $(srctree)/arch/$(SRCARCH)/arch.mk
  
  $(obj-y) $(obj-bin-y) $(extra-y) $(lib-y): _c_flags += $(cov-cflags-y)

diff --git a/xen/common/libfdt/Makefile b/xen/common/libfdt/Makefile
index 6ce679f98f47..e315252c88eb 100644
--- a/xen/common/libfdt/Makefile
+++ b/xen/common/libfdt/Makefile
@@ -1,21 +1,28 @@
-include $(src)/Makefile.libfdt
  
  SECTIONS := text data $(SPECIAL_DATA_SECTIONS)
  
+obj-libfdt-y := fdt.o fdt_ro.o
+obj-libfdt-y += fdt_wip.o
+obj-libfdt-y += fdt_sw.o
+obj-libfdt-y += fdt_rw.o
+obj-libfdt-y += fdt_empty_tree.o
+obj-libfdt-y += fdt_overlay.o
+
  # For CONFIG_OVERLAY_DTB, libfdt functionalities will be needed during runtime.
  ifneq ($(CONFIG_OVERLAY_DTB),y)
  OBJCOPYFLAGS := $(foreach s,$(SECTIONS),--rename-section .$(s)=.init.$(s))
-nocov-y += libfdt.o
+nocov-y += $(obj-libfdt-y)
  endif
  
-obj-y += libfdt.o
-
  CFLAGS-y += -I$(srctree)/include/xen/libfdt/
  
-$(obj)/libfdt.o: $(obj)/libfdt-temp.o FORCE
-       $(call if_changed,objcopy)
+#lib-y += $(obj-libfdt-y)
  
-$(obj)/libfdt-temp.o: $(addprefix $(obj)/,$(LIBFDT_OBJS)) FORCE
-       $(call if_changed,ld)
+$(obj)/libfdt-temp.a: $(addprefix $(obj)/,$(obj-libfdt-y)) FORCE
+       $(call if_changed,ar)
+
+$(obj)/libfdt.a: $(obj)/libfdt-temp.a FORCE
+       $(call if_changed,objcopy)
  
-targets += libfdt-temp.o $(LIBFDT_OBJS)
+extra-y += libfdt.a $(obj-libfdt-y)
+targets += libfdt-temp.a $(obj-libfdt-y)

-- 
Best regards,
-grygorii



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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, Andrew Cooper , "Anthony
 PERARD" , Michal Orzel ,
	"Jan Beulich" , Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Stefano
 Stabellini" , "Daniel P. Smith"
	
Subject: [PATCH v4 20/24] xen/x86: wrap x86-specific domctl-op with CONFIG_MGMT_HYPERCALLS
Date: Fri, 21 Nov 2025 18:57:57 +0800
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Function arch_do_domctl() is responsible for arch-specific domctl-op,
and shall be wrapped with CONFIG_MGMT_HYPERCALLS
We focus on x86 implementation here only. Tracking its calling chain and the
following functions shall be wrapped with CONFIG_MGMT_HYPERCALLS too.
Otherwise they will all become unreachable when MGMT_HYPERCALLS=n, and hence
violating Misra Rule 2.1.
- hvm_acpi_power_button
- hvm_acpi_sleep_button
- hvm_debug_op
- make P2M_AUDIT depend on CONFIG_MGMT_HYPERCALLS
- make PG_log_dirty depend on CONFIG_MGMT_HYPERCALLS
- make cpuid.o/policy.o/msr.o depend on CONFIG_MGMT_HYPERCALLS
- make HAS_SOFT_RESET depend on CONFIG_MGMT_HYPERCALLS
- make VMTRACE depend on CONFIG_MGMT_HYPERCALLS
- paging_domctl_cont
We put the guardian in Makefile for the arch-specific domctl.o compilation.

Signed-off-by: Penny Zheng 
---
v1 -> v2:
- split out xsm parts
- adapt to changes of "unify DOMCTL to MGMT_HYPERCALLS"
- wrap default-case and arch_get_domain_info() transiently
---
v2 -> v3:
- add missing guardian in arm/Makefile
- cover RTIT_CTL{,STATUS}_MASK #define-s
- add missing guardian for .vmtrace_output_position
- guard the whole static inline function
- address "violating Misra rule 2.1" in commit message
- remove transient wrapping around default-case and arch_get_domain_info()
---
v3 -> v4:
- make HAS_SOFT_RESET depend on CONFIG_MGMT_HYPERCALLS
- make VMTRACE depend on CONFIG_MGMT_HYPERCALLS
- seperate depends on condition for future convenience
- split arch-specific domctl-op into x86 and arm
---
 xen/Kconfig.debug                 | 1 +
 xen/arch/x86/Kconfig              | 2 +-
 xen/arch/x86/Makefile             | 2 +-
 xen/arch/x86/hvm/Kconfig          | 1 +
 xen/arch/x86/hvm/hvm.c            | 2 ++
 xen/arch/x86/hvm/pmtimer.c        | 2 ++
 xen/arch/x86/include/asm/p2m.h    | 2 +-
 xen/arch/x86/include/asm/paging.h | 2 +-
 xen/include/hypercall-defs.c      | 4 +++-
 xen/lib/x86/Makefile              | 6 +++---
 10 files changed, 16 insertions(+), 8 deletions(-)

diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug
index a69615cd63..c078c6bf2e 100644
--- a/xen/Kconfig.debug
+++ b/xen/Kconfig.debug
@@ -15,6 +15,7 @@ if DEBUG || EXPERT
 
 config GDBSX
 	bool "Guest debugging with gdbsx"
+	depends on MGMT_HYPERCALLS
 	depends on X86
 	default y
 	help
diff --git a/xen/arch/x86/Kconfig b/xen/arch/x86/Kconfig
index 8368c6ecf0..d49681beed 100644
--- a/xen/arch/x86/Kconfig
+++ b/xen/arch/x86/Kconfig
@@ -29,7 +29,7 @@ config X86
 	select HAS_PCI_MSI
 	select HAS_PIRQ
 	select HAS_SCHED_GRANULARITY
-	imply HAS_SOFT_RESET
+	select HAS_SOFT_RESET if MGMT_HYPERCALLS
 	select HAS_UBSAN
 	select HAS_VMAP
 	select HAS_VPCI if HVM
diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
index d21fdd49df..006a6e56d3 100644
--- a/xen/arch/x86/Makefile
+++ b/xen/arch/x86/Makefile
@@ -79,7 +79,7 @@ obj-$(CONFIG_VM_EVENT) += vm_event.o
 obj-y += xstate.o
 
 ifneq ($(CONFIG_PV_SHIM_EXCLUSIVE),y)
-obj-y += domctl.o
+obj-$(CONFIG_MGMT_HYPERCALLS) += domctl.o
 obj-y += platform_hypercall.o
 obj-$(CONFIG_COMPAT) += x86_64/platform_hypercall.o
 endif
diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig
index d540c0ebf3..52b22e5d17 100644
--- a/xen/arch/x86/hvm/Kconfig
+++ b/xen/arch/x86/hvm/Kconfig
@@ -37,6 +37,7 @@ config INTEL_VMX
 config VMTRACE
 	bool "HW VM tracing support"
 	depends on INTEL_VMX
+	depends on MGMT_HYPERCALLS
 	default y
 	help
 	  Enables HW VM tracing support which allows to configure HW processor
diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index d03f563d76..b03f7dfcf6 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -5204,6 +5204,7 @@ long do_hvm_op(unsigned long op, XEN_GUEST_HANDLE_PARAM(void) arg)
     return rc;
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 int hvm_debug_op(struct vcpu *v, int32_t op)
 {
     int rc = 0;
@@ -5246,6 +5247,7 @@ int hvm_debug_op(struct vcpu *v, int32_t op)
 
     return rc;
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 #ifdef CONFIG_VM_EVENT
 void hvm_toggle_singlestep(struct vcpu *v)
diff --git a/xen/arch/x86/hvm/pmtimer.c b/xen/arch/x86/hvm/pmtimer.c
index 87a7a01c9f..f080f7561d 100644
--- a/xen/arch/x86/hvm/pmtimer.c
+++ b/xen/arch/x86/hvm/pmtimer.c
@@ -56,6 +56,7 @@ static void pmt_update_sci(PMTState *s)
         hvm_isa_irq_deassert(s->vcpu->domain, SCI_IRQ);
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 void hvm_acpi_power_button(struct domain *d)
 {
     PMTState *s = &d->arch.hvm.pl_time->vpmt;
@@ -81,6 +82,7 @@ void hvm_acpi_sleep_button(struct domain *d)
     pmt_update_sci(s);
     spin_unlock(&s->lock);
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 /* Set the correct value in the timer, accounting for time elapsed
  * since the last time we did that. */
diff --git a/xen/arch/x86/include/asm/p2m.h b/xen/arch/x86/include/asm/p2m.h
index 9016e88411..3574e2eecd 100644
--- a/xen/arch/x86/include/asm/p2m.h
+++ b/xen/arch/x86/include/asm/p2m.h
@@ -20,7 +20,7 @@
 #include     /* for pagetable_t */
 
 /* Debugging and auditing of the P2M code? */
-#if !defined(NDEBUG) && defined(CONFIG_HVM)
+#if !defined(NDEBUG) && defined(CONFIG_HVM) && defined(CONFIG_MGMT_HYPERCALLS)
 #define P2M_AUDIT     1
 #else
 #define P2M_AUDIT     0
diff --git a/xen/arch/x86/include/asm/paging.h b/xen/arch/x86/include/asm/paging.h
index 0c06b0a7a8..ba5ba7324e 100644
--- a/xen/arch/x86/include/asm/paging.h
+++ b/xen/arch/x86/include/asm/paging.h
@@ -55,7 +55,7 @@
 #define PG_translate   0
 #define PG_external    0
 #endif
-#if defined(CONFIG_PAGING) && !defined(CONFIG_PV_SHIM_EXCLUSIVE)
+#if defined(CONFIG_PAGING) && !defined(CONFIG_PV_SHIM_EXCLUSIVE) && defined(CONFIG_MGMT_HYPERCALLS)
 /* Enable log dirty mode */
 #define PG_log_dirty   (XEN_DOMCTL_SHADOW_ENABLE_LOG_DIRTY << PG_mode_shift)
 #else
diff --git a/xen/include/hypercall-defs.c b/xen/include/hypercall-defs.c
index 4840de805b..38b21dccbd 100644
--- a/xen/include/hypercall-defs.c
+++ b/xen/include/hypercall-defs.c
@@ -196,10 +196,10 @@ dm_op(domid_t domid, unsigned int nr_bufs, xen_dm_op_buf_t *bufs)
 #endif
 #ifdef CONFIG_MGMT_HYPERCALLS
 sysctl(xen_sysctl_t *u_sysctl)
-#endif
 #if defined(CONFIG_X86) && defined(CONFIG_PAGING) && !defined(CONFIG_PV_SHIM_EXCLUSIVE)
 paging_domctl_cont(xen_domctl_t *u_domctl)
 #endif
+#endif
 #ifndef CONFIG_PV_SHIM_EXCLUSIVE
 domctl(xen_domctl_t *u_domctl)
 platform_op(xen_platform_op_t *u_xenpf_op)
@@ -299,7 +299,9 @@ hypfs_op                           do       do       do       do       do
 #endif
 mca                                do       do       -        -        -
 #if defined(CONFIG_X86) && defined(CONFIG_PAGING) && !defined(CONFIG_PV_SHIM_EXCLUSIVE)
+#ifdef CONFIG_MGMT_HYPERCALLS
 paging_domctl_cont                 do       do       do       do       -
 #endif
+#endif
 
 #endif /* !CPPCHECK */
diff --git a/xen/lib/x86/Makefile b/xen/lib/x86/Makefile
index ac6d4369f3..124af43ea0 100644
--- a/xen/lib/x86/Makefile
+++ b/xen/lib/x86/Makefile
@@ -1,4 +1,4 @@
-obj-y += cpuid.o
+obj-$(CONFIG_MGMT_HYPERCALLS) += cpuid.o
 obj-y += cpuid-generic.o
-obj-y += msr.o
-obj-y += policy.o
+obj-$(CONFIG_MGMT_HYPERCALLS) += msr.o
+obj-$(CONFIG_MGMT_HYPERCALLS) += policy.o
-- 
2.34.1



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Subject: [PATCH v4 09/24] xen/domctl: wrap vcpu_affinity_domctl() with CONFIG_MGMT_HYPERCALLS
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Function vcpu_affinity_domctl() is responsible for
XEN_DOMCTL_{getvcpuaffinity,setvcpuaffinity} domctl-op, and shall be
wrapped with CONFIG_MGMT_HYPERCALLS. Otherwise it will become unreachable
codes when MGMT_HYPERCALLS=n, and hence violating Misra rule 2.1.
Tracking its calling chain, vcpuaffinity_params_invalid() also needs
wrapping too

Signed-off-by: Penny Zheng 
---
v1 -> v2:
- adapt to changes of "unify DOMCTL to MGMT_HYPERCALLS"
- wrap XEN_DOMCTL_{getvcpuaffinity,setvcpuaffinity}-case transiently
---
v2 -> v3:
- adapt to changes of "remove vcpu_set_soft_affinity()"
- address "violating Misra rule 2.1" in commit message
- remove transient wrapping around XEN_DOMCTL_{getvcpuaffinity,setvcpuaffinity}-case
---
v3 -> v4
- wrap vcpuaffinity_params_invalid()
---
 xen/common/sched/core.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/xen/common/sched/core.c b/xen/common/sched/core.c
index 88150432c3..83e34e7c05 100644
--- a/xen/common/sched/core.c
+++ b/xen/common/sched/core.c
@@ -1678,6 +1678,7 @@ int vcpu_temporary_affinity(struct vcpu *v, unsigned int cpu, uint8_t reason)
     return ret;
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 static inline
 int vcpuaffinity_params_invalid(const struct xen_domctl_vcpuaffinity *vcpuaff)
 {
@@ -1798,6 +1799,7 @@ int vcpu_affinity_domctl(struct domain *d, uint32_t cmd,
 
     return ret;
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 bool alloc_affinity_masks(struct affinity_masks *affinity)
 {
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , , Penny Zheng
	, Jan Beulich , Andrew Cooper
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Jason Andryuk , "Daniel P.
 Smith" 
Subject: [PATCH v4 14/24] xen/domctl: wrap pci-subset iommu-related domctl op with CONFIG_MGMT_HYPERCALLS
Date: Fri, 21 Nov 2025 18:57:51 +0800
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Function iommu_do_pci_domctl() is the main entry for pci-subset
iommu-related domctl-op, and shall be wrapped with CONFIG_MGMT_HYPERCALLS.
Tracking its calling chain, the following functions shall all be wrapped
with CONFIG_MGMT_HYPERCALLS:
- iommu_do_pci_domctl
  - iommu_get_device_group
    - xsm_get_device_group
    - iommu_ops.get_device_group_id
      - amd_iommu_group_id/intel_iommu_group_id
  - device_assigned
  - xsm_assign_device
  - assign_device
    - iommu_ops.assign_device
      - intel_iommu_assign_device/amd_iommu_assign_device
  - xsm_deassign_device
  - deassign_device
    - iommu_ops.reassign_device
      - reassign_device_ownership/reassign_device
Otherwise all the functions will become unreachable when MGMT_HYPERCALLS=n,
and hence violating Misra rule 2.1

Signed-off-by: Penny Zheng 
---
v1 -> v2:
- adapt to changes of "unify DOMCTL to MGMT_HYPERCALLS"
- wrap XEN_DOMCTL_assign_device{test_assign_device,deassign_device,
 get_device_group}-case transiently
---
v2 -> v3:
- make PCI_PASSTHROUGH(, then HAS_VPCI_GUEST_SUPPORT) depend on MGMT_HYPERCALLS
- add wrapping for iommu_remove_dt_device/iommu_dt_device_is_assigned_locked/
arm_smmu_detach_dev/arm_smmu_domain_remove_master
- fold commit
"xen/xsm: wrap xsm-iommu-related functions with CONFIG_MGMT_HYPERCALLS" in
- fix overly long #ifdef
- add missing wrapping in xsm/dummy.h
- address "violating Misra rule 2.1" in commit message
- remove transient wrapping of
XEN_DOMCTL_assign_device{test_assign_device,deassign_device,get_device_group}-case
---
v3 -> v4:
- move codes to wrap with a single #ifdef
- split into PCI related subset and DT subset
---
 xen/drivers/passthrough/amd/pci_amd_iommu.c | 20 ++++----
 xen/drivers/passthrough/pci.c               | 52 +++++++++++----------
 xen/drivers/passthrough/vtd/iommu.c         |  6 ++-
 xen/include/xsm/dummy.h                     |  6 ++-
 xen/include/xsm/xsm.h                       | 12 +++--
 xen/xsm/dummy.c                             |  6 ++-
 xen/xsm/flask/hooks.c                       | 12 +++--
 7 files changed, 68 insertions(+), 46 deletions(-)

diff --git a/xen/drivers/passthrough/amd/pci_amd_iommu.c b/xen/drivers/passthrough/amd/pci_amd_iommu.c
index 3a14770855..576b36af92 100644
--- a/xen/drivers/passthrough/amd/pci_amd_iommu.c
+++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c
@@ -461,6 +461,7 @@ static void amd_iommu_disable_domain_device(const struct domain *domain,
         spin_unlock_irqrestore(&iommu->lock, flags);
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 static int cf_check reassign_device(
     struct domain *source, struct domain *target, u8 devfn,
     struct pci_dev *pdev)
@@ -551,6 +552,14 @@ static int cf_check amd_iommu_assign_device(
     return rc;
 }
 
+static int cf_check amd_iommu_group_id(u16 seg, u8 bus, u8 devfn)
+{
+    unsigned int bdf = PCI_BDF(bus, devfn);
+
+    return (bdf < ivrs_bdf_entries) ? get_dma_requestor_id(seg, bdf) : bdf;
+}
+#endif /* CONFIG_MGMT_HYPERCALLS */
+
 static void cf_check amd_iommu_clear_root_pgtable(struct domain *d)
 {
     struct domain_iommu *hd = dom_iommu(d);
@@ -698,13 +707,6 @@ static int cf_check amd_iommu_remove_device(u8 devfn, struct pci_dev *pdev)
     return 0;
 }
 
-static int cf_check amd_iommu_group_id(u16 seg, u8 bus, u8 devfn)
-{
-    unsigned int bdf = PCI_BDF(bus, devfn);
-
-    return (bdf < ivrs_bdf_entries) ? get_dma_requestor_id(seg, bdf) : bdf;
-}
-
 #include 
 
 static void amd_dump_page_table_level(struct page_info *pg, int level,
@@ -772,14 +774,16 @@ static const struct iommu_ops __initconst_cf_clobber _iommu_ops = {
     .quarantine_init = amd_iommu_quarantine_init,
     .add_device = amd_iommu_add_device,
     .remove_device = amd_iommu_remove_device,
-    .assign_device  = amd_iommu_assign_device,
     .teardown = amd_iommu_domain_destroy,
     .clear_root_pgtable = amd_iommu_clear_root_pgtable,
     .map_page = amd_iommu_map_page,
     .unmap_page = amd_iommu_unmap_page,
     .iotlb_flush = amd_iommu_flush_iotlb_pages,
+#ifdef CONFIG_MGMT_HYPERCALLS
+    .assign_device  = amd_iommu_assign_device,
     .reassign_device = reassign_device,
     .get_device_group_id = amd_iommu_group_id,
+#endif
     .enable_x2apic = iov_enable_xt,
     .update_ire_from_apic = amd_iommu_ioapic_update_ire,
     .update_ire_from_msi = amd_iommu_msi_msg_update_ire,
diff --git a/xen/drivers/passthrough/pci.c b/xen/drivers/passthrough/pci.c
index 422e45f5a6..8ab229bfe7 100644
--- a/xen/drivers/passthrough/pci.c
+++ b/xen/drivers/passthrough/pci.c
@@ -878,6 +878,7 @@ int pci_remove_device(u16 seg, u8 bus, u8 devfn)
     return ret;
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 /* Caller should hold the pcidevs_lock */
 static int deassign_device(struct domain *d, uint16_t seg, uint8_t bus,
                            uint8_t devfn)
@@ -946,7 +947,6 @@ static int deassign_device(struct domain *d, uint16_t seg, uint8_t bus,
     return ret;
 }
 
-#ifdef CONFIG_MGMT_HYPERCALLS
 int pci_release_devices(struct domain *d)
 {
     int combined_ret;
@@ -1484,6 +1484,7 @@ static int iommu_remove_device(struct pci_dev *pdev)
     return iommu_call(hd->platform_ops, remove_device, devfn, pci_to_dev(pdev));
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 static int device_assigned(u16 seg, u8 bus, u8 devfn)
 {
     struct pci_dev *pdev;
@@ -1648,30 +1649,6 @@ static int iommu_get_device_group(
     return i;
 }
 
-void iommu_dev_iotlb_flush_timeout(struct domain *d, struct pci_dev *pdev)
-{
-    pcidevs_lock();
-
-    disable_ats_device(pdev);
-
-    ASSERT(pdev->domain);
-    if ( d != pdev->domain )
-    {
-        pcidevs_unlock();
-        return;
-    }
-
-    pdev->broken = true;
-
-    if ( !d->is_shutting_down && printk_ratelimit() )
-        printk(XENLOG_ERR "dom%d: ATS device %pp flush failed\n",
-               d->domain_id, &pdev->sbdf);
-    if ( !is_hardware_domain(d) )
-        domain_crash(d);
-
-    pcidevs_unlock();
-}
-
 int iommu_do_pci_domctl(
     struct xen_domctl *domctl, struct domain *d,
     XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl)
@@ -1805,6 +1782,31 @@ int iommu_do_pci_domctl(
 
     return ret;
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
+
+void iommu_dev_iotlb_flush_timeout(struct domain *d, struct pci_dev *pdev)
+{
+    pcidevs_lock();
+
+    disable_ats_device(pdev);
+
+    ASSERT(pdev->domain);
+    if ( d != pdev->domain )
+    {
+        pcidevs_unlock();
+        return;
+    }
+
+    pdev->broken = true;
+
+    if ( !d->is_shutting_down && printk_ratelimit() )
+        printk(XENLOG_ERR "dom%d: ATS device %pp flush failed\n",
+               d->domain_id, &pdev->sbdf);
+    if ( !is_hardware_domain(d) )
+        domain_crash(d);
+
+    pcidevs_unlock();
+}
 
 struct segment_iter {
     int (*handler)(struct pci_dev *pdev, void *arg);
diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c
index 90f36ac22b..ad2e657bca 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -2742,6 +2742,7 @@ static int __init cf_check vtd_setup(void)
     return ret;
 }
 
+#ifdef CONFIG_MGMT_HYPERCALLS
 static int cf_check reassign_device_ownership(
     struct domain *source,
     struct domain *target,
@@ -2937,6 +2938,7 @@ static int cf_check intel_iommu_group_id(u16 seg, u8 bus, u8 devfn)
 
     return PCI_BDF(bus, devfn);
 }
+#endif /* CONFIG_MGMT_HYPERCALLS */
 
 static int __must_check cf_check vtd_suspend(void)
 {
@@ -3245,14 +3247,16 @@ static const struct iommu_ops __initconst_cf_clobber vtd_ops = {
     .add_device = intel_iommu_add_device,
     .enable_device = intel_iommu_enable_device,
     .remove_device = intel_iommu_remove_device,
-    .assign_device  = intel_iommu_assign_device,
     .teardown = iommu_domain_teardown,
     .clear_root_pgtable = iommu_clear_root_pgtable,
     .map_page = intel_iommu_map_page,
     .unmap_page = intel_iommu_unmap_page,
     .lookup_page = intel_iommu_lookup_page,
+#ifdef CONFIG_MGMT_HYPERCALLS
+    .assign_device  = intel_iommu_assign_device,
     .reassign_device = reassign_device_ownership,
     .get_device_group_id = intel_iommu_group_id,
+#endif
     .enable_x2apic = intel_iommu_enable_eim,
     .disable_x2apic = intel_iommu_disable_eim,
     .update_ire_from_apic = io_apic_write_remap_rte,
diff --git a/xen/include/xsm/dummy.h b/xen/include/xsm/dummy.h
index a598d74f1f..83972d36b7 100644
--- a/xen/include/xsm/dummy.h
+++ b/xen/include/xsm/dummy.h
@@ -407,7 +407,8 @@ static XSM_INLINE int cf_check xsm_get_vnumainfo(
     return xsm_default_action(action, current->domain, d);
 }
 
-#if defined(CONFIG_HAS_PASSTHROUGH) && defined(CONFIG_HAS_PCI)
+#if defined(CONFIG_HAS_PASSTHROUGH) && defined(CONFIG_MGMT_HYPERCALLS)
+#ifdef CONFIG_HAS_PCI
 static XSM_INLINE int cf_check xsm_get_device_group(
     XSM_DEFAULT_ARG uint32_t machine_bdf)
 {
@@ -429,7 +430,8 @@ static XSM_INLINE int cf_check xsm_deassign_device(
     return xsm_default_action(action, current->domain, d);
 }
 
-#endif /* HAS_PASSTHROUGH && HAS_PCI */
+#endif /* CONFIG_HAS_PCI */
+#endif /* HAS_PASSTHROUGH && MGMT_HYPERCALLS */
 
 #if defined(CONFIG_HAS_PASSTHROUGH) && defined(CONFIG_HAS_DEVICE_TREE_DISCOVERY)
 static XSM_INLINE int cf_check xsm_assign_dtdevice(
diff --git a/xen/include/xsm/xsm.h b/xen/include/xsm/xsm.h
index 154a4b8a92..f2e92645ef 100644
--- a/xen/include/xsm/xsm.h
+++ b/xen/include/xsm/xsm.h
@@ -123,11 +123,13 @@ struct xsm_ops {
     int (*pci_config_permission)(struct domain *d, uint32_t machine_bdf,
                                  uint16_t start, uint16_t end, uint8_t access);
 
-#if defined(CONFIG_HAS_PASSTHROUGH) && defined(CONFIG_HAS_PCI)
+#if defined(CONFIG_HAS_PASSTHROUGH) && defined(CONFIG_MGMT_HYPERCALLS)
+#ifdef CONFIG_HAS_PCI
     int (*get_device_group)(uint32_t machine_bdf);
     int (*assign_device)(struct domain *d, uint32_t machine_bdf);
     int (*deassign_device)(struct domain *d, uint32_t machine_bdf);
-#endif
+#endif /* CONFIG_HAS_PCI */
+#endif /* HAS_PASSTHROUGH && MGMT_HYPERCALLS */
 
 #if defined(CONFIG_HAS_PASSTHROUGH) && defined(CONFIG_HAS_DEVICE_TREE_DISCOVERY)
     int (*assign_dtdevice)(struct domain *d, const char *dtpath);
@@ -524,7 +526,8 @@ static inline int xsm_pci_config_permission(
     return alternative_call(xsm_ops.pci_config_permission, d, machine_bdf, start, end, access);
 }
 
-#if defined(CONFIG_HAS_PASSTHROUGH) && defined(CONFIG_HAS_PCI)
+#if defined(CONFIG_HAS_PASSTHROUGH) && defined(CONFIG_MGMT_HYPERCALLS)
+#ifdef CONFIG_HAS_PCI
 static inline int xsm_get_device_group(xsm_default_t def, uint32_t machine_bdf)
 {
     return alternative_call(xsm_ops.get_device_group, machine_bdf);
@@ -541,7 +544,8 @@ static inline int xsm_deassign_device(
 {
     return alternative_call(xsm_ops.deassign_device, d, machine_bdf);
 }
-#endif /* HAS_PASSTHROUGH && HAS_PCI) */
+#endif /* CONFIG_HAS_PCI */
+#endif /* HAS_PASSTHROUGH && MGMT_HYPERCALLS */
 
 #if defined(CONFIG_HAS_PASSTHROUGH) && defined(CONFIG_HAS_DEVICE_TREE_DISCOVERY)
 static inline int xsm_assign_dtdevice(
diff --git a/xen/xsm/dummy.c b/xen/xsm/dummy.c
index 9774bb3bdb..0026a0963b 100644
--- a/xen/xsm/dummy.c
+++ b/xen/xsm/dummy.c
@@ -80,11 +80,13 @@ static const struct xsm_ops __initconst_cf_clobber dummy_ops = {
     .pci_config_permission         = xsm_pci_config_permission,
     .get_vnumainfo                 = xsm_get_vnumainfo,
 
-#if defined(CONFIG_HAS_PASSTHROUGH) && defined(CONFIG_HAS_PCI)
+#if defined(CONFIG_HAS_PASSTHROUGH) && defined(CONFIG_MGMT_HYPERCALLS)
+#ifdef CONFIG_HAS_PCI
     .get_device_group              = xsm_get_device_group,
     .assign_device                 = xsm_assign_device,
     .deassign_device               = xsm_deassign_device,
-#endif
+#endif /* CONFIG_HAS_PCI */
+#endif /* HAS_PASSTHROUGH && MGMT_HYPERCALLS */
 
 #if defined(CONFIG_HAS_PASSTHROUGH) && defined(CONFIG_HAS_DEVICE_TREE_DISCOVERY)
     .assign_dtdevice               = xsm_assign_dtdevice,
diff --git a/xen/xsm/flask/hooks.c b/xen/xsm/flask/hooks.c
index 9b63c516e6..805a9a528e 100644
--- a/xen/xsm/flask/hooks.c
+++ b/xen/xsm/flask/hooks.c
@@ -1388,7 +1388,8 @@ static int cf_check flask_mem_sharing(struct domain *d)
 }
 #endif
 
-#if defined(CONFIG_HAS_PASSTHROUGH) && defined(CONFIG_HAS_PCI)
+#if defined(CONFIG_HAS_PASSTHROUGH) && defined(CONFIG_MGMT_HYPERCALLS)
+#ifdef CONFIG_HAS_PCI
 static int cf_check flask_get_device_group(uint32_t machine_bdf)
 {
     uint32_t rsid;
@@ -1459,7 +1460,8 @@ static int cf_check flask_deassign_device(
 
     return avc_current_has_perm(rsid, SECCLASS_RESOURCE, RESOURCE__REMOVE_DEVICE, NULL);
 }
-#endif /* HAS_PASSTHROUGH && HAS_PCI */
+#endif /* CONFIG_HAS_PCI */
+#endif /* HAS_PASSTHROUGH && MGMT_HYPERCALLS */
 
 #if defined(CONFIG_HAS_PASSTHROUGH) && defined(CONFIG_HAS_DEVICE_TREE_DISCOVERY)
 static int flask_test_assign_dtdevice(const char *dtpath)
@@ -1987,11 +1989,13 @@ static const struct xsm_ops __initconst_cf_clobber flask_ops = {
     .remove_from_physmap = flask_remove_from_physmap,
     .map_gmfn_foreign = flask_map_gmfn_foreign,
 
-#if defined(CONFIG_HAS_PASSTHROUGH) && defined(CONFIG_HAS_PCI)
+#if defined(CONFIG_HAS_PASSTHROUGH) && defined(CONFIG_MGMT_HYPERCALLS)
+#ifdef CONFIG_HAS_PCI
     .get_device_group = flask_get_device_group,
     .assign_device = flask_assign_device,
     .deassign_device = flask_deassign_device,
-#endif
+#endif /* CONFIG_HAS_PCI */
+#endif /* HAS_PASSTHROUGH && MGMT_HYPERCALLS */
 
 #if defined(CONFIG_HAS_PASSTHROUGH) && defined(CONFIG_HAS_DEVICE_TREE_DISCOVERY)
     .assign_dtdevice = flask_assign_dtdevice,
-- 
2.34.1



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Subject: Re: [XEN][PATCH] common/libfdt: optimize usage
To: Grygorii Strashko 
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
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On 21.11.2025 11:59, Grygorii Strashko wrote:
> 
> 
> On 17.11.25 11:34, Jan Beulich wrote:
>> On 17.11.2025 10:31, Jan Beulich wrote:
>>> On 14.11.2025 19:01, Grygorii Strashko wrote:
>>>> From: Grygorii Strashko 
>>>>
>>>> Now all libfdt features are built-it unconditionally, but...
>>>>
>>>> X86: The libfdt is used on x86 only to parse Hyperlaunch/dom0less Xen
>>>> nodes, so full libfdt is not needed in this case and minimal, RO
>>>> configuration can be used.
>>>>
>>>> ARM - situation is more complicated:
>>>> 1) ARM reads Host DT (fdt.c RO)
>>>> 2) ARM reads passthrough DT (RO)
>>>> 3) ARM generates dom0/hwdom DT from Host DT (there is a mix of WIP and SW APIs)
>>>> 4) ARM generates domU DT (there is a mix of WIP and SW APIs)
>>>> 4) With EFI enabled - ARM needs RW API and fdt_empty_tree
>>>> 5) With CONFIG_OVERLAY_DTB - ARM needs RW and fdt_overlay API
>>>
>>> This goes too far, imo.
>>
>> The more that, unless OVERLAY_DTB=y, all code and data moves to .init.*. Is
>> coverage in in .init.* really of as much concern as runtime code/data?
> 
> It is less priority, but still is. Any way it is unnecessary build units (build time) and
> increased binary size.
> 
> 
> Actually, I see interesting behavior - when build with CONFIG_CC_SPLIT_SECTIONS=y (CONFIG_LIVEPATCH=y)
> the libfdt code is not moved in ".init"
> 
> 0xa000027aa10 T fdt_ro_probe_
> 
> 0xa00002c0000 T __init_begin

Hmm, that's a bug, resulting from libfdt/ not using the usual machinery to do the
conversion.

Jan


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Subject: Re: [PATCH v4 01/24] xen/xsm: remove redundant xsm_iomem_mapping()
To: Penny Zheng 
Cc: ray.huang@amd.com, grygorii_strashko@epam.com,
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 21.11.2025 11:57, Penny Zheng wrote:
> Function xsm_iomem_mapping() seems redundant, and in flask policy, it just
> directly calls xsm_iomem_permission().
> Remove it and use xsm_iomem_permission() instead, with the benefit of a
> cf_check disappearing too.
> 
> Signed-off-by: Penny Zheng 
> Cc: Daniel De Graaf 

Any reason for this Cc?

> ---
> v2 -> v3:
> - new commit

So in v4 you dropped the Suggested-by: but kept the code as is. I would have
expected it the other way around, in the absence of Daniel having voiced any
opinion.

Jan


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Subject: Re: [PATCH v4 04/24] xen/domctl: make MGMT_HYPERCALLS transiently
 def_bool
To: Penny Zheng 
Cc: ray.huang@amd.com, grygorii_strashko@epam.com,
 Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 21.11.2025 11:57, Penny Zheng wrote:
> --- a/xen/common/Kconfig
> +++ b/xen/common/Kconfig
> @@ -654,7 +654,7 @@ menu "Supported hypercall interfaces"
>  config MGMT_HYPERCALLS
>  	bool "Enable privileged hypercalls for system management"
>  	depends on !PV_SHIM_EXCLUSIVE
> -	default y
> +	def_bool y
>  	help
>  	  This option shall only be disabled on some dom0less systems, or
>  	  PV shim on x86, to reduce Xen footprint via managing unnessary

This is a no-op change, as "def_bool y" means nothing else than "bool" plus
"default y". As long as the prompt is there, people can turn it off manually.

Jan


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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com,
	zhenwei.pi@linux.dev,
	alistair.francis@wdc.com,
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Subject: [PATCH v2 01/15] error: Strip trailing '\n' from error string arguments (again)
Date: Fri, 21 Nov 2025 13:14:24 +0100
Message-ID: <20251121121438.1249498-2-armbru@redhat.com>
In-Reply-To: <20251121121438.1249498-1-armbru@redhat.com>
References: <20251121121438.1249498-1-armbru@redhat.com>
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X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.111

Tracked down with scripts/coccinelle/err-bad-newline.cocci.

Signed-off-by: Markus Armbruster 
---
 hw/audio/es1370.c | 2 +-
 ui/gtk.c          | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/audio/es1370.c b/hw/audio/es1370.c
index 9873ffadab..566f93f1ea 100644
--- a/hw/audio/es1370.c
+++ b/hw/audio/es1370.c
@@ -228,7 +228,7 @@ static void print_sctl(uint32_t val)
 #undef a
         error_report("es1370: "
                 "%s p2_end_inc %d, p2_st_inc %d,"
-                " r1_fmt %s, p2_fmt %s, p1_fmt %s\n",
+                " r1_fmt %s, p2_fmt %s, p1_fmt %s",
                 buf,
                 (val & SCTRL_P2ENDINC) >> SCTRL_SH_P2ENDINC,
                 (val & SCTRL_P2STINC) >> SCTRL_SH_P2STINC,
diff --git a/ui/gtk.c b/ui/gtk.c
index 48571bedbf..e83a366625 100644
--- a/ui/gtk.c
+++ b/ui/gtk.c
@@ -1197,7 +1197,7 @@ static gboolean gd_touch_event(GtkWidget *widget, GdkEventTouch *touch,
         type = INPUT_MULTI_TOUCH_TYPE_END;
         break;
     default:
-        warn_report("gtk: unexpected touch event type\n");
+        warn_report("gtk: unexpected touch event type");
         return FALSE;
     }
 
-- 
2.49.0



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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com,
	zhenwei.pi@linux.dev,
	alistair.francis@wdc.com,
	stefanb@linux.vnet.ibm.com,
	kwolf@redhat.com,
	hreitz@redhat.com,
	sw@weilnetz.de,
	qemu_oss@crudebyte.com,
	groug@kaod.org,
	mst@redhat.com,
	imammedo@redhat.com,
	anisinha@redhat.com,
	kraxel@redhat.com,
	shentey@gmail.com,
	npiggin@gmail.com,
	harshpb@linux.ibm.com,
	sstabellini@kernel.org,
	anthony@xenproject.org,
	paul@xen.org,
	edgar.iglesias@gmail.com,
	elena.ufimtseva@oracle.com,
	jag.raman@oracle.com,
	sgarzare@redhat.com,
	pbonzini@redhat.com,
	fam@euphon.net,
	philmd@linaro.org,
	alex@shazbot.org,
	clg@redhat.com,
	peterx@redhat.com,
	farosas@suse.de,
	lizhijian@fujitsu.com,
	dave@treblig.org,
	jasowang@redhat.com,
	samuel.thibault@ens-lyon.org,
	michael.roth@amd.com,
	kkostiuk@redhat.com,
	zhao1.liu@intel.com,
	mtosatti@redhat.com,
	rathc@linux.ibm.com,
	palmer@dabbelt.com,
	liwei1518@gmail.com,
	dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com,
	marcandre.lureau@redhat.com,
	qemu-block@nongnu.org,
	qemu-ppc@nongnu.org,
	xen-devel@lists.xenproject.org,
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	qemu-riscv@nongnu.org
Subject: [PATCH v2 13/15] error: Use error_setg_errno() for simplicity and consistency
Date: Fri, 21 Nov 2025 13:14:36 +0100
Message-ID: <20251121121438.1249498-14-armbru@redhat.com>
In-Reply-To: <20251121121438.1249498-1-armbru@redhat.com>
References: <20251121121438.1249498-1-armbru@redhat.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
X-Scanned-By: MIMEDefang 3.0 on 10.30.177.12

Use error_setg_errno() instead of passing the value of strerror() or
g_strerror() to error_setg().

The separator between the error message proper and the value of
strerror() changes from " : ", "", " - ", "- " to ": " in places.

Signed-off-by: Markus Armbruster 
---
 backends/spdm-socket.c      |  4 ++--
 backends/tpm/tpm_emulator.c | 13 +++++--------
 hw/9pfs/9p.c                |  3 +--
 hw/acpi/core.c              |  3 +--
 hw/intc/openpic_kvm.c       |  3 +--
 hw/intc/xics_kvm.c          |  5 +++--
 hw/remote/vfio-user-obj.c   | 18 +++++++++---------
 hw/sensor/emc141x.c         |  4 ++--
 hw/sensor/tmp421.c          |  4 ++--
 hw/smbios/smbios.c          |  4 ++--
 hw/virtio/vdpa-dev.c        |  4 ++--
 migration/postcopy-ram.c    | 10 +++++-----
 net/slirp.c                 |  5 +++--
 qga/commands-posix-ssh.c    | 23 +++++++++++++----------
 system/vl.c                 |  2 +-
 target/ppc/kvm.c            |  5 ++---
 16 files changed, 54 insertions(+), 56 deletions(-)

diff --git a/backends/spdm-socket.c b/backends/spdm-socket.c
index 6d8f02d3b9..a12bc47f77 100644
--- a/backends/spdm-socket.c
+++ b/backends/spdm-socket.c
@@ -167,7 +167,7 @@ int spdm_socket_connect(uint16_t port, Error **errp)
 
     client_socket = socket(AF_INET, SOCK_STREAM, IPPROTO_TCP);
     if (client_socket < 0) {
-        error_setg(errp, "cannot create socket: %s", strerror(errno));
+        error_setg_errno(errp, errno, "cannot create socket");
         return -1;
     }
 
@@ -179,7 +179,7 @@ int spdm_socket_connect(uint16_t port, Error **errp)
 
     if (connect(client_socket, (struct sockaddr *)&server_addr,
                 sizeof(server_addr)) < 0) {
-        error_setg(errp, "cannot connect: %s", strerror(errno));
+        error_setg_errno(errp, errno, "cannot connect");
         close(client_socket);
         return -1;
     }
diff --git a/backends/tpm/tpm_emulator.c b/backends/tpm/tpm_emulator.c
index f10b9074fb..f52cb4d435 100644
--- a/backends/tpm/tpm_emulator.c
+++ b/backends/tpm/tpm_emulator.c
@@ -225,8 +225,7 @@ static int tpm_emulator_set_locality(TPMEmulator *tpm_emu, uint8_t locty_number,
     if (tpm_emulator_ctrlcmd(tpm_emu, CMD_SET_LOCALITY, &loc,
                              sizeof(loc), sizeof(loc.u.resp.tpm_result),
                              sizeof(loc)) < 0) {
-        error_setg(errp, "tpm-emulator: could not set locality : %s",
-                   strerror(errno));
+        error_setg_errno(errp, errno, "tpm-emulator: could not set locality");
         return -1;
     }
 
@@ -315,8 +314,7 @@ static int tpm_emulator_stop_tpm(TPMBackend *tb, Error **errp)
 
     if (tpm_emulator_ctrlcmd(tpm_emu, CMD_STOP, &res, 0,
                              sizeof(ptm_res), sizeof(res)) < 0) {
-        error_setg(errp, "tpm-emulator: Could not stop TPM: %s",
-                   strerror(errno));
+        error_setg_errno(errp, errno, "tpm-emulator: Could not stop TPM");
         return -1;
     }
 
@@ -377,8 +375,8 @@ static int tpm_emulator_set_buffer_size(TPMBackend *tb,
     if (tpm_emulator_ctrlcmd(tpm_emu, CMD_SET_BUFFERSIZE, &psbs,
                              sizeof(psbs.u.req), sizeof(psbs.u.resp.tpm_result),
                              sizeof(psbs.u.resp)) < 0) {
-        error_setg(errp, "tpm-emulator: Could not set buffer size: %s",
-                   strerror(errno));
+        error_setg_errno(errp, errno,
+                         "tpm-emulator: Could not set buffer size");
         return -1;
     }
 
@@ -426,8 +424,7 @@ static int tpm_emulator_startup_tpm_resume(TPMBackend *tb, size_t buffersize,
     if (tpm_emulator_ctrlcmd(tpm_emu, CMD_INIT, &init, sizeof(init),
                              sizeof(init.u.resp.tpm_result),
                              sizeof(init)) < 0) {
-        error_setg(errp, "tpm-emulator: could not send INIT: %s",
-                   strerror(errno));
+        error_setg_errno(errp, errno, "tpm-emulator: could not send INIT");
         goto err_exit;
     }
 
diff --git a/hw/9pfs/9p.c b/hw/9pfs/9p.c
index bc4a016ee3..6fbe604ce8 100644
--- a/hw/9pfs/9p.c
+++ b/hw/9pfs/9p.c
@@ -4345,8 +4345,7 @@ int v9fs_device_realize_common(V9fsState *s, const V9fsTransport *t,
      * use co-routines here.
      */
     if (s->ops->name_to_path(&s->ctx, NULL, "/", &path) < 0) {
-        error_setg(errp,
-                   "error in converting name to path %s", strerror(errno));
+        error_setg_errno(errp, errno, "error in converting name to path");
         goto out;
     }
     if (s->ops->lstat(&s->ctx, &path, &stat)) {
diff --git a/hw/acpi/core.c b/hw/acpi/core.c
index d2677332af..82974eb257 100644
--- a/hw/acpi/core.c
+++ b/hw/acpi/core.c
@@ -293,8 +293,7 @@ void acpi_table_add(const QemuOpts *opts, Error **errp)
                 memcpy(blob + bloblen, data, r);
                 bloblen += r;
             } else if (errno != EINTR) {
-                error_setg(errp, "can't read file %s: %s", *cur,
-                           strerror(errno));
+                error_setg_errno(errp, errno, "can't read file %s", *cur);
                 close(fd);
                 goto out;
             }
diff --git a/hw/intc/openpic_kvm.c b/hw/intc/openpic_kvm.c
index 673ea9ca05..0c11bbc963 100644
--- a/hw/intc/openpic_kvm.c
+++ b/hw/intc/openpic_kvm.c
@@ -223,8 +223,7 @@ static void kvm_openpic_realize(DeviceState *dev, Error **errp)
     cd.type = kvm_openpic_model;
     ret = kvm_vm_ioctl(s, KVM_CREATE_DEVICE, &cd);
     if (ret < 0) {
-        error_setg(errp, "Can't create device %d: %s",
-                   cd.type, strerror(errno));
+        error_setg_errno(errp, errno, "Can't create device %d", cd.type);
         return;
     }
     opp->fd = cd.fd;
diff --git a/hw/intc/xics_kvm.c b/hw/intc/xics_kvm.c
index ee72969f5f..61f66d1019 100644
--- a/hw/intc/xics_kvm.c
+++ b/hw/intc/xics_kvm.c
@@ -165,8 +165,9 @@ void icp_kvm_realize(DeviceState *dev, Error **errp)
     if (ret < 0) {
         Error *local_err = NULL;
 
-        error_setg(&local_err, "Unable to connect CPU%ld to kernel XICS: %s",
-                   vcpu_id, strerror(errno));
+        error_setg_errno(&local_err, errno,
+                         "Unable to connect CPU%ld to kernel XICS",
+                         vcpu_id);
         if (errno == ENOSPC) {
             error_append_hint(&local_err, "Try -smp maxcpus=N with N < %u\n",
                               MACHINE(qdev_get_machine())->smp.max_cpus);
diff --git a/hw/remote/vfio-user-obj.c b/hw/remote/vfio-user-obj.c
index 216b4876e2..24c0088f63 100644
--- a/hw/remote/vfio-user-obj.c
+++ b/hw/remote/vfio-user-obj.c
@@ -751,7 +751,7 @@ static void vfu_object_init_ctx(VfuObject *o, Error **errp)
                                 LIBVFIO_USER_FLAG_ATTACH_NB,
                                 o, VFU_DEV_TYPE_PCI);
     if (o->vfu_ctx == NULL) {
-        error_setg(errp, "vfu: Failed to create context - %s", strerror(errno));
+        error_setg_errno(errp, errno, "vfu: Failed to create context");
         return;
     }
 
@@ -776,9 +776,9 @@ static void vfu_object_init_ctx(VfuObject *o, Error **errp)
 
     ret = vfu_pci_init(o->vfu_ctx, pci_type, PCI_HEADER_TYPE_NORMAL, 0);
     if (ret < 0) {
-        error_setg(errp,
-                   "vfu: Failed to attach PCI device %s to context - %s",
-                   o->device, strerror(errno));
+        error_setg_errno(errp, errno,
+                         "vfu: Failed to attach PCI device %s to context",
+                         o->device);
         goto fail;
     }
 
@@ -792,9 +792,9 @@ static void vfu_object_init_ctx(VfuObject *o, Error **errp)
                            VFU_REGION_FLAG_RW | VFU_REGION_FLAG_ALWAYS_CB,
                            NULL, 0, -1, 0);
     if (ret < 0) {
-        error_setg(errp,
-                   "vfu: Failed to setup config space handlers for %s- %s",
-                   o->device, strerror(errno));
+        error_setg_errno(errp, errno,
+                         "vfu: Failed to setup config space handlers for %s",
+                         o->device);
         goto fail;
     }
 
@@ -822,8 +822,8 @@ static void vfu_object_init_ctx(VfuObject *o, Error **errp)
 
     ret = vfu_realize_ctx(o->vfu_ctx);
     if (ret < 0) {
-        error_setg(errp, "vfu: Failed to realize device %s- %s",
-                   o->device, strerror(errno));
+        error_setg_errno(errp, errno, "vfu: Failed to realize device %s",
+                         o->device);
         goto fail;
     }
 
diff --git a/hw/sensor/emc141x.c b/hw/sensor/emc141x.c
index 7b2ce383a1..a51fc44395 100644
--- a/hw/sensor/emc141x.c
+++ b/hw/sensor/emc141x.c
@@ -59,7 +59,7 @@ static void emc141x_get_temperature(Object *obj, Visitor *v, const char *name,
     unsigned tempid;
 
     if (sscanf(name, "temperature%u", &tempid) != 1) {
-        error_setg(errp, "error reading %s: %s", name, g_strerror(errno));
+        error_setg_errno(errp, errno, "error reading %s", name);
         return;
     }
 
@@ -86,7 +86,7 @@ static void emc141x_set_temperature(Object *obj, Visitor *v, const char *name,
     }
 
     if (sscanf(name, "temperature%u", &tempid) != 1) {
-        error_setg(errp, "error reading %s: %s", name, g_strerror(errno));
+        error_setg_errno(errp, errno, "error reading %s", name);
         return;
     }
 
diff --git a/hw/sensor/tmp421.c b/hw/sensor/tmp421.c
index 3421c44086..127edd0ba5 100644
--- a/hw/sensor/tmp421.c
+++ b/hw/sensor/tmp421.c
@@ -117,7 +117,7 @@ static void tmp421_get_temperature(Object *obj, Visitor *v, const char *name,
     int tempid;
 
     if (sscanf(name, "temperature%d", &tempid) != 1) {
-        error_setg(errp, "error reading %s: %s", name, g_strerror(errno));
+        error_setg_errno(errp, errno, "error reading %s", name);
         return;
     }
 
@@ -154,7 +154,7 @@ static void tmp421_set_temperature(Object *obj, Visitor *v, const char *name,
     }
 
     if (sscanf(name, "temperature%d", &tempid) != 1) {
-        error_setg(errp, "error reading %s: %s", name, g_strerror(errno));
+        error_setg_errno(errp, errno, "error reading %s", name);
         return;
     }
 
diff --git a/hw/smbios/smbios.c b/hw/smbios/smbios.c
index 7558b2ad83..b228f9eb85 100644
--- a/hw/smbios/smbios.c
+++ b/hw/smbios/smbios.c
@@ -1281,8 +1281,8 @@ static int save_opt_one(void *opaque,
                 break;
             }
             if (ret < 0) {
-                error_setg(errp, "Unable to read from %s: %s",
-                           value, strerror(errno));
+                error_setg_errno(errp, errno, "Unable to read from %s",
+                                 value);
                 qemu_close(fd);
                 return -1;
             }
diff --git a/hw/virtio/vdpa-dev.c b/hw/virtio/vdpa-dev.c
index 4a7b970976..f97d576171 100644
--- a/hw/virtio/vdpa-dev.c
+++ b/hw/virtio/vdpa-dev.c
@@ -41,8 +41,8 @@ vhost_vdpa_device_get_u32(int fd, unsigned long int cmd, Error **errp)
     uint32_t val = (uint32_t)-1;
 
     if (ioctl(fd, cmd, &val) < 0) {
-        error_setg(errp, "vhost-vdpa-device: cmd 0x%lx failed: %s",
-                   cmd, strerror(errno));
+        error_setg_errno(errp, errno, "vhost-vdpa-device: cmd 0x%lx failed",
+                         cmd);
     }
 
     return val;
diff --git a/migration/postcopy-ram.c b/migration/postcopy-ram.c
index 3f98dcb6fd..5454372ac6 100644
--- a/migration/postcopy-ram.c
+++ b/migration/postcopy-ram.c
@@ -582,7 +582,7 @@ bool postcopy_ram_supported_by_host(MigrationIncomingState *mis, Error **errp)
 
     ufd = uffd_open(O_CLOEXEC);
     if (ufd == -1) {
-        error_setg(errp, "Userfaultfd not available: %s", strerror(errno));
+        error_setg_errno(errp, errno, "Userfaultfd not available");
         goto out;
     }
 
@@ -620,7 +620,7 @@ bool postcopy_ram_supported_by_host(MigrationIncomingState *mis, Error **errp)
      * it was enabled.
      */
     if (munlockall()) {
-        error_setg(errp, "munlockall() failed: %s", strerror(errno));
+        error_setg_errno(errp, errno, "munlockall() failed");
         goto out;
     }
 
@@ -632,7 +632,7 @@ bool postcopy_ram_supported_by_host(MigrationIncomingState *mis, Error **errp)
     testarea = mmap(NULL, pagesize, PROT_READ | PROT_WRITE, MAP_PRIVATE |
                                     MAP_ANONYMOUS, -1, 0);
     if (testarea == MAP_FAILED) {
-        error_setg(errp, "Failed to map test area: %s", strerror(errno));
+        error_setg_errno(errp, errno, "Failed to map test area");
         goto out;
     }
     g_assert(QEMU_PTR_IS_ALIGNED(testarea, pagesize));
@@ -642,14 +642,14 @@ bool postcopy_ram_supported_by_host(MigrationIncomingState *mis, Error **errp)
     reg_struct.mode = UFFDIO_REGISTER_MODE_MISSING;
 
     if (ioctl(ufd, UFFDIO_REGISTER, ®_struct)) {
-        error_setg(errp, "UFFDIO_REGISTER failed: %s", strerror(errno));
+        error_setg_errno(errp, errno, "UFFDIO_REGISTER failed");
         goto out;
     }
 
     range_struct.start = (uintptr_t)testarea;
     range_struct.len = pagesize;
     if (ioctl(ufd, UFFDIO_UNREGISTER, &range_struct)) {
-        error_setg(errp, "UFFDIO_UNREGISTER failed: %s", strerror(errno));
+        error_setg_errno(errp, errno, "UFFDIO_UNREGISTER failed");
         goto out;
     }
 
diff --git a/net/slirp.c b/net/slirp.c
index 5996fec512..04925f3318 100644
--- a/net/slirp.c
+++ b/net/slirp.c
@@ -1020,8 +1020,9 @@ static int slirp_smb(SlirpState* s, const char *exported_dir,
     }
 
     if (access(exported_dir, R_OK | X_OK)) {
-        error_setg(errp, "Error accessing shared directory '%s': %s",
-                   exported_dir, strerror(errno));
+        error_setg_errno(errp, errno,
+                         "Error accessing shared directory '%s'",
+                         exported_dir);
         return -1;
     }
 
diff --git a/qga/commands-posix-ssh.c b/qga/commands-posix-ssh.c
index 246171d323..661972e34e 100644
--- a/qga/commands-posix-ssh.c
+++ b/qga/commands-posix-ssh.c
@@ -61,20 +61,22 @@ mkdir_for_user(const char *path, const struct passwd *p,
                mode_t mode, Error **errp)
 {
     if (g_mkdir(path, mode) == -1) {
-        error_setg(errp, "failed to create directory '%s': %s",
-                   path, g_strerror(errno));
+        error_setg_errno(errp, errno, "failed to create directory '%s'",
+                         path);
         return false;
     }
 
     if (chown(path, p->pw_uid, p->pw_gid) == -1) {
-        error_setg(errp, "failed to set ownership of directory '%s': %s",
-                   path, g_strerror(errno));
+        error_setg_errno(errp, errno,
+                         "failed to set ownership of directory '%s'",
+                         path);
         return false;
     }
 
     if (chmod(path, mode) == -1) {
-        error_setg(errp, "failed to set permissions of directory '%s': %s",
-                   path, g_strerror(errno));
+        error_setg_errno(errp, errno,
+                         "failed to set permissions of directory '%s'",
+                         path);
         return false;
     }
 
@@ -95,14 +97,15 @@ write_authkeys(const char *path, const GStrv keys,
     }
 
     if (chown(path, p->pw_uid, p->pw_gid) == -1) {
-        error_setg(errp, "failed to set ownership of directory '%s': %s",
-                   path, g_strerror(errno));
+        error_setg_errno(errp, errno,
+                         "failed to set ownership of directory '%s'",
+                         path);
         return false;
     }
 
     if (chmod(path, 0600) == -1) {
-        error_setg(errp, "failed to set permissions of '%s': %s",
-                   path, g_strerror(errno));
+        error_setg_errno(errp, errno, "failed to set permissions of '%s'",
+                         path);
         return false;
     }
 
diff --git a/system/vl.c b/system/vl.c
index 5091fe52d9..2ef5b4b3b2 100644
--- a/system/vl.c
+++ b/system/vl.c
@@ -619,7 +619,7 @@ static int parse_add_fd(void *opaque, QemuOpts *opts, Error **errp)
     }
 #endif
     if (dupfd == -1) {
-        error_setg(errp, "error duplicating fd: %s", strerror(errno));
+        error_setg_errno(errp, errno, "error duplicating fd");
         return -1;
     }
 
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index 43124bf1c7..3501b5d546 100644
--- a/target/ppc/kvm.c
+++ b/target/ppc/kvm.c
@@ -2699,9 +2699,8 @@ int kvmppc_get_htab_fd(bool write, uint64_t index, Error **errp)
 
     ret = kvm_vm_ioctl(kvm_state, KVM_PPC_GET_HTAB_FD, &s);
     if (ret < 0) {
-        error_setg(errp, "Unable to open fd for %s HPT %s KVM: %s",
-                   write ? "writing" : "reading", write ? "to" : "from",
-                   strerror(errno));
+        error_setg_errno(errp, errno, "Unable to open fd for %s HPT %s KVM",
+                   write ? "writing" : "reading", write ? "to" : "from");
         return -errno;
     }
 
-- 
2.49.0



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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com,
	zhenwei.pi@linux.dev,
	alistair.francis@wdc.com,
	stefanb@linux.vnet.ibm.com,
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Subject: [PATCH v2 03/15] ui: Convert to qemu_create() for simplicity and consistency
Date: Fri, 21 Nov 2025 13:14:26 +0100
Message-ID: <20251121121438.1249498-4-armbru@redhat.com>
In-Reply-To: <20251121121438.1249498-1-armbru@redhat.com>
References: <20251121121438.1249498-1-armbru@redhat.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
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The error message changes from

    failed to open file 'FILENAME': REASON

to

    Could not create 'FILENAME': REASON

Signed-off-by: Markus Armbruster 
---
 ui/ui-qmp-cmds.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/ui/ui-qmp-cmds.c b/ui/ui-qmp-cmds.c
index 74fa6c6ec5..b49b636152 100644
--- a/ui/ui-qmp-cmds.c
+++ b/ui/ui-qmp-cmds.c
@@ -369,10 +369,8 @@ qmp_screendump(const char *filename, const char *device,
     }
     image = pixman_image_ref(surface->image);
 
-    fd = qemu_open_old(filename, O_WRONLY | O_CREAT | O_TRUNC | O_BINARY, 0666);
+    fd = qemu_create(filename, O_WRONLY | O_TRUNC | O_BINARY, 0666, errp);
     if (fd == -1) {
-        error_setg(errp, "failed to open file '%s': %s", filename,
-                   strerror(errno));
         return;
     }
 
-- 
2.49.0



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	zhenwei.pi@linux.dev,
	alistair.francis@wdc.com,
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Subject: [PATCH v2 04/15] tap-solaris: Use error_setg_file_open() for better error messages
Date: Fri, 21 Nov 2025 13:14:27 +0100
Message-ID: <20251121121438.1249498-5-armbru@redhat.com>
In-Reply-To: <20251121121438.1249498-1-armbru@redhat.com>
References: <20251121121438.1249498-1-armbru@redhat.com>
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Error messages change from

    Can't open /dev/ip (actually /dev/udp)
    Can't open /dev/tap
    Can't open /dev/tap (2)

to

    Could not open '/dev/udp': REASON
    Could not open '/dev/tap': REASON

where REASON is the value of strerror(errno).

Signed-off-by: Markus Armbruster 
Reviewed-by: Dr. David Alan Gilbert 
---
 net/tap-solaris.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/net/tap-solaris.c b/net/tap-solaris.c
index 75397e6c54..faf7922ea8 100644
--- a/net/tap-solaris.c
+++ b/net/tap-solaris.c
@@ -87,13 +87,13 @@ static int tap_alloc(char *dev, size_t dev_size, Error **errp)
 
     ip_fd = RETRY_ON_EINTR(open("/dev/udp", O_RDWR, 0));
     if (ip_fd < 0) {
-        error_setg(errp, "Can't open /dev/ip (actually /dev/udp)");
+        error_setg_file_open(errp, errno, "/dev/udp");
         return -1;
     }
 
     tap_fd = RETRY_ON_EINTR(open("/dev/tap", O_RDWR, 0));
     if (tap_fd < 0) {
-        error_setg(errp, "Can't open /dev/tap");
+        error_setg_file_open(errp, errno, "/dev/tap");
         return -1;
     }
 
@@ -107,7 +107,7 @@ static int tap_alloc(char *dev, size_t dev_size, Error **errp)
 
     if_fd = RETRY_ON_EINTR(open("/dev/tap", O_RDWR, 0));
     if (if_fd < 0) {
-        error_setg(errp, "Can't open /dev/tap (2)");
+        error_setg_file_open(errp, errno, "/dev/tap");
         return -1;
     }
     if(ioctl(if_fd, I_PUSH, "ip") < 0){
-- 
2.49.0



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	zhenwei.pi@linux.dev,
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	stefanb@linux.vnet.ibm.com,
	kwolf@redhat.com,
	hreitz@redhat.com,
	sw@weilnetz.de,
	qemu_oss@crudebyte.com,
	groug@kaod.org,
	mst@redhat.com,
	imammedo@redhat.com,
	anisinha@redhat.com,
	kraxel@redhat.com,
	shentey@gmail.com,
	npiggin@gmail.com,
	harshpb@linux.ibm.com,
	sstabellini@kernel.org,
	anthony@xenproject.org,
	paul@xen.org,
	edgar.iglesias@gmail.com,
	elena.ufimtseva@oracle.com,
	jag.raman@oracle.com,
	sgarzare@redhat.com,
	pbonzini@redhat.com,
	fam@euphon.net,
	philmd@linaro.org,
	alex@shazbot.org,
	clg@redhat.com,
	peterx@redhat.com,
	farosas@suse.de,
	lizhijian@fujitsu.com,
	dave@treblig.org,
	jasowang@redhat.com,
	samuel.thibault@ens-lyon.org,
	michael.roth@amd.com,
	kkostiuk@redhat.com,
	zhao1.liu@intel.com,
	mtosatti@redhat.com,
	rathc@linux.ibm.com,
	palmer@dabbelt.com,
	liwei1518@gmail.com,
	dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com,
	marcandre.lureau@redhat.com,
	qemu-block@nongnu.org,
	qemu-ppc@nongnu.org,
	xen-devel@lists.xenproject.org,
	kvm@vger.kernel.org,
	qemu-riscv@nongnu.org
Subject: [PATCH v2 00/15] Error message improvements
Date: Fri, 21 Nov 2025 13:14:23 +0100
Message-ID: <20251121121438.1249498-1-armbru@redhat.com>
MIME-Version: 1.0
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v2:
* PATCH 02: New, replacing old PATCH 02 [Dave]
* PATCH 03: New, replacing one of old PATCH 09's hunks
* PATCH 12: Fix patch splitting mishap [Dave]
* PATCH 13: Fix lost argument [Dave]

Markus Armbruster (15):
  error: Strip trailing '\n' from error string arguments (again)
  hw/usb: Convert to qemu_create() for a better error message
  ui: Convert to qemu_create() for simplicity and consistency
  tap-solaris: Use error_setg_file_open() for better error messages
  qga: Use error_setg_file_open() for better error messages
  hw/scsi: Use error_setg_file_open() for a better error message
  hw/virtio: Use error_setg_file_open() for a better error message
  net/tap: Use error_setg_file_open() for a better error message
  blkdebug: Use error_setg_file_open() for a better error message
  error: Use error_setg_file_open() for simplicity and consistency
  net/slirp: Improve file open error message
  error: Use error_setg_errno() to improve error messages
  error: Use error_setg_errno() for simplicity and consistency
  qga/commands-win32: Use error_setg_win32() for better error messages
  block/file-win32: Improve an error message

 backends/cryptodev-lkcf.c   |  2 +-
 backends/spdm-socket.c      |  4 ++--
 backends/tpm/tpm_emulator.c | 13 +++++--------
 block/blkdebug.c            |  2 +-
 block/file-win32.c          |  2 +-
 hw/9pfs/9p-local.c          |  2 +-
 hw/9pfs/9p.c                |  3 +--
 hw/acpi/core.c              |  5 ++---
 hw/audio/es1370.c           |  2 +-
 hw/core/loader.c            |  2 +-
 hw/intc/openpic_kvm.c       |  3 +--
 hw/intc/xics_kvm.c          |  5 +++--
 hw/pci-host/xen_igd_pt.c    |  2 +-
 hw/ppc/spapr.c              |  6 +++---
 hw/remote/vfio-user-obj.c   | 18 +++++++++---------
 hw/scsi/vhost-scsi.c        |  3 +--
 hw/sensor/emc141x.c         |  4 ++--
 hw/sensor/tmp421.c          |  4 ++--
 hw/smbios/smbios.c          |  4 ++--
 hw/usb/bus.c                |  5 ++---
 hw/vfio/migration-multifd.c |  5 +++--
 hw/virtio/vdpa-dev.c        |  4 ++--
 hw/virtio/vhost-vsock.c     |  3 +--
 migration/postcopy-ram.c    | 10 +++++-----
 migration/rdma.c            |  3 +--
 monitor/hmp-cmds-target.c   |  2 +-
 net/dump.c                  |  2 +-
 net/l2tpv3.c                |  6 ++----
 net/slirp.c                 |  9 ++++++---
 net/tap-bsd.c               |  6 +++---
 net/tap-linux.c             |  2 +-
 net/tap-solaris.c           |  6 +++---
 net/tap.c                   |  3 +--
 qga/commands-linux.c        | 11 ++++++-----
 qga/commands-posix-ssh.c    | 23 +++++++++++++----------
 qga/commands-win32.c        | 16 ++++++++--------
 system/vl.c                 |  2 +-
 target/i386/sev.c           |  6 ++----
 target/ppc/kvm.c            |  5 ++---
 target/riscv/kvm/kvm-cpu.c  | 11 ++++++-----
 ui/gtk.c                    |  2 +-
 ui/ui-qmp-cmds.c            |  4 +---
 util/vfio-helpers.c         |  5 ++---
 43 files changed, 114 insertions(+), 123 deletions(-)

-- 
2.49.0



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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com,
	zhenwei.pi@linux.dev,
	alistair.francis@wdc.com,
	stefanb@linux.vnet.ibm.com,
	kwolf@redhat.com,
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	sw@weilnetz.de,
	qemu_oss@crudebyte.com,
	groug@kaod.org,
	mst@redhat.com,
	imammedo@redhat.com,
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Subject: [PATCH v2 07/15] hw/virtio: Use error_setg_file_open() for a better error message
Date: Fri, 21 Nov 2025 13:14:30 +0100
Message-ID: <20251121121438.1249498-8-armbru@redhat.com>
In-Reply-To: <20251121121438.1249498-1-armbru@redhat.com>
References: <20251121121438.1249498-1-armbru@redhat.com>
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The error message changes from

    vhost-vsock: failed to open vhost device: REASON

to

    Could not open '/dev/vhost-vsock': REASON

I think the exact file name is more useful to know than the file's
purpose.

Signed-off-by: Markus Armbruster 
---
 hw/virtio/vhost-vsock.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/hw/virtio/vhost-vsock.c b/hw/virtio/vhost-vsock.c
index 107d88babe..7940b60d8a 100644
--- a/hw/virtio/vhost-vsock.c
+++ b/hw/virtio/vhost-vsock.c
@@ -153,8 +153,7 @@ static void vhost_vsock_device_realize(DeviceState *dev, Error **errp)
     } else {
         vhostfd = open("/dev/vhost-vsock", O_RDWR);
         if (vhostfd < 0) {
-            error_setg_errno(errp, errno,
-                             "vhost-vsock: failed to open vhost device");
+            error_setg_file_open(errp, errno, "/dev/vhost-vsock");
             return;
         }
 
-- 
2.49.0



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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com,
	zhenwei.pi@linux.dev,
	alistair.francis@wdc.com,
	stefanb@linux.vnet.ibm.com,
	kwolf@redhat.com,
	hreitz@redhat.com,
	sw@weilnetz.de,
	qemu_oss@crudebyte.com,
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	mst@redhat.com,
	imammedo@redhat.com,
	anisinha@redhat.com,
	kraxel@redhat.com,
	shentey@gmail.com,
	npiggin@gmail.com,
	harshpb@linux.ibm.com,
	sstabellini@kernel.org,
	anthony@xenproject.org,
	paul@xen.org,
	edgar.iglesias@gmail.com,
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	jag.raman@oracle.com,
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	pbonzini@redhat.com,
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	lizhijian@fujitsu.com,
	dave@treblig.org,
	jasowang@redhat.com,
	samuel.thibault@ens-lyon.org,
	michael.roth@amd.com,
	kkostiuk@redhat.com,
	zhao1.liu@intel.com,
	mtosatti@redhat.com,
	rathc@linux.ibm.com,
	palmer@dabbelt.com,
	liwei1518@gmail.com,
	dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com,
	marcandre.lureau@redhat.com,
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	qemu-ppc@nongnu.org,
	xen-devel@lists.xenproject.org,
	kvm@vger.kernel.org,
	qemu-riscv@nongnu.org
Subject: [PATCH v2 06/15] hw/scsi: Use error_setg_file_open() for a better error message
Date: Fri, 21 Nov 2025 13:14:29 +0100
Message-ID: <20251121121438.1249498-7-armbru@redhat.com>
In-Reply-To: <20251121121438.1249498-1-armbru@redhat.com>
References: <20251121121438.1249498-1-armbru@redhat.com>
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The error message changes from

    vhost-scsi: open vhost char device failed: REASON

to

    Could not open '/dev/vhost-scsi': REASON

I think the exact file name is more useful to know than the file's
purpose.

We could put back the "vhost-scsi: " prefix with error_prepend().  Not
worth the bother.

Signed-off-by: Markus Armbruster 
Reviewed-by: Dr. David Alan Gilbert 
---
 hw/scsi/vhost-scsi.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/hw/scsi/vhost-scsi.c b/hw/scsi/vhost-scsi.c
index cdf405b0f8..239138c931 100644
--- a/hw/scsi/vhost-scsi.c
+++ b/hw/scsi/vhost-scsi.c
@@ -245,8 +245,7 @@ static void vhost_scsi_realize(DeviceState *dev, Error **errp)
     } else {
         vhostfd = open("/dev/vhost-scsi", O_RDWR);
         if (vhostfd < 0) {
-            error_setg(errp, "vhost-scsi: open vhost char device failed: %s",
-                       strerror(errno));
+            error_setg_file_open(errp, errno, "/dev/vhost-scsi");
             return;
         }
     }
-- 
2.49.0



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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com,
	zhenwei.pi@linux.dev,
	alistair.francis@wdc.com,
	stefanb@linux.vnet.ibm.com,
	kwolf@redhat.com,
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	qemu_oss@crudebyte.com,
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	mst@redhat.com,
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	harshpb@linux.ibm.com,
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	qemu-riscv@nongnu.org
Subject: [PATCH v2 05/15] qga: Use error_setg_file_open() for better error messages
Date: Fri, 21 Nov 2025 13:14:28 +0100
Message-ID: <20251121121438.1249498-6-armbru@redhat.com>
In-Reply-To: <20251121121438.1249498-1-armbru@redhat.com>
References: <20251121121438.1249498-1-armbru@redhat.com>
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Error messages change from

    open("FNAME"): REASON

to

    Could not open 'FNAME': REASON

Signed-off-by: Markus Armbruster 
Reviewed-by: Dr. David Alan Gilbert 
Reviewed-by: Kostiantyn Kostiuk 
---
 qga/commands-linux.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/qga/commands-linux.c b/qga/commands-linux.c
index 4a09ddc760..5cf76ca2d9 100644
--- a/qga/commands-linux.c
+++ b/qga/commands-linux.c
@@ -1502,14 +1502,15 @@ static void transfer_vcpu(GuestLogicalProcessor *vcpu, bool sys2vcpu,
 
     dirfd = open(dirpath, O_RDONLY | O_DIRECTORY);
     if (dirfd == -1) {
-        error_setg_errno(errp, errno, "open(\"%s\")", dirpath);
+        error_setg_file_open(errp, errno, dirpath);
         return;
     }
 
     fd = openat(dirfd, fn, sys2vcpu ? O_RDONLY : O_RDWR);
     if (fd == -1) {
         if (errno != ENOENT) {
-            error_setg_errno(errp, errno, "open(\"%s/%s\")", dirpath, fn);
+            error_setg_errno(errp, errno, "could not open %s/%s",
+                             dirpath, fn);
         } else if (sys2vcpu) {
             vcpu->online = true;
             vcpu->can_offline = false;
@@ -1711,7 +1712,7 @@ static void transfer_memory_block(GuestMemoryBlock *mem_blk, bool sys2memblk,
     dirfd = open(dirpath, O_RDONLY | O_DIRECTORY);
     if (dirfd == -1) {
         if (sys2memblk) {
-            error_setg_errno(errp, errno, "open(\"%s\")", dirpath);
+            error_setg_file_open(errp, errno, dirpath);
         } else {
             if (errno == ENOENT) {
                 result->response = GUEST_MEMORY_BLOCK_RESPONSE_TYPE_NOT_FOUND;
@@ -1936,7 +1937,7 @@ static GuestDiskStatsInfoList *guest_get_diskstats(Error **errp)
 
     fp = fopen(diskstats, "r");
     if (fp  == NULL) {
-        error_setg_errno(errp, errno, "open(\"%s\")", diskstats);
+        error_setg_file_open(errp, errno, diskstats);
         return NULL;
     }
 
@@ -2047,7 +2048,7 @@ GuestCpuStatsList *qmp_guest_get_cpustats(Error **errp)
 
     fp = fopen(cpustats, "r");
     if (fp  == NULL) {
-        error_setg_errno(errp, errno, "open(\"%s\")", cpustats);
+        error_setg_file_open(errp, errno, cpustats);
         return NULL;
     }
 
-- 
2.49.0



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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com,
	zhenwei.pi@linux.dev,
	alistair.francis@wdc.com,
	stefanb@linux.vnet.ibm.com,
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	kkostiuk@redhat.com,
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	rathc@linux.ibm.com,
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Subject: [PATCH v2 02/15] hw/usb: Convert to qemu_create() for a better error message
Date: Fri, 21 Nov 2025 13:14:25 +0100
Message-ID: <20251121121438.1249498-3-armbru@redhat.com>
In-Reply-To: <20251121121438.1249498-1-armbru@redhat.com>
References: <20251121121438.1249498-1-armbru@redhat.com>
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The error message changes from

    open FILENAME failed

to

    Could not create 'FILENAME': REASON

where REASON is the value of strerror(errno).

Signed-off-by: Markus Armbruster 
---
 hw/usb/bus.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/hw/usb/bus.c b/hw/usb/bus.c
index 8dd2ce415e..714e33989f 100644
--- a/hw/usb/bus.c
+++ b/hw/usb/bus.c
@@ -259,10 +259,9 @@ static void usb_qdev_realize(DeviceState *qdev, Error **errp)
     }
 
     if (dev->pcap_filename) {
-        int fd = qemu_open_old(dev->pcap_filename,
-                               O_CREAT | O_WRONLY | O_TRUNC | O_BINARY, 0666);
+        int fd = qemu_create(dev->pcap_filename,
+                             O_WRONLY | O_TRUNC | O_BINARY, 0666, errp);
         if (fd < 0) {
-            error_setg(errp, "open %s failed", dev->pcap_filename);
             usb_qdev_unrealize(qdev);
             return;
         }
-- 
2.49.0



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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com,
	zhenwei.pi@linux.dev,
	alistair.francis@wdc.com,
	stefanb@linux.vnet.ibm.com,
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	sw@weilnetz.de,
	qemu_oss@crudebyte.com,
	groug@kaod.org,
	mst@redhat.com,
	imammedo@redhat.com,
	anisinha@redhat.com,
	kraxel@redhat.com,
	shentey@gmail.com,
	npiggin@gmail.com,
	harshpb@linux.ibm.com,
	sstabellini@kernel.org,
	anthony@xenproject.org,
	paul@xen.org,
	edgar.iglesias@gmail.com,
	elena.ufimtseva@oracle.com,
	jag.raman@oracle.com,
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	pbonzini@redhat.com,
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	clg@redhat.com,
	peterx@redhat.com,
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	lizhijian@fujitsu.com,
	dave@treblig.org,
	jasowang@redhat.com,
	samuel.thibault@ens-lyon.org,
	michael.roth@amd.com,
	kkostiuk@redhat.com,
	zhao1.liu@intel.com,
	mtosatti@redhat.com,
	rathc@linux.ibm.com,
	palmer@dabbelt.com,
	liwei1518@gmail.com,
	dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com,
	marcandre.lureau@redhat.com,
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Subject: [PATCH v2 09/15] blkdebug: Use error_setg_file_open() for a better error message
Date: Fri, 21 Nov 2025 13:14:32 +0100
Message-ID: <20251121121438.1249498-10-armbru@redhat.com>
In-Reply-To: <20251121121438.1249498-1-armbru@redhat.com>
References: <20251121121438.1249498-1-armbru@redhat.com>
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The error message changes from

    Could not read blkdebug config file: REASON

to

    Could not open 'FNAME': REASON

I think the exact file name is more useful to know than the file's
purpose.

Signed-off-by: Markus Armbruster 
---
 block/blkdebug.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/block/blkdebug.c b/block/blkdebug.c
index c54aee0c84..8a4a8cb85e 100644
--- a/block/blkdebug.c
+++ b/block/blkdebug.c
@@ -288,7 +288,7 @@ static int read_config(BDRVBlkdebugState *s, const char *filename,
     if (filename) {
         f = fopen(filename, "r");
         if (f == NULL) {
-            error_setg_errno(errp, errno, "Could not read blkdebug config file");
+            error_setg_file_open(errp, errno, filename);
             return -errno;
         }
 
-- 
2.49.0



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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com,
	zhenwei.pi@linux.dev,
	alistair.francis@wdc.com,
	stefanb@linux.vnet.ibm.com,
	kwolf@redhat.com,
	hreitz@redhat.com,
	sw@weilnetz.de,
	qemu_oss@crudebyte.com,
	groug@kaod.org,
	mst@redhat.com,
	imammedo@redhat.com,
	anisinha@redhat.com,
	kraxel@redhat.com,
	shentey@gmail.com,
	npiggin@gmail.com,
	harshpb@linux.ibm.com,
	sstabellini@kernel.org,
	anthony@xenproject.org,
	paul@xen.org,
	edgar.iglesias@gmail.com,
	elena.ufimtseva@oracle.com,
	jag.raman@oracle.com,
	sgarzare@redhat.com,
	pbonzini@redhat.com,
	fam@euphon.net,
	philmd@linaro.org,
	alex@shazbot.org,
	clg@redhat.com,
	peterx@redhat.com,
	farosas@suse.de,
	lizhijian@fujitsu.com,
	dave@treblig.org,
	jasowang@redhat.com,
	samuel.thibault@ens-lyon.org,
	michael.roth@amd.com,
	kkostiuk@redhat.com,
	zhao1.liu@intel.com,
	mtosatti@redhat.com,
	rathc@linux.ibm.com,
	palmer@dabbelt.com,
	liwei1518@gmail.com,
	dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com,
	marcandre.lureau@redhat.com,
	qemu-block@nongnu.org,
	qemu-ppc@nongnu.org,
	xen-devel@lists.xenproject.org,
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	qemu-riscv@nongnu.org
Subject: [PATCH v2 14/15] qga/commands-win32: Use error_setg_win32() for better error messages
Date: Fri, 21 Nov 2025 13:14:37 +0100
Message-ID: <20251121121438.1249498-15-armbru@redhat.com>
In-Reply-To: <20251121121438.1249498-1-armbru@redhat.com>
References: <20251121121438.1249498-1-armbru@redhat.com>
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Content-Transfer-Encoding: 8bit
X-Scanned-By: MIMEDefang 3.0 on 10.30.177.17

We include numeric GetLastError() codes in error messages in a few
places, like this:

    error_setg(errp, "GRIPE: %d", (int)GetLastError());

Show text instead, like this:

    error_setg_win32(errp, GetLastError(), "GRIPE");

Signed-off-by: Markus Armbruster 
---
 qga/commands-win32.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/qga/commands-win32.c b/qga/commands-win32.c
index acc2c11589..0fd0c966e4 100644
--- a/qga/commands-win32.c
+++ b/qga/commands-win32.c
@@ -1798,8 +1798,8 @@ void qmp_guest_set_time(bool has_time, int64_t time_ns, Error **errp)
     tf.dwHighDateTime = (DWORD) (time >> 32);
 
     if (!FileTimeToSystemTime(&tf, &ts)) {
-        error_setg(errp, "Failed to convert system time %d",
-                   (int)GetLastError());
+        error_setg_win32(errp, GetLastError(),
+                         "Failed to convert system time");
         return;
     }
 
@@ -1810,7 +1810,8 @@ void qmp_guest_set_time(bool has_time, int64_t time_ns, Error **errp)
     }
 
     if (!SetSystemTime(&ts)) {
-        error_setg(errp, "Failed to set time to guest: %d", (int)GetLastError());
+        error_setg_win32(errp, GetLastError(),
+                         "Failed to set time to guest");
         return;
     }
 }
@@ -1834,13 +1835,12 @@ GuestLogicalProcessorList *qmp_guest_get_vcpus(Error **errp)
         (length > sizeof(SYSTEM_LOGICAL_PROCESSOR_INFORMATION))) {
         ptr = pslpi = g_malloc0(length);
         if (GetLogicalProcessorInformation(pslpi, &length) == FALSE) {
-            error_setg(&local_err, "Failed to get processor information: %d",
-                       (int)GetLastError());
+            error_setg_win32(&local_err, GetLastError(),
+                             "Failed to get processor information");
         }
     } else {
-        error_setg(&local_err,
-                   "Failed to get processor information buffer length: %d",
-                   (int)GetLastError());
+        error_setg_win32(&local_err, GetLastError(),
+                         "Failed to get processor information buffer length");
     }
 
     while ((local_err == NULL) && (length > 0)) {
-- 
2.49.0



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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com,
	zhenwei.pi@linux.dev,
	alistair.francis@wdc.com,
	stefanb@linux.vnet.ibm.com,
	kwolf@redhat.com,
	hreitz@redhat.com,
	sw@weilnetz.de,
	qemu_oss@crudebyte.com,
	groug@kaod.org,
	mst@redhat.com,
	imammedo@redhat.com,
	anisinha@redhat.com,
	kraxel@redhat.com,
	shentey@gmail.com,
	npiggin@gmail.com,
	harshpb@linux.ibm.com,
	sstabellini@kernel.org,
	anthony@xenproject.org,
	paul@xen.org,
	edgar.iglesias@gmail.com,
	elena.ufimtseva@oracle.com,
	jag.raman@oracle.com,
	sgarzare@redhat.com,
	pbonzini@redhat.com,
	fam@euphon.net,
	philmd@linaro.org,
	alex@shazbot.org,
	clg@redhat.com,
	peterx@redhat.com,
	farosas@suse.de,
	lizhijian@fujitsu.com,
	dave@treblig.org,
	jasowang@redhat.com,
	samuel.thibault@ens-lyon.org,
	michael.roth@amd.com,
	kkostiuk@redhat.com,
	zhao1.liu@intel.com,
	mtosatti@redhat.com,
	rathc@linux.ibm.com,
	palmer@dabbelt.com,
	liwei1518@gmail.com,
	dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com,
	marcandre.lureau@redhat.com,
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	qemu-ppc@nongnu.org,
	xen-devel@lists.xenproject.org,
	kvm@vger.kernel.org,
	qemu-riscv@nongnu.org
Subject: [PATCH v2 10/15] error: Use error_setg_file_open() for simplicity and consistency
Date: Fri, 21 Nov 2025 13:14:33 +0100
Message-ID: <20251121121438.1249498-11-armbru@redhat.com>
In-Reply-To: <20251121121438.1249498-1-armbru@redhat.com>
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MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.111

Replace

    error_setg_errno(errp, errno, MSG, FNAME);

by

    error_setg_file_open(errp, errno, FNAME);

where MSG is "Could not open '%s'" or similar.

Also replace equivalent uses of error_setg().

A few messages lose prefixes ("net dump: ", "SEV: ", __func__ ": ").
We could put them back with error_prepend().  Not worth the bother.

Signed-off-by: Markus Armbruster 
Reviewed-by: Dr. David Alan Gilbert 
---
 hw/9pfs/9p-local.c        | 2 +-
 hw/acpi/core.c            | 2 +-
 hw/core/loader.c          | 2 +-
 hw/pci-host/xen_igd_pt.c  | 2 +-
 monitor/hmp-cmds-target.c | 2 +-
 net/dump.c                | 2 +-
 net/tap-bsd.c             | 6 +++---
 net/tap-linux.c           | 2 +-
 target/i386/sev.c         | 6 ++----
 util/vfio-helpers.c       | 5 ++---
 10 files changed, 14 insertions(+), 17 deletions(-)

diff --git a/hw/9pfs/9p-local.c b/hw/9pfs/9p-local.c
index 31e216227c..376b377698 100644
--- a/hw/9pfs/9p-local.c
+++ b/hw/9pfs/9p-local.c
@@ -1456,7 +1456,7 @@ static int local_init(FsContext *ctx, Error **errp)
 
     data->mountfd = open(ctx->fs_root, O_DIRECTORY | O_RDONLY);
     if (data->mountfd == -1) {
-        error_setg_errno(errp, errno, "failed to open '%s'", ctx->fs_root);
+        error_setg_file_open(errp, errno, ctx->fs_root);
         goto err;
     }
 
diff --git a/hw/acpi/core.c b/hw/acpi/core.c
index ff16582803..d2677332af 100644
--- a/hw/acpi/core.c
+++ b/hw/acpi/core.c
@@ -277,7 +277,7 @@ void acpi_table_add(const QemuOpts *opts, Error **errp)
         int fd = open(*cur, O_RDONLY | O_BINARY);
 
         if (fd < 0) {
-            error_setg(errp, "can't open file %s: %s", *cur, strerror(errno));
+            error_setg_file_open(errp, errno, *cur);
             goto out;
         }
 
diff --git a/hw/core/loader.c b/hw/core/loader.c
index 590c5b02aa..b56e5eb2f5 100644
--- a/hw/core/loader.c
+++ b/hw/core/loader.c
@@ -379,7 +379,7 @@ void load_elf_hdr(const char *filename, void *hdr, bool *is64, Error **errp)
 
     fd = open(filename, O_RDONLY | O_BINARY);
     if (fd < 0) {
-        error_setg_errno(errp, errno, "Failed to open file: %s", filename);
+        error_setg_file_open(errp, errno, filename);
         return;
     }
     if (read(fd, hdr, EI_NIDENT) != EI_NIDENT) {
diff --git a/hw/pci-host/xen_igd_pt.c b/hw/pci-host/xen_igd_pt.c
index 5dd17ef236..f6016f2cd5 100644
--- a/hw/pci-host/xen_igd_pt.c
+++ b/hw/pci-host/xen_igd_pt.c
@@ -55,7 +55,7 @@ static void host_pci_config_read(int pos, int len, uint32_t *val, Error **errp)
 
     config_fd = open(path, O_RDWR);
     if (config_fd < 0) {
-        error_setg_errno(errp, errno, "Failed to open: %s", path);
+        error_setg_file_open(errp, errno, path);
         goto out;
     }
 
diff --git a/monitor/hmp-cmds-target.c b/monitor/hmp-cmds-target.c
index e982061146..ad4ed2167d 100644
--- a/monitor/hmp-cmds-target.c
+++ b/monitor/hmp-cmds-target.c
@@ -331,7 +331,7 @@ static uint64_t vtop(void *ptr, Error **errp)
 
     fd = open("/proc/self/pagemap", O_RDONLY);
     if (fd == -1) {
-        error_setg_errno(errp, errno, "Cannot open /proc/self/pagemap");
+        error_setg_file_open(errp, errno, "/proc/self/pagemap");
         return -1;
     }
 
diff --git a/net/dump.c b/net/dump.c
index 581234b775..0c39f09892 100644
--- a/net/dump.c
+++ b/net/dump.c
@@ -111,7 +111,7 @@ static int net_dump_state_init(DumpState *s, const char *filename,
 
     fd = open(filename, O_CREAT | O_TRUNC | O_WRONLY | O_BINARY, 0644);
     if (fd < 0) {
-        error_setg_errno(errp, errno, "net dump: can't open %s", filename);
+        error_setg_file_open(errp, errno, filename);
         return -1;
     }
 
diff --git a/net/tap-bsd.c b/net/tap-bsd.c
index bbf84d1828..3fd300d46f 100644
--- a/net/tap-bsd.c
+++ b/net/tap-bsd.c
@@ -68,7 +68,7 @@ int tap_open(char *ifname, int ifname_size, int *vnet_hdr,
         }
     }
     if (fd < 0) {
-        error_setg_errno(errp, errno, "could not open %s", dname);
+        error_setg_file_open(errp, errno, dname);
         return -1;
     }
 
@@ -118,7 +118,7 @@ static int tap_open_clone(char *ifname, int ifname_size, Error **errp)
 
     fd = RETRY_ON_EINTR(open(PATH_NET_TAP, O_RDWR));
     if (fd < 0) {
-        error_setg_errno(errp, errno, "could not open %s", PATH_NET_TAP);
+        error_setg_file_open(errp, errno, PATH_NET_TAP);
         return -1;
     }
 
@@ -166,7 +166,7 @@ int tap_open(char *ifname, int ifname_size, int *vnet_hdr,
         snprintf(dname, sizeof dname, "/dev/%s", ifname);
         fd = RETRY_ON_EINTR(open(dname, O_RDWR));
         if (fd < 0 && errno != ENOENT) {
-            error_setg_errno(errp, errno, "could not open %s", dname);
+            error_setg_file_open(errp, errno, dname);
             return -1;
         }
     }
diff --git a/net/tap-linux.c b/net/tap-linux.c
index 2a90b58467..909c4f1fcf 100644
--- a/net/tap-linux.c
+++ b/net/tap-linux.c
@@ -57,7 +57,7 @@ int tap_open(char *ifname, int ifname_size, int *vnet_hdr,
     if (fd < 0) {
         fd = RETRY_ON_EINTR(open(PATH_NET_TUN, O_RDWR));
         if (fd < 0) {
-            error_setg_errno(errp, errno, "could not open %s", PATH_NET_TUN);
+            error_setg_file_open(errp, errno, PATH_NET_TUN);
             return -1;
         }
     }
diff --git a/target/i386/sev.c b/target/i386/sev.c
index fd2dada013..8660ecd9e4 100644
--- a/target/i386/sev.c
+++ b/target/i386/sev.c
@@ -891,8 +891,7 @@ static SevCapability *sev_get_capabilities(Error **errp)
 
     fd = open(sev_device, O_RDWR);
     if (fd < 0) {
-        error_setg_errno(errp, errno, "SEV: Failed to open %s",
-                         sev_device);
+        error_setg_file_open(errp, errno, sev_device);
         g_free(sev_device);
         return NULL;
     }
@@ -1819,8 +1818,7 @@ static int sev_common_kvm_init(ConfidentialGuestSupport *cgs, Error **errp)
     devname = object_property_get_str(OBJECT(sev_common), "sev-device", NULL);
     sev_common->sev_fd = open(devname, O_RDWR);
     if (sev_common->sev_fd < 0) {
-        error_setg(errp, "%s: Failed to open %s '%s'", __func__,
-                   devname, strerror(errno));
+        error_setg_file_open(errp, errno, devname);
         g_free(devname);
         return -1;
     }
diff --git a/util/vfio-helpers.c b/util/vfio-helpers.c
index fdff042ab4..8b1b2e2f05 100644
--- a/util/vfio-helpers.c
+++ b/util/vfio-helpers.c
@@ -309,7 +309,7 @@ static int qemu_vfio_init_pci(QEMUVFIOState *s, const char *device,
     s->container = open("/dev/vfio/vfio", O_RDWR);
 
     if (s->container == -1) {
-        error_setg_errno(errp, errno, "Failed to open /dev/vfio/vfio");
+        error_setg_file_open(errp, errno, "/dev/vfio/vfio");
         return -errno;
     }
     if (ioctl(s->container, VFIO_GET_API_VERSION) != VFIO_API_VERSION) {
@@ -333,8 +333,7 @@ static int qemu_vfio_init_pci(QEMUVFIOState *s, const char *device,
 
     s->group = open(group_file, O_RDWR);
     if (s->group == -1) {
-        error_setg_errno(errp, errno, "Failed to open VFIO group file: %s",
-                         group_file);
+        error_setg_file_open(errp, errno, group_file);
         g_free(group_file);
         ret = -errno;
         goto fail_container;
-- 
2.49.0



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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com,
	zhenwei.pi@linux.dev,
	alistair.francis@wdc.com,
	stefanb@linux.vnet.ibm.com,
	kwolf@redhat.com,
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	qemu_oss@crudebyte.com,
	groug@kaod.org,
	mst@redhat.com,
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Subject: [PATCH v2 11/15] net/slirp: Improve file open error message
Date: Fri, 21 Nov 2025 13:14:34 +0100
Message-ID: <20251121121438.1249498-12-armbru@redhat.com>
In-Reply-To: <20251121121438.1249498-1-armbru@redhat.com>
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This error reports failure to create a temporary file, and
error_setg_file_open() would probably be too terse, so merely switch
to error_setg_errno() to add errno information.

Signed-off-by: Markus Armbruster 
---
 net/slirp.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/net/slirp.c b/net/slirp.c
index 120eef6122..5996fec512 100644
--- a/net/slirp.c
+++ b/net/slirp.c
@@ -1034,8 +1034,10 @@ static int slirp_smb(SlirpState* s, const char *exported_dir,
 
     f = fopen(smb_conf, "w");
     if (!f) {
+        int eno = errno;
+
         slirp_smb_cleanup(s);
-        error_setg(errp,
+        error_setg_errno(errp, eno,
                    "Could not create samba server configuration file '%s'",
                     smb_conf);
         g_free(smb_conf);
-- 
2.49.0



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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com,
	zhenwei.pi@linux.dev,
	alistair.francis@wdc.com,
	stefanb@linux.vnet.ibm.com,
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	sw@weilnetz.de,
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	groug@kaod.org,
	mst@redhat.com,
	imammedo@redhat.com,
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	harshpb@linux.ibm.com,
	sstabellini@kernel.org,
	anthony@xenproject.org,
	paul@xen.org,
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	samuel.thibault@ens-lyon.org,
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Subject: [PATCH v2 08/15] net/tap: Use error_setg_file_open() for a better error message
Date: Fri, 21 Nov 2025 13:14:31 +0100
Message-ID: <20251121121438.1249498-9-armbru@redhat.com>
In-Reply-To: <20251121121438.1249498-1-armbru@redhat.com>
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The error message changes from

    tap: open vhost char device failed

to

    Could not open '/dev/vhost-net': REASON

I think the exact file name is more useful to know than the file's
purpose.

We could put back the "tap: " prefix with error_prepend().  Not
worth the bother.

Signed-off-by: Markus Armbruster 
---
 net/tap.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/net/tap.c b/net/tap.c
index abe3b2d036..bfba3fd7a7 100644
--- a/net/tap.c
+++ b/net/tap.c
@@ -747,8 +747,7 @@ static void net_init_tap_one(const NetdevTapOptions *tap, NetClientState *peer,
         } else {
             vhostfd = open("/dev/vhost-net", O_RDWR);
             if (vhostfd < 0) {
-                error_setg_errno(errp, errno,
-                                 "tap: open vhost char device failed");
+                error_setg_file_open(errp, errno, "/dev/vhost-net");
                 goto failed;
             }
             if (!qemu_set_blocking(vhostfd, false, errp)) {
-- 
2.49.0



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To: qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com,
	zhenwei.pi@linux.dev,
	alistair.francis@wdc.com,
	stefanb@linux.vnet.ibm.com,
	kwolf@redhat.com,
	hreitz@redhat.com,
	sw@weilnetz.de,
	qemu_oss@crudebyte.com,
	groug@kaod.org,
	mst@redhat.com,
	imammedo@redhat.com,
	anisinha@redhat.com,
	kraxel@redhat.com,
	shentey@gmail.com,
	npiggin@gmail.com,
	harshpb@linux.ibm.com,
	sstabellini@kernel.org,
	anthony@xenproject.org,
	paul@xen.org,
	edgar.iglesias@gmail.com,
	elena.ufimtseva@oracle.com,
	jag.raman@oracle.com,
	sgarzare@redhat.com,
	pbonzini@redhat.com,
	fam@euphon.net,
	philmd@linaro.org,
	alex@shazbot.org,
	clg@redhat.com,
	peterx@redhat.com,
	farosas@suse.de,
	lizhijian@fujitsu.com,
	dave@treblig.org,
	jasowang@redhat.com,
	samuel.thibault@ens-lyon.org,
	michael.roth@amd.com,
	kkostiuk@redhat.com,
	zhao1.liu@intel.com,
	mtosatti@redhat.com,
	rathc@linux.ibm.com,
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	liwei1518@gmail.com,
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	xen-devel@lists.xenproject.org,
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	qemu-riscv@nongnu.org
Subject: [PATCH v2 12/15] error: Use error_setg_errno() to improve error messages
Date: Fri, 21 Nov 2025 13:14:35 +0100
Message-ID: <20251121121438.1249498-13-armbru@redhat.com>
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A few error messages show numeric errno codes.  Use error_setg_errno()
to show human-readable text instead.

Signed-off-by: Markus Armbruster 
---
 backends/cryptodev-lkcf.c   |  2 +-
 hw/ppc/spapr.c              |  6 +++---
 hw/vfio/migration-multifd.c |  5 +++--
 migration/rdma.c            |  3 +--
 net/l2tpv3.c                |  6 ++----
 target/riscv/kvm/kvm-cpu.c  | 11 ++++++-----
 6 files changed, 16 insertions(+), 17 deletions(-)

diff --git a/backends/cryptodev-lkcf.c b/backends/cryptodev-lkcf.c
index 97a8a8812c..40c7bd3c5a 100644
--- a/backends/cryptodev-lkcf.c
+++ b/backends/cryptodev-lkcf.c
@@ -218,7 +218,7 @@ static void cryptodev_lkcf_init(CryptoDevBackend *backend, Error **errp)
     }
     lkcf->eventfd = eventfd(0, 0);
     if (lkcf->eventfd < 0) {
-        error_setg(errp, "Failed to create eventfd: %d", errno);
+        error_setg_errno(errp, errno, "Failed to create eventfd");
         return;
     }
 
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 99b843ba2f..cdab822c88 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -2699,9 +2699,9 @@ static void spapr_set_vsmt_mode(SpaprMachineState *spapr, Error **errp)
         ret = kvmppc_set_smt_threads(spapr->vsmt);
         if (ret) {
             /* Looks like KVM isn't able to change VSMT mode */
-            error_setg(&local_err,
-                       "Failed to set KVM's VSMT mode to %d (errno %d)",
-                       spapr->vsmt, ret);
+            error_setg_errno(&local_err, -ret,
+                             "Failed to set KVM's VSMT mode to %d",
+                             spapr->vsmt);
             /* We can live with that if the default one is big enough
              * for the number of threads, and a submultiple of the one
              * we want.  In this case we'll waste some vcpu ids, but
diff --git a/hw/vfio/migration-multifd.c b/hw/vfio/migration-multifd.c
index e4785031a7..4a855f4e12 100644
--- a/hw/vfio/migration-multifd.c
+++ b/hw/vfio/migration-multifd.c
@@ -725,8 +725,9 @@ vfio_multifd_save_complete_precopy_thread(SaveCompletePrecopyThreadData *d,
         data_size = read(migration->data_fd, &packet->data,
                          migration->data_buffer_size);
         if (data_size < 0) {
-            error_setg(errp, "%s: reading state buffer %" PRIu32 " failed: %d",
-                       vbasedev->name, idx, errno);
+            error_setg_errno(errp, errno,
+                             "%s: reading state buffer %" PRIu32 " failed",
+                             vbasedev->name, idx);
             goto thread_exit;
         } else if (data_size == 0) {
             break;
diff --git a/migration/rdma.c b/migration/rdma.c
index 337b415889..9e301cf917 100644
--- a/migration/rdma.c
+++ b/migration/rdma.c
@@ -2349,8 +2349,7 @@ static int qemu_get_cm_event_timeout(RDMAContext *rdma,
         error_setg(errp, "RDMA ERROR: poll cm event timeout");
         return -1;
     } else if (ret < 0) {
-        error_setg(errp, "RDMA ERROR: failed to poll cm event, errno=%i",
-                   errno);
+        error_setg_errno(errp, errno, "RDMA ERROR: failed to poll cm event");
         return -1;
     } else if (poll_fd.revents & POLLIN) {
         if (rdma_get_cm_event(rdma->channel, cm_event) < 0) {
diff --git a/net/l2tpv3.c b/net/l2tpv3.c
index cdfc641aa6..3044fa4608 100644
--- a/net/l2tpv3.c
+++ b/net/l2tpv3.c
@@ -639,13 +639,11 @@ int net_init_l2tpv3(const Netdev *netdev,
     }
     fd = socket(result->ai_family, result->ai_socktype, result->ai_protocol);
     if (fd == -1) {
-        fd = -errno;
-        error_setg(errp, "socket creation failed, errno = %d",
-                   -fd);
+        error_setg_errno(errp, errno, "socket creation failed");
         goto outerr;
     }
     if (bind(fd, (struct sockaddr *) result->ai_addr, result->ai_addrlen)) {
-        error_setg(errp, "could not bind socket err=%i", errno);
+        error_setg_errno(errp, errno, "could not bind socket");
         goto outerr;
     }
     if (!qemu_set_blocking(fd, false, errp)) {
diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c
index 47e672c7aa..c73f1cd5cf 100644
--- a/target/riscv/kvm/kvm-cpu.c
+++ b/target/riscv/kvm/kvm-cpu.c
@@ -1996,8 +1996,8 @@ static bool kvm_cpu_realize(CPUState *cs, Error **errp)
     if (riscv_has_ext(&cpu->env, RVV)) {
         ret = prctl(PR_RISCV_V_SET_CONTROL, PR_RISCV_V_VSTATE_CTRL_ON);
         if (ret) {
-            error_setg(errp, "Error in prctl PR_RISCV_V_SET_CONTROL, code: %s",
-                       strerrorname_np(errno));
+            error_setg_errno(errp, errno,
+                             "Error in prctl PR_RISCV_V_SET_CONTROL");
             return false;
         }
     }
@@ -2032,7 +2032,8 @@ void riscv_kvm_cpu_finalize_features(RISCVCPU *cpu, Error **errp)
         reg.addr = (uint64_t)&val;
         ret = ioctl(kvmcpu.cpufd, KVM_GET_ONE_REG, ®);
         if (ret != 0) {
-            error_setg(errp, "Unable to read cbom_blocksize, error %d", errno);
+            error_setg(errp, errno,
+                       "Unable to read cbom_blocksize");
             return;
         }
 
@@ -2051,7 +2052,7 @@ void riscv_kvm_cpu_finalize_features(RISCVCPU *cpu, Error **errp)
         reg.addr = (uint64_t)&val;
         ret = ioctl(kvmcpu.cpufd, KVM_GET_ONE_REG, ®);
         if (ret != 0) {
-            error_setg(errp, "Unable to read cboz_blocksize, error %d", errno);
+            error_setg_errno(errp, errno, "Unable to read cboz_blocksize");
             return;
         }
 
@@ -2073,7 +2074,7 @@ void riscv_kvm_cpu_finalize_features(RISCVCPU *cpu, Error **errp)
         reg.addr = (uint64_t)&val;
         ret = ioctl(kvmcpu.cpufd, KVM_GET_ONE_REG, ®);
         if (ret != 0) {
-            error_setg(errp, "Unable to read vlenb register, error %d", errno);
+            error_setg_errno(errp, errno, "Unable to read vlenb register");
             return;
         }
 
-- 
2.49.0



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From: Markus Armbruster 
To: qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com,
	zhenwei.pi@linux.dev,
	alistair.francis@wdc.com,
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Subject: [PATCH v2 15/15] block/file-win32: Improve an error message
Date: Fri, 21 Nov 2025 13:14:38 +0100
Message-ID: <20251121121438.1249498-16-armbru@redhat.com>
In-Reply-To: <20251121121438.1249498-1-armbru@redhat.com>
References: <20251121121438.1249498-1-armbru@redhat.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
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Two out of three calls of CreateFile() use error_setg_win32() to
report errors.  The third uses error_setg_errno(), mapping
ERROR_ACCESS_DENIED to EACCES, and everything else to EINVAL, throwing
away detail.  Switch it to error_setg_win32().

Signed-off-by: Markus Armbruster 
---
 block/file-win32.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/block/file-win32.c b/block/file-win32.c
index 0efb609e1d..78961837c8 100644
--- a/block/file-win32.c
+++ b/block/file-win32.c
@@ -904,7 +904,7 @@ static int hdev_open(BlockDriverState *bs, QDict *options, int flags,
         } else {
             ret = -EINVAL;
         }
-        error_setg_errno(errp, -ret, "Could not open device");
+        error_setg_win32(errp, err, "Could not open device");
         goto done;
     }
 
-- 
2.49.0



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From: Juergen Gross 
To: xen-devel@lists.xenproject.org
Cc: Juergen Gross ,
	Anthony PERARD 
Subject: [PATCH v3 2/4] docs: replace @xxx@ markers at build time
Date: Fri, 21 Nov 2025 14:23:30 +0100
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Use the apply-build-vars make macro to replace the @xxx@ markers in
*.in files only at build time.

This allows to change the affected document files without having to
run "configure" for making the change effective.

While at it add the generated files to the distclean make target.

Signed-off-by: Juergen Gross 
---
V2:
- don't rename source files
V3:
- rename IN_FILES to IN_TARGETS (Jan Beulich)
- add only one file to IN_TARGETS per line (Andrew Cooper)
- use $(RM) instead of rm -f (Andrew Cooper)
---
 docs/Makefile     | 11 ++++++++++-
 docs/configure    |  7 +------
 docs/configure.ac |  9 +--------
 3 files changed, 12 insertions(+), 15 deletions(-)

diff --git a/docs/Makefile b/docs/Makefile
index 37776d303c..8e68300e3b 100644
--- a/docs/Makefile
+++ b/docs/Makefile
@@ -8,8 +8,14 @@ DATE		:= $(call date,"+%Y-%m-%d")
 DOC_ARCHES      := arm ppc riscv x86_32 x86_64
 MAN_SECTIONS    := 1 5 7 8
 
+IN_TARGETS := man/xl-disk-configuration.5.pod
+IN_TARGETS += man/xl-network-configuration.5.pod
+IN_TARGETS += man/xl.1.pod
+IN_TARGETS += man/xl.cfg.5.pod
+IN_TARGETS += man/xl.conf.5.pod
+
 # Documentation sources to build
-MAN-SRC-y := $(sort $(basename $(wildcard man/*.pod man/*.pandoc)))
+MAN-SRC-y := $(sort $(basename $(wildcard man/*.pod man/*.pandoc) $(IN_TARGETS)))
 
 RST-SRC-y := $(sort $(filter-out %index.rst,$(shell find * -type f -name '*.rst' -print)))
 
@@ -77,11 +83,14 @@ clean: clean-man-pages
 distclean: clean
 	rm -rf $(XEN_ROOT)/config/Docs.mk config.log config.status config.cache \
 		autom4te.cache
+	$(RM) $(IN_TARGETS)
 
 # Top level install targets
 
 .PHONY: man-pages install-man-pages clean-man-pages uninstall-man-pages
 
+$(foreach file,$(IN_TARGETS),$(eval $(call apply-build-vars,$(file))))
+
 # Metarules for generating manpages.  Run with $(1) substitued for section
 define GENERATE_MANPAGE_RULES
 
diff --git a/docs/configure b/docs/configure
index 98dda3cd0f..8871914dcb 100755
--- a/docs/configure
+++ b/docs/configure
@@ -1794,7 +1794,7 @@ ac_compiler_gnu=$ac_cv_c_compiler_gnu
 
 
 
-ac_config_files="$ac_config_files ../config/Docs.mk man/xl.cfg.5.pod man/xl.1.pod man/xl-disk-configuration.5.pod man/xl-network-configuration.5.pod man/xl.conf.5.pod"
+ac_config_files="$ac_config_files ../config/Docs.mk"
 
 
 
@@ -3063,11 +3063,6 @@ for ac_config_target in $ac_config_targets
 do
   case $ac_config_target in
     "../config/Docs.mk") CONFIG_FILES="$CONFIG_FILES ../config/Docs.mk" ;;
-    "man/xl.cfg.5.pod") CONFIG_FILES="$CONFIG_FILES man/xl.cfg.5.pod" ;;
-    "man/xl.1.pod") CONFIG_FILES="$CONFIG_FILES man/xl.1.pod" ;;
-    "man/xl-disk-configuration.5.pod") CONFIG_FILES="$CONFIG_FILES man/xl-disk-configuration.5.pod" ;;
-    "man/xl-network-configuration.5.pod") CONFIG_FILES="$CONFIG_FILES man/xl-network-configuration.5.pod" ;;
-    "man/xl.conf.5.pod") CONFIG_FILES="$CONFIG_FILES man/xl.conf.5.pod" ;;
 
   *) as_fn_error $? "invalid argument: \`$ac_config_target'" "$LINENO" 5;;
   esac
diff --git a/docs/configure.ac b/docs/configure.ac
index c2e5edd3b3..43dc516056 100644
--- a/docs/configure.ac
+++ b/docs/configure.ac
@@ -5,14 +5,7 @@ AC_PREREQ([2.67])
 AC_INIT([Xen Hypervisor Documentation], m4_esyscmd([../version.sh ../xen/Makefile]),
     [xen-devel@lists.xen.org], [xen], [https://www.xen.org/])
 AC_CONFIG_SRCDIR([misc/xen-command-line.pandoc])
-AC_CONFIG_FILES([
-../config/Docs.mk
-man/xl.cfg.5.pod
-man/xl.1.pod
-man/xl-disk-configuration.5.pod
-man/xl-network-configuration.5.pod
-man/xl.conf.5.pod
-])
+AC_CONFIG_FILES([../config/Docs.mk])
 AC_CONFIG_AUX_DIR([../])
 
 # M4 Macro includes
-- 
2.51.0



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From: Juergen Gross 
To: xen-devel@lists.xenproject.org
Cc: Juergen Gross ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Christian Lindig ,
	David Scott 
Subject: [PATCH v3 0/4] configure: reduce number of files created
Date: Fri, 21 Nov 2025 14:23:28 +0100
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Instead of creating lots of files during configure, create those
files (where possible) rather at build time. This reduces the need
to run configure when e.g. changing a man page containing a path
defined by the configure run.

Changes in V2:
- dropped patch 1 as already applied
- no longer rename files to *.src
- don't use pattern rule

Changes in V3:
- addressed comments by Jan and Andrew

Juergen Gross (4):
  build: add make macro for making file from file.in
  docs: replace @xxx@ markers at build time
  config: remove unused paths from config/Paths.mk.in
  tools: replace @xxx@ markers at build time

 .gitignore                     |  1 +
 Config.mk                      | 13 +++++++++++++
 config/Paths.mk.in             |  6 ------
 config/Tools-paths.mk.in       | 10 ++++++++++
 docs/Makefile                  | 11 ++++++++++-
 docs/configure                 |  7 +------
 docs/configure.ac              |  9 +--------
 tools/Rules.mk                 |  4 ++++
 tools/configure                | 21 ++-------------------
 tools/configure.ac             | 19 +------------------
 tools/hotplug/FreeBSD/Makefile | 13 +++++++++++--
 tools/hotplug/Linux/Makefile   | 21 +++++++++++++++++++--
 tools/hotplug/NetBSD/Makefile  | 13 +++++++++++--
 tools/hotplug/common/Makefile  | 10 +++++++++-
 tools/ocaml/libs/xs/Makefile   |  9 +++++++++
 tools/ocaml/xenstored/Makefile | 10 +++++++++-
 16 files changed, 111 insertions(+), 66 deletions(-)
 create mode 100644 config/Tools-paths.mk.in

-- 
2.51.0



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From: Juergen Gross 
To: xen-devel@lists.xenproject.org
Cc: Juergen Gross ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v3 1/4] build: add make macro for making file from file.in
Date: Fri, 21 Nov 2025 14:23:29 +0100
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Add a new make macro for creating  from .in at build
time. To be used like this:

$(foreach file,$(IN_TARGETS),$(eval $(call apply-build-vars,$(file))))

This can be used instead of the current approach to perform the similar
step for file.in during ./configure.

This will avoid having to run ./configure just because of modifying a
file depending on a variable set by configure.

Prepare to have multiple files as source for the replacement patterns.

Signed-off-by: Juergen Gross 
---
V2:
- don't use pattern rule, but create explicit dependency in macro,
  don't require to rename source files (Jan Beulich, Andrew Cooper)
V3:
- prepare for $(PATH_FILES) to be extended by other Makefile
- let generated file depend on $(INC_FILES)
---
 Config.mk | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/Config.mk b/Config.mk
index e1556dfbfa..39e8007b9c 100644
--- a/Config.mk
+++ b/Config.mk
@@ -159,6 +159,19 @@ define move-if-changed
 	if ! cmp -s $(1) $(2); then mv -f $(1) $(2); else rm -f $(1); fi
 endef
 
+PATH_FILES := Paths
+INC_FILES = $(foreach f, $(PATH_FILES), $(XEN_ROOT)/config/$(f).mk)
+
+include $(INC_FILES)
+
+BUILD_MAKE_VARS = $(foreach f, $(PATH_FILES), $(shell awk '$$2 == ":=" { print $$1; }' $(XEN_ROOT)/config/$(f).mk.in))
+
+# Replace @xxx@ markers in $(1).in with $(xxx) variable contents, write to $(1)
+define apply-build-vars
+ $(1): $(1).in $$(INC_FILES)
+	sed $$(foreach v, $$(BUILD_MAKE_VARS), -e 's#@$$(v)@#$$($$(v))#g') <$$< >$$@
+endef
+
 CFLAGS += -fno-strict-aliasing
 
 CFLAGS += -std=gnu99
-- 
2.51.0



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From: Juergen Gross 
To: xen-devel@lists.xenproject.org
Cc: Juergen Gross ,
	Anthony PERARD 
Subject: [PATCH v3 3/4] config: remove unused paths from config/Paths.mk.in
Date: Fri, 21 Nov 2025 14:23:31 +0100
Message-ID: <20251121132332.23514-4-jgross@suse.com>
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Some paths in config/Paths.mk.in are used nowhere, so remove them.

Signed-off-by: Juergen Gross 
---
V3:
- remove htmldir, too (Andrew Cooper)
---
 config/Paths.mk.in | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/config/Paths.mk.in b/config/Paths.mk.in
index bc42748b7a..6aa392b9f2 100644
--- a/config/Paths.mk.in
+++ b/config/Paths.mk.in
@@ -20,10 +20,6 @@ libexecdir               := @libexecdir@
 datarootdir              := @datarootdir@
 mandir                   := @mandir@
 docdir                   := @docdir@
-dvidir                   := @dvidir@
-htmldir                  := @htmldir@
-pdfdir                   := @pdfdir@
-psdir                    := @psdir@
 includedir               := @includedir@
 localstatedir            := @localstatedir@
 sysconfdir               := @sysconfdir@
@@ -34,8 +30,6 @@ LIBEXEC_LIB              := @LIBEXEC_LIB@
 LIBEXEC_INC              := @LIBEXEC_INC@
 
 SHAREDIR                 := @SHAREDIR@
-MAN1DIR                  := $(mandir)/man1
-MAN8DIR                  := $(mandir)/man8
 
 XEN_RUN_DIR              := @XEN_RUN_DIR@
 XEN_LOG_DIR              := @XEN_LOG_DIR@
-- 
2.51.0



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From: Juergen Gross 
To: xen-devel@lists.xenproject.org
Cc: Juergen Gross ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Christian Lindig ,
	David Scott 
Subject: [PATCH v3 4/4] tools: replace @xxx@ markers at build time
Date: Fri, 21 Nov 2025 14:23:32 +0100
Message-ID: <20251121132332.23514-5-jgross@suse.com>
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Use the apply-build-vars make macro to replace the @xxx@ markers in
most *.in files only at build time.

As some of the markers are local to tools/configure, introduce
config/Tools-paths.mk.in and add the related make variables to it.
Add Tools-paths to the PATH_FILES make variable in order to include
the definitions for replacing them in the *.in files.

Add the generated files to the distclean target.

Signed-off-by: Juergen Gross 
---
V2:
- don't rename source files
V3:
- add Tools-paths to PATH_FILES only in tools/Rules.mk (Jan Beulich)
- rename IN_FILES to IN_TARGETS (Jan Beulich)
- add only one file to IN_TARGETS per line (Andrew Cooper)
- add build target depending on generated files (Andrew Cooper)
- use $(RM) instead of rm -f (Andrew Cooper)
---
 .gitignore                     |  1 +
 config/Tools-paths.mk.in       | 10 ++++++++++
 tools/Rules.mk                 |  4 ++++
 tools/configure                | 21 ++-------------------
 tools/configure.ac             | 19 +------------------
 tools/hotplug/FreeBSD/Makefile | 13 +++++++++++--
 tools/hotplug/Linux/Makefile   | 21 +++++++++++++++++++--
 tools/hotplug/NetBSD/Makefile  | 13 +++++++++++--
 tools/hotplug/common/Makefile  | 10 +++++++++-
 tools/ocaml/libs/xs/Makefile   |  9 +++++++++
 tools/ocaml/xenstored/Makefile | 10 +++++++++-
 11 files changed, 86 insertions(+), 45 deletions(-)
 create mode 100644 config/Tools-paths.mk.in

diff --git a/.gitignore b/.gitignore
index d83427aba8..57d54f676f 100644
--- a/.gitignore
+++ b/.gitignore
@@ -47,6 +47,7 @@ config.status
 config.cache
 config/Toplevel.mk
 config/Paths.mk
+config/Tools-paths.mk
 
 dist/*
 extras/
diff --git a/config/Tools-paths.mk.in b/config/Tools-paths.mk.in
new file mode 100644
index 0000000000..ac6298e761
--- /dev/null
+++ b/config/Tools-paths.mk.in
@@ -0,0 +1,10 @@
+-include $(XEN_ROOT)/config/Paths.mk
+
+XENSTORED                := @XENSTORED@
+XENSTORED_KVA            := @XENSTORED_KVA@
+XENSTORED_PORT           := @XENSTORED_PORT@
+XEN_RUN_STORED           := @XEN_RUN_STORED@
+
+LINUX_BACKEND_MODULES    := @LINUX_BACKEND_MODULES@
+
+qemu_xen_path            := @qemu_xen_path@
diff --git a/tools/Rules.mk b/tools/Rules.mk
index 725c3c32e9..c3afc836ba 100644
--- a/tools/Rules.mk
+++ b/tools/Rules.mk
@@ -11,6 +11,10 @@ XEN_FULLVERSION=$(shell env \
     XEN_VENDORVERSION=$(XEN_VENDORVERSION) \
     $(SHELL) $(XEN_ROOT)/version.sh --full $(XEN_ROOT)/xen/Makefile)
 
+PATH_FILES += Tools-paths
+
+-include $(XEN_ROOT)/config/Tools-paths.mk
+
 export _INSTALL := $(INSTALL)
 INSTALL = $(XEN_ROOT)/tools/cross-install
 
diff --git a/tools/configure b/tools/configure
index 3111f5688c..479c7c9a3c 100755
--- a/tools/configure
+++ b/tools/configure
@@ -2742,7 +2742,7 @@ ac_compiler_gnu=$ac_cv_c_compiler_gnu
 
 
 
-ac_config_files="$ac_config_files ../config/Tools.mk hotplug/common/hotplugpath.sh hotplug/FreeBSD/rc.d/xencommons hotplug/FreeBSD/rc.d/xendriverdomain hotplug/Linux/init.d/sysconfig.xencommons hotplug/Linux/init.d/sysconfig.xendomains hotplug/Linux/init.d/xen-watchdog hotplug/Linux/init.d/xencommons hotplug/Linux/init.d/xendomains hotplug/Linux/init.d/xendriverdomain hotplug/Linux/launch-xenstore hotplug/Linux/vif-setup hotplug/Linux/xen-hotplug-common.sh hotplug/Linux/xendomains hotplug/NetBSD/rc.d/xencommons hotplug/NetBSD/rc.d/xendriverdomain ocaml/libs/xs/paths.ml ocaml/xenstored/paths.ml ocaml/xenstored/oxenstored.conf"
+ac_config_files="$ac_config_files ../config/Tools.mk ../config/Tools-paths.mk"
 
 ac_config_headers="$ac_config_headers config.h"
 
@@ -11268,24 +11268,7 @@ for ac_config_target in $ac_config_targets
 do
   case $ac_config_target in
     "../config/Tools.mk") CONFIG_FILES="$CONFIG_FILES ../config/Tools.mk" ;;
-    "hotplug/common/hotplugpath.sh") CONFIG_FILES="$CONFIG_FILES hotplug/common/hotplugpath.sh" ;;
-    "hotplug/FreeBSD/rc.d/xencommons") CONFIG_FILES="$CONFIG_FILES hotplug/FreeBSD/rc.d/xencommons" ;;
-    "hotplug/FreeBSD/rc.d/xendriverdomain") CONFIG_FILES="$CONFIG_FILES hotplug/FreeBSD/rc.d/xendriverdomain" ;;
-    "hotplug/Linux/init.d/sysconfig.xencommons") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/init.d/sysconfig.xencommons" ;;
-    "hotplug/Linux/init.d/sysconfig.xendomains") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/init.d/sysconfig.xendomains" ;;
-    "hotplug/Linux/init.d/xen-watchdog") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/init.d/xen-watchdog" ;;
-    "hotplug/Linux/init.d/xencommons") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/init.d/xencommons" ;;
-    "hotplug/Linux/init.d/xendomains") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/init.d/xendomains" ;;
-    "hotplug/Linux/init.d/xendriverdomain") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/init.d/xendriverdomain" ;;
-    "hotplug/Linux/launch-xenstore") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/launch-xenstore" ;;
-    "hotplug/Linux/vif-setup") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/vif-setup" ;;
-    "hotplug/Linux/xen-hotplug-common.sh") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/xen-hotplug-common.sh" ;;
-    "hotplug/Linux/xendomains") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/xendomains" ;;
-    "hotplug/NetBSD/rc.d/xencommons") CONFIG_FILES="$CONFIG_FILES hotplug/NetBSD/rc.d/xencommons" ;;
-    "hotplug/NetBSD/rc.d/xendriverdomain") CONFIG_FILES="$CONFIG_FILES hotplug/NetBSD/rc.d/xendriverdomain" ;;
-    "ocaml/libs/xs/paths.ml") CONFIG_FILES="$CONFIG_FILES ocaml/libs/xs/paths.ml" ;;
-    "ocaml/xenstored/paths.ml") CONFIG_FILES="$CONFIG_FILES ocaml/xenstored/paths.ml" ;;
-    "ocaml/xenstored/oxenstored.conf") CONFIG_FILES="$CONFIG_FILES ocaml/xenstored/oxenstored.conf" ;;
+    "../config/Tools-paths.mk") CONFIG_FILES="$CONFIG_FILES ../config/Tools-paths.mk" ;;
     "config.h") CONFIG_HEADERS="$CONFIG_HEADERS config.h" ;;
     "hotplug/Linux/systemd/proc-xen.mount") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/systemd/proc-xen.mount" ;;
     "hotplug/Linux/systemd/xen-init-dom0.service") CONFIG_FILES="$CONFIG_FILES hotplug/Linux/systemd/xen-init-dom0.service" ;;
diff --git a/tools/configure.ac b/tools/configure.ac
index 285b4ea128..ecd45e782e 100644
--- a/tools/configure.ac
+++ b/tools/configure.ac
@@ -7,24 +7,7 @@ AC_INIT([Xen Hypervisor Tools], m4_esyscmd([../version.sh ../xen/Makefile]),
 AC_CONFIG_SRCDIR([libs/light/libxl.c])
 AC_CONFIG_FILES([
 ../config/Tools.mk
-hotplug/common/hotplugpath.sh
-hotplug/FreeBSD/rc.d/xencommons
-hotplug/FreeBSD/rc.d/xendriverdomain
-hotplug/Linux/init.d/sysconfig.xencommons
-hotplug/Linux/init.d/sysconfig.xendomains
-hotplug/Linux/init.d/xen-watchdog
-hotplug/Linux/init.d/xencommons
-hotplug/Linux/init.d/xendomains
-hotplug/Linux/init.d/xendriverdomain
-hotplug/Linux/launch-xenstore
-hotplug/Linux/vif-setup
-hotplug/Linux/xen-hotplug-common.sh
-hotplug/Linux/xendomains
-hotplug/NetBSD/rc.d/xencommons
-hotplug/NetBSD/rc.d/xendriverdomain
-ocaml/libs/xs/paths.ml
-ocaml/xenstored/paths.ml
-ocaml/xenstored/oxenstored.conf
+../config/Tools-paths.mk
 ])
 AC_CONFIG_HEADERS([config.h])
 AC_CONFIG_AUX_DIR([../])
diff --git a/tools/hotplug/FreeBSD/Makefile b/tools/hotplug/FreeBSD/Makefile
index a6552c9884..a7c1c461ef 100644
--- a/tools/hotplug/FreeBSD/Makefile
+++ b/tools/hotplug/FreeBSD/Makefile
@@ -8,9 +8,17 @@ XEN_SCRIPT_DATA :=
 
 XEN_RCD_PROG := rc.d/xencommons rc.d/xendriverdomain
 
+IN_TARGETS := rc.d/xencommons
+IN_TARGETS += rc.d/xendriverdomain
+
 .PHONY: all
 all:
 
+$(foreach file,$(IN_TARGETS),$(eval $(call apply-build-vars,$(file))))
+
+.PHONY: build
+build: $(IN_TARGETS)
+
 .PHONY: install
 install: install-scripts install-rcd
 
@@ -18,7 +26,7 @@ install: install-scripts install-rcd
 uninstall: uninstall-script uninstall-rcd
 
 .PHONY: install-scripts
-install-scripts:
+install-scripts: build
 	$(INSTALL_DIR) $(DESTDIR)$(XEN_SCRIPT_DIR)
 	set -e; for i in $(XEN_SCRIPTS); \
 	   do \
@@ -35,7 +43,7 @@ uninstall-scripts:
 	rm -f $(addprefix $(DESTDIR)$(XEN_SCRIPT_DIR)/, $(XEN_SCRIPT_DATA))
 
 .PHONY: install-rcd
-install-rcd:
+install-rcd: build
 	$(INSTALL_DIR) $(DESTDIR)$(INITD_DIR)
 	set -e; for i in $(XEN_RCD_PROG); \
 	   do \
@@ -51,3 +59,4 @@ clean:
 
 .PHONY: distclean
 distclean: clean
+	$(RM) $(IN_TARGETS)
diff --git a/tools/hotplug/Linux/Makefile b/tools/hotplug/Linux/Makefile
index 9a7b3a3515..b60e39e1cd 100644
--- a/tools/hotplug/Linux/Makefile
+++ b/tools/hotplug/Linux/Makefile
@@ -26,9 +26,25 @@ XEN_SCRIPT_DATA := xen-script-common.sh locking.sh logging.sh
 XEN_SCRIPT_DATA += xen-hotplug-common.sh xen-network-common.sh vif-common.sh
 XEN_SCRIPT_DATA += block-common.sh
 
+IN_TARGETS := launch-xenstore
+IN_TARGETS += vif-setup
+IN_TARGETS += xendomains
+IN_TARGETS += xen-hotplug-common.sh
+IN_TARGETS += init.d/sysconfig.xendomains
+IN_TARGETS += init.d/xen-watchdog
+IN_TARGETS += init.d/xencommons
+IN_TARGETS += init.d/xendomains
+IN_TARGETS += init.d/xendriverdomain
+IN_TARGETS += init.d/sysconfig.xencommons
+
 .PHONY: all
 all: subdirs-all
 
+$(foreach file,$(IN_TARGETS),$(eval $(call apply-build-vars,$(file))))
+
+.PHONY: build
+build: $(IN_TARGETS)
+
 .PHONY: install
 install: install-initd install-scripts subdirs-install
 
@@ -37,7 +53,7 @@ uninstall: uninstall-initd uninstall-scripts subdirs-uninstall
 
 # See docs/misc/distro_mapping.txt for INITD_DIR location
 .PHONY: install-initd
-install-initd:
+install-initd: build
 	$(INSTALL_DIR) $(DESTDIR)$(INITD_DIR)
 	$(INSTALL_DIR) $(DESTDIR)$(SYSCONFIG_DIR)
 	$(INSTALL_DIR) $(DESTDIR)$(LIBEXEC_BIN)
@@ -60,7 +76,7 @@ uninstall-initd:
 	rm -f $(DESTDIR)$(SYSCONFIG_DIR)/xendomains
 
 .PHONY: install-scripts
-install-scripts:
+install-scripts: build
 	$(INSTALL_DIR) $(DESTDIR)$(XEN_SCRIPT_DIR)
 	set -e; for i in $(XEN_SCRIPTS); \
 	    do \
@@ -81,3 +97,4 @@ clean: subdirs-clean
 
 .PHONY: distclean
 distclean: clean
+	$(RM) $(IN_TARGETS)
diff --git a/tools/hotplug/NetBSD/Makefile b/tools/hotplug/NetBSD/Makefile
index 1cd3db2ccb..8ae788131e 100644
--- a/tools/hotplug/NetBSD/Makefile
+++ b/tools/hotplug/NetBSD/Makefile
@@ -12,9 +12,17 @@ XEN_SCRIPTS += qemu-ifup
 XEN_SCRIPT_DATA :=
 XEN_RCD_PROG := rc.d/xencommons rc.d/xendomains rc.d/xen-watchdog rc.d/xendriverdomain
 
+IN_TARGETS := rc.d/xencommons
+IN_TARGETS += rc.d/xendriverdomain
+
 .PHONY: all
 all:
 
+$(foreach file,$(IN_TARGETS),$(eval $(call apply-build-vars,$(file))))
+
+.PHONY: build
+build: $(IN_TARGETS)
+
 .PHONY: install
 install: install-scripts install-rcd
 
@@ -22,7 +30,7 @@ install: install-scripts install-rcd
 uninstall: uninstall-scripts uninstall-rcd
 
 .PHONY: install-scripts
-install-scripts:
+install-scripts: build
 	$(INSTALL_DIR) $(DESTDIR)$(XEN_SCRIPT_DIR)
 	set -e; for i in $(XEN_SCRIPTS); \
 	   do \
@@ -39,7 +47,7 @@ uninstall-scripts:
 	rm -f $(addprefix $(DESTDIR)$(XEN_SCRIPT_DIR)/, $(XEN_SCRIPT_DATA))
 
 .PHONY: install-rcd
-install-rcd:
+install-rcd: build
 	$(INSTALL_DIR) $(DESTDIR)$(INITD_DIR)
 	set -e; for i in $(XEN_RCD_PROG); \
 	   do \
@@ -57,3 +65,4 @@ clean:
 
 .PHONY: distclean
 distclean: clean
+	$(RM) $(IN_TARGETS)
diff --git a/tools/hotplug/common/Makefile b/tools/hotplug/common/Makefile
index 62afe1019e..3b0b5a0296 100644
--- a/tools/hotplug/common/Makefile
+++ b/tools/hotplug/common/Makefile
@@ -7,8 +7,15 @@ include $(XEN_ROOT)/tools/Rules.mk
 XEN_SCRIPTS :=
 XEN_SCRIPT_DATA := hotplugpath.sh
 
+IN_TARGETS := hotplugpath.sh
+
 .PHONY: all
-all:
+all: build
+
+$(foreach file,$(IN_TARGETS),$(eval $(call apply-build-vars,$(file))))
+
+.PHONY: build
+build: $(IN_TARGETS)
 
 .PHONY: install
 install: install-scripts
@@ -38,3 +45,4 @@ clean:
 
 .PHONY: distclean
 distclean: clean
+	$(RM) $(IN_TARGETS)
diff --git a/tools/ocaml/libs/xs/Makefile b/tools/ocaml/libs/xs/Makefile
index e160e6a711..b0963611fb 100644
--- a/tools/ocaml/libs/xs/Makefile
+++ b/tools/ocaml/libs/xs/Makefile
@@ -8,6 +8,8 @@ OCAMLOPTFLAGS += -for-pack Xenstore
 .NOTPARALLEL:
 # Ocaml is such a PITA!
 
+IN_TARGETS := paths.ml
+
 PREINTF = xsraw.cmi xst.cmi
 PREOBJS = queueop xsraw xst
 PRELIBS = $(foreach obj, $(PREOBJS),$(obj).cmo) $(foreach obj,$(PREOJBS),$(obj).cmx)
@@ -17,6 +19,10 @@ LIBS = xenstore.cma xenstore.cmxa
 
 all: $(PREINTF) $(PRELIBS) $(INTF) $(LIBS) $(PROGRAMS)
 
+$(foreach file,$(IN_TARGETS),$(eval $(call apply-build-vars,$(file))))
+
+$(OBJS): $(IN_TARGETS)
+
 bins: $(PROGRAMS)
 
 libs: $(LIBS)
@@ -43,4 +49,7 @@ install: $(LIBS) META
 uninstall:
 	$(OCAMLFIND) remove -destdir $(OCAMLDESTDIR) xenstore
 
+.PHONY: distclean
+	$(RM) $(IN_TARGETS)
+
 include $(OCAML_TOPLEVEL)/Makefile.rules
diff --git a/tools/ocaml/xenstored/Makefile b/tools/ocaml/xenstored/Makefile
index c333394a34..b3d1a8b8de 100644
--- a/tools/ocaml/xenstored/Makefile
+++ b/tools/ocaml/xenstored/Makefile
@@ -72,6 +72,9 @@ XENSTOREDLIBS = \
 	-ccopt -L -ccopt $(OCAML_TOPLEVEL)/libs/xsd_glue $(OCAML_TOPLEVEL)/libs/xsd_glue/plugin_interface_v1.cmxa \
 	-ccopt -L -ccopt $(XEN_ROOT)/tools/libs/ctrl
 
+IN_TARGETS := paths.ml
+IN_TARGETS += oxenstored.conf
+
 PROGRAMS = oxenstored
 
 oxenstored_LIBS = $(XENSTOREDLIBS)
@@ -83,7 +86,9 @@ oxenstored_OBJS = $(oxenstored_MLSORTED:.ml=)
 
 OCAML_PROGRAM = oxenstored
 
-all: $(INTF) $(LIBS) $(PROGRAMS)
+all: $(IN_TARGETS) $(INTF) $(LIBS) $(PROGRAMS)
+
+$(foreach file,$(IN_TARGETS),$(eval $(call apply-build-vars,$(file))))
 
 bins: $(PROGRAMS)
 
@@ -99,4 +104,7 @@ uninstall:
 	rm -f $(DESTDIR)$(XEN_CONFIG_DIR)/oxenstored.conf
 	rm -f $(DESTDIR)$(sbindir)/oxenstored
 
+distclean:
+	$(RM) $(IN_TARGETS)
+
 include $(OCAML_TOPLEVEL)/Makefile.rules
-- 
2.51.0



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To: Penny Zheng , xen-devel@lists.xenproject.org
Cc: ray.huang@amd.com, Jan Beulich ,
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On 21.11.25 12:57, Penny Zheng wrote:
> Function iommu_do_domctl() is the main entry for all iommu-related domctl-op,
> and shall be wrapped with CONFIG_MGMT_HYPERCALLS.
> Otherwise it will become unreachable when MGMT_HYPERCALLS=n, and hence
> violating Misra rule 2.1
> 
> Signed-off-by: Penny Zheng 
> ---
> v3 -> v4:
> - new commit
> ---
> Commit "xen/domctl: wrap pci-subset iommu-related domctl op with
> CONFIG_MGMT_HYPERCALLS" and "xen/domctl: wrap device-tree-subset iommu-related
> domctl op with CONFIG_MGMT_HYPERCALLS" are the prereq commit.
> ---
>   xen/drivers/passthrough/iommu.c | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/xen/drivers/passthrough/iommu.c b/xen/drivers/passthrough/iommu.c
> index c9425d6971..8812e38174 100644
> --- a/xen/drivers/passthrough/iommu.c
> +++ b/xen/drivers/passthrough/iommu.c
> @@ -625,6 +625,7 @@ void iommu_resume(void)
>           iommu_vcall(iommu_get_ops(), resume);
>   }
>   
> +#ifdef CONFIG_MGMT_HYPERCALLS
>   int iommu_do_domctl(
>       struct xen_domctl *domctl, struct domain *d,
>       XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl)
> @@ -645,6 +646,7 @@ int iommu_do_domctl(
>   
>       return ret;
>   }
> +#endif /* CONFIG_MGMT_HYPERCALLS */1

"/1" type - build fail

>   
>   void iommu_crash_shutdown(void)
>   {

-- 
Best regards,
-grygorii



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On 21/11/2025 1:23 pm, Juergen Gross wrote:
> Add a new make macro for creating  from .in at build
> time. To be used like this:
>
> $(foreach file,$(IN_TARGETS),$(eval $(call apply-build-vars,$(file))))
>
> This can be used instead of the current approach to perform the similar
> step for file.in during ./configure.
>
> This will avoid having to run ./configure just because of modifying a
> file depending on a variable set by configure.
>
> Prepare to have multiple files as source for the replacement patterns.
>
> Signed-off-by: Juergen Gross 
> ---
> V2:
> - don't use pattern rule, but create explicit dependency in macro,
>   don't require to rename source files (Jan Beulich, Andrew Cooper)
> V3:
> - prepare for $(PATH_FILES) to be extended by other Makefile
> - let generated file depend on $(INC_FILES)
> ---
>  Config.mk | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
>
> diff --git a/Config.mk b/Config.mk
> index e1556dfbfa..39e8007b9c 100644
> --- a/Config.mk
> +++ b/Config.mk
> @@ -159,6 +159,19 @@ define move-if-changed
>  	if ! cmp -s $(1) $(2); then mv -f $(1) $(2); else rm -f $(1); fi
>  endef
>  
> +PATH_FILES := Paths
> +INC_FILES = $(foreach f, $(PATH_FILES), $(XEN_ROOT)/config/$(f).mk)
> +
> +include $(INC_FILES)
> +
> +BUILD_MAKE_VARS = $(foreach f, $(PATH_FILES), $(shell awk '$$2 == ":=" { print $$1; }' $(XEN_ROOT)/config/$(f).mk.in))

Everything else in the series is looking fine now.  But why is
PATH_FILES dropping the .mk extension from the file?

It looks weird for both INC_FILES and BUILD_MAKE_VARS to have to
re-insert it.

~Andrew


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To: Andrew Cooper , xen-devel@lists.xenproject.org
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Subject: Re: [PATCH v3 1/4] build: add make macro for making file from file.in
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On 21/11/2025 3:10 pm, Jürgen Groß wrote:
> On 21.11.25 16:03, Andrew Cooper wrote:
>> On 21/11/2025 1:23 pm, Juergen Gross wrote:
>>> Add a new make macro for creating  from .in at build
>>> time. To be used like this:
>>>
>>> $(foreach file,$(IN_TARGETS),$(eval $(call apply-build-vars,$(file))))
>>>
>>> This can be used instead of the current approach to perform the similar
>>> step for file.in during ./configure.
>>>
>>> This will avoid having to run ./configure just because of modifying a
>>> file depending on a variable set by configure.
>>>
>>> Prepare to have multiple files as source for the replacement patterns.
>>>
>>> Signed-off-by: Juergen Gross 
>>> ---
>>> V2:
>>> - don't use pattern rule, but create explicit dependency in macro,
>>>    don't require to rename source files (Jan Beulich, Andrew Cooper)
>>> V3:
>>> - prepare for $(PATH_FILES) to be extended by other Makefile
>>> - let generated file depend on $(INC_FILES)
>>> ---
>>>   Config.mk | 13 +++++++++++++
>>>   1 file changed, 13 insertions(+)
>>>
>>> diff --git a/Config.mk b/Config.mk
>>> index e1556dfbfa..39e8007b9c 100644
>>> --- a/Config.mk
>>> +++ b/Config.mk
>>> @@ -159,6 +159,19 @@ define move-if-changed
>>>       if ! cmp -s $(1) $(2); then mv -f $(1) $(2); else rm -f $(1); fi
>>>   endef
>>>   +PATH_FILES := Paths
>>> +INC_FILES = $(foreach f, $(PATH_FILES), $(XEN_ROOT)/config/$(f).mk)
>>> +
>>> +include $(INC_FILES)
>>> +
>>> +BUILD_MAKE_VARS = $(foreach f, $(PATH_FILES), $(shell awk '$$2 ==
>>> ":=" { print $$1; }' $(XEN_ROOT)/config/$(f).mk.in))
>>
>> Everything else in the series is looking fine now.  But why is
>> PATH_FILES dropping the .mk extension from the file?
>>
>> It looks weird for both INC_FILES and BUILD_MAKE_VARS to have to
>> re-insert it.
>
> Hmm, right.
>
> Let me change that.

If it's only that, I could fix up on commit to save another posting.

Whole series, Reviewed-by: Andrew Cooper 


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Subject: Re: [PATCH v3 1/4] build: add make macro for making file from file.in
To: Andrew Cooper , xen-devel@lists.xenproject.org
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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: Andrew Cooper , xen-devel@lists.xenproject.org
Cc: Anthony PERARD ,
 Michal Orzel , Jan Beulich ,
 Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Stefano Stabellini 
Message-ID: 
Subject: Re: [PATCH v3 1/4] build: add make macro for making file from file.in
References: <20251121132332.23514-1-jgross@suse.com>
 <20251121132332.23514-2-jgross@suse.com>
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 <78da6bbd-5fa9-4bbc-ac22-d52a11527c76@citrix.com>
In-Reply-To: <78da6bbd-5fa9-4bbc-ac22-d52a11527c76@citrix.com>
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From: Mykyta Poturai 
To: Grygorii Strashko ,
	"xen-devel@lists.xenproject.org" 
CC: Stefano Stabellini , Julien Grall
	, Bertrand Marquis , Michal Orzel
	, Volodymyr Babchuk ,
	"Daniel P. Smith" ,
	"Alejandro.GarciaVallejo@amd.com" 
Subject: Re: [PATCH v4 6/8] arm/sysctl: Implement cpu hotplug ops
Thread-Topic: [PATCH v4 6/8] arm/sysctl: Implement cpu hotplug ops
Thread-Index: AQHcU8JY4MUEJP5v5ECe3RrLj+fwX7TwwqoAgAyZJQA=
Date: Fri, 21 Nov 2025 16:12:42 +0000
Message-ID: 
References: 
 <656cb01061f2ec726eb23784d01517a94117618e.1762939773.git.mykyta_poturai@epam.com>
 
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Date: Fri, 21 Nov 2025 17:45:52 +0000
From: "Dr. David Alan Gilbert" 
To: Markus Armbruster 
Cc: qemu-devel@nongnu.org, arei.gonglei@huawei.com, pizhenwei@bytedance.com,
	alistair.francis@wdc.com, stefanb@linux.vnet.ibm.com,
	kwolf@redhat.com, hreitz@redhat.com, sw@weilnetz.de,
	qemu_oss@crudebyte.com, groug@kaod.org, mst@redhat.com,
	imammedo@redhat.com, anisinha@redhat.com, kraxel@redhat.com,
	shentey@gmail.com, npiggin@gmail.com, harshpb@linux.ibm.com,
	sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
	edgar.iglesias@gmail.com, elena.ufimtseva@oracle.com,
	jag.raman@oracle.com, sgarzare@redhat.com, pbonzini@redhat.com,
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	xen-devel@lists.xenproject.org, kvm@vger.kernel.org,
	qemu-riscv@nongnu.org
Subject: Re: [PATCH 09/14] error: Use error_setg_file_open() for simplicity
 and consistency
Message-ID: 
References: <20251120191339.756429-1-armbru@redhat.com>
 <20251120191339.756429-10-armbru@redhat.com>
 
 <87see8q6qm.fsf@pond.sub.org>
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X-Chocolate: 70 percent or better cocoa solids preferably
X-Operating-System: Linux/6.12.48+deb13-amd64 (x86_64)
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* Markus Armbruster (armbru@redhat.com) wrote:
> "Dr. David Alan Gilbert"  writes:
>=20
> > * Markus Armbruster (armbru@redhat.com) wrote:
> >> Replace
> >>=20
> >>     error_setg_errno(errp, errno, MSG, FNAME);
> >>=20
> >> by
> >>=20
> >>     error_setg_file_open(errp, errno, FNAME);
> >>=20
> >> where MSG is "Could not open '%s'" or similar.
> >>=20
> >> Also replace equivalent uses of error_setg().
> >>=20
> >> A few messages lose prefixes ("net dump: ", "SEV: ", __func__ ": ").
> >> We could put them back with error_prepend().  Not worth the bother.
> >
> > Yeh, I guess you could just do it with another macro using
> > the same internal function just with string concatenation.
>=20
> I'm no fan of such prefixes.  A sign of developers not caring enough to
> craft a good error message for *users*.  *Especially* in the case of
> __func__.
>=20
> The error messages changes in question are:
>=20
>     net dump: can't open DUMP-FILE: REASON
>     Could not open 'DUMP-FILE': REASON
>=20
>     SEV: Failed to open SEV-DEVICE: REASON
>     Could not open 'SEV-DEVICE': REASON
>=20
>     sev_common_kvm_init: Failed to open SEV_DEVICE 'REASON'
>     Could not open 'SEV-DEVICE': REASON
>=20
> I think these are all improvements, and the loss of the prefix is fine.

Yeh, although I find the error messages aren't just for users;
they're often for the first dev to see it to guess which other
dev to pass the problem to, so a hint about where it's coming
=66rom can be useful.

Dave

> >> Signed-off-by: Markus Armbruster 
> >
> > Reviewed-by: Dr. David Alan Gilbert 
>=20
> Thanks!
>=20
--=20
 -----Open up your eyes, open up your mind, open up your code -------  =20
/ Dr. David Alan Gilbert    |       Running GNU/Linux       | Happy  \=20
\        dave @ treblig.org |                               | In Hex /
 \ _________________________|_____ http://www.treblig.org   |_______/


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The build of xen-4.21.0 with json-c present and yajl not present
is failing with the error

libxl_nocpuid.c:43:1: error: unknown type name ¡yajl_gen_status¢
    43 | yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand,
       | ^~~~~~~~~~~~~~~
libxl_nocpuid.c:43:50: error: unknown type name ¡yajl_gen¢
    43 | yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand,
       |                                                  ^~~~~~~~
make[6]: *** 
[/builddir/build/BUILD/xen-4.21.0-build/xen-4.21.0/tools/libs/light/../../../tools/Rules.mk:178: libxl_nocpuid.o] Error 1

I tested it with the patch below based on libxl_nocpuid.c which did build.

Signed-off-by: Michael Young 
---
  tools/libs/light/libxl_nocpuid.c | 13 +++++++++++++
  1 file changed, 13 insertions(+)

diff --git a/tools/libs/light/libxl_nocpuid.c 
b/tools/libs/light/libxl_nocpuid.c
index 0630959e76..71ab49ed61 100644
--- a/tools/libs/light/libxl_nocpuid.c
+++ b/tools/libs/light/libxl_nocpuid.c
@@ -40,11 +40,24 @@ int libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t 
domid, bool restore,
      return 0;
  }

+#ifdef HAVE_LIBJSONC
+#ifndef _hidden
+#define _hidden
+#endif
+_hidden int libxl_cpuid_policy_list_gen_jso(json_object **jso_r,
+                                libxl_cpuid_policy_list *pcpuid)
+{
+    return 0;
+}
+#endif
+
+#if defined(HAVE_LIBYAJL)
  yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand,
                                  libxl_cpuid_policy_list *pcpuid)
  {
      return 0;
  }
+#endif

  int libxl__cpuid_policy_list_parse_json(libxl__gc *gc,
                                          const libxl__json_object *o,
-- 
2.51.1

---1463790335-1529782592-1763759344=:3590--


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From: Markus Armbruster 
To: "Dr. David Alan Gilbert" 
Cc: qemu-devel@nongnu.org,  arei.gonglei@huawei.com,
  pizhenwei@bytedance.com,  alistair.francis@wdc.com,
  stefanb@linux.vnet.ibm.com,  kwolf@redhat.com,  hreitz@redhat.com,
  sw@weilnetz.de,  qemu_oss@crudebyte.com,  groug@kaod.org,
  mst@redhat.com,  imammedo@redhat.com,  anisinha@redhat.com,
  kraxel@redhat.com,  shentey@gmail.com,  npiggin@gmail.com,
  harshpb@linux.ibm.com,  sstabellini@kernel.org,  anthony@xenproject.org,
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  jasowang@redhat.com,  samuel.thibault@ens-lyon.org,
  michael.roth@amd.com,  kkostiuk@redhat.com,  zhao1.liu@intel.com,
  mtosatti@redhat.com,  rathc@linux.ibm.com,  palmer@dabbelt.com,
  liwei1518@gmail.com,  dbarboza@ventanamicro.com,
  zhiwei_liu@linux.alibaba.com,  marcandre.lureau@redhat.com,
  qemu-block@nongnu.org,  qemu-ppc@nongnu.org,
  xen-devel@lists.xenproject.org,  kvm@vger.kernel.org,
  qemu-riscv@nongnu.org
Subject: Re: [PATCH 09/14] error: Use error_setg_file_open() for simplicity
 and consistency
In-Reply-To:  (David Alan Gilbert's message of
	"Fri, 21 Nov 2025 17:45:52 +0000")
References: <20251120191339.756429-1-armbru@redhat.com>
	<20251120191339.756429-10-armbru@redhat.com>
	 <87see8q6qm.fsf@pond.sub.org>
	
Date: Sat, 22 Nov 2025 08:36:40 +0100
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"Dr. David Alan Gilbert"  writes:

> * Markus Armbruster (armbru@redhat.com) wrote:
>> "Dr. David Alan Gilbert"  writes:
>> 
>> > * Markus Armbruster (armbru@redhat.com) wrote:
>> >> Replace
>> >> 
>> >>     error_setg_errno(errp, errno, MSG, FNAME);
>> >> 
>> >> by
>> >> 
>> >>     error_setg_file_open(errp, errno, FNAME);
>> >> 
>> >> where MSG is "Could not open '%s'" or similar.
>> >> 
>> >> Also replace equivalent uses of error_setg().
>> >> 
>> >> A few messages lose prefixes ("net dump: ", "SEV: ", __func__ ": ").
>> >> We could put them back with error_prepend().  Not worth the bother.
>> >
>> > Yeh, I guess you could just do it with another macro using
>> > the same internal function just with string concatenation.
>> 
>> I'm no fan of such prefixes.  A sign of developers not caring enough to
>> craft a good error message for *users*.  *Especially* in the case of
>> __func__.
>> 
>> The error messages changes in question are:
>> 
>>     net dump: can't open DUMP-FILE: REASON
>>     Could not open 'DUMP-FILE': REASON
>> 
>>     SEV: Failed to open SEV-DEVICE: REASON
>>     Could not open 'SEV-DEVICE': REASON
>> 
>>     sev_common_kvm_init: Failed to open SEV_DEVICE 'REASON'
>>     Could not open 'SEV-DEVICE': REASON
>> 
>> I think these are all improvements, and the loss of the prefix is fine.
>
> Yeh, although I find the error messages aren't just for users;
> they're often for the first dev to see it to guess which other
> dev to pass the problem to, so a hint about where it's coming
> from can be useful.

I agree!  But I think an error message must be make sense to users
*first* and help developers second, and once they make sense to users,
they're often good enough for developers.

The common failures I see happen when developers remain caught in the
developer's perspective, and write something that makes sense to *them*.
Strawman form:

    prefix: failed op[: reason]

where "prefix" is a subsystem tag, or even __func__, and "reason" is
strerror() or similar.

To users, this tends to read as

    gobbledygook: techbabble[: reason]

When we care to replace "failed op" (developer's perspective) by
something that actually makes sense to users, "prefix" often becomes
redundant.

The error messages shown above aren't bad to begin with.  "failed to
open FILE", where FILE is something the user specified, should make
sense to the user.  It should also be good enough for developers even
without a prefix: connecting trouble with the DUMP-FILE to dump /
trouble with the SEV-DEVICE to SEV should be straightforward.

[...]



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From: BALATON Zoltan 
To: Markus Armbruster 
cc: "Dr. David Alan Gilbert" , qemu-devel@nongnu.org, 
    arei.gonglei@huawei.com, pizhenwei@bytedance.com, alistair.francis@wdc.com, 
    stefanb@linux.vnet.ibm.com, kwolf@redhat.com, hreitz@redhat.com, 
    sw@weilnetz.de, qemu_oss@crudebyte.com, groug@kaod.org, mst@redhat.com, 
    imammedo@redhat.com, anisinha@redhat.com, kraxel@redhat.com, 
    shentey@gmail.com, npiggin@gmail.com, harshpb@linux.ibm.com, 
    sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org, 
    edgar.iglesias@gmail.com, elena.ufimtseva@oracle.com, jag.raman@oracle.com, 
    sgarzare@redhat.com, pbonzini@redhat.com, fam@euphon.net, 
    philmd@linaro.org, alex@shazbot.org, clg@redhat.com, peterx@redhat.com, 
    farosas@suse.de, lizhijian@fujitsu.com, jasowang@redhat.com, 
    samuel.thibault@ens-lyon.org, michael.roth@amd.com, kkostiuk@redhat.com, 
    zhao1.liu@intel.com, mtosatti@redhat.com, rathc@linux.ibm.com, 
    palmer@dabbelt.com, liwei1518@gmail.com, dbarboza@ventanamicro.com, 
    zhiwei_liu@linux.alibaba.com, marcandre.lureau@redhat.com, 
    qemu-block@nongnu.org, qemu-ppc@nongnu.org, xen-devel@lists.xenproject.org, 
    kvm@vger.kernel.org, qemu-riscv@nongnu.org
Subject: Re: [PATCH 09/14] error: Use error_setg_file_open() for simplicity
 and consistency
In-Reply-To: <87ecpqtt6f.fsf@pond.sub.org>
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References: <20251120191339.756429-1-armbru@redhat.com> <20251120191339.756429-10-armbru@redhat.com>  <87see8q6qm.fsf@pond.sub.org>  <87ecpqtt6f.fsf@pond.sub.org>
MIME-Version: 1.0
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On Sat, 22 Nov 2025, Markus Armbruster wrote:
> "Dr. David Alan Gilbert"  writes:
>
>> * Markus Armbruster (armbru@redhat.com) wrote:
>>> "Dr. David Alan Gilbert"  writes:
>>>
>>>> * Markus Armbruster (armbru@redhat.com) wrote:
>>>>> Replace
>>>>>
>>>>>     error_setg_errno(errp, errno, MSG, FNAME);
>>>>>
>>>>> by
>>>>>
>>>>>     error_setg_file_open(errp, errno, FNAME);
>>>>>
>>>>> where MSG is "Could not open '%s'" or similar.
>>>>>
>>>>> Also replace equivalent uses of error_setg().
>>>>>
>>>>> A few messages lose prefixes ("net dump: ", "SEV: ", __func__ ": ").
>>>>> We could put them back with error_prepend().  Not worth the bother.
>>>>
>>>> Yeh, I guess you could just do it with another macro using
>>>> the same internal function just with string concatenation.
>>>
>>> I'm no fan of such prefixes.  A sign of developers not caring enough to
>>> craft a good error message for *users*.  *Especially* in the case of
>>> __func__.
>>>
>>> The error messages changes in question are:
>>>
>>>     net dump: can't open DUMP-FILE: REASON
>>>     Could not open 'DUMP-FILE': REASON
>>>
>>>     SEV: Failed to open SEV-DEVICE: REASON
>>>     Could not open 'SEV-DEVICE': REASON
>>>
>>>     sev_common_kvm_init: Failed to open SEV_DEVICE 'REASON'
>>>     Could not open 'SEV-DEVICE': REASON
>>>
>>> I think these are all improvements, and the loss of the prefix is fine.
>>
>> Yeh, although I find the error messages aren't just for users;
>> they're often for the first dev to see it to guess which other
>> dev to pass the problem to, so a hint about where it's coming
>> from can be useful.
>
> I agree!  But I think an error message must be make sense to users
> *first* and help developers second, and once they make sense to users,
> they're often good enough for developers.
>
> The common failures I see happen when developers remain caught in the
> developer's perspective, and write something that makes sense to *them*.
> Strawman form:
>
>    prefix: failed op[: reason]
>
> where "prefix" is a subsystem tag, or even __func__, and "reason" is
> strerror() or similar.
>
> To users, this tends to read as
>
>    gobbledygook: techbabble[: reason]
>
> When we care to replace "failed op" (developer's perspective) by
> something that actually makes sense to users, "prefix" often becomes
> redundant.
>
> The error messages shown above aren't bad to begin with.  "failed to
> open FILE", where FILE is something the user specified, should make
> sense to the user.  It should also be good enough for developers even
> without a prefix: connecting trouble with the DUMP-FILE to dump /
> trouble with the SEV-DEVICE to SEV should be straightforward.
>
> [...]

I think that

net dump: can't open random-filename: because of some error

shows better where to look for the problem than just

Could not open 'random-filename': because of some error

as the latter does not tell where the file name comes from or what is it. 
It could be added by a management application or added by the users 
randomly without really knowing what they are doing so repeating the 
option or part in the message that the error comes from can help to find 
out where to correct it. Otherwise it might be difficult to guess what 
random-filename is related to if it's not named something you'd expect.

Regards,
BALATON Zoltan


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Date: Sat, 22 Nov 2025 13:58:19 +0000
From: "Dr. David Alan Gilbert" 
To: BALATON Zoltan 
Cc: Markus Armbruster , qemu-devel@nongnu.org,
	arei.gonglei@huawei.com, pizhenwei@bytedance.com,
	alistair.francis@wdc.com, stefanb@linux.vnet.ibm.com,
	kwolf@redhat.com, hreitz@redhat.com, sw@weilnetz.de,
	qemu_oss@crudebyte.com, groug@kaod.org, mst@redhat.com,
	imammedo@redhat.com, anisinha@redhat.com, kraxel@redhat.com,
	shentey@gmail.com, npiggin@gmail.com, harshpb@linux.ibm.com,
	sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
	edgar.iglesias@gmail.com, elena.ufimtseva@oracle.com,
	jag.raman@oracle.com, sgarzare@redhat.com, pbonzini@redhat.com,
	fam@euphon.net, philmd@linaro.org, alex@shazbot.org, clg@redhat.com,
	peterx@redhat.com, farosas@suse.de, lizhijian@fujitsu.com,
	jasowang@redhat.com, samuel.thibault@ens-lyon.org,
	michael.roth@amd.com, kkostiuk@redhat.com, zhao1.liu@intel.com,
	mtosatti@redhat.com, rathc@linux.ibm.com, palmer@dabbelt.com,
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	zhiwei_liu@linux.alibaba.com, marcandre.lureau@redhat.com,
	qemu-block@nongnu.org, qemu-ppc@nongnu.org,
	xen-devel@lists.xenproject.org, kvm@vger.kernel.org,
	qemu-riscv@nongnu.org
Subject: Re: [PATCH 09/14] error: Use error_setg_file_open() for simplicity
 and consistency
Message-ID: 
References: <20251120191339.756429-1-armbru@redhat.com>
 <20251120191339.756429-10-armbru@redhat.com>
 
 <87see8q6qm.fsf@pond.sub.org>
 
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 <05ef43e5-cc42-8e1c-2619-eb1dea12b02b@eik.bme.hu>
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X-Chocolate: 70 percent or better cocoa solids preferably
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* BALATON Zoltan (balaton@eik.bme.hu) wrote:
> On Sat, 22 Nov 2025, Markus Armbruster wrote:
> > "Dr. David Alan Gilbert"  writes:
> > 
> > > * Markus Armbruster (armbru@redhat.com) wrote:
> > > > "Dr. David Alan Gilbert"  writes:
> > > > 
> > > > > * Markus Armbruster (armbru@redhat.com) wrote:
> > > > > > Replace
> > > > > > 
> > > > > >     error_setg_errno(errp, errno, MSG, FNAME);
> > > > > > 
> > > > > > by
> > > > > > 
> > > > > >     error_setg_file_open(errp, errno, FNAME);
> > > > > > 
> > > > > > where MSG is "Could not open '%s'" or similar.
> > > > > > 
> > > > > > Also replace equivalent uses of error_setg().
> > > > > > 
> > > > > > A few messages lose prefixes ("net dump: ", "SEV: ", __func__ ": ").
> > > > > > We could put them back with error_prepend().  Not worth the bother.
> > > > > 
> > > > > Yeh, I guess you could just do it with another macro using
> > > > > the same internal function just with string concatenation.
> > > > 
> > > > I'm no fan of such prefixes.  A sign of developers not caring enough to
> > > > craft a good error message for *users*.  *Especially* in the case of
> > > > __func__.
> > > > 
> > > > The error messages changes in question are:
> > > > 
> > > >     net dump: can't open DUMP-FILE: REASON
> > > >     Could not open 'DUMP-FILE': REASON
> > > > 
> > > >     SEV: Failed to open SEV-DEVICE: REASON
> > > >     Could not open 'SEV-DEVICE': REASON
> > > > 
> > > >     sev_common_kvm_init: Failed to open SEV_DEVICE 'REASON'
> > > >     Could not open 'SEV-DEVICE': REASON
> > > > 
> > > > I think these are all improvements, and the loss of the prefix is fine.
> > > 
> > > Yeh, although I find the error messages aren't just for users;
> > > they're often for the first dev to see it to guess which other
> > > dev to pass the problem to, so a hint about where it's coming
> > > from can be useful.
> > 
> > I agree!  But I think an error message must be make sense to users
> > *first* and help developers second, and once they make sense to users,
> > they're often good enough for developers.
> > 
> > The common failures I see happen when developers remain caught in the
> > developer's perspective, and write something that makes sense to *them*.
> > Strawman form:
> > 
> >    prefix: failed op[: reason]
> > 
> > where "prefix" is a subsystem tag, or even __func__, and "reason" is
> > strerror() or similar.
> > 
> > To users, this tends to read as
> > 
> >    gobbledygook: techbabble[: reason]
> > 
> > When we care to replace "failed op" (developer's perspective) by
> > something that actually makes sense to users, "prefix" often becomes
> > redundant.
> > 
> > The error messages shown above aren't bad to begin with.  "failed to
> > open FILE", where FILE is something the user specified, should make
> > sense to the user.  It should also be good enough for developers even
> > without a prefix: connecting trouble with the DUMP-FILE to dump /
> > trouble with the SEV-DEVICE to SEV should be straightforward.
> > 
> > [...]
> 
> I think that
> 
> net dump: can't open random-filename: because of some error
> 
> shows better where to look for the problem than just
> 
> Could not open 'random-filename': because of some error
> 
> as the latter does not tell where the file name comes from or what is it. It
> could be added by a management application or added by the users randomly
> without really knowing what they are doing so repeating the option or part
> in the message that the error comes from can help to find out where to
> correct it. Otherwise it might be difficult to guess what random-filename is
> related to if it's not named something you'd expect.

Yeh agreed.  It very much depends if you think of a 'user' as the person
who typed a qemu command line, or pressed a button on a GUI that triggered
15 levels of abstraction that eventually ran a qemu.

Or for the support person who has a customer saying 'help I've got this error',
and now needs to route it to the network person rather than something else.

Dave

> Regards,
> BALATON Zoltan
-- 
 -----Open up your eyes, open up your mind, open up your code -------   
/ Dr. David Alan Gilbert    |       Running GNU/Linux       | Happy  \ 
\        dave @ treblig.org |                               | In Hex /
 \ _________________________|_____ http://www.treblig.org   |_______/


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From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= 
To: qemu-devel@nongnu.org
Cc: Paolo Bonzini ,
	David Woodhouse ,
	Paul Durrant ,
	Eduardo Habkost ,
	xen-devel@lists.xenproject.org,
	Anthony PERARD ,
	Stefano Stabellini ,
	Richard Henderson ,
	"Michael S. Tsirkin" ,
	Mark Cave-Ayland ,
	Marcel Apfelbaum ,
	=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= 
Subject: [PATCH] hw/i386/isapc: Remove dead Xen code
Date: Sun, 23 Nov 2025 19:58:32 +0100
Message-ID: <20251123185832.53802-1-philmd@linaro.org>
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We don't use Xen on the isapc machine: let's remove
pointless code.

Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/i386/isapc.c | 27 ++++-----------------------
 1 file changed, 4 insertions(+), 23 deletions(-)

diff --git a/hw/i386/isapc.c b/hw/i386/isapc.c
index 1ba9ae22cc3..1e13a30c505 100644
--- a/hw/i386/isapc.c
+++ b/hw/i386/isapc.c
@@ -17,8 +17,6 @@
 #include "hw/ide/ide-bus.h"
 #include "system/kvm.h"
 #include "hw/i386/kvm/clock.h"
-#include "hw/xen/xen-x86.h"
-#include "system/xen.h"
 #include "hw/rtc/mc146818rtc.h"
 #include "target/i386/cpu.h"
 
@@ -37,7 +35,6 @@ static void pc_init_isa(MachineState *machine)
     ISABus *isa_bus;
     uint32_t irq;
     GSIState *gsi_state;
-    MemoryRegion *ram_memory;
     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
     int i;
 
@@ -77,15 +74,9 @@ static void pc_init_isa(MachineState *machine)
     /*
      * There is no RAM split for the isapc machine
      */
-    if (xen_enabled()) {
-        xen_hvm_init_pc(pcms, &ram_memory);
-    } else {
-        ram_memory = machine->ram;
-
-        pcms->max_ram_below_4g = 3.5 * GiB;
-        x86ms->above_4g_mem_size = 0;
-        x86ms->below_4g_mem_size = machine->ram_size;
-    }
+    pcms->max_ram_below_4g = 3.5 * GiB;
+    x86ms->above_4g_mem_size = 0;
+    x86ms->below_4g_mem_size = machine->ram_size;
 
     x86_cpus_init(x86ms, pcmc->default_cpu_version);
 
@@ -94,17 +85,7 @@ static void pc_init_isa(MachineState *machine)
     }
 
     /* allocate ram and load rom/bios */
-    if (!xen_enabled()) {
-        pc_memory_init(pcms, system_memory, system_memory, 0);
-    } else {
-        assert(machine->ram_size == x86ms->below_4g_mem_size +
-                                    x86ms->above_4g_mem_size);
-
-        if (machine->kernel_filename != NULL) {
-            /* For xen HVM direct kernel boot, load linux here */
-            xen_load_linux(pcms);
-        }
-    }
+    pc_memory_init(pcms, system_memory, system_memory, 0);
 
     gsi_state = pc_gsi_create(&x86ms->gsi, false);
 
-- 
2.51.0



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From: Saman Dehghan 
To: xen-devel@lists.xenproject.org
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH] XEN: enable MC/DC coverage for Clang
Date: Sun, 23 Nov 2025 20:18:44 -0600
Message-ID: <3bb418ae6a36a9ac89c697a417fa0745fa9ac702.1763949990.git.samaan.dehghan@gmail.com>
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Clang >= 18 supports Modified Condition/Decision Coverage (MC/DC).
This patch enables the detection and usage of this feature when
compiling Xen with Clang.

- Update detection logic to check for '-fcoverage-mcdc' when using Clang.
- Update llvm.c to handle the profile format changes (bitmap section)
  required for MC/DC.
- Guard -Wno-error=coverage-too-many-conditions with CONFIG_CC_IS_GCC
  to avoid passing a GCC-only warning option to Clang

Signed-off-by: Saman Dehghan 
---
 xen/Kconfig                |  2 +-
 xen/Rules.mk               |  1 +
 xen/arch/x86/Makefile      |  4 +++-
 xen/common/coverage/llvm.c | 24 +++++++++++++++++++++++-
 4 files changed, 28 insertions(+), 3 deletions(-)

diff --git a/xen/Kconfig b/xen/Kconfig
index a5e5af3b76..5508993f02 100644
--- a/xen/Kconfig
+++ b/xen/Kconfig
@@ -53,7 +53,7 @@ config CC_HAS_ASM_GOTO_OUTPUT
 
 # Compiler supports -fcondition-coverage aka MC/DC
 config CC_HAS_MCDC
-	def_bool $(cc-option,-fcondition-coverage)
+	def_bool $(cc-option,-fcondition-coverage) || $(cc-option,-fprofile-instr-generate -fcoverage-mapping -fcoverage-mcdc)
 
 # Set code alignment.
 #
diff --git a/xen/Rules.mk b/xen/Rules.mk
index 24f447b957..57ea664f02 100644
--- a/xen/Rules.mk
+++ b/xen/Rules.mk
@@ -136,6 +136,7 @@ non-init-objects = $(filter-out %.init.o, $(obj-y) $(obj-bin-y) $(extra-y))
 
 ifeq ($(CONFIG_CC_IS_CLANG),y)
     cov-cflags-$(CONFIG_COVERAGE) := -fprofile-instr-generate -fcoverage-mapping
+    cov-cflags-$(CONFIG_CONDITION_COVERAGE) +=  -fcoverage-mcdc
 else
     cov-cflags-$(CONFIG_COVERAGE) := -fprofile-arcs -ftest-coverage
     cov-cflags-$(CONFIG_CONDITION_COVERAGE) += -fcondition-coverage
diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
index 407571c510..00dfc992b3 100644
--- a/xen/arch/x86/Makefile
+++ b/xen/arch/x86/Makefile
@@ -99,7 +99,9 @@ ifneq ($(CONFIG_HVM),y)
 $(obj)/x86_emulate.o: CFLAGS-y += -Wno-unused-label
 endif
 ifeq ($(CONFIG_CONDITION_COVERAGE),y)
-$(obj)/x86_emulate.o: CFLAGS-y += -Wno-error=coverage-too-many-conditions
+    ifeq ($(CONFIG_CC_IS_GCC),y)
+        $(obj)/x86_emulate.o: CFLAGS-y += -Wno-error=coverage-too-many-conditions
+    endif
 endif
 
 efi-y := $(shell if [ ! -r $(objtree)/include/xen/compile.h -o \
diff --git a/xen/common/coverage/llvm.c b/xen/common/coverage/llvm.c
index 532889c857..a8c7e7e8d2 100644
--- a/xen/common/coverage/llvm.c
+++ b/xen/common/coverage/llvm.c
@@ -120,6 +120,10 @@ extern const char __start___llvm_prf_names[];
 extern const char __stop___llvm_prf_names[];
 extern uint64_t __start___llvm_prf_cnts[];
 extern uint64_t __stop___llvm_prf_cnts[];
+#ifdef CONFIG_CONDITION_COVERAGE
+extern const char __start___llvm_prf_bits[];
+extern const char __stop___llvm_prf_bits[];
+#endif
 
 #define START_DATA      ((const void *)__start___llvm_prf_data)
 #define END_DATA        ((const void *)__stop___llvm_prf_data)
@@ -127,16 +131,25 @@ extern uint64_t __stop___llvm_prf_cnts[];
 #define END_NAMES       ((const void *)__stop___llvm_prf_names)
 #define START_COUNTERS  ((void *)__start___llvm_prf_cnts)
 #define END_COUNTERS    ((void *)__stop___llvm_prf_cnts)
+#define START_BITMAP    ((void *)__start___llvm_prf_bits)
+#define END_BITMAP      ((void *)__stop___llvm_prf_bits)
 
 static void cf_check reset_counters(void)
 {
     memset(START_COUNTERS, 0, END_COUNTERS - START_COUNTERS);
+#ifdef CONFIG_CONDITION_COVERAGE
+    memset(START_BITMAP, 0, END_BITMAP - START_BITMAP);
+#endif
 }
 
 static uint32_t cf_check get_size(void)
 {
-    return ROUNDUP(sizeof(struct llvm_profile_header) + END_DATA - START_DATA +
+    uint32_t size = ROUNDUP(sizeof(struct llvm_profile_header) + END_DATA - START_DATA +
                    END_COUNTERS - START_COUNTERS + END_NAMES - START_NAMES, 8);
+#ifdef CONFIG_CONDITION_COVERAGE
+    size += ROUNDUP(END_BITMAP - START_BITMAP, 8);
+#endif
+    return size;
 }
 
 static int cf_check dump(
@@ -147,11 +160,17 @@ static int cf_check dump(
         .version = LLVM_PROFILE_VERSION,
         .num_data = DIV_ROUND_UP(END_DATA - START_DATA, sizeof(struct llvm_profile_data)),
         .num_counters = DIV_ROUND_UP(END_COUNTERS - START_COUNTERS, sizeof(uint64_t)),
+#if defined(CONFIG_CONDITION_COVERAGE) && LLVM_PROFILE_VERSION >= 9
+        .num_bitmap_bytes = END_BITMAP - START_BITMAP,
+#endif
         .names_size = END_NAMES - START_NAMES,
 #if LLVM_PROFILE_VERSION >= 8
         .counters_delta = START_COUNTERS - START_DATA,
 #else
         .counters_delta = (uintptr_t)START_COUNTERS,
+#endif
+#if defined(CONFIG_CONDITION_COVERAGE) && LLVM_PROFILE_VERSION >= 9
+        .bitmap_delta = START_BITMAP - START_DATA,
 #endif
         .names_delta = (uintptr_t)START_NAMES,
         .value_kind_last = LLVM_PROFILE_NUM_KINDS - 1,
@@ -168,6 +187,9 @@ static int cf_check dump(
     APPEND_TO_BUFFER(&header, sizeof(header));
     APPEND_TO_BUFFER(START_DATA, END_DATA - START_DATA);
     APPEND_TO_BUFFER(START_COUNTERS, END_COUNTERS - START_COUNTERS);
+#if defined(CONFIG_CONDITION_COVERAGE)
+    APPEND_TO_BUFFER(START_BITMAP, END_BITMAP - START_BITMAP);
+#endif
     APPEND_TO_BUFFER(START_NAMES, END_NAMES - START_NAMES);
 #undef APPEND_TO_BUFFER
 
-- 
2.49.0



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Subject: Re: New Defects reported by Coverity Scan for XenProject
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On 23.11.2025 11:01, scan-admin@coverity.com wrote:
> Please find the latest report on new defect(s) introduced to XenProject found with Coverity Scan.
> 
> 1 new defect(s) introduced to XenProject found with Coverity Scan.
> 3 defect(s), reported by Coverity Scan earlier, were marked fixed in the recent build analyzed by Coverity Scan.
> 
> New defect(s) Reported-by: Coverity Scan
> Showing 1 of 1 defect(s)
> 
> 
> ** CID 1675028:       Data race undermines locking  (LOCK_EVASION)
> /xen/arch/x86/hvm/vmx/vmx.c: 1502           in shadow_handle_cd()
> 
> 
> _____________________________________________________________________________________________
> *** CID 1675028:         Data race undermines locking  (LOCK_EVASION)
> /xen/arch/x86/hvm/vmx/vmx.c: 1502             in shadow_handle_cd()
> 1496         }
> 1497         else if ( !(value & X86_CR0_CD) &&
> 1498                   (v->arch.hvm.vmx.cache_mode == CACHE_MODE_NO_FILL) )
> 1499         {
> 1500             /* Exit from no fill cache mode. */
> 1501             spin_lock(&d->arch.hvm.vmx.uc_lock);
>>>>     CID 1675028:         Data race undermines locking  (LOCK_EVASION)
>>>>     The thread 1 sets "cache_mode" to a new value. Now the two threads have an inconsistent view of "cache_mode" and updates to fields correlated with "cache_mode" may be lost.
> 1502             v->arch.hvm.vmx.cache_mode = CACHE_MODE_NORMAL;
> 1503     
> 1504             if ( domain_exit_uc_mode(v) )
> 1505                 set_uc_mode(d, false);
> 1506     
> 1507             spin_unlock(&d->arch.hvm.vmx.uc_lock);

This clearly isn't a new one, but merely flagged as such because the code moved.
There look to be at least two aspects. For one, the tool may be irritated by
shadow and HAP modes being handled differently: In the former updates (and
corresponding checks) happen under lock, while in the latter case they don't.
This looks to leverage that no domain-wide checking is necessary, and hence
updates only ever occurring on the running vCPU means updating is race-free
despite being lock-less. (Sadly parameter / variable naming doesn't properly
reflect this "on current" aspect, despite it being pretty important here.)

Further there are vmx_{get,set}_guest_pat(), which inspect the field without
holding the lock. These functions are intended to act on either current or on
paused vCPU-s / domains only, though. Hence no race either due to all updating
being done on current.

Am I overlooking anything, or does this simply need silencing (again) in the
tool?

Jan


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Subject: Re: [XEN PATCH] libxl_nocpuid.c: fix build with json-c
To: Michael Young ,
 Anthony PERARD 
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On 21.11.2025 22:09, Michael Young wrote:
> The build of xen-4.21.0 with json-c present and yajl not present
> is failing with the error
> 
> libxl_nocpuid.c:43:1: error: unknown type name ‘yajl_gen_status’
>     43 | yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand,
>        | ^~~~~~~~~~~~~~~
> libxl_nocpuid.c:43:50: error: unknown type name ‘yajl_gen’
>     43 | yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand,
>        |                                                  ^~~~~~~~
> make[6]: *** 
> [/builddir/build/BUILD/xen-4.21.0-build/xen-4.21.0/tools/libs/light/../../../tools/Rules.mk:178: libxl_nocpuid.o] Error 1
> 
> I tested it with the patch below based on libxl_nocpuid.c which did build.
> 
> Signed-off-by: Michael Young 
> ---
>   tools/libs/light/libxl_nocpuid.c | 13 +++++++++++++
>   1 file changed, 13 insertions(+)
> 
> diff --git a/tools/libs/light/libxl_nocpuid.c 
> b/tools/libs/light/libxl_nocpuid.c
> index 0630959e76..71ab49ed61 100644
> --- a/tools/libs/light/libxl_nocpuid.c
> +++ b/tools/libs/light/libxl_nocpuid.c
> @@ -40,11 +40,24 @@ int libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t 
> domid, bool restore,
>       return 0;
>   }
> 
> +#ifdef HAVE_LIBJSONC
> +#ifndef _hidden
> +#define _hidden
> +#endif

Why would this be needed? libxl_internal provides a definition afaics.

> +_hidden int libxl_cpuid_policy_list_gen_jso(json_object **jso_r,

Nor should the attribute be needed here, as the function declaration ought
to be in scope.

> +                                libxl_cpuid_policy_list *pcpuid)
> +{
> +    return 0;
> +}
> +#endif
> +
> +#if defined(HAVE_LIBYAJL)
>   yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand,
>                                   libxl_cpuid_policy_list *pcpuid)
>   {
>       return 0;
>   }
> +#endif

Maybe unrelated to this build fix, I find it hard to believe that returning
0 (presumably meaning "success") here is appropriate without actually doing
anything. In particular for the new function you add, I think upon success
the caller can expect *jso_r to have got assigned a value. However, without
any commentary it's hard to tell whether there's some "agreement" that the
caller has to pre-set its variable (to, say, NULL).

Also why are the libxl_..._jso() all hidden, while their libxl_..._json()
counterparts aren't? And why would non-exported functions have their
declarations live in a non-private header?

Jan


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Subject: Re: [PATCH] XEN: enable MC/DC coverage for Clang
To: Saman Dehghan 
Cc: Andrew Cooper ,
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On 24.11.2025 03:18, Saman Dehghan wrote:
> Clang >= 18 supports Modified Condition/Decision Coverage (MC/DC).
> This patch enables the detection and usage of this feature when
> compiling Xen with Clang.
> 
> - Update detection logic to check for '-fcoverage-mcdc' when using Clang.

You check for ...

> - Update llvm.c to handle the profile format changes (bitmap section)
>   required for MC/DC.
> - Guard -Wno-error=coverage-too-many-conditions with CONFIG_CC_IS_GCC
>   to avoid passing a GCC-only warning option to Clang
> 
> Signed-off-by: Saman Dehghan 
> ---
>  xen/Kconfig                |  2 +-
>  xen/Rules.mk               |  1 +
>  xen/arch/x86/Makefile      |  4 +++-
>  xen/common/coverage/llvm.c | 24 +++++++++++++++++++++++-
>  4 files changed, 28 insertions(+), 3 deletions(-)
> 
> diff --git a/xen/Kconfig b/xen/Kconfig
> index a5e5af3b76..5508993f02 100644
> --- a/xen/Kconfig
> +++ b/xen/Kconfig
> @@ -53,7 +53,7 @@ config CC_HAS_ASM_GOTO_OUTPUT
>  
>  # Compiler supports -fcondition-coverage aka MC/DC
>  config CC_HAS_MCDC
> -	def_bool $(cc-option,-fcondition-coverage)
> +	def_bool $(cc-option,-fcondition-coverage) || $(cc-option,-fprofile-instr-generate -fcoverage-mapping -fcoverage-mcdc)

... more than that one option here. Presumably because the option alone
wouldn't be liked by the compiler? (May want mentioning in that part of the
description.)

> --- a/xen/arch/x86/Makefile
> +++ b/xen/arch/x86/Makefile
> @@ -99,7 +99,9 @@ ifneq ($(CONFIG_HVM),y)
>  $(obj)/x86_emulate.o: CFLAGS-y += -Wno-unused-label
>  endif
>  ifeq ($(CONFIG_CONDITION_COVERAGE),y)
> -$(obj)/x86_emulate.o: CFLAGS-y += -Wno-error=coverage-too-many-conditions
> +    ifeq ($(CONFIG_CC_IS_GCC),y)
> +        $(obj)/x86_emulate.o: CFLAGS-y += -Wno-error=coverage-too-many-conditions
> +    endif
>  endif

Please can the two conditionals be combined, like I think we do elsewhere:

ifeq ($(CONFIG_CONDITION_COVERAGE)$(CONFIG_CC_IS_GCC),yy)

or

ifeq ($(CONFIG_CONDITION_COVERAGE)_$(CONFIG_CC_IS_GCC),y_y)

?

Jan


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 Dave Hansen , "H. Peter Anvin" ,
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 Haiyang Zhang , Wei Liu ,
 Dexuan Cui , Peter Zijlstra ,
 Will Deacon , Boqun Feng ,
 Waiman Long , Jiri Kosina ,
 Josh Poimboeuf ,
 Pawan Gupta ,
 Boris Ostrovsky ,
 xen-devel@lists.xenproject.org, Ajay Kaher ,
 Alexey Makhalov ,
 Broadcom internal kernel review list
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--------------0mve0WRCUDOgkf9JsJIojBKK
Content-Type: application/pgp-keys; name="OpenPGP_0xB0DE9DD628BF132F.asc"
Content-Disposition: attachment; filename="OpenPGP_0xB0DE9DD628BF132F.asc"
Content-Description: OpenPGP public key
Content-Transfer-Encoding: quoted-printable

-----BEGIN PGP PUBLIC KEY BLOCK-----

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Subject: Re: [XEN][PATCH v4] xen/x86: guest_access: optimize raw_x_guest() for
 PV and HVM combinations
From: Jan Beulich 
To: Grygorii Strashko 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Jason Andryuk , Teddy Astie ,
 Alejandro Vallejo ,
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On 20.11.2025 09:11, Jan Beulich wrote:
> On 19.11.2025 20:36, Grygorii Strashko wrote:
>> Hi Jan
>>
>> On 18.11.25 15:45, Jan Beulich wrote:
>>> On 18.11.2025 14:08, Grygorii Strashko wrote:
>>>> On 17.11.25 18:43, Jan Beulich wrote:
>>>>> On 14.11.2025 15:01, Grygorii Strashko wrote:
>>>>>> --- a/xen/arch/x86/pv/Makefile
>>>>>> +++ b/xen/arch/x86/pv/Makefile
>>>>>> @@ -14,6 +14,10 @@ obj-y += ro-page-fault.o
>>>>>>    obj-$(CONFIG_PV_SHIM) += shim.o
>>>>>>    obj-$(CONFIG_TRACEBUFFER) += trace.o
>>>>>>    obj-y += traps.o
>>>>>> +obj-$(CONFIG_PV) += usercopy.o
>>>>>
>>>>> Just obj-y with the movement.
>>>>>
>>>>> However, is the movement (and was the adding of $(CONFIG_PV) in the earlier
>>>>> version) actually correct? The file also produces copy_{from,to}_unsafe_ll(),
>>>>> which aren't PV-specific. This may be only a latent issue right now, as we
>>>>> have only a single use site of copy_from_unsafe(), but those functions need
>>>>> to remain available. (We may want to arrange for them to be removed when
>>>>> linking, as long as they're not referenced. But that's a separate topic.)
>>>>
>>>> It is confusing that none of build cfg combinations have failed
>>>> (HVM=y PV=n, HVM=n PV=n) :(
>>>>
>>>> copy_to_unsafe_ll()
>>>> - called from copy_to_unsafe()
>>>> - copy_to_unsafe() has no users (unreachable, MISRA 2.1?)
>>>>
>>>> copy_from_unsafe_ll()
>>>> - called from copy_from_unsafe()
>>>> - copy_from_unsafe() called from one place do_invalid_op() with
>>>>     copy_from_unsafe(,, n = sizeof(bug_insn)).
>>>>     Due to __builtin_constant_p(n) check the copy_from_unsafe() call
>>>>     optimized by compiler to
>>>>     get_unsafe_size(*(uint16_t *)to, from, 2, UA_DROP, ret, 2);
>>>>
>>>> as result copy_from_unsafe_ll() is unreachable also (?).
>>>
>>> Yes, these likely all want to become library-like, so they are linked in only
>>> when actually referenced.
>>>
>>>> If those function are not subject to be removed, the
>>>>    usercopy.c can't be moved in "x86/pv", Right?
>>>
>>> That's my take, yes.
>>>
>>>> Making copy_{from,to}_unsafe_ll() available for !PV means
>>>> rewriting usercopy.c in some way, Right?
>>>
>>> "Re-writing" is probably too much, but some adjustments would be needed if
>>> you want to keep the "unsafe" functions but compile out the "guest" ones.
>>> It may be possible to compile the file twice, once from x86/pv/ and once
>>> from x86/, replacing the self-#include near the bottom of the file. The
>>> former would then produce the "guest" functions, the latter the "unsafe"
>>> ones.
>>
>> Below is the difference I came up with, will it work?
> 
> That'll be on you to make sure, but ...
> 
>> --- /dev/null
>> +++ b/xen/arch/x86/usercopy.c
>> @@ -0,0 +1,77 @@
>> +/*
>> + * User address space access functions.
>> + *
>> + * Copyright 1997 Andi Kleen 
>> + * Copyright 1997 Linus Torvalds
>> + * Copyright 2002 Andi Kleen 
>> + */
>> +
>> +#include 
>> +#include 
>> +#include 
>> +
>> +# define GUARD UA_DROP
>> +# define copy_to_guest_ll copy_to_unsafe_ll
>> +# define copy_from_guest_ll copy_from_unsafe_ll
>> +# undef __user
>> +# define __user
>> +
>> +unsigned int copy_to_guest_ll(void __user *to, const void *from, unsigned int n)
>> +{
>> +    GUARD(unsigned dummy);
>> +
>> +    stac();
>> +    asm_inline volatile (
>> +        GUARD(
>> +        "    guest_access_mask_ptr %[to], %q[scratch1], %q[scratch2]\n"
>> +        )
>> +        "1:  rep movsb\n"
>> +        "2:\n"
>> +        _ASM_EXTABLE(1b, 2b)
>> +        : [cnt] "+c" (n), [to] "+D" (to), [from] "+S" (from)
>> +          GUARD(, [scratch1] "=&r" (dummy), [scratch2] "=&r" (dummy))
>> +        :: "memory" );
>> +    clac();
>> +
>> +    return n;
>> +}
>> +
>> +unsigned int copy_from_guest_ll(void *to, const void __user *from, unsigned int n)
>> +{
>> +    unsigned dummy;
>> +
>> +    stac();
>> +    asm_inline volatile (
>> +        GUARD(
>> +        "    guest_access_mask_ptr %[from], %q[scratch1], %q[scratch2]\n"
>> +        )
>> +        "1:  rep movsb\n"
>> +        "2:\n"
>> +        ".section .fixup,\"ax\"\n"
>> +        "6:  mov  %[cnt], %k[from]\n"
>> +        "    xchg %%eax, %[aux]\n"
>> +        "    xor  %%eax, %%eax\n"
>> +        "    rep stosb\n"
>> +        "    xchg %[aux], %%eax\n"
>> +        "    mov  %k[from], %[cnt]\n"
>> +        "    jmp 2b\n"
>> +        ".previous\n"
>> +        _ASM_EXTABLE(1b, 6b)
>> +        : [cnt] "+c" (n), [to] "+D" (to), [from] "+S" (from),
>> +          [aux] "=&r" (dummy)
>> +          GUARD(, [scratch1] "=&r" (dummy), [scratch2] "=&r" (dummy))
>> +        :: "memory" );
>> +    clac();
>> +
>> +    return n;
>> +}
> 
> ... we don't want to have two instances of that code in the code base. One file
> should #include the other, after putting in place suitable #define-s. Which
> direction the #include should work I'm not entirely certain:
> - pv/usercopy.c including usercopy.c means usercopy.c then ends up misnamed,
> - usercopy.c including pv/usercopy.c means a "common" file includes a more
>   specialized (PV-only) one.

Likely it would be best to build this into library members (ideally one per
function), such that unused ones wouldn't even be pulled in by the linker. I
meant to suggest to move to xen/arch/x86/lib/, but right now we only have
xen/lib/x86/, where I don't think this would be a good fit. I've brought this
up with the other x86 maintainers ...

Jan


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From: Daniel =?utf-8?B?UC4gQmVycmFuZ8Op?= 
To: Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= 
Cc: qemu-devel@nongnu.org, Paolo Bonzini ,
	David Woodhouse , Paul Durrant ,
	Eduardo Habkost ,
	xen-devel@lists.xenproject.org,
	Anthony PERARD ,
	Stefano Stabellini ,
	Richard Henderson ,
	"Michael S. Tsirkin" ,
	Mark Cave-Ayland ,
	Marcel Apfelbaum 
Subject: Re: [PATCH] hw/i386/isapc: Remove dead Xen code
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On Sun, Nov 23, 2025 at 07:58:32PM +0100, Philippe Mathieu-Daudé wrote:
> We don't use Xen on the isapc machine: let's remove
> pointless code.
> 
> Signed-off-by: Philippe Mathieu-Daudé 
> ---
>  hw/i386/isapc.c | 27 ++++-----------------------
>  1 file changed, 4 insertions(+), 23 deletions(-)

Reviewed-by: Daniel P. Berrangé 


With regards,
Daniel
-- 
|: https://berrange.com      -o-    https://www.flickr.com/photos/dberrange :|
|: https://libvirt.org         -o-            https://fstop138.berrange.com :|
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Subject: Re: [PATCH 04/12] x86/irq: set accurate cpu_mask for high priority
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On 21.11.2025 09:29, Roger Pau Monné wrote:
> On Thu, Nov 20, 2025 at 02:06:39PM +0100, Jan Beulich wrote:
>> On 20.11.2025 10:06, Roger Pau Monne wrote:
>>> Setting the irq descriptor target CPU mask of high priority interrupts to
>>> contain all online CPUs is not accurate.  External interrupts are
>>> exclusively delivered using physical destination mode, and hence can only
>>> target a single CPU.  Setting the descriptor CPU mask to contain all online
>>> CPUs makes it impossible for Xen to figure out which CPU the interrupt is
>>> really targeting.
>>>
>>> Instead handle high priority vectors used by external interrupts similarly
>>> to normal vectors, keeping the target CPU mask accurate.  Introduce
>>> specific code in _assign_irq_vector() to deal with moving high priority
>>> vectors across CPUs, this is needed at least for fixup_irqs() to be able to
>>> evacuate those if the target CPU goes offline.
>>>
>>> Fixes: fc0c3fa2ad5c ("x86/IO-APIC: fix setup of Xen internally used IRQs (take 2)")
>>> Signed-off-by: Roger Pau Monné 
>>
>> Reviewed-by: Jan Beulich 
>> with one further request:
>>
>>> @@ -756,12 +770,10 @@ void setup_vector_irq(unsigned int cpu)
>>>          if ( !irq_desc_initialized(desc) )
>>>              continue;
>>>          vector = irq_to_vector(irq);
>>> -        if ( vector >= FIRST_HIPRIORITY_VECTOR &&
>>> -             vector <= LAST_HIPRIORITY_VECTOR )
>>> -            cpumask_set_cpu(cpu, desc->arch.cpu_mask);
>>> -        else if ( !cpumask_test_cpu(cpu, desc->arch.cpu_mask) )
>>> -            continue;
>>> -        per_cpu(vector_irq, cpu)[vector] = irq;
>>> +        if ( (vector >= FIRST_HIPRIORITY_VECTOR &&
>>> +              vector <= LAST_HIPRIORITY_VECTOR) ||
>>> +             cpumask_test_cpu(cpu, desc->arch.cpu_mask) )
>>> +            per_cpu(vector_irq, cpu)[vector] = irq;
>>
>> Going beyond desc->arch.cpu_mask for hiprio vectors may deserve a comment here. When
>> the vector is global, this is necessary. But for e.g. the serial IRQ (which still
>> moves, but isn't bound to multiple CPUs, the more normal way of respecting
>> desc->arch.cpu_mask would be sufficient.
> 
> Note that hiprio vectors are handled specially in _assign_irq_vector()
> and the logic to set per_cpu(vector_irq, cpu)[vector] is
> short-circuited assuming that hiprio vectors are already setup on all
> CPUs.
> 
>> It is merely (largely) benign if we set
>> vector_irq[] also for other CPUs. "Largely" because strictly speaking if that vector
>> triggered on the wrong CPU for whatever reason, we rather shouldn't treat it as a
>> legitimate interrupt.
> 
> I see, yes, we could handle hiprio vectors more like normal ones and
> do a bit more work in _assign_irq_vector() to also set the
> vector_irq[] array at bind time, but then we would need the cleanup
> logic as the interrupt migrates, which is a bit of overhead when we
> know the vector won't be re-used for anything else.
> 
> What about I add the following comment:
> 
>         if ( cpumask_test_cpu(cpu, desc->arch.cpu_mask) ||
>              /*
>               * High-priority vectors are reserved on all CPUs.  Set
>               * the vector to IRQ assignment on all CPUs, even if the
>               * interrupt is not targeting this CPU.  That makes
>               * shuffling those interrupts around CPUs easier.
>               */
>              (vector >= FIRST_HIPRIORITY_VECTOR &&
>               vector <= LAST_HIPRIORITY_VECTOR) )
>             per_cpu(vector_irq, cpu)[vector] = irq;

Thanks, that's fine with me.

Jan


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Subject: Re: [PATCH 06/12] x86/i8259: redo workaround for AMD spurious PIC
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To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
Cc: Andrew Cooper , xen-devel@lists.xenproject.org
References: <20251120090637.25087-1-roger.pau@citrix.com>
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On 21.11.2025 09:35, Roger Pau Monné wrote:
> On Thu, Nov 20, 2025 at 04:05:38PM +0100, Jan Beulich wrote:
>> On 20.11.2025 10:58, Roger Pau Monne wrote:
>>> --- a/xen/arch/x86/i8259.c
>>> +++ b/xen/arch/x86/i8259.c
>>> @@ -407,21 +407,14 @@ void __init init_IRQ(void)
>>>          per_cpu(vector_irq, cpu)[LEGACY_VECTOR(irq)] = irq;
>>>  
>>>          /*
>>> -         * The interrupt affinity logic never targets interrupts to offline
>>> -         * CPUs, hence it's safe to use cpumask_all here.
>>> -         *
>>>           * Legacy PIC interrupts are only targeted to CPU0, but depending on
>>>           * the platform they can be distributed to any online CPU in hardware.
>>> -         * Note this behavior has only been observed on AMD hardware. In order
>>> -         * to cope install all active legacy vectors on all CPUs.
>>> -         *
>>> -         * IO-APIC will change the destination mask if/when taking ownership of
>>> -         * the interrupt.
>>> +         * Note this behavior has only been observed on AMD hardware. Set the
>>> +         * target CPU as expected here, and cope with the possibly spurious
>>> +         * interrupts in do_IRQ().  This behavior has only been observed
>>> +         * during AP bringup.
>>>           */
>>> -        cpumask_copy(desc->arch.cpu_mask,
>>> -                     (boot_cpu_data.x86_vendor &
>>> -                      (X86_VENDOR_AMD | X86_VENDOR_HYGON) ? &cpumask_all
>>> -                                                          : cpumask_of(cpu)));
>>> +        cpumask_copy(desc->arch.cpu_mask, cpumask_of(cpu));
>>>          desc->arch.vector = LEGACY_VECTOR(irq);
>>>      }
>>
>> Doesn't this collide with what setup_vector_irq() does (see also patch 04)? If
>> you don't set all bits here, not all CPUs will have the vector_irq[] slot set
>> correctly for do_IRQ() to actually be able to associate the vector with the
>> right IRQ.
> 
> For the AMD workaround I've only ever saw the spurious vector
> triggering on CPUs different than the BSP at bringup,

Besides this possibly being an artifact (the issue occurring once during boot
may hide it otherwise potentially also occurring later), I think we want to be
conservative and (continue to) cover all possible cases unless we have an
explanation for why the issue would be AP-bringup-time-only.

Jan

> I don't think we
> strictly need to bind all legacy vectors on all possible CPUs.  Well
> behaved PIC interrupts will only target the BSP, and that's properly
> setup.
> 
> Thanks, Roger.



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On 23/11/2025 18:58, Philippe Mathieu-Daudé wrote:

> We don't use Xen on the isapc machine: let's remove
> pointless code.
> 
> Signed-off-by: Philippe Mathieu-Daudé 
> ---
>   hw/i386/isapc.c | 27 ++++-----------------------
>   1 file changed, 4 insertions(+), 23 deletions(-)
> 
> diff --git a/hw/i386/isapc.c b/hw/i386/isapc.c
> index 1ba9ae22cc3..1e13a30c505 100644
> --- a/hw/i386/isapc.c
> +++ b/hw/i386/isapc.c
> @@ -17,8 +17,6 @@
>   #include "hw/ide/ide-bus.h"
>   #include "system/kvm.h"
>   #include "hw/i386/kvm/clock.h"
> -#include "hw/xen/xen-x86.h"
> -#include "system/xen.h"
>   #include "hw/rtc/mc146818rtc.h"
>   #include "target/i386/cpu.h"
>   
> @@ -37,7 +35,6 @@ static void pc_init_isa(MachineState *machine)
>       ISABus *isa_bus;
>       uint32_t irq;
>       GSIState *gsi_state;
> -    MemoryRegion *ram_memory;
>       DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
>       int i;
>   
> @@ -77,15 +74,9 @@ static void pc_init_isa(MachineState *machine)
>       /*
>        * There is no RAM split for the isapc machine
>        */
> -    if (xen_enabled()) {
> -        xen_hvm_init_pc(pcms, &ram_memory);
> -    } else {
> -        ram_memory = machine->ram;
> -
> -        pcms->max_ram_below_4g = 3.5 * GiB;
> -        x86ms->above_4g_mem_size = 0;
> -        x86ms->below_4g_mem_size = machine->ram_size;
> -    }
> +    pcms->max_ram_below_4g = 3.5 * GiB;
> +    x86ms->above_4g_mem_size = 0;
> +    x86ms->below_4g_mem_size = machine->ram_size;
>   
>       x86_cpus_init(x86ms, pcmc->default_cpu_version);
>   
> @@ -94,17 +85,7 @@ static void pc_init_isa(MachineState *machine)
>       }
>   
>       /* allocate ram and load rom/bios */
> -    if (!xen_enabled()) {
> -        pc_memory_init(pcms, system_memory, system_memory, 0);
> -    } else {
> -        assert(machine->ram_size == x86ms->below_4g_mem_size +
> -                                    x86ms->above_4g_mem_size);
> -
> -        if (machine->kernel_filename != NULL) {
> -            /* For xen HVM direct kernel boot, load linux here */
> -            xen_load_linux(pcms);
> -        }
> -    }
> +    pc_memory_init(pcms, system_memory, system_memory, 0);
>   
>       gsi_state = pc_gsi_create(&x86ms->gsi, false);

FWIW I did contact upstream about this (see 
https://patchew.org/QEMU/20250618112828.235087-1-mark.caveayland@nutanix.com/20250618112828.235087-13-mark.caveayland@nutanix.com/#91b96b24-af60-4a89-91ec-d0e660a76a0a@nutanix.com) 
and they mentioned that it should work, which is why I left it in.

Unfortunately I don't currently have any way to test it here :/


ATB,

Mark.



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In-Reply-To: 
From: Saman Dehghan 
Date: Mon, 24 Nov 2025 04:37:58 -0600
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Message-ID: 
Subject: Re: [PATCH] XEN: enable MC/DC coverage for Clang
To: Jan Beulich 
Cc: Andrew Cooper , Anthony PERARD , 
	Michal Orzel , Julien Grall , 
	=?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
	Stefano Stabellini , xen-devel@lists.xenproject.org
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On Mon, Nov 24, 2025 at 3:40=E2=80=AFAM Jan Beulich  wro=
te:
>
> On 24.11.2025 03:18, Saman Dehghan wrote:
> > Clang >=3D 18 supports Modified Condition/Decision Coverage (MC/DC).
> > This patch enables the detection and usage of this feature when
> > compiling Xen with Clang.
> >
> > - Update detection logic to check for '-fcoverage-mcdc' when using
Clang.
>
> You check for ...
>
> > - Update llvm.c to handle the profile format changes (bitmap section)
> >   required for MC/DC.
> > - Guard -Wno-error=3Dcoverage-too-many-conditions with CONFIG_CC_IS_GCC
> >   to avoid passing a GCC-only warning option to Clang
> >
> > Signed-off-by: Saman Dehghan 
> > ---
> >  xen/Kconfig                |  2 +-
> >  xen/Rules.mk               |  1 +
> >  xen/arch/x86/Makefile      |  4 +++-
> >  xen/common/coverage/llvm.c | 24 +++++++++++++++++++++++-
> >  4 files changed, 28 insertions(+), 3 deletions(-)
> >
> > diff --git a/xen/Kconfig b/xen/Kconfig
> > index a5e5af3b76..5508993f02 100644
> > --- a/xen/Kconfig
> > +++ b/xen/Kconfig
> > @@ -53,7 +53,7 @@ config CC_HAS_ASM_GOTO_OUTPUT
> >
> >  # Compiler supports -fcondition-coverage aka MC/DC
> >  config CC_HAS_MCDC
> > -     def_bool $(cc-option,-fcondition-coverage)
> > +     def_bool $(cc-option,-fcondition-coverage) ||
$(cc-option,-fprofile-instr-generate -fcoverage-mapping -fcoverage-mcdc)
>
> ... more than that one option here. Presumably because the option alone
> wouldn't be liked by the compiler? (May want mentioning in that part of
the
> description.)
>
Yes, That is because '-fcoverage-mcdc' only allowed with
'-fcoverage-mapping' and '-fcoverage-mapping' only allowed with
'-fprofile-instr-generate'.
I will add this to the description.
Thanks.

> > --- a/xen/arch/x86/Makefile
> > +++ b/xen/arch/x86/Makefile
> > @@ -99,7 +99,9 @@ ifneq ($(CONFIG_HVM),y)
> >  $(obj)/x86_emulate.o: CFLAGS-y +=3D -Wno-unused-label
> >  endif
> >  ifeq ($(CONFIG_CONDITION_COVERAGE),y)
> > -$(obj)/x86_emulate.o: CFLAGS-y +=3D
-Wno-error=3Dcoverage-too-many-conditions
> > +    ifeq ($(CONFIG_CC_IS_GCC),y)
> > +        $(obj)/x86_emulate.o: CFLAGS-y +=3D
-Wno-error=3Dcoverage-too-many-conditions
> > +    endif
> >  endif
>
> Please can the two conditionals be combined, like I think we do elsewhere=
:
>
> ifeq ($(CONFIG_CONDITION_COVERAGE)$(CONFIG_CC_IS_GCC),yy)
>
> or
>
> ifeq ($(CONFIG_CONDITION_COVERAGE)_$(CONFIG_CC_IS_GCC),y_y)
>
> ?

I initially kept the nesting because I found several similar cases in the c=
ode
base that weren=E2=80=99t merged , so I assumed it was intentional.
No problem at all, I will combine them.
Thanks.

>
> Jan

--0000000000006c83fc064454c22a
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Content-Transfer-Encoding: quoted-printable


On Mon, Nov 24, 2025 at 3:40=E2=80=AFAM Jan Beulich <jbeulich@suse.com> wrote:
>=

> On 24.11.2025 03:18, Saman Dehghan wrote:
> > Clang >=
=3D 18 supports Modified Condition/Decision Coverage (MC/DC).
> > =
This patch enables the detection and usage of this feature when
> >=
; compiling Xen with Clang.
> >
> > - Update detection lo=
gic to check for '-fcoverage-mcdc' when using Clang.
>
>=
; You check for ...
>
> > - Update llvm.c to handle the prof=
ile format changes (bitmap section)
> > =C2=A0 required for MC/DC.=

> > - Guard -Wno-error=3Dcoverage-too-many-conditions with CONFIG=
_CC_IS_GCC
> > =C2=A0 to avoid passing a GCC-only warning option t=
o Clang
> >
> > Signed-off-by: Saman Dehghan <samaan.dehghan@gmail.com>
&g=
t; > ---
> > =C2=A0xen/Kconfig =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=
=A0 =C2=A0 =C2=A0 =C2=A0| =C2=A02 +-
> > =C2=A0xen/Rules.mk =C2=A0=
 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 | =C2=A01 +
> > =C2=A0x=
en/arch/x86/Makefile =C2=A0 =C2=A0 =C2=A0| =C2=A04 +++-
> > =C2=A0=
xen/common/coverage/llvm.c | 24 +++++++++++++++++++++++-
> > =C2=
=A04 files changed, 28 insertions(+), 3 deletions(-)
> >
> &=
gt; diff --git a/xen/Kconfig b/xen/Kconfig
> > index a5e5af3b76..5=
508993f02 100644
> > --- a/xen/Kconfig
> > +++ b/xen/Kcon=
fig
> > @@ -53,7 +53,7 @@ config CC_HAS_ASM_GOTO_OUTPUT
> &g=
t; 
> > =C2=A0# Compiler supports -fcondition-coverage aka MC/DC> > =C2=A0config CC_HAS_MCDC
> > - =C2=A0 =C2=A0 def_bool =
$(cc-option,-fcondition-coverage)
> > + =C2=A0 =C2=A0 def_bool $(c=
c-option,-fcondition-coverage) || $(cc-option,-fprofile-instr-generate -fco=
verage-mapping -fcoverage-mcdc)
>
> ... more than that one opti=
on here. Presumably because the option alone
> wouldn't be liked =
by the compiler? (May want mentioning in that part of the
> descripti=
on.)
>
Yes, That is because '-fcoverage-mcdc' only allowed with '-f=
coverage-mapping' and=C2=A0'-fcoverage-mapping' only allowed with '-fprofile-in=
str-generate'.
I will add this to the description.
Thanks.

> > --- a/xen/arch/x86/Makefile
> &=
gt; +++ b/xen/arch/x86/Makefile
> > @@ -99,7 +99,9 @@ ifneq ($(CON=
FIG_HVM),y)
> > =C2=A0$(obj)/x86_emulate.o: CFLAGS-y +=3D -Wno-unu=
sed-label
> > =C2=A0endif
> > =C2=A0ifeq ($(CONFIG_CONDIT=
ION_COVERAGE),y)
> > -$(obj)/x86_emulate.o: CFLAGS-y +=3D -Wno-err=
or=3Dcoverage-too-many-conditions
> > + =C2=A0 =C2=A0ifeq ($(CONFI=
G_CC_IS_GCC),y)
> > + =C2=A0 =C2=A0 =C2=A0 =C2=A0$(obj)/x86_emulat=
e.o: CFLAGS-y +=3D -Wno-error=3Dcoverage-too-many-conditions
> > +=
 =C2=A0 =C2=A0endif
> > =C2=A0endif
>
> Please can the=
 two conditionals be combined, like I think we do elsewhere:
>
>=
; ifeq ($(CONFIG_CONDITION_COVERAGE)$(CONFIG_CC_IS_GCC),yy)
>
>=
 or
>
> ifeq ($(CONFIG_CONDITION_COVERAGE)_$(CONFIG_CC_IS_GCC),=
y_y)
>
> ?

I initially kept the nestin=
g because I found several similar cases in the=C2=A0code base that weren=E2=
=80=99t merged=C2=A0, so I assumed it was intentional.
No problem at =
all, I wi=
ll combine them.
Thanks.

>
> Jan


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Subject: Re: [PATCH v3 1/4] build: add make macro for making file from file.in
To: Juergen Gross 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
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On 21.11.2025 14:23, Juergen Gross wrote:
> --- a/Config.mk
> +++ b/Config.mk
> @@ -159,6 +159,19 @@ define move-if-changed
>  	if ! cmp -s $(1) $(2); then mv -f $(1) $(2); else rm -f $(1); fi
>  endef
>  
> +PATH_FILES := Paths
> +INC_FILES = $(foreach f, $(PATH_FILES), $(XEN_ROOT)/config/$(f).mk)
> +
> +include $(INC_FILES)
> +
> +BUILD_MAKE_VARS = $(foreach f, $(PATH_FILES), $(shell awk '$$2 == ":=" { print $$1; }' $(XEN_ROOT)/config/$(f).mk.in))

Feels like my prior comments weren't really addressed. I continue to think that
none of the above is part of what the subject says.

> +# Replace @xxx@ markers in $(1).in with $(xxx) variable contents, write to $(1)
> +define apply-build-vars
> + $(1): $(1).in $$(INC_FILES)

I further understood your reply to my v2 comment the way that you would drop the
slightly odd leading blank from here.

Jan

> +	sed $$(foreach v, $$(BUILD_MAKE_VARS), -e 's#@$$(v)@#$$($$(v))#g') <$$< >$$@
> +endef
> +
>  CFLAGS += -fno-strict-aliasing
>  
>  CFLAGS += -std=gnu99



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Subject: Re: [PATCH 08/12] x86/irq: adjust bind_irq_vector() to take a single
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To: Roger Pau Monne 
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On 20.11.2025 10:58, Roger Pau Monne wrote:
> The vector will be targeting a single CPU at a time, so passing a mask is
> not needed.  Simplify the interface and adjust callers to make use of it.

Considering the two callers we have, and considering the function is __init,
do we need the function parameter at all? Can't we uniformly use the BSP?

> --- a/xen/arch/x86/hpet.c
> +++ b/xen/arch/x86/hpet.c
> @@ -352,7 +352,7 @@ static int __init hpet_setup_msi_irq(struct hpet_event_channel *ch)
>       * Technically we don't want to bind the IRQ to any CPU yet, but we need to
>       * specify at least one online one here.  Use the BSP.
>       */
> -    ret = bind_irq_vector(ch->msi.irq, HPET_BROADCAST_VECTOR, cpumask_of(0));
> +    ret = bind_irq_vector(ch->msi.irq, HPET_BROADCAST_VECTOR, 0);

Irrespective of the remark above, the comment then will want re-wording some,
too.

Jan


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From: =?utf-8?Q?Alex_Benn=C3=A9e?= 
To: Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= 
Cc: qemu-devel@nongnu.org,  Paolo Bonzini ,  David
 Woodhouse ,  Paul Durrant ,  Eduardo
 Habkost ,  xen-devel@lists.xenproject.org,  Anthony
 PERARD ,  Stefano Stabellini
 ,  Richard Henderson
 ,  "Michael S. Tsirkin" ,
  Mark Cave-Ayland ,  Marcel Apfelbaum
 
Subject: Re: [PATCH] hw/i386/isapc: Remove dead Xen code
In-Reply-To: <20251123185832.53802-1-philmd@linaro.org> ("Philippe
	=?utf-8?Q?Mathieu-Daud=C3=A9=22's?= message of "Sun, 23 Nov 2025 19:58:32
 +0100")
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Philippe Mathieu-Daud=C3=A9  writes:

> We don't use Xen on the isapc machine: let's remove
> pointless code.

Are you sure about this? The older Xen config did support:

  isa
      Simulate an ISA only system

  isa (Default=3D0; Value=3D'no|yes')=20

I don't know why anyone would want a ISA capable HVM machine these days
but I would at least want to know when Xen dropped this as an option in
the commit message.

>
> Signed-off-by: Philippe Mathieu-Daud=C3=A9 
> ---
>  hw/i386/isapc.c | 27 ++++-----------------------
>  1 file changed, 4 insertions(+), 23 deletions(-)
>
> diff --git a/hw/i386/isapc.c b/hw/i386/isapc.c
> index 1ba9ae22cc3..1e13a30c505 100644
> --- a/hw/i386/isapc.c
> +++ b/hw/i386/isapc.c
> @@ -17,8 +17,6 @@
>  #include "hw/ide/ide-bus.h"
>  #include "system/kvm.h"
>  #include "hw/i386/kvm/clock.h"
> -#include "hw/xen/xen-x86.h"
> -#include "system/xen.h"
>  #include "hw/rtc/mc146818rtc.h"
>  #include "target/i386/cpu.h"
>=20=20
> @@ -37,7 +35,6 @@ static void pc_init_isa(MachineState *machine)
>      ISABus *isa_bus;
>      uint32_t irq;
>      GSIState *gsi_state;
> -    MemoryRegion *ram_memory;
>      DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
>      int i;
>=20=20
> @@ -77,15 +74,9 @@ static void pc_init_isa(MachineState *machine)
>      /*
>       * There is no RAM split for the isapc machine
>       */
> -    if (xen_enabled()) {
> -        xen_hvm_init_pc(pcms, &ram_memory);
> -    } else {
> -        ram_memory =3D machine->ram;
> -
> -        pcms->max_ram_below_4g =3D 3.5 * GiB;
> -        x86ms->above_4g_mem_size =3D 0;
> -        x86ms->below_4g_mem_size =3D machine->ram_size;
> -    }
> +    pcms->max_ram_below_4g =3D 3.5 * GiB;
> +    x86ms->above_4g_mem_size =3D 0;
> +    x86ms->below_4g_mem_size =3D machine->ram_size;
>=20=20
>      x86_cpus_init(x86ms, pcmc->default_cpu_version);
>=20=20
> @@ -94,17 +85,7 @@ static void pc_init_isa(MachineState *machine)
>      }
>=20=20
>      /* allocate ram and load rom/bios */
> -    if (!xen_enabled()) {
> -        pc_memory_init(pcms, system_memory, system_memory, 0);
> -    } else {
> -        assert(machine->ram_size =3D=3D x86ms->below_4g_mem_size +
> -                                    x86ms->above_4g_mem_size);
> -
> -        if (machine->kernel_filename !=3D NULL) {
> -            /* For xen HVM direct kernel boot, load linux here */
> -            xen_load_linux(pcms);
> -        }
> -    }
> +    pc_memory_init(pcms, system_memory, system_memory, 0);
>=20=20
>      gsi_state =3D pc_gsi_create(&x86ms->gsi, false);

--=20
Alex Benn=C3=A9e
Virtualisation Tech Lead @ Linaro


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From: Saman Dehghan 
To: xen-devel@lists.xenproject.org
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v2] XEN: enable MC/DC coverage for Clang
Date: Mon, 24 Nov 2025 05:04:34 -0600
Message-ID: <52b0762ac4b5535a842a530365a75bdc81a5fe61.1763981619.git.samaan.dehghan@gmail.com>
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MIME-Version: 1.0
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Clang >= 18 supports Modified Condition/Decision Coverage (MC/DC).
This patch enables the detection and usage of this feature when
compiling Xen with Clang.

- Update detection logic in Kconfig to check for the required set of
  Clang flags for MC/DC:
  '-fprofile-instr-generate -fcoverage-mapping -fcoverage-mcdc'.
  This bundle is necessary because '-fcoverage-mcdc' requires
  '-fcoverage-mapping', which in turn requires '-fprofile-instr-generate'.
- Update llvm.c to handle the profile format changes (bitmap section)
  required for MC/DC.
- Guard -Wno-error=coverage-too-many-conditions with CONFIG_CC_IS_GCC
  to avoid passing a GCC-only warning option to Clang

Signed-off-by: Saman Dehghan 
---
 xen/Kconfig                |  2 +-
 xen/Rules.mk               |  1 +
 xen/arch/x86/Makefile      |  2 +-
 xen/common/coverage/llvm.c | 24 +++++++++++++++++++++++-
 4 files changed, 26 insertions(+), 3 deletions(-)

diff --git a/xen/Kconfig b/xen/Kconfig
index a5e5af3b76..5508993f02 100644
--- a/xen/Kconfig
+++ b/xen/Kconfig
@@ -53,7 +53,7 @@ config CC_HAS_ASM_GOTO_OUTPUT
 
 # Compiler supports -fcondition-coverage aka MC/DC
 config CC_HAS_MCDC
-	def_bool $(cc-option,-fcondition-coverage)
+	def_bool $(cc-option,-fcondition-coverage) || $(cc-option,-fprofile-instr-generate -fcoverage-mapping -fcoverage-mcdc)
 
 # Set code alignment.
 #
diff --git a/xen/Rules.mk b/xen/Rules.mk
index 24f447b957..57ea664f02 100644
--- a/xen/Rules.mk
+++ b/xen/Rules.mk
@@ -136,6 +136,7 @@ non-init-objects = $(filter-out %.init.o, $(obj-y) $(obj-bin-y) $(extra-y))
 
 ifeq ($(CONFIG_CC_IS_CLANG),y)
     cov-cflags-$(CONFIG_COVERAGE) := -fprofile-instr-generate -fcoverage-mapping
+    cov-cflags-$(CONFIG_CONDITION_COVERAGE) +=  -fcoverage-mcdc
 else
     cov-cflags-$(CONFIG_COVERAGE) := -fprofile-arcs -ftest-coverage
     cov-cflags-$(CONFIG_CONDITION_COVERAGE) += -fcondition-coverage
diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
index 407571c510..6c0ff67fa8 100644
--- a/xen/arch/x86/Makefile
+++ b/xen/arch/x86/Makefile
@@ -98,7 +98,7 @@ $(obj)/usercopy.o: CFLAGS-y += -iquote .
 ifneq ($(CONFIG_HVM),y)
 $(obj)/x86_emulate.o: CFLAGS-y += -Wno-unused-label
 endif
-ifeq ($(CONFIG_CONDITION_COVERAGE),y)
+ifeq ($(CONFIG_CONDITION_COVERAGE)$(CONFIG_CC_IS_GCC),yy)
 $(obj)/x86_emulate.o: CFLAGS-y += -Wno-error=coverage-too-many-conditions
 endif
 
diff --git a/xen/common/coverage/llvm.c b/xen/common/coverage/llvm.c
index 532889c857..a8c7e7e8d2 100644
--- a/xen/common/coverage/llvm.c
+++ b/xen/common/coverage/llvm.c
@@ -120,6 +120,10 @@ extern const char __start___llvm_prf_names[];
 extern const char __stop___llvm_prf_names[];
 extern uint64_t __start___llvm_prf_cnts[];
 extern uint64_t __stop___llvm_prf_cnts[];
+#ifdef CONFIG_CONDITION_COVERAGE
+extern const char __start___llvm_prf_bits[];
+extern const char __stop___llvm_prf_bits[];
+#endif
 
 #define START_DATA      ((const void *)__start___llvm_prf_data)
 #define END_DATA        ((const void *)__stop___llvm_prf_data)
@@ -127,16 +131,25 @@ extern uint64_t __stop___llvm_prf_cnts[];
 #define END_NAMES       ((const void *)__stop___llvm_prf_names)
 #define START_COUNTERS  ((void *)__start___llvm_prf_cnts)
 #define END_COUNTERS    ((void *)__stop___llvm_prf_cnts)
+#define START_BITMAP    ((void *)__start___llvm_prf_bits)
+#define END_BITMAP      ((void *)__stop___llvm_prf_bits)
 
 static void cf_check reset_counters(void)
 {
     memset(START_COUNTERS, 0, END_COUNTERS - START_COUNTERS);
+#ifdef CONFIG_CONDITION_COVERAGE
+    memset(START_BITMAP, 0, END_BITMAP - START_BITMAP);
+#endif
 }
 
 static uint32_t cf_check get_size(void)
 {
-    return ROUNDUP(sizeof(struct llvm_profile_header) + END_DATA - START_DATA +
+    uint32_t size = ROUNDUP(sizeof(struct llvm_profile_header) + END_DATA - START_DATA +
                    END_COUNTERS - START_COUNTERS + END_NAMES - START_NAMES, 8);
+#ifdef CONFIG_CONDITION_COVERAGE
+    size += ROUNDUP(END_BITMAP - START_BITMAP, 8);
+#endif
+    return size;
 }
 
 static int cf_check dump(
@@ -147,11 +160,17 @@ static int cf_check dump(
         .version = LLVM_PROFILE_VERSION,
         .num_data = DIV_ROUND_UP(END_DATA - START_DATA, sizeof(struct llvm_profile_data)),
         .num_counters = DIV_ROUND_UP(END_COUNTERS - START_COUNTERS, sizeof(uint64_t)),
+#if defined(CONFIG_CONDITION_COVERAGE) && LLVM_PROFILE_VERSION >= 9
+        .num_bitmap_bytes = END_BITMAP - START_BITMAP,
+#endif
         .names_size = END_NAMES - START_NAMES,
 #if LLVM_PROFILE_VERSION >= 8
         .counters_delta = START_COUNTERS - START_DATA,
 #else
         .counters_delta = (uintptr_t)START_COUNTERS,
+#endif
+#if defined(CONFIG_CONDITION_COVERAGE) && LLVM_PROFILE_VERSION >= 9
+        .bitmap_delta = START_BITMAP - START_DATA,
 #endif
         .names_delta = (uintptr_t)START_NAMES,
         .value_kind_last = LLVM_PROFILE_NUM_KINDS - 1,
@@ -168,6 +187,9 @@ static int cf_check dump(
     APPEND_TO_BUFFER(&header, sizeof(header));
     APPEND_TO_BUFFER(START_DATA, END_DATA - START_DATA);
     APPEND_TO_BUFFER(START_COUNTERS, END_COUNTERS - START_COUNTERS);
+#if defined(CONFIG_CONDITION_COVERAGE)
+    APPEND_TO_BUFFER(START_BITMAP, END_BITMAP - START_BITMAP);
+#endif
     APPEND_TO_BUFFER(START_NAMES, END_NAMES - START_NAMES);
 #undef APPEND_TO_BUFFER
 
-- 
2.49.0



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Message-ID: <826037a5-dacf-434f-90d9-8f12e61bdd6e@suse.com>
Date: Mon, 24 Nov 2025 12:05:20 +0100
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Subject: Re: [PATCH v3 1/4] build: add make macro for making file from file.in
To: Jan Beulich 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <20251121132332.23514-1-jgross@suse.com>
 <20251121132332.23514-2-jgross@suse.com>
 
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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: Jan Beulich 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
Message-ID: <826037a5-dacf-434f-90d9-8f12e61bdd6e@suse.com>
Subject: Re: [PATCH v3 1/4] build: add make macro for making file from file.in
References: <20251121132332.23514-1-jgross@suse.com>
 <20251121132332.23514-2-jgross@suse.com>
 
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Subject: Re: [PATCH] hw/i386/isapc: Remove dead Xen code
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To: Mark Cave-Ayland , qemu-devel@nongnu.org
Cc: Paolo Bonzini , David Woodhouse
 , Paul Durrant ,
 Eduardo Habkost , xen-devel@lists.xenproject.org,
 Anthony PERARD ,
 Stefano Stabellini ,
 Richard Henderson ,
 "Michael S. Tsirkin" ,
 Marcel Apfelbaum 
References: <20251123185832.53802-1-philmd@linaro.org>
 <066cb998-e89a-4cd1-a89b-865f4a6dcbbd@nutanix.com>
From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= 
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On 24/11/25 11:27, Mark Cave-Ayland wrote:
> On 23/11/2025 18:58, Philippe Mathieu-Daudé wrote:
> 
>> We don't use Xen on the isapc machine: let's remove
>> pointless code.
>>
>> Signed-off-by: Philippe Mathieu-Daudé 
>> ---
>>   hw/i386/isapc.c | 27 ++++-----------------------
>>   1 file changed, 4 insertions(+), 23 deletions(-)
>>
>> diff --git a/hw/i386/isapc.c b/hw/i386/isapc.c
>> index 1ba9ae22cc3..1e13a30c505 100644
>> --- a/hw/i386/isapc.c
>> +++ b/hw/i386/isapc.c
>> @@ -17,8 +17,6 @@
>>   #include "hw/ide/ide-bus.h"
>>   #include "system/kvm.h"
>>   #include "hw/i386/kvm/clock.h"
>> -#include "hw/xen/xen-x86.h"
>> -#include "system/xen.h"
>>   #include "hw/rtc/mc146818rtc.h"
>>   #include "target/i386/cpu.h"
>> @@ -37,7 +35,6 @@ static void pc_init_isa(MachineState *machine)
>>       ISABus *isa_bus;
>>       uint32_t irq;
>>       GSIState *gsi_state;
>> -    MemoryRegion *ram_memory;
>>       DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
>>       int i;
>> @@ -77,15 +74,9 @@ static void pc_init_isa(MachineState *machine)
>>       /*
>>        * There is no RAM split for the isapc machine
>>        */
>> -    if (xen_enabled()) {
>> -        xen_hvm_init_pc(pcms, &ram_memory);
>> -    } else {
>> -        ram_memory = machine->ram;
>> -
>> -        pcms->max_ram_below_4g = 3.5 * GiB;
>> -        x86ms->above_4g_mem_size = 0;
>> -        x86ms->below_4g_mem_size = machine->ram_size;
>> -    }
>> +    pcms->max_ram_below_4g = 3.5 * GiB;
>> +    x86ms->above_4g_mem_size = 0;
>> +    x86ms->below_4g_mem_size = machine->ram_size;
>>       x86_cpus_init(x86ms, pcmc->default_cpu_version);
>> @@ -94,17 +85,7 @@ static void pc_init_isa(MachineState *machine)
>>       }
>>       /* allocate ram and load rom/bios */
>> -    if (!xen_enabled()) {
>> -        pc_memory_init(pcms, system_memory, system_memory, 0);
>> -    } else {
>> -        assert(machine->ram_size == x86ms->below_4g_mem_size +
>> -                                    x86ms->above_4g_mem_size);
>> -
>> -        if (machine->kernel_filename != NULL) {
>> -            /* For xen HVM direct kernel boot, load linux here */
>> -            xen_load_linux(pcms);
>> -        }
>> -    }
>> +    pc_memory_init(pcms, system_memory, system_memory, 0);
>>       gsi_state = pc_gsi_create(&x86ms->gsi, false);
> 
> FWIW I did contact upstream about this (see https://patchew.org/ 
> QEMU/20250618112828.235087-1- 
> mark.caveayland@nutanix.com/20250618112828.235087-13- 
> mark.caveayland@nutanix.com/#91b96b24-af60-4a89-91ec- 
> d0e660a76a0a@nutanix.com) and they mentioned that it should work, which 
> is why I left it in.
> 
> Unfortunately I don't currently have any way to test it here :/

OK :| IMHO upstream Xen maintainers should provide us a test, otherwise
we can not make our code base evolve.


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On 24.11.2025 12:04, Saman Dehghan wrote:
> Clang >= 18 supports Modified Condition/Decision Coverage (MC/DC).
> This patch enables the detection and usage of this feature when
> compiling Xen with Clang.
> 
> - Update detection logic in Kconfig to check for the required set of
>   Clang flags for MC/DC:
>   '-fprofile-instr-generate -fcoverage-mapping -fcoverage-mcdc'.
>   This bundle is necessary because '-fcoverage-mcdc' requires
>   '-fcoverage-mapping', which in turn requires '-fprofile-instr-generate'.
> - Update llvm.c to handle the profile format changes (bitmap section)
>   required for MC/DC.
> - Guard -Wno-error=coverage-too-many-conditions with CONFIG_CC_IS_GCC
>   to avoid passing a GCC-only warning option to Clang
> 
> Signed-off-by: Saman Dehghan 

Acked-by: Jan Beulich 
ideally with ...

> --- a/xen/Rules.mk
> +++ b/xen/Rules.mk
> @@ -136,6 +136,7 @@ non-init-objects = $(filter-out %.init.o, $(obj-y) $(obj-bin-y) $(extra-y))
>  
>  ifeq ($(CONFIG_CC_IS_CLANG),y)
>      cov-cflags-$(CONFIG_COVERAGE) := -fprofile-instr-generate -fcoverage-mapping
> +    cov-cflags-$(CONFIG_CONDITION_COVERAGE) +=  -fcoverage-mcdc

... the excess (double) blank here dropped (can likely be done while committing,
if no other need for a v3 arises).

Jan


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Date: Mon, 24 Nov 2025 11:15:31 +0000
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Subject: Re: [PATCH] XEN: enable MC/DC coverage for Clang
To: Saman Dehghan , xen-devel@lists.xenproject.org
Cc: Anthony PERARD ,
 Michal Orzel , Jan Beulich ,
 Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Stefano Stabellini 
References: <3bb418ae6a36a9ac89c697a417fa0745fa9ac702.1763949990.git.samaan.dehghan@gmail.com>
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On 24/11/2025 2:18 am, Saman Dehghan wrote:
> Clang >= 18 supports Modified Condition/Decision Coverage (MC/DC).
> This patch enables the detection and usage of this feature when
> compiling Xen with Clang.
>
> - Update detection logic to check for '-fcoverage-mcdc' when using Clang.
> - Update llvm.c to handle the profile format changes (bitmap section)
>   required for MC/DC.
> - Guard -Wno-error=coverage-too-many-conditions with CONFIG_CC_IS_GCC
>   to avoid passing a GCC-only warning option to Clang
>
> Signed-off-by: Saman Dehghan 
> ---
>  xen/Kconfig                |  2 +-
>  xen/Rules.mk               |  1 +
>  xen/arch/x86/Makefile      |  4 +++-
>  xen/common/coverage/llvm.c | 24 +++++++++++++++++++++++-
>  4 files changed, 28 insertions(+), 3 deletions(-)
>
> diff --git a/xen/Kconfig b/xen/Kconfig
> index a5e5af3b76..5508993f02 100644
> --- a/xen/Kconfig
> +++ b/xen/Kconfig
> @@ -53,7 +53,7 @@ config CC_HAS_ASM_GOTO_OUTPUT
>  
>  # Compiler supports -fcondition-coverage aka MC/DC

While you're improving these comments, please drop -fcondition-coverage
(as it's no longer accurate), and expand MC/DC for the benefit of people
who don't know what it is.

>  config CC_HAS_MCDC

Also, # GCC >= 14, or Clang >= 18

It's important for toolchain versions to be given in comments, so we can
figure out what to clean up when upgrading the toolchain baselines.

> diff --git a/xen/common/coverage/llvm.c b/xen/common/coverage/llvm.c
> index 532889c857..a8c7e7e8d2 100644
> --- a/xen/common/coverage/llvm.c
> +++ b/xen/common/coverage/llvm.c
> @@ -120,6 +120,10 @@ extern const char __start___llvm_prf_names[];
>  extern const char __stop___llvm_prf_names[];
>  extern uint64_t __start___llvm_prf_cnts[];
>  extern uint64_t __stop___llvm_prf_cnts[];
> +#ifdef CONFIG_CONDITION_COVERAGE
> +extern const char __start___llvm_prf_bits[];
> +extern const char __stop___llvm_prf_bits[];
> +#endif

No need for these to be #ifdef'd.  In turn, it lets you do ...

>  
>  #define START_DATA      ((const void *)__start___llvm_prf_data)
>  #define END_DATA        ((const void *)__stop___llvm_prf_data)
> @@ -127,16 +131,25 @@ extern uint64_t __stop___llvm_prf_cnts[];
>  #define END_NAMES       ((const void *)__stop___llvm_prf_names)
>  #define START_COUNTERS  ((void *)__start___llvm_prf_cnts)
>  #define END_COUNTERS    ((void *)__stop___llvm_prf_cnts)
> +#define START_BITMAP    ((void *)__start___llvm_prf_bits)
> +#define END_BITMAP      ((void *)__stop___llvm_prf_bits)
>  
>  static void cf_check reset_counters(void)
>  {
>      memset(START_COUNTERS, 0, END_COUNTERS - START_COUNTERS);
> +#ifdef CONFIG_CONDITION_COVERAGE
> +    memset(START_BITMAP, 0, END_BITMAP - START_BITMAP);
> +#endif

... this:

    if ( IS_ENABLED(CONFIG_CONDITION_COVERAGE) )
        memset(START_BITMAP, 0, END_BITMAP - START_BITMAP);

>  }
>  
>  static uint32_t cf_check get_size(void)
>  {
> -    return ROUNDUP(sizeof(struct llvm_profile_header) + END_DATA - START_DATA +
> +    uint32_t size = ROUNDUP(sizeof(struct llvm_profile_header) + END_DATA - START_DATA +
>                     END_COUNTERS - START_COUNTERS + END_NAMES - START_NAMES, 8);
> +#ifdef CONFIG_CONDITION_COVERAGE
> +    size += ROUNDUP(END_BITMAP - START_BITMAP, 8);
> +#endif

and similar here.

> +    return size;
>  }
>  
>  static int cf_check dump(
> @@ -147,11 +160,17 @@ static int cf_check dump(
>          .version = LLVM_PROFILE_VERSION,
>          .num_data = DIV_ROUND_UP(END_DATA - START_DATA, sizeof(struct llvm_profile_data)),
>          .num_counters = DIV_ROUND_UP(END_COUNTERS - START_COUNTERS, sizeof(uint64_t)),
> +#if defined(CONFIG_CONDITION_COVERAGE) && LLVM_PROFILE_VERSION >= 9
> +        .num_bitmap_bytes = END_BITMAP - START_BITMAP,
> +#endif
>          .names_size = END_NAMES - START_NAMES,
>  #if LLVM_PROFILE_VERSION >= 8
>          .counters_delta = START_COUNTERS - START_DATA,
>  #else
>          .counters_delta = (uintptr_t)START_COUNTERS,
> +#endif
> +#if defined(CONFIG_CONDITION_COVERAGE) && LLVM_PROFILE_VERSION >= 9
> +        .bitmap_delta = START_BITMAP - START_DATA,
>  #endif
>          .names_delta = (uintptr_t)START_NAMES,
>          .value_kind_last = LLVM_PROFILE_NUM_KINDS - 1,

With structure initialisation, you do not need to have the fields in
declaration order.  Therefore, you want to do something like this:

         .value_kind_last = LLVM_PROFILE_NUM_KINDS - 1,
+#if defined(CONFIG_CONDITION_COVERAGE) && LLVM_PROFILE_VERSION >= 9
+        .num_bitmap_bytes = END_BITMAP - START_BITMAP,
+        .bitmap_delta = START_BITMAP - START_DATA,
+#endif
 };


to keep the ifdefary more simple.

~Andrew


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On 24.11.2025 12:05, Jürgen Groß wrote:
> On 24.11.25 11:41, Jan Beulich wrote:
>> On 21.11.2025 14:23, Juergen Gross wrote:
>>> --- a/Config.mk
>>> +++ b/Config.mk
>>> @@ -159,6 +159,19 @@ define move-if-changed
>>>   	if ! cmp -s $(1) $(2); then mv -f $(1) $(2); else rm -f $(1); fi
>>>   endef
>>>   
>>> +PATH_FILES := Paths
>>> +INC_FILES = $(foreach f, $(PATH_FILES), $(XEN_ROOT)/config/$(f).mk)
>>> +
>>> +include $(INC_FILES)
>>> +
>>> +BUILD_MAKE_VARS = $(foreach f, $(PATH_FILES), $(shell awk '$$2 == ":=" { print $$1; }' $(XEN_ROOT)/config/$(f).mk.in))
>>
>> Feels like my prior comments weren't really addressed. I continue to think that
>> none of the above is part of what the subject says.
> 
> I really don't understand your concern here.
> 
> For replacing the @markers@ make needs to know what should be replaced.
> So it needs to scan the files containing the markers and gather them.
> This is what is done above.
> 
> In the final macro below the replacements are done then. How would you
> handle that?

By passing (another) argument to the macro, for example. As indicated
earlier, different sub-trees may have different places where these
definitions live, and they would want to be able to pass that in
(ideally without needing to put this in a common part of the tree).

Jan


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From: Kevin Lampis 
To: xen-devel@lists.xenproject.org
Cc: jbeulich@suse.com,
	andrew.cooper3@citrix.com,
	roger.pau@citrix.com,
	Kevin Lampis 
Subject: [PATCH] x86: Remove x86 prefixed names from cpuinfo for intel.c
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struct cpuinfo_x86
  .x86        => .family
  .x86_vendor => .vendor
  .x86_model  => .model
  .x86_mask   => .stepping

No functional change.

Signed-off-by: Kevin Lampis 
---
 xen/arch/x86/cpu/intel.c                | 34 ++++++++++++++-----------
 xen/arch/x86/include/asm/intel-family.h |  4 +++
 2 files changed, 23 insertions(+), 15 deletions(-)

diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c
index 6f71365b7e..5f780fe1aa 100644
--- a/xen/arch/x86/cpu/intel.c
+++ b/xen/arch/x86/cpu/intel.c
@@ -86,7 +86,7 @@ static void __init check_memory_type_self_snoop_errata(void)
 	if (!boot_cpu_has(X86_FEATURE_SS))
 		return;
 
-	switch (boot_cpu_data.x86_model) {
+	switch (boot_cpu_data.model) {
 	case 0x0f: /* Merom */
 	case 0x16: /* Merom L */
 	case 0x17: /* Penryn */
@@ -137,10 +137,10 @@ static void __init probe_masking_msrs(void)
 	unsigned int exp_msr_basic, exp_msr_ext, exp_msr_xsave;
 
 	/* Only family 6 supports this feature. */
-	if (c->x86 != 6)
+	if (c->family != 6)
 		return;
 
-	switch (c->x86_model) {
+	switch (c->model) {
 	case 0x17: /* Yorkfield, Wolfdale, Penryn, Harpertown(DP) */
 	case 0x1d: /* Dunnington(MP) */
 		msr_basic = MSR_INTEL_MASK_V1_CPUID1;
@@ -191,7 +191,7 @@ static void __init probe_masking_msrs(void)
 	       expected_levelling_cap, levelling_caps,
 	       (expected_levelling_cap ^ levelling_caps) & levelling_caps);
 	printk(XENLOG_WARNING "Fam %#x, model %#x expected (%#x/%#x/%#x), "
-	       "got (%#x/%#x/%#x)\n", c->x86, c->x86_model,
+	       "got (%#x/%#x/%#x)\n", c->family, c->model,
 	       exp_msr_basic, exp_msr_ext, exp_msr_xsave,
 	       msr_basic, msr_ext, msr_xsave);
 	printk(XENLOG_WARNING
@@ -265,7 +265,7 @@ static void __init noinline intel_init_levelling(void)
 	 * so skip it altogether. In the case where Xen is virtualized these
 	 * MSRs may be emulated though, so we allow it in that case.
 	 */
-	if ((boot_cpu_data.x86 != 0xf || cpu_has_hypervisor) &&
+	if ((boot_cpu_data.family != 0xf || cpu_has_hypervisor) &&
 	    probe_cpuid_faulting()) {
 		expected_levelling_cap |= LCAP_faulting;
 		levelling_caps |= LCAP_faulting;
@@ -348,7 +348,7 @@ void intel_unlock_cpuid_leaves(struct cpuinfo_x86 *c)
 static void cf_check early_init_intel(struct cpuinfo_x86 *c)
 {
 	/* Netburst reports 64 bytes clflush size, but does IO in 128 bytes */
-	if (c->x86 == 15 && c->x86_cache_alignment == 64)
+	if (c->family == 15 && c->x86_cache_alignment == 64)
 		c->x86_cache_alignment = 128;
 
 	if (c == &boot_cpu_data &&
@@ -358,8 +358,8 @@ static void cf_check early_init_intel(struct cpuinfo_x86 *c)
 	intel_unlock_cpuid_leaves(c);
 
 	/* CPUID workaround for Intel 0F33/0F34 CPU */
-	if (boot_cpu_data.x86 == 0xF && boot_cpu_data.x86_model == 3 &&
-	    (boot_cpu_data.x86_mask == 3 || boot_cpu_data.x86_mask == 4))
+	if (boot_cpu_data.vfm == INTEL_P4_PRESCOTT &&
+	    (boot_cpu_data.stepping == 3 || boot_cpu_data.stepping == 4))
 		paddr_bits = 36;
 
 	if (c == &boot_cpu_data) {
@@ -458,7 +458,7 @@ static void Intel_errata_workarounds(struct cpuinfo_x86 *c)
 {
 	uint64_t val;
 
-	if ((c->x86 == 15) && (c->x86_model == 1) && (c->x86_mask == 1)) {
+	if ( c->vfm == INTEL_P4_WILLAMETTE && c->stepping == 1 ) {
 		val = rdmsr(MSR_IA32_MISC_ENABLE);
 		if ((val & (1 << 9)) == 0) {
 			printk (KERN_INFO "CPU: C0 stepping P4 Xeon detected.\n");
@@ -468,8 +468,10 @@ static void Intel_errata_workarounds(struct cpuinfo_x86 *c)
 		}
 	}
 
-	if (c->x86 == 6 && cpu_has_clflush &&
-	    (c->x86_model == 29 || c->x86_model == 46 || c->x86_model == 47))
+	if ( cpu_has_clflush &&
+	    ( c->vfm == INTEL_CORE2_DUNNINGTON ||
+	      c->vfm == INTEL_NEHALEM_EX ||
+	      c->vfm == INTEL_WESTMERE_EX ))
 		setup_force_cpu_cap(X86_BUG_CLFLUSH_MONITOR);
 
 	probe_c3_errata(c);
@@ -540,7 +542,7 @@ static void intel_log_freq(const struct cpuinfo_x86 *c)
         }
     }
 
-    switch ( c->x86 )
+    switch ( c->family )
     {
         static const unsigned short core_factors[] =
             { 26667, 13333, 20000, 16667, 33333, 10000, 40000 };
@@ -553,7 +555,7 @@ static void intel_log_freq(const struct cpuinfo_x86 *c)
         if ( !max_ratio )
             return;
 
-        switch ( c->x86_model )
+        switch ( c->model )
         {
         case 0x0e: /* Core */
         case 0x0f: case 0x16: case 0x17: case 0x1d: /* Core2 */
@@ -657,9 +659,11 @@ static void cf_check init_intel(struct cpuinfo_x86 *c)
 	/* Work around errata */
 	Intel_errata_workarounds(c);
 
-	if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
-		(c->x86 == 0x6 && c->x86_model >= 0x0e))
+	if ((c->family == 0xf && c->model >= 0x03) ||
+		(c->family == 0x6 && c->model >= 0x0e))
+	{
 		__set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
+	}
 	if (cpu_has(c, X86_FEATURE_ITSC)) {
 		__set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
 		__set_bit(X86_FEATURE_NONSTOP_TSC, c->x86_capability);
diff --git a/xen/arch/x86/include/asm/intel-family.h b/xen/arch/x86/include/asm/intel-family.h
index d8c0bcc406..c71e744731 100644
--- a/xen/arch/x86/include/asm/intel-family.h
+++ b/xen/arch/x86/include/asm/intel-family.h
@@ -179,6 +179,10 @@
 #define INTEL_XEON_PHI_KNL		IFM(6, 0x57) /* Knights Landing */
 #define INTEL_XEON_PHI_KNM		IFM(6, 0x85) /* Knights Mill */
 
+/* Family 15 - NetBurst */
+#define INTEL_P4_WILLAMETTE		IFM(15, 0x01) /* Also Xeon Foster */
+#define INTEL_P4_PRESCOTT		IFM(15, 0x03)
+
 /* Family 5 */
 #define INTEL_FAM5_QUARK_X1000		0x09 /* Quark X1000 SoC */
 #define INTEL_QUARK_X1000		IFM(5, 0x09) /* Quark X1000 SoC */
-- 
2.51.1



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Subject: Re: [PATCH 09/12] x86/irq: convert cpumask parameter to integer in
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To: Roger Pau Monne 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <20251120090637.25087-1-roger.pau@citrix.com>
 <20251120095826.25782-1-roger.pau@citrix.com>
 <20251120095826.25782-4-roger.pau@citrix.com>
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On 20.11.2025 10:58, Roger Pau Monne wrote:
> Existing callers where already generating the passed cpumask using
> cpumask_of() to contain a single target CPU.  Reduce complexity by passing
> the single target CPU as an integer parameter.
> 
> No functional change intended.
> 
> Signed-off-by: Roger Pau Monné 
> ---
> The function names are misleading, as {,p}irq_set_affinity() doesn't adjust
> the affinity of the interrupt (desc->affinity) but the interrupt target
> itself.  Further cleanup might be helpful to correctly differentiate
> between setting interrupt affinity vs setting interrupt target.

Indeed, I wanted to mention this as well. As you touch all callers anyway,
how about doing a rename (whether to "target" or "binding" or yet something
else) right here?

Jan


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Date: Mon, 24 Nov 2025 12:27:08 +0100
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Subject: Re: [PATCH v3 1/4] build: add make macro for making file from file.in
To: Jan Beulich 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
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To: Jan Beulich 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
Message-ID: 
Subject: Re: [PATCH v3 1/4] build: add make macro for making file from file.in
References: <20251121132332.23514-1-jgross@suse.com>
 <20251121132332.23514-2-jgross@suse.com>
 
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On 20.11.2025 10:58, Roger Pau Monne wrote:
> --- a/xen/arch/x86/hpet.c
> +++ b/xen/arch/x86/hpet.c
> @@ -310,9 +310,9 @@ static void cf_check hpet_msi_set_affinity(
>      struct msi_msg msg = ch->msi.msg;
>  
>      /* This really is only for dump_irqs(). */
> -    cpumask_copy(desc->arch.cpu_mask, mask);
> +    desc->arch.cpu = cpumask_any(mask);

Going from the comment, couldn't you use CPU_INVALID here? Then again, see
"x86/HPET: drop .set_affinity hook", where the function goes away anyway.

> @@ -337,7 +337,8 @@ static int __hpet_setup_msi_irq(struct irq_desc *desc)
>  {
>      struct msi_msg msg;
>  
> -    msi_compose_msg(desc->arch.vector, desc->arch.cpu_mask, &msg);
> +    msg.dest32 = cpu_physical_id(desc->arch.cpu);
> +    msi_compose_msg(desc->arch.vector, &msg);
>      return hpet_msi_write(desc->action->dev_id, &msg);
>  }

Setting msg.dest32 ahead of calling msi_compose_msg() feels odd. It makes things
look as if this was an input to the function, when by its name it rather would
want to be an output. Furthermore this is dead code right now, as the function
clears the entire structure first thing. Imo it being the function to fill the
field should be retained; instead of the CPU mask you'd once again make it a
scalar parameter. For the case where NULL was passed before, ...

> --- a/xen/arch/x86/include/asm/irq.h
> +++ b/xen/arch/x86/include/asm/irq.h
> @@ -69,13 +69,9 @@ struct irq_desc;
>  struct arch_irq_desc {
>          int16_t vector;                  /* vector itself is only 8 bits, */
>          int16_t old_vector;              /* but we use -1 for unassigned  */
> -        /*
> -         * Except for high priority interrupts @cpu_mask may have bits set for
> -         * offline CPUs.  Consumers need to be careful to mask this down to
> -         * online ones as necessary.  There is supposed to always be a non-
> -         * empty intersection with cpu_online_map.
> -         */
> -        cpumask_var_t cpu_mask;
> +/* Special target CPU values. */
> +#define CPU_INVALID  ~0U

... you already make a suitable constant available. (Nit: The expansion wants
parenthesizing.)

> --- a/xen/arch/x86/io_apic.c
> +++ b/xen/arch/x86/io_apic.c
> @@ -1112,8 +1112,7 @@ static void __init setup_IO_APIC_irqs(void)
>              if (platform_legacy_irq(irq))
>                  disable_8259A_irq(irq_to_desc(irq));
>  
> -            set_entry_dest(&entry,
> -                           cpu_mask_to_apicid(irq_to_desc(irq)->arch.cpu_mask));
> +            set_entry_dest(&entry, cpu_physical_id(irq_to_desc(irq)->arch.cpu));

I may as well mention this here: Looks like this patch removes all call sites
of cpu_mask_to_apicid(). That would leave the function unreachable, i.e. violating
a Misra rule, so I think the function needs dropping right here.

> @@ -2137,14 +2136,11 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int a
>          return vector;
>      entry.vector = vector;
>  
> -    if (cpumask_intersects(desc->arch.cpu_mask, TARGET_CPUS)) {
> -        cpumask_t *mask = this_cpu(scratch_cpumask);
> -
> -        cpumask_and(mask, desc->arch.cpu_mask, TARGET_CPUS);
> -        set_entry_dest(&entry, cpu_mask_to_apicid(mask));
> +    if (cpu_online(desc->arch.cpu)) {

Can CPU_INVALID make it here? If so, it needs guarding against. If not, an
assertion may be nice. (Same possibly elsewhere.)

> --- a/xen/arch/x86/irq.c
> +++ b/xen/arch/x86/irq.c
> @@ -156,8 +156,7 @@ static int __init _bind_irq_vector(struct irq_desc *desc, int vector,
>  
>      if ( !cpu_online(cpu) )
>          return -EINVAL;
> -    if ( (desc->arch.vector == vector) &&
> -         cpumask_test_cpu(cpu, desc->arch.cpu_mask) )
> +    if ( (desc->arch.vector == vector) && cpu == desc->arch.cpu )

Please can you be consistent with parentheses on both sides of the &&?
(I'd prefer the excess ones to be dropped, but the alternative is also
okay.)

> @@ -684,8 +673,9 @@ next:
>          }
>          else if ( valid_irq_vector(old_vector) )
>          {
> -            cpumask_and(desc->arch.old_cpu_mask, desc->arch.cpu_mask,
> -                        &cpu_online_map);
> +            cpumask_clear(desc->arch.old_cpu_mask);
> +            if ( cpu_online(desc->arch.cpu) )
> +                cpumask_set_cpu(desc->arch.cpu, desc->arch.old_cpu_mask);

As mentioned for an earlier patch, to avoid the LOCK-ed update
cpumask_copy() may be better to use. Yet iirc like there, likely this
goes away again later in the series (by the title right in the next patch),
so perhaps not a big deal.

> --- a/xen/common/cpu.c
> +++ b/xen/common/cpu.c
> @@ -16,6 +16,7 @@ unsigned int __read_mostly nr_cpumask_bits
>  const cpumask_t cpumask_all = {
>      .bits[0 ... (BITS_TO_LONGS(NR_CPUS) - 1)] = ~0UL
>  };
> +const cpumask_t cpumask_none;

This feels wasteful at least for larger NR_CPUS. And it's likely going to
violate some Misra rule on non-x86, for having no user. On x86, as long as
NR_CPUS <= 8 * PAGE_SIZE, you could (re-)use zero_page[] instead.

> --- a/xen/drivers/passthrough/amd/iommu_init.c
> +++ b/xen/drivers/passthrough/amd/iommu_init.c
> @@ -507,7 +507,7 @@ static void cf_check set_x2apic_affinity(
>      if ( dest == BAD_APICID )
>          return;
>  
> -    msi_compose_msg(desc->arch.vector, NULL, &iommu->msi.msg);
> +    msi_compose_msg(desc->arch.vector, &iommu->msi.msg);
>      iommu->msi.msg.dest32 = dest;

With the outlined adjustment above, it looks like the explicit setting
of .dest32 would then not be needed here (and perhaps elsewhere) anymore.

Jan


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Date: Mon, 24 Nov 2025 13:18:28 +0100
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Subject: Re: [PATCH v3 1/4] build: add make macro for making file from file.in
To: Juergen Gross 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
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On 24.11.2025 12:27, Juergen Gross wrote:
> On 24.11.25 12:15, Jan Beulich wrote:
>> On 24.11.2025 12:05, Jürgen Groß wrote:
>>> On 24.11.25 11:41, Jan Beulich wrote:
>>>> On 21.11.2025 14:23, Juergen Gross wrote:
>>>>> --- a/Config.mk
>>>>> +++ b/Config.mk
>>>>> @@ -159,6 +159,19 @@ define move-if-changed
>>>>>    	if ! cmp -s $(1) $(2); then mv -f $(1) $(2); else rm -f $(1); fi
>>>>>    endef
>>>>>    
>>>>> +PATH_FILES := Paths
>>>>> +INC_FILES = $(foreach f, $(PATH_FILES), $(XEN_ROOT)/config/$(f).mk)
>>>>> +
>>>>> +include $(INC_FILES)
>>>>> +
>>>>> +BUILD_MAKE_VARS = $(foreach f, $(PATH_FILES), $(shell awk '$$2 == ":=" { print $$1; }' $(XEN_ROOT)/config/$(f).mk.in))
>>>>
>>>> Feels like my prior comments weren't really addressed. I continue to think that
>>>> none of the above is part of what the subject says.
>>>
>>> I really don't understand your concern here.
>>>
>>> For replacing the @markers@ make needs to know what should be replaced.
>>> So it needs to scan the files containing the markers and gather them.
>>> This is what is done above.
>>>
>>> In the final macro below the replacements are done then. How would you
>>> handle that?
>>
>> By passing (another) argument to the macro, for example. As indicated
>> earlier, different sub-trees may have different places where these
>> definitions live, and they would want to be able to pass that in
>> (ideally without needing to put this in a common part of the tree).
> 
> I don't get what you want to pass in additionally.
> 
> I've already changed the macro and the Makefiles to be able to add another
> marker file to the PATH_FILES variable. What else do you need?

Well, that's simply an odd way of passing a parameter. Plus, the extra file
won't affect INC_FILES, or more precisely its use in the include directive
in patch 1: At least aiui, $(INC_FILES) is expanded at the point when the
directive is processed. Hence why you need to open-code another include
there.

Jan

> See patch 4 in tools/Rules.mk adding the additional reference to
> Tools-paths.mk by doing:
> 
> PATH_FILES += Tools-paths.mk
> 
> 
> Juergen



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From: Jan Beulich 
Subject: [PATCH v2 0/6] x86: CPUID leaf 6 consolidation
To: "xen-devel@lists.xenproject.org" 
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Integrate this leaf with CPU policy handling, to leverage the host policy
when feature bits need evaluating.

1: cpu-policy: define bits of leaf 6
2: replace APERRMPERF synthetic feature bit
3: rename ARAT feature flag
4: Intel: use host CPU policy for ARAT checking
5: cpufreq: use host CPU policy for Turbo checking
6: cpufreq: use host CPU policy in HWP driver

Jan


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Subject: [PATCH v2 1/6] x86/cpu-policy: define bits of leaf 6
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... as far as we presently use them in the codebase.

Signed-off-by: Jan Beulich 
---
Or should we make both parts proper featureset elements? At least
APERFMPERF could likely be made visible to guests (in principle).
---
v2: Use bool and unions.

--- a/xen/include/xen/lib/x86/cpu-policy.h
+++ b/xen/include/xen/lib/x86/cpu-policy.h
@@ -121,7 +121,46 @@ struct cpu_policy
             uint64_t :64, :64; /* Leaf 0x3 - PSN. */
             uint64_t :64, :64; /* Leaf 0x4 - Structured Cache. */
             uint64_t :64, :64; /* Leaf 0x5 - MONITOR. */
-            uint64_t :64, :64; /* Leaf 0x6 - Therm/Perf. */
+
+            /* Leaf 0x6 - Therm/Perf. */
+            union {
+                uint32_t _6a;
+                struct {
+                    bool :1,
+                        turbo:1,
+                        arat:1,
+                        :1,
+                        :1,
+                        :1,
+                        :1,
+                        hwp:1,
+                        hwp_notification:1,
+                        hwp_activity_window:1,
+                        hwp_epp:1,
+                        hwp_plr:1,
+                        :1,
+                        hdc:1,
+                        :1,
+                        :1,
+                        hwp_peci:1,
+                        :1,
+                        :1,
+                        hw_feedback:1;
+                };
+            };
+            union {
+                uint32_t _6b;
+            };
+            union {
+                uint32_t _6c;
+                struct {
+                    bool aperfmperf:1;
+                };
+            };
+            union {
+                uint32_t _6d;
+            };
+
             uint64_t :64, :64; /* Leaf 0x7 - Structured Features. */
             uint64_t :64, :64; /* Leaf 0x8 - rsvd */
             uint64_t :64, :64; /* Leaf 0x9 - DCA */



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Subject: [PATCH v2 2/6] x86: replace APERFMPERF synthetic feature bit
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
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Use the respective host CPU policy bit instead. This has the (tolerable,
as we generally assume symmetry anyway) effect of using the BSP's
(unleveled) setting, rather than the result of leveling (as is done by
identify_cpu() on boot_cpu_data, rendering the variable name somewhat
misleading).

Signed-off-by: Jan Beulich 
---
The leveling of boot_cpu_data is problematic anyway, as that way features
can in principle disappear post-boot (as CPUs are being brought online;
just that we don't think anymore that we really support physical CPU
hotplug).
---
v2: Extend description.

--- a/xen/arch/x86/cpu/common.c
+++ b/xen/arch/x86/cpu/common.c
@@ -523,10 +523,6 @@ static void generic_identify(struct cpui
 	if ( cpu_has(c, X86_FEATURE_CLFLUSH) )
 		c->x86_clflush_size = ((ebx >> 8) & 0xff) * 8;
 
-	if ( (c->cpuid_level >= CPUID_PM_LEAF) &&
-	     (cpuid_ecx(CPUID_PM_LEAF) & CPUID6_ECX_APERFMPERF_CAPABILITY) )
-		__set_bit(X86_FEATURE_APERFMPERF, c->x86_capability);
-
 	/* AMD-defined flags: level 0x80000001 */
 	if (c->extended_cpuid_level >= 0x80000001)
 		cpuid(0x80000001, &tmp, &tmp,
--- a/xen/arch/x86/include/asm/cpufeature.h
+++ b/xen/arch/x86/include/asm/cpufeature.h
@@ -11,7 +11,9 @@
 #include 
 
 #ifndef __ASSEMBLY__
+#include 
 #include 
+#include 
 #else
 #include 
 #endif
@@ -121,7 +123,6 @@ static inline bool boot_cpu_has(unsigned
 #define CPUID6_EAX_HDC                               BIT(13, U)
 #define CPUID6_EAX_HWP_PECI                          BIT(16, U)
 #define CPUID6_EAX_HW_FEEDBACK                       BIT(19, U)
-#define CPUID6_ECX_APERFMPERF_CAPABILITY             BIT(0, U)
 
 /* CPUID level 0x00000001.edx */
 #define cpu_has_fpu             1
@@ -175,6 +176,9 @@ static inline bool boot_cpu_has(unsigned
 #define cpu_has_fma4            boot_cpu_has(X86_FEATURE_FMA4)
 #define cpu_has_tbm             boot_cpu_has(X86_FEATURE_TBM)
 
+/* CPUID level 0x00000006.ecx */
+#define cpu_has_aperfmperf      host_cpu_policy.basic.aperfmperf
+
 /* CPUID level 0x0000000D:1.eax */
 #define cpu_has_xsaveopt        boot_cpu_has(X86_FEATURE_XSAVEOPT)
 #define cpu_has_xsavec          boot_cpu_has(X86_FEATURE_XSAVEC)
@@ -292,7 +296,6 @@ static inline bool boot_cpu_has(unsigned
 /* Synthesized. */
 #define cpu_has_arch_perfmon    boot_cpu_has(X86_FEATURE_ARCH_PERFMON)
 #define cpu_has_cpuid_faulting  boot_cpu_has(X86_FEATURE_CPUID_FAULTING)
-#define cpu_has_aperfmperf      boot_cpu_has(X86_FEATURE_APERFMPERF)
 #define cpu_has_xen_lbr         boot_cpu_has(X86_FEATURE_XEN_LBR)
 #define cpu_has_xen_shstk       (IS_ENABLED(CONFIG_XEN_SHSTK) && \
                                  boot_cpu_has(X86_FEATURE_XEN_SHSTK))
--- a/xen/arch/x86/include/asm/cpufeatures.h
+++ b/xen/arch/x86/include/asm/cpufeatures.h
@@ -19,7 +19,7 @@ XEN_CPUFEATURE(TSC_RELIABLE,      X86_SY
 XEN_CPUFEATURE(XTOPOLOGY,         X86_SYNTH( 5)) /* cpu topology enum extensions */
 XEN_CPUFEATURE(CPUID_FAULTING,    X86_SYNTH( 6)) /* cpuid faulting */
 XEN_CPUFEATURE(XEN_FRED,          X86_SYNTH( 7)) /* Xen uses FRED */
-XEN_CPUFEATURE(APERFMPERF,        X86_SYNTH( 8)) /* APERFMPERF */
+/* Bit 8 unused */
 XEN_CPUFEATURE(MFENCE_RDTSC,      X86_SYNTH( 9)) /* MFENCE synchronizes RDTSC */
 XEN_CPUFEATURE(XEN_SMEP,          X86_SYNTH(10)) /* SMEP gets used by Xen itself */
 XEN_CPUFEATURE(XEN_SMAP,          X86_SYNTH(11)) /* SMAP gets used by Xen itself */



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Date: Mon, 24 Nov 2025 13:24:14 +0100
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Subject: [PATCH v2 3/6] x86: rename ARAT feature flag
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
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Add a XEN infix, to properly distinguish it from the CPUID feature flag
(leaf 6 EAX bit 2).

Signed-off-by: Jan Beulich 
---
Question is whether we still need opt_arat (and the command line option),
or whether we could go directly from the CPUID bit (overriding it to 1
for older AMD [and Hygon?] CPUs). Or whether to have opt_arat affect the
(host) CPU policy directly.

--- a/xen/arch/x86/acpi/cpu_idle.c
+++ b/xen/arch/x86/acpi/cpu_idle.c
@@ -109,7 +109,7 @@ void (*__read_mostly lapic_timer_on)(voi
 
 bool lapic_timer_init(void)
 {
-    if ( boot_cpu_has(X86_FEATURE_ARAT) )
+    if ( boot_cpu_has(X86_FEATURE_XEN_ARAT) )
     {
         lapic_timer_off = lapic_timer_nop;
         lapic_timer_on = lapic_timer_nop;
@@ -1463,7 +1463,7 @@ static void amd_cpuidle_init(struct acpi
 
         if ( !vendor_override )
         {
-            if ( !boot_cpu_has(X86_FEATURE_ARAT) )
+            if ( !boot_cpu_has(X86_FEATURE_XEN_ARAT) )
                 hpet_broadcast_init();
 
             if ( !lapic_timer_init() )
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -1355,7 +1355,7 @@ static void cf_check init_amd(struct cpu
 	 * running in deep C states.
 	 */
 	if ( opt_arat && c->x86 > 0x11 )
-		__set_bit(X86_FEATURE_ARAT, c->x86_capability);
+		__set_bit(X86_FEATURE_XEN_ARAT, c->x86_capability);
 
 	/*
 	 * Prior to Family 0x14, perf counters are not reset during warm reboot.
--- a/xen/arch/x86/cpu/hygon.c
+++ b/xen/arch/x86/cpu/hygon.c
@@ -76,7 +76,7 @@ static void cf_check init_hygon(struct c
 
 	/* Hygon processors have APIC timer running in deep C states. */
 	if (opt_arat)
-		__set_bit(X86_FEATURE_ARAT, c->x86_capability);
+		__set_bit(X86_FEATURE_XEN_ARAT, c->x86_capability);
 
 	if (cpu_has(c, X86_FEATURE_EFRO)) {
 		rdmsrl(MSR_K8_HWCR, value);
--- a/xen/arch/x86/cpu/intel.c
+++ b/xen/arch/x86/cpu/intel.c
@@ -668,7 +668,7 @@ static void cf_check init_intel(struct c
 	if ( opt_arat &&
 	     ( c->cpuid_level >= 0x00000006 ) &&
 	     ( cpuid_eax(0x00000006) & (1u<<2) ) )
-		__set_bit(X86_FEATURE_ARAT, c->x86_capability);
+		__set_bit(X86_FEATURE_XEN_ARAT, c->x86_capability);
 
 	if ((opt_cpu_info && !(c->apicid & (c->x86_num_siblings - 1))) ||
 	    c == &boot_cpu_data )
--- a/xen/arch/x86/cpu/mwait-idle.c
+++ b/xen/arch/x86/cpu/mwait-idle.c
@@ -1633,7 +1633,7 @@ static int __init mwait_idle_probe(void)
 	icpu = id->driver_data;
 	cpuidle_state_table = icpu->state_table;
 
-	if (boot_cpu_has(X86_FEATURE_ARAT))
+	if (boot_cpu_has(X86_FEATURE_XEN_ARAT))
 		lapic_timer_reliable_states = LAPIC_TIMER_ALWAYS_RELIABLE;
 
 	pr_debug(PREFIX "v" MWAIT_IDLE_VERSION " model %#x\n",
@@ -1792,7 +1792,7 @@ int __init mwait_idle_init(struct notifi
 		return -ENODEV;
 
 	err = mwait_idle_probe();
-	if (!err && !boot_cpu_has(X86_FEATURE_ARAT)) {
+	if (!err && !boot_cpu_has(X86_FEATURE_XEN_ARAT)) {
 		hpet_broadcast_init();
 		if (xen_cpuidle < 0 && !hpet_broadcast_is_available())
 			err = -ENODEV;
--- a/xen/arch/x86/include/asm/cpufeatures.h
+++ b/xen/arch/x86/include/asm/cpufeatures.h
@@ -13,7 +13,7 @@
 /* Synthetic features */
 XEN_CPUFEATURE(CONSTANT_TSC,      X86_SYNTH( 0)) /* TSC ticks at a constant rate */
 XEN_CPUFEATURE(NONSTOP_TSC,       X86_SYNTH( 1)) /* TSC does not stop in C states */
-XEN_CPUFEATURE(ARAT,              X86_SYNTH( 2)) /* Always running APIC timer */
+XEN_CPUFEATURE(XEN_ARAT,          X86_SYNTH( 2)) /* Xen may utilize always running APIC timer */
 XEN_CPUFEATURE(ARCH_PERFMON,      X86_SYNTH( 3)) /* Intel Architectural PerfMon */
 XEN_CPUFEATURE(TSC_RELIABLE,      X86_SYNTH( 4)) /* TSC is known to be reliable */
 XEN_CPUFEATURE(XTOPOLOGY,         X86_SYNTH( 5)) /* cpu topology enum extensions */
--- a/xen/arch/x86/time.c
+++ b/xen/arch/x86/time.c
@@ -2642,7 +2642,7 @@ static int _disable_pit_irq(bool init)
      * XXX dom0 may rely on RTC interrupt delivery, so only enable
      * hpet_broadcast if FSB mode available or if force_hpet_broadcast.
      */
-    if ( cpuidle_using_deep_cstate() && !boot_cpu_has(X86_FEATURE_ARAT) )
+    if ( cpuidle_using_deep_cstate() && !boot_cpu_has(X86_FEATURE_XEN_ARAT) )
     {
         init ? hpet_broadcast_init() : hpet_broadcast_resume();
         if ( !hpet_broadcast_is_available() )



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Subject: [PATCH v2 4/6] x86/Intel: use host CPU policy for ARAT checking
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
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There's no need to invoke CPUID yet another time. However, as the host CPU
policy is set up only shortly after init_intel() ran on the BSP, defer the
logic to a pre-SMP initcall. This can't be (a new) one in cpu/intel.c
though, as that's linked after acpi/cpu_idle.c (which is where we already
need the feature set). Since opt_arat is local to the cpu/ subtree,
introduce a new Intel-specific helper to hold the code needed.

Further, as we assume symmetry anyway, use setup_force_cpu_cap() and hence
limit the checking to the boot CPU.

Signed-off-by: Jan Beulich 
---
The need to move where cpu_has_arat is checked would go away if we did
away with opt_arat (as mentioned in the previous patch), and hence could
use cpu_has_arat directly where right now XEN_ARAT is checked.

--- a/xen/arch/x86/acpi/cpu_idle.c
+++ b/xen/arch/x86/acpi/cpu_idle.c
@@ -1666,6 +1666,9 @@ static int __init cf_check cpuidle_presm
 {
     void *cpu = (void *)(long)smp_processor_id();
 
+    if ( boot_cpu_data.vendor == X86_VENDOR_INTEL )
+        intel_init_arat();
+
     if ( !xen_cpuidle )
         return 0;
 
--- a/xen/arch/x86/cpu/intel.c
+++ b/xen/arch/x86/cpu/intel.c
@@ -665,10 +665,6 @@ static void cf_check init_intel(struct c
 		__set_bit(X86_FEATURE_NONSTOP_TSC, c->x86_capability);
 		__set_bit(X86_FEATURE_TSC_RELIABLE, c->x86_capability);
 	}
-	if ( opt_arat &&
-	     ( c->cpuid_level >= 0x00000006 ) &&
-	     ( cpuid_eax(0x00000006) & (1u<<2) ) )
-		__set_bit(X86_FEATURE_XEN_ARAT, c->x86_capability);
 
 	if ((opt_cpu_info && !(c->apicid & (c->x86_num_siblings - 1))) ||
 	    c == &boot_cpu_data )
@@ -690,3 +686,9 @@ const struct cpu_dev __initconst_cf_clob
 	.c_early_init	= early_init_intel,
 	.c_init		= init_intel,
 };
+
+void __init intel_init_arat(void)
+{
+    if ( opt_arat && cpu_has_arat )
+        setup_force_cpu_cap(X86_FEATURE_XEN_ARAT);
+}
--- a/xen/arch/x86/include/asm/cpufeature.h
+++ b/xen/arch/x86/include/asm/cpufeature.h
@@ -176,6 +176,9 @@ static inline bool boot_cpu_has(unsigned
 #define cpu_has_fma4            boot_cpu_has(X86_FEATURE_FMA4)
 #define cpu_has_tbm             boot_cpu_has(X86_FEATURE_TBM)
 
+/* CPUID level 0x00000006.eax */
+#define cpu_has_arat            host_cpu_policy.basic.arat
+
 /* CPUID level 0x00000006.ecx */
 #define cpu_has_aperfmperf      host_cpu_policy.basic.aperfmperf
 
--- a/xen/arch/x86/include/asm/processor.h
+++ b/xen/arch/x86/include/asm/processor.h
@@ -102,6 +102,7 @@ extern void setup_force_cpu_cap(unsigned
 extern bool is_forced_cpu_cap(unsigned int cap);
 extern void print_cpu_info(unsigned int cpu);
 extern void init_intel_cacheinfo(struct cpuinfo_x86 *c);
+extern void intel_init_arat(void);
 
 #define cpu_to_core(_cpu)   (cpu_data[_cpu].cpu_core_id)
 #define cpu_to_socket(_cpu) (cpu_data[_cpu].phys_proc_id)



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From: Jan Beulich 
Subject: [PATCH v2 4/4] x86: direct APIC vector adjustments
To: "xen-devel@lists.xenproject.org" 
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The setting up of such vectors really is a boot-time-only thing. vPMU also
doesn't need any vector when it's no in use anyway (which is the default).
The first patch also is a pretty much unrelated change to tidy things up
first.

1: vPMU: move APIC ack past the handling of the interrupt
2: MCE: restrict allocation of thermal and CMCI vector to BSP
3: IRQ: direct-APIC-vector setting is now init-only
4: vPMU: don't statically reserve the interrupt vector

Jan


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From: Jan Beulich 
Subject: [PATCH v2 0/4] x86: direct APIC vector adjustments
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The setting up of such vectors really is a boot-time-only thing. vPMU also
doesn't need any vector when it's no in use anyway (which is the default).
The first patch also is a pretty much unrelated change to tidy things up
first.

1: vPMU: move APIC ack past the handling of the interrupt
2: MCE: restrict allocation of thermal and CMCI vector to BSP
3: IRQ: direct-APIC-vector setting is now init-only
4: vPMU: don't statically reserve the interrupt vector

Jan


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While benign as long as it's using a direct-APIC-vector (handlers for
which are called with IRQs off), follow the more usual pattern of ack-ing
the IRQ only after handling it.

Requested-by: Andrew Cooper 
Signed-off-by: Jan Beulich 
---
v2: New.

--- a/xen/arch/x86/apic.c
+++ b/xen/arch/x86/apic.c
@@ -1319,8 +1319,8 @@ static void cf_check error_interrupt(voi
 
 static void cf_check pmu_interrupt(void)
 {
-    ack_APIC_irq();
     vpmu_do_interrupt();
+    ack_APIC_irq();
 }
 
 void __init apic_intr_init(void)



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There's no need to do this for every AP; just do it once when setting up
the BSP. Then both vector variables can also validly become ro-after-init.

While touching intel_init_thermal(), constify its 1st parameter, which
in turn requires touching intel_thermal_supported() as well.

Signed-off-by: Jan Beulich 
---
This contextually (but not functionally) collides with "x86/MCE: adjust S3
resume handling".

--- a/xen/arch/x86/cpu/mcheck/mce.c
+++ b/xen/arch/x86/cpu/mcheck/mce.c
@@ -37,7 +37,7 @@ bool is_mc_panic;
 DEFINE_PER_CPU_READ_MOSTLY(unsigned int, nr_mce_banks);
 unsigned int __read_mostly firstbank;
 unsigned int __read_mostly ppin_msr;
-uint8_t __read_mostly cmci_apic_vector;
+uint8_t __ro_after_init cmci_apic_vector;
 bool __read_mostly cmci_support;
 
 /* If mce_force_broadcast == 1, lmce_support will be disabled forcibly. */
--- a/xen/arch/x86/cpu/mcheck/mce_intel.c
+++ b/xen/arch/x86/cpu/mcheck/mce_intel.c
@@ -87,7 +87,7 @@ static void cf_check intel_thermal_inter
 }
 
 /* Thermal monitoring depends on APIC, ACPI and clock modulation */
-static bool intel_thermal_supported(struct cpuinfo_x86 *c)
+static bool intel_thermal_supported(const struct cpuinfo_x86 *c)
 {
     if ( !cpu_has_apic )
         return false;
@@ -110,13 +110,13 @@ static void __init mcheck_intel_therm_in
 }
 
 /* P4/Xeon Thermal regulation detect and init */
-static void intel_init_thermal(struct cpuinfo_x86 *c)
+static void intel_init_thermal(const struct cpuinfo_x86 *c, bool bsp)
 {
     uint64_t msr_content;
     uint32_t val;
     int tm2 = 0;
     unsigned int cpu = smp_processor_id();
-    static uint8_t thermal_apic_vector;
+    static uint8_t __ro_after_init thermal_apic_vector;
 
     if ( !intel_thermal_supported(c) )
         return; /* -ENODEV */
@@ -160,7 +160,8 @@ static void intel_init_thermal(struct cp
         return; /* -EBUSY */
     }
 
-    alloc_direct_apic_vector(&thermal_apic_vector, intel_thermal_interrupt);
+    if ( bsp )
+        alloc_direct_apic_vector(&thermal_apic_vector, intel_thermal_interrupt);
 
     /* The temperature transition interrupt handler setup */
     val = thermal_apic_vector;    /* our delivery vector */
@@ -667,7 +668,7 @@ static void cf_check cmci_interrupt(void
         mctelem_dismiss(mctc);
 }
 
-static void intel_init_cmci(struct cpuinfo_x86 *c)
+static void intel_init_cmci(struct cpuinfo_x86 *c, bool bsp)
 {
     u32 l, apic;
     int cpu = smp_processor_id();
@@ -687,7 +688,8 @@ static void intel_init_cmci(struct cpuin
         return;
     }
 
-    alloc_direct_apic_vector(&cmci_apic_vector, cmci_interrupt);
+    if ( bsp )
+        alloc_direct_apic_vector(&cmci_apic_vector, cmci_interrupt);
 
     apic = cmci_apic_vector;
     apic |= (APIC_DM_FIXED | APIC_LVT_MASKED);
@@ -993,9 +995,9 @@ enum mcheck_type intel_mcheck_init(struc
 
     intel_init_mce(bsp);
 
-    intel_init_cmci(c);
+    intel_init_cmci(c, bsp);
 
-    intel_init_thermal(c);
+    intel_init_thermal(c, bsp);
 
     intel_init_ppin(c);
 



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Date: Mon, 24 Nov 2025 13:30:19 +0100
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Subject: [PATCH v2 3/4] x86/IRQ: direct-APIC-vector setting is now init-only
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
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With all callers of alloc_direct_apic_vector() now being limited to BSP
setup, it and its helpers (whose other callers have already been init-
only) can become __init. As a result data items can be adjusted, too.

With alloc_direct_apic_vector() now being __init, it's meaningless to use
a lock, and the indirection is also pretty pointless. Drop both while at
it.

Signed-off-by: Jan Beulich 
Signed-off-by: Andrew Cooper 
Acked-by: Jan Beulich 
---
v2: Re-work alloc_direct_apic_vector().

--- a/xen/arch/x86/cpu/mcheck/mce_intel.c
+++ b/xen/arch/x86/cpu/mcheck/mce_intel.c
@@ -161,7 +161,7 @@ static void intel_init_thermal(const str
     }
 
     if ( bsp )
-        alloc_direct_apic_vector(&thermal_apic_vector, intel_thermal_interrupt);
+        thermal_apic_vector = alloc_direct_apic_vector(intel_thermal_interrupt);
 
     /* The temperature transition interrupt handler setup */
     val = thermal_apic_vector;    /* our delivery vector */
@@ -689,7 +689,7 @@ static void intel_init_cmci(struct cpuin
     }
 
     if ( bsp )
-        alloc_direct_apic_vector(&cmci_apic_vector, cmci_interrupt);
+        cmci_apic_vector = alloc_direct_apic_vector(cmci_interrupt);
 
     apic = cmci_apic_vector;
     apic |= (APIC_DM_FIXED | APIC_LVT_MASKED);
--- a/xen/arch/x86/guest/xen/xen.c
+++ b/xen/arch/x86/guest/xen/xen.c
@@ -293,7 +293,7 @@ static void __init cf_check setup(void)
                XEN_LEGACY_MAX_VCPUS);
     }
 
-    alloc_direct_apic_vector(&evtchn_upcall_vector, xen_evtchn_upcall);
+    evtchn_upcall_vector = alloc_direct_apic_vector(xen_evtchn_upcall);
 
     BUG_ON(init_evtchn());
 }
--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -3181,10 +3181,10 @@ const struct hvm_function_table * __init
 
     if ( cpu_has_vmx_posted_intr_processing )
     {
-        alloc_direct_apic_vector(&posted_intr_vector, pi_notification_interrupt);
+        posted_intr_vector = alloc_direct_apic_vector(pi_notification_interrupt);
         if ( iommu_intpost )
         {
-            alloc_direct_apic_vector(&pi_wakeup_vector, pi_wakeup_interrupt);
+            pi_wakeup_vector = alloc_direct_apic_vector(pi_wakeup_interrupt);
 
             vmx_function_table.pi_update_irte = vmx_pi_update_irte;
         }
--- a/xen/arch/x86/include/asm/irq.h
+++ b/xen/arch/x86/include/asm/irq.h
@@ -119,7 +119,7 @@ uint8_t alloc_hipriority_vector(void);
 void free_lopriority_vector(uint8_t vector);
 
 void set_direct_apic_vector(uint8_t vector, void (*handler)(void));
-void alloc_direct_apic_vector(uint8_t *vector, void (*handler)(void));
+uint8_t alloc_direct_apic_vector(void (*handler)(void));
 
 void do_IRQ(struct cpu_user_regs *regs);
 
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -970,31 +970,28 @@ void pirq_set_affinity(struct domain *d,
 DEFINE_PER_CPU(unsigned int, irq_count);
 static DEFINE_PER_CPU(bool, check_eoi_deferral);
 
-uint8_t alloc_hipriority_vector(void)
+uint8_t __init alloc_hipriority_vector(void)
 {
-    static uint8_t next = FIRST_HIPRIORITY_VECTOR;
+    static uint8_t __initdata next = FIRST_HIPRIORITY_VECTOR;
     BUG_ON(next < FIRST_HIPRIORITY_VECTOR);
     BUG_ON(next > LAST_HIPRIORITY_VECTOR);
     return next++;
 }
 
-static void (*direct_apic_vector[X86_IDT_VECTORS])(void);
-void set_direct_apic_vector(uint8_t vector, void (*handler)(void))
+static void (*__ro_after_init direct_apic_vector[X86_IDT_VECTORS])(void);
+void __init set_direct_apic_vector(uint8_t vector, void (*handler)(void))
 {
     BUG_ON(direct_apic_vector[vector] != NULL);
     direct_apic_vector[vector] = handler;
 }
 
-void alloc_direct_apic_vector(uint8_t *vector, void (*handler)(void))
+uint8_t __init alloc_direct_apic_vector(void (*handler)(void))
 {
-    static DEFINE_SPINLOCK(lock);
+    uint8_t vec = alloc_hipriority_vector();
 
-    spin_lock(&lock);
-    if (*vector == 0) {
-        *vector = alloc_hipriority_vector();
-        set_direct_apic_vector(*vector, handler);
-    }
-    spin_unlock(&lock);
+    set_direct_apic_vector(vec, handler);
+
+    return vec;
 }
 
 /* This could free any vectors, but is needed only for low-prio ones. */



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Date: Mon, 24 Nov 2025 13:30:39 +0100
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Subject: [PATCH v2 4/4] x86/vPMU: don't statically reserve the interrupt
 vector
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
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Move the setup to vPMU code, doing the allocation of a vector only when
one is actually going to be needed. With that the handler functions also
don't need to be scattered across two places anymore.

Add the freed up vector to the dynamically allocatable range.

Signed-off-by: Jan Beulich 
Acked-by: Andrew Cooper 
---
In case down the road we also want to have a build mode with vPMU code
excluded, this may also simplify things a little there.
---
v2: Re-base over patch moving the APIC ack and over change to
    alloc_direct_apic_vector().

--- a/xen/arch/x86/apic.c
+++ b/xen/arch/x86/apic.c
@@ -1313,16 +1313,6 @@ static void cf_check error_interrupt(voi
            entries[3], entries[2], entries[1], entries[0]);
 }
 
-/*
- * This interrupt handles performance counters interrupt
- */
-
-static void cf_check pmu_interrupt(void)
-{
-    vpmu_do_interrupt();
-    ack_APIC_irq();
-}
-
 void __init apic_intr_init(void)
 {
     smp_intr_init();
@@ -1333,9 +1323,6 @@ void __init apic_intr_init(void)
     /* IPI vectors for APIC spurious and error interrupts */
     set_direct_apic_vector(SPURIOUS_APIC_VECTOR, spurious_interrupt);
     set_direct_apic_vector(ERROR_APIC_VECTOR, error_interrupt);
-
-    /* Performance Counters Interrupt */
-    set_direct_apic_vector(PMU_APIC_VECTOR, pmu_interrupt);
 }
 
 /*
--- a/xen/arch/x86/cpu/vpmu.c
+++ b/xen/arch/x86/cpu/vpmu.c
@@ -40,6 +40,8 @@ static struct arch_vpmu_ops __initdata v
 static DEFINE_SPINLOCK(vpmu_lock);
 static unsigned vpmu_count;
 
+static uint8_t __ro_after_init pmu_apic_vector;
+
 static DEFINE_PER_CPU(struct vcpu *, last_vcpu);
 
 static int __init cf_check parse_vpmu_params(const char *s)
@@ -94,7 +96,7 @@ void vpmu_lvtpc_update(uint32_t val)
 
     vpmu = vcpu_vpmu(curr);
 
-    vpmu->hw_lapic_lvtpc = PMU_APIC_VECTOR | (val & APIC_LVT_MASKED);
+    vpmu->hw_lapic_lvtpc = pmu_apic_vector | (val & APIC_LVT_MASKED);
 
     /* Postpone APIC updates for PV(H) guests if PMU interrupt is pending */
     if ( has_vlapic(curr->domain) || !vpmu->xenpmu_data ||
@@ -160,7 +162,7 @@ static inline struct vcpu *choose_hwdom_
     return hardware_domain->vcpu[idx];
 }
 
-void vpmu_do_interrupt(void)
+static void vpmu_do_interrupt(void)
 {
     struct vcpu *sampled = current, *sampling;
     struct vpmu_struct *vpmu;
@@ -322,6 +324,12 @@ void vpmu_do_interrupt(void)
 #endif
 }
 
+static void cf_check vpmu_interrupt(void)
+{
+    vpmu_do_interrupt();
+    ack_APIC_irq();
+}
+
 #ifdef CONFIG_MEM_SHARING
 int vpmu_allocate_context(struct vcpu *v)
 {
@@ -369,7 +377,7 @@ void vpmu_save(struct vcpu *v)
 
     vpmu_reset(vpmu, VPMU_CONTEXT_SAVE);
 
-    apic_write(APIC_LVTPC, PMU_APIC_VECTOR | APIC_LVT_MASKED);
+    apic_write(APIC_LVTPC, pmu_apic_vector | APIC_LVT_MASKED);
 }
 
 int vpmu_load(struct vcpu *v, bool from_guest)
@@ -432,7 +440,7 @@ static int vpmu_arch_initialise(struct v
         return ret;
     }
 
-    vpmu->hw_lapic_lvtpc = PMU_APIC_VECTOR | APIC_LVT_MASKED;
+    vpmu->hw_lapic_lvtpc = pmu_apic_vector | APIC_LVT_MASKED;
     vpmu_set(vpmu, VPMU_INITIALIZED);
 
     return 0;
@@ -860,6 +868,8 @@ static int __init cf_check vpmu_init(voi
         register_cpu_notifier(&cpu_nfb);
         printk(XENLOG_INFO "VPMU: version " __stringify(XENPMU_VER_MAJ) "."
                __stringify(XENPMU_VER_MIN) "\n");
+
+        pmu_apic_vector = alloc_direct_apic_vector(vpmu_interrupt);
     }
     else
     {
--- a/xen/arch/x86/include/asm/irq-vectors.h
+++ b/xen/arch/x86/include/asm/irq-vectors.h
@@ -8,13 +8,12 @@
 #define EVENT_CHECK_VECTOR	0xfc
 #define CALL_FUNCTION_VECTOR	0xfb
 #define LOCAL_TIMER_VECTOR	0xfa
-#define PMU_APIC_VECTOR 	0xf9
 /*
  * High-priority dynamically-allocated vectors. For interrupts that
  * must be higher priority than any guest-bound interrupt.
  */
 #define FIRST_HIPRIORITY_VECTOR	0xf1
-#define LAST_HIPRIORITY_VECTOR  0xf8
+#define LAST_HIPRIORITY_VECTOR  0xf9
 /* IRQ0 (timer) is statically allocated but must be high priority. */
 #define IRQ0_VECTOR             0xf0
 
--- a/xen/arch/x86/include/asm/vpmu.h
+++ b/xen/arch/x86/include/asm/vpmu.h
@@ -99,7 +99,6 @@ static inline bool vpmu_are_all_set(cons
 
 void vpmu_lvtpc_update(uint32_t val);
 int vpmu_do_msr(unsigned int msr, uint64_t *msr_content, bool is_write);
-void vpmu_do_interrupt(void);
 void vpmu_initialise(struct vcpu *v);
 void vpmu_destroy(struct vcpu *v);
 void vpmu_save(struct vcpu *v);



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From: Saman Dehghan 
Date: Mon, 24 Nov 2025 06:31:11 -0600
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Subject: Re: [PATCH] XEN: enable MC/DC coverage for Clang
To: Andrew Cooper 
Cc: xen-devel@lists.xenproject.org, Anthony PERARD , 
	Michal Orzel , Jan Beulich , Julien Grall , 
	=?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
	Stefano Stabellini 
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On Mon, Nov 24, 2025 at 5:15=E2=80=AFAM Andrew Cooper  wrote:
>
> On 24/11/2025 2:18 am, Saman Dehghan wrote:
> > Clang >=3D 18 supports Modified Condition/Decision Coverage (MC/DC).
> > This patch enables the detection and usage of this feature when
> > compiling Xen with Clang.
> >
> > - Update detection logic to check for '-fcoverage-mcdc' when using Clan=
g.
> > - Update llvm.c to handle the profile format changes (bitmap section)
> >   required for MC/DC.
> > - Guard -Wno-error=3Dcoverage-too-many-conditions with CONFIG_CC_IS_GCC
> >   to avoid passing a GCC-only warning option to Clang
> >
> > Signed-off-by: Saman Dehghan 
> > ---
> >  xen/Kconfig                |  2 +-
> >  xen/Rules.mk               |  1 +
> >  xen/arch/x86/Makefile      |  4 +++-
> >  xen/common/coverage/llvm.c | 24 +++++++++++++++++++++++-
> >  4 files changed, 28 insertions(+), 3 deletions(-)
> >
> > diff --git a/xen/Kconfig b/xen/Kconfig
> > index a5e5af3b76..5508993f02 100644
> > --- a/xen/Kconfig
> > +++ b/xen/Kconfig
> > @@ -53,7 +53,7 @@ config CC_HAS_ASM_GOTO_OUTPUT
> >
> >  # Compiler supports -fcondition-coverage aka MC/DC
>
> While you're improving these comments, please drop -fcondition-coverage
> (as it's no longer accurate), and expand MC/DC for the benefit of people
> who don't know what it is.
>
> >  config CC_HAS_MCDC
>
> Also, # GCC >=3D 14, or Clang >=3D 18
>
> It's important for toolchain versions to be given in comments, so we can
> figure out what to clean up when upgrading the toolchain baselines.
>
> > diff --git a/xen/common/coverage/llvm.c b/xen/common/coverage/llvm.c
> > index 532889c857..a8c7e7e8d2 100644
> > --- a/xen/common/coverage/llvm.c
> > +++ b/xen/common/coverage/llvm.c
> > @@ -120,6 +120,10 @@ extern const char __start___llvm_prf_names[];
> >  extern const char __stop___llvm_prf_names[];
> >  extern uint64_t __start___llvm_prf_cnts[];
> >  extern uint64_t __stop___llvm_prf_cnts[];
> > +#ifdef CONFIG_CONDITION_COVERAGE
> > +extern const char __start___llvm_prf_bits[];
> > +extern const char __stop___llvm_prf_bits[];
> > +#endif
>
> No need for these to be #ifdef'd.  In turn, it lets you do ...
>
> >
> >  #define START_DATA      ((const void *)__start___llvm_prf_data)
> >  #define END_DATA        ((const void *)__stop___llvm_prf_data)
> > @@ -127,16 +131,25 @@ extern uint64_t __stop___llvm_prf_cnts[];
> >  #define END_NAMES       ((const void *)__stop___llvm_prf_names)
> >  #define START_COUNTERS  ((void *)__start___llvm_prf_cnts)
> >  #define END_COUNTERS    ((void *)__stop___llvm_prf_cnts)
> > +#define START_BITMAP    ((void *)__start___llvm_prf_bits)
> > +#define END_BITMAP      ((void *)__stop___llvm_prf_bits)
> >
> >  static void cf_check reset_counters(void)
> >  {
> >      memset(START_COUNTERS, 0, END_COUNTERS - START_COUNTERS);
> > +#ifdef CONFIG_CONDITION_COVERAGE
> > +    memset(START_BITMAP, 0, END_BITMAP - START_BITMAP);
> > +#endif
>
> ... this:
>
>     if ( IS_ENABLED(CONFIG_CONDITION_COVERAGE) )
>         memset(START_BITMAP, 0, END_BITMAP - START_BITMAP);
>
> >  }

Thanks Andrew.

IS_ENABLED(CONFIG_CONDITION_COVERAGE) is not the same as #ifdef
CONFIG_CONDITION_COVERAGE.
When the option is completely undefined, IS_ENABLED() returns 1 (enabled).
So even with no CONFIG_CONDITION_COVERAGE defined, the code takes the
"enabled" path, which is not what we want here.

> >
> >  static uint32_t cf_check get_size(void)
> >  {
> > -    return ROUNDUP(sizeof(struct llvm_profile_header) + END_DATA - STA=
RT_DATA +
> > +    uint32_t size =3D ROUNDUP(sizeof(struct llvm_profile_header) + END=
_DATA - START_DATA +
> >                     END_COUNTERS - START_COUNTERS + END_NAMES - START_N=
AMES, 8);
> > +#ifdef CONFIG_CONDITION_COVERAGE
> > +    size +=3D ROUNDUP(END_BITMAP - START_BITMAP, 8);
> > +#endif
>
> and similar here.
>
> > +    return size;
> >  }
> >
> >  static int cf_check dump(
> > @@ -147,11 +160,17 @@ static int cf_check dump(
> >          .version =3D LLVM_PROFILE_VERSION,
> >          .num_data =3D DIV_ROUND_UP(END_DATA - START_DATA, sizeof(struc=
t llvm_profile_data)),
> >          .num_counters =3D DIV_ROUND_UP(END_COUNTERS - START_COUNTERS, =
sizeof(uint64_t)),
> > +#if defined(CONFIG_CONDITION_COVERAGE) && LLVM_PROFILE_VERSION >=3D 9
> > +        .num_bitmap_bytes =3D END_BITMAP - START_BITMAP,
> > +#endif
> >          .names_size =3D END_NAMES - START_NAMES,
> >  #if LLVM_PROFILE_VERSION >=3D 8
> >          .counters_delta =3D START_COUNTERS - START_DATA,
> >  #else
> >          .counters_delta =3D (uintptr_t)START_COUNTERS,
> > +#endif
> > +#if defined(CONFIG_CONDITION_COVERAGE) && LLVM_PROFILE_VERSION >=3D 9
> > +        .bitmap_delta =3D START_BITMAP - START_DATA,
> >  #endif
> >          .names_delta =3D (uintptr_t)START_NAMES,
> >          .value_kind_last =3D LLVM_PROFILE_NUM_KINDS - 1,
>
> With structure initialisation, you do not need to have the fields in
> declaration order.  Therefore, you want to do something like this:
>
>          .value_kind_last =3D LLVM_PROFILE_NUM_KINDS - 1,
> +#if defined(CONFIG_CONDITION_COVERAGE) && LLVM_PROFILE_VERSION >=3D 9
> +        .num_bitmap_bytes =3D END_BITMAP - START_BITMAP,
> +        .bitmap_delta =3D START_BITMAP - START_DATA,
> +#endif
>  };
>
>
> to keep the ifdefary more simple.
>
> ~Andrew


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Subject: [PATCH v2 5/6] x86/cpufreq: use host CPU policy for Turbo checking
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
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There's no need to invoke CPUID yet another time - we assume symmetry
anyway. With symmetry assumed, logging per-CPU also isn't very useful.

Signed-off-by: Jan Beulich 
Reviewed-by: Andrew Cooper 

--- a/xen/arch/x86/acpi/cpufreq/acpi.c
+++ b/xen/arch/x86/acpi/cpufreq/acpi.c
@@ -220,14 +220,11 @@ static unsigned int cf_check get_cur_fre
 
 void intel_feature_detect(struct cpufreq_policy *policy)
 {
-    unsigned int eax;
-
-    eax = cpuid_eax(6);
-    if (eax & 0x2) {
+    if ( cpu_has_turbo )
+    {
         policy->turbo = CPUFREQ_TURBO_ENABLED;
-        if (cpufreq_verbose)
-            printk(XENLOG_INFO "CPU%u: Turbo Mode detected and enabled\n",
-                   smp_processor_id());
+        if ( cpufreq_verbose )
+            printk_once(XENLOG_INFO "Turbo Mode detected and enabled\n");
     }
 }
 
--- a/xen/arch/x86/include/asm/cpufeature.h
+++ b/xen/arch/x86/include/asm/cpufeature.h
@@ -177,6 +177,7 @@ static inline bool boot_cpu_has(unsigned
 #define cpu_has_tbm             boot_cpu_has(X86_FEATURE_TBM)
 
 /* CPUID level 0x00000006.eax */
+#define cpu_has_turbo           host_cpu_policy.basic.turbo
 #define cpu_has_arat            host_cpu_policy.basic.arat
 
 /* CPUID level 0x00000006.ecx */



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Subject: [PATCH v2 6/6] x86/cpufreq: use host CPU policy in HWP driver
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Jason Andryuk 
References: 
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There's no need to invoke CPUID yet another time. This way two of the
static booleans can also go away.

Signed-off-by: Jan Beulich 
---
v2: Introduce cpu_has_*.

--- a/xen/arch/x86/acpi/cpufreq/hwp.c
+++ b/xen/arch/x86/acpi/cpufreq/hwp.c
@@ -18,9 +18,6 @@
 
 static bool __ro_after_init hwp_in_use;
 
-static bool __ro_after_init feature_hwp_notification;
-static bool __ro_after_init feature_hwp_activity_window;
-
 static bool __read_mostly feature_hdc;
 
 static bool __ro_after_init opt_cpufreq_hdc = true;
@@ -165,8 +162,6 @@ bool hwp_active(void)
 
 static bool __init hwp_available(void)
 {
-    unsigned int eax;
-
     if ( boot_cpu_data.cpuid_level < CPUID_PM_LEAF )
     {
         hwp_verbose("cpuid_level (%#x) lacks HWP support\n",
@@ -183,29 +178,22 @@ static bool __init hwp_available(void)
         return false;
     }
 
-    eax = cpuid_eax(CPUID_PM_LEAF);
-
     hwp_verbose("%d notify: %d act-window: %d energy-perf: %d pkg-level: %d peci: %d\n",
-                !!(eax & CPUID6_EAX_HWP),
-                !!(eax & CPUID6_EAX_HWP_NOTIFICATION),
-                !!(eax & CPUID6_EAX_HWP_ACTIVITY_WINDOW),
-                !!(eax & CPUID6_EAX_HWP_ENERGY_PERFORMANCE_PREFERENCE),
-                !!(eax & CPUID6_EAX_HWP_PACKAGE_LEVEL_REQUEST),
-                !!(eax & CPUID6_EAX_HWP_PECI));
+                cpu_has_hwp, cpu_has_hwp_notification,
+                cpu_has_hwp_activity_window, cpu_has_hwp_epp,
+                cpu_has_hwp_plr, cpu_has_hwp_peci);
 
-    if ( !(eax & CPUID6_EAX_HWP) )
+    if ( !cpu_has_hwp )
         return false;
 
-    if ( !(eax & CPUID6_EAX_HWP_ENERGY_PERFORMANCE_PREFERENCE) )
+    if ( !cpu_has_hwp_epp )
     {
         hwp_verbose("disabled: No energy/performance preference available");
 
         return false;
     }
 
-    feature_hwp_notification    = eax & CPUID6_EAX_HWP_NOTIFICATION;
-    feature_hwp_activity_window = eax & CPUID6_EAX_HWP_ACTIVITY_WINDOW;
-    feature_hdc                 = eax & CPUID6_EAX_HDC;
+    feature_hdc = cpu_has_hdc;
 
     hwp_verbose("Hardware Duty Cycling (HDC) %ssupported%s\n",
                 feature_hdc ? "" : "not ",
@@ -213,7 +201,7 @@ static bool __init hwp_available(void)
                             : "");
 
     hwp_verbose("HW_FEEDBACK %ssupported\n",
-                (eax & CPUID6_EAX_HW_FEEDBACK) ? "" : "not ");
+                cpu_has_hw_feedback ? "" : "not ");
 
     hwp_in_use = true;
 
@@ -226,7 +214,8 @@ static int cf_check hwp_cpufreq_verify(s
 {
     struct hwp_drv_data *data = per_cpu(hwp_drv_data, policy->cpu);
 
-    if ( !feature_hwp_activity_window && data->activity_window )
+    if ( !cpu_has_hwp_activity_window &&
+         data->activity_window )
     {
         hwp_verbose("HWP activity window not supported\n");
 
@@ -268,7 +257,7 @@ static int cf_check hwp_cpufreq_target(s
     hwp_req.max_perf = data->maximum;
     hwp_req.desired = data->desired;
     hwp_req.energy_perf = data->energy_perf;
-    if ( feature_hwp_activity_window )
+    if ( cpu_has_hwp_activity_window )
         hwp_req.activity_window = data->activity_window;
 
     if ( hwp_req.raw == data->curr_req.raw )
@@ -365,7 +354,7 @@ static void cf_check hwp_init_msrs(void
     }
 
     /* Ensure we don't generate interrupts */
-    if ( feature_hwp_notification )
+    if ( cpu_has_hwp_notification )
         wrmsr_safe(MSR_HWP_INTERRUPT, 0);
 
     if ( !(val & PM_ENABLE_HWP_ENABLE) )
@@ -537,7 +526,8 @@ int get_hwp_para(unsigned int cpu,
         return -ENODATA;
 
     cppc_para->features         =
-        (feature_hwp_activity_window ? XEN_SYSCTL_CPPC_FEAT_ACT_WINDOW : 0);
+        (cpu_has_hwp_activity_window
+         ? XEN_SYSCTL_CPPC_FEAT_ACT_WINDOW : 0);
     cppc_para->lowest           = data->hw.lowest;
     cppc_para->lowest_nonlinear = data->hw.most_efficient;
     cppc_para->nominal          = data->hw.guaranteed;
@@ -585,7 +575,7 @@ int set_hwp_para(struct cpufreq_policy *
 
     /* Clear out activity window if lacking HW supported. */
     if ( (set_cppc->set_params & XEN_SYSCTL_CPPC_SET_ACT_WINDOW) &&
-         !feature_hwp_activity_window )
+         !cpu_has_hwp_activity_window )
     {
         set_cppc->set_params &= ~XEN_SYSCTL_CPPC_SET_ACT_WINDOW;
         cleared_act_window = true;
--- a/xen/arch/x86/include/asm/cpufeature.h
+++ b/xen/arch/x86/include/asm/cpufeature.h
@@ -115,14 +115,6 @@ static inline bool boot_cpu_has(unsigned
 }
 
 #define CPUID_PM_LEAF                                6
-#define CPUID6_EAX_HWP                               BIT(7, U)
-#define CPUID6_EAX_HWP_NOTIFICATION                  BIT(8, U)
-#define CPUID6_EAX_HWP_ACTIVITY_WINDOW               BIT(9, U)
-#define CPUID6_EAX_HWP_ENERGY_PERFORMANCE_PREFERENCE BIT(10, U)
-#define CPUID6_EAX_HWP_PACKAGE_LEVEL_REQUEST         BIT(11, U)
-#define CPUID6_EAX_HDC                               BIT(13, U)
-#define CPUID6_EAX_HWP_PECI                          BIT(16, U)
-#define CPUID6_EAX_HW_FEEDBACK                       BIT(19, U)
 
 /* CPUID level 0x00000001.edx */
 #define cpu_has_fpu             1
@@ -179,6 +171,14 @@ static inline bool boot_cpu_has(unsigned
 /* CPUID level 0x00000006.eax */
 #define cpu_has_turbo           host_cpu_policy.basic.turbo
 #define cpu_has_arat            host_cpu_policy.basic.arat
+#define cpu_has_hwp             host_cpu_policy.basic.hwp
+#define cpu_has_hwp_notification host_cpu_policy.basic.hwp_notification
+#define cpu_has_hwp_activity_window host_cpu_policy.basic.hwp_activity_window
+#define cpu_has_hwp_epp        host_cpu_policy.basic.hwp_epp
+#define cpu_has_hwp_plr        host_cpu_policy.basic.hwp_plr
+#define cpu_has_hdc            host_cpu_policy.basic.hdc
+#define cpu_has_hwp_peci       host_cpu_policy.basic.hwp_peci
+#define cpu_has_hw_feedback    host_cpu_policy.basic.hw_feedback
 
 /* CPUID level 0x00000006.ecx */
 #define cpu_has_aperfmperf      host_cpu_policy.basic.aperfmperf



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Bertrand Marquis ,
	Volodymyr Babchuk 
Subject: [PATCH v6 00/19] xen/riscv: introduce p2m functionality
Date: Mon, 24 Nov 2025 13:33:33 +0100
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In this patch series are introduced necessary functions to build and manage
RISC-V guest page tables and MMIO/RAM mappings.

---
Changes in V5:
 - Addressed comments for v4.
 - The following patches were Acked-by:
   - [v5 16/18] xen/riscv: implement mfn_valid() and page
   - [v5 15/18] xen/riscv: implement put_page()
   - [v5 14/18] xen/riscv: Implement superpage splitting for p2m mappings
   - [v5 09/18] xen/riscv: implement function to map memory in guest p2m
   - [v5 07/18] xen/riscv: add new p2m types and helper macros for type classification
   - [v5 03/18] xen/riscv: introduce things necessary for p2m initialization
---
Changes in V4:
 - Merged to staging:
   - xen/riscv: introduce sbi_remote_hfence_gvma()
   - xen/riscv: introduce sbi_remote_hfence_gvma_vmid()
 - Drop "xen/riscv: introduce page_{get,set}_xenheap_gfn()" as grant tables aren't going to be introduced for the moment. Also, drops other parts connected to grant tables support.
 - All other changes are patch specific.
---
Changes in V3:
 - Introduce metadata table to store P2M types.
 - Use x86's way to allocate VMID.
 - Abstract Arm-specific p2m type name for device MMIO mappings.
 - All other updates please look at specific patch.
---
Changes in V2:
 - Merged to staging:
   - [PATCH v1 1/6] xen/riscv: add inclusion of xen/bitops.h to asm/cmpxchg.h
 - New patches:
   - xen/riscv: implement sbi_remote_hfence_gvma{_vmid}().
 - Split patch "xen/riscv: implement p2m mapping functionality" into smaller
   one patches:
   - xen/riscv: introduce page_set_xenheap_gfn()
   - xen/riscv: implement guest_physmap_add_entry() for mapping GFNs to MFNs
   - xen/riscv: implement p2m_set_entry() and __p2m_set_entry()
   - xen/riscv: Implement p2m_free_entry() and related helpers
   - xen/riscv: Implement superpage splitting for p2m mappings
   - xen/riscv: implement p2m_next_level()
   - xen/riscv: Implement p2m_entry_from_mfn() and support PBMT configuration
 - Move root p2m table allocation to separate patch:
   xen/riscv: add root page table allocation
 - Drop dependency of this patch series from the patch witn an introduction of
   SvPBMT as it was merged.
 - Patch "[PATCH v1 4/6] xen/riscv: define pt_t and pt_walk_t structures" was
   renamed to xen/riscv: introduce pte_{set,get}_mfn() as after dropping of
   bitfields for PTE structure, this patch introduce only pte_{set,get}_mfn().
 - Rename "xen/riscv: define pt_t and pt_walk_t structures" to
   "xen/riscv: introduce pte_{set,get}_mfn()" as pt_t and pt_walk_t were
   dropped.
 - Introduce guest domain's VMID allocation and manegement.
 - Add patches necessary to implement p2m lookup:
   - xen/riscv: implement mfn_valid() and page reference, ownership handling helpers
   - xen/riscv: add support of page lookup by GFN
 - Re-sort patch series.
 - All other changes are patch-specific. Please check them.
---

Oleksii Kurochko (19):
  xen/riscv: avoid redundant HGATP*_MODE_SHIFT and HGATP*_VMID_SHIFT
  xen/riscv: detect and initialize G-stage mode
  xen/riscv: introduce VMID allocation and manegement
  xen/riscv: introduce things necessary for p2m initialization
  xen/riscv: construct the P2M pages pool for guests
  xen/riscv: add root page table allocation
  xen/riscv: introduce pte_{set,get}_mfn()
  xen/riscv: add new p2m types and helper macros for type classification
  xen/dom0less: abstract Arm-specific p2m type name for device MMIO
    mappings
  xen/riscv: implement function to map memory in guest p2m
  xen/riscv: implement p2m_set_range()
  xen/riscv: Implement p2m_free_subtree() and related helpers
  xen/riscv: Implement p2m_pte_from_mfn() and support PBMT configuration
  xen/riscv: implement p2m_next_level()
  xen/riscv: Implement superpage splitting for p2m mappings
  xen/riscv: implement put_page()
  xen/riscv: implement mfn_valid() and page reference, ownership
    handling helpers
  xen/riscv: add support of page lookup by GFN
  xen/riscv: introduce metadata table to store P2M type

 docs/misc/xen-command-line.pandoc           |    9 +
 xen/arch/arm/include/asm/p2m.h              |    5 +
 xen/arch/riscv/Makefile                     |    3 +
 xen/arch/riscv/cpufeature.c                 |    1 +
 xen/arch/riscv/include/asm/Makefile         |    1 -
 xen/arch/riscv/include/asm/cpufeature.h     |    1 +
 xen/arch/riscv/include/asm/domain.h         |   23 +
 xen/arch/riscv/include/asm/flushtlb.h       |   13 +-
 xen/arch/riscv/include/asm/mm.h             |   29 +-
 xen/arch/riscv/include/asm/p2m.h            |  185 ++-
 xen/arch/riscv/include/asm/page.h           |   37 +
 xen/arch/riscv/include/asm/paging.h         |   20 +
 xen/arch/riscv/include/asm/riscv_encoding.h |   23 +-
 xen/arch/riscv/include/asm/vmid.h           |   14 +
 xen/arch/riscv/mm.c                         |   69 +-
 xen/arch/riscv/p2m.c                        | 1443 +++++++++++++++++++
 xen/arch/riscv/paging.c                     |  139 ++
 xen/arch/riscv/setup.c                      |    3 +
 xen/arch/riscv/stubs.c                      |    5 -
 xen/arch/riscv/vmid.c                       |  170 +++
 xen/common/device-tree/dom0less-build.c     |    2 +-
 21 files changed, 2158 insertions(+), 37 deletions(-)
 create mode 100644 xen/arch/riscv/include/asm/paging.h
 create mode 100644 xen/arch/riscv/include/asm/vmid.h
 create mode 100644 xen/arch/riscv/p2m.c
 create mode 100644 xen/arch/riscv/paging.c
 create mode 100644 xen/arch/riscv/vmid.c

-- 
2.51.1



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v6 01/19] xen/riscv: avoid redundant HGATP*_MODE_SHIFT and HGATP*_VMID_SHIFT
Date: Mon, 24 Nov 2025 13:33:34 +0100
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It is sufficient to use HGATP*_MODE_MASK and HGATP*_VMID_MASK without
the corresponding *_SHIFT definitions.

Rename HGATP{32,64}_PPN to HGATP{32,64}_PPN_MASK to more accurately
describe their purpose. The top-level HGATP_PPN and related aliases are
updated accordingly.

Signed-off-by: Oleksii Kurochko 
---
Changes in v6:
 - New patch.
---

 xen/arch/riscv/include/asm/riscv_encoding.h | 16 ++++------------
 1 file changed, 4 insertions(+), 12 deletions(-)

diff --git a/xen/arch/riscv/include/asm/riscv_encoding.h b/xen/arch/riscv/include/asm/riscv_encoding.h
index 6cc8f4eb45..fd27f74cb7 100644
--- a/xen/arch/riscv/include/asm/riscv_encoding.h
+++ b/xen/arch/riscv/include/asm/riscv_encoding.h
@@ -132,15 +132,11 @@
 #define HGATP_MODE_SV39X4		_UL(8)
 #define HGATP_MODE_SV48X4		_UL(9)
 
-#define HGATP32_MODE_SHIFT		31
-#define HGATP32_VMID_SHIFT		22
 #define HGATP32_VMID_MASK		_UL(0x1FC00000)
-#define HGATP32_PPN			_UL(0x003FFFFF)
+#define HGATP32_PPN_MASK		_UL(0x003FFFFF)
 
-#define HGATP64_MODE_SHIFT		60
-#define HGATP64_VMID_SHIFT		44
 #define HGATP64_VMID_MASK		_ULL(0x03FFF00000000000)
-#define HGATP64_PPN			_ULL(0x00000FFFFFFFFFFF)
+#define HGATP64_PPN_MASK		_ULL(0x00000FFFFFFFFFFF)
 
 #define PMP_R				_UL(0x01)
 #define PMP_W				_UL(0x02)
@@ -166,10 +162,8 @@
 #define SATP_MODE_SHIFT			SATP64_MODE_SHIFT
 #define SATP_PPN_MASK			SATP64_PPN
 
-#define HGATP_PPN			HGATP64_PPN
-#define HGATP_VMID_SHIFT		HGATP64_VMID_SHIFT
+#define HGATP_PPN_MASK			HGATP64_PPN_MASK
 #define HGATP_VMID_MASK			HGATP64_VMID_MASK
-#define HGATP_MODE_SHIFT		HGATP64_MODE_SHIFT
 #else
 #define MSTATUS_SD			MSTATUS32_SD
 #define SSTATUS_SD			SSTATUS32_SD
@@ -177,10 +171,8 @@
 #define SATP_MODE_SHIFT			SATP32_MODE_SHIFT
 #define SATP_PPN_MASK			SATP32_PPN
 
-#define HGATP_PPN			HGATP32_PPN
-#define HGATP_VMID_SHIFT		HGATP32_VMID_SHIFT
+#define HGATP_PPN_MASK			HGATP32_PPN_MASK
 #define HGATP_VMID_MASK			HGATP32_VMID_MASK
-#define HGATP_MODE_SHIFT		HGATP32_MODE_SHIFT
 #endif
 
 #define TOPI_IID_SHIFT			16
-- 
2.51.1



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v6 04/19] xen/riscv: introduce things necessary for p2m initialization
Date: Mon, 24 Nov 2025 13:33:37 +0100
Message-ID: <3ac28be95c3d9219bed7756cc0a78e735490f190.1763986955.git.oleksii.kurochko@gmail.com>
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Introduce the following things:
- Update p2m_domain structure, which describe per p2m-table state, with:
  - lock to protect updates to p2m.
  - pool with pages used to construct p2m.
  - back pointer to domain structure.
- p2m_init() to initalize members introduced in p2m_domain structure.

Signed-off-by: Oleksii Kurochko 
Acked-by: Jan Beulich 
---
Changes in V6:
 - Nothing changed. Only rebase.
---
Changes in V5:
 - Acked-by: Jan Beulich .
---
Changes in V4:
 - Move an introduction of clean_pte member of p2m_domain structure to the
   patch where it is started to be used:
     xen/riscv: add root page table allocation
 - Add prototype of p2m_init() to asm/p2m.h.
---
Changes in V3:
 - s/p2m_type/p2m_types.
 - Drop init. of p2m->clean_pte in p2m_init() as CONFIG_HAS_PASSTHROUGH is
   going to be selected unconditionaly. Plus CONFIG_HAS_PASSTHROUGH isn't
   ready to be used for RISC-V.
   Add compilation error to not forget to init p2m->clean_pte.
 - Move defintion of p2m->domain up in p2m_init().
 - Add iommu_use_hap_pt() when p2m->clean_pte is initialized.
 - Add the comment above p2m_types member of p2m_domain struct.
 - Add need_flush member to p2m_domain structure.
 - Move introduction of p2m_write_(un)lock() and p2m_tlb_flush_sync()
   to the patch where they are really used:
     xen/riscv: implement guest_physmap_add_entry() for mapping GFNs to MFN
 - Add p2m member to arch_domain structure.
 - Drop p2m_types from struct p2m_domain as P2M type for PTE will be stored
   differently.
 - Drop default_access as it isn't going to be used for now.
 - Move defintion of p2m_is_write_locked() to "implement function to map memory
   in guest p2m"  where it is really used.
---
Changes in V2:
 - Use introduced erlier sbi_remote_hfence_gvma_vmid() for proper implementation
   of p2m_force_tlb_flush_sync() as TLB flushing needs to happen for each pCPU
   which potentially has cached a mapping, what is tracked by d->dirty_cpumask.
 - Drop unnecessary blanks.
 - Fix code style for # of pre-processor directive.
 - Drop max_mapped_gfn and lowest_mapped_gfn as they aren't used now.
 - [p2m_init()] Set p2m->clean_pte=false if CONFIG_HAS_PASSTHROUGH=n.
 - [p2m_init()] Update the comment above p2m->domain = d;
 - Drop p2m->need_flush as it seems to be always true for RISC-V and as a
   consequence drop p2m_tlb_flush_sync().
 - Move to separate patch an introduction of root page table allocation.
---
 xen/arch/riscv/include/asm/domain.h |  5 +++++
 xen/arch/riscv/include/asm/p2m.h    | 33 +++++++++++++++++++++++++++++
 xen/arch/riscv/p2m.c                | 20 +++++++++++++++++
 3 files changed, 58 insertions(+)

diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h
index aac1040658..e688980efa 100644
--- a/xen/arch/riscv/include/asm/domain.h
+++ b/xen/arch/riscv/include/asm/domain.h
@@ -5,6 +5,8 @@
 #include 
 #include 
 
+#include 
+
 struct vcpu_vmid {
     uint64_t generation;
     uint16_t vmid;
@@ -24,6 +26,9 @@ struct arch_vcpu {
 
 struct arch_domain {
     struct hvm_domain hvm;
+
+    /* Virtual MMU */
+    struct p2m_domain p2m;
 };
 
 #include 
diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h
index 3776b98303..239f90622e 100644
--- a/xen/arch/riscv/include/asm/p2m.h
+++ b/xen/arch/riscv/include/asm/p2m.h
@@ -3,17 +3,48 @@
 #define ASM__RISCV__P2M_H
 
 #include 
+#include 
+#include 
+#include 
 
 #include 
 
 #define paddr_bits PADDR_BITS
 
+/* Get host p2m table */
+#define p2m_get_hostp2m(d) (&(d)->arch.p2m)
+
 struct gstage_mode_desc {
     unsigned char mode;
     unsigned int paging_levels;
     char name[8];
 };
 
+/* Per-p2m-table state */
+struct p2m_domain {
+    /*
+     * Lock that protects updates to the p2m.
+     */
+    rwlock_t lock;
+
+    /* Pages used to construct the p2m */
+    struct page_list_head pages;
+
+    /* Back pointer to domain */
+    struct domain *domain;
+
+    /*
+     * P2M updates may required TLBs to be flushed (invalidated).
+     *
+     * Flushes may be deferred by setting 'need_flush' and then flushing
+     * when the p2m write lock is released.
+     *
+     * If an immediate flush is required (e.g, if a super page is
+     * shattered), call p2m_tlb_flush_sync().
+     */
+    bool need_flush;
+};
+
 /*
  * List of possible type for each page in the p2m entry.
  * The number of available bit per page in the pte for this purpose is 2 bits.
@@ -97,6 +128,8 @@ static inline bool arch_acquire_resource_check(struct domain *d)
 void guest_mm_init(void);
 unsigned char get_max_supported_mode(void);
 
+int p2m_init(struct domain *d);
+
 #endif /* ASM__RISCV__P2M_H */
 
 /*
diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c
index a4c5b682ce..3017e9a260 100644
--- a/xen/arch/riscv/p2m.c
+++ b/xen/arch/riscv/p2m.c
@@ -3,6 +3,10 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
+#include 
 #include 
 
 #include 
@@ -107,3 +111,19 @@ void __init guest_mm_init(void)
      */
     local_hfence_gvma_all();
 }
+
+int p2m_init(struct domain *d)
+{
+    struct p2m_domain *p2m = p2m_get_hostp2m(d);
+
+    /*
+     * "Trivial" initialisation is now complete.  Set the backpointer so the
+     * users of p2m could get an access to domain structure.
+     */
+    p2m->domain = d;
+
+    rwlock_init(&p2m->lock);
+    INIT_PAGE_LIST_HEAD(&p2m->pages);
+
+    return 0;
+}
-- 
2.51.1



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v6 02/19] xen/riscv: detect and initialize G-stage mode
Date: Mon, 24 Nov 2025 13:33:35 +0100
Message-ID: <0e32a6bd86828952d7494b8d49b48d512f53cada.1763986955.git.oleksii.kurochko@gmail.com>
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Introduce gstage_mode_detect() and guest_mm_init() to probe supported
G-stage paging modes at boot. The function iterates over possible
HGATP modes (Sv32x4 on RV32, Sv39x4/Sv48x4/Sv57x4 on RV64) and selects
the largest supported MMU translation address mode by programming
CSR_HGATP and reading it back.

The selected mode is stored in max_gstage_mode (marked __ro_after_init)
and reported via printk. If no supported mode is found, Xen panics
since Bare mode is not expected to be used.

Finally, CSR_HGATP is cleared and a local_hfence_gvma_all() is issued
to avoid any potential speculative pollution of the TLB, as required
by the RISC-V spec.

The following issue starts to occur:
 .//asm/flushtlb.h:37:55: error: 'struct page_info'  declared inside
   parameter list will not be visible outside of this definition or
   declaration [-Werror]
 37 | static inline void page_set_tlbflush_timestamp(struct page_info *page)
To resolve it, forward declaration of struct page_info is added to

---
Changes in V6:
 - Sort items properly in riscv/Makefile.
 - Move the  call of local_hfence_gvma_all() from gstage_mode_detect()
   to pre_gstage_init() to avoid a redundancy when vmid_init() will be
   introduced.
 - Rename pre_gstage_init() to more generic name guest_mm_init().
 - s/gstage_mode/max_gstage_mode
 - Reverse direction of gstage mode detection to find a maximum supported mode to understand what modes are supported. (lower modes are supported automatically)
 - Introduce struct gstage_mode_desc.
 - Introduce get_max_supported_mode().
---
Changes in V5:
 - Add static and __initconst for local variable modes[] in
   gstage_mode_detect().
 - Change type for gstage_mode from 'unsigned long' to 'unsigned char'.
 - Update the comment inisde defintion if modes[] variable in
   gstage_mode_detect():
   - Add information about Bare mode.
   - Drop "a paged virtual-memory scheme described in Section 10.3" as it isn't
     relevant here.
 - Drop printing of function name when chosen G-stage mode message is printed.
 - Drop the call of gstage_mode_detect() from start_xen(). It will be added into
   p2m_init() when the latter will be introduced.
 - Introduce pre_gstage_init().
 - make gstage_mode_detect() static.
---
Changes in V4:
 - New patch.
---
 xen/arch/riscv/Makefile                     |   1 +
 xen/arch/riscv/include/asm/flushtlb.h       |   7 ++
 xen/arch/riscv/include/asm/p2m.h            |   9 ++
 xen/arch/riscv/include/asm/riscv_encoding.h |   5 +
 xen/arch/riscv/p2m.c                        | 106 ++++++++++++++++++++
 xen/arch/riscv/setup.c                      |   3 +
 6 files changed, 131 insertions(+)
 create mode 100644 xen/arch/riscv/p2m.c

diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile
index e2b8aa42c8..5a6f8c115d 100644
--- a/xen/arch/riscv/Makefile
+++ b/xen/arch/riscv/Makefile
@@ -6,6 +6,7 @@ obj-y += imsic.o
 obj-y += intc.o
 obj-y += irq.o
 obj-y += mm.o
+obj-y += p2m.o
 obj-y += pt.o
 obj-$(CONFIG_RISCV_64) += riscv64/
 obj-y += sbi.o
diff --git a/xen/arch/riscv/include/asm/flushtlb.h b/xen/arch/riscv/include/asm/flushtlb.h
index 51c8f753c5..e70badae0c 100644
--- a/xen/arch/riscv/include/asm/flushtlb.h
+++ b/xen/arch/riscv/include/asm/flushtlb.h
@@ -7,6 +7,13 @@
 
 #include 
 
+struct page_info;
+
+static inline void local_hfence_gvma_all(void)
+{
+    asm volatile ( "hfence.gvma zero, zero" ::: "memory" );
+}
+
 /* Flush TLB of local processor for address va. */
 static inline void flush_tlb_one_local(vaddr_t va)
 {
diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h
index e43c559e0c..3776b98303 100644
--- a/xen/arch/riscv/include/asm/p2m.h
+++ b/xen/arch/riscv/include/asm/p2m.h
@@ -8,6 +8,12 @@
 
 #define paddr_bits PADDR_BITS
 
+struct gstage_mode_desc {
+    unsigned char mode;
+    unsigned int paging_levels;
+    char name[8];
+};
+
 /*
  * List of possible type for each page in the p2m entry.
  * The number of available bit per page in the pte for this purpose is 2 bits.
@@ -88,6 +94,9 @@ static inline bool arch_acquire_resource_check(struct domain *d)
     return false;
 }
 
+void guest_mm_init(void);
+unsigned char get_max_supported_mode(void);
+
 #endif /* ASM__RISCV__P2M_H */
 
 /*
diff --git a/xen/arch/riscv/include/asm/riscv_encoding.h b/xen/arch/riscv/include/asm/riscv_encoding.h
index fd27f74cb7..e0a5e8b58b 100644
--- a/xen/arch/riscv/include/asm/riscv_encoding.h
+++ b/xen/arch/riscv/include/asm/riscv_encoding.h
@@ -131,10 +131,13 @@
 #define HGATP_MODE_SV32X4		_UL(1)
 #define HGATP_MODE_SV39X4		_UL(8)
 #define HGATP_MODE_SV48X4		_UL(9)
+#define HGATP_MODE_SV57X4		_UL(10)
 
+#define HGATP32_MODE_MASK		_UL(0x80000000)
 #define HGATP32_VMID_MASK		_UL(0x1FC00000)
 #define HGATP32_PPN_MASK		_UL(0x003FFFFF)
 
+#define HGATP64_MODE_MASK		_ULL(0xF000000000000000)
 #define HGATP64_VMID_MASK		_ULL(0x03FFF00000000000)
 #define HGATP64_PPN_MASK		_ULL(0x00000FFFFFFFFFFF)
 
@@ -164,6 +167,7 @@
 
 #define HGATP_PPN_MASK			HGATP64_PPN_MASK
 #define HGATP_VMID_MASK			HGATP64_VMID_MASK
+#define HGATP_MODE_MASK			HGATP64_MODE_MASK
 #else
 #define MSTATUS_SD			MSTATUS32_SD
 #define SSTATUS_SD			SSTATUS32_SD
@@ -173,6 +177,7 @@
 
 #define HGATP_PPN_MASK			HGATP32_PPN_MASK
 #define HGATP_VMID_MASK			HGATP32_VMID_MASK
+#define HGATP_MODE_MASK			HGATP32_MODE_MASK
 #endif
 
 #define TOPI_IID_SHIFT			16
diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c
new file mode 100644
index 0000000000..7bb0fc0ab4
--- /dev/null
+++ b/xen/arch/riscv/p2m.c
@@ -0,0 +1,106 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+static struct gstage_mode_desc __ro_after_init max_gstage_mode = {
+    .mode = HGATP_MODE_OFF,
+    .paging_levels = 0,
+    .name = "Bare",
+};
+
+unsigned char get_max_supported_mode(void)
+{
+    return max_gstage_mode.mode;
+}
+
+static void __init gstage_mode_detect(void)
+{
+    static const struct gstage_mode_desc modes[] __initconst = {
+        /*
+         * Based on the RISC-V spec:
+         *   Bare mode is always supported, regardless of SXLEN.
+         *   When SXLEN=32, the only other valid setting for MODE is Sv32.
+         *   When SXLEN=64, three paged virtual-memory schemes are defined:
+         *   Sv39, Sv48, and Sv57.
+         */
+#ifdef CONFIG_RISCV_32
+        { HGATP_MODE_SV32X4, 2, "Sv32x4" }
+#else
+        { HGATP_MODE_SV39X4, 3, "Sv39x4" },
+        { HGATP_MODE_SV48X4, 4, "Sv48x4" },
+        { HGATP_MODE_SV57X4, 5, "Sv57x4" },
+#endif
+    };
+
+    unsigned int mode_idx;
+
+    for ( mode_idx = ARRAY_SIZE(modes); mode_idx-- > 0; )
+    {
+        unsigned long mode = modes[mode_idx].mode;
+
+        csr_write(CSR_HGATP, MASK_INSR(mode, HGATP_MODE_MASK));
+
+        if ( MASK_EXTR(csr_read(CSR_HGATP), HGATP_MODE_MASK) == mode )
+        {
+            max_gstage_mode.mode = modes[mode_idx].mode;
+            max_gstage_mode.paging_levels = modes[mode_idx].paging_levels;
+            safe_strcpy(max_gstage_mode.name, modes[mode_idx].name);
+
+            break;
+        }
+    }
+
+    if ( max_gstage_mode.mode == HGATP_MODE_OFF )
+        panic("Xen expects that G-stage won't be Bare mode\n");
+
+    printk("Max supported G-stage mode is %s\n", max_gstage_mode.name);
+
+    csr_write(CSR_HGATP, 0);
+
+    /* local_hfence_gvma_all() will be called at the end of guest_mm_init. */
+}
+
+void __init guest_mm_init(void)
+{
+    gstage_mode_detect();
+
+    /*
+     * As gstage_mode_detect() is changing CSR_HGATP, it is necessary to flush
+     * guest TLB because:
+     *
+     * From RISC-V spec:
+     *   Speculative executions of the address-translation algorithm behave as
+     *   non-speculative executions of the algorithm do, except that they must
+     *   not set the dirty bit for a PTE, they must not trigger an exception,
+     *   and they must not create address-translation cache entries if those
+     *   entries would have been invalidated by any SFENCE.VMA instruction
+     *   executed by the hart since the speculative execution of the algorithm
+     *   began.
+     *
+     * Also, despite of the fact here it is mentioned that when V=0 two-stage
+     * address translation is inactivated:
+     *   The current virtualization mode, denoted V, indicates whether the hart
+     *   is currently executing in a guest. When V=1, the hart is either in
+     *   virtual S-mode (VS-mode), or in virtual U-mode (VU-mode) atop a guest
+     *   OS running in VS-mode. When V=0, the hart is either in M-mode, in
+     *   HS-mode, or in U-mode atop an OS running in HS-mode. The
+     *   virtualization mode also indicates whether two-stage address
+     *   translation is active (V=1) or inactive (V=0).
+     * But on the same side, writing to hgatp register activates it:
+     *   The hgatp register is considered active for the purposes of
+     *   the address-translation algorithm unless the effective privilege mode
+     *   is U and hstatus.HU=0.
+     *
+     * Thereby it leaves some room for speculation even in this stage of boot,
+     * so it could be that we polluted local TLB so flush all guest TLB.
+     */
+    local_hfence_gvma_all();
+}
diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c
index 483cdd7e17..8f46f1a1de 100644
--- a/xen/arch/riscv/setup.c
+++ b/xen/arch/riscv/setup.c
@@ -22,6 +22,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -148,6 +149,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id,
 
     console_init_postirq();
 
+    guest_mm_init();
+
     printk("All set up\n");
 
     machine_halt();
-- 
2.51.1



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v6 05/19] xen/riscv: construct the P2M pages pool for guests
Date: Mon, 24 Nov 2025 13:33:38 +0100
Message-ID: <65e3337903d27f64728fe5f17b70d889be78bc73.1763986955.git.oleksii.kurochko@gmail.com>
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Implement p2m_set_allocation() to construct p2m pages pool for guests
based on required number of pages.

This is implemented by:
- Adding a `struct paging_domain` which contains a freelist, a
  counter variable and a spinlock to `struct arch_domain` to
  indicate the free p2m pages and the number of p2m total pages in
  the p2m pages pool.
- Adding a helper `p2m_set_allocation` to set the p2m pages pool
  size. This helper should be called before allocating memory for
  a guest and is called from domain_p2m_set_allocation(), the latter
  is a part of common dom0less code.
- Adding implementation of paging_freelist_adjust() and
  paging_domain_init().

Signed-off-by: Oleksii Kurochko 
Acked-by: Jan Beulich 
---
Changes in V5-6:
 - Nothing changed. Only rebase.
---
Changes in V4:
 - s/paging_freelist_init/paging_freelist_adjust.
 - Add empty line between definiton of paging_freelist_adjust()
   and paging_domain_init().
 - Update commit message.
 - Add Acked-by: Jan Beulich .
---
Changes in v3:
 - Drop usage of p2m_ prefix inside struct paging_domain().
 - Introduce paging_domain_init() to init paging struct.
---
Changes in v2:
 - Drop the comment above inclusion of  in riscv/p2m.c.
 - Use ACCESS_ONCE() for lhs and rhs for the expressions in
   p2m_set_allocation().
---
 xen/arch/riscv/Makefile             |  1 +
 xen/arch/riscv/include/asm/Makefile |  1 -
 xen/arch/riscv/include/asm/domain.h | 12 ++++++
 xen/arch/riscv/include/asm/paging.h | 13 ++++++
 xen/arch/riscv/p2m.c                | 18 ++++++++
 xen/arch/riscv/paging.c             | 65 +++++++++++++++++++++++++++++
 6 files changed, 109 insertions(+), 1 deletion(-)
 create mode 100644 xen/arch/riscv/include/asm/paging.h
 create mode 100644 xen/arch/riscv/paging.c

diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile
index 1098b6d926..2d1ad7a394 100644
--- a/xen/arch/riscv/Makefile
+++ b/xen/arch/riscv/Makefile
@@ -7,6 +7,7 @@ obj-y += intc.o
 obj-y += irq.o
 obj-y += mm.o
 obj-y += p2m.o
+obj-y += paging.o
 obj-y += pt.o
 obj-$(CONFIG_RISCV_64) += riscv64/
 obj-y += sbi.o
diff --git a/xen/arch/riscv/include/asm/Makefile b/xen/arch/riscv/include/asm/Makefile
index bfdf186c68..3824f31c39 100644
--- a/xen/arch/riscv/include/asm/Makefile
+++ b/xen/arch/riscv/include/asm/Makefile
@@ -6,7 +6,6 @@ generic-y += hardirq.h
 generic-y += hypercall.h
 generic-y += iocap.h
 generic-y += irq-dt.h
-generic-y += paging.h
 generic-y += percpu.h
 generic-y += perfc_defn.h
 generic-y += random.h
diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h
index e688980efa..316e7c6c84 100644
--- a/xen/arch/riscv/include/asm/domain.h
+++ b/xen/arch/riscv/include/asm/domain.h
@@ -2,6 +2,8 @@
 #ifndef ASM__RISCV__DOMAIN_H
 #define ASM__RISCV__DOMAIN_H
 
+#include 
+#include 
 #include 
 #include 
 
@@ -24,11 +26,21 @@ struct arch_vcpu {
     struct vcpu_vmid vmid;
 };
 
+struct paging_domain {
+    spinlock_t lock;
+    /* Free pages from the pre-allocated pool */
+    struct page_list_head freelist;
+    /* Number of pages from the pre-allocated pool */
+    unsigned long total_pages;
+};
+
 struct arch_domain {
     struct hvm_domain hvm;
 
     /* Virtual MMU */
     struct p2m_domain p2m;
+
+    struct paging_domain paging;
 };
 
 #include 
diff --git a/xen/arch/riscv/include/asm/paging.h b/xen/arch/riscv/include/asm/paging.h
new file mode 100644
index 0000000000..98d8b06d45
--- /dev/null
+++ b/xen/arch/riscv/include/asm/paging.h
@@ -0,0 +1,13 @@
+#ifndef ASM_RISCV_PAGING_H
+#define ASM_RISCV_PAGING_H
+
+#include 
+
+struct domain;
+
+int paging_domain_init(struct domain *d);
+
+int paging_freelist_adjust(struct domain *d, unsigned long pages,
+                           bool *preempted);
+
+#endif /* ASM_RISCV_PAGING_H */
diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c
index 3017e9a260..857517f8ee 100644
--- a/xen/arch/riscv/p2m.c
+++ b/xen/arch/riscv/p2m.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -122,8 +123,25 @@ int p2m_init(struct domain *d)
      */
     p2m->domain = d;
 
+    paging_domain_init(d);
+
     rwlock_init(&p2m->lock);
     INIT_PAGE_LIST_HEAD(&p2m->pages);
 
     return 0;
 }
+
+/*
+ * Set the pool of pages to the required number of pages.
+ * Returns 0 for success, non-zero for failure.
+ * Call with d->arch.paging.lock held.
+ */
+int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted)
+{
+    int rc;
+
+    if ( (rc = paging_freelist_adjust(d, pages, preempted)) )
+        return rc;
+
+    return 0;
+}
diff --git a/xen/arch/riscv/paging.c b/xen/arch/riscv/paging.c
new file mode 100644
index 0000000000..2df8de033b
--- /dev/null
+++ b/xen/arch/riscv/paging.c
@@ -0,0 +1,65 @@
+#include 
+#include 
+#include 
+#include 
+#include 
+
+int paging_freelist_adjust(struct domain *d, unsigned long pages,
+                           bool *preempted)
+{
+    struct page_info *pg;
+
+    ASSERT(spin_is_locked(&d->arch.paging.lock));
+
+    for ( ; ; )
+    {
+        if ( d->arch.paging.total_pages < pages )
+        {
+            /* Need to allocate more memory from domheap */
+            pg = alloc_domheap_page(d, MEMF_no_owner);
+            if ( pg == NULL )
+            {
+                printk(XENLOG_ERR "Failed to allocate pages.\n");
+                return -ENOMEM;
+            }
+            ACCESS_ONCE(d->arch.paging.total_pages)++;
+            page_list_add_tail(pg, &d->arch.paging.freelist);
+        }
+        else if ( d->arch.paging.total_pages > pages )
+        {
+            /* Need to return memory to domheap */
+            pg = page_list_remove_head(&d->arch.paging.freelist);
+            if ( pg )
+            {
+                ACCESS_ONCE(d->arch.paging.total_pages)--;
+                free_domheap_page(pg);
+            }
+            else
+            {
+                printk(XENLOG_ERR
+                       "Failed to free pages, freelist is empty.\n");
+                return -ENOMEM;
+            }
+        }
+        else
+            break;
+
+        /* Check to see if we need to yield and try again */
+        if ( preempted && general_preempt_check() )
+        {
+            *preempted = true;
+            return -ERESTART;
+        }
+    }
+
+    return 0;
+}
+
+/* Domain paging struct initialization. */
+int paging_domain_init(struct domain *d)
+{
+    spin_lock_init(&d->arch.paging.lock);
+    INIT_PAGE_LIST_HEAD(&d->arch.paging.freelist);
+
+    return 0;
+}
-- 
2.51.1



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v6 06/19] xen/riscv: add root page table allocation
Date: Mon, 24 Nov 2025 13:33:39 +0100
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Introduce support for allocating and initializing the root page table
required for RISC-V stage-2 address translation.

To implement root page table allocation the following is introduced:
- p2m_get_clean_page() and p2m_alloc_root_table(), p2m_allocate_root()
  helpers to allocate and zero a 16 KiB root page table, as mandated
  by the RISC-V privileged specification for Sv32x4/Sv39x4/Sv48x4/Sv57x4
  modes.
- Update p2m_init() to inititialize p2m_root_order.
- Add maddr_to_page() and page_to_maddr() macros for easier address
  manipulation.
- Introduce paging_ret_to_domheap() to return some pages before
  allocate 16 KiB pages for root page table.
- Allocate root p2m table after p2m pool is initialized.
- Add construct_hgatp() to construct the hgatp register value based on
  p2m->root, p2m->hgatp_mode and VMID.

Signed-off-by: Oleksii Kurochko 
---
Changes in V6:
 - Clean the memory page instead of frame_table[] in clear_and_clean_page().
 – Remove full stops from log messages in paging.c and start the messages
   with a lowercase letter.
 - s/paging_ret_page_to_domheap/_paging_ret_to_domheap
 - s/paging_add_page_to_freelist/_paging_add_to_freelist
 - Introduce gstage_mode and initialize it.
---
Changes in V5:
 - Update proto of construct_hgatp(): make first argument pointer-to-const.
 - Code style fixes.
 - s/paging_ret_pages_to_freelist/paging_refill_from_domheap.
 - s/paging_ret_pages_to_domheap/paging_ret_to_domheap.
 - s/paging_ret_page_to_freelist/paging_add_page_to_freelist.
 - Drop ACCESS_ONCE() as all the cases where it is used are used under spinlock() hence ACCESS_ONCE() is redundant.
---
Changes in V4:
 - Drop hgatp_mode from p2m_domain as gstage_mode was introduced and
   initlialized earlier patch. So use gstage_mode instead.
 - s/GUEST_ROOT_PAGE_TABLE_SIZE/GSTAGE_ROOT_PAGE_TABLE_SIZE.
 - Drop p2m_root_order and re-define P2M_ROOT_ORDER:
     #define P2M_ROOT_ORDER  (ilog2(GSTAGE_ROOT_PAGE_TABLE_SIZE) - PAGE_SHIFT)
 - Update implementation of construct_hgatp(): use introduced gstage_mode
   and use MASK_INSRT() to construct ppn value.
 - Drop nr_root_pages variable inside p2m_alloc_root_table().
 - Update the printk's message inside paging_ret_pages_to_domheap().
 - Add an introduction of clean_pte member of p2m_domain structure to this
   patch as it is started to be used here.
   Rename clean_pte to clean_dcache.
 - Drop p2m_allocate_root() function as it is going to be used only in one
   place.
 - Propogate rc from p2m_alloc_root_table() in p2m_set_allocation().
 - Return P2M_ROOT_PAGES to freelist in case of allocation of root page
   table failed.
 - Add allocated root tables pages to p2m->pages pool so a usage of pages
   could be properly taken into account.
---
Changes in v3:
 - Drop insterting of p2m->vmid in hgatp_from_page() as now vmid is allocated
   per-CPU, not per-domain, so it will be inserted later somewhere in
   context_switch or before returning control to a guest.
 - use BIT() to init nr_pages in p2m_allocate_root() instead of open-code
   BIT() macros.
 - Fix order in clear_and_clean_page().
 - s/panic("Specify more xen,domain-p2m-mem-mb\n")/return NULL.
 - Use lock around a procedure of returning back pages necessary for p2m
   root table.
 - Update the comment about allocation of page for root page table.
 - Update an argument of hgatp_from_page() to "struct page_info *p2m_root_page"
   to be consistent with the  function name.
 - Use p2m_get_hostp2m(d) instead of open-coding it.
 - Update the comment above the call of p2m_alloc_root_table().
 - Update the comments in p2m_allocate_root().
 - Move part which returns some page to domheap before root page table allocation
   to paging.c.
 - Pass p2m_domain * instead of struct domain * for p2m_alloc_root_table().
 - Introduce construct_hgatp() instead of hgatp_from_page().
 - Add vmid and hgatp_mode member of struct p2m_domain.
 - Add explanatory comment above clean_dcache_va_range() in
   clear_and_clean_page().
 - Introduce P2M_ROOT_ORDER and P2M_ROOT_PAGES.
 - Drop vmid member from p2m_domain as now we are using per-pCPU
   VMID allocation.
 - Update a declaration of construct_hgatp() to recieve VMID as it
   isn't per-VM anymore.
 - Drop hgatp member of p2m_domain struct as with the new VMID scheme
   allocation construction of hgatp will be needed more often.
 - Drop is_hardware_domain() case in p2m_allocate_root(), just always
   allocate root using p2m pool pages.
 - Refactor p2m_alloc_root_table() and p2m_alloc_table().
---
Changes in v2:
 - This patch was created from "xen/riscv: introduce things necessary for p2m
   initialization" with the following changes:
   - [clear_and_clean_page()] Add missed call of clean_dcache_va_range().
   - Drop p2m_get_clean_page() as it is going to be used only once to allocate
     root page table. Open-code it explicittly in p2m_allocate_root(). Also,
     it will help avoid duplication of the code connected to order and nr_pages
     of p2m root page table.
   - Instead of using order 2 for alloc_domheap_pages(), use
     get_order_from_bytes(KB(16)).
   - Clear and clean a proper amount of allocated pages in p2m_allocate_root().
   - Drop _info from the function name hgatp_from_page_info() and its argument
     page_info.
   - Introduce HGATP_MODE_MASK and use MASK_INSR() instead of shift to calculate
     value of hgatp.
   - Drop unnecessary parentheses in definition of page_to_maddr().
   - Add support of VMID.
   - Drop TLB flushing in p2m_alloc_root_table() and do that once when VMID
     is re-used. [Look at p2m_alloc_vmid()]
   - Allocate p2m root table after p2m pool is fully initialized: first
     return pages to p2m pool them allocate p2m root table.
---
 xen/arch/riscv/include/asm/mm.h             |   4 +
 xen/arch/riscv/include/asm/p2m.h            |  17 +++
 xen/arch/riscv/include/asm/paging.h         |   3 +
 xen/arch/riscv/include/asm/riscv_encoding.h |   2 +
 xen/arch/riscv/p2m.c                        |  99 +++++++++++++++++-
 xen/arch/riscv/paging.c                     | 110 +++++++++++++++-----
 6 files changed, 206 insertions(+), 29 deletions(-)

diff --git a/xen/arch/riscv/include/asm/mm.h b/xen/arch/riscv/include/asm/mm.h
index 9283616c02..dd8cdc9782 100644
--- a/xen/arch/riscv/include/asm/mm.h
+++ b/xen/arch/riscv/include/asm/mm.h
@@ -167,6 +167,10 @@ extern struct page_info *frametable_virt_start;
 #define mfn_to_page(mfn)    (frametable_virt_start + mfn_x(mfn))
 #define page_to_mfn(pg)     _mfn((pg) - frametable_virt_start)
 
+/* Convert between machine addresses and page-info structures. */
+#define maddr_to_page(ma) mfn_to_page(maddr_to_mfn(ma))
+#define page_to_maddr(pg) mfn_to_maddr(page_to_mfn(pg))
+
 static inline void *page_to_virt(const struct page_info *pg)
 {
     return mfn_to_virt(mfn_x(page_to_mfn(pg)));
diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h
index 239f90622e..c9aa19ad43 100644
--- a/xen/arch/riscv/include/asm/p2m.h
+++ b/xen/arch/riscv/include/asm/p2m.h
@@ -2,6 +2,7 @@
 #ifndef ASM__RISCV__P2M_H
 #define ASM__RISCV__P2M_H
 
+#include 
 #include 
 #include 
 #include 
@@ -9,6 +10,9 @@
 
 #include 
 
+#define P2M_ROOT_ORDER  (ilog2(GSTAGE_ROOT_PAGE_TABLE_SIZE) - PAGE_SHIFT)
+#define P2M_ROOT_PAGES  BIT(P2M_ROOT_ORDER, U)
+
 #define paddr_bits PADDR_BITS
 
 /* Get host p2m table */
@@ -30,6 +34,11 @@ struct p2m_domain {
     /* Pages used to construct the p2m */
     struct page_list_head pages;
 
+    /* The root of the p2m tree. May be concatenated */
+    struct page_info *root;
+
+    struct gstage_mode_desc mode;
+
     /* Back pointer to domain */
     struct domain *domain;
 
@@ -43,6 +52,12 @@ struct p2m_domain {
      * shattered), call p2m_tlb_flush_sync().
      */
     bool need_flush;
+
+    /*
+     * Indicate if it is required to clean the cache when writing an entry or
+     * when a page is needed to be fully cleared and cleaned.
+     */
+    bool clean_dcache;
 };
 
 /*
@@ -130,6 +145,8 @@ unsigned char get_max_supported_mode(void);
 
 int p2m_init(struct domain *d);
 
+unsigned long construct_hgatp(const struct p2m_domain *p2m, uint16_t vmid);
+
 #endif /* ASM__RISCV__P2M_H */
 
 /*
diff --git a/xen/arch/riscv/include/asm/paging.h b/xen/arch/riscv/include/asm/paging.h
index 98d8b06d45..01be45528f 100644
--- a/xen/arch/riscv/include/asm/paging.h
+++ b/xen/arch/riscv/include/asm/paging.h
@@ -10,4 +10,7 @@ int paging_domain_init(struct domain *d);
 int paging_freelist_adjust(struct domain *d, unsigned long pages,
                            bool *preempted);
 
+int paging_ret_to_domheap(struct domain *d, unsigned int nr_pages);
+int paging_refill_from_domheap(struct domain *d, unsigned int nr_pages);
+
 #endif /* ASM_RISCV_PAGING_H */
diff --git a/xen/arch/riscv/include/asm/riscv_encoding.h b/xen/arch/riscv/include/asm/riscv_encoding.h
index e0a5e8b58b..1f7e612366 100644
--- a/xen/arch/riscv/include/asm/riscv_encoding.h
+++ b/xen/arch/riscv/include/asm/riscv_encoding.h
@@ -180,6 +180,8 @@
 #define HGATP_MODE_MASK			HGATP32_MODE_MASK
 #endif
 
+#define GSTAGE_ROOT_PAGE_TABLE_SIZE	KB(16)
+
 #define TOPI_IID_SHIFT			16
 #define TOPI_IID_MASK			0xfff
 #define TOPI_IPRIO_MASK		0xff
diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c
index 857517f8ee..7c2ce7ec18 100644
--- a/xen/arch/riscv/p2m.c
+++ b/xen/arch/riscv/p2m.c
@@ -3,6 +3,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -113,6 +114,74 @@ void __init guest_mm_init(void)
     local_hfence_gvma_all();
 }
 
+static void clear_and_clean_page(struct page_info *page, bool clean_dcache)
+{
+    void *p = __map_domain_page(page);
+
+    clear_page(p);
+
+    /*
+     * If the IOMMU doesn't support coherent walks and the p2m tables are
+     * shared between the CPU and IOMMU, it is necessary to clean the
+     * d-cache.
+     */
+    if ( clean_dcache )
+        clean_dcache_va_range(p, PAGE_SIZE);
+
+    unmap_domain_page(p);
+}
+
+unsigned long construct_hgatp(const struct p2m_domain *p2m, uint16_t vmid)
+{
+    return MASK_INSR(mfn_x(page_to_mfn(p2m->root)), HGATP_PPN_MASK) |
+           MASK_INSR(p2m->mode.mode, HGATP_MODE_MASK) |
+           MASK_INSR(vmid, HGATP_VMID_MASK);
+}
+
+static int p2m_alloc_root_table(struct p2m_domain *p2m)
+{
+    struct domain *d = p2m->domain;
+    struct page_info *page;
+    int rc;
+
+    /*
+     * Return back P2M_ROOT_PAGES to assure the root table memory is also
+     * accounted against the P2M pool of the domain.
+     */
+    if ( (rc = paging_ret_to_domheap(d, P2M_ROOT_PAGES)) )
+        return rc;
+
+    /*
+     * As mentioned in the Priviliged Architecture Spec (version 20240411)
+     * in Section 18.5.1, for the paged virtual-memory schemes  (Sv32x4,
+     * Sv39x4, Sv48x4, and Sv57x4), the root page table is 16 KiB and must
+     * be aligned to a 16-KiB boundary.
+     */
+    page = alloc_domheap_pages(d, P2M_ROOT_ORDER, MEMF_no_owner);
+    if ( !page )
+    {
+        /*
+         * If allocation of root table pages fails, the pages acquired above
+         * must be returned to the freelist to maintain proper freelist
+         * balance.
+         */
+        paging_refill_from_domheap(d, P2M_ROOT_PAGES);
+
+        return -ENOMEM;
+    }
+
+    for ( unsigned int i = 0; i < P2M_ROOT_PAGES; i++ )
+    {
+        clear_and_clean_page(page + i, p2m->clean_dcache);
+
+        page_list_add(page + i, &p2m->pages);
+    }
+
+    p2m->root = page;
+
+    return 0;
+}
+
 int p2m_init(struct domain *d)
 {
     struct p2m_domain *p2m = p2m_get_hostp2m(d);
@@ -128,6 +197,24 @@ int p2m_init(struct domain *d)
     rwlock_init(&p2m->lock);
     INIT_PAGE_LIST_HEAD(&p2m->pages);
 
+    /*
+     * Currently, the infrastructure required to enable CONFIG_HAS_PASSTHROUGH
+     * is not ready for RISC-V support.
+     *
+     * When CONFIG_HAS_PASSTHROUGH=y, p2m->clean_dcache must be properly
+     * initialized.
+     * At the moment, it defaults to false because the p2m structure is
+     * zero-initialized.
+     */
+#ifdef CONFIG_HAS_PASSTHROUGH
+#   error "Add init of p2m->clean_dcache"
+#endif
+
+    /* TODO: don't hardcode used for a domain g-stage mode. */
+    p2m->mode.mode = HGATP_MODE_SV39X4;
+    p2m->mode.paging_levels = 2;
+    safe_strcpy(p2m->mode.name, "Sv39x4");
+
     return 0;
 }
 
@@ -138,10 +225,20 @@ int p2m_init(struct domain *d)
  */
 int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted)
 {
+    struct p2m_domain *p2m = p2m_get_hostp2m(d);
     int rc;
 
     if ( (rc = paging_freelist_adjust(d, pages, preempted)) )
         return rc;
 
-    return 0;
+    /*
+     * First, initialize p2m pool. Then allocate the root
+     * table so that the necessary pages can be returned from the p2m pool,
+     * since the root table must be allocated using alloc_domheap_pages(...)
+     * to meet its specific requirements.
+     */
+    if ( !p2m->root )
+        rc = p2m_alloc_root_table(p2m);
+
+    return rc;
 }
diff --git a/xen/arch/riscv/paging.c b/xen/arch/riscv/paging.c
index 2df8de033b..d401ddc34e 100644
--- a/xen/arch/riscv/paging.c
+++ b/xen/arch/riscv/paging.c
@@ -4,46 +4,67 @@
 #include 
 #include 
 
+static int _paging_ret_to_domheap(struct domain *d)
+{
+    struct page_info *page;
+
+    ASSERT(spin_is_locked(&d->arch.paging.lock));
+
+    /* Return memory to domheap. */
+    page = page_list_remove_head(&d->arch.paging.freelist);
+    if( page )
+    {
+        d->arch.paging.total_pages--;
+        free_domheap_page(page);
+    }
+    else
+    {
+        printk(XENLOG_ERR
+               "failed to free pages, P2M freelist is empty\n");
+        return -ENOMEM;
+    }
+
+    return 0;
+}
+
+static int _paging_add_to_freelist(struct domain *d)
+{
+    struct page_info *page;
+
+    ASSERT(spin_is_locked(&d->arch.paging.lock));
+
+    /* Need to allocate more memory from domheap */
+    page = alloc_domheap_page(d, MEMF_no_owner);
+    if ( page == NULL )
+    {
+        printk(XENLOG_ERR "failed to allocate pages\n");
+        return -ENOMEM;
+    }
+    d->arch.paging.total_pages++;
+    page_list_add_tail(page, &d->arch.paging.freelist);
+
+    return 0;
+}
+
 int paging_freelist_adjust(struct domain *d, unsigned long pages,
                            bool *preempted)
 {
-    struct page_info *pg;
-
     ASSERT(spin_is_locked(&d->arch.paging.lock));
 
     for ( ; ; )
     {
+        int rc = 0;
+
         if ( d->arch.paging.total_pages < pages )
-        {
-            /* Need to allocate more memory from domheap */
-            pg = alloc_domheap_page(d, MEMF_no_owner);
-            if ( pg == NULL )
-            {
-                printk(XENLOG_ERR "Failed to allocate pages.\n");
-                return -ENOMEM;
-            }
-            ACCESS_ONCE(d->arch.paging.total_pages)++;
-            page_list_add_tail(pg, &d->arch.paging.freelist);
-        }
+            rc = _paging_add_to_freelist(d);
         else if ( d->arch.paging.total_pages > pages )
-        {
-            /* Need to return memory to domheap */
-            pg = page_list_remove_head(&d->arch.paging.freelist);
-            if ( pg )
-            {
-                ACCESS_ONCE(d->arch.paging.total_pages)--;
-                free_domheap_page(pg);
-            }
-            else
-            {
-                printk(XENLOG_ERR
-                       "Failed to free pages, freelist is empty.\n");
-                return -ENOMEM;
-            }
-        }
+            rc = _paging_ret_to_domheap(d);
         else
             break;
 
+        if ( rc )
+            return rc;
+
         /* Check to see if we need to yield and try again */
         if ( preempted && general_preempt_check() )
         {
@@ -55,6 +76,39 @@ int paging_freelist_adjust(struct domain *d, unsigned long pages,
     return 0;
 }
 
+int paging_refill_from_domheap(struct domain *d, unsigned int nr_pages)
+{
+    ASSERT(spin_is_locked(&d->arch.paging.lock));
+
+    for ( unsigned int i = 0; i < nr_pages; i++ )
+    {
+        int rc = _paging_add_to_freelist(d);
+
+        if ( rc )
+            return rc;
+    }
+
+    return 0;
+}
+
+int paging_ret_to_domheap(struct domain *d, unsigned int nr_pages)
+{
+    ASSERT(spin_is_locked(&d->arch.paging.lock));
+
+    if ( d->arch.paging.total_pages < nr_pages )
+        return false;
+
+    for ( unsigned int i = 0; i < nr_pages; i++ )
+    {
+        int rc = _paging_ret_to_domheap(d);
+
+        if ( rc )
+            return rc;
+    }
+
+    return 0;
+}
+
 /* Domain paging struct initialization. */
 int paging_domain_init(struct domain *d)
 {
-- 
2.51.1



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v6 08/19] xen/riscv: add new p2m types and helper macros for type classification
Date: Mon, 24 Nov 2025 13:33:41 +0100
Message-ID: <1073b8807531763d2fa64ceb231aa471a74741d3.1763986955.git.oleksii.kurochko@gmail.com>
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- Extended p2m_type_t with additional types: p2m_mmio_direct,
  p2m_ext_storage.
- Added macros to classify memory types: P2M_RAM_TYPES.
- Introduced helper predicates: p2m_is_ram(), p2m_is_any_ram().
- Introduce arch_dt_passthrough() to tell handle_passthrough_prop()
  from common code how to map device memory.
- Introduce p2m_first_external for detection for relational operations
  with p2m type which is stored outside P2M's PTE bits.

Signed-off-by: Oleksii Kurochko 
Acked-by: Jan Beulich 
---
Changes in V5-V6:
 - Nothing changed. Only Rebase.
---
Changes in V4:
 - Drop underscores for argumets of p2m_is_ram() and p2m_is_any_ram().
 - Add Acked-by: Jan Beulich .
---
Changes in V4:
 - Drop underscode in p2m_to_mask()'s argument and for other similar helpers.
 - Introduce arch_dt_passthrough_p2m_type() instead of p2m_mmio_direct.
 - Drop for the moment grant tables related stuff as it isn't going to be used in the nearest future.
---
Changes in V3:
 - Drop p2m_ram_ro.
 - Rename p2m_mmio_direct_dev to p2m_mmio_direct_io to make it more RISC-V specicific.
 - s/p2m_mmio_direct_dev/p2m_mmio_direct_io.
---
Changes in V2:
 - Drop stuff connected to foreign mapping as it isn't necessary for RISC-V
   right now.
---
 xen/arch/riscv/include/asm/p2m.h | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h
index c9aa19ad43..1c89838408 100644
--- a/xen/arch/riscv/include/asm/p2m.h
+++ b/xen/arch/riscv/include/asm/p2m.h
@@ -70,8 +70,29 @@ struct p2m_domain {
 typedef enum {
     p2m_invalid = 0,    /* Nothing mapped here */
     p2m_ram_rw,         /* Normal read/write domain RAM */
+    p2m_mmio_direct_io, /* Read/write mapping of genuine Device MMIO area,
+                           PTE_PBMT_IO will be used for such mappings */
+    p2m_ext_storage,    /* Following types'll be stored outsude PTE bits: */
+
+    /* Sentinel — not a real type, just a marker for comparison */
+    p2m_first_external = p2m_ext_storage,
 } p2m_type_t;
 
+static inline p2m_type_t arch_dt_passthrough_p2m_type(void)
+{
+    return p2m_mmio_direct_io;
+}
+
+/* We use bitmaps and mask to handle groups of types */
+#define p2m_to_mask(t) BIT(t, UL)
+
+/* RAM types, which map to real machine frames */
+#define P2M_RAM_TYPES (p2m_to_mask(p2m_ram_rw))
+
+/* Useful predicates */
+#define p2m_is_ram(t) (p2m_to_mask(t) & P2M_RAM_TYPES)
+#define p2m_is_any_ram(t) (p2m_to_mask(t) & P2M_RAM_TYPES)
+
 #include 
 
 static inline int get_page_and_type(struct page_info *page,
-- 
2.51.1



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v6 07/19] xen/riscv: introduce pte_{set,get}_mfn()
Date: Mon, 24 Nov 2025 13:33:40 +0100
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Introduce helpers pte_{set,get}_mfn() to simplify setting and getting
of mfn.

Also, introduce PTE_PPN_MASK and add BUILD_BUG_ON() to be sure that
PTE_PPN_MASK remains the same for all MMU modes except Sv32.

Signed-off-by: Oleksii Kurochko 
Acked-by: Jan Beulich 
---
Changes in V4-V6:
 - Nothing changed. Only Rebase.
---
Changes in V3:
 - Add Acked-by: Jan Beulich .
---
Changes in V2:
 - Patch "[PATCH v1 4/6] xen/riscv: define pt_t and pt_walk_t structures" was
   renamed to xen/riscv: introduce pte_{set,get}_mfn() as after dropping of
   bitfields for PTE structure, this patch introduce only pte_{set,get}_mfn().
 - As pt_t and pt_walk_t were dropped, update implementation of
   pte_{set,get}_mfn() to use bit operations and shifts instead of bitfields.
 - Introduce PTE_PPN_MASK to be able to use MASK_INSR for setting/getting PPN.
 - Add BUILD_BUG_ON(RV_STAGE1_MODE > SATP_MODE_SV57) to be sure that when
   new MMU mode will be added, someone checks that PPN is still bits 53:10.
---
 xen/arch/riscv/include/asm/page.h | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/xen/arch/riscv/include/asm/page.h b/xen/arch/riscv/include/asm/page.h
index ddcc4da0a3..66cb192316 100644
--- a/xen/arch/riscv/include/asm/page.h
+++ b/xen/arch/riscv/include/asm/page.h
@@ -112,6 +112,30 @@ typedef struct {
 #endif
 } pte_t;
 
+#if RV_STAGE1_MODE != SATP_MODE_SV32
+#define PTE_PPN_MASK _UL(0x3FFFFFFFFFFC00)
+#else
+#define PTE_PPN_MASK _U(0xFFFFFC00)
+#endif
+
+static inline void pte_set_mfn(pte_t *p, mfn_t mfn)
+{
+    /*
+     * At the moment spec provides Sv32 - Sv57.
+     * If one day new MMU mode will be added it will be needed
+     * to check that PPN mask still continue to cover bits 53:10.
+     */
+    BUILD_BUG_ON(RV_STAGE1_MODE > SATP_MODE_SV57);
+
+    p->pte &= ~PTE_PPN_MASK;
+    p->pte |= MASK_INSR(mfn_x(mfn), PTE_PPN_MASK);
+}
+
+static inline mfn_t pte_get_mfn(pte_t p)
+{
+    return _mfn(MASK_EXTR(p.pte, PTE_PPN_MASK));
+}
+
 static inline bool pte_is_valid(pte_t p)
 {
     return p.pte & PTE_VALID;
-- 
2.51.1



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk ,
	Jan Beulich 
Subject: [PATCH v6 09/19] xen/dom0less: abstract Arm-specific p2m type name for device MMIO mappings
Date: Mon, 24 Nov 2025 13:33:42 +0100
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Introduce arch_dt_passthrough_p2m_type() and use it instead of
`p2m_mmio_direct_dev` to avoid leaking Arm-specific naming into
common Xen code, such as dom0less passthrough property handling.

This helps reduce platform-specific terminology in shared logic and
improves clarity for future non-Arm ports (e.g. RISC-V or PowerPC).

No functional changes — the definition is preserved via a static inline
function for Arm.

Suggested-by: Jan Beulich 
Signed-off-by: Oleksii Kurochko 
---
Changes in V5-6:
 - Nothing changed. Only rebase.
---
Changes in V4:
 - Introduce arch_dt_passthrough_p2m_type() instead of re-defining of
   p2m_mmio_direct.
---
Changes in V3:
 - New patch.
---

 xen/arch/arm/include/asm/p2m.h          | 5 +++++
 xen/common/device-tree/dom0less-build.c | 2 +-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h
index ef98bc5f4d..010ce8c9eb 100644
--- a/xen/arch/arm/include/asm/p2m.h
+++ b/xen/arch/arm/include/asm/p2m.h
@@ -137,6 +137,11 @@ typedef enum {
     p2m_max_real_type,  /* Types after this won't be store in the p2m */
 } p2m_type_t;
 
+static inline p2m_type_t arch_dt_passthrough_p2m_type(void)
+{
+    return p2m_mmio_direct_dev;
+}
+
 /* We use bitmaps and mask to handle groups of types */
 #define p2m_to_mask(_t) (1UL << (_t))
 
diff --git a/xen/common/device-tree/dom0less-build.c b/xen/common/device-tree/dom0less-build.c
index 2600350a3c..495ef7b16a 100644
--- a/xen/common/device-tree/dom0less-build.c
+++ b/xen/common/device-tree/dom0less-build.c
@@ -185,7 +185,7 @@ static int __init handle_passthrough_prop(struct kernel_info *kinfo,
                                gaddr_to_gfn(gstart),
                                PFN_DOWN(size),
                                maddr_to_mfn(mstart),
-                               p2m_mmio_direct_dev);
+                               arch_dt_passthrough_p2m_type());
         if ( res < 0 )
         {
             printk(XENLOG_ERR
-- 
2.51.1



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v6 10/19] xen/riscv: implement function to map memory in guest p2m
Date: Mon, 24 Nov 2025 13:33:43 +0100
Message-ID: <16a8aee1c204c8bef9629b8a2d7dfbc37a028362.1763986955.git.oleksii.kurochko@gmail.com>
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Implement map_regions_p2mt() to map a region in the guest p2m with
a specific p2m type. The memory attributes will be derived from the
p2m type. This function is used in dom0less common
code.

To implement it, introduce:
- p2m_write_(un)lock() to ensure safe concurrent updates to the P2M.
  As part of this change, introduce p2m_tlb_flush_sync() and
  p2m_force_tlb_flush_sync().
- A stub for p2m_set_range() to map a range of GFNs to MFNs.
- p2m_insert_mapping().
- p2m_is_write_locked().

Drop guest_physmap_add_entry() and call map_regions_p2mt() directly
from guest_physmap_add_page(), making guest_physmap_add_entry()
unnecessary.

Signed-off-by: Oleksii Kurochko 
Acked-by: Jan Beulich 
---
Changes in V6:
 - Nothing changed. Only Rebase.
---
Changes in V5:
 - Put "p2m->need_flush = false;" before TLB flush.
 - Correct the comment above p2m_write_unlock().
 - Add Acked-by: Jan Beulich .
---
Changes in V4:
 - Update the comment above declaration of map_regions_p2mt():
   s/guest p2m/guest's hostp2m.
 - Add const for p2m_force_tlb_flush_sync()'s local variable `d`.
 - Stray 'w' in the comment inside p2m_write_unlock().
 - Drop p2m_insert_mapping() and leave only map_regions_p2mt() as it
   is just re-use insert_mapping().
 - Rename p2m_force_tlb_flush_sync() to p2m_tlb_flush().
 - Update prototype of p2m_is_write_locked() to return bool instead of
   int.
---
Changes in v3:
 - Introudce p2m_write_lock() and p2m_is_write_locked().
 - Introduce p2m_force_tlb_flush_sync() and p2m_flush_tlb() to flush TLBs
   after p2m table update.
 - Change an argument of p2m_insert_mapping() from struct domain *d to
   p2m_domain *p2m.
 - Drop guest_physmap_add_entry() and use map_regions_p2mt() to define
   guest_physmap_add_page().
 - Add declaration of map_regions_p2mt() to asm/p2m.h.
 - Rewrite commit message and subject.
 - Drop p2m_access_t related stuff.
 - Add defintion of  p2m_is_write_locked().
---
Changes in v2:
 - This changes were part of "xen/riscv: implement p2m mapping functionality".
   No additional signigicant changes were done.
---
 xen/arch/riscv/include/asm/p2m.h | 31 ++++++++++++-----
 xen/arch/riscv/p2m.c             | 60 ++++++++++++++++++++++++++++++++
 2 files changed, 82 insertions(+), 9 deletions(-)

diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h
index 1c89838408..9acd6a64a8 100644
--- a/xen/arch/riscv/include/asm/p2m.h
+++ b/xen/arch/riscv/include/asm/p2m.h
@@ -128,21 +128,22 @@ static inline int guest_physmap_mark_populate_on_demand(struct domain *d,
     return -EOPNOTSUPP;
 }
 
-static inline int guest_physmap_add_entry(struct domain *d,
-                                          gfn_t gfn, mfn_t mfn,
-                                          unsigned long page_order,
-                                          p2m_type_t t)
-{
-    BUG_ON("unimplemented");
-    return -EINVAL;
-}
+/*
+ * Map a region in the guest's hostp2m p2m with a specific p2m type.
+ * The memory attributes will be derived from the p2m type.
+ */
+int map_regions_p2mt(struct domain *d,
+                     gfn_t gfn,
+                     unsigned long nr,
+                     mfn_t mfn,
+                     p2m_type_t p2mt);
 
 /* Untyped version for RAM only, for compatibility */
 static inline int __must_check
 guest_physmap_add_page(struct domain *d, gfn_t gfn, mfn_t mfn,
                        unsigned int page_order)
 {
-    return guest_physmap_add_entry(d, gfn, mfn, page_order, p2m_ram_rw);
+    return map_regions_p2mt(d, gfn, BIT(page_order, UL), mfn, p2m_ram_rw);
 }
 
 static inline mfn_t gfn_to_mfn(struct domain *d, gfn_t gfn)
@@ -166,6 +167,18 @@ unsigned char get_max_supported_mode(void);
 
 int p2m_init(struct domain *d);
 
+static inline void p2m_write_lock(struct p2m_domain *p2m)
+{
+    write_lock(&p2m->lock);
+}
+
+void p2m_write_unlock(struct p2m_domain *p2m);
+
+static inline bool p2m_is_write_locked(struct p2m_domain *p2m)
+{
+    return rw_is_write_locked(&p2m->lock);
+}
+
 unsigned long construct_hgatp(const struct p2m_domain *p2m, uint16_t vmid);
 
 #endif /* ASM__RISCV__P2M_H */
diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c
index 7c2ce7ec18..c559cde13a 100644
--- a/xen/arch/riscv/p2m.c
+++ b/xen/arch/riscv/p2m.c
@@ -114,6 +114,41 @@ void __init guest_mm_init(void)
     local_hfence_gvma_all();
 }
 
+/*
+ * Force a synchronous P2M TLB flush.
+ *
+ * Must be called with the p2m lock held.
+ */
+static void p2m_tlb_flush(struct p2m_domain *p2m)
+{
+    const struct domain *d = p2m->domain;
+
+    ASSERT(p2m_is_write_locked(p2m));
+
+    p2m->need_flush = false;
+
+    sbi_remote_hfence_gvma(d->dirty_cpumask, 0, 0);
+}
+
+void p2m_tlb_flush_sync(struct p2m_domain *p2m)
+{
+    if ( p2m->need_flush )
+        p2m_tlb_flush(p2m);
+}
+
+/* Unlock the P2M and do a P2M TLB flush if necessary */
+void p2m_write_unlock(struct p2m_domain *p2m)
+{
+    /*
+     * The final flush is done with the P2M write lock taken to avoid
+     * someone else modifying the P2M before the TLB invalidation has
+     * completed.
+     */
+    p2m_tlb_flush_sync(p2m);
+
+    write_unlock(&p2m->lock);
+}
+
 static void clear_and_clean_page(struct page_info *page, bool clean_dcache)
 {
     void *p = __map_domain_page(page);
@@ -242,3 +277,28 @@ int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted)
 
     return rc;
 }
+
+static int p2m_set_range(struct p2m_domain *p2m,
+                         gfn_t sgfn,
+                         unsigned long nr,
+                         mfn_t smfn,
+                         p2m_type_t t)
+{
+    return -EOPNOTSUPP;
+}
+
+int map_regions_p2mt(struct domain *d,
+                     gfn_t gfn,
+                     unsigned long nr,
+                     mfn_t mfn,
+                     p2m_type_t p2mt)
+{
+    struct p2m_domain *p2m = p2m_get_hostp2m(d);
+    int rc;
+
+    p2m_write_lock(p2m);
+    rc = p2m_set_range(p2m, gfn, nr, mfn, p2mt);
+    p2m_write_unlock(p2m);
+
+    return rc;
+}
-- 
2.51.1



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        Mon, 24 Nov 2025 04:34:11 -0800 (PST)
From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis 
Subject: [PATCH v6 03/19] xen/riscv: introduce VMID allocation and manegement
Date: Mon, 24 Nov 2025 13:33:36 +0100
Message-ID: <7805662d530eca29c5b0d0afa05a3cd0aac963bb.1763986955.git.oleksii.kurochko@gmail.com>
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Current implementation is based on x86's way to allocate VMIDs:
  VMIDs partition the physical TLB. In the current implementation VMIDs are
  introduced to reduce the number of TLB flushes. Each time a guest-physical
  address space changes, instead of flushing the TLB, a new VMID is
  assigned. This reduces the number of TLB flushes to at most 1/#VMIDs.
  The biggest advantage is that hot parts of the hypervisor's code and data
  retain in the TLB.

  VMIDs are a hart-local resource.  As preemption of VMIDs is not possible,
  VMIDs are assigned in a round-robin scheme. To minimize the overhead of
  VMID invalidation, at the time of a TLB flush, VMIDs are tagged with a
  64-bit generation. Only on a generation overflow the code needs to
  invalidate all VMID information stored at the VCPUs with are run on the
  specific physical processor. When this overflow appears VMID usage is
  disabled to retain correctness.

Only minor changes are made compared to the x86 implementation.
These include using RISC-V-specific terminology, adding a check to ensure
the type used for storing the VMID has enough bits to hold VMIDLEN,
and introducing a new function vmidlen_detect() to clarify the VMIDLEN
value, rename stuff connected to VMID enable/disable to "VMID use
enable/disable".

Signed-off-by: Oleksii Kurochko 
---
Changes in V6:
 - Add information about VMID command line option to
   docs/misc/xen-command-line.pandoc.
 - Drop the call of local_hfence_gvma_all() from vmid_init() to avoid
   redundancy as this function is called now in pre_gstage_init().
   Also, update the comment in guest_mm_init() above local_hfence_gvma_all().
 - Add __ro_after_init in declaration of g_disabled.
 - Drop logging of function name in vmid_flush_hart() and drop full stop at
   the end of the message.
 - Add the check that vmid is used at the start of vmid_handle_enter().
 - Drop parentheses around (vmid->vmid == 1) in vmid_handle_enter().
 - Update BUILD_BUG_ON() in vmid_init as HGATP_VMID_SHIFT was dropped.
---
Changes in V5:
 - Rename opt_vmid_use_enabled with opt_vmid to be in sync with command line
   option.
 - Invert the expression for data->used = ... and swap "dis" and "en". Also,
   invert usage of data->used elsewhere.
 - s/vcpu_vmid_flush_vcpu/vmid_flush_vcpu.
 - Add prototypes to asm/vmid.h which could be used outside vmid.c.
 - Update the comment in vmidlen_detect(): instead of Section 3.7 ->
   Section "Physical Memory Protection".
 - Move vmid_init() call to pre_gstage_init().
---
Changes in V4:
 - s/guest's virtual/guest-physical in the comment inside vmid.c
   and in commit message.
 - Drop x86-related numbers in the comment about "Sketch of the Implementation".
 - s/__read_only/__ro_after_init in declaration of opt_vmid_enabled.
 - s/hart_vmid_generation/generation.
 - Update vmidlen_detect() to work with unsigned int type for vmid_bits
   variable.
 - Drop old variable im vmdidlen_detetct, it seems like there is no any reason
   to restore old value of hgatp with no guest running on a hart yet.
 - Update the comment above local_hfence_gvma_all() in vmidlen_detect().
 - s/max_availalbe_bits/max_available_bits.
 - use BITS_PER_BYTE, instead of "<< 3".
 - Add BUILD_BUILD_BUG_ON() instead run-time check that an amount of set bits
   can be held in vmid_data->max_vmid.
 - Apply changes from the patch "x86/HVM: polish hvm_asid_init() a little" here
   (changes connected to g_disabled) with the following minor changes:
   Update the printk() message to "VMIDs use is...".
   Rename g_disabled to g_vmid_used.
 - Rename member 'disabled' of vmid_data structure to used.
 - Use gstage_mode to properly detect VMIDLEN.
---
Changes in V3:
 - Reimplemnt VMID allocation similar to what x86 has implemented.
---
Changes in V2:
 - New patch.
---
 docs/misc/xen-command-line.pandoc   |   9 ++
 xen/arch/riscv/Makefile             |   1 +
 xen/arch/riscv/include/asm/domain.h |   6 +
 xen/arch/riscv/include/asm/vmid.h   |  14 +++
 xen/arch/riscv/p2m.c                |   7 +-
 xen/arch/riscv/vmid.c               | 170 ++++++++++++++++++++++++++++
 6 files changed, 205 insertions(+), 2 deletions(-)
 create mode 100644 xen/arch/riscv/include/asm/vmid.h
 create mode 100644 xen/arch/riscv/vmid.c

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index 34004ce282..6c4bfa3603 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -3096,3 +3096,12 @@ the hypervisor was compiled with `CONFIG_XSM` enabled.
 * `silo`: this will deny any unmediated communication channels between
   unprivileged VMs.  To choose this, the separated option in kconfig must also
   be enabled.
+
+### vmid (RISC-V)
+> `= `
+
+> Default: `true`
+
+Permit Xen to use Virtual Machine Identifiers. This is an optimisation which
+tags the TLB entries with an ID per vcpu. This allows for guest TLB flushes
+to be performed without the overhead of a complete TLB flush.
diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile
index 5a6f8c115d..1098b6d926 100644
--- a/xen/arch/riscv/Makefile
+++ b/xen/arch/riscv/Makefile
@@ -17,6 +17,7 @@ obj-y += smpboot.o
 obj-y += stubs.o
 obj-y += time.o
 obj-y += traps.o
+obj-y += vmid.o
 obj-y += vm_event.o
 
 $(TARGET): $(TARGET)-syms
diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h
index c3d965a559..aac1040658 100644
--- a/xen/arch/riscv/include/asm/domain.h
+++ b/xen/arch/riscv/include/asm/domain.h
@@ -5,6 +5,11 @@
 #include 
 #include 
 
+struct vcpu_vmid {
+    uint64_t generation;
+    uint16_t vmid;
+};
+
 struct hvm_domain
 {
     uint64_t              params[HVM_NR_PARAMS];
@@ -14,6 +19,7 @@ struct arch_vcpu_io {
 };
 
 struct arch_vcpu {
+    struct vcpu_vmid vmid;
 };
 
 struct arch_domain {
diff --git a/xen/arch/riscv/include/asm/vmid.h b/xen/arch/riscv/include/asm/vmid.h
new file mode 100644
index 0000000000..1c500c4aff
--- /dev/null
+++ b/xen/arch/riscv/include/asm/vmid.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef ASM_RISCV_VMID_H
+#define ASM_RISCV_VMID_H
+
+struct vcpu;
+struct vcpu_vmid;
+
+void vmid_init(void);
+bool vmid_handle_vmenter(struct vcpu_vmid *vmid);
+void vmid_flush_vcpu(struct vcpu *v);
+void vmid_flush_hart(void);
+
+#endif /* ASM_RISCV_VMID_H */
diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c
index 7bb0fc0ab4..a4c5b682ce 100644
--- a/xen/arch/riscv/p2m.c
+++ b/xen/arch/riscv/p2m.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 
 static struct gstage_mode_desc __ro_after_init max_gstage_mode = {
     .mode = HGATP_MODE_OFF,
@@ -72,9 +73,11 @@ void __init guest_mm_init(void)
 {
     gstage_mode_detect();
 
+    vmid_init();
+
     /*
-     * As gstage_mode_detect() is changing CSR_HGATP, it is necessary to flush
-     * guest TLB because:
+     * As gstage_mode_detect() and vmid_init() are changing CSR_HGATP, it is
+     * necessary to flush guest TLB because:
      *
      * From RISC-V spec:
      *   Speculative executions of the address-translation algorithm behave as
diff --git a/xen/arch/riscv/vmid.c b/xen/arch/riscv/vmid.c
new file mode 100644
index 0000000000..dc52d91650
--- /dev/null
+++ b/xen/arch/riscv/vmid.c
@@ -0,0 +1,170 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+/* Xen command-line option to enable VMIDs */
+static bool __ro_after_init opt_vmid = true;
+boolean_param("vmid", opt_vmid);
+
+/*
+ * VMIDs partition the physical TLB. In the current implementation VMIDs are
+ * introduced to reduce the number of TLB flushes. Each time a guest-physical
+ * address space changes, instead of flushing the TLB, a new VMID is
+ * assigned. This reduces the number of TLB flushes to at most 1/#VMIDs.
+ * The biggest advantage is that hot parts of the hypervisor's code and data
+ * retain in the TLB.
+ *
+ * Sketch of the Implementation:
+ *
+ * VMIDs are a hart-local resource.  As preemption of VMIDs is not possible,
+ * VMIDs are assigned in a round-robin scheme. To minimize the overhead of
+ * VMID invalidation, at the time of a TLB flush, VMIDs are tagged with a
+ * 64-bit generation. Only on a generation overflow the code needs to
+ * invalidate all VMID information stored at the VCPUs with are run on the
+ * specific physical processor. When this overflow appears VMID usage is
+ * disabled to retain correctness.
+ */
+
+/* Per-Hart VMID management. */
+struct vmid_data {
+   uint64_t generation;
+   uint16_t next_vmid;
+   uint16_t max_vmid;
+   bool used;
+};
+
+static DEFINE_PER_CPU(struct vmid_data, vmid_data);
+
+static unsigned int vmidlen_detect(void)
+{
+    unsigned int vmid_bits;
+    unsigned char gstage_mode = get_max_supported_mode();
+
+    /*
+     * According to the RISC-V Privileged Architecture Spec:
+     *   When MODE=Bare, guest physical addresses are equal to supervisor
+     *   physical addresses, and there is no further memory protection
+     *   for a guest virtual machine beyond the physical memory protection
+     *   scheme described in Section "Physical Memory Protection".
+     *   In this case, the remaining fields in hgatp must be set to zeros.
+     * Thereby it is necessary to set gstage_mode not equal to Bare.
+     */
+    ASSERT(gstage_mode != HGATP_MODE_OFF);
+    csr_write(CSR_HGATP,
+              MASK_INSR(gstage_mode, HGATP_MODE_MASK) | HGATP_VMID_MASK);
+    vmid_bits = MASK_EXTR(csr_read(CSR_HGATP), HGATP_VMID_MASK);
+    vmid_bits = flsl(vmid_bits);
+    csr_write(CSR_HGATP, _AC(0, UL));
+
+    /* local_hfence_gvma_all() will be called at the end of pre_gstage_init. */
+
+    return vmid_bits;
+}
+
+void vmid_init(void)
+{
+    static int8_t __ro_after_init g_vmid_used = -1;
+
+    unsigned int vmid_len = vmidlen_detect();
+    struct vmid_data *data = &this_cpu(vmid_data);
+
+    BUILD_BUG_ON(MASK_EXTR(HGATP_VMID_MASK, HGATP_VMID_MASK) >
+                 (BIT((sizeof(data->max_vmid) * BITS_PER_BYTE), UL) - 1));
+
+    data->max_vmid = BIT(vmid_len, U) - 1;
+    data->used = opt_vmid && (vmid_len > 1);
+
+    if ( g_vmid_used < 0 )
+    {
+        g_vmid_used = data->used;
+        printk("VMIDs use is %sabled\n", data->used ? "en" : "dis");
+    }
+    else if ( g_vmid_used != data->used )
+        printk("CPU%u: VMIDs use is %sabled\n", smp_processor_id(),
+               data->used ? "en" : "dis");
+
+    /* Zero indicates 'invalid generation', so we start the count at one. */
+    data->generation = 1;
+
+    /* Zero indicates 'VMIDs use disabled', so we start the count at one. */
+    data->next_vmid = 1;
+}
+
+void vmid_flush_vcpu(struct vcpu *v)
+{
+    write_atomic(&v->arch.vmid.generation, 0);
+}
+
+void vmid_flush_hart(void)
+{
+    struct vmid_data *data = &this_cpu(vmid_data);
+
+    if ( !data->used )
+        return;
+
+    if ( likely(++data->generation != 0) )
+        return;
+
+    /*
+     * VMID generations are 64 bit.  Overflow of generations never happens.
+     * For safety, we simply disable ASIDs, so correctness is established; it
+     * only runs a bit slower.
+     */
+    printk("VMID generation overrun. Disabling VMIDs\n");
+    data->used = false;
+}
+
+bool vmid_handle_vmenter(struct vcpu_vmid *vmid)
+{
+    struct vmid_data *data = &this_cpu(vmid_data);
+
+    if ( !data->used )
+        goto disabled;
+
+    /* Test if VCPU has valid VMID. */
+    if ( read_atomic(&vmid->generation) == data->generation )
+        return 0;
+
+    /* If there are no free VMIDs, need to go to a new generation. */
+    if ( unlikely(data->next_vmid > data->max_vmid) )
+    {
+        vmid_flush_hart();
+        data->next_vmid = 1;
+        if ( !data->used )
+            goto disabled;
+    }
+
+    /* Now guaranteed to be a free VMID. */
+    vmid->vmid = data->next_vmid++;
+    write_atomic(&vmid->generation, data->generation);
+
+    /*
+     * When we assign VMID 1, flush all TLB entries as we are starting a new
+     * generation, and all old VMID allocations are now stale.
+     */
+    return vmid->vmid == 1;
+
+ disabled:
+    vmid->vmid = 0;
+    return 0;
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * tab-width: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
-- 
2.51.1



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v6 12/19] xen/riscv: Implement p2m_free_subtree() and related helpers
Date: Mon, 24 Nov 2025 13:33:45 +0100
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This patch introduces a working implementation of p2m_free_subtree() for RISC-V
based on ARM's implementation of p2m_free_entry(), enabling proper cleanup
of page table entries in the P2M (physical-to-machine) mapping.

Only few things are changed:
- Introduce and use p2m_get_type() to get a type of p2m entry as
  RISC-V's PTE doesn't have enough space to store all necessary types so
  a type is stored outside PTE. But, at the moment, handle only types
  which fit into PTE's bits.

Key additions include:
- p2m_free_subtree(): Recursively frees page table entries at all levels. It
  handles both regular and superpage mappings and ensures that TLB entries
  are flushed before freeing intermediate tables.
- p2m_put_page() and helpers:
  - p2m_put_4k_page(): Clears GFN from xenheap pages if applicable.
  - p2m_put_2m_superpage(): Releases foreign page references in a 2MB
    superpage.
  - p2m_get_type(): Extracts the stored p2m_type from the PTE bits.
- p2m_free_page(): Returns a page to a domain's freelist.
- Introduce p2m_is_foreign() and connected to it things.

Signed-off-by: Oleksii Kurochko 
---
Changes in V6:
 - Use PTE_RSW instead of 0x300 in the definition of P2M_TYPE_PTE_BITS_MASK.
 - Optimize a if-condtion of p2m_free_subtree() at the start
   of the function to avoid unnessary checks.
 - Change P2M_PAGETABLE_ENTRIES(1) to PAGETABLE_ENTRIES in p2m_put_2m_superpage() as it is expected be the same and in the 
 cae of PAGETABLE_ENTRIES it won't need to update prototypes because
 of one macro.
 - Drop the comment above p2m_put_4k_page() and p2m_put_2m_superpage().
 - Move introduction of pte_is_superpage() to "xen/riscv: Implement superpage splitting for p2m mappings" as it is starting to be used there.
---
Changes in V5:
 - Rewrite the comment inside p2m_put_foreign_page().
 - s/assert_failed/ASSERT_UNREACHABLE.
 - Use p2mt variable when p2m_free_subtree() is called intead of
   p2m_get_type(entry).
 - Update the commit message: drop info about defintion of XEN_PT_ENTRIES
 - Drop also defintion of XEN_PT_ENTRIES as the macro isn't used anymore.
 - Drop ACCESS_ONCE() for paging_free_page() as it is redundant in the
   case when a code is wrapped by a spinlock.
---
Changes in V4:
 - Stray blanks.
 - Implement arch_flush_tlb_mask() to make the comment in p2m_put_foreign()
   clear and explicit.
 - Update the comment above p2m_is_ram() in p2m_put_4k_page() with an explanation
   why p2m_is_ram() is used.
 - Add a type check inside p2m_put_2m_superpage().
 - Swap two conditions around in p2m_free_subtree():
     if ( (level == 0) || pte_is_superpage(entry, level) )
 - Add ASSERT() inside p2m_free_subtree() to check that level is <= 2; otherwise,
   it could consume a lot of time and big memory usage because of recursion.
 - Drop page_list_del() before p2m_free_page() as page_list_del() is called
   inside p2m_free_page().
 - Update p2m_freelist's total_pages when a page is added to p2m_freelist in
   paging_free_page().
 - Introduce P2M_SUPPORTED_LEVEL_MAPPING and use it in ASSERTs() which check
   supported level.
 - Use P2M_PAGETABLE_ENTRIES as XEN_PT_ENTRIES
   doesn't takeinto  into acount that G stage root page table is
   extended by 2 bits.
 - Update prototype of p2m_put_page() to not have unnecessary changes later.
---
Changes in V3:
 - Use p2m_tlb_flush_sync(p2m) instead of p2m_force_tlb_flush_sync() in
   p2m_free_subtree().
 - Drop p2m_is_valid() implementation as pte_is_valid() is going to be used
   instead.
 - Drop p2m_is_superpage() and introduce pte_is_superpage() instead.
 - s/p2m_free_entry/p2m_free_subtree.
 - s/p2m_type_radix_get/p2m_get_type.
 - Update implementation of p2m_get_type() to get type both from PTE bits,
   other cases will be covered in a separate patch. This requires an
   introduction of new P2M_TYPE_PTE_BITS_MASK macros.
 - Drop p2m argument of p2m_get_type() as it isn't needed anymore.
 - Put cheapest checks first in p2m_is_superpage().
 - Use switch() in p2m_put_page().
 - Update the comment in p2m_put_foreign_page().
 - Code style fixes.
 - Move p2m_foreign stuff to this commit.
 - Drop p2m argument of p2m_put_page() as itsn't used anymore.
---
Changes in V2:
 - New patch. It was a part of 2ma big patch "xen/riscv: implement p2m mapping
   functionality" which was splitted to smaller.
 - s/p2m_is_superpage/p2me_is_superpage.
---
 xen/arch/riscv/include/asm/flushtlb.h |   6 +-
 xen/arch/riscv/include/asm/p2m.h      |  15 +++
 xen/arch/riscv/include/asm/paging.h   |   2 +
 xen/arch/riscv/p2m.c                  | 148 +++++++++++++++++++++++++-
 xen/arch/riscv/paging.c               |   8 ++
 xen/arch/riscv/stubs.c                |   5 -
 6 files changed, 176 insertions(+), 8 deletions(-)

diff --git a/xen/arch/riscv/include/asm/flushtlb.h b/xen/arch/riscv/include/asm/flushtlb.h
index e70badae0c..ab32311568 100644
--- a/xen/arch/riscv/include/asm/flushtlb.h
+++ b/xen/arch/riscv/include/asm/flushtlb.h
@@ -41,8 +41,10 @@ static inline void page_set_tlbflush_timestamp(struct page_info *page)
     BUG_ON("unimplemented");
 }
 
-/* Flush specified CPUs' TLBs */
-void arch_flush_tlb_mask(const cpumask_t *mask);
+static inline void arch_flush_tlb_mask(const cpumask_t *mask)
+{
+    sbi_remote_hfence_gvma(mask, 0, 0);
+}
 
 #endif /* ASM__RISCV__FLUSHTLB_H */
 
diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h
index fa55d8a3bc..b48693a2b4 100644
--- a/xen/arch/riscv/include/asm/p2m.h
+++ b/xen/arch/riscv/include/asm/p2m.h
@@ -111,6 +111,8 @@ typedef enum {
     p2m_mmio_direct_io, /* Read/write mapping of genuine Device MMIO area,
                            PTE_PBMT_IO will be used for such mappings */
     p2m_ext_storage,    /* Following types'll be stored outsude PTE bits: */
+    p2m_map_foreign_rw, /* Read/write RAM pages from foreign domain */
+    p2m_map_foreign_ro, /* Read-only RAM pages from foreign domain */
 
     /* Sentinel — not a real type, just a marker for comparison */
     p2m_first_external = p2m_ext_storage,
@@ -121,15 +123,28 @@ static inline p2m_type_t arch_dt_passthrough_p2m_type(void)
     return p2m_mmio_direct_io;
 }
 
+/*
+ * Bits 8 and 9 are reserved for use by supervisor software;
+ * the implementation shall ignore this field.
+ * We are going to use to save in these bits frequently used types to avoid
+ * get/set of a type from radix tree.
+ */
+#define P2M_TYPE_PTE_BITS_MASK PTE_RSW
+
 /* We use bitmaps and mask to handle groups of types */
 #define p2m_to_mask(t) BIT(t, UL)
 
 /* RAM types, which map to real machine frames */
 #define P2M_RAM_TYPES (p2m_to_mask(p2m_ram_rw))
 
+/* Foreign mappings types */
+#define P2M_FOREIGN_TYPES (p2m_to_mask(p2m_map_foreign_rw) | \
+                           p2m_to_mask(p2m_map_foreign_ro))
+
 /* Useful predicates */
 #define p2m_is_ram(t) (p2m_to_mask(t) & P2M_RAM_TYPES)
 #define p2m_is_any_ram(t) (p2m_to_mask(t) & P2M_RAM_TYPES)
+#define p2m_is_foreign(t) (p2m_to_mask(t) & P2M_FOREIGN_TYPES)
 
 #include 
 
diff --git a/xen/arch/riscv/include/asm/paging.h b/xen/arch/riscv/include/asm/paging.h
index 01be45528f..fe462be223 100644
--- a/xen/arch/riscv/include/asm/paging.h
+++ b/xen/arch/riscv/include/asm/paging.h
@@ -13,4 +13,6 @@ int paging_freelist_adjust(struct domain *d, unsigned long pages,
 int paging_ret_to_domheap(struct domain *d, unsigned int nr_pages);
 int paging_refill_from_domheap(struct domain *d, unsigned int nr_pages);
 
+void paging_free_page(struct domain *d, struct page_info *pg);
+
 #endif /* ASM_RISCV_PAGING_H */
diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c
index c21873b2ac..f8af73c9d8 100644
--- a/xen/arch/riscv/p2m.c
+++ b/xen/arch/riscv/p2m.c
@@ -360,6 +360,16 @@ int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted)
     return rc;
 }
 
+static p2m_type_t p2m_get_type(const pte_t pte)
+{
+    p2m_type_t type = MASK_EXTR(pte.pte, P2M_TYPE_PTE_BITS_MASK);
+
+    if ( type == p2m_ext_storage )
+        panic("unimplemented\n");
+
+    return type;
+}
+
 static inline void p2m_write_pte(pte_t *p, pte_t pte, bool clean_cache)
 {
     write_pte(p, pte);
@@ -416,11 +426,147 @@ static int p2m_next_level(struct p2m_domain *p2m, bool alloc_tbl,
     return P2M_TABLE_MAP_NONE;
 }
 
+static void p2m_put_foreign_page(struct page_info *pg)
+{
+    /*
+     * It’s safe to call put_page() here because arch_flush_tlb_mask()
+     * will be invoked if the page is reallocated, which will trigger a
+     * flush of the guest TLBs.
+     */
+    put_page(pg);
+}
+
+static void p2m_put_4k_page(mfn_t mfn, p2m_type_t type)
+{
+    /* TODO: Handle other p2m types */
+
+    if ( p2m_is_foreign(type) )
+    {
+        ASSERT(mfn_valid(mfn));
+        p2m_put_foreign_page(mfn_to_page(mfn));
+    }
+}
+
+static void p2m_put_2m_superpage(mfn_t mfn, p2m_type_t type)
+{
+    struct page_info *pg;
+    unsigned int i;
+
+    /* TODO: Handle other p2m types */
+    if ( !p2m_is_foreign(type) )
+        return;
+
+    ASSERT(mfn_valid(mfn));
+
+    pg = mfn_to_page(mfn);
+
+    /*
+     * PAGETABLE_ENTRIES is used instead of P2M_PAGETABLE_ENTRIES(1) because
+     * they are expected to be identical (this is verified in calc_offset()).
+     * This avoids having to pass p2m_domain here and throughout the call stack
+     * above solely for the sake of one macro.
+     */
+    for ( i = 0; i < PAGETABLE_ENTRIES; i++, pg++ )
+        p2m_put_foreign_page(pg);
+}
+
+static void p2m_put_page(const pte_t pte, unsigned int level, p2m_type_t p2mt)
+{
+    mfn_t mfn = pte_get_mfn(pte);
+
+    ASSERT(pte_is_valid(pte));
+
+    /*
+     * TODO: Currently we don't handle level 2 super-page, Xen is not
+     * preemptible and therefore some work is needed to handle such
+     * superpages, for which at some point Xen might end up freeing memory
+     * and therefore for such a big mapping it could end up in a very long
+     * operation.
+     */
+    switch ( level )
+    {
+    case 1:
+        return p2m_put_2m_superpage(mfn, p2mt);
+
+    case 0:
+        return p2m_put_4k_page(mfn, p2mt);
+
+    default:
+        ASSERT_UNREACHABLE();
+        break;
+    }
+}
+
+static void p2m_free_page(struct p2m_domain *p2m, struct page_info *pg)
+{
+    page_list_del(pg, &p2m->pages);
+
+    paging_free_page(p2m->domain, pg);
+}
+
 /* Free pte sub-tree behind an entry */
 static void p2m_free_subtree(struct p2m_domain *p2m,
                              pte_t entry, unsigned int level)
 {
-    panic("%s: hasn't been implemented yet\n", __func__);
+    unsigned int i;
+    pte_t *table;
+    mfn_t mfn;
+    struct page_info *pg;
+
+    /*
+     * Check if the level is valid: only 4K - 2M - 1G mappings are supported.
+     * To support levels > 2, the implementation of p2m_free_subtree() would
+     * need to be updated, as the current recursive approach could consume
+     * excessive time and memory.
+     */
+    ASSERT(level <= P2M_MAX_SUPPORTED_LEVEL_MAPPING);
+
+    /* Nothing to do if the entry is invalid. */
+    if ( !pte_is_valid(entry) )
+        return;
+
+    if ( pte_is_mapping(entry) )
+    {
+        p2m_type_t p2mt = p2m_get_type(entry);
+
+#ifdef CONFIG_IOREQ_SERVER
+        /*
+         * If this gets called then either the entry was replaced by an entry
+         * with a different base (valid case) or the shattering of a superpage
+         * has failed (error case).
+         * So, at worst, the spurious mapcache invalidation might be sent.
+         */
+        if ( p2m_is_ram(p2mt) &&
+             domain_has_ioreq_server(p2m->domain) )
+            ioreq_request_mapcache_invalidate(p2m->domain);
+#endif
+
+        p2m_put_page(entry, level, p2mt);
+
+        return;
+    }
+
+    table = map_domain_page(pte_get_mfn(entry));
+
+    for ( i = 0; i < P2M_PAGETABLE_ENTRIES(p2m, level); i++ )
+        p2m_free_subtree(p2m, table[i], level - 1);
+
+    unmap_domain_page(table);
+
+    /*
+     * Make sure all the references in the TLB have been removed before
+     * freing the intermediate page table.
+     * XXX: Should we defer the free of the page table to avoid the
+     * flush?
+     */
+    p2m_tlb_flush_sync(p2m);
+
+    mfn = pte_get_mfn(entry);
+    ASSERT(mfn_valid(mfn));
+
+    pg = mfn_to_page(mfn);
+
+    p2m_free_page(p2m, pg);
 }
 
 /* Insert an entry in the p2m */
diff --git a/xen/arch/riscv/paging.c b/xen/arch/riscv/paging.c
index d401ddc34e..09631c9894 100644
--- a/xen/arch/riscv/paging.c
+++ b/xen/arch/riscv/paging.c
@@ -109,6 +109,14 @@ int paging_ret_to_domheap(struct domain *d, unsigned int nr_pages)
     return 0;
 }
 
+void paging_free_page(struct domain *d, struct page_info *pg)
+{
+    spin_lock(&d->arch.paging.lock);
+    page_list_add_tail(pg, &d->arch.paging.freelist);
+    d->arch.paging.total_pages++;
+    spin_unlock(&d->arch.paging.lock);
+}
+
 /* Domain paging struct initialization. */
 int paging_domain_init(struct domain *d)
 {
diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c
index 340ed3cd6c..115dc1a9ae 100644
--- a/xen/arch/riscv/stubs.c
+++ b/xen/arch/riscv/stubs.c
@@ -65,11 +65,6 @@ int arch_monitor_domctl_event(struct domain *d,
 
 /* smp.c */
 
-void arch_flush_tlb_mask(const cpumask_t *mask)
-{
-    BUG_ON("unimplemented");
-}
-
 void smp_send_event_check_mask(const cpumask_t *mask)
 {
     BUG_ON("unimplemented");
-- 
2.51.1



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v6 11/19] xen/riscv: implement p2m_set_range()
Date: Mon, 24 Nov 2025 13:33:44 +0100
Message-ID: <5f2812bb3b82ba1f9178eb00f68a85388f862f09.1763986955.git.oleksii.kurochko@gmail.com>
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This patch introduces p2m_set_range() and its core helper p2m_set_entry() for
RISC-V, based loosely on the Arm implementation, with several RISC-V-specific
modifications.

The main changes are:
- Simplification of Break-Before-Make (BBM) approach as according to RISC-V
  spec:
    It is permitted for multiple address-translation cache entries to co-exist
    for the same address. This represents the fact that in a conventional
    TLB hierarchy, it is possible for multiple entries to match a single
    address if, for example, a page is upgraded to a superpage without first
    clearing the original non-leaf PTE’s valid bit and executing an SFENCE.VMA
    with rs1=x0, or if multiple TLBs exist in parallel at a given level of the
    hierarchy. In this case, just as if an SFENCE.VMA is not executed between
    a write to the memory-management tables and subsequent implicit read of the
    same address: it is unpredictable whether the old non-leaf PTE or the new
    leaf PTE is used, but the behavior is otherwise well defined.
  In contrast to the Arm architecture, where BBM is mandatory and failing to
  use it in some cases can lead to CPU instability, RISC-V guarantees
  stability, and the behavior remains safe — though unpredictable in terms of
  which translation will be used.
- Unlike Arm, the valid bit is not repurposed for other uses in this
  implementation. Instead, entry validity is determined based solely on P2M
  PTE's valid bit.

The main functionality is in p2m_set_entry(), which handles mappings aligned
to page table block entries (e.g., 1GB, 2MB, or 4KB with 4KB granularity).

p2m_set_range() breaks a region down into block-aligned mappings and calls
p2m_set_entry() accordingly.

Stub implementations (to be completed later) include:
- p2m_free_subtree()
- p2m_next_level()
- p2m_pte_from_mfn()

Note: Support for shattering block entries is not implemented in this
patch and will be added separately.

Additionally, some straightforward helper functions are now implemented:
- p2m_write_pte()
- p2m_remove_pte()
- p2m_get_root_pointer()

Signed-off-by: Oleksii Kurochko 
---
Changes in V6:
 - Drop the last paragraph in the comment above P2M_LEVEL_ORDER().
 - Update prototype of calc_offset(..., vaddr_t va) to
   calc_offset(..., paddr_t gpa).
 - Rename root_table_indx to idx.
 - s/clean_pte/clean_cache.
 - Fix identations.
 - Introduce P2M_MAX_SUPPORTED_LEVEL_MAPPING to use it instead of magic constant.
 - Rename GFN_MASK to P2M_TABLE_OFFSET
 - Update the implementation of calc_offset() and get_root_pointer().
 - s/P2M_DECLARE_OFFSETS/P2M_BUILD_LEVEL_OFFSETS.
 - Add BUG_ON() inside P2M_BUILD_LEVEL_OFFSETS() to be sure that
   actual root level isn't higer then maximum possible.
 - Move gstage_mode and gstage_level inside p2m_domain structure.
---
Changes in V5:
 - Update the comment above p2m_get_root_pointer().
 - Fix an identation for p2m_set_entry()'s arguments.
 - Update the comment in p2m_set_entry() where lookup is happening.
 - Drop part of the comment above p2m_set_entry() as it is not really
   needed anymore.
 - Introduce P2M_DECLARE_OFFSETS() to use it insetead of
   DECLARE_OFFSETS() as the latter could have an issue with P2M code.
 - Update p2m_get_root_pointer() to work only with P2M root properties.
 - Update the comment inside in p2m_set_entry() for the case when
   p2m_next_level() returns P2M_TABLE_MAP_{NONE,NOMEM}.
 - Simplify a little bit a condition when p2m_free_subtree() by removing
   a case when removing && mfn(0) are checked explicitly.
---
Changes in V4:
 - Introduce gstage_root_level and use it for defintion of P2M_ROOT_LEVEL.
 - Introduce P2M_LEVEL_ORDER() macros and P2M_PAGETABLE_ENTRIES().
 - Add the TODO comment in p2m_write_pte() about possible perfomance
   optimization.
 - Use compound literal for `pte` variable inside p2m_clean_pte().
 - Fix the comment above p2m_next_level().
 - Update ASSERT() inside p2m_set_entry() and leave only a check of a
   target as p2m_mapping_order() that page_order will be correctly
   aligned.
 - Update the comment above declaration of `removing_mapping` in
   p2m_set_entry().
 - Stray blanks.
 - Handle possibly overflow of an amount of unmapped GFNs in case of
   some failute in p2m_set_range().
 - Handle a case when MFN is 0 and removing of such MFN is happening in
   p2m_set_entry.
 - Fix p2m_get_root_pointer() to return correct pointer to root page table.
---
Changes in V3:
 - Drop p2m_access_t connected stuff as it isn't going to be used, at least
   now.
 - Move defintion of P2M_ROOT_ORDER and P2M_ROOT_PAGES to earlier patches.
 - Update the comment above lowest_mapped_gfn declaration.
 - Update the comment above p2m_get_root_pointer(): s/"...ofset of the root
   table"/"...ofset into root table".
 - s/p2m_remove_pte/p2m_clean_pte.
 - Use plain 0 instead of 0x00 in p2m_clean_pte().
 - s/p2m_entry_from_mfn/p2m_pte_from_mfn.
 - s/GUEST_TABLE_*/P2M_TABLE_*.
 - Update the comment above p2m_next_level(): "GFN entry" -> "corresponding
   the entry corresponding to the GFN".
 - s/__p2m_set_entry/_p2m_set_entry.
 - drop "s" for sgfn and smfn prefixes of _p2m_set_entry()'s arguments
   as this function work only with one GFN and one MFN.
 - Return correct return code when p2m_next_level() faild in _p2m_set_entry(),
   also drop "else" and just handle case (rc != P2M_TABLE_NORMAL) separately.
 - Code style fixes.
 - Use unsigned int for "order" in p2m_set_entry().
 - s/p2m_set_entry/p2m_free_subtree.
 - Update ASSERT() in __p2m_set_enty() to check that page_order is propertly
   aligned.
 - Return -EACCES instead of -ENOMEM in the chase when domain is dying and
   someone called p2m_set_entry.
 - s/p2m_set_entry/p2m_set_range.
 - s/__p2m_set_entry/p2m_set_entry
 - s/p2me_is_valid/p2m_is_valid()
 - Return a number of successfully mapped GFNs in case if not all were mapped
   in p2m_set_range().
 - Use BIT(order, UL) instead of 1 << order.
 - Drop IOMMU flushing code from p2m_set_entry().
 - set p2m->need_flush=true when entry in p2m_set_entry() is changed.
 - Introduce p2m_mapping_order() to support superpages.
 - Drop p2m_is_valid() and use pte_is_valid() instead as there is no tricks
   with copying of valid bit anymore.
 - Update p2m_pte_from_mfn() prototype: drop p2m argument.
---
Changes in V2:
 - New patch. It was a part of a big patch "xen/riscv: implement p2m mapping
   functionality" which was splitted to smaller.
 - Update the way when p2m TLB is flushed:
 - RISC-V does't require BBM so there is no need to remove PTE before making
   new so drop 'if /*pte_is_valid(orig_pte) */' and remove PTE only removing
   has been requested.
 - Drop p2m->need_flush |= !!pte_is_valid(orig_pte); for the case when
   PTE's removing is happening as RISC-V could cache invalid PTE and thereby
   it requires to do a flush each time and it doesn't matter if PTE is valid
   or not at the moment when PTE removing is happening.
 - Drop a check if PTE is valid in case of PTE is modified as it was mentioned
   above as BBM isn't required so TLB flushing could be defered and there is
   no need to do it before modifying of PTE.
 - Drop p2m->need_flush as it seems like it will be always true.
 - Drop foreign mapping things as it isn't necessary for RISC-V right now.
 - s/p2m_is_valid/p2me_is_valid.
 - Move definition and initalization of p2m->{max_mapped_gfn,lowest_mapped_gfn}
   to this patch.
---
 xen/arch/riscv/include/asm/p2m.h |  38 ++++
 xen/arch/riscv/p2m.c             | 326 ++++++++++++++++++++++++++++++-
 2 files changed, 363 insertions(+), 1 deletion(-)

diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h
index 9acd6a64a8..fa55d8a3bc 100644
--- a/xen/arch/riscv/include/asm/p2m.h
+++ b/xen/arch/riscv/include/asm/p2m.h
@@ -8,10 +8,38 @@
 #include 
 #include 
 
+#include 
 #include 
 
 #define P2M_ROOT_ORDER  (ilog2(GSTAGE_ROOT_PAGE_TABLE_SIZE) - PAGE_SHIFT)
 #define P2M_ROOT_PAGES  BIT(P2M_ROOT_ORDER, U)
+#define P2M_ROOT_LEVEL(p2m) ((p2m)->mode.paging_levels)
+
+/*
+ * According to the RISC-V spec:
+ *   When hgatp.MODE specifies a translation scheme of Sv32x4, Sv39x4, Sv48x4,
+ *   or Sv57x4, G-stage address translation is a variation on the usual
+ *   page-based virtual address translation scheme of Sv32, Sv39, Sv48, or
+ *   Sv57, respectively. In each case, the size of the incoming address is
+ *   widened by 2 bits (to 34, 41, 50, or 59 bits).
+ *
+ * P2M_LEVEL_ORDER(lvl) defines the bit position in the GFN from which
+ * the index for this level of the P2M page table starts. The extra 2
+ * bits added by the "x4" schemes only affect the root page table width.
+ *
+ * Therefore, this macro can safely reuse XEN_PT_LEVEL_ORDER() for all
+ * levels: the extra 2 bits do not change the indices of lower levels.
+ */
+#define P2M_LEVEL_ORDER(lvl) XEN_PT_LEVEL_ORDER(lvl)
+
+#define P2M_ROOT_EXTRA_BITS(p2m, lvl) (2 * ((lvl) == P2M_ROOT_LEVEL(p2m)))
+
+#define P2M_PAGETABLE_ENTRIES(p2m, lvl) \
+    (BIT(PAGETABLE_ORDER + P2M_ROOT_EXTRA_BITS(p2m, lvl), UL))
+
+#define P2M_TABLE_OFFSET(p2m, lvl) (P2M_PAGETABLE_ENTRIES(p2m, lvl) - 1UL)
+
+#define P2M_GFN_LEVEL_SHIFT(lvl) (P2M_LEVEL_ORDER(lvl) + PAGE_SHIFT)
 
 #define paddr_bits PADDR_BITS
 
@@ -58,6 +86,16 @@ struct p2m_domain {
      * when a page is needed to be fully cleared and cleaned.
      */
     bool clean_dcache;
+
+    /* Highest guest frame that's ever been mapped in the p2m */
+    gfn_t max_mapped_gfn;
+
+    /*
+     * Lowest mapped gfn in the p2m. When releasing mapped gfn's in a
+     * preemptible manner this is updated to track where to resume
+     * the search. Apart from during teardown this can only decrease.
+     */
+    gfn_t lowest_mapped_gfn;
 };
 
 /*
diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c
index c559cde13a..c21873b2ac 100644
--- a/xen/arch/riscv/p2m.c
+++ b/xen/arch/riscv/p2m.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -17,6 +18,13 @@
 #include 
 #include 
 
+/*
+ * At the moment, only 4K, 2M, and 1G mappings are supported for G-stage
+ * translation. Therefore, the maximum supported page-table level is 2,
+ * which corresponds to 1G mappings.
+ */
+#define P2M_MAX_SUPPORTED_LEVEL_MAPPING _AC(2, U)
+
 static struct gstage_mode_desc __ro_after_init max_gstage_mode = {
     .mode = HGATP_MODE_OFF,
     .paging_levels = 0,
@@ -28,6 +36,77 @@ unsigned char get_max_supported_mode(void)
     return max_gstage_mode.mode;
 }
 
+static inline unsigned int calc_offset(const struct p2m_domain *p2m,
+                                       const unsigned int lvl,
+                                       const paddr_t gpa)
+{
+    unsigned int off = (gpa >> P2M_GFN_LEVEL_SHIFT(lvl)) &
+                       P2M_TABLE_OFFSET(p2m, lvl);
+
+    /*
+     * For P2M_ROOT_LEVEL, `offset` ranges from 0 to 2047, since the root
+     * page table spans 4 consecutive 4KB pages.
+     * We want to return an index within one of these 4 pages.
+     * The specific page to use is determined by `p2m_get_root_pointer()`.
+     *
+     * Example: if `offset == 512`:
+     *  - A single 4KB page holds 512 entries.
+     *  - Therefore, entry 512 corresponds to index 0 of the second page.
+     *
+     * At all other levels, only one page is allocated, and `offset` is
+     * always in the range 0 to 511, since the VPN is 9 bits long.
+     */
+    return off & (PAGETABLE_ENTRIES - 1);
+}
+
+#define P2M_MAX_ROOT_LEVEL 5
+
+#define P2M_BUILD_LEVEL_OFFSETS(p2m, var, addr) \
+    unsigned int var[P2M_MAX_ROOT_LEVEL] = {-1}; \
+    BUG_ON(P2M_ROOT_LEVEL(p2m) >= P2M_MAX_ROOT_LEVEL); \
+    for ( unsigned int i = 0; i <= P2M_ROOT_LEVEL(p2m); i++ ) \
+        var[i] = calc_offset(p2m, i, addr);
+
+/*
+ * Map one of the four root pages of the P2M root page table.
+ *
+ * The P2M root page table is larger than normal (16KB instead of 4KB),
+ * so it is allocated as four consecutive 4KB pages. This function selects
+ * the appropriate 4KB page based on the given GFN and returns a mapping
+ * to it.
+ *
+ * The caller is responsible for unmapping the page after use.
+ *
+ * Returns NULL if the calculated offset into the root table is invalid.
+ */
+static pte_t *p2m_get_root_pointer(struct p2m_domain *p2m, gfn_t gfn)
+{
+    unsigned long idx;
+    unsigned long root_level = P2M_ROOT_LEVEL(p2m);
+
+    idx = gfn_x(gfn) >> P2M_LEVEL_ORDER(root_level);
+    if ( idx >= P2M_PAGETABLE_ENTRIES(p2m, root_level) )
+        return NULL;
+
+    /*
+     * The P2M root page table is extended by 2 bits, making its size 16KB
+     * (instead of 4KB for non-root page tables). Therefore, p2m->root is
+     * allocated as four consecutive 4KB pages (since alloc_domheap_pages()
+     * only allocates 4KB pages).
+     *
+     * Initially, `idx` is derived directly from `gfn`.
+     * To locate the correct entry within a single 4KB page,
+     * we rescale the offset so it falls within one of the 4 pages.
+     *
+     * Example: if `idx == 512`
+     * - A 4KB page holds 512 entries.
+     * - Thus, entry 512 corresponds to index 0 of the second page.
+     */
+    idx /= PAGETABLE_ENTRIES;
+
+    return __map_domain_page(p2m->root + idx);
+}
+
 static void __init gstage_mode_detect(void)
 {
     static const struct gstage_mode_desc modes[] __initconst = {
@@ -232,6 +311,9 @@ int p2m_init(struct domain *d)
     rwlock_init(&p2m->lock);
     INIT_PAGE_LIST_HEAD(&p2m->pages);
 
+    p2m->max_mapped_gfn = _gfn(0);
+    p2m->lowest_mapped_gfn = _gfn(ULONG_MAX);
+
     /*
      * Currently, the infrastructure required to enable CONFIG_HAS_PASSTHROUGH
      * is not ready for RISC-V support.
@@ -278,13 +360,255 @@ int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted)
     return rc;
 }
 
+static inline void p2m_write_pte(pte_t *p, pte_t pte, bool clean_cache)
+{
+    write_pte(p, pte);
+
+    /*
+     * TODO: if multiple adjacent PTEs are written without releasing
+     *       the lock, this then redundant cache flushing can be a
+     *       performance issue.
+     */
+    if ( clean_cache )
+        clean_dcache_va_range(p, sizeof(*p));
+}
+
+static inline void p2m_clean_pte(pte_t *p, bool clean_cache)
+{
+    pte_t pte = { .pte = 0 };
+
+    p2m_write_pte(p, pte, clean_cache);
+}
+
+static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t)
+{
+    panic("%s: hasn't been implemented yet\n", __func__);
+
+    return (pte_t) { .pte = 0 };
+}
+
+#define P2M_TABLE_MAP_NONE 0
+#define P2M_TABLE_MAP_NOMEM 1
+#define P2M_TABLE_SUPER_PAGE 2
+#define P2M_TABLE_NORMAL 3
+
+/*
+ * Take the currently mapped table, find the entry corresponding to the GFN,
+ * and map the next-level table if available. The previous table will be
+ * unmapped if the next level was mapped (e.g., when P2M_TABLE_NORMAL is
+ * returned).
+ *
+ * `alloc_tbl` parameter indicates whether intermediate tables should
+ * be allocated when not present.
+ *
+ * Return values:
+ *  P2M_TABLE_MAP_NONE: a table allocation isn't permitted.
+ *  P2M_TABLE_MAP_NOMEM: allocating a new page failed.
+ *  P2M_TABLE_SUPER_PAGE: next level or leaf mapped normally.
+ *  P2M_TABLE_NORMAL: The next entry points to a superpage.
+ */
+static int p2m_next_level(struct p2m_domain *p2m, bool alloc_tbl,
+                          unsigned int level, pte_t **table,
+                          unsigned int offset)
+{
+    panic("%s: hasn't been implemented yet\n", __func__);
+
+    return P2M_TABLE_MAP_NONE;
+}
+
+/* Free pte sub-tree behind an entry */
+static void p2m_free_subtree(struct p2m_domain *p2m,
+                             pte_t entry, unsigned int level)
+{
+    panic("%s: hasn't been implemented yet\n", __func__);
+}
+
+/* Insert an entry in the p2m */
+static int p2m_set_entry(struct p2m_domain *p2m,
+                         gfn_t gfn,
+                         unsigned long page_order,
+                         mfn_t mfn,
+                         p2m_type_t t)
+{
+    unsigned int level;
+    unsigned int target = page_order / PAGETABLE_ORDER;
+    pte_t *entry, *table, orig_pte;
+    int rc;
+    /*
+     * A mapping is removed only if the MFN is explicitly set to INVALID_MFN.
+     * Other MFNs that are considered invalid by mfn_valid() (e.g., MMIO)
+     * are still allowed.
+     */
+    bool removing_mapping = mfn_eq(mfn, INVALID_MFN);
+    P2M_BUILD_LEVEL_OFFSETS(p2m, offsets, gfn_to_gaddr(gfn));
+
+    ASSERT(p2m_is_write_locked(p2m));
+
+    /*
+     * Check if the level target is valid: we only support
+     * 4K - 2M - 1G mapping.
+     */
+    ASSERT(target <= P2M_MAX_SUPPORTED_LEVEL_MAPPING);
+
+    table = p2m_get_root_pointer(p2m, gfn);
+    if ( !table )
+        return -EINVAL;
+
+    for ( level = P2M_ROOT_LEVEL(p2m); level > target; level-- )
+    {
+        /*
+         * Don't try to allocate intermediate page table if the mapping
+         * is about to be removed.
+         */
+        rc = p2m_next_level(p2m, !removing_mapping,
+                            level, &table, offsets[level]);
+        if ( (rc == P2M_TABLE_MAP_NONE) || (rc == P2M_TABLE_MAP_NOMEM) )
+        {
+            rc = (rc == P2M_TABLE_MAP_NONE) ? -ENOENT : -ENOMEM;
+            /*
+             * We are here because p2m_next_level has failed to map
+             * the intermediate page table (e.g the table does not exist
+             * and none should be allocated). It is a valid case
+             * when removing a mapping as it may not exist in the
+             * page table. In this case, just ignore lookup failure.
+             */
+            rc = removing_mapping ? 0 : rc;
+            goto out;
+        }
+
+        if ( rc != P2M_TABLE_NORMAL )
+            break;
+    }
+
+    entry = table + offsets[level];
+
+    /*
+     * If we are here with level > target, we must be at a leaf node,
+     * and we need to break up the superpage.
+     */
+    if ( level > target )
+    {
+        panic("Shattering isn't implemented\n");
+    }
+
+    /*
+     * We should always be there with the correct level because all the
+     * intermediate tables have been installed if necessary.
+     */
+    ASSERT(level == target);
+
+    orig_pte = *entry;
+
+    if ( removing_mapping )
+        p2m_clean_pte(entry, p2m->clean_dcache);
+    else
+    {
+        pte_t pte = p2m_pte_from_mfn(mfn, t);
+
+        p2m_write_pte(entry, pte, p2m->clean_dcache);
+
+        p2m->max_mapped_gfn = gfn_max(p2m->max_mapped_gfn,
+                                      gfn_add(gfn, BIT(page_order, UL) - 1));
+        p2m->lowest_mapped_gfn = gfn_min(p2m->lowest_mapped_gfn, gfn);
+    }
+
+    p2m->need_flush = true;
+
+    /*
+     * Currently, the infrastructure required to enable CONFIG_HAS_PASSTHROUGH
+     * is not ready for RISC-V support.
+     *
+     * When CONFIG_HAS_PASSTHROUGH=y, iommu_iotlb_flush() should be done
+     * here.
+     */
+#ifdef CONFIG_HAS_PASSTHROUGH
+#   error "add code to flush IOMMU TLB"
+#endif
+
+    rc = 0;
+
+    /*
+     * In case of a VALID -> INVALID transition, the original PTE should
+     * always be freed.
+     *
+     * In case of a VALID -> VALID transition, the original PTE should be
+     * freed only if the MFNs are different. If the MFNs are the same
+     * (i.e., only permissions differ), there is no need to free the
+     * original PTE.
+     */
+    if ( pte_is_valid(orig_pte) &&
+         (!pte_is_valid(*entry) ||
+          !mfn_eq(pte_get_mfn(*entry), pte_get_mfn(orig_pte))) )
+        p2m_free_subtree(p2m, orig_pte, level);
+
+ out:
+    unmap_domain_page(table);
+
+    return rc;
+}
+
+/* Return mapping order for given gfn, mfn and nr */
+static unsigned long p2m_mapping_order(const struct p2m_domain *p2m, gfn_t gfn,
+                                       mfn_t mfn, unsigned long nr)
+{
+    unsigned long mask;
+    /* 1gb, 2mb, 4k mappings are supported */
+    unsigned int level = min(P2M_ROOT_LEVEL(p2m), P2M_MAX_SUPPORTED_LEVEL_MAPPING);
+    unsigned long order = 0;
+
+    mask = !mfn_eq(mfn, INVALID_MFN) ? mfn_x(mfn) : 0;
+    mask |= gfn_x(gfn);
+
+    for ( ; level != 0; level-- )
+    {
+        if ( !(mask & (BIT(P2M_LEVEL_ORDER(level), UL) - 1)) &&
+             (nr >= BIT(P2M_LEVEL_ORDER(level), UL)) )
+        {
+            order = P2M_LEVEL_ORDER(level);
+            break;
+        }
+    }
+
+    return order;
+}
+
 static int p2m_set_range(struct p2m_domain *p2m,
                          gfn_t sgfn,
                          unsigned long nr,
                          mfn_t smfn,
                          p2m_type_t t)
 {
-    return -EOPNOTSUPP;
+    int rc = 0;
+    unsigned long left = nr;
+
+    /*
+     * Any reference taken by the P2M mappings (e.g. foreign mapping) will
+     * be dropped in relinquish_p2m_mapping(). As the P2M will still
+     * be accessible after, we need to prevent mapping to be added when the
+     * domain is dying.
+     */
+    if ( unlikely(p2m->domain->is_dying) )
+        return -EACCES;
+
+    while ( left )
+    {
+        unsigned long order = p2m_mapping_order(p2m, sgfn, smfn, left);
+
+        rc = p2m_set_entry(p2m, sgfn, order, smfn, t);
+        if ( rc )
+            break;
+
+        sgfn = gfn_add(sgfn, BIT(order, UL));
+        if ( !mfn_eq(smfn, INVALID_MFN) )
+            smfn = mfn_add(smfn, BIT(order, UL));
+
+        left -= BIT(order, UL);
+    }
+
+    if ( left > INT_MAX )
+        rc = -EOVERFLOW;
+
+    return !left ? rc : left;
 }
 
 int map_regions_p2mt(struct domain *d,
-- 
2.51.1



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v6 14/19] xen/riscv: implement p2m_next_level()
Date: Mon, 24 Nov 2025 13:33:47 +0100
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Implement the p2m_next_level() function, which enables traversal and dynamic
allocation of intermediate levels (if necessary) in the RISC-V
p2m (physical-to-machine) page table hierarchy.

To support this, the following helpers are introduced:
- page_to_p2m_table(): Constructs non-leaf PTEs pointing to next-level page
  tables with correct attributes.
- p2m_alloc_page(): Allocates page table pages, supporting both hardware and
  guest domains.
- p2m_create_table(): Allocates and initializes a new page table page and
  installs it into the hierarchy.

Signed-off-by: Oleksii Kurochko 
Acked-by: Jan Beulich 
---
Changes in V6:
 - s/intermidiate/intermediate.
 - Add Acked-by: Jan Beulich .
---
Changes in V5:
 - Stray more blanks after * in declaration of functions.
 - Correct the comment above p2m_create_table() as metadata pages isn't
   allocated anymore in this function.
 - Move call of     clear_and_clean_page(page, p2m->clean_dcache); from
   p2m_create_table() to p2m_alloc_page().
 - Drop ACCESS_ONCE() in paging_alloc_page().
---
Changes in V4:
 - make `page` argument of page_to_p2m_table pointer-to-const.
 - Move p2m_next_level()'s local variable `ret` to the more narrow space where
   it is really used.
 - Drop stale ASSERT() in p2m_next_level().
 - Stray blank after * in declaration of paging_alloc_page().
 - Decrease p2m_freelist.total_pages when a page is taken from the p2m freelist.
---
Changes in V3:
 - s/p2me_is_mapping/p2m_is_mapping to be in syc with other p2m_is_*() functions.
 - clear_and_clean_page() in p2m_create_table() instead of clear_page() to be
   sure that page is cleared and d-cache is flushed for it.
 - Move ASSERT(level != 0) in p2m_next_level() ahead of trying to allocate a
   page table.
 - Update p2m_create_table() to allocate metadata page to store p2m type in it
   for each entry of page table.
 - Introduce paging_alloc_page() and use it inside p2m_alloc_page().
 - Add allocated page to p2m->pages list in p2m_alloc_page() to simplify
   a caller code a little bit.
 - Drop p2m_is_mapping() and use pte_is_mapping() instead as P2M PTE's valid
   bit doesn't have another purpose anymore.
 - Update an implementation and prototype of page_to_p2m_table(), it is enough
   to pass only a page as an argument.
---
Changes in V2:
 - New patch. It was a part of a big patch "xen/riscv: implement p2m mapping
   functionality" which was splitted to smaller.
 - s/p2m_is_mapping/p2m_is_mapping.
---

 xen/arch/riscv/include/asm/paging.h |  2 +
 xen/arch/riscv/p2m.c                | 77 ++++++++++++++++++++++++++++-
 xen/arch/riscv/paging.c             | 12 +++++
 3 files changed, 89 insertions(+), 2 deletions(-)

diff --git a/xen/arch/riscv/include/asm/paging.h b/xen/arch/riscv/include/asm/paging.h
index fe462be223..c1d225d02b 100644
--- a/xen/arch/riscv/include/asm/paging.h
+++ b/xen/arch/riscv/include/asm/paging.h
@@ -15,4 +15,6 @@ int paging_refill_from_domheap(struct domain *d, unsigned int nr_pages);
 
 void paging_free_page(struct domain *d, struct page_info *pg);
 
+struct page_info *paging_alloc_page(struct domain *d);
+
 #endif /* ASM_RISCV_PAGING_H */
diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c
index 8761204720..16663650ee 100644
--- a/xen/arch/riscv/p2m.c
+++ b/xen/arch/riscv/p2m.c
@@ -361,6 +361,19 @@ int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted)
     return rc;
 }
 
+static struct page_info *p2m_alloc_page(struct p2m_domain *p2m)
+{
+    struct page_info *pg = paging_alloc_page(p2m->domain);
+
+    if ( pg )
+    {
+        page_list_add(pg, &p2m->pages);
+        clear_and_clean_page(pg, p2m->clean_dcache);
+    }
+
+    return pg;
+}
+
 static int p2m_set_type(pte_t *pte, p2m_type_t t)
 {
     int rc = 0;
@@ -501,6 +514,33 @@ static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t, bool is_table)
     return e;
 }
 
+/* Generate table entry with correct attributes. */
+static pte_t page_to_p2m_table(const struct page_info *page)
+{
+    /*
+     * p2m_invalid will be ignored inside p2m_pte_from_mfn() as is_table is
+     * set to true and p2m_type_t shouldn't be applied for PTEs which
+     * describe an intermediate table.
+     */
+    return p2m_pte_from_mfn(page_to_mfn(page), p2m_invalid, true);
+}
+
+/* Allocate a new page table page and hook it in via the given entry. */
+static int p2m_create_table(struct p2m_domain *p2m, pte_t *entry)
+{
+    struct page_info *page;
+
+    ASSERT(!pte_is_valid(*entry));
+
+    page = p2m_alloc_page(p2m);
+    if ( page == NULL )
+        return -ENOMEM;
+
+    p2m_write_pte(entry, page_to_p2m_table(page), p2m->clean_dcache);
+
+    return 0;
+}
+
 #define P2M_TABLE_MAP_NONE 0
 #define P2M_TABLE_MAP_NOMEM 1
 #define P2M_TABLE_SUPER_PAGE 2
@@ -525,9 +565,42 @@ static int p2m_next_level(struct p2m_domain *p2m, bool alloc_tbl,
                           unsigned int level, pte_t **table,
                           unsigned int offset)
 {
-    panic("%s: hasn't been implemented yet\n", __func__);
+    pte_t *entry;
+    mfn_t mfn;
+
+    /* The function p2m_next_level() is never called at the last level */
+    ASSERT(level != 0);
+
+    entry = *table + offset;
+
+    if ( !pte_is_valid(*entry) )
+    {
+        int ret;
+
+        if ( !alloc_tbl )
+            return P2M_TABLE_MAP_NONE;
+
+        ret = p2m_create_table(p2m, entry);
+        if ( ret )
+            return P2M_TABLE_MAP_NOMEM;
+    }
+
+    if ( pte_is_mapping(*entry) )
+        return P2M_TABLE_SUPER_PAGE;
+
+    mfn = mfn_from_pte(*entry);
+
+    unmap_domain_page(*table);
+
+    /*
+     * TODO: There's an inefficiency here:
+     *       In p2m_create_table(), the page is mapped to clear it.
+     *       Then that mapping is torn down in p2m_create_table(),
+     *       only to be re-established here.
+     */
+    *table = map_domain_page(mfn);
 
-    return P2M_TABLE_MAP_NONE;
+    return P2M_TABLE_NORMAL;
 }
 
 static void p2m_put_foreign_page(struct page_info *pg)
diff --git a/xen/arch/riscv/paging.c b/xen/arch/riscv/paging.c
index 09631c9894..76a203edbb 100644
--- a/xen/arch/riscv/paging.c
+++ b/xen/arch/riscv/paging.c
@@ -117,6 +117,18 @@ void paging_free_page(struct domain *d, struct page_info *pg)
     spin_unlock(&d->arch.paging.lock);
 }
 
+struct page_info *paging_alloc_page(struct domain *d)
+{
+    struct page_info *pg;
+
+    spin_lock(&d->arch.paging.lock);
+    pg = page_list_remove_head(&d->arch.paging.freelist);
+    d->arch.paging.total_pages--;
+    spin_unlock(&d->arch.paging.lock);
+
+    return pg;
+}
+
 /* Domain paging struct initialization. */
 int paging_domain_init(struct domain *d)
 {
-- 
2.51.1



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v6 15/19] xen/riscv: Implement superpage splitting for p2m mappings
Date: Mon, 24 Nov 2025 13:33:48 +0100
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Add support for down large memory mappings ("superpages") in the RISC-V
p2m mapping so that smaller, more precise mappings ("finer-grained entries")
can be inserted into lower levels of the page table hierarchy.

To implement that the following is done:
- Introduce p2m_split_superpage(): Recursively shatters a superpage into
  smaller page table entries down to the target level, preserving original
  permissions and attributes.
- p2m_set_entry() updated to invoke superpage splitting when inserting
  entries at lower levels within a superpage-mapped region.

This implementation is based on the ARM code, with modifications to the part
that follows the BBM (break-before-make) approach, some parts are simplified
as according to RISC-V spec:
  It is permitted for multiple address-translation cache entries to co-exist
  for the same address. This represents the fact that in a conventional
  TLB hierarchy, it is possible for multiple entries to match a single
  address if, for example, a page is upgraded to a superpage without first
  clearing the original non-leaf PTE’s valid bit and executing an SFENCE.VMA
  with rs1=x0, or if multiple TLBs exist in parallel at a given level of the
  hierarchy. In this case, just as if an SFENCE.VMA is not executed between
  a write to the memory-management tables and subsequent implicit read of the
  same address: it is unpredictable whether the old non-leaf PTE or the new
  leaf PTE is used, but the behavior is otherwise well defined.
In contrast to the Arm architecture, where BBM is mandatory and failing to
use it in some cases can lead to CPU instability, RISC-V guarantees
stability, and the behavior remains safe — though unpredictable in terms of
which translation will be used.

Additionally, the page table walk logic has been adjusted, as ARM uses the
opposite level numbering compared to RISC-V.

Signed-off-by: Oleksii Kurochko 
Acked-by: Jan Beulich 
---
Changes in V6:
 - Move introduction of pte_is_superpage() here as it is starting to be
   used in this patch now.
---
Changes in V5:
 - Add Acked-by: Jan Beulich .
 - use next_level when p2m_split_superpage() is recursively called
   instead of using "level-1".
---
Changes in V4:
 - s/number of levels/level numbering in the commit message.
 - s/permissions/attributes.
 - Remove redundant comment in p2m_split_superpage() about page
   splitting.
 - Use P2M_PAGETABLE_ENTRIES as XEN_PT_ENTRIES
   doesn't takeinto  into acount that G stage root page table is
   extended by 2 bits.
 - Use earlier introduced P2M_LEVEL_ORDER().
---
Changes in V3:
 - Move     page_list_add(page, &p2m->pages) inside p2m_alloc_page().
 - Use 'unsigned long' for local vairiable 'i' in p2m_split_superpage().
 - Update the comment above if ( next_level != target ) in p2m_split_superpage().
 - Reverse cycle to iterate through page table levels in p2m_set_entry().
 - Update p2m_split_superpage() with the same changes which are done in the
   patch "P2M: Don't try to free the existing PTE if we can't allocate a new table".
---
Changes in V2:
 - New patch. It was a part of a big patch "xen/riscv: implement p2m mapping
   functionality" which was splitted to smaller.
 - Update the commit above the cycle which creates new page table as
   RISC-V travserse page tables in an opposite to ARM order.
 - RISC-V doesn't require BBM so there is no needed for invalidating
   and TLB flushing before updating PTE.
---
 xen/arch/riscv/include/asm/page.h |   5 ++
 xen/arch/riscv/p2m.c              | 116 +++++++++++++++++++++++++++++-
 2 files changed, 119 insertions(+), 2 deletions(-)

diff --git a/xen/arch/riscv/include/asm/page.h b/xen/arch/riscv/include/asm/page.h
index c6b7acf1b7..4b6baeaaf2 100644
--- a/xen/arch/riscv/include/asm/page.h
+++ b/xen/arch/riscv/include/asm/page.h
@@ -190,6 +190,11 @@ static inline bool pte_is_mapping(pte_t p)
     return (p.pte & PTE_VALID) && (p.pte & PTE_ACCESS_MASK);
 }
 
+static inline bool pte_is_superpage(pte_t p, unsigned int level)
+{
+    return (level > 0) && pte_is_mapping(p);
+}
+
 static inline int clean_and_invalidate_dcache_va_range(const void *p,
                                                        unsigned long size)
 {
diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c
index 16663650ee..b29c0a220a 100644
--- a/xen/arch/riscv/p2m.c
+++ b/xen/arch/riscv/p2m.c
@@ -746,7 +746,88 @@ static void p2m_free_subtree(struct p2m_domain *p2m,
     p2m_free_page(p2m, pg);
 }
 
-/* Insert an entry in the p2m */
+static bool p2m_split_superpage(struct p2m_domain *p2m, pte_t *entry,
+                                unsigned int level, unsigned int target,
+                                const unsigned int *offsets)
+{
+    struct page_info *page;
+    unsigned long i;
+    pte_t pte, *table;
+    bool rv = true;
+
+    /* Convenience aliases */
+    mfn_t mfn = pte_get_mfn(*entry);
+    unsigned int next_level = level - 1;
+    unsigned int level_order = P2M_LEVEL_ORDER(next_level);
+
+    /*
+     * This should only be called with target != level and the entry is
+     * a superpage.
+     */
+    ASSERT(level > target);
+    ASSERT(pte_is_superpage(*entry, level));
+
+    page = p2m_alloc_page(p2m);
+    if ( !page )
+    {
+        /*
+         * The caller is in charge to free the sub-tree.
+         * As we didn't manage to allocate anything, just tell the
+         * caller there is nothing to free by invalidating the PTE.
+         */
+        memset(entry, 0, sizeof(*entry));
+        return false;
+    }
+
+    table = __map_domain_page(page);
+
+    for ( i = 0; i < P2M_PAGETABLE_ENTRIES(p2m, next_level); i++ )
+    {
+        pte_t *new_entry = table + i;
+
+        /*
+         * Use the content of the superpage entry and override
+         * the necessary fields. So the correct attributes are kept.
+         */
+        pte = *entry;
+        pte_set_mfn(&pte, mfn_add(mfn, i << level_order));
+
+        write_pte(new_entry, pte);
+    }
+
+    /*
+     * Shatter superpage in the page to the level we want to make the
+     * changes.
+     * This is done outside the loop to avoid checking the offset
+     * for every entry to know whether the entry should be shattered.
+     */
+    if ( next_level != target )
+        rv = p2m_split_superpage(p2m, table + offsets[next_level],
+                                 next_level, target, offsets);
+
+    if ( p2m->clean_dcache )
+        clean_dcache_va_range(table, PAGE_SIZE);
+
+    /*
+     * TODO: an inefficiency here: the caller almost certainly wants to map
+     *       the same page again, to update the one entry that caused the
+     *       request to shatter the page.
+     */
+    unmap_domain_page(table);
+
+    /*
+     * Even if we failed, we should (according to the current implemetation
+     * of a way how sub-tree is freed if p2m_split_superpage hasn't been
+     * finished fully) install the newly allocated PTE
+     * entry.
+     * The caller will be in charge to free the sub-tree.
+     */
+    p2m_write_pte(entry, page_to_p2m_table(page), p2m->clean_dcache);
+
+    return rv;
+}
+
+/* Insert an entry in the p2m. */
 static int p2m_set_entry(struct p2m_domain *p2m,
                          gfn_t gfn,
                          unsigned long page_order,
@@ -811,7 +892,38 @@ static int p2m_set_entry(struct p2m_domain *p2m,
      */
     if ( level > target )
     {
-        panic("Shattering isn't implemented\n");
+        /* We need to split the original page. */
+        pte_t split_pte = *entry;
+
+        ASSERT(pte_is_superpage(*entry, level));
+
+        if ( !p2m_split_superpage(p2m, &split_pte, level, target, offsets) )
+        {
+            /* Free the allocated sub-tree */
+            p2m_free_subtree(p2m, split_pte, level);
+
+            rc = -ENOMEM;
+            goto out;
+        }
+
+        p2m_write_pte(entry, split_pte, p2m->clean_dcache);
+
+        p2m->need_flush = true;
+
+        /* Then move to the level we want to make real changes */
+        for ( ; level > target; level-- )
+        {
+            rc = p2m_next_level(p2m, true, level, &table, offsets[level]);
+
+            /*
+             * The entry should be found and either be a table
+             * or a superpage if level 0 is not targeted
+             */
+            ASSERT(rc == P2M_TABLE_NORMAL ||
+                   (rc == P2M_TABLE_SUPER_PAGE && target > 0));
+        }
+
+        entry = table + offsets[level];
     }
 
     /*
-- 
2.51.1



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v6 13/19] xen/riscv: Implement p2m_pte_from_mfn() and support PBMT configuration
Date: Mon, 24 Nov 2025 13:33:46 +0100
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This patch adds the initial logic for constructing PTEs from MFNs in the RISC-V
p2m subsystem. It includes:
- Implementation of p2m_pte_from_mfn(): Generates a valid PTE using the
  given MFN, p2m_type_t, including permission encoding and PBMT attribute
  setup.
- New helper p2m_set_permission(): Encodes access rights (r, w, x) into the
  PTE based on both p2m type and access permissions.
- p2m_set_type(): Stores the p2m type in PTE's bits. The storage of types,
  which don't fit PTE bits, will be implemented separately later.
- Add detection of Svade extension to properly handle a possible page-fault
  if A and D bits aren't set.

PBMT type encoding support:
- Introduces an enum pbmt_type_t to represent the PBMT field values.
- Maps types like p2m_mmio_direct_dev to p2m_mmio_direct_io, others default
  to pbmt_pma.

Signed-off-by: Oleksii Kurochko 
---
Changes in V6:
 - Drop 's' in word "nesssary" in the comment.
---
Changes in V5:
 - Moved setting of p2m_mmio_direct_io inside (!is_table) case in p2m_pte_from_mfn().
 - Extend comment about the place of setting A/D bits with explanation
   why it is done in this way for now.
---
Changes in V4:
 - p2m_set_permission() updates:
   - Update permissions for p2m_ram_rw case, make it also executable.
   - Add pernissions setting for p2m_map_foreign_* types.
   - Drop setting peromissions for p2m_ext_storage.
   - Only turn off PTE_VALID bit for p2m_invalid, don't touch other bits.
 - p2m_pte_from_mfn() updates:
   - Update ASSERT(), add a check that mfn isn't INVALID_MFN (1)
     explicitly to avoid the case when PADDR_MASK isn't narrow enough to
     catch the case (1).
   - Drop unnessary check around call of p2m_set_type() as this check
     is already included inside p2m_set_type().
 - Introduce new p2m type p2m_first_external to detect that passed type
   is stored in external storage.
 - Add handling of PTE's A and D bits in pm2_set_permission. Also, set
   PTE_USER bit. For this cpufeatures.{h and c} were updated to be able
   to detect availability of Svade extension.
 - Drop grant table related code as it isn't going to be used at the moment.
---
Changes in V3:
 - s/p2m_entry_from_mfn/p2m_pte_from_mfn.
 - s/pbmt_type_t/pbmt_type.
 - s/pbmt_max/pbmt_count.
 - s/p2m_type_radix_set/p2m_set_type.
 - Rework p2m_set_type() to handle only types which are fited into PTEs bits.
   Other types will be covered separately.
   Update arguments of p2m_set_type(): there is no any reason for p2m anymore.
 - p2m_set_permissions() updates:
   - Update the code in p2m_set_permission() for cases p2m_raw_rw and
     p2m_mmio_direct_io to set proper type permissions.
   - Add cases for p2m_grant_map_rw and p2m_grant_map_ro.
   - Use ASSERT_UNEACHABLE() instead of BUG() in switch cases of
     p2m_set_permissions.
   - Add blank lines non-fall-through case blocks in switch cases.
 - Set MFN before permissions are set in p2m_pte_from_mfn().
 - Update prototype of p2m_entry_from_mfn().
---
Changes in V2:
 - New patch. It was a part of a big patch "xen/riscv: implement p2m mapping
   functionality" which was splitted to smaller.
---
 xen/arch/riscv/cpufeature.c             |   1 +
 xen/arch/riscv/include/asm/cpufeature.h |   1 +
 xen/arch/riscv/include/asm/page.h       |   8 ++
 xen/arch/riscv/p2m.c                    | 112 +++++++++++++++++++++++-
 4 files changed, 118 insertions(+), 4 deletions(-)

diff --git a/xen/arch/riscv/cpufeature.c b/xen/arch/riscv/cpufeature.c
index b846a106a3..02b68aeaa4 100644
--- a/xen/arch/riscv/cpufeature.c
+++ b/xen/arch/riscv/cpufeature.c
@@ -138,6 +138,7 @@ const struct riscv_isa_ext_data __initconst riscv_isa_ext[] = {
     RISCV_ISA_EXT_DATA(zbs),
     RISCV_ISA_EXT_DATA(smaia),
     RISCV_ISA_EXT_DATA(ssaia),
+    RISCV_ISA_EXT_DATA(svade),
     RISCV_ISA_EXT_DATA(svpbmt),
 };
 
diff --git a/xen/arch/riscv/include/asm/cpufeature.h b/xen/arch/riscv/include/asm/cpufeature.h
index 768b84b769..5f756c76db 100644
--- a/xen/arch/riscv/include/asm/cpufeature.h
+++ b/xen/arch/riscv/include/asm/cpufeature.h
@@ -37,6 +37,7 @@ enum riscv_isa_ext_id {
     RISCV_ISA_EXT_zbs,
     RISCV_ISA_EXT_smaia,
     RISCV_ISA_EXT_ssaia,
+    RISCV_ISA_EXT_svade,
     RISCV_ISA_EXT_svpbmt,
     RISCV_ISA_EXT_MAX
 };
diff --git a/xen/arch/riscv/include/asm/page.h b/xen/arch/riscv/include/asm/page.h
index 66cb192316..c6b7acf1b7 100644
--- a/xen/arch/riscv/include/asm/page.h
+++ b/xen/arch/riscv/include/asm/page.h
@@ -73,6 +73,14 @@
 #define PTE_SMALL       BIT(10, UL)
 #define PTE_POPULATE    BIT(11, UL)
 
+enum pbmt_type {
+    pbmt_pma,
+    pbmt_nc,
+    pbmt_io,
+    pbmt_rsvd,
+    pbmt_count,
+};
+
 #define PTE_ACCESS_MASK (PTE_READABLE | PTE_WRITABLE | PTE_EXECUTABLE)
 
 #define PTE_PBMT_MASK   (PTE_PBMT_NOCACHE | PTE_PBMT_IO)
diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c
index f8af73c9d8..8761204720 100644
--- a/xen/arch/riscv/p2m.c
+++ b/xen/arch/riscv/p2m.c
@@ -11,6 +11,7 @@
 #include 
 #include 
 
+#include 
 #include 
 #include 
 #include 
@@ -360,6 +361,18 @@ int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted)
     return rc;
 }
 
+static int p2m_set_type(pte_t *pte, p2m_type_t t)
+{
+    int rc = 0;
+
+    if ( t > p2m_first_external )
+        panic("unimplemeted\n");
+    else
+        pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK);
+
+    return rc;
+}
+
 static p2m_type_t p2m_get_type(const pte_t pte)
 {
     p2m_type_t type = MASK_EXTR(pte.pte, P2M_TYPE_PTE_BITS_MASK);
@@ -390,11 +403,102 @@ static inline void p2m_clean_pte(pte_t *p, bool clean_cache)
     p2m_write_pte(p, pte, clean_cache);
 }
 
-static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t)
+static void p2m_set_permission(pte_t *e, p2m_type_t t)
 {
-    panic("%s: hasn't been implemented yet\n", __func__);
+    e->pte &= ~PTE_ACCESS_MASK;
+
+    e->pte |= PTE_USER;
+
+    /*
+     * Two schemes to manage the A and D bits are defined:
+     *   • The Svade extension: when a virtual page is accessed and the A bit
+     *     is clear, or is written and the D bit is clear, a page-fault
+     *     exception is raised.
+     *   • When the Svade extension is not implemented, the following scheme
+     *     applies.
+     *     When a virtual page is accessed and the A bit is clear, the PTE is
+     *     updated to set the A bit. When the virtual page is written and the
+     *     D bit is clear, the PTE is updated to set the D bit. When G-stage
+     *     address translation is in use and is not Bare, the G-stage virtual
+     *     pages may be accessed or written by implicit accesses to VS-level
+     *     memory management data structures, such as page tables.
+     * Thereby to avoid a page-fault in case of Svade is available, it is
+     * necessary to set A and D bits.
+     *
+     * TODO: For now, it’s fine to simply set the A/D bits, since OpenSBI
+     *       delegates page faults to a lower privilege mode and so OpenSBI
+     *       isn't expect to handle page-faults occured in lower modes.
+     *       By setting the A/D bits here, page faults that would otherwise
+     *       be generated due to unset A/D bits will not occur in Xen.
+     *
+     *       Currently, Xen on RISC-V does not make use of the information
+     *       that could be obtained from handling such page faults, which
+     *       could otherwise be useful for several use cases such as demand
+     *       paging, cache-flushing optimizations, memory access tracking,etc.
+     *
+     *       To support the more general case and the optimizations mentioned
+     *       above, it would be better to stop setting the A/D bits here and
+     *       instead handle page faults that occur due to unset A/D bits.
+     */
+    if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_svade) )
+        e->pte |= PTE_ACCESSED | PTE_DIRTY;
+
+    switch ( t )
+    {
+    case p2m_map_foreign_rw:
+    case p2m_mmio_direct_io:
+        e->pte |= PTE_READABLE | PTE_WRITABLE;
+        break;
+
+    case p2m_ram_rw:
+        e->pte |= PTE_ACCESS_MASK;
+        break;
+
+    case p2m_invalid:
+        e->pte &= ~PTE_VALID;
+        break;
+
+    case p2m_map_foreign_ro:
+        e->pte |= PTE_READABLE;
+        break;
+
+    default:
+        ASSERT_UNREACHABLE();
+        break;
+    }
+}
+
+static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t, bool is_table)
+{
+    pte_t e = (pte_t) { PTE_VALID };
+
+    pte_set_mfn(&e, mfn);
+
+    ASSERT(!(mfn_to_maddr(mfn) & ~PADDR_MASK) || mfn_eq(mfn, INVALID_MFN));
+
+    if ( !is_table )
+    {
+        switch ( t )
+        {
+        case p2m_mmio_direct_io:
+            e.pte |= PTE_PBMT_IO;
+            break;
+
+        default:
+            break;
+        }
+
+        p2m_set_permission(&e, t);
+        p2m_set_type(&e, t);
+    }
+    else
+        /*
+         * According to the spec and table "Encoding of PTE R/W/X fields":
+         *   X=W=R=0 -> Pointer to next level of page table.
+         */
+        e.pte &= ~PTE_ACCESS_MASK;
 
-    return (pte_t) { .pte = 0 };
+    return e;
 }
 
 #define P2M_TABLE_MAP_NONE 0
@@ -649,7 +753,7 @@ static int p2m_set_entry(struct p2m_domain *p2m,
         p2m_clean_pte(entry, p2m->clean_dcache);
     else
     {
-        pte_t pte = p2m_pte_from_mfn(mfn, t);
+        pte_t pte = p2m_pte_from_mfn(mfn, t, false);
 
         p2m_write_pte(entry, pte, p2m->clean_dcache);
 
-- 
2.51.1



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Date: Mon, 24 Nov 2025 12:40:29 +0000
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH] XEN: enable MC/DC coverage for Clang
To: Saman Dehghan 
Cc: xen-devel@lists.xenproject.org, Anthony PERARD
 , Michal Orzel ,
 Jan Beulich , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini 
References: <3bb418ae6a36a9ac89c697a417fa0745fa9ac702.1763949990.git.samaan.dehghan@gmail.com>
 <9c76a959-51c0-4eb7-9d05-ba4441318faa@citrix.com>
 
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From: Andrew Cooper 
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On 24/11/2025 12:31 pm, Saman Dehghan wrote:
> On Mon, Nov 24, 2025 at 5:15 AM Andrew Cooper  wrote:
>> On 24/11/2025 2:18 am, Saman Dehghan wrote:
>>> @@ -127,16 +131,25 @@ extern uint64_t __stop___llvm_prf_cnts[];
>>>  #define END_NAMES       ((const void *)__stop___llvm_prf_names)
>>>  #define START_COUNTERS  ((void *)__start___llvm_prf_cnts)
>>>  #define END_COUNTERS    ((void *)__stop___llvm_prf_cnts)
>>> +#define START_BITMAP    ((void *)__start___llvm_prf_bits)
>>> +#define END_BITMAP      ((void *)__stop___llvm_prf_bits)
>>>
>>>  static void cf_check reset_counters(void)
>>>  {
>>>      memset(START_COUNTERS, 0, END_COUNTERS - START_COUNTERS);
>>> +#ifdef CONFIG_CONDITION_COVERAGE
>>> +    memset(START_BITMAP, 0, END_BITMAP - START_BITMAP);
>>> +#endif
>> ... this:
>>
>>     if ( IS_ENABLED(CONFIG_CONDITION_COVERAGE) )
>>         memset(START_BITMAP, 0, END_BITMAP - START_BITMAP);
>>
>>>  }
> Thanks Andrew.
>
> IS_ENABLED(CONFIG_CONDITION_COVERAGE) is not the same as #ifdef
> CONFIG_CONDITION_COVERAGE.
> When the option is completely undefined, IS_ENABLED() returns 1 (enabled).
> So even with no CONFIG_CONDITION_COVERAGE defined, the code takes the
> "enabled" path, which is not what we want here.

What makes you think this?  (No - that's not how IS_ENABLED() works.)

IS_ENABLED() exists for the purpose given here, to turn preprocessor
conditionals into something visible to the compiler.  Notably it allows
for syntax checking even in the disabled code, which is why it's
preferred wherever possible.

~Andrew


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Subject: Re: [PATCH] XEN: enable MC/DC coverage for Clang
To: Saman Dehghan 
Cc: xen-devel@lists.xenproject.org, Anthony PERARD
 , Michal Orzel ,
 Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Stefano Stabellini ,
 Andrew Cooper 
References: <3bb418ae6a36a9ac89c697a417fa0745fa9ac702.1763949990.git.samaan.dehghan@gmail.com>
 <9c76a959-51c0-4eb7-9d05-ba4441318faa@citrix.com>
 
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On 24.11.2025 13:31, Saman Dehghan wrote:
> On Mon, Nov 24, 2025 at 5:15 AM Andrew Cooper  wrote:
>> On 24/11/2025 2:18 am, Saman Dehghan wrote:
>>> @@ -127,16 +131,25 @@ extern uint64_t __stop___llvm_prf_cnts[];
>>>  #define END_NAMES       ((const void *)__stop___llvm_prf_names)
>>>  #define START_COUNTERS  ((void *)__start___llvm_prf_cnts)
>>>  #define END_COUNTERS    ((void *)__stop___llvm_prf_cnts)
>>> +#define START_BITMAP    ((void *)__start___llvm_prf_bits)
>>> +#define END_BITMAP      ((void *)__stop___llvm_prf_bits)
>>>
>>>  static void cf_check reset_counters(void)
>>>  {
>>>      memset(START_COUNTERS, 0, END_COUNTERS - START_COUNTERS);
>>> +#ifdef CONFIG_CONDITION_COVERAGE
>>> +    memset(START_BITMAP, 0, END_BITMAP - START_BITMAP);
>>> +#endif
>>
>> ... this:
>>
>>     if ( IS_ENABLED(CONFIG_CONDITION_COVERAGE) )
>>         memset(START_BITMAP, 0, END_BITMAP - START_BITMAP);
>>
>>>  }
> 
> Thanks Andrew.
> 
> IS_ENABLED(CONFIG_CONDITION_COVERAGE) is not the same as #ifdef
> CONFIG_CONDITION_COVERAGE.
> When the option is completely undefined, IS_ENABLED() returns 1 (enabled).

See our many other uses of IS_ENABLED(). If what you say was true, we'd have
breakage for every one of those uses.

Jan


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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v6 16/19] xen/riscv: implement put_page()
Date: Mon, 24 Nov 2025 13:33:49 +0100
Message-ID: <3a7ddc77031d24ad5a318375c4ec420bd749b2ca.1763986955.git.oleksii.kurochko@gmail.com>
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Implement put_page(), as it will be used by  p2m_put_*-related code.

Although CONFIG_STATIC_MEMORY has not yet been introduced for RISC-V,
a stub for PGC_static is added to avoid cluttering the code of
put_page() with #ifdefs.

Signed-off-by: Oleksii Kurochko 
Acked-by: Jan Beulich 
---
Changes in V6:
 - Nothing changed. Only rebase.
---
Changes in V5:
 - Correct code style of do-while loop in put_page().
 - Add Acked-by: Jan Beulich .
---
Changes in V4:
 - Update the comment message:
   s/p2m_put_code/p2m_put_*-related code.
   s/put_page_nr/put_page.
---
 xen/arch/riscv/include/asm/mm.h |  7 +++++++
 xen/arch/riscv/mm.c             | 24 +++++++++++++++++++-----
 2 files changed, 26 insertions(+), 5 deletions(-)

diff --git a/xen/arch/riscv/include/asm/mm.h b/xen/arch/riscv/include/asm/mm.h
index dd8cdc9782..0503c92e6c 100644
--- a/xen/arch/riscv/include/asm/mm.h
+++ b/xen/arch/riscv/include/asm/mm.h
@@ -264,6 +264,13 @@ static inline bool arch_mfns_in_directmap(unsigned long mfn, unsigned long nr)
 /* Page is Xen heap? */
 #define _PGC_xen_heap     PG_shift(2)
 #define PGC_xen_heap      PG_mask(1, 2)
+#ifdef CONFIG_STATIC_MEMORY
+/* Page is static memory */
+#define _PGC_static       PG_shift(3)
+#define PGC_static        PG_mask(1, 3)
+#else
+#define PGC_static     0
+#endif
 /* Page is broken? */
 #define _PGC_broken       PG_shift(7)
 #define PGC_broken        PG_mask(1, 7)
diff --git a/xen/arch/riscv/mm.c b/xen/arch/riscv/mm.c
index 1ef015f179..2e42293986 100644
--- a/xen/arch/riscv/mm.c
+++ b/xen/arch/riscv/mm.c
@@ -362,11 +362,6 @@ unsigned long __init calc_phys_offset(void)
     return phys_offset;
 }
 
-void put_page(struct page_info *page)
-{
-    BUG_ON("unimplemented");
-}
-
 void arch_dump_shared_mem_info(void)
 {
     BUG_ON("unimplemented");
@@ -627,3 +622,22 @@ void flush_page_to_ram(unsigned long mfn, bool sync_icache)
     if ( sync_icache )
         invalidate_icache();
 }
+
+void put_page(struct page_info *page)
+{
+    unsigned long nx, x, y = page->count_info;
+
+    do {
+        ASSERT((y & PGC_count_mask) >= 1);
+        x  = y;
+        nx = x - 1;
+    } while ( unlikely((y = cmpxchg(&page->count_info, x, nx)) != x) );
+
+    if ( unlikely((nx & PGC_count_mask) == 0) )
+    {
+        if ( unlikely(nx & PGC_static) )
+            free_domstatic_page(page);
+        else
+            free_domheap_page(page);
+    }
+}
-- 
2.51.1



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Date: Mon, 24 Nov 2025 12:31:22 +0000
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Subject: Re: [PATCH v2 1/4] x86/vPMU: move APIC ack past the handling of the
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To: Jan Beulich ,
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On 24/11/2025 12:29 pm, Jan Beulich wrote:
> While benign as long as it's using a direct-APIC-vector (handlers for
> which are called with IRQs off), follow the more usual pattern of ack-ing
> the IRQ only after handling it.
>
> Requested-by: Andrew Cooper 
> Signed-off-by: Jan Beulich 

Reviewed-by: Andrew Cooper 


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        Mon, 24 Nov 2025 04:34:29 -0800 (PST)
From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v6 19/19] xen/riscv: introduce metadata table to store P2M type
Date: Mon, 24 Nov 2025 13:33:52 +0100
Message-ID: <2c41da84b3e7fb0f6e6c3c856bff6edaf9e1d505.1763986955.git.oleksii.kurochko@gmail.com>
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RISC-V's PTE has only two available bits that can be used to store the P2M
type. This is insufficient to represent all the current RISC-V P2M types.
Therefore, some P2M types must be stored outside the PTE bits.

To address this, a metadata table is introduced to store P2M types that
cannot fit in the PTE itself. Not all P2M types are stored in the
metadata table—only those that require it.

The metadata table is linked to the intermediate page table via the
`struct page_info`'s v.md.metadata field of the corresponding intermediate
page.
Such pages are allocated with MEMF_no_owner, which allows us to use
the v field for the purpose of storing the metadata table.

To simplify the allocation and linking of intermediate and metadata page
tables, `p2m_{alloc,free}_table()` functions are implemented.

These changes impact `p2m_split_superpage()`, since when a superpage is
split, it is necessary to update the metadata table of the new
intermediate page table — if the entry being split has its P2M type set
to `p2m_ext_storage` in its `P2M_TYPES` bits. In addition to updating
the metadata of the new intermediate page table, the corresponding entry
in the metadata for the original superpage is invalidated.

Also, update p2m_{get,set}_type to work with P2M types which don't fit
into PTE bits.

Suggested-by: Jan Beulich 
Signed-off-by: Oleksii Kurochko 
---
Changes in V6:
 - Introduce new type md_t to use it instead of pte_t to store metadata
   types outside PTE bits.
 - Integrate introduced struct md_t.
 - Drop local variable "struct domain *d" inside p2m_set_type().
 - Drop __func__ printting and use %pv.
 - Code style fixes
 - Drop unnessarry check inside if-condition in p2m_pte_from_mfn()
   as we have ASSERT(p2m) inside p2m_set_type() anyway.
 - Return back the commnent inside page_to_p2m_table() as it was deleted
   accidently.
 - move the initialization of
p2m_pte_ctx.pt_page and p2m_pte_ctx.level ahead of the loop
 - Add BUILD_BUG_ON(p2m_invalid) before the call of p2m_alloc_page() in p2m_set_type() and in p2m_get_type() before " if ( type == p2m_ext_storage )".
 - Set to NULL tbl_pg->v.md.pg in p2m_free_table().
 - Make argument 't' of p2m_set_type() non-const as we are going to change it.
 - Add some explanatory comments.
 - Update ASSERT at the start of p2m_set_type() to verify that
   passed ctx->index is lesser then 512 and drop calculation of
   an index of root page as it is guaranteed by calc_offset()
   and get_root_pointer() that we will aready get proper page and
   proper index inside this page.
---
Changes in V5:
 - Rename metadata member of stuct md inside struct page_info to pg.
 - Stray blank in the declaration of p2m_alloc_table().
 - Use "<" instead of "<=" in ASSERT() in p2m_set_type().
 - Move the check that ctx is provided to an earlier point in
   p2m_set_type().
 - Set `md_pg` after ASSERT() in p2m_set_type().
 - Add BUG_ON() insetead of ASSERT_UNREACHABLE() in p2m_set_type().
 - Drop a check that metadata isn't NULL before unmap_domain_page() is
   being called.
 - Make const `md` variable in p2m_get_type().
 - unmap correct domain's page in p2m_get_type: use `md` instead of
   ctx->pt_page->v.md.pg.
 - Add description of how p2m and p2m_pte_ctx is expected to be used
   in p2m_pte_from_mfn() and drop a comment from page_to_p2m_table().
 - Drop the stale part of the comment above p2m_alloc_table().
 - Drop ASSERT(tbl_pg->v.md.pg) from p2m_free_table() as tbl_pg->v.md.pg
   is created conditionally now.
 - Drop an introduction of p2m_alloc_table(), update p2m_alloc_page()
   correspondengly and use it instead.
 - Add missing blank in definition of level member for tmp_ctx variable
   in p2m_free_subtree(). Also, add the comma at the end.
 - Initialize old_type once before for-loop in p2m_split_superpage() as
   old type will be used for all newly created PTEs.
 - Properly initialize p2m_pte_ctx.level with next_level instead of
   level when p2m_set_type() is going to be called for new PTEs.
 - Fix identations.
 - Move ASSERT(p2m) on top of p2m_set_type() to be sure that NULL isn't
   passed for p2m argument of p2m_set_type().
 - s/virt_to_page(table)/mfn_to_page(domain_page_map_to_mfn(table))
   to recieve correct page for a table which is mapped by domain_page_map().
 - Add "return;" after domain_crash() in p2m_set_type() to avoid potential
   NULL pointer dereference of md_pg.
---
Changes in V4:
 - Add Suggested-by: Jan Beulich .
 - Update the comment above declation of md structure inside struct page_info to:
   "Page is used as an intermediate P2M page table".
 - Allocate metadata table on demand to save some memory. (1)
 - Rework p2m_set_type():
   - Add allocatation of metadata page only if needed.
   - Move a check what kind of type we are handling inside p2m_set_type().
 - Move mapping of metadata page inside p2m_get_type() as it is needed only
   in case if PTE's type is equal to p2m_ext_storage.
 - Add some description to p2m_get_type() function.
 - Drop blank after return type of p2m_alloc_table().
 - Drop allocation of metadata page inside p2m_alloc_table becaues of (1).
 - Fix p2m_free_table() to free metadata page only if it was allocated.
---
Changes in V3:
 - Add is_p2m_foreign() macro and connected stuff.
 - Change struct domain *d argument of p2m_get_page_from_gfn() to
   struct p2m_domain.
 - Update the comment above p2m_get_entry().
 - s/_t/p2mt for local variable in p2m_get_entry().
 - Drop local variable addr in p2m_get_entry() and use gfn_to_gaddr(gfn)
   to define offsets array.
 - Code style fixes.
 - Update a check of rc code from p2m_next_level() in p2m_get_entry()
   and drop "else" case.
 - Do not call p2m_get_type() if p2m_get_entry()'s t argument is NULL.
 - Use struct p2m_domain instead of struct domain for p2m_lookup() and
   p2m_get_page_from_gfn().
 - Move defintion of get_page() from "xen/riscv: implement mfn_valid() and page reference, ownership handling helpers"
---
Changes in V2:
 - New patch.
---
 xen/arch/riscv/include/asm/mm.h |   9 ++
 xen/arch/riscv/p2m.c            | 257 ++++++++++++++++++++++++++++----
 2 files changed, 236 insertions(+), 30 deletions(-)

diff --git a/xen/arch/riscv/include/asm/mm.h b/xen/arch/riscv/include/asm/mm.h
index 1b16809749..b18892e4fc 100644
--- a/xen/arch/riscv/include/asm/mm.h
+++ b/xen/arch/riscv/include/asm/mm.h
@@ -149,6 +149,15 @@ struct page_info
             /* Order-size of the free chunk this page is the head of. */
             unsigned int order;
         } free;
+
+        /* Page is used as an intermediate P2M page table */
+        struct {
+            /*
+             * Pointer to a page which store metadata for an intermediate page
+             * table.
+             */
+            struct page_info *pg;
+        } md;
     } v;
 
     union {
diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c
index c356200fc6..23f44f547d 100644
--- a/xen/arch/riscv/p2m.c
+++ b/xen/arch/riscv/p2m.c
@@ -26,6 +26,24 @@
  */
 #define P2M_MAX_SUPPORTED_LEVEL_MAPPING _AC(2, U)
 
+struct md_t {
+    /*
+     * Describes a type stored outside PTE bits.
+     * Look at the comment above definition of enum p2m_type_t.
+     */
+    p2m_type_t type : 4;
+};
+
+/*
+ * P2M PTE context is used only when a PTE's P2M type is p2m_ext_storage.
+ * In this case, the P2M type is stored separately in the metadata page.
+ */
+struct p2m_pte_ctx {
+    struct page_info *pt_page;   /* Page table page containing the PTE. */
+    unsigned int index;          /* Index of the PTE within that page. */
+    unsigned int level;          /* Paging level at which the PTE resides. */
+};
+
 static struct gstage_mode_desc __ro_after_init max_gstage_mode = {
     .mode = HGATP_MODE_OFF,
     .paging_levels = 0,
@@ -37,6 +55,10 @@ unsigned char get_max_supported_mode(void)
     return max_gstage_mode.mode;
 }
 
+/*
+ * If anything is changed here, it may also require updates to
+ * p2m_{get,set}_type().
+ */
 static inline unsigned int calc_offset(const struct p2m_domain *p2m,
                                        const unsigned int lvl,
                                        const paddr_t gpa)
@@ -79,6 +101,9 @@ static inline unsigned int calc_offset(const struct p2m_domain *p2m,
  * The caller is responsible for unmapping the page after use.
  *
  * Returns NULL if the calculated offset into the root table is invalid.
+ *
+ * If anything is changed here, it may also require updates to
+ * p2m_{get,set}_type().
  */
 static pte_t *p2m_get_root_pointer(struct p2m_domain *p2m, gfn_t gfn)
 {
@@ -374,24 +399,107 @@ static struct page_info *p2m_alloc_page(struct p2m_domain *p2m)
     return pg;
 }
 
-static int p2m_set_type(pte_t *pte, p2m_type_t t)
+/*
+ * `pte` – PTE entry for which the type `t` will be stored.
+ *
+ * If `t` is `p2m_ext_storage`, both `ctx` and `p2m` must be provided;
+ * otherwise, only p2m may be NULL.
+ */
+static void p2m_set_type(pte_t *pte, p2m_type_t t,
+                         struct p2m_pte_ctx *ctx,
+                         struct p2m_domain *p2m)
 {
-    int rc = 0;
+    struct page_info **md_pg;
+    struct md_t *metadata = NULL;
 
-    if ( t > p2m_first_external )
-        panic("unimplemeted\n");
-    else
-        pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK);
+    ASSERT(p2m);
 
-    return rc;
+    /*
+     * It is sufficient to compare ctx->index with PAGETABLE_ENTRIES because,
+     * even for the p2m root page table (which is a 16 KB page allocated as
+     * four 4 KB pages), calc_offset() guarantees that the page-table index
+     * will always fall within the range [0, 511].
+     */
+    ASSERT(ctx && ctx->index < PAGETABLE_ENTRIES);
+
+    /*
+     * At the moment, p2m_get_root_pointer() returns one of four possible p2m
+     * root pages, so there is no need to search for the correct ->pt_page
+     * here.
+     * Non-root page tables are 4 KB pages, so simply using ->pt_page is
+     * sufficient.
+     */
+    md_pg = &ctx->pt_page->v.md.pg;
+
+    if ( !*md_pg && (t >= p2m_first_external) )
+    {
+        BUG_ON(ctx->level > P2M_MAX_SUPPORTED_LEVEL_MAPPING);
+
+        if ( ctx->level <= P2M_MAX_SUPPORTED_LEVEL_MAPPING )
+        {
+            /*
+             * Since p2m_alloc_page() initializes an allocated page with zeros, p2m_invalid
+             * is expected to have the value 0 as well. This ensures that if a metadata
+             * page is accessed before being properly initialized, the correct type
+             * (p2m_invalid in this case) will be returned.
+             */
+            BUILD_BUG_ON(p2m_invalid);
+
+            *md_pg = p2m_alloc_page(p2m);
+            if ( !*md_pg )
+            {
+                printk("%pd: can't allocate metadata page\n", p2m->domain);
+                domain_crash(p2m->domain);
+
+                return;
+            }
+        }
+    }
+
+    if ( *md_pg )
+        metadata = __map_domain_page(*md_pg);
+
+    if ( t >= p2m_first_external )
+    {
+        metadata[ctx->index].type = t;
+
+        t = p2m_ext_storage;
+    }
+    else if ( metadata )
+        metadata[ctx->index].type = p2m_invalid;
+
+    pte->pte |= MASK_INSR(t, P2M_TYPE_PTE_BITS_MASK);
+
+    unmap_domain_page(metadata);
 }
 
-static p2m_type_t p2m_get_type(const pte_t pte)
+/*
+ * `pte` -> PTE entry that stores the PTE's type.
+ *
+ * If the PTE's type is `p2m_ext_storage`, `ctx` should be provided;
+ * otherwise it could be NULL.
+ */
+static p2m_type_t p2m_get_type(const pte_t pte, const struct p2m_pte_ctx *ctx)
 {
     p2m_type_t type = MASK_EXTR(pte.pte, P2M_TYPE_PTE_BITS_MASK);
 
+    /*
+     * Since the PTE is initialized with all zeros by default, p2m_invalid must
+     * have the value 0. This ensures that if p2m_get_type() is called for a GFN
+     * that hasn't been initialized, the correct type (p2m_invalid in this case)
+     * will be returned. It also guarantees that metadata won't be touched when
+     * the GFN hasn't been initialized.
+     */
+    BUILD_BUG_ON(p2m_invalid);
+
     if ( type == p2m_ext_storage )
-        panic("unimplemented\n");
+    {
+        const struct md_t *md = __map_domain_page(ctx->pt_page->v.md.pg);
+
+        type = md[ctx->index].type;
+
+        unmap_domain_page(md);
+    }
 
     return type;
 }
@@ -481,7 +589,15 @@ static void p2m_set_permission(pte_t *e, p2m_type_t t)
     }
 }
 
-static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t, bool is_table)
+/*
+ * If p2m_pte_from_mfn() is called with p2m_pte_ctx = NULL and p2m = NULL,
+ * it means the function is working with a page table for which the `t`
+ * should not be applicable. Otherwise, the function is handling a leaf PTE
+ * for which `t` is applicable.
+ */
+static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t,
+                              struct p2m_pte_ctx *p2m_pte_ctx,
+                              struct p2m_domain *p2m)
 {
     pte_t e = (pte_t) { PTE_VALID };
 
@@ -489,7 +605,7 @@ static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t, bool is_table)
 
     ASSERT(!(mfn_to_maddr(mfn) & ~PADDR_MASK) || mfn_eq(mfn, INVALID_MFN));
 
-    if ( !is_table )
+    if ( p2m_pte_ctx )
     {
         switch ( t )
         {
@@ -502,7 +618,7 @@ static pte_t p2m_pte_from_mfn(mfn_t mfn, p2m_type_t t, bool is_table)
         }
 
         p2m_set_permission(&e, t);
-        p2m_set_type(&e, t);
+        p2m_set_type(&e, t, p2m_pte_ctx, p2m);
     }
     else
         /*
@@ -522,7 +638,22 @@ static pte_t page_to_p2m_table(const struct page_info *page)
      * set to true and p2m_type_t shouldn't be applied for PTEs which
      * describe an intermediate table.
      */
-    return p2m_pte_from_mfn(page_to_mfn(page), p2m_invalid, true);
+    return p2m_pte_from_mfn(page_to_mfn(page), p2m_invalid, NULL, NULL);
+}
+
+static void p2m_free_page(struct p2m_domain *p2m, struct page_info *pg);
+
+/*
+ * Free page table's page and metadata page linked to page table's page.
+ */
+static void p2m_free_table(struct p2m_domain *p2m, struct page_info *tbl_pg)
+{
+    if ( tbl_pg->v.md.pg )
+    {
+        p2m_free_page(p2m, tbl_pg->v.md.pg);
+        tbl_pg->v.md.pg = NULL;
+    }
+    p2m_free_page(p2m, tbl_pg);
 }
 
 /* Allocate a new page table page and hook it in via the given entry. */
@@ -683,12 +814,14 @@ static void p2m_free_page(struct p2m_domain *p2m, struct page_info *pg)
 
 /* Free pte sub-tree behind an entry */
 static void p2m_free_subtree(struct p2m_domain *p2m,
-                             pte_t entry, unsigned int level)
+                             pte_t entry,
+                             const struct p2m_pte_ctx *p2m_pte_ctx)
 {
     unsigned int i;
     pte_t *table;
     mfn_t mfn;
     struct page_info *pg;
+    unsigned int level = p2m_pte_ctx->level;
 
     /*
      * Check if the level is valid: only 4K - 2M - 1G mappings are supported.
@@ -704,7 +837,7 @@ static void p2m_free_subtree(struct p2m_domain *p2m,
 
     if ( pte_is_mapping(entry) )
     {
-        p2m_type_t p2mt = p2m_get_type(entry);
+        p2m_type_t p2mt = p2m_get_type(entry, p2m_pte_ctx);
 
 #ifdef CONFIG_IOREQ_SERVER
         /*
@@ -723,10 +856,21 @@ static void p2m_free_subtree(struct p2m_domain *p2m,
         return;
     }
 
-    table = map_domain_page(pte_get_mfn(entry));
+    mfn = pte_get_mfn(entry);
+    ASSERT(mfn_valid(mfn));
+    table = map_domain_page(mfn);
+    pg = mfn_to_page(mfn);
 
     for ( i = 0; i < P2M_PAGETABLE_ENTRIES(p2m, level); i++ )
-        p2m_free_subtree(p2m, table[i], level - 1);
+    {
+        struct p2m_pte_ctx tmp_ctx = {
+            .pt_page = pg,
+            .index = i,
+            .level = level - 1,
+        };
+
+        p2m_free_subtree(p2m, table[i], &tmp_ctx);
+    }
 
     unmap_domain_page(table);
 
@@ -738,17 +882,13 @@ static void p2m_free_subtree(struct p2m_domain *p2m,
      */
     p2m_tlb_flush_sync(p2m);
 
-    mfn = pte_get_mfn(entry);
-    ASSERT(mfn_valid(mfn));
-
-    pg = mfn_to_page(mfn);
-
-    p2m_free_page(p2m, pg);
+    p2m_free_table(p2m, pg);
 }
 
 static bool p2m_split_superpage(struct p2m_domain *p2m, pte_t *entry,
                                 unsigned int level, unsigned int target,
-                                const unsigned int *offsets)
+                                const unsigned int *offsets,
+                                struct page_info *tbl_pg)
 {
     struct page_info *page;
     unsigned long i;
@@ -760,6 +900,10 @@ static bool p2m_split_superpage(struct p2m_domain *p2m, pte_t *entry,
     unsigned int next_level = level - 1;
     unsigned int level_order = P2M_LEVEL_ORDER(next_level);
 
+    struct p2m_pte_ctx p2m_pte_ctx;
+    /* Init with p2m_invalid just to make compiler happy. */
+    p2m_type_t old_type = p2m_invalid;
+
     /*
      * This should only be called with target != level and the entry is
      * a superpage.
@@ -781,6 +925,22 @@ static bool p2m_split_superpage(struct p2m_domain *p2m, pte_t *entry,
 
     table = __map_domain_page(page);
 
+    if ( MASK_EXTR(entry->pte, P2M_TYPE_PTE_BITS_MASK) == p2m_ext_storage )
+    {
+        p2m_pte_ctx.pt_page = tbl_pg;
+        p2m_pte_ctx.index = offsets[level];
+        /*
+         * It doesn't really matter what is a value for a level as
+         * p2m_get_type() doesn't need it, so it is initialized just in case.
+         */
+        p2m_pte_ctx.level = level;
+
+        old_type = p2m_get_type(*entry, &p2m_pte_ctx);
+    }
+
+    p2m_pte_ctx.pt_page = page;
+    p2m_pte_ctx.level = next_level;
+
     for ( i = 0; i < P2M_PAGETABLE_ENTRIES(p2m, next_level); i++ )
     {
         pte_t *new_entry = table + i;
@@ -792,6 +952,13 @@ static bool p2m_split_superpage(struct p2m_domain *p2m, pte_t *entry,
         pte = *entry;
         pte_set_mfn(&pte, mfn_add(mfn, i << level_order));
 
+        if ( MASK_EXTR(pte.pte, P2M_TYPE_PTE_BITS_MASK) == p2m_ext_storage )
+        {
+            p2m_pte_ctx.index = i;
+
+            p2m_set_type(&pte, old_type, &p2m_pte_ctx, p2m);
+        }
+
         write_pte(new_entry, pte);
     }
 
@@ -803,7 +970,7 @@ static bool p2m_split_superpage(struct p2m_domain *p2m, pte_t *entry,
      */
     if ( next_level != target )
         rv = p2m_split_superpage(p2m, table + offsets[next_level],
-                                 next_level, target, offsets);
+                                 next_level, target, offsets, page);
 
     if ( p2m->clean_dcache )
         clean_dcache_va_range(table, PAGE_SIZE);
@@ -894,13 +1061,21 @@ static int p2m_set_entry(struct p2m_domain *p2m,
     {
         /* We need to split the original page. */
         pte_t split_pte = *entry;
+        struct page_info *tbl_pg = mfn_to_page(domain_page_map_to_mfn(table));
 
         ASSERT(pte_is_superpage(*entry, level));
 
-        if ( !p2m_split_superpage(p2m, &split_pte, level, target, offsets) )
+        if ( !p2m_split_superpage(p2m, &split_pte, level, target, offsets,
+                                  tbl_pg) )
         {
+            struct p2m_pte_ctx tmp_ctx = {
+                .pt_page = tbl_pg,
+                .index = offsets[level],
+                .level = level,
+            };
+
             /* Free the allocated sub-tree */
-            p2m_free_subtree(p2m, split_pte, level);
+            p2m_free_subtree(p2m, split_pte, &tmp_ctx);
 
             rc = -ENOMEM;
             goto out;
@@ -938,7 +1113,13 @@ static int p2m_set_entry(struct p2m_domain *p2m,
         p2m_clean_pte(entry, p2m->clean_dcache);
     else
     {
-        pte_t pte = p2m_pte_from_mfn(mfn, t, false);
+        struct p2m_pte_ctx tmp_ctx = {
+            .pt_page = mfn_to_page(domain_page_map_to_mfn(table)),
+            .index = offsets[level],
+            .level = level,
+        };
+
+        pte_t pte = p2m_pte_from_mfn(mfn, t, &tmp_ctx, p2m);
 
         p2m_write_pte(entry, pte, p2m->clean_dcache);
 
@@ -974,7 +1155,15 @@ static int p2m_set_entry(struct p2m_domain *p2m,
     if ( pte_is_valid(orig_pte) &&
          (!pte_is_valid(*entry) ||
           !mfn_eq(pte_get_mfn(*entry), pte_get_mfn(orig_pte))) )
-        p2m_free_subtree(p2m, orig_pte, level);
+    {
+        struct p2m_pte_ctx tmp_ctx = {
+            .pt_page = mfn_to_page(domain_page_map_to_mfn(table)),
+            .index = offsets[level],
+            .level = level,
+        };
+
+        p2m_free_subtree(p2m, orig_pte, &tmp_ctx);
+    }
 
  out:
     unmap_domain_page(table);
@@ -1173,7 +1362,15 @@ static mfn_t p2m_get_entry(struct p2m_domain *p2m, gfn_t gfn,
     if ( pte_is_valid(entry) )
     {
         if ( t )
-            *t = p2m_get_type(entry);
+        {
+            struct p2m_pte_ctx p2m_pte_ctx = {
+                .pt_page = mfn_to_page(domain_page_map_to_mfn(table)),
+                .index = offsets[level],
+                .level = level,
+            };
+
+            *t = p2m_get_type(entry, &p2m_pte_ctx);
+        }
 
         mfn = pte_get_mfn(entry);
 
-- 
2.51.1



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Date: Mon, 24 Nov 2025 13:45:36 +0100
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Subject: Re: [PATCH v3 1/4] build: add make macro for making file from file.in
To: Jan Beulich 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <20251121132332.23514-1-jgross@suse.com>
 <20251121132332.23514-2-jgross@suse.com>
 
 <826037a5-dacf-434f-90d9-8f12e61bdd6e@suse.com>
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 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
Message-ID: 
Subject: Re: [PATCH v3 1/4] build: add make macro for making file from file.in
References: <20251121132332.23514-1-jgross@suse.com>
 <20251121132332.23514-2-jgross@suse.com>
 
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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v6 17/19] xen/riscv: implement mfn_valid() and page reference, ownership handling helpers
Date: Mon, 24 Nov 2025 13:33:50 +0100
Message-ID: <00e300afe000fc123582e7c124971fe7bae9fc86.1763986955.git.oleksii.kurochko@gmail.com>
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Implement the mfn_valid() macro to verify whether a given MFN is valid by
checking that it falls within the range [start_page, max_page).
These bounds are initialized based on the start and end addresses of RAM.

As part of this patch, start_page is introduced and initialized with the
PFN of the first RAM page.
Also, initialize pdx_group_valid() by calling set_pdx_range() when
memory banks are being mapped.

Also, after providing a non-stub implementation of the mfn_valid() macro,
the following compilation errors started to occur:
  riscv64-linux-gnu-ld: prelink.o: in function `alloc_heap_pages':
  /build/xen/common/page_alloc.c:1054: undefined reference to `page_is_offlinable'
  riscv64-linux-gnu-ld: /build/xen/common/page_alloc.c:1035: undefined reference to `page_is_offlinable'
  riscv64-linux-gnu-ld: prelink.o: in function `reserve_offlined_page':
  /build/xen/common/page_alloc.c:1151: undefined reference to `page_is_offlinable'
  riscv64-linux-gnu-ld: ./.xen-syms.0: hidden symbol `page_is_offlinable' isn't defined
  riscv64-linux-gnu-ld: final link failed: bad value
  make[2]: *** [arch/riscv/Makefile:28: xen-syms] Error 1

To resolve these errors, the following functions have also been introduced,
based on their Arm counterparts:
- page_get_owner_and_reference() and its variant to safely acquire a
  reference to a page and retrieve its owner.
- Implement page_is_offlinable() to return false for RISC-V.

Signed-off-by: Oleksii Kurochko 
Acked-by: Jan Beulich 
---
Changes in V6:
 - Nothing changed. Only rebase.
---
Changes in V5:
- Move declaration/defintion of page_is_offlinale() before put_page() to have
  get_ and put_ functions together.
- Correct code style of do-while loop.
- Add Acked-by: Jan Beulich .
---
Changes in V4:
 - Rebase the patch on top of patch series "[PATCH v2 0/2] constrain page_is_ram_type() to x86".
 - Add implementation of page_is_offlinable() instead of page_is_ram().
 - Update the commit message.
---
Changes in V3:
 - Update defintion of mfn_valid().
 - Use __ro_after_init for variable start_page.
 - Drop ASSERT_UNREACHABLE() in page_get_owner_and_nr_reference().
 - Update the comment inside do/while in page_get_owner_and_nr_reference().
 - Define _PGC_static and drop "#ifdef CONFIG_STATIC_MEMORY" in put_page_nr().
 - Initialize pdx_group_valid() by calling set_pdx_range() when memory banks are mapped.
 - Drop page_get_owner_and_nr_reference() and implement page_get_owner_and_reference()
   without reusing of a page_get_owner_and_nr_reference() to avoid potential dead code.
 - Move defintion of get_page() to "xen/riscv: add support of page lookup by GFN", where
   it is really used.
---
Changes in V2:
 - New patch.
---

 xen/arch/riscv/include/asm/mm.h |  9 +++++++--
 xen/arch/riscv/mm.c             | 32 ++++++++++++++++++++++++++++++++
 2 files changed, 39 insertions(+), 2 deletions(-)

diff --git a/xen/arch/riscv/include/asm/mm.h b/xen/arch/riscv/include/asm/mm.h
index 0503c92e6c..1b16809749 100644
--- a/xen/arch/riscv/include/asm/mm.h
+++ b/xen/arch/riscv/include/asm/mm.h
@@ -5,6 +5,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -300,8 +301,12 @@ static inline bool arch_mfns_in_directmap(unsigned long mfn, unsigned long nr)
 #define page_get_owner(p)    (p)->v.inuse.domain
 #define page_set_owner(p, d) ((p)->v.inuse.domain = (d))
 
-/* TODO: implement */
-#define mfn_valid(mfn) ({ (void)(mfn); 0; })
+extern unsigned long start_page;
+
+#define mfn_valid(mfn) ({                                               \
+    unsigned long tmp_mfn = mfn_x(mfn);                                 \
+    likely((tmp_mfn >= start_page)) && likely(__mfn_valid(tmp_mfn));    \
+})
 
 #define domain_set_alloc_bitsize(d) ((void)(d))
 #define domain_clamp_alloc_bitsize(d, b) ((void)(d), (b))
diff --git a/xen/arch/riscv/mm.c b/xen/arch/riscv/mm.c
index 2e42293986..e25f995b72 100644
--- a/xen/arch/riscv/mm.c
+++ b/xen/arch/riscv/mm.c
@@ -521,6 +521,8 @@ static void __init setup_directmap_mappings(unsigned long base_mfn,
 #error setup_{directmap,frametable}_mapping() should be implemented for RV_32
 #endif
 
+unsigned long __ro_after_init start_page;
+
 /*
  * Setup memory management
  *
@@ -570,9 +572,13 @@ void __init setup_mm(void)
         ram_end = max(ram_end, bank_end);
 
         setup_directmap_mappings(PFN_DOWN(bank_start), PFN_DOWN(bank_size));
+
+        set_pdx_range(paddr_to_pfn(bank_start), paddr_to_pfn(bank_end));
     }
 
     setup_frametable_mappings(ram_start, ram_end);
+
+    start_page = PFN_DOWN(ram_start);
     max_page = PFN_DOWN(ram_end);
 }
 
@@ -623,6 +629,11 @@ void flush_page_to_ram(unsigned long mfn, bool sync_icache)
         invalidate_icache();
 }
 
+bool page_is_offlinable(mfn_t mfn)
+{
+    return false;
+}
+
 void put_page(struct page_info *page)
 {
     unsigned long nx, x, y = page->count_info;
@@ -641,3 +652,24 @@ void put_page(struct page_info *page)
             free_domheap_page(page);
     }
 }
+
+struct domain *page_get_owner_and_reference(struct page_info *page)
+{
+    unsigned long x, y = page->count_info;
+    struct domain *owner;
+
+    do {
+        x = y;
+        /*
+         * Count ==  0: Page is not allocated, so we cannot take a reference.
+         * Count == -1: Reference count would wrap, which is invalid.
+         */
+        if ( unlikely(((x + 1) & PGC_count_mask) <= 1) )
+            return NULL;
+    } while ( (y = cmpxchg(&page->count_info, x, x + 1)) != x );
+
+    owner = page_get_owner(page);
+    ASSERT(owner);
+
+    return owner;
+}
-- 
2.51.1



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        Mon, 24 Nov 2025 04:34:28 -0800 (PST)
From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v6 18/19] xen/riscv: add support of page lookup by GFN
Date: Mon, 24 Nov 2025 13:33:51 +0100
Message-ID: <48a58cde3de6a459885465c6d29d00d046ae4a37.1763986955.git.oleksii.kurochko@gmail.com>
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Introduce helper functions for safely querying the P2M (physical-to-machine)
mapping:
 - add p2m_read_lock(), p2m_read_unlock(), and p2m_is_locked() for managing
   P2M lock state.
 - Implement p2m_get_entry() to retrieve mapping details for a given GFN,
   including MFN, page order, and validity.
 - Introduce p2m_get_page_from_gfn() to convert a GFN into a page_info
   pointer, acquiring a reference to the page if valid.
 - Introduce get_page().

Implementations are based on Arm's functions with some minor modifications:
- p2m_get_entry():
  - Reverse traversal of page tables, as RISC-V uses the opposite level
    numbering compared to Arm.
  - Removed the return of p2m_access_t from p2m_get_entry() since
    mem_access_settings is not introduced for RISC-V.
  - Updated BUILD_BUG_ON() to check using the level 0 mask, which corresponds
    to Arm's THIRD_MASK.
  - Replaced open-coded bit shifts with the BIT() macro.

Signed-off-by: Oleksii Kurochko 
---
Changes in V6:
 - Move if-condition with initialization up in p2m_get_page_from_gfn().
 - Pass p2mt to the call of p2m_get_entry() inside p2m_get_page_from_gfn()
   to avoid an issue when 't' is passed NULL. With p2mt passed to p2m_get_entry()
   we will recieve a proper type and so the rest of the function will able to
   continue use a proper type.
- In check_outside_boundary() in the case when is_lower == true fill the bottom
  bits of masked_gfn with all 1s.
- Update code of check_outside_boundary() to return proper level in the case when
  `level` is equal to 0.
- Add ASSERT(p2m) in check_outside_boundary() to be sure that p2m isn't NULL as
  P2M_LEVEL_MASK() depends on p2m value.
---
Changes in V5:
 - Use introduced in earlier patches P2M_DECLARE_OFFSETS() instead of
   DECLARE_OFFSETS().
 - Drop blank line before check_outside_boundary().
 - Use more readable version of if statements inside check_outside_boundary().
 - Accumulate mask in check_outside_boundary() instead of re-writing it for
   each page table level to have correct gfns for comparison.
 - Set argument `t` of p2m_get_entry() to p2m_invalid by default.
 - Drop checking of (rc == P2M_TABLE_MAP_NOMEM ) when p2m_next_level(...,false,...)
   is called.
 - Add ASSERT(mfn & (BIT(P2M_LEVEL_ORDER(level), UL) - 1)); in p2m_get_entry()
   to be sure that recieved `mfn` has cleared lowest bits.
 - Drop `valid` argument from p2m_get_entry(), it is not needed anymore.
 - Drop p2m_lookup(), use p2m_get_entry() explicitly inside p2m_get_page_from_gfn().
 - Update the commit message.
---
Changes in V4:
 - Update prototype of p2m_is_locked() to return bool and accept pointer-to-const.
 - Correct the comment above p2m_get_entry().
 - Drop the check "BUILD_BUG_ON(XEN_PT_LEVEL_MAP_MASK(0) != PAGE_MASK);" inside
   p2m_get_entry() as it is stale and it was needed to sure that 4k page(s) are
   used on L3 (in Arm terms) what is true for RISC-V. (if not special extension
   are used). It was another reason for Arm to have it (and I copied it to RISC-V),
   but it isn't true for RISC-V. (some details could be found in response to the
   patch).
 - Style fixes.
 - Add explanatory comment what the loop inside "gfn is higher then the highest
   p2m mapping" does. Move this loop to separate function check_outside_boundary()
   to cover both boundaries (lower_mapped_gfn and max_mapped_gfn).
 - There is not need to allocate a page table as it is expected that
   p2m_get_entry() normally would be called after a corresponding p2m_set_entry()
   was called. So change 'true' to 'false' in a page table walking loop inside
   p2m_get_entry().
 - Correct handling of p2m_is_foreign case inside p2m_get_page_from_gfn().
 - Introduce and use P2M_LEVEL_MASK instead of XEN_PT_LEVEL_MASK as it isn't take
   into account two extra bits for root table in case of P2M.
 - Drop stale item from "change in v3" - Add is_p2m_foreign() macro and connected stuff.
 - Add p2m_read_(un)lock().
---
Changes in V3:
 - Change struct domain *d argument of p2m_get_page_from_gfn() to
   struct p2m_domain.
 - Update the comment above p2m_get_entry().
 - s/_t/p2mt for local variable in p2m_get_entry().
 - Drop local variable addr in p2m_get_entry() and use gfn_to_gaddr(gfn)
   to define offsets array.
 - Code style fixes.
 - Update a check of rc code from p2m_next_level() in p2m_get_entry()
   and drop "else" case.
 - Do not call p2m_get_type() if p2m_get_entry()'s t argument is NULL.
 - Use struct p2m_domain instead of struct domain for p2m_lookup() and
   p2m_get_page_from_gfn().
 - Move defintion of get_page() from "xen/riscv: implement mfn_valid() and page reference, ownership handling helpers"
---
Changes in V2:
 - New patch.
---

 xen/arch/riscv/include/asm/p2m.h |  21 ++++
 xen/arch/riscv/mm.c              |  13 +++
 xen/arch/riscv/p2m.c             | 183 +++++++++++++++++++++++++++++++
 3 files changed, 217 insertions(+)

diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h
index b48693a2b4..f63b5dec99 100644
--- a/xen/arch/riscv/include/asm/p2m.h
+++ b/xen/arch/riscv/include/asm/p2m.h
@@ -41,6 +41,9 @@
 
 #define P2M_GFN_LEVEL_SHIFT(lvl) (P2M_LEVEL_ORDER(lvl) + PAGE_SHIFT)
 
+#define P2M_LEVEL_MASK(p2m, lvl) \
+    (P2M_TABLE_OFFSET(p2m, lvl) << P2M_GFN_LEVEL_SHIFT(lvl))
+
 #define paddr_bits PADDR_BITS
 
 /* Get host p2m table */
@@ -234,6 +237,24 @@ static inline bool p2m_is_write_locked(struct p2m_domain *p2m)
 
 unsigned long construct_hgatp(const struct p2m_domain *p2m, uint16_t vmid);
 
+static inline void p2m_read_lock(struct p2m_domain *p2m)
+{
+    read_lock(&p2m->lock);
+}
+
+static inline void p2m_read_unlock(struct p2m_domain *p2m)
+{
+    read_unlock(&p2m->lock);
+}
+
+static inline bool p2m_is_locked(const struct p2m_domain *p2m)
+{
+    return rw_is_locked(&p2m->lock);
+}
+
+struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn,
+                                        p2m_type_t *t);
+
 #endif /* ASM__RISCV__P2M_H */
 
 /*
diff --git a/xen/arch/riscv/mm.c b/xen/arch/riscv/mm.c
index e25f995b72..e9ce182d06 100644
--- a/xen/arch/riscv/mm.c
+++ b/xen/arch/riscv/mm.c
@@ -673,3 +673,16 @@ struct domain *page_get_owner_and_reference(struct page_info *page)
 
     return owner;
 }
+
+bool get_page(struct page_info *page, const struct domain *domain)
+{
+    const struct domain *owner = page_get_owner_and_reference(page);
+
+    if ( likely(owner == domain) )
+        return true;
+
+    if ( owner != NULL )
+        put_page(page);
+
+    return false;
+}
diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c
index b29c0a220a..c356200fc6 100644
--- a/xen/arch/riscv/p2m.c
+++ b/xen/arch/riscv/p2m.c
@@ -1061,3 +1061,186 @@ int map_regions_p2mt(struct domain *d,
 
     return rc;
 }
+
+/*
+ * p2m_get_entry() should always return the correct order value, even if an
+ * entry is not present (i.e. the GFN is outside the range):
+ *   [p2m->lowest_mapped_gfn, p2m->max_mapped_gfn]    (1)
+ *
+ * This ensures that callers of p2m_get_entry() can determine what range of
+ * address space would be altered by a corresponding p2m_set_entry().
+ * Also, it would help to avoid costly page walks for GFNs outside range (1).
+ *
+ * Therefore, this function returns true for GFNs outside range (1), and in
+ * that case the corresponding level is returned via the level_out argument.
+ * Otherwise, it returns false and p2m_get_entry() performs a page walk to
+ * find the proper entry.
+ */
+static bool check_outside_boundary(const struct p2m_domain *p2m, gfn_t gfn,
+                                   gfn_t boundary, bool is_lower,
+                                   unsigned int *level_out)
+{
+    unsigned int level = P2M_ROOT_LEVEL(p2m);
+    bool ret = false;
+
+    ASSERT(p2m);
+
+    if ( is_lower ? gfn_x(gfn) < gfn_x(boundary)
+                  : gfn_x(gfn) > gfn_x(boundary) )
+    {
+        unsigned long mask = 0;
+
+        for ( ; level; level-- )
+        {
+            unsigned long masked_gfn;
+
+            mask |= PFN_DOWN(P2M_LEVEL_MASK(p2m, level));
+            masked_gfn = gfn_x(gfn) & mask;
+            masked_gfn |= (is_lower * (BIT(P2M_LEVEL_ORDER(level), UL) - 1));
+
+            if ( is_lower ? masked_gfn < gfn_x(boundary)
+                          : masked_gfn > gfn_x(boundary) )
+                break;
+        }
+
+        ret = true;
+    }
+
+    if ( level_out )
+        *level_out = level;
+
+    return ret;
+}
+
+/*
+ * Get the details of a given gfn.
+ *
+ * If the entry is present, the associated MFN will be returned and the
+ * p2m type of the mapping.
+ * The page_order will correspond to the order of the mapping in the page
+ * table (i.e it could be a superpage).
+ *
+ * If the entry is not present, INVALID_MFN will be returned and the
+ * page_order will be set according to the order of the invalid range.
+ */
+static mfn_t p2m_get_entry(struct p2m_domain *p2m, gfn_t gfn,
+                           p2m_type_t *t,
+                           unsigned int *page_order)
+{
+    unsigned int level = 0;
+    pte_t entry, *table;
+    int rc;
+    mfn_t mfn = INVALID_MFN;
+    P2M_BUILD_LEVEL_OFFSETS(p2m, offsets, gfn_to_gaddr(gfn));
+
+    ASSERT(p2m_is_locked(p2m));
+
+    if ( t )
+        *t = p2m_invalid;
+
+    if ( check_outside_boundary(p2m, gfn, p2m->lowest_mapped_gfn, true,
+                                &level) )
+        goto out;
+
+    if ( check_outside_boundary(p2m, gfn, p2m->max_mapped_gfn, false, &level) )
+        goto out;
+
+    table = p2m_get_root_pointer(p2m, gfn);
+
+    /*
+     * The table should always be non-NULL because the gfn is below
+     * p2m->max_mapped_gfn and the root table pages are always present.
+     */
+    if ( !table )
+    {
+        ASSERT_UNREACHABLE();
+        level = P2M_ROOT_LEVEL(p2m);
+        goto out;
+    }
+
+    for ( level = P2M_ROOT_LEVEL(p2m); level; level-- )
+    {
+        rc = p2m_next_level(p2m, false, level, &table, offsets[level]);
+        if ( rc == P2M_TABLE_MAP_NONE )
+            goto out_unmap;
+
+        if ( rc != P2M_TABLE_NORMAL )
+            break;
+    }
+
+    entry = table[offsets[level]];
+
+    if ( pte_is_valid(entry) )
+    {
+        if ( t )
+            *t = p2m_get_type(entry);
+
+        mfn = pte_get_mfn(entry);
+
+        ASSERT(!(mfn_x(mfn) & (BIT(P2M_LEVEL_ORDER(level), UL) - 1)));
+
+        /*
+         * The entry may point to a superpage. Find the MFN associated
+         * to the GFN.
+         */
+        mfn = mfn_add(mfn,
+                      gfn_x(gfn) & (BIT(P2M_LEVEL_ORDER(level), UL) - 1));
+    }
+
+ out_unmap:
+    unmap_domain_page(table);
+
+ out:
+    if ( page_order )
+        *page_order = P2M_LEVEL_ORDER(level);
+
+    return mfn;
+}
+
+struct page_info *p2m_get_page_from_gfn(struct p2m_domain *p2m, gfn_t gfn,
+                                        p2m_type_t *t)
+{
+    struct page_info *page;
+    p2m_type_t p2mt;
+    mfn_t mfn;
+
+    p2m_read_lock(p2m);
+    mfn = p2m_get_entry(p2m, gfn, &p2mt, NULL);
+
+    if ( t )
+        *t = p2mt;
+
+    if ( !mfn_valid(mfn) )
+    {
+        p2m_read_unlock(p2m);
+        return NULL;
+    }
+
+    page = mfn_to_page(mfn);
+
+    /*
+     * get_page won't work on foreign mapping because the page doesn't
+     * belong to the current domain.
+     */
+    if ( unlikely(p2m_is_foreign(p2mt)) )
+    {
+        const struct domain *fdom = page_get_owner_and_reference(page);
+
+        p2m_read_unlock(p2m);
+
+        if ( fdom )
+        {
+            if ( likely(fdom != p2m->domain) )
+                return page;
+
+            ASSERT_UNREACHABLE();
+            put_page(page);
+        }
+
+        return NULL;
+    }
+
+    p2m_read_unlock(p2m);
+
+    return get_page(page, p2m->domain) ? page : NULL;
+}
-- 
2.51.1



From xen-devel-bounces@lists.xenproject.org Mon Nov 24 12:48:10 2025
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Subject: Re: [PATCH v4 06/12] mm: introduce generic lazy_mmu helpers
From: Kevin Brodsky 
To: Ryan Roberts , linux-mm@kvack.org
Cc: linux-kernel@vger.kernel.org, Alexander Gordeev ,
 Andreas Larsson ,
 Andrew Morton ,
 Boris Ostrovsky , Borislav Petkov
 , Catalin Marinas ,
 Christophe Leroy ,
 Dave Hansen ,
 David Hildenbrand , "David S. Miller"
 , David Woodhouse ,
 "H. Peter Anvin" , Ingo Molnar ,
 Jann Horn , Juergen Gross ,
 "Liam R. Howlett" ,
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 Madhavan Srinivasan ,
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 , Thomas Gleixner ,
 Vlastimil Babka , Will Deacon ,
 Yeoreum Yun , linux-arm-kernel@lists.infradead.org,
 linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org,
 xen-devel@lists.xenproject.org, x86@kernel.org
References: <20251029100909.3381140-1-kevin.brodsky@arm.com>
 <20251029100909.3381140-7-kevin.brodsky@arm.com>
 <71418b31-aedb-4600-9558-842515dd6c44@arm.com>
 
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On 10/11/2025 11:45, Kevin Brodsky wrote:
>>> diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
>>> index b8d37eb037fc..d9c8e94f140f 100644
>>> --- a/arch/arm64/mm/mmu.c
>>> +++ b/arch/arm64/mm/mmu.c
>>> @@ -731,7 +731,7 @@ int split_kernel_leaf_mapping(unsigned long start, unsigned long end)
>>>  		return -EINVAL;
>>>  
>>>  	mutex_lock(&pgtable_split_lock);
>>> -	arch_enter_lazy_mmu_mode();
>>> +	lazy_mmu_mode_enable();
>>>  
>>>  	/*
>>>  	 * The split_kernel_leaf_mapping_locked() may sleep, it is not a
>> This is a bit unfortunate, IMHO. The rest of this comment explains that although
>> you're not supposed to sleep inside lazy mmu mode, it's fine for arm64's
>> implementation. But we are no longer calling arm64's implementation; we are
>> calling a generic function, which does who knows what.
>>
>> I think it all still works, but we are no longer containing our assumptions in
>> arm64 code. We are relying on implementation details of generic code.
> I see your point. The change itself is still correct (and required
> considering patch 8), but maybe the documentation of the generic
> interface should be clarified to guarantee that the generic layer can
> itself cope with sleeping - without any guarantee regarding the
> behaviour of arch_*_lazy_mmu_mode.

Re-reading the existing comment in , I think it already
makes clear that sleeping is not forbidden by design:

>  * In the general case, no lock is guaranteed to be held between entry
> and exit
>  * of the lazy mode. So the implementation must assume preemption may
> be enabled
>  * and cpu migration is possible; it must take steps to be robust
> against this.

The arch implementation may disable preemption, but arm64 code can rely
on the arm64 implementation allowing sleeping.

- Kevin



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Subject: Re: [PATCH 11/12] x86/irq: convert irq_desc old_cpu_mask field to
 integer
To: Roger Pau Monne 
Cc: Andrew Cooper , xen-devel@lists.xenproject.org
References: <20251120090637.25087-1-roger.pau@citrix.com>
 <20251120095826.25782-1-roger.pau@citrix.com>
 <20251120095826.25782-6-roger.pau@citrix.com>
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In-Reply-To: <20251120095826.25782-6-roger.pau@citrix.com>
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On 20.11.2025 10:58, Roger Pau Monne wrote:
> --- a/xen/arch/x86/irq.c
> +++ b/xen/arch/x86/irq.c
> @@ -115,7 +115,7 @@ static void release_old_vec(struct irq_desc *desc)
>      unsigned int vector = desc->arch.old_vector;
>  
>      desc->arch.old_vector = IRQ_VECTOR_UNASSIGNED;
> -    cpumask_clear(desc->arch.old_cpu_mask);
> +    desc->arch.old_cpu = CPU_INVALID;

With this, ...

> @@ -221,10 +220,10 @@ static void _clear_irq_vector(struct irq_desc *desc)
>      {
>          /* If we were in motion, also clear desc->arch.old_vector */
>          old_vector = desc->arch.old_vector;
> -        cpumask_and(tmp_mask, desc->arch.old_cpu_mask, &cpu_online_map);
>  
> -        for_each_cpu(cpu, tmp_mask)
> +        if ( cpu_online(desc->arch.old_cpu) )

... you pretty certainly want to guard against the value making it here (even
if just accidentally), and thus triggering the assertion in cpumask_check().
(Again possibly elsewhere as well.)

> @@ -581,16 +575,16 @@ static int _assign_irq_vector(struct irq_desc *desc, const cpumask_t *mask)
>               * in the 'mask' parameter.
>               */
>              desc->arch.vector = desc->arch.old_vector;
> -            desc->arch.cpu = cpumask_any(desc->arch.old_cpu_mask);
> +            desc->arch.cpu = desc->arch.old_cpu;
>  
>              /* Undo any possibly done cleanup. */
>              per_cpu(vector_irq, desc->arch.cpu)[desc->arch.vector] = irq;
>  
>              /* Cancel the pending move and release the current vector. */
>              desc->arch.old_vector = IRQ_VECTOR_UNASSIGNED;
> -            cpumask_clear(desc->arch.old_cpu_mask);
> +            desc->arch.old_cpu = CPU_INVALID;
>              desc->arch.move_in_progress = 0;
> -            desc->arch.move_cleanup_count = 0;
> +            desc->arch.move_cleanup =  false;

Nit: Excess blank.

> @@ -2003,7 +1994,7 @@ void do_IRQ(struct cpu_user_regs *regs)
>                             ~irq, CPUMASK_PR(desc->affinity),
>                             /* TODO: handle hipri vectors nicely. */
>                             CPUMASK_PR(get_cpumask(desc->arch.cpu)),
> -                           CPUMASK_PR(desc->arch.old_cpu_mask),
> +                           CPUMASK_PR(get_cpumask(desc->arch.old_cpu)),

I should have asked on the previous patch already: Does it actually make sense
to still print these in mask form? Without that you wouldn't need get_cpumask(),
and as a result you also wouldn't need cpumask_none.

> @@ -2685,12 +2664,9 @@ void fixup_irqs(void)
>               * per-cpu vector table will no longer have ->arch.old_vector
>               * setup, and hence ->arch.old_cpu_mask would be stale.
>               */
> -            cpumask_clear_cpu(cpu, desc->arch.old_cpu_mask);
> -            if ( cpumask_empty(desc->arch.old_cpu_mask) )
> -            {
> -                desc->arch.move_in_progress = 0;
> -                release_old_vec(desc);
> -            }
> +            desc->arch.old_cpu = CPU_INVALID;
> +            desc->arch.move_in_progress = 0;

As you touch the line anyway, switch to using "false"?

Jan


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On 20.11.2025 10:58, Roger Pau Monne wrote:
> @@ -779,10 +775,10 @@ void move_masked_irq(struct irq_desc *desc)
>       *
>       * For correct operation this depends on the caller masking the irqs.
>       */
> -    if ( likely(cpumask_intersects(pending_mask, &cpu_online_map)) )
> -        desc->handler->set_affinity(desc, pending_mask);
> +    if ( likely(cpu_online(desc->arch.pending_cpu)) )

Same remark again regarding the guarding against hitting ...

> +        desc->handler->set_affinity(desc, cpumask_of(desc->arch.pending_cpu));
>  
> -    cpumask_clear(pending_mask);
> +    desc->arch.pending_cpu = CPU_INVALID;

... the value stored here.

Jan


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On 20.11.2025 20:32, Nicola Vetrini wrote:
> The rule states: Expressions resulting from the expansion of
> macro parameters shall be enclosed in parentheses.
> 
> Add parentheses in the defition of `custom_runtime_var_sz' to
> address the violations.
> 
> No functional change.
> 
> Signed-off-by: Nicola Vetrini 

Acked-by: Jan Beulich 



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Subject: Re: [PATCH 4/4] xen/param: address violation of MISRA C Rule 8.2
To: Nicola Vetrini 
Cc: andrew.cooper3@citrix.com, sstabellini@kernel.org,
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On 20.11.2025 20:32, Nicola Vetrini wrote:
> add missing parameter name in function pointer member declaration.
> 
> No functional change.
> 
> Signed-off-by: Nicola Vetrini 

Acked-by: Jan Beulich 



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From: Saman Dehghan 
Date: Mon, 24 Nov 2025 07:14:30 -0600
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Subject: Re: [PATCH] XEN: enable MC/DC coverage for Clang
To: Jan Beulich 
Cc: xen-devel@lists.xenproject.org, Anthony PERARD , 
	Michal Orzel , Julien Grall , 
	=?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
	Stefano Stabellini , Andrew Cooper 
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On Mon, Nov 24, 2025 at 6:41=E2=80=AFAM Jan Beulich  wro=
te:
>
> On 24.11.2025 13:31, Saman Dehghan wrote:
> > On Mon, Nov 24, 2025 at 5:15=E2=80=AFAM Andrew Cooper 
wrote:
> >> On 24/11/2025 2:18 am, Saman Dehghan wrote:
> >>> @@ -127,16 +131,25 @@ extern uint64_t __stop___llvm_prf_cnts[];
> >>>  #define END_NAMES       ((const void *)__stop___llvm_prf_names)
> >>>  #define START_COUNTERS  ((void *)__start___llvm_prf_cnts)
> >>>  #define END_COUNTERS    ((void *)__stop___llvm_prf_cnts)
> >>> +#define START_BITMAP    ((void *)__start___llvm_prf_bits)
> >>> +#define END_BITMAP      ((void *)__stop___llvm_prf_bits)
> >>>
> >>>  static void cf_check reset_counters(void)
> >>>  {
> >>>      memset(START_COUNTERS, 0, END_COUNTERS - START_COUNTERS);
> >>> +#ifdef CONFIG_CONDITION_COVERAGE
> >>> +    memset(START_BITMAP, 0, END_BITMAP - START_BITMAP);
> >>> +#endif
> >>
> >> ... this:
> >>
> >>     if ( IS_ENABLED(CONFIG_CONDITION_COVERAGE) )
> >>         memset(START_BITMAP, 0, END_BITMAP - START_BITMAP);
> >>
> >>>  }
> >
> > Thanks Andrew.
> >
> > IS_ENABLED(CONFIG_CONDITION_COVERAGE) is not the same as #ifdef
> > CONFIG_CONDITION_COVERAGE.
> > When the option is completely undefined, IS_ENABLED() returns 1
(enabled).
>
> See our many other uses of IS_ENABLED(). If what you say was true, we'd
have
> breakage for every one of those uses.
>

Sorry, my bad. It works.


> Jan

--00000000000034859f064456f221
Content-Type: text/html; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable


On Mon, Nov 24, 2025 at 6:41=E2=80=AFAM Jan Beulich <jbeulich@suse.com> wrote:
>=

> On 24.11.2025 13:31, Saman Dehghan wrote:
> > On Mon, Nov=
 24, 2025 at 5:15=E2=80=AFAM Andrew Cooper <andrew.cooper3@citrix.com> wrote:
> >> =
On 24/11/2025 2:18 am, Saman Dehghan wrote:
> >>> @@ -127,16=
 +131,25 @@ extern uint64_t __stop___llvm_prf_cnts[];
> >>> =
=C2=A0#define END_NAMES =C2=A0 =C2=A0 =C2=A0 ((const void *)__stop___llvm_p=
rf_names)
> >>> =C2=A0#define START_COUNTERS =C2=A0((void *)=
__start___llvm_prf_cnts)
> >>> =C2=A0#define END_COUNTERS =
=C2=A0 =C2=A0((void *)__stop___llvm_prf_cnts)
> >>> +#define=
 START_BITMAP =C2=A0 =C2=A0((void *)__start___llvm_prf_bits)
> >&g=
t;> +#define END_BITMAP =C2=A0 =C2=A0 =C2=A0((void *)__stop___llvm_prf_b=
its)
> >>>
> >>> =C2=A0static void cf_check r=
eset_counters(void)
> >>> =C2=A0{
> >>> =C2=
=A0 =C2=A0 =C2=A0memset(START_COUNTERS, 0, END_COUNTERS - START_COUNTERS);<=
br>> >>> +#ifdef CONFIG_CONDITION_COVERAGE
> >>>=
 + =C2=A0 =C2=A0memset(START_BITMAP, 0, END_BITMAP - START_BITMAP);
>=
 >>> +#endif
> >>
> >> ... this:
> &=
gt;>
> >> =C2=A0 =C2=A0 if ( IS_ENABLED(CONFIG_CONDITION_COV=
ERAGE) )
> >> =C2=A0 =C2=A0 =C2=A0 =C2=A0 memset(START_BITMAP, =
0, END_BITMAP - START_BITMAP);
> >>
> >>> =C2=A0=
}
> >
> > Thanks Andrew.
> >
> > IS_ENA=
BLED(CONFIG_CONDITION_COVERAGE) is not the same as #ifdef
> > CONF=
IG_CONDITION_COVERAGE.
> > When the option is completely undefined=
, IS_ENABLED() returns 1 (enabled).
>
> See our many other uses=
 of IS_ENABLED(). If what you say was true, we'd have
> breakage =
for every one of those uses.
>

Sorry, my bad. It works.

> Jan


--00000000000034859f064456f221--


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From: Saman Dehghan 
To: xen-devel@lists.xenproject.org
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v3] XEN: enable MC/DC coverage for Clang
Date: Mon, 24 Nov 2025 07:17:24 -0600
Message-ID: 
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Clang >= 18 supports Modified Condition/Decision Coverage (MC/DC).
This patch enables the detection and usage of this feature when
compiling Xen with Clang.

- Update detection logic in Kconfig to check for the required set of
  Clang flags for MC/DC:
  '-fprofile-instr-generate -fcoverage-mapping -fcoverage-mcdc'.
  This bundle is necessary because '-fcoverage-mcdc' requires
  '-fcoverage-mapping', which in turn requires '-fprofile-instr-generate'.
- Update llvm.c to handle the profile format changes (bitmap section)
  required for MC/DC.
- Guard -Wno-error=coverage-too-many-conditions with CONFIG_CC_IS_GCC
  to avoid passing a GCC-only warning option to Clang

Signed-off-by: Saman Dehghan 
Acked-by: Jan Beulich 
---
 xen/Kconfig                |  9 +++++++--
 xen/Rules.mk               |  1 +
 xen/arch/x86/Makefile      |  2 +-
 xen/common/coverage/llvm.c | 18 +++++++++++++++++-
 4 files changed, 26 insertions(+), 4 deletions(-)

diff --git a/xen/Kconfig b/xen/Kconfig
index a5e5af3b76..8f2cc111cd 100644
--- a/xen/Kconfig
+++ b/xen/Kconfig
@@ -51,9 +51,14 @@ config CC_HAS_ASM_GOTO_OUTPUT
 	depends on !GCC_ASM_GOTO_OUTPUT_BROKEN
 	depends on $(success,echo 'int foo(int x) { asm goto ("": "=r"(x) ::: bar); return x; bar: return 0; }' | $(CC) -x c - -c -o /dev/null)
 
-# Compiler supports -fcondition-coverage aka MC/DC
+# Compiler supports Modified Condition/Decision Coverage (MC/DC).
+# MC/DC is a rigorous code coverage metric that requires every condition
+# within a decision (boolean expression) to be shown to independently
+# influence the decision's final outcome.
+#
+# Minimum toolchain baseline: GCC >= 14, or Clang >= 18.
 config CC_HAS_MCDC
-	def_bool $(cc-option,-fcondition-coverage)
+	def_bool $(cc-option,-fcondition-coverage) || $(cc-option,-fprofile-instr-generate -fcoverage-mapping -fcoverage-mcdc)
 
 # Set code alignment.
 #
diff --git a/xen/Rules.mk b/xen/Rules.mk
index 24f447b957..2b28d1ac3c 100644
--- a/xen/Rules.mk
+++ b/xen/Rules.mk
@@ -136,6 +136,7 @@ non-init-objects = $(filter-out %.init.o, $(obj-y) $(obj-bin-y) $(extra-y))
 
 ifeq ($(CONFIG_CC_IS_CLANG),y)
     cov-cflags-$(CONFIG_COVERAGE) := -fprofile-instr-generate -fcoverage-mapping
+    cov-cflags-$(CONFIG_CONDITION_COVERAGE) += -fcoverage-mcdc
 else
     cov-cflags-$(CONFIG_COVERAGE) := -fprofile-arcs -ftest-coverage
     cov-cflags-$(CONFIG_CONDITION_COVERAGE) += -fcondition-coverage
diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
index 407571c510..6c0ff67fa8 100644
--- a/xen/arch/x86/Makefile
+++ b/xen/arch/x86/Makefile
@@ -98,7 +98,7 @@ $(obj)/usercopy.o: CFLAGS-y += -iquote .
 ifneq ($(CONFIG_HVM),y)
 $(obj)/x86_emulate.o: CFLAGS-y += -Wno-unused-label
 endif
-ifeq ($(CONFIG_CONDITION_COVERAGE),y)
+ifeq ($(CONFIG_CONDITION_COVERAGE)$(CONFIG_CC_IS_GCC),yy)
 $(obj)/x86_emulate.o: CFLAGS-y += -Wno-error=coverage-too-many-conditions
 endif
 
diff --git a/xen/common/coverage/llvm.c b/xen/common/coverage/llvm.c
index 532889c857..5663fb10dd 100644
--- a/xen/common/coverage/llvm.c
+++ b/xen/common/coverage/llvm.c
@@ -120,6 +120,8 @@ extern const char __start___llvm_prf_names[];
 extern const char __stop___llvm_prf_names[];
 extern uint64_t __start___llvm_prf_cnts[];
 extern uint64_t __stop___llvm_prf_cnts[];
+extern const char __start___llvm_prf_bits[];
+extern const char __stop___llvm_prf_bits[];
 
 #define START_DATA      ((const void *)__start___llvm_prf_data)
 #define END_DATA        ((const void *)__stop___llvm_prf_data)
@@ -127,16 +129,23 @@ extern uint64_t __stop___llvm_prf_cnts[];
 #define END_NAMES       ((const void *)__stop___llvm_prf_names)
 #define START_COUNTERS  ((void *)__start___llvm_prf_cnts)
 #define END_COUNTERS    ((void *)__stop___llvm_prf_cnts)
+#define START_BITMAP    ((void *)__start___llvm_prf_bits)
+#define END_BITMAP      ((void *)__stop___llvm_prf_bits)
 
 static void cf_check reset_counters(void)
 {
     memset(START_COUNTERS, 0, END_COUNTERS - START_COUNTERS);
+    if ( IS_ENABLED(CONFIG_CONDITION_COVERAGE) )
+        memset(START_BITMAP, 0, END_BITMAP - START_BITMAP);
 }
 
 static uint32_t cf_check get_size(void)
 {
-    return ROUNDUP(sizeof(struct llvm_profile_header) + END_DATA - START_DATA +
+    uint32_t size = ROUNDUP(sizeof(struct llvm_profile_header) + END_DATA - START_DATA +
                    END_COUNTERS - START_COUNTERS + END_NAMES - START_NAMES, 8);
+    if ( IS_ENABLED(CONFIG_CONDITION_COVERAGE) )
+        size += ROUNDUP(END_BITMAP - START_BITMAP, 8);
+    return size;
 }
 
 static int cf_check dump(
@@ -155,6 +164,10 @@ static int cf_check dump(
 #endif
         .names_delta = (uintptr_t)START_NAMES,
         .value_kind_last = LLVM_PROFILE_NUM_KINDS - 1,
+#if defined(CONFIG_CONDITION_COVERAGE) && LLVM_PROFILE_VERSION >= 9
+        .num_bitmap_bytes = END_BITMAP - START_BITMAP,
+        .bitmap_delta = START_BITMAP - START_DATA,
+#endif
     };
     unsigned int off = 0;
 
@@ -168,6 +181,9 @@ static int cf_check dump(
     APPEND_TO_BUFFER(&header, sizeof(header));
     APPEND_TO_BUFFER(START_DATA, END_DATA - START_DATA);
     APPEND_TO_BUFFER(START_COUNTERS, END_COUNTERS - START_COUNTERS);
+#if defined(CONFIG_CONDITION_COVERAGE)
+    APPEND_TO_BUFFER(START_BITMAP, END_BITMAP - START_BITMAP);
+#endif
     APPEND_TO_BUFFER(START_NAMES, END_NAMES - START_NAMES);
 #undef APPEND_TO_BUFFER
 
-- 
2.49.0



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From: Kevin Brodsky 
To: linux-mm@kvack.org
Cc: linux-kernel@vger.kernel.org,
	Kevin Brodsky ,
	Alexander Gordeev ,
	Andreas Larsson ,
	Andrew Morton ,
	Boris Ostrovsky ,
	Borislav Petkov ,
	Catalin Marinas ,
	Christophe Leroy ,
	Dave Hansen ,
	David Hildenbrand ,
	"David S. Miller" ,
	David Woodhouse ,
	"H. Peter Anvin" ,
	Ingo Molnar ,
	Jann Horn ,
	Juergen Gross ,
	"Liam R. Howlett" ,
	Lorenzo Stoakes ,
	Madhavan Srinivasan ,
	Michael Ellerman ,
	Michal Hocko ,
	Mike Rapoport ,
	Nicholas Piggin ,
	Peter Zijlstra ,
	"Ritesh Harjani (IBM)" ,
	Ryan Roberts ,
	Suren Baghdasaryan ,
	Thomas Gleixner ,
	Venkat Rao Bagalkote ,
	Vlastimil Babka ,
	Will Deacon ,
	Yeoreum Yun ,
	linux-arm-kernel@lists.infradead.org,
	linuxppc-dev@lists.ozlabs.org,
	sparclinux@vger.kernel.org,
	xen-devel@lists.xenproject.org,
	x86@kernel.org
Subject: [PATCH v5 00/12] Nesting support for lazy MMU mode
Date: Mon, 24 Nov 2025 13:22:16 +0000
Message-ID: <20251124132228.622678-1-kevin.brodsky@arm.com>
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When the lazy MMU mode was introduced eons ago, it wasn't made clear
whether such a sequence was legal:

	arch_enter_lazy_mmu_mode()
	...
		arch_enter_lazy_mmu_mode()
		...
		arch_leave_lazy_mmu_mode()
	...
	arch_leave_lazy_mmu_mode()

It seems fair to say that nested calls to
arch_{enter,leave}_lazy_mmu_mode() were not expected, and most
architectures never explicitly supported it.

Nesting does in fact occur in certain configurations, and avoiding it
has proved difficult. This series therefore enables lazy_mmu sections to
nest, on all architectures.

Nesting is handled using a counter in task_struct (patch 8), like other
stateless APIs such as pagefault_{disable,enable}(). This is fully
handled in a new generic layer in ; the arch_* API
remains unchanged. A new pair of calls, lazy_mmu_mode_{pause,resume}(),
is also introduced to allow functions that are called with the lazy MMU
mode enabled to temporarily pause it, regardless of nesting.

An arch now opts in to using the lazy MMU mode by selecting
CONFIG_ARCH_LAZY_MMU; this is more appropriate now that we have a
generic API, especially with state conditionally added to task_struct.

---

Background: Ryan Roberts' series from March [1] attempted to prevent
nesting from ever occurring, and mostly succeeded. Unfortunately, a
corner case (DEBUG_PAGEALLOC) may still cause nesting to occur on arm64.
Ryan proposed [2] to address that corner case at the generic level but
this approach received pushback; [3] then attempted to solve the issue
on arm64 only, but it was deemed too fragile.

It feels generally difficult to guarantee that lazy_mmu sections don't
nest, because callers of various standard mm functions do not know if
the function uses lazy_mmu itself.

The overall approach in v3/v4 is very close to what David Hildenbrand
proposed on v2 [4].

Unlike in v1/v2, no special provision is made for architectures to
save/restore extra state when entering/leaving the mode. Based on the
discussions so far, this does not seem to be required - an arch can
store any relevant state in thread_struct during arch_enter() and
restore it in arch_leave(). Nesting is not a concern as these functions
are only called at the top level, not in nested sections.

The introduction of a generic layer, and tracking of the lazy MMU state
in task_struct, also allows to streamline the arch callbacks - this
series removes 67 lines from arch/.

Patch overview:

* Patch 1: cleanup - avoids having to deal with the powerpc
  context-switching code

* Patch 2-4: prepare arch_flush_lazy_mmu_mode() to be called from the
  generic layer (patch 8)

* Patch 5-6: new API + CONFIG_ARCH_LAZY_MMU

* Patch 7: ensure correctness in interrupt context

* Patch 8: nesting support

* Patch 9-12: replace arch-specific tracking of lazy MMU mode with
  generic API

This series has been tested by running the mm kselftests on arm64 with
DEBUG_VM, DEBUG_PAGEALLOC, KFENCE and KASAN. It was also build-tested on
other architectures (with and without XEN_PV on x86).

- Kevin

[1] https://lore.kernel.org/all/20250303141542.3371656-1-ryan.roberts@arm.com/
[2] https://lore.kernel.org/all/20250530140446.2387131-1-ryan.roberts@arm.com/
[3] https://lore.kernel.org/all/20250606135654.178300-1-ryan.roberts@arm.com/
[4] https://lore.kernel.org/all/ef343405-c394-4763-a79f-21381f217b6c@redhat.com/
---
Changelog

v4..v5:

- Rebased on mm-unstable
- Patch 3: added missing radix_enabled() check in arch_flush()
  [Ritesh Harjani]
- Patch 6: declare arch_flush_lazy_mmu_mode() as static inline on x86
  [Ryan Roberts]
- Patch 7 (formerly 12): moved before patch 8 to ensure correctness in
  interrupt context [Ryan]. The diffs in in_lazy_mmu_mode() and
  queue_pte_barriers() are moved to patch 8 and 9 resp.
- Patch 8:
  * Removed all restrictions regarding lazy_mmu_mode_{pause,resume}().
    They may now be called even when lazy MMU isn't enabled, and
    any call to lazy_mmu_mode_* may be made while paused (such calls
    will be ignored). [David, Ryan]
  * lazy_mmu_state.{nesting_level,active} are replaced with
    {enable_count,pause_count} to track arbitrary nesting of both
    enable/disable and pause/resume [Ryan]
  * Added __task_lazy_mmu_mode_active() for use in patch 12 [David]
  * Added documentation for all the functions [Ryan]
- Patch 9: keep existing test + set TIF_LAZY_MMU_PENDING instead of
  atomic RMW [David, Ryan]
- Patch 12: use __task_lazy_mmu_mode_active() instead of accessing
  lazy_mmu_state directly [David]
- Collected R-b/A-b tags

v4: https://lore.kernel.org/all/20251029100909.3381140-1-kevin.brodsky@arm.com/

v3..v4:

- Patch 2: restored ordering of preempt_{disable,enable}() [Dave Hansen]
- Patch 5 onwards: s/ARCH_LAZY_MMU/ARCH_HAS_LAZY_MMU_MODE/ [Mike Rapoport]
- Patch 7: renamed lazy_mmu_state members, removed VM_BUG_ON(),
  reordered writes to lazy_mmu_state members [David Hildenbrand]
- Dropped patch 13 as it doesn't seem justified [David H]
- Various improvements to commit messages [David H]

v3: https://lore.kernel.org/all/20251015082727.2395128-1-kevin.brodsky@arm.com/

v2..v3:

- Full rewrite; dropped all Acked-by/Reviewed-by.
- Rebased on v6.18-rc1.

v2: https://lore.kernel.org/all/20250908073931.4159362-1-kevin.brodsky@arm.com/

v1..v2:
- Rebased on mm-unstable.
- Patch 2: handled new calls to enter()/leave(), clarified how the "flush"
  pattern (leave() followed by enter()) is handled.
- Patch 5,6: removed unnecessary local variable [Alexander Gordeev's
  suggestion].
- Added Mike Rapoport's Acked-by.

v1: https://lore.kernel.org/all/20250904125736.3918646-1-kevin.brodsky@arm.com/
---
Cc: Alexander Gordeev 
Cc: Andreas Larsson 
Cc: Andrew Morton 
Cc: Boris Ostrovsky 
Cc: Borislav Petkov 
Cc: Catalin Marinas 
Cc: Christophe Leroy 
Cc: Dave Hansen 
Cc: David Hildenbrand 
Cc: "David S. Miller" 
Cc: David Woodhouse 
Cc: "H. Peter Anvin" 
Cc: Ingo Molnar 
Cc: Jann Horn 
Cc: Juergen Gross 
Cc: "Liam R. Howlett" 
Cc: Lorenzo Stoakes 
Cc: Madhavan Srinivasan 
Cc: Michael Ellerman 
Cc: Michal Hocko 
Cc: Mike Rapoport 
Cc: Nicholas Piggin 
Cc: Peter Zijlstra 
Cc: Ritesh Harjani (IBM) 
Cc: Ryan Roberts 
Cc: Suren Baghdasaryan 
Cc: Thomas Gleixner 
Cc: Venkat Rao Bagalkote 
Cc: Vlastimil Babka 
Cc: Will Deacon 
Cc: Yeoreum Yun 
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: sparclinux@vger.kernel.org
Cc: xen-devel@lists.xenproject.org
Cc: x86@kernel.org
---
Alexander Gordeev (1):
  powerpc/64s: Do not re-activate batched TLB flush

Kevin Brodsky (11):
  x86/xen: simplify flush_lazy_mmu()
  powerpc/mm: implement arch_flush_lazy_mmu_mode()
  sparc/mm: implement arch_flush_lazy_mmu_mode()
  mm: introduce CONFIG_ARCH_HAS_LAZY_MMU_MODE
  mm: introduce generic lazy_mmu helpers
  mm: bail out of lazy_mmu_mode_* in interrupt context
  mm: enable lazy_mmu sections to nest
  arm64: mm: replace TIF_LAZY_MMU with in_lazy_mmu_mode()
  powerpc/mm: replace batch->active with in_lazy_mmu_mode()
  sparc/mm: replace batch->active with in_lazy_mmu_mode()
  x86/xen: use lazy_mmu_state when context-switching

 arch/arm64/Kconfig                            |   1 +
 arch/arm64/include/asm/pgtable.h              |  41 +----
 arch/arm64/include/asm/thread_info.h          |   3 +-
 arch/arm64/mm/mmu.c                           |   4 +-
 arch/arm64/mm/pageattr.c                      |   4 +-
 .../include/asm/book3s/64/tlbflush-hash.h     |  20 ++-
 arch/powerpc/include/asm/thread_info.h        |   2 -
 arch/powerpc/kernel/process.c                 |  25 ---
 arch/powerpc/mm/book3s64/hash_tlb.c           |  10 +-
 arch/powerpc/mm/book3s64/subpage_prot.c       |   4 +-
 arch/powerpc/platforms/Kconfig.cputype        |   1 +
 arch/sparc/Kconfig                            |   1 +
 arch/sparc/include/asm/tlbflush_64.h          |   5 +-
 arch/sparc/mm/tlb.c                           |  14 +-
 arch/x86/Kconfig                              |   1 +
 arch/x86/boot/compressed/misc.h               |   1 +
 arch/x86/boot/startup/sme.c                   |   1 +
 arch/x86/include/asm/paravirt.h               |   1 -
 arch/x86/include/asm/pgtable.h                |   1 +
 arch/x86/include/asm/thread_info.h            |   4 +-
 arch/x86/xen/enlighten_pv.c                   |   3 +-
 arch/x86/xen/mmu_pv.c                         |   6 +-
 fs/proc/task_mmu.c                            |   4 +-
 include/linux/mm_types_task.h                 |   5 +
 include/linux/pgtable.h                       | 147 +++++++++++++++++-
 include/linux/sched.h                         |  45 ++++++
 mm/Kconfig                                    |   3 +
 mm/kasan/shadow.c                             |   8 +-
 mm/madvise.c                                  |  18 +--
 mm/memory.c                                   |  16 +-
 mm/migrate_device.c                           |   8 +-
 mm/mprotect.c                                 |   4 +-
 mm/mremap.c                                   |   4 +-
 mm/userfaultfd.c                              |   4 +-
 mm/vmalloc.c                                  |  12 +-
 mm/vmscan.c                                   |  12 +-
 36 files changed, 282 insertions(+), 161 deletions(-)


base-commit: 1f1edd95f9231ba58a1e535b10200cb1eeaf1f67
-- 
2.51.2



From xen-devel-bounces@lists.xenproject.org Mon Nov 24 13:22:54 2025
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From: Kevin Brodsky 
To: linux-mm@kvack.org
Cc: linux-kernel@vger.kernel.org,
	Kevin Brodsky ,
	Alexander Gordeev ,
	Andreas Larsson ,
	Andrew Morton ,
	Boris Ostrovsky ,
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	Catalin Marinas ,
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	Mike Rapoport ,
	Nicholas Piggin ,
	Peter Zijlstra ,
	"Ritesh Harjani (IBM)" ,
	Ryan Roberts ,
	Suren Baghdasaryan ,
	Thomas Gleixner ,
	Venkat Rao Bagalkote ,
	Vlastimil Babka ,
	Will Deacon ,
	Yeoreum Yun ,
	linux-arm-kernel@lists.infradead.org,
	linuxppc-dev@lists.ozlabs.org,
	sparclinux@vger.kernel.org,
	xen-devel@lists.xenproject.org,
	x86@kernel.org
Subject: [PATCH v5 01/12] powerpc/64s: Do not re-activate batched TLB flush
Date: Mon, 24 Nov 2025 13:22:17 +0000
Message-ID: <20251124132228.622678-2-kevin.brodsky@arm.com>
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From: Alexander Gordeev 

Since commit b9ef323ea168 ("powerpc/64s: Disable preemption in hash
lazy mmu mode") a task can not be preempted while in lazy MMU mode.
Therefore, the batch re-activation code is never called, so remove it.

Signed-off-by: Alexander Gordeev 
Reviewed-by: David Hildenbrand 
Reviewed-by: Ritesh Harjani (IBM) 
Reviewed-by: Ryan Roberts 
Signed-off-by: Kevin Brodsky 
---
 arch/powerpc/include/asm/thread_info.h |  2 --
 arch/powerpc/kernel/process.c          | 25 -------------------------
 2 files changed, 27 deletions(-)

diff --git a/arch/powerpc/include/asm/thread_info.h b/arch/powerpc/include/asm/thread_info.h
index b0f200aba2b3..97f35f9b1a96 100644
--- a/arch/powerpc/include/asm/thread_info.h
+++ b/arch/powerpc/include/asm/thread_info.h
@@ -154,12 +154,10 @@ void arch_setup_new_exec(void);
 /* Don't move TLF_NAPPING without adjusting the code in entry_32.S */
 #define TLF_NAPPING		0	/* idle thread enabled NAP mode */
 #define TLF_SLEEPING		1	/* suspend code enabled SLEEP mode */
-#define TLF_LAZY_MMU		3	/* tlb_batch is active */
 #define TLF_RUNLATCH		4	/* Is the runlatch enabled? */
 
 #define _TLF_NAPPING		(1 << TLF_NAPPING)
 #define _TLF_SLEEPING		(1 << TLF_SLEEPING)
-#define _TLF_LAZY_MMU		(1 << TLF_LAZY_MMU)
 #define _TLF_RUNLATCH		(1 << TLF_RUNLATCH)
 
 #ifndef __ASSEMBLER__
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index eb23966ac0a9..9237dcbeee4a 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -1281,9 +1281,6 @@ struct task_struct *__switch_to(struct task_struct *prev,
 {
 	struct thread_struct *new_thread, *old_thread;
 	struct task_struct *last;
-#ifdef CONFIG_PPC_64S_HASH_MMU
-	struct ppc64_tlb_batch *batch;
-#endif
 
 	new_thread = &new->thread;
 	old_thread = ¤t->thread;
@@ -1291,14 +1288,6 @@ struct task_struct *__switch_to(struct task_struct *prev,
 	WARN_ON(!irqs_disabled());
 
 #ifdef CONFIG_PPC_64S_HASH_MMU
-	batch = this_cpu_ptr(&ppc64_tlb_batch);
-	if (batch->active) {
-		current_thread_info()->local_flags |= _TLF_LAZY_MMU;
-		if (batch->index)
-			__flush_tlb_pending(batch);
-		batch->active = 0;
-	}
-
 	/*
 	 * On POWER9 the copy-paste buffer can only paste into
 	 * foreign real addresses, so unprivileged processes can not
@@ -1369,20 +1358,6 @@ struct task_struct *__switch_to(struct task_struct *prev,
 	 */
 
 #ifdef CONFIG_PPC_BOOK3S_64
-#ifdef CONFIG_PPC_64S_HASH_MMU
-	/*
-	 * This applies to a process that was context switched while inside
-	 * arch_enter_lazy_mmu_mode(), to re-activate the batch that was
-	 * deactivated above, before _switch(). This will never be the case
-	 * for new tasks.
-	 */
-	if (current_thread_info()->local_flags & _TLF_LAZY_MMU) {
-		current_thread_info()->local_flags &= ~_TLF_LAZY_MMU;
-		batch = this_cpu_ptr(&ppc64_tlb_batch);
-		batch->active = 1;
-	}
-#endif
-
 	/*
 	 * Math facilities are masked out of the child MSR in copy_thread.
 	 * A new task does not need to restore_math because it will
-- 
2.51.2



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	Kevin Brodsky ,
	Alexander Gordeev ,
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	linux-arm-kernel@lists.infradead.org,
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Subject: [PATCH v5 02/12] x86/xen: simplify flush_lazy_mmu()
Date: Mon, 24 Nov 2025 13:22:18 +0000
Message-ID: <20251124132228.622678-3-kevin.brodsky@arm.com>
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arch_flush_lazy_mmu_mode() is called when outstanding batched
pgtable operations must be completed immediately. There should
however be no need to leave and re-enter lazy MMU completely. The
only part of that sequence that we really need is xen_mc_flush();
call it directly.

Reviewed-by: David Hildenbrand 
Reviewed-by: Ryan Roberts 
Reviewed-by: Juergen Gross 
Signed-off-by: Kevin Brodsky 
---
 arch/x86/xen/mmu_pv.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/arch/x86/xen/mmu_pv.c b/arch/x86/xen/mmu_pv.c
index 2a4a8deaf612..7a35c3393df4 100644
--- a/arch/x86/xen/mmu_pv.c
+++ b/arch/x86/xen/mmu_pv.c
@@ -2139,10 +2139,8 @@ static void xen_flush_lazy_mmu(void)
 {
 	preempt_disable();
 
-	if (xen_get_lazy_mode() == XEN_LAZY_MMU) {
-		arch_leave_lazy_mmu_mode();
-		arch_enter_lazy_mmu_mode();
-	}
+	if (xen_get_lazy_mode() == XEN_LAZY_MMU)
+		xen_mc_flush();
 
 	preempt_enable();
 }
-- 
2.51.2



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	"Ritesh Harjani (IBM)" ,
	Ryan Roberts ,
	Suren Baghdasaryan ,
	Thomas Gleixner ,
	Venkat Rao Bagalkote ,
	Vlastimil Babka ,
	Will Deacon ,
	Yeoreum Yun ,
	linux-arm-kernel@lists.infradead.org,
	linuxppc-dev@lists.ozlabs.org,
	sparclinux@vger.kernel.org,
	xen-devel@lists.xenproject.org,
	x86@kernel.org
Subject: [PATCH v5 03/12] powerpc/mm: implement arch_flush_lazy_mmu_mode()
Date: Mon, 24 Nov 2025 13:22:19 +0000
Message-ID: <20251124132228.622678-4-kevin.brodsky@arm.com>
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Upcoming changes to the lazy_mmu API will cause
arch_flush_lazy_mmu_mode() to be called when leaving a nested
lazy_mmu section.

Move the relevant logic from arch_leave_lazy_mmu_mode() to
arch_flush_lazy_mmu_mode() and have the former call the latter. The
radix_enabled() check is required in both as
arch_flush_lazy_mmu_mode() will be called directly from the generic
layer in a subsequent patch.

Note: the additional this_cpu_ptr() and radix_enabled() calls on the
arch_leave_lazy_mmu_mode() path will be removed in a subsequent
patch.

Acked-by: David Hildenbrand 
Signed-off-by: Kevin Brodsky 
---
 .../powerpc/include/asm/book3s/64/tlbflush-hash.h | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h b/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h
index 146287d9580f..2d45f57df169 100644
--- a/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h
+++ b/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h
@@ -41,7 +41,7 @@ static inline void arch_enter_lazy_mmu_mode(void)
 	batch->active = 1;
 }
 
-static inline void arch_leave_lazy_mmu_mode(void)
+static inline void arch_flush_lazy_mmu_mode(void)
 {
 	struct ppc64_tlb_batch *batch;
 
@@ -51,12 +51,21 @@ static inline void arch_leave_lazy_mmu_mode(void)
 
 	if (batch->index)
 		__flush_tlb_pending(batch);
+}
+
+static inline void arch_leave_lazy_mmu_mode(void)
+{
+	struct ppc64_tlb_batch *batch;
+
+	if (radix_enabled())
+		return;
+	batch = this_cpu_ptr(&ppc64_tlb_batch);
+
+	arch_flush_lazy_mmu_mode();
 	batch->active = 0;
 	preempt_enable();
 }
 
-#define arch_flush_lazy_mmu_mode()      do {} while (0)
-
 extern void hash__tlbiel_all(unsigned int action);
 
 extern void flush_hash_page(unsigned long vpn, real_pte_t pte, int psize,
-- 
2.51.2



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	Kevin Brodsky ,
	Alexander Gordeev ,
	Andreas Larsson ,
	Andrew Morton ,
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	linux-arm-kernel@lists.infradead.org,
	linuxppc-dev@lists.ozlabs.org,
	sparclinux@vger.kernel.org,
	xen-devel@lists.xenproject.org,
	x86@kernel.org
Subject: [PATCH v5 04/12] sparc/mm: implement arch_flush_lazy_mmu_mode()
Date: Mon, 24 Nov 2025 13:22:20 +0000
Message-ID: <20251124132228.622678-5-kevin.brodsky@arm.com>
X-Mailer: git-send-email 2.51.2
In-Reply-To: <20251124132228.622678-1-kevin.brodsky@arm.com>
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MIME-Version: 1.0
Content-Transfer-Encoding: 8bit

Upcoming changes to the lazy_mmu API will cause
arch_flush_lazy_mmu_mode() to be called when leaving a nested
lazy_mmu section.

Move the relevant logic from arch_leave_lazy_mmu_mode() to
arch_flush_lazy_mmu_mode() and have the former call the latter.

Note: the additional this_cpu_ptr() call on the
arch_leave_lazy_mmu_mode() path will be removed in a subsequent
patch.

Acked-by: David Hildenbrand 
Signed-off-by: Kevin Brodsky 
---
 arch/sparc/include/asm/tlbflush_64.h | 2 +-
 arch/sparc/mm/tlb.c                  | 9 ++++++++-
 2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/arch/sparc/include/asm/tlbflush_64.h b/arch/sparc/include/asm/tlbflush_64.h
index 8b8cdaa69272..925bb5d7a4e1 100644
--- a/arch/sparc/include/asm/tlbflush_64.h
+++ b/arch/sparc/include/asm/tlbflush_64.h
@@ -43,8 +43,8 @@ void flush_tlb_kernel_range(unsigned long start, unsigned long end);
 
 void flush_tlb_pending(void);
 void arch_enter_lazy_mmu_mode(void);
+void arch_flush_lazy_mmu_mode(void);
 void arch_leave_lazy_mmu_mode(void);
-#define arch_flush_lazy_mmu_mode()      do {} while (0)
 
 /* Local cpu only.  */
 void __flush_tlb_all(void);
diff --git a/arch/sparc/mm/tlb.c b/arch/sparc/mm/tlb.c
index a35ddcca5e76..7b5dfcdb1243 100644
--- a/arch/sparc/mm/tlb.c
+++ b/arch/sparc/mm/tlb.c
@@ -59,12 +59,19 @@ void arch_enter_lazy_mmu_mode(void)
 	tb->active = 1;
 }
 
-void arch_leave_lazy_mmu_mode(void)
+void arch_flush_lazy_mmu_mode(void)
 {
 	struct tlb_batch *tb = this_cpu_ptr(&tlb_batch);
 
 	if (tb->tlb_nr)
 		flush_tlb_pending();
+}
+
+void arch_leave_lazy_mmu_mode(void)
+{
+	struct tlb_batch *tb = this_cpu_ptr(&tlb_batch);
+
+	arch_flush_lazy_mmu_mode();
 	tb->active = 0;
 	preempt_enable();
 }
-- 
2.51.2



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Subject: [PATCH v5 05/12] mm: introduce CONFIG_ARCH_HAS_LAZY_MMU_MODE
Date: Mon, 24 Nov 2025 13:22:21 +0000
Message-ID: <20251124132228.622678-6-kevin.brodsky@arm.com>
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Architectures currently opt in for implementing lazy_mmu helpers by
defining __HAVE_ARCH_ENTER_LAZY_MMU_MODE.

In preparation for introducing a generic lazy_mmu layer that will
require storage in task_struct, let's switch to a cleaner approach:
instead of defining a macro, select a CONFIG option.

This patch introduces CONFIG_ARCH_HAS_LAZY_MMU_MODE and has each
arch select it when it implements lazy_mmu helpers.
__HAVE_ARCH_ENTER_LAZY_MMU_MODE is removed and 
relies on the new CONFIG instead.

On x86, lazy_mmu helpers are only implemented if PARAVIRT_XXL is
selected. This creates some complications in arch/x86/boot/, because
a few files manually undefine PARAVIRT* options. As a result
 does not define the lazy_mmu helpers, but this
breaks the build as  only defines them if
!CONFIG_ARCH_HAS_LAZY_MMU_MODE. There does not seem to be a clean
way out of this - let's just undefine that new CONFIG too.

Acked-by: David Hildenbrand 
Reviewed-by: Ritesh Harjani (IBM) 
Reviewed-by: Ryan Roberts 
Signed-off-by: Kevin Brodsky 
---
 arch/arm64/Kconfig                                 | 1 +
 arch/arm64/include/asm/pgtable.h                   | 1 -
 arch/powerpc/include/asm/book3s/64/tlbflush-hash.h | 2 --
 arch/powerpc/platforms/Kconfig.cputype             | 1 +
 arch/sparc/Kconfig                                 | 1 +
 arch/sparc/include/asm/tlbflush_64.h               | 2 --
 arch/x86/Kconfig                                   | 1 +
 arch/x86/boot/compressed/misc.h                    | 1 +
 arch/x86/boot/startup/sme.c                        | 1 +
 arch/x86/include/asm/paravirt.h                    | 1 -
 include/linux/pgtable.h                            | 2 +-
 mm/Kconfig                                         | 3 +++
 12 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 6663ffd23f25..74be32f5f446 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -34,6 +34,7 @@ config ARM64
 	select ARCH_HAS_KCOV
 	select ARCH_HAS_KERNEL_FPU_SUPPORT if KERNEL_MODE_NEON
 	select ARCH_HAS_KEEPINITRD
+	select ARCH_HAS_LAZY_MMU_MODE
 	select ARCH_HAS_MEMBARRIER_SYNC_CORE
 	select ARCH_HAS_MEM_ENCRYPT
 	select ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
index 0944e296dd4a..54f8d6bb6f22 100644
--- a/arch/arm64/include/asm/pgtable.h
+++ b/arch/arm64/include/asm/pgtable.h
@@ -80,7 +80,6 @@ static inline void queue_pte_barriers(void)
 	}
 }
 
-#define  __HAVE_ARCH_ENTER_LAZY_MMU_MODE
 static inline void arch_enter_lazy_mmu_mode(void)
 {
 	/*
diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h b/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h
index 2d45f57df169..565c1b7c3eae 100644
--- a/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h
+++ b/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h
@@ -24,8 +24,6 @@ DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
 
 extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch);
 
-#define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
-
 static inline void arch_enter_lazy_mmu_mode(void)
 {
 	struct ppc64_tlb_batch *batch;
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 4c321a8ea896..f399917c17bd 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -93,6 +93,7 @@ config PPC_BOOK3S_64
 	select IRQ_WORK
 	select PPC_64S_HASH_MMU if !PPC_RADIX_MMU
 	select KASAN_VMALLOC if KASAN
+	select ARCH_HAS_LAZY_MMU_MODE
 
 config PPC_BOOK3E_64
 	bool "Embedded processors"
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index a630d373e645..2bad14744ca4 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -112,6 +112,7 @@ config SPARC64
 	select NEED_PER_CPU_PAGE_FIRST_CHUNK
 	select ARCH_SUPPORTS_SCHED_SMT if SMP
 	select ARCH_SUPPORTS_SCHED_MC  if SMP
+	select ARCH_HAS_LAZY_MMU_MODE
 
 config ARCH_PROC_KCORE_TEXT
 	def_bool y
diff --git a/arch/sparc/include/asm/tlbflush_64.h b/arch/sparc/include/asm/tlbflush_64.h
index 925bb5d7a4e1..4e1036728e2f 100644
--- a/arch/sparc/include/asm/tlbflush_64.h
+++ b/arch/sparc/include/asm/tlbflush_64.h
@@ -39,8 +39,6 @@ static inline void flush_tlb_range(struct vm_area_struct *vma,
 
 void flush_tlb_kernel_range(unsigned long start, unsigned long end);
 
-#define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
-
 void flush_tlb_pending(void);
 void arch_enter_lazy_mmu_mode(void);
 void arch_flush_lazy_mmu_mode(void);
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index a3700766a8c0..db769c4addf9 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -805,6 +805,7 @@ config PARAVIRT
 config PARAVIRT_XXL
 	bool
 	depends on X86_64
+	select ARCH_HAS_LAZY_MMU_MODE
 
 config PARAVIRT_DEBUG
 	bool "paravirt-ops debugging"
diff --git a/arch/x86/boot/compressed/misc.h b/arch/x86/boot/compressed/misc.h
index db1048621ea2..cdd7f692d9ee 100644
--- a/arch/x86/boot/compressed/misc.h
+++ b/arch/x86/boot/compressed/misc.h
@@ -11,6 +11,7 @@
 #undef CONFIG_PARAVIRT
 #undef CONFIG_PARAVIRT_XXL
 #undef CONFIG_PARAVIRT_SPINLOCKS
+#undef CONFIG_ARCH_HAS_LAZY_MMU_MODE
 #undef CONFIG_KASAN
 #undef CONFIG_KASAN_GENERIC
 
diff --git a/arch/x86/boot/startup/sme.c b/arch/x86/boot/startup/sme.c
index e7ea65f3f1d6..b76a7c95dfe1 100644
--- a/arch/x86/boot/startup/sme.c
+++ b/arch/x86/boot/startup/sme.c
@@ -24,6 +24,7 @@
 #undef CONFIG_PARAVIRT
 #undef CONFIG_PARAVIRT_XXL
 #undef CONFIG_PARAVIRT_SPINLOCKS
+#undef CONFIG_ARCH_HAS_LAZY_MMU_MODE
 
 /*
  * This code runs before CPU feature bits are set. By default, the
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index b5e59a7ba0d0..13f9cd31c8f8 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -526,7 +526,6 @@ static inline void arch_end_context_switch(struct task_struct *next)
 	PVOP_VCALL1(cpu.end_context_switch, next);
 }
 
-#define  __HAVE_ARCH_ENTER_LAZY_MMU_MODE
 static inline void arch_enter_lazy_mmu_mode(void)
 {
 	PVOP_VCALL0(mmu.lazy_mode.enter);
diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h
index b13b6f42be3c..de7d2c7e63eb 100644
--- a/include/linux/pgtable.h
+++ b/include/linux/pgtable.h
@@ -231,7 +231,7 @@ static inline int pmd_dirty(pmd_t pmd)
  * held, but for kernel PTE updates, no lock is held). Nesting is not permitted
  * and the mode cannot be used in interrupt context.
  */
-#ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
+#ifndef CONFIG_ARCH_HAS_LAZY_MMU_MODE
 static inline void arch_enter_lazy_mmu_mode(void) {}
 static inline void arch_leave_lazy_mmu_mode(void) {}
 static inline void arch_flush_lazy_mmu_mode(void) {}
diff --git a/mm/Kconfig b/mm/Kconfig
index bd0ea5454af8..a7486fae0cd3 100644
--- a/mm/Kconfig
+++ b/mm/Kconfig
@@ -1464,6 +1464,9 @@ config PT_RECLAIM
 config FIND_NORMAL_PAGE
 	def_bool n
 
+config ARCH_HAS_LAZY_MMU_MODE
+	bool
+
 source "mm/damon/Kconfig"
 
 endmenu
-- 
2.51.2



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From: Kevin Brodsky 
To: linux-mm@kvack.org
Cc: linux-kernel@vger.kernel.org,
	Kevin Brodsky ,
	Alexander Gordeev ,
	Andreas Larsson ,
	Andrew Morton ,
	Boris Ostrovsky ,
	Borislav Petkov ,
	Catalin Marinas ,
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	x86@kernel.org
Subject: [PATCH v5 06/12] mm: introduce generic lazy_mmu helpers
Date: Mon, 24 Nov 2025 13:22:22 +0000
Message-ID: <20251124132228.622678-7-kevin.brodsky@arm.com>
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The implementation of the lazy MMU mode is currently entirely
arch-specific; core code directly calls arch helpers:
arch_{enter,leave}_lazy_mmu_mode().

We are about to introduce support for nested lazy MMU sections.
As things stand we'd have to duplicate that logic in every arch
implementing lazy_mmu - adding to a fair amount of logic
already duplicated across lazy_mmu implementations.

This patch therefore introduces a new generic layer that calls the
existing arch_* helpers. Two pair of calls are introduced:

* lazy_mmu_mode_enable() ... lazy_mmu_mode_disable()
    This is the standard case where the mode is enabled for a given
    block of code by surrounding it with enable() and disable()
    calls.

* lazy_mmu_mode_pause() ... lazy_mmu_mode_resume()
    This is for situations where the mode is temporarily disabled
    by first calling pause() and then resume() (e.g. to prevent any
    batching from occurring in a critical section).

The documentation in  will be updated in a
subsequent patch.

No functional change should be introduced at this stage.
The implementation of enable()/resume() and disable()/pause() is
currently identical, but nesting support will change that.

Most of the call sites have been updated using the following
Coccinelle script:

@@
@@
{
...
- arch_enter_lazy_mmu_mode();
+ lazy_mmu_mode_enable();
...
- arch_leave_lazy_mmu_mode();
+ lazy_mmu_mode_disable();
...
}

@@
@@
{
...
- arch_leave_lazy_mmu_mode();
+ lazy_mmu_mode_pause();
...
- arch_enter_lazy_mmu_mode();
+ lazy_mmu_mode_resume();
...
}

A couple of notes regarding x86:

* Xen is currently the only case where explicit handling is required
  for lazy MMU when context-switching. This is purely an
  implementation detail and using the generic lazy_mmu_mode_*
  functions would cause trouble when nesting support is introduced,
  because the generic functions must be called from the current task.
  For that reason we still use arch_leave() and arch_enter() there.

* x86 calls arch_flush_lazy_mmu_mode() unconditionally in a few
  places, but only defines it if PARAVIRT_XXL is selected, and we
  are removing the fallback in . Add a new fallback
  definition to  to keep things building.

Acked-by: David Hildenbrand 
Signed-off-by: Kevin Brodsky 
---
 arch/arm64/mm/mmu.c                     |  4 ++--
 arch/arm64/mm/pageattr.c                |  4 ++--
 arch/powerpc/mm/book3s64/hash_tlb.c     |  8 +++----
 arch/powerpc/mm/book3s64/subpage_prot.c |  4 ++--
 arch/x86/include/asm/pgtable.h          |  1 +
 fs/proc/task_mmu.c                      |  4 ++--
 include/linux/pgtable.h                 | 29 +++++++++++++++++++++----
 mm/kasan/shadow.c                       |  8 +++----
 mm/madvise.c                            | 18 +++++++--------
 mm/memory.c                             | 16 +++++++-------
 mm/migrate_device.c                     |  8 +++----
 mm/mprotect.c                           |  4 ++--
 mm/mremap.c                             |  4 ++--
 mm/userfaultfd.c                        |  4 ++--
 mm/vmalloc.c                            | 12 +++++-----
 mm/vmscan.c                             | 12 +++++-----
 16 files changed, 81 insertions(+), 59 deletions(-)

diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index 94e29e3574ff..ce66ae77abaa 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -729,7 +729,7 @@ int split_kernel_leaf_mapping(unsigned long start, unsigned long end)
 		return -EINVAL;
 
 	mutex_lock(&pgtable_split_lock);
-	arch_enter_lazy_mmu_mode();
+	lazy_mmu_mode_enable();
 
 	/*
 	 * The split_kernel_leaf_mapping_locked() may sleep, it is not a
@@ -751,7 +751,7 @@ int split_kernel_leaf_mapping(unsigned long start, unsigned long end)
 			ret = split_kernel_leaf_mapping_locked(end);
 	}
 
-	arch_leave_lazy_mmu_mode();
+	lazy_mmu_mode_disable();
 	mutex_unlock(&pgtable_split_lock);
 	return ret;
 }
diff --git a/arch/arm64/mm/pageattr.c b/arch/arm64/mm/pageattr.c
index 5135f2d66958..e4059f13c4ed 100644
--- a/arch/arm64/mm/pageattr.c
+++ b/arch/arm64/mm/pageattr.c
@@ -110,7 +110,7 @@ static int update_range_prot(unsigned long start, unsigned long size,
 	if (WARN_ON_ONCE(ret))
 		return ret;
 
-	arch_enter_lazy_mmu_mode();
+	lazy_mmu_mode_enable();
 
 	/*
 	 * The caller must ensure that the range we are operating on does not
@@ -119,7 +119,7 @@ static int update_range_prot(unsigned long start, unsigned long size,
 	 */
 	ret = walk_kernel_page_table_range_lockless(start, start + size,
 						    &pageattr_ops, NULL, &data);
-	arch_leave_lazy_mmu_mode();
+	lazy_mmu_mode_disable();
 
 	return ret;
 }
diff --git a/arch/powerpc/mm/book3s64/hash_tlb.c b/arch/powerpc/mm/book3s64/hash_tlb.c
index 21fcad97ae80..787f7a0e27f0 100644
--- a/arch/powerpc/mm/book3s64/hash_tlb.c
+++ b/arch/powerpc/mm/book3s64/hash_tlb.c
@@ -205,7 +205,7 @@ void __flush_hash_table_range(unsigned long start, unsigned long end)
 	 * way to do things but is fine for our needs here.
 	 */
 	local_irq_save(flags);
-	arch_enter_lazy_mmu_mode();
+	lazy_mmu_mode_enable();
 	for (; start < end; start += PAGE_SIZE) {
 		pte_t *ptep = find_init_mm_pte(start, &hugepage_shift);
 		unsigned long pte;
@@ -217,7 +217,7 @@ void __flush_hash_table_range(unsigned long start, unsigned long end)
 			continue;
 		hpte_need_flush(&init_mm, start, ptep, pte, hugepage_shift);
 	}
-	arch_leave_lazy_mmu_mode();
+	lazy_mmu_mode_disable();
 	local_irq_restore(flags);
 }
 
@@ -237,7 +237,7 @@ void flush_hash_table_pmd_range(struct mm_struct *mm, pmd_t *pmd, unsigned long
 	 * way to do things but is fine for our needs here.
 	 */
 	local_irq_save(flags);
-	arch_enter_lazy_mmu_mode();
+	lazy_mmu_mode_enable();
 	start_pte = pte_offset_map(pmd, addr);
 	if (!start_pte)
 		goto out;
@@ -249,6 +249,6 @@ void flush_hash_table_pmd_range(struct mm_struct *mm, pmd_t *pmd, unsigned long
 	}
 	pte_unmap(start_pte);
 out:
-	arch_leave_lazy_mmu_mode();
+	lazy_mmu_mode_disable();
 	local_irq_restore(flags);
 }
diff --git a/arch/powerpc/mm/book3s64/subpage_prot.c b/arch/powerpc/mm/book3s64/subpage_prot.c
index ec98e526167e..07c47673bba2 100644
--- a/arch/powerpc/mm/book3s64/subpage_prot.c
+++ b/arch/powerpc/mm/book3s64/subpage_prot.c
@@ -73,13 +73,13 @@ static void hpte_flush_range(struct mm_struct *mm, unsigned long addr,
 	pte = pte_offset_map_lock(mm, pmd, addr, &ptl);
 	if (!pte)
 		return;
-	arch_enter_lazy_mmu_mode();
+	lazy_mmu_mode_enable();
 	for (; npages > 0; --npages) {
 		pte_update(mm, addr, pte, 0, 0, 0);
 		addr += PAGE_SIZE;
 		++pte;
 	}
-	arch_leave_lazy_mmu_mode();
+	lazy_mmu_mode_disable();
 	pte_unmap_unlock(pte - 1, ptl);
 }
 
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
index e33df3da6980..2842fa1f7a2c 100644
--- a/arch/x86/include/asm/pgtable.h
+++ b/arch/x86/include/asm/pgtable.h
@@ -118,6 +118,7 @@ extern pmdval_t early_pmd_flags;
 #define __pte(x)	native_make_pte(x)
 
 #define arch_end_context_switch(prev)	do {} while(0)
+static inline void arch_flush_lazy_mmu_mode(void) {}
 #endif	/* CONFIG_PARAVIRT_XXL */
 
 static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set)
diff --git a/fs/proc/task_mmu.c b/fs/proc/task_mmu.c
index d00ac179d973..ee1778adcc20 100644
--- a/fs/proc/task_mmu.c
+++ b/fs/proc/task_mmu.c
@@ -2737,7 +2737,7 @@ static int pagemap_scan_pmd_entry(pmd_t *pmd, unsigned long start,
 		return 0;
 	}
 
-	arch_enter_lazy_mmu_mode();
+	lazy_mmu_mode_enable();
 
 	if ((p->arg.flags & PM_SCAN_WP_MATCHING) && !p->vec_out) {
 		/* Fast path for performing exclusive WP */
@@ -2807,7 +2807,7 @@ static int pagemap_scan_pmd_entry(pmd_t *pmd, unsigned long start,
 	if (flush_end)
 		flush_tlb_range(vma, start, addr);
 
-	arch_leave_lazy_mmu_mode();
+	lazy_mmu_mode_disable();
 	pte_unmap_unlock(start_pte, ptl);
 
 	cond_resched();
diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h
index de7d2c7e63eb..c121358dba15 100644
--- a/include/linux/pgtable.h
+++ b/include/linux/pgtable.h
@@ -231,10 +231,31 @@ static inline int pmd_dirty(pmd_t pmd)
  * held, but for kernel PTE updates, no lock is held). Nesting is not permitted
  * and the mode cannot be used in interrupt context.
  */
-#ifndef CONFIG_ARCH_HAS_LAZY_MMU_MODE
-static inline void arch_enter_lazy_mmu_mode(void) {}
-static inline void arch_leave_lazy_mmu_mode(void) {}
-static inline void arch_flush_lazy_mmu_mode(void) {}
+#ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE
+static inline void lazy_mmu_mode_enable(void)
+{
+	arch_enter_lazy_mmu_mode();
+}
+
+static inline void lazy_mmu_mode_disable(void)
+{
+	arch_leave_lazy_mmu_mode();
+}
+
+static inline void lazy_mmu_mode_pause(void)
+{
+	arch_leave_lazy_mmu_mode();
+}
+
+static inline void lazy_mmu_mode_resume(void)
+{
+	arch_enter_lazy_mmu_mode();
+}
+#else
+static inline void lazy_mmu_mode_enable(void) {}
+static inline void lazy_mmu_mode_disable(void) {}
+static inline void lazy_mmu_mode_pause(void) {}
+static inline void lazy_mmu_mode_resume(void) {}
 #endif
 
 #ifndef pte_batch_hint
diff --git a/mm/kasan/shadow.c b/mm/kasan/shadow.c
index 29a751a8a08d..c1433d5cc5db 100644
--- a/mm/kasan/shadow.c
+++ b/mm/kasan/shadow.c
@@ -305,7 +305,7 @@ static int kasan_populate_vmalloc_pte(pte_t *ptep, unsigned long addr,
 	pte_t pte;
 	int index;
 
-	arch_leave_lazy_mmu_mode();
+	lazy_mmu_mode_pause();
 
 	index = PFN_DOWN(addr - data->start);
 	page = data->pages[index];
@@ -319,7 +319,7 @@ static int kasan_populate_vmalloc_pte(pte_t *ptep, unsigned long addr,
 	}
 	spin_unlock(&init_mm.page_table_lock);
 
-	arch_enter_lazy_mmu_mode();
+	lazy_mmu_mode_resume();
 
 	return 0;
 }
@@ -471,7 +471,7 @@ static int kasan_depopulate_vmalloc_pte(pte_t *ptep, unsigned long addr,
 	pte_t pte;
 	int none;
 
-	arch_leave_lazy_mmu_mode();
+	lazy_mmu_mode_pause();
 
 	spin_lock(&init_mm.page_table_lock);
 	pte = ptep_get(ptep);
@@ -483,7 +483,7 @@ static int kasan_depopulate_vmalloc_pte(pte_t *ptep, unsigned long addr,
 	if (likely(!none))
 		__free_page(pfn_to_page(pte_pfn(pte)));
 
-	arch_enter_lazy_mmu_mode();
+	lazy_mmu_mode_resume();
 
 	return 0;
 }
diff --git a/mm/madvise.c b/mm/madvise.c
index b617b1be0f53..6bf7009fa5ce 100644
--- a/mm/madvise.c
+++ b/mm/madvise.c
@@ -453,7 +453,7 @@ static int madvise_cold_or_pageout_pte_range(pmd_t *pmd,
 	if (!start_pte)
 		return 0;
 	flush_tlb_batched_pending(mm);
-	arch_enter_lazy_mmu_mode();
+	lazy_mmu_mode_enable();
 	for (; addr < end; pte += nr, addr += nr * PAGE_SIZE) {
 		nr = 1;
 		ptent = ptep_get(pte);
@@ -461,7 +461,7 @@ static int madvise_cold_or_pageout_pte_range(pmd_t *pmd,
 		if (++batch_count == SWAP_CLUSTER_MAX) {
 			batch_count = 0;
 			if (need_resched()) {
-				arch_leave_lazy_mmu_mode();
+				lazy_mmu_mode_disable();
 				pte_unmap_unlock(start_pte, ptl);
 				cond_resched();
 				goto restart;
@@ -497,7 +497,7 @@ static int madvise_cold_or_pageout_pte_range(pmd_t *pmd,
 				if (!folio_trylock(folio))
 					continue;
 				folio_get(folio);
-				arch_leave_lazy_mmu_mode();
+				lazy_mmu_mode_disable();
 				pte_unmap_unlock(start_pte, ptl);
 				start_pte = NULL;
 				err = split_folio(folio);
@@ -508,7 +508,7 @@ static int madvise_cold_or_pageout_pte_range(pmd_t *pmd,
 				if (!start_pte)
 					break;
 				flush_tlb_batched_pending(mm);
-				arch_enter_lazy_mmu_mode();
+				lazy_mmu_mode_enable();
 				if (!err)
 					nr = 0;
 				continue;
@@ -556,7 +556,7 @@ static int madvise_cold_or_pageout_pte_range(pmd_t *pmd,
 	}
 
 	if (start_pte) {
-		arch_leave_lazy_mmu_mode();
+		lazy_mmu_mode_disable();
 		pte_unmap_unlock(start_pte, ptl);
 	}
 	if (pageout)
@@ -675,7 +675,7 @@ static int madvise_free_pte_range(pmd_t *pmd, unsigned long addr,
 	if (!start_pte)
 		return 0;
 	flush_tlb_batched_pending(mm);
-	arch_enter_lazy_mmu_mode();
+	lazy_mmu_mode_enable();
 	for (; addr != end; pte += nr, addr += PAGE_SIZE * nr) {
 		nr = 1;
 		ptent = ptep_get(pte);
@@ -724,7 +724,7 @@ static int madvise_free_pte_range(pmd_t *pmd, unsigned long addr,
 				if (!folio_trylock(folio))
 					continue;
 				folio_get(folio);
-				arch_leave_lazy_mmu_mode();
+				lazy_mmu_mode_disable();
 				pte_unmap_unlock(start_pte, ptl);
 				start_pte = NULL;
 				err = split_folio(folio);
@@ -735,7 +735,7 @@ static int madvise_free_pte_range(pmd_t *pmd, unsigned long addr,
 				if (!start_pte)
 					break;
 				flush_tlb_batched_pending(mm);
-				arch_enter_lazy_mmu_mode();
+				lazy_mmu_mode_enable();
 				if (!err)
 					nr = 0;
 				continue;
@@ -775,7 +775,7 @@ static int madvise_free_pte_range(pmd_t *pmd, unsigned long addr,
 	if (nr_swap)
 		add_mm_counter(mm, MM_SWAPENTS, nr_swap);
 	if (start_pte) {
-		arch_leave_lazy_mmu_mode();
+		lazy_mmu_mode_disable();
 		pte_unmap_unlock(start_pte, ptl);
 	}
 	cond_resched();
diff --git a/mm/memory.c b/mm/memory.c
index 6675e87eb7dd..c0c29a3b0bcc 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -1256,7 +1256,7 @@ copy_pte_range(struct vm_area_struct *dst_vma, struct vm_area_struct *src_vma,
 	spin_lock_nested(src_ptl, SINGLE_DEPTH_NESTING);
 	orig_src_pte = src_pte;
 	orig_dst_pte = dst_pte;
-	arch_enter_lazy_mmu_mode();
+	lazy_mmu_mode_enable();
 
 	do {
 		nr = 1;
@@ -1325,7 +1325,7 @@ copy_pte_range(struct vm_area_struct *dst_vma, struct vm_area_struct *src_vma,
 	} while (dst_pte += nr, src_pte += nr, addr += PAGE_SIZE * nr,
 		 addr != end);
 
-	arch_leave_lazy_mmu_mode();
+	lazy_mmu_mode_disable();
 	pte_unmap_unlock(orig_src_pte, src_ptl);
 	add_mm_rss_vec(dst_mm, rss);
 	pte_unmap_unlock(orig_dst_pte, dst_ptl);
@@ -1842,7 +1842,7 @@ static unsigned long zap_pte_range(struct mmu_gather *tlb,
 		return addr;
 
 	flush_tlb_batched_pending(mm);
-	arch_enter_lazy_mmu_mode();
+	lazy_mmu_mode_enable();
 	do {
 		bool any_skipped = false;
 
@@ -1874,7 +1874,7 @@ static unsigned long zap_pte_range(struct mmu_gather *tlb,
 		direct_reclaim = try_get_and_clear_pmd(mm, pmd, &pmdval);
 
 	add_mm_rss_vec(mm, rss);
-	arch_leave_lazy_mmu_mode();
+	lazy_mmu_mode_disable();
 
 	/* Do the actual TLB flush before dropping ptl */
 	if (force_flush) {
@@ -2813,7 +2813,7 @@ static int remap_pte_range(struct mm_struct *mm, pmd_t *pmd,
 	mapped_pte = pte = pte_alloc_map_lock(mm, pmd, addr, &ptl);
 	if (!pte)
 		return -ENOMEM;
-	arch_enter_lazy_mmu_mode();
+	lazy_mmu_mode_enable();
 	do {
 		BUG_ON(!pte_none(ptep_get(pte)));
 		if (!pfn_modify_allowed(pfn, prot)) {
@@ -2823,7 +2823,7 @@ static int remap_pte_range(struct mm_struct *mm, pmd_t *pmd,
 		set_pte_at(mm, addr, pte, pte_mkspecial(pfn_pte(pfn, prot)));
 		pfn++;
 	} while (pte++, addr += PAGE_SIZE, addr != end);
-	arch_leave_lazy_mmu_mode();
+	lazy_mmu_mode_disable();
 	pte_unmap_unlock(mapped_pte, ptl);
 	return err;
 }
@@ -3174,7 +3174,7 @@ static int apply_to_pte_range(struct mm_struct *mm, pmd_t *pmd,
 			return -EINVAL;
 	}
 
-	arch_enter_lazy_mmu_mode();
+	lazy_mmu_mode_enable();
 
 	if (fn) {
 		do {
@@ -3187,7 +3187,7 @@ static int apply_to_pte_range(struct mm_struct *mm, pmd_t *pmd,
 	}
 	*mask |= PGTBL_PTE_MODIFIED;
 
-	arch_leave_lazy_mmu_mode();
+	lazy_mmu_mode_disable();
 
 	if (mm != &init_mm)
 		pte_unmap_unlock(mapped_pte, ptl);
diff --git a/mm/migrate_device.c b/mm/migrate_device.c
index 23379663b1e1..0346c2d7819f 100644
--- a/mm/migrate_device.c
+++ b/mm/migrate_device.c
@@ -271,7 +271,7 @@ static int migrate_vma_collect_pmd(pmd_t *pmdp,
 	ptep = pte_offset_map_lock(mm, pmdp, start, &ptl);
 	if (!ptep)
 		goto again;
-	arch_enter_lazy_mmu_mode();
+	lazy_mmu_mode_enable();
 	ptep += (addr - start) / PAGE_SIZE;
 
 	for (; addr < end; addr += PAGE_SIZE, ptep++) {
@@ -313,7 +313,7 @@ static int migrate_vma_collect_pmd(pmd_t *pmdp,
 			if (folio_test_large(folio)) {
 				int ret;
 
-				arch_leave_lazy_mmu_mode();
+				lazy_mmu_mode_disable();
 				pte_unmap_unlock(ptep, ptl);
 				ret = migrate_vma_split_folio(folio,
 							  migrate->fault_page);
@@ -356,7 +356,7 @@ static int migrate_vma_collect_pmd(pmd_t *pmdp,
 			if (folio && folio_test_large(folio)) {
 				int ret;
 
-				arch_leave_lazy_mmu_mode();
+				lazy_mmu_mode_disable();
 				pte_unmap_unlock(ptep, ptl);
 				ret = migrate_vma_split_folio(folio,
 							  migrate->fault_page);
@@ -485,7 +485,7 @@ static int migrate_vma_collect_pmd(pmd_t *pmdp,
 	if (unmapped)
 		flush_tlb_range(walk->vma, start, end);
 
-	arch_leave_lazy_mmu_mode();
+	lazy_mmu_mode_disable();
 	pte_unmap_unlock(ptep - 1, ptl);
 
 	return 0;
diff --git a/mm/mprotect.c b/mm/mprotect.c
index 283889e4f1ce..c0571445bef7 100644
--- a/mm/mprotect.c
+++ b/mm/mprotect.c
@@ -233,7 +233,7 @@ static long change_pte_range(struct mmu_gather *tlb,
 		is_private_single_threaded = vma_is_single_threaded_private(vma);
 
 	flush_tlb_batched_pending(vma->vm_mm);
-	arch_enter_lazy_mmu_mode();
+	lazy_mmu_mode_enable();
 	do {
 		nr_ptes = 1;
 		oldpte = ptep_get(pte);
@@ -379,7 +379,7 @@ static long change_pte_range(struct mmu_gather *tlb,
 			}
 		}
 	} while (pte += nr_ptes, addr += nr_ptes * PAGE_SIZE, addr != end);
-	arch_leave_lazy_mmu_mode();
+	lazy_mmu_mode_disable();
 	pte_unmap_unlock(pte - 1, ptl);
 
 	return pages;
diff --git a/mm/mremap.c b/mm/mremap.c
index 672264807db6..8275b9772ec1 100644
--- a/mm/mremap.c
+++ b/mm/mremap.c
@@ -260,7 +260,7 @@ static int move_ptes(struct pagetable_move_control *pmc,
 	if (new_ptl != old_ptl)
 		spin_lock_nested(new_ptl, SINGLE_DEPTH_NESTING);
 	flush_tlb_batched_pending(vma->vm_mm);
-	arch_enter_lazy_mmu_mode();
+	lazy_mmu_mode_enable();
 
 	for (; old_addr < old_end; old_ptep += nr_ptes, old_addr += nr_ptes * PAGE_SIZE,
 		new_ptep += nr_ptes, new_addr += nr_ptes * PAGE_SIZE) {
@@ -305,7 +305,7 @@ static int move_ptes(struct pagetable_move_control *pmc,
 		}
 	}
 
-	arch_leave_lazy_mmu_mode();
+	lazy_mmu_mode_disable();
 	if (force_flush)
 		flush_tlb_range(vma, old_end - len, old_end);
 	if (new_ptl != old_ptl)
diff --git a/mm/userfaultfd.c b/mm/userfaultfd.c
index e6dfd5f28acd..b11f81095fa5 100644
--- a/mm/userfaultfd.c
+++ b/mm/userfaultfd.c
@@ -1103,7 +1103,7 @@ static long move_present_ptes(struct mm_struct *mm,
 	/* It's safe to drop the reference now as the page-table is holding one. */
 	folio_put(*first_src_folio);
 	*first_src_folio = NULL;
-	arch_enter_lazy_mmu_mode();
+	lazy_mmu_mode_enable();
 
 	while (true) {
 		orig_src_pte = ptep_get_and_clear(mm, src_addr, src_pte);
@@ -1140,7 +1140,7 @@ static long move_present_ptes(struct mm_struct *mm,
 			break;
 	}
 
-	arch_leave_lazy_mmu_mode();
+	lazy_mmu_mode_disable();
 	if (src_addr > src_start)
 		flush_tlb_range(src_vma, src_start, src_addr);
 
diff --git a/mm/vmalloc.c b/mm/vmalloc.c
index ecbac900c35f..1dea299fbb5a 100644
--- a/mm/vmalloc.c
+++ b/mm/vmalloc.c
@@ -108,7 +108,7 @@ static int vmap_pte_range(pmd_t *pmd, unsigned long addr, unsigned long end,
 	if (!pte)
 		return -ENOMEM;
 
-	arch_enter_lazy_mmu_mode();
+	lazy_mmu_mode_enable();
 
 	do {
 		if (unlikely(!pte_none(ptep_get(pte)))) {
@@ -134,7 +134,7 @@ static int vmap_pte_range(pmd_t *pmd, unsigned long addr, unsigned long end,
 		pfn++;
 	} while (pte += PFN_DOWN(size), addr += size, addr != end);
 
-	arch_leave_lazy_mmu_mode();
+	lazy_mmu_mode_disable();
 	*mask |= PGTBL_PTE_MODIFIED;
 	return 0;
 }
@@ -366,7 +366,7 @@ static void vunmap_pte_range(pmd_t *pmd, unsigned long addr, unsigned long end,
 	unsigned long size = PAGE_SIZE;
 
 	pte = pte_offset_kernel(pmd, addr);
-	arch_enter_lazy_mmu_mode();
+	lazy_mmu_mode_enable();
 
 	do {
 #ifdef CONFIG_HUGETLB_PAGE
@@ -385,7 +385,7 @@ static void vunmap_pte_range(pmd_t *pmd, unsigned long addr, unsigned long end,
 		WARN_ON(!pte_none(ptent) && !pte_present(ptent));
 	} while (pte += (size >> PAGE_SHIFT), addr += size, addr != end);
 
-	arch_leave_lazy_mmu_mode();
+	lazy_mmu_mode_disable();
 	*mask |= PGTBL_PTE_MODIFIED;
 }
 
@@ -533,7 +533,7 @@ static int vmap_pages_pte_range(pmd_t *pmd, unsigned long addr,
 	if (!pte)
 		return -ENOMEM;
 
-	arch_enter_lazy_mmu_mode();
+	lazy_mmu_mode_enable();
 
 	do {
 		struct page *page = pages[*nr];
@@ -555,7 +555,7 @@ static int vmap_pages_pte_range(pmd_t *pmd, unsigned long addr,
 		(*nr)++;
 	} while (pte++, addr += PAGE_SIZE, addr != end);
 
-	arch_leave_lazy_mmu_mode();
+	lazy_mmu_mode_disable();
 	*mask |= PGTBL_PTE_MODIFIED;
 
 	return err;
diff --git a/mm/vmscan.c b/mm/vmscan.c
index 92980b072121..564c97a9362f 100644
--- a/mm/vmscan.c
+++ b/mm/vmscan.c
@@ -3515,7 +3515,7 @@ static bool walk_pte_range(pmd_t *pmd, unsigned long start, unsigned long end,
 		return false;
 	}
 
-	arch_enter_lazy_mmu_mode();
+	lazy_mmu_mode_enable();
 restart:
 	for (i = pte_index(start), addr = start; addr != end; i++, addr += PAGE_SIZE) {
 		unsigned long pfn;
@@ -3556,7 +3556,7 @@ static bool walk_pte_range(pmd_t *pmd, unsigned long start, unsigned long end,
 	if (i < PTRS_PER_PTE && get_next_vma(PMD_MASK, PAGE_SIZE, args, &start, &end))
 		goto restart;
 
-	arch_leave_lazy_mmu_mode();
+	lazy_mmu_mode_disable();
 	pte_unmap_unlock(pte, ptl);
 
 	return suitable_to_scan(total, young);
@@ -3597,7 +3597,7 @@ static void walk_pmd_range_locked(pud_t *pud, unsigned long addr, struct vm_area
 	if (!spin_trylock(ptl))
 		goto done;
 
-	arch_enter_lazy_mmu_mode();
+	lazy_mmu_mode_enable();
 
 	do {
 		unsigned long pfn;
@@ -3644,7 +3644,7 @@ static void walk_pmd_range_locked(pud_t *pud, unsigned long addr, struct vm_area
 
 	walk_update_folio(walk, last, gen, dirty);
 
-	arch_leave_lazy_mmu_mode();
+	lazy_mmu_mode_disable();
 	spin_unlock(ptl);
 done:
 	*first = -1;
@@ -4243,7 +4243,7 @@ bool lru_gen_look_around(struct page_vma_mapped_walk *pvmw)
 		}
 	}
 
-	arch_enter_lazy_mmu_mode();
+	lazy_mmu_mode_enable();
 
 	pte -= (addr - start) / PAGE_SIZE;
 
@@ -4277,7 +4277,7 @@ bool lru_gen_look_around(struct page_vma_mapped_walk *pvmw)
 
 	walk_update_folio(walk, last, gen, dirty);
 
-	arch_leave_lazy_mmu_mode();
+	lazy_mmu_mode_disable();
 
 	/* feedback from rmap walkers to page table walkers */
 	if (mm_state && suitable_to_scan(i, young))
-- 
2.51.2



From xen-devel-bounces@lists.xenproject.org Mon Nov 24 13:32:10 2025
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From: Kevin Brodsky 
To: linux-mm@kvack.org
Cc: linux-kernel@vger.kernel.org,
	Kevin Brodsky ,
	Alexander Gordeev ,
	Andreas Larsson ,
	Andrew Morton ,
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	Borislav Petkov ,
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	linux-arm-kernel@lists.infradead.org,
	linuxppc-dev@lists.ozlabs.org,
	sparclinux@vger.kernel.org,
	xen-devel@lists.xenproject.org,
	x86@kernel.org
Subject: [PATCH v5 08/12] mm: enable lazy_mmu sections to nest
Date: Mon, 24 Nov 2025 13:22:24 +0000
Message-ID: <20251124132228.622678-9-kevin.brodsky@arm.com>
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Despite recent efforts to prevent lazy_mmu sections from nesting, it
remains difficult to ensure that it never occurs - and in fact it
does occur on arm64 in certain situations (CONFIG_DEBUG_PAGEALLOC).
Commit 1ef3095b1405 ("arm64/mm: Permit lazy_mmu_mode to be nested")
made nesting tolerable on arm64, but without truly supporting it:
the inner call to leave() disables the batching optimisation before
the outer section ends.

This patch actually enables lazy_mmu sections to nest by tracking
the nesting level in task_struct, in a similar fashion to e.g.
pagefault_{enable,disable}(). This is fully handled by the generic
lazy_mmu helpers that were recently introduced.

lazy_mmu sections were not initially intended to nest, so we need to
clarify the semantics w.r.t. the arch_*_lazy_mmu_mode() callbacks.
This patch takes the following approach:

* The outermost calls to lazy_mmu_mode_{enable,disable}() trigger
  calls to arch_{enter,leave}_lazy_mmu_mode() - this is unchanged.

* Nested calls to lazy_mmu_mode_{enable,disable}() are not forwarded
  to the arch via arch_{enter,leave} - lazy MMU remains enabled so
  the assumption is that these callbacks are not relevant. However,
  existing code may rely on a call to disable() to flush any batched
  state, regardless of nesting. arch_flush_lazy_mmu_mode() is
  therefore called in that situation.

A separate interface was recently introduced to temporarily pause
the lazy MMU mode: lazy_mmu_mode_{pause,resume}(). pause() fully
exits the mode *regardless of the nesting level*, and resume()
restores the mode at the same nesting level.

pause()/resume() are themselves allowed to nest, so we actually
store two nesting levels in task_struct: enable_count and
pause_count. A new helper in_lazy_mmu_mode() is introduced to
determine whether we are currently in lazy MMU mode; this will be
used in subsequent patches to replace the various ways arch's
currently track whether the mode is enabled.

In summary (enable/pause represent the values *after* the call):

lazy_mmu_mode_enable()		-> arch_enter()	    enable=1 pause=0
    lazy_mmu_mode_enable()	-> ø		    enable=2 pause=0
	lazy_mmu_mode_pause()	-> arch_leave()     enable=2 pause=1
	lazy_mmu_mode_resume()	-> arch_enter()     enable=2 pause=0
    lazy_mmu_mode_disable()	-> arch_flush()     enable=1 pause=0
lazy_mmu_mode_disable()		-> arch_leave()     enable=0 pause=0

Note: in_lazy_mmu_mode() is added to  to allow arch
headers included by  to use it.

Signed-off-by: Kevin Brodsky 
---
 arch/arm64/include/asm/pgtable.h |  12 ----
 include/linux/mm_types_task.h    |   5 ++
 include/linux/pgtable.h          | 115 +++++++++++++++++++++++++++++--
 include/linux/sched.h            |  45 ++++++++++++
 4 files changed, 158 insertions(+), 19 deletions(-)

diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
index e596899f4029..a7d99dee3dc4 100644
--- a/arch/arm64/include/asm/pgtable.h
+++ b/arch/arm64/include/asm/pgtable.h
@@ -82,18 +82,6 @@ static inline void queue_pte_barriers(void)
 
 static inline void arch_enter_lazy_mmu_mode(void)
 {
-	/*
-	 * lazy_mmu_mode is not supposed to permit nesting. But in practice this
-	 * does happen with CONFIG_DEBUG_PAGEALLOC, where a page allocation
-	 * inside a lazy_mmu_mode section (such as zap_pte_range()) will change
-	 * permissions on the linear map with apply_to_page_range(), which
-	 * re-enters lazy_mmu_mode. So we tolerate nesting in our
-	 * implementation. The first call to arch_leave_lazy_mmu_mode() will
-	 * flush and clear the flag such that the remainder of the work in the
-	 * outer nest behaves as if outside of lazy mmu mode. This is safe and
-	 * keeps tracking simple.
-	 */
-
 	set_thread_flag(TIF_LAZY_MMU);
 }
 
diff --git a/include/linux/mm_types_task.h b/include/linux/mm_types_task.h
index a82aa80c0ba4..11bf319d78ec 100644
--- a/include/linux/mm_types_task.h
+++ b/include/linux/mm_types_task.h
@@ -88,4 +88,9 @@ struct tlbflush_unmap_batch {
 #endif
 };
 
+struct lazy_mmu_state {
+	u8 enable_count;
+	u8 pause_count;
+};
+
 #endif /* _LINUX_MM_TYPES_TASK_H */
diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h
index 8ff6fdb4b13d..24fdb6f5c2e1 100644
--- a/include/linux/pgtable.h
+++ b/include/linux/pgtable.h
@@ -230,39 +230,140 @@ static inline int pmd_dirty(pmd_t pmd)
  * (In practice, for user PTE updates, the appropriate page table lock(s) are
  * held, but for kernel PTE updates, no lock is held). The mode is disabled in
  * interrupt context and calls to the lazy_mmu API have no effect.
- * Nesting is not permitted.
+ *
+ * The lazy MMU mode is enabled for a given block of code using:
+ *
+ *   lazy_mmu_mode_enable();
+ *   
+ *   lazy_mmu_mode_disable();
+ *
+ * Nesting is permitted:  may itself use an enable()/disable() pair.
+ * A nested call to enable() has no functional effect; however disable() causes
+ * any batched architectural state to be flushed regardless of nesting. After a
+ * call to disable(), the caller can therefore rely on all previous page table
+ * modifications to have taken effect, but the lazy MMU mode may still be
+ * enabled.
+ *
+ * In certain cases, it may be desirable to temporarily pause the lazy MMU mode.
+ * This can be done using:
+ *
+ *   lazy_mmu_mode_pause();
+ *   
+ *   lazy_mmu_mode_resume();
+ *
+ * pause() ensures that the mode is exited regardless of the nesting level;
+ * resume() re-enters the mode at the same nesting level. Any call to the
+ * lazy_mmu_mode_* API between those two calls has no effect. In particular,
+ * this means that pause()/resume() pairs may nest.
+ *
+ * in_lazy_mmu_mode() can be used to check whether the lazy MMU mode is
+ * currently enabled.
  */
 #ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE
+/**
+ * lazy_mmu_mode_enable() - Enable the lazy MMU mode.
+ *
+ * Enters a new lazy MMU mode section; if the mode was not already enabled,
+ * enables it and calls arch_enter_lazy_mmu_mode().
+ *
+ * Must be paired with a call to lazy_mmu_mode_disable().
+ *
+ * Has no effect if called:
+ * - While paused - see lazy_mmu_mode_pause()
+ * - In interrupt context
+ */
 static inline void lazy_mmu_mode_enable(void)
 {
-	if (in_interrupt())
+	struct lazy_mmu_state *state = ¤t->lazy_mmu_state;
+
+	if (in_interrupt() || state->pause_count > 0)
 		return;
 
-	arch_enter_lazy_mmu_mode();
+	VM_WARN_ON_ONCE(state->enable_count == U8_MAX);
+
+	if (state->enable_count++ == 0)
+		arch_enter_lazy_mmu_mode();
 }
 
+/**
+ * lazy_mmu_mode_disable() - Disable the lazy MMU mode.
+ *
+ * Exits the current lazy MMU mode section. If it is the outermost section,
+ * disables the mode and calls arch_leave_lazy_mmu_mode(). Otherwise (nested
+ * section), calls arch_flush_lazy_mmu_mode().
+ *
+ * Must match a call to lazy_mmu_mode_enable().
+ *
+ * Has no effect if called:
+ * - While paused - see lazy_mmu_mode_pause()
+ * - In interrupt context
+ */
 static inline void lazy_mmu_mode_disable(void)
 {
-	if (in_interrupt())
+	struct lazy_mmu_state *state = ¤t->lazy_mmu_state;
+
+	if (in_interrupt() || state->pause_count > 0)
 		return;
 
-	arch_leave_lazy_mmu_mode();
+	VM_WARN_ON_ONCE(state->enable_count == 0);
+
+	if (--state->enable_count == 0)
+		arch_leave_lazy_mmu_mode();
+	else /* Exiting a nested section */
+		arch_flush_lazy_mmu_mode();
+
 }
 
+/**
+ * lazy_mmu_mode_pause() - Pause the lazy MMU mode.
+ *
+ * Pauses the lazy MMU mode; if it is currently active, disables it and calls
+ * arch_leave_lazy_mmu_mode().
+ *
+ * Must be paired with a call to lazy_mmu_mode_resume(). Calls to the
+ * lazy_mmu_mode_* API have no effect until the matching resume() call.
+ *
+ * Has no effect if called:
+ * - While paused (inside another pause()/resume() pair)
+ * - In interrupt context
+ */
 static inline void lazy_mmu_mode_pause(void)
 {
+	struct lazy_mmu_state *state = ¤t->lazy_mmu_state;
+
 	if (in_interrupt())
 		return;
 
-	arch_leave_lazy_mmu_mode();
+	VM_WARN_ON_ONCE(state->pause_count == U8_MAX);
+
+	if (state->pause_count++ == 0 && state->enable_count > 0)
+		arch_leave_lazy_mmu_mode();
 }
 
+/**
+ * lazy_mmu_mode_pause() - Resume the lazy MMU mode.
+ *
+ * Resumes the lazy MMU mode; if it was active at the point where the matching
+ * call to lazy_mmu_mode_pause() was made, re-enables it and calls
+ * arch_enter_lazy_mmu_mode().
+ *
+ * Must match a call to lazy_mmu_mode_pause().
+ *
+ * Has no effect if called:
+ * - While paused (inside another pause()/resume() pair)
+ * - In interrupt context
+ */
 static inline void lazy_mmu_mode_resume(void)
 {
+	struct lazy_mmu_state *state = ¤t->lazy_mmu_state;
+
 	if (in_interrupt())
 		return;
 
-	arch_enter_lazy_mmu_mode();
+	VM_WARN_ON_ONCE(state->pause_count == 0);
+
+	if (--state->pause_count == 0 && state->enable_count > 0)
+		arch_enter_lazy_mmu_mode();
 }
 #else
 static inline void lazy_mmu_mode_enable(void) {}
diff --git a/include/linux/sched.h b/include/linux/sched.h
index b469878de25c..847e242376db 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -1441,6 +1441,10 @@ struct task_struct {
 
 	struct page_frag		task_frag;
 
+#ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE
+	struct lazy_mmu_state		lazy_mmu_state;
+#endif
+
 #ifdef CONFIG_TASK_DELAY_ACCT
 	struct task_delay_info		*delays;
 #endif
@@ -1724,6 +1728,47 @@ static inline char task_state_to_char(struct task_struct *tsk)
 	return task_index_to_char(task_state_index(tsk));
 }
 
+#ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE
+/**
+ * __task_lazy_mmu_mode_active() - Test the lazy MMU mode state for a task.
+ * @tsk: The task to check.
+ *
+ * Test whether @tsk has its lazy MMU mode state set to active (i.e. enabled
+ * and not paused).
+ *
+ * This function only considers the state saved in task_struct; to test whether
+ * current actually is in lazy MMU mode, in_lazy_mmu_mode() should be used
+ * instead.
+ *
+ * This function is intended for architectures that implement the lazy MMU
+ * mode; it must not be called from generic code.
+ */
+static inline bool __task_lazy_mmu_mode_active(struct task_struct *tsk)
+{
+	struct lazy_mmu_state *state = &tsk->lazy_mmu_state;
+
+	return state->enable_count > 0 && state->pause_count == 0;
+}
+
+/**
+ * in_lazy_mmu_mode() - Test whether we are currently in lazy MMU mode.
+ *
+ * Test whether the current context is in lazy MMU mode. This is true if both:
+ * 1. We are not in interrupt context
+ * 2. Lazy MMU mode is active for the current task
+ *
+ * This function is intended for architectures that implement the lazy MMU
+ * mode; it must not be called from generic code.
+ */
+static inline bool in_lazy_mmu_mode(void)
+{
+	if (in_interrupt())
+		return false;
+
+	return __task_lazy_mmu_mode_active(current);
+}
+#endif
+
 extern struct pid *cad_pid;
 
 /*
-- 
2.51.2



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Subject: [PATCH v5 12/12] x86/xen: use lazy_mmu_state when context-switching
Date: Mon, 24 Nov 2025 13:22:28 +0000
Message-ID: <20251124132228.622678-13-kevin.brodsky@arm.com>
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We currently set a TIF flag when scheduling out a task that is in
lazy MMU mode, in order to restore it when the task is scheduled
again.

The generic lazy_mmu layer now tracks whether a task is in lazy MMU
mode in task_struct::lazy_mmu_state. We can therefore check that
state when switching to the new task, instead of using a separate
TIF flag.

Signed-off-by: Kevin Brodsky 
---
 arch/x86/include/asm/thread_info.h | 4 +---
 arch/x86/xen/enlighten_pv.c        | 3 +--
 2 files changed, 2 insertions(+), 5 deletions(-)

diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h
index e71e0e8362ed..0067684afb5b 100644
--- a/arch/x86/include/asm/thread_info.h
+++ b/arch/x86/include/asm/thread_info.h
@@ -100,8 +100,7 @@ struct thread_info {
 #define TIF_FORCED_TF		24	/* true if TF in eflags artificially */
 #define TIF_SINGLESTEP		25	/* reenable singlestep on user return*/
 #define TIF_BLOCKSTEP		26	/* set when we want DEBUGCTLMSR_BTF */
-#define TIF_LAZY_MMU_UPDATES	27	/* task is updating the mmu lazily */
-#define TIF_ADDR32		28	/* 32-bit address space on 64 bits */
+#define TIF_ADDR32		27	/* 32-bit address space on 64 bits */
 
 #define _TIF_SSBD		BIT(TIF_SSBD)
 #define _TIF_SPEC_IB		BIT(TIF_SPEC_IB)
@@ -114,7 +113,6 @@ struct thread_info {
 #define _TIF_FORCED_TF		BIT(TIF_FORCED_TF)
 #define _TIF_BLOCKSTEP		BIT(TIF_BLOCKSTEP)
 #define _TIF_SINGLESTEP		BIT(TIF_SINGLESTEP)
-#define _TIF_LAZY_MMU_UPDATES	BIT(TIF_LAZY_MMU_UPDATES)
 #define _TIF_ADDR32		BIT(TIF_ADDR32)
 
 /* flags to check in __switch_to() */
diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
index 4806cc28d7ca..98dbb6a61087 100644
--- a/arch/x86/xen/enlighten_pv.c
+++ b/arch/x86/xen/enlighten_pv.c
@@ -426,7 +426,6 @@ static void xen_start_context_switch(struct task_struct *prev)
 
 	if (this_cpu_read(xen_lazy_mode) == XEN_LAZY_MMU) {
 		arch_leave_lazy_mmu_mode();
-		set_ti_thread_flag(task_thread_info(prev), TIF_LAZY_MMU_UPDATES);
 	}
 	enter_lazy(XEN_LAZY_CPU);
 }
@@ -437,7 +436,7 @@ static void xen_end_context_switch(struct task_struct *next)
 
 	xen_mc_flush();
 	leave_lazy(XEN_LAZY_CPU);
-	if (test_and_clear_ti_thread_flag(task_thread_info(next), TIF_LAZY_MMU_UPDATES))
+	if (__task_lazy_mmu_mode_active(next))
 		arch_enter_lazy_mmu_mode();
 }
 
-- 
2.51.2



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Subject: [PATCH v5 07/12] mm: bail out of lazy_mmu_mode_* in interrupt context
Date: Mon, 24 Nov 2025 13:22:23 +0000
Message-ID: <20251124132228.622678-8-kevin.brodsky@arm.com>
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The lazy MMU mode cannot be used in interrupt context. This is
documented in , but isn't consistently handled
across architectures.

arm64 ensures that calls to lazy_mmu_mode_* have no effect in
interrupt context, because such calls do occur in certain
configurations - see commit b81c688426a9 ("arm64/mm: Disable barrier
batching in interrupt contexts"). Other architectures do not check
this situation, most likely because it hasn't occurred so far.

Let's handle this in the new generic lazy_mmu layer, in the same
fashion as arm64: bail out of lazy_mmu_mode_* if in_interrupt().
Also remove the arm64 handling that is now redundant.

Both arm64 and x86/Xen also ensure that any lazy MMU optimisation is
disabled while in interrupt (see queue_pte_barriers() and
xen_get_lazy_mode() respectively). This will be handled in the
generic layer in a subsequent patch.

Signed-off-by: Kevin Brodsky 
---
 arch/arm64/include/asm/pgtable.h |  9 ---------
 include/linux/pgtable.h          | 17 +++++++++++++++--
 2 files changed, 15 insertions(+), 11 deletions(-)

diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
index 54f8d6bb6f22..e596899f4029 100644
--- a/arch/arm64/include/asm/pgtable.h
+++ b/arch/arm64/include/asm/pgtable.h
@@ -94,26 +94,17 @@ static inline void arch_enter_lazy_mmu_mode(void)
 	 * keeps tracking simple.
 	 */
 
-	if (in_interrupt())
-		return;
-
 	set_thread_flag(TIF_LAZY_MMU);
 }
 
 static inline void arch_flush_lazy_mmu_mode(void)
 {
-	if (in_interrupt())
-		return;
-
 	if (test_and_clear_thread_flag(TIF_LAZY_MMU_PENDING))
 		emit_pte_barriers();
 }
 
 static inline void arch_leave_lazy_mmu_mode(void)
 {
-	if (in_interrupt())
-		return;
-
 	arch_flush_lazy_mmu_mode();
 	clear_thread_flag(TIF_LAZY_MMU);
 }
diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h
index c121358dba15..8ff6fdb4b13d 100644
--- a/include/linux/pgtable.h
+++ b/include/linux/pgtable.h
@@ -228,27 +228,40 @@ static inline int pmd_dirty(pmd_t pmd)
  * of the lazy mode. So the implementation must assume preemption may be enabled
  * and cpu migration is possible; it must take steps to be robust against this.
  * (In practice, for user PTE updates, the appropriate page table lock(s) are
- * held, but for kernel PTE updates, no lock is held). Nesting is not permitted
- * and the mode cannot be used in interrupt context.
+ * held, but for kernel PTE updates, no lock is held). The mode is disabled in
+ * interrupt context and calls to the lazy_mmu API have no effect.
+ * Nesting is not permitted.
  */
 #ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE
 static inline void lazy_mmu_mode_enable(void)
 {
+	if (in_interrupt())
+		return;
+
 	arch_enter_lazy_mmu_mode();
 }
 
 static inline void lazy_mmu_mode_disable(void)
 {
+	if (in_interrupt())
+		return;
+
 	arch_leave_lazy_mmu_mode();
 }
 
 static inline void lazy_mmu_mode_pause(void)
 {
+	if (in_interrupt())
+		return;
+
 	arch_leave_lazy_mmu_mode();
 }
 
 static inline void lazy_mmu_mode_resume(void)
 {
+	if (in_interrupt())
+		return;
+
 	arch_enter_lazy_mmu_mode();
 }
 #else
-- 
2.51.2



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	Kevin Brodsky ,
	Alexander Gordeev ,
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	"David Hildenbrand (Red Hat)" 
Subject: [PATCH v5 11/12] sparc/mm: replace batch->active with in_lazy_mmu_mode()
Date: Mon, 24 Nov 2025 13:22:27 +0000
Message-ID: <20251124132228.622678-12-kevin.brodsky@arm.com>
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A per-CPU batch struct is activated when entering lazy MMU mode; its
lifetime is the same as the lazy MMU section (it is deactivated when
leaving the mode). Preemption is disabled in that interval to ensure
that the per-CPU reference remains valid.

The generic lazy_mmu layer now tracks whether a task is in lazy MMU
mode. We can therefore use the generic helper in_lazy_mmu_mode()
to tell whether a batch struct is active instead of tracking it
explicitly.

Acked-by: David Hildenbrand (Red Hat) 
Signed-off-by: Kevin Brodsky 
---
 arch/sparc/include/asm/tlbflush_64.h | 1 -
 arch/sparc/mm/tlb.c                  | 9 +--------
 2 files changed, 1 insertion(+), 9 deletions(-)

diff --git a/arch/sparc/include/asm/tlbflush_64.h b/arch/sparc/include/asm/tlbflush_64.h
index 4e1036728e2f..6133306ba59a 100644
--- a/arch/sparc/include/asm/tlbflush_64.h
+++ b/arch/sparc/include/asm/tlbflush_64.h
@@ -12,7 +12,6 @@ struct tlb_batch {
 	unsigned int hugepage_shift;
 	struct mm_struct *mm;
 	unsigned long tlb_nr;
-	unsigned long active;
 	unsigned long vaddrs[TLB_BATCH_NR];
 };
 
diff --git a/arch/sparc/mm/tlb.c b/arch/sparc/mm/tlb.c
index 7b5dfcdb1243..879e22c86e5c 100644
--- a/arch/sparc/mm/tlb.c
+++ b/arch/sparc/mm/tlb.c
@@ -52,11 +52,7 @@ void flush_tlb_pending(void)
 
 void arch_enter_lazy_mmu_mode(void)
 {
-	struct tlb_batch *tb;
-
 	preempt_disable();
-	tb = this_cpu_ptr(&tlb_batch);
-	tb->active = 1;
 }
 
 void arch_flush_lazy_mmu_mode(void)
@@ -69,10 +65,7 @@ void arch_flush_lazy_mmu_mode(void)
 
 void arch_leave_lazy_mmu_mode(void)
 {
-	struct tlb_batch *tb = this_cpu_ptr(&tlb_batch);
-
 	arch_flush_lazy_mmu_mode();
-	tb->active = 0;
 	preempt_enable();
 }
 
@@ -93,7 +86,7 @@ static void tlb_batch_add_one(struct mm_struct *mm, unsigned long vaddr,
 		nr = 0;
 	}
 
-	if (!tb->active) {
+	if (!in_lazy_mmu_mode()) {
 		flush_tsb_user_page(mm, vaddr, hugepage_shift);
 		global_flush_tlb_page(mm, vaddr);
 		goto out;
-- 
2.51.2



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	"David S. Miller" ,
	David Woodhouse ,
	"H. Peter Anvin" ,
	Ingo Molnar ,
	Jann Horn ,
	Juergen Gross ,
	"Liam R. Howlett" ,
	Lorenzo Stoakes ,
	Madhavan Srinivasan ,
	Michael Ellerman ,
	Michal Hocko ,
	Mike Rapoport ,
	Nicholas Piggin ,
	Peter Zijlstra ,
	"Ritesh Harjani (IBM)" ,
	Ryan Roberts ,
	Suren Baghdasaryan ,
	Thomas Gleixner ,
	Venkat Rao Bagalkote ,
	Vlastimil Babka ,
	Will Deacon ,
	Yeoreum Yun ,
	linux-arm-kernel@lists.infradead.org,
	linuxppc-dev@lists.ozlabs.org,
	sparclinux@vger.kernel.org,
	xen-devel@lists.xenproject.org,
	x86@kernel.org
Subject: [PATCH v5 10/12] powerpc/mm: replace batch->active with in_lazy_mmu_mode()
Date: Mon, 24 Nov 2025 13:22:26 +0000
Message-ID: <20251124132228.622678-11-kevin.brodsky@arm.com>
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A per-CPU batch struct is activated when entering lazy MMU mode; its
lifetime is the same as the lazy MMU section (it is deactivated when
leaving the mode). Preemption is disabled in that interval to ensure
that the per-CPU reference remains valid.

The generic lazy_mmu layer now tracks whether a task is in lazy MMU
mode. We can therefore use the generic helper in_lazy_mmu_mode()
to tell whether a batch struct is active instead of tracking it
explicitly.

Acked-by: David Hildenbrand 
Reviewed-by: Ritesh Harjani (IBM) 
Signed-off-by: Kevin Brodsky 
---
 arch/powerpc/include/asm/book3s/64/tlbflush-hash.h | 9 ---------
 arch/powerpc/mm/book3s64/hash_tlb.c                | 2 +-
 2 files changed, 1 insertion(+), 10 deletions(-)

diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h b/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h
index 565c1b7c3eae..6cc9abcd7b3d 100644
--- a/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h
+++ b/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h
@@ -12,7 +12,6 @@
 #define PPC64_TLB_BATCH_NR 192
 
 struct ppc64_tlb_batch {
-	int			active;
 	unsigned long		index;
 	struct mm_struct	*mm;
 	real_pte_t		pte[PPC64_TLB_BATCH_NR];
@@ -26,8 +25,6 @@ extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch);
 
 static inline void arch_enter_lazy_mmu_mode(void)
 {
-	struct ppc64_tlb_batch *batch;
-
 	if (radix_enabled())
 		return;
 	/*
@@ -35,8 +32,6 @@ static inline void arch_enter_lazy_mmu_mode(void)
 	 * operating on kernel page tables.
 	 */
 	preempt_disable();
-	batch = this_cpu_ptr(&ppc64_tlb_batch);
-	batch->active = 1;
 }
 
 static inline void arch_flush_lazy_mmu_mode(void)
@@ -53,14 +48,10 @@ static inline void arch_flush_lazy_mmu_mode(void)
 
 static inline void arch_leave_lazy_mmu_mode(void)
 {
-	struct ppc64_tlb_batch *batch;
-
 	if (radix_enabled())
 		return;
-	batch = this_cpu_ptr(&ppc64_tlb_batch);
 
 	arch_flush_lazy_mmu_mode();
-	batch->active = 0;
 	preempt_enable();
 }
 
diff --git a/arch/powerpc/mm/book3s64/hash_tlb.c b/arch/powerpc/mm/book3s64/hash_tlb.c
index 787f7a0e27f0..72b83f582b6d 100644
--- a/arch/powerpc/mm/book3s64/hash_tlb.c
+++ b/arch/powerpc/mm/book3s64/hash_tlb.c
@@ -100,7 +100,7 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
 	 * Check if we have an active batch on this CPU. If not, just
 	 * flush now and return.
 	 */
-	if (!batch->active) {
+	if (!in_lazy_mmu_mode()) {
 		flush_hash_page(vpn, rpte, psize, ssize, mm_is_thread_local(mm));
 		put_cpu_var(ppc64_tlb_batch);
 		return;
-- 
2.51.2



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To: linux-mm@kvack.org
Cc: linux-kernel@vger.kernel.org,
	Kevin Brodsky ,
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Subject: [PATCH v5 09/12] arm64: mm: replace TIF_LAZY_MMU with in_lazy_mmu_mode()
Date: Mon, 24 Nov 2025 13:22:25 +0000
Message-ID: <20251124132228.622678-10-kevin.brodsky@arm.com>
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The generic lazy_mmu layer now tracks whether a task is in lazy MMU
mode. As a result we no longer need a TIF flag for that purpose -
let's use the new in_lazy_mmu_mode() helper instead.

The explicit check for in_interrupt() is no longer necessary either
as in_lazy_mmu_mode() always returns false in interrupt context.

Signed-off-by: Kevin Brodsky 
---
 arch/arm64/include/asm/pgtable.h     | 19 +++----------------
 arch/arm64/include/asm/thread_info.h |  3 +--
 2 files changed, 4 insertions(+), 18 deletions(-)

diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
index a7d99dee3dc4..dd7ed653a20d 100644
--- a/arch/arm64/include/asm/pgtable.h
+++ b/arch/arm64/include/asm/pgtable.h
@@ -62,28 +62,16 @@ static inline void emit_pte_barriers(void)
 
 static inline void queue_pte_barriers(void)
 {
-	unsigned long flags;
-
-	if (in_interrupt()) {
-		emit_pte_barriers();
-		return;
-	}
-
-	flags = read_thread_flags();
-
-	if (flags & BIT(TIF_LAZY_MMU)) {
+	if (in_lazy_mmu_mode()) {
 		/* Avoid the atomic op if already set. */
-		if (!(flags & BIT(TIF_LAZY_MMU_PENDING)))
+		if (!test_thread_flag(TIF_LAZY_MMU_PENDING))
 			set_thread_flag(TIF_LAZY_MMU_PENDING);
 	} else {
 		emit_pte_barriers();
 	}
 }
 
-static inline void arch_enter_lazy_mmu_mode(void)
-{
-	set_thread_flag(TIF_LAZY_MMU);
-}
+static inline void arch_enter_lazy_mmu_mode(void) {}
 
 static inline void arch_flush_lazy_mmu_mode(void)
 {
@@ -94,7 +82,6 @@ static inline void arch_flush_lazy_mmu_mode(void)
 static inline void arch_leave_lazy_mmu_mode(void)
 {
 	arch_flush_lazy_mmu_mode();
-	clear_thread_flag(TIF_LAZY_MMU);
 }
 
 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h
index f241b8601ebd..4ff8da0767d9 100644
--- a/arch/arm64/include/asm/thread_info.h
+++ b/arch/arm64/include/asm/thread_info.h
@@ -84,8 +84,7 @@ void arch_setup_new_exec(void);
 #define TIF_SME_VL_INHERIT	28	/* Inherit SME vl_onexec across exec */
 #define TIF_KERNEL_FPSTATE	29	/* Task is in a kernel mode FPSIMD section */
 #define TIF_TSC_SIGSEGV		30	/* SIGSEGV on counter-timer access */
-#define TIF_LAZY_MMU		31	/* Task in lazy mmu mode */
-#define TIF_LAZY_MMU_PENDING	32	/* Ops pending for lazy mmu mode exit */
+#define TIF_LAZY_MMU_PENDING	31	/* Ops pending for lazy mmu mode exit */
 
 #define _TIF_SIGPENDING		(1 << TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED	(1 << TIF_NEED_RESCHED)
-- 
2.51.2



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From: =?utf-8?Q?Alex_Benn=C3=A9e?= 
To: Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= 
Cc: Mark Cave-Ayland ,  qemu-devel@nongnu.org,
  Paolo Bonzini ,  David Woodhouse
 ,  Paul Durrant ,  Eduardo Habkost
 ,  xen-devel@lists.xenproject.org,  Anthony PERARD
 ,  Stefano Stabellini ,
  Richard Henderson ,  "Michael S. Tsirkin"
 ,  Marcel Apfelbaum 
Subject: Re: [PATCH] hw/i386/isapc: Remove dead Xen code
In-Reply-To: <39f5f781-398b-4974-8b1e-e7061ed9194f@linaro.org> ("Philippe
	=?utf-8?Q?Mathieu-Daud=C3=A9=22's?= message of "Mon, 24 Nov 2025 12:07:08
 +0100")
References: <20251123185832.53802-1-philmd@linaro.org>
	<066cb998-e89a-4cd1-a89b-865f4a6dcbbd@nutanix.com>
	<39f5f781-398b-4974-8b1e-e7061ed9194f@linaro.org>
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Date: Mon, 24 Nov 2025 13:36:42 +0000
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Philippe Mathieu-Daud=C3=A9  writes:

> On 24/11/25 11:27, Mark Cave-Ayland wrote:
>> On 23/11/2025 18:58, Philippe Mathieu-Daud=C3=A9 wrote:
>>=20
>>> We don't use Xen on the isapc machine: let's remove
>>> pointless code.
>>>
>>> Signed-off-by: Philippe Mathieu-Daud=C3=A9 
>>> ---
>>> =C2=A0 hw/i386/isapc.c | 27 ++++-----------------------
>>> =C2=A0 1 file changed, 4 insertions(+), 23 deletions(-)
>>>
>>> diff --git a/hw/i386/isapc.c b/hw/i386/isapc.c
>>> index 1ba9ae22cc3..1e13a30c505 100644
>>> --- a/hw/i386/isapc.c
>>> +++ b/hw/i386/isapc.c
>>> @@ -17,8 +17,6 @@
>>> =C2=A0 #include "hw/ide/ide-bus.h"
>>> =C2=A0 #include "system/kvm.h"
>>> =C2=A0 #include "hw/i386/kvm/clock.h"
>>> -#include "hw/xen/xen-x86.h"
>>> -#include "system/xen.h"
>>> =C2=A0 #include "hw/rtc/mc146818rtc.h"
>>> =C2=A0 #include "target/i386/cpu.h"
>>> @@ -37,7 +35,6 @@ static void pc_init_isa(MachineState *machine)
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ISABus *isa_bus;
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 uint32_t irq;
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 GSIState *gsi_state;
>>> -=C2=A0=C2=A0=C2=A0 MemoryRegion *ram_memory;
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS=
];
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 int i;
>>> @@ -77,15 +74,9 @@ static void pc_init_isa(MachineState *machine)
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 /*
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 * There is no RAM split for the is=
apc machine
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 */
>>> -=C2=A0=C2=A0=C2=A0 if (xen_enabled()) {
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 xen_hvm_init_pc(pcms, &ram_=
memory);
>>> -=C2=A0=C2=A0=C2=A0 } else {
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ram_memory =3D machine->ram;
>>> -
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 pcms->max_ram_below_4g =3D =
3.5 * GiB;
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 x86ms->above_4g_mem_size =
=3D 0;
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 x86ms->below_4g_mem_size =
=3D machine->ram_size;
>>> -=C2=A0=C2=A0=C2=A0 }
>>> +=C2=A0=C2=A0=C2=A0 pcms->max_ram_below_4g =3D 3.5 * GiB;
>>> +=C2=A0=C2=A0=C2=A0 x86ms->above_4g_mem_size =3D 0;
>>> +=C2=A0=C2=A0=C2=A0 x86ms->below_4g_mem_size =3D machine->ram_size;
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 x86_cpus_init(x86ms, pcmc->default_cpu_v=
ersion);
>>> @@ -94,17 +85,7 @@ static void pc_init_isa(MachineState *machine)
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 }
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 /* allocate ram and load rom/bios */
>>> -=C2=A0=C2=A0=C2=A0 if (!xen_enabled()) {
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 pc_memory_init(pcms, system=
_memory, system_memory, 0);
>>> -=C2=A0=C2=A0=C2=A0 } else {
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 assert(machine->ram_size =
=3D=3D x86ms->below_4g_mem_size +
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 x86ms->a=
bove_4g_mem_size);
>>> -
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (machine->kernel_filenam=
e !=3D NULL) {
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 /* =
For xen HVM direct kernel boot, load linux here */
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 xen=
_load_linux(pcms);
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 }
>>> -=C2=A0=C2=A0=C2=A0 }
>>> +=C2=A0=C2=A0=C2=A0 pc_memory_init(pcms, system_memory, system_memory, =
0);
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 gsi_state =3D pc_gsi_create(&x86ms->gsi,=
 false);
>> FWIW I did contact upstream about this (see https://patchew.org/
>> QEMU/20250618112828.235087-1-
>> mark.caveayland@nutanix.com/20250618112828.235087-13-
>> mark.caveayland@nutanix.com/#91b96b24-af60-4a89-91ec-
>> d0e660a76a0a@nutanix.com) and they mentioned that it should work,
>> which is why I left it in.
>> Unfortunately I don't currently have any way to test it here :/
>
> OK :| IMHO upstream Xen maintainers should provide us a test, otherwise
> we can not make our code base evolve.

Ok how about this:

  As of the xen commit 9e8672f1c36 (tools: remove xend and associated
  python modules) there is no longer the ability to emulate an ISA only
  system. As a result we can drop the code in isapc. We still need to
  support the ISA bus for the -m pc type as Xen doesn't support the q35
  machine model for HVM.

I think the actual support got removed earlier but this was when the
last bits of "Simulate an ISA only system" where removed in 2013.

--=20
Alex Benn=C3=A9e
Virtualisation Tech Lead @ Linaro


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Date: Mon, 24 Nov 2025 14:38:58 +0100
From: Borislav Petkov 
To: Juergen Gross 
Cc: linux-kernel@vger.kernel.org, x86@kernel.org,
	linux-hyperv@vger.kernel.org, Andy Lutomirski ,
	Thomas Gleixner ,
	Ingo Molnar ,
	Dave Hansen ,
	"H. Peter Anvin" ,
	"K. Y. Srinivasan" ,
	Haiyang Zhang ,
	Wei Liu , Dexuan Cui ,
	Peter Zijlstra ,
	Will Deacon , Boqun Feng ,
	Waiman Long , Jiri Kosina ,
	Josh Poimboeuf ,
	Pawan Gupta ,
	Boris Ostrovsky ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH v3 01/21] x86/paravirt: Remove not needed includes of
 paravirt.h
Message-ID: <20251124133858.GFaSRf8rU6w3Tf3wU_@fat_crate.local>
References: <20251006074606.1266-1-jgross@suse.com>
 <20251006074606.1266-2-jgross@suse.com>
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On Mon, Oct 06, 2025 at 09:45:46AM +0200, Juergen Gross wrote:
> In some places asm/paravirt.h is included without really being needed.

Except they are:

$ make allnoconfig
$ rebuild-kernel.sh
...

arch/x86/kernel/x86_init.c:90:43: error: =E2=80=98default_banner=E2=80=99=
 undeclared here (not in a function)
   90 |                 .banner                 =3D default_banner,
      |                                           ^~~~~~~~~~~~~~
make[4]: *** [scripts/Makefile.build:287: arch/x86/kernel/x86_init.o] Err=
or 1
make[4]: *** Waiting for unfinished jobs....
make[3]: *** [scripts/Makefile.build:556: arch/x86/kernel] Error 2
make[2]: *** [scripts/Makefile.build:556: arch/x86] Error 2
make[2]: *** Waiting for unfinished jobs....
make[1]: *** [/mnt/kernel/kernel/linux/Makefile:2010: .] Error 2
make: *** [Makefile:248: __sub-make] Error 2

--=20
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette


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From: "Tu Dinh" 
Subject: =?utf-8?Q?[PATCH]=20x86/vhpet:=20Fix=20sanitization=20of=20legacy=20IRQ=20route?=
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When setting a timer's config register, timer_sanitize_int_route will
always reset the IRQ route value to what's valid corresponding to the
!HPET_CFG_LEGACY case. This is applied even if the HPET is set to
HPET_CFG_LEGACY.

When some operating systems (e.g. Windows) try to write to a timer
config, they will verify and rewrite the register if the values don't
match what they expect. This causes an unnecessary write to HPET_Tn_CFG.

Note, the HPET specification states that for the Tn_INT_ROUTE_CNF field:

"If the value is not supported by this prarticular timer, then the value
read back will not match what is written. [...] If the LegacyReplacement
Route bit is set, then Timers 0 and 1 will have a different routing, and
this bit field has no effect for those two timers."

Therefore, Xen should not reset timer_int_route if legacy mode is
enabled, regardless of what's in there.

Signed-off-by: Tu Dinh 
---
 xen/arch/x86/hvm/hpet.c | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/hvm/hpet.c b/xen/arch/x86/hvm/hpet.c
index f0e5f877f4..fb2f4f94aa 100644
--- a/xen/arch/x86/hvm/hpet.c
+++ b/xen/arch/x86/hvm/hpet.c
@@ -48,6 +48,8 @@
 #define timer_is_32bit(h, n)     (timer_config(h, n) & HPET_TN_32BIT)
 #define hpet_enabled(h)          ((h)->hpet.config & HPET_CFG_ENABLE)
 #define timer_level(h, n)        (timer_config(h, n) & HPET_TN_LEVEL)
+#define timer_is_legacy(h, n) \
+    (((n) <= 1) && ((h)->hpet.config & HPET_CFG_LEGACY))
 
 #define timer_int_route(h, n)    MASK_EXTR(timer_config(h, n), HPET_TN_ROUTE)
 
@@ -244,7 +246,7 @@ static void hpet_set_timer(HPETState *h, unsigned int tn,
          (timer_level(h, tn) && test_bit(tn, &h->hpet.isr)) )
         return;
 
-    if ( !timer_int_route_valid(h, tn) )
+    if ( !timer_is_legacy(h, tn) && !timer_int_route_valid(h, tn) )
     {
         ASSERT_UNREACHABLE();
         return;
@@ -275,7 +277,7 @@ static void hpet_set_timer(HPETState *h, unsigned int tn,
             ? (uint32_t)diff : 0;
 
     destroy_periodic_time(&h->pt[tn]);
-    if ( (tn <= 1) && (h->hpet.config & HPET_CFG_LEGACY) )
+    if ( timer_is_legacy(h, tn) )
     {
         /* if LegacyReplacementRoute bit is set, HPET specification requires
            timer0 be routed to IRQ0 in NON-APIC or IRQ2 in the I/O APIC,
@@ -323,7 +325,7 @@ static inline uint64_t hpet_fixup_reg(
 
 static void timer_sanitize_int_route(HPETState *h, unsigned int tn)
 {
-    if ( timer_int_route_valid(h, tn) )
+    if ( timer_is_legacy(h, tn) || timer_int_route_valid(h, tn) )
         return;
 
     timer_config(h, tn) &= ~HPET_TN_ROUTE;
@@ -379,6 +381,9 @@ static int cf_check hpet_write(
         h->hpet.config = hpet_fixup_reg(new_val, old_val,
                                         HPET_CFG_ENABLE | HPET_CFG_LEGACY);
 
+        for ( i = 0; i < HPET_TIMER_NUM; i++ )
+            timer_sanitize_int_route(h, i);
+
         if ( !(old_val & HPET_CFG_ENABLE) && (new_val & HPET_CFG_ENABLE) )
         {
             /* Enable main counter and interrupt generation. */
-- 
2.43.0



--
Ngoc Tu Dinh | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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Subject: Re: [PATCH v3 5/7] xen/p2m: move xenmem_access_to_p2m_access() to
 common p2m.c
To: Penny Zheng 
Cc: ray.huang@amd.com, grygorii_strashko@epam.com,
 Tamas K Lengyel ,
 Alexandru Isaila ,
 Petre Pircalabu ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <20251121091554.1003315-1-Penny.Zheng@amd.com>
 <20251121091554.1003315-6-Penny.Zheng@amd.com>
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On 21.11.2025 10:15, Penny Zheng wrote:
> Memory access and ALTP2M are two seperate features, while both depending on
> helper xenmem_access_to_p2m_access(). So it betters lives in common p2m.c,
> other than mem_access.c which will be compiled out when VM_EVENT=n && ALTP2M=y.
> Guard xenmem_access_to_p2m_access() with VM_EVENT || ALTP2M, otherwise it
> will become unreachable when both VM_EVENT=n and ALTP2M=n, and hence
> violating Misra rule 2.1
> We also need to move declaration from mem_access.h to p2m-common.h
> An extra blank line is inserted after each case-block to correct coding
> style at the same time.
> 
> Signed-off-by: Penny Zheng 

Acked-by: Jan Beulich 



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Subject: Re: [PATCH v3 6/7] xen/mem_access: wrap memory access when VM_EVENT=n
To: Penny Zheng 
Cc: ray.huang@amd.com, grygorii_strashko@epam.com,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Tamas K Lengyel ,
 Alexandru Isaila ,
 Petre Pircalabu , xen-devel@lists.xenproject.org
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On 21.11.2025 10:15, Penny Zheng wrote:
> @@ -2080,7 +2081,11 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla,
>  #endif
>      }
>  
> -    if ( req_ptr )
> +    /*
> +     * Excessive condition is to avoid runtime undefined error only
> +     * when CONFIG_USBAN=y
> +     */
> +    if ( req_ptr && vm_event_is_enabled(curr) )
>      {

I fear the comment isn't really helpful this way. What's "excessive" here may
be clear from patch context, but it won't be clear when looking at the code
later. Nor would it then be immediately clear why the vm_event_is_enabled()
check is (seemingly) unnecessary. How about this:

"req_ptr being constant NULL when !CONFIG_VM_EVENT, CONFIG_UBSAN=y builds
 have been observed to still hit undefined-ness at runtime. Hence do a
 seemingly redundant vm_event_is_enabled() check here."

With this or any other suitable improvement to the comment:
Acked-by: Jan Beulich 
If we want to go with the suggestion above, I'd be happy to do the replacement
while committing. But of course first the necessary 2nd ack will want
collecting.

Jan


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Subject: Re: [PATCH v5 08/12] mm: enable lazy_mmu sections to nest
To: Kevin Brodsky , linux-mm@kvack.org
Cc: linux-kernel@vger.kernel.org, Alexander Gordeev ,
 Andreas Larsson ,
 Andrew Morton ,
 Boris Ostrovsky , Borislav Petkov
 , Catalin Marinas ,
 Christophe Leroy ,
 Dave Hansen ,
 "David S. Miller" ,
 David Woodhouse , "H. Peter Anvin" ,
 Ingo Molnar , Jann Horn ,
 Juergen Gross , "Liam R. Howlett"
 , Lorenzo Stoakes ,
 Madhavan Srinivasan ,
 Michael Ellerman , Michal Hocko ,
 Mike Rapoport , Nicholas Piggin ,
 Peter Zijlstra ,
 "Ritesh Harjani (IBM)" ,
 Ryan Roberts , Suren Baghdasaryan ,
 Thomas Gleixner ,
 Venkat Rao Bagalkote ,
 Vlastimil Babka , Will Deacon ,
 Yeoreum Yun , linux-arm-kernel@lists.infradead.org,
 linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org,
 xen-devel@lists.xenproject.org, x86@kernel.org
References: <20251124132228.622678-1-kevin.brodsky@arm.com>
 <20251124132228.622678-9-kevin.brodsky@arm.com>
From: "David Hildenbrand (Red Hat)" 
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On 11/24/25 14:22, Kevin Brodsky wrote:
> Despite recent efforts to prevent lazy_mmu sections from nesting, it
> remains difficult to ensure that it never occurs - and in fact it
> does occur on arm64 in certain situations (CONFIG_DEBUG_PAGEALLOC).
> Commit 1ef3095b1405 ("arm64/mm: Permit lazy_mmu_mode to be nested")
> made nesting tolerable on arm64, but without truly supporting it:
> the inner call to leave() disables the batching optimisation before
> the outer section ends.
> 
> This patch actually enables lazy_mmu sections to nest by tracking
> the nesting level in task_struct, in a similar fashion to e.g.
> pagefault_{enable,disable}(). This is fully handled by the generic
> lazy_mmu helpers that were recently introduced.
> 
> lazy_mmu sections were not initially intended to nest, so we need to
> clarify the semantics w.r.t. the arch_*_lazy_mmu_mode() callbacks.
> This patch takes the following approach:
> 
> * The outermost calls to lazy_mmu_mode_{enable,disable}() trigger
>    calls to arch_{enter,leave}_lazy_mmu_mode() - this is unchanged.
> 
> * Nested calls to lazy_mmu_mode_{enable,disable}() are not forwarded
>    to the arch via arch_{enter,leave} - lazy MMU remains enabled so
>    the assumption is that these callbacks are not relevant. However,
>    existing code may rely on a call to disable() to flush any batched
>    state, regardless of nesting. arch_flush_lazy_mmu_mode() is
>    therefore called in that situation.
> 
> A separate interface was recently introduced to temporarily pause
> the lazy MMU mode: lazy_mmu_mode_{pause,resume}(). pause() fully
> exits the mode *regardless of the nesting level*, and resume()
> restores the mode at the same nesting level.
> 
> pause()/resume() are themselves allowed to nest, so we actually
> store two nesting levels in task_struct: enable_count and
> pause_count. A new helper in_lazy_mmu_mode() is introduced to
> determine whether we are currently in lazy MMU mode; this will be
> used in subsequent patches to replace the various ways arch's
> currently track whether the mode is enabled.
> 
> In summary (enable/pause represent the values *after* the call):
> 
> lazy_mmu_mode_enable()		-> arch_enter()	    enable=1 pause=0
>      lazy_mmu_mode_enable()	-> ø		    enable=2 pause=0
> 	lazy_mmu_mode_pause()	-> arch_leave()     enable=2 pause=1
> 	lazy_mmu_mode_resume()	-> arch_enter()     enable=2 pause=0
>      lazy_mmu_mode_disable()	-> arch_flush()     enable=1 pause=0
> lazy_mmu_mode_disable()		-> arch_leave()     enable=0 pause=0
> 
> Note: in_lazy_mmu_mode() is added to  to allow arch
> headers included by  to use it.
> 
> Signed-off-by: Kevin Brodsky 

Nothing jumped at me, so

Acked-by: David Hildenbrand (Red Hat) 

Hoping we can get some more eyes to have a look.

-- 
Cheers

David


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Subject: Re: [PATCH v5 09/12] arm64: mm: replace TIF_LAZY_MMU with
 in_lazy_mmu_mode()
To: Kevin Brodsky , linux-mm@kvack.org
Cc: linux-kernel@vger.kernel.org, Alexander Gordeev ,
 Andreas Larsson ,
 Andrew Morton ,
 Boris Ostrovsky , Borislav Petkov
 , Catalin Marinas ,
 Christophe Leroy ,
 Dave Hansen ,
 "David S. Miller" ,
 David Woodhouse , "H. Peter Anvin" ,
 Ingo Molnar , Jann Horn ,
 Juergen Gross , "Liam R. Howlett"
 , Lorenzo Stoakes ,
 Madhavan Srinivasan ,
 Michael Ellerman , Michal Hocko ,
 Mike Rapoport , Nicholas Piggin ,
 Peter Zijlstra ,
 "Ritesh Harjani (IBM)" ,
 Ryan Roberts , Suren Baghdasaryan ,
 Thomas Gleixner ,
 Venkat Rao Bagalkote ,
 Vlastimil Babka , Will Deacon ,
 Yeoreum Yun , linux-arm-kernel@lists.infradead.org,
 linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org,
 xen-devel@lists.xenproject.org, x86@kernel.org
References: <20251124132228.622678-1-kevin.brodsky@arm.com>
 <20251124132228.622678-10-kevin.brodsky@arm.com>
From: "David Hildenbrand (Red Hat)" 
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On 11/24/25 14:22, Kevin Brodsky wrote:
> The generic lazy_mmu layer now tracks whether a task is in lazy MMU
> mode. As a result we no longer need a TIF flag for that purpose -
> let's use the new in_lazy_mmu_mode() helper instead.
> 
> The explicit check for in_interrupt() is no longer necessary either
> as in_lazy_mmu_mode() always returns false in interrupt context.
> 
> Signed-off-by: Kevin Brodsky 
> ---

Nothing jumped at me

Acked-by: David Hildenbrand (Red Hat) 

-- 
Cheers

David


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Subject: Re: [PATCH v5 07/12] mm: bail out of lazy_mmu_mode_* in interrupt
 context
To: Kevin Brodsky , linux-mm@kvack.org
Cc: linux-kernel@vger.kernel.org, Alexander Gordeev ,
 Andreas Larsson ,
 Andrew Morton ,
 Boris Ostrovsky , Borislav Petkov
 , Catalin Marinas ,
 Christophe Leroy ,
 Dave Hansen ,
 "David S. Miller" ,
 David Woodhouse , "H. Peter Anvin" ,
 Ingo Molnar , Jann Horn ,
 Juergen Gross , "Liam R. Howlett"
 , Lorenzo Stoakes ,
 Madhavan Srinivasan ,
 Michael Ellerman , Michal Hocko ,
 Mike Rapoport , Nicholas Piggin ,
 Peter Zijlstra ,
 "Ritesh Harjani (IBM)" ,
 Ryan Roberts , Suren Baghdasaryan ,
 Thomas Gleixner ,
 Venkat Rao Bagalkote ,
 Vlastimil Babka , Will Deacon ,
 Yeoreum Yun , linux-arm-kernel@lists.infradead.org,
 linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org,
 xen-devel@lists.xenproject.org, x86@kernel.org
References: <20251124132228.622678-1-kevin.brodsky@arm.com>
 <20251124132228.622678-8-kevin.brodsky@arm.com>
From: "David Hildenbrand (Red Hat)" 
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On 11/24/25 14:22, Kevin Brodsky wrote:
> The lazy MMU mode cannot be used in interrupt context. This is
> documented in , but isn't consistently handled
> across architectures.
> 
> arm64 ensures that calls to lazy_mmu_mode_* have no effect in
> interrupt context, because such calls do occur in certain
> configurations - see commit b81c688426a9 ("arm64/mm: Disable barrier
> batching in interrupt contexts"). Other architectures do not check
> this situation, most likely because it hasn't occurred so far.
> 
> Let's handle this in the new generic lazy_mmu layer, in the same
> fashion as arm64: bail out of lazy_mmu_mode_* if in_interrupt().
> Also remove the arm64 handling that is now redundant.
> 
> Both arm64 and x86/Xen also ensure that any lazy MMU optimisation is
> disabled while in interrupt (see queue_pte_barriers() and
> xen_get_lazy_mode() respectively). This will be handled in the
> generic layer in a subsequent patch.
> 
> Signed-off-by: Kevin Brodsky 
> ---

(resending as I pushed the wrong button there ...)

Moving this patch earlier LGTM, hoping we don't get any unexpected
surprises ...

Acked-by: David Hildenbrand (Red Hat) 

-- 
Cheers

David


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 Andreas Larsson ,
 Andrew Morton ,
 Boris Ostrovsky , Borislav Petkov
 , Catalin Marinas ,
 Christophe Leroy ,
 Dave Hansen ,
 "David S. Miller" ,
 David Woodhouse , "H. Peter Anvin" ,
 Ingo Molnar , Jann Horn ,
 Juergen Gross , "Liam R. Howlett"
 , Lorenzo Stoakes ,
 Madhavan Srinivasan ,
 Michael Ellerman , Michal Hocko ,
 Mike Rapoport , Nicholas Piggin ,
 Peter Zijlstra ,
 "Ritesh Harjani (IBM)" ,
 Ryan Roberts , Suren Baghdasaryan ,
 Thomas Gleixner ,
 Venkat Rao Bagalkote ,
 Vlastimil Babka , Will Deacon ,
 Yeoreum Yun , linux-arm-kernel@lists.infradead.org,
 linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org,
 xen-devel@lists.xenproject.org, x86@kernel.org
References: <20251124132228.622678-1-kevin.brodsky@arm.com>
 <20251124132228.622678-13-kevin.brodsky@arm.com>
From: "David Hildenbrand (Red Hat)" 
Content-Language: en-US
In-Reply-To: <20251124132228.622678-13-kevin.brodsky@arm.com>
Content-Type: text/plain; charset=UTF-8; format=flowed
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On 11/24/25 14:22, Kevin Brodsky wrote:
> We currently set a TIF flag when scheduling out a task that is in
> lazy MMU mode, in order to restore it when the task is scheduled
> again.
> 
> The generic lazy_mmu layer now tracks whether a task is in lazy MMU
> mode in task_struct::lazy_mmu_state. We can therefore check that
> state when switching to the new task, instead of using a separate
> TIF flag.
> 
> Signed-off-by: Kevin Brodsky 
> ---

Nothing jumped at me, hoping for another pair of eyes from the XEN folks

Acked-by: David Hildenbrand (Red Hat) 

-- 
Cheers

David


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Date: Mon, 24 Nov 2025 14:19:45 +0000
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v3] XEN: enable MC/DC coverage for Clang
To: Saman Dehghan , xen-devel@lists.xenproject.org
Cc: Anthony PERARD ,
 Michal Orzel , Jan Beulich ,
 Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Stefano Stabellini 
References: <52b0762ac4b5535a842a530365a75bdc81a5fe61.1763981619.git.samaan.dehghan@gmail.com>
 
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On 24/11/2025 1:17 pm, Saman Dehghan wrote:
> diff --git a/xen/Kconfig b/xen/Kconfig
> index a5e5af3b76..8f2cc111cd 100644
> --- a/xen/Kconfig
> +++ b/xen/Kconfig
> @@ -51,9 +51,14 @@ config CC_HAS_ASM_GOTO_OUTPUT
>  	depends on !GCC_ASM_GOTO_OUTPUT_BROKEN
>  	depends on $(success,echo 'int foo(int x) { asm goto ("": "=r"(x) ::: bar); return x; bar: return 0; }' | $(CC) -x c - -c -o /dev/null)
>  
> -# Compiler supports -fcondition-coverage aka MC/DC
> +# Compiler supports Modified Condition/Decision Coverage (MC/DC).

Ah sorry, I only meant for this line.  Enough for someone to usefully
google.

Otherwise, Reviewed-by: Andrew Cooper 

I can trim this down on commit if you're happy.

~Andrew

> +# MC/DC is a rigorous code coverage metric that requires every condition
> +# within a decision (boolean expression) to be shown to independently
> +# influence the decision's final outcome.
> +#
> +# Minimum toolchain baseline: GCC >= 14, or Clang >= 18.
>  config CC_HAS_MCDC
> -	def_bool $(cc-option,-fcondition-coverage)
> +	def_bool $(cc-option,-fcondition-coverage) || $(cc-option,-fprofile-instr-generate -fcoverage-mapping -fcoverage-mcdc)
>  
>  # Set code alignment.
>  #
>


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Date: Mon, 24 Nov 2025 15:26:23 +0100
From: Borislav Petkov 
To: Juergen Gross 
Cc: linux-kernel@vger.kernel.org, x86@kernel.org,
	linux-hyperv@vger.kernel.org, Andy Lutomirski ,
	Thomas Gleixner ,
	Ingo Molnar ,
	Dave Hansen ,
	"H. Peter Anvin" ,
	"K. Y. Srinivasan" ,
	Haiyang Zhang ,
	Wei Liu , Dexuan Cui ,
	Peter Zijlstra ,
	Will Deacon , Boqun Feng ,
	Waiman Long , Jiri Kosina ,
	Josh Poimboeuf ,
	Pawan Gupta ,
	Boris Ostrovsky ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH v3 01/21] x86/paravirt: Remove not needed includes of
 paravirt.h
Message-ID: <20251124142623.GGaSRrD-N15vnJY0DJ@fat_crate.local>
References: <20251006074606.1266-1-jgross@suse.com>
 <20251006074606.1266-2-jgross@suse.com>
 <20251124133858.GFaSRf8rU6w3Tf3wU_@fat_crate.local>
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On Mon, Nov 24, 2025 at 02:38:58PM +0100, Borislav Petkov wrote:
> On Mon, Oct 06, 2025 at 09:45:46AM +0200, Juergen Gross wrote:
> > In some places asm/paravirt.h is included without really being needed=
.
>=20
> Except they are:
>=20
> $ make allnoconfig
> $ rebuild-kernel.sh
> ...
>=20
> arch/x86/kernel/x86_init.c:90:43: error: =E2=80=98default_banner=E2=80=99=
 undeclared here (not in a function)
>    90 |                 .banner                 =3D default_banner,
>       |                                           ^~~~~~~~~~~~~~
> make[4]: *** [scripts/Makefile.build:287: arch/x86/kernel/x86_init.o] E=
rror 1
> make[4]: *** Waiting for unfinished jobs....
> make[3]: *** [scripts/Makefile.build:556: arch/x86/kernel] Error 2
> make[2]: *** [scripts/Makefile.build:556: arch/x86] Error 2
> make[2]: *** Waiting for unfinished jobs....
> make[1]: *** [/mnt/kernel/kernel/linux/Makefile:2010: .] Error 2
> make: *** [Makefile:248: __sub-make] Error 2

Before you submit the first 12 next time, please build-test each patch wi=
th:

SMOKE_CONFIGS=3D("allnoconfig" "defconfig" "allmodconfig" "allyesconfig")

and those architectures:

ARCHES=3D('x86_64' 'i386')

Thx.

--=20
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette


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Date: Mon, 24 Nov 2025 15:30:56 +0100
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Subject: Re: [PATCH v3 1/4] build: add make macro for making file from file.in
To: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <20251121132332.23514-1-jgross@suse.com>
 <20251121132332.23514-2-jgross@suse.com>
 
 <826037a5-dacf-434f-90d9-8f12e61bdd6e@suse.com>
 <0ece9df6-8a04-4ffa-bcf4-d7a3fd4bbef4@suse.com>
 
 
 
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From: Jan Beulich 
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On 24.11.2025 13:45, Jürgen Groß wrote:
> On 24.11.25 13:18, Jan Beulich wrote:
>> On 24.11.2025 12:27, Juergen Gross wrote:
>>> On 24.11.25 12:15, Jan Beulich wrote:
>>>> On 24.11.2025 12:05, Jürgen Groß wrote:
>>>>> On 24.11.25 11:41, Jan Beulich wrote:
>>>>>> On 21.11.2025 14:23, Juergen Gross wrote:
>>>>>>> --- a/Config.mk
>>>>>>> +++ b/Config.mk
>>>>>>> @@ -159,6 +159,19 @@ define move-if-changed
>>>>>>>     	if ! cmp -s $(1) $(2); then mv -f $(1) $(2); else rm -f $(1); fi
>>>>>>>     endef
>>>>>>>     
>>>>>>> +PATH_FILES := Paths
>>>>>>> +INC_FILES = $(foreach f, $(PATH_FILES), $(XEN_ROOT)/config/$(f).mk)
>>>>>>> +
>>>>>>> +include $(INC_FILES)
>>>>>>> +
>>>>>>> +BUILD_MAKE_VARS = $(foreach f, $(PATH_FILES), $(shell awk '$$2 == ":=" { print $$1; }' $(XEN_ROOT)/config/$(f).mk.in))
>>>>>>
>>>>>> Feels like my prior comments weren't really addressed. I continue to think that
>>>>>> none of the above is part of what the subject says.
>>>>>
>>>>> I really don't understand your concern here.
>>>>>
>>>>> For replacing the @markers@ make needs to know what should be replaced.
>>>>> So it needs to scan the files containing the markers and gather them.
>>>>> This is what is done above.
>>>>>
>>>>> In the final macro below the replacements are done then. How would you
>>>>> handle that?
>>>>
>>>> By passing (another) argument to the macro, for example. As indicated
>>>> earlier, different sub-trees may have different places where these
>>>> definitions live, and they would want to be able to pass that in
>>>> (ideally without needing to put this in a common part of the tree).
>>>
>>> I don't get what you want to pass in additionally.
>>>
>>> I've already changed the macro and the Makefiles to be able to add another
>>> marker file to the PATH_FILES variable. What else do you need?
>>
>> Well, that's simply an odd way of passing a parameter. Plus, the extra file
> 
> We do that all the times, e.g. by "OBJ-y += ..."

That's sufficiently different though: Accumulating the set of objects to
produce is kind of naturally done that way.

>> won't affect INC_FILES, or more precisely its use in the include directive
>> in patch 1: At least aiui, $(INC_FILES) is expanded at the point when the
>> directive is processed. Hence why you need to open-code another include
>> there.
> 
> The INC_FILES variable is mostly needed for specifying the dependence of
> the generated files on the files mentioned in PATH_FILES.
> 
> It might be better to just have "-include $(XEN_ROOT/config/Paths.mk" in
> Config.mk, matching the setting of PATH_FILES there.

Looking at this the 3rd or 4th time now, I still don't quite get why the
include is needed in the first place. You don't mean to use (right here)
any of the settings the file produces, do you? Really, as also mentioned
by Andrew, you really can't, because in a pure hypervisor build the file
wouldn't have been made, as no configure would have run.

If I'm not mistaken, you really need those values only at the time you
execute the rule. And I'm worried of these definitions to collide with
something else. Hence one desire would be to limit the scope of these
variables to just the new rule. Maybe something like

# Replace @xxx@ markers in $(1).in with $(xxx) variable contents, write to $(1)
define apply-build-vars
$(1): $$(shell grep -h := $$(wildcard $$(INC_FILES)) /dev/null)
$(1): $(1).in $$(INC_FILES)
	sed $$(foreach v, $$(BUILD_MAKE_VARS), -e 's#@$$(v)@#$$($$(v))#g') <$$< >$$@
endef

could work? (This likely depends on INC_FILES to only list files which
are configure generated, i.e. wouldn't be updated by a make rule.)

Jan


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References: <52b0762ac4b5535a842a530365a75bdc81a5fe61.1763981619.git.samaan.dehghan@gmail.com>
 
 
In-Reply-To: 
From: Saman Dehghan 
Date: Mon, 24 Nov 2025 08:30:47 -0600
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Message-ID: 
Subject: Re: [PATCH v3] XEN: enable MC/DC coverage for Clang
To: Andrew Cooper 
Cc: xen-devel@lists.xenproject.org, Anthony PERARD , 
	Michal Orzel , Jan Beulich , Julien Grall , 
	=?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
	Stefano Stabellini 
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On Mon, Nov 24, 2025 at 8:19=E2=80=AFAM Andrew Cooper  wrote:
>
> On 24/11/2025 1:17 pm, Saman Dehghan wrote:
> > diff --git a/xen/Kconfig b/xen/Kconfig
> > index a5e5af3b76..8f2cc111cd 100644
> > --- a/xen/Kconfig
> > +++ b/xen/Kconfig
> > @@ -51,9 +51,14 @@ config CC_HAS_ASM_GOTO_OUTPUT
> >       depends on !GCC_ASM_GOTO_OUTPUT_BROKEN
> >       depends on $(success,echo 'int foo(int x) { asm goto ("": "=3Dr"(=
x) ::: bar); return x; bar: return 0; }' | $(CC) -x c - -c -o /dev/null)
> >
> > -# Compiler supports -fcondition-coverage aka MC/DC
> > +# Compiler supports Modified Condition/Decision Coverage (MC/DC).
>
> Ah sorry, I only meant for this line.  Enough for someone to usefully
> google.
>
> Otherwise, Reviewed-by: Andrew Cooper 
>
> I can trim this down on commit if you're happy.
>
> ~Andrew

I=E2=80=99m happy with it, thanks a lot Andrew for suggesting to trim that =
line.

~Saman

>
> > +# MC/DC is a rigorous code coverage metric that requires every conditi=
on
> > +# within a decision (boolean expression) to be shown to independently
> > +# influence the decision's final outcome.
> > +#
> > +# Minimum toolchain baseline: GCC >=3D 14, or Clang >=3D 18.
> >  config CC_HAS_MCDC
> > -     def_bool $(cc-option,-fcondition-coverage)
> > +     def_bool $(cc-option,-fcondition-coverage) || $(cc-option,-fprofi=
le-instr-generate -fcoverage-mapping -fcoverage-mcdc)
> >
> >  # Set code alignment.
> >  #
> >


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On 2025-11-24 07:25, Jan Beulich wrote:
> There's no need to invoke CPUID yet another time. This way two of the
> static booleans can also go away.
> 
> Signed-off-by: Jan Beulich 
> ---
> v2: Introduce cpu_has_*.
> 
> --- a/xen/arch/x86/acpi/cpufreq/hwp.c
> +++ b/xen/arch/x86/acpi/cpufreq/hwp.c

> @@ -226,7 +214,8 @@ static int cf_check hwp_cpufreq_verify(s
>   {
>       struct hwp_drv_data *data = per_cpu(hwp_drv_data, policy->cpu);
>   
> -    if ( !feature_hwp_activity_window && data->activity_window )
> +    if ( !cpu_has_hwp_activity_window &&
> +         data->activity_window )

This ...
>       {
>           hwp_verbose("HWP activity window not supported\n");
>   

> @@ -537,7 +526,8 @@ int get_hwp_para(unsigned int cpu,
>           return -ENODATA;
>   
>       cppc_para->features         =
> -        (feature_hwp_activity_window ? XEN_SYSCTL_CPPC_FEAT_ACT_WINDOW : 0);
> +        (cpu_has_hwp_activity_window
> +         ? XEN_SYSCTL_CPPC_FEAT_ACT_WINDOW : 0);

...and this can still be on one line.

Preferably with that fixed:

Reviewed-by: Jason Andryuk 

Thanks,
Jason

>       cppc_para->lowest           = data->hw.lowest;
>       cppc_para->lowest_nonlinear = data->hw.most_efficient;
>       cppc_para->nominal          = data->hw.guaranteed;


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Subject: Re: [PATCH v4 06/12] mm: introduce generic lazy_mmu helpers
Content-Language: en-GB
To: Kevin Brodsky , linux-mm@kvack.org
Cc: linux-kernel@vger.kernel.org, Alexander Gordeev ,
 Andreas Larsson ,
 Andrew Morton ,
 Boris Ostrovsky , Borislav Petkov
 , Catalin Marinas ,
 Christophe Leroy ,
 Dave Hansen ,
 David Hildenbrand , "David S. Miller"
 , David Woodhouse ,
 "H. Peter Anvin" , Ingo Molnar ,
 Jann Horn , Juergen Gross ,
 "Liam R. Howlett" ,
 Lorenzo Stoakes ,
 Madhavan Srinivasan ,
 Michael Ellerman , Michal Hocko ,
 Mike Rapoport , Nicholas Piggin ,
 Peter Zijlstra , Suren Baghdasaryan
 , Thomas Gleixner ,
 Vlastimil Babka , Will Deacon ,
 Yeoreum Yun , linux-arm-kernel@lists.infradead.org,
 linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org,
 xen-devel@lists.xenproject.org, x86@kernel.org
References: <20251029100909.3381140-1-kevin.brodsky@arm.com>
 <20251029100909.3381140-7-kevin.brodsky@arm.com>
 <71418b31-aedb-4600-9558-842515dd6c44@arm.com>
 
 
From: Ryan Roberts 
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On 24/11/2025 12:47, Kevin Brodsky wrote:
> On 10/11/2025 11:45, Kevin Brodsky wrote:
>>>> diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
>>>> index b8d37eb037fc..d9c8e94f140f 100644
>>>> --- a/arch/arm64/mm/mmu.c
>>>> +++ b/arch/arm64/mm/mmu.c
>>>> @@ -731,7 +731,7 @@ int split_kernel_leaf_mapping(unsigned long start, unsigned long end)
>>>>  		return -EINVAL;
>>>>  
>>>>  	mutex_lock(&pgtable_split_lock);
>>>> -	arch_enter_lazy_mmu_mode();
>>>> +	lazy_mmu_mode_enable();
>>>>  
>>>>  	/*
>>>>  	 * The split_kernel_leaf_mapping_locked() may sleep, it is not a
>>> This is a bit unfortunate, IMHO. The rest of this comment explains that although
>>> you're not supposed to sleep inside lazy mmu mode, it's fine for arm64's
>>> implementation. But we are no longer calling arm64's implementation; we are
>>> calling a generic function, which does who knows what.
>>>
>>> I think it all still works, but we are no longer containing our assumptions in
>>> arm64 code. We are relying on implementation details of generic code.
>> I see your point. The change itself is still correct (and required
>> considering patch 8), but maybe the documentation of the generic
>> interface should be clarified to guarantee that the generic layer can
>> itself cope with sleeping - without any guarantee regarding the
>> behaviour of arch_*_lazy_mmu_mode.
> 
> Re-reading the existing comment in , I think it already
> makes clear that sleeping is not forbidden by design:
> 
>>  * In the general case, no lock is guaranteed to be held between entry
>> and exit
>>  * of the lazy mode. So the implementation must assume preemption may
>> be enabled
>>  * and cpu migration is possible; it must take steps to be robust
>> against this.
> 
> The arch implementation may disable preemption, but arm64 code can rely
> on the arm64 implementation allowing sleeping.

Yeah ok, I buy that!

> 
> - Kevin
> 



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Subject: Re: [PATCH] x86/vhpet: Fix sanitization of legacy IRQ route
To: Tu Dinh 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org
References: <20251124134344.456-1-ngoc-tu.dinh@vates.tech>
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On 24.11.2025 14:43, Tu Dinh wrote:
> When setting a timer's config register, timer_sanitize_int_route will
> always reset the IRQ route value to what's valid corresponding to the
> !HPET_CFG_LEGACY case. This is applied even if the HPET is set to
> HPET_CFG_LEGACY.
> 
> When some operating systems (e.g. Windows) try to write to a timer
> config, they will verify and rewrite the register if the values don't
> match what they expect. This causes an unnecessary write to HPET_Tn_CFG.
> 
> Note, the HPET specification states that for the Tn_INT_ROUTE_CNF field:
> 
> "If the value is not supported by this prarticular timer, then the value
> read back will not match what is written. [...] If the LegacyReplacement
> Route bit is set, then Timers 0 and 1 will have a different routing, and
> this bit field has no effect for those two timers."
> 
> Therefore, Xen should not reset timer_int_route if legacy mode is
> enabled, regardless of what's in there.

Fixes: ec40d3fe2147 ("x86/vhpet: check that the set interrupt route is valid")
(I think)

> Signed-off-by: Tu Dinh 
> ---
>  xen/arch/x86/hvm/hpet.c | 11 ++++++++---
>  1 file changed, 8 insertions(+), 3 deletions(-)
> 
> --- a/xen/arch/x86/hvm/hpet.c
> +++ b/xen/arch/x86/hvm/hpet.c
> @@ -48,6 +48,8 @@
>  #define timer_is_32bit(h, n)     (timer_config(h, n) & HPET_TN_32BIT)
>  #define hpet_enabled(h)          ((h)->hpet.config & HPET_CFG_ENABLE)
>  #define timer_level(h, n)        (timer_config(h, n) & HPET_TN_LEVEL)
> +#define timer_is_legacy(h, n) \
> +    (((n) <= 1) && ((h)->hpet.config & HPET_CFG_LEGACY))
>  
>  #define timer_int_route(h, n)    MASK_EXTR(timer_config(h, n), HPET_TN_ROUTE)
>  
> @@ -244,7 +246,7 @@ static void hpet_set_timer(HPETState *h, unsigned int tn,
>           (timer_level(h, tn) && test_bit(tn, &h->hpet.isr)) )
>          return;
>  
> -    if ( !timer_int_route_valid(h, tn) )
> +    if ( !timer_is_legacy(h, tn) && !timer_int_route_valid(h, tn) )

Seeing this and the other use together with timer_int_route_valid(),
wouldn't timer_int_route_valid() better itself invoke the new macro?

> @@ -379,6 +381,9 @@ static int cf_check hpet_write(
>          h->hpet.config = hpet_fixup_reg(new_val, old_val,
>                                          HPET_CFG_ENABLE | HPET_CFG_LEGACY);
>  
> +        for ( i = 0; i < HPET_TIMER_NUM; i++ )
> +            timer_sanitize_int_route(h, i);

Strictly speaking this is needed only when HPET_CFG_LEGACY went from
1 to 0. Plus it's needed only on the first 2 channels, as it's only
there where timer_sanitize_int_route() changes behavior. I'm not going
to insist to limit it like this, but if you don't, then I'd like to ask
for a comment here clarifying that excess work is done for simplicity's
sake.

Jan


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On 24.11.2025 15:35, Jason Andryuk wrote:
> On 2025-11-24 07:25, Jan Beulich wrote:
>> --- a/xen/arch/x86/acpi/cpufreq/hwp.c
>> +++ b/xen/arch/x86/acpi/cpufreq/hwp.c
> 
>> @@ -226,7 +214,8 @@ static int cf_check hwp_cpufreq_verify(s
>>   {
>>       struct hwp_drv_data *data = per_cpu(hwp_drv_data, policy->cpu);
>>   
>> -    if ( !feature_hwp_activity_window && data->activity_window )
>> +    if ( !cpu_has_hwp_activity_window &&
>> +         data->activity_window )
> 
> This ...
>>       {
>>           hwp_verbose("HWP activity window not supported\n");
>>   
> 
>> @@ -537,7 +526,8 @@ int get_hwp_para(unsigned int cpu,
>>           return -ENODATA;
>>   
>>       cppc_para->features         =
>> -        (feature_hwp_activity_window ? XEN_SYSCTL_CPPC_FEAT_ACT_WINDOW : 0);
>> +        (cpu_has_hwp_activity_window
>> +         ? XEN_SYSCTL_CPPC_FEAT_ACT_WINDOW : 0);
> 
> ...and this can still be on one line.

Oh, yes, the lines now became shorter again.

> Preferably with that fixed:
> 
> Reviewed-by: Jason Andryuk 

Thanks.

Jan


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Subject: [PATCH v9 10/10] x86emul: misc additions
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01: x86emul: support LKGS
02: x86emul+VMX: support {RD,WR}MSRLIST
03: x86emul: support USER_MSR instructions
04: x86/cpu-policy: re-arrange no-VMX logic
05: VMX: support USER_MSR
06: VMX: support MSR-IMM
07: x86emul: support MSR_IMM instructions
08: x86emul: support non-SIMD MOVRS
09: x86: use / "support" UDB
10: x86emul: support AVX512-BMM

Jan


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Subject: [PATCH v9 01/10] x86emul: support LKGS
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
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Provide support for this insn, which is a prereq to FRED. CPUID-wise,
while its and FRED's enumerators were already introduced, their dependency
still needs adding.

While adding a testcase, also add a SWAPGS one. In order to not affect
the behavior of pre-existing tests, install write_{segment,msr} hooks
only transiently.

Signed-off-by: Jan Beulich 
---
Instead of ->read_segment() we could of course also use ->read_msr() to
fetch the original GS base. I don't think I can see a clear advantage of
either approach; the way it's done it matches how we handle SWAPGS.

For PV save_segments() would need adjustment, but the insn being
restricted to ring 0 means PV guests can't use it anyway (unless we
wanted to emulate it as another privileged insn).
---
v9: Re-base.
v8: Re-base.
v6: Use MSR constants in test harness. S->s in cpufeatureset.h. Add
    NMI_SRC feature bits. Re-base.
v5: Re-base.
v3: Add dependency on LM. Re-base.
v2: Use X86_EXC_*. Add comments.

--- a/tools/tests/x86_emulator/predicates.c
+++ b/tools/tests/x86_emulator/predicates.c
@@ -326,6 +326,7 @@ static const struct {
     { { 0x00, 0x18 }, { 2, 2 }, T, R }, /* ltr */
     { { 0x00, 0x20 }, { 2, 2 }, T, R }, /* verr */
     { { 0x00, 0x28 }, { 2, 2 }, T, R }, /* verw */
+    { { 0x00, 0x30 }, { 0, 2 }, T, R, pfx_f2 }, /* lkgs */
     { { 0x01, 0x00 }, { 2, 2 }, F, W }, /* sgdt */
     { { 0x01, 0x08 }, { 2, 2 }, F, W }, /* sidt */
     { { 0x01, 0x10 }, { 2, 2 }, F, R }, /* lgdt */
--- a/tools/tests/x86_emulator/test_x86_emulator.c
+++ b/tools/tests/x86_emulator/test_x86_emulator.c
@@ -672,6 +672,10 @@ static int blk(
     return x86_emul_blk((void *)offset, p_data, bytes, eflags, state, ctxt);
 }
 
+#ifdef __x86_64__
+static unsigned long gs_base, gs_base_shadow;
+#endif
+
 static int read_segment(
     enum x86_segment seg,
     struct segment_register *reg,
@@ -681,8 +685,30 @@ static int read_segment(
         return X86EMUL_UNHANDLEABLE;
     memset(reg, 0, sizeof(*reg));
     reg->p = 1;
+
+#ifdef __x86_64__
+    if ( seg == x86_seg_gs )
+        reg->base = gs_base;
+#endif
+
+    return X86EMUL_OKAY;
+}
+
+#ifdef __x86_64__
+static int write_segment(
+    enum x86_segment seg,
+    const struct segment_register *reg,
+    struct x86_emulate_ctxt *ctxt)
+{
+    if ( !is_x86_user_segment(seg) )
+        return X86EMUL_UNHANDLEABLE;
+
+    if ( seg == x86_seg_gs )
+        gs_base = reg->base;
+
     return X86EMUL_OKAY;
 }
+#endif
 
 static int read_msr(
     unsigned int reg,
@@ -695,6 +721,20 @@ static int read_msr(
         *val = ctxt->addr_size > 32 ? EFER_LME | EFER_LMA : 0;
         return X86EMUL_OKAY;
 
+#ifdef __x86_64__
+    case MSR_GS_BASE:
+        if ( ctxt->addr_size < 64 )
+            break;
+        *val = gs_base;
+        return X86EMUL_OKAY;
+
+    case MSR_SHADOW_GS_BASE:
+        if ( ctxt->addr_size < 64 )
+            break;
+        *val = gs_base_shadow;
+        return X86EMUL_OKAY;
+#endif
+
     case MSR_TSC_AUX:
 #define TSC_AUX_VALUE 0xCACACACA
         *val = TSC_AUX_VALUE;
@@ -704,6 +744,31 @@ static int read_msr(
     return X86EMUL_UNHANDLEABLE;
 }
 
+#ifdef __x86_64__
+static int write_msr(
+    unsigned int reg,
+    uint64_t val,
+    struct x86_emulate_ctxt *ctxt)
+{
+    switch ( reg )
+    {
+    case MSR_GS_BASE:
+        if ( ctxt->addr_size < 64 || !is_canonical_address(val) )
+            break;
+        gs_base = val;
+        return X86EMUL_OKAY;
+
+    case MSR_SHADOW_GS_BASE:
+        if ( ctxt->addr_size < 64 || !is_canonical_address(val) )
+            break;
+        gs_base_shadow = val;
+        return X86EMUL_OKAY;
+    }
+
+    return X86EMUL_UNHANDLEABLE;
+}
+#endif
+
 #define INVPCID_ADDR 0x12345678
 #define INVPCID_PCID 0x123
 
@@ -1338,6 +1403,41 @@ int main(int argc, char **argv)
         printf("%u bytes read - ", bytes_read);
         goto fail;
     }
+    printf("okay\n");
+
+    emulops.write_segment = write_segment;
+    emulops.write_msr     = write_msr;
+
+    printf("%-40s", "Testing swapgs...");
+    instr[0] = 0x0f; instr[1] = 0x01; instr[2] = 0xf8;
+    regs.eip = (unsigned long)&instr[0];
+    gs_base = 0xffffeeeecccc8888UL;
+    gs_base_shadow = 0x0000111122224444UL;
+    rc = x86_emulate(&ctxt, &emulops);
+    if ( (rc != X86EMUL_OKAY) ||
+         (regs.eip != (unsigned long)&instr[3]) ||
+         (gs_base != 0x0000111122224444UL) ||
+         (gs_base_shadow != 0xffffeeeecccc8888UL) )
+        goto fail;
+    printf("okay\n");
+
+    printf("%-40s", "Testing lkgs 2(%rdx)...");
+    instr[0] = 0xf2; instr[1] = 0x0f; instr[2] = 0x00; instr[3] = 0x72; instr[4] = 0x02;
+    regs.eip = (unsigned long)&instr[0];
+    regs.edx = (unsigned long)res;
+    res[0]   = 0x00004444;
+    res[1]   = 0x8888cccc;
+    i = cpu_policy.extd.nscb; cpu_policy.extd.nscb = true; /* for AMD */
+    rc = x86_emulate(&ctxt, &emulops);
+    if ( (rc != X86EMUL_OKAY) ||
+         (regs.eip != (unsigned long)&instr[5]) ||
+         (gs_base != 0x0000111122224444UL) ||
+         gs_base_shadow )
+        goto fail;
+
+    cpu_policy.extd.nscb = i;
+    emulops.write_segment = NULL;
+    emulops.write_msr     = NULL;
 #endif
     printf("okay\n");
 
--- a/tools/tests/x86_emulator/x86-emulate.c
+++ b/tools/tests/x86_emulator/x86-emulate.c
@@ -85,6 +85,7 @@ bool emul_test_init(void)
     cpu_policy.feat.invpcid = true;
     cpu_policy.feat.adx = true;
     cpu_policy.feat.rdpid = true;
+    cpu_policy.feat.lkgs = true;
     cpu_policy.feat.wrmsrns = true;
     cpu_policy.extd.clzero = true;
 
--- a/xen/arch/x86/x86_emulate/decode.c
+++ b/xen/arch/x86/x86_emulate/decode.c
@@ -744,8 +744,12 @@ decode_twobyte(struct x86_emulate_state
         case 0:
             s->desc |= DstMem | SrcImplicit | Mov;
             break;
+        case 6:
+            if ( !(s->modrm_reg & 1) && mode_64bit() )
+            {
         case 2: case 4:
-            s->desc |= SrcMem16;
+                s->desc |= SrcMem16;
+            }
             break;
         }
         break;
--- a/xen/arch/x86/x86_emulate/private.h
+++ b/xen/arch/x86/x86_emulate/private.h
@@ -608,6 +608,7 @@ amd_like(const struct x86_emulate_ctxt *
 #define vcpu_has_avx_vnni()    (ctxt->cpuid->feat.avx_vnni)
 #define vcpu_has_avx512_bf16() (ctxt->cpuid->feat.avx512_bf16)
 #define vcpu_has_cmpccxadd()   (ctxt->cpuid->feat.cmpccxadd)
+#define vcpu_has_lkgs()        (ctxt->cpuid->feat.lkgs)
 #define vcpu_has_wrmsrns()     (ctxt->cpuid->feat.wrmsrns)
 #define vcpu_has_avx_ifma()    (ctxt->cpuid->feat.avx_ifma)
 #define vcpu_has_avx_vnni_int8() (ctxt->cpuid->feat.avx_vnni_int8)
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -2899,8 +2899,35 @@ x86_emulate(
                 break;
             }
             break;
-        default:
-            generate_exception_if(true, X86_EXC_UD);
+        case 6: /* lkgs */
+            generate_exception_if((modrm_reg & 1) || vex.pfx != vex_f2,
+                                  X86_EXC_UD);
+            generate_exception_if(!mode_64bit() || !mode_ring0(), X86_EXC_UD);
+            vcpu_must_have(lkgs);
+            fail_if(!ops->read_segment || !ops->read_msr ||
+                    !ops->write_segment || !ops->write_msr);
+            if ( (rc = ops->read_msr(MSR_SHADOW_GS_BASE, &msr_val,
+                                     ctxt)) != X86EMUL_OKAY ||
+                 (rc = ops->read_segment(x86_seg_gs, &sreg,
+                                         ctxt)) != X86EMUL_OKAY )
+                goto done;
+            dst.orig_val = sreg.base; /* Preserve full GS Base. */
+            if ( (rc = protmode_load_seg(x86_seg_gs, src.val, false, &sreg,
+                                         ctxt, ops)) != X86EMUL_OKAY ||
+                 /* Write (32-bit) base into SHADOW_GS. */
+                 (rc = ops->write_msr(MSR_SHADOW_GS_BASE, sreg.base,
+                                      ctxt)) != X86EMUL_OKAY )
+                goto done;
+            sreg.base = dst.orig_val; /* Reinstate full GS Base. */
+            if ( (rc = ops->write_segment(x86_seg_gs, &sreg,
+                                          ctxt)) != X86EMUL_OKAY )
+            {
+                /* Best effort unwind (i.e. no real error checking). */
+                if ( ops->write_msr(MSR_SHADOW_GS_BASE, msr_val,
+                                    ctxt) == X86EMUL_EXCEPTION )
+                    x86_emul_reset_event(ctxt);
+                goto done;
+            }
             break;
         }
         break;
--- a/xen/tools/gen-cpuid.py
+++ b/xen/tools/gen-cpuid.py
@@ -282,7 +282,8 @@ def crunch_numbers(state):
         # superpages, PCID and PKU are only available in 4 level paging.
         # NO_LMSL indicates the absense of Long Mode Segment Limits, which
         # have been dropped in hardware.
-        LM: [CX16, PCID, LAHF_LM, PAGE1GB, PKU, NO_LMSL, AMX_TILE, CMPCCXADD],
+        LM: [CX16, PCID, LAHF_LM, PAGE1GB, PKU, NO_LMSL, AMX_TILE, CMPCCXADD,
+             LKGS],
 
         # AMD K6-2+ and K6-III processors shipped with 3DNow+, beyond the
         # standard 3DNow in the earlier K6 processors.
@@ -351,6 +352,9 @@ def crunch_numbers(state):
         # computational instructions.  All further AMX features are built on top
         # of AMX-TILE.
         AMX_TILE: [AMX_BF16, AMX_INT8, AMX_FP16, AMX_COMPLEX],
+
+        # FRED builds on the LKGS instruction.
+        LKGS: [FRED],
     }
 
     deep_features = tuple(sorted(deps.keys()))



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Message-ID: <158df666-9359-4fe8-976b-f194a1fb317b@suse.com>
Date: Mon, 24 Nov 2025 15:58:26 +0100
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Subject: Re: [PATCH v3 1/4] build: add make macro for making file from file.in
To: Jan Beulich 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <20251121132332.23514-1-jgross@suse.com>
 <20251121132332.23514-2-jgross@suse.com>
 
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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: Jan Beulich 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
Message-ID: <158df666-9359-4fe8-976b-f194a1fb317b@suse.com>
Subject: Re: [PATCH v3 1/4] build: add make macro for making file from file.in
References: <20251121132332.23514-1-jgross@suse.com>
 <20251121132332.23514-2-jgross@suse.com>
 
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 <0ece9df6-8a04-4ffa-bcf4-d7a3fd4bbef4@suse.com>
 
 
 
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These are "compound" instructions to issue a series of RDMSR / WRMSR
respectively. In the emulator we can therefore implement them by using
the existing msr_{read,write}() hooks. The memory accesses utilize that
the HVM ->read() / ->write() hooks are already linear-address
(x86_seg_none) aware (by way of hvmemul_virtual_to_linear() handling
this case).

Preemption is being checked for in WRMSRLIST handling only, as only MSR
writes are expected to possibly take long.

Signed-off-by: Jan Beulich 
---
RFC: In vmx_vmexit_handler() handling is forwarded to the emulator
     blindly. Alternatively we could consult the exit qualification and
     process just a single MSR at a time (without involving the
     emulator), exiting back to the guest after every iteration. (I
     don't think a mix of both models makes a lot of sense.)

The precise behavior of MSR_BARRIER is still not spelled out in ISE 050,
so the (minimal) implementation continues to be a guess for now.

Wouldn't calculate_hvm_max_policy() for MPX better behave the same way
as done here, at least from an abstract perspective (assuming that AMD
won't add such functionality now that Intel have deprecated it)?
---
v8: Re-base.
v6: Use MSR constants in test harness. Re-base.
v5: Add missing vmx_init_vmcs_config() and construct_vmcs() adjustments.
    Avoid unnecessary uses of r(). Re-base.
v3: Add dependency on LM. Limit exposure to HVM. Utilize new info from
    ISE 050. Re-base.
v2: Use X86_EXC_*. Add preemption checking to WRMSRLIST handling. Remove
    the feature from "max" when the VMX counterpart isn't available.

--- a/tools/tests/x86_emulator/predicates.c
+++ b/tools/tests/x86_emulator/predicates.c
@@ -342,6 +342,8 @@ static const struct {
     { { 0x01, 0xc4 }, { 2, 2 }, F, N }, /* vmxoff */
     { { 0x01, 0xc5 }, { 2, 2 }, F, N }, /* pconfig */
     { { 0x01, 0xc6 }, { 2, 2 }, F, N }, /* wrmsrns */
+    { { 0x01, 0xc6 }, { 0, 2 }, F, W, pfx_f2 }, /* rdmsrlist */
+    { { 0x01, 0xc6 }, { 0, 2 }, F, R, pfx_f3 }, /* wrmsrlist */
     { { 0x01, 0xc8 }, { 2, 2 }, F, N }, /* monitor */
     { { 0x01, 0xc9 }, { 2, 2 }, F, N }, /* mwait */
     { { 0x01, 0xca }, { 2, 2 }, F, N }, /* clac */
--- a/tools/tests/x86_emulator/test_x86_emulator.c
+++ b/tools/tests/x86_emulator/test_x86_emulator.c
@@ -625,7 +625,7 @@ static int write(
     if ( verbose )
         printf("** %s(%u, %p,, %u,)\n", __func__, seg, (void *)offset, bytes);
 
-    if ( !is_x86_user_segment(seg) )
+    if ( !is_x86_user_segment(seg) && seg != x86_seg_none )
         return X86EMUL_UNHANDLEABLE;
     memcpy((void *)offset, p_data, bytes);
     return X86EMUL_OKAY;
@@ -717,6 +717,10 @@ static int read_msr(
 {
     switch ( reg )
     {
+    case MSR_BARRIER:
+        *val = 0;
+        return X86EMUL_OKAY;
+
     case MSR_EFER:
         *val = ctxt->addr_size > 32 ? EFER_LME | EFER_LMA : 0;
         return X86EMUL_OKAY;
@@ -1434,9 +1438,53 @@ int main(int argc, char **argv)
          (gs_base != 0x0000111122224444UL) ||
          gs_base_shadow )
         goto fail;
+    printf("okay\n");
 
     cpu_policy.extd.nscb = i;
     emulops.write_segment = NULL;
+
+    printf("%-40s", "Testing rdmsrlist...");
+    instr[0] = 0xf2; instr[1] = 0x0f; instr[2] = 0x01; instr[3] = 0xc6;
+    regs.rip = (unsigned long)&instr[0];
+    regs.rsi = (unsigned long)(res + 0x80);
+    regs.rdi = (unsigned long)(res + 0x80 + 0x40 * 2);
+    regs.rcx = 0x0002000100008000UL;
+    gs_base_shadow = 0x0000222244446666UL;
+    memset(res + 0x80, ~0, 0x40 * 8 * 2);
+    res[0x80 + 0x0f * 2] = MSR_GS_BASE;
+    res[0x80 + 0x0f * 2 + 1] = 0;
+    res[0x80 + 0x20 * 2] = MSR_SHADOW_GS_BASE;
+    res[0x80 + 0x20 * 2 + 1] = 0;
+    res[0x80 + 0x31 * 2] = MSR_BARRIER;
+    res[0x80 + 0x31 * 2 + 1] = 0;
+    rc = x86_emulate(&ctxt, &emulops);
+    if ( (rc != X86EMUL_OKAY) ||
+         (regs.rip != (unsigned long)&instr[4]) ||
+         regs.rcx ||
+         (res[0x80 + (0x40 + 0x0f) * 2] != (unsigned int)gs_base) ||
+         (res[0x80 + (0x40 + 0x0f) * 2 + 1] != (gs_base >> (8 * sizeof(int)))) ||
+         (res[0x80 + (0x40 + 0x20) * 2] != (unsigned int)gs_base_shadow) ||
+         (res[0x80 + (0x40 + 0x20) * 2 + 1] != (gs_base_shadow >> (8 * sizeof(int)))) ||
+         res[0x80 + (0x40 + 0x31) * 2] || res[0x80 + (0x40 + 0x31) * 2 + 1] )
+        goto fail;
+    printf("okay\n");
+
+    printf("%-40s", "Testing wrmsrlist...");
+    instr[0] = 0xf3; instr[1] = 0x0f; instr[2] = 0x01; instr[3] = 0xc6;
+    regs.eip = (unsigned long)&instr[0];
+    regs.rsi -= 0x11 * 8;
+    regs.rdi -= 0x11 * 8;
+    regs.rcx = 0x0002000100000000UL;
+    res[0x80 + 0x0f * 2] = MSR_SHADOW_GS_BASE;
+    res[0x80 + 0x20 * 2] = MSR_GS_BASE;
+    rc = x86_emulate(&ctxt, &emulops);
+    if ( (rc != X86EMUL_OKAY) ||
+         (regs.rip != (unsigned long)&instr[4]) ||
+         regs.rcx ||
+         (gs_base != 0x0000222244446666UL) ||
+         (gs_base_shadow != 0x0000111122224444UL) )
+        goto fail;
+
     emulops.write_msr     = NULL;
 #endif
     printf("okay\n");
--- a/tools/tests/x86_emulator/x86-emulate.c
+++ b/tools/tests/x86_emulator/x86-emulate.c
@@ -87,6 +87,7 @@ bool emul_test_init(void)
     cpu_policy.feat.rdpid = true;
     cpu_policy.feat.lkgs = true;
     cpu_policy.feat.wrmsrns = true;
+    cpu_policy.feat.msrlist = true;
     cpu_policy.extd.clzero = true;
 
     if ( cpu_has_xsave )
--- a/xen/arch/x86/cpu-policy.c
+++ b/xen/arch/x86/cpu-policy.c
@@ -813,6 +813,9 @@ static void __init calculate_hvm_max_pol
             __clear_bit(X86_FEATURE_XSAVES, fs);
     }
 
+    if ( !cpu_has_vmx_msrlist )
+        __clear_bit(X86_FEATURE_MSRLIST, fs);
+
     /*
      * Xen doesn't use PKS, so the guest support for it has opted to not use
      * the VMCS load/save controls for efficiency reasons.  This depends on
--- a/xen/arch/x86/hvm/vmx/vmcs.c
+++ b/xen/arch/x86/hvm/vmx/vmcs.c
@@ -361,8 +361,9 @@ static int vmx_init_vmcs_config(bool bsp
 
     if ( caps.cpu_based_exec_control & CPU_BASED_ACTIVATE_TERTIARY_CONTROLS )
     {
-        uint64_t opt = (TERTIARY_EXEC_VIRT_SPEC_CTRL |
-                        TERTIARY_EXEC_EPT_PAGING_WRITE);
+        uint64_t opt = TERTIARY_EXEC_EPT_PAGING_WRITE |
+                       TERTIARY_EXEC_ENABLE_MSRLIST |
+                       TERTIARY_EXEC_VIRT_SPEC_CTRL;
 
         caps.tertiary_exec_control = adjust_vmx_controls2(
             "Tertiary Exec Control", 0, opt,
@@ -1119,7 +1120,8 @@ static int construct_vmcs(struct vcpu *v
         v->arch.hvm.vmx.exec_control |= CPU_BASED_RDTSC_EXITING;
 
     v->arch.hvm.vmx.secondary_exec_control = vmx_caps.secondary_exec_control;
-    v->arch.hvm.vmx.tertiary_exec_control  = vmx_caps.tertiary_exec_control;
+    v->arch.hvm.vmx.tertiary_exec_control  = vmx_caps.tertiary_exec_control &
+                                             ~TERTIARY_EXEC_ENABLE_MSRLIST;
 
     /*
      * Disable features which we don't want active by default:
--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -891,6 +891,20 @@ static void cf_check vmx_cpuid_policy_ch
     else
         vmx_set_msr_intercept(v, MSR_PKRS, VMX_MSR_RW);
 
+    if ( cp->feat.msrlist )
+    {
+        vmx_clear_msr_intercept(v, MSR_BARRIER, VMX_MSR_RW);
+        v->arch.hvm.vmx.tertiary_exec_control |= TERTIARY_EXEC_ENABLE_MSRLIST;
+        vmx_update_tertiary_exec_control(v);
+    }
+    else if ( v->arch.hvm.vmx.tertiary_exec_control &
+              TERTIARY_EXEC_ENABLE_MSRLIST )
+    {
+        vmx_set_msr_intercept(v, MSR_BARRIER, VMX_MSR_RW);
+        v->arch.hvm.vmx.tertiary_exec_control &= ~TERTIARY_EXEC_ENABLE_MSRLIST;
+        vmx_update_tertiary_exec_control(v);
+    }
+
  out:
     vmx_vmcs_exit(v);
 
@@ -3897,6 +3911,22 @@ gp_fault:
     return X86EMUL_EXCEPTION;
 }
 
+static bool cf_check is_msrlist(
+    const struct x86_emulate_state *state, const struct x86_emulate_ctxt *ctxt)
+{
+
+    if ( ctxt->opcode == X86EMUL_OPC(0x0f, 0x01) )
+    {
+        unsigned int rm, reg;
+        int mode = x86_insn_modrm(state, &rm, ®);
+
+        /* This also includes WRMSRNS; should be okay. */
+        return mode == 3 && rm == 6 && !reg;
+    }
+
+    return false;
+}
+
 static void vmx_do_extint(struct cpu_user_regs *regs)
 {
     unsigned long vector;
@@ -4704,6 +4734,17 @@ void asmlinkage vmx_vmexit_handler(struc
         }
         break;
 
+    case EXIT_REASON_RDMSRLIST:
+    case EXIT_REASON_WRMSRLIST:
+        if ( vmx_guest_x86_mode(v) != 8 || !currd->arch.cpuid->feat.msrlist )
+        {
+            ASSERT_UNREACHABLE();
+            hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC);
+        }
+        else if ( !hvm_emulate_one_insn(is_msrlist, "MSR list") )
+            hvm_inject_hw_exception(X86_EXC_GP, 0);
+        break;
+
     case EXIT_REASON_VMXOFF:
     case EXIT_REASON_VMXON:
     case EXIT_REASON_VMCLEAR:
--- a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h
+++ b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h
@@ -275,8 +275,13 @@ void vmx_vmcs_reload(struct vcpu *v);
 #define TERTIARY_EXEC_EPT_PAGING_WRITE          BIT(2, UL)
 #define TERTIARY_EXEC_GUEST_PAGING_VERIFY       BIT(3, UL)
 #define TERTIARY_EXEC_IPI_VIRT                  BIT(4, UL)
+#define TERTIARY_EXEC_ENABLE_MSRLIST            BIT(6, UL)
 #define TERTIARY_EXEC_VIRT_SPEC_CTRL            BIT(7, UL)
 
+#define cpu_has_vmx_msrlist \
+    (IS_ENABLED(CONFIG_INTEL_VMX) && \
+     (vmx_caps.tertiary_exec_control & TERTIARY_EXEC_ENABLE_MSRLIST))
+
 #define cpu_has_vmx_virt_spec_ctrl \
      (vmx_caps.tertiary_exec_control & TERTIARY_EXEC_VIRT_SPEC_CTRL)
 
--- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h
+++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h
@@ -201,6 +201,8 @@ static inline void pi_clear_sn(struct pi
 #define EXIT_REASON_XRSTORS             64
 #define EXIT_REASON_BUS_LOCK            74
 #define EXIT_REASON_NOTIFY              75
+#define EXIT_REASON_RDMSRLIST           78
+#define EXIT_REASON_WRMSRLIST           79
 /* Remember to also update VMX_PERF_EXIT_REASON_SIZE! */
 
 /*
--- a/xen/arch/x86/include/asm/msr-index.h
+++ b/xen/arch/x86/include/asm/msr-index.h
@@ -24,6 +24,8 @@
 #define  APIC_BASE_ENABLE                   (_AC(1, ULL) << 11)
 #define  APIC_BASE_ADDR_MASK                _AC(0x000ffffffffff000, ULL)
 
+#define MSR_BARRIER                         0x0000002f
+
 #define MSR_TEST_CTRL                       0x00000033
 #define  TEST_CTRL_SPLITLOCK_DETECT         (_AC(1, ULL) << 29)
 #define  TEST_CTRL_SPLITLOCK_DISABLE        (_AC(1, ULL) << 31)
--- a/xen/arch/x86/include/asm/perfc_defn.h
+++ b/xen/arch/x86/include/asm/perfc_defn.h
@@ -6,7 +6,7 @@ PERFCOUNTER_ARRAY(exceptions,
 
 #ifdef CONFIG_HVM
 
-#define VMX_PERF_EXIT_REASON_SIZE 76
+#define VMX_PERF_EXIT_REASON_SIZE 80
 #define VMEXIT_NPF_PERFC 143
 #define SVM_PERF_EXIT_REASON_SIZE (VMEXIT_NPF_PERFC + 1)
 PERFCOUNTER_ARRAY(vmexits,              "vmexits",
--- a/xen/arch/x86/msr.c
+++ b/xen/arch/x86/msr.c
@@ -148,6 +148,12 @@ int guest_rdmsr(struct vcpu *v, uint32_t
     case MSR_AMD_PPIN:
         goto gp_fault;
 
+    case MSR_BARRIER:
+        if ( !cp->feat.msrlist )
+            goto gp_fault;
+        *val = 0;
+        break;
+
     case MSR_IA32_FEATURE_CONTROL:
         /*
          * Architecturally, availability of this MSR is enumerated by the
@@ -429,6 +435,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t
         uint64_t rsvd;
 
         /* Read-only */
+    case MSR_BARRIER:
     case MSR_IA32_PLATFORM_ID:
     case MSR_CORE_CAPABILITIES:
     case MSR_INTEL_CORE_THREAD_COUNT:
--- a/xen/arch/x86/x86_emulate/0f01.c
+++ b/xen/arch/x86/x86_emulate/0f01.c
@@ -11,6 +11,7 @@
 #include "private.h"
 
 #ifdef __XEN__
+#include 
 #include 
 #endif
 
@@ -28,6 +29,7 @@ int x86emul_0f01(struct x86_emulate_stat
     switch ( s->modrm )
     {
         unsigned long base, limit, cr0, cr0w, cr4;
+        unsigned int n;
         struct segment_register sreg;
         uint64_t msr_val;
 
@@ -42,6 +44,64 @@ int x86emul_0f01(struct x86_emulate_stat
                                 ((uint64_t)regs->r(dx) << 32) | regs->eax,
                                 ctxt);
             goto done;
+
+        case vex_f3: /* wrmsrlist */
+            vcpu_must_have(msrlist);
+            generate_exception_if(!mode_64bit(), X86_EXC_UD);
+            generate_exception_if(!mode_ring0() || (regs->esi & 7) ||
+                                  (regs->edi & 7),
+                                  X86_EXC_GP, 0);
+            fail_if(!ops->write_msr);
+            while ( regs->r(cx) )
+            {
+                n = __builtin_ffsl(regs->r(cx)) - 1;
+                if ( (rc = ops->read(x86_seg_none, regs->r(si) + n * 8,
+                                     &msr_val, 8, ctxt)) != X86EMUL_OKAY )
+                    break;
+                generate_exception_if(msr_val != (uint32_t)msr_val,
+                                      X86_EXC_GP, 0);
+                base = msr_val;
+                if ( (rc = ops->read(x86_seg_none, regs->r(di) + n * 8,
+                                     &msr_val, 8, ctxt)) != X86EMUL_OKAY ||
+                     (rc = ops->write_msr(base, msr_val, ctxt)) != X86EMUL_OKAY )
+                    break;
+                regs->r(cx) &= ~(1UL << n);
+
+#ifdef __XEN__
+                if ( regs->r(cx) && local_events_need_delivery() )
+                {
+                    rc = X86EMUL_RETRY;
+                    break;
+                }
+#endif
+            }
+            goto done;
+
+        case vex_f2: /* rdmsrlist */
+            vcpu_must_have(msrlist);
+            generate_exception_if(!mode_64bit(), X86_EXC_UD);
+            generate_exception_if(!mode_ring0() || (regs->esi & 7) ||
+                                  (regs->edi & 7),
+                                  X86_EXC_GP, 0);
+            fail_if(!ops->read_msr || !ops->write);
+            while ( regs->r(cx) )
+            {
+                n = __builtin_ffsl(regs->r(cx)) - 1;
+                if ( (rc = ops->read(x86_seg_none, regs->r(si) + n * 8,
+                                     &msr_val, 8, ctxt)) != X86EMUL_OKAY )
+                    break;
+                generate_exception_if(msr_val != (uint32_t)msr_val,
+                                      X86_EXC_GP, 0);
+                if ( (rc = ops->read_msr(msr_val, &msr_val,
+                                         ctxt)) != X86EMUL_OKAY ||
+                     (rc = ops->write(x86_seg_none, regs->r(di) + n * 8,
+                                      &msr_val, 8, ctxt)) != X86EMUL_OKAY )
+                    break;
+                regs->r(cx) &= ~(1UL << n);
+            }
+            if ( rc != X86EMUL_OKAY )
+                ctxt->regs->r(cx) = regs->r(cx);
+            goto done;
         }
         generate_exception(X86_EXC_UD);
 
--- a/xen/arch/x86/x86_emulate/private.h
+++ b/xen/arch/x86/x86_emulate/private.h
@@ -611,6 +611,7 @@ amd_like(const struct x86_emulate_ctxt *
 #define vcpu_has_lkgs()        (ctxt->cpuid->feat.lkgs)
 #define vcpu_has_wrmsrns()     (ctxt->cpuid->feat.wrmsrns)
 #define vcpu_has_avx_ifma()    (ctxt->cpuid->feat.avx_ifma)
+#define vcpu_has_msrlist()     (ctxt->cpuid->feat.msrlist)
 #define vcpu_has_avx_vnni_int8() (ctxt->cpuid->feat.avx_vnni_int8)
 #define vcpu_has_avx_ne_convert() (ctxt->cpuid->feat.avx_ne_convert)
 #define vcpu_has_avx_vnni_int16() (ctxt->cpuid->feat.avx_vnni_int16)
--- a/xen/arch/x86/x86_emulate/util.c
+++ b/xen/arch/x86/x86_emulate/util.c
@@ -100,6 +100,9 @@ bool cf_check x86_insn_is_mem_access(con
         break;
 
     case X86EMUL_OPC(0x0f, 0x01):
+        /* {RD,WR}MSRLIST */
+        if ( mode_64bit() && s->modrm == 0xc6 )
+            return s->vex.pfx >= vex_f3;
         /* Cover CLZERO. */
         return (s->modrm_rm & 7) == 4 && (s->modrm_reg & 7) == 7;
     }
@@ -160,7 +163,11 @@ bool cf_check x86_insn_is_mem_write(cons
         case 0xff: /* Grp5 */
             break;
 
-        case X86EMUL_OPC(0x0f, 0x01): /* CLZERO is the odd one. */
+        case X86EMUL_OPC(0x0f, 0x01):
+            /* RDMSRLIST */
+            if ( mode_64bit() && s->modrm == 0xc6 )
+                return s->vex.pfx == vex_f2;
+            /* CLZERO is another odd one. */
             return (s->modrm_rm & 7) == 4 && (s->modrm_reg & 7) == 7;
 
         default:
--- a/xen/tools/gen-cpuid.py
+++ b/xen/tools/gen-cpuid.py
@@ -283,7 +283,7 @@ def crunch_numbers(state):
         # NO_LMSL indicates the absense of Long Mode Segment Limits, which
         # have been dropped in hardware.
         LM: [CX16, PCID, LAHF_LM, PAGE1GB, PKU, NO_LMSL, AMX_TILE, CMPCCXADD,
-             LKGS],
+             LKGS, MSRLIST],
 
         # AMD K6-2+ and K6-III processors shipped with 3DNow+, beyond the
         # standard 3DNow in the earlier K6 processors.



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Subject: [PATCH v9 03/10] x86emul: support USER_MSR instructions
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
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While UWRMSR probably isn't of much use as long as we don't support
UINTR, URDMSR may well be useful to guests even without that (depending
on what OSes are willing to permit access to).

Since the two VEX encodings introduce a lonely opcode point in map 7,
for now don't bother introducing a full 256-entry table.

Signed-off-by: Jan Beulich 
---
The retaining of (possible) #PF from the bitmap access is "speculative"
(the spec doesn't mention #PF as a possible exception; conceivably this
might also need converting to #GP).

I'm a little wary of the "MSRs Writeable by UWRMSR" table that the spec
has, and that our code thus also enforces: As new MSRs are added to that
table, we'll need piecemeal updates to that switch() statement.

The forced setting of cpu_policy.feat.utmr could likely be done
globally, i.e. early in main(). Limiting its scope is merely "just in
case". Thoughts?
---
v8: Switch to using fallthrough pseudo-keyword. Re-base.
v7.1: Add MSR-specific feature checks for UWRMSR (incl the UTMR feature
      bit and its overriding in the test harness).
v7: Add missing vcpu_must_have() and override in emul_test_init(). Use
    MSR constants even more.
v6: Add MSR_UINTR_TIMER to header. Use MSR constants in test harness.
    Re-base.
v5: Correct ModR/M.reg check for VEX-encoded forms. Cosmetic test
    harness adjustment. Re-base.
v4: MSR index input regs are 64-bit (albeit only the APX spec has it
    this way for now).
v3: New.

--- a/tools/tests/x86_emulator/predicates.c
+++ b/tools/tests/x86_emulator/predicates.c
@@ -864,7 +864,9 @@ static const struct {
     { { 0xf6 }, { 2, 2 }, T, R, pfx_66 }, /* adcx */
     { { 0xf6 }, { 2, 2 }, T, R, pfx_f3 }, /* adox */
     { { 0xf8 }, { 2, 2 }, F, W, pfx_66 }, /* movdir64b */
+    { { 0xf8, 0xc0 }, { 0, 2 }, F, N, pfx_f3 }, /* uwrmsr */
     { { 0xf8 }, { 2, 2 }, F, W, pfx_f3 }, /* enqcmds */
+    { { 0xf8, 0xc0 }, { 0, 2 }, F, N, pfx_f2 }, /* urdmsr */
     { { 0xf8 }, { 2, 2 }, F, W, pfx_f2 }, /* enqcmd */
     { { 0xf9 }, { 2, 2 }, F, W }, /* movdiri */
 };
@@ -1516,6 +1518,9 @@ static const struct vex {
     { { 0xde }, 3, T, R, pfx_66, W0, L0 }, /* vsm3rnds2 */
     { { 0xdf }, 3, T, R, pfx_66, WIG, Ln }, /* vaeskeygenassist */
     { { 0xf0 }, 3, T, R, pfx_f2, Wn, L0 }, /* rorx */
+}, vex_map7[] = {
+    { { 0xf8, 0xc0 }, 6, F, N, pfx_f3, W0, L0 }, /* uwrmsr */
+    { { 0xf8, 0xc0 }, 6, F, N, pfx_f2, W0, L0 }, /* urdmsr */
 };
 
 static const struct {
@@ -1525,6 +1530,10 @@ static const struct {
     { vex_0f,   ARRAY_SIZE(vex_0f) },
     { vex_0f38, ARRAY_SIZE(vex_0f38) },
     { vex_0f3a, ARRAY_SIZE(vex_0f3a) },
+    { NULL,     0 }, /* map 4 */
+    { NULL,     0 }, /* map 5 */
+    { NULL,     0 }, /* map 6 */
+    { vex_map7, ARRAY_SIZE(vex_map7) },
 };
 
 static const struct xop {
@@ -2420,7 +2429,8 @@ void predicates_test(void *instr, struct
 
                 if ( vex[x].tbl[t].w == WIG || (vex[x].tbl[t].w & W0) )
                 {
-                    memcpy(ptr, vex[x].tbl[t].opc, vex[x].tbl[t].len);
+                    memcpy(ptr, vex[x].tbl[t].opc,
+                           MIN(vex[x].tbl[t].len, ARRAY_SIZE(vex->tbl->opc)));
 
                     if ( vex[x].tbl[t].l == LIG || (vex[x].tbl[t].l & L0) )
                         do_test(instr, vex[x].tbl[t].len + ((void *)ptr - instr),
@@ -2430,7 +2440,8 @@ void predicates_test(void *instr, struct
                     if ( vex[x].tbl[t].l == LIG || (vex[x].tbl[t].l & L1) )
                     {
                         ptr[-1] |= 4;
-                        memcpy(ptr, vex[x].tbl[t].opc, vex[x].tbl[t].len);
+                        memcpy(ptr, vex[x].tbl[t].opc,
+                               MIN(vex[x].tbl[t].len, ARRAY_SIZE(vex->tbl->opc)));
 
                         do_test(instr, vex[x].tbl[t].len + ((void *)ptr - instr),
                                 vex[x].tbl[t].modrm ? (void *)ptr - instr + 1 : 0,
@@ -2441,7 +2452,8 @@ void predicates_test(void *instr, struct
                 if ( vex[x].tbl[t].w == WIG || (vex[x].tbl[t].w & W1) )
                 {
                     ptr[-1] = 0xf8 | vex[x].tbl[t].pfx;
-                    memcpy(ptr, vex[x].tbl[t].opc, vex[x].tbl[t].len);
+                    memcpy(ptr, vex[x].tbl[t].opc,
+                           MIN(vex[x].tbl[t].len, ARRAY_SIZE(vex->tbl->opc)));
 
                     if ( vex[x].tbl[t].l == LIG || (vex[x].tbl[t].l & L0) )
                         do_test(instr, vex[x].tbl[t].len + ((void *)ptr - instr),
@@ -2451,7 +2463,8 @@ void predicates_test(void *instr, struct
                     if ( vex[x].tbl[t].l == LIG || (vex[x].tbl[t].l & L1) )
                     {
                         ptr[-1] |= 4;
-                        memcpy(ptr, vex[x].tbl[t].opc, vex[x].tbl[t].len);
+                        memcpy(ptr, vex[x].tbl[t].opc,
+                               MIN(vex[x].tbl[t].len, ARRAY_SIZE(vex->tbl->opc)));
 
                         do_test(instr, vex[x].tbl[t].len + ((void *)ptr - instr),
                                 vex[x].tbl[t].modrm ? (void *)ptr - instr + 1 : 0,
--- a/tools/tests/x86_emulator/test_x86_emulator.c
+++ b/tools/tests/x86_emulator/test_x86_emulator.c
@@ -674,6 +674,7 @@ static int blk(
 
 #ifdef __x86_64__
 static unsigned long gs_base, gs_base_shadow;
+static unsigned long uintr_timer;
 #endif
 
 static int read_segment(
@@ -708,6 +709,15 @@ static int write_segment(
 
     return X86EMUL_OKAY;
 }
+
+static const uint8_t __attribute__((aligned(0x1000))) umsr_bitmap[0x1000] = {
+#define RD(msr) [(msr) >> 3] = 1 << ((msr) & 7)
+#define WR(msr) [0x800 + ((msr) >> 3)] = 1 << ((msr) & 7)
+    RD(MSR_IA32_APERF),
+    WR(MSR_UINTR_TIMER),
+#undef WR
+#undef RD
+};
 #endif
 
 static int read_msr(
@@ -717,10 +727,22 @@ static int read_msr(
 {
     switch ( reg )
     {
+#ifdef __x86_64__
+    case MSR_USER_MSR_CTL:
+        *val = (unsigned long)umsr_bitmap | 1;
+        return X86EMUL_OKAY;
+#endif
+
     case MSR_BARRIER:
         *val = 0;
         return X86EMUL_OKAY;
 
+    case MSR_IA32_APERF:
+#define APERF_LO_VALUE 0xAEAEAEAE
+#define APERF_HI_VALUE 0xEAEAEAEA
+        *val = ((uint64_t)APERF_HI_VALUE << 32) | APERF_LO_VALUE;
+        return X86EMUL_OKAY;
+
     case MSR_EFER:
         *val = ctxt->addr_size > 32 ? EFER_LME | EFER_LMA : 0;
         return X86EMUL_OKAY;
@@ -756,6 +778,12 @@ static int write_msr(
 {
     switch ( reg )
     {
+    case MSR_UINTR_TIMER:
+        if ( ctxt->addr_size < 64 )
+            break;
+        uintr_timer = val;
+        return X86EMUL_OKAY;
+
     case MSR_GS_BASE:
         if ( ctxt->addr_size < 64 || !is_canonical_address(val) )
             break;
@@ -1484,6 +1512,68 @@ int main(int argc, char **argv)
          (gs_base != 0x0000222244446666UL) ||
          (gs_base_shadow != 0x0000111122224444UL) )
         goto fail;
+    printf("okay\n");
+
+    printf("%-40s", "Testing urdmsr %rdx,%rcx...");
+    instr[0] = 0xf2; instr[1] = 0x0f; instr[2] = 0x38; instr[3] = 0xf8; instr[4] = 0xd1;
+    regs.rip = (unsigned long)&instr[0];
+    regs.rdx = MSR_IA32_APERF;
+    rc = x86_emulate(&ctxt, &emulops);
+    if ( (rc != X86EMUL_OKAY) ||
+         (regs.rip != (unsigned long)&instr[5]) ||
+         (regs.rcx != (((uint64_t)APERF_HI_VALUE << 32) | APERF_LO_VALUE)) )
+        goto fail;
+    printf("okay\n");
+
+    printf("%-40s", "Testing urdmsr $MSR_IA32_APERF,%rdx...");
+    instr[0] = 0xc4; instr[1] = 0xe7; instr[2] = 0x7b; instr[3] = 0xf8; instr[4] = 0xc2;
+    *(uint32_t *)&instr[5] = MSR_IA32_APERF;
+    regs.rip = (unsigned long)&instr[0];
+    rc = x86_emulate(&ctxt, &emulops);
+    if ( (rc != X86EMUL_OKAY) ||
+         (regs.rip != (unsigned long)&instr[9]) ||
+         (regs.rdx != (((uint64_t)APERF_HI_VALUE << 32) | APERF_LO_VALUE)) )
+        goto fail;
+    printf("okay\n");
+
+    /* Our write_msr() knows of MSR_UINTR_TIMER. */
+    i = cpu_policy.feat.utmr;
+    cpu_policy.feat.utmr = true;
+
+    printf("%-40s", "Testing uwrmsr %rdi,%rsi...");
+    instr[0] = 0xf3; instr[1] = 0x0f; instr[2] = 0x38; instr[3] = 0xf8; instr[4] = 0xf7;
+    regs.rip = (unsigned long)&instr[0];
+    regs.rsi = MSR_UINTR_TIMER;
+    regs.rdi = 0x0011223344556677UL;
+    rc = x86_emulate(&ctxt, &emulops);
+    if ( (rc != X86EMUL_OKAY) ||
+         (regs.rip != (unsigned long)&instr[5]) ||
+         (uintr_timer != 0x0011223344556677UL) )
+        goto fail;
+    printf("okay\n");
+
+    printf("%-40s", "Testing uwrmsr %rsi,$MSR_UINTR_TIMER...");
+    instr[0] = 0xc4; instr[1] = 0xe7; instr[2] = 0x7a; instr[3] = 0xf8; instr[4] = 0xc6;
+    *(uint32_t *)&instr[5] = MSR_UINTR_TIMER;
+    regs.rip = (unsigned long)&instr[0];
+    regs.rsi = 0x8877665544332211UL;
+    rc = x86_emulate(&ctxt, &emulops);
+    if ( (rc != X86EMUL_OKAY) ||
+         (regs.rip != (unsigned long)&instr[9]) ||
+         (uintr_timer != 0x8877665544332211UL) )
+        goto fail;
+    printf("okay\n");
+
+    cpu_policy.feat.utmr = i;
+
+    printf("%-40s", "Testing uwrmsr %rsi,$MSR_UARCH_MISC_CTRL...");
+    *(uint32_t *)&instr[5] = MSR_UARCH_MISC_CTRL;
+    regs.rip = (unsigned long)&instr[0];
+    regs.rsi = 0;
+    rc = x86_emulate(&ctxt, &emulops);
+    if ( (rc != X86EMUL_EXCEPTION) ||
+         (regs.rip != (unsigned long)&instr[0]) )
+        goto fail;
 
     emulops.write_msr     = NULL;
 #endif
--- a/tools/tests/x86_emulator/x86-emulate.c
+++ b/tools/tests/x86_emulator/x86-emulate.c
@@ -88,6 +88,7 @@ bool emul_test_init(void)
     cpu_policy.feat.lkgs = true;
     cpu_policy.feat.wrmsrns = true;
     cpu_policy.feat.msrlist = true;
+    cpu_policy.feat.user_msr = true;
     cpu_policy.extd.clzero = true;
 
     if ( cpu_has_xsave )
--- a/xen/arch/x86/include/asm/msr-index.h
+++ b/xen/arch/x86/include/asm/msr-index.h
@@ -24,6 +24,10 @@
 #define  APIC_BASE_ENABLE                   (_AC(1, ULL) << 11)
 #define  APIC_BASE_ADDR_MASK                _AC(0x000ffffffffff000, ULL)
 
+#define MSR_USER_MSR_CTL                    0x0000001c
+#define  USER_MSR_ENABLE                    (_AC(1, ULL) <<  0)
+#define  USER_MSR_ADDR_MASK                 0xfffffffffffff000ULL
+
 #define MSR_BARRIER                         0x0000002f
 
 #define MSR_TEST_CTRL                       0x00000033
@@ -206,6 +210,8 @@
 #define  MCU_CONTROL_DIS_MCU_LOAD           (_AC(1, ULL) <<  1)
 #define  MCU_CONTROL_EN_SMM_BYPASS          (_AC(1, ULL) <<  2)
 
+#define MSR_UINTR_TIMER                     0x00001b00
+
 #define MSR_UARCH_MISC_CTRL                 0x00001b01
 #define  UARCH_CTRL_DOITM                   (_AC(1, ULL) <<  0)
 
--- a/xen/arch/x86/x86_emulate/decode.c
+++ b/xen/arch/x86/x86_emulate/decode.c
@@ -903,7 +903,7 @@ decode_0f38(struct x86_emulate_state *s,
     {
     case 0x00 ... 0xef:
     case 0xf2 ... 0xf5:
-    case 0xf7 ... 0xf8:
+    case 0xf7:
     case 0xfa ... 0xff:
         s->op_bytes = 0;
         /* fall through */
@@ -948,6 +948,18 @@ decode_0f38(struct x86_emulate_state *s,
     case X86EMUL_OPC_VEX_F2(0, 0xf7): /* shrx */
         break;
 
+    case 0xf8:
+        if ( s->modrm_mod == 3 ) /* u{rd,wr}msr */
+        {
+            s->desc = DstMem | SrcReg | Mov;
+            s->op_bytes = 8;
+            s->simd_size = simd_none;
+        }
+        else /* movdir64b / enqcmd{,s} */
+            s->op_bytes = 0;
+        ctxt->opcode |= MASK_INSR(s->vex.pfx, X86EMUL_OPC_PFX_MASK);
+        break;
+
     default:
         s->op_bytes = 0;
         break;
@@ -1246,6 +1258,16 @@ int x86emul_decode(struct x86_emulate_st
                          */
                         d = twobyte_table[0x38].desc;
                         break;
+
+                    case vex_map7:
+                        opcode |= MASK_INSR(7, X86EMUL_OPC_EXT_MASK);
+                        /*
+                         * No table lookup here for now, as there's only a single
+                         * opcode point (0xf8) populated in map 7.
+                         */
+                        d = DstMem | SrcImm | ModRM | Mov;
+                        s->op_bytes = 8;
+                        break;
                     }
                 }
                 else if ( s->ext < ext_8f08 + ARRAY_SIZE(xop_table) )
@@ -1602,6 +1624,7 @@ int x86emul_decode(struct x86_emulate_st
             s->simd_size = ext8f09_table[b].simd_size;
             break;
 
+        case ext_map7:
         case ext_8f08:
         case ext_8f0a:
             /*
@@ -1816,6 +1839,7 @@ int x86emul_decode(struct x86_emulate_st
 
     case ext_map5:
     case ext_map6:
+    case ext_map7:
     case ext_8f09:
     case ext_8f0a:
         break;
--- a/xen/arch/x86/x86_emulate/private.h
+++ b/xen/arch/x86/x86_emulate/private.h
@@ -203,6 +203,7 @@ enum vex_opcx {
     vex_0f3a,
     evex_map5 = 5,
     evex_map6,
+    vex_map7,
 };
 
 enum vex_pfx {
@@ -259,6 +260,7 @@ struct x86_emulate_state {
         ext_0f3a = vex_0f3a,
         ext_map5 = evex_map5,
         ext_map6 = evex_map6,
+        ext_map7 = vex_map7,
         /*
          * For XOP use values such that the respective instruction field
          * can be used without adjustment.
@@ -615,6 +617,7 @@ amd_like(const struct x86_emulate_ctxt *
 #define vcpu_has_avx_vnni_int8() (ctxt->cpuid->feat.avx_vnni_int8)
 #define vcpu_has_avx_ne_convert() (ctxt->cpuid->feat.avx_ne_convert)
 #define vcpu_has_avx_vnni_int16() (ctxt->cpuid->feat.avx_vnni_int16)
+#define vcpu_has_user_msr()    (ctxt->cpuid->feat.user_msr)
 
 #define vcpu_must_have(feat) \
     generate_exception_if(!vcpu_has_##feat(), X86_EXC_UD)
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -7024,10 +7024,73 @@ x86_emulate(
         state->simd_size = simd_none;
         break;
 
-    case X86EMUL_OPC_F2(0x0f38, 0xf8): /* enqcmd r,m512 */
-    case X86EMUL_OPC_F3(0x0f38, 0xf8): /* enqcmds r,m512 */
+    case X86EMUL_OPC_F3(0x0f38, 0xf8): /* enqcmds r,m512 / uwrmsr r64,r32 */
+    case X86EMUL_OPC_F2(0x0f38, 0xf8): /* enqcmd r,m512 / urdmsr r32,r64 */
+        if ( ea.type == OP_MEM )
+            goto enqcmd;
+        imm1 = src.val;
+        fallthrough;
+    case X86EMUL_OPC_VEX_F3(7, 0xf8): /* uwrmsr r64,imm32 */
+    case X86EMUL_OPC_VEX_F2(7, 0xf8): /* urdmsr imm32,r64 */
+        generate_exception_if(!mode_64bit() || ea.type != OP_REG, X86_EXC_UD);
+        generate_exception_if(vex.l || vex.w, X86_EXC_UD);
+        generate_exception_if(vex.opcx && ((modrm_reg & 7) || vex.reg != 0xf),
+                              X86_EXC_UD);
+        vcpu_must_have(user_msr);
+        fail_if(!ops->read_msr);
+        if ( ops->read_msr(MSR_USER_MSR_CTL, &msr_val, ctxt) != X86EMUL_OKAY )
+        {
+            x86_emul_reset_event(ctxt);
+            msr_val = 0;
+        }
+        generate_exception_if(!(msr_val & USER_MSR_ENABLE), X86_EXC_UD);
+        generate_exception_if(imm1 & ~0x3fff, X86_EXC_GP, 0);
+
+        /* Check the corresponding bitmap. */
+        ea.mem.off = msr_val & ~0xfff;
+        if ( vex.pfx != vex_f2 )
+            ea.mem.off += 0x800;
+        ea.mem.off += imm1 >> 3;
+        if ( (rc = ops->read(x86_seg_sys, ea.mem.off, &b, 1,
+                             ctxt)) != X86EMUL_OKAY )
+            goto done;
+        generate_exception_if(!(b & (1 << (imm1 & 7))), X86_EXC_GP, 0);
+
+        /* Carry out the actual MSR access. */
+        if ( vex.pfx == vex_f2 )
+        {
+            /* urdmsr */
+            if ( (rc = ops->read_msr(imm1, &msr_val, ctxt)) != X86EMUL_OKAY )
+                goto done;
+            dst.val = msr_val;
+            ASSERT(dst.type == OP_REG);
+            dst.bytes = 8;
+        }
+        else
+        {
+            /* uwrmsr */
+            switch ( imm1 )
+            {
+            case 0x1b00: /* UINTR_TIMER */
+                generate_exception_if(!cp->feat.utmr, X86_EXC_GP, 0);
+                break;
+
+            case 0x1b01: /* UARCH_MISC_CTL */
+                generate_exception_if(!cp->arch_caps.doitm, X86_EXC_GP, 0);
+                break;
+
+            default:
+                generate_exception(X86_EXC_GP, 0);
+            }
+            fail_if(!ops->write_msr);
+            if ( (rc = ops->write_msr(imm1, dst.val, ctxt)) != X86EMUL_OKAY )
+                goto done;
+            dst.type = OP_NONE;
+        }
+        break;
+
+    enqcmd:
         host_and_vcpu_must_have(enqcmd);
-        generate_exception_if(ea.type != OP_MEM, X86_EXC_UD);
         generate_exception_if(vex.pfx != vex_f2 && !mode_ring0(), X86_EXC_GP, 0);
         src.val = truncate_ea(*dst.reg);
         generate_exception_if(!is_aligned(x86_seg_es, src.val, 64, ctxt, ops),
--- a/xen/include/public/arch-x86/cpufeatureset.h
+++ b/xen/include/public/arch-x86/cpufeatureset.h
@@ -358,7 +358,9 @@ XEN_CPUFEATURE(AVX_VNNI_INT8,      15*32
 XEN_CPUFEATURE(AVX_NE_CONVERT,     15*32+ 5) /*A  AVX-NE-CONVERT Instructions */
 XEN_CPUFEATURE(AMX_COMPLEX,        15*32+ 8) /*   AMX Complex Instructions */
 XEN_CPUFEATURE(AVX_VNNI_INT16,     15*32+10) /*A  AVX-VNNI-INT16 Instructions */
+XEN_CPUFEATURE(UTMR,               15*32+13) /*   User Timer */
 XEN_CPUFEATURE(PREFETCHI,          15*32+14) /*A  PREFETCHIT{0,1} Instructions */
+XEN_CPUFEATURE(USER_MSR,           15*32+15) /*   U{RD,WR}MSR Instructions */
 XEN_CPUFEATURE(UIRET_UIF,          15*32+17) /*   UIRET updates UIF */
 XEN_CPUFEATURE(CET_SSS,            15*32+18) /*   CET Supervisor Shadow Stacks safe to use */
 XEN_CPUFEATURE(SLSM,               15*32+24) /*   Static Lockstep Mode */
--- a/xen/tools/gen-cpuid.py
+++ b/xen/tools/gen-cpuid.py
@@ -283,7 +283,7 @@ def crunch_numbers(state):
         # NO_LMSL indicates the absense of Long Mode Segment Limits, which
         # have been dropped in hardware.
         LM: [CX16, PCID, LAHF_LM, PAGE1GB, PKU, NO_LMSL, AMX_TILE, CMPCCXADD,
-             LKGS, MSRLIST],
+             LKGS, MSRLIST, USER_MSR],
 
         # AMD K6-2+ and K6-III processors shipped with 3DNow+, beyond the
         # standard 3DNow in the earlier K6 processors.



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Subject: [PATCH v9 04/10] x86/cpu-policy: re-arrange no-VMX logic
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
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Move the PKS check into an "else" for the corresponding "if()", such
that further adjustments (like for USER_MSR) can easily be put there as
well.

Signed-off-by: Jan Beulich 
---
v5: Re-base.
v4: New.

--- a/xen/arch/x86/cpu-policy.c
+++ b/xen/arch/x86/cpu-policy.c
@@ -812,19 +812,20 @@ static void __init calculate_hvm_max_pol
         if ( !cpu_has_vmx_xsaves )
             __clear_bit(X86_FEATURE_XSAVES, fs);
     }
+    else
+    {
+        /*
+         * Xen doesn't use PKS, so the guest support for it has opted to not use
+         * the VMCS load/save controls for efficiency reasons.  This depends on
+         * the exact vmentry/exit behaviour, so don't expose PKS in other
+         * situations until someone has cross-checked the behaviour for safety.
+         */
+        __clear_bit(X86_FEATURE_PKS, fs);
+    }
 
     if ( !cpu_has_vmx_msrlist )
         __clear_bit(X86_FEATURE_MSRLIST, fs);
 
-    /*
-     * Xen doesn't use PKS, so the guest support for it has opted to not use
-     * the VMCS load/save controls for efficiency reasons.  This depends on
-     * the exact vmentry/exit behaviour, so don't expose PKS in other
-     * situations until someone has cross-checked the behaviour for safety.
-     */
-    if ( !cpu_has_vmx )
-        __clear_bit(X86_FEATURE_PKS, fs);
-
     /* 
      * Make adjustments to possible (nested) virtualization features exposed
      * to the guest



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Subject: [PATCH v9 06/10] x86emul: support MSR_IMM instructions
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
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Encoding-wise these are very similar to URDMSR/UWRMSR, so existing logic
is easy to extend.

Signed-off-by: Jan Beulich 
---
RFC only for now, as the VMX part is missing: The existing intercepts
can't be re-used unmodified, as those require the MSR index to be
fetched from guest ECX.
---
v8: Don't mark the feature 's' just yet. Re-base.
v7: New.

--- a/tools/tests/x86_emulator/predicates.c
+++ b/tools/tests/x86_emulator/predicates.c
@@ -1519,6 +1519,8 @@ static const struct vex {
     { { 0xdf }, 3, T, R, pfx_66, WIG, Ln }, /* vaeskeygenassist */
     { { 0xf0 }, 3, T, R, pfx_f2, Wn, L0 }, /* rorx */
 }, vex_map7[] = {
+    { { 0xf6, 0xc0 }, 6, F, N, pfx_f3, W0, L0 }, /* wrmsrns */
+    { { 0xf6, 0xc0 }, 6, F, N, pfx_f2, W0, L0 }, /* rdmsr */
     { { 0xf8, 0xc0 }, 6, F, N, pfx_f3, W0, L0 }, /* uwrmsr */
     { { 0xf8, 0xc0 }, 6, F, N, pfx_f2, W0, L0 }, /* urdmsr */
 };
--- a/tools/tests/x86_emulator/test_x86_emulator.c
+++ b/tools/tests/x86_emulator/test_x86_emulator.c
@@ -1574,6 +1574,30 @@ int main(int argc, char **argv)
     if ( (rc != X86EMUL_EXCEPTION) ||
          (regs.rip != (unsigned long)&instr[0]) )
         goto fail;
+    printf("okay\n");
+
+    printf("%-40s", "Testing rdmsr $MSR_GS_BASE,%rdx...");
+    instr[0] = 0xc4; instr[1] = 0xe7; instr[2] = 0x7b; instr[3] = 0xf6; instr[4] = 0xc2;
+    *(uint32_t *)&instr[5] = MSR_GS_BASE;
+    regs.rip = (unsigned long)&instr[0];
+    regs.rdx = ~gs_base;
+    rc = x86_emulate(&ctxt, &emulops);
+    if ( (rc != X86EMUL_OKAY) ||
+         (regs.rip != (unsigned long)&instr[9]) ||
+         (regs.rdx != gs_base) )
+        goto fail;
+    printf("okay\n");
+
+    printf("%-40s", "Testing wrmsrns %rsi,$MSR_SHADOW_GS_BASE...");
+    instr[0] = 0xc4; instr[1] = 0xe7; instr[2] = 0x7a; instr[3] = 0xf6; instr[4] = 0xc6;
+    *(uint32_t *)&instr[5] = MSR_SHADOW_GS_BASE;
+    regs.rip = (unsigned long)&instr[0];
+    regs.rsi = 0x665544332211UL;
+    rc = x86_emulate(&ctxt, &emulops);
+    if ( (rc != X86EMUL_OKAY) ||
+         (regs.rip != (unsigned long)&instr[9]) ||
+         (gs_base_shadow != 0x665544332211UL) )
+        goto fail;
 
     emulops.write_msr     = NULL;
 #endif
--- a/tools/tests/x86_emulator/x86-emulate.c
+++ b/tools/tests/x86_emulator/x86-emulate.c
@@ -88,6 +88,7 @@ bool emul_test_init(void)
     cpu_policy.feat.lkgs = true;
     cpu_policy.feat.wrmsrns = true;
     cpu_policy.feat.msrlist = true;
+    cpu_policy.feat.msr_imm = true;
     cpu_policy.feat.user_msr = true;
     cpu_policy.extd.clzero = true;
 
--- a/xen/arch/x86/x86_emulate/decode.c
+++ b/xen/arch/x86/x86_emulate/decode.c
@@ -1262,8 +1262,9 @@ int x86emul_decode(struct x86_emulate_st
                     case vex_map7:
                         opcode |= MASK_INSR(7, X86EMUL_OPC_EXT_MASK);
                         /*
-                         * No table lookup here for now, as there's only a single
-                         * opcode point (0xf8) populated in map 7.
+                         * No table lookup here for now, as there are only two
+                         * (very similar) opcode points (0xf6, 0xf8) populated
+                         * in map 7.
                          */
                         d = DstMem | SrcImm | ModRM | Mov;
                         s->op_bytes = 8;
--- a/xen/arch/x86/x86_emulate/private.h
+++ b/xen/arch/x86/x86_emulate/private.h
@@ -614,6 +614,7 @@ amd_like(const struct x86_emulate_ctxt *
 #define vcpu_has_wrmsrns()     (ctxt->cpuid->feat.wrmsrns)
 #define vcpu_has_avx_ifma()    (ctxt->cpuid->feat.avx_ifma)
 #define vcpu_has_msrlist()     (ctxt->cpuid->feat.msrlist)
+#define vcpu_has_msr_imm()     (ctxt->cpuid->feat.msr_imm)
 #define vcpu_has_avx_vnni_int8() (ctxt->cpuid->feat.avx_vnni_int8)
 #define vcpu_has_avx_ne_convert() (ctxt->cpuid->feat.avx_ne_convert)
 #define vcpu_has_avx_vnni_int16() (ctxt->cpuid->feat.avx_vnni_int16)
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -7024,6 +7024,34 @@ x86_emulate(
         state->simd_size = simd_none;
         break;
 
+    case X86EMUL_OPC_VEX_F3(7, 0xf6): /* wrmsrns r64,imm32 */
+    case X86EMUL_OPC_VEX_F2(7, 0xf6): /* rdmsr imm32,r64 */
+        generate_exception_if(!mode_64bit() || ea.type != OP_REG, X86_EXC_UD);
+        generate_exception_if(vex.l || vex.w, X86_EXC_UD);
+        generate_exception_if(vex.opcx && ((modrm_reg & 7) || vex.reg != 0xf),
+                              X86_EXC_UD);
+        vcpu_must_have(msr_imm);
+        generate_exception_if(!mode_ring0(), X86_EXC_GP, 0);
+        if ( vex.pfx == vex_f2 )
+        {
+            /* urdmsr */
+            fail_if(!ops->read_msr);
+            if ( (rc = ops->read_msr(imm1, &msr_val, ctxt)) != X86EMUL_OKAY )
+                goto done;
+            dst.val = msr_val;
+            ASSERT(dst.type == OP_REG);
+            dst.bytes = 8;
+        }
+        else
+        {
+            /* wrmsrns */
+            fail_if(!ops->write_msr);
+            if ( (rc = ops->write_msr(imm1, dst.val, ctxt)) != X86EMUL_OKAY )
+                goto done;
+            dst.type = OP_NONE;
+        }
+        break;
+
     case X86EMUL_OPC_F3(0x0f38, 0xf8): /* enqcmds r,m512 / uwrmsr r64,r32 */
     case X86EMUL_OPC_F2(0x0f38, 0xf8): /* enqcmd r,m512 / urdmsr r32,r64 */
         if ( ea.type == OP_MEM )
--- a/xen/include/public/arch-x86/cpufeatureset.h
+++ b/xen/include/public/arch-x86/cpufeatureset.h
@@ -352,6 +352,7 @@ XEN_CPUFEATURE(MCDT_NO,            13*32
 XEN_CPUFEATURE(UC_LOCK_DIS,        13*32+ 6) /*   UC-lock disable */
 
 /* Intel-defined CPU features, CPUID level 0x00000007:1.ecx, word 14 */
+XEN_CPUFEATURE(MSR_IMM,            14*32+ 5) /*   RDMSR/WRMSRNS with immediate operand */
 
 /* Intel-defined CPU features, CPUID level 0x00000007:1.edx, word 15 */
 XEN_CPUFEATURE(AVX_VNNI_INT8,      15*32+ 4) /*A  AVX-VNNI-INT8 Instructions */
--- a/xen/tools/gen-cpuid.py
+++ b/xen/tools/gen-cpuid.py
@@ -283,7 +283,7 @@ def crunch_numbers(state):
         # NO_LMSL indicates the absense of Long Mode Segment Limits, which
         # have been dropped in hardware.
         LM: [CX16, PCID, LAHF_LM, PAGE1GB, PKU, NO_LMSL, AMX_TILE, CMPCCXADD,
-             LKGS, MSRLIST, USER_MSR],
+             LKGS, MSRLIST, USER_MSR, MSR_IMM],
 
         # AMD K6-2+ and K6-III processors shipped with 3DNow+, beyond the
         # standard 3DNow in the earlier K6 processors.



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Subject: [PATCH v9 07/10] VMX: support MSR-IMM
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
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Hook up the new VM exit codes and handle guest uses of the insns.

Signed-off-by: Jan Beulich 
---
v9: New.
---
The lack of an enable bit is concerning; at least for the nested case
that's a security issue afaict (when L0 isn't aware of the insns, or more
specifically the exit codes).

--- a/xen/include/public/arch-x86/cpufeatureset.h
+++ b/xen/include/public/arch-x86/cpufeatureset.h
@@ -352,7 +352,7 @@ XEN_CPUFEATURE(MCDT_NO,            13*32
 XEN_CPUFEATURE(UC_LOCK_DIS,        13*32+ 6) /*   UC-lock disable */
 
 /* Intel-defined CPU features, CPUID level 0x00000007:1.ecx, word 14 */
-XEN_CPUFEATURE(MSR_IMM,            14*32+ 5) /*   RDMSR/WRMSRNS with immediate operand */
+XEN_CPUFEATURE(MSR_IMM,            14*32+ 5) /*s  RDMSR/WRMSRNS with immediate operand */
 
 /* Intel-defined CPU features, CPUID level 0x00000007:1.edx, word 15 */
 XEN_CPUFEATURE(AVX_VNNI_INT8,      15*32+ 4) /*A  AVX-VNNI-INT8 Instructions */
--- a/xen/arch/x86/cpu-policy.c
+++ b/xen/arch/x86/cpu-policy.c
@@ -823,10 +823,11 @@ static void __init calculate_hvm_max_pol
         __clear_bit(X86_FEATURE_PKS, fs);
 
         /*
-         * Don't expose USER-MSR until it is known how (if at all) it is
-         * virtualized on SVM.
+         * Don't expose USER-MSR and MSR-IMM until it is known how (if at all)
+         * they are virtualized on SVM.
          */
         __clear_bit(X86_FEATURE_USER_MSR, fs);
+        __clear_bit(X86_FEATURE_MSR_IMM, fs);
     }
 
     if ( !cpu_has_vmx_msrlist )
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -453,7 +453,7 @@ void domain_cpu_policy_changed(struct do
     }
 
     /* Nested doesn't have the necessary processing, yet. */
-    if ( nestedhvm_enabled(d) && p->feat.user_msr )
+    if ( nestedhvm_enabled(d) && (p->feat.user_msr || p->feat.msr_imm) )
         return /* -EINVAL */;
 
     for_each_vcpu ( d, v )
--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -4762,6 +4762,7 @@ void asmlinkage vmx_vmexit_handler(struc
         break;
 
     case EXIT_REASON_URDMSR:
+    case EXIT_REASON_RDMSR_IMM:
     {
         uint64_t msr_content = 0;
 
@@ -4770,7 +4771,7 @@ void asmlinkage vmx_vmexit_handler(struc
         {
         case X86EMUL_OKAY:
             *decode_gpr(regs, msr_imm_gpr()) = msr_content;
-            update_guest_eip(); /* Safe: URDMSR */
+            update_guest_eip(); /* Safe: URDMSR / RDMSR  */
             break;
 
         case X86EMUL_EXCEPTION:
@@ -4781,13 +4782,14 @@ void asmlinkage vmx_vmexit_handler(struc
     }
 
     case EXIT_REASON_UWRMSR:
+    case EXIT_REASON_WRMSRNS_IMM:
         __vmread(EXIT_QUALIFICATION, &exit_qualification);
         switch ( hvm_msr_write_intercept(exit_qualification,
                                          *decode_gpr(regs, msr_imm_gpr()),
                                          true) )
         {
         case X86EMUL_OKAY:
-            update_guest_eip(); /* Safe: UWRMSR */
+            update_guest_eip(); /* Safe: UWRMSR / WRMSRNS  */
             break;
 
         case X86EMUL_EXCEPTION:
--- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h
+++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h
@@ -205,6 +205,8 @@ static inline void pi_clear_sn(struct pi
 #define EXIT_REASON_WRMSRLIST           79
 #define EXIT_REASON_URDMSR              80
 #define EXIT_REASON_UWRMSR              81
+#define EXIT_REASON_RDMSR_IMM           84
+#define EXIT_REASON_WRMSRNS_IMM         85
 /* Remember to also update VMX_PERF_EXIT_REASON_SIZE! */
 
 /*
--- a/xen/arch/x86/include/asm/perfc_defn.h
+++ b/xen/arch/x86/include/asm/perfc_defn.h
@@ -6,7 +6,7 @@ PERFCOUNTER_ARRAY(exceptions,
 
 #ifdef CONFIG_HVM
 
-#define VMX_PERF_EXIT_REASON_SIZE 82
+#define VMX_PERF_EXIT_REASON_SIZE 86
 #define VMEXIT_NPF_PERFC 143
 #define SVM_PERF_EXIT_REASON_SIZE (VMEXIT_NPF_PERFC + 1)
 PERFCOUNTER_ARRAY(vmexits,              "vmexits",



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Subject: [PATCH v9 08/10] x86emul: support non-SIMD MOVRS
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
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As we ignore cachability aspects of insns, they're treated like simple
MOVs.

Signed-off-by: Jan Beulich 
---
SDE: -dmr
---
v7: New.

--- a/tools/tests/x86_emulator/predicates.c
+++ b/tools/tests/x86_emulator/predicates.c
@@ -843,6 +843,9 @@ static const struct {
     { { 0x80 }, { 2, 2 }, T, R, pfx_66 }, /* invept */
     { { 0x81 }, { 2, 2 }, T, R, pfx_66 }, /* invvpid */
     { { 0x82 }, { 2, 2 }, T, R, pfx_66 }, /* invpcid */
+    { { 0x8a }, { 2, 2 }, T, R, pfx_no }, /* movrsb */
+    { { 0x8b }, { 2, 2 }, T, R, pfx_no }, /* movrs{d,q} */
+    { { 0x8b }, { 2, 2 }, T, R, pfx_66 }, /* movrsw */
     { { 0xc8 }, { 2, 2 }, T, R, pfx_no }, /* sha1nexte */
     { { 0xc9 }, { 2, 2 }, T, R, pfx_no }, /* sha1msg1 */
     { { 0xca }, { 2, 2 }, T, R, pfx_no }, /* sha1msg2 */
--- a/tools/tests/x86_emulator/test_x86_emulator.c
+++ b/tools/tests/x86_emulator/test_x86_emulator.c
@@ -1869,6 +1869,29 @@ int main(int argc, char **argv)
     }
     else
         printf("skipped\n");
+
+    {
+        /* For the non-SIMD forms the emulator doesn't itself use MOVRS. */
+        bool movrs = cpu_policy.feat.movrs;
+
+        cpu_policy.feat.movrs = true;
+
+        printf("%-40s", "Testing movrs 6(%rdi),%si...");
+        instr[0] = 0x66; instr[1] = 0x0f; instr[2] = 0x38;
+        instr[3] = 0x8b; instr[4] = 0x77; instr[5] = 0x06;
+        regs.rip = (unsigned long)&instr[0];
+        regs.rsi = 0x8888777766665555UL;
+        regs.rdi = (unsigned long)res;
+        res[1]   = 0x88777788U;
+        rc = x86_emulate(&ctxt, &emulops);
+        if ( (rc != X86EMUL_OKAY) ||
+             (regs.rip != (unsigned long)&instr[6]) ||
+             (regs.rsi != 0x8888777766668877UL) )
+            goto fail;
+        printf("okay\n");
+
+        cpu_policy.feat.movrs = movrs;
+    }
 #endif /* x86-64 */
 
     printf("%-40s", "Testing shld $1,%ecx,(%edx)...");
--- a/xen/arch/x86/x86_emulate/decode.c
+++ b/xen/arch/x86/x86_emulate/decode.c
@@ -901,7 +901,8 @@ decode_0f38(struct x86_emulate_state *s,
 {
     switch ( ctxt->opcode & X86EMUL_OPC_MASK )
     {
-    case 0x00 ... 0xef:
+    case 0x00 ... 0x89:
+    case 0x8c ... 0xef:
     case 0xf2 ... 0xf5:
     case 0xf7:
     case 0xfa ... 0xff:
@@ -912,6 +913,13 @@ decode_0f38(struct x86_emulate_state *s,
         ctxt->opcode |= MASK_INSR(s->vex.pfx, X86EMUL_OPC_PFX_MASK);
         break;
 
+    case 0x8a ... 0x8b: /* movrs */
+        s->desc = DstReg | SrcMem | Mov;
+        if ( !(ctxt->opcode & 1) )
+            s->desc |= ByteOp;
+        s->simd_size = simd_none;
+        break;
+
     case X86EMUL_OPC_VEX_66(0, 0x2d): /* vmaskmovpd */
         s->simd_size = simd_packed_fp;
         break;
--- a/xen/arch/x86/x86_emulate/private.h
+++ b/xen/arch/x86/x86_emulate/private.h
@@ -614,6 +614,7 @@ amd_like(const struct x86_emulate_ctxt *
 #define vcpu_has_wrmsrns()     (ctxt->cpuid->feat.wrmsrns)
 #define vcpu_has_avx_ifma()    (ctxt->cpuid->feat.avx_ifma)
 #define vcpu_has_msrlist()     (ctxt->cpuid->feat.msrlist)
+#define vcpu_has_movrs()       (ctxt->cpuid->feat.movrs)
 #define vcpu_has_msr_imm()     (ctxt->cpuid->feat.msr_imm)
 #define vcpu_has_avx_vnni_int8() (ctxt->cpuid->feat.avx_vnni_int8)
 #define vcpu_has_avx_ne_convert() (ctxt->cpuid->feat.avx_ne_convert)
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -6323,6 +6323,16 @@ x86_emulate(
         fault_suppression = false;
         goto avx512f_no_sae;
 
+#endif /* !X86EMUL_NO_SIMD */
+
+    case X86EMUL_OPC(0x0f38, 0x8a)
+     ... X86EMUL_OPC(0x0f38, 0x8b): /* movrs */
+        vcpu_must_have(movrs);
+        dst.val = src.val;
+        break;
+
+#ifndef X86EMUL_NO_SIMD
+
     case X86EMUL_OPC_VEX_66(0x0f38, 0x8c): /* vpmaskmov{d,q} mem,{x,y}mm,{x,y}mm */
     case X86EMUL_OPC_VEX_66(0x0f38, 0x8e): /* vpmaskmov{d,q} {x,y}mm,{x,y}mm,mem */
         generate_exception_if(ea.type != OP_MEM, X86_EXC_UD);
--- a/xen/include/public/arch-x86/cpufeatureset.h
+++ b/xen/include/public/arch-x86/cpufeatureset.h
@@ -319,6 +319,7 @@ XEN_CPUFEATURE(AVX_IFMA,     10*32+23) /
 XEN_CPUFEATURE(LAM,          10*32+26) /*   Linear Address Masking */
 XEN_CPUFEATURE(MSRLIST,      10*32+27) /*   {RD,WR}MSRLIST instructions */
 XEN_CPUFEATURE(NO_INVD,      10*32+30) /*   INVD instruction unusable */
+XEN_CPUFEATURE(MOVRS,        10*32+31) /*a  MOV-read-shared instructions */
 
 /* AMD-defined CPU features, CPUID level 0x80000021.eax, word 11 */
 XEN_CPUFEATURE(NO_NEST_BP,         11*32+ 0) /*A  No Nested Data Breakpoints */
--- a/xen/tools/gen-cpuid.py
+++ b/xen/tools/gen-cpuid.py
@@ -283,7 +283,7 @@ def crunch_numbers(state):
         # NO_LMSL indicates the absense of Long Mode Segment Limits, which
         # have been dropped in hardware.
         LM: [CX16, PCID, LAHF_LM, PAGE1GB, PKU, NO_LMSL, AMX_TILE, CMPCCXADD,
-             LKGS, MSRLIST, USER_MSR, MSR_IMM],
+             LKGS, MSRLIST, USER_MSR, MSR_IMM, MOVRS],
 
         # AMD K6-2+ and K6-III processors shipped with 3DNow+, beyond the
         # standard 3DNow in the earlier K6 processors.



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Subject: [PATCH v9 09/10] x86: use / "support" UDB
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
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With opcode D6h now firmly reserved as another #UD-raising one in 64-bit
mode, use that instead of the two-byte UD2 for bug frame marking.

While there also make the respective adjustment to the emulator.

Signed-off-by: Jan Beulich 
---
Should we also switch {svm,vmx}_init_hypercall_page()?

Furthermore x86_64/kexec_reloc.S also has two uses. Question is whether
"tailcall" is being open-coded there, or whether that's deliberately not
using the macro we have.

One of the table entries in stub_selftest() uses UD1, yet not in quite
an appropriate way: The 0x90 following it (presumably meant to be a NOP)
really is a ModR/M byte, requiring a displacement to follow. Wouldn't we
better adjust that (e.g. using 0xcc instead)?
---
v9: New.

--- a/xen/arch/x86/include/asm/bug.h
+++ b/xen/arch/x86/include/asm/bug.h
@@ -21,7 +21,7 @@
 
 #ifndef __ASSEMBLY__
 
-#define BUG_INSTR       "ud2"
+#define BUG_INSTR       ".byte 0xd6" /* UDB */
 #define BUG_ASM_CONST   "c"
 
 #else  /* !__ASSEMBLY__ */
@@ -37,7 +37,7 @@
         .error "Invalid BUGFRAME index"
     .endif
 
-    .L\@ud: ud2a
+    .L\@ud: .byte 0xd6 /* UDB */
 
     .pushsection .rodata.str1, "aMS", @progbits, 1
          .L\@s1: .asciz "\file_str"
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -1256,7 +1256,7 @@ void asmlinkage do_trap(struct cpu_user_
 
 void asmlinkage do_invalid_op(struct cpu_user_regs *regs)
 {
-    u8 bug_insn[2];
+    uint8_t bug_insn;
     const void *eip = (const void *)regs->rip;
     int id;
 
@@ -1268,8 +1268,8 @@ void asmlinkage do_invalid_op(struct cpu
     }
 
     if ( !is_active_kernel_text(regs->rip) ||
-         copy_from_unsafe(bug_insn, eip, sizeof(bug_insn)) ||
-         memcmp(bug_insn, "\xf\xb", sizeof(bug_insn)) )
+         copy_from_unsafe(&bug_insn, eip, sizeof(bug_insn)) ||
+         bug_insn != 0xd6 /* UDB */ )
         goto die;
 
     id = do_bug_frame(regs, regs->rip);
--- a/xen/arch/x86/x86_emulate/decode.c
+++ b/xen/arch/x86/x86_emulate/decode.c
@@ -651,7 +651,7 @@ decode_onebyte(struct x86_emulate_state
     case 0xce: /* into */
     case 0xd4: /* aam */
     case 0xd5: /* aad */
-    case 0xd6: /* salc */
+        /* 0xd6 (salc) omitted here, for #UD to be raised in 64-bit mode. */
         s->not_64bit = true;
         break;
 
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -2470,9 +2470,17 @@ x86_emulate(
         _regs.eflags |= even_parity(_regs.al) ? X86_EFLAGS_PF : 0;
         break;
 
-    case 0xd6: /* salc */
-        _regs.al = (_regs.eflags & X86_EFLAGS_CF) ? 0xff : 0x00;
-        break;
+    case 0xd6: /* salc / udb */
+        if ( !mode_64bit() )
+        {
+            _regs.al = (_regs.eflags & X86_EFLAGS_CF) ? 0xff : 0x00;
+            break;
+        }
+        fallthrough;
+    case X86EMUL_OPC(0x0f, 0x0b): /* ud2 */
+    case X86EMUL_OPC(0x0f, 0xb9): /* ud1 */
+    case X86EMUL_OPC(0x0f, 0xff): /* ud0 */
+        generate_exception(X86_EXC_UD);
 
     case 0xd7: /* xlat */ {
         unsigned long al;
@@ -3204,11 +3212,6 @@ x86_emulate(
             goto done;
         break;
 
-    case X86EMUL_OPC(0x0f, 0x0b): /* ud2 */
-    case X86EMUL_OPC(0x0f, 0xb9): /* ud1 */
-    case X86EMUL_OPC(0x0f, 0xff): /* ud0 */
-        generate_exception(X86_EXC_UD);
-
     case X86EMUL_OPC(0x0f, 0x0d): /* GrpP (prefetch) */
     case X86EMUL_OPC(0x0f, 0x18): /* Grp16 (prefetch/nop) */
     case X86EMUL_OPC(0x0f, 0x19) ... X86EMUL_OPC(0x0f, 0x1f): /* nop */



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Subject: [PATCH v9 10/10] x86emul: support AVX512-BMM
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
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EVEX.W meaning is unusual for VBMAC{,X}OR16x16x16, but that needs taking
care of only in the test harness.

Like already proposed in "x86emul: support AVX10.1", use just
vcpu_must_have(), not host_and_vcpu_must_have().

Signed-off-by: Jan Beulich 
---
The Disp8Shift settings are guesswork; the binutils submission bogusly(?)
suggests no scaling at all.

No idea how to test this without having access to capable hardware. AMD,
to my knowledge, offers no equivalent to Intel's SDE.
---
v9: New.

--- a/tools/tests/x86_emulator/evex-disp8.c
+++ b/tools/tests/x86_emulator/evex-disp8.c
@@ -689,6 +689,15 @@ static const struct test avx512_fp16_128
     INSN(movw, 66, map5, 7e, el, fp16, el),
 };
 
+static const struct test avx512_bmm_all[] = {
+    INSN(bitrev,   , map6, 81, vl, b, vl),
+};
+
+static const struct test avx512_bmm_no128[] = {
+    INSN(bmacor16x16x16,    , map6, 81, vl, w, vl),
+    INSN(bmacxor16x16x16,   , map6, 81, vl, w, vl),
+};
+
 static const struct test gfni_all[] = {
     INSN(gf2p8affineinvqb, 66, 0f3a, cf, vl, q, vl),
     INSN(gf2p8affineqb,    66, 0f3a, ce, vl, q, vl),
@@ -817,6 +826,12 @@ static void test_one(const struct test *
 
     case ESZ_w:
         evex.w = 1;
+        /*
+         * VBMAC{,X}OR16x16x16 don't follow the general pattern: EVEX.W controls
+         * reduction kind there, not element size.
+         */
+        if ( test->spc == SPC_map6 && !test->pfx && test->opc == 0x80 )
+            evex.w = test->mnemonic[4] == 'x';
         /* fall through */
     case ESZ_fp16:
         esz = 2;
@@ -1087,6 +1102,8 @@ void evex_disp8_test(void *instr, struct
     RUN(avx512_vpopcntdq, all);
     RUN(avx512_fp16, all);
     RUN(avx512_fp16, 128);
+    RUN(avx512_bmm, all);
+    RUN(avx512_bmm, no128);
 
     if ( cpu_has_avx512f )
     {
--- a/tools/tests/x86_emulator/predicates.c
+++ b/tools/tests/x86_emulator/predicates.c
@@ -2157,6 +2157,9 @@ static const struct evex {
     { { 0x56 }, 2, T, R, pfx_f2, W0, Ln }, /* vfcmaddcph */
     { { 0x57 }, 2, T, R, pfx_f3, W0, LIG }, /* vfmaddcsh */
     { { 0x57 }, 2, T, R, pfx_f2, W0, LIG }, /* vfcmaddcsh */
+    { { 0x80 }, 2, T, R, pfx_no, W0, L1 | L2 }, /* vbmacor16x16x16 */
+    { { 0x80 }, 2, T, R, pfx_no, W1, L1 | L2 }, /* vbmacxor16x16x16 */
+    { { 0x81 }, 2, T, R, pfx_no, W0, Ln }, /* vbitrev */
     { { 0x96 }, 2, T, R, pfx_66, W0, Ln }, /* vfmaddsub132ph */
     { { 0x97 }, 2, T, R, pfx_66, W0, Ln }, /* vfmsubadd132ph */
     { { 0x98 }, 2, T, R, pfx_66, W0, Ln }, /* vfmadd132ph */
--- a/tools/tests/x86_emulator/x86-emulate.h
+++ b/tools/tests/x86_emulator/x86-emulate.h
@@ -223,6 +223,8 @@ void wrpkru(unsigned int val);
 #define cpu_has_xop                 (cpu_policy.extd.xop  && xcr0_mask(6))
 #define cpu_has_fma4                (cpu_policy.extd.fma4 && xcr0_mask(6))
 #define cpu_has_tbm                  cpu_policy.extd.tbm
+#define cpu_has_avx512_bmm          (cpu_policy.extd.avx512_bmm && \
+                                     xcr0_mask(0xe6))
 
 int emul_test_cpuid(
     uint32_t leaf,
--- a/xen/include/public/arch-x86/cpufeatureset.h
+++ b/xen/include/public/arch-x86/cpufeatureset.h
@@ -334,6 +334,7 @@ XEN_CPUFEATURE(CPUID_USER_DIS,     11*32
 XEN_CPUFEATURE(EPSF,               11*32+18) /*A  Enhanced Predictive Store Forwarding */
 XEN_CPUFEATURE(FSRSC,              11*32+19) /*A  Fast Short REP SCASB */
 XEN_CPUFEATURE(AMD_PREFETCHI,      11*32+20) /*A  PREFETCHIT{0,1} Instructions */
+XEN_CPUFEATURE(AVX512_BMM,         11*32+23) /*a  AVX512 Bitmap Manipulation Instructions */
 XEN_CPUFEATURE(SBPB,               11*32+27) /*A  Selective Branch Predictor Barrier */
 XEN_CPUFEATURE(IBPB_BRTYPE,        11*32+28) /*A  IBPB flushes Branch Type predictions too */
 XEN_CPUFEATURE(SRSO_NO,            11*32+29) /*A  Hardware not vulnerable to Speculative Return Stack Overflow */
--- a/xen/tools/gen-cpuid.py
+++ b/xen/tools/gen-cpuid.py
@@ -308,7 +308,7 @@ def crunch_numbers(state):
         # dependents of AVX512BW (as to requiring wider than 16-bit mask
         # registers), despite the SDM not formally making this connection.
         AVX512BW: [AVX512_VBMI, AVX512_VBMI2, AVX512_BITALG, AVX512_BF16,
-                   AVX512_FP16],
+                   AVX512_FP16, AVX512_BMM],
 
         # Extensions with VEX/EVEX encodings keyed to a separate feature
         # flag are made dependents of their respective legacy feature.
--- a/xen/arch/x86/x86_emulate/decode.c
+++ b/xen/arch/x86/x86_emulate/decode.c
@@ -387,6 +387,7 @@ static const struct ext0f38_table {
     [0x7a ... 0x7c] = { .simd_size = simd_none, .two_op = 1 },
     [0x7d ... 0x7e] = { .simd_size = simd_packed_int, .d8s = d8s_vl },
     [0x7f] = { .simd_size = simd_packed_fp, .d8s = d8s_vl },
+    [0x80 ... 0x81] = { .simd_size = simd_packed_int, .d8s = d8s_vl },
     [0x82] = { .simd_size = simd_other },
     [0x83] = { .simd_size = simd_packed_int, .d8s = d8s_vl },
     [0x88] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_dq },
--- a/xen/arch/x86/x86_emulate/private.h
+++ b/xen/arch/x86/x86_emulate/private.h
@@ -568,6 +568,7 @@ amd_like(const struct x86_emulate_ctxt *
 #define vcpu_has_clzero()      (ctxt->cpuid->extd.clzero)
 #define vcpu_has_wbnoinvd()    (ctxt->cpuid->extd.wbnoinvd)
 #define vcpu_has_nscb()        (ctxt->cpuid->extd.nscb)
+#define vcpu_has_avx512_bmm()  (ctxt->cpuid->extd.avx512_bmm)
 
 #define vcpu_has_bmi1()        (ctxt->cpuid->feat.bmi1)
 #define vcpu_has_hle()         (ctxt->cpuid->feat.hle)
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -7990,6 +7990,19 @@ x86_emulate(
         goto simd_zmm;
     }
 
+    case X86EMUL_OPC_EVEX(6, 0x80): /* vbmac{,x}or16x16x16 [xyz]mm/mem,[xyz]mm,[xyz]mm */
+        vcpu_must_have(avx512_bmm);
+        generate_exception_if(!evex.lr || evex.brs || evex.opmsk, X86_EXC_UD);
+        avx512_vlen_check(false);
+        goto simd_zmm;
+
+    case X86EMUL_OPC_EVEX(6, 0x81): /* vbitrev [xyz]mm/mem,[xyz]mm */
+        vcpu_must_have(avx512_bmm);
+        generate_exception_if(evex.w || evex.brs || evex.reg != 0xf || !evex.RX,
+                              X86_EXC_UD);
+        avx512_vlen_check(false);
+        goto simd_zmm;
+
     case X86EMUL_OPC_XOP(08, 0x85): /* vpmacssww xmm,xmm/m128,xmm,xmm */
     case X86EMUL_OPC_XOP(08, 0x86): /* vpmacsswd xmm,xmm/m128,xmm,xmm */
     case X86EMUL_OPC_XOP(08, 0x87): /* vpmacssdql xmm,xmm/m128,xmm,xmm */



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Date: Mon, 24 Nov 2025 16:00:03 +0100
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Subject: [PATCH v9 05/10] VMX: support USER-MSR
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
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Hook up the new VM exit codes and handle guest accesses, context switch,
and save/restore. At least for now don't allow the guest direct access
to the control MSR; this may need changing if guests were to frequently
access it (e.g. on their own context switch path).

While there also correct a one-off in union ldt_or_tr_instr_info's
comment.

Signed-off-by: Jan Beulich 
---
Needing to change two places in hvm.c continues to be unhelpful; I
recall I already did forget to also adjust hvm_load_cpu_msrs() for XFD.
Considering that MSRs typically arrive in the order the table has it,
couldn't we incrementally look up the incoming MSR index there, falling
back to a full lookup only when the incremental lookup failed (and thus
not normally re-iterating through the initial part of the array)?

Said comment in union ldt_or_tr_instr_info is further odd (same for
union gdt_or_idt_instr_info's) in that Instruction Information is only a
32-bit field. Hence bits 32-63 aren't undefined, but simply don't exist.

RFC: The wee attempt to "deal" with nested is likely wrong, but I'm
     afraid I simply don't know where such enforcement would be done
     properly. Returning an error there is also commented out, for
     domain_cpu_policy_changed() returning void without "x86/xstate:
     re-size save area when CPUID policy changes" in place.
---
v9: Use wrmsrns(). Do renames where bits are also going to be used for
    MSR-IMM. Re-base.
v8: Re-base.
v5: Introduce user_msr_gpr().
v4: New.

--- a/xen/arch/x86/cpu-policy.c
+++ b/xen/arch/x86/cpu-policy.c
@@ -821,6 +821,12 @@ static void __init calculate_hvm_max_pol
          * situations until someone has cross-checked the behaviour for safety.
          */
         __clear_bit(X86_FEATURE_PKS, fs);
+
+        /*
+         * Don't expose USER-MSR until it is known how (if at all) it is
+         * virtualized on SVM.
+         */
+        __clear_bit(X86_FEATURE_USER_MSR, fs);
     }
 
     if ( !cpu_has_vmx_msrlist )
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -452,6 +452,10 @@ void domain_cpu_policy_changed(struct do
         }
     }
 
+    /* Nested doesn't have the necessary processing, yet. */
+    if ( nestedhvm_enabled(d) && p->feat.user_msr )
+        return /* -EINVAL */;
+
     for_each_vcpu ( d, v )
     {
         cpu_policy_updated(v);
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -1391,6 +1391,7 @@ static int cf_check hvm_load_cpu_xsave_s
 
 #define HVM_CPU_MSR_SIZE(cnt) offsetof(struct hvm_msr, msr[cnt])
 static const uint32_t msrs_to_send[] = {
+    MSR_USER_MSR_CTL,
     MSR_SPEC_CTRL,
     MSR_INTEL_MISC_FEATURES_ENABLES,
     MSR_PKRS,
@@ -1545,6 +1546,7 @@ static int cf_check hvm_load_cpu_msrs(st
         {
             int rc;
 
+        case MSR_USER_MSR_CTL:
         case MSR_SPEC_CTRL:
         case MSR_INTEL_MISC_FEATURES_ENABLES:
         case MSR_PKRS:
--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -696,13 +696,18 @@ static void cf_check vmx_vcpu_destroy(st
 }
 
 /*
- * To avoid MSR save/restore at every VM exit/entry time, we restore
- * the x86_64 specific MSRs at domain switch time. Since these MSRs
- * are not modified once set for para domains, we don't save them,
- * but simply reset them to values set in percpu_traps_init().
+ * To avoid MSR save/restore at every VM exit/entry time, we restore the
+ * x86_64 specific MSRs at vcpu switch time. Since these MSRs are not
+ * modified once set for para domains, we don't save them, but simply clear
+ * them or reset them to values set in percpu_traps_init().
  */
-static void vmx_restore_host_msrs(void)
+static void vmx_restore_host_msrs(const struct vcpu *v)
 {
+    const struct vcpu_msrs *msrs = v->arch.msrs;
+
+    if ( msrs->user_msr_ctl.enable )
+        wrmsrns(MSR_USER_MSR_CTL, 0);
+
     /* No PV guests?  No need to restore host SYSCALL infrastructure. */
     if ( !IS_ENABLED(CONFIG_PV) )
         return;
@@ -756,6 +761,9 @@ static void vmx_restore_guest_msrs(struc
 
     if ( cp->feat.pks )
         wrpkrs(msrs->pkrs);
+
+    if ( msrs->user_msr_ctl.enable )
+        wrmsrns(MSR_USER_MSR_CTL, msrs->user_msr_ctl.raw);
 }
 
 void vmx_update_cpu_exec_control(struct vcpu *v)
@@ -1199,7 +1207,7 @@ static void cf_check vmx_ctxt_switch_fro
     if ( !v->arch.fully_eager_fpu )
         vmx_fpu_leave(v);
     vmx_save_guest_msrs(v);
-    vmx_restore_host_msrs();
+    vmx_restore_host_msrs(v);
     vmx_save_dr(v);
 
     if ( v->domain->arch.hvm.pi_ops.flags & PI_CSW_FROM )
@@ -4245,6 +4253,14 @@ static int vmx_handle_apic_write(void)
     return vlapic_apicv_write(current, exit_qualification & 0xfff);
 }
 
+static unsigned int msr_imm_gpr(void)
+{
+    msr_imm_instr_info_t info;
+
+    __vmread(VMX_INSTRUCTION_INFO, &info.raw);
+    return info.gpr;
+}
+
 static void undo_nmis_unblocked_by_iret(void)
 {
     unsigned long guest_info;
@@ -4745,6 +4761,41 @@ void asmlinkage vmx_vmexit_handler(struc
             hvm_inject_hw_exception(X86_EXC_GP, 0);
         break;
 
+    case EXIT_REASON_URDMSR:
+    {
+        uint64_t msr_content = 0;
+
+        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        switch ( hvm_msr_read_intercept(exit_qualification, &msr_content) )
+        {
+        case X86EMUL_OKAY:
+            *decode_gpr(regs, msr_imm_gpr()) = msr_content;
+            update_guest_eip(); /* Safe: URDMSR */
+            break;
+
+        case X86EMUL_EXCEPTION:
+            hvm_inject_hw_exception(X86_EXC_GP, 0);
+            break;
+        }
+        break;
+    }
+
+    case EXIT_REASON_UWRMSR:
+        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        switch ( hvm_msr_write_intercept(exit_qualification,
+                                         *decode_gpr(regs, msr_imm_gpr()),
+                                         true) )
+        {
+        case X86EMUL_OKAY:
+            update_guest_eip(); /* Safe: UWRMSR */
+            break;
+
+        case X86EMUL_EXCEPTION:
+            hvm_inject_hw_exception(X86_EXC_GP, 0);
+            break;
+        }
+        break;
+
     case EXIT_REASON_VMXOFF:
     case EXIT_REASON_VMXON:
     case EXIT_REASON_VMCLEAR:
--- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h
+++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h
@@ -203,6 +203,8 @@ static inline void pi_clear_sn(struct pi
 #define EXIT_REASON_NOTIFY              75
 #define EXIT_REASON_RDMSRLIST           78
 #define EXIT_REASON_WRMSRLIST           79
+#define EXIT_REASON_URDMSR              80
+#define EXIT_REASON_UWRMSR              81
 /* Remember to also update VMX_PERF_EXIT_REASON_SIZE! */
 
 /*
@@ -578,8 +580,18 @@ typedef union ldt_or_tr_instr_info {
         base_reg_invalid        :1,  /* bit 27 - Base register invalid */
         instr_identity          :1,  /* bit 28 - 0:LDT, 1:TR */
         instr_write             :1,  /* bit 29 - 0:store, 1:load */
-                                :34; /* bits 31:63 - Undefined */
+                                :34; /* bits 30:63 - Undefined */
     };
 } ldt_or_tr_instr_info_t;
 
+/* VM-Exit instruction info for URDMSR and UWRMSR */
+typedef union msr_imm_instr_info {
+    unsigned long raw;
+    struct {
+        unsigned int            :3,  /* Bits 0:2 - Undefined */
+        gpr                     :4,  /* Bits 3:6 - Source/Destination register */
+                                :25; /* bits 7:31 - Undefined */
+    };
+} msr_imm_instr_info_t;
+
 #endif /* __ASM_X86_HVM_VMX_VMX_H__ */
--- a/xen/arch/x86/include/asm/guest-msr.h
+++ b/xen/arch/x86/include/asm/guest-msr.h
@@ -8,6 +8,20 @@
 struct vcpu_msrs
 {
     /*
+     * 0x0000001c - MSR_USER_MSR_CTL
+     *
+     * Value is guest chosen, and always loaded in vcpu context.
+     */
+    union {
+        uint64_t raw;
+        struct {
+            bool enable:1;
+            unsigned int :11;
+            unsigned long bitmap:52;
+        };
+    } user_msr_ctl;
+
+    /*
      * 0x00000048 - MSR_SPEC_CTRL
      * 0xc001011f - MSR_VIRT_SPEC_CTRL (if X86_FEATURE_AMD_SSBD)
      *
--- a/xen/arch/x86/include/asm/perfc_defn.h
+++ b/xen/arch/x86/include/asm/perfc_defn.h
@@ -6,7 +6,7 @@ PERFCOUNTER_ARRAY(exceptions,
 
 #ifdef CONFIG_HVM
 
-#define VMX_PERF_EXIT_REASON_SIZE 80
+#define VMX_PERF_EXIT_REASON_SIZE 82
 #define VMEXIT_NPF_PERFC 143
 #define SVM_PERF_EXIT_REASON_SIZE (VMEXIT_NPF_PERFC + 1)
 PERFCOUNTER_ARRAY(vmexits,              "vmexits",
--- a/xen/arch/x86/msr.c
+++ b/xen/arch/x86/msr.c
@@ -280,6 +280,12 @@ int guest_rdmsr(struct vcpu *v, uint32_t
         *val = msrs->xss.raw;
         break;
 
+    case MSR_USER_MSR_CTL:
+        if ( !cp->feat.user_msr )
+            goto gp_fault;
+        *val = msrs->user_msr_ctl.raw;
+        break;
+
     case 0x40000000 ... 0x400001ff:
         if ( is_viridian_domain(d) )
         {
@@ -618,6 +624,19 @@ int guest_wrmsr(struct vcpu *v, uint32_t
         msrs->xss.raw = val;
         break;
 
+    case MSR_USER_MSR_CTL:
+        if ( !cp->feat.user_msr )
+            goto gp_fault;
+
+        if ( (val & ~(USER_MSR_ENABLE | USER_MSR_ADDR_MASK)) ||
+             !is_canonical_address(val) )
+            goto gp_fault;
+
+        msrs->user_msr_ctl.raw = val;
+        if ( v == curr )
+            wrmsrns(MSR_USER_MSR_CTL, val);
+        break;
+
     case 0x40000000 ... 0x400001ff:
         if ( is_viridian_domain(d) )
         {
--- a/xen/include/public/arch-x86/cpufeatureset.h
+++ b/xen/include/public/arch-x86/cpufeatureset.h
@@ -360,7 +360,7 @@ XEN_CPUFEATURE(AMX_COMPLEX,        15*32
 XEN_CPUFEATURE(AVX_VNNI_INT16,     15*32+10) /*A  AVX-VNNI-INT16 Instructions */
 XEN_CPUFEATURE(UTMR,               15*32+13) /*   User Timer */
 XEN_CPUFEATURE(PREFETCHI,          15*32+14) /*A  PREFETCHIT{0,1} Instructions */
-XEN_CPUFEATURE(USER_MSR,           15*32+15) /*   U{RD,WR}MSR Instructions */
+XEN_CPUFEATURE(USER_MSR,           15*32+15) /*s  U{RD,WR}MSR Instructions */
 XEN_CPUFEATURE(UIRET_UIF,          15*32+17) /*   UIRET updates UIF */
 XEN_CPUFEATURE(CET_SSS,            15*32+18) /*   CET Supervisor Shadow Stacks safe to use */
 XEN_CPUFEATURE(SLSM,               15*32+24) /*   Static Lockstep Mode */



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        Mon, 24 Nov 2025 07:08:39 -0800 (PST)
From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Kevin Lampis 
Subject: [PATCH] x86/intel: Resync intel-family.h
Date: Mon, 24 Nov 2025 15:08:37 +0000
Message-Id: <20251124150837.654354-1-andrew.cooper3@citrix.com>
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Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 
CC: Kevin Lampis 

I'm unsure about the Intel CPU Core types, but it's probably better to keep
them than strip them from our copy.
---
 xen/arch/x86/include/asm/intel-family.h | 68 +++++++++++++++++++++----
 1 file changed, 57 insertions(+), 11 deletions(-)

diff --git a/xen/arch/x86/include/asm/intel-family.h b/xen/arch/x86/include/asm/intel-family.h
index d8c0bcc406de..cc3fb4cc471f 100644
--- a/xen/arch/x86/include/asm/intel-family.h
+++ b/xen/arch/x86/include/asm/intel-family.h
@@ -1,8 +1,8 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
  * Snapshot from Linux:
- *   db4001f9cc32e3ef105a4e4f492d7d813b28292a
- *   x86/cpu/vfm: Delete all the *_FAM6_ CPU #defines
+ *   89216c9051ef6635f1514f8e0d2f9cd63b37a3b6
+ *   x86/cpu: Add/fix core comments for {Panther,Nova} Lake
  */
 #ifndef _ASM_X86_INTEL_FAMILY_H
 #define _ASM_X86_INTEL_FAMILY_H
@@ -50,7 +50,18 @@
 /* Wildcard match so X86_MATCH_VFM(ANY) works */
 #define INTEL_ANY			IFM(X86_FAMILY_ANY, X86_MODEL_ANY)
 
+/* Family 5 */
+#define INTEL_FAM5_START		IFM(5, 0x00) /* Notational marker, also P5 A-step */
+#define INTEL_PENTIUM_75		IFM(5, 0x02) /* P54C */
+#define INTEL_PENTIUM_MMX		IFM(5, 0x04) /* P55C */
+#define INTEL_QUARK_X1000		IFM(5, 0x09) /* Quark X1000 SoC */
+
+/* Family 6, 18, 19 */
 #define INTEL_PENTIUM_PRO		IFM(6, 0x01)
+#define INTEL_PENTIUM_II_KLAMATH	IFM(6, 0x03)
+#define INTEL_PENTIUM_III_DESCHUTES	IFM(6, 0x05)
+#define INTEL_PENTIUM_III_TUALATIN	IFM(6, 0x0B)
+#define INTEL_PENTIUM_M_DOTHAN		IFM(6, 0x0D)
 
 #define INTEL_CORE_YONAH		IFM(6, 0x0E)
 
@@ -115,11 +126,15 @@
 
 #define INTEL_SAPPHIRERAPIDS_X		IFM(6, 0x8F) /* Golden Cove */
 
-#define INTEL_EMERALDRAPIDS_X		IFM(6, 0xCF)
+#define INTEL_EMERALDRAPIDS_X		IFM(6, 0xCF) /* Raptor Cove */
 
-#define INTEL_GRANITERAPIDS_X		IFM(6, 0xAD)
+#define INTEL_GRANITERAPIDS_X		IFM(6, 0xAD) /* Redwood Cove */
 #define INTEL_GRANITERAPIDS_D		IFM(6, 0xAE)
 
+#define INTEL_DIAMONDRAPIDS_X		IFM(19, 0x01) /* Panther Cove */
+
+#define INTEL_BARTLETTLAKE		IFM(6, 0xD7) /* Raptor Cove */
+
 /* "Hybrid" Processors (P-Core/E-Core) */
 
 #define INTEL_LAKEFIELD			IFM(6, 0x8A) /* Sunny Cove / Tremont */
@@ -131,14 +146,21 @@
 #define INTEL_RAPTORLAKE_P		IFM(6, 0xBA)
 #define INTEL_RAPTORLAKE_S		IFM(6, 0xBF)
 
-#define INTEL_METEORLAKE		IFM(6, 0xAC)
+#define INTEL_METEORLAKE		IFM(6, 0xAC) /* Redwood Cove / Crestmont */
 #define INTEL_METEORLAKE_L		IFM(6, 0xAA)
 
-#define INTEL_ARROWLAKE_H		IFM(6, 0xC5)
+#define INTEL_ARROWLAKE_H		IFM(6, 0xC5) /* Lion Cove / Skymont */
 #define INTEL_ARROWLAKE			IFM(6, 0xC6)
 #define INTEL_ARROWLAKE_U		IFM(6, 0xB5)
 
-#define INTEL_LUNARLAKE_M		IFM(6, 0xBD)
+#define INTEL_LUNARLAKE_M		IFM(6, 0xBD) /* Lion Cove / Skymont */
+
+#define INTEL_PANTHERLAKE_L		IFM(6, 0xCC) /* Cougar Cove / Darkmont */
+
+#define INTEL_WILDCATLAKE_L		IFM(6, 0xD5)
+
+#define INTEL_NOVALAKE			IFM(18, 0x01) /* Coyote Cove / Arctic Wolf */
+#define INTEL_NOVALAKE_L		IFM(18, 0x03) /* Coyote Cove / Arctic Wolf */
 
 /* "Small Core" Processors (Atom/E-Core) */
 
@@ -152,9 +174,9 @@
 #define INTEL_ATOM_SILVERMONT		IFM(6, 0x37) /* Bay Trail, Valleyview */
 #define INTEL_ATOM_SILVERMONT_D		IFM(6, 0x4D) /* Avaton, Rangely */
 #define INTEL_ATOM_SILVERMONT_MID	IFM(6, 0x4A) /* Merriefield */
+#define INTEL_ATOM_SILVERMONT_MID2	IFM(6, 0x5A) /* Anniedale */
 
 #define INTEL_ATOM_AIRMONT		IFM(6, 0x4C) /* Cherry Trail, Braswell */
-#define INTEL_ATOM_AIRMONT_MID		IFM(6, 0x5A) /* Moorefield */
 #define INTEL_ATOM_AIRMONT_NP		IFM(6, 0x75) /* Lightning Mountain */
 
 #define INTEL_ATOM_GOLDMONT		IFM(6, 0x5C) /* Apollo Lake */
@@ -179,8 +201,32 @@
 #define INTEL_XEON_PHI_KNL		IFM(6, 0x57) /* Knights Landing */
 #define INTEL_XEON_PHI_KNM		IFM(6, 0x85) /* Knights Mill */
 
-/* Family 5 */
-#define INTEL_FAM5_QUARK_X1000		0x09 /* Quark X1000 SoC */
-#define INTEL_QUARK_X1000		IFM(5, 0x09) /* Quark X1000 SoC */
+/* Notational marker denoting the last Family 6 model */
+#define INTEL_FAM6_LAST			IFM(6, 0xFF)
+
+/* Family 15 - NetBurst */
+#define INTEL_P4_WILLAMETTE		IFM(15, 0x01) /* Also Xeon Foster */
+#define INTEL_P4_PRESCOTT		IFM(15, 0x03)
+#define INTEL_P4_PRESCOTT_2M		IFM(15, 0x04)
+#define INTEL_P4_CEDARMILL		IFM(15, 0x06) /* Also Xeon Dempsey */
+
+/*
+ * Intel CPU core types
+ *
+ * CPUID.1AH.EAX[31:0] uniquely identifies the microarchitecture
+ * of the core. Bits 31-24 indicates its core type (Core or Atom)
+ * and Bits [23:0] indicates the native model ID of the core.
+ * Core type and native model ID are defined in below enumerations.
+ */
+enum intel_cpu_type {
+	INTEL_CPU_TYPE_UNKNOWN,
+	INTEL_CPU_TYPE_ATOM = 0x20,
+	INTEL_CPU_TYPE_CORE = 0x40,
+};
+
+enum intel_native_id {
+	INTEL_ATOM_CMT_NATIVE_ID = 0x2,  /* Crestmont */
+	INTEL_ATOM_SKT_NATIVE_ID = 0x3,  /* Skymont */
+};
 
 #endif /* _ASM_X86_INTEL_FAMILY_H */

base-commit: bc23a49d13a30de06a961dfaccc4a19262fe9967
-- 
2.39.5



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Subject: Re: [PATCH] x86/vhpet: Fix sanitization of legacy IRQ route
To: Tu Dinh 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 24.11.2025 16:02, Tu Dinh wrote:
> On 24/11/2025 15:53, Jan Beulich wrote:
>> On 24.11.2025 14:43, Tu Dinh wrote:
>>> When setting a timer's config register, timer_sanitize_int_route will
>>> always reset the IRQ route value to what's valid corresponding to the
>>> !HPET_CFG_LEGACY case. This is applied even if the HPET is set to
>>> HPET_CFG_LEGACY.
>>>
>>> When some operating systems (e.g. Windows) try to write to a timer
>>> config, they will verify and rewrite the register if the values don't
>>> match what they expect. This causes an unnecessary write to HPET_Tn_CFG.
>>>
>>> Note, the HPET specification states that for the Tn_INT_ROUTE_CNF field:
>>>
>>> "If the value is not supported by this prarticular timer, then the value
>>> read back will not match what is written. [...] If the LegacyReplacement
>>> Route bit is set, then Timers 0 and 1 will have a different routing, and
>>> this bit field has no effect for those two timers."

According to this, ...

>>> Therefore, Xen should not reset timer_int_route if legacy mode is
>>> enabled, regardless of what's in there.
>>
>> Fixes: ec40d3fe2147 ("x86/vhpet: check that the set interrupt route is valid")
>> (I think)
> 
> Yes, thanks.
> 
>>
>>> Signed-off-by: Tu Dinh 
>>> ---
>>>   xen/arch/x86/hvm/hpet.c | 11 ++++++++---
>>>   1 file changed, 8 insertions(+), 3 deletions(-)
>>>
>>> --- a/xen/arch/x86/hvm/hpet.c
>>> +++ b/xen/arch/x86/hvm/hpet.c
>>> @@ -48,6 +48,8 @@
>>>   #define timer_is_32bit(h, n)     (timer_config(h, n) & HPET_TN_32BIT)
>>>   #define hpet_enabled(h)          ((h)->hpet.config & HPET_CFG_ENABLE)
>>>   #define timer_level(h, n)        (timer_config(h, n) & HPET_TN_LEVEL)
>>> +#define timer_is_legacy(h, n) \
>>> +    (((n) <= 1) && ((h)->hpet.config & HPET_CFG_LEGACY))
>>>   
>>>   #define timer_int_route(h, n)    MASK_EXTR(timer_config(h, n), HPET_TN_ROUTE)
>>>   
>>> @@ -244,7 +246,7 @@ static void hpet_set_timer(HPETState *h, unsigned int tn,
>>>            (timer_level(h, tn) && test_bit(tn, &h->hpet.isr)) )
>>>           return;
>>>   
>>> -    if ( !timer_int_route_valid(h, tn) )
>>> +    if ( !timer_is_legacy(h, tn) && !timer_int_route_valid(h, tn) )
>>
>> Seeing this and the other use together with timer_int_route_valid(),
>> wouldn't timer_int_route_valid() better itself invoke the new macro?
> 
> I thought about it, but I found that it was overloading the definition 
> of timer_int_route_valid a little too much. Since timer_is_legacy() is 
> being used by itself later anyway, I figured it'd be better to just 
> separate the two.

... the route setting is valid (because of being ignored) when in legacy
mode. Hence why I think the check wants integrating there.

>>> @@ -379,6 +381,9 @@ static int cf_check hpet_write(
>>>           h->hpet.config = hpet_fixup_reg(new_val, old_val,
>>>                                           HPET_CFG_ENABLE | HPET_CFG_LEGACY);
>>>   
>>> +        for ( i = 0; i < HPET_TIMER_NUM; i++ )
>>> +            timer_sanitize_int_route(h, i);
>>
>> Strictly speaking this is needed only when HPET_CFG_LEGACY went from
>> 1 to 0. Plus it's needed only on the first 2 channels, as it's only
>> there where timer_sanitize_int_route() changes behavior. I'm not going
>> to insist to limit it like this, but if you don't, then I'd like to ask
>> for a comment here clarifying that excess work is done for simplicity's
>> sake.
> 
> Agreed, I can limit it to i <= 1.

May I ask that you avoid such open-coding and use timer_is_legacy(h, i) as
the loop continuation expression instead?

Jan


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Subject: Re: [PATCH v9 00/10] x86emul: misc additions
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
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I screwed up in two ways here: As the cover letter, this is 00/10, and ...

On 24.11.2025 15:56, Jan Beulich wrote:
> 01: x86emul: support LKGS
> 02: x86emul+VMX: support {RD,WR}MSRLIST
> 03: x86emul: support USER_MSR instructions
> 04: x86/cpu-policy: re-arrange no-VMX logic
> 05: VMX: support USER_MSR
> 06: VMX: support MSR-IMM
> 07: x86emul: support MSR_IMM instructions

... the order of 06 and 07 are the wrong way round here.

Jan

> 08: x86emul: support non-SIMD MOVRS
> 09: x86: use / "support" UDB
> 10: x86emul: support AVX512-BMM
> 
> Jan



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On 24/11/2025 15:53, Jan Beulich wrote:
> On 24.11.2025 14:43, Tu Dinh wrote:
>> When setting a timer's config register, timer_sanitize_int_route will
>> always reset the IRQ route value to what's valid corresponding to the
>> !HPET_CFG_LEGACY case. This is applied even if the HPET is set to
>> HPET_CFG_LEGACY.
>>
>> When some operating systems (e.g. Windows) try to write to a timer
>> config, they will verify and rewrite the register if the values don't
>> match what they expect. This causes an unnecessary write to HPET_Tn_CFG.
>>
>> Note, the HPET specification states that for the Tn_INT_ROUTE_CNF field:
>>
>> "If the value is not supported by this prarticular timer, then the value
>> read back will not match what is written. [...] If the LegacyReplacement
>> Route bit is set, then Timers 0 and 1 will have a different routing, and
>> this bit field has no effect for those two timers."
>>
>> Therefore, Xen should not reset timer_int_route if legacy mode is
>> enabled, regardless of what's in there.
> 
> Fixes: ec40d3fe2147 ("x86/vhpet: check that the set interrupt route is valid")
> (I think)

Yes, thanks.

> 
>> Signed-off-by: Tu Dinh 
>> ---
>>   xen/arch/x86/hvm/hpet.c | 11 ++++++++---
>>   1 file changed, 8 insertions(+), 3 deletions(-)
>>
>> --- a/xen/arch/x86/hvm/hpet.c
>> +++ b/xen/arch/x86/hvm/hpet.c
>> @@ -48,6 +48,8 @@
>>   #define timer_is_32bit(h, n)     (timer_config(h, n) & HPET_TN_32BIT)
>>   #define hpet_enabled(h)          ((h)->hpet.config & HPET_CFG_ENABLE)
>>   #define timer_level(h, n)        (timer_config(h, n) & HPET_TN_LEVEL)
>> +#define timer_is_legacy(h, n) \
>> +    (((n) <= 1) && ((h)->hpet.config & HPET_CFG_LEGACY))
>>   
>>   #define timer_int_route(h, n)    MASK_EXTR(timer_config(h, n), HPET_TN_ROUTE)
>>   
>> @@ -244,7 +246,7 @@ static void hpet_set_timer(HPETState *h, unsigned int tn,
>>            (timer_level(h, tn) && test_bit(tn, &h->hpet.isr)) )
>>           return;
>>   
>> -    if ( !timer_int_route_valid(h, tn) )
>> +    if ( !timer_is_legacy(h, tn) && !timer_int_route_valid(h, tn) )
> 
> Seeing this and the other use together with timer_int_route_valid(),
> wouldn't timer_int_route_valid() better itself invoke the new macro?

I thought about it, but I found that it was overloading the definition 
of timer_int_route_valid a little too much. Since timer_is_legacy() is 
being used by itself later anyway, I figured it'd be better to just 
separate the two.

> 
>> @@ -379,6 +381,9 @@ static int cf_check hpet_write(
>>           h->hpet.config = hpet_fixup_reg(new_val, old_val,
>>                                           HPET_CFG_ENABLE | HPET_CFG_LEGACY);
>>   
>> +        for ( i = 0; i < HPET_TIMER_NUM; i++ )
>> +            timer_sanitize_int_route(h, i);
> 
> Strictly speaking this is needed only when HPET_CFG_LEGACY went from
> 1 to 0. Plus it's needed only on the first 2 channels, as it's only
> there where timer_sanitize_int_route() changes behavior. I'm not going
> to insist to limit it like this, but if you don't, then I'd like to ask
> for a comment here clarifying that excess work is done for simplicity's
> sake.

Agreed, I can limit it to i <= 1.

I'll prepare a v2.

> 
> Jan
> 



--
Ngoc Tu Dinh | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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From: "Tu Dinh" 
Subject: =?utf-8?Q?Re:=20[PATCH]=20x86/vhpet:=20Fix=20sanitization=20of=20legacy=20IRQ=20route?=
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To: "Jan Beulich" 
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On 24/11/2025 16:09, Jan Beulich wrote:
> On 24.11.2025 16:02, Tu Dinh wrote:
>> On 24/11/2025 15:53, Jan Beulich wrote:
>>> On 24.11.2025 14:43, Tu Dinh wrote:
>>>> When setting a timer's config register, timer_sanitize_int_route will
>>>> always reset the IRQ route value to what's valid corresponding to the
>>>> !HPET_CFG_LEGACY case. This is applied even if the HPET is set to
>>>> HPET_CFG_LEGACY.
>>>>
>>>> When some operating systems (e.g. Windows) try to write to a timer
>>>> config, they will verify and rewrite the register if the values don't
>>>> match what they expect. This causes an unnecessary write to HPET_Tn_CFG.
>>>>
>>>> Note, the HPET specification states that for the Tn_INT_ROUTE_CNF field:
>>>>
>>>> "If the value is not supported by this prarticular timer, then the value
>>>> read back will not match what is written. [...] If the LegacyReplacement
>>>> Route bit is set, then Timers 0 and 1 will have a different routing, and
>>>> this bit field has no effect for those two timers."
> 
> According to this, ...
> 
>>>> Therefore, Xen should not reset timer_int_route if legacy mode is
>>>> enabled, regardless of what's in there.
>>>
>>> Fixes: ec40d3fe2147 ("x86/vhpet: check that the set interrupt route is valid")
>>> (I think)
>>
>> Yes, thanks.
>>
>>>
>>>> Signed-off-by: Tu Dinh 
>>>> ---
>>>>    xen/arch/x86/hvm/hpet.c | 11 ++++++++---
>>>>    1 file changed, 8 insertions(+), 3 deletions(-)
>>>>
>>>> --- a/xen/arch/x86/hvm/hpet.c
>>>> +++ b/xen/arch/x86/hvm/hpet.c
>>>> @@ -48,6 +48,8 @@
>>>>    #define timer_is_32bit(h, n)     (timer_config(h, n) & HPET_TN_32BIT)
>>>>    #define hpet_enabled(h)          ((h)->hpet.config & HPET_CFG_ENABLE)
>>>>    #define timer_level(h, n)        (timer_config(h, n) & HPET_TN_LEVEL)
>>>> +#define timer_is_legacy(h, n) \
>>>> +    (((n) <= 1) && ((h)->hpet.config & HPET_CFG_LEGACY))
>>>>    
>>>>    #define timer_int_route(h, n)    MASK_EXTR(timer_config(h, n), HPET_TN_ROUTE)
>>>>    
>>>> @@ -244,7 +246,7 @@ static void hpet_set_timer(HPETState *h, unsigned int tn,
>>>>             (timer_level(h, tn) && test_bit(tn, &h->hpet.isr)) )
>>>>            return;
>>>>    
>>>> -    if ( !timer_int_route_valid(h, tn) )
>>>> +    if ( !timer_is_legacy(h, tn) && !timer_int_route_valid(h, tn) )
>>>
>>> Seeing this and the other use together with timer_int_route_valid(),
>>> wouldn't timer_int_route_valid() better itself invoke the new macro?
>>
>> I thought about it, but I found that it was overloading the definition
>> of timer_int_route_valid a little too much. Since timer_is_legacy() is
>> being used by itself later anyway, I figured it'd be better to just
>> separate the two.
> 
> ... the route setting is valid (because of being ignored) when in legacy
> mode. Hence why I think the check wants integrating there.

Okay, I can offload the check there.

> 
>>>> @@ -379,6 +381,9 @@ static int cf_check hpet_write(
>>>>            h->hpet.config = hpet_fixup_reg(new_val, old_val,
>>>>                                            HPET_CFG_ENABLE | HPET_CFG_LEGACY);
>>>>    
>>>> +        for ( i = 0; i < HPET_TIMER_NUM; i++ )
>>>> +            timer_sanitize_int_route(h, i);
>>>
>>> Strictly speaking this is needed only when HPET_CFG_LEGACY went from
>>> 1 to 0. Plus it's needed only on the first 2 channels, as it's only
>>> there where timer_sanitize_int_route() changes behavior. I'm not going
>>> to insist to limit it like this, but if you don't, then I'd like to ask
>>> for a comment here clarifying that excess work is done for simplicity's
>>> sake.
>>
>> Agreed, I can limit it to i <= 1.
> 
> May I ask that you avoid such open-coding and use timer_is_legacy(h, i) as
> the loop continuation expression instead?

That wouldn't work as timer_is_legacy would check for hpet.config & 
HPET_CFG_LEGACY, whereas we want to sanitize in the opposite case, i.e. 
!(hpet.config & HPET_CFG_LEGACY).

It's probably better to use i < HPET_TIMER_NUM and add a comment as you 
suggested.

> 
> Jan



--
Ngoc Tu Dinh | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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On 24.11.2025 16:08, Andrew Cooper wrote:
> Signed-off-by: Andrew Cooper 

Acked-by: Jan Beulich 

> I'm unsure about the Intel CPU Core types, but it's probably better to keep
> them than strip them from our copy.

Did you mean "pre-Core" here? In any event, as we're meaning to stay in sync,
we can as well do so properly.

> @@ -152,9 +174,9 @@
>  #define INTEL_ATOM_SILVERMONT		IFM(6, 0x37) /* Bay Trail, Valleyview */
>  #define INTEL_ATOM_SILVERMONT_D		IFM(6, 0x4D) /* Avaton, Rangely */
>  #define INTEL_ATOM_SILVERMONT_MID	IFM(6, 0x4A) /* Merriefield */
> +#define INTEL_ATOM_SILVERMONT_MID2	IFM(6, 0x5A) /* Anniedale */
>  
>  #define INTEL_ATOM_AIRMONT		IFM(6, 0x4C) /* Cherry Trail, Braswell */
> -#define INTEL_ATOM_AIRMONT_MID		IFM(6, 0x5A) /* Moorefield */

Interesting, there's one entry changing the group it belongs to. We don't
use the constant anywhere, so right now this is purely a cosmetic change.

Jan


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Subject: Re: [PATCH v3 1/4] build: add make macro for making file from file.in
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Cc: Andrew Cooper ,
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On 24.11.2025 15:58, Jürgen Groß wrote:
> On 24.11.25 15:30, Jan Beulich wrote:
>> On 24.11.2025 13:45, Jürgen Groß wrote:
>>> On 24.11.25 13:18, Jan Beulich wrote:
>>>> On 24.11.2025 12:27, Juergen Gross wrote:
>>>>> On 24.11.25 12:15, Jan Beulich wrote:
>>>>>> On 24.11.2025 12:05, Jürgen Groß wrote:
>>>>>>> On 24.11.25 11:41, Jan Beulich wrote:
>>>>>>>> On 21.11.2025 14:23, Juergen Gross wrote:
>>>>>>>>> --- a/Config.mk
>>>>>>>>> +++ b/Config.mk
>>>>>>>>> @@ -159,6 +159,19 @@ define move-if-changed
>>>>>>>>>      	if ! cmp -s $(1) $(2); then mv -f $(1) $(2); else rm -f $(1); fi
>>>>>>>>>      endef
>>>>>>>>>      
>>>>>>>>> +PATH_FILES := Paths
>>>>>>>>> +INC_FILES = $(foreach f, $(PATH_FILES), $(XEN_ROOT)/config/$(f).mk)
>>>>>>>>> +
>>>>>>>>> +include $(INC_FILES)
>>>>>>>>> +
>>>>>>>>> +BUILD_MAKE_VARS = $(foreach f, $(PATH_FILES), $(shell awk '$$2 == ":=" { print $$1; }' $(XEN_ROOT)/config/$(f).mk.in))
>>>>>>>>
>>>>>>>> Feels like my prior comments weren't really addressed. I continue to think that
>>>>>>>> none of the above is part of what the subject says.
>>>>>>>
>>>>>>> I really don't understand your concern here.
>>>>>>>
>>>>>>> For replacing the @markers@ make needs to know what should be replaced.
>>>>>>> So it needs to scan the files containing the markers and gather them.
>>>>>>> This is what is done above.
>>>>>>>
>>>>>>> In the final macro below the replacements are done then. How would you
>>>>>>> handle that?
>>>>>>
>>>>>> By passing (another) argument to the macro, for example. As indicated
>>>>>> earlier, different sub-trees may have different places where these
>>>>>> definitions live, and they would want to be able to pass that in
>>>>>> (ideally without needing to put this in a common part of the tree).
>>>>>
>>>>> I don't get what you want to pass in additionally.
>>>>>
>>>>> I've already changed the macro and the Makefiles to be able to add another
>>>>> marker file to the PATH_FILES variable. What else do you need?
>>>>
>>>> Well, that's simply an odd way of passing a parameter. Plus, the extra file
>>>
>>> We do that all the times, e.g. by "OBJ-y += ..."
>>
>> That's sufficiently different though: Accumulating the set of objects to
>> produce is kind of naturally done that way.
>>
>>>> won't affect INC_FILES, or more precisely its use in the include directive
>>>> in patch 1: At least aiui, $(INC_FILES) is expanded at the point when the
>>>> directive is processed. Hence why you need to open-code another include
>>>> there.
>>>
>>> The INC_FILES variable is mostly needed for specifying the dependence of
>>> the generated files on the files mentioned in PATH_FILES.
>>>
>>> It might be better to just have "-include $(XEN_ROOT/config/Paths.mk" in
>>> Config.mk, matching the setting of PATH_FILES there.
>>
>> Looking at this the 3rd or 4th time now, I still don't quite get why the
>> include is needed in the first place. You don't mean to use (right here)
>> any of the settings the file produces, do you? Really, as also mentioned
>> by Andrew, you really can't, because in a pure hypervisor build the file
>> wouldn't have been made, as no configure would have run.
>>
>> If I'm not mistaken, you really need those values only at the time you
>> execute the rule. And I'm worried of these definitions to collide with
>> something else. Hence one desire would be to limit the scope of these
>> variables to just the new rule. Maybe something like
>>
>> # Replace @xxx@ markers in $(1).in with $(xxx) variable contents, write to $(1)
>> define apply-build-vars
>> $(1): $$(shell grep -h := $$(wildcard $$(INC_FILES)) /dev/null)
>> $(1): $(1).in $$(INC_FILES)
>> 	sed $$(foreach v, $$(BUILD_MAKE_VARS), -e 's#@$$(v)@#$$($$(v))#g') <$$< >$$@
>> endef
>>
>> could work? (This likely depends on INC_FILES to only list files which
>> are configure generated, i.e. wouldn't be updated by a make rule.)
> 
> And who is setting BUILD_MAKE_VARS? You didn't think the snippet doing that
> should be there.

I didn't mean to replace how that's done (albeit, as indicated earlier, I
think it wants doing differently). Hence I've only shown the sketch of the
updated macro wrt the specific aspect above. (Or am I misunderstanding
your reply?)

> And TBH: any setting from Paths.mk colliding with something else would
> _really_ be worrying.

No, why? Those settings should all be fine to use in e.g. the hypervisor
build system, for whatever purpose.

Jan


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Date: Mon, 24 Nov 2025 15:44:22 +0000
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Subject: Re: [PATCH] x86/intel: Resync intel-family.h
To: Jan Beulich 
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 Kevin Lampis ,
 Xen-devel 
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On 24/11/2025 3:17 pm, Jan Beulich wrote:
> On 24.11.2025 16:08, Andrew Cooper wrote:
>> Signed-off-by: Andrew Cooper 
> Acked-by: Jan Beulich 

Thanks.

>
>> I'm unsure about the Intel CPU Core types, but it's probably better to keep
>> them than strip them from our copy.
> Did you mean "pre-Core" here? In any event, as we're meaning to stay in sync,
> we can as well do so properly.

No, I mean the enum's at the bottom.

>
>> @@ -152,9 +174,9 @@
>>  #define INTEL_ATOM_SILVERMONT		IFM(6, 0x37) /* Bay Trail, Valleyview */
>>  #define INTEL_ATOM_SILVERMONT_D		IFM(6, 0x4D) /* Avaton, Rangely */
>>  #define INTEL_ATOM_SILVERMONT_MID	IFM(6, 0x4A) /* Merriefield */
>> +#define INTEL_ATOM_SILVERMONT_MID2	IFM(6, 0x5A) /* Anniedale */
>>  
>>  #define INTEL_ATOM_AIRMONT		IFM(6, 0x4C) /* Cherry Trail, Braswell */
>> -#define INTEL_ATOM_AIRMONT_MID		IFM(6, 0x5A) /* Moorefield */
> Interesting, there's one entry changing the group it belongs to. We don't
> use the constant anywhere, so right now this is purely a cosmetic change.

Christian did some archaeology, and concluded that it was misclassified
originally.

~Andrew


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Subject: Re: [PATCH v2 13/15] error: Use error_setg_errno() for simplicity and
 consistency
Thread-Topic: [PATCH v2 13/15] error: Use error_setg_errno() for simplicity
 and consistency
Thread-Index: AQHcWuB2LPeG7KSVmkuHxGYziHJsabUB/rMA
Date: Mon, 24 Nov 2025 15:51:53 +0000
Message-ID: <373449D8-D359-49EA-83FF-9AC09B41DDC3@oracle.com>
References: <20251121121438.1249498-1-armbru@redhat.com>
 <20251121121438.1249498-14-armbru@redhat.com>
In-Reply-To: <20251121121438.1249498-14-armbru@redhat.com>
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Subject: Re: [PATCH] x86: Remove x86 prefixed names from cpuinfo for intel.c
To: Kevin Lampis 
Cc: andrew.cooper3@citrix.com, roger.pau@citrix.com,
 xen-devel@lists.xenproject.org
References: <20251124111942.1325635-1-kevin.lampis@citrix.com>
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From: Jan Beulich 
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On 24.11.2025 12:19, Kevin Lampis wrote:
> struct cpuinfo_x86
>   .x86        => .family
>   .x86_vendor => .vendor
>   .x86_model  => .model
>   .x86_mask   => .stepping
> 
> No functional change.
> 
> Signed-off-by: Kevin Lampis 

Reviewed-by: Jan Beulich 
with a few nits (can likely be taken care of while committing):

> @@ -458,7 +458,7 @@ static void Intel_errata_workarounds(struct cpuinfo_x86 *c)
>  {
>  	uint64_t val;
>  
> -	if ((c->x86 == 15) && (c->x86_model == 1) && (c->x86_mask == 1)) {
> +	if ( c->vfm == INTEL_P4_WILLAMETTE && c->stepping == 1 ) {

If already you do adjustments towards Xen style, the figure brace also wants
moving.

> @@ -657,9 +659,11 @@ static void cf_check init_intel(struct cpuinfo_x86 *c)
>  	/* Work around errata */
>  	Intel_errata_workarounds(c);
>  
> -	if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
> -		(c->x86 == 0x6 && c->x86_model >= 0x0e))
> +	if ((c->family == 0xf && c->model >= 0x03) ||
> +		(c->family == 0x6 && c->model >= 0x0e))

Bogus indentation would also want adjusting while touching the line, and ...

> +	{
>  		__set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
> +	}

... I don't see why figure braces would need adding here.

> --- a/xen/arch/x86/include/asm/intel-family.h
> +++ b/xen/arch/x86/include/asm/intel-family.h
> @@ -179,6 +179,10 @@
>  #define INTEL_XEON_PHI_KNL		IFM(6, 0x57) /* Knights Landing */
>  #define INTEL_XEON_PHI_KNM		IFM(6, 0x85) /* Knights Mill */
>  
> +/* Family 15 - NetBurst */
> +#define INTEL_P4_WILLAMETTE		IFM(15, 0x01) /* Also Xeon Foster */
> +#define INTEL_P4_PRESCOTT		IFM(15, 0x03)

For this likely Andrew's wider patch may want to go in first, so this part
could then be dropped.

Jan


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Date: Mon, 24 Nov 2025 18:15:43 +0100
From: Nicola Vetrini 
To: Stefano Stabellini 
Cc: xen-devel@lists.xenproject.org, consulting@bugseng.com, Doug Goldstein
 
Subject: Re: [XEN PATCH v4] automation/eclair: add new analysis jobs with
 differing configurations
In-Reply-To: 
References: <6244858973ae88195405630b4a6847085ffce638.1762198392.git.nicola.vetrini@bugseng.com>
 
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On 2025-11-03 23:52, Stefano Stabellini wrote:
> On Mon, 3 Nov 2025, Nicola Vetrini wrote:
>> The following analysis jobs are performed:
>> - eclair-{x86_64,ARM64}: analyze Xen using the default configuration 
>> for
>>   that architecture; runs on runners tagged `eclair-analysis'.
>> 
>> - eclair-{x86-64,ARM64}-safety: analyze Xen using the configuration 
>> for
>>   safety, which is more restricted; runs on runners tagged
>>   `eclair-analysis-safety`.
>> 
>> - eclair-{x86_64,ARM64}-testing: analyze Xen using the default
>>   configuration for the purposes of testing new runner updates; runs 
>> on
>>   runners tagged `eclair-analysis-testing`.
>> 
>> Signed-off-by: Nicola Vetrini 
> 
> Reviewed-by: Stefano Stabellini 
> 
> I'll commit it as soon as the tree reopens.
> 

Hi Stefano,

could you merge the change or do you want me to rebase? (there should be 
no conflicts however)

Thanks


-- 
Nicola Vetrini, B.Sc.
Software Engineer
BUGSENG (https://bugseng.com)
LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253


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Date: Mon, 24 Nov 2025 20:44:02 +0000
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Subject: Re: [PATCH] x86: Remove x86 prefixed names from cpuinfo for intel.c
To: Kevin Lampis , xen-devel@lists.xenproject.org
Cc: jbeulich@suse.com, roger.pau@citrix.com
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On 24/11/2025 11:19 am, Kevin Lampis wrote:
> diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c
> index 6f71365b7e..5f780fe1aa 100644
> --- a/xen/arch/x86/cpu/intel.c
> +++ b/xen/arch/x86/cpu/intel.c
> @@ -86,7 +86,7 @@ static void __init check_memory_type_self_snoop_errata(void)
>  	if (!boot_cpu_has(X86_FEATURE_SS))
>  		return;
>  
> -	switch (boot_cpu_data.x86_model) {
> +	switch (boot_cpu_data.model) {
>  	case 0x0f: /* Merom */
>  	case 0x16: /* Merom L */
>  	case 0x17: /* Penryn */

One of the reasons of making these changes is identify the places
needing converting to VFM.  This is one, and...
> @@ -137,10 +137,10 @@ static void __init probe_masking_msrs(void)
>  	unsigned int exp_msr_basic, exp_msr_ext, exp_msr_xsave;
>  
>  	/* Only family 6 supports this feature. */
> -	if (c->x86 != 6)
> +	if (c->family != 6)
>  		return;
>  
> -	switch (c->x86_model) {
> +	switch (c->model) {

... so is this.

~Andrew


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From: Jason Andryuk 
To: 
CC: Jason Andryuk , Juergen Gross ,
	Julien Grall , Anthony PERARD 
Subject: [XEN][PATCH 1/2] xenstored: Default priv_domid to store_domid
Date: Mon, 24 Nov 2025 17:35:32 -0500
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On a system without a control domain, a hardware|xenstore domain
starting xenstored shows:
common/grant_table.c:1041:d2v0 Could not find domain 32756
gnttab: error: mmap failed: Invalid argument
Could not initialize dom32756

setup_structure() does not get called without priv_domid.  Subsequent
introduce_domain() calls will fault when calling fire_special_watches().

Default priv_domid to store_domid when there is no control domain.

Fixes: e5b0a9405571 ("tools/xenstored: Auto-introduce domains")
Signed-off-by: Jason Andryuk 
---
I didn't verify the segfault in fire_watches() in this situation, but I
saw that previously when working on this.  Regardless of the specific
error, xenstored was not working properly without this change.
---
 tools/xenstored/domain.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/tools/xenstored/domain.c b/tools/xenstored/domain.c
index 5ce539d640..d504e9994b 100644
--- a/tools/xenstored/domain.c
+++ b/tools/xenstored/domain.c
@@ -1388,6 +1388,12 @@ void init_domains(void)
 	if (store_domid == DOMID_INVALID)
 		barf("Could not determine xenstore domid\n");
 
+	if (priv_domid == DOMID_INVALID)
+	{
+		priv_domid = store_domid;
+		xprintf("priv_domid defaulted to %u\n", priv_domid);
+	}
+
 	snprintf(store_domain_path, sizeof(store_domain_path),
 		 "/local/domain/%u", store_domid);
 
-- 
2.51.1



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From: Jason Andryuk 
To: 
CC: Jason Andryuk , Juergen Gross ,
	Julien Grall , Anthony PERARD 
Subject: [XEN][PATCH 2/2] xenstored: Add newline to error message
Date: Mon, 24 Nov 2025 17:35:33 -0500
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Unlike barf(), xprintf() does not add a newline.  Add one.

Fixes: e5b0a9405571 ("tools/xenstored: Auto-introduce domains")
Signed-off-by: Jason Andryuk 
---
 tools/xenstored/domain.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/xenstored/domain.c b/tools/xenstored/domain.c
index d504e9994b..10ac1c1a8f 100644
--- a/tools/xenstored/domain.c
+++ b/tools/xenstored/domain.c
@@ -1333,7 +1333,7 @@ static bool init_domain(unsigned int domid)
 
 	domain = introduce_domain(NULL, domid, port, false);
 	if (!domain) {
-		xprintf("Could not initialize dom%u", domid);
+		xprintf("Could not initialize dom%u\n", domid);
 		return false;
 	}
 
-- 
2.51.1



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From: Jason Andryuk 
To: 
CC: Jason Andryuk , Juergen Gross ,
	Julien Grall , Anthony PERARD 
Subject: [XEN][PATCH 0/2] xenstored fixes
Date: Mon, 24 Nov 2025 17:35:31 -0500
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A fix for running xenstored without a control domain, and the addition
of a missing newline.

Jason Andryuk (2):
  xenstored: Default priv_domid to store_domid
  xenstored: Add newline to error message

 tools/xenstored/domain.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

-- 
2.51.1



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Message-ID: <7984cbbd-905e-4e03-84fa-1cc2a1261a80@linaro.org>
Date: Tue, 25 Nov 2025 07:15:37 +0100
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Subject: Re: [PATCH v2 01/15] error: Strip trailing '\n' from error string
 arguments (again)
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To: Markus Armbruster , qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com, zhenwei.pi@linux.dev, alistair.francis@wdc.com,
 stefanb@linux.vnet.ibm.com, kwolf@redhat.com, hreitz@redhat.com,
 sw@weilnetz.de, qemu_oss@crudebyte.com, groug@kaod.org, mst@redhat.com,
 imammedo@redhat.com, anisinha@redhat.com, kraxel@redhat.com,
 shentey@gmail.com, npiggin@gmail.com, harshpb@linux.ibm.com,
 sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
 edgar.iglesias@gmail.com, elena.ufimtseva@oracle.com, jag.raman@oracle.com,
 sgarzare@redhat.com, pbonzini@redhat.com, fam@euphon.net, alex@shazbot.org,
 clg@redhat.com, peterx@redhat.com, farosas@suse.de, lizhijian@fujitsu.com,
 dave@treblig.org, jasowang@redhat.com, samuel.thibault@ens-lyon.org,
 michael.roth@amd.com, kkostiuk@redhat.com, zhao1.liu@intel.com,
 mtosatti@redhat.com, rathc@linux.ibm.com, palmer@dabbelt.com,
 liwei1518@gmail.com, dbarboza@ventanamicro.com,
 zhiwei_liu@linux.alibaba.com, marcandre.lureau@redhat.com,
 qemu-block@nongnu.org, qemu-ppc@nongnu.org, xen-devel@lists.xenproject.org,
 kvm@vger.kernel.org, qemu-riscv@nongnu.org
References: <20251121121438.1249498-1-armbru@redhat.com>
 <20251121121438.1249498-2-armbru@redhat.com>
From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= 
In-Reply-To: <20251121121438.1249498-2-armbru@redhat.com>
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On 21/11/25 13:14, Markus Armbruster wrote:
> Tracked down with scripts/coccinelle/err-bad-newline.cocci.
> 
> Signed-off-by: Markus Armbruster 
> ---
>   hw/audio/es1370.c | 2 +-
>   ui/gtk.c          | 2 +-
>   2 files changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé 



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Date: Tue, 25 Nov 2025 07:16:57 +0100
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Subject: Re: [PATCH v2 04/15] tap-solaris: Use error_setg_file_open() for
 better error messages
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To: Markus Armbruster , qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com, zhenwei.pi@linux.dev, alistair.francis@wdc.com,
 stefanb@linux.vnet.ibm.com, kwolf@redhat.com, hreitz@redhat.com,
 sw@weilnetz.de, qemu_oss@crudebyte.com, groug@kaod.org, mst@redhat.com,
 imammedo@redhat.com, anisinha@redhat.com, kraxel@redhat.com,
 shentey@gmail.com, npiggin@gmail.com, harshpb@linux.ibm.com,
 sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
 edgar.iglesias@gmail.com, elena.ufimtseva@oracle.com, jag.raman@oracle.com,
 sgarzare@redhat.com, pbonzini@redhat.com, fam@euphon.net, alex@shazbot.org,
 clg@redhat.com, peterx@redhat.com, farosas@suse.de, lizhijian@fujitsu.com,
 dave@treblig.org, jasowang@redhat.com, samuel.thibault@ens-lyon.org,
 michael.roth@amd.com, kkostiuk@redhat.com, zhao1.liu@intel.com,
 mtosatti@redhat.com, rathc@linux.ibm.com, palmer@dabbelt.com,
 liwei1518@gmail.com, dbarboza@ventanamicro.com,
 zhiwei_liu@linux.alibaba.com, marcandre.lureau@redhat.com,
 qemu-block@nongnu.org, qemu-ppc@nongnu.org, xen-devel@lists.xenproject.org,
 kvm@vger.kernel.org, qemu-riscv@nongnu.org
References: <20251121121438.1249498-1-armbru@redhat.com>
 <20251121121438.1249498-5-armbru@redhat.com>
From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= 
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On 21/11/25 13:14, Markus Armbruster wrote:
> Error messages change from
> 
>      Can't open /dev/ip (actually /dev/udp)
>      Can't open /dev/tap
>      Can't open /dev/tap (2)
> 
> to
> 
>      Could not open '/dev/udp': REASON
>      Could not open '/dev/tap': REASON
> 
> where REASON is the value of strerror(errno).
> 
> Signed-off-by: Markus Armbruster 
> Reviewed-by: Dr. David Alan Gilbert 
> ---
>   net/tap-solaris.c | 6 +++---
>   1 file changed, 3 insertions(+), 3 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé 



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MIME-Version: 1.0
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Subject: Re: [PATCH v2 06/15] hw/scsi: Use error_setg_file_open() for a better
 error message
Content-Language: en-US
To: Markus Armbruster , qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com, zhenwei.pi@linux.dev, alistair.francis@wdc.com,
 stefanb@linux.vnet.ibm.com, kwolf@redhat.com, hreitz@redhat.com,
 sw@weilnetz.de, qemu_oss@crudebyte.com, groug@kaod.org, mst@redhat.com,
 imammedo@redhat.com, anisinha@redhat.com, kraxel@redhat.com,
 shentey@gmail.com, npiggin@gmail.com, harshpb@linux.ibm.com,
 sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
 edgar.iglesias@gmail.com, elena.ufimtseva@oracle.com, jag.raman@oracle.com,
 sgarzare@redhat.com, pbonzini@redhat.com, fam@euphon.net, alex@shazbot.org,
 clg@redhat.com, peterx@redhat.com, farosas@suse.de, lizhijian@fujitsu.com,
 dave@treblig.org, jasowang@redhat.com, samuel.thibault@ens-lyon.org,
 michael.roth@amd.com, kkostiuk@redhat.com, zhao1.liu@intel.com,
 mtosatti@redhat.com, rathc@linux.ibm.com, palmer@dabbelt.com,
 liwei1518@gmail.com, dbarboza@ventanamicro.com,
 zhiwei_liu@linux.alibaba.com, marcandre.lureau@redhat.com,
 qemu-block@nongnu.org, qemu-ppc@nongnu.org, xen-devel@lists.xenproject.org,
 kvm@vger.kernel.org, qemu-riscv@nongnu.org
References: <20251121121438.1249498-1-armbru@redhat.com>
 <20251121121438.1249498-7-armbru@redhat.com>
From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= 
In-Reply-To: <20251121121438.1249498-7-armbru@redhat.com>
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On 21/11/25 13:14, Markus Armbruster wrote:
> The error message changes from
> 
>      vhost-scsi: open vhost char device failed: REASON
> 
> to
> 
>      Could not open '/dev/vhost-scsi': REASON
> 
> I think the exact file name is more useful to know than the file's
> purpose.
> 
> We could put back the "vhost-scsi: " prefix with error_prepend().  Not
> worth the bother.
> 
> Signed-off-by: Markus Armbruster 
> Reviewed-by: Dr. David Alan Gilbert 
> ---
>   hw/scsi/vhost-scsi.c | 3 +--
>   1 file changed, 1 insertion(+), 2 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé 



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Date: Tue, 25 Nov 2025 07:19:02 +0100
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Subject: Re: [PATCH v2 07/15] hw/virtio: Use error_setg_file_open() for a
 better error message
Content-Language: en-US
To: Markus Armbruster , qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com, zhenwei.pi@linux.dev, alistair.francis@wdc.com,
 stefanb@linux.vnet.ibm.com, kwolf@redhat.com, hreitz@redhat.com,
 sw@weilnetz.de, qemu_oss@crudebyte.com, groug@kaod.org, mst@redhat.com,
 imammedo@redhat.com, anisinha@redhat.com, kraxel@redhat.com,
 shentey@gmail.com, npiggin@gmail.com, harshpb@linux.ibm.com,
 sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
 edgar.iglesias@gmail.com, elena.ufimtseva@oracle.com, jag.raman@oracle.com,
 sgarzare@redhat.com, pbonzini@redhat.com, fam@euphon.net, alex@shazbot.org,
 clg@redhat.com, peterx@redhat.com, farosas@suse.de, lizhijian@fujitsu.com,
 dave@treblig.org, jasowang@redhat.com, samuel.thibault@ens-lyon.org,
 michael.roth@amd.com, kkostiuk@redhat.com, zhao1.liu@intel.com,
 mtosatti@redhat.com, rathc@linux.ibm.com, palmer@dabbelt.com,
 liwei1518@gmail.com, dbarboza@ventanamicro.com,
 zhiwei_liu@linux.alibaba.com, marcandre.lureau@redhat.com,
 qemu-block@nongnu.org, qemu-ppc@nongnu.org, xen-devel@lists.xenproject.org,
 kvm@vger.kernel.org, qemu-riscv@nongnu.org
References: <20251121121438.1249498-1-armbru@redhat.com>
 <20251121121438.1249498-8-armbru@redhat.com>
From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= 
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On 21/11/25 13:14, Markus Armbruster wrote:
> The error message changes from
> 
>      vhost-vsock: failed to open vhost device: REASON
> 
> to
> 
>      Could not open '/dev/vhost-vsock': REASON
> 
> I think the exact file name is more useful to know than the file's
> purpose.
> 
> Signed-off-by: Markus Armbruster 
> ---
>   hw/virtio/vhost-vsock.c | 3 +--
>   1 file changed, 1 insertion(+), 2 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé 



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Date: Tue, 25 Nov 2025 07:19:28 +0100
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Subject: Re: [PATCH v2 08/15] net/tap: Use error_setg_file_open() for a better
 error message
Content-Language: en-US
To: Markus Armbruster , qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com, zhenwei.pi@linux.dev, alistair.francis@wdc.com,
 stefanb@linux.vnet.ibm.com, kwolf@redhat.com, hreitz@redhat.com,
 sw@weilnetz.de, qemu_oss@crudebyte.com, groug@kaod.org, mst@redhat.com,
 imammedo@redhat.com, anisinha@redhat.com, kraxel@redhat.com,
 shentey@gmail.com, npiggin@gmail.com, harshpb@linux.ibm.com,
 sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
 edgar.iglesias@gmail.com, elena.ufimtseva@oracle.com, jag.raman@oracle.com,
 sgarzare@redhat.com, pbonzini@redhat.com, fam@euphon.net, alex@shazbot.org,
 clg@redhat.com, peterx@redhat.com, farosas@suse.de, lizhijian@fujitsu.com,
 dave@treblig.org, jasowang@redhat.com, samuel.thibault@ens-lyon.org,
 michael.roth@amd.com, kkostiuk@redhat.com, zhao1.liu@intel.com,
 mtosatti@redhat.com, rathc@linux.ibm.com, palmer@dabbelt.com,
 liwei1518@gmail.com, dbarboza@ventanamicro.com,
 zhiwei_liu@linux.alibaba.com, marcandre.lureau@redhat.com,
 qemu-block@nongnu.org, qemu-ppc@nongnu.org, xen-devel@lists.xenproject.org,
 kvm@vger.kernel.org, qemu-riscv@nongnu.org
References: <20251121121438.1249498-1-armbru@redhat.com>
 <20251121121438.1249498-9-armbru@redhat.com>
From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= 
In-Reply-To: <20251121121438.1249498-9-armbru@redhat.com>
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On 21/11/25 13:14, Markus Armbruster wrote:
> The error message changes from
> 
>      tap: open vhost char device failed
> 
> to
> 
>      Could not open '/dev/vhost-net': REASON
> 
> I think the exact file name is more useful to know than the file's
> purpose.
> 
> We could put back the "tap: " prefix with error_prepend().  Not
> worth the bother.
> 
> Signed-off-by: Markus Armbruster 
> ---
>   net/tap.c | 3 +--
>   1 file changed, 1 insertion(+), 2 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé 



From xen-devel-bounces@lists.xenproject.org Tue Nov 25 06:21:03 2025
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Date: Tue, 25 Nov 2025 07:20:54 +0100
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Subject: Re: [PATCH v2 11/15] net/slirp: Improve file open error message
Content-Language: en-US
To: Markus Armbruster , qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com, zhenwei.pi@linux.dev, alistair.francis@wdc.com,
 stefanb@linux.vnet.ibm.com, kwolf@redhat.com, hreitz@redhat.com,
 sw@weilnetz.de, qemu_oss@crudebyte.com, groug@kaod.org, mst@redhat.com,
 imammedo@redhat.com, anisinha@redhat.com, kraxel@redhat.com,
 shentey@gmail.com, npiggin@gmail.com, harshpb@linux.ibm.com,
 sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
 edgar.iglesias@gmail.com, elena.ufimtseva@oracle.com, jag.raman@oracle.com,
 sgarzare@redhat.com, pbonzini@redhat.com, fam@euphon.net, alex@shazbot.org,
 clg@redhat.com, peterx@redhat.com, farosas@suse.de, lizhijian@fujitsu.com,
 dave@treblig.org, jasowang@redhat.com, samuel.thibault@ens-lyon.org,
 michael.roth@amd.com, kkostiuk@redhat.com, zhao1.liu@intel.com,
 mtosatti@redhat.com, rathc@linux.ibm.com, palmer@dabbelt.com,
 liwei1518@gmail.com, dbarboza@ventanamicro.com,
 zhiwei_liu@linux.alibaba.com, marcandre.lureau@redhat.com,
 qemu-block@nongnu.org, qemu-ppc@nongnu.org, xen-devel@lists.xenproject.org,
 kvm@vger.kernel.org, qemu-riscv@nongnu.org
References: <20251121121438.1249498-1-armbru@redhat.com>
 <20251121121438.1249498-12-armbru@redhat.com>
From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= 
In-Reply-To: <20251121121438.1249498-12-armbru@redhat.com>
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On 21/11/25 13:14, Markus Armbruster wrote:
> This error reports failure to create a temporary file, and
> error_setg_file_open() would probably be too terse, so merely switch
> to error_setg_errno() to add errno information.
> 
> Signed-off-by: Markus Armbruster 
> ---
>   net/slirp.c | 4 +++-
>   1 file changed, 3 insertions(+), 1 deletion(-)
Reviewed-by: Philippe Mathieu-Daudé 



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Subject: Re: [PATCH v2 12/15] error: Use error_setg_errno() to improve error
 messages
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To: Markus Armbruster , qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com, zhenwei.pi@linux.dev, alistair.francis@wdc.com,
 stefanb@linux.vnet.ibm.com, kwolf@redhat.com, hreitz@redhat.com,
 sw@weilnetz.de, qemu_oss@crudebyte.com, groug@kaod.org, mst@redhat.com,
 imammedo@redhat.com, anisinha@redhat.com, kraxel@redhat.com,
 shentey@gmail.com, npiggin@gmail.com, harshpb@linux.ibm.com,
 sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
 edgar.iglesias@gmail.com, elena.ufimtseva@oracle.com, jag.raman@oracle.com,
 sgarzare@redhat.com, pbonzini@redhat.com, fam@euphon.net, alex@shazbot.org,
 clg@redhat.com, peterx@redhat.com, farosas@suse.de, lizhijian@fujitsu.com,
 dave@treblig.org, jasowang@redhat.com, samuel.thibault@ens-lyon.org,
 michael.roth@amd.com, kkostiuk@redhat.com, zhao1.liu@intel.com,
 mtosatti@redhat.com, rathc@linux.ibm.com, palmer@dabbelt.com,
 liwei1518@gmail.com, dbarboza@ventanamicro.com,
 zhiwei_liu@linux.alibaba.com, marcandre.lureau@redhat.com,
 qemu-block@nongnu.org, qemu-ppc@nongnu.org, xen-devel@lists.xenproject.org,
 kvm@vger.kernel.org, qemu-riscv@nongnu.org
References: <20251121121438.1249498-1-armbru@redhat.com>
 <20251121121438.1249498-13-armbru@redhat.com>
From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= 
In-Reply-To: <20251121121438.1249498-13-armbru@redhat.com>
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On 21/11/25 13:14, Markus Armbruster wrote:
> A few error messages show numeric errno codes.  Use error_setg_errno()
> to show human-readable text instead.
> 
> Signed-off-by: Markus Armbruster 
> ---
>   backends/cryptodev-lkcf.c   |  2 +-
>   hw/ppc/spapr.c              |  6 +++---
>   hw/vfio/migration-multifd.c |  5 +++--
>   migration/rdma.c            |  3 +--
>   net/l2tpv3.c                |  6 ++----
>   target/riscv/kvm/kvm-cpu.c  | 11 ++++++-----
>   6 files changed, 16 insertions(+), 17 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé 



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Message-ID: <541f756c-0fde-488b-b386-814fb276ebae@linaro.org>
Date: Tue, 25 Nov 2025 07:23:28 +0100
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v2 13/15] error: Use error_setg_errno() for simplicity and
 consistency
Content-Language: en-US
To: Markus Armbruster , qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com, zhenwei.pi@linux.dev, alistair.francis@wdc.com,
 stefanb@linux.vnet.ibm.com, kwolf@redhat.com, hreitz@redhat.com,
 sw@weilnetz.de, qemu_oss@crudebyte.com, groug@kaod.org, mst@redhat.com,
 imammedo@redhat.com, anisinha@redhat.com, kraxel@redhat.com,
 shentey@gmail.com, npiggin@gmail.com, harshpb@linux.ibm.com,
 sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
 edgar.iglesias@gmail.com, elena.ufimtseva@oracle.com, jag.raman@oracle.com,
 sgarzare@redhat.com, pbonzini@redhat.com, fam@euphon.net, alex@shazbot.org,
 clg@redhat.com, peterx@redhat.com, farosas@suse.de, lizhijian@fujitsu.com,
 dave@treblig.org, jasowang@redhat.com, samuel.thibault@ens-lyon.org,
 michael.roth@amd.com, kkostiuk@redhat.com, zhao1.liu@intel.com,
 mtosatti@redhat.com, rathc@linux.ibm.com, palmer@dabbelt.com,
 liwei1518@gmail.com, dbarboza@ventanamicro.com,
 zhiwei_liu@linux.alibaba.com, marcandre.lureau@redhat.com,
 qemu-block@nongnu.org, qemu-ppc@nongnu.org, xen-devel@lists.xenproject.org,
 kvm@vger.kernel.org, qemu-riscv@nongnu.org
References: <20251121121438.1249498-1-armbru@redhat.com>
 <20251121121438.1249498-14-armbru@redhat.com>
From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= 
In-Reply-To: <20251121121438.1249498-14-armbru@redhat.com>
Content-Type: text/plain; charset=UTF-8; format=flowed
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On 21/11/25 13:14, Markus Armbruster wrote:
> Use error_setg_errno() instead of passing the value of strerror() or
> g_strerror() to error_setg().
> 
> The separator between the error message proper and the value of
> strerror() changes from " : ", "", " - ", "- " to ": " in places.
> 
> Signed-off-by: Markus Armbruster 
> ---
>   backends/spdm-socket.c      |  4 ++--
>   backends/tpm/tpm_emulator.c | 13 +++++--------
>   hw/9pfs/9p.c                |  3 +--
>   hw/acpi/core.c              |  3 +--
>   hw/intc/openpic_kvm.c       |  3 +--
>   hw/intc/xics_kvm.c          |  5 +++--
>   hw/remote/vfio-user-obj.c   | 18 +++++++++---------
>   hw/sensor/emc141x.c         |  4 ++--
>   hw/sensor/tmp421.c          |  4 ++--
>   hw/smbios/smbios.c          |  4 ++--
>   hw/virtio/vdpa-dev.c        |  4 ++--
>   migration/postcopy-ram.c    | 10 +++++-----
>   net/slirp.c                 |  5 +++--
>   qga/commands-posix-ssh.c    | 23 +++++++++++++----------
>   system/vl.c                 |  2 +-
>   target/ppc/kvm.c            |  5 ++---
>   16 files changed, 54 insertions(+), 56 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé 



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Date: Tue, 25 Nov 2025 07:24:21 +0100
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Subject: Re: [PATCH v2 14/15] qga/commands-win32: Use error_setg_win32() for
 better error messages
Content-Language: en-US
To: Markus Armbruster , qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com, zhenwei.pi@linux.dev, alistair.francis@wdc.com,
 stefanb@linux.vnet.ibm.com, kwolf@redhat.com, hreitz@redhat.com,
 sw@weilnetz.de, qemu_oss@crudebyte.com, groug@kaod.org, mst@redhat.com,
 imammedo@redhat.com, anisinha@redhat.com, kraxel@redhat.com,
 shentey@gmail.com, npiggin@gmail.com, harshpb@linux.ibm.com,
 sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
 edgar.iglesias@gmail.com, elena.ufimtseva@oracle.com, jag.raman@oracle.com,
 sgarzare@redhat.com, pbonzini@redhat.com, fam@euphon.net, alex@shazbot.org,
 clg@redhat.com, peterx@redhat.com, farosas@suse.de, lizhijian@fujitsu.com,
 dave@treblig.org, jasowang@redhat.com, samuel.thibault@ens-lyon.org,
 michael.roth@amd.com, kkostiuk@redhat.com, zhao1.liu@intel.com,
 mtosatti@redhat.com, rathc@linux.ibm.com, palmer@dabbelt.com,
 liwei1518@gmail.com, dbarboza@ventanamicro.com,
 zhiwei_liu@linux.alibaba.com, marcandre.lureau@redhat.com,
 qemu-block@nongnu.org, qemu-ppc@nongnu.org, xen-devel@lists.xenproject.org,
 kvm@vger.kernel.org, qemu-riscv@nongnu.org
References: <20251121121438.1249498-1-armbru@redhat.com>
 <20251121121438.1249498-15-armbru@redhat.com>
From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= 
In-Reply-To: <20251121121438.1249498-15-armbru@redhat.com>
Content-Type: text/plain; charset=UTF-8; format=flowed
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On 21/11/25 13:14, Markus Armbruster wrote:
> We include numeric GetLastError() codes in error messages in a few
> places, like this:
> 
>      error_setg(errp, "GRIPE: %d", (int)GetLastError());
> 
> Show text instead, like this:
> 
>      error_setg_win32(errp, GetLastError(), "GRIPE");
> 
> Signed-off-by: Markus Armbruster 
> ---
>   qga/commands-win32.c | 16 ++++++++--------
>   1 file changed, 8 insertions(+), 8 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé 



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Date: Tue, 25 Nov 2025 07:25:05 +0100
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Subject: Re: [PATCH v2 15/15] block/file-win32: Improve an error message
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To: Markus Armbruster , qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com, zhenwei.pi@linux.dev, alistair.francis@wdc.com,
 stefanb@linux.vnet.ibm.com, kwolf@redhat.com, hreitz@redhat.com,
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References: <20251121121438.1249498-1-armbru@redhat.com>
 <20251121121438.1249498-16-armbru@redhat.com>
From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= 
In-Reply-To: <20251121121438.1249498-16-armbru@redhat.com>
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On 21/11/25 13:14, Markus Armbruster wrote:
> Two out of three calls of CreateFile() use error_setg_win32() to
> report errors.  The third uses error_setg_errno(), mapping
> ERROR_ACCESS_DENIED to EACCES, and everything else to EINVAL, throwing
> away detail.  Switch it to error_setg_win32().
> 
> Signed-off-by: Markus Armbruster 
> ---
>   block/file-win32.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Philippe Mathieu-Daudé 



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Subject: Re: [XEN][PATCH 1/2] xenstored: Default priv_domid to store_domid
To: Jason Andryuk 
Cc: Juergen Gross , Julien Grall ,
 Anthony PERARD , xen-devel@lists.xenproject.org
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On 24.11.2025 23:35, Jason Andryuk wrote:
> On a system without a control domain, a hardware|xenstore domain
> starting xenstored shows:
> common/grant_table.c:1041:d2v0 Could not find domain 32756
> gnttab: error: mmap failed: Invalid argument
> Could not initialize dom32756
> 
> setup_structure() does not get called without priv_domid.  Subsequent
> introduce_domain() calls will fault when calling fire_special_watches().
> 
> Default priv_domid to store_domid when there is no control domain.
> 
> Fixes: e5b0a9405571 ("tools/xenstored: Auto-introduce domains")
> Signed-off-by: Jason Andryuk 

Just to mention - unless told otherwise, the Fixes: tag here won't make
me take this change for backport, as I don't think a "system without
control domain" was deemed as thing back at the time.

Jan


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Subject: Re: [PATCH v4 02/24] xen: consolidate cpuid library
To: Penny Zheng ,
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On 21.11.2025 11:57, Penny Zheng wrote:
> There are some cpuid library functions only referenced in
> XEN_DOMCTL_get{,set}_cpu_policy-case, and shall be wrapped with
> CONFIG_MGMT_HYPERCALLS later, otherwise they will become unreachable when
> MGMT_HYPERCALLS=n, and hence violate Misra 2.1
> - x86_cpu_policy_clear_out_of_range_leaves
>   - zero_leaves
> - x86_cpuid_copy_to_buffer
>   - copy_leaf_to_buffer
> - x86_cpuid_copy_from_buffer
> We seperate these functions by moving other functions to a new file named
> cpuid-generic.c, and modify related Makefile-s to retain same behavior.
> 
> Signed-off-by: Penny Zheng 
> ---
> v3 -> v4:
> - new commit
> ---
>  tools/fuzz/cpu-policy/Makefile               |   2 +-
>  tools/fuzz/x86_instruction_emulator/Makefile |  10 +-
>  tools/libs/guest/Makefile.common             |   2 +-
>  tools/tests/cpu-policy/Makefile              |   2 +-
>  tools/tests/x86_emulator/Makefile            |   2 +-
>  xen/lib/x86/Makefile                         |   1 +
>  xen/lib/x86/cpuid-generic.c                  | 273 +++++++++++++++++++
>  xen/lib/x86/cpuid.c                          | 260 ------------------
>  8 files changed, 283 insertions(+), 269 deletions(-)
>  create mode 100644 xen/lib/x86/cpuid-generic.c

Andrew - what's your take on such a split? Personally I'm not overly
happy to see related functions be scattered across two files. The
separation also feels pretty random, posing the risk that later some
of the code may need to move back.

Penny, I also don't think "consolidate" is what is happening here.
Perhaps "split" would be getting closer?

Jan


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Subject: Re: [PATCH v4 06/24] xen/domctl: consolidate domain.c with
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To: Penny Zheng 
Cc: ray.huang@amd.com, grygorii_strashko@epam.com,
 Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 21.11.2025 11:57, Penny Zheng wrote:
> The following functions, scattered in common/domain.c, and are only referenced
> and responsible for domctl-op:
> - domain_pause_by_systemcontroller
> - domain_resume
> - domain_set_node_affinity
> So they shall be wrapped with CONFIG_MGMT_HYPERCALLS. Otherwise it will
> become unreachable codes when MGMT_HYPERCALLS=n, and hence violating Misra
> rule 2.1.
> Move them together to avoid scattering #ifdef.
> 
> Signed-off-by: Penny Zheng 

Acked-by: Jan Beulich 

I again think though that the title doesn't quite get it. While "consolidate"
may be fine here, I'd like to suggest s/with/towards/ or some such.

Jan


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Date: Tue, 25 Nov 2025 08:21:10 +0100
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Subject: Re: [XEN][PATCH 1/2] xenstored: Default priv_domid to store_domid
To: Jason Andryuk , xen-devel@lists.xenproject.org
Cc: Julien Grall , Anthony PERARD 
References: <20251124223533.31613-1-jason.andryuk@amd.com>
 <20251124223533.31613-2-jason.andryuk@amd.com>
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To: Jason Andryuk , xen-devel@lists.xenproject.org
Cc: Julien Grall , Anthony PERARD 
Message-ID: 
Subject: Re: [XEN][PATCH 1/2] xenstored: Default priv_domid to store_domid
References: <20251124223533.31613-1-jason.andryuk@amd.com>
 <20251124223533.31613-2-jason.andryuk@amd.com>
In-Reply-To: <20251124223533.31613-2-jason.andryuk@amd.com>

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Subject: Re: [XEN][PATCH 2/2] xenstored: Add newline to error message
To: Jason Andryuk , xen-devel@lists.xenproject.org
Cc: Julien Grall , Anthony PERARD 
References: <20251124223533.31613-1-jason.andryuk@amd.com>
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To: Jason Andryuk , xen-devel@lists.xenproject.org
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Subject: Re: [XEN][PATCH 2/2] xenstored: Add newline to error message
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 <20251124223533.31613-3-jason.andryuk@amd.com>
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Cc: Yann Sionneau , xen-devel@lists.xenproject.org,
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 Stefano Stabellini ,
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 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= 
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Subject: Re: [PATCH 1/2] xenbus: Use .freeze/.thaw to handle xenbus devices
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 <20251119224731.61497-2-jason.andryuk@amd.com>
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Subject: preparations for 4.19.4
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All,

the release is due in a little over a week. Please point out backports you find
missing from the respective staging branch, but which you consider relevant.

Jan


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To: "xen-devel@lists.xenproject.org" 
Cc: Anthony PERARD ,
 Juergen Gross 
From: Jan Beulich 
Subject: [PATCH] libxl/json: don't expose internal functions
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Ideally internal function declarations wouldn't live in a non-private
header. If already they need to, they should be hidden as much as
possible. That is (a) their declarations shouldn't be exposed and (b) the
symbols shouldn't appear in the shared library's dynamic symbol table.
Gate the declarations upon _hidden actually being defined (rather than
providing an empty fallback), and apply _hidden also to the libyail
variants.

Signed-off-by: Jan Beulich 
---
Some lines end up being too long, but I don't know what libxl's approach
would be to avoid this. Plus the libjson-c counterparts have similar line
length issues.

--- a/tools/include/libxl_json.h
+++ b/tools/include/libxl_json.h
@@ -28,10 +28,9 @@
 #endif
 #endif
 
+#ifdef _hidden /* Don't expose internal function decls. */
+
 #ifdef HAVE_LIBJSONC
-#ifndef _hidden
-#define _hidden
-#endif
 _hidden int libxl__uint64_gen_jso(json_object **jso_r, uint64_t val);
 _hidden int libxl_defbool_gen_jso(json_object **jso_r, libxl_defbool *p);
 _hidden int libxl_uuid_gen_jso(json_object **jso_r, libxl_uuid *p);
@@ -44,20 +43,24 @@ _hidden int libxl_hwcap_gen_jso(json_obj
 _hidden int libxl_ms_vm_genid_gen_jso(json_object **jso_r, libxl_ms_vm_genid *p);
 #endif
 #if defined(HAVE_LIBYAJL)
-yajl_gen_status libxl__uint64_gen_json(yajl_gen hand, uint64_t val);
-yajl_gen_status libxl_defbool_gen_json(yajl_gen hand, libxl_defbool *p);
-yajl_gen_status libxl_uuid_gen_json(yajl_gen hand, libxl_uuid *p);
-yajl_gen_status libxl_mac_gen_json(yajl_gen hand, libxl_mac *p);
-yajl_gen_status libxl_bitmap_gen_json(yajl_gen hand, libxl_bitmap *p);
-yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand,
-                                                 libxl_cpuid_policy_list *p);
-yajl_gen_status libxl_string_list_gen_json(yajl_gen hand, libxl_string_list *p);
-yajl_gen_status libxl_key_value_list_gen_json(yajl_gen hand,
-                                              libxl_key_value_list *p);
-yajl_gen_status libxl_hwcap_gen_json(yajl_gen hand, libxl_hwcap *p);
-yajl_gen_status libxl_ms_vm_genid_gen_json(yajl_gen hand, libxl_ms_vm_genid *p);
+_hidden yajl_gen_status libxl__uint64_gen_json(yajl_gen hand, uint64_t val);
+_hidden yajl_gen_status libxl_defbool_gen_json(yajl_gen hand, libxl_defbool *p);
+_hidden yajl_gen_status libxl_uuid_gen_json(yajl_gen hand, libxl_uuid *p);
+_hidden yajl_gen_status libxl_mac_gen_json(yajl_gen hand, libxl_mac *p);
+_hidden yajl_gen_status libxl_bitmap_gen_json(yajl_gen hand, libxl_bitmap *p);
+_hidden yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand,
+                                                         libxl_cpuid_policy_list *p);
+_hidden yajl_gen_status libxl_string_list_gen_json(yajl_gen hand,
+                                                   libxl_string_list *p);
+_hidden yajl_gen_status libxl_key_value_list_gen_json(yajl_gen hand,
+                                                      libxl_key_value_list *p);
+_hidden yajl_gen_status libxl_hwcap_gen_json(yajl_gen hand, libxl_hwcap *p);
+_hidden yajl_gen_status libxl_ms_vm_genid_gen_json(yajl_gen hand,
+                                                   libxl_ms_vm_genid *p);
 #endif
 
+#endif /* _hidden */
+
 #include <_libxl_types_json.h>
 
 /* YAJL version check */


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 linux-kernel@vger.kernel.org
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Subject: Re: [PATCH 2/2] xenbus: Rename helpers to freeze/thaw/restore
References: <20251119224731.61497-1-jason.andryuk@amd.com>
 <20251119224731.61497-3-jason.andryuk@amd.com>
In-Reply-To: <20251119224731.61497-3-jason.andryuk@amd.com>

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Date: Tue, 25 Nov 2025 11:27:24 +0100
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Subject: Re: [PATCH v2 03/15] ui: Convert to qemu_create() for simplicity and
 consistency
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To: Markus Armbruster , qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com, zhenwei.pi@linux.dev, alistair.francis@wdc.com,
 stefanb@linux.vnet.ibm.com, kwolf@redhat.com, hreitz@redhat.com,
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References: <20251121121438.1249498-1-armbru@redhat.com>
 <20251121121438.1249498-4-armbru@redhat.com>
From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= 
In-Reply-To: <20251121121438.1249498-4-armbru@redhat.com>
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On 21/11/25 13:14, Markus Armbruster wrote:
> The error message changes from
> 
>      failed to open file 'FILENAME': REASON
> 
> to
> 
>      Could not create 'FILENAME': REASON
> 
> Signed-off-by: Markus Armbruster 
> ---
>   ui/ui-qmp-cmds.c | 4 +---
>   1 file changed, 1 insertion(+), 3 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé 



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Date: Tue, 25 Nov 2025 11:27:09 +0100
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Subject: Re: [PATCH v2 02/15] hw/usb: Convert to qemu_create() for a better
 error message
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To: Markus Armbruster , qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com, zhenwei.pi@linux.dev, alistair.francis@wdc.com,
 stefanb@linux.vnet.ibm.com, kwolf@redhat.com, hreitz@redhat.com,
 sw@weilnetz.de, qemu_oss@crudebyte.com, groug@kaod.org, mst@redhat.com,
 imammedo@redhat.com, anisinha@redhat.com, kraxel@redhat.com,
 shentey@gmail.com, npiggin@gmail.com, harshpb@linux.ibm.com,
 sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
 edgar.iglesias@gmail.com, elena.ufimtseva@oracle.com, jag.raman@oracle.com,
 sgarzare@redhat.com, pbonzini@redhat.com, fam@euphon.net, alex@shazbot.org,
 clg@redhat.com, peterx@redhat.com, farosas@suse.de, lizhijian@fujitsu.com,
 dave@treblig.org, jasowang@redhat.com, samuel.thibault@ens-lyon.org,
 michael.roth@amd.com, kkostiuk@redhat.com, zhao1.liu@intel.com,
 mtosatti@redhat.com, rathc@linux.ibm.com, palmer@dabbelt.com,
 liwei1518@gmail.com, dbarboza@ventanamicro.com,
 zhiwei_liu@linux.alibaba.com, marcandre.lureau@redhat.com,
 qemu-block@nongnu.org, qemu-ppc@nongnu.org, xen-devel@lists.xenproject.org,
 kvm@vger.kernel.org, qemu-riscv@nongnu.org
References: <20251121121438.1249498-1-armbru@redhat.com>
 <20251121121438.1249498-3-armbru@redhat.com>
From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= 
In-Reply-To: <20251121121438.1249498-3-armbru@redhat.com>
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Hi Markus,

On 21/11/25 13:14, Markus Armbruster wrote:
> The error message changes from
> 
>      open FILENAME failed
> 
> to
> 
>      Could not create 'FILENAME': REASON
> 
> where REASON is the value of strerror(errno).
> 
> Signed-off-by: Markus Armbruster 
> ---
>   hw/usb/bus.c | 5 ++---
>   1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/hw/usb/bus.c b/hw/usb/bus.c
> index 8dd2ce415e..714e33989f 100644
> --- a/hw/usb/bus.c
> +++ b/hw/usb/bus.c
> @@ -259,10 +259,9 @@ static void usb_qdev_realize(DeviceState *qdev, Error **errp)
>       }
>   
>       if (dev->pcap_filename) {
> -        int fd = qemu_open_old(dev->pcap_filename,
> -                               O_CREAT | O_WRONLY | O_TRUNC | O_BINARY, 0666);
> +        int fd = qemu_create(dev->pcap_filename,
> +                             O_WRONLY | O_TRUNC | O_BINARY, 0666, errp);
>           if (fd < 0) {
> -            error_setg(errp, "open %s failed", dev->pcap_filename);
>               usb_qdev_unrealize(qdev);

OK, but why not update usb_qdev_realize() in the same patch?

>               return;
>           }

Similarly, I don't get why you updated this (and the following patch),
without also doing the similar:

  - qemu_chr_open_pipe()

  - qmp_chardev_open_file_source() and qmp_screendump()

  - s390_qmp_dump_skeys()

Anyhow, for this patch:
Reviewed-by: Philippe Mathieu-Daudé 


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Subject: Re: [PATCH v2 10/15] error: Use error_setg_file_open() for simplicity
 and consistency
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To: Markus Armbruster , qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com, zhenwei.pi@linux.dev, alistair.francis@wdc.com,
 stefanb@linux.vnet.ibm.com, kwolf@redhat.com, hreitz@redhat.com,
 sw@weilnetz.de, qemu_oss@crudebyte.com, groug@kaod.org, mst@redhat.com,
 imammedo@redhat.com, anisinha@redhat.com, kraxel@redhat.com,
 shentey@gmail.com, npiggin@gmail.com, harshpb@linux.ibm.com,
 sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
 edgar.iglesias@gmail.com, elena.ufimtseva@oracle.com, jag.raman@oracle.com,
 sgarzare@redhat.com, pbonzini@redhat.com, fam@euphon.net, alex@shazbot.org,
 clg@redhat.com, peterx@redhat.com, farosas@suse.de, lizhijian@fujitsu.com,
 dave@treblig.org, jasowang@redhat.com, samuel.thibault@ens-lyon.org,
 michael.roth@amd.com, kkostiuk@redhat.com, zhao1.liu@intel.com,
 mtosatti@redhat.com, rathc@linux.ibm.com, palmer@dabbelt.com,
 liwei1518@gmail.com, dbarboza@ventanamicro.com,
 zhiwei_liu@linux.alibaba.com, marcandre.lureau@redhat.com,
 qemu-block@nongnu.org, qemu-ppc@nongnu.org, xen-devel@lists.xenproject.org,
 kvm@vger.kernel.org, qemu-riscv@nongnu.org
References: <20251121121438.1249498-1-armbru@redhat.com>
 <20251121121438.1249498-11-armbru@redhat.com>
From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= 
In-Reply-To: <20251121121438.1249498-11-armbru@redhat.com>
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On 21/11/25 13:14, Markus Armbruster wrote:
> Replace
> 
>      error_setg_errno(errp, errno, MSG, FNAME);
> 
> by
> 
>      error_setg_file_open(errp, errno, FNAME);
> 
> where MSG is "Could not open '%s'" or similar.
> 
> Also replace equivalent uses of error_setg().
> 
> A few messages lose prefixes ("net dump: ", "SEV: ", __func__ ": ").
> We could put them back with error_prepend().  Not worth the bother.
> 
> Signed-off-by: Markus Armbruster 
> Reviewed-by: Dr. David Alan Gilbert 
> ---
>   hw/9pfs/9p-local.c        | 2 +-
>   hw/acpi/core.c            | 2 +-
>   hw/core/loader.c          | 2 +-
>   hw/pci-host/xen_igd_pt.c  | 2 +-
>   monitor/hmp-cmds-target.c | 2 +-
>   net/dump.c                | 2 +-
>   net/tap-bsd.c             | 6 +++---
>   net/tap-linux.c           | 2 +-
>   target/i386/sev.c         | 6 ++----
>   util/vfio-helpers.c       | 5 ++---
>   10 files changed, 14 insertions(+), 17 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé 



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Message-ID: 
Date: Tue, 25 Nov 2025 11:28:33 +0100
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v2 09/15] blkdebug: Use error_setg_file_open() for a
 better error message
Content-Language: en-US
To: Markus Armbruster , qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com, zhenwei.pi@linux.dev, alistair.francis@wdc.com,
 stefanb@linux.vnet.ibm.com, kwolf@redhat.com, hreitz@redhat.com,
 sw@weilnetz.de, qemu_oss@crudebyte.com, groug@kaod.org, mst@redhat.com,
 imammedo@redhat.com, anisinha@redhat.com, kraxel@redhat.com,
 shentey@gmail.com, npiggin@gmail.com, harshpb@linux.ibm.com,
 sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
 edgar.iglesias@gmail.com, elena.ufimtseva@oracle.com, jag.raman@oracle.com,
 sgarzare@redhat.com, pbonzini@redhat.com, fam@euphon.net, alex@shazbot.org,
 clg@redhat.com, peterx@redhat.com, farosas@suse.de, lizhijian@fujitsu.com,
 dave@treblig.org, jasowang@redhat.com, samuel.thibault@ens-lyon.org,
 michael.roth@amd.com, kkostiuk@redhat.com, zhao1.liu@intel.com,
 mtosatti@redhat.com, rathc@linux.ibm.com, palmer@dabbelt.com,
 liwei1518@gmail.com, dbarboza@ventanamicro.com,
 zhiwei_liu@linux.alibaba.com, marcandre.lureau@redhat.com,
 qemu-block@nongnu.org, qemu-ppc@nongnu.org, xen-devel@lists.xenproject.org,
 kvm@vger.kernel.org, qemu-riscv@nongnu.org
References: <20251121121438.1249498-1-armbru@redhat.com>
 <20251121121438.1249498-10-armbru@redhat.com>
From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= 
In-Reply-To: <20251121121438.1249498-10-armbru@redhat.com>
Content-Type: text/plain; charset=UTF-8; format=flowed
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On 21/11/25 13:14, Markus Armbruster wrote:
> The error message changes from
> 
>      Could not read blkdebug config file: REASON
> 
> to
> 
>      Could not open 'FNAME': REASON
> 
> I think the exact file name is more useful to know than the file's
> purpose.
> 
> Signed-off-by: Markus Armbruster 
> ---
>   block/blkdebug.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Philippe Mathieu-Daudé 



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Subject: Re: [PATCH v2 05/15] qga: Use error_setg_file_open() for better error
 messages
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To: Markus Armbruster , qemu-devel@nongnu.org
Cc: arei.gonglei@huawei.com, zhenwei.pi@linux.dev, alistair.francis@wdc.com,
 stefanb@linux.vnet.ibm.com, kwolf@redhat.com, hreitz@redhat.com,
 sw@weilnetz.de, qemu_oss@crudebyte.com, groug@kaod.org, mst@redhat.com,
 imammedo@redhat.com, anisinha@redhat.com, kraxel@redhat.com,
 shentey@gmail.com, npiggin@gmail.com, harshpb@linux.ibm.com,
 sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
 edgar.iglesias@gmail.com, elena.ufimtseva@oracle.com, jag.raman@oracle.com,
 sgarzare@redhat.com, pbonzini@redhat.com, fam@euphon.net, alex@shazbot.org,
 clg@redhat.com, peterx@redhat.com, farosas@suse.de, lizhijian@fujitsu.com,
 dave@treblig.org, jasowang@redhat.com, samuel.thibault@ens-lyon.org,
 michael.roth@amd.com, kkostiuk@redhat.com, zhao1.liu@intel.com,
 mtosatti@redhat.com, rathc@linux.ibm.com, palmer@dabbelt.com,
 liwei1518@gmail.com, dbarboza@ventanamicro.com,
 zhiwei_liu@linux.alibaba.com, marcandre.lureau@redhat.com,
 qemu-block@nongnu.org, qemu-ppc@nongnu.org, xen-devel@lists.xenproject.org,
 kvm@vger.kernel.org, qemu-riscv@nongnu.org
References: <20251121121438.1249498-1-armbru@redhat.com>
 <20251121121438.1249498-6-armbru@redhat.com>
From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= 
In-Reply-To: <20251121121438.1249498-6-armbru@redhat.com>
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On 21/11/25 13:14, Markus Armbruster wrote:
> Error messages change from
> 
>      open("FNAME"): REASON
> 
> to
> 
>      Could not open 'FNAME': REASON
> 
> Signed-off-by: Markus Armbruster 
> Reviewed-by: Dr. David Alan Gilbert 
> Reviewed-by: Kostiantyn Kostiuk 
> ---
>   qga/commands-linux.c | 11 ++++++-----
>   1 file changed, 6 insertions(+), 5 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé 



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Date: Tue, 25 Nov 2025 11:47:37 +0100
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: =?utf-8?B?SsO8cmdlbiBHcm/Dnw==?= 
Cc: Jason Andryuk ,
	Stefano Stabellini ,
	Oleksandr Tyshchenko ,
	Yann Sionneau ,
	xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] xenbus: Use .freeze/.thaw to handle xenbus devices
Message-ID: 
References: <20251119224731.61497-1-jason.andryuk@amd.com>
 <20251119224731.61497-2-jason.andryuk@amd.com>
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Date: Tue, 25 Nov 2025 11:47:37 +0100
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: =?utf-8?B?SsO8cmdlbiBHcm/Dnw==?= 
Cc: Jason Andryuk ,
	Stefano Stabellini ,
	Oleksandr Tyshchenko ,
	Yann Sionneau ,
	xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] xenbus: Use .freeze/.thaw to handle xenbus devices

On Tue, Nov 25, 2025 at 09:20:55AM +0100, J=C3=BCrgen Gro=C3=9F wrote:
> On 19.11.25 23:47, Jason Andryuk wrote:
> > The goal is to fix s2idle and S3 for Xen PV devices.  A domain resuming
> > from s3 or s2idle disconnects its PV devices during resume.  The
> > backends are not expecting this and do not reconnect.
> >=20
> > b3e96c0c7562 ("xen: use freeze/restore/thaw PM events for suspend/
> > resume/chkpt") changed xen_suspend()/do_suspend() from
> > PMSG_SUSPEND/PMSG_RESUME to PMSG_FREEZE/PMSG_THAW/PMSG_RESTORE, but the
> > suspend/resume callbacks remained.
> >=20
> > .freeze/restore are used with hiberation where Linux restarts in a new
> > place in the future.  .suspend/resume are useful for runtime power
> > management for the duration of a boot.
> >=20
> > The current behavior of the callbacks works for an xl save/restore or
> > live migration where the domain is restored/migrated to a new location
> > and connecting to a not-already-connected backend.
> >=20
> > Change xenbus_pm_ops to use .freeze/thaw/restore and drop the
> > .suspend/resume hook.  This matches the use in drivers/xen/manage.c for
> > save/restore and live migration.  With .suspend/resume empty, PV devices
> > are left connected during s2idle and s3, so PV devices are not changed
> > and work after resume.
> >=20
> > Signed-off-by: Jason Andryuk 
>=20
> Acked-by: Juergen Gross 
>=20
> Marek, could you please give this patch a try with QubesOS? I think this
> patch should be verified not to break your use cases regarding suspend /
> resume.

Sure, but I can't promise it will be this week, I have some deadlines to
meet...

> Juergen
>=20
> > ---
> >   drivers/xen/xenbus/xenbus_probe_frontend.c | 4 +---
> >   1 file changed, 1 insertion(+), 3 deletions(-)
> >=20
> > diff --git a/drivers/xen/xenbus/xenbus_probe_frontend.c b/drivers/xen/x=
enbus/xenbus_probe_frontend.c
> > index 6d1819269cbe..199917b6f77c 100644
> > --- a/drivers/xen/xenbus/xenbus_probe_frontend.c
> > +++ b/drivers/xen/xenbus/xenbus_probe_frontend.c
> > @@ -148,11 +148,9 @@ static void xenbus_frontend_dev_shutdown(struct de=
vice *_dev)
> >   }
> >   static const struct dev_pm_ops xenbus_pm_ops =3D {
> > -	.suspend	=3D xenbus_dev_suspend,
> > -	.resume		=3D xenbus_frontend_dev_resume,
> >   	.freeze		=3D xenbus_dev_suspend,
> >   	.thaw		=3D xenbus_dev_cancel,
> > -	.restore	=3D xenbus_dev_resume,
> > +	.restore	=3D xenbus_frontend_dev_resume,
> >   };
> >   static struct xen_bus_type xenbus_frontend =3D {
>=20






--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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From: Michal Orzel 
To: 
CC: Michal Orzel , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Volodymyr Babchuk 
Subject: [PATCH] vgic-v3: Ignore writes to GICD_ISACTIVER{nE}..GICD_ISACTIVER{nE}N
Date: Tue, 25 Nov 2025 13:03:07 +0100
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Similar to other registers like ICPENDR and ICACTIVER, ignore the writes
instead of injecting fault into the guest and thus crashing it. This was
already the case for extended registers prior to introducing GICV3_ESPI.

Signed-off-by: Michal Orzel 
---
 xen/arch/arm/vgic-v3.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
index 8b1c8eef8024..33dfd13dccf1 100644
--- a/xen/arch/arm/vgic-v3.c
+++ b/xen/arch/arm/vgic-v3.c
@@ -887,7 +887,8 @@ static int __vgic_v3_distr_common_mmio_write(const char *name, struct vcpu *v,
             printk(XENLOG_G_ERR
                    "%pv: %s: unhandled word write %#"PRIregister" to ISACTIVER%dE\n",
                    v, name, r, reg - GICD_ISACTIVERnE);
-        return 0;
+
+        goto write_ignore;
 
     case VRANGE32(GICD_ICACTIVER, GICD_ICACTIVERN):
     case VRANGE32(GICD_ICACTIVERnE, GICD_ICACTIVERnEN):
-- 
2.43.0



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Date: Tue, 25 Nov 2025 14:39:56 +0100
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Subject: Re: [PATCH v5 12/12] x86/xen: use lazy_mmu_state when
 context-switching
To: Kevin Brodsky , linux-mm@kvack.org
Cc: linux-kernel@vger.kernel.org, Alexander Gordeev ,
 Andreas Larsson ,
 Andrew Morton ,
 Boris Ostrovsky , Borislav Petkov
 , Catalin Marinas ,
 Christophe Leroy ,
 Dave Hansen ,
 David Hildenbrand , "David S. Miller"
 , David Woodhouse ,
 "H. Peter Anvin" , Ingo Molnar ,
 Jann Horn , "Liam R. Howlett" ,
 Lorenzo Stoakes ,
 Madhavan Srinivasan ,
 Michael Ellerman , Michal Hocko ,
 Mike Rapoport , Nicholas Piggin ,
 Peter Zijlstra ,
 "Ritesh Harjani (IBM)" ,
 Ryan Roberts , Suren Baghdasaryan ,
 Thomas Gleixner ,
 Venkat Rao Bagalkote ,
 Vlastimil Babka , Will Deacon ,
 Yeoreum Yun , linux-arm-kernel@lists.infradead.org,
 linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org,
 xen-devel@lists.xenproject.org, x86@kernel.org
References: <20251124132228.622678-1-kevin.brodsky@arm.com>
 <20251124132228.622678-13-kevin.brodsky@arm.com>
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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: Kevin Brodsky , linux-mm@kvack.org
Cc: linux-kernel@vger.kernel.org, Alexander Gordeev ,
 Andreas Larsson ,
 Andrew Morton ,
 Boris Ostrovsky , Borislav Petkov
 , Catalin Marinas ,
 Christophe Leroy ,
 Dave Hansen ,
 David Hildenbrand , "David S. Miller"
 , David Woodhouse ,
 "H. Peter Anvin" , Ingo Molnar ,
 Jann Horn , "Liam R. Howlett" ,
 Lorenzo Stoakes ,
 Madhavan Srinivasan ,
 Michael Ellerman , Michal Hocko ,
 Mike Rapoport , Nicholas Piggin ,
 Peter Zijlstra ,
 "Ritesh Harjani (IBM)" ,
 Ryan Roberts , Suren Baghdasaryan ,
 Thomas Gleixner ,
 Venkat Rao Bagalkote ,
 Vlastimil Babka , Will Deacon ,
 Yeoreum Yun , linux-arm-kernel@lists.infradead.org,
 linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org,
 xen-devel@lists.xenproject.org, x86@kernel.org
Message-ID: <263d6867-bf94-40b5-87f8-96b40e797ebe@suse.com>
Subject: Re: [PATCH v5 12/12] x86/xen: use lazy_mmu_state when
 context-switching
References: <20251124132228.622678-1-kevin.brodsky@arm.com>
 <20251124132228.622678-13-kevin.brodsky@arm.com>
In-Reply-To: <20251124132228.622678-13-kevin.brodsky@arm.com>

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Date: Tue, 25 Nov 2025 16:04:38 +0200
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v4 15/24] xen/domctl: wrap device-tree-subset
 iommu-related domctl op with CONFIG_MGMT_HYPERCALLS
To: Penny Zheng , xen-devel@lists.xenproject.org
Cc: ray.huang@amd.com, Stefano Stabellini ,
 Julien Grall , Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Rahul Singh ,
 "Daniel P. Smith" 
References: <20251121105801.1251262-1-Penny.Zheng@amd.com>
 <20251121105801.1251262-16-Penny.Zheng@amd.com>
Content-Language: en-US
From: Grygorii Strashko 
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Hi Penny,

On 21.11.25 12:57, Penny Zheng wrote:
> Function iommu_do_dt_domctl() is the main entry for all device-tree-subset
> iommu-related domctl-op, and shall be wrapped with CONFIG_MGMT_HYPERCALLS.
> Tracking its calling chain, the following functions shall all be wrapped
> with CONFIG_MGMT_HYPERCALLS:
> - make PCI_PASSTHROUGH depend on MGMT_HYPERCALLS
> - iommu_do_dt_domctl
>    - xsm_assign_dtdevice
>    - xsm_deassign_dtdevice
>    - iommu_deassign_dt_device
>      - arm_smmu_reassign_dev
>        - arm_smmu_deassign_dev
>          - arm_smmu_detach_dev
>            - arm_smmu_domain_remove_master
>      - ipmmu_reassign_device
>        - ipmmu_deassign_device
>          - ipmmu_detach_device
>    - iommu_remove_dt_device
>      - iommu_dt_device_is_assigned_locked
>    - dt_find_node_by_gpath
> Otherwise all the functions will become unreachable when MGMT_HYPERCALLS=n,
> and hence violating Misra rule 2.1
> Move codes closer to avoid scattering #ifdef
> 
> Signed-off-by: Penny Zheng 
> ---
> v3 -> v4
> - split into PCI related subset and DT subset
> - Move codes closer to avoid scattering #ifdef
> ---
>   xen/arch/arm/Kconfig                     |   2 +-
>   xen/common/device-tree/device-tree.c     |   2 +
>   xen/drivers/passthrough/arm/ipmmu-vmsa.c |  26 +++---
>   xen/drivers/passthrough/arm/smmu-v3.c    |   4 +
>   xen/drivers/passthrough/arm/smmu.c       |  55 ++++++------
>   xen/drivers/passthrough/device_tree.c    | 108 ++++++++++++-----------
>   xen/include/xsm/dummy.h                  |   6 +-
>   xen/include/xsm/xsm.h                    |  12 +--
>   xen/xsm/dummy.c                          |   6 +-
>   xen/xsm/flask/hooks.c                    |  12 +--
>   10 files changed, 126 insertions(+), 107 deletions(-)
> 
> diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
> index cf6af68299..5a5d7810c8 100644
> --- a/xen/arch/arm/Kconfig
> +++ b/xen/arch/arm/Kconfig
> @@ -270,7 +270,7 @@ source "arch/arm/firmware/Kconfig"
>   
>   config PCI_PASSTHROUGH
>   	bool "PCI passthrough" if EXPERT
> -	depends on ARM_64 && HAS_PASSTHROUGH
> +	depends on ARM_64 && HAS_PASSTHROUGH && MGMT_HYPERCALLS
>   	help
>   	  This option enables PCI device passthrough
>   
> diff --git a/xen/common/device-tree/device-tree.c b/xen/common/device-tree/device-tree.c
> index 0b5375f151..70bd8e7da5 100644
> --- a/xen/common/device-tree/device-tree.c
> +++ b/xen/common/device-tree/device-tree.c
> @@ -371,6 +371,7 @@ struct dt_device_node *dt_find_node_by_path_from(struct dt_device_node *from,
>       return np;
>   }
>   
> +#ifdef CONFIG_MGMT_HYPERCALLS
>   int dt_find_node_by_gpath(XEN_GUEST_HANDLE(char) u_path, uint32_t u_plen,
>                             struct dt_device_node **node)
>   {
> @@ -386,6 +387,7 @@ int dt_find_node_by_gpath(XEN_GUEST_HANDLE(char) u_path, uint32_t u_plen,
>   
>       return (*node == NULL) ? -ESRCH : 0;
>   }
> +#endif /* CONFIG_MGMT_HYPERCALLS */

The common/device-tree/device-tree.c contains generic unflatten DT helpers API,
while dt_find_node_by_gpath() is specific for domctl (iommu) processing.

Therefore I'd like to propose to move this function into drivers\passthrough\device_tree.c
as it is used only there now.

>   
>   struct dt_device_node *dt_find_node_by_alias(const char *alias)
>   {

[...]

> diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passthrough/arm/smmu-v3.c
> index bf153227db..22def57b03 100644
> --- a/xen/drivers/passthrough/arm/smmu-v3.c
> +++ b/xen/drivers/passthrough/arm/smmu-v3.c
> @@ -2759,6 +2759,7 @@ out:
>   	return ret;
>   }

There is not wrapped arm_smmu_deassign_dev() at the beginning of the file which causes
ARM64 build failure:

drivers/passthrough/arm/smmu-v3.c:1474:12: error: 'arm_smmu_deassign_dev' declared 'static' but never defined [-Werror=unused-function]
  1474 | static int arm_smmu_deassign_dev(struct domain *d, uint8_t devfn,


>   
> +#ifdef CONFIG_MGMT_HYPERCALLS
>   static int arm_smmu_deassign_dev(struct domain *d, uint8_t devfn, struct device *dev)
>   {
>   	struct iommu_domain *io_domain = arm_smmu_get_domain(d, dev);
> @@ -2826,6 +2827,7 @@ static int arm_smmu_reassign_dev(struct domain *s, struct domain *t,
>   
>   	return 0;
>   }
> +#endif /* CONFIG_MGMT_HYPERCALLS */
>   
>   static int arm_smmu_iommu_xen_domain_init(struct domain *d)
>   {
> @@ -2862,7 +2864,9 @@ static const struct iommu_ops arm_smmu_iommu_ops = {
>   	.teardown		= arm_smmu_iommu_xen_domain_teardown,
>   	.iotlb_flush		= arm_smmu_iotlb_flush,
>   	.assign_device		= arm_smmu_assign_dev,
> +#ifdef CONFIG_MGMT_HYPERCALLS
>   	.reassign_device	= arm_smmu_reassign_dev,
> +#endif
>   	.map_page		= arm_iommu_map_page,
>   	.unmap_page		= arm_iommu_unmap_page,
>   	.dt_xlate		= arm_smmu_dt_xlate,
> diff --git a/xen/drivers/passthrough/arm/smmu.c b/xen/drivers/passthrough/arm/smmu.c
> index 22d306d0cb..a75ec08633 100644

[...]

-- 
Best regards,
-grygorii



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From: Jan Beulich 
Subject: [PATCH 0/2] symbols/x86: avoid symbols-dummy
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For the time being these two patches go on top of the previously submitted
"symbols: check table sizes don't change between linking passes 2 and 3".
Presumably what is done here addresses on of the RFC remarks there, so the
order may need switching around anyway.

1: re-number intermediate files
2: don't use symbols-dummy

Jan


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In preparation to do away with symbols-dummy, re-number the file assembly
and object files used, for the numbers to match the next passes real
output. This is to make 0 available to use for what now is handled by
symbols-dummy. (Mirror the numbering to the intermediate reloc files for
xen.efi, just to avoid confusion.)

Signed-off-by: Jan Beulich 
---
Will want mirroring to other arch-es if the other patch is to be mirrored.

--- a/xen/arch/x86/Makefile
+++ b/xen/arch/x86/Makefile
@@ -138,17 +138,17 @@ $(TARGET)-syms: $(objtree)/prelink.o $(o
 	    $(objtree)/common/symbols-dummy.o -o $(dot-target).0
 	$(NM) -pa --format=sysv $(dot-target).0 \
 		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
-		> $(dot-target).0.S
-	$(MAKE) $(build)=$(@D) $(dot-target).0.o
+		> $(dot-target).1.S
+	$(MAKE) $(build)=$(@D) $(dot-target).1.o
 	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \
-	    $(dot-target).0.o -o $(dot-target).1
+	    $(dot-target).1.o -o $(dot-target).1
 	$(NM) -pa --format=sysv $(dot-target).1 \
 		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort $(syms-warn-dup-y) \
-		> $(dot-target).1.S
-	$(MAKE) $(build)=$(@D) $(dot-target).1.o
-	$(call compare-symbol-tables, $(dot-target).0.o, $(dot-target).1.o)
+		> $(dot-target).2.S
+	$(MAKE) $(build)=$(@D) $(dot-target).2.o
+	$(call compare-symbol-tables, $(dot-target).1.o, $(dot-target).2.o)
 	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \
-	    $(orphan-handling-y) $(dot-target).1.o -o $@
+	    $(orphan-handling-y) $(dot-target).2.o -o $@
 	$(NM) -pa --format=sysv $@ \
 		| $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \
 		> $@.map
@@ -212,25 +212,25 @@ endif
 	                $(objtree)/common/symbols-dummy.o $(note_file_option) \
 	                -o $(dot-target).$(base).0 &&) :
 	$(MKRELOC) $(foreach base,$(VIRT_BASE) $(ALT_BASE),$(dot-target).$(base).0) \
-		> $(dot-target).0r.S
+		> $(dot-target).1r.S
 	$(NM) -pa --format=sysv $(dot-target).$(VIRT_BASE).0 \
 		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
-		> $(dot-target).0s.S
-	$(MAKE) $(build)=$(@D) .$(@F).0r.o .$(@F).0s.o
+		> $(dot-target).1s.S
+	$(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o
 	$(foreach base, $(VIRT_BASE) $(ALT_BASE), \
 	          $(LD) $(call EFI_LDFLAGS,$(base)) -T $(obj)/efi.lds $< \
-	                $(dot-target).0r.o $(dot-target).0s.o $(note_file_option) \
+	                $(dot-target).1r.o $(dot-target).1s.o $(note_file_option) \
 	                -o $(dot-target).$(base).1 &&) :
 	$(MKRELOC) $(foreach base,$(VIRT_BASE) $(ALT_BASE),$(dot-target).$(base).1) \
-		> $(dot-target).1r.S
+		> $(dot-target).2r.S
 	$(NM) -pa --format=sysv $(dot-target).$(VIRT_BASE).1 \
 		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
-		> $(dot-target).1s.S
-	$(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o
-	$(call compare-symbol-tables, $(dot-target).0r.o, $(dot-target).1r.o)
-	$(call compare-symbol-tables, $(dot-target).0s.o, $(dot-target).1s.o)
+		> $(dot-target).2s.S
+	$(MAKE) $(build)=$(@D) .$(@F).2r.o .$(@F).2s.o
+	$(call compare-symbol-tables, $(dot-target).1r.o, $(dot-target).2r.o)
+	$(call compare-symbol-tables, $(dot-target).1s.o, $(dot-target).2s.o)
 	$(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds $< \
-	      $(dot-target).1r.o $(dot-target).1s.o $(orphan-handling-y) \
+	      $(dot-target).2r.o $(dot-target).2s.o $(orphan-handling-y) \
 	      $(note_file_option) -o $@
 	$(NM) -pa --format=sysv $@ \
 		| $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \



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Message-ID: <3618c458-d9ec-4cc6-a800-0741ade461a1@suse.com>
Date: Tue, 25 Nov 2025 15:14:27 +0100
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Subject: [PATCH 2/2] symbols/x86: don't use symbols-dummy
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper , Julien Grall ,
 Stefano Stabellini ,
 Anthony PERARD ,
 Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 
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In particular when linking with lld, which converts hidden symbols to
local ones, the ELF symbol table can change in unhelpful ways between the
first two linking passes, resulting in the .rodata contributions to change
between the 2nd and 3rd pass. That, however, renders our embedded symbol
table pretty much unusable; the recently introduced self-test may then
also fail. (Another difference between compiling a C file and assembling
the generated ones is that - with -fdata-sections in use - the .rodata
contributions move between passes 1 and 2, when we'd prefer them not to.)

Make tools/symbols capable of producing an "empty" assembly file, such
that unwanted differences between passes 1 and 2 go away when then using
the corresponding objects in place of common/symbols-dummy.o.

Reported-by: Andrew Cooper 
Reported-by: Roger Pau Monné 
Signed-off-by: Jan Beulich 
---
May want mirroring to other arch-es.

--- a/xen/arch/x86/Makefile
+++ b/xen/arch/x86/Makefile
@@ -134,8 +134,10 @@ $(TARGET): $(TARGET)-syms $(efi-y) $(obj
 CFLAGS-$(XEN_BUILD_EFI) += -DXEN_BUILD_EFI
 
 $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds
+	$(objtree)/tools/symbols $(all_symbols) --empty > $(dot-target).0.S
+	$(MAKE) $(build)=$(@D) $(dot-target).0.o
 	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \
-	    $(objtree)/common/symbols-dummy.o -o $(dot-target).0
+	      $(dot-target).0.o -o $(dot-target).0
 	$(NM) -pa --format=sysv $(dot-target).0 \
 		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
 		> $(dot-target).1.S
@@ -207,9 +209,11 @@ $(TARGET).efi: $(objtree)/prelink.o $(no
 ifeq ($(CONFIG_DEBUG_INFO),y)
 	$(if $(filter --strip-debug,$(EFI_LDFLAGS)),echo,:) "Will strip debug info from $(@F)"
 endif
+	$(objtree)/tools/symbols $(all_symbols) --empty > $(dot-target).0s.S
+	$(MAKE) $(build)=$(@D) .$(@F).0s.o
 	$(foreach base, $(VIRT_BASE) $(ALT_BASE), \
 	          $(LD) $(call EFI_LDFLAGS,$(base)) -T $(obj)/efi.lds $< $(relocs-dummy) \
-	                $(objtree)/common/symbols-dummy.o $(note_file_option) \
+	                $(dot-target).0s.o $(note_file_option) \
 	                -o $(dot-target).$(base).0 &&) :
 	$(MKRELOC) $(foreach base,$(VIRT_BASE) $(ALT_BASE),$(dot-target).$(base).0) \
 		> $(dot-target).1r.S
--- a/xen/tools/symbols.c
+++ b/xen/tools/symbols.c
@@ -672,7 +672,10 @@ int main(int argc, char **argv)
 				warn_dup = true;
 			else if (strcmp(argv[i], "--error-dup") == 0)
 				warn_dup = error_dup = true;
-			else if (strcmp(argv[i], "--xensyms") == 0)
+			else if (strcmp(argv[i], "--empty") == 0) {
+				write_src();
+				return 0;
+			} else if (strcmp(argv[i], "--xensyms") == 0)
 				map_only = true;
 			else
 				usage();



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Subject: Re: [PATCH v6 03/25] drm/gem-dma: Compute dumb-buffer sizes with
 drm_mode_size_dumb()
Thread-Topic: [PATCH v6 03/25] drm/gem-dma: Compute dumb-buffer sizes with
 drm_mode_size_dumb()
Thread-Index: AQHcEnS8fucA3LjqjkuGZw8r9BxHgrUEDdaA
Date: Tue, 25 Nov 2025 14:39:58 +0000
Message-ID: <52600bf4-2c1c-49a6-82c5-b31818141a43@microchip.com>
References: <20250821081918.79786-1-tzimmermann@suse.de>
 <20250821081918.79786-4-tzimmermann@suse.de>
In-Reply-To: <20250821081918.79786-4-tzimmermann@suse.de>
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Date: Tue, 25 Nov 2025 09:52:50 -0500
MIME-Version: 1.0
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Subject: Re: [PATCH 1/4] xen/xsm: address violations of MISRA C rules 8.3 and
 7.2
To: Nicola Vetrini , xen-devel@lists.xenproject.org
Cc: andrew.cooper3@citrix.com, jbeulich@suse.com, sstabellini@kernel.org
References: 
 
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On 11/20/25 2:32 PM, Nicola Vetrini wrote:
> Rule 8.3 states: Function types shall be in prototype form
> with named parameters.
> 
> add parameter to 'has_xsm_magic' to make it consistent with the
> definition.
> 
> Rule 7.2 states: A `u' or `U' suffix shall be applied to all
> integer constants that are represented in an unsigned type.
> 
> add missing `U' to both #define for `XSM_MAGIC` for consistency.
> 
> No functional change.
> 
> Signed-off-by: Nicola Vetrini 
> ---
>   xen/include/xsm/xsm.h | 6 +++---
>   1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/xen/include/xsm/xsm.h b/xen/include/xsm/xsm.h
> index 9a23d2827c..074d61cd45 100644
> --- a/xen/include/xsm/xsm.h
> +++ b/xen/include/xsm/xsm.h
> @@ -22,9 +22,9 @@
>   typedef uint32_t xsm_magic_t;
>   
>   #ifdef CONFIG_XSM_FLASK
> -#define XSM_MAGIC 0xf97cff8c
> +#define XSM_MAGIC 0xf97cff8cU
>   #else
> -#define XSM_MAGIC 0x0
> +#define XSM_MAGIC 0x0U
>   #endif
>   
>   /*
> @@ -815,7 +815,7 @@ int xsm_multiboot_policy_init(
>    */
>   int xsm_dt_init(void);
>   int xsm_dt_policy_init(void **policy_buffer, size_t *policy_size);
> -bool has_xsm_magic(paddr_t);
> +bool has_xsm_magic(paddr_t start);
>   #endif
>   
>   void xsm_fixup_ops(struct xsm_ops *ops);

Acked-by: Daniel P. Smith 



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Date: Tue, 25 Nov 2025 09:57:55 -0500
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Subject: Re: [PATCH v3 2/7] xen/xsm: wrap xsm_vm_event_control() with
 CONFIG_VM_EVENT
To: Penny Zheng , xen-devel@lists.xenproject.org
Cc: ray.huang@amd.com, grygorii_strashko@epam.com
References: <20251121091554.1003315-1-Penny.Zheng@amd.com>
 <20251121091554.1003315-3-Penny.Zheng@amd.com>
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From: "Daniel P. Smith" 
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On 11/21/25 4:15 AM, Penny Zheng wrote:
> Function xsm_vm_event_control() is only invoked under CONFIG_VM_EVENT, so
> it shall be wrapped with it, otherwiae it will become unreachable when

otherwiae --> otherwise (maybe committer is willing to fix on commit?)

> VM_EVENT=n and hence violating Misra rule 2.1.
> 
> Signed-off-by: Penny Zheng 
> ---
> v1 -> v3:
> - new commit
> ---
>   xen/include/xsm/dummy.h | 2 +-
>   xen/include/xsm/xsm.h   | 4 ++--
>   xen/xsm/dummy.c         | 2 +-
>   xen/xsm/flask/hooks.c   | 4 ++--
>   4 files changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/xen/include/xsm/dummy.h b/xen/include/xsm/dummy.h
> index 12792c3a43..e801dbcdba 100644
> --- a/xen/include/xsm/dummy.h
> +++ b/xen/include/xsm/dummy.h
> @@ -640,6 +640,7 @@ static XSM_INLINE int cf_check xsm_hvm_altp2mhvm_op(
>       }
>   }
>   
> +#ifdef CONFIG_VM_EVENT
>   static XSM_INLINE int cf_check xsm_vm_event_control(
>       XSM_DEFAULT_ARG struct domain *d, int mode, int op)
>   {
> @@ -647,7 +648,6 @@ static XSM_INLINE int cf_check xsm_vm_event_control(
>       return xsm_default_action(action, current->domain, d);
>   }
>   
> -#ifdef CONFIG_VM_EVENT
>   static XSM_INLINE int cf_check xsm_mem_access(XSM_DEFAULT_ARG struct domain *d)
>   {
>       XSM_ASSERT_ACTION(XSM_DM_PRIV);
> diff --git a/xen/include/xsm/xsm.h b/xen/include/xsm/xsm.h
> index 9a23d2827c..d9e5c831f3 100644
> --- a/xen/include/xsm/xsm.h
> +++ b/xen/include/xsm/xsm.h
> @@ -155,9 +155,9 @@ struct xsm_ops {
>       int (*hvm_altp2mhvm_op)(struct domain *d, uint64_t mode, uint32_t op);
>       int (*get_vnumainfo)(struct domain *d);
>   
> +#ifdef CONFIG_VM_EVENT
>       int (*vm_event_control)(struct domain *d, int mode, int op);
>   
> -#ifdef CONFIG_VM_EVENT
>       int (*mem_access)(struct domain *d);
>   #endif
>   
> @@ -649,13 +649,13 @@ static inline int xsm_get_vnumainfo(xsm_default_t def, struct domain *d)
>       return alternative_call(xsm_ops.get_vnumainfo, d);
>   }
>   
> +#ifdef CONFIG_VM_EVENT
>   static inline int xsm_vm_event_control(
>       xsm_default_t def, struct domain *d, int mode, int op)
>   {
>       return alternative_call(xsm_ops.vm_event_control, d, mode, op);
>   }
>   
> -#ifdef CONFIG_VM_EVENT
>   static inline int xsm_mem_access(xsm_default_t def, struct domain *d)
>   {
>       return alternative_call(xsm_ops.mem_access, d);
> diff --git a/xen/xsm/dummy.c b/xen/xsm/dummy.c
> index 8b7e01b506..96dc82ac2e 100644
> --- a/xen/xsm/dummy.c
> +++ b/xen/xsm/dummy.c
> @@ -115,9 +115,9 @@ static const struct xsm_ops __initconst_cf_clobber dummy_ops = {
>       .remove_from_physmap           = xsm_remove_from_physmap,
>       .map_gmfn_foreign              = xsm_map_gmfn_foreign,
>   
> +#ifdef CONFIG_VM_EVENT
>       .vm_event_control              = xsm_vm_event_control,
>   
> -#ifdef CONFIG_VM_EVENT
>       .mem_access                    = xsm_mem_access,
>   #endif
>   
> diff --git a/xen/xsm/flask/hooks.c b/xen/xsm/flask/hooks.c
> index b0308e1b26..9f3915617c 100644
> --- a/xen/xsm/flask/hooks.c
> +++ b/xen/xsm/flask/hooks.c
> @@ -1365,12 +1365,12 @@ static int cf_check flask_hvm_altp2mhvm_op(struct domain *d, uint64_t mode, uint
>       return current_has_perm(d, SECCLASS_HVM, HVM__ALTP2MHVM_OP);
>   }
>   
> +#ifdef CONFIG_VM_EVENT
>   static int cf_check flask_vm_event_control(struct domain *d, int mode, int op)
>   {
>       return current_has_perm(d, SECCLASS_DOMAIN2, DOMAIN2__VM_EVENT);
>   }
>   
> -#ifdef CONFIG_VM_EVENT
>   static int cf_check flask_mem_access(struct domain *d)
>   {
>       return current_has_perm(d, SECCLASS_DOMAIN2, DOMAIN2__MEM_ACCESS);
> @@ -1967,9 +1967,9 @@ static const struct xsm_ops __initconst_cf_clobber flask_ops = {
>       .do_xsm_op = do_flask_op,
>       .get_vnumainfo = flask_get_vnumainfo,
>   
> +#ifdef CONFIG_VM_EVENT
>       .vm_event_control = flask_vm_event_control,
>   
> -#ifdef CONFIG_VM_EVENT
>       .mem_access = flask_mem_access,
>   #endif
>   

Acked-by: Daniel P. Smith 


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Subject: Re: [PATCH v3 2/7] xen/xsm: wrap xsm_vm_event_control() with
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To: "Daniel P. Smith" 
Cc: ray.huang@amd.com, grygorii_strashko@epam.com,
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References: <20251121091554.1003315-1-Penny.Zheng@amd.com>
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On 25.11.2025 15:57, Daniel P. Smith wrote:
> On 11/21/25 4:15 AM, Penny Zheng wrote:
>> Function xsm_vm_event_control() is only invoked under CONFIG_VM_EVENT, so
>> it shall be wrapped with it, otherwiae it will become unreachable when
> 
> otherwiae --> otherwise (maybe committer is willing to fix on commit?)

Sure.

Jan


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Date: Tue, 25 Nov 2025 16:03:46 +0100
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To: Ludovic.Desroches@microchip.com, simona@ffwll.ch, airlied@gmail.com,
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Hi

Am 25.11.25 um 15:39 schrieb Ludovic.Desroches@microchip.com:
> On 8/21/25 10:17, Thomas Zimmermann wrote:
>> Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch and
>> buffer size. Align the pitch to a multiple of 8.

I missed a chance to explain it here. :/

>>
>> Push the current calculation into the only direct caller imx. Imx's
>> hardware requires the framebuffer width to be aligned to 8. The
>> driver's current approach is actually incorrect, as it only guarantees
>> this implicitly and requires bpp to be a multiple of 8 already. A
>> later commit will fix this problem by aligning the scanline pitch
>> such that an aligned width still fits into each scanline's memory.
>>
>> A number of other drivers are build on top of gem-dma helpers and
>> implement their own dumb-buffer allocation. These drivers invoke
>> drm_gem_dma_dumb_create_internal(), which is not affected by this
>> commit.
>>
>> v5:
>> - avoid reset of arguments (Tomi)
>>
>> Signed-off-by: Thomas Zimmermann 
>> Reviewed-by: Tomi Valkeinen 
>> ---
>>    drivers/gpu/drm/drm_gem_dma_helper.c     | 7 +++++--
>>    drivers/gpu/drm/imx/ipuv3/imx-drm-core.c | 4 +++-
>>    2 files changed, 8 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/drm_gem_dma_helper.c b/drivers/gpu/drm/drm_gem_dma_helper.c
>> index 4f0320df858f..ab1a70b1d6f1 100644
>> --- a/drivers/gpu/drm/drm_gem_dma_helper.c
>> +++ b/drivers/gpu/drm/drm_gem_dma_helper.c
>> @@ -20,6 +20,7 @@
>>    #include 
>>    #include 
>>    #include 
>> +#include 
>>    #include 
>>    #include 
>>    
>> @@ -304,9 +305,11 @@ int drm_gem_dma_dumb_create(struct drm_file *file_priv,
>>    			    struct drm_mode_create_dumb *args)
>>    {
>>    	struct drm_gem_dma_object *dma_obj;
>> +	int ret;
>>    
>> -	args->pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
>> -	args->size = args->pitch * args->height;
>> +	ret = drm_mode_size_dumb(drm, args, SZ_8, 0);
>> +	if (ret)
>> +		return ret;
> Hi,
>
> Was it intentional for this change to alter the pitch?

Most hardware does not need the pitch to be of a certain alignment. But 
these buffers are possibly shared with other hardware, which sometimes 
needs alignment to certain values. Using SZ_8 improves compatible with 
that hardware.

>
> The alignment requirement has been updated—from 8-bit alignment to
> 64-bit alignment. Since the pitch is expressed in bytes, we should pass
> SZ_1 instead of SZ_8 for hw_patch_align.
>
> For example, for an 850×480 framebuffer at 16 bpp, the pitch should be
> 1700 bytes. With the new alignment, the pitch becomes 1704 bytes.

Many display modes have an 8-byte alignment in their width. 850 pixels 
is somewhat of an exception.

>
> Please let me know if you’d like me to submit a fix.

Do you see a bug with your hardware? Unless this creates a real problem, 
I'd like to keep it as it is now.

Best regards
Thomas

>
> Regards,
> Ludovic
>
>
>>    
>>    	dma_obj = drm_gem_dma_create_with_handle(file_priv, drm, args->size,
>>    						 &args->handle);
>> diff --git a/drivers/gpu/drm/imx/ipuv3/imx-drm-core.c b/drivers/gpu/drm/imx/ipuv3/imx-drm-core.c
>> index ec5fd9a01f1e..af4a30311e18 100644
>> --- a/drivers/gpu/drm/imx/ipuv3/imx-drm-core.c
>> +++ b/drivers/gpu/drm/imx/ipuv3/imx-drm-core.c
>> @@ -145,8 +145,10 @@ static int imx_drm_dumb_create(struct drm_file *file_priv,
>>    	int ret;
>>    
>>    	args->width = ALIGN(width, 8);
>> +	args->pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
>> +	args->size = args->pitch * args->height;
>>    
>> -	ret = drm_gem_dma_dumb_create(file_priv, drm, args);
>> +	ret = drm_gem_dma_dumb_create_internal(file_priv, drm, args);
>>    	if (ret)
>>    		return ret;
>>    

-- 
--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Frankenstr. 146, 90461 Nürnberg, Germany, www.suse.com
GF: Jochen Jaser, Andrew McDonald, Werner Knoblich, (HRB 36809, AG Nürnberg)




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Date: Tue, 25 Nov 2025 15:09:39 +0000
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Subject: Re: [PATCH] vgic-v3: Ignore writes to
 GICD_ISACTIVER{nE}..GICD_ISACTIVER{nE}N
To: Michal Orzel , xen-devel@lists.xenproject.org
Cc: Stefano Stabellini ,
 Bertrand Marquis ,
 Volodymyr Babchuk 
References: <20251125120308.65981-1-michal.orzel@amd.com>
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From: Julien Grall 
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Hi,

On 25/11/2025 12:03, Michal Orzel wrote:
> Similar to other registers like ICPENDR and ICACTIVER, ignore the writes
> instead of injecting fault into the guest and thus crashing it.

Sure... But you are potentially introducing an instability in the guest 
OS which may be difficult to diagnose. So why is it better?

> This was
> already the case for extended registers prior to introducing GICV3_ESPI.

Why only the vGICv3?

> 
> Signed-off-by: Michal Orzel 
> ---
>   xen/arch/arm/vgic-v3.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
> index 8b1c8eef8024..33dfd13dccf1 100644
> --- a/xen/arch/arm/vgic-v3.c
> +++ b/xen/arch/arm/vgic-v3.c
> @@ -887,7 +887,8 @@ static int __vgic_v3_distr_common_mmio_write(const char *name, struct vcpu *v,
>               printk(XENLOG_G_ERR
>                      "%pv: %s: unhandled word write %#"PRIregister" to ISACTIVER%dE\n",
>                      v, name, r, reg - GICD_ISACTIVERnE);
> -        return 0;
> +
> +        goto write_ignore;

I know we already use that for ICACTIVER. But this is against the 
specification. We can't just ignore a guest asking to activate an interrupt.

The commit message really some details on why we want to do ignore the 
write (IOW is this impacting an OS) and what's the consequence to ignore 
the request?

>   
>       case VRANGE32(GICD_ICACTIVER, GICD_ICACTIVERN):
>       case VRANGE32(GICD_ICACTIVERnE, GICD_ICACTIVERnEN):

Cheers,

-- 
Julien Grall



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Subject: Re: [PATCH v3] EFI/runtime: switch to xv[mz]alloc_array()
To: Jan Beulich 
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On 8/25/25 7:06 AM, Jan Beulich wrote:
> On 14.08.2025 08:46, Jan Beulich wrote:
>> On 14.08.2025 02:29, Daniel P. Smith wrote:
>>> On 8/12/25 02:12, Jan Beulich wrote:
>>>> On 12.08.2025 02:19, Daniel P. Smith wrote:
>>>>> On 7/23/25 09:39, Jan Beulich wrote:
>>>>>> Use the more "modern" form, thus doing away with effectively open-coding
>>>>>> xmalloc_array() at the same time. While there is a difference in
>>>>>> generated code, as xmalloc_bytes() forces SMP_CACHE_BYTES alignment, if
>>>>>> code really cared about such higher than default alignment, it should
>>>>>> request so explicitly.
>>>>>
>>>>> While I don't object to the change itself, I think this description is a
>>>>> bit over simplification of the change. If the allocation is under
>>>>> PAGE_SIZE, then they are equivalent, but if it is over the page size
>>>>> there are a few more differences than just cache alignment. It
>>>>> completely changes the underlying allocator. I personally also find it a
>>>>> bit of a stretch to call xmalloc_bytes(size) an open coded version of
>>>>> xmalloc_array(char, size).
>>>>
>>>> My take is that xmalloc_bytes() should never have existed. Hence why I
>>>> didn't add xzmalloc_bytes() when introducing that family of interfaces.
>>>
>>> Right, which would be a valid argument for replacing it with
>>> xmalloc_array(). Though, I would note that there is an xzalloc_bytes().
>>> My concern was that you stated there was an open coding, which had me
>>> expecting there was a line of the form, xmanlloc_bytes(count *
>>> size_of_something bigger), being replaced by
>>> xvmalloc_arryay(something_bigger, count).
>>
>> Both fir this and ...
>>
>>> IMHO, while the C spec does specify char as 1 byte and thus
>>> interchangeable, I would agree that from a contextual perspective,
>>> xmalloc_array() is the more appropriate call. The use of the allocation
>>> is a character array and not a chunk of bytes for an arbitrary buffer.
>>
>> ... for this: Hence my wording using "effectively".
>>
>>>>> With a stronger description of the change,
>>>>
>>>> So what exactly do you mean by "stronger"? I can add that in the unlikely
>>>> event that one of the allocations is (near) PAGE_SIZE or larger, we now
>>>> wouldn't require contiguous memory anymore. Yet based on your comment at
>>>> the top I'm not quite sure if that's what you're after and/or enough to
>>>> satisfy your request.
>>>
>>> The phrasing stronger was meant to be more clear on the change/effect,
>>> specifically that the underlying allocator is being changed when the
>>> allocation is greater than a PAGE_SIZE. Not necessarily a long
>>> explanation, just the fact that the allocation will be coming from the
>>> dom heap allocator as opposed to the xen heap allocator. There are
>>> implications to changing the allocater, e.g.,  at a minimum the
>>> allocation order and nonphysical vs. physically contiguous effects.
>>> Having it noted in the commit makes it more obvious what this change is
>>> actually doing. Which may not be obvious when seeing the simple line
>>> changes occurring in the diff. Later, if there is an unexpected
>>> consequence caused by this change, a stronger commit will be helpful
>>> with the bisection investigations.
>>
>> First: I don't think each and every such change (there are going to be many)
>> should re-explain the switch to the xvmalloc() family of functions. This is
>> already stated clearly at the top of xvmalloc.h: Over time, the entire code
>> base is meant to be switched.
>>
>> Beyond that, to achieve the stronger wording you're after, would it perhaps
>> suffice to have the first sentence say "..., thus also doing away ..."?
>> Otherwise, may I ask that you please make a more concrete suggestion?
> 
> Ping. I'd like to get this in, yet I still don't know how exactly to satisfy
> your request for a stronger description.
> 
> Jan

This fell off my plate and not fair to Jan, I will just rescind my concern.

Acked-by: Daniel P. Smith 


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Subject: Re: [PATCH v4 08/24] xen/domctl: wrap domain_kill() with
 CONFIG_MGMT_HYPERCALLS
To: Penny Zheng 
Cc: ray.huang@amd.com, grygorii_strashko@epam.com,
 Stefano Stabellini , Julien Grall ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Andrew Cooper ,
 Anthony PERARD ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Timothy Pearson ,
 Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Oleksii Kurochko ,
 xen-devel@lists.xenproject.org
References: <20251121105801.1251262-1-Penny.Zheng@amd.com>
 <20251121105801.1251262-9-Penny.Zheng@amd.com>
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On 21.11.2025 11:57, Penny Zheng wrote:
> Function domain_kill() is responsible for killing domain and relinquish
> domain-held resources. and it is only invoked under
> XEN_DOMCTL_destroydomain-case. So it shall be wrapped with
> CONFIG_MGMT_HYPERCALLS.
> Tracking its calling chain, the following functions could also be wrapped with
> CONFIG_MGMT_HYPERCALLS:
> - domain_relinquish_resource
>   - pci_release_device
>   - paging_teardown
>     - p2m_pod_empty_cache
>   - relinquish_memory
>   - pit_deinit
>   - iommu_release_dt_devices
>   - tee_relinquish_resources
>     - ffa_relinquish_resources/optee_relinquish_resources
>   - relinquish_p2m_mapping
>   - p2m_clear_root_pages
> Otherwise all these functions will become unreachable codes when
> MGMT_HYPERCALLS=n, and hence violating Misra rule 2.1.
> The reason why {arch_}domain_teardown() is not wrapped is that it is also used
> on the failure path of domain_create(). And the exclusion of
> paging_final_teardown() is blocked by domain_destroy(), which will be
> triggered when d->refcnt equals zero.
> 
> Signed-off-by: Penny Zheng 
> Reviewed-by: Stefano Stabellini 

Acked-by: Jan Beulich 



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Subject: Re: [PATCH v4 14/24] xen/domctl: wrap pci-subset iommu-related domctl
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To: Penny Zheng 
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 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Jason Andryuk ,
 "Daniel P. Smith" ,
 xen-devel@lists.xenproject.org
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On 21.11.2025 11:57, Penny Zheng wrote:
>  xen/drivers/passthrough/amd/pci_amd_iommu.c | 20 ++++----
>  xen/drivers/passthrough/pci.c               | 52 +++++++++++----------
>  xen/drivers/passthrough/vtd/iommu.c         |  6 ++-
>  xen/include/xsm/dummy.h                     |  6 ++-
>  xen/include/xsm/xsm.h                       | 12 +++--
>  xen/xsm/dummy.c                             |  6 ++-
>  xen/xsm/flask/hooks.c                       | 12 +++--
>  7 files changed, 68 insertions(+), 46 deletions(-)

With this diffstat and there being quite a few HAS_PCI under
xen/drivers/passthrough/arm/, what's the (PCI) deal there?
> @@ -772,14 +774,16 @@ static const struct iommu_ops __initconst_cf_clobber _iommu_ops = {
>      .quarantine_init = amd_iommu_quarantine_init,
>      .add_device = amd_iommu_add_device,
>      .remove_device = amd_iommu_remove_device,
> -    .assign_device  = amd_iommu_assign_device,
>      .teardown = amd_iommu_domain_destroy,
>      .clear_root_pgtable = amd_iommu_clear_root_pgtable,
>      .map_page = amd_iommu_map_page,
>      .unmap_page = amd_iommu_unmap_page,
>      .iotlb_flush = amd_iommu_flush_iotlb_pages,
> +#ifdef CONFIG_MGMT_HYPERCALLS
> +    .assign_device  = amd_iommu_assign_device,
>      .reassign_device = reassign_device,
>      .get_device_group_id = amd_iommu_group_id,
> +#endif

You don't zap the hooks themselves, i.e. they end up being NULL now in
the (still only hypothetical, provided the Kconfig change will be adjusted)
case of MGMT_HYPERCALLS=n. I understand the former two hooks are still
needed for DT, but at least .get_device_group_id should be properly dealt
with in xen/iommu.h right away, imo. This would then also clarify already
here that that's the plan for the other two hooks as well.

> --- a/xen/include/xsm/dummy.h
> +++ b/xen/include/xsm/dummy.h
> @@ -407,7 +407,8 @@ static XSM_INLINE int cf_check xsm_get_vnumainfo(
>      return xsm_default_action(action, current->domain, d);
>  }
>  
> -#if defined(CONFIG_HAS_PASSTHROUGH) && defined(CONFIG_HAS_PCI)
> +#if defined(CONFIG_HAS_PASSTHROUGH) && defined(CONFIG_MGMT_HYPERCALLS)
> +#ifdef CONFIG_HAS_PCI

Why the separate #ifdef? Can't that be folded with the #if? Are there further
changes to be put inside the outer #if? (Applies again further down as well.)

>  static XSM_INLINE int cf_check xsm_get_device_group(
>      XSM_DEFAULT_ARG uint32_t machine_bdf)
>  {
> @@ -429,7 +430,8 @@ static XSM_INLINE int cf_check xsm_deassign_device(
>      return xsm_default_action(action, current->domain, d);
>  }
>  
> -#endif /* HAS_PASSTHROUGH && HAS_PCI */
> +#endif /* CONFIG_HAS_PCI */
> +#endif /* HAS_PASSTHROUGH && MGMT_HYPERCALLS */
>  
>  #if defined(CONFIG_HAS_PASSTHROUGH) && defined(CONFIG_HAS_DEVICE_TREE_DISCOVERY)
>  static XSM_INLINE int cf_check xsm_assign_dtdevice(

The DT counterpart, otoh, is separate anyway.

Jan


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Subject: Re: [PATCH v4 16/24] xen/domctl: wrap iommu-related domctl op with
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To: Penny Zheng 
Cc: ray.huang@amd.com, grygorii_strashko@epam.com,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 21.11.2025 11:57, Penny Zheng wrote:
> Function iommu_do_domctl() is the main entry for all iommu-related domctl-op,
> and shall be wrapped with CONFIG_MGMT_HYPERCALLS.
> Otherwise it will become unreachable when MGMT_HYPERCALLS=n, and hence
> violating Misra rule 2.1
> 
> Signed-off-by: Penny Zheng 
> ---
> v3 -> v4:
> - new commit
> ---
> Commit "xen/domctl: wrap pci-subset iommu-related domctl op with
> CONFIG_MGMT_HYPERCALLS" and "xen/domctl: wrap device-tree-subset iommu-related
> domctl op with CONFIG_MGMT_HYPERCALLS" are the prereq commit.

You state the normal thing here: The general assumption is that later patches
in a series depend on earlier ones. What you want to state is when this general
rule doesn't apply, i.e. when patches can move ahead (some or entirely), and
hence can be committed when they alone are ready, without having other
dependencies (or with having only some).

> ---
>  xen/drivers/passthrough/iommu.c | 2 ++
>  1 file changed, 2 insertions(+)

The latest here xen/iommu.h also needs touching, as just said in reply to
patch 14. Unused hooks shall stay around.

Jan


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Subject: Re: [PATCH v4 19/24] xen/domctl: wrap hvm_save{,load} with
 CONFIG_MGMT_HYPERCALLS
To: Penny Zheng 
Cc: ray.huang@amd.com, grygorii_strashko@epam.com,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 21.11.2025 11:57, Penny Zheng wrote:
> The following functions have been referenced in places which is either guarded
> with CONFIG_MGMT_HYPERCALLS or CONFIG_MEM_SHARING:
> - arch_hvm_save
> - arch_hvm_check
> - arch_hvm_load
> - hvm_save_size
> - hvm_save
> - hvm_load
> While CONFIG_MEM_SHARING is also dependent on CONFIG_MGMT_HYPERCALLS.
> So they shall be wrapped under MGMT_HYPERCALLS, otherwise they will become
> unreachable codes when MGMT_HYPERCALLS=n, and hence violating Misra rule 2.1.
> We move arch_hvm_save(), arch_hvm_check(), arch_hvm_load() and hvm_save_size()
> nearer to the left functions, to avoid scattered #ifdef-wrapping.

Why would you move things? What is in this source file that is of any use when
MGMT_HYPERCALLS=n? The only caller of hvm_save_one() lives in x86/domctl.c. With
that also removed, hvm_sr_handlers[] is only ever written to afaict, which means
that's an effectively dead array then too.

The final few functions ...

> @@ -390,6 +391,7 @@ int hvm_load(struct domain *d, bool real, hvm_domain_context_t *h)
>  
>      /* Not reached */
>  }
> +#endif /* CONFIG_MGMT_HYPERCALLS */
>  
>  int _hvm_init_entry(struct hvm_domain_context *h, uint16_t tc, uint16_t inst,
>                      uint32_t len)

... here and below are only helpers for the save/restore machinery, i.e. that
_all_ is also usable only when MGMT_HYPERCALLS=y. Yes, that's a lot of further
work, but what do you do? You'll then have quite a bit more code removed from
the set that as per coverage analysis is never reached.

Jan


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Date: Tue, 25 Nov 2025 18:30:08 +0200
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Subject: Re: [PATCH v4 19/24] xen/domctl: wrap hvm_save{,load} with
 CONFIG_MGMT_HYPERCALLS
To: Jan Beulich , Penny Zheng 
Cc: ray.huang@amd.com, Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org
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Hi Jan, Penny,

On 25.11.25 17:59, Jan Beulich wrote:
> On 21.11.2025 11:57, Penny Zheng wrote:
>> The following functions have been referenced in places which is either guarded
>> with CONFIG_MGMT_HYPERCALLS or CONFIG_MEM_SHARING:
>> - arch_hvm_save
>> - arch_hvm_check
>> - arch_hvm_load
>> - hvm_save_size
>> - hvm_save
>> - hvm_load
>> While CONFIG_MEM_SHARING is also dependent on CONFIG_MGMT_HYPERCALLS.
>> So they shall be wrapped under MGMT_HYPERCALLS, otherwise they will become
>> unreachable codes when MGMT_HYPERCALLS=n, and hence violating Misra rule 2.1.
>> We move arch_hvm_save(), arch_hvm_check(), arch_hvm_load() and hvm_save_size()
>> nearer to the left functions, to avoid scattered #ifdef-wrapping.
> 
> Why would you move things? What is in this source file that is of any use when
> MGMT_HYPERCALLS=n? The only caller of hvm_save_one() lives in x86/domctl.c. With
> that also removed, hvm_sr_handlers[] is only ever written to afaict, which means
> that's an effectively dead array then too.
> 
> The final few functions ...
> 
>> @@ -390,6 +391,7 @@ int hvm_load(struct domain *d, bool real, hvm_domain_context_t *h)
>>   
>>       /* Not reached */
>>   }
>> +#endif /* CONFIG_MGMT_HYPERCALLS */
>>   
>>   int _hvm_init_entry(struct hvm_domain_context *h, uint16_t tc, uint16_t inst,
>>                       uint32_t len)
> 
> ... here and below are only helpers for the save/restore machinery, i.e. that
> _all_ is also usable only when MGMT_HYPERCALLS=y. Yes, that's a lot of further
> work, but what do you do? You'll then have quite a bit more code removed from
> the set that as per coverage analysis is never reached.

I have a local patch which allows to disable all HVM save/load code at once by using
separated Kconfig option SAVE_RESTORE.

+++ b/xen/arch/x86/hvm/Kconfig
@@ -127,4 +127,8 @@ config VHPET

+config SAVE_RESTORE
+    depends on MGMT_HYPERCALLS
+    def_bool y

SAVE_RESTORE - annotates all HVM save/load code and, in general, could made a feature by
allowing it to be selectable.
Of course, It all can be done by just using MGMT_HYPERCALLS.

So, I'd be appreciated for you opinion - does it make sense to have separate SAVE_RESTORE?

-- 
Best regards,
-grygorii



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Date: Tue, 25 Nov 2025 17:40:41 +0100
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Subject: Re: [PATCH v4 19/24] xen/domctl: wrap hvm_save{,load} with
 CONFIG_MGMT_HYPERCALLS
To: Grygorii Strashko 
Cc: ray.huang@amd.com, Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org, Penny Zheng 
References: <20251121105801.1251262-1-Penny.Zheng@amd.com>
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On 25.11.2025 17:30, Grygorii Strashko wrote:
> On 25.11.25 17:59, Jan Beulich wrote:
>> On 21.11.2025 11:57, Penny Zheng wrote:
>>> The following functions have been referenced in places which is either guarded
>>> with CONFIG_MGMT_HYPERCALLS or CONFIG_MEM_SHARING:
>>> - arch_hvm_save
>>> - arch_hvm_check
>>> - arch_hvm_load
>>> - hvm_save_size
>>> - hvm_save
>>> - hvm_load
>>> While CONFIG_MEM_SHARING is also dependent on CONFIG_MGMT_HYPERCALLS.
>>> So they shall be wrapped under MGMT_HYPERCALLS, otherwise they will become
>>> unreachable codes when MGMT_HYPERCALLS=n, and hence violating Misra rule 2.1.
>>> We move arch_hvm_save(), arch_hvm_check(), arch_hvm_load() and hvm_save_size()
>>> nearer to the left functions, to avoid scattered #ifdef-wrapping.
>>
>> Why would you move things? What is in this source file that is of any use when
>> MGMT_HYPERCALLS=n? The only caller of hvm_save_one() lives in x86/domctl.c. With
>> that also removed, hvm_sr_handlers[] is only ever written to afaict, which means
>> that's an effectively dead array then too.
>>
>> The final few functions ...
>>
>>> @@ -390,6 +391,7 @@ int hvm_load(struct domain *d, bool real, hvm_domain_context_t *h)
>>>   
>>>       /* Not reached */
>>>   }
>>> +#endif /* CONFIG_MGMT_HYPERCALLS */
>>>   
>>>   int _hvm_init_entry(struct hvm_domain_context *h, uint16_t tc, uint16_t inst,
>>>                       uint32_t len)
>>
>> ... here and below are only helpers for the save/restore machinery, i.e. that
>> _all_ is also usable only when MGMT_HYPERCALLS=y. Yes, that's a lot of further
>> work, but what do you do? You'll then have quite a bit more code removed from
>> the set that as per coverage analysis is never reached.
> 
> I have a local patch which allows to disable all HVM save/load code at once by using
> separated Kconfig option SAVE_RESTORE.
> 
> +++ b/xen/arch/x86/hvm/Kconfig
> @@ -127,4 +127,8 @@ config VHPET
> 
> +config SAVE_RESTORE
> +    depends on MGMT_HYPERCALLS
> +    def_bool y
> 
> SAVE_RESTORE - annotates all HVM save/load code and, in general, could made a feature by
> allowing it to be selectable.
> Of course, It all can be done by just using MGMT_HYPERCALLS.
> 
> So, I'd be appreciated for you opinion - does it make sense to have separate SAVE_RESTORE?

Yes, why not? The granularity of MGMT_HYPERCALLS is getting a little unwieldy
anyway, so why not leverage what you have to split it up at least some. (Of
course much depends on how intrusive that change is. Then again the same
intrusiveness would have to be expected if it all went under MGMT_HYPERCALLS.)

Jan


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Subject: Re: [PATCH v4 19/24] xen/domctl: wrap hvm_save{,load} with
 CONFIG_MGMT_HYPERCALLS
To: Grygorii Strashko 
Cc: ray.huang@amd.com, Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org, Penny Zheng 
References: <20251121105801.1251262-1-Penny.Zheng@amd.com>
 <20251121105801.1251262-20-Penny.Zheng@amd.com>
 <13cded84-19b7-432d-a9b1-2b9ad9f83283@suse.com>
 
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On 25.11.2025 17:30, Grygorii Strashko wrote:
> On 25.11.25 17:59, Jan Beulich wrote:
>> On 21.11.2025 11:57, Penny Zheng wrote:
>>> The following functions have been referenced in places which is either guarded
>>> with CONFIG_MGMT_HYPERCALLS or CONFIG_MEM_SHARING:
>>> - arch_hvm_save
>>> - arch_hvm_check
>>> - arch_hvm_load
>>> - hvm_save_size
>>> - hvm_save
>>> - hvm_load
>>> While CONFIG_MEM_SHARING is also dependent on CONFIG_MGMT_HYPERCALLS.
>>> So they shall be wrapped under MGMT_HYPERCALLS, otherwise they will become
>>> unreachable codes when MGMT_HYPERCALLS=n, and hence violating Misra rule 2.1.
>>> We move arch_hvm_save(), arch_hvm_check(), arch_hvm_load() and hvm_save_size()
>>> nearer to the left functions, to avoid scattered #ifdef-wrapping.
>>
>> Why would you move things? What is in this source file that is of any use when
>> MGMT_HYPERCALLS=n? The only caller of hvm_save_one() lives in x86/domctl.c. With
>> that also removed, hvm_sr_handlers[] is only ever written to afaict, which means
>> that's an effectively dead array then too.
>>
>> The final few functions ...
>>
>>> @@ -390,6 +391,7 @@ int hvm_load(struct domain *d, bool real, hvm_domain_context_t *h)
>>>   
>>>       /* Not reached */
>>>   }
>>> +#endif /* CONFIG_MGMT_HYPERCALLS */
>>>   
>>>   int _hvm_init_entry(struct hvm_domain_context *h, uint16_t tc, uint16_t inst,
>>>                       uint32_t len)
>>
>> ... here and below are only helpers for the save/restore machinery, i.e. that
>> _all_ is also usable only when MGMT_HYPERCALLS=y. Yes, that's a lot of further
>> work, but what do you do? You'll then have quite a bit more code removed from
>> the set that as per coverage analysis is never reached.
> 
> I have a local patch which allows to disable all HVM save/load code at once by using
> separated Kconfig option SAVE_RESTORE.
> 
> +++ b/xen/arch/x86/hvm/Kconfig
> @@ -127,4 +127,8 @@ config VHPET
> 
> +config SAVE_RESTORE
> +    depends on MGMT_HYPERCALLS
> +    def_bool y
> 
> SAVE_RESTORE - annotates all HVM save/load code and, in general, could made a feature by
> allowing it to be selectable.

Oh, one more thing: SAVE_RESTORE, simply by its name, promises to cover PV as well.
That either wants to be the case, or the name may want adjusting.

Jan


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From: "Tu Dinh" 
Subject: =?utf-8?Q?[PATCH=20v2]=20x86/vhpet:=20Fix=20sanitization=20of=20legacy=20IRQ=20route?=
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To: xen-devel@lists.xenproject.org
Cc: "Tu Dinh" , "Jan Beulich" , "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" 
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When setting a timer's config register, timer_sanitize_int_route will
always reset the IRQ route value to what's valid corresponding to the
!HPET_CFG_LEGACY case. This is applied even if the HPET is set to
HPET_CFG_LEGACY.

When some operating systems (e.g. Windows) try to write to a timer
config, they will verify and rewrite the register if the values don't
match what they expect. This causes an unnecessary write to HPET_Tn_CFG.

Note, the HPET specification states that for the Tn_INT_ROUTE_CNF field:

"If the value is not supported by this prarticular timer, then the value
read back will not match what is written. [...] If the LegacyReplacement
Route bit is set, then Timers 0 and 1 will have a different routing, and
this bit field has no effect for those two timers."

Therefore, Xen should not reset timer_int_route if legacy mode is
enabled, regardless of what's in there.

Fixes: ec40d3fe2147 ("x86/vhpet: check that the set interrupt route is valid")
Signed-off-by: Tu Dinh 
---
v2:
* Add timer_is_legacy check to timer_int_route_valid.
* Add comment to the timer_sanitize_int_route call in hpet_write(HPET_CFG).
---
 xen/arch/x86/hvm/hpet.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/hvm/hpet.c b/xen/arch/x86/hvm/hpet.c
index f0e5f877f4..e317ec1f5f 100644
--- a/xen/arch/x86/hvm/hpet.c
+++ b/xen/arch/x86/hvm/hpet.c
@@ -48,6 +48,8 @@
 #define timer_is_32bit(h, n)     (timer_config(h, n) & HPET_TN_32BIT)
 #define hpet_enabled(h)          ((h)->hpet.config & HPET_CFG_ENABLE)
 #define timer_level(h, n)        (timer_config(h, n) & HPET_TN_LEVEL)
+#define timer_is_legacy(h, n) \
+    (((n) <= 1) && ((h)->hpet.config & HPET_CFG_LEGACY))
 
 #define timer_int_route(h, n)    MASK_EXTR(timer_config(h, n), HPET_TN_ROUTE)
 
@@ -55,7 +57,8 @@
     MASK_EXTR(timer_config(h, n), HPET_TN_INT_ROUTE_CAP)
 
 #define timer_int_route_valid(h, n) \
-    ((1u << timer_int_route(h, n)) & timer_int_route_cap(h, n))
+    (timer_is_legacy(h, n) || \
+     ((1u << timer_int_route(h, n)) & timer_int_route_cap(h, n)))
 
 static inline uint64_t hpet_read_maincounter(HPETState *h, uint64_t guest_time)
 {
@@ -275,7 +278,7 @@ static void hpet_set_timer(HPETState *h, unsigned int tn,
             ? (uint32_t)diff : 0;
 
     destroy_periodic_time(&h->pt[tn]);
-    if ( (tn <= 1) && (h->hpet.config & HPET_CFG_LEGACY) )
+    if ( timer_is_legacy(h, tn) )
     {
         /* if LegacyReplacementRoute bit is set, HPET specification requires
            timer0 be routed to IRQ0 in NON-APIC or IRQ2 in the I/O APIC,
@@ -379,6 +382,14 @@ static int cf_check hpet_write(
         h->hpet.config = hpet_fixup_reg(new_val, old_val,
                                         HPET_CFG_ENABLE | HPET_CFG_LEGACY);
 
+        /*
+         * The first 2 channels' interrupt route values only matter when
+         * HPET_CFG_LEGACY is disabled. However, for simplicity's sake, always
+         * resanitize all channels anyway.
+         */
+        for ( i = 0; i < HPET_TIMER_NUM; i++ )
+            timer_sanitize_int_route(h, i);
+
         if ( !(old_val & HPET_CFG_ENABLE) && (new_val & HPET_CFG_ENABLE) )
         {
             /* Enable main counter and interrupt generation. */
-- 
2.43.0



--
Ngoc Tu Dinh | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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Subject: Re: [PATCH v4 00/24] Disable domctl-op via CONFIG_MGMT_HYPERCALLS
To: Penny Zheng 
Cc: ray.huang@amd.com, grygorii_strashko@epam.com,
 Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Stewart Hildebrand ,
 "Daniel P. Smith" ,
 Daniel De Graaf , Juergen Gross ,
 Bertrand Marquis ,
 Volodymyr Babchuk ,
 Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Oleksii Kurochko ,
 Nathan Studer ,
 Stewart Hildebrand , Dario Faggioli ,
 George Dunlap ,
 Timothy Pearson ,
 Meng Xu , Jason Andryuk ,
 Rahul Singh , xen-devel@lists.xenproject.org,
 xen-devel@dornerworks.com
References: <20251121105801.1251262-1-Penny.Zheng@amd.com>
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From: Jan Beulich 
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On 21.11.2025 11:57, Penny Zheng wrote:
> It can be beneficial for some dom0less systems to further reduce Xen footprint
> via disabling some hypercalls handling code, which may not to be used &
> required in such systems.
> We are introducing a new single Kconfig CONFIG_MGMT_HYPERCALLS to manage
> such hypercalls.
> 
> We are trying to disable hypercalls in the following aspects:
> - sysctl
> - domctl
> - hvm
> - physdev
> - platform
> This patch serie is only focusing on domctl-op. Different aspects will be
> covered in different patch serie.
> 
> Features, like VM event, or paging log-dirty support, which fully rely on
> domctl-op, will be wrapped with CONFIG_MGMT_HYPERCALLS, to reduce Xen
> footprint as much as possible.
> 
> It is derived from Stefano Stabellini's commit "xen: introduce kconfig options
> to disable hypercalls"(
> https://lore.kernel.org/xen-devel/20241219092917.3006174-1-Sergiy_Kibrik@epam.com)
> ---
> This patch serie is based on two patch serie, one is
> "[XEN][PATCH v4] xen: make VMTRACE support optional" and "
> [PATCH v3 0/7] consolidate vm event subsystem"

While looking at patch 20, I came to wonder what exactly the above means: By the
words, nothing in this series can go in ahead of those other patches. Which doesn't
seem quite right. Please can you state dependencies in a helpful (for reviewers as
well as committers) way?

Jan


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Subject: Re: [PATCH v4 20/24] xen/x86: wrap x86-specific domctl-op with
 CONFIG_MGMT_HYPERCALLS
To: Penny Zheng 
Cc: ray.huang@amd.com, grygorii_strashko@epam.com,
 Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 "Daniel P. Smith" ,
 xen-devel@lists.xenproject.org
References: <20251121105801.1251262-1-Penny.Zheng@amd.com>
 <20251121105801.1251262-21-Penny.Zheng@amd.com>
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From: Jan Beulich 
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On 21.11.2025 11:57, Penny Zheng wrote:
> --- a/xen/arch/x86/Kconfig
> +++ b/xen/arch/x86/Kconfig
> @@ -29,7 +29,7 @@ config X86
>  	select HAS_PCI_MSI
>  	select HAS_PIRQ
>  	select HAS_SCHED_GRANULARITY
> -	imply HAS_SOFT_RESET
> +	select HAS_SOFT_RESET if MGMT_HYPERCALLS

Why would you undo an "imply", when really we should use it more? One of its
purposes is so that you can add "depends on MGMT_HYPERCALLS" there, and it
then won't be auto-enabled if that dependency isn't fulfilled.

> --- a/xen/arch/x86/include/asm/paging.h
> +++ b/xen/arch/x86/include/asm/paging.h
> @@ -55,7 +55,7 @@
>  #define PG_translate   0
>  #define PG_external    0
>  #endif
> -#if defined(CONFIG_PAGING) && !defined(CONFIG_PV_SHIM_EXCLUSIVE)
> +#if defined(CONFIG_PAGING) && !defined(CONFIG_PV_SHIM_EXCLUSIVE) && defined(CONFIG_MGMT_HYPERCALLS)

This line is too long now.

> @@ -299,7 +299,9 @@ hypfs_op                           do       do       do       do       do
>  #endif
>  mca                                do       do       -        -        -
>  #if defined(CONFIG_X86) && defined(CONFIG_PAGING) && !defined(CONFIG_PV_SHIM_EXCLUSIVE)
> +#ifdef CONFIG_MGMT_HYPERCALLS

Why not combine with the existing #if?

Jan


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Date: Tue, 25 Nov 2025 18:24:33 +0100
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: "xen-devel@lists.xenproject.org" ,
	Andrew Cooper ,
	Julien Grall ,
	Stefano Stabellini ,
	Anthony PERARD ,
	Michal Orzel 
Subject: Re: [PATCH 1/2] symbols/x86: re-number intermediate files
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On Tue, Nov 25, 2025 at 03:13:28PM +0100, Jan Beulich wrote:
> In preparation to do away with symbols-dummy, re-number the file assembly
> and object files used, for the numbers to match the next passes real
> output. This is to make 0 available to use for what now is handled by
> symbols-dummy. (Mirror the numbering to the intermediate reloc files for
> xen.efi, just to avoid confusion.)
> 
> Signed-off-by: Jan Beulich 

Acked-by: Roger Pau Monné 

Thanks, Roger.


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Date: Tue, 25 Nov 2025 18:36:39 +0100
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: "xen-devel@lists.xenproject.org" ,
	Andrew Cooper ,
	Julien Grall ,
	Stefano Stabellini ,
	Anthony PERARD ,
	Michal Orzel 
Subject: Re: [PATCH 2/2] symbols/x86: don't use symbols-dummy
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On Tue, Nov 25, 2025 at 03:14:27PM +0100, Jan Beulich wrote:
> In particular when linking with lld, which converts hidden symbols to
> local ones, the ELF symbol table can change in unhelpful ways between the
> first two linking passes, resulting in the .rodata contributions to change
> between the 2nd and 3rd pass. That, however, renders our embedded symbol
> table pretty much unusable; the recently introduced self-test may then
> also fail. (Another difference between compiling a C file and assembling
> the generated ones is that - with -fdata-sections in use - the .rodata
> contributions move between passes 1 and 2, when we'd prefer them not to.)
> 
> Make tools/symbols capable of producing an "empty" assembly file, such
> that unwanted differences between passes 1 and 2 go away when then using
> the corresponding objects in place of common/symbols-dummy.o.
> 
> Reported-by: Andrew Cooper 
> Reported-by: Roger Pau Monné 
> Signed-off-by: Jan Beulich 

LGTM, not sure whether you want to extend to other arches in this
same patch, or simply guard the build of symbols-dummy.o for non-x86
arches.

> ---
> May want mirroring to other arch-es.
> 
> --- a/xen/arch/x86/Makefile
> +++ b/xen/arch/x86/Makefile
> @@ -134,8 +134,10 @@ $(TARGET): $(TARGET)-syms $(efi-y) $(obj
>  CFLAGS-$(XEN_BUILD_EFI) += -DXEN_BUILD_EFI
>  
>  $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds
> +	$(objtree)/tools/symbols $(all_symbols) --empty > $(dot-target).0.S
> +	$(MAKE) $(build)=$(@D) $(dot-target).0.o
>  	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \
> -	    $(objtree)/common/symbols-dummy.o -o $(dot-target).0

It would be good if we could now stop building symbols-dummy.o as part
of extra-y.  Maybe you could guard it with ifneq ($(CONFIG_X86),y) in
the Makefile?

Or otherwise remove this from all arches thus removing
common/symbols-dummy.c.

> +	      $(dot-target).0.o -o $(dot-target).0
>  	$(NM) -pa --format=sysv $(dot-target).0 \
>  		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
>  		> $(dot-target).1.S
> @@ -207,9 +209,11 @@ $(TARGET).efi: $(objtree)/prelink.o $(no
>  ifeq ($(CONFIG_DEBUG_INFO),y)
>  	$(if $(filter --strip-debug,$(EFI_LDFLAGS)),echo,:) "Will strip debug info from $(@F)"
>  endif
> +	$(objtree)/tools/symbols $(all_symbols) --empty > $(dot-target).0s.S
> +	$(MAKE) $(build)=$(@D) .$(@F).0s.o
>  	$(foreach base, $(VIRT_BASE) $(ALT_BASE), \
>  	          $(LD) $(call EFI_LDFLAGS,$(base)) -T $(obj)/efi.lds $< $(relocs-dummy) \
> -	                $(objtree)/common/symbols-dummy.o $(note_file_option) \
> +	                $(dot-target).0s.o $(note_file_option) \
>  	                -o $(dot-target).$(base).0 &&) :
>  	$(MKRELOC) $(foreach base,$(VIRT_BASE) $(ALT_BASE),$(dot-target).$(base).0) \
>  		> $(dot-target).1r.S
> --- a/xen/tools/symbols.c
> +++ b/xen/tools/symbols.c
> @@ -672,7 +672,10 @@ int main(int argc, char **argv)
>  				warn_dup = true;
>  			else if (strcmp(argv[i], "--error-dup") == 0)
>  				warn_dup = error_dup = true;
> -			else if (strcmp(argv[i], "--xensyms") == 0)
> +			else if (strcmp(argv[i], "--empty") == 0) {
> +				write_src();
> +				return 0;

Oh, that was easier than I was expecting for symbols to generate a
working empty assembly file.

Thanks, Roger.


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From: Kevin Lampis 
To: Andrew Cooper , "xen-devel@lists.xenproject.org"
	
CC: "jbeulich@suse.com" , Roger Pau Monne
	
Subject: Re: [PATCH] x86: Remove x86 prefixed names from cpuinfo for intel.c
Thread-Topic: [PATCH] x86: Remove x86 prefixed names from cpuinfo for intel.c
Thread-Index: AQHcXTQ73Jy0r9eIAkCAIFbbEnPqPbUCS7kAgAGHQ78=
Date: Tue, 25 Nov 2025 20:05:01 +0000
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Sorry I will pay more attention to the surrounding code in future.
________________________________
From: Andrew Cooper 
Sent: 24 November 2025 8:44 PM
To: Kevin Lampis ; xen-devel@lists.xenproject.org =

Cc: jbeulich@suse.com ; Roger Pau Monne 
Subject: Re: [PATCH] x86: Remove x86 prefixed names from cpuinfo for intel.=
c

On 24/11/2025 11:19 am, Kevin Lampis wrote:
> diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c
> index 6f71365b7e..5f780fe1aa 100644
> --- a/xen/arch/x86/cpu/intel.c
> +++ b/xen/arch/x86/cpu/intel.c
> @@ -86,7 +86,7 @@ static void __init check_memory_type_self_snoop_errata(=
void)
>        if (!boot_cpu_has(X86_FEATURE_SS))
>                return;
>
> -     switch (boot_cpu_data.x86_model) {
> +     switch (boot_cpu_data.model) {
>        case 0x0f: /* Merom */
>        case 0x16: /* Merom L */
>        case 0x17: /* Penryn */

One of the reasons of making these changes is identify the places
needing converting to VFM.  This is one, and...
> @@ -137,10 +137,10 @@ static void __init probe_masking_msrs(void)
>        unsigned int exp_msr_basic, exp_msr_ext, exp_msr_xsave;
>
>        /* Only family 6 supports this feature. */
> -     if (c->x86 !=3D 6)
> +     if (c->family !=3D 6)
>                return;
>
> -     switch (c->x86_model) {
> +     switch (c->model) {

... so is this.

~Andrew

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Sorry I will pay more attention to the surrounding code in future.






From: Andrew Cooper <and=
rew.cooper@citrix.com>

Sent: 24 November 2025 8:44 PM

To: Kevin Lampis <kevin.lampis@citrix.com>; xen-devel@lists.xe=
nproject.org <xen-devel@lists.xenproject.org>

Cc: jbeulich@suse.com <jbeulich@suse.com>; Roger Pau Monne <=
;roger.pau@citrix.com>

Subject: Re: [PATCH] x86: Remove x86 prefixed names from cpuinfo for=
 intel.c

 






On 24/11/2025 11:19 am, Kevin Lampis wrote:

> diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c

> index 6f71365b7e..5f780fe1aa 100644

> --- a/xen/arch/x86/cpu/intel.c

> +++ b/xen/arch/x86/cpu/intel.c

> @@ -86,7 +86,7 @@ static void __init check_memory_type_self_snoop_erra=
ta(void)

>        if (!boot_cpu_has(X86_FEATUR=
E_SS))

>            =
;    return;

>  

> -     switch (boot_cpu_data.x86_model) {

> +     switch (boot_cpu_data.model) {

>        case 0x0f: /* Merom */

>        case 0x16: /* Merom L */

>        case 0x17: /* Penryn */



One of the reasons of making these changes is identify the places

needing converting to VFM.  This is one, and...

> @@ -137,10 +137,10 @@ static void __init probe_masking_msrs(void)

>        unsigned int exp_msr_basic, =
exp_msr_ext, exp_msr_xsave;

>  

>        /* Only family 6 supports th=
is feature. */

> -     if (c->x86 !=3D 6)

> +     if (c->family !=3D 6)

>            =
;    return;

>  

> -     switch (c->x86_model) {

> +     switch (c->model) {



... so is this.



~Andrew








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From: Kevin Lampis 
To: Jan Beulich 
CC: Andrew Cooper , Roger Pau Monne
	, "xen-devel@lists.xenproject.org"
	
Subject: Re: [PATCH] x86: Remove x86 prefixed names from cpuinfo for intel.c
Thread-Topic: [PATCH] x86: Remove x86 prefixed names from cpuinfo for intel.c
Thread-Index: AQHcXTQ73Jy0r9eIAkCAIFbbEnPqPbUCC28AgAHIZe0=
Date: Tue, 25 Nov 2025 20:12:27 +0000
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> Bogus indentation would also want adjusting while touching the line=0A=
=0A=
All this code is using hard tabs that's why it looks wrong. If I convert on=
ly=0A=
this single statement `if` to spaces then I get a `misleading-indentation`=
=0A=
error so I have to convert the `if` block after it to spaces too.=0A=
I hope that's ok.=0A=


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From: Kevin Lampis 
To: xen-devel@lists.xenproject.org
Cc: jbeulich@suse.com,
	andrew.cooper3@citrix.com,
	roger.pau@citrix.com,
	Kevin Lampis 
Subject: [PATCH v2] x86: Remove x86 prefixed names from cpuinfo for intel.c
Date: Tue, 25 Nov 2025 20:27:24 +0000
Message-ID: <20251125202724.1384622-1-kevin.lampis@citrix.com>
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struct cpuinfo_x86
  .x86        => .family
  .x86_vendor => .vendor
  .x86_model  => .model
  .x86_mask   => .stepping

No functional change.

Signed-off-by: Kevin Lampis 
---
Changes in v2:
- Convert the two switch statements in probe_masking_msrs()
  and check_memory_type_self_snoop_errata()
- Requested style changes

 xen/arch/x86/cpu/intel.c                | 112 ++++++++++++++----------
 xen/arch/x86/include/asm/intel-family.h |   4 +
 2 files changed, 68 insertions(+), 48 deletions(-)

diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c
index 6f71365b7e..1edc95b046 100644
--- a/xen/arch/x86/cpu/intel.c
+++ b/xen/arch/x86/cpu/intel.c
@@ -86,18 +86,19 @@ static void __init check_memory_type_self_snoop_errata(void)
 	if (!boot_cpu_has(X86_FEATURE_SS))
 		return;
 
-	switch (boot_cpu_data.x86_model) {
-	case 0x0f: /* Merom */
-	case 0x16: /* Merom L */
-	case 0x17: /* Penryn */
-	case 0x1d: /* Dunnington */
-	case 0x1e: /* Nehalem */
-	case 0x1f: /* Auburndale / Havendale */
-	case 0x1a: /* Nehalem EP */
-	case 0x2e: /* Nehalem EX */
-	case 0x25: /* Westmere */
-	case 0x2c: /* Westmere EP */
-	case 0x2a: /* SandyBridge */
+	switch ( boot_cpu_data.vfm )
+	{
+	case INTEL_CORE2_MEROM:
+	case INTEL_CORE2_MEROM_L:
+	case INTEL_CORE2_PENRYN:
+	case INTEL_CORE2_DUNNINGTON:
+	case INTEL_NEHALEM:
+	case INTEL_NEHALEM_G:
+	case INTEL_NEHALEM_EP:
+	case INTEL_NEHALEM_EX:
+	case INTEL_WESTMERE:
+	case INTEL_WESTMERE_EP:
+	case INTEL_SANDYBRIDGE:
 		return;
 	}
 
@@ -137,28 +138,29 @@ static void __init probe_masking_msrs(void)
 	unsigned int exp_msr_basic, exp_msr_ext, exp_msr_xsave;
 
 	/* Only family 6 supports this feature. */
-	if (c->x86 != 6)
+	if (c->family != 6)
 		return;
 
-	switch (c->x86_model) {
-	case 0x17: /* Yorkfield, Wolfdale, Penryn, Harpertown(DP) */
-	case 0x1d: /* Dunnington(MP) */
+	switch ( c->vfm )
+	{
+	case INTEL_CORE2_PENRYN:
+	case INTEL_CORE2_DUNNINGTON:
 		msr_basic = MSR_INTEL_MASK_V1_CPUID1;
 		break;
 
-	case 0x1a: /* Bloomfield, Nehalem-EP(Gainestown) */
-	case 0x1e: /* Clarksfield, Lynnfield, Jasper Forest */
-	case 0x1f: /* Something Nehalem-based - perhaps Auburndale/Havendale? */
-	case 0x25: /* Arrandale, Clarksdale */
-	case 0x2c: /* Gulftown, Westmere-EP */
-	case 0x2e: /* Nehalem-EX(Beckton) */
-	case 0x2f: /* Westmere-EX */
+	case INTEL_NEHALEM_EP:
+	case INTEL_NEHALEM:
+	case INTEL_NEHALEM_G:
+	case INTEL_WESTMERE:
+	case INTEL_WESTMERE_EP:
+	case INTEL_NEHALEM_EX:
+	case INTEL_WESTMERE_EX:
 		msr_basic = MSR_INTEL_MASK_V2_CPUID1;
 		msr_ext   = MSR_INTEL_MASK_V2_CPUID80000001;
 		break;
 
-	case 0x2a: /* SandyBridge */
-	case 0x2d: /* SandyBridge-E, SandyBridge-EN, SandyBridge-EP */
+	case INTEL_SANDYBRIDGE:
+	case INTEL_SANDYBRIDGE_X:
 		msr_basic = MSR_INTEL_MASK_V3_CPUID1;
 		msr_ext   = MSR_INTEL_MASK_V3_CPUID80000001;
 		msr_xsave = MSR_INTEL_MASK_V3_CPUIDD_01;
@@ -191,7 +193,7 @@ static void __init probe_masking_msrs(void)
 	       expected_levelling_cap, levelling_caps,
 	       (expected_levelling_cap ^ levelling_caps) & levelling_caps);
 	printk(XENLOG_WARNING "Fam %#x, model %#x expected (%#x/%#x/%#x), "
-	       "got (%#x/%#x/%#x)\n", c->x86, c->x86_model,
+	       "got (%#x/%#x/%#x)\n", c->family, c->model,
 	       exp_msr_basic, exp_msr_ext, exp_msr_xsave,
 	       msr_basic, msr_ext, msr_xsave);
 	printk(XENLOG_WARNING
@@ -265,7 +267,7 @@ static void __init noinline intel_init_levelling(void)
 	 * so skip it altogether. In the case where Xen is virtualized these
 	 * MSRs may be emulated though, so we allow it in that case.
 	 */
-	if ((boot_cpu_data.x86 != 0xf || cpu_has_hypervisor) &&
+	if ((boot_cpu_data.family != 0xf || cpu_has_hypervisor) &&
 	    probe_cpuid_faulting()) {
 		expected_levelling_cap |= LCAP_faulting;
 		levelling_caps |= LCAP_faulting;
@@ -348,7 +350,7 @@ void intel_unlock_cpuid_leaves(struct cpuinfo_x86 *c)
 static void cf_check early_init_intel(struct cpuinfo_x86 *c)
 {
 	/* Netburst reports 64 bytes clflush size, but does IO in 128 bytes */
-	if (c->x86 == 15 && c->x86_cache_alignment == 64)
+	if (c->family == 15 && c->x86_cache_alignment == 64)
 		c->x86_cache_alignment = 128;
 
 	if (c == &boot_cpu_data &&
@@ -358,8 +360,8 @@ static void cf_check early_init_intel(struct cpuinfo_x86 *c)
 	intel_unlock_cpuid_leaves(c);
 
 	/* CPUID workaround for Intel 0F33/0F34 CPU */
-	if (boot_cpu_data.x86 == 0xF && boot_cpu_data.x86_model == 3 &&
-	    (boot_cpu_data.x86_mask == 3 || boot_cpu_data.x86_mask == 4))
+	if (boot_cpu_data.vfm == INTEL_P4_PRESCOTT &&
+	    (boot_cpu_data.stepping == 3 || boot_cpu_data.stepping == 4))
 		paddr_bits = 36;
 
 	if (c == &boot_cpu_data) {
@@ -458,7 +460,8 @@ static void Intel_errata_workarounds(struct cpuinfo_x86 *c)
 {
 	uint64_t val;
 
-	if ((c->x86 == 15) && (c->x86_model == 1) && (c->x86_mask == 1)) {
+	if ( c->vfm == INTEL_P4_WILLAMETTE && c->stepping == 1 )
+	{
 		val = rdmsr(MSR_IA32_MISC_ENABLE);
 		if ((val & (1 << 9)) == 0) {
 			printk (KERN_INFO "CPU: C0 stepping P4 Xeon detected.\n");
@@ -468,8 +471,10 @@ static void Intel_errata_workarounds(struct cpuinfo_x86 *c)
 		}
 	}
 
-	if (c->x86 == 6 && cpu_has_clflush &&
-	    (c->x86_model == 29 || c->x86_model == 46 || c->x86_model == 47))
+	if ( cpu_has_clflush &&
+	    ( c->vfm == INTEL_CORE2_DUNNINGTON ||
+	      c->vfm == INTEL_NEHALEM_EX ||
+	      c->vfm == INTEL_WESTMERE_EX ))
 		setup_force_cpu_cap(X86_BUG_CLFLUSH_MONITOR);
 
 	probe_c3_errata(c);
@@ -540,7 +545,7 @@ static void intel_log_freq(const struct cpuinfo_x86 *c)
         }
     }
 
-    switch ( c->x86 )
+    switch ( c->family )
     {
         static const unsigned short core_factors[] =
             { 26667, 13333, 20000, 16667, 33333, 10000, 40000 };
@@ -553,10 +558,13 @@ static void intel_log_freq(const struct cpuinfo_x86 *c)
         if ( !max_ratio )
             return;
 
-        switch ( c->x86_model )
+        switch ( c->vfm )
         {
-        case 0x0e: /* Core */
-        case 0x0f: case 0x16: case 0x17: case 0x1d: /* Core2 */
+        case INTEL_CORE_YONAH:
+        case INTEL_CORE2_MEROM:
+        case INTEL_CORE2_MEROM_L:
+        case INTEL_CORE2_PENRYN:
+        case INTEL_CORE2_DUNNINGTON:
             /*
              * PLATFORM_INFO, while not documented for these, appears to exist
              * in at least some cases, but what it holds doesn't match the
@@ -572,8 +580,13 @@ static void intel_log_freq(const struct cpuinfo_x86 *c)
             factor = core_factors[msrval];
             break;
 
-        case 0x1a: case 0x1e: case 0x1f: case 0x2e: /* Nehalem */
-        case 0x25: case 0x2c: case 0x2f: /* Westmere */
+        case INTEL_NEHALEM_EP:
+        case INTEL_NEHALEM:
+        case INTEL_NEHALEM_G:
+        case INTEL_NEHALEM_EX:
+        case INTEL_WESTMERE:
+        case INTEL_WESTMERE_EP:
+        case INTEL_WESTMERE_EX:
             factor = 13333;
             break;
 
@@ -583,7 +596,7 @@ static void intel_log_freq(const struct cpuinfo_x86 *c)
         }
         break;
 
-    case 0xf:
+    case 15:
         if ( rdmsr_safe(MSR_IA32_EBC_FREQUENCY_ID, &msrval) )
             return;
         max_ratio = msrval >> 24;
@@ -657,14 +670,17 @@ static void cf_check init_intel(struct cpuinfo_x86 *c)
 	/* Work around errata */
 	Intel_errata_workarounds(c);
 
-	if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
-		(c->x86 == 0x6 && c->x86_model >= 0x0e))
-		__set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
-	if (cpu_has(c, X86_FEATURE_ITSC)) {
-		__set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
-		__set_bit(X86_FEATURE_NONSTOP_TSC, c->x86_capability);
-		__set_bit(X86_FEATURE_TSC_RELIABLE, c->x86_capability);
-	}
+    if ( ( c->family == 15 && c->model >= 0x03 ) ||
+         ( c->family == 6 && c->model >= 0x0e ) )
+        __set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
+
+    if ( cpu_has(c, X86_FEATURE_ITSC) )
+    {
+        __set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
+        __set_bit(X86_FEATURE_NONSTOP_TSC, c->x86_capability);
+        __set_bit(X86_FEATURE_TSC_RELIABLE, c->x86_capability);
+    }
+
 	if ( opt_arat &&
 	     ( c->cpuid_level >= 0x00000006 ) &&
 	     ( cpuid_eax(0x00000006) & (1u<<2) ) )
diff --git a/xen/arch/x86/include/asm/intel-family.h b/xen/arch/x86/include/asm/intel-family.h
index d8c0bcc406..c71e744731 100644
--- a/xen/arch/x86/include/asm/intel-family.h
+++ b/xen/arch/x86/include/asm/intel-family.h
@@ -179,6 +179,10 @@
 #define INTEL_XEON_PHI_KNL		IFM(6, 0x57) /* Knights Landing */
 #define INTEL_XEON_PHI_KNM		IFM(6, 0x85) /* Knights Mill */
 
+/* Family 15 - NetBurst */
+#define INTEL_P4_WILLAMETTE		IFM(15, 0x01) /* Also Xeon Foster */
+#define INTEL_P4_PRESCOTT		IFM(15, 0x03)
+
 /* Family 5 */
 #define INTEL_FAM5_QUARK_X1000		0x09 /* Quark X1000 SoC */
 #define INTEL_QUARK_X1000		IFM(5, 0x09) /* Quark X1000 SoC */
-- 
2.51.1



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From: Grygorii Strashko 
To: "xen-devel@lists.xenproject.org" 
CC: Grygorii Strashko , Jan Beulich
	, Andrew Cooper ,
	=?iso-8859-1?Q?Roger_Pau_Monn=E9?= , Paul Durrant
	
Subject: [XEN][PATCH] x86/hvm: move save/restore under HVM_SAVE_RESTORE config
Thread-Topic: [XEN][PATCH] x86/hvm: move save/restore under HVM_SAVE_RESTORE
 config
Thread-Index: AQHcXl9TZm/es1jFW0qVSZfA8WEetQ==
Date: Tue, 25 Nov 2025 23:00:42 +0000
Message-ID: <20251125230040.3070954-1-grygorii_strashko@epam.com>
In-Reply-To: <20251121105801.1251262-20-Penny.Zheng@amd.com>
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From: Grygorii Strashko 

Introduce separate HVM_SAVE_RESTORE config for HVM save/restore feature,
which is enabled by default for HVM and depends on MGMT_HYPERCALLS config.

This allows to make MGMT_HYPERCALLS specific changes more granular and, if
required, make HVM save/restore optional, selectable feature.

Signed-off-by: Grygorii Strashko 
---
I'd like to propose this patch as a replacement of Patch 19 [1]

[1] https://patchwork.kernel.org/project/xen-devel/patch/20251121105801.125=
1262-20-Penny.Zheng@amd.com/

 xen/arch/x86/cpu/mcheck/vmce.c       | 4 ++--
 xen/arch/x86/emul-i8254.c            | 4 +++-
 xen/arch/x86/hvm/Kconfig             | 6 ++++++
 xen/arch/x86/hvm/Makefile            | 2 +-
 xen/arch/x86/hvm/hpet.c              | 3 ++-
 xen/arch/x86/hvm/hvm.c               | 4 ++++
 xen/arch/x86/hvm/irq.c               | 2 ++
 xen/arch/x86/hvm/mtrr.c              | 2 ++
 xen/arch/x86/hvm/pmtimer.c           | 2 ++
 xen/arch/x86/hvm/rtc.c               | 2 ++
 xen/arch/x86/hvm/vioapic.c           | 2 ++
 xen/arch/x86/hvm/viridian/viridian.c | 2 ++
 xen/arch/x86/hvm/vlapic.c            | 3 ++-
 xen/arch/x86/hvm/vpic.c              | 2 ++
 xen/arch/x86/include/asm/hvm/save.h  | 5 ++++-
 15 files changed, 38 insertions(+), 7 deletions(-)

diff --git a/xen/arch/x86/cpu/mcheck/vmce.c b/xen/arch/x86/cpu/mcheck/vmce.=
c
index 1a7e92506ac8..ba27f6f8bd91 100644
--- a/xen/arch/x86/cpu/mcheck/vmce.c
+++ b/xen/arch/x86/cpu/mcheck/vmce.c
@@ -349,7 +349,7 @@ int vmce_wrmsr(uint32_t msr, uint64_t val)
     return ret;
 }
=20
-#if CONFIG_HVM
+#if defined(CONFIG_HVM_SAVE_RESTORE)
 static int cf_check vmce_save_vcpu_ctxt(struct vcpu *v, hvm_domain_context=
_t *h)
 {
     struct hvm_vmce_vcpu ctxt =3D {
@@ -380,10 +380,10 @@ static int cf_check vmce_load_vcpu_ctxt(struct domain=
 *d, hvm_domain_context_t *
=20
     return err ?: vmce_restore_vcpu(v, &ctxt);
 }
+#endif /* CONFIG_HVM_SAVE_RESTORE */
=20
 HVM_REGISTER_SAVE_RESTORE(VMCE_VCPU, vmce_save_vcpu_ctxt, NULL,
                           vmce_load_vcpu_ctxt, 1, HVMSR_PER_VCPU);
-#endif
=20
 /*
  * for Intel MCE, broadcast vMCE to all vcpus
diff --git a/xen/arch/x86/emul-i8254.c b/xen/arch/x86/emul-i8254.c
index f106ab794c4f..d33723fa32c6 100644
--- a/xen/arch/x86/emul-i8254.c
+++ b/xen/arch/x86/emul-i8254.c
@@ -409,7 +409,9 @@ void pit_stop_channel0_irq(PITState *pit)
     destroy_periodic_time(&pit->pt0);
     spin_unlock(&pit->lock);
 }
+#endif
=20
+#if defined(CONFIG_HVM_SAVE_RESTORE)
 static int cf_check pit_save(struct vcpu *v, hvm_domain_context_t *h)
 {
     struct domain *d =3D v->domain;
@@ -507,9 +509,9 @@ static int cf_check pit_load(struct domain *d, hvm_doma=
in_context_t *h)
=20
     return rc;
 }
+#endif /* CONFIG_HVM_SAVE_RESTORE */
=20
 HVM_REGISTER_SAVE_RESTORE(PIT, pit_save, pit_check, pit_load, 1, HVMSR_PER=
_DOM);
-#endif
=20
 /* The intercept action for PIT DM retval: 0--not handled; 1--handled. */
 static int cf_check handle_pit_io(
diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig
index 156deab29139..48c2e1e33469 100644
--- a/xen/arch/x86/hvm/Kconfig
+++ b/xen/arch/x86/hvm/Kconfig
@@ -93,4 +93,10 @@ config MEM_SHARING
 	depends on INTEL_VMX
 	depends on MGMT_HYPERCALLS
=20
+config HVM_SAVE_RESTORE
+	depends on MGMT_HYPERCALLS
+	def_bool y
+	help
+	  Enables HVM save/load functionality.
+
 endif
diff --git a/xen/arch/x86/hvm/Makefile b/xen/arch/x86/hvm/Makefile
index f34fb03934c0..f1602cc659ea 100644
--- a/xen/arch/x86/hvm/Makefile
+++ b/xen/arch/x86/hvm/Makefile
@@ -22,7 +22,7 @@ obj-y +=3D nestedhvm.o
 obj-y +=3D pmtimer.o
 obj-y +=3D quirks.o
 obj-y +=3D rtc.o
-obj-y +=3D save.o
+obj-$(CONFIG_HVM_SAVE_RESTORE) +=3D save.o
 obj-y +=3D stdvga.o
 obj-y +=3D vioapic.o
 obj-y +=3D vlapic.o
diff --git a/xen/arch/x86/hvm/hpet.c b/xen/arch/x86/hvm/hpet.c
index f0e5f877f4a1..7df8abfa348d 100644
--- a/xen/arch/x86/hvm/hpet.c
+++ b/xen/arch/x86/hvm/hpet.c
@@ -570,7 +570,7 @@ static const struct hvm_mmio_ops hpet_mmio_ops =3D {
     .write =3D hpet_write
 };
=20
-
+#if defined(CONFIG_HVM_SAVE_RESTORE)
 static int cf_check hpet_save(struct vcpu *v, hvm_domain_context_t *h)
 {
     const struct domain *d =3D v->domain;
@@ -691,6 +691,7 @@ static int cf_check hpet_load(struct domain *d, hvm_dom=
ain_context_t *h)
=20
     return 0;
 }
+#endif /* CONFIG_HVM_SAVE_RESTORE */
=20
 HVM_REGISTER_SAVE_RESTORE(HPET, hpet_save, NULL, hpet_load, 1, HVMSR_PER_D=
OM);
=20
diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index b1e03bbb3bd3..832fca54f3a2 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -796,6 +796,7 @@ void hvm_domain_destroy(struct domain *d)
     destroy_vpci_mmcfg(d);
 }
=20
+#if defined(CONFIG_HVM_SAVE_RESTORE)
 static int cf_check hvm_save_tsc_adjust(struct vcpu *v, hvm_domain_context=
_t *h)
 {
     struct hvm_tsc_adjust ctxt =3D {
@@ -943,6 +944,7 @@ static int cf_check hvm_save_cpu_ctxt(struct vcpu *v, h=
vm_domain_context_t *h)
=20
     return hvm_save_entry(CPU, v->vcpu_id, h, &ctxt);
 }
+#endif /* CONFIG_HVM_SAVE_RESTORE */
=20
 /* Return a string indicating the error, or NULL for valid. */
 const char *hvm_efer_valid(const struct vcpu *v, uint64_t value,
@@ -1020,6 +1022,7 @@ unsigned long hvm_cr4_guest_valid_bits(const struct d=
omain *d)
             0);
 }
=20
+#if defined(CONFIG_HVM_SAVE_RESTORE)
 static int cf_check hvm_load_cpu_ctxt(struct domain *d, hvm_domain_context=
_t *h)
 {
     const struct cpu_policy *p =3D d->arch.cpu_policy;
@@ -1602,6 +1605,7 @@ static int __init cf_check hvm_register_CPU_save_and_=
restore(void)
     return 0;
 }
 __initcall(hvm_register_CPU_save_and_restore);
+#endif /* CONFIG_HVM_SAVE_RESTORE */
=20
 static void cf_check hvm_assert_evtchn_irq_tasklet(void *v)
 {
diff --git a/xen/arch/x86/hvm/irq.c b/xen/arch/x86/hvm/irq.c
index 5f643611130f..af5f2c83577e 100644
--- a/xen/arch/x86/hvm/irq.c
+++ b/xen/arch/x86/hvm/irq.c
@@ -649,6 +649,7 @@ static int __init cf_check dump_irq_info_key_init(void)
 }
 __initcall(dump_irq_info_key_init);
=20
+#if defined(CONFIG_HVM_SAVE_RESTORE)
 static int cf_check irq_save_pci(struct vcpu *v, hvm_domain_context_t *h)
 {
     struct domain *d =3D v->domain;
@@ -799,6 +800,7 @@ static int cf_check irq_load_link(struct domain *d, hvm=
_domain_context_t *h)
=20
     return 0;
 }
+#endif /* CONFIG_HVM_SAVE_RESTORE */
=20
 HVM_REGISTER_SAVE_RESTORE(PCI_IRQ, irq_save_pci, NULL, irq_load_pci,
                           1, HVMSR_PER_DOM);
diff --git a/xen/arch/x86/hvm/mtrr.c b/xen/arch/x86/hvm/mtrr.c
index e0bef8c82dc8..c5e83dd7a602 100644
--- a/xen/arch/x86/hvm/mtrr.c
+++ b/xen/arch/x86/hvm/mtrr.c
@@ -695,6 +695,7 @@ int hvm_set_mem_pinned_cacheattr(struct domain *d, uint=
64_t gfn_start,
     return rc;
 }
=20
+#if defined(CONFIG_HVM_SAVE_RESTORE)
 static int cf_check hvm_save_mtrr_msr(struct vcpu *v, hvm_domain_context_t=
 *h)
 {
     const struct mtrr_state *m =3D &v->arch.hvm.mtrr;
@@ -782,6 +783,7 @@ static int cf_check hvm_load_mtrr_msr(struct domain *d,=
 hvm_domain_context_t *h)
=20
     return 0;
 }
+#endif /* CONFIG_HVM_SAVE_RESTORE */
=20
 HVM_REGISTER_SAVE_RESTORE(MTRR, hvm_save_mtrr_msr, NULL, hvm_load_mtrr_msr=
, 1,
                           HVMSR_PER_VCPU);
diff --git a/xen/arch/x86/hvm/pmtimer.c b/xen/arch/x86/hvm/pmtimer.c
index 87a7a01c9f52..86f85d381a20 100644
--- a/xen/arch/x86/hvm/pmtimer.c
+++ b/xen/arch/x86/hvm/pmtimer.c
@@ -240,6 +240,7 @@ static int cf_check handle_pmt_io(
     return X86EMUL_OKAY;
 }
=20
+#if defined(CONFIG_HVM_SAVE_RESTORE)
 static int cf_check acpi_save(struct vcpu *v, hvm_domain_context_t *h)
 {
     struct domain *d =3D v->domain;
@@ -300,6 +301,7 @@ static int cf_check acpi_load(struct domain *d, hvm_dom=
ain_context_t *h)
    =20
     return 0;
 }
+#endif /* CONFIG_HVM_SAVE_RESTORE */
=20
 HVM_REGISTER_SAVE_RESTORE(PMTIMER, acpi_save, NULL, acpi_load,
                           1, HVMSR_PER_DOM);
diff --git a/xen/arch/x86/hvm/rtc.c b/xen/arch/x86/hvm/rtc.c
index e33a8ec10821..a451cd2e6880 100644
--- a/xen/arch/x86/hvm/rtc.c
+++ b/xen/arch/x86/hvm/rtc.c
@@ -742,6 +742,7 @@ void rtc_migrate_timers(struct vcpu *v)
     }
 }
=20
+#if defined(CONFIG_HVM_SAVE_RESTORE)
 /* Save RTC hardware state */
 static int cf_check rtc_save(struct vcpu *v, hvm_domain_context_t *h)
 {
@@ -797,6 +798,7 @@ static int cf_check rtc_load(struct domain *d, hvm_doma=
in_context_t *h)
=20
     return 0;
 }
+#endif /* CONFIG_HVM_SAVE_RESTORE */
=20
 HVM_REGISTER_SAVE_RESTORE(RTC, rtc_save, NULL, rtc_load, 1, HVMSR_PER_DOM)=
;
=20
diff --git a/xen/arch/x86/hvm/vioapic.c b/xen/arch/x86/hvm/vioapic.c
index 7c725f9e471f..5fad31074288 100644
--- a/xen/arch/x86/hvm/vioapic.c
+++ b/xen/arch/x86/hvm/vioapic.c
@@ -594,6 +594,7 @@ int vioapic_get_trigger_mode(const struct domain *d, un=
signed int gsi)
     return vioapic->redirtbl[pin].fields.trig_mode;
 }
=20
+#if defined(CONFIG_HVM_SAVE_RESTORE)
 static int cf_check ioapic_save(struct vcpu *v, hvm_domain_context_t *h)
 {
     const struct domain *d =3D v->domain;
@@ -629,6 +630,7 @@ static int cf_check ioapic_load(struct domain *d, hvm_d=
omain_context_t *h)
=20
     return 0;
 }
+#endif /* CONFIG_HVM_SAVE_RESTORE */
=20
 HVM_REGISTER_SAVE_RESTORE(IOAPIC, ioapic_save, NULL, ioapic_load, 1,
                           HVMSR_PER_DOM);
diff --git a/xen/arch/x86/hvm/viridian/viridian.c b/xen/arch/x86/hvm/viridi=
an/viridian.c
index 90e749ceb581..ab2a7078515c 100644
--- a/xen/arch/x86/hvm/viridian/viridian.c
+++ b/xen/arch/x86/hvm/viridian/viridian.c
@@ -1092,6 +1092,7 @@ void viridian_unmap_guest_page(struct viridian_page *=
vp)
     put_page_and_type(page);
 }
=20
+#if defined(CONFIG_HVM_SAVE_RESTORE)
 static int cf_check viridian_save_domain_ctxt(
     struct vcpu *v, hvm_domain_context_t *h)
 {
@@ -1171,6 +1172,7 @@ static int cf_check viridian_load_vcpu_ctxt(
=20
     return 0;
 }
+#endif /* CONFIG_HVM_SAVE_RESTORE */
=20
 HVM_REGISTER_SAVE_RESTORE(VIRIDIAN_VCPU, viridian_save_vcpu_ctxt, NULL,
                           viridian_load_vcpu_ctxt, 1, HVMSR_PER_VCPU);
diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c
index 79697487ba90..ea7d186ff1ea 100644
--- a/xen/arch/x86/hvm/vlapic.c
+++ b/xen/arch/x86/hvm/vlapic.c
@@ -1481,6 +1481,7 @@ void vlapic_reset(struct vlapic *vlapic)
     vlapic_do_init(vlapic);
 }
=20
+#if defined(CONFIG_HVM_SAVE_RESTORE)
 /* rearm the actimer if needed, after a HVM restore */
 static void lapic_rearm(struct vlapic *s)
 {
@@ -1578,7 +1579,6 @@ static void lapic_load_fixup(struct vlapic *vlapic)
                v, vlapic->loaded.id, vlapic->loaded.ldr, good_ldr);
 }
=20
-
 static int lapic_check_common(const struct domain *d, unsigned int vcpuid)
 {
     if ( !has_vlapic(d) )
@@ -1675,6 +1675,7 @@ static int cf_check lapic_load_regs(struct domain *d,=
 hvm_domain_context_t *h)
     lapic_rearm(s);
     return 0;
 }
+#endif /* CONFIG_HVM_SAVE_RESTORE */
=20
 HVM_REGISTER_SAVE_RESTORE(LAPIC, lapic_save_hidden, lapic_check_hidden,
                           lapic_load_hidden, 1, HVMSR_PER_VCPU);
diff --git a/xen/arch/x86/hvm/vpic.c b/xen/arch/x86/hvm/vpic.c
index 30ce367c082d..af49c372f502 100644
--- a/xen/arch/x86/hvm/vpic.c
+++ b/xen/arch/x86/hvm/vpic.c
@@ -402,6 +402,7 @@ static int cf_check vpic_intercept_elcr_io(
     return X86EMUL_OKAY;
 }
=20
+#if defined(CONFIG_HVM_SAVE_RESTORE)
 static int cf_check vpic_save(struct vcpu *v, hvm_domain_context_t *h)
 {
     struct domain *d =3D v->domain;
@@ -475,6 +476,7 @@ static int cf_check vpic_load(struct domain *d, hvm_dom=
ain_context_t *h)
=20
     return 0;
 }
+#endif /* CONFIG_HVM_SAVE_RESTORE */
=20
 HVM_REGISTER_SAVE_RESTORE(PIC, vpic_save, vpic_check, vpic_load, 2,
                           HVMSR_PER_DOM);
diff --git a/xen/arch/x86/include/asm/hvm/save.h b/xen/arch/x86/include/asm=
/hvm/save.h
index ec8de029319d..501a6cfb214a 100644
--- a/xen/arch/x86/include/asm/hvm/save.h
+++ b/xen/arch/x86/include/asm/hvm/save.h
@@ -123,6 +123,7 @@ void hvm_register_savevm(uint16_t typecode,
=20
 /* Syntactic sugar around that function: specify the max number of
  * saves, and this calculates the size of buffer needed */
+#ifdef CONFIG_HVM_SAVE_RESTORE
 #define HVM_REGISTER_SAVE_RESTORE(_x, _save, check, _load, _num, _k)      =
\
 static int __init cf_check __hvm_register_##_x##_save_and_restore(void)   =
\
 {                                                                         =
\
@@ -137,7 +138,9 @@ static int __init cf_check __hvm_register_##_x##_save_a=
nd_restore(void)   \
     return 0;                                                             =
\
 }                                                                         =
\
 __initcall(__hvm_register_##_x##_save_and_restore);
-
+#else
+#define HVM_REGISTER_SAVE_RESTORE(_x, _save, check, _load, _num, _k)
+#endif
=20
 /* Entry points for saving and restoring HVM domain state */
 size_t hvm_save_size(struct domain *d);
--=20
2.34.1


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Subject: Re: [PATCH v4 03/24] xen/sysctl: replace CONFIG_SYSCTL with
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Hi

On 21.11.25 12:57, Penny Zheng wrote:
> Rename all the CONFIG_SYSCTL into CONFIG_MGMT_HYPERCALLS to help provide a
> single option to manage all unnecessary hypercalls, including
> sysctl, domctl, etc, in dom0less system and PV shim mode, which could also
> make it easier to support randconfigs.
> While doing the replacement, we fix some bugs on xsm system:
> - wrap the whole xsm function to avoid bringing unreachable codes when
> MGMT_DOMCTL=n
> - add missing wrapping in include/xsm/dummy.h
> 
> Suggested-by: Stefano Stabellini 
> Signed-off-by: Penny Zheng 
> Reviewed-by: Stefano Stabellini 
> Reviewed-by: Juergen Gross 
> Acked-by: Stewart Hildebrand  #ARINC 653
> Acked-by: Jan Beulich 
> Cc: Alistair Francis 
> ---
> v2 -> v3:
> - wrap the whole xsm function
> - add missing wrapping in include/xsm/dummy.h
> - refine kconfig description
> ---

With below diff..

diff --git a/xen/common/Kconfig b/xen/common/Kconfig
index 6709c3c95c53..f478adffff9c 100644
--- a/xen/common/Kconfig
+++ b/xen/common/Kconfig
@@ -652,9 +652,8 @@ menu "Supported hypercall interfaces"
         visible if EXPERT
  
  config MGMT_HYPERCALLS
-       bool "Enable privileged hypercalls for system management"
         depends on !PV_SHIM_EXCLUSIVE
-       default y
+       def_bool y
         help
           This option shall only be disabled on some dom0less systems, or
           PV shim on x86, to reduce Xen footprint via managing unnessary

It could be very helpful to consider this patch to be applied first.

- number of tags indicates that it's the way to move forward
- with above diff patch 4 can be dropped
- it is mechanical change, but it's big and constant source of rebase/merge/cherry-pick conflicts
- once applied it will allow, actually, parallel development of this feature as MGMT_HYPERCALLS will
   be defined while build not broken.

-- 
Best regards,
-grygorii



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To: Kevin Lampis 
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On 25.11.2025 21:12, Kevin Lampis wrote:
>> Bogus indentation would also want adjusting while touching the line
> 
> All this code is using hard tabs that's why it looks wrong. If I convert only
> this single statement `if` to spaces then I get a `misleading-indentation`
> error so I have to convert the `if` block after it to spaces too.
> I hope that's ok.

Well, the request was to switch to a tab and a few spaces, so similar items
on both lines align with one another. That's Linux'es style afaict, i.e.
what surrounding code there uses.

Jan


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Date: Wed, 26 Nov 2025 07:21:09 +0100
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Subject: Re: [PATCH 2/2] symbols/x86: don't use symbols-dummy
To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
Cc: "xen-devel@lists.xenproject.org" ,
 Andrew Cooper , Julien Grall ,
 Stefano Stabellini ,
 Anthony PERARD ,
 Michal Orzel 
References: <2d7602ce-3665-4853-85f0-c0201642193f@suse.com>
 <3618c458-d9ec-4cc6-a800-0741ade461a1@suse.com> 
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From: Jan Beulich 
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On 25.11.2025 18:36, Roger Pau Monné wrote:
> On Tue, Nov 25, 2025 at 03:14:27PM +0100, Jan Beulich wrote:
>> In particular when linking with lld, which converts hidden symbols to
>> local ones, the ELF symbol table can change in unhelpful ways between the
>> first two linking passes, resulting in the .rodata contributions to change
>> between the 2nd and 3rd pass. That, however, renders our embedded symbol
>> table pretty much unusable; the recently introduced self-test may then
>> also fail. (Another difference between compiling a C file and assembling
>> the generated ones is that - with -fdata-sections in use - the .rodata
>> contributions move between passes 1 and 2, when we'd prefer them not to.)
>>
>> Make tools/symbols capable of producing an "empty" assembly file, such
>> that unwanted differences between passes 1 and 2 go away when then using
>> the corresponding objects in place of common/symbols-dummy.o.
>>
>> Reported-by: Andrew Cooper 
>> Reported-by: Roger Pau Monné 
>> Signed-off-by: Jan Beulich 
> 
> LGTM, not sure whether you want to extend to other arches in this
> same patch, or simply guard the build of symbols-dummy.o for non-x86
> arches.

I think I'd prefer to mirror it to other arch-es, but in separate
patches (so they can go in independently). Then once all are in, ...

>> ---
>> May want mirroring to other arch-es.
>>
>> --- a/xen/arch/x86/Makefile
>> +++ b/xen/arch/x86/Makefile
>> @@ -134,8 +134,10 @@ $(TARGET): $(TARGET)-syms $(efi-y) $(obj
>>  CFLAGS-$(XEN_BUILD_EFI) += -DXEN_BUILD_EFI
>>  
>>  $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds
>> +	$(objtree)/tools/symbols $(all_symbols) --empty > $(dot-target).0.S
>> +	$(MAKE) $(build)=$(@D) $(dot-target).0.o
>>  	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \
>> -	    $(objtree)/common/symbols-dummy.o -o $(dot-target).0
> 
> It would be good if we could now stop building symbols-dummy.o as part
> of extra-y.  Maybe you could guard it with ifneq ($(CONFIG_X86),y) in
> the Makefile?
> 
> Or otherwise remove this from all arches thus removing
> common/symbols-dummy.c.

... I'd remove symbols-dummy altogether. I don't think there's a need
to transiently disable building of symbols-dummy.o for just some of the
arch-es (like foe x86 right here).

>> --- a/xen/tools/symbols.c
>> +++ b/xen/tools/symbols.c
>> @@ -672,7 +672,10 @@ int main(int argc, char **argv)
>>  				warn_dup = true;
>>  			else if (strcmp(argv[i], "--error-dup") == 0)
>>  				warn_dup = error_dup = true;
>> -			else if (strcmp(argv[i], "--xensyms") == 0)
>> +			else if (strcmp(argv[i], "--empty") == 0) {
>> +				write_src();
>> +				return 0;
> 
> Oh, that was easier than I was expecting for symbols to generate a
> working empty assembly file.

Yeah, I also expected it to be more intrusive. The file isn't exactly,
though - two of the tables (the ones with 256 entries) are emitted
nevertheless. I didn't consider this an issue, though.

Jan


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Feedback-ID: i001e48d0:Fastmail
From: Val Packett 
To: Juergen Gross ,
	Stefano Stabellini ,
	Oleksandr Tyshchenko 
Cc: Val Packett ,
	xen-devel@lists.xenproject.org,
	linux-kernel@vger.kernel.org
Subject: [RFC PATCH v2] xen: privcmd: fix ioeventfd crash under PV domain
Date: Wed, 26 Nov 2025 02:54:57 -0300
Message-ID: <20251126062124.117425-1-val@invisiblethingslab.com>
X-Mailer: git-send-email 2.51.0
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Starting a virtio backend in a PV domain would panic the kernel in
alloc_ioreq, trying to dereference vma->vm_private_data as a pages
pointer when in reality it stayed as PRIV_VMA_LOCKED.

Avoid crashing by handling the PRIV_VMA_LOCKED case in alloc_ioreq.
PV support requires mapping the virtio ioreq page explicitly into
the kernel's page tables, so do it on-demand when PRIV_VMA_LOCKED
is seen.

Signed-off-by: Val Packett 
---
Changes from RFC v1[1]:
* An actually working patch now, not just a request for help :)
  All I needed to know was that PV actually doesn't emulate a common
  physical address space *at all*, the pfn mapped by xen_remap_domain_mfn_array
  was *only* available in the userspace process and the *only* way to have
  kernel access to the same memory was to perfore the same call but for the
  kernel's mm.
* Everything happens lazily / on-demand, inside of the ioeventfd code,
  addressing concerns about extra work performed for non-ioeventfd usage
  from the review. (kmalloc specifically is gone entirely..)

I'm leaving this as RFC mostly because of the "fake" vm_area_struct that's used
as a workaround for xen_remap_domain_mfn_array (or rather, its underlying
xen_remap_pfn) accepting a vm_area_struct only to take its vm_mm (and also check
flags with a BUG assertion). It was written for userspace processes since that
was the only use case anyone could ever imagine.. until ioeventfd came along.

So it would probably be better to change xen_remap_pfn to take the mm? Maybe?
I wanted to ask for advice first before trying to refactor other code.

Thanks,
~val

[1]: https://lore.kernel.org/all/20251015195713.6500-1-val@invisiblethingslab.com/
---
 drivers/xen/privcmd.c | 34 ++++++++++++++++++++++++++++++++--
 1 file changed, 32 insertions(+), 2 deletions(-)

diff --git a/drivers/xen/privcmd.c b/drivers/xen/privcmd.c
index f52a457b302d..a3ad10f149ec 100644
--- a/drivers/xen/privcmd.c
+++ b/drivers/xen/privcmd.c
@@ -818,6 +818,8 @@ static long privcmd_ioctl_mmap_resource(struct file *file,
 			DOMID_SELF : kdata.dom;
 		int num, *errs = (int *)pfns;
 
+		vma->vm_pgoff = pfns[0]; /* store the acquired pfn for ioeventfd access */
+
 		BUILD_BUG_ON(sizeof(*errs) > sizeof(*pfns));
 		num = xen_remap_domain_mfn_array(vma,
 						 kdata.addr & PAGE_MASK,
@@ -1248,10 +1250,38 @@ struct privcmd_kernel_ioreq *alloc_ioreq(struct privcmd_ioeventfd *ioeventfd)
 		goto error_kfree;
 	}
 
-	pages = vma->vm_private_data;
-	kioreq->ioreq = (struct ioreq *)(page_to_virt(pages[0]));
 	mmap_write_unlock(mm);
 
+	/* In a PV domain, we must manually map the pages into the kernel */
+	if (vma->vm_private_data == PRIV_VMA_LOCKED) {
+		/* This should never ever happen outside of PV */
+		if (WARN_ON_ONCE(!xen_pv_domain())) {
+			ret = -EINVAL;
+			goto error_kfree;
+		}
+
+		/* xen_remap_domain_mfn_array only really needs the mm */
+		struct vm_area_struct kern_vma = {
+			.vm_flags = VM_PFNMAP | VM_IO,
+			.vm_mm = &init_mm,
+		};
+		xen_pfn_t pfn = vma->vm_pgoff;
+		int num, err;
+
+		/* Don't provide NULL as the errors array as that results in pfn increment */
+		num = xen_remap_domain_mfn_array(&kern_vma, (unsigned long)pfn_to_kaddr(pfn),
+						&pfn, 1, &err, PAGE_KERNEL, ioeventfd->dom);
+		if (num < 0) {
+			ret = num;
+			goto error_kfree;
+		}
+
+		kioreq->ioreq = (struct ioreq *)(pfn_to_kaddr(pfn));
+	} else {
+		pages = vma->vm_private_data;
+		kioreq->ioreq = (struct ioreq *)(page_to_virt(pages[0]));
+	}
+
 	ports = memdup_array_user(u64_to_user_ptr(ioeventfd->ports),
 				  kioreq->vcpus, sizeof(*ports));
 	if (IS_ERR(ports)) {
-- 
2.51.0



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Subject: Re: [PATCH v6 03/25] drm/gem-dma: Compute dumb-buffer sizes with
 drm_mode_size_dumb()
Thread-Topic: [PATCH v6 03/25] drm/gem-dma: Compute dumb-buffer sizes with
 drm_mode_size_dumb()
Thread-Index: AQHcEnS8fucA3LjqjkuGZw8r9BxHgrUEDdaAgAAGpQCAAQFLgA==
Date: Wed, 26 Nov 2025 06:24:38 +0000
Message-ID: <2fbe0d43-67c5-4816-aff0-c23ac1507ec5@microchip.com>
References: <20250821081918.79786-1-tzimmermann@suse.de>
 <20250821081918.79786-4-tzimmermann@suse.de>
 <52600bf4-2c1c-49a6-82c5-b31818141a43@microchip.com>
 
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Subject: Re: [PATCH v4 03/24] xen/sysctl: replace CONFIG_SYSCTL with
 CONFIG_MGMT_HYPERCALLS
To: Grygorii Strashko ,
 Penny Zheng ,
 "Daniel P. Smith" 
Cc: ray.huang@amd.com, Andrew Cooper ,
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 , Oleksii Kurochko ,
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 Juergen Gross , George Dunlap ,
 Alistair Francis , xen-devel@lists.xenproject.org
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In-Reply-To: <5050db49-8581-499b-93bb-98c0f084d071@epam.com>
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On 26.11.2025 00:02, Grygorii Strashko wrote:
> Hi
> 
> On 21.11.25 12:57, Penny Zheng wrote:
>> Rename all the CONFIG_SYSCTL into CONFIG_MGMT_HYPERCALLS to help provide a
>> single option to manage all unnecessary hypercalls, including
>> sysctl, domctl, etc, in dom0less system and PV shim mode, which could also
>> make it easier to support randconfigs.
>> While doing the replacement, we fix some bugs on xsm system:
>> - wrap the whole xsm function to avoid bringing unreachable codes when
>> MGMT_DOMCTL=n
>> - add missing wrapping in include/xsm/dummy.h
>>
>> Suggested-by: Stefano Stabellini 
>> Signed-off-by: Penny Zheng 
>> Reviewed-by: Stefano Stabellini 
>> Reviewed-by: Juergen Gross 
>> Acked-by: Stewart Hildebrand  #ARINC 653
>> Acked-by: Jan Beulich 
>> Cc: Alistair Francis 
>> ---
>> v2 -> v3:
>> - wrap the whole xsm function
>> - add missing wrapping in include/xsm/dummy.h
>> - refine kconfig description
>> ---
> 
> With below diff..
> 
> diff --git a/xen/common/Kconfig b/xen/common/Kconfig
> index 6709c3c95c53..f478adffff9c 100644
> --- a/xen/common/Kconfig
> +++ b/xen/common/Kconfig
> @@ -652,9 +652,8 @@ menu "Supported hypercall interfaces"
>         visible if EXPERT
>  
>  config MGMT_HYPERCALLS
> -       bool "Enable privileged hypercalls for system management"
>         depends on !PV_SHIM_EXCLUSIVE
> -       default y
> +       def_bool y
>         help
>           This option shall only be disabled on some dom0less systems, or
>           PV shim on x86, to reduce Xen footprint via managing unnessary
> 
> It could be very helpful to consider this patch to be applied first.

It doesn't need the change above, does it? It (aiui) deliberately sits
ahead of the patch (supposedly) doing the above. While (once again) it
is not being said anywhere that it's independent of patches 01 and 02,
I expect it really is. In which case all that looks to prevent it from
having gone in already is the lack of an ack for the XSM changes.

> - number of tags indicates that it's the way to move forward
> - with above diff patch 4 can be dropped

Except that imo really wants to be separate. And that could have gone
in already as well, if only it had been done correctly.

Jan

> - it is mechanical change, but it's big and constant source of rebase/merge/cherry-pick conflicts
> - once applied it will allow, actually, parallel development of this feature as MGMT_HYPERCALLS will
>   be defined while build not broken.
> 



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Date: Wed, 26 Nov 2025 07:44:28 +0100
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Subject: Re: [PATCH v2] x86: Remove x86 prefixed names from cpuinfo for
 intel.c
To: Kevin Lampis 
Cc: andrew.cooper3@citrix.com, roger.pau@citrix.com,
 xen-devel@lists.xenproject.org
References: <20251125202724.1384622-1-kevin.lampis@citrix.com>
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On 25.11.2025 21:27, Kevin Lampis wrote:
> struct cpuinfo_x86
>   .x86        => .family
>   .x86_vendor => .vendor
>   .x86_model  => .model
>   .x86_mask   => .stepping
> 
> No functional change.
> 
> Signed-off-by: Kevin Lampis 
> ---
> Changes in v2:
> - Convert the two switch statements in probe_masking_msrs()
>   and check_memory_type_self_snoop_errata()
> - Requested style changes

As to the latter - not quite, see below.

> --- a/xen/arch/x86/cpu/intel.c
> +++ b/xen/arch/x86/cpu/intel.c
> @@ -86,18 +86,19 @@ static void __init check_memory_type_self_snoop_errata(void)
>  	if (!boot_cpu_has(X86_FEATURE_SS))
>  		return;
>  
> -	switch (boot_cpu_data.x86_model) {
> -	case 0x0f: /* Merom */
> -	case 0x16: /* Merom L */
> -	case 0x17: /* Penryn */
> -	case 0x1d: /* Dunnington */
> -	case 0x1e: /* Nehalem */
> -	case 0x1f: /* Auburndale / Havendale */
> -	case 0x1a: /* Nehalem EP */
> -	case 0x2e: /* Nehalem EX */
> -	case 0x25: /* Westmere */
> -	case 0x2c: /* Westmere EP */
> -	case 0x2a: /* SandyBridge */
> +	switch ( boot_cpu_data.vfm )
> +	{
> +	case INTEL_CORE2_MEROM:
> +	case INTEL_CORE2_MEROM_L:
> +	case INTEL_CORE2_PENRYN:
> +	case INTEL_CORE2_DUNNINGTON:
> +	case INTEL_NEHALEM:
> +	case INTEL_NEHALEM_G:
> +	case INTEL_NEHALEM_EP:
> +	case INTEL_NEHALEM_EX:
> +	case INTEL_WESTMERE:
> +	case INTEL_WESTMERE_EP:
> +	case INTEL_SANDYBRIDGE:

The ordering here would imo ...

> @@ -137,28 +138,29 @@ static void __init probe_masking_msrs(void)
>  	unsigned int exp_msr_basic, exp_msr_ext, exp_msr_xsave;
>  
>  	/* Only family 6 supports this feature. */
> -	if (c->x86 != 6)
> +	if (c->family != 6)
>  		return;
>  
> -	switch (c->x86_model) {
> -	case 0x17: /* Yorkfield, Wolfdale, Penryn, Harpertown(DP) */
> -	case 0x1d: /* Dunnington(MP) */
> +	switch ( c->vfm )
> +	{
> +	case INTEL_CORE2_PENRYN:
> +	case INTEL_CORE2_DUNNINGTON:
>  		msr_basic = MSR_INTEL_MASK_V1_CPUID1;
>  		break;
>  
> -	case 0x1a: /* Bloomfield, Nehalem-EP(Gainestown) */
> -	case 0x1e: /* Clarksfield, Lynnfield, Jasper Forest */
> -	case 0x1f: /* Something Nehalem-based - perhaps Auburndale/Havendale? */
> -	case 0x25: /* Arrandale, Clarksdale */
> -	case 0x2c: /* Gulftown, Westmere-EP */
> -	case 0x2e: /* Nehalem-EX(Beckton) */
> -	case 0x2f: /* Westmere-EX */
> +	case INTEL_NEHALEM_EP:
> +	case INTEL_NEHALEM:
> +	case INTEL_NEHALEM_G:
> +	case INTEL_WESTMERE:
> +	case INTEL_WESTMERE_EP:
> +	case INTEL_NEHALEM_EX:
> +	case INTEL_WESTMERE_EX:

... best also be followed here, even if that means some re-ordering
compared to what original code had.

> @@ -572,8 +580,13 @@ static void intel_log_freq(const struct cpuinfo_x86 *c)
>              factor = core_factors[msrval];
>              break;
>  
> -        case 0x1a: case 0x1e: case 0x1f: case 0x2e: /* Nehalem */
> -        case 0x25: case 0x2c: case 0x2f: /* Westmere */
> +        case INTEL_NEHALEM_EP:
> +        case INTEL_NEHALEM:
> +        case INTEL_NEHALEM_G:
> +        case INTEL_NEHALEM_EX:
> +        case INTEL_WESTMERE:
> +        case INTEL_WESTMERE_EP:
> +        case INTEL_WESTMERE_EX:
>              factor = 13333;
>              break;

Same here. (This iirc also wasn't there in v1, but isn't mentioned in
the changelog.)

> @@ -657,14 +670,17 @@ static void cf_check init_intel(struct cpuinfo_x86 *c)
>  	/* Work around errata */
>  	Intel_errata_workarounds(c);
>  
> -	if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
> -		(c->x86 == 0x6 && c->x86_model >= 0x0e))
> -		__set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
> -	if (cpu_has(c, X86_FEATURE_ITSC)) {
> -		__set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
> -		__set_bit(X86_FEATURE_NONSTOP_TSC, c->x86_capability);
> -		__set_bit(X86_FEATURE_TSC_RELIABLE, c->x86_capability);
> -	}
> +    if ( ( c->family == 15 && c->model >= 0x03 ) ||
> +         ( c->family == 6 && c->model >= 0x0e ) )
> +        __set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
> +
> +    if ( cpu_has(c, X86_FEATURE_ITSC) )
> +    {
> +        __set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
> +        __set_bit(X86_FEATURE_NONSTOP_TSC, c->x86_capability);
> +        __set_bit(X86_FEATURE_TSC_RELIABLE, c->x86_capability);
> +    }
> +
>  	if ( opt_arat &&
>  	     ( c->cpuid_level >= 0x00000006 ) &&
>  	     ( cpuid_eax(0x00000006) & (1u<<2) ) )

>From your v1 reply I concluded that you understood that this isn't the way
to go. Within a function, indentation shouldn't vary like this. I suggest
anyway that you really wait with submitting a new version until discussion
has settled.

Jan


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Date: Wed, 26 Nov 2025 07:53:47 +0100
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Subject: Re: [PATCH v2] x86/vhpet: Fix sanitization of legacy IRQ route
To: Tu Dinh 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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From: Jan Beulich 
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On 25.11.2025 17:52, Tu Dinh wrote:
> When setting a timer's config register, timer_sanitize_int_route will
> always reset the IRQ route value to what's valid corresponding to the
> !HPET_CFG_LEGACY case. This is applied even if the HPET is set to
> HPET_CFG_LEGACY.
> 
> When some operating systems (e.g. Windows) try to write to a timer
> config, they will verify and rewrite the register if the values don't
> match what they expect. This causes an unnecessary write to HPET_Tn_CFG.
> 
> Note, the HPET specification states that for the Tn_INT_ROUTE_CNF field:
> 
> "If the value is not supported by this prarticular timer, then the value
> read back will not match what is written. [...] If the LegacyReplacement
> Route bit is set, then Timers 0 and 1 will have a different routing, and
> this bit field has no effect for those two timers."
> 
> Therefore, Xen should not reset timer_int_route if legacy mode is
> enabled, regardless of what's in there.
> 
> Fixes: ec40d3fe2147 ("x86/vhpet: check that the set interrupt route is valid")
> Signed-off-by: Tu Dinh 

Reviewed-by: Jan Beulich 



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On 26.11.2025 00:00, Grygorii Strashko wrote:
> From: Grygorii Strashko 
> 
> Introduce separate HVM_SAVE_RESTORE config for HVM save/restore feature,
> which is enabled by default for HVM and depends on MGMT_HYPERCALLS config.
> 
> This allows to make MGMT_HYPERCALLS specific changes more granular and, if
> required, make HVM save/restore optional, selectable feature.
> 
> Signed-off-by: Grygorii Strashko 
> ---
> I'd like to propose this patch as a replacement of Patch 19 [1]
> 
> [1] https://patchwork.kernel.org/project/xen-devel/patch/20251121105801.1251262-20-Penny.Zheng@amd.com/
> 
>  xen/arch/x86/cpu/mcheck/vmce.c       | 4 ++--
>  xen/arch/x86/emul-i8254.c            | 4 +++-
>  xen/arch/x86/hvm/Kconfig             | 6 ++++++
>  xen/arch/x86/hvm/Makefile            | 2 +-
>  xen/arch/x86/hvm/hpet.c              | 3 ++-
>  xen/arch/x86/hvm/hvm.c               | 4 ++++
>  xen/arch/x86/hvm/irq.c               | 2 ++
>  xen/arch/x86/hvm/mtrr.c              | 2 ++
>  xen/arch/x86/hvm/pmtimer.c           | 2 ++
>  xen/arch/x86/hvm/rtc.c               | 2 ++
>  xen/arch/x86/hvm/vioapic.c           | 2 ++
>  xen/arch/x86/hvm/viridian/viridian.c | 2 ++
>  xen/arch/x86/hvm/vlapic.c            | 3 ++-
>  xen/arch/x86/hvm/vpic.c              | 2 ++
>  xen/arch/x86/include/asm/hvm/save.h  | 5 ++++-
>  15 files changed, 38 insertions(+), 7 deletions(-)
> 
> diff --git a/xen/arch/x86/cpu/mcheck/vmce.c b/xen/arch/x86/cpu/mcheck/vmce.c
> index 1a7e92506ac8..ba27f6f8bd91 100644
> --- a/xen/arch/x86/cpu/mcheck/vmce.c
> +++ b/xen/arch/x86/cpu/mcheck/vmce.c
> @@ -349,7 +349,7 @@ int vmce_wrmsr(uint32_t msr, uint64_t val)
>      return ret;
>  }
>  
> -#if CONFIG_HVM
> +#if defined(CONFIG_HVM_SAVE_RESTORE)

#if wasn't really correct to use here; #ifdef was and is wanted.

>  static int cf_check vmce_save_vcpu_ctxt(struct vcpu *v, hvm_domain_context_t *h)
>  {
>      struct hvm_vmce_vcpu ctxt = {
> @@ -380,10 +380,10 @@ static int cf_check vmce_load_vcpu_ctxt(struct domain *d, hvm_domain_context_t *
>  
>      return err ?: vmce_restore_vcpu(v, &ctxt);
>  }
> +#endif /* CONFIG_HVM_SAVE_RESTORE */
>  
>  HVM_REGISTER_SAVE_RESTORE(VMCE_VCPU, vmce_save_vcpu_ctxt, NULL,
>                            vmce_load_vcpu_ctxt, 1, HVMSR_PER_VCPU);
> -#endif

Why would this #endif move? (It gaining a comment is fine of course.)

> --- a/xen/arch/x86/emul-i8254.c
> +++ b/xen/arch/x86/emul-i8254.c
> @@ -409,7 +409,9 @@ void pit_stop_channel0_irq(PITState *pit)
>      destroy_periodic_time(&pit->pt0);
>      spin_unlock(&pit->lock);
>  }
> +#endif
>  
> +#if defined(CONFIG_HVM_SAVE_RESTORE)

Hmm, again - please use the shorter #ifdef.

> @@ -507,9 +509,9 @@ static int cf_check pit_load(struct domain *d, hvm_domain_context_t *h)
>  
>      return rc;
>  }
> +#endif /* CONFIG_HVM_SAVE_RESTORE */
>  
>  HVM_REGISTER_SAVE_RESTORE(PIT, pit_save, pit_check, pit_load, 1, HVMSR_PER_DOM);
> -#endif

And again - why move it?

> --- a/xen/arch/x86/hvm/Kconfig
> +++ b/xen/arch/x86/hvm/Kconfig
> @@ -93,4 +93,10 @@ config MEM_SHARING
>  	depends on INTEL_VMX
>  	depends on MGMT_HYPERCALLS
>  
> +config HVM_SAVE_RESTORE
> +	depends on MGMT_HYPERCALLS
> +	def_bool y
> +	help
> +	  Enables HVM save/load functionality.
> +
>  endif

This wants to move up some imo; MEM_SHARING is clearing the more niche feature.

> --- a/xen/arch/x86/include/asm/hvm/save.h
> +++ b/xen/arch/x86/include/asm/hvm/save.h
> @@ -123,6 +123,7 @@ void hvm_register_savevm(uint16_t typecode,
>  
>  /* Syntactic sugar around that function: specify the max number of
>   * saves, and this calculates the size of buffer needed */
> +#ifdef CONFIG_HVM_SAVE_RESTORE
>  #define HVM_REGISTER_SAVE_RESTORE(_x, _save, check, _load, _num, _k)      \
>  static int __init cf_check __hvm_register_##_x##_save_and_restore(void)   \
>  {                                                                         \
> @@ -137,7 +138,9 @@ static int __init cf_check __hvm_register_##_x##_save_and_restore(void)   \
>      return 0;                                                             \
>  }                                                                         \
>  __initcall(__hvm_register_##_x##_save_and_restore);
> -
> +#else
> +#define HVM_REGISTER_SAVE_RESTORE(_x, _save, check, _load, _num, _k)
> +#endif

By suitably moving the #endif-s I would hope we can get away without this
dummy #define.

Jan


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Date: Wed, 26 Nov 2025 08:40:09 +0100
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Subject: Re: [PATCH v6 03/25] drm/gem-dma: Compute dumb-buffer sizes with
 drm_mode_size_dumb()
To: Ludovic.Desroches@microchip.com, simona@ffwll.ch, airlied@gmail.com,
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References: <20250821081918.79786-1-tzimmermann@suse.de>
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Hi

Am 26.11.25 um 07:24 schrieb Ludovic.Desroches@microchip.com:
> On 11/25/25 16:03, Thomas Zimmermann wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know
>> the content is safe
>>
>> Hi
>>
>> Am 25.11.25 um 15:39 schrieb Ludovic.Desroches@microchip.com:
>>> On 8/21/25 10:17, Thomas Zimmermann wrote:
>>>> Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch and
>>>> buffer size. Align the pitch to a multiple of 8.
>> I missed a chance to explain it here. :/
> I was wondering if it was 8-bits or 8-bytes.
>
>>>> Push the current calculation into the only direct caller imx. Imx's
>>>> hardware requires the framebuffer width to be aligned to 8. The
>>>> driver's current approach is actually incorrect, as it only guarantees
>>>> this implicitly and requires bpp to be a multiple of 8 already. A
>>>> later commit will fix this problem by aligning the scanline pitch
>>>> such that an aligned width still fits into each scanline's memory.
>>>>
>>>> A number of other drivers are build on top of gem-dma helpers and
>>>> implement their own dumb-buffer allocation. These drivers invoke
>>>> drm_gem_dma_dumb_create_internal(), which is not affected by this
>>>> commit.
>>>>
>>>> v5:
>>>> - avoid reset of arguments (Tomi)
>>>>
>>>> Signed-off-by: Thomas Zimmermann 
>>>> Reviewed-by: Tomi Valkeinen 
>>>> ---
>>>>     drivers/gpu/drm/drm_gem_dma_helper.c     | 7 +++++--
>>>>     drivers/gpu/drm/imx/ipuv3/imx-drm-core.c | 4 +++-
>>>>     2 files changed, 8 insertions(+), 3 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/drm_gem_dma_helper.c b/drivers/gpu/drm/
>>>> drm_gem_dma_helper.c
>>>> index 4f0320df858f..ab1a70b1d6f1 100644
>>>> --- a/drivers/gpu/drm/drm_gem_dma_helper.c
>>>> +++ b/drivers/gpu/drm/drm_gem_dma_helper.c
>>>> @@ -20,6 +20,7 @@
>>>>     #include 
>>>>     #include 
>>>>     #include 
>>>> +#include 
>>>>     #include 
>>>>     #include 
>>>>
>>>> @@ -304,9 +305,11 @@ int drm_gem_dma_dumb_create(struct drm_file
>>>> *file_priv,
>>>>                           struct drm_mode_create_dumb *args)
>>>>     {
>>>>       struct drm_gem_dma_object *dma_obj;
>>>> +    int ret;
>>>>
>>>> -    args->pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
>>>> -    args->size = args->pitch * args->height;
>>>> +    ret = drm_mode_size_dumb(drm, args, SZ_8, 0);
>>>> +    if (ret)
>>>> +            return ret;
>>> Hi,
>>>
>>> Was it intentional for this change to alter the pitch?
>> Most hardware does not need the pitch to be of a certain alignment. But
>> these buffers are possibly shared with other hardware, which sometimes
>> needs alignment to certain values. Using SZ_8 improves compatible with
>> that hardware.
>>
>>> The alignment requirement has been updated—from 8-bit alignment to
>>> 64-bit alignment. Since the pitch is expressed in bytes, we should pass
>>> SZ_1 instead of SZ_8 for hw_patch_align.
>>>
>>> For example, for an 850×480 framebuffer at 16 bpp, the pitch should be
>>> 1700 bytes. With the new alignment, the pitch becomes 1704 bytes.
>> Many display modes have an 8-byte alignment in their width. 850 pixels
>> is somewhat of an exception.
> Indeed, but overlay-type planes are often used to display windows that
> are not the same size as the screen, and therefore potentially not on
> 8-bytes aligned.
>
>>> Please let me know if you’d like me to submit a fix.
>> Do you see a bug with your hardware? Unless this creates a real problem,
>> I'd like to keep it as it is now.
> Yes, that’s how I noticed this change. I have an application that
> requests a framebuffer larger than my screen, in this case 850x480 in
> RGB565 for an 800x480 display. So I have a pitch of 1700 bytes. Now it’s
> using a pitch of 1704, which shifts my lines.

Honestly, your application is broken. The ioctl returns the pitch value 
to user space and that's what the program should use. Some hardware has 
hard constraints on the pitch, so you will sooner or later run into the 
same problem again.

Anyway, feel free to submit a patch to call drm_mode_size_dumb() without 
SZ_8. The best value would be 0, so that the function picks a default by 
itself. Since you're at it, maybe also look at patches 4 and 5 of this 
series. They have similar code for other memory managers.

Best regards
Thomas

>
> Regards,
> Ludovic
>
>> Best regards
>> Thomas
>>
>>> Regards,
>>> Ludovic
>>>
>>>
>>>>       dma_obj = drm_gem_dma_create_with_handle(file_priv, drm, args-
>>>>> size,
>>>>                                                &args->handle);
>>>> diff --git a/drivers/gpu/drm/imx/ipuv3/imx-drm-core.c b/drivers/gpu/
>>>> drm/imx/ipuv3/imx-drm-core.c
>>>> index ec5fd9a01f1e..af4a30311e18 100644
>>>> --- a/drivers/gpu/drm/imx/ipuv3/imx-drm-core.c
>>>> +++ b/drivers/gpu/drm/imx/ipuv3/imx-drm-core.c
>>>> @@ -145,8 +145,10 @@ static int imx_drm_dumb_create(struct drm_file
>>>> *file_priv,
>>>>       int ret;
>>>>
>>>>       args->width = ALIGN(width, 8);
>>>> +    args->pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
>>>> +    args->size = args->pitch * args->height;
>>>>
>>>> -    ret = drm_gem_dma_dumb_create(file_priv, drm, args);
>>>> +    ret = drm_gem_dma_dumb_create_internal(file_priv, drm, args);
>>>>       if (ret)
>>>>               return ret;
>>>>
>> -- 
>> -- 
>> Thomas Zimmermann
>> Graphics Driver Developer
>> SUSE Software Solutions Germany GmbH
>> Frankenstr. 146, 90461 Nürnberg, Germany, www.suse.com
>> GF: Jochen Jaser, Andrew McDonald, Werner Knoblich, (HRB 36809, AG
>> Nürnberg)
>>
>>
>

-- 
--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Frankenstr. 146, 90461 Nürnberg, Germany, www.suse.com
GF: Jochen Jaser, Andrew McDonald, Werner Knoblich, (HRB 36809, AG Nürnberg)




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On 21/11/25 13:14, Markus Armbruster wrote:

> Markus Armbruster (15):

>    hw/usb: Convert to qemu_create() for a better error message

>    hw/scsi: Use error_setg_file_open() for a better error message
>    hw/virtio: Use error_setg_file_open() for a better error message

Queued these 3, thanks.


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From: Roger Pau Monne 
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	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	Stefano Stabellini ,
	Saman Dehghan 
Subject: [PATCH] xen/linker: be more selective about defining LLVM_COV_*
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There's no need to place the LLVM coverage sections in the linker script if
not building with clang, or if code coverage is not enabled.

No functional change intended.

Fixes: 186c02e85961 ('xen: Support LLVM raw profile versions 5, 6, 7, 8, 9, and 10')
Reported-by: Andrew Cooper 
Signed-off-by: Roger Pau Monné 
---
 xen/include/xen/xen.lds.h | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/xen/include/xen/xen.lds.h b/xen/include/xen/xen.lds.h
index d80c89595979..f54fb2d15290 100644
--- a/xen/include/xen/xen.lds.h
+++ b/xen/include/xen/xen.lds.h
@@ -81,6 +81,7 @@
   .stab.index 0 : { *(.stab.index) }         \
   .stab.indexstr 0 : { *(.stab.indexstr) }
 
+#if defined(CONFIG_CC_IS_CLANG) && defined(CONFIG_COVERAGE)
 /* Clang coverage sections. */
 #define LLVM_COV_RW_DATA                                   \
     DECL_SECTION(__llvm_prf_cnts) { *(__llvm_prf_cnts) }   \
@@ -93,6 +94,11 @@
 #define LLVM_COV_DEBUG                                     \
     DECL_DEBUG(__llvm_covfun, 8)                           \
     DECL_DEBUG(__llvm_covmap, 8)
+#else
+#define LLVM_COV_RW_DATA
+#define LLVM_COV_RO_DATA
+#define LLVM_COV_DEBUG
+#endif
 
 /*
  * ELF sections.
-- 
2.51.0



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Date: Wed, 26 Nov 2025 09:21:37 +0100
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: "xen-devel@lists.xenproject.org" ,
	Andrew Cooper ,
	Julien Grall ,
	Stefano Stabellini ,
	Anthony PERARD ,
	Michal Orzel 
Subject: Re: [PATCH 2/2] symbols/x86: don't use symbols-dummy
Message-ID: 
References: <2d7602ce-3665-4853-85f0-c0201642193f@suse.com>
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On Wed, Nov 26, 2025 at 07:21:09AM +0100, Jan Beulich wrote:
> On 25.11.2025 18:36, Roger Pau Monné wrote:
> > On Tue, Nov 25, 2025 at 03:14:27PM +0100, Jan Beulich wrote:
> >> In particular when linking with lld, which converts hidden symbols to
> >> local ones, the ELF symbol table can change in unhelpful ways between the
> >> first two linking passes, resulting in the .rodata contributions to change
> >> between the 2nd and 3rd pass. That, however, renders our embedded symbol
> >> table pretty much unusable; the recently introduced self-test may then
> >> also fail. (Another difference between compiling a C file and assembling
> >> the generated ones is that - with -fdata-sections in use - the .rodata
> >> contributions move between passes 1 and 2, when we'd prefer them not to.)
> >>
> >> Make tools/symbols capable of producing an "empty" assembly file, such
> >> that unwanted differences between passes 1 and 2 go away when then using
> >> the corresponding objects in place of common/symbols-dummy.o.
> >>
> >> Reported-by: Andrew Cooper 
> >> Reported-by: Roger Pau Monné 
> >> Signed-off-by: Jan Beulich 
> > 
> > LGTM, not sure whether you want to extend to other arches in this
> > same patch, or simply guard the build of symbols-dummy.o for non-x86
> > arches.
> 
> I think I'd prefer to mirror it to other arch-es, but in separate
> patches (so they can go in independently). Then once all are in, ...

Reviewed-by: Roger Pau Monné 

> >> ---
> >> May want mirroring to other arch-es.
> >>
> >> --- a/xen/arch/x86/Makefile
> >> +++ b/xen/arch/x86/Makefile
> >> @@ -134,8 +134,10 @@ $(TARGET): $(TARGET)-syms $(efi-y) $(obj
> >>  CFLAGS-$(XEN_BUILD_EFI) += -DXEN_BUILD_EFI
> >>  
> >>  $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds
> >> +	$(objtree)/tools/symbols $(all_symbols) --empty > $(dot-target).0.S
> >> +	$(MAKE) $(build)=$(@D) $(dot-target).0.o
> >>  	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \
> >> -	    $(objtree)/common/symbols-dummy.o -o $(dot-target).0
> > 
> > It would be good if we could now stop building symbols-dummy.o as part
> > of extra-y.  Maybe you could guard it with ifneq ($(CONFIG_X86),y) in
> > the Makefile?
> > 
> > Or otherwise remove this from all arches thus removing
> > common/symbols-dummy.c.
> 
> ... I'd remove symbols-dummy altogether. I don't think there's a need
> to transiently disable building of symbols-dummy.o for just some of the
> arch-es (like foe x86 right here).

OK, as long as those other patches don't get stuck that's fine for me.

> >> --- a/xen/tools/symbols.c
> >> +++ b/xen/tools/symbols.c
> >> @@ -672,7 +672,10 @@ int main(int argc, char **argv)
> >>  				warn_dup = true;
> >>  			else if (strcmp(argv[i], "--error-dup") == 0)
> >>  				warn_dup = error_dup = true;
> >> -			else if (strcmp(argv[i], "--xensyms") == 0)
> >> +			else if (strcmp(argv[i], "--empty") == 0) {
> >> +				write_src();
> >> +				return 0;
> > 
> > Oh, that was easier than I was expecting for symbols to generate a
> > working empty assembly file.
> 
> Yeah, I also expected it to be more intrusive. The file isn't exactly,
> though - two of the tables (the ones with 256 entries) are emitted
> nevertheless. I didn't consider this an issue, though.

As long as it builds and has the same symbols defined, it's all fine.
IMO,  We don't care about the sizes at this point, just using the same
sections for the defined symbols.

Thanks, Roger.


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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH] x86/msix: fix incorrect refcount decrease in msixtlb
Date: Wed, 26 Nov 2025 09:24:44 +0100
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The usage of atomic_dec_and_test() in msixtbl_pt_unregister() is inverted:
the function will return true when the refcount reaches 0.  The current
code does the opposite and calls del_msixtbl_entry() when there are still
refcounts held on the object.

However all callers of msixtbl_pt_unregister() are serialized on the domctl
lock, and hence there cannot be parallel calls to msixtbl_pt_unregister()
that could lead to double freeing of the same object.

The incorrect freeing with active msixtlb entries will result in a possible
guest visible malfunction, but no internal Xen state corruption.

While entries are leaked once the last pIRQ is unbound, the same entry
would get re-used if the device has pIRQs bound again.  The guest cannot
exploit this incorrect refcount check to leak arbitrary amounts of memory
by repeatedly enabling and disabling (binding and unbinding) MSI-X entries.

Fixes: 34097f0d3080 ('hvm: passthrough MSI-X mask bit acceleration')
Signed-off-by: Roger Pau Monné 
Reviewed-by: Jan Beulich 
---
 xen/arch/x86/hvm/vmsi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c
index 32e417bc1592..27b1f089e20b 100644
--- a/xen/arch/x86/hvm/vmsi.c
+++ b/xen/arch/x86/hvm/vmsi.c
@@ -716,7 +716,7 @@ out:
     return;
 
 found:
-    if ( !atomic_dec_and_test(&entry->refcnt) )
+    if ( atomic_dec_and_test(&entry->refcnt) )
         del_msixtbl_entry(entry);
 
     spin_unlock_irq(&irqd->lock);
-- 
2.51.0



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Subject: Re: [PATCH] xen/linker: be more selective about defining LLVM_COV_*
To: Roger Pau Monne 
Cc: Andrew Cooper ,
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On 26.11.2025 09:16, Roger Pau Monne wrote:
> There's no need to place the LLVM coverage sections in the linker script if
> not building with clang, or if code coverage is not enabled.
> 
> No functional change intended.
> 
> Fixes: 186c02e85961 ('xen: Support LLVM raw profile versions 5, 6, 7, 8, 9, and 10')
> Reported-by: Andrew Cooper 
> Signed-off-by: Roger Pau Monné 

Reviewed-by: Jan Beulich 



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Subject: Re: [PATCH v4 22/24] xen/domctl: domctl_lock synchronization only
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 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 21.11.2025 11:57, Penny Zheng wrote:
> Helper domctl_lock_{acquire,release} is domctl_lock, which HVM_PARAM_IDENT_PT
> uses to ensure synchronization on potential domctl-op altering guest state.
> So it is only needed when MGMT_HYPERCALLS=y.
> 
> Suggested-by: Jan Beulich 
> Signed-off-by: Penny Zheng 

Acked-by: Jan Beulich 

I'd like to note though that ...

> ---
> v3 -> v4:
> - new commit
> ---
>  xen/arch/x86/hvm/hvm.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)

... with this diffstat the subject prefix is pretty misleading once again. I may
take the liberty and convert it to x86/hvm: (and then also add parentheses to
domctl_lock()).

Jan


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Subject: Re: [PATCH v4 23/24] xen/domctl: wrap common/domctl.c with
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To: Penny Zheng 
Cc: ray.huang@amd.com, grygorii_strashko@epam.com,
 Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
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On 21.11.2025 11:58, Penny Zheng wrote:
> --- a/xen/common/Kconfig
> +++ b/xen/common/Kconfig
> @@ -654,11 +654,17 @@ menu "Supported hypercall interfaces"
>  config MGMT_HYPERCALLS
>  	bool "Enable privileged hypercalls for system management"
>  	depends on !PV_SHIM_EXCLUSIVE
> -	def_bool y

Why would the default not be Y anymore?

>  	help
> -	  This option shall only be disabled on some dom0less systems, or
> -	  PV shim on x86, to reduce Xen footprint via managing unnessary
> -	  hypercalls, like sysctl, etc.
> +	  Management hypercalls provide the means for dom0 to manage the
> +	  overall Xen system and other domains, including sysctl, domctl, etc.
> +	  In a dom0less or pv-shim build, they can be omitted to cut down
> +	  on the Xen binary's size. However, this comes at the loss of
> +	  significant runtime functionality.
> +	  So be cautious to disable it, as admins will face missing a few basic
> +	  hypercalls like listdomains, getdomaininfo, etc, hence leading to
> +	  have an impact on device-passthrough and DM.
> +
> +	  Unless you know what you are doing, you should enable this.

To be in line with what other help texts say, can this be "..., say Y" please?

Jan


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Subject: Re: [PATCH v6 03/25] drm/gem-dma: Compute dumb-buffer sizes with
 drm_mode_size_dumb()
Thread-Topic: [PATCH v6 03/25] drm/gem-dma: Compute dumb-buffer sizes with
 drm_mode_size_dumb()
Thread-Index: AQHcEnS8fucA3LjqjkuGZw8r9BxHgrUEDdaAgAAGpQCAAQFLgIAAFRiAgAAedQA=
Date: Wed, 26 Nov 2025 09:29:08 +0000
Message-ID: <09cdbc92-63db-473e-8c5b-5ca9ac3c6a2a@microchip.com>
References: <20250821081918.79786-1-tzimmermann@suse.de>
 <20250821081918.79786-4-tzimmermann@suse.de>
 <52600bf4-2c1c-49a6-82c5-b31818141a43@microchip.com>
 
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Date: Wed, 26 Nov 2025 10:34:08 +0100
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Subject: Re: [PATCH v4 24/24] xen: move MGMT_HYPERCALLS out of
 PV_SHIM_EXCLUSIVE
To: Penny Zheng 
Cc: ray.huang@amd.com, grygorii_strashko@epam.com,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <20251121105801.1251262-1-Penny.Zheng@amd.com>
 <20251121105801.1251262-25-Penny.Zheng@amd.com>
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On 21.11.2025 11:58, Penny Zheng wrote:
> As we're aiming at moving away from PV_SHIM_EXCLUSIVE=y, we are
> moving MGMT_HYPERCALLS out of it.

How are we "moving away from PV_SHIM_EXCLUSIVE=y"? It's the "depends on
!PV_SHIM_EXCLUSIVE" (and related Makefile constructs) which we decided to
get rid of.

> --- a/xen/arch/x86/Makefile
> +++ b/xen/arch/x86/Makefile
> @@ -30,6 +30,7 @@ obj-bin-y += dmi_scan.init.o
>  obj-y += domain.o
>  obj-bin-y += dom0_build.init.o
>  obj-y += domain_page.o
> +obj-$(CONFIG_MGMT_HYPERCALLS) += domctl.o
>  obj-y += e820.o
>  obj-y += emul-i8254.o
>  obj-y += extable.o
> @@ -79,7 +80,6 @@ obj-$(CONFIG_VM_EVENT) += vm_event.o
>  obj-y += xstate.o
>  
>  ifneq ($(CONFIG_PV_SHIM_EXCLUSIVE),y)
> -obj-$(CONFIG_MGMT_HYPERCALLS) += domctl.o
>  obj-y += platform_hypercall.o
>  obj-$(CONFIG_COMPAT) += x86_64/platform_hypercall.o
>  endif

A change like this fits under the subject.

> --- a/xen/arch/x86/hvm/Kconfig
> +++ b/xen/arch/x86/hvm/Kconfig
> @@ -1,6 +1,5 @@
>  menuconfig HVM
>  	bool "HVM support"
> -	depends on !PV_SHIM_EXCLUSIVE
>  	default !PV_SHIM
>  	select COMPAT
>  	select IOREQ_SERVER

This, however, is entirely unrelated afaics.

> --- a/xen/arch/x86/include/asm/paging.h
> +++ b/xen/arch/x86/include/asm/paging.h
> @@ -55,7 +55,7 @@
>  #define PG_translate   0
>  #define PG_external    0
>  #endif
> -#if defined(CONFIG_PAGING) && !defined(CONFIG_PV_SHIM_EXCLUSIVE) && defined(CONFIG_MGMT_HYPERCALLS)
> +#if defined(CONFIG_PAGING) && defined(CONFIG_MGMT_HYPERCALLS)
>  /* Enable log dirty mode */
>  #define PG_log_dirty   (XEN_DOMCTL_SHADOW_ENABLE_LOG_DIRTY << PG_mode_shift)
>  #else

Whereas this could fit here if the subject was e.g. "decouple PV_SHIM_EXCLUSIVE and
MGMT_HYPERCALLS".

Further, because of prior issue: Can you please clarify that you have tried builds
with all (possible) combinations of the involved Kconfig settings? The set isn't
that big, so exhaustive testing is possible.

Jan


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Subject: Re: [PATCH v4 22/24] xen/domctl: domctl_lock synchronization only
 when MGMT_HYPERCALLS=y
From: Jan Beulich 
To: Penny Zheng 
Cc: ray.huang@amd.com, grygorii_strashko@epam.com,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org
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On 26.11.2025 10:20, Jan Beulich wrote:
> On 21.11.2025 11:57, Penny Zheng wrote:
>> Helper domctl_lock_{acquire,release} is domctl_lock, which HVM_PARAM_IDENT_PT
>> uses to ensure synchronization on potential domctl-op altering guest state.
>> So it is only needed when MGMT_HYPERCALLS=y.
>>
>> Suggested-by: Jan Beulich 
>> Signed-off-by: Penny Zheng 
> 
> Acked-by: Jan Beulich 
> 
> I'd like to note though that ...
> 
>> ---
>> v3 -> v4:
>> - new commit
>> ---
>>  xen/arch/x86/hvm/hvm.c | 5 +++--
>>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> ... with this diffstat the subject prefix is pretty misleading once again. I may
> take the liberty and convert it to x86/hvm: (and then also add parentheses to
> domctl_lock()).

Actually, the series looks to be in need of a full re-submission anyway. I.e. I
can't sensibly cherry-pick parts to put in early.

Jan


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Date: Wed, 26 Nov 2025 10:39:19 +0100
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v4 06/24] xen/domctl: consolidate domain.c with
 MGMT_HYPERCALLS
To: Penny Zheng 
Cc: ray.huang@amd.com, grygorii_strashko@epam.com,
 Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <20251121105801.1251262-1-Penny.Zheng@amd.com>
 <20251121105801.1251262-7-Penny.Zheng@amd.com>
Content-Language: en-US
From: Jan Beulich 
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In-Reply-To: <20251121105801.1251262-7-Penny.Zheng@amd.com>
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On 21.11.2025 11:57, Penny Zheng wrote:
> The following functions, scattered in common/domain.c, and are only referenced
> and responsible for domctl-op:
> - domain_pause_by_systemcontroller
> - domain_resume
> - domain_set_node_affinity
> So they shall be wrapped with CONFIG_MGMT_HYPERCALLS. Otherwise it will
> become unreachable codes when MGMT_HYPERCALLS=n, and hence violating Misra
> rule 2.1.
> Move them together to avoid scattering #ifdef.
> 
> Signed-off-by: Penny Zheng 

One further small request here:

> --- a/xen/common/domain.c
> +++ b/xen/common/domain.c
> @@ -1115,35 +1115,6 @@ void __init setup_system_domains(void)
>  #endif
>  }
>  
> -int domain_set_node_affinity(struct domain *d, const nodemask_t *affinity)
> -{
> -    /* Being disjoint with the system is just wrong. */
> -    if ( !nodes_intersects(*affinity, node_online_map) )
> -        return -EINVAL;
> -
> -    spin_lock(&d->node_affinity_lock);
> -
> -    /*
> -     * Being/becoming explicitly affine to all nodes is not particularly
> -     * useful. Let's take it as the `reset node affinity` command.
> -     */
> -    if ( nodes_full(*affinity) )
> -    {
> -        d->auto_node_affinity = 1;
> -        goto out;
> -    }
> -
> -    d->auto_node_affinity = 0;
> -    d->node_affinity = *affinity;
> -
> -out:

I realize you only move this, but ...

> @@ -1616,10 +1560,68 @@ static int _domain_pause_by_systemcontroller(struct domain *d, bool sync)
>      return 0;
>  }
>  
> +#ifdef CONFIG_MGMT_HYPERCALLS
> +int domain_set_node_affinity(struct domain *d, const nodemask_t *affinity)
> +{
> +    /* Being disjoint with the system is just wrong. */
> +    if ( !nodes_intersects(*affinity, node_online_map) )
> +        return -EINVAL;
> +
> +    spin_lock(&d->node_affinity_lock);
> +
> +    /*
> +     * Being/becoming explicitly affine to all nodes is not particularly
> +     * useful. Let's take it as the `reset node affinity` command.
> +     */
> +    if ( nodes_full(*affinity) )
> +    {
> +        d->auto_node_affinity = 1;
> +        goto out;
> +    }
> +
> +    d->auto_node_affinity = 0;
> +    d->node_affinity = *affinity;
> +
> +out:

... can you please add a leading blank here, to conform to ./CODING_STYLE?

Jan


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Date: Wed, 26 Nov 2025 12:05:43 +0200
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v4 03/24] xen/sysctl: replace CONFIG_SYSCTL with
 CONFIG_MGMT_HYPERCALLS
To: Jan Beulich , Penny Zheng ,
 "Daniel P. Smith" 
Cc: ray.huang@amd.com, Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Bertrand Marquis ,
 Volodymyr Babchuk ,
 Bob Eshleman , Connor Davis
 , Oleksii Kurochko ,
 Nathan Studer ,
 Stewart Hildebrand , Dario Faggioli ,
 Juergen Gross , George Dunlap ,
 Alistair Francis , xen-devel@lists.xenproject.org
References: <20251121105801.1251262-1-Penny.Zheng@amd.com>
 <20251121105801.1251262-4-Penny.Zheng@amd.com>
 <5050db49-8581-499b-93bb-98c0f084d071@epam.com>
 
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On 26.11.25 08:35, Jan Beulich wrote:
> On 26.11.2025 00:02, Grygorii Strashko wrote:
>> Hi
>>
>> On 21.11.25 12:57, Penny Zheng wrote:
>>> Rename all the CONFIG_SYSCTL into CONFIG_MGMT_HYPERCALLS to help provide a
>>> single option to manage all unnecessary hypercalls, including
>>> sysctl, domctl, etc, in dom0less system and PV shim mode, which could also
>>> make it easier to support randconfigs.
>>> While doing the replacement, we fix some bugs on xsm system:
>>> - wrap the whole xsm function to avoid bringing unreachable codes when
>>> MGMT_DOMCTL=n
>>> - add missing wrapping in include/xsm/dummy.h
>>>
>>> Suggested-by: Stefano Stabellini 
>>> Signed-off-by: Penny Zheng 
>>> Reviewed-by: Stefano Stabellini 
>>> Reviewed-by: Juergen Gross 
>>> Acked-by: Stewart Hildebrand  #ARINC 653
>>> Acked-by: Jan Beulich 
>>> Cc: Alistair Francis 
>>> ---
>>> v2 -> v3:
>>> - wrap the whole xsm function
>>> - add missing wrapping in include/xsm/dummy.h
>>> - refine kconfig description
>>> ---
>>
>> With below diff..
>>
>> diff --git a/xen/common/Kconfig b/xen/common/Kconfig
>> index 6709c3c95c53..f478adffff9c 100644
>> --- a/xen/common/Kconfig
>> +++ b/xen/common/Kconfig
>> @@ -652,9 +652,8 @@ menu "Supported hypercall interfaces"
>>          visible if EXPERT
>>   
>>   config MGMT_HYPERCALLS
>> -       bool "Enable privileged hypercalls for system management"
>>          depends on !PV_SHIM_EXCLUSIVE
>> -       default y
>> +       def_bool y
>>          help
>>            This option shall only be disabled on some dom0less systems, or
>>            PV shim on x86, to reduce Xen footprint via managing unnessary
>>
>> It could be very helpful to consider this patch to be applied first.
> 
> It doesn't need the change above, does it? It (aiui) deliberately sits
> ahead of the patch (supposedly) doing the above. While (once again) 

Understood.

>it is not being said anywhere that it's independent of patches 01 and 02,
> I expect it really is.

I do not see any dependencies.

> In which case all that looks to prevent it from
> having gone in already is the lack of an ack for the XSM changes.

:(


>> - number of tags indicates that it's the way to move forward
>> - with above diff patch 4 can be dropped
> 
> Except that imo really wants to be separate. And that could have gone
> in already as well, if only it had been done correctly.
> 
> Jan
> 
>> - it is mechanical change, but it's big and constant source of rebase/merge/cherry-pick conflicts
>> - once applied it will allow, actually, parallel development of this feature as MGMT_HYPERCALLS will
>>    be defined while build not broken.
>>
> 

-- 
Best regards,
-grygorii



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Date: Wed, 26 Nov 2025 12:13:26 +0200
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Subject: Re: [XEN][PATCH] x86/hvm: move save/restore under HVM_SAVE_RESTORE
 config
To: Jan Beulich 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Paul Durrant ,
 "xen-devel@lists.xenproject.org" 
References: <20251125230040.3070954-1-grygorii_strashko@epam.com>
 
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On 26.11.25 08:59, Jan Beulich wrote:
> On 26.11.2025 00:00, Grygorii Strashko wrote:
>> From: Grygorii Strashko 
>>
>> Introduce separate HVM_SAVE_RESTORE config for HVM save/restore feature,
>> which is enabled by default for HVM and depends on MGMT_HYPERCALLS config.
>>
>> This allows to make MGMT_HYPERCALLS specific changes more granular and, if
>> required, make HVM save/restore optional, selectable feature.
>>
>> Signed-off-by: Grygorii Strashko 
>> ---
>> I'd like to propose this patch as a replacement of Patch 19 [1]
>>
>> [1] https://patchwork.kernel.org/project/xen-devel/patch/20251121105801.1251262-20-Penny.Zheng@amd.com/
>>
>>   xen/arch/x86/cpu/mcheck/vmce.c       | 4 ++--
>>   xen/arch/x86/emul-i8254.c            | 4 +++-
>>   xen/arch/x86/hvm/Kconfig             | 6 ++++++
>>   xen/arch/x86/hvm/Makefile            | 2 +-
>>   xen/arch/x86/hvm/hpet.c              | 3 ++-
>>   xen/arch/x86/hvm/hvm.c               | 4 ++++
>>   xen/arch/x86/hvm/irq.c               | 2 ++
>>   xen/arch/x86/hvm/mtrr.c              | 2 ++
>>   xen/arch/x86/hvm/pmtimer.c           | 2 ++
>>   xen/arch/x86/hvm/rtc.c               | 2 ++
>>   xen/arch/x86/hvm/vioapic.c           | 2 ++
>>   xen/arch/x86/hvm/viridian/viridian.c | 2 ++
>>   xen/arch/x86/hvm/vlapic.c            | 3 ++-
>>   xen/arch/x86/hvm/vpic.c              | 2 ++
>>   xen/arch/x86/include/asm/hvm/save.h  | 5 ++++-
>>   15 files changed, 38 insertions(+), 7 deletions(-)
>>
>> diff --git a/xen/arch/x86/cpu/mcheck/vmce.c b/xen/arch/x86/cpu/mcheck/vmce.c
>> index 1a7e92506ac8..ba27f6f8bd91 100644
>> --- a/xen/arch/x86/cpu/mcheck/vmce.c
>> +++ b/xen/arch/x86/cpu/mcheck/vmce.c
>> @@ -349,7 +349,7 @@ int vmce_wrmsr(uint32_t msr, uint64_t val)
>>       return ret;
>>   }
>>   
>> -#if CONFIG_HVM
>> +#if defined(CONFIG_HVM_SAVE_RESTORE)
> 
> #if wasn't really correct to use here; #ifdef was and is wanted.
> 
>>   static int cf_check vmce_save_vcpu_ctxt(struct vcpu *v, hvm_domain_context_t *h)
>>   {
>>       struct hvm_vmce_vcpu ctxt = {
>> @@ -380,10 +380,10 @@ static int cf_check vmce_load_vcpu_ctxt(struct domain *d, hvm_domain_context_t *
>>   
>>       return err ?: vmce_restore_vcpu(v, &ctxt);
>>   }
>> +#endif /* CONFIG_HVM_SAVE_RESTORE */
>>   
>>   HVM_REGISTER_SAVE_RESTORE(VMCE_VCPU, vmce_save_vcpu_ctxt, NULL,
>>                             vmce_load_vcpu_ctxt, 1, HVMSR_PER_VCPU);
>> -#endif
> 
> Why would this #endif move? (It gaining a comment is fine of course.)

Huh. Initially I've used __maybe_unused with save/restore callbacks and
HVM_REGISTER_SAVE_RESTORE() defines as NOP.

I'll correct and drop empty HVM_REGISTER_SAVE_RESTORE()

>> --- a/xen/arch/x86/hvm/Kconfig
>> +++ b/xen/arch/x86/hvm/Kconfig
>> @@ -93,4 +93,10 @@ config MEM_SHARING
>>   	depends on INTEL_VMX
>>   	depends on MGMT_HYPERCALLS
>>   
>> +config HVM_SAVE_RESTORE
>> +	depends on MGMT_HYPERCALLS
>> +	def_bool y
>> +	help
>> +	  Enables HVM save/load functionality.
>> +
>>   endif
> 
> This wants to move up some imo; MEM_SHARING is clearing the more niche feature.
> 

Could you clarify preferred place - before which Kconfig option in hvm/Kconfig?


-- 
Best regards,
-grygorii



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The lock-less list updating isn't safe against racing for_each_vcpu(),
unless done (by hardware) in exactly the order written.

Fixes: 3037c5a2cb82 ("arm: domain")
Signed-off-by: Jan Beulich 
---
The Fixes: tag is pretty arbitrary; the issue was becoming non-latent when
Arm support was added. (Strictly speaking IA-64 and PPC would have been
affected too afaict, just that now that doesn't matter anymore [or, for
PPC, not yet, seeing that its support is being re-built from scratch].)

I'm not quite happy about prev_id being plain int, but changing it to
unsigned (with suitable other adjustments) actually makes gcc15 generate
worse code on x86.

--- a/xen/common/domain.c
+++ b/xen/common/domain.c
@@ -464,6 +464,7 @@ struct vcpu *vcpu_create(struct domain *
             prev_id--;
         BUG_ON(prev_id < 0);
         v->next_in_list = d->vcpu[prev_id]->next_in_list;
+        smp_wmb();
         d->vcpu[prev_id]->next_in_list = v;
     }
 


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On 26.11.2025 11:13, Grygorii Strashko wrote:
> On 26.11.25 08:59, Jan Beulich wrote:
>> On 26.11.2025 00:00, Grygorii Strashko wrote:
>>> --- a/xen/arch/x86/hvm/Kconfig
>>> +++ b/xen/arch/x86/hvm/Kconfig
>>> @@ -93,4 +93,10 @@ config MEM_SHARING
>>>   	depends on INTEL_VMX
>>>   	depends on MGMT_HYPERCALLS
>>>   
>>> +config HVM_SAVE_RESTORE
>>> +	depends on MGMT_HYPERCALLS
>>> +	def_bool y
>>> +	help
>>> +	  Enables HVM save/load functionality.
>>> +
>>>   endif
>>
>> This wants to move up some imo; MEM_SHARING is clearing the more niche feature.
> 
> Could you clarify preferred place - before which Kconfig option in hvm/Kconfig?

There's no "ideal" place imo, as the ordering is somewhat clumsy anyway. Before
HVM_FEP or after VIRIDIAN, I would say (with a slight preference to the former).

Jan


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 Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 
From: Jan Beulich 
Subject: [PATCH] domain: skip more stuff for idle's vCPU-s in vcpu_create()
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Nothing hypercall-related needs setting up there. Nor do we need to
check whether the idle domain is shutting down - it never will.

Signed-off-by: Jan Beulich 
---
For vmtrace_alloc_buffer() adding the conditional may be questionable: The
function checks d->vmtrace_size first thing, bailing immediately when it's
zero (which it always will be for the idle domain).

--- a/xen/common/domain.c
+++ b/xen/common/domain.c
@@ -427,12 +427,6 @@ struct vcpu *vcpu_create(struct domain *
     v->vcpu_id = vcpu_id;
     v->dirty_cpu = VCPU_CPU_CLEAN;
 
-    rwlock_init(&v->virq_lock);
-
-    tasklet_init(&v->continue_hypercall_tasklet, NULL, NULL);
-
-    grant_table_init_vcpu(v);
-
     if ( is_idle_domain(d) )
     {
         v->runstate.state = RUNSTATE_running;
@@ -440,6 +434,12 @@ struct vcpu *vcpu_create(struct domain *
     }
     else
     {
+        rwlock_init(&v->virq_lock);
+
+        tasklet_init(&v->continue_hypercall_tasklet, NULL, NULL);
+
+        grant_table_init_vcpu(v);
+
         v->runstate.state = RUNSTATE_offline;
         v->runstate.state_entry_time = NOW();
         set_bit(_VPF_down, &v->pause_flags);
@@ -450,7 +450,7 @@ struct vcpu *vcpu_create(struct domain *
     if ( sched_init_vcpu(v) != 0 )
         goto fail_wq;
 
-    if ( vmtrace_alloc_buffer(v) != 0 )
+    if ( !is_idle_domain(d) && vmtrace_alloc_buffer(v) != 0 )
         goto fail_wq;
 
     if ( arch_vcpu_create(v) != 0 )
@@ -468,7 +468,8 @@ struct vcpu *vcpu_create(struct domain *
     }
 
     /* Must be called after making new vcpu visible to for_each_vcpu(). */
-    vcpu_check_shutdown(v);
+    if ( !is_idle_domain(d) )
+        vcpu_check_shutdown(v);
 
     return v;
 


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Subject: Re: [PATCH] domain: add barrier in vcpu_create()
To: Jan Beulich ,
 "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper , Julien Grall ,
 Stefano Stabellini ,
 Anthony PERARD ,
 Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Bertrand Marquis 
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From: Juergen Gross 
To: Jan Beulich ,
 "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper , Julien Grall ,
 Stefano Stabellini ,
 Anthony PERARD ,
 Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Bertrand Marquis 
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Subject: Re: [PATCH] domain: add barrier in vcpu_create()
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On 26/11/2025 10:13 am, Jan Beulich wrote:
> The lock-less list updating isn't safe against racing for_each_vcpu(),
> unless done (by hardware) in exactly the order written.
>
> Fixes: 3037c5a2cb82 ("arm: domain")
> Signed-off-by: Jan Beulich 
> ---
> The Fixes: tag is pretty arbitrary; the issue was becoming non-latent when
> Arm support was added. (Strictly speaking IA-64 and PPC would have been
> affected too afaict, just that now that doesn't matter anymore [or, for
> PPC, not yet, seeing that its support is being re-built from scratch].)
>
> I'm not quite happy about prev_id being plain int, but changing it to
> unsigned (with suitable other adjustments) actually makes gcc15 generate
> worse code on x86.
>
> --- a/xen/common/domain.c
> +++ b/xen/common/domain.c
> @@ -464,6 +464,7 @@ struct vcpu *vcpu_create(struct domain *
>              prev_id--;
>          BUG_ON(prev_id < 0);
>          v->next_in_list = d->vcpu[prev_id]->next_in_list;
> +        smp_wmb();
>          d->vcpu[prev_id]->next_in_list = v;
>      }
>  

Where's the matching smp_rmb()?  There needs to be one for this
smp_wmb() to be correct.

It's rather rhetorical, because clearly the smp_rmb() needs to be in
for_each_vcpu() given your commit message, but we obviously don't want
to do that.

This list can only be changed once during a VM's lifecycle, and even
then it only gets appended to.  i.e. this particular piece of logic to
splice a vCPU into the middle of a single linked list can be simplified
to the second assignment, as the first is always copying NULL.

~Andrew


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Subject: Re: [PATCH] domain: add barrier in vcpu_create()
To: Juergen Gross 
Cc: Andrew Cooper , Julien Grall ,
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On 26.11.2025 12:05, Juergen Gross wrote:
> On 26.11.25 11:13, Jan Beulich wrote:
>> The lock-less list updating isn't safe against racing for_each_vcpu(),
>> unless done (by hardware) in exactly the order written.
>>
>> Fixes: 3037c5a2cb82 ("arm: domain")
>> Signed-off-by: Jan Beulich 
>> ---
>> The Fixes: tag is pretty arbitrary; the issue was becoming non-latent when
>> Arm support was added. (Strictly speaking IA-64 and PPC would have been
>> affected too afaict, just that now that doesn't matter anymore [or, for
>> PPC, not yet, seeing that its support is being re-built from scratch].)
>>
>> I'm not quite happy about prev_id being plain int, but changing it to
>> unsigned (with suitable other adjustments) actually makes gcc15 generate
>> worse code on x86.
>>
>> --- a/xen/common/domain.c
>> +++ b/xen/common/domain.c
>> @@ -464,6 +464,7 @@ struct vcpu *vcpu_create(struct domain *
>>               prev_id--;
>>           BUG_ON(prev_id < 0);
>>           v->next_in_list = d->vcpu[prev_id]->next_in_list;
>> +        smp_wmb();
>>           d->vcpu[prev_id]->next_in_list = v;
>>       }
>>   
>>
> 
> It should be noted that this is an issue only in case for_each_vcpu() is
> running against the idle domain during cpu hotplug.
> 
> All other domain get the vcpus populated form vcpu 0 upwards, so
> v->next_in_list will always be NULL for a new vcpu of a "normal" domain.

Hmm, right. And I don't think we ever do for_each_vcpu() on the idle domain.

Jan


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On 26.11.2025 12:09, Andrew Cooper wrote:
> On 26/11/2025 10:13 am, Jan Beulich wrote:
>> The lock-less list updating isn't safe against racing for_each_vcpu(),
>> unless done (by hardware) in exactly the order written.
>>
>> Fixes: 3037c5a2cb82 ("arm: domain")
>> Signed-off-by: Jan Beulich 
>> ---
>> The Fixes: tag is pretty arbitrary; the issue was becoming non-latent when
>> Arm support was added. (Strictly speaking IA-64 and PPC would have been
>> affected too afaict, just that now that doesn't matter anymore [or, for
>> PPC, not yet, seeing that its support is being re-built from scratch].)
>>
>> I'm not quite happy about prev_id being plain int, but changing it to
>> unsigned (with suitable other adjustments) actually makes gcc15 generate
>> worse code on x86.
>>
>> --- a/xen/common/domain.c
>> +++ b/xen/common/domain.c
>> @@ -464,6 +464,7 @@ struct vcpu *vcpu_create(struct domain *
>>              prev_id--;
>>          BUG_ON(prev_id < 0);
>>          v->next_in_list = d->vcpu[prev_id]->next_in_list;
>> +        smp_wmb();
>>          d->vcpu[prev_id]->next_in_list = v;
>>      }
>>  
> 
> Where's the matching smp_rmb()?  There needs to be one for this
> smp_wmb() to be correct.
> 
> It's rather rhetorical, because clearly the smp_rmb() needs to be in
> for_each_vcpu() given your commit message, but we obviously don't want
> to do that.

It's not rhetorical at all, I think. It's not needed there because of the
data dependency due to reading the loop iteration variable from the link
fields. I.e. there are no two reads there which would need ordering against
one another, and hence there's simply no-where to place a read barrier.

> This list can only be changed once during a VM's lifecycle, and even
> then it only gets appended to.  i.e. this particular piece of logic to
> splice a vCPU into the middle of a single linked list can be simplified
> to the second assignment, as the first is always copying NULL.

Except for the idle domain, as Jürgen also mentioned.

Jan


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From: Juergen Gross 
To: Andrew Cooper , Jan Beulich
 ,
 "xen-devel@lists.xenproject.org" 
Cc: Julien Grall , Stefano Stabellini
 , Anthony PERARD ,
 Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Bertrand Marquis 
Message-ID: <3e02e198-1a00-48be-8e6f-a3c1a716451f@suse.com>
Subject: Re: [PATCH] domain: add barrier in vcpu_create()
References: 
 <54ea162a-4de1-478b-afb8-c566d828dd03@citrix.com>
In-Reply-To: <54ea162a-4de1-478b-afb8-c566d828dd03@citrix.com>
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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	Stefano Stabellini 
Subject: [PATCH] x86/viridian: fix calling of viridian_time_domain_{freeze,thaw}()
Date: Wed, 26 Nov 2025 12:29:42 +0100
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The current hook placement in domain_{,un}pause() calls arch_domain_pause()
unconditionally, regardless of whether the domain is already paused or not
unpaused (so no state change).  However the underlying Viridian unpause
function (time_ref_count_thaw()) expects the call to only be done once
there's a transition from paused to active.

Adjust the calling of arch_domain_{,un}pause() so it's only done for state
changes, to accommodate for the behavior expected by the Viridian hooks.
Note there are no other implementations of arch_domain_{,un}pause() apart
from the Viridian use cases, and hence the change is non-functional for all
other architectures (or for x86 if Viridian is disabled).

Fixes: f6a07643e1cc ('x86/viridian: freeze time reference counter when domain is paused')
Signed-off-by: Roger Pau Monné 
---
 xen/common/domain.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/xen/common/domain.c b/xen/common/domain.c
index 3b6e9471c413..e0ca71a53bc1 100644
--- a/xen/common/domain.c
+++ b/xen/common/domain.c
@@ -1547,8 +1547,7 @@ int vcpu_unpause_by_systemcontroller(struct vcpu *v)
 static void _domain_pause(struct domain *d, bool sync)
 {
     struct vcpu *v;
-
-    atomic_inc(&d->pause_count);
+    bool was_paused = atomic_inc_return(&d->pause_count) - 1;
 
     if ( sync )
         for_each_vcpu ( d, v )
@@ -1557,7 +1556,8 @@ static void _domain_pause(struct domain *d, bool sync)
         for_each_vcpu ( d, v )
             vcpu_sleep_nosync(v);
 
-    arch_domain_pause(d);
+    if ( !was_paused )
+        arch_domain_pause(d);
 }
 
 void domain_pause(struct domain *d)
@@ -1575,11 +1575,12 @@ void domain_unpause(struct domain *d)
 {
     struct vcpu *v;
 
-    arch_domain_unpause(d);
-
     if ( atomic_dec_and_test(&d->pause_count) )
+    {
+        arch_domain_unpause(d);
         for_each_vcpu( d, v )
             vcpu_wake(v);
+    }
 }
 
 static int _domain_pause_by_systemcontroller(struct domain *d, bool sync)
-- 
2.51.0



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Date: Wed, 26 Nov 2025 13:44:25 +0100
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Subject: Re: [PATCH] x86/viridian: fix calling of
 viridian_time_domain_{freeze,thaw}()
To: Roger Pau Monne 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <20251126112942.49031-1-roger.pau@citrix.com>
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On 26.11.2025 12:29, Roger Pau Monne wrote:
> --- a/xen/common/domain.c
> +++ b/xen/common/domain.c
> @@ -1547,8 +1547,7 @@ int vcpu_unpause_by_systemcontroller(struct vcpu *v)
>  static void _domain_pause(struct domain *d, bool sync)
>  {
>      struct vcpu *v;
> -
> -    atomic_inc(&d->pause_count);
> +    bool was_paused = atomic_inc_return(&d->pause_count) - 1;
>  
>      if ( sync )
>          for_each_vcpu ( d, v )

Isn't this racy? Another CPU doing the INC above just afterwards (yielding
was_paused as false there) might still ...

> @@ -1557,7 +1556,8 @@ static void _domain_pause(struct domain *d, bool sync)
>          for_each_vcpu ( d, v )
>              vcpu_sleep_nosync(v);
>  
> -    arch_domain_pause(d);
> +    if ( !was_paused )
> +        arch_domain_pause(d);

... make it here faster, and then the call would occur to late. Whether that's
acceptable is a matter of what exactly the arch hook does.

Furthermore, is what the arch hook does for x86 actually correct when "sync"
is false? The vCPU-s might then still be running while the Viridian time is
already frozen.

Jan


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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH 0/3] x86/amd: Fix DE_CFG races and CPUID rescan issues
Date: Wed, 26 Nov 2025 13:22:17 +0000
Message-Id: <20251126132220.881028-1-andrew.cooper3@citrix.com>
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This is sufficient to fix the CPUID recan issues found by XenServer's testing,
and a DE_CFG bug I found along the way.

There are other CPUID rescan issues which will take further work to fix.

Andrew Cooper (3):
  x86/amd: Use setup_force_cpu_cap() for BTC_NO
  x86/amd: Stop updating the Zenbleed mitigation dynamically
  x86/amd: Fix race editing DE_CFG

 xen/arch/x86/cpu/amd.c               | 232 +++++++++++++--------------
 xen/arch/x86/cpu/cpu.h               |   3 +-
 xen/arch/x86/cpu/hygon.c             |   6 +-
 xen/arch/x86/cpu/microcode/amd.c     |   2 -
 xen/arch/x86/include/asm/processor.h |   2 -
 5 files changed, 121 insertions(+), 124 deletions(-)


base-commit: 08c787f66cced18f0d0afafd86a040341adbd031
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH 2/3] x86/amd: Stop updating the Zenbleed mitigation dynamically
Date: Wed, 26 Nov 2025 13:22:19 +0000
Message-Id: <20251126132220.881028-3-andrew.cooper3@citrix.com>
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This was potentially helpful when the chickenbit was the only mitigation and
microcode had not been released, but that was two years ago.

Zenbleed microcode has been avaialble since December 2023, and the subsequent
Entrysign signature vulnerability means that firmware updates block OS-loading
and more OS-loadable microcode will be produced for Zen2.

i.e. the Zenbleed fix is not going to appear at runtime these days.

No practical change.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 
---
 xen/arch/x86/cpu/amd.c               | 2 +-
 xen/arch/x86/cpu/microcode/amd.c     | 2 --
 xen/arch/x86/include/asm/processor.h | 2 --
 3 files changed, 1 insertion(+), 5 deletions(-)

diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index 8f468aaf0921..7953261895ac 100644
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -979,7 +979,7 @@ void __init detect_zen2_null_seg_behaviour(void)
 
 }
 
-void amd_check_zenbleed(void)
+static void amd_check_zenbleed(void)
 {
 	const struct cpu_signature *sig = &this_cpu(cpu_sig);
 	unsigned int good_rev;
diff --git a/xen/arch/x86/cpu/microcode/amd.c b/xen/arch/x86/cpu/microcode/amd.c
index 4a7573c885e5..e7ae1e802353 100644
--- a/xen/arch/x86/cpu/microcode/amd.c
+++ b/xen/arch/x86/cpu/microcode/amd.c
@@ -380,8 +380,6 @@ static int cf_check apply_microcode(const struct microcode_patch *patch,
            "microcode: CPU%u updated from revision %#x to %#x, date = %04x-%02x-%02x\n",
            cpu, old_rev, rev, patch->year, patch->month, patch->day);
 
-    amd_check_zenbleed();
-
     return 0;
 }
 
diff --git a/xen/arch/x86/include/asm/processor.h b/xen/arch/x86/include/asm/processor.h
index 1342241742ac..2e087c625770 100644
--- a/xen/arch/x86/include/asm/processor.h
+++ b/xen/arch/x86/include/asm/processor.h
@@ -435,8 +435,6 @@ enum ap_boot_method {
 };
 extern enum ap_boot_method ap_boot_method;
 
-void amd_check_zenbleed(void);
-
 #endif /* !__ASSEMBLY__ */
 
 #endif /* __ASM_X86_PROCESSOR_H */
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH 1/3] x86/amd: Use setup_force_cpu_cap() for BTC_NO
Date: Wed, 26 Nov 2025 13:22:18 +0000
Message-Id: <20251126132220.881028-2-andrew.cooper3@citrix.com>
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When re-scanning features, forced caps are taken into account but unforced
such as this are not.  This causes BTC_NO to go missing, and for the system to
appear to have lost features.

The practical consequence of this observation is that all after-the-fact
adjustments to CPUID must be forced.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 
---
 xen/arch/x86/cpu/amd.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index 9b02e1ba675c..8f468aaf0921 100644
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -1225,8 +1225,9 @@ static void cf_check init_amd(struct cpuinfo_x86 *c)
 		 * Branch Type Confusion, but predate the allocation of the
 		 * BTC_NO bit.  Fill it back in if we're not virtualised.
 		 */
-		if (!cpu_has_hypervisor && !cpu_has(c, X86_FEATURE_BTC_NO))
-			__set_bit(X86_FEATURE_BTC_NO, c->x86_capability);
+		if (c == &boot_cpu_data && !cpu_has_hypervisor &&
+		    !cpu_has(c, X86_FEATURE_BTC_NO))
+			setup_force_cpu_cap(X86_FEATURE_BTC_NO);
 		break;
 	}
 
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH 3/3] x86/amd: Fix race editing DE_CFG
Date: Wed, 26 Nov 2025 13:22:20 +0000
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We have two different functions explaining that DE_CFG is Core-scoped and that
writes are racy but happen to be safe.  This is only true when there's one of
them.

Introduce amd_init_de_cfg() to be the singular function which writes to
DE_CFG, modelled after the logic we already have for BP_CFG.

While reworking amd_check_zenbleed() into a simple predicate used by
amd_init_de_cfg(), fix the microcode table.  The 'good_rev' was specific to an
individual stepping and not valid to be matched by model, let alone a range.
The only CPUs incorrectly matched that I can locate appear to be
pre-production, and probably didn't get Zenbleed microcode.

Rework amd_init_lfence() to be amd_init_lfence_dispatch() with only the
purpose of configuring X86_FEATURE_LFENCE_DISPATCH in the case that it needs
synthesising.  Run it on the BSP only and use setup_force_cpu_cap() to prevent
the bit disappearing on a subseuqent CPUID rescan.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 

I've submitted a matching fix to Linux's Zenbleed table.
---
 xen/arch/x86/cpu/amd.c   | 227 +++++++++++++++++++--------------------
 xen/arch/x86/cpu/cpu.h   |   3 +-
 xen/arch/x86/cpu/hygon.c |   6 +-
 3 files changed, 118 insertions(+), 118 deletions(-)

diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index 7953261895ac..c9d0b55c8c8d 100644
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -747,45 +747,6 @@ void amd_log_freq(const struct cpuinfo_x86 *c)
 		printk("CPU%u: %u MHz\n", smp_processor_id(), low_mhz);
 }
 
-void amd_init_lfence(struct cpuinfo_x86 *c)
-{
-	uint64_t value;
-
-	/*
-	 * Some hardware has LFENCE dispatch serialising always enabled,
-	 * nothing to do on that case.
-	 */
-	if (test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability))
-		return;
-
-	/*
-	 * Attempt to set lfence to be Dispatch Serialising.  This MSR almost
-	 * certainly isn't virtualised (and Xen at least will leak the real
-	 * value in but silently discard writes), as well as being per-core
-	 * rather than per-thread, so do a full safe read/write/readback cycle
-	 * in the worst case.
-	 */
-	if (rdmsr_safe(MSR_AMD64_DE_CFG, &value))
-		/* Unable to read.  Assume the safer default. */
-		__clear_bit(X86_FEATURE_LFENCE_DISPATCH,
-			    c->x86_capability);
-	else if (value & AMD64_DE_CFG_LFENCE_SERIALISE)
-		/* Already dispatch serialising. */
-		__set_bit(X86_FEATURE_LFENCE_DISPATCH,
-			  c->x86_capability);
-	else if (wrmsr_safe(MSR_AMD64_DE_CFG,
-			    value | AMD64_DE_CFG_LFENCE_SERIALISE) ||
-		 rdmsr_safe(MSR_AMD64_DE_CFG, &value) ||
-		 !(value & AMD64_DE_CFG_LFENCE_SERIALISE))
-		/* Attempt to set failed.  Assume the safer default. */
-		__clear_bit(X86_FEATURE_LFENCE_DISPATCH,
-			    c->x86_capability);
-	else
-		/* Successfully enabled! */
-		__set_bit(X86_FEATURE_LFENCE_DISPATCH,
-			  c->x86_capability);
-}
-
 /*
  * Refer to the AMD Speculative Store Bypass whitepaper:
  * https://developer.amd.com/wp-content/resources/124441_AMD64_SpeculativeStoreBypassDisable_Whitepaper_final.pdf
@@ -979,76 +940,6 @@ void __init detect_zen2_null_seg_behaviour(void)
 
 }
 
-static void amd_check_zenbleed(void)
-{
-	const struct cpu_signature *sig = &this_cpu(cpu_sig);
-	unsigned int good_rev;
-	uint64_t val, old_val, chickenbit = (1 << 9);
-
-	/*
-	 * If we're virtualised, we can't do family/model checks safely, and
-	 * we likely wouldn't have access to DE_CFG even if we could see a
-	 * microcode revision.
-	 *
-	 * A hypervisor may hide AVX as a stopgap mitigation.  We're not in a
-	 * position to care either way.  An admin doesn't want to be disabling
-	 * AVX as a mitigation on any build of Xen with this logic present.
-	 */
-	if (cpu_has_hypervisor || boot_cpu_data.x86 != 0x17)
-		return;
-
-	switch (boot_cpu_data.x86_model) {
-	case 0x30 ... 0x3f: good_rev = 0x0830107a; break;
-	case 0x60 ... 0x67: good_rev = 0x0860010b; break;
-	case 0x68 ... 0x6f: good_rev = 0x08608105; break;
-	case 0x70 ... 0x7f: good_rev = 0x08701032; break;
-	case 0xa0 ... 0xaf: good_rev = 0x08a00008; break;
-	default:
-		/*
-		 * With the Fam17h check above, most parts getting here are
-		 * Zen1.  They're not affected.  Assume Zen2 ones making it
-		 * here are affected regardless of microcode version.
-		 */
-		if (is_zen1_uarch())
-			return;
-		good_rev = ~0U;
-		break;
-	}
-
-	rdmsrl(MSR_AMD64_DE_CFG, val);
-	old_val = val;
-
-	/*
-	 * Microcode is the preferred mitigation, in terms of performance.
-	 * However, without microcode, this chickenbit (specific to the Zen2
-	 * uarch) disables Floating Point Mov-Elimination to mitigate the
-	 * issue.
-	 */
-	val &= ~chickenbit;
-	if (sig->rev < good_rev)
-		val |= chickenbit;
-
-	if (val == old_val)
-		/* Nothing to change. */
-		return;
-
-	/*
-	 * DE_CFG is a Core-scoped MSR, and this write is racy during late
-	 * microcode load.  However, both threads calculate the new value from
-	 * state which is shared, and unrelated to the old value, so the
-	 * result should be consistent.
-	 */
-	wrmsrl(MSR_AMD64_DE_CFG, val);
-
-	/*
-	 * Inform the admin that we changed something, but don't spam,
-	 * especially during a late microcode load.
-	 */
-	if (smp_processor_id() == 0)
-		printk(XENLOG_INFO "Zenbleed mitigation - using %s\n",
-		       val & chickenbit ? "chickenbit" : "microcode");
-}
-
 static void cf_check fam17_disable_c6(void *arg)
 {
 	/* Disable C6 by clearing the CCR{0,1,2}_CC6EN bits. */
@@ -1075,6 +966,112 @@ static void cf_check fam17_disable_c6(void *arg)
 	wrmsrl(MSR_AMD_CSTATE_CFG, val & mask);
 }
 
+static bool zenbleed_use_chickenbit(void)
+{
+    unsigned int curr_rev;
+    uint8_t fixed_rev;
+
+    /*
+     * If we're virtualised, we can't do family/model checks safely, and
+     * we likely wouldn't have access to DE_CFG even if we could see a
+     * microcode revision.
+     *
+     * A hypervisor may hide AVX as a stopgap mitigation.  We're not in a
+     * position to care either way.  An admin doesn't want to be disabling
+     * AVX as a mitigation on any build of Xen with this logic present.
+     */
+    if ( cpu_has_hypervisor || boot_cpu_data.family != 0x17 )
+        return false;
+
+    curr_rev = this_cpu(cpu_sig).rev;
+    switch ( curr_rev >> 8 )
+    {
+    case 0x083010: fixed_rev = 0x7a; break;
+    case 0x086001: fixed_rev = 0x0b; break;
+    case 0x086081: fixed_rev = 0x05; break;
+    case 0x087010: fixed_rev = 0x32; break;
+    case 0x08a000: fixed_rev = 0x08; break;
+    default:
+        /*
+         * With the Fam17h check above, most parts getting here are Zen1.
+         * They're not affected.  Assume Zen2 ones making it here are affected
+         * regardless of microcode version.
+         */
+        return is_zen2_uarch();
+    }
+
+    return (uint8_t)curr_rev >= fixed_rev;
+}
+
+void amd_init_de_cfg(const struct cpuinfo_x86 *c)
+{
+    uint64_t val, new = 0;
+
+    /* The MSR doesn't exist on Fam 0xf/0x11. */
+    if ( c->family != 0xf && c->family != 0x11 )
+        return;
+
+    /*
+     * On Zen3 (Fam 0x19) and later CPUs, LFENCE is unconditionally dispatch
+     * serialising, and is enumerated in CPUID.  Hypervisors may also
+     * enumerate it when the setting is in place and MSR_AMD64_DE_CFG isn't
+     * available.
+     */
+    if ( !test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability) )
+        new |= AMD64_DE_CFG_LFENCE_SERIALISE;
+
+    /*
+     * If vulnerable to Zenbleed and not mitigated in microcode, use the
+     * bigger hammer.
+     */
+    if ( zenbleed_use_chickenbit() )
+        new |= (1 << 9);
+
+    if ( !new )
+        return;
+
+    if ( rdmsr_safe(MSR_AMD64_DE_CFG, &val) ||
+         (val & new) == new )
+        return;
+
+    /*
+     * DE_CFG is a Core-scoped MSR, and this write is racy.  However, both
+     * threads calculate the new value from state which expected to be
+     * consistent across CPUs and unrelated to the old value, so the result
+     * should be consistent.
+     */
+    wrmsr_safe(MSR_AMD64_DE_CFG, val | new);
+}
+
+void __init amd_init_lfence_dispatch(void)
+{
+    struct cpuinfo_x86 *c = &boot_cpu_data;
+    uint64_t val;
+
+    if ( test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability) )
+        /* LFENCE is forced dispatch serialising and we can't control it. */
+        return;
+
+    if ( c->family == 0xf || c->family == 0x11 )
+        /* MSR doesn't exist.  LFENCE is dispatch serialising on this hardare. */
+        goto set;
+
+    if ( rdmsr_safe(MSR_AMD64_DE_CFG, &val) )
+        /* Unable to read.  Assume the safer default. */
+        goto clear;
+
+    if ( val & AMD64_DE_CFG_LFENCE_SERIALISE )
+        /* Already dispatch serialising. */
+        goto set;
+
+ clear:
+    setup_clear_cpu_cap(X86_FEATURE_LFENCE_DISPATCH);
+    return;
+
+ set:
+    setup_force_cpu_cap(X86_FEATURE_LFENCE_DISPATCH);
+}
+
 static void amd_check_bp_cfg(void)
 {
 	uint64_t val, new = 0;
@@ -1118,6 +1115,11 @@ static void cf_check init_amd(struct cpuinfo_x86 *c)
 	u32 l, h;
 	uint64_t value;
 
+        amd_init_de_cfg(c);
+
+        if (c == &boot_cpu_data)
+            amd_init_lfence_dispatch(); /* Needs amd_init_de_cfg() */
+
 	/* Disable TLB flush filter by setting HWCR.FFDIS on K8
 	 * bit 6 of msr C001_0015
 	 *
@@ -1156,12 +1158,6 @@ static void cf_check init_amd(struct cpuinfo_x86 *c)
 	if (c == &boot_cpu_data && !cpu_has(c, X86_FEATURE_RSTR_FP_ERR_PTRS))
 		setup_force_cpu_cap(X86_BUG_FPU_PTRS);
 
-	if (c->x86 == 0x0f || c->x86 == 0x11)
-		/* Always dispatch serialising on this hardare. */
-		__set_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability);
-	else /* Implicily "== 0x10 || >= 0x12" by being 64bit. */
-		amd_init_lfence(c);
-
 	amd_init_ssbd(c);
 
 	if (c->x86 == 0x17)
@@ -1379,7 +1375,6 @@ static void cf_check init_amd(struct cpuinfo_x86 *c)
 	if ((smp_processor_id() == 1) && !cpu_has(c, X86_FEATURE_ITSC))
 		disable_c1_ramping();
 
-	amd_check_zenbleed();
 	amd_check_bp_cfg();
 
 	if (fam17_c6_disabled)
diff --git a/xen/arch/x86/cpu/cpu.h b/xen/arch/x86/cpu/cpu.h
index cbb434f3a23d..8bed3f52490f 100644
--- a/xen/arch/x86/cpu/cpu.h
+++ b/xen/arch/x86/cpu/cpu.h
@@ -24,7 +24,8 @@ extern bool detect_extended_topology(struct cpuinfo_x86 *c);
 
 void cf_check early_init_amd(struct cpuinfo_x86 *c);
 void amd_log_freq(const struct cpuinfo_x86 *c);
-void amd_init_lfence(struct cpuinfo_x86 *c);
+void amd_init_de_cfg(const struct cpuinfo_x86 *c);
+void amd_init_lfence_dispatch(void);
 void amd_init_ssbd(const struct cpuinfo_x86 *c);
 void amd_init_spectral_chicken(void);
 void detect_zen2_null_seg_behaviour(void);
diff --git a/xen/arch/x86/cpu/hygon.c b/xen/arch/x86/cpu/hygon.c
index f7508cc8fcb9..68e98651cb79 100644
--- a/xen/arch/x86/cpu/hygon.c
+++ b/xen/arch/x86/cpu/hygon.c
@@ -31,7 +31,11 @@ static void cf_check init_hygon(struct cpuinfo_x86 *c)
 {
 	unsigned long long value;
 
-	amd_init_lfence(c);
+        amd_init_de_cfg(c);
+
+        if (c == &boot_cpu_data)
+            amd_init_lfence_dispatch(); /* Needs amd_init_de_cfg() */
+
 	amd_init_ssbd(c);
 
 	/* Probe for NSCB on Zen2 CPUs when not virtualised */
-- 
2.39.5



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1: move arch_generic_hweightl() to arch-specific library
2: move / split usercopy.c to / into arch-specific library

Jan


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Subject: [PATCH 1/2] x86: move arch_generic_hweightl() to arch-specific
 library
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper , Julien Grall ,
 Stefano Stabellini ,
 Anthony PERARD ,
 Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 
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Introduce arch/x86/lib/, and make it the home for the somewhat misplaced
x86-specific file that lived in the arch-independent lib/.

Signed-off-by: Jan Beulich 
---
 xen/arch/x86/Makefile                                           | 1 +
 xen/arch/x86/arch.mk                                            | 2 ++
 xen/arch/x86/lib/Makefile                                       | 1 +
 .../x86-generic-hweightl.c => arch/x86/lib/generic-hweightl.c}  | 0
 xen/lib/Makefile                                                | 1 -
 5 files changed, 4 insertions(+), 1 deletion(-)
 create mode 100644 xen/arch/x86/lib/Makefile
 rename xen/{lib/x86-generic-hweightl.c => arch/x86/lib/generic-hweightl.c} (100%)

diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
index 300cc67407e9..61e2293a467e 100644
--- a/xen/arch/x86/Makefile
+++ b/xen/arch/x86/Makefile
@@ -5,6 +5,7 @@ obj-y += efi/
 obj-y += genapic/
 obj-$(CONFIG_GUEST) += guest/
 obj-$(CONFIG_HVM) += hvm/
+obj-y += lib/
 obj-y += mm/
 obj-$(CONFIG_XENOPROF) += oprofile/
 obj-$(CONFIG_PV) += pv/
diff --git a/xen/arch/x86/arch.mk b/xen/arch/x86/arch.mk
index 16368a498bb7..a0ee050c931b 100644
--- a/xen/arch/x86/arch.mk
+++ b/xen/arch/x86/arch.mk
@@ -3,6 +3,8 @@
 
 export XEN_IMG_OFFSET := 0x200000
 
+ALL_LIBS-y += arch/x86/lib/lib.a
+
 CFLAGS += -DXEN_IMG_OFFSET=$(XEN_IMG_OFFSET)
 
 # Prevent floating-point variables from creeping into Xen.
diff --git a/xen/arch/x86/lib/Makefile b/xen/arch/x86/lib/Makefile
new file mode 100644
index 000000000000..ddf7e19bdc1d
--- /dev/null
+++ b/xen/arch/x86/lib/Makefile
@@ -0,0 +1 @@
+lib-y += generic-hweightl.o
diff --git a/xen/lib/x86-generic-hweightl.c b/xen/arch/x86/lib/generic-hweightl.c
similarity index 100%
rename from xen/lib/x86-generic-hweightl.c
rename to xen/arch/x86/lib/generic-hweightl.c
diff --git a/xen/lib/Makefile b/xen/lib/Makefile
index 5ccb1e5241c5..38c1c7d6845c 100644
--- a/xen/lib/Makefile
+++ b/xen/lib/Makefile
@@ -38,7 +38,6 @@ lib-y += strtol.o
 lib-y += strtoll.o
 lib-y += strtoul.o
 lib-y += strtoull.o
-lib-$(CONFIG_X86) += x86-generic-hweightl.o
 lib-$(CONFIG_X86) += xxhash32.o
 lib-$(CONFIG_X86) += xxhash64.o
 



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Subject: [PATCH 2/2] x86: move / split usercopy.c to / into arch-specific
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From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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The file wasn't correctly named for our purposes anyway. Split it into its
"guest" and "unsafe" parts, thus allowing the latter to not be linked in
at all (for presently having no caller). The building of the "guest" part
can then (later) become conditional upon PV=y.

Signed-off-by: Jan Beulich 
---
 xen/arch/x86/Makefile                         |  1 -
 xen/arch/x86/lib/Makefile                     |  2 ++
 xen/arch/x86/{usercopy.c => lib/copy-guest.c} | 12 +---------
 xen/arch/x86/lib/copy-unsafe.c                | 22 +++++++++++++++++++
 4 files changed, 25 insertions(+), 12 deletions(-)
 rename xen/arch/x86/{usercopy.c => lib/copy-guest.c} (94%)
 create mode 100644 xen/arch/x86/lib/copy-unsafe.c

diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
index 61e2293a467e..76540d77e55f 100644
--- a/xen/arch/x86/Makefile
+++ b/xen/arch/x86/Makefile
@@ -72,7 +72,6 @@ obj-y += time.o
 obj-y += traps-setup.o
 obj-y += traps.o
 obj-$(CONFIG_INTEL) += tsx.o
-obj-y += usercopy.o
 obj-y += x86_emulate.o
 obj-$(CONFIG_TBOOT) += tboot.o
 obj-y += hpet.o
diff --git a/xen/arch/x86/lib/Makefile b/xen/arch/x86/lib/Makefile
index ddf7e19bdc1d..8fe2dfd88553 100644
--- a/xen/arch/x86/lib/Makefile
+++ b/xen/arch/x86/lib/Makefile
@@ -1 +1,3 @@
+lib-y += copy-guest.o
+lib-y += copy-unsafe.o
 lib-y += generic-hweightl.o
diff --git a/xen/arch/x86/usercopy.c b/xen/arch/x86/lib/copy-guest.c
similarity index 94%
rename from xen/arch/x86/usercopy.c
rename to xen/arch/x86/lib/copy-guest.c
index a24b52cc66c1..25eeb35427e2 100644
--- a/xen/arch/x86/usercopy.c
+++ b/xen/arch/x86/lib/copy-guest.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * User address space access functions.
  *
  * Copyright 1997 Andi Kleen 
@@ -6,8 +6,6 @@
  * Copyright 2002 Andi Kleen 
  */
 
-#include 
-#include 
 #include 
 
 #ifndef GUARD
@@ -139,14 +137,6 @@ unsigned int copy_from_guest_pv(void *to, const void __user *from,
     return n;
 }
 
-# undef GUARD
-# define GUARD UA_DROP
-# define copy_to_guest_ll copy_to_unsafe_ll
-# define copy_from_guest_ll copy_from_unsafe_ll
-# undef __user
-# define __user
-# include __FILE__
-
 #endif /* GUARD(1) */
 
 /*
diff --git a/xen/arch/x86/lib/copy-unsafe.c b/xen/arch/x86/lib/copy-unsafe.c
new file mode 100644
index 000000000000..a51500370fb1
--- /dev/null
+++ b/xen/arch/x86/lib/copy-unsafe.c
@@ -0,0 +1,22 @@
+/*
+ * "Unsafe" access functions.
+ */
+
+#include 
+
+#define GUARD UA_DROP
+#define copy_to_guest_ll copy_to_unsafe_ll
+#define copy_from_guest_ll copy_from_unsafe_ll
+#undef __user
+#define __user
+#include "copy-guest.c"
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * tab-width: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
-- 
2.48.2




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To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper , Julien Grall ,
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From: Jan Beulich 
Subject: [PATCH 0/8] symbols: mirror and then leverage recent x86 changes
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1: arm: re-number intermediate files
2: arm: don't use symbols-dummy
3: ppc: re-number intermediate files
4: ppc: don't use symbols-dummy
5: riscv: re-number intermediate files
6: riscv: don't use symbols-dummy
7: drop symbols-dummy.c
8: check table sizes don't change between linking passes 2 and 3

As long as patch 8 is x86 only, it doesn't depend on the earlier ones.

Jan


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Subject: [PATCH 1/8] symbols/arm: re-number intermediate files
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
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 , Volodymyr Babchuk ,
 Bertrand Marquis ,
 Michal Orzel 
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In preparation to do away with symbols-dummy, re-number the assembly and
object files used, for the numbers to match the next passes real output.
This is to make 0 available to use for what now is handled by
symbols-dummy.

Signed-off-by: Jan Beulich 

--- a/xen/arch/arm/Makefile
+++ b/xen/arch/arm/Makefile
@@ -89,16 +89,16 @@ $(TARGET)-syms: $(objtree)/prelink.o $(o
 	    $(objtree)/common/symbols-dummy.o -o $(dot-target).0
 	$(NM) -pa --format=sysv $(dot-target).0 \
 		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
-		> $(dot-target).0.S
-	$(MAKE) $(build)=$(@D) $(dot-target).0.o
+		> $(dot-target).1.S
+	$(MAKE) $(build)=$(@D) $(dot-target).1.o
 	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \
-	    $(dot-target).0.o -o $(dot-target).1
+	    $(dot-target).1.o -o $(dot-target).1
 	$(NM) -pa --format=sysv $(dot-target).1 \
 		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
-		> $(dot-target).1.S
-	$(MAKE) $(build)=$(@D) $(dot-target).1.o
+		> $(dot-target).2.S
+	$(MAKE) $(build)=$(@D) $(dot-target).2.o
 	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \
-	    $(dot-target).1.o -o $@
+	    $(dot-target).2.o -o $@
 	$(NM) -pa --format=sysv $@ \
 		| $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \
 		> $@.map



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From: Jan Beulich 
Subject: [PATCH 2/8] symbols/arm: don't use symbols-dummy
To: "xen-devel@lists.xenproject.org" 
Cc: Julien Grall , Stefano Stabellini
 , Volodymyr Babchuk ,
 Bertrand Marquis ,
 Michal Orzel 
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In particular when linking with lld, which converts hidden symbols to
local ones, the ELF symbol table can change in unhelpful ways between the
first two linking passes, resulting in the .rodata contributions to change
between the 2nd and 3rd pass. That, however, renders our embedded symbol
table pretty much unusable; the recently introduced self-test may then
also fail. (Another difference between compiling a C file and assembling
the generated ones is that - with -fdata-sections in use - the .rodata
contributions move between passes 1 and 2, when we'd prefer them not to.)

Signed-off-by: Jan Beulich 

--- a/xen/arch/arm/Makefile
+++ b/xen/arch/arm/Makefile
@@ -85,8 +85,10 @@ ifeq ($(CONFIG_ARM_64),y)
 endif
 
 $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds
+	$(objtree)/tools/symbols $(all_symbols) --empty > $(dot-target).0.S
+	$(MAKE) $(build)=$(@D) $(dot-target).0.o
 	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \
-	    $(objtree)/common/symbols-dummy.o -o $(dot-target).0
+	      $(dot-target).0.o -o $(dot-target).0
 	$(NM) -pa --format=sysv $(dot-target).0 \
 		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
 		> $(dot-target).1.S


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Subject: [PATCH 3/8] symbols/ppc: re-number intermediate files
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper , Julien Grall ,
 Stefano Stabellini ,
 Anthony PERARD ,
 Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
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In preparation to do away with symbols-dummy, re-number the assembly and
object files used, for the numbers to match the next passes real output.
This is to make 0 available to use for what now is handled by
symbols-dummy.

Signed-off-by: Jan Beulich 

--- a/xen/arch/ppc/Makefile
+++ b/xen/arch/ppc/Makefile
@@ -16,16 +16,16 @@ $(TARGET)-syms: $(objtree)/prelink.o $(o
 	    $(objtree)/common/symbols-dummy.o -o $(dot-target).0
 	$(NM) -pa --format=sysv $(dot-target).0 \
 		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
-		> $(dot-target).0.S
-	$(MAKE) $(build)=$(@D) $(dot-target).0.o
+		> $(dot-target).1.S
+	$(MAKE) $(build)=$(@D) $(dot-target).1.o
 	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \
-	    $(dot-target).0.o -o $(dot-target).1
+	    $(dot-target).1.o -o $(dot-target).1
 	$(NM) -pa --format=sysv $(dot-target).1 \
 		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
-		> $(dot-target).1.S
-	$(MAKE) $(build)=$(@D) $(dot-target).1.o
+		> $(dot-target).2.S
+	$(MAKE) $(build)=$(@D) $(dot-target).2.o
 	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \
-	    $(dot-target).1.o -o $@
+	    $(dot-target).2.o -o $@
 	$(NM) -pa --format=sysv $@ \
 		| $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \
 		> $@.map



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From: Jan Beulich 
Subject: [PATCH 4/8] symbols/ppc: don't use symbols-dummy
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper , Julien Grall ,
 Stefano Stabellini ,
 Anthony PERARD ,
 Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
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In particular when linking with lld, which converts hidden symbols to
local ones, the ELF symbol table can change in unhelpful ways between the
first two linking passes, resulting in the .rodata contributions to change
between the 2nd and 3rd pass. That, however, renders our embedded symbol
table pretty much unusable; the recently introduced self-test may then
also fail. (Another difference between compiling a C file and assembling
the generated ones is that - with -fdata-sections in use - the .rodata
contributions move between passes 1 and 2, when we'd prefer them not to.)

Signed-off-by: Jan Beulich 

--- a/xen/arch/ppc/Makefile
+++ b/xen/arch/ppc/Makefile
@@ -12,8 +12,10 @@ $(TARGET): $(TARGET)-syms
 	cp -f $< $@
 
 $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds
+	$(objtree)/tools/symbols $(all_symbols) --empty > $(dot-target).0.S
+	$(MAKE) $(build)=$(@D) $(dot-target).0.o
 	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \
-	    $(objtree)/common/symbols-dummy.o -o $(dot-target).0
+	      $(dot-target).0.o -o $(dot-target).0
 	$(NM) -pa --format=sysv $(dot-target).0 \
 		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
 		> $(dot-target).1.S


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Subject: [PATCH 5/8] symbols/riscv: re-number intermediate files
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper , Julien Grall ,
 Stefano Stabellini ,
 Anthony PERARD ,
 Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Oleksii Kurochko ,
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 Bob Eshleman , Connor Davis 
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In preparation to do away with symbols-dummy, re-number the assembly and
object files used, for the numbers to match the next passes real output.
This is to make 0 available to use for what now is handled by
symbols-dummy.

Signed-off-by: Jan Beulich 

--- a/xen/arch/riscv/Makefile
+++ b/xen/arch/riscv/Makefile
@@ -26,16 +26,16 @@ $(TARGET)-syms: $(objtree)/prelink.o $(o
 	    $(objtree)/common/symbols-dummy.o -o $(dot-target).0
 	$(NM) -pa --format=sysv $(dot-target).0 \
 		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
-		> $(dot-target).0.S
-	$(MAKE) $(build)=$(@D) $(dot-target).0.o
+		> $(dot-target).1.S
+	$(MAKE) $(build)=$(@D) $(dot-target).1.o
 	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \
-	    $(dot-target).0.o -o $(dot-target).1
+	    $(dot-target).1.o -o $(dot-target).1
 	$(NM) -pa --format=sysv $(dot-target).1 \
 		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
-		> $(dot-target).1.S
-	$(MAKE) $(build)=$(@D) $(dot-target).1.o
+		> $(dot-target).2.S
+	$(MAKE) $(build)=$(@D) $(dot-target).2.o
 	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \
-	    $(dot-target).1.o -o $@
+	    $(dot-target).2.o -o $@
 	$(NM) -pa --format=sysv $@ \
 		| $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \
 		> $@.map



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From: Jan Beulich 
Subject: [PATCH 6/8] symbols/riscv: don't use symbols-dummy
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper , Julien Grall ,
 Stefano Stabellini ,
 Anthony PERARD ,
 Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
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In particular when linking with lld, which converts hidden symbols to
local ones, the ELF symbol table can change in unhelpful ways between the
first two linking passes, resulting in the .rodata contributions to change
between the 2nd and 3rd pass. That, however, renders our embedded symbol
table pretty much unusable; the recently introduced self-test may then
also fail. (Another difference between compiling a C file and assembling
the generated ones is that - with -fdata-sections in use - the .rodata
contributions move between passes 1 and 2, when we'd prefer them not to.)

Signed-off-by: Jan Beulich 

--- a/xen/arch/riscv/Makefile
+++ b/xen/arch/riscv/Makefile
@@ -22,8 +22,10 @@ $(TARGET): $(TARGET)-syms
 	$(OBJCOPY) -O binary -S $< $@
 
 $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds
+	$(objtree)/tools/symbols $(all_symbols) --empty > $(dot-target).0.S
+	$(MAKE) $(build)=$(@D) $(dot-target).0.o
 	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \
-	    $(objtree)/common/symbols-dummy.o -o $(dot-target).0
+	      $(dot-target).0.o -o $(dot-target).0
 	$(NM) -pa --format=sysv $(dot-target).0 \
 		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
 		> $(dot-target).1.S


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Subject: [PATCH 7/8] symbols: drop symbols-dummy.c
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
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No architecture using it anymore, we can as well get rid of it.

Signed-off-by: Jan Beulich 
---
Should we also drop common/symbols.h again then, by moving its contents
back into common/symbols.c?

--- a/xen/common/Makefile
+++ b/xen/common/Makefile
@@ -74,8 +74,6 @@ ifneq ($(CONFIG_PV_SHIM_EXCLUSIVE),y)
 obj-y += domctl.o
 endif
 
-extra-y := symbols-dummy.o
-
 obj-$(CONFIG_COVERAGE) += coverage/
 obj-y += sched/
 obj-$(CONFIG_UBSAN) += ubsan/
--- a/xen/common/symbols-dummy.c
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * symbols-dummy.c: dummy symbol-table definitions for the inital partial
- *                  link of the hypervisor image.
- */
-
-#include "symbols.h"
-
-#ifdef SYMBOLS_ORIGIN
-const unsigned int symbols_offsets[1];
-#else
-const unsigned long symbols_addresses[1];
-#endif
-const unsigned int symbols_num_addrs;
-const unsigned char symbols_names[1];
-
-#ifdef CONFIG_FAST_SYMBOL_LOOKUP
-const unsigned int symbols_num_names;
-const struct symbol_offset symbols_sorted_offsets[1];
-#endif
-
-const uint8_t symbols_token_table[1];
-const uint16_t symbols_token_index[1];
-
-const unsigned int symbols_markers[1];



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Subject: [PATCH v1' 8/8] symbols: check table sizes don't change between
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From: Jan Beulich 
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While sizes (and possibly positions) of the symbol table related symbols
(and as a result other ones) are expected to change from linking pass 1
to pass 2, no such change should happen anymore from pass 2 to pass 3, or
else the internally recorded symbol table wouldn't represent the ELF or
PE/COFF ones.

For comparing to be actually useful, i.e. most notably also covering the
last of the arrays emitted, symbol sizes need establishing. Make use of
the xen/linkage.h machinery to achieve that.

Suggested-by: Roger Pau Monné 
Signed-off-by: Jan Beulich 
---
Likely other ports also want to add such checking. Really it would be nice
if we could properly abstract out shared parts of the linking steps.

RFC: I'm all ears towards improvement suggestions in the temporary helper
     file handling of compare-symbol-tables. Or ideally some approach to
     avoid the use of a helper file altogether.
---
v1': Re-base over the re-numbering of intermediate files. Integrate into
     series.

--- a/xen/arch/x86/Makefile
+++ b/xen/arch/x86/Makefile
@@ -148,6 +148,7 @@ $(TARGET)-syms: $(objtree)/prelink.o $(o
 		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort $(syms-warn-dup-y) \
 		> $(dot-target).2.S
 	$(MAKE) $(build)=$(@D) $(dot-target).2.o
+	$(call compare-symbol-tables, $(dot-target).1.o, $(dot-target).2.o)
 	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \
 	    $(orphan-handling-y) $(dot-target).2.o -o $@
 	$(NM) -pa --format=sysv $@ \
@@ -230,6 +231,8 @@ endif
 		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
 		> $(dot-target).2s.S
 	$(MAKE) $(build)=$(@D) .$(@F).2r.o .$(@F).2s.o
+	$(call compare-symbol-tables, $(dot-target).1r.o, $(dot-target).2r.o)
+	$(call compare-symbol-tables, $(dot-target).1s.o, $(dot-target).2s.o)
 	$(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds $< \
 	      $(dot-target).2r.o $(dot-target).2s.o $(orphan-handling-y) \
 	      $(note_file_option) -o $@
--- a/xen/scripts/Kbuild.include
+++ b/xen/scripts/Kbuild.include
@@ -56,6 +56,19 @@ define filechk
 	fi
 endef
 
+###
+# Compare the symbol tables of two object files.  As diff's -I option isn't
+# standardized, the name difference of the two object files needs abstracting
+# out.
+define compare-symbol-tables
+    ln -f $(1) $(@D)/.cst.$$$$; \
+    $(OBJDUMP) -t $(@D)/.cst.$$$$ > $(1).sym; \
+    ln -f $(1) $(@D)/.cst.$$$$; \
+    $(OBJDUMP) -t $(@D)/.cst.$$$$ > $(2).sym; \
+    rm -f $(@D)/.cst.$$$$
+    diff -u $(1).sym $(2).sym
+endef
+
 # as-insn: Check whether assembler supports an instruction.
 # Usage: cflags-y += $(call as-insn,CC FLAGS,"insn",option-yes,option-no)
 as-insn = $(if $(shell echo 'void _(void) { asm volatile ( $(2) ); }' \
--- a/xen/tools/symbols.c
+++ b/xen/tools/symbols.c
@@ -252,17 +252,26 @@ static void read_map(FILE *in)
 	}
 }
 
-static void output_label(char *label)
+static void output_label(const char *label, bool keep)
 {
-	if (symbol_prefix_char)
-		printf(".globl %c%s\n", symbol_prefix_char, label);
-	else
-		printf(".globl %s\n", label);
-	printf("\tALGN\n");
-	if (symbol_prefix_char)
-		printf("%c%s:\n", symbol_prefix_char, label);
-	else
-		printf("%s:\n", label);
+	static bool pending;
+
+	if (pending && !keep) {
+		printf("END(CURRENT)\n");
+		printf("#undef CURRENT\n\n");
+	}
+
+	pending = label;
+	if (!label)
+		return;
+
+	if (symbol_prefix_char) {
+		printf("DATA(%c%s, ALGN)\n", symbol_prefix_char, label);
+		printf("#define CURRENT %c%s\n", symbol_prefix_char, label);
+	} else {
+		printf("DATA(%s, ALGN)\n", label);
+		printf("#define CURRENT %s\n", label);
+	}
 }
 
 /* uncompress a compressed symbol. When this function is called, the best table
@@ -331,22 +340,22 @@ static void write_src(void)
 
 		return;
 	}
-	printf("#include \n");
+	printf("#include \n");
 	printf("#if BITS_PER_LONG == 64 && !defined(SYMBOLS_ORIGIN)\n");
 	printf("#define PTR .quad\n");
-	printf("#define ALGN .balign 8\n");
+	printf("#define ALGN 8\n");
 	printf("#else\n");
 	printf("#define PTR .long\n");
-	printf("#define ALGN .balign 4\n");
+	printf("#define ALGN 4\n");
 	printf("#endif\n");
 
 	printf("\t.section .rodata, \"a\"\n");
 
 	printf("#ifndef SYMBOLS_ORIGIN\n");
 	printf("#define SYMBOLS_ORIGIN 0\n");
-	output_label("symbols_addresses");
+	output_label("symbols_addresses", false);
 	printf("#else\n");
-	output_label("symbols_offsets");
+	output_label("symbols_offsets", true);
 	printf("#endif\n");
 	for (i = 0, ends = 0; i < table_cnt; i++) {
 		printf("\tPTR\t%#llx - SYMBOLS_ORIGIN\n", table[i].addr);
@@ -370,17 +379,15 @@ static void write_src(void)
 		printf("\tPTR\t%#llx - SYMBOLS_ORIGIN\n",
 		       table[i].addr + table[i].size);
 	}
-	printf("\n");
 
-	output_label("symbols_num_addrs");
+	output_label("symbols_num_addrs", false);
 	printf("\t.long\t%d\n", table_cnt + ends);
-	printf("\n");
 
 	/* table of offset markers, that give the offset in the compressed stream
 	 * every 256 symbols */
 	markers = malloc(sizeof(*markers) * ((table_cnt + ends + 255) >> 8));
 
-	output_label("symbols_names");
+	output_label("symbols_names", false);
 	for (i = 0, off = 0, ends = 0; i < table_cnt; i++) {
 		if (((i + ends) & 0xFF) == 0)
 			markers[(i + ends) >> 8] = off;
@@ -404,15 +411,12 @@ static void write_src(void)
 		printf("\t.byte 0\n");
 		++off;
 	}
-	printf("\n");
 
-	output_label("symbols_markers");
+	output_label("symbols_markers", false);
 	for (i = 0; i < ((table_cnt + ends + 255) >> 8); i++)
 		printf("\t.long\t%d\n", markers[i]);
-	printf("\n");
 
-
-	output_label("symbols_token_table");
+	output_label("symbols_token_table", false);
 	off = 0;
 	for (i = 0; i < 256; i++) {
 		best_idx[i] = off;
@@ -420,34 +424,27 @@ static void write_src(void)
 		printf("\t.asciz\t\"%s\"\n", buf);
 		off += strlen(buf) + 1;
 	}
-	printf("\n");
 
-	output_label("symbols_token_index");
+	output_label("symbols_token_index", false);
 	for (i = 0; i < 256; i++)
 		printf("\t.short\t%d\n", best_idx[i]);
-	printf("\n");
 
-	if (!sort_by_name) {
-		free(markers);
-		return;
-	}
-
-	output_label("symbols_num_names");
-	printf("\t.long\t%d\n", table_cnt);
-	printf("\n");
-
-	/* Sorted by original symbol names and type. */
-	qsort(table, table_cnt, sizeof(*table), compare_name_orig);
-
-	output_label("symbols_sorted_offsets");
-	/* A fixed sized array with two entries: offset in the
-	 * compressed stream (for symbol name), and offset in
-	 * symbols_addresses (or symbols_offset). */
-	for (i = 0; i < table_cnt; i++) {
-		printf("\t.long %u, %u\n", table[i].stream_offset, table[i].addr_idx);
+	if (sort_by_name) {
+		output_label("symbols_num_names", false);
+		printf("\t.long\t%d\n", table_cnt);
+
+		/* Sorted by original symbol names and type. */
+		qsort(table, table_cnt, sizeof(*table), compare_name_orig);
+
+		/* A fixed sized array with two entries: offset in the
+		 * compressed stream (for symbol name), and offset in
+		 * symbols_addresses (or symbols_offset). */
+		output_label("symbols_sorted_offsets", false);
+		for (i = 0; i < table_cnt; i++)
+			printf("\t.long %u, %u\n", table[i].stream_offset, table[i].addr_idx);
 	}
-	printf("\n");
 
+	output_label(NULL, false);
 	free(markers);
 }
 



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Date: Wed, 26 Nov 2025 14:49:25 +0100
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel , Julien Grall ,
	Stefano Stabellini ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH] x86/viridian: fix calling of
 viridian_time_domain_{freeze,thaw}()
Message-ID: 
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On Wed, Nov 26, 2025 at 01:44:25PM +0100, Jan Beulich wrote:
> On 26.11.2025 12:29, Roger Pau Monne wrote:
> > --- a/xen/common/domain.c
> > +++ b/xen/common/domain.c
> > @@ -1547,8 +1547,7 @@ int vcpu_unpause_by_systemcontroller(struct vcpu *v)
> >  static void _domain_pause(struct domain *d, bool sync)
> >  {
> >      struct vcpu *v;
> > -
> > -    atomic_inc(&d->pause_count);
> > +    bool was_paused = atomic_inc_return(&d->pause_count) - 1;
> >  
> >      if ( sync )
> >          for_each_vcpu ( d, v )
> 
> Isn't this racy? Another CPU doing the INC above just afterwards (yielding
> was_paused as false there) might still ...
> 
> > @@ -1557,7 +1556,8 @@ static void _domain_pause(struct domain *d, bool sync)
> >          for_each_vcpu ( d, v )
> >              vcpu_sleep_nosync(v);
> >  
> > -    arch_domain_pause(d);
> > +    if ( !was_paused )
> > +        arch_domain_pause(d);
> 
> ... make it here faster, and then the call would occur to late. Whether that's
> acceptable is a matter of what exactly the arch hook does.

It's acceptable for what the Viridian code does now, as there are no
current callers to domain_pause() that rely on the Viridian timers
being paused.

TBH the Viridian timers would better use the vPT logic, as that
avoids having to do this manual housekeeping.  I suspect vPT wasn't
used in the first place because when using SINTx the same SINTx could
be used for other purposes apart from the timer signaling.

As a result the current logic to attempt to account for missed ticks
is kind of bodged.  It doesn't detect guest EOIs, and hence doesn't
really know whether the previous interrupt has been processed ahead of
injecting a new one.

> Furthermore, is what the arch hook does for x86 actually correct when "sync"
> is false? The vCPU-s might then still be running while the Viridian time is
> already frozen.

I've also wondered about that aspect when using the nosync variant.  I
think it's fine to stop the timer ahead of the vCPU being paused, the
only difference would be whether a tick get delivered in that short
window ahead of the pause or afterwards, but that likely doesn't much
difference for the purpose here.

Maybe it's best to attempt to move the Viridian timers to use vPT
logic, and possibly get rid of the arch_domain_{,un}pause() hooks.

Thanks, Roger.


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Date: Wed, 26 Nov 2025 13:51:42 +0000
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Cc: andrew.cooper3@citrix.com, Julien Grall ,
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 Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 
Subject: Re: [PATCH 1/2] x86: move arch_generic_hweightl() to arch-specific
 library
To: Jan Beulich ,
 "xen-devel@lists.xenproject.org" 
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On 26/11/2025 1:24 pm, Jan Beulich wrote:
> diff --git a/xen/arch/x86/arch.mk b/xen/arch/x86/arch.mk
> index 16368a498bb7..a0ee050c931b 100644
> --- a/xen/arch/x86/arch.mk
> +++ b/xen/arch/x86/arch.mk
> @@ -3,6 +3,8 @@
>  
>  export XEN_IMG_OFFSET := 0x200000
>  
> +ALL_LIBS-y += arch/x86/lib/lib.a
> +

Oh, I'd realised it was this easy, I'd have done so straight away when
adding x86's custom arch_generic_hweightl().

I assumed it was going to be more complicated getting the order of the
arch specific lib correct with the generic lib.

More concretely.  Given an x86 lib, we should move things like
arch/x86/memcpy.S to it.

Therefore, when we have common/lib.a and arch/lib.a, do we guarantee to
have arch/lib.a with higher precedence so for matching functions the
arch specific one guarantees to be taken?

Otherwise this feels like a trap waiting to happen.

~Andrew


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Subject: Re: [PATCH] x86/viridian: fix calling of
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Cc: Andrew Cooper ,
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On 26.11.2025 14:49, Roger Pau Monné wrote:
> On Wed, Nov 26, 2025 at 01:44:25PM +0100, Jan Beulich wrote:
>> On 26.11.2025 12:29, Roger Pau Monne wrote:
>>> --- a/xen/common/domain.c
>>> +++ b/xen/common/domain.c
>>> @@ -1547,8 +1547,7 @@ int vcpu_unpause_by_systemcontroller(struct vcpu *v)
>>>  static void _domain_pause(struct domain *d, bool sync)
>>>  {
>>>      struct vcpu *v;
>>> -
>>> -    atomic_inc(&d->pause_count);
>>> +    bool was_paused = atomic_inc_return(&d->pause_count) - 1;
>>>  
>>>      if ( sync )
>>>          for_each_vcpu ( d, v )
>>
>> Isn't this racy? Another CPU doing the INC above just afterwards (yielding
>> was_paused as false there) might still ...
>>
>>> @@ -1557,7 +1556,8 @@ static void _domain_pause(struct domain *d, bool sync)
>>>          for_each_vcpu ( d, v )
>>>              vcpu_sleep_nosync(v);
>>>  
>>> -    arch_domain_pause(d);
>>> +    if ( !was_paused )
>>> +        arch_domain_pause(d);
>>
>> ... make it here faster, and then the call would occur to late. Whether that's
>> acceptable is a matter of what exactly the arch hook does.
> 
> It's acceptable for what the Viridian code does now, as there are no
> current callers to domain_pause() that rely on the Viridian timers
> being paused.
> 
> TBH the Viridian timers would better use the vPT logic, as that
> avoids having to do this manual housekeeping.  I suspect vPT wasn't
> used in the first place because when using SINTx the same SINTx could
> be used for other purposes apart from the timer signaling.
> 
> As a result the current logic to attempt to account for missed ticks
> is kind of bodged.  It doesn't detect guest EOIs, and hence doesn't
> really know whether the previous interrupt has been processed ahead of
> injecting a new one.
> 
>> Furthermore, is what the arch hook does for x86 actually correct when "sync"
>> is false? The vCPU-s might then still be running while the Viridian time is
>> already frozen.
> 
> I've also wondered about that aspect when using the nosync variant.  I
> think it's fine to stop the timer ahead of the vCPU being paused, the
> only difference would be whether a tick get delivered in that short
> window ahead of the pause or afterwards, but that likely doesn't much
> difference for the purpose here.
> 
> Maybe it's best to attempt to move the Viridian timers to use vPT
> logic, and possibly get rid of the arch_domain_{,un}pause() hooks.

That may be more intrusive a change. I was kind of hoping to confine the
less invasive change here to the Viridian freeze/thaw functions.

Jan


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Date: Wed, 26 Nov 2025 13:56:27 +0000
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Cc: andrew.cooper3@citrix.com, =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Grygorii Strashko 
Subject: Re: [PATCH 2/2] x86: move / split usercopy.c to / into arch-specific
 library
To: Jan Beulich ,
 "xen-devel@lists.xenproject.org" 
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On 26/11/2025 1:24 pm, Jan Beulich wrote:
> diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
> index 61e2293a467e..76540d77e55f 100644
> --- a/xen/arch/x86/Makefile
> +++ b/xen/arch/x86/Makefile
> @@ -72,7 +72,6 @@ obj-y += time.o
>  obj-y += traps-setup.o
>  obj-y += traps.o
>  obj-$(CONFIG_INTEL) += tsx.o
> -obj-y += usercopy.o
>  obj-y += x86_emulate.o
>  obj-$(CONFIG_TBOOT) += tboot.o
>  obj-y += hpet.o

There's

# Allows usercopy.c to include itself
$(obj)/usercopy.o: CFLAGS-y += -iquote .

which looks like it wants moving too.

But, given that this presumably compiles, doesn't it mean we've got a
search path problem anyway?

~Andrew


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Subject: Re: [PATCH 1/2] x86: move arch_generic_hweightl() to arch-specific
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To: Andrew Cooper 
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On 26.11.2025 14:51, Andrew Cooper wrote:
> On 26/11/2025 1:24 pm, Jan Beulich wrote:
>> diff --git a/xen/arch/x86/arch.mk b/xen/arch/x86/arch.mk
>> index 16368a498bb7..a0ee050c931b 100644
>> --- a/xen/arch/x86/arch.mk
>> +++ b/xen/arch/x86/arch.mk
>> @@ -3,6 +3,8 @@
>>  
>>  export XEN_IMG_OFFSET := 0x200000
>>  
>> +ALL_LIBS-y += arch/x86/lib/lib.a
>> +
> 
> Oh, I'd realised it was this easy, I'd have done so straight away when
> adding x86's custom arch_generic_hweightl().
> 
> I assumed it was going to be more complicated getting the order of the
> arch specific lib correct with the generic lib.
> 
> More concretely.  Given an x86 lib, we should move things like
> arch/x86/memcpy.S to it.
> 
> Therefore, when we have common/lib.a and arch/lib.a, do we guarantee to
> have arch/lib.a with higher precedence so for matching functions the
> arch specific one guarantees to be taken?

Not with the change above, it would need to become

ALL_LIBS-y := arch/x86/lib/lib.a $(ALL_LIBS-y)

to achieve that, requiring that ALL_LIBS-y won't change into a lazy-expansion
variable. If that's okay (please confirm), I can adjust the patch.

Things would be yet easier if every arch had a lib/lib.a, as then in
xen/Makefile we could simply have

ALL_LIBS-y                := arch/$(SRCARCH)/lib/lib.a
ALL_LIBS-y                += lib/lib.a

Alternatively we could move the setting of ALL_LIBS-y in xen/Makefile to
after the arch/$(SRCARCH)/arch.mk inclusion. I'd be a little wary of that,
though, as it would then be different from ALL_OBJS-y.

Jan


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Subject: Re: [PATCH 2/2] x86: move / split usercopy.c to / into arch-specific
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To: Andrew Cooper ,
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On 26.11.2025 14:56, Andrew Cooper wrote:
> On 26/11/2025 1:24 pm, Jan Beulich wrote:
>> diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
>> index 61e2293a467e..76540d77e55f 100644
>> --- a/xen/arch/x86/Makefile
>> +++ b/xen/arch/x86/Makefile
>> @@ -72,7 +72,6 @@ obj-y += time.o
>>  obj-y += traps-setup.o
>>  obj-y += traps.o
>>  obj-$(CONFIG_INTEL) += tsx.o
>> -obj-y += usercopy.o
>>  obj-y += x86_emulate.o
>>  obj-$(CONFIG_TBOOT) += tboot.o
>>  obj-y += hpet.o
> 
> There's
> 
> # Allows usercopy.c to include itself
> $(obj)/usercopy.o: CFLAGS-y += -iquote .
> 
> which looks like it wants moving too.

It doesn't need moving, and I apparently sent a stale patch. This hunk is
simply missing:

@@ -93,9 +92,6 @@ hostprogs-y += efi/mkreloc
 
 $(obj)/efi/mkreloc: HOSTCFLAGS += -I$(srctree)/include
 
-# Allows usercopy.c to include itself
-$(obj)/usercopy.o: CFLAGS-y += -iquote .
-
 $(obj)/x86_emulate.o: CFLAGS-y += -Os
 ifneq ($(CONFIG_HVM),y)
 $(obj)/x86_emulate.o: CFLAGS-y += -Wno-unused-label

> But, given that this presumably compiles, doesn't it mean we've got a
> search path problem anyway?

Iirc the need for the piece above was because of using __FILE__ with
#include, which now we don't anymore. Or maybe it was a leftover altogether.
Anyway, I don't see there being a search path problem, as #include "..." (as
used now) would better always work.

Jan


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Date: Wed, 26 Nov 2025 14:05:15 +0000
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Cc: andrew.cooper3@citrix.com, Julien Grall ,
 Stefano Stabellini ,
 Anthony PERARD ,
 Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 ,
 "xen-devel@lists.xenproject.org" 
Subject: Re: [PATCH 1/2] x86: move arch_generic_hweightl() to arch-specific
 library
To: Jan Beulich 
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On 26/11/2025 1:58 pm, Jan Beulich wrote:
> On 26.11.2025 14:51, Andrew Cooper wrote:
>> On 26/11/2025 1:24 pm, Jan Beulich wrote:
>>> diff --git a/xen/arch/x86/arch.mk b/xen/arch/x86/arch.mk
>>> index 16368a498bb7..a0ee050c931b 100644
>>> --- a/xen/arch/x86/arch.mk
>>> +++ b/xen/arch/x86/arch.mk
>>> @@ -3,6 +3,8 @@
>>>  
>>>  export XEN_IMG_OFFSET := 0x200000
>>>  
>>> +ALL_LIBS-y += arch/x86/lib/lib.a
>>> +
>> Oh, I'd realised it was this easy, I'd have done so straight away when
>> adding x86's custom arch_generic_hweightl().
>>
>> I assumed it was going to be more complicated getting the order of the
>> arch specific lib correct with the generic lib.
>>
>> More concretely.  Given an x86 lib, we should move things like
>> arch/x86/memcpy.S to it.
>>
>> Therefore, when we have common/lib.a and arch/lib.a, do we guarantee to
>> have arch/lib.a with higher precedence so for matching functions the
>> arch specific one guarantees to be taken?
> Not with the change above, it would need to become
>
> ALL_LIBS-y := arch/x86/lib/lib.a $(ALL_LIBS-y)
>
> to achieve that, requiring that ALL_LIBS-y won't change into a lazy-expansion
> variable. If that's okay (please confirm), I can adjust the patch.
>
> Things would be yet easier if every arch had a lib/lib.a, as then in
> xen/Makefile we could simply have
>
> ALL_LIBS-y                := arch/$(SRCARCH)/lib/lib.a
> ALL_LIBS-y                += lib/lib.a
>
> Alternatively we could move the setting of ALL_LIBS-y in xen/Makefile to
> after the arch/$(SRCARCH)/arch.mk inclusion. I'd be a little wary of that,
> though, as it would then be different from ALL_OBJS-y.

I think this would be better handled by common code.

Arches are going to want a lib.a eventually.  ARM even has
arch/arm/arm{32,64}/lib/ but like x86 they're just simple obj-y += at
the moment.

However, arches shouldn't be forced to make an empty one simply to build.

Does this work:

ALL_LIBS-y                := $(wildcard arch/$(SRCARCH)/lib/lib.a)
ALL_LIBS-y                += lib/lib.a

?  If so, I think it's the nicest option.

~Andrew


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Date: Wed, 26 Nov 2025 08:07:19 -0600 (CST)
From: Timothy Pearson 
To: Jan Beulich 
Cc: xen-devel , 
	Andrew Cooper , 
	Julien Grall , 
	Stefano Stabellini , 
	Anthony PERARD , 
	Michal Orzel , 
	Roger Pau =?utf-8?Q?Monn=C3=A9?= , 
	Timothy Pearson 
Message-ID: <1755986020.127148.1764166039180.JavaMail.zimbra@raptorengineeringinc.com>
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References:  
Subject: Re: [PATCH 3/8] symbols/ppc: re-number intermediate files
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Thread-Topic: symbols/ppc: re-number intermediate files
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----- Original Message -----
> From: "Jan Beulich" 
> To: "xen-devel" 
> Cc: "Andrew Cooper" , "Julien Grall" , "Stefano Stabellini"
> , "Anthony PERARD" , "=
Michal Orzel" , "Roger
> Pau Monn=C3=A9" , "Timothy Pearson" 
> Sent: Wednesday, November 26, 2025 7:43:17 AM
> Subject: [PATCH 3/8] symbols/ppc: re-number intermediate files

> In preparation to do away with symbols-dummy, re-number the assembly and
> object files used, for the numbers to match the next passes real output.
> This is to make 0 available to use for what now is handled by
> symbols-dummy.
>=20
> Signed-off-by: Jan Beulich 

Looks good to me.

Acked-by: Timothy Pearson 

> --- a/xen/arch/ppc/Makefile
> +++ b/xen/arch/ppc/Makefile
> @@ -16,16 +16,16 @@ $(TARGET)-syms: $(objtree)/prelink.o $(o
> =09    $(objtree)/common/symbols-dummy.o -o $(dot-target).0
> =09$(NM) -pa --format=3Dsysv $(dot-target).0 \
> =09=09| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
> -=09=09> $(dot-target).0.S
> -=09$(MAKE) $(build)=3D$(@D) $(dot-target).0.o
> +=09=09> $(dot-target).1.S
> +=09$(MAKE) $(build)=3D$(@D) $(dot-target).1.o
> =09$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \
> -=09    $(dot-target).0.o -o $(dot-target).1
> +=09    $(dot-target).1.o -o $(dot-target).1
> =09$(NM) -pa --format=3Dsysv $(dot-target).1 \
> =09=09| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
> -=09=09> $(dot-target).1.S
> -=09$(MAKE) $(build)=3D$(@D) $(dot-target).1.o
> +=09=09> $(dot-target).2.S
> +=09$(MAKE) $(build)=3D$(@D) $(dot-target).2.o
> =09$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \
> -=09    $(dot-target).1.o -o $@
> +=09    $(dot-target).2.o -o $@
> =09$(NM) -pa --format=3Dsysv $@ \
> =09=09| $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \
>  =09=09> $@.map


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Subject: Re: [PATCH 1/2] x86: move arch_generic_hweightl() to arch-specific
 library
To: Andrew Cooper 
Cc: Julien Grall , Stefano Stabellini
 , Anthony PERARD ,
 Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
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 "xen-devel@lists.xenproject.org" 
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From: Jan Beulich 
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On 26.11.2025 15:05, Andrew Cooper wrote:
> On 26/11/2025 1:58 pm, Jan Beulich wrote:
>> On 26.11.2025 14:51, Andrew Cooper wrote:
>>> On 26/11/2025 1:24 pm, Jan Beulich wrote:
>>>> diff --git a/xen/arch/x86/arch.mk b/xen/arch/x86/arch.mk
>>>> index 16368a498bb7..a0ee050c931b 100644
>>>> --- a/xen/arch/x86/arch.mk
>>>> +++ b/xen/arch/x86/arch.mk
>>>> @@ -3,6 +3,8 @@
>>>>  
>>>>  export XEN_IMG_OFFSET := 0x200000
>>>>  
>>>> +ALL_LIBS-y += arch/x86/lib/lib.a
>>>> +
>>> Oh, I'd realised it was this easy, I'd have done so straight away when
>>> adding x86's custom arch_generic_hweightl().
>>>
>>> I assumed it was going to be more complicated getting the order of the
>>> arch specific lib correct with the generic lib.
>>>
>>> More concretely.  Given an x86 lib, we should move things like
>>> arch/x86/memcpy.S to it.
>>>
>>> Therefore, when we have common/lib.a and arch/lib.a, do we guarantee to
>>> have arch/lib.a with higher precedence so for matching functions the
>>> arch specific one guarantees to be taken?
>> Not with the change above, it would need to become
>>
>> ALL_LIBS-y := arch/x86/lib/lib.a $(ALL_LIBS-y)
>>
>> to achieve that, requiring that ALL_LIBS-y won't change into a lazy-expansion
>> variable. If that's okay (please confirm), I can adjust the patch.
>>
>> Things would be yet easier if every arch had a lib/lib.a, as then in
>> xen/Makefile we could simply have
>>
>> ALL_LIBS-y                := arch/$(SRCARCH)/lib/lib.a
>> ALL_LIBS-y                += lib/lib.a
>>
>> Alternatively we could move the setting of ALL_LIBS-y in xen/Makefile to
>> after the arch/$(SRCARCH)/arch.mk inclusion. I'd be a little wary of that,
>> though, as it would then be different from ALL_OBJS-y.
> 
> I think this would be better handled by common code.
> 
> Arches are going to want a lib.a eventually.  ARM even has
> arch/arm/arm{32,64}/lib/ but like x86 they're just simple obj-y += at
> the moment.
> 
> However, arches shouldn't be forced to make an empty one simply to build.
> 
> Does this work:
> 
> ALL_LIBS-y                := $(wildcard arch/$(SRCARCH)/lib/lib.a)
> ALL_LIBS-y                += lib/lib.a
> 
> ?  If so, I think it's the nicest option.

I had thought of doing it this way initially, but on a fresh build
arch/$(SRCARCH)/lib/lib.a wouldn't be there when the Makefile is read in.
Whether switching ALL_LIBS-y to be a lazy-expansion variable would work
I didn't try; I'd prefer not to change the kind of variable that it is.

Jan


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Date: Wed, 26 Nov 2025 08:10:02 -0600 (CST)
From: Timothy Pearson 
To: Jan Beulich 
Cc: xen-devel , 
	Andrew Cooper , 
	Julien Grall , 
	Stefano Stabellini , 
	Anthony PERARD , 
	Michal Orzel , 
	Roger Pau =?utf-8?Q?Monn=C3=A9?= , 
	Timothy Pearson 
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References:  <8717ed0f-e837-4054-a67b-b41c08449c1a@suse.com>
Subject: Re: [PATCH 4/8] symbols/ppc: don't use symbols-dummy
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----- Original Message -----
> From: "Jan Beulich" 
> To: "xen-devel" 
> Cc: "Andrew Cooper" , "Julien Grall" , "Stefano Stabellini"
> , "Anthony PERARD" , "=
Michal Orzel" , "Roger
> Pau Monn=C3=A9" , "Timothy Pearson" 
> Sent: Wednesday, November 26, 2025 7:43:46 AM
> Subject: [PATCH 4/8] symbols/ppc: don't use symbols-dummy

> In particular when linking with lld, which converts hidden symbols to
> local ones, the ELF symbol table can change in unhelpful ways between the
> first two linking passes, resulting in the .rodata contributions to chang=
e
> between the 2nd and 3rd pass. That, however, renders our embedded symbol
> table pretty much unusable; the recently introduced self-test may then
> also fail. (Another difference between compiling a C file and assembling
> the generated ones is that - with -fdata-sections in use - the .rodata
> contributions move between passes 1 and 2, when we'd prefer them not to.)
>=20
> Signed-off-by: Jan Beulich 

Looks good to me.  Thanks!

Acked-by: Timothy Pearson 

> --- a/xen/arch/ppc/Makefile
> +++ b/xen/arch/ppc/Makefile
> @@ -12,8 +12,10 @@ $(TARGET): $(TARGET)-syms
> =09cp -f $< $@
>=20
> $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds
> +=09$(objtree)/tools/symbols $(all_symbols) --empty > $(dot-target).0.S
> +=09$(MAKE) $(build)=3D$(@D) $(dot-target).0.o
> =09$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \
> -=09    $(objtree)/common/symbols-dummy.o -o $(dot-target).0
> +=09      $(dot-target).0.o -o $(dot-target).0
> =09$(NM) -pa --format=3Dsysv $(dot-target).0 \
> =09=09| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
>  =09=09> $(dot-target).1.S


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Subject: Re: [PATCH 3/8] symbols/ppc: re-number intermediate files
To: Timothy Pearson 
Cc: xen-devel ,
 Andrew Cooper , Julien Grall ,
 Stefano Stabellini ,
 Anthony PERARD ,
 Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 
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On 26.11.2025 15:07, Timothy Pearson wrote:
> ----- Original Message -----
>> From: "Jan Beulich" 
>> To: "xen-devel" 
> 
>> In preparation to do away with symbols-dummy, re-number the assembly and
>> object files used, for the numbers to match the next passes real output.
>> This is to make 0 available to use for what now is handled by
>> symbols-dummy.
>>
>> Signed-off-by: Jan Beulich 
> 
> Looks good to me.
> 
> Acked-by: Timothy Pearson 

Thanks, but for clarification: This doesn't mean very much unless provided
by a maintainer (M: in ./MAINTAINERS). As a reviewer, you'd use Reviewed-by:
to fulfill the purpose set forth in the textual part of that file. Provided
of course you actually did a review.

Jan


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Date: Wed, 26 Nov 2025 08:14:13 -0600 (CST)
From: Timothy Pearson 
To: Jan Beulich 
Cc: xen-devel , 
	Andrew Cooper , 
	Julien Grall , 
	Stefano Stabellini , 
	Anthony PERARD , 
	Michal Orzel , 
	Roger Pau =?utf-8?Q?Monn=C3=A9?= 
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Subject: Re: [PATCH 3/8] symbols/ppc: re-number intermediate files
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----- Original Message -----
> From: "Jan Beulich" 
> To: "Timothy Pearson" 
> Cc: "xen-devel" , "Andrew Cooper" , "Julien Grall"
> , "Stefano Stabellini" , "Anthony=
 PERARD" , "Michal
> Orzel" , "Roger Pau Monn=C3=A9" 
> Sent: Wednesday, November 26, 2025 8:11:55 AM
> Subject: Re: [PATCH 3/8] symbols/ppc: re-number intermediate files

> On 26.11.2025 15:07, Timothy Pearson wrote:
>> ----- Original Message -----
>>> From: "Jan Beulich" 
>>> To: "xen-devel" 
>>=20
>>> In preparation to do away with symbols-dummy, re-number the assembly an=
d
>>> object files used, for the numbers to match the next passes real output=
.
>>> This is to make 0 available to use for what now is handled by
>>> symbols-dummy.
>>>
>>> Signed-off-by: Jan Beulich 
>>=20
>> Looks good to me.
>>=20
>> Acked-by: Timothy Pearson 
>=20
> Thanks, but for clarification: This doesn't mean very much unless provide=
d
> by a maintainer (M: in ./MAINTAINERS). As a reviewer, you'd use Reviewed-=
by:
> to fulfill the purpose set forth in the textual part of that file. Provid=
ed
> of course you actually did a review.

Understood, and yes, the patches were in fact reviewed.  I will use the alt=
ernate string in the future.


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Date: Wed, 26 Nov 2025 14:17:02 +0000
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Cc: andrew.cooper3@citrix.com, Julien Grall ,
 Stefano Stabellini ,
 Anthony PERARD ,
 Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
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 "xen-devel@lists.xenproject.org" 
Subject: Re: [PATCH 1/2] x86: move arch_generic_hweightl() to arch-specific
 library
To: Jan Beulich 
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On 26/11/2025 2:09 pm, Jan Beulich wrote:
> On 26.11.2025 15:05, Andrew Cooper wrote:
>> On 26/11/2025 1:58 pm, Jan Beulich wrote:
>>> On 26.11.2025 14:51, Andrew Cooper wrote:
>>>> On 26/11/2025 1:24 pm, Jan Beulich wrote:
>>>>> diff --git a/xen/arch/x86/arch.mk b/xen/arch/x86/arch.mk
>>>>> index 16368a498bb7..a0ee050c931b 100644
>>>>> --- a/xen/arch/x86/arch.mk
>>>>> +++ b/xen/arch/x86/arch.mk
>>>>> @@ -3,6 +3,8 @@
>>>>>  
>>>>>  export XEN_IMG_OFFSET := 0x200000
>>>>>  
>>>>> +ALL_LIBS-y += arch/x86/lib/lib.a
>>>>> +
>>>> Oh, I'd realised it was this easy, I'd have done so straight away when
>>>> adding x86's custom arch_generic_hweightl().
>>>>
>>>> I assumed it was going to be more complicated getting the order of the
>>>> arch specific lib correct with the generic lib.
>>>>
>>>> More concretely.  Given an x86 lib, we should move things like
>>>> arch/x86/memcpy.S to it.
>>>>
>>>> Therefore, when we have common/lib.a and arch/lib.a, do we guarantee to
>>>> have arch/lib.a with higher precedence so for matching functions the
>>>> arch specific one guarantees to be taken?
>>> Not with the change above, it would need to become
>>>
>>> ALL_LIBS-y := arch/x86/lib/lib.a $(ALL_LIBS-y)
>>>
>>> to achieve that, requiring that ALL_LIBS-y won't change into a lazy-expansion
>>> variable. If that's okay (please confirm), I can adjust the patch.
>>>
>>> Things would be yet easier if every arch had a lib/lib.a, as then in
>>> xen/Makefile we could simply have
>>>
>>> ALL_LIBS-y                := arch/$(SRCARCH)/lib/lib.a
>>> ALL_LIBS-y                += lib/lib.a
>>>
>>> Alternatively we could move the setting of ALL_LIBS-y in xen/Makefile to
>>> after the arch/$(SRCARCH)/arch.mk inclusion. I'd be a little wary of that,
>>> though, as it would then be different from ALL_OBJS-y.
>> I think this would be better handled by common code.
>>
>> Arches are going to want a lib.a eventually.  ARM even has
>> arch/arm/arm{32,64}/lib/ but like x86 they're just simple obj-y += at
>> the moment.
>>
>> However, arches shouldn't be forced to make an empty one simply to build.
>>
>> Does this work:
>>
>> ALL_LIBS-y                := $(wildcard arch/$(SRCARCH)/lib/lib.a)
>> ALL_LIBS-y                += lib/lib.a
>>
>> ?  If so, I think it's the nicest option.
> I had thought of doing it this way initially, but on a fresh build
> arch/$(SRCARCH)/lib/lib.a wouldn't be there when the Makefile is read in.
> Whether switching ALL_LIBS-y to be a lazy-expansion variable would work
> I didn't try; I'd prefer not to change the kind of variable that it is.

Hmm.  What about:

    $(filter arch%,$(ALL_LIBS-y)) $(filter-out arch%,$(ALL_LIBS-y))

in the link, at which point it doesn't matter about the exact order in
ALL_LIBS-y?

We do a similar trick with UBSAN_FLAGS to force the ordering of -fxxx vs
-fno-xxx.

~Andrew


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Subject: Re: [PATCH 1/3] x86/amd: Use setup_force_cpu_cap() for BTC_NO
To: Andrew Cooper 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 26.11.2025 14:22, Andrew Cooper wrote:
> When re-scanning features,

What exactly do you mean with this, outside of XenServer (i.e. upstream)? The
only thing I can think of is recheck_cpu_features(), which calls identify_cpu()
and hence init_amd(). Thus ...

> forced caps are taken into account but unforced
> such as this are not.  This causes BTC_NO to go missing, and for the system to
> appear to have lost features.

... I don't really follow where features might be lost.

Jan


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Subject: Re: [PATCH 3/8] symbols/ppc: re-number intermediate files
To: Timothy Pearson 
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 Andrew Cooper , Julien Grall ,
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On 26.11.2025 15:14, Timothy Pearson wrote:
> ----- Original Message -----
>> From: "Jan Beulich" 
>> To: "Timothy Pearson" 
> 
>> On 26.11.2025 15:07, Timothy Pearson wrote:
>>> ----- Original Message -----
>>>> From: "Jan Beulich" 
>>>> To: "xen-devel" 
>>>
>>>> In preparation to do away with symbols-dummy, re-number the assembly and
>>>> object files used, for the numbers to match the next passes real output.
>>>> This is to make 0 available to use for what now is handled by
>>>> symbols-dummy.
>>>>
>>>> Signed-off-by: Jan Beulich 
>>>
>>> Looks good to me.
>>>
>>> Acked-by: Timothy Pearson 
>>
>> Thanks, but for clarification: This doesn't mean very much unless provided
>> by a maintainer (M: in ./MAINTAINERS). As a reviewer, you'd use Reviewed-by:
>> to fulfill the purpose set forth in the textual part of that file. Provided
>> of course you actually did a review.
> 
> Understood, and yes, the patches were in fact reviewed.  I will use the
> alternate string in the future.

Then still for the ones here: May I flip them to R-b, meaning the patches can
in fact go in without anyone else's (i.e. a REST maintainer's) ack?

Jan


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Date: Wed, 26 Nov 2025 08:25:02 -0600 (CST)
From: Timothy Pearson 
To: Jan Beulich 
Cc: xen-devel , 
	Andrew Cooper , 
	Julien Grall , 
	Stefano Stabellini , 
	Anthony PERARD , 
	Michal Orzel , 
	Roger Pau =?utf-8?Q?Monn=C3=A9?= 
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Subject: Re: [PATCH 3/8] symbols/ppc: re-number intermediate files
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----- Original Message -----
> From: "Jan Beulich" 
> To: "Timothy Pearson" 
> Cc: "xen-devel" , "Andrew Cooper" , "Julien Grall"
> , "Stefano Stabellini" , "Anthony=
 PERARD" , "Michal
> Orzel" , "Roger Pau Monn=C3=A9" 
> Sent: Wednesday, November 26, 2025 8:21:31 AM
> Subject: Re: [PATCH 3/8] symbols/ppc: re-number intermediate files

> On 26.11.2025 15:14, Timothy Pearson wrote:
>> ----- Original Message -----
>>> From: "Jan Beulich" 
>>> To: "Timothy Pearson" 
>>=20
>>> On 26.11.2025 15:07, Timothy Pearson wrote:
>>>> ----- Original Message -----
>>>>> From: "Jan Beulich" 
>>>>> To: "xen-devel" 
>>>>
>>>>> In preparation to do away with symbols-dummy, re-number the assembly =
and
>>>>> object files used, for the numbers to match the next passes real outp=
ut.
>>>>> This is to make 0 available to use for what now is handled by
>>>>> symbols-dummy.
>>>>>
>>>>> Signed-off-by: Jan Beulich 
>>>>
>>>> Looks good to me.
>>>>
>>>> Acked-by: Timothy Pearson 
>>>
>>> Thanks, but for clarification: This doesn't mean very much unless provi=
ded
>>> by a maintainer (M: in ./MAINTAINERS). As a reviewer, you'd use Reviewe=
d-by:
>>> to fulfill the purpose set forth in the textual part of that file. Prov=
ided
>>> of course you actually did a review.
>>=20
>> Understood, and yes, the patches were in fact reviewed.  I will use the
>> alternate string in the future.
>=20
> Then still for the ones here: May I flip them to R-b, meaning the patches=
 can
> in fact go in without anyone else's (i.e. a REST maintainer's) ack?
>=20
> Jan

Yes, for both the [3/8] and [4/8] patches which I have personally reviewed.


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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk ,
	Andrew Cooper ,
	Anthony PERARD ,
	Jan Beulich ,
	Timothy Pearson ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Oleksii Kurochko 
Subject: [PATCH v2] xen/domain: introduce generic functions for domain struct allocation and freeing
Date: Wed, 26 Nov 2025 15:32:29 +0100
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From: Roger Pau Monne 

Move x86's free_domain_struct() to common code since it is shared between
architectures.

Move the x86 version of alloc_domain_struct() to common code as most of the
logic is architecture-independent. To handle the remaining architectural
differences, introduce arch_alloc_domain_struct_bits() for x86-specific
allocation requirements.

No functional change.

Suggested-By: Jan Beulich 
[Introduce an arch-specific function instead of using a weak function]
Signed-off-by: Roger Pau Monné 
Signed-off-by: Oleksii Kurochko 
---
Changes in v2:
- CI test results: https://gitlab.com/xen-project/people/olkur/xen/-/pipelines/2180836457
- Introduce an arch-specific function to handle differences between arch-es
  in domain structure allocation requirements, instead of relying on a weak
  function.
- Add Suggested-by: Jan Beulich .
- Move free_domain_struct() to common code.
- Update the commit message.
---
 xen/arch/arm/domain.c                | 17 -----------------
 xen/arch/ppc/stubs.c                 | 10 ----------
 xen/arch/riscv/stubs.c               | 10 ----------
 xen/arch/x86/domain.c                | 15 ++-------------
 xen/arch/x86/include/asm/pv/domain.h |  3 +++
 xen/common/domain.c                  | 23 +++++++++++++++++++++++
 6 files changed, 28 insertions(+), 50 deletions(-)

diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
index ab78444335..3e3a1fb9f5 100644
--- a/xen/arch/arm/domain.c
+++ b/xen/arch/arm/domain.c
@@ -480,23 +480,6 @@ void startup_cpu_idle_loop(void)
     reset_stack_and_jump(idle_loop);
 }
 
-struct domain *alloc_domain_struct(void)
-{
-    struct domain *d;
-    BUILD_BUG_ON(sizeof(*d) > PAGE_SIZE);
-    d = alloc_xenheap_pages(0, 0);
-    if ( d == NULL )
-        return NULL;
-
-    clear_page(d);
-    return d;
-}
-
-void free_domain_struct(struct domain *d)
-{
-    free_xenheap_page(d);
-}
-
 void dump_pageframe_info(struct domain *d)
 {
 
diff --git a/xen/arch/ppc/stubs.c b/xen/arch/ppc/stubs.c
index 75ebcae5e2..9953ea1c6c 100644
--- a/xen/arch/ppc/stubs.c
+++ b/xen/arch/ppc/stubs.c
@@ -147,11 +147,6 @@ void startup_cpu_idle_loop(void)
     BUG_ON("unimplemented");
 }
 
-void free_domain_struct(struct domain *d)
-{
-    BUG_ON("unimplemented");
-}
-
 void dump_pageframe_info(struct domain *d)
 {
     BUG_ON("unimplemented");
@@ -269,11 +264,6 @@ void vcpu_kick(struct vcpu *v)
     BUG_ON("unimplemented");
 }
 
-struct domain *alloc_domain_struct(void)
-{
-    BUG_ON("unimplemented");
-}
-
 struct vcpu *alloc_vcpu_struct(const struct domain *d)
 {
     BUG_ON("unimplemented");
diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c
index 340ed3cd6c..fe7d85ee1d 100644
--- a/xen/arch/riscv/stubs.c
+++ b/xen/arch/riscv/stubs.c
@@ -121,11 +121,6 @@ void startup_cpu_idle_loop(void)
     BUG_ON("unimplemented");
 }
 
-void free_domain_struct(struct domain *d)
-{
-    BUG_ON("unimplemented");
-}
-
 void dump_pageframe_info(struct domain *d)
 {
     BUG_ON("unimplemented");
@@ -243,11 +238,6 @@ void vcpu_kick(struct vcpu *v)
     BUG_ON("unimplemented");
 }
 
-struct domain *alloc_domain_struct(void)
-{
-    BUG_ON("unimplemented");
-}
-
 struct vcpu *alloc_vcpu_struct(const struct domain *d)
 {
     BUG_ON("unimplemented");
diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index 3a21e035f4..34a02f089e 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -463,10 +463,8 @@ void domain_cpu_policy_changed(struct domain *d)
     }
 }
 
-struct domain *alloc_domain_struct(void)
+unsigned int arch_alloc_domain_struct_bits(void)
 {
-    struct domain *d;
-
     /*
      * Without CONFIG_BIGMEM, we pack the PDX of the domain structure into
      * a 32-bit field within the page_info structure. Hence the MEMF_bits()
@@ -492,16 +490,7 @@ struct domain *alloc_domain_struct(void)
                 - 1;
 #endif
 
-    BUILD_BUG_ON(sizeof(*d) > PAGE_SIZE);
-    d = alloc_xenheap_pages(0, MEMF_bits(bits));
-    if ( d != NULL )
-        clear_page(d);
-    return d;
-}
-
-void free_domain_struct(struct domain *d)
-{
-    free_xenheap_page(d);
+    return bits;
 }
 
 struct vcpu *alloc_vcpu_struct(const struct domain *d)
diff --git a/xen/arch/x86/include/asm/pv/domain.h b/xen/arch/x86/include/asm/pv/domain.h
index 582d004051..6e65bc22fc 100644
--- a/xen/arch/x86/include/asm/pv/domain.h
+++ b/xen/arch/x86/include/asm/pv/domain.h
@@ -18,6 +18,9 @@ extern int8_t opt_pv32;
 # define opt_pv32 false
 #endif
 
+unsigned int arch_alloc_domain_struct_bits(void);
+#define arch_alloc_domin_struct_bits arch_alloc_domain_struct_bits
+
 /*
  * PCID values for the address spaces of 64-bit pv domains:
  *
diff --git a/xen/common/domain.c b/xen/common/domain.c
index 3b6e9471c4..b51ce375df 100644
--- a/xen/common/domain.c
+++ b/xen/common/domain.c
@@ -799,6 +799,29 @@ static int sanitise_domain_config(struct xen_domctl_createdomain *config)
     return arch_sanitise_domain_config(config);
 }
 
+struct domain *alloc_domain_struct(void)
+{
+    struct domain *d;
+    unsigned int bits = 0;
+
+#ifdef arch_alloc_domin_struct_bits
+    bits = arch_alloc_domin_struct_bits();
+#endif
+
+    BUILD_BUG_ON(sizeof(*d) > PAGE_SIZE);
+
+    d = alloc_xenheap_pages(0, MEMF_bits(bits));
+    if ( d != NULL )
+        clear_page(d);
+
+    return d;
+}
+
+void free_domain_struct(struct domain *d)
+{
+    free_xenheap_page(d);
+}
+
 struct domain *domain_create(domid_t domid,
                              struct xen_domctl_createdomain *config,
                              unsigned int flags)
-- 
2.52.0



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Subject: Re: [PATCH 1/2] x86: move arch_generic_hweightl() to arch-specific
 library
To: Andrew Cooper 
Cc: Julien Grall , Stefano Stabellini
 , Anthony PERARD ,
 Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 ,
 "xen-devel@lists.xenproject.org" 
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On 26.11.2025 15:17, Andrew Cooper wrote:
> On 26/11/2025 2:09 pm, Jan Beulich wrote:
>> On 26.11.2025 15:05, Andrew Cooper wrote:
>>> On 26/11/2025 1:58 pm, Jan Beulich wrote:
>>>> On 26.11.2025 14:51, Andrew Cooper wrote:
>>>>> On 26/11/2025 1:24 pm, Jan Beulich wrote:
>>>>>> diff --git a/xen/arch/x86/arch.mk b/xen/arch/x86/arch.mk
>>>>>> index 16368a498bb7..a0ee050c931b 100644
>>>>>> --- a/xen/arch/x86/arch.mk
>>>>>> +++ b/xen/arch/x86/arch.mk
>>>>>> @@ -3,6 +3,8 @@
>>>>>>  
>>>>>>  export XEN_IMG_OFFSET := 0x200000
>>>>>>  
>>>>>> +ALL_LIBS-y += arch/x86/lib/lib.a
>>>>>> +
>>>>> Oh, I'd realised it was this easy, I'd have done so straight away when
>>>>> adding x86's custom arch_generic_hweightl().
>>>>>
>>>>> I assumed it was going to be more complicated getting the order of the
>>>>> arch specific lib correct with the generic lib.
>>>>>
>>>>> More concretely.  Given an x86 lib, we should move things like
>>>>> arch/x86/memcpy.S to it.
>>>>>
>>>>> Therefore, when we have common/lib.a and arch/lib.a, do we guarantee to
>>>>> have arch/lib.a with higher precedence so for matching functions the
>>>>> arch specific one guarantees to be taken?
>>>> Not with the change above, it would need to become
>>>>
>>>> ALL_LIBS-y := arch/x86/lib/lib.a $(ALL_LIBS-y)
>>>>
>>>> to achieve that, requiring that ALL_LIBS-y won't change into a lazy-expansion
>>>> variable. If that's okay (please confirm), I can adjust the patch.
>>>>
>>>> Things would be yet easier if every arch had a lib/lib.a, as then in
>>>> xen/Makefile we could simply have
>>>>
>>>> ALL_LIBS-y                := arch/$(SRCARCH)/lib/lib.a
>>>> ALL_LIBS-y                += lib/lib.a
>>>>
>>>> Alternatively we could move the setting of ALL_LIBS-y in xen/Makefile to
>>>> after the arch/$(SRCARCH)/arch.mk inclusion. I'd be a little wary of that,
>>>> though, as it would then be different from ALL_OBJS-y.
>>> I think this would be better handled by common code.
>>>
>>> Arches are going to want a lib.a eventually.  ARM even has
>>> arch/arm/arm{32,64}/lib/ but like x86 they're just simple obj-y += at
>>> the moment.
>>>
>>> However, arches shouldn't be forced to make an empty one simply to build.
>>>
>>> Does this work:
>>>
>>> ALL_LIBS-y                := $(wildcard arch/$(SRCARCH)/lib/lib.a)
>>> ALL_LIBS-y                += lib/lib.a
>>>
>>> ?  If so, I think it's the nicest option.
>> I had thought of doing it this way initially, but on a fresh build
>> arch/$(SRCARCH)/lib/lib.a wouldn't be there when the Makefile is read in.
>> Whether switching ALL_LIBS-y to be a lazy-expansion variable would work
>> I didn't try; I'd prefer not to change the kind of variable that it is.
> 
> Hmm.  What about:
> 
>     $(filter arch%,$(ALL_LIBS-y)) $(filter-out arch%,$(ALL_LIBS-y))
> 
> in the link, at which point it doesn't matter about the exact order in
> ALL_LIBS-y?

Hmm, we could apparently do something like that, but looking at how ALL_LIBS
(note: not ALL_LIBS-y) is used, I wonder if I didn't make us depend on
unspecified behavior in f301f9a9e84f ("lib: collect library files in an
archive"): I don't think it is well-defined whether undefined symbols are
resolved by pulling in archive members when doing a relocatable link. (Of
course this is only a tangential aspect here.)

Another question is whether it is really always going to be the case that
arch-specific libraries want to take precedence over common ones.

To summarize, I think by this point I'd still prefer the

ALL_LIBS-y := arch/x86/lib/lib.a $(ALL_LIBS-y)

approach mentioned earlier.

Jan


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On 26.11.2025 14:22, Andrew Cooper wrote:
> This was potentially helpful when the chickenbit was the only mitigation and
> microcode had not been released, but that was two years ago.
> 
> Zenbleed microcode has been avaialble since December 2023, and the subsequent
> Entrysign signature vulnerability means that firmware updates block OS-loading
> and more OS-loadable microcode will be produced for Zen2.
> 
> i.e. the Zenbleed fix is not going to appear at runtime these days.
> 
> No practical change.
> 
> Signed-off-by: Andrew Cooper 

Acked-by: Jan Beulich 
on the basis that people unwilling to update their firmware already accept
being vulnerable. To them this might be a perceived regression, i.e. not
exactly "No practical change", but we kind of accept that possibility.

Jan


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From: "Yann Sionneau" 
Subject: =?utf-8?Q?Re:=20[PATCH=201/2]=20xenbus:=20Use=20.freeze/.thaw=20to=20handle=20xenbus=20devices?=
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Hi Jason,

On 11/19/25 23:46, Jason Andryuk wrote:
> The goal is to fix s2idle and S3 for Xen PV devices.  A domain resuming
> from s3 or s2idle disconnects its PV devices during resume.  The
> backends are not expecting this and do not reconnect.
> 
> b3e96c0c7562 ("xen: use freeze/restore/thaw PM events for suspend/
> resume/chkpt") changed xen_suspend()/do_suspend() from
> PMSG_SUSPEND/PMSG_RESUME to PMSG_FREEZE/PMSG_THAW/PMSG_RESTORE, but the
> suspend/resume callbacks remained.
> 
> .freeze/restore are used with hiberation where Linux restarts in a new
> place in the future.  .suspend/resume are useful for runtime power
> management for the duration of a boot.
> 
> The current behavior of the callbacks works for an xl save/restore or
> live migration where the domain is restored/migrated to a new location
> and connecting to a not-already-connected backend.
> 
> Change xenbus_pm_ops to use .freeze/thaw/restore and drop the
> .suspend/resume hook.  This matches the use in drivers/xen/manage.c for
> save/restore and live migration.  With .suspend/resume empty, PV devices
> are left connected during s2idle and s3, so PV devices are not changed
> and work after resume.
> 
> Signed-off-by: Jason Andryuk 
> ---
>   drivers/xen/xenbus/xenbus_probe_frontend.c | 4 +---
>   1 file changed, 1 insertion(+), 3 deletions(-)
> 
> diff --git a/drivers/xen/xenbus/xenbus_probe_frontend.c b/drivers/xen/xenbus/xenbus_probe_frontend.c
> index 6d1819269cbe..199917b6f77c 100644
> --- a/drivers/xen/xenbus/xenbus_probe_frontend.c
> +++ b/drivers/xen/xenbus/xenbus_probe_frontend.c
> @@ -148,11 +148,9 @@ static void xenbus_frontend_dev_shutdown(struct device *_dev)
>   }
>   
>   static const struct dev_pm_ops xenbus_pm_ops = {
> -	.suspend	= xenbus_dev_suspend,
> -	.resume		= xenbus_frontend_dev_resume,
>   	.freeze		= xenbus_dev_suspend,
>   	.thaw		= xenbus_dev_cancel,
> -	.restore	= xenbus_dev_resume,
> +	.restore	= xenbus_frontend_dev_resume,
>   };
>   
>   static struct xen_bus_type xenbus_frontend = {

I've tried putting Debian 13 to sleep with your patch (echo freeze > 
/sys/power/state) and could not wake up the guest.
Isn't it also mandatory to apply this patch 
https://github.com/QubesOS/qubes-linux-kernel/blob/main/xen-events-Add-wakeup-support-to-xen-pirq.patch 
?

With both patches applied, I get the wake up to work.

Regards,

-- 


--
Yann Sionneau | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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On 26.11.2025 14:22, Andrew Cooper wrote:
> @@ -1075,6 +966,112 @@ static void cf_check fam17_disable_c6(void *arg)
>  	wrmsrl(MSR_AMD_CSTATE_CFG, val & mask);
>  }
>  
> +static bool zenbleed_use_chickenbit(void)
> +{
> +    unsigned int curr_rev;
> +    uint8_t fixed_rev;
> +
> +    /*
> +     * If we're virtualised, we can't do family/model checks safely, and
> +     * we likely wouldn't have access to DE_CFG even if we could see a
> +     * microcode revision.
> +     *
> +     * A hypervisor may hide AVX as a stopgap mitigation.  We're not in a
> +     * position to care either way.  An admin doesn't want to be disabling
> +     * AVX as a mitigation on any build of Xen with this logic present.
> +     */
> +    if ( cpu_has_hypervisor || boot_cpu_data.family != 0x17 )
> +        return false;
> +
> +    curr_rev = this_cpu(cpu_sig).rev;
> +    switch ( curr_rev >> 8 )
> +    {
> +    case 0x083010: fixed_rev = 0x7a; break;
> +    case 0x086001: fixed_rev = 0x0b; break;
> +    case 0x086081: fixed_rev = 0x05; break;
> +    case 0x087010: fixed_rev = 0x32; break;
> +    case 0x08a000: fixed_rev = 0x08; break;
> +    default:
> +        /*
> +         * With the Fam17h check above, most parts getting here are Zen1.
> +         * They're not affected.  Assume Zen2 ones making it here are affected
> +         * regardless of microcode version.
> +         */
> +        return is_zen2_uarch();
> +    }
> +
> +    return (uint8_t)curr_rev >= fixed_rev;
> +}
> +
> +void amd_init_de_cfg(const struct cpuinfo_x86 *c)
> +{
> +    uint64_t val, new = 0;
> +
> +    /* The MSR doesn't exist on Fam 0xf/0x11. */
> +    if ( c->family != 0xf && c->family != 0x11 )
> +        return;

Comment and code don't match. Did you mean

    if ( c->family == 0xf || c->family == 0x11 )
        return;

(along the lines of what you have in amd_init_lfence_dispatch())?

> +    /*
> +     * On Zen3 (Fam 0x19) and later CPUs, LFENCE is unconditionally dispatch
> +     * serialising, and is enumerated in CPUID.  Hypervisors may also
> +     * enumerate it when the setting is in place and MSR_AMD64_DE_CFG isn't
> +     * available.
> +     */
> +    if ( !test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability) )
> +        new |= AMD64_DE_CFG_LFENCE_SERIALISE;
> +
> +    /*
> +     * If vulnerable to Zenbleed and not mitigated in microcode, use the
> +     * bigger hammer.
> +     */
> +    if ( zenbleed_use_chickenbit() )
> +        new |= (1 << 9);
> +
> +    if ( !new )
> +        return;
> +
> +    if ( rdmsr_safe(MSR_AMD64_DE_CFG, &val) ||
> +         (val & new) == new )
> +        return;
> +
> +    /*
> +     * DE_CFG is a Core-scoped MSR, and this write is racy.  However, both
> +     * threads calculate the new value from state which expected to be
> +     * consistent across CPUs and unrelated to the old value, so the result
> +     * should be consistent.
> +     */
> +    wrmsr_safe(MSR_AMD64_DE_CFG, val | new);

Either of the bits may be the cause of #GP. In that case we wouldn't set the
other bit, even if it may be possible to set it.

> +}
> +
> +void __init amd_init_lfence_dispatch(void)
> +{
> +    struct cpuinfo_x86 *c = &boot_cpu_data;
> +    uint64_t val;
> +
> +    if ( test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability) )
> +        /* LFENCE is forced dispatch serialising and we can't control it. */
> +        return;
> +
> +    if ( c->family == 0xf || c->family == 0x11 )
> +        /* MSR doesn't exist.  LFENCE is dispatch serialising on this hardare. */
> +        goto set;
> +
> +    if ( rdmsr_safe(MSR_AMD64_DE_CFG, &val) )
> +        /* Unable to read.  Assume the safer default. */
> +        goto clear;
> +
> +    if ( val & AMD64_DE_CFG_LFENCE_SERIALISE )
> +        /* Already dispatch serialising. */
> +        goto set;

Why "already", when this is now after we did the adjustment?

> + clear:
> +    setup_clear_cpu_cap(X86_FEATURE_LFENCE_DISPATCH);
> +    return;
> +
> + set:
> +    setup_force_cpu_cap(X86_FEATURE_LFENCE_DISPATCH);
> +}
> +
>  static void amd_check_bp_cfg(void)
>  {
>  	uint64_t val, new = 0;
> @@ -1118,6 +1115,11 @@ static void cf_check init_amd(struct cpuinfo_x86 *c)
>  	u32 l, h;
>  	uint64_t value;
>  
> +        amd_init_de_cfg(c);
> +
> +        if (c == &boot_cpu_data)
> +            amd_init_lfence_dispatch(); /* Needs amd_init_de_cfg() */
> +
>  	/* Disable TLB flush filter by setting HWCR.FFDIS on K8
>  	 * bit 6 of msr C001_0015
>  	 *

Nit: I don't think we want to mix indentation style within a function.

> --- a/xen/arch/x86/cpu/hygon.c
> +++ b/xen/arch/x86/cpu/hygon.c
> @@ -31,7 +31,11 @@ static void cf_check init_hygon(struct cpuinfo_x86 *c)
>  {
>  	unsigned long long value;
>  
> -	amd_init_lfence(c);
> +        amd_init_de_cfg(c);
> +
> +        if (c == &boot_cpu_data)
> +            amd_init_lfence_dispatch(); /* Needs amd_init_de_cfg() */
> +
>  	amd_init_ssbd(c);
>  
>  	/* Probe for NSCB on Zen2 CPUs when not virtualised */

Same here then.

Jan


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Subject: Re: [PATCH 1/3] x86/amd: Use setup_force_cpu_cap() for BTC_NO
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On 26/11/2025 2:19 pm, Jan Beulich wrote:
> On 26.11.2025 14:22, Andrew Cooper wrote:
>> When re-scanning features,
> What exactly do you mean with this, outside of XenServer (i.e. upstream)? The
> only thing I can think of is recheck_cpu_features(), which calls identify_cpu()
> and hence init_amd(). Thus ...
>
>> forced caps are taken into account but unforced
>> such as this are not.  This causes BTC_NO to go missing, and for the system to
>> appear to have lost features.
> ... I don't really follow where features might be lost.

Well - it's a feature that we started upstreaming and I still hope to
finish in some copious free time.

Already upstream, we rescan the Raw CPU policy after microcode load. 
That has had fixes such as dis-engaging CPUID Masking/Overriding so the
Raw policy comes out accurate.

The next step (not upstream yet) is to regenerate the Host and Guest
policies.  I recently fixed a bug in XenServer's testing and noticed
that the underlying logic had bit-rotted quite a bit, hence this series.

The purpose is to be able to activate new features added by a late
microcode load, such as new speculative defences, or simply provide new
FOO_NO bits.

~Andrew


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Subject: Re: [PATCH v2] xen/domain: introduce generic functions for domain
 struct allocation and freeing
To: Oleksii Kurochko 
Cc: Roger Pau Monne ,
 Stefano Stabellini , Julien Grall ,
 Bertrand Marquis ,
 Michal Orzel ,
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On 26.11.2025 15:32, Oleksii Kurochko wrote:
> --- a/xen/arch/x86/include/asm/pv/domain.h
> +++ b/xen/arch/x86/include/asm/pv/domain.h
> @@ -18,6 +18,9 @@ extern int8_t opt_pv32;
>  # define opt_pv32 false
>  #endif
>  
> +unsigned int arch_alloc_domain_struct_bits(void);
> +#define arch_alloc_domin_struct_bits arch_alloc_domain_struct_bits

There was an 'a' lost in the identifier.

> --- a/xen/common/domain.c
> +++ b/xen/common/domain.c
> @@ -799,6 +799,29 @@ static int sanitise_domain_config(struct xen_domctl_createdomain *config)
>      return arch_sanitise_domain_config(config);
>  }
>  
> +struct domain *alloc_domain_struct(void)
> +{
> +    struct domain *d;
> +    unsigned int bits = 0;
> +
> +#ifdef arch_alloc_domin_struct_bits
> +    bits = arch_alloc_domin_struct_bits();
> +#endif

Maybe

#ifndef arch_alloc_domain_struct_bits
# define arch_alloc_domain_struct_bits() 0
#endif

ahead of the use and then simply

    unsigned int bits = arch_alloc_domain_struct_bits();

?

> +    BUILD_BUG_ON(sizeof(*d) > PAGE_SIZE);
> +
> +    d = alloc_xenheap_pages(0, MEMF_bits(bits));

I'd go a little farther and allow the arch to specify all the memflags that
are wanted. Then the hook name would also be less ambiguous, as "bits" can
mean many things. Perhaps arch_alloc_domain_struct_memflags() or, since
"memflags" kind of implies allocation, arch_domain_struct_memflags()?

Jan


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Subject: Re: [PATCH 1/3] x86/amd: Use setup_force_cpu_cap() for BTC_NO
To: Andrew Cooper 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Xen-devel 
References: <20251126132220.881028-1-andrew.cooper3@citrix.com>
 <20251126132220.881028-2-andrew.cooper3@citrix.com>
 
 
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From: Jan Beulich 
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On 26.11.2025 16:12, Andrew Cooper wrote:
> On 26/11/2025 2:19 pm, Jan Beulich wrote:
>> On 26.11.2025 14:22, Andrew Cooper wrote:
>>> When re-scanning features,
>> What exactly do you mean with this, outside of XenServer (i.e. upstream)? The
>> only thing I can think of is recheck_cpu_features(), which calls identify_cpu()
>> and hence init_amd(). Thus ...
>>
>>> forced caps are taken into account but unforced
>>> such as this are not.  This causes BTC_NO to go missing, and for the system to
>>> appear to have lost features.
>> ... I don't really follow where features might be lost.
> 
> Well - it's a feature that we started upstreaming and I still hope to
> finish in some copious free time.
> 
> Already upstream, we rescan the Raw CPU policy after microcode load. 
> That has had fixes such as dis-engaging CPUID Masking/Overriding so the
> Raw policy comes out accurate.

Yet that doesn't take forced features into account afaics. So at the very
least this needs to come with a description which more accurately describes
what (if anything) is actually being fixed / altered upstream.

> The next step (not upstream yet) is to regenerate the Host and Guest
> policies.  I recently fixed a bug in XenServer's testing and noticed
> that the underlying logic had bit-rotted quite a bit, hence this series.
> 
> The purpose is to be able to activate new features added by a late
> microcode load, such as new speculative defences, or simply provide new
> FOO_NO bits.

Yes, that's a good goal.

Jan


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From: Juergen Gross 
To: linux-kernel@vger.kernel.org,
	x86@kernel.org,
	virtualization@lists.linux.dev,
	kvm@vger.kernel.org,
	linux-hwmon@vger.kernel.org,
	linux-block@vger.kernel.org
Cc: Juergen Gross ,
	Thomas Gleixner ,
	Ingo Molnar ,
	Borislav Petkov ,
	Dave Hansen ,
	"H. Peter Anvin" ,
	Ajay Kaher ,
	Alexey Makhalov ,
	Broadcom internal kernel review list ,
	Paolo Bonzini ,
	Vitaly Kuznetsov ,
	Boris Ostrovsky ,
	xen-devel@lists.xenproject.org,
	Jean Delvare ,
	Guenter Roeck ,
	Denis Efremov ,
	Jens Axboe 
Subject: [PATCH 0/5] x86: Cleanups around slow_down_io()
Date: Wed, 26 Nov 2025 17:20:13 +0100
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While looking at paravirt cleanups I stumbled over slow_down_io() and
the related REALLY_SLOW_IO define.

Especially REALLY_SLOW_IO is a mess, which is proven by 2 completely
wrong use cases.

Do several cleanups, resulting in a deletion of REALLY_SLOW_IO and the
io_delay() paravirt function hook.

Patches 2 and 3 are not changing any functionality, but maybe they
should? As the potential bug has been present for more than a decade
now, I went with just deleting the useless "#define REALLY_SLOW_IO".
The alternative would be to do something similar as in patch 5.

Juergen Gross (5):
  x86/paravirt: Replace io_delay() hook with a bool
  hwmon/lm78: Drop REALLY_SLOW_IO setting
  hwmon/w83781d: Drop REALLY_SLOW_IO setting
  block/floppy: Don't use REALLY_SLOW_IO for delays
  x86/io: Remove REALLY_SLOW_IO handling

 arch/x86/include/asm/floppy.h         | 27 ++++++++++++++++++++++-----
 arch/x86/include/asm/io.h             | 12 +++++-------
 arch/x86/include/asm/paravirt.h       | 11 +----------
 arch/x86/include/asm/paravirt_types.h |  3 +--
 arch/x86/kernel/cpu/vmware.c          |  2 +-
 arch/x86/kernel/kvm.c                 |  8 +-------
 arch/x86/kernel/paravirt.c            |  3 +--
 arch/x86/xen/enlighten_pv.c           |  6 +-----
 drivers/block/floppy.c                |  2 --
 drivers/hwmon/lm78.c                  |  5 +++--
 drivers/hwmon/w83781d.c               |  5 +++--
 11 files changed, 39 insertions(+), 45 deletions(-)

-- 
2.51.0



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From: Juergen Gross 
To: linux-kernel@vger.kernel.org,
	x86@kernel.org,
	virtualization@lists.linux.dev,
	kvm@vger.kernel.org
Cc: Juergen Gross ,
	Thomas Gleixner ,
	Ingo Molnar ,
	Borislav Petkov ,
	Dave Hansen ,
	"H. Peter Anvin" ,
	Ajay Kaher ,
	Alexey Makhalov ,
	Broadcom internal kernel review list ,
	Paolo Bonzini ,
	Vitaly Kuznetsov ,
	Boris Ostrovsky ,
	xen-devel@lists.xenproject.org
Subject: [PATCH 1/5] x86/paravirt: Replace io_delay() hook with a bool
Date: Wed, 26 Nov 2025 17:20:14 +0100
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The io_delay() paravirt hook is in no way performance critical and all
users setting it to a different function than native_io_delay() are
using an empty function as replacement.

This enables to replace the hook with a bool indicating whether
native_io_delay() should be called.

Signed-off-by: Juergen Gross 
---
 arch/x86/include/asm/io.h             |  7 +++++--
 arch/x86/include/asm/paravirt.h       | 11 +----------
 arch/x86/include/asm/paravirt_types.h |  3 +--
 arch/x86/kernel/cpu/vmware.c          |  2 +-
 arch/x86/kernel/kvm.c                 |  8 +-------
 arch/x86/kernel/paravirt.c            |  3 +--
 arch/x86/xen/enlighten_pv.c           |  6 +-----
 7 files changed, 11 insertions(+), 29 deletions(-)

diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h
index ca309a3227c7..0448575569b9 100644
--- a/arch/x86/include/asm/io.h
+++ b/arch/x86/include/asm/io.h
@@ -245,9 +245,14 @@ extern void io_delay_init(void);
 #if defined(CONFIG_PARAVIRT)
 #include 
 #else
+#define call_io_delay() true
+#endif
 
 static inline void slow_down_io(void)
 {
+	if (!call_io_delay())
+		return;
+
 	native_io_delay();
 #ifdef REALLY_SLOW_IO
 	native_io_delay();
@@ -256,8 +261,6 @@ static inline void slow_down_io(void)
 #endif
 }
 
-#endif
-
 #define BUILDIO(bwl, type)						\
 static inline void out##bwl##_p(type value, u16 port)			\
 {									\
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index b5e59a7ba0d0..0ab798d234cc 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -53,16 +53,7 @@ static inline u64 paravirt_steal_clock(int cpu)
 void __init paravirt_set_cap(void);
 #endif
 
-/* The paravirtualized I/O functions */
-static inline void slow_down_io(void)
-{
-	PVOP_VCALL0(cpu.io_delay);
-#ifdef REALLY_SLOW_IO
-	PVOP_VCALL0(cpu.io_delay);
-	PVOP_VCALL0(cpu.io_delay);
-	PVOP_VCALL0(cpu.io_delay);
-#endif
-}
+#define call_io_delay() pv_info.io_delay
 
 void native_flush_tlb_local(void);
 void native_flush_tlb_global(void);
diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h
index 37a8627d8277..ee399f467796 100644
--- a/arch/x86/include/asm/paravirt_types.h
+++ b/arch/x86/include/asm/paravirt_types.h
@@ -36,6 +36,7 @@ struct pv_info {
 #ifdef CONFIG_PARAVIRT_XXL
 	u16 extra_user_64bit_cs;  /* __USER_CS if none */
 #endif
+	bool io_delay;
 
 	const char *name;
 };
@@ -51,8 +52,6 @@ struct pv_lazy_ops {
 
 struct pv_cpu_ops {
 	/* hooks for various privileged instructions */
-	void (*io_delay)(void);
-
 #ifdef CONFIG_PARAVIRT_XXL
 	unsigned long (*get_debugreg)(int regno);
 	void (*set_debugreg)(int regno, unsigned long value);
diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c
index cb3f900c46fc..47db25d63c8d 100644
--- a/arch/x86/kernel/cpu/vmware.c
+++ b/arch/x86/kernel/cpu/vmware.c
@@ -338,7 +338,7 @@ arch_initcall(activate_jump_labels);
 static void __init vmware_paravirt_ops_setup(void)
 {
 	pv_info.name = "VMware hypervisor";
-	pv_ops.cpu.io_delay = paravirt_nop;
+	pv_info.io_delay = false;
 
 	if (vmware_tsc_khz == 0)
 		return;
diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c
index b67d7c59dca0..b02d441efa3b 100644
--- a/arch/x86/kernel/kvm.c
+++ b/arch/x86/kernel/kvm.c
@@ -73,12 +73,6 @@ DEFINE_PER_CPU_DECRYPTED(struct kvm_steal_time, steal_time) __aligned(64) __visi
 static int has_steal_clock = 0;
 
 static int has_guest_poll = 0;
-/*
- * No need for any "IO delay" on KVM
- */
-static void kvm_io_delay(void)
-{
-}
 
 #define KVM_TASK_SLEEP_HASHBITS 8
 #define KVM_TASK_SLEEP_HASHSIZE (1<
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Date: Wed, 26 Nov 2025 16:33:54 +0000
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Cc: andrew.cooper3@citrix.com, =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Xen-devel 
Subject: Re: [PATCH 1/3] x86/amd: Use setup_force_cpu_cap() for BTC_NO
To: Jan Beulich 
References: <20251126132220.881028-1-andrew.cooper3@citrix.com>
 <20251126132220.881028-2-andrew.cooper3@citrix.com>
 
 
 <9c72cfb3-ed12-4955-817b-84d7c33587af@suse.com>
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On 26/11/2025 3:25 pm, Jan Beulich wrote:
> On 26.11.2025 16:12, Andrew Cooper wrote:
>> On 26/11/2025 2:19 pm, Jan Beulich wrote:
>>> On 26.11.2025 14:22, Andrew Cooper wrote:
>>>> When re-scanning features,
>>> What exactly do you mean with this, outside of XenServer (i.e. upstream)? The
>>> only thing I can think of is recheck_cpu_features(), which calls identify_cpu()
>>> and hence init_amd(). Thus ...
>>>
>>>> forced caps are taken into account but unforced
>>>> such as this are not.  This causes BTC_NO to go missing, and for the system to
>>>> appear to have lost features.
>>> ... I don't really follow where features might be lost.
>> Well - it's a feature that we started upstreaming and I still hope to
>> finish in some copious free time.
>>
>> Already upstream, we rescan the Raw CPU policy after microcode load. 
>> That has had fixes such as dis-engaging CPUID Masking/Overriding so the
>> Raw policy comes out accurate.
> Yet that doesn't take forced features into account afaics. So at the very
> least this needs to come with a description which more accurately describes
> what (if anything) is actually being fixed / altered upstream.

I don't know what more you want me to say.  It's not a problem per say
in upstream, but it does come about because BTC_NO is handled
inconsistently to the other FOO_NO bits.

recheck_cpu_features() papers over the issue by re-invoking
identify_cpu().  It's necessary for S3 resume because all of
init_$VENDOR() really is needed, but it looks bogus in
smp_store_cpu_info() because it's repeating work done immediately prior
in start_secondary().

~Andrew


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Date: Wed, 26 Nov 2025 17:37:50 +0100
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Subject: Re: [PATCH v2] xen/domain: introduce generic functions for domain
 struct allocation and freeing
To: Jan Beulich 
Cc: Roger Pau Monne ,
 Stefano Stabellini , Julien Grall ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Andrew Cooper ,
 Anthony PERARD ,
 Timothy Pearson ,
 Alistair Francis ,
 Bob Eshleman , Connor Davis
 , xen-devel@lists.xenproject.org
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 <1930930f-d9a4-4ad2-b6b1-5c138227924f@suse.com>
Content-Language: en-US
From: Oleksii Kurochko 
In-Reply-To: <1930930f-d9a4-4ad2-b6b1-5c138227924f@suse.com>

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On 11/26/25 4:19 PM, Jan Beulich wrote:
> On 26.11.2025 15:32, Oleksii Kurochko wrote:
>> --- a/xen/arch/x86/include/asm/pv/domain.h
>> +++ b/xen/arch/x86/include/asm/pv/domain.h
>> @@ -18,6 +18,9 @@ extern int8_t opt_pv32;
>>   # define opt_pv32 false
>>   #endif
>>   
>> +unsigned int arch_alloc_domain_struct_bits(void);
>> +#define arch_alloc_domin_struct_bits arch_alloc_domain_struct_bits
> There was an 'a' lost in the identifier.
>
>> --- a/xen/common/domain.c
>> +++ b/xen/common/domain.c
>> @@ -799,6 +799,29 @@ static int sanitise_domain_config(struct xen_domctl_createdomain *config)
>>       return arch_sanitise_domain_config(config);
>>   }
>>   
>> +struct domain *alloc_domain_struct(void)
>> +{
>> +    struct domain *d;
>> +    unsigned int bits = 0;
>> +
>> +#ifdef arch_alloc_domin_struct_bits
>> +    bits = arch_alloc_domin_struct_bits();
>> +#endif
> Maybe
>
> #ifndef arch_alloc_domain_struct_bits
> # define arch_alloc_domain_struct_bits() 0
> #endif
>
> ahead of the use and then simply
>
>      unsigned int bits = arch_alloc_domain_struct_bits();
>
> ?
>
>> +    BUILD_BUG_ON(sizeof(*d) > PAGE_SIZE);
>> +
>> +    d = alloc_xenheap_pages(0, MEMF_bits(bits));
> I'd go a little farther and allow the arch to specify all the memflags that
> are wanted. Then the hook name would also be less ambiguous, as "bits" can
> mean many things. Perhaps arch_alloc_domain_struct_memflags() or, since
> "memflags" kind of implies allocation, arch_domain_struct_memflags()?

I also thought about returning memflags from the hook instead of bits. Lets
then return memflags.

I will apply all other comments too.

Thanks.

~ Oleksii

--------------SB5jDQiNuzlX7dmqmsAAhC70
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On 11/26/25 4:19 PM, Jan Beulich wrote:

    

    

      
On 26.11.2025 15:32, Oleksii Kurochko wrote:


      

        
--- a/xen/arch/x86/include/asm/pv/domain.h
+++ b/xen/arch/x86/include/asm/pv/domain.h
@@ -18,6 +18,9 @@ extern int8_t opt_pv32;
 # define opt_pv32 false
 #endif
 
+unsigned int arch_alloc_domain_struct_bits(void);
+#define arch_alloc_domin_struct_bits arch_alloc_domain_struct_bits


      

      
There was an 'a' lost in the identifier.



      

        
--- a/xen/common/domain.c
+++ b/xen/common/domain.c
@@ -799,6 +799,29 @@ static int sanitise_domain_config(struct xen_domctl_createdomain *config)
     return arch_sanitise_domain_config(config);
 }
 
+struct domain *alloc_domain_struct(void)
+{
+    struct domain *d;
+    unsigned int bits = 0;
+
+#ifdef arch_alloc_domin_struct_bits
+    bits = arch_alloc_domin_struct_bits();
+#endif


      

      
Maybe

#ifndef arch_alloc_domain_struct_bits
# define arch_alloc_domain_struct_bits() 0
#endif

ahead of the use and then simply

    unsigned int bits = arch_alloc_domain_struct_bits();

?



      

        
+    BUILD_BUG_ON(sizeof(*d) > PAGE_SIZE);
+
+    d = alloc_xenheap_pages(0, MEMF_bits(bits));


      

      
I'd go a little farther and allow the arch to specify all the memflags that
are wanted. Then the hook name would also be less ambiguous, as "bits" can
mean many things. Perhaps arch_alloc_domain_struct_memflags() or, since
"memflags" kind of implies allocation, arch_domain_struct_memflags()?

    

    
I also thought about returning memflags from the hook instead of bits. Lets
then return memflags.

I will apply all other comments too.

Thanks.

~ Oleksii



  


--------------SB5jDQiNuzlX7dmqmsAAhC70--


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While in principle it's possible to have a vendor virtualising another,
this is fairly tricky in practice. Not doing so enables certain
optimisations with regards to vendor checks in later patches.

Signed-off-by: Alejandro Vallejo 
---
I originally had a Kconfig option to allow cross-vendor virt and
conditionally disable the check on policy compatibility. In practice,
I suspect there's 0% of people that would want that, so I decided to
simply remove it altogether. Happy to put it back if there's anyone
interested.
---
 xen/lib/x86/policy.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/xen/lib/x86/policy.c b/xen/lib/x86/policy.c
index f033d22785..4c0c5386ea 100644
--- a/xen/lib/x86/policy.c
+++ b/xen/lib/x86/policy.c
@@ -15,7 +15,8 @@ int x86_cpu_policies_are_compatible(const struct cpu_policy *host,
 #define FAIL_MSR(m) \
     do { e.msr = (m); goto out; } while ( 0 )
 
-    if ( guest->basic.max_leaf > host->basic.max_leaf )
+    if ( (guest->basic.max_leaf >  host->basic.max_leaf) ||
+         (guest->x86_vendor     != host->x86_vendor) )
         FAIL_CPUID(0, NA);
 
     if ( guest->feat.max_subleaf > host->feat.max_subleaf )
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: Alejandro Vallejo , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" 
Subject: [RFC PATCH 01/11] x86: Add more granularity to the vendors in Kconfig
Date: Wed, 26 Nov 2025 17:44:03 +0100
Message-ID: <20251126164419.174487-2-alejandro.garciavallejo@amd.com>
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This enables very aggressive DCE passes on single-vendor builds in later
patches, as it will allow most vendor checks to become statically chosen
branches. A lot of statics go away and a lot more inlining is allowed.

In order to allow x86_vendor_is() to fold into constants, expand Kconfig
to have the full set of vendors. Adds Hygon, Centaur, Shanghai and the
default path.

Have Hygon depend on AMD, and Centaur+Shanghai depend on Intel.

Not a functional change.

Signed-off-by: Alejandro Vallejo 
---
 xen/arch/x86/Kconfig.cpu         | 45 ++++++++++++++++++++++++++++++++
 xen/arch/x86/cpu/common.c        | 17 +++++++-----
 xen/arch/x86/include/asm/cpuid.h |  7 +++++
 3 files changed, 62 insertions(+), 7 deletions(-)

diff --git a/xen/arch/x86/Kconfig.cpu b/xen/arch/x86/Kconfig.cpu
index 5fb18db1aa..aaf70fb37b 100644
--- a/xen/arch/x86/Kconfig.cpu
+++ b/xen/arch/x86/Kconfig.cpu
@@ -19,4 +19,49 @@ config INTEL
 	  May be turned off in builds targetting other vendors.  Otherwise,
 	  must be enabled for Xen to work suitably on Intel platforms.
 
+config HYGON
+	bool "Support Hygon CPUs"
+	depends on AMD
+	default y
+	help
+	  Detection, tunings and quirks for Hygon platforms.
+
+	  May be turned off in builds targetting other vendors.  Otherwise,
+	  must be enabled for Xen to work suitably on Hygon platforms.
+
+
+config CENTAUR
+	bool "Support Centaur CPUs"
+	depends on INTEL
+	default y
+	help
+	  Detection, tunings and quirks for Centaur platforms.
+
+	  May be turned off in builds targetting other vendors.  Otherwise,
+	  must be enabled for Xen to work suitably on Centaur platforms.
+
+config SHANGHAI
+	bool "Support Shanghai CPUs"
+	depends on INTEL
+	default y
+	help
+	  Detection, tunings and quirks for Shanghai platforms.
+
+	  May be turned off in builds targetting other vendors.  Otherwise,
+	  must be enabled for Xen to work suitably on Shanghai platforms.
+
+config UNKNOWN_CPU
+	bool "Support unknown CPUs"
+	default y
+	help
+	  This option prevents a panic on boot when the host CPU vendor isn't
+	  supported by going into a legacy compatibility mode and not applying
+	  any relevant tunings or quirks.
+
+	  Not selecting this options while selecting multiple vendors doesn't have
+	  any major effect on code size, but while selecting a single vendor
+	  it produces a smaller build especially optimised for size.
+
+	  If unsure, say Y.
+
 endmenu
diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c
index 37820a3a08..393c30227f 100644
--- a/xen/arch/x86/cpu/common.c
+++ b/xen/arch/x86/cpu/common.c
@@ -118,7 +118,7 @@ static void cf_check default_init(struct cpuinfo_x86 * c)
 	__clear_bit(X86_FEATURE_SEP, c->x86_capability);
 }
 
-static const struct cpu_dev __initconst_cf_clobber __used default_cpu = {
+static const struct cpu_dev __initconst_cf_clobber default_cpu = {
 	.c_init	= default_init,
 };
 static struct cpu_dev __ro_after_init actual_cpu;
@@ -340,7 +340,8 @@ void __init early_cpu_init(bool verbose)
 	*(u32 *)&c->x86_vendor_id[8] = ecx;
 	*(u32 *)&c->x86_vendor_id[4] = edx;
 
-	c->x86_vendor = x86_cpuid_lookup_vendor(ebx, ecx, edx);
+	c->x86_vendor = x86_cpuid_lookup_vendor(ebx, ecx, edx) &
+	                X86_ENABLED_VENDORS;
 	switch (c->x86_vendor) {
 	case X86_VENDOR_INTEL:    intel_unlock_cpuid_leaves(c);
 				  actual_cpu = intel_cpu_dev;    break;
@@ -349,12 +350,14 @@ void __init early_cpu_init(bool verbose)
 	case X86_VENDOR_SHANGHAI: actual_cpu = shanghai_cpu_dev; break;
 	case X86_VENDOR_HYGON:    actual_cpu = hygon_cpu_dev;    break;
 	default:
+		if (verbose || !IS_ENABLED(CONFIG_UNKNOWN_CPU))
+			printk(XENLOG_ERR
+			       "Unrecognised or unsupported CPU vendor '%.12s'\n",
+			       c->x86_vendor_id);
+		if (!IS_ENABLED(CONFIG_UNKNOWN_CPU))
+			panic("Cannot run in unknown/compiled-out CPU vendor.\n");
+
 		actual_cpu = default_cpu;
-		if (!verbose)
-			break;
-		printk(XENLOG_ERR
-		       "Unrecognised or unsupported CPU vendor '%.12s'\n",
-		       c->x86_vendor_id);
 	}
 
 	cpuid(0x00000001, &eax, &ebx, &ecx, &edx);
diff --git a/xen/arch/x86/include/asm/cpuid.h b/xen/arch/x86/include/asm/cpuid.h
index f1b9e37a42..bf1c635cdd 100644
--- a/xen/arch/x86/include/asm/cpuid.h
+++ b/xen/arch/x86/include/asm/cpuid.h
@@ -49,6 +49,13 @@ struct cpuid_leaf;
 void guest_cpuid(const struct vcpu *v, uint32_t leaf,
                  uint32_t subleaf, struct cpuid_leaf *res);
 
+#define X86_ENABLED_VENDORS \
+    ((IS_ENABLED(CONFIG_INTEL)    ? X86_VENDOR_INTEL    : 0) | \
+     (IS_ENABLED(CONFIG_AMD)      ? X86_VENDOR_AMD      : 0) | \
+     (IS_ENABLED(CONFIG_CENTAUR)  ? X86_VENDOR_CENTAUR  : 0) | \
+     (IS_ENABLED(CONFIG_SHANGHAI) ? X86_VENDOR_SHANGHAI : 0) | \
+     (IS_ENABLED(CONFIG_HYGON)    ? X86_VENDOR_HYGON    : 0))
+
 #endif /* !__X86_CPUID_H__ */
 
 /*
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: Alejandro Vallejo , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" 
Subject: [RFC PATCH 05/11] x86: Conditionalise the inclusion of Hygon/Centaur/Shanghai cpu/ files
Date: Wed, 26 Nov 2025 17:44:07 +0100
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x86_vendor_is() is doing the elimination now, so we can just drop them
when the Kconfig options aren't set.

Not a functional change.

Signed-off-by: Alejandro Vallejo 
---
 xen/arch/x86/cpu/Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/cpu/Makefile b/xen/arch/x86/cpu/Makefile
index 7cfe28b7ec..84b060aa41 100644
--- a/xen/arch/x86/cpu/Makefile
+++ b/xen/arch/x86/cpu/Makefile
@@ -3,13 +3,13 @@ obj-y += microcode/
 obj-y += mtrr/
 
 obj-y += amd.o
-obj-y += centaur.o
+obj-$(CONFIG_CENTAUR) += centaur.o
 obj-y += common.o
-obj-y += hygon.o
 obj-y += intel.o
+obj-$(CONFIG_HYGON) += hygon.o
 obj-y += intel_cacheinfo.o
 obj-$(CONFIG_INTEL) += mwait-idle.o
-obj-y += shanghai.o
+obj-$(CONFIG_SHANGHAI) += shanghai.o
 obj-y += vpmu.o
 obj-$(CONFIG_AMD) += vpmu_amd.o
 obj-$(CONFIG_INTEL) += vpmu_intel.o
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: Alejandro Vallejo , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" 
Subject: [RFC PATCH 03/11] x86: Add x86_vendor_is() by itself before using it
Date: Wed, 26 Nov 2025 17:44:05 +0100
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This function is meant to replace all instances of the following
patterns in CPU policies and boot_cpu_data:

  - x->x86_vendor == X86_VENDOR_FOO
  - x->x86_vendor != X86_VENDOR_FOO
  - x->x86_vendor & (X86_VENDOR_FOO | X86_VENDOR_BAR)

The secret sauce is that all branches inside the helper resolve at
compile time, so for the all-vendors-compiled-in case the function
resolves to equivalent code as that without the helper and you get
progressively more aggressive DCE as you disable vendors. The function
folds into a constant once you remove the fallback CPU vendor setting.

While at this, move an include out of place so they sort alphabetically.

Not a functional change.

Signed-off-by: Alejandro Vallejo 
---
 xen/arch/x86/include/asm/cpuid.h | 49 +++++++++++++++++++++++++++++++-
 1 file changed, 48 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/include/asm/cpuid.h b/xen/arch/x86/include/asm/cpuid.h
index bf1c635cdd..a4280d1b0d 100644
--- a/xen/arch/x86/include/asm/cpuid.h
+++ b/xen/arch/x86/include/asm/cpuid.h
@@ -2,10 +2,12 @@
 #define __X86_CPUID_H__
 
 #include 
+#include 
 
-#include 
+#include 
 #include 
 #include 
+#include 
 
 #include 
 
@@ -56,6 +58,51 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf,
      (IS_ENABLED(CONFIG_SHANGHAI) ? X86_VENDOR_SHANGHAI : 0) | \
      (IS_ENABLED(CONFIG_HYGON)    ? X86_VENDOR_HYGON    : 0))
 
+/*
+ * When compiling Xen for a single vendor with no fallback vendor there's no
+ * need no check the candidate. `vendor` is always a compile-time constant,
+ * which means this all can fold into a constant boolean.
+ *
+ * A runtime check at the time of CPUID probing guarantees we never run on
+ * wrong hardware and another check when loading CPU policies guarantees we
+ * never run policies for a vendor in another vendor's silicon.
+ *
+ * By the same token, the same folding can happen when no vendor is compiled
+ * in and the fallback path is present.
+ */
+static always_inline bool x86_vendor_is(uint8_t candidate, uint8_t vendor)
+{
+    uint8_t filtered_vendor = vendor & X86_ENABLED_VENDORS;
+
+    if ( vendor == X86_VENDOR_UNKNOWN )
+    {
+        if ( IS_ENABLED(CONFIG_UNKNOWN_CPU) )
+            /* no-vendor optimisation */
+            return X86_ENABLED_VENDORS ? vendor == candidate : true;
+
+        /* unknown-vendor-elimination optimisation */
+        return false;
+    }
+
+    /* single-vendor optimisation */
+    if ( !IS_ENABLED(CONFIG_UNKNOWN_CPU) &&
+         (ISOLATE_LSB(X86_ENABLED_VENDORS) == X86_ENABLED_VENDORS) )
+        return filtered_vendor == X86_ENABLED_VENDORS;
+
+    /* compiled-out-vendor-elimination optimisation */
+    if ( !filtered_vendor )
+        return false;
+
+    /*
+     * When checking against a single vendor, perform an equality check, as
+     * it yields (marginally) better codegen
+     */
+    if ( ISOLATE_LSB(filtered_vendor) == filtered_vendor )
+        return filtered_vendor == candidate ;
+
+    return filtered_vendor & candidate;
+}
+
 #endif /* !__X86_CPUID_H__ */
 
 /*
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: Alejandro Vallejo , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" 
Subject: [RFC PATCH 00/11] x86 vendor check optimisations
Date: Wed, 26 Nov 2025 17:44:02 +0100
Message-ID: <20251126164419.174487-1-alejandro.garciavallejo@amd.com>
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Hi,

I'd like some input on some rather aggressive optimisations I'm after.

This is a WIP series (so, don't pay attention to bisectability just yet) to
perform aggressive DCE based on vendor checks. I've added some bloat-o-meter
outputs for the everything-enabled vs an amd-only builds for comparison. The
results are very promising.

Please focus on patch 3, as that's the key to the optimisations.

What I'm ultimately after is what I've come to call the "single-vendor
optimisation". In doing this it's fairly easy to optimise other cases too, such
as removing unused vendors and any branches they use exclusively. Please, tell
me what you think of the approach taken by the series.

  Single-vendor optimisation
  ==========================

  - If we compile Xen for a single-vendor AND
    Xen validates it always boots on such vendor AND
    We remove the default CPU path AND
    Xen sanitises guest CPU policies so they always match the boot vendor, THEN
    It's fair game to fold all vendor checks onto true/false depending on
    whether you're testing against the single vendor you compiled-in or not.
    Effectively ignoring the runtime component, and allowing DCE to perform
    eliminations left, right and center. The results are fairly dramatic in
    places like init_speculation_mitigations(). See bloat-o-meter below.

  Compiled-out-vendor elimination
  ===============================

  - If we have all possible x86 vendors described in Kconfig AND
    We compile out a vendor from Xen THEN
    It should be possible to remove such vendor from every vendor check in the
    system. Either we didn't boot it or we're using the default CPU ops anyway. 
    This causes &-checks to turn into ==- checks (more size-efficient) for
    multi-vendor checks turning into single-vendor checks, or even straight-up
    "false" when all vendors in the check are compiled out.
    This is key to enable transparent DCE-removals in multi-vendor settings.

This allows very transparent removal of all Hygon, Centaur and Shanghai code
in the system when it's not required, as it's most typically found in branches
around common x86 code gated by a runtime vendor check.

The secret sauce is a static always_inline function that operates on the
assumption that the second argument is always a constant and the first always
a variable (as it invairably is the case with these checks). It's written
carefully to fold everything into a constant for the appropriate cases. There's
a few more optimisations in the code, like a no-vendor optimisation where the
checks always return false when comparing against a non-unknown vendor when
no explicit vendor is compiled in.

Patch 1 adds the missing vendors and the default path to Kconfig, as they are
currently absent.

Patch 2 ensures consistency between host and guest CPU policies wrt CPU vendor

Patch 3 introduces the x86_vendor_is() function. This is the key.

Patch 4 migrates the early_cpu_init() vendor switch. It's a bit tricky because
it must be done compatibly with the single-vendor optimisation, but there's
nothing complex about it.

Patch 5 is simply code removal at the Makefile level for free thanks to DCE

Patches 6 through 11 is replacements of regular checks with x86_vendor_is(),
with 6 being the one with the most dramatic effect in the diffstat.

===============================================================================
                                 Bloat-o-meter
===============================================================================

all-vendors+default-path
========================

add/remove: 0/1 grow/shrink: 12/10 up/down: 175/-266 (-91)
Function                                     old     new   delta
start_vmx                                   1507    1582     +75
x86_cpu_policies_are_compatible              157     194     +37
xen_config_data                             1479    1506     +27
early_cpu_init                               948     958     +10
setup_apic_nmi_watchdog                      977     986      +9
init_speculation_mitigations                9836    9841      +5
intel_mcheck_init                           2398    2401      +3
set_cx_pminfo                               1691    1693      +2
init_bsp_APIC                                193     195      +2
guest_common_max_feature_adjustments         110     112      +2
disable_lapic_nmi_watchdog                   119     121      +2
do_get_hw_residencies                       1289    1290      +1
mce_firstbank                                 37      36      -1
mcheck_init                                 1227    1225      -2
hvm_vcpu_virtual_to_linear                   631     628      -3
init_nonfatal_mce_checker                    160     156      -4
domain_cpu_policy_changed                    677     672      -5
recalculate_misc                             898     890      -8
traps_init                                   543     527     -16
default_cpu                                   16       -     -16
cpufreq_driver_init                          468     441     -27
vmce_wrmsr                                   993     909     -84
vmce_rdmsr                                  1134    1034    -100
Total: Before=3726243, After=3726152, chg -0.00%

amd-only+no-default-path
========================

add/remove: 0/14 grow/shrink: 4/58 up/down: 93/-10948 (-10855)
Function                                     old     new   delta
x86_cpu_policies_are_compatible              157     194     +37
amd_check_entrysign                          807     829     +22
init_guest_cpu_policies                     1364    1382     +18
xen_config_data                             1471    1487     +16
opt_gds_mit                                    1       -      -1
nmi_p6_event_width                             4       -      -4
nmi_p4_cccr_val                                4       -      -4
init_e820                                   1037    1033      -4
pci_cfg_ok                                   307     301      -6
get_hw_residencies                           213     205      -8
recalculate_cpuid_policy                     909     900      -9
init_amd                                    2508    2499      -9
dom0_setup_permissions                      3809    3800      -9
arch_ioreq_server_get_type_addr              250     241      -9
cpu_has_amd_erratum                          230     219     -11
parse_spec_ctrl                             2321    2307     -14
amd_nonfatal_mcheck_init                     192     177     -15
shanghai_cpu_dev                              16       -     -16
hygon_cpu_dev                                 16       -     -16
default_init                                  16       -     -16
default_cpu                                   16       -     -16
centaur_cpu_dev                               16       -     -16
x86emul_0fae                                2758    2741     -17
vmce_init_vcpu                               153     136     -17
cpufreq_cpu_init                              34      15     -19
nmi_watchdog_tick                            534     514     -20
vmce_restore_vcpu                            160     139     -21
init_nonfatal_mce_checker                    142     120     -22
ucode_update_hcall_cont                      888     865     -23
mce_firstbank                                 37      10     -27
init_shanghai                                 29       -     -29
validate_gl4e                                617     587     -30
l4e_propagate_from_guest                     451     421     -30
guest_walk_tables_4_levels                  3411    3381     -30
clear_msr_range                               30       -     -30
acpi_dead_idle                               430     398     -32
print_mtrr_state                             719     684     -35
amd_mcheck_init                              451     416     -35
hvm_vcpu_virtual_to_linear                   631     595     -36
do_IRQ                                      1783    1747     -36
init_bsp_APIC                                193     149     -44
cpu_callback                                4650    4600     -50
mc_memerr_dhandler                           903     851     -52
mcheck_init                                 1187    1122     -65
microcode_nmi_callback                       205     139     -66
disable_lapic_nmi_watchdog                   119      49     -70
__start_xen                                 9448    9378     -70
alternative_instructions                     154      82     -72
traps_init                                   543     468     -75
protmode_load_seg                           1904    1829     -75
set_cx_pminfo                               1691    1614     -77
init_intel_cacheinfo                        1191    1111     -80
is_cpu_primary                                93       -     -93
do_mca                                      3181    3085     -96
guest_cpuid                                 2395    2292    -103
guest_common_max_feature_adjustments         110       -    -110
read_msr                                    1431    1319    -112
x86emul_decode                             12729   12597    -132
guest_common_default_feature_adjustments     232      62    -170
do_microcode_update                          787     602    -185
cpufreq_driver_init                          453     263    -190
vmce_wrmsr                                   967     768    -199
recalculate_misc                             898     689    -209
vmce_rdmsr                                  1083     872    -211
early_cpu_init                               948     732    -216
guest_wrmsr                                 2853    2622    -231
init_centaur                                 238       -    -238
domain_cpu_policy_changed                    677     408    -269
write_msr                                   1749    1465    -284
x86_emulate                               222198  221891    -307
init_hygon                                   389       -    -389
start_vmx                                   1507    1105    -402
guest_rdmsr                                 2308    1881    -427
setup_apic_nmi_watchdog                      977     276    -701
do_get_hw_residencies                       1289       9   -1280
init_speculation_mitigations                9714    6788   -2926
Total: Before=3679044, After=3668189, chg -0.30%

There's a few more patches needed to add conditional inclusion of amd.c and
intel.c at the Makefile level, but that can be done just as well. It just adds
5 patches worth of noise I don't want to discuss atm.

Just knowing x86_vendor_is() is "good to have" is good enough as it enables our
downstream to customise it with whatever optimisations we need.

I also suspect other areas of the hypervisor could benefit from this meld of
runtime+compiletime sort of checking, allowing transparent code removal.

I'm thinking DOM0LESS_BOOT vs DOM0_BOOT vs PVSHIM_BOOT, or AMD_SVM vs INTEL_VMX
in HVM-only builds, or family checks to have (i.e) a explicit "older-than-zen"
Kconfig option with a similar approach on a family range check.

This is maybe one of several such uses.

So... thoughts? I'm definitely fond of the single-vendor bloat-o-meter output.

Cheers,
Alejandro

Alejandro Vallejo (11):
  x86: Add more granularity to the vendors in Kconfig
  x86: Reject CPU policies with vendors other than the host's
  x86: Add x86_vendor_is() by itself before using it
  x86: Refactor early vendor lookup code to use x86_vendor_is()
  x86: Conditionalise the inclusion of Hygon/Centaur/Shanghai cpu/ files
  x86: Migrate switch-based vendor checks to x86_vendor_is()
  x86: Migrate MSR handler vendor checks to x86_vendor_is()
  x86: Migrate insn emulator to use x86_vendor_is()
  x86: Migrate spec_ctrl vendor checks to x86_vendor_is()
  x86: Migrate everything under cpu/ to use x86_vendor_is()
  x86: Migrate every remaining raw vendor check to x86_vendor_is()

 xen/arch/x86/Kconfig.cpu               | 45 +++++++++++++++++++++
 xen/arch/x86/acpi/cpu_idle.c           | 19 ++++-----
 xen/arch/x86/acpi/cpufreq/acpi.c       |  2 +-
 xen/arch/x86/acpi/cpufreq/cpufreq.c    | 32 +++++----------
 xen/arch/x86/alternative.c             | 30 ++++++--------
 xen/arch/x86/apic.c                    |  2 +-
 xen/arch/x86/cpu-policy.c              | 41 +++++++++----------
 xen/arch/x86/cpu/Makefile              |  6 +--
 xen/arch/x86/cpu/amd.c                 |  6 +--
 xen/arch/x86/cpu/common.c              | 50 +++++++++++++++--------
 xen/arch/x86/cpu/intel_cacheinfo.c     |  5 +--
 xen/arch/x86/cpu/mcheck/amd_nonfatal.c |  2 +-
 xen/arch/x86/cpu/mcheck/mcaction.c     |  3 +-
 xen/arch/x86/cpu/mcheck/mce.c          | 41 +++++--------------
 xen/arch/x86/cpu/mcheck/mce.h          | 20 +++++----
 xen/arch/x86/cpu/mcheck/mce_amd.c      |  6 +--
 xen/arch/x86/cpu/mcheck/mce_intel.c    |  6 +--
 xen/arch/x86/cpu/mcheck/non-fatal.c    | 20 +++------
 xen/arch/x86/cpu/mcheck/vmce.c         | 50 ++++++-----------------
 xen/arch/x86/cpu/microcode/amd.c       |  2 +-
 xen/arch/x86/cpu/microcode/core.c      |  2 +-
 xen/arch/x86/cpu/mtrr/generic.c        |  4 +-
 xen/arch/x86/cpu/mwait-idle.c          |  4 +-
 xen/arch/x86/cpuid.c                   |  4 +-
 xen/arch/x86/dom0_build.c              |  3 +-
 xen/arch/x86/domain.c                  | 37 ++++++++---------
 xen/arch/x86/e820.c                    |  3 +-
 xen/arch/x86/guest/xen/xen.c           | 19 ++++-----
 xen/arch/x86/hvm/hvm.c                 |  5 ++-
 xen/arch/x86/hvm/ioreq.c               |  2 +-
 xen/arch/x86/hvm/vmx/vmx.c             |  6 +--
 xen/arch/x86/include/asm/cpuid.h       | 56 +++++++++++++++++++++++++-
 xen/arch/x86/include/asm/guest_pt.h    |  4 +-
 xen/arch/x86/irq.c                     |  4 +-
 xen/arch/x86/msr.c                     | 41 ++++++++++---------
 xen/arch/x86/nmi.c                     | 18 +++------
 xen/arch/x86/pv/emul-priv-op.c         | 24 +++++------
 xen/arch/x86/setup.c                   |  2 +-
 xen/arch/x86/spec_ctrl.c               | 34 ++++++++--------
 xen/arch/x86/traps-setup.c             | 18 ++++-----
 xen/arch/x86/x86_emulate/private.h     |  4 +-
 xen/arch/x86/x86_emulate/x86_emulate.c |  2 +-
 xen/lib/x86/policy.c                   |  3 +-
 43 files changed, 360 insertions(+), 327 deletions(-)


base-commit: fb0e37df71a31318c61e0715ffed3e149ca8a4aa
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: Alejandro Vallejo , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" 
Subject: [RFC PATCH 06/11] x86: Migrate switch-based vendor checks to x86_vendor_is()
Date: Wed, 26 Nov 2025 17:44:08 +0100
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This enables each branch to be optimised-out when the vendor isn't
enabled in Kconfig and combines N checks into 1 for the strict fallthrough
cases.

Plus, the diffstat looks fantastic and we save tons of vertical space.

Signed-off-by: Alejandro Vallejo 
---
 xen/arch/x86/acpi/cpufreq/cpufreq.c | 28 ++++++------------
 xen/arch/x86/alternative.c          | 30 ++++++++-----------
 xen/arch/x86/cpu-policy.c           | 31 ++++++++-----------
 xen/arch/x86/cpu/mcheck/mce.c       | 27 +++--------------
 xen/arch/x86/cpu/mcheck/mce.h       | 20 ++++++-------
 xen/arch/x86/cpu/mcheck/non-fatal.c | 20 ++++---------
 xen/arch/x86/cpu/mcheck/vmce.c      | 46 +++++++----------------------
 xen/arch/x86/domain.c               | 12 ++++----
 xen/arch/x86/guest/xen/xen.c        | 19 +++++-------
 xen/arch/x86/nmi.c                  | 18 ++++-------
 xen/arch/x86/traps-setup.c          | 18 +++++------
 11 files changed, 87 insertions(+), 182 deletions(-)

diff --git a/xen/arch/x86/acpi/cpufreq/cpufreq.c b/xen/arch/x86/acpi/cpufreq/cpufreq.c
index 94e8e11c15..89e2b3d167 100644
--- a/xen/arch/x86/acpi/cpufreq/cpufreq.c
+++ b/xen/arch/x86/acpi/cpufreq/cpufreq.c
@@ -135,20 +135,17 @@ static int __init cf_check cpufreq_driver_init(void)
 
         ret = -ENOENT;
 
-        switch ( boot_cpu_data.x86_vendor )
+        if ( x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) )
         {
-        case X86_VENDOR_INTEL:
             for ( i = 0; i < cpufreq_xen_cnt; i++ )
             {
                 switch ( cpufreq_xen_opts[i] )
                 {
                 case CPUFREQ_xen:
-                    ret = IS_ENABLED(CONFIG_INTEL) ?
-                          acpi_cpufreq_register() : -ENODEV;
+                    ret = acpi_cpufreq_register();
                     break;
                 case CPUFREQ_hwp:
-                    ret = IS_ENABLED(CONFIG_INTEL) ?
-                          hwp_register_driver() : -ENODEV;
+                    ret = hwp_register_driver();
                     break;
                 case CPUFREQ_none:
                     ret = 0;
@@ -163,11 +160,10 @@ static int __init cf_check cpufreq_driver_init(void)
                 if ( !ret || ret == -EBUSY )
                     break;
             }
-            break;
-
-        case X86_VENDOR_AMD:
-        case X86_VENDOR_HYGON:
-#ifdef CONFIG_AMD
+        }
+        else if ( x86_vendor_is(boot_cpu_data.x86_vendor,
+                                X86_VENDOR_AMD | X86_VENDOR_HYGON) )
+        {
             for ( i = 0; i < cpufreq_xen_cnt; i++ )
             {
                 switch ( cpufreq_xen_opts[i] )
@@ -193,15 +189,9 @@ static int __init cf_check cpufreq_driver_init(void)
                 if ( !ret || ret == -EBUSY )
                     break;
             }
-#else
-            ret = -ENODEV;
-#endif /* CONFIG_AMD */
-            break;
-
-        default:
-            printk(XENLOG_ERR "Cpufreq: unsupported x86 vendor\n");
-            break;
         }
+        else
+            printk(XENLOG_ERR "Cpufreq: unsupported x86 vendor\n");
 
         /*
          * After successful cpufreq driver registeration, XEN_PROCESSOR_PM_CPPC
diff --git a/xen/arch/x86/alternative.c b/xen/arch/x86/alternative.c
index 9f844241bc..071871c242 100644
--- a/xen/arch/x86/alternative.c
+++ b/xen/arch/x86/alternative.c
@@ -89,32 +89,28 @@ static bool init_or_livepatch_read_mostly toolchain_nops_are_ideal;
 
 static void __init arch_init_ideal_nops(void)
 {
-    switch ( boot_cpu_data.x86_vendor )
+    if ( x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) )
     {
-    case X86_VENDOR_INTEL:
         /*
          * Due to a decoder implementation quirk, some specific Intel CPUs
          * actually perform better with the "k8_nops" than with the SDM-
          * recommended NOPs.
          */
-        if ( boot_cpu_data.x86 != 6 )
-            break;
-
-        switch ( boot_cpu_data.x86_model )
+        if ( boot_cpu_data.x86 == 6 )
         {
-        case 0x0f ... 0x1b:
-        case 0x1d ... 0x25:
-        case 0x28 ... 0x2f:
-            ideal_nops = k8_nops;
-            break;
+            switch ( boot_cpu_data.x86_model )
+            {
+            case 0x0f ... 0x1b:
+            case 0x1d ... 0x25:
+            case 0x28 ... 0x2f:
+                ideal_nops = k8_nops;
+                break;
+            }
         }
-        break;
-
-    case X86_VENDOR_AMD:
-        if ( boot_cpu_data.x86 <= 0xf )
-            ideal_nops = k8_nops;
-        break;
     }
+    else if ( x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_AMD) &&
+              (boot_cpu_data.x86 <= 0xf) )
+        ideal_nops = k8_nops;
 
 #ifdef HAVE_AS_NOPS_DIRECTIVE
     if ( memcmp(ideal_nops[ASM_NOP_MAX], toolchain_nops, ASM_NOP_MAX) == 0 )
diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c
index 0a7ef15f72..1acd7c5124 100644
--- a/xen/arch/x86/cpu-policy.c
+++ b/xen/arch/x86/cpu-policy.c
@@ -279,9 +279,8 @@ static void recalculate_misc(struct cpu_policy *p)
 
     p->extd.raw[0x8].d = 0;
 
-    switch ( p->x86_vendor )
+    if ( x86_vendor_is(p->x86_vendor, X86_VENDOR_INTEL) )
     {
-    case X86_VENDOR_INTEL:
         p->basic.l2_nr_queries = 1; /* Fixed to 1 query. */
         p->basic.raw[0x3] = EMPTY_LEAF; /* PSN - always hidden. */
         p->basic.raw[0x9] = EMPTY_LEAF; /* DCA - always hidden. */
@@ -297,10 +296,9 @@ static void recalculate_misc(struct cpu_policy *p)
 
         p->extd.raw[0x8].a &= 0x0000ffff;
         p->extd.raw[0x8].c = 0;
-        break;
-
-    case X86_VENDOR_AMD:
-    case X86_VENDOR_HYGON:
+    }
+    else if ( x86_vendor_is(p->x86_vendor, X86_VENDOR_AMD | X86_VENDOR_HYGON) )
+    {
         zero_leaves(p->basic.raw, 0x2, 0x3);
         memset(p->cache.raw, 0, sizeof(p->cache.raw));
         zero_leaves(p->basic.raw, 0x9, 0xa);
@@ -331,7 +329,6 @@ static void recalculate_misc(struct cpu_policy *p)
         p->extd.raw[0x20] = EMPTY_LEAF; /* Platform QoS */
         p->extd.raw[0x21].b = 0;
         p->extd.raw[0x21].d = 0;
-        break;
     }
 }
 
@@ -416,9 +413,8 @@ static void __init guest_common_default_leaves(struct cpu_policy *p)
 
 static void __init guest_common_max_feature_adjustments(uint32_t *fs)
 {
-    switch ( boot_cpu_data.vendor )
+    if ( x86_vendor_is(boot_cpu_data.vendor, X86_VENDOR_INTEL) )
     {
-    case X86_VENDOR_INTEL:
         /*
          * MSR_ARCH_CAPS is just feature data, and we can offer it to guests
          * unconditionally, although limit it to Intel systems as it is highly
@@ -477,9 +473,9 @@ static void __init guest_common_max_feature_adjustments(uint32_t *fs)
          */
         if ( test_bit(X86_FEATURE_RTM, fs) )
             __set_bit(X86_FEATURE_RTM_ALWAYS_ABORT, fs);
-        break;
-
-    case X86_VENDOR_AMD:
+    }
+    else if ( x86_vendor_is(boot_cpu_data.vendor, X86_VENDOR_AMD) )
+    {
         /*
          * This bit indicates that the VERW instruction may have gained
          * scrubbing side effects.  With pooling, it means "you might migrate
@@ -488,7 +484,6 @@ static void __init guest_common_max_feature_adjustments(uint32_t *fs)
          * has been around since the 286.
          */
         __set_bit(X86_FEATURE_VERW_CLEAR, fs);
-        break;
     }
 
     /*
@@ -510,9 +505,8 @@ static void __init guest_common_max_feature_adjustments(uint32_t *fs)
 
 static void __init guest_common_default_feature_adjustments(uint32_t *fs)
 {
-    switch ( boot_cpu_data.vendor )
+    if ( x86_vendor_is(boot_cpu_data.vendor, X86_VENDOR_INTEL) )
     {
-    case X86_VENDOR_INTEL:
         /*
          * IvyBridge client parts suffer from leakage of RDRAND data due to SRBDS
          * (XSA-320 / CVE-2020-0543), and won't be receiving microcode to
@@ -570,9 +564,9 @@ static void __init guest_common_default_feature_adjustments(uint32_t *fs)
             __clear_bit(X86_FEATURE_RTM, fs);
             __set_bit(X86_FEATURE_RTM_ALWAYS_ABORT, fs);
         }
-        break;
-
-    case X86_VENDOR_AMD:
+    }
+    else if ( x86_vendor_is(boot_cpu_data.vendor, X86_VENDOR_AMD) )
+    {
         /*
          * This bit indicate that the VERW instruction may have gained
          * scrubbing side effects.  The max policy has it set for migration
@@ -581,7 +575,6 @@ static void __init guest_common_default_feature_adjustments(uint32_t *fs)
          */
         if ( !cpu_has_verw_clear )
             __clear_bit(X86_FEATURE_VERW_CLEAR, fs);
-        break;
     }
 
     /*
diff --git a/xen/arch/x86/cpu/mcheck/mce.c b/xen/arch/x86/cpu/mcheck/mce.c
index 9277781bff..9bef1da385 100644
--- a/xen/arch/x86/cpu/mcheck/mce.c
+++ b/xen/arch/x86/cpu/mcheck/mce.c
@@ -766,30 +766,11 @@ void mcheck_init(struct cpuinfo_x86 *c, bool bsp)
     else if ( cpu_bank_alloc(cpu) )
         panic("Insufficient memory for MCE bank allocations\n");
 
-    switch ( c->x86_vendor )
-    {
-#ifdef CONFIG_AMD
-    case X86_VENDOR_AMD:
-    case X86_VENDOR_HYGON:
+    if ( x86_vendor_is(c->x86_vendor, X86_VENDOR_AMD | X86_VENDOR_HYGON) )
         inited = amd_mcheck_init(c, bsp);
-        break;
-#endif
-
-#ifdef CONFIG_INTEL
-    case X86_VENDOR_INTEL:
-        switch ( c->x86 )
-        {
-        case 6:
-        case 15:
-            inited = intel_mcheck_init(c, bsp);
-            break;
-        }
-        break;
-#endif
-
-    default:
-        break;
-    }
+    else if ( x86_vendor_is(c->x86_vendor, X86_VENDOR_INTEL) &&
+              (c->x86 == 6 || c->x86 == 15) )
+        inited = intel_mcheck_init(c, bsp);
 
     show_mca_info(inited, c);
     if ( inited == mcheck_none || inited == mcheck_unset )
diff --git a/xen/arch/x86/cpu/mcheck/mce.h b/xen/arch/x86/cpu/mcheck/mce.h
index 920b075355..14261f925b 100644
--- a/xen/arch/x86/cpu/mcheck/mce.h
+++ b/xen/arch/x86/cpu/mcheck/mce.h
@@ -137,28 +137,26 @@ void x86_mcinfo_dump(struct mc_info *mi);
 
 static inline int mce_vendor_bank_msr(const struct vcpu *v, uint32_t msr)
 {
-    switch (boot_cpu_data.x86_vendor) {
-    case X86_VENDOR_INTEL:
+    if ( x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) )
+    {
         if (msr >= MSR_IA32_MC0_CTL2 &&
             msr < MSR_IA32_MCx_CTL2(v->arch.vmce.mcg_cap & MCG_CAP_COUNT) )
             return 1;
-        fallthrough;
-
-    case X86_VENDOR_CENTAUR:
-    case X86_VENDOR_SHANGHAI:
-        if (msr == MSR_P5_MC_ADDR || msr == MSR_P5_MC_TYPE)
+        if ( x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_CENTAUR |
+                                                     X86_VENDOR_SHANGHAI) &&
+             (msr == MSR_P5_MC_ADDR || msr == MSR_P5_MC_TYPE) )
             return 1;
-        break;
-
-    case X86_VENDOR_AMD:
+    }
+    else if ( x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_AMD) )
+    {
         switch (msr) {
         case MSR_F10_MC4_MISC1:
         case MSR_F10_MC4_MISC2:
         case MSR_F10_MC4_MISC3:
             return 1;
         }
-        break;
     }
+
     return 0;
 }
 
diff --git a/xen/arch/x86/cpu/mcheck/non-fatal.c b/xen/arch/x86/cpu/mcheck/non-fatal.c
index a9ee9bb94f..db0ddc5b7b 100644
--- a/xen/arch/x86/cpu/mcheck/non-fatal.c
+++ b/xen/arch/x86/cpu/mcheck/non-fatal.c
@@ -23,25 +23,15 @@ static int __init cf_check init_nonfatal_mce_checker(void)
 	/*
 	 * Check for non-fatal errors every MCE_RATE s
 	 */
-	switch (c->x86_vendor) {
-#ifdef CONFIG_AMD
-	case X86_VENDOR_AMD:
-	case X86_VENDOR_HYGON:
+	if ( x86_vendor_is(c->x86_vendor, X86_VENDOR_AMD | X86_VENDOR_HYGON) )
 		/* Assume we are on K8 or newer AMD or Hygon CPU here */
 		amd_nonfatal_mcheck_init(c);
-		break;
-#endif
-
-#ifdef CONFIG_INTEL
-	case X86_VENDOR_INTEL:
+	else if ( x86_vendor_is(c->x86_vendor, X86_VENDOR_INTEL) )
 		intel_nonfatal_mcheck_init(c);
-		break;
-#endif
-
-	default:
-		/* unhandled vendor isn't really an error */
+	else
+		 /* unhandled vendor isn't really an error */
 		return 0;
-	}
+
 	printk(KERN_INFO "mcheck_poll: Machine check polling timer started.\n");
 	return 0;
 }
diff --git a/xen/arch/x86/cpu/mcheck/vmce.c b/xen/arch/x86/cpu/mcheck/vmce.c
index 1a7e92506a..dd1ccecfe5 100644
--- a/xen/arch/x86/cpu/mcheck/vmce.c
+++ b/xen/arch/x86/cpu/mcheck/vmce.c
@@ -136,27 +136,14 @@ static int bank_mce_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val)
         break;
 
     default:
-        switch ( boot_cpu_data.x86_vendor )
-        {
-#ifdef CONFIG_INTEL
-        case X86_VENDOR_CENTAUR:
-        case X86_VENDOR_SHANGHAI:
-        case X86_VENDOR_INTEL:
+        ret = 0;
+        if ( x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_CENTAUR  |
+                                                     X86_VENDOR_SHANGHAI |
+                                                     X86_VENDOR_INTEL) )
             ret = vmce_intel_rdmsr(v, msr, val);
-            break;
-#endif
-
-#ifdef CONFIG_AMD
-        case X86_VENDOR_AMD:
-        case X86_VENDOR_HYGON:
+        else if ( x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_AMD |
+                                                          X86_VENDOR_HYGON) )
             ret = vmce_amd_rdmsr(v, msr, val);
-            break;
-#endif
-
-        default:
-            ret = 0;
-            break;
-        }
         break;
     }
 
@@ -273,25 +260,12 @@ static int bank_mce_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val)
         break;
 
     default:
-        switch ( boot_cpu_data.x86_vendor )
-        {
-#ifdef CONFIG_INTEL
-        case X86_VENDOR_INTEL:
+        ret = 0;
+        if ( x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) )
             ret = vmce_intel_wrmsr(v, msr, val);
-            break;
-#endif
-
-#ifdef CONFIG_AMD
-        case X86_VENDOR_AMD:
-        case X86_VENDOR_HYGON:
+        else if ( x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_AMD |
+                                                          X86_VENDOR_HYGON) )
             ret = vmce_amd_wrmsr(v, msr, val);
-            break;
-#endif
-
-        default:
-            ret = 0;
-            break;
-        }
         break;
     }
 
diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index 3a21e035f4..f3e4ae4a4d 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -319,9 +319,8 @@ void domain_cpu_policy_changed(struct domain *d)
             if ( cpu_has_htt )
                 edx |= cpufeat_mask(X86_FEATURE_HTT);
 
-            switch ( boot_cpu_data.x86_vendor )
+            if ( x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) )
             {
-            case X86_VENDOR_INTEL:
                 /*
                  * Intel masking MSRs are documented as AND masks.
                  * Experimentally, they are applied after OSXSAVE and APIC
@@ -336,10 +335,10 @@ void domain_cpu_policy_changed(struct domain *d)
                 edx = cpufeat_mask(X86_FEATURE_APIC);
 
                 mask |= ((uint64_t)edx << 32) | ecx;
-                break;
-
-            case X86_VENDOR_AMD:
-            case X86_VENDOR_HYGON:
+            }
+            else if ( x86_vendor_is(boot_cpu_data.x86_vendor,
+                                    X86_VENDOR_AMD | X86_VENDOR_HYGON) )
+            {
                 mask &= ((uint64_t)ecx << 32) | edx;
 
                 /*
@@ -362,7 +361,6 @@ void domain_cpu_policy_changed(struct domain *d)
                     ecx |= cpufeat_mask(X86_FEATURE_HYPERVISOR);
 
                 mask |= ((uint64_t)ecx << 32) | edx;
-                break;
             }
 
             d->arch.pv.cpuidmasks->_1cd = mask;
diff --git a/xen/arch/x86/guest/xen/xen.c b/xen/arch/x86/guest/xen/xen.c
index 77a3a8742a..7802b5f506 100644
--- a/xen/arch/x86/guest/xen/xen.c
+++ b/xen/arch/x86/guest/xen/xen.c
@@ -59,23 +59,18 @@ void asmlinkage __init early_hypercall_setup(void)
         boot_cpu_data.x86_vendor = x86_cpuid_lookup_vendor(ebx, ecx, edx);
     }
 
-    switch ( boot_cpu_data.x86_vendor )
+    if ( x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL   |
+                                                 X86_VENDOR_CENTAUR |
+                                                 X86_VENDOR_SHANGHAI) )
     {
-    case X86_VENDOR_INTEL:
-    case X86_VENDOR_CENTAUR:
-    case X86_VENDOR_SHANGHAI:
         early_hypercall_insn = 0;
         setup_force_cpu_cap(X86_FEATURE_USE_VMCALL);
-        break;
-
-    case X86_VENDOR_AMD:
-    case X86_VENDOR_HYGON:
+    }
+    else if ( x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_AMD |
+                                                      X86_VENDOR_HYGON) )
         early_hypercall_insn = 1;
-        break;
-
-    default:
+    else
         BUG();
-    }
 }
 
 static void __init find_xen_leaves(void)
diff --git a/xen/arch/x86/nmi.c b/xen/arch/x86/nmi.c
index a0c9194ff0..a35e7109fe 100644
--- a/xen/arch/x86/nmi.c
+++ b/xen/arch/x86/nmi.c
@@ -216,11 +216,10 @@ void disable_lapic_nmi_watchdog(void)
 {
     if (nmi_active <= 0)
         return;
-    switch (boot_cpu_data.x86_vendor) {
-    case X86_VENDOR_AMD:
+    if ( x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_AMD) )
         wrmsrns(MSR_K7_EVNTSEL0, 0);
-        break;
-    case X86_VENDOR_INTEL:
+    else if ( x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) )
+    {
         switch (boot_cpu_data.x86) {
         case 6:
             wrmsrns(MSR_P6_EVNTSEL(0), 0);
@@ -230,7 +229,6 @@ void disable_lapic_nmi_watchdog(void)
             wrmsr(MSR_P4_CRU_ESCR0, 0);
             break;
         }
-        break;
     }
     nmi_active = -1;
     /* tell do_nmi() and others that we're not active any more */
@@ -387,13 +385,10 @@ void setup_apic_nmi_watchdog(void)
     if ( nmi_watchdog == NMI_NONE )
         return;
 
-    switch ( boot_cpu_data.x86_vendor )
-    {
-    case X86_VENDOR_AMD:
+    if ( x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_AMD) )
         setup_k7_watchdog();
-        break;
-
-    case X86_VENDOR_INTEL:
+    else if ( x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) )
+    {
         switch (boot_cpu_data.x86) {
         case 6:
             setup_p6_watchdog((boot_cpu_data.x86_model < 14) 
@@ -404,7 +399,6 @@ void setup_apic_nmi_watchdog(void)
             setup_p4_watchdog();
             break;
         }
-        break;
     }
 
     if ( nmi_perfctr_msr == 0 )
diff --git a/xen/arch/x86/traps-setup.c b/xen/arch/x86/traps-setup.c
index d77be8f839..83070b050a 100644
--- a/xen/arch/x86/traps-setup.c
+++ b/xen/arch/x86/traps-setup.c
@@ -243,19 +243,15 @@ static void __init init_ler(void)
      * Intel Pentium 4 is the only known CPU to not use the architectural MSR
      * indicies.
      */
-    switch ( boot_cpu_data.x86_vendor )
+    if ( x86_vendor_is(boot_cpu_data.x86_vendor,
+                       X86_VENDOR_INTEL | X86_VENDOR_AMD | X86_VENDOR_HYGON) )
     {
-    case X86_VENDOR_INTEL:
-        if ( boot_cpu_data.x86 == 0xf )
-        {
+        if ( x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) &&
+             (boot_cpu_data.x86 == 0xf) )
             msr = MSR_P4_LER_FROM_LIP;
-            break;
-        }
-        fallthrough;
-    case X86_VENDOR_AMD:
-    case X86_VENDOR_HYGON:
-        msr = MSR_IA32_LASTINTFROMIP;
-        break;
+        else if ( x86_vendor_is(boot_cpu_data.x86_vendor,
+                                X86_VENDOR_AMD | X86_VENDOR_HYGON) )
+            msr = MSR_IA32_LASTINTFROMIP;
     }
 
     if ( msr == 0 )
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: Alejandro Vallejo , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" 
Subject: [RFC PATCH 09/11] x86: Migrate spec_ctrl vendor checks to x86_vendor_is()
Date: Wed, 26 Nov 2025 17:44:11 +0100
Message-ID: <20251126164419.174487-10-alejandro.garciavallejo@amd.com>
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This is the file with the most dramatic effect in terms of DCE, so
single it out here.

Signed-off-by: Alejandro Vallejo 
---
 xen/arch/x86/spec_ctrl.c | 34 +++++++++++++++++-----------------
 1 file changed, 17 insertions(+), 17 deletions(-)

diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index e71f62c601..a464c88908 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -388,7 +388,7 @@ int8_t __ro_after_init opt_xpti_domu = -1;
 
 static __init void xpti_init_default(void)
 {
-    if ( (boot_cpu_data.vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ||
+    if ( (x86_vendor_is(boot_cpu_data.vendor, X86_VENDOR_AMD | X86_VENDOR_HYGON)) ||
          cpu_has_rdcl_no )
     {
         if ( opt_xpti_hwdom < 0 )
@@ -712,7 +712,7 @@ static bool __init check_smt_enabled(void)
      * At the time of writing, it is almost completely undocumented, so isn't
      * virtualised reliably.
      */
-    if ( boot_cpu_data.vendor == X86_VENDOR_INTEL &&
+    if ( x86_vendor_is(boot_cpu_data.vendor, X86_VENDOR_INTEL) &&
          boot_cpu_data.family != 0xf && !cpu_has_hypervisor &&
          !rdmsr_safe(MSR_INTEL_CORE_THREAD_COUNT, &val) )
         return (MASK_EXTR(val, MSR_CTC_CORE_MASK) !=
@@ -738,10 +738,10 @@ static bool __init retpoline_calculations(void)
     unsigned int ucode_rev = this_cpu(cpu_sig).rev;
     bool safe = false;
 
-    if ( boot_cpu_data.vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) )
+    if ( x86_vendor_is(boot_cpu_data.vendor, X86_VENDOR_AMD | X86_VENDOR_HYGON) )
         return true;
 
-    if ( boot_cpu_data.vendor != X86_VENDOR_INTEL ||
+    if ( !x86_vendor_is(boot_cpu_data.vendor, X86_VENDOR_INTEL) ||
          boot_cpu_data.family != 6 )
         return false;
 
@@ -938,7 +938,7 @@ static bool __init retpoline_calculations(void)
  */
 static bool __init rsb_is_full_width(void)
 {
-    if ( boot_cpu_data.vendor != X86_VENDOR_INTEL ||
+    if ( !x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) ||
          boot_cpu_data.family != 6 )
         return true;
 
@@ -966,7 +966,7 @@ static bool __init should_use_eager_fpu(void)
      * Assume all unrecognised processors are ok.  This is only known to
      * affect Intel Family 6 processors.
      */
-    if ( boot_cpu_data.vendor != X86_VENDOR_INTEL ||
+    if ( !x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) ||
          boot_cpu_data.family != 6 )
         return false;
 
@@ -1033,7 +1033,7 @@ static bool __init should_use_eager_fpu(void)
  */
 static void __init srso_calculations(bool hw_smt_enabled)
 {
-    if ( !(boot_cpu_data.vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) )
+    if ( !x86_vendor_is(boot_cpu_data.vendor, X86_VENDOR_AMD | X86_VENDOR_HYGON) )
         return;
 
     /*
@@ -1099,7 +1099,7 @@ static void __init srso_calculations(bool hw_smt_enabled)
  */
 static bool __init has_div_vuln(void)
 {
-    if ( !(boot_cpu_data.vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) )
+    if ( !x86_vendor_is(boot_cpu_data.vendor, X86_VENDOR_AMD | X86_VENDOR_HYGON) )
         return false;
 
     if ( boot_cpu_data.family != 0x17 && boot_cpu_data.family != 0x18 )
@@ -1137,7 +1137,7 @@ static void __init ibpb_calculations(void)
         return;
     }
 
-    if ( boot_cpu_data.vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) )
+    if ( x86_vendor_is(boot_cpu_data.vendor, X86_VENDOR_AMD | X86_VENDOR_HYGON) )
     {
         /*
          * AMD/Hygon CPUs to date (June 2022) don't flush the RAS.  Future
@@ -1222,7 +1222,7 @@ static __init void l1tf_calculations(void)
     l1d_maxphysaddr = paddr_bits;
 
     /* L1TF is only known to affect Intel Family 6 processors at this time. */
-    if ( boot_cpu_data.vendor == X86_VENDOR_INTEL &&
+    if ( x86_vendor_is(boot_cpu_data.vendor, X86_VENDOR_INTEL) &&
          boot_cpu_data.family == 6 )
     {
         switch ( boot_cpu_data.model )
@@ -1358,7 +1358,7 @@ static __init void l1tf_calculations(void)
 static __init void mds_calculations(void)
 {
     /* MDS is only known to affect Intel Family 6 processors at this time. */
-    if ( boot_cpu_data.vendor != X86_VENDOR_INTEL ||
+    if ( !x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) ||
          boot_cpu_data.family != 6 )
         return;
 
@@ -1469,7 +1469,7 @@ static __init void mds_calculations(void)
 static void __init rfds_calculations(void)
 {
     /* RFDS is only known to affect Intel Family 6 processors at this time. */
-    if ( boot_cpu_data.vendor != X86_VENDOR_INTEL ||
+    if ( !x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) ||
          boot_cpu_data.family != 6 )
         return;
 
@@ -1535,7 +1535,7 @@ static void __init tsa_calculations(void)
     unsigned int curr_rev, min_rev;
 
     /* TSA is only known to affect AMD processors at this time. */
-    if ( boot_cpu_data.vendor != X86_VENDOR_AMD )
+    if ( !x86_vendor_is(boot_cpu_data.vendor, X86_VENDOR_AMD) )
         return;
 
     /* If we're virtualised, don't attempt to synthesise anything. */
@@ -1659,7 +1659,7 @@ static void __init gds_calculations(void)
     bool cpu_has_bug_gds, mitigated = false;
 
     /* GDS is only known to affect Intel Family 6 processors at this time. */
-    if ( boot_cpu_data.vendor != X86_VENDOR_INTEL ||
+    if ( !x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) ||
          boot_cpu_data.family != 6 )
         return;
 
@@ -1754,7 +1754,7 @@ static void __init gds_calculations(void)
 static bool __init cpu_has_bug_bhi(void)
 {
     /* BHI is only known to affect Intel Family 6 processors at this time. */
-    if ( boot_cpu_data.vendor != X86_VENDOR_INTEL ||
+    if ( !x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) ||
          boot_cpu_data.family != 6 )
         return false;
 
@@ -1878,7 +1878,7 @@ static void __init its_calculations(void)
         return;
 
     /* ITS is only known to affect Intel processors at this time. */
-    if ( boot_cpu_data.vendor != X86_VENDOR_INTEL )
+    if ( !x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) )
         return;
 
     /*
@@ -2181,7 +2181,7 @@ void __init init_speculation_mitigations(void)
          * before going idle is less overhead than flushing on PV entry.
          */
         if ( !opt_rsb_pv && hw_smt_enabled &&
-             (boot_cpu_data.vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) &&
+             x86_vendor_is(boot_cpu_data.vendor, X86_VENDOR_AMD | X86_VENDOR_HYGON) &&
              (boot_cpu_data.family == 0x17 || boot_cpu_data.family == 0x18) )
             setup_force_cpu_cap(X86_FEATURE_SC_RSB_IDLE);
     }
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: Alejandro Vallejo , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" 
Subject: [RFC PATCH 07/11] x86: Migrate MSR handler vendor checks to x86_vendor_is()
Date: Wed, 26 Nov 2025 17:44:09 +0100
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Many handlers are vendor-specific and are currently gated on runtime
checks. If we migrate those to x86_vendor_is() they will effectively
cause the ellision of handling code for CPU vendors not compiled in.

Not a functional change.

Signed-off-by: Alejandro Vallejo 
---
 xen/arch/x86/msr.c | 41 +++++++++++++++++++++++------------------
 1 file changed, 23 insertions(+), 18 deletions(-)

diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c
index ad75a2e108..f022332971 100644
--- a/xen/arch/x86/msr.c
+++ b/xen/arch/x86/msr.c
@@ -157,8 +157,9 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val)
          * The MSR has existed on all Intel parts since before the 64bit days,
          * and is implemented by other vendors.
          */
-        if ( !(cp->x86_vendor & (X86_VENDOR_INTEL | X86_VENDOR_CENTAUR |
-                                 X86_VENDOR_SHANGHAI)) )
+        if ( !x86_vendor_is(cp->x86_vendor, X86_VENDOR_INTEL   |
+                                            X86_VENDOR_CENTAUR |
+                                            X86_VENDOR_SHANGHAI) )
             goto gp_fault;
 
         *val = IA32_FEATURE_CONTROL_LOCK;
@@ -169,8 +170,8 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val)
         break;
 
     case MSR_IA32_PLATFORM_ID:
-        if ( !(cp->x86_vendor & X86_VENDOR_INTEL) ||
-             !(boot_cpu_data.x86_vendor & X86_VENDOR_INTEL) )
+        if ( !x86_vendor_is(cp->x86_vendor, X86_VENDOR_INTEL) ||
+             !x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) )
             goto gp_fault;
         rdmsrl(MSR_IA32_PLATFORM_ID, *val);
         break;
@@ -189,9 +190,10 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val)
          * from Xen's last microcode load, which can be forwarded straight to
          * the guest.
          */
-        if ( !(cp->x86_vendor & (X86_VENDOR_INTEL | X86_VENDOR_AMD)) ||
-             !(boot_cpu_data.x86_vendor &
-               (X86_VENDOR_INTEL | X86_VENDOR_AMD)) ||
+        if ( !x86_vendor_is(cp->x86_vendor,
+                            X86_VENDOR_INTEL | X86_VENDOR_AMD) ||
+             !x86_vendor_is(boot_cpu_data.x86_vendor,
+                            X86_VENDOR_INTEL | X86_VENDOR_AMD) ||
              rdmsr_safe(MSR_AMD_PATCHLEVEL, val) )
             goto gp_fault;
         break;
@@ -236,7 +238,8 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val)
          */
     case MSR_IA32_PERF_STATUS:
     case MSR_IA32_PERF_CTL:
-        if ( !(cp->x86_vendor & (X86_VENDOR_INTEL | X86_VENDOR_CENTAUR)) )
+        if ( !x86_vendor_is(cp->x86_vendor,
+                            X86_VENDOR_INTEL | X86_VENDOR_CENTAUR) )
             goto gp_fault;
 
         *val = 0;
@@ -245,7 +248,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val)
         goto gp_fault;
 
     case MSR_IA32_THERM_STATUS:
-        if ( cp->x86_vendor != X86_VENDOR_INTEL )
+        if ( !x86_vendor_is(cp->x86_vendor, X86_VENDOR_INTEL) )
             goto gp_fault;
         *val = 0;
         break;
@@ -302,7 +305,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val)
     case MSR_K8_IORR_MASK1:
     case MSR_K8_TSEG_BASE:
     case MSR_K8_TSEG_MASK:
-        if ( !(cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) )
+        if ( !x86_vendor_is(cp->x86_vendor, X86_VENDOR_AMD | X86_VENDOR_HYGON) )
             goto gp_fault;
         if ( !is_hardware_domain(d) )
             return X86EMUL_UNHANDLEABLE;
@@ -314,14 +317,15 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val)
         break;
 
     case MSR_K8_HWCR:
-        if ( !(cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) )
+        if ( !x86_vendor_is(cp->x86_vendor, X86_VENDOR_AMD | X86_VENDOR_HYGON) )
             goto gp_fault;
         *val = 0;
         break;
 
     case MSR_FAM10H_MMIO_CONF_BASE:
         if ( !is_hardware_domain(d) ||
-             !(cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ||
+             !x86_vendor_is(cp->x86_vendor,
+                            X86_VENDOR_AMD | X86_VENDOR_HYGON) ||
              rdmsr_safe(msr, val) )
             goto gp_fault;
 
@@ -338,7 +342,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val)
         break;
 
     case MSR_AMD64_DE_CFG:
-        if ( !(cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) )
+        if ( !x86_vendor_is(cp->x86_vendor, X86_VENDOR_AMD | X86_VENDOR_HYGON) )
             goto gp_fault;
         *val = AMD64_DE_CFG_LFENCE_SERIALISE;
         break;
@@ -461,7 +465,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val)
          * for backwards compatiblity, the OS should write 0 to it before
          * trying to access the current microcode version.
          */
-        if ( cp->x86_vendor != X86_VENDOR_INTEL || val != 0 )
+        if ( !x86_vendor_is(cp->x86_vendor, X86_VENDOR_INTEL) || val != 0 )
             goto gp_fault;
         break;
 
@@ -471,7 +475,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val)
          * to AMD CPUs as well (at least the architectural/CPUID part does).
          */
         if ( is_pv_domain(d) ||
-             cp->x86_vendor != X86_VENDOR_AMD )
+             !x86_vendor_is(cp->x86_vendor, X86_VENDOR_AMD) )
             goto gp_fault;
         break;
 
@@ -483,7 +487,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val)
          * by any CPUID bit.
          */
         if ( is_pv_domain(d) ||
-             cp->x86_vendor != X86_VENDOR_INTEL )
+             !x86_vendor_is(cp->x86_vendor, X86_VENDOR_INTEL) )
             goto gp_fault;
         break;
 
@@ -553,7 +557,8 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val)
          * a cpufreq controller dom0 which has full access.
          */
     case MSR_IA32_PERF_CTL:
-        if ( !(cp->x86_vendor & (X86_VENDOR_INTEL | X86_VENDOR_CENTAUR)) )
+        if ( !x86_vendor_is(cp->x86_vendor,
+                            X86_VENDOR_INTEL | X86_VENDOR_CENTAUR) )
             goto gp_fault;
 
         if ( likely(!is_cpufreq_controller(d)) || wrmsr_safe(msr, val) == 0 )
@@ -663,7 +668,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val)
          * OpenBSD 6.7 will panic if writing to DE_CFG triggers a #GP:
          * https://www.illumos.org/issues/12998 - drop writes.
          */
-        if ( !(cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) )
+        if ( !x86_vendor_is(cp->x86_vendor, X86_VENDOR_AMD | X86_VENDOR_HYGON) )
             goto gp_fault;
         break;
 
-- 
2.43.0



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	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" 
Subject: [RFC PATCH 08/11] x86: Migrate insn emulator to use x86_vendor_is()
Date: Wed, 26 Nov 2025 17:44:10 +0100
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Signed-off-by: Alejandro Vallejo 
---
 xen/arch/x86/x86_emulate/private.h     | 4 +++-
 xen/arch/x86/x86_emulate/x86_emulate.c | 2 +-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/x86_emulate/private.h b/xen/arch/x86/x86_emulate/private.h
index 24c79c4e8f..57c5689a1e 100644
--- a/xen/arch/x86/x86_emulate/private.h
+++ b/xen/arch/x86/x86_emulate/private.h
@@ -15,6 +15,7 @@
 # include 
 
 # include 
+# include 
 # include 
 # include 
 # include 
@@ -32,6 +33,7 @@ void BUG(void);
 
 #else /* !__XEN__ */
 # include "x86-emulate.h"
+# define x86_vendor_is(x, y) ((x) & (y))
 #endif
 
 #ifdef __i386__
@@ -520,7 +522,7 @@ in_protmode(
 static inline bool
 _amd_like(const struct cpu_policy *cp)
 {
-    return cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON);
+    return x86_vendor_is(cp->x86_vendor, X86_VENDOR_AMD | X86_VENDOR_HYGON);
 }
 
 static inline bool
diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c
index d830aea430..36544adcec 100644
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -3104,7 +3104,7 @@ x86_emulate(
          * in fact risking to make guest OSes vulnerable to the equivalent of
          * XSA-7 (CVE-2012-0217).
          */
-        generate_exception_if(cp->x86_vendor == X86_VENDOR_INTEL &&
+        generate_exception_if(x86_vendor_is(cp->x86_vendor, X86_VENDOR_INTEL) &&
                               op_bytes == 8 && !is_canonical_address(_regs.rcx),
                               X86_EXC_GP, 0);
 #endif
-- 
2.43.0



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	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" 
Subject: [RFC PATCH 04/11] x86: Refactor early vendor lookup code to use x86_vendor_is()
Date: Wed, 26 Nov 2025 17:44:06 +0100
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Move the "unknown" vendor ahead of all others and have it NOT rely
on x86_vendor_is(), as that would yield incorrect values for the
single-vendor+no-fallback case when running in incorrect hardware
(because x86_vendor_is() becomes a folded constant of the single
compiled-in vendor).

This is one of the two places where x86_vendor_is() cannot be used,
along with the compatibility check on loaded guest CPU policies.

Signed-off-by: Alejandro Vallejo 
---
 xen/arch/x86/cpu/common.c | 31 +++++++++++++++++++++++--------
 1 file changed, 23 insertions(+), 8 deletions(-)

diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c
index 393c30227f..c0c3606dd2 100644
--- a/xen/arch/x86/cpu/common.c
+++ b/xen/arch/x86/cpu/common.c
@@ -342,23 +342,38 @@ void __init early_cpu_init(bool verbose)
 
 	c->x86_vendor = x86_cpuid_lookup_vendor(ebx, ecx, edx) &
 	                X86_ENABLED_VENDORS;
-	switch (c->x86_vendor) {
-	case X86_VENDOR_INTEL:    intel_unlock_cpuid_leaves(c);
-				  actual_cpu = intel_cpu_dev;    break;
-	case X86_VENDOR_AMD:      actual_cpu = amd_cpu_dev;      break;
-	case X86_VENDOR_CENTAUR:  actual_cpu = centaur_cpu_dev;  break;
-	case X86_VENDOR_SHANGHAI: actual_cpu = shanghai_cpu_dev; break;
-	case X86_VENDOR_HYGON:    actual_cpu = hygon_cpu_dev;    break;
-	default:
+
+	/*
+	 * We can't rely on x86_vendor_is() here due to the single-vendor
+	 * optimisation. It makes x86_vendor_is(x, y) rely on the constant `y`
+	 * matching the single vendor Xen was compiled for and ignore the
+	 * runtime variable `x`. In order to preserve sanity we must assert here
+	 * that we never boot such a build in a CPU from another vendor, or
+	 * major chaos would ensue.
+	 */
+	if (c->x86_vendor == X86_VENDOR_UNKNOWN)
+	{
 		if (verbose || !IS_ENABLED(CONFIG_UNKNOWN_CPU))
 			printk(XENLOG_ERR
 			       "Unrecognised or unsupported CPU vendor '%.12s'\n",
 			       c->x86_vendor_id);
+
 		if (!IS_ENABLED(CONFIG_UNKNOWN_CPU))
 			panic("Cannot run in unknown/compiled-out CPU vendor.\n");
 
 		actual_cpu = default_cpu;
 	}
+	else if (x86_vendor_is(c->x86_vendor, X86_VENDOR_INTEL)) {
+		intel_unlock_cpuid_leaves(c);
+		actual_cpu = intel_cpu_dev;
+	} else if (x86_vendor_is(c->x86_vendor, X86_VENDOR_AMD))
+		actual_cpu = amd_cpu_dev;
+	else if (x86_vendor_is(c->x86_vendor, X86_VENDOR_CENTAUR))
+		actual_cpu = centaur_cpu_dev;
+	else if (x86_vendor_is(c->x86_vendor, X86_VENDOR_SHANGHAI))
+		actual_cpu = shanghai_cpu_dev;
+	else if (x86_vendor_is(c->x86_vendor, X86_VENDOR_HYGON))
+		actual_cpu = hygon_cpu_dev;
 
 	cpuid(0x00000001, &eax, &ebx, &ecx, &edx);
 	c->x86 = get_cpu_family(eax, &c->x86_model, &c->x86_mask);
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: Alejandro Vallejo , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" 
Subject: [RFC PATCH 11/11] x86: Migrate every remaining raw vendor check to x86_vendor_is()
Date: Wed, 26 Nov 2025 17:44:13 +0100
Message-ID: <20251126164419.174487-12-alejandro.garciavallejo@amd.com>
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Not a functional change.

Signed-off-by: Alejandro Vallejo 
---
 xen/arch/x86/acpi/cpu_idle.c        | 19 ++++++++++---------
 xen/arch/x86/acpi/cpufreq/acpi.c    |  2 +-
 xen/arch/x86/acpi/cpufreq/cpufreq.c |  4 ++--
 xen/arch/x86/apic.c                 |  2 +-
 xen/arch/x86/cpu-policy.c           | 10 ++++++----
 xen/arch/x86/cpuid.c                |  4 ++--
 xen/arch/x86/dom0_build.c           |  3 ++-
 xen/arch/x86/domain.c               | 25 +++++++++++--------------
 xen/arch/x86/e820.c                 |  3 ++-
 xen/arch/x86/hvm/hvm.c              |  5 +++--
 xen/arch/x86/hvm/ioreq.c            |  2 +-
 xen/arch/x86/hvm/vmx/vmx.c          |  6 +++---
 xen/arch/x86/include/asm/guest_pt.h |  4 ++--
 xen/arch/x86/irq.c                  |  4 ++--
 xen/arch/x86/pv/emul-priv-op.c      | 24 ++++++++++++------------
 xen/arch/x86/setup.c                |  2 +-
 16 files changed, 61 insertions(+), 58 deletions(-)

diff --git a/xen/arch/x86/acpi/cpu_idle.c b/xen/arch/x86/acpi/cpu_idle.c
index d60a07bfd5..1d7f19aadb 100644
--- a/xen/arch/x86/acpi/cpu_idle.c
+++ b/xen/arch/x86/acpi/cpu_idle.c
@@ -178,7 +178,7 @@ static void cf_check do_get_hw_residencies(void *arg)
     struct cpuinfo_x86 *c = ¤t_cpu_data;
     struct hw_residencies *hw_res = arg;
 
-    if ( c->x86_vendor != X86_VENDOR_INTEL || c->x86 != 6 )
+    if ( !x86_vendor_is(c->x86_vendor, X86_VENDOR_INTEL) || c->x86 != 6 )
         return;
 
     switch ( c->x86_model )
@@ -915,8 +915,8 @@ void cf_check acpi_dead_idle(void)
             mwait(cx->address, 0);
         }
     }
-    else if ( (current_cpu_data.x86_vendor &
-               (X86_VENDOR_AMD | X86_VENDOR_HYGON)) &&
+    else if ( x86_vendor_is(current_cpu_data.x86_vendor,
+                            X86_VENDOR_AMD | X86_VENDOR_HYGON) &&
               cx->entry_method == ACPI_CSTATE_EM_SYSIO )
     {
         /* Intel prefers not to use SYSIO */
@@ -1042,8 +1042,9 @@ static void acpi_processor_power_init_bm_check(struct acpi_processor_flags *flag
     flags->bm_check = 0;
     if ( num_online_cpus() == 1 )
         flags->bm_check = 1;
-    else if ( (c->x86_vendor == X86_VENDOR_INTEL) ||
-              ((c->x86_vendor == X86_VENDOR_AMD) && (c->x86 == 0x15)) )
+    else if ( x86_vendor_is(c->x86_vendor, X86_VENDOR_INTEL) ||
+              (x86_vendor_is(c->x86_vendor,
+                             X86_VENDOR_AMD) && (c->x86 == 0x15)) )
     {
         /*
          * Today all MP CPUs that support C3 share cache.
@@ -1059,7 +1060,7 @@ static void acpi_processor_power_init_bm_check(struct acpi_processor_flags *flag
      * is not required while entering C3 type state on
      * P4, Core and beyond CPUs
      */
-    if ( c->x86_vendor == X86_VENDOR_INTEL &&
+    if ( x86_vendor_is(c->x86_vendor, X86_VENDOR_INTEL) &&
         (c->x86 > 0x6 || (c->x86 == 6 && c->x86_model >= 14)) )
             flags->bm_control = 0;
 }
@@ -1421,7 +1422,7 @@ static void amd_cpuidle_init(struct acpi_processor_power *power)
     case 0x1a:
     case 0x19:
     case 0x18:
-        if ( boot_cpu_data.x86_vendor != X86_VENDOR_HYGON )
+        if ( !x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_HYGON) )
         {
     default:
             vendor_override = -1;
@@ -1648,8 +1649,8 @@ static int cf_check cpu_callback(
         break;
 
     case CPU_ONLINE:
-        if ( (boot_cpu_data.x86_vendor &
-              (X86_VENDOR_AMD | X86_VENDOR_HYGON)) &&
+        if ( x86_vendor_is(boot_cpu_data.x86_vendor,
+                           X86_VENDOR_AMD | X86_VENDOR_HYGON) &&
              processor_powers[cpu] )
             amd_cpuidle_init(processor_powers[cpu]);
         break;
diff --git a/xen/arch/x86/acpi/cpufreq/acpi.c b/xen/arch/x86/acpi/cpufreq/acpi.c
index b027459417..b8bfb9fb56 100644
--- a/xen/arch/x86/acpi/cpufreq/acpi.c
+++ b/xen/arch/x86/acpi/cpufreq/acpi.c
@@ -471,7 +471,7 @@ static int cf_check acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
 
     /* Check for APERF/MPERF support in hardware
      * also check for boost support */
-    if (c->x86_vendor == X86_VENDOR_INTEL && c->cpuid_level >= 6)
+    if (x86_vendor_is(c->x86_vendor, X86_VENDOR_INTEL) && c->cpuid_level >= 6)
         on_selected_cpus(cpumask_of(cpu), feature_detect, policy, 1);
 
     /*
diff --git a/xen/arch/x86/acpi/cpufreq/cpufreq.c b/xen/arch/x86/acpi/cpufreq/cpufreq.c
index 89e2b3d167..27770269ba 100644
--- a/xen/arch/x86/acpi/cpufreq/cpufreq.c
+++ b/xen/arch/x86/acpi/cpufreq/cpufreq.c
@@ -244,8 +244,8 @@ __initcall(cpufreq_driver_late_init);
 int cpufreq_cpu_init(unsigned int cpu)
 {
     /* Currently we only handle Intel, AMD and Hygon processor */
-    if ( boot_cpu_data.x86_vendor &
-         (X86_VENDOR_INTEL | X86_VENDOR_AMD | X86_VENDOR_HYGON) )
+    if ( x86_vendor_is(boot_cpu_data.x86_vendor,
+                       (X86_VENDOR_INTEL | X86_VENDOR_AMD | X86_VENDOR_HYGON)) )
         return cpufreq_add_cpu(cpu);
 
     return -EOPNOTSUPP;
diff --git a/xen/arch/x86/apic.c b/xen/arch/x86/apic.c
index fb38be7ec3..6e78250a4a 100644
--- a/xen/arch/x86/apic.c
+++ b/xen/arch/x86/apic.c
@@ -406,7 +406,7 @@ void __init init_bsp_APIC(void)
     value |= APIC_SPIV_APIC_ENABLED;
     
     /* This bit is reserved on P4/Xeon and should be cleared */
-    if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && (boot_cpu_data.x86 == 15))
+    if (x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) && (boot_cpu_data.x86 == 15))
         value &= ~APIC_SPIV_FOCUS_DISABLED;
     else
         value |= APIC_SPIV_FOCUS_DISABLED;
diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c
index 1acd7c5124..3f3c95eb82 100644
--- a/xen/arch/x86/cpu-policy.c
+++ b/xen/arch/x86/cpu-policy.c
@@ -759,7 +759,8 @@ static void __init calculate_hvm_max_policy(void)
      * long mode (and init_amd() has cleared it out of host capabilities), but
      * HVM guests are able if running in protected mode.
      */
-    if ( (boot_cpu_data.vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) &&
+    if ( x86_vendor_is(boot_cpu_data.vendor,
+                       X86_VENDOR_AMD | X86_VENDOR_HYGON) &&
          raw_cpu_policy.basic.sep )
         __set_bit(X86_FEATURE_SEP, fs);
 
@@ -952,8 +953,9 @@ void recalculate_cpuid_policy(struct domain *d)
     p->basic.max_leaf   = min(p->basic.max_leaf,   max->basic.max_leaf);
     p->feat.max_subleaf = min(p->feat.max_subleaf, max->feat.max_subleaf);
     p->extd.max_leaf    = 0x80000000U | min(p->extd.max_leaf & 0xffff,
-                                            ((p->x86_vendor & (X86_VENDOR_AMD |
-                                                               X86_VENDOR_HYGON))
+                                            (x86_vendor_is(p->x86_vendor,
+                                                           X86_VENDOR_AMD |
+                                                           X86_VENDOR_HYGON)
                                              ? CPUID_GUEST_NR_EXTD_AMD
                                              : CPUID_GUEST_NR_EXTD_INTEL) - 1);
 
@@ -987,7 +989,7 @@ void recalculate_cpuid_policy(struct domain *d)
     if ( is_pv_32bit_domain(d) )
     {
         __clear_bit(X86_FEATURE_LM, max_fs);
-        if ( !(boot_cpu_data.vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) )
+        if ( !(x86_vendor_is(boot_cpu_data.vendor, X86_VENDOR_AMD | X86_VENDOR_HYGON)) )
             __clear_bit(X86_FEATURE_SYSCALL, max_fs);
     }
 
diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c
index 5decfad8cd..7eca6ad2f5 100644
--- a/xen/arch/x86/cpuid.c
+++ b/xen/arch/x86/cpuid.c
@@ -437,7 +437,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf,
 
     case 0xa:
         /* TODO: Rework vPMU control in terms of toolstack choices. */
-        if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL ||
+        if ( !x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) ||
              !vpmu_available(v) )
             *res = EMPTY_LEAF;
         else
@@ -483,7 +483,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf,
 
     case 0x80000001U:
         /* SYSCALL is hidden outside of long mode on Intel. */
-        if ( p->x86_vendor == X86_VENDOR_INTEL &&
+        if ( x86_vendor_is(p->x86_vendor, X86_VENDOR_INTEL) &&
              is_hvm_domain(d) && !hvm_long_mode_active(v) )
             res->d &= ~cpufeat_mask(X86_FEATURE_SYSCALL);
 
diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c
index 0b467fd4a4..11cfd6be20 100644
--- a/xen/arch/x86/dom0_build.c
+++ b/xen/arch/x86/dom0_build.c
@@ -572,7 +572,8 @@ int __init dom0_setup_permissions(struct domain *d)
             rc |= iomem_deny_access(d, mfn, mfn);
     }
     /* HyperTransport range. */
-    if ( boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) )
+    if ( x86_vendor_is(boot_cpu_data.x86_vendor,
+                       X86_VENDOR_AMD | X86_VENDOR_HYGON) )
     {
         mfn = paddr_to_pfn(1UL <<
                            (boot_cpu_data.x86 < 0x17 ? 40 : paddr_bits));
diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index f3e4ae4a4d..3c878c92a5 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -370,7 +370,7 @@ void domain_cpu_policy_changed(struct domain *d)
         {
             uint64_t mask = cpuidmask_defaults._6c;
 
-            if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD )
+            if ( x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_AMD) )
                 mask &= (~0ULL << 32) | p->basic.raw[6].c;
 
             d->arch.pv.cpuidmasks->_6c = mask;
@@ -385,8 +385,8 @@ void domain_cpu_policy_changed(struct domain *d)
              * wholesale from the policy, but clamp the features in 7[0].ebx
              * per usual.
              */
-            if ( boot_cpu_data.x86_vendor &
-                 (X86_VENDOR_AMD | X86_VENDOR_HYGON) )
+            if ( x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_AMD |
+                                                         X86_VENDOR_HYGON) )
                 mask = (((uint64_t)p->feat.max_subleaf << 32) |
                         ((uint32_t)mask & p->feat._7b0));
 
@@ -398,7 +398,7 @@ void domain_cpu_policy_changed(struct domain *d)
             uint64_t mask = cpuidmask_defaults.Da1;
             uint32_t eax = p->xstate.Da1;
 
-            if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL )
+            if ( x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) )
                 mask &= (~0ULL << 32) | eax;
 
             d->arch.pv.cpuidmasks->Da1 = mask;
@@ -422,17 +422,15 @@ void domain_cpu_policy_changed(struct domain *d)
              * If not emulating AMD or Hygon, clear the duplicated features
              * in e1d.
              */
-            if ( !(p->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) )
+            if ( !x86_vendor_is(p->x86_vendor, X86_VENDOR_AMD |
+                                               X86_VENDOR_HYGON) )
                 edx &= ~CPUID_COMMON_1D_FEATURES;
 
-            switch ( boot_cpu_data.x86_vendor )
-            {
-            case X86_VENDOR_INTEL:
+            if ( x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) )
                 mask &= ((uint64_t)edx << 32) | ecx;
-                break;
-
-            case X86_VENDOR_AMD:
-            case X86_VENDOR_HYGON:
+            else if ( x86_vendor_is(boot_cpu_data.x86_vendor,
+                                    X86_VENDOR_AMD | X86_VENDOR_HYGON) )
+            {
                 mask &= ((uint64_t)ecx << 32) | edx;
 
                 /*
@@ -443,7 +441,6 @@ void domain_cpu_policy_changed(struct domain *d)
                 edx = cpufeat_mask(X86_FEATURE_APIC);
 
                 mask |= ((uint64_t)ecx << 32) | edx;
-                break;
             }
 
             d->arch.pv.cpuidmasks->e1cd = mask;
@@ -455,7 +452,7 @@ void domain_cpu_policy_changed(struct domain *d)
         cpu_policy_updated(v);
 
         /* If PMU version is zero then the guest doesn't have VPMU */
-        if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
+        if ( x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) &&
              p->basic.pmu_version == 0 )
             vpmu_destroy(v);
     }
diff --git a/xen/arch/x86/e820.c b/xen/arch/x86/e820.c
index ca577c0bde..3cbcd98254 100644
--- a/xen/arch/x86/e820.c
+++ b/xen/arch/x86/e820.c
@@ -426,7 +426,8 @@ static uint64_t __init mtrr_top_of_ram(void)
 
     /* By default we check only Intel systems. */
     if ( e820_mtrr_clip == -1 )
-        e820_mtrr_clip = boot_cpu_data.x86_vendor == X86_VENDOR_INTEL;
+        e820_mtrr_clip = x86_vendor_is(boot_cpu_data.x86_vendor,
+                                       X86_VENDOR_INTEL);
 
     if ( !e820_mtrr_clip )
         return 0;
diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 4084b610fa..8e4050b8ce 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -2668,8 +2668,9 @@ bool hvm_vcpu_virtual_to_linear(
         }
         else if ( last_byte > reg->limit )
             goto out; /* last byte is beyond limit */
-        else if ( last_byte < offset &&
-                  v->domain->arch.cpuid->x86_vendor == X86_VENDOR_AMD )
+        else if ( x86_vendor_is(v->domain->arch.cpuid->x86_vendor,
+                                X86_VENDOR_AMD) &&
+                  last_byte < offset )
             goto out; /* access wraps */
     }
 
diff --git a/xen/arch/x86/hvm/ioreq.c b/xen/arch/x86/hvm/ioreq.c
index a5fa97e149..8bdf52b506 100644
--- a/xen/arch/x86/hvm/ioreq.c
+++ b/xen/arch/x86/hvm/ioreq.c
@@ -286,7 +286,7 @@ bool arch_ioreq_server_get_type_addr(const struct domain *d,
         *addr = ((uint64_t)sbdf.sbdf << 32) | reg;
         /* AMD extended configuration space access? */
         if ( CF8_ADDR_HI(cf8) &&
-             d->arch.cpuid->x86_vendor == X86_VENDOR_AMD &&
+             x86_vendor_is(d->arch.cpuid->x86_vendor, X86_VENDOR_AMD) &&
              (x86_fam = get_cpu_family(
                  d->arch.cpuid->basic.raw_fms, NULL, NULL)) >= 0x10 &&
              x86_fam < 0x17 )
diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c
index 6b407226c4..769840569c 100644
--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -3057,7 +3057,7 @@ static bool __init has_if_pschange_mc(void)
      * IF_PSCHANGE_MC is only known to affect Intel Family 6 processors at
      * this time.
      */
-    if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL ||
+    if ( !x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) ||
          boot_cpu_data.x86 != 6 )
         return false;
 
@@ -3409,7 +3409,7 @@ static void __init lbr_tsx_fixup_check(void)
      * fixed up as well.
      */
     if ( cpu_has_hle || cpu_has_rtm ||
-         boot_cpu_data.x86_vendor != X86_VENDOR_INTEL ||
+         !x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) ||
          boot_cpu_data.x86 != 6 )
         return;
 
@@ -3454,7 +3454,7 @@ static void __init ler_to_fixup_check(void)
      * that are not equal to bit[47].  Attempting to context switch this value
      * may cause a #GP.  Software should sign extend the MSR.
      */
-    if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL ||
+    if ( !x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) ||
          boot_cpu_data.x86 != 6 )
         return;
 
diff --git a/xen/arch/x86/include/asm/guest_pt.h b/xen/arch/x86/include/asm/guest_pt.h
index 21473f9bbc..a44909d35d 100644
--- a/xen/arch/x86/include/asm/guest_pt.h
+++ b/xen/arch/x86/include/asm/guest_pt.h
@@ -314,8 +314,8 @@ static always_inline bool guest_l4e_rsvd_bits(const struct vcpu *v,
                                               guest_l4e_t l4e)
 {
     return l4e.l4 & (guest_rsvd_bits(v) | GUEST_L4_PAGETABLE_RSVD |
-                     ((v->domain->arch.cpuid->x86_vendor == X86_VENDOR_AMD)
-                      ? _PAGE_GLOBAL : 0));
+                     (x86_vendor_is(v->domain->arch.cpuid->x86_vendor,
+                                    X86_VENDOR_AMD) ? _PAGE_GLOBAL : 0));
 }
 #endif /* GUEST_PAGING_LEVELS >= 4 */
 #endif /* GUEST_PAGING_LEVELS >= 3 */
diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index 92b8604dc8..2490331ec3 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2010,8 +2010,8 @@ void do_IRQ(struct cpu_user_regs *regs)
                      * interrupts have been delivered to CPUs
                      * different than the BSP.
                      */
-                    (boot_cpu_data.x86_vendor & (X86_VENDOR_AMD |
-                                                 X86_VENDOR_HYGON))) &&
+                    x86_vendor_is(boot_cpu_data.x86_vendor,
+                                  X86_VENDOR_AMD | X86_VENDOR_HYGON)) &&
                    bogus_8259A_irq(vector - FIRST_LEGACY_VECTOR)) )
             {
                 printk("CPU%u: No irq handler for vector %02x (IRQ %d%s)\n",
diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c
index 225d4cff03..e69450f949 100644
--- a/xen/arch/x86/pv/emul-priv-op.c
+++ b/xen/arch/x86/pv/emul-priv-op.c
@@ -244,7 +244,7 @@ static bool pci_cfg_ok(struct domain *currd, unsigned int start,
     start |= CF8_ADDR_LO(currd->arch.pci_cf8);
     /* AMD extended configuration space access? */
     if ( CF8_ADDR_HI(currd->arch.pci_cf8) &&
-         boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
+         x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_AMD) &&
          boot_cpu_data.x86 >= 0x10 && boot_cpu_data.x86 < 0x17 )
     {
         uint64_t msr_val;
@@ -868,7 +868,7 @@ static uint64_t guest_efer(const struct domain *d)
      */
     if ( is_pv_32bit_domain(d) )
         val &= ~(EFER_LME | EFER_LMA |
-                 (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL
+                 (x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL)
                   ? EFER_SCE : 0));
     return val;
 }
@@ -943,7 +943,7 @@ static int cf_check read_msr(
     case MSR_K8_PSTATE5:
     case MSR_K8_PSTATE6:
     case MSR_K8_PSTATE7:
-        if ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD )
+        if ( !x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_AMD) )
             break;
         if ( unlikely(is_cpufreq_controller(currd)) )
             goto normal;
@@ -951,7 +951,7 @@ static int cf_check read_msr(
         return X86EMUL_OKAY;
 
     case MSR_FAM10H_MMIO_CONF_BASE:
-        if ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD ||
+        if ( !x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_AMD) ||
              boot_cpu_data.x86 < 0x10 || boot_cpu_data.x86 >= 0x17 )
             break;
         /* fall through */
@@ -976,7 +976,7 @@ static int cf_check read_msr(
     case MSR_P6_EVNTSEL(0) ... MSR_P6_EVNTSEL(3):
     case MSR_CORE_PERF_FIXED_CTR0 ... MSR_CORE_PERF_FIXED_CTR2:
     case MSR_CORE_PERF_FIXED_CTR_CTRL ... MSR_CORE_PERF_GLOBAL_OVF_CTRL:
-        if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL )
+        if ( x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) )
         {
             vpmu_msr = true;
             /* fall through */
@@ -1103,7 +1103,7 @@ static int cf_check write_msr(
         break;
 
     case MSR_FAM10H_MMIO_CONF_BASE:
-        if ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD ||
+        if ( !x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_AMD) ||
              boot_cpu_data.x86 < 0x10 || boot_cpu_data.x86 >= 0x17 )
             break;
         if ( !is_hwdom_pinned_vcpu(curr) )
@@ -1132,8 +1132,8 @@ static int cf_check write_msr(
 
     case MSR_IA32_MPERF:
     case MSR_IA32_APERF:
-        if ( !(boot_cpu_data.x86_vendor &
-               (X86_VENDOR_INTEL | X86_VENDOR_AMD | X86_VENDOR_HYGON)) )
+        if ( !x86_vendor_is(boot_cpu_data.x86_vendor,
+                 X86_VENDOR_INTEL | X86_VENDOR_AMD | X86_VENDOR_HYGON) )
             break;
         if ( likely(!is_cpufreq_controller(currd)) ||
              wrmsr_safe(reg, val) == 0 )
@@ -1142,7 +1142,7 @@ static int cf_check write_msr(
 
     case MSR_IA32_THERM_CONTROL:
     case MSR_IA32_ENERGY_PERF_BIAS:
-        if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL )
+        if ( !x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) )
             break;
         if ( !is_hwdom_pinned_vcpu(curr) || wrmsr_safe(reg, val) == 0 )
             return X86EMUL_OKAY;
@@ -1152,13 +1152,13 @@ static int cf_check write_msr(
     case MSR_P6_EVNTSEL(0) ... MSR_P6_EVNTSEL(3):
     case MSR_CORE_PERF_FIXED_CTR0 ... MSR_CORE_PERF_FIXED_CTR2:
     case MSR_CORE_PERF_FIXED_CTR_CTRL ... MSR_CORE_PERF_GLOBAL_OVF_CTRL:
-        if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL )
+        if ( x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) )
         {
             vpmu_msr = true;
     case MSR_AMD_FAM15H_EVNTSEL0 ... MSR_AMD_FAM15H_PERFCTR5:
     case MSR_K7_EVNTSEL0 ... MSR_K7_PERFCTR3:
-            if ( vpmu_msr || (boot_cpu_data.x86_vendor &
-                              (X86_VENDOR_AMD | X86_VENDOR_HYGON)) )
+            if ( vpmu_msr || x86_vendor_is(boot_cpu_data.x86_vendor, 
+                                           X86_VENDOR_AMD | X86_VENDOR_HYGON) )
             {
                 if ( (vpmu_mode & XENPMU_MODE_ALL) &&
                      !is_hardware_domain(currd) )
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 872a8c63f9..0eca058850 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1384,7 +1384,7 @@ void asmlinkage __init noreturn __start_xen(void)
          * supervisor shadow stacks are now safe to use.
          */
         bool cpu_has_bug_shstk_fracture =
-            boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
+            x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) &&
             !boot_cpu_has(X86_FEATURE_CET_SSS);
 
         /*
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: Alejandro Vallejo , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" 
Subject: [RFC PATCH 10/11] x86: Migrate everything under cpu/ to use x86_vendor_is()
Date: Wed, 26 Nov 2025 17:44:12 +0100
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There's nothing special about this folder, but it doing it ahead alleviates the
size of the following patch.

Not a functional change.

Signed-off-by: Alejandro Vallejo 
---
 xen/arch/x86/cpu/amd.c                 |  6 +++---
 xen/arch/x86/cpu/common.c              |  2 +-
 xen/arch/x86/cpu/intel_cacheinfo.c     |  5 ++---
 xen/arch/x86/cpu/mcheck/amd_nonfatal.c |  2 +-
 xen/arch/x86/cpu/mcheck/mcaction.c     |  3 ++-
 xen/arch/x86/cpu/mcheck/mce.c          | 14 +++++++-------
 xen/arch/x86/cpu/mcheck/mce_amd.c      |  6 +++---
 xen/arch/x86/cpu/mcheck/mce_intel.c    |  6 +++---
 xen/arch/x86/cpu/mcheck/vmce.c         |  4 ++--
 xen/arch/x86/cpu/microcode/amd.c       |  2 +-
 xen/arch/x86/cpu/microcode/core.c      |  2 +-
 xen/arch/x86/cpu/mtrr/generic.c        |  4 ++--
 xen/arch/x86/cpu/mwait-idle.c          |  4 ++--
 13 files changed, 30 insertions(+), 30 deletions(-)

diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index 9b02e1ba67..1205253e13 100644
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -428,7 +428,7 @@ int cpu_has_amd_erratum(const struct cpuinfo_x86 *cpu, int osvw_id, ...)
 	u32 range;
 	u32 ms;
 	
-	if (cpu->x86_vendor != X86_VENDOR_AMD)
+	if (!x86_vendor_is(cpu->x86_vendor, X86_VENDOR_AMD))
 		return 0;
 
 	if (osvw_id >= 0 && cpu_has(cpu, X86_FEATURE_OSVW)) {
@@ -519,8 +519,8 @@ static void check_syscfg_dram_mod_en(void)
 {
 	uint64_t syscfg;
 
-	if (!((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) &&
-		(boot_cpu_data.x86 >= 0x0f)))
+	if (!(x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_AMD) &&
+		    (boot_cpu_data.x86 >= 0x0f)))
 		return;
 
 	rdmsrl(MSR_K8_SYSCFG, syscfg);
diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c
index c0c3606dd2..df81ef9136 100644
--- a/xen/arch/x86/cpu/common.c
+++ b/xen/arch/x86/cpu/common.c
@@ -463,7 +463,7 @@ void __init early_cpu_init(bool verbose)
 		paddr_bits -= (ebx >> 6) & 0x3f;
 	}
 
-	if (!(c->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)))
+	if (!x86_vendor_is(c->x86_vendor, X86_VENDOR_AMD | X86_VENDOR_HYGON))
 		park_offline_cpus = opt_mce;
 
 	initialize_cpu_data(0);
diff --git a/xen/arch/x86/cpu/intel_cacheinfo.c b/xen/arch/x86/cpu/intel_cacheinfo.c
index e88faa7545..7dc778cd55 100644
--- a/xen/arch/x86/cpu/intel_cacheinfo.c
+++ b/xen/arch/x86/cpu/intel_cacheinfo.c
@@ -168,9 +168,8 @@ void init_intel_cacheinfo(struct cpuinfo_x86 *c)
 	 * Don't use cpuid2 if cpuid4 is supported. For P4, we use cpuid2 for
 	 * trace cache
 	 */
-	if ((num_cache_leaves == 0 || c->x86 == 15) && c->cpuid_level > 1 &&
-	    c->x86_vendor != X86_VENDOR_SHANGHAI)
-	{
+	if (((num_cache_leaves == 0 || c->x86 == 15) && c->cpuid_level > 1) &&
+	    !x86_vendor_is(c->x86_vendor, X86_VENDOR_SHANGHAI)) {
 		/* supports eax=2  call */
 		unsigned int i, j, n, regs[4];
 		unsigned char *dp = (unsigned char *)regs;
diff --git a/xen/arch/x86/cpu/mcheck/amd_nonfatal.c b/xen/arch/x86/cpu/mcheck/amd_nonfatal.c
index 7d48c9ab5f..c2c829a397 100644
--- a/xen/arch/x86/cpu/mcheck/amd_nonfatal.c
+++ b/xen/arch/x86/cpu/mcheck/amd_nonfatal.c
@@ -191,7 +191,7 @@ static void cf_check mce_amd_work_fn(void *data)
 
 void __init amd_nonfatal_mcheck_init(struct cpuinfo_x86 *c)
 {
-	if (!(c->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)))
+	if (!x86_vendor_is(c->x86_vendor, X86_VENDOR_AMD | X86_VENDOR_HYGON))
 		return;
 
 	/* Assume we are on K8 or newer AMD or Hygon CPU here */
diff --git a/xen/arch/x86/cpu/mcheck/mcaction.c b/xen/arch/x86/cpu/mcheck/mcaction.c
index bf7a0de965..a43e3240c3 100644
--- a/xen/arch/x86/cpu/mcheck/mcaction.c
+++ b/xen/arch/x86/cpu/mcheck/mcaction.c
@@ -101,7 +101,8 @@ mc_memerr_dhandler(struct mca_binfo *binfo,
                       * not always precise. In that case, fallback to broadcast.
                       */
                      global->mc_domid != bank->mc_domid ||
-                     (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
+                     (x86_vendor_is(boot_cpu_data.x86_vendor,
+                                    X86_VENDOR_INTEL) &&
                       (!(global->mc_gstatus & MCG_STATUS_LMCE) ||
                        !(d->vcpu[mc_vcpuid]->arch.vmce.mcg_ext_ctl &
                          MCG_EXT_CTL_LMCE_EN))) )
diff --git a/xen/arch/x86/cpu/mcheck/mce.c b/xen/arch/x86/cpu/mcheck/mce.c
index 9bef1da385..40c8c10df9 100644
--- a/xen/arch/x86/cpu/mcheck/mce.c
+++ b/xen/arch/x86/cpu/mcheck/mce.c
@@ -333,8 +333,7 @@ mcheck_mca_logout(enum mca_source who, struct mca_banks *bankmask,
                 ASSERT(mig);
                 mca_init_global(mc_flags, mig);
                 /* A hook here to get global extended msrs */
-                if ( IS_ENABLED(CONFIG_INTEL) &&
-                     boot_cpu_data.x86_vendor == X86_VENDOR_INTEL )
+                if ( x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) )
                     intel_get_extended_msrs(mig, mci);
             }
         }
@@ -564,8 +563,8 @@ bool mce_available(const struct cpuinfo_x86 *c)
  */
 unsigned int mce_firstbank(struct cpuinfo_x86 *c)
 {
-    return c->x86 == 6 &&
-           c->x86_vendor == X86_VENDOR_INTEL && c->x86_model < 0x1a;
+    return x86_vendor_is(c->x86_vendor, X86_VENDOR_INTEL) &&
+           c->x86 == 6 && c->x86_model < 0x1a;
 }
 
 static int show_mca_info(int inited, struct cpuinfo_x86 *c)
@@ -1107,7 +1106,7 @@ static bool __maybe_unused x86_mc_msrinject_verify(struct xen_mc_msrinject *mci)
 
         if ( IS_MCA_BANKREG(reg, mci->mcinj_cpunr) )
         {
-            if ( c->x86_vendor == X86_VENDOR_AMD )
+            if ( x86_vendor_is(c->x86_vendor, X86_VENDOR_AMD) )
             {
                 /*
                  * On AMD we can set MCi_STATUS_WREN in the
@@ -1142,7 +1141,7 @@ static bool __maybe_unused x86_mc_msrinject_verify(struct xen_mc_msrinject *mci)
             case MSR_F10_MC4_MISC1:
             case MSR_F10_MC4_MISC2:
             case MSR_F10_MC4_MISC3:
-                if ( c->x86_vendor != X86_VENDOR_AMD )
+                if ( !x86_vendor_is(c->x86_vendor, X86_VENDOR_AMD) )
                     reason = "only supported on AMD";
                 else if ( c->x86 < 0x10 )
                     reason = "only supported on AMD Fam10h+";
@@ -1150,7 +1149,8 @@ static bool __maybe_unused x86_mc_msrinject_verify(struct xen_mc_msrinject *mci)
 
             /* MSRs that the HV will take care of */
             case MSR_K8_HWCR:
-                if ( c->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) )
+                if ( x86_vendor_is(c->x86_vendor,
+                                   X86_VENDOR_AMD | X86_VENDOR_HYGON) )
                     reason = "HV will operate HWCR";
                 else
                     reason = "only supported on AMD or Hygon";
diff --git a/xen/arch/x86/cpu/mcheck/mce_amd.c b/xen/arch/x86/cpu/mcheck/mce_amd.c
index 25c29eb3d2..e664bf0443 100644
--- a/xen/arch/x86/cpu/mcheck/mce_amd.c
+++ b/xen/arch/x86/cpu/mcheck/mce_amd.c
@@ -160,7 +160,7 @@ mcequirk_lookup_amd_quirkdata(const struct cpuinfo_x86 *c)
 {
     unsigned int i;
 
-    BUG_ON(c->x86_vendor != X86_VENDOR_AMD);
+    BUG_ON(!x86_vendor_is(c->x86_vendor, X86_VENDOR_AMD));
 
     for ( i = 0; i < ARRAY_SIZE(mce_amd_quirks); i++ )
     {
@@ -291,7 +291,7 @@ amd_mcheck_init(const struct cpuinfo_x86 *c, bool bsp)
     uint32_t i;
     enum mcequirk_amd_flags quirkflag = 0;
 
-    if ( c->x86_vendor != X86_VENDOR_HYGON )
+    if ( !x86_vendor_is(c->x86_vendor, X86_VENDOR_HYGON) )
         quirkflag = mcequirk_lookup_amd_quirkdata(c);
 
     /* Assume that machine check support is available.
@@ -337,6 +337,6 @@ amd_mcheck_init(const struct cpuinfo_x86 *c, bool bsp)
             ppin_msr = MSR_AMD_PPIN;
     }
 
-    return c->x86_vendor == X86_VENDOR_HYGON ?
+    return x86_vendor_is(c->x86_vendor, X86_VENDOR_HYGON) ?
             mcheck_hygon : mcheck_amd_famXX;
 }
diff --git a/xen/arch/x86/cpu/mcheck/mce_intel.c b/xen/arch/x86/cpu/mcheck/mce_intel.c
index 839a0e5ba9..9f3ae4277b 100644
--- a/xen/arch/x86/cpu/mcheck/mce_intel.c
+++ b/xen/arch/x86/cpu/mcheck/mce_intel.c
@@ -711,8 +711,8 @@ static bool mce_is_broadcast(struct cpuinfo_x86 *c)
      * DisplayFamily_DisplayModel encoding of 06H_EH and above,
      * a MCA signal is broadcast to all logical processors in the system
      */
-    if ( c->x86_vendor == X86_VENDOR_INTEL && c->x86 == 6 &&
-         c->x86_model >= 0xe )
+    if ( x86_vendor_is(c->x86_vendor, X86_VENDOR_INTEL) &&
+         c->x86 == 6 && c->x86_model >= 0xe )
         return true;
     return false;
 }
@@ -1036,7 +1036,7 @@ int vmce_intel_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val)
         return 1;
     }
 
-    if ( !(cp->x86_vendor & X86_VENDOR_INTEL) )
+    if ( !x86_vendor_is(cp->x86_vendor, X86_VENDOR_INTEL) )
         return 0;
 
     if ( bank < GUEST_MC_BANK_NUM )
diff --git a/xen/arch/x86/cpu/mcheck/vmce.c b/xen/arch/x86/cpu/mcheck/vmce.c
index dd1ccecfe5..7f0c413412 100644
--- a/xen/arch/x86/cpu/mcheck/vmce.c
+++ b/xen/arch/x86/cpu/mcheck/vmce.c
@@ -45,7 +45,7 @@ void vmce_init_vcpu(struct vcpu *v)
     int i;
 
     /* global MCA MSRs init */
-    if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL )
+    if ( x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) )
         v->arch.vmce.mcg_cap = INTEL_GUEST_MCG_CAP;
     else
         v->arch.vmce.mcg_cap = AMD_GUEST_MCG_CAP;
@@ -63,7 +63,7 @@ int vmce_restore_vcpu(struct vcpu *v, const struct hvm_vmce_vcpu *ctxt)
 {
     unsigned long guest_mcg_cap;
 
-    if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL )
+    if ( x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) )
         guest_mcg_cap = INTEL_GUEST_MCG_CAP | MCG_LMCE_P;
     else
         guest_mcg_cap = AMD_GUEST_MCG_CAP;
diff --git a/xen/arch/x86/cpu/microcode/amd.c b/xen/arch/x86/cpu/microcode/amd.c
index 4a7573c885..da5573445e 100644
--- a/xen/arch/x86/cpu/microcode/amd.c
+++ b/xen/arch/x86/cpu/microcode/amd.c
@@ -616,7 +616,7 @@ void __init amd_check_entrysign(void)
     unsigned int curr_rev;
     uint8_t fixed_rev;
 
-    if ( boot_cpu_data.vendor != X86_VENDOR_AMD ||
+    if ( !x86_vendor_is(boot_cpu_data.vendor, X86_VENDOR_AMD) ||
          boot_cpu_data.family < 0x17 ||
          boot_cpu_data.family > 0x1a )
         return;
diff --git a/xen/arch/x86/cpu/microcode/core.c b/xen/arch/x86/cpu/microcode/core.c
index fe47c3a6c1..e931bca95e 100644
--- a/xen/arch/x86/cpu/microcode/core.c
+++ b/xen/arch/x86/cpu/microcode/core.c
@@ -199,7 +199,7 @@ static struct microcode_patch *parse_blob(const char *buf, size_t len)
 /* Returns true if ucode should be loaded on a given cpu */
 static bool is_cpu_primary(unsigned int cpu)
 {
-    if ( boot_cpu_data.vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) )
+    if ( x86_vendor_is(boot_cpu_data.vendor, X86_VENDOR_AMD | X86_VENDOR_HYGON) )
         /* Load ucode on every logical thread/core */
         return true;
 
diff --git a/xen/arch/x86/cpu/mtrr/generic.c b/xen/arch/x86/cpu/mtrr/generic.c
index c587e9140e..88cf6a5e8e 100644
--- a/xen/arch/x86/cpu/mtrr/generic.c
+++ b/xen/arch/x86/cpu/mtrr/generic.c
@@ -218,9 +218,9 @@ static void __init print_mtrr_state(const char *level)
 			printk("%s  %u disabled\n", level, i);
 	}
 
-	if ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
+	if ((x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_AMD) &&
 	     boot_cpu_data.x86 >= 0xf) ||
-	     boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) {
+	    x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_HYGON)) {
 		uint64_t syscfg, tom2;
 
 		rdmsrl(MSR_K8_SYSCFG, syscfg);
diff --git a/xen/arch/x86/cpu/mwait-idle.c b/xen/arch/x86/cpu/mwait-idle.c
index f47fdfb569..c284375b24 100644
--- a/xen/arch/x86/cpu/mwait-idle.c
+++ b/xen/arch/x86/cpu/mwait-idle.c
@@ -1598,7 +1598,7 @@ static int __init mwait_idle_probe(void)
 	const struct x86_cpu_id *id;
 	const char *str;
 
-	if (boot_cpu_data.vendor != X86_VENDOR_INTEL)
+	if (!x86_vendor_is(boot_cpu_data.vendor, X86_VENDOR_INTEL))
 		return -ENODEV;
 
 	id = x86_match_cpu(intel_idle_ids);
@@ -1816,7 +1816,7 @@ bool __init mwait_pc10_supported(void)
 {
 	unsigned int ecx, edx, dummy;
 
-	if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL ||
+	if (!x86_vendor_is(boot_cpu_data.x86_vendor, X86_VENDOR_INTEL) ||
 	    !cpu_has_monitor ||
 	    boot_cpu_data.cpuid_level < CPUID_MWAIT_LEAF)
 		return false;
-- 
2.43.0



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Subject: Re: [PATCH 3/3] x86/amd: Fix race editing DE_CFG
To: Jan Beulich 
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On 26/11/2025 3:07 pm, Jan Beulich wrote:
> On 26.11.2025 14:22, Andrew Cooper wrote:
>> @@ -1075,6 +966,112 @@ static void cf_check fam17_disable_c6(void *arg)
>>  	wrmsrl(MSR_AMD_CSTATE_CFG, val & mask);
>>  }
>>  
>> +static bool zenbleed_use_chickenbit(void)
>> +{
>> +    unsigned int curr_rev;
>> +    uint8_t fixed_rev;
>> +
>> +    /*
>> +     * If we're virtualised, we can't do family/model checks safely, and
>> +     * we likely wouldn't have access to DE_CFG even if we could see a
>> +     * microcode revision.
>> +     *
>> +     * A hypervisor may hide AVX as a stopgap mitigation.  We're not in a
>> +     * position to care either way.  An admin doesn't want to be disabling
>> +     * AVX as a mitigation on any build of Xen with this logic present.
>> +     */
>> +    if ( cpu_has_hypervisor || boot_cpu_data.family != 0x17 )
>> +        return false;
>> +
>> +    curr_rev = this_cpu(cpu_sig).rev;
>> +    switch ( curr_rev >> 8 )
>> +    {
>> +    case 0x083010: fixed_rev = 0x7a; break;
>> +    case 0x086001: fixed_rev = 0x0b; break;
>> +    case 0x086081: fixed_rev = 0x05; break;
>> +    case 0x087010: fixed_rev = 0x32; break;
>> +    case 0x08a000: fixed_rev = 0x08; break;
>> +    default:
>> +        /*
>> +         * With the Fam17h check above, most parts getting here are Zen1.
>> +         * They're not affected.  Assume Zen2 ones making it here are affected
>> +         * regardless of microcode version.
>> +         */
>> +        return is_zen2_uarch();
>> +    }
>> +
>> +    return (uint8_t)curr_rev >= fixed_rev;
>> +}
>> +
>> +void amd_init_de_cfg(const struct cpuinfo_x86 *c)
>> +{
>> +    uint64_t val, new = 0;
>> +
>> +    /* The MSR doesn't exist on Fam 0xf/0x11. */
>> +    if ( c->family != 0xf && c->family != 0x11 )
>> +        return;
> Comment and code don't match. Did you mean
>
>     if ( c->family == 0xf || c->family == 0x11 )
>         return;
>
> (along the lines of what you have in amd_init_lfence_dispatch())?

Oh - that was a last minute refactor which I didn't do quite correctly. 
Yes, it should match amd_init_lfence_dispatch().

>
>> +    /*
>> +     * On Zen3 (Fam 0x19) and later CPUs, LFENCE is unconditionally dispatch
>> +     * serialising, and is enumerated in CPUID.  Hypervisors may also
>> +     * enumerate it when the setting is in place and MSR_AMD64_DE_CFG isn't
>> +     * available.
>> +     */
>> +    if ( !test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability) )
>> +        new |= AMD64_DE_CFG_LFENCE_SERIALISE;
>> +
>> +    /*
>> +     * If vulnerable to Zenbleed and not mitigated in microcode, use the
>> +     * bigger hammer.
>> +     */
>> +    if ( zenbleed_use_chickenbit() )
>> +        new |= (1 << 9);
>> +
>> +    if ( !new )
>> +        return;
>> +
>> +    if ( rdmsr_safe(MSR_AMD64_DE_CFG, &val) ||
>> +         (val & new) == new )
>> +        return;
>> +
>> +    /*
>> +     * DE_CFG is a Core-scoped MSR, and this write is racy.  However, both
>> +     * threads calculate the new value from state which expected to be
>> +     * consistent across CPUs and unrelated to the old value, so the result
>> +     * should be consistent.
>> +     */
>> +    wrmsr_safe(MSR_AMD64_DE_CFG, val | new);
> Either of the bits may be the cause of #GP. In that case we wouldn't set the
> other bit, even if it may be possible to set it.

This MSR does not #GP on real hardware.

Also, both of these bits come from instructions AMD have provided,
saying "set $X in case $Y", which we have honoured as part of the
conditions for setting up new, which I consider to be a reasonable
guarantee that no #GP will ensue.

This wrmsr_safe() is covering the virt case, because older Xen and
Byhive used to disallow writes to it, and OpenBSD would explode as a
consequence.  Xen's fix was 4175fd3ccd17.

I toyed with the idea of having a tristate de_cfg_writeable, but that
got very ugly very quickly

The other option would be to ignore DE_CFG entirely under virt.  That's
what we do for BP_CFG already, and no hypervisor is going to really let
us have access to it, and it would downgrade to non-safe variants.

>> +}
>> +
>> +void __init amd_init_lfence_dispatch(void)
>> +{
>> +    struct cpuinfo_x86 *c = &boot_cpu_data;
>> +    uint64_t val;
>> +
>> +    if ( test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability) )
>> +        /* LFENCE is forced dispatch serialising and we can't control it. */
>> +        return;
>> +
>> +    if ( c->family == 0xf || c->family == 0x11 )
>> +        /* MSR doesn't exist.  LFENCE is dispatch serialising on this hardare. */
>> +        goto set;
>> +
>> +    if ( rdmsr_safe(MSR_AMD64_DE_CFG, &val) )
>> +        /* Unable to read.  Assume the safer default. */
>> +        goto clear;
>> +
>> +    if ( val & AMD64_DE_CFG_LFENCE_SERIALISE )
>> +        /* Already dispatch serialising. */
>> +        goto set;
> Why "already", when this is now after we did the adjustment?

The old logic read it back to see if the write had stuck.  Again that
was the virt case.

With the new logic, I can probably just drop this particular comment. 
It's not terribly useful given the new layout.

~Andrew


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On 11/26/25 08:20, Juergen Gross wrote:
> While looking at paravirt cleanups I stumbled over slow_down_io() and
> the related REALLY_SLOW_IO define.
> 
> Especially REALLY_SLOW_IO is a mess, which is proven by 2 completely
> wrong use cases.
> 
> Do several cleanups, resulting in a deletion of REALLY_SLOW_IO and the
> io_delay() paravirt function hook.
> 
> Patches 2 and 3 are not changing any functionality, but maybe they
> should? As the potential bug has been present for more than a decade
> now, I went with just deleting the useless "#define REALLY_SLOW_IO".
> The alternative would be to do something similar as in patch 5.

Maybe, but as you point out there has not been a report of a problem
for a long time (who knows if any of the affected systems still exist).
We can apply always apply a fix if it turns out that someone does run
into a problem.

Thanks,
Guenter



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Oleksii Kurochko 
Subject: [PATCH 0/3] x86/amd: Drop legacy logic
Date: Wed, 26 Nov 2025 17:15:36 +0000
Message-Id: <20251126171539.890253-1-andrew.cooper3@citrix.com>
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Some of this has been unused for more than a decade.  Some for a quarter of a
centry.

Andrew Cooper (3):
  x86/cpu: Sort headers
  x86/amd: Drop vestigial PBE logic in init_amd()
  x86/amd: Drop the cpuid_mask_* command line options

 CHANGELOG.md                      |   4 +
 docs/misc/xen-command-line.pandoc |  40 ----------
 xen/arch/x86/cpu/amd.c            | 126 ++----------------------------
 xen/arch/x86/cpu/centaur.c        |  10 ++-
 xen/arch/x86/cpu/hygon.c          |   1 +
 xen/arch/x86/include/asm/amd.h    |  90 ---------------------
 6 files changed, 19 insertions(+), 252 deletions(-)


base-commit: 08c787f66cced18f0d0afafd86a040341adbd031
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH 2/3] x86/amd: Drop vestigial PBE logic in init_amd()
Date: Wed, 26 Nov 2025 17:15:38 +0000
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The comment was adjusted by myself in commit 51bd4bbdfdba ("x86: drop
X86_FEATURE_3DNOW_ALT"), on the presumption that the underlying logic existed
for a good reason.

Having done further archaeology, it turns out to be vestigial technical debt
from the leadup to Linux 2.4 in November 2000.

Prior to "Massive cleanup of CPU detection and bug handling",
c->x86_capability was a single uint32_t containing cpuid(1).edx,
cpuid(0x80000001).edx, or a synthesis thereof.  X86_FEATURE_AMD3D was defined
as the top bit this single uint32_t.

After "Massive cleanup of CPU detection and bug handling",
c->x86_capability became an array with AMD's extended feature leaf split
away from Intel's basic feature leaf.

AMD doc #20734-G states that 3DNow is only enumerated in the extended
feature leaf, and that other vendors where using this bit too.  i.e. AMD
never produced a CPU which set bit 31 in the basic leaf, meaning that
there's nothing to clear out in the first place.

This logic looks like it was relevant in the pre-"Massive cleanup" world
but ought to have been dropped when c->x86_capability was properly split.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 

Linux patch:
  https://lore.kernel.org/lkml/20251126125147.880275-1-andrew.cooper3@citrix.com/T/#u
---
 xen/arch/x86/cpu/amd.c | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index ac49df681c2a..a32e5fa208d5 100644
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -1131,13 +1131,6 @@ static void cf_check init_amd(struct cpuinfo_x86 *c)
 		wrmsrl(MSR_K8_HWCR, value);
 	}
 
-	/*
-	 * Some AMD CPUs duplicate the 3DNow bit in base and extended CPUID
-	 * leaves.  Unfortunately, this aliases PBE on Intel CPUs. Clobber the
-	 * alias, leaving 3DNow in the extended leaf.
-	 */
-	__clear_bit(X86_FEATURE_PBE, c->x86_capability);
-	
 	if (c->x86 == 0xf && c->x86_model < 0x14
 	    && cpu_has(c, X86_FEATURE_LAHF_LM)) {
 		/*
-- 
2.39.5



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        Wed, 26 Nov 2025 09:15:45 -0800 (PST)
From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Oleksii Kurochko 
Subject: [PATCH 3/3] x86/amd: Drop the cpuid_mask_* command line options
Date: Wed, 26 Nov 2025 17:15:39 +0000
Message-Id: <20251126171539.890253-4-andrew.cooper3@citrix.com>
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As noted in the command line documentation, these are both deprecated since
Xen 4.7 (2016), and are not fully effective on AMD CPUs starting from 2011.

Not realised at the time of writing the docs was that their use is also
incompatible with certain errata workarounds which edit the CPUID MSRs after
the levelling defaults are calculated.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 
CC: Oleksii Kurochko 
---
 CHANGELOG.md                      |   4 ++
 docs/misc/xen-command-line.pandoc |  40 ------------
 xen/arch/x86/cpu/amd.c            | 104 ------------------------------
 xen/arch/x86/include/asm/amd.h    |  90 --------------------------
 4 files changed, 4 insertions(+), 234 deletions(-)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index adaad5ee8923..3aaf5986231c 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -11,6 +11,10 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
 ### Added
 
 ### Removed
+ - On x86:
+   - The cpuid_mask_* command line options for legacy AMD CPUs.  These were
+     deprecated in Xen 4.7 and noted not to work correctly with AMD CPUs from
+     2011 onwards.
 
 ## [4.21.0](https://xenbits.xenproject.org/gitweb/?p=xen.git;a=shortlog;h=RELEASE-4.21.0) - 2025-11-19
 
diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index 34004ce282be..e92b6d55b556 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -587,46 +587,6 @@ applicable.  They can all be ignored.
     in its positive form to override Xen's default behaviour on these systems,
     and make the feature fully usable.
 
-### cpuid_mask_cpu
-> `= fam_0f_rev_[cdefg] | fam_10_rev_[bc] | fam_11_rev_b`
-
-> Applicability: AMD
-
-If none of the other **cpuid_mask_\*** options are given, Xen has a set of
-pre-configured masks to make the current processor appear to be
-family/revision specified.
-
-See below for general information on masking.
-
-**Warning: This option is not fully effective on Family 15h processors or
-later.**
-
-### cpuid_mask_ecx
-### cpuid_mask_edx
-### cpuid_mask_ext_ecx
-### cpuid_mask_ext_edx
-### cpuid_mask_l7s0_eax
-### cpuid_mask_l7s0_ebx
-### cpuid_mask_thermal_ecx
-### cpuid_mask_xsave_eax
-> `= `
-
-> Applicability: x86.  Default: `~0` (all bits set)
-
-The availability of these options are model specific.  Some processors don't
-support any of them, and no processor supports all of them.  Xen will ignore
-options on processors which are lacking support.
-
-These options can be used to alter the features visible via the `CPUID`
-instruction.  Settings applied here take effect globally, including for Xen
-and all guests.
-
-Note: Since Xen 4.7, it is no longer necessary to mask a host to create
-migration safety in heterogeneous scenarios.  All necessary CPUID settings
-should be provided in the VM configuration file.  Furthermore, it is
-recommended not to use this option, as doing so causes an unnecessary
-reduction of features at Xen's disposal to manage guests.
-
 ### cpuidle (x86)
 > `= `
 
diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index a32e5fa208d5..2b5aa07a4a13 100644
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -20,32 +20,6 @@
 
 #include "cpu.h"
 
-/*
- * Pre-canned values for overriding the CPUID features 
- * and extended features masks.
- *
- * Currently supported processors:
- * 
- * "fam_0f_rev_c"
- * "fam_0f_rev_d"
- * "fam_0f_rev_e"
- * "fam_0f_rev_f"
- * "fam_0f_rev_g"
- * "fam_10_rev_b"
- * "fam_10_rev_c"
- * "fam_11_rev_b"
- */
-static char __initdata opt_famrev[14];
-string_param("cpuid_mask_cpu", opt_famrev);
-
-static unsigned int __initdata opt_cpuid_mask_l7s0_eax = ~0u;
-integer_param("cpuid_mask_l7s0_eax", opt_cpuid_mask_l7s0_eax);
-static unsigned int __initdata opt_cpuid_mask_l7s0_ebx = ~0u;
-integer_param("cpuid_mask_l7s0_ebx", opt_cpuid_mask_l7s0_ebx);
-
-static unsigned int __initdata opt_cpuid_mask_thermal_ecx = ~0u;
-integer_param("cpuid_mask_thermal_ecx", opt_cpuid_mask_thermal_ecx);
-
 /* 1 = allow, 0 = don't allow guest creation, -1 = don't allow boot */
 int8_t __read_mostly opt_allow_unsafe;
 boolean_param("allow_unsafe", opt_allow_unsafe);
@@ -114,51 +88,6 @@ static void wrmsr_amd(unsigned int msr, uint64_t val)
 		     "d" (val >> 32), "D" (0x9c5a203a));
 }
 
-static const struct cpuidmask {
-	uint16_t fam;
-	char rev[2];
-	unsigned int ecx, edx, ext_ecx, ext_edx;
-} pre_canned[] __initconst = {
-#define CAN(fam, id, rev) { \
-		fam, #rev, \
-		AMD_FEATURES_##id##_REV_##rev##_ECX, \
-		AMD_FEATURES_##id##_REV_##rev##_EDX, \
-		AMD_EXTFEATURES_##id##_REV_##rev##_ECX, \
-		AMD_EXTFEATURES_##id##_REV_##rev##_EDX \
-	}
-#define CAN_FAM(fam, rev) CAN(0x##fam, FAM##fam##h, rev)
-#define CAN_K8(rev)       CAN(0x0f,    K8,          rev)
-	CAN_FAM(11, B),
-	CAN_FAM(10, C),
-	CAN_FAM(10, B),
-	CAN_K8(G),
-	CAN_K8(F),
-	CAN_K8(E),
-	CAN_K8(D),
-	CAN_K8(C)
-#undef CAN
-};
-
-static const struct cpuidmask *__init noinline get_cpuidmask(const char *opt)
-{
-	unsigned long fam;
-	char rev;
-	unsigned int i;
-
-	if (strncmp(opt, "fam_", 4))
-		return NULL;
-	fam = simple_strtoul(opt + 4, &opt, 16);
-	if (strncmp(opt, "_rev_", 5) || !opt[5] || opt[6])
-		return NULL;
-	rev = toupper(opt[5]);
-
-	for (i = 0; i < ARRAY_SIZE(pre_canned); ++i)
-		if (fam == pre_canned[i].fam && rev == *pre_canned[i].rev)
-			return &pre_canned[i];
-
-	return NULL;
-}
-
 /*
  * Sets caps in expected_levelling_cap, probes for the specified mask MSR, and
  * set caps in levelling_caps if it is found.  Processors prior to Fam 10h
@@ -295,8 +224,6 @@ static const typeof(ctxt_switch_masking) __initconst_cf_clobber __used csm =
  */
 static void __init noinline amd_init_levelling(void)
 {
-	const struct cpuidmask *m = NULL;
-
 	/*
 	 * If there's support for CpuidUserDis or CPUID faulting then
 	 * we can skip levelling because CPUID accesses are trapped anyway.
@@ -318,26 +245,11 @@ static void __init noinline amd_init_levelling(void)
 
 	probe_masking_msrs();
 
-	if (*opt_famrev != '\0') {
-		m = get_cpuidmask(opt_famrev);
-
-		if (!m)
-			printk("Invalid processor string: %s\n", opt_famrev);
-	}
-
 	if ((levelling_caps & LCAP_1cd) == LCAP_1cd) {
 		uint32_t ecx, edx, tmp;
 
 		cpuid(0x00000001, &tmp, &tmp, &ecx, &edx);
 
-		if (~(opt_cpuid_mask_ecx & opt_cpuid_mask_edx)) {
-			ecx &= opt_cpuid_mask_ecx;
-			edx &= opt_cpuid_mask_edx;
-		} else if (m) {
-			ecx &= m->ecx;
-			edx &= m->edx;
-		}
-
 		/* Fast-forward bits - Must be set. */
 		if (ecx & cpufeat_mask(X86_FEATURE_XSAVE))
 			ecx |= cpufeat_mask(X86_FEATURE_OSXSAVE);
@@ -351,14 +263,6 @@ static void __init noinline amd_init_levelling(void)
 
 		cpuid(0x80000001, &tmp, &tmp, &ecx, &edx);
 
-		if (~(opt_cpuid_mask_ext_ecx & opt_cpuid_mask_ext_edx)) {
-			ecx &= opt_cpuid_mask_ext_ecx;
-			edx &= opt_cpuid_mask_ext_edx;
-		} else if (m) {
-			ecx &= m->ext_ecx;
-			edx &= m->ext_edx;
-		}
-
 		/* Fast-forward bits - Must be set. */
 		edx |= cpufeat_mask(X86_FEATURE_APIC);
 
@@ -370,20 +274,12 @@ static void __init noinline amd_init_levelling(void)
 
 		cpuid(0x00000007, &eax, &ebx, &tmp, &tmp);
 
-		if (~(opt_cpuid_mask_l7s0_eax & opt_cpuid_mask_l7s0_ebx)) {
-			eax &= opt_cpuid_mask_l7s0_eax;
-			ebx &= opt_cpuid_mask_l7s0_ebx;
-		}
-
 		cpuidmask_defaults._7ab0 &= ((uint64_t)eax << 32) | ebx;
 	}
 
 	if ((levelling_caps & LCAP_6c) == LCAP_6c) {
 		uint32_t ecx = cpuid_ecx(6);
 
-		if (~opt_cpuid_mask_thermal_ecx)
-			ecx &= opt_cpuid_mask_thermal_ecx;
-
 		cpuidmask_defaults._6c &= (~0ULL << 32) | ecx;
 	}
 
diff --git a/xen/arch/x86/include/asm/amd.h b/xen/arch/x86/include/asm/amd.h
index 72df42a6f6c9..4036dd549835 100644
--- a/xen/arch/x86/include/asm/amd.h
+++ b/xen/arch/x86/include/asm/amd.h
@@ -7,96 +7,6 @@
 
 #include 
 
-/* CPUID masked for use by AMD-V Extended Migration */
-
-/* Family 0Fh, Revision C */
-#define AMD_FEATURES_K8_REV_C_ECX  0
-#define AMD_FEATURES_K8_REV_C_EDX (					     \
-	cpufeat_mask(X86_FEATURE_FPU)   | cpufeat_mask(X86_FEATURE_VME)    | \
-	cpufeat_mask(X86_FEATURE_DE)    | cpufeat_mask(X86_FEATURE_PSE)    | \
-	cpufeat_mask(X86_FEATURE_TSC)   | cpufeat_mask(X86_FEATURE_MSR)    | \
-	cpufeat_mask(X86_FEATURE_PAE)   | cpufeat_mask(X86_FEATURE_MCE)    | \
-	cpufeat_mask(X86_FEATURE_CX8)   | cpufeat_mask(X86_FEATURE_APIC)   | \
-	cpufeat_mask(X86_FEATURE_SEP)   | cpufeat_mask(X86_FEATURE_MTRR)   | \
-	cpufeat_mask(X86_FEATURE_PGE)   | cpufeat_mask(X86_FEATURE_MCA)    | \
-	cpufeat_mask(X86_FEATURE_CMOV)  | cpufeat_mask(X86_FEATURE_PAT)    | \
-	cpufeat_mask(X86_FEATURE_PSE36) | cpufeat_mask(X86_FEATURE_CLFLUSH)| \
-	cpufeat_mask(X86_FEATURE_MMX)   | cpufeat_mask(X86_FEATURE_FXSR)   | \
-	cpufeat_mask(X86_FEATURE_SSE)   | cpufeat_mask(X86_FEATURE_SSE2))
-#define AMD_EXTFEATURES_K8_REV_C_ECX  0
-#define AMD_EXTFEATURES_K8_REV_C_EDX  (					       \
-	cpufeat_mask(X86_FEATURE_FPU)	   | cpufeat_mask(X86_FEATURE_VME)   | \
-	cpufeat_mask(X86_FEATURE_DE)	   | cpufeat_mask(X86_FEATURE_PSE)   | \
-	cpufeat_mask(X86_FEATURE_TSC)	   | cpufeat_mask(X86_FEATURE_MSR)   | \
-	cpufeat_mask(X86_FEATURE_PAE)	   | cpufeat_mask(X86_FEATURE_MCE)   | \
-	cpufeat_mask(X86_FEATURE_CX8)	   | cpufeat_mask(X86_FEATURE_APIC)  | \
-	cpufeat_mask(X86_FEATURE_SYSCALL)  | cpufeat_mask(X86_FEATURE_MTRR)  | \
-	cpufeat_mask(X86_FEATURE_PGE)	   | cpufeat_mask(X86_FEATURE_MCA)   | \
-	cpufeat_mask(X86_FEATURE_CMOV)	   | cpufeat_mask(X86_FEATURE_PAT)   | \
-	cpufeat_mask(X86_FEATURE_PSE36)	   | cpufeat_mask(X86_FEATURE_NX)    | \
-	cpufeat_mask(X86_FEATURE_MMXEXT)   | cpufeat_mask(X86_FEATURE_MMX)   | \
-	cpufeat_mask(X86_FEATURE_FXSR)	   | cpufeat_mask(X86_FEATURE_LM)    | \
-	cpufeat_mask(X86_FEATURE_3DNOWEXT) | cpufeat_mask(X86_FEATURE_3DNOW))
-
-/* Family 0Fh, Revision D */
-#define AMD_FEATURES_K8_REV_D_ECX         AMD_FEATURES_K8_REV_C_ECX
-#define AMD_FEATURES_K8_REV_D_EDX         AMD_FEATURES_K8_REV_C_EDX
-#define AMD_EXTFEATURES_K8_REV_D_ECX     (AMD_EXTFEATURES_K8_REV_C_ECX |\
-	cpufeat_mask(X86_FEATURE_LAHF_LM))
-#define AMD_EXTFEATURES_K8_REV_D_EDX     (AMD_EXTFEATURES_K8_REV_C_EDX |\
-	cpufeat_mask(X86_FEATURE_FFXSR))
-
-/* Family 0Fh, Revision E */
-#define AMD_FEATURES_K8_REV_E_ECX        (AMD_FEATURES_K8_REV_D_ECX |	\
-	cpufeat_mask(X86_FEATURE_SSE3))
-#define AMD_FEATURES_K8_REV_E_EDX        (AMD_FEATURES_K8_REV_D_EDX | 	\
-	cpufeat_mask(X86_FEATURE_HTT))
-#define AMD_EXTFEATURES_K8_REV_E_ECX     (AMD_EXTFEATURES_K8_REV_D_ECX |\
-	cpufeat_mask(X86_FEATURE_CMP_LEGACY))
-#define AMD_EXTFEATURES_K8_REV_E_EDX      AMD_EXTFEATURES_K8_REV_D_EDX
-
-/* Family 0Fh, Revision F */
-#define AMD_FEATURES_K8_REV_F_ECX        (AMD_FEATURES_K8_REV_E_ECX | 	\
-	cpufeat_mask(X86_FEATURE_CX16))
-#define AMD_FEATURES_K8_REV_F_EDX         AMD_FEATURES_K8_REV_E_EDX
-#define AMD_EXTFEATURES_K8_REV_F_ECX     (AMD_EXTFEATURES_K8_REV_E_ECX |\
-	cpufeat_mask(X86_FEATURE_SVM) | cpufeat_mask(X86_FEATURE_EXTAPIC) | \
-	cpufeat_mask(X86_FEATURE_CR8_LEGACY))
-#define AMD_EXTFEATURES_K8_REV_F_EDX     (AMD_EXTFEATURES_K8_REV_E_EDX |\
-	cpufeat_mask(X86_FEATURE_RDTSCP))
-
-/* Family 0Fh, Revision G */
-#define AMD_FEATURES_K8_REV_G_ECX         AMD_FEATURES_K8_REV_F_ECX
-#define AMD_FEATURES_K8_REV_G_EDX         AMD_FEATURES_K8_REV_F_EDX
-#define AMD_EXTFEATURES_K8_REV_G_ECX     (AMD_EXTFEATURES_K8_REV_F_ECX |\
-	cpufeat_mask(X86_FEATURE_3DNOWPREFETCH))
-#define AMD_EXTFEATURES_K8_REV_G_EDX      AMD_EXTFEATURES_K8_REV_F_EDX
-
-/* Family 10h, Revision B */
-#define AMD_FEATURES_FAM10h_REV_B_ECX    (AMD_FEATURES_K8_REV_F_ECX | 	\
-	cpufeat_mask(X86_FEATURE_POPCNT) | cpufeat_mask(X86_FEATURE_MONITOR))
-#define AMD_FEATURES_FAM10h_REV_B_EDX     AMD_FEATURES_K8_REV_F_EDX
-#define AMD_EXTFEATURES_FAM10h_REV_B_ECX (AMD_EXTFEATURES_K8_REV_F_ECX |\
-	cpufeat_mask(X86_FEATURE_ABM) | cpufeat_mask(X86_FEATURE_SSE4A) | \
-	cpufeat_mask(X86_FEATURE_MISALIGNSSE) | cpufeat_mask(X86_FEATURE_OSVW) |\
-	cpufeat_mask(X86_FEATURE_IBS))
-#define AMD_EXTFEATURES_FAM10h_REV_B_EDX (AMD_EXTFEATURES_K8_REV_F_EDX |\
-	cpufeat_mask(X86_FEATURE_PAGE1GB))
-
-/* Family 10h, Revision C */
-#define AMD_FEATURES_FAM10h_REV_C_ECX     AMD_FEATURES_FAM10h_REV_B_ECX
-#define AMD_FEATURES_FAM10h_REV_C_EDX     AMD_FEATURES_FAM10h_REV_B_EDX
-#define AMD_EXTFEATURES_FAM10h_REV_C_ECX (AMD_EXTFEATURES_FAM10h_REV_B_ECX |\
-	cpufeat_mask(X86_FEATURE_SKINIT) | cpufeat_mask(X86_FEATURE_WDT))
-#define AMD_EXTFEATURES_FAM10h_REV_C_EDX  AMD_EXTFEATURES_FAM10h_REV_B_EDX
-
-/* Family 11h, Revision B */
-#define AMD_FEATURES_FAM11h_REV_B_ECX     AMD_FEATURES_K8_REV_G_ECX
-#define AMD_FEATURES_FAM11h_REV_B_EDX     AMD_FEATURES_K8_REV_G_EDX
-#define AMD_EXTFEATURES_FAM11h_REV_B_ECX (AMD_EXTFEATURES_K8_REV_G_ECX |\
-	cpufeat_mask(X86_FEATURE_SKINIT))
-#define AMD_EXTFEATURES_FAM11h_REV_B_EDX  AMD_EXTFEATURES_K8_REV_G_EDX
-
 /* AMD errata checking
  *
  * Errata are defined using the AMD_LEGACY_ERRATUM() or AMD_OSVW_ERRATUM()
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH 1/3] x86/cpu: Sort headers
Date: Wed, 26 Nov 2025 17:15:37 +0000
Message-Id: <20251126171539.890253-2-andrew.cooper3@citrix.com>
X-Mailer: git-send-email 2.39.5
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No functional change.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 
---
 xen/arch/x86/cpu/amd.c     | 15 ++++++++-------
 xen/arch/x86/cpu/centaur.c | 10 ++++++----
 xen/arch/x86/cpu/hygon.c   |  1 +
 3 files changed, 15 insertions(+), 11 deletions(-)

diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index 9b02e1ba675c..ac49df681c2a 100644
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -1,21 +1,22 @@
+#include 
 #include 
 #include 
-#include 
 #include 
 #include 
-#include 
-#include 
 #include 
 #include 
+#include 
+#include 
 #include 
+
+#include 
+#include 
+#include 
 #include 
+#include 
 #include 
 #include 
-#include 
 #include 
-#include 
-#include 
-#include 
 
 #include "cpu.h"
 
diff --git a/xen/arch/x86/cpu/centaur.c b/xen/arch/x86/cpu/centaur.c
index 750168d1e81a..d2e7c8ec9912 100644
--- a/xen/arch/x86/cpu/centaur.c
+++ b/xen/arch/x86/cpu/centaur.c
@@ -1,9 +1,11 @@
-#include 
-#include 
 #include 
-#include 
-#include 
+#include 
+#include 
+
 #include 
+#include 
+#include 
+
 #include "cpu.h"
 
 #define ACE_PRESENT	(1 << 6)
diff --git a/xen/arch/x86/cpu/hygon.c b/xen/arch/x86/cpu/hygon.c
index f7508cc8fcb9..68eee0e85f49 100644
--- a/xen/arch/x86/cpu/hygon.c
+++ b/xen/arch/x86/cpu/hygon.c
@@ -1,4 +1,5 @@
 #include 
+
 #include 
 #include 
 
-- 
2.39.5



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Subject: Re: [PATCH 2/3] x86/amd: Stop updating the Zenbleed mitigation
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To: Jan Beulich 
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 <20251126132220.881028-3-andrew.cooper3@citrix.com>
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On 26/11/2025 2:49 pm, Jan Beulich wrote:
> On 26.11.2025 14:22, Andrew Cooper wrote:
>> This was potentially helpful when the chickenbit was the only mitigation and
>> microcode had not been released, but that was two years ago.
>>
>> Zenbleed microcode has been avaialble since December 2023, and the subsequent
>> Entrysign signature vulnerability means that firmware updates block OS-loading
>> and more OS-loadable microcode will be produced for Zen2.
>>
>> i.e. the Zenbleed fix is not going to appear at runtime these days.
>>
>> No practical change.
>>
>> Signed-off-by: Andrew Cooper 
> Acked-by: Jan Beulich 

Thanks.

> on the basis that people unwilling to update their firmware already accept
> being vulnerable. To them this might be a perceived regression, i.e. not
> exactly "No practical change", but we kind of accept that possibility.

It's not quite that easy.  There are plenty of Zen2 systems without a
firmware update.

But, a user who cares about their security will have a more up-to-date
microcode than 2 years old, and will get the Zenbleed fix at boot time.

What I'm trying to say is that the "old ucode at boot, new at runtime"
case doesn't sensibly exist any more.

~Andrew


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 , Xen-devel 
Subject: Re: [PATCH 3/3] x86/amd: Fix race editing DE_CFG
To: Jan Beulich 
References: <20251126132220.881028-1-andrew.cooper3@citrix.com>
 <20251126132220.881028-4-andrew.cooper3@citrix.com>
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On 26/11/2025 4:55 pm, Andrew Cooper wrote:
> On 26/11/2025 3:07 pm, Jan Beulich wrote:
>> On 26.11.2025 14:22, Andrew Cooper wrote:
>>> @@ -1075,6 +966,112 @@ static void cf_check fam17_disable_c6(void *arg)
>>>  	wrmsrl(MSR_AMD_CSTATE_CFG, val & mask);
>>>  }
>>>  
>>> +static bool zenbleed_use_chickenbit(void)
>>> +{
>>> +    unsigned int curr_rev;
>>> +    uint8_t fixed_rev;
>>> +
>>> +    /*
>>> +     * If we're virtualised, we can't do family/model checks safely, and
>>> +     * we likely wouldn't have access to DE_CFG even if we could see a
>>> +     * microcode revision.
>>> +     *
>>> +     * A hypervisor may hide AVX as a stopgap mitigation.  We're not in a
>>> +     * position to care either way.  An admin doesn't want to be disabling
>>> +     * AVX as a mitigation on any build of Xen with this logic present.
>>> +     */
>>> +    if ( cpu_has_hypervisor || boot_cpu_data.family != 0x17 )
>>> +        return false;
>>> +
>>> +    curr_rev = this_cpu(cpu_sig).rev;
>>> +    switch ( curr_rev >> 8 )
>>> +    {
>>> +    case 0x083010: fixed_rev = 0x7a; break;
>>> +    case 0x086001: fixed_rev = 0x0b; break;
>>> +    case 0x086081: fixed_rev = 0x05; break;
>>> +    case 0x087010: fixed_rev = 0x32; break;
>>> +    case 0x08a000: fixed_rev = 0x08; break;
>>> +    default:
>>> +        /*
>>> +         * With the Fam17h check above, most parts getting here are Zen1.
>>> +         * They're not affected.  Assume Zen2 ones making it here are affected
>>> +         * regardless of microcode version.
>>> +         */
>>> +        return is_zen2_uarch();
>>> +    }
>>> +
>>> +    return (uint8_t)curr_rev >= fixed_rev;
>>> +}
>>> +
>>> +void amd_init_de_cfg(const struct cpuinfo_x86 *c)
>>> +{
>>> +    uint64_t val, new = 0;
>>> +
>>> +    /* The MSR doesn't exist on Fam 0xf/0x11. */
>>> +    if ( c->family != 0xf && c->family != 0x11 )
>>> +        return;
>> Comment and code don't match. Did you mean
>>
>>     if ( c->family == 0xf || c->family == 0x11 )
>>         return;
>>
>> (along the lines of what you have in amd_init_lfence_dispatch())?
> Oh - that was a last minute refactor which I didn't do quite correctly. 
> Yes, it should match amd_init_lfence_dispatch().
>
>>> +    /*
>>> +     * On Zen3 (Fam 0x19) and later CPUs, LFENCE is unconditionally dispatch
>>> +     * serialising, and is enumerated in CPUID.  Hypervisors may also
>>> +     * enumerate it when the setting is in place and MSR_AMD64_DE_CFG isn't
>>> +     * available.
>>> +     */
>>> +    if ( !test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability) )
>>> +        new |= AMD64_DE_CFG_LFENCE_SERIALISE;
>>> +
>>> +    /*
>>> +     * If vulnerable to Zenbleed and not mitigated in microcode, use the
>>> +     * bigger hammer.
>>> +     */
>>> +    if ( zenbleed_use_chickenbit() )
>>> +        new |= (1 << 9);
>>> +
>>> +    if ( !new )
>>> +        return;
>>> +
>>> +    if ( rdmsr_safe(MSR_AMD64_DE_CFG, &val) ||
>>> +         (val & new) == new )
>>> +        return;
>>> +
>>> +    /*
>>> +     * DE_CFG is a Core-scoped MSR, and this write is racy.  However, both
>>> +     * threads calculate the new value from state which expected to be
>>> +     * consistent across CPUs and unrelated to the old value, so the result
>>> +     * should be consistent.
>>> +     */
>>> +    wrmsr_safe(MSR_AMD64_DE_CFG, val | new);
>> Either of the bits may be the cause of #GP. In that case we wouldn't set the
>> other bit, even if it may be possible to set it.
> This MSR does not #GP on real hardware.
>
> Also, both of these bits come from instructions AMD have provided,
> saying "set $X in case $Y", which we have honoured as part of the
> conditions for setting up new, which I consider to be a reasonable
> guarantee that no #GP will ensue.
>
> This wrmsr_safe() is covering the virt case, because older Xen and
> Byhive used to disallow writes to it, and OpenBSD would explode as a
> consequence.  Xen's fix was 4175fd3ccd17.
>
> I toyed with the idea of having a tristate de_cfg_writeable, but that
> got very ugly very quickly
>
> The other option would be to ignore DE_CFG entirely under virt.  That's
> what we do for BP_CFG already, and no hypervisor is going to really let
> us have access to it, and it would downgrade to non-safe variants.

In fact, ignoring the virt case for DE_CFG makes this generally nicer.

~Andrew


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Date: Wed, 26 Nov 2025 18:50:52 +0000
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Subject: Re: [PATCH v9 07/10] VMX: support MSR-IMM
To: Jan Beulich ,
 "xen-devel@lists.xenproject.org" 
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On 24/11/2025 3:00 pm, Jan Beulich wrote:
> Hook up the new VM exit codes and handle guest uses of the insns.
>
> Signed-off-by: Jan Beulich 
> ---
> v9: New.
> ---
> The lack of an enable bit is concerning; at least for the nested case
> that's a security issue afaict (when L0 isn't aware of the insns, or more
> specifically the exit codes).

This is why we need support statements of new CPUs.

Intel say that unknown VMExits turning into #UD is the expected course
of action.  That covers all of these cases which don't have an explicit
enable.

This is better than our current behaviour, which is non-architectural
for supervisor code and practically the most unhelpful course of action
going.

Obviously, logic turning on a new feature is expected to handle all the
VMExit cases it can produce.

The corollary for nested virt is that L0 must never make a Virtual
VMExit with case that isn't enabled.  Combined with #UD in the unknown
case, that covers things reasonably well.

> --- a/xen/arch/x86/domain.c
> +++ b/xen/arch/x86/domain.c
> @@ -453,7 +453,7 @@ void domain_cpu_policy_changed(struct do
>      }
>  
>      /* Nested doesn't have the necessary processing, yet. */
> -    if ( nestedhvm_enabled(d) && p->feat.user_msr )
> +    if ( nestedhvm_enabled(d) && (p->feat.user_msr || p->feat.msr_imm) )
>          return /* -EINVAL */;

What processing is missing?  (Aside from correcting the unknown case.)

>  
>      for_each_vcpu ( d, v )
> --- a/xen/arch/x86/hvm/vmx/vmx.c
> +++ b/xen/arch/x86/hvm/vmx/vmx.c
> @@ -4762,6 +4762,7 @@ void asmlinkage vmx_vmexit_handler(struc
>          break;
>  
>      case EXIT_REASON_URDMSR:
> +    case EXIT_REASON_RDMSR_IMM:

Instructions which aren't enumerated in CPUID have reserved behaviour.

The exit handler needs to check cp->feat.msr_imm and inject #UD.

It's not perfect; un-intercepted MSRs will happen to execute correctly
on capable hardware, but most MSRs are not intercepted and it's far
closer to adequate behaviour than omitting the #UD check.

~Andrew


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From: Kevin Lampis 
To: xen-devel@lists.xenproject.org
Cc: jbeulich@suse.com,
	andrew.cooper3@citrix.com,
	roger.pau@citrix.com,
	Kevin Lampis 
Subject: [PATCH v3] x86: Remove x86 prefixed names from cpuinfo for intel.c
Date: Wed, 26 Nov 2025 19:19:45 +0000
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struct cpuinfo_x86
  .x86        => .family
  .x86_vendor => .vendor
  .x86_model  => .model
  .x86_mask   => .stepping

No functional change.

Signed-off-by: Kevin Lampis 
---
Changes in v2:
- Convert the two switch statements in probe_masking_msrs(),
  intel_log_freq() and check_memory_type_self_snoop_errata()
- Requested style changes

Changes in v3:
- Re-order the CPU model names in the switch statements
- Better style changes

 xen/arch/x86/cpu/intel.c                | 99 ++++++++++++++-----------
 xen/arch/x86/include/asm/intel-family.h |  4 +
 2 files changed, 61 insertions(+), 42 deletions(-)

diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c
index 6f71365b7e..ff20f5667f 100644
--- a/xen/arch/x86/cpu/intel.c
+++ b/xen/arch/x86/cpu/intel.c
@@ -86,18 +86,19 @@ static void __init check_memory_type_self_snoop_errata(void)
 	if (!boot_cpu_has(X86_FEATURE_SS))
 		return;
 
-	switch (boot_cpu_data.x86_model) {
-	case 0x0f: /* Merom */
-	case 0x16: /* Merom L */
-	case 0x17: /* Penryn */
-	case 0x1d: /* Dunnington */
-	case 0x1e: /* Nehalem */
-	case 0x1f: /* Auburndale / Havendale */
-	case 0x1a: /* Nehalem EP */
-	case 0x2e: /* Nehalem EX */
-	case 0x25: /* Westmere */
-	case 0x2c: /* Westmere EP */
-	case 0x2a: /* SandyBridge */
+	switch ( boot_cpu_data.vfm )
+	{
+	case INTEL_CORE2_MEROM:
+	case INTEL_CORE2_MEROM_L:
+	case INTEL_CORE2_PENRYN:
+	case INTEL_CORE2_DUNNINGTON:
+	case INTEL_NEHALEM:
+	case INTEL_NEHALEM_G:
+	case INTEL_NEHALEM_EP:
+	case INTEL_NEHALEM_EX:
+	case INTEL_WESTMERE:
+	case INTEL_WESTMERE_EP:
+	case INTEL_SANDYBRIDGE:
 		return;
 	}
 
@@ -137,28 +138,29 @@ static void __init probe_masking_msrs(void)
 	unsigned int exp_msr_basic, exp_msr_ext, exp_msr_xsave;
 
 	/* Only family 6 supports this feature. */
-	if (c->x86 != 6)
+	if (c->family != 6)
 		return;
 
-	switch (c->x86_model) {
-	case 0x17: /* Yorkfield, Wolfdale, Penryn, Harpertown(DP) */
-	case 0x1d: /* Dunnington(MP) */
+	switch ( c->vfm )
+	{
+	case INTEL_CORE2_PENRYN:
+	case INTEL_CORE2_DUNNINGTON:
 		msr_basic = MSR_INTEL_MASK_V1_CPUID1;
 		break;
 
-	case 0x1a: /* Bloomfield, Nehalem-EP(Gainestown) */
-	case 0x1e: /* Clarksfield, Lynnfield, Jasper Forest */
-	case 0x1f: /* Something Nehalem-based - perhaps Auburndale/Havendale? */
-	case 0x25: /* Arrandale, Clarksdale */
-	case 0x2c: /* Gulftown, Westmere-EP */
-	case 0x2e: /* Nehalem-EX(Beckton) */
-	case 0x2f: /* Westmere-EX */
+	case INTEL_NEHALEM:
+	case INTEL_NEHALEM_EP:
+	case INTEL_NEHALEM_EX:
+	case INTEL_NEHALEM_G:
+	case INTEL_WESTMERE:
+	case INTEL_WESTMERE_EP:
+	case INTEL_WESTMERE_EX:
 		msr_basic = MSR_INTEL_MASK_V2_CPUID1;
 		msr_ext   = MSR_INTEL_MASK_V2_CPUID80000001;
 		break;
 
-	case 0x2a: /* SandyBridge */
-	case 0x2d: /* SandyBridge-E, SandyBridge-EN, SandyBridge-EP */
+	case INTEL_SANDYBRIDGE:
+	case INTEL_SANDYBRIDGE_X:
 		msr_basic = MSR_INTEL_MASK_V3_CPUID1;
 		msr_ext   = MSR_INTEL_MASK_V3_CPUID80000001;
 		msr_xsave = MSR_INTEL_MASK_V3_CPUIDD_01;
@@ -191,7 +193,7 @@ static void __init probe_masking_msrs(void)
 	       expected_levelling_cap, levelling_caps,
 	       (expected_levelling_cap ^ levelling_caps) & levelling_caps);
 	printk(XENLOG_WARNING "Fam %#x, model %#x expected (%#x/%#x/%#x), "
-	       "got (%#x/%#x/%#x)\n", c->x86, c->x86_model,
+	       "got (%#x/%#x/%#x)\n", c->family, c->model,
 	       exp_msr_basic, exp_msr_ext, exp_msr_xsave,
 	       msr_basic, msr_ext, msr_xsave);
 	printk(XENLOG_WARNING
@@ -265,7 +267,7 @@ static void __init noinline intel_init_levelling(void)
 	 * so skip it altogether. In the case where Xen is virtualized these
 	 * MSRs may be emulated though, so we allow it in that case.
 	 */
-	if ((boot_cpu_data.x86 != 0xf || cpu_has_hypervisor) &&
+	if ((boot_cpu_data.family != 0xf || cpu_has_hypervisor) &&
 	    probe_cpuid_faulting()) {
 		expected_levelling_cap |= LCAP_faulting;
 		levelling_caps |= LCAP_faulting;
@@ -348,7 +350,7 @@ void intel_unlock_cpuid_leaves(struct cpuinfo_x86 *c)
 static void cf_check early_init_intel(struct cpuinfo_x86 *c)
 {
 	/* Netburst reports 64 bytes clflush size, but does IO in 128 bytes */
-	if (c->x86 == 15 && c->x86_cache_alignment == 64)
+	if (c->family == 15 && c->x86_cache_alignment == 64)
 		c->x86_cache_alignment = 128;
 
 	if (c == &boot_cpu_data &&
@@ -358,8 +360,8 @@ static void cf_check early_init_intel(struct cpuinfo_x86 *c)
 	intel_unlock_cpuid_leaves(c);
 
 	/* CPUID workaround for Intel 0F33/0F34 CPU */
-	if (boot_cpu_data.x86 == 0xF && boot_cpu_data.x86_model == 3 &&
-	    (boot_cpu_data.x86_mask == 3 || boot_cpu_data.x86_mask == 4))
+	if (boot_cpu_data.vfm == INTEL_P4_PRESCOTT &&
+	    (boot_cpu_data.stepping == 3 || boot_cpu_data.stepping == 4))
 		paddr_bits = 36;
 
 	if (c == &boot_cpu_data) {
@@ -458,7 +460,8 @@ static void Intel_errata_workarounds(struct cpuinfo_x86 *c)
 {
 	uint64_t val;
 
-	if ((c->x86 == 15) && (c->x86_model == 1) && (c->x86_mask == 1)) {
+	if ( c->vfm == INTEL_P4_WILLAMETTE && c->stepping == 1 )
+	{
 		val = rdmsr(MSR_IA32_MISC_ENABLE);
 		if ((val & (1 << 9)) == 0) {
 			printk (KERN_INFO "CPU: C0 stepping P4 Xeon detected.\n");
@@ -468,8 +471,10 @@ static void Intel_errata_workarounds(struct cpuinfo_x86 *c)
 		}
 	}
 
-	if (c->x86 == 6 && cpu_has_clflush &&
-	    (c->x86_model == 29 || c->x86_model == 46 || c->x86_model == 47))
+	if ( cpu_has_clflush &&
+	    ( c->vfm == INTEL_CORE2_DUNNINGTON ||
+	      c->vfm == INTEL_NEHALEM_EX ||
+	      c->vfm == INTEL_WESTMERE_EX ))
 		setup_force_cpu_cap(X86_BUG_CLFLUSH_MONITOR);
 
 	probe_c3_errata(c);
@@ -540,7 +545,7 @@ static void intel_log_freq(const struct cpuinfo_x86 *c)
         }
     }
 
-    switch ( c->x86 )
+    switch ( c->family )
     {
         static const unsigned short core_factors[] =
             { 26667, 13333, 20000, 16667, 33333, 10000, 40000 };
@@ -553,10 +558,13 @@ static void intel_log_freq(const struct cpuinfo_x86 *c)
         if ( !max_ratio )
             return;
 
-        switch ( c->x86_model )
+        switch ( c->vfm )
         {
-        case 0x0e: /* Core */
-        case 0x0f: case 0x16: case 0x17: case 0x1d: /* Core2 */
+        case INTEL_CORE_YONAH:
+        case INTEL_CORE2_MEROM:
+        case INTEL_CORE2_MEROM_L:
+        case INTEL_CORE2_PENRYN:
+        case INTEL_CORE2_DUNNINGTON:
             /*
              * PLATFORM_INFO, while not documented for these, appears to exist
              * in at least some cases, but what it holds doesn't match the
@@ -572,8 +580,13 @@ static void intel_log_freq(const struct cpuinfo_x86 *c)
             factor = core_factors[msrval];
             break;
 
-        case 0x1a: case 0x1e: case 0x1f: case 0x2e: /* Nehalem */
-        case 0x25: case 0x2c: case 0x2f: /* Westmere */
+        case INTEL_NEHALEM:
+        case INTEL_NEHALEM_EP:
+        case INTEL_NEHALEM_EX:
+        case INTEL_NEHALEM_G:
+        case INTEL_WESTMERE:
+        case INTEL_WESTMERE_EP:
+        case INTEL_WESTMERE_EX:
             factor = 13333;
             break;
 
@@ -583,7 +596,7 @@ static void intel_log_freq(const struct cpuinfo_x86 *c)
         }
         break;
 
-    case 0xf:
+    case 15:
         if ( rdmsr_safe(MSR_IA32_EBC_FREQUENCY_ID, &msrval) )
             return;
         max_ratio = msrval >> 24;
@@ -657,14 +670,16 @@ static void cf_check init_intel(struct cpuinfo_x86 *c)
 	/* Work around errata */
 	Intel_errata_workarounds(c);
 
-	if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
-		(c->x86 == 0x6 && c->x86_model >= 0x0e))
+	if ( ( c->family == 15 && c->model >= 0x03 ) ||
+	     ( c->family == 6 && c->model >= 0x0e ) )
 		__set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
+
 	if (cpu_has(c, X86_FEATURE_ITSC)) {
 		__set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
 		__set_bit(X86_FEATURE_NONSTOP_TSC, c->x86_capability);
 		__set_bit(X86_FEATURE_TSC_RELIABLE, c->x86_capability);
 	}
+
 	if ( opt_arat &&
 	     ( c->cpuid_level >= 0x00000006 ) &&
 	     ( cpuid_eax(0x00000006) & (1u<<2) ) )
diff --git a/xen/arch/x86/include/asm/intel-family.h b/xen/arch/x86/include/asm/intel-family.h
index d8c0bcc406..c71e744731 100644
--- a/xen/arch/x86/include/asm/intel-family.h
+++ b/xen/arch/x86/include/asm/intel-family.h
@@ -179,6 +179,10 @@
 #define INTEL_XEON_PHI_KNL		IFM(6, 0x57) /* Knights Landing */
 #define INTEL_XEON_PHI_KNM		IFM(6, 0x85) /* Knights Mill */
 
+/* Family 15 - NetBurst */
+#define INTEL_P4_WILLAMETTE		IFM(15, 0x01) /* Also Xeon Foster */
+#define INTEL_P4_PRESCOTT		IFM(15, 0x03)
+
 /* Family 5 */
 #define INTEL_FAM5_QUARK_X1000		0x09 /* Quark X1000 SoC */
 #define INTEL_QUARK_X1000		IFM(5, 0x09) /* Quark X1000 SoC */
-- 
2.51.1



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On 26.11.25 16:32, Oleksii Kurochko wrote:
> From: Roger Pau Monne 
> 
> Move x86's free_domain_struct() to common code since it is shared between
> architectures.
> 
> Move the x86 version of alloc_domain_struct() to common code as most of the
> logic is architecture-independent. To handle the remaining architectural
> differences, introduce arch_alloc_domain_struct_bits() for x86-specific
> allocation requirements.
> 
> No functional change.
> 
> Suggested-By: Jan Beulich 
> [Introduce an arch-specific function instead of using a weak function]
> Signed-off-by: Roger Pau Monné 
> Signed-off-by: Oleksii Kurochko 
> ---
> Changes in v2:
> - CI test results: https://gitlab.com/xen-project/people/olkur/xen/-/pipelines/2180836457
> - Introduce an arch-specific function to handle differences between arch-es
>    in domain structure allocation requirements, instead of relying on a weak
>    function.
> - Add Suggested-by: Jan Beulich .
> - Move free_domain_struct() to common code.
> - Update the commit message.
> ---
>   xen/arch/arm/domain.c                | 17 -----------------
>   xen/arch/ppc/stubs.c                 | 10 ----------
>   xen/arch/riscv/stubs.c               | 10 ----------
>   xen/arch/x86/domain.c                | 15 ++-------------
>   xen/arch/x86/include/asm/pv/domain.h |  3 +++
>   xen/common/domain.c                  | 23 +++++++++++++++++++++++
>   6 files changed, 28 insertions(+), 50 deletions(-)
> 

[...]

> diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
> index 3a21e035f4..34a02f089e 100644
> --- a/xen/arch/x86/domain.c
> +++ b/xen/arch/x86/domain.c
> @@ -463,10 +463,8 @@ void domain_cpu_policy_changed(struct domain *d)
>       }
>   }
>   
> -struct domain *alloc_domain_struct(void)
> +unsigned int arch_alloc_domain_struct_bits(void)
>   {
> -    struct domain *d;
> -
>       /*
>        * Without CONFIG_BIGMEM, we pack the PDX of the domain structure into
>        * a 32-bit field within the page_info structure. Hence the MEMF_bits()
> @@ -492,16 +490,7 @@ struct domain *alloc_domain_struct(void)
>                   - 1;
>   #endif
>   
> -    BUILD_BUG_ON(sizeof(*d) > PAGE_SIZE);
> -    d = alloc_xenheap_pages(0, MEMF_bits(bits));
> -    if ( d != NULL )
> -        clear_page(d);
> -    return d;
> -}
> -
> -void free_domain_struct(struct domain *d)
> -{
> -    free_xenheap_page(d);
> +    return bits;
>   }
>   
>   struct vcpu *alloc_vcpu_struct(const struct domain *d)
> diff --git a/xen/arch/x86/include/asm/pv/domain.h b/xen/arch/x86/include/asm/pv/domain.h
> index 582d004051..6e65bc22fc 100644
> --- a/xen/arch/x86/include/asm/pv/domain.h
> +++ b/xen/arch/x86/include/asm/pv/domain.h
> @@ -18,6 +18,9 @@ extern int8_t opt_pv32;
>   # define opt_pv32 false
>   #endif
>   
> +unsigned int arch_alloc_domain_struct_bits(void);
> +#define arch_alloc_domin_struct_bits arch_alloc_domain_struct_bits

Is it intentionally placed in PV header x86/include/asm/pv/domain.h?

-- 
Best regards,
-grygorii



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From: Grygorii Strashko 
To: "xen-devel@lists.xenproject.org" 
CC: Grygorii Strashko , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , Volodymyr
 Babchuk , Andrew Cooper
	, Anthony PERARD , Jan
 Beulich , =?iso-8859-1?Q?Roger_Pau_Monn=E9?=
	, Shawn Anastasio ,
	Alistair Francis , Bob Eshleman
	, Connor Davis , Oleksii
 Kurochko 
Subject: [XEN][PATCH] xen/x86: move d->arch.physaddr_bitsize field handling to
 pv32
Thread-Topic: [XEN][PATCH] xen/x86: move d->arch.physaddr_bitsize field
 handling to pv32
Thread-Index: AQHcXxVULfwllMsejk6EF7IYoXzQ/g==
Date: Wed, 26 Nov 2025 20:43:33 +0000
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From: Grygorii Strashko 

The d->arch.physaddr_bitsize field is used only by PV32 code, so:

- move domain_set_alloc_bitsize() function into PV32 code and clean up
unused domain_set_alloc_bitsize() defines from other arches

- move domain_clamp_alloc_bitsize() function into PV32 code,
rename to _domain_clamp_alloc_bitsize() and use generic
domain_clamp_alloc_bitsize() define instead, clean up
domain_clamp_alloc_bitsize() defines from !X86 arches

- move d->arch.physaddr_bitsize field under PV32 ifdef

Signed-off-by: Grygorii Strashko 
---
 xen/arch/arm/include/asm/mm.h     |  3 ---
 xen/arch/ppc/include/asm/mm.h     |  3 ---
 xen/arch/riscv/include/asm/mm.h   |  3 ---
 xen/arch/x86/include/asm/domain.h |  2 +-
 xen/arch/x86/include/asm/mm.h     | 10 +++++++---
 xen/arch/x86/pv/dom0_build.c      |  2 ++
 xen/arch/x86/pv/domain.c          | 21 +++++++++++++++++++++
 xen/arch/x86/x86_64/mm.c          | 20 --------------------
 xen/include/xen/mm.h              |  4 ++++
 9 files changed, 35 insertions(+), 33 deletions(-)

diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h
index f702f4a0d676..ec2d2dc5372a 100644
--- a/xen/arch/arm/include/asm/mm.h
+++ b/xen/arch/arm/include/asm/mm.h
@@ -313,9 +313,6 @@ struct page_info *get_page_from_gva(struct vcpu *v, vad=
dr_t va,
 /* Arch-specific portion of memory_op hypercall. */
 long arch_memory_op(int op, XEN_GUEST_HANDLE_PARAM(void) arg);
=20
-#define domain_set_alloc_bitsize(d) ((void)0)
-#define domain_clamp_alloc_bitsize(d, b) (b)
-
 unsigned long domain_get_maximum_gpfn(struct domain *d);
=20
 /* Release all __init and __initdata ranges to be reused */
diff --git a/xen/arch/ppc/include/asm/mm.h b/xen/arch/ppc/include/asm/mm.h
index a33eeec43bd6..91c405876bd0 100644
--- a/xen/arch/ppc/include/asm/mm.h
+++ b/xen/arch/ppc/include/asm/mm.h
@@ -96,9 +96,6 @@ static inline struct page_info *virt_to_page(const void *=
v)
 /* TODO: implement */
 #define mfn_valid(mfn) ({ (void) (mfn); 0; })
=20
-#define domain_set_alloc_bitsize(d) ((void)(d))
-#define domain_clamp_alloc_bitsize(d, b) (b)
-
 #define PFN_ORDER(pfn_) ((pfn_)->v.free.order)
=20
 struct page_info
diff --git a/xen/arch/riscv/include/asm/mm.h b/xen/arch/riscv/include/asm/m=
m.h
index 9283616c0224..e5ea91fa4d0c 100644
--- a/xen/arch/riscv/include/asm/mm.h
+++ b/xen/arch/riscv/include/asm/mm.h
@@ -292,9 +292,6 @@ static inline bool arch_mfns_in_directmap(unsigned long=
 mfn, unsigned long nr)
 /* TODO: implement */
 #define mfn_valid(mfn) ({ (void)(mfn); 0; })
=20
-#define domain_set_alloc_bitsize(d) ((void)(d))
-#define domain_clamp_alloc_bitsize(d, b) ((void)(d), (b))
-
 #define PFN_ORDER(pg) ((pg)->v.free.order)
=20
 extern unsigned char cpu0_boot_stack[];
diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/d=
omain.h
index 5df8c7825333..fca721ac482a 100644
--- a/xen/arch/x86/include/asm/domain.h
+++ b/xen/arch/x86/include/asm/domain.h
@@ -314,10 +314,10 @@ struct arch_domain
=20
 #ifdef CONFIG_PV32
     unsigned int hv_compat_vstart;
-#endif
=20
     /* Maximum physical-address bitwidth supported by this guest. */
     unsigned int physaddr_bitsize;
+#endif
=20
     /* I/O-port admin-specified access capabilities. */
     struct rangeset *ioport_caps;
diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h
index 08153e6d6fa2..8c10458f52c4 100644
--- a/xen/arch/x86/include/asm/mm.h
+++ b/xen/arch/x86/include/asm/mm.h
@@ -619,9 +619,6 @@ void __iomem *ioremap_wc(paddr_t pa, size_t len);
=20
 extern int memory_add(unsigned long spfn, unsigned long epfn, unsigned int=
 pxm);
=20
-void domain_set_alloc_bitsize(struct domain *d);
-unsigned int domain_clamp_alloc_bitsize(struct domain *d, unsigned int bit=
s);
-
 unsigned long domain_get_maximum_gpfn(struct domain *d);
=20
 /* Definition of an mm lock: spinlock with extra fields for debugging */
@@ -659,4 +656,11 @@ static inline bool arch_mfns_in_directmap(unsigned lon=
g mfn, unsigned long nr)
     return (mfn + nr) <=3D (virt_to_mfn(eva - 1) + 1);
 }
=20
+#ifdef CONFIG_PV32
+unsigned int _domain_clamp_alloc_bitsize(const struct domain *d,
+                                         unsigned int bits);
+#define domain_clamp_alloc_bitsize(d, bits)                               =
     \
+    _domain_clamp_alloc_bitsize((d), (bits))
+#endif
+
 #endif /* __ASM_X86_MM_H__ */
diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c
index 21158ce1812e..6748c639cdc1 100644
--- a/xen/arch/x86/pv/dom0_build.c
+++ b/xen/arch/x86/pv/dom0_build.c
@@ -626,6 +626,7 @@ static int __init dom0_construct(const struct boot_doma=
in *bd)
         initrd_mfn =3D paddr_to_pfn(initrd->start);
         mfn =3D initrd_mfn;
         count =3D PFN_UP(initrd_len);
+#ifdef CONFIG_PV32
         if ( d->arch.physaddr_bitsize &&
              ((mfn + count - 1) >> (d->arch.physaddr_bitsize - PAGE_SHIFT)=
) )
         {
@@ -650,6 +651,7 @@ static int __init dom0_construct(const struct boot_doma=
in *bd)
             initrd->start =3D pfn_to_paddr(initrd_mfn);
         }
         else
+#endif
         {
             while ( count-- )
                 if ( assign_pages(mfn_to_page(_mfn(mfn++)), 1, d, 0) )
diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c
index 9c4785c187dd..1cdcb9f89c54 100644
--- a/xen/arch/x86/pv/domain.c
+++ b/xen/arch/x86/pv/domain.c
@@ -230,6 +230,27 @@ unsigned long pv_make_cr4(const struct vcpu *v)
 }
=20
 #ifdef CONFIG_PV32
+unsigned int _domain_clamp_alloc_bitsize(const struct domain *d,
+                                         unsigned int bits)
+{
+    if ( (d =3D=3D NULL) || (d->arch.physaddr_bitsize =3D=3D 0) )
+        return bits;
+    return min(d->arch.physaddr_bitsize, bits);
+}
+
+static void domain_set_alloc_bitsize(struct domain *d)
+{
+    if ( !is_pv_32bit_domain(d) ||
+         (MACH2PHYS_COMPAT_NR_ENTRIES(d) >=3D max_page) ||
+         d->arch.physaddr_bitsize > 0 )
+        return;
+    d->arch.physaddr_bitsize =3D
+        /* 2^n entries can be contained in guest's p2m mapping space */
+        fls(MACH2PHYS_COMPAT_NR_ENTRIES(d)) - 1
+        /* 2^n pages -> 2^(n+PAGE_SHIFT) bits */
+        + PAGE_SHIFT;
+}
+
 int switch_compat(struct domain *d)
 {
     struct vcpu *v;
diff --git a/xen/arch/x86/x86_64/mm.c b/xen/arch/x86/x86_64/mm.c
index d4e6a9c0a2e0..8eadab7933d0 100644
--- a/xen/arch/x86/x86_64/mm.c
+++ b/xen/arch/x86/x86_64/mm.c
@@ -1119,26 +1119,6 @@ unmap:
     return ret;
 }
=20
-void domain_set_alloc_bitsize(struct domain *d)
-{
-    if ( !is_pv_32bit_domain(d) ||
-         (MACH2PHYS_COMPAT_NR_ENTRIES(d) >=3D max_page) ||
-         d->arch.physaddr_bitsize > 0 )
-        return;
-    d->arch.physaddr_bitsize =3D
-        /* 2^n entries can be contained in guest's p2m mapping space */
-        fls(MACH2PHYS_COMPAT_NR_ENTRIES(d)) - 1
-        /* 2^n pages -> 2^(n+PAGE_SHIFT) bits */
-        + PAGE_SHIFT;
-}
-
-unsigned int domain_clamp_alloc_bitsize(struct domain *d, unsigned int bit=
s)
-{
-    if ( (d =3D=3D NULL) || (d->arch.physaddr_bitsize =3D=3D 0) )
-        return bits;
-    return min(d->arch.physaddr_bitsize, bits);
-}
-
 static int transfer_pages_to_heap(struct mem_hotadd_info *info)
 {
     unsigned long i;
diff --git a/xen/include/xen/mm.h b/xen/include/xen/mm.h
index b968f47b87e0..6a66fc7a05c8 100644
--- a/xen/include/xen/mm.h
+++ b/xen/include/xen/mm.h
@@ -641,4 +641,8 @@ static inline void put_page_alloc_ref(struct page_info =
*page)
     }
 }
=20
+#ifndef domain_clamp_alloc_bitsize
+#define domain_clamp_alloc_bitsize(d, b) ((void)(d), (b))
+#endif
+
 #endif /* __XEN_MM_H__ */
--=20
2.34.1


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Date: Wed, 26 Nov 2025 23:44:32 +0200
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v4 02/24] xen: consolidate cpuid library
To: Penny Zheng , xen-devel@lists.xenproject.org
Cc: ray.huang@amd.com, Jan Beulich ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Anthony PERARD , Juergen Gross 
References: <20251121105801.1251262-1-Penny.Zheng@amd.com>
 <20251121105801.1251262-3-Penny.Zheng@amd.com>
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From: Grygorii Strashko 
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On 21.11.25 12:57, Penny Zheng wrote:
> There are some cpuid library functions only referenced in
> XEN_DOMCTL_get{,set}_cpu_policy-case, and shall be wrapped with
> CONFIG_MGMT_HYPERCALLS later, otherwise they will become unreachable when
> MGMT_HYPERCALLS=n, and hence violate Misra 2.1
> - x86_cpu_policy_clear_out_of_range_leaves
>    - zero_leaves
> - x86_cpuid_copy_to_buffer
>    - copy_leaf_to_buffer
> - x86_cpuid_copy_from_buffer
> We seperate these functions by moving other functions to a new file named
> cpuid-generic.c, and modify related Makefile-s to retain same behavior.
> 
> Signed-off-by: Penny Zheng 
> ---
> v3 -> v4:
> - new commit
> ---
>   tools/fuzz/cpu-policy/Makefile               |   2 +-
>   tools/fuzz/x86_instruction_emulator/Makefile |  10 +-
>   tools/libs/guest/Makefile.common             |   2 +-
>   tools/tests/cpu-policy/Makefile              |   2 +-
>   tools/tests/x86_emulator/Makefile            |   2 +-
>   xen/lib/x86/Makefile                         |   1 +
>   xen/lib/x86/cpuid-generic.c                  | 273 +++++++++++++++++++
>   xen/lib/x86/cpuid.c                          | 260 ------------------
>   8 files changed, 283 insertions(+), 269 deletions(-)
>   create mode 100644 xen/lib/x86/cpuid-generic.c

It seems this patch is not required prerequisite, at least definitely not for Patch 3.

In general, i think it can be removed from this series and sent as follow up patch.

-- 
Best regards,
-grygorii



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Hi Milan,

Milan Djokic  writes:

> On 9/1/25 13:06, Milan Djokic wrote:

[...]
>
> Hello Volodymyr, Julien
>
> Sorry for the delayed follow-up on this topic.
> We have changed vIOMMU design from 1-N to N-N mapping between vIOMMU
> and pIOMMU. Considering single vIOMMU model limitation pointed out by
> Volodymyr (SID overlaps), vIOMMU-per-pIOMMU model turned out to be the
> only proper solution.
> Following is the updated design document.
> I have added additional details to the design and performance impact
> sections, and also indicated future improvements. Security
> considerations section is unchanged apart from some minor details
> according to review comments.
> Let me know what do you think about updated design. Once approved, I
> will send the updated vIOMMU patch series.

This looks fine for me. I can't see any immediate flaws here. So let's
get to patches :)


[...]

--=20
WBR, Volodymyr=


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From: Juergen Gross 
To: linux-kernel@vger.kernel.org,
	x86@kernel.org,
	linux-hyperv@vger.kernel.org
Cc: Juergen Gross ,
	Andy Lutomirski ,
	Thomas Gleixner ,
	Ingo Molnar ,
	Borislav Petkov ,
	Dave Hansen ,
	"H. Peter Anvin" ,
	"K. Y. Srinivasan" ,
	Haiyang Zhang ,
	Wei Liu ,
	Dexuan Cui ,
	Peter Zijlstra ,
	Will Deacon ,
	Boqun Feng ,
	Waiman Long ,
	Jiri Kosina ,
	Josh Poimboeuf ,
	Pawan Gupta ,
	Boris Ostrovsky ,
	xen-devel@lists.xenproject.org
Subject: [PATCH v4 01/21] x86/paravirt: Remove not needed includes of paravirt.h
Date: Thu, 27 Nov 2025 08:08:24 +0100
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In some places asm/paravirt.h is included without really being needed.

Remove the related #include statements.

Signed-off-by: Juergen Gross 
Acked-by: Peter Zijlstra (Intel) 
---
V3:
- reinstate the include in mmu_context.h (kernel test robot)
V4:
- reinstate the include in arch/x86/kernel/x86_init.c (Boris Petkov)
---
 arch/x86/entry/entry_64.S             | 1 -
 arch/x86/entry/vsyscall/vsyscall_64.c | 1 -
 arch/x86/hyperv/hv_spinlock.c         | 1 -
 arch/x86/include/asm/apic.h           | 4 ----
 arch/x86/include/asm/highmem.h        | 1 -
 arch/x86/include/asm/mshyperv.h       | 1 -
 arch/x86/include/asm/pgtable_32.h     | 1 -
 arch/x86/include/asm/spinlock.h       | 1 -
 arch/x86/include/asm/tlbflush.h       | 4 ----
 arch/x86/kernel/apm_32.c              | 1 -
 arch/x86/kernel/callthunks.c          | 1 -
 arch/x86/kernel/cpu/bugs.c            | 1 -
 arch/x86/kernel/vsmp_64.c             | 1 -
 arch/x86/lib/cache-smp.c              | 1 -
 arch/x86/mm/init.c                    | 1 -
 arch/x86/xen/spinlock.c               | 1 -
 16 files changed, 22 deletions(-)

diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
index ed04a968cc7d..7a82305405af 100644
--- a/arch/x86/entry/entry_64.S
+++ b/arch/x86/entry/entry_64.S
@@ -30,7 +30,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/x86/entry/vsyscall/vsyscall_64.c b/arch/x86/entry/vsyscall/vsyscall_64.c
index 6e6c0a740837..4bd1e271bb22 100644
--- a/arch/x86/entry/vsyscall/vsyscall_64.c
+++ b/arch/x86/entry/vsyscall/vsyscall_64.c
@@ -37,7 +37,6 @@
 #include 
 #include 
 #include 
-#include 
 
 #define CREATE_TRACE_POINTS
 #include "vsyscall_trace.h"
diff --git a/arch/x86/hyperv/hv_spinlock.c b/arch/x86/hyperv/hv_spinlock.c
index 81b006601370..2a3c2afb0154 100644
--- a/arch/x86/hyperv/hv_spinlock.c
+++ b/arch/x86/hyperv/hv_spinlock.c
@@ -13,7 +13,6 @@
 #include 
 
 #include 
-#include 
 #include 
 #include 
 
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index a26e66d66444..9cd493d467d4 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -90,10 +90,6 @@ static inline bool apic_from_smp_config(void)
 /*
  * Basic functions accessing APICs.
  */
-#ifdef CONFIG_PARAVIRT
-#include 
-#endif
-
 static inline void native_apic_mem_write(u32 reg, u32 v)
 {
 	volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg);
diff --git a/arch/x86/include/asm/highmem.h b/arch/x86/include/asm/highmem.h
index 585bdadba47d..decfaaf52326 100644
--- a/arch/x86/include/asm/highmem.h
+++ b/arch/x86/include/asm/highmem.h
@@ -24,7 +24,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 
diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyperv.h
index 605abd02158d..15e2693b8070 100644
--- a/arch/x86/include/asm/mshyperv.h
+++ b/arch/x86/include/asm/mshyperv.h
@@ -8,7 +8,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 
diff --git a/arch/x86/include/asm/pgtable_32.h b/arch/x86/include/asm/pgtable_32.h
index b612cc57a4d3..acea0cfa2460 100644
--- a/arch/x86/include/asm/pgtable_32.h
+++ b/arch/x86/include/asm/pgtable_32.h
@@ -16,7 +16,6 @@
 #ifndef __ASSEMBLER__
 #include 
 #include 
-#include 
 
 #include 
 #include 
diff --git a/arch/x86/include/asm/spinlock.h b/arch/x86/include/asm/spinlock.h
index 5b6bc7016c22..934632b78d09 100644
--- a/arch/x86/include/asm/spinlock.h
+++ b/arch/x86/include/asm/spinlock.h
@@ -7,7 +7,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 
 /*
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index 00daedfefc1b..238a6b807da5 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -300,10 +300,6 @@ static inline void mm_clear_asid_transition(struct mm_struct *mm) { }
 static inline bool mm_in_asid_transition(struct mm_struct *mm) { return false; }
 #endif /* CONFIG_BROADCAST_TLB_FLUSH */
 
-#ifdef CONFIG_PARAVIRT
-#include 
-#endif
-
 #define flush_tlb_mm(mm)						\
 		flush_tlb_mm_range(mm, 0UL, TLB_FLUSH_ALL, 0UL, true)
 
diff --git a/arch/x86/kernel/apm_32.c b/arch/x86/kernel/apm_32.c
index b37ab1095707..3175d7c134e9 100644
--- a/arch/x86/kernel/apm_32.c
+++ b/arch/x86/kernel/apm_32.c
@@ -229,7 +229,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/x86/kernel/callthunks.c b/arch/x86/kernel/callthunks.c
index a951333c5995..e37728f70322 100644
--- a/arch/x86/kernel/callthunks.c
+++ b/arch/x86/kernel/callthunks.c
@@ -15,7 +15,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index d7fa03bf51b4..cb200930510e 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -25,7 +25,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/x86/kernel/vsmp_64.c b/arch/x86/kernel/vsmp_64.c
index 73511332bb67..25625e3fc183 100644
--- a/arch/x86/kernel/vsmp_64.c
+++ b/arch/x86/kernel/vsmp_64.c
@@ -18,7 +18,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 
 #define TOPOLOGY_REGISTER_OFFSET 0x10
diff --git a/arch/x86/lib/cache-smp.c b/arch/x86/lib/cache-smp.c
index c5c60d07308c..ae5a5dfd33c7 100644
--- a/arch/x86/lib/cache-smp.c
+++ b/arch/x86/lib/cache-smp.c
@@ -1,5 +1,4 @@
 // SPDX-License-Identifier: GPL-2.0
-#include 
 #include 
 #include 
 
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index 8bf6ad4b9400..76537d40493c 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -27,7 +27,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 
 /*
diff --git a/arch/x86/xen/spinlock.c b/arch/x86/xen/spinlock.c
index 8e4efe0fb6f9..fe56646d6919 100644
--- a/arch/x86/xen/spinlock.c
+++ b/arch/x86/xen/spinlock.c
@@ -8,7 +8,6 @@
 #include 
 #include 
 
-#include 
 #include 
 
 #include 
-- 
2.51.0



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From: Juergen Gross 
To: linux-kernel@vger.kernel.org,
	x86@kernel.org,
	linux-hyperv@vger.kernel.org,
	virtualization@lists.linux.dev,
	loongarch@lists.linux.dev,
	linuxppc-dev@lists.ozlabs.org,
	linux-riscv@lists.infradead.org,
	kvm@vger.kernel.org
Cc: Juergen Gross ,
	Andy Lutomirski ,
	Thomas Gleixner ,
	Ingo Molnar ,
	Borislav Petkov ,
	Dave Hansen ,
	"H. Peter Anvin" ,
	"K. Y. Srinivasan" ,
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	Steven Rostedt ,
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	Mel Gorman ,
	Valentin Schneider ,
	linux-arm-kernel@lists.infradead.org,
	Paolo Bonzini ,
	Vitaly Kuznetsov ,
	Stefano Stabellini ,
	Oleksandr Tyshchenko ,
	Daniel Lezcano ,
	Oleg Nesterov 
Subject: [PATCH v4 00/21] paravirt: cleanup and reorg
Date: Thu, 27 Nov 2025 08:08:23 +0100
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Some cleanups and reorg of paravirt code and headers:

- The first 2 patches should be not controversial at all, as they
  remove just some no longer needed #include and struct forward
  declarations.

- The 3rd patch is removing CONFIG_PARAVIRT_DEBUG, which IMO has
  no real value, as it just changes a crash to a BUG() (the stack
  trace will basically be the same). As the maintainer of the main
  paravirt user (Xen) I have never seen this crash/BUG() to happen.

- The 4th patch is just a movement of code.

- I don't know for what reason asm/paravirt_api_clock.h was added,
  as all archs supporting it do it exactly in the same way. Patch
  5 is removing it.

- Patches 6-14 are streamlining the paravirt clock interfaces by
  using a common implementation across architectures where possible
  and by moving the related code into common sched code, as this is
  where it should live.

- Patches 15-20 are more like RFC material preparing the paravirt
  infrastructure to support multiple pv_ops function arrays.
  As a prerequisite for that it makes life in objtool much easier
  with dropping the Xen static initializers of the pv_ops sub-
  structures, which is done in patches 15-17.
  Patches 18-20 are doing the real preparations for multiple pv_ops
  arrays and using those arrays in multiple headers.

- Patch 21 is an example how the new scheme can look like using the
  PV-spinlocks.

Changes in V2:
- new patches 13-18 and 20
- complete rework of patch 21

Changes in V3:
- fixed 2 issues detected by kernel test robot

Changes in V4:
- fixed one build issue

Juergen Gross (21):
  x86/paravirt: Remove not needed includes of paravirt.h
  x86/paravirt: Remove some unneeded struct declarations
  x86/paravirt: Remove PARAVIRT_DEBUG config option
  x86/paravirt: Move thunk macros to paravirt_types.h
  paravirt: Remove asm/paravirt_api_clock.h
  sched: Move clock related paravirt code to kernel/sched
  arm/paravirt: Use common code for paravirt_steal_clock()
  arm64/paravirt: Use common code for paravirt_steal_clock()
  loongarch/paravirt: Use common code for paravirt_steal_clock()
  riscv/paravirt: Use common code for paravirt_steal_clock()
  x86/paravirt: Use common code for paravirt_steal_clock()
  x86/paravirt: Move paravirt_sched_clock() related code into tsc.c
  x86/paravirt: Introduce new paravirt-base.h header
  x86/paravirt: Move pv_native_*() prototypes to paravirt.c
  x86/xen: Drop xen_irq_ops
  x86/xen: Drop xen_cpu_ops
  x86/xen: Drop xen_mmu_ops
  objtool: Allow multiple pv_ops arrays
  x86/paravirt: Allow pv-calls outside paravirt.h
  x86/paravirt: Specify pv_ops array in paravirt macros
  x86/pvlocks: Move paravirt spinlock functions into own header

 arch/Kconfig                                  |   3 +
 arch/arm/Kconfig                              |   1 +
 arch/arm/include/asm/paravirt.h               |  22 --
 arch/arm/include/asm/paravirt_api_clock.h     |   1 -
 arch/arm/kernel/Makefile                      |   1 -
 arch/arm/kernel/paravirt.c                    |  23 --
 arch/arm64/Kconfig                            |   1 +
 arch/arm64/include/asm/paravirt.h             |  14 -
 arch/arm64/include/asm/paravirt_api_clock.h   |   1 -
 arch/arm64/kernel/paravirt.c                  |  11 +-
 arch/loongarch/Kconfig                        |   1 +
 arch/loongarch/include/asm/paravirt.h         |  13 -
 .../include/asm/paravirt_api_clock.h          |   1 -
 arch/loongarch/kernel/paravirt.c              |  10 +-
 arch/powerpc/include/asm/paravirt.h           |   3 -
 arch/powerpc/include/asm/paravirt_api_clock.h |   2 -
 arch/powerpc/platforms/pseries/setup.c        |   4 +-
 arch/riscv/Kconfig                            |   1 +
 arch/riscv/include/asm/paravirt.h             |  14 -
 arch/riscv/include/asm/paravirt_api_clock.h   |   1 -
 arch/riscv/kernel/paravirt.c                  |  11 +-
 arch/x86/Kconfig                              |   8 +-
 arch/x86/entry/entry_64.S                     |   1 -
 arch/x86/entry/vsyscall/vsyscall_64.c         |   1 -
 arch/x86/hyperv/hv_spinlock.c                 |  11 +-
 arch/x86/include/asm/apic.h                   |   4 -
 arch/x86/include/asm/highmem.h                |   1 -
 arch/x86/include/asm/mshyperv.h               |   1 -
 arch/x86/include/asm/paravirt-base.h          |  29 ++
 arch/x86/include/asm/paravirt-spinlock.h      | 146 ++++++++
 arch/x86/include/asm/paravirt.h               | 331 +++++-------------
 arch/x86/include/asm/paravirt_api_clock.h     |   1 -
 arch/x86/include/asm/paravirt_types.h         | 269 +++++++-------
 arch/x86/include/asm/pgtable_32.h             |   1 -
 arch/x86/include/asm/ptrace.h                 |   2 +-
 arch/x86/include/asm/qspinlock.h              |  89 +----
 arch/x86/include/asm/spinlock.h               |   1 -
 arch/x86/include/asm/timer.h                  |   1 +
 arch/x86/include/asm/tlbflush.h               |   4 -
 arch/x86/kernel/Makefile                      |   2 +-
 arch/x86/kernel/apm_32.c                      |   1 -
 arch/x86/kernel/callthunks.c                  |   1 -
 arch/x86/kernel/cpu/bugs.c                    |   1 -
 arch/x86/kernel/cpu/vmware.c                  |   1 +
 arch/x86/kernel/kvm.c                         |  13 +-
 arch/x86/kernel/kvmclock.c                    |   1 +
 arch/x86/kernel/paravirt-spinlocks.c          |  26 +-
 arch/x86/kernel/paravirt.c                    |  42 +--
 arch/x86/kernel/tsc.c                         |  10 +-
 arch/x86/kernel/vsmp_64.c                     |   1 -
 arch/x86/lib/cache-smp.c                      |   1 -
 arch/x86/mm/init.c                            |   1 -
 arch/x86/xen/enlighten_pv.c                   |  82 ++---
 arch/x86/xen/irq.c                            |  20 +-
 arch/x86/xen/mmu_pv.c                         | 100 ++----
 arch/x86/xen/spinlock.c                       |  11 +-
 arch/x86/xen/time.c                           |   2 +
 drivers/clocksource/hyperv_timer.c            |   2 +
 drivers/xen/time.c                            |   2 +-
 include/linux/sched/cputime.h                 |  18 +
 kernel/sched/core.c                           |   5 +
 kernel/sched/cputime.c                        |  13 +
 kernel/sched/sched.h                          |   3 +-
 tools/objtool/arch/x86/decode.c               |   8 +-
 tools/objtool/check.c                         |  78 ++++-
 tools/objtool/include/objtool/check.h         |   2 +
 66 files changed, 661 insertions(+), 826 deletions(-)
 delete mode 100644 arch/arm/include/asm/paravirt.h
 delete mode 100644 arch/arm/include/asm/paravirt_api_clock.h
 delete mode 100644 arch/arm/kernel/paravirt.c
 delete mode 100644 arch/arm64/include/asm/paravirt_api_clock.h
 delete mode 100644 arch/loongarch/include/asm/paravirt_api_clock.h
 delete mode 100644 arch/powerpc/include/asm/paravirt_api_clock.h
 delete mode 100644 arch/riscv/include/asm/paravirt_api_clock.h
 create mode 100644 arch/x86/include/asm/paravirt-base.h
 create mode 100644 arch/x86/include/asm/paravirt-spinlock.h
 delete mode 100644 arch/x86/include/asm/paravirt_api_clock.h

-- 
2.51.0



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To: linux-kernel@vger.kernel.org,
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	kvm@vger.kernel.org
Cc: Juergen Gross ,
	Ajay Kaher ,
	Alexey Makhalov ,
	Broadcom internal kernel review list ,
	Russell King ,
	Catalin Marinas ,
	Will Deacon ,
	Huacai Chen ,
	WANG Xuerui ,
	Madhavan Srinivasan ,
	Michael Ellerman ,
	Nicholas Piggin ,
	Christophe Leroy ,
	Paul Walmsley ,
	Palmer Dabbelt ,
	Albert Ou ,
	Alexandre Ghiti ,
	Thomas Gleixner ,
	Ingo Molnar ,
	Borislav Petkov ,
	Dave Hansen ,
	"H. Peter Anvin" ,
	Paolo Bonzini ,
	Vitaly Kuznetsov ,
	Stefano Stabellini ,
	Oleksandr Tyshchenko ,
	Peter Zijlstra ,
	Juri Lelli ,
	Vincent Guittot ,
	Dietmar Eggemann ,
	Steven Rostedt ,
	Ben Segall ,
	Mel Gorman ,
	Valentin Schneider ,
	linux-arm-kernel@lists.infradead.org,
	xen-devel@lists.xenproject.org
Subject: [PATCH v4 06/21] sched: Move clock related paravirt code to kernel/sched
Date: Thu, 27 Nov 2025 08:08:29 +0100
Message-ID: <20251127070844.21919-7-jgross@suse.com>
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Paravirt clock related functions are available in multiple archs.

In order to share the common parts, move the common static keys
to kernel/sched/ and remove them from the arch specific files.

Make a common paravirt_steal_clock() implementation available in
kernel/sched/cputime.c, guarding it with a new config option
CONFIG_HAVE_PV_STEAL_CLOCK_GEN, which can be selected by an arch
in case it wants to use that common variant.

Signed-off-by: Juergen Gross 
Acked-by: Peter Zijlstra (Intel) 
---
 arch/Kconfig                           |  3 +++
 arch/arm/include/asm/paravirt.h        |  4 ----
 arch/arm/kernel/paravirt.c             |  3 ---
 arch/arm64/include/asm/paravirt.h      |  4 ----
 arch/arm64/kernel/paravirt.c           |  4 +---
 arch/loongarch/include/asm/paravirt.h  |  3 ---
 arch/loongarch/kernel/paravirt.c       |  3 +--
 arch/powerpc/include/asm/paravirt.h    |  3 ---
 arch/powerpc/platforms/pseries/setup.c |  4 +---
 arch/riscv/include/asm/paravirt.h      |  4 ----
 arch/riscv/kernel/paravirt.c           |  4 +---
 arch/x86/include/asm/paravirt.h        |  4 ----
 arch/x86/kernel/cpu/vmware.c           |  1 +
 arch/x86/kernel/kvm.c                  |  1 +
 arch/x86/kernel/paravirt.c             |  3 ---
 drivers/xen/time.c                     |  1 +
 include/linux/sched/cputime.h          | 18 ++++++++++++++++++
 kernel/sched/core.c                    |  5 +++++
 kernel/sched/cputime.c                 | 13 +++++++++++++
 kernel/sched/sched.h                   |  2 +-
 20 files changed, 47 insertions(+), 40 deletions(-)

diff --git a/arch/Kconfig b/arch/Kconfig
index 61130b88964b..e3e39c2efa90 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -1059,6 +1059,9 @@ config HAVE_IRQ_TIME_ACCOUNTING
 	  Archs need to ensure they use a high enough resolution clock to
 	  support irq time accounting and then call enable_sched_clock_irqtime().
 
+config HAVE_PV_STEAL_CLOCK_GEN
+	bool
+
 config HAVE_MOVE_PUD
 	bool
 	help
diff --git a/arch/arm/include/asm/paravirt.h b/arch/arm/include/asm/paravirt.h
index 95d5b0d625cd..69da4bdcf856 100644
--- a/arch/arm/include/asm/paravirt.h
+++ b/arch/arm/include/asm/paravirt.h
@@ -5,10 +5,6 @@
 #ifdef CONFIG_PARAVIRT
 #include 
 
-struct static_key;
-extern struct static_key paravirt_steal_enabled;
-extern struct static_key paravirt_steal_rq_enabled;
-
 u64 dummy_steal_clock(int cpu);
 
 DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock);
diff --git a/arch/arm/kernel/paravirt.c b/arch/arm/kernel/paravirt.c
index 7dd9806369fb..3895a5578852 100644
--- a/arch/arm/kernel/paravirt.c
+++ b/arch/arm/kernel/paravirt.c
@@ -12,9 +12,6 @@
 #include 
 #include 
 
-struct static_key paravirt_steal_enabled;
-struct static_key paravirt_steal_rq_enabled;
-
 static u64 native_steal_clock(int cpu)
 {
 	return 0;
diff --git a/arch/arm64/include/asm/paravirt.h b/arch/arm64/include/asm/paravirt.h
index 9aa193e0e8f2..c9f7590baacb 100644
--- a/arch/arm64/include/asm/paravirt.h
+++ b/arch/arm64/include/asm/paravirt.h
@@ -5,10 +5,6 @@
 #ifdef CONFIG_PARAVIRT
 #include 
 
-struct static_key;
-extern struct static_key paravirt_steal_enabled;
-extern struct static_key paravirt_steal_rq_enabled;
-
 u64 dummy_steal_clock(int cpu);
 
 DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock);
diff --git a/arch/arm64/kernel/paravirt.c b/arch/arm64/kernel/paravirt.c
index aa718d6a9274..943b60ce12f4 100644
--- a/arch/arm64/kernel/paravirt.c
+++ b/arch/arm64/kernel/paravirt.c
@@ -19,14 +19,12 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
 #include 
 
-struct static_key paravirt_steal_enabled;
-struct static_key paravirt_steal_rq_enabled;
-
 static u64 native_steal_clock(int cpu)
 {
 	return 0;
diff --git a/arch/loongarch/include/asm/paravirt.h b/arch/loongarch/include/asm/paravirt.h
index 3f4323603e6a..d219ea0d98ac 100644
--- a/arch/loongarch/include/asm/paravirt.h
+++ b/arch/loongarch/include/asm/paravirt.h
@@ -5,9 +5,6 @@
 #ifdef CONFIG_PARAVIRT
 
 #include 
-struct static_key;
-extern struct static_key paravirt_steal_enabled;
-extern struct static_key paravirt_steal_rq_enabled;
 
 u64 dummy_steal_clock(int cpu);
 DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock);
diff --git a/arch/loongarch/kernel/paravirt.c b/arch/loongarch/kernel/paravirt.c
index b1b51f920b23..8caaa94fed1a 100644
--- a/arch/loongarch/kernel/paravirt.c
+++ b/arch/loongarch/kernel/paravirt.c
@@ -6,11 +6,10 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 static int has_steal_clock;
-struct static_key paravirt_steal_enabled;
-struct static_key paravirt_steal_rq_enabled;
 static DEFINE_PER_CPU(struct kvm_steal_time, steal_time) __aligned(64);
 DEFINE_STATIC_KEY_FALSE(virt_spin_lock_key);
 
diff --git a/arch/powerpc/include/asm/paravirt.h b/arch/powerpc/include/asm/paravirt.h
index b78b82d66057..92343a23ad15 100644
--- a/arch/powerpc/include/asm/paravirt.h
+++ b/arch/powerpc/include/asm/paravirt.h
@@ -23,9 +23,6 @@ static inline bool is_shared_processor(void)
 }
 
 #ifdef CONFIG_PARAVIRT_TIME_ACCOUNTING
-extern struct static_key paravirt_steal_enabled;
-extern struct static_key paravirt_steal_rq_enabled;
-
 u64 pseries_paravirt_steal_clock(int cpu);
 
 static inline u64 paravirt_steal_clock(int cpu)
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
index b10a25325238..50b26ed8432d 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -42,6 +42,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -83,9 +84,6 @@ DEFINE_STATIC_KEY_FALSE(shared_processor);
 EXPORT_SYMBOL(shared_processor);
 
 #ifdef CONFIG_PARAVIRT_TIME_ACCOUNTING
-struct static_key paravirt_steal_enabled;
-struct static_key paravirt_steal_rq_enabled;
-
 static bool steal_acc = true;
 static int __init parse_no_stealacc(char *arg)
 {
diff --git a/arch/riscv/include/asm/paravirt.h b/arch/riscv/include/asm/paravirt.h
index c0abde70fc2c..17e5e39c72c0 100644
--- a/arch/riscv/include/asm/paravirt.h
+++ b/arch/riscv/include/asm/paravirt.h
@@ -5,10 +5,6 @@
 #ifdef CONFIG_PARAVIRT
 #include 
 
-struct static_key;
-extern struct static_key paravirt_steal_enabled;
-extern struct static_key paravirt_steal_rq_enabled;
-
 u64 dummy_steal_clock(int cpu);
 
 DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock);
diff --git a/arch/riscv/kernel/paravirt.c b/arch/riscv/kernel/paravirt.c
index fa6b0339a65d..d3c334f16172 100644
--- a/arch/riscv/kernel/paravirt.c
+++ b/arch/riscv/kernel/paravirt.c
@@ -16,15 +16,13 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
 #include 
 #include 
 
-struct static_key paravirt_steal_enabled;
-struct static_key paravirt_steal_rq_enabled;
-
 static u64 native_steal_clock(int cpu)
 {
 	return 0;
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index 1344d2fb2b86..0ef797ea8440 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -30,10 +30,6 @@ static __always_inline u64 paravirt_sched_clock(void)
 	return static_call(pv_sched_clock)();
 }
 
-struct static_key;
-extern struct static_key paravirt_steal_enabled;
-extern struct static_key paravirt_steal_rq_enabled;
-
 __visible void __native_queued_spin_unlock(struct qspinlock *lock);
 bool pv_is_native_spin_unlock(void);
 __visible bool __native_vcpu_is_preempted(long cpu);
diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c
index cb3f900c46fc..a3e6936839b1 100644
--- a/arch/x86/kernel/cpu/vmware.c
+++ b/arch/x86/kernel/cpu/vmware.c
@@ -29,6 +29,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c
index b67d7c59dca0..d54fd2bc0402 100644
--- a/arch/x86/kernel/kvm.c
+++ b/arch/x86/kernel/kvm.c
@@ -29,6 +29,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index ab3e172dcc69..a3ba4747be1c 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -60,9 +60,6 @@ void __init native_pv_lock_init(void)
 		static_branch_enable(&virt_spin_lock_key);
 }
 
-struct static_key paravirt_steal_enabled;
-struct static_key paravirt_steal_rq_enabled;
-
 static u64 native_steal_clock(int cpu)
 {
 	return 0;
diff --git a/drivers/xen/time.c b/drivers/xen/time.c
index 5683383d2305..d360ded2ef39 100644
--- a/drivers/xen/time.c
+++ b/drivers/xen/time.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
diff --git a/include/linux/sched/cputime.h b/include/linux/sched/cputime.h
index 5f8fd5b24a2e..e90efaf6d26e 100644
--- a/include/linux/sched/cputime.h
+++ b/include/linux/sched/cputime.h
@@ -2,6 +2,7 @@
 #ifndef _LINUX_SCHED_CPUTIME_H
 #define _LINUX_SCHED_CPUTIME_H
 
+#include 
 #include 
 
 /*
@@ -180,4 +181,21 @@ static inline void prev_cputime_init(struct prev_cputime *prev)
 extern unsigned long long
 task_sched_runtime(struct task_struct *task);
 
+#ifdef CONFIG_PARAVIRT
+struct static_key;
+extern struct static_key paravirt_steal_enabled;
+extern struct static_key paravirt_steal_rq_enabled;
+
+#ifdef CONFIG_HAVE_PV_STEAL_CLOCK_GEN
+u64 dummy_steal_clock(int cpu);
+
+DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock);
+
+static inline u64 paravirt_steal_clock(int cpu)
+{
+	return static_call(pv_steal_clock)(cpu);
+}
+#endif
+#endif
+
 #endif /* _LINUX_SCHED_CPUTIME_H */
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index f754a60de848..9e7472646233 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -769,6 +769,11 @@ struct rq *task_rq_lock(struct task_struct *p, struct rq_flags *rf)
  * RQ-clock updating methods:
  */
 
+/* Use CONFIG_PARAVIRT as this will avoid more #ifdef in arch code. */
+#ifdef CONFIG_PARAVIRT
+struct static_key paravirt_steal_rq_enabled;
+#endif
+
 static void update_rq_clock_task(struct rq *rq, s64 delta)
 {
 /*
diff --git a/kernel/sched/cputime.c b/kernel/sched/cputime.c
index 7097de2c8cda..ed8f71e08047 100644
--- a/kernel/sched/cputime.c
+++ b/kernel/sched/cputime.c
@@ -251,6 +251,19 @@ void __account_forceidle_time(struct task_struct *p, u64 delta)
  * ticks are not redelivered later. Due to that, this function may on
  * occasion account more time than the calling functions think elapsed.
  */
+#ifdef CONFIG_PARAVIRT
+struct static_key paravirt_steal_enabled;
+
+#ifdef CONFIG_HAVE_PV_STEAL_CLOCK_GEN
+static u64 native_steal_clock(int cpu)
+{
+	return 0;
+}
+
+DEFINE_STATIC_CALL(pv_steal_clock, native_steal_clock);
+#endif
+#endif
+
 static __always_inline u64 steal_account_process_time(u64 maxtime)
 {
 #ifdef CONFIG_PARAVIRT
diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h
index ccd0d92ff7d1..bd1e5b55ba32 100644
--- a/kernel/sched/sched.h
+++ b/kernel/sched/sched.h
@@ -82,7 +82,7 @@ struct rt_rq;
 struct sched_group;
 struct cpuidle_state;
 
-#ifdef CONFIG_PARAVIRT
+#if defined(CONFIG_PARAVIRT) && !defined(CONFIG_HAVE_PV_STEAL_CLOCK_GEN)
 # include 
 #endif
 
-- 
2.51.0



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From: Juergen Gross 
To: linux-kernel@vger.kernel.org,
	virtualization@lists.linux.dev,
	x86@kernel.org
Cc: Juergen Gross ,
	Russell King ,
	Ajay Kaher ,
	Alexey Makhalov ,
	Broadcom internal kernel review list ,
	Stefano Stabellini ,
	Oleksandr Tyshchenko ,
	linux-arm-kernel@lists.infradead.org,
	xen-devel@lists.xenproject.org,
	"Peter Zijlstra (Intel)" 
Subject: [PATCH v4 07/21] arm/paravirt: Use common code for paravirt_steal_clock()
Date: Thu, 27 Nov 2025 08:08:30 +0100
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Remove the arch specific variant of paravirt_steal_clock() and use
the common one instead.

This allows to remove paravirt.c and paravirt.h from arch/arm.

Until all archs supporting Xen have been switched to the common code
of paravirt_steal_clock(), drivers/xen/time.c needs to include
asm/paravirt.h for those archs, while this is not necessary for arm
any longer.

Signed-off-by: Juergen Gross 
Acked-by: Peter Zijlstra (Intel) 
---
 arch/arm/Kconfig                |  1 +
 arch/arm/include/asm/paravirt.h | 18 ------------------
 arch/arm/kernel/Makefile        |  1 -
 arch/arm/kernel/paravirt.c      | 20 --------------------
 drivers/xen/time.c              |  2 ++
 5 files changed, 3 insertions(+), 39 deletions(-)
 delete mode 100644 arch/arm/include/asm/paravirt.h
 delete mode 100644 arch/arm/kernel/paravirt.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 4fb985b76e97..4a3044acebd6 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1322,6 +1322,7 @@ config UACCESS_WITH_MEMCPY
 
 config PARAVIRT
 	bool "Enable paravirtualization code"
+	select HAVE_PV_STEAL_CLOCK_GEN
 	help
 	  This changes the kernel so it can modify itself when it is run
 	  under a hypervisor, potentially improving performance significantly
diff --git a/arch/arm/include/asm/paravirt.h b/arch/arm/include/asm/paravirt.h
deleted file mode 100644
index 69da4bdcf856..000000000000
--- a/arch/arm/include/asm/paravirt.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_ARM_PARAVIRT_H
-#define _ASM_ARM_PARAVIRT_H
-
-#ifdef CONFIG_PARAVIRT
-#include 
-
-u64 dummy_steal_clock(int cpu);
-
-DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock);
-
-static inline u64 paravirt_steal_clock(int cpu)
-{
-	return static_call(pv_steal_clock)(cpu);
-}
-#endif
-
-#endif
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index afc9de7ef9a1..b36cf0cfd4a7 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -83,7 +83,6 @@ AFLAGS_iwmmxt.o			:= -Wa,-mcpu=iwmmxt
 obj-$(CONFIG_ARM_CPU_TOPOLOGY)  += topology.o
 obj-$(CONFIG_VDSO)		+= vdso.o
 obj-$(CONFIG_EFI)		+= efi.o
-obj-$(CONFIG_PARAVIRT)	+= paravirt.o
 
 obj-y			+= head$(MMUEXT).o
 obj-$(CONFIG_DEBUG_LL)	+= debug.o
diff --git a/arch/arm/kernel/paravirt.c b/arch/arm/kernel/paravirt.c
deleted file mode 100644
index 3895a5578852..000000000000
--- a/arch/arm/kernel/paravirt.c
+++ /dev/null
@@ -1,20 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- *
- * Copyright (C) 2013 Citrix Systems
- *
- * Author: Stefano Stabellini 
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-
-static u64 native_steal_clock(int cpu)
-{
-	return 0;
-}
-
-DEFINE_STATIC_CALL(pv_steal_clock, native_steal_clock);
diff --git a/drivers/xen/time.c b/drivers/xen/time.c
index d360ded2ef39..53b12f5ac465 100644
--- a/drivers/xen/time.c
+++ b/drivers/xen/time.c
@@ -10,7 +10,9 @@
 #include 
 #include 
 
+#ifndef CONFIG_HAVE_PV_STEAL_CLOCK_GEN
 #include 
+#endif
 #include 
 #include 
 
-- 
2.51.0



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From: Juergen Gross 
To: linux-kernel@vger.kernel.org,
	x86@kernel.org,
	virtualization@lists.linux.dev,
	kvm@vger.kernel.org,
	linux-hyperv@vger.kernel.org
Cc: Juergen Gross ,
	Ajay Kaher ,
	Alexey Makhalov ,
	Broadcom internal kernel review list ,
	Thomas Gleixner ,
	Ingo Molnar ,
	Borislav Petkov ,
	Dave Hansen ,
	"H. Peter Anvin" ,
	Paolo Bonzini ,
	Vitaly Kuznetsov ,
	Boris Ostrovsky ,
	"K. Y. Srinivasan" ,
	Haiyang Zhang ,
	Wei Liu ,
	Dexuan Cui ,
	Daniel Lezcano ,
	xen-devel@lists.xenproject.org,
	"Peter Zijlstra (Intel)" 
Subject: [PATCH v4 12/21] x86/paravirt: Move paravirt_sched_clock() related code into tsc.c
Date: Thu, 27 Nov 2025 08:08:35 +0100
Message-ID: <20251127070844.21919-13-jgross@suse.com>
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The only user of paravirt_sched_clock() is in tsc.c, so move the code
from paravirt.c and paravirt.h to tsc.c.

Signed-off-by: Juergen Gross 
Acked-by: Peter Zijlstra (Intel) 
---
 arch/x86/include/asm/paravirt.h    | 12 ------------
 arch/x86/include/asm/timer.h       |  1 +
 arch/x86/kernel/kvmclock.c         |  1 +
 arch/x86/kernel/paravirt.c         |  7 -------
 arch/x86/kernel/tsc.c              | 10 +++++++++-
 arch/x86/xen/time.c                |  1 +
 drivers/clocksource/hyperv_timer.c |  2 ++
 7 files changed, 14 insertions(+), 20 deletions(-)

diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index 766a7cee3d64..b69e75a5c872 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -14,20 +14,8 @@
 #ifndef __ASSEMBLER__
 #include 
 #include 
-#include 
 #include 
 
-u64 dummy_sched_clock(void);
-
-DECLARE_STATIC_CALL(pv_sched_clock, dummy_sched_clock);
-
-void paravirt_set_sched_clock(u64 (*func)(void));
-
-static __always_inline u64 paravirt_sched_clock(void)
-{
-	return static_call(pv_sched_clock)();
-}
-
 __visible void __native_queued_spin_unlock(struct qspinlock *lock);
 bool pv_is_native_spin_unlock(void);
 __visible bool __native_vcpu_is_preempted(long cpu);
diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h
index 23baf8c9b34c..fda18bcb19b4 100644
--- a/arch/x86/include/asm/timer.h
+++ b/arch/x86/include/asm/timer.h
@@ -12,6 +12,7 @@ extern void recalibrate_cpu_khz(void);
 extern int no_timer_check;
 
 extern bool using_native_sched_clock(void);
+void paravirt_set_sched_clock(u64 (*func)(void));
 
 /*
  * We use the full linear equation: f(x) = a + b*x, in order to allow
diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c
index ca0a49eeac4a..b5991d53fc0e 100644
--- a/arch/x86/kernel/kvmclock.c
+++ b/arch/x86/kernel/kvmclock.c
@@ -19,6 +19,7 @@
 #include 
 
 #include 
+#include 
 #include 
 #include 
 
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index 42991d471bf3..4e37db8073f9 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -60,13 +60,6 @@ void __init native_pv_lock_init(void)
 		static_branch_enable(&virt_spin_lock_key);
 }
 
-DEFINE_STATIC_CALL(pv_sched_clock, native_sched_clock);
-
-void paravirt_set_sched_clock(u64 (*func)(void))
-{
-	static_call_update(pv_sched_clock, func);
-}
-
 static noinstr void pv_native_safe_halt(void)
 {
 	native_safe_halt();
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 87e749106dda..554b54783a04 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -266,19 +266,27 @@ u64 native_sched_clock_from_tsc(u64 tsc)
 /* We need to define a real function for sched_clock, to override the
    weak default version */
 #ifdef CONFIG_PARAVIRT
+DEFINE_STATIC_CALL(pv_sched_clock, native_sched_clock);
+
 noinstr u64 sched_clock_noinstr(void)
 {
-	return paravirt_sched_clock();
+	return static_call(pv_sched_clock)();
 }
 
 bool using_native_sched_clock(void)
 {
 	return static_call_query(pv_sched_clock) == native_sched_clock;
 }
+
+void paravirt_set_sched_clock(u64 (*func)(void))
+{
+	static_call_update(pv_sched_clock, func);
+}
 #else
 u64 sched_clock_noinstr(void) __attribute__((alias("native_sched_clock")));
 
 bool using_native_sched_clock(void) { return true; }
+void paravirt_set_sched_clock(u64 (*func)(void)) { }
 #endif
 
 notrace u64 sched_clock(void)
diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c
index e4754b2fa900..6f9f665bb7ae 100644
--- a/arch/x86/xen/time.c
+++ b/arch/x86/xen/time.c
@@ -19,6 +19,7 @@
 #include 
 
 #include 
+#include 
 #include 
 #include 
 #include 
diff --git a/drivers/clocksource/hyperv_timer.c b/drivers/clocksource/hyperv_timer.c
index 10356d4ec55c..e9f5034a1bc8 100644
--- a/drivers/clocksource/hyperv_timer.c
+++ b/drivers/clocksource/hyperv_timer.c
@@ -535,6 +535,8 @@ static __always_inline void hv_setup_sched_clock(void *sched_clock)
 	sched_clock_register(sched_clock, 64, NSEC_PER_SEC);
 }
 #elif defined CONFIG_PARAVIRT
+#include 
+
 static __always_inline void hv_setup_sched_clock(void *sched_clock)
 {
 	/* We're on x86/x64 *and* using PV ops */
-- 
2.51.0



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From: Juergen Gross 
To: linux-kernel@vger.kernel.org,
	x86@kernel.org
Cc: Juergen Gross ,
	Boris Ostrovsky ,
	Thomas Gleixner ,
	Ingo Molnar ,
	Borislav Petkov ,
	Dave Hansen ,
	"H. Peter Anvin" ,
	Josh Poimboeuf ,
	Peter Zijlstra ,
	xen-devel@lists.xenproject.org
Subject: [PATCH v4 16/21] x86/xen: Drop xen_cpu_ops
Date: Thu, 27 Nov 2025 08:08:39 +0100
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Instead of having a pre-filled array xen_cpu_ops for Xen PV paravirt
functions, drop the array and assign each element individually.

This is in preparation of reducing the paravirt include hell by
splitting paravirt.h into multiple more fine grained header files,
which will in turn require to split up the pv_ops vector as well.
Dropping the pre-filled array makes life easier for objtool to
detect missing initializers in multiple pv_ops_ arrays.

Signed-off-by: Juergen Gross 
---
V2:
- new patch
---
 arch/x86/xen/enlighten_pv.c | 82 +++++++++++++++----------------------
 tools/objtool/check.c       |  1 -
 2 files changed, 33 insertions(+), 50 deletions(-)

diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
index 4806cc28d7ca..65df3a0d9cf3 100644
--- a/arch/x86/xen/enlighten_pv.c
+++ b/arch/x86/xen/enlighten_pv.c
@@ -1212,54 +1212,6 @@ static const struct pv_info xen_info __initconst = {
 	.name = "Xen",
 };
 
-static const typeof(pv_ops) xen_cpu_ops __initconst = {
-	.cpu = {
-		.cpuid = xen_cpuid,
-
-		.set_debugreg = xen_set_debugreg,
-		.get_debugreg = xen_get_debugreg,
-
-		.read_cr0 = xen_read_cr0,
-		.write_cr0 = xen_write_cr0,
-
-		.write_cr4 = xen_write_cr4,
-
-		.read_msr = xen_read_msr,
-		.write_msr = xen_write_msr,
-
-		.read_msr_safe = xen_read_msr_safe,
-		.write_msr_safe = xen_write_msr_safe,
-
-		.read_pmc = xen_read_pmc,
-
-		.load_tr_desc = paravirt_nop,
-		.set_ldt = xen_set_ldt,
-		.load_gdt = xen_load_gdt,
-		.load_idt = xen_load_idt,
-		.load_tls = xen_load_tls,
-		.load_gs_index = xen_load_gs_index,
-
-		.alloc_ldt = xen_alloc_ldt,
-		.free_ldt = xen_free_ldt,
-
-		.store_tr = xen_store_tr,
-
-		.write_ldt_entry = xen_write_ldt_entry,
-		.write_gdt_entry = xen_write_gdt_entry,
-		.write_idt_entry = xen_write_idt_entry,
-		.load_sp0 = xen_load_sp0,
-
-#ifdef CONFIG_X86_IOPL_IOPERM
-		.invalidate_io_bitmap = xen_invalidate_io_bitmap,
-		.update_io_bitmap = xen_update_io_bitmap,
-#endif
-		.io_delay = xen_io_delay,
-
-		.start_context_switch = xen_start_context_switch,
-		.end_context_switch = xen_end_context_switch,
-	},
-};
-
 static void xen_restart(char *msg)
 {
 	xen_reboot(SHUTDOWN_reboot);
@@ -1411,7 +1363,39 @@ asmlinkage __visible void __init xen_start_kernel(struct start_info *si)
 
 	/* Install Xen paravirt ops */
 	pv_info = xen_info;
-	pv_ops.cpu = xen_cpu_ops.cpu;
+
+	pv_ops.cpu.cpuid = xen_cpuid;
+	pv_ops.cpu.set_debugreg = xen_set_debugreg;
+	pv_ops.cpu.get_debugreg = xen_get_debugreg;
+	pv_ops.cpu.read_cr0 = xen_read_cr0;
+	pv_ops.cpu.write_cr0 = xen_write_cr0;
+	pv_ops.cpu.write_cr4 = xen_write_cr4;
+	pv_ops.cpu.read_msr = xen_read_msr;
+	pv_ops.cpu.write_msr = xen_write_msr;
+	pv_ops.cpu.read_msr_safe = xen_read_msr_safe;
+	pv_ops.cpu.write_msr_safe = xen_write_msr_safe;
+	pv_ops.cpu.read_pmc = xen_read_pmc;
+	pv_ops.cpu.load_tr_desc = paravirt_nop;
+	pv_ops.cpu.set_ldt = xen_set_ldt;
+	pv_ops.cpu.load_gdt = xen_load_gdt;
+	pv_ops.cpu.load_idt = xen_load_idt;
+	pv_ops.cpu.load_tls = xen_load_tls;
+	pv_ops.cpu.load_gs_index = xen_load_gs_index;
+	pv_ops.cpu.alloc_ldt = xen_alloc_ldt;
+	pv_ops.cpu.free_ldt = xen_free_ldt;
+	pv_ops.cpu.store_tr = xen_store_tr;
+	pv_ops.cpu.write_ldt_entry = xen_write_ldt_entry;
+	pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry;
+	pv_ops.cpu.write_idt_entry = xen_write_idt_entry;
+	pv_ops.cpu.load_sp0 = xen_load_sp0;
+#ifdef CONFIG_X86_IOPL_IOPERM
+	pv_ops.cpu.invalidate_io_bitmap = xen_invalidate_io_bitmap;
+	pv_ops.cpu.update_io_bitmap = xen_update_io_bitmap;
+#endif
+	pv_ops.cpu.io_delay = xen_io_delay;
+	pv_ops.cpu.start_context_switch = xen_start_context_switch;
+	pv_ops.cpu.end_context_switch = xen_end_context_switch;
+
 	xen_init_irq_ops();
 
 	/*
diff --git a/tools/objtool/check.c b/tools/objtool/check.c
index 3fd551c080ee..5c00bca8dc11 100644
--- a/tools/objtool/check.c
+++ b/tools/objtool/check.c
@@ -593,7 +593,6 @@ static int init_pv_ops(struct objtool_file *file)
 {
 	static const char *pv_ops_tables[] = {
 		"pv_ops",
-		"xen_cpu_ops",
 		"xen_mmu_ops",
 		NULL,
 	};
-- 
2.51.0



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From: Juergen Gross 
To: linux-kernel@vger.kernel.org,
	x86@kernel.org,
	virtualization@lists.linux.dev
Cc: Juergen Gross ,
	Thomas Gleixner ,
	Ingo Molnar ,
	Borislav Petkov ,
	Dave Hansen ,
	"H. Peter Anvin" ,
	Ajay Kaher ,
	Alexey Makhalov ,
	Broadcom internal kernel review list ,
	Boris Ostrovsky ,
	Stefano Stabellini ,
	Oleksandr Tyshchenko ,
	xen-devel@lists.xenproject.org,
	"Peter Zijlstra (Intel)" 
Subject: [PATCH v4 11/21] x86/paravirt: Use common code for paravirt_steal_clock()
Date: Thu, 27 Nov 2025 08:08:34 +0100
Message-ID: <20251127070844.21919-12-jgross@suse.com>
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Remove the arch specific variant of paravirt_steal_clock() and use
the common one instead.

With all archs supporting Xen now having been switched to the common
variant, including paravirt.h can be dropped from drivers/xen/time.c.

Signed-off-by: Juergen Gross 
Acked-by: Peter Zijlstra (Intel) 
---
 arch/x86/Kconfig                | 1 +
 arch/x86/include/asm/paravirt.h | 7 -------
 arch/x86/kernel/paravirt.c      | 6 ------
 arch/x86/xen/time.c             | 1 +
 drivers/xen/time.c              | 3 ---
 5 files changed, 2 insertions(+), 16 deletions(-)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index aa279fec5c1f..eee6541a5765 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -795,6 +795,7 @@ if HYPERVISOR_GUEST
 config PARAVIRT
 	bool "Enable paravirtualization code"
 	depends on HAVE_STATIC_CALL
+	select HAVE_PV_STEAL_CLOCK_GEN
 	help
 	  This changes the kernel so it can modify itself when it is run
 	  under a hypervisor, potentially improving performance significantly
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index 0ef797ea8440..766a7cee3d64 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -17,10 +17,8 @@
 #include 
 #include 
 
-u64 dummy_steal_clock(int cpu);
 u64 dummy_sched_clock(void);
 
-DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock);
 DECLARE_STATIC_CALL(pv_sched_clock, dummy_sched_clock);
 
 void paravirt_set_sched_clock(u64 (*func)(void));
@@ -35,11 +33,6 @@ bool pv_is_native_spin_unlock(void);
 __visible bool __native_vcpu_is_preempted(long cpu);
 bool pv_is_native_vcpu_is_preempted(void);
 
-static inline u64 paravirt_steal_clock(int cpu)
-{
-	return static_call(pv_steal_clock)(cpu);
-}
-
 #ifdef CONFIG_PARAVIRT_SPINLOCKS
 void __init paravirt_set_cap(void);
 #endif
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index a3ba4747be1c..42991d471bf3 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -60,12 +60,6 @@ void __init native_pv_lock_init(void)
 		static_branch_enable(&virt_spin_lock_key);
 }
 
-static u64 native_steal_clock(int cpu)
-{
-	return 0;
-}
-
-DEFINE_STATIC_CALL(pv_steal_clock, native_steal_clock);
 DEFINE_STATIC_CALL(pv_sched_clock, native_sched_clock);
 
 void paravirt_set_sched_clock(u64 (*func)(void))
diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c
index 96521b1874ac..e4754b2fa900 100644
--- a/arch/x86/xen/time.c
+++ b/arch/x86/xen/time.c
@@ -16,6 +16,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
diff --git a/drivers/xen/time.c b/drivers/xen/time.c
index 53b12f5ac465..0b18d8a5a2dd 100644
--- a/drivers/xen/time.c
+++ b/drivers/xen/time.c
@@ -10,9 +10,6 @@
 #include 
 #include 
 
-#ifndef CONFIG_HAVE_PV_STEAL_CLOCK_GEN
-#include 
-#endif
 #include 
 #include 
 
-- 
2.51.0



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From: Juergen Gross 
To: linux-kernel@vger.kernel.org,
	x86@kernel.org
Cc: Juergen Gross ,
	Boris Ostrovsky ,
	Thomas Gleixner ,
	Ingo Molnar ,
	Borislav Petkov ,
	Dave Hansen ,
	"H. Peter Anvin" ,
	Josh Poimboeuf ,
	Peter Zijlstra ,
	xen-devel@lists.xenproject.org
Subject: [PATCH v4 15/21] x86/xen: Drop xen_irq_ops
Date: Thu, 27 Nov 2025 08:08:38 +0100
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Instead of having a pre-filled array xen_irq_ops for Xen PV paravirt
functions, drop the array and assign each element individually.

This is in preparation of reducing the paravirt include hell by
splitting paravirt.h into multiple more fine grained header files,
which will in turn require to split up the pv_ops vector as well.
Dropping the pre-filled array makes life easier for objtool to
detect missing initializers in multiple pv_ops_ arrays.

Signed-off-by: Juergen Gross 
---
V2:
- new patch
---
 arch/x86/xen/irq.c    | 20 +++++++-------------
 tools/objtool/check.c |  1 -
 2 files changed, 7 insertions(+), 14 deletions(-)

diff --git a/arch/x86/xen/irq.c b/arch/x86/xen/irq.c
index 39982f955cfe..d8678c3d3971 100644
--- a/arch/x86/xen/irq.c
+++ b/arch/x86/xen/irq.c
@@ -40,20 +40,14 @@ static void xen_halt(void)
 		xen_safe_halt();
 }
 
-static const typeof(pv_ops) xen_irq_ops __initconst = {
-	.irq = {
-		/* Initial interrupt flag handling only called while interrupts off. */
-		.save_fl = __PV_IS_CALLEE_SAVE(paravirt_ret0),
-		.irq_disable = __PV_IS_CALLEE_SAVE(paravirt_nop),
-		.irq_enable = __PV_IS_CALLEE_SAVE(BUG_func),
-
-		.safe_halt = xen_safe_halt,
-		.halt = xen_halt,
-	},
-};
-
 void __init xen_init_irq_ops(void)
 {
-	pv_ops.irq = xen_irq_ops.irq;
+	/* Initial interrupt flag handling only called while interrupts off. */
+	pv_ops.irq.save_fl = __PV_IS_CALLEE_SAVE(paravirt_ret0);
+	pv_ops.irq.irq_disable = __PV_IS_CALLEE_SAVE(paravirt_nop);
+	pv_ops.irq.irq_enable = __PV_IS_CALLEE_SAVE(BUG_func);
+	pv_ops.irq.safe_halt = xen_safe_halt;
+	pv_ops.irq.halt = xen_halt;
+
 	x86_init.irqs.intr_init = xen_init_IRQ;
 }
diff --git a/tools/objtool/check.c b/tools/objtool/check.c
index 9004fbc06769..3fd551c080ee 100644
--- a/tools/objtool/check.c
+++ b/tools/objtool/check.c
@@ -594,7 +594,6 @@ static int init_pv_ops(struct objtool_file *file)
 	static const char *pv_ops_tables[] = {
 		"pv_ops",
 		"xen_cpu_ops",
-		"xen_irq_ops",
 		"xen_mmu_ops",
 		NULL,
 	};
-- 
2.51.0



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From: Juergen Gross 
To: linux-kernel@vger.kernel.org,
	x86@kernel.org,
	linux-hyperv@vger.kernel.org,
	virtualization@lists.linux.dev,
	kvm@vger.kernel.org
Cc: Juergen Gross ,
	"K. Y. Srinivasan" ,
	Haiyang Zhang ,
	Wei Liu ,
	Dexuan Cui ,
	Thomas Gleixner ,
	Ingo Molnar ,
	Borislav Petkov ,
	Dave Hansen ,
	"H. Peter Anvin" ,
	Ajay Kaher ,
	Alexey Makhalov ,
	Broadcom internal kernel review list ,
	Paolo Bonzini ,
	Vitaly Kuznetsov ,
	Boris Ostrovsky ,
	Josh Poimboeuf ,
	Peter Zijlstra ,
	xen-devel@lists.xenproject.org
Subject: [PATCH v4 21/21] x86/pvlocks: Move paravirt spinlock functions into own header
Date: Thu, 27 Nov 2025 08:08:44 +0100
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Instead of having the pv spinlock function definitions in paravirt.h,
move them into the new header paravirt-spinlock.h.

Signed-off-by: Juergen Gross 
---
V2:
- use new header instead of qspinlock.h
- use dedicated pv_ops_lock array
- move more paravirt related lock code
V3:
- hide native_pv_lock_init() with CONFIG_SMP (kernel test robot)
V4:
- don't reference pv_ops_lock without CONFIG_PARAVIRT_SPINLOCKS
  (kernel test robot)
---
 arch/x86/hyperv/hv_spinlock.c            |  10 +-
 arch/x86/include/asm/paravirt-spinlock.h | 146 +++++++++++++++++++++++
 arch/x86/include/asm/paravirt.h          |  61 ----------
 arch/x86/include/asm/paravirt_types.h    |  17 ---
 arch/x86/include/asm/qspinlock.h         |  89 ++------------
 arch/x86/kernel/Makefile                 |   2 +-
 arch/x86/kernel/kvm.c                    |  12 +-
 arch/x86/kernel/paravirt-spinlocks.c     |  26 +++-
 arch/x86/kernel/paravirt.c               |  21 ----
 arch/x86/xen/spinlock.c                  |  10 +-
 tools/objtool/check.c                    |   1 +
 11 files changed, 196 insertions(+), 199 deletions(-)
 create mode 100644 arch/x86/include/asm/paravirt-spinlock.h

diff --git a/arch/x86/hyperv/hv_spinlock.c b/arch/x86/hyperv/hv_spinlock.c
index 2a3c2afb0154..210b494e4de0 100644
--- a/arch/x86/hyperv/hv_spinlock.c
+++ b/arch/x86/hyperv/hv_spinlock.c
@@ -78,11 +78,11 @@ void __init hv_init_spinlocks(void)
 	pr_info("PV spinlocks enabled\n");
 
 	__pv_init_lock_hash();
-	pv_ops.lock.queued_spin_lock_slowpath = __pv_queued_spin_lock_slowpath;
-	pv_ops.lock.queued_spin_unlock = PV_CALLEE_SAVE(__pv_queued_spin_unlock);
-	pv_ops.lock.wait = hv_qlock_wait;
-	pv_ops.lock.kick = hv_qlock_kick;
-	pv_ops.lock.vcpu_is_preempted = PV_CALLEE_SAVE(hv_vcpu_is_preempted);
+	pv_ops_lock.queued_spin_lock_slowpath = __pv_queued_spin_lock_slowpath;
+	pv_ops_lock.queued_spin_unlock = PV_CALLEE_SAVE(__pv_queued_spin_unlock);
+	pv_ops_lock.wait = hv_qlock_wait;
+	pv_ops_lock.kick = hv_qlock_kick;
+	pv_ops_lock.vcpu_is_preempted = PV_CALLEE_SAVE(hv_vcpu_is_preempted);
 }
 
 static __init int hv_parse_nopvspin(char *arg)
diff --git a/arch/x86/include/asm/paravirt-spinlock.h b/arch/x86/include/asm/paravirt-spinlock.h
new file mode 100644
index 000000000000..ed3ed343903d
--- /dev/null
+++ b/arch/x86/include/asm/paravirt-spinlock.h
@@ -0,0 +1,146 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef _ASM_X86_PARAVIRT_SPINLOCK_H
+#define _ASM_X86_PARAVIRT_SPINLOCK_H
+
+#include 
+
+#ifdef CONFIG_SMP
+#include 
+#endif
+
+struct qspinlock;
+
+struct pv_lock_ops {
+	void (*queued_spin_lock_slowpath)(struct qspinlock *lock, u32 val);
+	struct paravirt_callee_save queued_spin_unlock;
+
+	void (*wait)(u8 *ptr, u8 val);
+	void (*kick)(int cpu);
+
+	struct paravirt_callee_save vcpu_is_preempted;
+} __no_randomize_layout;
+
+extern struct pv_lock_ops pv_ops_lock;
+
+#ifdef CONFIG_PARAVIRT_SPINLOCKS
+void __init paravirt_set_cap(void);
+extern void native_queued_spin_lock_slowpath(struct qspinlock *lock, u32 val);
+extern void __pv_init_lock_hash(void);
+extern void __pv_queued_spin_lock_slowpath(struct qspinlock *lock, u32 val);
+extern void __raw_callee_save___pv_queued_spin_unlock(struct qspinlock *lock);
+extern bool nopvspin;
+
+static __always_inline void pv_queued_spin_lock_slowpath(struct qspinlock *lock,
+							 u32 val)
+{
+	PVOP_VCALL2(pv_ops_lock, queued_spin_lock_slowpath, lock, val);
+}
+
+static __always_inline void pv_queued_spin_unlock(struct qspinlock *lock)
+{
+	PVOP_ALT_VCALLEE1(pv_ops_lock, queued_spin_unlock, lock,
+			  "movb $0, (%%" _ASM_ARG1 ");",
+			  ALT_NOT(X86_FEATURE_PVUNLOCK));
+}
+
+static __always_inline bool pv_vcpu_is_preempted(long cpu)
+{
+	return PVOP_ALT_CALLEE1(bool, pv_ops_lock, vcpu_is_preempted, cpu,
+				"xor %%" _ASM_AX ", %%" _ASM_AX ";",
+				ALT_NOT(X86_FEATURE_VCPUPREEMPT));
+}
+
+#define queued_spin_unlock queued_spin_unlock
+/**
+ * queued_spin_unlock - release a queued spinlock
+ * @lock : Pointer to queued spinlock structure
+ *
+ * A smp_store_release() on the least-significant byte.
+ */
+static inline void native_queued_spin_unlock(struct qspinlock *lock)
+{
+	smp_store_release(&lock->locked, 0);
+}
+
+static inline void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val)
+{
+	pv_queued_spin_lock_slowpath(lock, val);
+}
+
+static inline void queued_spin_unlock(struct qspinlock *lock)
+{
+	kcsan_release();
+	pv_queued_spin_unlock(lock);
+}
+
+#define vcpu_is_preempted vcpu_is_preempted
+static inline bool vcpu_is_preempted(long cpu)
+{
+	return pv_vcpu_is_preempted(cpu);
+}
+
+static __always_inline void pv_wait(u8 *ptr, u8 val)
+{
+	PVOP_VCALL2(pv_ops_lock, wait, ptr, val);
+}
+
+static __always_inline void pv_kick(int cpu)
+{
+	PVOP_VCALL1(pv_ops_lock, kick, cpu);
+}
+
+void __raw_callee_save___native_queued_spin_unlock(struct qspinlock *lock);
+bool __raw_callee_save___native_vcpu_is_preempted(long cpu);
+#endif /* CONFIG_PARAVIRT_SPINLOCKS */
+
+void __init native_pv_lock_init(void);
+__visible void __native_queued_spin_unlock(struct qspinlock *lock);
+bool pv_is_native_spin_unlock(void);
+__visible bool __native_vcpu_is_preempted(long cpu);
+bool pv_is_native_vcpu_is_preempted(void);
+
+/*
+ * virt_spin_lock_key - disables by default the virt_spin_lock() hijack.
+ *
+ * Native (and PV wanting native due to vCPU pinning) should keep this key
+ * disabled. Native does not touch the key.
+ *
+ * When in a guest then native_pv_lock_init() enables the key first and
+ * KVM/XEN might conditionally disable it later in the boot process again.
+ */
+DECLARE_STATIC_KEY_FALSE(virt_spin_lock_key);
+
+/*
+ * Shortcut for the queued_spin_lock_slowpath() function that allows
+ * virt to hijack it.
+ *
+ * Returns:
+ *   true - lock has been negotiated, all done;
+ *   false - queued_spin_lock_slowpath() will do its thing.
+ */
+#define virt_spin_lock virt_spin_lock
+static inline bool virt_spin_lock(struct qspinlock *lock)
+{
+	int val;
+
+	if (!static_branch_likely(&virt_spin_lock_key))
+		return false;
+
+	/*
+	 * On hypervisors without PARAVIRT_SPINLOCKS support we fall
+	 * back to a Test-and-Set spinlock, because fair locks have
+	 * horrible lock 'holder' preemption issues.
+	 */
+
+ __retry:
+	val = atomic_read(&lock->val);
+
+	if (val || !atomic_try_cmpxchg(&lock->val, &val, _Q_LOCKED_VAL)) {
+		cpu_relax();
+		goto __retry;
+	}
+
+	return true;
+}
+
+#endif /* _ASM_X86_PARAVIRT_SPINLOCK_H */
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index ec274d13bae0..b21072af731d 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -19,15 +19,6 @@
 #include 
 #include 
 
-__visible void __native_queued_spin_unlock(struct qspinlock *lock);
-bool pv_is_native_spin_unlock(void);
-__visible bool __native_vcpu_is_preempted(long cpu);
-bool pv_is_native_vcpu_is_preempted(void);
-
-#ifdef CONFIG_PARAVIRT_SPINLOCKS
-void __init paravirt_set_cap(void);
-#endif
-
 /* The paravirtualized I/O functions */
 static inline void slow_down_io(void)
 {
@@ -522,46 +513,7 @@ static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
 {
 	pv_ops.mmu.set_fixmap(idx, phys, flags);
 }
-#endif
-
-#if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
-
-static __always_inline void pv_queued_spin_lock_slowpath(struct qspinlock *lock,
-							u32 val)
-{
-	PVOP_VCALL2(pv_ops, lock.queued_spin_lock_slowpath, lock, val);
-}
-
-static __always_inline void pv_queued_spin_unlock(struct qspinlock *lock)
-{
-	PVOP_ALT_VCALLEE1(pv_ops, lock.queued_spin_unlock, lock,
-			  "movb $0, (%%" _ASM_ARG1 ");",
-			  ALT_NOT(X86_FEATURE_PVUNLOCK));
-}
-
-static __always_inline void pv_wait(u8 *ptr, u8 val)
-{
-	PVOP_VCALL2(pv_ops, lock.wait, ptr, val);
-}
-
-static __always_inline void pv_kick(int cpu)
-{
-	PVOP_VCALL1(pv_ops, lock.kick, cpu);
-}
-
-static __always_inline bool pv_vcpu_is_preempted(long cpu)
-{
-	return PVOP_ALT_CALLEE1(bool, pv_ops, lock.vcpu_is_preempted, cpu,
-				"xor %%" _ASM_AX ", %%" _ASM_AX ";",
-				ALT_NOT(X86_FEATURE_VCPUPREEMPT));
-}
 
-void __raw_callee_save___native_queued_spin_unlock(struct qspinlock *lock);
-bool __raw_callee_save___native_vcpu_is_preempted(long cpu);
-
-#endif /* SMP && PARAVIRT_SPINLOCKS */
-
-#ifdef CONFIG_PARAVIRT_XXL
 static __always_inline unsigned long arch_local_save_flags(void)
 {
 	return PVOP_ALT_CALLEE0(unsigned long, pv_ops, irq.save_fl, "pushf; pop %%rax;",
@@ -588,8 +540,6 @@ static __always_inline unsigned long arch_local_irq_save(void)
 }
 #endif
 
-void native_pv_lock_init(void) __init;
-
 #else  /* __ASSEMBLER__ */
 
 #ifdef CONFIG_X86_64
@@ -613,12 +563,6 @@ void native_pv_lock_init(void) __init;
 #endif /* __ASSEMBLER__ */
 #else  /* CONFIG_PARAVIRT */
 # define default_banner x86_init_noop
-
-#ifndef __ASSEMBLER__
-static inline void native_pv_lock_init(void)
-{
-}
-#endif
 #endif /* !CONFIG_PARAVIRT */
 
 #ifndef __ASSEMBLER__
@@ -634,10 +578,5 @@ static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
 }
 #endif
 
-#ifndef CONFIG_PARAVIRT_SPINLOCKS
-static inline void paravirt_set_cap(void)
-{
-}
-#endif
 #endif /* __ASSEMBLER__ */
 #endif /* _ASM_X86_PARAVIRT_H */
diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h
index 01a485f1a7f1..e2b487d35d14 100644
--- a/arch/x86/include/asm/paravirt_types.h
+++ b/arch/x86/include/asm/paravirt_types.h
@@ -184,22 +184,6 @@ struct pv_mmu_ops {
 #endif
 } __no_randomize_layout;
 
-#ifdef CONFIG_SMP
-#include 
-#endif
-
-struct qspinlock;
-
-struct pv_lock_ops {
-	void (*queued_spin_lock_slowpath)(struct qspinlock *lock, u32 val);
-	struct paravirt_callee_save queued_spin_unlock;
-
-	void (*wait)(u8 *ptr, u8 val);
-	void (*kick)(int cpu);
-
-	struct paravirt_callee_save vcpu_is_preempted;
-} __no_randomize_layout;
-
 /* This contains all the paravirt structures: we get a convenient
  * number for each function using the offset which we use to indicate
  * what to patch. */
@@ -207,7 +191,6 @@ struct paravirt_patch_template {
 	struct pv_cpu_ops	cpu;
 	struct pv_irq_ops	irq;
 	struct pv_mmu_ops	mmu;
-	struct pv_lock_ops	lock;
 } __no_randomize_layout;
 
 extern struct paravirt_patch_template pv_ops;
diff --git a/arch/x86/include/asm/qspinlock.h b/arch/x86/include/asm/qspinlock.h
index 68da67df304d..a2668bdf4c84 100644
--- a/arch/x86/include/asm/qspinlock.h
+++ b/arch/x86/include/asm/qspinlock.h
@@ -7,6 +7,9 @@
 #include 
 #include 
 #include 
+#ifdef CONFIG_PARAVIRT
+#include 
+#endif
 
 #define _Q_PENDING_LOOPS	(1 << 9)
 
@@ -27,89 +30,13 @@ static __always_inline u32 queued_fetch_set_pending_acquire(struct qspinlock *lo
 	return val;
 }
 
-#ifdef CONFIG_PARAVIRT_SPINLOCKS
-extern void native_queued_spin_lock_slowpath(struct qspinlock *lock, u32 val);
-extern void __pv_init_lock_hash(void);
-extern void __pv_queued_spin_lock_slowpath(struct qspinlock *lock, u32 val);
-extern void __raw_callee_save___pv_queued_spin_unlock(struct qspinlock *lock);
-extern bool nopvspin;
-
-#define	queued_spin_unlock queued_spin_unlock
-/**
- * queued_spin_unlock - release a queued spinlock
- * @lock : Pointer to queued spinlock structure
- *
- * A smp_store_release() on the least-significant byte.
- */
-static inline void native_queued_spin_unlock(struct qspinlock *lock)
-{
-	smp_store_release(&lock->locked, 0);
-}
-
-static inline void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val)
-{
-	pv_queued_spin_lock_slowpath(lock, val);
-}
-
-static inline void queued_spin_unlock(struct qspinlock *lock)
-{
-	kcsan_release();
-	pv_queued_spin_unlock(lock);
-}
-
-#define vcpu_is_preempted vcpu_is_preempted
-static inline bool vcpu_is_preempted(long cpu)
-{
-	return pv_vcpu_is_preempted(cpu);
-}
+#ifndef CONFIG_PARAVIRT_SPINLOCKS
+static inline void paravirt_set_cap(void) { }
 #endif
 
-#ifdef CONFIG_PARAVIRT
-/*
- * virt_spin_lock_key - disables by default the virt_spin_lock() hijack.
- *
- * Native (and PV wanting native due to vCPU pinning) should keep this key
- * disabled. Native does not touch the key.
- *
- * When in a guest then native_pv_lock_init() enables the key first and
- * KVM/XEN might conditionally disable it later in the boot process again.
- */
-DECLARE_STATIC_KEY_FALSE(virt_spin_lock_key);
-
-/*
- * Shortcut for the queued_spin_lock_slowpath() function that allows
- * virt to hijack it.
- *
- * Returns:
- *   true - lock has been negotiated, all done;
- *   false - queued_spin_lock_slowpath() will do its thing.
- */
-#define virt_spin_lock virt_spin_lock
-static inline bool virt_spin_lock(struct qspinlock *lock)
-{
-	int val;
-
-	if (!static_branch_likely(&virt_spin_lock_key))
-		return false;
-
-	/*
-	 * On hypervisors without PARAVIRT_SPINLOCKS support we fall
-	 * back to a Test-and-Set spinlock, because fair locks have
-	 * horrible lock 'holder' preemption issues.
-	 */
-
- __retry:
-	val = atomic_read(&lock->val);
-
-	if (val || !atomic_try_cmpxchg(&lock->val, &val, _Q_LOCKED_VAL)) {
-		cpu_relax();
-		goto __retry;
-	}
-
-	return true;
-}
-
-#endif /* CONFIG_PARAVIRT */
+#ifndef CONFIG_PARAVIRT
+static inline void native_pv_lock_init(void) { }
+#endif
 
 #include 
 
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index bc184dd38d99..e9aeeeafad17 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -126,7 +126,7 @@ obj-$(CONFIG_DEBUG_NMI_SELFTEST) += nmi_selftest.o
 
 obj-$(CONFIG_KVM_GUEST)		+= kvm.o kvmclock.o
 obj-$(CONFIG_PARAVIRT)		+= paravirt.o
-obj-$(CONFIG_PARAVIRT_SPINLOCKS)+= paravirt-spinlocks.o
+obj-$(CONFIG_PARAVIRT)		+= paravirt-spinlocks.o
 obj-$(CONFIG_PARAVIRT_CLOCK)	+= pvclock.o
 obj-$(CONFIG_X86_PMEM_LEGACY_DEVICE) += pmem.o
 
diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c
index d54fd2bc0402..e767f8ed405a 100644
--- a/arch/x86/kernel/kvm.c
+++ b/arch/x86/kernel/kvm.c
@@ -824,8 +824,10 @@ static void __init kvm_guest_init(void)
 		has_steal_clock = 1;
 		static_call_update(pv_steal_clock, kvm_steal_clock);
 
-		pv_ops.lock.vcpu_is_preempted =
+#ifdef CONFIG_PARAVIRT_SPINLOCKS
+		pv_ops_lock.vcpu_is_preempted =
 			PV_CALLEE_SAVE(__kvm_vcpu_is_preempted);
+#endif
 	}
 
 	if (kvm_para_has_feature(KVM_FEATURE_PV_EOI))
@@ -1121,11 +1123,11 @@ void __init kvm_spinlock_init(void)
 	pr_info("PV spinlocks enabled\n");
 
 	__pv_init_lock_hash();
-	pv_ops.lock.queued_spin_lock_slowpath = __pv_queued_spin_lock_slowpath;
-	pv_ops.lock.queued_spin_unlock =
+	pv_ops_lock.queued_spin_lock_slowpath = __pv_queued_spin_lock_slowpath;
+	pv_ops_lock.queued_spin_unlock =
 		PV_CALLEE_SAVE(__pv_queued_spin_unlock);
-	pv_ops.lock.wait = kvm_wait;
-	pv_ops.lock.kick = kvm_kick_cpu;
+	pv_ops_lock.wait = kvm_wait;
+	pv_ops_lock.kick = kvm_kick_cpu;
 
 	/*
 	 * When PV spinlock is enabled which is preferred over
diff --git a/arch/x86/kernel/paravirt-spinlocks.c b/arch/x86/kernel/paravirt-spinlocks.c
index 9e1ea99ad9df..95452444868f 100644
--- a/arch/x86/kernel/paravirt-spinlocks.c
+++ b/arch/x86/kernel/paravirt-spinlocks.c
@@ -3,12 +3,22 @@
  * Split spinlock implementation out into its own file, so it can be
  * compiled in a FTRACE-compatible way.
  */
+#include 
 #include 
 #include 
 #include 
 
-#include 
+DEFINE_STATIC_KEY_FALSE(virt_spin_lock_key);
 
+#ifdef CONFIG_SMP
+void __init native_pv_lock_init(void)
+{
+	if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
+		static_branch_enable(&virt_spin_lock_key);
+}
+#endif
+
+#ifdef CONFIG_PARAVIRT_SPINLOCKS
 __visible void __native_queued_spin_unlock(struct qspinlock *lock)
 {
 	native_queued_spin_unlock(lock);
@@ -17,7 +27,7 @@ PV_CALLEE_SAVE_REGS_THUNK(__native_queued_spin_unlock);
 
 bool pv_is_native_spin_unlock(void)
 {
-	return pv_ops.lock.queued_spin_unlock.func ==
+	return pv_ops_lock.queued_spin_unlock.func ==
 		__raw_callee_save___native_queued_spin_unlock;
 }
 
@@ -29,7 +39,7 @@ PV_CALLEE_SAVE_REGS_THUNK(__native_vcpu_is_preempted);
 
 bool pv_is_native_vcpu_is_preempted(void)
 {
-	return pv_ops.lock.vcpu_is_preempted.func ==
+	return pv_ops_lock.vcpu_is_preempted.func ==
 		__raw_callee_save___native_vcpu_is_preempted;
 }
 
@@ -41,3 +51,13 @@ void __init paravirt_set_cap(void)
 	if (!pv_is_native_vcpu_is_preempted())
 		setup_force_cpu_cap(X86_FEATURE_VCPUPREEMPT);
 }
+
+struct pv_lock_ops pv_ops_lock = {
+	.queued_spin_lock_slowpath	= native_queued_spin_lock_slowpath,
+	.queued_spin_unlock		= PV_CALLEE_SAVE(__native_queued_spin_unlock),
+	.wait				= paravirt_nop,
+	.kick				= paravirt_nop,
+	.vcpu_is_preempted		= PV_CALLEE_SAVE(__native_vcpu_is_preempted),
+};
+EXPORT_SYMBOL(pv_ops_lock);
+#endif
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index 5dfbd3f55792..a6ed52cae003 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -57,14 +57,6 @@ DEFINE_ASM_FUNC(pv_native_irq_enable, "sti", .noinstr.text);
 DEFINE_ASM_FUNC(pv_native_read_cr2, "mov %cr2, %rax", .noinstr.text);
 #endif
 
-DEFINE_STATIC_KEY_FALSE(virt_spin_lock_key);
-
-void __init native_pv_lock_init(void)
-{
-	if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
-		static_branch_enable(&virt_spin_lock_key);
-}
-
 static noinstr void pv_native_safe_halt(void)
 {
 	native_safe_halt();
@@ -221,19 +213,6 @@ struct paravirt_patch_template pv_ops = {
 
 	.mmu.set_fixmap		= native_set_fixmap,
 #endif /* CONFIG_PARAVIRT_XXL */
-
-#if defined(CONFIG_PARAVIRT_SPINLOCKS)
-	/* Lock ops. */
-#ifdef CONFIG_SMP
-	.lock.queued_spin_lock_slowpath	= native_queued_spin_lock_slowpath,
-	.lock.queued_spin_unlock	=
-				PV_CALLEE_SAVE(__native_queued_spin_unlock),
-	.lock.wait			= paravirt_nop,
-	.lock.kick			= paravirt_nop,
-	.lock.vcpu_is_preempted		=
-				PV_CALLEE_SAVE(__native_vcpu_is_preempted),
-#endif /* SMP */
-#endif
 };
 
 #ifdef CONFIG_PARAVIRT_XXL
diff --git a/arch/x86/xen/spinlock.c b/arch/x86/xen/spinlock.c
index fe56646d6919..83ac24ead289 100644
--- a/arch/x86/xen/spinlock.c
+++ b/arch/x86/xen/spinlock.c
@@ -134,10 +134,10 @@ void __init xen_init_spinlocks(void)
 	printk(KERN_DEBUG "xen: PV spinlocks enabled\n");
 
 	__pv_init_lock_hash();
-	pv_ops.lock.queued_spin_lock_slowpath = __pv_queued_spin_lock_slowpath;
-	pv_ops.lock.queued_spin_unlock =
+	pv_ops_lock.queued_spin_lock_slowpath = __pv_queued_spin_lock_slowpath;
+	pv_ops_lock.queued_spin_unlock =
 		PV_CALLEE_SAVE(__pv_queued_spin_unlock);
-	pv_ops.lock.wait = xen_qlock_wait;
-	pv_ops.lock.kick = xen_qlock_kick;
-	pv_ops.lock.vcpu_is_preempted = PV_CALLEE_SAVE(xen_vcpu_stolen);
+	pv_ops_lock.wait = xen_qlock_wait;
+	pv_ops_lock.kick = xen_qlock_kick;
+	pv_ops_lock.vcpu_is_preempted = PV_CALLEE_SAVE(xen_vcpu_stolen);
 }
diff --git a/tools/objtool/check.c b/tools/objtool/check.c
index d63d0891924a..36e04988babe 100644
--- a/tools/objtool/check.c
+++ b/tools/objtool/check.c
@@ -550,6 +550,7 @@ static struct {
 	int idx_off;
 } pv_ops_tables[] = {
 	{ .name = "pv_ops", },
+	{ .name = "pv_ops_lock", },
 	{ .name = NULL, .idx_off = -1 }
 };
 
-- 
2.51.0



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From: Juergen Gross 
To: linux-kernel@vger.kernel.org,
	x86@kernel.org
Cc: Juergen Gross ,
	Boris Ostrovsky ,
	Thomas Gleixner ,
	Ingo Molnar ,
	Borislav Petkov ,
	Dave Hansen ,
	"H. Peter Anvin" ,
	Josh Poimboeuf ,
	Peter Zijlstra ,
	xen-devel@lists.xenproject.org
Subject: [PATCH v4 17/21] x86/xen: Drop xen_mmu_ops
Date: Thu, 27 Nov 2025 08:08:40 +0100
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Instead of having a pre-filled array xen_mmu_ops for Xen PV paravirt
functions, drop the array and assign each element individually.

This is in preparation of reducing the paravirt include hell by
splitting paravirt.h into multiple more fine grained header files,
which will in turn require to split up the pv_ops vector as well.
Dropping the pre-filled array makes life easier for objtool to
detect missing initializers in multiple pv_ops_ arrays.

Signed-off-by: Juergen Gross 
---
V2:
- new patch
---
 arch/x86/xen/mmu_pv.c | 100 ++++++++++++++++--------------------------
 tools/objtool/check.c |   1 -
 2 files changed, 38 insertions(+), 63 deletions(-)

diff --git a/arch/x86/xen/mmu_pv.c b/arch/x86/xen/mmu_pv.c
index 2a4a8deaf612..9fa00c4a8858 100644
--- a/arch/x86/xen/mmu_pv.c
+++ b/arch/x86/xen/mmu_pv.c
@@ -2175,73 +2175,49 @@ static void xen_leave_lazy_mmu(void)
 	preempt_enable();
 }
 
-static const typeof(pv_ops) xen_mmu_ops __initconst = {
-	.mmu = {
-		.read_cr2 = __PV_IS_CALLEE_SAVE(xen_read_cr2),
-		.write_cr2 = xen_write_cr2,
-
-		.read_cr3 = xen_read_cr3,
-		.write_cr3 = xen_write_cr3_init,
-
-		.flush_tlb_user = xen_flush_tlb,
-		.flush_tlb_kernel = xen_flush_tlb,
-		.flush_tlb_one_user = xen_flush_tlb_one_user,
-		.flush_tlb_multi = xen_flush_tlb_multi,
-
-		.pgd_alloc = xen_pgd_alloc,
-		.pgd_free = xen_pgd_free,
-
-		.alloc_pte = xen_alloc_pte_init,
-		.release_pte = xen_release_pte_init,
-		.alloc_pmd = xen_alloc_pmd_init,
-		.release_pmd = xen_release_pmd_init,
-
-		.set_pte = xen_set_pte_init,
-		.set_pmd = xen_set_pmd_hyper,
-
-		.ptep_modify_prot_start = xen_ptep_modify_prot_start,
-		.ptep_modify_prot_commit = xen_ptep_modify_prot_commit,
-
-		.pte_val = PV_CALLEE_SAVE(xen_pte_val),
-		.pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
-
-		.make_pte = PV_CALLEE_SAVE(xen_make_pte_init),
-		.make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
-
-		.set_pud = xen_set_pud_hyper,
-
-		.make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
-		.pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
-
-		.pud_val = PV_CALLEE_SAVE(xen_pud_val),
-		.make_pud = PV_CALLEE_SAVE(xen_make_pud),
-		.set_p4d = xen_set_p4d_hyper,
-
-		.alloc_pud = xen_alloc_pmd_init,
-		.release_pud = xen_release_pmd_init,
-
-		.p4d_val = PV_CALLEE_SAVE(xen_p4d_val),
-		.make_p4d = PV_CALLEE_SAVE(xen_make_p4d),
-
-		.enter_mmap = xen_enter_mmap,
-		.exit_mmap = xen_exit_mmap,
-
-		.lazy_mode = {
-			.enter = xen_enter_lazy_mmu,
-			.leave = xen_leave_lazy_mmu,
-			.flush = xen_flush_lazy_mmu,
-		},
-
-		.set_fixmap = xen_set_fixmap,
-	},
-};
-
 void __init xen_init_mmu_ops(void)
 {
 	x86_init.paging.pagetable_init = xen_pagetable_init;
 	x86_init.hyper.init_after_bootmem = xen_after_bootmem;
 
-	pv_ops.mmu = xen_mmu_ops.mmu;
+	pv_ops.mmu.read_cr2 = __PV_IS_CALLEE_SAVE(xen_read_cr2);
+	pv_ops.mmu.write_cr2 = xen_write_cr2;
+	pv_ops.mmu.read_cr3 = xen_read_cr3;
+	pv_ops.mmu.write_cr3 = xen_write_cr3_init;
+	pv_ops.mmu.flush_tlb_user = xen_flush_tlb;
+	pv_ops.mmu.flush_tlb_kernel = xen_flush_tlb;
+	pv_ops.mmu.flush_tlb_one_user = xen_flush_tlb_one_user;
+	pv_ops.mmu.flush_tlb_multi = xen_flush_tlb_multi;
+	pv_ops.mmu.pgd_alloc = xen_pgd_alloc;
+	pv_ops.mmu.pgd_free = xen_pgd_free;
+	pv_ops.mmu.alloc_pte = xen_alloc_pte_init;
+	pv_ops.mmu.release_pte = xen_release_pte_init;
+	pv_ops.mmu.alloc_pmd = xen_alloc_pmd_init;
+	pv_ops.mmu.release_pmd = xen_release_pmd_init;
+	pv_ops.mmu.set_pte = xen_set_pte_init;
+	pv_ops.mmu.set_pmd = xen_set_pmd_hyper;
+	pv_ops.mmu.ptep_modify_prot_start = xen_ptep_modify_prot_start;
+	pv_ops.mmu.ptep_modify_prot_commit = xen_ptep_modify_prot_commit;
+	pv_ops.mmu.pte_val = PV_CALLEE_SAVE(xen_pte_val);
+	pv_ops.mmu.pgd_val = PV_CALLEE_SAVE(xen_pgd_val);
+	pv_ops.mmu.make_pte = PV_CALLEE_SAVE(xen_make_pte_init);
+	pv_ops.mmu.make_pgd = PV_CALLEE_SAVE(xen_make_pgd);
+	pv_ops.mmu.set_pud = xen_set_pud_hyper;
+	pv_ops.mmu.make_pmd = PV_CALLEE_SAVE(xen_make_pmd);
+	pv_ops.mmu.pmd_val = PV_CALLEE_SAVE(xen_pmd_val);
+	pv_ops.mmu.pud_val = PV_CALLEE_SAVE(xen_pud_val);
+	pv_ops.mmu.make_pud = PV_CALLEE_SAVE(xen_make_pud);
+	pv_ops.mmu.set_p4d = xen_set_p4d_hyper;
+	pv_ops.mmu.alloc_pud = xen_alloc_pmd_init;
+	pv_ops.mmu.release_pud = xen_release_pmd_init;
+	pv_ops.mmu.p4d_val = PV_CALLEE_SAVE(xen_p4d_val);
+	pv_ops.mmu.make_p4d = PV_CALLEE_SAVE(xen_make_p4d);
+	pv_ops.mmu.enter_mmap = xen_enter_mmap;
+	pv_ops.mmu.exit_mmap = xen_exit_mmap;
+	pv_ops.mmu.lazy_mode.enter = xen_enter_lazy_mmu;
+	pv_ops.mmu.lazy_mode.leave = xen_leave_lazy_mmu;
+	pv_ops.mmu.lazy_mode.flush = xen_flush_lazy_mmu;
+	pv_ops.mmu.set_fixmap = xen_set_fixmap;
 
 	memset(dummy_mapping, 0xff, PAGE_SIZE);
 }
diff --git a/tools/objtool/check.c b/tools/objtool/check.c
index 5c00bca8dc11..1c73426bea9f 100644
--- a/tools/objtool/check.c
+++ b/tools/objtool/check.c
@@ -593,7 +593,6 @@ static int init_pv_ops(struct objtool_file *file)
 {
 	static const char *pv_ops_tables[] = {
 		"pv_ops",
-		"xen_mmu_ops",
 		NULL,
 	};
 	const char *pv_ops;
-- 
2.51.0



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Date: Thu, 27 Nov 2025 08:39:20 +0100
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Subject: Re: [PATCH 1/3] x86/amd: Use setup_force_cpu_cap() for BTC_NO
To: Andrew Cooper 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Xen-devel 
References: <20251126132220.881028-1-andrew.cooper3@citrix.com>
 <20251126132220.881028-2-andrew.cooper3@citrix.com>
 
 
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On 26.11.2025 17:33, Andrew Cooper wrote:
> On 26/11/2025 3:25 pm, Jan Beulich wrote:
>> On 26.11.2025 16:12, Andrew Cooper wrote:
>>> On 26/11/2025 2:19 pm, Jan Beulich wrote:
>>>> On 26.11.2025 14:22, Andrew Cooper wrote:
>>>>> When re-scanning features,
>>>> What exactly do you mean with this, outside of XenServer (i.e. upstream)? The
>>>> only thing I can think of is recheck_cpu_features(), which calls identify_cpu()
>>>> and hence init_amd(). Thus ...
>>>>
>>>>> forced caps are taken into account but unforced
>>>>> such as this are not.  This causes BTC_NO to go missing, and for the system to
>>>>> appear to have lost features.
>>>> ... I don't really follow where features might be lost.
>>> Well - it's a feature that we started upstreaming and I still hope to
>>> finish in some copious free time.
>>>
>>> Already upstream, we rescan the Raw CPU policy after microcode load. 
>>> That has had fixes such as dis-engaging CPUID Masking/Overriding so the
>>> Raw policy comes out accurate.
>> Yet that doesn't take forced features into account afaics. So at the very
>> least this needs to come with a description which more accurately describes
>> what (if anything) is actually being fixed / altered upstream.
> 
> I don't know what more you want me to say.  It's not a problem per say
> in upstream, but it does come about because BTC_NO is handled
> inconsistently to the other FOO_NO bits.

First, it still is unclear to me how "When re-scanning features, forced caps
are taken into account" applies to upstream. As a a result, "This causes
BTC_NO to go missing" is unclear as well. Both aspects need to be clear from
the description alone.

Further, while indeed BTC_NO is the only *_NO one set by means of __set_bit(),
an (apparently) similar issue exists for SRSO_US_NO, in it being cleared by
__clear_bit(). How that goes together with the feature elsewhere being forced
on I can't immediately tell.

> recheck_cpu_features() papers over the issue by re-invoking
> identify_cpu().

This isn't papering over anything. We do the normal identification, to then
compare its results with the ones obtained during boot.

>  It's necessary for S3 resume because all of
> init_$VENDOR() really is needed, but it looks bogus in
> smp_store_cpu_info() because it's repeating work done immediately prior
> in start_secondary().

What is it that is done there "immediately prior"? I see smp_callin()
calling smp_store_cpu_info() alone, which in turn calls either
identify_cpu() or recheck_cpu_features(). Nothing being repeated afaics.
There is an earlier call to cpu_init(), but that doesn't collect any
feature info. (Perhaps we have a latent ordering problem there, as in
principle feature dependent setup would better come after determining what
features are available. The only feature dependent operations there look to
be PKRU clearing and skinit_enable_intr(), so hopefully not an active issue;
certainly not as long as the system is symmetric.)

Jan


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Subject: Re: [PATCH 3/3] x86/amd: Fix race editing DE_CFG
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 Xen-devel 
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On 26.11.2025 18:56, Andrew Cooper wrote:
> On 26/11/2025 4:55 pm, Andrew Cooper wrote:
>> On 26/11/2025 3:07 pm, Jan Beulich wrote:
>>> On 26.11.2025 14:22, Andrew Cooper wrote:
>>>> @@ -1075,6 +966,112 @@ static void cf_check fam17_disable_c6(void *arg)
>>>>  	wrmsrl(MSR_AMD_CSTATE_CFG, val & mask);
>>>>  }
>>>>  
>>>> +static bool zenbleed_use_chickenbit(void)
>>>> +{
>>>> +    unsigned int curr_rev;
>>>> +    uint8_t fixed_rev;
>>>> +
>>>> +    /*
>>>> +     * If we're virtualised, we can't do family/model checks safely, and
>>>> +     * we likely wouldn't have access to DE_CFG even if we could see a
>>>> +     * microcode revision.
>>>> +     *
>>>> +     * A hypervisor may hide AVX as a stopgap mitigation.  We're not in a
>>>> +     * position to care either way.  An admin doesn't want to be disabling
>>>> +     * AVX as a mitigation on any build of Xen with this logic present.
>>>> +     */
>>>> +    if ( cpu_has_hypervisor || boot_cpu_data.family != 0x17 )
>>>> +        return false;
>>>> +
>>>> +    curr_rev = this_cpu(cpu_sig).rev;
>>>> +    switch ( curr_rev >> 8 )
>>>> +    {
>>>> +    case 0x083010: fixed_rev = 0x7a; break;
>>>> +    case 0x086001: fixed_rev = 0x0b; break;
>>>> +    case 0x086081: fixed_rev = 0x05; break;
>>>> +    case 0x087010: fixed_rev = 0x32; break;
>>>> +    case 0x08a000: fixed_rev = 0x08; break;
>>>> +    default:
>>>> +        /*
>>>> +         * With the Fam17h check above, most parts getting here are Zen1.
>>>> +         * They're not affected.  Assume Zen2 ones making it here are affected
>>>> +         * regardless of microcode version.
>>>> +         */
>>>> +        return is_zen2_uarch();
>>>> +    }
>>>> +
>>>> +    return (uint8_t)curr_rev >= fixed_rev;
>>>> +}
>>>> +
>>>> +void amd_init_de_cfg(const struct cpuinfo_x86 *c)
>>>> +{
>>>> +    uint64_t val, new = 0;
>>>> +
>>>> +    /* The MSR doesn't exist on Fam 0xf/0x11. */
>>>> +    if ( c->family != 0xf && c->family != 0x11 )
>>>> +        return;
>>> Comment and code don't match. Did you mean
>>>
>>>     if ( c->family == 0xf || c->family == 0x11 )
>>>         return;
>>>
>>> (along the lines of what you have in amd_init_lfence_dispatch())?
>> Oh - that was a last minute refactor which I didn't do quite correctly. 
>> Yes, it should match amd_init_lfence_dispatch().
>>
>>>> +    /*
>>>> +     * On Zen3 (Fam 0x19) and later CPUs, LFENCE is unconditionally dispatch
>>>> +     * serialising, and is enumerated in CPUID.  Hypervisors may also
>>>> +     * enumerate it when the setting is in place and MSR_AMD64_DE_CFG isn't
>>>> +     * available.
>>>> +     */
>>>> +    if ( !test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability) )
>>>> +        new |= AMD64_DE_CFG_LFENCE_SERIALISE;
>>>> +
>>>> +    /*
>>>> +     * If vulnerable to Zenbleed and not mitigated in microcode, use the
>>>> +     * bigger hammer.
>>>> +     */
>>>> +    if ( zenbleed_use_chickenbit() )
>>>> +        new |= (1 << 9);
>>>> +
>>>> +    if ( !new )
>>>> +        return;
>>>> +
>>>> +    if ( rdmsr_safe(MSR_AMD64_DE_CFG, &val) ||
>>>> +         (val & new) == new )
>>>> +        return;
>>>> +
>>>> +    /*
>>>> +     * DE_CFG is a Core-scoped MSR, and this write is racy.  However, both
>>>> +     * threads calculate the new value from state which expected to be
>>>> +     * consistent across CPUs and unrelated to the old value, so the result
>>>> +     * should be consistent.
>>>> +     */
>>>> +    wrmsr_safe(MSR_AMD64_DE_CFG, val | new);
>>> Either of the bits may be the cause of #GP. In that case we wouldn't set the
>>> other bit, even if it may be possible to set it.
>> This MSR does not #GP on real hardware.

I consider this unexpected / inconsistent, at least as long as some of the
bits would be documented as reserved. "Would be" because the particular
Fam17 and Fam19 PPRs I'm looking at don't even mention DE_CFG (or BP_CFG,
for that matter).

>> Also, both of these bits come from instructions AMD have provided,
>> saying "set $X in case $Y", which we have honoured as part of the
>> conditions for setting up new, which I consider to be a reasonable
>> guarantee that no #GP will ensue.

The AMD instructions are for particular models, aren't they? While that
may mean the bits are fine to blindly (try to) set on other models, pretty
likely this can't be extended to other families. (While
zenbleed_use_chickenbit() is family-specific, the LFENCE bit is tried
without regard to family.)

>> This wrmsr_safe() is covering the virt case, because older Xen and
>> Byhive used to disallow writes to it, and OpenBSD would explode as a
>> consequence.  Xen's fix was 4175fd3ccd17.
>>
>> I toyed with the idea of having a tristate de_cfg_writeable, but that
>> got very ugly very quickly
>>
>> The other option would be to ignore DE_CFG entirely under virt.  That's
>> what we do for BP_CFG already, and no hypervisor is going to really let
>> us have access to it, and it would downgrade to non-safe variants.
> 
> In fact, ignoring the virt case for DE_CFG makes this generally nicer.

And being consistent with what we do with BP_CFG looks desirable to me as
well.

Jan


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On 26.11.2025 19:50, Andrew Cooper wrote:
> On 24/11/2025 3:00 pm, Jan Beulich wrote:
>> Hook up the new VM exit codes and handle guest uses of the insns.
>>
>> Signed-off-by: Jan Beulich 
>> ---
>> v9: New.
>> ---
>> The lack of an enable bit is concerning; at least for the nested case
>> that's a security issue afaict (when L0 isn't aware of the insns, or more
>> specifically the exit codes).
> 
> This is why we need support statements of new CPUs.

I hope you don't mean the lack thereof to be a blocking factor for this
change?

> Intel say that unknown VMExits turning into #UD is the expected course
> of action.  That covers all of these cases which don't have an explicit
> enable.

Do you have a pointer?

> This is better than our current behaviour, which is non-architectural
> for supervisor code and practically the most unhelpful course of action
> going.
> 
> Obviously, logic turning on a new feature is expected to handle all the
> VMExit cases it can produce.

What you say here ...

> The corollary for nested virt is that L0 must never make a Virtual
> VMExit with case that isn't enabled.  Combined with #UD in the unknown
> case, that covers things reasonably well.
> 
>> --- a/xen/arch/x86/domain.c
>> +++ b/xen/arch/x86/domain.c
>> @@ -453,7 +453,7 @@ void domain_cpu_policy_changed(struct do
>>      }
>>  
>>      /* Nested doesn't have the necessary processing, yet. */
>> -    if ( nestedhvm_enabled(d) && p->feat.user_msr )
>> +    if ( nestedhvm_enabled(d) && (p->feat.user_msr || p->feat.msr_imm) )
>>          return /* -EINVAL */;
> 
> What processing is missing?  (Aside from correcting the unknown case.)

... is what would need doing for this check to disappear. Going the #UD
route looks to make sense, but it still wouldn't feel quite right then
to drop this check. If we expose the feature, we shouldn't convert
respective exits to #UD. They aren't "unknown" (anymore) after all.

And then again the question is: Are you expecting me to deal with
switching to the #UD model as a prereq (if, as per above, that's
relevant at all here)? If so, I have to admit that it's not quite clear
to me what exactly this would be meant to look like: Alter the default
cases of the big switch()es in both the normal and nested exit handlers?
Or merely the latter?

>> --- a/xen/arch/x86/hvm/vmx/vmx.c
>> +++ b/xen/arch/x86/hvm/vmx/vmx.c
>> @@ -4762,6 +4762,7 @@ void asmlinkage vmx_vmexit_handler(struc
>>          break;
>>  
>>      case EXIT_REASON_URDMSR:
>> +    case EXIT_REASON_RDMSR_IMM:
> 
> Instructions which aren't enumerated in CPUID have reserved behaviour.
> 
> The exit handler needs to check cp->feat.msr_imm and inject #UD.
> 
> It's not perfect; un-intercepted MSRs will happen to execute correctly
> on capable hardware, but most MSRs are not intercepted and it's far
> closer to adequate behaviour than omitting the #UD check.

Hmm, okay, I can certainly do it this way.

Jan


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On 26.11.2025 18:15, Andrew Cooper wrote:
> No functional change.
> 
> Signed-off-by: Andrew Cooper 

Acked-by: Jan Beulich 



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Subject: Re: [PATCH 2/3] x86/amd: Drop vestigial PBE logic in init_amd()
To: Andrew Cooper 
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On 26.11.2025 18:15, Andrew Cooper wrote:
> The comment was adjusted by myself in commit 51bd4bbdfdba ("x86: drop
> X86_FEATURE_3DNOW_ALT"), on the presumption that the underlying logic existed
> for a good reason.
> 
> Having done further archaeology, it turns out to be vestigial technical debt
> from the leadup to Linux 2.4 in November 2000.
> 
> Prior to "Massive cleanup of CPU detection and bug handling",
> c->x86_capability was a single uint32_t containing cpuid(1).edx,
> cpuid(0x80000001).edx, or a synthesis thereof.  X86_FEATURE_AMD3D was defined
> as the top bit this single uint32_t.
> 
> After "Massive cleanup of CPU detection and bug handling",
> c->x86_capability became an array with AMD's extended feature leaf split
> away from Intel's basic feature leaf.
> 
> AMD doc #20734-G states that 3DNow is only enumerated in the extended
> feature leaf, and that other vendors where using this bit too.  i.e. AMD
> never produced a CPU which set bit 31 in the basic leaf, meaning that
> there's nothing to clear out in the first place.
> 
> This logic looks like it was relevant in the pre-"Massive cleanup" world
> but ought to have been dropped when c->x86_capability was properly split.
> 
> Signed-off-by: Andrew Cooper 

Acked-by: Jan Beulich 
albeit I think that, along the lines of a comment I made on Matrix, that ...

> --- a/xen/arch/x86/cpu/amd.c
> +++ b/xen/arch/x86/cpu/amd.c
> @@ -1131,13 +1131,6 @@ static void cf_check init_amd(struct cpuinfo_x86 *c)
>  		wrmsrl(MSR_K8_HWCR, value);
>  	}
>  
> -	/*
> -	 * Some AMD CPUs duplicate the 3DNow bit in base and extended CPUID
> -	 * leaves.  Unfortunately, this aliases PBE on Intel CPUs. Clobber the
> -	 * alias, leaving 3DNow in the extended leaf.
> -	 */
> -	__clear_bit(X86_FEATURE_PBE, c->x86_capability);

... while the justification applies to what the CPUs surface on their own,
the basic leaf masking MSR could (likely) still have undue bits set, and
hence may want pruning in exchange / addition.

Jan


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Subject: Re: [PATCH 3/3] x86/amd: Drop the cpuid_mask_* command line options
To: Andrew Cooper 
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On 26.11.2025 18:15, Andrew Cooper wrote:
> As noted in the command line documentation, these are both deprecated since
> Xen 4.7 (2016), and are not fully effective on AMD CPUs starting from 2011.

The latter was said only for one of them, though.

> Not realised at the time of writing the docs was that their use is also
> incompatible with certain errata workarounds which edit the CPUID MSRs after
> the levelling defaults are calculated.
> 
> Signed-off-by: Andrew Cooper 

Acked-by: Jan Beulich 



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On 26.11.2025 21:43, Grygorii Strashko wrote:
> From: Grygorii Strashko 
> 
> The d->arch.physaddr_bitsize field is used only by PV32 code, so:
> 
> - move domain_set_alloc_bitsize() function into PV32 code and clean up
> unused domain_set_alloc_bitsize() defines from other arches

This could be two separate patches, which likely would be pretty uncontroversial
(and hence be able to go in quickly): One to drop the entirely unused #define-s
for non-x86, and the other to move the x86 function so it can become static in
the sole file using it.

The former patch may want to have several Fixes: tags (as to being Misra
violations), as from all I can see there had never been a need to introduce
those #define-s. Even in 3.2.x they were already confined to x86-only code.

> --- a/xen/arch/x86/include/asm/domain.h
> +++ b/xen/arch/x86/include/asm/domain.h
> @@ -314,10 +314,10 @@ struct arch_domain
>  
>  #ifdef CONFIG_PV32
>      unsigned int hv_compat_vstart;
> -#endif
>  
>      /* Maximum physical-address bitwidth supported by this guest. */
>      unsigned int physaddr_bitsize;
> +#endif

I'm not happy to see the anomaly here being widened. PV-only items really
belong in struct pv_domain.

> --- a/xen/arch/x86/include/asm/mm.h
> +++ b/xen/arch/x86/include/asm/mm.h
> @@ -619,9 +619,6 @@ void __iomem *ioremap_wc(paddr_t pa, size_t len);
>  
>  extern int memory_add(unsigned long spfn, unsigned long epfn, unsigned int pxm);
>  
> -void domain_set_alloc_bitsize(struct domain *d);
> -unsigned int domain_clamp_alloc_bitsize(struct domain *d, unsigned int bits);
> -
>  unsigned long domain_get_maximum_gpfn(struct domain *d);
>  
>  /* Definition of an mm lock: spinlock with extra fields for debugging */
> @@ -659,4 +656,11 @@ static inline bool arch_mfns_in_directmap(unsigned long mfn, unsigned long nr)
>      return (mfn + nr) <= (virt_to_mfn(eva - 1) + 1);
>  }
>  
> +#ifdef CONFIG_PV32
> +unsigned int _domain_clamp_alloc_bitsize(const struct domain *d,
> +                                         unsigned int bits);

This introduces a (C language spec) naming violation - identifiers with
this kind of a name a reserved for file-scope use.

> +#define domain_clamp_alloc_bitsize(d, bits)                                    \
> +    _domain_clamp_alloc_bitsize((d), (bits))

Nit: No need for the inner parentheses; they only hamper readability.

> --- a/xen/arch/x86/pv/domain.c
> +++ b/xen/arch/x86/pv/domain.c
> @@ -230,6 +230,27 @@ unsigned long pv_make_cr4(const struct vcpu *v)
>  }
>  
>  #ifdef CONFIG_PV32
> +unsigned int _domain_clamp_alloc_bitsize(const struct domain *d,
> +                                         unsigned int bits)
> +{
> +    if ( (d == NULL) || (d->arch.physaddr_bitsize == 0) )
> +        return bits;
> +    return min(d->arch.physaddr_bitsize, bits);
> +}

While moving, please make minimal style adjustments: Add the missing blank
line before the final "return" here, and ...

> +static void domain_set_alloc_bitsize(struct domain *d)
> +{
> +    if ( !is_pv_32bit_domain(d) ||
> +         (MACH2PHYS_COMPAT_NR_ENTRIES(d) >= max_page) ||
> +         d->arch.physaddr_bitsize > 0 )
> +        return;
> +    d->arch.physaddr_bitsize =
> +        /* 2^n entries can be contained in guest's p2m mapping space */
> +        fls(MACH2PHYS_COMPAT_NR_ENTRIES(d)) - 1
> +        /* 2^n pages -> 2^(n+PAGE_SHIFT) bits */
> +        + PAGE_SHIFT;
> +}

... add a blank line between the two statements here. In the former function
please further consider switching == NULL and == 0 to our more common use of !.

Jan


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Subject: Re: [XEN][PATCH] xen/x86: move d->arch.physaddr_bitsize field
 handling to pv32
To: Grygorii Strashko 
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Alistair Francis ,
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On 26.11.2025 21:43, Grygorii Strashko wrote:
> From: Grygorii Strashko 
> 
> The d->arch.physaddr_bitsize field is used only by PV32 code, so:
> 
> - move domain_set_alloc_bitsize() function into PV32 code and clean up
> unused domain_set_alloc_bitsize() defines from other arches
> 
> - move domain_clamp_alloc_bitsize() function into PV32 code,
> rename to _domain_clamp_alloc_bitsize() and use generic
> domain_clamp_alloc_bitsize() define instead, clean up
> domain_clamp_alloc_bitsize() defines from !X86 arches
> 
> - move d->arch.physaddr_bitsize field under PV32 ifdef
> 
> Signed-off-by: Grygorii Strashko 
> ---
>  xen/arch/arm/include/asm/mm.h     |  3 ---
>  xen/arch/ppc/include/asm/mm.h     |  3 ---

As I noticed only by getting a mail delivery failure back - please also be sure
your submissions are up-to-date wrt ./MAINTAINERS: You meant to Cc Timothy for
PPC, not Shawn.

Jan

>  xen/arch/riscv/include/asm/mm.h   |  3 ---
>  xen/arch/x86/include/asm/domain.h |  2 +-
>  xen/arch/x86/include/asm/mm.h     | 10 +++++++---
>  xen/arch/x86/pv/dom0_build.c      |  2 ++
>  xen/arch/x86/pv/domain.c          | 21 +++++++++++++++++++++
>  xen/arch/x86/x86_64/mm.c          | 20 --------------------
>  xen/include/xen/mm.h              |  4 ++++
>  9 files changed, 35 insertions(+), 33 deletions(-)


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Subject: Re: [PATCH v3] x86: Remove x86 prefixed names from cpuinfo for
 intel.c
To: Kevin Lampis , andrew.cooper3@citrix.com
Cc: roger.pau@citrix.com, xen-devel@lists.xenproject.org
References: <20251126191945.3386781-1-kevin.lampis@citrix.com>
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From: Jan Beulich 
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In-Reply-To: <20251126191945.3386781-1-kevin.lampis@citrix.com>
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On 26.11.2025 20:19, Kevin Lampis wrote:
> struct cpuinfo_x86
>   .x86        => .family
>   .x86_vendor => .vendor
>   .x86_model  => .model
>   .x86_mask   => .stepping
> 
> No functional change.
> 
> Signed-off-by: Kevin Lampis 
> ---
> Changes in v2:
> - Convert the two switch statements in probe_masking_msrs(),
>   intel_log_freq() and check_memory_type_self_snoop_errata()
> - Requested style changes
> 
> Changes in v3:
> - Re-order the CPU model names in the switch statements
> - Better style changes

As to the latter, ...

> @@ -458,7 +460,8 @@ static void Intel_errata_workarounds(struct cpuinfo_x86 *c)
>  {
>  	uint64_t val;
>  
> -	if ((c->x86 == 15) && (c->x86_model == 1) && (c->x86_mask == 1)) {
> +	if ( c->vfm == INTEL_P4_WILLAMETTE && c->stepping == 1 )
> +	{

... this is still introducing a mix of styles (partly Linux, partly Xen). Imo
we want to avoid this.

> @@ -468,8 +471,10 @@ static void Intel_errata_workarounds(struct cpuinfo_x86 *c)
>  		}
>  	}
>  
> -	if (c->x86 == 6 && cpu_has_clflush &&
> -	    (c->x86_model == 29 || c->x86_model == 46 || c->x86_model == 47))
> +	if ( cpu_has_clflush &&
> +	    ( c->vfm == INTEL_CORE2_DUNNINGTON ||
> +	      c->vfm == INTEL_NEHALEM_EX ||
> +	      c->vfm == INTEL_WESTMERE_EX ))
>  		setup_force_cpu_cap(X86_BUG_CLFLUSH_MONITOR);

Same here, plus in neither style there's provision for blanks immediately
inside inner parentheses. Indentation of that opening parenthesis would
also be off by one.

> @@ -657,14 +670,16 @@ static void cf_check init_intel(struct cpuinfo_x86 *c)
>  	/* Work around errata */
>  	Intel_errata_workarounds(c);
>  
> -	if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
> -		(c->x86 == 0x6 && c->x86_model >= 0x0e))
> +	if ( ( c->family == 15 && c->model >= 0x03 ) ||
> +	     ( c->family == 6 && c->model >= 0x0e ) )

Again undue mix of styles and undue blanks inside inner parentheses.

> --- a/xen/arch/x86/include/asm/intel-family.h
> +++ b/xen/arch/x86/include/asm/intel-family.h
> @@ -179,6 +179,10 @@
>  #define INTEL_XEON_PHI_KNL		IFM(6, 0x57) /* Knights Landing */
>  #define INTEL_XEON_PHI_KNM		IFM(6, 0x85) /* Knights Mill */
>  
> +/* Family 15 - NetBurst */
> +#define INTEL_P4_WILLAMETTE		IFM(15, 0x01) /* Also Xeon Foster */
> +#define INTEL_P4_PRESCOTT		IFM(15, 0x03)

Andrew, can you please get in your re-syncing patch, so this part can be
omitted?

With the style adjustments (which I can certainly do while committing if no
other need for a v4 arises):
Reviewed-by: Jan Beulich 

Jan


From xen-devel-bounces@lists.xenproject.org Thu Nov 27 09:25:23 2025
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Date: Thu, 27 Nov 2025 17:24:18 +0800
From: kernel test robot 
To: Juergen Gross , linux-kernel@vger.kernel.org,
	x86@kernel.org, linux-hyperv@vger.kernel.org,
	virtualization@lists.linux.dev, kvm@vger.kernel.org
Cc: llvm@lists.linux.dev, oe-kbuild-all@lists.linux.dev,
	Juergen Gross ,
	"K. Y. Srinivasan" ,
	Haiyang Zhang ,
	Wei Liu , Dexuan Cui ,
	Thomas Gleixner ,
	Ingo Molnar , Borislav Petkov ,
	Dave Hansen ,
	"H. Peter Anvin" ,
	Ajay Kaher ,
	Alexey Makhalov ,
	Broadcom internal kernel review list ,
	Paolo Bonzini ,
	Vitaly Kuznetsov ,
	Boris Ostrovsky ,
	Josh Poimboeuf ,
	Peter Zijlstra ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH v4 21/21] x86/pvlocks: Move paravirt spinlock functions
 into own header
Message-ID: <202511271747.smpLdjsz-lkp@intel.com>
References: <20251127070844.21919-22-jgross@suse.com>
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In-Reply-To: <20251127070844.21919-22-jgross@suse.com>

Hi Juergen,

kernel test robot noticed the following build errors:

[auto build test ERROR on tip/x86/core]
[also build test ERROR on tip/sched/core kvm/queue kvm/next linus/master v6.18-rc7]
[cannot apply to kvm/linux-next next-20251127]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Juergen-Gross/x86-paravirt-Remove-not-needed-includes-of-paravirt-h/20251127-152054
base:   tip/x86/core
patch link:    https://lore.kernel.org/r/20251127070844.21919-22-jgross%40suse.com
patch subject: [PATCH v4 21/21] x86/pvlocks: Move paravirt spinlock functions into own header
config: x86_64-allnoconfig (https://download.01.org/0day-ci/archive/20251127/202511271747.smpLdjsz-lkp@intel.com/config)
compiler: clang version 20.1.8 (https://github.com/llvm/llvm-project 87f0227cb60147a26a1eeb4fb06e3b505e9c7261)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251127/202511271747.smpLdjsz-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot 
| Closes: https://lore.kernel.org/oe-kbuild-all/202511271747.smpLdjsz-lkp@intel.com/

All errors (new ones prefixed by >>):

>> arch/x86/kernel/alternative.c:2373:2: error: call to undeclared function 'paravirt_set_cap'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
    2373 |         paravirt_set_cap();
         |         ^
   arch/x86/kernel/alternative.c:2373:2: note: did you mean 'paravirt_ret0'?
   arch/x86/include/asm/paravirt-base.h:23:15: note: 'paravirt_ret0' declared here
      23 | unsigned long paravirt_ret0(void);
         |               ^
   1 error generated.


vim +/paravirt_set_cap +2373 arch/x86/kernel/alternative.c

270a69c4485d7d arch/x86/kernel/alternative.c  Peter Zijlstra            2023-02-08  2344  
9a0b5817ad97bb arch/i386/kernel/alternative.c Gerd Hoffmann             2006-03-23  2345  void __init alternative_instructions(void)
9a0b5817ad97bb arch/i386/kernel/alternative.c Gerd Hoffmann             2006-03-23  2346  {
ebebe30794d38c arch/x86/kernel/alternative.c  Pawan Gupta               2025-05-03  2347  	u64 ibt;
ebebe30794d38c arch/x86/kernel/alternative.c  Pawan Gupta               2025-05-03  2348  
7457c0da024b18 arch/x86/kernel/alternative.c  Peter Zijlstra            2019-05-03  2349  	int3_selftest();
7457c0da024b18 arch/x86/kernel/alternative.c  Peter Zijlstra            2019-05-03  2350  
7457c0da024b18 arch/x86/kernel/alternative.c  Peter Zijlstra            2019-05-03  2351  	/*
7457c0da024b18 arch/x86/kernel/alternative.c  Peter Zijlstra            2019-05-03  2352  	 * The patching is not fully atomic, so try to avoid local
7457c0da024b18 arch/x86/kernel/alternative.c  Peter Zijlstra            2019-05-03  2353  	 * interruptions that might execute the to be patched code.
7457c0da024b18 arch/x86/kernel/alternative.c  Peter Zijlstra            2019-05-03  2354  	 * Other CPUs are not running.
7457c0da024b18 arch/x86/kernel/alternative.c  Peter Zijlstra            2019-05-03  2355  	 */
8f4e956b313dcc arch/i386/kernel/alternative.c Andi Kleen                2007-07-22  2356  	stop_nmi();
123aa76ec0cab5 arch/x86/kernel/alternative.c  Andi Kleen                2009-02-12  2357  
123aa76ec0cab5 arch/x86/kernel/alternative.c  Andi Kleen                2009-02-12  2358  	/*
123aa76ec0cab5 arch/x86/kernel/alternative.c  Andi Kleen                2009-02-12  2359  	 * Don't stop machine check exceptions while patching.
123aa76ec0cab5 arch/x86/kernel/alternative.c  Andi Kleen                2009-02-12  2360  	 * MCEs only happen when something got corrupted and in this
123aa76ec0cab5 arch/x86/kernel/alternative.c  Andi Kleen                2009-02-12  2361  	 * case we must do something about the corruption.
32b1cbe380417f arch/x86/kernel/alternative.c  Marco Ammon               2019-09-02  2362  	 * Ignoring it is worse than an unlikely patching race.
123aa76ec0cab5 arch/x86/kernel/alternative.c  Andi Kleen                2009-02-12  2363  	 * Also machine checks tend to be broadcast and if one CPU
123aa76ec0cab5 arch/x86/kernel/alternative.c  Andi Kleen                2009-02-12  2364  	 * goes into machine check the others follow quickly, so we don't
123aa76ec0cab5 arch/x86/kernel/alternative.c  Andi Kleen                2009-02-12  2365  	 * expect a machine check to cause undue problems during to code
123aa76ec0cab5 arch/x86/kernel/alternative.c  Andi Kleen                2009-02-12  2366  	 * patching.
123aa76ec0cab5 arch/x86/kernel/alternative.c  Andi Kleen                2009-02-12  2367  	 */
8f4e956b313dcc arch/i386/kernel/alternative.c Andi Kleen                2007-07-22  2368  
4e6292114c7412 arch/x86/kernel/alternative.c  Juergen Gross             2021-03-11  2369  	/*
f7af6977621a41 arch/x86/kernel/alternative.c  Juergen Gross             2023-12-10  2370  	 * Make sure to set (artificial) features depending on used paravirt
f7af6977621a41 arch/x86/kernel/alternative.c  Juergen Gross             2023-12-10  2371  	 * functions which can later influence alternative patching.
4e6292114c7412 arch/x86/kernel/alternative.c  Juergen Gross             2021-03-11  2372  	 */
4e6292114c7412 arch/x86/kernel/alternative.c  Juergen Gross             2021-03-11 @2373  	paravirt_set_cap();
4e6292114c7412 arch/x86/kernel/alternative.c  Juergen Gross             2021-03-11  2374  
ebebe30794d38c arch/x86/kernel/alternative.c  Pawan Gupta               2025-05-03  2375  	/* Keep CET-IBT disabled until caller/callee are patched */
ebebe30794d38c arch/x86/kernel/alternative.c  Pawan Gupta               2025-05-03  2376  	ibt = ibt_save(/*disable*/ true);
ebebe30794d38c arch/x86/kernel/alternative.c  Pawan Gupta               2025-05-03  2377  
931ab63664f02b arch/x86/kernel/alternative.c  Peter Zijlstra            2022-10-27  2378  	__apply_fineibt(__retpoline_sites, __retpoline_sites_end,
1d7e707af44613 arch/x86/kernel/alternative.c  Mike Rapoport (Microsoft  2025-01-26  2379) 			__cfi_sites, __cfi_sites_end, true);
026211c40b0554 arch/x86/kernel/alternative.c  Kees Cook                 2025-09-03  2380  	cfi_debug = false;
931ab63664f02b arch/x86/kernel/alternative.c  Peter Zijlstra            2022-10-27  2381  
7508500900814d arch/x86/kernel/alternative.c  Peter Zijlstra            2021-10-26  2382  	/*
7508500900814d arch/x86/kernel/alternative.c  Peter Zijlstra            2021-10-26  2383  	 * Rewrite the retpolines, must be done before alternatives since
7508500900814d arch/x86/kernel/alternative.c  Peter Zijlstra            2021-10-26  2384  	 * those can rewrite the retpoline thunks.
7508500900814d arch/x86/kernel/alternative.c  Peter Zijlstra            2021-10-26  2385  	 */
1d7e707af44613 arch/x86/kernel/alternative.c  Mike Rapoport (Microsoft  2025-01-26  2386) 	apply_retpolines(__retpoline_sites, __retpoline_sites_end);
1d7e707af44613 arch/x86/kernel/alternative.c  Mike Rapoport (Microsoft  2025-01-26  2387) 	apply_returns(__return_sites, __return_sites_end);
7508500900814d arch/x86/kernel/alternative.c  Peter Zijlstra            2021-10-26  2388  
a82b26451de126 arch/x86/kernel/alternative.c  Peter Zijlstra (Intel     2025-06-03  2389) 	its_fini_core();
a82b26451de126 arch/x86/kernel/alternative.c  Peter Zijlstra (Intel     2025-06-03  2390) 
e81dc127ef6988 arch/x86/kernel/alternative.c  Thomas Gleixner           2022-09-15  2391  	/*
ab9fea59487d8b arch/x86/kernel/alternative.c  Peter Zijlstra            2025-02-07  2392  	 * Adjust all CALL instructions to point to func()-10, including
ab9fea59487d8b arch/x86/kernel/alternative.c  Peter Zijlstra            2025-02-07  2393  	 * those in .altinstr_replacement.
e81dc127ef6988 arch/x86/kernel/alternative.c  Thomas Gleixner           2022-09-15  2394  	 */
e81dc127ef6988 arch/x86/kernel/alternative.c  Thomas Gleixner           2022-09-15  2395  	callthunks_patch_builtin_calls();
e81dc127ef6988 arch/x86/kernel/alternative.c  Thomas Gleixner           2022-09-15  2396  
ab9fea59487d8b arch/x86/kernel/alternative.c  Peter Zijlstra            2025-02-07  2397  	apply_alternatives(__alt_instructions, __alt_instructions_end);
ab9fea59487d8b arch/x86/kernel/alternative.c  Peter Zijlstra            2025-02-07  2398  
be0fffa5ca894a arch/x86/kernel/alternative.c  Peter Zijlstra            2023-06-22  2399  	/*
be0fffa5ca894a arch/x86/kernel/alternative.c  Peter Zijlstra            2023-06-22  2400  	 * Seal all functions that do not have their address taken.
be0fffa5ca894a arch/x86/kernel/alternative.c  Peter Zijlstra            2023-06-22  2401  	 */
1d7e707af44613 arch/x86/kernel/alternative.c  Mike Rapoport (Microsoft  2025-01-26  2402) 	apply_seal_endbr(__ibt_endbr_seal, __ibt_endbr_seal_end);
ed53a0d971926e arch/x86/kernel/alternative.c  Peter Zijlstra            2022-03-08  2403  
ebebe30794d38c arch/x86/kernel/alternative.c  Pawan Gupta               2025-05-03  2404  	ibt_restore(ibt);
ebebe30794d38c arch/x86/kernel/alternative.c  Pawan Gupta               2025-05-03  2405  

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki


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Date: Thu, 27 Nov 2025 17:24:20 +0800
From: kernel test robot 
To: Juergen Gross , linux-kernel@vger.kernel.org,
	x86@kernel.org, linux-hyperv@vger.kernel.org,
	virtualization@lists.linux.dev, kvm@vger.kernel.org
Cc: oe-kbuild-all@lists.linux.dev, Juergen Gross ,
	"K. Y. Srinivasan" ,
	Haiyang Zhang ,
	Wei Liu , Dexuan Cui ,
	Thomas Gleixner ,
	Ingo Molnar , Borislav Petkov ,
	Dave Hansen ,
	"H. Peter Anvin" ,
	Ajay Kaher ,
	Alexey Makhalov ,
	Broadcom internal kernel review list ,
	Paolo Bonzini ,
	Vitaly Kuznetsov ,
	Boris Ostrovsky ,
	Josh Poimboeuf ,
	Peter Zijlstra ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH v4 21/21] x86/pvlocks: Move paravirt spinlock functions
 into own header
Message-ID: <202511271704.MdDOB4pB-lkp@intel.com>
References: <20251127070844.21919-22-jgross@suse.com>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
In-Reply-To: <20251127070844.21919-22-jgross@suse.com>

Hi Juergen,

kernel test robot noticed the following build errors:

[auto build test ERROR on tip/x86/core]
[also build test ERROR on tip/sched/core kvm/queue kvm/next linus/master v6.18-rc7]
[cannot apply to kvm/linux-next next-20251127]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Juergen-Gross/x86-paravirt-Remove-not-needed-includes-of-paravirt-h/20251127-152054
base:   tip/x86/core
patch link:    https://lore.kernel.org/r/20251127070844.21919-22-jgross%40suse.com
patch subject: [PATCH v4 21/21] x86/pvlocks: Move paravirt spinlock functions into own header
config: i386-allnoconfig (https://download.01.org/0day-ci/archive/20251127/202511271704.MdDOB4pB-lkp@intel.com/config)
compiler: gcc-14 (Debian 14.2.0-19) 14.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251127/202511271704.MdDOB4pB-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot 
| Closes: https://lore.kernel.org/oe-kbuild-all/202511271704.MdDOB4pB-lkp@intel.com/

All errors (new ones prefixed by >>):

   arch/x86/kernel/alternative.c: In function 'alternative_instructions':
>> arch/x86/kernel/alternative.c:2373:9: error: implicit declaration of function 'paravirt_set_cap'; did you mean 'paravirt_ret0'? [-Wimplicit-function-declaration]
    2373 |         paravirt_set_cap();
         |         ^~~~~~~~~~~~~~~~
         |         paravirt_ret0


vim +2373 arch/x86/kernel/alternative.c

270a69c4485d7d0 arch/x86/kernel/alternative.c  Peter Zijlstra            2023-02-08  2344  
9a0b5817ad97bb7 arch/i386/kernel/alternative.c Gerd Hoffmann             2006-03-23  2345  void __init alternative_instructions(void)
9a0b5817ad97bb7 arch/i386/kernel/alternative.c Gerd Hoffmann             2006-03-23  2346  {
ebebe30794d38c5 arch/x86/kernel/alternative.c  Pawan Gupta               2025-05-03  2347  	u64 ibt;
ebebe30794d38c5 arch/x86/kernel/alternative.c  Pawan Gupta               2025-05-03  2348  
7457c0da024b181 arch/x86/kernel/alternative.c  Peter Zijlstra            2019-05-03  2349  	int3_selftest();
7457c0da024b181 arch/x86/kernel/alternative.c  Peter Zijlstra            2019-05-03  2350  
7457c0da024b181 arch/x86/kernel/alternative.c  Peter Zijlstra            2019-05-03  2351  	/*
7457c0da024b181 arch/x86/kernel/alternative.c  Peter Zijlstra            2019-05-03  2352  	 * The patching is not fully atomic, so try to avoid local
7457c0da024b181 arch/x86/kernel/alternative.c  Peter Zijlstra            2019-05-03  2353  	 * interruptions that might execute the to be patched code.
7457c0da024b181 arch/x86/kernel/alternative.c  Peter Zijlstra            2019-05-03  2354  	 * Other CPUs are not running.
7457c0da024b181 arch/x86/kernel/alternative.c  Peter Zijlstra            2019-05-03  2355  	 */
8f4e956b313dccc arch/i386/kernel/alternative.c Andi Kleen                2007-07-22  2356  	stop_nmi();
123aa76ec0cab5d arch/x86/kernel/alternative.c  Andi Kleen                2009-02-12  2357  
123aa76ec0cab5d arch/x86/kernel/alternative.c  Andi Kleen                2009-02-12  2358  	/*
123aa76ec0cab5d arch/x86/kernel/alternative.c  Andi Kleen                2009-02-12  2359  	 * Don't stop machine check exceptions while patching.
123aa76ec0cab5d arch/x86/kernel/alternative.c  Andi Kleen                2009-02-12  2360  	 * MCEs only happen when something got corrupted and in this
123aa76ec0cab5d arch/x86/kernel/alternative.c  Andi Kleen                2009-02-12  2361  	 * case we must do something about the corruption.
32b1cbe380417f2 arch/x86/kernel/alternative.c  Marco Ammon               2019-09-02  2362  	 * Ignoring it is worse than an unlikely patching race.
123aa76ec0cab5d arch/x86/kernel/alternative.c  Andi Kleen                2009-02-12  2363  	 * Also machine checks tend to be broadcast and if one CPU
123aa76ec0cab5d arch/x86/kernel/alternative.c  Andi Kleen                2009-02-12  2364  	 * goes into machine check the others follow quickly, so we don't
123aa76ec0cab5d arch/x86/kernel/alternative.c  Andi Kleen                2009-02-12  2365  	 * expect a machine check to cause undue problems during to code
123aa76ec0cab5d arch/x86/kernel/alternative.c  Andi Kleen                2009-02-12  2366  	 * patching.
123aa76ec0cab5d arch/x86/kernel/alternative.c  Andi Kleen                2009-02-12  2367  	 */
8f4e956b313dccc arch/i386/kernel/alternative.c Andi Kleen                2007-07-22  2368  
4e6292114c74122 arch/x86/kernel/alternative.c  Juergen Gross             2021-03-11  2369  	/*
f7af6977621a416 arch/x86/kernel/alternative.c  Juergen Gross             2023-12-10  2370  	 * Make sure to set (artificial) features depending on used paravirt
f7af6977621a416 arch/x86/kernel/alternative.c  Juergen Gross             2023-12-10  2371  	 * functions which can later influence alternative patching.
4e6292114c74122 arch/x86/kernel/alternative.c  Juergen Gross             2021-03-11  2372  	 */
4e6292114c74122 arch/x86/kernel/alternative.c  Juergen Gross             2021-03-11 @2373  	paravirt_set_cap();
4e6292114c74122 arch/x86/kernel/alternative.c  Juergen Gross             2021-03-11  2374  
ebebe30794d38c5 arch/x86/kernel/alternative.c  Pawan Gupta               2025-05-03  2375  	/* Keep CET-IBT disabled until caller/callee are patched */
ebebe30794d38c5 arch/x86/kernel/alternative.c  Pawan Gupta               2025-05-03  2376  	ibt = ibt_save(/*disable*/ true);
ebebe30794d38c5 arch/x86/kernel/alternative.c  Pawan Gupta               2025-05-03  2377  
931ab63664f02b1 arch/x86/kernel/alternative.c  Peter Zijlstra            2022-10-27  2378  	__apply_fineibt(__retpoline_sites, __retpoline_sites_end,
1d7e707af446134 arch/x86/kernel/alternative.c  Mike Rapoport (Microsoft  2025-01-26  2379) 			__cfi_sites, __cfi_sites_end, true);
026211c40b05548 arch/x86/kernel/alternative.c  Kees Cook                 2025-09-03  2380  	cfi_debug = false;
931ab63664f02b1 arch/x86/kernel/alternative.c  Peter Zijlstra            2022-10-27  2381  
7508500900814d1 arch/x86/kernel/alternative.c  Peter Zijlstra            2021-10-26  2382  	/*
7508500900814d1 arch/x86/kernel/alternative.c  Peter Zijlstra            2021-10-26  2383  	 * Rewrite the retpolines, must be done before alternatives since
7508500900814d1 arch/x86/kernel/alternative.c  Peter Zijlstra            2021-10-26  2384  	 * those can rewrite the retpoline thunks.
7508500900814d1 arch/x86/kernel/alternative.c  Peter Zijlstra            2021-10-26  2385  	 */
1d7e707af446134 arch/x86/kernel/alternative.c  Mike Rapoport (Microsoft  2025-01-26  2386) 	apply_retpolines(__retpoline_sites, __retpoline_sites_end);
1d7e707af446134 arch/x86/kernel/alternative.c  Mike Rapoport (Microsoft  2025-01-26  2387) 	apply_returns(__return_sites, __return_sites_end);
7508500900814d1 arch/x86/kernel/alternative.c  Peter Zijlstra            2021-10-26  2388  
a82b26451de126a arch/x86/kernel/alternative.c  Peter Zijlstra (Intel     2025-06-03  2389) 	its_fini_core();
a82b26451de126a arch/x86/kernel/alternative.c  Peter Zijlstra (Intel     2025-06-03  2390) 
e81dc127ef69887 arch/x86/kernel/alternative.c  Thomas Gleixner           2022-09-15  2391  	/*
ab9fea59487d8b5 arch/x86/kernel/alternative.c  Peter Zijlstra            2025-02-07  2392  	 * Adjust all CALL instructions to point to func()-10, including
ab9fea59487d8b5 arch/x86/kernel/alternative.c  Peter Zijlstra            2025-02-07  2393  	 * those in .altinstr_replacement.
e81dc127ef69887 arch/x86/kernel/alternative.c  Thomas Gleixner           2022-09-15  2394  	 */
e81dc127ef69887 arch/x86/kernel/alternative.c  Thomas Gleixner           2022-09-15  2395  	callthunks_patch_builtin_calls();
e81dc127ef69887 arch/x86/kernel/alternative.c  Thomas Gleixner           2022-09-15  2396  
ab9fea59487d8b5 arch/x86/kernel/alternative.c  Peter Zijlstra            2025-02-07  2397  	apply_alternatives(__alt_instructions, __alt_instructions_end);
ab9fea59487d8b5 arch/x86/kernel/alternative.c  Peter Zijlstra            2025-02-07  2398  
be0fffa5ca894a9 arch/x86/kernel/alternative.c  Peter Zijlstra            2023-06-22  2399  	/*
be0fffa5ca894a9 arch/x86/kernel/alternative.c  Peter Zijlstra            2023-06-22  2400  	 * Seal all functions that do not have their address taken.
be0fffa5ca894a9 arch/x86/kernel/alternative.c  Peter Zijlstra            2023-06-22  2401  	 */
1d7e707af446134 arch/x86/kernel/alternative.c  Mike Rapoport (Microsoft  2025-01-26  2402) 	apply_seal_endbr(__ibt_endbr_seal, __ibt_endbr_seal_end);
ed53a0d971926e4 arch/x86/kernel/alternative.c  Peter Zijlstra            2022-03-08  2403  
ebebe30794d38c5 arch/x86/kernel/alternative.c  Pawan Gupta               2025-05-03  2404  	ibt_restore(ibt);
ebebe30794d38c5 arch/x86/kernel/alternative.c  Pawan Gupta               2025-05-03  2405  

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki


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Message-ID: 
Date: Thu, 27 Nov 2025 10:39:19 +0100
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v2] xen/domain: introduce generic functions for domain
 struct allocation and freeing
To: Grygorii Strashko ,
 xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
 Stefano Stabellini , Julien Grall ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Andrew Cooper ,
 Anthony PERARD , Jan Beulich ,
 Timothy Pearson ,
 Alistair Francis ,
 Bob Eshleman , Connor Davis 
References: 
 
Content-Language: en-US
From: Oleksii Kurochko 
In-Reply-To: 

This is a multi-part message in MIME format.
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On 11/26/25 9:35 PM, Grygorii Strashko wrote:
>
>
> On 26.11.25 16:32, Oleksii Kurochko wrote:
>> From: Roger Pau Monne 
>>
>> Move x86's free_domain_struct() to common code since it is shared 
>> between
>> architectures.
>>
>> Move the x86 version of alloc_domain_struct() to common code as most 
>> of the
>> logic is architecture-independent. To handle the remaining architectural
>> differences, introduce arch_alloc_domain_struct_bits() for x86-specific
>> allocation requirements.
>>
>> No functional change.
>>
>> Suggested-By: Jan Beulich 
>> [Introduce an arch-specific function instead of using a weak function]
>> Signed-off-by: Roger Pau Monné 
>> Signed-off-by: Oleksii Kurochko 
>> ---
>> Changes in v2:
>> - CI test results: 
>> https://gitlab.com/xen-project/people/olkur/xen/-/pipelines/2180836457
>> - Introduce an arch-specific function to handle differences between 
>> arch-es
>>    in domain structure allocation requirements, instead of relying on 
>> a weak
>>    function.
>> - Add Suggested-by: Jan Beulich .
>> - Move free_domain_struct() to common code.
>> - Update the commit message.
>> ---
>>   xen/arch/arm/domain.c                | 17 -----------------
>>   xen/arch/ppc/stubs.c                 | 10 ----------
>>   xen/arch/riscv/stubs.c               | 10 ----------
>>   xen/arch/x86/domain.c                | 15 ++-------------
>>   xen/arch/x86/include/asm/pv/domain.h |  3 +++
>>   xen/common/domain.c                  | 23 +++++++++++++++++++++++
>>   6 files changed, 28 insertions(+), 50 deletions(-)
>>
>
> [...]
>
>> diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
>> index 3a21e035f4..34a02f089e 100644
>> --- a/xen/arch/x86/domain.c
>> +++ b/xen/arch/x86/domain.c
>> @@ -463,10 +463,8 @@ void domain_cpu_policy_changed(struct domain *d)
>>       }
>>   }
>>   -struct domain *alloc_domain_struct(void)
>> +unsigned int arch_alloc_domain_struct_bits(void)
>>   {
>> -    struct domain *d;
>> -
>>       /*
>>        * Without CONFIG_BIGMEM, we pack the PDX of the domain 
>> structure into
>>        * a 32-bit field within the page_info structure. Hence the 
>> MEMF_bits()
>> @@ -492,16 +490,7 @@ struct domain *alloc_domain_struct(void)
>>                   - 1;
>>   #endif
>>   -    BUILD_BUG_ON(sizeof(*d) > PAGE_SIZE);
>> -    d = alloc_xenheap_pages(0, MEMF_bits(bits));
>> -    if ( d != NULL )
>> -        clear_page(d);
>> -    return d;
>> -}
>> -
>> -void free_domain_struct(struct domain *d)
>> -{
>> -    free_xenheap_page(d);
>> +    return bits;
>>   }
>>     struct vcpu *alloc_vcpu_struct(const struct domain *d)
>> diff --git a/xen/arch/x86/include/asm/pv/domain.h 
>> b/xen/arch/x86/include/asm/pv/domain.h
>> index 582d004051..6e65bc22fc 100644
>> --- a/xen/arch/x86/include/asm/pv/domain.h
>> +++ b/xen/arch/x86/include/asm/pv/domain.h
>> @@ -18,6 +18,9 @@ extern int8_t opt_pv32;
>>   # define opt_pv32 false
>>   #endif
>>   +unsigned int arch_alloc_domain_struct_bits(void);
>> +#define arch_alloc_domin_struct_bits arch_alloc_domain_struct_bits
>
> Is it intentionally placed in PV header x86/include/asm/pv/domain.h?

Oh, I missed that it is inside PV header. It should be in asm/domain.h, thanks for noticing that!

~ Oleksii

--------------FcZCR6CkEaay57TfyIzLQ394
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On 11/26/25 9:35 PM, Grygorii Strashko
      wrote:

    

    

      

      

      On 26.11.25 16:32, Oleksii Kurochko wrote:
      

      
From: Roger Pau Monne
        <roger.pau@citrix.com>
        

        

        Move x86's free_domain_struct() to common code since it is
        shared between
        

        architectures.
        

        

        Move the x86 version of alloc_domain_struct() to common code as
        most of the
        

        logic is architecture-independent. To handle the remaining
        architectural
        

        differences, introduce arch_alloc_domain_struct_bits() for
        x86-specific
        

        allocation requirements.
        

        

        No functional change.
        

        

        Suggested-By: Jan Beulich <jbeulich@suse.com>
        

        [Introduce an arch-specific function instead of using a weak
        function]
        

        Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
        

        Signed-off-by: Oleksii Kurochko
        <oleksii.kurochko@gmail.com>
        

        ---
        

        Changes in v2:
        

        - CI test results:
        https://gitlab.com/xen-project/people/olkur/xen/-/pipelines/2180836457
        

        - Introduce an arch-specific function to handle differences
        between arch-es
        

           in domain structure allocation requirements, instead of
        relying on a weak
        

           function.
        

        - Add Suggested-by: Jan Beulich <jbeulich@suse.com>.
        

        - Move free_domain_struct() to common code.
        

        - Update the commit message.
        

        ---
        

          xen/arch/arm/domain.c                | 17 -----------------
        

          xen/arch/ppc/stubs.c                 | 10 ----------
        

          xen/arch/riscv/stubs.c               | 10 ----------
        

          xen/arch/x86/domain.c                | 15 ++-------------
        

          xen/arch/x86/include/asm/pv/domain.h |  3 +++
        

          xen/common/domain.c                  | 23
        +++++++++++++++++++++++
        

          6 files changed, 28 insertions(+), 50 deletions(-)
        

        

      

      

      [...]
      

      

      
diff --git a/xen/arch/x86/domain.c
        b/xen/arch/x86/domain.c
        

        index 3a21e035f4..34a02f089e 100644
        

        --- a/xen/arch/x86/domain.c
        

        +++ b/xen/arch/x86/domain.c
        

        @@ -463,10 +463,8 @@ void domain_cpu_policy_changed(struct
        domain *d)
        

              }
        

          }
        

          -struct domain *alloc_domain_struct(void)
        

        +unsigned int arch_alloc_domain_struct_bits(void)
        

          {
        

        -    struct domain *d;
        

        -
        

              /*
        

               * Without CONFIG_BIGMEM, we pack the PDX of the domain
        structure into
        

               * a 32-bit field within the page_info structure. Hence
        the MEMF_bits()
        

        @@ -492,16 +490,7 @@ struct domain *alloc_domain_struct(void)
        

                          - 1;
        

          #endif
        

          -    BUILD_BUG_ON(sizeof(*d) > PAGE_SIZE);
        

        -    d = alloc_xenheap_pages(0, MEMF_bits(bits));
        

        -    if ( d != NULL )
        

        -        clear_page(d);
        

        -    return d;
        

        -}
        

        -
        

        -void free_domain_struct(struct domain *d)
        

        -{
        

        -    free_xenheap_page(d);
        

        +    return bits;
        

          }
        

            struct vcpu *alloc_vcpu_struct(const struct domain *d)
        

        diff --git a/xen/arch/x86/include/asm/pv/domain.h
        b/xen/arch/x86/include/asm/pv/domain.h
        

        index 582d004051..6e65bc22fc 100644
        

        --- a/xen/arch/x86/include/asm/pv/domain.h
        

        +++ b/xen/arch/x86/include/asm/pv/domain.h
        

        @@ -18,6 +18,9 @@ extern int8_t opt_pv32;
        

          # define opt_pv32 false
        

          #endif
        

          +unsigned int arch_alloc_domain_struct_bits(void);
        

        +#define arch_alloc_domin_struct_bits
        arch_alloc_domain_struct_bits
        

      

      

      Is it intentionally placed in PV header
      x86/include/asm/pv/domain.h? 

    

    
Oh, I missed that it is inside PV header. It should be in asm/domain.h, thanks for noticing that!

~ Oleksii

    

  


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On 26.11.2025 17:44, Alejandro Vallejo wrote:
> This enables very aggressive DCE passes on single-vendor builds in later
> patches, as it will allow most vendor checks to become statically chosen
> branches. A lot of statics go away and a lot more inlining is allowed.
> 
> In order to allow x86_vendor_is() to fold into constants, expand Kconfig
> to have the full set of vendors. Adds Hygon, Centaur, Shanghai and the
> default path.
> 
> Have Hygon depend on AMD, and Centaur+Shanghai depend on Intel.
> 
> Not a functional change.
> 
> Signed-off-by: Alejandro Vallejo 
> ---
>  xen/arch/x86/Kconfig.cpu         | 45 ++++++++++++++++++++++++++++++++
>  xen/arch/x86/cpu/common.c        | 17 +++++++-----
>  xen/arch/x86/include/asm/cpuid.h |  7 +++++
>  3 files changed, 62 insertions(+), 7 deletions(-)

Shouldn't patch 5 be folded into here? Or, if there were some dependencies
on patches 2-4 (albeit I can't spot anything, as the files are all self-
contained), at least the parts which can be done right away?

> --- a/xen/arch/x86/Kconfig.cpu
> +++ b/xen/arch/x86/Kconfig.cpu
> @@ -19,4 +19,49 @@ config INTEL
>  	  May be turned off in builds targetting other vendors.  Otherwise,
>  	  must be enabled for Xen to work suitably on Intel platforms.
>  
> +config HYGON
> +	bool "Support Hygon CPUs"
> +	depends on AMD
> +	default y
> +	help
> +	  Detection, tunings and quirks for Hygon platforms.
> +
> +	  May be turned off in builds targetting other vendors.  Otherwise,
> +	  must be enabled for Xen to work suitably on Hygon platforms.
> +
> +
> +config CENTAUR
> +	bool "Support Centaur CPUs"
> +	depends on INTEL
> +	default y
> +	help
> +	  Detection, tunings and quirks for Centaur platforms.
> +
> +	  May be turned off in builds targetting other vendors.  Otherwise,
> +	  must be enabled for Xen to work suitably on Centaur platforms.
> +
> +config SHANGHAI
> +	bool "Support Shanghai CPUs"
> +	depends on INTEL
> +	default y
> +	help
> +	  Detection, tunings and quirks for Shanghai platforms.
> +
> +	  May be turned off in builds targetting other vendors.  Otherwise,
> +	  must be enabled for Xen to work suitably on Shanghai platforms.
> +
> +config UNKNOWN_CPU
> +	bool "Support unknown CPUs"

"Unknown CPUs" can be of two kinds: Such of vendors we don't explicitly support,
and such of vendors we do explicitly support, but where we aren't aware of the
particular model. This needs to be unambiguous here, perhaps by it becoming
UNKNOWN_CPU_VENDOR (and the prompt changing accordingly).

> --- a/xen/arch/x86/cpu/common.c
> +++ b/xen/arch/x86/cpu/common.c
> @@ -118,7 +118,7 @@ static void cf_check default_init(struct cpuinfo_x86 * c)
>  	__clear_bit(X86_FEATURE_SEP, c->x86_capability);
>  }
>  
> -static const struct cpu_dev __initconst_cf_clobber __used default_cpu = {
> +static const struct cpu_dev __initconst_cf_clobber default_cpu = {

This change isn't explained in the description. __used here was introduced not
all this long ago together with __initconst_cf_clobber. Maybe this really was
a mistake, but if so it's correction should be explained.

> @@ -340,7 +340,8 @@ void __init early_cpu_init(bool verbose)
>  	*(u32 *)&c->x86_vendor_id[8] = ecx;
>  	*(u32 *)&c->x86_vendor_id[4] = edx;
>  
> -	c->x86_vendor = x86_cpuid_lookup_vendor(ebx, ecx, edx);
> +	c->x86_vendor = x86_cpuid_lookup_vendor(ebx, ecx, edx) &
> +	                X86_ENABLED_VENDORS;

May I suggest the & to move ...

>  	switch (c->x86_vendor) {

... here? Yes, you panic() below, but I see no reason to store inaccurate
data when that's easy to avoid.

>  	case X86_VENDOR_INTEL:    intel_unlock_cpuid_leaves(c);
>  				  actual_cpu = intel_cpu_dev;    break;
> @@ -349,12 +350,14 @@ void __init early_cpu_init(bool verbose)
>  	case X86_VENDOR_SHANGHAI: actual_cpu = shanghai_cpu_dev; break;
>  	case X86_VENDOR_HYGON:    actual_cpu = hygon_cpu_dev;    break;
>  	default:
> +		if (verbose || !IS_ENABLED(CONFIG_UNKNOWN_CPU))
> +			printk(XENLOG_ERR
> +			       "Unrecognised or unsupported CPU vendor '%.12s'\n",
> +			       c->x86_vendor_id);
> +		if (!IS_ENABLED(CONFIG_UNKNOWN_CPU))
> +			panic("Cannot run in unknown/compiled-out CPU vendor.\n");

The text reads somewhat odd to me, "run in" in particular. Also nit: No full stop
please at the end of log messages, except maybe in extraordinary situations.

Jan


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Message-ID: 
Date: Thu, 27 Nov 2025 10:49:20 +0100
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH 5/8] symbols/riscv: re-number intermediate files
To: Jan Beulich ,
 "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper , Julien Grall ,
 Stefano Stabellini ,
 Anthony PERARD ,
 Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Alistair Francis ,
 Bob Eshleman , Connor Davis 
References: 
 <37ed4a18-f1a0-4c1f-b915-1708c235068b@suse.com>
Content-Language: en-US
From: Oleksii Kurochko 
In-Reply-To: <37ed4a18-f1a0-4c1f-b915-1708c235068b@suse.com>

This is a multi-part message in MIME format.
--------------DGQkPQ7F2hn52tuLoEeFscSY
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On 11/26/25 2:44 PM, Jan Beulich wrote:
> In preparation to do away with symbols-dummy, re-number the assembly and
> object files used, for the numbers to match the next passes real output.
> This is to make 0 available to use for what now is handled by
> symbols-dummy.
>
> Signed-off-by: Jan Beulich
>
> --- a/xen/arch/riscv/Makefile
> +++ b/xen/arch/riscv/Makefile
> @@ -26,16 +26,16 @@ $(TARGET)-syms: $(objtree)/prelink.o $(o
>   	    $(objtree)/common/symbols-dummy.o -o $(dot-target).0
>   	$(NM) -pa --format=sysv $(dot-target).0 \
>   		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
> -		> $(dot-target).0.S
> -	$(MAKE) $(build)=$(@D) $(dot-target).0.o
> +		> $(dot-target).1.S
> +	$(MAKE) $(build)=$(@D) $(dot-target).1.o
>   	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \
> -	    $(dot-target).0.o -o $(dot-target).1
> +	    $(dot-target).1.o -o $(dot-target).1
>   	$(NM) -pa --format=sysv $(dot-target).1 \
>   		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
> -		> $(dot-target).1.S
> -	$(MAKE) $(build)=$(@D) $(dot-target).1.o
> +		> $(dot-target).2.S
> +	$(MAKE) $(build)=$(@D) $(dot-target).2.o
>   	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ - $(dot-target).1.o -o $@ + $(dot-target).2.o 
> -o $@ $(NM) -pa --format=sysv $@ \ | $(objtree)/tools/symbols 
> --all-symbols --xensyms --sysv --sort \ > $@.map
>
LGTM: Reviewed-By: Oleksii Kurochko

~ Oleksii

--------------DGQkPQ7F2hn52tuLoEeFscSY
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On 11/26/25 2:44 PM, Jan Beulich wrote:

    

    

      
In preparation to do away with symbols-dummy, re-number the assembly and
object files used, for the numbers to match the next passes real output.
This is to make 0 available to use for what now is handled by
symbols-dummy.

Signed-off-by: Jan Beulich <jbeulich@suse.com>

--- a/xen/arch/riscv/Makefile
+++ b/xen/arch/riscv/Makefile
@@ -26,16 +26,16 @@ $(TARGET)-syms: $(objtree)/prelink.o $(o
 	    $(objtree)/common/symbols-dummy.o -o $(dot-target).0
 	$(NM) -pa --format=sysv $(dot-target).0 \
 		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
-		> $(dot-target).0.S
-	$(MAKE) $(build)=$(@D) $(dot-target).0.o
+		> $(dot-target).1.S
+	$(MAKE) $(build)=$(@D) $(dot-target).1.o
 	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \
-	    $(dot-target).0.o -o $(dot-target).1
+	    $(dot-target).1.o -o $(dot-target).1
 	$(NM) -pa --format=sysv $(dot-target).1 \
 		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
-		> $(dot-target).1.S
-	$(MAKE) $(build)=$(@D) $(dot-target).1.o
+		> $(dot-target).2.S
+	$(MAKE) $(build)=$(@D) $(dot-target).2.o
 	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \
-	    $(dot-target).1.o -o $@
+	    $(dot-target).2.o -o $@
 	$(NM) -pa --format=sysv $@ \
 		| $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \
 		> $@.map



    

    
LGTM: Reviewed-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>

~ Oleksii

  


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Subject: Re: [PATCH 5/8] symbols/riscv: re-number intermediate files
To: Oleksii Kurochko 
Cc: Andrew Cooper , Julien Grall ,
 Stefano Stabellini ,
 Anthony PERARD ,
 Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Alistair Francis ,
 Bob Eshleman , Connor Davis
 ,
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From: Jan Beulich 
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On 27.11.2025 10:49, Oleksii Kurochko wrote:
> 
> On 11/26/25 2:44 PM, Jan Beulich wrote:
>> In preparation to do away with symbols-dummy, re-number the assembly and
>> object files used, for the numbers to match the next passes real output.
>> This is to make 0 available to use for what now is handled by
>> symbols-dummy.
>>
>> Signed-off-by: Jan Beulich
>>
>> --- a/xen/arch/riscv/Makefile
>> +++ b/xen/arch/riscv/Makefile
>> @@ -26,16 +26,16 @@ $(TARGET)-syms: $(objtree)/prelink.o $(o
>>   	    $(objtree)/common/symbols-dummy.o -o $(dot-target).0
>>   	$(NM) -pa --format=sysv $(dot-target).0 \
>>   		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
>> -		> $(dot-target).0.S
>> -	$(MAKE) $(build)=$(@D) $(dot-target).0.o
>> +		> $(dot-target).1.S
>> +	$(MAKE) $(build)=$(@D) $(dot-target).1.o
>>   	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \
>> -	    $(dot-target).0.o -o $(dot-target).1
>> +	    $(dot-target).1.o -o $(dot-target).1
>>   	$(NM) -pa --format=sysv $(dot-target).1 \
>>   		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
>> -		> $(dot-target).1.S
>> -	$(MAKE) $(build)=$(@D) $(dot-target).1.o
>> +		> $(dot-target).2.S
>> +	$(MAKE) $(build)=$(@D) $(dot-target).2.o
>>   	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ - $(dot-target).1.o -o $@ + $(dot-target).2.o 
>> -o $@ $(NM) -pa --format=sysv $@ \ | $(objtree)/tools/symbols 
>> --all-symbols --xensyms --sysv --sort \ > $@.map
>>
> LGTM: Reviewed-By: Oleksii Kurochko

Thanks. May I remind you again that there wants to be a blank before the
opening angle bracket? That is an issue which was also pointed out for
some of your recent release-acks. (Canonically, the "-by" also wants to
be all lower case, I think.)

Jan


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Subject: Re: [PATCH 6/8] symbols/riscv: don't use symbols-dummy
To: Jan Beulich ,
 "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper , Julien Grall ,
 Stefano Stabellini ,
 Anthony PERARD ,
 Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Alistair Francis ,
 Bob Eshleman , Connor Davis 
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 <5e5ee09f-88b7-41eb-99da-a9b5cf4bf348@suse.com>
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On 11/26/25 2:45 PM, Jan Beulich wrote:
> In particular when linking with lld, which converts hidden symbols to
> local ones, the ELF symbol table can change in unhelpful ways between the
> first two linking passes, resulting in the .rodata contributions to change
> between the 2nd and 3rd pass. That, however, renders our embedded symbol
> table pretty much unusable; the recently introduced self-test may then
> also fail. (Another difference between compiling a C file and assembling
> the generated ones is that - with -fdata-sections in use - the .rodata
> contributions move between passes 1 and 2, when we'd prefer them not to.)
>
> Signed-off-by: Jan Beulich
>
> --- a/xen/arch/riscv/Makefile
> +++ b/xen/arch/riscv/Makefile
> @@ -22,8 +22,10 @@ $(TARGET): $(TARGET)-syms
>   	$(OBJCOPY) -O binary -S $< $@ $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds + 
> $(objtree)/tools/symbols $(all_symbols) --empty > $(dot-target).0.S
> +	$(MAKE) $(build)=$(@D) $(dot-target).0.o
>   	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \
> -	    $(objtree)/common/symbols-dummy.o -o $(dot-target).0
> +	      $(dot-target).0.o -o $(dot-target).0
>   	$(NM) -pa --format=sysv $(dot-target).0 \
>   		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
>   		> $(dot-target).1.S

LGTM: Reviewed-By: Oleksii Kurochko

~ Oleksii

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On 11/26/25 2:45 PM, Jan Beulich wrote:

    

    

      
In particular when linking with lld, which converts hidden symbols to
local ones, the ELF symbol table can change in unhelpful ways between the
first two linking passes, resulting in the .rodata contributions to change
between the 2nd and 3rd pass. That, however, renders our embedded symbol
table pretty much unusable; the recently introduced self-test may then
also fail. (Another difference between compiling a C file and assembling
the generated ones is that - with -fdata-sections in use - the .rodata
contributions move between passes 1 and 2, when we'd prefer them not to.)

Signed-off-by: Jan Beulich <jbeulich@suse.com>

--- a/xen/arch/riscv/Makefile
+++ b/xen/arch/riscv/Makefile
@@ -22,8 +22,10 @@ $(TARGET): $(TARGET)-syms
 	$(OBJCOPY) -O binary -S $< $@
 
 $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds
+	$(objtree)/tools/symbols $(all_symbols) --empty > $(dot-target).0.S
+	$(MAKE) $(build)=$(@D) $(dot-target).0.o
 	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \
-	    $(objtree)/common/symbols-dummy.o -o $(dot-target).0
+	      $(dot-target).0.o -o $(dot-target).0
 	$(NM) -pa --format=sysv $(dot-target).0 \
 		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
 		> $(dot-target).1.S


    

    
LGTM: Reviewed-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>

~ Oleksii

  


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Subject: Re: [RFC PATCH 01/11] x86: Add more granularity to the vendors in
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To: Alejandro Vallejo 
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On 26.11.2025 17:44, Alejandro Vallejo wrote:
> This enables very aggressive DCE passes on single-vendor builds in later
> patches, as it will allow most vendor checks to become statically chosen
> branches. A lot of statics go away and a lot more inlining is allowed.
> 
> In order to allow x86_vendor_is() to fold into constants, expand Kconfig
> to have the full set of vendors. Adds Hygon, Centaur, Shanghai and the
> default path.

Oh, one more thing: There's x86_vendor_is() yet, so what it is going to be
needs at least roughly explaining here.

Jan


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Subject: Re: [PATCH 5/8] symbols/riscv: re-number intermediate files
To: Jan Beulich 
Cc: Andrew Cooper , Julien Grall ,
 Stefano Stabellini ,
 Anthony PERARD ,
 Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Alistair Francis ,
 Bob Eshleman , Connor Davis
 ,
 "xen-devel@lists.xenproject.org" 
References: 
 <37ed4a18-f1a0-4c1f-b915-1708c235068b@suse.com>
 
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From: Oleksii Kurochko 
In-Reply-To: <3fd32ba0-0670-4c9b-b216-60c55a5de7ba@suse.com>

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--------------6rxlXtWiSDHfng9MB26VfzsC
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On 11/27/25 10:57 AM, Jan Beulich wrote:
> On 27.11.2025 10:49, Oleksii Kurochko wrote:
>> On 11/26/25 2:44 PM, Jan Beulich wrote:
>>> In preparation to do away with symbols-dummy, re-number the assembly and
>>> object files used, for the numbers to match the next passes real output.
>>> This is to make 0 available to use for what now is handled by
>>> symbols-dummy.
>>>
>>> Signed-off-by: Jan Beulich
>>>
>>> --- a/xen/arch/riscv/Makefile
>>> +++ b/xen/arch/riscv/Makefile
>>> @@ -26,16 +26,16 @@ $(TARGET)-syms: $(objtree)/prelink.o $(o
>>>    	    $(objtree)/common/symbols-dummy.o -o $(dot-target).0
>>>    	$(NM) -pa --format=sysv $(dot-target).0 \
>>>    		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
>>> -		> $(dot-target).0.S
>>> -	$(MAKE) $(build)=$(@D) $(dot-target).0.o
>>> +		> $(dot-target).1.S
>>> +	$(MAKE) $(build)=$(@D) $(dot-target).1.o
>>>    	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \
>>> -	    $(dot-target).0.o -o $(dot-target).1
>>> +	    $(dot-target).1.o -o $(dot-target).1
>>>    	$(NM) -pa --format=sysv $(dot-target).1 \
>>>    		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
>>> -		> $(dot-target).1.S
>>> -	$(MAKE) $(build)=$(@D) $(dot-target).1.o
>>> +		> $(dot-target).2.S
>>> +	$(MAKE) $(build)=$(@D) $(dot-target).2.o
>>>    	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ - $(dot-target).1.o -o $@ + $(dot-target).2.o
>>> -o $@ $(NM) -pa --format=sysv $@ \ | $(objtree)/tools/symbols
>>> --all-symbols --xensyms --sysv --sort \ > $@.map
>>>
>> LGTM: Reviewed-By: Oleksii Kurochko
> Thanks. May I remind you again that there wants to be a blank before the
> opening angle bracket? That is an issue which was also pointed out for
> some of your recent release-acks.

Hmm, something wrong with a setting in my e-mail app because I am looking at
my reply in my e-mail app and there is a space before the opening angle bracket...


>   (Canonically, the "-by" also wants to
> be all lower case, I think.)

I was sure that I had seen “-by†written with an uppercase letter, but I will
use lowercase in the future. I tried using|git log --grep|, and it seems I was
mistaken — “-by†is always lowercase.

I didn’t see your answer, so I made the same mistake with “-by†in the next
patch as well.

~ Oleksii

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On 11/27/25 10:57 AM, Jan Beulich
      wrote:

    

    

      
On 27.11.2025 10:49, Oleksii Kurochko wrote:


      

        
On 11/26/25 2:44 PM, Jan Beulich wrote:


        

          
In preparation to do away with symbols-dummy, re-number the assembly and
object files used, for the numbers to match the next passes real output.
This is to make 0 available to use for what now is handled by
symbols-dummy.

Signed-off-by: Jan Beulich<jbeulich@suse.com>

--- a/xen/arch/riscv/Makefile
+++ b/xen/arch/riscv/Makefile
@@ -26,16 +26,16 @@ $(TARGET)-syms: $(objtree)/prelink.o $(o
  	    $(objtree)/common/symbols-dummy.o -o $(dot-target).0
  	$(NM) -pa --format=sysv $(dot-target).0 \
  		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
-		> $(dot-target).0.S
-	$(MAKE) $(build)=$(@D) $(dot-target).0.o
+		> $(dot-target).1.S
+	$(MAKE) $(build)=$(@D) $(dot-target).1.o
  	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \
-	    $(dot-target).0.o -o $(dot-target).1
+	    $(dot-target).1.o -o $(dot-target).1
  	$(NM) -pa --format=sysv $(dot-target).1 \
  		| $(objtree)/tools/symbols $(all_symbols) --sysv --sort \
-		> $(dot-target).1.S
-	$(MAKE) $(build)=$(@D) $(dot-target).1.o
+		> $(dot-target).2.S
+	$(MAKE) $(build)=$(@D) $(dot-target).2.o
  	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ - $(dot-target).1.o -o $@ + $(dot-target).2.o 
-o $@ $(NM) -pa --format=sysv $@ \ | $(objtree)/tools/symbols 
--all-symbols --xensyms --sysv --sort \ > $@.map



        

        
LGTM: Reviewed-By: Oleksii Kurochko<oleksii.kurochko@gmail.com>


      

      
Thanks. May I remind you again that there wants to be a blank before the
opening angle bracket? That is an issue which was also pointed out for
some of your recent release-acks.

    

    
Hmm, something wrong with a setting in my e-mail app because I am looking at
my reply in my e-mail app and there is a space before the opening angle bracket...

    


    

    

      
 (Canonically, the "-by" also wants to
be all lower case, I think.)

    

    
I was sure that I had seen “-by†written with an uppercase letter, but I will
use lowercase in the future. I tried using git log --grep, and it seems I was
mistaken — “-by†is always lowercase.

    
I didn’t see your answer, so I made the same mistake with “-by†in the next
patch as well.

    
~ Oleksii

  


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Subject: Re: [PATCH 00/20] Add SMMUv3 Stage 1 Support for XEN guests
To: Milan Djokic ,
 Volodymyr Babchuk 
Cc: Julien Grall ,
 "xen-devel@lists.xenproject.org" ,
 Bertrand Marquis ,
 Rahul Singh ,
 Stefano Stabellini ,
 Michal Orzel , Jan Beulich ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Anthony PERARD , Nick Rosbrook
 , George Dunlap ,
 Juergen Gross , Andrew Cooper 
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From: Julien Grall 
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On 03/11/2025 13:16, Milan Djokic wrote:
> Hello Volodymyr, Julien

Hi Milan,

Thanks for the new update. For the future, can you trim your reply?

> Sorry for the delayed follow-up on this topic.
> We have changed vIOMMU design from 1-N to N-N mapping between vIOMMU and 
> pIOMMU. Considering single vIOMMU model limitation pointed out by 
> Volodymyr (SID overlaps), vIOMMU-per-pIOMMU model turned out to be the 
> only proper solution.

I am not sure to fully understand. My assumption with the single vIOMMU 
is you have a virtual SID that would be mapped to a (pIOMMU, physical 
SID). Does this means in your solution you will end up with multiple 
vPCI as well and then map pBDF == vBDF? (this because the SID have to be 
fixed at boot)

> Following is the updated design document.
> I have added additional details to the design and performance impact 
> sections, and also indicated future improvements. Security 
> considerations section is unchanged apart from some minor details 
> according to review comments.
> Let me know what do you think about updated design. Once approved, I 
> will send the updated vIOMMU patch series.
> 
> 
> ==========================================================
> Design Proposal: Add SMMUv3 Stage-1 Support for XEN Guests
> ==========================================================
> 
> :Author:     Milan Djokic 
> :Date:       2025-11-03
> :Status:     Draft
> 
> Introduction
> ============
> 
> The SMMUv3 supports two stages of translation. Each stage of translation 
> can be
> independently enabled. An incoming address is logically translated from 
> VA to
> IPA in stage 1, then the IPA is input to stage 2 which translates the 
> IPA to
> the output PA. Stage 1 translation support is required to provide 
> isolation between different
> devices within OS. XEN already supports Stage 2 translation but there is no
> support for Stage 1 translation.
> This design proposal outlines the introduction of Stage-1 SMMUv3 support 
> in Xen for ARM guests.
> 
> Motivation
> ==========
> 
> ARM systems utilizing SMMUv3 require stage-1 address translation to 
> ensure secure DMA and
> guest managed I/O memory mappings.
> With stage-1 enabed, guest manages IOVA to IPA mappings through its own 
> IOMMU driver.
> 
> This feature enables:
> 
> - Stage-1 translation in guest domain
> - Safe device passthrough with per-device address translation table

I find this misleading. Even without this feature, device passthrough is 
still safe in the sense a device will be isolated (assuming all the DMA 
goes through the IOMMU) and will not be able to DMA outside of the guest 
memory. What the stage-1 is doing is providing an extra layer to control 
what each device can see. This is useful if you don't trust your devices 
or you want to assign a device to userspace (e.g. for DPDK).

> 
> Design Overview
> ===============
> 
> These changes provide emulated SMMUv3 support:

If my understanding is correct, there are all some implications in how 
we create the PCI topology. It would be good to spell them out.

> 
> - **SMMUv3 Stage-1 Translation**: stage-1 and nested translation support 
> in SMMUv3 driver.
> - **vIOMMU Abstraction**: Virtual IOMMU framework for guest stage-1 
> handling.
> - **Register/Command Emulation**: SMMUv3 register emulation and command 
> queue handling.
> - **Device Tree Extensions**: Adds `iommus` and virtual SMMUv3 nodes to 
> device trees for dom0 and dom0less scenarios.

What about ACPI?

> - **Runtime Configuration**: Introduces a `viommu` boot parameter for 
> dynamic enablement.
> 
> Separate vIOMMU device is exposed to guest for every physical IOMMU in 
> the system.
> vIOMMU feature is designed in a way to provide a generic vIOMMU 
> framework and a backend implementation
> for target IOMMU as separate components.
> Backend implementation contains specific IOMMU structure and commands 
> handling (only SMMUv3 currently supported).
> This structure allows potential reuse of stage-1 feature for other IOMMU 
> types.
> 
> Security Considerations
> =======================
> 
> **viommu security benefits:**
> 
> - Stage-1 translation ensures guest devices cannot perform unauthorized 
> DMA (device I/O address mapping managed by guest).
> - Emulated IOMMU removes guest direct dependency on IOMMU hardware, 
> while maintaining domains isolation.

Sorry, I don't follow this argument. Are you saying that it would be 
possible to emulate a SMMUv3 vIOMMU on top of the IPMMU?

> 1. Observation:
> ---------------
> Support for Stage-1 translation in SMMUv3 introduces new data structures 
> (`s1_cfg` alongside `s2_cfg`)
> and logic to write both Stage-1 and Stage-2 entries in the Stream Table 
> Entry (STE), including an `abort`
> field to handle partial configuration states.
> 
> **Risk:**
> Without proper handling, a partially applied Stage-1 configuration might 
> leave guest DMA mappings in an
> inconsistent state, potentially enabling unauthorized access or causing 
> cross-domain interference.

How so? Even if you misconfigure the S1, the S2 would still be properly 
configured (you just mention partially applied stage-1).

> 
> **Mitigation:** *(Handled by design)*
> This feature introduces logic that writes both `s1_cfg` and `s2_cfg` to 
> STE and manages the `abort` field-only
> considering Stage-1 configuration if fully attached. This ensures 
> incomplete or invalid guest configurations
> are safely ignored by the hypervisor.

Can you clarify what you mean by invalid guest configurations?

> 
> 2. Observation:
> ---------------
> Guests can now invalidate Stage-1 caches; invalidation needs forwarding 
> to SMMUv3 hardware to maintain coherence.
> 
> **Risk:**
> Failing to propagate cache invalidation could allow stale mappings, 
> enabling access to old mappings and possibly
> data leakage or misrouting.

You are referring to data leakage/misrouting between two devices own by 
the same guest, right? Xen would still be in charge of flush when the 
stage-2 is updated.

> 
> **Mitigation:** *(Handled by design)*
> This feature ensures that guest-initiated invalidations are correctly 
> forwarded to the hardware,
> preserving IOMMU coherency.

How is this a mitigation? You have to properly handle commands. If you 
don't properly handle them, then yes it will break.

> 
> 4. Observation:
> ---------------
> The code includes transformations to handle nested translation versus 
> standard modes and uses guest-configured
> command queues (e.g., `CMD_CFGI_STE`) and event notifications.
> 
> **Risk:**
> Malicious or malformed queue commands from guests could bypass 
> validation, manipulate SMMUv3 state,
> or cause system instability.
> 
> **Mitigation:** *(Handled by design)*
> Built-in validation of command queue entries and sanitization mechanisms 
> ensure only permitted configurations
> are applied.

This is true as long as we didn't make an mistake in the configurations ;).


> This is supported via additions in `vsmmuv3` and `cmdqueue` 
> handling code.
> 
> 5. Observation:
> ---------------
> Device Tree modifications enable device assignment and configuration 
> through guest DT fragments (e.g., `iommus`)
> are added via `libxl`.
> 
> **Risk:**
> Erroneous or malicious Device Tree injection could result in device 
> misbinding or guest access to unauthorized
> hardware.

The DT fragment are not security support and will never be at least 
until you have can a libfdt that is able to detect malformed Device-Tree 
(I haven't checked if this has changed recently).

> 
> **Mitigation:**
> 
> - `libxl` perform checks of guest configuration and parse only 
> predefined dt fragments and nodes, reducing risk.
> - The system integrator must ensure correct resource mapping in the 
> guest Device Tree (DT) fragments.
 > > 6. Observation:
> ---------------
> Introducing optional per-guest enabled features (`viommu` argument in xl 
> guest config) means some guests
> may opt-out.
> 
> **Risk:**
> Differences between guests with and without `viommu` may cause 
> unexpected behavior or privilege drift.

I don't understand this risk. Can you clarify?

> 
> **Mitigation:**
> Verify that downgrade paths are safe and well-isolated; ensure missing 
> support doesn't cause security issues.
> Additional audits on emulation paths and domains interference need to be 
> performed in a multi-guest environment.
> 
> 7. Observation:
> ---------------

This observation with 7, 8 and 9 are the most important observations but 
it seems to be missing some details on how this will be implemented. I 
will try to provide some questions that should help filling the gaps.

> Guests have the ability to issue Stage-1 IOMMU commands like cache 
> invalidation, stream table entries
> configuration, etc. An adversarial guest may issue a high volume of 
> commands in rapid succession.
> 
> **Risk:**
> Excessive commands requests can cause high hypervisor CPU consumption 
> and disrupt scheduling,
> leading to degraded system responsiveness and potential denial-of- 
> service scenarios.
> 
> **Mitigation:**
> 
> - Xen scheduler limits guest vCPU execution time, securing basic guest 
> rate-limiting.

This really depends on your scheduler. Some scheduler (e.g. NULL) will 
not do any scheduling at all. Furthermore, the scheduler only preempt 
EL1/EL0. It doesn't preempt EL2, so any long running operation need 
manual preemption. Therefore, I wouldn't consider this as a mitigation.

> - Batch multiple commands of same type to reduce overhead on the virtual 
> SMMUv3 hardware emulation.

The guest can send commands in any order. So can you expand how this 
would work? Maybe with some example.

> - Implement vIOMMU commands execution restart and continuation support

This needs a bit more details. How will you decide whether to restart 
and what would be the action? (I guess it will be re-executing the 
instruction to write to the CWRITER).

> 
> 8. Observation:
> ---------------
> Some guest commands issued towards vIOMMU are propagated to pIOMMU 
> command queue (e.g. TLB invalidate).
> 
> **Risk:**
> Excessive commands requests from abusive guest can cause flooding of 
> physical IOMMU command queue,
> leading to degraded pIOMMU responsivness on commands issued from other 
> guests.
> 
> **Mitigation:**
> 
> - Xen credit scheduler limits guest vCPU execution time, securing basic 
> guest rate-limiting.

Same as above. This mitigation cannot be used.


> - Batch commands which should be propagated towards pIOMMU cmd queue and 
> enable support for batch
>    execution pause/continuation

Can this be expanded?

> - If possible, implement domain penalization by adding a per-domain cost 
> counter for vIOMMU/pIOMMU usage.

Can this be expanded?

> 
> 9. Observation:
> ---------------
> vIOMMU feature includes event queue used for forwarding IOMMU events to 
> guest
> (e.g. translation faults, invalid stream IDs, permission errors).
> A malicious guest can misconfigure its SMMU state or intentionally 
> trigger faults with high frequency.
> 
> **Risk:**
> Occurance of IOMMU events with high frequency can cause Xen to flood the 

s/occurance/occurrence/

> event queue and disrupt scheduling with
> high hypervisor CPU load for events handling.
> 
> **Mitigation:**
> 
> - Implement fail-safe state by disabling events forwarding when faults 
> are occured with high frequency and
>    not processed by guest.

I am not sure to understand how this would work. Can you expand?

> - Batch multiple events of same type to reduce overhead on the virtual 
> SMMUv3 hardware emulation.

Ditto.

> - Consider disabling event queue for untrusted guests

My understanding is there is only a single physical event queue. Xen 
would be responsible to handle the events in the queue and forward to 
the respective guests. If so, it is not clear what you mean by "disable 
event queue".

> 
> Performance Impact
> ==================
> 
> With iommu stage-1 and nested translation inclusion, performance 
> overhead is introduced comparing to existing,
> stage-2 only usage in Xen. Once mappings are established, translations 
> should not introduce significant overhead.
> Emulated paths may introduce moderate overhead, primarily affecting 
> device initialization and event handling.
> Performance impact highly depends on target CPU capabilities.
> Testing is performed on QEMU virt and Renesas R-Car (QEMU emulated) 
> platforms.

I am afraid QEMU is not a reliable platform to do performance testing. 
Don't you have a real HW with vIOMMU support?

[...]

> References
> ==========
> 
> - Original feature implemented by Rahul Singh:
> 
> https://patchwork.kernel.org/project/xen-devel/cover/ 
> cover.1669888522.git.rahul.singh@arm.com/
> - SMMUv3 architecture documentation
> - Existing vIOMMU code patterns

I am not sure what this is referring to?

Cheers,

-- 
Julien Grall



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On 26.11.2025 17:44, Alejandro Vallejo wrote:
> This function is meant to replace all instances of the following
> patterns in CPU policies and boot_cpu_data:
> 
>   - x->x86_vendor == X86_VENDOR_FOO
>   - x->x86_vendor != X86_VENDOR_FOO
>   - x->x86_vendor & (X86_VENDOR_FOO | X86_VENDOR_BAR)
> 
> The secret sauce is that all branches inside the helper resolve at
> compile time, so for the all-vendors-compiled-in case the function
> resolves to equivalent code as that without the helper and you get
> progressively more aggressive DCE as you disable vendors. The function
> folds into a constant once you remove the fallback CPU vendor setting.

Here and below in the comment, "fallback CPU vendor" wants clarifying. I
don't view it as obvious that what's presently named UNKNOWN_CPU is that
"fallback" (as imo that really isn't any kind of fallback, but merely a
placeholder).

> While at this, move an include out of place so they sort alphabetically.

I'd rather suggest to simply ...

> --- a/xen/arch/x86/include/asm/cpuid.h
> +++ b/xen/arch/x86/include/asm/cpuid.h
> @@ -2,10 +2,12 @@
>  #define __X86_CPUID_H__
>  
>  #include 
> +#include 
>  
> -#include 
> +#include 
>  #include 
>  #include 
> +#include 

... drop it. xen/kernel.h, for example, already gets it for you anyway.

> @@ -56,6 +58,51 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf,
>       (IS_ENABLED(CONFIG_SHANGHAI) ? X86_VENDOR_SHANGHAI : 0) | \
>       (IS_ENABLED(CONFIG_HYGON)    ? X86_VENDOR_HYGON    : 0))
>  
> +/*
> + * When compiling Xen for a single vendor with no fallback vendor there's no
> + * need no check the candidate. `vendor` is always a compile-time constant,
> + * which means this all can fold into a constant boolean.

DYM "`vendor` is always supposed to be a compile-time constant, ..." ?

> + * A runtime check at the time of CPUID probing guarantees we never run on
> + * wrong hardware and another check when loading CPU policies guarantees we
> + * never run policies for a vendor in another vendor's silicon.
> + *
> + * By the same token, the same folding can happen when no vendor is compiled
> + * in and the fallback path is present.
> + */
> +static always_inline bool x86_vendor_is(uint8_t candidate, uint8_t vendor)

I fear the comment, no matter that it's pretty large already, doesn't make
clear how this function is to be used, i.e. how for this being an "is"
predicate the two arguments should be chosen. My typical expectation would be
for "is" predicates to apply to a single property, with other parameters (if
any) only being auxiliary ones. Maybe it would already help if the first
parameter wasn't named "candidate" but e.g. "actual" (from looking at just
the next patch). Or maybe (depending on the number of possible different
inputs for the first parameter) there want to be a few wrappers, so the
"single property" aspect would be achieved at use sites.

Then I see no reason for the parameters to be other than unsigned int. (Same
for the local variable then, obviously.)

I'm further uncertain this is a good place for the function. In the old days
it may have been, but cpuid.[ch] now are only about guest exposure of CPUID,
when this predicate is intended to be used for both host and guest. (As I
realize only now, this also applies to the addition patch 1 does.) One
might think processor.h might be a good home, but we're actually trying to
slim that one down. So one of cpufeature.h and cpufeatures.h, I guess. (Maybe
other x86 maintainers also have thoughts here.)

> +{
> +    uint8_t filtered_vendor = vendor & X86_ENABLED_VENDORS;
> +
> +    if ( vendor == X86_VENDOR_UNKNOWN )
> +    {
> +        if ( IS_ENABLED(CONFIG_UNKNOWN_CPU) )
> +            /* no-vendor optimisation */

Nit: Comment style (also again below).

> +            return X86_ENABLED_VENDORS ? vendor == candidate : true;

With the surrounding if() this effectively (and more explicitly) is

            return X86_ENABLED_VENDORS ? candidate == X86_VENDOR_UNKNOWN : true;

First: Would one ever pass X86_VENDOR_UNKNOWN for "vendor"? The next patch,
for example, specifically doesn't. And then why not shorter as

            return !X86_ENABLED_VENDORS || candidate == X86_VENDOR_UNKNOWN;

Which raises the next question: Should we even allow a hypervisor to be built
with X86_ENABLED_VENDORS == 0? Plus, question more on patch 1, what's the
(useful) difference between a build with all vendors set to N and
(a) UNKNOWN_CPU=n vs (b) UNKNOWN_CPU=y? With all vendor support explicitly
turned off, all CPUs are going to be "unknown".

> +
> +        /* unknown-vendor-elimination optimisation */
> +        return false;
> +    }
> +
> +    /* single-vendor optimisation */
> +    if ( !IS_ENABLED(CONFIG_UNKNOWN_CPU) &&
> +         (ISOLATE_LSB(X86_ENABLED_VENDORS) == X86_ENABLED_VENDORS) )
> +        return filtered_vendor == X86_ENABLED_VENDORS;
> +
> +    /* compiled-out-vendor-elimination optimisation */
> +    if ( !filtered_vendor )
> +        return false;
> +
> +    /*
> +     * When checking against a single vendor, perform an equality check, as
> +     * it yields (marginally) better codegen
> +     */
> +    if ( ISOLATE_LSB(filtered_vendor) == filtered_vendor )

So one may pass a combination of multiple vendors for "vendor"? Is so, why
is the parameter name singular?

> +        return filtered_vendor == candidate ;

Nit: Stray blank.

Jan


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Date: Thu, 27 Nov 2025 11:51:34 +0100
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Subject: Re: [RFC PATCH 04/11] x86: Refactor early vendor lookup code to use
 x86_vendor_is()
To: Alejandro Vallejo 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <20251126164419.174487-1-alejandro.garciavallejo@amd.com>
 <20251126164419.174487-5-alejandro.garciavallejo@amd.com>
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On 26.11.2025 17:44, Alejandro Vallejo wrote:
> Move the "unknown" vendor ahead of all others and have it NOT rely
> on x86_vendor_is(), as that would yield incorrect values for the
> single-vendor+no-fallback case when running in incorrect hardware
> (because x86_vendor_is() becomes a folded constant of the single
> compiled-in vendor).
> 
> This is one of the two places where x86_vendor_is() cannot be used,
> along with the compatibility check on loaded guest CPU policies.
> 
> Signed-off-by: Alejandro Vallejo 
> ---
>  xen/arch/x86/cpu/common.c | 31 +++++++++++++++++++++++--------
>  1 file changed, 23 insertions(+), 8 deletions(-)
> 
> diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c
> index 393c30227f..c0c3606dd2 100644
> --- a/xen/arch/x86/cpu/common.c
> +++ b/xen/arch/x86/cpu/common.c
> @@ -342,23 +342,38 @@ void __init early_cpu_init(bool verbose)
>  
>  	c->x86_vendor = x86_cpuid_lookup_vendor(ebx, ecx, edx) &
>  	                X86_ENABLED_VENDORS;
> -	switch (c->x86_vendor) {
> -	case X86_VENDOR_INTEL:    intel_unlock_cpuid_leaves(c);
> -				  actual_cpu = intel_cpu_dev;    break;
> -	case X86_VENDOR_AMD:      actual_cpu = amd_cpu_dev;      break;
> -	case X86_VENDOR_CENTAUR:  actual_cpu = centaur_cpu_dev;  break;
> -	case X86_VENDOR_SHANGHAI: actual_cpu = shanghai_cpu_dev; break;
> -	case X86_VENDOR_HYGON:    actual_cpu = hygon_cpu_dev;    break;
> -	default:
> +
> +	/*
> +	 * We can't rely on x86_vendor_is() here due to the single-vendor
> +	 * optimisation. It makes x86_vendor_is(x, y) rely on the constant `y`
> +	 * matching the single vendor Xen was compiled for and ignore the
> +	 * runtime variable `x`. In order to preserve sanity we must assert here
> +	 * that we never boot such a build in a CPU from another vendor, or
> +	 * major chaos would ensue.
> +	 */
> +	if (c->x86_vendor == X86_VENDOR_UNKNOWN)
> +	{

Nit: No mix of styles please. Here it wants to be Linux style.

>  		if (verbose || !IS_ENABLED(CONFIG_UNKNOWN_CPU))
>  			printk(XENLOG_ERR
>  			       "Unrecognised or unsupported CPU vendor '%.12s'\n",
>  			       c->x86_vendor_id);
> +
>  		if (!IS_ENABLED(CONFIG_UNKNOWN_CPU))
>  			panic("Cannot run in unknown/compiled-out CPU vendor.\n");
>  
>  		actual_cpu = default_cpu;
>  	}
> +	else if (x86_vendor_is(c->x86_vendor, X86_VENDOR_INTEL)) {
> +		intel_unlock_cpuid_leaves(c);
> +		actual_cpu = intel_cpu_dev;
> +	} else if (x86_vendor_is(c->x86_vendor, X86_VENDOR_AMD))
> +		actual_cpu = amd_cpu_dev;
> +	else if (x86_vendor_is(c->x86_vendor, X86_VENDOR_CENTAUR))
> +		actual_cpu = centaur_cpu_dev;
> +	else if (x86_vendor_is(c->x86_vendor, X86_VENDOR_SHANGHAI))
> +		actual_cpu = shanghai_cpu_dev;
> +	else if (x86_vendor_is(c->x86_vendor, X86_VENDOR_HYGON))
> +		actual_cpu = hygon_cpu_dev;

If it needs to be like this, then so be it, but I view it as a downside to
not be able to use switch() anymore. It's not quite clear to me though what
extra gains the transformation brings. The masking by X86_ENABLED_VENDORS
already does most of what you want, and X86_VENDOR_UNKNOWN continues to be
handled separately anyway.

Jan


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Date: Thu, 27 Nov 2025 12:05:57 +0100
From: Anthony PERARD 
To: Jan Beulich , Michael Young 
Cc: Anthony PERARD ,
	Juergen Gross , xen-devel@lists.xenproject.org
Subject: Re: [XEN PATCH] libxl_nocpuid.c: fix build with json-c
Message-ID: 
References: <94ffdeb1-6826-4c3a-a9c1-3ccc8b129a61@durham.ac.uk>
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In-Reply-To: <8c8b11c7-ba2c-440c-be2b-86a1ff250e0d@suse.com>

On Mon, Nov 24, 2025 at 10:26:34AM +0100, Jan Beulich wrote:
> On 21.11.2025 22:09, Michael Young wrote:
> > diff --git a/tools/libs/light/libxl_nocpuid.c 
> > b/tools/libs/light/libxl_nocpuid.c
> > index 0630959e76..71ab49ed61 100644
> > --- a/tools/libs/light/libxl_nocpuid.c
> > +++ b/tools/libs/light/libxl_nocpuid.c
> > @@ -40,11 +40,24 @@ int libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t 
> > domid, bool restore,
> >       return 0;
> >   }
> > 
> > +#ifdef HAVE_LIBJSONC
> > +#ifndef _hidden
> > +#define _hidden
> > +#endif
> 
> Why would this be needed? libxl_internal provides a definition afaics.
> 
> > +_hidden int libxl_cpuid_policy_list_gen_jso(json_object **jso_r,
> 
> Nor should the attribute be needed here, as the function declaration ought
> to be in scope.

Yes, just mirroring the changes done to libxl_cpuid.c should be enough.

> > +                                libxl_cpuid_policy_list *pcpuid)
> > +{
> > +    return 0;
> > +}
> > +#endif
> > +
> > +#if defined(HAVE_LIBYAJL)
> >   yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand,
> >                                   libxl_cpuid_policy_list *pcpuid)
> >   {
> >       return 0;
> >   }
> > +#endif
> 
> Maybe unrelated to this build fix, I find it hard to believe that returning
> 0 (presumably meaning "success") here is appropriate without actually doing
> anything. In particular for the new function you add, I think upon success
> the caller can expect *jso_r to have got assigned a value. However, without
> any commentary it's hard to tell whether there's some "agreement" that the
> caller has to pre-set its variable (to, say, NULL).

For the YAJL function, this is correct, there's nothing to do with
`hand`. But for the json-c function, while the current caller does
initialise `*jso_r`, it would be best indeed to have the function set
`*jso_r` to NULL. (It's equivalent to return a NULL JSON object.)

> Also why are the libxl_..._jso() all hidden, while their libxl_..._json()
> counterparts aren't? And why would non-exported functions have their
> declarations live in a non-private header?

History, bad demission which expose libxl internals to libxl's users,
which make it impossible to use whatever json parsing/generating library that
libxl wants. The header `libxl_json.h` is only necessary if you want to
use the `*_json()` functions, and the only user (I hope) is `xl`.
I guess we could remove the installation of "libxl_json.h" header (and
"_libxl_types_json.h") when building libxl with json-c support.

Thanks,

-- 
Anthony PERARD


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Date: Thu, 27 Nov 2025 13:33:04 +0100
From: Alexander Gordeev 
To: Kevin Brodsky 
Cc: linux-mm@kvack.org, linux-kernel@vger.kernel.org,
        Andreas Larsson ,
        Andrew Morton ,
        Boris Ostrovsky ,
        Borislav Petkov ,
        Catalin Marinas ,
        Christophe Leroy ,
        Dave Hansen ,
        David Hildenbrand ,
        "David S. Miller" ,
        David Woodhouse ,
        "H. Peter Anvin" , Ingo Molnar ,
        Jann Horn , Juergen Gross ,
        "Liam R. Howlett" ,
        Lorenzo Stoakes ,
        Madhavan Srinivasan ,
        Michael Ellerman , Michal Hocko ,
        Mike Rapoport , Nicholas Piggin ,
        Peter Zijlstra ,
        "Ritesh Harjani (IBM)" ,
        Ryan Roberts ,
        Suren Baghdasaryan ,
        Thomas Gleixner ,
        Venkat Rao Bagalkote ,
        Vlastimil Babka , Will Deacon ,
        Yeoreum Yun ,
        linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org,
        sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org,
        x86@kernel.org
Subject: Re: [PATCH v5 08/12] mm: enable lazy_mmu sections to nest
Message-ID: <4d0eab1a-e1dc-49cf-8640-727c9734233d-agordeev@linux.ibm.com>
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On Mon, Nov 24, 2025 at 01:22:24PM +0000, Kevin Brodsky wrote:

Hi Kevin,

...
> +/**
> + * lazy_mmu_mode_pause() - Pause the lazy MMU mode.
> + *
> + * Pauses the lazy MMU mode; if it is currently active, disables it and calls
> + * arch_leave_lazy_mmu_mode().
> + *
> + * Must be paired with a call to lazy_mmu_mode_resume(). Calls to the
> + * lazy_mmu_mode_* API have no effect until the matching resume() call.

Sorry if it was discussed already - if yes, I somehow missed it. If I read
the whole thing correctly enter()/pause() interleaving is not forbidden?

lazy_mmu_mode_enable()
	lazy_mmu_mode_pause()
		lazy_mmu_mode_enable()
		...
		lazy_mmu_mode_disable()
	lazy_mmu_mode_resume()
lazy_mmu_mode_disable()

> + *
> + * Has no effect if called:
> + * - While paused (inside another pause()/resume() pair)
> + * - In interrupt context
> + */
>  static inline void lazy_mmu_mode_pause(void)
>  {
> +	struct lazy_mmu_state *state = ¤t->lazy_mmu_state;
> +
>  	if (in_interrupt())
>  		return;
>  
> -	arch_leave_lazy_mmu_mode();
> +	VM_WARN_ON_ONCE(state->pause_count == U8_MAX);
> +
> +	if (state->pause_count++ == 0 && state->enable_count > 0)
> +		arch_leave_lazy_mmu_mode();
>  }
>  
> +/**
> + * lazy_mmu_mode_pause() - Resume the lazy MMU mode.
                    resume() ?
> + *
> + * Resumes the lazy MMU mode; if it was active at the point where the matching
> + * call to lazy_mmu_mode_pause() was made, re-enables it and calls
> + * arch_enter_lazy_mmu_mode().
> + *
> + * Must match a call to lazy_mmu_mode_pause().
> + *
> + * Has no effect if called:
> + * - While paused (inside another pause()/resume() pair)
> + * - In interrupt context
> + */
>  static inline void lazy_mmu_mode_resume(void)
>  {
> +	struct lazy_mmu_state *state = ¤t->lazy_mmu_state;
> +
>  	if (in_interrupt())
>  		return;
>  
> -	arch_enter_lazy_mmu_mode();
> +	VM_WARN_ON_ONCE(state->pause_count == 0);
> +
> +	if (--state->pause_count == 0 && state->enable_count > 0)
> +		arch_enter_lazy_mmu_mode();
>  }
...
Thanks!


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Date: Thu, 27 Nov 2025 13:36:26 +0100
Message-ID: 
CC: Andrew Cooper ,
	=?utf-8?q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" ,
	
Subject: Re: [RFC PATCH 01/11] x86: Add more granularity to the vendors in
 Kconfig
From: Alejandro Vallejo 
To: Jan Beulich 
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Hi,

Thanks for taking the time to look at this

On Thu Nov 27, 2025 at 10:43 AM CET, Jan Beulich wrote:
> On 26.11.2025 17:44, Alejandro Vallejo wrote:
>> This enables very aggressive DCE passes on single-vendor builds in later
>> patches, as it will allow most vendor checks to become statically chosen
>> branches. A lot of statics go away and a lot more inlining is allowed.
>>=20
>> In order to allow x86_vendor_is() to fold into constants, expand Kconfig
>> to have the full set of vendors. Adds Hygon, Centaur, Shanghai and the
>> default path.
>>=20
>> Have Hygon depend on AMD, and Centaur+Shanghai depend on Intel.
>>=20
>> Not a functional change.
>>=20
>> Signed-off-by: Alejandro Vallejo 
>> ---
>>  xen/arch/x86/Kconfig.cpu         | 45 ++++++++++++++++++++++++++++++++
>>  xen/arch/x86/cpu/common.c        | 17 +++++++-----
>>  xen/arch/x86/include/asm/cpuid.h |  7 +++++
>>  3 files changed, 62 insertions(+), 7 deletions(-)
>
> Shouldn't patch 5 be folded into here? Or, if there were some dependencie=
s
> on patches 2-4 (albeit I can't spot anything, as the files are all self-
> contained), at least the parts which can be done right away?

I didn't expect that to work before transforming the switch, but of course
the prior & X86_ENABLED_VENDORS is already telling the compiler which switc=
h
branches are unreachable.

Will do and send soon as non-RFC if there's no objection to the full vendor
palette (including the unknown vendor case) being on display in Kconfig.

>
>> --- a/xen/arch/x86/Kconfig.cpu
>> +++ b/xen/arch/x86/Kconfig.cpu
>> @@ -19,4 +19,49 @@ config INTEL
>>  	  May be turned off in builds targetting other vendors.  Otherwise,
>>  	  must be enabled for Xen to work suitably on Intel platforms.
>> =20
>> +config HYGON
>> +	bool "Support Hygon CPUs"
>> +	depends on AMD
>> +	default y
>> +	help
>> +	  Detection, tunings and quirks for Hygon platforms.
>> +
>> +	  May be turned off in builds targetting other vendors.  Otherwise,
>> +	  must be enabled for Xen to work suitably on Hygon platforms.
>> +
>> +
>> +config CENTAUR
>> +	bool "Support Centaur CPUs"
>> +	depends on INTEL
>> +	default y
>> +	help
>> +	  Detection, tunings and quirks for Centaur platforms.
>> +
>> +	  May be turned off in builds targetting other vendors.  Otherwise,
>> +	  must be enabled for Xen to work suitably on Centaur platforms.
>> +
>> +config SHANGHAI
>> +	bool "Support Shanghai CPUs"
>> +	depends on INTEL
>> +	default y
>> +	help
>> +	  Detection, tunings and quirks for Shanghai platforms.
>> +
>> +	  May be turned off in builds targetting other vendors.  Otherwise,
>> +	  must be enabled for Xen to work suitably on Shanghai platforms.
>> +
>> +config UNKNOWN_CPU
>> +	bool "Support unknown CPUs"
>
> "Unknown CPUs" can be of two kinds: Such of vendors we don't explicitly s=
upport,
> and such of vendors we do explicitly support, but where we aren't aware o=
f the
> particular model. This needs to be unambiguous here, perhaps by it becomi=
ng
> UNKNOWN_CPU_VENDOR (and the prompt changing accordingly).

Right, what I do in this RFC is have compiled-out vendors fall back onto th=
e
unknown vendor path. Because it really is unknown to the binary.

I could call it GENERIC_CPU_VENDOR, or anything else, but the main question
is whether a toggle for this seems acceptable upstream. I don't see obvious
drawbacks.

>
>> --- a/xen/arch/x86/cpu/common.c
>> +++ b/xen/arch/x86/cpu/common.c
>> @@ -118,7 +118,7 @@ static void cf_check default_init(struct cpuinfo_x86=
 * c)
>>  	__clear_bit(X86_FEATURE_SEP, c->x86_capability);
>>  }
>> =20
>> -static const struct cpu_dev __initconst_cf_clobber __used default_cpu =
=3D {
>> +static const struct cpu_dev __initconst_cf_clobber default_cpu =3D {
>
> This change isn't explained in the description. __used here was introduce=
d not
> all this long ago together with __initconst_cf_clobber. Maybe this really=
 was
> a mistake, but if so it's correction should be explained.

It wasn't clear to me why __used was there (I assume it shouldn't have been=
),
but it definitely clashes with the intent of having it gone when UNKNOWN_CP=
U=3Dn.

If __used was misplaced to begin with I'm happy to get rid of it in a separ=
ate
patch. I don't think it warrants a Fixes tag, though.

>
>> @@ -340,7 +340,8 @@ void __init early_cpu_init(bool verbose)
>>  	*(u32 *)&c->x86_vendor_id[8] =3D ecx;
>>  	*(u32 *)&c->x86_vendor_id[4] =3D edx;
>> =20
>> -	c->x86_vendor =3D x86_cpuid_lookup_vendor(ebx, ecx, edx);
>> +	c->x86_vendor =3D x86_cpuid_lookup_vendor(ebx, ecx, edx) &
>> +	                X86_ENABLED_VENDORS;
>
> May I suggest the & to move ...
>
>>  	switch (c->x86_vendor) {
>
> ... here? Yes, you panic() below, but I see no reason to store inaccurate
> data when that's easy to avoid.

That's intentional. Otherwise further checks of c->x86_vendor in other part=
s of
the code may not go through the same branch as the one here.

>
>>  	case X86_VENDOR_INTEL:    intel_unlock_cpuid_leaves(c);
>>  				  actual_cpu =3D intel_cpu_dev;    break;
>> @@ -349,12 +350,14 @@ void __init early_cpu_init(bool verbose)
>>  	case X86_VENDOR_SHANGHAI: actual_cpu =3D shanghai_cpu_dev; break;
>>  	case X86_VENDOR_HYGON:    actual_cpu =3D hygon_cpu_dev;    break;
>>  	default:
>> +		if (verbose || !IS_ENABLED(CONFIG_UNKNOWN_CPU))
>> +			printk(XENLOG_ERR
>> +			       "Unrecognised or unsupported CPU vendor '%.12s'\n",
>> +			       c->x86_vendor_id);
>> +		if (!IS_ENABLED(CONFIG_UNKNOWN_CPU))
>> +			panic("Cannot run in unknown/compiled-out CPU vendor.\n");
>
> The text reads somewhat odd to me, "run in" in particular. Also nit: No f=
ull stop
> please at the end of log messages, except maybe in extraordinary situatio=
ns.

ack. As for the text, might as well be just "Unsupported hardware\n". The p=
rior
printk already gives all relevant information. The particulars on the text =
can
be argued after I send a non-RFC version.

>
> Jan



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Date: Thu, 27 Nov 2025 13:37:30 +0100
Message-ID: 
From: Alejandro Vallejo 
To: Jan Beulich 
CC: Andrew Cooper ,
	=?utf-8?q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" ,
	
Subject: Re: [RFC PATCH 01/11] x86: Add more granularity to the vendors in
 Kconfig
X-Mailer: aerc 0.20.1
References: <20251126164419.174487-1-alejandro.garciavallejo@amd.com>
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On Thu Nov 27, 2025 at 10:59 AM CET, Jan Beulich wrote:
> On 26.11.2025 17:44, Alejandro Vallejo wrote:
>> This enables very aggressive DCE passes on single-vendor builds in later
>> patches, as it will allow most vendor checks to become statically chosen
>> branches. A lot of statics go away and a lot more inlining is allowed.
>>=20
>> In order to allow x86_vendor_is() to fold into constants, expand Kconfig
>> to have the full set of vendors. Adds Hygon, Centaur, Shanghai and the
>> default path.
>
> Oh, one more thing: There's x86_vendor_is() yet, so what it is going to b=
e
> needs at least roughly explaining here.
>
> Jan

Fair enough.

Cheers,
Alejandro


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Subject: Re: [PATCH v5 08/12] mm: enable lazy_mmu sections to nest
To: Alexander Gordeev 
Cc: linux-mm@kvack.org, linux-kernel@vger.kernel.org,
 Andreas Larsson ,
 Andrew Morton ,
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 , Catalin Marinas ,
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References: <20251124132228.622678-1-kevin.brodsky@arm.com>
 <20251124132228.622678-9-kevin.brodsky@arm.com>
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On 27/11/2025 13:33, Alexander Gordeev wrote:
> On Mon, Nov 24, 2025 at 01:22:24PM +0000, Kevin Brodsky wrote:
>
> Hi Kevin,
>
> ...
>> +/**
>> + * lazy_mmu_mode_pause() - Pause the lazy MMU mode.
>> + *
>> + * Pauses the lazy MMU mode; if it is currently active, disables it and calls
>> + * arch_leave_lazy_mmu_mode().
>> + *
>> + * Must be paired with a call to lazy_mmu_mode_resume(). Calls to the
>> + * lazy_mmu_mode_* API have no effect until the matching resume() call.
> Sorry if it was discussed already - if yes, I somehow missed it. If I read
> the whole thing correctly enter()/pause() interleaving is not forbidden?

Correct, any call inside pause()/resume() is now allowed (but
effectively ignored). See discussion with Ryan in v4 [1].

[1]
https://lore.kernel.org/all/824bf705-e9d6-4eeb-9532-9059fa56427f@arm.com/

> lazy_mmu_mode_enable()
> 	lazy_mmu_mode_pause()
> 		lazy_mmu_mode_enable()
> 		...
> 		lazy_mmu_mode_disable()
> 	lazy_mmu_mode_resume()
> lazy_mmu_mode_disable()
>
>> + *
>> + * Has no effect if called:
>> + * - While paused (inside another pause()/resume() pair)
>> + * - In interrupt context
>> + */
>>  static inline void lazy_mmu_mode_pause(void)
>>  {
>> +	struct lazy_mmu_state *state = ¤t->lazy_mmu_state;
>> +
>>  	if (in_interrupt())
>>  		return;
>>  
>> -	arch_leave_lazy_mmu_mode();
>> +	VM_WARN_ON_ONCE(state->pause_count == U8_MAX);
>> +
>> +	if (state->pause_count++ == 0 && state->enable_count > 0)
>> +		arch_leave_lazy_mmu_mode();
>>  }
>>  
>> +/**
>> + * lazy_mmu_mode_pause() - Resume the lazy MMU mode.
>                     resume() ?

Good catch! One copy-paste too many...

- Kevin

>> + *
>> + * Resumes the lazy MMU mode; if it was active at the point where the matching
>> + * call to lazy_mmu_mode_pause() was made, re-enables it and calls
>> + * arch_enter_lazy_mmu_mode().
>> + *
>> + * Must match a call to lazy_mmu_mode_pause().
>> + *
>> + * Has no effect if called:
>> + * - While paused (inside another pause()/resume() pair)
>> + * - In interrupt context
>> + */
>>  static inline void lazy_mmu_mode_resume(void)
>>  {
>> +	struct lazy_mmu_state *state = ¤t->lazy_mmu_state;
>> +
>>  	if (in_interrupt())
>>  		return;
>>  
>> -	arch_enter_lazy_mmu_mode();
>> +	VM_WARN_ON_ONCE(state->pause_count == 0);
>> +
>> +	if (--state->pause_count == 0 && state->enable_count > 0)
>> +		arch_enter_lazy_mmu_mode();
>>  }
> ...
> Thanks!


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Date: Thu, 27 Nov 2025 14:15:22 +0100
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To: Jan Beulich 
CC: Andrew Cooper ,
	=?utf-8?q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" ,
	
Subject: Re: [RFC PATCH 03/11] x86: Add x86_vendor_is() by itself before
 using it
From: Alejandro Vallejo 
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References: <20251126164419.174487-1-alejandro.garciavallejo@amd.com>
 <20251126164419.174487-4-alejandro.garciavallejo@amd.com>
 
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Hi,

On Thu Nov 27, 2025 at 11:46 AM CET, Jan Beulich wrote:
> On 26.11.2025 17:44, Alejandro Vallejo wrote:
>> This function is meant to replace all instances of the following
>> patterns in CPU policies and boot_cpu_data:
>>=20
>>   - x->x86_vendor =3D=3D X86_VENDOR_FOO
>>   - x->x86_vendor !=3D X86_VENDOR_FOO
>>   - x->x86_vendor & (X86_VENDOR_FOO | X86_VENDOR_BAR)
>>=20
>> The secret sauce is that all branches inside the helper resolve at
>> compile time, so for the all-vendors-compiled-in case the function
>> resolves to equivalent code as that without the helper and you get
>> progressively more aggressive DCE as you disable vendors. The function
>> folds into a constant once you remove the fallback CPU vendor setting.
>
> Here and below in the comment, "fallback CPU vendor" wants clarifying. I
> don't view it as obvious that what's presently named UNKNOWN_CPU is that
> "fallback" (as imo that really isn't any kind of fallback, but merely a
> placeholder).

I'll rename all fallback references in commits/comments to "generic vendor"=
.
Though do note there's a fallback behaviour. It's introduced in patch 1 due
to the ANDing of the x86_vendor with the mask of compiled-in vendors.

We can trivially get rid of this behaviour, but I assumed booting in untune=
d
mode is preferable to panicking. And if you _do_ care about panicking when =
you
don't know about a CPU you're better off setting UNKNOWN_CPU=3Dn and gettin=
g that
exact behaviour.

>
>> While at this, move an include out of place so they sort alphabetically.
>
> I'd rather suggest to simply ...
>
>> --- a/xen/arch/x86/include/asm/cpuid.h
>> +++ b/xen/arch/x86/include/asm/cpuid.h
>> @@ -2,10 +2,12 @@
>>  #define __X86_CPUID_H__
>> =20
>>  #include 
>> +#include 
>> =20
>> -#include 
>> +#include 
>>  #include 
>>  #include 
>> +#include 
>
> ... drop it. xen/kernel.h, for example, already gets it for you anyway.

Good call.

>
>> @@ -56,6 +58,51 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf,
>>       (IS_ENABLED(CONFIG_SHANGHAI) ? X86_VENDOR_SHANGHAI : 0) | \
>>       (IS_ENABLED(CONFIG_HYGON)    ? X86_VENDOR_HYGON    : 0))
>> =20
>> +/*
>> + * When compiling Xen for a single vendor with no fallback vendor there=
's no
>> + * need no check the candidate. `vendor` is always a compile-time const=
ant,
>> + * which means this all can fold into a constant boolean.
>
> DYM "`vendor` is always supposed to be a compile-time constant, ..." ?

Yes. We could guard against it not being so by having an initial branch whe=
re:

if ( !__builtin_constant_p(vendor) )
    return candidate & filtered_vendor;
>
>> + * A runtime check at the time of CPUID probing guarantees we never run=
 on
>> + * wrong hardware and another check when loading CPU policies guarantee=
s we
>> + * never run policies for a vendor in another vendor's silicon.
>> + *
>> + * By the same token, the same folding can happen when no vendor is com=
piled
>> + * in and the fallback path is present.
>> + */
>> +static always_inline bool x86_vendor_is(uint8_t candidate, uint8_t vend=
or)
>
> I fear the comment, no matter that it's pretty large already, doesn't mak=
e
> clear how this function is to be used, i.e. how for this being an "is"
> predicate the two arguments should be chosen. My typical expectation woul=
d be
> for "is" predicates to apply to a single property, with other parameters =
(if
> any) only being auxiliary ones. Maybe it would already help if the first
> parameter wasn't named "candidate" but e.g. "actual" (from looking at jus=
t
> the next patch). Or maybe (depending on the number of possible different
> inputs for the first parameter) there want to be a few wrappers, so the
> "single property" aspect would be achieved at use sites.
>
> Then I see no reason for the parameters to be other than unsigned int. (S=
ame
> for the local variable then, obviously.)

I could also call it x86_vendor_in(), to mean it's a set membership check,
leaving its prototype as:

bool x86_vendor_in(unsigned int actual, unsigned int bitmap);

bitmap is a special kind because literal 0 has a special meaning (unknown).=
 So

I'd expect x86_vendor_in(X86_VENDOR_UNKNOWN, X86_VENDOR_UNKNOWN) to return =
true
when UNKNOWN_CPU=3Dy. One way to alleviate complexity would be to promote t=
he
unknown case to a first-class bit. It's not like it's zero for any good rea=
son.

As for the what goes in the first parameter, it's invariably the x86_vendor
field of cpuinfo_x86 (for boot_cpu_data), or of any cpu_policy.

This is meant to replace checks on vendors, so a natural (and universally u=
sed)
pattern across the codebase is to have a runtime variable checked against a
constant. Here's a longer list of patterns and expected transformations.

  from: cp->x86_vendor =3D=3D X86_VENDOR_AMD
    to: x86_vendor_is(c->x86_vendor, X86_VENDOR_AMD)

  from: cp->x86_vendor !=3D X86_VENDOR_AMD
    to: !x86_vendor_is(c->x86_vendor, X86_VENDOR_AMD)

  from: cp->x86_vendor & X86_VENDOR_AMD
    to: x86_vendor_is(c->x86_vendor, X86_VENDOR_AMD)

  from: cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)
    to: x86_vendor_is(c->x86_vendor, X86_VENDOR_AMD | X86_VENDOR_HYGON)

  from: !(cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON))
    to: !x86_vendor_is(cp->x86_vendor, X86_VENDOR_AMD | X86_VENDOR_HYGON)

  from: cp->x86_vendor =3D=3D X86_VENDOR_UNKNOWN
    to: x86_vendor_is(cp->x86_vendor, X86_VENDOR_UNKNOWN)

And switch statements converted to if-elseif chains.

With the second argument alaways being a constant there's j


> I'm further uncertain this is a good place for the function. In the old d=
ays
> it may have been, but cpuid.[ch] now are only about guest exposure of CPU=
ID,

This function would be used for both cpuinfo_x86 and cpu policies. Either h=
ere
or cpufeature.h works. I used to have it in x86-vendors.h, but that's expos=
ed
to the toolstack and nothing would come out of doing that.

> when this predicate is intended to be used for both host and guest. (As I
> realize only now, this also applies to the addition patch 1 does.) One
> might think processor.h might be a good home, but we're actually trying t=
o
> slim that one down. So one of cpufeature.h and cpufeatures.h, I guess. (M=
aybe
> other x86 maintainers also have thoughts here.)
>
>> +{
>> +    uint8_t filtered_vendor =3D vendor & X86_ENABLED_VENDORS;
>> +
>> +    if ( vendor =3D=3D X86_VENDOR_UNKNOWN )
>> +    {
>> +        if ( IS_ENABLED(CONFIG_UNKNOWN_CPU) )
>> +            /* no-vendor optimisation */
>
> Nit: Comment style (also again below).
>
>> +            return X86_ENABLED_VENDORS ? vendor =3D=3D candidate : true=
;
>
> With the surrounding if() this effectively (and more explicitly) is
>
>             return X86_ENABLED_VENDORS ? candidate =3D=3D X86_VENDOR_UNKN=
OWN : true;

Sure.

>
> First: Would one ever pass X86_VENDOR_UNKNOWN for "vendor"? The next patc=
h,
> for example, specifically doesn't.

I don't think so. There's definitely not any existing case atm. Still, I th=
ink
it's better to preserve the invariant that the follwing transformation:

  from: cp->x86_vendor =3D=3D X86_VENDOR_X
    to: x86_vendor_is(cp->x86_vendor, X86_VENDOR_X)

holds for every vendor variant in the "everything compiled-in" case.

> And then why not shorter as
>             return !X86_ENABLED_VENDORS || candidate =3D=3D X86_VENDOR_UN=
KNOWN;

Because I didn't think of it. I like your version better.

>
> Which raises the next question: Should we even allow a hypervisor to be b=
uilt
> with X86_ENABLED_VENDORS =3D=3D 0?

That's the most extreme case of "should we boot on a CPU known CPU vendor t=
hat=20
has been compiled out?", the current code in the RFC uses the unknown vendo=
r
as fallback. We could also panic. We could be trying to exercise the
"no assumptions about the vendor" paths.

It's a policy decision for you (x86 mantainers) to take. I personally think=
 the
default path is silly in this day and age and we could get rid of it entire=
ly.
Without it X86_ENABLED_VENDORS=3D0 would be indeed illegal. On that topic..=
.

> Plus, question more on patch 1, what's the (useful) difference between a =
build with all vendors set to N and
> (a) UNKNOWN_CPU=3Dn vs (b) UNKNOWN_CPU=3Dy? With all vendor support expli=
citly
> turned off, all CPUs are going to be "unknown".

... (a) causes a panic because all vendor go on the unknown path that leads=
 to
such panic, (b) has them run as if they belonged to a new unknown vendor FO=
OBAR.

You could do (b) to exercise the paths on unknown vendors. Or we could get =
rid
of it altogether and panic on compiled-out vendors. Kconfig is a middle-gro=
und
where the default CPU path serves a not-so-theoretical purpose.

>
>> +
>> +        /* unknown-vendor-elimination optimisation */
>> +        return false;
>> +    }
>> +
>> +    /* single-vendor optimisation */
>> +    if ( !IS_ENABLED(CONFIG_UNKNOWN_CPU) &&
>> +         (ISOLATE_LSB(X86_ENABLED_VENDORS) =3D=3D X86_ENABLED_VENDORS) =
)
>> +        return filtered_vendor =3D=3D X86_ENABLED_VENDORS;
>> +
>> +    /* compiled-out-vendor-elimination optimisation */
>> +    if ( !filtered_vendor )
>> +        return false;
>> +
>> +    /*
>> +     * When checking against a single vendor, perform an equality check=
, as
>> +     * it yields (marginally) better codegen
>> +     */
>> +    if ( ISOLATE_LSB(filtered_vendor) =3D=3D filtered_vendor )
>
> So one may pass a combination of multiple vendors for "vendor"? Is so, wh=
y
> is the parameter name singular?

Yes, it's a bitmap. Parameter could be in fact "bitmap", except the 0 case =
is
a special.

>
>> +        return filtered_vendor =3D=3D candidate ;
>
> Nit: Stray blank.

Oops.

Cheers,
Alejandro


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Date: Thu, 27 Nov 2025 14:19:04 +0100
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Subject: Re: [RFC PATCH 01/11] x86: Add more granularity to the vendors in
 Kconfig
To: Alejandro Vallejo 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <20251126164419.174487-1-alejandro.garciavallejo@amd.com>
 <20251126164419.174487-2-alejandro.garciavallejo@amd.com>
 <868f28fe-f2dd-469d-a0cf-111885184dfe@suse.com>
 
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From: Jan Beulich 
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On 27.11.2025 13:36, Alejandro Vallejo wrote:
> On Thu Nov 27, 2025 at 10:43 AM CET, Jan Beulich wrote:
>> On 26.11.2025 17:44, Alejandro Vallejo wrote:
>>> --- a/xen/arch/x86/Kconfig.cpu
>>> +++ b/xen/arch/x86/Kconfig.cpu
>>> @@ -19,4 +19,49 @@ config INTEL
>>>  	  May be turned off in builds targetting other vendors.  Otherwise,
>>>  	  must be enabled for Xen to work suitably on Intel platforms.
>>>  
>>> +config HYGON
>>> +	bool "Support Hygon CPUs"
>>> +	depends on AMD
>>> +	default y
>>> +	help
>>> +	  Detection, tunings and quirks for Hygon platforms.
>>> +
>>> +	  May be turned off in builds targetting other vendors.  Otherwise,
>>> +	  must be enabled for Xen to work suitably on Hygon platforms.
>>> +
>>> +
>>> +config CENTAUR
>>> +	bool "Support Centaur CPUs"
>>> +	depends on INTEL
>>> +	default y
>>> +	help
>>> +	  Detection, tunings and quirks for Centaur platforms.
>>> +
>>> +	  May be turned off in builds targetting other vendors.  Otherwise,
>>> +	  must be enabled for Xen to work suitably on Centaur platforms.
>>> +
>>> +config SHANGHAI
>>> +	bool "Support Shanghai CPUs"
>>> +	depends on INTEL
>>> +	default y
>>> +	help
>>> +	  Detection, tunings and quirks for Shanghai platforms.
>>> +
>>> +	  May be turned off in builds targetting other vendors.  Otherwise,
>>> +	  must be enabled for Xen to work suitably on Shanghai platforms.
>>> +
>>> +config UNKNOWN_CPU
>>> +	bool "Support unknown CPUs"
>>
>> "Unknown CPUs" can be of two kinds: Such of vendors we don't explicitly support,
>> and such of vendors we do explicitly support, but where we aren't aware of the
>> particular model. This needs to be unambiguous here, perhaps by it becoming
>> UNKNOWN_CPU_VENDOR (and the prompt changing accordingly).
> 
> Right, what I do in this RFC is have compiled-out vendors fall back onto the
> unknown vendor path. Because it really is unknown to the binary.
> 
> I could call it GENERIC_CPU_VENDOR, or anything else, but the main question
> is whether a toggle for this seems acceptable upstream. I don't see obvious
> drawbacks.

I'd recommend against "generic" or anything alike, as it'll rather suggest any
vendor's CPU will work reasonably. I'm fine with "unknown", just that the nature
of the unknown-ness needs making unambiguous.

>>> --- a/xen/arch/x86/cpu/common.c
>>> +++ b/xen/arch/x86/cpu/common.c
>>> @@ -118,7 +118,7 @@ static void cf_check default_init(struct cpuinfo_x86 * c)
>>>  	__clear_bit(X86_FEATURE_SEP, c->x86_capability);
>>>  }
>>>  
>>> -static const struct cpu_dev __initconst_cf_clobber __used default_cpu = {
>>> +static const struct cpu_dev __initconst_cf_clobber default_cpu = {
>>
>> This change isn't explained in the description. __used here was introduced not
>> all this long ago together with __initconst_cf_clobber. Maybe this really was
>> a mistake, but if so it's correction should be explained.
> 
> It wasn't clear to me why __used was there (I assume it shouldn't have been),
> but it definitely clashes with the intent of having it gone when UNKNOWN_CPU=n.
> 
> If __used was misplaced to begin with I'm happy to get rid of it in a separate
> patch. I don't think it warrants a Fixes tag, though.

I can only vaguely reconstruct that it may have been put there so the
.init.rodata.cf_clobber entry wouldn't go away. But as long as the compiler
also eliminates the function pointed at, that would be of no concern.

>>> @@ -340,7 +340,8 @@ void __init early_cpu_init(bool verbose)
>>>  	*(u32 *)&c->x86_vendor_id[8] = ecx;
>>>  	*(u32 *)&c->x86_vendor_id[4] = edx;
>>>  
>>> -	c->x86_vendor = x86_cpuid_lookup_vendor(ebx, ecx, edx);
>>> +	c->x86_vendor = x86_cpuid_lookup_vendor(ebx, ecx, edx) &
>>> +	                X86_ENABLED_VENDORS;
>>
>> May I suggest the & to move ...
>>
>>>  	switch (c->x86_vendor) {
>>
>> ... here? Yes, you panic() below, but I see no reason to store inaccurate
>> data when that's easy to avoid.
> 
> That's intentional. Otherwise further checks of c->x86_vendor in other parts of
> the code may not go through the same branch as the one here.

Hmm. I would kind of expect x86_vendor_is() to be capable of dealing with
that.

Jan


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Date: Thu, 27 Nov 2025 14:35:19 +0100
Message-ID: 
To: Jan Beulich 
CC: Andrew Cooper ,
	=?utf-8?q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" ,
	
Subject: Re: [RFC PATCH 04/11] x86: Refactor early vendor lookup code to use
 x86_vendor_is()
From: Alejandro Vallejo 
X-Mailer: aerc 0.20.1
References: <20251126164419.174487-1-alejandro.garciavallejo@amd.com>
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On Thu Nov 27, 2025 at 11:51 AM CET, Jan Beulich wrote:
> On 26.11.2025 17:44, Alejandro Vallejo wrote:
>> Move the "unknown" vendor ahead of all others and have it NOT rely
>> on x86_vendor_is(), as that would yield incorrect values for the
>> single-vendor+no-fallback case when running in incorrect hardware
>> (because x86_vendor_is() becomes a folded constant of the single
>> compiled-in vendor).
>>=20
>> This is one of the two places where x86_vendor_is() cannot be used,
>> along with the compatibility check on loaded guest CPU policies.
>>=20
>> Signed-off-by: Alejandro Vallejo 
>> ---
>>  xen/arch/x86/cpu/common.c | 31 +++++++++++++++++++++++--------
>>  1 file changed, 23 insertions(+), 8 deletions(-)
>>=20
>> diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c
>> index 393c30227f..c0c3606dd2 100644
>> --- a/xen/arch/x86/cpu/common.c
>> +++ b/xen/arch/x86/cpu/common.c
>> @@ -342,23 +342,38 @@ void __init early_cpu_init(bool verbose)
>> =20
>>  	c->x86_vendor =3D x86_cpuid_lookup_vendor(ebx, ecx, edx) &
>>  	                X86_ENABLED_VENDORS;
>> -	switch (c->x86_vendor) {
>> -	case X86_VENDOR_INTEL:    intel_unlock_cpuid_leaves(c);
>> -				  actual_cpu =3D intel_cpu_dev;    break;
>> -	case X86_VENDOR_AMD:      actual_cpu =3D amd_cpu_dev;      break;
>> -	case X86_VENDOR_CENTAUR:  actual_cpu =3D centaur_cpu_dev;  break;
>> -	case X86_VENDOR_SHANGHAI: actual_cpu =3D shanghai_cpu_dev; break;
>> -	case X86_VENDOR_HYGON:    actual_cpu =3D hygon_cpu_dev;    break;
>> -	default:
>> +
>> +	/*
>> +	 * We can't rely on x86_vendor_is() here due to the single-vendor
>> +	 * optimisation. It makes x86_vendor_is(x, y) rely on the constant `y`
>> +	 * matching the single vendor Xen was compiled for and ignore the
>> +	 * runtime variable `x`. In order to preserve sanity we must assert he=
re
>> +	 * that we never boot such a build in a CPU from another vendor, or
>> +	 * major chaos would ensue.
>> +	 */
>> +	if (c->x86_vendor =3D=3D X86_VENDOR_UNKNOWN)
>> +	{
>
> Nit: No mix of styles please. Here it wants to be Linux style.
>
>>  		if (verbose || !IS_ENABLED(CONFIG_UNKNOWN_CPU))
>>  			printk(XENLOG_ERR
>>  			       "Unrecognised or unsupported CPU vendor '%.12s'\n",
>>  			       c->x86_vendor_id);
>> +
>>  		if (!IS_ENABLED(CONFIG_UNKNOWN_CPU))
>>  			panic("Cannot run in unknown/compiled-out CPU vendor.\n");
>> =20
>>  		actual_cpu =3D default_cpu;
>>  	}
>> +	else if (x86_vendor_is(c->x86_vendor, X86_VENDOR_INTEL)) {
>> +		intel_unlock_cpuid_leaves(c);
>> +		actual_cpu =3D intel_cpu_dev;
>> +	} else if (x86_vendor_is(c->x86_vendor, X86_VENDOR_AMD))
>> +		actual_cpu =3D amd_cpu_dev;
>> +	else if (x86_vendor_is(c->x86_vendor, X86_VENDOR_CENTAUR))
>> +		actual_cpu =3D centaur_cpu_dev;
>> +	else if (x86_vendor_is(c->x86_vendor, X86_VENDOR_SHANGHAI))
>> +		actual_cpu =3D shanghai_cpu_dev;
>> +	else if (x86_vendor_is(c->x86_vendor, X86_VENDOR_HYGON))
>> +		actual_cpu =3D hygon_cpu_dev;
>
> If it needs to be like this, then so be it, but I view it as a downside t=
o
> not be able to use switch() anymore. It's not quite clear to me though wh=
at
> extra gains the transformation brings. The masking by X86_ENABLED_VENDORS
> already does most of what you want, and X86_VENDOR_UNKNOWN continues to b=
e
> handled separately anyway.

In this particular switch that's the case, but it's not so elsewhere.

Any switch would resolve to an unavoidable runtime check with compiled-out
branches left out (so long as the variable is ANDed with the enabled vendor=
s
mask, which it currently isn't). However, this still forces the compiler to=
 emit
a runtime check in case the vendor is actually zero. The conversion to if-e=
lseif
ensures we can statically decide a branch at compile time and remove all ot=
hers
(including the default one).

On a more stylistic note, though obviously this is all subjective, the patc=
h
that migrates switch statements to if-elseif chains shaves 100 LoC and mana=
ges
to squash multiple checks onto single ones by making use of the bitmap natu=
re of
the vendor field. The gains there are marginal, so I don't care that much, =
about
that but it's a measurable benefit in LoC and a (small) benefit in codegen.

Cheers,
Alejandro


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Date: Thu, 27 Nov 2025 14:37:51 +0100
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Subject: Re: [RFC PATCH 03/11] x86: Add x86_vendor_is() by itself before using
 it
To: Alejandro Vallejo 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <20251126164419.174487-1-alejandro.garciavallejo@amd.com>
 <20251126164419.174487-4-alejandro.garciavallejo@amd.com>
 
 
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On 27.11.2025 14:15, Alejandro Vallejo wrote:
> On Thu Nov 27, 2025 at 11:46 AM CET, Jan Beulich wrote:
>> On 26.11.2025 17:44, Alejandro Vallejo wrote:
>>> + * A runtime check at the time of CPUID probing guarantees we never run on
>>> + * wrong hardware and another check when loading CPU policies guarantees we
>>> + * never run policies for a vendor in another vendor's silicon.
>>> + *
>>> + * By the same token, the same folding can happen when no vendor is compiled
>>> + * in and the fallback path is present.
>>> + */
>>> +static always_inline bool x86_vendor_is(uint8_t candidate, uint8_t vendor)
>>
>> I fear the comment, no matter that it's pretty large already, doesn't make
>> clear how this function is to be used, i.e. how for this being an "is"
>> predicate the two arguments should be chosen. My typical expectation would be
>> for "is" predicates to apply to a single property, with other parameters (if
>> any) only being auxiliary ones. Maybe it would already help if the first
>> parameter wasn't named "candidate" but e.g. "actual" (from looking at just
>> the next patch). Or maybe (depending on the number of possible different
>> inputs for the first parameter) there want to be a few wrappers, so the
>> "single property" aspect would be achieved at use sites.
>>
>> Then I see no reason for the parameters to be other than unsigned int. (Same
>> for the local variable then, obviously.)
> 
> I could also call it x86_vendor_in(), to mean it's a set membership check,
> leaving its prototype as:
> 
> bool x86_vendor_in(unsigned int actual, unsigned int bitmap);
> 
> bitmap is a special kind because literal 0 has a special meaning (unknown). So
> 
> I'd expect x86_vendor_in(X86_VENDOR_UNKNOWN, X86_VENDOR_UNKNOWN) to return true
> when UNKNOWN_CPU=y. One way to alleviate complexity would be to promote the
> unknown case to a first-class bit. It's not like it's zero for any good reason.
> 
> As for the what goes in the first parameter, it's invariably the x86_vendor
> field of cpuinfo_x86 (for boot_cpu_data), or of any cpu_policy.
> 
> This is meant to replace checks on vendors, so a natural (and universally used)
> pattern across the codebase is to have a runtime variable checked against a
> constant. Here's a longer list of patterns and expected transformations.
> 
>   from: cp->x86_vendor == X86_VENDOR_AMD
>     to: x86_vendor_is(c->x86_vendor, X86_VENDOR_AMD)
> 
>   from: cp->x86_vendor != X86_VENDOR_AMD
>     to: !x86_vendor_is(c->x86_vendor, X86_VENDOR_AMD)
> 
>   from: cp->x86_vendor & X86_VENDOR_AMD
>     to: x86_vendor_is(c->x86_vendor, X86_VENDOR_AMD)
> 
>   from: cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)
>     to: x86_vendor_is(c->x86_vendor, X86_VENDOR_AMD | X86_VENDOR_HYGON)

There's a mix of c and cp up from here, but I hope the distinction isn't
relevant in this context. What is relevant though is that you shouldn't
be using struct cpuinfo_x86's x86_vendor field anymore. See the struct
definition.

>   from: !(cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON))
>     to: !x86_vendor_is(cp->x86_vendor, X86_VENDOR_AMD | X86_VENDOR_HYGON)
> 
>   from: cp->x86_vendor == X86_VENDOR_UNKNOWN
>     to: x86_vendor_is(cp->x86_vendor, X86_VENDOR_UNKNOWN)

For it to be clear what the "is" applies to, all of the above would imo
better be x86_vendor_is(c, X86_VENDOR_...) or
x86_vendor_is(cp, X86_VENDOR_...) at the call sites. The c / cp are what
I called "auxiliary data" elsewhere, and the property checked clearly is
the 2nd argument. To achieve this you could introduce a wrapper macro,
which would do the de-ref of the ->vendor field. (As a prereq, struct
cpu_policy would then also need to gain a "vendor" alias of the present
"x86_vendor" field.)

> And switch statements converted to if-elseif chains.

I've voiced concern towards this elsewhere.

>> First: Would one ever pass X86_VENDOR_UNKNOWN for "vendor"? The next patch,
>> for example, specifically doesn't.
> 
> I don't think so. There's definitely not any existing case atm. Still, I think
> it's better to preserve the invariant that the follwing transformation:
> 
>   from: cp->x86_vendor == X86_VENDOR_X
>     to: x86_vendor_is(cp->x86_vendor, X86_VENDOR_X)
> 
> holds for every vendor variant in the "everything compiled-in" case.

Otoh the code could be simplified if you simply rejected the passing of
X86_VENDOR_UNKNOWN.

>>> +    /* single-vendor optimisation */
>>> +    if ( !IS_ENABLED(CONFIG_UNKNOWN_CPU) &&
>>> +         (ISOLATE_LSB(X86_ENABLED_VENDORS) == X86_ENABLED_VENDORS) )
>>> +        return filtered_vendor == X86_ENABLED_VENDORS;
>>> +
>>> +    /* compiled-out-vendor-elimination optimisation */
>>> +    if ( !filtered_vendor )
>>> +        return false;
>>> +
>>> +    /*
>>> +     * When checking against a single vendor, perform an equality check, as
>>> +     * it yields (marginally) better codegen
>>> +     */
>>> +    if ( ISOLATE_LSB(filtered_vendor) == filtered_vendor )
>>
>> So one may pass a combination of multiple vendors for "vendor"? Is so, why
>> is the parameter name singular?
> 
> Yes, it's a bitmap. Parameter could be in fact "bitmap", except the 0 case is
> a special.

We have empty bitmaps elsewhere, as a more or less special case, so this doesn't
look overly concerning.

Jan


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From: "Teddy Astie" 
Subject: =?utf-8?Q?[RFC=20PATCH=200/4]=20x86/p2m:=20Some=20P2M=20refactoring?=
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First patch removes a shadow mode check in a function that can't be
called with shadow mode (only called with EPT hence HAP).

3 other patches drops guest_tlb_flush_mask by removing all its users :
in the shadow paging case by migrating it a shadow variant of it and
in the hap case by moving it to p2m->flush_tlb logic.

One of the goal is to prepare adding HAP-specific optimizations to TLB
flushing code without risking regressions in the shadow paging code.

Teddy Astie (4):
  x86/ept: Drop shadow mode check in ept_sync_domain()
  x86/shadow: Replace guest_tlb_flush_mask with sh_flush_tlb_mask
  x86/p2m-pt: Set p2m->need_flush if page was present before
  x86/hap: Migrate tlb flush logic to p2m->flush_tlb

 xen/arch/x86/flushtlb.c             | 15 ---------------
 xen/arch/x86/include/asm/flushtlb.h |  3 ---
 xen/arch/x86/include/asm/p2m.h      |  3 ---
 xen/arch/x86/mm/hap/hap.c           | 14 +++-----------
 xen/arch/x86/mm/hap/nested_hap.c    |  7 +------
 xen/arch/x86/mm/nested.c            |  2 +-
 xen/arch/x86/mm/p2m-ept.c           |  5 +++--
 xen/arch/x86/mm/p2m-pt.c            | 13 +++++--------
 xen/arch/x86/mm/p2m.c               |  8 ++++----
 xen/arch/x86/mm/shadow/common.c     | 12 ++++++------
 xen/arch/x86/mm/shadow/hvm.c        |  8 ++++----
 xen/arch/x86/mm/shadow/multi.c      | 18 ++++++------------
 xen/arch/x86/mm/shadow/private.h    | 22 ++++++++++++++++++++++
 13 files changed, 55 insertions(+), 75 deletions(-)

-- 
2.51.2



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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Update p2m->need_flush if page was present before (requiring a tlb flush).
This causes p2m->flush_tlb() to be now be reachable, make sure we call it
only when set.

Signed-off-by: Teddy Astie 
---
This change is important for the next patch.
Would it be better to merge it with the next patch ?

 xen/arch/x86/mm/p2m-pt.c | 3 +++
 xen/arch/x86/mm/p2m.c    | 6 ++++--
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/mm/p2m-pt.c b/xen/arch/x86/mm/p2m-pt.c
index 5a6ce2f8bc..1fea3884be 100644
--- a/xen/arch/x86/mm/p2m-pt.c
+++ b/xen/arch/x86/mm/p2m-pt.c
@@ -143,6 +143,9 @@ static int write_p2m_entry(struct p2m_domain *p2m, unsigned long gfn,
         if ( p2m->write_p2m_entry_post )
             p2m->write_p2m_entry_post(p2m, oflags);
 
+        if ( oflags & _PAGE_PRESENT )
+            p2m->need_flush = true;
+
         paging_unlock(d);
 
         if ( nestedhvm_enabled(d) && !p2m_is_nestedp2m(p2m) &&
diff --git a/xen/arch/x86/mm/p2m.c b/xen/arch/x86/mm/p2m.c
index e2a00a0efd..98f8272270 100644
--- a/xen/arch/x86/mm/p2m.c
+++ b/xen/arch/x86/mm/p2m.c
@@ -274,7 +274,8 @@ void p2m_tlb_flush_sync(struct p2m_domain *p2m)
     if ( p2m->need_flush )
     {
         p2m->need_flush = 0;
-        p2m->tlb_flush(p2m);
+        if ( p2m->tlb_flush )
+            p2m->tlb_flush(p2m);
     }
 }
 
@@ -287,7 +288,8 @@ void p2m_unlock_and_tlb_flush(struct p2m_domain *p2m)
     {
         p2m->need_flush = 0;
         mm_write_unlock(&p2m->lock);
-        p2m->tlb_flush(p2m);
+        if ( p2m->tlb_flush )
+            p2m->tlb_flush(p2m);
     } else
         mm_write_unlock(&p2m->lock);
 }
-- 
2.51.2



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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Now that p2m->need_flush is set when modifying the pagetable in a way that
requires it. We can move the tlb flush logic to p2m->tlb_flush.

Introduce hap_tlb_flush to do it, which is called by main p2m logic (e.g p2m_unlock,
p2m_tlb_flush_sync, ...). Drop inline calls of guest_flush_tlb_mask which are now
redundant with what now does p2m->flush_tlb, allowing us to drop guest_flush_tlb_*
as it is now unused.

No function change intended.

Signed-off-by: Teddy Astie 
---
I would like hap_p2m_tlb_flush() to use p2m->dirty_cpumask instead of
p2m->domain->dirty_cpumask. But p2m->dirty_cpumask is updated nowhere
in the current logic, so that doesn't work and p2m->domain->dirty_cpumask
is used instead (which works, even though it is less efficient with np2m).

 xen/arch/x86/flushtlb.c             | 15 ---------------
 xen/arch/x86/include/asm/flushtlb.h |  3 ---
 xen/arch/x86/include/asm/p2m.h      |  3 ---
 xen/arch/x86/mm/hap/hap.c           | 14 +++-----------
 xen/arch/x86/mm/hap/nested_hap.c    |  7 +------
 xen/arch/x86/mm/nested.c            |  2 +-
 xen/arch/x86/mm/p2m-pt.c            | 10 ++--------
 xen/arch/x86/mm/p2m.c               |  2 --
 8 files changed, 7 insertions(+), 49 deletions(-)

diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c
index 09e676c151..48e0142848 100644
--- a/xen/arch/x86/flushtlb.c
+++ b/xen/arch/x86/flushtlb.c
@@ -320,18 +320,3 @@ void cache_writeback(const void *addr, unsigned int size)
     asm volatile ("sfence" ::: "memory");
 }
 
-unsigned int guest_flush_tlb_flags(const struct domain *d)
-{
-    bool shadow = paging_mode_shadow(d);
-    bool asid = is_hvm_domain(d) && (cpu_has_svm || shadow);
-
-    return (shadow ? FLUSH_TLB : 0) | (asid ? FLUSH_HVM_ASID_CORE : 0);
-}
-
-void guest_flush_tlb_mask(const struct domain *d, const cpumask_t *mask)
-{
-    unsigned int flags = guest_flush_tlb_flags(d);
-
-    if ( flags )
-        flush_mask(mask, flags);
-}
diff --git a/xen/arch/x86/include/asm/flushtlb.h b/xen/arch/x86/include/asm/flushtlb.h
index 7bcbca2b7f..5be6c4e08d 100644
--- a/xen/arch/x86/include/asm/flushtlb.h
+++ b/xen/arch/x86/include/asm/flushtlb.h
@@ -190,7 +190,4 @@ void flush_area_mask(const cpumask_t *mask, const void *va,
 
 static inline void flush_page_to_ram(unsigned long mfn, bool sync_icache) {}
 
-unsigned int guest_flush_tlb_flags(const struct domain *d);
-void guest_flush_tlb_mask(const struct domain *d, const cpumask_t *mask);
-
 #endif /* __FLUSHTLB_H__ */
diff --git a/xen/arch/x86/include/asm/p2m.h b/xen/arch/x86/include/asm/p2m.h
index 9016e88411..9ee79c9d39 100644
--- a/xen/arch/x86/include/asm/p2m.h
+++ b/xen/arch/x86/include/asm/p2m.h
@@ -886,9 +886,6 @@ void np2m_flush_base(struct vcpu *v, unsigned long np2m_base);
 void hap_p2m_init(struct p2m_domain *p2m);
 void shadow_p2m_init(struct p2m_domain *p2m);
 
-void cf_check nestedp2m_write_p2m_entry_post(
-    struct p2m_domain *p2m, unsigned int oflags);
-
 #ifdef CONFIG_ALTP2M
 
 /*
diff --git a/xen/arch/x86/mm/hap/hap.c b/xen/arch/x86/mm/hap/hap.c
index 2f69ff9c7b..58254c3039 100644
--- a/xen/arch/x86/mm/hap/hap.c
+++ b/xen/arch/x86/mm/hap/hap.c
@@ -105,8 +105,6 @@ int hap_track_dirty_vram(struct domain *d,
             p2m_change_type_range(d, begin_pfn, begin_pfn + nr_frames,
                                   p2m_ram_rw, p2m_ram_logdirty);
 
-            guest_flush_tlb_mask(d, d->dirty_cpumask);
-
             memset(dirty_bitmap, 0xff, size); /* consider all pages dirty */
         }
         else
@@ -191,7 +189,6 @@ static int cf_check hap_enable_log_dirty(struct domain *d)
      * to be read-only, or via hardware-assisted log-dirty.
      */
     p2m_change_entry_type_global(d, p2m_ram_rw, p2m_ram_logdirty);
-    guest_flush_tlb_mask(d, d->dirty_cpumask);
 
     return 0;
 }
@@ -220,7 +217,6 @@ static void cf_check hap_clean_dirty_bitmap(struct domain *d)
      * be read-only, or via hardware-assisted log-dirty.
      */
     p2m_change_entry_type_global(d, p2m_ram_rw, p2m_ram_logdirty);
-    guest_flush_tlb_mask(d, d->dirty_cpumask);
 }
 
 /************************************************/
@@ -806,18 +802,14 @@ static void cf_check hap_update_paging_modes(struct vcpu *v)
     put_gfn(d, cr3_gfn);
 }
 
-static void cf_check
-hap_write_p2m_entry_post(struct p2m_domain *p2m, unsigned int oflags)
+void hap_p2m_tlb_flush(struct p2m_domain *p2m)
 {
-    struct domain *d = p2m->domain;
-
-    if ( oflags & _PAGE_PRESENT )
-        guest_flush_tlb_mask(d, d->dirty_cpumask);
+    flush_mask(p2m->domain->dirty_cpumask, FLUSH_HVM_ASID_CORE);
 }
 
 void hap_p2m_init(struct p2m_domain *p2m)
 {
-    p2m->write_p2m_entry_post = hap_write_p2m_entry_post;
+    p2m->tlb_flush = hap_p2m_tlb_flush;
 }
 
 static unsigned long cf_check hap_gva_to_gfn_real_mode(
diff --git a/xen/arch/x86/mm/hap/nested_hap.c b/xen/arch/x86/mm/hap/nested_hap.c
index 255fba7e1c..2b4ccc0c81 100644
--- a/xen/arch/x86/mm/hap/nested_hap.c
+++ b/xen/arch/x86/mm/hap/nested_hap.c
@@ -58,12 +58,7 @@
 /*        NESTED VIRT P2M FUNCTIONS         */
 /********************************************/
 
-void cf_check
-nestedp2m_write_p2m_entry_post(struct p2m_domain *p2m, unsigned int oflags)
-{
-    if ( oflags & _PAGE_PRESENT )
-        guest_flush_tlb_mask(p2m->domain, p2m->dirty_cpumask);
-}
+/* None */
 
 /********************************************/
 /*          NESTED VIRT FUNCTIONS           */
diff --git a/xen/arch/x86/mm/nested.c b/xen/arch/x86/mm/nested.c
index 03741ffae4..ac5d990c6c 100644
--- a/xen/arch/x86/mm/nested.c
+++ b/xen/arch/x86/mm/nested.c
@@ -38,7 +38,7 @@ int p2m_init_nestedp2m(struct domain *d)
         }
         p2m->p2m_class = p2m_nested;
         p2m->write_p2m_entry_pre = NULL;
-        p2m->write_p2m_entry_post = nestedp2m_write_p2m_entry_post;
+        p2m->write_p2m_entry_post = NULL;
         list_add(&p2m->np2m_list, &p2m_get_hostp2m(d)->np2m_list);
     }
 
diff --git a/xen/arch/x86/mm/p2m-pt.c b/xen/arch/x86/mm/p2m-pt.c
index 1fea3884be..24918d09e6 100644
--- a/xen/arch/x86/mm/p2m-pt.c
+++ b/xen/arch/x86/mm/p2m-pt.c
@@ -941,7 +941,7 @@ static void cf_check p2m_pt_change_entry_type_global(
 {
     l1_pgentry_t *tab;
     unsigned long gfn = 0;
-    unsigned int i, changed;
+    unsigned int i;
     const struct domain *d = p2m->domain;
 
     if ( pagetable_get_pfn(p2m_get_pagetable(p2m)) == 0 )
@@ -950,7 +950,7 @@ static void cf_check p2m_pt_change_entry_type_global(
     ASSERT(hap_enabled(d));
 
     tab = map_domain_page(pagetable_get_mfn(p2m_get_pagetable(p2m)));
-    for ( changed = i = 0; i < (1 << PAGETABLE_ORDER); ++i )
+    for ( i = 0; i < (1 << PAGETABLE_ORDER); ++i )
     {
         l1_pgentry_t e = tab[i];
 
@@ -966,14 +966,10 @@ static void cf_check p2m_pt_change_entry_type_global(
                 ASSERT_UNREACHABLE();
                 break;
             }
-            ++changed;
         }
         gfn += 1UL << (L4_PAGETABLE_SHIFT - PAGE_SHIFT);
     }
     unmap_domain_page(tab);
-
-    if ( changed )
-         guest_flush_tlb_mask(d, d->dirty_cpumask);
 }
 
 static int cf_check p2m_pt_change_entry_type_range(
@@ -1185,5 +1181,3 @@ void p2m_pt_init(struct p2m_domain *p2m)
     p2m->audit_p2m = p2m_pt_audit_p2m;
 #endif
 }
-
-
diff --git a/xen/arch/x86/mm/p2m.c b/xen/arch/x86/mm/p2m.c
index 98f8272270..bbdc20cbd9 100644
--- a/xen/arch/x86/mm/p2m.c
+++ b/xen/arch/x86/mm/p2m.c
@@ -2187,8 +2187,6 @@ void p2m_log_dirty_range(struct domain *d, unsigned long begin_pfn,
             dirty_bitmap[i >> 3] |= (1 << (i & 7));
 
     p2m_unlock(p2m);
-
-    guest_flush_tlb_mask(d, d->dirty_cpumask);
 }
 
 /*
-- 
2.51.2



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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From: "Teddy Astie" 
Subject: =?utf-8?Q?[RFC=20PATCH=201/4]=20x86/ept:=20Drop=20shadow=20mode=20check=20in=20ept=5Fsync=5Fdomain()?=
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This function can only be reached from EPT-related code which is inherently
HAP. Thus it is not useful to check for shadow_paging (or lack of HAP) there.

Moreover, it is an error to call this function in the non-EPT cases.

Not a functional change.

Signed-off-by: Teddy Astie 
---
This function is only called through EPT code and by vmx_domain_update_eptp()
called by EPT log-dirty logic, and doesn't look reachable from shadow paging
code.

I think the original reason of this check was for eventually allowing guests to
use both shadow paging and HAP and switch between the 2 dynamically.

 xen/arch/x86/mm/p2m-ept.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c
index ce4ef632ae..dfdbfa0afe 100644
--- a/xen/arch/x86/mm/p2m-ept.c
+++ b/xen/arch/x86/mm/p2m-ept.c
@@ -1268,9 +1268,10 @@ static void ept_sync_domain_mask(struct p2m_domain *p2m, const cpumask_t *mask)
 void ept_sync_domain(struct p2m_domain *p2m)
 {
     struct domain *d = p2m->domain;
+    ASSERT(hap_enabled(d));
 
-    /* Only if using EPT and this domain has some VCPUs to dirty. */
-    if ( paging_mode_shadow(d) || !d->vcpu || !d->vcpu[0] )
+    /* Only if this domain has some VCPUs to dirty. */
+    if ( !d->vcpu || !d->vcpu[0] )
         return;
 
     ept_sync_domain_prepare(p2m);
-- 
2.51.2



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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From: "Teddy Astie" 
Subject: =?utf-8?Q?[RFC=20PATCH=202/4]=20x86/shadow:=20Replace=20guest=5Ftlb=5Fflush=5Fmask=20with=20sh=5Fflush=5Ftlb=5Fmask?=
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Cc: "Teddy Astie" , "Jan Beulich" , "Andrew Cooper" , "Tim Deegan" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" 
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Introduce sh_flush_tlb_{mask,local} variants used to flush the
tlb from within the shadow paging code. This is meant to decouple
shadow code from the more general guest_tlb_flush_mask.

Not a functional change.

Signed-off-by: Teddy Astie 
---
 xen/arch/x86/mm/shadow/common.c  | 12 ++++++------
 xen/arch/x86/mm/shadow/hvm.c     |  8 ++++----
 xen/arch/x86/mm/shadow/multi.c   | 18 ++++++------------
 xen/arch/x86/mm/shadow/private.h | 22 ++++++++++++++++++++++
 4 files changed, 38 insertions(+), 22 deletions(-)

diff --git a/xen/arch/x86/mm/shadow/common.c b/xen/arch/x86/mm/shadow/common.c
index 0176e33bc9..8511da5c7f 100644
--- a/xen/arch/x86/mm/shadow/common.c
+++ b/xen/arch/x86/mm/shadow/common.c
@@ -421,7 +421,7 @@ static int oos_remove_write_access(struct vcpu *v, mfn_t gmfn,
     }
 
     if ( ftlb )
-        guest_flush_tlb_mask(d, d->dirty_cpumask);
+        sh_flush_tlb_mask(d, d->dirty_cpumask);
 
     return 0;
 }
@@ -969,7 +969,7 @@ static bool __must_check _shadow_prealloc(struct domain *d, unsigned int pages)
                 /* See if that freed up enough space */
                 if ( d->arch.paging.free_pages >= pages )
                 {
-                    guest_flush_tlb_mask(d, d->dirty_cpumask);
+                    sh_flush_tlb_mask(d, d->dirty_cpumask);
                     return true;
                 }
             }
@@ -984,7 +984,7 @@ static bool __must_check _shadow_prealloc(struct domain *d, unsigned int pages)
 
     ASSERT_UNREACHABLE();
 
-    guest_flush_tlb_mask(d, d->dirty_cpumask);
+    sh_flush_tlb_mask(d, d->dirty_cpumask);
 
     return false;
 }
@@ -1052,7 +1052,7 @@ void shadow_blow_tables(struct domain *d)
                     0);
 
     /* Make sure everyone sees the unshadowings */
-    guest_flush_tlb_mask(d, d->dirty_cpumask);
+    sh_flush_tlb_mask(d, d->dirty_cpumask);
 }
 
 void shadow_blow_tables_per_domain(struct domain *d)
@@ -1157,7 +1157,7 @@ mfn_t shadow_alloc(struct domain *d,
         if ( unlikely(!cpumask_empty(&mask)) )
         {
             perfc_incr(shadow_alloc_tlbflush);
-            guest_flush_tlb_mask(d, &mask);
+            sh_flush_tlb_mask(d, &mask);
         }
         /* Now safe to clear the page for reuse */
         clear_domain_page(page_to_mfn(sp));
@@ -2276,7 +2276,7 @@ void sh_remove_shadows(struct domain *d, mfn_t gmfn, int fast, int all)
 
     /* Need to flush TLBs now, so that linear maps are safe next time we
      * take a fault. */
-    guest_flush_tlb_mask(d, d->dirty_cpumask);
+    sh_flush_tlb_mask(d, d->dirty_cpumask);
 
     paging_unlock(d);
 }
diff --git a/xen/arch/x86/mm/shadow/hvm.c b/xen/arch/x86/mm/shadow/hvm.c
index 114957a3e1..b558ed82e8 100644
--- a/xen/arch/x86/mm/shadow/hvm.c
+++ b/xen/arch/x86/mm/shadow/hvm.c
@@ -594,7 +594,7 @@ static void validate_guest_pt_write(struct vcpu *v, mfn_t gmfn,
 
     if ( rc & SHADOW_SET_FLUSH )
         /* Need to flush TLBs to pick up shadow PT changes */
-        guest_flush_tlb_mask(d, d->dirty_cpumask);
+        sh_flush_tlb_mask(d, d->dirty_cpumask);
 
     if ( rc & SHADOW_SET_ERROR )
     {
@@ -744,7 +744,7 @@ bool cf_check shadow_flush_tlb(const unsigned long *vcpu_bitmap)
     }
 
     /* Flush TLBs on all CPUs with dirty vcpu state. */
-    guest_flush_tlb_mask(d, mask);
+    sh_flush_tlb_mask(d, mask);
 
     /* Done. */
     for_each_vcpu ( d, v )
@@ -978,7 +978,7 @@ static void cf_check sh_unshadow_for_p2m_change(
     }
 
     if ( flush )
-        guest_flush_tlb_mask(d, d->dirty_cpumask);
+        sh_flush_tlb_mask(d, d->dirty_cpumask);
 }
 
 #if (SHADOW_OPTIMIZATIONS & SHOPT_FAST_FAULT_PATH)
@@ -1196,7 +1196,7 @@ int shadow_track_dirty_vram(struct domain *d,
         }
     }
     if ( flush_tlb )
-        guest_flush_tlb_mask(d, d->dirty_cpumask);
+        sh_flush_tlb_mask(d, d->dirty_cpumask);
     goto out;
 
  out_sl1ma:
diff --git a/xen/arch/x86/mm/shadow/multi.c b/xen/arch/x86/mm/shadow/multi.c
index 03be61e225..3924ff4da6 100644
--- a/xen/arch/x86/mm/shadow/multi.c
+++ b/xen/arch/x86/mm/shadow/multi.c
@@ -79,12 +79,6 @@ const char *const fetch_type_names[] = {
 # define for_each_shadow_table(v, i) for ( (i) = 0; (i) < 1; ++(i) )
 #endif
 
-/* Helper to perform a local TLB flush. */
-static void sh_flush_local(const struct domain *d)
-{
-    flush_local(guest_flush_tlb_flags(d));
-}
-
 #if GUEST_PAGING_LEVELS >= 4 && defined(CONFIG_PV32)
 #define ASSERT_VALID_L2(t) \
     ASSERT((t) == SH_type_l2_shadow || (t) == SH_type_l2h_shadow)
@@ -2429,7 +2423,7 @@ static int cf_check sh_page_fault(
         perfc_incr(shadow_rm_write_flush_tlb);
         smp_wmb();
         atomic_inc(&d->arch.paging.shadow.gtable_dirty_version);
-        guest_flush_tlb_mask(d, d->dirty_cpumask);
+        sh_flush_tlb_mask(d, d->dirty_cpumask);
     }
 
 #if (SHADOW_OPTIMIZATIONS & SHOPT_OUT_OF_SYNC)
@@ -3243,7 +3237,7 @@ static pagetable_t cf_check sh_update_cr3(struct vcpu *v, bool noflush)
      * (old) shadow linear maps in the writeable mapping heuristics. */
 #if GUEST_PAGING_LEVELS == 4
     if ( sh_remove_write_access(d, gmfn, 4, 0) != 0 )
-        guest_flush_tlb_mask(d, d->dirty_cpumask);
+        sh_flush_tlb_mask(d, d->dirty_cpumask);
     old_entry = sh_set_toplevel_shadow(v, 0, gmfn, SH_type_l4_shadow,
                                        sh_make_shadow);
     if ( unlikely(pagetable_is_null(v->arch.paging.shadow.shadow_table[0])) )
@@ -3284,7 +3278,7 @@ static pagetable_t cf_check sh_update_cr3(struct vcpu *v, bool noflush)
             }
         }
         if ( flush )
-            guest_flush_tlb_mask(d, d->dirty_cpumask);
+            sh_flush_tlb_mask(d, d->dirty_cpumask);
         /* Now install the new shadows. */
         for ( i = 0; i < 4; i++ )
         {
@@ -3309,7 +3303,7 @@ static pagetable_t cf_check sh_update_cr3(struct vcpu *v, bool noflush)
     }
 #elif GUEST_PAGING_LEVELS == 2
     if ( sh_remove_write_access(d, gmfn, 2, 0) != 0 )
-        guest_flush_tlb_mask(d, d->dirty_cpumask);
+        sh_flush_tlb_mask(d, d->dirty_cpumask);
     old_entry = sh_set_toplevel_shadow(v, 0, gmfn, SH_type_l2_shadow,
                                        sh_make_shadow);
     ASSERT(pagetable_is_null(old_entry));
@@ -3747,7 +3741,7 @@ static void cf_check sh_pagetable_dying(paddr_t gpa)
         }
     }
     if ( flush )
-        guest_flush_tlb_mask(d, d->dirty_cpumask);
+        sh_flush_tlb_mask(d, d->dirty_cpumask);
 
     /* Remember that we've seen the guest use this interface, so we
      * can rely on it using it in future, instead of guessing at
@@ -3786,7 +3780,7 @@ static void cf_check sh_pagetable_dying(paddr_t gpa)
         mfn_to_page(gmfn)->pagetable_dying = true;
         shadow_unhook_mappings(d, smfn, 1/* user pages only */);
         /* Now flush the TLB: we removed toplevel mappings. */
-        guest_flush_tlb_mask(d, d->dirty_cpumask);
+        sh_flush_tlb_mask(d, d->dirty_cpumask);
     }
 
     /* Remember that we've seen the guest use this interface, so we
diff --git a/xen/arch/x86/mm/shadow/private.h b/xen/arch/x86/mm/shadow/private.h
index cef9dbef2e..565a334bc0 100644
--- a/xen/arch/x86/mm/shadow/private.h
+++ b/xen/arch/x86/mm/shadow/private.h
@@ -15,6 +15,7 @@
 // been included...
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -910,6 +911,27 @@ static inline int sh_check_page_has_no_refs(struct page_info *page)
              ((count & PGC_allocated) ? 1 : 0) );
 }
 
+/* Helper to perform a local TLB flush. */
+static inline void sh_flush_local(const struct domain *d)
+{
+    unsigned int flags = FLUSH_TLB;
+
+    if ( is_hvm_domain(d) )
+        flags |= FLUSH_HVM_ASID_CORE;
+
+    flush_local(flags);
+}
+
+static inline void sh_flush_tlb_mask(const struct domain *d, const cpumask_t *mask)
+{
+    unsigned int flags = FLUSH_TLB;
+
+    if ( is_hvm_domain(d) )
+        flags |= FLUSH_HVM_ASID_CORE;
+
+    flush_mask(mask, flags);
+}
+
 /* Flush the TLB of the selected vCPUs. */
 bool cf_check shadow_flush_tlb(const unsigned long *vcpu_bitmap);
 
-- 
2.51.2



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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On Thu Nov 27, 2025 at 2:19 PM CET, Jan Beulich wrote:
> On 27.11.2025 13:36, Alejandro Vallejo wrote:
>> On Thu Nov 27, 2025 at 10:43 AM CET, Jan Beulich wrote:
>>> On 26.11.2025 17:44, Alejandro Vallejo wrote:
>>>> --- a/xen/arch/x86/Kconfig.cpu
>>>> +++ b/xen/arch/x86/Kconfig.cpu
>>>> @@ -19,4 +19,49 @@ config INTEL
>>>>  	  May be turned off in builds targetting other vendors.  Otherwise,
>>>>  	  must be enabled for Xen to work suitably on Intel platforms.
>>>> =20
>>>> +config HYGON
>>>> +	bool "Support Hygon CPUs"
>>>> +	depends on AMD
>>>> +	default y
>>>> +	help
>>>> +	  Detection, tunings and quirks for Hygon platforms.
>>>> +
>>>> +	  May be turned off in builds targetting other vendors.  Otherwise,
>>>> +	  must be enabled for Xen to work suitably on Hygon platforms.
>>>> +
>>>> +
>>>> +config CENTAUR
>>>> +	bool "Support Centaur CPUs"
>>>> +	depends on INTEL
>>>> +	default y
>>>> +	help
>>>> +	  Detection, tunings and quirks for Centaur platforms.
>>>> +
>>>> +	  May be turned off in builds targetting other vendors.  Otherwise,
>>>> +	  must be enabled for Xen to work suitably on Centaur platforms.
>>>> +
>>>> +config SHANGHAI
>>>> +	bool "Support Shanghai CPUs"
>>>> +	depends on INTEL
>>>> +	default y
>>>> +	help
>>>> +	  Detection, tunings and quirks for Shanghai platforms.
>>>> +
>>>> +	  May be turned off in builds targetting other vendors.  Otherwise,
>>>> +	  must be enabled for Xen to work suitably on Shanghai platforms.
>>>> +
>>>> +config UNKNOWN_CPU
>>>> +	bool "Support unknown CPUs"
>>>
>>> "Unknown CPUs" can be of two kinds: Such of vendors we don't explicitly=
 support,
>>> and such of vendors we do explicitly support, but where we aren't aware=
 of the
>>> particular model. This needs to be unambiguous here, perhaps by it beco=
ming
>>> UNKNOWN_CPU_VENDOR (and the prompt changing accordingly).
>>=20
>> Right, what I do in this RFC is have compiled-out vendors fall back onto=
 the
>> unknown vendor path. Because it really is unknown to the binary.
>>=20
>> I could call it GENERIC_CPU_VENDOR, or anything else, but the main quest=
ion
>> is whether a toggle for this seems acceptable upstream. I don't see obvi=
ous
>> drawbacks.
>
> I'd recommend against "generic" or anything alike, as it'll rather sugges=
t any
> vendor's CPU will work reasonably. I'm fine with "unknown", just that the=
 nature
> of the unknown-ness needs making unambiguous.

Got it, if UNKNOWN_CPU_VENDOR sounds better I'm fine with that.

What are your thoughts on the panic-on-compiled-out-vendor vs use-unknown?

>
>>>> --- a/xen/arch/x86/cpu/common.c
>>>> +++ b/xen/arch/x86/cpu/common.c
>>>> @@ -118,7 +118,7 @@ static void cf_check default_init(struct cpuinfo_x=
86 * c)
>>>>  	__clear_bit(X86_FEATURE_SEP, c->x86_capability);
>>>>  }
>>>> =20
>>>> -static const struct cpu_dev __initconst_cf_clobber __used default_cpu=
 =3D {
>>>> +static const struct cpu_dev __initconst_cf_clobber default_cpu =3D {
>>>
>>> This change isn't explained in the description. __used here was introdu=
ced not
>>> all this long ago together with __initconst_cf_clobber. Maybe this real=
ly was
>>> a mistake, but if so it's correction should be explained.
>>=20
>> It wasn't clear to me why __used was there (I assume it shouldn't have b=
een),
>> but it definitely clashes with the intent of having it gone when UNKNOWN=
_CPU=3Dn.
>>=20
>> If __used was misplaced to begin with I'm happy to get rid of it in a se=
parate
>> patch. I don't think it warrants a Fixes tag, though.
>
> I can only vaguely reconstruct that it may have been put there so the
> .init.rodata.cf_clobber entry wouldn't go away. But as long as the compil=
er
> also eliminates the function pointed at, that would be of no concern.

ack.

>
>>>> @@ -340,7 +340,8 @@ void __init early_cpu_init(bool verbose)
>>>>  	*(u32 *)&c->x86_vendor_id[8] =3D ecx;
>>>>  	*(u32 *)&c->x86_vendor_id[4] =3D edx;
>>>> =20
>>>> -	c->x86_vendor =3D x86_cpuid_lookup_vendor(ebx, ecx, edx);
>>>> +	c->x86_vendor =3D x86_cpuid_lookup_vendor(ebx, ecx, edx) &
>>>> +	                X86_ENABLED_VENDORS;
>>>
>>> May I suggest the & to move ...
>>>
>>>>  	switch (c->x86_vendor) {
>>>
>>> ... here? Yes, you panic() below, but I see no reason to store inaccura=
te
>>> data when that's easy to avoid.
>>=20
>> That's intentional. Otherwise further checks of c->x86_vendor in other p=
arts of
>> the code may not go through the same branch as the one here.
>
> Hmm. I would kind of expect x86_vendor_is() to be capable of dealing with
> that.

Sure, but that's not done until the end of the series. and otherwise I'd be
introducing the fallback behaviour in some places and not others. I could
remove this AND at the end. Or remove it altogether if we go for a panic on
compiled-out vendor strategy.

Cheers,
Aljandro


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Subject: Re: [RFC PATCH 1/4] x86/ept: Drop shadow mode check in
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On 27.11.2025 14:39, Teddy Astie wrote:
> This function can only be reached from EPT-related code which is inherently
> HAP. Thus it is not useful to check for shadow_paging (or lack of HAP) there.
> 
> Moreover, it is an error to call this function in the non-EPT cases.
> 
> Not a functional change.
> 
> Signed-off-by: Teddy Astie 

Reviewed-by: Jan Beulich 

> ---
> This function is only called through EPT code and by vmx_domain_update_eptp()
> called by EPT log-dirty logic, and doesn't look reachable from shadow paging
> code.
> 
> I think the original reason of this check was for eventually allowing guests to
> use both shadow paging and HAP and switch between the 2 dynamically.

I don't think there ever was such a plan. The function originally lived in vmx.c,
and there - even if just as a safeguard - having the extra check may have made
sense.

Jan


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Subject: Re: [RFC PATCH 2/4] x86/shadow: Replace guest_tlb_flush_mask with
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To: Teddy Astie 
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On 27.11.2025 14:39, Teddy Astie wrote:
> Introduce sh_flush_tlb_{mask,local} variants used to flush the
> tlb from within the shadow paging code. This is meant to decouple
> shadow code from the more general guest_tlb_flush_mask.

And why is this desirable? You now open-code guest_flush_tlb_mask() and
guest_flush_tlb_flags(). That's a step backwards, requiring a meaningful
win elsewhere to balance.

Jan


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Subject: Re: [RFC PATCH 01/11] x86: Add more granularity to the vendors in
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To: Alejandro Vallejo 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
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On 27.11.2025 14:44, Alejandro Vallejo wrote:
> On Thu Nov 27, 2025 at 2:19 PM CET, Jan Beulich wrote:
>> On 27.11.2025 13:36, Alejandro Vallejo wrote:
>>> On Thu Nov 27, 2025 at 10:43 AM CET, Jan Beulich wrote:
>>>> On 26.11.2025 17:44, Alejandro Vallejo wrote:
>>>>> --- a/xen/arch/x86/Kconfig.cpu
>>>>> +++ b/xen/arch/x86/Kconfig.cpu
>>>>> @@ -19,4 +19,49 @@ config INTEL
>>>>>  	  May be turned off in builds targetting other vendors.  Otherwise,
>>>>>  	  must be enabled for Xen to work suitably on Intel platforms.
>>>>>  
>>>>> +config HYGON
>>>>> +	bool "Support Hygon CPUs"
>>>>> +	depends on AMD
>>>>> +	default y
>>>>> +	help
>>>>> +	  Detection, tunings and quirks for Hygon platforms.
>>>>> +
>>>>> +	  May be turned off in builds targetting other vendors.  Otherwise,
>>>>> +	  must be enabled for Xen to work suitably on Hygon platforms.
>>>>> +
>>>>> +
>>>>> +config CENTAUR
>>>>> +	bool "Support Centaur CPUs"
>>>>> +	depends on INTEL
>>>>> +	default y
>>>>> +	help
>>>>> +	  Detection, tunings and quirks for Centaur platforms.
>>>>> +
>>>>> +	  May be turned off in builds targetting other vendors.  Otherwise,
>>>>> +	  must be enabled for Xen to work suitably on Centaur platforms.
>>>>> +
>>>>> +config SHANGHAI
>>>>> +	bool "Support Shanghai CPUs"
>>>>> +	depends on INTEL
>>>>> +	default y
>>>>> +	help
>>>>> +	  Detection, tunings and quirks for Shanghai platforms.
>>>>> +
>>>>> +	  May be turned off in builds targetting other vendors.  Otherwise,
>>>>> +	  must be enabled for Xen to work suitably on Shanghai platforms.
>>>>> +
>>>>> +config UNKNOWN_CPU
>>>>> +	bool "Support unknown CPUs"
>>>>
>>>> "Unknown CPUs" can be of two kinds: Such of vendors we don't explicitly support,
>>>> and such of vendors we do explicitly support, but where we aren't aware of the
>>>> particular model. This needs to be unambiguous here, perhaps by it becoming
>>>> UNKNOWN_CPU_VENDOR (and the prompt changing accordingly).
>>>
>>> Right, what I do in this RFC is have compiled-out vendors fall back onto the
>>> unknown vendor path. Because it really is unknown to the binary.
>>>
>>> I could call it GENERIC_CPU_VENDOR, or anything else, but the main question
>>> is whether a toggle for this seems acceptable upstream. I don't see obvious
>>> drawbacks.
>>
>> I'd recommend against "generic" or anything alike, as it'll rather suggest any
>> vendor's CPU will work reasonably. I'm fine with "unknown", just that the nature
>> of the unknown-ness needs making unambiguous.
> 
> Got it, if UNKNOWN_CPU_VENDOR sounds better I'm fine with that.
> 
> What are your thoughts on the panic-on-compiled-out-vendor vs use-unknown?

Both have benefits and downsides, I think. The choice may need to be another
Kconfig or command line option. I'm also curious what other x86 maintainers
may think.

Jan


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Date: Thu, 27 Nov 2025 15:06:04 +0100
Message-ID: 
Subject: Re: [RFC PATCH 03/11] x86: Add x86_vendor_is() by itself before
 using it
From: Alejandro Vallejo 
To: Jan Beulich 
CC: Andrew Cooper ,
	=?utf-8?q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" ,
	
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On Thu Nov 27, 2025 at 2:37 PM CET, Jan Beulich wrote:
> On 27.11.2025 14:15, Alejandro Vallejo wrote:
>> On Thu Nov 27, 2025 at 11:46 AM CET, Jan Beulich wrote:
>>> On 26.11.2025 17:44, Alejandro Vallejo wrote:
>>>> + * A runtime check at the time of CPUID probing guarantees we never r=
un on
>>>> + * wrong hardware and another check when loading CPU policies guarant=
ees we
>>>> + * never run policies for a vendor in another vendor's silicon.
>>>> + *
>>>> + * By the same token, the same folding can happen when no vendor is c=
ompiled
>>>> + * in and the fallback path is present.
>>>> + */
>>>> +static always_inline bool x86_vendor_is(uint8_t candidate, uint8_t ve=
ndor)
>>>
>>> I fear the comment, no matter that it's pretty large already, doesn't m=
ake
>>> clear how this function is to be used, i.e. how for this being an "is"
>>> predicate the two arguments should be chosen. My typical expectation wo=
uld be
>>> for "is" predicates to apply to a single property, with other parameter=
s (if
>>> any) only being auxiliary ones. Maybe it would already help if the firs=
t
>>> parameter wasn't named "candidate" but e.g. "actual" (from looking at j=
ust
>>> the next patch). Or maybe (depending on the number of possible differen=
t
>>> inputs for the first parameter) there want to be a few wrappers, so the
>>> "single property" aspect would be achieved at use sites.
>>>
>>> Then I see no reason for the parameters to be other than unsigned int. =
(Same
>>> for the local variable then, obviously.)
>>=20
>> I could also call it x86_vendor_in(), to mean it's a set membership chec=
k,
>> leaving its prototype as:
>>=20
>> bool x86_vendor_in(unsigned int actual, unsigned int bitmap);
>>=20
>> bitmap is a special kind because literal 0 has a special meaning (unknow=
n). So
>>=20
>> I'd expect x86_vendor_in(X86_VENDOR_UNKNOWN, X86_VENDOR_UNKNOWN) to retu=
rn true
>> when UNKNOWN_CPU=3Dy. One way to alleviate complexity would be to promot=
e the
>> unknown case to a first-class bit. It's not like it's zero for any good =
reason.
>>=20
>> As for the what goes in the first parameter, it's invariably the x86_ven=
dor
>> field of cpuinfo_x86 (for boot_cpu_data), or of any cpu_policy.
>>=20
>> This is meant to replace checks on vendors, so a natural (and universall=
y used)
>> pattern across the codebase is to have a runtime variable checked agains=
t a
>> constant. Here's a longer list of patterns and expected transformations.
>>=20
>>   from: cp->x86_vendor =3D=3D X86_VENDOR_AMD
>>     to: x86_vendor_is(c->x86_vendor, X86_VENDOR_AMD)
>>=20
>>   from: cp->x86_vendor !=3D X86_VENDOR_AMD
>>     to: !x86_vendor_is(c->x86_vendor, X86_VENDOR_AMD)
>>=20
>>   from: cp->x86_vendor & X86_VENDOR_AMD
>>     to: x86_vendor_is(c->x86_vendor, X86_VENDOR_AMD)
>>=20
>>   from: cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)
>>     to: x86_vendor_is(c->x86_vendor, X86_VENDOR_AMD | X86_VENDOR_HYGON)
>
> There's a mix of c and cp up from here, but I hope the distinction isn't
> relevant in this context. What is relevant though is that you shouldn't
> be using struct cpuinfo_x86's x86_vendor field anymore. See the struct
> definition.

It indeed isn't relevant. Fair enough, I was misled by its use in cpu/commo=
n.c

>
>>   from: !(cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON))
>>     to: !x86_vendor_is(cp->x86_vendor, X86_VENDOR_AMD | X86_VENDOR_HYGON=
)
>>=20
>>   from: cp->x86_vendor =3D=3D X86_VENDOR_UNKNOWN
>>     to: x86_vendor_is(cp->x86_vendor, X86_VENDOR_UNKNOWN)
>
> For it to be clear what the "is" applies to, all of the above would imo
> better be x86_vendor_is(c, X86_VENDOR_...) or
> x86_vendor_is(cp, X86_VENDOR_...) at the call sites. The c / cp are what
> I called "auxiliary data" elsewhere, and the property checked clearly is
> the 2nd argument. To achieve this you could introduce a wrapper macro,
> which would do the de-ref of the ->vendor field. (As a prereq, struct
> cpu_policy would then also need to gain a "vendor" alias of the present
> "x86_vendor" field.)

I'd be fine with that. It'd also trim the diffstat substantially by allowin=
g
a number of cases to become single-line checks rather than splitting

>
>> And switch statements converted to if-elseif chains.
>
> I've voiced concern towards this elsewhere.
>
>>> First: Would one ever pass X86_VENDOR_UNKNOWN for "vendor"? The next pa=
tch,
>>> for example, specifically doesn't.
>>=20
>> I don't think so. There's definitely not any existing case atm. Still, I=
 think
>> it's better to preserve the invariant that the follwing transformation:
>>=20
>>   from: cp->x86_vendor =3D=3D X86_VENDOR_X
>>     to: x86_vendor_is(cp->x86_vendor, X86_VENDOR_X)
>>=20
>> holds for every vendor variant in the "everything compiled-in" case.
>
> Otoh the code could be simplified if you simply rejected the passing of
> X86_VENDOR_UNKNOWN.

How would this rejection go? Something like this at the top?

  if ( vendor =3D=3D X86_VENDOR_UNKNOWN )
      BUG();

I'd rather have something that causes a compile-time error, but I'm not sur=
e
how to cause a compile time failure when a constant matches FOO.

Surely there must be a way...

>
>>>> +    /* single-vendor optimisation */
>>>> +    if ( !IS_ENABLED(CONFIG_UNKNOWN_CPU) &&
>>>> +         (ISOLATE_LSB(X86_ENABLED_VENDORS) =3D=3D X86_ENABLED_VENDORS=
) )
>>>> +        return filtered_vendor =3D=3D X86_ENABLED_VENDORS;
>>>> +
>>>> +    /* compiled-out-vendor-elimination optimisation */
>>>> +    if ( !filtered_vendor )
>>>> +        return false;
>>>> +
>>>> +    /*
>>>> +     * When checking against a single vendor, perform an equality che=
ck, as
>>>> +     * it yields (marginally) better codegen
>>>> +     */
>>>> +    if ( ISOLATE_LSB(filtered_vendor) =3D=3D filtered_vendor )
>>>
>>> So one may pass a combination of multiple vendors for "vendor"? Is so, =
why
>>> is the parameter name singular?
>>=20
>> Yes, it's a bitmap. Parameter could be in fact "bitmap", except the 0 ca=
se is
>> a special.
>
> We have empty bitmaps elsewhere, as a more or less special case, so this =
doesn't
> look overly concerning.
>
> Jan

Ack,

Cheers,
Alejandro


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Subject: Re: [RFC PATCH 3/4] x86/p2m-pt: Set p2m->need_flush if page was
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To: Teddy Astie 
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On 27.11.2025 14:39, Teddy Astie wrote:
> Update p2m->need_flush if page was present before (requiring a tlb flush).
> This causes p2m->flush_tlb() to be now be reachable, make sure we call it
> only when set.

I don't follow. Why would p2m->flush_tlb() not have been reachable? There are
other places where ->need_flush is set to true.

> Signed-off-by: Teddy Astie 
> ---
> This change is important for the next patch.
> Would it be better to merge it with the next patch ?

I'm inclined to say yes, but without understanding the description here I
cannot be sure.

Hmm, wait. The sole place in x86 where the flag is set is in EPT code. So
do you perhaps mean that for NPT or shadow those call sites can now be
reached, and hence - with the hook being NULL there - checks need adding?
Then, by its title, the next patch actually may be making use of the hook,
so the checks then can be dropped again?

Jan


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On 27.11.2025 15:06, Alejandro Vallejo wrote:
> On Thu Nov 27, 2025 at 2:37 PM CET, Jan Beulich wrote:
>> On 27.11.2025 14:15, Alejandro Vallejo wrote:
>>> On Thu Nov 27, 2025 at 11:46 AM CET, Jan Beulich wrote:
>>>> First: Would one ever pass X86_VENDOR_UNKNOWN for "vendor"? The next patch,
>>>> for example, specifically doesn't.
>>>
>>> I don't think so. There's definitely not any existing case atm. Still, I think
>>> it's better to preserve the invariant that the follwing transformation:
>>>
>>>   from: cp->x86_vendor == X86_VENDOR_X
>>>     to: x86_vendor_is(cp->x86_vendor, X86_VENDOR_X)
>>>
>>> holds for every vendor variant in the "everything compiled-in" case.
>>
>> Otoh the code could be simplified if you simply rejected the passing of
>> X86_VENDOR_UNKNOWN.
> 
> How would this rejection go? Something like this at the top?
> 
>   if ( vendor == X86_VENDOR_UNKNOWN )
>       BUG();
> 
> I'd rather have something that causes a compile-time error, but I'm not sure
> how to cause a compile time failure when a constant matches FOO.
> 
> Surely there must be a way...

Take a look at BUILD_ERROR(), which I think may fit here.

Jan


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Date: Thu, 27 Nov 2025 15:27:41 +0100
From: Anthony PERARD 
To: Jan Beulich 
Cc: "xen-devel@lists.xenproject.org" ,
	Anthony PERARD ,
	Juergen Gross 
Subject: Re: [PATCH] libxl/json: don't expose internal functions
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On Tue, Nov 25, 2025 at 10:11:21AM +0100, Jan Beulich wrote:
> Ideally internal function declarations wouldn't live in a non-private
> header. If already they need to, they should be hidden as much as
> possible. That is (a) their declarations shouldn't be exposed and (b) the
> symbols shouldn't appear in the shared library's dynamic symbol table.
> Gate the declarations upon _hidden actually being defined (rather than
> providing an empty fallback), and apply _hidden also to the libyail
> variants.

The YAJL functions needs to stay in the API, they've been exposed on
purpose in this header... The only user of those I know is `xl`. They
are limited since your application also needs to use libyajl. I think
I've butchered this header enough to make it complicated to use for
applications that are not `xl`.

libxl_json.h is only part of the header, there's a second part that is
automatically generated, _libxl_types_json.h.

While we could simply move the few prototype that uses json-c support
listed here to an actually private header, there's still the
autogenerated header to deal with. I feel like it would simpler to avoid
installing both headers (libxl_json.h and _libxl_types_json.h) when we
compile the tools with json-c. And even maybe add a fake "libxl_json.h"
which only have an "#error" saying the json helper aren't available
anymore.

Thanks,

-- 
Anthony PERARD


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Subject: Re: [RFC PATCH 4/4] x86/hap: Migrate tlb flush logic to
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To: Teddy Astie 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 27.11.2025 14:39, Teddy Astie wrote:
> Now that p2m->need_flush is set when modifying the pagetable in a way that
> requires it. We can move the tlb flush logic to p2m->tlb_flush.
> 
> Introduce hap_tlb_flush to do it, which is called by main p2m logic (e.g p2m_unlock,
> p2m_tlb_flush_sync, ...). Drop inline calls of guest_flush_tlb_mask which are now
> redundant with what now does p2m->flush_tlb, allowing us to drop guest_flush_tlb_*
> as it is now unused.
> 
> No function change intended.
> 
> Signed-off-by: Teddy Astie 

I think the safety / correctness of the change needs explaining in the
description. TLB flushing is often delicate, so it wants to be made pretty
clear that no necessary flush is now omitted anywhere. It also wants to be
made clear, from a performance angle, no new excess flushing is added (see
below for a respective question towards EPT).

> --- a/xen/arch/x86/flushtlb.c
> +++ b/xen/arch/x86/flushtlb.c
> @@ -320,18 +320,3 @@ void cache_writeback(const void *addr, unsigned int size)
>      asm volatile ("sfence" ::: "memory");
>  }
>  
> -unsigned int guest_flush_tlb_flags(const struct domain *d)
> -{
> -    bool shadow = paging_mode_shadow(d);
> -    bool asid = is_hvm_domain(d) && (cpu_has_svm || shadow);

There's an SVM dependency here, which ...

> --- a/xen/arch/x86/mm/hap/hap.c
> +++ b/xen/arch/x86/mm/hap/hap.c
> @@ -105,8 +105,6 @@ int hap_track_dirty_vram(struct domain *d,
>              p2m_change_type_range(d, begin_pfn, begin_pfn + nr_frames,
>                                    p2m_ram_rw, p2m_ram_logdirty);
>  
> -            guest_flush_tlb_mask(d, d->dirty_cpumask);
> -
>              memset(dirty_bitmap, 0xff, size); /* consider all pages dirty */
>          }
>          else
> @@ -191,7 +189,6 @@ static int cf_check hap_enable_log_dirty(struct domain *d)
>       * to be read-only, or via hardware-assisted log-dirty.
>       */
>      p2m_change_entry_type_global(d, p2m_ram_rw, p2m_ram_logdirty);
> -    guest_flush_tlb_mask(d, d->dirty_cpumask);
>  
>      return 0;
>  }
> @@ -220,7 +217,6 @@ static void cf_check hap_clean_dirty_bitmap(struct domain *d)
>       * be read-only, or via hardware-assisted log-dirty.
>       */
>      p2m_change_entry_type_global(d, p2m_ram_rw, p2m_ram_logdirty);
> -    guest_flush_tlb_mask(d, d->dirty_cpumask);
>  }
>  
>  /************************************************/
> @@ -806,18 +802,14 @@ static void cf_check hap_update_paging_modes(struct vcpu *v)
>      put_gfn(d, cr3_gfn);
>  }
>  
> -static void cf_check
> -hap_write_p2m_entry_post(struct p2m_domain *p2m, unsigned int oflags)
> +void hap_p2m_tlb_flush(struct p2m_domain *p2m)
>  {
> -    struct domain *d = p2m->domain;
> -
> -    if ( oflags & _PAGE_PRESENT )
> -        guest_flush_tlb_mask(d, d->dirty_cpumask);
> +    flush_mask(p2m->domain->dirty_cpumask, FLUSH_HVM_ASID_CORE);
>  }
>  
>  void hap_p2m_init(struct p2m_domain *p2m)
>  {
> -    p2m->write_p2m_entry_post = hap_write_p2m_entry_post;
> +    p2m->tlb_flush = hap_p2m_tlb_flush;
>  }

... is entirely lost throughout the hap.c changes. Are we now doing excess flushing
for EPT? I guess the relevant point here is that hap_p2m_init(), despite its name
suggesting otherwise, doesn't come into play when EPT is in use. (This could do
with cleaning up, as right now it then has to be the case that in a AMD_SVM=n
configuration that function is unreachable, violating a Misra rule.

Also, why would hap_p2m_tlb_flush() lose static and cf_check that the prior hook
function validly had?

Jan


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From: "Julian Vetter" 
Subject: =?utf-8?Q?[PATCH]=20x86/efi:=20Remove=20NX=20check=20from=20efi-boot.h?=
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Currently Intel CPUs in EFI mode with the "Execute Disable Bit" disabled
and the 'CONFIG_REQUIRE_NX=y' fail to boot, because this check is
performed before trampoline_setup is called, which determines if NX is
supported or if it's hidden by 'MSR_IA32_MISC_ENABLE[34] = 1' (if so,
re-enables NX).

Signed-off-by: Julian Vetter 
---
 xen/arch/x86/efi/efi-boot.h | 12 ------------
 1 file changed, 12 deletions(-)

diff --git a/xen/arch/x86/efi/efi-boot.h b/xen/arch/x86/efi/efi-boot.h
index 0194720003..8dfd549f12 100644
--- a/xen/arch/x86/efi/efi-boot.h
+++ b/xen/arch/x86/efi/efi-boot.h
@@ -748,18 +748,6 @@ static void __init efi_arch_cpu(void)
     if ( (eax >> 16) == 0x8000 && eax > 0x80000000U )
     {
         caps[FEATURESET_e1d] = cpuid_edx(0x80000001U);
-
-        /*
-         * This check purposefully doesn't use cpu_has_nx because
-         * cpu_has_nx bypasses the boot_cpu_data read if Xen was compiled
-         * with CONFIG_REQUIRE_NX
-         */
-        if ( IS_ENABLED(CONFIG_REQUIRE_NX) &&
-             !boot_cpu_has(X86_FEATURE_NX) )
-            blexit(L"This build of Xen requires NX support");
-
-        if ( cpu_has_nx )
-            trampoline_efer |= EFER_NXE;
     }
 }
 
-- 
2.51.0



--
Julian Vetter | Vates Hypervisor & Kernel Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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Date: Thu, 27 Nov 2025 16:55:17 +0200
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Subject: Re: [4.21] REGRESSION: [PATCH] xen/credit2: factor in previous active
 unit's credit in csched2_runtime()
To: Koichiro Den , xen-devel@lists.xenproject.org
Cc: dfaggioli@suse.com, jgross@suse.com, gwd@xenproject.org,
 Jan Beulich , Andrew Cooper ,
 Michal Orzel , Ayan Kumar Halder ,
 Julien Grall 
References: <20250621141411.890250-1-den@valinux.co.jp>
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From: Grygorii S 
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Hi All,

On 21.06.25 17:14, Koichiro Den wrote:
> When a running unit is about to be scheduled out due to a competing unit
> with the highest remaining credit, the residual credit of the previous
> unit is currently ignored in csched2_runtime() because it hasn't yet
> been reinserted into the runqueue.
> 
> As a result, two equally weighted, busy units can often each be granted
> almost the maximum possible runtime (i.e. consuming CSCHED2_CREDIT_INIT
> in one shot) when only those two are active. In broad strokes two units
> switch back and forth every 10ms (CSCHED2_MAX_TIMER). In contrast, when
> more than two busy units are competing, such coarse runtime allocations
> are rarely seen, since at least one active unit remains in the runqueue.
> 
> To ensure consistent behavior, have csched2_runtime() take into account
> the previous unit's latest credit when it still can/wants to run.
> 
> Signed-off-by: Koichiro Den 
> Reviewed-by: Juergen Gross 
> ---
>   xen/common/sched/credit2.c | 28 +++++++++++++++++++++-------
>   1 file changed, 21 insertions(+), 7 deletions(-)
> 

We observe regression on ARM64 with this patch.
commit ae648e9f8013 ("xen/credit2: factor in previous active unit's credit in csched2_runtime()")

general observation:
  This commit causes Linux guest boot time increase  >5 times for some of our the credit2
  specific tests.
  Reverting it makes issue gone.

  - normal log
    (XEN) DOM1: [    6.496166] io scheduler bfq registered
    ...
    (XEN) DOM1: [    9.845108] Freeing unused kernel memory: 9216K
    (XEN) DOM1: [    9.874792] Run /init as init process
    (XEN) sched_smt_power_savings: disabled
    (XEN) NOW=16800131328

  - failed log
    (XEN) DOM1: [   37.281776] io scheduler bfq registered
    (XEN) DOM1: [   61.856512] EINJ: ACPI disabled.
    test: timed out

Run Details:
  Platform: ARM64 (Device Tree)
  Execution platform: qemu 6.0 (2 pCPU, 2G)
  Boot: dom0less, 1 domain (2 vCPU)
  Command line: "console=dtuart guest_loglvl=debug conswitch=ax"

  Dom0less cfg:
     chosen {
         xen,xen-bootargs = "console=dtuart guest_loglvl=debug conswitch=ax";
         #size-cells = <0x00000002>;
         #address-cells = <0x00000002>;
         stdout-path = "/pl011@9000000";
         kaslr-seed = <0x5a7b5649 0x9122e194>;
         cpupool_0 {
             cpupool-sched = "credit2";
             cpupool-cpus = <0x00008001>;
             compatible = "xen,cpupool";
             phandle = <0xfffffffe>;
         };
         domU0 {
             domain-cpupool = <0xfffffffe>;
             vpl011;
             cpus = <0x00000002>;
             memory = <0x00000000 0x00040000>;
             #size-cells = <0x00000002>;
             #address-cells = <0x00000002>;
             compatible = "xen,domain";
             module@42E00000 {
                 reg = <0x00000000 0x42e00000 0x00000000 0x000f1160>;
                 compatible = "multiboot,ramdisk", "multiboot,module";
             };
             module@40400000 {
                 bootargs = "console=ttyAMA0";
                 reg = <0x00000000 0x40400000 0x00000000 0x02920000>;
                 compatible = "multiboot,kernel", "multiboot,module";
             };
         };
     };

Investigation:
  It was narrowed down to a specific configuration with cpupool assigned to the domain (100% reproducible):
  Host has 2 pCPU
  Domain has 2 vCPU
  cpupool_0 has 1 pCPU (cpu@1 credit2)
  domain <- cpupool_0

  if Domain is assigned 1 vCPU - no issues.
  if cpupool_0 is assigned 2 pCPU -  no issues (seems slower a bit, but it is on a error  margin level)

I'd be appreciated for any help with this (or revert :().

-- 
Best regards,
-grygorii


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Subject: Re: [PATCH] libxl/json: don't expose internal functions
To: Anthony PERARD 
Cc: "xen-devel@lists.xenproject.org" ,
 Anthony PERARD , Juergen Gross 
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On 27.11.2025 15:27, Anthony PERARD wrote:
> On Tue, Nov 25, 2025 at 10:11:21AM +0100, Jan Beulich wrote:
>> Ideally internal function declarations wouldn't live in a non-private
>> header. If already they need to, they should be hidden as much as
>> possible. That is (a) their declarations shouldn't be exposed and (b) the
>> symbols shouldn't appear in the shared library's dynamic symbol table.
>> Gate the declarations upon _hidden actually being defined (rather than
>> providing an empty fallback), and apply _hidden also to the libyail
>> variants.
> 
> The YAJL functions needs to stay in the API, they've been exposed on
> purpose in this header... The only user of those I know is `xl`. They
> are limited since your application also needs to use libyajl. I think
> I've butchered this header enough to make it complicated to use for
> applications that are not `xl`.

But xl doesn't use any of them, ...

> libxl_json.h is only part of the header, there's a second part that is
> automatically generated, _libxl_types_json.h.

... it only uses something from that generated header (which isn't being
altered here).

Jan


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On 27/11/2025 2:31 pm, Julian Vetter wrote:
> Currently Intel CPUs in EFI mode with the "Execute Disable Bit" disabled
> and the 'CONFIG_REQUIRE_NX=y' fail to boot, because this check is
> performed before trampoline_setup is called, which determines if NX is
> supported or if it's hidden by 'MSR_IA32_MISC_ENABLE[34] = 1' (if so,
> re-enables NX).
>
> Signed-off-by: Julian Vetter 

Lovely...  This isn't the only bug; there's another one from the Vates
forums about AMD CPUs which I haven't gotten around to fixing yet.

Do you have any more information about which system looks like this?

trampoline_setup isn't executed on all EFI boots.  I had a different fix
in mind, but it's a little more complicated.

If I do the key prep patch, would you mind trying to tackle the AMD side
too?

~Andrew


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Le 27/11/2025 =C3=A0 15:33, Julian Vetter a =C3=A9crit=C2=A0:
> Currently Intel CPUs in EFI mode with the "Execute Disable Bit" disabled
> and the 'CONFIG_REQUIRE_NX=3Dy' fail to boot, because this check is
> performed before trampoline_setup is called, which determines if NX is
> supported or if it's hidden by 'MSR_IA32_MISC_ENABLE[34] =3D 1' (if so,
> re-enables NX).
> 
> Signed-off-by: Julian Vetter 
> ---
>   xen/arch/x86/efi/efi-boot.h | 12 ------------
>   1 file changed, 12 deletions(-)
> 
> diff --git a/xen/arch/x86/efi/efi-boot.h b/xen/arch/x86/efi/efi-boot.h
> index 0194720003..8dfd549f12 100644
> --- a/xen/arch/x86/efi/efi-boot.h
> +++ b/xen/arch/x86/efi/efi-boot.h
> @@ -748,18 +748,6 @@ static void __init efi_arch_cpu(void)
>       if ( (eax >> 16) =3D=3D 0x8000 && eax > 0x80000000U )
>       {
>           caps[FEATURESET_e1d] =3D cpuid_edx(0x80000001U);
> -
> -        /*
> -         * This check purposefully doesn't use cpu_has_nx because
> -         * cpu_has_nx bypasses the boot_cpu_data read if Xen was compile=
d
> -         * with CONFIG_REQUIRE_NX
> -         */
> -        if ( IS_ENABLED(CONFIG_REQUIRE_NX) &&
> -             !boot_cpu_has(X86_FEATURE_NX) )
> -            blexit(L"This build of Xen requires NX support");
> -
> -        if ( cpu_has_nx )
> -            trampoline_efer |=3D EFER_NXE;

I don't think we want to skip setting EFER_NXE. As it would mean not 
using NX at all (unless I missed something).

If cpu_policy doesn't have nx, it is likely going to cause issues e.g in 
VMs which will not see NX and potentially refuse to boot. I don't really 
know in which order things are initialized, but it probably wants to be 
considered.

Perhaps, we want to do something like detecting the 
MSR_IA32_MISC_ENABLE[34] then adjusting the cpu_policy appropriately 
after patching it ?

>       }
>   }
>   



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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From: Bertrand Marquis 
To: xen-devel@lists.xenproject.org
Cc: jens.wiklander@linaro.org,
	Volodymyr Babchuk ,
	Stefano Stabellini ,
	Julien Grall ,
	Michal Orzel 
Subject: [PATCH 00/10] xen/arm: ffa: FF-A v1.2 support
Date: Thu, 27 Nov 2025 16:51:31 +0100
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This series updates Xen’s FF-A mediator on Arm to implement the FF-A
v1.2 interface while keeping existing v1.0/v1.1 guests working.

Patches 1–5 rework the low-level plumbing:

  1) add the FF-A v1.2 function IDs and probe the new ABIs
  2) track per-VM FFA_VERSION state and enforce negotiation
  3) harden RX/TX mapping and validation
  4) rework SPMC RX/TX buffer management so access is serialized and
     RX buffers are always released back to the SPMC
  5) switch the mediator to spec-compliant signed 32-bit status codes

Patches 6–9 update the data structures and direct-call paths:

  6) add ffa_uuid helpers and rework partition-info handling
  7) refactor direct requests via a common RUN/direct completion helper
  8) add the v1.1/v1.2 SEND2 header layout
  9) add MSG_SEND_DIRECT_REQ2/RESP2 support and marshal the extended
     register set for v1.2 guests

Patch 10 tightens the dispatcher and advertises FF-A v1.2 only to guests
that negotiated v1.2:

  - reject SMCCC64 calls from AArch32 guests
  - expose the new FIDs and RX/TX capacity fields
  - bump Xen's FF-A version to 1.2 once the implementation is complete

v1.0/v1.1 guests continue to use the v1.1 ABI without behaviour changes,
while v1.2 guests can negotiate the wider ABI and use RUN, SEND2, and
DIRECT_REQ2/RESP2 with the extended register set.

This serie was validated through gitlab-ci here:
https://gitlab.com/xen-project/people/bmarquis/xen-ffa-research/-/tree/ffa-v1.2/v0
Build pipeline for the serie:
https://gitlab.com/xen-project/people/bmarquis/xen-ffa-research/-/pipelines/2183322953

Bertrand Marquis (10):
  xen/arm: ffa: add FF-A v1.2 function IDs
  xen/arm: ffa: per-VM FFA_VERSION negotiation state
  xen/arm: ffa: harden RX/TX mapping
  xen/arm: ffa: rework SPMC RX/TX buffer management
  xen/arm: ffa: use signed 32-bit status codes
  xen/arm: ffa: add UUID helpers for partition info
  xen/arm: ffa: refactor direct requests via RUN helper
  xen/arm: ffa: add v1.2 SEND2 header layout
  xen/arm: ffa: add MSG_SEND_DIRECT_REQ2 support
  xen/arm: ffa: advertise FF-A v1.2

 xen/arch/arm/include/asm/tee/ffa.h |   2 +-
 xen/arch/arm/tee/ffa.c             | 205 +++++++++++++++++-------
 xen/arch/arm/tee/ffa_msg.c         | 203 ++++++++++++++++++-----
 xen/arch/arm/tee/ffa_notif.c       |  14 +-
 xen/arch/arm/tee/ffa_partinfo.c    | 248 ++++++++++++++++++-----------
 xen/arch/arm/tee/ffa_private.h     | 133 ++++++++++------
 xen/arch/arm/tee/ffa_rxtx.c        | 160 +++++++++++++++----
 xen/arch/arm/tee/ffa_shm.c         |  30 ++--
 8 files changed, 703 insertions(+), 292 deletions(-)

-- 
2.51.2



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	Volodymyr Babchuk ,
	Stefano Stabellini ,
	Julien Grall ,
	Michal Orzel 
Subject: [PATCH 01/10] xen/arm: ffa: add FF-A v1.2 function IDs
Date: Thu, 27 Nov 2025 16:51:32 +0100
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Bring the FF-A headers up to the v1.2 baseline and fix the function-number
range used for ABI discovery:

- update FFA_FNUM_MAX_VALUE so the FF-A function-number window covers the
  full v1.2 range, and derive the ABI bitmap bounds from
  FFA_FNUM_MIN_VALUE/FFA_FNUM_MAX_VALUE instead of hard-coding
  FFA_ERROR/FFA_MSG_SEND2
- define the new v1.2 function IDs; CONSOLE_LOG and
  PARTITION_INFO_GET_REGS are added for ABI discovery even though they are
  not implemented yet
- extend the firmware ABI table to probe RUN and
  MSG_SEND_DIRECT_REQ2/RESP2
- while there, fix an off-by-one in ffa_fw_supports_fid(): the computed bit
  index must be strictly smaller than FFA_ABI_BITMAP_SIZE, so use >= in the
  bounds check

Keep FFA_MY_VERSION at 1.1 for now; we only advertise v1.2 once the
implementation is fully compliant.

Signed-off-by: Bertrand Marquis 
---
 xen/arch/arm/include/asm/tee/ffa.h |  2 +-
 xen/arch/arm/tee/ffa.c             |  4 ++++
 xen/arch/arm/tee/ffa_private.h     | 18 +++++++++++-------
 3 files changed, 16 insertions(+), 8 deletions(-)

diff --git a/xen/arch/arm/include/asm/tee/ffa.h b/xen/arch/arm/include/asm/tee/ffa.h
index 24cd4d99c8f9..c587f76e63ca 100644
--- a/xen/arch/arm/include/asm/tee/ffa.h
+++ b/xen/arch/arm/include/asm/tee/ffa.h
@@ -16,7 +16,7 @@
 #include 
 
 #define FFA_FNUM_MIN_VALUE              _AC(0x60,U)
-#define FFA_FNUM_MAX_VALUE              _AC(0x86,U)
+#define FFA_FNUM_MAX_VALUE              _AC(0x8F,U)
 
 static inline bool is_ffa_fid(uint32_t fid)
 {
diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c
index 1d0239cf6950..2b4e24750d52 100644
--- a/xen/arch/arm/tee/ffa.c
+++ b/xen/arch/arm/tee/ffa.c
@@ -11,6 +11,8 @@
  *               https://developer.arm.com/documentation/den0077/a
  * FF-A-1.1-REL0: FF-A specification version 1.1 available at
  *                https://developer.arm.com/documentation/den0077/e
+ * FF-A-1.2-REL0: FF-A specification version 1.2 available at
+ *                https://developer.arm.com/documentation/den0077/j
  * TEEC-1.0C: TEE Client API Specification version 1.0c available at
  *            https://globalplatform.org/specs-library/tee-client-api-specification/
  *
@@ -102,6 +104,8 @@ static const struct ffa_fw_abi ffa_fw_abi_needed[] = {
     FW_ABI(FFA_MSG_SEND_DIRECT_REQ_32),
     FW_ABI(FFA_MSG_SEND_DIRECT_REQ_64),
     FW_ABI(FFA_MSG_SEND2),
+    FW_ABI(FFA_MSG_SEND_DIRECT_REQ2),
+    FW_ABI(FFA_RUN),
 };
 
 /*
diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_private.h
index 6dbdb200d840..d7e6b6f5ef45 100644
--- a/xen/arch/arm/tee/ffa_private.h
+++ b/xen/arch/arm/tee/ffa_private.h
@@ -15,6 +15,7 @@
 #include 
 #include 
 #include 
+#include 
 
 /* Error codes */
 #define FFA_RET_OK                      0
@@ -42,6 +43,7 @@
 
 #define FFA_VERSION_1_0         MAKE_FFA_VERSION(1, 0)
 #define FFA_VERSION_1_1         MAKE_FFA_VERSION(1, 1)
+#define FFA_VERSION_1_2         MAKE_FFA_VERSION(1, 2)
 /* The minimal FF-A version of the SPMC that can be supported */
 #define FFA_MIN_SPMC_VERSION    FFA_VERSION_1_1
 
@@ -270,6 +272,10 @@
 #define FFA_RX_ACQUIRE                  0x84000084U
 #define FFA_SPM_ID_GET                  0x84000085U
 #define FFA_MSG_SEND2                   0x84000086U
+#define FFA_CONSOLE_LOG                 0x8400008AU
+#define FFA_PARTITION_INFO_GET_REGS     0x8400008BU
+#define FFA_MSG_SEND_DIRECT_REQ2        0xC400008DU
+#define FFA_MSG_SEND_DIRECT_RESP2       0xC400008EU
 
 /**
  * Encoding of features supported or not by the fw in a bitmap:
@@ -280,11 +286,9 @@
 #define FFA_ABI_ID(id)        ((id) & ARM_SMCCC_FUNC_MASK)
 #define FFA_ABI_CONV(id)      (((id) >> ARM_SMCCC_CONV_SHIFT) & BIT(0,U))
 
-#define FFA_ABI_MIN           FFA_ABI_ID(FFA_ERROR)
-#define FFA_ABI_MAX           FFA_ABI_ID(FFA_MSG_SEND2)
-
-#define FFA_ABI_BITMAP_SIZE   (2 * (FFA_ABI_MAX - FFA_ABI_MIN + 1))
-#define FFA_ABI_BITNUM(id)    ((FFA_ABI_ID(id) - FFA_ABI_MIN) << 1 | \
+#define FFA_ABI_BITMAP_SIZE   (2 * (FFA_FNUM_MAX_VALUE - FFA_FNUM_MIN_VALUE \
+                               + 1))
+#define FFA_ABI_BITNUM(id)    ((FFA_ABI_ID(id) - FFA_FNUM_MIN_VALUE) << 1 | \
                                FFA_ABI_CONV(id))
 
 /* Constituent memory region descriptor */
@@ -549,9 +553,9 @@ static inline int32_t ffa_hyp_rx_release(void)
 
 static inline bool ffa_fw_supports_fid(uint32_t fid)
 {
-    BUILD_BUG_ON(FFA_ABI_MIN > FFA_ABI_MAX);
+    BUILD_BUG_ON(FFA_FNUM_MIN_VALUE > FFA_FNUM_MAX_VALUE);
 
-    if ( FFA_ABI_BITNUM(fid) > FFA_ABI_BITMAP_SIZE)
+    if ( FFA_ABI_BITNUM(fid) >= FFA_ABI_BITMAP_SIZE)
         return false;
     return test_bit(FFA_ABI_BITNUM(fid), ffa_fw_abi_supported);
 }
-- 
2.51.2



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From: Bertrand Marquis 
To: xen-devel@lists.xenproject.org
Cc: jens.wiklander@linaro.org,
	Volodymyr Babchuk ,
	Stefano Stabellini ,
	Julien Grall ,
	Michal Orzel 
Subject: [PATCH 02/10] xen/arm: ffa: per-VM FFA_VERSION negotiation state
Date: Thu, 27 Nov 2025 16:51:33 +0100
Message-ID: <5e66b2991340f010befcaa3a57d0f35ad18d4149.1764254975.git.bertrand.marquis@arm.com>
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Track FF-A version negotiation per VM and enforce that no FF-A ABI
(other than FFA_VERSION) is processed before a guest has selected a
version.

Each ffa_ctx gains a dedicated guest_vers_lock, a negotiated version
(guest_vers) and a guest_vers_negotiated flag. guest_vers records the
version requested by the guest so the mediator can provide data
structures compatible with older minor versions. The value returned to
the guest by FFA_VERSION is always FFA_MY_VERSION, the implementation
version, as required by FF-A.

FFA_VERSION may be issued multiple times. Negotiation becomes final
only when a non-FFA_VERSION ABI is invoked, in accordance with the
FF-A requirement that the version cannot change once any other ABI has
been used. Before this point, non-FFA_VERSION ABIs are rejected if no
valid version has been provided.

Once negotiation completes, the context is added to the global FF-A
VM list (when VM-to-VM is enabled) and the version may not be modified
for the lifetime of the VM. All VM-to-VM paths and teardown logic are
updated to use the guest_vers_negotiated flag.

This prevents partially initialised contexts from using the mediator
and complies with the FF-A 1.2 FFA_VERSION semantics.

Signed-off-by: Bertrand Marquis 
---
 xen/arch/arm/tee/ffa.c         | 115 +++++++++++++++++++++++++--------
 xen/arch/arm/tee/ffa_msg.c     |   2 +-
 xen/arch/arm/tee/ffa_private.h |  21 ++++--
 3 files changed, 104 insertions(+), 34 deletions(-)

diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c
index 2b4e24750d52..3309ca875ec4 100644
--- a/xen/arch/arm/tee/ffa.c
+++ b/xen/arch/arm/tee/ffa.c
@@ -158,40 +158,89 @@ static bool ffa_abi_supported(uint32_t id)
     return !ffa_simple_call(FFA_FEATURES, id, 0, 0, 0);
 }
 
-static void handle_version(struct cpu_user_regs *regs)
+static bool ffa_negotiate_version(struct cpu_user_regs *regs)
 {
     struct domain *d = current->domain;
     struct ffa_ctx *ctx = d->arch.tee;
-    uint32_t vers = get_user_reg(regs, 1);
-    uint32_t old_vers;
+    uint32_t fid = get_user_reg(regs, 0);
+    uint32_t in_vers = get_user_reg(regs, 1);
+    uint32_t out_vers = FFA_MY_VERSION;
 
-    /*
-     * Guest will use the version it requested if it is our major and minor
-     * lower or equals to ours. If the minor is greater, our version will be
-     * used.
-     * In any case return our version to the caller.
-     */
-    if ( FFA_VERSION_MAJOR(vers) == FFA_MY_VERSION_MAJOR )
-    {
-        spin_lock(&ctx->lock);
-        old_vers = ctx->guest_vers;
+    spin_lock(&ctx->guest_vers_lock);
 
-        if ( FFA_VERSION_MINOR(vers) > FFA_MY_VERSION_MINOR )
-            ctx->guest_vers = FFA_MY_VERSION;
-        else
-            ctx->guest_vers = vers;
-        spin_unlock(&ctx->lock);
+    /* Handle FFA_VERSION races from different vCPUs. */
+    if ( ctx->guest_vers_negotiated )
+        goto out_continue;
 
-        if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) && !old_vers )
+    if ( fid != FFA_VERSION )
+    {
+        if ( !ctx->guest_vers )
         {
-            /* One more VM with FF-A support available */
-            inc_ffa_vm_count();
-            write_lock(&ffa_ctx_list_rwlock);
-            list_add_tail(&ctx->ctx_list, &ffa_ctx_head);
-            write_unlock(&ffa_ctx_list_rwlock);
+            out_vers = 0;
+            goto out_handled;
         }
+
+        /*
+         * A successful FFA_VERSION call does not freeze negotiation. Guests
+         * are allowed to issue multiple FFA_VERSION attempts (e.g. probing
+         * several minor versions). Negotiation becomes final only when a
+         * non-VERSION ABI is invoked, as required by the FF-A specification.
+         */
+        if ( !ctx->guest_vers_negotiated )
+        {
+            ctx->guest_vers_negotiated = true;
+
+            if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) )
+            {
+                /* One more VM with FF-A support available */
+                inc_ffa_vm_count();
+                write_lock(&ffa_ctx_list_rwlock);
+                list_add_tail(&ctx->ctx_list, &ffa_ctx_head);
+                write_unlock(&ffa_ctx_list_rwlock);
+            }
+        }
+
+        goto out_continue;
+    }
+
+    /*
+     * guest_vers stores the version selected by the guest (lower minor may
+     * require reduced data structures). However, the value returned to the
+     * guest via FFA_VERSION is always FFA_MY_VERSION, the implementation
+     * version, as required by FF-A. The two values intentionally differ.
+     */
+
+    /*
+     * Return our highest implementation version on request different than our
+     * major and mark negotiated version as our implementation version.
+     */
+    if ( FFA_VERSION_MAJOR(in_vers) != FFA_MY_VERSION_MAJOR )
+    {
+        ctx->guest_vers = FFA_MY_VERSION;
+        goto out_handled;
     }
-    ffa_set_regs(regs, FFA_MY_VERSION, 0, 0, 0, 0, 0, 0, 0);
+
+    /*
+     * Use our minor version if a greater minor was requested or the requested
+     * minor if it is lower than ours was requested.
+     */
+    if ( FFA_VERSION_MINOR(in_vers) > FFA_MY_VERSION_MINOR )
+        ctx->guest_vers = FFA_MY_VERSION;
+    else
+        ctx->guest_vers = in_vers;
+
+out_handled:
+    spin_unlock(&ctx->guest_vers_lock);
+    if ( out_vers )
+        ffa_set_regs(regs, out_vers, 0, 0, 0, 0, 0, 0, 0);
+    else
+        ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED);
+    return true;
+
+out_continue:
+    spin_unlock(&ctx->guest_vers_lock);
+
+    return false;
 }
 
 static void handle_features(struct cpu_user_regs *regs)
@@ -274,10 +323,17 @@ static bool ffa_handle_call(struct cpu_user_regs *regs)
     if ( !ctx )
         return false;
 
+    /* A version must be negotiated first */
+    if ( !ctx->guest_vers_negotiated )
+    {
+        if ( ffa_negotiate_version(regs) )
+            return true;
+    }
+
     switch ( fid )
     {
     case FFA_VERSION:
-        handle_version(regs);
+        ffa_set_regs(regs, FFA_MY_VERSION, 0, 0, 0, 0, 0, 0, 0);
         return true;
     case FFA_ID_GET:
         ffa_set_regs_success(regs, ffa_get_vm_id(d), 0);
@@ -371,6 +427,11 @@ static int ffa_domain_init(struct domain *d)
     d->arch.tee = ctx;
     ctx->teardown_d = d;
     INIT_LIST_HEAD(&ctx->shm_list);
+    spin_lock_init(&ctx->lock);
+    spin_lock_init(&ctx->guest_vers_lock);
+    ctx->guest_vers = 0;
+    ctx->guest_vers_negotiated = false;
+    INIT_LIST_HEAD(&ctx->ctx_list);
 
     ctx->ffa_id = ffa_get_vm_id(d);
     ctx->num_vcpus = d->max_vcpus;
@@ -452,7 +513,7 @@ static int ffa_domain_teardown(struct domain *d)
     if ( !ctx )
         return 0;
 
-    if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) && ctx->guest_vers )
+    if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) && ctx->guest_vers_negotiated )
     {
         dec_ffa_vm_count();
         write_lock(&ffa_ctx_list_rwlock);
diff --git a/xen/arch/arm/tee/ffa_msg.c b/xen/arch/arm/tee/ffa_msg.c
index c20c5bec0f76..dec429cbf160 100644
--- a/xen/arch/arm/tee/ffa_msg.c
+++ b/xen/arch/arm/tee/ffa_msg.c
@@ -113,7 +113,7 @@ static int32_t ffa_msg_send2_vm(uint16_t dst_id, const void *src_buf,
     }
 
     dst_ctx = dst_d->arch.tee;
-    if ( !dst_ctx->guest_vers )
+    if ( !dst_ctx->guest_vers_negotiated )
     {
         ret = FFA_RET_INVALID_PARAMETERS;
         goto out_unlock;
diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_private.h
index d7e6b6f5ef45..88b85c7c453a 100644
--- a/xen/arch/arm/tee/ffa_private.h
+++ b/xen/arch/arm/tee/ffa_private.h
@@ -354,12 +354,6 @@ struct ffa_ctx {
      * Global data accessed with lock locked.
      */
     spinlock_t lock;
-    /*
-     * FF-A version negotiated by the guest, only modifications to
-     * this field are done with the lock held as this is expected to
-     * be done once at init by a guest.
-     */
-    uint32_t guest_vers;
     /* Number of 4kB pages in each of rx/rx_pg and tx/tx_pg */
     unsigned int page_count;
     /* Number of allocated shared memory object */
@@ -367,6 +361,21 @@ struct ffa_ctx {
     /* Used shared memory objects, struct ffa_shm_mem */
     struct list_head shm_list;
 
+    /*
+     * FF-A version handling
+     * guest_vers and guest_vers_negotiated are only written with
+     * guest_vers_lock held. Reads do not take the lock, but ordering is
+     * guaranteed because the writer updates guest_vers first and then
+     * guest_vers_negotiated while holding the lock, ensuring any reader
+     * that observes guest_vers_negotiated == true also sees the final
+     * guest_vers value.
+     * The ffa_ctx is added to the ctx_list only when a version
+     * has been negotiated and locked.
+     */
+    spinlock_t guest_vers_lock;
+    uint32_t guest_vers;
+    bool guest_vers_negotiated;
+
     /*
      * Rx buffer, accessed with rx_lock locked.
      * rx_is_free is used to serialize access.
-- 
2.51.2



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From: Bertrand Marquis 
To: xen-devel@lists.xenproject.org
Cc: jens.wiklander@linaro.org,
	Volodymyr Babchuk ,
	Stefano Stabellini ,
	Julien Grall ,
	Michal Orzel 
Subject: [PATCH 03/10] xen/arm: ffa: harden RX/TX mapping
Date: Thu, 27 Nov 2025 16:51:34 +0100
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Harden the RX/TX mapping paths and keep signed FF-A return codes
end-to-end.

Reject zero-length mappings and insist on page-aligned RX/TX buffer
addresses before touching the P2M. The unmap plumbing is switched to
use the same signed helpers so dispatcher error handling is consistent
across map and unmap operations.

This avoids partially mapped or silently truncated buffers and makes the
mediator behaviour match the FF-A error model more closely.

While there also introduce a domain_rxtx_init to properly initialize the
rxtx buffers spinlocks.

Signed-off-by: Bertrand Marquis 
---
 xen/arch/arm/tee/ffa.c         |  4 ++++
 xen/arch/arm/tee/ffa_private.h |  5 +++--
 xen/arch/arm/tee/ffa_rxtx.c    | 28 +++++++++++++++++++++-------
 3 files changed, 28 insertions(+), 9 deletions(-)

diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c
index 3309ca875ec4..47f426e85864 100644
--- a/xen/arch/arm/tee/ffa.c
+++ b/xen/arch/arm/tee/ffa.c
@@ -446,6 +446,10 @@ static int ffa_domain_init(struct domain *d)
     if ( ret )
         return ret;
 
+    ret = ffa_rxtx_domain_init(d);
+    if ( ret )
+        return ret;
+
     return ffa_notif_domain_init(d);
 }
 
diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_private.h
index 88b85c7c453a..4272afd37343 100644
--- a/xen/arch/arm/tee/ffa_private.h
+++ b/xen/arch/arm/tee/ffa_private.h
@@ -427,10 +427,11 @@ void ffa_handle_partition_info_get(struct cpu_user_regs *regs);
 
 bool ffa_rxtx_init(void);
 void ffa_rxtx_destroy(void);
+int32_t ffa_rxtx_domain_init(struct domain *d);
 void ffa_rxtx_domain_destroy(struct domain *d);
-uint32_t ffa_handle_rxtx_map(uint32_t fid, register_t tx_addr,
+int32_t ffa_handle_rxtx_map(uint32_t fid, register_t tx_addr,
 			     register_t rx_addr, uint32_t page_count);
-uint32_t ffa_handle_rxtx_unmap(void);
+int32_t ffa_handle_rxtx_unmap(void);
 int32_t ffa_rx_acquire(struct domain *d);
 int32_t ffa_rx_release(struct domain *d);
 
diff --git a/xen/arch/arm/tee/ffa_rxtx.c b/xen/arch/arm/tee/ffa_rxtx.c
index a40e5b32e3a5..cd467d1dba68 100644
--- a/xen/arch/arm/tee/ffa_rxtx.c
+++ b/xen/arch/arm/tee/ffa_rxtx.c
@@ -41,10 +41,10 @@ static int32_t ffa_rxtx_unmap(uint16_t id)
     return ffa_simple_call(FFA_RXTX_UNMAP, ((uint64_t)id) << 16, 0, 0, 0);
 }
 
-uint32_t ffa_handle_rxtx_map(uint32_t fid, register_t tx_addr,
+int32_t ffa_handle_rxtx_map(uint32_t fid, register_t tx_addr,
 			     register_t rx_addr, uint32_t page_count)
 {
-    uint32_t ret = FFA_RET_INVALID_PARAMETERS;
+    int32_t ret = FFA_RET_INVALID_PARAMETERS;
     struct domain *d = current->domain;
     struct ffa_ctx *ctx = d->arch.tee;
     struct page_info *tx_pg;
@@ -66,13 +66,17 @@ uint32_t ffa_handle_rxtx_map(uint32_t fid, register_t tx_addr,
         rx_addr &= UINT32_MAX;
     }
 
-    if ( page_count > FFA_MAX_RXTX_PAGE_COUNT )
+    if ( page_count > FFA_MAX_RXTX_PAGE_COUNT || !page_count )
     {
         printk(XENLOG_ERR "ffa: RXTX_MAP: error: %u pages requested (limit %u)\n",
                page_count, FFA_MAX_RXTX_PAGE_COUNT);
         return FFA_RET_INVALID_PARAMETERS;
     }
 
+    if ( !IS_ALIGNED(tx_addr, FFA_PAGE_SIZE) ||
+         !IS_ALIGNED(rx_addr, FFA_PAGE_SIZE) )
+        return FFA_RET_INVALID_PARAMETERS;
+
     /* Already mapped */
     if ( ctx->rx )
         return FFA_RET_DENIED;
@@ -181,7 +185,7 @@ err_put_tx_pg:
     return ret;
 }
 
-static uint32_t  rxtx_unmap(struct domain *d)
+static int32_t rxtx_unmap(struct domain *d)
 {
     struct ffa_ctx *ctx = d->arch.tee;
 
@@ -190,7 +194,7 @@ static uint32_t  rxtx_unmap(struct domain *d)
 
     if ( ffa_fw_supports_fid(FFA_RX_ACQUIRE) )
     {
-        uint32_t ret;
+        int32_t ret;
 
         ret = ffa_rxtx_unmap(ffa_get_vm_id(d));
         if ( ret != FFA_RET_OK )
@@ -211,7 +215,7 @@ static uint32_t  rxtx_unmap(struct domain *d)
     return FFA_RET_OK;
 }
 
-uint32_t ffa_handle_rxtx_unmap(void)
+int32_t ffa_handle_rxtx_unmap(void)
 {
     return rxtx_unmap(current->domain);
 }
@@ -272,6 +276,16 @@ out:
     return ret;
 }
 
+int32_t ffa_rxtx_domain_init(struct domain *d)
+{
+    struct ffa_ctx *ctx = d->arch.tee;
+
+    spin_lock_init(&ctx->rx_lock);
+    spin_lock_init(&ctx->tx_lock);
+
+    return 0;
+}
+
 void ffa_rxtx_domain_destroy(struct domain *d)
 {
     rxtx_unmap(d);
@@ -298,7 +312,7 @@ void ffa_rxtx_destroy(void)
 
 bool ffa_rxtx_init(void)
 {
-    int e;
+    int32_t e;
 
     /* Firmware not there or not supporting */
     if ( !ffa_fw_supports_fid(FFA_RXTX_MAP_64) )
-- 
2.51.2



From xen-devel-bounces@lists.xenproject.org Thu Nov 27 15:52:58 2025
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From: Bertrand Marquis 
To: xen-devel@lists.xenproject.org
Cc: jens.wiklander@linaro.org,
	Volodymyr Babchuk ,
	Stefano Stabellini ,
	Julien Grall ,
	Michal Orzel 
Subject: [PATCH 04/10] xen/arm: ffa: rework SPMC RX/TX buffer management
Date: Thu, 27 Nov 2025 16:51:35 +0100
Message-ID: <72d6592157a9ec15d4b5de19751186e0ca1680ba.1764254975.git.bertrand.marquis@arm.com>
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Rework how Xen accesses the RX/TX buffers shared with the SPMC so that
ownership and locking are handled centrally.

Move the SPMC RX/TX buffer bases into ffa_rxtx.c as ffa_spmc_rx/ffa_spmc_tx,
protect them with dedicated ffa_spmc_{rx,tx}_lock spinlocks and expose
ffa_rxtx_spmc_{rx,tx}_{acquire,release}() helpers instead of the global
ffa_rx/ffa_tx pointers and ffa_{rx,tx}_buffer_lock.

The RX helpers now always issue FFA_RX_RELEASE when we are done
consuming data from the SPMC, so partition-info enumeration and shared
memory paths release the RX buffer on all exit paths. The RX/TX mapping
code is updated to use the descriptor offsets (rx_region_offs and
tx_region_offs) rather than hard-coded structure layout, and to use the
TX acquire/release helpers instead of touching the TX buffer directly.

Signed-off-by: Bertrand Marquis 
---
 xen/arch/arm/tee/ffa.c          |  22 +-----
 xen/arch/arm/tee/ffa_partinfo.c |  40 +++++-----
 xen/arch/arm/tee/ffa_private.h  |  18 ++---
 xen/arch/arm/tee/ffa_rxtx.c     | 132 +++++++++++++++++++++++++-------
 xen/arch/arm/tee/ffa_shm.c      |  26 ++++---
 5 files changed, 153 insertions(+), 85 deletions(-)

diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c
index 47f426e85864..4c1b9a4c3b48 100644
--- a/xen/arch/arm/tee/ffa.c
+++ b/xen/arch/arm/tee/ffa.c
@@ -48,8 +48,8 @@
  *     notification for secure partitions
  *   - doesn't support notifications for Xen itself
  *
- * There are some large locked sections with ffa_tx_buffer_lock and
- * ffa_rx_buffer_lock. Especially the ffa_tx_buffer_lock spinlock used
+ * There are some large locked sections with ffa_spmc_tx_lock and
+ * ffa_spmc_rx_lock. Especially the ffa_spmc_tx_lock spinlock used
  * around share_shm() is a very large locked section which can let one VM
  * affect another VM.
  */
@@ -108,20 +108,6 @@ static const struct ffa_fw_abi ffa_fw_abi_needed[] = {
     FW_ABI(FFA_RUN),
 };
 
-/*
- * Our rx/tx buffers shared with the SPMC. FFA_RXTX_PAGE_COUNT is the
- * number of pages used in each of these buffers.
- *
- * The RX buffer is protected from concurrent usage with ffa_rx_buffer_lock.
- * Note that the SPMC is also tracking the ownership of our RX buffer so
- * for calls which uses our RX buffer to deliver a result we must call
- * ffa_rx_release() to let the SPMC know that we're done with the buffer.
- */
-void *ffa_rx __read_mostly;
-void *ffa_tx __read_mostly;
-DEFINE_SPINLOCK(ffa_rx_buffer_lock);
-DEFINE_SPINLOCK(ffa_tx_buffer_lock);
-
 LIST_HEAD(ffa_ctx_head);
 /* RW Lock to protect addition/removal and reading in ffa_ctx_head */
 DEFINE_RWLOCK(ffa_ctx_list_rwlock);
@@ -612,7 +598,7 @@ static bool ffa_probe_fw(void)
                    ffa_fw_abi_needed[i].name);
     }
 
-    if ( !ffa_rxtx_init() )
+    if ( !ffa_rxtx_spmc_init() )
     {
         printk(XENLOG_ERR "ffa: Error during RXTX buffer init\n");
         goto err_no_fw;
@@ -626,7 +612,7 @@ static bool ffa_probe_fw(void)
     return true;
 
 err_rxtx_destroy:
-    ffa_rxtx_destroy();
+    ffa_rxtx_spmc_destroy();
 err_no_fw:
     ffa_fw_version = 0;
     bitmap_zero(ffa_fw_abi_supported, FFA_ABI_BITMAP_SIZE);
diff --git a/xen/arch/arm/tee/ffa_partinfo.c b/xen/arch/arm/tee/ffa_partinfo.c
index fa56b1587e3b..766b75dffb8c 100644
--- a/xen/arch/arm/tee/ffa_partinfo.c
+++ b/xen/arch/arm/tee/ffa_partinfo.c
@@ -77,28 +77,24 @@ static int32_t ffa_get_sp_partinfo(uint32_t *uuid, uint32_t *sp_count,
 {
     int32_t ret;
     uint32_t src_size, real_sp_count;
-    void *src_buf = ffa_rx;
+    void *src_buf;
     uint32_t count = 0;
 
-    /* Do we have a RX buffer with the SPMC */
-    if ( !ffa_rx )
-        return FFA_RET_DENIED;
-
     /* We need to use the RX buffer to receive the list */
-    spin_lock(&ffa_rx_buffer_lock);
+    src_buf = ffa_rxtx_spmc_rx_acquire();
+    if ( !src_buf )
+        return FFA_RET_DENIED;
 
     ret = ffa_partition_info_get(uuid, 0, &real_sp_count, &src_size);
     if ( ret )
         goto out;
 
-    /* We now own the RX buffer */
-
     /* Validate the src_size we got */
     if ( src_size < sizeof(struct ffa_partition_info_1_0) ||
          src_size >= FFA_PAGE_SIZE )
     {
         ret = FFA_RET_NOT_SUPPORTED;
-        goto out_release;
+        goto out;
     }
 
     /*
@@ -114,7 +110,7 @@ static int32_t ffa_get_sp_partinfo(uint32_t *uuid, uint32_t *sp_count,
     if ( real_sp_count > (FFA_RXTX_PAGE_COUNT * FFA_PAGE_SIZE) / src_size )
     {
         ret = FFA_RET_NOT_SUPPORTED;
-        goto out_release;
+        goto out;
     }
 
     for ( uint32_t sp_num = 0; sp_num < real_sp_count; sp_num++ )
@@ -127,7 +123,7 @@ static int32_t ffa_get_sp_partinfo(uint32_t *uuid, uint32_t *sp_count,
             if ( dst_buf > (end_buf - dst_size) )
             {
                 ret = FFA_RET_NO_MEMORY;
-                goto out_release;
+                goto out;
             }
 
             memcpy(dst_buf, src_buf, MIN(src_size, dst_size));
@@ -143,10 +139,8 @@ static int32_t ffa_get_sp_partinfo(uint32_t *uuid, uint32_t *sp_count,
 
     *sp_count = count;
 
-out_release:
-    ffa_hyp_rx_release();
 out:
-    spin_unlock(&ffa_rx_buffer_lock);
+    ffa_rxtx_spmc_rx_release();
     return ret;
 }
 
@@ -378,7 +372,7 @@ static void uninit_subscribers(void)
         XFREE(subscr_vm_destroyed);
 }
 
-static bool init_subscribers(uint16_t count, uint32_t fpi_size)
+static bool init_subscribers(void *buf, uint16_t count, uint32_t fpi_size)
 {
     uint16_t n;
     uint16_t c_pos;
@@ -395,7 +389,7 @@ static bool init_subscribers(uint16_t count, uint32_t fpi_size)
     subscr_vm_destroyed_count = 0;
     for ( n = 0; n < count; n++ )
     {
-        fpi = ffa_rx + n * fpi_size;
+        fpi = buf + n * fpi_size;
 
         /*
          * We need to have secure partitions using bit 15 set convention for
@@ -433,7 +427,7 @@ static bool init_subscribers(uint16_t count, uint32_t fpi_size)
 
     for ( c_pos = 0, d_pos = 0, n = 0; n < count; n++ )
     {
-        fpi = ffa_rx + n * fpi_size;
+        fpi = buf + n * fpi_size;
 
         if ( FFA_ID_IS_SECURE(fpi->id) )
         {
@@ -455,10 +449,14 @@ bool ffa_partinfo_init(void)
     uint32_t fpi_size;
     uint32_t count;
     int e;
+    void *spmc_rx;
 
     if ( !ffa_fw_supports_fid(FFA_PARTITION_INFO_GET) ||
-         !ffa_fw_supports_fid(FFA_MSG_SEND_DIRECT_REQ_32) ||
-         !ffa_rx || !ffa_tx )
+         !ffa_fw_supports_fid(FFA_MSG_SEND_DIRECT_REQ_32))
+        return false;
+
+    spmc_rx = ffa_rxtx_spmc_rx_acquire();
+    if (!spmc_rx)
         return false;
 
     e = ffa_partition_info_get(NULL, 0, &count, &fpi_size);
@@ -475,10 +473,10 @@ bool ffa_partinfo_init(void)
         goto out;
     }
 
-    ret = init_subscribers(count, fpi_size);
+    ret = init_subscribers(spmc_rx, count, fpi_size);
 
 out:
-    ffa_hyp_rx_release();
+    ffa_rxtx_spmc_rx_release();
     return ret;
 }
 
diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_private.h
index 4272afd37343..cd35c44b8986 100644
--- a/xen/arch/arm/tee/ffa_private.h
+++ b/xen/arch/arm/tee/ffa_private.h
@@ -404,10 +404,6 @@ struct ffa_ctx {
     unsigned long *vm_destroy_bitmap;
 };
 
-extern void *ffa_rx;
-extern void *ffa_tx;
-extern spinlock_t ffa_rx_buffer_lock;
-extern spinlock_t ffa_tx_buffer_lock;
 extern DECLARE_BITMAP(ffa_fw_abi_supported, FFA_ABI_BITMAP_SIZE);
 
 extern struct list_head ffa_ctx_head;
@@ -425,8 +421,13 @@ int ffa_partinfo_domain_init(struct domain *d);
 bool ffa_partinfo_domain_destroy(struct domain *d);
 void ffa_handle_partition_info_get(struct cpu_user_regs *regs);
 
-bool ffa_rxtx_init(void);
-void ffa_rxtx_destroy(void);
+bool ffa_rxtx_spmc_init(void);
+void ffa_rxtx_spmc_destroy(void);
+void *ffa_rxtx_spmc_rx_acquire(void);
+void ffa_rxtx_spmc_rx_release(void);
+void *ffa_rxtx_spmc_tx_acquire(void);
+void ffa_rxtx_spmc_tx_release(void);
+
 int32_t ffa_rxtx_domain_init(struct domain *d);
 void ffa_rxtx_domain_destroy(struct domain *d);
 int32_t ffa_handle_rxtx_map(uint32_t fid, register_t tx_addr,
@@ -556,11 +557,6 @@ static inline int32_t ffa_simple_call(uint32_t fid, register_t a1,
     return ffa_get_ret_code(&resp);
 }
 
-static inline int32_t ffa_hyp_rx_release(void)
-{
-    return ffa_simple_call(FFA_RX_RELEASE, 0, 0, 0, 0);
-}
-
 static inline bool ffa_fw_supports_fid(uint32_t fid)
 {
     BUILD_BUG_ON(FFA_FNUM_MIN_VALUE > FFA_FNUM_MAX_VALUE);
diff --git a/xen/arch/arm/tee/ffa_rxtx.c b/xen/arch/arm/tee/ffa_rxtx.c
index cd467d1dba68..07b01430d139 100644
--- a/xen/arch/arm/tee/ffa_rxtx.c
+++ b/xen/arch/arm/tee/ffa_rxtx.c
@@ -30,6 +30,20 @@ struct ffa_endpoint_rxtx_descriptor_1_1 {
     uint32_t tx_region_offs;
 };
 
+/*
+ * Our rx/tx buffers shared with the SPMC. FFA_RXTX_PAGE_COUNT is the
+ * number of pages used in each of these buffers.
+ * Each buffer has its own lock to protect from concurrent usage.
+ *
+ * Note that the SPMC is also tracking the ownership of our RX buffer so
+ * for calls which uses our RX buffer to deliver a result we must do an
+ * FFA_RX_RELEASE to let the SPMC know that we're done with the buffer.
+ */
+static void *ffa_spmc_rx __read_mostly;
+static void *ffa_spmc_tx __read_mostly;
+static DEFINE_SPINLOCK(ffa_spmc_rx_lock);
+static DEFINE_SPINLOCK(ffa_spmc_tx_lock);
+
 static int32_t ffa_rxtx_map(paddr_t tx_addr, paddr_t rx_addr,
                             uint32_t page_count)
 {
@@ -120,8 +134,9 @@ int32_t ffa_handle_rxtx_map(uint32_t fid, register_t tx_addr,
                      sizeof(struct ffa_address_range) * 2 >
                      FFA_MAX_RXTX_PAGE_COUNT * FFA_PAGE_SIZE);
 
-        spin_lock(&ffa_tx_buffer_lock);
-        rxtx_desc = ffa_tx;
+        rxtx_desc = ffa_rxtx_spmc_tx_acquire();
+        if ( !rxtx_desc )
+            goto err_unmap_rx;
 
         /*
          * We have only one page for each so we pack everything:
@@ -138,7 +153,7 @@ int32_t ffa_handle_rxtx_map(uint32_t fid, register_t tx_addr,
                                              address_range_array[1]);
 
         /* rx buffer */
-        mem_reg = ffa_tx + sizeof(*rxtx_desc);
+        mem_reg = (void *)rxtx_desc + rxtx_desc->rx_region_offs;
         mem_reg->total_page_count = 1;
         mem_reg->address_range_count = 1;
         mem_reg->reserved = 0;
@@ -148,7 +163,7 @@ int32_t ffa_handle_rxtx_map(uint32_t fid, register_t tx_addr,
         mem_reg->address_range_array[0].reserved = 0;
 
         /* tx buffer */
-        mem_reg = ffa_tx + rxtx_desc->tx_region_offs;
+        mem_reg = (void *)rxtx_desc + rxtx_desc->tx_region_offs;
         mem_reg->total_page_count = 1;
         mem_reg->address_range_count = 1;
         mem_reg->reserved = 0;
@@ -159,7 +174,7 @@ int32_t ffa_handle_rxtx_map(uint32_t fid, register_t tx_addr,
 
         ret = ffa_rxtx_map(0, 0, 0);
 
-        spin_unlock(&ffa_tx_buffer_lock);
+        ffa_rxtx_spmc_tx_release();
 
         if ( ret != FFA_RET_OK )
             goto err_unmap_rx;
@@ -291,49 +306,114 @@ void ffa_rxtx_domain_destroy(struct domain *d)
     rxtx_unmap(d);
 }
 
-void ffa_rxtx_destroy(void)
+void *ffa_rxtx_spmc_rx_acquire(void)
+{
+    ASSERT(!spin_is_locked(&ffa_spmc_rx_lock));
+
+    spin_lock(&ffa_spmc_rx_lock);
+
+    if ( ffa_spmc_rx )
+        return ffa_spmc_rx;
+
+    spin_unlock(&ffa_spmc_rx_lock);
+    return NULL;
+}
+
+void ffa_rxtx_spmc_rx_release(void)
+{
+    int32_t ret;
+
+    ASSERT(spin_is_locked(&ffa_spmc_rx_lock));
+
+    /* Inform the SPMC that we are done with our RX buffer */
+    ret = ffa_simple_call(FFA_RX_RELEASE, 0, 0, 0, 0);
+    if ( ret != FFA_RET_OK )
+        printk(XENLOG_DEBUG "Error releasing SPMC RX buffer: %d\n", ret);
+
+    spin_unlock(&ffa_spmc_rx_lock);
+}
+
+void *ffa_rxtx_spmc_tx_acquire(void)
 {
-    bool need_unmap = ffa_tx && ffa_rx;
+    ASSERT(!spin_is_locked(&ffa_spmc_tx_lock));
 
-    if ( ffa_tx )
+    spin_lock(&ffa_spmc_tx_lock);
+
+    if ( ffa_spmc_tx )
+        return ffa_spmc_tx;
+
+    spin_unlock(&ffa_spmc_tx_lock);
+    return NULL;
+}
+
+void ffa_rxtx_spmc_tx_release(void)
+{
+    ASSERT(spin_is_locked(&ffa_spmc_tx_lock));
+
+    spin_unlock(&ffa_spmc_tx_lock);
+}
+
+void ffa_rxtx_spmc_destroy(void)
+{
+    bool need_unmap;
+
+    spin_lock(&ffa_spmc_rx_lock);
+    spin_lock(&ffa_spmc_tx_lock);
+    need_unmap = ffa_spmc_tx && ffa_spmc_rx;
+
+    if ( ffa_spmc_tx )
     {
-        free_xenheap_pages(ffa_tx, 0);
-        ffa_tx = NULL;
+        free_xenheap_pages(ffa_spmc_tx, 0);
+        ffa_spmc_tx = NULL;
     }
-    if ( ffa_rx )
+    if ( ffa_spmc_rx )
     {
-        free_xenheap_pages(ffa_rx, 0);
-        ffa_rx = NULL;
+        free_xenheap_pages(ffa_spmc_rx, 0);
+        ffa_spmc_rx = NULL;
     }
 
     if ( need_unmap )
         ffa_rxtx_unmap(0);
+
+    spin_unlock(&ffa_spmc_tx_lock);
+    spin_unlock(&ffa_spmc_rx_lock);
 }
 
-bool ffa_rxtx_init(void)
+bool ffa_rxtx_spmc_init(void)
 {
     int32_t e;
+    bool ret = false;
 
     /* Firmware not there or not supporting */
     if ( !ffa_fw_supports_fid(FFA_RXTX_MAP_64) )
         return false;
 
-    ffa_rx = alloc_xenheap_pages(get_order_from_pages(FFA_RXTX_PAGE_COUNT), 0);
-    if ( !ffa_rx )
-        return false;
+    spin_lock(&ffa_spmc_rx_lock);
+    spin_lock(&ffa_spmc_tx_lock);
+
+    ffa_spmc_rx = alloc_xenheap_pages(
+                            get_order_from_pages(FFA_RXTX_PAGE_COUNT), 0);
+    if ( !ffa_spmc_rx )
+        goto exit;
 
-    ffa_tx = alloc_xenheap_pages(get_order_from_pages(FFA_RXTX_PAGE_COUNT), 0);
-    if ( !ffa_tx )
-        goto err;
+    ffa_spmc_tx = alloc_xenheap_pages(
+                            get_order_from_pages(FFA_RXTX_PAGE_COUNT), 0);
+    if ( !ffa_spmc_tx )
+        goto exit;
 
-    e = ffa_rxtx_map(__pa(ffa_tx), __pa(ffa_rx), FFA_RXTX_PAGE_COUNT);
+    e = ffa_rxtx_map(__pa(ffa_spmc_tx), __pa(ffa_spmc_rx),
+                     FFA_RXTX_PAGE_COUNT);
     if ( e )
-        goto err;
+        goto exit;
 
-    return true;
+    ret = true;
 
-err:
-    ffa_rxtx_destroy();
+exit:
+    spin_unlock(&ffa_spmc_tx_lock);
+    spin_unlock(&ffa_spmc_rx_lock);
 
-    return false;
+    if ( !ret )
+        ffa_rxtx_spmc_destroy();
+
+    return ret;
 }
diff --git a/xen/arch/arm/tee/ffa_shm.c b/xen/arch/arm/tee/ffa_shm.c
index d628c1b70609..b9022797c3bf 100644
--- a/xen/arch/arm/tee/ffa_shm.c
+++ b/xen/arch/arm/tee/ffa_shm.c
@@ -286,9 +286,8 @@ static void init_range(struct ffa_address_range *addr_range,
 }
 
 /*
- * This function uses the ffa_tx buffer to transmit the memory transaction
- * descriptor. The function depends ffa_tx_buffer_lock to be used to guard
- * the buffer from concurrent use.
+ * This function uses the ffa_spmc tx buffer to transmit the memory transaction
+ * descriptor.
  */
 static int share_shm(struct ffa_shm_mem *shm)
 {
@@ -298,17 +297,22 @@ static int share_shm(struct ffa_shm_mem *shm)
     struct ffa_address_range *addr_range;
     struct ffa_mem_region *region_descr;
     const unsigned int region_count = 1;
-    void *buf = ffa_tx;
     uint32_t frag_len;
     uint32_t tot_len;
     paddr_t last_pa;
     unsigned int n;
     paddr_t pa;
+    int32_t ret;
+    void *buf;
 
-    ASSERT(spin_is_locked(&ffa_tx_buffer_lock));
     ASSERT(shm->page_count);
 
+    buf = ffa_rxtx_spmc_tx_acquire();
+    if ( !buf )
+        return FFA_RET_NOT_SUPPORTED;
+
     descr = buf;
+
     memset(descr, 0, sizeof(*descr));
     descr->sender_id = shm->sender_id;
     descr->handle = shm->handle;
@@ -340,7 +344,10 @@ static int share_shm(struct ffa_shm_mem *shm)
     tot_len = ADDR_RANGE_OFFSET(descr->mem_access_count, region_count,
                                 region_descr->address_range_count);
     if ( tot_len > max_frag_len )
+    {
+        ffa_rxtx_spmc_tx_release();
         return FFA_RET_NOT_SUPPORTED;
+    }
 
     addr_range = region_descr->address_range_array;
     frag_len = ADDR_RANGE_OFFSET(descr->mem_access_count, region_count, 1);
@@ -360,7 +367,11 @@ static int share_shm(struct ffa_shm_mem *shm)
         init_range(addr_range, pa);
     }
 
-    return ffa_mem_share(tot_len, frag_len, 0, 0, &shm->handle);
+    ret = ffa_mem_share(tot_len, frag_len, 0, 0, &shm->handle);
+
+    ffa_rxtx_spmc_tx_release();
+
+    return ret;
 }
 
 static int read_mem_transaction(uint32_t ffa_vers, const void *buf, size_t blen,
@@ -578,10 +589,7 @@ void ffa_handle_mem_share(struct cpu_user_regs *regs)
     if ( ret )
         goto out;
 
-    /* Note that share_shm() uses our tx buffer */
-    spin_lock(&ffa_tx_buffer_lock);
     ret = share_shm(shm);
-    spin_unlock(&ffa_tx_buffer_lock);
     if ( ret )
         goto out;
 
-- 
2.51.2



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From: Bertrand Marquis 
To: xen-devel@lists.xenproject.org
Cc: jens.wiklander@linaro.org,
	Volodymyr Babchuk ,
	Stefano Stabellini ,
	Julien Grall ,
	Michal Orzel 
Subject: [PATCH 05/10] xen/arm: ffa: use signed 32-bit status codes
Date: Thu, 27 Nov 2025 16:51:36 +0100
Message-ID: <6e31745ff6473189d79a53cec2c29fdd41a22251.1764254975.git.bertrand.marquis@arm.com>
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The FF-A spec defines return status values as signed 32-bit integers.
Align the Xen mediator with this requirement by:

- switching the FF-A helpers (ffa_handle_mem_reclaim(), partition info
  init, notification ops, dispatcher glue, etc.) to int32_t return types
  so callers cannot silently truncate negative values
- masking SMCCC responses/exits in ffa_get_version(),
  ffa_get_ret_code() and ffa_set_regs_error() to 32 bits before storing
  them in guest registers
- updating notifier, shared-memory reclaim, partition-info and
  dispatcher call sites to use the new prototypes so the entire FF-A
  path propagates spec-compliant 32-bit signed error codes

While there, tidy up the FF-A notification helpers by using GENMASK(15, 0)
for endpoint extraction and fix the secure-endpoint check in
ffa_handle_notification_set() to apply the mask to the endpoint ID before
calling FFA_ID_IS_SECURE(), instead of testing the wrong halfword of
src_dst.

Fixes: 911b305e7bdab ("xen/arm: ffa: Enable VM to VM without firmware")
Signed-off-by: Bertrand Marquis 
---
 xen/arch/arm/tee/ffa.c          | 12 +++++++-----
 xen/arch/arm/tee/ffa_notif.c    | 14 +++++++-------
 xen/arch/arm/tee/ffa_partinfo.c |  4 ++--
 xen/arch/arm/tee/ffa_private.h  | 21 +++++++++++----------
 xen/arch/arm/tee/ffa_shm.c      |  4 ++--
 5 files changed, 29 insertions(+), 26 deletions(-)

diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c
index 4c1b9a4c3b48..7392bb6c3db9 100644
--- a/xen/arch/arm/tee/ffa.c
+++ b/xen/arch/arm/tee/ffa.c
@@ -129,12 +129,14 @@ static bool ffa_get_version(uint32_t *vers)
         .a1 = FFA_MY_VERSION,
     };
     struct arm_smccc_1_2_regs resp;
+    int32_t ret;
 
     arm_smccc_1_2_smc(&arg, &resp);
-    if ( resp.a0 == FFA_RET_NOT_SUPPORTED )
+    ret = resp.a0 & GENMASK_ULL(31, 0);
+    if ( ret == FFA_RET_NOT_SUPPORTED )
         return false;
 
-    *vers = resp.a0;
+    *vers = resp.a0 & GENMASK_ULL(31, 0);
 
     return true;
 }
@@ -304,7 +306,7 @@ static bool ffa_handle_call(struct cpu_user_regs *regs)
     uint32_t fid = get_user_reg(regs, 0);
     struct domain *d = current->domain;
     struct ffa_ctx *ctx = d->arch.tee;
-    int e;
+    int32_t e;
 
     if ( !ctx )
         return false;
@@ -376,8 +378,8 @@ static bool ffa_handle_call(struct cpu_user_regs *regs)
 
     default:
         gprintk(XENLOG_ERR, "ffa: unhandled fid 0x%x\n", fid);
-        ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED);
-        return true;
+        e = FFA_RET_NOT_SUPPORTED;
+        break;
     }
 
     if ( e )
diff --git a/xen/arch/arm/tee/ffa_notif.c b/xen/arch/arm/tee/ffa_notif.c
index 86bef6b3b2ab..37b05747cd21 100644
--- a/xen/arch/arm/tee/ffa_notif.c
+++ b/xen/arch/arm/tee/ffa_notif.c
@@ -19,7 +19,7 @@
 static bool __ro_after_init fw_notif_enabled;
 static unsigned int __ro_after_init notif_sri_irq;
 
-int ffa_handle_notification_bind(struct cpu_user_regs *regs)
+int32_t ffa_handle_notification_bind(struct cpu_user_regs *regs)
 {
     struct domain *d = current->domain;
     uint32_t src_dst = get_user_reg(regs, 1);
@@ -27,7 +27,7 @@ int ffa_handle_notification_bind(struct cpu_user_regs *regs)
     uint32_t bitmap_lo = get_user_reg(regs, 3);
     uint32_t bitmap_hi = get_user_reg(regs, 4);
 
-    if ( (src_dst & 0xFFFFU) != ffa_get_vm_id(d) )
+    if ( (src_dst & GENMASK(15, 0)) != ffa_get_vm_id(d) )
         return FFA_RET_INVALID_PARAMETERS;
 
     if ( flags )    /* Only global notifications are supported */
@@ -40,14 +40,14 @@ int ffa_handle_notification_bind(struct cpu_user_regs *regs)
     return FFA_RET_NOT_SUPPORTED;
 }
 
-int ffa_handle_notification_unbind(struct cpu_user_regs *regs)
+int32_t ffa_handle_notification_unbind(struct cpu_user_regs *regs)
 {
     struct domain *d = current->domain;
     uint32_t src_dst = get_user_reg(regs, 1);
     uint32_t bitmap_lo = get_user_reg(regs, 3);
     uint32_t bitmap_hi = get_user_reg(regs, 4);
 
-    if ( (src_dst & 0xFFFFU) != ffa_get_vm_id(d) )
+    if ( (src_dst & GENMASK(15, 0)) != ffa_get_vm_id(d) )
         return FFA_RET_INVALID_PARAMETERS;
 
     if ( FFA_ID_IS_SECURE(src_dst >> 16) && fw_notif_enabled )
@@ -106,7 +106,7 @@ void ffa_handle_notification_get(struct cpu_user_regs *regs)
         return;
     }
 
-    if ( (recv & 0xFFFFU) != ffa_get_vm_id(d) )
+    if ( (recv & GENMASK(15, 0)) != ffa_get_vm_id(d) )
     {
         ffa_set_regs_error(regs, FFA_RET_INVALID_PARAMETERS);
         return;
@@ -162,7 +162,7 @@ void ffa_handle_notification_get(struct cpu_user_regs *regs)
     ffa_set_regs(regs, FFA_SUCCESS_32, 0, w2, w3, w4, w5, w6, w7);
 }
 
-int ffa_handle_notification_set(struct cpu_user_regs *regs)
+int32_t ffa_handle_notification_set(struct cpu_user_regs *regs)
 {
     struct domain *d = current->domain;
     uint32_t src_dst = get_user_reg(regs, 1);
@@ -173,7 +173,7 @@ int ffa_handle_notification_set(struct cpu_user_regs *regs)
     if ( (src_dst >> 16) != ffa_get_vm_id(d) )
         return FFA_RET_INVALID_PARAMETERS;
 
-    if ( FFA_ID_IS_SECURE(src_dst >> 16) && fw_notif_enabled )
+    if ( FFA_ID_IS_SECURE(src_dst & GENMASK(15, 0)) && fw_notif_enabled )
         return ffa_simple_call(FFA_NOTIFICATION_SET, src_dst, flags, bitmap_lo,
                                bitmap_hi);
 
diff --git a/xen/arch/arm/tee/ffa_partinfo.c b/xen/arch/arm/tee/ffa_partinfo.c
index 766b75dffb8c..3f4a779f4146 100644
--- a/xen/arch/arm/tee/ffa_partinfo.c
+++ b/xen/arch/arm/tee/ffa_partinfo.c
@@ -448,7 +448,7 @@ bool ffa_partinfo_init(void)
     bool ret = false;
     uint32_t fpi_size;
     uint32_t count;
-    int e;
+    int32_t e;
     void *spmc_rx;
 
     if ( !ffa_fw_supports_fid(FFA_PARTITION_INFO_GET) ||
@@ -515,7 +515,7 @@ static void vm_destroy_bitmap_init(struct ffa_ctx *ctx,
     }
 }
 
-int ffa_partinfo_domain_init(struct domain *d)
+int32_t ffa_partinfo_domain_init(struct domain *d)
 {
     unsigned int count = BITS_TO_LONGS(subscr_vm_destroyed_count);
     struct ffa_ctx *ctx = d->arch.tee;
diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_private.h
index cd35c44b8986..9cae238f972c 100644
--- a/xen/arch/arm/tee/ffa_private.h
+++ b/xen/arch/arm/tee/ffa_private.h
@@ -31,9 +31,9 @@
 
 /* FFA_VERSION helpers */
 #define FFA_VERSION_MAJOR_SHIFT         16U
-#define FFA_VERSION_MAJOR_MASK          0x7FFFU
+#define FFA_VERSION_MAJOR_MASK          GENMASK(14, 0)
 #define FFA_VERSION_MINOR_SHIFT         0U
-#define FFA_VERSION_MINOR_MASK          0xFFFFU
+#define FFA_VERSION_MINOR_MASK          GENMASK(15, 0)
 #define MAKE_FFA_VERSION(major, minor)  \
         ((((major) & FFA_VERSION_MAJOR_MASK) << FFA_VERSION_MAJOR_SHIFT) | \
          ((minor) & FFA_VERSION_MINOR_MASK))
@@ -414,10 +414,10 @@ extern atomic_t ffa_vm_count;
 
 bool ffa_shm_domain_destroy(struct domain *d);
 void ffa_handle_mem_share(struct cpu_user_regs *regs);
-int ffa_handle_mem_reclaim(uint64_t handle, uint32_t flags);
+int32_t ffa_handle_mem_reclaim(uint64_t handle, uint32_t flags);
 
 bool ffa_partinfo_init(void);
-int ffa_partinfo_domain_init(struct domain *d);
+int32_t ffa_partinfo_domain_init(struct domain *d);
 bool ffa_partinfo_domain_destroy(struct domain *d);
 void ffa_handle_partition_info_get(struct cpu_user_regs *regs);
 
@@ -441,11 +441,11 @@ void ffa_notif_init_interrupt(void);
 int ffa_notif_domain_init(struct domain *d);
 void ffa_notif_domain_destroy(struct domain *d);
 
-int ffa_handle_notification_bind(struct cpu_user_regs *regs);
-int ffa_handle_notification_unbind(struct cpu_user_regs *regs);
+int32_t ffa_handle_notification_bind(struct cpu_user_regs *regs);
+int32_t ffa_handle_notification_unbind(struct cpu_user_regs *regs);
 void ffa_handle_notification_info_get(struct cpu_user_regs *regs);
 void ffa_handle_notification_get(struct cpu_user_regs *regs);
-int ffa_handle_notification_set(struct cpu_user_regs *regs);
+int32_t ffa_handle_notification_set(struct cpu_user_regs *regs);
 
 #ifdef CONFIG_FFA_VM_TO_VM
 void ffa_raise_rx_buffer_full(struct domain *d);
@@ -511,9 +511,10 @@ static inline void ffa_set_regs(struct cpu_user_regs *regs, register_t v0,
 }
 
 static inline void ffa_set_regs_error(struct cpu_user_regs *regs,
-                                      uint32_t error_code)
+                                      int32_t error_code)
 {
-    ffa_set_regs(regs, FFA_ERROR, 0, error_code, 0, 0, 0, 0, 0);
+    ffa_set_regs(regs, FFA_ERROR, 0, error_code & GENMASK_ULL(31, 0), 0, 0, 0,
+                 0, 0);
 }
 
 static inline void ffa_set_regs_success(struct cpu_user_regs *regs,
@@ -528,7 +529,7 @@ static inline int32_t ffa_get_ret_code(const struct arm_smccc_1_2_regs *resp)
     {
     case FFA_ERROR:
         if ( resp->a2 )
-            return resp->a2;
+            return resp->a2 & GENMASK_ULL(31, 0);
         else
             return FFA_RET_NOT_SUPPORTED;
     case FFA_SUCCESS_32:
diff --git a/xen/arch/arm/tee/ffa_shm.c b/xen/arch/arm/tee/ffa_shm.c
index b9022797c3bf..9db72269d1ea 100644
--- a/xen/arch/arm/tee/ffa_shm.c
+++ b/xen/arch/arm/tee/ffa_shm.c
@@ -624,14 +624,14 @@ static struct ffa_shm_mem *find_shm_mem(struct ffa_ctx *ctx, uint64_t handle)
     return NULL;
 }
 
-int ffa_handle_mem_reclaim(uint64_t handle, uint32_t flags)
+int32_t ffa_handle_mem_reclaim(uint64_t handle, uint32_t flags)
 {
     struct domain *d = current->domain;
     struct ffa_ctx *ctx = d->arch.tee;
     struct ffa_shm_mem *shm;
     register_t handle_hi;
     register_t handle_lo;
-    int ret;
+    int32_t ret;
 
     if ( !ffa_fw_supports_fid(FFA_MEM_RECLAIM) )
         return FFA_RET_NOT_SUPPORTED;
-- 
2.51.2



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From: Bertrand Marquis 
To: xen-devel@lists.xenproject.org
Cc: jens.wiklander@linaro.org,
	Volodymyr Babchuk ,
	Stefano Stabellini ,
	Julien Grall ,
	Michal Orzel 
Subject: [PATCH 06/10] xen/arm: ffa: add UUID helpers for partition info
Date: Thu, 27 Nov 2025 16:51:37 +0100
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Introduce struct ffa_uuid together with nil/equality/set helpers, and
use it end-to-end in the partition-info plumbing.

The SP and VM enumeration paths now build UUIDs from the guest
registers, call a new ffa_copy_info() helper and ensure non-nil UUID
queries only return matching SP entries, relying on firmware UUID
filtering. VM entries are skipped because we do not track per-VM UUIDs.

Count requests and subscriber initialisation are updated accordingly so
firmware is always called with an explicit UUID. This keeps count and
listing requests aligned with the FF-A v1.1 rules while preserving the
Linux compatibility workaround for v1.2 requesters.

Signed-off-by: Bertrand Marquis 
---
 xen/arch/arm/tee/ffa_partinfo.c | 206 ++++++++++++++++++++------------
 xen/arch/arm/tee/ffa_private.h  |  21 ++++
 2 files changed, 152 insertions(+), 75 deletions(-)

diff --git a/xen/arch/arm/tee/ffa_partinfo.c b/xen/arch/arm/tee/ffa_partinfo.c
index 3f4a779f4146..4adbe2736c94 100644
--- a/xen/arch/arm/tee/ffa_partinfo.c
+++ b/xen/arch/arm/tee/ffa_partinfo.c
@@ -33,7 +33,7 @@ static uint16_t subscr_vm_created_count __read_mostly;
 static uint16_t *subscr_vm_destroyed __read_mostly;
 static uint16_t subscr_vm_destroyed_count __read_mostly;
 
-static int32_t ffa_partition_info_get(uint32_t *uuid, uint32_t flags,
+static int32_t ffa_partition_info_get(struct ffa_uuid uuid, uint32_t flags,
                                       uint32_t *count, uint32_t *fpi_size)
 {
     struct arm_smccc_1_2_regs arg = {
@@ -41,15 +41,12 @@ static int32_t ffa_partition_info_get(uint32_t *uuid, uint32_t flags,
         .a5 = flags,
     };
     struct arm_smccc_1_2_regs resp;
-    uint32_t ret;
+    int32_t ret;
 
-    if ( uuid )
-    {
-        arg.a1 = uuid[0];
-        arg.a2 = uuid[1];
-        arg.a3 = uuid[2];
-        arg.a4 = uuid[3];
-    }
+    arg.a1 = uuid.val[0] & 0xFFFFFFFFU;
+    arg.a2 = (uuid.val[0] >> 32) & 0xFFFFFFFFU;
+    arg.a3 = uuid.val[1] & 0xFFFFFFFFU;
+    arg.a4 = (uuid.val[1] >> 32) & 0xFFFFFFFFU;
 
     arm_smccc_1_2_smc(&arg, &resp);
 
@@ -63,7 +60,26 @@ static int32_t ffa_partition_info_get(uint32_t *uuid, uint32_t flags,
     return ret;
 }
 
-static int32_t ffa_get_sp_count(uint32_t *uuid, uint32_t *sp_count)
+static int32_t ffa_copy_info(void **dst, void *dst_end, const void *src,
+                             uint32_t dst_size, uint32_t src_size)
+{
+    uint8_t *pos = *dst;
+    uint8_t *end = dst_end;
+
+    if ( pos > end - dst_size )
+        return FFA_RET_NO_MEMORY;
+
+    memcpy(pos, src, MIN(dst_size, src_size));
+
+    if ( dst_size > src_size )
+        memset(pos + src_size, 0, dst_size - src_size);
+
+    *dst = pos + dst_size;
+
+    return FFA_RET_OK;
+}
+
+static int32_t ffa_get_sp_count(struct ffa_uuid uuid, uint32_t *sp_count)
 {
     uint32_t src_size;
 
@@ -71,8 +87,8 @@ static int32_t ffa_get_sp_count(uint32_t *uuid, uint32_t *sp_count)
                                   sp_count, &src_size);
 }
 
-static int32_t ffa_get_sp_partinfo(uint32_t *uuid, uint32_t *sp_count,
-                                   void *dst_buf, void *end_buf,
+static int32_t ffa_get_sp_partinfo(struct ffa_uuid uuid, uint32_t *sp_count,
+                                   void **dst_buf, void *end_buf,
                                    uint32_t dst_size)
 {
     int32_t ret;
@@ -120,17 +136,18 @@ static int32_t ffa_get_sp_partinfo(uint32_t *uuid, uint32_t *sp_count,
         /* filter out SP not following bit 15 convention if any */
         if ( FFA_ID_IS_SECURE(fpi->id) )
         {
-            if ( dst_buf > (end_buf - dst_size) )
-            {
-                ret = FFA_RET_NO_MEMORY;
-                goto out;
-            }
+            /*
+             * If VM is 1.0 but firmware is 1.1 we could have several entries
+             * with the same ID but different UUIDs. In this case the VM will
+             * get a list with several time the same ID.
+             * This is a non-compliance to the specification but 1.0 VMs should
+             * handle that on their own to simplify Xen implementation.
+             */
 
-            memcpy(dst_buf, src_buf, MIN(src_size, dst_size));
-            if ( dst_size > src_size )
-                memset(dst_buf + src_size, 0, dst_size - src_size);
+            ret = ffa_copy_info(dst_buf, end_buf, src_buf, dst_size, src_size);
+            if ( ret )
+                goto out;
 
-            dst_buf += dst_size;
             count++;
         }
 
@@ -144,69 +161,89 @@ out:
     return ret;
 }
 
-static int32_t ffa_get_vm_partinfo(uint32_t *vm_count, void *dst_buf,
-                                   void *end_buf, uint32_t dst_size)
+static int32_t ffa_get_vm_partinfo(struct ffa_uuid uuid, uint32_t *vm_count,
+                                   void **dst_buf, void *end_buf,
+                                   uint32_t dst_size)
 {
     struct ffa_ctx *curr_ctx = current->domain->arch.tee;
     struct ffa_ctx *dest_ctx;
     uint32_t count = 0;
     int32_t ret = FFA_RET_OK;
+    /*
+     * We do not have UUID info for VMs so use the 1.0 structure so that we set
+     * UUIDs to zero using memset
+     */
+    struct ffa_partition_info_1_0 info;
 
     /*
-     * There could potentially be a lot of VMs in the system and we could
-     * hold the CPU for long here.
-     * Right now there is no solution in FF-A specification to split
-     * the work in this case.
-     * TODO: Check how we could delay the work or have preemption checks.
+     * We do not have protocol UUIDs for VMs so if a request has non Nil UUID
+     * we must return an empty list.
      */
-    read_lock(&ffa_ctx_list_rwlock);
-    list_for_each_entry(dest_ctx, &ffa_ctx_head, ctx_list)
+    if ( !ffa_uuid_is_nil(uuid) )
+    {
+        *vm_count = 0;
+        return FFA_RET_OK;
+    }
+
+    /*
+     * Workaround for Linux FF-A Driver not accepting to have its own
+     * entry in the list before FF-A v1.2 was supported.
+     * This workaround is generally acceptable for other implementations
+     * as the specification was not completely clear on wether or not
+     * the requester endpoint information should be included or not
+     */
+    if ( curr_ctx->guest_vers >= FFA_VERSION_1_2 )
+    {
+        /* Add caller VM information */
+        info.id = curr_ctx->ffa_id;
+        info.execution_context = curr_ctx->num_vcpus;
+        info.partition_properties = FFA_PART_VM_PROP;
+        if ( curr_ctx->is_64bit )
+            info.partition_properties |= FFA_PART_PROP_AARCH64_STATE;
+
+        ret = ffa_copy_info(dst_buf, end_buf, &info, dst_size, sizeof(info));
+        if ( ret )
+            return ret;
+
+        count++;
+    }
+
+    if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) )
     {
         /*
-         * Do not include an entry for the caller VM as the spec is not
-         * clearly mandating it and it is not supported by Linux.
+         * There could potentially be a lot of VMs in the system and we could
+         * hold the CPU for long here.
+         * Right now there is no solution in FF-A specification to split
+         * the work in this case.
+         * TODO: Check how we could delay the work or have preemption checks.
          */
-        if ( dest_ctx != curr_ctx )
+        read_lock(&ffa_ctx_list_rwlock);
+        list_for_each_entry(dest_ctx, &ffa_ctx_head, ctx_list)
         {
-            /*
-             * We do not have UUID info for VMs so use
-             * the 1.0 structure so that we set UUIDs to
-             * zero using memset
-             */
-            struct ffa_partition_info_1_0 info;
-
-            if  ( dst_buf > (end_buf - dst_size) )
-            {
-                ret = FFA_RET_NO_MEMORY;
-                goto out;
-            }
+            /* Ignore the caller entry as it was already added */
+            if ( dest_ctx == curr_ctx )
+                continue;
 
-            /*
-             * Context might has been removed since we go it or being removed
-             * right now so we might return information for a VM not existing
-             * anymore. This is acceptable as we return a view of the system
-             * which could change at any time.
-             */
             info.id = dest_ctx->ffa_id;
             info.execution_context = dest_ctx->num_vcpus;
             info.partition_properties = FFA_PART_VM_PROP;
             if ( dest_ctx->is_64bit )
                 info.partition_properties |= FFA_PART_PROP_AARCH64_STATE;
 
-            memcpy(dst_buf, &info, MIN(sizeof(info), dst_size));
-
-            if ( dst_size > sizeof(info) )
-                memset(dst_buf + sizeof(info), 0,
-                       dst_size - sizeof(info));
+            ret = ffa_copy_info(dst_buf, end_buf, &info, dst_size,
+                                sizeof(info));
+            if ( ret )
+            {
+                read_unlock(&ffa_ctx_list_rwlock);
+                return ret;
+            }
 
-            dst_buf += dst_size;
             count++;
         }
+        read_unlock(&ffa_ctx_list_rwlock);
     }
-    *vm_count = count;
 
-out:
-    read_unlock(&ffa_ctx_list_rwlock);
+    *vm_count = count;
 
     return ret;
 }
@@ -217,16 +254,17 @@ void ffa_handle_partition_info_get(struct cpu_user_regs *regs)
     struct domain *d = current->domain;
     struct ffa_ctx *ctx = d->arch.tee;
     uint32_t flags = get_user_reg(regs, 5);
-    uint32_t uuid[4] = {
-        get_user_reg(regs, 1),
-        get_user_reg(regs, 2),
-        get_user_reg(regs, 3),
-        get_user_reg(regs, 4),
-    };
+    struct ffa_uuid uuid;
     uint32_t dst_size = 0;
     void *dst_buf, *end_buf;
     uint32_t ffa_vm_count = 0, ffa_sp_count = 0;
 
+    ffa_uuid_set(&uuid,
+             get_user_reg(regs, 1),
+             get_user_reg(regs, 2),
+             get_user_reg(regs, 3),
+             get_user_reg(regs, 4));
+
     /*
      * If the guest is v1.0, he does not get back the entry size so we must
      * use the v1.0 structure size in the destination buffer.
@@ -259,10 +297,23 @@ void ffa_handle_partition_info_get(struct cpu_user_regs *regs)
         }
 
         /*
-         * Do not count the caller VM as the spec is not clearly mandating it
-         * and it is not supported by Linux.
+         * We do not have protocol UUIDs for VMs so if a request has non Nil
+         * UUID we must return a vm_count of 0
          */
-        ffa_vm_count = get_ffa_vm_count() - 1;
+        if ( ffa_uuid_is_nil(uuid) )
+        {
+            ffa_vm_count = get_ffa_vm_count();
+
+            /*
+             * Workaround for Linux FF-A Driver not accepting to have its own
+             * entry in the list before FF-A v1.2 was supported.
+             * This workaround is generally acceptable for other implementations
+             * as the specification was not completely clear on wether or not
+             * the requester endpoint information should be included or not
+             */
+            if ( ctx->guest_vers < FFA_VERSION_1_2 )
+                ffa_vm_count -= 1;
+        }
 
         goto out;
     }
@@ -290,17 +341,15 @@ void ffa_handle_partition_info_get(struct cpu_user_regs *regs)
 
     if ( ffa_fw_supports_fid(FFA_PARTITION_INFO_GET) )
     {
-        ret = ffa_get_sp_partinfo(uuid, &ffa_sp_count, dst_buf, end_buf,
+        ret = ffa_get_sp_partinfo(uuid, &ffa_sp_count, &dst_buf, end_buf,
                                   dst_size);
 
         if ( ret )
             goto out_rx_release;
-
-        dst_buf += ffa_sp_count * dst_size;
     }
 
-    if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) )
-        ret = ffa_get_vm_partinfo(&ffa_vm_count, dst_buf, end_buf, dst_size);
+    ret = ffa_get_vm_partinfo(uuid, &ffa_vm_count, &dst_buf, end_buf,
+                              dst_size);
 
 out_rx_release:
     if ( ret )
@@ -309,7 +358,13 @@ out:
     if ( ret )
         ffa_set_regs_error(regs, ret);
     else
+    {
+        /* Size should be 0 on count request and was not supported in 1.0 */
+        if ( flags || ctx->guest_vers == FFA_VERSION_1_0 )
+            dst_size = 0;
+
         ffa_set_regs_success(regs, ffa_sp_count + ffa_vm_count, dst_size);
+    }
 }
 
 static int32_t ffa_direct_req_send_vm(uint16_t sp_id, uint16_t vm_id,
@@ -450,6 +505,7 @@ bool ffa_partinfo_init(void)
     uint32_t count;
     int32_t e;
     void *spmc_rx;
+    struct ffa_uuid nil_uuid = { .val = { 0ULL, 0ULL } };
 
     if ( !ffa_fw_supports_fid(FFA_PARTITION_INFO_GET) ||
          !ffa_fw_supports_fid(FFA_MSG_SEND_DIRECT_REQ_32))
@@ -459,7 +515,7 @@ bool ffa_partinfo_init(void)
     if (!spmc_rx)
         return false;
 
-    e = ffa_partition_info_get(NULL, 0, &count, &fpi_size);
+    e = ffa_partition_info_get(nil_uuid, 0, &count, &fpi_size);
     if ( e )
     {
         printk(XENLOG_ERR "ffa: Failed to get list of SPs: %d\n", e);
diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_private.h
index 9cae238f972c..c1dac09c75ca 100644
--- a/xen/arch/arm/tee/ffa_private.h
+++ b/xen/arch/arm/tee/ffa_private.h
@@ -306,6 +306,10 @@ struct ffa_mem_region {
     struct ffa_address_range address_range_array[];
 };
 
+struct ffa_uuid {
+    uint64_t val[2];
+};
+
 struct ffa_ctx_notif {
     /*
      * True if domain is reported by FFA_NOTIFICATION_INFO_GET to have
@@ -567,4 +571,21 @@ static inline bool ffa_fw_supports_fid(uint32_t fid)
     return test_bit(FFA_ABI_BITNUM(fid), ffa_fw_abi_supported);
 }
 
+static inline bool ffa_uuid_is_nil(struct ffa_uuid id)
+{
+    return id.val[0] == 0 && id.val[1] == 0;
+}
+
+static inline bool ffa_uuid_equal(struct ffa_uuid id1, struct ffa_uuid id2)
+{
+    return id1.val[0] == id2.val[0] && id1.val[1] == id2.val[1];
+}
+
+static inline void ffa_uuid_set(struct ffa_uuid *id, uint32_t val0,
+                                uint32_t val1, uint32_t val2, uint32_t val3)
+{
+    id->val[0] = ((uint64_t)val1 << 32U) | val0;
+    id->val[1] = ((uint64_t)val3 << 32U) | val2;
+}
+
 #endif /*__FFA_PRIVATE_H__*/
-- 
2.51.2



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From: Bertrand Marquis 
To: xen-devel@lists.xenproject.org
Cc: jens.wiklander@linaro.org,
	Volodymyr Babchuk ,
	Stefano Stabellini ,
	Julien Grall ,
	Michal Orzel 
Subject: [PATCH 07/10] xen/arm: ffa: refactor direct requests via RUN helper
Date: Thu, 27 Nov 2025 16:51:38 +0100
Message-ID: 
X-Mailer: git-send-email 2.51.2
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Share the SMCCC plumbing used by SEND_DIRECT and RUN via a common
ffa_finish_direct_req_run() helper so canonical success and error cases
are handled in one place.

The dispatcher now routes FFA_RUN through ffa_handle_run(), and direct
requests bail out early if a guest targets itself or a non-secure
endpoint. This simplifies the direct path and prepares the mediator for
the wider v1.2 register ABI.

Signed-off-by: Bertrand Marquis 
---
 xen/arch/arm/tee/ffa.c         |   3 +
 xen/arch/arm/tee/ffa_msg.c     | 111 ++++++++++++++++++++++++---------
 xen/arch/arm/tee/ffa_private.h |   1 +
 3 files changed, 84 insertions(+), 31 deletions(-)

diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c
index 7392bb6c3db9..92cb6ad7ec97 100644
--- a/xen/arch/arm/tee/ffa.c
+++ b/xen/arch/arm/tee/ffa.c
@@ -347,6 +347,9 @@ static bool ffa_handle_call(struct cpu_user_regs *regs)
     case FFA_MSG_SEND_DIRECT_REQ_64:
         ffa_handle_msg_send_direct_req(regs, fid);
         return true;
+    case FFA_RUN:
+        ffa_handle_run(regs, fid);
+        return true;
     case FFA_MSG_SEND2:
         e = ffa_handle_msg_send2(regs);
         break;
diff --git a/xen/arch/arm/tee/ffa_msg.c b/xen/arch/arm/tee/ffa_msg.c
index dec429cbf160..8bb4bd93f724 100644
--- a/xen/arch/arm/tee/ffa_msg.c
+++ b/xen/arch/arm/tee/ffa_msg.c
@@ -21,42 +21,74 @@ struct ffa_part_msg_rxtx {
     uint32_t msg_size;
 };
 
-void ffa_handle_msg_send_direct_req(struct cpu_user_regs *regs, uint32_t fid)
+static void ffa_finish_direct_req_run(struct cpu_user_regs *regs,
+                                      struct arm_smccc_1_2_regs *req)
 {
-    struct arm_smccc_1_2_regs arg = { .a0 = fid, };
     struct arm_smccc_1_2_regs resp = { };
-    struct domain *d = current->domain;
-    uint32_t src_dst;
     uint64_t mask;
 
-    if ( smccc_is_conv_64(fid) )
+    arm_smccc_1_2_smc(req, &resp);
+
+    switch ( resp.a0 )
+    {
+    case FFA_ERROR:
+    case FFA_SUCCESS_32:
+    case FFA_SUCCESS_64:
+    case FFA_MSG_SEND_DIRECT_RESP_32:
+    case FFA_MSG_SEND_DIRECT_RESP_64:
+    case FFA_MSG_YIELD:
+    case FFA_INTERRUPT:
+        break;
+    default:
+        /* Bad fid, report back to the caller. */
+        ffa_set_regs_error(regs, FFA_RET_ABORTED);
+        return;
+    }
+
+    if ( smccc_is_conv_64(resp.a0) )
         mask = GENMASK_ULL(63, 0);
     else
         mask = GENMASK_ULL(31, 0);
 
+    ffa_set_regs(regs, resp.a0, resp.a1 & mask, resp.a2 & mask, resp.a3 & mask,
+                 resp.a4 & mask, resp.a5 & mask, resp.a6 & mask,
+                 resp.a7 & mask);
+}
+
+void ffa_handle_msg_send_direct_req(struct cpu_user_regs *regs, uint32_t fid)
+{
+    struct arm_smccc_1_2_regs arg = { .a0 = fid, };
+    struct domain *d = current->domain;
+    uint32_t src_dst;
+    uint64_t mask;
+    int32_t ret;
+
     if ( !ffa_fw_supports_fid(fid) )
     {
-        resp.a0 = FFA_ERROR;
-        resp.a2 = FFA_RET_NOT_SUPPORTED;
+        ret = FFA_RET_NOT_SUPPORTED;
         goto out;
     }
 
     src_dst = get_user_reg(regs, 1);
-    if ( (src_dst >> 16) != ffa_get_vm_id(d) )
+    if ( (src_dst >> 16) != ffa_get_vm_id(d) ||
+         (src_dst & GENMASK(15,0)) == ffa_get_vm_id(d) )
     {
-        resp.a0 = FFA_ERROR;
-        resp.a2 = FFA_RET_INVALID_PARAMETERS;
+        ret = FFA_RET_INVALID_PARAMETERS;
         goto out;
     }
 
     /* we do not support direct messages to VMs */
     if ( !FFA_ID_IS_SECURE(src_dst & GENMASK(15,0)) )
     {
-        resp.a0 = FFA_ERROR;
-        resp.a2 = FFA_RET_NOT_SUPPORTED;
+        ret = FFA_RET_NOT_SUPPORTED;
         goto out;
     }
 
+    if ( smccc_is_conv_64(fid) )
+        mask = GENMASK_ULL(63, 0);
+    else
+        mask = GENMASK_ULL(31, 0);
+
     arg.a1 = src_dst;
     arg.a2 = get_user_reg(regs, 2) & mask;
     arg.a3 = get_user_reg(regs, 3) & mask;
@@ -65,27 +97,11 @@ void ffa_handle_msg_send_direct_req(struct cpu_user_regs *regs, uint32_t fid)
     arg.a6 = get_user_reg(regs, 6) & mask;
     arg.a7 = get_user_reg(regs, 7) & mask;
 
-    arm_smccc_1_2_smc(&arg, &resp);
-    switch ( resp.a0 )
-    {
-    case FFA_ERROR:
-    case FFA_SUCCESS_32:
-    case FFA_SUCCESS_64:
-    case FFA_MSG_SEND_DIRECT_RESP_32:
-    case FFA_MSG_SEND_DIRECT_RESP_64:
-        break;
-    default:
-        /* Bad fid, report back to the caller. */
-        memset(&resp, 0, sizeof(resp));
-        resp.a0 = FFA_ERROR;
-        resp.a1 = src_dst;
-        resp.a2 = FFA_RET_ABORTED;
-    }
+    ffa_finish_direct_req_run(regs, &arg);
+    return;
 
 out:
-    ffa_set_regs(regs, resp.a0, resp.a1 & mask, resp.a2 & mask, resp.a3 & mask,
-                 resp.a4 & mask, resp.a5 & mask, resp.a6 & mask,
-                 resp.a7 & mask);
+    ffa_set_regs_error(regs, ret);
 }
 
 static int32_t ffa_msg_send2_vm(uint16_t dst_id, const void *src_buf,
@@ -215,3 +231,36 @@ out:
     spin_unlock(&src_ctx->tx_lock);
     return ret;
 }
+
+void ffa_handle_run(struct cpu_user_regs *regs, uint32_t fid)
+{
+    struct arm_smccc_1_2_regs arg = { .a0 = fid, };
+    uint32_t dst = get_user_reg(regs, 1);
+    int32_t ret;
+
+    if ( !ffa_fw_supports_fid(fid) )
+    {
+        ret = FFA_RET_NOT_SUPPORTED;
+        goto out;
+    }
+
+    /*
+     * We do not support FFA_RUN to VMs.
+     * Destination endpoint ID is in bits [31:16], bits[15:0] contain the
+     * vCPU ID.
+     */
+    if ( !FFA_ID_IS_SECURE(dst >> 16) )
+    {
+        ret = FFA_RET_NOT_SUPPORTED;
+        goto out;
+    }
+
+    arg.a1 = dst;
+
+    ffa_finish_direct_req_run(regs, &arg);
+
+    return;
+
+out:
+    ffa_set_regs_error(regs, ret);
+}
diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_private.h
index c1dac09c75ca..a9a03c7c5d71 100644
--- a/xen/arch/arm/tee/ffa_private.h
+++ b/xen/arch/arm/tee/ffa_private.h
@@ -461,6 +461,7 @@ static inline void ffa_raise_rx_buffer_full(struct domain *d)
 
 void ffa_handle_msg_send_direct_req(struct cpu_user_regs *regs, uint32_t fid);
 int32_t ffa_handle_msg_send2(struct cpu_user_regs *regs);
+void ffa_handle_run(struct cpu_user_regs *regs, uint32_t fid);
 
 #ifdef CONFIG_FFA_VM_TO_VM
 static inline uint16_t get_ffa_vm_count(void)
-- 
2.51.2



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	Volodymyr Babchuk ,
	Stefano Stabellini ,
	Julien Grall ,
	Michal Orzel 
Subject: [PATCH 10/10] xen/arm: ffa: advertise FF-A v1.2
Date: Thu, 27 Nov 2025 16:51:41 +0100
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Advertise RUN/YIELD/INTERRUPT via FFA_FEATURES now that the runtime
helpers are in place, and expose the RX/TX MAP capacity field only once
a guest has negotiated FF-A v1.2.

While there, drop the stale  include.

To comply with the wider v1.2 register ABI, zero registers x8–x17 when
responding to a v1.2 VM. The dispatcher also rejects SMCCC64 calls from
AArch32 guests.

Finally, bump Xen's FF-A version to 1.2.

Signed-off-by: Bertrand Marquis 
---
 xen/arch/arm/tee/ffa.c         | 25 ++++++++++++++++++++-----
 xen/arch/arm/tee/ffa_private.h | 28 +++++++++++++++++++---------
 2 files changed, 39 insertions(+), 14 deletions(-)

diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c
index 8b2f042287fc..c8fe97856d06 100644
--- a/xen/arch/arm/tee/ffa.c
+++ b/xen/arch/arm/tee/ffa.c
@@ -24,9 +24,6 @@
  * o FFA_MEM_DONATE_* and FFA_MEM_LEND_* - Used when tranferring ownership
  *   or access of a memory region
  * o FFA_MSG_SEND2 and FFA_MSG_WAIT - Used for indirect messaging
- * o FFA_MSG_YIELD
- * o FFA_INTERRUPT - Used to report preemption
- * o FFA_RUN
  *
  * Limitations in the implemented FF-A interfaces:
  * o FFA_RXTX_MAP_*:
@@ -68,7 +65,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 
 #include "ffa_private.h"
@@ -262,6 +258,9 @@ static void handle_features(struct cpu_user_regs *regs)
     case FFA_MSG_SEND_DIRECT_REQ_32:
     case FFA_MSG_SEND_DIRECT_REQ_64:
     case FFA_MSG_SEND2:
+    case FFA_RUN:
+    case FFA_INTERRUPT:
+    case FFA_MSG_YIELD:
         ffa_set_regs_success(regs, 0, 0);
         break;
     case FFA_MSG_SEND_DIRECT_REQ2:
@@ -290,7 +289,16 @@ static void handle_features(struct cpu_user_regs *regs)
          * differs from FFA_PAGE_SIZE (SZ_4K).
          */
         BUILD_BUG_ON(PAGE_SIZE != FFA_PAGE_SIZE);
-        ffa_set_regs_success(regs, 0, 0);
+
+        /*
+         * From FFA v1.2, we can give the maximum number of pages we support
+         * for the RX/TX buffers.
+         */
+        if ( ctx->guest_vers < FFA_VERSION_1_2 )
+            ffa_set_regs_success(regs, 0, 0);
+        else
+            ffa_set_regs_success(regs, FFA_MAX_RXTX_PAGE_COUNT << 16, 0);
+
         break;
     case FFA_FEATURE_NOTIF_PEND_INTR:
         ffa_set_regs_success(regs, GUEST_FFA_NOTIF_PEND_INTR_ID, 0);
@@ -323,6 +331,13 @@ static bool ffa_handle_call(struct cpu_user_regs *regs)
     if ( !ctx )
         return false;
 
+    if ( !is_64bit_domain(d) && smccc_is_conv_64(fid) )
+    {
+        /* 32bit guests should only use 32bit convention calls */
+        ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED);
+        return true;
+    }
+
     /* A version must be negotiated first */
     if ( !ctx->guest_vers_negotiated )
     {
diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_private.h
index a9a03c7c5d71..6afca2ea07ef 100644
--- a/xen/arch/arm/tee/ffa_private.h
+++ b/xen/arch/arm/tee/ffa_private.h
@@ -53,7 +53,7 @@
  * that particular guest or SP.
  */
 #define FFA_MY_VERSION_MAJOR    1U
-#define FFA_MY_VERSION_MINOR    1U
+#define FFA_MY_VERSION_MINOR    2U
 #define FFA_MY_VERSION          MAKE_FFA_VERSION(FFA_MY_VERSION_MAJOR, \
                                                  FFA_MY_VERSION_MINOR)
 
@@ -505,14 +505,24 @@ static inline void ffa_set_regs(struct cpu_user_regs *regs, register_t v0,
                                 register_t v4, register_t v5, register_t v6,
                                 register_t v7)
 {
-        set_user_reg(regs, 0, v0);
-        set_user_reg(regs, 1, v1);
-        set_user_reg(regs, 2, v2);
-        set_user_reg(regs, 3, v3);
-        set_user_reg(regs, 4, v4);
-        set_user_reg(regs, 5, v5);
-        set_user_reg(regs, 6, v6);
-        set_user_reg(regs, 7, v7);
+    struct domain *d = current->domain;
+    struct ffa_ctx *ctx = d->arch.tee;
+    int i;
+
+    set_user_reg(regs, 0, v0);
+    set_user_reg(regs, 1, v1);
+    set_user_reg(regs, 2, v2);
+    set_user_reg(regs, 3, v3);
+    set_user_reg(regs, 4, v4);
+    set_user_reg(regs, 5, v5);
+    set_user_reg(regs, 6, v6);
+    set_user_reg(regs, 7, v7);
+
+    if ( ctx && ctx->guest_vers >= FFA_VERSION_1_2 && ctx->is_64bit )
+    {
+        for (i = 8; i <= 17; i++)
+            set_user_reg(regs, i, 0);
+    }
 }
 
 static inline void ffa_set_regs_error(struct cpu_user_regs *regs,
-- 
2.51.2



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	Volodymyr Babchuk ,
	Stefano Stabellini ,
	Julien Grall ,
	Michal Orzel 
Subject: [PATCH 08/10] xen/arm: ffa: add v1.2 SEND2 header layout
Date: Thu, 27 Nov 2025 16:51:39 +0100
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Teach the SEND2 path about the distinct FF-A v1.1 and v1.2 RX/TX header
layouts so we can propagate the 128-bit UUIDs introduced in v1.2.

VM-to-VM SEND2 calls now build the larger v1.2 header, zeroing the UUID
fields for v1.1 senders, and the dispatcher validates messages using
the v1.1 header layout to keep legacy guests working.

Signed-off-by: Bertrand Marquis 
---
 xen/arch/arm/tee/ffa_msg.c | 55 +++++++++++++++++++++++++++++---------
 1 file changed, 42 insertions(+), 13 deletions(-)

diff --git a/xen/arch/arm/tee/ffa_msg.c b/xen/arch/arm/tee/ffa_msg.c
index 8bb4bd93f724..472bfad79dd3 100644
--- a/xen/arch/arm/tee/ffa_msg.c
+++ b/xen/arch/arm/tee/ffa_msg.c
@@ -13,7 +13,7 @@
 #include "ffa_private.h"
 
 /* Encoding of partition message in RX/TX buffer */
-struct ffa_part_msg_rxtx {
+struct ffa_part_msg_rxtx_1_1 {
     uint32_t flags;
     uint32_t reserved;
     uint32_t msg_offset;
@@ -21,6 +21,16 @@ struct ffa_part_msg_rxtx {
     uint32_t msg_size;
 };
 
+struct ffa_part_msg_rxtx_1_2 {
+    uint32_t flags;
+    uint32_t reserved;
+    uint32_t msg_offset;
+    uint32_t send_recv_id;
+    uint32_t msg_size;
+    uint32_t reserved2;
+    uint64_t uuid[2];
+};
+
 static void ffa_finish_direct_req_run(struct cpu_user_regs *regs,
                                       struct arm_smccc_1_2_regs *req)
 {
@@ -104,12 +114,12 @@ out:
     ffa_set_regs_error(regs, ret);
 }
 
-static int32_t ffa_msg_send2_vm(uint16_t dst_id, const void *src_buf,
-                                struct ffa_part_msg_rxtx *src_msg)
+static int32_t ffa_msg_send2_vm(struct ffa_ctx *src_ctx, uint16_t dst_id,
+                                struct ffa_part_msg_rxtx_1_2 *src_msg)
 {
     struct domain *dst_d;
     struct ffa_ctx *dst_ctx;
-    struct ffa_part_msg_rxtx *dst_msg;
+    struct ffa_part_msg_rxtx_1_2 *dst_msg;
     int err;
     int32_t ret;
 
@@ -142,7 +152,7 @@ static int32_t ffa_msg_send2_vm(uint16_t dst_id, const void *src_buf,
 
     /* we need to have enough space in the destination buffer */
     if ( (dst_ctx->page_count * FFA_PAGE_SIZE -
-          sizeof(struct ffa_part_msg_rxtx)) < src_msg->msg_size )
+          sizeof(struct ffa_part_msg_rxtx_1_2)) < src_msg->msg_size )
     {
         ret = FFA_RET_NO_MEMORY;
         ffa_rx_release(dst_d);
@@ -154,12 +164,24 @@ static int32_t ffa_msg_send2_vm(uint16_t dst_id, const void *src_buf,
     /* prepare destination header */
     dst_msg->flags = 0;
     dst_msg->reserved = 0;
-    dst_msg->msg_offset = sizeof(struct ffa_part_msg_rxtx);
+    dst_msg->msg_offset = sizeof(struct ffa_part_msg_rxtx_1_2);
     dst_msg->send_recv_id = src_msg->send_recv_id;
     dst_msg->msg_size = src_msg->msg_size;
+    dst_msg->reserved2 = 0;
 
-    memcpy(dst_ctx->rx + sizeof(struct ffa_part_msg_rxtx),
-           src_buf + src_msg->msg_offset, src_msg->msg_size);
+    if ( src_ctx->guest_vers < FFA_VERSION_1_2 )
+    {
+        dst_msg->uuid[0] = 0;
+        dst_msg->uuid[1] = 0;
+    }
+    else
+    {
+        dst_msg->uuid[0] = src_msg->uuid[0];
+        dst_msg->uuid[1] = src_msg->uuid[1];
+    }
+
+    memcpy(dst_ctx->rx + sizeof(struct ffa_part_msg_rxtx_1_2),
+           src_ctx->tx + src_msg->msg_offset, src_msg->msg_size);
 
     /* receiver rx buffer will be released by the receiver*/
 
@@ -175,11 +197,17 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *regs)
 {
     struct domain *src_d = current->domain;
     struct ffa_ctx *src_ctx = src_d->arch.tee;
-    struct ffa_part_msg_rxtx src_msg;
+    /*
+     * src_msg is interpreted as v1.2 header, but:
+     * - for v1.1 guests, uuid[] is ignored and may contain payload bytes
+     * - for v1.2 guests, uuid[] carries the FF-A v1.2 UUID fields
+     */
+    struct ffa_part_msg_rxtx_1_2 src_msg;
     uint16_t dst_id, src_id;
     int32_t ret;
 
-    BUILD_BUG_ON(sizeof(struct ffa_part_msg_rxtx) >= FFA_PAGE_SIZE);
+    BUILD_BUG_ON(sizeof(struct ffa_part_msg_rxtx_1_1) >= FFA_PAGE_SIZE);
+    BUILD_BUG_ON(sizeof(struct ffa_part_msg_rxtx_1_2) >= FFA_PAGE_SIZE);
 
     if ( !spin_trylock(&src_ctx->tx_lock) )
         return FFA_RET_BUSY;
@@ -190,14 +218,15 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *regs)
     src_id = src_msg.send_recv_id >> 16;
     dst_id = src_msg.send_recv_id & GENMASK(15,0);
 
-    if ( src_id != ffa_get_vm_id(src_d) )
+    if ( src_id != ffa_get_vm_id(src_d) ||
+         dst_id == ffa_get_vm_id(src_d) )
     {
         ret = FFA_RET_INVALID_PARAMETERS;
         goto out;
     }
 
     /* check source message fits in buffer */
-    if ( src_msg.msg_offset < sizeof(struct ffa_part_msg_rxtx) ||
+    if ( src_msg.msg_offset < sizeof(struct ffa_part_msg_rxtx_1_1) ||
             src_msg.msg_size == 0 ||
             src_msg.msg_offset > src_ctx->page_count * FFA_PAGE_SIZE ||
             src_msg.msg_size > (src_ctx->page_count * FFA_PAGE_SIZE -
@@ -222,7 +251,7 @@ int32_t ffa_handle_msg_send2(struct cpu_user_regs *regs)
     else if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) )
     {
         /* Message for a VM */
-        ret = ffa_msg_send2_vm(dst_id, src_ctx->tx, &src_msg);
+        ret = ffa_msg_send2_vm(src_ctx, dst_id, &src_msg);
     }
     else
         ret = FFA_RET_INVALID_PARAMETERS;
-- 
2.51.2



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Subject: [PATCH 00/10] xen/arm: ffa: FF-A v1.2 support
Date: Thu, 27 Nov 2025 16:51:42 +0100
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This series updates Xen’s FF-A mediator on Arm to implement the FF-A
v1.2 interface while keeping existing v1.0/v1.1 guests working.

Patches 1–5 rework the low-level plumbing:

  1) add the FF-A v1.2 function IDs and probe the new ABIs
  2) track per-VM FFA_VERSION state and enforce negotiation
  3) harden RX/TX mapping and validation
  4) rework SPMC RX/TX buffer management so access is serialized and
     RX buffers are always released back to the SPMC
  5) switch the mediator to spec-compliant signed 32-bit status codes

Patches 6–9 update the data structures and direct-call paths:

  6) add ffa_uuid helpers and rework partition-info handling
  7) refactor direct requests via a common RUN/direct completion helper
  8) add the v1.1/v1.2 SEND2 header layout
  9) add MSG_SEND_DIRECT_REQ2/RESP2 support and marshal the extended
     register set for v1.2 guests

Patch 10 tightens the dispatcher and advertises FF-A v1.2 only to guests
that negotiated v1.2:

  - reject SMCCC64 calls from AArch32 guests
  - expose the new FIDs and RX/TX capacity fields
  - bump Xen's FF-A version to 1.2 once the implementation is complete

v1.0/v1.1 guests continue to use the v1.1 ABI without behaviour changes,
while v1.2 guests can negotiate the wider ABI and use RUN, SEND2, and
DIRECT_REQ2/RESP2 with the extended register set.

This serie was validated through gitlab-ci here:
https://gitlab.com/xen-project/people/bmarquis/xen-ffa-research/-/tree/ffa-v1.2/v0?ref_type=heads

Bertrand Marquis (10):
  xen/arm: ffa: add FF-A v1.2 function IDs
  xen/arm: ffa: per-VM FFA_VERSION negotiation state
  xen/arm: ffa: harden RX/TX mapping
  xen/arm: ffa: rework SPMC RX/TX buffer management
  xen/arm: ffa: use signed 32-bit status codes
  xen/arm: ffa: add UUID helpers for partition info
  xen/arm: ffa: refactor direct requests via RUN helper
  xen/arm: ffa: add v1.2 SEND2 header layout
  xen/arm: ffa: add MSG_SEND_DIRECT_REQ2 support
  xen/arm: ffa: advertise FF-A v1.2

 xen/arch/arm/include/asm/tee/ffa.h |   2 +-
 xen/arch/arm/tee/ffa.c             | 205 +++++++++++++++++-------
 xen/arch/arm/tee/ffa_msg.c         | 203 ++++++++++++++++++-----
 xen/arch/arm/tee/ffa_notif.c       |   6 +-
 xen/arch/arm/tee/ffa_partinfo.c    | 248 ++++++++++++++++++-----------
 xen/arch/arm/tee/ffa_private.h     | 129 ++++++++++-----
 xen/arch/arm/tee/ffa_rxtx.c        | 160 +++++++++++++++----
 xen/arch/arm/tee/ffa_shm.c         |  30 ++--
 8 files changed, 697 insertions(+), 286 deletions(-)

-- 
2.51.2



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From: Bertrand Marquis 
To: xen-devel@lists.xenproject.org
Cc: jens.wiklander@linaro.org,
	Volodymyr Babchuk ,
	Stefano Stabellini ,
	Julien Grall ,
	Michal Orzel 
Subject: [PATCH 09/10] xen/arm: ffa: add MSG_SEND_DIRECT_REQ2 support
Date: Thu, 27 Nov 2025 16:51:40 +0100
Message-ID: <06eae7d0caaf5379086d9a2efde8489448f14f39.1764254975.git.bertrand.marquis@arm.com>
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Extend the direct-request path so FF-A v1.2 guests can issue
FFA_MSG_SEND_DIRECT_REQ2 and receive the matching RESP2.

The handler now marshals registers x8–x17, and
ffa_finish_direct_req_run() copies back the 17-register response used by
FFA_MSG_SEND_DIRECT_RESP2. The new opcode is exposed via FFA_FEATURES
and gated on guests that negotiated v1.2.

Signed-off-by: Bertrand Marquis 
---
 xen/arch/arm/tee/ffa.c     | 20 +++++++++++++++++++
 xen/arch/arm/tee/ffa_msg.c | 39 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 59 insertions(+)

diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c
index 92cb6ad7ec97..8b2f042287fc 100644
--- a/xen/arch/arm/tee/ffa.c
+++ b/xen/arch/arm/tee/ffa.c
@@ -234,6 +234,8 @@ out_continue:
 static void handle_features(struct cpu_user_regs *regs)
 {
     uint32_t a1 = get_user_reg(regs, 1);
+    struct domain *d = current->domain;
+    struct ffa_ctx *ctx = d->arch.tee;
     unsigned int n;
 
     for ( n = 2; n <= 7; n++ )
@@ -262,6 +264,16 @@ static void handle_features(struct cpu_user_regs *regs)
     case FFA_MSG_SEND2:
         ffa_set_regs_success(regs, 0, 0);
         break;
+    case FFA_MSG_SEND_DIRECT_REQ2:
+        if ( ctx->guest_vers >= FFA_VERSION_1_2 )
+        {
+            ffa_set_regs_success(regs, 0, 0);
+        }
+        else
+        {
+            ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED);
+        }
+        break;
     case FFA_MEM_SHARE_64:
     case FFA_MEM_SHARE_32:
         /*
@@ -347,6 +359,14 @@ static bool ffa_handle_call(struct cpu_user_regs *regs)
     case FFA_MSG_SEND_DIRECT_REQ_64:
         ffa_handle_msg_send_direct_req(regs, fid);
         return true;
+    case FFA_MSG_SEND_DIRECT_REQ2:
+        if ( ctx->guest_vers >= FFA_VERSION_1_2 )
+        {
+            ffa_handle_msg_send_direct_req(regs, fid);
+            return true;
+        }
+        e = FFA_RET_NOT_SUPPORTED;
+        break;
     case FFA_RUN:
         ffa_handle_run(regs, fid);
         return true;
diff --git a/xen/arch/arm/tee/ffa_msg.c b/xen/arch/arm/tee/ffa_msg.c
index 472bfad79dd3..1f42aae1e0b6 100644
--- a/xen/arch/arm/tee/ffa_msg.c
+++ b/xen/arch/arm/tee/ffa_msg.c
@@ -49,6 +49,30 @@ static void ffa_finish_direct_req_run(struct cpu_user_regs *regs,
     case FFA_MSG_YIELD:
     case FFA_INTERRUPT:
         break;
+    case FFA_MSG_SEND_DIRECT_RESP2:
+        /*
+         * REQ2 / RESP2 use a 17-register payload (x1–x17). Copy all of them
+         * back to the guest context.
+         */
+        set_user_reg(regs, 0, resp.a0);
+        set_user_reg(regs, 1, resp.a1);
+        set_user_reg(regs, 2, resp.a2);
+        set_user_reg(regs, 3, resp.a3);
+        set_user_reg(regs, 4, resp.a4);
+        set_user_reg(regs, 5, resp.a5);
+        set_user_reg(regs, 6, resp.a6);
+        set_user_reg(regs, 7, resp.a7);
+        set_user_reg(regs, 8, resp.a8);
+        set_user_reg(regs, 9, resp.a9);
+        set_user_reg(regs, 10, resp.a10);
+        set_user_reg(regs, 11, resp.a11);
+        set_user_reg(regs, 12, resp.a12);
+        set_user_reg(regs, 13, resp.a13);
+        set_user_reg(regs, 14, resp.a14);
+        set_user_reg(regs, 15, resp.a15);
+        set_user_reg(regs, 16, resp.a16);
+        set_user_reg(regs, 17, resp.a17);
+        return;
     default:
         /* Bad fid, report back to the caller. */
         ffa_set_regs_error(regs, FFA_RET_ABORTED);
@@ -107,6 +131,21 @@ void ffa_handle_msg_send_direct_req(struct cpu_user_regs *regs, uint32_t fid)
     arg.a6 = get_user_reg(regs, 6) & mask;
     arg.a7 = get_user_reg(regs, 7) & mask;
 
+    if ( fid == FFA_MSG_SEND_DIRECT_REQ2 )
+    {
+        /* 17 registers are used for REQ2 */
+        arg.a8 = get_user_reg(regs, 8);
+        arg.a9 = get_user_reg(regs, 9);
+        arg.a10 = get_user_reg(regs, 10);
+        arg.a11 = get_user_reg(regs, 11);
+        arg.a12 = get_user_reg(regs, 12);
+        arg.a13 = get_user_reg(regs, 13);
+        arg.a14 = get_user_reg(regs, 14);
+        arg.a15 = get_user_reg(regs, 15);
+        arg.a16 = get_user_reg(regs, 16);
+        arg.a17 = get_user_reg(regs, 17);
+    }
+
     ffa_finish_direct_req_run(regs, &arg);
     return;
 
-- 
2.51.2



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From: Bertrand Marquis 
To: "xen-devel@lists.xenproject.org" 
CC: "jens.wiklander@linaro.org" 
Subject: Re: [PATCH 00/10] xen/arm: ffa: FF-A v1.2 support
Thread-Topic: [PATCH 00/10] xen/arm: ffa: FF-A v1.2 support
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Message-ID: <2671e43a-a9f0-42cd-8764-4274c14a86ec@gmail.com>
Date: Thu, 27 Nov 2025 17:25:31 +0100
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User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH 3/3] x86/amd: Drop the cpuid_mask_* command line options
To: Andrew Cooper ,
 Xen-devel 
Cc: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 
References: <20251126171539.890253-1-andrew.cooper3@citrix.com>
 <20251126171539.890253-4-andrew.cooper3@citrix.com>
Content-Language: en-US
From: Oleksii Kurochko 
In-Reply-To: <20251126171539.890253-4-andrew.cooper3@citrix.com>
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On 11/26/25 6:15 PM, Andrew Cooper wrote:
> As noted in the command line documentation, these are both deprecated since
> Xen 4.7 (2016), and are not fully effective on AMD CPUs starting from 2011.
>
> Not realised at the time of writing the docs was that their use is also
> incompatible with certain errata workarounds which edit the CPUID MSRs after
> the levelling defaults are calculated.
>
> Signed-off-by: Andrew Cooper 
> ---
> CC: Jan Beulich 
> CC: Roger Pau Monné 
> CC: Oleksii Kurochko 
> ---
>   CHANGELOG.md                      |   4 ++

for CHANGELOG.md:

Acked-by: Oleksii Kurochko 

Thanks.

~ Oleksii



>   docs/misc/xen-command-line.pandoc |  40 ------------
>   xen/arch/x86/cpu/amd.c            | 104 ------------------------------
>   xen/arch/x86/include/asm/amd.h    |  90 --------------------------
>   4 files changed, 4 insertions(+), 234 deletions(-)
>
> diff --git a/CHANGELOG.md b/CHANGELOG.md
> index adaad5ee8923..3aaf5986231c 100644
> --- a/CHANGELOG.md
> +++ b/CHANGELOG.md
> @@ -11,6 +11,10 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
>   ### Added
>   
>   ### Removed
> + - On x86:
> +   - The cpuid_mask_* command line options for legacy AMD CPUs.  These were
> +     deprecated in Xen 4.7 and noted not to work correctly with AMD CPUs from
> +     2011 onwards.
>   
>   ## [4.21.0](https://xenbits.xenproject.org/gitweb/?p=xen.git;a=shortlog;h=RELEASE-4.21.0) - 2025-11-19
>   
> diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
> index 34004ce282be..e92b6d55b556 100644
> --- a/docs/misc/xen-command-line.pandoc
> +++ b/docs/misc/xen-command-line.pandoc
> @@ -587,46 +587,6 @@ applicable.  They can all be ignored.
>       in its positive form to override Xen's default behaviour on these systems,
>       and make the feature fully usable.
>   
> -### cpuid_mask_cpu
> -> `= fam_0f_rev_[cdefg] | fam_10_rev_[bc] | fam_11_rev_b`
> -
> -> Applicability: AMD
> -
> -If none of the other **cpuid_mask_\*** options are given, Xen has a set of
> -pre-configured masks to make the current processor appear to be
> -family/revision specified.
> -
> -See below for general information on masking.
> -
> -**Warning: This option is not fully effective on Family 15h processors or
> -later.**
> -
> -### cpuid_mask_ecx
> -### cpuid_mask_edx
> -### cpuid_mask_ext_ecx
> -### cpuid_mask_ext_edx
> -### cpuid_mask_l7s0_eax
> -### cpuid_mask_l7s0_ebx
> -### cpuid_mask_thermal_ecx
> -### cpuid_mask_xsave_eax
> -> `= `
> -
> -> Applicability: x86.  Default: `~0` (all bits set)
> -
> -The availability of these options are model specific.  Some processors don't
> -support any of them, and no processor supports all of them.  Xen will ignore
> -options on processors which are lacking support.
> -
> -These options can be used to alter the features visible via the `CPUID`
> -instruction.  Settings applied here take effect globally, including for Xen
> -and all guests.
> -
> -Note: Since Xen 4.7, it is no longer necessary to mask a host to create
> -migration safety in heterogeneous scenarios.  All necessary CPUID settings
> -should be provided in the VM configuration file.  Furthermore, it is
> -recommended not to use this option, as doing so causes an unnecessary
> -reduction of features at Xen's disposal to manage guests.
> -
>   ### cpuidle (x86)
>   > `= `
>   
> diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
> index a32e5fa208d5..2b5aa07a4a13 100644
> --- a/xen/arch/x86/cpu/amd.c
> +++ b/xen/arch/x86/cpu/amd.c
> @@ -20,32 +20,6 @@
>   
>   #include "cpu.h"
>   
> -/*
> - * Pre-canned values for overriding the CPUID features
> - * and extended features masks.
> - *
> - * Currently supported processors:
> - *
> - * "fam_0f_rev_c"
> - * "fam_0f_rev_d"
> - * "fam_0f_rev_e"
> - * "fam_0f_rev_f"
> - * "fam_0f_rev_g"
> - * "fam_10_rev_b"
> - * "fam_10_rev_c"
> - * "fam_11_rev_b"
> - */
> -static char __initdata opt_famrev[14];
> -string_param("cpuid_mask_cpu", opt_famrev);
> -
> -static unsigned int __initdata opt_cpuid_mask_l7s0_eax = ~0u;
> -integer_param("cpuid_mask_l7s0_eax", opt_cpuid_mask_l7s0_eax);
> -static unsigned int __initdata opt_cpuid_mask_l7s0_ebx = ~0u;
> -integer_param("cpuid_mask_l7s0_ebx", opt_cpuid_mask_l7s0_ebx);
> -
> -static unsigned int __initdata opt_cpuid_mask_thermal_ecx = ~0u;
> -integer_param("cpuid_mask_thermal_ecx", opt_cpuid_mask_thermal_ecx);
> -
>   /* 1 = allow, 0 = don't allow guest creation, -1 = don't allow boot */
>   int8_t __read_mostly opt_allow_unsafe;
>   boolean_param("allow_unsafe", opt_allow_unsafe);
> @@ -114,51 +88,6 @@ static void wrmsr_amd(unsigned int msr, uint64_t val)
>   		     "d" (val >> 32), "D" (0x9c5a203a));
>   }
>   
> -static const struct cpuidmask {
> -	uint16_t fam;
> -	char rev[2];
> -	unsigned int ecx, edx, ext_ecx, ext_edx;
> -} pre_canned[] __initconst = {
> -#define CAN(fam, id, rev) { \
> -		fam, #rev, \
> -		AMD_FEATURES_##id##_REV_##rev##_ECX, \
> -		AMD_FEATURES_##id##_REV_##rev##_EDX, \
> -		AMD_EXTFEATURES_##id##_REV_##rev##_ECX, \
> -		AMD_EXTFEATURES_##id##_REV_##rev##_EDX \
> -	}
> -#define CAN_FAM(fam, rev) CAN(0x##fam, FAM##fam##h, rev)
> -#define CAN_K8(rev)       CAN(0x0f,    K8,          rev)
> -	CAN_FAM(11, B),
> -	CAN_FAM(10, C),
> -	CAN_FAM(10, B),
> -	CAN_K8(G),
> -	CAN_K8(F),
> -	CAN_K8(E),
> -	CAN_K8(D),
> -	CAN_K8(C)
> -#undef CAN
> -};
> -
> -static const struct cpuidmask *__init noinline get_cpuidmask(const char *opt)
> -{
> -	unsigned long fam;
> -	char rev;
> -	unsigned int i;
> -
> -	if (strncmp(opt, "fam_", 4))
> -		return NULL;
> -	fam = simple_strtoul(opt + 4, &opt, 16);
> -	if (strncmp(opt, "_rev_", 5) || !opt[5] || opt[6])
> -		return NULL;
> -	rev = toupper(opt[5]);
> -
> -	for (i = 0; i < ARRAY_SIZE(pre_canned); ++i)
> -		if (fam == pre_canned[i].fam && rev == *pre_canned[i].rev)
> -			return &pre_canned[i];
> -
> -	return NULL;
> -}
> -
>   /*
>    * Sets caps in expected_levelling_cap, probes for the specified mask MSR, and
>    * set caps in levelling_caps if it is found.  Processors prior to Fam 10h
> @@ -295,8 +224,6 @@ static const typeof(ctxt_switch_masking) __initconst_cf_clobber __used csm =
>    */
>   static void __init noinline amd_init_levelling(void)
>   {
> -	const struct cpuidmask *m = NULL;
> -
>   	/*
>   	 * If there's support for CpuidUserDis or CPUID faulting then
>   	 * we can skip levelling because CPUID accesses are trapped anyway.
> @@ -318,26 +245,11 @@ static void __init noinline amd_init_levelling(void)
>   
>   	probe_masking_msrs();
>   
> -	if (*opt_famrev != '\0') {
> -		m = get_cpuidmask(opt_famrev);
> -
> -		if (!m)
> -			printk("Invalid processor string: %s\n", opt_famrev);
> -	}
> -
>   	if ((levelling_caps & LCAP_1cd) == LCAP_1cd) {
>   		uint32_t ecx, edx, tmp;
>   
>   		cpuid(0x00000001, &tmp, &tmp, &ecx, &edx);
>   
> -		if (~(opt_cpuid_mask_ecx & opt_cpuid_mask_edx)) {
> -			ecx &= opt_cpuid_mask_ecx;
> -			edx &= opt_cpuid_mask_edx;
> -		} else if (m) {
> -			ecx &= m->ecx;
> -			edx &= m->edx;
> -		}
> -
>   		/* Fast-forward bits - Must be set. */
>   		if (ecx & cpufeat_mask(X86_FEATURE_XSAVE))
>   			ecx |= cpufeat_mask(X86_FEATURE_OSXSAVE);
> @@ -351,14 +263,6 @@ static void __init noinline amd_init_levelling(void)
>   
>   		cpuid(0x80000001, &tmp, &tmp, &ecx, &edx);
>   
> -		if (~(opt_cpuid_mask_ext_ecx & opt_cpuid_mask_ext_edx)) {
> -			ecx &= opt_cpuid_mask_ext_ecx;
> -			edx &= opt_cpuid_mask_ext_edx;
> -		} else if (m) {
> -			ecx &= m->ext_ecx;
> -			edx &= m->ext_edx;
> -		}
> -
>   		/* Fast-forward bits - Must be set. */
>   		edx |= cpufeat_mask(X86_FEATURE_APIC);
>   
> @@ -370,20 +274,12 @@ static void __init noinline amd_init_levelling(void)
>   
>   		cpuid(0x00000007, &eax, &ebx, &tmp, &tmp);
>   
> -		if (~(opt_cpuid_mask_l7s0_eax & opt_cpuid_mask_l7s0_ebx)) {
> -			eax &= opt_cpuid_mask_l7s0_eax;
> -			ebx &= opt_cpuid_mask_l7s0_ebx;
> -		}
> -
>   		cpuidmask_defaults._7ab0 &= ((uint64_t)eax << 32) | ebx;
>   	}
>   
>   	if ((levelling_caps & LCAP_6c) == LCAP_6c) {
>   		uint32_t ecx = cpuid_ecx(6);
>   
> -		if (~opt_cpuid_mask_thermal_ecx)
> -			ecx &= opt_cpuid_mask_thermal_ecx;
> -
>   		cpuidmask_defaults._6c &= (~0ULL << 32) | ecx;
>   	}
>   
> diff --git a/xen/arch/x86/include/asm/amd.h b/xen/arch/x86/include/asm/amd.h
> index 72df42a6f6c9..4036dd549835 100644
> --- a/xen/arch/x86/include/asm/amd.h
> +++ b/xen/arch/x86/include/asm/amd.h
> @@ -7,96 +7,6 @@
>   
>   #include 
>   
> -/* CPUID masked for use by AMD-V Extended Migration */
> -
> -/* Family 0Fh, Revision C */
> -#define AMD_FEATURES_K8_REV_C_ECX  0
> -#define AMD_FEATURES_K8_REV_C_EDX (					     \
> -	cpufeat_mask(X86_FEATURE_FPU)   | cpufeat_mask(X86_FEATURE_VME)    | \
> -	cpufeat_mask(X86_FEATURE_DE)    | cpufeat_mask(X86_FEATURE_PSE)    | \
> -	cpufeat_mask(X86_FEATURE_TSC)   | cpufeat_mask(X86_FEATURE_MSR)    | \
> -	cpufeat_mask(X86_FEATURE_PAE)   | cpufeat_mask(X86_FEATURE_MCE)    | \
> -	cpufeat_mask(X86_FEATURE_CX8)   | cpufeat_mask(X86_FEATURE_APIC)   | \
> -	cpufeat_mask(X86_FEATURE_SEP)   | cpufeat_mask(X86_FEATURE_MTRR)   | \
> -	cpufeat_mask(X86_FEATURE_PGE)   | cpufeat_mask(X86_FEATURE_MCA)    | \
> -	cpufeat_mask(X86_FEATURE_CMOV)  | cpufeat_mask(X86_FEATURE_PAT)    | \
> -	cpufeat_mask(X86_FEATURE_PSE36) | cpufeat_mask(X86_FEATURE_CLFLUSH)| \
> -	cpufeat_mask(X86_FEATURE_MMX)   | cpufeat_mask(X86_FEATURE_FXSR)   | \
> -	cpufeat_mask(X86_FEATURE_SSE)   | cpufeat_mask(X86_FEATURE_SSE2))
> -#define AMD_EXTFEATURES_K8_REV_C_ECX  0
> -#define AMD_EXTFEATURES_K8_REV_C_EDX  (					       \
> -	cpufeat_mask(X86_FEATURE_FPU)	   | cpufeat_mask(X86_FEATURE_VME)   | \
> -	cpufeat_mask(X86_FEATURE_DE)	   | cpufeat_mask(X86_FEATURE_PSE)   | \
> -	cpufeat_mask(X86_FEATURE_TSC)	   | cpufeat_mask(X86_FEATURE_MSR)   | \
> -	cpufeat_mask(X86_FEATURE_PAE)	   | cpufeat_mask(X86_FEATURE_MCE)   | \
> -	cpufeat_mask(X86_FEATURE_CX8)	   | cpufeat_mask(X86_FEATURE_APIC)  | \
> -	cpufeat_mask(X86_FEATURE_SYSCALL)  | cpufeat_mask(X86_FEATURE_MTRR)  | \
> -	cpufeat_mask(X86_FEATURE_PGE)	   | cpufeat_mask(X86_FEATURE_MCA)   | \
> -	cpufeat_mask(X86_FEATURE_CMOV)	   | cpufeat_mask(X86_FEATURE_PAT)   | \
> -	cpufeat_mask(X86_FEATURE_PSE36)	   | cpufeat_mask(X86_FEATURE_NX)    | \
> -	cpufeat_mask(X86_FEATURE_MMXEXT)   | cpufeat_mask(X86_FEATURE_MMX)   | \
> -	cpufeat_mask(X86_FEATURE_FXSR)	   | cpufeat_mask(X86_FEATURE_LM)    | \
> -	cpufeat_mask(X86_FEATURE_3DNOWEXT) | cpufeat_mask(X86_FEATURE_3DNOW))
> -
> -/* Family 0Fh, Revision D */
> -#define AMD_FEATURES_K8_REV_D_ECX         AMD_FEATURES_K8_REV_C_ECX
> -#define AMD_FEATURES_K8_REV_D_EDX         AMD_FEATURES_K8_REV_C_EDX
> -#define AMD_EXTFEATURES_K8_REV_D_ECX     (AMD_EXTFEATURES_K8_REV_C_ECX |\
> -	cpufeat_mask(X86_FEATURE_LAHF_LM))
> -#define AMD_EXTFEATURES_K8_REV_D_EDX     (AMD_EXTFEATURES_K8_REV_C_EDX |\
> -	cpufeat_mask(X86_FEATURE_FFXSR))
> -
> -/* Family 0Fh, Revision E */
> -#define AMD_FEATURES_K8_REV_E_ECX        (AMD_FEATURES_K8_REV_D_ECX |	\
> -	cpufeat_mask(X86_FEATURE_SSE3))
> -#define AMD_FEATURES_K8_REV_E_EDX        (AMD_FEATURES_K8_REV_D_EDX | 	\
> -	cpufeat_mask(X86_FEATURE_HTT))
> -#define AMD_EXTFEATURES_K8_REV_E_ECX     (AMD_EXTFEATURES_K8_REV_D_ECX |\
> -	cpufeat_mask(X86_FEATURE_CMP_LEGACY))
> -#define AMD_EXTFEATURES_K8_REV_E_EDX      AMD_EXTFEATURES_K8_REV_D_EDX
> -
> -/* Family 0Fh, Revision F */
> -#define AMD_FEATURES_K8_REV_F_ECX        (AMD_FEATURES_K8_REV_E_ECX | 	\
> -	cpufeat_mask(X86_FEATURE_CX16))
> -#define AMD_FEATURES_K8_REV_F_EDX         AMD_FEATURES_K8_REV_E_EDX
> -#define AMD_EXTFEATURES_K8_REV_F_ECX     (AMD_EXTFEATURES_K8_REV_E_ECX |\
> -	cpufeat_mask(X86_FEATURE_SVM) | cpufeat_mask(X86_FEATURE_EXTAPIC) | \
> -	cpufeat_mask(X86_FEATURE_CR8_LEGACY))
> -#define AMD_EXTFEATURES_K8_REV_F_EDX     (AMD_EXTFEATURES_K8_REV_E_EDX |\
> -	cpufeat_mask(X86_FEATURE_RDTSCP))
> -
> -/* Family 0Fh, Revision G */
> -#define AMD_FEATURES_K8_REV_G_ECX         AMD_FEATURES_K8_REV_F_ECX
> -#define AMD_FEATURES_K8_REV_G_EDX         AMD_FEATURES_K8_REV_F_EDX
> -#define AMD_EXTFEATURES_K8_REV_G_ECX     (AMD_EXTFEATURES_K8_REV_F_ECX |\
> -	cpufeat_mask(X86_FEATURE_3DNOWPREFETCH))
> -#define AMD_EXTFEATURES_K8_REV_G_EDX      AMD_EXTFEATURES_K8_REV_F_EDX
> -
> -/* Family 10h, Revision B */
> -#define AMD_FEATURES_FAM10h_REV_B_ECX    (AMD_FEATURES_K8_REV_F_ECX | 	\
> -	cpufeat_mask(X86_FEATURE_POPCNT) | cpufeat_mask(X86_FEATURE_MONITOR))
> -#define AMD_FEATURES_FAM10h_REV_B_EDX     AMD_FEATURES_K8_REV_F_EDX
> -#define AMD_EXTFEATURES_FAM10h_REV_B_ECX (AMD_EXTFEATURES_K8_REV_F_ECX |\
> -	cpufeat_mask(X86_FEATURE_ABM) | cpufeat_mask(X86_FEATURE_SSE4A) | \
> -	cpufeat_mask(X86_FEATURE_MISALIGNSSE) | cpufeat_mask(X86_FEATURE_OSVW) |\
> -	cpufeat_mask(X86_FEATURE_IBS))
> -#define AMD_EXTFEATURES_FAM10h_REV_B_EDX (AMD_EXTFEATURES_K8_REV_F_EDX |\
> -	cpufeat_mask(X86_FEATURE_PAGE1GB))
> -
> -/* Family 10h, Revision C */
> -#define AMD_FEATURES_FAM10h_REV_C_ECX     AMD_FEATURES_FAM10h_REV_B_ECX
> -#define AMD_FEATURES_FAM10h_REV_C_EDX     AMD_FEATURES_FAM10h_REV_B_EDX
> -#define AMD_EXTFEATURES_FAM10h_REV_C_ECX (AMD_EXTFEATURES_FAM10h_REV_B_ECX |\
> -	cpufeat_mask(X86_FEATURE_SKINIT) | cpufeat_mask(X86_FEATURE_WDT))
> -#define AMD_EXTFEATURES_FAM10h_REV_C_EDX  AMD_EXTFEATURES_FAM10h_REV_B_EDX
> -
> -/* Family 11h, Revision B */
> -#define AMD_FEATURES_FAM11h_REV_B_ECX     AMD_FEATURES_K8_REV_G_ECX
> -#define AMD_FEATURES_FAM11h_REV_B_EDX     AMD_FEATURES_K8_REV_G_EDX
> -#define AMD_EXTFEATURES_FAM11h_REV_B_ECX (AMD_EXTFEATURES_K8_REV_G_ECX |\
> -	cpufeat_mask(X86_FEATURE_SKINIT))
> -#define AMD_EXTFEATURES_FAM11h_REV_B_EDX  AMD_EXTFEATURES_K8_REV_G_EDX
> -
>   /* AMD errata checking
>    *
>    * Errata are defined using the AMD_LEGACY_ERRATUM() or AMD_OSVW_ERRATUM()


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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk ,
	Andrew Cooper ,
	Anthony PERARD ,
	Jan Beulich ,
	Timothy Pearson ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Oleksii Kurochko 
Subject: [PATCH v3] xen/domain: introduce generic functions for domain struct allocation and freeing
Date: Thu, 27 Nov 2025 17:26:05 +0100
Message-ID: <0a66c71356e8d6ea788022438d7a73dbff8aa5b9.1764243466.git.oleksii.kurochko@gmail.com>
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From: Roger Pau Monne 

Move x86's free_domain_struct() to common code since it is shared between
architectures.

Move the x86 version of alloc_domain_struct() to common code as most of the
logic is architecture-independent. To handle the remaining architectural
differences, introduce arch_domain_struct_memflags() for x86-specific
allocation requirements.

No functional change.

Suggested-by: Jan Beulich 
[Introduce an arch-specific function instead of using a weak function]
Signed-off-by: Roger Pau Monné 
Signed-off-by: Oleksii Kurochko 
---
Changes in v3:
 - s/arch_alloc_domain_struct_bits/arch_domain_struct_memflags.
 - Make x86's arch_domain_struct_memflags() to return MEMF_bits(bits) instead
   of bits.
 - Move "#define arch_domain_struct_memflags arch_domain_struct_memflags"
   and declaration of arch_domain_struct_memflags() from x86/asm/pv/domain.h
   to x86/domain.h.
 - Update alloc_domain_struct() to work with arch_domain_struct_memflags().
 - s/Suggested-By/Suggested-by.
 - CI tests: https://gitlab.com/xen-project/people/olkur/xen/-/pipelines/2182821111
---
Changes in v2:
- Introduce an arch-specific function to handle differences between arch-es
  in domain structure allocation requirements, instead of relying on a weak
  function.
- Move free_domain_struct() to common code.
- Add Suggested-by: Jan Beulich .
- Update the commit message.
- Link to original patch:
  https://lore.kernel.org/xen-devel/c08595dd7940b44a1392e16d4a2035b95b5c580b.1749829230.git.oleksii.kurochko@gmail.com/
---
 xen/arch/arm/domain.c             | 17 -----------------
 xen/arch/ppc/stubs.c              | 10 ----------
 xen/arch/riscv/stubs.c            | 10 ----------
 xen/arch/x86/domain.c             | 15 ++-------------
 xen/arch/x86/include/asm/domain.h |  3 +++
 xen/common/domain.c               | 22 ++++++++++++++++++++++
 6 files changed, 27 insertions(+), 50 deletions(-)

diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
index ab78444335..3e3a1fb9f5 100644
--- a/xen/arch/arm/domain.c
+++ b/xen/arch/arm/domain.c
@@ -480,23 +480,6 @@ void startup_cpu_idle_loop(void)
     reset_stack_and_jump(idle_loop);
 }
 
-struct domain *alloc_domain_struct(void)
-{
-    struct domain *d;
-    BUILD_BUG_ON(sizeof(*d) > PAGE_SIZE);
-    d = alloc_xenheap_pages(0, 0);
-    if ( d == NULL )
-        return NULL;
-
-    clear_page(d);
-    return d;
-}
-
-void free_domain_struct(struct domain *d)
-{
-    free_xenheap_page(d);
-}
-
 void dump_pageframe_info(struct domain *d)
 {
 
diff --git a/xen/arch/ppc/stubs.c b/xen/arch/ppc/stubs.c
index 75ebcae5e2..9953ea1c6c 100644
--- a/xen/arch/ppc/stubs.c
+++ b/xen/arch/ppc/stubs.c
@@ -147,11 +147,6 @@ void startup_cpu_idle_loop(void)
     BUG_ON("unimplemented");
 }
 
-void free_domain_struct(struct domain *d)
-{
-    BUG_ON("unimplemented");
-}
-
 void dump_pageframe_info(struct domain *d)
 {
     BUG_ON("unimplemented");
@@ -269,11 +264,6 @@ void vcpu_kick(struct vcpu *v)
     BUG_ON("unimplemented");
 }
 
-struct domain *alloc_domain_struct(void)
-{
-    BUG_ON("unimplemented");
-}
-
 struct vcpu *alloc_vcpu_struct(const struct domain *d)
 {
     BUG_ON("unimplemented");
diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c
index 340ed3cd6c..fe7d85ee1d 100644
--- a/xen/arch/riscv/stubs.c
+++ b/xen/arch/riscv/stubs.c
@@ -121,11 +121,6 @@ void startup_cpu_idle_loop(void)
     BUG_ON("unimplemented");
 }
 
-void free_domain_struct(struct domain *d)
-{
-    BUG_ON("unimplemented");
-}
-
 void dump_pageframe_info(struct domain *d)
 {
     BUG_ON("unimplemented");
@@ -243,11 +238,6 @@ void vcpu_kick(struct vcpu *v)
     BUG_ON("unimplemented");
 }
 
-struct domain *alloc_domain_struct(void)
-{
-    BUG_ON("unimplemented");
-}
-
 struct vcpu *alloc_vcpu_struct(const struct domain *d)
 {
     BUG_ON("unimplemented");
diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index 3a21e035f4..42643c8813 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -463,10 +463,8 @@ void domain_cpu_policy_changed(struct domain *d)
     }
 }
 
-struct domain *alloc_domain_struct(void)
+unsigned int arch_domain_struct_memflags(void)
 {
-    struct domain *d;
-
     /*
      * Without CONFIG_BIGMEM, we pack the PDX of the domain structure into
      * a 32-bit field within the page_info structure. Hence the MEMF_bits()
@@ -492,16 +490,7 @@ struct domain *alloc_domain_struct(void)
                 - 1;
 #endif
 
-    BUILD_BUG_ON(sizeof(*d) > PAGE_SIZE);
-    d = alloc_xenheap_pages(0, MEMF_bits(bits));
-    if ( d != NULL )
-        clear_page(d);
-    return d;
-}
-
-void free_domain_struct(struct domain *d)
-{
-    free_xenheap_page(d);
+    return MEMF_bits(bits);
 }
 
 struct vcpu *alloc_vcpu_struct(const struct domain *d)
diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/domain.h
index 5df8c78253..386ec61745 100644
--- a/xen/arch/x86/include/asm/domain.h
+++ b/xen/arch/x86/include/asm/domain.h
@@ -12,6 +12,9 @@
 #include 
 #include 
 
+unsigned int arch_domain_struct_memflags(void);
+#define arch_domain_struct_memflags arch_domain_struct_memflags
+
 #define has_32bit_shinfo(d)    ((d)->arch.has_32bit_shinfo)
 
 /*
diff --git a/xen/common/domain.c b/xen/common/domain.c
index 3b6e9471c4..2e8d74cbd9 100644
--- a/xen/common/domain.c
+++ b/xen/common/domain.c
@@ -799,6 +799,28 @@ static int sanitise_domain_config(struct xen_domctl_createdomain *config)
     return arch_sanitise_domain_config(config);
 }
 
+struct domain *alloc_domain_struct(void)
+{
+#ifndef arch_domain_struct_memflags
+# define arch_domain_struct_memflags() 0
+#endif
+
+    struct domain *d;
+
+    BUILD_BUG_ON(sizeof(*d) > PAGE_SIZE);
+
+    d = alloc_xenheap_pages(0, arch_domain_struct_memflags());
+    if ( d != NULL )
+        clear_page(d);
+
+    return d;
+}
+
+void free_domain_struct(struct domain *d)
+{
+    free_xenheap_page(d);
+}
+
 struct domain *domain_create(domid_t domid,
                              struct xen_domctl_createdomain *config,
                              unsigned int flags)
-- 
2.52.0



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk 
Subject: [PATCH v2 1/2] xen/dom0less: move make_chosen_node() to common code
Date: Thu, 27 Nov 2025 17:26:15 +0100
Message-ID: <84178652f3cd60303ac1e81f36f852bc685e0ba4.1764260246.git.oleksii.kurochko@gmail.com>
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The current implementation of make_chosen_node() does not contain any
architecture-specific logic. Therefore, move it from arch-specific
files to common code.

At this stage, there is no need to introduce an arch_make_chosen_node(),
as no architecture-specific customization is required.

This change avoids duplication and simplifies future maintenance for
architectures like RISC-V and ARM.

Signed-off-by: Oleksii Kurochko 
---
Changes in v2:
 - Rebase the patch on top of current staging:
   s/struct bootmodule/struct boot_module
   s/kinfo->cmdline/kinfo->bd.cmdline
   s/kinfo->initrd_bootmodule/kinfo->bd.initrd
 - Update the comment above make_chosen_node:
   ... on ACPI systems (on platform where CONFIG_ACPI=y) ...
 - Move make_chosen_node() to common/domain-build.c as it could be used
   not only for dom0less.
 - Based on the previous review it should be added:
     Reviewed-by: Michal Orzel bd.initrd;
-    void *fdt = kinfo->fdt;
-
-    dt_dprintk("Create chosen node\n");
-    res = fdt_begin_node(fdt, "chosen");
-    if ( res )
-        return res;
-
-    if ( kinfo->bd.cmdline && kinfo->bd.cmdline[0] )
-    {
-        bootargs = &kinfo->bd.cmdline[0];
-        res = fdt_property(fdt, "bootargs", bootargs, strlen(bootargs) + 1);
-        if ( res )
-           return res;
-    }
-
-    /*
-     * If the bootloader provides an initrd, we must create a placeholder
-     * for the initrd properties. The values will be replaced later.
-     */
-    if ( initrd && initrd->size )
-    {
-        u64 a = 0;
-        res = fdt_property(kinfo->fdt, "linux,initrd-start", &a, sizeof(a));
-        if ( res )
-            return res;
-
-        res = fdt_property(kinfo->fdt, "linux,initrd-end", &a, sizeof(a));
-        if ( res )
-            return res;
-    }
-
-    res = fdt_end_node(fdt);
-
-    return res;
-}
-
 static int __init handle_node(struct domain *d, struct kernel_info *kinfo,
                               struct dt_device_node *node,
                               p2m_type_t p2mt)
diff --git a/xen/common/device-tree/domain-build.c b/xen/common/device-tree/domain-build.c
index 95b383e00f..774790aab3 100644
--- a/xen/common/device-tree/domain-build.c
+++ b/xen/common/device-tree/domain-build.c
@@ -405,6 +405,52 @@ void __init initrd_load(struct kernel_info *kinfo,
     iounmap(initrd);
 }
 
+/*
+ * This function is used as part of the device tree generation for Dom0
+ * on ACPI systems (on platform where CONFIG_ACPI=y), and DomUs started
+ * directly from Xen based on device tree information.
+ */
+int __init make_chosen_node(const struct kernel_info *kinfo)
+{
+    int res;
+    const char *bootargs = NULL;
+    const struct boot_module *initrd = kinfo->bd.initrd;
+    void *fdt = kinfo->fdt;
+
+    dt_dprintk("Create chosen node\n");
+    res = fdt_begin_node(fdt, "chosen");
+    if ( res )
+        return res;
+
+    if ( kinfo->bd.cmdline && kinfo->bd.cmdline[0] )
+    {
+        bootargs = &kinfo->bd.cmdline[0];
+        res = fdt_property(fdt, "bootargs", bootargs, strlen(bootargs) + 1);
+        if ( res )
+           return res;
+    }
+
+    /*
+     * If the bootloader provides an initrd, we must create a placeholder
+     * for the initrd properties. The values will be replaced later.
+     */
+    if ( initrd && initrd->size )
+    {
+        u64 a = 0;
+        res = fdt_property(kinfo->fdt, "linux,initrd-start", &a, sizeof(a));
+        if ( res )
+            return res;
+
+        res = fdt_property(kinfo->fdt, "linux,initrd-end", &a, sizeof(a));
+        if ( res )
+            return res;
+    }
+
+    res = fdt_end_node(fdt);
+
+    return res;
+}
+
 /*
  * Local variables:
  * mode: C
-- 
2.52.0



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk 
Subject: [PATCH v2 0/2] common dom0less updates
Date: Thu, 27 Nov 2025 17:26:14 +0100
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Move make_chosen_node() and make_memory_node() to common code.

---
Changes in V2:
 - Link to prev. patch series: https://lore.kernel.org/xen-devel/cover.1747145897.git.oleksii.kurochko@gmail.com/
 - Drop patches:
    - xen: restrict CONFIG_STATIC_MEMORY to ARM
    - xen/dom0less: refactor architecture-specific DomU construction 
   As CONFIG_STATIC_MEMORY stuff was moved to common code.
 - Add new patch which also moves make_memory_node() to common code.
 - All other changes please look at specific patch.
 - CI tests: https://gitlab.com/xen-project/people/olkur/xen/-/pipelines/2183447857
---

Oleksii Kurochko (2):
  xen/dom0less: move make_chosen_node() to common code
  xen/dom0less: move make_memory_node() to common code

 xen/arch/arm/domain_build.c           | 120 -------------------------
 xen/common/device-tree/domain-build.c | 121 ++++++++++++++++++++++++++
 2 files changed, 121 insertions(+), 120 deletions(-)

-- 
2.52.0



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk 
Subject: [PATCH v2 2/2] xen/dom0less: move make_memory_node() to common code
Date: Thu, 27 Nov 2025 17:26:16 +0100
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make_memory_node() does not rely on any Arm-specific functionality and is
fully reused by RISC-V, making it a good candidate to move into common code.

Signed-off-by: Oleksii Kurochko 
---
Changes in v2:
 - New patch
---
 xen/arch/arm/domain_build.c           | 74 --------------------------
 xen/common/device-tree/domain-build.c | 75 +++++++++++++++++++++++++++
 2 files changed, 75 insertions(+), 74 deletions(-)

diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index 6d1c9583b1..986a456f17 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
@@ -646,80 +646,6 @@ static int __init fdt_property_interrupts(const struct kernel_info *kinfo,
     return res;
 }
 
-int __init make_memory_node(const struct kernel_info *kinfo, int addrcells,
-                            int sizecells, const struct membanks *mem)
-{
-    void *fdt = kinfo->fdt;
-    unsigned int i;
-    int res, reg_size = addrcells + sizecells;
-    int nr_cells = 0;
-    __be32 reg[DT_MEM_NODE_REG_RANGE_SIZE];
-    __be32 *cells;
-
-    if ( mem->nr_banks == 0 )
-        return -ENOENT;
-
-    /* find the first memory range that is reserved for device (or firmware) */
-    for ( i = 0; i < mem->nr_banks &&
-                 (mem->bank[i].type != MEMBANK_DEFAULT); i++ )
-        ;
-
-    if ( i == mem->nr_banks )
-        return 0;
-
-    dt_dprintk("Create memory node\n");
-
-    res = domain_fdt_begin_node(fdt, "memory", mem->bank[i].start);
-    if ( res )
-        return res;
-
-    res = fdt_property_string(fdt, "device_type", "memory");
-    if ( res )
-        return res;
-
-    cells = ®[0];
-    for ( ; i < mem->nr_banks; i++ )
-    {
-        u64 start = mem->bank[i].start;
-        u64 size = mem->bank[i].size;
-
-        if ( (mem->bank[i].type == MEMBANK_STATIC_DOMAIN) ||
-             (mem->bank[i].type == MEMBANK_FDT_RESVMEM) )
-            continue;
-
-        nr_cells += reg_size;
-        BUG_ON(nr_cells >= ARRAY_SIZE(reg));
-        dt_child_set_range(&cells, addrcells, sizecells, start, size);
-    }
-
-    /*
-     * static shared memory banks need to be listed as /memory node, so when
-     * this function is handling the normal memory, add the banks.
-     */
-    if ( mem == kernel_info_get_mem_const(kinfo) )
-        shm_mem_node_fill_reg_range(kinfo, reg, &nr_cells, addrcells,
-                                    sizecells);
-
-    for ( cells = reg, i = 0; cells < reg + nr_cells; i++, cells += reg_size )
-    {
-        uint64_t start = dt_read_number(cells, addrcells);
-        uint64_t size = dt_read_number(cells + addrcells, sizecells);
-
-        dt_dprintk("  Bank %u: %#"PRIx64"->%#"PRIx64"\n",
-                   i, start, start + size);
-    }
-
-    dt_dprintk("(reg size %d, nr cells %d)\n", reg_size, nr_cells);
-
-    res = fdt_property(fdt, "reg", reg, nr_cells * sizeof(*reg));
-    if ( res )
-        return res;
-
-    res = fdt_end_node(fdt);
-
-    return res;
-}
-
 int __init add_ext_regions(unsigned long s_gfn, unsigned long e_gfn,
                            void *data)
 {
diff --git a/xen/common/device-tree/domain-build.c b/xen/common/device-tree/domain-build.c
index 774790aab3..6708c9dd66 100644
--- a/xen/common/device-tree/domain-build.c
+++ b/xen/common/device-tree/domain-build.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -451,6 +452,80 @@ int __init make_chosen_node(const struct kernel_info *kinfo)
     return res;
 }
 
+int __init make_memory_node(const struct kernel_info *kinfo, int addrcells,
+                            int sizecells, const struct membanks *mem)
+{
+    void *fdt = kinfo->fdt;
+    unsigned int i;
+    int res, reg_size = addrcells + sizecells;
+    int nr_cells = 0;
+    __be32 reg[DT_MEM_NODE_REG_RANGE_SIZE];
+    __be32 *cells;
+
+    if ( mem->nr_banks == 0 )
+        return -ENOENT;
+
+    /* find the first memory range that is reserved for device (or firmware) */
+    for ( i = 0; i < mem->nr_banks &&
+                 (mem->bank[i].type != MEMBANK_DEFAULT); i++ )
+        ;
+
+    if ( i == mem->nr_banks )
+        return 0;
+
+    dt_dprintk("Create memory node\n");
+
+    res = domain_fdt_begin_node(fdt, "memory", mem->bank[i].start);
+    if ( res )
+        return res;
+
+    res = fdt_property_string(fdt, "device_type", "memory");
+    if ( res )
+        return res;
+
+    cells = ®[0];
+    for ( ; i < mem->nr_banks; i++ )
+    {
+        u64 start = mem->bank[i].start;
+        u64 size = mem->bank[i].size;
+
+        if ( (mem->bank[i].type == MEMBANK_STATIC_DOMAIN) ||
+             (mem->bank[i].type == MEMBANK_FDT_RESVMEM) )
+            continue;
+
+        nr_cells += reg_size;
+        BUG_ON(nr_cells >= ARRAY_SIZE(reg));
+        dt_child_set_range(&cells, addrcells, sizecells, start, size);
+    }
+
+    /*
+     * static shared memory banks need to be listed as /memory node, so when
+     * this function is handling the normal memory, add the banks.
+     */
+    if ( mem == kernel_info_get_mem_const(kinfo) )
+        shm_mem_node_fill_reg_range(kinfo, reg, &nr_cells, addrcells,
+                                    sizecells);
+
+    for ( cells = reg, i = 0; cells < reg + nr_cells; i++, cells += reg_size )
+    {
+        uint64_t start = dt_read_number(cells, addrcells);
+        uint64_t size = dt_read_number(cells + addrcells, sizecells);
+
+        dt_dprintk("  Bank %u: %#"PRIx64"->%#"PRIx64"\n",
+                   i, start, start + size);
+    }
+
+    dt_dprintk("(reg size %d, nr cells %d)\n", reg_size, nr_cells);
+
+    res = fdt_property(fdt, "reg", reg, nr_cells * sizeof(*reg));
+    if ( res )
+        return res;
+
+    res = fdt_end_node(fdt);
+
+    return res;
+}
+
 /*
  * Local variables:
  * mode: C
-- 
2.52.0



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From: "Teddy Astie" 
Subject: =?utf-8?Q?Re:=20[RFC=20PATCH=203/4]=20x86/p2m-pt:=20Set=20p2m->need=5Fflush=20if=20page=20was=20present=20before?=
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To: "Jan Beulich" 
Cc: "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , xen-devel@lists.xenproject.org
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Le 27/11/2025 =C3=A0 15:08, Jan Beulich a =C3=A9crit=C2=A0:
> On 27.11.2025 14:39, Teddy Astie wrote:
>> Update p2m->need_flush if page was present before (requiring a tlb flush=
).
>> This causes p2m->flush_tlb() to be now be reachable, make sure we call i=
t
>> only when set.
> 
> I don't follow. Why would p2m->flush_tlb() not have been reachable? There=
 are
> other places where ->need_flush is set to true.
> 
>> Signed-off-by: Teddy Astie 
>> ---
>> This change is important for the next patch.
>> Would it be better to merge it with the next patch ?
> 
> I'm inclined to say yes, but without understanding the description here I
> cannot be sure.
> 
> Hmm, wait. The sole place in x86 where the flag is set is in EPT code. So
> do you perhaps mean that for NPT or shadow those call sites can now be
> reached, and hence - with the hook being NULL there - checks need adding?
> Then, by its title, the next patch actually may be making use of the hook=
,
> so the checks then can be dropped again?
> 

Even with the next patch, in the shadow case, p2m->flush_tlb is still 
NULL as only HAP-NPT uses hap_p2m_tlb_flush().

> Jan



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v1.9 3/3] x86/amd: Fix race editing DE_CFG
Date: Thu, 27 Nov 2025 17:18:43 +0000
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We have two different functions explaining that DE_CFG is Core-scoped and that
writes are racy but happen to be safe.  This is only true when there's one of
them.

Introduce amd_init_de_cfg() to be the singular function which writes to
DE_CFG, modelled after the logic we already have for BP_CFG.

While reworking amd_check_zenbleed() into a simple predicate used by
amd_init_de_cfg(), fix the microcode table.  The 'good_rev' was specific to an
individual stepping and not valid to be matched by model, let alone a range.
The only CPUs incorrectly matched that I can locate appear to be
pre-production, and probably didn't get Zenbleed microcode.

Rework amd_init_lfence() to be amd_init_lfence_dispatch() with only the
purpose of configuring X86_FEATURE_LFENCE_DISPATCH in the case that it needs
synthesising.  Run it on the BSP only and use setup_force_cpu_cap() to prevent
the bit disappearing on a subseuqent CPUID rescan.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 

v2:
 * Fix FamF/11h check in amd_init_de_cfg(), and exclude the virt case.
 * Fix tabs/spaces in init_{amd,hygon}()
 * Drop comment in amd_init_lfence_dispatch()
---
 xen/arch/x86/cpu/amd.c   | 223 +++++++++++++++++++--------------------
 xen/arch/x86/cpu/cpu.h   |   3 +-
 xen/arch/x86/cpu/hygon.c |   6 +-
 3 files changed, 114 insertions(+), 118 deletions(-)

diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index 7953261895ac..82b02df9a9d5 100644
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -747,45 +747,6 @@ void amd_log_freq(const struct cpuinfo_x86 *c)
 		printk("CPU%u: %u MHz\n", smp_processor_id(), low_mhz);
 }
 
-void amd_init_lfence(struct cpuinfo_x86 *c)
-{
-	uint64_t value;
-
-	/*
-	 * Some hardware has LFENCE dispatch serialising always enabled,
-	 * nothing to do on that case.
-	 */
-	if (test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability))
-		return;
-
-	/*
-	 * Attempt to set lfence to be Dispatch Serialising.  This MSR almost
-	 * certainly isn't virtualised (and Xen at least will leak the real
-	 * value in but silently discard writes), as well as being per-core
-	 * rather than per-thread, so do a full safe read/write/readback cycle
-	 * in the worst case.
-	 */
-	if (rdmsr_safe(MSR_AMD64_DE_CFG, &value))
-		/* Unable to read.  Assume the safer default. */
-		__clear_bit(X86_FEATURE_LFENCE_DISPATCH,
-			    c->x86_capability);
-	else if (value & AMD64_DE_CFG_LFENCE_SERIALISE)
-		/* Already dispatch serialising. */
-		__set_bit(X86_FEATURE_LFENCE_DISPATCH,
-			  c->x86_capability);
-	else if (wrmsr_safe(MSR_AMD64_DE_CFG,
-			    value | AMD64_DE_CFG_LFENCE_SERIALISE) ||
-		 rdmsr_safe(MSR_AMD64_DE_CFG, &value) ||
-		 !(value & AMD64_DE_CFG_LFENCE_SERIALISE))
-		/* Attempt to set failed.  Assume the safer default. */
-		__clear_bit(X86_FEATURE_LFENCE_DISPATCH,
-			    c->x86_capability);
-	else
-		/* Successfully enabled! */
-		__set_bit(X86_FEATURE_LFENCE_DISPATCH,
-			  c->x86_capability);
-}
-
 /*
  * Refer to the AMD Speculative Store Bypass whitepaper:
  * https://developer.amd.com/wp-content/resources/124441_AMD64_SpeculativeStoreBypassDisable_Whitepaper_final.pdf
@@ -979,76 +940,6 @@ void __init detect_zen2_null_seg_behaviour(void)
 
 }
 
-static void amd_check_zenbleed(void)
-{
-	const struct cpu_signature *sig = &this_cpu(cpu_sig);
-	unsigned int good_rev;
-	uint64_t val, old_val, chickenbit = (1 << 9);
-
-	/*
-	 * If we're virtualised, we can't do family/model checks safely, and
-	 * we likely wouldn't have access to DE_CFG even if we could see a
-	 * microcode revision.
-	 *
-	 * A hypervisor may hide AVX as a stopgap mitigation.  We're not in a
-	 * position to care either way.  An admin doesn't want to be disabling
-	 * AVX as a mitigation on any build of Xen with this logic present.
-	 */
-	if (cpu_has_hypervisor || boot_cpu_data.x86 != 0x17)
-		return;
-
-	switch (boot_cpu_data.x86_model) {
-	case 0x30 ... 0x3f: good_rev = 0x0830107a; break;
-	case 0x60 ... 0x67: good_rev = 0x0860010b; break;
-	case 0x68 ... 0x6f: good_rev = 0x08608105; break;
-	case 0x70 ... 0x7f: good_rev = 0x08701032; break;
-	case 0xa0 ... 0xaf: good_rev = 0x08a00008; break;
-	default:
-		/*
-		 * With the Fam17h check above, most parts getting here are
-		 * Zen1.  They're not affected.  Assume Zen2 ones making it
-		 * here are affected regardless of microcode version.
-		 */
-		if (is_zen1_uarch())
-			return;
-		good_rev = ~0U;
-		break;
-	}
-
-	rdmsrl(MSR_AMD64_DE_CFG, val);
-	old_val = val;
-
-	/*
-	 * Microcode is the preferred mitigation, in terms of performance.
-	 * However, without microcode, this chickenbit (specific to the Zen2
-	 * uarch) disables Floating Point Mov-Elimination to mitigate the
-	 * issue.
-	 */
-	val &= ~chickenbit;
-	if (sig->rev < good_rev)
-		val |= chickenbit;
-
-	if (val == old_val)
-		/* Nothing to change. */
-		return;
-
-	/*
-	 * DE_CFG is a Core-scoped MSR, and this write is racy during late
-	 * microcode load.  However, both threads calculate the new value from
-	 * state which is shared, and unrelated to the old value, so the
-	 * result should be consistent.
-	 */
-	wrmsrl(MSR_AMD64_DE_CFG, val);
-
-	/*
-	 * Inform the admin that we changed something, but don't spam,
-	 * especially during a late microcode load.
-	 */
-	if (smp_processor_id() == 0)
-		printk(XENLOG_INFO "Zenbleed mitigation - using %s\n",
-		       val & chickenbit ? "chickenbit" : "microcode");
-}
-
 static void cf_check fam17_disable_c6(void *arg)
 {
 	/* Disable C6 by clearing the CCR{0,1,2}_CC6EN bits. */
@@ -1075,6 +966,108 @@ static void cf_check fam17_disable_c6(void *arg)
 	wrmsrl(MSR_AMD_CSTATE_CFG, val & mask);
 }
 
+static bool zenbleed_use_chickenbit(void)
+{
+    unsigned int curr_rev;
+    uint8_t fixed_rev;
+
+    /* Zenbleed only affects Zen2.  Nothing to do on non-Fam17h systems. */
+    if ( boot_cpu_data.family != 0x17 )
+        return false;
+
+    curr_rev = this_cpu(cpu_sig).rev;
+    switch ( curr_rev >> 8 )
+    {
+    case 0x083010: fixed_rev = 0x7a; break;
+    case 0x086001: fixed_rev = 0x0b; break;
+    case 0x086081: fixed_rev = 0x05; break;
+    case 0x087010: fixed_rev = 0x32; break;
+    case 0x08a000: fixed_rev = 0x08; break;
+    default:
+        /*
+         * With the Fam17h check above, most parts getting here are Zen1.
+         * They're not affected.  Assume Zen2 ones making it here are affected
+         * regardless of microcode version.
+         */
+        return is_zen2_uarch();
+    }
+
+    return (uint8_t)curr_rev >= fixed_rev;
+}
+
+void amd_init_de_cfg(const struct cpuinfo_x86 *c)
+{
+    uint64_t val, new = 0;
+
+    /*
+     * The MSR doesn't exist on Fam 0xf/0x11.  If virtualised, we won't have
+     * mutable access even if we can read it.
+     */
+    if ( c->family == 0xf || c->family == 0x11 || cpu_has_hypervisor )
+        return;
+
+    /*
+     * On Zen3 (Fam 0x19) and later CPUs, LFENCE is unconditionally dispatch
+     * serialising, and is enumerated in CPUID.
+     *
+     * On older systems, LFENCE is unconditionally dispatch serialising (when
+     * the MSR doesn't exist), or can be made so by setting this bit.
+     */
+    if ( !test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability) )
+        new |= AMD64_DE_CFG_LFENCE_SERIALISE;
+
+    /*
+     * If vulnerable to Zenbleed and not mitigated in microcode, use the
+     * bigger hammer.
+     */
+    if ( zenbleed_use_chickenbit() )
+        new |= (1 << 9);
+
+    if ( !new )
+        return;
+
+    val = rdmsr(MSR_AMD64_DE_CFG);
+
+    if ( (val & new) == new )
+        return;
+
+    /*
+     * DE_CFG is a Core-scoped MSR, and this write is racy.  However, both
+     * threads calculate the new value from state which expected to be
+     * consistent across CPUs and unrelated to the old value, so the result
+     * should be consistent.
+     */
+    wrmsr(MSR_AMD64_DE_CFG, val | new);
+}
+
+void __init amd_init_lfence_dispatch(void)
+{
+    struct cpuinfo_x86 *c = &boot_cpu_data;
+    uint64_t val;
+
+    if ( test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability) )
+        /* LFENCE is forced dispatch serialising and we can't control it. */
+        return;
+
+    if ( c->family == 0xf || c->family == 0x11 )
+        /* MSR doesn't exist.  LFENCE is dispatch serialising on this hardare. */
+        goto set;
+
+    if ( rdmsr_safe(MSR_AMD64_DE_CFG, &val) )
+        /* Unable to read.  Assume the safer default. */
+        goto clear;
+
+    if ( val & AMD64_DE_CFG_LFENCE_SERIALISE )
+        goto set;
+
+ clear:
+    setup_clear_cpu_cap(X86_FEATURE_LFENCE_DISPATCH);
+    return;
+
+ set:
+    setup_force_cpu_cap(X86_FEATURE_LFENCE_DISPATCH);
+}
+
 static void amd_check_bp_cfg(void)
 {
 	uint64_t val, new = 0;
@@ -1118,6 +1111,11 @@ static void cf_check init_amd(struct cpuinfo_x86 *c)
 	u32 l, h;
 	uint64_t value;
 
+	amd_init_de_cfg(c);
+
+	if (c == &boot_cpu_data)
+		amd_init_lfence_dispatch(); /* Needs amd_init_de_cfg() */
+
 	/* Disable TLB flush filter by setting HWCR.FFDIS on K8
 	 * bit 6 of msr C001_0015
 	 *
@@ -1156,12 +1154,6 @@ static void cf_check init_amd(struct cpuinfo_x86 *c)
 	if (c == &boot_cpu_data && !cpu_has(c, X86_FEATURE_RSTR_FP_ERR_PTRS))
 		setup_force_cpu_cap(X86_BUG_FPU_PTRS);
 
-	if (c->x86 == 0x0f || c->x86 == 0x11)
-		/* Always dispatch serialising on this hardare. */
-		__set_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability);
-	else /* Implicily "== 0x10 || >= 0x12" by being 64bit. */
-		amd_init_lfence(c);
-
 	amd_init_ssbd(c);
 
 	if (c->x86 == 0x17)
@@ -1379,7 +1371,6 @@ static void cf_check init_amd(struct cpuinfo_x86 *c)
 	if ((smp_processor_id() == 1) && !cpu_has(c, X86_FEATURE_ITSC))
 		disable_c1_ramping();
 
-	amd_check_zenbleed();
 	amd_check_bp_cfg();
 
 	if (fam17_c6_disabled)
diff --git a/xen/arch/x86/cpu/cpu.h b/xen/arch/x86/cpu/cpu.h
index cbb434f3a23d..8bed3f52490f 100644
--- a/xen/arch/x86/cpu/cpu.h
+++ b/xen/arch/x86/cpu/cpu.h
@@ -24,7 +24,8 @@ extern bool detect_extended_topology(struct cpuinfo_x86 *c);
 
 void cf_check early_init_amd(struct cpuinfo_x86 *c);
 void amd_log_freq(const struct cpuinfo_x86 *c);
-void amd_init_lfence(struct cpuinfo_x86 *c);
+void amd_init_de_cfg(const struct cpuinfo_x86 *c);
+void amd_init_lfence_dispatch(void);
 void amd_init_ssbd(const struct cpuinfo_x86 *c);
 void amd_init_spectral_chicken(void);
 void detect_zen2_null_seg_behaviour(void);
diff --git a/xen/arch/x86/cpu/hygon.c b/xen/arch/x86/cpu/hygon.c
index f7508cc8fcb9..c3faabbdb764 100644
--- a/xen/arch/x86/cpu/hygon.c
+++ b/xen/arch/x86/cpu/hygon.c
@@ -31,7 +31,11 @@ static void cf_check init_hygon(struct cpuinfo_x86 *c)
 {
 	unsigned long long value;
 
-	amd_init_lfence(c);
+	amd_init_de_cfg(c);
+
+	if (c == &boot_cpu_data)
+		amd_init_lfence_dispatch(); /* Needs amd_init_de_cfg() */
+
 	amd_init_ssbd(c);
 
 	/* Probe for NSCB on Zen2 CPUs when not virtualised */

base-commit: fb0e37df71a31318c61e0715ffed3e149ca8a4aa
prerequisite-patch-id: 3598b7168c11c3dd68f825c75b77edc552fc231f
prerequisite-patch-id: e57b8bc06e86a4470b5bcf8e412d248e1f8f3331
-- 
2.39.5



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 , Xen-devel 
Subject: Re: [PATCH 3/3] x86/amd: Fix race editing DE_CFG
To: Jan Beulich 
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 <20251126132220.881028-4-andrew.cooper3@citrix.com>
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On 27/11/2025 7:58 am, Jan Beulich wrote:
> On 26.11.2025 18:56, Andrew Cooper wrote:
>> On 26/11/2025 4:55 pm, Andrew Cooper wrote:
>>> On 26/11/2025 3:07 pm, Jan Beulich wrote:
>>>> On 26.11.2025 14:22, Andrew Cooper wrote:
>>>>> @@ -1075,6 +966,112 @@ static void cf_check fam17_disable_c6(void *arg)
>>>>>  	wrmsrl(MSR_AMD_CSTATE_CFG, val & mask);
>>>>>  }
>>>>>  
>>>>> +static bool zenbleed_use_chickenbit(void)
>>>>> +{
>>>>> +    unsigned int curr_rev;
>>>>> +    uint8_t fixed_rev;
>>>>> +
>>>>> +    /*
>>>>> +     * If we're virtualised, we can't do family/model checks safely, and
>>>>> +     * we likely wouldn't have access to DE_CFG even if we could see a
>>>>> +     * microcode revision.
>>>>> +     *
>>>>> +     * A hypervisor may hide AVX as a stopgap mitigation.  We're not in a
>>>>> +     * position to care either way.  An admin doesn't want to be disabling
>>>>> +     * AVX as a mitigation on any build of Xen with this logic present.
>>>>> +     */
>>>>> +    if ( cpu_has_hypervisor || boot_cpu_data.family != 0x17 )
>>>>> +        return false;
>>>>> +
>>>>> +    curr_rev = this_cpu(cpu_sig).rev;
>>>>> +    switch ( curr_rev >> 8 )
>>>>> +    {
>>>>> +    case 0x083010: fixed_rev = 0x7a; break;
>>>>> +    case 0x086001: fixed_rev = 0x0b; break;
>>>>> +    case 0x086081: fixed_rev = 0x05; break;
>>>>> +    case 0x087010: fixed_rev = 0x32; break;
>>>>> +    case 0x08a000: fixed_rev = 0x08; break;
>>>>> +    default:
>>>>> +        /*
>>>>> +         * With the Fam17h check above, most parts getting here are Zen1.
>>>>> +         * They're not affected.  Assume Zen2 ones making it here are affected
>>>>> +         * regardless of microcode version.
>>>>> +         */
>>>>> +        return is_zen2_uarch();
>>>>> +    }
>>>>> +
>>>>> +    return (uint8_t)curr_rev >= fixed_rev;
>>>>> +}
>>>>> +
>>>>> +void amd_init_de_cfg(const struct cpuinfo_x86 *c)
>>>>> +{
>>>>> +    uint64_t val, new = 0;
>>>>> +
>>>>> +    /* The MSR doesn't exist on Fam 0xf/0x11. */
>>>>> +    if ( c->family != 0xf && c->family != 0x11 )
>>>>> +        return;
>>>> Comment and code don't match. Did you mean
>>>>
>>>>     if ( c->family == 0xf || c->family == 0x11 )
>>>>         return;
>>>>
>>>> (along the lines of what you have in amd_init_lfence_dispatch())?
>>> Oh - that was a last minute refactor which I didn't do quite correctly. 
>>> Yes, it should match amd_init_lfence_dispatch().
>>>
>>>>> +    /*
>>>>> +     * On Zen3 (Fam 0x19) and later CPUs, LFENCE is unconditionally dispatch
>>>>> +     * serialising, and is enumerated in CPUID.  Hypervisors may also
>>>>> +     * enumerate it when the setting is in place and MSR_AMD64_DE_CFG isn't
>>>>> +     * available.
>>>>> +     */
>>>>> +    if ( !test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability) )
>>>>> +        new |= AMD64_DE_CFG_LFENCE_SERIALISE;
>>>>> +
>>>>> +    /*
>>>>> +     * If vulnerable to Zenbleed and not mitigated in microcode, use the
>>>>> +     * bigger hammer.
>>>>> +     */
>>>>> +    if ( zenbleed_use_chickenbit() )
>>>>> +        new |= (1 << 9);
>>>>> +
>>>>> +    if ( !new )
>>>>> +        return;
>>>>> +
>>>>> +    if ( rdmsr_safe(MSR_AMD64_DE_CFG, &val) ||
>>>>> +         (val & new) == new )
>>>>> +        return;
>>>>> +
>>>>> +    /*
>>>>> +     * DE_CFG is a Core-scoped MSR, and this write is racy.  However, both
>>>>> +     * threads calculate the new value from state which expected to be
>>>>> +     * consistent across CPUs and unrelated to the old value, so the result
>>>>> +     * should be consistent.
>>>>> +     */
>>>>> +    wrmsr_safe(MSR_AMD64_DE_CFG, val | new);
>>>> Either of the bits may be the cause of #GP. In that case we wouldn't set the
>>>> other bit, even if it may be possible to set it.
>>> This MSR does not #GP on real hardware.
> I consider this unexpected / inconsistent, at least as long as some of the
> bits would be documented as reserved. "Would be" because the particular
> Fam17 and Fam19 PPRs I'm looking at don't even mention DE_CFG (or BP_CFG,
> for that matter).

You need the even-more-NDA manual to find those details.

Reserved doesn't mean #GP. It means "don't rely on the behaviour".

>>> Also, both of these bits come from instructions AMD have provided,
>>> saying "set $X in case $Y", which we have honoured as part of the
>>> conditions for setting up new, which I consider to be a reasonable
>>> guarantee that no #GP will ensue.
> The AMD instructions are for particular models, aren't they? While that
> may mean the bits are fine to blindly (try to) set on other models, pretty
> likely this can't be extended to other families. (While
> zenbleed_use_chickenbit() is family-specific, the LFENCE bit is tried
> without regard to family.)

The Managing Speciation whitepaper says "set bit 1 on Fam 10, 12, 14,
15-17".

It also says that AMD will treat the MSR and bit 1 as architectural
moving forwards.  In reality, on Zen3 (post-dating the whitepaper) and
later, it's write-discard, read-as-1, and this is the behaviour we
provide to all VMs.

The Zenbleed instruction say "set bit 9 on Zen2".

So, the logic in this patch following AMD's written instructions.

~Andrew


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From: "Teddy Astie" 
Subject: =?utf-8?Q?Re:=20[RFC=20PATCH=204/4]=20x86/hap:=20Migrate=20tlb=20flush=20logic=20to=20p2m->flush=5Ftlb?=
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Le 27/11/2025 =C3=A0 15:32, Jan Beulich a =C3=A9crit=C2=A0:
> On 27.11.2025 14:39, Teddy Astie wrote:
>> Now that p2m->need_flush is set when modifying the pagetable in a way th=
at
>> requires it. We can move the tlb flush logic to p2m->tlb_flush.
>>
>> Introduce hap_tlb_flush to do it, which is called by main p2m logic (e.g=
 p2m_unlock,
>> p2m_tlb_flush_sync, ...). Drop inline calls of guest_flush_tlb_mask whic=
h are now
>> redundant with what now does p2m->flush_tlb, allowing us to drop guest_f=
lush_tlb_*
>> as it is now unused.
>>
>> No function change intended.
>>
>> Signed-off-by: Teddy Astie 
> 
> I think the safety / correctness of the change needs explaining in the
> description. TLB flushing is often delicate, so it wants to be made prett=
y
> clear that no necessary flush is now omitted anywhere. It also wants to b=
e
> made clear, from a performance angle, no new excess flushing is added (se=
e
> below for a respective question towards EPT).
> 

Overall, all places where there is was a guest_flush_tlb_mask, there is 
a implicit call to p2m->tlb_flush (usually through p2m_unlock() or 
something that calls it); but that indeed wants to be explained.

>> --- a/xen/arch/x86/flushtlb.c
>> +++ b/xen/arch/x86/flushtlb.c
>> @@ -320,18 +320,3 @@ void cache_writeback(const void *addr, unsigned int=
 size)
>>       asm volatile ("sfence" ::: "memory");
>>   }
>>   
>> -unsigned int guest_flush_tlb_flags(const struct domain *d)
>> -{
>> -    bool shadow =3D paging_mode_shadow(d);
>> -    bool asid =3D is_hvm_domain(d) && (cpu_has_svm || shadow);
> 
> There's an SVM dependency here, which ...
> 
>> --- a/xen/arch/x86/mm/hap/hap.c
>> +++ b/xen/arch/x86/mm/hap/hap.c
>> @@ -105,8 +105,6 @@ int hap_track_dirty_vram(struct domain *d,
>>               p2m_change_type_range(d, begin_pfn, begin_pfn + nr_frames,
>>                                     p2m_ram_rw, p2m_ram_logdirty);
>>   
>> -            guest_flush_tlb_mask(d, d->dirty_cpumask);
>> -
>>               memset(dirty_bitmap, 0xff, size); /* consider all pages di=
rty */
>>           }
>>           else
>> @@ -191,7 +189,6 @@ static int cf_check hap_enable_log_dirty(struct doma=
in *d)
>>        * to be read-only, or via hardware-assisted log-dirty.
>>        */
>>       p2m_change_entry_type_global(d, p2m_ram_rw, p2m_ram_logdirty);
>> -    guest_flush_tlb_mask(d, d->dirty_cpumask);
>>   
>>       return 0;
>>   }
>> @@ -220,7 +217,6 @@ static void cf_check hap_clean_dirty_bitmap(struct d=
omain *d)
>>        * be read-only, or via hardware-assisted log-dirty.
>>        */
>>       p2m_change_entry_type_global(d, p2m_ram_rw, p2m_ram_logdirty);
>> -    guest_flush_tlb_mask(d, d->dirty_cpumask);
>>   }
>>   
>>   /************************************************/
>> @@ -806,18 +802,14 @@ static void cf_check hap_update_paging_modes(struc=
t vcpu *v)
>>       put_gfn(d, cr3_gfn);
>>   }
>>   
>> -static void cf_check
>> -hap_write_p2m_entry_post(struct p2m_domain *p2m, unsigned int oflags)
>> +void hap_p2m_tlb_flush(struct p2m_domain *p2m)
>>   {
>> -    struct domain *d =3D p2m->domain;
>> -
>> -    if ( oflags & _PAGE_PRESENT )
>> -        guest_flush_tlb_mask(d, d->dirty_cpumask);
>> +    flush_mask(p2m->domain->dirty_cpumask, FLUSH_HVM_ASID_CORE);
>>   }
>>   
>>   void hap_p2m_init(struct p2m_domain *p2m)
>>   {
>> -    p2m->write_p2m_entry_post =3D hap_write_p2m_entry_post;
>> +    p2m->tlb_flush =3D hap_p2m_tlb_flush;
>>   }
> 
> ... is entirely lost throughout the hap.c changes. Are we now doing exces=
s flushing
> for EPT?

Probably not as EPT uses its own tlb_flush function (ept_tlb_flush) 
instead. Most changes are isolated to p2m-pt.c, and here only SVM with HAP.

> I guess the relevant point here is that hap_p2m_init(), despite its name
> suggesting otherwise, doesn't come into play when EPT is in use. (This co=
uld do
> with cleaning up, as right now it then has to be the case that in a AMD_S=
VM=3Dn
> configuration that function is unreachable, violating a Misra rule.
> 

I would like in the end that NPT and EPT being similar to use the same 
tlb flushing logic thus hap_p2m_tlb_flush() (with some changes), but 
that requires additional work.

> Also, why would hap_p2m_tlb_flush() lose static and cf_check that the pri=
or hook
> function validly had?
> 

that's not intended indeed

> Jan
> 



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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Date: Thu, 27 Nov 2025 18:21:35 +0000
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Cc: andrew.cooper3@citrix.com, =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Xen-devel 
Subject: Re: [PATCH 2/3] x86/amd: Drop vestigial PBE logic in init_amd()
To: Jan Beulich 
References: <20251126171539.890253-1-andrew.cooper3@citrix.com>
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On 27/11/2025 8:44 am, Jan Beulich wrote:
> On 26.11.2025 18:15, Andrew Cooper wrote:
>> The comment was adjusted by myself in commit 51bd4bbdfdba ("x86: drop
>> X86_FEATURE_3DNOW_ALT"), on the presumption that the underlying logic existed
>> for a good reason.
>>
>> Having done further archaeology, it turns out to be vestigial technical debt
>> from the leadup to Linux 2.4 in November 2000.
>>
>> Prior to "Massive cleanup of CPU detection and bug handling",
>> c->x86_capability was a single uint32_t containing cpuid(1).edx,
>> cpuid(0x80000001).edx, or a synthesis thereof.  X86_FEATURE_AMD3D was defined
>> as the top bit this single uint32_t.
>>
>> After "Massive cleanup of CPU detection and bug handling",
>> c->x86_capability became an array with AMD's extended feature leaf split
>> away from Intel's basic feature leaf.
>>
>> AMD doc #20734-G states that 3DNow is only enumerated in the extended
>> feature leaf, and that other vendors where using this bit too.  i.e. AMD
>> never produced a CPU which set bit 31 in the basic leaf, meaning that
>> there's nothing to clear out in the first place.
>>
>> This logic looks like it was relevant in the pre-"Massive cleanup" world
>> but ought to have been dropped when c->x86_capability was properly split.
>>
>> Signed-off-by: Andrew Cooper 
> Acked-by: Jan Beulich 

Thanks.

> albeit I think that, along the lines of a comment I made on Matrix, that ...
>
>> --- a/xen/arch/x86/cpu/amd.c
>> +++ b/xen/arch/x86/cpu/amd.c
>> @@ -1131,13 +1131,6 @@ static void cf_check init_amd(struct cpuinfo_x86 *c)
>>  		wrmsrl(MSR_K8_HWCR, value);
>>  	}
>>  
>> -	/*
>> -	 * Some AMD CPUs duplicate the 3DNow bit in base and extended CPUID
>> -	 * leaves.  Unfortunately, this aliases PBE on Intel CPUs. Clobber the
>> -	 * alias, leaving 3DNow in the extended leaf.
>> -	 */
>> -	__clear_bit(X86_FEATURE_PBE, c->x86_capability);
> ... while the justification applies to what the CPUs surface on their own,
> the basic leaf masking MSR could (likely) still have undue bits set, and
> hence may want pruning in exchange / addition.

As said, the ability to control CPUID in this way postdates by a decade
this logic in Linux, and this logic came about because of a logical
issue/shortcut taken by Linux, not because of a CPU which really
mis-reported this bit.

We do have logic which adjusts the override MSRs on AMD based on errata.

~Andrew


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Date: Thu, 27 Nov 2025 19:00:05 +0000
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Subject: Re: [PATCH v3] x86: Remove x86 prefixed names from cpuinfo for
 intel.c
To: Kevin Lampis , xen-devel@lists.xenproject.org
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On 26/11/2025 7:19 pm, Kevin Lampis wrote:
> diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c
> index 6f71365b7e..ff20f5667f 100644
> --- a/xen/arch/x86/cpu/intel.c
> +++ b/xen/arch/x86/cpu/intel.c
> @@ -137,28 +138,29 @@ static void __init probe_masking_msrs(void)
>  	unsigned int exp_msr_basic, exp_msr_ext, exp_msr_xsave;
>  
>  	/* Only family 6 supports this feature. */
> -	if (c->x86 != 6)
> +	if (c->family != 6)
>  		return;

The f in vfm is Family.  This condition should be dropped, and the
switch() gain a default which simply returns.

> @@ -265,7 +267,7 @@ static void __init noinline intel_init_levelling(void)
>  	 * so skip it altogether. In the case where Xen is virtualized these
>  	 * MSRs may be emulated though, so we allow it in that case.
>  	 */
> -	if ((boot_cpu_data.x86 != 0xf || cpu_has_hypervisor) &&
> +	if ((boot_cpu_data.family != 0xf || cpu_has_hypervisor) &&

Everywhere else, you're turning 0xf into 15.

I've pushed an interim
https://gitlab.com/xen-project/hardware/xen-staging/-/commits/andrew/intel-vfm
which has the style corrections and these two fixes.

> @@ -657,14 +670,16 @@ static void cf_check init_intel(struct cpuinfo_x86 *c)
>  	/* Work around errata */
>  	Intel_errata_workarounds(c);
>  
> -	if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
> -		(c->x86 == 0x6 && c->x86_model >= 0x0e))
> +	if ( ( c->family == 15 && c->model >= 0x03 ) ||
> +	     ( c->family == 6 && c->model >= 0x0e ) )
>  		__set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
> +

This is logic that becomes buggy with Fam 18/19.

https://git.kernel.org/tip/fadb6f569b10bf668677add876ed50586931b8f3 was
the Linux fix, which will want adapting as a prerequisite fix.

>  	if (cpu_has(c, X86_FEATURE_ITSC)) {
>  		__set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
>  		__set_bit(X86_FEATURE_NONSTOP_TSC, c->x86_capability);
>  		__set_bit(X86_FEATURE_TSC_RELIABLE, c->x86_capability);
>  	}

Note that Linux's opencoded "c->x86_power & (1 << 8)" is really the ITSC
check above.

I'm about to commit the resync of intel-family.h so that will rebase out
shortly.

~Andrew


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 Anthony PERARD ,
 Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 
Subject: Re: [PATCH 7/8] symbols: drop symbols-dummy.c
To: Jan Beulich ,
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On 26/11/2025 1:47 pm, Jan Beulich wrote:
> No architecture using it anymore, we can as well get rid of it.
>
> Signed-off-by: Jan Beulich 

Acked-by: Andrew Cooper 

> ---
> Should we also drop common/symbols.h again then, by moving its contents
> back into common/symbols.c?

Probably.

~Andrew


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Date: Thu, 27 Nov 2025 19:31:12 +0000
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Cc: andrew.cooper3@citrix.com, Julien Grall ,
 Stefano Stabellini ,
 Anthony PERARD ,
 Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 
Subject: Re: [PATCH v1' 8/8] symbols: check table sizes don't change between
 linking passes 2 and 3
To: Jan Beulich ,
 "xen-devel@lists.xenproject.org" 
References: 
 <94f993b2-93f4-43a5-a502-da53b810b201@suse.com>
Content-Language: en-GB
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On 26/11/2025 1:48 pm, Jan Beulich wrote:
> --- a/xen/scripts/Kbuild.include
> +++ b/xen/scripts/Kbuild.include
> @@ -56,6 +56,19 @@ define filechk
>  	fi
>  endef
>  
> +###
> +# Compare the symbol tables of two object files.  As diff's -I option isn't
> +# standardized, the name difference of the two object files needs abstracting
> +# out.
> +define compare-symbol-tables
> +    ln -f $(1) $(@D)/.cst.$$$$; \
> +    $(OBJDUMP) -t $(@D)/.cst.$$$$ > $(1).sym; \
> +    ln -f $(1) $(@D)/.cst.$$$$; \
> +    $(OBJDUMP) -t $(@D)/.cst.$$$$ > $(2).sym; \
> +    rm -f $(@D)/.cst.$$$$

Doesn't the second link want to be `ln -f $(2)` ?

It looks like this is comparing $(1) to itself.

> +    diff -u $(1).sym $(2).sym
> +endef

While I am generally in favour of build time checks, this looks like
it's a large overhead?

~Andrew


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Date: Thu, 27 Nov 2025 19:49:36 +0000
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Cc: andrew.cooper3@citrix.com, Jan Beulich ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Tim Deegan 
Subject: Re: [RFC PATCH 0/4] x86/p2m: Some P2M refactoring
To: Teddy Astie , xen-devel@lists.xenproject.org
References: 
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On 27/11/2025 1:39 pm, Teddy Astie wrote:
> First patch removes a shadow mode check in a function that can't be
> called with shadow mode (only called with EPT hence HAP).
>
> 3 other patches drops guest_tlb_flush_mask by removing all its users :
> in the shadow paging case by migrating it a shadow variant of it and
> in the hap case by moving it to p2m->flush_tlb logic.
>
> One of the goal is to prepare adding HAP-specific optimizations to TLB
> flushing code without risking regressions in the shadow paging code.

You need a clearer background to try and explain the changes.  I've
discussed some of it with you, but it needs describing here for everyone
else.

>From memory, encrypted AMD VMs cannot use "asid++" to flush TLBs, and
must used VMCB->tlb_ctrl instead.

On top of that, Xen does not have a correct abstraction for "flush guest
VA space" vs "flush guest PA space" vs "flush Xen's mappings of guest VA
space".  This comes about because of the shadow code originally had all
3 things together, and HAP didn't clean this up when the need first arose.

This causes over-flushing (Tamas found and reported this on Intel), and
FLUSH_HVM_ASID_CORE isn't an adequate abstraction either.


All of that said, it would help to have a sketch of what you want the
logic to look like in the end.

"flush guest VA space" and "flush guest PA space" originate from
different actions.  VA flushes always from emulation of a guest action,
whereas PA flushes originate from modifications to the P2M.  When shadow
is in use, both of these escalate into a full local flush because of
Xen's use of shadow linear mappings, but this escalation should be
inside the shadow code, not the top level primitive.

Have I missed anything else?

~Andrew


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Subject: Re: [RFC PATCH 02/11] x86: Reject CPU policies with vendors other
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On 26/11/2025 4:44 pm, Alejandro Vallejo wrote:
> While in principle it's possible to have a vendor virtualising another,
> this is fairly tricky in practice. Not doing so enables certain
> optimisations with regards to vendor checks in later patches.
>
> Signed-off-by: Alejandro Vallejo 
> ---
> I originally had a Kconfig option to allow cross-vendor virt and
> conditionally disable the check on policy compatibility. In practice,
> I suspect there's 0% of people that would want that, so I decided to
> simply remove it altogether. Happy to put it back if there's anyone
> interested.

We've debated dropping cross-vendor support several times.

Prior to speculation, it was actually the case that PV guests worked
fairly well (Xen abstracts away the details surprisingly well), and HVM
functioned to a first approximation (emulating the SYS* instructions is
horrible).

After speculation, there's no hope in hell of getting a viable VM in a
cross-vendor environment, so we should drop it.

In addition to this hunk, you'll want to drop is_cross_vendor(),
should_emulate logic in hvm_ud_intercept(), and the cross-vendor aspect
of determining #UD interception in {svm,vmx}_cpuid_policy_changed().

Also, I think you can clean up MSR_IA32_PLATFORM_ID / MSR_AMD_PATCHLEVEL
in guest_rdmsr() which have some pretty well hidden is-cross-vendor checks.

Also you'll want a note in CHANGELOG.md.

I'd also suggest splitting it out of this series.  It's quite different
to the rest of the series.

~Andrew


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 , Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
Subject: Re: [RFC PATCH 03/11] x86: Add x86_vendor_is() by itself before using
 it
To: Alejandro Vallejo ,
 Jan Beulich 
References: <20251126164419.174487-1-alejandro.garciavallejo@amd.com>
 <20251126164419.174487-4-alejandro.garciavallejo@amd.com>
 
 
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On 27/11/2025 1:15 pm, Alejandro Vallejo wrote:
>> Which raises the next question: Should we even allow a hypervisor to be built
>> with X86_ENABLED_VENDORS == 0?
> That's the most extreme case of "should we boot on a CPU known CPU vendor that 
> has been compiled out?", the current code in the RFC uses the unknown vendor
> as fallback. We could also panic. We could be trying to exercise the
> "no assumptions about the vendor" paths.
>
> It's a policy decision for you (x86 mantainers) to take. I personally think the
> default path is silly in this day and age and we could get rid of it entirely.
> Without it X86_ENABLED_VENDORS=0 would be indeed illegal. On that topic...

We allow compiling out both PV and HVM, so Randconfig can search for
broken corners of the abstraction.  The same principle applies here.

For running such a hypervisor, I can't see anything that would
fundamentally interfere with PV guests; PV guests are all architectural x86.

I don't like there being an explicit Kconfig option for UNKNOWN. 
UNKNOWN should simply be "didn't match anything we compiled in".

~Andrew


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Cc: andrew.cooper3@citrix.com, Jan Beulich ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini 
Subject: Re: [RFC PATCH 01/11] x86: Add more granularity to the vendors in
 Kconfig
To: Alejandro Vallejo ,
 xen-devel@lists.xenproject.org
References: <20251126164419.174487-1-alejandro.garciavallejo@amd.com>
 <20251126164419.174487-2-alejandro.garciavallejo@amd.com>
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On 26/11/2025 4:44 pm, Alejandro Vallejo wrote:
> diff --git a/xen/arch/x86/Kconfig.cpu b/xen/arch/x86/Kconfig.cpu
> index 5fb18db1aa..aaf70fb37b 100644
> --- a/xen/arch/x86/Kconfig.cpu
> +++ b/xen/arch/x86/Kconfig.cpu
> @@ -19,4 +19,49 @@ config INTEL
>  	  May be turned off in builds targetting other vendors.  Otherwise,
>  	  must be enabled for Xen to work suitably on Intel platforms.
>  
> +config HYGON
> +	bool "Support Hygon CPUs"
> +	depends on AMD
> +	default y
> +	help
> +	  Detection, tunings and quirks for Hygon platforms.
> +
> +	  May be turned off in builds targetting other vendors.  Otherwise,
> +	  must be enabled for Xen to work suitably on Hygon platforms.
> +
> +
> +config CENTAUR
> +	bool "Support Centaur CPUs"
> +	depends on INTEL
> +	default y
> +	help
> +	  Detection, tunings and quirks for Centaur platforms.
> +
> +	  May be turned off in builds targetting other vendors.  Otherwise,
> +	  must be enabled for Xen to work suitably on Centaur platforms.
> +
> +config SHANGHAI
> +	bool "Support Shanghai CPUs"
> +	depends on INTEL
> +	default y
> +	help
> +	  Detection, tunings and quirks for Shanghai platforms.
> +
> +	  May be turned off in builds targetting other vendors.  Otherwise,
> +	  must be enabled for Xen to work suitably on Shanghai platforms.

Minor nit, but all these 3 should be select AMD/INTEL, not depends. 
It's an implementation detail that they reach sideways into AMD/INTEL to
operate.

An end user in front of menuconfig wants to see all 5 to configure. 
It's unreasonable to require them to know that they need to enable AMD
in order to be able to configure Hygon.

> diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c
> index 37820a3a08..393c30227f 100644
> --- a/xen/arch/x86/cpu/common.c
> +++ b/xen/arch/x86/cpu/common.c
> @@ -118,7 +118,7 @@ static void cf_check default_init(struct cpuinfo_x86 * c)
>  	__clear_bit(X86_FEATURE_SEP, c->x86_capability);
>  }
>  
> -static const struct cpu_dev __initconst_cf_clobber __used default_cpu = {
> +static const struct cpu_dev __initconst_cf_clobber default_cpu = {

To follow up on a different question, the __used came from 660f8a75013
but it does look wrong on a second look.  It might have been a leftover
from an older revision of the patch.

~Andrew


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Subject: Re: [RFC PATCH 00/11] x86 vendor check optimisations
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On 26/11/2025 4:44 pm, Alejandro Vallejo wrote:
> Just knowing x86_vendor_is() is "good to have" is good enough as it enables our
> downstream to customise it with whatever optimisations we need.
>
> I also suspect other areas of the hypervisor could benefit from this meld of
> runtime+compiletime sort of checking, allowing transparent code removal.
>
> I'm thinking DOM0LESS_BOOT vs DOM0_BOOT vs PVSHIM_BOOT, or AMD_SVM vs INTEL_VMX
> in HVM-only builds, or family checks to have (i.e) a explicit "older-than-zen"
> Kconfig option with a similar approach on a family range check.
>
> This is maybe one of several such uses.
>
> So... thoughts? I'm definitely fond of the single-vendor bloat-o-meter output.

Having looked through the whole series, I'm not a massive fan of
converting the switch() statements, but it's the only way to do the
DCE.  So be it.

I think x86_vendor_is(var, MASK) wants to become boot_vendor(MASK).

Most cases want the boot vendor, and those that appear to want something
else don't actually.  When you disable the cross-vendor case (patch 2
pulled out ahead), then cp->vendor == boot_vendor and then you don't
need a variable to pass in.

This also reduces the verbosity of the new lines which is an improvement.


That said, this series also collides substantially with the Intel Fam
18/19 work, which is more urgent and needs backporting to 4.21.  More
specifically, there are a bunch of changes which interfere with VFM
conversion, and for which I can't see an obvious DCE reason to have, so
I'm wondering if they were just part of "convert everything".

~Andrew


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From: Grygorii Strashko 
To: Grygorii Strashko ,
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Subject: [PATCH v2 1/3] arm/ppc/riscv: drop unused domain_set_alloc_bitsize()
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Thread-Topic: [PATCH v2 1/3] arm/ppc/riscv: drop unused
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Date: Thu, 27 Nov 2025 22:12:45 +0000
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From: Grygorii Strashko 

The domain_set_alloc_bitsize() is x86 PV32 specific and not used by other
arch or common code, so remove it.

Signed-off-by: Grygorii Strashko 
---
 xen/arch/arm/include/asm/mm.h   | 1 -
 xen/arch/ppc/include/asm/mm.h   | 1 -
 xen/arch/riscv/include/asm/mm.h | 1 -
 3 files changed, 3 deletions(-)

diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h
index f702f4a0d676..4c6cc64aa7ba 100644
--- a/xen/arch/arm/include/asm/mm.h
+++ b/xen/arch/arm/include/asm/mm.h
@@ -313,7 +313,6 @@ struct page_info *get_page_from_gva(struct vcpu *v, vad=
dr_t va,
 /* Arch-specific portion of memory_op hypercall. */
 long arch_memory_op(int op, XEN_GUEST_HANDLE_PARAM(void) arg);
=20
-#define domain_set_alloc_bitsize(d) ((void)0)
 #define domain_clamp_alloc_bitsize(d, b) (b)
=20
 unsigned long domain_get_maximum_gpfn(struct domain *d);
diff --git a/xen/arch/ppc/include/asm/mm.h b/xen/arch/ppc/include/asm/mm.h
index a33eeec43bd6..e478291fdf55 100644
--- a/xen/arch/ppc/include/asm/mm.h
+++ b/xen/arch/ppc/include/asm/mm.h
@@ -96,7 +96,6 @@ static inline struct page_info *virt_to_page(const void *=
v)
 /* TODO: implement */
 #define mfn_valid(mfn) ({ (void) (mfn); 0; })
=20
-#define domain_set_alloc_bitsize(d) ((void)(d))
 #define domain_clamp_alloc_bitsize(d, b) (b)
=20
 #define PFN_ORDER(pfn_) ((pfn_)->v.free.order)
diff --git a/xen/arch/riscv/include/asm/mm.h b/xen/arch/riscv/include/asm/m=
m.h
index 9283616c0224..11e9f26bf0a5 100644
--- a/xen/arch/riscv/include/asm/mm.h
+++ b/xen/arch/riscv/include/asm/mm.h
@@ -292,7 +292,6 @@ static inline bool arch_mfns_in_directmap(unsigned long=
 mfn, unsigned long nr)
 /* TODO: implement */
 #define mfn_valid(mfn) ({ (void)(mfn); 0; })
=20
-#define domain_set_alloc_bitsize(d) ((void)(d))
 #define domain_clamp_alloc_bitsize(d, b) ((void)(d), (b))
=20
 #define PFN_ORDER(pg) ((pg)->v.free.order)
--=20
2.34.1


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From: Grygorii Strashko 
To: Grygorii Strashko ,
	"xen-devel@lists.xenproject.org" 
Subject: [PATCH v2 0/3] xen/x86: move d->arch.physaddr_bitsize field handling
 to pv32
Thread-Topic: [PATCH v2 0/3] xen/x86: move d->arch.physaddr_bitsize field
 handling to pv32
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From: Grygorii Strashko 

1) arm/ppc/riscv: drop unused domain_set_alloc_bitsize() macro
2) add generic domain_clamp_alloc_bitsize() macro and clean up !x86 arches
3) move d->arch.physaddr_bitsize field handling to pv32 code

changes in v2:
- split on 3 patches
- move physaddr_bitsize in struct pv_domain
- make minimal style adjustments as requested

Grygorii Strashko (3):
  arm/ppc/riscv: drop unused domain_set_alloc_bitsize() macro
  xen/mm: add generic domain_clamp_alloc_bitsize() macro
  xen/x86: move d->arch.physaddr_bitsize field handling to pv32

 xen/arch/arm/include/asm/mm.h     |  3 ---
 xen/arch/ppc/include/asm/mm.h     |  3 ---
 xen/arch/riscv/include/asm/mm.h   |  3 ---
 xen/arch/x86/include/asm/domain.h |  8 +++++---
 xen/arch/x86/include/asm/mm.h     |  7 +++++--
 xen/arch/x86/pv/dom0_build.c      |  6 ++++--
 xen/arch/x86/pv/domain.c          | 23 +++++++++++++++++++++++
 xen/arch/x86/x86_64/mm.c          | 20 --------------------
 xen/include/xen/mm.h              |  4 ++++
 9 files changed, 41 insertions(+), 36 deletions(-)

--=20
2.34.1


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From: Grygorii Strashko 
To: Grygorii Strashko ,
	"xen-devel@lists.xenproject.org" 
Subject: [PATCH v2 2/3] xen/mm: add generic domain_clamp_alloc_bitsize() macro
Thread-Topic: [PATCH v2 2/3] xen/mm: add generic domain_clamp_alloc_bitsize()
 macro
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Date: Thu, 27 Nov 2025 22:12:46 +0000
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From: Grygorii Strashko 

Add generic domain_clamp_alloc_bitsize() macro and clean up arch specific
defines.

Signed-off-by: Grygorii Strashko 
---
 xen/arch/arm/include/asm/mm.h   | 2 --
 xen/arch/ppc/include/asm/mm.h   | 2 --
 xen/arch/riscv/include/asm/mm.h | 2 --
 xen/arch/x86/include/asm/mm.h   | 1 +
 xen/include/xen/mm.h            | 4 ++++
 5 files changed, 5 insertions(+), 6 deletions(-)

diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h
index 4c6cc64aa7ba..ec2d2dc5372a 100644
--- a/xen/arch/arm/include/asm/mm.h
+++ b/xen/arch/arm/include/asm/mm.h
@@ -313,8 +313,6 @@ struct page_info *get_page_from_gva(struct vcpu *v, vad=
dr_t va,
 /* Arch-specific portion of memory_op hypercall. */
 long arch_memory_op(int op, XEN_GUEST_HANDLE_PARAM(void) arg);
=20
-#define domain_clamp_alloc_bitsize(d, b) (b)
-
 unsigned long domain_get_maximum_gpfn(struct domain *d);
=20
 /* Release all __init and __initdata ranges to be reused */
diff --git a/xen/arch/ppc/include/asm/mm.h b/xen/arch/ppc/include/asm/mm.h
index e478291fdf55..91c405876bd0 100644
--- a/xen/arch/ppc/include/asm/mm.h
+++ b/xen/arch/ppc/include/asm/mm.h
@@ -96,8 +96,6 @@ static inline struct page_info *virt_to_page(const void *=
v)
 /* TODO: implement */
 #define mfn_valid(mfn) ({ (void) (mfn); 0; })
=20
-#define domain_clamp_alloc_bitsize(d, b) (b)
-
 #define PFN_ORDER(pfn_) ((pfn_)->v.free.order)
=20
 struct page_info
diff --git a/xen/arch/riscv/include/asm/mm.h b/xen/arch/riscv/include/asm/m=
m.h
index 11e9f26bf0a5..e5ea91fa4d0c 100644
--- a/xen/arch/riscv/include/asm/mm.h
+++ b/xen/arch/riscv/include/asm/mm.h
@@ -292,8 +292,6 @@ static inline bool arch_mfns_in_directmap(unsigned long=
 mfn, unsigned long nr)
 /* TODO: implement */
 #define mfn_valid(mfn) ({ (void)(mfn); 0; })
=20
-#define domain_clamp_alloc_bitsize(d, b) ((void)(d), (b))
-
 #define PFN_ORDER(pg) ((pg)->v.free.order)
=20
 extern unsigned char cpu0_boot_stack[];
diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h
index 08153e6d6fa2..17ca6666a34e 100644
--- a/xen/arch/x86/include/asm/mm.h
+++ b/xen/arch/x86/include/asm/mm.h
@@ -621,6 +621,7 @@ extern int memory_add(unsigned long spfn, unsigned long=
 epfn, unsigned int pxm);
=20
 void domain_set_alloc_bitsize(struct domain *d);
 unsigned int domain_clamp_alloc_bitsize(struct domain *d, unsigned int bit=
s);
+#define domain_clamp_alloc_bitsize(d, bits) domain_clamp_alloc_bitsize(d, =
bits)
=20
 unsigned long domain_get_maximum_gpfn(struct domain *d);
=20
diff --git a/xen/include/xen/mm.h b/xen/include/xen/mm.h
index b968f47b87e0..426362adb2f4 100644
--- a/xen/include/xen/mm.h
+++ b/xen/include/xen/mm.h
@@ -641,4 +641,8 @@ static inline void put_page_alloc_ref(struct page_info =
*page)
     }
 }
=20
+#ifndef domain_clamp_alloc_bitsize
+#define domain_clamp_alloc_bitsize(d, bits) ((void)(d), (bits))
+#endif
+
 #endif /* __XEN_MM_H__ */
--=20
2.34.1


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From: Grygorii Strashko 
To: Grygorii Strashko ,
	"xen-devel@lists.xenproject.org" 
Subject: [PATCH v2 3/3] xen/x86: move d->arch.physaddr_bitsize field handling
 to pv32
Thread-Topic: [PATCH v2 3/3] xen/x86: move d->arch.physaddr_bitsize field
 handling to pv32
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Date: Thu, 27 Nov 2025 22:12:46 +0000
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From: Grygorii Strashko 

The d->arch.physaddr_bitsize field is used only by PV32 code, so:

- move domain_set_alloc_bitsize() function into PV32 code
- move domain_clamp_alloc_bitsize() function into PV32 code
- move d->arch.physaddr_bitsize field under PV32 ifdef into
  struct pv_domain

Signed-off-by: Grygorii Strashko 
---
 xen/arch/x86/include/asm/domain.h |  8 +++++---
 xen/arch/x86/include/asm/mm.h     |  6 ++++--
 xen/arch/x86/pv/dom0_build.c      |  6 ++++--
 xen/arch/x86/pv/domain.c          | 23 +++++++++++++++++++++++
 xen/arch/x86/x86_64/mm.c          | 20 --------------------
 5 files changed, 36 insertions(+), 27 deletions(-)

diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/d=
omain.h
index 5df8c7825333..6cdfdf8b5c26 100644
--- a/xen/arch/x86/include/asm/domain.h
+++ b/xen/arch/x86/include/asm/domain.h
@@ -276,6 +276,11 @@ struct pv_domain
=20
     atomic_t nr_l4_pages;
=20
+#ifdef CONFIG_PV32
+    /* Maximum physical-address bitwidth supported by this guest. */
+    unsigned int physaddr_bitsize;
+#endif
+
     /* Is a 32-bit PV guest? */
     bool is_32bit;
     /* XPTI active? */
@@ -316,9 +321,6 @@ struct arch_domain
     unsigned int hv_compat_vstart;
 #endif
=20
-    /* Maximum physical-address bitwidth supported by this guest. */
-    unsigned int physaddr_bitsize;
-
     /* I/O-port admin-specified access capabilities. */
     struct rangeset *ioport_caps;
     uint32_t pci_cf8;
diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h
index 17ca6666a34e..128115442ecc 100644
--- a/xen/arch/x86/include/asm/mm.h
+++ b/xen/arch/x86/include/asm/mm.h
@@ -619,9 +619,11 @@ void __iomem *ioremap_wc(paddr_t pa, size_t len);
=20
 extern int memory_add(unsigned long spfn, unsigned long epfn, unsigned int=
 pxm);
=20
-void domain_set_alloc_bitsize(struct domain *d);
-unsigned int domain_clamp_alloc_bitsize(struct domain *d, unsigned int bit=
s);
+#ifdef CONFIG_PV32
+unsigned int domain_clamp_alloc_bitsize(const struct domain *d,
+                                        unsigned int bits);
 #define domain_clamp_alloc_bitsize(d, bits) domain_clamp_alloc_bitsize(d, =
bits)
+#endif
=20
 unsigned long domain_get_maximum_gpfn(struct domain *d);
=20
diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c
index 21158ce1812e..e4f95d8f2fc8 100644
--- a/xen/arch/x86/pv/dom0_build.c
+++ b/xen/arch/x86/pv/dom0_build.c
@@ -626,8 +626,9 @@ static int __init dom0_construct(const struct boot_doma=
in *bd)
         initrd_mfn =3D paddr_to_pfn(initrd->start);
         mfn =3D initrd_mfn;
         count =3D PFN_UP(initrd_len);
-        if ( d->arch.physaddr_bitsize &&
-             ((mfn + count - 1) >> (d->arch.physaddr_bitsize - PAGE_SHIFT)=
) )
+#ifdef CONFIG_PV32
+        if ( d->arch.pv.physaddr_bitsize &&
+             ((mfn + count - 1) >> (d->arch.pv.physaddr_bitsize - PAGE_SHI=
FT)) )
         {
             order =3D get_order_from_pages(count);
             page =3D alloc_domheap_pages(d, order, MEMF_no_scrub);
@@ -650,6 +651,7 @@ static int __init dom0_construct(const struct boot_doma=
in *bd)
             initrd->start =3D pfn_to_paddr(initrd_mfn);
         }
         else
+#endif
         {
             while ( count-- )
                 if ( assign_pages(mfn_to_page(_mfn(mfn++)), 1, d, 0) )
diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c
index 9c4785c187dd..ad40a712ac5f 100644
--- a/xen/arch/x86/pv/domain.c
+++ b/xen/arch/x86/pv/domain.c
@@ -230,6 +230,29 @@ unsigned long pv_make_cr4(const struct vcpu *v)
 }
=20
 #ifdef CONFIG_PV32
+unsigned int domain_clamp_alloc_bitsize(const struct domain *d,
+                                        unsigned int bits)
+{
+    if ( (d =3D=3D NULL) || (d->arch.pv.physaddr_bitsize =3D=3D 0) )
+        return bits;
+
+    return min(d->arch.pv.physaddr_bitsize, bits);
+}
+
+static void domain_set_alloc_bitsize(struct domain *d)
+{
+    if ( !is_pv_32bit_domain(d) ||
+         (MACH2PHYS_COMPAT_NR_ENTRIES(d) >=3D max_page) ||
+         d->arch.pv.physaddr_bitsize > 0 )
+        return;
+
+    d->arch.pv.physaddr_bitsize =3D
+        /* 2^n entries can be contained in guest's p2m mapping space */
+        fls(MACH2PHYS_COMPAT_NR_ENTRIES(d)) - 1
+        /* 2^n pages -> 2^(n+PAGE_SHIFT) bits */
+        + PAGE_SHIFT;
+}
+
 int switch_compat(struct domain *d)
 {
     struct vcpu *v;
diff --git a/xen/arch/x86/x86_64/mm.c b/xen/arch/x86/x86_64/mm.c
index d4e6a9c0a2e0..8eadab7933d0 100644
--- a/xen/arch/x86/x86_64/mm.c
+++ b/xen/arch/x86/x86_64/mm.c
@@ -1119,26 +1119,6 @@ unmap:
     return ret;
 }
=20
-void domain_set_alloc_bitsize(struct domain *d)
-{
-    if ( !is_pv_32bit_domain(d) ||
-         (MACH2PHYS_COMPAT_NR_ENTRIES(d) >=3D max_page) ||
-         d->arch.physaddr_bitsize > 0 )
-        return;
-    d->arch.physaddr_bitsize =3D
-        /* 2^n entries can be contained in guest's p2m mapping space */
-        fls(MACH2PHYS_COMPAT_NR_ENTRIES(d)) - 1
-        /* 2^n pages -> 2^(n+PAGE_SHIFT) bits */
-        + PAGE_SHIFT;
-}
-
-unsigned int domain_clamp_alloc_bitsize(struct domain *d, unsigned int bit=
s)
-{
-    if ( (d =3D=3D NULL) || (d->arch.physaddr_bitsize =3D=3D 0) )
-        return bits;
-    return min(d->arch.physaddr_bitsize, bits);
-}
-
 static int transfer_pages_to_heap(struct mem_hotadd_info *info)
 {
     unsigned long i;
--=20
2.34.1


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Date: Thu, 27 Nov 2025 22:24:01 +0000
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Cc: andrew.cooper3@citrix.com
Subject: Re: [PATCH v2 0/3] xen/x86: move d->arch.physaddr_bitsize field
 handling to pv32
To: Grygorii Strashko ,
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On 27/11/2025 10:12 pm, Grygorii Strashko wrote:
> From: Grygorii Strashko 
>
> 1) arm/ppc/riscv: drop unused domain_set_alloc_bitsize() macro
> 2) add generic domain_clamp_alloc_bitsize() macro and clean up !x86 arches
> 3) move d->arch.physaddr_bitsize field handling to pv32 code
>
> changes in v2:
> - split on 3 patches
> - move physaddr_bitsize in struct pv_domain
> - make minimal style adjustments as requested
>
> Grygorii Strashko (3):
>   arm/ppc/riscv: drop unused domain_set_alloc_bitsize() macro
>   xen/mm: add generic domain_clamp_alloc_bitsize() macro

These two should be merged.  You also need to CC the ARM/PPC/RISC-V
maintainers.

~Andrew


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Message-ID: <26f448be-4a7f-4346-928f-8185ca8ba222@citrix.com>
Date: Thu, 27 Nov 2025 23:09:42 +0000
User-Agent: Mozilla Thunderbird
Cc: andrew.cooper3@citrix.com
Subject: Re: [PATCH v2 3/3] xen/x86: move d->arch.physaddr_bitsize field
 handling to pv32
To: Grygorii Strashko ,
 "xen-devel@lists.xenproject.org" 
References: <20251127221244.3747918-1-grygorii_strashko@epam.com>
 <20251127221244.3747918-4-grygorii_strashko@epam.com>
Content-Language: en-GB
From: Andrew Cooper 
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On 27/11/2025 10:12 pm, Grygorii Strashko wrote:
> diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h
> index 17ca6666a34e..128115442ecc 100644
> --- a/xen/arch/x86/include/asm/mm.h
> +++ b/xen/arch/x86/include/asm/mm.h
> @@ -619,9 +619,11 @@ void __iomem *ioremap_wc(paddr_t pa, size_t len);
>  
>  extern int memory_add(unsigned long spfn, unsigned long epfn, unsigned int pxm);
>  
> -void domain_set_alloc_bitsize(struct domain *d);
> -unsigned int domain_clamp_alloc_bitsize(struct domain *d, unsigned int bits);
> +#ifdef CONFIG_PV32
> +unsigned int domain_clamp_alloc_bitsize(const struct domain *d,
> +                                        unsigned int bits);

Do not convert this, or any other domains/vcpus you see, to const.  I
realise you have been given conflicting information on this point, but
the maintainers as a whole agreed to not const pointers to complex
objects in the general case because of the churn it creates, and the
repeated examples of MISRA violations people have inserted to work
around the fact it shouldn't have been a const pointer to start with.

That aside, I think clamp wants to be a static inline here.  (Except it
can't be, so it needs to be a macro).

It's currently a concrete function call to very simple piece of logic,
where the callers have options to eliminate it entirely in the d = NULL
case if they could only see in.

#define domain_clamp_alloc_bitsize(d, bits)                             \
    (((d) && (d)->arch.pv.physaddr_bitsize)                             \
     ? min_t(uint32_t, (d)->arch.pv.physaddr_bitsize, bits) : bits)


seems to work.  The min_t() is because all callers pass in bits as a
long constant, tripping the typecheck in min().

> +#endif
>  
>  unsigned long domain_get_maximum_gpfn(struct domain *d);
>  
> diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c
> index 21158ce1812e..e4f95d8f2fc8 100644
> --- a/xen/arch/x86/pv/dom0_build.c
> +++ b/xen/arch/x86/pv/dom0_build.c
> @@ -626,8 +626,9 @@ static int __init dom0_construct(const struct boot_domain *bd)
>          initrd_mfn = paddr_to_pfn(initrd->start);
>          mfn = initrd_mfn;
>          count = PFN_UP(initrd_len);
> -        if ( d->arch.physaddr_bitsize &&
> -             ((mfn + count - 1) >> (d->arch.physaddr_bitsize - PAGE_SHIFT)) )

While you're editing this, blank line here please.

> +#ifdef CONFIG_PV32
> +        if ( d->arch.pv.physaddr_bitsize &&
> +             ((mfn + count - 1) >> (d->arch.pv.physaddr_bitsize - PAGE_SHIFT)) )
>          {
>              order = get_order_from_pages(count);
>              page = alloc_domheap_pages(d, order, MEMF_no_scrub);
> @@ -650,6 +651,7 @@ static int __init dom0_construct(const struct boot_domain *bd)
>              initrd->start = pfn_to_paddr(initrd_mfn);
>          }
>          else
> +#endif
>          {
>              while ( count-- )
>                  if ( assign_pages(mfn_to_page(_mfn(mfn++)), 1, d, 0) )
> diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c
> index 9c4785c187dd..ad40a712ac5f 100644
> --- a/xen/arch/x86/pv/domain.c
> +++ b/xen/arch/x86/pv/domain.c
> @@ -230,6 +230,29 @@ unsigned long pv_make_cr4(const struct vcpu *v)
>  }
>  
>  #ifdef CONFIG_PV32
> +unsigned int domain_clamp_alloc_bitsize(const struct domain *d,
> +                                        unsigned int bits)
> +{
> +    if ( (d == NULL) || (d->arch.pv.physaddr_bitsize == 0) )
> +        return bits;
> +
> +    return min(d->arch.pv.physaddr_bitsize, bits);
> +}
> +
> +static void domain_set_alloc_bitsize(struct domain *d)
> +{
> +    if ( !is_pv_32bit_domain(d) ||
> +         (MACH2PHYS_COMPAT_NR_ENTRIES(d) >= max_page) ||
> +         d->arch.pv.physaddr_bitsize > 0 )
> +        return;
> +
> +    d->arch.pv.physaddr_bitsize =
> +        /* 2^n entries can be contained in guest's p2m mapping space */
> +        fls(MACH2PHYS_COMPAT_NR_ENTRIES(d)) - 1
> +        /* 2^n pages -> 2^(n+PAGE_SHIFT) bits */
> +        + PAGE_SHIFT;
> +}

The single caller has just set d->arch.pv.is_32bit = true, but the
compiler can't eliminate the first condition because of the embedded
evaluate_nospec().  Nor the 3rd condition, because it can't reason about
the singleton nature of switch_compat().

Thus, it would be better inlined fully, as:

    if ( MACH2PHYS_COMPAT_NR_ENTRIES(d) >= max_page )
        d->arch.pv.physaddr_bitsize =
            /* 2^n entries can be contained in guest's p2m mapping space */
            fls(MACH2PHYS_COMPAT_NR_ENTRIES(d)) - 1 + PAGE_SHIFT;


which is rather easier to follow.  Even the comment about PAGE_SHIFT is
more noise than help.

In an ideal world it ought to be in its own patch, and in principle I'm
happy to draft one with a fuller explanation if you'd prefer, but given
the repositioning of physaddr_bitsize into pv domain as wekk, it's
probably all better together in this single patch.

~Andrew


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Date: Fri, 28 Nov 2025 14:35:25 +0800
From: kernel test robot 
To: Thierry Reding 
CC: , , "Rafael J. Wysocki"
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Subject: [linux-next:master] [syscore]  a97fbc3ee3:
 will-it-scale.per_process_ops 3.2% regression
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Hello,

kernel test robot noticed a 3.2% regression of will-it-scale.per_process_ops on:


commit: a97fbc3ee3e2a536fafaff04f21f45472db71769 ("syscore: Pass context data to callbacks")
https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git master

[still regression on linux-next/master ef68bf704646690aba5e81c2f7be8d6ef13d7ad8]

testcase: will-it-scale
config: x86_64-rhel-9.4
compiler: gcc-14
test machine: 64 threads 2 sockets Intel(R) Xeon(R) Gold 6346 CPU @ 3.10GHz (Ice Lake) with 256G memory
parameters:

	nr_task: 100%
	mode: process
	test: signal1
	cpufreq_governor: performance




If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot 
| Closes: https://lore.kernel.org/oe-lkp/202511281432.47ac7e38-lkp@intel.com


Details are as below:
-------------------------------------------------------------------------------------------------->


The kernel config and materials to reproduce are available at:
https://download.01.org/0day-ci/archive/20251128/202511281432.47ac7e38-lkp@intel.com

=========================================================================================
compiler/cpufreq_governor/kconfig/mode/nr_task/rootfs/tbox_group/test/testcase:
  gcc-14/performance/x86_64-rhel-9.4/process/100%/debian-13-x86_64-20250902.cgz/lkp-icl-2sp7/signal1/will-it-scale

commit: 
  v6.18-rc1
  a97fbc3ee3 ("syscore: Pass context data to callbacks")

       v6.18-rc1 a97fbc3ee3e2a536fafaff04f21 
---------------- --------------------------- 
         %stddev     %change         %stddev
             \          |                \  
     71066 ±105%    +119.1%     155709 ± 64%  numa-meminfo.node1.AnonHugePages
     34.80 ±105%    +118.6%      76.08 ± 64%  numa-vmstat.node1.nr_anon_transparent_hugepages
      0.34            +0.2        0.52 ± 25%  mpstat.cpu.all.idle%
      0.01            +0.0        0.01 ±  3%  mpstat.cpu.all.soft%
    142.02 ±  5%     +20.2%     170.65 ±  9%  sched_debug.cfs_rq:/.runnable_avg.stddev
      7.16 ±  5%     +52.9%      10.94 ±  8%  sched_debug.cpu.clock.stddev
      1233 ±  4%     -22.2%     960.17 ±  8%  perf-c2c.DRAM.remote
      2429 ±  3%     -18.0%       1993        perf-c2c.HITM.local
      1010 ±  5%     -29.8%     709.00 ±  2%  perf-c2c.HITM.remote
   8382642            -3.2%    8118230        will-it-scale.64.processes
    130978            -3.2%     126846        will-it-scale.per_process_ops
   8382642            -3.2%    8118230        will-it-scale.workload
    285565            -1.6%     280908        proc-vmstat.nr_active_anon
     28063            +4.4%      29306        proc-vmstat.nr_mapped
    117169            -3.9%     112656        proc-vmstat.nr_shmem
    285565            -1.6%     280908        proc-vmstat.nr_zone_active_anon
     38231 ± 33%     -48.6%      19647 ± 35%  proc-vmstat.numa_hint_faults
     19706 ± 75%     -65.5%       6790 ± 15%  proc-vmstat.numa_hint_faults_local
 9.391e+09            -3.1%  9.102e+09        perf-stat.i.branch-instructions
      0.48            -0.0        0.45        perf-stat.i.branch-miss-rate%
  45545162           -10.7%   40674481        perf-stat.i.branch-misses
     11.08 ±  8%      -2.3        8.81 ± 12%  perf-stat.i.cache-miss-rate%
      1811            +6.2%       1922        perf-stat.i.context-switches
      5.09            +3.2%       5.26        perf-stat.i.cpi
    117.53            -2.1%     115.06        perf-stat.i.cpu-migrations
    216404 ±  2%     +86.7%     404107 ±  4%  perf-stat.i.cycles-between-cache-misses
  3.87e+10            -3.1%  3.752e+10        perf-stat.i.instructions
      0.20            -3.1%       0.19        perf-stat.i.ipc
      0.49            -0.0        0.45        perf-stat.overall.branch-miss-rate%
      5.10            +3.2%       5.26        perf-stat.overall.cpi
      0.20            -3.1%       0.19        perf-stat.overall.ipc
 9.361e+09            -3.1%  9.068e+09        perf-stat.ps.branch-instructions
  45428240           -10.7%   40562730        perf-stat.ps.branch-misses
      1806            +6.2%       1917        perf-stat.ps.context-switches
    117.13            -2.1%     114.62        perf-stat.ps.cpu-migrations
 3.858e+10            -3.1%  3.738e+10        perf-stat.ps.instructions
 1.166e+13            -3.0%  1.131e+13        perf-stat.total.instructions
     32.30            -6.5       25.85        perf-profile.calltrace.cycles-pp.get_signal.arch_do_signal_or_restart.exit_to_user_mode_loop.do_syscall_64.entry_SYSCALL_64_after_hwframe
     31.42            -6.4       25.04        perf-profile.calltrace.cycles-pp.dequeue_signal.get_signal.arch_do_signal_or_restart.exit_to_user_mode_loop.do_syscall_64
     30.28            -6.3       23.98        perf-profile.calltrace.cycles-pp.dec_rlimit_put_ucounts.__sigqueue_free.dequeue_signal.get_signal.arch_do_signal_or_restart
     30.32            -6.3       24.02        perf-profile.calltrace.cycles-pp.__sigqueue_free.dequeue_signal.get_signal.arch_do_signal_or_restart.exit_to_user_mode_loop
     37.60            -6.0       31.57        perf-profile.calltrace.cycles-pp.arch_do_signal_or_restart.exit_to_user_mode_loop.do_syscall_64.entry_SYSCALL_64_after_hwframe
     37.68            -6.0       31.66        perf-profile.calltrace.cycles-pp.exit_to_user_mode_loop.do_syscall_64.entry_SYSCALL_64_after_hwframe
     90.92            -0.5       90.43        perf-profile.calltrace.cycles-pp.entry_SYSCALL_64_after_hwframe
     90.63            -0.5       90.14        perf-profile.calltrace.cycles-pp.do_syscall_64.entry_SYSCALL_64_after_hwframe
      0.62            +0.0        0.65        perf-profile.calltrace.cycles-pp.check_xstate_in_sigframe.__fpu_restore_sig.fpu__restore_sig.restore_sigcontext.__x64_sys_rt_sigreturn
      0.72 ±  2%      +0.0        0.75        perf-profile.calltrace.cycles-pp.kmem_cache_alloc_noprof.__send_signal_locked.do_send_sig_info.do_send_specific.__x64_sys_tgkill
      0.67            +0.0        0.70        perf-profile.calltrace.cycles-pp.__fpu_restore_sig.fpu__restore_sig.restore_sigcontext.__x64_sys_rt_sigreturn.do_syscall_64
      2.54            +0.0        2.58        perf-profile.calltrace.cycles-pp.fpu__restore_sig.restore_sigcontext.__x64_sys_rt_sigreturn.do_syscall_64.entry_SYSCALL_64_after_hwframe
      1.15            +0.0        1.19        perf-profile.calltrace.cycles-pp.fpu__clear_user_states.arch_do_signal_or_restart.exit_to_user_mode_loop.do_syscall_64.entry_SYSCALL_64_after_hwframe
      1.78            +0.0        1.83        perf-profile.calltrace.cycles-pp.clear_bhb_loop
      0.56            +0.1        0.61        perf-profile.calltrace.cycles-pp.rseq_ip_fixup.__rseq_handle_notify_resume.arch_do_signal_or_restart.exit_to_user_mode_loop.do_syscall_64
      1.46            +0.1        1.51        perf-profile.calltrace.cycles-pp.__restore_fpregs_from_user.restore_fpregs_from_user.fpu__restore_sig.restore_sigcontext.__x64_sys_rt_sigreturn
      1.62            +0.1        1.68        perf-profile.calltrace.cycles-pp.arch_do_signal_or_restart.exit_to_user_mode_loop.do_syscall_64.entry_SYSCALL_64_after_hwframe.handler
      3.06            +0.1        3.11        perf-profile.calltrace.cycles-pp.restore_sigcontext.__x64_sys_rt_sigreturn.do_syscall_64.entry_SYSCALL_64_after_hwframe
      1.69            +0.1        1.75        perf-profile.calltrace.cycles-pp.exit_to_user_mode_loop.do_syscall_64.entry_SYSCALL_64_after_hwframe.handler
      1.91            +0.1        1.98        perf-profile.calltrace.cycles-pp.entry_SYSCALL_64_after_hwframe.handler
      1.88            +0.1        1.96        perf-profile.calltrace.cycles-pp.do_syscall_64.entry_SYSCALL_64_after_hwframe.handler
      0.96            +0.1        1.04        perf-profile.calltrace.cycles-pp.save_xstate_epilog.get_sigframe.x64_setup_rt_frame.arch_do_signal_or_restart.exit_to_user_mode_loop
      0.93            +0.1        1.02        perf-profile.calltrace.cycles-pp.__rseq_handle_notify_resume.arch_do_signal_or_restart.exit_to_user_mode_loop.do_syscall_64.entry_SYSCALL_64_after_hwframe
      4.46            +0.1        4.57        perf-profile.calltrace.cycles-pp.__x64_sys_rt_sigreturn.do_syscall_64.entry_SYSCALL_64_after_hwframe
      2.18            +0.2        2.35        perf-profile.calltrace.cycles-pp.copy_fpstate_to_sigframe.get_sigframe.x64_setup_rt_frame.arch_do_signal_or_restart.exit_to_user_mode_loop
      4.88            +0.3        5.14        perf-profile.calltrace.cycles-pp.handler
      3.66            +0.3        3.95        perf-profile.calltrace.cycles-pp.get_sigframe.x64_setup_rt_frame.arch_do_signal_or_restart.exit_to_user_mode_loop.do_syscall_64
      4.16            +0.3        4.50        perf-profile.calltrace.cycles-pp.x64_setup_rt_frame.arch_do_signal_or_restart.exit_to_user_mode_loop.do_syscall_64.entry_SYSCALL_64_after_hwframe
      0.00            +0.5        0.51        perf-profile.calltrace.cycles-pp.restore_altstack.__x64_sys_rt_sigreturn.do_syscall_64.entry_SYSCALL_64_after_hwframe
      0.00            +0.5        0.52        perf-profile.calltrace.cycles-pp.__get_user_nocheck_8.__x64_sys_rt_sigreturn.do_syscall_64.entry_SYSCALL_64_after_hwframe
     45.91            +5.3       51.19        perf-profile.calltrace.cycles-pp.do_send_sig_info.do_send_specific.__x64_sys_tgkill.do_syscall_64.entry_SYSCALL_64_after_hwframe
     46.73            +5.3       52.02        perf-profile.calltrace.cycles-pp.do_send_specific.__x64_sys_tgkill.do_syscall_64.entry_SYSCALL_64_after_hwframe
     47.27            +5.3       52.57        perf-profile.calltrace.cycles-pp.__x64_sys_tgkill.do_syscall_64.entry_SYSCALL_64_after_hwframe
     45.10            +5.3       50.43        perf-profile.calltrace.cycles-pp.__send_signal_locked.do_send_sig_info.do_send_specific.__x64_sys_tgkill.do_syscall_64
     43.31            +5.3       48.65        perf-profile.calltrace.cycles-pp.inc_rlimit_get_ucounts.sig_get_ucounts.__send_signal_locked.do_send_sig_info.do_send_specific
     43.39            +5.3       48.73        perf-profile.calltrace.cycles-pp.sig_get_ucounts.__send_signal_locked.do_send_sig_info.do_send_specific.__x64_sys_tgkill
     32.36            -6.5       25.90        perf-profile.children.cycles-pp.get_signal
     31.44            -6.4       25.06        perf-profile.children.cycles-pp.dequeue_signal
     30.29            -6.3       23.99        perf-profile.children.cycles-pp.dec_rlimit_put_ucounts
     30.33            -6.3       24.03        perf-profile.children.cycles-pp.__sigqueue_free
     39.26            -6.0       33.30        perf-profile.children.cycles-pp.arch_do_signal_or_restart
     39.38            -5.9       33.43        perf-profile.children.cycles-pp.exit_to_user_mode_loop
     93.64            -0.3       93.30        perf-profile.children.cycles-pp.entry_SYSCALL_64_after_hwframe
     93.28            -0.3       92.95        perf-profile.children.cycles-pp.do_syscall_64
      0.36 ± 11%      -0.1        0.25        perf-profile.children.cycles-pp.recalc_sigpending
      0.61 ± 11%      -0.1        0.50 ±  6%  perf-profile.children.cycles-pp._raw_spin_lock_irq
      0.43            -0.1        0.38        perf-profile.children.cycles-pp.fpregs_mark_activate
      0.44            -0.0        0.40        perf-profile.children.cycles-pp.complete_signal
      0.27 ±  5%      -0.0        0.23 ±  3%  perf-profile.children.cycles-pp.sysvec_apic_timer_interrupt
      0.25 ±  6%      -0.0        0.22 ±  5%  perf-profile.children.cycles-pp.__sysvec_apic_timer_interrupt
      0.25 ±  6%      -0.0        0.22 ±  5%  perf-profile.children.cycles-pp.hrtimer_interrupt
      0.25            -0.0        0.22 ±  5%  perf-profile.children.cycles-pp._raw_spin_lock_irqsave
      0.29 ±  5%      -0.0        0.26 ±  3%  perf-profile.children.cycles-pp.asm_sysvec_apic_timer_interrupt
      0.31 ±  2%      -0.0        0.28        perf-profile.children.cycles-pp.set_current_blocked
      0.05            +0.0        0.06        perf-profile.children.cycles-pp.fpu__alloc_mathframe
      0.06            +0.0        0.07        perf-profile.children.cycles-pp.__cond_resched
      0.20            +0.0        0.21        perf-profile.children.cycles-pp.syscall_return_via_sysret
      0.24            +0.0        0.25        perf-profile.children.cycles-pp.__get_user_nocheck_4
      0.39            +0.0        0.40        perf-profile.children.cycles-pp.entry_SYSCALL_64_safe_stack
      0.72            +0.0        0.74        perf-profile.children.cycles-pp.entry_SYSRETQ_unsafe_stack
      0.20            +0.0        0.22        perf-profile.children.cycles-pp.__get_user_8
      0.22 ±  2%      +0.0        0.24        perf-profile.children.cycles-pp.__put_user_8
      0.46 ±  3%      +0.0        0.48        perf-profile.children.cycles-pp.__memcg_slab_post_alloc_hook
      0.69            +0.0        0.71        perf-profile.children.cycles-pp.__fpu_restore_sig
      0.27            +0.0        0.30        perf-profile.children.cycles-pp.rseq_get_rseq_cs
      0.63            +0.0        0.66        perf-profile.children.cycles-pp.check_xstate_in_sigframe
      0.74            +0.0        0.77        perf-profile.children.cycles-pp.kmem_cache_alloc_noprof
      0.50            +0.0        0.53        perf-profile.children.cycles-pp.restore_altstack
      0.32            +0.0        0.35        perf-profile.children.cycles-pp.rseq_update_cpu_node_id
      0.36            +0.0        0.39        perf-profile.children.cycles-pp.__put_user_nocheck_4
      0.69            +0.0        0.73        perf-profile.children.cycles-pp.arch_exit_to_user_mode_prepare
      0.37            +0.0        0.40        perf-profile.children.cycles-pp.__put_user_nocheck_8
      2.06            +0.0        2.10        perf-profile.children.cycles-pp.__getpid
      0.66            +0.0        0.70        perf-profile.children.cycles-pp._copy_from_user
      2.55            +0.0        2.59        perf-profile.children.cycles-pp.fpu__restore_sig
      0.87            +0.0        0.91        perf-profile.children.cycles-pp.its_return_thunk
      1.21            +0.0        1.25        perf-profile.children.cycles-pp.fpu__clear_user_states
      1.48            +0.0        1.52        perf-profile.children.cycles-pp.__restore_fpregs_from_user
      2.39            +0.1        2.44        perf-profile.children.cycles-pp.clear_bhb_loop
      0.09 ±  4%      +0.1        0.14 ±  4%  perf-profile.children.cycles-pp.shmem_file_write_iter
      0.08            +0.1        0.14 ±  5%  perf-profile.children.cycles-pp.generic_perform_write
      0.00            +0.1        0.06 ±  8%  perf-profile.children.cycles-pp.shmem_get_folio_gfp
      0.10 ±  3%      +0.1        0.16 ±  3%  perf-profile.children.cycles-pp.perf_mmap__push
      0.00            +0.1        0.06 ±  6%  perf-profile.children.cycles-pp.shmem_write_begin
      0.58            +0.1        0.64        perf-profile.children.cycles-pp.rseq_ip_fixup
      3.08            +0.1        3.13        perf-profile.children.cycles-pp.restore_sigcontext
      0.10 ±  3%      +0.1        0.16 ±  4%  perf-profile.children.cycles-pp.record__mmap_read_evlist
      0.09 ±  5%      +0.1        0.15 ±  4%  perf-profile.children.cycles-pp.record__pushfn
      0.12 ±  4%      +0.1        0.18 ±  4%  perf-profile.children.cycles-pp.handle_internal_command
      0.12 ±  4%      +0.1        0.18 ±  4%  perf-profile.children.cycles-pp.main
      0.12 ±  4%      +0.1        0.18 ±  4%  perf-profile.children.cycles-pp.run_builtin
      0.11 ±  6%      +0.1        0.17 ±  5%  perf-profile.children.cycles-pp.cmd_record
      0.98            +0.1        1.06        perf-profile.children.cycles-pp.__get_user_nocheck_8
      1.36            +0.1        1.45        perf-profile.children.cycles-pp.native_irq_return_iret
      1.00            +0.1        1.09        perf-profile.children.cycles-pp.save_xstate_epilog
      0.95            +0.1        1.04        perf-profile.children.cycles-pp.__rseq_handle_notify_resume
      4.52            +0.1        4.64        perf-profile.children.cycles-pp.__x64_sys_rt_sigreturn
      2.27            +0.2        2.45        perf-profile.children.cycles-pp.copy_fpstate_to_sigframe
      3.68            +0.2        3.86        perf-profile.children.cycles-pp.handler
      3.68            +0.3        3.98        perf-profile.children.cycles-pp.get_sigframe
      4.21            +0.3        4.55        perf-profile.children.cycles-pp.x64_setup_rt_frame
     45.96            +5.3       51.25        perf-profile.children.cycles-pp.do_send_sig_info
     46.77            +5.3       52.07        perf-profile.children.cycles-pp.do_send_specific
     47.30            +5.3       52.60        perf-profile.children.cycles-pp.__x64_sys_tgkill
     45.18            +5.3       50.51        perf-profile.children.cycles-pp.__send_signal_locked
     43.40            +5.3       48.74        perf-profile.children.cycles-pp.sig_get_ucounts
     43.32            +5.3       48.66        perf-profile.children.cycles-pp.inc_rlimit_get_ucounts
     30.28            -6.3       23.98        perf-profile.self.cycles-pp.dec_rlimit_put_ucounts
      0.34 ± 12%      -0.1        0.23 ±  2%  perf-profile.self.cycles-pp.recalc_sigpending
      0.58 ± 12%      -0.1        0.48 ±  6%  perf-profile.self.cycles-pp._raw_spin_lock_irq
      0.31            -0.1        0.25 ±  2%  perf-profile.self.cycles-pp.complete_signal
      0.36            -0.1        0.31        perf-profile.self.cycles-pp.fpregs_mark_activate
      0.23 ±  2%      -0.0        0.20 ±  3%  perf-profile.self.cycles-pp._raw_spin_lock_irqsave
      0.20            +0.0        0.21        perf-profile.self.cycles-pp.arch_do_signal_or_restart
      0.07            +0.0        0.08        perf-profile.self.cycles-pp.collect_signal
      0.40            +0.0        0.41        perf-profile.self.cycles-pp.__getpid
      0.20            +0.0        0.21        perf-profile.self.cycles-pp.syscall_return_via_sysret
      0.23            +0.0        0.24 ±  2%  perf-profile.self.cycles-pp.__get_user_nocheck_4
      0.15 ±  2%      +0.0        0.16 ±  2%  perf-profile.self.cycles-pp.__x64_sys_rt_sigreturn
      0.26            +0.0        0.28        perf-profile.self.cycles-pp.kmem_cache_free
      0.10            +0.0        0.11 ±  4%  perf-profile.self.cycles-pp.signal_setup_done
      0.70            +0.0        0.72        perf-profile.self.cycles-pp.entry_SYSRETQ_unsafe_stack
      0.18 ±  2%      +0.0        0.20        perf-profile.self.cycles-pp.__get_user_8
      0.21 ±  3%      +0.0        0.23        perf-profile.self.cycles-pp.__put_user_8
      0.25 ±  3%      +0.0        0.27 ±  2%  perf-profile.self.cycles-pp.__memcg_slab_post_alloc_hook
      0.47            +0.0        0.49        perf-profile.self.cycles-pp.get_signal
      0.52            +0.0        0.55        perf-profile.self.cycles-pp.its_return_thunk
      0.37            +0.0        0.40        perf-profile.self.cycles-pp.get_sigframe
      0.34            +0.0        0.37        perf-profile.self.cycles-pp.__put_user_nocheck_4
      0.31            +0.0        0.34        perf-profile.self.cycles-pp.rseq_update_cpu_node_id
      0.34            +0.0        0.38        perf-profile.self.cycles-pp.__put_user_nocheck_8
      0.37 ±  2%      +0.0        0.41        perf-profile.self.cycles-pp.save_xstate_epilog
      0.64            +0.0        0.68        perf-profile.self.cycles-pp.arch_exit_to_user_mode_prepare
      0.64            +0.0        0.68        perf-profile.self.cycles-pp._copy_from_user
      0.53            +0.0        0.57        perf-profile.self.cycles-pp.x64_setup_rt_frame
      1.46            +0.0        1.51        perf-profile.self.cycles-pp.__restore_fpregs_from_user
      2.36            +0.1        2.41        perf-profile.self.cycles-pp.clear_bhb_loop
      1.00            +0.1        1.06        perf-profile.self.cycles-pp.fpu__clear_user_states
      0.94            +0.1        1.01        perf-profile.self.cycles-pp.__get_user_nocheck_8
      1.36            +0.1        1.45        perf-profile.self.cycles-pp.native_irq_return_iret
      1.45            +0.1        1.55        perf-profile.self.cycles-pp.copy_fpstate_to_sigframe
     43.32            +5.3       48.66        perf-profile.self.cycles-pp.inc_rlimit_get_ucounts




Disclaimer:
Results have been estimated based on internal Intel analysis and are provided
for informational purposes only. Any difference in system hardware or software
design or configuration may affect actual performance.


-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki



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On 27.11.2025 20:31, Andrew Cooper wrote:
> On 26/11/2025 1:48 pm, Jan Beulich wrote:
>> --- a/xen/scripts/Kbuild.include
>> +++ b/xen/scripts/Kbuild.include
>> @@ -56,6 +56,19 @@ define filechk
>>  	fi
>>  endef
>>  
>> +###
>> +# Compare the symbol tables of two object files.  As diff's -I option isn't
>> +# standardized, the name difference of the two object files needs abstracting
>> +# out.
>> +define compare-symbol-tables
>> +    ln -f $(1) $(@D)/.cst.$$$$; \
>> +    $(OBJDUMP) -t $(@D)/.cst.$$$$ > $(1).sym; \
>> +    ln -f $(1) $(@D)/.cst.$$$$; \
>> +    $(OBJDUMP) -t $(@D)/.cst.$$$$ > $(2).sym; \
>> +    rm -f $(@D)/.cst.$$$$
> 
> Doesn't the second link want to be `ln -f $(2)` ?
> 
> It looks like this is comparing $(1) to itself.

Ouch. Now I'll be curious if with this corrected I still see this pass
successfully.

>> +    diff -u $(1).sym $(2).sym
>> +endef
> 
> While I am generally in favour of build time checks, this looks like
> it's a large overhead?

I don't think it's really noticeable in the overall link time, considering
how slow especially the xen.efi linking is.

Jan


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Subject: Re: [PATCH v1.9 3/3] x86/amd: Fix race editing DE_CFG
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On 27.11.2025 18:18, Andrew Cooper wrote:
> We have two different functions explaining that DE_CFG is Core-scoped and that
> writes are racy but happen to be safe.  This is only true when there's one of
> them.
> 
> Introduce amd_init_de_cfg() to be the singular function which writes to
> DE_CFG, modelled after the logic we already have for BP_CFG.
> 
> While reworking amd_check_zenbleed() into a simple predicate used by
> amd_init_de_cfg(), fix the microcode table.  The 'good_rev' was specific to an
> individual stepping and not valid to be matched by model, let alone a range.
> The only CPUs incorrectly matched that I can locate appear to be
> pre-production, and probably didn't get Zenbleed microcode.
> 
> Rework amd_init_lfence() to be amd_init_lfence_dispatch() with only the
> purpose of configuring X86_FEATURE_LFENCE_DISPATCH in the case that it needs
> synthesising.  Run it on the BSP only and use setup_force_cpu_cap() to prevent
> the bit disappearing on a subseuqent CPUID rescan.
> 
> Signed-off-by: Andrew Cooper 

Reviewed-by: Jan Beulich 
with one more request towards commentary:

> +void amd_init_de_cfg(const struct cpuinfo_x86 *c)
> +{
> +    uint64_t val, new = 0;
> +
> +    /*
> +     * The MSR doesn't exist on Fam 0xf/0x11.  If virtualised, we won't have
> +     * mutable access even if we can read it.
> +     */
> +    if ( c->family == 0xf || c->family == 0x11 || cpu_has_hypervisor )
> +        return;
> +
> +    /*
> +     * On Zen3 (Fam 0x19) and later CPUs, LFENCE is unconditionally dispatch
> +     * serialising, and is enumerated in CPUID.
> +     *
> +     * On older systems, LFENCE is unconditionally dispatch serialising (when
> +     * the MSR doesn't exist), or can be made so by setting this bit.
> +     */
> +    if ( !test_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability) )
> +        new |= AMD64_DE_CFG_LFENCE_SERIALISE;
> +
> +    /*
> +     * If vulnerable to Zenbleed and not mitigated in microcode, use the
> +     * bigger hammer.
> +     */
> +    if ( zenbleed_use_chickenbit() )
> +        new |= (1 << 9);
> +
> +    if ( !new )
> +        return;
> +
> +    val = rdmsr(MSR_AMD64_DE_CFG);
> +
> +    if ( (val & new) == new )
> +        return;
> +
> +    /*
> +     * DE_CFG is a Core-scoped MSR, and this write is racy.  However, both
> +     * threads calculate the new value from state which expected to be
> +     * consistent across CPUs and unrelated to the old value, so the result
> +     * should be consistent.
> +     */
> +    wrmsr(MSR_AMD64_DE_CFG, val | new);

The reason this isn't at risk of faulting when potentially trying to set a
reserved bit would better be at least briefly mentioned here, I think. Yes,
logic above tries to eliminate all cases where either bit may be reserved,
but we're still on somewhat thin ice here.

Jan


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Subject: Re: [PATCH v2 3/3] xen/x86: move d->arch.physaddr_bitsize field
 handling to pv32
To: Andrew Cooper 
References: <20251127221244.3747918-1-grygorii_strashko@epam.com>
 <20251127221244.3747918-4-grygorii_strashko@epam.com>
 <26f448be-4a7f-4346-928f-8185ca8ba222@citrix.com>
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Cc: Grygorii Strashko ,
 "xen-devel@lists.xenproject.org" 
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On 28.11.2025 00:09, Andrew Cooper wrote:
> On 27/11/2025 10:12 pm, Grygorii Strashko wrote:
>> diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h
>> index 17ca6666a34e..128115442ecc 100644
>> --- a/xen/arch/x86/include/asm/mm.h
>> +++ b/xen/arch/x86/include/asm/mm.h
>> @@ -619,9 +619,11 @@ void __iomem *ioremap_wc(paddr_t pa, size_t len);
>>  
>>  extern int memory_add(unsigned long spfn, unsigned long epfn, unsigned int pxm);
>>  
>> -void domain_set_alloc_bitsize(struct domain *d);
>> -unsigned int domain_clamp_alloc_bitsize(struct domain *d, unsigned int bits);
>> +#ifdef CONFIG_PV32
>> +unsigned int domain_clamp_alloc_bitsize(const struct domain *d,
>> +                                        unsigned int bits);
> 
> Do not convert this, or any other domains/vcpus you see, to const.  I
> realise you have been given conflicting information on this point, but
> the maintainers as a whole agreed to not const pointers to complex
> objects in the general case because of the churn it creates, and the
> repeated examples of MISRA violations people have inserted to work
> around the fact it shouldn't have been a const pointer to start with.

While moot here when indeed converted to a macro, as you suggest below,
I don't recall "maintainers as a whole agreed" on this. For one there
are predicate-like functions where I think even you agreed their
parameters can be pointer-to-const. The case here isn't very far from
predicate-like, in particular ...

> That aside, I think clamp wants to be a static inline here.  (Except it
> can't be, so it needs to be a macro).
> 
> It's currently a concrete function call to very simple piece of logic,
> where the callers have options to eliminate it entirely in the d = NULL
> case if they could only see in.
> 
> #define domain_clamp_alloc_bitsize(d, bits)                             \
>     (((d) && (d)->arch.pv.physaddr_bitsize)                             \
>      ? min_t(uint32_t, (d)->arch.pv.physaddr_bitsize, bits) : bits)

... this representation alone demonstrates that what d points to is only
ever read.

Yes, there are cases where the situation is more complex, and where I can
see how my pov may not be shared by others. Yet still - can you point me
to a written form of the supposed agreement among maintainers? Imo
something like this, which has been controversial for a long time, really
needs recording in ./CODING_STYLE or docs/process/coding-best-practices.pandoc.
And then preferably in a shape acceptable to everyone (i.e. no outright
"never").

Jan


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Subject: Re: [PATCH v2 0/3] xen/x86: move d->arch.physaddr_bitsize field
 handling to pv32
To: Andrew Cooper 
References: <20251127221244.3747918-1-grygorii_strashko@epam.com>
 <802d2971-4cc0-46c1-bc24-4ec15c712118@citrix.com>
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On 27.11.2025 23:24, Andrew Cooper wrote:
> On 27/11/2025 10:12 pm, Grygorii Strashko wrote:
>> From: Grygorii Strashko 
>>
>> 1) arm/ppc/riscv: drop unused domain_set_alloc_bitsize() macro
>> 2) add generic domain_clamp_alloc_bitsize() macro and clean up !x86 arches
>> 3) move d->arch.physaddr_bitsize field handling to pv32 code
>>
>> changes in v2:
>> - split on 3 patches
>> - move physaddr_bitsize in struct pv_domain
>> - make minimal style adjustments as requested
>>
>> Grygorii Strashko (3):
>>   arm/ppc/riscv: drop unused domain_set_alloc_bitsize() macro
>>   xen/mm: add generic domain_clamp_alloc_bitsize() macro
> 
> These two should be merged.

Why? They're dealing with two separate macros / functions ("set" vs "clamp").

Jan


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On 27.11.2025 23:12, Grygorii Strashko wrote:
> From: Grygorii Strashko 
> 
> 1) arm/ppc/riscv: drop unused domain_set_alloc_bitsize() macro
> 2) add generic domain_clamp_alloc_bitsize() macro and clean up !x86 arches
> 3) move d->arch.physaddr_bitsize field handling to pv32 code
> 
> changes in v2:
> - split on 3 patches
> - move physaddr_bitsize in struct pv_domain
> - make minimal style adjustments as requested
> 
> Grygorii Strashko (3):
>   arm/ppc/riscv: drop unused domain_set_alloc_bitsize() macro
>   xen/mm: add generic domain_clamp_alloc_bitsize() macro

As I'm happy with these two being separate:
Acked-by: Jan Beulich 

But of course Andrew's objection needs dealing with before they can go in. And
as he said, at least Arm maintainers need Cc-ing for them to actually be aware
that their ack is going to be needed.

Jan

>   xen/x86: move d->arch.physaddr_bitsize field handling to pv32
> 
>  xen/arch/arm/include/asm/mm.h     |  3 ---
>  xen/arch/ppc/include/asm/mm.h     |  3 ---
>  xen/arch/riscv/include/asm/mm.h   |  3 ---
>  xen/arch/x86/include/asm/domain.h |  8 +++++---
>  xen/arch/x86/include/asm/mm.h     |  7 +++++--
>  xen/arch/x86/pv/dom0_build.c      |  6 ++++--
>  xen/arch/x86/pv/domain.c          | 23 +++++++++++++++++++++++
>  xen/arch/x86/x86_64/mm.c          | 20 --------------------
>  xen/include/xen/mm.h              |  4 ++++
>  9 files changed, 41 insertions(+), 36 deletions(-)
> 



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In-Reply-To: <0a66c71356e8d6ea788022438d7a73dbff8aa5b9.1764243466.git.oleksii.kurochko@gmail.com>
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On 27.11.2025 17:26, Oleksii Kurochko wrote:
> From: Roger Pau Monne 
> 
> Move x86's free_domain_struct() to common code since it is shared between
> architectures.
> 
> Move the x86 version of alloc_domain_struct() to common code as most of the
> logic is architecture-independent. To handle the remaining architectural
> differences, introduce arch_domain_struct_memflags() for x86-specific
> allocation requirements.
> 
> No functional change.
> 
> Suggested-by: Jan Beulich 
> [Introduce an arch-specific function instead of using a weak function]
> Signed-off-by: Roger Pau Monné 
> Signed-off-by: Oleksii Kurochko 

Reviewed-by: Jan Beulich 
ideally with ...

> --- a/xen/common/domain.c
> +++ b/xen/common/domain.c
> @@ -799,6 +799,28 @@ static int sanitise_domain_config(struct xen_domctl_createdomain *config)
>      return arch_sanitise_domain_config(config);
>  }
>  
> +struct domain *alloc_domain_struct(void)
> +{
> +#ifndef arch_domain_struct_memflags
> +# define arch_domain_struct_memflags() 0
> +#endif
> +
> +    struct domain *d;
> +
> +    BUILD_BUG_ON(sizeof(*d) > PAGE_SIZE);
> +
> +    d = alloc_xenheap_pages(0, arch_domain_struct_memflags());

... this now becoming the initializer of the variable.

> +    if ( d != NULL )

Personally I'd also prefer if the "!= NULL" was dropped at this occasion.

Jan


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From: Luca Fancellu 
To: Oleksii Kurochko 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk 
Subject: Re: [PATCH v2 1/2] xen/dom0less: move make_chosen_node() to common
 code
Thread-Topic: [PATCH v2 1/2] xen/dom0less: move make_chosen_node() to common
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Date: Fri, 28 Nov 2025 08:50:30 +0000
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From: Luca Fancellu 
To: Oleksii Kurochko 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk 
Subject: Re: [PATCH v2 2/2] xen/dom0less: move make_memory_node() to common
 code
Thread-Topic: [PATCH v2 2/2] xen/dom0less: move make_memory_node() to common
 code
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CC: =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk
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Subject: Re: [RFC PATCH 03/11] x86: Add x86_vendor_is() by itself before
 using it
From: Alejandro Vallejo 
To: Andrew Cooper , Jan Beulich 
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On Thu Nov 27, 2025 at 9:36 PM CET, Andrew Cooper wrote:
> On 27/11/2025 1:15 pm, Alejandro Vallejo wrote:
>>> Which raises the next question: Should we even allow a hypervisor to be=
 built
>>> with X86_ENABLED_VENDORS =3D=3D 0?
>> That's the most extreme case of "should we boot on a CPU known CPU vendo=
r that=20
>> has been compiled out?", the current code in the RFC uses the unknown ve=
ndor
>> as fallback. We could also panic. We could be trying to exercise the
>> "no assumptions about the vendor" paths.
>>
>> It's a policy decision for you (x86 mantainers) to take. I personally th=
ink the
>> default path is silly in this day and age and we could get rid of it ent=
irely.
>> Without it X86_ENABLED_VENDORS=3D0 would be indeed illegal. On that topi=
c...
>
> We allow compiling out both PV and HVM, so Randconfig can search for
> broken corners of the abstraction.=C2=A0 The same principle applies here.

That answers how to prevent that configuration from appearing in randconfig=
,
not whether that configuration should be valid or not. That's what I meant =
is a
policy decision.

As the RFC stands:

           CONFIG                      POLICY
   X86_ENABLED_VENDORS=3D0 | all boots use the default CPU
   UNKNOWN_CPU=3Dy         |

   X86_ENABLED_VENDORS=3D0 | panic on boot
   UNKNOWN_CPU=3Dn         |

   X86_ENABLED_VENDORS=3D | current all-vendors-compiled-in
   UNKNOWN_CPU=3Dy             |

   X86_ENABLED_VENDORS=3D | Marginal code removal in early_cpu_init() =
of
   UNKNOWN_CPU=3Dn             | the default CPU branch.

   X86_ENABLED_VENDORS=3D | x86_vendor_is() folds into false w=
hen
   UNKNOWN_CPU=3D                 | checking against all-compiled-out =
vendors
                                     | Also, some &-checks turn into =3D=3D=
-checks.

   X86_ENABLED_VENDORS=3D | Same as the one above.
   UNKNOWN_CPU=3Dy                |

   X86_ENABLED_VENDORS=3D | x86_vendor_is() folds into constant tru=
e/false
   UNKNOWN_CPU=3Dn                |

Does this sound like a credible approach? What could be different?

  - Should we remove the "default" case altogether"? That removes the Kconf=
ig
    and simplifies matters somewhat.
  - If the default case is to stay, should we allow running with no-explici=
t
    vendors set?

>
> For running such a hypervisor, I can't see anything that would
> fundamentally interfere with PV guests; PV guests are all architectural x=
86.

You could also run HVM, seeing how SVM and VMX don't intrinsically require =
AMD
and INTEL respectively, but it wouldn't be pleasant, secure or safe. It wou=
ld
be wonky at best. In general it's a path I wouldn't like to fallback to on =
the
basis that it's completely untested. I don't believe OSSTest ever exercised=
 it
(I wouldn't even know how), nor GitlabCI, nor XenRT.

>
> I don't like there being an explicit Kconfig option for UNKNOWN.=C2=A0
> UNKNOWN should simply be "didn't match anything we compiled in".

What I require for the optimisation to fully work out is precisely the remo=
val
of that the "didn't match anything we compiled in" as a plausible successfu=
l
boot scenario in order for all x86_vendor_is(x, X86_VENDOR_AMD) to fold int=
o
"true". I could reverse the polarity and have a REQUIRE_KNOWN_VENDOR, but t=
hat's
a non additive option that clashes with allyesconfig/allnoconfig.

>
> ~Andrew

Cheers,
Alejandro


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Date: Fri, 28 Nov 2025 10:18:38 +0100
Message-ID: 
CC: Jan Beulich , =?utf-8?q?Roger_Pau_Monn=C3=A9?=
	, Jason Andryuk , "Xenia
 Ragiadakou" , Stefano Stabellini
	
Subject: Re: [RFC PATCH 00/11] x86 vendor check optimisations
From: Alejandro Vallejo 
To: Andrew Cooper ,
	
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References: <20251126164419.174487-1-alejandro.garciavallejo@amd.com>
 
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On Thu Nov 27, 2025 at 11:11 PM CET, Andrew Cooper wrote:
> On 26/11/2025 4:44 pm, Alejandro Vallejo wrote:
>> Just knowing x86_vendor_is() is "good to have" is good enough as it enab=
les our
>> downstream to customise it with whatever optimisations we need.
>>
>> I also suspect other areas of the hypervisor could benefit from this mel=
d of
>> runtime+compiletime sort of checking, allowing transparent code removal.
>>
>> I'm thinking DOM0LESS_BOOT vs DOM0_BOOT vs PVSHIM_BOOT, or AMD_SVM vs IN=
TEL_VMX
>> in HVM-only builds, or family checks to have (i.e) a explicit "older-tha=
n-zen"
>> Kconfig option with a similar approach on a family range check.
>>
>> This is maybe one of several such uses.
>>
>> So... thoughts? I'm definitely fond of the single-vendor bloat-o-meter o=
utput.
>
> Having looked through the whole series, I'm not a massive fan of
> converting the switch() statements, but it's the only way to do the
> DCE.=C2=A0 So be it.
>
> I think x86_vendor_is(var, MASK) wants to become boot_vendor(MASK).
>
> Most cases want the boot vendor, and those that appear to want something
> else don't actually.=C2=A0 When you disable the cross-vendor case (patch =
2
> pulled out ahead), then cp->vendor =3D=3D boot_vendor and then you don't
> need a variable to pass in.
>
> This also reduces the verbosity of the new lines which is an improvement.
>
>
> That said, this series also collides substantially with the Intel Fam
> 18/19 work, which is more urgent and needs backporting to 4.21.=C2=A0 Mor=
e
> specifically, there are a bunch of changes which interfere with VFM
> conversion, and for which I can't see an obvious DCE reason to have, so
> I'm wondering if they were just part of "convert everything".
>
> ~Andrew

I converted everything under the sun because it's easier to find all of the=
m
than the strict subset the will give me gains. It's also easier to have new
commits using the function when there are no seemingly random instances whe=
re
it's not used.

What's exactly the area you need to touch for the Fam 18/19 work? I can lea=
ve
that conversion for last in the series so you have time to push and backpor=
t.

It's quite likely not in an area of the tree I care deeply about.

Cheers,
Alejandro


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To: Oleksii Kurochko ,
	
CC: Stefano Stabellini , Julien Grall
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On 27/11/2025 17:26, Oleksii Kurochko wrote:
> The current implementation of make_chosen_node() does not contain any
> architecture-specific logic. Therefore, move it from arch-specific
> files to common code.
> 
> At this stage, there is no need to introduce an arch_make_chosen_node(),
> as no architecture-specific customization is required.
> 
> This change avoids duplication and simplifies future maintenance for
> architectures like RISC-V and ARM.
> 
> Signed-off-by: Oleksii Kurochko 
Acked-by: Michal Orzel 

~Michal



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Date: Fri, 28 Nov 2025 10:22:23 +0100
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Subject: Re: [PATCH v2 2/2] xen/dom0less: move make_memory_node() to common
 code
To: Luca Fancellu , Oleksii Kurochko
	
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Volodymyr Babchuk
	
References: 
 
 
From: "Orzel, Michal" 
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On 28/11/2025 10:06, Luca Fancellu wrote:
> Hi Oleksii,
>>
>> diff --git a/xen/common/device-tree/domain-build.c b/xen/common/device-tree/domain-build.c
>> index 774790aab3..6708c9dd66 100644
>> --- a/xen/common/device-tree/domain-build.c
>> +++ b/xen/common/device-tree/domain-build.c
>> @@ -8,6 +8,7 @@
>> #include 
>> #include 
>> #include 
>> +#include 
>> #include 
>> #include 
>>
>> @@ -451,6 +452,80 @@ int __init make_chosen_node(const struct kernel_info *kinfo)
>>    return res;
>> }
>>
>> +int __init make_memory_node(const struct kernel_info *kinfo, int addrcells,
>> +                            int sizecells, const struct membanks *mem)
>> +{
>> +    void *fdt = kinfo->fdt;
>> +    unsigned int i;
>> +    int res, reg_size = addrcells + sizecells;
>> +    int nr_cells = 0;
>> +    __be32 reg[DT_MEM_NODE_REG_RANGE_SIZE];
>> +    __be32 *cells;
>> +
>> +    if ( mem->nr_banks == 0 )
>> +        return -ENOENT;
>> +
>> +    /* find the first memory range that is reserved for device (or firmware) */
>> +    for ( i = 0; i < mem->nr_banks &&
>> +                 (mem->bank[i].type != MEMBANK_DEFAULT); i++ )
>> +        ;
> 
> NIT: maybe we can fix the code style here, maintainers can give their opinion.
I'd prefer to keep the movement clean.

Acked-by: Michal Orzel 

~Michal



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From: Harry Ramsey 
To: xen-devel@lists.xenproject.org
Cc: Luca.Fancellu@arm.com,
	Luca Fancellu ,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk ,
	Hari Limaye 
Subject: [PATCH 1/6] arm/mpu: Implement copy_from_paddr for MPU systems
Date: Fri, 28 Nov 2025 09:58:54 +0000
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From: Luca Fancellu 

Implement the function copy_from_paddr variant for MPU systems, using
the map_pages_to_xen/destroy_xen_mappings to temporarily map the memory
range to be copied.

Signed-off-by: Luca Fancellu 
Signed-off-by: Hari Limaye 
Signed-off-by: Harry Ramsey 
---
 xen/arch/arm/mpu/setup.c | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/xen/arch/arm/mpu/setup.c b/xen/arch/arm/mpu/setup.c
index 163573b932..ec264f54f2 100644
--- a/xen/arch/arm/mpu/setup.c
+++ b/xen/arch/arm/mpu/setup.c
@@ -91,7 +91,19 @@ void * __init early_fdt_map(paddr_t fdt_paddr)
  */
 void __init copy_from_paddr(void *dst, paddr_t paddr, unsigned long len)
 {
-    BUG_ON("unimplemented");
+    paddr_t start_pg = round_pgdown(paddr);
+    paddr_t end_pg   = round_pgup(paddr + len);
+    unsigned long nr_mfns = (end_pg - start_pg) >> PAGE_SHIFT;
+    mfn_t mfn = maddr_to_mfn(start_pg);
+
+    if ( map_pages_to_xen(start_pg, mfn, nr_mfns, PAGE_HYPERVISOR_WC) )
+        panic("Unable to map range for copy_from_paddr\n");
+
+    memcpy(dst, maddr_to_virt(paddr), len);
+    clean_dcache_va_range(dst, len);
+
+    if ( destroy_xen_mappings(start_pg, end_pg) )
+        panic("Unable to unmap range for copy_from_paddr\n");
 }
 
 void __init remove_early_mappings(void)
-- 
2.43.0



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To: xen-devel@lists.xenproject.org
Cc: Luca.Fancellu@arm.com,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk 
Subject: [PATCH 0/6] Fourth MPU series
Date: Fri, 28 Nov 2025 09:58:53 +0000
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This series aims to further the ongoing work to introduce support for MPU
systems in xen.

The patches in this series implement various memory functions and enable the
hypervisor timer.

Luca Fancellu (3):
  arm/mpu: Implement copy_from_paddr for MPU systems
  arm/mpu: Implement vmap functions for MPU
  arm/mpu: Introduce modify_after_init_mappings

Penny Zheng (3):
  arm/mpu: Implement free_init_memory for MPU systems
  arm: Use secure hypervisor timer in MPU system
  arm/mpu: Map domain page in AArch64 MPU systems

 xen/arch/arm/Kconfig                     |   6 +
 xen/arch/arm/include/asm/arm64/sysregs.h |  12 ++
 xen/arch/arm/include/asm/mpu/mm.h        |  11 ++
 xen/arch/arm/include/asm/setup.h         |   5 +
 xen/arch/arm/mmu/setup.c                 |  15 +++
 xen/arch/arm/mpu/Makefile                |   1 +
 xen/arch/arm/mpu/domain-page.c           |  53 ++++++++
 xen/arch/arm/mpu/mm.c                    | 160 ++++++++++++++++++-----
 xen/arch/arm/mpu/setup.c                 |  54 +++++++-
 xen/arch/arm/mpu/vmap.c                  |  14 +-
 xen/arch/arm/setup.c                     |  15 +--
 11 files changed, 296 insertions(+), 50 deletions(-)
 create mode 100644 xen/arch/arm/mpu/domain-page.c

--
2.43.0



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To: xen-devel@lists.xenproject.org
Cc: Luca.Fancellu@arm.com,
	Penny Zheng ,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk ,
	Penny Zheng ,
	Wei Chen ,
	Luca Fancellu 
Subject: [PATCH 5/6] arm: Use secure hypervisor timer in MPU system
Date: Fri, 28 Nov 2025 09:58:58 +0000
Message-ID: <20251128095859.11264-6-harry.ramsey@arm.com>
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From: Penny Zheng 

As MPU systems only have one secure state, we have to use secure EL2
hypervisor timer for Xen in secure EL2.

In this patch, we introduce a new Kconfig option ARM_SECURE_STATE
and a set of secure hypervisor timer registers CNTHPS_*_EL2.
We alias CNTHP_*_EL2 to CNTHPS_*_EL2 to keep the timer code
flow unchanged.

Signed-off-by: Penny Zheng 
Signed-off-by: Wei Chen 
Signed-off-by: Luca Fancellu 
Signed-off-by: Harry Ramsey 
---
 xen/arch/arm/Kconfig                     |  5 +++++
 xen/arch/arm/include/asm/arm64/sysregs.h | 12 ++++++++++++
 2 files changed, 17 insertions(+)

diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
index cf6af68299..a5c111e08e 100644
--- a/xen/arch/arm/Kconfig
+++ b/xen/arch/arm/Kconfig
@@ -91,6 +91,7 @@ config MMU
 
 config MPU
 	bool "MPU" if UNSUPPORTED
+	select ARM_SECURE_STATE if ARM_64
 	select STATIC_MEMORY
 	help
 	  Memory Protection Unit (MPU). Select if you plan to run Xen on ARMv8-R
@@ -223,6 +224,10 @@ config HARDEN_BRANCH_PREDICTOR
 
 	  If unsure, say Y.
 
+config ARM_SECURE_STATE
+	bool "Xen will run in Arm Secure State"
+	default n
+
 config ARM64_PTR_AUTH
 	def_bool n
 	depends on ARM_64
diff --git a/xen/arch/arm/include/asm/arm64/sysregs.h b/xen/arch/arm/include/asm/arm64/sysregs.h
index 7440d495e4..29caad7155 100644
--- a/xen/arch/arm/include/asm/arm64/sysregs.h
+++ b/xen/arch/arm/include/asm/arm64/sysregs.h
@@ -462,6 +462,18 @@
 #define ZCR_ELx_LEN_SIZE             9
 #define ZCR_ELx_LEN_MASK             0x1ff
 
+#ifdef CONFIG_ARM_SECURE_STATE
+/*
+ * The Armv8-R AArch64 architecture always executes code in Secure
+ * state with EL2 as the highest Exception.
+ *
+ * Hypervisor timer registers for Secure EL2.
+ */
+#define CNTHP_TVAL_EL2  CNTHPS_TVAL_EL2
+#define CNTHP_CTL_EL2   CNTHPS_CTL_EL2
+#define CNTHP_CVAL_EL2  CNTHPS_CVAL_EL2
+#endif
+
 #define REGION_TEXT_PRBAR       0x38    /* SH=11 AP=10 XN=00 */
 #define REGION_RO_PRBAR         0x3A    /* SH=11 AP=10 XN=10 */
 #define REGION_DATA_PRBAR       0x32    /* SH=11 AP=00 XN=10 */
-- 
2.43.0



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To: xen-devel@lists.xenproject.org
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	Luca Fancellu ,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk ,
	Hari Limaye 
Subject: [PATCH 4/6] arm/mpu: Introduce modify_after_init_mappings
Date: Fri, 28 Nov 2025 09:58:57 +0000
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From: Luca Fancellu 

During `init_done`, Xen sets the permissions of all symbols marked with
__ro_after_init to be read-only. Currently this is achieved by calling
`modify_xen_mappings` and will shrink the RW mapping on one side and
extend the RO mapping on the other.

This does not work on MPU systems at present because part-region
modification is not supported. Therefore introduce the function
`modify_after_init_mappings` for MMU and MPU, to handle the divergent
approaches to setting permissions of __ro_after_init symbols.

As the new function is marked with __init, it needs to be called before
`free_init_memory`.

Signed-off-by: Luca Fancellu 
Signed-off-by: Hari Limaye 
Signed-off-by: Harry Ramsey 
---
 xen/arch/arm/include/asm/setup.h |  3 +++
 xen/arch/arm/mmu/setup.c         | 15 ++++++++++++
 xen/arch/arm/mpu/mm.c            |  2 +-
 xen/arch/arm/mpu/setup.c         | 40 ++++++++++++++++++++++++++++++++
 xen/arch/arm/setup.c             | 15 ++----------
 5 files changed, 61 insertions(+), 14 deletions(-)

diff --git a/xen/arch/arm/include/asm/setup.h b/xen/arch/arm/include/asm/setup.h
index 005cf7be59..899e33925c 100644
--- a/xen/arch/arm/include/asm/setup.h
+++ b/xen/arch/arm/include/asm/setup.h
@@ -78,6 +78,9 @@ struct init_info
 paddr_t consider_modules(paddr_t s, paddr_t e, uint32_t size, paddr_t align,
                          int first_mod);
 
+/* Modify some mappings after the init is done */
+void modify_after_init_mappings(void);
+
 #endif
 /*
  * Local variables:
diff --git a/xen/arch/arm/mmu/setup.c b/xen/arch/arm/mmu/setup.c
index 9b874f8ab2..d042f73597 100644
--- a/xen/arch/arm/mmu/setup.c
+++ b/xen/arch/arm/mmu/setup.c
@@ -213,6 +213,21 @@ void __init remove_early_mappings(void)
     BUG_ON(rc);
 }
 
+void __init modify_after_init_mappings(void)
+{
+    /*
+     * We have finished booting. Mark the section .data.ro_after_init
+     * read-only.
+     */
+    int rc = modify_xen_mappings((unsigned long)&__ro_after_init_start,
+                                 (unsigned long)&__ro_after_init_end,
+                                 PAGE_HYPERVISOR_RO);
+
+    if ( rc )
+        panic("Unable to mark the .data.ro_after_init section read-only (rc = %d)\n",
+              rc);
+}
+
 /*
  * After boot, Xen page-tables should not contain mapping that are both
  * Writable and eXecutables.
diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
index 8446dddde8..f95ba7c749 100644
--- a/xen/arch/arm/mpu/mm.c
+++ b/xen/arch/arm/mpu/mm.c
@@ -32,7 +32,7 @@ DECLARE_BITMAP(xen_mpumap_mask, MAX_MPU_REGION_NR) \
 /* EL2 Xen MPU memory region mapping table. */
 pr_t __cacheline_aligned __section(".data") xen_mpumap[MAX_MPU_REGION_NR];
 
-static DEFINE_SPINLOCK(xen_mpumap_lock);
+DEFINE_SPINLOCK(xen_mpumap_lock);
 
 static void __init __maybe_unused build_assertions(void)
 {
diff --git a/xen/arch/arm/mpu/setup.c b/xen/arch/arm/mpu/setup.c
index ec264f54f2..55317ee318 100644
--- a/xen/arch/arm/mpu/setup.c
+++ b/xen/arch/arm/mpu/setup.c
@@ -8,11 +8,14 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 static paddr_t __initdata mapped_fdt_base = INVALID_PADDR;
 static paddr_t __initdata mapped_fdt_limit = INVALID_PADDR;
 
+extern spinlock_t xen_mpumap_lock;
+
 void __init setup_pagetables(void) {}
 
 void * __init early_fdt_map(paddr_t fdt_paddr)
@@ -106,6 +109,43 @@ void __init copy_from_paddr(void *dst, paddr_t paddr, unsigned long len)
         panic("Unable to unmap range for copy_from_paddr\n");
 }
 
+void __init modify_after_init_mappings(void)
+{
+    int rc;
+    uint8_t idx_rodata;
+    uint8_t idx_rwdata;
+
+    spin_lock(&xen_mpumap_lock);
+
+    rc = mpumap_contains_region(xen_mpumap, max_mpu_regions,
+                                (unsigned long)_srodata,
+                                (unsigned long)_erodata,
+                                &idx_rodata);
+
+    if ( rc < MPUMAP_REGION_FOUND )
+        panic("Unable to find rodata section (rc = %d)\n", rc);
+
+    rc = mpumap_contains_region(xen_mpumap, max_mpu_regions,
+                                (unsigned long)__ro_after_init_start,
+                                (unsigned long)__init_begin,
+                                &idx_rwdata);
+
+    if ( rc < MPUMAP_REGION_FOUND )
+        panic("Unable to find rwdata section (rc = %d)\n", rc);
+
+    /* Shrink rwdata section to begin at __ro_after_init_end */
+    pr_set_base(&xen_mpumap[idx_rwdata], (unsigned long)__ro_after_init_end);
+
+    /* Extend rodata section to end at __ro_after_init_end */
+    pr_set_limit(&xen_mpumap[idx_rodata], (unsigned long)__ro_after_init_end);
+
+    write_protection_region(&xen_mpumap[idx_rwdata], idx_rwdata);
+    write_protection_region(&xen_mpumap[idx_rodata], idx_rodata);
+    context_sync_mpu();
+
+    spin_unlock(&xen_mpumap_lock);
+}
+
 void __init remove_early_mappings(void)
 {
     int rc = destroy_xen_mappings(round_pgdown(mapped_fdt_base),
diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c
index 7ad870e382..6310a47d68 100644
--- a/xen/arch/arm/setup.c
+++ b/xen/arch/arm/setup.c
@@ -66,23 +66,12 @@ domid_t __read_mostly max_init_domid;
 
 static __used void noreturn init_done(void)
 {
-    int rc;
-
     /* Must be done past setting system_state. */
     unregister_init_virtual_region();
 
-    free_init_memory();
+    modify_after_init_mappings();
 
-    /*
-     * We have finished booting. Mark the section .data.ro_after_init
-     * read-only.
-     */
-    rc = modify_xen_mappings((unsigned long)&__ro_after_init_start,
-                             (unsigned long)&__ro_after_init_end,
-                             PAGE_HYPERVISOR_RO);
-    if ( rc )
-        panic("Unable to mark the .data.ro_after_init section read-only (rc = %d)\n",
-              rc);
+    free_init_memory();
 
     startup_cpu_idle_loop();
 }
-- 
2.43.0



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Cc: Luca.Fancellu@arm.com,
	Penny Zheng ,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk ,
	Penny Zheng ,
	Wei Chen ,
	Luca Fancellu 
Subject: [PATCH 6/6] arm/mpu: Map domain page in AArch64 MPU systems
Date: Fri, 28 Nov 2025 09:58:59 +0000
Message-ID: <20251128095859.11264-7-harry.ramsey@arm.com>
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From: Penny Zheng 

In MPU systems, we implement map_domain_page()/unmap_domain_page()
through mapping the domain page with a MPU region on demand.

Signed-off-by: Penny Zheng 
Signed-off-by: Wei Chen 
Signed-off-by: Luca Fancellu 
Signed-off-by: Harry Ramsey 
---
 xen/arch/arm/Kconfig           |  1 +
 xen/arch/arm/mpu/Makefile      |  1 +
 xen/arch/arm/mpu/domain-page.c | 53 ++++++++++++++++++++++++++++++++++
 3 files changed, 55 insertions(+)
 create mode 100644 xen/arch/arm/mpu/domain-page.c

diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
index a5c111e08e..dac9a16c28 100644
--- a/xen/arch/arm/Kconfig
+++ b/xen/arch/arm/Kconfig
@@ -91,6 +91,7 @@ config MMU
 
 config MPU
 	bool "MPU" if UNSUPPORTED
+	select ARCH_MAP_DOMAIN_PAGE if ARM_64
 	select ARM_SECURE_STATE if ARM_64
 	select STATIC_MEMORY
 	help
diff --git a/xen/arch/arm/mpu/Makefile b/xen/arch/arm/mpu/Makefile
index 4963c8b550..940297af3f 100644
--- a/xen/arch/arm/mpu/Makefile
+++ b/xen/arch/arm/mpu/Makefile
@@ -1,5 +1,6 @@
 obj-$(CONFIG_ARM_32) += arm32/
 obj-$(CONFIG_ARM_64) += arm64/
+obj-$(CONFIG_ARM_64) += domain-page.o
 obj-y += mm.o
 obj-y += p2m.o
 obj-y += setup.init.o
diff --git a/xen/arch/arm/mpu/domain-page.c b/xen/arch/arm/mpu/domain-page.c
new file mode 100644
index 0000000000..9248053ff5
--- /dev/null
+++ b/xen/arch/arm/mpu/domain-page.c
@@ -0,0 +1,53 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+void *map_domain_page_global(mfn_t mfn)
+{
+    BUG_ON("unimplemented");
+    return NULL;
+}
+
+/* Map a page of domheap memory */
+void *map_domain_page(mfn_t mfn)
+{
+    paddr_t pa = mfn_to_maddr(mfn);
+
+    if ( map_pages_to_xen((unsigned long)pa, mfn, 1, PAGE_HYPERVISOR_RW) )
+        return NULL;
+
+    return maddr_to_virt(pa);
+}
+
+/* Release a mapping taken with map_domain_page() */
+void unmap_domain_page(const void *ptr)
+{
+    paddr_t base = virt_to_maddr(ptr);
+
+    if ( destroy_entire_xen_mapping(base) )
+        panic("Failed to unmap domain page\n");
+}
+
+mfn_t domain_page_map_to_mfn(const void *ptr)
+{
+    BUG_ON("unimplemented");
+    return INVALID_MFN;
+}
+
+void unmap_domain_page_global(const void *va)
+{
+    BUG_ON("unimplemented");
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
-- 
2.43.0



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To: xen-devel@lists.xenproject.org
Cc: Luca.Fancellu@arm.com,
	Penny Zheng ,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk ,
	Penny Zheng ,
	Wei Chen ,
	Luca Fancellu ,
	Hari Limaye 
Subject: [PATCH 3/6] arm/mpu: Implement free_init_memory for MPU systems
Date: Fri, 28 Nov 2025 09:58:56 +0000
Message-ID: <20251128095859.11264-4-harry.ramsey@arm.com>
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From: Penny Zheng 

Implement the function `free_init_memory` for MPU systems. In order to
support this, the function `modify_xen_mappings` is implemented.

On MPU systems, we map the init text and init data sections using
separate MPU memory regions. Therefore these are removed separately in
`free_init_memory`.

Additionally remove warning messages from `is_mm_attr_match` as some
permissions can now be updated by `xen_mpumap_update_entry`.

Signed-off-by: Penny Zheng 
Signed-off-by: Wei Chen 
Signed-off-by: Luca Fancellu 
Signed-off-by: Hari Limaye 
Signed-off-by: Harry Ramsey 
---
 xen/arch/arm/include/asm/setup.h |  2 +
 xen/arch/arm/mpu/mm.c            | 91 +++++++++++++++++++++++++-------
 2 files changed, 73 insertions(+), 20 deletions(-)

diff --git a/xen/arch/arm/include/asm/setup.h b/xen/arch/arm/include/asm/setup.h
index 1eaf13bd66..005cf7be59 100644
--- a/xen/arch/arm/include/asm/setup.h
+++ b/xen/arch/arm/include/asm/setup.h
@@ -65,6 +65,8 @@ int map_irq_to_domain(struct domain *d, unsigned int irq,
 int map_range_to_domain(const struct dt_device_node *dev,
                         uint64_t addr, uint64_t len, void *data);
 
+extern const char __init_data_begin[], __bss_start[], __bss_end[];
+
 struct init_info
 {
     /* Pointer to the stack, used by head.S when entering in C */
diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
index 29d8e7ff11..8446dddde8 100644
--- a/xen/arch/arm/mpu/mm.c
+++ b/xen/arch/arm/mpu/mm.c
@@ -174,28 +174,13 @@ int mpumap_contains_region(pr_t *table, uint8_t nr_regions, paddr_t base,
 static bool is_mm_attr_match(pr_t *region, unsigned int attributes)
 {
     if ( region->prbar.reg.ro != PAGE_RO_MASK(attributes) )
-    {
-        printk(XENLOG_WARNING
-               "Mismatched Access Permission attributes (%#x instead of %#x)\n",
-               region->prbar.reg.ro, PAGE_RO_MASK(attributes));
         return false;
-    }
 
     if ( region->prbar.reg.xn != PAGE_XN_MASK(attributes) )
-    {
-        printk(XENLOG_WARNING
-               "Mismatched Execute Never attributes (%#x instead of %#x)\n",
-               region->prbar.reg.xn, PAGE_XN_MASK(attributes));
         return false;
-    }
 
     if ( region->prlar.reg.ai != PAGE_AI_MASK(attributes) )
-    {
-        printk(XENLOG_WARNING
-               "Mismatched Memory Attribute Index (%#x instead of %#x)\n",
-               region->prlar.reg.ai, PAGE_AI_MASK(attributes));
         return false;
-    }
 
     return true;
 }
@@ -352,8 +337,33 @@ static int xen_mpumap_update_entry(paddr_t base, paddr_t limit,
     {
         if ( !is_mm_attr_match(&xen_mpumap[idx], flags) )
         {
-            printk("Modifying an existing entry is not supported\n");
-            return -EINVAL;
+            if ( rc == MPUMAP_REGION_INCLUSIVE )
+            {
+                printk(XENLOG_ERR
+                       "Cannot modify partial region permissions\n");
+                return -EINVAL;
+            }
+
+            if ( xen_mpumap[idx].prlar.reg.ai != PAGE_AI_MASK(flags) )
+            {
+                printk(XENLOG_ERR
+                       "Modifying memory attribute is not supported\n");
+                return -EINVAL;
+            }
+
+            if ( xen_mpumap[idx].refcount != 0 )
+            {
+                printk(XENLOG_ERR
+                       "Cannot modify memory permissions for a region mapped multiple time\n");
+                return -EINVAL;
+            }
+
+            /* Set new permission */
+            xen_mpumap[idx].prbar.reg.ro = PAGE_RO_MASK(flags);
+            xen_mpumap[idx].prbar.reg.xn = PAGE_XN_MASK(flags);
+
+            write_protection_region(&xen_mpumap[idx], idx);
+            return 0;
         }
 
         /* Check for overflow of refcount before incrementing.  */
@@ -499,8 +509,7 @@ void __init setup_mm_helper(void)
 
 int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int nf)
 {
-    BUG_ON("unimplemented");
-    return -EINVAL;
+    return xen_mpumap_update(s, e, nf);
 }
 
 void dump_hyp_walk(vaddr_t addr)
@@ -511,7 +520,49 @@ void dump_hyp_walk(vaddr_t addr)
 /* Release all __init and __initdata ranges to be reused */
 void free_init_memory(void)
 {
-    BUG_ON("unimplemented");
+    unsigned long inittext_end = round_pgup((unsigned long)__init_data_begin);
+    unsigned long len = __init_end - __init_begin;
+    uint8_t idx;
+    int rc;
+
+    rc = modify_xen_mappings((unsigned long)__init_begin, inittext_end,
+                             PAGE_HYPERVISOR_RW);
+    if ( rc )
+        panic("Unable to map RW the init text section (rc = %d)\n", rc);
+
+    /*
+     * From now on, init will not be used for execution anymore,
+     * so nuke the instruction cache to remove entries related to init.
+     */
+    invalidate_icache_local();
+
+    /* Zeroing the memory before returning it */
+    memset(__init_begin, 0, len);
+
+    rc = destroy_xen_mappings((unsigned long)__init_begin, inittext_end);
+    if ( rc )
+        panic("Unable to remove init text section (rc = %d)\n", rc);
+
+    /*
+     * The initdata and bss sections are mapped using a single MPU region, so
+     * modify the start of this region to remove the initdata section.
+     */
+    spin_lock(&xen_mpumap_lock);
+
+    rc = mpumap_contains_region(xen_mpumap, max_mpu_regions,
+                                (unsigned long)__init_data_begin,
+                                (unsigned long)__bss_end,
+                                &idx);
+    if ( rc < MPUMAP_REGION_FOUND )
+        panic("Unable to find bss data section (rc = %d)\n", rc);
+
+    /* bss data section is shrunk and now starts from __bss_start */
+    pr_set_base(&xen_mpumap[idx], (unsigned long)__bss_start);
+
+    write_protection_region(&xen_mpumap[idx], idx);
+    context_sync_mpu();
+
+    spin_unlock(&xen_mpumap_lock);
 }
 
 void __iomem *ioremap_attr(paddr_t start, size_t len, unsigned int flags)
-- 
2.43.0



From xen-devel-bounces@lists.xenproject.org Fri Nov 28 10:01:17 2025
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	Luca Fancellu ,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk 
Subject: [PATCH 2/6] arm/mpu: Implement vmap functions for MPU
Date: Fri, 28 Nov 2025 09:58:55 +0000
Message-ID: <20251128095859.11264-3-harry.ramsey@arm.com>
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From: Luca Fancellu 

HAS_VMAP is not enabled on MPU systems, but the vmap functions are used
in places across common code. In order to keep the existing code and
maintain correct functionality, implement the `vmap_contig` and `vunmap`
functions for MPU systems.

Introduce a helper function `destroy_entire_xen_mapping` to aid with
unmapping an entire region when only the start address is known.

Signed-off-by: Luca Fancellu 
Signed-off-by: Harry Ramsey 
---
 xen/arch/arm/include/asm/mpu/mm.h | 11 +++++
 xen/arch/arm/mpu/mm.c             | 67 +++++++++++++++++++++++++------
 xen/arch/arm/mpu/vmap.c           | 14 +++++--
 3 files changed, 77 insertions(+), 15 deletions(-)

diff --git a/xen/arch/arm/include/asm/mpu/mm.h b/xen/arch/arm/include/asm/mpu/mm.h
index e1ded6521d..83ee0e59ca 100644
--- a/xen/arch/arm/include/asm/mpu/mm.h
+++ b/xen/arch/arm/include/asm/mpu/mm.h
@@ -111,6 +111,17 @@ pr_t pr_of_addr(paddr_t base, paddr_t limit, unsigned int flags);
 int mpumap_contains_region(pr_t *table, uint8_t nr_regions, paddr_t base,
                            paddr_t limit, uint8_t *index);
 
+
+/*
+ * Destroys and frees (if reference count is 0) an entire xen mapping on MPU
+ * systems where only the start address is known.
+ *
+ * @param s     Start address of memory region to be destroyed.
+ *
+ * @return:     0 on success, negative on error.
+ */
+int destroy_entire_xen_mapping(paddr_t s);
+
 #endif /* __ARM_MPU_MM_H__ */
 
 /*
diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
index 687dec3bc6..29d8e7ff11 100644
--- a/xen/arch/arm/mpu/mm.c
+++ b/xen/arch/arm/mpu/mm.c
@@ -290,6 +290,35 @@ static void disable_mpu_region_from_index(uint8_t index)
         write_protection_region(&xen_mpumap[index], index);
 }
 
+/*
+ * Free a xen_mpumap entry given the index. A mpu region is actually disabled
+ * when the refcount is 0 and the region type is MPUMAP_REGION_FOUND.
+ *
+ * @param idx                   Index of the mpumap entry.
+ * @param region_found_type     Either MPUMAP_REGION_FOUND or MPUMAP_REGION_INCLUSIVE.
+ * @return                      0 on success, otherwise negative on error.
+ */
+static int xen_mpumap_free_entry(uint8_t idx, int region_found_type)
+{
+    ASSERT(spin_is_locked(&xen_mpumap_lock));
+    ASSERT(idx != INVALID_REGION_IDX);
+
+    if ( xen_mpumap[idx].refcount == 0 )
+    {
+        if ( MPUMAP_REGION_FOUND == region_found_type )
+            disable_mpu_region_from_index(idx);
+        else
+        {
+            printk(XENLOG_ERR "Cannot remove a partial region\n");
+            return -EINVAL;
+        }
+    }
+    else
+        xen_mpumap[idx].refcount -= 1;
+
+    return 0;
+}
+
 /*
  * Update the entry in the MPU memory region mapping table (xen_mpumap) for the
  * given memory range and flags, creating one if none exists.
@@ -357,18 +386,7 @@ static int xen_mpumap_update_entry(paddr_t base, paddr_t limit,
             return -EINVAL;
         }
 
-        if ( xen_mpumap[idx].refcount == 0 )
-        {
-            if ( MPUMAP_REGION_FOUND == rc )
-                disable_mpu_region_from_index(idx);
-            else
-            {
-                printk("Cannot remove a partial region\n");
-                return -EINVAL;
-            }
-        }
-        else
-            xen_mpumap[idx].refcount -= 1;
+        return xen_mpumap_free_entry(idx, rc);
     }
 
     return 0;
@@ -418,6 +436,31 @@ int destroy_xen_mappings(unsigned long s, unsigned long e)
     return xen_mpumap_update(s, e, 0);
 }
 
+int destroy_entire_xen_mapping(paddr_t s)
+{
+    int rc;
+    uint8_t idx;
+
+    ASSERT(IS_ALIGNED(s, PAGE_SIZE));
+
+    spin_lock(&xen_mpumap_lock);
+
+    rc = mpumap_contains_region(xen_mpumap, max_mpu_regions, s, s + PAGE_SIZE,
+                                &idx);
+    if ( rc == MPUMAP_REGION_NOTFOUND )
+    {
+        printk(XENLOG_ERR "Cannot remove entry that does not exist");
+        rc = -EINVAL;
+    }
+
+    /* As we are unmapping entire region use MPUMAP_REGION_FOUND instead */
+    rc = xen_mpumap_free_entry(idx, MPUMAP_REGION_FOUND);
+
+    spin_unlock(&xen_mpumap_lock);
+
+    return rc;
+}
+
 int map_pages_to_xen(unsigned long virt, mfn_t mfn, unsigned long nr_mfns,
                      unsigned int flags)
 {
diff --git a/xen/arch/arm/mpu/vmap.c b/xen/arch/arm/mpu/vmap.c
index f977b79cd4..d3037ae98a 100644
--- a/xen/arch/arm/mpu/vmap.c
+++ b/xen/arch/arm/mpu/vmap.c
@@ -1,19 +1,27 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include 
+#include 
 #include 
 #include 
 #include 
 
 void *vmap_contig(mfn_t mfn, unsigned int nr)
 {
-    BUG_ON("unimplemented");
-    return NULL;
+    paddr_t base = mfn_to_maddr(mfn);
+
+    if ( map_pages_to_xen(base, mfn, nr, PAGE_HYPERVISOR ) )
+        return NULL;
+
+    return maddr_to_virt(base);
 }
 
 void vunmap(const void *va)
 {
-    BUG_ON("unimplemented");
+    paddr_t base = virt_to_maddr(va);
+
+    if ( destroy_entire_xen_mapping(base) )
+        panic("Failed to vunmap region\n");
 }
 
 /*
-- 
2.43.0



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Date: Fri, 28 Nov 2025 11:28:47 +0100
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: qemu-devel@nongnu.org
Cc: Peter.Turner@cloud.com, ngoc-tu.dinh@vates.tech,
	Keith Busch , Klaus Jensen ,
	Jesper Devantier , xen-devel@lists.xenproject.org
Subject: Default NVMe MDTS value causes Widnows Server 2025 hangs and BSODs
 (during install at least)
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Hello,

As part of XenServer Windows Server 2025 testing using Xen plus QEMU
we discovered an issue during install that would lead to either the
Windows installer getting stuck without making progress (albeit the
screen was still showing the spinning circle correctly) or a BSOD that
doesn't seem to have a unique number, the most common one was 0x50
(PAGE_FAULT_IN_NONPAGED_AREA).

After a fair amount of debugging and following incorrect leads we have
narrowed down what triggers the issue to QEMU emulated NVMe reporting
a MDTS value of 7 by default (so max request size of 512KiB).
Switching to higher MDTS values seemed to solve the issue.

The commit that made that change:

e137d20e7dff hw/block/nvme: add check for mdts

Didn't contain much justification for the change from unlimited to
512KiB max request size.

Windows is like a black box to me, but I believe there's some error in
the Windows logic that splits requests, and hence when MDTS is set to
a sufficiently low value, and Windows has to split NVMe requests, it
causes Windows to hit an internal bug.  This will be raised with
Microsoft to get the issue debugged and possibly fixed on their side.

>From limited experimentation setting mdts to 10 (so 4MiB max request
size) or 9 (2MiB) workarounds the issue.

Would it be acceptable for QEMU NVMe to consider increasing the
default MDTS value to something higher than 7 to workaround the issue?
I've tested both 9 and 10 and they prevent the issue, I would avoid 8
as it's too close to the current one that causes issues.  I don't have
many references of other emulated NVMe implementations, I just know
about Bhyve emulated NVMe, which sets MDTS to 9.

If bumping MDTS to a higher value is acceptable please let me know and
I will prepare a patch.

Regards, Roger.


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Date: Fri, 28 Nov 2025 12:55:04 +0200
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Subject: Re: [PATCH v2 0/3] xen/x86: move d->arch.physaddr_bitsize field
 handling to pv32
To: Andrew Cooper ,
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On 28.11.25 00:24, Andrew Cooper wrote:
> On 27/11/2025 10:12 pm, Grygorii Strashko wrote:
>> From: Grygorii Strashko 
>>
>> 1) arm/ppc/riscv: drop unused domain_set_alloc_bitsize() macro
>> 2) add generic domain_clamp_alloc_bitsize() macro and clean up !x86 arches
>> 3) move d->arch.physaddr_bitsize field handling to pv32 code
>>
>> changes in v2:
>> - split on 3 patches
>> - move physaddr_bitsize in struct pv_domain
>> - make minimal style adjustments as requested
>>
>> Grygorii Strashko (3):
>>    arm/ppc/riscv: drop unused domain_set_alloc_bitsize() macro
>>    xen/mm: add generic domain_clamp_alloc_bitsize() macro
> 
> These two should be merged.  You also need to CC the ARM/PPC/RISC-V
> maintainers.

Omg. missed to drop supress-cc=all :( will resend with patch 3 updated.

-- 
Best regards,
-grygorii



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Date: Fri, 28 Nov 2025 13:00:05 +0200
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Subject: Re: [PATCH v2 3/3] xen/x86: move d->arch.physaddr_bitsize field
 handling to pv32
To: Andrew Cooper ,
 "xen-devel@lists.xenproject.org" 
References: <20251127221244.3747918-1-grygorii_strashko@epam.com>
 <20251127221244.3747918-4-grygorii_strashko@epam.com>
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On 28.11.25 01:09, Andrew Cooper wrote:
> On 27/11/2025 10:12 pm, Grygorii Strashko wrote:
>> diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h
>> index 17ca6666a34e..128115442ecc 100644
>> --- a/xen/arch/x86/include/asm/mm.h
>> +++ b/xen/arch/x86/include/asm/mm.h
>> @@ -619,9 +619,11 @@ void __iomem *ioremap_wc(paddr_t pa, size_t len);
>>   
>>   extern int memory_add(unsigned long spfn, unsigned long epfn, unsigned int pxm);
>>   
>> -void domain_set_alloc_bitsize(struct domain *d);
>> -unsigned int domain_clamp_alloc_bitsize(struct domain *d, unsigned int bits);
>> +#ifdef CONFIG_PV32
>> +unsigned int domain_clamp_alloc_bitsize(const struct domain *d,
>> +                                        unsigned int bits);
> 
> Do not convert this, or any other domains/vcpus you see, to const.  I
> realise you have been given conflicting information on this point, but
> the maintainers as a whole agreed to not const pointers to complex
> objects in the general case because of the churn it creates, and the
> repeated examples of MISRA violations people have inserted to work
> around the fact it shouldn't have been a const pointer to start with.

It's pure and simple RO function that's why I added const.

> 
> That aside, I think clamp wants to be a static inline here.  (Except it
> can't be, so it needs to be a macro).

Sorry, why "can't be" static inline?

> 
> It's currently a concrete function call to very simple piece of logic,
> where the callers have options to eliminate it entirely in the d = NULL
> case if they could only see in.
> 
> #define domain_clamp_alloc_bitsize(d, bits)                             \
>      (((d) && (d)->arch.pv.physaddr_bitsize)                             \
>       ? min_t(uint32_t, (d)->arch.pv.physaddr_bitsize, bits) : bits)
> 
> 
> seems to work.  The min_t() is because all callers pass in bits as a
> long constant, tripping the typecheck in min().
> 
>> +#endif
>>   
>>   unsigned long domain_get_maximum_gpfn(struct domain *d);
>>   
>> diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c
>> index 21158ce1812e..e4f95d8f2fc8 100644
>> --- a/xen/arch/x86/pv/dom0_build.c
>> +++ b/xen/arch/x86/pv/dom0_build.c
>> @@ -626,8 +626,9 @@ static int __init dom0_construct(const struct boot_domain *bd)
>>           initrd_mfn = paddr_to_pfn(initrd->start);
>>           mfn = initrd_mfn;
>>           count = PFN_UP(initrd_len);
>> -        if ( d->arch.physaddr_bitsize &&
>> -             ((mfn + count - 1) >> (d->arch.physaddr_bitsize - PAGE_SHIFT)) )
> 
> While you're editing this, blank line here please.
> 
>> +#ifdef CONFIG_PV32
>> +        if ( d->arch.pv.physaddr_bitsize &&
>> +             ((mfn + count - 1) >> (d->arch.pv.physaddr_bitsize - PAGE_SHIFT)) )
>>           {
>>               order = get_order_from_pages(count);
>>               page = alloc_domheap_pages(d, order, MEMF_no_scrub);
>> @@ -650,6 +651,7 @@ static int __init dom0_construct(const struct boot_domain *bd)
>>               initrd->start = pfn_to_paddr(initrd_mfn);
>>           }
>>           else
>> +#endif
>>           {
>>               while ( count-- )
>>                   if ( assign_pages(mfn_to_page(_mfn(mfn++)), 1, d, 0) )
>> diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c
>> index 9c4785c187dd..ad40a712ac5f 100644
>> --- a/xen/arch/x86/pv/domain.c
>> +++ b/xen/arch/x86/pv/domain.c
>> @@ -230,6 +230,29 @@ unsigned long pv_make_cr4(const struct vcpu *v)
>>   }
>>   
>>   #ifdef CONFIG_PV32
>> +unsigned int domain_clamp_alloc_bitsize(const struct domain *d,
>> +                                        unsigned int bits)
>> +{
>> +    if ( (d == NULL) || (d->arch.pv.physaddr_bitsize == 0) )
>> +        return bits;
>> +
>> +    return min(d->arch.pv.physaddr_bitsize, bits);
>> +}
>> +
>> +static void domain_set_alloc_bitsize(struct domain *d)
>> +{
>> +    if ( !is_pv_32bit_domain(d) ||
>> +         (MACH2PHYS_COMPAT_NR_ENTRIES(d) >= max_page) ||
>> +         d->arch.pv.physaddr_bitsize > 0 )
>> +        return;
>> +
>> +    d->arch.pv.physaddr_bitsize =
>> +        /* 2^n entries can be contained in guest's p2m mapping space */
>> +        fls(MACH2PHYS_COMPAT_NR_ENTRIES(d)) - 1
>> +        /* 2^n pages -> 2^(n+PAGE_SHIFT) bits */
>> +        + PAGE_SHIFT;
>> +}
> 
> The single caller has just set d->arch.pv.is_32bit = true, but the
> compiler can't eliminate the first condition because of the embedded
> evaluate_nospec().  Nor the 3rd condition, because it can't reason about
> the singleton nature of switch_compat().
> 
> Thus, it would be better inlined fully, as:
> 
>      if ( MACH2PHYS_COMPAT_NR_ENTRIES(d) >= max_page )
>          d->arch.pv.physaddr_bitsize =
>              /* 2^n entries can be contained in guest's p2m mapping space */
>              fls(MACH2PHYS_COMPAT_NR_ENTRIES(d)) - 1 + PAGE_SHIFT;
> 
> 
> which is rather easier to follow.  Even the comment about PAGE_SHIFT is
> more noise than help.

To clarify my understanding - you wanna drop domain_set_alloc_bitsize and
inline code in switch_compat(), right?

> 
> In an ideal world it ought to be in its own patch, and in principle I'm
> happy to draft one with a fuller explanation if you'd prefer, but given
> the repositioning of physaddr_bitsize into pv domain as wekk, it's
> probably all better together in this single patch.
> 
> ~Andrew

-- 
Best regards,
-grygorii



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Le 27/11/2025 =C3=A0 20:52, Andrew Cooper a =C3=A9crit=C2=A0:
> On 27/11/2025 1:39 pm, Teddy Astie wrote:
>> First patch removes a shadow mode check in a function that can't be
>> called with shadow mode (only called with EPT hence HAP).
>>
>> 3 other patches drops guest_tlb_flush_mask by removing all its users :
>> in the shadow paging case by migrating it a shadow variant of it and
>> in the hap case by moving it to p2m->flush_tlb logic.
>>
>> One of the goal is to prepare adding HAP-specific optimizations to TLB
>> flushing code without risking regressions in the shadow paging code.
> 
> You need a clearer background to try and explain the changes.=C2=A0 I've
> discussed some of it with you, but it needs describing here for everyone
> else.
> 
>  From memory, encrypted AMD VMs cannot use "asid++" to flush TLBs, and
> must used VMCB->tlb_ctrl instead.
> 

Not only for encrypted VMs, but also for broadcast TLB invalidations 
(like AMD INVLPGB and Intel RAR) which also requires this.

I'm also wondering if the current model works well when Xen is running 
as a nested guest (as the L0 may get confused about the ASID changing 
constantly).

> On top of that, Xen does not have a correct abstraction for "flush guest
> VA space" vs "flush guest PA space" vs "flush Xen's mappings of guest VA
> space".=C2=A0 This comes about because of the shadow code originally had =
all
> 3 things together, and HAP didn't clean this up when the need first arose=
.
> 
> This causes over-flushing (Tamas found and reported this on Intel), and
> FLUSH_HVM_ASID_CORE isn't an adequate abstraction either.
> 

I guess that also wants to have a way to optionally specify the address 
we want to flush (whether it is gva or gpa). So that it can lower to 
things like single-address invalidation (instead of flushing everything) 
if possible and meaningful.

Having a clearer model would definetely help clarifying 
p2m_tlb_flush_sync vs paging_flush_tlb (which sounds like it does the 
same thing, but actually not really).

> 
> All of that said, it would help to have a sketch of what you want the
> logic to look like in the end.
> 

Yes, that's something I planned to do.

> "flush guest VA space" and "flush guest PA space" originate from
> different actions.=C2=A0 VA flushes always from emulation of a guest acti=
on,
> whereas PA flushes originate from modifications to the P2M.=C2=A0 When sh=
adow
> is in use, both of these escalate into a full local flush because of
> Xen's use of shadow linear mappings, but this escalation should be
> inside the shadow code, not the top level primitive.
> > Have I missed anything else?
> 

Nested virtualization will also wants clearly defined p2m semantics to 
avoid falling into obscure corner cases.

> ~Andrew
> 



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk ,
	Andrew Cooper ,
	Anthony PERARD ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Timothy Pearson ,
	Paul Durrant 
Subject: [PATCH v1] xen: move vcpu_kick() declaration to common header
Date: Fri, 28 Nov 2025 12:38:54 +0100
Message-ID: 
X-Mailer: git-send-email 2.52.0
MIME-Version: 1.0
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The vcpu_kick() declaration is duplicated across multiple
architecture-specific event.h headers (ARM, x86, PPC).

Remove the redundant declarations and move vcpu_kick() into
the common xen/include/xen/event.h header.

Drop the definition of vcpu_kick() from ppc/include/asm/event.h,
as it is already provided in ppc/stubs.c.

Include  instead of  in places where
vcpu_kick() is used, since its declaration now resides in
.

Signed-off-by: Oleksii Kurochko 
---
 xen/arch/arm/include/asm/event.h | 1 -
 xen/arch/arm/vgic.c              | 2 +-
 xen/arch/arm/vgic/vgic.c         | 2 +-
 xen/arch/ppc/include/asm/event.h | 1 -
 xen/arch/x86/hvm/vioapic.c       | 2 +-
 xen/arch/x86/hvm/viridian/time.c | 2 +-
 xen/arch/x86/hvm/vmx/vmx.c       | 2 +-
 xen/arch/x86/hvm/vpt.c           | 2 +-
 xen/arch/x86/include/asm/event.h | 1 -
 xen/include/xen/event.h          | 2 ++
 10 files changed, 8 insertions(+), 9 deletions(-)

diff --git a/xen/arch/arm/include/asm/event.h b/xen/arch/arm/include/asm/event.h
index 509157b2b3..e036ab7fb8 100644
--- a/xen/arch/arm/include/asm/event.h
+++ b/xen/arch/arm/include/asm/event.h
@@ -3,7 +3,6 @@
 
 #include 
 
-void vcpu_kick(struct vcpu *v);
 void vcpu_mark_events_pending(struct vcpu *v);
 void vcpu_update_evtchn_irq(struct vcpu *v);
 void vcpu_block_unless_event_pending(struct vcpu *v);
diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
index 3ebdf9953f..6f4047bb77 100644
--- a/xen/arch/arm/vgic.c
+++ b/xen/arch/arm/vgic.c
@@ -9,6 +9,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -17,7 +18,6 @@
 #include 
 #include 
 
-#include 
 #include 
 
 #include 
diff --git a/xen/arch/arm/vgic/vgic.c b/xen/arch/arm/vgic/vgic.c
index b2c0e1873a..7361e38709 100644
--- a/xen/arch/arm/vgic/vgic.c
+++ b/xen/arch/arm/vgic/vgic.c
@@ -16,9 +16,9 @@
  */
 
 #include 
+#include 
 #include 
 #include 
-#include 
 #include 
 
 #include "vgic.h"
diff --git a/xen/arch/ppc/include/asm/event.h b/xen/arch/ppc/include/asm/event.h
index 0f475c4b89..565eee1439 100644
--- a/xen/arch/ppc/include/asm/event.h
+++ b/xen/arch/ppc/include/asm/event.h
@@ -5,7 +5,6 @@
 #include 
 
 /* TODO: implement */
-static inline void vcpu_kick(struct vcpu *v) { BUG_ON("unimplemented"); }
 static inline void vcpu_mark_events_pending(struct vcpu *v) { BUG_ON("unimplemented"); }
 static inline void vcpu_update_evtchn_irq(struct vcpu *v) { BUG_ON("unimplemented"); }
 static inline void vcpu_block_unless_event_pending(struct vcpu *v) { BUG_ON("unimplemented"); }
diff --git a/xen/arch/x86/hvm/vioapic.c b/xen/arch/x86/hvm/vioapic.c
index 7c725f9e47..5e8938a799 100644
--- a/xen/arch/x86/hvm/vioapic.c
+++ b/xen/arch/x86/hvm/vioapic.c
@@ -29,6 +29,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -36,7 +37,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 
 /* HACK: Route IRQ0 only to VCPU0 to prevent time jumps. */
diff --git a/xen/arch/x86/hvm/viridian/time.c b/xen/arch/x86/hvm/viridian/time.c
index 9311858d63..710a58879b 100644
--- a/xen/arch/x86/hvm/viridian/time.c
+++ b/xen/arch/x86/hvm/viridian/time.c
@@ -7,12 +7,12 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
 
 #include 
-#include 
 #include 
 #include 
 
diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c
index 6b407226c4..7009b9d0b0 100644
--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -5,6 +5,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -21,7 +22,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
diff --git a/xen/arch/x86/hvm/vpt.c b/xen/arch/x86/hvm/vpt.c
index 50ed738998..e7737ac808 100644
--- a/xen/arch/x86/hvm/vpt.c
+++ b/xen/arch/x86/hvm/vpt.c
@@ -5,10 +5,10 @@
  * Copyright (c) 2006, Xiaowei Yang, Intel Corporation.
  */
 
+#include 
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
diff --git a/xen/arch/x86/include/asm/event.h b/xen/arch/x86/include/asm/event.h
index 434f65007e..d13ce28167 100644
--- a/xen/arch/x86/include/asm/event.h
+++ b/xen/arch/x86/include/asm/event.h
@@ -11,7 +11,6 @@
 
 #include 
 
-void vcpu_kick(struct vcpu *v);
 void vcpu_mark_events_pending(struct vcpu *v);
 
 static inline int vcpu_event_delivery_is_enabled(struct vcpu *v)
diff --git a/xen/include/xen/event.h b/xen/include/xen/event.h
index 930190054c..211a3ae8d0 100644
--- a/xen/include/xen/event.h
+++ b/xen/include/xen/event.h
@@ -306,4 +306,6 @@ static inline int evtchn_port_poll(struct domain *d, evtchn_port_t port)
     return rc;
 }
 
+void vcpu_kick(struct vcpu *v);
+
 #endif /* __XEN_EVENT_H__ */
-- 
2.52.0



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From: Michal Orzel 
To: 
CC: Michal Orzel , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Volodymyr Babchuk 
Subject: [PATCH v2] vgic-v3: Ignore writes to ISACTIVER{nE}N when eSPI is not used
Date: Fri, 28 Nov 2025 12:49:13 +0100
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Prior to introducing GICv3 eSPI support, writes to these registers were
ignored. Now the behavior is changed and we inject fault to the guests.
According to documentation, eSPI registers are treated as RES0, when
GICD_TYPER.ESPI is 0 (this would be the case when CONFIG_GICV3_ESPI=n or
nr_espis is 0). Restore the previous behavior by checking whether eSPI
is in use or not.

Fixes: 93eecb2c4b88 ("xen/arm: vgic-v3: add emulation of GICv3.1 eSPI registers")
Signed-off-by: Michal Orzel 
---
Changes in v2:
 - only ignore when eSPI is not in use
---
 xen/arch/arm/vgic-v3.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
index 8b1c8eef8024..77aab5c3c293 100644
--- a/xen/arch/arm/vgic-v3.c
+++ b/xen/arch/arm/vgic-v3.c
@@ -884,9 +884,18 @@ static int __vgic_v3_distr_common_mmio_write(const char *name, struct vcpu *v,
                    "%pv: %s: unhandled word write %#"PRIregister" to ISACTIVER%d\n",
                    v, name, r, reg - GICD_ISACTIVER);
         else
+        {
+#ifdef CONFIG_GICV3_ESPI
+            if ( !v->domain->arch.vgic.nr_espis )
+                goto write_ignore;
+
             printk(XENLOG_G_ERR
                    "%pv: %s: unhandled word write %#"PRIregister" to ISACTIVER%dE\n",
                    v, name, r, reg - GICD_ISACTIVERnE);
+#else
+            goto write_ignore;
+#endif
+        }
         return 0;
 
     case VRANGE32(GICD_ICACTIVER, GICD_ICACTIVERN):
-- 
2.43.0



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Subject: Re: [PATCH v1] xen: move vcpu_kick() declaration to common header
To: Oleksii Kurochko 
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Andrew Cooper ,
 Anthony PERARD ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Timothy Pearson , Paul Durrant
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On 28.11.2025 12:38, Oleksii Kurochko wrote:
> The vcpu_kick() declaration is duplicated across multiple
> architecture-specific event.h headers (ARM, x86, PPC).
> 
> Remove the redundant declarations and move vcpu_kick() into
> the common xen/include/xen/event.h header.
> 
> Drop the definition of vcpu_kick() from ppc/include/asm/event.h,
> as it is already provided in ppc/stubs.c.
> 
> Include  instead of  in places where
> vcpu_kick() is used, since its declaration now resides in
> .

Centralizing is of course good. Question is whether xen/event.h is a good
home for the decl. Generally related decls live in xen/sched.h. There was,
however, a vague plan to try to split that up some. Others, REST
maintainers in particular: Thoughts?

Jan


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Message-ID: 
Date: Fri, 28 Nov 2025 14:11:52 +0200
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v3] xen/domain: introduce generic functions for domain
 struct allocation and freeing
To: Oleksii Kurochko ,
 xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
 Stefano Stabellini , Julien Grall ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Andrew Cooper ,
 Anthony PERARD , Jan Beulich ,
 Timothy Pearson ,
 Alistair Francis ,
 Bob Eshleman , Connor Davis 
References: <0a66c71356e8d6ea788022438d7a73dbff8aa5b9.1764243466.git.oleksii.kurochko@gmail.com>
Content-Language: en-US
From: Grygorii Strashko 
In-Reply-To: <0a66c71356e8d6ea788022438d7a73dbff8aa5b9.1764243466.git.oleksii.kurochko@gmail.com>
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Hi

Sorry for the late comment.

On 27.11.25 18:26, Oleksii Kurochko wrote:
> From: Roger Pau Monne 
> 
> Move x86's free_domain_struct() to common code since it is shared between
> architectures.
> 
> Move the x86 version of alloc_domain_struct() to common code as most of the
> logic is architecture-independent. To handle the remaining architectural
> differences, introduce arch_domain_struct_memflags() for x86-specific
> allocation requirements.
> 
> No functional change.
> 
> Suggested-by: Jan Beulich 
> [Introduce an arch-specific function instead of using a weak function]
> Signed-off-by: Roger Pau Monné 
> Signed-off-by: Oleksii Kurochko 
> ---
> Changes in v3:
>   - s/arch_alloc_domain_struct_bits/arch_domain_struct_memflags.
>   - Make x86's arch_domain_struct_memflags() to return MEMF_bits(bits) instead
>     of bits.
>   - Move "#define arch_domain_struct_memflags arch_domain_struct_memflags"
>     and declaration of arch_domain_struct_memflags() from x86/asm/pv/domain.h
>     to x86/domain.h.
>   - Update alloc_domain_struct() to work with arch_domain_struct_memflags().
>   - s/Suggested-By/Suggested-by.
>   - CI tests: https://gitlab.com/xen-project/people/olkur/xen/-/pipelines/2182821111
> ---
> Changes in v2:
> - Introduce an arch-specific function to handle differences between arch-es
>    in domain structure allocation requirements, instead of relying on a weak
>    function.
> - Move free_domain_struct() to common code.
> - Add Suggested-by: Jan Beulich .
> - Update the commit message.
> - Link to original patch:
>    https://lore.kernel.org/xen-devel/c08595dd7940b44a1392e16d4a2035b95b5c580b.1749829230.git.oleksii.kurochko@gmail.com/
> ---
>   xen/arch/arm/domain.c             | 17 -----------------
>   xen/arch/ppc/stubs.c              | 10 ----------
>   xen/arch/riscv/stubs.c            | 10 ----------
>   xen/arch/x86/domain.c             | 15 ++-------------
>   xen/arch/x86/include/asm/domain.h |  3 +++
>   xen/common/domain.c               | 22 ++++++++++++++++++++++
>   6 files changed, 27 insertions(+), 50 deletions(-)
> 

[...]

>   
>   struct vcpu *alloc_vcpu_struct(const struct domain *d)
> diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/domain.h
> index 5df8c78253..386ec61745 100644
> --- a/xen/arch/x86/include/asm/domain.h
> +++ b/xen/arch/x86/include/asm/domain.h
> @@ -12,6 +12,9 @@
>   #include 
>   #include 
>   
> +unsigned int arch_domain_struct_memflags(void);
> +#define arch_domain_struct_memflags arch_domain_struct_memflags
> +
>   #define has_32bit_shinfo(d)    ((d)->arch.has_32bit_shinfo)
>   
>   /*
> diff --git a/xen/common/domain.c b/xen/common/domain.c
> index 3b6e9471c4..2e8d74cbd9 100644
> --- a/xen/common/domain.c
> +++ b/xen/common/domain.c
> @@ -799,6 +799,28 @@ static int sanitise_domain_config(struct xen_domctl_createdomain *config)
>       return arch_sanitise_domain_config(config);
>   }
>   
> +struct domain *alloc_domain_struct(void)
> +{
> +#ifndef arch_domain_struct_memflags
> +# define arch_domain_struct_memflags() 0
> +#endif

Is it really the right way to
hide part of common interface in common code instead of header?


> +
> +    struct domain *d;
> +
> +    BUILD_BUG_ON(sizeof(*d) > PAGE_SIZE);
> +
> +    d = alloc_xenheap_pages(0, arch_domain_struct_memflags());
> +    if ( d != NULL )
> +        clear_page(d);
> +
> +    return d;
> +}
> +
> +void free_domain_struct(struct domain *d)
> +{
> +    free_xenheap_page(d);
> +}
> +
>   struct domain *domain_create(domid_t domid,
>                                struct xen_domctl_createdomain *config,
>                                unsigned int flags)

-- 
Best regards,
-grygorii



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Subject: Re: [PATCH v3] xen/domain: introduce generic functions for domain
 struct allocation and freeing
To: Grygorii Strashko 
Cc: Roger Pau Monne ,
 Stefano Stabellini , Julien Grall ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Andrew Cooper ,
 Anthony PERARD ,
 Timothy Pearson ,
 Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Oleksii Kurochko ,
 xen-devel@lists.xenproject.org
References: <0a66c71356e8d6ea788022438d7a73dbff8aa5b9.1764243466.git.oleksii.kurochko@gmail.com>
 
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On 28.11.2025 13:11, Grygorii Strashko wrote:
> On 27.11.25 18:26, Oleksii Kurochko wrote:
>> --- a/xen/common/domain.c
>> +++ b/xen/common/domain.c
>> @@ -799,6 +799,28 @@ static int sanitise_domain_config(struct xen_domctl_createdomain *config)
>>       return arch_sanitise_domain_config(config);
>>   }
>>   
>> +struct domain *alloc_domain_struct(void)
>> +{
>> +#ifndef arch_domain_struct_memflags
>> +# define arch_domain_struct_memflags() 0
>> +#endif
> 
> Is it really the right way to
> hide part of common interface in common code instead of header?

If it had multiple uses in different files, surely it should be put in a header.
In this case though, with (even long term) there being only a single use site, I
don't see why we should even bother figuring out which header would be an
appropriate place for it to live in.

Jan


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From: "Julian Vetter" 
Subject: =?utf-8?Q?Re:=20[PATCH]=20x86/efi:=20Remove=20NX=20check=20from=20efi-boot.h?=
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On 11/27/25 16:20, Andrew Cooper wrote:
> On 27/11/2025 2:31 pm, Julian Vetter wrote:
>> Currently Intel CPUs in EFI mode with the "Execute Disable Bit" disabled
>> and the 'CONFIG_REQUIRE_NX=3Dy' fail to boot, because this check is
>> performed before trampoline_setup is called, which determines if NX is
>> supported or if it's hidden by 'MSR_IA32_MISC_ENABLE[34] =3D 1' (if so,
>> re-enables NX).
>>
>> Signed-off-by: Julian Vetter 
> 
> Lovely...=C2=A0 This isn't the only bug; there's another one from the Vat=
es
> forums about AMD CPUs which I haven't gotten around to fixing yet.
> 

Thank you. I will have a look. I haven't seen this thread.

> Do you have any more information about which system looks like this?
> 
I'm not sure if I understand your question correctly, but I was just 
booting an Intel based machine newer than ~2012. I have tested this on 4 
different machines, on which 3 hit this code path. One was a HPE 
ProLiant m510 Server with a XEON CPU, second was a Mini PC with Celeron 
CPU, and third was an old Intel NUC DCCP847DYE also with a Celeron CPU. 
The only system where I couldn't reproduce the issue was an old 
workstation with a Gigabyte mainboard. It has the flag in the Bios to 
set MSR_IA32_MISC_ENABLE, but I'm not sure if it was actually booting 
via UEFI. I will verify this on monday. I booted all the 3 other systems 
via UEFI -> Grub -> multiboot2. My grub entry looks like this:

multiboot2 /boot/xen.gz dom0_mem=3D2656M,max:2656M watchdog ucode=3Dscan 
dom0_max_vcpus=3D1-8 crashkernel=3D256M,below=3D4G console=3Dvga vga=3Dmode=
-0x0311
module2 boot/vmlinuz console=3Dhvc0 console=3Dtty0 init=3D/bin/sh
module2 boot/initrd-dom0

> trampoline_setup isn't executed on all EFI boots.=C2=A0 I had a different=
 fix
> in mind, but it's a little more complicated.

Aha. yes, I didn't thought about other code paths. But I'm wondering if 
we couldn't do the whole dance with XD and NX directly in the 
efi-boot.h. Then maybe we could even remove the part in trampoline_setup 
or are there other systems that hit only the trampoline_setup but not 
the efi_multiboot2?

@@ -747,16 +748,27 @@ static void __init efi_arch_cpu(void)

      if ( (eax >> 16) =3D=3D 0x8000 && eax > 0x80000000U )
      {
-        caps[FEATURESET_e1d] =3D cpuid_edx(0x80000001U);
-
          /*
           * This check purposefully doesn't use cpu_has_nx because
           * cpu_has_nx bypasses the boot_cpu_data read if Xen was compiled
           * with CONFIG_REQUIRE_NX
           */
-        if ( IS_ENABLED(CONFIG_REQUIRE_NX) &&
-             !boot_cpu_has(X86_FEATURE_NX) )
-            blexit(L"This build of Xen requires NX support");
+        if (IS_ENABLED(CONFIG_REQUIRE_NX)) {
+
+            msr_ia32 =3D rdmsr(MSR_IA32_MISC_ENABLE);
+            /* NX is hidden */
+            if (msr_ia32 & MSR_IA32_MISC_ENABLE_XD_DISABLE) {
+                msr_ia32 &=3D ~MSR_IA32_MISC_ENABLE_XD_DISABLE;
+
+                wrmsr(MSR_IA32_MISC_ENABLE_XD_DISABLE, msr_ia32);
+
+                /* Re-check for NX */
+                caps[FEATURESET_e1d] =3D cpuid_edx(0x80000001U);
+            }
+
+            if (!boot_cpu_has(X86_FEATURE_NX))
+                blexit(L"This build of Xen requires NX support");
+        }

          if ( cpu_has_nx )
              trampoline_efer |=3D EFER_NXE;


> 
> If I do the key prep patch, would you mind trying to tackle the AMD side
> too?
Yes of course. I will have a look into it. Thank you.

> 
> ~Andrew



--
Julian Vetter | Vates Hypervisor & Kernel Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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Date: Fri, 28 Nov 2025 13:21:47 +0000
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Cc: andrew.cooper3@citrix.com, Stefano Stabellini ,
 Julien Grall , Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Anthony PERARD ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Timothy Pearson , Paul Durrant
 , xen-devel@lists.xenproject.org
Subject: Re: [PATCH v1] xen: move vcpu_kick() declaration to common header
To: Jan Beulich ,
 Oleksii Kurochko 
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On 28/11/2025 11:58 am, Jan Beulich wrote:
> On 28.11.2025 12:38, Oleksii Kurochko wrote:
>> The vcpu_kick() declaration is duplicated across multiple
>> architecture-specific event.h headers (ARM, x86, PPC).
>>
>> Remove the redundant declarations and move vcpu_kick() into
>> the common xen/include/xen/event.h header.
>>
>> Drop the definition of vcpu_kick() from ppc/include/asm/event.h,
>> as it is already provided in ppc/stubs.c.
>>
>> Include  instead of  in places where
>> vcpu_kick() is used, since its declaration now resides in
>> .
> Centralizing is of course good. Question is whether xen/event.h is a good
> home for the decl. Generally related decls live in xen/sched.h. There was,
> however, a vague plan to try to split that up some. Others, REST
> maintainers in particular: Thoughts?

+1 to centralising.  I'd suggest xen/sched.h too.

~Andrew


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From: "Julian Vetter" 
Subject: =?utf-8?Q?Re:=20[PATCH]=20x86/efi:=20Remove=20NX=20check=20from=20efi-boot.h?=
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To: "Teddy Astie" , xen-devel@lists.xenproject.org
Cc: "Jan Beulich" , "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Daniel P . Smith" , "=?utf-8?Q?Marek=20Marczykowski-G=C3=B3recki?=" 
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On 11/27/25 16:33, Teddy Astie wrote:
> Le 27/11/2025 =C3=A0 15:33, Julian Vetter a =C3=A9crit=C2=A0:
>> Currently Intel CPUs in EFI mode with the "Execute Disable Bit" disabled
>> and the 'CONFIG_REQUIRE_NX=3Dy' fail to boot, because this check is
>> performed before trampoline_setup is called, which determines if NX is
>> supported or if it's hidden by 'MSR_IA32_MISC_ENABLE[34] =3D 1' (if so,
>> re-enables NX).
>>
>> Signed-off-by: Julian Vetter 
>> ---
>>    xen/arch/x86/efi/efi-boot.h | 12 ------------
>>    1 file changed, 12 deletions(-)
>>
>> diff --git a/xen/arch/x86/efi/efi-boot.h b/xen/arch/x86/efi/efi-boot.h
>> index 0194720003..8dfd549f12 100644
>> --- a/xen/arch/x86/efi/efi-boot.h
>> +++ b/xen/arch/x86/efi/efi-boot.h
>> @@ -748,18 +748,6 @@ static void __init efi_arch_cpu(void)
>>        if ( (eax >> 16) =3D=3D 0x8000 && eax > 0x80000000U )
>>        {
>>            caps[FEATURESET_e1d] =3D cpuid_edx(0x80000001U);
>> -
>> -        /*
>> -         * This check purposefully doesn't use cpu_has_nx because
>> -         * cpu_has_nx bypasses the boot_cpu_data read if Xen was compil=
ed
>> -         * with CONFIG_REQUIRE_NX
>> -         */
>> -        if ( IS_ENABLED(CONFIG_REQUIRE_NX) &&
>> -             !boot_cpu_has(X86_FEATURE_NX) )
>> -            blexit(L"This build of Xen requires NX support");
>> -
>> -        if ( cpu_has_nx )
>> -            trampoline_efer |=3D EFER_NXE;
> 
> I don't think we want to skip setting EFER_NXE. As it would mean not
> using NX at all (unless I missed something).
> 

Yes, I though the code in trampoline_setup is taken in any case. Because 
at the label .Lgot_nx the EFER_NXE is set. But Andrew said that this is 
not always the case, then you're right this should be kept.

> If cpu_policy doesn't have nx, it is likely going to cause issues e.g in
> VMs which will not see NX and potentially refuse to boot. I don't really
> know in which order things are initialized, but it probably wants to be
> considered.
> 
> Perhaps, we want to do something like detecting the
> MSR_IA32_MISC_ENABLE[34] then adjusting the cpu_policy appropriately
> after patching it ?
> 

yes, I was wondering if we couldn't do the check for 
MSR_IA32_MISC_ENABLE[34] =3D=3D 1 directly in the efi_arch_cpu().

>>        }
>>    }
>>    
> 
> 
> 
> --
> Teddy Astie | Vates XCP-ng Developer
> 
> XCP-ng & Xen Orchestra - Vates solutions
> 
> web: https://vates.tech



--
Julian Vetter | Vates Hypervisor & Kernel Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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From: Juergen Gross 
To: minios-devel@lists.xenproject.org,
	xen-devel@lists.xenproject.org
Cc: samuel.thibault@ens-lyon.org,
	Juergen Gross 
Subject: [MINI-OS PATCH] x86: have .note.Xen segment contents before other .note.* ones
Date: Fri, 28 Nov 2025 14:38:07 +0100
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Today the linker script of Mini-OS specifies to merge all .note*
sections into a single section .note:

 .note : {
          *(.note)
          *(.note.*)
  }

It seems as if ld will use the attributes of the first .note* segment
found during the linking process for the final .note segment.

Somewhere between binutils 2.43 and 2.45 something changed resulting in
.note.GNU-stack being the first .note* segment found. Unfortunately
this segment has unusual attributes: it has PROGBITS instead of NOTE as
type, resulting in the Xen ELF parsing to no longer look into it for
finding the Xen ELF-notes. This in turn will result in failure while
trying to parse the binary, which will let domain creation fail.

In order to avoid this issue, enhance the linker script to merge
.note.Xen before other .note.* segments, resulting in the final .note
segment to still have the NOTE type.

Fixes: 6d1cc81d049f ("x86: switch to use elfnote")
Signed-off-by: Juergen Gross 
---
 arch/x86/minios-x86.lds.S | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/minios-x86.lds.S b/arch/x86/minios-x86.lds.S
index 8c6e0a60..6367b4b2 100644
--- a/arch/x86/minios-x86.lds.S
+++ b/arch/x86/minios-x86.lds.S
@@ -33,6 +33,7 @@ SECTIONS
 
         .note : {
                 *(.note)
+                *(.note.Xen)
                 *(.note.*)
         }
 
-- 
2.51.0



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Date: Fri, 28 Nov 2025 15:41:25 +0200
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v3] xen/domain: introduce generic functions for domain
 struct allocation and freeing
To: Jan Beulich 
Cc: Roger Pau Monne ,
 Stefano Stabellini , Julien Grall ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Andrew Cooper ,
 Anthony PERARD ,
 Timothy Pearson ,
 Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Oleksii Kurochko ,
 xen-devel@lists.xenproject.org
References: <0a66c71356e8d6ea788022438d7a73dbff8aa5b9.1764243466.git.oleksii.kurochko@gmail.com>
 
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On 28.11.25 15:19, Jan Beulich wrote:
> On 28.11.2025 13:11, Grygorii Strashko wrote:
>> On 27.11.25 18:26, Oleksii Kurochko wrote:
>>> --- a/xen/common/domain.c
>>> +++ b/xen/common/domain.c
>>> @@ -799,6 +799,28 @@ static int sanitise_domain_config(struct xen_domctl_createdomain *config)
>>>        return arch_sanitise_domain_config(config);
>>>    }
>>>    
>>> +struct domain *alloc_domain_struct(void)
>>> +{
>>> +#ifndef arch_domain_struct_memflags
>>> +# define arch_domain_struct_memflags() 0
>>> +#endif
>>
>> Is it really the right way to
>> hide part of common interface in common code instead of header?
> 
> If it had multiple uses in different files, surely it should be put in a header.
> In this case though, with (even long term) there being only a single use site, I
> don't see why we should even bother figuring out which header would be an
> appropriate place for it to live in.

Thank you for clarification.

-- 
Best regards,
-grygorii



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Date: Fri, 28 Nov 2025 14:50:44 +0100
From: Alexander Gordeev 
To: Kevin Brodsky 
Cc: linux-mm@kvack.org, linux-kernel@vger.kernel.org,
        Andreas Larsson ,
        Andrew Morton ,
        Boris Ostrovsky ,
        Borislav Petkov ,
        Catalin Marinas ,
        Christophe Leroy ,
        Dave Hansen ,
        David Hildenbrand ,
        "David S. Miller" ,
        David Woodhouse ,
        "H. Peter Anvin" , Ingo Molnar ,
        Jann Horn , Juergen Gross ,
        "Liam R. Howlett" ,
        Lorenzo Stoakes ,
        Madhavan Srinivasan ,
        Michael Ellerman , Michal Hocko ,
        Mike Rapoport , Nicholas Piggin ,
        Peter Zijlstra ,
        "Ritesh Harjani (IBM)" ,
        Ryan Roberts ,
        Suren Baghdasaryan ,
        Thomas Gleixner ,
        Venkat Rao Bagalkote ,
        Vlastimil Babka , Will Deacon ,
        Yeoreum Yun ,
        linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org,
        sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org,
        x86@kernel.org
Subject: Re: [PATCH v5 06/12] mm: introduce generic lazy_mmu helpers
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On Mon, Nov 24, 2025 at 01:22:22PM +0000, Kevin Brodsky wrote:
> The implementation of the lazy MMU mode is currently entirely
> arch-specific; core code directly calls arch helpers:
> arch_{enter,leave}_lazy_mmu_mode().
> 
> We are about to introduce support for nested lazy MMU sections.
> As things stand we'd have to duplicate that logic in every arch
> implementing lazy_mmu - adding to a fair amount of logic
> already duplicated across lazy_mmu implementations.
> 
> This patch therefore introduces a new generic layer that calls the
> existing arch_* helpers. Two pair of calls are introduced:
> 
> * lazy_mmu_mode_enable() ... lazy_mmu_mode_disable()
>     This is the standard case where the mode is enabled for a given
>     block of code by surrounding it with enable() and disable()
>     calls.
> 
> * lazy_mmu_mode_pause() ... lazy_mmu_mode_resume()
>     This is for situations where the mode is temporarily disabled
>     by first calling pause() and then resume() (e.g. to prevent any
>     batching from occurring in a critical section).
> 
> The documentation in  will be updated in a
> subsequent patch.
> 
> No functional change should be introduced at this stage.
> The implementation of enable()/resume() and disable()/pause() is
> currently identical, but nesting support will change that.
> 
> Most of the call sites have been updated using the following
> Coccinelle script:
> 
> @@
> @@
> {
> ...
> - arch_enter_lazy_mmu_mode();
> + lazy_mmu_mode_enable();
> ...
> - arch_leave_lazy_mmu_mode();
> + lazy_mmu_mode_disable();
> ...
> }
> 
> @@
> @@
> {
> ...
> - arch_leave_lazy_mmu_mode();
> + lazy_mmu_mode_pause();
> ...
> - arch_enter_lazy_mmu_mode();
> + lazy_mmu_mode_resume();
> ...
> }
> 
> A couple of notes regarding x86:
> 
> * Xen is currently the only case where explicit handling is required
>   for lazy MMU when context-switching. This is purely an
>   implementation detail and using the generic lazy_mmu_mode_*
>   functions would cause trouble when nesting support is introduced,
>   because the generic functions must be called from the current task.
>   For that reason we still use arch_leave() and arch_enter() there.
> 
> * x86 calls arch_flush_lazy_mmu_mode() unconditionally in a few
>   places, but only defines it if PARAVIRT_XXL is selected, and we
>   are removing the fallback in . Add a new fallback
>   definition to  to keep things building.

Would it make sense to explicitly describe the policy wrt sleeping while
in lazy MMU mode? If I understand the conclusion of conversation right:

* An arch implementation may disable preemption, but then it is arch
  responsibility not to call any arch-specific code that might sleep;
* As result, while in lazy MMU mode the generic code should never
  call a code that might sleep;

1. https://lore.kernel.org/linux-mm/b52726c7-ea9c-4743-a68d-3eafce4e5c61@arm.com/

> Acked-by: David Hildenbrand 
> Signed-off-by: Kevin Brodsky 
...


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Date: Fri, 28 Nov 2025 14:55:54 +0100
From: Alexander Gordeev 
To: Kevin Brodsky 
Cc: linux-mm@kvack.org, linux-kernel@vger.kernel.org,
        Andreas Larsson ,
        Andrew Morton ,
        Boris Ostrovsky ,
        Borislav Petkov ,
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        "David S. Miller" ,
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        linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org,
        sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org,
        x86@kernel.org
Subject: Re: [PATCH v5 08/12] mm: enable lazy_mmu sections to nest
Message-ID: <23dcf752-0b75-45a7-84f8-25bddf97af08-agordeev@linux.ibm.com>
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On Mon, Nov 24, 2025 at 01:22:24PM +0000, Kevin Brodsky wrote:
...
> + * Nesting is permitted:  may itself use an enable()/disable() pair.
> + * A nested call to enable() has no functional effect; however disable() causes
> + * any batched architectural state to be flushed regardless of nesting. After a
> + * call to disable(), the caller can therefore rely on all previous page table
> + * modifications to have taken effect, but the lazy MMU mode may still be
> + * enabled.
> + *
> + * In certain cases, it may be desirable to temporarily pause the lazy MMU mode.
> + * This can be done using:
> + *
> + *   lazy_mmu_mode_pause();
> + *   
> + *   lazy_mmu_mode_resume();
> + *
> + * pause() ensures that the mode is exited regardless of the nesting level;
> + * resume() re-enters the mode at the same nesting level. Any call to the
> + * lazy_mmu_mode_* API between those two calls has no effect. In particular,
> + * this means that pause()/resume() pairs may nest.
> + *
> + * in_lazy_mmu_mode() can be used to check whether the lazy MMU mode is
> + * currently enabled.

The in_lazy_mmu_mode() name looks ambiguous to me. When the lazy MMU mode
is paused are we still in lazy MMU mode? The __task_lazy_mmu_mode_active()
implementation suggests we are not, while one could still assume we are,
just paused.

Should in_lazy_mmu_mode() be named e.g. as in_active_lazy_mmu_mode() such
a confusion would not occur in the first place.

>   */
...
> +#ifdef CONFIG_ARCH_HAS_LAZY_MMU_MODE
> +/**
> + * __task_lazy_mmu_mode_active() - Test the lazy MMU mode state for a task.
> + * @tsk: The task to check.
> + *
> + * Test whether @tsk has its lazy MMU mode state set to active (i.e. enabled
> + * and not paused).
> + *
> + * This function only considers the state saved in task_struct; to test whether
> + * current actually is in lazy MMU mode, in_lazy_mmu_mode() should be used
> + * instead.
> + *
> + * This function is intended for architectures that implement the lazy MMU
> + * mode; it must not be called from generic code.
> + */
> +static inline bool __task_lazy_mmu_mode_active(struct task_struct *tsk)
> +{
> +	struct lazy_mmu_state *state = &tsk->lazy_mmu_state;
> +
> +	return state->enable_count > 0 && state->pause_count == 0;
> +}
> +
> +/**
> + * in_lazy_mmu_mode() - Test whether we are currently in lazy MMU mode.
> + *
> + * Test whether the current context is in lazy MMU mode. This is true if both:
> + * 1. We are not in interrupt context
> + * 2. Lazy MMU mode is active for the current task
> + *
> + * This function is intended for architectures that implement the lazy MMU
> + * mode; it must not be called from generic code.
> + */
> +static inline bool in_lazy_mmu_mode(void)
> +{
> +	if (in_interrupt())
> +		return false;
> +
> +	return __task_lazy_mmu_mode_active(current);
> +}
> +#endif
...


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Date: Fri, 28 Nov 2025 15:23:35 +0100
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Subject: Re: [PATCH v1] xen: move vcpu_kick() declaration to common header
To: Andrew Cooper , Jan Beulich 
Cc: Stefano Stabellini , Julien Grall
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On 11/28/25 2:21 PM, Andrew Cooper wrote:
> On 28/11/2025 11:58 am, Jan Beulich wrote:
>> On 28.11.2025 12:38, Oleksii Kurochko wrote:
>>> The vcpu_kick() declaration is duplicated across multiple
>>> architecture-specific event.h headers (ARM, x86, PPC).
>>>
>>> Remove the redundant declarations and move vcpu_kick() into
>>> the common xen/include/xen/event.h header.
>>>
>>> Drop the definition of vcpu_kick() from ppc/include/asm/event.h,
>>> as it is already provided in ppc/stubs.c.
>>>
>>> Include  instead of  in places where
>>> vcpu_kick() is used, since its declaration now resides in
>>> .
>> Centralizing is of course good. Question is whether xen/event.h is a good
>> home for the decl. Generally related decls live in xen/sched.h. There was,
>> however, a vague plan to try to split that up some. Others, REST
>> maintainers in particular: Thoughts?
> +1 to centralising.  I'd suggest xen/sched.h too.

I will move to xen/sched.h. It will be even better as the patch will be cleaner
as  is mostly already included in the changed files in this patch.

Thanks.

~ Oleksii



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Subject: Re: [MINI-OS PATCH] x86: have .note.Xen segment contents before other
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To: Juergen Gross 
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On 28.11.2025 14:38, Juergen Gross wrote:
> Today the linker script of Mini-OS specifies to merge all .note*
> sections into a single section .note:
> 
>  .note : {
>           *(.note)
>           *(.note.*)
>   }
> 
> It seems as if ld will use the attributes of the first .note* segment
> found during the linking process for the final .note segment.
> 
> Somewhere between binutils 2.43 and 2.45 something changed resulting in
> .note.GNU-stack being the first .note* segment found. Unfortunately
> this segment has unusual attributes: it has PROGBITS instead of NOTE as
> type, resulting in the Xen ELF parsing to no longer look into it for
> finding the Xen ELF-notes. This in turn will result in failure while
> trying to parse the binary, which will let domain creation fail.
> 
> In order to avoid this issue, enhance the linker script to merge
> .note.Xen before other .note.* segments, resulting in the final .note
> segment to still have the NOTE type.
> 
> Fixes: 6d1cc81d049f ("x86: switch to use elfnote")
> Signed-off-by: Juergen Gross 

Reviewed-by: Jan Beulich 

I wonder though ...

> --- a/arch/x86/minios-x86.lds.S
> +++ b/arch/x86/minios-x86.lds.S
> @@ -33,6 +33,7 @@ SECTIONS
>  
>          .note : {
>                  *(.note)
> +                *(.note.Xen)
>                  *(.note.*)
>          }

... what use .note here is. Can't it be dropped in exchange?

Jan


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To: Jan Beulich 
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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: Jan Beulich 
Cc: samuel.thibault@ens-lyon.org, minios-devel@lists.xenproject.org,
 xen-devel@lists.xenproject.org
Message-ID: <72af5838-ed6b-4549-a366-32aa0d5b3d34@suse.com>
Subject: Re: [MINI-OS PATCH] x86: have .note.Xen segment contents before other
 .note.* ones
References: <20251128133807.9206-1-jgross@suse.com>
 <96c71c8b-21de-42d9-afc9-280e651a29dc@suse.com>
In-Reply-To: <96c71c8b-21de-42d9-afc9-280e651a29dc@suse.com>
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From: Grygorii Strashko 
To: "xen-devel@lists.xenproject.org" 
CC: Grygorii Strashko , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , Volodymyr
 Babchuk , Timothy Pearson
	, Alistair Francis
	, Bob Eshleman , Connor
 Davis , Oleksii Kurochko ,
	Jan Beulich 
Subject: [PATCH v3 1/3] arm/ppc/riscv: drop unused domain_set_alloc_bitsize()
 macro
Thread-Topic: [PATCH v3 1/3] arm/ppc/riscv: drop unused
 domain_set_alloc_bitsize() macro
Thread-Index: AQHcYHrKJo3fQNjNOEm0i3u+ucdXcw==
Date: Fri, 28 Nov 2025 15:22:20 +0000
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From: Grygorii Strashko 

The domain_set_alloc_bitsize() is x86 PV32 specific and not used by other
arch or common code, so remove it.

Signed-off-by: Grygorii Strashko 
Acked-by: Jan Beulich 
---
v3: no changes, added tag

 xen/arch/arm/include/asm/mm.h   | 1 -
 xen/arch/ppc/include/asm/mm.h   | 1 -
 xen/arch/riscv/include/asm/mm.h | 1 -
 3 files changed, 3 deletions(-)

diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h
index f702f4a0d676..4c6cc64aa7ba 100644
--- a/xen/arch/arm/include/asm/mm.h
+++ b/xen/arch/arm/include/asm/mm.h
@@ -313,7 +313,6 @@ struct page_info *get_page_from_gva(struct vcpu *v, vad=
dr_t va,
 /* Arch-specific portion of memory_op hypercall. */
 long arch_memory_op(int op, XEN_GUEST_HANDLE_PARAM(void) arg);
=20
-#define domain_set_alloc_bitsize(d) ((void)0)
 #define domain_clamp_alloc_bitsize(d, b) (b)
=20
 unsigned long domain_get_maximum_gpfn(struct domain *d);
diff --git a/xen/arch/ppc/include/asm/mm.h b/xen/arch/ppc/include/asm/mm.h
index a33eeec43bd6..e478291fdf55 100644
--- a/xen/arch/ppc/include/asm/mm.h
+++ b/xen/arch/ppc/include/asm/mm.h
@@ -96,7 +96,6 @@ static inline struct page_info *virt_to_page(const void *=
v)
 /* TODO: implement */
 #define mfn_valid(mfn) ({ (void) (mfn); 0; })
=20
-#define domain_set_alloc_bitsize(d) ((void)(d))
 #define domain_clamp_alloc_bitsize(d, b) (b)
=20
 #define PFN_ORDER(pfn_) ((pfn_)->v.free.order)
diff --git a/xen/arch/riscv/include/asm/mm.h b/xen/arch/riscv/include/asm/m=
m.h
index 9283616c0224..11e9f26bf0a5 100644
--- a/xen/arch/riscv/include/asm/mm.h
+++ b/xen/arch/riscv/include/asm/mm.h
@@ -292,7 +292,6 @@ static inline bool arch_mfns_in_directmap(unsigned long=
 mfn, unsigned long nr)
 /* TODO: implement */
 #define mfn_valid(mfn) ({ (void)(mfn); 0; })
=20
-#define domain_set_alloc_bitsize(d) ((void)(d))
 #define domain_clamp_alloc_bitsize(d, b) ((void)(d), (b))
=20
 #define PFN_ORDER(pg) ((pg)->v.free.order)
--=20
2.34.1


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From: Grygorii Strashko 
To: "xen-devel@lists.xenproject.org" 
CC: Grygorii Strashko , Jan Beulich
	, Andrew Cooper ,
	=?iso-8859-1?Q?Roger_Pau_Monn=E9?= 
Subject: [PATCH v3 3/3] xen/x86: move d->arch.physaddr_bitsize field handling
 to pv32
Thread-Topic: [PATCH v3 3/3] xen/x86: move d->arch.physaddr_bitsize field
 handling to pv32
Thread-Index: AQHcYHrKMY8RaksHyUKCNstHynUmRA==
Date: Fri, 28 Nov 2025 15:22:21 +0000
Message-ID: <20251128152218.3886583-4-grygorii_strashko@epam.com>
References: <20251128152218.3886583-1-grygorii_strashko@epam.com>
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From: Grygorii Strashko 

The d->arch.physaddr_bitsize field is used only by PV32 code, so:

- move domain_set_alloc_bitsize() function into PV32 code and
  inline it into switch_compat()
- move domain_clamp_alloc_bitsize() function into PV32 code
  and convert to macro
- move d->arch.physaddr_bitsize field under PV32 ifdef into
  struct pv_domain

Signed-off-by: Grygorii Strashko 
---
changes in v3:
- domain_set_alloc_bitsize() inlined.
  Note change of condition to "(MACH2PHYS_COMPAT_NR_ENTRIES(d) < max_page)"
- domain_clamp_alloc_bitsize() convert to macro

 xen/arch/x86/include/asm/domain.h |  8 +++++---
 xen/arch/x86/include/asm/mm.h     |  9 ++++++---
 xen/arch/x86/pv/dom0_build.c      |  7 +++++--
 xen/arch/x86/pv/domain.c          |  6 +++++-
 xen/arch/x86/x86_64/mm.c          | 20 --------------------
 5 files changed, 21 insertions(+), 29 deletions(-)

diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/d=
omain.h
index 5df8c7825333..6cdfdf8b5c26 100644
--- a/xen/arch/x86/include/asm/domain.h
+++ b/xen/arch/x86/include/asm/domain.h
@@ -276,6 +276,11 @@ struct pv_domain
=20
     atomic_t nr_l4_pages;
=20
+#ifdef CONFIG_PV32
+    /* Maximum physical-address bitwidth supported by this guest. */
+    unsigned int physaddr_bitsize;
+#endif
+
     /* Is a 32-bit PV guest? */
     bool is_32bit;
     /* XPTI active? */
@@ -316,9 +321,6 @@ struct arch_domain
     unsigned int hv_compat_vstart;
 #endif
=20
-    /* Maximum physical-address bitwidth supported by this guest. */
-    unsigned int physaddr_bitsize;
-
     /* I/O-port admin-specified access capabilities. */
     struct rangeset *ioport_caps;
     uint32_t pci_cf8;
diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h
index 17ca6666a34e..a308a98df2a4 100644
--- a/xen/arch/x86/include/asm/mm.h
+++ b/xen/arch/x86/include/asm/mm.h
@@ -619,9 +619,12 @@ void __iomem *ioremap_wc(paddr_t pa, size_t len);
=20
 extern int memory_add(unsigned long spfn, unsigned long epfn, unsigned int=
 pxm);
=20
-void domain_set_alloc_bitsize(struct domain *d);
-unsigned int domain_clamp_alloc_bitsize(struct domain *d, unsigned int bit=
s);
-#define domain_clamp_alloc_bitsize(d, bits) domain_clamp_alloc_bitsize(d, =
bits)
+#ifdef CONFIG_PV32
+#define domain_clamp_alloc_bitsize(d, bits)                               =
     \
+    (((d) && (d)->arch.pv.physaddr_bitsize)                               =
     \
+         ? min_t(uint32_t, (d)->arch.pv.physaddr_bitsize, (bits))         =
     \
+         : (bits))
+#endif
=20
 unsigned long domain_get_maximum_gpfn(struct domain *d);
=20
diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c
index 21158ce1812e..94f7976e819f 100644
--- a/xen/arch/x86/pv/dom0_build.c
+++ b/xen/arch/x86/pv/dom0_build.c
@@ -626,8 +626,10 @@ static int __init dom0_construct(const struct boot_dom=
ain *bd)
         initrd_mfn =3D paddr_to_pfn(initrd->start);
         mfn =3D initrd_mfn;
         count =3D PFN_UP(initrd_len);
-        if ( d->arch.physaddr_bitsize &&
-             ((mfn + count - 1) >> (d->arch.physaddr_bitsize - PAGE_SHIFT)=
) )
+
+#ifdef CONFIG_PV32
+        if ( d->arch.pv.physaddr_bitsize &&
+             ((mfn + count - 1) >> (d->arch.pv.physaddr_bitsize - PAGE_SHI=
FT)) )
         {
             order =3D get_order_from_pages(count);
             page =3D alloc_domheap_pages(d, order, MEMF_no_scrub);
@@ -650,6 +652,7 @@ static int __init dom0_construct(const struct boot_doma=
in *bd)
             initrd->start =3D pfn_to_paddr(initrd_mfn);
         }
         else
+#endif
         {
             while ( count-- )
                 if ( assign_pages(mfn_to_page(_mfn(mfn++)), 1, d, 0) )
diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c
index 9c4785c187dd..d58e4e213e5c 100644
--- a/xen/arch/x86/pv/domain.c
+++ b/xen/arch/x86/pv/domain.c
@@ -254,7 +254,11 @@ int switch_compat(struct domain *d)
             goto undo_and_fail;
     }
=20
-    domain_set_alloc_bitsize(d);
+    if ( MACH2PHYS_COMPAT_NR_ENTRIES(d) < max_page )
+        d->arch.pv.physaddr_bitsize =3D
+            /* 2^n entries can be contained in guest's p2m mapping space *=
/
+            fls(MACH2PHYS_COMPAT_NR_ENTRIES(d)) - 1 + PAGE_SHIFT;
+
     recalculate_cpuid_policy(d);
=20
     d->arch.x87_fip_width =3D 4;
diff --git a/xen/arch/x86/x86_64/mm.c b/xen/arch/x86/x86_64/mm.c
index d4e6a9c0a2e0..8eadab7933d0 100644
--- a/xen/arch/x86/x86_64/mm.c
+++ b/xen/arch/x86/x86_64/mm.c
@@ -1119,26 +1119,6 @@ unmap:
     return ret;
 }
=20
-void domain_set_alloc_bitsize(struct domain *d)
-{
-    if ( !is_pv_32bit_domain(d) ||
-         (MACH2PHYS_COMPAT_NR_ENTRIES(d) >=3D max_page) ||
-         d->arch.physaddr_bitsize > 0 )
-        return;
-    d->arch.physaddr_bitsize =3D
-        /* 2^n entries can be contained in guest's p2m mapping space */
-        fls(MACH2PHYS_COMPAT_NR_ENTRIES(d)) - 1
-        /* 2^n pages -> 2^(n+PAGE_SHIFT) bits */
-        + PAGE_SHIFT;
-}
-
-unsigned int domain_clamp_alloc_bitsize(struct domain *d, unsigned int bit=
s)
-{
-    if ( (d =3D=3D NULL) || (d->arch.physaddr_bitsize =3D=3D 0) )
-        return bits;
-    return min(d->arch.physaddr_bitsize, bits);
-}
-
 static int transfer_pages_to_heap(struct mem_hotadd_info *info)
 {
     unsigned long i;
--=20
2.34.1


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From: Grygorii Strashko 
To: "xen-devel@lists.xenproject.org" 
CC: Grygorii Strashko , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , Volodymyr
 Babchuk , Andrew Cooper
	, Anthony PERARD , Jan
 Beulich , =?iso-8859-1?Q?Roger_Pau_Monn=E9?=
	, Timothy Pearson ,
	Alistair Francis , Bob Eshleman
	, Connor Davis , Oleksii
 Kurochko 
Subject: [PATCH v3 2/3] xen/mm: add generic domain_clamp_alloc_bitsize() macro
Thread-Topic: [PATCH v3 2/3] xen/mm: add generic domain_clamp_alloc_bitsize()
 macro
Thread-Index: AQHcYHrKI/DuZxtTF0mX/NaGMgBzNg==
Date: Fri, 28 Nov 2025 15:22:21 +0000
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From: Grygorii Strashko 

Add generic domain_clamp_alloc_bitsize() macro and clean up arch specific
defines.

Signed-off-by: Grygorii Strashko 
Acked-by: Jan Beulich 
---
v3: no changes, added tag

 xen/arch/arm/include/asm/mm.h   | 2 --
 xen/arch/ppc/include/asm/mm.h   | 2 --
 xen/arch/riscv/include/asm/mm.h | 2 --
 xen/arch/x86/include/asm/mm.h   | 1 +
 xen/include/xen/mm.h            | 4 ++++
 5 files changed, 5 insertions(+), 6 deletions(-)

diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h
index 4c6cc64aa7ba..ec2d2dc5372a 100644
--- a/xen/arch/arm/include/asm/mm.h
+++ b/xen/arch/arm/include/asm/mm.h
@@ -313,8 +313,6 @@ struct page_info *get_page_from_gva(struct vcpu *v, vad=
dr_t va,
 /* Arch-specific portion of memory_op hypercall. */
 long arch_memory_op(int op, XEN_GUEST_HANDLE_PARAM(void) arg);
=20
-#define domain_clamp_alloc_bitsize(d, b) (b)
-
 unsigned long domain_get_maximum_gpfn(struct domain *d);
=20
 /* Release all __init and __initdata ranges to be reused */
diff --git a/xen/arch/ppc/include/asm/mm.h b/xen/arch/ppc/include/asm/mm.h
index e478291fdf55..91c405876bd0 100644
--- a/xen/arch/ppc/include/asm/mm.h
+++ b/xen/arch/ppc/include/asm/mm.h
@@ -96,8 +96,6 @@ static inline struct page_info *virt_to_page(const void *=
v)
 /* TODO: implement */
 #define mfn_valid(mfn) ({ (void) (mfn); 0; })
=20
-#define domain_clamp_alloc_bitsize(d, b) (b)
-
 #define PFN_ORDER(pfn_) ((pfn_)->v.free.order)
=20
 struct page_info
diff --git a/xen/arch/riscv/include/asm/mm.h b/xen/arch/riscv/include/asm/m=
m.h
index 11e9f26bf0a5..e5ea91fa4d0c 100644
--- a/xen/arch/riscv/include/asm/mm.h
+++ b/xen/arch/riscv/include/asm/mm.h
@@ -292,8 +292,6 @@ static inline bool arch_mfns_in_directmap(unsigned long=
 mfn, unsigned long nr)
 /* TODO: implement */
 #define mfn_valid(mfn) ({ (void)(mfn); 0; })
=20
-#define domain_clamp_alloc_bitsize(d, b) ((void)(d), (b))
-
 #define PFN_ORDER(pg) ((pg)->v.free.order)
=20
 extern unsigned char cpu0_boot_stack[];
diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h
index 08153e6d6fa2..17ca6666a34e 100644
--- a/xen/arch/x86/include/asm/mm.h
+++ b/xen/arch/x86/include/asm/mm.h
@@ -621,6 +621,7 @@ extern int memory_add(unsigned long spfn, unsigned long=
 epfn, unsigned int pxm);
=20
 void domain_set_alloc_bitsize(struct domain *d);
 unsigned int domain_clamp_alloc_bitsize(struct domain *d, unsigned int bit=
s);
+#define domain_clamp_alloc_bitsize(d, bits) domain_clamp_alloc_bitsize(d, =
bits)
=20
 unsigned long domain_get_maximum_gpfn(struct domain *d);
=20
diff --git a/xen/include/xen/mm.h b/xen/include/xen/mm.h
index b968f47b87e0..426362adb2f4 100644
--- a/xen/include/xen/mm.h
+++ b/xen/include/xen/mm.h
@@ -641,4 +641,8 @@ static inline void put_page_alloc_ref(struct page_info =
*page)
     }
 }
=20
+#ifndef domain_clamp_alloc_bitsize
+#define domain_clamp_alloc_bitsize(d, bits) ((void)(d), (bits))
+#endif
+
 #endif /* __XEN_MM_H__ */
--=20
2.34.1


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From: Grygorii Strashko 
To: "xen-devel@lists.xenproject.org" 
CC: Grygorii Strashko , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , Volodymyr
 Babchuk , Timothy Pearson
	, Alistair Francis
	, Bob Eshleman , Connor
 Davis , Oleksii Kurochko ,
	Andrew Cooper , Anthony PERARD
	, Jan Beulich ,
	=?iso-8859-1?Q?Roger_Pau_Monn=E9?= 
Subject: [PATCH v3 0/3] xen/x86: move d->arch.physaddr_bitsize field handling
 to pv32
Thread-Topic: [PATCH v3 0/3] xen/x86: move d->arch.physaddr_bitsize field
 handling to pv32
Thread-Index: AQHcYHrJ4PIs75rE1EOUoOM8oMNBwQ==
Date: Fri, 28 Nov 2025 15:22:20 +0000
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From: Grygorii Strashko 

1) arm/ppc/riscv: drop unused domain_set_alloc_bitsize() macro
2) add generic domain_clamp_alloc_bitsize() macro and clean up !x86 arches
3) move d->arch.physaddr_bitsize field handling to pv32 code

changes in v3:
- added tags
- changed patch 3

changes in v2:
- split on 3 patches
- move physaddr_bitsize in struct pv_domain
- make minimal style adjustments as requested

Grygorii Strashko (3):
  arm/ppc/riscv: drop unused domain_set_alloc_bitsize() macro
  xen/mm: add generic domain_clamp_alloc_bitsize() macro
  xen/x86: move d->arch.physaddr_bitsize field handling to pv32

 xen/arch/arm/include/asm/mm.h     |  3 ---
 xen/arch/ppc/include/asm/mm.h     |  3 ---
 xen/arch/riscv/include/asm/mm.h   |  3 ---
 xen/arch/x86/include/asm/domain.h |  8 +++++---
 xen/arch/x86/include/asm/mm.h     |  8 ++++++--
 xen/arch/x86/pv/dom0_build.c      |  7 +++++--
 xen/arch/x86/pv/domain.c          |  6 +++++-
 xen/arch/x86/x86_64/mm.c          | 20 --------------------
 xen/include/xen/mm.h              |  4 ++++
 9 files changed, 25 insertions(+), 37 deletions(-)

--=20
2.34.1


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From: Luca Fancellu 
To: Grygorii Strashko 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk , Timothy Pearson
	, Alistair Francis
	, Bob Eshleman , Connor
 Davis , Oleksii Kurochko ,
	Jan Beulich 
Subject: Re: [PATCH v3 1/3] arm/ppc/riscv: drop unused
 domain_set_alloc_bitsize() macro
Thread-Topic: [PATCH v3 1/3] arm/ppc/riscv: drop unused
 domain_set_alloc_bitsize() macro
Thread-Index: AQHcYHrKJo3fQNjNOEm0i3u+ucdXc7UINzYA
Date: Fri, 28 Nov 2025 15:32:08 +0000
Message-ID: <9C230C5D-F726-4E01-A897-BC38AE4507D1@arm.com>
References: <20251128152218.3886583-1-grygorii_strashko@epam.com>
 <20251128152218.3886583-2-grygorii_strashko@epam.com>
In-Reply-To: <20251128152218.3886583-2-grygorii_strashko@epam.com>
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Hi Grygorii,

> On 28 Nov 2025, at 15:22, Grygorii Strashko  =
wrote:
>=20
> From: Grygorii Strashko 
>=20
> The domain_set_alloc_bitsize() is x86 PV32 specific and not used by other
> arch or common code, so remove it.
>=20
> Signed-off-by: Grygorii Strashko 
> Acked-by: Jan Beulich 
> ---
> v3: no changes, added tag
>=20
> xen/arch/arm/include/asm/mm.h   | 1 -

Looks good to me:

Reviewed-by: Luca Fancellu  #arm

Cheers,
Luca




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Subject: [ANNOUNCE] Call for agenda items for December 4 Xen Community Call @
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To: xen-devel@lists.xenproject.org, xen-announce@lists.xenprojet.org
Content-Type: multipart/alternative; boundary="000000000000f4fda00644a95d5e"

--000000000000f4fda00644a95d5e
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Hi everyone,

We=E2=80=99re getting ready for December's Xen Project Community Call on Th=
ursday,
4 December 2025 at 16:00 UTC (4 pm UK time).

We=E2=80=99d love for you to join. Feel free to participate or just observe=
. This
call is a great opportunity to see what the community is working on, align
our various efforts, and share updates. Everyone is welcome!

*Preparation:*

   - Add any proposed agenda items or missing action items:
   https://cryptpad.fr/pad/#/2/pad/edit/1RmqVAU258OzT3BYzYw2bg8f/
   - If any action items have been resolved or are no longer relevant, feel
   free to remove them from the doc. I attempted to clean up the doc, so fe=
el
   free to make any adjustments.



*Call Details:*

   - Date: Thursday, 4 December 2025
   - Time: 16:00 UTC (agenda begins at 16:05 UTC)
   - Find your local timezone here
   
   - Link to Join the Call: https://meet.jit.si/XenProjectCommunityCall


We plan to open the meeting room at 65:00 UTC, but to allow time for
switching between meetings and handling any technical issues, we=E2=80=99ll
officially start discussing the agenda at 16:05 UTC.

Want to be CC=E2=80=99d on future calls?

Add or remove yourself from our Sign-up Sheet
.

See you Thursday!


Cody Zuschlag
Xen Project - Community Manager

--000000000000f4fda00644a95d5e
Content-Type: text/html; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable


Hi everyone,

We=E2=80=99re getting ready =
for December's Xen Project Community Call on Thursday, 4 December 2025 =
at 16:00 UTC (4 pm UK time).

We=E2=80=99d love for you to join. Feel=
 free to participate or just observe. This call is a great opportunity to s=
ee what the community is working on, align our various efforts, and share u=
pdates. Everyone is welcome!

Preparation:

Call Details:

We plan to open the meeting room at 65:00 UTC, but to allow time fo=
r switching between meetings and handling any technical issues, we=E2=80=99=
ll officially start discussing the agenda at 16:05 UTC.

Want to be C=
C=E2=80=99d on future calls?

Add or remove yourself from our=C2=A0Si=
gn-up Sheet.

See you Thursday!


Cody Zuschlag
Xen Project - Community Manager


--000000000000f4fda00644a95d5e--


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From: Luca Fancellu 
To: Grygorii Strashko 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk , Andrew Cooper
	, Anthony PERARD , Jan
 Beulich , =?iso-8859-1?Q?Roger_Pau_Monn=E9?=
	, Timothy Pearson ,
	Alistair Francis , Bob Eshleman
	, Connor Davis , Oleksii
 Kurochko 
Subject: Re: [PATCH v3 2/3] xen/mm: add generic domain_clamp_alloc_bitsize()
 macro
Thread-Topic: [PATCH v3 2/3] xen/mm: add generic domain_clamp_alloc_bitsize()
 macro
Thread-Index: AQHcYHrKI/DuZxtTF0mX/NaGMgBzNrUIOEQA
Date: Fri, 28 Nov 2025 15:35:54 +0000
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Hi Grygorii,

> On 28 Nov 2025, at 15:22, Grygorii Strashko  =
wrote:
>=20
> From: Grygorii Strashko 
>=20
> Add generic domain_clamp_alloc_bitsize() macro and clean up arch specific
> defines.
>=20
> Signed-off-by: Grygorii Strashko 
> Acked-by: Jan Beulich 
> ---
> v3: no changes, added tag
>=20
> xen/arch/arm/include/asm/mm.h   | 2 --

Looks ok to me:

Reviewed-by: Luca Fancellu  #arm

Cheers,
Luca





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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk ,
	Andrew Cooper ,
	Anthony PERARD ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Timothy Pearson 
Subject: [PATCH v2] xen: move vcpu_kick() declaration to common header
Date: Fri, 28 Nov 2025 17:23:35 +0100
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The vcpu_kick() declaration is duplicated across multiple
architecture-specific event.h headers (ARM, x86, PPC).

Remove the redundant declarations and move vcpu_kick() into
the common xen/include/xen/sched.h header.

Drop the definition of vcpu_kick() from ppc/include/asm/event.h,
as it is already provided in ppc/stubs.c.

Add inclusion of xen/sched.h in the files where vcpu_kick() is
used.

Signed-off-by: Oleksii Kurochko 
---
CI tests:
 https://gitlab.com/xen-project/people/olkur/xen/-/pipelines/2185404470
---
Changes in v2:
 - Move vcpu_kick() declaration to xen/sched.h instead of xen/event.h
 - Revert changes connected to switching asm/event.h to xen/event.h as vcpu_kick() 
   is now living in xen/sched.h.
 - Add inclusion of xen/sched.h because of moved vcpu_kick() declaration to
   xen/sched.h.
 - Update the commit message.
---
 xen/arch/arm/include/asm/event.h | 1 -
 xen/arch/ppc/include/asm/event.h | 1 -
 xen/arch/x86/cpu/mcheck/vmce.c   | 1 +
 xen/arch/x86/include/asm/event.h | 1 -
 xen/arch/x86/pv/traps.c          | 1 +
 xen/include/xen/sched.h          | 1 +
 6 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/xen/arch/arm/include/asm/event.h b/xen/arch/arm/include/asm/event.h
index 509157b2b3..e036ab7fb8 100644
--- a/xen/arch/arm/include/asm/event.h
+++ b/xen/arch/arm/include/asm/event.h
@@ -3,7 +3,6 @@
 
 #include 
 
-void vcpu_kick(struct vcpu *v);
 void vcpu_mark_events_pending(struct vcpu *v);
 void vcpu_update_evtchn_irq(struct vcpu *v);
 void vcpu_block_unless_event_pending(struct vcpu *v);
diff --git a/xen/arch/ppc/include/asm/event.h b/xen/arch/ppc/include/asm/event.h
index 0f475c4b89..565eee1439 100644
--- a/xen/arch/ppc/include/asm/event.h
+++ b/xen/arch/ppc/include/asm/event.h
@@ -5,7 +5,6 @@
 #include 
 
 /* TODO: implement */
-static inline void vcpu_kick(struct vcpu *v) { BUG_ON("unimplemented"); }
 static inline void vcpu_mark_events_pending(struct vcpu *v) { BUG_ON("unimplemented"); }
 static inline void vcpu_update_evtchn_irq(struct vcpu *v) { BUG_ON("unimplemented"); }
 static inline void vcpu_block_unless_event_pending(struct vcpu *v) { BUG_ON("unimplemented"); }
diff --git a/xen/arch/x86/cpu/mcheck/vmce.c b/xen/arch/x86/cpu/mcheck/vmce.c
index 1a7e92506a..5e89c61238 100644
--- a/xen/arch/x86/cpu/mcheck/vmce.c
+++ b/xen/arch/x86/cpu/mcheck/vmce.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
diff --git a/xen/arch/x86/include/asm/event.h b/xen/arch/x86/include/asm/event.h
index 434f65007e..d13ce28167 100644
--- a/xen/arch/x86/include/asm/event.h
+++ b/xen/arch/x86/include/asm/event.h
@@ -11,7 +11,6 @@
 
 #include 
 
-void vcpu_kick(struct vcpu *v);
 void vcpu_mark_events_pending(struct vcpu *v);
 
 static inline int vcpu_event_delivery_is_enabled(struct vcpu *v)
diff --git a/xen/arch/x86/pv/traps.c b/xen/arch/x86/pv/traps.c
index c3c0976c44..21340eb0e9 100644
--- a/xen/arch/x86/pv/traps.c
+++ b/xen/arch/x86/pv/traps.c
@@ -10,6 +10,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h
index 52090b4f70..1f77e0869b 100644
--- a/xen/include/xen/sched.h
+++ b/xen/include/xen/sched.h
@@ -877,6 +877,7 @@ void vcpu_wake(struct vcpu *v);
 long vcpu_yield(void);
 void vcpu_sleep_nosync(struct vcpu *v);
 void vcpu_sleep_sync(struct vcpu *v);
+void vcpu_kick(struct vcpu *v);
 
 /*
  * Force synchronisation of given VCPU's state. If it is currently descheduled,
-- 
2.52.0



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Date: Fri, 28 Nov 2025 09:46:37 -0700
From: Keith Busch 
To: Roger Pau =?iso-8859-1?Q?Monn=E9?= 
Cc: qemu-devel@nongnu.org, Peter.Turner@cloud.com, ngoc-tu.dinh@vates.tech,
	Klaus Jensen ,
	Jesper Devantier , xen-devel@lists.xenproject.org
Subject: Re: Default NVMe MDTS value causes Widnows Server 2025 hangs and
 BSODs (during install at least)
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On Fri, Nov 28, 2025 at 11:28:47AM +0100, Roger Pau Monné wrote:
> Hello,
> 
> As part of XenServer Windows Server 2025 testing using Xen plus QEMU
> we discovered an issue during install that would lead to either the
> Windows installer getting stuck without making progress (albeit the
> screen was still showing the spinning circle correctly) or a BSOD that
> doesn't seem to have a unique number, the most common one was 0x50
> (PAGE_FAULT_IN_NONPAGED_AREA).
> 
> After a fair amount of debugging and following incorrect leads we have
> narrowed down what triggers the issue to QEMU emulated NVMe reporting
> a MDTS value of 7 by default (so max request size of 512KiB).
> Switching to higher MDTS values seemed to solve the issue.
> 
> The commit that made that change:
> 
> e137d20e7dff hw/block/nvme: add check for mdts
> 
> Didn't contain much justification for the change from unlimited to
> 512KiB max request size.
> 
> Windows is like a black box to me, but I believe there's some error in
> the Windows logic that splits requests, and hence when MDTS is set to
> a sufficiently low value, and Windows has to split NVMe requests, it
> causes Windows to hit an internal bug.  This will be raised with
> Microsoft to get the issue debugged and possibly fixed on their side.
> 
> From limited experimentation setting mdts to 10 (so 4MiB max request
> size) or 9 (2MiB) workarounds the issue.
> 
> Would it be acceptable for QEMU NVMe to consider increasing the
> default MDTS value to something higher than 7 to workaround the issue?
> I've tested both 9 and 10 and they prevent the issue, I would avoid 8
> as it's too close to the current one that causes issues.  I don't have
> many references of other emulated NVMe implementations, I just know
> about Bhyve emulated NVMe, which sets MDTS to 9.
> 
> If bumping MDTS to a higher value is acceptable please let me know and
> I will prepare a patch.

The mdts value is a prameter you can set at the command line. The 512k
default is really pretty reasonable, but you can set it up to 2MB
(mdts=9) if you want before hitting a different software limit that
won't let you go any higher. So rather than patch the device, I'd
recommend you just modify your startup command line parameters instead.

Not sure if it's still the case, but there was a time when Windows
Storport's maximum IO size had been limited to 128k, and that's exactly
what many nvme devices reported for MDTS, so Windows is certainly
supposed to work correctly with such values.


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Date: Fri, 28 Nov 2025 18:42:19 +0100
From: Anthony PERARD 
To: Mykyta Poturai 
Cc: "xen-devel@lists.xenproject.org" ,
	Anthony PERARD ,
	Juergen Gross 
Subject: Re: [PATCH v4 7/8] tools: Allow building xen-hptool without
 CONFIG_MIGRATE
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References: 
 <6da5b8b1aad1af18cf6ed352697ad39786adc37e.1762939773.git.mykyta_poturai@epam.com>
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In-Reply-To: <6da5b8b1aad1af18cf6ed352697ad39786adc37e.1762939773.git.mykyta_poturai@epam.com>

On Wed, Nov 12, 2025 at 10:51:49AM +0000, Mykyta Poturai wrote:
> With CPU hotplug sysctls implemented on Arm it becomes useful to have a
> tool for calling them. Introduce a new congifure option "hptool" to
> allow building hptool separately from other migration tools, and enable
> it by default.
> 
> Signed-off-by: Mykyta Poturai 
> 

You should had a line with just "---" around here, right after the
Signed-off-by, and before the changelog. That way, when we commit the
patch, git will automatically discard this patch changelog. Notice that
git do just that before adding stats about file changes.

> v3->v4:
> * no changes
> 
> v2->v3:
> * no changes
> 
> v1->v2:
> * switch to configure from legacy config
> ---
>  config/Tools.mk.in               |  1 +
>  tools/configure                  | 30 ++++++++++++++++++++++++++++++
>  tools/configure.ac               |  1 +
>  tools/libs/guest/Makefile.common |  4 ++++
>  tools/misc/Makefile              |  2 +-
>  5 files changed, 37 insertions(+), 1 deletion(-)
>  mode change 100755 => 100644 tools/configure
> 
> diff --git a/config/Tools.mk.in b/config/Tools.mk.in
> index 0037ad5a64..d5855ca090 100644
> --- a/config/Tools.mk.in
> +++ b/config/Tools.mk.in
> @@ -49,6 +49,7 @@ CONFIG_LIBNL        := @libnl@
>  CONFIG_GOLANG       := @golang@
>  CONFIG_PYGRUB       := @pygrub@
>  CONFIG_LIBFSIMAGE   := @libfsimage@
> +CONFIG_HPTOOL       := @hptool@
>  
>  CONFIG_SYSTEMD      := @systemd@
>  XEN_SYSTEMD_DIR     := @SYSTEMD_DIR@
> diff --git a/tools/configure.ac b/tools/configure.ac
> index 285b4ea128..28a0c095c2 100644
> --- a/tools/configure.ac
> +++ b/tools/configure.ac
> @@ -90,6 +90,7 @@ AX_ARG_DEFAULT_DISABLE([ovmf], [Enable OVMF])
>  AX_ARG_DEFAULT_ENABLE([seabios], [Disable SeaBIOS])
>  AX_ARG_DEFAULT_ENABLE([golang], [Disable Go tools])
>  AX_ARG_DEFAULT_ENABLE([pygrub], [Disable pygrub])
> +AX_ARG_DEFAULT_ENABLE([hptool], [Disable hptool])
>  
>  AC_ARG_WITH([linux-backend-modules],
>      AS_HELP_STRING([--with-linux-backend-modules="mod1 mod2"],
> diff --git a/tools/libs/guest/Makefile.common b/tools/libs/guest/Makefile.common
> index a026a2f662..774b1d5392 100644
> --- a/tools/libs/guest/Makefile.common
> +++ b/tools/libs/guest/Makefile.common
> @@ -25,6 +25,10 @@ OBJS-y       += xg_core.o
>  OBJS-$(CONFIG_X86) += xg_core_x86.o
>  OBJS-$(CONFIG_ARM) += xg_core_arm.o
>  
> +ifneq (,$(filter y,$(CONFIG_MIGRATE)$(CONFIG_HPTOOL)))

How is this supposed to work?

> +OBJS-y += xg_offline_page.o
> +endif
> +
>  vpath %.c ../../../xen/common/libelf
>  
>  LIBELF_OBJS += libelf-tools.o libelf-loader.o
> diff --git a/tools/misc/Makefile b/tools/misc/Makefile
> index c26e544e83..f783f16ae6 100644
> --- a/tools/misc/Makefile
> +++ b/tools/misc/Makefile
> @@ -16,7 +16,7 @@ INSTALL_BIN                    += xencov_split
>  INSTALL_BIN += $(INSTALL_BIN-y)
>  
>  # Everything to be installed in regular sbin/
> -INSTALL_SBIN-$(CONFIG_MIGRATE) += xen-hptool
> +INSTALL_SBIN-$(CONFIG_HPTOOL)  += xen-hptool

So, I've look at the history as to why "xen-hptool" was only compiled
for CONFIG_MIGRATE, and it was because "xc_offline_page.c" didn't build
on ia64, commit 6b0b6e01b967 ("tools: disable xen-hptool on ia64").

And hiding xc_offline_page.c behind CONFIG_MIGRATE was probably just a
short-cut, 310311cd8863 ("libxc: fix link error on ia64") because I
guess the needed functions where behind this value at the time.

("xc_offline_page.c" is now "xg_offline_page.c")

This patch now build xen-hptool, and "xg_offline_page.c" by default. Does
this actually build on every architecture? We don't really have
per-binary configuration option, and having a library (libxenguest)
which get different functionality depending on which tool we want to
build doesn't seems to be the right thing to do.

If xg_offline_page.c can now be built on every architecture, how about
building it by default? Then, we can always build xen-hptool.

Thanks,

-- 
Anthony PERARD


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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH] x86/hvm: Unilaterally inject #UD for unknown VMExits
Date: Fri, 28 Nov 2025 17:47:35 +0000
Message-Id: <20251128174735.1238055-1-andrew.cooper3@citrix.com>
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While we do this for unknown user mode exits, crashing for supervisor mode
exits is unhelpful.  Intel in particular expect the unknown case to be #UD
because they do introduce new instructions with new VMEXIT_* codes without
other enablement controls.  e.g. MSRLIST, USER_MSR, MSR_IMM, but AMD have
RDPRU and SKINIT as examples too.

A guest which gets its CPUID checks wrong can trigger the VMExit, and the
VMexit handler would need to emulate the CPUID check and #UD anyway.  This
would be a guest bug, and giving it an exception is the right course of
action.

Drop the "#UD or crash" semantics and make it exclusively #UD.  Rename the
lables to match the changed semantics.  Fold the cases which were plain #UD's
too.

One case that was wrong beforehand was EPT_MISCONFIG.  Failing to resolve is
always a Xen bug, and not even necesserily due to the instruction under %rip.
Convert it to be an unconditional domain_crash() with applicable diagnostic
information.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 
---
 xen/arch/x86/hvm/svm/svm.c | 29 +++++++++--------------------
 xen/arch/x86/hvm/vmx/vmx.c | 26 +++++++++++---------------
 2 files changed, 20 insertions(+), 35 deletions(-)

diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c
index 2d7c598ffe99..637b47084c25 100644
--- a/xen/arch/x86/hvm/svm/svm.c
+++ b/xen/arch/x86/hvm/svm/svm.c
@@ -66,15 +66,6 @@ static bool amd_erratum383_found __read_mostly;
 static uint64_t osvw_length, osvw_status;
 static DEFINE_SPINLOCK(osvw_lock);
 
-/* Only crash the guest if the problem originates in kernel mode. */
-static void svm_crash_or_fault(struct vcpu *v)
-{
-    if ( vmcb_get_cpl(v->arch.hvm.svm.vmcb) )
-        hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC);
-    else
-        domain_crash(v->domain);
-}
-
 void __update_guest_eip(struct cpu_user_regs *regs, unsigned int inst_len)
 {
     struct vcpu *curr = current;
@@ -85,7 +76,7 @@ void __update_guest_eip(struct cpu_user_regs *regs, unsigned int inst_len)
     if ( unlikely(inst_len > MAX_INST_LEN) )
     {
         gdprintk(XENLOG_ERR, "Bad instruction length %u\n", inst_len);
-        svm_crash_or_fault(curr);
+        hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC);
         return;
     }
 
@@ -2872,7 +2863,7 @@ void asmlinkage svm_vmexit_handler(void)
          * task switch.  Decode under %rip to find its length.
          */
         if ( insn_len < 0 && (insn_len = svm_get_task_switch_insn_len()) == 0 )
-            goto crash_or_fault;
+            goto inject_ud;
 
         hvm_task_switch(vmcb->ei.task_switch.sel,
                         vmcb->ei.task_switch.iret ? TSW_iret :
@@ -2984,13 +2975,6 @@ void asmlinkage svm_vmexit_handler(void)
         svm_vmexit_do_rdtsc(regs, exit_reason == VMEXIT_RDTSCP);
         break;
 
-    case VMEXIT_MONITOR:
-    case VMEXIT_MWAIT:
-    case VMEXIT_SKINIT:
-    case VMEXIT_RDPRU:
-        hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC);
-        break;
-
     case VMEXIT_VMRUN:
         svm_vmexit_do_vmrun(regs, v, regs->rax);
         break;
@@ -3083,8 +3067,13 @@ void asmlinkage svm_vmexit_handler(void)
         gprintk(XENLOG_ERR, "Unexpected vmexit: reason %#"PRIx64", "
                 "exitinfo1 %#"PRIx64", exitinfo2 %#"PRIx64"\n",
                 exit_reason, vmcb->exitinfo1, vmcb->exitinfo2);
-    crash_or_fault:
-        svm_crash_or_fault(v);
+        fallthrough;
+    case VMEXIT_MONITOR:
+    case VMEXIT_MWAIT:
+    case VMEXIT_SKINIT:
+    case VMEXIT_RDPRU:
+    inject_ud:
+        hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC);
         break;
     }
 
diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c
index 6b407226c44c..1af5861ef921 100644
--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -4337,7 +4337,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_regs *regs)
         __vmread(EXIT_QUALIFICATION, &exit_qualification);
         rc = hvm_monitor_vmexit(exit_reason, exit_qualification);
         if ( rc < 0 )
-            goto exit_and_crash;
+            goto unexpected_vmexit;
         if ( rc )
             return;
     }
@@ -4490,7 +4490,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_regs *regs)
                                        trap_type, insn_len, 0);
 
                 if ( rc < 0 )
-                    goto exit_and_crash;
+                    goto unexpected_vmexit;
                 if ( !rc )
                     vmx_propagate_intr(intr_info);
             }
@@ -4511,7 +4511,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_regs *regs)
                                        insn_len, 0);
 
                 if ( rc < 0 )
-                    goto exit_and_crash;
+                    goto unexpected_vmexit;
                 if ( !rc )
                     vmx_propagate_intr(intr_info);
             }
@@ -4557,7 +4557,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_regs *regs)
         case X86_EXC_NMI:
             if ( MASK_EXTR(intr_info, INTR_INFO_INTR_TYPE_MASK) !=
                  X86_ET_NMI )
-                goto exit_and_crash;
+                goto unexpected_vmexit;
             TRACE(TRC_HVM_NMI);
             /* Already handled above. */
             break;
@@ -4571,7 +4571,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_regs *regs)
             break;
         default:
             TRACE(TRC_HVM_TRAP, vector);
-            goto exit_and_crash;
+            goto unexpected_vmexit;
         }
         break;
     }
@@ -4627,7 +4627,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_regs *regs)
          * rc > 0 paused waiting for response, work here is done
          */
         if ( rc < 0 )
-            goto exit_and_crash;
+            goto unexpected_vmexit;
         if ( !rc )
             update_guest_eip(); /* Safe: CPUID */
         break;
@@ -4773,7 +4773,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_regs *regs)
 
         rc = hvm_monitor_io(io_qual.port, bytes, io_qual.in, io_qual.str);
         if ( rc < 0 )
-            goto exit_and_crash;
+            goto unexpected_vmexit;
         if ( rc )
             break;
 
@@ -4820,7 +4820,8 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_regs *regs)
 
         __vmread(GUEST_PHYSICAL_ADDRESS, &gpa);
         if ( !ept_handle_misconfig(gpa) )
-            goto exit_and_crash;
+            domain_crash(v->domain,
+                         "Unhandled EPT_MISCONFIG, gpa %#"PRIpaddr"\n", gpa);
         break;
     }
 
@@ -4902,14 +4903,9 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_regs *regs)
     case EXIT_REASON_INVPCID:
     /* fall through */
     default:
-    exit_and_crash:
+    unexpected_vmexit:
         gprintk(XENLOG_ERR, "Unexpected vmexit: reason %lu\n", exit_reason);
-
-        if ( vmx_get_cpl() )
-            hvm_inject_hw_exception(X86_EXC_UD,
-                                    X86_EVENT_NO_EC);
-        else
-            domain_crash(v->domain);
+        hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC);
         break;
     }
 

base-commit: 117a46287427db2a6f5fe219eb2031d7ca39b603
-- 
2.39.5



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Date: Fri, 28 Nov 2025 18:22:15 +0000
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Cc: andrew.cooper3@citrix.com, Jan Beulich ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 "Daniel P . Smith" ,
 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 , Teddy Astie 
Subject: Re: [PATCH] x86/efi: Remove NX check from efi-boot.h
To: Julian Vetter , xen-devel@lists.xenproject.org
References: <20251127143136.1598354-1-julian.vetter@vates.tech>
 <3653404b-0428-4dae-912f-18c4f8e74853@citrix.com>
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On 28/11/2025 1:19 pm, Julian Vetter wrote:
> On 11/27/25 16:20, Andrew Cooper wrote:
>> On 27/11/2025 2:31 pm, Julian Vetter wrote:
>>> Currently Intel CPUs in EFI mode with the "Execute Disable Bit" disabled
>>> and the 'CONFIG_REQUIRE_NX=y' fail to boot, because this check is
>>> performed before trampoline_setup is called, which determines if NX is
>>> supported or if it's hidden by 'MSR_IA32_MISC_ENABLE[34] = 1' (if so,
>>> re-enables NX).
>>>
>>> Signed-off-by: Julian Vetter 
>> Lovely...  This isn't the only bug; there's another one from the Vates
>> forums about AMD CPUs which I haven't gotten around to fixing yet.
>>
> Thank you. I will have a look. I haven't seen this thread.

https://xcp-ng.org/forum/post/80714

But the tl;dr is that AMD have introduced a firmware option to disable
NX.  Unlike Intel, there's no positive way to know you've reactivated it.

A conversation with AMD has revealed that there's no capability to
prevent setting EFER.NXE, and that NX is always available in practice. 
I'm pretty sure the firmware is just clearing NX in the CPUID Override MSR.

However, to reactivate this safely, we need to do a wrmsr_safe(), which
means we need to delay setting NXE until exception handling is available
which is rather later on boot.  There's also a tangle with the
order-of-initialisation of the CPUID Override MSRs which I found
recently while doing something else.

The other observation is that, even on a STRICT_NX build of Xen, we can
boot into __start_xen() because we can't insert NX into the pagetables
that early.  In fact it's quite late that we lock down permissions; see
the calls to modify_xen_mappings() in __start_xen().

Given that we need to be this late for AMD, we can also move the Intel
logic later (effectively reverts part of the original work; sorry
Alejandro) which means we can also use safe accessors, and we don't need
to worry about the divergent early paths.

>
>> Do you have any more information about which system looks like this?
>>
> I'm not sure if I understand your question correctly, but I was just 
> booting an Intel based machine newer than ~2012. I have tested this on 4 
> different machines, on which 3 hit this code path. One was a HPE 
> ProLiant m510 Server with a XEON CPU

Broadwell.

> , second was a Mini PC with Celeron CPU,

Sorry, not enough information here to figure out the microarchitecture.

> and third was an old Intel NUC DCCP847DYE also with a Celeron CPU. 

Sandy Bridge.

> The only system where I couldn't reproduce the issue was an old 
> workstation with a Gigabyte mainboard. It has the flag in the Bios to 
> set MSR_IA32_MISC_ENABLE, but I'm not sure if it was actually booting 
> via UEFI.

Same, not enough information here.

But, it's clear that Intel's XD-disable is still honoured in EFI mode on
a wide range of systems, and that we need a fix for UEFI.

>  I will verify this on monday. I booted all the 3 other systems 
> via UEFI -> Grub -> multiboot2. My grub entry looks like this:
>
> multiboot2 /boot/xen.gz dom0_mem=2656M,max:2656M watchdog ucode=scan 
> dom0_max_vcpus=1-8 crashkernel=256M,below=4G console=vga vga=mode-0x0311
> module2 boot/vmlinuz console=hvc0 console=tty0 init=/bin/sh
> module2 boot/initrd-dom0
>
>> trampoline_setup isn't executed on all EFI boots.  I had a different fix
>> in mind, but it's a little more complicated.
> Aha. yes, I didn't thought about other code paths.

https://xenbits.xen.org/docs/latest/hypervisor-guide/x86/how-xen-boots.html

Here's something I put together to cover some of these details.  But,
most of the detail is in the source only.

~Andrew


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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Krystian Hebel ,
	Sergii Dmytruk ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH 1/2] xen/lib: Misc SHA2 cleanup
Date: Fri, 28 Nov 2025 18:47:56 +0000
Message-Id: <20251128184757.1243678-2-andrew.cooper3@citrix.com>
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In sha2_256_transform(), make state be an array of 8 rather than a pointer,
which lets the compiler do slightly more checking.

For better or worse, the canonical API in Linux is just the algorithm name.
As we're intending to import more from Linux in this area, drop the digest
suffix before we gain more users.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 
---
 xen/arch/x86/cpu/microcode/amd.c | 2 +-
 xen/include/xen/sha2.h           | 4 ++--
 xen/lib/sha2-256.c               | 8 ++++----
 3 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/xen/arch/x86/cpu/microcode/amd.c b/xen/arch/x86/cpu/microcode/amd.c
index e7ae1e802353..adabe6e6e838 100644
--- a/xen/arch/x86/cpu/microcode/amd.c
+++ b/xen/arch/x86/cpu/microcode/amd.c
@@ -139,7 +139,7 @@ static bool check_digest(const struct container_microcode *mc)
         return false;
     }
 
-    sha2_256_digest(digest, patch, mc->len);
+    sha2_256(digest, patch, mc->len);
 
     if ( memcmp(digest, pd->digest, sizeof(digest)) )
     {
diff --git a/xen/include/xen/sha2.h b/xen/include/xen/sha2.h
index 09c69195a97d..7a99c1259d6e 100644
--- a/xen/include/xen/sha2.h
+++ b/xen/include/xen/sha2.h
@@ -9,8 +9,8 @@
 
 #define SHA2_256_DIGEST_SIZE 32
 
-void sha2_256_digest(uint8_t digest[SHA2_256_DIGEST_SIZE],
-                     const void *msg, size_t len);
+void sha2_256(uint8_t digest[SHA2_256_DIGEST_SIZE],
+              const void *msg, size_t len);
 
 struct sha2_256_state {
     uint32_t state[SHA2_256_DIGEST_SIZE / sizeof(uint32_t)];
diff --git a/xen/lib/sha2-256.c b/xen/lib/sha2-256.c
index d1b2c20b9812..ed585ac0d4c1 100644
--- a/xen/lib/sha2-256.c
+++ b/xen/lib/sha2-256.c
@@ -68,7 +68,7 @@ static const uint32_t K[] = {
     0x90befffaU, 0xa4506cebU, 0xbef9a3f7U, 0xc67178f2U,
 };
 
-static void sha2_256_transform(uint32_t *state, const void *_input)
+static void sha2_256_transform(uint32_t state[8], const void *_input)
 {
     const uint32_t *input = _input;
     uint32_t a, b, c, d, e, f, g, h, t1, t2;
@@ -197,8 +197,8 @@ void sha2_256_final(struct sha2_256_state *s, uint8_t digest[SHA2_256_DIGEST_SIZ
         put_unaligned_be32(s->state[i], &dst[i]);
 }
 
-void sha2_256_digest(uint8_t digest[SHA2_256_DIGEST_SIZE],
-                     const void *msg, size_t len)
+void sha2_256(uint8_t digest[SHA2_256_DIGEST_SIZE],
+              const void *msg, size_t len)
 {
     struct sha2_256_state s;
 
@@ -243,7 +243,7 @@ static void __init __constructor test_sha2_256(void)
         const struct test *t = &tests[i];
         uint8_t res[SHA2_256_DIGEST_SIZE] = {};
 
-        sha2_256_digest(res, t->msg, strlen(t->msg));
+        sha2_256(res, t->msg, strlen(t->msg));
 
         if ( memcmp(res, t->digest, sizeof(t->digest)) == 0 )
             continue;
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Krystian Hebel ,
	Sergii Dmytruk ,
	Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH 2/2] xen/lib: Introduce SHA-1
Date: Fri, 28 Nov 2025 18:47:57 +0000
Message-Id: <20251128184757.1243678-3-andrew.cooper3@citrix.com>
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From: Krystian Hebel 

Future work will need to interact with the TPM, which requires calculating
digests for all active hash banks.  Introduce an implementation in lib/,
partially derived from Trenchboot which itself is derived from Linux.

In order to be useful to other architectures, it is careful with endianness
and misaligned accesses as well as being more MISRA friendly, but is only
wired up for x86 in the short term.

Signed-off-by: Krystian Hebel 
Signed-off-by: Sergii Dmytruk 
Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 

 * Split out of Trenchboot series.
 * Add selftests, adjust types
---
 xen/include/xen/sha1.h |  14 +++
 xen/lib/Makefile       |   1 +
 xen/lib/sha1.c         | 215 +++++++++++++++++++++++++++++++++++++++++
 3 files changed, 230 insertions(+)
 create mode 100644 xen/include/xen/sha1.h
 create mode 100644 xen/lib/sha1.c

diff --git a/xen/include/xen/sha1.h b/xen/include/xen/sha1.h
new file mode 100644
index 000000000000..d649da8ebd97
--- /dev/null
+++ b/xen/include/xen/sha1.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * SHA1: https://csrc.nist.gov/pubs/fips/180-4/upd1/final
+ */
+#ifndef XEN_SHA1_H
+#define XEN_SHA1_H
+
+#include 
+
+#define SHA1_DIGEST_SIZE  20
+
+void sha1(uint8_t digest[SHA1_DIGEST_SIZE], const void *msg, size_t len);
+
+#endif /* XEN_SHA1_H */
diff --git a/xen/lib/Makefile b/xen/lib/Makefile
index 5ccb1e5241c5..fd4b9ece63fb 100644
--- a/xen/lib/Makefile
+++ b/xen/lib/Makefile
@@ -17,6 +17,7 @@ lib-y += memset.o
 lib-y += muldiv64.o
 lib-y += parse-size.o
 lib-y += rbtree.o
+lib-$(CONFIG_X86) += sha1.o
 lib-$(CONFIG_X86) += sha2-256.o
 lib-y += sort.o
 lib-y += strcasecmp.o
diff --git a/xen/lib/sha1.c b/xen/lib/sha1.c
new file mode 100644
index 000000000000..eac2bdd4dfb3
--- /dev/null
+++ b/xen/lib/sha1.c
@@ -0,0 +1,215 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * SHA1: https://csrc.nist.gov/pubs/fips/180-4/upd1/final
+ *
+ * Originally derived from Linux.  Modified substantially to optimise for size
+ * and Xen's expected usecases.
+ */
+#include 
+#include 
+#include 
+#include 
+
+struct sha1_state {
+    size_t count; /* Byte Count. */
+    uint32_t state[SHA1_DIGEST_SIZE / sizeof(uint32_t)];
+    uint8_t buf[64];
+};
+
+static uint32_t blend(uint32_t w[16], unsigned int i)
+{
+#define W(i) w[(i) & 15]
+
+    return W(i) = rol32(W(i + 13) ^ W(i + 8) ^ W(i + 2) ^ W(i), 1);
+
+#undef W
+}
+
+static void sha1_transform(uint32_t state[5], const void *_input)
+{
+    const uint32_t *input = _input;
+    uint32_t a, b, c, d, e, t;
+    uint32_t w[16];
+    unsigned int i = 0;
+
+    a = state[0];
+    b = state[1];
+    c = state[2];
+    d = state[3];
+    e = state[4];
+
+    /* Round 1 - iterations 0-16 take their input from 'input' */
+    for ( ; i < 16; ++i )
+    {
+        t = get_unaligned_be32(&input[i]);
+        w[i] = t;
+        e += t + rol32(a, 5) + (((c ^ d) & b) ^ d) + 0x5a827999U;
+        b = ror32(b, 2);
+        t = e; e = d; d = c; c = b; b = a; a = t;
+    }
+
+    /* Round 1 tail. Input from 512-bit mixing array */
+    for ( ; i < 20; ++i )
+    {
+        t = blend(w, i);
+        e += t + rol32(a, 5) + (((c ^ d) & b) ^ d) + 0x5a827999U;
+        b = ror32(b, 2);
+        t = e; e = d; d = c; c = b; b = a; a = t;
+    }
+
+    /* Round 2 */
+    for ( ; i < 40; ++i )
+    {
+        t = blend(w, i);
+        e += t + rol32(a, 5) + (b ^ c ^ d) + 0x6ed9eba1U;
+        b = ror32(b, 2);
+        t = e; e = d; d = c; c = b; b = a; a = t;
+    }
+
+    /* Round 3 */
+    for ( ; i < 60; ++i )
+    {
+        t = blend(w, i);
+        e += t + rol32(a, 5) + ((b & c) + (d & (b ^ c))) + 0x8f1bbcdcU;
+        b = ror32(b, 2);
+        t = e; e = d; d = c; c = b; b = a; a = t;
+    }
+
+    /* Round 4 */
+    for ( ; i < 80; ++i )
+    {
+        t = blend(w, i);
+        e += t + rol32(a, 5) + (b ^ c ^ d) + 0xca62c1d6U;
+        b = ror32(b, 2);
+        t = e; e = d; d = c; c = b; b = a; a = t;
+    }
+
+    state[0] += a;
+    state[1] += b;
+    state[2] += c;
+    state[3] += d;
+    state[4] += e;
+}
+
+static void sha1_init(struct sha1_state *s)
+{
+    *s = (struct sha1_state){
+        .state = {
+            0x67452301U,
+            0xefcdab89U,
+            0x98badcfeU,
+            0x10325476U,
+            0xc3d2e1f0U,
+        },
+    };
+}
+
+static void sha1_update(struct sha1_state *s, const void *msg, size_t len)
+{
+    unsigned int partial = s->count & 63;
+
+    s->count += len;
+
+    if ( (partial + len) >= 64 )
+    {
+        if ( partial )
+        {
+            unsigned int rem = 64 - partial;
+
+            /* Fill the partial block. */
+            memcpy(s->buf + partial, msg, rem);
+            msg += rem;
+            len -= rem;
+
+            sha1_transform(s->state, s->buf);
+            partial = 0;
+        }
+
+        for ( ; len >= 64; msg += 64, len -= 64 )
+            sha1_transform(s->state, msg);
+    }
+
+    /* Remaining data becomes partial. */
+    memcpy(s->buf + partial, msg, len);
+}
+
+static void sha1_final(struct sha1_state *s, uint8_t digest[SHA1_DIGEST_SIZE])
+{
+    uint32_t *dst = (uint32_t *)digest;
+    unsigned int i, partial = s->count & 63;
+
+    /* Start padding */
+    s->buf[partial++] = 0x80;
+
+    if ( partial > 56 )
+    {
+        /* Need one extra block - pad to 64 */
+        memset(s->buf + partial, 0, 64 - partial);
+        sha1_transform(s->state, s->buf);
+        partial = 0;
+    }
+    /* Pad to 56 */
+    memset(s->buf + partial, 0x0, 56 - partial);
+
+    /* Append the bit count */
+    put_unaligned_be64((uint64_t)s->count << 3, &s->buf[56]);
+    sha1_transform(s->state, s->buf);
+
+    /* Store state in digest */
+    for ( i = 0; i < 5; i++ )
+        put_unaligned_be32(s->state[i], &dst[i]);
+}
+
+void sha1(uint8_t digest[SHA1_DIGEST_SIZE], const void *msg, size_t len)
+{
+    struct sha1_state s;
+
+    sha1_init(&s);
+    sha1_update(&s, msg, len);
+    sha1_final(&s, digest);
+}
+
+#ifdef CONFIG_SELF_TESTS
+
+#include 
+#include 
+
+static const struct test {
+    const char *msg;
+    uint8_t digest[SHA1_DIGEST_SIZE];
+} tests[] __initconst = {
+    {
+        .msg = "abc",
+        .digest = {
+            0xa9, 0x99, 0x3e, 0x36, 0x47, 0x06, 0x81, 0x6a, 0xba, 0x3e,
+            0x25, 0x71, 0x78, 0x50, 0xc2, 0x6c, 0x9c, 0xd0, 0xd8, 0x9d,
+        },
+    },
+    {
+        .msg = "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq",
+        .digest = {
+            0x84, 0x98, 0x3e, 0x44, 0x1c, 0x3b, 0xd2, 0x6e, 0xba, 0xae,
+            0x4a, 0xa1, 0xf9, 0x51, 0x29, 0xe5, 0xe5, 0x46, 0x70, 0xf1,
+        },
+    },
+};
+
+static void __init __constructor test_sha1(void)
+{
+    for ( unsigned int i = 0; i < ARRAY_SIZE(tests); ++i )
+    {
+        const struct test *t = &tests[i];
+        uint8_t res[SHA1_DIGEST_SIZE] = {};
+
+        sha1(res, t->msg, strlen(t->msg));
+
+        if ( memcmp(res, t->digest, sizeof(t->digest)) == 0 )
+            continue;
+
+        panic("%s() msg '%s' failed\n"
+              "  expected %" STR(SHA1_DIGEST_SIZE) "phN\n"
+              "       got %" STR(SHA1_DIGEST_SIZE) "phN\n",
+              __func__, t->msg, t->digest, res);
+    }
+}
+#endif /* CONFIG_SELF_TESTS */
-- 
2.39.5



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        Fri, 28 Nov 2025 10:48:01 -0800 (PST)
From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Krystian Hebel ,
	Sergii Dmytruk 
Subject: [PATCH 0/2] xen/lib: SHA2 cleanup, and SHA1 support
Date: Fri, 28 Nov 2025 18:47:55 +0000
Message-Id: <20251128184757.1243678-1-andrew.cooper3@citrix.com>
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Pulled out of the Trenchboot series.

Andrew Cooper (1):
  xen/lib: Misc SHA2 cleanup

Krystian Hebel (1):
  xen/lib: Introduce SHA-1

 xen/arch/x86/cpu/microcode/amd.c |   2 +-
 xen/include/xen/sha1.h           |  14 ++
 xen/include/xen/sha2.h           |   4 +-
 xen/lib/Makefile                 |   1 +
 xen/lib/sha1.c                   | 215 +++++++++++++++++++++++++++++++
 xen/lib/sha2-256.c               |   8 +-
 6 files changed, 237 insertions(+), 7 deletions(-)
 create mode 100644 xen/include/xen/sha1.h
 create mode 100644 xen/lib/sha1.c

-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH 2/3] x86/svm: Drop svmdebug.c
Date: Fri, 28 Nov 2025 20:19:36 +0000
Message-Id: <20251128201937.1294742-3-andrew.cooper3@citrix.com>
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Everything here is really VMCB functionality, so merge it into vmcb.c.  Move
the declarations from the global svmdebug.h to the logical vmcb.h.

No functional change.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 
---
 xen/arch/x86/hvm/svm/Makefile               |   1 -
 xen/arch/x86/hvm/svm/nestedsvm.c            |   1 -
 xen/arch/x86/hvm/svm/svmdebug.c             | 181 --------------------
 xen/arch/x86/hvm/svm/vmcb.c                 | 159 +++++++++++++++++
 xen/arch/x86/hvm/svm/vmcb.h                 |   3 +
 xen/arch/x86/include/asm/hvm/svm/svmdebug.h |   3 -
 6 files changed, 162 insertions(+), 186 deletions(-)
 delete mode 100644 xen/arch/x86/hvm/svm/svmdebug.c

diff --git a/xen/arch/x86/hvm/svm/Makefile b/xen/arch/x86/hvm/svm/Makefile
index 760d2954da83..8a072cafd572 100644
--- a/xen/arch/x86/hvm/svm/Makefile
+++ b/xen/arch/x86/hvm/svm/Makefile
@@ -4,5 +4,4 @@ obj-bin-y += entry.o
 obj-y += intr.o
 obj-y += nestedsvm.o
 obj-y += svm.o
-obj-y += svmdebug.o
 obj-y += vmcb.o
diff --git a/xen/arch/x86/hvm/svm/nestedsvm.c b/xen/arch/x86/hvm/svm/nestedsvm.c
index 191466755148..63ed6c86b775 100644
--- a/xen/arch/x86/hvm/svm/nestedsvm.c
+++ b/xen/arch/x86/hvm/svm/nestedsvm.c
@@ -9,7 +9,6 @@
 #include 
 #include 
 #include 
-#include 
 #include  /* paging_mode_hap */
 #include  /* for local_event_delivery_(en|dis)able */
 #include  /* p2m_get_pagetable, p2m_get_nestedp2m */
diff --git a/xen/arch/x86/hvm/svm/svmdebug.c b/xen/arch/x86/hvm/svm/svmdebug.c
deleted file mode 100644
index bdb9ea3583ee..000000000000
--- a/xen/arch/x86/hvm/svm/svmdebug.c
+++ /dev/null
@@ -1,181 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * svmdebug.c: debug functions
- * Copyright (c) 2011, Advanced Micro Devices, Inc.
- *
- */
-
-#include 
-#include 
-#include 
-#include 
-
-#include "vmcb.h"
-
-static void svm_dump_sel(const char *name, const struct segment_register *s)
-{
-    printk("%s: %04x %04x %08x %016"PRIx64"\n",
-           name, s->sel, s->attr, s->limit, s->base);
-}
-
-void svm_vmcb_dump(const char *from, const struct vmcb_struct *vmcb)
-{
-    struct vcpu *curr = current;
-
-    /*
-     * If we are dumping the VMCB currently in context, some guest state may
-     * still be cached in hardware.  Retrieve it.
-     */
-    if ( vmcb == curr->arch.hvm.svm.vmcb )
-        svm_sync_vmcb(curr, vmcb_in_sync);
-
-    printk("Dumping guest's current state at %s...\n", from);
-    printk("Size of VMCB = %zu, paddr = %"PRIpaddr", vaddr = %p\n",
-           sizeof(struct vmcb_struct), virt_to_maddr(vmcb), vmcb);
-
-    printk("cr_intercepts = %#x dr_intercepts = %#x "
-           "exception_intercepts = %#x\n",
-           vmcb_get_cr_intercepts(vmcb), vmcb_get_dr_intercepts(vmcb),
-           vmcb_get_exception_intercepts(vmcb));
-    printk("general1_intercepts = %#x general2_intercepts = %#x\n",
-           vmcb_get_general1_intercepts(vmcb), vmcb_get_general2_intercepts(vmcb));
-    printk("iopm_base_pa = %#"PRIx64" msrpm_base_pa = %#"PRIx64" tsc_offset = %#"PRIx64"\n",
-           vmcb_get_iopm_base_pa(vmcb), vmcb_get_msrpm_base_pa(vmcb),
-           vmcb_get_tsc_offset(vmcb));
-    printk("tlb_control = %#x vintr = %#"PRIx64" int_stat = %#"PRIx64"\n",
-           vmcb->tlb_control, vmcb_get_vintr(vmcb).bytes,
-           vmcb->int_stat.raw);
-    printk("event_inj %016"PRIx64", valid? %d, ec? %d, type %u, vector %#x\n",
-           vmcb->event_inj.raw, vmcb->event_inj.v,
-           vmcb->event_inj.ev, vmcb->event_inj.type,
-           vmcb->event_inj.vector);
-    printk("exitcode = %#"PRIx64" exit_int_info = %#"PRIx64"\n",
-           vmcb->exitcode, vmcb->exit_int_info.raw);
-    printk("exitinfo1 = %#"PRIx64" exitinfo2 = %#"PRIx64"\n",
-           vmcb->exitinfo1, vmcb->exitinfo2);
-    printk("asid = %#x np_ctrl = %#"PRIx64":%s%s%s\n",
-           vmcb_get_asid(vmcb), vmcb_get_np_ctrl(vmcb),
-           vmcb_get_np(vmcb)     ? " NP"     : "",
-           vmcb_get_sev(vmcb)    ? " SEV"    : "",
-           vmcb_get_sev_es(vmcb) ? " SEV_ES" : "");
-    printk("virtual vmload/vmsave = %d, virt_ext = %#"PRIx64"\n",
-           vmcb->virt_ext.fields.vloadsave_enable, vmcb->virt_ext.bytes);
-    printk("cpl = %d efer = %#"PRIx64" star = %#"PRIx64" lstar = %#"PRIx64"\n",
-           vmcb_get_cpl(vmcb), vmcb_get_efer(vmcb), vmcb->star, vmcb->lstar);
-    printk("CR0 = 0x%016"PRIx64" CR2 = 0x%016"PRIx64"\n",
-           vmcb_get_cr0(vmcb), vmcb_get_cr2(vmcb));
-    printk("CR3 = 0x%016"PRIx64" CR4 = 0x%016"PRIx64"\n",
-           vmcb_get_cr3(vmcb), vmcb_get_cr4(vmcb));
-    printk("RSP = 0x%016"PRIx64"  RIP = 0x%016"PRIx64"\n",
-           vmcb->rsp, vmcb->rip);
-    printk("RAX = 0x%016"PRIx64"  RFLAGS=0x%016"PRIx64"\n",
-           vmcb->rax, vmcb->rflags);
-    printk("DR6 = 0x%016"PRIx64", DR7 = 0x%016"PRIx64"\n",
-           vmcb_get_dr6(vmcb), vmcb_get_dr7(vmcb));
-    printk("CSTAR = 0x%016"PRIx64" SFMask = 0x%016"PRIx64"\n",
-           vmcb->cstar, vmcb->sfmask);
-    printk("KernGSBase = 0x%016"PRIx64" PAT = 0x%016"PRIx64"\n",
-           vmcb->kerngsbase, vmcb_get_g_pat(vmcb));
-    printk("SSP = 0x%016"PRIx64" S_CET = 0x%016"PRIx64" ISST = 0x%016"PRIx64"\n",
-           vmcb->_ssp, vmcb->_msr_s_cet, vmcb->_msr_isst);
-    printk("H_CR3 = 0x%016"PRIx64" CleanBits = %#x\n",
-           vmcb_get_h_cr3(vmcb), vmcb->cleanbits.raw);
-
-    /* print out all the selectors */
-    printk("       sel attr  limit   base\n");
-    svm_dump_sel("  CS", &vmcb->cs);
-    svm_dump_sel("  DS", &vmcb->ds);
-    svm_dump_sel("  SS", &vmcb->ss);
-    svm_dump_sel("  ES", &vmcb->es);
-    svm_dump_sel("  FS", &vmcb->fs);
-    svm_dump_sel("  GS", &vmcb->gs);
-    svm_dump_sel("GDTR", &vmcb->gdtr);
-    svm_dump_sel("LDTR", &vmcb->ldtr);
-    svm_dump_sel("IDTR", &vmcb->idtr);
-    svm_dump_sel("  TR", &vmcb->tr);
-}
-
-bool svm_vmcb_isvalid(const char *from, const struct vmcb_struct *vmcb,
-                      const struct vcpu *v, bool verbose)
-{
-    bool ret = false; /* ok */
-    unsigned long cr0 = vmcb_get_cr0(vmcb);
-    unsigned long cr3 = vmcb_get_cr3(vmcb);
-    unsigned long cr4 = vmcb_get_cr4(vmcb);
-    unsigned long valid;
-    uint64_t efer = vmcb_get_efer(vmcb);
-
-#define PRINTF(fmt, args...) do { \
-    if ( !verbose ) return true; \
-    ret = true; \
-    printk(XENLOG_GUEST "%pv[%s]: " fmt, v, from, ## args); \
-} while (0)
-
-    if ( !(efer & EFER_SVME) )
-        PRINTF("EFER: SVME bit not set (%#"PRIx64")\n", efer);
-
-    if ( !(cr0 & X86_CR0_CD) && (cr0 & X86_CR0_NW) )
-        PRINTF("CR0: CD bit is zero and NW bit set (%#"PRIx64")\n", cr0);
-
-    if ( cr0 >> 32 )
-        PRINTF("CR0: bits [63:32] are not zero (%#"PRIx64")\n", cr0);
-
-    if ( (cr0 & X86_CR0_PG) &&
-         ((cr3 & 7) ||
-          ((!(cr4 & X86_CR4_PAE) || (efer & EFER_LMA)) && (cr3 & 0xfe0)) ||
-          ((efer & EFER_LMA) &&
-           (cr3 >> v->domain->arch.cpuid->extd.maxphysaddr))) )
-        PRINTF("CR3: MBZ bits are set (%#"PRIx64")\n", cr3);
-
-    valid = hvm_cr4_guest_valid_bits(v->domain);
-    if ( cr4 & ~valid )
-        PRINTF("CR4: invalid value %#lx (valid %#lx, rejected %#lx)\n",
-               cr4, valid, cr4 & ~valid);
-
-    if ( vmcb_get_dr6(vmcb) >> 32 )
-        PRINTF("DR6: bits [63:32] are not zero (%#"PRIx64")\n",
-               vmcb_get_dr6(vmcb));
-
-    if ( vmcb_get_dr7(vmcb) >> 32 )
-        PRINTF("DR7: bits [63:32] are not zero (%#"PRIx64")\n",
-               vmcb_get_dr7(vmcb));
-
-    if ( efer & ~EFER_KNOWN_MASK )
-        PRINTF("EFER: unknown bits are not zero (%#"PRIx64")\n", efer);
-
-    if ( hvm_efer_valid(v, efer, -1) )
-        PRINTF("EFER: %s (%"PRIx64")\n", hvm_efer_valid(v, efer, -1), efer);
-
-    if ( (efer & EFER_LME) && (cr0 & X86_CR0_PG) )
-    {
-        if ( !(cr4 & X86_CR4_PAE) )
-            PRINTF("EFER_LME and CR0.PG are both set and CR4.PAE is zero\n");
-        if ( !(cr0 & X86_CR0_PE) )
-            PRINTF("EFER_LME and CR0.PG are both set and CR0.PE is zero\n");
-    }
-
-    if ( (efer & EFER_LME) && (cr0 & X86_CR0_PG) && (cr4 & X86_CR4_PAE) &&
-         vmcb->cs.l && vmcb->cs.db )
-        PRINTF("EFER_LME, CR0.PG, CR4.PAE, CS.L and CS.D are all non-zero\n");
-
-    if ( !(vmcb_get_general2_intercepts(vmcb) & GENERAL2_INTERCEPT_VMRUN) )
-        PRINTF("GENERAL2_INTERCEPT: VMRUN intercept bit is clear (%#"PRIx32")\n",
-               vmcb_get_general2_intercepts(vmcb));
-
-    if ( vmcb->event_inj.resvd1 )
-        PRINTF("eventinj: MBZ bits are set (%#"PRIx64")\n",
-               vmcb->event_inj.raw);
-
-#undef PRINTF
-    return ret;
-}
-
-/*
- * Local variables:
- * mode: C
- * c-file-style: "BSD"
- * c-basic-offset: 4
- * tab-width: 4
- * indent-tabs-mode: nil
- * End:
- */
diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c
index 44fa76bf0228..b1a79d515143 100644
--- a/xen/arch/x86/hvm/svm/vmcb.c
+++ b/xen/arch/x86/hvm/svm/vmcb.c
@@ -228,6 +228,165 @@ void svm_destroy_vmcb(struct vcpu *v)
     svm->vmcb = NULL;
 }
 
+static void svm_dump_sel(const char *name, const struct segment_register *s)
+{
+    printk("%s: %04x %04x %08x %016"PRIx64"\n",
+           name, s->sel, s->attr, s->limit, s->base);
+}
+
+void svm_vmcb_dump(const char *from, const struct vmcb_struct *vmcb)
+{
+    struct vcpu *curr = current;
+
+    /*
+     * If we are dumping the VMCB currently in context, some guest state may
+     * still be cached in hardware.  Retrieve it.
+     */
+    if ( vmcb == curr->arch.hvm.svm.vmcb )
+        svm_sync_vmcb(curr, vmcb_in_sync);
+
+    printk("Dumping guest's current state at %s...\n", from);
+    printk("Size of VMCB = %zu, paddr = %"PRIpaddr", vaddr = %p\n",
+           sizeof(struct vmcb_struct), virt_to_maddr(vmcb), vmcb);
+
+    printk("cr_intercepts = %#x dr_intercepts = %#x "
+           "exception_intercepts = %#x\n",
+           vmcb_get_cr_intercepts(vmcb), vmcb_get_dr_intercepts(vmcb),
+           vmcb_get_exception_intercepts(vmcb));
+    printk("general1_intercepts = %#x general2_intercepts = %#x\n",
+           vmcb_get_general1_intercepts(vmcb), vmcb_get_general2_intercepts(vmcb));
+    printk("iopm_base_pa = %#"PRIx64" msrpm_base_pa = %#"PRIx64" tsc_offset = %#"PRIx64"\n",
+           vmcb_get_iopm_base_pa(vmcb), vmcb_get_msrpm_base_pa(vmcb),
+           vmcb_get_tsc_offset(vmcb));
+    printk("tlb_control = %#x vintr = %#"PRIx64" int_stat = %#"PRIx64"\n",
+           vmcb->tlb_control, vmcb_get_vintr(vmcb).bytes,
+           vmcb->int_stat.raw);
+    printk("event_inj %016"PRIx64", valid? %d, ec? %d, type %u, vector %#x\n",
+           vmcb->event_inj.raw, vmcb->event_inj.v,
+           vmcb->event_inj.ev, vmcb->event_inj.type,
+           vmcb->event_inj.vector);
+    printk("exitcode = %#"PRIx64" exit_int_info = %#"PRIx64"\n",
+           vmcb->exitcode, vmcb->exit_int_info.raw);
+    printk("exitinfo1 = %#"PRIx64" exitinfo2 = %#"PRIx64"\n",
+           vmcb->exitinfo1, vmcb->exitinfo2);
+    printk("asid = %#x np_ctrl = %#"PRIx64":%s%s%s\n",
+           vmcb_get_asid(vmcb), vmcb_get_np_ctrl(vmcb),
+           vmcb_get_np(vmcb)     ? " NP"     : "",
+           vmcb_get_sev(vmcb)    ? " SEV"    : "",
+           vmcb_get_sev_es(vmcb) ? " SEV_ES" : "");
+    printk("virtual vmload/vmsave = %d, virt_ext = %#"PRIx64"\n",
+           vmcb->virt_ext.fields.vloadsave_enable, vmcb->virt_ext.bytes);
+    printk("cpl = %d efer = %#"PRIx64" star = %#"PRIx64" lstar = %#"PRIx64"\n",
+           vmcb_get_cpl(vmcb), vmcb_get_efer(vmcb), vmcb->star, vmcb->lstar);
+    printk("CR0 = 0x%016"PRIx64" CR2 = 0x%016"PRIx64"\n",
+           vmcb_get_cr0(vmcb), vmcb_get_cr2(vmcb));
+    printk("CR3 = 0x%016"PRIx64" CR4 = 0x%016"PRIx64"\n",
+           vmcb_get_cr3(vmcb), vmcb_get_cr4(vmcb));
+    printk("RSP = 0x%016"PRIx64"  RIP = 0x%016"PRIx64"\n",
+           vmcb->rsp, vmcb->rip);
+    printk("RAX = 0x%016"PRIx64"  RFLAGS=0x%016"PRIx64"\n",
+           vmcb->rax, vmcb->rflags);
+    printk("DR6 = 0x%016"PRIx64", DR7 = 0x%016"PRIx64"\n",
+           vmcb_get_dr6(vmcb), vmcb_get_dr7(vmcb));
+    printk("CSTAR = 0x%016"PRIx64" SFMask = 0x%016"PRIx64"\n",
+           vmcb->cstar, vmcb->sfmask);
+    printk("KernGSBase = 0x%016"PRIx64" PAT = 0x%016"PRIx64"\n",
+           vmcb->kerngsbase, vmcb_get_g_pat(vmcb));
+    printk("SSP = 0x%016"PRIx64" S_CET = 0x%016"PRIx64" ISST = 0x%016"PRIx64"\n",
+           vmcb->_ssp, vmcb->_msr_s_cet, vmcb->_msr_isst);
+    printk("H_CR3 = 0x%016"PRIx64" CleanBits = %#x\n",
+           vmcb_get_h_cr3(vmcb), vmcb->cleanbits.raw);
+
+    /* print out all the selectors */
+    printk("       sel attr  limit   base\n");
+    svm_dump_sel("  CS", &vmcb->cs);
+    svm_dump_sel("  DS", &vmcb->ds);
+    svm_dump_sel("  SS", &vmcb->ss);
+    svm_dump_sel("  ES", &vmcb->es);
+    svm_dump_sel("  FS", &vmcb->fs);
+    svm_dump_sel("  GS", &vmcb->gs);
+    svm_dump_sel("GDTR", &vmcb->gdtr);
+    svm_dump_sel("LDTR", &vmcb->ldtr);
+    svm_dump_sel("IDTR", &vmcb->idtr);
+    svm_dump_sel("  TR", &vmcb->tr);
+}
+
+bool svm_vmcb_isvalid(
+    const char *from, const struct vmcb_struct *vmcb, const struct vcpu *v,
+    bool verbose)
+{
+    bool ret = false; /* ok */
+    unsigned long cr0 = vmcb_get_cr0(vmcb);
+    unsigned long cr3 = vmcb_get_cr3(vmcb);
+    unsigned long cr4 = vmcb_get_cr4(vmcb);
+    unsigned long valid;
+    uint64_t efer = vmcb_get_efer(vmcb);
+
+#define PRINTF(fmt, args...) do { \
+    if ( !verbose ) return true; \
+    ret = true; \
+    printk(XENLOG_GUEST "%pv[%s]: " fmt, v, from, ## args); \
+} while (0)
+
+    if ( !(efer & EFER_SVME) )
+        PRINTF("EFER: SVME bit not set (%#"PRIx64")\n", efer);
+
+    if ( !(cr0 & X86_CR0_CD) && (cr0 & X86_CR0_NW) )
+        PRINTF("CR0: CD bit is zero and NW bit set (%#"PRIx64")\n", cr0);
+
+    if ( cr0 >> 32 )
+        PRINTF("CR0: bits [63:32] are not zero (%#"PRIx64")\n", cr0);
+
+    if ( (cr0 & X86_CR0_PG) &&
+         ((cr3 & 7) ||
+          ((!(cr4 & X86_CR4_PAE) || (efer & EFER_LMA)) && (cr3 & 0xfe0)) ||
+          ((efer & EFER_LMA) &&
+           (cr3 >> v->domain->arch.cpuid->extd.maxphysaddr))) )
+        PRINTF("CR3: MBZ bits are set (%#"PRIx64")\n", cr3);
+
+    valid = hvm_cr4_guest_valid_bits(v->domain);
+    if ( cr4 & ~valid )
+        PRINTF("CR4: invalid value %#lx (valid %#lx, rejected %#lx)\n",
+               cr4, valid, cr4 & ~valid);
+
+    if ( vmcb_get_dr6(vmcb) >> 32 )
+        PRINTF("DR6: bits [63:32] are not zero (%#"PRIx64")\n",
+               vmcb_get_dr6(vmcb));
+
+    if ( vmcb_get_dr7(vmcb) >> 32 )
+        PRINTF("DR7: bits [63:32] are not zero (%#"PRIx64")\n",
+               vmcb_get_dr7(vmcb));
+
+    if ( efer & ~EFER_KNOWN_MASK )
+        PRINTF("EFER: unknown bits are not zero (%#"PRIx64")\n", efer);
+
+    if ( hvm_efer_valid(v, efer, -1) )
+        PRINTF("EFER: %s (%"PRIx64")\n", hvm_efer_valid(v, efer, -1), efer);
+
+    if ( (efer & EFER_LME) && (cr0 & X86_CR0_PG) )
+    {
+        if ( !(cr4 & X86_CR4_PAE) )
+            PRINTF("EFER_LME and CR0.PG are both set and CR4.PAE is zero\n");
+        if ( !(cr0 & X86_CR0_PE) )
+            PRINTF("EFER_LME and CR0.PG are both set and CR0.PE is zero\n");
+    }
+
+    if ( (efer & EFER_LME) && (cr0 & X86_CR0_PG) && (cr4 & X86_CR4_PAE) &&
+         vmcb->cs.l && vmcb->cs.db )
+        PRINTF("EFER_LME, CR0.PG, CR4.PAE, CS.L and CS.D are all non-zero\n");
+
+    if ( !(vmcb_get_general2_intercepts(vmcb) & GENERAL2_INTERCEPT_VMRUN) )
+        PRINTF("GENERAL2_INTERCEPT: VMRUN intercept bit is clear (%#"PRIx32")\n",
+               vmcb_get_general2_intercepts(vmcb));
+
+    if ( vmcb->event_inj.resvd1 )
+        PRINTF("eventinj: MBZ bits are set (%#"PRIx64")\n",
+               vmcb->event_inj.raw);
+
+#undef PRINTF
+    return ret;
+}
+
 static void cf_check vmcb_dump(unsigned char ch)
 {
     struct domain *d;
diff --git a/xen/arch/x86/hvm/svm/vmcb.h b/xen/arch/x86/hvm/svm/vmcb.h
index 68012948a9e3..ba554a964487 100644
--- a/xen/arch/x86/hvm/svm/vmcb.h
+++ b/xen/arch/x86/hvm/svm/vmcb.h
@@ -553,6 +553,9 @@ int  svm_create_vmcb(struct vcpu *v);
 void svm_destroy_vmcb(struct vcpu *v);
 
 void setup_vmcb_dump(void);
+void svm_vmcb_dump(const char *from, const struct vmcb_struct *vmcb);
+bool svm_vmcb_isvalid(const char *from, const struct vmcb_struct *vmcb,
+                      const struct vcpu *v, bool verbose);
 
 /*
  * VMCB accessor functions.
diff --git a/xen/arch/x86/include/asm/hvm/svm/svmdebug.h b/xen/arch/x86/include/asm/hvm/svm/svmdebug.h
index 2fb76ec24c76..ede13bd34048 100644
--- a/xen/arch/x86/include/asm/hvm/svm/svmdebug.h
+++ b/xen/arch/x86/include/asm/hvm/svm/svmdebug.h
@@ -12,8 +12,5 @@
 #include 
 
 void svm_sync_vmcb(struct vcpu *v, enum vmcb_sync_state new_state);
-void svm_vmcb_dump(const char *from, const struct vmcb_struct *vmcb);
-bool svm_vmcb_isvalid(const char *from, const struct vmcb_struct *vmcb,
-                      const struct vcpu *v, bool verbose);
 
 #endif /* __ASM_X86_HVM_SVM_SVMDEBUG_H__ */
-- 
2.39.5



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        Fri, 28 Nov 2025 12:19:44 -0800 (PST)
From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH 1/3] x86/svm: Make vmcb_struct private to svm/
Date: Fri, 28 Nov 2025 20:19:35 +0000
Message-Id: <20251128201937.1294742-2-andrew.cooper3@citrix.com>
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The rest of Xen has no buisness knowing this structure, and it is currently
included via xen/sched.h into most code.  Create a new private svm/vmcb.h.

No functional change.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 
---
 xen/arch/x86/hvm/svm/asid.c             |   1 +
 xen/arch/x86/hvm/svm/emulate.c          |   1 +
 xen/arch/x86/hvm/svm/intr.c             |   1 +
 xen/arch/x86/hvm/svm/nestedsvm.c        |   1 +
 xen/arch/x86/hvm/svm/svm.c              |   1 +
 xen/arch/x86/hvm/svm/svmdebug.c         |   2 +
 xen/arch/x86/hvm/svm/vmcb.c             |   2 +
 xen/arch/x86/hvm/svm/vmcb.h             | 617 ++++++++++++++++++++++++
 xen/arch/x86/include/asm/hvm/svm/vmcb.h | 606 -----------------------
 9 files changed, 626 insertions(+), 606 deletions(-)
 create mode 100644 xen/arch/x86/hvm/svm/vmcb.h

diff --git a/xen/arch/x86/hvm/svm/asid.c b/xen/arch/x86/hvm/svm/asid.c
index 03f98b7a8b89..0e115243a3af 100644
--- a/xen/arch/x86/hvm/svm/asid.c
+++ b/xen/arch/x86/hvm/svm/asid.c
@@ -9,6 +9,7 @@
 #include 
 
 #include "svm.h"
+#include "vmcb.h"
 
 void svm_asid_init(const struct cpuinfo_x86 *c)
 {
diff --git a/xen/arch/x86/hvm/svm/emulate.c b/xen/arch/x86/hvm/svm/emulate.c
index 93ac1d3435f9..d8aa45590885 100644
--- a/xen/arch/x86/hvm/svm/emulate.c
+++ b/xen/arch/x86/hvm/svm/emulate.c
@@ -15,6 +15,7 @@
 #include 
 
 #include "svm.h"
+#include "vmcb.h"
 
 static unsigned long svm_nextrip_insn_length(struct vcpu *v)
 {
diff --git a/xen/arch/x86/hvm/svm/intr.c b/xen/arch/x86/hvm/svm/intr.c
index 46186a110261..931973a9fad4 100644
--- a/xen/arch/x86/hvm/svm/intr.c
+++ b/xen/arch/x86/hvm/svm/intr.c
@@ -26,6 +26,7 @@
 #include 
 
 #include "nestedhvm.h"
+#include "vmcb.h"
 
 static void svm_inject_nmi(struct vcpu *v)
 {
diff --git a/xen/arch/x86/hvm/svm/nestedsvm.c b/xen/arch/x86/hvm/svm/nestedsvm.c
index 1813692ffb03..191466755148 100644
--- a/xen/arch/x86/hvm/svm/nestedsvm.c
+++ b/xen/arch/x86/hvm/svm/nestedsvm.c
@@ -16,6 +16,7 @@
 
 #include "nestedhvm.h"
 #include "svm.h"
+#include "vmcb.h"
 
 #define NSVM_ERROR_VVMCB        1
 #define NSVM_ERROR_VMENTRY      2
diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c
index 2d7c598ffe99..14b3a427e642 100644
--- a/xen/arch/x86/hvm/svm/svm.c
+++ b/xen/arch/x86/hvm/svm/svm.c
@@ -44,6 +44,7 @@
 
 #include "nestedhvm.h"
 #include "svm.h"
+#include "vmcb.h"
 
 void noreturn svm_asm_do_resume(void);
 
diff --git a/xen/arch/x86/hvm/svm/svmdebug.c b/xen/arch/x86/hvm/svm/svmdebug.c
index 9d3badcf5da0..bdb9ea3583ee 100644
--- a/xen/arch/x86/hvm/svm/svmdebug.c
+++ b/xen/arch/x86/hvm/svm/svmdebug.c
@@ -10,6 +10,8 @@
 #include 
 #include 
 
+#include "vmcb.h"
+
 static void svm_dump_sel(const char *name, const struct segment_register *s)
 {
     printk("%s: %04x %04x %08x %016"PRIx64"\n",
diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c
index c57d314a2486..44fa76bf0228 100644
--- a/xen/arch/x86/hvm/svm/vmcb.c
+++ b/xen/arch/x86/hvm/svm/vmcb.c
@@ -22,6 +22,8 @@
 #include 
 #include 
 
+#include "vmcb.h"
+
 struct vmcb_struct *alloc_vmcb(void)
 {
     struct vmcb_struct *vmcb;
diff --git a/xen/arch/x86/hvm/svm/vmcb.h b/xen/arch/x86/hvm/svm/vmcb.h
new file mode 100644
index 000000000000..68012948a9e3
--- /dev/null
+++ b/xen/arch/x86/hvm/svm/vmcb.h
@@ -0,0 +1,617 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef SVM_PRIVATE_VMCB_H
+#define SVM_PRIVATE_VMCB_H
+
+#include 
+
+#include 
+
+struct vcpu;
+
+/* general 1 intercepts */
+enum GenericIntercept1bits
+{
+    GENERAL1_INTERCEPT_INTR          = 1 << 0,
+    GENERAL1_INTERCEPT_NMI           = 1 << 1,
+    GENERAL1_INTERCEPT_SMI           = 1 << 2,
+    GENERAL1_INTERCEPT_INIT          = 1 << 3,
+    GENERAL1_INTERCEPT_VINTR         = 1 << 4,
+    GENERAL1_INTERCEPT_CR0_SEL_WRITE = 1 << 5,
+    GENERAL1_INTERCEPT_IDTR_READ     = 1 << 6,
+    GENERAL1_INTERCEPT_GDTR_READ     = 1 << 7,
+    GENERAL1_INTERCEPT_LDTR_READ     = 1 << 8,
+    GENERAL1_INTERCEPT_TR_READ       = 1 << 9,
+    GENERAL1_INTERCEPT_IDTR_WRITE    = 1 << 10,
+    GENERAL1_INTERCEPT_GDTR_WRITE    = 1 << 11,
+    GENERAL1_INTERCEPT_LDTR_WRITE    = 1 << 12,
+    GENERAL1_INTERCEPT_TR_WRITE      = 1 << 13,
+    GENERAL1_INTERCEPT_RDTSC         = 1 << 14,
+    GENERAL1_INTERCEPT_RDPMC         = 1 << 15,
+    GENERAL1_INTERCEPT_PUSHF         = 1 << 16,
+    GENERAL1_INTERCEPT_POPF          = 1 << 17,
+    GENERAL1_INTERCEPT_CPUID         = 1 << 18,
+    GENERAL1_INTERCEPT_RSM           = 1 << 19,
+    GENERAL1_INTERCEPT_IRET          = 1 << 20,
+    GENERAL1_INTERCEPT_SWINT         = 1 << 21,
+    GENERAL1_INTERCEPT_INVD          = 1 << 22,
+    GENERAL1_INTERCEPT_PAUSE         = 1 << 23,
+    GENERAL1_INTERCEPT_HLT           = 1 << 24,
+    GENERAL1_INTERCEPT_INVLPG        = 1 << 25,
+    GENERAL1_INTERCEPT_INVLPGA       = 1 << 26,
+    GENERAL1_INTERCEPT_IOIO_PROT     = 1 << 27,
+    GENERAL1_INTERCEPT_MSR_PROT      = 1 << 28,
+    GENERAL1_INTERCEPT_TASK_SWITCH   = 1 << 29,
+    GENERAL1_INTERCEPT_FERR_FREEZE   = 1 << 30,
+    GENERAL1_INTERCEPT_SHUTDOWN_EVT  = 1u << 31
+};
+
+/* general 2 intercepts */
+enum GenericIntercept2bits
+{
+    GENERAL2_INTERCEPT_VMRUN   = 1 << 0,
+    GENERAL2_INTERCEPT_VMMCALL = 1 << 1,
+    GENERAL2_INTERCEPT_VMLOAD  = 1 << 2,
+    GENERAL2_INTERCEPT_VMSAVE  = 1 << 3,
+    GENERAL2_INTERCEPT_STGI    = 1 << 4,
+    GENERAL2_INTERCEPT_CLGI    = 1 << 5,
+    GENERAL2_INTERCEPT_SKINIT  = 1 << 6,
+    GENERAL2_INTERCEPT_RDTSCP  = 1 << 7,
+    GENERAL2_INTERCEPT_ICEBP   = 1 << 8,
+    GENERAL2_INTERCEPT_WBINVD  = 1 << 9,
+    GENERAL2_INTERCEPT_MONITOR = 1 << 10,
+    GENERAL2_INTERCEPT_MWAIT   = 1 << 11,
+    GENERAL2_INTERCEPT_MWAIT_CONDITIONAL = 1 << 12,
+    GENERAL2_INTERCEPT_XSETBV  = 1 << 13,
+    GENERAL2_INTERCEPT_RDPRU   = 1 << 14,
+};
+
+
+/* control register intercepts */
+enum CRInterceptBits
+{
+    CR_INTERCEPT_CR0_READ   = 1 << 0,
+    CR_INTERCEPT_CR1_READ   = 1 << 1,
+    CR_INTERCEPT_CR2_READ   = 1 << 2,
+    CR_INTERCEPT_CR3_READ   = 1 << 3,
+    CR_INTERCEPT_CR4_READ   = 1 << 4,
+    CR_INTERCEPT_CR5_READ   = 1 << 5,
+    CR_INTERCEPT_CR6_READ   = 1 << 6,
+    CR_INTERCEPT_CR7_READ   = 1 << 7,
+    CR_INTERCEPT_CR8_READ   = 1 << 8,
+    CR_INTERCEPT_CR9_READ   = 1 << 9,
+    CR_INTERCEPT_CR10_READ  = 1 << 10,
+    CR_INTERCEPT_CR11_READ  = 1 << 11,
+    CR_INTERCEPT_CR12_READ  = 1 << 12,
+    CR_INTERCEPT_CR13_READ  = 1 << 13,
+    CR_INTERCEPT_CR14_READ  = 1 << 14,
+    CR_INTERCEPT_CR15_READ  = 1 << 15,
+    CR_INTERCEPT_CR0_WRITE  = 1 << 16,
+    CR_INTERCEPT_CR1_WRITE  = 1 << 17,
+    CR_INTERCEPT_CR2_WRITE  = 1 << 18,
+    CR_INTERCEPT_CR3_WRITE  = 1 << 19,
+    CR_INTERCEPT_CR4_WRITE  = 1 << 20,
+    CR_INTERCEPT_CR5_WRITE  = 1 << 21,
+    CR_INTERCEPT_CR6_WRITE  = 1 << 22,
+    CR_INTERCEPT_CR7_WRITE  = 1 << 23,
+    CR_INTERCEPT_CR8_WRITE  = 1 << 24,
+    CR_INTERCEPT_CR9_WRITE  = 1 << 25,
+    CR_INTERCEPT_CR10_WRITE = 1 << 26,
+    CR_INTERCEPT_CR11_WRITE = 1 << 27,
+    CR_INTERCEPT_CR12_WRITE = 1 << 28,
+    CR_INTERCEPT_CR13_WRITE = 1 << 29,
+    CR_INTERCEPT_CR14_WRITE = 1 << 30,
+    CR_INTERCEPT_CR15_WRITE = 1u << 31,
+};
+
+
+/* debug register intercepts */
+enum DRInterceptBits
+{
+    DR_INTERCEPT_DR0_READ   = 1 << 0,
+    DR_INTERCEPT_DR1_READ   = 1 << 1,
+    DR_INTERCEPT_DR2_READ   = 1 << 2,
+    DR_INTERCEPT_DR3_READ   = 1 << 3,
+    DR_INTERCEPT_DR4_READ   = 1 << 4,
+    DR_INTERCEPT_DR5_READ   = 1 << 5,
+    DR_INTERCEPT_DR6_READ   = 1 << 6,
+    DR_INTERCEPT_DR7_READ   = 1 << 7,
+    DR_INTERCEPT_DR8_READ   = 1 << 8,
+    DR_INTERCEPT_DR9_READ   = 1 << 9,
+    DR_INTERCEPT_DR10_READ  = 1 << 10,
+    DR_INTERCEPT_DR11_READ  = 1 << 11,
+    DR_INTERCEPT_DR12_READ  = 1 << 12,
+    DR_INTERCEPT_DR13_READ  = 1 << 13,
+    DR_INTERCEPT_DR14_READ  = 1 << 14,
+    DR_INTERCEPT_DR15_READ  = 1 << 15,
+    DR_INTERCEPT_DR0_WRITE  = 1 << 16,
+    DR_INTERCEPT_DR1_WRITE  = 1 << 17,
+    DR_INTERCEPT_DR2_WRITE  = 1 << 18,
+    DR_INTERCEPT_DR3_WRITE  = 1 << 19,
+    DR_INTERCEPT_DR4_WRITE  = 1 << 20,
+    DR_INTERCEPT_DR5_WRITE  = 1 << 21,
+    DR_INTERCEPT_DR6_WRITE  = 1 << 22,
+    DR_INTERCEPT_DR7_WRITE  = 1 << 23,
+    DR_INTERCEPT_DR8_WRITE  = 1 << 24,
+    DR_INTERCEPT_DR9_WRITE  = 1 << 25,
+    DR_INTERCEPT_DR10_WRITE = 1 << 26,
+    DR_INTERCEPT_DR11_WRITE = 1 << 27,
+    DR_INTERCEPT_DR12_WRITE = 1 << 28,
+    DR_INTERCEPT_DR13_WRITE = 1 << 29,
+    DR_INTERCEPT_DR14_WRITE = 1 << 30,
+    DR_INTERCEPT_DR15_WRITE = 1u << 31,
+};
+
+enum VMEXIT_EXITCODE
+{
+    /* control register read exitcodes */
+    VMEXIT_CR0_READ    =   0, /* 0x0 */
+    VMEXIT_CR1_READ    =   1, /* 0x1 */
+    VMEXIT_CR2_READ    =   2, /* 0x2 */
+    VMEXIT_CR3_READ    =   3, /* 0x3 */
+    VMEXIT_CR4_READ    =   4, /* 0x4 */
+    VMEXIT_CR5_READ    =   5, /* 0x5 */
+    VMEXIT_CR6_READ    =   6, /* 0x6 */
+    VMEXIT_CR7_READ    =   7, /* 0x7 */
+    VMEXIT_CR8_READ    =   8, /* 0x8 */
+    VMEXIT_CR9_READ    =   9, /* 0x9 */
+    VMEXIT_CR10_READ   =  10, /* 0xa */
+    VMEXIT_CR11_READ   =  11, /* 0xb */
+    VMEXIT_CR12_READ   =  12, /* 0xc */
+    VMEXIT_CR13_READ   =  13, /* 0xd */
+    VMEXIT_CR14_READ   =  14, /* 0xe */
+    VMEXIT_CR15_READ   =  15, /* 0xf */
+
+    /* control register write exitcodes */
+    VMEXIT_CR0_WRITE   =  16, /* 0x10 */
+    VMEXIT_CR1_WRITE   =  17, /* 0x11 */
+    VMEXIT_CR2_WRITE   =  18, /* 0x12 */
+    VMEXIT_CR3_WRITE   =  19, /* 0x13 */
+    VMEXIT_CR4_WRITE   =  20, /* 0x14 */
+    VMEXIT_CR5_WRITE   =  21, /* 0x15 */
+    VMEXIT_CR6_WRITE   =  22, /* 0x16 */
+    VMEXIT_CR7_WRITE   =  23, /* 0x17 */
+    VMEXIT_CR8_WRITE   =  24, /* 0x18 */
+    VMEXIT_CR9_WRITE   =  25, /* 0x19 */
+    VMEXIT_CR10_WRITE  =  26, /* 0x1a */
+    VMEXIT_CR11_WRITE  =  27, /* 0x1b */
+    VMEXIT_CR12_WRITE  =  28, /* 0x1c */
+    VMEXIT_CR13_WRITE  =  29, /* 0x1d */
+    VMEXIT_CR14_WRITE  =  30, /* 0x1e */
+    VMEXIT_CR15_WRITE  =  31, /* 0x1f */
+
+    /* debug register read exitcodes */
+    VMEXIT_DR0_READ    =  32, /* 0x20 */
+    VMEXIT_DR1_READ    =  33, /* 0x21 */
+    VMEXIT_DR2_READ    =  34, /* 0x22 */
+    VMEXIT_DR3_READ    =  35, /* 0x23 */
+    VMEXIT_DR4_READ    =  36, /* 0x24 */
+    VMEXIT_DR5_READ    =  37, /* 0x25 */
+    VMEXIT_DR6_READ    =  38, /* 0x26 */
+    VMEXIT_DR7_READ    =  39, /* 0x27 */
+    VMEXIT_DR8_READ    =  40, /* 0x28 */
+    VMEXIT_DR9_READ    =  41, /* 0x29 */
+    VMEXIT_DR10_READ   =  42, /* 0x2a */
+    VMEXIT_DR11_READ   =  43, /* 0x2b */
+    VMEXIT_DR12_READ   =  44, /* 0x2c */
+    VMEXIT_DR13_READ   =  45, /* 0x2d */
+    VMEXIT_DR14_READ   =  46, /* 0x2e */
+    VMEXIT_DR15_READ   =  47, /* 0x2f */
+
+    /* debug register write exitcodes */
+    VMEXIT_DR0_WRITE   =  48, /* 0x30 */
+    VMEXIT_DR1_WRITE   =  49, /* 0x31 */
+    VMEXIT_DR2_WRITE   =  50, /* 0x32 */
+    VMEXIT_DR3_WRITE   =  51, /* 0x33 */
+    VMEXIT_DR4_WRITE   =  52, /* 0x34 */
+    VMEXIT_DR5_WRITE   =  53, /* 0x35 */
+    VMEXIT_DR6_WRITE   =  54, /* 0x36 */
+    VMEXIT_DR7_WRITE   =  55, /* 0x37 */
+    VMEXIT_DR8_WRITE   =  56, /* 0x38 */
+    VMEXIT_DR9_WRITE   =  57, /* 0x39 */
+    VMEXIT_DR10_WRITE  =  58, /* 0x3a */
+    VMEXIT_DR11_WRITE  =  59, /* 0x3b */
+    VMEXIT_DR12_WRITE  =  60, /* 0x3c */
+    VMEXIT_DR13_WRITE  =  61, /* 0x3d */
+    VMEXIT_DR14_WRITE  =  62, /* 0x3e */
+    VMEXIT_DR15_WRITE  =  63, /* 0x3f */
+
+    /* processor exception exitcodes (VMEXIT_EXCP[0-31]) */
+    VMEXIT_EXCEPTION_DE  =  64, /* 0x40, divide-by-zero-error */
+    VMEXIT_EXCEPTION_DB  =  65, /* 0x41, debug */
+    VMEXIT_EXCEPTION_NMI =  66, /* 0x42, non-maskable-interrupt */
+    VMEXIT_EXCEPTION_BP  =  67, /* 0x43, breakpoint */
+    VMEXIT_EXCEPTION_OF  =  68, /* 0x44, overflow */
+    VMEXIT_EXCEPTION_BR  =  69, /* 0x45, bound-range */
+    VMEXIT_EXCEPTION_UD  =  70, /* 0x46, invalid-opcode*/
+    VMEXIT_EXCEPTION_NM  =  71, /* 0x47, device-not-available */
+    VMEXIT_EXCEPTION_DF  =  72, /* 0x48, double-fault */
+    VMEXIT_EXCEPTION_09  =  73, /* 0x49, unsupported (reserved) */
+    VMEXIT_EXCEPTION_TS  =  74, /* 0x4a, invalid-tss */
+    VMEXIT_EXCEPTION_NP  =  75, /* 0x4b, segment-not-present */
+    VMEXIT_EXCEPTION_SS  =  76, /* 0x4c, stack */
+    VMEXIT_EXCEPTION_GP  =  77, /* 0x4d, general-protection */
+    VMEXIT_EXCEPTION_PF  =  78, /* 0x4e, page-fault */
+    VMEXIT_EXCEPTION_15  =  79, /* 0x4f, reserved */
+    VMEXIT_EXCEPTION_MF  =  80, /* 0x50, x87 floating-point exception-pending */
+    VMEXIT_EXCEPTION_AC  =  81, /* 0x51, alignment-check */
+    VMEXIT_EXCEPTION_MC  =  82, /* 0x52, machine-check */
+    VMEXIT_EXCEPTION_XF  =  83, /* 0x53, simd floating-point */
+/*  VMEXIT_EXCEPTION_20  =  84,    0x54, #VE (Intel specific) */
+    VMEXIT_EXCEPTION_CP  =  85, /* 0x55, controlflow protection */
+
+    /* exceptions 20-31 (exitcodes 84-95) are reserved */
+
+    /* ...and the rest of the #VMEXITs */
+    VMEXIT_INTR             =  96, /* 0x60 */
+    VMEXIT_NMI              =  97, /* 0x61 */
+    VMEXIT_SMI              =  98, /* 0x62 */
+    VMEXIT_INIT             =  99, /* 0x63 */
+    VMEXIT_VINTR            = 100, /* 0x64 */
+    VMEXIT_CR0_SEL_WRITE    = 101, /* 0x65 */
+    VMEXIT_IDTR_READ        = 102, /* 0x66 */
+    VMEXIT_GDTR_READ        = 103, /* 0x67 */
+    VMEXIT_LDTR_READ        = 104, /* 0x68 */
+    VMEXIT_TR_READ          = 105, /* 0x69 */
+    VMEXIT_IDTR_WRITE       = 106, /* 0x6a */
+    VMEXIT_GDTR_WRITE       = 107, /* 0x6b */
+    VMEXIT_LDTR_WRITE       = 108, /* 0x6c */
+    VMEXIT_TR_WRITE         = 109, /* 0x6d */
+    VMEXIT_RDTSC            = 110, /* 0x6e */
+    VMEXIT_RDPMC            = 111, /* 0x6f */
+    VMEXIT_PUSHF            = 112, /* 0x70 */
+    VMEXIT_POPF             = 113, /* 0x71 */
+    VMEXIT_CPUID            = 114, /* 0x72 */
+    VMEXIT_RSM              = 115, /* 0x73 */
+    VMEXIT_IRET             = 116, /* 0x74 */
+    VMEXIT_SWINT            = 117, /* 0x75 */
+    VMEXIT_INVD             = 118, /* 0x76 */
+    VMEXIT_PAUSE            = 119, /* 0x77 */
+    VMEXIT_HLT              = 120, /* 0x78 */
+    VMEXIT_INVLPG           = 121, /* 0x79 */
+    VMEXIT_INVLPGA          = 122, /* 0x7a */
+    VMEXIT_IOIO             = 123, /* 0x7b */
+    VMEXIT_MSR              = 124, /* 0x7c */
+    VMEXIT_TASK_SWITCH      = 125, /* 0x7d */
+    VMEXIT_FERR_FREEZE      = 126, /* 0x7e */
+    VMEXIT_SHUTDOWN         = 127, /* 0x7f */
+    VMEXIT_VMRUN            = 128, /* 0x80 */
+    VMEXIT_VMMCALL          = 129, /* 0x81 */
+    VMEXIT_VMLOAD           = 130, /* 0x82 */
+    VMEXIT_VMSAVE           = 131, /* 0x83 */
+    VMEXIT_STGI             = 132, /* 0x84 */
+    VMEXIT_CLGI             = 133, /* 0x85 */
+    VMEXIT_SKINIT           = 134, /* 0x86 */
+    VMEXIT_RDTSCP           = 135, /* 0x87 */
+    VMEXIT_ICEBP            = 136, /* 0x88 */
+    VMEXIT_WBINVD           = 137, /* 0x89 */
+    VMEXIT_MONITOR          = 138, /* 0x8a */
+    VMEXIT_MWAIT            = 139, /* 0x8b */
+    VMEXIT_MWAIT_CONDITIONAL= 140, /* 0x8c */
+    VMEXIT_XSETBV           = 141, /* 0x8d */
+    VMEXIT_RDPRU            = 142, /* 0x8e */
+    /* Remember to also update VMEXIT_NPF_PERFC! */
+    VMEXIT_NPF              = 1024, /* 0x400, nested paging fault */
+    /* Remember to also update SVM_PERF_EXIT_REASON_SIZE! */
+    VMEXIT_INVALID          =  -1
+};
+
+enum
+{
+    /* Available on all SVM-capable hardware. */
+    TLB_CTRL_NO_FLUSH             = 0,
+    TLB_CTRL_FLUSH_ALL            = 1,
+
+    /* Available with the FlushByASID feature. */
+    TLB_CTRL_FLUSH_ASID           = 3,
+    TLB_CTRL_FLUSH_ASID_NONGLOBAL = 7,
+};
+
+typedef union
+{
+    struct
+    {
+        uint8_t  vector;
+        uint8_t  type:3;
+        bool     ev:1;
+        uint32_t resvd1:19;
+        bool     v:1;
+        uint32_t ec;
+    };
+    uint64_t raw;
+} intinfo_t;
+
+typedef union {
+    struct {
+        bool intr_shadow:    1;
+        bool guest_intr_mask:1;
+    };
+    uint64_t raw;
+} intstat_t;
+
+typedef union
+{
+    u64 bytes;
+    struct
+    {
+        u64 tpr:          8;
+        u64 irq:          1;
+        u64 vgif:         1;
+        u64 rsvd0:        6;
+        u64 prio:         4;
+        u64 ign_tpr:      1;
+        u64 rsvd1:        3;
+        u64 intr_masking: 1;
+        u64 vgif_enable:  1;
+        u64 rsvd2:        6;
+        u64 vector:       8;
+        u64 rsvd3:       24;
+    } fields;
+} vintr_t;
+
+typedef union
+{
+    u64 bytes;
+    struct
+    {
+        u64 type: 1;
+        u64 rsv0: 1;
+        u64 str:  1;
+        u64 rep:  1;
+        u64 sz8:  1;
+        u64 sz16: 1;
+        u64 sz32: 1;
+        u64 rsv1: 9;
+        u64 port: 16;
+    } fields;
+} ioio_info_t;
+
+typedef union
+{
+    u64 bytes;
+    struct
+    {
+        u64 lbr_enable:1;
+        u64 vloadsave_enable:1;
+    } fields;
+} virt_ext_t;
+
+typedef union
+{
+    struct {
+        bool intercepts:1; /* 0:  cr/dr/exception/general intercepts,
+                            *     pause_filter_count, tsc_offset */
+        bool iopm:1;       /* 1:  iopm_base_pa, msrpm_base_pa */
+        bool asid:1;       /* 2:  asid */
+        bool tpr:1;        /* 3:  vintr */
+        bool np:1;         /* 4:  np, h_cr3, g_pat */
+        bool cr:1;         /* 5:  cr0, cr3, cr4, efer */
+        bool dr:1;         /* 6:  dr6, dr7 */
+        bool dt:1;         /* 7:  gdtr, idtr */
+        bool seg:1;        /* 8:  cs, ds, es, ss, cpl */
+        bool cr2:1;        /* 9:  cr2 */
+        bool lbr:1;        /* 10: debugctlmsr, last{branch,int}{to,from}ip */
+        bool :1;
+        bool cet:1;        /* 12: msr_s_set, ssp, msr_isst */
+    };
+    uint32_t raw;
+} vmcbcleanbits_t;
+
+#define IOPM_SIZE   (12 * 1024)
+#define MSRPM_SIZE  (8  * 1024)
+
+struct vmcb_struct {
+    u32 _cr_intercepts;         /* offset 0x00 - cleanbit 0 */
+    u32 _dr_intercepts;         /* offset 0x04 - cleanbit 0 */
+    u32 _exception_intercepts;  /* offset 0x08 - cleanbit 0 */
+    u32 _general1_intercepts;   /* offset 0x0C - cleanbit 0 */
+    u32 _general2_intercepts;   /* offset 0x10 - cleanbit 0 */
+    u32 res01[10];
+    u16 _pause_filter_thresh;   /* offset 0x3C - cleanbit 0 */
+    u16 _pause_filter_count;    /* offset 0x3E - cleanbit 0 */
+    u64 _iopm_base_pa;          /* offset 0x40 - cleanbit 1 */
+    u64 _msrpm_base_pa;         /* offset 0x48 - cleanbit 1 */
+    u64 _tsc_offset;            /* offset 0x50 - cleanbit 0 */
+    u32 _asid;                  /* offset 0x58 - cleanbit 2 */
+    u8  tlb_control;            /* offset 0x5C - TLB_CTRL_* */
+    u8  res07[3];
+    vintr_t _vintr;             /* offset 0x60 - cleanbit 3 */
+    intstat_t int_stat;         /* offset 0x68 */
+    u64 exitcode;               /* offset 0x70 */
+    union {
+        struct {
+            uint64_t exitinfo1; /* offset 0x78 */
+            uint64_t exitinfo2; /* offset 0x80 */
+        };
+        union {
+            struct {
+                uint32_t ec; /* #NP, #SS, #GP, #PF, #AC */
+                uint32_t :32;
+
+                uint64_t cr2; /* #PF */
+            } exc;
+            struct {
+                bool     in:1;
+                bool     :1;
+                bool     str:1;
+                bool     rep:1;
+                uint16_t bytes:3;
+                uint16_t /* asz */:3;
+                uint16_t seg:3;
+                uint16_t :3;
+                uint16_t port;
+                uint32_t :32;
+
+                uint64_t nrip;
+            } io;
+            struct {
+                uint64_t gpr:4;
+                uint64_t :59;
+                bool     mov_insn:1; /* MOV, as opposed to LMSW, CLTS, etc */
+            } mov_cr;
+            struct {
+                uint64_t ec;
+                uint64_t gpa;
+            } npf;
+            struct {
+                uint16_t sel;
+                uint64_t :48;
+
+                uint32_t ec;
+                uint32_t :4;
+                bool     iret:1;
+                uint32_t :1;
+                bool     jmp:1;
+                uint32_t :5;
+                bool     ev:1;
+                uint32_t :3;
+                bool     rf:1;
+            } task_switch;
+        } ei;
+    };
+    intinfo_t exit_int_info;    /* offset 0x88 */
+    union {                     /* offset 0x90 - cleanbit 4 */
+        struct {
+            bool _np        :1;
+            bool _sev       :1;
+            bool _sev_es    :1;
+            bool _gmet      :1;
+            bool _np_sss    :1;
+            bool _vte       :1;
+        };
+        uint64_t _np_ctrl;
+    };
+    u64 res08[2];
+    intinfo_t event_inj;        /* offset 0xA8 */
+    u64 _h_cr3;                 /* offset 0xB0 - cleanbit 4 */
+    virt_ext_t virt_ext;        /* offset 0xB8 */
+    vmcbcleanbits_t cleanbits;  /* offset 0xC0 */
+    u32 res09;                  /* offset 0xC4 */
+    u64 nextrip;                /* offset 0xC8 */
+    u8  guest_ins_len;          /* offset 0xD0 */
+    u8  guest_ins[15];          /* offset 0xD1 */
+    u64 res10a[100];            /* offset 0xE0 pad to save area */
+
+    union {
+        struct segment_register sreg[6];
+        struct {
+            struct segment_register es;  /* offset 0x400 - cleanbit 8 */
+            struct segment_register cs;  /* cleanbit 8 */
+            struct segment_register ss;  /* cleanbit 8 */
+            struct segment_register ds;  /* cleanbit 8 */
+            struct segment_register fs;
+            struct segment_register gs;
+        };
+    };
+    struct segment_register gdtr; /* cleanbit 7 */
+    struct segment_register ldtr;
+    struct segment_register idtr; /* cleanbit 7 */
+    struct segment_register tr;
+    u64 res10[5];
+    u8 res11[3];
+    u8 _cpl;                    /* cleanbit 8 */
+    u32 res12;
+    u64 _efer;                  /* offset 0x400 + 0xD0 - cleanbit 5 */
+    u64 res13[14];
+    u64 _cr4;                   /* offset 0x400 + 0x148 - cleanbit 5 */
+    u64 _cr3;                   /* cleanbit 5 */
+    u64 _cr0;                   /* cleanbit 5 */
+    u64 _dr7;                   /* cleanbit 6 */
+    u64 _dr6;                   /* cleanbit 6 */
+    u64 rflags;
+    u64 rip;
+    u64 res14[11];
+    u64 rsp;
+    u64 _msr_s_cet;             /* offset 0x400 + 0x1E0 - cleanbit 12 */
+    u64 _ssp;                   /* offset 0x400 + 0x1E8   | */
+    u64 _msr_isst;              /* offset 0x400 + 0x1F0   v */
+    u64 rax;
+    u64 star;
+    u64 lstar;
+    u64 cstar;
+    u64 sfmask;
+    u64 kerngsbase;
+    u64 sysenter_cs;
+    u64 sysenter_esp;
+    u64 sysenter_eip;
+    u64 _cr2;                   /* cleanbit 9 */
+    u64 res16[4];
+    u64 _g_pat;                 /* cleanbit 4 */
+    u64 _debugctlmsr;           /* cleanbit 10 */
+    u64 _lastbranchfromip;      /* cleanbit 10 */
+    u64 _lastbranchtoip;        /* cleanbit 10 */
+    u64 _lastintfromip;         /* cleanbit 10 */
+    u64 _lastinttoip;           /* cleanbit 10 */
+    u64 res17[9];
+    u64 spec_ctrl;
+    u64 res18[291];
+};
+
+struct vmcb_struct *alloc_vmcb(void);
+void free_vmcb(struct vmcb_struct *vmcb);
+
+int  svm_create_vmcb(struct vcpu *v);
+void svm_destroy_vmcb(struct vcpu *v);
+
+void setup_vmcb_dump(void);
+
+/*
+ * VMCB accessor functions.
+ */
+
+#define VMCB_ACCESSORS_(name, type, cleanbit)     \
+static inline void                                \
+vmcb_set_ ## name(struct vmcb_struct *vmcb,       \
+                  type value)                     \
+{                                                 \
+    vmcb->_ ## name = value;                      \
+    vmcb->cleanbits.cleanbit = false;             \
+}                                                 \
+static inline type                                \
+vmcb_get_ ## name(const struct vmcb_struct *vmcb) \
+{                                                 \
+    return vmcb->_ ## name;                       \
+}
+
+#define VMCB_ACCESSORS(name, cleanbit) \
+    VMCB_ACCESSORS_(name, typeof(((struct vmcb_struct){})._ ## name), cleanbit)
+
+VMCB_ACCESSORS(cr_intercepts, intercepts)
+VMCB_ACCESSORS(dr_intercepts, intercepts)
+VMCB_ACCESSORS(exception_intercepts, intercepts)
+VMCB_ACCESSORS(general1_intercepts, intercepts)
+VMCB_ACCESSORS(general2_intercepts, intercepts)
+VMCB_ACCESSORS(pause_filter_count, intercepts)
+VMCB_ACCESSORS(pause_filter_thresh, intercepts)
+VMCB_ACCESSORS(tsc_offset, intercepts)
+VMCB_ACCESSORS(iopm_base_pa, iopm)
+VMCB_ACCESSORS(msrpm_base_pa, iopm)
+VMCB_ACCESSORS(asid, asid)
+VMCB_ACCESSORS(vintr, tpr)
+VMCB_ACCESSORS(np_ctrl, np)
+VMCB_ACCESSORS_(np, bool, np)
+VMCB_ACCESSORS_(sev, bool, np)
+VMCB_ACCESSORS_(sev_es, bool, np)
+VMCB_ACCESSORS_(gmet, bool, np)
+VMCB_ACCESSORS_(vte, bool, np)
+VMCB_ACCESSORS(h_cr3, np)
+VMCB_ACCESSORS(g_pat, np)
+VMCB_ACCESSORS(cr0, cr)
+VMCB_ACCESSORS(cr3, cr)
+VMCB_ACCESSORS(cr4, cr)
+VMCB_ACCESSORS(efer, cr)
+VMCB_ACCESSORS(dr6, dr)
+VMCB_ACCESSORS(dr7, dr)
+VMCB_ACCESSORS(cpl, seg)
+VMCB_ACCESSORS(cr2, cr2)
+VMCB_ACCESSORS(debugctlmsr, lbr)
+VMCB_ACCESSORS(lastbranchfromip, lbr)
+VMCB_ACCESSORS(lastbranchtoip, lbr)
+VMCB_ACCESSORS(lastintfromip, lbr)
+VMCB_ACCESSORS(lastinttoip, lbr)
+VMCB_ACCESSORS(msr_s_cet, cet)
+VMCB_ACCESSORS(ssp, cet)
+VMCB_ACCESSORS(msr_isst, cet)
+
+#undef VMCB_ACCESSORS
+
+#endif /* SVM_PRIVATE_VMCB_H */
diff --git a/xen/arch/x86/include/asm/hvm/svm/vmcb.h b/xen/arch/x86/include/asm/hvm/svm/vmcb.h
index 28f715e37692..717215ff969b 100644
--- a/xen/arch/x86/include/asm/hvm/svm/vmcb.h
+++ b/xen/arch/x86/include/asm/hvm/svm/vmcb.h
@@ -10,544 +10,6 @@
 
 #include 
 
-/* general 1 intercepts */
-enum GenericIntercept1bits
-{
-    GENERAL1_INTERCEPT_INTR          = 1 << 0,
-    GENERAL1_INTERCEPT_NMI           = 1 << 1,
-    GENERAL1_INTERCEPT_SMI           = 1 << 2,
-    GENERAL1_INTERCEPT_INIT          = 1 << 3,
-    GENERAL1_INTERCEPT_VINTR         = 1 << 4,
-    GENERAL1_INTERCEPT_CR0_SEL_WRITE = 1 << 5,
-    GENERAL1_INTERCEPT_IDTR_READ     = 1 << 6,
-    GENERAL1_INTERCEPT_GDTR_READ     = 1 << 7,
-    GENERAL1_INTERCEPT_LDTR_READ     = 1 << 8,
-    GENERAL1_INTERCEPT_TR_READ       = 1 << 9,
-    GENERAL1_INTERCEPT_IDTR_WRITE    = 1 << 10,
-    GENERAL1_INTERCEPT_GDTR_WRITE    = 1 << 11,
-    GENERAL1_INTERCEPT_LDTR_WRITE    = 1 << 12,
-    GENERAL1_INTERCEPT_TR_WRITE      = 1 << 13,
-    GENERAL1_INTERCEPT_RDTSC         = 1 << 14,
-    GENERAL1_INTERCEPT_RDPMC         = 1 << 15,
-    GENERAL1_INTERCEPT_PUSHF         = 1 << 16,
-    GENERAL1_INTERCEPT_POPF          = 1 << 17,
-    GENERAL1_INTERCEPT_CPUID         = 1 << 18,
-    GENERAL1_INTERCEPT_RSM           = 1 << 19,
-    GENERAL1_INTERCEPT_IRET          = 1 << 20,
-    GENERAL1_INTERCEPT_SWINT         = 1 << 21,
-    GENERAL1_INTERCEPT_INVD          = 1 << 22,
-    GENERAL1_INTERCEPT_PAUSE         = 1 << 23,
-    GENERAL1_INTERCEPT_HLT           = 1 << 24,
-    GENERAL1_INTERCEPT_INVLPG        = 1 << 25,
-    GENERAL1_INTERCEPT_INVLPGA       = 1 << 26,
-    GENERAL1_INTERCEPT_IOIO_PROT     = 1 << 27,
-    GENERAL1_INTERCEPT_MSR_PROT      = 1 << 28,
-    GENERAL1_INTERCEPT_TASK_SWITCH   = 1 << 29,
-    GENERAL1_INTERCEPT_FERR_FREEZE   = 1 << 30,
-    GENERAL1_INTERCEPT_SHUTDOWN_EVT  = 1u << 31
-};
-
-/* general 2 intercepts */
-enum GenericIntercept2bits
-{
-    GENERAL2_INTERCEPT_VMRUN   = 1 << 0,
-    GENERAL2_INTERCEPT_VMMCALL = 1 << 1,
-    GENERAL2_INTERCEPT_VMLOAD  = 1 << 2,
-    GENERAL2_INTERCEPT_VMSAVE  = 1 << 3,
-    GENERAL2_INTERCEPT_STGI    = 1 << 4,
-    GENERAL2_INTERCEPT_CLGI    = 1 << 5,
-    GENERAL2_INTERCEPT_SKINIT  = 1 << 6,
-    GENERAL2_INTERCEPT_RDTSCP  = 1 << 7,
-    GENERAL2_INTERCEPT_ICEBP   = 1 << 8,
-    GENERAL2_INTERCEPT_WBINVD  = 1 << 9,
-    GENERAL2_INTERCEPT_MONITOR = 1 << 10,
-    GENERAL2_INTERCEPT_MWAIT   = 1 << 11,
-    GENERAL2_INTERCEPT_MWAIT_CONDITIONAL = 1 << 12,
-    GENERAL2_INTERCEPT_XSETBV  = 1 << 13,
-    GENERAL2_INTERCEPT_RDPRU   = 1 << 14,
-};
-
-
-/* control register intercepts */
-enum CRInterceptBits
-{
-    CR_INTERCEPT_CR0_READ   = 1 << 0,
-    CR_INTERCEPT_CR1_READ   = 1 << 1,
-    CR_INTERCEPT_CR2_READ   = 1 << 2,
-    CR_INTERCEPT_CR3_READ   = 1 << 3,
-    CR_INTERCEPT_CR4_READ   = 1 << 4,
-    CR_INTERCEPT_CR5_READ   = 1 << 5,
-    CR_INTERCEPT_CR6_READ   = 1 << 6,
-    CR_INTERCEPT_CR7_READ   = 1 << 7,
-    CR_INTERCEPT_CR8_READ   = 1 << 8,
-    CR_INTERCEPT_CR9_READ   = 1 << 9,
-    CR_INTERCEPT_CR10_READ  = 1 << 10,
-    CR_INTERCEPT_CR11_READ  = 1 << 11,
-    CR_INTERCEPT_CR12_READ  = 1 << 12,
-    CR_INTERCEPT_CR13_READ  = 1 << 13,
-    CR_INTERCEPT_CR14_READ  = 1 << 14,
-    CR_INTERCEPT_CR15_READ  = 1 << 15,
-    CR_INTERCEPT_CR0_WRITE  = 1 << 16,
-    CR_INTERCEPT_CR1_WRITE  = 1 << 17,
-    CR_INTERCEPT_CR2_WRITE  = 1 << 18,
-    CR_INTERCEPT_CR3_WRITE  = 1 << 19,
-    CR_INTERCEPT_CR4_WRITE  = 1 << 20,
-    CR_INTERCEPT_CR5_WRITE  = 1 << 21,
-    CR_INTERCEPT_CR6_WRITE  = 1 << 22,
-    CR_INTERCEPT_CR7_WRITE  = 1 << 23,
-    CR_INTERCEPT_CR8_WRITE  = 1 << 24,
-    CR_INTERCEPT_CR9_WRITE  = 1 << 25,
-    CR_INTERCEPT_CR10_WRITE = 1 << 26,
-    CR_INTERCEPT_CR11_WRITE = 1 << 27,
-    CR_INTERCEPT_CR12_WRITE = 1 << 28,
-    CR_INTERCEPT_CR13_WRITE = 1 << 29,
-    CR_INTERCEPT_CR14_WRITE = 1 << 30,
-    CR_INTERCEPT_CR15_WRITE = 1u << 31,
-};
-
-
-/* debug register intercepts */
-enum DRInterceptBits
-{
-    DR_INTERCEPT_DR0_READ   = 1 << 0,
-    DR_INTERCEPT_DR1_READ   = 1 << 1,
-    DR_INTERCEPT_DR2_READ   = 1 << 2,
-    DR_INTERCEPT_DR3_READ   = 1 << 3,
-    DR_INTERCEPT_DR4_READ   = 1 << 4,
-    DR_INTERCEPT_DR5_READ   = 1 << 5,
-    DR_INTERCEPT_DR6_READ   = 1 << 6,
-    DR_INTERCEPT_DR7_READ   = 1 << 7,
-    DR_INTERCEPT_DR8_READ   = 1 << 8,
-    DR_INTERCEPT_DR9_READ   = 1 << 9,
-    DR_INTERCEPT_DR10_READ  = 1 << 10,
-    DR_INTERCEPT_DR11_READ  = 1 << 11,
-    DR_INTERCEPT_DR12_READ  = 1 << 12,
-    DR_INTERCEPT_DR13_READ  = 1 << 13,
-    DR_INTERCEPT_DR14_READ  = 1 << 14,
-    DR_INTERCEPT_DR15_READ  = 1 << 15,
-    DR_INTERCEPT_DR0_WRITE  = 1 << 16,
-    DR_INTERCEPT_DR1_WRITE  = 1 << 17,
-    DR_INTERCEPT_DR2_WRITE  = 1 << 18,
-    DR_INTERCEPT_DR3_WRITE  = 1 << 19,
-    DR_INTERCEPT_DR4_WRITE  = 1 << 20,
-    DR_INTERCEPT_DR5_WRITE  = 1 << 21,
-    DR_INTERCEPT_DR6_WRITE  = 1 << 22,
-    DR_INTERCEPT_DR7_WRITE  = 1 << 23,
-    DR_INTERCEPT_DR8_WRITE  = 1 << 24,
-    DR_INTERCEPT_DR9_WRITE  = 1 << 25,
-    DR_INTERCEPT_DR10_WRITE = 1 << 26,
-    DR_INTERCEPT_DR11_WRITE = 1 << 27,
-    DR_INTERCEPT_DR12_WRITE = 1 << 28,
-    DR_INTERCEPT_DR13_WRITE = 1 << 29,
-    DR_INTERCEPT_DR14_WRITE = 1 << 30,
-    DR_INTERCEPT_DR15_WRITE = 1u << 31,
-};
-
-enum VMEXIT_EXITCODE
-{
-    /* control register read exitcodes */
-    VMEXIT_CR0_READ    =   0, /* 0x0 */
-    VMEXIT_CR1_READ    =   1, /* 0x1 */
-    VMEXIT_CR2_READ    =   2, /* 0x2 */
-    VMEXIT_CR3_READ    =   3, /* 0x3 */
-    VMEXIT_CR4_READ    =   4, /* 0x4 */
-    VMEXIT_CR5_READ    =   5, /* 0x5 */
-    VMEXIT_CR6_READ    =   6, /* 0x6 */
-    VMEXIT_CR7_READ    =   7, /* 0x7 */
-    VMEXIT_CR8_READ    =   8, /* 0x8 */
-    VMEXIT_CR9_READ    =   9, /* 0x9 */
-    VMEXIT_CR10_READ   =  10, /* 0xa */
-    VMEXIT_CR11_READ   =  11, /* 0xb */
-    VMEXIT_CR12_READ   =  12, /* 0xc */
-    VMEXIT_CR13_READ   =  13, /* 0xd */
-    VMEXIT_CR14_READ   =  14, /* 0xe */
-    VMEXIT_CR15_READ   =  15, /* 0xf */
-
-    /* control register write exitcodes */
-    VMEXIT_CR0_WRITE   =  16, /* 0x10 */
-    VMEXIT_CR1_WRITE   =  17, /* 0x11 */
-    VMEXIT_CR2_WRITE   =  18, /* 0x12 */
-    VMEXIT_CR3_WRITE   =  19, /* 0x13 */
-    VMEXIT_CR4_WRITE   =  20, /* 0x14 */
-    VMEXIT_CR5_WRITE   =  21, /* 0x15 */
-    VMEXIT_CR6_WRITE   =  22, /* 0x16 */
-    VMEXIT_CR7_WRITE   =  23, /* 0x17 */
-    VMEXIT_CR8_WRITE   =  24, /* 0x18 */
-    VMEXIT_CR9_WRITE   =  25, /* 0x19 */
-    VMEXIT_CR10_WRITE  =  26, /* 0x1a */
-    VMEXIT_CR11_WRITE  =  27, /* 0x1b */
-    VMEXIT_CR12_WRITE  =  28, /* 0x1c */
-    VMEXIT_CR13_WRITE  =  29, /* 0x1d */
-    VMEXIT_CR14_WRITE  =  30, /* 0x1e */
-    VMEXIT_CR15_WRITE  =  31, /* 0x1f */
-
-    /* debug register read exitcodes */
-    VMEXIT_DR0_READ    =  32, /* 0x20 */
-    VMEXIT_DR1_READ    =  33, /* 0x21 */
-    VMEXIT_DR2_READ    =  34, /* 0x22 */
-    VMEXIT_DR3_READ    =  35, /* 0x23 */
-    VMEXIT_DR4_READ    =  36, /* 0x24 */
-    VMEXIT_DR5_READ    =  37, /* 0x25 */
-    VMEXIT_DR6_READ    =  38, /* 0x26 */
-    VMEXIT_DR7_READ    =  39, /* 0x27 */
-    VMEXIT_DR8_READ    =  40, /* 0x28 */
-    VMEXIT_DR9_READ    =  41, /* 0x29 */
-    VMEXIT_DR10_READ   =  42, /* 0x2a */
-    VMEXIT_DR11_READ   =  43, /* 0x2b */
-    VMEXIT_DR12_READ   =  44, /* 0x2c */
-    VMEXIT_DR13_READ   =  45, /* 0x2d */
-    VMEXIT_DR14_READ   =  46, /* 0x2e */
-    VMEXIT_DR15_READ   =  47, /* 0x2f */
-
-    /* debug register write exitcodes */
-    VMEXIT_DR0_WRITE   =  48, /* 0x30 */
-    VMEXIT_DR1_WRITE   =  49, /* 0x31 */
-    VMEXIT_DR2_WRITE   =  50, /* 0x32 */
-    VMEXIT_DR3_WRITE   =  51, /* 0x33 */
-    VMEXIT_DR4_WRITE   =  52, /* 0x34 */
-    VMEXIT_DR5_WRITE   =  53, /* 0x35 */
-    VMEXIT_DR6_WRITE   =  54, /* 0x36 */
-    VMEXIT_DR7_WRITE   =  55, /* 0x37 */
-    VMEXIT_DR8_WRITE   =  56, /* 0x38 */
-    VMEXIT_DR9_WRITE   =  57, /* 0x39 */
-    VMEXIT_DR10_WRITE  =  58, /* 0x3a */
-    VMEXIT_DR11_WRITE  =  59, /* 0x3b */
-    VMEXIT_DR12_WRITE  =  60, /* 0x3c */
-    VMEXIT_DR13_WRITE  =  61, /* 0x3d */
-    VMEXIT_DR14_WRITE  =  62, /* 0x3e */
-    VMEXIT_DR15_WRITE  =  63, /* 0x3f */
-
-    /* processor exception exitcodes (VMEXIT_EXCP[0-31]) */
-    VMEXIT_EXCEPTION_DE  =  64, /* 0x40, divide-by-zero-error */
-    VMEXIT_EXCEPTION_DB  =  65, /* 0x41, debug */
-    VMEXIT_EXCEPTION_NMI =  66, /* 0x42, non-maskable-interrupt */
-    VMEXIT_EXCEPTION_BP  =  67, /* 0x43, breakpoint */
-    VMEXIT_EXCEPTION_OF  =  68, /* 0x44, overflow */
-    VMEXIT_EXCEPTION_BR  =  69, /* 0x45, bound-range */
-    VMEXIT_EXCEPTION_UD  =  70, /* 0x46, invalid-opcode*/
-    VMEXIT_EXCEPTION_NM  =  71, /* 0x47, device-not-available */
-    VMEXIT_EXCEPTION_DF  =  72, /* 0x48, double-fault */
-    VMEXIT_EXCEPTION_09  =  73, /* 0x49, unsupported (reserved) */
-    VMEXIT_EXCEPTION_TS  =  74, /* 0x4a, invalid-tss */
-    VMEXIT_EXCEPTION_NP  =  75, /* 0x4b, segment-not-present */
-    VMEXIT_EXCEPTION_SS  =  76, /* 0x4c, stack */
-    VMEXIT_EXCEPTION_GP  =  77, /* 0x4d, general-protection */
-    VMEXIT_EXCEPTION_PF  =  78, /* 0x4e, page-fault */
-    VMEXIT_EXCEPTION_15  =  79, /* 0x4f, reserved */
-    VMEXIT_EXCEPTION_MF  =  80, /* 0x50, x87 floating-point exception-pending */
-    VMEXIT_EXCEPTION_AC  =  81, /* 0x51, alignment-check */
-    VMEXIT_EXCEPTION_MC  =  82, /* 0x52, machine-check */
-    VMEXIT_EXCEPTION_XF  =  83, /* 0x53, simd floating-point */
-/*  VMEXIT_EXCEPTION_20  =  84,    0x54, #VE (Intel specific) */
-    VMEXIT_EXCEPTION_CP  =  85, /* 0x55, controlflow protection */
-
-    /* exceptions 20-31 (exitcodes 84-95) are reserved */
-
-    /* ...and the rest of the #VMEXITs */
-    VMEXIT_INTR             =  96, /* 0x60 */
-    VMEXIT_NMI              =  97, /* 0x61 */
-    VMEXIT_SMI              =  98, /* 0x62 */
-    VMEXIT_INIT             =  99, /* 0x63 */
-    VMEXIT_VINTR            = 100, /* 0x64 */
-    VMEXIT_CR0_SEL_WRITE    = 101, /* 0x65 */
-    VMEXIT_IDTR_READ        = 102, /* 0x66 */
-    VMEXIT_GDTR_READ        = 103, /* 0x67 */
-    VMEXIT_LDTR_READ        = 104, /* 0x68 */
-    VMEXIT_TR_READ          = 105, /* 0x69 */
-    VMEXIT_IDTR_WRITE       = 106, /* 0x6a */
-    VMEXIT_GDTR_WRITE       = 107, /* 0x6b */
-    VMEXIT_LDTR_WRITE       = 108, /* 0x6c */
-    VMEXIT_TR_WRITE         = 109, /* 0x6d */
-    VMEXIT_RDTSC            = 110, /* 0x6e */
-    VMEXIT_RDPMC            = 111, /* 0x6f */
-    VMEXIT_PUSHF            = 112, /* 0x70 */
-    VMEXIT_POPF             = 113, /* 0x71 */
-    VMEXIT_CPUID            = 114, /* 0x72 */
-    VMEXIT_RSM              = 115, /* 0x73 */
-    VMEXIT_IRET             = 116, /* 0x74 */
-    VMEXIT_SWINT            = 117, /* 0x75 */
-    VMEXIT_INVD             = 118, /* 0x76 */
-    VMEXIT_PAUSE            = 119, /* 0x77 */
-    VMEXIT_HLT              = 120, /* 0x78 */
-    VMEXIT_INVLPG           = 121, /* 0x79 */
-    VMEXIT_INVLPGA          = 122, /* 0x7a */
-    VMEXIT_IOIO             = 123, /* 0x7b */
-    VMEXIT_MSR              = 124, /* 0x7c */
-    VMEXIT_TASK_SWITCH      = 125, /* 0x7d */
-    VMEXIT_FERR_FREEZE      = 126, /* 0x7e */
-    VMEXIT_SHUTDOWN         = 127, /* 0x7f */
-    VMEXIT_VMRUN            = 128, /* 0x80 */
-    VMEXIT_VMMCALL          = 129, /* 0x81 */
-    VMEXIT_VMLOAD           = 130, /* 0x82 */
-    VMEXIT_VMSAVE           = 131, /* 0x83 */
-    VMEXIT_STGI             = 132, /* 0x84 */
-    VMEXIT_CLGI             = 133, /* 0x85 */
-    VMEXIT_SKINIT           = 134, /* 0x86 */
-    VMEXIT_RDTSCP           = 135, /* 0x87 */
-    VMEXIT_ICEBP            = 136, /* 0x88 */
-    VMEXIT_WBINVD           = 137, /* 0x89 */
-    VMEXIT_MONITOR          = 138, /* 0x8a */
-    VMEXIT_MWAIT            = 139, /* 0x8b */
-    VMEXIT_MWAIT_CONDITIONAL= 140, /* 0x8c */
-    VMEXIT_XSETBV           = 141, /* 0x8d */
-    VMEXIT_RDPRU            = 142, /* 0x8e */
-    /* Remember to also update VMEXIT_NPF_PERFC! */
-    VMEXIT_NPF              = 1024, /* 0x400, nested paging fault */
-    /* Remember to also update SVM_PERF_EXIT_REASON_SIZE! */
-    VMEXIT_INVALID          =  -1
-};
-
-enum
-{
-    /* Available on all SVM-capable hardware. */
-    TLB_CTRL_NO_FLUSH             = 0,
-    TLB_CTRL_FLUSH_ALL            = 1,
-
-    /* Available with the FlushByASID feature. */
-    TLB_CTRL_FLUSH_ASID           = 3,
-    TLB_CTRL_FLUSH_ASID_NONGLOBAL = 7,
-};
-
-typedef union
-{
-    struct
-    {
-        uint8_t  vector;
-        uint8_t  type:3;
-        bool     ev:1;
-        uint32_t resvd1:19;
-        bool     v:1;
-        uint32_t ec;
-    };
-    uint64_t raw;
-} intinfo_t;
-
-typedef union {
-    struct {
-        bool intr_shadow:    1;
-        bool guest_intr_mask:1;
-    };
-    uint64_t raw;
-} intstat_t;
-
-typedef union
-{
-    u64 bytes;
-    struct
-    {
-        u64 tpr:          8;
-        u64 irq:          1;
-        u64 vgif:         1;
-        u64 rsvd0:        6;
-        u64 prio:         4;
-        u64 ign_tpr:      1;
-        u64 rsvd1:        3;
-        u64 intr_masking: 1;
-        u64 vgif_enable:  1;
-        u64 rsvd2:        6;
-        u64 vector:       8;
-        u64 rsvd3:       24;
-    } fields;
-} vintr_t;
-
-typedef union
-{
-    u64 bytes;
-    struct
-    {
-        u64 type: 1;
-        u64 rsv0: 1;
-        u64 str:  1;
-        u64 rep:  1;
-        u64 sz8:  1;
-        u64 sz16: 1;
-        u64 sz32: 1;
-        u64 rsv1: 9;
-        u64 port: 16;
-    } fields;
-} ioio_info_t;
-
-typedef union
-{
-    u64 bytes;
-    struct
-    {
-        u64 lbr_enable:1;
-        u64 vloadsave_enable:1;
-    } fields;
-} virt_ext_t;
-
-typedef union
-{
-    struct {
-        bool intercepts:1; /* 0:  cr/dr/exception/general intercepts,
-                            *     pause_filter_count, tsc_offset */
-        bool iopm:1;       /* 1:  iopm_base_pa, msrpm_base_pa */
-        bool asid:1;       /* 2:  asid */
-        bool tpr:1;        /* 3:  vintr */
-        bool np:1;         /* 4:  np, h_cr3, g_pat */
-        bool cr:1;         /* 5:  cr0, cr3, cr4, efer */
-        bool dr:1;         /* 6:  dr6, dr7 */
-        bool dt:1;         /* 7:  gdtr, idtr */
-        bool seg:1;        /* 8:  cs, ds, es, ss, cpl */
-        bool cr2:1;        /* 9:  cr2 */
-        bool lbr:1;        /* 10: debugctlmsr, last{branch,int}{to,from}ip */
-        bool :1;
-        bool cet:1;        /* 12: msr_s_set, ssp, msr_isst */
-    };
-    uint32_t raw;
-} vmcbcleanbits_t;
-
-#define IOPM_SIZE   (12 * 1024)
-#define MSRPM_SIZE  (8  * 1024)
-
-struct vmcb_struct {
-    u32 _cr_intercepts;         /* offset 0x00 - cleanbit 0 */
-    u32 _dr_intercepts;         /* offset 0x04 - cleanbit 0 */
-    u32 _exception_intercepts;  /* offset 0x08 - cleanbit 0 */
-    u32 _general1_intercepts;   /* offset 0x0C - cleanbit 0 */
-    u32 _general2_intercepts;   /* offset 0x10 - cleanbit 0 */
-    u32 res01[10];
-    u16 _pause_filter_thresh;   /* offset 0x3C - cleanbit 0 */
-    u16 _pause_filter_count;    /* offset 0x3E - cleanbit 0 */
-    u64 _iopm_base_pa;          /* offset 0x40 - cleanbit 1 */
-    u64 _msrpm_base_pa;         /* offset 0x48 - cleanbit 1 */
-    u64 _tsc_offset;            /* offset 0x50 - cleanbit 0 */
-    u32 _asid;                  /* offset 0x58 - cleanbit 2 */
-    u8  tlb_control;            /* offset 0x5C - TLB_CTRL_* */
-    u8  res07[3];
-    vintr_t _vintr;             /* offset 0x60 - cleanbit 3 */
-    intstat_t int_stat;         /* offset 0x68 */
-    u64 exitcode;               /* offset 0x70 */
-    union {
-        struct {
-            uint64_t exitinfo1; /* offset 0x78 */
-            uint64_t exitinfo2; /* offset 0x80 */
-        };
-        union {
-            struct {
-                uint32_t ec; /* #NP, #SS, #GP, #PF, #AC */
-                uint32_t :32;
-
-                uint64_t cr2; /* #PF */
-            } exc;
-            struct {
-                bool     in:1;
-                bool     :1;
-                bool     str:1;
-                bool     rep:1;
-                uint16_t bytes:3;
-                uint16_t /* asz */:3;
-                uint16_t seg:3;
-                uint16_t :3;
-                uint16_t port;
-                uint32_t :32;
-
-                uint64_t nrip;
-            } io;
-            struct {
-                uint64_t gpr:4;
-                uint64_t :59;
-                bool     mov_insn:1; /* MOV, as opposed to LMSW, CLTS, etc */
-            } mov_cr;
-            struct {
-                uint64_t ec;
-                uint64_t gpa;
-            } npf;
-            struct {
-                uint16_t sel;
-                uint64_t :48;
-
-                uint32_t ec;
-                uint32_t :4;
-                bool     iret:1;
-                uint32_t :1;
-                bool     jmp:1;
-                uint32_t :5;
-                bool     ev:1;
-                uint32_t :3;
-                bool     rf:1;
-            } task_switch;
-        } ei;
-    };
-    intinfo_t exit_int_info;    /* offset 0x88 */
-    union {                     /* offset 0x90 - cleanbit 4 */
-        struct {
-            bool _np        :1;
-            bool _sev       :1;
-            bool _sev_es    :1;
-            bool _gmet      :1;
-            bool _np_sss    :1;
-            bool _vte       :1;
-        };
-        uint64_t _np_ctrl;
-    };
-    u64 res08[2];
-    intinfo_t event_inj;        /* offset 0xA8 */
-    u64 _h_cr3;                 /* offset 0xB0 - cleanbit 4 */
-    virt_ext_t virt_ext;        /* offset 0xB8 */
-    vmcbcleanbits_t cleanbits;  /* offset 0xC0 */
-    u32 res09;                  /* offset 0xC4 */
-    u64 nextrip;                /* offset 0xC8 */
-    u8  guest_ins_len;          /* offset 0xD0 */
-    u8  guest_ins[15];          /* offset 0xD1 */
-    u64 res10a[100];            /* offset 0xE0 pad to save area */
-
-    union {
-        struct segment_register sreg[6];
-        struct {
-            struct segment_register es;  /* offset 0x400 - cleanbit 8 */
-            struct segment_register cs;  /* cleanbit 8 */
-            struct segment_register ss;  /* cleanbit 8 */
-            struct segment_register ds;  /* cleanbit 8 */
-            struct segment_register fs;
-            struct segment_register gs;
-        };
-    };
-    struct segment_register gdtr; /* cleanbit 7 */
-    struct segment_register ldtr;
-    struct segment_register idtr; /* cleanbit 7 */
-    struct segment_register tr;
-    u64 res10[5];
-    u8 res11[3];
-    u8 _cpl;                    /* cleanbit 8 */
-    u32 res12;
-    u64 _efer;                  /* offset 0x400 + 0xD0 - cleanbit 5 */
-    u64 res13[14];
-    u64 _cr4;                   /* offset 0x400 + 0x148 - cleanbit 5 */
-    u64 _cr3;                   /* cleanbit 5 */
-    u64 _cr0;                   /* cleanbit 5 */
-    u64 _dr7;                   /* cleanbit 6 */
-    u64 _dr6;                   /* cleanbit 6 */
-    u64 rflags;
-    u64 rip;
-    u64 res14[11];
-    u64 rsp;
-    u64 _msr_s_cet;             /* offset 0x400 + 0x1E0 - cleanbit 12 */
-    u64 _ssp;                   /* offset 0x400 + 0x1E8   | */
-    u64 _msr_isst;              /* offset 0x400 + 0x1F0   v */
-    u64 rax;
-    u64 star;
-    u64 lstar;
-    u64 cstar;
-    u64 sfmask;
-    u64 kerngsbase;
-    u64 sysenter_cs;
-    u64 sysenter_esp;
-    u64 sysenter_eip;
-    u64 _cr2;                   /* cleanbit 9 */
-    u64 res16[4];
-    u64 _g_pat;                 /* cleanbit 4 */
-    u64 _debugctlmsr;           /* cleanbit 10 */
-    u64 _lastbranchfromip;      /* cleanbit 10 */
-    u64 _lastbranchtoip;        /* cleanbit 10 */
-    u64 _lastintfromip;         /* cleanbit 10 */
-    u64 _lastinttoip;           /* cleanbit 10 */
-    u64 res17[9];
-    u64 spec_ctrl;
-    u64 res18[291];
-};
-
 struct svm_domain {
     /* OSVW MSRs */
     union {
@@ -595,14 +57,6 @@ struct svm_vcpu {
     uint64_t guest_sysenter_eip;
 };
 
-struct vmcb_struct *alloc_vmcb(void);
-void free_vmcb(struct vmcb_struct *vmcb);
-
-int  svm_create_vmcb(struct vcpu *v);
-void svm_destroy_vmcb(struct vcpu *v);
-
-void setup_vmcb_dump(void);
-
 #define MSR_INTERCEPT_NONE    0
 #define MSR_INTERCEPT_READ    1
 #define MSR_INTERCEPT_WRITE   2
@@ -611,66 +65,6 @@ void svm_intercept_msr(struct vcpu *v, uint32_t msr, int flags);
 #define svm_disable_intercept_for_msr(v, msr) svm_intercept_msr((v), (msr), MSR_INTERCEPT_NONE)
 #define svm_enable_intercept_for_msr(v, msr) svm_intercept_msr((v), (msr), MSR_INTERCEPT_RW)
 
-/*
- * VMCB accessor functions.
- */
-
-#define VMCB_ACCESSORS_(name, type, cleanbit)     \
-static inline void                                \
-vmcb_set_ ## name(struct vmcb_struct *vmcb,       \
-                  type value)                     \
-{                                                 \
-    vmcb->_ ## name = value;                      \
-    vmcb->cleanbits.cleanbit = false;             \
-}                                                 \
-static inline type                                \
-vmcb_get_ ## name(const struct vmcb_struct *vmcb) \
-{                                                 \
-    return vmcb->_ ## name;                       \
-}
-
-#define VMCB_ACCESSORS(name, cleanbit) \
-    VMCB_ACCESSORS_(name, typeof(((struct vmcb_struct){})._ ## name), cleanbit)
-
-VMCB_ACCESSORS(cr_intercepts, intercepts)
-VMCB_ACCESSORS(dr_intercepts, intercepts)
-VMCB_ACCESSORS(exception_intercepts, intercepts)
-VMCB_ACCESSORS(general1_intercepts, intercepts)
-VMCB_ACCESSORS(general2_intercepts, intercepts)
-VMCB_ACCESSORS(pause_filter_count, intercepts)
-VMCB_ACCESSORS(pause_filter_thresh, intercepts)
-VMCB_ACCESSORS(tsc_offset, intercepts)
-VMCB_ACCESSORS(iopm_base_pa, iopm)
-VMCB_ACCESSORS(msrpm_base_pa, iopm)
-VMCB_ACCESSORS(asid, asid)
-VMCB_ACCESSORS(vintr, tpr)
-VMCB_ACCESSORS(np_ctrl, np)
-VMCB_ACCESSORS_(np, bool, np)
-VMCB_ACCESSORS_(sev, bool, np)
-VMCB_ACCESSORS_(sev_es, bool, np)
-VMCB_ACCESSORS_(gmet, bool, np)
-VMCB_ACCESSORS_(vte, bool, np)
-VMCB_ACCESSORS(h_cr3, np)
-VMCB_ACCESSORS(g_pat, np)
-VMCB_ACCESSORS(cr0, cr)
-VMCB_ACCESSORS(cr3, cr)
-VMCB_ACCESSORS(cr4, cr)
-VMCB_ACCESSORS(efer, cr)
-VMCB_ACCESSORS(dr6, dr)
-VMCB_ACCESSORS(dr7, dr)
-VMCB_ACCESSORS(cpl, seg)
-VMCB_ACCESSORS(cr2, cr2)
-VMCB_ACCESSORS(debugctlmsr, lbr)
-VMCB_ACCESSORS(lastbranchfromip, lbr)
-VMCB_ACCESSORS(lastbranchtoip, lbr)
-VMCB_ACCESSORS(lastintfromip, lbr)
-VMCB_ACCESSORS(lastinttoip, lbr)
-VMCB_ACCESSORS(msr_s_cet, cet)
-VMCB_ACCESSORS(ssp, cet)
-VMCB_ACCESSORS(msr_isst, cet)
-
-#undef VMCB_ACCESSORS
-
 #endif /* ASM_X86_HVM_SVM_VMCS_H__ */
 
 /*
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH 3/3] x86/svm: Drop svmdebug.h
Date: Fri, 28 Nov 2025 20:19:37 +0000
Message-Id: <20251128201937.1294742-4-andrew.cooper3@citrix.com>
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svmdebug.h now only contains the declaration for svm_sync_vmcb(), despite the
function being implemented in svm.c.  Move the declaration into svm.h

No functional change.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 
---
 xen/arch/x86/hvm/svm/svm.c                  |  1 -
 xen/arch/x86/hvm/svm/svm.h                  | 17 +++++++++++++++++
 xen/arch/x86/hvm/svm/vmcb.c                 |  2 +-
 xen/arch/x86/include/asm/hvm/svm/svmdebug.h | 16 ----------------
 xen/arch/x86/include/asm/hvm/svm/vmcb.h     | 15 ---------------
 5 files changed, 18 insertions(+), 33 deletions(-)
 delete mode 100644 xen/arch/x86/include/asm/hvm/svm/svmdebug.h

diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c
index 14b3a427e642..15d45cbb57c5 100644
--- a/xen/arch/x86/hvm/svm/svm.c
+++ b/xen/arch/x86/hvm/svm/svm.c
@@ -27,7 +27,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
diff --git a/xen/arch/x86/hvm/svm/svm.h b/xen/arch/x86/hvm/svm/svm.h
index f5b0312d2dcf..cfa411ad5ae1 100644
--- a/xen/arch/x86/hvm/svm/svm.h
+++ b/xen/arch/x86/hvm/svm/svm.h
@@ -78,6 +78,23 @@ unsigned int svm_get_task_switch_insn_len(void);
 #define _NPT_PFEC_in_gpt       33
 #define NPT_PFEC_in_gpt        (1UL<<_NPT_PFEC_in_gpt)
 
+/*
+ * VMRUN doesn't switch fs/gs/tr/ldtr and SHADOWGS/SYSCALL/SYSENTER state.
+ * Therefore, guest state is in the hardware registers when servicing a
+ * VMExit.
+ *
+ * Immediately after a VMExit, the vmcb is stale, and needs to be brought
+ * into sync by VMSAVE.  If state in the vmcb is modified, a VMLOAD is
+ * needed before the following VMRUN.
+ */
+enum vmcb_sync_state {
+    vmcb_in_sync,
+    vmcb_needs_vmsave,    /* VMCB out of sync (VMSAVE needed)? */
+    vmcb_needs_vmload,    /* VMCB dirty (VMLOAD needed)? */
+};
+
+void svm_sync_vmcb(struct vcpu *v, enum vmcb_sync_state new_state);
+
 #endif /* __X86_HVM_SVM_SVM_PRIV_H__ */
 
 /*
diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c
index b1a79d515143..7bde6e98ce03 100644
--- a/xen/arch/x86/hvm/svm/vmcb.c
+++ b/xen/arch/x86/hvm/svm/vmcb.c
@@ -16,12 +16,12 @@
 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
 #include 
 
+#include "svm.h"
 #include "vmcb.h"
 
 struct vmcb_struct *alloc_vmcb(void)
diff --git a/xen/arch/x86/include/asm/hvm/svm/svmdebug.h b/xen/arch/x86/include/asm/hvm/svm/svmdebug.h
deleted file mode 100644
index ede13bd34048..000000000000
--- a/xen/arch/x86/include/asm/hvm/svm/svmdebug.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * svmdebug.h: SVM related debug defintions
- * Copyright (c) 2011, AMD Corporation.
- *
- */
-
-#ifndef __ASM_X86_HVM_SVM_SVMDEBUG_H__
-#define __ASM_X86_HVM_SVM_SVMDEBUG_H__
-
-#include 
-#include 
-
-void svm_sync_vmcb(struct vcpu *v, enum vmcb_sync_state new_state);
-
-#endif /* __ASM_X86_HVM_SVM_SVMDEBUG_H__ */
diff --git a/xen/arch/x86/include/asm/hvm/svm/vmcb.h b/xen/arch/x86/include/asm/hvm/svm/vmcb.h
index 717215ff969b..41bcc9f0d862 100644
--- a/xen/arch/x86/include/asm/hvm/svm/vmcb.h
+++ b/xen/arch/x86/include/asm/hvm/svm/vmcb.h
@@ -21,21 +21,6 @@ struct svm_domain {
     } osvw;
 };
 
-/*
- * VMRUN doesn't switch fs/gs/tr/ldtr and SHADOWGS/SYSCALL/SYSENTER state.
- * Therefore, guest state is in the hardware registers when servicing a
- * VMExit.
- *
- * Immediately after a VMExit, the vmcb is stale, and needs to be brought
- * into sync by VMSAVE.  If state in the vmcb is modified, a VMLOAD is
- * needed before the following VMRUN.
- */
-enum vmcb_sync_state {
-    vmcb_in_sync,
-    vmcb_needs_vmsave,    /* VMCB out of sync (VMSAVE needed)? */
-    vmcb_needs_vmload     /* VMCB dirty (VMLOAD needed)? */
-};
-
 struct svm_vcpu {
     struct vmcb_struct *vmcb;
     u64    vmcb_pa;
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH 0/3] x86/svm: Make various details private
Date: Fri, 28 Nov 2025 20:19:34 +0000
Message-Id: <20251128201937.1294742-1-andrew.cooper3@citrix.com>
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Lots of this does not need to be included into all translation units.

Andrew Cooper (3):
  x86/svm: Make vmcb_struct private to svm/
  x86/svm: Drop svmdebug.c
  x86/svm: Drop svmdebug.h

 xen/arch/x86/hvm/svm/Makefile               |   1 -
 xen/arch/x86/hvm/svm/asid.c                 |   1 +
 xen/arch/x86/hvm/svm/emulate.c              |   1 +
 xen/arch/x86/hvm/svm/intr.c                 |   1 +
 xen/arch/x86/hvm/svm/nestedsvm.c            |   2 +-
 xen/arch/x86/hvm/svm/svm.c                  |   2 +-
 xen/arch/x86/hvm/svm/svm.h                  |  17 +
 xen/arch/x86/hvm/svm/svmdebug.c             | 179 ------
 xen/arch/x86/hvm/svm/vmcb.c                 | 163 ++++-
 xen/arch/x86/hvm/svm/vmcb.h                 | 620 +++++++++++++++++++
 xen/arch/x86/include/asm/hvm/svm/svmdebug.h |  19 -
 xen/arch/x86/include/asm/hvm/svm/vmcb.h     | 621 --------------------
 12 files changed, 804 insertions(+), 823 deletions(-)
 delete mode 100644 xen/arch/x86/hvm/svm/svmdebug.c
 create mode 100644 xen/arch/x86/hvm/svm/vmcb.h
 delete mode 100644 xen/arch/x86/include/asm/hvm/svm/svmdebug.h


base-commit: 486c7f79c0032cbd210af8f3f1d204f8eabfdbde
-- 
2.39.5



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From: Vladimir Sementsov-Ogievskiy 
To: marcandre.lureau@redhat.com
Cc: pbonzini@redhat.com,
	qemu-devel@nongnu.org,
	vsementsov@yandex-team.ru,
	d-tatianin@yandex-team.ru,
	Stefano Stabellini ,
	Anthony PERARD ,
	Paul Durrant ,
	"Edgar E. Iglesias" ,
	xen-devel@lists.xenproject.org (open list:X86 Xen CPUs)
Subject: [PATCH 6/8] chardev: introduce .chr_get_pty_name() handler
Date: Sat, 29 Nov 2025 16:43:46 +0300
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Currently we do two wrong things:

1. Abuse s->filename to get pty_name from it

2. Violate layering with help of CHARDEV_IS_PTY()

Let's get rid of both, and introduce correct way to get pty name in
generic code, if available.

Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
 chardev/char-pty.c     |  7 +++++++
 chardev/char.c         | 19 +++++++++++++------
 hw/char/xen_console.c  |  7 ++++---
 include/chardev/char.h |  7 +++++--
 4 files changed, 29 insertions(+), 11 deletions(-)

diff --git a/chardev/char-pty.c b/chardev/char-pty.c
index a582aa7bc7..047aade09e 100644
--- a/chardev/char-pty.c
+++ b/chardev/char-pty.c
@@ -387,6 +387,12 @@ static void pty_chr_parse(QemuOpts *opts, ChardevBackend *backend, Error **errp)
     pty->path = g_strdup(path);
 }
 
+static char *pty_chr_get_pty_name(Chardev *chr)
+{
+    PtyChardev *s = PTY_CHARDEV(chr);
+    return g_strdup(s->pty_name);
+}
+
 static void char_pty_class_init(ObjectClass *oc, const void *data)
 {
     ChardevClass *cc = CHARDEV_CLASS(oc);
@@ -396,6 +402,7 @@ static void char_pty_class_init(ObjectClass *oc, const void *data)
     cc->chr_write = pty_chr_write;
     cc->chr_update_read_handler = pty_chr_update_read_handler;
     cc->chr_add_watch = pty_chr_add_watch;
+    cc->chr_get_pty_name = pty_chr_get_pty_name;
 }
 
 static const TypeInfo char_pty_type_info = {
diff --git a/chardev/char.c b/chardev/char.c
index 44bfed3627..0dc792b88f 100644
--- a/chardev/char.c
+++ b/chardev/char.c
@@ -1090,9 +1090,7 @@ ChardevReturn *qmp_chardev_add(const char *id, ChardevBackend *backend,
     }
 
     ret = g_new0(ChardevReturn, 1);
-    if (CHARDEV_IS_PTY(chr)) {
-        ret->pty = g_strdup(chr->filename + 4);
-    }
+    ret->pty = qemu_chr_get_pty_name(chr);
 
     return ret;
 
@@ -1101,6 +1099,17 @@ err:
     return NULL;
 }
 
+char *qemu_chr_get_pty_name(Chardev *chr)
+{
+    ChardevClass *cc = CHARDEV_GET_CLASS(chr);
+
+    if (cc->chr_get_pty_name) {
+        return cc->chr_get_pty_name(chr);
+    }
+
+    return NULL;
+}
+
 ChardevReturn *qmp_chardev_change(const char *id, ChardevBackend *backend,
                                   Error **errp)
 {
@@ -1192,9 +1201,7 @@ ChardevReturn *qmp_chardev_change(const char *id, ChardevBackend *backend,
     object_unref(OBJECT(chr_new));
 
     ret = g_new0(ChardevReturn, 1);
-    if (CHARDEV_IS_PTY(chr_new)) {
-        ret->pty = g_strdup(chr_new->filename + 4);
-    }
+    ret->pty = qemu_chr_get_pty_name(chr_new);
 
     return ret;
 }
diff --git a/hw/char/xen_console.c b/hw/char/xen_console.c
index a639fb0b11..7502de46e4 100644
--- a/hw/char/xen_console.c
+++ b/hw/char/xen_console.c
@@ -418,6 +418,7 @@ static void xen_console_realize(XenDevice *xendev, Error **errp)
     XenConsole *con = XEN_CONSOLE_DEVICE(xendev);
     Chardev *cs = qemu_chr_fe_get_driver(&con->chr);
     unsigned int u;
+    g_autofree char *pty_name = NULL;
 
     if (!cs) {
         error_setg(errp, "no backing character device");
@@ -450,9 +451,9 @@ static void xen_console_realize(XenDevice *xendev, Error **errp)
 
     trace_xen_console_realize(con->dev, object_get_typename(OBJECT(cs)));
 
-    if (CHARDEV_IS_PTY(cs)) {
-        /* Strip the leading 'pty:' */
-        xen_device_frontend_printf(xendev, "tty", "%s", cs->filename + 4);
+    pty_name = qemu_chr_get_pty_name(cs);
+    if (pty_name) {
+        xen_device_frontend_printf(xendev, "tty", "%s", pty_name);
     }
 
     /* No normal PV driver initialization for the primary console under Xen */
diff --git a/include/chardev/char.h b/include/chardev/char.h
index 23a227dca9..d36e50b99e 100644
--- a/include/chardev/char.h
+++ b/include/chardev/char.h
@@ -247,8 +247,6 @@ OBJECT_DECLARE_TYPE(Chardev, ChardevClass, CHARDEV)
 
 #define CHARDEV_IS_RINGBUF(chr) \
     object_dynamic_cast(OBJECT(chr), TYPE_CHARDEV_RINGBUF)
-#define CHARDEV_IS_PTY(chr) \
-    object_dynamic_cast(OBJECT(chr), TYPE_CHARDEV_PTY)
 
 struct ChardevClass {
     ObjectClass parent_class;
@@ -306,6 +304,9 @@ struct ChardevClass {
 
     /* handle various events */
     void (*chr_be_event)(Chardev *s, QEMUChrEvent event);
+
+    /* return PTY name if available */
+    char *(*chr_get_pty_name)(Chardev *s);
 };
 
 Chardev *qemu_chardev_new(const char *id, const char *typename,
@@ -320,4 +321,6 @@ GSource *qemu_chr_timeout_add_ms(Chardev *chr, guint ms,
 void suspend_mux_open(void);
 void resume_mux_open(void);
 
+char *qemu_chr_get_pty_name(Chardev *chr);
+
 #endif
-- 
2.48.1



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Feedback-ID: i1568416f:Fastmail
Date: Sun, 30 Nov 2025 03:03:22 +0100
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Jason Andryuk 
Cc: Juergen Gross ,
	Stefano Stabellini ,
	Oleksandr Tyshchenko ,
	Yann Sionneau ,
	xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] xenbus: Use .freeze/.thaw to handle xenbus devices
Message-ID: 
References: <20251119224731.61497-1-jason.andryuk@amd.com>
 <20251119224731.61497-2-jason.andryuk@amd.com>
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Date: Sun, 30 Nov 2025 03:03:22 +0100
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Jason Andryuk 
Cc: Juergen Gross ,
	Stefano Stabellini ,
	Oleksandr Tyshchenko ,
	Yann Sionneau ,
	xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] xenbus: Use .freeze/.thaw to handle xenbus devices

On Wed, Nov 19, 2025 at 05:47:29PM -0500, Jason Andryuk wrote:
> The goal is to fix s2idle and S3 for Xen PV devices. =20

Can you give a little more context of this? We do have working S3 in
qubes with no need for such change. We trigger it via the toolstack (libxl_=
domain_suspend_only()).
Are you talking about guest-initiated suspend here?

We also have kinda working (host) s2idle. You may want to take a look at th=
is
work (some/most of it was posted upstream, but not all got
committed/reviewed):
https://github.com/QubesOS/qubes-issues/issues/6411#issuecomment-1538089344
https://github.com/QubesOS/qubes-linux-kernel/pull/910 (some patches
changed since that PR, see the current main too).

> A domain resuming
> from s3 or s2idle disconnects its PV devices during resume.  The
> backends are not expecting this and do not reconnect.
>=20
> b3e96c0c7562 ("xen: use freeze/restore/thaw PM events for suspend/
> resume/chkpt") changed xen_suspend()/do_suspend() from
> PMSG_SUSPEND/PMSG_RESUME to PMSG_FREEZE/PMSG_THAW/PMSG_RESTORE, but the
> suspend/resume callbacks remained.
>=20
> .freeze/restore are used with hiberation where Linux restarts in a new
> place in the future.  .suspend/resume are useful for runtime power
> management for the duration of a boot.
>=20
> The current behavior of the callbacks works for an xl save/restore or
> live migration where the domain is restored/migrated to a new location
> and connecting to a not-already-connected backend.
>=20
> Change xenbus_pm_ops to use .freeze/thaw/restore and drop the
> .suspend/resume hook.  This matches the use in drivers/xen/manage.c for
> save/restore and live migration.  With .suspend/resume empty, PV devices
> are left connected during s2idle and s3, so PV devices are not changed
> and work after resume.

Is that intended? While it might work for suspend by a chance(*), I'm
pretty sure not disconnecting + re-reconnecting PV devices across
save/restore/live migration will break them.

(*) and even that I'm not sure - with driver domains, depending on
suspend order this feels like might result in a deadlock...

> Signed-off-by: Jason Andryuk 
> ---
>  drivers/xen/xenbus/xenbus_probe_frontend.c | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)
>=20
> diff --git a/drivers/xen/xenbus/xenbus_probe_frontend.c b/drivers/xen/xen=
bus/xenbus_probe_frontend.c
> index 6d1819269cbe..199917b6f77c 100644
> --- a/drivers/xen/xenbus/xenbus_probe_frontend.c
> +++ b/drivers/xen/xenbus/xenbus_probe_frontend.c
> @@ -148,11 +148,9 @@ static void xenbus_frontend_dev_shutdown(struct devi=
ce *_dev)
>  }
> =20
>  static const struct dev_pm_ops xenbus_pm_ops =3D {
> -	.suspend	=3D xenbus_dev_suspend,
> -	.resume		=3D xenbus_frontend_dev_resume,
>  	.freeze		=3D xenbus_dev_suspend,
>  	.thaw		=3D xenbus_dev_cancel,
> -	.restore	=3D xenbus_dev_resume,
> +	.restore	=3D xenbus_frontend_dev_resume,
>  };
> =20
>  static struct xen_bus_type xenbus_frontend =3D {
> --=20
> 2.34.1
>=20
>=20

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Date: Sun, 30 Nov 2025 03:56:37 +0100
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: =?utf-8?B?SsO8cmdlbiBHcm/Dnw==?= 
Cc: Jason Andryuk ,
	Stefano Stabellini ,
	Oleksandr Tyshchenko ,
	Yann Sionneau ,
	xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] xenbus: Use .freeze/.thaw to handle xenbus devices
Message-ID: 
References: <20251119224731.61497-1-jason.andryuk@amd.com>
 <20251119224731.61497-2-jason.andryuk@amd.com>
 <1c991699-51b7-4284-8179-6bc78f8f4eac@suse.com>
 
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Date: Sun, 30 Nov 2025 03:56:37 +0100
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: =?utf-8?B?SsO8cmdlbiBHcm/Dnw==?= 
Cc: Jason Andryuk ,
	Stefano Stabellini ,
	Oleksandr Tyshchenko ,
	Yann Sionneau ,
	xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] xenbus: Use .freeze/.thaw to handle xenbus devices

On Tue, Nov 25, 2025 at 11:47:37AM +0100, Marek Marczykowski-G=C3=B3recki w=
rote:
> On Tue, Nov 25, 2025 at 09:20:55AM +0100, J=C3=BCrgen Gro=C3=9F wrote:
> > On 19.11.25 23:47, Jason Andryuk wrote:
> > > The goal is to fix s2idle and S3 for Xen PV devices.  A domain resumi=
ng
> > > from s3 or s2idle disconnects its PV devices during resume.  The
> > > backends are not expecting this and do not reconnect.
> > >=20
> > > b3e96c0c7562 ("xen: use freeze/restore/thaw PM events for suspend/
> > > resume/chkpt") changed xen_suspend()/do_suspend() from
> > > PMSG_SUSPEND/PMSG_RESUME to PMSG_FREEZE/PMSG_THAW/PMSG_RESTORE, but t=
he
> > > suspend/resume callbacks remained.
> > >=20
> > > .freeze/restore are used with hiberation where Linux restarts in a new
> > > place in the future.  .suspend/resume are useful for runtime power
> > > management for the duration of a boot.
> > >=20
> > > The current behavior of the callbacks works for an xl save/restore or
> > > live migration where the domain is restored/migrated to a new location
> > > and connecting to a not-already-connected backend.
> > >=20
> > > Change xenbus_pm_ops to use .freeze/thaw/restore and drop the
> > > .suspend/resume hook.  This matches the use in drivers/xen/manage.c f=
or
> > > save/restore and live migration.  With .suspend/resume empty, PV devi=
ces
> > > are left connected during s2idle and s3, so PV devices are not changed
> > > and work after resume.
> > >=20
> > > Signed-off-by: Jason Andryuk 
> >=20
> > Acked-by: Juergen Gross 
> >=20
> > Marek, could you please give this patch a try with QubesOS? I think this
> > patch should be verified not to break your use cases regarding suspend /
> > resume.
>=20
> Sure, but I can't promise it will be this week, I have some deadlines to
> meet...

Regardless of my other response, those two patches appear to work fine
across domU suspend/resume (both the S3 and s2idle variants).
Note for s2idle I tested it together with other qubes patches:
https://github.com/QubesOS/qubes-linux-kernel/

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

--DJTHw7pL0k1QweeN
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Date: Sun, 30 Nov 2025 23:30:17 +0900
From: Koichiro Den 
To: Grygorii S 
Cc: xen-devel@lists.xenproject.org, dfaggioli@suse.com, jgross@suse.com, 
	gwd@xenproject.org, Jan Beulich , 
	Andrew Cooper , Michal Orzel , 
	Ayan Kumar Halder , Julien Grall 
Subject: Re: [4.21] REGRESSION: [PATCH] xen/credit2: factor in previous
 active unit's credit in csched2_runtime()
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On Thu, Nov 27, 2025 at 04:55:17PM +0200, Grygorii S wrote:
> Hi All,
> 
> On 21.06.25 17:14, Koichiro Den wrote:
> > When a running unit is about to be scheduled out due to a competing unit
> > with the highest remaining credit, the residual credit of the previous
> > unit is currently ignored in csched2_runtime() because it hasn't yet
> > been reinserted into the runqueue.
> > 
> > As a result, two equally weighted, busy units can often each be granted
> > almost the maximum possible runtime (i.e. consuming CSCHED2_CREDIT_INIT
> > in one shot) when only those two are active. In broad strokes two units
> > switch back and forth every 10ms (CSCHED2_MAX_TIMER). In contrast, when
> > more than two busy units are competing, such coarse runtime allocations
> > are rarely seen, since at least one active unit remains in the runqueue.
> > 
> > To ensure consistent behavior, have csched2_runtime() take into account
> > the previous unit's latest credit when it still can/wants to run.
> > 
> > Signed-off-by: Koichiro Den 
> > Reviewed-by: Juergen Gross 
> > ---
> >   xen/common/sched/credit2.c | 28 +++++++++++++++++++++-------
> >   1 file changed, 21 insertions(+), 7 deletions(-)
> > 
> 
> We observe regression on ARM64 with this patch.
> commit ae648e9f8013 ("xen/credit2: factor in previous active unit's credit in csched2_runtime()")
> 
> general observation:
>  This commit causes Linux guest boot time increase  >5 times for some of our the credit2
>  specific tests.
>  Reverting it makes issue gone.
> 
>  - normal log
>    (XEN) DOM1: [    6.496166] io scheduler bfq registered
>    ...
>    (XEN) DOM1: [    9.845108] Freeing unused kernel memory: 9216K
>    (XEN) DOM1: [    9.874792] Run /init as init process
>    (XEN) sched_smt_power_savings: disabled
>    (XEN) NOW=16800131328
> 
>  - failed log
>    (XEN) DOM1: [   37.281776] io scheduler bfq registered
>    (XEN) DOM1: [   61.856512] EINJ: ACPI disabled.
>    test: timed out
> 
> Run Details:
>  Platform: ARM64 (Device Tree)
>  Execution platform: qemu 6.0 (2 pCPU, 2G)
>  Boot: dom0less, 1 domain (2 vCPU)
>  Command line: "console=dtuart guest_loglvl=debug conswitch=ax"
> 
>  Dom0less cfg:
>     chosen {
>         xen,xen-bootargs = "console=dtuart guest_loglvl=debug conswitch=ax";
>         #size-cells = <0x00000002>;
>         #address-cells = <0x00000002>;
>         stdout-path = "/pl011@9000000";
>         kaslr-seed = <0x5a7b5649 0x9122e194>;
>         cpupool_0 {
>             cpupool-sched = "credit2";
>             cpupool-cpus = <0x00008001>;
>             compatible = "xen,cpupool";
>             phandle = <0xfffffffe>;
>         };
>         domU0 {
>             domain-cpupool = <0xfffffffe>;
>             vpl011;
>             cpus = <0x00000002>;
>             memory = <0x00000000 0x00040000>;
>             #size-cells = <0x00000002>;
>             #address-cells = <0x00000002>;
>             compatible = "xen,domain";
>             module@42E00000 {
>                 reg = <0x00000000 0x42e00000 0x00000000 0x000f1160>;
>                 compatible = "multiboot,ramdisk", "multiboot,module";
>             };
>             module@40400000 {
>                 bootargs = "console=ttyAMA0";
>                 reg = <0x00000000 0x40400000 0x00000000 0x02920000>;
>                 compatible = "multiboot,kernel", "multiboot,module";
>             };
>         };
>     };
> 
> Investigation:
>  It was narrowed down to a specific configuration with cpupool assigned to the domain (100% reproducible):
>  Host has 2 pCPU
>  Domain has 2 vCPU
>  cpupool_0 has 1 pCPU (cpu@1 credit2)
>  domain <- cpupool_0
> 
>  if Domain is assigned 1 vCPU - no issues.
>  if cpupool_0 is assigned 2 pCPU -  no issues (seems slower a bit, but it is on a error  margin level)
> 
> I'd be appreciated for any help with this (or revert :().
> 
> -- 
> Best regards,
> -grygorii
> 

Hi Grygorii,

Thank you for the detailed report. Could you please try increasing the
ratelimit_us (the -r/--ratelimit_us option), for example to 5000 or 10000
microseconds, and see whether the long boot time issue disappears? That
would help determine whether the previous behaviour (before the patch) had
simply masked the effect of the default 1ms rate limit in your setup. In
other words, after the patch merged, you may need to set -r/--ratelimit_us
explicitly to some appropriate value, which is larger than 1ms.

That said, this change touches long-standing credit2 behaviour, and we
probably should've discussed backward-compatibility more carefully. I'm
completely fine with reverting it if maintainers think that is the best
choice for now. (To be honest, I hadn't even realised that this had been
merged until receiving your email, since it only had a single Reviewed-by.)

Best regards,

-Koichiro


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Date: Sun, 30 Nov 2025 20:59:48 +0200
User-Agent: Mozilla Thunderbird
Subject: Re: [4.21] REGRESSION: [PATCH] xen/credit2: factor in previous active
 unit's credit in csched2_runtime()
To: Koichiro Den , Grygorii S 
Cc: xen-devel@lists.xenproject.org, dfaggioli@suse.com, jgross@suse.com,
 gwd@xenproject.org, Jan Beulich ,
 Andrew Cooper ,
 Michal Orzel , Ayan Kumar Halder ,
 Julien Grall 
References: <20250621141411.890250-1-den@valinux.co.jp>
 <3dfd6d2d-fb56-4ecd-a86b-8c6068b2e470@gmail.com>
 
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Hi Koichiro,

On 30.11.25 16:30, Koichiro Den wrote:
> On Thu, Nov 27, 2025 at 04:55:17PM +0200, Grygorii S wrote:
>> Hi All,
>>
>> On 21.06.25 17:14, Koichiro Den wrote:
>>> When a running unit is about to be scheduled out due to a competing unit
>>> with the highest remaining credit, the residual credit of the previous
>>> unit is currently ignored in csched2_runtime() because it hasn't yet
>>> been reinserted into the runqueue.
>>>
>>> As a result, two equally weighted, busy units can often each be granted
>>> almost the maximum possible runtime (i.e. consuming CSCHED2_CREDIT_INIT
>>> in one shot) when only those two are active. In broad strokes two units
>>> switch back and forth every 10ms (CSCHED2_MAX_TIMER). In contrast, when
>>> more than two busy units are competing, such coarse runtime allocations
>>> are rarely seen, since at least one active unit remains in the runqueue.
>>>
>>> To ensure consistent behavior, have csched2_runtime() take into account
>>> the previous unit's latest credit when it still can/wants to run.
>>>
>>> Signed-off-by: Koichiro Den 
>>> Reviewed-by: Juergen Gross 
>>> ---
>>>    xen/common/sched/credit2.c | 28 +++++++++++++++++++++-------
>>>    1 file changed, 21 insertions(+), 7 deletions(-)
>>>
>>
>> We observe regression on ARM64 with this patch.
>> commit ae648e9f8013 ("xen/credit2: factor in previous active unit's credit in csched2_runtime()")
>>
>> general observation:
>>   This commit causes Linux guest boot time increase  >5 times for some of our the credit2
>>   specific tests.
>>   Reverting it makes issue gone.
>>
>>   - normal log
>>     (XEN) DOM1: [    6.496166] io scheduler bfq registered
>>     ...
>>     (XEN) DOM1: [    9.845108] Freeing unused kernel memory: 9216K
>>     (XEN) DOM1: [    9.874792] Run /init as init process
>>     (XEN) sched_smt_power_savings: disabled
>>     (XEN) NOW=16800131328
>>
>>   - failed log
>>     (XEN) DOM1: [   37.281776] io scheduler bfq registered
>>     (XEN) DOM1: [   61.856512] EINJ: ACPI disabled.
>>     test: timed out
>>
>> Run Details:
>>   Platform: ARM64 (Device Tree)
>>   Execution platform: qemu 6.0 (2 pCPU, 2G)
>>   Boot: dom0less, 1 domain (2 vCPU)
>>   Command line: "console=dtuart guest_loglvl=debug conswitch=ax"
>>
>>   Dom0less cfg:
>>      chosen {
>>          xen,xen-bootargs = "console=dtuart guest_loglvl=debug conswitch=ax";
>>          #size-cells = <0x00000002>;
>>          #address-cells = <0x00000002>;
>>          stdout-path = "/pl011@9000000";
>>          kaslr-seed = <0x5a7b5649 0x9122e194>;
>>          cpupool_0 {
>>              cpupool-sched = "credit2";
>>              cpupool-cpus = <0x00008001>;
>>              compatible = "xen,cpupool";
>>              phandle = <0xfffffffe>;
>>          };
>>          domU0 {
>>              domain-cpupool = <0xfffffffe>;
>>              vpl011;
>>              cpus = <0x00000002>;
>>              memory = <0x00000000 0x00040000>;
>>              #size-cells = <0x00000002>;
>>              #address-cells = <0x00000002>;
>>              compatible = "xen,domain";
>>              module@42E00000 {
>>                  reg = <0x00000000 0x42e00000 0x00000000 0x000f1160>;
>>                  compatible = "multiboot,ramdisk", "multiboot,module";
>>              };
>>              module@40400000 {
>>                  bootargs = "console=ttyAMA0";
>>                  reg = <0x00000000 0x40400000 0x00000000 0x02920000>;
>>                  compatible = "multiboot,kernel", "multiboot,module";
>>              };
>>          };
>>      };
>>
>> Investigation:
>>   It was narrowed down to a specific configuration with cpupool assigned to the domain (100% reproducible):
>>   Host has 2 pCPU
>>   Domain has 2 vCPU
>>   cpupool_0 has 1 pCPU (cpu@1 credit2)
>>   domain <- cpupool_0
>>
>>   if Domain is assigned 1 vCPU - no issues.
>>   if cpupool_0 is assigned 2 pCPU -  no issues (seems slower a bit, but it is on a error  margin level)
>>
>> I'd be appreciated for any help with this (or revert :().
>>
> 
> Thank you for the detailed report. Could you please try increasing the
> ratelimit_us (the -r/--ratelimit_us option), for example to 5000 or 10000
> microseconds, and see whether the long boot time issue disappears?
> That would help determine whether the previous behaviour (before the patch) had
> simply masked the effect of the default 1ms rate limit in your setup. 

I've tried it. Boot time is improved, but it's still slower.

(XEN) Command line: console=dtuart guest_loglvl=debug conswitch=ax sched_ratelimit_us=5000

(XEN) DOM1: [   37.903192] Freeing unused kernel memory: 9216K
(XEN) DOM1: [   37.970645] Run /init as init process

I've attached dump_runq below FYI.

Note. This is dom0less boot, cpupools/domains are created at boot time.
The toolstack is not used.
And I've not tried (and it will be hard for me to try) if the issue reproducible
when cpupools/domains are created by toolstack with above cfg.

I can try run with debug changes if you have any.

> In other words, after the patch merged, you may need to set -r/--ratelimit_us
> explicitly to some appropriate value, which is larger than 1ms.

Unfortunately, "after the patch merged, may need to set -r/--ratelimit_us explicitly"
is not going to work :( (at least not as long term solution) as this is safety test suit,
so any deviations from default Xen settings which are not part of particular Test case
need to be justified.


> 
> That said, this change touches long-standing credit2 behaviour, and we
> probably should've discussed backward-compatibility more carefully. I'm
> completely fine with reverting it if maintainers think that is the best
> choice for now. (To be honest, I hadn't even realised that this had been
> merged until receiving your email, since it only had a single Reviewed-by.)


-- 
Best regards,
-grygorii

==== dump_runq() "r" =========
(XEN) DOM1: [   37.970645] Run /init as init process
(XEN) sched_smt_power_savings: disabled
(XEN) NOW=46147558848
(XEN) Online Cpus: 0-1
(XEN) Cpupool 0:
(XEN) Cpus: 0
(XEN) Scheduling granularity: cpu, 1 CPU per sched-resource
(XEN) Scheduler: SMP Credit Scheduler rev2 (credit2)
(XEN) Active queues: 1
(XEN) 	default-weight     = 256
(XEN) Runqueue 0:
(XEN) 	ncpus              = 1
(XEN) 	cpus               = 0
(XEN) 	max_weight         = 1
(XEN) 	pick_bias          = 0
(XEN) 	instload           = 0
(XEN) 	aveload            = 0 (~0%)
(XEN) 	idlers: 0
(XEN) 	tickled: 0
(XEN) 	fully idle cores: 0
(XEN) Domain info:
(XEN) Runqueue 0:
(XEN) CPU[00] runq=0, sibling={0}, core={0-1}
(XEN) RUNQ:
(XEN) CPUs info:
(XEN) CPU[00] current=d[IDLE]v0, curr=d[IDLE]v0, prev=NULL
(XEN) Cpupool 1:
(XEN) Cpus: 1
(XEN) Scheduling granularity: cpu, 1 CPU per sched-resource
(XEN) Scheduler: SMP Credit Scheduler rev2 (credit2)
(XEN) Active queues: 1
(XEN) 	default-weight     = 256
(XEN) Runqueue 0:
(XEN) 	ncpus              = 1
(XEN) 	cpus               = 1
(XEN) 	max_weight         = 256
(XEN) 	pick_bias          = 1
(XEN) 	instload           = 1
(XEN) 	aveload            = 413852 (~157%)
(XEN) 	idlers: 0
(XEN) 	tickled: 0
(XEN) 	fully idle cores: 0
(XEN) Domain info:
(XEN) 	Domain: 1 w 256 c 0 v 2
(XEN) 	  1: [1.0] flags=2 cpu=1 credit=6994336 [w=256] load=238475 (~90%)
(XEN) 	  2: [1.1] flags=2 cpu=1 credit=4766960 [w=256] load=176230 (~67%)
(XEN) Runqueue 0:
(XEN) CPU[01] runq=0, sibling={1}, core={0-1}
(XEN) 	run: [1.1] flags=2 cpu=1 credit=4766960 [w=256] load=176230 (~67%)
(XEN) RUNQ:
(XEN) 	  0: [1.0] flags=0 cpu=1 credit=18096 [w=256] load=238475 (~90%)
(XEN) CPUs info:
(XEN) CPU[01] current=d1v0, curr=d1v0, prev=NULL